Commit | Line | Data |
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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
aa820537 | 3 | Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009 |
2132e3a3 | 4 | Free Software Foundation, Inc. |
adde6300 AM |
5 | Contributed by Denis Chertykov <denisc@overta.ru> |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
21 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
22 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 23 | |
adde6300 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
adde6300 AM |
26 | #include "subsegs.h" |
27 | ||
1188e082 DC |
28 | struct avr_opcodes_s |
29 | { | |
dc191a8f NC |
30 | char * name; |
31 | char * constraints; | |
32 | int insn_size; /* In words. */ | |
33 | int isa; | |
34 | unsigned int bin_opcode; | |
1188e082 DC |
35 | }; |
36 | ||
37 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
38 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
39 | ||
40 | struct avr_opcodes_s avr_opcodes[] = | |
41 | { | |
42 | #include "opcode/avr.h" | |
43 | {NULL, NULL, 0, 0, 0} | |
44 | }; | |
45 | ||
adde6300 AM |
46 | const char comment_chars[] = ";"; |
47 | const char line_comment_chars[] = "#"; | |
48 | const char line_separator_chars[] = "$"; | |
49 | ||
adde6300 AM |
50 | const char *md_shortopts = "m:"; |
51 | struct mcu_type_s | |
52 | { | |
53 | char *name; | |
54 | int isa; | |
55 | int mach; | |
56 | }; | |
57 | ||
1f8ae5e6 | 58 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 59 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 60 | |
adde6300 AM |
61 | static struct mcu_type_s mcu_types[] = |
62 | { | |
7b21ac3f EW |
63 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
64 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
65 | but set to AVR_ISA_AVR25 for some following version | |
66 | of GCC (from 4.3) for backward compatibility. */ | |
67 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, | |
68 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
69 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, | |
70 | but set to AVR_ISA_AVR3_ALL for some following version | |
71 | of GCC (from 4.3) for backward compatibility. */ | |
72 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
73 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
74 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
75 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
76 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, | |
77 | but set to AVR_ISA_AVR51 for some following version | |
78 | of GCC (from 4.3) for backward compatibility. */ | |
79 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
80 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
81 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
28c9d252 | 82 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
83 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
84 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
85 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
86 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
87 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
88 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
89 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
90 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
91 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 92 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
93 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
94 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
95 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
96 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
97 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
98 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, | |
100 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
101 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 102 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 103 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
104 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
105 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 106 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 107 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
108 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
109 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
110 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
111 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
112 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 113 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
114 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
115 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 116 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 117 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
118 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
119 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
120 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
121 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, | |
a53fddce | 122 | {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
123 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, |
124 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
125 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
126 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
127 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
2b02f87c | 128 | {"attiny327", AVR_ISA_AVR35, bfd_mach_avr35}, |
7b21ac3f EW |
129 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, |
130 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
11908008 EW |
131 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
132 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
133 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
28c9d252 | 134 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
7b21ac3f EW |
135 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
136 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, | |
137 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
138 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, | |
28c9d252 NC |
139 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
140 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f | 141 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
2b02f87c NC |
142 | {"atmega4hvd", AVR_ISA_AVR4, bfd_mach_avr4}, |
143 | {"atmega8hvd", AVR_ISA_AVR4, bfd_mach_avr4}, | |
249da685 EW |
144 | {"atmega8c1", AVR_ISA_AVR4, bfd_mach_avr4}, |
145 | {"atmega8m1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
7b21ac3f EW |
146 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, |
147 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
148 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
149 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
150 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 151 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 152 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 153 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 154 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 155 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f EW |
156 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
157 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, | |
158 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
159 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, | |
160 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
161 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, | |
162 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
249da685 | 163 | {"atmega16c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
164 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
165 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, | |
166 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
167 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, | |
168 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
169 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, | |
170 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
171 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
172 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
173 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
174 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, | |
175 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
176 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, | |
177 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, | |
178 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, | |
179 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
180 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
8453da2e | 181 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
182 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
183 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, | |
184 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, | |
185 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, | |
186 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
187 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
188 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f EW |
189 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
190 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
191 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, | |
192 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
193 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
194 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
195 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 196 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
197 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
198 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 199 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 200 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
201 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
202 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 203 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 204 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
7b21ac3f EW |
205 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
206 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, | |
207 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
208 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, | |
17f4880d | 209 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
210 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
211 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
212 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
2b02f87c NC |
213 | {"m3000f", AVR_ISA_AVR51, bfd_mach_avr51}, |
214 | {"m3000s", AVR_ISA_AVR51, bfd_mach_avr51}, | |
215 | {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51}, | |
7b21ac3f EW |
216 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, |
217 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
adde6300 AM |
218 | {NULL, 0, 0} |
219 | }; | |
220 | ||
adde6300 | 221 | /* Current MCU type. */ |
7b21ac3f | 222 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
dc191a8f | 223 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 224 | |
00d2865b NC |
225 | /* AVR target-specific switches. */ |
226 | struct avr_opt_s | |
227 | { | |
dc191a8f NC |
228 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
229 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
230 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
231 | }; |
232 | ||
233 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
234 | ||
adde6300 AM |
235 | const char EXP_CHARS[] = "eE"; |
236 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
237 | |
238 | static void avr_set_arch (int); | |
adde6300 AM |
239 | |
240 | /* The target specific pseudo-ops which we support. */ | |
241 | const pseudo_typeS md_pseudo_table[] = | |
242 | { | |
243 | {"arch", avr_set_arch, 0}, | |
244 | { NULL, NULL, 0} | |
245 | }; | |
246 | ||
247 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 248 | |
dc191a8f NC |
249 | #define EXP_MOD_NAME(i) exp_mod[i].name |
250 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
251 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
252 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
253 | |
254 | struct exp_mod_s | |
255 | { | |
dc191a8f NC |
256 | char * name; |
257 | bfd_reloc_code_real_type reloc; | |
258 | bfd_reloc_code_real_type neg_reloc; | |
259 | int have_pm; | |
adde6300 AM |
260 | }; |
261 | ||
c6a7ab1f NC |
262 | static struct exp_mod_s exp_mod[] = |
263 | { | |
adde6300 AM |
264 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
265 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
266 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
267 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
268 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
269 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 NC |
270 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
271 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, | |
adde6300 AM |
272 | }; |
273 | ||
8ad7c533 NC |
274 | /* A union used to store indicies into the exp_mod[] array |
275 | in a hash table which expects void * data types. */ | |
276 | typedef union | |
277 | { | |
278 | void * ptr; | |
279 | int index; | |
280 | } mod_index; | |
281 | ||
adde6300 AM |
282 | /* Opcode hash table. */ |
283 | static struct hash_control *avr_hash; | |
284 | ||
285 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
286 | static struct hash_control *avr_mod_hash; | |
287 | ||
00d2865b | 288 | #define OPTION_MMCU 'm' |
dc191a8f NC |
289 | enum options |
290 | { | |
291 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
292 | OPTION_NO_SKIP_BUG, | |
293 | OPTION_NO_WRAP | |
294 | }; | |
adde6300 | 295 | |
c6a7ab1f NC |
296 | struct option md_longopts[] = |
297 | { | |
00d2865b NC |
298 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
299 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
300 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
301 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
302 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 303 | }; |
adde6300 | 304 | |
c6a7ab1f | 305 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
306 | |
307 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 308 | |
00d2865b | 309 | static void |
dc191a8f | 310 | show_mcu_list (FILE *stream) |
00d2865b NC |
311 | { |
312 | int i, x; | |
313 | ||
314 | fprintf (stream, _("Known MCU names:")); | |
315 | x = 1000; | |
1dab94dd | 316 | |
00d2865b NC |
317 | for (i = 0; mcu_types[i].name; i++) |
318 | { | |
319 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 320 | |
00d2865b | 321 | x += len + 1; |
1dab94dd | 322 | |
00d2865b | 323 | if (x < 75) |
c6a7ab1f | 324 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
325 | else |
326 | { | |
327 | fprintf (stream, "\n %s", mcu_types[i].name); | |
328 | x = len + 2; | |
329 | } | |
330 | } | |
1dab94dd | 331 | |
c6a7ab1f | 332 | fprintf (stream, "\n"); |
00d2865b NC |
333 | } |
334 | ||
adde6300 | 335 | static inline char * |
dc191a8f | 336 | skip_space (char *s) |
adde6300 AM |
337 | { |
338 | while (*s == ' ' || *s == '\t') | |
339 | ++s; | |
340 | return s; | |
341 | } | |
342 | ||
343 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 344 | |
adde6300 AM |
345 | static char * |
346 | extract_word (char *from, char *to, int limit) | |
347 | { | |
348 | char *op_start; | |
349 | char *op_end; | |
350 | int size = 0; | |
351 | ||
352 | /* Drop leading whitespace. */ | |
353 | from = skip_space (from); | |
354 | *to = 0; | |
c6a7ab1f | 355 | |
adde6300 | 356 | /* Find the op code end. */ |
c6a7ab1f | 357 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
358 | { |
359 | to[size++] = *op_end++; | |
360 | if (size + 1 >= limit) | |
361 | break; | |
362 | } | |
1dab94dd | 363 | |
adde6300 AM |
364 | to[size] = 0; |
365 | return op_end; | |
366 | } | |
367 | ||
368 | int | |
dc191a8f NC |
369 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
370 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
371 | { |
372 | abort (); | |
373 | return 0; | |
374 | } | |
375 | ||
376 | void | |
dc191a8f | 377 | md_show_usage (FILE *stream) |
adde6300 | 378 | { |
00d2865b NC |
379 | fprintf (stream, |
380 | _("AVR options:\n" | |
adde6300 AM |
381 | " -mmcu=[avr-name] select microcontroller variant\n" |
382 | " [avr-name] can be:\n" | |
7b21ac3f EW |
383 | " avr1 - classic AVR core without data RAM\n" |
384 | " avr2 - classic AVR core with up to 8K program memory\n" | |
385 | " avr25 - classic AVR core with up to 8K program memory\n" | |
386 | " plus the MOVW instruction\n" | |
387 | " avr3 - classic AVR core with up to 64K program memory\n" | |
388 | " avr31 - classic AVR core with up to 128K program memory\n" | |
389 | " avr35 - classic AVR core with up to 64K program memory\n" | |
390 | " plus the MOVW instruction\n" | |
391 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
392 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
393 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
394 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
adde6300 | 395 | " or immediate microcontroller name.\n")); |
00d2865b NC |
396 | fprintf (stream, |
397 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
398 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
399 | " (default for avr4, avr5)\n" | |
400 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
401 | " (default for avr3, avr5)\n")); | |
402 | show_mcu_list (stream); | |
adde6300 AM |
403 | } |
404 | ||
405 | static void | |
dc191a8f | 406 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 407 | { |
dc191a8f | 408 | char str[20]; |
1dab94dd | 409 | |
adde6300 | 410 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 411 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
412 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
413 | } | |
414 | ||
415 | int | |
dc191a8f | 416 | md_parse_option (int c, char *arg) |
adde6300 | 417 | { |
00d2865b | 418 | switch (c) |
adde6300 | 419 | { |
00d2865b NC |
420 | case OPTION_MMCU: |
421 | { | |
422 | int i; | |
423 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 424 | |
00d2865b NC |
425 | { |
426 | char *t = s; | |
427 | char *arg1 = arg; | |
428 | ||
429 | do | |
3882b010 | 430 | *t = TOLOWER (*arg1++); |
00d2865b NC |
431 | while (*t++); |
432 | } | |
433 | ||
434 | for (i = 0; mcu_types[i].name; ++i) | |
435 | if (strcmp (mcu_types[i].name, s) == 0) | |
436 | break; | |
adde6300 | 437 | |
00d2865b NC |
438 | if (!mcu_types[i].name) |
439 | { | |
440 | show_mcu_list (stderr); | |
441 | as_fatal (_("unknown MCU: %s\n"), arg); | |
442 | } | |
65aa24b6 | 443 | |
00d2865b NC |
444 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
445 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
446 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
447 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
448 | avr_mcu = &mcu_types[i]; | |
449 | else | |
450 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
451 | avr_mcu->name, mcu_types[i].name); | |
452 | return 1; | |
453 | } | |
454 | case OPTION_ALL_OPCODES: | |
455 | avr_opt.all_opcodes = 1; | |
456 | return 1; | |
457 | case OPTION_NO_SKIP_BUG: | |
458 | avr_opt.no_skip_bug = 1; | |
459 | return 1; | |
460 | case OPTION_NO_WRAP: | |
461 | avr_opt.no_wrap = 1; | |
adde6300 AM |
462 | return 1; |
463 | } | |
1dab94dd | 464 | |
adde6300 AM |
465 | return 0; |
466 | } | |
467 | ||
468 | symbolS * | |
dc191a8f | 469 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 470 | { |
dc191a8f | 471 | return NULL; |
adde6300 AM |
472 | } |
473 | ||
adde6300 | 474 | char * |
dc191a8f | 475 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 476 | { |
499ac353 | 477 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
478 | } |
479 | ||
480 | void | |
dc191a8f NC |
481 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
482 | asection *sec ATTRIBUTE_UNUSED, | |
483 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
484 | { |
485 | abort (); | |
486 | } | |
487 | ||
adde6300 | 488 | void |
dc191a8f | 489 | md_begin (void) |
adde6300 | 490 | { |
df136245 | 491 | unsigned int i; |
adde6300 | 492 | struct avr_opcodes_s *opcode; |
dc191a8f | 493 | |
c6a7ab1f | 494 | avr_hash = hash_new (); |
adde6300 AM |
495 | |
496 | /* Insert unique names into hash table. This hash table then provides a | |
497 | quick index to the first opcode with a particular name in the opcode | |
498 | table. */ | |
adde6300 AM |
499 | for (opcode = avr_opcodes; opcode->name; opcode++) |
500 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
501 | ||
502 | avr_mod_hash = hash_new (); | |
503 | ||
dc191a8f | 504 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
505 | { |
506 | mod_index m; | |
507 | ||
508 | m.index = i + 10; | |
509 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
510 | } | |
c6a7ab1f | 511 | |
adde6300 AM |
512 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
513 | } | |
514 | ||
df136245 | 515 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 516 | If result greater than MAX then error. */ |
df136245 DC |
517 | |
518 | static unsigned int | |
dc191a8f | 519 | avr_get_constant (char *str, int max) |
df136245 DC |
520 | { |
521 | expressionS ex; | |
dc191a8f | 522 | |
df136245 DC |
523 | str = skip_space (str); |
524 | input_line_pointer = str; | |
dc191a8f | 525 | expression (& ex); |
df136245 DC |
526 | |
527 | if (ex.X_op != O_constant) | |
528 | as_bad (_("constant value required")); | |
529 | ||
530 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 531 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 532 | |
df136245 DC |
533 | return ex.X_add_number; |
534 | } | |
535 | ||
dc191a8f | 536 | /* Parse for ldd/std offset. */ |
df136245 | 537 | |
dc191a8f NC |
538 | static void |
539 | avr_offset_expression (expressionS *exp) | |
adde6300 | 540 | { |
dc191a8f NC |
541 | char *str = input_line_pointer; |
542 | char *tmp; | |
543 | char op[8]; | |
adde6300 | 544 | |
dc191a8f NC |
545 | tmp = str; |
546 | str = extract_word (str, op, sizeof (op)); | |
547 | ||
548 | input_line_pointer = tmp; | |
549 | expression (exp); | |
550 | ||
551 | /* Warn about expressions that fail to use lo8 (). */ | |
552 | if (exp->X_op == O_constant) | |
adde6300 | 553 | { |
dc191a8f | 554 | int x = exp->X_add_number; |
28c9d252 | 555 | |
dc191a8f NC |
556 | if (x < -255 || x > 255) |
557 | as_warn (_("constant out of 8-bit range: %d"), x); | |
558 | } | |
559 | } | |
adde6300 | 560 | |
dc191a8f | 561 | /* Parse ordinary expression. */ |
adde6300 | 562 | |
dc191a8f NC |
563 | static char * |
564 | parse_exp (char *s, expressionS *op) | |
565 | { | |
566 | input_line_pointer = s; | |
567 | expression (op); | |
568 | if (op->X_op == O_absent) | |
569 | as_bad (_("missing operand")); | |
570 | return input_line_pointer; | |
571 | } | |
1dab94dd | 572 | |
dc191a8f NC |
573 | /* Parse special expressions (needed for LDI command): |
574 | xx8 (address) | |
575 | xx8 (-address) | |
576 | pm_xx8 (address) | |
577 | pm_xx8 (-address) | |
578 | where xx is: hh, hi, lo. */ | |
adde6300 | 579 | |
dc191a8f NC |
580 | static bfd_reloc_code_real_type |
581 | avr_ldi_expression (expressionS *exp) | |
582 | { | |
583 | char *str = input_line_pointer; | |
584 | char *tmp; | |
585 | char op[8]; | |
586 | int mod; | |
28c9d252 NC |
587 | int linker_stubs_should_be_generated = 0; |
588 | ||
dc191a8f | 589 | tmp = str; |
adde6300 | 590 | |
dc191a8f | 591 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 592 | |
dc191a8f NC |
593 | if (op[0]) |
594 | { | |
8ad7c533 | 595 | mod_index m; |
28c9d252 | 596 | |
8ad7c533 NC |
597 | m.ptr = hash_find (avr_mod_hash, op); |
598 | mod = m.index; | |
1dab94dd | 599 | |
dc191a8f NC |
600 | if (mod) |
601 | { | |
602 | int closes = 0; | |
b170af93 | 603 | |
dc191a8f NC |
604 | mod -= 10; |
605 | str = skip_space (str); | |
00d2865b | 606 | |
dc191a8f NC |
607 | if (*str == '(') |
608 | { | |
28c9d252 | 609 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 610 | int neg_p = 0; |
00d2865b | 611 | |
dc191a8f | 612 | ++str; |
00d2865b | 613 | |
dc191a8f | 614 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
615 | || strncmp ("gs(",str,3) == 0 |
616 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
617 | || strncmp ("-(pm(", str, 5) == 0) |
618 | { | |
619 | if (HAVE_PM_P (mod)) | |
620 | { | |
621 | ++mod; | |
622 | ++closes; | |
623 | } | |
624 | else | |
625 | as_bad (_("illegal expression")); | |
b170af93 | 626 | |
28c9d252 NC |
627 | if (str[0] == 'g' || str[2] == 'g') |
628 | linker_stubs_should_be_generated = 1; | |
629 | ||
dc191a8f NC |
630 | if (*str == '-') |
631 | { | |
632 | neg_p = 1; | |
633 | ++closes; | |
634 | str += 5; | |
635 | } | |
636 | else | |
637 | str += 3; | |
638 | } | |
adde6300 | 639 | |
dc191a8f NC |
640 | if (*str == '-' && *(str + 1) == '(') |
641 | { | |
642 | neg_p ^= 1; | |
643 | ++closes; | |
644 | str += 2; | |
645 | } | |
750bce0e | 646 | |
dc191a8f NC |
647 | input_line_pointer = str; |
648 | expression (exp); | |
750bce0e | 649 | |
dc191a8f NC |
650 | do |
651 | { | |
652 | if (*input_line_pointer != ')') | |
653 | { | |
654 | as_bad (_("`)' required")); | |
655 | break; | |
656 | } | |
657 | input_line_pointer++; | |
658 | } | |
659 | while (closes--); | |
660 | ||
28c9d252 NC |
661 | reloc_to_return = |
662 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
663 | if (linker_stubs_should_be_generated) | |
664 | { | |
665 | switch (reloc_to_return) | |
666 | { | |
667 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
668 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
669 | break; | |
670 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
671 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
672 | break; | |
673 | ||
674 | default: | |
0a903bab NC |
675 | /* PR 5523: Do not generate a warning here, |
676 | legitimate code can trigger this case. */ | |
677 | break; | |
28c9d252 NC |
678 | } |
679 | } | |
680 | return reloc_to_return; | |
dc191a8f NC |
681 | } |
682 | } | |
683 | } | |
750bce0e NC |
684 | |
685 | input_line_pointer = tmp; | |
686 | expression (exp); | |
687 | ||
688 | /* Warn about expressions that fail to use lo8 (). */ | |
689 | if (exp->X_op == O_constant) | |
690 | { | |
691 | int x = exp->X_add_number; | |
dc191a8f | 692 | |
750bce0e NC |
693 | if (x < -255 || x > 255) |
694 | as_warn (_("constant out of 8-bit range: %d"), x); | |
695 | } | |
dc191a8f NC |
696 | |
697 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
698 | } |
699 | ||
df136245 | 700 | /* Parse one instruction operand. |
c6a7ab1f NC |
701 | Return operand bitmask. Also fixups can be generated. */ |
702 | ||
adde6300 | 703 | static unsigned int |
dc191a8f NC |
704 | avr_operand (struct avr_opcodes_s *opcode, |
705 | int where, | |
706 | char *op, | |
707 | char **line) | |
adde6300 | 708 | { |
adde6300 | 709 | expressionS op_expr; |
df136245 DC |
710 | unsigned int op_mask = 0; |
711 | char *str = skip_space (*line); | |
adde6300 | 712 | |
adde6300 AM |
713 | switch (*op) |
714 | { | |
715 | /* Any register operand. */ | |
716 | case 'w': | |
717 | case 'd': | |
718 | case 'r': | |
b170af93 DC |
719 | case 'a': |
720 | case 'v': | |
c6a7ab1f NC |
721 | if (*str == 'r' || *str == 'R') |
722 | { | |
723 | char r_name[20]; | |
1dab94dd | 724 | |
c6a7ab1f | 725 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 726 | op_mask = 0xff; |
3882b010 | 727 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
728 | { |
729 | if (r_name[2] == '\0') | |
730 | op_mask = r_name[1] - '0'; | |
731 | else if (r_name[1] != '0' | |
3882b010 | 732 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
733 | && r_name[3] == '\0') |
734 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
735 | } | |
736 | } | |
737 | else | |
738 | { | |
739 | op_mask = avr_get_constant (str, 31); | |
740 | str = input_line_pointer; | |
741 | } | |
1dab94dd | 742 | |
c6a7ab1f NC |
743 | if (op_mask <= 31) |
744 | { | |
745 | switch (*op) | |
746 | { | |
747 | case 'a': | |
748 | if (op_mask < 16 || op_mask > 23) | |
749 | as_bad (_("register r16-r23 required")); | |
750 | op_mask -= 16; | |
751 | break; | |
1dab94dd | 752 | |
c6a7ab1f NC |
753 | case 'd': |
754 | if (op_mask < 16) | |
755 | as_bad (_("register number above 15 required")); | |
756 | op_mask -= 16; | |
757 | break; | |
1dab94dd | 758 | |
c6a7ab1f NC |
759 | case 'v': |
760 | if (op_mask & 1) | |
761 | as_bad (_("even register number required")); | |
762 | op_mask >>= 1; | |
763 | break; | |
1dab94dd | 764 | |
c6a7ab1f | 765 | case 'w': |
65b1d096 | 766 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 767 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 768 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
769 | break; |
770 | } | |
771 | break; | |
772 | } | |
773 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
774 | break; |
775 | ||
776 | case 'e': | |
777 | { | |
778 | char c; | |
1dab94dd | 779 | |
adde6300 AM |
780 | if (*str == '-') |
781 | { | |
c6a7ab1f | 782 | str = skip_space (str + 1); |
adde6300 AM |
783 | op_mask = 0x1002; |
784 | } | |
3882b010 | 785 | c = TOLOWER (*str); |
adde6300 AM |
786 | if (c == 'x') |
787 | op_mask |= 0x100c; | |
788 | else if (c == 'y') | |
789 | op_mask |= 0x8; | |
790 | else if (c != 'z') | |
00d2865b | 791 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 792 | |
c6a7ab1f | 793 | str = skip_space (str + 1); |
adde6300 AM |
794 | if (*str == '+') |
795 | { | |
796 | ++str; | |
797 | if (op_mask & 2) | |
00d2865b | 798 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
799 | op_mask |= 0x1001; |
800 | } | |
e38c9cc2 | 801 | |
1188e082 | 802 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 803 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
804 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
805 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
806 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
807 | } |
808 | break; | |
809 | ||
b170af93 | 810 | case 'z': |
c6a7ab1f NC |
811 | if (*str == '-') |
812 | as_bad (_("can't predecrement")); | |
1dab94dd | 813 | |
c6a7ab1f NC |
814 | if (! (*str == 'z' || *str == 'Z')) |
815 | as_bad (_("pointer register Z required")); | |
1dab94dd | 816 | |
c6a7ab1f NC |
817 | str = skip_space (str + 1); |
818 | ||
819 | if (*str == '+') | |
820 | { | |
821 | ++str; | |
822 | op_mask |= 1; | |
823 | } | |
d669d37f NC |
824 | |
825 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
826 | if (!avr_opt.all_opcodes | |
827 | && (op_mask & 0x0001) | |
828 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
829 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
830 | break; |
831 | ||
adde6300 AM |
832 | case 'b': |
833 | { | |
3882b010 | 834 | char c = TOLOWER (*str++); |
1dab94dd | 835 | |
adde6300 AM |
836 | if (c == 'y') |
837 | op_mask |= 0x8; | |
838 | else if (c != 'z') | |
00d2865b | 839 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
840 | str = skip_space (str); |
841 | if (*str++ == '+') | |
842 | { | |
750bce0e NC |
843 | input_line_pointer = str; |
844 | avr_offset_expression (& op_expr); | |
adde6300 | 845 | str = input_line_pointer; |
750bce0e NC |
846 | fix_new_exp (frag_now, where, 3, |
847 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
848 | } |
849 | } | |
850 | break; | |
851 | ||
852 | case 'h': | |
c6a7ab1f NC |
853 | str = parse_exp (str, &op_expr); |
854 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 855 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
856 | break; |
857 | ||
858 | case 'L': | |
c6a7ab1f NC |
859 | str = parse_exp (str, &op_expr); |
860 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 861 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
862 | break; |
863 | ||
864 | case 'l': | |
c6a7ab1f NC |
865 | str = parse_exp (str, &op_expr); |
866 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 867 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
868 | break; |
869 | ||
870 | case 'i': | |
c6a7ab1f NC |
871 | str = parse_exp (str, &op_expr); |
872 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 873 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
874 | break; |
875 | ||
876 | case 'M': | |
877 | { | |
878 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 879 | |
c6a7ab1f NC |
880 | input_line_pointer = str; |
881 | r_type = avr_ldi_expression (&op_expr); | |
882 | str = input_line_pointer; | |
adde6300 | 883 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 884 | &op_expr, FALSE, r_type); |
adde6300 AM |
885 | } |
886 | break; | |
887 | ||
888 | case 'n': | |
889 | { | |
890 | unsigned int x; | |
1dab94dd | 891 | |
adde6300 AM |
892 | x = ~avr_get_constant (str, 255); |
893 | str = input_line_pointer; | |
894 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
895 | } | |
896 | break; | |
897 | ||
898 | case 'K': | |
750bce0e NC |
899 | input_line_pointer = str; |
900 | avr_offset_expression (& op_expr); | |
901 | str = input_line_pointer; | |
902 | fix_new_exp (frag_now, where, 3, | |
903 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
904 | break; |
905 | ||
906 | case 'S': | |
907 | case 's': | |
908 | { | |
909 | unsigned int x; | |
1dab94dd | 910 | |
adde6300 AM |
911 | x = avr_get_constant (str, 7); |
912 | str = input_line_pointer; | |
913 | if (*op == 'S') | |
914 | x <<= 4; | |
915 | op_mask |= x; | |
916 | } | |
917 | break; | |
918 | ||
919 | case 'P': | |
920 | { | |
921 | unsigned int x; | |
1dab94dd | 922 | |
adde6300 AM |
923 | x = avr_get_constant (str, 63); |
924 | str = input_line_pointer; | |
925 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
926 | } | |
927 | break; | |
928 | ||
929 | case 'p': | |
930 | { | |
931 | unsigned int x; | |
1dab94dd | 932 | |
adde6300 AM |
933 | x = avr_get_constant (str, 31); |
934 | str = input_line_pointer; | |
935 | op_mask |= x << 3; | |
936 | } | |
937 | break; | |
1dab94dd | 938 | |
1188e082 DC |
939 | case '?': |
940 | break; | |
1dab94dd | 941 | |
adde6300 | 942 | default: |
00d2865b | 943 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 944 | } |
1dab94dd | 945 | |
adde6300 AM |
946 | *line = str; |
947 | return op_mask; | |
948 | } | |
949 | ||
dc191a8f NC |
950 | /* Parse instruction operands. |
951 | Return binary opcode. */ | |
952 | ||
953 | static unsigned int | |
954 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
955 | { | |
956 | char *op = opcode->constraints; | |
957 | unsigned int bin = opcode->bin_opcode; | |
958 | char *frag = frag_more (opcode->insn_size * 2); | |
959 | char *str = *line; | |
960 | int where = frag - frag_now->fr_literal; | |
961 | static unsigned int prev = 0; /* Previous opcode. */ | |
962 | ||
963 | /* Opcode have operands. */ | |
964 | if (*op) | |
965 | { | |
966 | unsigned int reg1 = 0; | |
967 | unsigned int reg2 = 0; | |
968 | int reg1_present = 0; | |
969 | int reg2_present = 0; | |
970 | ||
971 | /* Parse first operand. */ | |
972 | if (REGISTER_P (*op)) | |
973 | reg1_present = 1; | |
974 | reg1 = avr_operand (opcode, where, op, &str); | |
975 | ++op; | |
976 | ||
977 | /* Parse second operand. */ | |
978 | if (*op) | |
979 | { | |
980 | if (*op == ',') | |
981 | ++op; | |
982 | ||
983 | if (*op == '=') | |
984 | { | |
985 | reg2 = reg1; | |
986 | reg2_present = 1; | |
987 | } | |
988 | else | |
989 | { | |
990 | if (REGISTER_P (*op)) | |
991 | reg2_present = 1; | |
992 | ||
993 | str = skip_space (str); | |
994 | if (*str++ != ',') | |
995 | as_bad (_("`,' required")); | |
996 | str = skip_space (str); | |
997 | ||
998 | reg2 = avr_operand (opcode, where, op, &str); | |
999 | } | |
1000 | ||
1001 | if (reg1_present && reg2_present) | |
1002 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1003 | else if (reg2_present) | |
1004 | reg2 <<= 4; | |
1005 | } | |
1006 | if (reg1_present) | |
1007 | reg1 <<= 4; | |
1008 | bin |= reg1 | reg2; | |
1009 | } | |
1010 | ||
1011 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1012 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1013 | as_warn (_("undefined combination of operands")); | |
1014 | ||
1015 | if (opcode->insn_size == 2) | |
1016 | { | |
1017 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1018 | (AVR core bug, fixed in the newer devices). */ | |
1019 | if (!(avr_opt.no_skip_bug || | |
1020 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1021 | && AVR_SKIP_P (prev)) | |
1022 | as_warn (_("skipping two-word instruction")); | |
1023 | ||
1024 | bfd_putl32 ((bfd_vma) bin, frag); | |
1025 | } | |
1026 | else | |
1027 | bfd_putl16 ((bfd_vma) bin, frag); | |
1028 | ||
1029 | prev = bin; | |
1030 | *line = str; | |
1031 | return bin; | |
1032 | } | |
1033 | ||
adde6300 AM |
1034 | /* GAS will call this function for each section at the end of the assembly, |
1035 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1036 | |
adde6300 | 1037 | valueT |
dc191a8f | 1038 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1039 | { |
1040 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1041 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1042 | } | |
1043 | ||
1044 | /* If you define this macro, it should return the offset between the | |
1045 | address of a PC relative fixup and the position from which the PC | |
1046 | relative adjustment should be made. On many processors, the base | |
1047 | of a PC relative instruction is the next instruction, so this | |
1048 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1049 | |
adde6300 | 1050 | long |
dc191a8f | 1051 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1052 | { |
c6a7ab1f | 1053 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1054 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1055 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1056 | return 0; | |
1dab94dd | 1057 | |
adde6300 AM |
1058 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1059 | } | |
1060 | ||
1061 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
1062 | value in the object file. */ |
1063 | ||
94f592af | 1064 | void |
dc191a8f | 1065 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1066 | { |
1067 | unsigned char *where; | |
1068 | unsigned long insn; | |
a161fe53 | 1069 | long value = *valP; |
adde6300 | 1070 | |
94f592af NC |
1071 | if (fixP->fx_addsy == (symbolS *) NULL) |
1072 | fixP->fx_done = 1; | |
1073 | ||
87733541 AM |
1074 | else if (fixP->fx_pcrel) |
1075 | { | |
1076 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1077 | ||
1078 | if (s == seg || s == absolute_section) | |
1079 | { | |
1080 | value += S_GET_VALUE (fixP->fx_addsy); | |
1081 | fixP->fx_done = 1; | |
1082 | } | |
1083 | } | |
1084 | ||
a161fe53 AM |
1085 | /* We don't actually support subtracting a symbol. */ |
1086 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1087 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1088 | |
94f592af | 1089 | switch (fixP->fx_r_type) |
adde6300 AM |
1090 | { |
1091 | default: | |
94f592af | 1092 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1093 | break; |
1094 | case BFD_RELOC_AVR_7_PCREL: | |
1095 | case BFD_RELOC_AVR_13_PCREL: | |
1096 | case BFD_RELOC_32: | |
1097 | case BFD_RELOC_16: | |
1098 | case BFD_RELOC_AVR_CALL: | |
1099 | break; | |
1100 | } | |
1101 | ||
94f592af | 1102 | if (fixP->fx_done) |
adde6300 AM |
1103 | { |
1104 | /* Fetch the instruction, insert the fully resolved operand | |
1105 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1106 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1107 | insn = bfd_getl16 (where); |
1108 | ||
94f592af | 1109 | switch (fixP->fx_r_type) |
adde6300 AM |
1110 | { |
1111 | case BFD_RELOC_AVR_7_PCREL: | |
1112 | if (value & 1) | |
94f592af | 1113 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1114 | _("odd address operand: %ld"), value); |
1dab94dd | 1115 | |
adde6300 AM |
1116 | /* Instruction addresses are always right-shifted by 1. */ |
1117 | value >>= 1; | |
1118 | --value; /* Correct PC. */ | |
1dab94dd | 1119 | |
adde6300 | 1120 | if (value < -64 || value > 63) |
94f592af | 1121 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1122 | _("operand out of range: %ld"), value); |
1123 | value = (value << 3) & 0x3f8; | |
1124 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1125 | break; | |
1126 | ||
1127 | case BFD_RELOC_AVR_13_PCREL: | |
1128 | if (value & 1) | |
94f592af | 1129 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1130 | _("odd address operand: %ld"), value); |
1dab94dd | 1131 | |
adde6300 AM |
1132 | /* Instruction addresses are always right-shifted by 1. */ |
1133 | value >>= 1; | |
1134 | --value; /* Correct PC. */ | |
adde6300 AM |
1135 | |
1136 | if (value < -2048 || value > 2047) | |
1137 | { | |
65aa24b6 | 1138 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1139 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1140 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1141 | _("operand out of range: %ld"), value); |
1142 | } | |
1143 | ||
1144 | value &= 0xfff; | |
1145 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1146 | break; | |
1147 | ||
1148 | case BFD_RELOC_32: | |
1149 | bfd_putl16 ((bfd_vma) value, where); | |
1150 | break; | |
1151 | ||
1152 | case BFD_RELOC_16: | |
1153 | bfd_putl16 ((bfd_vma) value, where); | |
1154 | break; | |
1155 | ||
1156 | case BFD_RELOC_AVR_16_PM: | |
c6a7ab1f | 1157 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1158 | break; |
1159 | ||
750bce0e NC |
1160 | case BFD_RELOC_AVR_LDI: |
1161 | if (value > 255) | |
1162 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1163 | _("operand out of range: %ld"), value); | |
1164 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1165 | break; | |
1166 | ||
1167 | case BFD_RELOC_AVR_6: | |
1168 | if ((value > 63) || (value < 0)) | |
1169 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1170 | _("operand out of range: %ld"), value); | |
1171 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1172 | break; | |
1173 | ||
1174 | case BFD_RELOC_AVR_6_ADIW: | |
1175 | if ((value > 63) || (value < 0)) | |
1176 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1177 | _("operand out of range: %ld"), value); | |
1178 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1179 | break; | |
1180 | ||
adde6300 AM |
1181 | case BFD_RELOC_AVR_LO8_LDI: |
1182 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1183 | break; | |
1184 | ||
adde6300 AM |
1185 | case BFD_RELOC_AVR_HI8_LDI: |
1186 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1187 | break; | |
1188 | ||
df406460 | 1189 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1190 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1191 | break; | |
1192 | ||
1193 | case BFD_RELOC_AVR_HH8_LDI: | |
1194 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1195 | break; | |
1196 | ||
1197 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1198 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1199 | break; | |
1200 | ||
adde6300 AM |
1201 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1202 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1203 | break; | |
1204 | ||
df406460 | 1205 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1206 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1207 | break; | |
1208 | ||
1209 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1210 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1211 | break; | |
1212 | ||
1213 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1214 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1215 | break; | |
1216 | ||
1217 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1218 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1219 | break; | |
1220 | ||
1221 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1222 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1223 | break; | |
1224 | ||
1225 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1226 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1227 | break; | |
1228 | ||
1229 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1230 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1231 | break; | |
1232 | ||
1233 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1234 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1235 | break; | |
1236 | ||
1237 | case BFD_RELOC_AVR_CALL: | |
1238 | { | |
1239 | unsigned long x; | |
1dab94dd | 1240 | |
adde6300 AM |
1241 | x = bfd_getl16 (where); |
1242 | if (value & 1) | |
94f592af | 1243 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1244 | _("odd address operand: %ld"), value); |
1245 | value >>= 1; | |
1246 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1247 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1248 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1249 | } |
1250 | break; | |
1251 | ||
1252 | default: | |
c6a7ab1f | 1253 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1254 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1255 | break; |
1256 | } | |
1257 | } | |
1258 | else | |
1259 | { | |
a61a9fbc | 1260 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1261 | { |
1262 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1263 | case -BFD_RELOC_AVR_HI8_LDI: | |
1264 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1265 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1266 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1267 | _("only constant expression allowed")); |
94f592af | 1268 | fixP->fx_done = 1; |
adde6300 AM |
1269 | break; |
1270 | default: | |
1271 | break; | |
1272 | } | |
adde6300 | 1273 | } |
adde6300 AM |
1274 | } |
1275 | ||
7be1c489 AM |
1276 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1277 | to `bfd_install_relocation'. This currently works poorly, as | |
1278 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1279 | `tc_gen_reloc' have been written to work around the problems, which | |
1280 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1281 | |
1282 | /* If while processing a fixup, a reloc really needs to be created | |
1283 | then it is done here. */ | |
1284 | ||
1285 | arelent * | |
dc191a8f NC |
1286 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1287 | fixS *fixp) | |
adde6300 AM |
1288 | { |
1289 | arelent *reloc; | |
1290 | ||
df406460 NC |
1291 | if (fixp->fx_addsy && fixp->fx_subsy) |
1292 | { | |
1293 | long value = 0; | |
1294 | ||
1295 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) | |
1296 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1297 | { | |
1298 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1299 | "Difference of symbols in different sections is not supported"); | |
1300 | return NULL; | |
1301 | } | |
1302 | ||
28c9d252 | 1303 | /* We are dealing with two symbols defined in the same section. |
df406460 NC |
1304 | Let us fix-up them here. */ |
1305 | value += S_GET_VALUE (fixp->fx_addsy); | |
1306 | value -= S_GET_VALUE (fixp->fx_subsy); | |
1307 | ||
1308 | /* When fx_addsy and fx_subsy both are zero, md_apply_fix | |
1309 | only takes it's second operands for the fixup value. */ | |
1310 | fixp->fx_addsy = NULL; | |
1311 | fixp->fx_subsy = NULL; | |
1312 | md_apply_fix (fixp, (valueT *) &value, NULL); | |
1313 | ||
1314 | return NULL; | |
1315 | } | |
1316 | ||
dc191a8f | 1317 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1318 | |
dc191a8f | 1319 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1320 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1321 | ||
1322 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1323 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1324 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1325 | { | |
1326 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1327 | _("reloc %d not supported by object file format"), |
1328 | (int) fixp->fx_r_type); | |
adde6300 AM |
1329 | return NULL; |
1330 | } | |
1331 | ||
1332 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1333 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1334 | reloc->address = fixp->fx_offset; | |
1335 | ||
1336 | reloc->addend = fixp->fx_offset; | |
1337 | ||
1338 | return reloc; | |
1339 | } | |
1340 | ||
adde6300 | 1341 | void |
dc191a8f | 1342 | md_assemble (char *str) |
adde6300 | 1343 | { |
c6a7ab1f | 1344 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1345 | char op[11]; |
1346 | ||
c6a7ab1f | 1347 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1348 | |
1349 | if (!op[0]) | |
00d2865b | 1350 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1351 | |
1352 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1353 | ||
1354 | if (opcode == NULL) | |
1355 | { | |
00d2865b | 1356 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1357 | return; |
1358 | } | |
1359 | ||
b170af93 | 1360 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1361 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1362 | |
1188e082 DC |
1363 | if (*str && *opcode->constraints == '?') |
1364 | ++opcode; | |
b170af93 | 1365 | |
00d2865b NC |
1366 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1367 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 | 1368 | |
d4f4f3fb AM |
1369 | dwarf2_emit_insn (0); |
1370 | ||
adde6300 AM |
1371 | /* We used to set input_line_pointer to the result of get_operands, |
1372 | but that is wrong. Our caller assumes we don't change it. */ | |
1373 | { | |
1374 | char *t = input_line_pointer; | |
dc191a8f | 1375 | |
adde6300 | 1376 | avr_operands (opcode, &str); |
b170af93 | 1377 | if (*skip_space (str)) |
00d2865b | 1378 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1379 | input_line_pointer = t; |
1380 | } | |
1381 | } | |
1382 | ||
adde6300 | 1383 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and |
c6a7ab1f | 1384 | `avr_cons_fix_new'. */ |
adde6300 AM |
1385 | static int exp_mod_pm = 0; |
1386 | ||
1387 | /* Parse special CONS expression: pm (expression) | |
28c9d252 NC |
1388 | or alternatively: gs (expression). |
1389 | These are used for addressing program memory. | |
c6a7ab1f NC |
1390 | Relocation: BFD_RELOC_AVR_16_PM. */ |
1391 | ||
adde6300 | 1392 | void |
dc191a8f | 1393 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1394 | { |
c6a7ab1f | 1395 | char *tmp; |
adde6300 AM |
1396 | |
1397 | exp_mod_pm = 0; | |
1398 | ||
1399 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1400 | ||
1401 | if (nbytes == 2) | |
1402 | { | |
28c9d252 NC |
1403 | char *pm_name1 = "pm"; |
1404 | char *pm_name2 = "gs"; | |
1405 | int len = strlen (pm_name1); | |
1406 | /* len must be the same for both pm identifiers. */ | |
1dab94dd | 1407 | |
28c9d252 NC |
1408 | if (strncasecmp (input_line_pointer, pm_name1, len) == 0 |
1409 | || strncasecmp (input_line_pointer, pm_name2, len) == 0) | |
adde6300 AM |
1410 | { |
1411 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1412 | |
adde6300 AM |
1413 | if (*input_line_pointer == '(') |
1414 | { | |
1415 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1416 | exp_mod_pm = 1; | |
1417 | expression (exp); | |
1dab94dd | 1418 | |
adde6300 AM |
1419 | if (*input_line_pointer == ')') |
1420 | ++input_line_pointer; | |
1421 | else | |
1422 | { | |
00d2865b | 1423 | as_bad (_("`)' required")); |
adde6300 AM |
1424 | exp_mod_pm = 0; |
1425 | } | |
1dab94dd | 1426 | |
adde6300 AM |
1427 | return; |
1428 | } | |
1dab94dd | 1429 | |
adde6300 AM |
1430 | input_line_pointer = tmp; |
1431 | } | |
1432 | } | |
1dab94dd | 1433 | |
adde6300 AM |
1434 | expression (exp); |
1435 | } | |
1436 | ||
1437 | void | |
dc191a8f NC |
1438 | avr_cons_fix_new (fragS *frag, |
1439 | int where, | |
1440 | int nbytes, | |
1441 | expressionS *exp) | |
adde6300 AM |
1442 | { |
1443 | if (exp_mod_pm == 0) | |
1444 | { | |
1445 | if (nbytes == 2) | |
b34976b6 | 1446 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1447 | else if (nbytes == 4) |
b34976b6 | 1448 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1449 | else |
00d2865b | 1450 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1451 | } |
1452 | else | |
1453 | { | |
1454 | if (nbytes == 2) | |
b34976b6 | 1455 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); |
adde6300 | 1456 | else |
00d2865b | 1457 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1458 | exp_mod_pm = 0; |
1459 | } | |
1460 | } |