Commit | Line | Data |
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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
4b95cf5c | 3 | Copyright (C) 1999-2014 Free Software Foundation, Inc. |
adde6300 AM |
4 | Contributed by Denis Chertykov <denisc@overta.ru> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 22 | |
adde6300 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
adde6300 | 25 | #include "subsegs.h" |
fb5b7503 | 26 | #include "dwarf2dbg.h" |
af3ecb4a RH |
27 | #include "dw2gencfi.h" |
28 | ||
adde6300 | 29 | |
1188e082 DC |
30 | struct avr_opcodes_s |
31 | { | |
dc191a8f NC |
32 | char * name; |
33 | char * constraints; | |
8cc66334 | 34 | char * opcode; |
dc191a8f NC |
35 | int insn_size; /* In words. */ |
36 | int isa; | |
37 | unsigned int bin_opcode; | |
1188e082 DC |
38 | }; |
39 | ||
40 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
8cc66334 | 41 | {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, |
1188e082 DC |
42 | |
43 | struct avr_opcodes_s avr_opcodes[] = | |
44 | { | |
45 | #include "opcode/avr.h" | |
8cc66334 | 46 | {NULL, NULL, NULL, 0, 0, 0} |
1188e082 DC |
47 | }; |
48 | ||
adde6300 AM |
49 | const char comment_chars[] = ";"; |
50 | const char line_comment_chars[] = "#"; | |
51 | const char line_separator_chars[] = "$"; | |
52 | ||
adde6300 AM |
53 | const char *md_shortopts = "m:"; |
54 | struct mcu_type_s | |
55 | { | |
56 | char *name; | |
57 | int isa; | |
58 | int mach; | |
59 | }; | |
60 | ||
1f8ae5e6 | 61 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 62 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 63 | |
adde6300 AM |
64 | static struct mcu_type_s mcu_types[] = |
65 | { | |
7b21ac3f EW |
66 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
67 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
99700d6f NC |
68 | but set to AVR_ISA_AVR25 for some following version |
69 | of GCC (from 4.3) for backward compatibility. */ | |
7b21ac3f EW |
70 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, |
71 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
99700d6f NC |
72 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, |
73 | but set to AVR_ISA_AVR3_ALL for some following version | |
7b21ac3f EW |
74 | of GCC (from 4.3) for backward compatibility. */ |
75 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
76 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
77 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
78 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
99700d6f NC |
79 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, |
80 | but set to AVR_ISA_AVR51 for some following version | |
7b21ac3f EW |
81 | of GCC (from 4.3) for backward compatibility. */ |
82 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
83 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
84 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
85 | {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1}, |
86 | {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
87 | {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3}, | |
88 | {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
89 | {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
90 | {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
91 | {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
28c9d252 | 92 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
93 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
94 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
95 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
96 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
97 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
98 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
100 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
101 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 102 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
103 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
104 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
105 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
106 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
107 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
108 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
255d9eec | 109 | {"ata5272", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
110 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, |
111 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
112 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 113 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 114 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
115 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
116 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 117 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 118 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 119 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 120 | {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
121 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, |
122 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
123 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
124 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 125 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 126 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 127 | {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 128 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 129 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 130 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
131 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
132 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
133 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
255d9eec | 134 | {"attiny828", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
135 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, |
136 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, | |
137 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
138 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
139 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
140 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
141 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, | |
142 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
255d9eec | 143 | {"ata5505", AVR_ISA_AVR35, bfd_mach_avr35}, |
11908008 EW |
144 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
145 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
146 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
255d9eec | 147 | {"attiny1634", AVR_ISA_AVR35, bfd_mach_avr35}, |
28c9d252 | 148 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
8be59acb | 149 | {"ata6289", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec DC |
150 | {"atmega8a", AVR_ISA_M8, bfd_mach_avr4}, |
151 | {"ata6285", AVR_ISA_AVR4, bfd_mach_avr4}, | |
152 | {"ata6286", AVR_ISA_AVR4, bfd_mach_avr4}, | |
7b21ac3f | 153 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 154 | {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec | 155 | {"atmega48pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f EW |
156 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, |
157 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
e760a81b | 158 | {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 159 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 160 | {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
28c9d252 NC |
161 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
162 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f EW |
163 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
164 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
165 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
166 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
167 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
168 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 169 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec DC |
170 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
171 | {"ata5790", AVR_ISA_AVR5, bfd_mach_avr5}, | |
172 | {"ata5795", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 173 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 174 | {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 175 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 176 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 177 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
e760a81b | 178 | {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 179 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 180 | {"atmega164pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 181 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 182 | {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 183 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 184 | {"atmega165pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 185 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 186 | {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 187 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 188 | {"atmega168pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 189 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 190 | {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 191 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 192 | {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 193 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 194 | {"atmega32a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 195 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 196 | {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 197 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 198 | {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 199 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 200 | {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 201 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 202 | {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 203 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 204 | {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 205 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 206 | {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 207 | {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
208 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, |
209 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 210 | {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 211 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 212 | {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 213 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 214 | {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 215 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 216 | {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 217 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec DC |
218 | {"atmega64rfr2", AVR_ISA_AVR5, bfd_mach_avr5}, |
219 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 220 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 221 | {"atmega64a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
222 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, |
223 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 224 | {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 225 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, |
8453da2e | 226 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 227 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
228 | {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5}, |
229 | {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 230 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
231 | {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5}, |
232 | {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 233 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
234 | {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5}, |
235 | {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 236 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
237 | {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5}, |
238 | {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
4d13caa0 NC |
239 | {"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, |
240 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 241 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 242 | {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 243 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 244 | {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
2b02f87c | 245 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 246 | {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
e760a81b | 247 | {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
248 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
249 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
b8c610a7 | 250 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
251 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, |
252 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
253 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
254 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
255 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 256 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
257 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
258 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 259 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 260 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
261 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
262 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 263 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 264 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
e760a81b | 265 | {"m3000", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 266 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
255d9eec | 267 | {"atmega128a", AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
268 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, |
269 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
255d9eec | 270 | {"atmega1284", AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f | 271 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, |
17f4880d | 272 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
4d13caa0 NC |
273 | {"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, |
274 | {"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, | |
7b21ac3f EW |
275 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
276 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
277 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
278 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, | |
279 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
4d13caa0 NC |
280 | {"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, |
281 | {"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 | 282 | {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
255d9eec DC |
283 | {"atxmega16a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, |
284 | {"atxmega16c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, | |
8cc66334 EW |
285 | {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
286 | {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
255d9eec DC |
287 | {"atxmega32a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, |
288 | {"atxmega32c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, | |
8cc66334 | 289 | {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
255d9eec DC |
290 | {"atxmega32e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
291 | {"atxmega16e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
292 | {"atxmega8e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 293 | {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 | 294 | {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
255d9eec DC |
295 | {"atxmega64a3u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, |
296 | {"atxmega64a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
297 | {"atxmega64b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
298 | {"atxmega64b3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
299 | {"atxmega64c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
8cc66334 | 300 | {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
255d9eec | 301 | {"atxmega64d4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
8cc66334 | 302 | {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, |
7bab7634 | 303 | {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5}, |
8cc66334 | 304 | {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec | 305 | {"atxmega128a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
7bab7634 | 306 | {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
255d9eec DC |
307 | {"atxmega128b3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
308 | {"atxmega128c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, | |
8cc66334 | 309 | {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec | 310 | {"atxmega128d4", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
8cc66334 | 311 | {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec DC |
312 | {"atxmega192a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
313 | {"atxmega192c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, | |
8cc66334 EW |
314 | {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
315 | {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
255d9eec | 316 | {"atxmega256a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
8cc66334 | 317 | {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
7bab7634 | 318 | {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
255d9eec | 319 | {"atxmega256c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
8cc66334 | 320 | {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec DC |
321 | {"atxmega384c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
322 | {"atxmega384d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
8cc66334 | 323 | {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, |
7bab7634 | 324 | {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
255d9eec | 325 | {"atxmega128a4u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
adde6300 AM |
326 | {NULL, 0, 0} |
327 | }; | |
328 | ||
af910977 | 329 | |
adde6300 | 330 | /* Current MCU type. */ |
7b21ac3f | 331 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
af910977 | 332 | static struct mcu_type_s specified_mcu; |
dc191a8f | 333 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 334 | |
00d2865b NC |
335 | /* AVR target-specific switches. */ |
336 | struct avr_opt_s | |
337 | { | |
dc191a8f NC |
338 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
339 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
340 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
341 | }; |
342 | ||
343 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
344 | ||
adde6300 AM |
345 | const char EXP_CHARS[] = "eE"; |
346 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
347 | |
348 | static void avr_set_arch (int); | |
adde6300 AM |
349 | |
350 | /* The target specific pseudo-ops which we support. */ | |
351 | const pseudo_typeS md_pseudo_table[] = | |
352 | { | |
353 | {"arch", avr_set_arch, 0}, | |
354 | { NULL, NULL, 0} | |
355 | }; | |
356 | ||
357 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 358 | |
dc191a8f NC |
359 | #define EXP_MOD_NAME(i) exp_mod[i].name |
360 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
361 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
362 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
363 | |
364 | struct exp_mod_s | |
365 | { | |
dc191a8f NC |
366 | char * name; |
367 | bfd_reloc_code_real_type reloc; | |
368 | bfd_reloc_code_real_type neg_reloc; | |
369 | int have_pm; | |
adde6300 AM |
370 | }; |
371 | ||
c6a7ab1f NC |
372 | static struct exp_mod_s exp_mod[] = |
373 | { | |
adde6300 AM |
374 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
375 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
376 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
377 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
378 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
379 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 | 380 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
e4efb665 | 381 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, |
adde6300 AM |
382 | }; |
383 | ||
8ad7c533 NC |
384 | /* A union used to store indicies into the exp_mod[] array |
385 | in a hash table which expects void * data types. */ | |
386 | typedef union | |
387 | { | |
388 | void * ptr; | |
389 | int index; | |
390 | } mod_index; | |
391 | ||
adde6300 AM |
392 | /* Opcode hash table. */ |
393 | static struct hash_control *avr_hash; | |
394 | ||
395 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
396 | static struct hash_control *avr_mod_hash; | |
397 | ||
00d2865b | 398 | #define OPTION_MMCU 'm' |
dc191a8f NC |
399 | enum options |
400 | { | |
401 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
402 | OPTION_NO_SKIP_BUG, | |
af910977 DC |
403 | OPTION_NO_WRAP, |
404 | OPTION_ISA_RMW | |
dc191a8f | 405 | }; |
adde6300 | 406 | |
c6a7ab1f NC |
407 | struct option md_longopts[] = |
408 | { | |
00d2865b NC |
409 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
410 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
411 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
412 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
af910977 | 413 | { "mrmw", no_argument, NULL, OPTION_ISA_RMW }, |
00d2865b | 414 | { NULL, no_argument, NULL, 0 } |
adde6300 | 415 | }; |
adde6300 | 416 | |
c6a7ab1f | 417 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
418 | |
419 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 420 | |
00d2865b | 421 | static void |
dc191a8f | 422 | show_mcu_list (FILE *stream) |
00d2865b NC |
423 | { |
424 | int i, x; | |
425 | ||
426 | fprintf (stream, _("Known MCU names:")); | |
427 | x = 1000; | |
1dab94dd | 428 | |
00d2865b NC |
429 | for (i = 0; mcu_types[i].name; i++) |
430 | { | |
431 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 432 | |
00d2865b | 433 | x += len + 1; |
1dab94dd | 434 | |
00d2865b | 435 | if (x < 75) |
c6a7ab1f | 436 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
437 | else |
438 | { | |
439 | fprintf (stream, "\n %s", mcu_types[i].name); | |
440 | x = len + 2; | |
441 | } | |
442 | } | |
1dab94dd | 443 | |
c6a7ab1f | 444 | fprintf (stream, "\n"); |
00d2865b NC |
445 | } |
446 | ||
adde6300 | 447 | static inline char * |
dc191a8f | 448 | skip_space (char *s) |
adde6300 AM |
449 | { |
450 | while (*s == ' ' || *s == '\t') | |
451 | ++s; | |
452 | return s; | |
453 | } | |
454 | ||
455 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 456 | |
adde6300 AM |
457 | static char * |
458 | extract_word (char *from, char *to, int limit) | |
459 | { | |
adde6300 AM |
460 | char *op_end; |
461 | int size = 0; | |
462 | ||
463 | /* Drop leading whitespace. */ | |
464 | from = skip_space (from); | |
465 | *to = 0; | |
c6a7ab1f | 466 | |
adde6300 | 467 | /* Find the op code end. */ |
87975d2a | 468 | for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
469 | { |
470 | to[size++] = *op_end++; | |
471 | if (size + 1 >= limit) | |
472 | break; | |
473 | } | |
1dab94dd | 474 | |
adde6300 AM |
475 | to[size] = 0; |
476 | return op_end; | |
477 | } | |
478 | ||
479 | int | |
dc191a8f NC |
480 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
481 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
482 | { |
483 | abort (); | |
484 | return 0; | |
485 | } | |
486 | ||
487 | void | |
dc191a8f | 488 | md_show_usage (FILE *stream) |
adde6300 | 489 | { |
00d2865b | 490 | fprintf (stream, |
4fb8d1c6 | 491 | _("AVR Assembler options:\n" |
adde6300 AM |
492 | " -mmcu=[avr-name] select microcontroller variant\n" |
493 | " [avr-name] can be:\n" | |
7b21ac3f EW |
494 | " avr1 - classic AVR core without data RAM\n" |
495 | " avr2 - classic AVR core with up to 8K program memory\n" | |
496 | " avr25 - classic AVR core with up to 8K program memory\n" | |
497 | " plus the MOVW instruction\n" | |
498 | " avr3 - classic AVR core with up to 64K program memory\n" | |
499 | " avr31 - classic AVR core with up to 128K program memory\n" | |
500 | " avr35 - classic AVR core with up to 64K program memory\n" | |
501 | " plus the MOVW instruction\n" | |
502 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
503 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
504 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
505 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
8c997c27 | 506 | " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n" |
8cc66334 EW |
507 | " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n" |
508 | " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n" | |
509 | " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n" | |
510 | " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n" | |
511 | " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n" | |
adde6300 | 512 | " or immediate microcontroller name.\n")); |
00d2865b NC |
513 | fprintf (stream, |
514 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
515 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
516 | " (default for avr4, avr5)\n" | |
517 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
af910977 DC |
518 | " (default for avr3, avr5)\n" |
519 | " -mrmw accept Read-Modify-Write instructions\n" | |
520 | )); | |
00d2865b | 521 | show_mcu_list (stream); |
adde6300 AM |
522 | } |
523 | ||
524 | static void | |
dc191a8f | 525 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 526 | { |
dc191a8f | 527 | char str[20]; |
1dab94dd | 528 | |
adde6300 | 529 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 530 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
531 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
532 | } | |
533 | ||
534 | int | |
dc191a8f | 535 | md_parse_option (int c, char *arg) |
adde6300 | 536 | { |
00d2865b | 537 | switch (c) |
adde6300 | 538 | { |
00d2865b NC |
539 | case OPTION_MMCU: |
540 | { | |
541 | int i; | |
542 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 543 | |
00d2865b NC |
544 | { |
545 | char *t = s; | |
546 | char *arg1 = arg; | |
547 | ||
548 | do | |
3882b010 | 549 | *t = TOLOWER (*arg1++); |
00d2865b NC |
550 | while (*t++); |
551 | } | |
552 | ||
553 | for (i = 0; mcu_types[i].name; ++i) | |
554 | if (strcmp (mcu_types[i].name, s) == 0) | |
555 | break; | |
adde6300 | 556 | |
00d2865b NC |
557 | if (!mcu_types[i].name) |
558 | { | |
559 | show_mcu_list (stderr); | |
560 | as_fatal (_("unknown MCU: %s\n"), arg); | |
561 | } | |
65aa24b6 | 562 | |
00d2865b NC |
563 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
564 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
565 | as .arch ... in the asm output at the same time. */ | |
00d2865b | 566 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
af910977 DC |
567 | { |
568 | specified_mcu.name = mcu_types[i].name; | |
569 | specified_mcu.isa |= mcu_types[i].isa; | |
570 | specified_mcu.mach = mcu_types[i].mach; | |
571 | avr_mcu = &specified_mcu; | |
572 | } | |
00d2865b NC |
573 | else |
574 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
575 | avr_mcu->name, mcu_types[i].name); | |
576 | return 1; | |
577 | } | |
578 | case OPTION_ALL_OPCODES: | |
579 | avr_opt.all_opcodes = 1; | |
580 | return 1; | |
581 | case OPTION_NO_SKIP_BUG: | |
582 | avr_opt.no_skip_bug = 1; | |
583 | return 1; | |
584 | case OPTION_NO_WRAP: | |
585 | avr_opt.no_wrap = 1; | |
adde6300 | 586 | return 1; |
af910977 DC |
587 | case OPTION_ISA_RMW: |
588 | specified_mcu.isa |= AVR_ISA_RMW; | |
589 | return 1; | |
adde6300 | 590 | } |
1dab94dd | 591 | |
adde6300 AM |
592 | return 0; |
593 | } | |
594 | ||
595 | symbolS * | |
dc191a8f | 596 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 597 | { |
dc191a8f | 598 | return NULL; |
adde6300 AM |
599 | } |
600 | ||
adde6300 | 601 | char * |
dc191a8f | 602 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 603 | { |
499ac353 | 604 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
605 | } |
606 | ||
607 | void | |
dc191a8f NC |
608 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
609 | asection *sec ATTRIBUTE_UNUSED, | |
610 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
611 | { |
612 | abort (); | |
613 | } | |
614 | ||
adde6300 | 615 | void |
dc191a8f | 616 | md_begin (void) |
adde6300 | 617 | { |
df136245 | 618 | unsigned int i; |
adde6300 | 619 | struct avr_opcodes_s *opcode; |
dc191a8f | 620 | |
c6a7ab1f | 621 | avr_hash = hash_new (); |
adde6300 AM |
622 | |
623 | /* Insert unique names into hash table. This hash table then provides a | |
624 | quick index to the first opcode with a particular name in the opcode | |
625 | table. */ | |
adde6300 AM |
626 | for (opcode = avr_opcodes; opcode->name; opcode++) |
627 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
628 | ||
629 | avr_mod_hash = hash_new (); | |
630 | ||
dc191a8f | 631 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
632 | { |
633 | mod_index m; | |
634 | ||
635 | m.index = i + 10; | |
636 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
637 | } | |
c6a7ab1f | 638 | |
adde6300 AM |
639 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
640 | } | |
641 | ||
df136245 | 642 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 643 | If result greater than MAX then error. */ |
df136245 DC |
644 | |
645 | static unsigned int | |
dc191a8f | 646 | avr_get_constant (char *str, int max) |
df136245 DC |
647 | { |
648 | expressionS ex; | |
dc191a8f | 649 | |
df136245 DC |
650 | str = skip_space (str); |
651 | input_line_pointer = str; | |
dc191a8f | 652 | expression (& ex); |
df136245 DC |
653 | |
654 | if (ex.X_op != O_constant) | |
655 | as_bad (_("constant value required")); | |
656 | ||
657 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 658 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 659 | |
df136245 DC |
660 | return ex.X_add_number; |
661 | } | |
662 | ||
dc191a8f | 663 | /* Parse for ldd/std offset. */ |
df136245 | 664 | |
dc191a8f NC |
665 | static void |
666 | avr_offset_expression (expressionS *exp) | |
adde6300 | 667 | { |
dc191a8f NC |
668 | char *str = input_line_pointer; |
669 | char *tmp; | |
670 | char op[8]; | |
adde6300 | 671 | |
dc191a8f NC |
672 | tmp = str; |
673 | str = extract_word (str, op, sizeof (op)); | |
674 | ||
675 | input_line_pointer = tmp; | |
676 | expression (exp); | |
677 | ||
678 | /* Warn about expressions that fail to use lo8 (). */ | |
679 | if (exp->X_op == O_constant) | |
adde6300 | 680 | { |
dc191a8f | 681 | int x = exp->X_add_number; |
28c9d252 | 682 | |
dc191a8f NC |
683 | if (x < -255 || x > 255) |
684 | as_warn (_("constant out of 8-bit range: %d"), x); | |
685 | } | |
686 | } | |
adde6300 | 687 | |
dc191a8f | 688 | /* Parse ordinary expression. */ |
adde6300 | 689 | |
dc191a8f NC |
690 | static char * |
691 | parse_exp (char *s, expressionS *op) | |
692 | { | |
693 | input_line_pointer = s; | |
694 | expression (op); | |
695 | if (op->X_op == O_absent) | |
696 | as_bad (_("missing operand")); | |
697 | return input_line_pointer; | |
698 | } | |
1dab94dd | 699 | |
dc191a8f NC |
700 | /* Parse special expressions (needed for LDI command): |
701 | xx8 (address) | |
702 | xx8 (-address) | |
703 | pm_xx8 (address) | |
704 | pm_xx8 (-address) | |
705 | where xx is: hh, hi, lo. */ | |
adde6300 | 706 | |
dc191a8f NC |
707 | static bfd_reloc_code_real_type |
708 | avr_ldi_expression (expressionS *exp) | |
709 | { | |
710 | char *str = input_line_pointer; | |
711 | char *tmp; | |
712 | char op[8]; | |
713 | int mod; | |
28c9d252 NC |
714 | int linker_stubs_should_be_generated = 0; |
715 | ||
dc191a8f | 716 | tmp = str; |
adde6300 | 717 | |
dc191a8f | 718 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 719 | |
dc191a8f NC |
720 | if (op[0]) |
721 | { | |
8ad7c533 | 722 | mod_index m; |
28c9d252 | 723 | |
8ad7c533 NC |
724 | m.ptr = hash_find (avr_mod_hash, op); |
725 | mod = m.index; | |
1dab94dd | 726 | |
dc191a8f NC |
727 | if (mod) |
728 | { | |
729 | int closes = 0; | |
b170af93 | 730 | |
dc191a8f NC |
731 | mod -= 10; |
732 | str = skip_space (str); | |
00d2865b | 733 | |
dc191a8f NC |
734 | if (*str == '(') |
735 | { | |
28c9d252 | 736 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 737 | int neg_p = 0; |
00d2865b | 738 | |
dc191a8f | 739 | ++str; |
00d2865b | 740 | |
dc191a8f | 741 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
742 | || strncmp ("gs(",str,3) == 0 |
743 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
744 | || strncmp ("-(pm(", str, 5) == 0) |
745 | { | |
746 | if (HAVE_PM_P (mod)) | |
747 | { | |
748 | ++mod; | |
749 | ++closes; | |
750 | } | |
751 | else | |
752 | as_bad (_("illegal expression")); | |
b170af93 | 753 | |
28c9d252 NC |
754 | if (str[0] == 'g' || str[2] == 'g') |
755 | linker_stubs_should_be_generated = 1; | |
756 | ||
dc191a8f NC |
757 | if (*str == '-') |
758 | { | |
759 | neg_p = 1; | |
760 | ++closes; | |
761 | str += 5; | |
762 | } | |
763 | else | |
764 | str += 3; | |
765 | } | |
adde6300 | 766 | |
dc191a8f NC |
767 | if (*str == '-' && *(str + 1) == '(') |
768 | { | |
769 | neg_p ^= 1; | |
770 | ++closes; | |
771 | str += 2; | |
772 | } | |
750bce0e | 773 | |
dc191a8f NC |
774 | input_line_pointer = str; |
775 | expression (exp); | |
750bce0e | 776 | |
dc191a8f NC |
777 | do |
778 | { | |
779 | if (*input_line_pointer != ')') | |
780 | { | |
781 | as_bad (_("`)' required")); | |
782 | break; | |
783 | } | |
784 | input_line_pointer++; | |
785 | } | |
786 | while (closes--); | |
787 | ||
28c9d252 NC |
788 | reloc_to_return = |
789 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
790 | if (linker_stubs_should_be_generated) | |
791 | { | |
792 | switch (reloc_to_return) | |
793 | { | |
794 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
795 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
796 | break; | |
797 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
798 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
799 | break; | |
800 | ||
801 | default: | |
0a903bab NC |
802 | /* PR 5523: Do not generate a warning here, |
803 | legitimate code can trigger this case. */ | |
804 | break; | |
28c9d252 NC |
805 | } |
806 | } | |
807 | return reloc_to_return; | |
dc191a8f NC |
808 | } |
809 | } | |
810 | } | |
750bce0e NC |
811 | |
812 | input_line_pointer = tmp; | |
813 | expression (exp); | |
814 | ||
815 | /* Warn about expressions that fail to use lo8 (). */ | |
816 | if (exp->X_op == O_constant) | |
817 | { | |
818 | int x = exp->X_add_number; | |
dc191a8f | 819 | |
750bce0e NC |
820 | if (x < -255 || x > 255) |
821 | as_warn (_("constant out of 8-bit range: %d"), x); | |
822 | } | |
dc191a8f NC |
823 | |
824 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
825 | } |
826 | ||
df136245 | 827 | /* Parse one instruction operand. |
c6a7ab1f NC |
828 | Return operand bitmask. Also fixups can be generated. */ |
829 | ||
adde6300 | 830 | static unsigned int |
dc191a8f NC |
831 | avr_operand (struct avr_opcodes_s *opcode, |
832 | int where, | |
833 | char *op, | |
834 | char **line) | |
adde6300 | 835 | { |
adde6300 | 836 | expressionS op_expr; |
df136245 DC |
837 | unsigned int op_mask = 0; |
838 | char *str = skip_space (*line); | |
adde6300 | 839 | |
adde6300 AM |
840 | switch (*op) |
841 | { | |
842 | /* Any register operand. */ | |
843 | case 'w': | |
844 | case 'd': | |
845 | case 'r': | |
b170af93 DC |
846 | case 'a': |
847 | case 'v': | |
c6a7ab1f NC |
848 | if (*str == 'r' || *str == 'R') |
849 | { | |
850 | char r_name[20]; | |
1dab94dd | 851 | |
c6a7ab1f | 852 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 853 | op_mask = 0xff; |
3882b010 | 854 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
855 | { |
856 | if (r_name[2] == '\0') | |
857 | op_mask = r_name[1] - '0'; | |
858 | else if (r_name[1] != '0' | |
3882b010 | 859 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
860 | && r_name[3] == '\0') |
861 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
862 | } | |
863 | } | |
864 | else | |
865 | { | |
866 | op_mask = avr_get_constant (str, 31); | |
867 | str = input_line_pointer; | |
868 | } | |
1dab94dd | 869 | |
c6a7ab1f NC |
870 | if (op_mask <= 31) |
871 | { | |
872 | switch (*op) | |
873 | { | |
874 | case 'a': | |
875 | if (op_mask < 16 || op_mask > 23) | |
876 | as_bad (_("register r16-r23 required")); | |
877 | op_mask -= 16; | |
878 | break; | |
1dab94dd | 879 | |
c6a7ab1f NC |
880 | case 'd': |
881 | if (op_mask < 16) | |
882 | as_bad (_("register number above 15 required")); | |
883 | op_mask -= 16; | |
884 | break; | |
1dab94dd | 885 | |
c6a7ab1f NC |
886 | case 'v': |
887 | if (op_mask & 1) | |
888 | as_bad (_("even register number required")); | |
889 | op_mask >>= 1; | |
890 | break; | |
1dab94dd | 891 | |
c6a7ab1f | 892 | case 'w': |
65b1d096 | 893 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 894 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 895 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
896 | break; |
897 | } | |
898 | break; | |
899 | } | |
900 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
901 | break; |
902 | ||
903 | case 'e': | |
904 | { | |
905 | char c; | |
1dab94dd | 906 | |
adde6300 AM |
907 | if (*str == '-') |
908 | { | |
c6a7ab1f | 909 | str = skip_space (str + 1); |
adde6300 AM |
910 | op_mask = 0x1002; |
911 | } | |
3882b010 | 912 | c = TOLOWER (*str); |
adde6300 AM |
913 | if (c == 'x') |
914 | op_mask |= 0x100c; | |
915 | else if (c == 'y') | |
916 | op_mask |= 0x8; | |
917 | else if (c != 'z') | |
00d2865b | 918 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 919 | |
c6a7ab1f | 920 | str = skip_space (str + 1); |
adde6300 AM |
921 | if (*str == '+') |
922 | { | |
923 | ++str; | |
924 | if (op_mask & 2) | |
00d2865b | 925 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
926 | op_mask |= 0x1001; |
927 | } | |
e38c9cc2 | 928 | |
1188e082 | 929 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 930 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
931 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
932 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
933 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
934 | } |
935 | break; | |
936 | ||
b170af93 | 937 | case 'z': |
c6a7ab1f NC |
938 | if (*str == '-') |
939 | as_bad (_("can't predecrement")); | |
1dab94dd | 940 | |
c6a7ab1f NC |
941 | if (! (*str == 'z' || *str == 'Z')) |
942 | as_bad (_("pointer register Z required")); | |
1dab94dd | 943 | |
c6a7ab1f NC |
944 | str = skip_space (str + 1); |
945 | ||
946 | if (*str == '+') | |
947 | { | |
948 | ++str; | |
8cc66334 EW |
949 | char *s; |
950 | for (s = opcode->opcode; *s; ++s) | |
951 | { | |
952 | if (*s == '+') | |
953 | op_mask |= (1 << (15 - (s - opcode->opcode))); | |
954 | } | |
c6a7ab1f | 955 | } |
d669d37f NC |
956 | |
957 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
958 | if (!avr_opt.all_opcodes | |
959 | && (op_mask & 0x0001) | |
960 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
961 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
962 | break; |
963 | ||
adde6300 AM |
964 | case 'b': |
965 | { | |
3882b010 | 966 | char c = TOLOWER (*str++); |
1dab94dd | 967 | |
adde6300 AM |
968 | if (c == 'y') |
969 | op_mask |= 0x8; | |
970 | else if (c != 'z') | |
00d2865b | 971 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
972 | str = skip_space (str); |
973 | if (*str++ == '+') | |
974 | { | |
750bce0e NC |
975 | input_line_pointer = str; |
976 | avr_offset_expression (& op_expr); | |
adde6300 | 977 | str = input_line_pointer; |
750bce0e NC |
978 | fix_new_exp (frag_now, where, 3, |
979 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
980 | } |
981 | } | |
982 | break; | |
983 | ||
984 | case 'h': | |
c6a7ab1f NC |
985 | str = parse_exp (str, &op_expr); |
986 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 987 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
988 | break; |
989 | ||
990 | case 'L': | |
c6a7ab1f NC |
991 | str = parse_exp (str, &op_expr); |
992 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 993 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
994 | break; |
995 | ||
996 | case 'l': | |
c6a7ab1f NC |
997 | str = parse_exp (str, &op_expr); |
998 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 999 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
1000 | break; |
1001 | ||
1002 | case 'i': | |
c6a7ab1f NC |
1003 | str = parse_exp (str, &op_expr); |
1004 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 1005 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
1006 | break; |
1007 | ||
1008 | case 'M': | |
1009 | { | |
1010 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 1011 | |
c6a7ab1f NC |
1012 | input_line_pointer = str; |
1013 | r_type = avr_ldi_expression (&op_expr); | |
1014 | str = input_line_pointer; | |
adde6300 | 1015 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 1016 | &op_expr, FALSE, r_type); |
adde6300 AM |
1017 | } |
1018 | break; | |
1019 | ||
1020 | case 'n': | |
1021 | { | |
1022 | unsigned int x; | |
1dab94dd | 1023 | |
adde6300 AM |
1024 | x = ~avr_get_constant (str, 255); |
1025 | str = input_line_pointer; | |
1026 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
1027 | } | |
1028 | break; | |
1029 | ||
1030 | case 'K': | |
750bce0e NC |
1031 | input_line_pointer = str; |
1032 | avr_offset_expression (& op_expr); | |
1033 | str = input_line_pointer; | |
1034 | fix_new_exp (frag_now, where, 3, | |
1035 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
1036 | break; |
1037 | ||
1038 | case 'S': | |
1039 | case 's': | |
1040 | { | |
1041 | unsigned int x; | |
1dab94dd | 1042 | |
adde6300 AM |
1043 | x = avr_get_constant (str, 7); |
1044 | str = input_line_pointer; | |
1045 | if (*op == 'S') | |
1046 | x <<= 4; | |
1047 | op_mask |= x; | |
1048 | } | |
1049 | break; | |
1050 | ||
1051 | case 'P': | |
1052 | { | |
1053 | unsigned int x; | |
1dab94dd | 1054 | |
adde6300 AM |
1055 | x = avr_get_constant (str, 63); |
1056 | str = input_line_pointer; | |
1057 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
1058 | } | |
1059 | break; | |
1060 | ||
1061 | case 'p': | |
1062 | { | |
1063 | unsigned int x; | |
1dab94dd | 1064 | |
adde6300 AM |
1065 | x = avr_get_constant (str, 31); |
1066 | str = input_line_pointer; | |
1067 | op_mask |= x << 3; | |
1068 | } | |
1069 | break; | |
1dab94dd | 1070 | |
8cc66334 EW |
1071 | case 'E': |
1072 | { | |
1073 | unsigned int x; | |
1074 | ||
1075 | x = avr_get_constant (str, 15); | |
1076 | str = input_line_pointer; | |
1077 | op_mask |= (x << 4); | |
1078 | } | |
1079 | break; | |
99700d6f | 1080 | |
1188e082 DC |
1081 | case '?': |
1082 | break; | |
1dab94dd | 1083 | |
adde6300 | 1084 | default: |
00d2865b | 1085 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 1086 | } |
1dab94dd | 1087 | |
adde6300 AM |
1088 | *line = str; |
1089 | return op_mask; | |
1090 | } | |
1091 | ||
dc191a8f NC |
1092 | /* Parse instruction operands. |
1093 | Return binary opcode. */ | |
1094 | ||
1095 | static unsigned int | |
1096 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
1097 | { | |
1098 | char *op = opcode->constraints; | |
1099 | unsigned int bin = opcode->bin_opcode; | |
1100 | char *frag = frag_more (opcode->insn_size * 2); | |
1101 | char *str = *line; | |
1102 | int where = frag - frag_now->fr_literal; | |
1103 | static unsigned int prev = 0; /* Previous opcode. */ | |
1104 | ||
1105 | /* Opcode have operands. */ | |
1106 | if (*op) | |
1107 | { | |
1108 | unsigned int reg1 = 0; | |
1109 | unsigned int reg2 = 0; | |
1110 | int reg1_present = 0; | |
1111 | int reg2_present = 0; | |
1112 | ||
1113 | /* Parse first operand. */ | |
1114 | if (REGISTER_P (*op)) | |
1115 | reg1_present = 1; | |
1116 | reg1 = avr_operand (opcode, where, op, &str); | |
1117 | ++op; | |
1118 | ||
1119 | /* Parse second operand. */ | |
1120 | if (*op) | |
1121 | { | |
1122 | if (*op == ',') | |
1123 | ++op; | |
1124 | ||
1125 | if (*op == '=') | |
1126 | { | |
1127 | reg2 = reg1; | |
1128 | reg2_present = 1; | |
1129 | } | |
1130 | else | |
1131 | { | |
1132 | if (REGISTER_P (*op)) | |
1133 | reg2_present = 1; | |
1134 | ||
1135 | str = skip_space (str); | |
1136 | if (*str++ != ',') | |
1137 | as_bad (_("`,' required")); | |
1138 | str = skip_space (str); | |
1139 | ||
1140 | reg2 = avr_operand (opcode, where, op, &str); | |
1141 | } | |
1142 | ||
1143 | if (reg1_present && reg2_present) | |
1144 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1145 | else if (reg2_present) | |
1146 | reg2 <<= 4; | |
1147 | } | |
1148 | if (reg1_present) | |
1149 | reg1 <<= 4; | |
1150 | bin |= reg1 | reg2; | |
1151 | } | |
1152 | ||
1153 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1154 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1155 | as_warn (_("undefined combination of operands")); | |
1156 | ||
1157 | if (opcode->insn_size == 2) | |
1158 | { | |
1159 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1160 | (AVR core bug, fixed in the newer devices). */ | |
1161 | if (!(avr_opt.no_skip_bug || | |
1162 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1163 | && AVR_SKIP_P (prev)) | |
1164 | as_warn (_("skipping two-word instruction")); | |
1165 | ||
1166 | bfd_putl32 ((bfd_vma) bin, frag); | |
1167 | } | |
1168 | else | |
1169 | bfd_putl16 ((bfd_vma) bin, frag); | |
1170 | ||
1171 | prev = bin; | |
1172 | *line = str; | |
1173 | return bin; | |
1174 | } | |
1175 | ||
adde6300 AM |
1176 | /* GAS will call this function for each section at the end of the assembly, |
1177 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1178 | |
adde6300 | 1179 | valueT |
dc191a8f | 1180 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1181 | { |
1182 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1183 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1184 | } | |
1185 | ||
1186 | /* If you define this macro, it should return the offset between the | |
1187 | address of a PC relative fixup and the position from which the PC | |
1188 | relative adjustment should be made. On many processors, the base | |
1189 | of a PC relative instruction is the next instruction, so this | |
1190 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1191 | |
adde6300 | 1192 | long |
dc191a8f | 1193 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1194 | { |
c6a7ab1f | 1195 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1196 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1197 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1198 | return 0; | |
1dab94dd | 1199 | |
adde6300 AM |
1200 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1201 | } | |
1202 | ||
1203 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
1204 | value in the object file. */ |
1205 | ||
94f592af | 1206 | void |
dc191a8f | 1207 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1208 | { |
1209 | unsigned char *where; | |
1210 | unsigned long insn; | |
a161fe53 | 1211 | long value = *valP; |
adde6300 | 1212 | |
94f592af NC |
1213 | if (fixP->fx_addsy == (symbolS *) NULL) |
1214 | fixP->fx_done = 1; | |
1215 | ||
87733541 AM |
1216 | else if (fixP->fx_pcrel) |
1217 | { | |
1218 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1219 | ||
1220 | if (s == seg || s == absolute_section) | |
1221 | { | |
1222 | value += S_GET_VALUE (fixP->fx_addsy); | |
1223 | fixP->fx_done = 1; | |
1224 | } | |
1225 | } | |
1226 | ||
a161fe53 AM |
1227 | /* We don't actually support subtracting a symbol. */ |
1228 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1229 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1230 | |
94f592af | 1231 | switch (fixP->fx_r_type) |
adde6300 AM |
1232 | { |
1233 | default: | |
94f592af | 1234 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1235 | break; |
1236 | case BFD_RELOC_AVR_7_PCREL: | |
1237 | case BFD_RELOC_AVR_13_PCREL: | |
1238 | case BFD_RELOC_32: | |
1239 | case BFD_RELOC_16: | |
1240 | case BFD_RELOC_AVR_CALL: | |
1241 | break; | |
1242 | } | |
1243 | ||
94f592af | 1244 | if (fixP->fx_done) |
adde6300 AM |
1245 | { |
1246 | /* Fetch the instruction, insert the fully resolved operand | |
1247 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1248 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1249 | insn = bfd_getl16 (where); |
1250 | ||
94f592af | 1251 | switch (fixP->fx_r_type) |
adde6300 AM |
1252 | { |
1253 | case BFD_RELOC_AVR_7_PCREL: | |
1254 | if (value & 1) | |
94f592af | 1255 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1256 | _("odd address operand: %ld"), value); |
1dab94dd | 1257 | |
adde6300 AM |
1258 | /* Instruction addresses are always right-shifted by 1. */ |
1259 | value >>= 1; | |
1260 | --value; /* Correct PC. */ | |
1dab94dd | 1261 | |
adde6300 | 1262 | if (value < -64 || value > 63) |
94f592af | 1263 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1264 | _("operand out of range: %ld"), value); |
1265 | value = (value << 3) & 0x3f8; | |
1266 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1267 | break; | |
1268 | ||
1269 | case BFD_RELOC_AVR_13_PCREL: | |
1270 | if (value & 1) | |
94f592af | 1271 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1272 | _("odd address operand: %ld"), value); |
1dab94dd | 1273 | |
adde6300 AM |
1274 | /* Instruction addresses are always right-shifted by 1. */ |
1275 | value >>= 1; | |
1276 | --value; /* Correct PC. */ | |
adde6300 AM |
1277 | |
1278 | if (value < -2048 || value > 2047) | |
1279 | { | |
65aa24b6 | 1280 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1281 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1282 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1283 | _("operand out of range: %ld"), value); |
1284 | } | |
1285 | ||
1286 | value &= 0xfff; | |
1287 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1288 | break; | |
1289 | ||
1290 | case BFD_RELOC_32: | |
0b649256 | 1291 | bfd_putl32 ((bfd_vma) value, where); |
adde6300 AM |
1292 | break; |
1293 | ||
1294 | case BFD_RELOC_16: | |
1295 | bfd_putl16 ((bfd_vma) value, where); | |
1296 | break; | |
1297 | ||
17e57237 NC |
1298 | case BFD_RELOC_8: |
1299 | if (value > 255 || value < -128) | |
1300 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1301 | _("operand out of range: %ld"), value); | |
1302 | *where = value; | |
1303 | break; | |
1304 | ||
adde6300 | 1305 | case BFD_RELOC_AVR_16_PM: |
c6a7ab1f | 1306 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1307 | break; |
1308 | ||
750bce0e NC |
1309 | case BFD_RELOC_AVR_LDI: |
1310 | if (value > 255) | |
1311 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1312 | _("operand out of range: %ld"), value); | |
1313 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1314 | break; | |
1315 | ||
1316 | case BFD_RELOC_AVR_6: | |
1317 | if ((value > 63) || (value < 0)) | |
1318 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1319 | _("operand out of range: %ld"), value); | |
1320 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1321 | break; | |
1322 | ||
1323 | case BFD_RELOC_AVR_6_ADIW: | |
1324 | if ((value > 63) || (value < 0)) | |
1325 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1326 | _("operand out of range: %ld"), value); | |
1327 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1328 | break; | |
1329 | ||
adde6300 AM |
1330 | case BFD_RELOC_AVR_LO8_LDI: |
1331 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1332 | break; | |
1333 | ||
adde6300 AM |
1334 | case BFD_RELOC_AVR_HI8_LDI: |
1335 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1336 | break; | |
1337 | ||
df406460 | 1338 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1339 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1340 | break; | |
1341 | ||
1342 | case BFD_RELOC_AVR_HH8_LDI: | |
1343 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1344 | break; | |
1345 | ||
1346 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1347 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1348 | break; | |
1349 | ||
adde6300 AM |
1350 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1351 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1352 | break; | |
1353 | ||
df406460 | 1354 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1355 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1356 | break; | |
1357 | ||
1358 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1359 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1360 | break; | |
1361 | ||
1362 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1363 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1364 | break; | |
1365 | ||
1366 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1367 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1368 | break; | |
1369 | ||
1370 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1371 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1372 | break; | |
1373 | ||
1374 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1375 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1376 | break; | |
1377 | ||
1378 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1379 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1380 | break; | |
1381 | ||
1382 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1383 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1384 | break; | |
1385 | ||
1386 | case BFD_RELOC_AVR_CALL: | |
1387 | { | |
1388 | unsigned long x; | |
1dab94dd | 1389 | |
adde6300 AM |
1390 | x = bfd_getl16 (where); |
1391 | if (value & 1) | |
94f592af | 1392 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1393 | _("odd address operand: %ld"), value); |
1394 | value >>= 1; | |
1395 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1396 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1397 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1398 | } |
1399 | break; | |
1400 | ||
99700d6f NC |
1401 | case BFD_RELOC_AVR_8_LO: |
1402 | *where = 0xff & value; | |
1403 | break; | |
1404 | ||
1405 | case BFD_RELOC_AVR_8_HI: | |
1406 | *where = 0xff & (value >> 8); | |
1407 | break; | |
1408 | ||
40551fb8 | 1409 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1410 | *where = 0xff & (value >> 16); |
1411 | break; | |
1412 | ||
1413 | default: | |
c6a7ab1f | 1414 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1415 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1416 | break; |
1417 | } | |
1418 | } | |
1419 | else | |
1420 | { | |
a61a9fbc | 1421 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1422 | { |
1423 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1424 | case -BFD_RELOC_AVR_HI8_LDI: | |
1425 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1426 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1427 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1428 | _("only constant expression allowed")); |
94f592af | 1429 | fixP->fx_done = 1; |
adde6300 AM |
1430 | break; |
1431 | default: | |
1432 | break; | |
1433 | } | |
adde6300 | 1434 | } |
adde6300 AM |
1435 | } |
1436 | ||
7be1c489 AM |
1437 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1438 | to `bfd_install_relocation'. This currently works poorly, as | |
1439 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1440 | `tc_gen_reloc' have been written to work around the problems, which | |
1441 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1442 | |
1443 | /* If while processing a fixup, a reloc really needs to be created | |
1444 | then it is done here. */ | |
1445 | ||
1446 | arelent * | |
dc191a8f NC |
1447 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1448 | fixS *fixp) | |
adde6300 AM |
1449 | { |
1450 | arelent *reloc; | |
1451 | ||
94d4433a | 1452 | if (fixp->fx_subsy != NULL) |
df406460 | 1453 | { |
94d4433a | 1454 | as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex")); |
df406460 NC |
1455 | return NULL; |
1456 | } | |
1457 | ||
dc191a8f | 1458 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1459 | |
dc191a8f | 1460 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1461 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1462 | ||
1463 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1464 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1465 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1466 | { | |
1467 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1468 | _("reloc %d not supported by object file format"), |
1469 | (int) fixp->fx_r_type); | |
adde6300 AM |
1470 | return NULL; |
1471 | } | |
1472 | ||
1473 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1474 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1475 | reloc->address = fixp->fx_offset; | |
1476 | ||
1477 | reloc->addend = fixp->fx_offset; | |
1478 | ||
1479 | return reloc; | |
1480 | } | |
1481 | ||
adde6300 | 1482 | void |
dc191a8f | 1483 | md_assemble (char *str) |
adde6300 | 1484 | { |
c6a7ab1f | 1485 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1486 | char op[11]; |
1487 | ||
c6a7ab1f | 1488 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1489 | |
1490 | if (!op[0]) | |
00d2865b | 1491 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1492 | |
1493 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1494 | ||
1495 | if (opcode == NULL) | |
1496 | { | |
00d2865b | 1497 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1498 | return; |
1499 | } | |
1500 | ||
b170af93 | 1501 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1502 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1503 | |
1188e082 DC |
1504 | if (*str && *opcode->constraints == '?') |
1505 | ++opcode; | |
b170af93 | 1506 | |
00d2865b NC |
1507 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1508 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 | 1509 | |
d4f4f3fb AM |
1510 | dwarf2_emit_insn (0); |
1511 | ||
adde6300 AM |
1512 | /* We used to set input_line_pointer to the result of get_operands, |
1513 | but that is wrong. Our caller assumes we don't change it. */ | |
1514 | { | |
1515 | char *t = input_line_pointer; | |
dc191a8f | 1516 | |
adde6300 | 1517 | avr_operands (opcode, &str); |
b170af93 | 1518 | if (*skip_space (str)) |
00d2865b | 1519 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1520 | input_line_pointer = t; |
1521 | } | |
1522 | } | |
1523 | ||
62ebcb5c | 1524 | const exp_mod_data_t exp_mod_data[] = |
99700d6f NC |
1525 | { |
1526 | /* Default, must be first. */ | |
1527 | { "", 0, BFD_RELOC_16, "" }, | |
1528 | /* Divides by 2 to get word address. Generate Stub. */ | |
1529 | { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " }, | |
1530 | { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " }, | |
1531 | /* The following are used together with avr-gcc's __memx address space | |
1532 | in order to initialize a 24-bit pointer variable with a 24-bit address. | |
40551fb8 NC |
1533 | For address in flash, hlo8 will contain the flash segment if the |
1534 | symbol is located in flash. If the symbol is located in RAM; hlo8 | |
99700d6f NC |
1535 | will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash |
1536 | addresses linearize address space. */ | |
1537 | { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " }, | |
1538 | { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " }, | |
40551fb8 NC |
1539 | { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " }, |
1540 | { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " }, | |
99700d6f NC |
1541 | /* End of list. */ |
1542 | { NULL, 0, 0, NULL } | |
1543 | }; | |
1544 | ||
99700d6f NC |
1545 | /* Parse special CONS expression: pm (expression) or alternatively |
1546 | gs (expression). These are used for addressing program memory. Moreover, | |
40551fb8 | 1547 | define lo8 (expression), hi8 (expression) and hlo8 (expression). */ |
c6a7ab1f | 1548 | |
62ebcb5c | 1549 | const exp_mod_data_t * |
dc191a8f | 1550 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1551 | { |
99700d6f | 1552 | const exp_mod_data_t *pexp = &exp_mod_data[0]; |
c6a7ab1f | 1553 | char *tmp; |
adde6300 | 1554 | |
adde6300 AM |
1555 | tmp = input_line_pointer = skip_space (input_line_pointer); |
1556 | ||
99700d6f NC |
1557 | /* The first entry of exp_mod_data[] contains an entry if no |
1558 | expression modifier is present. Skip it. */ | |
1559 | ||
1560 | for (pexp++; pexp->name; pexp++) | |
adde6300 | 1561 | { |
99700d6f | 1562 | int len = strlen (pexp->name); |
1dab94dd | 1563 | |
99700d6f NC |
1564 | if (nbytes == pexp->nbytes |
1565 | && strncasecmp (input_line_pointer, pexp->name, len) == 0) | |
adde6300 AM |
1566 | { |
1567 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1568 | |
adde6300 AM |
1569 | if (*input_line_pointer == '(') |
1570 | { | |
1571 | input_line_pointer = skip_space (input_line_pointer + 1); | |
adde6300 | 1572 | expression (exp); |
1dab94dd | 1573 | |
adde6300 | 1574 | if (*input_line_pointer == ')') |
62ebcb5c AM |
1575 | { |
1576 | ++input_line_pointer; | |
1577 | return pexp; | |
1578 | } | |
adde6300 AM |
1579 | else |
1580 | { | |
00d2865b | 1581 | as_bad (_("`)' required")); |
62ebcb5c | 1582 | return &exp_mod_data[0]; |
adde6300 | 1583 | } |
adde6300 | 1584 | } |
1dab94dd | 1585 | |
adde6300 | 1586 | input_line_pointer = tmp; |
99700d6f NC |
1587 | |
1588 | break; | |
adde6300 AM |
1589 | } |
1590 | } | |
1dab94dd | 1591 | |
adde6300 | 1592 | expression (exp); |
62ebcb5c | 1593 | return &exp_mod_data[0]; |
adde6300 AM |
1594 | } |
1595 | ||
1596 | void | |
dc191a8f NC |
1597 | avr_cons_fix_new (fragS *frag, |
1598 | int where, | |
1599 | int nbytes, | |
62ebcb5c AM |
1600 | expressionS *exp, |
1601 | const exp_mod_data_t *pexp_mod_data) | |
adde6300 | 1602 | { |
99700d6f NC |
1603 | int bad = 0; |
1604 | ||
1605 | switch (pexp_mod_data->reloc) | |
adde6300 | 1606 | { |
99700d6f | 1607 | default: |
17e57237 NC |
1608 | if (nbytes == 1) |
1609 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8); | |
1610 | else if (nbytes == 2) | |
b34976b6 | 1611 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1612 | else if (nbytes == 4) |
b34976b6 | 1613 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1614 | else |
99700d6f NC |
1615 | bad = 1; |
1616 | break; | |
1617 | ||
1618 | case BFD_RELOC_AVR_16_PM: | |
1619 | case BFD_RELOC_AVR_8_LO: | |
1620 | case BFD_RELOC_AVR_8_HI: | |
40551fb8 | 1621 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1622 | if (nbytes == pexp_mod_data->nbytes) |
1623 | fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc); | |
adde6300 | 1624 | else |
99700d6f NC |
1625 | bad = 1; |
1626 | break; | |
adde6300 | 1627 | } |
99700d6f NC |
1628 | |
1629 | if (bad) | |
1630 | as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes); | |
adde6300 | 1631 | } |
af3ecb4a | 1632 | |
71863e73 NC |
1633 | static bfd_boolean |
1634 | mcu_has_3_byte_pc (void) | |
1635 | { | |
1636 | int mach = avr_mcu->mach; | |
1637 | ||
1638 | return mach == bfd_mach_avr6 | |
1639 | || mach == bfd_mach_avrxmega6 | |
1640 | || mach == bfd_mach_avrxmega7; | |
1641 | } | |
1642 | ||
af3ecb4a RH |
1643 | void |
1644 | tc_cfi_frame_initial_instructions (void) | |
1645 | { | |
1646 | /* AVR6 pushes 3 bytes for calls. */ | |
71863e73 | 1647 | int return_size = (mcu_has_3_byte_pc () ? 3 : 2); |
af3ecb4a RH |
1648 | |
1649 | /* The CFA is the caller's stack location before the call insn. */ | |
1650 | /* Note that the stack pointer is dwarf register number 32. */ | |
1651 | cfi_add_CFA_def_cfa (32, return_size); | |
1652 | ||
1653 | /* Note that AVR consistently uses post-decrement, which means that things | |
1654 | do not line up the same way as for targers that use pre-decrement. */ | |
1655 | cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size); | |
1656 | } |