Commit | Line | Data |
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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
750bce0e | 3 | Copyright 1999, 2000, 2001, 2002, 2004 Free Software Foundation, Inc. |
adde6300 AM |
4 | Contributed by Denis Chertykov <denisc@overta.ru> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include <stdio.h> | |
adde6300 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
adde6300 AM |
26 | #include "subsegs.h" |
27 | ||
1188e082 DC |
28 | struct avr_opcodes_s |
29 | { | |
30 | char *name; | |
31 | char *constraints; | |
c6a7ab1f | 32 | int insn_size; /* In words. */ |
1188e082 DC |
33 | int isa; |
34 | unsigned int bin_opcode; | |
35 | }; | |
36 | ||
37 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
38 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
39 | ||
40 | struct avr_opcodes_s avr_opcodes[] = | |
41 | { | |
42 | #include "opcode/avr.h" | |
43 | {NULL, NULL, 0, 0, 0} | |
44 | }; | |
45 | ||
adde6300 AM |
46 | const char comment_chars[] = ";"; |
47 | const char line_comment_chars[] = "#"; | |
48 | const char line_separator_chars[] = "$"; | |
49 | ||
adde6300 AM |
50 | const char *md_shortopts = "m:"; |
51 | struct mcu_type_s | |
52 | { | |
53 | char *name; | |
54 | int isa; | |
55 | int mach; | |
56 | }; | |
57 | ||
1f8ae5e6 DC |
58 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
59 | ones, or planned but never produced), left here for compatibility. | |
60 | TODO: hide them in show_mcu_list output? */ | |
61 | ||
adde6300 AM |
62 | static struct mcu_type_s mcu_types[] = |
63 | { | |
b170af93 | 64 | {"avr1", AVR_ISA_TINY1, bfd_mach_avr1}, |
65aa24b6 | 65 | {"avr2", AVR_ISA_2xxx, bfd_mach_avr2}, |
b170af93 | 66 | {"avr3", AVR_ISA_M103, bfd_mach_avr3}, |
1f8ae5e6 | 67 | {"avr4", AVR_ISA_M8, bfd_mach_avr4}, |
65aa24b6 | 68 | {"avr5", AVR_ISA_ALL, bfd_mach_avr5}, |
adde6300 | 69 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
1f8ae5e6 | 70 | {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */ |
b170af93 DC |
71 | {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1}, |
72 | {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1}, | |
73 | {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1}, | |
74 | {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1}, | |
adde6300 AM |
75 | {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2}, |
76 | {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2}, | |
1f8ae5e6 | 77 | {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */ |
adde6300 | 78 | {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2}, |
bdfdba87 MM |
79 | {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */ |
80 | {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2}, | |
adde6300 | 81 | {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2}, |
1f8ae5e6 DC |
82 | {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */ |
83 | {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */ | |
65aa24b6 NC |
84 | {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2}, |
85 | {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2}, | |
86 | {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2}, | |
8a6def3b | 87 | {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2}, |
1f8ae5e6 | 88 | {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */ |
b170af93 | 89 | {"atmega103", AVR_ISA_M103, bfd_mach_avr3}, |
1f8ae5e6 | 90 | {"at43usb320",AVR_ISA_M103, bfd_mach_avr3}, |
bdfdba87 | 91 | {"at43usb355",AVR_ISA_M603, bfd_mach_avr3}, |
1f8ae5e6 | 92 | {"at76c711", AVR_ISA_M603, bfd_mach_avr3}, |
23794b24 | 93 | {"atmega48", AVR_ISA_M8, bfd_mach_avr4}, |
1f8ae5e6 | 94 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
8a6def3b | 95 | {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */ |
1f8ae5e6 | 96 | {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */ |
23794b24 | 97 | {"atmega88", AVR_ISA_M8, bfd_mach_avr4}, |
bdfdba87 | 98 | {"atmega8515",AVR_ISA_M8, bfd_mach_avr4}, |
8a6def3b | 99 | {"atmega8535",AVR_ISA_M8, bfd_mach_avr4}, |
23794b24 MM |
100 | {"attiny13", AVR_ISA_TINY2, bfd_mach_avr4}, |
101 | {"attiny2313",AVR_ISA_TINY2, bfd_mach_avr4}, | |
1f8ae5e6 | 102 | {"atmega16", AVR_ISA_M323, bfd_mach_avr5}, |
65aa24b6 | 103 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
bdfdba87 | 104 | {"atmega162", AVR_ISA_M323, bfd_mach_avr5}, |
65aa24b6 | 105 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
5c54fd37 | 106 | {"atmega165", AVR_ISA_M323, bfd_mach_avr5}, |
23794b24 | 107 | {"atmega168", AVR_ISA_M323, bfd_mach_avr5}, |
8a6def3b | 108 | {"atmega169", AVR_ISA_M323, bfd_mach_avr5}, |
1f8ae5e6 DC |
109 | {"atmega32", AVR_ISA_M323, bfd_mach_avr5}, |
110 | {"atmega323", AVR_ISA_M323, bfd_mach_avr5}, | |
5c54fd37 NC |
111 | {"atmega325", AVR_ISA_M323, bfd_mach_avr5}, |
112 | {"atmega3250",AVR_ISA_M323, bfd_mach_avr5}, | |
1f8ae5e6 DC |
113 | {"atmega64", AVR_ISA_M323, bfd_mach_avr5}, |
114 | {"atmega128", AVR_ISA_M128, bfd_mach_avr5}, | |
5c54fd37 NC |
115 | {"atmega645", AVR_ISA_M323, bfd_mach_avr5}, |
116 | {"atmega6450",AVR_ISA_M323, bfd_mach_avr5}, | |
23794b24 | 117 | {"at90can128",AVR_ISA_M128, bfd_mach_avr5}, |
65aa24b6 | 118 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
adde6300 AM |
119 | {NULL, 0, 0} |
120 | }; | |
121 | ||
adde6300 AM |
122 | /* Current MCU type. */ |
123 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2}; | |
124 | static struct mcu_type_s *avr_mcu = &default_mcu; | |
125 | ||
00d2865b NC |
126 | /* AVR target-specific switches. */ |
127 | struct avr_opt_s | |
128 | { | |
c6a7ab1f NC |
129 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */ |
130 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */ | |
131 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */ | |
00d2865b NC |
132 | }; |
133 | ||
134 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
135 | ||
adde6300 AM |
136 | const char EXP_CHARS[] = "eE"; |
137 | const char FLT_CHARS[] = "dD"; | |
138 | static void avr_set_arch (int dummy); | |
139 | ||
140 | /* The target specific pseudo-ops which we support. */ | |
141 | const pseudo_typeS md_pseudo_table[] = | |
142 | { | |
143 | {"arch", avr_set_arch, 0}, | |
144 | { NULL, NULL, 0} | |
145 | }; | |
146 | ||
147 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 148 | |
65b1d096 DC |
149 | static void show_mcu_list PARAMS ((FILE *)); |
150 | static char *skip_space PARAMS ((char *)); | |
151 | static char *extract_word PARAMS ((char *, char *, int)); | |
152 | static unsigned int avr_operand PARAMS ((struct avr_opcodes_s *, | |
153 | int, char *, char **)); | |
154 | static unsigned int avr_operands PARAMS ((struct avr_opcodes_s *, char **)); | |
155 | static unsigned int avr_get_constant PARAMS ((char *, int)); | |
156 | static char *parse_exp PARAMS ((char *, expressionS *)); | |
157 | static bfd_reloc_code_real_type avr_ldi_expression PARAMS ((expressionS *)); | |
adde6300 | 158 | |
adde6300 AM |
159 | #define EXP_MOD_NAME(i) exp_mod[i].name |
160 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
161 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
162 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
163 | ||
164 | struct exp_mod_s | |
165 | { | |
c6a7ab1f | 166 | char *name; |
adde6300 AM |
167 | bfd_reloc_code_real_type reloc; |
168 | bfd_reloc_code_real_type neg_reloc; | |
169 | int have_pm; | |
170 | }; | |
171 | ||
c6a7ab1f NC |
172 | static struct exp_mod_s exp_mod[] = |
173 | { | |
adde6300 AM |
174 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
175 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
176 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
177 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
178 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
179 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
180 | {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0}, | |
181 | {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0}, | |
182 | }; | |
183 | ||
184 | /* Opcode hash table. */ | |
185 | static struct hash_control *avr_hash; | |
186 | ||
187 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
188 | static struct hash_control *avr_mod_hash; | |
189 | ||
00d2865b NC |
190 | #define OPTION_MMCU 'm' |
191 | #define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1) | |
192 | #define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2) | |
193 | #define OPTION_NO_WRAP (OPTION_MD_BASE + 3) | |
adde6300 | 194 | |
c6a7ab1f NC |
195 | struct option md_longopts[] = |
196 | { | |
00d2865b NC |
197 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
198 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
199 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
200 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
201 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 202 | }; |
adde6300 | 203 | |
c6a7ab1f | 204 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
205 | |
206 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 207 | |
00d2865b | 208 | static void |
c6a7ab1f NC |
209 | show_mcu_list (stream) |
210 | FILE *stream; | |
00d2865b NC |
211 | { |
212 | int i, x; | |
213 | ||
214 | fprintf (stream, _("Known MCU names:")); | |
215 | x = 1000; | |
1dab94dd | 216 | |
00d2865b NC |
217 | for (i = 0; mcu_types[i].name; i++) |
218 | { | |
219 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 220 | |
00d2865b | 221 | x += len + 1; |
1dab94dd | 222 | |
00d2865b | 223 | if (x < 75) |
c6a7ab1f | 224 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
225 | else |
226 | { | |
227 | fprintf (stream, "\n %s", mcu_types[i].name); | |
228 | x = len + 2; | |
229 | } | |
230 | } | |
1dab94dd | 231 | |
c6a7ab1f | 232 | fprintf (stream, "\n"); |
00d2865b NC |
233 | } |
234 | ||
adde6300 AM |
235 | static inline char * |
236 | skip_space (s) | |
c6a7ab1f | 237 | char *s; |
adde6300 AM |
238 | { |
239 | while (*s == ' ' || *s == '\t') | |
240 | ++s; | |
241 | return s; | |
242 | } | |
243 | ||
244 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 245 | |
adde6300 AM |
246 | static char * |
247 | extract_word (char *from, char *to, int limit) | |
248 | { | |
249 | char *op_start; | |
250 | char *op_end; | |
251 | int size = 0; | |
252 | ||
253 | /* Drop leading whitespace. */ | |
254 | from = skip_space (from); | |
255 | *to = 0; | |
c6a7ab1f | 256 | |
adde6300 | 257 | /* Find the op code end. */ |
c6a7ab1f | 258 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
259 | { |
260 | to[size++] = *op_end++; | |
261 | if (size + 1 >= limit) | |
262 | break; | |
263 | } | |
1dab94dd | 264 | |
adde6300 AM |
265 | to[size] = 0; |
266 | return op_end; | |
267 | } | |
268 | ||
269 | int | |
270 | md_estimate_size_before_relax (fragp, seg) | |
df136245 DC |
271 | fragS *fragp ATTRIBUTE_UNUSED; |
272 | asection *seg ATTRIBUTE_UNUSED; | |
adde6300 AM |
273 | { |
274 | abort (); | |
275 | return 0; | |
276 | } | |
277 | ||
278 | void | |
279 | md_show_usage (stream) | |
c6a7ab1f | 280 | FILE *stream; |
adde6300 | 281 | { |
00d2865b NC |
282 | fprintf (stream, |
283 | _("AVR options:\n" | |
adde6300 AM |
284 | " -mmcu=[avr-name] select microcontroller variant\n" |
285 | " [avr-name] can be:\n" | |
65aa24b6 NC |
286 | " avr1 - AT90S1200, ATtiny1x, ATtiny28\n" |
287 | " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n" | |
288 | " avr3 - ATmega103, ATmega603\n" | |
289 | " avr4 - ATmega83, ATmega85\n" | |
290 | " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n" | |
adde6300 | 291 | " or immediate microcontroller name.\n")); |
00d2865b NC |
292 | fprintf (stream, |
293 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
294 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
295 | " (default for avr4, avr5)\n" | |
296 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
297 | " (default for avr3, avr5)\n")); | |
298 | show_mcu_list (stream); | |
adde6300 AM |
299 | } |
300 | ||
301 | static void | |
302 | avr_set_arch (dummy) | |
df136245 | 303 | int dummy ATTRIBUTE_UNUSED; |
adde6300 | 304 | { |
c6a7ab1f | 305 | char *str; |
1dab94dd | 306 | |
c6a7ab1f | 307 | str = (char *) alloca (20); |
adde6300 | 308 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 309 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
310 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
311 | } | |
312 | ||
313 | int | |
314 | md_parse_option (c, arg) | |
315 | int c; | |
316 | char *arg; | |
317 | { | |
00d2865b | 318 | switch (c) |
adde6300 | 319 | { |
00d2865b NC |
320 | case OPTION_MMCU: |
321 | { | |
322 | int i; | |
323 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 324 | |
00d2865b NC |
325 | { |
326 | char *t = s; | |
327 | char *arg1 = arg; | |
328 | ||
329 | do | |
3882b010 | 330 | *t = TOLOWER (*arg1++); |
00d2865b NC |
331 | while (*t++); |
332 | } | |
333 | ||
334 | for (i = 0; mcu_types[i].name; ++i) | |
335 | if (strcmp (mcu_types[i].name, s) == 0) | |
336 | break; | |
adde6300 | 337 | |
00d2865b NC |
338 | if (!mcu_types[i].name) |
339 | { | |
340 | show_mcu_list (stderr); | |
341 | as_fatal (_("unknown MCU: %s\n"), arg); | |
342 | } | |
65aa24b6 | 343 | |
00d2865b NC |
344 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
345 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
346 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
347 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
348 | avr_mcu = &mcu_types[i]; | |
349 | else | |
350 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
351 | avr_mcu->name, mcu_types[i].name); | |
352 | return 1; | |
353 | } | |
354 | case OPTION_ALL_OPCODES: | |
355 | avr_opt.all_opcodes = 1; | |
356 | return 1; | |
357 | case OPTION_NO_SKIP_BUG: | |
358 | avr_opt.no_skip_bug = 1; | |
359 | return 1; | |
360 | case OPTION_NO_WRAP: | |
361 | avr_opt.no_wrap = 1; | |
adde6300 AM |
362 | return 1; |
363 | } | |
1dab94dd | 364 | |
adde6300 AM |
365 | return 0; |
366 | } | |
367 | ||
368 | symbolS * | |
c6a7ab1f | 369 | md_undefined_symbol (name) |
df136245 | 370 | char *name ATTRIBUTE_UNUSED; |
adde6300 AM |
371 | { |
372 | return 0; | |
373 | } | |
374 | ||
c6a7ab1f NC |
375 | /* Turn a string in input_line_pointer into a floating point constant |
376 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
377 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
378 | returned, or NULL on OK. */ | |
379 | ||
adde6300 AM |
380 | char * |
381 | md_atof (type, litP, sizeP) | |
382 | int type; | |
383 | char *litP; | |
384 | int *sizeP; | |
385 | { | |
386 | int prec; | |
387 | LITTLENUM_TYPE words[4]; | |
388 | LITTLENUM_TYPE *wordP; | |
389 | char *t; | |
390 | ||
391 | switch (type) | |
392 | { | |
393 | case 'f': | |
394 | prec = 2; | |
395 | break; | |
396 | case 'd': | |
397 | prec = 4; | |
398 | break; | |
399 | default: | |
400 | *sizeP = 0; | |
401 | return _("bad call to md_atof"); | |
402 | } | |
403 | ||
404 | t = atof_ieee (input_line_pointer, type, words); | |
405 | if (t) | |
406 | input_line_pointer = t; | |
407 | ||
408 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1dab94dd | 409 | |
adde6300 AM |
410 | /* This loop outputs the LITTLENUMs in REVERSE order. */ |
411 | for (wordP = words + prec - 1; prec--;) | |
412 | { | |
413 | md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE)); | |
414 | litP += sizeof (LITTLENUM_TYPE); | |
415 | } | |
1dab94dd | 416 | |
adde6300 AM |
417 | return NULL; |
418 | } | |
419 | ||
420 | void | |
421 | md_convert_frag (abfd, sec, fragP) | |
c6a7ab1f NC |
422 | bfd *abfd ATTRIBUTE_UNUSED; |
423 | asection *sec ATTRIBUTE_UNUSED; | |
424 | fragS *fragP ATTRIBUTE_UNUSED; | |
adde6300 AM |
425 | { |
426 | abort (); | |
427 | } | |
428 | ||
adde6300 AM |
429 | void |
430 | md_begin () | |
431 | { | |
df136245 | 432 | unsigned int i; |
adde6300 | 433 | struct avr_opcodes_s *opcode; |
c6a7ab1f | 434 | avr_hash = hash_new (); |
adde6300 AM |
435 | |
436 | /* Insert unique names into hash table. This hash table then provides a | |
437 | quick index to the first opcode with a particular name in the opcode | |
438 | table. */ | |
adde6300 AM |
439 | for (opcode = avr_opcodes; opcode->name; opcode++) |
440 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
441 | ||
442 | avr_mod_hash = hash_new (); | |
443 | ||
444 | for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i) | |
c6a7ab1f NC |
445 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10)); |
446 | ||
adde6300 AM |
447 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
448 | } | |
449 | ||
df136245 | 450 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 451 | If result greater than MAX then error. */ |
df136245 DC |
452 | |
453 | static unsigned int | |
454 | avr_get_constant (str, max) | |
c6a7ab1f | 455 | char *str; |
df136245 DC |
456 | int max; |
457 | { | |
458 | expressionS ex; | |
459 | str = skip_space (str); | |
460 | input_line_pointer = str; | |
461 | expression (&ex); | |
462 | ||
463 | if (ex.X_op != O_constant) | |
464 | as_bad (_("constant value required")); | |
465 | ||
466 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
c6a7ab1f | 467 | as_bad (_("number must be less than %d"), max + 1); |
1dab94dd | 468 | |
df136245 DC |
469 | return ex.X_add_number; |
470 | } | |
471 | ||
df136245 | 472 | /* Parse instruction operands. |
c6a7ab1f | 473 | Return binary opcode. */ |
df136245 | 474 | |
adde6300 AM |
475 | static unsigned int |
476 | avr_operands (opcode, line) | |
477 | struct avr_opcodes_s *opcode; | |
478 | char **line; | |
479 | { | |
480 | char *op = opcode->constraints; | |
481 | unsigned int bin = opcode->bin_opcode; | |
482 | char *frag = frag_more (opcode->insn_size * 2); | |
483 | char *str = *line; | |
484 | int where = frag - frag_now->fr_literal; | |
c6a7ab1f | 485 | static unsigned int prev = 0; /* Previous opcode. */ |
adde6300 AM |
486 | |
487 | /* Opcode have operands. */ | |
488 | if (*op) | |
489 | { | |
490 | unsigned int reg1 = 0; | |
491 | unsigned int reg2 = 0; | |
492 | int reg1_present = 0; | |
493 | int reg2_present = 0; | |
494 | ||
495 | /* Parse first operand. */ | |
496 | if (REGISTER_P (*op)) | |
497 | reg1_present = 1; | |
498 | reg1 = avr_operand (opcode, where, op, &str); | |
499 | ++op; | |
500 | ||
501 | /* Parse second operand. */ | |
502 | if (*op) | |
503 | { | |
504 | if (*op == ',') | |
505 | ++op; | |
1dab94dd | 506 | |
adde6300 AM |
507 | if (*op == '=') |
508 | { | |
509 | reg2 = reg1; | |
510 | reg2_present = 1; | |
511 | } | |
512 | else | |
513 | { | |
514 | if (REGISTER_P (*op)) | |
515 | reg2_present = 1; | |
516 | ||
517 | str = skip_space (str); | |
518 | if (*str++ != ',') | |
00d2865b | 519 | as_bad (_("`,' required")); |
adde6300 AM |
520 | str = skip_space (str); |
521 | ||
522 | reg2 = avr_operand (opcode, where, op, &str); | |
523 | ||
524 | } | |
1dab94dd | 525 | |
adde6300 AM |
526 | if (reg1_present && reg2_present) |
527 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
528 | else if (reg2_present) | |
529 | reg2 <<= 4; | |
530 | } | |
531 | if (reg1_present) | |
532 | reg1 <<= 4; | |
533 | bin |= reg1 | reg2; | |
534 | } | |
b170af93 | 535 | |
65b1d096 DC |
536 | /* Detect undefined combinations (like ld r31,Z+). */ |
537 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
538 | as_warn (_("undefined combination of operands")); | |
00d2865b | 539 | |
adde6300 AM |
540 | if (opcode->insn_size == 2) |
541 | { | |
00d2865b NC |
542 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs |
543 | (AVR core bug, fixed in the newer devices). */ | |
544 | ||
23794b24 MM |
545 | if (!(avr_opt.no_skip_bug || |
546 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
65b1d096 DC |
547 | && AVR_SKIP_P (prev)) |
548 | as_warn (_("skipping two-word instruction")); | |
00d2865b | 549 | |
c6a7ab1f | 550 | bfd_putl32 ((bfd_vma) bin, frag); |
adde6300 AM |
551 | } |
552 | else | |
c6a7ab1f | 553 | bfd_putl16 ((bfd_vma) bin, frag); |
b170af93 DC |
554 | |
555 | prev = bin; | |
adde6300 AM |
556 | *line = str; |
557 | return bin; | |
558 | } | |
559 | ||
750bce0e NC |
560 | /* Parse for ldd/std offset */ |
561 | ||
562 | static void | |
563 | avr_offset_expression (expressionS *exp) | |
564 | { | |
565 | char *str = input_line_pointer; | |
566 | char *tmp; | |
567 | char op[8]; | |
568 | ||
569 | tmp = str; | |
570 | str = extract_word (str, op, sizeof (op)); | |
571 | ||
572 | input_line_pointer = tmp; | |
573 | expression (exp); | |
574 | ||
575 | /* Warn about expressions that fail to use lo8 (). */ | |
576 | if (exp->X_op == O_constant) | |
577 | { | |
578 | int x = exp->X_add_number; | |
579 | ||
580 | if (x < -255 || x > 255) | |
581 | as_warn (_("constant out of 8-bit range: %d"), x); | |
582 | } | |
583 | } | |
584 | ||
df136245 | 585 | /* Parse one instruction operand. |
c6a7ab1f NC |
586 | Return operand bitmask. Also fixups can be generated. */ |
587 | ||
adde6300 AM |
588 | static unsigned int |
589 | avr_operand (opcode, where, op, line) | |
590 | struct avr_opcodes_s *opcode; | |
591 | int where; | |
592 | char *op; | |
593 | char **line; | |
594 | { | |
adde6300 | 595 | expressionS op_expr; |
df136245 DC |
596 | unsigned int op_mask = 0; |
597 | char *str = skip_space (*line); | |
adde6300 | 598 | |
adde6300 AM |
599 | switch (*op) |
600 | { | |
601 | /* Any register operand. */ | |
602 | case 'w': | |
603 | case 'd': | |
604 | case 'r': | |
b170af93 DC |
605 | case 'a': |
606 | case 'v': | |
c6a7ab1f NC |
607 | if (*str == 'r' || *str == 'R') |
608 | { | |
609 | char r_name[20]; | |
1dab94dd | 610 | |
c6a7ab1f | 611 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 612 | op_mask = 0xff; |
3882b010 | 613 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
614 | { |
615 | if (r_name[2] == '\0') | |
616 | op_mask = r_name[1] - '0'; | |
617 | else if (r_name[1] != '0' | |
3882b010 | 618 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
619 | && r_name[3] == '\0') |
620 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
621 | } | |
622 | } | |
623 | else | |
624 | { | |
625 | op_mask = avr_get_constant (str, 31); | |
626 | str = input_line_pointer; | |
627 | } | |
1dab94dd | 628 | |
c6a7ab1f NC |
629 | if (op_mask <= 31) |
630 | { | |
631 | switch (*op) | |
632 | { | |
633 | case 'a': | |
634 | if (op_mask < 16 || op_mask > 23) | |
635 | as_bad (_("register r16-r23 required")); | |
636 | op_mask -= 16; | |
637 | break; | |
1dab94dd | 638 | |
c6a7ab1f NC |
639 | case 'd': |
640 | if (op_mask < 16) | |
641 | as_bad (_("register number above 15 required")); | |
642 | op_mask -= 16; | |
643 | break; | |
1dab94dd | 644 | |
c6a7ab1f NC |
645 | case 'v': |
646 | if (op_mask & 1) | |
647 | as_bad (_("even register number required")); | |
648 | op_mask >>= 1; | |
649 | break; | |
1dab94dd | 650 | |
c6a7ab1f | 651 | case 'w': |
65b1d096 | 652 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 653 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 654 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
655 | break; |
656 | } | |
657 | break; | |
658 | } | |
659 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
660 | break; |
661 | ||
662 | case 'e': | |
663 | { | |
664 | char c; | |
1dab94dd | 665 | |
adde6300 AM |
666 | if (*str == '-') |
667 | { | |
c6a7ab1f | 668 | str = skip_space (str + 1); |
adde6300 AM |
669 | op_mask = 0x1002; |
670 | } | |
3882b010 | 671 | c = TOLOWER (*str); |
adde6300 AM |
672 | if (c == 'x') |
673 | op_mask |= 0x100c; | |
674 | else if (c == 'y') | |
675 | op_mask |= 0x8; | |
676 | else if (c != 'z') | |
00d2865b | 677 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 678 | |
c6a7ab1f | 679 | str = skip_space (str + 1); |
adde6300 AM |
680 | if (*str == '+') |
681 | { | |
682 | ++str; | |
683 | if (op_mask & 2) | |
00d2865b | 684 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
685 | op_mask |= 0x1001; |
686 | } | |
e38c9cc2 | 687 | |
1188e082 | 688 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 689 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
690 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
691 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
692 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
693 | } |
694 | break; | |
695 | ||
b170af93 | 696 | case 'z': |
c6a7ab1f NC |
697 | if (*str == '-') |
698 | as_bad (_("can't predecrement")); | |
1dab94dd | 699 | |
c6a7ab1f NC |
700 | if (! (*str == 'z' || *str == 'Z')) |
701 | as_bad (_("pointer register Z required")); | |
1dab94dd | 702 | |
c6a7ab1f NC |
703 | str = skip_space (str + 1); |
704 | ||
705 | if (*str == '+') | |
706 | { | |
707 | ++str; | |
708 | op_mask |= 1; | |
709 | } | |
b170af93 DC |
710 | break; |
711 | ||
adde6300 AM |
712 | case 'b': |
713 | { | |
3882b010 | 714 | char c = TOLOWER (*str++); |
1dab94dd | 715 | |
adde6300 AM |
716 | if (c == 'y') |
717 | op_mask |= 0x8; | |
718 | else if (c != 'z') | |
00d2865b | 719 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
720 | str = skip_space (str); |
721 | if (*str++ == '+') | |
722 | { | |
750bce0e NC |
723 | input_line_pointer = str; |
724 | avr_offset_expression (& op_expr); | |
adde6300 | 725 | str = input_line_pointer; |
750bce0e NC |
726 | fix_new_exp (frag_now, where, 3, |
727 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
728 | } |
729 | } | |
730 | break; | |
731 | ||
732 | case 'h': | |
c6a7ab1f NC |
733 | str = parse_exp (str, &op_expr); |
734 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 735 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
736 | break; |
737 | ||
738 | case 'L': | |
c6a7ab1f NC |
739 | str = parse_exp (str, &op_expr); |
740 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 741 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
742 | break; |
743 | ||
744 | case 'l': | |
c6a7ab1f NC |
745 | str = parse_exp (str, &op_expr); |
746 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 747 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
748 | break; |
749 | ||
750 | case 'i': | |
c6a7ab1f NC |
751 | str = parse_exp (str, &op_expr); |
752 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 753 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
754 | break; |
755 | ||
756 | case 'M': | |
757 | { | |
758 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 759 | |
c6a7ab1f NC |
760 | input_line_pointer = str; |
761 | r_type = avr_ldi_expression (&op_expr); | |
762 | str = input_line_pointer; | |
adde6300 | 763 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 764 | &op_expr, FALSE, r_type); |
adde6300 AM |
765 | } |
766 | break; | |
767 | ||
768 | case 'n': | |
769 | { | |
770 | unsigned int x; | |
1dab94dd | 771 | |
adde6300 AM |
772 | x = ~avr_get_constant (str, 255); |
773 | str = input_line_pointer; | |
774 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
775 | } | |
776 | break; | |
777 | ||
778 | case 'K': | |
750bce0e NC |
779 | input_line_pointer = str; |
780 | avr_offset_expression (& op_expr); | |
781 | str = input_line_pointer; | |
782 | fix_new_exp (frag_now, where, 3, | |
783 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
784 | break; |
785 | ||
786 | case 'S': | |
787 | case 's': | |
788 | { | |
789 | unsigned int x; | |
1dab94dd | 790 | |
adde6300 AM |
791 | x = avr_get_constant (str, 7); |
792 | str = input_line_pointer; | |
793 | if (*op == 'S') | |
794 | x <<= 4; | |
795 | op_mask |= x; | |
796 | } | |
797 | break; | |
798 | ||
799 | case 'P': | |
800 | { | |
801 | unsigned int x; | |
1dab94dd | 802 | |
adde6300 AM |
803 | x = avr_get_constant (str, 63); |
804 | str = input_line_pointer; | |
805 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
806 | } | |
807 | break; | |
808 | ||
809 | case 'p': | |
810 | { | |
811 | unsigned int x; | |
1dab94dd | 812 | |
adde6300 AM |
813 | x = avr_get_constant (str, 31); |
814 | str = input_line_pointer; | |
815 | op_mask |= x << 3; | |
816 | } | |
817 | break; | |
1dab94dd | 818 | |
1188e082 DC |
819 | case '?': |
820 | break; | |
1dab94dd | 821 | |
adde6300 | 822 | default: |
00d2865b | 823 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 824 | } |
1dab94dd | 825 | |
adde6300 AM |
826 | *line = str; |
827 | return op_mask; | |
828 | } | |
829 | ||
830 | /* GAS will call this function for each section at the end of the assembly, | |
831 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 832 | |
adde6300 AM |
833 | valueT |
834 | md_section_align (seg, addr) | |
835 | asection *seg; | |
836 | valueT addr; | |
837 | { | |
838 | int align = bfd_get_section_alignment (stdoutput, seg); | |
839 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
840 | } | |
841 | ||
842 | /* If you define this macro, it should return the offset between the | |
843 | address of a PC relative fixup and the position from which the PC | |
844 | relative adjustment should be made. On many processors, the base | |
845 | of a PC relative instruction is the next instruction, so this | |
846 | macro would return the length of an instruction. */ | |
c6a7ab1f | 847 | |
adde6300 AM |
848 | long |
849 | md_pcrel_from_section (fixp, sec) | |
850 | fixS *fixp; | |
851 | segT sec; | |
852 | { | |
c6a7ab1f | 853 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
854 | && (!S_IS_DEFINED (fixp->fx_addsy) |
855 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
856 | return 0; | |
1dab94dd | 857 | |
adde6300 AM |
858 | return fixp->fx_frag->fr_address + fixp->fx_where; |
859 | } | |
860 | ||
861 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
862 | value in the object file. */ |
863 | ||
94f592af NC |
864 | void |
865 | md_apply_fix3 (fixP, valP, seg) | |
866 | fixS *fixP; | |
867 | valueT * valP; | |
adde6300 AM |
868 | segT seg; |
869 | { | |
870 | unsigned char *where; | |
871 | unsigned long insn; | |
a161fe53 | 872 | long value = *valP; |
adde6300 | 873 | |
94f592af NC |
874 | if (fixP->fx_addsy == (symbolS *) NULL) |
875 | fixP->fx_done = 1; | |
876 | ||
87733541 AM |
877 | else if (fixP->fx_pcrel) |
878 | { | |
879 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
880 | ||
881 | if (s == seg || s == absolute_section) | |
882 | { | |
883 | value += S_GET_VALUE (fixP->fx_addsy); | |
884 | fixP->fx_done = 1; | |
885 | } | |
886 | } | |
887 | ||
a161fe53 AM |
888 | /* We don't actually support subtracting a symbol. */ |
889 | if (fixP->fx_subsy != (symbolS *) NULL) | |
890 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 891 | |
94f592af | 892 | switch (fixP->fx_r_type) |
adde6300 AM |
893 | { |
894 | default: | |
94f592af | 895 | fixP->fx_no_overflow = 1; |
adde6300 AM |
896 | break; |
897 | case BFD_RELOC_AVR_7_PCREL: | |
898 | case BFD_RELOC_AVR_13_PCREL: | |
899 | case BFD_RELOC_32: | |
900 | case BFD_RELOC_16: | |
901 | case BFD_RELOC_AVR_CALL: | |
902 | break; | |
903 | } | |
904 | ||
94f592af | 905 | if (fixP->fx_done) |
adde6300 AM |
906 | { |
907 | /* Fetch the instruction, insert the fully resolved operand | |
908 | value, and stuff the instruction back again. */ | |
94f592af | 909 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
910 | insn = bfd_getl16 (where); |
911 | ||
94f592af | 912 | switch (fixP->fx_r_type) |
adde6300 AM |
913 | { |
914 | case BFD_RELOC_AVR_7_PCREL: | |
915 | if (value & 1) | |
94f592af | 916 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 917 | _("odd address operand: %ld"), value); |
1dab94dd | 918 | |
adde6300 AM |
919 | /* Instruction addresses are always right-shifted by 1. */ |
920 | value >>= 1; | |
921 | --value; /* Correct PC. */ | |
1dab94dd | 922 | |
adde6300 | 923 | if (value < -64 || value > 63) |
94f592af | 924 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
925 | _("operand out of range: %ld"), value); |
926 | value = (value << 3) & 0x3f8; | |
927 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
928 | break; | |
929 | ||
930 | case BFD_RELOC_AVR_13_PCREL: | |
931 | if (value & 1) | |
94f592af | 932 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 933 | _("odd address operand: %ld"), value); |
1dab94dd | 934 | |
adde6300 AM |
935 | /* Instruction addresses are always right-shifted by 1. */ |
936 | value >>= 1; | |
937 | --value; /* Correct PC. */ | |
adde6300 AM |
938 | |
939 | if (value < -2048 || value > 2047) | |
940 | { | |
65aa24b6 | 941 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 942 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 943 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
944 | _("operand out of range: %ld"), value); |
945 | } | |
946 | ||
947 | value &= 0xfff; | |
948 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
949 | break; | |
950 | ||
951 | case BFD_RELOC_32: | |
952 | bfd_putl16 ((bfd_vma) value, where); | |
953 | break; | |
954 | ||
955 | case BFD_RELOC_16: | |
956 | bfd_putl16 ((bfd_vma) value, where); | |
957 | break; | |
958 | ||
959 | case BFD_RELOC_AVR_16_PM: | |
c6a7ab1f | 960 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
961 | break; |
962 | ||
750bce0e NC |
963 | case BFD_RELOC_AVR_LDI: |
964 | if (value > 255) | |
965 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
966 | _("operand out of range: %ld"), value); | |
967 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
968 | break; | |
969 | ||
970 | case BFD_RELOC_AVR_6: | |
971 | if ((value > 63) || (value < 0)) | |
972 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
973 | _("operand out of range: %ld"), value); | |
974 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
975 | break; | |
976 | ||
977 | case BFD_RELOC_AVR_6_ADIW: | |
978 | if ((value > 63) || (value < 0)) | |
979 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
980 | _("operand out of range: %ld"), value); | |
981 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
982 | break; | |
983 | ||
adde6300 AM |
984 | case BFD_RELOC_AVR_LO8_LDI: |
985 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
986 | break; | |
987 | ||
988 | case -BFD_RELOC_AVR_LO8_LDI: | |
989 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
990 | break; | |
991 | ||
992 | case BFD_RELOC_AVR_HI8_LDI: | |
993 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
994 | break; | |
995 | ||
996 | case -BFD_RELOC_AVR_HI8_LDI: | |
997 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); | |
998 | break; | |
999 | ||
1000 | case BFD_RELOC_AVR_HH8_LDI: | |
1001 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1002 | break; | |
1003 | ||
1004 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1005 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1006 | break; | |
1007 | ||
1008 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1009 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1010 | break; | |
1011 | ||
1012 | case BFD_RELOC_AVR_HI8_LDI_NEG: | |
1013 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1014 | break; | |
1015 | ||
1016 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1017 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); | |
1018 | break; | |
1019 | ||
1020 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1021 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1022 | break; | |
1023 | ||
1024 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1025 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1026 | break; | |
1027 | ||
1028 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1029 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1030 | break; | |
1031 | ||
1032 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1033 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1034 | break; | |
1035 | ||
1036 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1037 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1038 | break; | |
1039 | ||
1040 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1041 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1042 | break; | |
1043 | ||
1044 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1045 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1046 | break; | |
1047 | ||
1048 | case BFD_RELOC_AVR_CALL: | |
1049 | { | |
1050 | unsigned long x; | |
1dab94dd | 1051 | |
adde6300 AM |
1052 | x = bfd_getl16 (where); |
1053 | if (value & 1) | |
94f592af | 1054 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1055 | _("odd address operand: %ld"), value); |
1056 | value >>= 1; | |
1057 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1058 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1059 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1060 | } |
1061 | break; | |
1062 | ||
1063 | default: | |
c6a7ab1f | 1064 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1065 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1066 | break; |
1067 | } | |
1068 | } | |
1069 | else | |
1070 | { | |
94f592af | 1071 | switch (fixP->fx_r_type) |
adde6300 AM |
1072 | { |
1073 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1074 | case -BFD_RELOC_AVR_HI8_LDI: | |
1075 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1076 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1077 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1078 | _("only constant expression allowed")); |
94f592af | 1079 | fixP->fx_done = 1; |
adde6300 AM |
1080 | break; |
1081 | default: | |
1082 | break; | |
1083 | } | |
adde6300 | 1084 | } |
adde6300 AM |
1085 | } |
1086 | ||
adde6300 AM |
1087 | /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS |
1088 | will pass the resulting reloc to `bfd_install_relocation'. This | |
1089 | currently works poorly, as `bfd_install_relocation' often does the | |
1090 | wrong thing, and instances of `tc_gen_reloc' have been written to | |
1091 | work around the problems, which in turns makes it difficult to fix | |
c6a7ab1f | 1092 | `bfd_install_relocation'. */ |
adde6300 AM |
1093 | |
1094 | /* If while processing a fixup, a reloc really needs to be created | |
1095 | then it is done here. */ | |
1096 | ||
1097 | arelent * | |
1098 | tc_gen_reloc (seg, fixp) | |
df136245 | 1099 | asection *seg ATTRIBUTE_UNUSED; |
adde6300 AM |
1100 | fixS *fixp; |
1101 | { | |
1102 | arelent *reloc; | |
1103 | ||
1104 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1105 | ||
1106 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
1107 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
1108 | ||
1109 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1110 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1111 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1112 | { | |
1113 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1114 | _("reloc %d not supported by object file format"), |
1115 | (int) fixp->fx_r_type); | |
adde6300 AM |
1116 | return NULL; |
1117 | } | |
1118 | ||
1119 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1120 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1121 | reloc->address = fixp->fx_offset; | |
1122 | ||
1123 | reloc->addend = fixp->fx_offset; | |
1124 | ||
1125 | return reloc; | |
1126 | } | |
1127 | ||
adde6300 AM |
1128 | void |
1129 | md_assemble (str) | |
1130 | char *str; | |
1131 | { | |
c6a7ab1f | 1132 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1133 | char op[11]; |
1134 | ||
c6a7ab1f | 1135 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1136 | |
1137 | if (!op[0]) | |
00d2865b | 1138 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1139 | |
1140 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1141 | ||
1142 | if (opcode == NULL) | |
1143 | { | |
00d2865b | 1144 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1145 | return; |
1146 | } | |
1147 | ||
b170af93 | 1148 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1149 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1150 | |
1188e082 DC |
1151 | if (*str && *opcode->constraints == '?') |
1152 | ++opcode; | |
b170af93 | 1153 | |
00d2865b NC |
1154 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1155 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 AM |
1156 | |
1157 | /* We used to set input_line_pointer to the result of get_operands, | |
1158 | but that is wrong. Our caller assumes we don't change it. */ | |
1159 | { | |
1160 | char *t = input_line_pointer; | |
1161 | avr_operands (opcode, &str); | |
b170af93 | 1162 | if (*skip_space (str)) |
00d2865b | 1163 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1164 | input_line_pointer = t; |
1165 | } | |
1166 | } | |
1167 | ||
1168 | /* Parse ordinary expression. */ | |
c6a7ab1f | 1169 | |
adde6300 AM |
1170 | static char * |
1171 | parse_exp (s, op) | |
1172 | char *s; | |
c6a7ab1f | 1173 | expressionS *op; |
adde6300 AM |
1174 | { |
1175 | input_line_pointer = s; | |
1176 | expression (op); | |
1177 | if (op->X_op == O_absent) | |
1178 | as_bad (_("missing operand")); | |
1179 | return input_line_pointer; | |
1180 | } | |
1181 | ||
adde6300 AM |
1182 | /* Parse special expressions (needed for LDI command): |
1183 | xx8 (address) | |
1184 | xx8 (-address) | |
1185 | pm_xx8 (address) | |
1186 | pm_xx8 (-address) | |
c6a7ab1f NC |
1187 | where xx is: hh, hi, lo. */ |
1188 | ||
adde6300 AM |
1189 | static bfd_reloc_code_real_type |
1190 | avr_ldi_expression (exp) | |
1191 | expressionS *exp; | |
1192 | { | |
1193 | char *str = input_line_pointer; | |
1194 | char *tmp; | |
1195 | char op[8]; | |
1196 | int mod; | |
1197 | tmp = str; | |
1198 | ||
1199 | str = extract_word (str, op, sizeof (op)); | |
1dab94dd | 1200 | |
adde6300 AM |
1201 | if (op[0]) |
1202 | { | |
1203 | mod = (int) hash_find (avr_mod_hash, op); | |
1dab94dd | 1204 | |
adde6300 AM |
1205 | if (mod) |
1206 | { | |
1207 | int closes = 0; | |
1dab94dd | 1208 | |
adde6300 AM |
1209 | mod -= 10; |
1210 | str = skip_space (str); | |
1dab94dd | 1211 | |
adde6300 AM |
1212 | if (*str == '(') |
1213 | { | |
1214 | int neg_p = 0; | |
1dab94dd | 1215 | |
adde6300 | 1216 | ++str; |
1dab94dd | 1217 | |
adde6300 AM |
1218 | if (strncmp ("pm(", str, 3) == 0 |
1219 | || strncmp ("-(pm(", str, 5) == 0) | |
1220 | { | |
c6a7ab1f | 1221 | if (HAVE_PM_P (mod)) |
adde6300 AM |
1222 | { |
1223 | ++mod; | |
1224 | ++closes; | |
1225 | } | |
1226 | else | |
00d2865b | 1227 | as_bad (_("illegal expression")); |
1dab94dd | 1228 | |
adde6300 AM |
1229 | if (*str == '-') |
1230 | { | |
1231 | neg_p = 1; | |
1232 | ++closes; | |
1233 | str += 5; | |
1234 | } | |
1235 | else | |
1236 | str += 3; | |
1237 | } | |
1dab94dd | 1238 | |
adde6300 AM |
1239 | if (*str == '-' && *(str + 1) == '(') |
1240 | { | |
1241 | neg_p ^= 1; | |
1242 | ++closes; | |
1243 | str += 2; | |
1244 | } | |
1dab94dd | 1245 | |
adde6300 AM |
1246 | input_line_pointer = str; |
1247 | expression (exp); | |
1dab94dd | 1248 | |
adde6300 AM |
1249 | do |
1250 | { | |
1251 | if (*input_line_pointer != ')') | |
1252 | { | |
00d2865b | 1253 | as_bad (_("`)' required")); |
adde6300 AM |
1254 | break; |
1255 | } | |
1256 | input_line_pointer++; | |
1257 | } | |
1258 | while (closes--); | |
1dab94dd | 1259 | |
adde6300 AM |
1260 | return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); |
1261 | } | |
1262 | } | |
1263 | } | |
1dab94dd | 1264 | |
adde6300 AM |
1265 | input_line_pointer = tmp; |
1266 | expression (exp); | |
00d2865b | 1267 | |
c6a7ab1f | 1268 | /* Warn about expressions that fail to use lo8 (). */ |
00d2865b NC |
1269 | if (exp->X_op == O_constant) |
1270 | { | |
1271 | int x = exp->X_add_number; | |
1272 | if (x < -255 || x > 255) | |
1273 | as_warn (_("constant out of 8-bit range: %d"), x); | |
1274 | } | |
00d2865b | 1275 | |
750bce0e | 1276 | return BFD_RELOC_AVR_LDI; |
adde6300 AM |
1277 | } |
1278 | ||
1279 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and | |
c6a7ab1f | 1280 | `avr_cons_fix_new'. */ |
adde6300 AM |
1281 | static int exp_mod_pm = 0; |
1282 | ||
1283 | /* Parse special CONS expression: pm (expression) | |
1284 | which is used for addressing to a program memory. | |
c6a7ab1f NC |
1285 | Relocation: BFD_RELOC_AVR_16_PM. */ |
1286 | ||
adde6300 AM |
1287 | void |
1288 | avr_parse_cons_expression (exp, nbytes) | |
1289 | expressionS *exp; | |
1290 | int nbytes; | |
1291 | { | |
c6a7ab1f | 1292 | char *tmp; |
adde6300 AM |
1293 | |
1294 | exp_mod_pm = 0; | |
1295 | ||
1296 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1297 | ||
1298 | if (nbytes == 2) | |
1299 | { | |
c6a7ab1f | 1300 | char *pm_name = "pm"; |
adde6300 | 1301 | int len = strlen (pm_name); |
1dab94dd | 1302 | |
adde6300 AM |
1303 | if (strncasecmp (input_line_pointer, pm_name, len) == 0) |
1304 | { | |
1305 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1306 | |
adde6300 AM |
1307 | if (*input_line_pointer == '(') |
1308 | { | |
1309 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1310 | exp_mod_pm = 1; | |
1311 | expression (exp); | |
1dab94dd | 1312 | |
adde6300 AM |
1313 | if (*input_line_pointer == ')') |
1314 | ++input_line_pointer; | |
1315 | else | |
1316 | { | |
00d2865b | 1317 | as_bad (_("`)' required")); |
adde6300 AM |
1318 | exp_mod_pm = 0; |
1319 | } | |
1dab94dd | 1320 | |
adde6300 AM |
1321 | return; |
1322 | } | |
1dab94dd | 1323 | |
adde6300 AM |
1324 | input_line_pointer = tmp; |
1325 | } | |
1326 | } | |
1dab94dd | 1327 | |
adde6300 AM |
1328 | expression (exp); |
1329 | } | |
1330 | ||
1331 | void | |
c6a7ab1f | 1332 | avr_cons_fix_new (frag, where, nbytes, exp) |
adde6300 AM |
1333 | fragS *frag; |
1334 | int where; | |
1335 | int nbytes; | |
1336 | expressionS *exp; | |
1337 | { | |
1338 | if (exp_mod_pm == 0) | |
1339 | { | |
1340 | if (nbytes == 2) | |
b34976b6 | 1341 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1342 | else if (nbytes == 4) |
b34976b6 | 1343 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1344 | else |
00d2865b | 1345 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1346 | } |
1347 | else | |
1348 | { | |
1349 | if (nbytes == 2) | |
b34976b6 | 1350 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); |
adde6300 | 1351 | else |
00d2865b | 1352 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1353 | exp_mod_pm = 0; |
1354 | } | |
1355 | } |