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* config/tc-avr.c: New AVR_ISA_ defined.
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
adde6300
AM		 1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include <stdio.h>
24#include <ctype.h>
25#include "as.h"
26#include "subsegs.h"
27
28const char comment_chars[] = ";";
29const char line_comment_chars[] = "#";
30const char line_separator_chars[] = "$";
31
b170af93
DC		 32#define AVR_ISA_1200 0x0001 /* in the beginning there was ... */
33#define AVR_ISA_LPM 0x0002 /* device has LPM */
34#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
35#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
36#define AVR_ISA_WRAP 0x0010 /* device has exactly 8K program memory */
37#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP, CALL) */
38#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, MOVW, ...) */
39#define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */
40#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] (none yet) */
41#define AVR_ISA_SPM 0x0200 /* device can program itself (<=64K) */
42#define AVR_ISA_ESPM 0x0400 /* device can program itself (>64K, none yet) */
43#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
44
45#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
46#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
47#define AVR_ISA_85xx (AVR_ISA_2xxx | AVR_ISA_WRAP)
48#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
49#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
50#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX | AVR_ISA_SPM)
51#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX)
52
53#define AVR_ISA_ALL 0xFFFF
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AM		 54
55const char *md_shortopts = "m:";
56struct mcu_type_s
57{
58 char *name;
59 int isa;
60 int mach;
61};
62
63static struct mcu_type_s mcu_types[] =
64{
b170af93
DC		 65 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
66 {"avr2", AVR_ISA_85xx, bfd_mach_avr2},
67 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
68 {"avr4", AVR_ISA_ALL, bfd_mach_avr4},
adde6300 69 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
b170af93
DC		 70 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1},
71 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
72 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
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AM		 75 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
76 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"attiny22" , AVR_ISA_2xxx, bfd_mach_avr2},
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
81 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2},
b170af93
DC		 83 {"at90s8515", AVR_ISA_85xx, bfd_mach_avr2},
84 {"at90s8535", AVR_ISA_85xx, bfd_mach_avr2},
85 {"at90c8534", AVR_ISA_85xx, bfd_mach_avr2},
86 {"atmega603", AVR_ISA_M603, bfd_mach_avr3},
87 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
88 {"atmega161", AVR_ISA_M161, bfd_mach_avr4},
89 {"at94k10", AVR_ISA_94K, bfd_mach_avr4},
90 {"at94k20", AVR_ISA_94K, bfd_mach_avr4},
91 {"at94k40", AVR_ISA_94K, bfd_mach_avr4},
adde6300
AM		 92 {NULL, 0, 0}
93};
94
95
96/* Current MCU type. */
97static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
98static struct mcu_type_s *avr_mcu = &default_mcu;
99
100const char EXP_CHARS[] = "eE";
101const char FLT_CHARS[] = "dD";
102static void avr_set_arch (int dummy);
103
104/* The target specific pseudo-ops which we support. */
105const pseudo_typeS md_pseudo_table[] =
106{
107 {"arch", avr_set_arch, 0},
108 { NULL, NULL, 0}
109};
110
111#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
b170af93
DC		 112#define REGISTER_P(x) ((x) == 'r' \
113 || (x) == 'd' \
114 || (x) == 'w' \
115 || (x) == 'a' \
116 || (x) == 'v')
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AM		 117
118struct avr_opcodes_s
119{
120 char *name;
121 char *constraints;
122 char *opcode;
123 int insn_size; /* in words */
124 int isa;
125 unsigned int bin_opcode;
126};
127
128static char * skip_space (char * s);
129static char * extract_word (char *from, char *to, int limit);
130static unsigned int avr_operand (struct avr_opcodes_s *opcode,
131 int where, char *op, char **line);
132static unsigned int avr_operands (struct avr_opcodes_s *opcode, char **line);
133static unsigned int avr_get_constant (char * str, unsigned int max);
134static char *parse_exp (char *s, expressionS * op);
135static bfd_reloc_code_real_type avr_ldi_expression (expressionS *exp);
136long md_pcrel_from_section PARAMS ((fixS *, segT));
137
b170af93 138
adde6300
AM		 139/* constraint letters
140 r - any register
141 d - `ldi' register (r16-r31)
b170af93
DC		 142 v - `movw' even register (r0, r2, ..., r28, r30)
143 a - `fmul' register (r16-r23)
144 w - `adiw' register (r24,r26,r28,r30)
145 e - pointer registers (X,Y,Z)
146 b - base pointer register and displacement ([YZ]+disp)
147 z - Z pointer register (for [e]lpm Rd,Z[+])
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AM		 148 M - immediate value from 0 to 255
149 n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
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AM		 150 s - immediate value from 0 to 7
151 P - Port address value from 0 to 64. (in, out)
152 p - Port address value from 0 to 32. (cbi, sbi, sbic, sbis)
153 K - immediate value from 0 to 64 (used in `adiw', `sbiw')
adde6300
AM		 154 i - immediate value
155 l - signed pc relative offset from -64 to 63
156 L - signed pc relative offset from -2048 to 2047
157 h - absolut code address (call, jmp)
158 S - immediate value from 0 to 7 (S = s << 4)
159*/
b170af93 160
adde6300
AM		 161struct avr_opcodes_s avr_opcodes[] =
162{
163 {"adc", "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00},
164 {"add", "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00},
165 {"and", "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000},
166 {"cp", "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400},
167 {"cpc", "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400},
168 {"cpse", "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000},
169 {"eor", "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400},
170 {"mov", "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00},
b170af93 171 {"mul", "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00},
adde6300
AM		 172 {"or", "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800},
173 {"sbc", "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800},
174 {"sub", "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800},
175
176 {"clr", "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400},
177 {"lsl", "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00},
178 {"rol", "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00},
179 {"tst", "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000},
180
181 {"andi", "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000},
182 /*XXX special case*/
183 {"cbr", "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000},
184 {"cpi", "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000},
185 {"ldi", "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000},
186 {"ori", "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000},
187 {"sbci", "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000},
188 {"sbr", "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000},
189 {"subi", "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000},
190
191 {"sbrc", "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00},
192 {"sbrs", "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00},
193 {"bld", "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800},
194 {"bst", "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00},
195
196 {"in", "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000},
197 {"out", "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800},
198
199 {"adiw", "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600},
200 {"sbiw", "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700},
201
202 {"cbi", "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800},
203 {"sbi", "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00},
204 {"sbic", "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900},
205 {"sbis", "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00},
206
207 /* ee = {X=11,Y=10,Z=00, 0} */
208 {"ld", "r,e", "100!000dddddee-+", 1, AVR_ISA_2xxx, 0x8000},
209 {"st", "e,r", "100!001rrrrree-+", 1, AVR_ISA_2xxx, 0x8200},
210 {"ldd", "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000},
211 {"std", "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200},
212 {"sts", "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200},
213 {"lds", "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000},
214
215 {"brbc", "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400},
216 {"brbs", "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000},
217
218 {"brcc", "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400},
219 {"brcs", "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000},
220 {"breq", "l", "111100lllllll001", 1, AVR_ISA_1200, 0xf001},
221 {"brge", "l", "111101lllllll100", 1, AVR_ISA_1200, 0xf404},
222 {"brhc", "l", "111101lllllll101", 1, AVR_ISA_1200, 0xf405},
223 {"brhs", "l", "111100lllllll101", 1, AVR_ISA_1200, 0xf005},
224 {"brid", "l", "111101lllllll111", 1, AVR_ISA_1200, 0xf407},
225 {"brie", "l", "111100lllllll111", 1, AVR_ISA_1200, 0xf007},
226 {"brlo", "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000},
227 {"brlt", "l", "111100lllllll100", 1, AVR_ISA_1200, 0xf004},
228 {"brmi", "l", "111100lllllll010", 1, AVR_ISA_1200, 0xf002},
229 {"brne", "l", "111101lllllll001", 1, AVR_ISA_1200, 0xf401},
230 {"brpl", "l", "111101lllllll010", 1, AVR_ISA_1200, 0xf402},
231 {"brsh", "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400},
232 {"brtc", "l", "111101lllllll110", 1, AVR_ISA_1200, 0xf406},
233 {"brts", "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006},
234 {"brvc", "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403},
235 {"brvs", "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003},
236
237 {"rcall", "L", "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000},
238 {"rjmp", "L", "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000},
239
240 {"call", "h", "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e},
241 {"jmp", "h", "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c},
242
243 {"asr", "r", "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405},
244 {"com", "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400},
245 {"dec", "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a},
246 {"inc", "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403},
247 {"lsr", "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406},
248 {"neg", "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401},
249 {"pop", "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f},
250 {"push", "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f},
251 {"ror", "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407},
252 {"ser", "d", "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f},
253 {"swap", "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402},
254
255 {"bclr", "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488},
256 {"bset", "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408},
257
258 {"clc", "", "1001010010001000", 1, AVR_ISA_1200, 0x9488},
259 {"clh", "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8},
260 {"cli", "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8},
261 {"cln", "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8},
262 {"cls", "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8},
263 {"clt", "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8},
264 {"clv", "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8},
265 {"clz", "", "1001010010011000", 1, AVR_ISA_1200, 0x9498},
266 {"icall","", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509},
267 {"ijmp", "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409},
b170af93 268 {"lpm", "", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8},
adde6300
AM		 269 {"nop", "", "0000000000000000", 1, AVR_ISA_1200, 0x0000},
270 {"ret", "", "1001010100001000", 1, AVR_ISA_1200, 0x9508},
271 {"reti", "", "1001010100011000", 1, AVR_ISA_1200, 0x9518},
272 {"sec", "", "1001010000001000", 1, AVR_ISA_1200, 0x9408},
273 {"seh", "", "1001010001011000", 1, AVR_ISA_1200, 0x9458},
274 {"sei", "", "1001010001111000", 1, AVR_ISA_1200, 0x9478},
275 {"sen", "", "1001010000101000", 1, AVR_ISA_1200, 0x9428},
276 {"ses", "", "1001010001001000", 1, AVR_ISA_1200, 0x9448},
277 {"set", "", "1001010001101000", 1, AVR_ISA_1200, 0x9468},
278 {"sev", "", "1001010000111000", 1, AVR_ISA_1200, 0x9438},
279 {"sez", "", "1001010000011000", 1, AVR_ISA_1200, 0x9418},
280 {"sleep","", "1001010110001000", 1, AVR_ISA_1200, 0x9588},
281 {"wdr", "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8},
b170af93
DC		 282 {"elpm", "", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8},
283 {"spm", "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8},
284 {"movw", "v,v", "00000001ddddrrrr", 1, AVR_ISA_MUL, 0x0100},
285 {"muls", "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200},
286 {"mulsu","a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300},
287 {"fmul", "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308},
288 {"fmuls","a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380},
289 {"fmulsu","a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388},
290 {"lpmx", "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004},
291 /* these are for devices that don't exists yet */
292 /* >64K program memory, new core */
293 {"elpmx","r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006},
294 {"espm", "", "1001010111111000", 1, AVR_ISA_ESPM, 0x95f8},
295 /* >128K program memory (PC = EIND:Z) */
296 {"eicall", "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519},
297 {"eijmp", "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419},
adde6300
AM		 298 {NULL, NULL, NULL, 0, 0, 0}
299};
300
301
302
303#define EXP_MOD_NAME(i) exp_mod[i].name
304#define EXP_MOD_RELOC(i) exp_mod[i].reloc
305#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
306#define HAVE_PM_P(i) exp_mod[i].have_pm
307
308struct exp_mod_s
309{
310 char * name;
311 bfd_reloc_code_real_type reloc;
312 bfd_reloc_code_real_type neg_reloc;
313 int have_pm;
314};
315
316static struct exp_mod_s exp_mod[] = {
317 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
318 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
319 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
320 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
321 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
322 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
323 {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
324 {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
325};
326
327/* Opcode hash table. */
328static struct hash_control *avr_hash;
329
330/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
331static struct hash_control *avr_mod_hash;
332
333#define OPTION_MMCU (OPTION_MD_BASE + 1)
334
335struct option md_longopts[] = {
336 {"mmcu", required_argument, NULL, 'm'},
337 {NULL, no_argument, NULL, 0}
338};
339size_t md_longopts_size = sizeof(md_longopts);
340
341static inline char *
342skip_space (s)
343 char * s;
344{
345 while (*s == ' ' || *s == '\t')
346 ++s;
347 return s;
348}
349
350/* Extract one word from FROM and copy it to TO. */
351static char *
352extract_word (char *from, char *to, int limit)
353{
354 char *op_start;
355 char *op_end;
356 int size = 0;
357
358 /* Drop leading whitespace. */
359 from = skip_space (from);
360 *to = 0;
361 /* Find the op code end. */
362 for (op_start = op_end = from; *op_end != 0 && is_part_of_name(*op_end); )
363 {
364 to[size++] = *op_end++;
365 if (size + 1 >= limit)
366 break;
367 }
368 to[size] = 0;
369 return op_end;
370}
371
372int
373md_estimate_size_before_relax (fragp, seg)
374 fragS *fragp;
375 asection *seg;
376{
377 abort ();
378 return 0;
379}
380
381void
382md_show_usage (stream)
383 FILE *stream;
384{
385 fprintf
386 (stream,
387 _ ("AVR options:\n"
388 " -mmcu=[avr-name] select microcontroller variant\n"
389 " [avr-name] can be:\n"
390 " avr1 - AT90S1200\n"
391 " avr2 - AT90S2xxx, AT90S4xxx, AT90S85xx, ATtiny22\n"
392 " avr3 - ATmega103 or ATmega603\n"
393 " avr4 - ATmega161\n"
394 " or immediate microcontroller name.\n"));
395}
396
397static void
398avr_set_arch (dummy)
399 int dummy;
400{
401 char * str;
402 str = (char *)alloca (20);
403 input_line_pointer = extract_word (input_line_pointer, str, 20);
404 md_parse_option ('m', str);
405 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
406}
407
408int
409md_parse_option (c, arg)
410 int c;
411 char *arg;
412{
413 char *t = alloca (strlen (arg) + 1);
414 char *s = t;
415 char *arg1 = arg;
416 do
417 *t = tolower (*arg1++);
418 while (*t++);
419
420 if (c == 'm')
421 {
422 int i;
423
424 for (i = 0; mcu_types[i].name; ++i)
425 if (strcmp (mcu_types[i].name, s) == 0)
426 break;
427
428 if (!mcu_types[i].name)
429 as_fatal (_ ("unknown MCU: %s\n"), arg);
430 if (avr_mcu == &default_mcu)
431 avr_mcu = &mcu_types[i];
432 else
433 as_fatal (_ ("redefinition of mcu type `%s'"), mcu_types[i].name);
434 return 1;
435 }
436 return 0;
437}
438
439symbolS *
b170af93
DC		 440md_undefined_symbol(name)
441 char *name;
adde6300
AM		 442{
443 return 0;
444}
445
446/* Convert a string pointed to by input_line_pointer into a floating point
447 constant of type `type', and store the appropriate bytes to `*litP'.
448 The number of LITTLENUMS emitted is stored in `*sizeP'. Returns NULL if
449 OK, or an error message otherwise. */
450char *
451md_atof (type, litP, sizeP)
452 int type;
453 char *litP;
454 int *sizeP;
455{
456 int prec;
457 LITTLENUM_TYPE words[4];
458 LITTLENUM_TYPE *wordP;
459 char *t;
460
461 switch (type)
462 {
463 case 'f':
464 prec = 2;
465 break;
466 case 'd':
467 prec = 4;
468 break;
469 default:
470 *sizeP = 0;
471 return _("bad call to md_atof");
472 }
473
474 t = atof_ieee (input_line_pointer, type, words);
475 if (t)
476 input_line_pointer = t;
477
478 *sizeP = prec * sizeof (LITTLENUM_TYPE);
479 /* This loop outputs the LITTLENUMs in REVERSE order. */
480 for (wordP = words + prec - 1; prec--;)
481 {
482 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
483 litP += sizeof (LITTLENUM_TYPE);
484 }
485 return NULL;
486}
487
488void
489md_convert_frag (abfd, sec, fragP)
490 bfd *abfd;
491 asection *sec;
492 fragS *fragP;
493{
494 abort ();
495}
496
497
498void
499md_begin ()
500{
501 int i;
502 struct avr_opcodes_s *opcode;
503 avr_hash = hash_new();
504
505 /* Insert unique names into hash table. This hash table then provides a
506 quick index to the first opcode with a particular name in the opcode
507 table. */
508
509 for (opcode = avr_opcodes; opcode->name; opcode++)
510 hash_insert (avr_hash, opcode->name, (char *) opcode);
511
512 avr_mod_hash = hash_new ();
513
514 for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i)
515 hash_insert (avr_mod_hash, EXP_MOD_NAME(i), (void*)(i+10));
516
b170af93
DC		 517 /* Construct symbols for each register */
518 /* FIXME: register names are in the same namespace as labels.
519 This means that C functions or global variables with the same
520 name as a register will cause assembler errors, even though
521 such names (r0-r31) are perfectly valid in C. I'd suggest to
522 put '%' or "." in front of register names both here and in avr-gcc. */
523
adde6300
AM		 524 for (i = 0; i < 32; i++)
525 {
b170af93 526 char buf[10];
adde6300
AM		 527
528 sprintf (buf, "r%d", i);
529 symbol_table_insert (symbol_new (buf, reg_section, i,
530 &zero_address_frag));
531 sprintf (buf, "R%d", i);
532 symbol_table_insert (symbol_new (buf, reg_section, i,
533 &zero_address_frag));
534 }
b170af93 535
adde6300
AM		 536 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
537}
538
539
540static unsigned int
541avr_operands (opcode, line)
542 struct avr_opcodes_s *opcode;
543 char **line;
544{
545 char *op = opcode->constraints;
546 unsigned int bin = opcode->bin_opcode;
547 char *frag = frag_more (opcode->insn_size * 2);
548 char *str = *line;
549 int where = frag - frag_now->fr_literal;
b170af93 550 static unsigned int prev = 0; /* previous opcode */
adde6300
AM		 551
552 /* Opcode have operands. */
553 if (*op)
554 {
555 unsigned int reg1 = 0;
556 unsigned int reg2 = 0;
557 int reg1_present = 0;
558 int reg2_present = 0;
559
560 /* Parse first operand. */
561 if (REGISTER_P (*op))
562 reg1_present = 1;
563 reg1 = avr_operand (opcode, where, op, &str);
564 ++op;
565
566 /* Parse second operand. */
567 if (*op)
568 {
569 if (*op == ',')
570 ++op;
571 if (*op == '=')
572 {
573 reg2 = reg1;
574 reg2_present = 1;
575 }
576 else
577 {
578 if (REGISTER_P (*op))
579 reg2_present = 1;
580
581 str = skip_space (str);
582 if (*str++ != ',')
583 as_bad (_ ("`,' required"));
584 str = skip_space (str);
585
586 reg2 = avr_operand (opcode, where, op, &str);
587
588 }
589 if (reg1_present && reg2_present)
590 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
591 else if (reg2_present)
592 reg2 <<= 4;
593 }
594 if (reg1_present)
595 reg1 <<= 4;
596 bin |= reg1 | reg2;
597 }
b170af93
DC		 598
599 /* detect undefined combinations (like lpm r31,Z+) */
600 if (((bin & 0xFDEF) == 0x91AD) || ((bin & 0xFDEF) == 0x91AE) ||
601 ((bin & 0xFDEF) == 0x91C9) || ((bin & 0xFDEF) == 0x91CA) ||
602 ((bin & 0xFDEF) == 0x91E1) || ((bin & 0xFDEF) == 0x91E2) ||
603 ((bin & 0xFFED) == 0x91E5))
604 as_warn( _("undefined combination of operands"));
605
adde6300
AM		 606 if (opcode->insn_size == 2)
607 {
b170af93
DC		 608 /* warn if previous opcode was cpse/sbic/sbis/sbrc/sbrs
609 (AVR core bug) */
610 if ((prev & 0xFC00) == 0x1000
611 || (prev & 0xFD00) == 0x9900
612 || (prev & 0xFC08) == 0xFC00)
613 as_warn (_("skipping two-word instruction"));
614
adde6300
AM		 615 bfd_putl32 ((bfd_vma)bin, frag);
616 }
617 else
b170af93
DC		 618 bfd_putl16 ((bfd_vma)bin, frag);
619
620 prev = bin;
adde6300
AM		 621 *line = str;
622 return bin;
623}
624
625static unsigned int
626avr_get_constant (str, max)
627 char * str;
628 unsigned int max;
629{
630 expressionS ex;
631 str = skip_space (str);
632 input_line_pointer = str;
633 expression (&ex);
634
635 if (ex.X_op != O_constant)
636 as_bad (_("constant value required"));
637
638 if (ex.X_add_number > max)
639 as_bad (_("number must be less than %d"), max+1);
640 return ex.X_add_number;
641}
642
643static unsigned int
644avr_operand (opcode, where, op, line)
645 struct avr_opcodes_s *opcode;
646 int where;
647 char *op;
648 char **line;
649{
650 unsigned int op_mask = 0;
651 char *str = *line;
652 expressionS op_expr;
653
654 str = skip_space (str);
655 switch (*op)
656 {
657 /* Any register operand. */
658 case 'w':
659 case 'd':
660 case 'r':
b170af93
DC		 661 case 'a':
662 case 'v':
adde6300
AM		 663 {
664 char r_name[256];
b170af93
DC		 665 op_mask = -1;
666
adde6300 667 str = extract_word (str, r_name, sizeof (r_name));
b170af93
DC		 668 if (r_name[0] == 'r' || r_name[0] == 'R')
669 {
670 if (isdigit(r_name[1]))
671 {
672 if (r_name[2] == '\0')
673 op_mask = r_name[1] - '0';
674 else if (r_name[1] != '0'
675 && isdigit(r_name[2])
676 && r_name[3] == '\0')
677 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
678 }
679 }
680 else
681 {
682 parse_exp (r_name, &op_expr);
683 if (op_expr.X_op == O_register)
684 op_mask = op_expr.X_add_number;
685 }
686
687 if (op_mask <= 31 && op_mask >= 0)
adde6300 688 {
b170af93 689 switch (*op)
adde6300 690 {
b170af93
DC		 691 case 'a':
692 if (op_mask < 16 || op_mask > 23)
693 as_bad (_ ("register r16-r23 required"));
694 op_mask -= 16;
695 break;
696
697 case 'd':
698 if (op_mask < 16)
699 as_bad (_ ("register number above 15 required"));
700 op_mask -= 16;
701 break;
702
703 case 'v':
704 if (op_mask & 1)
705 as_bad (_ ("even register number required"));
706 op_mask >>= 1;
707 break;
708
709 case 'w':
710 op_mask -= 24;
711 if (op_mask & 1 || op_mask > 6)
712 as_bad (_ ("register r24,r26,r28 or r30 required"));
713 op_mask >>= 1;
adde6300
AM		 714 break;
715 }
b170af93 716 break;
adde6300
AM		 717 }
718 as_bad (_ ("register required"));
719 }
720 break;
721
722 case 'e':
723 {
724 char c;
725 if (*str == '-')
726 {
727 str = skip_space (str+1);
728 op_mask = 0x1002;
729 }
730 c = tolower (*str);
731 if (c == 'x')
732 op_mask |= 0x100c;
733 else if (c == 'y')
734 op_mask |= 0x8;
735 else if (c != 'z')
736 as_bad (_ ("pointer register (X,Y or Z) required"));
737
738 str = skip_space (str+1);
739 if (*str == '+')
740 {
741 ++str;
742 if (op_mask & 2)
743 as_bad (_ ("cannot both predecrement and postincrement"));
744 op_mask |= 0x1001;
745 }
746 }
747 break;
748
b170af93
DC		 749 case 'z':
750 {
751 if (*str == '-')
752 as_bad (_ ("can't predecrement"));
753
754 if (! (*str == 'z' || *str == 'Z'))
755 as_bad (_ ("pointer register Z required"));
756
757 str = skip_space (str + 1);
758 if (*str == '+')
759 {
760 ++str;
761 op_mask |= 1;
762 }
763 }
764 break;
765
adde6300
AM		 766 case 'b':
767 {
768 char c = tolower (*str++);
769 if (c == 'y')
770 op_mask |= 0x8;
771 else if (c != 'z')
772 as_bad (_ ("pointer register (Y or Z) required"));
773 str = skip_space (str);
774 if (*str++ == '+')
775 {
776 unsigned int x;
777 x = avr_get_constant (str, 63);
778 str = input_line_pointer;
779 op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8);
780 }
781 }
782 break;
783
784 case 'h':
785 {
786 str = parse_exp (str, &op_expr);
787 fix_new_exp (frag_now, where, opcode->insn_size * 2,
788 &op_expr, false, BFD_RELOC_AVR_CALL);
789
790 }
791 break;
792
793 case 'L':
794 {
795 str = parse_exp (str, &op_expr);
796 fix_new_exp (frag_now, where, opcode->insn_size * 2,
797 &op_expr, true, BFD_RELOC_AVR_13_PCREL);
798
799 }
800 break;
801
802 case 'l':
803 {
804 str = parse_exp (str, &op_expr);
805 fix_new_exp (frag_now, where, opcode->insn_size * 2,
806 &op_expr, true, BFD_RELOC_AVR_7_PCREL);
807
808 }
809 break;
810
811 case 'i':
812 {
813 str = parse_exp (str, &op_expr);
814 fix_new_exp (frag_now, where+2, opcode->insn_size * 2,
815 &op_expr, false, BFD_RELOC_16);
816
817 }
818 break;
819
820 case 'M':
821 {
822 bfd_reloc_code_real_type r_type;
823 input_line_pointer = str;
824 r_type = avr_ldi_expression (&op_expr);
825 str = input_line_pointer;
826 fix_new_exp (frag_now, where, 3,
827 &op_expr, false, r_type);
828 }
829 break;
830
831 case 'n':
832 {
833 unsigned int x;
834 x = ~avr_get_constant (str, 255);
835 str = input_line_pointer;
836 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
837 }
838 break;
839
840 case 'K':
841 {
842 unsigned int x;
843 x = avr_get_constant (str, 63);
844 str = input_line_pointer;
845 op_mask |= (x & 0xf) | ((x & 0x30) << 2);
846 }
847 break;
848
849 case 'S':
850 case 's':
851 {
852 unsigned int x;
853 x = avr_get_constant (str, 7);
854 str = input_line_pointer;
855 if (*op == 'S')
856 x <<= 4;
857 op_mask |= x;
858 }
859 break;
860
861 case 'P':
862 {
863 unsigned int x;
864 x = avr_get_constant (str, 63);
865 str = input_line_pointer;
866 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
867 }
868 break;
869
870 case 'p':
871 {
872 unsigned int x;
873 x = avr_get_constant (str, 31);
874 str = input_line_pointer;
875 op_mask |= x << 3;
876 }
877 break;
878 default:
879 as_bad (_ ("unknown constraint `%c'"), *op);
880 }
881 *line = str;
882 return op_mask;
883}
884
885/* GAS will call this function for each section at the end of the assembly,
886 to permit the CPU backend to adjust the alignment of a section. */
887valueT
888md_section_align (seg, addr)
889 asection *seg;
890 valueT addr;
891{
892 int align = bfd_get_section_alignment (stdoutput, seg);
893 return ((addr + (1 << align) - 1) & (-1 << align));
894}
895
896/* If you define this macro, it should return the offset between the
897 address of a PC relative fixup and the position from which the PC
898 relative adjustment should be made. On many processors, the base
899 of a PC relative instruction is the next instruction, so this
900 macro would return the length of an instruction. */
901long
902md_pcrel_from_section (fixp, sec)
903 fixS *fixp;
904 segT sec;
905{
906 if (fixp->fx_addsy != (symbolS *)NULL
907 && (!S_IS_DEFINED (fixp->fx_addsy)
908 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
909 return 0;
910 return fixp->fx_frag->fr_address + fixp->fx_where;
911}
912
913/* GAS will call this for each fixup. It should store the correct
914 value in the object file. */
915int
916md_apply_fix3 (fixp, valuep, seg)
917 fixS *fixp;
918 valueT *valuep;
919 segT seg;
920{
921 unsigned char *where;
922 unsigned long insn;
923 long value;
924
925 if (fixp->fx_addsy == (symbolS *) NULL)
926 {
927 value = *valuep;
928 fixp->fx_done = 1;
929 }
930 else if (fixp->fx_pcrel)
931 {
932 segT s = S_GET_SEGMENT (fixp->fx_addsy);
933 if (fixp->fx_addsy && (s == seg || s == absolute_section))
934 {
935 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
936 fixp->fx_done = 1;
937 }
938 else
939 value = *valuep;
940 }
941 else
942 {
943 value = fixp->fx_offset;
944 if (fixp->fx_subsy != (symbolS *) NULL)
945 {
946 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
947 {
948 value -= S_GET_VALUE (fixp->fx_subsy);
949 fixp->fx_done = 1;
950 }
951 else
952 {
953 /* We don't actually support subtracting a symbol. */
954 as_bad_where (fixp->fx_file, fixp->fx_line,
955 _ ("expression too complex"));
956 }
957 }
958 }
959 switch (fixp->fx_r_type)
960 {
961 default:
962 fixp->fx_no_overflow = 1;
963 break;
964 case BFD_RELOC_AVR_7_PCREL:
965 case BFD_RELOC_AVR_13_PCREL:
966 case BFD_RELOC_32:
967 case BFD_RELOC_16:
968 case BFD_RELOC_AVR_CALL:
969 break;
970 }
971
972 if (fixp->fx_done)
973 {
974 /* Fetch the instruction, insert the fully resolved operand
975 value, and stuff the instruction back again. */
976 where = fixp->fx_frag->fr_literal + fixp->fx_where;
977 insn = bfd_getl16 (where);
978
979 switch (fixp->fx_r_type)
980 {
981 case BFD_RELOC_AVR_7_PCREL:
982 if (value & 1)
983 as_bad_where (fixp->fx_file, fixp->fx_line,
984 _("odd address operand: %ld"), value);
985 /* Instruction addresses are always right-shifted by 1. */
986 value >>= 1;
987 --value; /* Correct PC. */
988 if (value < -64 || value > 63)
989 as_bad_where (fixp->fx_file, fixp->fx_line,
990 _("operand out of range: %ld"), value);
991 value = (value << 3) & 0x3f8;
992 bfd_putl16 ((bfd_vma) (value | insn), where);
993 break;
994
995 case BFD_RELOC_AVR_13_PCREL:
996 if (value & 1)
997 as_bad_where (fixp->fx_file, fixp->fx_line,
998 _("odd address operand: %ld"), value);
999 /* Instruction addresses are always right-shifted by 1. */
1000 value >>= 1;
1001 --value; /* Correct PC. */
adde6300
AM		 1002
1003 if (value < -2048 || value > 2047)
1004 {
b170af93 1005 if (avr_mcu->isa & AVR_ISA_WRAP)
adde6300
AM		 1006 {
1007 if (value > 2047)
1008 value -= 4096;
1009 else
1010 value += 4096;
1011 }
1012 else
1013 as_bad_where (fixp->fx_file, fixp->fx_line,
1014 _("operand out of range: %ld"), value);
1015 }
1016
1017 value &= 0xfff;
1018 bfd_putl16 ((bfd_vma) (value | insn), where);
1019 break;
1020
1021 case BFD_RELOC_32:
1022 bfd_putl16 ((bfd_vma) value, where);
1023 break;
1024
1025 case BFD_RELOC_16:
1026 bfd_putl16 ((bfd_vma) value, where);
1027 break;
1028
1029 case BFD_RELOC_AVR_16_PM:
1030 bfd_putl16 ((bfd_vma) (value>>1), where);
1031 break;
1032
1033 case BFD_RELOC_AVR_LO8_LDI:
1034 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1035 break;
1036
1037 case -BFD_RELOC_AVR_LO8_LDI:
1038 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1039 break;
1040
1041 case BFD_RELOC_AVR_HI8_LDI:
1042 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1043 break;
1044
1045 case -BFD_RELOC_AVR_HI8_LDI:
1046 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1047 break;
1048
1049 case BFD_RELOC_AVR_HH8_LDI:
1050 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1051 break;
1052
1053 case BFD_RELOC_AVR_LO8_LDI_NEG:
1054 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1055 break;
1056
1057 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1058 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1059 break;
1060
1061 case BFD_RELOC_AVR_HI8_LDI_NEG:
1062 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1063 break;
1064
1065 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1066 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1067 break;
1068
1069 case BFD_RELOC_AVR_HH8_LDI_NEG:
1070 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1071 break;
1072
1073 case BFD_RELOC_AVR_LO8_LDI_PM:
1074 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1075 break;
1076
1077 case BFD_RELOC_AVR_HI8_LDI_PM:
1078 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1079 break;
1080
1081 case BFD_RELOC_AVR_HH8_LDI_PM:
1082 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1083 break;
1084
1085 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1086 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1087 break;
1088
1089 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1090 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1091 break;
1092
1093 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1094 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1095 break;
1096
1097 case BFD_RELOC_AVR_CALL:
1098 {
1099 unsigned long x;
1100 x = bfd_getl16 (where);
1101 if (value & 1)
1102 as_bad_where (fixp->fx_file, fixp->fx_line,
1103 _("odd address operand: %ld"), value);
1104 value >>= 1;
1105 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1106 bfd_putl16 ((bfd_vma) x, where);
1107 bfd_putl16 ((bfd_vma) (value & 0xffff), where+2);
1108 }
1109 break;
1110
1111 default:
1112 as_fatal ( _("line %d: unknown relocation type: 0x%x"),
1113 fixp->fx_line, fixp->fx_r_type);
1114 break;
1115 }
1116 }
1117 else
1118 {
1119 switch (fixp->fx_r_type)
1120 {
1121 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1122 case -BFD_RELOC_AVR_HI8_LDI:
1123 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1124 case -BFD_RELOC_AVR_LO8_LDI:
1125 as_bad_where (fixp->fx_file, fixp->fx_line,
1126 _("only constant expression allowed"));
1127 fixp->fx_done = 1;
1128 break;
1129 default:
1130 break;
1131 }
1132 fixp->fx_addnumber = value;
1133 }
1134 return 0;
1135}
1136
1137
1138/* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1139 will pass the resulting reloc to `bfd_install_relocation'. This
1140 currently works poorly, as `bfd_install_relocation' often does the
1141 wrong thing, and instances of `tc_gen_reloc' have been written to
1142 work around the problems, which in turns makes it difficult to fix
1143 `bfd_install_relocation'. */
1144
1145/* If while processing a fixup, a reloc really needs to be created
1146 then it is done here. */
1147
1148arelent *
1149tc_gen_reloc (seg, fixp)
1150 asection *seg;
1151 fixS *fixp;
1152{
1153 arelent *reloc;
1154
1155 reloc = (arelent *) xmalloc (sizeof (arelent));
1156
1157 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1158 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1159
1160 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1161 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1162 if (reloc->howto == (reloc_howto_type *) NULL)
1163 {
1164 as_bad_where (fixp->fx_file, fixp->fx_line,
1165 _("reloc %d not supported by object file format"),
1166 (int)fixp->fx_r_type);
1167 return NULL;
1168 }
1169
1170 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1171 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1172 reloc->address = fixp->fx_offset;
1173
1174 reloc->addend = fixp->fx_offset;
1175
1176 return reloc;
1177}
1178
1179
1180void
1181md_assemble (str)
1182 char *str;
1183{
1184 struct avr_opcodes_s * opcode;
1185 char op[11];
1186
1187 str = extract_word (str, op, sizeof(op));
1188
1189 if (!op[0])
1190 as_bad (_ ("can't find opcode "));
1191
1192 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1193
1194 if (opcode == NULL)
1195 {
1196 as_bad (_ ("unknown opcode `%s'"), op);
1197 return;
1198 }
1199
b170af93
DC		 1200 /* Special case for opcodes with optional operands (lpm, elpm) -
1201 version with operands is listed in avr_opcodes[] with "x" suffix. */
1202
1203 if (*str && !(*opcode->constraints))
1204 {
1205 struct avr_opcodes_s *opc1;
1206
1207 /* known opcode, so strlen(op) <= 6 and strcat() should be safe */
1208 strcat(op, "x");
1209 opc1 = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1210
1211 /* if unknown, just forget it and use the original opcode */
1212 if (opc1)
1213 opcode = opc1;
1214 }
1215
adde6300
AM		 1216 if ((opcode->isa & avr_mcu->isa) != opcode->isa)
1217 as_bad (_ ("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1218
1219 /* We used to set input_line_pointer to the result of get_operands,
1220 but that is wrong. Our caller assumes we don't change it. */
1221 {
1222 char *t = input_line_pointer;
1223 avr_operands (opcode, &str);
b170af93 1224 if (*skip_space (str))
adde6300
AM		 1225 as_bad (_ ("garbage at end of line"));
1226 input_line_pointer = t;
1227 }
1228}
1229
1230/* Parse ordinary expression. */
1231static char *
1232parse_exp (s, op)
1233 char *s;
1234 expressionS * op;
1235{
1236 input_line_pointer = s;
1237 expression (op);
1238 if (op->X_op == O_absent)
1239 as_bad (_("missing operand"));
1240 return input_line_pointer;
1241}
1242
1243
1244/* Parse special expressions (needed for LDI command):
1245 xx8 (address)
1246 xx8 (-address)
1247 pm_xx8 (address)
1248 pm_xx8 (-address)
1249 where xx is: hh, hi, lo
1250*/
1251static bfd_reloc_code_real_type
1252avr_ldi_expression (exp)
1253 expressionS *exp;
1254{
1255 char *str = input_line_pointer;
1256 char *tmp;
1257 char op[8];
1258 int mod;
1259 tmp = str;
1260
1261 str = extract_word (str, op, sizeof (op));
1262 if (op[0])
1263 {
1264 mod = (int) hash_find (avr_mod_hash, op);
1265 if (mod)
1266 {
1267 int closes = 0;
1268 mod -= 10;
1269 str = skip_space (str);
1270 if (*str == '(')
1271 {
1272 int neg_p = 0;
1273 ++str;
1274 if (strncmp ("pm(", str, 3) == 0
1275 || strncmp ("-(pm(", str, 5) == 0)
1276 {
1277 if (HAVE_PM_P(mod))
1278 {
1279 ++mod;
1280 ++closes;
1281 }
1282 else
1283 as_bad (_ ("illegal expression"));
1284 if (*str == '-')
1285 {
1286 neg_p = 1;
1287 ++closes;
1288 str += 5;
1289 }
1290 else
1291 str += 3;
1292 }
1293 if (*str == '-' && *(str + 1) == '(')
1294 {
1295 neg_p ^= 1;
1296 ++closes;
1297 str += 2;
1298 }
1299 input_line_pointer = str;
1300 expression (exp);
1301 do
1302 {
1303 if (*input_line_pointer != ')')
1304 {
1305 as_bad (_ ("`)' required"));
1306 break;
1307 }
1308 input_line_pointer++;
1309 }
1310 while (closes--);
1311 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
1312 }
1313 }
1314 }
1315 input_line_pointer = tmp;
1316 expression (exp);
1317 return BFD_RELOC_AVR_LO8_LDI;
1318}
1319
1320/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1321 `avr_cons_fix_new' */
1322static int exp_mod_pm = 0;
1323
1324/* Parse special CONS expression: pm (expression)
1325 which is used for addressing to a program memory.
1326 Relocation: BFD_RELOC_AVR_16_PM */
1327void
1328avr_parse_cons_expression (exp, nbytes)
1329 expressionS *exp;
1330 int nbytes;
1331{
1332 char * tmp;
1333
1334 exp_mod_pm = 0;
1335
1336 tmp = input_line_pointer = skip_space (input_line_pointer);
1337
1338 if (nbytes == 2)
1339 {
1340 char * pm_name = "pm";
1341 int len = strlen (pm_name);
1342 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1343 {
1344 input_line_pointer = skip_space (input_line_pointer + len);
1345 if (*input_line_pointer == '(')
1346 {
1347 input_line_pointer = skip_space (input_line_pointer + 1);
1348 exp_mod_pm = 1;
1349 expression (exp);
1350 if (*input_line_pointer == ')')
1351 ++input_line_pointer;
1352 else
1353 {
1354 as_bad (_ ("`)' required"));
1355 exp_mod_pm = 0;
1356 }
1357 return;
1358 }
1359 input_line_pointer = tmp;
1360 }
1361 }
1362 expression (exp);
1363}
1364
1365void
1366avr_cons_fix_new(frag, where, nbytes, exp)
1367 fragS *frag;
1368 int where;
1369 int nbytes;
1370 expressionS *exp;
1371{
1372 if (exp_mod_pm == 0)
1373 {
1374 if (nbytes == 2)
1375 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16);
1376 else if (nbytes == 4)
1377 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32);
1378 else
1379 as_bad (_ ("illegal %srelocation size: %d"), "", nbytes);
1380 }
1381 else
1382 {
1383 if (nbytes == 2)
1384 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM);
1385 else
1386 as_bad (_ ("illegal %srelocation size: %d"), "`pm' ", nbytes);
1387 exp_mod_pm = 0;
1388 }
1389}
GDB Binutils - Deliverables
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