Commit | Line | Data |
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a39116f1 | 1 | /* tc-h8300.c -- Assemble code for the Hitachi H8/300 |
7c2d4011 | 2 | Copyright (C) 1991, 1992 Free Software Foundation. |
025b0302 | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
025b0302 | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
025b0302 | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
025b0302 | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
dcb195f8 | 18 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
f5e8a8f9 SC |
19 | |
20 | ||
025b0302 | 21 | /* |
cd8761e1 | 22 | Written By Steve Chamberlain |
5d9f0ecf | 23 | sac@cygnus.com |
a39116f1 | 24 | */ |
cd8761e1 SC |
25 | |
26 | #include <stdio.h> | |
27 | #include "as.h" | |
28 | #include "bfd.h" | |
025b0302 ME |
29 | #define DEFINE_TABLE |
30 | #define h8_opcodes ops | |
5d9f0ecf | 31 | #include "opcode/h8300.h" |
cd8761e1 SC |
32 | #include <ctype.h> |
33 | ||
025b0302 ME |
34 | const char comment_chars[] = |
35 | {';', 0}; | |
36 | const char line_separator_chars[] = | |
091f3a62 | 37 | {0}; |
025b0302 | 38 | const char line_comment_chars[] = "#"; |
cd8761e1 SC |
39 | |
40 | /* This table describes all the machine specific pseudo-ops the assembler | |
41 | has to support. The fields are: | |
5d9f0ecf SC |
42 | pseudo-op name without dot |
43 | function to call to execute this pseudo-op | |
44 | Integer arg to pass to the function | |
a39116f1 | 45 | */ |
17b81479 | 46 | |
025b0302 ME |
47 | void cons (); |
48 | ||
49 | int Hmode; | |
be4931ba | 50 | int Smode; |
025b0302 ME |
51 | #define PSIZE (Hmode ? L_32 : L_16) |
52 | #define DMODE (L_16) | |
53 | #define DSYMMODE (Hmode ? L_24 : L_16) | |
54 | int bsize = L_8; /* default branch displacement */ | |
55 | ||
56 | ||
091f3a62 | 57 | void |
025b0302 ME |
58 | h8300hmode () |
59 | { | |
60 | Hmode = 1; | |
be4931ba | 61 | Smode = 0; |
025b0302 ME |
62 | } |
63 | ||
be4931ba ILT |
64 | void |
65 | h8300smode () | |
66 | { | |
67 | Smode = 1; | |
68 | Hmode = 1; | |
69 | } | |
091f3a62 | 70 | void |
025b0302 ME |
71 | sbranch (size) |
72 | int size; | |
73 | { | |
74 | bsize = size; | |
75 | } | |
5d9f0ecf | 76 | |
091f3a62 KR |
77 | static void pint () |
78 | { | |
79 | cons (Hmode ? 4 : 2); | |
80 | } | |
81 | ||
025b0302 | 82 | const pseudo_typeS md_pseudo_table[] = |
7c2d4011 | 83 | { |
025b0302 ME |
84 | |
85 | {"h8300h", h8300hmode, 0}, | |
be4931ba | 86 | {"h8300s", h8300smode, 0}, |
025b0302 ME |
87 | {"sbranch", sbranch, L_8}, |
88 | {"lbranch", sbranch, L_16}, | |
89 | ||
091f3a62 | 90 | {"int", pint, 0}, |
025b0302 ME |
91 | {"data.b", cons, 1}, |
92 | {"data.w", cons, 2}, | |
93 | {"data.l", cons, 4}, | |
94 | {"form", listing_psize, 0}, | |
95 | {"heading", listing_title, 0}, | |
96 | {"import", s_ignore, 0}, | |
97 | {"page", listing_eject, 0}, | |
98 | {"program", s_ignore, 0}, | |
99 | {0, 0, 0} | |
cd8761e1 SC |
100 | }; |
101 | ||
025b0302 | 102 | const int md_reloc_size; |
a39116f1 | 103 | |
cd8761e1 SC |
104 | const char EXP_CHARS[] = "eE"; |
105 | ||
106 | /* Chars that mean this number is a floating point constant */ | |
107 | /* As in 0f12.456 */ | |
108 | /* or 0d1.2345e12 */ | |
025b0302 | 109 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
cd8761e1 | 110 | |
cd8761e1 | 111 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
cd8761e1 | 112 | |
cd8761e1 | 113 | /* |
a39116f1 RP |
114 | This function is called once, at assembler startup time. This should |
115 | set up all the tables, etc that the MD part of the assembler needs | |
116 | */ | |
5d9f0ecf SC |
117 | |
118 | ||
025b0302 ME |
119 | void |
120 | md_begin () | |
121 | { | |
122 | struct h8_opcode *opcode; | |
025b0302 ME |
123 | char prev_buffer[100]; |
124 | int idx = 0; | |
5d9f0ecf | 125 | |
025b0302 ME |
126 | opcode_hash_control = hash_new (); |
127 | prev_buffer[0] = 0; | |
cd8761e1 | 128 | |
025b0302 ME |
129 | for (opcode = h8_opcodes; opcode->name; opcode++) |
130 | { | |
131 | /* Strip off any . part when inserting the opcode and only enter | |
132 | unique codes into the hash table | |
133 | */ | |
134 | char *src = opcode->name; | |
135 | unsigned int len = strlen (src); | |
136 | char *dst = malloc (len + 1); | |
137 | char *buffer = dst; | |
138 | ||
139 | opcode->size = 0; | |
140 | while (*src) | |
141 | { | |
142 | if (*src == '.') | |
a39116f1 | 143 | { |
025b0302 ME |
144 | src++; |
145 | opcode->size = *src; | |
146 | break; | |
a39116f1 | 147 | } |
025b0302 ME |
148 | *dst++ = *src++; |
149 | } | |
091f3a62 | 150 | *dst++ = 0; |
025b0302 ME |
151 | if (strcmp (buffer, prev_buffer)) |
152 | { | |
153 | hash_insert (opcode_hash_control, buffer, (char *) opcode); | |
154 | strcpy (prev_buffer, buffer); | |
155 | idx++; | |
156 | } | |
157 | opcode->idx = idx; | |
158 | ||
159 | ||
160 | /* Find the number of operands */ | |
161 | opcode->noperands = 0; | |
162 | while (opcode->args.nib[opcode->noperands] != E) | |
163 | opcode->noperands++; | |
164 | /* Find the length of the opcode in bytes */ | |
165 | opcode->length = 0; | |
166 | while (opcode->data.nib[opcode->length * 2] != E) | |
167 | opcode->length++; | |
168 | } | |
169 | ||
dcb195f8 | 170 | linkrelax = 1; |
cd8761e1 SC |
171 | } |
172 | ||
173 | ||
025b0302 | 174 | struct h8_exp |
cd8761e1 | 175 | { |
025b0302 ME |
176 | char *e_beg; |
177 | char *e_end; | |
178 | expressionS e_exp; | |
cd8761e1 | 179 | }; |
025b0302 ME |
180 | int dispreg; |
181 | int opsize; /* Set when a register size is seen */ | |
cd8761e1 SC |
182 | |
183 | ||
025b0302 ME |
184 | struct h8_op |
185 | { | |
186 | op_type mode; | |
187 | unsigned reg; | |
188 | expressionS exp; | |
189 | }; | |
cd8761e1 SC |
190 | |
191 | /* | |
025b0302 | 192 | parse operands |
a39116f1 RP |
193 | WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp |
194 | r0l,r0h,..r7l,r7h | |
195 | @WREG | |
196 | @WREG+ | |
197 | @-WREG | |
198 | #const | |
cd8761e1 | 199 | |
025b0302 | 200 | */ |
5d9f0ecf | 201 | |
cd8761e1 | 202 | /* try and parse a reg name, returns number of chars consumed */ |
025b0302 ME |
203 | int |
204 | parse_reg (src, mode, reg, direction) | |
205 | char *src; | |
206 | op_type *mode; | |
207 | unsigned int *reg; | |
208 | int direction; | |
209 | ||
cd8761e1 | 210 | { |
025b0302 ME |
211 | if (src[0] == 's' && src[1] == 'p') |
212 | { | |
213 | *mode = PSIZE | REG | direction; | |
214 | *reg = 7; | |
215 | return 2; | |
216 | } | |
217 | if (src[0] == 'c' && src[1] == 'c' && src[2] == 'r') | |
218 | { | |
219 | *mode = CCR; | |
220 | *reg = 0; | |
221 | return 3; | |
222 | } | |
be4931ba ILT |
223 | if (src[0] == 'e' && src[1] == 'x' && src[2] == 'r') |
224 | { | |
225 | *mode = EXR; | |
226 | *reg = 0; | |
227 | return 3; | |
228 | } | |
025b0302 ME |
229 | if (src[0] == 'f' && src[1] == 'p') |
230 | { | |
231 | *mode = PSIZE | REG | direction; | |
232 | *reg = 6; | |
233 | return 2; | |
234 | } | |
235 | if (src[0] == 'e' | |
236 | && src[1] == 'r' | |
237 | && src[2] >= '0' && src[2] <= '7') | |
238 | { | |
239 | *mode = L_32 | REG | direction; | |
240 | *reg = src[2] - '0'; | |
241 | if (!Hmode) | |
be4931ba | 242 | as_warn ("Reg not valid for H8/300"); |
025b0302 ME |
243 | |
244 | return 3; | |
245 | } | |
246 | if (src[0] == 'e' | |
247 | && src[1] >= '0' && src[1] <= '7') | |
248 | { | |
249 | *mode = L_16 | REG | direction; | |
250 | *reg = src[1] - '0' + 8; | |
251 | if (!Hmode) | |
be4931ba | 252 | as_warn ("Reg not valid for H8/300"); |
025b0302 ME |
253 | return 2; |
254 | } | |
255 | ||
256 | if (src[0] == 'r') | |
257 | { | |
258 | if (src[1] >= '0' && src[1] <= '7') | |
259 | { | |
260 | if (src[2] == 'l') | |
a39116f1 | 261 | { |
025b0302 ME |
262 | *mode = L_8 | REG | direction; |
263 | *reg = (src[1] - '0') + 8; | |
264 | return 3; | |
a39116f1 | 265 | } |
025b0302 | 266 | if (src[2] == 'h') |
a39116f1 | 267 | { |
025b0302 ME |
268 | *mode = L_8 | REG | direction; |
269 | *reg = (src[1] - '0'); | |
270 | return 3; | |
a39116f1 | 271 | } |
025b0302 ME |
272 | *mode = L_16 | REG | direction; |
273 | *reg = (src[1] - '0'); | |
274 | return 2; | |
275 | } | |
276 | } | |
277 | return 0; | |
cd8761e1 SC |
278 | } |
279 | ||
280 | char * | |
091f3a62 KR |
281 | parse_exp (s, op) |
282 | char *s; | |
283 | expressionS * op; | |
cd8761e1 | 284 | { |
025b0302 ME |
285 | char *save = input_line_pointer; |
286 | char *new; | |
025b0302 ME |
287 | |
288 | input_line_pointer = s; | |
091f3a62 KR |
289 | expression (op); |
290 | if (op->X_op == O_absent) | |
5ac34ac3 | 291 | as_bad ("missing operand"); |
025b0302 ME |
292 | new = input_line_pointer; |
293 | input_line_pointer = save; | |
5ac34ac3 | 294 | return new; |
5d9f0ecf SC |
295 | } |
296 | ||
297 | static char * | |
025b0302 ME |
298 | skip_colonthing (ptr, exp, mode) |
299 | char *ptr; | |
300 | expressionS *exp; | |
301 | int *mode; | |
5d9f0ecf | 302 | { |
025b0302 ME |
303 | if (*ptr == ':') |
304 | { | |
305 | ptr++; | |
dcb195f8 | 306 | *mode &= ~SIZE; |
025b0302 ME |
307 | if (*ptr == '8') |
308 | { | |
309 | ptr++; | |
310 | /* ff fill any 8 bit quantity */ | |
091f3a62 | 311 | /* exp->X_add_number -= 0x100;*/ |
dcb195f8 | 312 | *mode |= L_8; |
5d9f0ecf | 313 | } |
025b0302 ME |
314 | else |
315 | { | |
025b0302 ME |
316 | if (*ptr == '2') |
317 | { | |
318 | *mode |= L_24; | |
319 | } | |
be4931ba ILT |
320 | else if (*ptr == '3') |
321 | { | |
322 | *mode |= L_32; | |
323 | } | |
025b0302 ME |
324 | else if (*ptr == '1') |
325 | { | |
326 | *mode |= L_16; | |
327 | } | |
328 | while (isdigit (*ptr)) | |
329 | ptr++; | |
330 | } | |
331 | } | |
332 | return ptr; | |
cd8761e1 SC |
333 | } |
334 | ||
5d9f0ecf | 335 | /* The many forms of operand: |
025b0302 | 336 | |
a39116f1 RP |
337 | Rn Register direct |
338 | @Rn Register indirect | |
339 | @(exp[:16], Rn) Register indirect with displacement | |
340 | @Rn+ | |
341 | @-Rn | |
342 | @aa:8 absolute 8 bit | |
343 | @aa:16 absolute 16 bit | |
344 | @aa absolute 16 bit | |
025b0302 | 345 | |
a39116f1 RP |
346 | #xx[:size] immediate data |
347 | @(exp:[8], pc) pc rel | |
348 | @@aa[:8] memory indirect | |
025b0302 | 349 | |
a39116f1 | 350 | */ |
cd8761e1 | 351 | |
025b0302 ME |
352 | char * |
353 | colonmod24 (op, src) | |
354 | struct h8_op *op; | |
355 | char *src; | |
356 | ||
357 | { | |
358 | int mode = 0; | |
359 | src = skip_colonthing (src, &op->exp, &mode); | |
360 | ||
361 | if (!mode) | |
362 | { | |
363 | /* Choose a default mode */ | |
364 | if (op->exp.X_add_number < -32768 | |
365 | || op->exp.X_add_number > 32767) | |
366 | { | |
367 | if (Hmode) | |
368 | mode = L_24; | |
091f3a62 | 369 | else |
025b0302 | 370 | mode = L_16; |
091f3a62 | 371 | } |
025b0302 | 372 | else if (op->exp.X_add_symbol |
5ac34ac3 | 373 | || op->exp.X_op_symbol) |
025b0302 ME |
374 | mode = DSYMMODE; |
375 | else | |
376 | mode = DMODE; | |
377 | } | |
378 | op->mode |= mode; | |
379 | return src; | |
091f3a62 | 380 | |
025b0302 ME |
381 | } |
382 | ||
383 | ||
384 | static void | |
385 | get_operand (ptr, op, dst, direction) | |
386 | char **ptr; | |
387 | struct h8_op *op; | |
388 | unsigned int dst; | |
dcb195f8 | 389 | int direction; |
cd8761e1 | 390 | { |
7c2d4011 SC |
391 | char *src = *ptr; |
392 | op_type mode; | |
025b0302 ME |
393 | unsigned int num; |
394 | unsigned int len; | |
025b0302 | 395 | |
7c2d4011 | 396 | op->mode = E; |
025b0302 | 397 | |
be4931ba ILT |
398 | /* Gross. Gross. ldm and stm have a format not easily handled |
399 | by get_operand. We deal with it explicitly here. */ | |
400 | if (src[0] == 'e' && src[1] == 'r' && isdigit(src[2]) | |
401 | && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && isdigit(src[6])) | |
402 | { | |
403 | int low, high; | |
404 | ||
405 | low = src[2] - '0'; | |
406 | high = src[6] - '0'; | |
407 | ||
408 | if (high < low) | |
409 | as_bad ("Invalid register list for ldm/stm\n"); | |
410 | ||
411 | if (low % 2) | |
412 | as_bad ("Invalid register list for ldm/stm\n"); | |
413 | ||
414 | if (high - low > 4) | |
415 | as_bad ("Invalid register list for ldm/stm\n"); | |
416 | ||
417 | if (high - low != 2 | |
418 | && low % 4) | |
419 | as_bad ("Invalid register list for ldm/stm\n"); | |
420 | ||
421 | /* Even sicker. We encode two registers into op->reg. One | |
422 | for the low register to save, the other for the high | |
423 | register to save; we also set the high bit in op->reg | |
424 | so we know this is "very special". */ | |
425 | op->reg = 0x80000000 | (high << 8) | low; | |
426 | op->mode = REG; | |
427 | *ptr = src + 7; | |
428 | return; | |
429 | } | |
be4931ba | 430 | |
025b0302 ME |
431 | len = parse_reg (src, &op->mode, &op->reg, direction); |
432 | if (len) | |
7c2d4011 | 433 | { |
7c2d4011 SC |
434 | *ptr = src + len; |
435 | return; | |
436 | } | |
025b0302 ME |
437 | |
438 | if (*src == '@') | |
7c2d4011 | 439 | { |
7c2d4011 | 440 | src++; |
025b0302 ME |
441 | if (*src == '@') |
442 | { | |
443 | src++; | |
444 | src = parse_exp (src, &op->exp); | |
445 | ||
446 | src = skip_colonthing (src, &op->exp, &op->mode); | |
447 | ||
448 | *ptr = src; | |
449 | ||
450 | op->mode = MEMIND; | |
451 | return; | |
452 | ||
453 | } | |
454 | ||
455 | ||
456 | if (*src == '-') | |
7c2d4011 SC |
457 | { |
458 | src++; | |
025b0302 ME |
459 | len = parse_reg (src, &mode, &num, direction); |
460 | if (len == 0) | |
461 | { | |
462 | /* Oops, not a reg after all, must be ordinary exp */ | |
463 | src--; | |
464 | /* must be a symbol */ | |
465 | op->mode = ABS | PSIZE | direction; | |
466 | *ptr = skip_colonthing (parse_exp (src, &op->exp), | |
467 | &op->exp, &op->mode); | |
468 | ||
469 | return; | |
470 | ||
471 | ||
472 | } | |
473 | ||
474 | ||
475 | if ((mode & SIZE) != PSIZE) | |
476 | as_bad ("Wrong size pointer register for architecture."); | |
477 | op->mode = RDDEC; | |
478 | op->reg = num; | |
479 | *ptr = src + len; | |
480 | return; | |
481 | } | |
091f3a62 | 482 | if (*src == '(') |
025b0302 ME |
483 | { |
484 | /* Disp */ | |
485 | src++; | |
486 | ||
487 | /* Start off assuming a 16 bit offset */ | |
488 | ||
489 | ||
490 | src = parse_exp (src, &op->exp); | |
491 | ||
492 | src = colonmod24 (op, src); | |
493 | ||
494 | if (*src == ')') | |
495 | { | |
496 | src++; | |
091f3a62 | 497 | op->mode |= ABS | direction; |
025b0302 ME |
498 | *ptr = src; |
499 | return; | |
500 | } | |
501 | ||
502 | if (*src != ',') | |
503 | { | |
504 | as_bad ("expected @(exp, reg16)"); | |
505 | return; | |
506 | ||
507 | } | |
508 | src++; | |
509 | ||
510 | len = parse_reg (src, &mode, &op->reg, direction); | |
511 | if (len == 0 || !(mode & REG)) | |
512 | { | |
513 | as_bad ("expected @(exp, reg16)"); | |
514 | return; | |
515 | } | |
516 | op->mode |= DISP | direction; | |
517 | dispreg = op->reg; | |
518 | src += len; | |
519 | src = skip_colonthing (src, &op->exp, &op->mode); | |
520 | ||
521 | if (*src != ')' && '(') | |
522 | { | |
523 | as_bad ("expected @(exp, reg16)"); | |
524 | return; | |
525 | } | |
526 | *ptr = src + 1; | |
527 | ||
528 | return; | |
529 | } | |
530 | len = parse_reg (src, &mode, &num, direction); | |
531 | ||
532 | if (len) | |
533 | { | |
534 | src += len; | |
535 | if (*src == '+') | |
536 | { | |
537 | src++; | |
538 | if ((mode & SIZE) != PSIZE) | |
539 | as_bad ("Wrong size pointer register for architecture."); | |
540 | op->mode = RSINC; | |
541 | op->reg = num; | |
542 | *ptr = src; | |
543 | return; | |
544 | } | |
545 | if ((mode & SIZE) != PSIZE) | |
546 | as_bad ("Wrong size pointer register for architecture."); | |
547 | ||
548 | op->mode = direction | IND | PSIZE; | |
7c2d4011 SC |
549 | op->reg = num; |
550 | *ptr = src; | |
025b0302 | 551 | |
7c2d4011 SC |
552 | return; |
553 | } | |
025b0302 | 554 | else |
7c2d4011 | 555 | { |
025b0302 ME |
556 | /* must be a symbol */ |
557 | ||
558 | op->mode = ABS | direction; | |
559 | src = parse_exp (src, &op->exp); | |
560 | ||
561 | *ptr = colonmod24 (op, src); | |
562 | ||
7c2d4011 | 563 | return; |
7c2d4011 | 564 | } |
7c2d4011 | 565 | } |
025b0302 ME |
566 | |
567 | ||
568 | if (*src == '#') | |
569 | { | |
7c2d4011 | 570 | src++; |
025b0302 ME |
571 | op->mode = IMM; |
572 | src = parse_exp (src, &op->exp); | |
573 | *ptr = skip_colonthing (src, &op->exp, &op->mode); | |
574 | ||
7c2d4011 SC |
575 | return; |
576 | } | |
be4931ba ILT |
577 | else if (strncmp (src, "mach", 4) == 0 |
578 | || strncmp (src, "macl", 4) == 0) | |
579 | { | |
580 | op->reg = src[3] == 'l'; | |
581 | op->mode = MACREG; | |
582 | *ptr = src + 4; | |
583 | return; | |
584 | } | |
025b0302 ME |
585 | else |
586 | { | |
587 | src = parse_exp (src, &op->exp); | |
588 | /* Trailing ':' size ? */ | |
589 | if (*src == ':') | |
590 | { | |
591 | if (src[1] == '1' && src[2] == '6') | |
592 | { | |
593 | op->mode = PCREL | L_16; | |
594 | src += 3; | |
595 | } | |
596 | else if (src[1] == '8') | |
597 | { | |
598 | op->mode = PCREL | L_8; | |
599 | src += 2; | |
600 | } | |
601 | else | |
602 | { | |
603 | as_bad ("expect :8 or :16 here"); | |
604 | } | |
605 | } | |
606 | else | |
607 | { | |
608 | op->mode = PCREL | bsize; | |
609 | } | |
610 | *ptr = src; | |
7c2d4011 | 611 | } |
5d9f0ecf SC |
612 | } |
613 | ||
614 | ||
615 | static | |
025b0302 | 616 | char * |
091f3a62 KR |
617 | get_operands (noperands, op_end, operand) |
618 | unsigned int noperands; | |
619 | char *op_end; | |
620 | struct h8_op *operand; | |
5d9f0ecf | 621 | { |
025b0302 ME |
622 | char *ptr = op_end; |
623 | ||
624 | switch (noperands) | |
625 | { | |
626 | case 0: | |
627 | operand[0].mode = 0; | |
628 | operand[1].mode = 0; | |
629 | break; | |
630 | ||
631 | case 1: | |
632 | ptr++; | |
633 | get_operand (&ptr, operand + 0, 0, SRC); | |
634 | if (*ptr == ',') | |
635 | { | |
636 | ptr++; | |
637 | get_operand (&ptr, operand + 1, 1, DST); | |
638 | } | |
639 | else | |
640 | { | |
641 | operand[1].mode = 0; | |
642 | } | |
643 | ||
644 | break; | |
645 | case 2: | |
646 | ptr++; | |
647 | get_operand (&ptr, operand + 0, 0, SRC); | |
648 | if (*ptr == ',') | |
649 | ptr++; | |
650 | get_operand (&ptr, operand + 1, 1, DST); | |
651 | break; | |
652 | ||
653 | default: | |
654 | abort (); | |
655 | } | |
656 | ||
657 | ||
658 | return ptr; | |
cd8761e1 SC |
659 | } |
660 | ||
5d9f0ecf SC |
661 | /* Passed a pointer to a list of opcodes which use different |
662 | addressing modes, return the opcode which matches the opcodes | |
663 | provided | |
a39116f1 | 664 | */ |
5d9f0ecf | 665 | static |
025b0302 ME |
666 | struct h8_opcode * |
667 | get_specific (opcode, operands) | |
668 | struct h8_opcode *opcode; | |
669 | struct h8_op *operands; | |
5d9f0ecf | 670 | { |
025b0302 ME |
671 | struct h8_opcode *this_try = opcode; |
672 | int found = 0; | |
673 | ||
674 | unsigned int this_index = opcode->idx; | |
675 | ||
be4931ba ILT |
676 | /* There's only one ldm/stm and it's easier to just |
677 | get out quick for them. */ | |
678 | if (strcmp (opcode->name, "stm.l") == 0 | |
679 | || strcmp (opcode->name, "ldm.l") == 0) | |
680 | return this_try; | |
681 | ||
025b0302 ME |
682 | while (this_index == opcode->idx && !found) |
683 | { | |
684 | unsigned int i; | |
685 | found = 1; | |
686 | ||
687 | this_try = opcode++; | |
688 | for (i = 0; i < this_try->noperands && found; i++) | |
689 | { | |
690 | op_type op = this_try->args.nib[i]; | |
691 | int x = operands[i].mode; | |
692 | ||
693 | if ((op & (DISP | REG)) == (DISP | REG) | |
dcb195f8 | 694 | && ((x & (DISP | REG)) == (DISP | REG))) |
a39116f1 | 695 | { |
025b0302 | 696 | dispreg = operands[i].reg; |
a39116f1 | 697 | } |
025b0302 ME |
698 | else if (op & REG) |
699 | { | |
700 | if (!(x & REG)) | |
701 | found = 0; | |
702 | ||
703 | if (x & L_P) | |
704 | { | |
705 | x = (x & ~L_P) | (Hmode ? L_32 : L_16); | |
706 | } | |
707 | if (op & L_P) | |
708 | { | |
709 | op = (op & ~L_P) | (Hmode ? L_32 : L_16); | |
710 | } | |
711 | ||
712 | opsize = op & SIZE; | |
713 | ||
714 | /* The size of the reg is v important */ | |
715 | if ((op & SIZE) != (x & SIZE)) | |
716 | found = 0; | |
717 | } | |
718 | else if ((op & ABSJMP) && (x & ABS)) | |
719 | { | |
720 | operands[i].mode &= ~ABS; | |
721 | operands[i].mode |= ABSJMP; | |
722 | /* But it may not be 24 bits long */ | |
723 | if (!Hmode) | |
724 | { | |
725 | operands[i].mode &= ~SIZE; | |
726 | operands[i].mode |= L_16; | |
727 | } | |
728 | ||
729 | ||
730 | } | |
731 | else if ((op & (KBIT | DBIT)) && (x & IMM)) | |
732 | { | |
733 | /* This is ok if the immediate value is sensible */ | |
734 | ||
735 | } | |
736 | else if (op & PCREL) | |
737 | { | |
738 | ||
739 | /* The size of the displacement is important */ | |
740 | if ((op & SIZE) != (x & SIZE)) | |
741 | found = 0; | |
742 | ||
743 | } | |
744 | else if ((op & (DISP | IMM | ABS)) | |
745 | && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS))) | |
746 | { | |
be4931ba ILT |
747 | /* Promote a L_24 to L_32 if it makes us match. */ |
748 | if ((x & L_24) && (op & L_32)) | |
749 | { | |
750 | x &= ~L_24; | |
751 | x |= L_32; | |
752 | } | |
753 | /* Promote an L8 to L_16 if it makes us match. */ | |
754 | if (op & ABS && op & L_8 && op & DISP) | |
091f3a62 | 755 | { |
091f3a62 KR |
756 | if (x & L_16) |
757 | found= 1; | |
758 | } | |
be4931ba ILT |
759 | else if ((x & SIZE) != 0 |
760 | && ((op & SIZE) != (x & SIZE))) | |
025b0302 ME |
761 | found = 0; |
762 | } | |
be4931ba ILT |
763 | else if ((op & MACREG) != (x & MACREG)) |
764 | { | |
765 | found = 0; | |
766 | } | |
025b0302 ME |
767 | else if ((op & MODE) != (x & MODE)) |
768 | { | |
769 | found = 0; | |
770 | } | |
771 | ||
772 | } | |
773 | } | |
774 | if (found) | |
775 | return this_try; | |
776 | else | |
777 | return 0; | |
5d9f0ecf SC |
778 | } |
779 | ||
780 | static void | |
091f3a62 KR |
781 | check_operand (operand, width, string) |
782 | struct h8_op *operand; | |
783 | unsigned int width; | |
784 | char *string; | |
5d9f0ecf | 785 | { |
025b0302 | 786 | if (operand->exp.X_add_symbol == 0 |
5ac34ac3 | 787 | && operand->exp.X_op_symbol == 0) |
7c2d4011 | 788 | { |
025b0302 ME |
789 | |
790 | /* No symbol involved, let's look at offset, it's dangerous if any of | |
091f3a62 KR |
791 | the high bits are not 0 or ff's, find out by oring or anding with |
792 | the width and seeing if the answer is 0 or all fs*/ | |
793 | ||
025b0302 ME |
794 | if ((operand->exp.X_add_number & ~width) != 0 && |
795 | (operand->exp.X_add_number | width) != (~0)) | |
796 | { | |
091f3a62 KR |
797 | if (width == 255 |
798 | && (operand->exp.X_add_number & 0xff00) == 0xff00) | |
799 | { | |
dcb195f8 JL |
800 | /* Just ignore this one - which happens when trying to |
801 | fit a 16 bit address truncated into an 8 bit address | |
802 | of something like bset. */ | |
091f3a62 KR |
803 | } |
804 | else | |
805 | { | |
dcb195f8 JL |
806 | as_warn ("operand %s0x%lx out of range.", string, |
807 | (unsigned long) operand->exp.X_add_number); | |
808 | } | |
091f3a62 | 809 | } |
7c2d4011 | 810 | } |
025b0302 ME |
811 | |
812 | } | |
813 | ||
be4931ba ILT |
814 | /* RELAXMODE has one of 3 values: |
815 | ||
816 | 0 Output a "normal" reloc, no relaxing possible for this insn/reloc | |
817 | ||
818 | 1 Output a relaxable 24bit absolute mov.w address relocation | |
819 | (may relax into a 16bit absolute address). | |
820 | ||
821 | 2 Output a relaxable 16/24 absolute mov.b address relocation | |
822 | (may relax into an 8bit absolute address). */ | |
823 | ||
025b0302 | 824 | static void |
be4931ba | 825 | do_a_fix_imm (offset, operand, relaxmode) |
025b0302 ME |
826 | int offset; |
827 | struct h8_op *operand; | |
be4931ba | 828 | int relaxmode; |
025b0302 ME |
829 | { |
830 | int idx; | |
831 | int size; | |
832 | int where; | |
833 | ||
834 | ||
835 | char *t = operand->mode & IMM ? "#" : "@"; | |
836 | ||
837 | if (operand->exp.X_add_symbol == 0) | |
838 | { | |
839 | char *bytes = frag_now->fr_literal + offset; | |
840 | switch (operand->mode & SIZE) | |
841 | { | |
091f3a62 KR |
842 | case L_2: |
843 | check_operand (operand, 0x3, t); | |
844 | bytes[0] |= (operand->exp.X_add_number) << 4; | |
845 | break; | |
025b0302 ME |
846 | case L_3: |
847 | check_operand (operand, 0x7, t); | |
848 | bytes[0] |= (operand->exp.X_add_number) << 4; | |
849 | break; | |
850 | case L_8: | |
851 | check_operand (operand, 0xff, t); | |
852 | bytes[0] = operand->exp.X_add_number; | |
853 | break; | |
854 | case L_16: | |
855 | check_operand (operand, 0xffff, t); | |
856 | bytes[0] = operand->exp.X_add_number >> 8; | |
857 | bytes[1] = operand->exp.X_add_number >> 0; | |
858 | break; | |
859 | case L_24: | |
860 | check_operand (operand, 0xffffff, t); | |
861 | bytes[0] = operand->exp.X_add_number >> 16; | |
862 | bytes[1] = operand->exp.X_add_number >> 8; | |
863 | bytes[2] = operand->exp.X_add_number >> 0; | |
864 | break; | |
865 | ||
866 | case L_32: | |
867 | /* This should be done with bfd */ | |
868 | bytes[0] = operand->exp.X_add_number >> 24; | |
869 | bytes[1] = operand->exp.X_add_number >> 16; | |
870 | bytes[2] = operand->exp.X_add_number >> 8; | |
871 | bytes[3] = operand->exp.X_add_number >> 0; | |
872 | break; | |
873 | } | |
874 | ||
875 | } | |
876 | else | |
877 | { | |
878 | switch (operand->mode & SIZE) | |
879 | { | |
091f3a62 | 880 | |
025b0302 | 881 | case L_24: |
be4931ba | 882 | case L_32: |
025b0302 | 883 | size = 4; |
be4931ba ILT |
884 | where = (operand->mode & SIZE) == L_24 ? -1 : 0; |
885 | if (relaxmode == 2) | |
886 | idx = R_MOV24B1; | |
887 | else if (relaxmode == 1) | |
888 | idx = R_MOVL1; | |
889 | else | |
890 | idx = R_RELLONG; | |
025b0302 | 891 | break; |
091f3a62 KR |
892 | default: |
893 | as_bad("Can't work out size of operand.\n"); | |
025b0302 ME |
894 | case L_16: |
895 | size = 2; | |
896 | where = 0; | |
be4931ba ILT |
897 | if (relaxmode == 2) |
898 | idx = R_MOV16B1; | |
899 | else | |
900 | idx = R_RELWORD; | |
901 | operand->exp.X_add_number = (short)operand->exp.X_add_number; | |
025b0302 ME |
902 | break; |
903 | case L_8: | |
904 | size = 1; | |
905 | where = 0; | |
906 | idx = R_RELBYTE; | |
be4931ba | 907 | operand->exp.X_add_number = (char)operand->exp.X_add_number; |
025b0302 ME |
908 | } |
909 | ||
5ac34ac3 ILT |
910 | fix_new_exp (frag_now, |
911 | offset + where, | |
912 | size, | |
913 | &operand->exp, | |
914 | 0, | |
915 | idx); | |
025b0302 ME |
916 | } |
917 | ||
5d9f0ecf SC |
918 | } |
919 | ||
920 | /* Now we know what sort of opcodes it is, lets build the bytes - | |
a39116f1 | 921 | */ |
025b0302 ME |
922 | static void |
923 | build_bytes (this_try, operand) | |
924 | struct h8_opcode *this_try; | |
925 | struct h8_op *operand; | |
5d9f0ecf | 926 | { |
025b0302 ME |
927 | unsigned int i; |
928 | ||
929 | char *output = frag_more (this_try->length); | |
025b0302 | 930 | op_type *nibble_ptr = this_try->data.nib; |
025b0302 | 931 | op_type c; |
025b0302 | 932 | unsigned int nibble_count = 0; |
091f3a62 | 933 | int absat; |
025b0302 ME |
934 | int immat; |
935 | int nib; | |
be4931ba | 936 | int movb = 0; |
025b0302 ME |
937 | char asnibbles[30]; |
938 | char *p = asnibbles; | |
939 | ||
940 | if (!(this_try->inbase || Hmode)) | |
be4931ba | 941 | as_warn ("Opcode `%s' not available in H8/300 mode", this_try->name); |
025b0302 ME |
942 | |
943 | while (*nibble_ptr != E) | |
944 | { | |
945 | int d; | |
946 | c = *nibble_ptr++; | |
947 | ||
d78f416f | 948 | d = (c & (DST | SRC_IN_DST)) != 0; |
025b0302 ME |
949 | |
950 | if (c < 16) | |
951 | { | |
952 | nib = c; | |
953 | } | |
954 | else | |
955 | { | |
956 | ||
957 | if (c & (REG | IND | INC | DEC)) | |
a39116f1 | 958 | { |
025b0302 | 959 | nib = operand[d].reg; |
a39116f1 | 960 | } |
025b0302 | 961 | else if ((c & DISPREG) == (DISPREG)) |
a39116f1 | 962 | { |
025b0302 | 963 | nib = dispreg; |
a39116f1 | 964 | } |
091f3a62 KR |
965 | else if (c & ABS ) |
966 | { | |
967 | operand[d].mode = c; | |
968 | absat = nibble_count / 2; | |
969 | nib = 0; | |
970 | } | |
971 | else if (c & (IMM | PCREL | ABS | ABSJMP | DISP)) | |
025b0302 ME |
972 | { |
973 | operand[d].mode = c; | |
974 | immat = nibble_count / 2; | |
975 | nib = 0; | |
976 | } | |
977 | else if (c & IGNORE) | |
978 | { | |
979 | nib = 0; | |
980 | } | |
981 | else if (c & DBIT) | |
982 | { | |
983 | switch (operand[0].exp.X_add_number) | |
984 | { | |
985 | case 1: | |
986 | nib = c; | |
987 | break; | |
988 | case 2: | |
989 | nib = 0x8 | c; | |
990 | break; | |
991 | default: | |
992 | as_bad ("Need #1 or #2 here"); | |
993 | } | |
994 | } | |
995 | else if (c & KBIT) | |
996 | { | |
997 | switch (operand[0].exp.X_add_number) | |
998 | { | |
999 | case 1: | |
1000 | nib = 0; | |
1001 | break; | |
1002 | case 2: | |
1003 | nib = 8; | |
1004 | break; | |
1005 | case 4: | |
1006 | if (!Hmode) | |
be4931ba | 1007 | as_warn ("#4 not valid on H8/300."); |
025b0302 ME |
1008 | nib = 9; |
1009 | break; | |
1010 | ||
1011 | default: | |
1012 | as_bad ("Need #1 or #2 here"); | |
1013 | break; | |
1014 | } | |
1015 | /* stop it making a fix */ | |
1016 | operand[0].mode = 0; | |
1017 | } | |
1018 | ||
be4931ba ILT |
1019 | if (c & MEMRELAX) |
1020 | { | |
1021 | operand[d].mode |= MEMRELAX; | |
1022 | } | |
1023 | ||
025b0302 ME |
1024 | if (c & B31) |
1025 | { | |
1026 | nib |= 0x8; | |
1027 | } | |
be4931ba | 1028 | |
be4931ba ILT |
1029 | if (c & MACREG) |
1030 | { | |
1031 | nib = 2 + operand[d].reg; | |
1032 | } | |
025b0302 ME |
1033 | } |
1034 | nibble_count++; | |
1035 | ||
1036 | *p++ = nib; | |
1037 | } | |
1038 | ||
be4931ba ILT |
1039 | /* Disgusting. Why, oh why didn't someone ask us for advice |
1040 | on the assembler format. */ | |
1041 | if (strcmp (this_try->name, "stm.l") == 0 | |
1042 | || strcmp (this_try->name, "ldm.l") == 0) | |
1043 | { | |
1044 | int high, low; | |
1045 | high = (operand[this_try->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf; | |
1046 | low = operand[this_try->name[0] == 'l' ? 1 : 0].reg & 0xf; | |
1047 | ||
1048 | asnibbles[2] = high - low; | |
1049 | asnibbles[7] = (this_try->name[0] == 'l') ? high : low; | |
1050 | } | |
be4931ba | 1051 | |
025b0302 ME |
1052 | for (i = 0; i < this_try->length; i++) |
1053 | { | |
1054 | output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1]; | |
1055 | } | |
1056 | ||
be4931ba ILT |
1057 | /* Note if this is a movb instruction -- there's a special relaxation |
1058 | which only applies to them. */ | |
1059 | if (strcmp (this_try->name, "mov.b") == 0) | |
1060 | movb = 1; | |
1061 | ||
025b0302 ME |
1062 | /* output any fixes */ |
1063 | for (i = 0; i < 2; i++) | |
7c2d4011 | 1064 | { |
025b0302 ME |
1065 | int x = operand[i].mode; |
1066 | ||
091f3a62 KR |
1067 | if (x & (IMM | DISP)) |
1068 | { | |
be4931ba ILT |
1069 | do_a_fix_imm (output - frag_now->fr_literal + immat, |
1070 | operand + i, x & MEMRELAX != 0); | |
091f3a62 KR |
1071 | } |
1072 | else if (x & ABS) | |
7c2d4011 | 1073 | { |
be4931ba ILT |
1074 | do_a_fix_imm (output - frag_now->fr_literal + absat, |
1075 | operand + i, x & MEMRELAX ? movb + 1 : 0); | |
7c2d4011 | 1076 | } |
025b0302 | 1077 | else if (x & PCREL) |
7c2d4011 | 1078 | { |
025b0302 ME |
1079 | int size16 = x & L_16; |
1080 | int where = size16 ? 2 : 1; | |
1081 | int size = size16 ? 2 : 1; | |
1082 | int type = size16 ? R_PCRWORD : R_PCRBYTE; | |
1083 | ||
1084 | check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@"); | |
1085 | ||
1086 | if (operand[i].exp.X_add_number & 1) | |
1087 | { | |
dcb195f8 JL |
1088 | as_warn ("branch operand has odd offset (%lx)\n", |
1089 | (unsigned long) operand->exp.X_add_number); | |
025b0302 ME |
1090 | } |
1091 | ||
c2ac84cb | 1092 | operand[i].exp.X_add_number = |
5ac34ac3 ILT |
1093 | (char) (operand[i].exp.X_add_number - 1); |
1094 | fix_new_exp (frag_now, | |
1095 | output - frag_now->fr_literal + where, | |
1096 | size, | |
1097 | &operand[i].exp, | |
1098 | 1, | |
1099 | type); | |
7c2d4011 | 1100 | } |
025b0302 | 1101 | else if (x & MEMIND) |
7c2d4011 | 1102 | { |
025b0302 ME |
1103 | |
1104 | check_operand (operand + i, 0xff, "@@"); | |
5ac34ac3 ILT |
1105 | fix_new_exp (frag_now, |
1106 | output - frag_now->fr_literal + 1, | |
1107 | 1, | |
1108 | &operand[i].exp, | |
1109 | 0, | |
dcb195f8 | 1110 | R_MEM_INDIRECT); |
7c2d4011 | 1111 | } |
025b0302 | 1112 | else if (x & ABSJMP) |
7c2d4011 | 1113 | { |
025b0302 ME |
1114 | /* This jmp may be a jump or a branch */ |
1115 | ||
091f3a62 | 1116 | check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@"); |
025b0302 ME |
1117 | if (operand[i].exp.X_add_number & 1) |
1118 | { | |
dcb195f8 JL |
1119 | as_warn ("branch operand has odd offset (%lx)\n", |
1120 | (unsigned long) operand->exp.X_add_number); | |
025b0302 | 1121 | } |
091f3a62 KR |
1122 | if (!Hmode) |
1123 | operand[i].exp.X_add_number = (short) operand[i].exp.X_add_number; | |
5ac34ac3 ILT |
1124 | fix_new_exp (frag_now, |
1125 | output - frag_now->fr_literal, | |
1126 | 4, | |
1127 | &operand[i].exp, | |
1128 | 0, | |
1129 | R_JMPL1); | |
7c2d4011 | 1130 | } |
7c2d4011 | 1131 | } |
025b0302 ME |
1132 | |
1133 | } | |
1134 | ||
1135 | /* | |
1136 | try and give an intelligent error message for common and simple to | |
1137 | detect errors | |
1138 | */ | |
1139 | ||
1140 | static void | |
091f3a62 KR |
1141 | clever_message (opcode, operand) |
1142 | struct h8_opcode *opcode; | |
1143 | struct h8_op *operand; | |
025b0302 | 1144 | { |
025b0302 ME |
1145 | /* Find out if there was more than one possible opccode */ |
1146 | ||
1147 | if ((opcode + 1)->idx != opcode->idx) | |
1148 | { | |
1149 | unsigned int argn; | |
1150 | ||
1151 | /* Only one opcode of this flavour, try and guess which operand | |
1152 | didn't match */ | |
1153 | for (argn = 0; argn < opcode->noperands; argn++) | |
1154 | { | |
1155 | switch (opcode->args.nib[argn]) | |
1156 | { | |
1157 | case RD16: | |
1158 | if (operand[argn].mode != RD16) | |
1159 | { | |
1160 | as_bad ("destination operand must be 16 bit register"); | |
1161 | return; | |
1162 | ||
1163 | } | |
1164 | break; | |
1165 | ||
1166 | case RS8: | |
1167 | ||
1168 | if (operand[argn].mode != RS8) | |
1169 | { | |
1170 | as_bad ("source operand must be 8 bit register"); | |
1171 | return; | |
1172 | } | |
1173 | break; | |
1174 | ||
1175 | case ABS16DST: | |
1176 | if (operand[argn].mode != ABS16DST) | |
1177 | { | |
1178 | as_bad ("destination operand must be 16bit absolute address"); | |
1179 | return; | |
1180 | } | |
1181 | break; | |
1182 | case RD8: | |
1183 | if (operand[argn].mode != RD8) | |
1184 | { | |
1185 | as_bad ("destination operand must be 8 bit register"); | |
1186 | return; | |
1187 | } | |
1188 | break; | |
1189 | ||
1190 | ||
1191 | case ABS16SRC: | |
1192 | if (operand[argn].mode != ABS16SRC) | |
1193 | { | |
1194 | as_bad ("source operand must be 16bit absolute address"); | |
1195 | return; | |
1196 | } | |
1197 | break; | |
1198 | ||
1199 | } | |
1200 | } | |
1201 | } | |
1202 | as_bad ("invalid operands"); | |
5d9f0ecf | 1203 | } |
a39116f1 | 1204 | |
cd8761e1 SC |
1205 | /* This is the guts of the machine-dependent assembler. STR points to a |
1206 | machine dependent instruction. This funciton is supposed to emit | |
1207 | the frags/bytes it assembles to. | |
a39116f1 RP |
1208 | */ |
1209 | ||
1210 | ||
cd8761e1 | 1211 | |
025b0302 | 1212 | void |
091f3a62 KR |
1213 | md_assemble (str) |
1214 | char *str; | |
cd8761e1 | 1215 | { |
025b0302 ME |
1216 | char *op_start; |
1217 | char *op_end; | |
025b0302 ME |
1218 | struct h8_op operand[2]; |
1219 | struct h8_opcode *opcode; | |
1220 | struct h8_opcode *prev_opcode; | |
1221 | ||
1222 | char *dot = 0; | |
1223 | char c; | |
1224 | ||
1225 | /* Drop leading whitespace */ | |
1226 | while (*str == ' ') | |
1227 | str++; | |
1228 | ||
1229 | /* find the op code end */ | |
1230 | for (op_start = op_end = str; | |
1231 | *op_end != 0 && *op_end != ' '; | |
1232 | op_end++) | |
1233 | { | |
1234 | if (*op_end == '.') | |
1235 | { | |
1236 | dot = op_end + 1; | |
1237 | *op_end = 0; | |
1238 | op_end += 2; | |
1239 | break; | |
1240 | } | |
1241 | } | |
1242 | ||
1243 | ; | |
1244 | ||
1245 | if (op_end == op_start) | |
1246 | { | |
1247 | as_bad ("can't find opcode "); | |
1248 | } | |
1249 | c = *op_end; | |
1250 | ||
1251 | *op_end = 0; | |
1252 | ||
1253 | opcode = (struct h8_opcode *) hash_find (opcode_hash_control, | |
1254 | op_start); | |
1255 | ||
1256 | if (opcode == NULL) | |
1257 | { | |
1258 | as_bad ("unknown opcode"); | |
1259 | return; | |
1260 | } | |
1261 | ||
091f3a62 KR |
1262 | /* We use to set input_line_pointer to the result of get_operands, |
1263 | but that is wrong. Our caller assumes we don't change it. */ | |
025b0302 | 1264 | |
091f3a62 | 1265 | (void) get_operands (opcode->noperands, op_end, operand); |
025b0302 ME |
1266 | *op_end = c; |
1267 | prev_opcode = opcode; | |
1268 | ||
1269 | opcode = get_specific (opcode, operand); | |
1270 | ||
1271 | if (opcode == 0) | |
1272 | { | |
1273 | /* Couldn't find an opcode which matched the operands */ | |
1274 | char *where = frag_more (2); | |
1275 | ||
1276 | where[0] = 0x0; | |
1277 | where[1] = 0x0; | |
1278 | clever_message (prev_opcode, operand); | |
1279 | ||
1280 | return; | |
1281 | } | |
1282 | if (opcode->size && dot) | |
1283 | { | |
1284 | if (opcode->size != *dot) | |
1285 | { | |
1286 | as_warn ("mismatch between opcode size and operand size"); | |
1287 | } | |
1288 | } | |
1289 | ||
1290 | build_bytes (opcode, operand); | |
1291 | ||
cd8761e1 SC |
1292 | } |
1293 | ||
025b0302 | 1294 | void |
091f3a62 KR |
1295 | tc_crawl_symbol_chain (headers) |
1296 | object_headers * headers; | |
cd8761e1 | 1297 | { |
025b0302 | 1298 | printf ("call to tc_crawl_symbol_chain \n"); |
cd8761e1 SC |
1299 | } |
1300 | ||
025b0302 | 1301 | symbolS * |
091f3a62 KR |
1302 | md_undefined_symbol (name) |
1303 | char *name; | |
cd8761e1 | 1304 | { |
025b0302 | 1305 | return 0; |
cd8761e1 SC |
1306 | } |
1307 | ||
025b0302 | 1308 | void |
091f3a62 KR |
1309 | tc_headers_hook (headers) |
1310 | object_headers * headers; | |
cd8761e1 | 1311 | { |
025b0302 | 1312 | printf ("call to tc_headers_hook \n"); |
cd8761e1 | 1313 | } |
025b0302 | 1314 | |
cd8761e1 | 1315 | /* Various routines to kill one day */ |
05b4b0e7 SC |
1316 | /* Equal to MAX_PRECISION in atof-ieee.c */ |
1317 | #define MAX_LITTLENUMS 6 | |
1318 | ||
1319 | /* Turn a string in input_line_pointer into a floating point constant of type | |
1320 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
1321 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
a39116f1 | 1322 | */ |
05b4b0e7 | 1323 | char * |
025b0302 ME |
1324 | md_atof (type, litP, sizeP) |
1325 | char type; | |
1326 | char *litP; | |
1327 | int *sizeP; | |
05b4b0e7 | 1328 | { |
025b0302 ME |
1329 | int prec; |
1330 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
1331 | LITTLENUM_TYPE *wordP; | |
1332 | char *t; | |
1333 | char *atof_ieee (); | |
1334 | ||
1335 | switch (type) | |
1336 | { | |
1337 | case 'f': | |
1338 | case 'F': | |
1339 | case 's': | |
1340 | case 'S': | |
1341 | prec = 2; | |
1342 | break; | |
1343 | ||
1344 | case 'd': | |
1345 | case 'D': | |
1346 | case 'r': | |
1347 | case 'R': | |
1348 | prec = 4; | |
1349 | break; | |
1350 | ||
1351 | case 'x': | |
1352 | case 'X': | |
1353 | prec = 6; | |
1354 | break; | |
1355 | ||
1356 | case 'p': | |
1357 | case 'P': | |
1358 | prec = 6; | |
1359 | break; | |
1360 | ||
1361 | default: | |
1362 | *sizeP = 0; | |
1363 | return "Bad call to MD_ATOF()"; | |
1364 | } | |
1365 | t = atof_ieee (input_line_pointer, type, words); | |
1366 | if (t) | |
1367 | input_line_pointer = t; | |
1368 | ||
1369 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1370 | for (wordP = words; prec--;) | |
1371 | { | |
1372 | md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
1373 | litP += sizeof (LITTLENUM_TYPE); | |
1374 | } | |
091f3a62 | 1375 | return 0; |
05b4b0e7 | 1376 | } |
091f3a62 KR |
1377 | \f |
1378 | CONST char *md_shortopts = ""; | |
1379 | struct option md_longopts[] = { | |
1380 | {NULL, no_argument, NULL, 0} | |
1381 | }; | |
1382 | size_t md_longopts_size = sizeof(md_longopts); | |
05b4b0e7 SC |
1383 | |
1384 | int | |
091f3a62 KR |
1385 | md_parse_option (c, arg) |
1386 | int c; | |
1387 | char *arg; | |
a39116f1 | 1388 | { |
025b0302 | 1389 | return 0; |
a39116f1 | 1390 | } |
cd8761e1 | 1391 | |
091f3a62 KR |
1392 | void |
1393 | md_show_usage (stream) | |
1394 | FILE *stream; | |
1395 | { | |
1396 | } | |
1397 | \f | |
cd8761e1 SC |
1398 | int md_short_jump_size; |
1399 | ||
025b0302 ME |
1400 | void |
1401 | tc_aout_fix_to_chars () | |
1402 | { | |
1403 | printf ("call to tc_aout_fix_to_chars \n"); | |
1404 | abort (); | |
1405 | } | |
1406 | ||
1407 | void | |
1408 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
1409 | char *ptr; | |
1410 | addressT from_addr; | |
1411 | addressT to_addr; | |
1412 | fragS *frag; | |
1413 | symbolS *to_symbol; | |
05b4b0e7 | 1414 | { |
025b0302 | 1415 | as_fatal ("failed sanity check."); |
a39116f1 | 1416 | } |
05b4b0e7 SC |
1417 | |
1418 | void | |
025b0302 ME |
1419 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) |
1420 | char *ptr; | |
1421 | addressT from_addr, to_addr; | |
1422 | fragS *frag; | |
1423 | symbolS *to_symbol; | |
05b4b0e7 | 1424 | { |
025b0302 | 1425 | as_fatal ("failed sanity check."); |
05b4b0e7 SC |
1426 | } |
1427 | ||
1428 | void | |
dcb195f8 | 1429 | md_convert_frag (headers, seg, fragP) |
025b0302 | 1430 | object_headers *headers; |
dcb195f8 | 1431 | segT seg; |
025b0302 | 1432 | fragS *fragP; |
025b0302 ME |
1433 | { |
1434 | printf ("call to md_convert_frag \n"); | |
1435 | abort (); | |
1436 | } | |
cd8761e1 | 1437 | |
091f3a62 KR |
1438 | valueT |
1439 | md_section_align (seg, size) | |
1728686e SC |
1440 | segT seg; |
1441 | valueT size; | |
cd8761e1 | 1442 | { |
025b0302 ME |
1443 | return ((size + (1 << section_alignment[(int) seg]) - 1) & (-1 << section_alignment[(int) seg])); |
1444 | ||
cd8761e1 SC |
1445 | } |
1446 | ||
05b4b0e7 | 1447 | void |
025b0302 ME |
1448 | md_apply_fix (fixP, val) |
1449 | fixS *fixP; | |
1450 | long val; | |
05b4b0e7 | 1451 | { |
025b0302 ME |
1452 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
1453 | ||
1454 | switch (fixP->fx_size) | |
1455 | { | |
1456 | case 1: | |
1457 | *buf++ = val; | |
1458 | break; | |
1459 | case 2: | |
1460 | *buf++ = (val >> 8); | |
1461 | *buf++ = val; | |
1462 | break; | |
1463 | case 4: | |
1464 | *buf++ = (val >> 24); | |
1465 | *buf++ = (val >> 16); | |
1466 | *buf++ = (val >> 8); | |
1467 | *buf++ = val; | |
1468 | break; | |
1469 | default: | |
1470 | abort (); | |
025b0302 | 1471 | } |
05b4b0e7 | 1472 | } |
cd8761e1 | 1473 | |
025b0302 | 1474 | int md_long_jump_size; |
091f3a62 | 1475 | |
05b4b0e7 | 1476 | int |
025b0302 ME |
1477 | md_estimate_size_before_relax (fragP, segment_type) |
1478 | register fragS *fragP; | |
1479 | register segT segment_type; | |
1480 | { | |
1481 | printf ("call tomd_estimate_size_before_relax \n"); | |
1482 | abort (); | |
1483 | } | |
1484 | ||
cd8761e1 | 1485 | /* Put number into target byte order */ |
05b4b0e7 | 1486 | |
025b0302 | 1487 | void |
091f3a62 KR |
1488 | md_number_to_chars (ptr, use, nbytes) |
1489 | char *ptr; | |
1490 | valueT use; | |
1491 | int nbytes; | |
cd8761e1 | 1492 | { |
dcb195f8 | 1493 | number_to_chars_bigendian (ptr, use, nbytes); |
025b0302 ME |
1494 | } |
1495 | long | |
1496 | md_pcrel_from (fixP) | |
1497 | fixS *fixP; | |
1498 | { | |
1499 | abort (); | |
cd8761e1 | 1500 | } |
cd8761e1 | 1501 | |
5d9f0ecf | 1502 | |
025b0302 ME |
1503 | void |
1504 | tc_reloc_mangle (fix_ptr, intr, base) | |
1505 | fixS *fix_ptr; | |
1506 | struct internal_reloc *intr; | |
1507 | bfd_vma base; | |
5d9f0ecf SC |
1508 | |
1509 | { | |
025b0302 ME |
1510 | symbolS *symbol_ptr; |
1511 | ||
1512 | symbol_ptr = fix_ptr->fx_addsy; | |
1513 | ||
1514 | /* If this relocation is attached to a symbol then it's ok | |
1515 | to output it */ | |
dcb195f8 | 1516 | if (fix_ptr->fx_r_type == TC_CONS_RELOC) |
025b0302 ME |
1517 | { |
1518 | /* cons likes to create reloc32's whatever the size of the reloc.. | |
1519 | */ | |
1520 | switch (fix_ptr->fx_size) | |
1521 | { | |
dcb195f8 JL |
1522 | case 4: |
1523 | intr->r_type = R_RELLONG; | |
1524 | break; | |
025b0302 ME |
1525 | case 2: |
1526 | intr->r_type = R_RELWORD; | |
1527 | break; | |
1528 | case 1: | |
1529 | intr->r_type = R_RELBYTE; | |
1530 | break; | |
1531 | default: | |
1532 | abort (); | |
1533 | ||
a39116f1 | 1534 | } |
025b0302 ME |
1535 | |
1536 | } | |
1537 | else | |
1538 | { | |
1539 | intr->r_type = fix_ptr->fx_r_type; | |
1540 | } | |
1541 | ||
1542 | intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base; | |
1543 | intr->r_offset = fix_ptr->fx_offset; | |
1544 | ||
1545 | if (symbol_ptr) | |
1546 | intr->r_symndx = symbol_ptr->sy_number; | |
1547 | else | |
1548 | intr->r_symndx = -1; | |
1549 | ||
1550 | ||
1551 | } | |
1552 | ||
8b228fe9 | 1553 | /* end of tc-h8300.c */ |