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ee86248c | 1 | /* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64 |
f09c1772 | 2 | Copyright 2009, 2010 |
ee86248c JB |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free | |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
20 | 02110-1301, USA. */ | |
21 | ||
22 | static struct | |
23 | { | |
24 | operatorT op_modifier; /* Operand modifier. */ | |
25 | int is_mem; /* 1 if operand is memory reference. */ | |
25303607 | 26 | int is_indirect; /* 1 if operand is indirect reference. */ |
6cee4cda | 27 | int has_offset; /* 1 if operand has offset. */ |
ee86248c JB |
28 | unsigned int in_offset; /* >=1 if processing operand of offset. */ |
29 | unsigned int in_bracket; /* >=1 if processing operand in brackets. */ | |
30 | unsigned int in_scale; /* >=1 if processing multipication operand | |
31 | * in brackets. */ | |
32 | i386_operand_type reloc_types; /* Value obtained from lex_got(). */ | |
33 | const reg_entry *base; /* Base register (if any). */ | |
34 | const reg_entry *index; /* Index register (if any). */ | |
35 | offsetT scale_factor; /* Accumulated scale factor. */ | |
36 | symbolS *seg; | |
37 | } | |
38 | intel_state; | |
39 | ||
40 | /* offset X_add_symbol */ | |
41 | #define O_offset O_md32 | |
7ac3eb25 L |
42 | /* offset X_add_symbol */ |
43 | #define O_short O_md31 | |
44 | /* near ptr X_add_symbol */ | |
45 | #define O_near_ptr O_md30 | |
46 | /* far ptr X_add_symbol */ | |
47 | #define O_far_ptr O_md29 | |
ee86248c | 48 | /* byte ptr X_add_symbol */ |
7ac3eb25 | 49 | #define O_byte_ptr O_md28 |
ee86248c | 50 | /* word ptr X_add_symbol */ |
7ac3eb25 | 51 | #define O_word_ptr O_md27 |
ee86248c | 52 | /* dword ptr X_add_symbol */ |
7ac3eb25 | 53 | #define O_dword_ptr O_md26 |
ee86248c | 54 | /* qword ptr X_add_symbol */ |
7ac3eb25 | 55 | #define O_qword_ptr O_md25 |
ee86248c | 56 | /* oword ptr X_add_symbol */ |
7ac3eb25 | 57 | #define O_oword_ptr O_md24 |
ee86248c | 58 | /* fword ptr X_add_symbol */ |
7ac3eb25 | 59 | #define O_fword_ptr O_md23 |
ee86248c | 60 | /* tbyte ptr X_add_symbol */ |
7ac3eb25 | 61 | #define O_tbyte_ptr O_md22 |
ee86248c | 62 | /* xmmword ptr X_add_symbol */ |
7ac3eb25 | 63 | #define O_xmmword_ptr O_md21 |
ee86248c | 64 | /* ymmword ptr X_add_symbol */ |
7ac3eb25 | 65 | #define O_ymmword_ptr O_md20 |
43234a1e L |
66 | /* zmmword ptr X_add_symbol */ |
67 | #define O_zmmword_ptr O_md19 | |
ee86248c JB |
68 | |
69 | static struct | |
70 | { | |
71 | const char *name; | |
1e9cc1c2 | 72 | operatorT op; |
ee86248c JB |
73 | unsigned int operands; |
74 | } | |
75 | const i386_operators[] = | |
76 | { | |
77 | { "and", O_bit_and, 2 }, | |
78 | { "eq", O_eq, 2 }, | |
79 | { "ge", O_ge, 2 }, | |
80 | { "gt", O_gt, 2 }, | |
81 | { "le", O_le, 2 }, | |
82 | { "lt", O_lt, 2 }, | |
83 | { "mod", O_modulus, 2 }, | |
84 | { "ne", O_ne, 2 }, | |
85 | { "not", O_bit_not, 1 }, | |
86 | { "offset", O_offset, 1 }, | |
87 | { "or", O_bit_inclusive_or, 2 }, | |
88 | { "shl", O_left_shift, 2 }, | |
89 | { "short", O_short, 1 }, | |
90 | { "shr", O_right_shift, 2 }, | |
91 | { "xor", O_bit_exclusive_or, 2 }, | |
92 | { NULL, O_illegal, 0 } | |
93 | }; | |
94 | ||
95 | static struct | |
96 | { | |
97 | const char *name; | |
1e9cc1c2 | 98 | operatorT op; |
ee86248c JB |
99 | unsigned short sz[3]; |
100 | } | |
101 | const i386_types[] = | |
102 | { | |
103 | #define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } } | |
104 | I386_TYPE(byte, 1), | |
105 | I386_TYPE(word, 2), | |
106 | I386_TYPE(dword, 4), | |
107 | I386_TYPE(fword, 6), | |
108 | I386_TYPE(qword, 8), | |
109 | I386_TYPE(tbyte, 10), | |
110 | I386_TYPE(oword, 16), | |
111 | I386_TYPE(xmmword, 16), | |
112 | I386_TYPE(ymmword, 32), | |
43234a1e | 113 | I386_TYPE(zmmword, 64), |
ee86248c JB |
114 | #undef I386_TYPE |
115 | { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } }, | |
116 | { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } }, | |
117 | { NULL, O_illegal, { 0, 0, 0 } } | |
118 | }; | |
119 | ||
120 | operatorT i386_operator (const char *name, unsigned int operands, char *pc) | |
121 | { | |
122 | unsigned int j; | |
123 | ||
124 | if (!intel_syntax) | |
125 | return O_absent; | |
126 | ||
127 | if (!name) | |
128 | { | |
129 | if (operands != 2) | |
130 | return O_illegal; | |
131 | switch (*input_line_pointer) | |
132 | { | |
133 | case ':': | |
134 | ++input_line_pointer; | |
135 | return O_full_ptr; | |
136 | case '[': | |
137 | ++input_line_pointer; | |
138 | return O_index; | |
139 | case '@': | |
140 | if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC) | |
141 | { | |
142 | int adjust = 0; | |
143 | char *gotfree_input_line = lex_got (&i.reloc[this_operand], | |
144 | &adjust, | |
145 | &intel_state.reloc_types); | |
146 | ||
147 | if (!gotfree_input_line) | |
148 | break; | |
149 | free (gotfree_input_line); | |
150 | *input_line_pointer++ = '+'; | |
151 | memset (input_line_pointer, '0', adjust - 1); | |
152 | input_line_pointer[adjust - 1] = ' '; | |
153 | return O_add; | |
154 | } | |
155 | break; | |
156 | } | |
157 | return O_illegal; | |
158 | } | |
159 | ||
160 | for (j = 0; i386_operators[j].name; ++j) | |
91d6fa6a | 161 | if (strcasecmp (i386_operators[j].name, name) == 0) |
ee86248c JB |
162 | { |
163 | if (i386_operators[j].operands | |
164 | && i386_operators[j].operands != operands) | |
165 | return O_illegal; | |
1e9cc1c2 | 166 | return i386_operators[j].op; |
ee86248c JB |
167 | } |
168 | ||
169 | for (j = 0; i386_types[j].name; ++j) | |
91d6fa6a | 170 | if (strcasecmp (i386_types[j].name, name) == 0) |
ee86248c JB |
171 | break; |
172 | if (i386_types[j].name && *pc == ' ') | |
173 | { | |
91d6fa6a | 174 | char *pname = ++input_line_pointer; |
ee86248c JB |
175 | char c = get_symbol_end (); |
176 | ||
91d6fa6a | 177 | if (strcasecmp (pname, "ptr") == 0) |
ee86248c | 178 | { |
91d6fa6a | 179 | pname[-1] = *pc; |
ee86248c JB |
180 | *pc = c; |
181 | if (intel_syntax > 0 || operands != 1) | |
182 | return O_illegal; | |
1e9cc1c2 | 183 | return i386_types[j].op; |
ee86248c JB |
184 | } |
185 | ||
186 | *input_line_pointer = c; | |
91d6fa6a | 187 | input_line_pointer = pname - 1; |
ee86248c JB |
188 | } |
189 | ||
190 | return O_absent; | |
191 | } | |
192 | ||
193 | static int i386_intel_parse_name (const char *name, expressionS *e) | |
194 | { | |
91d6fa6a | 195 | unsigned int j; |
ee86248c | 196 | |
b7adb16d JB |
197 | if (! strcmp (name, "$")) |
198 | { | |
199 | current_location (e); | |
200 | return 1; | |
201 | } | |
202 | ||
91d6fa6a NC |
203 | for (j = 0; i386_types[j].name; ++j) |
204 | if (strcasecmp(i386_types[j].name, name) == 0) | |
ee86248c JB |
205 | { |
206 | e->X_op = O_constant; | |
91d6fa6a | 207 | e->X_add_number = i386_types[j].sz[flag_code]; |
ee86248c JB |
208 | e->X_add_symbol = NULL; |
209 | e->X_op_symbol = NULL; | |
210 | return 1; | |
211 | } | |
212 | ||
213 | return 0; | |
214 | } | |
215 | ||
91d6fa6a | 216 | static INLINE int i386_intel_check (const reg_entry *rreg, |
ee86248c | 217 | const reg_entry *base, |
91d6fa6a | 218 | const reg_entry *iindex) |
ee86248c | 219 | { |
f09c1772 L |
220 | if ((this_operand >= 0 |
221 | && rreg != i.op[this_operand].regs) | |
222 | || base != intel_state.base | |
223 | || iindex != intel_state.index) | |
ee86248c JB |
224 | { |
225 | as_bad (_("invalid use of register")); | |
226 | return 0; | |
227 | } | |
228 | return 1; | |
229 | } | |
230 | ||
231 | static INLINE void i386_intel_fold (expressionS *e, symbolS *sym) | |
232 | { | |
27dee630 | 233 | expressionS *exp = symbol_get_value_expression (sym); |
ee86248c JB |
234 | if (S_GET_SEGMENT (sym) == absolute_section) |
235 | { | |
236 | offsetT val = e->X_add_number; | |
237 | ||
27dee630 | 238 | *e = *exp; |
ee86248c JB |
239 | e->X_add_number += val; |
240 | } | |
241 | else | |
242 | { | |
27dee630 L |
243 | if (exp->X_op == O_symbol |
244 | && strcmp (S_GET_NAME (exp->X_add_symbol), | |
245 | GLOBAL_OFFSET_TABLE_NAME) == 0) | |
246 | sym = exp->X_add_symbol; | |
ee86248c JB |
247 | e->X_add_symbol = sym; |
248 | e->X_op_symbol = NULL; | |
249 | e->X_op = O_symbol; | |
250 | } | |
251 | } | |
252 | ||
3c7b9c2c L |
253 | static int |
254 | i386_intel_simplify_register (expressionS *e) | |
255 | { | |
256 | int reg_num; | |
257 | ||
258 | if (this_operand < 0 || intel_state.in_offset) | |
259 | { | |
260 | as_bad (_("invalid use of register")); | |
261 | return 0; | |
262 | } | |
263 | ||
264 | if (e->X_op == O_register) | |
265 | reg_num = e->X_add_number; | |
266 | else | |
267 | reg_num = e->X_md - 1; | |
268 | ||
269 | if (!intel_state.in_bracket) | |
270 | { | |
271 | if (i.op[this_operand].regs) | |
272 | { | |
273 | as_bad (_("invalid use of register")); | |
274 | return 0; | |
275 | } | |
276 | if (i386_regtab[reg_num].reg_type.bitfield.sreg3 | |
277 | && i386_regtab[reg_num].reg_num == RegFlat) | |
278 | { | |
279 | as_bad (_("invalid use of pseudo-register")); | |
280 | return 0; | |
281 | } | |
282 | i.op[this_operand].regs = i386_regtab + reg_num; | |
283 | } | |
9e2934f7 JB |
284 | else if (!intel_state.index |
285 | && (i386_regtab[reg_num].reg_type.bitfield.regxmm | |
43234a1e L |
286 | || i386_regtab[reg_num].reg_type.bitfield.regymm |
287 | || i386_regtab[reg_num].reg_type.bitfield.regzmm)) | |
9e2934f7 | 288 | intel_state.index = i386_regtab + reg_num; |
3c7b9c2c L |
289 | else if (!intel_state.base && !intel_state.in_scale) |
290 | intel_state.base = i386_regtab + reg_num; | |
291 | else if (!intel_state.index) | |
9e2934f7 JB |
292 | { |
293 | if (intel_state.in_scale | |
294 | || i386_regtab[reg_num].reg_type.bitfield.baseindex) | |
295 | intel_state.index = i386_regtab + reg_num; | |
296 | else | |
297 | { | |
298 | /* Convert base to index and make ESP/RSP the base. */ | |
299 | intel_state.index = intel_state.base; | |
300 | intel_state.base = i386_regtab + reg_num; | |
301 | } | |
302 | } | |
3c7b9c2c L |
303 | else |
304 | { | |
305 | /* esp is invalid as index */ | |
8280f326 | 306 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
3c7b9c2c L |
307 | } |
308 | return 2; | |
309 | } | |
310 | ||
ee86248c JB |
311 | static int i386_intel_simplify (expressionS *); |
312 | ||
313 | static INLINE int i386_intel_simplify_symbol(symbolS *sym) | |
314 | { | |
315 | int ret = i386_intel_simplify (symbol_get_value_expression (sym)); | |
316 | ||
317 | if (ret == 2) | |
318 | { | |
319 | S_SET_SEGMENT(sym, absolute_section); | |
320 | ret = 1; | |
321 | } | |
322 | return ret; | |
323 | } | |
324 | ||
325 | static int i386_intel_simplify (expressionS *e) | |
326 | { | |
f09c1772 L |
327 | const reg_entry *the_reg = (this_operand >= 0 |
328 | ? i.op[this_operand].regs : NULL); | |
ee86248c | 329 | const reg_entry *base = intel_state.base; |
91d6fa6a | 330 | const reg_entry *state_index = intel_state.index; |
ee86248c JB |
331 | int ret; |
332 | ||
333 | if (!intel_syntax) | |
334 | return 1; | |
335 | ||
336 | switch (e->X_op) | |
337 | { | |
338 | case O_index: | |
339 | if (e->X_add_symbol) | |
340 | { | |
341 | if (!i386_intel_simplify_symbol (e->X_add_symbol) | |
f09c1772 L |
342 | || !i386_intel_check(the_reg, intel_state.base, |
343 | intel_state.index)) | |
5bb3703f | 344 | return 0; |
ee86248c JB |
345 | } |
346 | if (!intel_state.in_offset) | |
347 | ++intel_state.in_bracket; | |
348 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
349 | if (!intel_state.in_offset) | |
350 | --intel_state.in_bracket; | |
351 | if (!ret) | |
352 | return 0; | |
353 | if (e->X_add_symbol) | |
354 | e->X_op = O_add; | |
355 | else | |
356 | i386_intel_fold (e, e->X_op_symbol); | |
357 | break; | |
358 | ||
359 | case O_offset: | |
6cee4cda | 360 | intel_state.has_offset = 1; |
ee86248c JB |
361 | ++intel_state.in_offset; |
362 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
363 | --intel_state.in_offset; | |
91d6fa6a | 364 | if (!ret || !i386_intel_check(the_reg, base, state_index)) |
ee86248c JB |
365 | return 0; |
366 | i386_intel_fold (e, e->X_add_symbol); | |
367 | return ret; | |
368 | ||
369 | case O_byte_ptr: | |
370 | case O_word_ptr: | |
371 | case O_dword_ptr: | |
372 | case O_fword_ptr: | |
373 | case O_qword_ptr: | |
374 | case O_tbyte_ptr: | |
375 | case O_oword_ptr: | |
376 | case O_xmmword_ptr: | |
377 | case O_ymmword_ptr: | |
43234a1e | 378 | case O_zmmword_ptr: |
ee86248c JB |
379 | case O_near_ptr: |
380 | case O_far_ptr: | |
381 | if (intel_state.op_modifier == O_absent) | |
382 | intel_state.op_modifier = e->X_op; | |
383 | /* FALLTHROUGH */ | |
384 | case O_short: | |
f09c1772 L |
385 | if (symbol_get_value_expression (e->X_add_symbol)->X_op |
386 | == O_register) | |
ee86248c JB |
387 | { |
388 | as_bad (_("invalid use of register")); | |
389 | return 0; | |
390 | } | |
391 | if (!i386_intel_simplify_symbol (e->X_add_symbol)) | |
392 | return 0; | |
393 | i386_intel_fold (e, e->X_add_symbol); | |
394 | break; | |
395 | ||
396 | case O_full_ptr: | |
f09c1772 L |
397 | if (symbol_get_value_expression (e->X_op_symbol)->X_op |
398 | == O_register) | |
ee86248c JB |
399 | { |
400 | as_bad (_("invalid use of register")); | |
401 | return 0; | |
402 | } | |
403 | if (!i386_intel_simplify_symbol (e->X_op_symbol) | |
f09c1772 L |
404 | || !i386_intel_check(the_reg, intel_state.base, |
405 | intel_state.index)) | |
ee86248c JB |
406 | return 0; |
407 | if (!intel_state.in_offset) | |
408 | intel_state.seg = e->X_add_symbol; | |
409 | i386_intel_fold (e, e->X_op_symbol); | |
410 | break; | |
411 | ||
ee86248c JB |
412 | case O_multiply: |
413 | if (this_operand >= 0 && intel_state.in_bracket) | |
414 | { | |
415 | expressionS *scale = NULL; | |
416 | ||
417 | if (intel_state.index) | |
418 | --scale; | |
419 | ||
420 | if (!intel_state.in_scale++) | |
421 | intel_state.scale_factor = 1; | |
422 | ||
423 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
424 | if (ret && !scale && intel_state.index) | |
425 | scale = symbol_get_value_expression (e->X_op_symbol); | |
426 | ||
427 | if (ret) | |
428 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
429 | if (ret && !scale && intel_state.index) | |
430 | scale = symbol_get_value_expression (e->X_add_symbol); | |
431 | ||
432 | if (ret && scale && (scale + 1)) | |
433 | { | |
434 | resolve_expression (scale); | |
435 | if (scale->X_op != O_constant | |
436 | || intel_state.index->reg_type.bitfield.reg16) | |
437 | scale->X_add_number = 0; | |
438 | intel_state.scale_factor *= scale->X_add_number; | |
439 | } | |
440 | ||
441 | --intel_state.in_scale; | |
442 | if (!ret) | |
443 | return 0; | |
444 | ||
445 | if (!intel_state.in_scale) | |
446 | switch (intel_state.scale_factor) | |
447 | { | |
448 | case 1: | |
449 | i.log2_scale_factor = 0; | |
450 | break; | |
451 | case 2: | |
452 | i.log2_scale_factor = 1; | |
453 | break; | |
454 | case 4: | |
455 | i.log2_scale_factor = 2; | |
456 | break; | |
457 | case 8: | |
458 | i.log2_scale_factor = 3; | |
459 | break; | |
460 | default: | |
461 | /* esp is invalid as index */ | |
8280f326 | 462 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
ee86248c JB |
463 | break; |
464 | } | |
465 | ||
466 | break; | |
467 | } | |
92b4f90c | 468 | goto fallthrough; |
3c7b9c2c L |
469 | |
470 | case O_register: | |
471 | ret = i386_intel_simplify_register (e); | |
472 | if (ret == 2) | |
473 | { | |
474 | gas_assert (e->X_add_number < (unsigned short) -1); | |
475 | e->X_md = (unsigned short) e->X_add_number + 1; | |
476 | e->X_op = O_constant; | |
477 | e->X_add_number = 0; | |
478 | } | |
479 | return ret; | |
480 | ||
481 | case O_constant: | |
482 | if (e->X_md) | |
483 | return i386_intel_simplify_register (e); | |
484 | ||
ee86248c JB |
485 | /* FALLTHROUGH */ |
486 | default: | |
92b4f90c | 487 | fallthrough: |
f09c1772 L |
488 | if (e->X_add_symbol |
489 | && !i386_intel_simplify_symbol (e->X_add_symbol)) | |
ee86248c JB |
490 | return 0; |
491 | if (e->X_op == O_add || e->X_op == O_subtract) | |
492 | { | |
493 | base = intel_state.base; | |
91d6fa6a | 494 | state_index = intel_state.index; |
ee86248c | 495 | } |
91d6fa6a | 496 | if (!i386_intel_check (the_reg, base, state_index) |
f09c1772 L |
497 | || (e->X_op_symbol |
498 | && !i386_intel_simplify_symbol (e->X_op_symbol)) | |
91d6fa6a | 499 | || !i386_intel_check (the_reg, |
f09c1772 L |
500 | (e->X_op != O_add |
501 | ? base : intel_state.base), | |
502 | (e->X_op != O_add | |
503 | ? state_index : intel_state.index))) | |
ee86248c JB |
504 | return 0; |
505 | break; | |
506 | } | |
507 | ||
f09c1772 L |
508 | if (this_operand >= 0 |
509 | && e->X_op == O_symbol | |
510 | && !intel_state.in_offset) | |
ee86248c JB |
511 | { |
512 | segT seg = S_GET_SEGMENT (e->X_add_symbol); | |
513 | ||
514 | if (seg != absolute_section | |
515 | && seg != reg_section | |
516 | && seg != expr_section) | |
517 | intel_state.is_mem |= 2 - !intel_state.in_bracket; | |
518 | } | |
519 | ||
520 | return 1; | |
521 | } | |
522 | ||
523 | int i386_need_index_operator (void) | |
524 | { | |
525 | return intel_syntax < 0; | |
526 | } | |
527 | ||
528 | static int | |
529 | i386_intel_operand (char *operand_string, int got_a_float) | |
530 | { | |
531 | char *saved_input_line_pointer, *buf; | |
532 | segT exp_seg; | |
533 | expressionS exp, *expP; | |
534 | char suffix = 0; | |
535 | int ret; | |
536 | ||
43234a1e L |
537 | /* Handle vector immediates. */ |
538 | if (RC_SAE_immediate (operand_string)) | |
539 | return 1; | |
540 | ||
ee86248c JB |
541 | /* Initialize state structure. */ |
542 | intel_state.op_modifier = O_absent; | |
543 | intel_state.is_mem = 0; | |
25303607 | 544 | intel_state.is_indirect = 0; |
1acf546e | 545 | intel_state.has_offset = 0; |
ee86248c JB |
546 | intel_state.base = NULL; |
547 | intel_state.index = NULL; | |
548 | intel_state.seg = NULL; | |
549 | operand_type_set (&intel_state.reloc_types, ~0); | |
9c2799c2 NC |
550 | gas_assert (!intel_state.in_offset); |
551 | gas_assert (!intel_state.in_bracket); | |
552 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
553 | |
554 | saved_input_line_pointer = input_line_pointer; | |
555 | input_line_pointer = buf = xstrdup (operand_string); | |
556 | ||
557 | intel_syntax = -1; | |
558 | memset (&exp, 0, sizeof(exp)); | |
559 | exp_seg = expression (&exp); | |
560 | ret = i386_intel_simplify (&exp); | |
561 | intel_syntax = 1; | |
562 | ||
563 | SKIP_WHITESPACE (); | |
43234a1e L |
564 | |
565 | /* Handle vector operations. */ | |
566 | if (*input_line_pointer == '{') | |
567 | { | |
568 | char *end = check_VecOperations (input_line_pointer, NULL); | |
569 | if (end) | |
570 | input_line_pointer = end; | |
571 | else | |
572 | ret = 0; | |
573 | } | |
574 | ||
ee86248c JB |
575 | if (!is_end_of_line[(unsigned char) *input_line_pointer]) |
576 | { | |
577 | as_bad (_("junk `%s' after expression"), input_line_pointer); | |
578 | ret = 0; | |
579 | } | |
580 | else if (exp.X_op == O_illegal || exp.X_op == O_absent) | |
581 | { | |
582 | as_bad (_("invalid expression")); | |
583 | ret = 0; | |
584 | } | |
6cee4cda L |
585 | else if (!intel_state.has_offset |
586 | && input_line_pointer > buf | |
587 | && *(input_line_pointer - 1) == ']') | |
25303607 L |
588 | { |
589 | intel_state.is_mem |= 1; | |
590 | intel_state.is_indirect = 1; | |
591 | } | |
ee86248c JB |
592 | |
593 | input_line_pointer = saved_input_line_pointer; | |
594 | free (buf); | |
595 | ||
9c2799c2 NC |
596 | gas_assert (!intel_state.in_offset); |
597 | gas_assert (!intel_state.in_bracket); | |
598 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
599 | |
600 | if (!ret) | |
601 | return 0; | |
602 | ||
603 | if (intel_state.op_modifier != O_absent | |
604 | && current_templates->start->base_opcode != 0x8d /* lea */) | |
605 | { | |
606 | i.types[this_operand].bitfield.unspecified = 0; | |
607 | ||
608 | switch (intel_state.op_modifier) | |
609 | { | |
610 | case O_byte_ptr: | |
611 | i.types[this_operand].bitfield.byte = 1; | |
612 | suffix = BYTE_MNEM_SUFFIX; | |
613 | break; | |
614 | ||
615 | case O_word_ptr: | |
616 | i.types[this_operand].bitfield.word = 1; | |
617 | if ((current_templates->start->name[0] == 'l' | |
618 | && current_templates->start->name[2] == 's' | |
619 | && current_templates->start->name[3] == 0) | |
620 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
621 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
622 | else if (got_a_float == 2) /* "fi..." */ | |
623 | suffix = SHORT_MNEM_SUFFIX; | |
624 | else | |
625 | suffix = WORD_MNEM_SUFFIX; | |
626 | break; | |
627 | ||
628 | case O_dword_ptr: | |
629 | i.types[this_operand].bitfield.dword = 1; | |
630 | if ((current_templates->start->name[0] == 'l' | |
631 | && current_templates->start->name[2] == 's' | |
632 | && current_templates->start->name[3] == 0) | |
633 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
634 | suffix = WORD_MNEM_SUFFIX; | |
635 | else if (flag_code == CODE_16BIT | |
636 | && (current_templates->start->opcode_modifier.jump | |
637 | || current_templates->start->opcode_modifier.jumpdword)) | |
638 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
639 | else if (got_a_float == 1) /* "f..." */ | |
640 | suffix = SHORT_MNEM_SUFFIX; | |
641 | else | |
642 | suffix = LONG_MNEM_SUFFIX; | |
643 | break; | |
644 | ||
645 | case O_fword_ptr: | |
646 | i.types[this_operand].bitfield.fword = 1; | |
647 | if (current_templates->start->name[0] == 'l' | |
648 | && current_templates->start->name[2] == 's' | |
649 | && current_templates->start->name[3] == 0) | |
650 | suffix = LONG_MNEM_SUFFIX; | |
651 | else if (!got_a_float) | |
652 | { | |
653 | if (flag_code == CODE_16BIT) | |
654 | add_prefix (DATA_PREFIX_OPCODE); | |
655 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
656 | } | |
657 | else | |
658 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
659 | break; | |
660 | ||
661 | case O_qword_ptr: | |
662 | i.types[this_operand].bitfield.qword = 1; | |
663 | if (current_templates->start->base_opcode == 0x62 /* bound */ | |
664 | || got_a_float == 1) /* "f..." */ | |
665 | suffix = LONG_MNEM_SUFFIX; | |
666 | else | |
667 | suffix = QWORD_MNEM_SUFFIX; | |
668 | break; | |
669 | ||
670 | case O_tbyte_ptr: | |
671 | i.types[this_operand].bitfield.tbyte = 1; | |
672 | if (got_a_float == 1) | |
673 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
674 | else | |
675 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
676 | break; | |
677 | ||
678 | case O_oword_ptr: | |
679 | case O_xmmword_ptr: | |
680 | i.types[this_operand].bitfield.xmmword = 1; | |
681 | suffix = XMMWORD_MNEM_SUFFIX; | |
682 | break; | |
683 | ||
684 | case O_ymmword_ptr: | |
685 | i.types[this_operand].bitfield.ymmword = 1; | |
686 | suffix = YMMWORD_MNEM_SUFFIX; | |
687 | break; | |
688 | ||
43234a1e L |
689 | case O_zmmword_ptr: |
690 | i.types[this_operand].bitfield.zmmword = 1; | |
691 | suffix = ZMMWORD_MNEM_SUFFIX; | |
692 | break; | |
693 | ||
ee86248c JB |
694 | case O_far_ptr: |
695 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
696 | /* FALLTHROUGH */ | |
697 | case O_near_ptr: | |
698 | if (!current_templates->start->opcode_modifier.jump | |
699 | && !current_templates->start->opcode_modifier.jumpdword) | |
700 | suffix = got_a_float /* so it will cause an error */ | |
701 | ? BYTE_MNEM_SUFFIX | |
702 | : LONG_DOUBLE_MNEM_SUFFIX; | |
703 | break; | |
704 | ||
705 | default: | |
706 | BAD_CASE (intel_state.op_modifier); | |
707 | break; | |
708 | } | |
709 | ||
710 | if (!i.suffix) | |
711 | i.suffix = suffix; | |
712 | else if (i.suffix != suffix) | |
713 | { | |
714 | as_bad (_("conflicting operand size modifiers")); | |
715 | return 0; | |
716 | } | |
717 | } | |
718 | ||
719 | /* Operands for jump/call need special consideration. */ | |
720 | if (current_templates->start->opcode_modifier.jump | |
721 | || current_templates->start->opcode_modifier.jumpdword | |
722 | || current_templates->start->opcode_modifier.jumpintersegment) | |
723 | { | |
f09c1772 L |
724 | if (i.op[this_operand].regs |
725 | || intel_state.base | |
726 | || intel_state.index | |
ee86248c JB |
727 | || intel_state.is_mem > 1) |
728 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
729 | else | |
730 | switch (intel_state.op_modifier) | |
731 | { | |
732 | case O_near_ptr: | |
733 | if (intel_state.seg) | |
734 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
735 | else | |
736 | intel_state.is_mem = 1; | |
737 | break; | |
738 | case O_far_ptr: | |
739 | case O_absent: | |
740 | if (!intel_state.seg) | |
741 | { | |
742 | intel_state.is_mem = 1; | |
743 | if (intel_state.op_modifier == O_absent) | |
25303607 L |
744 | { |
745 | if (intel_state.is_indirect == 1) | |
746 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
747 | break; | |
748 | } | |
ee86248c JB |
749 | as_bad (_("cannot infer the segment part of the operand")); |
750 | return 0; | |
751 | } | |
752 | else if (S_GET_SEGMENT (intel_state.seg) == reg_section) | |
753 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
754 | else | |
755 | { | |
756 | i386_operand_type types; | |
757 | ||
758 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
759 | { | |
760 | as_bad (_("at most %d immediate operands are allowed"), | |
761 | MAX_IMMEDIATE_OPERANDS); | |
762 | return 0; | |
763 | } | |
764 | expP = &im_expressions[i.imm_operands++]; | |
765 | memset (expP, 0, sizeof(*expP)); | |
766 | expP->X_op = O_symbol; | |
767 | expP->X_add_symbol = intel_state.seg; | |
768 | i.op[this_operand].imms = expP; | |
769 | ||
770 | resolve_expression (expP); | |
771 | operand_type_set (&types, ~0); | |
772 | if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg), | |
773 | expP, types, operand_string)) | |
774 | return 0; | |
775 | if (i.operands < MAX_OPERANDS) | |
776 | { | |
777 | this_operand = i.operands++; | |
778 | i.types[this_operand].bitfield.unspecified = 1; | |
779 | } | |
780 | if (suffix == LONG_DOUBLE_MNEM_SUFFIX) | |
781 | i.suffix = 0; | |
782 | intel_state.seg = NULL; | |
783 | intel_state.is_mem = 0; | |
784 | } | |
785 | break; | |
786 | default: | |
787 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
788 | break; | |
789 | } | |
790 | if (i.types[this_operand].bitfield.jumpabsolute) | |
791 | intel_state.is_mem |= 1; | |
792 | } | |
793 | else if (intel_state.seg) | |
794 | intel_state.is_mem |= 1; | |
795 | ||
796 | if (i.op[this_operand].regs) | |
797 | { | |
798 | i386_operand_type temp; | |
799 | ||
800 | /* Register operand. */ | |
801 | if (intel_state.base || intel_state.index || intel_state.seg) | |
802 | { | |
803 | as_bad (_("invalid operand")); | |
804 | return 0; | |
805 | } | |
806 | ||
807 | temp = i.op[this_operand].regs->reg_type; | |
808 | temp.bitfield.baseindex = 0; | |
f09c1772 L |
809 | i.types[this_operand] = operand_type_or (i.types[this_operand], |
810 | temp); | |
ee86248c JB |
811 | i.types[this_operand].bitfield.unspecified = 0; |
812 | ++i.reg_operands; | |
813 | } | |
f09c1772 L |
814 | else if (intel_state.base |
815 | || intel_state.index | |
816 | || intel_state.seg | |
ee86248c JB |
817 | || intel_state.is_mem) |
818 | { | |
819 | /* Memory operand. */ | |
faf786e6 | 820 | if ((int) i.mem_operands |
ee86248c JB |
821 | >= 2 - !current_templates->start->opcode_modifier.isstring) |
822 | { | |
313c53d1 L |
823 | /* Handle |
824 | ||
825 | call 0x9090,0x90909090 | |
826 | lcall 0x9090,0x90909090 | |
827 | jmp 0x9090,0x90909090 | |
828 | ljmp 0x9090,0x90909090 | |
829 | */ | |
830 | ||
831 | if ((current_templates->start->opcode_modifier.jumpintersegment | |
832 | || current_templates->start->opcode_modifier.jumpdword | |
833 | || current_templates->start->opcode_modifier.jump) | |
834 | && this_operand == 1 | |
835 | && intel_state.seg == NULL | |
836 | && i.mem_operands == 1 | |
837 | && i.disp_operands == 1 | |
838 | && intel_state.op_modifier == O_absent) | |
839 | { | |
840 | /* Try to process the first operand as immediate, */ | |
841 | this_operand = 0; | |
842 | if (i386_finalize_immediate (exp_seg, i.op[0].imms, | |
843 | intel_state.reloc_types, | |
844 | NULL)) | |
845 | { | |
846 | this_operand = 1; | |
847 | expP = &im_expressions[0]; | |
848 | i.op[this_operand].imms = expP; | |
849 | *expP = exp; | |
850 | ||
851 | /* Try to process the second operand as immediate, */ | |
852 | if (i386_finalize_immediate (exp_seg, expP, | |
853 | intel_state.reloc_types, | |
854 | NULL)) | |
855 | { | |
856 | i.mem_operands = 0; | |
857 | i.disp_operands = 0; | |
858 | i.imm_operands = 2; | |
859 | i.types[0].bitfield.mem = 0; | |
860 | i.types[0].bitfield.disp16 = 0; | |
861 | i.types[0].bitfield.disp32 = 0; | |
862 | i.types[0].bitfield.disp32s = 0; | |
863 | return 1; | |
864 | } | |
865 | } | |
866 | } | |
867 | ||
ee86248c JB |
868 | as_bad (_("too many memory references for `%s'"), |
869 | current_templates->start->name); | |
870 | return 0; | |
871 | } | |
872 | ||
873 | expP = &disp_expressions[i.disp_operands]; | |
874 | memcpy (expP, &exp, sizeof(exp)); | |
875 | resolve_expression (expP); | |
876 | ||
f09c1772 L |
877 | if (expP->X_op != O_constant |
878 | || expP->X_add_number | |
879 | || (!intel_state.base | |
880 | && !intel_state.index)) | |
ee86248c JB |
881 | { |
882 | i.op[this_operand].disps = expP; | |
883 | i.disp_operands++; | |
884 | ||
885 | if (flag_code == CODE_64BIT) | |
886 | { | |
887 | i.types[this_operand].bitfield.disp32 = 1; | |
888 | if (!i.prefix[ADDR_PREFIX]) | |
889 | { | |
890 | i.types[this_operand].bitfield.disp64 = 1; | |
891 | i.types[this_operand].bitfield.disp32s = 1; | |
892 | } | |
893 | } | |
894 | else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT)) | |
895 | i.types[this_operand].bitfield.disp32 = 1; | |
896 | else | |
897 | i.types[this_operand].bitfield.disp16 = 1; | |
898 | ||
899 | #if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) | |
900 | /* | |
901 | * exp_seg is used only for verification in | |
902 | * i386_finalize_displacement, and we can end up seeing reg_section | |
903 | * here - but we know we removed all registers from the expression | |
904 | * (or error-ed on any remaining ones) in i386_intel_simplify. I | |
905 | * consider the check in i386_finalize_displacement bogus anyway, in | |
906 | * particular because it doesn't allow for expr_section, so I'd | |
907 | * rather see that check (and the similar one in | |
908 | * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out | |
909 | * expert I can't really say whether that would have other bad side | |
910 | * effects. | |
911 | */ | |
912 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour | |
913 | && exp_seg == reg_section) | |
914 | exp_seg = expP->X_op != O_constant ? undefined_section | |
915 | : absolute_section; | |
916 | #endif | |
917 | ||
918 | if (!i386_finalize_displacement (exp_seg, expP, | |
919 | intel_state.reloc_types, | |
920 | operand_string)) | |
921 | return 0; | |
922 | } | |
923 | ||
924 | if (intel_state.base || intel_state.index) | |
925 | i.types[this_operand].bitfield.baseindex = 1; | |
926 | ||
927 | if (intel_state.seg) | |
928 | { | |
929 | for (;;) | |
930 | { | |
931 | expP = symbol_get_value_expression (intel_state.seg); | |
932 | if (expP->X_op != O_full_ptr) | |
933 | break; | |
934 | intel_state.seg = expP->X_add_symbol; | |
935 | } | |
0398aac5 | 936 | if (expP->X_op != O_register) |
ee86248c JB |
937 | { |
938 | as_bad (_("segment register name expected")); | |
939 | return 0; | |
940 | } | |
941 | if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2 | |
942 | && !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3) | |
943 | { | |
944 | as_bad (_("invalid use of register")); | |
945 | return 0; | |
946 | } | |
947 | switch (i386_regtab[expP->X_add_number].reg_num) | |
948 | { | |
949 | case 0: i.seg[i.mem_operands] = &es; break; | |
950 | case 1: i.seg[i.mem_operands] = &cs; break; | |
951 | case 2: i.seg[i.mem_operands] = &ss; break; | |
952 | case 3: i.seg[i.mem_operands] = &ds; break; | |
953 | case 4: i.seg[i.mem_operands] = &fs; break; | |
954 | case 5: i.seg[i.mem_operands] = &gs; break; | |
955 | case RegFlat: i.seg[i.mem_operands] = NULL; break; | |
956 | } | |
957 | } | |
958 | ||
959 | /* Swap base and index in 16-bit memory operands like | |
960 | [si+bx]. Since i386_index_check is also used in AT&T | |
961 | mode we have to do that here. */ | |
962 | if (intel_state.base | |
963 | && intel_state.index | |
964 | && intel_state.base->reg_type.bitfield.reg16 | |
965 | && intel_state.index->reg_type.bitfield.reg16 | |
966 | && intel_state.base->reg_num >= 6 | |
967 | && intel_state.index->reg_num < 6) | |
968 | { | |
969 | i.base_reg = intel_state.index; | |
970 | i.index_reg = intel_state.base; | |
971 | } | |
972 | else | |
973 | { | |
974 | i.base_reg = intel_state.base; | |
975 | i.index_reg = intel_state.index; | |
976 | } | |
977 | ||
978 | if (!i386_index_check (operand_string)) | |
979 | return 0; | |
980 | ||
981 | i.types[this_operand].bitfield.mem = 1; | |
982 | ++i.mem_operands; | |
983 | } | |
984 | else | |
985 | { | |
986 | /* Immediate. */ | |
987 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
988 | { | |
989 | as_bad (_("at most %d immediate operands are allowed"), | |
990 | MAX_IMMEDIATE_OPERANDS); | |
991 | return 0; | |
992 | } | |
993 | ||
994 | expP = &im_expressions[i.imm_operands++]; | |
995 | i.op[this_operand].imms = expP; | |
996 | *expP = exp; | |
997 | ||
998 | return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types, | |
999 | operand_string); | |
1000 | } | |
1001 | ||
1002 | return 1; | |
1003 | } |