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ee86248c | 1 | /* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64 |
f09c1772 | 2 | Copyright 2009, 2010 |
ee86248c JB |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free | |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
20 | 02110-1301, USA. */ | |
21 | ||
22 | static struct | |
23 | { | |
24 | operatorT op_modifier; /* Operand modifier. */ | |
25 | int is_mem; /* 1 if operand is memory reference. */ | |
25303607 | 26 | int is_indirect; /* 1 if operand is indirect reference. */ |
6cee4cda | 27 | int has_offset; /* 1 if operand has offset. */ |
ee86248c JB |
28 | unsigned int in_offset; /* >=1 if processing operand of offset. */ |
29 | unsigned int in_bracket; /* >=1 if processing operand in brackets. */ | |
30 | unsigned int in_scale; /* >=1 if processing multipication operand | |
31 | * in brackets. */ | |
32 | i386_operand_type reloc_types; /* Value obtained from lex_got(). */ | |
33 | const reg_entry *base; /* Base register (if any). */ | |
34 | const reg_entry *index; /* Index register (if any). */ | |
35 | offsetT scale_factor; /* Accumulated scale factor. */ | |
36 | symbolS *seg; | |
37 | } | |
38 | intel_state; | |
39 | ||
40 | /* offset X_add_symbol */ | |
41 | #define O_offset O_md32 | |
7ac3eb25 L |
42 | /* offset X_add_symbol */ |
43 | #define O_short O_md31 | |
44 | /* near ptr X_add_symbol */ | |
45 | #define O_near_ptr O_md30 | |
46 | /* far ptr X_add_symbol */ | |
47 | #define O_far_ptr O_md29 | |
ee86248c | 48 | /* byte ptr X_add_symbol */ |
7ac3eb25 | 49 | #define O_byte_ptr O_md28 |
ee86248c | 50 | /* word ptr X_add_symbol */ |
7ac3eb25 | 51 | #define O_word_ptr O_md27 |
ee86248c | 52 | /* dword ptr X_add_symbol */ |
7ac3eb25 | 53 | #define O_dword_ptr O_md26 |
ee86248c | 54 | /* qword ptr X_add_symbol */ |
7ac3eb25 | 55 | #define O_qword_ptr O_md25 |
ee86248c | 56 | /* oword ptr X_add_symbol */ |
7ac3eb25 | 57 | #define O_oword_ptr O_md24 |
ee86248c | 58 | /* fword ptr X_add_symbol */ |
7ac3eb25 | 59 | #define O_fword_ptr O_md23 |
ee86248c | 60 | /* tbyte ptr X_add_symbol */ |
7ac3eb25 | 61 | #define O_tbyte_ptr O_md22 |
ee86248c | 62 | /* xmmword ptr X_add_symbol */ |
7ac3eb25 | 63 | #define O_xmmword_ptr O_md21 |
ee86248c | 64 | /* ymmword ptr X_add_symbol */ |
7ac3eb25 | 65 | #define O_ymmword_ptr O_md20 |
43234a1e L |
66 | /* zmmword ptr X_add_symbol */ |
67 | #define O_zmmword_ptr O_md19 | |
ee86248c JB |
68 | |
69 | static struct | |
70 | { | |
71 | const char *name; | |
1e9cc1c2 | 72 | operatorT op; |
ee86248c JB |
73 | unsigned int operands; |
74 | } | |
75 | const i386_operators[] = | |
76 | { | |
77 | { "and", O_bit_and, 2 }, | |
78 | { "eq", O_eq, 2 }, | |
79 | { "ge", O_ge, 2 }, | |
80 | { "gt", O_gt, 2 }, | |
81 | { "le", O_le, 2 }, | |
82 | { "lt", O_lt, 2 }, | |
83 | { "mod", O_modulus, 2 }, | |
84 | { "ne", O_ne, 2 }, | |
85 | { "not", O_bit_not, 1 }, | |
86 | { "offset", O_offset, 1 }, | |
87 | { "or", O_bit_inclusive_or, 2 }, | |
88 | { "shl", O_left_shift, 2 }, | |
89 | { "short", O_short, 1 }, | |
90 | { "shr", O_right_shift, 2 }, | |
91 | { "xor", O_bit_exclusive_or, 2 }, | |
92 | { NULL, O_illegal, 0 } | |
93 | }; | |
94 | ||
95 | static struct | |
96 | { | |
97 | const char *name; | |
1e9cc1c2 | 98 | operatorT op; |
ee86248c JB |
99 | unsigned short sz[3]; |
100 | } | |
101 | const i386_types[] = | |
102 | { | |
103 | #define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } } | |
104 | I386_TYPE(byte, 1), | |
105 | I386_TYPE(word, 2), | |
106 | I386_TYPE(dword, 4), | |
107 | I386_TYPE(fword, 6), | |
108 | I386_TYPE(qword, 8), | |
109 | I386_TYPE(tbyte, 10), | |
110 | I386_TYPE(oword, 16), | |
111 | I386_TYPE(xmmword, 16), | |
112 | I386_TYPE(ymmword, 32), | |
43234a1e | 113 | I386_TYPE(zmmword, 64), |
ee86248c JB |
114 | #undef I386_TYPE |
115 | { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } }, | |
116 | { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } }, | |
117 | { NULL, O_illegal, { 0, 0, 0 } } | |
118 | }; | |
119 | ||
120 | operatorT i386_operator (const char *name, unsigned int operands, char *pc) | |
121 | { | |
122 | unsigned int j; | |
123 | ||
124 | if (!intel_syntax) | |
125 | return O_absent; | |
126 | ||
127 | if (!name) | |
128 | { | |
129 | if (operands != 2) | |
130 | return O_illegal; | |
131 | switch (*input_line_pointer) | |
132 | { | |
133 | case ':': | |
134 | ++input_line_pointer; | |
135 | return O_full_ptr; | |
136 | case '[': | |
137 | ++input_line_pointer; | |
138 | return O_index; | |
139 | case '@': | |
140 | if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC) | |
141 | { | |
142 | int adjust = 0; | |
143 | char *gotfree_input_line = lex_got (&i.reloc[this_operand], | |
144 | &adjust, | |
c3320543 L |
145 | &intel_state.reloc_types, |
146 | (i.bnd_prefix != NULL | |
147 | || add_bnd_prefix)); | |
ee86248c JB |
148 | |
149 | if (!gotfree_input_line) | |
150 | break; | |
151 | free (gotfree_input_line); | |
152 | *input_line_pointer++ = '+'; | |
153 | memset (input_line_pointer, '0', adjust - 1); | |
154 | input_line_pointer[adjust - 1] = ' '; | |
155 | return O_add; | |
156 | } | |
157 | break; | |
158 | } | |
159 | return O_illegal; | |
160 | } | |
161 | ||
162 | for (j = 0; i386_operators[j].name; ++j) | |
91d6fa6a | 163 | if (strcasecmp (i386_operators[j].name, name) == 0) |
ee86248c JB |
164 | { |
165 | if (i386_operators[j].operands | |
166 | && i386_operators[j].operands != operands) | |
167 | return O_illegal; | |
1e9cc1c2 | 168 | return i386_operators[j].op; |
ee86248c JB |
169 | } |
170 | ||
171 | for (j = 0; i386_types[j].name; ++j) | |
91d6fa6a | 172 | if (strcasecmp (i386_types[j].name, name) == 0) |
ee86248c JB |
173 | break; |
174 | if (i386_types[j].name && *pc == ' ') | |
175 | { | |
91d6fa6a | 176 | char *pname = ++input_line_pointer; |
ee86248c JB |
177 | char c = get_symbol_end (); |
178 | ||
91d6fa6a | 179 | if (strcasecmp (pname, "ptr") == 0) |
ee86248c | 180 | { |
91d6fa6a | 181 | pname[-1] = *pc; |
ee86248c JB |
182 | *pc = c; |
183 | if (intel_syntax > 0 || operands != 1) | |
184 | return O_illegal; | |
1e9cc1c2 | 185 | return i386_types[j].op; |
ee86248c JB |
186 | } |
187 | ||
188 | *input_line_pointer = c; | |
91d6fa6a | 189 | input_line_pointer = pname - 1; |
ee86248c JB |
190 | } |
191 | ||
192 | return O_absent; | |
193 | } | |
194 | ||
195 | static int i386_intel_parse_name (const char *name, expressionS *e) | |
196 | { | |
91d6fa6a | 197 | unsigned int j; |
ee86248c | 198 | |
b7adb16d JB |
199 | if (! strcmp (name, "$")) |
200 | { | |
201 | current_location (e); | |
202 | return 1; | |
203 | } | |
204 | ||
91d6fa6a NC |
205 | for (j = 0; i386_types[j].name; ++j) |
206 | if (strcasecmp(i386_types[j].name, name) == 0) | |
ee86248c JB |
207 | { |
208 | e->X_op = O_constant; | |
91d6fa6a | 209 | e->X_add_number = i386_types[j].sz[flag_code]; |
ee86248c JB |
210 | e->X_add_symbol = NULL; |
211 | e->X_op_symbol = NULL; | |
212 | return 1; | |
213 | } | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
91d6fa6a | 218 | static INLINE int i386_intel_check (const reg_entry *rreg, |
ee86248c | 219 | const reg_entry *base, |
91d6fa6a | 220 | const reg_entry *iindex) |
ee86248c | 221 | { |
f09c1772 L |
222 | if ((this_operand >= 0 |
223 | && rreg != i.op[this_operand].regs) | |
224 | || base != intel_state.base | |
225 | || iindex != intel_state.index) | |
ee86248c JB |
226 | { |
227 | as_bad (_("invalid use of register")); | |
228 | return 0; | |
229 | } | |
230 | return 1; | |
231 | } | |
232 | ||
233 | static INLINE void i386_intel_fold (expressionS *e, symbolS *sym) | |
234 | { | |
27dee630 | 235 | expressionS *exp = symbol_get_value_expression (sym); |
ee86248c JB |
236 | if (S_GET_SEGMENT (sym) == absolute_section) |
237 | { | |
238 | offsetT val = e->X_add_number; | |
239 | ||
27dee630 | 240 | *e = *exp; |
ee86248c JB |
241 | e->X_add_number += val; |
242 | } | |
243 | else | |
244 | { | |
27dee630 L |
245 | if (exp->X_op == O_symbol |
246 | && strcmp (S_GET_NAME (exp->X_add_symbol), | |
247 | GLOBAL_OFFSET_TABLE_NAME) == 0) | |
248 | sym = exp->X_add_symbol; | |
ee86248c JB |
249 | e->X_add_symbol = sym; |
250 | e->X_op_symbol = NULL; | |
251 | e->X_op = O_symbol; | |
252 | } | |
253 | } | |
254 | ||
3c7b9c2c L |
255 | static int |
256 | i386_intel_simplify_register (expressionS *e) | |
257 | { | |
258 | int reg_num; | |
259 | ||
260 | if (this_operand < 0 || intel_state.in_offset) | |
261 | { | |
262 | as_bad (_("invalid use of register")); | |
263 | return 0; | |
264 | } | |
265 | ||
266 | if (e->X_op == O_register) | |
267 | reg_num = e->X_add_number; | |
268 | else | |
269 | reg_num = e->X_md - 1; | |
270 | ||
271 | if (!intel_state.in_bracket) | |
272 | { | |
273 | if (i.op[this_operand].regs) | |
274 | { | |
275 | as_bad (_("invalid use of register")); | |
276 | return 0; | |
277 | } | |
278 | if (i386_regtab[reg_num].reg_type.bitfield.sreg3 | |
279 | && i386_regtab[reg_num].reg_num == RegFlat) | |
280 | { | |
281 | as_bad (_("invalid use of pseudo-register")); | |
282 | return 0; | |
283 | } | |
284 | i.op[this_operand].regs = i386_regtab + reg_num; | |
285 | } | |
9e2934f7 JB |
286 | else if (!intel_state.index |
287 | && (i386_regtab[reg_num].reg_type.bitfield.regxmm | |
43234a1e L |
288 | || i386_regtab[reg_num].reg_type.bitfield.regymm |
289 | || i386_regtab[reg_num].reg_type.bitfield.regzmm)) | |
9e2934f7 | 290 | intel_state.index = i386_regtab + reg_num; |
3c7b9c2c L |
291 | else if (!intel_state.base && !intel_state.in_scale) |
292 | intel_state.base = i386_regtab + reg_num; | |
293 | else if (!intel_state.index) | |
9e2934f7 JB |
294 | { |
295 | if (intel_state.in_scale | |
47cd3fa7 JB |
296 | || current_templates->start->base_opcode == 0xf30f1b /* bndmk */ |
297 | || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */ | |
9e2934f7 JB |
298 | || i386_regtab[reg_num].reg_type.bitfield.baseindex) |
299 | intel_state.index = i386_regtab + reg_num; | |
300 | else | |
301 | { | |
302 | /* Convert base to index and make ESP/RSP the base. */ | |
303 | intel_state.index = intel_state.base; | |
304 | intel_state.base = i386_regtab + reg_num; | |
305 | } | |
306 | } | |
3c7b9c2c L |
307 | else |
308 | { | |
309 | /* esp is invalid as index */ | |
8280f326 | 310 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
3c7b9c2c L |
311 | } |
312 | return 2; | |
313 | } | |
314 | ||
ee86248c JB |
315 | static int i386_intel_simplify (expressionS *); |
316 | ||
317 | static INLINE int i386_intel_simplify_symbol(symbolS *sym) | |
318 | { | |
319 | int ret = i386_intel_simplify (symbol_get_value_expression (sym)); | |
320 | ||
321 | if (ret == 2) | |
322 | { | |
323 | S_SET_SEGMENT(sym, absolute_section); | |
324 | ret = 1; | |
325 | } | |
326 | return ret; | |
327 | } | |
328 | ||
329 | static int i386_intel_simplify (expressionS *e) | |
330 | { | |
f09c1772 L |
331 | const reg_entry *the_reg = (this_operand >= 0 |
332 | ? i.op[this_operand].regs : NULL); | |
ee86248c | 333 | const reg_entry *base = intel_state.base; |
91d6fa6a | 334 | const reg_entry *state_index = intel_state.index; |
ee86248c JB |
335 | int ret; |
336 | ||
337 | if (!intel_syntax) | |
338 | return 1; | |
339 | ||
340 | switch (e->X_op) | |
341 | { | |
342 | case O_index: | |
343 | if (e->X_add_symbol) | |
344 | { | |
345 | if (!i386_intel_simplify_symbol (e->X_add_symbol) | |
f09c1772 L |
346 | || !i386_intel_check(the_reg, intel_state.base, |
347 | intel_state.index)) | |
5bb3703f | 348 | return 0; |
ee86248c JB |
349 | } |
350 | if (!intel_state.in_offset) | |
351 | ++intel_state.in_bracket; | |
352 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
353 | if (!intel_state.in_offset) | |
354 | --intel_state.in_bracket; | |
355 | if (!ret) | |
356 | return 0; | |
357 | if (e->X_add_symbol) | |
358 | e->X_op = O_add; | |
359 | else | |
360 | i386_intel_fold (e, e->X_op_symbol); | |
361 | break; | |
362 | ||
363 | case O_offset: | |
6cee4cda | 364 | intel_state.has_offset = 1; |
ee86248c JB |
365 | ++intel_state.in_offset; |
366 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
367 | --intel_state.in_offset; | |
91d6fa6a | 368 | if (!ret || !i386_intel_check(the_reg, base, state_index)) |
ee86248c JB |
369 | return 0; |
370 | i386_intel_fold (e, e->X_add_symbol); | |
371 | return ret; | |
372 | ||
373 | case O_byte_ptr: | |
374 | case O_word_ptr: | |
375 | case O_dword_ptr: | |
376 | case O_fword_ptr: | |
377 | case O_qword_ptr: | |
378 | case O_tbyte_ptr: | |
379 | case O_oword_ptr: | |
380 | case O_xmmword_ptr: | |
381 | case O_ymmword_ptr: | |
43234a1e | 382 | case O_zmmword_ptr: |
ee86248c JB |
383 | case O_near_ptr: |
384 | case O_far_ptr: | |
385 | if (intel_state.op_modifier == O_absent) | |
386 | intel_state.op_modifier = e->X_op; | |
387 | /* FALLTHROUGH */ | |
388 | case O_short: | |
f09c1772 L |
389 | if (symbol_get_value_expression (e->X_add_symbol)->X_op |
390 | == O_register) | |
ee86248c JB |
391 | { |
392 | as_bad (_("invalid use of register")); | |
393 | return 0; | |
394 | } | |
395 | if (!i386_intel_simplify_symbol (e->X_add_symbol)) | |
396 | return 0; | |
397 | i386_intel_fold (e, e->X_add_symbol); | |
398 | break; | |
399 | ||
400 | case O_full_ptr: | |
f09c1772 L |
401 | if (symbol_get_value_expression (e->X_op_symbol)->X_op |
402 | == O_register) | |
ee86248c JB |
403 | { |
404 | as_bad (_("invalid use of register")); | |
405 | return 0; | |
406 | } | |
407 | if (!i386_intel_simplify_symbol (e->X_op_symbol) | |
f09c1772 L |
408 | || !i386_intel_check(the_reg, intel_state.base, |
409 | intel_state.index)) | |
ee86248c JB |
410 | return 0; |
411 | if (!intel_state.in_offset) | |
412 | intel_state.seg = e->X_add_symbol; | |
413 | i386_intel_fold (e, e->X_op_symbol); | |
414 | break; | |
415 | ||
ee86248c JB |
416 | case O_multiply: |
417 | if (this_operand >= 0 && intel_state.in_bracket) | |
418 | { | |
419 | expressionS *scale = NULL; | |
c2a5914e | 420 | int has_index = (intel_state.index != NULL); |
ee86248c JB |
421 | |
422 | if (!intel_state.in_scale++) | |
423 | intel_state.scale_factor = 1; | |
424 | ||
425 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
c2a5914e | 426 | if (ret && !has_index && intel_state.index) |
ee86248c JB |
427 | scale = symbol_get_value_expression (e->X_op_symbol); |
428 | ||
429 | if (ret) | |
430 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
c2a5914e | 431 | if (ret && !scale && !has_index && intel_state.index) |
ee86248c JB |
432 | scale = symbol_get_value_expression (e->X_add_symbol); |
433 | ||
c2a5914e | 434 | if (ret && scale) |
ee86248c JB |
435 | { |
436 | resolve_expression (scale); | |
437 | if (scale->X_op != O_constant | |
438 | || intel_state.index->reg_type.bitfield.reg16) | |
439 | scale->X_add_number = 0; | |
440 | intel_state.scale_factor *= scale->X_add_number; | |
441 | } | |
442 | ||
443 | --intel_state.in_scale; | |
444 | if (!ret) | |
445 | return 0; | |
446 | ||
447 | if (!intel_state.in_scale) | |
448 | switch (intel_state.scale_factor) | |
449 | { | |
450 | case 1: | |
451 | i.log2_scale_factor = 0; | |
452 | break; | |
453 | case 2: | |
454 | i.log2_scale_factor = 1; | |
455 | break; | |
456 | case 4: | |
457 | i.log2_scale_factor = 2; | |
458 | break; | |
459 | case 8: | |
460 | i.log2_scale_factor = 3; | |
461 | break; | |
462 | default: | |
463 | /* esp is invalid as index */ | |
8280f326 | 464 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
ee86248c JB |
465 | break; |
466 | } | |
467 | ||
468 | break; | |
469 | } | |
92b4f90c | 470 | goto fallthrough; |
3c7b9c2c L |
471 | |
472 | case O_register: | |
473 | ret = i386_intel_simplify_register (e); | |
474 | if (ret == 2) | |
475 | { | |
476 | gas_assert (e->X_add_number < (unsigned short) -1); | |
477 | e->X_md = (unsigned short) e->X_add_number + 1; | |
478 | e->X_op = O_constant; | |
479 | e->X_add_number = 0; | |
480 | } | |
481 | return ret; | |
482 | ||
483 | case O_constant: | |
484 | if (e->X_md) | |
485 | return i386_intel_simplify_register (e); | |
486 | ||
ee86248c JB |
487 | /* FALLTHROUGH */ |
488 | default: | |
92b4f90c | 489 | fallthrough: |
f09c1772 L |
490 | if (e->X_add_symbol |
491 | && !i386_intel_simplify_symbol (e->X_add_symbol)) | |
ee86248c JB |
492 | return 0; |
493 | if (e->X_op == O_add || e->X_op == O_subtract) | |
494 | { | |
495 | base = intel_state.base; | |
91d6fa6a | 496 | state_index = intel_state.index; |
ee86248c | 497 | } |
91d6fa6a | 498 | if (!i386_intel_check (the_reg, base, state_index) |
f09c1772 L |
499 | || (e->X_op_symbol |
500 | && !i386_intel_simplify_symbol (e->X_op_symbol)) | |
91d6fa6a | 501 | || !i386_intel_check (the_reg, |
f09c1772 L |
502 | (e->X_op != O_add |
503 | ? base : intel_state.base), | |
504 | (e->X_op != O_add | |
505 | ? state_index : intel_state.index))) | |
ee86248c JB |
506 | return 0; |
507 | break; | |
508 | } | |
509 | ||
f09c1772 L |
510 | if (this_operand >= 0 |
511 | && e->X_op == O_symbol | |
512 | && !intel_state.in_offset) | |
ee86248c JB |
513 | { |
514 | segT seg = S_GET_SEGMENT (e->X_add_symbol); | |
515 | ||
516 | if (seg != absolute_section | |
517 | && seg != reg_section | |
518 | && seg != expr_section) | |
519 | intel_state.is_mem |= 2 - !intel_state.in_bracket; | |
520 | } | |
521 | ||
522 | return 1; | |
523 | } | |
524 | ||
525 | int i386_need_index_operator (void) | |
526 | { | |
527 | return intel_syntax < 0; | |
528 | } | |
529 | ||
530 | static int | |
531 | i386_intel_operand (char *operand_string, int got_a_float) | |
532 | { | |
533 | char *saved_input_line_pointer, *buf; | |
534 | segT exp_seg; | |
535 | expressionS exp, *expP; | |
536 | char suffix = 0; | |
537 | int ret; | |
538 | ||
43234a1e L |
539 | /* Handle vector immediates. */ |
540 | if (RC_SAE_immediate (operand_string)) | |
541 | return 1; | |
542 | ||
ee86248c JB |
543 | /* Initialize state structure. */ |
544 | intel_state.op_modifier = O_absent; | |
545 | intel_state.is_mem = 0; | |
25303607 | 546 | intel_state.is_indirect = 0; |
1acf546e | 547 | intel_state.has_offset = 0; |
ee86248c JB |
548 | intel_state.base = NULL; |
549 | intel_state.index = NULL; | |
550 | intel_state.seg = NULL; | |
551 | operand_type_set (&intel_state.reloc_types, ~0); | |
9c2799c2 NC |
552 | gas_assert (!intel_state.in_offset); |
553 | gas_assert (!intel_state.in_bracket); | |
554 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
555 | |
556 | saved_input_line_pointer = input_line_pointer; | |
557 | input_line_pointer = buf = xstrdup (operand_string); | |
558 | ||
559 | intel_syntax = -1; | |
560 | memset (&exp, 0, sizeof(exp)); | |
561 | exp_seg = expression (&exp); | |
562 | ret = i386_intel_simplify (&exp); | |
563 | intel_syntax = 1; | |
564 | ||
565 | SKIP_WHITESPACE (); | |
43234a1e L |
566 | |
567 | /* Handle vector operations. */ | |
568 | if (*input_line_pointer == '{') | |
569 | { | |
570 | char *end = check_VecOperations (input_line_pointer, NULL); | |
571 | if (end) | |
572 | input_line_pointer = end; | |
573 | else | |
574 | ret = 0; | |
575 | } | |
576 | ||
ee86248c JB |
577 | if (!is_end_of_line[(unsigned char) *input_line_pointer]) |
578 | { | |
579 | as_bad (_("junk `%s' after expression"), input_line_pointer); | |
580 | ret = 0; | |
581 | } | |
582 | else if (exp.X_op == O_illegal || exp.X_op == O_absent) | |
583 | { | |
584 | as_bad (_("invalid expression")); | |
585 | ret = 0; | |
586 | } | |
6cee4cda L |
587 | else if (!intel_state.has_offset |
588 | && input_line_pointer > buf | |
589 | && *(input_line_pointer - 1) == ']') | |
25303607 L |
590 | { |
591 | intel_state.is_mem |= 1; | |
592 | intel_state.is_indirect = 1; | |
593 | } | |
ee86248c JB |
594 | |
595 | input_line_pointer = saved_input_line_pointer; | |
596 | free (buf); | |
597 | ||
9c2799c2 NC |
598 | gas_assert (!intel_state.in_offset); |
599 | gas_assert (!intel_state.in_bracket); | |
600 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
601 | |
602 | if (!ret) | |
603 | return 0; | |
604 | ||
605 | if (intel_state.op_modifier != O_absent | |
606 | && current_templates->start->base_opcode != 0x8d /* lea */) | |
607 | { | |
608 | i.types[this_operand].bitfield.unspecified = 0; | |
609 | ||
610 | switch (intel_state.op_modifier) | |
611 | { | |
612 | case O_byte_ptr: | |
613 | i.types[this_operand].bitfield.byte = 1; | |
614 | suffix = BYTE_MNEM_SUFFIX; | |
615 | break; | |
616 | ||
617 | case O_word_ptr: | |
618 | i.types[this_operand].bitfield.word = 1; | |
619 | if ((current_templates->start->name[0] == 'l' | |
620 | && current_templates->start->name[2] == 's' | |
621 | && current_templates->start->name[3] == 0) | |
622 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
623 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
624 | else if (got_a_float == 2) /* "fi..." */ | |
625 | suffix = SHORT_MNEM_SUFFIX; | |
626 | else | |
627 | suffix = WORD_MNEM_SUFFIX; | |
628 | break; | |
629 | ||
630 | case O_dword_ptr: | |
631 | i.types[this_operand].bitfield.dword = 1; | |
632 | if ((current_templates->start->name[0] == 'l' | |
633 | && current_templates->start->name[2] == 's' | |
634 | && current_templates->start->name[3] == 0) | |
635 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
636 | suffix = WORD_MNEM_SUFFIX; | |
637 | else if (flag_code == CODE_16BIT | |
638 | && (current_templates->start->opcode_modifier.jump | |
639 | || current_templates->start->opcode_modifier.jumpdword)) | |
640 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
641 | else if (got_a_float == 1) /* "f..." */ | |
642 | suffix = SHORT_MNEM_SUFFIX; | |
643 | else | |
644 | suffix = LONG_MNEM_SUFFIX; | |
645 | break; | |
646 | ||
647 | case O_fword_ptr: | |
648 | i.types[this_operand].bitfield.fword = 1; | |
649 | if (current_templates->start->name[0] == 'l' | |
650 | && current_templates->start->name[2] == 's' | |
651 | && current_templates->start->name[3] == 0) | |
652 | suffix = LONG_MNEM_SUFFIX; | |
653 | else if (!got_a_float) | |
654 | { | |
655 | if (flag_code == CODE_16BIT) | |
656 | add_prefix (DATA_PREFIX_OPCODE); | |
657 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
658 | } | |
659 | else | |
660 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
661 | break; | |
662 | ||
663 | case O_qword_ptr: | |
664 | i.types[this_operand].bitfield.qword = 1; | |
665 | if (current_templates->start->base_opcode == 0x62 /* bound */ | |
666 | || got_a_float == 1) /* "f..." */ | |
667 | suffix = LONG_MNEM_SUFFIX; | |
668 | else | |
669 | suffix = QWORD_MNEM_SUFFIX; | |
670 | break; | |
671 | ||
672 | case O_tbyte_ptr: | |
673 | i.types[this_operand].bitfield.tbyte = 1; | |
674 | if (got_a_float == 1) | |
675 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
676 | else | |
677 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
678 | break; | |
679 | ||
680 | case O_oword_ptr: | |
681 | case O_xmmword_ptr: | |
682 | i.types[this_operand].bitfield.xmmword = 1; | |
683 | suffix = XMMWORD_MNEM_SUFFIX; | |
684 | break; | |
685 | ||
686 | case O_ymmword_ptr: | |
687 | i.types[this_operand].bitfield.ymmword = 1; | |
688 | suffix = YMMWORD_MNEM_SUFFIX; | |
689 | break; | |
690 | ||
43234a1e L |
691 | case O_zmmword_ptr: |
692 | i.types[this_operand].bitfield.zmmword = 1; | |
693 | suffix = ZMMWORD_MNEM_SUFFIX; | |
694 | break; | |
695 | ||
ee86248c JB |
696 | case O_far_ptr: |
697 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
698 | /* FALLTHROUGH */ | |
699 | case O_near_ptr: | |
700 | if (!current_templates->start->opcode_modifier.jump | |
701 | && !current_templates->start->opcode_modifier.jumpdword) | |
702 | suffix = got_a_float /* so it will cause an error */ | |
703 | ? BYTE_MNEM_SUFFIX | |
704 | : LONG_DOUBLE_MNEM_SUFFIX; | |
705 | break; | |
706 | ||
707 | default: | |
708 | BAD_CASE (intel_state.op_modifier); | |
709 | break; | |
710 | } | |
711 | ||
712 | if (!i.suffix) | |
713 | i.suffix = suffix; | |
714 | else if (i.suffix != suffix) | |
715 | { | |
716 | as_bad (_("conflicting operand size modifiers")); | |
717 | return 0; | |
718 | } | |
719 | } | |
720 | ||
721 | /* Operands for jump/call need special consideration. */ | |
722 | if (current_templates->start->opcode_modifier.jump | |
723 | || current_templates->start->opcode_modifier.jumpdword | |
724 | || current_templates->start->opcode_modifier.jumpintersegment) | |
725 | { | |
f09c1772 L |
726 | if (i.op[this_operand].regs |
727 | || intel_state.base | |
728 | || intel_state.index | |
ee86248c JB |
729 | || intel_state.is_mem > 1) |
730 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
731 | else | |
732 | switch (intel_state.op_modifier) | |
733 | { | |
734 | case O_near_ptr: | |
735 | if (intel_state.seg) | |
736 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
737 | else | |
738 | intel_state.is_mem = 1; | |
739 | break; | |
740 | case O_far_ptr: | |
741 | case O_absent: | |
742 | if (!intel_state.seg) | |
743 | { | |
744 | intel_state.is_mem = 1; | |
745 | if (intel_state.op_modifier == O_absent) | |
25303607 L |
746 | { |
747 | if (intel_state.is_indirect == 1) | |
748 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
749 | break; | |
750 | } | |
ee86248c JB |
751 | as_bad (_("cannot infer the segment part of the operand")); |
752 | return 0; | |
753 | } | |
754 | else if (S_GET_SEGMENT (intel_state.seg) == reg_section) | |
755 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
756 | else | |
757 | { | |
758 | i386_operand_type types; | |
759 | ||
760 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
761 | { | |
762 | as_bad (_("at most %d immediate operands are allowed"), | |
763 | MAX_IMMEDIATE_OPERANDS); | |
764 | return 0; | |
765 | } | |
766 | expP = &im_expressions[i.imm_operands++]; | |
767 | memset (expP, 0, sizeof(*expP)); | |
768 | expP->X_op = O_symbol; | |
769 | expP->X_add_symbol = intel_state.seg; | |
770 | i.op[this_operand].imms = expP; | |
771 | ||
772 | resolve_expression (expP); | |
773 | operand_type_set (&types, ~0); | |
774 | if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg), | |
775 | expP, types, operand_string)) | |
776 | return 0; | |
777 | if (i.operands < MAX_OPERANDS) | |
778 | { | |
779 | this_operand = i.operands++; | |
780 | i.types[this_operand].bitfield.unspecified = 1; | |
781 | } | |
782 | if (suffix == LONG_DOUBLE_MNEM_SUFFIX) | |
783 | i.suffix = 0; | |
784 | intel_state.seg = NULL; | |
785 | intel_state.is_mem = 0; | |
786 | } | |
787 | break; | |
788 | default: | |
789 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
790 | break; | |
791 | } | |
792 | if (i.types[this_operand].bitfield.jumpabsolute) | |
793 | intel_state.is_mem |= 1; | |
794 | } | |
795 | else if (intel_state.seg) | |
796 | intel_state.is_mem |= 1; | |
797 | ||
798 | if (i.op[this_operand].regs) | |
799 | { | |
800 | i386_operand_type temp; | |
801 | ||
802 | /* Register operand. */ | |
803 | if (intel_state.base || intel_state.index || intel_state.seg) | |
804 | { | |
805 | as_bad (_("invalid operand")); | |
806 | return 0; | |
807 | } | |
808 | ||
809 | temp = i.op[this_operand].regs->reg_type; | |
810 | temp.bitfield.baseindex = 0; | |
f09c1772 L |
811 | i.types[this_operand] = operand_type_or (i.types[this_operand], |
812 | temp); | |
ee86248c JB |
813 | i.types[this_operand].bitfield.unspecified = 0; |
814 | ++i.reg_operands; | |
815 | } | |
f09c1772 L |
816 | else if (intel_state.base |
817 | || intel_state.index | |
818 | || intel_state.seg | |
ee86248c JB |
819 | || intel_state.is_mem) |
820 | { | |
821 | /* Memory operand. */ | |
faf786e6 | 822 | if ((int) i.mem_operands |
ee86248c JB |
823 | >= 2 - !current_templates->start->opcode_modifier.isstring) |
824 | { | |
313c53d1 L |
825 | /* Handle |
826 | ||
827 | call 0x9090,0x90909090 | |
828 | lcall 0x9090,0x90909090 | |
829 | jmp 0x9090,0x90909090 | |
830 | ljmp 0x9090,0x90909090 | |
831 | */ | |
832 | ||
833 | if ((current_templates->start->opcode_modifier.jumpintersegment | |
834 | || current_templates->start->opcode_modifier.jumpdword | |
835 | || current_templates->start->opcode_modifier.jump) | |
836 | && this_operand == 1 | |
837 | && intel_state.seg == NULL | |
838 | && i.mem_operands == 1 | |
839 | && i.disp_operands == 1 | |
840 | && intel_state.op_modifier == O_absent) | |
841 | { | |
842 | /* Try to process the first operand as immediate, */ | |
843 | this_operand = 0; | |
844 | if (i386_finalize_immediate (exp_seg, i.op[0].imms, | |
845 | intel_state.reloc_types, | |
846 | NULL)) | |
847 | { | |
848 | this_operand = 1; | |
849 | expP = &im_expressions[0]; | |
850 | i.op[this_operand].imms = expP; | |
851 | *expP = exp; | |
852 | ||
853 | /* Try to process the second operand as immediate, */ | |
854 | if (i386_finalize_immediate (exp_seg, expP, | |
855 | intel_state.reloc_types, | |
856 | NULL)) | |
857 | { | |
858 | i.mem_operands = 0; | |
859 | i.disp_operands = 0; | |
860 | i.imm_operands = 2; | |
861 | i.types[0].bitfield.mem = 0; | |
862 | i.types[0].bitfield.disp16 = 0; | |
863 | i.types[0].bitfield.disp32 = 0; | |
864 | i.types[0].bitfield.disp32s = 0; | |
865 | return 1; | |
866 | } | |
867 | } | |
868 | } | |
869 | ||
ee86248c JB |
870 | as_bad (_("too many memory references for `%s'"), |
871 | current_templates->start->name); | |
872 | return 0; | |
873 | } | |
874 | ||
875 | expP = &disp_expressions[i.disp_operands]; | |
876 | memcpy (expP, &exp, sizeof(exp)); | |
877 | resolve_expression (expP); | |
878 | ||
f09c1772 L |
879 | if (expP->X_op != O_constant |
880 | || expP->X_add_number | |
881 | || (!intel_state.base | |
882 | && !intel_state.index)) | |
ee86248c JB |
883 | { |
884 | i.op[this_operand].disps = expP; | |
885 | i.disp_operands++; | |
886 | ||
887 | if (flag_code == CODE_64BIT) | |
888 | { | |
889 | i.types[this_operand].bitfield.disp32 = 1; | |
890 | if (!i.prefix[ADDR_PREFIX]) | |
891 | { | |
892 | i.types[this_operand].bitfield.disp64 = 1; | |
893 | i.types[this_operand].bitfield.disp32s = 1; | |
894 | } | |
895 | } | |
896 | else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT)) | |
897 | i.types[this_operand].bitfield.disp32 = 1; | |
898 | else | |
899 | i.types[this_operand].bitfield.disp16 = 1; | |
900 | ||
901 | #if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) | |
902 | /* | |
903 | * exp_seg is used only for verification in | |
904 | * i386_finalize_displacement, and we can end up seeing reg_section | |
905 | * here - but we know we removed all registers from the expression | |
906 | * (or error-ed on any remaining ones) in i386_intel_simplify. I | |
907 | * consider the check in i386_finalize_displacement bogus anyway, in | |
908 | * particular because it doesn't allow for expr_section, so I'd | |
909 | * rather see that check (and the similar one in | |
910 | * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out | |
911 | * expert I can't really say whether that would have other bad side | |
912 | * effects. | |
913 | */ | |
914 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour | |
915 | && exp_seg == reg_section) | |
916 | exp_seg = expP->X_op != O_constant ? undefined_section | |
917 | : absolute_section; | |
918 | #endif | |
919 | ||
920 | if (!i386_finalize_displacement (exp_seg, expP, | |
921 | intel_state.reloc_types, | |
922 | operand_string)) | |
923 | return 0; | |
924 | } | |
925 | ||
926 | if (intel_state.base || intel_state.index) | |
927 | i.types[this_operand].bitfield.baseindex = 1; | |
928 | ||
929 | if (intel_state.seg) | |
930 | { | |
931 | for (;;) | |
932 | { | |
933 | expP = symbol_get_value_expression (intel_state.seg); | |
934 | if (expP->X_op != O_full_ptr) | |
935 | break; | |
936 | intel_state.seg = expP->X_add_symbol; | |
937 | } | |
0398aac5 | 938 | if (expP->X_op != O_register) |
ee86248c JB |
939 | { |
940 | as_bad (_("segment register name expected")); | |
941 | return 0; | |
942 | } | |
943 | if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2 | |
944 | && !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3) | |
945 | { | |
946 | as_bad (_("invalid use of register")); | |
947 | return 0; | |
948 | } | |
949 | switch (i386_regtab[expP->X_add_number].reg_num) | |
950 | { | |
951 | case 0: i.seg[i.mem_operands] = &es; break; | |
952 | case 1: i.seg[i.mem_operands] = &cs; break; | |
953 | case 2: i.seg[i.mem_operands] = &ss; break; | |
954 | case 3: i.seg[i.mem_operands] = &ds; break; | |
955 | case 4: i.seg[i.mem_operands] = &fs; break; | |
956 | case 5: i.seg[i.mem_operands] = &gs; break; | |
957 | case RegFlat: i.seg[i.mem_operands] = NULL; break; | |
958 | } | |
959 | } | |
960 | ||
961 | /* Swap base and index in 16-bit memory operands like | |
962 | [si+bx]. Since i386_index_check is also used in AT&T | |
963 | mode we have to do that here. */ | |
964 | if (intel_state.base | |
965 | && intel_state.index | |
966 | && intel_state.base->reg_type.bitfield.reg16 | |
967 | && intel_state.index->reg_type.bitfield.reg16 | |
968 | && intel_state.base->reg_num >= 6 | |
969 | && intel_state.index->reg_num < 6) | |
970 | { | |
971 | i.base_reg = intel_state.index; | |
972 | i.index_reg = intel_state.base; | |
973 | } | |
974 | else | |
975 | { | |
976 | i.base_reg = intel_state.base; | |
977 | i.index_reg = intel_state.index; | |
978 | } | |
979 | ||
980 | if (!i386_index_check (operand_string)) | |
981 | return 0; | |
982 | ||
983 | i.types[this_operand].bitfield.mem = 1; | |
984 | ++i.mem_operands; | |
985 | } | |
986 | else | |
987 | { | |
988 | /* Immediate. */ | |
989 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
990 | { | |
991 | as_bad (_("at most %d immediate operands are allowed"), | |
992 | MAX_IMMEDIATE_OPERANDS); | |
993 | return 0; | |
994 | } | |
995 | ||
996 | expP = &im_expressions[i.imm_operands++]; | |
997 | i.op[this_operand].imms = expP; | |
998 | *expP = exp; | |
999 | ||
1000 | return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types, | |
1001 | operand_string); | |
1002 | } | |
1003 | ||
1004 | return 1; | |
1005 | } |