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ee86248c | 1 | /* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64 |
4b95cf5c | 2 | Copyright (C) 2009-2014 Free Software Foundation, Inc. |
ee86248c JB |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to the Free | |
18 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
19 | 02110-1301, USA. */ | |
20 | ||
21 | static struct | |
22 | { | |
23 | operatorT op_modifier; /* Operand modifier. */ | |
24 | int is_mem; /* 1 if operand is memory reference. */ | |
25303607 | 25 | int is_indirect; /* 1 if operand is indirect reference. */ |
6cee4cda | 26 | int has_offset; /* 1 if operand has offset. */ |
ee86248c JB |
27 | unsigned int in_offset; /* >=1 if processing operand of offset. */ |
28 | unsigned int in_bracket; /* >=1 if processing operand in brackets. */ | |
29 | unsigned int in_scale; /* >=1 if processing multipication operand | |
30 | * in brackets. */ | |
31 | i386_operand_type reloc_types; /* Value obtained from lex_got(). */ | |
32 | const reg_entry *base; /* Base register (if any). */ | |
33 | const reg_entry *index; /* Index register (if any). */ | |
34 | offsetT scale_factor; /* Accumulated scale factor. */ | |
35 | symbolS *seg; | |
36 | } | |
37 | intel_state; | |
38 | ||
39 | /* offset X_add_symbol */ | |
40 | #define O_offset O_md32 | |
7ac3eb25 L |
41 | /* offset X_add_symbol */ |
42 | #define O_short O_md31 | |
43 | /* near ptr X_add_symbol */ | |
44 | #define O_near_ptr O_md30 | |
45 | /* far ptr X_add_symbol */ | |
46 | #define O_far_ptr O_md29 | |
ee86248c | 47 | /* byte ptr X_add_symbol */ |
7ac3eb25 | 48 | #define O_byte_ptr O_md28 |
ee86248c | 49 | /* word ptr X_add_symbol */ |
7ac3eb25 | 50 | #define O_word_ptr O_md27 |
ee86248c | 51 | /* dword ptr X_add_symbol */ |
7ac3eb25 | 52 | #define O_dword_ptr O_md26 |
ee86248c | 53 | /* qword ptr X_add_symbol */ |
7ac3eb25 | 54 | #define O_qword_ptr O_md25 |
ee86248c | 55 | /* oword ptr X_add_symbol */ |
7ac3eb25 | 56 | #define O_oword_ptr O_md24 |
ee86248c | 57 | /* fword ptr X_add_symbol */ |
7ac3eb25 | 58 | #define O_fword_ptr O_md23 |
ee86248c | 59 | /* tbyte ptr X_add_symbol */ |
7ac3eb25 | 60 | #define O_tbyte_ptr O_md22 |
ee86248c | 61 | /* xmmword ptr X_add_symbol */ |
7ac3eb25 | 62 | #define O_xmmword_ptr O_md21 |
ee86248c | 63 | /* ymmword ptr X_add_symbol */ |
7ac3eb25 | 64 | #define O_ymmword_ptr O_md20 |
43234a1e L |
65 | /* zmmword ptr X_add_symbol */ |
66 | #define O_zmmword_ptr O_md19 | |
ee86248c JB |
67 | |
68 | static struct | |
69 | { | |
70 | const char *name; | |
1e9cc1c2 | 71 | operatorT op; |
ee86248c JB |
72 | unsigned int operands; |
73 | } | |
74 | const i386_operators[] = | |
75 | { | |
76 | { "and", O_bit_and, 2 }, | |
77 | { "eq", O_eq, 2 }, | |
78 | { "ge", O_ge, 2 }, | |
79 | { "gt", O_gt, 2 }, | |
80 | { "le", O_le, 2 }, | |
81 | { "lt", O_lt, 2 }, | |
82 | { "mod", O_modulus, 2 }, | |
83 | { "ne", O_ne, 2 }, | |
84 | { "not", O_bit_not, 1 }, | |
85 | { "offset", O_offset, 1 }, | |
86 | { "or", O_bit_inclusive_or, 2 }, | |
87 | { "shl", O_left_shift, 2 }, | |
88 | { "short", O_short, 1 }, | |
89 | { "shr", O_right_shift, 2 }, | |
90 | { "xor", O_bit_exclusive_or, 2 }, | |
91 | { NULL, O_illegal, 0 } | |
92 | }; | |
93 | ||
94 | static struct | |
95 | { | |
96 | const char *name; | |
1e9cc1c2 | 97 | operatorT op; |
ee86248c JB |
98 | unsigned short sz[3]; |
99 | } | |
100 | const i386_types[] = | |
101 | { | |
102 | #define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } } | |
103 | I386_TYPE(byte, 1), | |
104 | I386_TYPE(word, 2), | |
105 | I386_TYPE(dword, 4), | |
106 | I386_TYPE(fword, 6), | |
107 | I386_TYPE(qword, 8), | |
108 | I386_TYPE(tbyte, 10), | |
109 | I386_TYPE(oword, 16), | |
110 | I386_TYPE(xmmword, 16), | |
111 | I386_TYPE(ymmword, 32), | |
43234a1e | 112 | I386_TYPE(zmmword, 64), |
ee86248c JB |
113 | #undef I386_TYPE |
114 | { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } }, | |
115 | { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } }, | |
116 | { NULL, O_illegal, { 0, 0, 0 } } | |
117 | }; | |
118 | ||
119 | operatorT i386_operator (const char *name, unsigned int operands, char *pc) | |
120 | { | |
121 | unsigned int j; | |
122 | ||
123 | if (!intel_syntax) | |
124 | return O_absent; | |
125 | ||
126 | if (!name) | |
127 | { | |
128 | if (operands != 2) | |
129 | return O_illegal; | |
130 | switch (*input_line_pointer) | |
131 | { | |
132 | case ':': | |
133 | ++input_line_pointer; | |
134 | return O_full_ptr; | |
135 | case '[': | |
136 | ++input_line_pointer; | |
137 | return O_index; | |
138 | case '@': | |
139 | if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC) | |
140 | { | |
141 | int adjust = 0; | |
142 | char *gotfree_input_line = lex_got (&i.reloc[this_operand], | |
143 | &adjust, | |
c3320543 L |
144 | &intel_state.reloc_types, |
145 | (i.bnd_prefix != NULL | |
146 | || add_bnd_prefix)); | |
ee86248c JB |
147 | |
148 | if (!gotfree_input_line) | |
149 | break; | |
150 | free (gotfree_input_line); | |
151 | *input_line_pointer++ = '+'; | |
152 | memset (input_line_pointer, '0', adjust - 1); | |
153 | input_line_pointer[adjust - 1] = ' '; | |
154 | return O_add; | |
155 | } | |
156 | break; | |
157 | } | |
158 | return O_illegal; | |
159 | } | |
160 | ||
161 | for (j = 0; i386_operators[j].name; ++j) | |
91d6fa6a | 162 | if (strcasecmp (i386_operators[j].name, name) == 0) |
ee86248c JB |
163 | { |
164 | if (i386_operators[j].operands | |
165 | && i386_operators[j].operands != operands) | |
166 | return O_illegal; | |
1e9cc1c2 | 167 | return i386_operators[j].op; |
ee86248c JB |
168 | } |
169 | ||
170 | for (j = 0; i386_types[j].name; ++j) | |
91d6fa6a | 171 | if (strcasecmp (i386_types[j].name, name) == 0) |
ee86248c JB |
172 | break; |
173 | if (i386_types[j].name && *pc == ' ') | |
174 | { | |
91d6fa6a | 175 | char *pname = ++input_line_pointer; |
ee86248c JB |
176 | char c = get_symbol_end (); |
177 | ||
91d6fa6a | 178 | if (strcasecmp (pname, "ptr") == 0) |
ee86248c | 179 | { |
91d6fa6a | 180 | pname[-1] = *pc; |
ee86248c JB |
181 | *pc = c; |
182 | if (intel_syntax > 0 || operands != 1) | |
183 | return O_illegal; | |
1e9cc1c2 | 184 | return i386_types[j].op; |
ee86248c JB |
185 | } |
186 | ||
187 | *input_line_pointer = c; | |
91d6fa6a | 188 | input_line_pointer = pname - 1; |
ee86248c JB |
189 | } |
190 | ||
191 | return O_absent; | |
192 | } | |
193 | ||
194 | static int i386_intel_parse_name (const char *name, expressionS *e) | |
195 | { | |
91d6fa6a | 196 | unsigned int j; |
ee86248c | 197 | |
b7adb16d JB |
198 | if (! strcmp (name, "$")) |
199 | { | |
200 | current_location (e); | |
201 | return 1; | |
202 | } | |
203 | ||
91d6fa6a NC |
204 | for (j = 0; i386_types[j].name; ++j) |
205 | if (strcasecmp(i386_types[j].name, name) == 0) | |
ee86248c JB |
206 | { |
207 | e->X_op = O_constant; | |
91d6fa6a | 208 | e->X_add_number = i386_types[j].sz[flag_code]; |
ee86248c JB |
209 | e->X_add_symbol = NULL; |
210 | e->X_op_symbol = NULL; | |
211 | return 1; | |
212 | } | |
213 | ||
214 | return 0; | |
215 | } | |
216 | ||
91d6fa6a | 217 | static INLINE int i386_intel_check (const reg_entry *rreg, |
ee86248c | 218 | const reg_entry *base, |
91d6fa6a | 219 | const reg_entry *iindex) |
ee86248c | 220 | { |
f09c1772 L |
221 | if ((this_operand >= 0 |
222 | && rreg != i.op[this_operand].regs) | |
223 | || base != intel_state.base | |
224 | || iindex != intel_state.index) | |
ee86248c JB |
225 | { |
226 | as_bad (_("invalid use of register")); | |
227 | return 0; | |
228 | } | |
229 | return 1; | |
230 | } | |
231 | ||
232 | static INLINE void i386_intel_fold (expressionS *e, symbolS *sym) | |
233 | { | |
27dee630 | 234 | expressionS *exp = symbol_get_value_expression (sym); |
ee86248c JB |
235 | if (S_GET_SEGMENT (sym) == absolute_section) |
236 | { | |
237 | offsetT val = e->X_add_number; | |
238 | ||
27dee630 | 239 | *e = *exp; |
ee86248c JB |
240 | e->X_add_number += val; |
241 | } | |
242 | else | |
243 | { | |
27dee630 L |
244 | if (exp->X_op == O_symbol |
245 | && strcmp (S_GET_NAME (exp->X_add_symbol), | |
246 | GLOBAL_OFFSET_TABLE_NAME) == 0) | |
247 | sym = exp->X_add_symbol; | |
ee86248c JB |
248 | e->X_add_symbol = sym; |
249 | e->X_op_symbol = NULL; | |
250 | e->X_op = O_symbol; | |
251 | } | |
252 | } | |
253 | ||
3c7b9c2c L |
254 | static int |
255 | i386_intel_simplify_register (expressionS *e) | |
256 | { | |
257 | int reg_num; | |
258 | ||
259 | if (this_operand < 0 || intel_state.in_offset) | |
260 | { | |
261 | as_bad (_("invalid use of register")); | |
262 | return 0; | |
263 | } | |
264 | ||
265 | if (e->X_op == O_register) | |
266 | reg_num = e->X_add_number; | |
267 | else | |
268 | reg_num = e->X_md - 1; | |
269 | ||
270 | if (!intel_state.in_bracket) | |
271 | { | |
272 | if (i.op[this_operand].regs) | |
273 | { | |
274 | as_bad (_("invalid use of register")); | |
275 | return 0; | |
276 | } | |
277 | if (i386_regtab[reg_num].reg_type.bitfield.sreg3 | |
278 | && i386_regtab[reg_num].reg_num == RegFlat) | |
279 | { | |
280 | as_bad (_("invalid use of pseudo-register")); | |
281 | return 0; | |
282 | } | |
283 | i.op[this_operand].regs = i386_regtab + reg_num; | |
284 | } | |
9e2934f7 JB |
285 | else if (!intel_state.index |
286 | && (i386_regtab[reg_num].reg_type.bitfield.regxmm | |
43234a1e L |
287 | || i386_regtab[reg_num].reg_type.bitfield.regymm |
288 | || i386_regtab[reg_num].reg_type.bitfield.regzmm)) | |
9e2934f7 | 289 | intel_state.index = i386_regtab + reg_num; |
3c7b9c2c L |
290 | else if (!intel_state.base && !intel_state.in_scale) |
291 | intel_state.base = i386_regtab + reg_num; | |
292 | else if (!intel_state.index) | |
9e2934f7 JB |
293 | { |
294 | if (intel_state.in_scale | |
47cd3fa7 JB |
295 | || current_templates->start->base_opcode == 0xf30f1b /* bndmk */ |
296 | || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */ | |
9e2934f7 JB |
297 | || i386_regtab[reg_num].reg_type.bitfield.baseindex) |
298 | intel_state.index = i386_regtab + reg_num; | |
299 | else | |
300 | { | |
301 | /* Convert base to index and make ESP/RSP the base. */ | |
302 | intel_state.index = intel_state.base; | |
303 | intel_state.base = i386_regtab + reg_num; | |
304 | } | |
305 | } | |
3c7b9c2c L |
306 | else |
307 | { | |
308 | /* esp is invalid as index */ | |
8280f326 | 309 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
3c7b9c2c L |
310 | } |
311 | return 2; | |
312 | } | |
313 | ||
ee86248c JB |
314 | static int i386_intel_simplify (expressionS *); |
315 | ||
316 | static INLINE int i386_intel_simplify_symbol(symbolS *sym) | |
317 | { | |
318 | int ret = i386_intel_simplify (symbol_get_value_expression (sym)); | |
319 | ||
320 | if (ret == 2) | |
321 | { | |
322 | S_SET_SEGMENT(sym, absolute_section); | |
323 | ret = 1; | |
324 | } | |
325 | return ret; | |
326 | } | |
327 | ||
328 | static int i386_intel_simplify (expressionS *e) | |
329 | { | |
f09c1772 L |
330 | const reg_entry *the_reg = (this_operand >= 0 |
331 | ? i.op[this_operand].regs : NULL); | |
ee86248c | 332 | const reg_entry *base = intel_state.base; |
91d6fa6a | 333 | const reg_entry *state_index = intel_state.index; |
ee86248c JB |
334 | int ret; |
335 | ||
336 | if (!intel_syntax) | |
337 | return 1; | |
338 | ||
339 | switch (e->X_op) | |
340 | { | |
341 | case O_index: | |
342 | if (e->X_add_symbol) | |
343 | { | |
344 | if (!i386_intel_simplify_symbol (e->X_add_symbol) | |
f09c1772 L |
345 | || !i386_intel_check(the_reg, intel_state.base, |
346 | intel_state.index)) | |
5bb3703f | 347 | return 0; |
ee86248c JB |
348 | } |
349 | if (!intel_state.in_offset) | |
350 | ++intel_state.in_bracket; | |
351 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
352 | if (!intel_state.in_offset) | |
353 | --intel_state.in_bracket; | |
354 | if (!ret) | |
355 | return 0; | |
356 | if (e->X_add_symbol) | |
357 | e->X_op = O_add; | |
358 | else | |
359 | i386_intel_fold (e, e->X_op_symbol); | |
360 | break; | |
361 | ||
362 | case O_offset: | |
6cee4cda | 363 | intel_state.has_offset = 1; |
ee86248c JB |
364 | ++intel_state.in_offset; |
365 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
366 | --intel_state.in_offset; | |
91d6fa6a | 367 | if (!ret || !i386_intel_check(the_reg, base, state_index)) |
ee86248c JB |
368 | return 0; |
369 | i386_intel_fold (e, e->X_add_symbol); | |
370 | return ret; | |
371 | ||
372 | case O_byte_ptr: | |
373 | case O_word_ptr: | |
374 | case O_dword_ptr: | |
375 | case O_fword_ptr: | |
376 | case O_qword_ptr: | |
377 | case O_tbyte_ptr: | |
378 | case O_oword_ptr: | |
379 | case O_xmmword_ptr: | |
380 | case O_ymmword_ptr: | |
43234a1e | 381 | case O_zmmword_ptr: |
ee86248c JB |
382 | case O_near_ptr: |
383 | case O_far_ptr: | |
384 | if (intel_state.op_modifier == O_absent) | |
385 | intel_state.op_modifier = e->X_op; | |
386 | /* FALLTHROUGH */ | |
387 | case O_short: | |
f09c1772 L |
388 | if (symbol_get_value_expression (e->X_add_symbol)->X_op |
389 | == O_register) | |
ee86248c JB |
390 | { |
391 | as_bad (_("invalid use of register")); | |
392 | return 0; | |
393 | } | |
394 | if (!i386_intel_simplify_symbol (e->X_add_symbol)) | |
395 | return 0; | |
396 | i386_intel_fold (e, e->X_add_symbol); | |
397 | break; | |
398 | ||
399 | case O_full_ptr: | |
f09c1772 L |
400 | if (symbol_get_value_expression (e->X_op_symbol)->X_op |
401 | == O_register) | |
ee86248c JB |
402 | { |
403 | as_bad (_("invalid use of register")); | |
404 | return 0; | |
405 | } | |
406 | if (!i386_intel_simplify_symbol (e->X_op_symbol) | |
f09c1772 L |
407 | || !i386_intel_check(the_reg, intel_state.base, |
408 | intel_state.index)) | |
ee86248c JB |
409 | return 0; |
410 | if (!intel_state.in_offset) | |
411 | intel_state.seg = e->X_add_symbol; | |
412 | i386_intel_fold (e, e->X_op_symbol); | |
413 | break; | |
414 | ||
ee86248c JB |
415 | case O_multiply: |
416 | if (this_operand >= 0 && intel_state.in_bracket) | |
417 | { | |
418 | expressionS *scale = NULL; | |
c2a5914e | 419 | int has_index = (intel_state.index != NULL); |
ee86248c JB |
420 | |
421 | if (!intel_state.in_scale++) | |
422 | intel_state.scale_factor = 1; | |
423 | ||
424 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
c2a5914e | 425 | if (ret && !has_index && intel_state.index) |
ee86248c JB |
426 | scale = symbol_get_value_expression (e->X_op_symbol); |
427 | ||
428 | if (ret) | |
429 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
c2a5914e | 430 | if (ret && !scale && !has_index && intel_state.index) |
ee86248c JB |
431 | scale = symbol_get_value_expression (e->X_add_symbol); |
432 | ||
c2a5914e | 433 | if (ret && scale) |
ee86248c JB |
434 | { |
435 | resolve_expression (scale); | |
436 | if (scale->X_op != O_constant | |
437 | || intel_state.index->reg_type.bitfield.reg16) | |
438 | scale->X_add_number = 0; | |
439 | intel_state.scale_factor *= scale->X_add_number; | |
440 | } | |
441 | ||
442 | --intel_state.in_scale; | |
443 | if (!ret) | |
444 | return 0; | |
445 | ||
446 | if (!intel_state.in_scale) | |
447 | switch (intel_state.scale_factor) | |
448 | { | |
449 | case 1: | |
450 | i.log2_scale_factor = 0; | |
451 | break; | |
452 | case 2: | |
453 | i.log2_scale_factor = 1; | |
454 | break; | |
455 | case 4: | |
456 | i.log2_scale_factor = 2; | |
457 | break; | |
458 | case 8: | |
459 | i.log2_scale_factor = 3; | |
460 | break; | |
461 | default: | |
462 | /* esp is invalid as index */ | |
8280f326 | 463 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
ee86248c JB |
464 | break; |
465 | } | |
466 | ||
467 | break; | |
468 | } | |
92b4f90c | 469 | goto fallthrough; |
3c7b9c2c L |
470 | |
471 | case O_register: | |
472 | ret = i386_intel_simplify_register (e); | |
473 | if (ret == 2) | |
474 | { | |
475 | gas_assert (e->X_add_number < (unsigned short) -1); | |
476 | e->X_md = (unsigned short) e->X_add_number + 1; | |
477 | e->X_op = O_constant; | |
478 | e->X_add_number = 0; | |
479 | } | |
480 | return ret; | |
481 | ||
482 | case O_constant: | |
483 | if (e->X_md) | |
484 | return i386_intel_simplify_register (e); | |
485 | ||
ee86248c JB |
486 | /* FALLTHROUGH */ |
487 | default: | |
92b4f90c | 488 | fallthrough: |
f09c1772 L |
489 | if (e->X_add_symbol |
490 | && !i386_intel_simplify_symbol (e->X_add_symbol)) | |
ee86248c JB |
491 | return 0; |
492 | if (e->X_op == O_add || e->X_op == O_subtract) | |
493 | { | |
494 | base = intel_state.base; | |
91d6fa6a | 495 | state_index = intel_state.index; |
ee86248c | 496 | } |
91d6fa6a | 497 | if (!i386_intel_check (the_reg, base, state_index) |
f09c1772 L |
498 | || (e->X_op_symbol |
499 | && !i386_intel_simplify_symbol (e->X_op_symbol)) | |
91d6fa6a | 500 | || !i386_intel_check (the_reg, |
f09c1772 L |
501 | (e->X_op != O_add |
502 | ? base : intel_state.base), | |
503 | (e->X_op != O_add | |
504 | ? state_index : intel_state.index))) | |
ee86248c JB |
505 | return 0; |
506 | break; | |
507 | } | |
508 | ||
f09c1772 L |
509 | if (this_operand >= 0 |
510 | && e->X_op == O_symbol | |
511 | && !intel_state.in_offset) | |
ee86248c JB |
512 | { |
513 | segT seg = S_GET_SEGMENT (e->X_add_symbol); | |
514 | ||
515 | if (seg != absolute_section | |
516 | && seg != reg_section | |
517 | && seg != expr_section) | |
518 | intel_state.is_mem |= 2 - !intel_state.in_bracket; | |
519 | } | |
520 | ||
521 | return 1; | |
522 | } | |
523 | ||
524 | int i386_need_index_operator (void) | |
525 | { | |
526 | return intel_syntax < 0; | |
527 | } | |
528 | ||
529 | static int | |
530 | i386_intel_operand (char *operand_string, int got_a_float) | |
531 | { | |
532 | char *saved_input_line_pointer, *buf; | |
533 | segT exp_seg; | |
534 | expressionS exp, *expP; | |
535 | char suffix = 0; | |
536 | int ret; | |
537 | ||
43234a1e L |
538 | /* Handle vector immediates. */ |
539 | if (RC_SAE_immediate (operand_string)) | |
540 | return 1; | |
541 | ||
ee86248c JB |
542 | /* Initialize state structure. */ |
543 | intel_state.op_modifier = O_absent; | |
544 | intel_state.is_mem = 0; | |
25303607 | 545 | intel_state.is_indirect = 0; |
1acf546e | 546 | intel_state.has_offset = 0; |
ee86248c JB |
547 | intel_state.base = NULL; |
548 | intel_state.index = NULL; | |
549 | intel_state.seg = NULL; | |
550 | operand_type_set (&intel_state.reloc_types, ~0); | |
9c2799c2 NC |
551 | gas_assert (!intel_state.in_offset); |
552 | gas_assert (!intel_state.in_bracket); | |
553 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
554 | |
555 | saved_input_line_pointer = input_line_pointer; | |
556 | input_line_pointer = buf = xstrdup (operand_string); | |
557 | ||
558 | intel_syntax = -1; | |
559 | memset (&exp, 0, sizeof(exp)); | |
560 | exp_seg = expression (&exp); | |
561 | ret = i386_intel_simplify (&exp); | |
562 | intel_syntax = 1; | |
563 | ||
564 | SKIP_WHITESPACE (); | |
43234a1e L |
565 | |
566 | /* Handle vector operations. */ | |
567 | if (*input_line_pointer == '{') | |
568 | { | |
569 | char *end = check_VecOperations (input_line_pointer, NULL); | |
570 | if (end) | |
571 | input_line_pointer = end; | |
572 | else | |
573 | ret = 0; | |
574 | } | |
575 | ||
ee86248c JB |
576 | if (!is_end_of_line[(unsigned char) *input_line_pointer]) |
577 | { | |
578 | as_bad (_("junk `%s' after expression"), input_line_pointer); | |
579 | ret = 0; | |
580 | } | |
581 | else if (exp.X_op == O_illegal || exp.X_op == O_absent) | |
582 | { | |
583 | as_bad (_("invalid expression")); | |
584 | ret = 0; | |
585 | } | |
6cee4cda L |
586 | else if (!intel_state.has_offset |
587 | && input_line_pointer > buf | |
588 | && *(input_line_pointer - 1) == ']') | |
25303607 L |
589 | { |
590 | intel_state.is_mem |= 1; | |
591 | intel_state.is_indirect = 1; | |
592 | } | |
ee86248c JB |
593 | |
594 | input_line_pointer = saved_input_line_pointer; | |
595 | free (buf); | |
596 | ||
9c2799c2 NC |
597 | gas_assert (!intel_state.in_offset); |
598 | gas_assert (!intel_state.in_bracket); | |
599 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
600 | |
601 | if (!ret) | |
602 | return 0; | |
603 | ||
604 | if (intel_state.op_modifier != O_absent | |
605 | && current_templates->start->base_opcode != 0x8d /* lea */) | |
606 | { | |
607 | i.types[this_operand].bitfield.unspecified = 0; | |
608 | ||
609 | switch (intel_state.op_modifier) | |
610 | { | |
611 | case O_byte_ptr: | |
612 | i.types[this_operand].bitfield.byte = 1; | |
613 | suffix = BYTE_MNEM_SUFFIX; | |
614 | break; | |
615 | ||
616 | case O_word_ptr: | |
617 | i.types[this_operand].bitfield.word = 1; | |
618 | if ((current_templates->start->name[0] == 'l' | |
619 | && current_templates->start->name[2] == 's' | |
620 | && current_templates->start->name[3] == 0) | |
621 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
622 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
623 | else if (got_a_float == 2) /* "fi..." */ | |
624 | suffix = SHORT_MNEM_SUFFIX; | |
625 | else | |
626 | suffix = WORD_MNEM_SUFFIX; | |
627 | break; | |
628 | ||
629 | case O_dword_ptr: | |
630 | i.types[this_operand].bitfield.dword = 1; | |
631 | if ((current_templates->start->name[0] == 'l' | |
632 | && current_templates->start->name[2] == 's' | |
633 | && current_templates->start->name[3] == 0) | |
634 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
635 | suffix = WORD_MNEM_SUFFIX; | |
636 | else if (flag_code == CODE_16BIT | |
637 | && (current_templates->start->opcode_modifier.jump | |
638 | || current_templates->start->opcode_modifier.jumpdword)) | |
639 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
640 | else if (got_a_float == 1) /* "f..." */ | |
641 | suffix = SHORT_MNEM_SUFFIX; | |
642 | else | |
643 | suffix = LONG_MNEM_SUFFIX; | |
644 | break; | |
645 | ||
646 | case O_fword_ptr: | |
647 | i.types[this_operand].bitfield.fword = 1; | |
648 | if (current_templates->start->name[0] == 'l' | |
649 | && current_templates->start->name[2] == 's' | |
650 | && current_templates->start->name[3] == 0) | |
651 | suffix = LONG_MNEM_SUFFIX; | |
652 | else if (!got_a_float) | |
653 | { | |
654 | if (flag_code == CODE_16BIT) | |
655 | add_prefix (DATA_PREFIX_OPCODE); | |
656 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
657 | } | |
658 | else | |
659 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
660 | break; | |
661 | ||
662 | case O_qword_ptr: | |
663 | i.types[this_operand].bitfield.qword = 1; | |
664 | if (current_templates->start->base_opcode == 0x62 /* bound */ | |
665 | || got_a_float == 1) /* "f..." */ | |
666 | suffix = LONG_MNEM_SUFFIX; | |
667 | else | |
668 | suffix = QWORD_MNEM_SUFFIX; | |
669 | break; | |
670 | ||
671 | case O_tbyte_ptr: | |
672 | i.types[this_operand].bitfield.tbyte = 1; | |
673 | if (got_a_float == 1) | |
674 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
675 | else | |
676 | suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */ | |
677 | break; | |
678 | ||
679 | case O_oword_ptr: | |
680 | case O_xmmword_ptr: | |
681 | i.types[this_operand].bitfield.xmmword = 1; | |
682 | suffix = XMMWORD_MNEM_SUFFIX; | |
683 | break; | |
684 | ||
685 | case O_ymmword_ptr: | |
686 | i.types[this_operand].bitfield.ymmword = 1; | |
687 | suffix = YMMWORD_MNEM_SUFFIX; | |
688 | break; | |
689 | ||
43234a1e L |
690 | case O_zmmword_ptr: |
691 | i.types[this_operand].bitfield.zmmword = 1; | |
692 | suffix = ZMMWORD_MNEM_SUFFIX; | |
693 | break; | |
694 | ||
ee86248c JB |
695 | case O_far_ptr: |
696 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
697 | /* FALLTHROUGH */ | |
698 | case O_near_ptr: | |
699 | if (!current_templates->start->opcode_modifier.jump | |
700 | && !current_templates->start->opcode_modifier.jumpdword) | |
701 | suffix = got_a_float /* so it will cause an error */ | |
702 | ? BYTE_MNEM_SUFFIX | |
703 | : LONG_DOUBLE_MNEM_SUFFIX; | |
704 | break; | |
705 | ||
706 | default: | |
707 | BAD_CASE (intel_state.op_modifier); | |
708 | break; | |
709 | } | |
710 | ||
711 | if (!i.suffix) | |
712 | i.suffix = suffix; | |
713 | else if (i.suffix != suffix) | |
714 | { | |
715 | as_bad (_("conflicting operand size modifiers")); | |
716 | return 0; | |
717 | } | |
718 | } | |
719 | ||
720 | /* Operands for jump/call need special consideration. */ | |
721 | if (current_templates->start->opcode_modifier.jump | |
722 | || current_templates->start->opcode_modifier.jumpdword | |
723 | || current_templates->start->opcode_modifier.jumpintersegment) | |
724 | { | |
f09c1772 L |
725 | if (i.op[this_operand].regs |
726 | || intel_state.base | |
727 | || intel_state.index | |
ee86248c JB |
728 | || intel_state.is_mem > 1) |
729 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
730 | else | |
731 | switch (intel_state.op_modifier) | |
732 | { | |
733 | case O_near_ptr: | |
734 | if (intel_state.seg) | |
735 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
736 | else | |
737 | intel_state.is_mem = 1; | |
738 | break; | |
739 | case O_far_ptr: | |
740 | case O_absent: | |
741 | if (!intel_state.seg) | |
742 | { | |
743 | intel_state.is_mem = 1; | |
744 | if (intel_state.op_modifier == O_absent) | |
25303607 L |
745 | { |
746 | if (intel_state.is_indirect == 1) | |
747 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
748 | break; | |
749 | } | |
ee86248c JB |
750 | as_bad (_("cannot infer the segment part of the operand")); |
751 | return 0; | |
752 | } | |
753 | else if (S_GET_SEGMENT (intel_state.seg) == reg_section) | |
754 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
755 | else | |
756 | { | |
757 | i386_operand_type types; | |
758 | ||
759 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
760 | { | |
761 | as_bad (_("at most %d immediate operands are allowed"), | |
762 | MAX_IMMEDIATE_OPERANDS); | |
763 | return 0; | |
764 | } | |
765 | expP = &im_expressions[i.imm_operands++]; | |
766 | memset (expP, 0, sizeof(*expP)); | |
767 | expP->X_op = O_symbol; | |
768 | expP->X_add_symbol = intel_state.seg; | |
769 | i.op[this_operand].imms = expP; | |
770 | ||
771 | resolve_expression (expP); | |
772 | operand_type_set (&types, ~0); | |
773 | if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg), | |
774 | expP, types, operand_string)) | |
775 | return 0; | |
776 | if (i.operands < MAX_OPERANDS) | |
777 | { | |
778 | this_operand = i.operands++; | |
779 | i.types[this_operand].bitfield.unspecified = 1; | |
780 | } | |
781 | if (suffix == LONG_DOUBLE_MNEM_SUFFIX) | |
782 | i.suffix = 0; | |
783 | intel_state.seg = NULL; | |
784 | intel_state.is_mem = 0; | |
785 | } | |
786 | break; | |
787 | default: | |
788 | i.types[this_operand].bitfield.jumpabsolute = 1; | |
789 | break; | |
790 | } | |
791 | if (i.types[this_operand].bitfield.jumpabsolute) | |
792 | intel_state.is_mem |= 1; | |
793 | } | |
794 | else if (intel_state.seg) | |
795 | intel_state.is_mem |= 1; | |
796 | ||
797 | if (i.op[this_operand].regs) | |
798 | { | |
799 | i386_operand_type temp; | |
800 | ||
801 | /* Register operand. */ | |
802 | if (intel_state.base || intel_state.index || intel_state.seg) | |
803 | { | |
804 | as_bad (_("invalid operand")); | |
805 | return 0; | |
806 | } | |
807 | ||
808 | temp = i.op[this_operand].regs->reg_type; | |
809 | temp.bitfield.baseindex = 0; | |
f09c1772 L |
810 | i.types[this_operand] = operand_type_or (i.types[this_operand], |
811 | temp); | |
ee86248c JB |
812 | i.types[this_operand].bitfield.unspecified = 0; |
813 | ++i.reg_operands; | |
814 | } | |
f09c1772 L |
815 | else if (intel_state.base |
816 | || intel_state.index | |
817 | || intel_state.seg | |
ee86248c JB |
818 | || intel_state.is_mem) |
819 | { | |
820 | /* Memory operand. */ | |
faf786e6 | 821 | if ((int) i.mem_operands |
ee86248c JB |
822 | >= 2 - !current_templates->start->opcode_modifier.isstring) |
823 | { | |
313c53d1 L |
824 | /* Handle |
825 | ||
826 | call 0x9090,0x90909090 | |
827 | lcall 0x9090,0x90909090 | |
828 | jmp 0x9090,0x90909090 | |
829 | ljmp 0x9090,0x90909090 | |
830 | */ | |
831 | ||
832 | if ((current_templates->start->opcode_modifier.jumpintersegment | |
833 | || current_templates->start->opcode_modifier.jumpdword | |
834 | || current_templates->start->opcode_modifier.jump) | |
835 | && this_operand == 1 | |
836 | && intel_state.seg == NULL | |
837 | && i.mem_operands == 1 | |
838 | && i.disp_operands == 1 | |
839 | && intel_state.op_modifier == O_absent) | |
840 | { | |
841 | /* Try to process the first operand as immediate, */ | |
842 | this_operand = 0; | |
843 | if (i386_finalize_immediate (exp_seg, i.op[0].imms, | |
844 | intel_state.reloc_types, | |
845 | NULL)) | |
846 | { | |
847 | this_operand = 1; | |
848 | expP = &im_expressions[0]; | |
849 | i.op[this_operand].imms = expP; | |
850 | *expP = exp; | |
851 | ||
852 | /* Try to process the second operand as immediate, */ | |
853 | if (i386_finalize_immediate (exp_seg, expP, | |
854 | intel_state.reloc_types, | |
855 | NULL)) | |
856 | { | |
857 | i.mem_operands = 0; | |
858 | i.disp_operands = 0; | |
859 | i.imm_operands = 2; | |
860 | i.types[0].bitfield.mem = 0; | |
861 | i.types[0].bitfield.disp16 = 0; | |
862 | i.types[0].bitfield.disp32 = 0; | |
863 | i.types[0].bitfield.disp32s = 0; | |
864 | return 1; | |
865 | } | |
866 | } | |
867 | } | |
868 | ||
ee86248c JB |
869 | as_bad (_("too many memory references for `%s'"), |
870 | current_templates->start->name); | |
871 | return 0; | |
872 | } | |
873 | ||
874 | expP = &disp_expressions[i.disp_operands]; | |
875 | memcpy (expP, &exp, sizeof(exp)); | |
876 | resolve_expression (expP); | |
877 | ||
f09c1772 L |
878 | if (expP->X_op != O_constant |
879 | || expP->X_add_number | |
880 | || (!intel_state.base | |
881 | && !intel_state.index)) | |
ee86248c JB |
882 | { |
883 | i.op[this_operand].disps = expP; | |
884 | i.disp_operands++; | |
885 | ||
886 | if (flag_code == CODE_64BIT) | |
887 | { | |
888 | i.types[this_operand].bitfield.disp32 = 1; | |
889 | if (!i.prefix[ADDR_PREFIX]) | |
890 | { | |
891 | i.types[this_operand].bitfield.disp64 = 1; | |
892 | i.types[this_operand].bitfield.disp32s = 1; | |
893 | } | |
894 | } | |
895 | else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT)) | |
896 | i.types[this_operand].bitfield.disp32 = 1; | |
897 | else | |
898 | i.types[this_operand].bitfield.disp16 = 1; | |
899 | ||
900 | #if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) | |
901 | /* | |
902 | * exp_seg is used only for verification in | |
903 | * i386_finalize_displacement, and we can end up seeing reg_section | |
904 | * here - but we know we removed all registers from the expression | |
905 | * (or error-ed on any remaining ones) in i386_intel_simplify. I | |
906 | * consider the check in i386_finalize_displacement bogus anyway, in | |
907 | * particular because it doesn't allow for expr_section, so I'd | |
908 | * rather see that check (and the similar one in | |
909 | * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out | |
910 | * expert I can't really say whether that would have other bad side | |
911 | * effects. | |
912 | */ | |
913 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour | |
914 | && exp_seg == reg_section) | |
915 | exp_seg = expP->X_op != O_constant ? undefined_section | |
916 | : absolute_section; | |
917 | #endif | |
918 | ||
919 | if (!i386_finalize_displacement (exp_seg, expP, | |
920 | intel_state.reloc_types, | |
921 | operand_string)) | |
922 | return 0; | |
923 | } | |
924 | ||
925 | if (intel_state.base || intel_state.index) | |
926 | i.types[this_operand].bitfield.baseindex = 1; | |
927 | ||
928 | if (intel_state.seg) | |
929 | { | |
930 | for (;;) | |
931 | { | |
932 | expP = symbol_get_value_expression (intel_state.seg); | |
933 | if (expP->X_op != O_full_ptr) | |
934 | break; | |
935 | intel_state.seg = expP->X_add_symbol; | |
936 | } | |
0398aac5 | 937 | if (expP->X_op != O_register) |
ee86248c JB |
938 | { |
939 | as_bad (_("segment register name expected")); | |
940 | return 0; | |
941 | } | |
942 | if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2 | |
943 | && !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3) | |
944 | { | |
945 | as_bad (_("invalid use of register")); | |
946 | return 0; | |
947 | } | |
948 | switch (i386_regtab[expP->X_add_number].reg_num) | |
949 | { | |
950 | case 0: i.seg[i.mem_operands] = &es; break; | |
951 | case 1: i.seg[i.mem_operands] = &cs; break; | |
952 | case 2: i.seg[i.mem_operands] = &ss; break; | |
953 | case 3: i.seg[i.mem_operands] = &ds; break; | |
954 | case 4: i.seg[i.mem_operands] = &fs; break; | |
955 | case 5: i.seg[i.mem_operands] = &gs; break; | |
956 | case RegFlat: i.seg[i.mem_operands] = NULL; break; | |
957 | } | |
958 | } | |
959 | ||
960 | /* Swap base and index in 16-bit memory operands like | |
961 | [si+bx]. Since i386_index_check is also used in AT&T | |
962 | mode we have to do that here. */ | |
963 | if (intel_state.base | |
964 | && intel_state.index | |
965 | && intel_state.base->reg_type.bitfield.reg16 | |
966 | && intel_state.index->reg_type.bitfield.reg16 | |
967 | && intel_state.base->reg_num >= 6 | |
968 | && intel_state.index->reg_num < 6) | |
969 | { | |
970 | i.base_reg = intel_state.index; | |
971 | i.index_reg = intel_state.base; | |
972 | } | |
973 | else | |
974 | { | |
975 | i.base_reg = intel_state.base; | |
976 | i.index_reg = intel_state.index; | |
977 | } | |
978 | ||
979 | if (!i386_index_check (operand_string)) | |
980 | return 0; | |
981 | ||
982 | i.types[this_operand].bitfield.mem = 1; | |
983 | ++i.mem_operands; | |
984 | } | |
985 | else | |
986 | { | |
987 | /* Immediate. */ | |
988 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
989 | { | |
990 | as_bad (_("at most %d immediate operands are allowed"), | |
991 | MAX_IMMEDIATE_OPERANDS); | |
992 | return 0; | |
993 | } | |
994 | ||
995 | expP = &im_expressions[i.imm_operands++]; | |
996 | i.op[this_operand].imms = expP; | |
997 | *expP = exp; | |
998 | ||
999 | return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types, | |
1000 | operand_string); | |
1001 | } | |
1002 | ||
1003 | return 1; | |
1004 | } |