Commit | Line | Data |
---|---|---|
ee86248c | 1 | /* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64 |
b3adc24a | 2 | Copyright (C) 2009-2020 Free Software Foundation, Inc. |
ee86248c JB |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to the Free | |
18 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
19 | 02110-1301, USA. */ | |
20 | ||
21 | static struct | |
22 | { | |
23 | operatorT op_modifier; /* Operand modifier. */ | |
24 | int is_mem; /* 1 if operand is memory reference. */ | |
25303607 | 25 | int is_indirect; /* 1 if operand is indirect reference. */ |
6cee4cda | 26 | int has_offset; /* 1 if operand has offset. */ |
ee86248c JB |
27 | unsigned int in_offset; /* >=1 if processing operand of offset. */ |
28 | unsigned int in_bracket; /* >=1 if processing operand in brackets. */ | |
33eaf5de | 29 | unsigned int in_scale; /* >=1 if processing multiplication operand |
ee86248c JB |
30 | * in brackets. */ |
31 | i386_operand_type reloc_types; /* Value obtained from lex_got(). */ | |
32 | const reg_entry *base; /* Base register (if any). */ | |
33 | const reg_entry *index; /* Index register (if any). */ | |
34 | offsetT scale_factor; /* Accumulated scale factor. */ | |
35 | symbolS *seg; | |
36 | } | |
37 | intel_state; | |
38 | ||
39 | /* offset X_add_symbol */ | |
40 | #define O_offset O_md32 | |
7ac3eb25 L |
41 | /* offset X_add_symbol */ |
42 | #define O_short O_md31 | |
43 | /* near ptr X_add_symbol */ | |
44 | #define O_near_ptr O_md30 | |
45 | /* far ptr X_add_symbol */ | |
46 | #define O_far_ptr O_md29 | |
ee86248c | 47 | /* byte ptr X_add_symbol */ |
7ac3eb25 | 48 | #define O_byte_ptr O_md28 |
ee86248c | 49 | /* word ptr X_add_symbol */ |
7ac3eb25 | 50 | #define O_word_ptr O_md27 |
ee86248c | 51 | /* dword ptr X_add_symbol */ |
7ac3eb25 | 52 | #define O_dword_ptr O_md26 |
ee86248c | 53 | /* qword ptr X_add_symbol */ |
7ac3eb25 | 54 | #define O_qword_ptr O_md25 |
f2f5811f JB |
55 | /* mmword ptr X_add_symbol */ |
56 | #define O_mmword_ptr O_qword_ptr | |
ee86248c | 57 | /* fword ptr X_add_symbol */ |
7456d03d | 58 | #define O_fword_ptr O_md24 |
ee86248c | 59 | /* tbyte ptr X_add_symbol */ |
7456d03d JB |
60 | #define O_tbyte_ptr O_md23 |
61 | /* oword ptr X_add_symbol */ | |
62 | #define O_oword_ptr O_md22 | |
ee86248c | 63 | /* xmmword ptr X_add_symbol */ |
7456d03d | 64 | #define O_xmmword_ptr O_oword_ptr |
ee86248c | 65 | /* ymmword ptr X_add_symbol */ |
7456d03d | 66 | #define O_ymmword_ptr O_md21 |
43234a1e | 67 | /* zmmword ptr X_add_symbol */ |
7456d03d | 68 | #define O_zmmword_ptr O_md20 |
ee86248c JB |
69 | |
70 | static struct | |
71 | { | |
72 | const char *name; | |
1e9cc1c2 | 73 | operatorT op; |
ee86248c JB |
74 | unsigned int operands; |
75 | } | |
76 | const i386_operators[] = | |
77 | { | |
78 | { "and", O_bit_and, 2 }, | |
79 | { "eq", O_eq, 2 }, | |
80 | { "ge", O_ge, 2 }, | |
81 | { "gt", O_gt, 2 }, | |
82 | { "le", O_le, 2 }, | |
83 | { "lt", O_lt, 2 }, | |
84 | { "mod", O_modulus, 2 }, | |
85 | { "ne", O_ne, 2 }, | |
86 | { "not", O_bit_not, 1 }, | |
87 | { "offset", O_offset, 1 }, | |
88 | { "or", O_bit_inclusive_or, 2 }, | |
89 | { "shl", O_left_shift, 2 }, | |
90 | { "short", O_short, 1 }, | |
91 | { "shr", O_right_shift, 2 }, | |
92 | { "xor", O_bit_exclusive_or, 2 }, | |
93 | { NULL, O_illegal, 0 } | |
94 | }; | |
95 | ||
96 | static struct | |
97 | { | |
98 | const char *name; | |
1e9cc1c2 | 99 | operatorT op; |
ee86248c JB |
100 | unsigned short sz[3]; |
101 | } | |
102 | const i386_types[] = | |
103 | { | |
104 | #define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } } | |
105 | I386_TYPE(byte, 1), | |
106 | I386_TYPE(word, 2), | |
107 | I386_TYPE(dword, 4), | |
108 | I386_TYPE(fword, 6), | |
109 | I386_TYPE(qword, 8), | |
f2f5811f | 110 | I386_TYPE(mmword, 8), |
ee86248c JB |
111 | I386_TYPE(tbyte, 10), |
112 | I386_TYPE(oword, 16), | |
113 | I386_TYPE(xmmword, 16), | |
114 | I386_TYPE(ymmword, 32), | |
43234a1e | 115 | I386_TYPE(zmmword, 64), |
ee86248c JB |
116 | #undef I386_TYPE |
117 | { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } }, | |
118 | { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } }, | |
119 | { NULL, O_illegal, { 0, 0, 0 } } | |
120 | }; | |
121 | ||
122 | operatorT i386_operator (const char *name, unsigned int operands, char *pc) | |
123 | { | |
124 | unsigned int j; | |
125 | ||
126 | if (!intel_syntax) | |
127 | return O_absent; | |
128 | ||
129 | if (!name) | |
130 | { | |
131 | if (operands != 2) | |
132 | return O_illegal; | |
133 | switch (*input_line_pointer) | |
134 | { | |
135 | case ':': | |
136 | ++input_line_pointer; | |
137 | return O_full_ptr; | |
138 | case '[': | |
139 | ++input_line_pointer; | |
140 | return O_index; | |
141 | case '@': | |
142 | if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC) | |
143 | { | |
144 | int adjust = 0; | |
145 | char *gotfree_input_line = lex_got (&i.reloc[this_operand], | |
146 | &adjust, | |
d258b828 | 147 | &intel_state.reloc_types); |
ee86248c JB |
148 | |
149 | if (!gotfree_input_line) | |
150 | break; | |
151 | free (gotfree_input_line); | |
152 | *input_line_pointer++ = '+'; | |
153 | memset (input_line_pointer, '0', adjust - 1); | |
154 | input_line_pointer[adjust - 1] = ' '; | |
155 | return O_add; | |
156 | } | |
157 | break; | |
158 | } | |
159 | return O_illegal; | |
160 | } | |
161 | ||
162 | for (j = 0; i386_operators[j].name; ++j) | |
91d6fa6a | 163 | if (strcasecmp (i386_operators[j].name, name) == 0) |
ee86248c JB |
164 | { |
165 | if (i386_operators[j].operands | |
166 | && i386_operators[j].operands != operands) | |
167 | return O_illegal; | |
1e9cc1c2 | 168 | return i386_operators[j].op; |
ee86248c JB |
169 | } |
170 | ||
171 | for (j = 0; i386_types[j].name; ++j) | |
91d6fa6a | 172 | if (strcasecmp (i386_types[j].name, name) == 0) |
ee86248c | 173 | break; |
d02603dc | 174 | |
ee86248c JB |
175 | if (i386_types[j].name && *pc == ' ') |
176 | { | |
d02603dc NC |
177 | char *pname; |
178 | char c; | |
179 | ||
180 | ++input_line_pointer; | |
181 | c = get_symbol_name (&pname); | |
ee86248c | 182 | |
91d6fa6a | 183 | if (strcasecmp (pname, "ptr") == 0) |
ee86248c | 184 | { |
d02603dc | 185 | /* FIXME: What if c == '"' ? */ |
91d6fa6a | 186 | pname[-1] = *pc; |
ee86248c JB |
187 | *pc = c; |
188 | if (intel_syntax > 0 || operands != 1) | |
189 | return O_illegal; | |
1e9cc1c2 | 190 | return i386_types[j].op; |
ee86248c JB |
191 | } |
192 | ||
d02603dc | 193 | (void) restore_line_pointer (c); |
91d6fa6a | 194 | input_line_pointer = pname - 1; |
ee86248c JB |
195 | } |
196 | ||
197 | return O_absent; | |
198 | } | |
199 | ||
200 | static int i386_intel_parse_name (const char *name, expressionS *e) | |
201 | { | |
91d6fa6a | 202 | unsigned int j; |
ee86248c | 203 | |
b7adb16d JB |
204 | if (! strcmp (name, "$")) |
205 | { | |
206 | current_location (e); | |
207 | return 1; | |
208 | } | |
209 | ||
91d6fa6a NC |
210 | for (j = 0; i386_types[j].name; ++j) |
211 | if (strcasecmp(i386_types[j].name, name) == 0) | |
ee86248c JB |
212 | { |
213 | e->X_op = O_constant; | |
91d6fa6a | 214 | e->X_add_number = i386_types[j].sz[flag_code]; |
ee86248c JB |
215 | e->X_add_symbol = NULL; |
216 | e->X_op_symbol = NULL; | |
217 | return 1; | |
218 | } | |
219 | ||
220 | return 0; | |
221 | } | |
222 | ||
91d6fa6a | 223 | static INLINE int i386_intel_check (const reg_entry *rreg, |
ee86248c | 224 | const reg_entry *base, |
91d6fa6a | 225 | const reg_entry *iindex) |
ee86248c | 226 | { |
f09c1772 L |
227 | if ((this_operand >= 0 |
228 | && rreg != i.op[this_operand].regs) | |
229 | || base != intel_state.base | |
230 | || iindex != intel_state.index) | |
ee86248c JB |
231 | { |
232 | as_bad (_("invalid use of register")); | |
233 | return 0; | |
234 | } | |
235 | return 1; | |
236 | } | |
237 | ||
238 | static INLINE void i386_intel_fold (expressionS *e, symbolS *sym) | |
239 | { | |
27dee630 | 240 | expressionS *exp = symbol_get_value_expression (sym); |
ee86248c JB |
241 | if (S_GET_SEGMENT (sym) == absolute_section) |
242 | { | |
243 | offsetT val = e->X_add_number; | |
244 | ||
27dee630 | 245 | *e = *exp; |
ee86248c JB |
246 | e->X_add_number += val; |
247 | } | |
248 | else | |
249 | { | |
27dee630 L |
250 | if (exp->X_op == O_symbol |
251 | && strcmp (S_GET_NAME (exp->X_add_symbol), | |
252 | GLOBAL_OFFSET_TABLE_NAME) == 0) | |
253 | sym = exp->X_add_symbol; | |
ee86248c JB |
254 | e->X_add_symbol = sym; |
255 | e->X_op_symbol = NULL; | |
256 | e->X_op = O_symbol; | |
257 | } | |
258 | } | |
259 | ||
3c7b9c2c L |
260 | static int |
261 | i386_intel_simplify_register (expressionS *e) | |
262 | { | |
263 | int reg_num; | |
264 | ||
265 | if (this_operand < 0 || intel_state.in_offset) | |
266 | { | |
267 | as_bad (_("invalid use of register")); | |
268 | return 0; | |
269 | } | |
270 | ||
271 | if (e->X_op == O_register) | |
272 | reg_num = e->X_add_number; | |
273 | else | |
274 | reg_num = e->X_md - 1; | |
275 | ||
35015cd1 NC |
276 | if (reg_num < 0 || reg_num >= (int) i386_regtab_size) |
277 | { | |
278 | as_bad (_("invalid register number")); | |
279 | return 0; | |
280 | } | |
281 | ||
3c7b9c2c L |
282 | if (!intel_state.in_bracket) |
283 | { | |
284 | if (i.op[this_operand].regs) | |
285 | { | |
286 | as_bad (_("invalid use of register")); | |
287 | return 0; | |
288 | } | |
00cee14f | 289 | if (i386_regtab[reg_num].reg_type.bitfield.class == SReg |
3c7b9c2c L |
290 | && i386_regtab[reg_num].reg_num == RegFlat) |
291 | { | |
292 | as_bad (_("invalid use of pseudo-register")); | |
293 | return 0; | |
294 | } | |
295 | i.op[this_operand].regs = i386_regtab + reg_num; | |
296 | } | |
9e2934f7 | 297 | else if (!intel_state.index |
1b54b8d7 JB |
298 | && (i386_regtab[reg_num].reg_type.bitfield.xmmword |
299 | || i386_regtab[reg_num].reg_type.bitfield.ymmword | |
300 | || i386_regtab[reg_num].reg_type.bitfield.zmmword | |
e968fc9b | 301 | || i386_regtab[reg_num].reg_num == RegIZ)) |
9e2934f7 | 302 | intel_state.index = i386_regtab + reg_num; |
3c7b9c2c L |
303 | else if (!intel_state.base && !intel_state.in_scale) |
304 | intel_state.base = i386_regtab + reg_num; | |
305 | else if (!intel_state.index) | |
9e2934f7 JB |
306 | { |
307 | if (intel_state.in_scale | |
47cd3fa7 JB |
308 | || current_templates->start->base_opcode == 0xf30f1b /* bndmk */ |
309 | || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */ | |
9e2934f7 JB |
310 | || i386_regtab[reg_num].reg_type.bitfield.baseindex) |
311 | intel_state.index = i386_regtab + reg_num; | |
312 | else | |
313 | { | |
314 | /* Convert base to index and make ESP/RSP the base. */ | |
315 | intel_state.index = intel_state.base; | |
316 | intel_state.base = i386_regtab + reg_num; | |
317 | } | |
318 | } | |
3c7b9c2c L |
319 | else |
320 | { | |
321 | /* esp is invalid as index */ | |
8280f326 | 322 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
3c7b9c2c L |
323 | } |
324 | return 2; | |
325 | } | |
326 | ||
ee86248c JB |
327 | static int i386_intel_simplify (expressionS *); |
328 | ||
329 | static INLINE int i386_intel_simplify_symbol(symbolS *sym) | |
330 | { | |
331 | int ret = i386_intel_simplify (symbol_get_value_expression (sym)); | |
332 | ||
333 | if (ret == 2) | |
334 | { | |
335 | S_SET_SEGMENT(sym, absolute_section); | |
336 | ret = 1; | |
337 | } | |
338 | return ret; | |
339 | } | |
340 | ||
341 | static int i386_intel_simplify (expressionS *e) | |
342 | { | |
f09c1772 L |
343 | const reg_entry *the_reg = (this_operand >= 0 |
344 | ? i.op[this_operand].regs : NULL); | |
ee86248c | 345 | const reg_entry *base = intel_state.base; |
91d6fa6a | 346 | const reg_entry *state_index = intel_state.index; |
ee86248c JB |
347 | int ret; |
348 | ||
349 | if (!intel_syntax) | |
350 | return 1; | |
351 | ||
352 | switch (e->X_op) | |
353 | { | |
354 | case O_index: | |
355 | if (e->X_add_symbol) | |
356 | { | |
357 | if (!i386_intel_simplify_symbol (e->X_add_symbol) | |
f09c1772 L |
358 | || !i386_intel_check(the_reg, intel_state.base, |
359 | intel_state.index)) | |
5bb3703f | 360 | return 0; |
ee86248c JB |
361 | } |
362 | if (!intel_state.in_offset) | |
363 | ++intel_state.in_bracket; | |
364 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
365 | if (!intel_state.in_offset) | |
366 | --intel_state.in_bracket; | |
367 | if (!ret) | |
368 | return 0; | |
369 | if (e->X_add_symbol) | |
370 | e->X_op = O_add; | |
371 | else | |
372 | i386_intel_fold (e, e->X_op_symbol); | |
373 | break; | |
374 | ||
375 | case O_offset: | |
6cee4cda | 376 | intel_state.has_offset = 1; |
ee86248c JB |
377 | ++intel_state.in_offset; |
378 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
379 | --intel_state.in_offset; | |
91d6fa6a | 380 | if (!ret || !i386_intel_check(the_reg, base, state_index)) |
ee86248c JB |
381 | return 0; |
382 | i386_intel_fold (e, e->X_add_symbol); | |
383 | return ret; | |
384 | ||
385 | case O_byte_ptr: | |
386 | case O_word_ptr: | |
387 | case O_dword_ptr: | |
388 | case O_fword_ptr: | |
f2f5811f | 389 | case O_qword_ptr: /* O_mmword_ptr */ |
ee86248c | 390 | case O_tbyte_ptr: |
7456d03d | 391 | case O_oword_ptr: /* O_xmmword_ptr */ |
ee86248c | 392 | case O_ymmword_ptr: |
43234a1e | 393 | case O_zmmword_ptr: |
ee86248c JB |
394 | case O_near_ptr: |
395 | case O_far_ptr: | |
396 | if (intel_state.op_modifier == O_absent) | |
397 | intel_state.op_modifier = e->X_op; | |
398 | /* FALLTHROUGH */ | |
399 | case O_short: | |
f09c1772 L |
400 | if (symbol_get_value_expression (e->X_add_symbol)->X_op |
401 | == O_register) | |
ee86248c JB |
402 | { |
403 | as_bad (_("invalid use of register")); | |
404 | return 0; | |
405 | } | |
406 | if (!i386_intel_simplify_symbol (e->X_add_symbol)) | |
407 | return 0; | |
408 | i386_intel_fold (e, e->X_add_symbol); | |
409 | break; | |
410 | ||
411 | case O_full_ptr: | |
f09c1772 L |
412 | if (symbol_get_value_expression (e->X_op_symbol)->X_op |
413 | == O_register) | |
ee86248c JB |
414 | { |
415 | as_bad (_("invalid use of register")); | |
416 | return 0; | |
417 | } | |
418 | if (!i386_intel_simplify_symbol (e->X_op_symbol) | |
f09c1772 L |
419 | || !i386_intel_check(the_reg, intel_state.base, |
420 | intel_state.index)) | |
ee86248c JB |
421 | return 0; |
422 | if (!intel_state.in_offset) | |
fd4e0347 JB |
423 | { |
424 | if (!intel_state.seg) | |
425 | intel_state.seg = e->X_add_symbol; | |
426 | else | |
427 | { | |
428 | expressionS exp; | |
429 | ||
430 | exp.X_op = O_full_ptr; | |
431 | exp.X_add_symbol = e->X_add_symbol; | |
432 | exp.X_op_symbol = intel_state.seg; | |
433 | intel_state.seg = make_expr_symbol (&exp); | |
434 | } | |
435 | } | |
ee86248c JB |
436 | i386_intel_fold (e, e->X_op_symbol); |
437 | break; | |
438 | ||
ee86248c JB |
439 | case O_multiply: |
440 | if (this_operand >= 0 && intel_state.in_bracket) | |
441 | { | |
442 | expressionS *scale = NULL; | |
c2a5914e | 443 | int has_index = (intel_state.index != NULL); |
ee86248c JB |
444 | |
445 | if (!intel_state.in_scale++) | |
446 | intel_state.scale_factor = 1; | |
447 | ||
448 | ret = i386_intel_simplify_symbol (e->X_add_symbol); | |
c2a5914e | 449 | if (ret && !has_index && intel_state.index) |
ee86248c JB |
450 | scale = symbol_get_value_expression (e->X_op_symbol); |
451 | ||
452 | if (ret) | |
453 | ret = i386_intel_simplify_symbol (e->X_op_symbol); | |
c2a5914e | 454 | if (ret && !scale && !has_index && intel_state.index) |
ee86248c JB |
455 | scale = symbol_get_value_expression (e->X_add_symbol); |
456 | ||
c2a5914e | 457 | if (ret && scale) |
ee86248c JB |
458 | { |
459 | resolve_expression (scale); | |
460 | if (scale->X_op != O_constant | |
dc821c5f | 461 | || intel_state.index->reg_type.bitfield.word) |
ee86248c JB |
462 | scale->X_add_number = 0; |
463 | intel_state.scale_factor *= scale->X_add_number; | |
464 | } | |
465 | ||
466 | --intel_state.in_scale; | |
467 | if (!ret) | |
468 | return 0; | |
469 | ||
470 | if (!intel_state.in_scale) | |
471 | switch (intel_state.scale_factor) | |
472 | { | |
473 | case 1: | |
474 | i.log2_scale_factor = 0; | |
475 | break; | |
476 | case 2: | |
477 | i.log2_scale_factor = 1; | |
478 | break; | |
479 | case 4: | |
480 | i.log2_scale_factor = 2; | |
481 | break; | |
482 | case 8: | |
483 | i.log2_scale_factor = 3; | |
484 | break; | |
485 | default: | |
486 | /* esp is invalid as index */ | |
8280f326 | 487 | intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM; |
ee86248c JB |
488 | break; |
489 | } | |
490 | ||
491 | break; | |
492 | } | |
92b4f90c | 493 | goto fallthrough; |
3c7b9c2c L |
494 | |
495 | case O_register: | |
496 | ret = i386_intel_simplify_register (e); | |
497 | if (ret == 2) | |
498 | { | |
499 | gas_assert (e->X_add_number < (unsigned short) -1); | |
500 | e->X_md = (unsigned short) e->X_add_number + 1; | |
501 | e->X_op = O_constant; | |
502 | e->X_add_number = 0; | |
503 | } | |
504 | return ret; | |
505 | ||
506 | case O_constant: | |
507 | if (e->X_md) | |
508 | return i386_intel_simplify_register (e); | |
509 | ||
ee86248c JB |
510 | /* FALLTHROUGH */ |
511 | default: | |
92b4f90c | 512 | fallthrough: |
f09c1772 L |
513 | if (e->X_add_symbol |
514 | && !i386_intel_simplify_symbol (e->X_add_symbol)) | |
ee86248c JB |
515 | return 0; |
516 | if (e->X_op == O_add || e->X_op == O_subtract) | |
517 | { | |
518 | base = intel_state.base; | |
91d6fa6a | 519 | state_index = intel_state.index; |
ee86248c | 520 | } |
91d6fa6a | 521 | if (!i386_intel_check (the_reg, base, state_index) |
f09c1772 L |
522 | || (e->X_op_symbol |
523 | && !i386_intel_simplify_symbol (e->X_op_symbol)) | |
91d6fa6a | 524 | || !i386_intel_check (the_reg, |
f09c1772 L |
525 | (e->X_op != O_add |
526 | ? base : intel_state.base), | |
527 | (e->X_op != O_add | |
528 | ? state_index : intel_state.index))) | |
ee86248c JB |
529 | return 0; |
530 | break; | |
531 | } | |
532 | ||
f09c1772 L |
533 | if (this_operand >= 0 |
534 | && e->X_op == O_symbol | |
535 | && !intel_state.in_offset) | |
ee86248c JB |
536 | { |
537 | segT seg = S_GET_SEGMENT (e->X_add_symbol); | |
538 | ||
539 | if (seg != absolute_section | |
540 | && seg != reg_section | |
541 | && seg != expr_section) | |
542 | intel_state.is_mem |= 2 - !intel_state.in_bracket; | |
543 | } | |
544 | ||
545 | return 1; | |
546 | } | |
547 | ||
548 | int i386_need_index_operator (void) | |
549 | { | |
550 | return intel_syntax < 0; | |
551 | } | |
552 | ||
553 | static int | |
554 | i386_intel_operand (char *operand_string, int got_a_float) | |
555 | { | |
556 | char *saved_input_line_pointer, *buf; | |
557 | segT exp_seg; | |
558 | expressionS exp, *expP; | |
559 | char suffix = 0; | |
560 | int ret; | |
561 | ||
43234a1e L |
562 | /* Handle vector immediates. */ |
563 | if (RC_SAE_immediate (operand_string)) | |
564 | return 1; | |
565 | ||
ee86248c JB |
566 | /* Initialize state structure. */ |
567 | intel_state.op_modifier = O_absent; | |
568 | intel_state.is_mem = 0; | |
25303607 | 569 | intel_state.is_indirect = 0; |
1acf546e | 570 | intel_state.has_offset = 0; |
ee86248c JB |
571 | intel_state.base = NULL; |
572 | intel_state.index = NULL; | |
573 | intel_state.seg = NULL; | |
574 | operand_type_set (&intel_state.reloc_types, ~0); | |
9c2799c2 NC |
575 | gas_assert (!intel_state.in_offset); |
576 | gas_assert (!intel_state.in_bracket); | |
577 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
578 | |
579 | saved_input_line_pointer = input_line_pointer; | |
580 | input_line_pointer = buf = xstrdup (operand_string); | |
581 | ||
582 | intel_syntax = -1; | |
583 | memset (&exp, 0, sizeof(exp)); | |
584 | exp_seg = expression (&exp); | |
585 | ret = i386_intel_simplify (&exp); | |
586 | intel_syntax = 1; | |
587 | ||
588 | SKIP_WHITESPACE (); | |
43234a1e L |
589 | |
590 | /* Handle vector operations. */ | |
591 | if (*input_line_pointer == '{') | |
592 | { | |
593 | char *end = check_VecOperations (input_line_pointer, NULL); | |
594 | if (end) | |
595 | input_line_pointer = end; | |
596 | else | |
597 | ret = 0; | |
598 | } | |
599 | ||
ee86248c JB |
600 | if (!is_end_of_line[(unsigned char) *input_line_pointer]) |
601 | { | |
38bf5113 JB |
602 | if (ret) |
603 | as_bad (_("junk `%s' after expression"), input_line_pointer); | |
ee86248c JB |
604 | ret = 0; |
605 | } | |
606 | else if (exp.X_op == O_illegal || exp.X_op == O_absent) | |
607 | { | |
38bf5113 JB |
608 | if (ret) |
609 | as_bad (_("invalid expression")); | |
ee86248c JB |
610 | ret = 0; |
611 | } | |
6cee4cda L |
612 | else if (!intel_state.has_offset |
613 | && input_line_pointer > buf | |
614 | && *(input_line_pointer - 1) == ']') | |
25303607 L |
615 | { |
616 | intel_state.is_mem |= 1; | |
617 | intel_state.is_indirect = 1; | |
618 | } | |
ee86248c JB |
619 | |
620 | input_line_pointer = saved_input_line_pointer; | |
621 | free (buf); | |
622 | ||
9c2799c2 NC |
623 | gas_assert (!intel_state.in_offset); |
624 | gas_assert (!intel_state.in_bracket); | |
625 | gas_assert (!intel_state.in_scale); | |
ee86248c JB |
626 | |
627 | if (!ret) | |
628 | return 0; | |
629 | ||
630 | if (intel_state.op_modifier != O_absent | |
631 | && current_templates->start->base_opcode != 0x8d /* lea */) | |
632 | { | |
633 | i.types[this_operand].bitfield.unspecified = 0; | |
634 | ||
635 | switch (intel_state.op_modifier) | |
636 | { | |
637 | case O_byte_ptr: | |
638 | i.types[this_operand].bitfield.byte = 1; | |
639 | suffix = BYTE_MNEM_SUFFIX; | |
640 | break; | |
641 | ||
642 | case O_word_ptr: | |
643 | i.types[this_operand].bitfield.word = 1; | |
37404387 | 644 | if (got_a_float == 2) /* "fi..." */ |
ee86248c JB |
645 | suffix = SHORT_MNEM_SUFFIX; |
646 | else | |
647 | suffix = WORD_MNEM_SUFFIX; | |
648 | break; | |
649 | ||
650 | case O_dword_ptr: | |
651 | i.types[this_operand].bitfield.dword = 1; | |
652 | if ((current_templates->start->name[0] == 'l' | |
653 | && current_templates->start->name[2] == 's' | |
654 | && current_templates->start->name[3] == 0) | |
655 | || current_templates->start->base_opcode == 0x62 /* bound */) | |
656 | suffix = WORD_MNEM_SUFFIX; | |
d488367a | 657 | else if (flag_code != CODE_32BIT |
0cfa3eb3 JB |
658 | && (current_templates->start->opcode_modifier.jump == JUMP |
659 | || current_templates->start->opcode_modifier.jump | |
660 | == JUMP_DWORD)) | |
d488367a JB |
661 | suffix = flag_code == CODE_16BIT ? LONG_DOUBLE_MNEM_SUFFIX |
662 | : WORD_MNEM_SUFFIX; | |
ee86248c JB |
663 | else if (got_a_float == 1) /* "f..." */ |
664 | suffix = SHORT_MNEM_SUFFIX; | |
665 | else | |
666 | suffix = LONG_MNEM_SUFFIX; | |
667 | break; | |
668 | ||
669 | case O_fword_ptr: | |
670 | i.types[this_operand].bitfield.fword = 1; | |
671 | if (current_templates->start->name[0] == 'l' | |
672 | && current_templates->start->name[2] == 's' | |
673 | && current_templates->start->name[3] == 0) | |
674 | suffix = LONG_MNEM_SUFFIX; | |
675 | else if (!got_a_float) | |
676 | { | |
677 | if (flag_code == CODE_16BIT) | |
678 | add_prefix (DATA_PREFIX_OPCODE); | |
679 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
680 | } | |
ee86248c JB |
681 | break; |
682 | ||
f2f5811f | 683 | case O_qword_ptr: /* O_mmword_ptr */ |
ee86248c JB |
684 | i.types[this_operand].bitfield.qword = 1; |
685 | if (current_templates->start->base_opcode == 0x62 /* bound */ | |
686 | || got_a_float == 1) /* "f..." */ | |
687 | suffix = LONG_MNEM_SUFFIX; | |
688 | else | |
689 | suffix = QWORD_MNEM_SUFFIX; | |
690 | break; | |
691 | ||
692 | case O_tbyte_ptr: | |
693 | i.types[this_operand].bitfield.tbyte = 1; | |
694 | if (got_a_float == 1) | |
695 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
a8f4f6b9 JB |
696 | else if ((current_templates->start->operand_types[0].bitfield.fword |
697 | || current_templates->start->operand_types[0].bitfield.tbyte) | |
698 | && flag_code == CODE_64BIT) | |
699 | suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt */ | |
ee86248c | 700 | else |
a8f4f6b9 | 701 | i.types[this_operand].bitfield.byte = 1; /* cause an error */ |
ee86248c JB |
702 | break; |
703 | ||
7456d03d | 704 | case O_oword_ptr: /* O_xmmword_ptr */ |
ee86248c | 705 | i.types[this_operand].bitfield.xmmword = 1; |
ee86248c JB |
706 | break; |
707 | ||
708 | case O_ymmword_ptr: | |
709 | i.types[this_operand].bitfield.ymmword = 1; | |
ee86248c JB |
710 | break; |
711 | ||
43234a1e L |
712 | case O_zmmword_ptr: |
713 | i.types[this_operand].bitfield.zmmword = 1; | |
43234a1e L |
714 | break; |
715 | ||
ee86248c JB |
716 | case O_far_ptr: |
717 | suffix = LONG_DOUBLE_MNEM_SUFFIX; | |
718 | /* FALLTHROUGH */ | |
719 | case O_near_ptr: | |
0cfa3eb3 JB |
720 | if (current_templates->start->opcode_modifier.jump != JUMP |
721 | && current_templates->start->opcode_modifier.jump != JUMP_DWORD) | |
164d49cb JB |
722 | { |
723 | /* cause an error */ | |
724 | i.types[this_operand].bitfield.byte = 1; | |
725 | i.types[this_operand].bitfield.tbyte = 1; | |
726 | suffix = i.suffix; | |
727 | } | |
ee86248c JB |
728 | break; |
729 | ||
730 | default: | |
731 | BAD_CASE (intel_state.op_modifier); | |
732 | break; | |
733 | } | |
734 | ||
735 | if (!i.suffix) | |
736 | i.suffix = suffix; | |
737 | else if (i.suffix != suffix) | |
738 | { | |
739 | as_bad (_("conflicting operand size modifiers")); | |
740 | return 0; | |
741 | } | |
742 | } | |
743 | ||
744 | /* Operands for jump/call need special consideration. */ | |
0cfa3eb3 JB |
745 | if (current_templates->start->opcode_modifier.jump == JUMP |
746 | || current_templates->start->opcode_modifier.jump == JUMP_DWORD | |
747 | || current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT) | |
ee86248c | 748 | { |
6f2f06be JB |
749 | bfd_boolean jumpabsolute = FALSE; |
750 | ||
f09c1772 L |
751 | if (i.op[this_operand].regs |
752 | || intel_state.base | |
753 | || intel_state.index | |
ee86248c | 754 | || intel_state.is_mem > 1) |
6f2f06be | 755 | jumpabsolute = TRUE; |
ee86248c JB |
756 | else |
757 | switch (intel_state.op_modifier) | |
758 | { | |
759 | case O_near_ptr: | |
760 | if (intel_state.seg) | |
6f2f06be | 761 | jumpabsolute = TRUE; |
ee86248c JB |
762 | else |
763 | intel_state.is_mem = 1; | |
764 | break; | |
765 | case O_far_ptr: | |
766 | case O_absent: | |
767 | if (!intel_state.seg) | |
768 | { | |
769 | intel_state.is_mem = 1; | |
770 | if (intel_state.op_modifier == O_absent) | |
25303607 L |
771 | { |
772 | if (intel_state.is_indirect == 1) | |
6f2f06be | 773 | jumpabsolute = TRUE; |
25303607 L |
774 | break; |
775 | } | |
ee86248c JB |
776 | as_bad (_("cannot infer the segment part of the operand")); |
777 | return 0; | |
778 | } | |
779 | else if (S_GET_SEGMENT (intel_state.seg) == reg_section) | |
6f2f06be | 780 | jumpabsolute = TRUE; |
ee86248c JB |
781 | else |
782 | { | |
783 | i386_operand_type types; | |
784 | ||
785 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
786 | { | |
787 | as_bad (_("at most %d immediate operands are allowed"), | |
788 | MAX_IMMEDIATE_OPERANDS); | |
789 | return 0; | |
790 | } | |
791 | expP = &im_expressions[i.imm_operands++]; | |
792 | memset (expP, 0, sizeof(*expP)); | |
793 | expP->X_op = O_symbol; | |
794 | expP->X_add_symbol = intel_state.seg; | |
795 | i.op[this_operand].imms = expP; | |
796 | ||
797 | resolve_expression (expP); | |
798 | operand_type_set (&types, ~0); | |
799 | if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg), | |
800 | expP, types, operand_string)) | |
801 | return 0; | |
802 | if (i.operands < MAX_OPERANDS) | |
803 | { | |
804 | this_operand = i.operands++; | |
805 | i.types[this_operand].bitfield.unspecified = 1; | |
806 | } | |
807 | if (suffix == LONG_DOUBLE_MNEM_SUFFIX) | |
808 | i.suffix = 0; | |
809 | intel_state.seg = NULL; | |
810 | intel_state.is_mem = 0; | |
811 | } | |
812 | break; | |
813 | default: | |
6f2f06be | 814 | jumpabsolute = TRUE; |
ee86248c JB |
815 | break; |
816 | } | |
6f2f06be JB |
817 | if (jumpabsolute) |
818 | { | |
819 | i.jumpabsolute = TRUE; | |
820 | intel_state.is_mem |= 1; | |
821 | } | |
ee86248c JB |
822 | } |
823 | else if (intel_state.seg) | |
824 | intel_state.is_mem |= 1; | |
825 | ||
826 | if (i.op[this_operand].regs) | |
827 | { | |
828 | i386_operand_type temp; | |
829 | ||
830 | /* Register operand. */ | |
831 | if (intel_state.base || intel_state.index || intel_state.seg) | |
832 | { | |
833 | as_bad (_("invalid operand")); | |
834 | return 0; | |
835 | } | |
836 | ||
837 | temp = i.op[this_operand].regs->reg_type; | |
838 | temp.bitfield.baseindex = 0; | |
f09c1772 L |
839 | i.types[this_operand] = operand_type_or (i.types[this_operand], |
840 | temp); | |
ee86248c JB |
841 | i.types[this_operand].bitfield.unspecified = 0; |
842 | ++i.reg_operands; | |
843 | } | |
f09c1772 L |
844 | else if (intel_state.base |
845 | || intel_state.index | |
846 | || intel_state.seg | |
ee86248c JB |
847 | || intel_state.is_mem) |
848 | { | |
849 | /* Memory operand. */ | |
8325cc63 JB |
850 | if (i.mem_operands == 1 && !maybe_adjust_templates ()) |
851 | return 0; | |
faf786e6 | 852 | if ((int) i.mem_operands |
ee86248c JB |
853 | >= 2 - !current_templates->start->opcode_modifier.isstring) |
854 | { | |
313c53d1 L |
855 | /* Handle |
856 | ||
857 | call 0x9090,0x90909090 | |
858 | lcall 0x9090,0x90909090 | |
859 | jmp 0x9090,0x90909090 | |
860 | ljmp 0x9090,0x90909090 | |
861 | */ | |
862 | ||
0cfa3eb3 JB |
863 | if ((current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT |
864 | || current_templates->start->opcode_modifier.jump == JUMP_DWORD | |
865 | || current_templates->start->opcode_modifier.jump == JUMP) | |
313c53d1 L |
866 | && this_operand == 1 |
867 | && intel_state.seg == NULL | |
868 | && i.mem_operands == 1 | |
869 | && i.disp_operands == 1 | |
870 | && intel_state.op_modifier == O_absent) | |
871 | { | |
872 | /* Try to process the first operand as immediate, */ | |
873 | this_operand = 0; | |
874 | if (i386_finalize_immediate (exp_seg, i.op[0].imms, | |
875 | intel_state.reloc_types, | |
876 | NULL)) | |
877 | { | |
878 | this_operand = 1; | |
879 | expP = &im_expressions[0]; | |
880 | i.op[this_operand].imms = expP; | |
881 | *expP = exp; | |
882 | ||
883 | /* Try to process the second operand as immediate, */ | |
884 | if (i386_finalize_immediate (exp_seg, expP, | |
885 | intel_state.reloc_types, | |
886 | NULL)) | |
887 | { | |
888 | i.mem_operands = 0; | |
889 | i.disp_operands = 0; | |
890 | i.imm_operands = 2; | |
c48dadc9 | 891 | i.flags[0] &= ~Operand_Mem; |
313c53d1 L |
892 | i.types[0].bitfield.disp16 = 0; |
893 | i.types[0].bitfield.disp32 = 0; | |
894 | i.types[0].bitfield.disp32s = 0; | |
895 | return 1; | |
896 | } | |
897 | } | |
898 | } | |
899 | ||
ee86248c JB |
900 | as_bad (_("too many memory references for `%s'"), |
901 | current_templates->start->name); | |
902 | return 0; | |
903 | } | |
904 | ||
2abc2bec JB |
905 | /* Swap base and index in 16-bit memory operands like |
906 | [si+bx]. Since i386_index_check is also used in AT&T | |
907 | mode we have to do this here. */ | |
908 | if (intel_state.base | |
909 | && intel_state.index | |
dc821c5f JB |
910 | && intel_state.base->reg_type.bitfield.word |
911 | && intel_state.index->reg_type.bitfield.word | |
2abc2bec JB |
912 | && intel_state.base->reg_num >= 6 |
913 | && intel_state.index->reg_num < 6) | |
914 | { | |
915 | i.base_reg = intel_state.index; | |
916 | i.index_reg = intel_state.base; | |
917 | } | |
918 | else | |
919 | { | |
920 | i.base_reg = intel_state.base; | |
921 | i.index_reg = intel_state.index; | |
922 | } | |
923 | ||
924 | if (i.base_reg || i.index_reg) | |
925 | i.types[this_operand].bitfield.baseindex = 1; | |
926 | ||
ee86248c JB |
927 | expP = &disp_expressions[i.disp_operands]; |
928 | memcpy (expP, &exp, sizeof(exp)); | |
929 | resolve_expression (expP); | |
930 | ||
f09c1772 L |
931 | if (expP->X_op != O_constant |
932 | || expP->X_add_number | |
2abc2bec | 933 | || !i.types[this_operand].bitfield.baseindex) |
ee86248c JB |
934 | { |
935 | i.op[this_operand].disps = expP; | |
936 | i.disp_operands++; | |
937 | ||
2abc2bec JB |
938 | i386_addressing_mode (); |
939 | ||
ee86248c JB |
940 | if (flag_code == CODE_64BIT) |
941 | { | |
ee86248c JB |
942 | if (!i.prefix[ADDR_PREFIX]) |
943 | { | |
944 | i.types[this_operand].bitfield.disp64 = 1; | |
945 | i.types[this_operand].bitfield.disp32s = 1; | |
946 | } | |
48bcea9f JB |
947 | else |
948 | i.types[this_operand].bitfield.disp32 = 1; | |
ee86248c JB |
949 | } |
950 | else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT)) | |
951 | i.types[this_operand].bitfield.disp32 = 1; | |
952 | else | |
953 | i.types[this_operand].bitfield.disp16 = 1; | |
954 | ||
955 | #if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) | |
956 | /* | |
957 | * exp_seg is used only for verification in | |
958 | * i386_finalize_displacement, and we can end up seeing reg_section | |
959 | * here - but we know we removed all registers from the expression | |
960 | * (or error-ed on any remaining ones) in i386_intel_simplify. I | |
961 | * consider the check in i386_finalize_displacement bogus anyway, in | |
962 | * particular because it doesn't allow for expr_section, so I'd | |
963 | * rather see that check (and the similar one in | |
964 | * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out | |
965 | * expert I can't really say whether that would have other bad side | |
966 | * effects. | |
967 | */ | |
968 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour | |
969 | && exp_seg == reg_section) | |
970 | exp_seg = expP->X_op != O_constant ? undefined_section | |
971 | : absolute_section; | |
972 | #endif | |
973 | ||
974 | if (!i386_finalize_displacement (exp_seg, expP, | |
975 | intel_state.reloc_types, | |
976 | operand_string)) | |
977 | return 0; | |
978 | } | |
979 | ||
ee86248c JB |
980 | if (intel_state.seg) |
981 | { | |
fd4e0347 | 982 | for (ret = check_none; ; ret = operand_check) |
e21440ba JB |
983 | { |
984 | expP = symbol_get_value_expression (intel_state.seg); | |
fd4e0347 JB |
985 | if (expP->X_op != O_full_ptr |
986 | || symbol_get_value_expression (expP->X_op_symbol)->X_op | |
987 | != O_register) | |
e21440ba JB |
988 | break; |
989 | intel_state.seg = expP->X_add_symbol; | |
990 | } | |
0398aac5 | 991 | if (expP->X_op != O_register) |
ee86248c JB |
992 | { |
993 | as_bad (_("segment register name expected")); | |
994 | return 0; | |
995 | } | |
00cee14f | 996 | if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg) |
ee86248c JB |
997 | { |
998 | as_bad (_("invalid use of register")); | |
999 | return 0; | |
1000 | } | |
fd4e0347 JB |
1001 | switch (ret) |
1002 | { | |
1003 | case check_error: | |
1004 | as_bad (_("redundant segment overrides")); | |
1005 | return 0; | |
1006 | case check_warning: | |
1007 | as_warn (_("redundant segment overrides")); | |
1008 | break; | |
1009 | } | |
ee86248c JB |
1010 | switch (i386_regtab[expP->X_add_number].reg_num) |
1011 | { | |
1012 | case 0: i.seg[i.mem_operands] = &es; break; | |
1013 | case 1: i.seg[i.mem_operands] = &cs; break; | |
1014 | case 2: i.seg[i.mem_operands] = &ss; break; | |
1015 | case 3: i.seg[i.mem_operands] = &ds; break; | |
1016 | case 4: i.seg[i.mem_operands] = &fs; break; | |
1017 | case 5: i.seg[i.mem_operands] = &gs; break; | |
1018 | case RegFlat: i.seg[i.mem_operands] = NULL; break; | |
1019 | } | |
1020 | } | |
1021 | ||
ee86248c JB |
1022 | if (!i386_index_check (operand_string)) |
1023 | return 0; | |
1024 | ||
c48dadc9 | 1025 | i.flags[this_operand] |= Operand_Mem; |
8325cc63 JB |
1026 | if (i.mem_operands == 0) |
1027 | i.memop1_string = xstrdup (operand_string); | |
ee86248c JB |
1028 | ++i.mem_operands; |
1029 | } | |
1030 | else | |
1031 | { | |
1032 | /* Immediate. */ | |
1033 | if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) | |
1034 | { | |
1035 | as_bad (_("at most %d immediate operands are allowed"), | |
1036 | MAX_IMMEDIATE_OPERANDS); | |
1037 | return 0; | |
1038 | } | |
1039 | ||
1040 | expP = &im_expressions[i.imm_operands++]; | |
1041 | i.op[this_operand].imms = expP; | |
1042 | *expP = exp; | |
1043 | ||
1044 | return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types, | |
1045 | operand_string); | |
1046 | } | |
1047 | ||
1048 | return 1; | |
1049 | } |