binutils/
[deliverable/binutils-gdb.git] / gas / config / tc-i386.h
CommitLineData
252b5132 1/* tc-i386.h -- Header file for tc-i386.c
f7e42eb4 2 Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
4dc85607 3 2001, 2002, 2003, 2004, 2005, 2006, 2007
f7e42eb4 4 Free Software Foundation, Inc.
252b5132
RH
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
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RH
22
23#ifndef TC_I386
24#define TC_I386 1
25
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L
26#include "opcodes/i386-opc.h"
27
252b5132 28struct fix;
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RH
29
30#define TARGET_BYTES_BIG_ENDIAN 0
31
252b5132 32#define TARGET_ARCH bfd_arch_i386
b9d79e03 33#define TARGET_MACH (i386_mach ())
b7c92712 34extern unsigned long i386_mach (void);
252b5132 35
cac5b87b
DB
36#ifdef TE_FreeBSD
37#define AOUT_TARGET_FORMAT "a.out-i386-freebsd"
38#endif
252b5132 39#ifdef TE_NetBSD
4c63da97 40#define AOUT_TARGET_FORMAT "a.out-i386-netbsd"
252b5132
RH
41#endif
42#ifdef TE_386BSD
4c63da97 43#define AOUT_TARGET_FORMAT "a.out-i386-bsd"
252b5132
RH
44#endif
45#ifdef TE_LINUX
4c63da97 46#define AOUT_TARGET_FORMAT "a.out-i386-linux"
252b5132
RH
47#endif
48#ifdef TE_Mach
4c63da97 49#define AOUT_TARGET_FORMAT "a.out-mach3"
252b5132
RH
50#endif
51#ifdef TE_DYNIX
4c63da97 52#define AOUT_TARGET_FORMAT "a.out-i386-dynix"
252b5132 53#endif
4c63da97
AM
54#ifndef AOUT_TARGET_FORMAT
55#define AOUT_TARGET_FORMAT "a.out-i386"
252b5132 56#endif
252b5132 57
4ada7262
DB
58#ifdef TE_FreeBSD
59#define ELF_TARGET_FORMAT "elf32-i386-freebsd"
9d7cbccd 60#define ELF_TARGET_FORMAT64 "elf64-x86-64-freebsd"
eac338cf
PB
61#elif defined (TE_VXWORKS)
62#define ELF_TARGET_FORMAT "elf32-i386-vxworks"
4ada7262 63#endif
eac338cf 64
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DB
65#ifndef ELF_TARGET_FORMAT
66#define ELF_TARGET_FORMAT "elf32-i386"
67#endif
68
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NC
69#ifndef ELF_TARGET_FORMAT64
70#define ELF_TARGET_FORMAT64 "elf64-x86-64"
71#endif
72
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JH
73#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
74 || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF))
e3bb37b5 75extern const char *i386_target_format (void);
4c63da97
AM
76#define TARGET_FORMAT i386_target_format ()
77#else
252b5132 78#ifdef OBJ_ELF
4ada7262 79#define TARGET_FORMAT ELF_TARGET_FORMAT
252b5132 80#endif
4c63da97
AM
81#ifdef OBJ_AOUT
82#define TARGET_FORMAT AOUT_TARGET_FORMAT
252b5132
RH
83#endif
84#endif
85
a847613f
AM
86#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF))
87#define md_end i386_elf_emit_arch_note
e3bb37b5 88extern void i386_elf_emit_arch_note (void);
a847613f
AM
89#endif
90
18e1d487
AM
91#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
92
6088b00e 93#define LOCAL_LABELS_FB 1
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RH
94
95extern const char extra_symbol_chars[];
96#define tc_symbol_chars extra_symbol_chars
97
b3b91714
AM
98extern const char *i386_comment_chars;
99#define tc_comment_chars i386_comment_chars
100
252b5132
RH
101/* Prefixes will be emitted in the order defined below.
102 WAIT_PREFIX must be the first prefix since FWAIT is really is an
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L
103 instruction, and so must come before any prefixes.
104 The preferred prefix order is SEG_PREFIX, ADDR_PREFIX, DATA_PREFIX,
105 LOCKREP_PREFIX. */
252b5132 106#define WAIT_PREFIX 0
9021ec07 107#define SEG_PREFIX 1
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RH
108#define ADDR_PREFIX 2
109#define DATA_PREFIX 3
9021ec07 110#define LOCKREP_PREFIX 4
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JH
111#define REX_PREFIX 5 /* must come last. */
112#define MAX_PREFIXES 6 /* max prefixes per opcode */
252b5132
RH
113
114/* we define the syntax here (modulo base,index,scale syntax) */
115#define REGISTER_PREFIX '%'
116#define IMMEDIATE_PREFIX '$'
117#define ABSOLUTE_PREFIX '*'
118
252b5132 119/* these are the instruction mnemonic suffixes. */
252b5132
RH
120#define WORD_MNEM_SUFFIX 'w'
121#define BYTE_MNEM_SUFFIX 'b'
122#define SHORT_MNEM_SUFFIX 's'
123#define LONG_MNEM_SUFFIX 'l'
3e73aa7c 124#define QWORD_MNEM_SUFFIX 'q'
4a146fc2
L
125/* Intel Syntax. Use a non-ascii letter since since it never appears
126 in instructions. */
127#define LONG_DOUBLE_MNEM_SUFFIX '\1'
252b5132 128
252b5132
RH
129#define END_OF_INSN '\0'
130
252b5132
RH
131/*
132 'templates' is for grouping together 'template' structures for opcodes
133 of the same name. This is only used for storing the insns in the grand
134 ole hash table of insns.
135 The templates themselves start at START and range up to (but not including)
136 END.
137 */
252b5132 138typedef struct
e413e4e9 139{
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L
140 const template *start;
141 const template *end;
e413e4e9 142}
0b1cf022 143templates;
252b5132 144
4a4f25cf 145/* 386 operand encoding bytes: see 386 book for details of this. */
252b5132 146typedef struct
e413e4e9
AM
147{
148 unsigned int regmem; /* codes register or memory operand */
149 unsigned int reg; /* codes register operand (or extended opcode) */
150 unsigned int mode; /* how to interpret regmem & reg */
151}
252b5132
RH
152modrm_byte;
153
3e73aa7c 154/* x86-64 extension prefix. */
29b0f896 155typedef int rex_byte;
3e73aa7c 156
85f10a01
MM
157/* The SSE5 instructions have a two bit instruction modifier (OC) that
158 is stored in two separate bytes in the instruction. Pick apart OC
159 into the 2 separate bits for instruction. */
160#define DREX_OC0(x) (((x) & 1) != 0)
161#define DREX_OC1(x) (((x) & 2) != 0)
162
163#define DREX_OC0_MASK (1 << 3) /* set OC0 in byte 4 */
164#define DREX_OC1_MASK (1 << 2) /* set OC1 in byte 3 */
165
166/* OC mappings */
167#define DREX_XMEM_X1_X2_X2 0 /* 4 op insn, dest = src3, src1 = reg/mem */
168#define DREX_X1_XMEM_X2_X2 1 /* 4 op insn, dest = src3, src2 = reg/mem */
169#define DREX_X1_XMEM_X2_X1 2 /* 4 op insn, dest = src1, src2 = reg/mem */
170#define DREX_X1_X2_XMEM_X1 3 /* 4 op insn, dest = src1, src3 = reg/mem */
171
172#define DREX_XMEM_X1_X2 0 /* 3 op insn, src1 = reg/mem */
173#define DREX_X1_XMEM_X2 1 /* 3 op insn, src1 = reg/mem */
174
175/* Information needed to create the DREX byte in SSE5 instructions. */
176typedef struct
177{
178 unsigned int reg; /* register */
179 unsigned int rex; /* REX flags */
180 unsigned int modrm_reg; /* which arg goes in the modrm.reg field */
181 unsigned int modrm_regmem; /* which arg goes in the modrm.regmem field */
182} drex_byte;
183
4a4f25cf 184/* 386 opcode byte to code indirect addressing. */
252b5132 185typedef struct
e413e4e9
AM
186{
187 unsigned base;
188 unsigned index;
189 unsigned scale;
190}
252b5132
RH
191sib_byte;
192
9103f4f4
L
193enum processor_type
194{
195 PROCESSOR_UNKNOWN,
76bc74dc 196 PROCESSOR_I386,
9103f4f4
L
197 PROCESSOR_I486,
198 PROCESSOR_PENTIUM,
199 PROCESSOR_PENTIUMPRO,
200 PROCESSOR_PENTIUM4,
201 PROCESSOR_NOCONA,
ef05d495
L
202 PROCESSOR_CORE,
203 PROCESSOR_CORE2,
9103f4f4
L
204 PROCESSOR_K6,
205 PROCESSOR_ATHLON,
206 PROCESSOR_K8,
207 PROCESSOR_GENERIC32,
050dfa73
MM
208 PROCESSOR_GENERIC64,
209 PROCESSOR_AMDFAM10
9103f4f4
L
210};
211
212/* x86 arch names, types and features */
e413e4e9
AM
213typedef struct
214{
9103f4f4
L
215 const char *name; /* arch name */
216 enum processor_type type; /* arch type */
40fb9820 217 i386_cpu_flags flags; /* cpu feature flags */
e413e4e9
AM
218}
219arch_entry;
220
252b5132 221/* The name of the global offset table generated by the compiler. Allow
4a4f25cf 222 this to be overridden if need be. */
252b5132
RH
223#ifndef GLOBAL_OFFSET_TABLE_NAME
224#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
225#endif
226
718ddfc0 227#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (LEX_AT)
6088b00e 228#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES)
e3bb37b5 229extern void x86_cons (expressionS *, int);
d182319b 230#endif
6088b00e
AM
231
232#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_cons_fix_new(FRAG, OFF, LEN, EXP)
233extern void x86_cons_fix_new
e3bb37b5 234 (fragS *, unsigned int, unsigned int, expressionS *);
6088b00e
AM
235
236#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
237
6088b00e
AM
238#define NO_RELOC BFD_RELOC_NONE
239
e3bb37b5 240void i386_validate_fix (struct fix *);
a161fe53 241#define TC_VALIDATE_FIX(FIX,SEGTYPE,SKIP) i386_validate_fix(FIX)
6088b00e
AM
242
243#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
e3bb37b5 244extern int tc_i386_fix_adjustable (struct fix *);
6088b00e 245
55cf6793 246/* Values passed to md_apply_fix don't include the symbol value. */
a161fe53 247#define MD_APPLY_SYM_VALUE(FIX) 0
3ca4bdc3
AM
248
249/* ELF wants external syms kept, as does PE COFF. */
ae6063d4
AM
250#if defined (TE_PE) && defined (STRICT_PE_FORMAT)
251#define EXTERN_FORCE_RELOC \
3ca4bdc3
AM
252 (OUTPUT_FLAVOR == bfd_target_elf_flavour \
253 || OUTPUT_FLAVOR == bfd_target_coff_flavour)
254#else
255#define EXTERN_FORCE_RELOC \
256 (OUTPUT_FLAVOR == bfd_target_elf_flavour)
252b5132
RH
257#endif
258
a161fe53
AM
259/* This expression evaluates to true if the relocation is for a local
260 object for which we still want to do the relocation at runtime.
261 False if we are willing to perform this relocation while building
262 the .o file. GOTOFF does not need to be checked here because it is
263 not pcrel. I am not sure if some of the others are ever used with
6088b00e
AM
264 pcrel, but it is easier to be safe than sorry. */
265
a161fe53
AM
266#define TC_FORCE_RELOCATION_LOCAL(FIX) \
267 (!(FIX)->fx_pcrel \
a161fe53
AM
268 || (FIX)->fx_r_type == BFD_RELOC_386_PLT32 \
269 || (FIX)->fx_r_type == BFD_RELOC_386_GOT32 \
270 || (FIX)->fx_r_type == BFD_RELOC_386_GOTPC \
271 || TC_FORCE_RELOCATION (FIX))
6088b00e 272
4d1bb795
JB
273extern int i386_parse_name (char *, expressionS *, char *);
274#define md_parse_name(s, e, m, c) i386_parse_name (s, e, c)
252b5132 275
5a918ce7
JB
276#define md_register_arithmetic 0
277
252b5132
RH
278extern const struct relax_type md_relax_table[];
279#define TC_GENERIC_RELAX_TABLE md_relax_table
280
12b55ccc
L
281extern int optimize_align_code;
282
252b5132 283#define md_do_align(n, fill, len, max, around) \
12b55ccc
L
284if ((n) \
285 && !need_pass_2 \
286 && optimize_align_code \
287 && (!(fill) \
288 || ((char)*(fill) == (char)0x90 && (len) == 1)) \
b9e57a38 289 && subseg_text_p (now_seg)) \
252b5132 290 { \
0a9ef439 291 frag_align_code ((n), (max)); \
252b5132
RH
292 goto around; \
293 }
294
76bc74dc 295#define MAX_MEM_FOR_RS_ALIGN_CODE 31
0a9ef439 296
e3bb37b5 297extern void i386_align_code (fragS *, int);
252b5132
RH
298
299#define HANDLE_ALIGN(fragP) \
300if (fragP->fr_type == rs_align_code) \
301 i386_align_code (fragP, (fragP->fr_next->fr_address \
302 - fragP->fr_address \
303 - fragP->fr_fix));
304
e3bb37b5 305void i386_print_statistics (FILE *);
252b5132
RH
306#define tc_print_statistics i386_print_statistics
307
308#define md_number_to_chars number_to_chars_littleendian
309
310#ifdef SCO_ELF
311#define tc_init_after_args() sco_id ()
e3bb37b5 312extern void sco_id (void);
252b5132
RH
313#endif
314
b1b7d09b
AM
315#define WORKING_DOT_WORD 1
316
54cfded0 317/* We want .cfi_* pseudo-ops for generating unwind info. */
a4447b93 318#define TARGET_USE_CFIPOP 1
54cfded0 319
a4447b93
RH
320extern unsigned int x86_dwarf2_return_column;
321#define DWARF2_DEFAULT_RETURN_COLUMN x86_dwarf2_return_column
322
323extern int x86_cie_data_alignment;
324#define DWARF2_CIE_DATA_ALIGNMENT x86_cie_data_alignment
54cfded0
AM
325
326#define tc_regname_to_dw2regnum tc_x86_regname_to_dw2regnum
e3bb37b5 327extern int tc_x86_regname_to_dw2regnum (char *);
54cfded0
AM
328
329#define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions
e3bb37b5 330extern void tc_x86_frame_initial_instructions (void);
54cfded0 331
d2b2c203 332#define md_elf_section_type(str,len) i386_elf_section_type (str, len)
e3bb37b5 333extern int i386_elf_section_type (const char *, size_t);
d2b2c203 334
3b22753a 335/* Support for SHF_X86_64_LARGE */
e3bb37b5
L
336extern int x86_64_section_word (char *, size_t);
337extern int x86_64_section_letter (int, char **);
3b22753a
L
338#define md_elf_section_letter(LETTER, PTR_MSG) x86_64_section_letter (LETTER, PTR_MSG)
339#define md_elf_section_word(STR, LEN) x86_64_section_word (STR, LEN)
340
bb41ade5
AM
341#ifdef TE_PE
342
343#define O_secrel O_md1
344
345#define TC_DWARF2_EMIT_OFFSET tc_pe_dwarf2_emit_offset
346void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
347
348#endif /* TE_PE */
349
6088b00e 350#endif /* TC_I386 */
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