[deliverable/binutils-gdb.git] / gas / config / tc-i386.h

/* tc-i386.h -- Header file for tc-i386.c
   Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to
   the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#ifndef TC_I386
#define TC_I386 1

#ifdef TE_LYNX
#define TARGET_FORMAT		"coff-i386-lynx"
#endif

#ifdef BFD_ASSEMBLER
/* This is used to determine relocation types in tc-i386.c.  The first
   parameter is the current relocation type, the second one is the desired
   type.  The idea is that if the original type is already some kind of PIC
   relocation, we leave it alone, otherwise we give it the desired type */

#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
	   (X) != BFD_RELOC_386_GOTOFF && \
	   (X) != BFD_RELOC_386_GOT32 && \
	   (X) != BFD_RELOC_386_GOTPC) ? Y : X)

#define tc_fix_adjustable(X)  tc_i386_fix_adjustable(X)

/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
 * It comes up in complicated expressions such as 
 * _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
 * the regular expressions.  The fixup specified here when used at runtime 
 * implies that we should add the address of the GOT to the specified location,
 * and as a result we have simplified the expression into something we can use.
 */
#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC

/* This expression evaluates to false if the relocation is for a local object
   for which we still want to do the relocation at runtime.  True if we
   are willing to perform this relocation while building the .o file.
   This is only used for pcrel relocations, so GOTOFF does not need to be
   checked here.  I am not sure if some of the others are ever used with
   pcrel, but it is easier to be safe than sorry. */

#define TC_RELOC_RTSYM_LOC_FIXUP(FIX)  \
  ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
   && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
   && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)

#define TARGET_ARCH		bfd_arch_i386
#define TARGET_BYTES_BIG_ENDIAN	0

#ifdef OBJ_AOUT
#ifdef TE_NetBSD
#define TARGET_FORMAT		"a.out-i386-netbsd"
#endif
#ifdef TE_386BSD
#define TARGET_FORMAT		"a.out-i386-bsd"
#endif
#ifdef TE_LINUX
#define TARGET_FORMAT		"a.out-i386-linux"
#endif
#ifdef TE_Mach
#define TARGET_FORMAT		"a.out-mach3"
#endif
#ifndef TARGET_FORMAT
#define TARGET_FORMAT		"a.out-i386"
#endif
#endif /* OBJ_AOUT */

#ifdef OBJ_ELF
#define TARGET_FORMAT		"elf32-i386"
#endif

#else /* ! BFD_ASSEMBLER */

/* COFF STUFF */

#define COFF_MAGIC I386MAGIC
#define BFD_ARCH bfd_arch_i386
#define COFF_FLAGS F_AR32WR
#define TC_COUNT_RELOC(x) ((x)->fx_addsy /* ||(x)->fx_subsy||(x)->fx_offset */)
#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
extern short tc_coff_fix2rtype ();
#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
#define SUB_SEGMENT_ALIGN(SEG) 2

/* Need this for PIC relocations */
#define NEED_FX_R_TYPE

#define AOUT_MACHTYPE 100
#undef REVERSE_SORT_RELOCS

#endif /* ! BFD_ASSEMBLER */

#ifdef BFD_ASSEMBLER
#define NO_RELOC BFD_RELOC_NONE
#else
#define NO_RELOC 0
#endif
#define tc_coff_symbol_emit_hook(a)	;	/* not used */

#ifndef OBJ_AOUT
/* Local labels starts with .L */
#define LOCAL_LABEL(name) (name[0] == '.' \
		 && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
#define FAKE_LABEL_NAME ".L0\001"
#endif
#define LOCAL_LABELS_FB 1

#define tc_aout_pre_write_hook(x)	{;}	/* not used */
#define tc_crawl_symbol_chain(a)	{;}	/* not used */
#define tc_headers_hook(a)		{;}	/* not used */

#define MAX_OPERANDS 3		/* max operands per insn */
#define MAX_PREFIXES 5		/* max prefixes per opcode */
#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
#define MAX_MEMORY_OPERANDS 2	/* max memory ref per insn (lcall uses 2) */

/* we define the syntax here (modulo base,index,scale syntax) */
#define REGISTER_PREFIX '%'
#define IMMEDIATE_PREFIX '$'
#define ABSOLUTE_PREFIX '*'
#define PREFIX_SEPERATOR '/'

#define TWO_BYTE_OPCODE_ESCAPE 0x0f
#define NOP_OPCODE (char) 0x90

/* register numbers */
#define EBP_REG_NUM 5
#define ESP_REG_NUM 4

/* modrm_byte.regmem for twobyte escape */
#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
/* index_base_byte.index for no index register addressing */
#define NO_INDEX_REGISTER ESP_REG_NUM
/* index_base_byte.base for no base register addressing */
#define NO_BASE_REGISTER EBP_REG_NUM

/* these are the att as opcode suffixes, making movl --> mov, for example */
#define DWORD_OPCODE_SUFFIX 'l'
#define WORD_OPCODE_SUFFIX  'w'
#define BYTE_OPCODE_SUFFIX  'b'

/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)

#define END_OF_INSN '\0'

/*
  When an operand is read in it is classified by its type.  This type includes
  all the possible ways an operand can be used.  Thus, '%eax' is both 'register
  # 0' and 'The Accumulator'.  In our language this is expressed by OR'ing
  'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
  Operands are classified so that we can match given operand types with
  the opcode table in i386-opcode.h.
  */
#define Unknown 0x0
/* register */
#define Reg8    0x1		/* 8 bit reg */
#define Reg16   0x2		/* 16 bit reg */
#define Reg32   0x4		/* 32 bit reg */
#define Reg     (Reg8|Reg16|Reg32)	/* gen'l register */
#define WordReg (Reg16|Reg32)	/* for push/pop operands */
/* immediate */
#define Imm8    0x8		/* 8 bit immediate */
#define Imm8S	0x10		/* 8 bit immediate sign extended */
#define Imm16   0x20		/* 16 bit immediate */
#define Imm32   0x40		/* 32 bit immediate */
#define Imm1    0x80		/* 1 bit immediate */
#define ImmUnknown Imm32	/* for unknown expressions */
#define Imm     (Imm8|Imm8S|Imm16|Imm32)	/* gen'l immediate */
/* memory */
#define Disp8   0x200		/* 8 bit displacement (for jumps) */
#define Disp16  0x400		/* 16 bit displacement */
#define Disp32  0x800		/* 32 bit displacement */
#define Disp    (Disp8|Disp16|Disp32)	/* General displacement */
#define DispUnknown Disp32	/* for unknown size displacements */
#define Mem8    0x1000
#define Mem16   0x2000
#define Mem32   0x4000
#define BaseIndex 0x8000
#define Mem     (Disp|Mem8|Mem16|Mem32|BaseIndex)	/* General memory */
#define WordMem   (Mem16|Mem32|Disp|BaseIndex)
#define ByteMem   (Mem8|Disp|BaseIndex)
/* specials */
#define InOutPortReg 0x10000	/* register to hold in/out port addr = dx */
#define ShiftCount 0x20000	/* register to hold shift cound = cl */
#define Control 0x40000		/* Control register */
#define Debug   0x80000		/* Debug register */
#define Test    0x100000	/* Test register */
#define FloatReg 0x200000	/* Float register */
#define FloatAcc 0x400000	/* Float stack top %st(0) */
#define SReg2   0x800000	/* 2 bit segment register */
#define SReg3   0x1000000	/* 3 bit segment register */
#define Acc     0x2000000	/* Accumulator %al or %ax or %eax */
#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
#define JumpAbsolute 0x4000000
#define Abs8  0x08000000
#define Abs16 0x10000000
#define Abs32 0x20000000
#define Abs (Abs8|Abs16|Abs32)

#define Byte (Reg8|Imm8|Imm8S)
#define Word (Reg16|Imm16)
#define DWord (Reg32|Imm32)

#define SMALLEST_DISP_TYPE(num) \
    fits_in_signed_byte(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)

typedef struct
{
  /* instruction name sans width suffix ("mov" for movl insns) */
  char *name;

  /* how many operands */
  unsigned int operands;

  /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
  unsigned int base_opcode;

  /* extension_opcode is the 3 bit extension for group <n> insns.
     If this template has no extension opcode (the usual case) use None */
  unsigned char extension_opcode;
#define None 0xff		/* If no extension_opcode is possible. */

  /* the bits in opcode_modifier are used to generate the final opcode from
     the base_opcode.  These bits also are used to detect alternate forms of
     the same instruction */
  unsigned int opcode_modifier;

  /* opcode_modifier bits: */
#define W        0x1		/* set if operands are words or dwords */
#define D        0x2		/* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
  /* direction flag for floating insns:  MUST BE 0x400 */
#define FloatD 0x400
  /* shorthand */
#define DW (D|W)
#define ShortForm 0x10		/* register is in low 3 bits of opcode */
#define ShortFormW 0x20		/* ShortForm and W bit is 0x8 */
#define Seg2ShortForm 0x40	/* encoding of load segment reg insns */
#define Seg3ShortForm 0x80	/* fs/gs segment register insns. */
#define Jump 0x100		/* special case for jump insns. */
#define JumpInterSegment 0x200	/* special case for intersegment leaps/calls */
  /* 0x400 CANNOT BE USED since it's already used by FloatD above */
#define DONT_USE 0x400
#define NoModrm 0x800
#define Modrm 0x1000
#define imulKludge 0x2000
#define JumpByte 0x4000
#define JumpDword 0x8000
#define ReverseRegRegmem 0x10000
#define Data16 0x20000		/* needs data prefix if in 32-bit mode */
#define Data32 0x40000		/* needs data prefix if in 16-bit mode */

  /* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
     instuction comes in byte, word, and dword sizes and is encoded into
     machine code in the canonical way. */
#define COMES_IN_ALL_SIZES (W)

  /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
     source and destination operands can be reversed by setting either
     the D (for integer insns) or the FloatD (for floating insns) bit
     in base_opcode. */
#define COMES_IN_BOTH_DIRECTIONS (D|FloatD)

  /* operand_types[i] describes the type of operand i.  This is made
     by OR'ing together all of the possible type masks.  (e.g.
     'operand_types[i] = Reg|Imm' specifies that operand i can be
     either a register or an immediate operand */
  unsigned int operand_types[3];
}
template;

/*
  'templates' is for grouping together 'template' structures for opcodes
  of the same name.  This is only used for storing the insns in the grand
  ole hash table of insns.
  The templates themselves start at START and range up to (but not including)
  END.
  */
typedef struct
  {
    template *start;
    template *end;
  } templates;

/* these are for register name --> number & type hash lookup */
typedef struct
  {
    char *reg_name;
    unsigned int reg_type;
    unsigned int reg_num;
  }

reg_entry;

typedef struct
  {
    char *seg_name;
    unsigned int seg_prefix;
  }

seg_entry;

/* these are for prefix name --> prefix code hash lookup */
typedef struct
  {
    char *prefix_name;
    unsigned char prefix_code;
  }

prefix_entry;

/* 386 operand encoding bytes:  see 386 book for details of this. */
typedef struct
  {
    unsigned regmem:3;		/* codes register or memory operand */
    unsigned reg:3;		/* codes register operand (or extended opcode) */
    unsigned mode:2;		/* how to interpret regmem & reg */
  }

modrm_byte;

/* 386 opcode byte to code indirect addressing. */
typedef struct
  {
    unsigned base:3;
    unsigned index:3;
    unsigned scale:2;
  }

base_index_byte;

/* The name of the global offset table generated by the compiler. Allow
   this to be overridden if need be. */
#ifndef GLOBAL_OFFSET_TABLE_NAME
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#endif

#ifdef BFD_ASSEMBLER
void i386_validate_fix ();
#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
#endif

#endif /* TC_I386 */

#define md_operand(x)

extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table

/* end of tc-i386.h */
Commit	Line	Data
542e1629	1	/* tc-i386.h -- Header file for tc-i386.c
5767cfb7	2	Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation.
03678945	3
a39116f1	4	This file is part of GAS, the GNU Assembler.
03678945	5
a39116f1 RP	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2, or (at your option)
	9	any later version.
03678945	10
a39116f1 RP	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
03678945	15
a39116f1 RP	16	You should have received a copy of the GNU General Public License
a39116f1 RP	17	along with GAS; see the file COPYING. If not, write to
a2a5a4fa	18	the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
a39116f1	19
03678945	20	#ifndef TC_I386
fecd2382 RP	21	#define TC_I386 1
fecd2382 RP	22
03678945 KR	23	#ifdef TE_LYNX
	24	#define TARGET_FORMAT "coff-i386-lynx"
	25	#endif
	26
	27	#ifdef BFD_ASSEMBLER
	28	/* This is used to determine relocation types in tc-i386.c. The first
	29	parameter is the current relocation type, the second one is the desired
	30	type. The idea is that if the original type is already some kind of PIC
	31	relocation, we leave it alone, otherwise we give it the desired type */
	32
	33	#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
	34	(X) != BFD_RELOC_386_GOTOFF && \
	35	(X) != BFD_RELOC_386_GOT32 && \
	36	(X) != BFD_RELOC_386_GOTPC) ? Y : X)
	37
	38	#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
	39
	40	/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
	41	* It comes up in complicated expressions such as
	42	* _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
	43	* the regular expressions. The fixup specified here when used at runtime
	44	* implies that we should add the address of the GOT to the specified location,
	45	* and as a result we have simplified the expression into something we can use.
	46	*/
	47	#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC
	48
	49	/* This expression evaluates to false if the relocation is for a local object
	50	for which we still want to do the relocation at runtime. True if we
	51	are willing to perform this relocation while building the .o file.
	52	This is only used for pcrel relocations, so GOTOFF does not need to be
	53	checked here. I am not sure if some of the others are ever used with
	54	pcrel, but it is easier to be safe than sorry. */
	55
5767cfb7 ILT	56	#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
	57	((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
	58	&& (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
	59	&& (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)
03678945 KR	60
	61	#define TARGET_ARCH bfd_arch_i386
	62	#define TARGET_BYTES_BIG_ENDIAN 0
a39116f1	63
03678945 KR	64	#ifdef OBJ_AOUT
	65	#ifdef TE_NetBSD
	66	#define TARGET_FORMAT "a.out-i386-netbsd"
	67	#endif
	68	#ifdef TE_386BSD
	69	#define TARGET_FORMAT "a.out-i386-bsd"
	70	#endif
	71	#ifdef TE_LINUX
	72	#define TARGET_FORMAT "a.out-i386-linux"
	73	#endif
	74	#ifdef TE_Mach
	75	#define TARGET_FORMAT "a.out-mach3"
	76	#endif
	77	#ifndef TARGET_FORMAT
	78	#define TARGET_FORMAT "a.out-i386"
	79	#endif
	80	#endif /* OBJ_AOUT */
542e1629	81
03678945 KR	82	#ifdef OBJ_ELF
	83	#define TARGET_FORMAT "elf32-i386"
	84	#endif
	85
	86	#else /* ! BFD_ASSEMBLER */
	87
	88	/* COFF STUFF */
	89
	90	#define COFF_MAGIC I386MAGIC
	91	#define BFD_ARCH bfd_arch_i386
	92	#define COFF_FLAGS F_AR32WR
	93	#define TC_COUNT_RELOC(x) ((x)->fx_addsy /* \|\|(x)->fx_subsy\|\|(x)->fx_offset */)
	94	#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
	95	extern short tc_coff_fix2rtype ();
	96	#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
	97	extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
	98	#define SUB_SEGMENT_ALIGN(SEG) 2
	99
	100	/* Need this for PIC relocations */
	101	#define NEED_FX_R_TYPE
	102
a2a5a4fa	103	#define AOUT_MACHTYPE 100
03678945 KR	104	#undef REVERSE_SORT_RELOCS
	105
	106	#endif /* ! BFD_ASSEMBLER */
	107
	108	#ifdef BFD_ASSEMBLER
	109	#define NO_RELOC BFD_RELOC_NONE
	110	#else
	111	#define NO_RELOC 0
	112	#endif
	113	#define tc_coff_symbol_emit_hook(a) ; /* not used */
	114
	115	#ifndef OBJ_AOUT
	116	/* Local labels starts with .L */
	117	#define LOCAL_LABEL(name) (name[0] == '.' \
	118	&& (name[1] == 'L' \|\| name[1] == 'X' \|\| name[1] == '.'))
	119	#define FAKE_LABEL_NAME ".L0\001"
	120	#endif
a2a5a4fa	121	#define LOCAL_LABELS_FB 1
03678945 KR	122
	123	#define tc_aout_pre_write_hook(x) {;} /* not used */
	124	#define tc_crawl_symbol_chain(a) {;} /* not used */
	125	#define tc_headers_hook(a) {;} /* not used */
542e1629	126
fecd2382	127	#define MAX_OPERANDS 3 /* max operands per insn */
03678945 KR	128	#define MAX_PREFIXES 5 /* max prefixes per opcode */
	129	#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
	130	#define MAX_MEMORY_OPERANDS 2 /* max memory ref per insn (lcall uses 2) */
	131
542e1629	132	/* we define the syntax here (modulo base,index,scale syntax) */
fecd2382 RP	133	#define REGISTER_PREFIX '%'
	134	#define IMMEDIATE_PREFIX '$'
	135	#define ABSOLUTE_PREFIX '*'
	136	#define PREFIX_SEPERATOR '/'
03678945	137
fecd2382	138	#define TWO_BYTE_OPCODE_ESCAPE 0x0f
03678945 KR	139	#define NOP_OPCODE (char) 0x90
03678945 KR	140
542e1629	141	/* register numbers */
fecd2382 RP	142	#define EBP_REG_NUM 5
fecd2382 RP	143	#define ESP_REG_NUM 4
03678945	144
542e1629	145	/* modrm_byte.regmem for twobyte escape */
fecd2382	146	#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
542e1629	147	/* index_base_byte.index for no index register addressing */
fecd2382	148	#define NO_INDEX_REGISTER ESP_REG_NUM
542e1629	149	/* index_base_byte.base for no base register addressing */
fecd2382	150	#define NO_BASE_REGISTER EBP_REG_NUM
03678945 KR	151
03678945 KR	152	/* these are the att as opcode suffixes, making movl --> mov, for example */
fecd2382 RP	153	#define DWORD_OPCODE_SUFFIX 'l'
	154	#define WORD_OPCODE_SUFFIX 'w'
	155	#define BYTE_OPCODE_SUFFIX 'b'
03678945 KR	156
	157	/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
	158	#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
fecd2382 RP	159	#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
	160
	161	#define END_OF_INSN '\0'
	162
	163	/*
a39116f1 RP	164	When an operand is read in it is classified by its type. This type includes
	165	all the possible ways an operand can be used. Thus, '%eax' is both 'register
	166	# 0' and 'The Accumulator'. In our language this is expressed by OR'ing
	167	'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
	168	Operands are classified so that we can match given operand types with
	169	the opcode table in i386-opcode.h.
	170	*/
fecd2382 RP	171	#define Unknown 0x0
	172	/* register */
	173	#define Reg8 0x1 /* 8 bit reg */
	174	#define Reg16 0x2 /* 16 bit reg */
	175	#define Reg32 0x4 /* 32 bit reg */
03678945	176	#define Reg (Reg8\|Reg16\|Reg32) /* gen'l register */
fecd2382 RP	177	#define WordReg (Reg16\|Reg32) /* for push/pop operands */
	178	/* immediate */
	179	#define Imm8 0x8 /* 8 bit immediate */
	180	#define Imm8S 0x10 /* 8 bit immediate sign extended */
	181	#define Imm16 0x20 /* 16 bit immediate */
	182	#define Imm32 0x40 /* 32 bit immediate */
03678945	183	#define Imm1 0x80 /* 1 bit immediate */
fecd2382	184	#define ImmUnknown Imm32 /* for unknown expressions */
03678945	185	#define Imm (Imm8\|Imm8S\|Imm16\|Imm32) /* gen'l immediate */
fecd2382 RP	186	/* memory */
	187	#define Disp8 0x200 /* 8 bit displacement (for jumps) */
	188	#define Disp16 0x400 /* 16 bit displacement */
	189	#define Disp32 0x800 /* 32 bit displacement */
03678945	190	#define Disp (Disp8\|Disp16\|Disp32) /* General displacement */
fecd2382 RP	191	#define DispUnknown Disp32 /* for unknown size displacements */
	192	#define Mem8 0x1000
	193	#define Mem16 0x2000
	194	#define Mem32 0x4000
	195	#define BaseIndex 0x8000
03678945	196	#define Mem (Disp\|Mem8\|Mem16\|Mem32\|BaseIndex) /* General memory */
fecd2382 RP	197	#define WordMem (Mem16\|Mem32\|Disp\|BaseIndex)
	198	#define ByteMem (Mem8\|Disp\|BaseIndex)
	199	/* specials */
	200	#define InOutPortReg 0x10000 /* register to hold in/out port addr = dx */
	201	#define ShiftCount 0x20000 /* register to hold shift cound = cl */
	202	#define Control 0x40000 /* Control register */
	203	#define Debug 0x80000 /* Debug register */
03678945	204	#define Test 0x100000 /* Test register */
fecd2382 RP	205	#define FloatReg 0x200000 /* Float register */
fecd2382 RP	206	#define FloatAcc 0x400000 /* Float stack top %st(0) */
03678945 KR	207	#define SReg2 0x800000 /* 2 bit segment register */
	208	#define SReg3 0x1000000 /* 3 bit segment register */
	209	#define Acc 0x2000000 /* Accumulator %al or %ax or %eax */
fecd2382 RP	210	#define ImplicitRegister (InOutPortReg\|ShiftCount\|Acc\|FloatAcc)
	211	#define JumpAbsolute 0x4000000
	212	#define Abs8 0x08000000
	213	#define Abs16 0x10000000
	214	#define Abs32 0x20000000
	215	#define Abs (Abs8\|Abs16\|Abs32)
	216
fecd2382 RP	217	#define Byte (Reg8\|Imm8\|Imm8S)
	218	#define Word (Reg16\|Imm16)
	219	#define DWord (Reg32\|Imm32)
	220
fecd2382	221	#define SMALLEST_DISP_TYPE(num) \
542e1629	222	fits_in_signed_byte(num) ? (Disp8\|Disp32\|Abs8\|Abs32) : (Disp32\|Abs32)
fecd2382	223
03678945 KR	224	typedef struct
	225	{
	226	/* instruction name sans width suffix ("mov" for movl insns) */
	227	char *name;
	228
	229	/* how many operands */
	230	unsigned int operands;
	231
	232	/* base_opcode is the fundamental opcode byte with a optional prefix(es). */
	233	unsigned int base_opcode;
	234
	235	/* extension_opcode is the 3 bit extension for group <n> insns.
	236	If this template has no extension opcode (the usual case) use None */
	237	unsigned char extension_opcode;
	238	#define None 0xff /* If no extension_opcode is possible. */
	239
	240	/* the bits in opcode_modifier are used to generate the final opcode from
	241	the base_opcode. These bits also are used to detect alternate forms of
	242	the same instruction */
	243	unsigned int opcode_modifier;
	244
	245	/* opcode_modifier bits: */
	246	#define W 0x1 /* set if operands are words or dwords */
	247	#define D 0x2 /* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
	248	/* direction flag for floating insns: MUST BE 0x400 */
fecd2382	249	#define FloatD 0x400
03678945	250	/* shorthand */
fecd2382 RP	251	#define DW (D\|W)
	252	#define ShortForm 0x10 /* register is in low 3 bits of opcode */
	253	#define ShortFormW 0x20 /* ShortForm and W bit is 0x8 */
	254	#define Seg2ShortForm 0x40 /* encoding of load segment reg insns */
	255	#define Seg3ShortForm 0x80 /* fs/gs segment register insns. */
	256	#define Jump 0x100 /* special case for jump insns. */
	257	#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
03678945	258	/* 0x400 CANNOT BE USED since it's already used by FloatD above */
fecd2382 RP	259	#define DONT_USE 0x400
	260	#define NoModrm 0x800
	261	#define Modrm 0x1000
	262	#define imulKludge 0x2000
	263	#define JumpByte 0x4000
	264	#define JumpDword 0x8000
	265	#define ReverseRegRegmem 0x10000
03678945 KR	266	#define Data16 0x20000 /* needs data prefix if in 32-bit mode */
	267	#define Data32 0x40000 /* needs data prefix if in 16-bit mode */
	268
	269	/* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
	270	instuction comes in byte, word, and dword sizes and is encoded into
	271	machine code in the canonical way. */
fecd2382	272	#define COMES_IN_ALL_SIZES (W)
03678945 KR	273
	274	/* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
	275	source and destination operands can be reversed by setting either
	276	the D (for integer insns) or the FloatD (for floating insns) bit
	277	in base_opcode. */
fecd2382	278	#define COMES_IN_BOTH_DIRECTIONS (D\|FloatD)
03678945 KR	279
	280	/* operand_types[i] describes the type of operand i. This is made
	281	by OR'ing together all of the possible type masks. (e.g.
	282	'operand_types[i] = Reg\|Imm' specifies that operand i can be
	283	either a register or an immediate operand */
	284	unsigned int operand_types[3];
	285	}
	286	template;
fecd2382 RP	287
	288	/*
	289	'templates' is for grouping together 'template' structures for opcodes
	290	of the same name. This is only used for storing the insns in the grand
	291	ole hash table of insns.
	292	The templates themselves start at START and range up to (but not including)
	293	END.
a39116f1	294	*/
03678945 KR	295	typedef struct
	296	{
	297	template *start;
	298	template *end;
	299	} templates;
fecd2382 RP	300
fecd2382 RP	301	/* these are for register name --> number & type hash lookup */
03678945 KR	302	typedef struct
	303	{
	304	char *reg_name;
	305	unsigned int reg_type;
	306	unsigned int reg_num;
	307	}
	308
	309	reg_entry;
	310
	311	typedef struct
	312	{
	313	char *seg_name;
	314	unsigned int seg_prefix;
	315	}
fecd2382	316
03678945	317	seg_entry;
fecd2382 RP	318
fecd2382 RP	319	/* these are for prefix name --> prefix code hash lookup */
03678945 KR	320	typedef struct
	321	{
	322	char *prefix_name;
	323	unsigned char prefix_code;
	324	}
	325
	326	prefix_entry;
fecd2382 RP	327
fecd2382 RP	328	/* 386 operand encoding bytes: see 386 book for details of this. */
03678945 KR	329	typedef struct
	330	{
	331	unsigned regmem:3; /* codes register or memory operand */
	332	unsigned reg:3; /* codes register operand (or extended opcode) */
	333	unsigned mode:2; /* how to interpret regmem & reg */
	334	}
	335
	336	modrm_byte;
fecd2382 RP	337
fecd2382 RP	338	/* 386 opcode byte to code indirect addressing. */
03678945 KR	339	typedef struct
	340	{
	341	unsigned base:3;
	342	unsigned index:3;
	343	unsigned scale:2;
	344	}
	345
	346	base_index_byte;
	347
	348	/* The name of the global offset table generated by the compiler. Allow
	349	this to be overridden if need be. */
	350	#ifndef GLOBAL_OFFSET_TABLE_NAME
	351	#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
	352	#endif
	353
	354	#ifdef BFD_ASSEMBLER
	355	void i386_validate_fix ();
	356	#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
	357	#endif
	358
	359	#endif /* TC_I386 */
	360
	361	#define md_operand(x)
fecd2382	362
a2a5a4fa KR	363	extern const struct relax_type md_relax_table[];
	364	#define TC_GENERIC_RELAX_TABLE md_relax_table
	365
fecd2382	366	/* end of tc-i386.h */