[deliverable/binutils-gdb.git] / gas / config / tc-i386.h

/* tc-i386.h -- Header file for tc-i386.c
   Copyright (C) 1989, 92, 93, 94, 95, 96, 1997 Free Software Foundation.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to
   the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#ifndef TC_I386
#define TC_I386 1

#define TARGET_BYTES_BIG_ENDIAN	0

#ifdef TE_LYNX
#define TARGET_FORMAT		"coff-i386-lynx"
#endif

#ifdef BFD_ASSEMBLER
/* This is used to determine relocation types in tc-i386.c.  The first
   parameter is the current relocation type, the second one is the desired
   type.  The idea is that if the original type is already some kind of PIC
   relocation, we leave it alone, otherwise we give it the desired type */

#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
	   (X) != BFD_RELOC_386_GOTOFF && \
	   (X) != BFD_RELOC_386_GOT32 && \
	   (X) != BFD_RELOC_386_GOTPC) ? Y : X)

#define tc_fix_adjustable(X)  tc_i386_fix_adjustable(X)

/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
 * It comes up in complicated expressions such as 
 * _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
 * the regular expressions.  The fixup specified here when used at runtime 
 * implies that we should add the address of the GOT to the specified location,
 * and as a result we have simplified the expression into something we can use.
 */
#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC

/* This expression evaluates to false if the relocation is for a local object
   for which we still want to do the relocation at runtime.  True if we
   are willing to perform this relocation while building the .o file.
   This is only used for pcrel relocations, so GOTOFF does not need to be
   checked here.  I am not sure if some of the others are ever used with
   pcrel, but it is easier to be safe than sorry. */

#define TC_RELOC_RTSYM_LOC_FIXUP(FIX)  \
  ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
   && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
   && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)

#define TARGET_ARCH		bfd_arch_i386

#ifdef OBJ_AOUT
#ifdef TE_NetBSD
#define TARGET_FORMAT		"a.out-i386-netbsd"
#endif
#ifdef TE_386BSD
#define TARGET_FORMAT		"a.out-i386-bsd"
#endif
#ifdef TE_LINUX
#define TARGET_FORMAT		"a.out-i386-linux"
#endif
#ifdef TE_Mach
#define TARGET_FORMAT		"a.out-mach3"
#endif
#ifndef TARGET_FORMAT
#define TARGET_FORMAT		"a.out-i386"
#endif
#endif /* OBJ_AOUT */

#ifdef OBJ_ELF
#define TARGET_FORMAT		"elf32-i386"
#endif

#else /* ! BFD_ASSEMBLER */

/* COFF STUFF */

#define COFF_MAGIC I386MAGIC
#define BFD_ARCH bfd_arch_i386
#define COFF_FLAGS F_AR32WR
#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7)
#define TC_FORCE_RELOCATION(x) ((x)->fx_r_type==7)
#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
extern short tc_coff_fix2rtype ();
#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
#define SUB_SEGMENT_ALIGN(SEG) 2
#define TC_RVA_RELOC 7
/* Need this for PIC relocations */
#define NEED_FX_R_TYPE


#ifdef TE_386BSD
/* The BSDI linker apparently rejects objects with a machine type of
   M_386 (100).  */
#define AOUT_MACHTYPE 0
#else
#define AOUT_MACHTYPE 100
#endif

#undef REVERSE_SORT_RELOCS

#endif /* ! BFD_ASSEMBLER */

#ifdef BFD_ASSEMBLER
#define NO_RELOC BFD_RELOC_NONE
#else
#define NO_RELOC 0
#endif
#define tc_coff_symbol_emit_hook(a)	;	/* not used */

#ifndef OBJ_AOUT
#ifndef TE_PE
/* Local labels starts with .L */
#define LOCAL_LABEL(name) (name[0] == '.' \
		 && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
#define FAKE_LABEL_NAME ".L0\001"
#endif
#endif
#define LOCAL_LABELS_FB 1

#define tc_aout_pre_write_hook(x)	{;}	/* not used */
#define tc_crawl_symbol_chain(a)	{;}	/* not used */
#define tc_headers_hook(a)		{;}	/* not used */

#define MAX_OPERANDS 3		/* max operands per insn */
#define MAX_PREFIXES 5		/* max prefixes per opcode */
#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
#define MAX_MEMORY_OPERANDS 2	/* max memory ref per insn (lcall uses 2) */

/* we define the syntax here (modulo base,index,scale syntax) */
#define REGISTER_PREFIX '%'
#define IMMEDIATE_PREFIX '$'
#define ABSOLUTE_PREFIX '*'
#define PREFIX_SEPERATOR '/'

#define TWO_BYTE_OPCODE_ESCAPE 0x0f
#define NOP_OPCODE (char) 0x90

/* register numbers */
#define EBP_REG_NUM 5
#define ESP_REG_NUM 4

/* modrm_byte.regmem for twobyte escape */
#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
/* index_base_byte.index for no index register addressing */
#define NO_INDEX_REGISTER ESP_REG_NUM
/* index_base_byte.base for no base register addressing */
#define NO_BASE_REGISTER EBP_REG_NUM

/* these are the att as opcode suffixes, making movl --> mov, for example */
#define DWORD_OPCODE_SUFFIX 'l'
#define WORD_OPCODE_SUFFIX  'w'
#define BYTE_OPCODE_SUFFIX  'b'

/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)

#define END_OF_INSN '\0'

/*
  When an operand is read in it is classified by its type.  This type includes
  all the possible ways an operand can be used.  Thus, '%eax' is both 'register
  # 0' and 'The Accumulator'.  In our language this is expressed by OR'ing
  'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
  Operands are classified so that we can match given operand types with
  the opcode table in i386-opcode.h.
  */
#define Unknown 0x0
/* register */
#define Reg8    0x1		/* 8 bit reg */
#define Reg16   0x2		/* 16 bit reg */
#define Reg32   0x4		/* 32 bit reg */
#define Reg     (Reg8|Reg16|Reg32)	/* gen'l register */
#define WordReg (Reg16|Reg32)	/* for push/pop operands */
/* immediate */
#define Imm8    0x8		/* 8 bit immediate */
#define Imm8S	0x10		/* 8 bit immediate sign extended */
#define Imm16   0x20		/* 16 bit immediate */
#define Imm32   0x40		/* 32 bit immediate */
#define Imm1    0x80		/* 1 bit immediate */
#define ImmUnknown Imm32	/* for unknown expressions */
#define Imm     (Imm8|Imm8S|Imm16|Imm32)	/* gen'l immediate */
/* memory */
#define Disp8   0x200		/* 8 bit displacement (for jumps) */
#define Disp16  0x400		/* 16 bit displacement */
#define Disp32  0x800		/* 32 bit displacement */
#define Disp    (Disp8|Disp16|Disp32)	/* General displacement */
#define DispUnknown Disp32	/* for unknown size displacements */
#define Mem8    0x1000
#define Mem16   0x2000
#define Mem32   0x4000
#define BaseIndex 0x8000
#define Mem     (Disp|Mem8|Mem16|Mem32|BaseIndex)	/* General memory */
#define WordMem   (Mem16|Mem32|Disp|BaseIndex)
#define ByteMem   (Mem8|Disp|BaseIndex)
/* specials */
#define InOutPortReg 0x10000	/* register to hold in/out port addr = dx */
#define ShiftCount 0x20000	/* register to hold shift cound = cl */
#define Control 0x40000		/* Control register */
#define Debug   0x80000		/* Debug register */
#define Test    0x100000	/* Test register */
#define FloatReg 0x200000	/* Float register */
#define FloatAcc 0x400000	/* Float stack top %st(0) */
#define SReg2   0x800000	/* 2 bit segment register */
#define SReg3   0x1000000	/* 3 bit segment register */
#define Acc     0x2000000	/* Accumulator %al or %ax or %eax */
#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
#define JumpAbsolute 0x4000000
#define Abs8  0x08000000
#define Abs16 0x10000000
#define Abs32 0x20000000
#define Abs (Abs8|Abs16|Abs32)

#define Byte (Reg8|Imm8|Imm8S)
#define Word (Reg16|Imm16)
#define DWord (Reg32|Imm32)

#define SMALLEST_DISP_TYPE(num) \
    fits_in_signed_byte(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)

typedef struct
{
  /* instruction name sans width suffix ("mov" for movl insns) */
  char *name;

  /* how many operands */
  unsigned int operands;

  /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
  unsigned int base_opcode;

  /* extension_opcode is the 3 bit extension for group <n> insns.
     If this template has no extension opcode (the usual case) use None */
  unsigned char extension_opcode;
#define None 0xff		/* If no extension_opcode is possible. */

  /* the bits in opcode_modifier are used to generate the final opcode from
     the base_opcode.  These bits also are used to detect alternate forms of
     the same instruction */
  unsigned int opcode_modifier;

  /* opcode_modifier bits: */
#define W        0x1		/* set if operands are words or dwords */
#define D        0x2		/* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
  /* direction flag for floating insns:  MUST BE 0x400 */
#define FloatD 0x400
  /* shorthand */
#define DW (D|W)
#define ShortForm 0x10		/* register is in low 3 bits of opcode */
#define ShortFormW 0x20		/* ShortForm and W bit is 0x8 */
#define Seg2ShortForm 0x40	/* encoding of load segment reg insns */
#define Seg3ShortForm 0x80	/* fs/gs segment register insns. */
#define Jump 0x100		/* special case for jump insns. */
#define JumpInterSegment 0x200	/* special case for intersegment leaps/calls */
  /* 0x400 CANNOT BE USED since it's already used by FloatD above */
#define DONT_USE 0x400
#define NoModrm 0x800
#define Modrm 0x1000
#define imulKludge 0x2000
#define JumpByte 0x4000
#define JumpDword 0x8000
#define ReverseRegRegmem 0x10000
#define Data16 0x20000		/* needs data prefix if in 32-bit mode */
#define Data32 0x40000		/* needs data prefix if in 16-bit mode */

  /* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
     instuction comes in byte, word, and dword sizes and is encoded into
     machine code in the canonical way. */
#define COMES_IN_ALL_SIZES (W)

  /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
     source and destination operands can be reversed by setting either
     the D (for integer insns) or the FloatD (for floating insns) bit
     in base_opcode. */
#define COMES_IN_BOTH_DIRECTIONS (D|FloatD)

  /* operand_types[i] describes the type of operand i.  This is made
     by OR'ing together all of the possible type masks.  (e.g.
     'operand_types[i] = Reg|Imm' specifies that operand i can be
     either a register or an immediate operand */
  unsigned int operand_types[3];
}
template;

/*
  'templates' is for grouping together 'template' structures for opcodes
  of the same name.  This is only used for storing the insns in the grand
  ole hash table of insns.
  The templates themselves start at START and range up to (but not including)
  END.
  */
typedef struct
  {
    template *start;
    template *end;
  } templates;

/* these are for register name --> number & type hash lookup */
typedef struct
  {
    char *reg_name;
    unsigned int reg_type;
    unsigned int reg_num;
  }

reg_entry;

typedef struct
  {
    char *seg_name;
    unsigned int seg_prefix;
  }

seg_entry;

/* these are for prefix name --> prefix code hash lookup */
typedef struct
  {
    char *prefix_name;
    unsigned char prefix_code;
  }

prefix_entry;

/* 386 operand encoding bytes:  see 386 book for details of this. */
typedef struct
  {
    unsigned regmem:3;		/* codes register or memory operand */
    unsigned reg:3;		/* codes register operand (or extended opcode) */
    unsigned mode:2;		/* how to interpret regmem & reg */
  }

modrm_byte;

/* 386 opcode byte to code indirect addressing. */
typedef struct
  {
    unsigned base:3;
    unsigned index:3;
    unsigned scale:2;
  }

base_index_byte;

/* The name of the global offset table generated by the compiler. Allow
   this to be overridden if need be. */
#ifndef GLOBAL_OFFSET_TABLE_NAME
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#endif

#ifdef BFD_ASSEMBLER
void i386_validate_fix ();
#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
#endif

#endif /* TC_I386 */

#define md_operand(x)

extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table


extern int flag_16bit_code;

#define md_do_align(n, fill, len, max, around)				\
if ((n) && !need_pass_2							\
    && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1))		\
    && now_seg != data_section && now_seg != bss_section)		\
  {									\
    char *p;								\
    p = frag_var (rs_align_code, 15, 1, (relax_substateT) max,		\
		  (symbolS *) 0, (long) (n), (char *) 0);		\
    *p = 0x90;								\
    goto around;							\
  }

extern void i386_align_code PARAMS ((fragS *, int));

#define HANDLE_ALIGN(fragP)						\
if (fragP->fr_type == rs_align_code) 					\
  i386_align_code (fragP, (fragP->fr_next->fr_address			\
			   - fragP->fr_address				\
			   - fragP->fr_fix));

/* call md_apply_fix3 with segment instead of md_apply_fix */
#define MD_APPLY_FIX3

void i386_print_statistics PARAMS ((FILE *));
#define tc_print_statistics i386_print_statistics

#define md_number_to_chars number_to_chars_littleendian

#ifdef SCO_ELF
#define tc_init_after_args() sco_id ()
extern void sco_id PARAMS ((void));
#endif

/* end of tc-i386.h */
Commit	Line	Data
542e1629	1	/* tc-i386.h -- Header file for tc-i386.c
d7bf6158	2	Copyright (C) 1989, 92, 93, 94, 95, 96, 1997 Free Software Foundation.
03678945	3
a39116f1	4	This file is part of GAS, the GNU Assembler.
03678945	5
a39116f1 RP	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2, or (at your option)
	9	any later version.
03678945	10
a39116f1 RP	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
03678945	15
a39116f1 RP	16	You should have received a copy of the GNU General Public License
a39116f1 RP	17	along with GAS; see the file COPYING. If not, write to
a2a5a4fa	18	the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
a39116f1	19
03678945	20	#ifndef TC_I386
fecd2382 RP	21	#define TC_I386 1
fecd2382 RP	22
d7bf6158 ILT	23	#define TARGET_BYTES_BIG_ENDIAN 0
d7bf6158 ILT	24
03678945 KR	25	#ifdef TE_LYNX
	26	#define TARGET_FORMAT "coff-i386-lynx"
	27	#endif
	28
	29	#ifdef BFD_ASSEMBLER
	30	/* This is used to determine relocation types in tc-i386.c. The first
	31	parameter is the current relocation type, the second one is the desired
	32	type. The idea is that if the original type is already some kind of PIC
	33	relocation, we leave it alone, otherwise we give it the desired type */
	34
	35	#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
	36	(X) != BFD_RELOC_386_GOTOFF && \
	37	(X) != BFD_RELOC_386_GOT32 && \
	38	(X) != BFD_RELOC_386_GOTPC) ? Y : X)
	39
	40	#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
	41
	42	/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
	43	* It comes up in complicated expressions such as
	44	* _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
	45	* the regular expressions. The fixup specified here when used at runtime
	46	* implies that we should add the address of the GOT to the specified location,
	47	* and as a result we have simplified the expression into something we can use.
	48	*/
	49	#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC
	50
	51	/* This expression evaluates to false if the relocation is for a local object
	52	for which we still want to do the relocation at runtime. True if we
	53	are willing to perform this relocation while building the .o file.
	54	This is only used for pcrel relocations, so GOTOFF does not need to be
	55	checked here. I am not sure if some of the others are ever used with
	56	pcrel, but it is easier to be safe than sorry. */
	57
5767cfb7 ILT	58	#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
	59	((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
	60	&& (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
	61	&& (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)
03678945 KR	62
03678945 KR	63	#define TARGET_ARCH bfd_arch_i386
a39116f1	64
03678945 KR	65	#ifdef OBJ_AOUT
	66	#ifdef TE_NetBSD
	67	#define TARGET_FORMAT "a.out-i386-netbsd"
	68	#endif
	69	#ifdef TE_386BSD
	70	#define TARGET_FORMAT "a.out-i386-bsd"
	71	#endif
	72	#ifdef TE_LINUX
	73	#define TARGET_FORMAT "a.out-i386-linux"
	74	#endif
	75	#ifdef TE_Mach
	76	#define TARGET_FORMAT "a.out-mach3"
	77	#endif
	78	#ifndef TARGET_FORMAT
	79	#define TARGET_FORMAT "a.out-i386"
	80	#endif
	81	#endif /* OBJ_AOUT */
542e1629	82
03678945 KR	83	#ifdef OBJ_ELF
	84	#define TARGET_FORMAT "elf32-i386"
	85	#endif
	86
	87	#else /* ! BFD_ASSEMBLER */
	88
	89	/* COFF STUFF */
	90
	91	#define COFF_MAGIC I386MAGIC
	92	#define BFD_ARCH bfd_arch_i386
	93	#define COFF_FLAGS F_AR32WR
d7bf6158 ILT	94	#define TC_COUNT_RELOC(x) ((x)->fx_addsy \|\| (x)->fx_r_type==7)
d7bf6158 ILT	95	#define TC_FORCE_RELOCATION(x) ((x)->fx_r_type==7)
03678945 KR	96	#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
	97	extern short tc_coff_fix2rtype ();
	98	#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
	99	extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
	100	#define SUB_SEGMENT_ALIGN(SEG) 2
d7bf6158	101	#define TC_RVA_RELOC 7
03678945 KR	102	/* Need this for PIC relocations */
	103	#define NEED_FX_R_TYPE
	104
d7bf6158 ILT	105
	106	#ifdef TE_386BSD
	107	/* The BSDI linker apparently rejects objects with a machine type of
	108	M_386 (100). */
	109	#define AOUT_MACHTYPE 0
	110	#else
a2a5a4fa	111	#define AOUT_MACHTYPE 100
d7bf6158 ILT	112	#endif
d7bf6158 ILT	113
03678945 KR	114	#undef REVERSE_SORT_RELOCS
	115
	116	#endif /* ! BFD_ASSEMBLER */
	117
	118	#ifdef BFD_ASSEMBLER
	119	#define NO_RELOC BFD_RELOC_NONE
	120	#else
	121	#define NO_RELOC 0
	122	#endif
	123	#define tc_coff_symbol_emit_hook(a) ; /* not used */
	124
	125	#ifndef OBJ_AOUT
d7bf6158	126	#ifndef TE_PE
03678945 KR	127	/* Local labels starts with .L */
	128	#define LOCAL_LABEL(name) (name[0] == '.' \
	129	&& (name[1] == 'L' \|\| name[1] == 'X' \|\| name[1] == '.'))
	130	#define FAKE_LABEL_NAME ".L0\001"
	131	#endif
d7bf6158	132	#endif
a2a5a4fa	133	#define LOCAL_LABELS_FB 1
03678945 KR	134
	135	#define tc_aout_pre_write_hook(x) {;} /* not used */
	136	#define tc_crawl_symbol_chain(a) {;} /* not used */
	137	#define tc_headers_hook(a) {;} /* not used */
542e1629	138
fecd2382	139	#define MAX_OPERANDS 3 /* max operands per insn */
03678945 KR	140	#define MAX_PREFIXES 5 /* max prefixes per opcode */
	141	#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
	142	#define MAX_MEMORY_OPERANDS 2 /* max memory ref per insn (lcall uses 2) */
	143
542e1629	144	/* we define the syntax here (modulo base,index,scale syntax) */
fecd2382 RP	145	#define REGISTER_PREFIX '%'
	146	#define IMMEDIATE_PREFIX '$'
	147	#define ABSOLUTE_PREFIX '*'
	148	#define PREFIX_SEPERATOR '/'
03678945	149
fecd2382	150	#define TWO_BYTE_OPCODE_ESCAPE 0x0f
03678945 KR	151	#define NOP_OPCODE (char) 0x90
03678945 KR	152
542e1629	153	/* register numbers */
fecd2382 RP	154	#define EBP_REG_NUM 5
fecd2382 RP	155	#define ESP_REG_NUM 4
03678945	156
542e1629	157	/* modrm_byte.regmem for twobyte escape */
fecd2382	158	#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
542e1629	159	/* index_base_byte.index for no index register addressing */
fecd2382	160	#define NO_INDEX_REGISTER ESP_REG_NUM
542e1629	161	/* index_base_byte.base for no base register addressing */
fecd2382	162	#define NO_BASE_REGISTER EBP_REG_NUM
03678945 KR	163
03678945 KR	164	/* these are the att as opcode suffixes, making movl --> mov, for example */
fecd2382 RP	165	#define DWORD_OPCODE_SUFFIX 'l'
	166	#define WORD_OPCODE_SUFFIX 'w'
	167	#define BYTE_OPCODE_SUFFIX 'b'
03678945 KR	168
	169	/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
	170	#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
fecd2382 RP	171	#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
	172
	173	#define END_OF_INSN '\0'
	174
	175	/*
a39116f1 RP	176	When an operand is read in it is classified by its type. This type includes
	177	all the possible ways an operand can be used. Thus, '%eax' is both 'register
	178	# 0' and 'The Accumulator'. In our language this is expressed by OR'ing
	179	'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
	180	Operands are classified so that we can match given operand types with
	181	the opcode table in i386-opcode.h.
	182	*/
fecd2382 RP	183	#define Unknown 0x0
	184	/* register */
	185	#define Reg8 0x1 /* 8 bit reg */
	186	#define Reg16 0x2 /* 16 bit reg */
	187	#define Reg32 0x4 /* 32 bit reg */
03678945	188	#define Reg (Reg8\|Reg16\|Reg32) /* gen'l register */
fecd2382 RP	189	#define WordReg (Reg16\|Reg32) /* for push/pop operands */
	190	/* immediate */
	191	#define Imm8 0x8 /* 8 bit immediate */
	192	#define Imm8S 0x10 /* 8 bit immediate sign extended */
	193	#define Imm16 0x20 /* 16 bit immediate */
	194	#define Imm32 0x40 /* 32 bit immediate */
03678945	195	#define Imm1 0x80 /* 1 bit immediate */
fecd2382	196	#define ImmUnknown Imm32 /* for unknown expressions */
03678945	197	#define Imm (Imm8\|Imm8S\|Imm16\|Imm32) /* gen'l immediate */
fecd2382 RP	198	/* memory */
	199	#define Disp8 0x200 /* 8 bit displacement (for jumps) */
	200	#define Disp16 0x400 /* 16 bit displacement */
	201	#define Disp32 0x800 /* 32 bit displacement */
03678945	202	#define Disp (Disp8\|Disp16\|Disp32) /* General displacement */
fecd2382 RP	203	#define DispUnknown Disp32 /* for unknown size displacements */
	204	#define Mem8 0x1000
	205	#define Mem16 0x2000
	206	#define Mem32 0x4000
	207	#define BaseIndex 0x8000
03678945	208	#define Mem (Disp\|Mem8\|Mem16\|Mem32\|BaseIndex) /* General memory */
fecd2382 RP	209	#define WordMem (Mem16\|Mem32\|Disp\|BaseIndex)
	210	#define ByteMem (Mem8\|Disp\|BaseIndex)
	211	/* specials */
	212	#define InOutPortReg 0x10000 /* register to hold in/out port addr = dx */
	213	#define ShiftCount 0x20000 /* register to hold shift cound = cl */
	214	#define Control 0x40000 /* Control register */
	215	#define Debug 0x80000 /* Debug register */
03678945	216	#define Test 0x100000 /* Test register */
fecd2382 RP	217	#define FloatReg 0x200000 /* Float register */
fecd2382 RP	218	#define FloatAcc 0x400000 /* Float stack top %st(0) */
03678945 KR	219	#define SReg2 0x800000 /* 2 bit segment register */
	220	#define SReg3 0x1000000 /* 3 bit segment register */
	221	#define Acc 0x2000000 /* Accumulator %al or %ax or %eax */
fecd2382 RP	222	#define ImplicitRegister (InOutPortReg\|ShiftCount\|Acc\|FloatAcc)
	223	#define JumpAbsolute 0x4000000
	224	#define Abs8 0x08000000
	225	#define Abs16 0x10000000
	226	#define Abs32 0x20000000
	227	#define Abs (Abs8\|Abs16\|Abs32)
	228
fecd2382 RP	229	#define Byte (Reg8\|Imm8\|Imm8S)
	230	#define Word (Reg16\|Imm16)
	231	#define DWord (Reg32\|Imm32)
	232
fecd2382	233	#define SMALLEST_DISP_TYPE(num) \
542e1629	234	fits_in_signed_byte(num) ? (Disp8\|Disp32\|Abs8\|Abs32) : (Disp32\|Abs32)
fecd2382	235
03678945 KR	236	typedef struct
	237	{
	238	/* instruction name sans width suffix ("mov" for movl insns) */
	239	char *name;
	240
	241	/* how many operands */
	242	unsigned int operands;
	243
	244	/* base_opcode is the fundamental opcode byte with a optional prefix(es). */
	245	unsigned int base_opcode;
	246
	247	/* extension_opcode is the 3 bit extension for group <n> insns.
	248	If this template has no extension opcode (the usual case) use None */
	249	unsigned char extension_opcode;
	250	#define None 0xff /* If no extension_opcode is possible. */
	251
	252	/* the bits in opcode_modifier are used to generate the final opcode from
	253	the base_opcode. These bits also are used to detect alternate forms of
	254	the same instruction */
	255	unsigned int opcode_modifier;
	256
	257	/* opcode_modifier bits: */
	258	#define W 0x1 /* set if operands are words or dwords */
	259	#define D 0x2 /* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
	260	/* direction flag for floating insns: MUST BE 0x400 */
fecd2382	261	#define FloatD 0x400
03678945	262	/* shorthand */
fecd2382 RP	263	#define DW (D\|W)
	264	#define ShortForm 0x10 /* register is in low 3 bits of opcode */
	265	#define ShortFormW 0x20 /* ShortForm and W bit is 0x8 */
	266	#define Seg2ShortForm 0x40 /* encoding of load segment reg insns */
	267	#define Seg3ShortForm 0x80 /* fs/gs segment register insns. */
	268	#define Jump 0x100 /* special case for jump insns. */
	269	#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
03678945	270	/* 0x400 CANNOT BE USED since it's already used by FloatD above */
fecd2382 RP	271	#define DONT_USE 0x400
	272	#define NoModrm 0x800
	273	#define Modrm 0x1000
	274	#define imulKludge 0x2000
	275	#define JumpByte 0x4000
	276	#define JumpDword 0x8000
	277	#define ReverseRegRegmem 0x10000
03678945 KR	278	#define Data16 0x20000 /* needs data prefix if in 32-bit mode */
	279	#define Data32 0x40000 /* needs data prefix if in 16-bit mode */
	280
	281	/* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
	282	instuction comes in byte, word, and dword sizes and is encoded into
	283	machine code in the canonical way. */
fecd2382	284	#define COMES_IN_ALL_SIZES (W)
03678945 KR	285
	286	/* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
	287	source and destination operands can be reversed by setting either
	288	the D (for integer insns) or the FloatD (for floating insns) bit
	289	in base_opcode. */
fecd2382	290	#define COMES_IN_BOTH_DIRECTIONS (D\|FloatD)
03678945 KR	291
	292	/* operand_types[i] describes the type of operand i. This is made
	293	by OR'ing together all of the possible type masks. (e.g.
	294	'operand_types[i] = Reg\|Imm' specifies that operand i can be
	295	either a register or an immediate operand */
	296	unsigned int operand_types[3];
	297	}
	298	template;
fecd2382 RP	299
	300	/*
	301	'templates' is for grouping together 'template' structures for opcodes
	302	of the same name. This is only used for storing the insns in the grand
	303	ole hash table of insns.
	304	The templates themselves start at START and range up to (but not including)
	305	END.
a39116f1	306	*/
03678945 KR	307	typedef struct
	308	{
	309	template *start;
	310	template *end;
	311	} templates;
fecd2382 RP	312
fecd2382 RP	313	/* these are for register name --> number & type hash lookup */
03678945 KR	314	typedef struct
	315	{
	316	char *reg_name;
	317	unsigned int reg_type;
	318	unsigned int reg_num;
	319	}
	320
	321	reg_entry;
	322
	323	typedef struct
	324	{
	325	char *seg_name;
	326	unsigned int seg_prefix;
	327	}
fecd2382	328
03678945	329	seg_entry;
fecd2382 RP	330
fecd2382 RP	331	/* these are for prefix name --> prefix code hash lookup */
03678945 KR	332	typedef struct
	333	{
	334	char *prefix_name;
	335	unsigned char prefix_code;
	336	}
	337
	338	prefix_entry;
fecd2382 RP	339
fecd2382 RP	340	/* 386 operand encoding bytes: see 386 book for details of this. */
03678945 KR	341	typedef struct
	342	{
	343	unsigned regmem:3; /* codes register or memory operand */
	344	unsigned reg:3; /* codes register operand (or extended opcode) */
	345	unsigned mode:2; /* how to interpret regmem & reg */
	346	}
	347
	348	modrm_byte;
fecd2382 RP	349
fecd2382 RP	350	/* 386 opcode byte to code indirect addressing. */
03678945 KR	351	typedef struct
	352	{
	353	unsigned base:3;
	354	unsigned index:3;
	355	unsigned scale:2;
	356	}
	357
	358	base_index_byte;
	359
	360	/* The name of the global offset table generated by the compiler. Allow
	361	this to be overridden if need be. */
	362	#ifndef GLOBAL_OFFSET_TABLE_NAME
	363	#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
	364	#endif
	365
	366	#ifdef BFD_ASSEMBLER
	367	void i386_validate_fix ();
	368	#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
	369	#endif
	370
	371	#endif /* TC_I386 */
	372
	373	#define md_operand(x)
fecd2382	374
a2a5a4fa KR	375	extern const struct relax_type md_relax_table[];
	376	#define TC_GENERIC_RELAX_TABLE md_relax_table
	377
d7bf6158 ILT	378
	379	extern int flag_16bit_code;
	380
	381	#define md_do_align(n, fill, len, max, around) \
	382	if ((n) && !need_pass_2 \
	383	&& (!(fill) \|\| ((char)*(fill) == (char)0x90 && (len) == 1)) \
	384	&& now_seg != data_section && now_seg != bss_section) \
	385	{ \
	386	char *p; \
	387	p = frag_var (rs_align_code, 15, 1, (relax_substateT) max, \
	388	(symbolS ) 0, (long) (n), (char ) 0); \
	389	*p = 0x90; \
	390	goto around; \
	391	}
	392
	393	extern void i386_align_code PARAMS ((fragS *, int));
	394
	395	#define HANDLE_ALIGN(fragP) \
	396	if (fragP->fr_type == rs_align_code) \
	397	i386_align_code (fragP, (fragP->fr_next->fr_address \
	398	- fragP->fr_address \
	399	- fragP->fr_fix));
	400
	401	/* call md_apply_fix3 with segment instead of md_apply_fix */
	402	#define MD_APPLY_FIX3
	403
	404	void i386_print_statistics PARAMS ((FILE *));
	405	#define tc_print_statistics i386_print_statistics
	406
	407	#define md_number_to_chars number_to_chars_littleendian
	408
	409	#ifdef SCO_ELF
	410	#define tc_init_after_args() sco_id ()
	411	extern void sco_id PARAMS ((void));
	412	#endif
	413
fecd2382	414	/* end of tc-i386.h */