Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
01e1a5bc | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
45dfa85a | 3 | 2008, 2009, 2011, 2012 Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
800eeca4 JW |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
01e1a5bc NC |
53 | #include "bfdver.h" |
54 | #include <time.h> | |
800eeca4 | 55 | |
a66d2bb7 JB |
56 | #ifdef HAVE_LIMITS_H |
57 | #include <limits.h> | |
58 | #endif | |
59 | ||
800eeca4 | 60 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
61 | |
62 | /* Some systems define MIN in, e.g., param.h. */ | |
63 | #undef MIN | |
800eeca4 JW |
64 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
65 | ||
66 | #define NUM_SLOTS 4 | |
67 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
68 | #define CURR_SLOT md.slot[md.curr_slot] | |
69 | ||
70 | #define O_pseudo_fixup (O_max + 1) | |
71 | ||
72 | enum special_section | |
73 | { | |
557debba | 74 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
75 | SPECIAL_SECTION_BSS = 0, |
76 | SPECIAL_SECTION_SBSS, | |
77 | SPECIAL_SECTION_SDATA, | |
78 | SPECIAL_SECTION_RODATA, | |
79 | SPECIAL_SECTION_COMMENT, | |
80 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
81 | SPECIAL_SECTION_UNWIND_INFO, |
82 | /* HPUX specific section pseudo-ops. */ | |
83 | SPECIAL_SECTION_INIT_ARRAY, | |
84 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
85 | }; |
86 | ||
87 | enum reloc_func | |
88 | { | |
13ae64f3 JJ |
89 | FUNC_DTP_MODULE, |
90 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
91 | FUNC_FPTR_RELATIVE, |
92 | FUNC_GP_RELATIVE, | |
93 | FUNC_LT_RELATIVE, | |
fa2c7eff | 94 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 95 | FUNC_PC_RELATIVE, |
800eeca4 JW |
96 | FUNC_PLT_RELATIVE, |
97 | FUNC_SEC_RELATIVE, | |
98 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 99 | FUNC_TP_RELATIVE, |
800eeca4 JW |
100 | FUNC_LTV_RELATIVE, |
101 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
102 | FUNC_LT_DTP_MODULE, |
103 | FUNC_LT_DTP_RELATIVE, | |
104 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 105 | FUNC_IPLT_RELOC, |
9d0e8497 TG |
106 | #ifdef TE_VMS |
107 | FUNC_SLOTCOUNT_RELOC, | |
108 | #endif | |
800eeca4 JW |
109 | }; |
110 | ||
111 | enum reg_symbol | |
112 | { | |
113 | REG_GR = 0, | |
114 | REG_FR = (REG_GR + 128), | |
115 | REG_AR = (REG_FR + 128), | |
116 | REG_CR = (REG_AR + 128), | |
117 | REG_P = (REG_CR + 128), | |
118 | REG_BR = (REG_P + 64), | |
119 | REG_IP = (REG_BR + 8), | |
120 | REG_CFM, | |
121 | REG_PR, | |
122 | REG_PR_ROT, | |
123 | REG_PSR, | |
124 | REG_PSR_L, | |
125 | REG_PSR_UM, | |
126 | /* The following are pseudo-registers for use by gas only. */ | |
127 | IND_CPUID, | |
128 | IND_DBR, | |
129 | IND_DTR, | |
130 | IND_ITR, | |
131 | IND_IBR, | |
800eeca4 JW |
132 | IND_MSR, |
133 | IND_PKR, | |
134 | IND_PMC, | |
135 | IND_PMD, | |
136 | IND_RR, | |
542d6675 | 137 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
138 | REG_PSP, |
139 | REG_PRIUNAT, | |
800eeca4 JW |
140 | REG_NUM |
141 | }; | |
142 | ||
143 | enum dynreg_type | |
144 | { | |
145 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
146 | DYNREG_FR, /* dynamic floating point register */ | |
147 | DYNREG_PR, /* dynamic predicate register */ | |
148 | DYNREG_NUM_TYPES | |
149 | }; | |
150 | ||
87f8eb97 JW |
151 | enum operand_match_result |
152 | { | |
153 | OPERAND_MATCH, | |
154 | OPERAND_OUT_OF_RANGE, | |
155 | OPERAND_MISMATCH | |
156 | }; | |
157 | ||
800eeca4 JW |
158 | /* On the ia64, we can't know the address of a text label until the |
159 | instructions are packed into a bundle. To handle this, we keep | |
160 | track of the list of labels that appear in front of each | |
161 | instruction. */ | |
162 | struct label_fix | |
542d6675 KH |
163 | { |
164 | struct label_fix *next; | |
165 | struct symbol *sym; | |
07a53e5c | 166 | bfd_boolean dw2_mark_labels; |
542d6675 | 167 | }; |
800eeca4 | 168 | |
9d0e8497 TG |
169 | #ifdef TE_VMS |
170 | /* An internally used relocation. */ | |
171 | #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1) | |
172 | #endif | |
173 | ||
549f748d | 174 | /* This is the endianness of the current section. */ |
800eeca4 JW |
175 | extern int target_big_endian; |
176 | ||
549f748d JW |
177 | /* This is the default endianness. */ |
178 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
179 | ||
5a49b8ac | 180 | void (*ia64_number_to_chars) (char *, valueT, int); |
10a98291 | 181 | |
5a49b8ac AM |
182 | static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE *, int); |
183 | static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE *, int); | |
184 | ||
185 | static void (*ia64_float_to_chars) (char *, LITTLENUM_TYPE *, int); | |
10a98291 | 186 | |
35f5df7f L |
187 | static struct hash_control *alias_hash; |
188 | static struct hash_control *alias_name_hash; | |
189 | static struct hash_control *secalias_hash; | |
190 | static struct hash_control *secalias_name_hash; | |
191 | ||
2fac3d48 JB |
192 | /* List of chars besides those in app.c:symbol_chars that can start an |
193 | operand. Used to prevent the scrubber eating vital white-space. */ | |
194 | const char ia64_symbol_chars[] = "@?"; | |
195 | ||
800eeca4 JW |
196 | /* Characters which always start a comment. */ |
197 | const char comment_chars[] = ""; | |
198 | ||
199 | /* Characters which start a comment at the beginning of a line. */ | |
200 | const char line_comment_chars[] = "#"; | |
201 | ||
202 | /* Characters which may be used to separate multiple commands on a | |
203 | single line. */ | |
e4e8248d | 204 | const char line_separator_chars[] = ";{}"; |
800eeca4 JW |
205 | |
206 | /* Characters which are used to indicate an exponent in a floating | |
207 | point number. */ | |
208 | const char EXP_CHARS[] = "eE"; | |
209 | ||
210 | /* Characters which mean that a number is a floating point constant, | |
211 | as in 0d1.0. */ | |
212 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
213 | ||
542d6675 | 214 | /* ia64-specific option processing: */ |
800eeca4 | 215 | |
44f5c83a | 216 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
217 | |
218 | struct option md_longopts[] = | |
219 | { | |
c43c2cc5 JW |
220 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
221 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
222 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
223 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
224 | }; |
225 | ||
226 | size_t md_longopts_size = sizeof (md_longopts); | |
227 | ||
228 | static struct | |
229 | { | |
230 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
231 | struct hash_control *reg_hash; /* register name hash table */ | |
232 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
233 | struct hash_control *const_hash; /* constant hash table */ | |
234 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
235 | ||
800eeca4 JW |
236 | /* If X_op is != O_absent, the registername for the instruction's |
237 | qualifying predicate. If NULL, p0 is assumed for instructions | |
ad4b42b4 | 238 | that are predictable. */ |
800eeca4 JW |
239 | expressionS qp; |
240 | ||
8c2fda1d L |
241 | /* Optimize for which CPU. */ |
242 | enum | |
243 | { | |
244 | itanium1, | |
245 | itanium2 | |
246 | } tune; | |
247 | ||
91d777ee L |
248 | /* What to do when hint.b is used. */ |
249 | enum | |
250 | { | |
251 | hint_b_error, | |
252 | hint_b_warning, | |
253 | hint_b_ok | |
254 | } hint_b; | |
255 | ||
800eeca4 | 256 | unsigned int |
197865e8 | 257 | manual_bundling : 1, |
800eeca4 JW |
258 | debug_dv: 1, |
259 | detect_dv: 1, | |
260 | explicit_mode : 1, /* which mode we're in */ | |
261 | default_explicit_mode : 1, /* which mode is the default */ | |
262 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
263 | auto_align : 1, |
264 | keep_pending_output : 1; | |
800eeca4 | 265 | |
970d6792 L |
266 | /* What to do when something is wrong with unwind directives. */ |
267 | enum | |
268 | { | |
269 | unwind_check_warning, | |
270 | unwind_check_error | |
271 | } unwind_check; | |
272 | ||
800eeca4 JW |
273 | /* Each bundle consists of up to three instructions. We keep |
274 | track of four most recent instructions so we can correctly set | |
197865e8 | 275 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
276 | int curr_slot; |
277 | int num_slots_in_use; | |
278 | struct slot | |
279 | { | |
280 | unsigned int | |
281 | end_of_insn_group : 1, | |
282 | manual_bundling_on : 1, | |
196e8040 JW |
283 | manual_bundling_off : 1, |
284 | loc_directive_seen : 1; | |
800eeca4 JW |
285 | signed char user_template; /* user-selected template, if any */ |
286 | unsigned char qp_regno; /* qualifying predicate */ | |
287 | /* This duplicates a good fraction of "struct fix" but we | |
288 | can't use a "struct fix" instead since we can't call | |
289 | fix_new_exp() until we know the address of the instruction. */ | |
290 | int num_fixups; | |
291 | struct insn_fix | |
292 | { | |
293 | bfd_reloc_code_real_type code; | |
294 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
295 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
296 | expressionS expr; /* the value to be inserted */ | |
297 | } | |
298 | fixup[2]; /* at most two fixups per insn */ | |
299 | struct ia64_opcode *idesc; | |
300 | struct label_fix *label_fixups; | |
f1bcba5b | 301 | struct label_fix *tag_fixups; |
800eeca4 JW |
302 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
303 | expressionS opnd[6]; | |
304 | char *src_file; | |
305 | unsigned int src_line; | |
306 | struct dwarf2_line_info debug_line; | |
307 | } | |
308 | slot[NUM_SLOTS]; | |
309 | ||
310 | segT last_text_seg; | |
311 | ||
312 | struct dynreg | |
313 | { | |
314 | struct dynreg *next; /* next dynamic register */ | |
315 | const char *name; | |
316 | unsigned short base; /* the base register number */ | |
317 | unsigned short num_regs; /* # of registers in this set */ | |
318 | } | |
319 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
320 | ||
321 | flagword flags; /* ELF-header flags */ | |
322 | ||
323 | struct mem_offset { | |
324 | unsigned hint:1; /* is this hint currently valid? */ | |
325 | bfd_vma offset; /* mem.offset offset */ | |
326 | bfd_vma base; /* mem.offset base */ | |
327 | } mem_offset; | |
328 | ||
329 | int path; /* number of alt. entry points seen */ | |
330 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 331 | the current DV-checking block. */ |
800eeca4 | 332 | int maxpaths; /* size currently allocated for |
542d6675 | 333 | entry_labels */ |
557debba JW |
334 | |
335 | int pointer_size; /* size in bytes of a pointer */ | |
336 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
8b84be9d JB |
337 | |
338 | symbolS *indregsym[IND_RR - IND_CPUID + 1]; | |
800eeca4 JW |
339 | } |
340 | md; | |
341 | ||
f6fe78d6 JW |
342 | /* These are not const, because they are modified to MMI for non-itanium1 |
343 | targets below. */ | |
344 | /* MFI bundle of nops. */ | |
345 | static unsigned char le_nop[16] = | |
346 | { | |
347 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
348 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
349 | }; | |
350 | /* MFI bundle of nops with stop-bit. */ | |
351 | static unsigned char le_nop_stop[16] = | |
352 | { | |
353 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
354 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
355 | }; | |
356 | ||
542d6675 | 357 | /* application registers: */ |
800eeca4 | 358 | |
e0c9811a JW |
359 | #define AR_K0 0 |
360 | #define AR_K7 7 | |
361 | #define AR_RSC 16 | |
362 | #define AR_BSP 17 | |
363 | #define AR_BSPSTORE 18 | |
364 | #define AR_RNAT 19 | |
d8ca90b5 JB |
365 | #define AR_FCR 21 |
366 | #define AR_EFLAG 24 | |
367 | #define AR_CSD 25 | |
368 | #define AR_SSD 26 | |
369 | #define AR_CFLG 27 | |
370 | #define AR_FSR 28 | |
371 | #define AR_FIR 29 | |
372 | #define AR_FDR 30 | |
373 | #define AR_CCV 32 | |
e0c9811a JW |
374 | #define AR_UNAT 36 |
375 | #define AR_FPSR 40 | |
376 | #define AR_ITC 44 | |
4f8631b1 | 377 | #define AR_RUC 45 |
e0c9811a JW |
378 | #define AR_PFS 64 |
379 | #define AR_LC 65 | |
d8ca90b5 | 380 | #define AR_EC 66 |
800eeca4 JW |
381 | |
382 | static const struct | |
383 | { | |
384 | const char *name; | |
8b84be9d | 385 | unsigned int regnum; |
800eeca4 JW |
386 | } |
387 | ar[] = | |
388 | { | |
d8ca90b5 JB |
389 | {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1}, |
390 | {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3}, | |
391 | {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5}, | |
392 | {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7}, | |
393 | {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP}, | |
394 | {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT}, | |
395 | {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG}, | |
396 | {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD}, | |
397 | {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR}, | |
398 | {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR}, | |
399 | {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT}, | |
400 | {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC}, | |
4f8631b1 L |
401 | {"ar.ruc", AR_RUC}, {"ar.pfs", AR_PFS}, |
402 | {"ar.lc", AR_LC}, {"ar.ec", AR_EC}, | |
800eeca4 JW |
403 | }; |
404 | ||
d8ca90b5 JB |
405 | /* control registers: */ |
406 | ||
407 | #define CR_DCR 0 | |
408 | #define CR_ITM 1 | |
409 | #define CR_IVA 2 | |
410 | #define CR_PTA 8 | |
411 | #define CR_GPTA 9 | |
800eeca4 JW |
412 | #define CR_IPSR 16 |
413 | #define CR_ISR 17 | |
414 | #define CR_IIP 19 | |
415 | #define CR_IFA 20 | |
416 | #define CR_ITIR 21 | |
417 | #define CR_IIPA 22 | |
418 | #define CR_IFS 23 | |
419 | #define CR_IIM 24 | |
420 | #define CR_IHA 25 | |
1ca35711 L |
421 | #define CR_IIB0 26 |
422 | #define CR_IIB1 27 | |
d8ca90b5 | 423 | #define CR_LID 64 |
800eeca4 JW |
424 | #define CR_IVR 65 |
425 | #define CR_TPR 66 | |
426 | #define CR_EOI 67 | |
427 | #define CR_IRR0 68 | |
428 | #define CR_IRR3 71 | |
d8ca90b5 JB |
429 | #define CR_ITV 72 |
430 | #define CR_PMV 73 | |
431 | #define CR_CMCV 74 | |
800eeca4 JW |
432 | #define CR_LRR0 80 |
433 | #define CR_LRR1 81 | |
434 | ||
800eeca4 JW |
435 | static const struct |
436 | { | |
437 | const char *name; | |
8b84be9d | 438 | unsigned int regnum; |
800eeca4 JW |
439 | } |
440 | cr[] = | |
441 | { | |
d8ca90b5 JB |
442 | {"cr.dcr", CR_DCR}, |
443 | {"cr.itm", CR_ITM}, | |
444 | {"cr.iva", CR_IVA}, | |
445 | {"cr.pta", CR_PTA}, | |
446 | {"cr.gpta", CR_GPTA}, | |
447 | {"cr.ipsr", CR_IPSR}, | |
448 | {"cr.isr", CR_ISR}, | |
449 | {"cr.iip", CR_IIP}, | |
450 | {"cr.ifa", CR_IFA}, | |
451 | {"cr.itir", CR_ITIR}, | |
452 | {"cr.iipa", CR_IIPA}, | |
453 | {"cr.ifs", CR_IFS}, | |
454 | {"cr.iim", CR_IIM}, | |
455 | {"cr.iha", CR_IHA}, | |
1ca35711 L |
456 | {"cr.iib0", CR_IIB0}, |
457 | {"cr.iib1", CR_IIB1}, | |
d8ca90b5 JB |
458 | {"cr.lid", CR_LID}, |
459 | {"cr.ivr", CR_IVR}, | |
460 | {"cr.tpr", CR_TPR}, | |
461 | {"cr.eoi", CR_EOI}, | |
462 | {"cr.irr0", CR_IRR0}, | |
463 | {"cr.irr1", CR_IRR0 + 1}, | |
464 | {"cr.irr2", CR_IRR0 + 2}, | |
465 | {"cr.irr3", CR_IRR3}, | |
466 | {"cr.itv", CR_ITV}, | |
467 | {"cr.pmv", CR_PMV}, | |
468 | {"cr.cmcv", CR_CMCV}, | |
469 | {"cr.lrr0", CR_LRR0}, | |
470 | {"cr.lrr1", CR_LRR1} | |
800eeca4 JW |
471 | }; |
472 | ||
473 | #define PSR_MFL 4 | |
474 | #define PSR_IC 13 | |
475 | #define PSR_DFL 18 | |
476 | #define PSR_CPL 32 | |
477 | ||
478 | static const struct const_desc | |
479 | { | |
480 | const char *name; | |
481 | valueT value; | |
482 | } | |
483 | const_bits[] = | |
484 | { | |
542d6675 | 485 | /* PSR constant masks: */ |
800eeca4 JW |
486 | |
487 | /* 0: reserved */ | |
488 | {"psr.be", ((valueT) 1) << 1}, | |
489 | {"psr.up", ((valueT) 1) << 2}, | |
490 | {"psr.ac", ((valueT) 1) << 3}, | |
491 | {"psr.mfl", ((valueT) 1) << 4}, | |
492 | {"psr.mfh", ((valueT) 1) << 5}, | |
493 | /* 6-12: reserved */ | |
494 | {"psr.ic", ((valueT) 1) << 13}, | |
495 | {"psr.i", ((valueT) 1) << 14}, | |
496 | {"psr.pk", ((valueT) 1) << 15}, | |
497 | /* 16: reserved */ | |
498 | {"psr.dt", ((valueT) 1) << 17}, | |
499 | {"psr.dfl", ((valueT) 1) << 18}, | |
500 | {"psr.dfh", ((valueT) 1) << 19}, | |
501 | {"psr.sp", ((valueT) 1) << 20}, | |
502 | {"psr.pp", ((valueT) 1) << 21}, | |
503 | {"psr.di", ((valueT) 1) << 22}, | |
504 | {"psr.si", ((valueT) 1) << 23}, | |
505 | {"psr.db", ((valueT) 1) << 24}, | |
506 | {"psr.lp", ((valueT) 1) << 25}, | |
507 | {"psr.tb", ((valueT) 1) << 26}, | |
508 | {"psr.rt", ((valueT) 1) << 27}, | |
509 | /* 28-31: reserved */ | |
510 | /* 32-33: cpl (current privilege level) */ | |
511 | {"psr.is", ((valueT) 1) << 34}, | |
512 | {"psr.mc", ((valueT) 1) << 35}, | |
513 | {"psr.it", ((valueT) 1) << 36}, | |
514 | {"psr.id", ((valueT) 1) << 37}, | |
515 | {"psr.da", ((valueT) 1) << 38}, | |
516 | {"psr.dd", ((valueT) 1) << 39}, | |
517 | {"psr.ss", ((valueT) 1) << 40}, | |
518 | /* 41-42: ri (restart instruction) */ | |
519 | {"psr.ed", ((valueT) 1) << 43}, | |
520 | {"psr.bn", ((valueT) 1) << 44}, | |
521 | }; | |
522 | ||
542d6675 | 523 | /* indirect register-sets/memory: */ |
800eeca4 JW |
524 | |
525 | static const struct | |
526 | { | |
527 | const char *name; | |
8b84be9d | 528 | unsigned int regnum; |
800eeca4 JW |
529 | } |
530 | indirect_reg[] = | |
531 | { | |
532 | { "CPUID", IND_CPUID }, | |
533 | { "cpuid", IND_CPUID }, | |
534 | { "dbr", IND_DBR }, | |
535 | { "dtr", IND_DTR }, | |
536 | { "itr", IND_ITR }, | |
537 | { "ibr", IND_IBR }, | |
538 | { "msr", IND_MSR }, | |
539 | { "pkr", IND_PKR }, | |
540 | { "pmc", IND_PMC }, | |
541 | { "pmd", IND_PMD }, | |
542 | { "rr", IND_RR }, | |
543 | }; | |
544 | ||
545 | /* Pseudo functions used to indicate relocation types (these functions | |
546 | start with an at sign (@). */ | |
547 | static struct | |
548 | { | |
549 | const char *name; | |
550 | enum pseudo_type | |
551 | { | |
552 | PSEUDO_FUNC_NONE, | |
553 | PSEUDO_FUNC_RELOC, | |
554 | PSEUDO_FUNC_CONST, | |
e0c9811a | 555 | PSEUDO_FUNC_REG, |
800eeca4 JW |
556 | PSEUDO_FUNC_FLOAT |
557 | } | |
558 | type; | |
559 | union | |
560 | { | |
561 | unsigned long ival; | |
562 | symbolS *sym; | |
563 | } | |
564 | u; | |
565 | } | |
566 | pseudo_func[] = | |
567 | { | |
542d6675 | 568 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
569 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
570 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
571 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
572 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
573 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 574 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
575 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
576 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
577 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
578 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 579 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 580 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
581 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
582 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
583 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
584 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 585 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
9d0e8497 TG |
586 | #ifdef TE_VMS |
587 | { "slotcount", PSEUDO_FUNC_RELOC, { 0 } }, | |
588 | #endif | |
800eeca4 | 589 | |
542d6675 | 590 | /* mbtype4 constants: */ |
800eeca4 JW |
591 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
592 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
593 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
594 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
595 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
596 | ||
542d6675 | 597 | /* fclass constants: */ |
bf3ca999 | 598 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
599 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
600 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
601 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
602 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
603 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
604 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
605 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
606 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
607 | |
608 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 609 | |
c10d9d8f JW |
610 | /* hint constants: */ |
611 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
612 | ||
542d6675 | 613 | /* unwind-related constants: */ |
041340ad JW |
614 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
615 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
616 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
9c55345c | 617 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_GNU } }, |
041340ad JW |
618 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, |
619 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
620 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 621 | |
542d6675 | 622 | /* unwind-related registers: */ |
e0c9811a | 623 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
624 | }; |
625 | ||
542d6675 | 626 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
627 | static const bfd_vma nop[IA64_NUM_UNITS] = |
628 | { | |
629 | 0x0000000000LL, /* NIL => break 0 */ | |
630 | 0x0008000000LL, /* I-unit nop */ | |
631 | 0x0008000000LL, /* M-unit nop */ | |
632 | 0x4000000000LL, /* B-unit nop */ | |
633 | 0x0008000000LL, /* F-unit nop */ | |
5d5e6db9 | 634 | 0x0000000000LL, /* L-"unit" nop immediate */ |
800eeca4 JW |
635 | 0x0008000000LL, /* X-unit nop */ |
636 | }; | |
637 | ||
638 | /* Can't be `const' as it's passed to input routines (which have the | |
639 | habit of setting temporary sentinels. */ | |
640 | static char special_section_name[][20] = | |
641 | { | |
642 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
643 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
644 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
645 | }; |
646 | ||
647 | /* The best template for a particular sequence of up to three | |
648 | instructions: */ | |
649 | #define N IA64_NUM_TYPES | |
650 | static unsigned char best_template[N][N][N]; | |
651 | #undef N | |
652 | ||
653 | /* Resource dependencies currently in effect */ | |
654 | static struct rsrc { | |
655 | int depind; /* dependency index */ | |
656 | const struct ia64_dependency *dependency; /* actual dependency */ | |
657 | unsigned specific:1, /* is this a specific bit/regno? */ | |
658 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
659 | int index; /* specific regno/bit within dependency */ | |
660 | int note; /* optional qualifying note (0 if none) */ | |
661 | #define STATE_NONE 0 | |
662 | #define STATE_STOP 1 | |
663 | #define STATE_SRLZ 2 | |
664 | int insn_srlz; /* current insn serialization state */ | |
665 | int data_srlz; /* current data serialization state */ | |
666 | int qp_regno; /* qualifying predicate for this usage */ | |
667 | char *file; /* what file marked this dependency */ | |
2434f565 | 668 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 669 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 670 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
671 | int path; /* corresponding code entry index */ |
672 | } *regdeps = NULL; | |
673 | static int regdepslen = 0; | |
674 | static int regdepstotlen = 0; | |
675 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
676 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 677 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 678 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
679 | |
680 | /* Current state of PR mutexation */ | |
681 | static struct qpmutex { | |
682 | valueT prmask; | |
683 | int path; | |
684 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
685 | static int qp_mutexeslen = 0; | |
686 | static int qp_mutexestotlen = 0; | |
197865e8 | 687 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
688 | |
689 | /* Current state of PR implications */ | |
690 | static struct qp_imply { | |
691 | unsigned p1:6; | |
692 | unsigned p2:6; | |
693 | unsigned p2_branched:1; | |
694 | int path; | |
695 | } *qp_implies = NULL; | |
696 | static int qp_implieslen = 0; | |
697 | static int qp_impliestotlen = 0; | |
698 | ||
197865e8 KH |
699 | /* Keep track of static GR values so that indirect register usage can |
700 | sometimes be tracked. */ | |
800eeca4 JW |
701 | static struct gr { |
702 | unsigned known:1; | |
703 | int path; | |
704 | valueT value; | |
a66d2bb7 JB |
705 | } gr_values[128] = { |
706 | { | |
707 | 1, | |
708 | #ifdef INT_MAX | |
709 | INT_MAX, | |
710 | #else | |
711 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
712 | #endif | |
713 | 0 | |
714 | } | |
715 | }; | |
800eeca4 | 716 | |
9545c4ce L |
717 | /* Remember the alignment frag. */ |
718 | static fragS *align_frag; | |
719 | ||
800eeca4 JW |
720 | /* These are the routines required to output the various types of |
721 | unwind records. */ | |
722 | ||
f5a30c2e JW |
723 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
724 | frag address here so that if there is a section switch in the middle of | |
725 | a function, then instructions emitted to a different section are not | |
726 | counted. Since there may be more than one frag for a function, this | |
727 | means we also need to keep track of which frag this address belongs to | |
728 | so we can compute inter-frag distances. This also nicely solves the | |
729 | problem with nops emitted for align directives, which can't easily be | |
730 | counted, but can easily be derived from frag sizes. */ | |
731 | ||
800eeca4 JW |
732 | typedef struct unw_rec_list { |
733 | unwind_record r; | |
e0c9811a | 734 | unsigned long slot_number; |
f5a30c2e | 735 | fragS *slot_frag; |
800eeca4 JW |
736 | struct unw_rec_list *next; |
737 | } unw_rec_list; | |
738 | ||
2434f565 | 739 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 740 | |
6290819d NC |
741 | /* Linked list of saved prologue counts. A very poor |
742 | implementation of a map from label numbers to prologue counts. */ | |
743 | typedef struct label_prologue_count | |
744 | { | |
745 | struct label_prologue_count *next; | |
746 | unsigned long label_number; | |
747 | unsigned int prologue_count; | |
748 | } label_prologue_count; | |
749 | ||
5656b6b8 JB |
750 | typedef struct proc_pending |
751 | { | |
752 | symbolS *sym; | |
753 | struct proc_pending *next; | |
754 | } proc_pending; | |
755 | ||
e0c9811a JW |
756 | static struct |
757 | { | |
e0c9811a JW |
758 | /* Maintain a list of unwind entries for the current function. */ |
759 | unw_rec_list *list; | |
760 | unw_rec_list *tail; | |
800eeca4 | 761 | |
ad4b42b4 | 762 | /* Any unwind entries that should be attached to the current slot |
e0c9811a JW |
763 | that an insn is being constructed for. */ |
764 | unw_rec_list *current_entry; | |
800eeca4 | 765 | |
e0c9811a | 766 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 767 | proc_pending proc_pending; |
e0c9811a JW |
768 | symbolS *info; /* pointer to unwind info */ |
769 | symbolS *personality_routine; | |
91a2ae2a RH |
770 | segT saved_text_seg; |
771 | subsegT saved_text_subseg; | |
772 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 773 | |
e0c9811a | 774 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
775 | unsigned int prologue : 1; |
776 | unsigned int prologue_mask : 4; | |
e4e8248d | 777 | unsigned int prologue_gr : 7; |
75e09913 JB |
778 | unsigned int body : 1; |
779 | unsigned int insn : 1; | |
33d01f33 | 780 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
781 | /* Prologue counts at previous .label_state directives. */ |
782 | struct label_prologue_count * saved_prologue_counts; | |
ba825241 JB |
783 | |
784 | /* List of split up .save-s. */ | |
785 | unw_p_record *pending_saves; | |
e0c9811a | 786 | } unwind; |
800eeca4 | 787 | |
9f9a069e JW |
788 | /* The input value is a negated offset from psp, and specifies an address |
789 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
790 | must add 16 and divide by 4 to get the encoded value. */ | |
791 | ||
792 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
793 | ||
5a49b8ac | 794 | typedef void (*vbyte_func) (int, char *, char *); |
800eeca4 | 795 | |
0234cb7c | 796 | /* Forward declarations: */ |
5a49b8ac | 797 | static void dot_alias (int); |
cd42ff9c | 798 | static int parse_operand_and_eval (expressionS *, int); |
5a49b8ac AM |
799 | static void emit_one_bundle (void); |
800 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type (struct symbol *, | |
801 | bfd_reloc_code_real_type); | |
802 | static void insn_group_break (int, int, int); | |
803 | static void add_qp_mutex (valueT); | |
804 | static void add_qp_imply (int, int); | |
805 | static void clear_qp_mutex (valueT); | |
806 | static void clear_qp_implies (valueT, valueT); | |
807 | static void print_dependency (const char *, int); | |
808 | static void instruction_serialization (void); | |
809 | static void data_serialization (void); | |
810 | static void output_R3_format (vbyte_func, unw_record_type, unsigned long); | |
811 | static void output_B3_format (vbyte_func, unsigned long, unsigned long); | |
812 | static void output_B4_format (vbyte_func, unw_record_type, unsigned long); | |
813 | static void free_saved_prologue_counts (void); | |
91a2ae2a | 814 | |
652ca075 | 815 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
816 | unit (as opposed to the memory unit). */ |
817 | static int | |
652ca075 | 818 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
819 | { |
820 | reg -= REG_AR; | |
652ca075 L |
821 | return reg >= 64 && reg <= 111; |
822 | } | |
800eeca4 | 823 | |
652ca075 L |
824 | /* Determine if application register REGNUM resides only in the memory |
825 | unit (as opposed to the integer unit). */ | |
826 | static int | |
827 | ar_is_only_in_memory_unit (int reg) | |
828 | { | |
829 | reg -= REG_AR; | |
830 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
831 | } |
832 | ||
833 | /* Switch to section NAME and create section if necessary. It's | |
834 | rather ugly that we have to manipulate input_line_pointer but I | |
835 | don't see any other way to accomplish the same thing without | |
836 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
837 | static void | |
5a49b8ac | 838 | set_section (char *name) |
800eeca4 JW |
839 | { |
840 | char *saved_input_line_pointer; | |
841 | ||
842 | saved_input_line_pointer = input_line_pointer; | |
843 | input_line_pointer = name; | |
844 | obj_elf_section (0); | |
845 | input_line_pointer = saved_input_line_pointer; | |
846 | } | |
847 | ||
d61a78a7 RH |
848 | /* Map 's' to SHF_IA_64_SHORT. */ |
849 | ||
01e1a5bc | 850 | bfd_vma |
5a49b8ac | 851 | ia64_elf_section_letter (int letter, char **ptr_msg) |
d61a78a7 RH |
852 | { |
853 | if (letter == 's') | |
854 | return SHF_IA_64_SHORT; | |
711ef82f L |
855 | else if (letter == 'o') |
856 | return SHF_LINK_ORDER; | |
01e1a5bc NC |
857 | #ifdef TE_VMS |
858 | else if (letter == 'O') | |
859 | return SHF_IA_64_VMS_OVERLAID; | |
860 | else if (letter == 'g') | |
861 | return SHF_IA_64_VMS_GLOBAL; | |
862 | #endif | |
d61a78a7 | 863 | |
8f3bae45 | 864 | *ptr_msg = _("bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
711ef82f | 865 | return -1; |
d61a78a7 RH |
866 | } |
867 | ||
800eeca4 JW |
868 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
869 | ||
870 | flagword | |
5a49b8ac | 871 | ia64_elf_section_flags (flagword flags, |
01e1a5bc | 872 | bfd_vma attr, |
5a49b8ac | 873 | int type ATTRIBUTE_UNUSED) |
800eeca4 JW |
874 | { |
875 | if (attr & SHF_IA_64_SHORT) | |
876 | flags |= SEC_SMALL_DATA; | |
877 | return flags; | |
878 | } | |
879 | ||
91a2ae2a | 880 | int |
5a49b8ac | 881 | ia64_elf_section_type (const char *str, size_t len) |
91a2ae2a | 882 | { |
1cd8ff38 | 883 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 884 | |
1cd8ff38 | 885 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
886 | return SHT_PROGBITS; |
887 | ||
1cd8ff38 | 888 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
889 | return SHT_PROGBITS; |
890 | ||
1cd8ff38 | 891 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
892 | return SHT_IA_64_UNWIND; |
893 | ||
1cd8ff38 | 894 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
895 | return SHT_IA_64_UNWIND; |
896 | ||
711ef82f L |
897 | if (STREQ ("unwind")) |
898 | return SHT_IA_64_UNWIND; | |
899 | ||
91a2ae2a | 900 | return -1; |
1cd8ff38 | 901 | #undef STREQ |
91a2ae2a RH |
902 | } |
903 | ||
800eeca4 | 904 | static unsigned int |
5a49b8ac AM |
905 | set_regstack (unsigned int ins, |
906 | unsigned int locs, | |
907 | unsigned int outs, | |
908 | unsigned int rots) | |
800eeca4 | 909 | { |
542d6675 KH |
910 | /* Size of frame. */ |
911 | unsigned int sof; | |
800eeca4 JW |
912 | |
913 | sof = ins + locs + outs; | |
914 | if (sof > 96) | |
915 | { | |
ad4b42b4 | 916 | as_bad (_("Size of frame exceeds maximum of 96 registers")); |
800eeca4 JW |
917 | return 0; |
918 | } | |
919 | if (rots > sof) | |
920 | { | |
ad4b42b4 | 921 | as_warn (_("Size of rotating registers exceeds frame size")); |
800eeca4 JW |
922 | return 0; |
923 | } | |
924 | md.in.base = REG_GR + 32; | |
925 | md.loc.base = md.in.base + ins; | |
926 | md.out.base = md.loc.base + locs; | |
927 | ||
928 | md.in.num_regs = ins; | |
929 | md.loc.num_regs = locs; | |
930 | md.out.num_regs = outs; | |
931 | md.rot.num_regs = rots; | |
932 | return sof; | |
933 | } | |
934 | ||
935 | void | |
5a49b8ac | 936 | ia64_flush_insns (void) |
800eeca4 JW |
937 | { |
938 | struct label_fix *lfix; | |
939 | segT saved_seg; | |
940 | subsegT saved_subseg; | |
b44b1b85 | 941 | unw_rec_list *ptr; |
07a53e5c | 942 | bfd_boolean mark; |
800eeca4 JW |
943 | |
944 | if (!md.last_text_seg) | |
945 | return; | |
946 | ||
947 | saved_seg = now_seg; | |
948 | saved_subseg = now_subseg; | |
949 | ||
950 | subseg_set (md.last_text_seg, 0); | |
951 | ||
952 | while (md.num_slots_in_use > 0) | |
953 | emit_one_bundle (); /* force out queued instructions */ | |
954 | ||
955 | /* In case there are labels following the last instruction, resolve | |
07a53e5c RH |
956 | those now. */ |
957 | mark = FALSE; | |
800eeca4 JW |
958 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
959 | { | |
07a53e5c RH |
960 | symbol_set_value_now (lfix->sym); |
961 | mark |= lfix->dw2_mark_labels; | |
800eeca4 | 962 | } |
07a53e5c | 963 | if (mark) |
f1bcba5b | 964 | { |
07a53e5c RH |
965 | dwarf2_where (&CURR_SLOT.debug_line); |
966 | CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
967 | dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); | |
661ba50f | 968 | dwarf2_consume_line_info (); |
f1bcba5b | 969 | } |
07a53e5c RH |
970 | CURR_SLOT.label_fixups = 0; |
971 | ||
972 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) | |
973 | symbol_set_value_now (lfix->sym); | |
f1bcba5b | 974 | CURR_SLOT.tag_fixups = 0; |
800eeca4 | 975 | |
b44b1b85 | 976 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
977 | resolve those now. We only handle prologue, body, and endp directives |
978 | here. Give an error for others. */ | |
b44b1b85 JW |
979 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
980 | { | |
9c59842f | 981 | switch (ptr->r.type) |
b44b1b85 | 982 | { |
9c59842f JW |
983 | case prologue: |
984 | case prologue_gr: | |
985 | case body: | |
986 | case endp: | |
b44b1b85 JW |
987 | ptr->slot_number = (unsigned long) frag_more (0); |
988 | ptr->slot_frag = frag_now; | |
9c59842f JW |
989 | break; |
990 | ||
991 | /* Allow any record which doesn't have a "t" field (i.e., | |
992 | doesn't relate to a particular instruction). */ | |
993 | case unwabi: | |
994 | case br_gr: | |
995 | case copy_state: | |
996 | case fr_mem: | |
997 | case frgr_mem: | |
998 | case gr_gr: | |
999 | case gr_mem: | |
1000 | case label_state: | |
1001 | case rp_br: | |
1002 | case spill_base: | |
1003 | case spill_mask: | |
1004 | /* nothing */ | |
1005 | break; | |
1006 | ||
1007 | default: | |
1008 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1009 | break; | |
b44b1b85 | 1010 | } |
b44b1b85 JW |
1011 | } |
1012 | unwind.current_entry = NULL; | |
1013 | ||
800eeca4 | 1014 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1015 | |
1016 | if (md.qp.X_op == O_register) | |
ad4b42b4 | 1017 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
1018 | } |
1019 | ||
d9201763 L |
1020 | static void |
1021 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1022 | { |
1023 | char *saved_input_line_pointer = input_line_pointer; | |
1024 | ||
1025 | input_line_pointer = ""; | |
1026 | s_align_bytes (nbytes); | |
1027 | input_line_pointer = saved_input_line_pointer; | |
1028 | } | |
1029 | ||
1030 | void | |
5a49b8ac | 1031 | ia64_cons_align (int nbytes) |
800eeca4 JW |
1032 | { |
1033 | if (md.auto_align) | |
1034 | { | |
1035 | char *saved_input_line_pointer = input_line_pointer; | |
1036 | input_line_pointer = ""; | |
1037 | s_align_bytes (nbytes); | |
1038 | input_line_pointer = saved_input_line_pointer; | |
1039 | } | |
1040 | } | |
1041 | ||
2b0bc501 TG |
1042 | #ifdef TE_VMS |
1043 | ||
1044 | /* .vms_common section, symbol, size, alignment */ | |
1045 | ||
1046 | static void | |
1047 | obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED) | |
1048 | { | |
1049 | char *sec_name; | |
1050 | char *sym_name; | |
1051 | char c; | |
1052 | offsetT size; | |
1053 | offsetT cur_size; | |
1054 | offsetT temp; | |
1055 | symbolS *symbolP; | |
1056 | segT current_seg = now_seg; | |
1057 | subsegT current_subseg = now_subseg; | |
1058 | offsetT log_align; | |
1059 | ||
1060 | /* Section name. */ | |
1061 | sec_name = obj_elf_section_name (); | |
1062 | if (sec_name == NULL) | |
1063 | return; | |
1064 | ||
1065 | /* Symbol name. */ | |
1066 | SKIP_WHITESPACE (); | |
1067 | if (*input_line_pointer == ',') | |
1068 | { | |
1069 | input_line_pointer++; | |
1070 | SKIP_WHITESPACE (); | |
1071 | } | |
1072 | else | |
1073 | { | |
1074 | as_bad (_("expected ',' after section name")); | |
1075 | ignore_rest_of_line (); | |
1076 | return; | |
1077 | } | |
1078 | ||
1079 | sym_name = input_line_pointer; | |
1080 | c = get_symbol_end (); | |
1081 | ||
1082 | if (input_line_pointer == sym_name) | |
1083 | { | |
1084 | *input_line_pointer = c; | |
1085 | as_bad (_("expected symbol name")); | |
1086 | ignore_rest_of_line (); | |
1087 | return; | |
1088 | } | |
1089 | ||
1090 | symbolP = symbol_find_or_make (sym_name); | |
1091 | *input_line_pointer = c; | |
1092 | ||
1093 | if ((S_IS_DEFINED (symbolP) || symbol_equated_p (symbolP)) | |
1094 | && !S_IS_COMMON (symbolP)) | |
1095 | { | |
1096 | as_bad (_("Ignoring attempt to re-define symbol")); | |
1097 | ignore_rest_of_line (); | |
1098 | return; | |
1099 | } | |
1100 | ||
1101 | /* Symbol size. */ | |
1102 | SKIP_WHITESPACE (); | |
1103 | if (*input_line_pointer == ',') | |
1104 | { | |
1105 | input_line_pointer++; | |
1106 | SKIP_WHITESPACE (); | |
1107 | } | |
1108 | else | |
1109 | { | |
1110 | as_bad (_("expected ',' after symbol name")); | |
1111 | ignore_rest_of_line (); | |
1112 | return; | |
1113 | } | |
1114 | ||
1115 | temp = get_absolute_expression (); | |
1116 | size = temp; | |
1117 | size &= ((offsetT) 2 << (stdoutput->arch_info->bits_per_address - 1)) - 1; | |
1118 | if (temp != size) | |
1119 | { | |
1120 | as_warn (_("size (%ld) out of range, ignored"), (long) temp); | |
1121 | ignore_rest_of_line (); | |
1122 | return; | |
1123 | } | |
1124 | ||
1125 | /* Alignment. */ | |
1126 | SKIP_WHITESPACE (); | |
1127 | if (*input_line_pointer == ',') | |
1128 | { | |
1129 | input_line_pointer++; | |
1130 | SKIP_WHITESPACE (); | |
1131 | } | |
1132 | else | |
1133 | { | |
1134 | as_bad (_("expected ',' after symbol size")); | |
1135 | ignore_rest_of_line (); | |
1136 | return; | |
1137 | } | |
1138 | ||
1139 | log_align = get_absolute_expression (); | |
1140 | ||
1141 | demand_empty_rest_of_line (); | |
1142 | ||
1143 | obj_elf_change_section | |
1144 | (sec_name, SHT_NOBITS, | |
1145 | SHF_ALLOC | SHF_WRITE | SHF_IA_64_VMS_OVERLAID | SHF_IA_64_VMS_GLOBAL, | |
1146 | 0, NULL, 1, 0); | |
1147 | ||
1148 | S_SET_VALUE (symbolP, 0); | |
1149 | S_SET_SIZE (symbolP, size); | |
1150 | S_SET_EXTERNAL (symbolP); | |
1151 | S_SET_SEGMENT (symbolP, now_seg); | |
1152 | ||
1153 | symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT; | |
1154 | ||
1155 | record_alignment (now_seg, log_align); | |
1156 | ||
1157 | cur_size = bfd_section_size (stdoutput, now_seg); | |
1158 | if ((int) size > cur_size) | |
1159 | { | |
1160 | char *pfrag | |
1161 | = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, | |
1162 | (valueT)size - (valueT)cur_size, NULL); | |
1163 | *pfrag = 0; | |
1164 | bfd_section_size (stdoutput, now_seg) = size; | |
1165 | } | |
1166 | ||
1167 | /* Switch back to current segment. */ | |
1168 | subseg_set (current_seg, current_subseg); | |
1169 | ||
1170 | #ifdef md_elf_section_change_hook | |
1171 | md_elf_section_change_hook (); | |
1172 | #endif | |
1173 | } | |
1174 | ||
1175 | #endif /* TE_VMS */ | |
1176 | ||
800eeca4 | 1177 | /* Output COUNT bytes to a memory location. */ |
2132e3a3 | 1178 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1179 | |
5a49b8ac AM |
1180 | static void |
1181 | output_vbyte_mem (int count, char *ptr, char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1182 | { |
1183 | int x; | |
1184 | if (vbyte_mem_ptr == NULL) | |
1185 | abort (); | |
1186 | ||
1187 | if (count == 0) | |
1188 | return; | |
1189 | for (x = 0; x < count; x++) | |
1190 | *(vbyte_mem_ptr++) = ptr[x]; | |
1191 | } | |
1192 | ||
1193 | /* Count the number of bytes required for records. */ | |
1194 | static int vbyte_count = 0; | |
5a49b8ac AM |
1195 | static void |
1196 | count_output (int count, | |
1197 | char *ptr ATTRIBUTE_UNUSED, | |
1198 | char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1199 | { |
1200 | vbyte_count += count; | |
1201 | } | |
1202 | ||
1203 | static void | |
5a49b8ac | 1204 | output_R1_format (vbyte_func f, unw_record_type rtype, int rlen) |
800eeca4 | 1205 | { |
e0c9811a | 1206 | int r = 0; |
800eeca4 JW |
1207 | char byte; |
1208 | if (rlen > 0x1f) | |
1209 | { | |
1210 | output_R3_format (f, rtype, rlen); | |
1211 | return; | |
1212 | } | |
197865e8 | 1213 | |
e0c9811a JW |
1214 | if (rtype == body) |
1215 | r = 1; | |
1216 | else if (rtype != prologue) | |
ad4b42b4 | 1217 | as_bad (_("record type is not valid")); |
e0c9811a | 1218 | |
800eeca4 JW |
1219 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1220 | (*f) (1, &byte, NULL); | |
1221 | } | |
1222 | ||
1223 | static void | |
5a49b8ac | 1224 | output_R2_format (vbyte_func f, int mask, int grsave, unsigned long rlen) |
800eeca4 JW |
1225 | { |
1226 | char bytes[20]; | |
1227 | int count = 2; | |
1228 | mask = (mask & 0x0f); | |
1229 | grsave = (grsave & 0x7f); | |
1230 | ||
1231 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1232 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1233 | count += output_leb128 (bytes + 2, rlen, 0); | |
1234 | (*f) (count, bytes, NULL); | |
1235 | } | |
1236 | ||
1237 | static void | |
5a49b8ac | 1238 | output_R3_format (vbyte_func f, unw_record_type rtype, unsigned long rlen) |
800eeca4 | 1239 | { |
e0c9811a | 1240 | int r = 0, count; |
800eeca4 JW |
1241 | char bytes[20]; |
1242 | if (rlen <= 0x1f) | |
1243 | { | |
1244 | output_R1_format (f, rtype, rlen); | |
1245 | return; | |
1246 | } | |
197865e8 | 1247 | |
e0c9811a JW |
1248 | if (rtype == body) |
1249 | r = 1; | |
1250 | else if (rtype != prologue) | |
ad4b42b4 | 1251 | as_bad (_("record type is not valid")); |
800eeca4 JW |
1252 | bytes[0] = (UNW_R3 | r); |
1253 | count = output_leb128 (bytes + 1, rlen, 0); | |
1254 | (*f) (count + 1, bytes, NULL); | |
1255 | } | |
1256 | ||
1257 | static void | |
5a49b8ac | 1258 | output_P1_format (vbyte_func f, int brmask) |
800eeca4 JW |
1259 | { |
1260 | char byte; | |
1261 | byte = UNW_P1 | (brmask & 0x1f); | |
1262 | (*f) (1, &byte, NULL); | |
1263 | } | |
1264 | ||
1265 | static void | |
5a49b8ac | 1266 | output_P2_format (vbyte_func f, int brmask, int gr) |
800eeca4 JW |
1267 | { |
1268 | char bytes[2]; | |
1269 | brmask = (brmask & 0x1f); | |
1270 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1271 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1272 | (*f) (2, bytes, NULL); | |
1273 | } | |
1274 | ||
1275 | static void | |
5a49b8ac | 1276 | output_P3_format (vbyte_func f, unw_record_type rtype, int reg) |
800eeca4 JW |
1277 | { |
1278 | char bytes[2]; | |
e0c9811a | 1279 | int r = 0; |
800eeca4 JW |
1280 | reg = (reg & 0x7f); |
1281 | switch (rtype) | |
542d6675 | 1282 | { |
800eeca4 JW |
1283 | case psp_gr: |
1284 | r = 0; | |
1285 | break; | |
1286 | case rp_gr: | |
1287 | r = 1; | |
1288 | break; | |
1289 | case pfs_gr: | |
1290 | r = 2; | |
1291 | break; | |
1292 | case preds_gr: | |
1293 | r = 3; | |
1294 | break; | |
1295 | case unat_gr: | |
1296 | r = 4; | |
1297 | break; | |
1298 | case lc_gr: | |
1299 | r = 5; | |
1300 | break; | |
1301 | case rp_br: | |
1302 | r = 6; | |
1303 | break; | |
1304 | case rnat_gr: | |
1305 | r = 7; | |
1306 | break; | |
1307 | case bsp_gr: | |
1308 | r = 8; | |
1309 | break; | |
1310 | case bspstore_gr: | |
1311 | r = 9; | |
1312 | break; | |
1313 | case fpsr_gr: | |
1314 | r = 10; | |
1315 | break; | |
1316 | case priunat_gr: | |
1317 | r = 11; | |
1318 | break; | |
1319 | default: | |
ad4b42b4 | 1320 | as_bad (_("Invalid record type for P3 format.")); |
542d6675 | 1321 | } |
800eeca4 JW |
1322 | bytes[0] = (UNW_P3 | (r >> 1)); |
1323 | bytes[1] = (((r & 1) << 7) | reg); | |
1324 | (*f) (2, bytes, NULL); | |
1325 | } | |
1326 | ||
800eeca4 | 1327 | static void |
5a49b8ac | 1328 | output_P4_format (vbyte_func f, unsigned char *imask, unsigned long imask_size) |
800eeca4 | 1329 | { |
e0c9811a | 1330 | imask[0] = UNW_P4; |
2132e3a3 | 1331 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1332 | } |
1333 | ||
1334 | static void | |
5a49b8ac | 1335 | output_P5_format (vbyte_func f, int grmask, unsigned long frmask) |
800eeca4 JW |
1336 | { |
1337 | char bytes[4]; | |
1338 | grmask = (grmask & 0x0f); | |
1339 | ||
1340 | bytes[0] = UNW_P5; | |
1341 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1342 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1343 | bytes[3] = (frmask & 0x000000ff); | |
1344 | (*f) (4, bytes, NULL); | |
1345 | } | |
1346 | ||
1347 | static void | |
5a49b8ac | 1348 | output_P6_format (vbyte_func f, unw_record_type rtype, int rmask) |
800eeca4 JW |
1349 | { |
1350 | char byte; | |
e0c9811a | 1351 | int r = 0; |
197865e8 | 1352 | |
e0c9811a JW |
1353 | if (rtype == gr_mem) |
1354 | r = 1; | |
1355 | else if (rtype != fr_mem) | |
ad4b42b4 | 1356 | as_bad (_("Invalid record type for format P6")); |
800eeca4 JW |
1357 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1358 | (*f) (1, &byte, NULL); | |
1359 | } | |
1360 | ||
1361 | static void | |
5a49b8ac AM |
1362 | output_P7_format (vbyte_func f, |
1363 | unw_record_type rtype, | |
1364 | unsigned long w1, | |
1365 | unsigned long w2) | |
800eeca4 JW |
1366 | { |
1367 | char bytes[20]; | |
1368 | int count = 1; | |
e0c9811a | 1369 | int r = 0; |
800eeca4 JW |
1370 | count += output_leb128 (bytes + 1, w1, 0); |
1371 | switch (rtype) | |
1372 | { | |
542d6675 KH |
1373 | case mem_stack_f: |
1374 | r = 0; | |
1375 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1376 | break; | |
1377 | case mem_stack_v: | |
1378 | r = 1; | |
1379 | break; | |
1380 | case spill_base: | |
1381 | r = 2; | |
1382 | break; | |
1383 | case psp_sprel: | |
1384 | r = 3; | |
1385 | break; | |
1386 | case rp_when: | |
1387 | r = 4; | |
1388 | break; | |
1389 | case rp_psprel: | |
1390 | r = 5; | |
1391 | break; | |
1392 | case pfs_when: | |
1393 | r = 6; | |
1394 | break; | |
1395 | case pfs_psprel: | |
1396 | r = 7; | |
1397 | break; | |
1398 | case preds_when: | |
1399 | r = 8; | |
1400 | break; | |
1401 | case preds_psprel: | |
1402 | r = 9; | |
1403 | break; | |
1404 | case lc_when: | |
1405 | r = 10; | |
1406 | break; | |
1407 | case lc_psprel: | |
1408 | r = 11; | |
1409 | break; | |
1410 | case unat_when: | |
1411 | r = 12; | |
1412 | break; | |
1413 | case unat_psprel: | |
1414 | r = 13; | |
1415 | break; | |
1416 | case fpsr_when: | |
1417 | r = 14; | |
1418 | break; | |
1419 | case fpsr_psprel: | |
1420 | r = 15; | |
1421 | break; | |
1422 | default: | |
1423 | break; | |
800eeca4 JW |
1424 | } |
1425 | bytes[0] = (UNW_P7 | r); | |
1426 | (*f) (count, bytes, NULL); | |
1427 | } | |
1428 | ||
1429 | static void | |
5a49b8ac | 1430 | output_P8_format (vbyte_func f, unw_record_type rtype, unsigned long t) |
800eeca4 JW |
1431 | { |
1432 | char bytes[20]; | |
e0c9811a | 1433 | int r = 0; |
800eeca4 JW |
1434 | int count = 2; |
1435 | bytes[0] = UNW_P8; | |
1436 | switch (rtype) | |
1437 | { | |
542d6675 KH |
1438 | case rp_sprel: |
1439 | r = 1; | |
1440 | break; | |
1441 | case pfs_sprel: | |
1442 | r = 2; | |
1443 | break; | |
1444 | case preds_sprel: | |
1445 | r = 3; | |
1446 | break; | |
1447 | case lc_sprel: | |
1448 | r = 4; | |
1449 | break; | |
1450 | case unat_sprel: | |
1451 | r = 5; | |
1452 | break; | |
1453 | case fpsr_sprel: | |
1454 | r = 6; | |
1455 | break; | |
1456 | case bsp_when: | |
1457 | r = 7; | |
1458 | break; | |
1459 | case bsp_psprel: | |
1460 | r = 8; | |
1461 | break; | |
1462 | case bsp_sprel: | |
1463 | r = 9; | |
1464 | break; | |
1465 | case bspstore_when: | |
1466 | r = 10; | |
1467 | break; | |
1468 | case bspstore_psprel: | |
1469 | r = 11; | |
1470 | break; | |
1471 | case bspstore_sprel: | |
1472 | r = 12; | |
1473 | break; | |
1474 | case rnat_when: | |
1475 | r = 13; | |
1476 | break; | |
1477 | case rnat_psprel: | |
1478 | r = 14; | |
1479 | break; | |
1480 | case rnat_sprel: | |
1481 | r = 15; | |
1482 | break; | |
1483 | case priunat_when_gr: | |
1484 | r = 16; | |
1485 | break; | |
1486 | case priunat_psprel: | |
1487 | r = 17; | |
1488 | break; | |
1489 | case priunat_sprel: | |
1490 | r = 18; | |
1491 | break; | |
1492 | case priunat_when_mem: | |
1493 | r = 19; | |
1494 | break; | |
1495 | default: | |
1496 | break; | |
800eeca4 JW |
1497 | } |
1498 | bytes[1] = r; | |
1499 | count += output_leb128 (bytes + 2, t, 0); | |
1500 | (*f) (count, bytes, NULL); | |
1501 | } | |
1502 | ||
1503 | static void | |
5a49b8ac | 1504 | output_P9_format (vbyte_func f, int grmask, int gr) |
800eeca4 JW |
1505 | { |
1506 | char bytes[3]; | |
1507 | bytes[0] = UNW_P9; | |
1508 | bytes[1] = (grmask & 0x0f); | |
1509 | bytes[2] = (gr & 0x7f); | |
1510 | (*f) (3, bytes, NULL); | |
1511 | } | |
1512 | ||
1513 | static void | |
5a49b8ac | 1514 | output_P10_format (vbyte_func f, int abi, int context) |
800eeca4 JW |
1515 | { |
1516 | char bytes[3]; | |
1517 | bytes[0] = UNW_P10; | |
1518 | bytes[1] = (abi & 0xff); | |
1519 | bytes[2] = (context & 0xff); | |
1520 | (*f) (3, bytes, NULL); | |
1521 | } | |
1522 | ||
1523 | static void | |
5a49b8ac | 1524 | output_B1_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1525 | { |
1526 | char byte; | |
e0c9811a | 1527 | int r = 0; |
197865e8 | 1528 | if (label > 0x1f) |
800eeca4 JW |
1529 | { |
1530 | output_B4_format (f, rtype, label); | |
1531 | return; | |
1532 | } | |
e0c9811a JW |
1533 | if (rtype == copy_state) |
1534 | r = 1; | |
1535 | else if (rtype != label_state) | |
ad4b42b4 | 1536 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1537 | |
1538 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1539 | (*f) (1, &byte, NULL); | |
1540 | } | |
1541 | ||
1542 | static void | |
5a49b8ac | 1543 | output_B2_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1544 | { |
1545 | char bytes[20]; | |
1546 | int count = 1; | |
1547 | if (ecount > 0x1f) | |
1548 | { | |
1549 | output_B3_format (f, ecount, t); | |
1550 | return; | |
1551 | } | |
1552 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1553 | count += output_leb128 (bytes + 1, t, 0); | |
1554 | (*f) (count, bytes, NULL); | |
1555 | } | |
1556 | ||
1557 | static void | |
5a49b8ac | 1558 | output_B3_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1559 | { |
1560 | char bytes[20]; | |
1561 | int count = 1; | |
1562 | if (ecount <= 0x1f) | |
1563 | { | |
1564 | output_B2_format (f, ecount, t); | |
1565 | return; | |
1566 | } | |
1567 | bytes[0] = UNW_B3; | |
1568 | count += output_leb128 (bytes + 1, t, 0); | |
1569 | count += output_leb128 (bytes + count, ecount, 0); | |
1570 | (*f) (count, bytes, NULL); | |
1571 | } | |
1572 | ||
1573 | static void | |
5a49b8ac | 1574 | output_B4_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1575 | { |
1576 | char bytes[20]; | |
e0c9811a | 1577 | int r = 0; |
800eeca4 | 1578 | int count = 1; |
197865e8 | 1579 | if (label <= 0x1f) |
800eeca4 JW |
1580 | { |
1581 | output_B1_format (f, rtype, label); | |
1582 | return; | |
1583 | } | |
197865e8 | 1584 | |
e0c9811a JW |
1585 | if (rtype == copy_state) |
1586 | r = 1; | |
1587 | else if (rtype != label_state) | |
ad4b42b4 | 1588 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1589 | |
1590 | bytes[0] = (UNW_B4 | (r << 3)); | |
1591 | count += output_leb128 (bytes + 1, label, 0); | |
1592 | (*f) (count, bytes, NULL); | |
1593 | } | |
1594 | ||
1595 | static char | |
5a49b8ac | 1596 | format_ab_reg (int ab, int reg) |
800eeca4 JW |
1597 | { |
1598 | int ret; | |
e0c9811a | 1599 | ab = (ab & 3); |
800eeca4 | 1600 | reg = (reg & 0x1f); |
e0c9811a | 1601 | ret = (ab << 5) | reg; |
800eeca4 JW |
1602 | return ret; |
1603 | } | |
1604 | ||
1605 | static void | |
5a49b8ac AM |
1606 | output_X1_format (vbyte_func f, |
1607 | unw_record_type rtype, | |
1608 | int ab, | |
1609 | int reg, | |
1610 | unsigned long t, | |
1611 | unsigned long w1) | |
800eeca4 JW |
1612 | { |
1613 | char bytes[20]; | |
e0c9811a | 1614 | int r = 0; |
800eeca4 JW |
1615 | int count = 2; |
1616 | bytes[0] = UNW_X1; | |
197865e8 | 1617 | |
e0c9811a JW |
1618 | if (rtype == spill_sprel) |
1619 | r = 1; | |
1620 | else if (rtype != spill_psprel) | |
ad4b42b4 | 1621 | as_bad (_("Invalid record type for format X1")); |
e0c9811a | 1622 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1623 | count += output_leb128 (bytes + 2, t, 0); |
1624 | count += output_leb128 (bytes + count, w1, 0); | |
1625 | (*f) (count, bytes, NULL); | |
1626 | } | |
1627 | ||
1628 | static void | |
5a49b8ac AM |
1629 | output_X2_format (vbyte_func f, |
1630 | int ab, | |
1631 | int reg, | |
1632 | int x, | |
1633 | int y, | |
1634 | int treg, | |
1635 | unsigned long t) | |
800eeca4 JW |
1636 | { |
1637 | char bytes[20]; | |
800eeca4 JW |
1638 | int count = 3; |
1639 | bytes[0] = UNW_X2; | |
e0c9811a | 1640 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1641 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1642 | count += output_leb128 (bytes + 3, t, 0); | |
1643 | (*f) (count, bytes, NULL); | |
1644 | } | |
1645 | ||
1646 | static void | |
5a49b8ac AM |
1647 | output_X3_format (vbyte_func f, |
1648 | unw_record_type rtype, | |
1649 | int qp, | |
1650 | int ab, | |
1651 | int reg, | |
1652 | unsigned long t, | |
1653 | unsigned long w1) | |
800eeca4 JW |
1654 | { |
1655 | char bytes[20]; | |
e0c9811a | 1656 | int r = 0; |
800eeca4 | 1657 | int count = 3; |
e0c9811a JW |
1658 | bytes[0] = UNW_X3; |
1659 | ||
1660 | if (rtype == spill_sprel_p) | |
1661 | r = 1; | |
1662 | else if (rtype != spill_psprel_p) | |
ad4b42b4 | 1663 | as_bad (_("Invalid record type for format X3")); |
800eeca4 | 1664 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1665 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1666 | count += output_leb128 (bytes + 3, t, 0); |
1667 | count += output_leb128 (bytes + count, w1, 0); | |
1668 | (*f) (count, bytes, NULL); | |
1669 | } | |
1670 | ||
1671 | static void | |
5a49b8ac AM |
1672 | output_X4_format (vbyte_func f, |
1673 | int qp, | |
1674 | int ab, | |
1675 | int reg, | |
1676 | int x, | |
1677 | int y, | |
1678 | int treg, | |
1679 | unsigned long t) | |
800eeca4 JW |
1680 | { |
1681 | char bytes[20]; | |
800eeca4 | 1682 | int count = 4; |
e0c9811a | 1683 | bytes[0] = UNW_X4; |
800eeca4 | 1684 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1685 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1686 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1687 | count += output_leb128 (bytes + 4, t, 0); | |
1688 | (*f) (count, bytes, NULL); | |
1689 | } | |
1690 | ||
ba825241 JB |
1691 | /* This function checks whether there are any outstanding .save-s and |
1692 | discards them if so. */ | |
1693 | ||
1694 | static void | |
1695 | check_pending_save (void) | |
1696 | { | |
1697 | if (unwind.pending_saves) | |
1698 | { | |
1699 | unw_rec_list *cur, *prev; | |
1700 | ||
ad4b42b4 | 1701 | as_warn (_("Previous .save incomplete")); |
ba825241 JB |
1702 | for (cur = unwind.list, prev = NULL; cur; ) |
1703 | if (&cur->r.record.p == unwind.pending_saves) | |
1704 | { | |
1705 | if (prev) | |
1706 | prev->next = cur->next; | |
1707 | else | |
1708 | unwind.list = cur->next; | |
1709 | if (cur == unwind.tail) | |
1710 | unwind.tail = prev; | |
1711 | if (cur == unwind.current_entry) | |
1712 | unwind.current_entry = cur->next; | |
1713 | /* Don't free the first discarded record, it's being used as | |
1714 | terminator for (currently) br_gr and gr_gr processing, and | |
1715 | also prevents leaving a dangling pointer to it in its | |
1716 | predecessor. */ | |
1717 | cur->r.record.p.grmask = 0; | |
1718 | cur->r.record.p.brmask = 0; | |
1719 | cur->r.record.p.frmask = 0; | |
1720 | prev = cur->r.record.p.next; | |
1721 | cur->r.record.p.next = NULL; | |
1722 | cur = prev; | |
1723 | break; | |
1724 | } | |
1725 | else | |
1726 | { | |
1727 | prev = cur; | |
1728 | cur = cur->next; | |
1729 | } | |
1730 | while (cur) | |
1731 | { | |
1732 | prev = cur; | |
1733 | cur = cur->r.record.p.next; | |
1734 | free (prev); | |
1735 | } | |
1736 | unwind.pending_saves = NULL; | |
1737 | } | |
1738 | } | |
1739 | ||
800eeca4 | 1740 | /* This function allocates a record list structure, and initializes fields. */ |
542d6675 | 1741 | |
800eeca4 | 1742 | static unw_rec_list * |
197865e8 | 1743 | alloc_record (unw_record_type t) |
800eeca4 JW |
1744 | { |
1745 | unw_rec_list *ptr; | |
1746 | ptr = xmalloc (sizeof (*ptr)); | |
ba825241 | 1747 | memset (ptr, 0, sizeof (*ptr)); |
800eeca4 JW |
1748 | ptr->slot_number = SLOT_NUM_NOT_SET; |
1749 | ptr->r.type = t; | |
1750 | return ptr; | |
1751 | } | |
1752 | ||
5738bc24 JW |
1753 | /* Dummy unwind record used for calculating the length of the last prologue or |
1754 | body region. */ | |
1755 | ||
1756 | static unw_rec_list * | |
5a49b8ac | 1757 | output_endp (void) |
5738bc24 JW |
1758 | { |
1759 | unw_rec_list *ptr = alloc_record (endp); | |
1760 | return ptr; | |
1761 | } | |
1762 | ||
800eeca4 | 1763 | static unw_rec_list * |
5a49b8ac | 1764 | output_prologue (void) |
800eeca4 JW |
1765 | { |
1766 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1767 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1768 | return ptr; |
1769 | } | |
1770 | ||
1771 | static unw_rec_list * | |
5a49b8ac | 1772 | output_prologue_gr (unsigned int saved_mask, unsigned int reg) |
800eeca4 JW |
1773 | { |
1774 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1775 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1776 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1777 | ptr->r.record.r.grsave = reg; |
1778 | return ptr; | |
1779 | } | |
1780 | ||
1781 | static unw_rec_list * | |
5a49b8ac | 1782 | output_body (void) |
800eeca4 JW |
1783 | { |
1784 | unw_rec_list *ptr = alloc_record (body); | |
1785 | return ptr; | |
1786 | } | |
1787 | ||
1788 | static unw_rec_list * | |
5a49b8ac | 1789 | output_mem_stack_f (unsigned int size) |
800eeca4 JW |
1790 | { |
1791 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1792 | ptr->r.record.p.size = size; | |
1793 | return ptr; | |
1794 | } | |
1795 | ||
1796 | static unw_rec_list * | |
5a49b8ac | 1797 | output_mem_stack_v (void) |
800eeca4 JW |
1798 | { |
1799 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1800 | return ptr; | |
1801 | } | |
1802 | ||
1803 | static unw_rec_list * | |
5a49b8ac | 1804 | output_psp_gr (unsigned int gr) |
800eeca4 JW |
1805 | { |
1806 | unw_rec_list *ptr = alloc_record (psp_gr); | |
ba825241 | 1807 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1808 | return ptr; |
1809 | } | |
1810 | ||
1811 | static unw_rec_list * | |
5a49b8ac | 1812 | output_psp_sprel (unsigned int offset) |
800eeca4 JW |
1813 | { |
1814 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
ba825241 | 1815 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1816 | return ptr; |
1817 | } | |
1818 | ||
1819 | static unw_rec_list * | |
5a49b8ac | 1820 | output_rp_when (void) |
800eeca4 JW |
1821 | { |
1822 | unw_rec_list *ptr = alloc_record (rp_when); | |
1823 | return ptr; | |
1824 | } | |
1825 | ||
1826 | static unw_rec_list * | |
5a49b8ac | 1827 | output_rp_gr (unsigned int gr) |
800eeca4 JW |
1828 | { |
1829 | unw_rec_list *ptr = alloc_record (rp_gr); | |
ba825241 | 1830 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1831 | return ptr; |
1832 | } | |
1833 | ||
1834 | static unw_rec_list * | |
5a49b8ac | 1835 | output_rp_br (unsigned int br) |
800eeca4 JW |
1836 | { |
1837 | unw_rec_list *ptr = alloc_record (rp_br); | |
ba825241 | 1838 | ptr->r.record.p.r.br = br; |
800eeca4 JW |
1839 | return ptr; |
1840 | } | |
1841 | ||
1842 | static unw_rec_list * | |
5a49b8ac | 1843 | output_rp_psprel (unsigned int offset) |
800eeca4 JW |
1844 | { |
1845 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
ba825241 | 1846 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1847 | return ptr; |
1848 | } | |
1849 | ||
1850 | static unw_rec_list * | |
5a49b8ac | 1851 | output_rp_sprel (unsigned int offset) |
800eeca4 JW |
1852 | { |
1853 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
ba825241 | 1854 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1855 | return ptr; |
1856 | } | |
1857 | ||
1858 | static unw_rec_list * | |
5a49b8ac | 1859 | output_pfs_when (void) |
800eeca4 JW |
1860 | { |
1861 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1862 | return ptr; | |
1863 | } | |
1864 | ||
1865 | static unw_rec_list * | |
5a49b8ac | 1866 | output_pfs_gr (unsigned int gr) |
800eeca4 JW |
1867 | { |
1868 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
ba825241 | 1869 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1870 | return ptr; |
1871 | } | |
1872 | ||
1873 | static unw_rec_list * | |
5a49b8ac | 1874 | output_pfs_psprel (unsigned int offset) |
800eeca4 JW |
1875 | { |
1876 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
ba825241 | 1877 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1878 | return ptr; |
1879 | } | |
1880 | ||
1881 | static unw_rec_list * | |
5a49b8ac | 1882 | output_pfs_sprel (unsigned int offset) |
800eeca4 JW |
1883 | { |
1884 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
ba825241 | 1885 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1886 | return ptr; |
1887 | } | |
1888 | ||
1889 | static unw_rec_list * | |
5a49b8ac | 1890 | output_preds_when (void) |
800eeca4 JW |
1891 | { |
1892 | unw_rec_list *ptr = alloc_record (preds_when); | |
1893 | return ptr; | |
1894 | } | |
1895 | ||
1896 | static unw_rec_list * | |
5a49b8ac | 1897 | output_preds_gr (unsigned int gr) |
800eeca4 JW |
1898 | { |
1899 | unw_rec_list *ptr = alloc_record (preds_gr); | |
ba825241 | 1900 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1901 | return ptr; |
1902 | } | |
1903 | ||
1904 | static unw_rec_list * | |
5a49b8ac | 1905 | output_preds_psprel (unsigned int offset) |
800eeca4 JW |
1906 | { |
1907 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
ba825241 | 1908 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1909 | return ptr; |
1910 | } | |
1911 | ||
1912 | static unw_rec_list * | |
5a49b8ac | 1913 | output_preds_sprel (unsigned int offset) |
800eeca4 JW |
1914 | { |
1915 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
ba825241 | 1916 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1917 | return ptr; |
1918 | } | |
1919 | ||
1920 | static unw_rec_list * | |
5a49b8ac | 1921 | output_fr_mem (unsigned int mask) |
800eeca4 JW |
1922 | { |
1923 | unw_rec_list *ptr = alloc_record (fr_mem); | |
ba825241 JB |
1924 | unw_rec_list *cur = ptr; |
1925 | ||
1926 | ptr->r.record.p.frmask = mask; | |
1927 | unwind.pending_saves = &ptr->r.record.p; | |
1928 | for (;;) | |
1929 | { | |
1930 | unw_rec_list *prev = cur; | |
1931 | ||
1932 | /* Clear least significant set bit. */ | |
1933 | mask &= ~(mask & (~mask + 1)); | |
1934 | if (!mask) | |
1935 | return ptr; | |
1936 | cur = alloc_record (fr_mem); | |
1937 | cur->r.record.p.frmask = mask; | |
1938 | /* Retain only least significant bit. */ | |
1939 | prev->r.record.p.frmask ^= mask; | |
1940 | prev->r.record.p.next = cur; | |
1941 | } | |
800eeca4 JW |
1942 | } |
1943 | ||
1944 | static unw_rec_list * | |
5a49b8ac | 1945 | output_frgr_mem (unsigned int gr_mask, unsigned int fr_mask) |
800eeca4 JW |
1946 | { |
1947 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
ba825241 JB |
1948 | unw_rec_list *cur = ptr; |
1949 | ||
1950 | unwind.pending_saves = &cur->r.record.p; | |
1951 | cur->r.record.p.frmask = fr_mask; | |
1952 | while (fr_mask) | |
1953 | { | |
1954 | unw_rec_list *prev = cur; | |
1955 | ||
1956 | /* Clear least significant set bit. */ | |
1957 | fr_mask &= ~(fr_mask & (~fr_mask + 1)); | |
1958 | if (!gr_mask && !fr_mask) | |
1959 | return ptr; | |
1960 | cur = alloc_record (frgr_mem); | |
1961 | cur->r.record.p.frmask = fr_mask; | |
1962 | /* Retain only least significant bit. */ | |
1963 | prev->r.record.p.frmask ^= fr_mask; | |
1964 | prev->r.record.p.next = cur; | |
1965 | } | |
1966 | cur->r.record.p.grmask = gr_mask; | |
1967 | for (;;) | |
1968 | { | |
1969 | unw_rec_list *prev = cur; | |
1970 | ||
1971 | /* Clear least significant set bit. */ | |
1972 | gr_mask &= ~(gr_mask & (~gr_mask + 1)); | |
1973 | if (!gr_mask) | |
1974 | return ptr; | |
1975 | cur = alloc_record (frgr_mem); | |
1976 | cur->r.record.p.grmask = gr_mask; | |
1977 | /* Retain only least significant bit. */ | |
1978 | prev->r.record.p.grmask ^= gr_mask; | |
1979 | prev->r.record.p.next = cur; | |
1980 | } | |
800eeca4 JW |
1981 | } |
1982 | ||
1983 | static unw_rec_list * | |
5a49b8ac | 1984 | output_gr_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
1985 | { |
1986 | unw_rec_list *ptr = alloc_record (gr_gr); | |
ba825241 JB |
1987 | unw_rec_list *cur = ptr; |
1988 | ||
800eeca4 | 1989 | ptr->r.record.p.grmask = mask; |
ba825241 JB |
1990 | ptr->r.record.p.r.gr = reg; |
1991 | unwind.pending_saves = &ptr->r.record.p; | |
1992 | for (;;) | |
1993 | { | |
1994 | unw_rec_list *prev = cur; | |
1995 | ||
1996 | /* Clear least significant set bit. */ | |
1997 | mask &= ~(mask & (~mask + 1)); | |
1998 | if (!mask) | |
1999 | return ptr; | |
2000 | cur = alloc_record (gr_gr); | |
2001 | cur->r.record.p.grmask = mask; | |
2002 | /* Indicate this record shouldn't be output. */ | |
2003 | cur->r.record.p.r.gr = REG_NUM; | |
2004 | /* Retain only least significant bit. */ | |
2005 | prev->r.record.p.grmask ^= mask; | |
2006 | prev->r.record.p.next = cur; | |
2007 | } | |
800eeca4 JW |
2008 | } |
2009 | ||
2010 | static unw_rec_list * | |
5a49b8ac | 2011 | output_gr_mem (unsigned int mask) |
800eeca4 JW |
2012 | { |
2013 | unw_rec_list *ptr = alloc_record (gr_mem); | |
ba825241 JB |
2014 | unw_rec_list *cur = ptr; |
2015 | ||
2016 | ptr->r.record.p.grmask = mask; | |
2017 | unwind.pending_saves = &ptr->r.record.p; | |
2018 | for (;;) | |
2019 | { | |
2020 | unw_rec_list *prev = cur; | |
2021 | ||
2022 | /* Clear least significant set bit. */ | |
2023 | mask &= ~(mask & (~mask + 1)); | |
2024 | if (!mask) | |
2025 | return ptr; | |
2026 | cur = alloc_record (gr_mem); | |
2027 | cur->r.record.p.grmask = mask; | |
2028 | /* Retain only least significant bit. */ | |
2029 | prev->r.record.p.grmask ^= mask; | |
2030 | prev->r.record.p.next = cur; | |
2031 | } | |
800eeca4 JW |
2032 | } |
2033 | ||
2034 | static unw_rec_list * | |
2035 | output_br_mem (unsigned int mask) | |
2036 | { | |
2037 | unw_rec_list *ptr = alloc_record (br_mem); | |
ba825241 JB |
2038 | unw_rec_list *cur = ptr; |
2039 | ||
800eeca4 | 2040 | ptr->r.record.p.brmask = mask; |
ba825241 JB |
2041 | unwind.pending_saves = &ptr->r.record.p; |
2042 | for (;;) | |
2043 | { | |
2044 | unw_rec_list *prev = cur; | |
2045 | ||
2046 | /* Clear least significant set bit. */ | |
2047 | mask &= ~(mask & (~mask + 1)); | |
2048 | if (!mask) | |
2049 | return ptr; | |
2050 | cur = alloc_record (br_mem); | |
2051 | cur->r.record.p.brmask = mask; | |
2052 | /* Retain only least significant bit. */ | |
2053 | prev->r.record.p.brmask ^= mask; | |
2054 | prev->r.record.p.next = cur; | |
2055 | } | |
800eeca4 JW |
2056 | } |
2057 | ||
2058 | static unw_rec_list * | |
5a49b8ac | 2059 | output_br_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
2060 | { |
2061 | unw_rec_list *ptr = alloc_record (br_gr); | |
ba825241 JB |
2062 | unw_rec_list *cur = ptr; |
2063 | ||
2064 | ptr->r.record.p.brmask = mask; | |
2065 | ptr->r.record.p.r.gr = reg; | |
2066 | unwind.pending_saves = &ptr->r.record.p; | |
2067 | for (;;) | |
2068 | { | |
2069 | unw_rec_list *prev = cur; | |
2070 | ||
2071 | /* Clear least significant set bit. */ | |
2072 | mask &= ~(mask & (~mask + 1)); | |
2073 | if (!mask) | |
2074 | return ptr; | |
2075 | cur = alloc_record (br_gr); | |
2076 | cur->r.record.p.brmask = mask; | |
2077 | /* Indicate this record shouldn't be output. */ | |
2078 | cur->r.record.p.r.gr = REG_NUM; | |
2079 | /* Retain only least significant bit. */ | |
2080 | prev->r.record.p.brmask ^= mask; | |
2081 | prev->r.record.p.next = cur; | |
2082 | } | |
800eeca4 JW |
2083 | } |
2084 | ||
2085 | static unw_rec_list * | |
5a49b8ac | 2086 | output_spill_base (unsigned int offset) |
800eeca4 JW |
2087 | { |
2088 | unw_rec_list *ptr = alloc_record (spill_base); | |
ba825241 | 2089 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2090 | return ptr; |
2091 | } | |
2092 | ||
2093 | static unw_rec_list * | |
5a49b8ac | 2094 | output_unat_when (void) |
800eeca4 JW |
2095 | { |
2096 | unw_rec_list *ptr = alloc_record (unat_when); | |
2097 | return ptr; | |
2098 | } | |
2099 | ||
2100 | static unw_rec_list * | |
5a49b8ac | 2101 | output_unat_gr (unsigned int gr) |
800eeca4 JW |
2102 | { |
2103 | unw_rec_list *ptr = alloc_record (unat_gr); | |
ba825241 | 2104 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2105 | return ptr; |
2106 | } | |
2107 | ||
2108 | static unw_rec_list * | |
5a49b8ac | 2109 | output_unat_psprel (unsigned int offset) |
800eeca4 JW |
2110 | { |
2111 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
ba825241 | 2112 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2113 | return ptr; |
2114 | } | |
2115 | ||
2116 | static unw_rec_list * | |
5a49b8ac | 2117 | output_unat_sprel (unsigned int offset) |
800eeca4 JW |
2118 | { |
2119 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
ba825241 | 2120 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2121 | return ptr; |
2122 | } | |
2123 | ||
2124 | static unw_rec_list * | |
5a49b8ac | 2125 | output_lc_when (void) |
800eeca4 JW |
2126 | { |
2127 | unw_rec_list *ptr = alloc_record (lc_when); | |
2128 | return ptr; | |
2129 | } | |
2130 | ||
2131 | static unw_rec_list * | |
5a49b8ac | 2132 | output_lc_gr (unsigned int gr) |
800eeca4 JW |
2133 | { |
2134 | unw_rec_list *ptr = alloc_record (lc_gr); | |
ba825241 | 2135 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2136 | return ptr; |
2137 | } | |
2138 | ||
2139 | static unw_rec_list * | |
5a49b8ac | 2140 | output_lc_psprel (unsigned int offset) |
800eeca4 JW |
2141 | { |
2142 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
ba825241 | 2143 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2144 | return ptr; |
2145 | } | |
2146 | ||
2147 | static unw_rec_list * | |
5a49b8ac | 2148 | output_lc_sprel (unsigned int offset) |
800eeca4 JW |
2149 | { |
2150 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
ba825241 | 2151 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2152 | return ptr; |
2153 | } | |
2154 | ||
2155 | static unw_rec_list * | |
5a49b8ac | 2156 | output_fpsr_when (void) |
800eeca4 JW |
2157 | { |
2158 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2159 | return ptr; | |
2160 | } | |
2161 | ||
2162 | static unw_rec_list * | |
5a49b8ac | 2163 | output_fpsr_gr (unsigned int gr) |
800eeca4 JW |
2164 | { |
2165 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
ba825241 | 2166 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2167 | return ptr; |
2168 | } | |
2169 | ||
2170 | static unw_rec_list * | |
5a49b8ac | 2171 | output_fpsr_psprel (unsigned int offset) |
800eeca4 JW |
2172 | { |
2173 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
ba825241 | 2174 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2175 | return ptr; |
2176 | } | |
2177 | ||
2178 | static unw_rec_list * | |
5a49b8ac | 2179 | output_fpsr_sprel (unsigned int offset) |
800eeca4 JW |
2180 | { |
2181 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
ba825241 | 2182 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2183 | return ptr; |
2184 | } | |
2185 | ||
2186 | static unw_rec_list * | |
5a49b8ac | 2187 | output_priunat_when_gr (void) |
800eeca4 JW |
2188 | { |
2189 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2190 | return ptr; | |
2191 | } | |
2192 | ||
2193 | static unw_rec_list * | |
5a49b8ac | 2194 | output_priunat_when_mem (void) |
800eeca4 JW |
2195 | { |
2196 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2197 | return ptr; | |
2198 | } | |
2199 | ||
2200 | static unw_rec_list * | |
5a49b8ac | 2201 | output_priunat_gr (unsigned int gr) |
800eeca4 JW |
2202 | { |
2203 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
ba825241 | 2204 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2205 | return ptr; |
2206 | } | |
2207 | ||
2208 | static unw_rec_list * | |
5a49b8ac | 2209 | output_priunat_psprel (unsigned int offset) |
800eeca4 JW |
2210 | { |
2211 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
ba825241 | 2212 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2213 | return ptr; |
2214 | } | |
2215 | ||
2216 | static unw_rec_list * | |
5a49b8ac | 2217 | output_priunat_sprel (unsigned int offset) |
800eeca4 JW |
2218 | { |
2219 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
ba825241 | 2220 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2221 | return ptr; |
2222 | } | |
2223 | ||
2224 | static unw_rec_list * | |
5a49b8ac | 2225 | output_bsp_when (void) |
800eeca4 JW |
2226 | { |
2227 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2228 | return ptr; | |
2229 | } | |
2230 | ||
2231 | static unw_rec_list * | |
5a49b8ac | 2232 | output_bsp_gr (unsigned int gr) |
800eeca4 JW |
2233 | { |
2234 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
ba825241 | 2235 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2236 | return ptr; |
2237 | } | |
2238 | ||
2239 | static unw_rec_list * | |
5a49b8ac | 2240 | output_bsp_psprel (unsigned int offset) |
800eeca4 JW |
2241 | { |
2242 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
ba825241 | 2243 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2244 | return ptr; |
2245 | } | |
2246 | ||
2247 | static unw_rec_list * | |
5a49b8ac | 2248 | output_bsp_sprel (unsigned int offset) |
800eeca4 JW |
2249 | { |
2250 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
ba825241 | 2251 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2252 | return ptr; |
2253 | } | |
2254 | ||
2255 | static unw_rec_list * | |
5a49b8ac | 2256 | output_bspstore_when (void) |
800eeca4 JW |
2257 | { |
2258 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2259 | return ptr; | |
2260 | } | |
2261 | ||
2262 | static unw_rec_list * | |
5a49b8ac | 2263 | output_bspstore_gr (unsigned int gr) |
800eeca4 JW |
2264 | { |
2265 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
ba825241 | 2266 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2267 | return ptr; |
2268 | } | |
2269 | ||
2270 | static unw_rec_list * | |
5a49b8ac | 2271 | output_bspstore_psprel (unsigned int offset) |
800eeca4 JW |
2272 | { |
2273 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
ba825241 | 2274 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2275 | return ptr; |
2276 | } | |
2277 | ||
2278 | static unw_rec_list * | |
5a49b8ac | 2279 | output_bspstore_sprel (unsigned int offset) |
800eeca4 JW |
2280 | { |
2281 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
ba825241 | 2282 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2283 | return ptr; |
2284 | } | |
2285 | ||
2286 | static unw_rec_list * | |
5a49b8ac | 2287 | output_rnat_when (void) |
800eeca4 JW |
2288 | { |
2289 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2290 | return ptr; | |
2291 | } | |
2292 | ||
2293 | static unw_rec_list * | |
5a49b8ac | 2294 | output_rnat_gr (unsigned int gr) |
800eeca4 JW |
2295 | { |
2296 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
ba825241 | 2297 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2298 | return ptr; |
2299 | } | |
2300 | ||
2301 | static unw_rec_list * | |
5a49b8ac | 2302 | output_rnat_psprel (unsigned int offset) |
800eeca4 JW |
2303 | { |
2304 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
ba825241 | 2305 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2306 | return ptr; |
2307 | } | |
2308 | ||
2309 | static unw_rec_list * | |
5a49b8ac | 2310 | output_rnat_sprel (unsigned int offset) |
800eeca4 JW |
2311 | { |
2312 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
ba825241 | 2313 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2314 | return ptr; |
2315 | } | |
2316 | ||
2317 | static unw_rec_list * | |
5a49b8ac | 2318 | output_unwabi (unsigned long abi, unsigned long context) |
800eeca4 | 2319 | { |
e0c9811a JW |
2320 | unw_rec_list *ptr = alloc_record (unwabi); |
2321 | ptr->r.record.p.abi = abi; | |
2322 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2323 | return ptr; |
2324 | } | |
2325 | ||
2326 | static unw_rec_list * | |
e0c9811a | 2327 | output_epilogue (unsigned long ecount) |
800eeca4 | 2328 | { |
e0c9811a JW |
2329 | unw_rec_list *ptr = alloc_record (epilogue); |
2330 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2331 | return ptr; |
2332 | } | |
2333 | ||
2334 | static unw_rec_list * | |
e0c9811a | 2335 | output_label_state (unsigned long label) |
800eeca4 | 2336 | { |
e0c9811a JW |
2337 | unw_rec_list *ptr = alloc_record (label_state); |
2338 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2339 | return ptr; |
2340 | } | |
2341 | ||
2342 | static unw_rec_list * | |
e0c9811a JW |
2343 | output_copy_state (unsigned long label) |
2344 | { | |
2345 | unw_rec_list *ptr = alloc_record (copy_state); | |
2346 | ptr->r.record.b.label = label; | |
2347 | return ptr; | |
2348 | } | |
2349 | ||
2350 | static unw_rec_list * | |
5a49b8ac AM |
2351 | output_spill_psprel (unsigned int ab, |
2352 | unsigned int reg, | |
2353 | unsigned int offset, | |
2354 | unsigned int predicate) | |
800eeca4 | 2355 | { |
e4e8248d | 2356 | unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); |
e0c9811a | 2357 | ptr->r.record.x.ab = ab; |
800eeca4 | 2358 | ptr->r.record.x.reg = reg; |
ba825241 | 2359 | ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2360 | ptr->r.record.x.qp = predicate; |
2361 | return ptr; | |
2362 | } | |
2363 | ||
2364 | static unw_rec_list * | |
5a49b8ac AM |
2365 | output_spill_sprel (unsigned int ab, |
2366 | unsigned int reg, | |
2367 | unsigned int offset, | |
2368 | unsigned int predicate) | |
800eeca4 | 2369 | { |
e4e8248d | 2370 | unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); |
e0c9811a | 2371 | ptr->r.record.x.ab = ab; |
800eeca4 | 2372 | ptr->r.record.x.reg = reg; |
ba825241 | 2373 | ptr->r.record.x.where.spoff = offset / 4; |
800eeca4 JW |
2374 | ptr->r.record.x.qp = predicate; |
2375 | return ptr; | |
2376 | } | |
2377 | ||
2378 | static unw_rec_list * | |
5a49b8ac AM |
2379 | output_spill_reg (unsigned int ab, |
2380 | unsigned int reg, | |
2381 | unsigned int targ_reg, | |
2382 | unsigned int xy, | |
2383 | unsigned int predicate) | |
800eeca4 | 2384 | { |
e4e8248d | 2385 | unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); |
e0c9811a | 2386 | ptr->r.record.x.ab = ab; |
800eeca4 | 2387 | ptr->r.record.x.reg = reg; |
ba825241 | 2388 | ptr->r.record.x.where.reg = targ_reg; |
800eeca4 JW |
2389 | ptr->r.record.x.xy = xy; |
2390 | ptr->r.record.x.qp = predicate; | |
2391 | return ptr; | |
2392 | } | |
2393 | ||
197865e8 | 2394 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2395 | specified function. */ |
542d6675 | 2396 | |
800eeca4 | 2397 | static void |
5a49b8ac | 2398 | process_one_record (unw_rec_list *ptr, vbyte_func f) |
800eeca4 | 2399 | { |
ba825241 | 2400 | unsigned int fr_mask, gr_mask; |
e0c9811a | 2401 | |
197865e8 | 2402 | switch (ptr->r.type) |
800eeca4 | 2403 | { |
5738bc24 JW |
2404 | /* This is a dummy record that takes up no space in the output. */ |
2405 | case endp: | |
2406 | break; | |
2407 | ||
542d6675 KH |
2408 | case gr_mem: |
2409 | case fr_mem: | |
2410 | case br_mem: | |
2411 | case frgr_mem: | |
2412 | /* These are taken care of by prologue/prologue_gr. */ | |
2413 | break; | |
e0c9811a | 2414 | |
542d6675 KH |
2415 | case prologue_gr: |
2416 | case prologue: | |
2417 | if (ptr->r.type == prologue_gr) | |
2418 | output_R2_format (f, ptr->r.record.r.grmask, | |
2419 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2420 | else | |
800eeca4 | 2421 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2422 | |
2423 | /* Output descriptor(s) for union of register spills (if any). */ | |
2424 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2425 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2426 | if (fr_mask) | |
2427 | { | |
2428 | if ((fr_mask & ~0xfUL) == 0) | |
2429 | output_P6_format (f, fr_mem, fr_mask); | |
2430 | else | |
2431 | { | |
2432 | output_P5_format (f, gr_mask, fr_mask); | |
2433 | gr_mask = 0; | |
2434 | } | |
2435 | } | |
2436 | if (gr_mask) | |
2437 | output_P6_format (f, gr_mem, gr_mask); | |
2438 | if (ptr->r.record.r.mask.br_mem) | |
2439 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2440 | ||
2441 | /* output imask descriptor if necessary: */ | |
2442 | if (ptr->r.record.r.mask.i) | |
2443 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2444 | ptr->r.record.r.imask_size); | |
2445 | break; | |
2446 | ||
2447 | case body: | |
2448 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2449 | break; | |
2450 | case mem_stack_f: | |
2451 | case mem_stack_v: | |
2452 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2453 | ptr->r.record.p.size); | |
2454 | break; | |
2455 | case psp_gr: | |
2456 | case rp_gr: | |
2457 | case pfs_gr: | |
2458 | case preds_gr: | |
2459 | case unat_gr: | |
2460 | case lc_gr: | |
2461 | case fpsr_gr: | |
2462 | case priunat_gr: | |
2463 | case bsp_gr: | |
2464 | case bspstore_gr: | |
2465 | case rnat_gr: | |
ba825241 | 2466 | output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); |
542d6675 KH |
2467 | break; |
2468 | case rp_br: | |
ba825241 | 2469 | output_P3_format (f, rp_br, ptr->r.record.p.r.br); |
542d6675 KH |
2470 | break; |
2471 | case psp_sprel: | |
ba825241 | 2472 | output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); |
542d6675 KH |
2473 | break; |
2474 | case rp_when: | |
2475 | case pfs_when: | |
2476 | case preds_when: | |
2477 | case unat_when: | |
2478 | case lc_when: | |
2479 | case fpsr_when: | |
2480 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2481 | break; | |
2482 | case rp_psprel: | |
2483 | case pfs_psprel: | |
2484 | case preds_psprel: | |
2485 | case unat_psprel: | |
2486 | case lc_psprel: | |
2487 | case fpsr_psprel: | |
2488 | case spill_base: | |
ba825241 | 2489 | output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); |
542d6675 KH |
2490 | break; |
2491 | case rp_sprel: | |
2492 | case pfs_sprel: | |
2493 | case preds_sprel: | |
2494 | case unat_sprel: | |
2495 | case lc_sprel: | |
2496 | case fpsr_sprel: | |
2497 | case priunat_sprel: | |
2498 | case bsp_sprel: | |
2499 | case bspstore_sprel: | |
2500 | case rnat_sprel: | |
ba825241 | 2501 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); |
542d6675 KH |
2502 | break; |
2503 | case gr_gr: | |
ba825241 JB |
2504 | if (ptr->r.record.p.r.gr < REG_NUM) |
2505 | { | |
2506 | const unw_rec_list *cur = ptr; | |
2507 | ||
2508 | gr_mask = cur->r.record.p.grmask; | |
2509 | while ((cur = cur->r.record.p.next) != NULL) | |
2510 | gr_mask |= cur->r.record.p.grmask; | |
2511 | output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2512 | } | |
542d6675 KH |
2513 | break; |
2514 | case br_gr: | |
ba825241 JB |
2515 | if (ptr->r.record.p.r.gr < REG_NUM) |
2516 | { | |
2517 | const unw_rec_list *cur = ptr; | |
2518 | ||
2519 | gr_mask = cur->r.record.p.brmask; | |
2520 | while ((cur = cur->r.record.p.next) != NULL) | |
2521 | gr_mask |= cur->r.record.p.brmask; | |
2522 | output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2523 | } | |
542d6675 KH |
2524 | break; |
2525 | case spill_mask: | |
ad4b42b4 | 2526 | as_bad (_("spill_mask record unimplemented.")); |
542d6675 KH |
2527 | break; |
2528 | case priunat_when_gr: | |
2529 | case priunat_when_mem: | |
2530 | case bsp_when: | |
2531 | case bspstore_when: | |
2532 | case rnat_when: | |
2533 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2534 | break; | |
2535 | case priunat_psprel: | |
2536 | case bsp_psprel: | |
2537 | case bspstore_psprel: | |
2538 | case rnat_psprel: | |
ba825241 | 2539 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); |
542d6675 KH |
2540 | break; |
2541 | case unwabi: | |
2542 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2543 | break; | |
2544 | case epilogue: | |
2545 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2546 | break; | |
2547 | case label_state: | |
2548 | case copy_state: | |
2549 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2550 | break; | |
2551 | case spill_psprel: | |
2552 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2553 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2554 | ptr->r.record.x.where.pspoff); |
542d6675 KH |
2555 | break; |
2556 | case spill_sprel: | |
2557 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2558 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2559 | ptr->r.record.x.where.spoff); |
542d6675 KH |
2560 | break; |
2561 | case spill_reg: | |
2562 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2563 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
ba825241 | 2564 | ptr->r.record.x.where.reg, ptr->r.record.x.t); |
542d6675 KH |
2565 | break; |
2566 | case spill_psprel_p: | |
2567 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2568 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2569 | ptr->r.record.x.t, ptr->r.record.x.where.pspoff); |
542d6675 KH |
2570 | break; |
2571 | case spill_sprel_p: | |
2572 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2573 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2574 | ptr->r.record.x.t, ptr->r.record.x.where.spoff); |
542d6675 KH |
2575 | break; |
2576 | case spill_reg_p: | |
2577 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2578 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
ba825241 | 2579 | ptr->r.record.x.xy, ptr->r.record.x.where.reg, |
542d6675 KH |
2580 | ptr->r.record.x.t); |
2581 | break; | |
2582 | default: | |
ad4b42b4 | 2583 | as_bad (_("record_type_not_valid")); |
542d6675 | 2584 | break; |
800eeca4 JW |
2585 | } |
2586 | } | |
2587 | ||
197865e8 | 2588 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2589 | the specified function. */ |
2590 | static void | |
5a49b8ac | 2591 | process_unw_records (unw_rec_list *list, vbyte_func f) |
800eeca4 JW |
2592 | { |
2593 | unw_rec_list *ptr; | |
2594 | for (ptr = list; ptr; ptr = ptr->next) | |
2595 | process_one_record (ptr, f); | |
2596 | } | |
2597 | ||
2598 | /* Determine the size of a record list in bytes. */ | |
2599 | static int | |
5a49b8ac | 2600 | calc_record_size (unw_rec_list *list) |
800eeca4 JW |
2601 | { |
2602 | vbyte_count = 0; | |
2603 | process_unw_records (list, count_output); | |
2604 | return vbyte_count; | |
2605 | } | |
2606 | ||
e4e8248d JB |
2607 | /* Return the number of bits set in the input value. |
2608 | Perhaps this has a better place... */ | |
2609 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) | |
2610 | # define popcount __builtin_popcount | |
2611 | #else | |
2612 | static int | |
2613 | popcount (unsigned x) | |
2614 | { | |
2615 | static const unsigned char popcnt[16] = | |
2616 | { | |
2617 | 0, 1, 1, 2, | |
2618 | 1, 2, 2, 3, | |
2619 | 1, 2, 2, 3, | |
2620 | 2, 3, 3, 4 | |
2621 | }; | |
2622 | ||
2623 | if (x < NELEMS (popcnt)) | |
2624 | return popcnt[x]; | |
2625 | return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); | |
2626 | } | |
2627 | #endif | |
2628 | ||
e0c9811a JW |
2629 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2630 | of type TYPE are saved starting at instruction with index T. If N | |
2631 | bits are set in REGMASK, it is assumed that instructions T through | |
2632 | T+N-1 save these registers. | |
2633 | ||
2634 | TYPE values: | |
2635 | 0: no save | |
2636 | 1: instruction saves next fp reg | |
2637 | 2: instruction saves next general reg | |
2638 | 3: instruction saves next branch reg */ | |
2639 | static void | |
5a49b8ac AM |
2640 | set_imask (unw_rec_list *region, |
2641 | unsigned long regmask, | |
2642 | unsigned long t, | |
2643 | unsigned int type) | |
e0c9811a JW |
2644 | { |
2645 | unsigned char *imask; | |
2646 | unsigned long imask_size; | |
2647 | unsigned int i; | |
2648 | int pos; | |
2649 | ||
2650 | imask = region->r.record.r.mask.i; | |
2651 | imask_size = region->r.record.r.imask_size; | |
2652 | if (!imask) | |
2653 | { | |
542d6675 | 2654 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2655 | imask = xmalloc (imask_size); |
2656 | memset (imask, 0, imask_size); | |
2657 | ||
2658 | region->r.record.r.imask_size = imask_size; | |
2659 | region->r.record.r.mask.i = imask; | |
2660 | } | |
2661 | ||
542d6675 KH |
2662 | i = (t / 4) + 1; |
2663 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2664 | while (regmask) |
2665 | { | |
2666 | if (i >= imask_size) | |
2667 | { | |
ad4b42b4 | 2668 | as_bad (_("Ignoring attempt to spill beyond end of region")); |
e0c9811a JW |
2669 | return; |
2670 | } | |
2671 | ||
2672 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2673 | |
e0c9811a JW |
2674 | regmask &= (regmask - 1); |
2675 | pos -= 2; | |
2676 | if (pos < 0) | |
2677 | { | |
2678 | pos = 0; | |
2679 | ++i; | |
2680 | } | |
2681 | } | |
2682 | } | |
2683 | ||
f5a30c2e JW |
2684 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2685 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2686 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2687 | for frag sizes. */ | |
f5a30c2e | 2688 | |
5a49b8ac AM |
2689 | static unsigned long |
2690 | slot_index (unsigned long slot_addr, | |
2691 | fragS *slot_frag, | |
2692 | unsigned long first_addr, | |
2693 | fragS *first_frag, | |
2694 | int before_relax) | |
e0c9811a | 2695 | { |
91d6fa6a | 2696 | unsigned long s_index = 0; |
f5a30c2e JW |
2697 | |
2698 | /* First time we are called, the initial address and frag are invalid. */ | |
2699 | if (first_addr == 0) | |
2700 | return 0; | |
2701 | ||
2702 | /* If the two addresses are in different frags, then we need to add in | |
2703 | the remaining size of this frag, and then the entire size of intermediate | |
2704 | frags. */ | |
4dddc1d1 | 2705 | while (slot_frag != first_frag) |
f5a30c2e JW |
2706 | { |
2707 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2708 | ||
b5e0fabd | 2709 | if (! before_relax) |
73f20958 | 2710 | { |
b5e0fabd JW |
2711 | /* We can get the final addresses only during and after |
2712 | relaxation. */ | |
73f20958 | 2713 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
91d6fa6a | 2714 | s_index += 3 * ((first_frag->fr_next->fr_address |
73f20958 L |
2715 | - first_frag->fr_address |
2716 | - first_frag->fr_fix) >> 4); | |
2717 | } | |
2718 | else | |
2719 | /* We don't know what the final addresses will be. We try our | |
2720 | best to estimate. */ | |
2721 | switch (first_frag->fr_type) | |
2722 | { | |
2723 | default: | |
2724 | break; | |
2725 | ||
2726 | case rs_space: | |
ad4b42b4 | 2727 | as_fatal (_("Only constant space allocation is supported")); |
73f20958 L |
2728 | break; |
2729 | ||
2730 | case rs_align: | |
2731 | case rs_align_code: | |
2732 | case rs_align_test: | |
2733 | /* Take alignment into account. Assume the worst case | |
2734 | before relaxation. */ | |
91d6fa6a | 2735 | s_index += 3 * ((1 << first_frag->fr_offset) >> 4); |
73f20958 L |
2736 | break; |
2737 | ||
2738 | case rs_org: | |
2739 | if (first_frag->fr_symbol) | |
2740 | { | |
ad4b42b4 | 2741 | as_fatal (_("Only constant offsets are supported")); |
73f20958 L |
2742 | break; |
2743 | } | |
2744 | case rs_fill: | |
91d6fa6a | 2745 | s_index += 3 * (first_frag->fr_offset >> 4); |
73f20958 L |
2746 | break; |
2747 | } | |
2748 | ||
f5a30c2e | 2749 | /* Add in the full size of the frag converted to instruction slots. */ |
91d6fa6a | 2750 | s_index += 3 * (first_frag->fr_fix >> 4); |
f5a30c2e | 2751 | /* Subtract away the initial part before first_addr. */ |
91d6fa6a | 2752 | s_index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) |
f5a30c2e | 2753 | + ((first_addr & 0x3) - (start_addr & 0x3))); |
e0c9811a | 2754 | |
f5a30c2e JW |
2755 | /* Move to the beginning of the next frag. */ |
2756 | first_frag = first_frag->fr_next; | |
2757 | first_addr = (unsigned long) &first_frag->fr_literal; | |
4dddc1d1 JW |
2758 | |
2759 | /* This can happen if there is section switching in the middle of a | |
cb3b8d91 JW |
2760 | function, causing the frag chain for the function to be broken. |
2761 | It is too difficult to recover safely from this problem, so we just | |
2762 | exit with an error. */ | |
4dddc1d1 | 2763 | if (first_frag == NULL) |
ad4b42b4 | 2764 | as_fatal (_("Section switching in code is not supported.")); |
f5a30c2e JW |
2765 | } |
2766 | ||
2767 | /* Add in the used part of the last frag. */ | |
91d6fa6a | 2768 | s_index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) |
f5a30c2e | 2769 | + ((slot_addr & 0x3) - (first_addr & 0x3))); |
91d6fa6a | 2770 | return s_index; |
f5a30c2e | 2771 | } |
4a1805b1 | 2772 | |
91a2ae2a RH |
2773 | /* Optimize unwind record directives. */ |
2774 | ||
2775 | static unw_rec_list * | |
5a49b8ac | 2776 | optimize_unw_records (unw_rec_list *list) |
91a2ae2a RH |
2777 | { |
2778 | if (!list) | |
2779 | return NULL; | |
2780 | ||
2781 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2782 | by ".body", then we can optimize the unwind directives away. */ | |
2783 | if (list->r.type == prologue | |
5738bc24 JW |
2784 | && (list->next->r.type == endp |
2785 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2786 | return NULL; |
2787 | ||
2788 | return list; | |
2789 | } | |
2790 | ||
800eeca4 JW |
2791 | /* Given a complete record list, process any records which have |
2792 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2793 | this has been run, all necessary information should be available |
800eeca4 | 2794 | within each record to generate an image. */ |
542d6675 | 2795 | |
800eeca4 | 2796 | static void |
5a49b8ac | 2797 | fixup_unw_records (unw_rec_list *list, int before_relax) |
800eeca4 | 2798 | { |
e0c9811a JW |
2799 | unw_rec_list *ptr, *region = 0; |
2800 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2801 | fragS *first_frag = 0; |
e0c9811a | 2802 | |
800eeca4 JW |
2803 | for (ptr = list; ptr; ptr = ptr->next) |
2804 | { | |
2805 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
ad4b42b4 | 2806 | as_bad (_(" Insn slot not set in unwind record.")); |
f5a30c2e | 2807 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2808 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2809 | switch (ptr->r.type) |
2810 | { | |
542d6675 KH |
2811 | case prologue: |
2812 | case prologue_gr: | |
2813 | case body: | |
2814 | { | |
2815 | unw_rec_list *last; | |
5738bc24 JW |
2816 | int size; |
2817 | unsigned long last_addr = 0; | |
2818 | fragS *last_frag = NULL; | |
542d6675 KH |
2819 | |
2820 | first_addr = ptr->slot_number; | |
f5a30c2e | 2821 | first_frag = ptr->slot_frag; |
542d6675 | 2822 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2823 | the function, and determine the size of the region. */ |
542d6675 KH |
2824 | for (last = ptr->next; last != NULL; last = last->next) |
2825 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2826 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2827 | { |
2828 | last_addr = last->slot_number; | |
f5a30c2e | 2829 | last_frag = last->slot_frag; |
542d6675 KH |
2830 | break; |
2831 | } | |
b5e0fabd JW |
2832 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2833 | before_relax); | |
542d6675 | 2834 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2835 | if (ptr->r.type == body) |
2836 | /* End of region. */ | |
2837 | region = 0; | |
2838 | else | |
2839 | region = ptr; | |
e0c9811a | 2840 | break; |
542d6675 KH |
2841 | } |
2842 | case epilogue: | |
ed7af9f9 L |
2843 | if (t < rlen) |
2844 | ptr->r.record.b.t = rlen - 1 - t; | |
2845 | else | |
2846 | /* This happens when a memory-stack-less procedure uses a | |
2847 | ".restore sp" directive at the end of a region to pop | |
2848 | the frame state. */ | |
2849 | ptr->r.record.b.t = 0; | |
542d6675 | 2850 | break; |
e0c9811a | 2851 | |
542d6675 KH |
2852 | case mem_stack_f: |
2853 | case mem_stack_v: | |
2854 | case rp_when: | |
2855 | case pfs_when: | |
2856 | case preds_when: | |
2857 | case unat_when: | |
2858 | case lc_when: | |
2859 | case fpsr_when: | |
2860 | case priunat_when_gr: | |
2861 | case priunat_when_mem: | |
2862 | case bsp_when: | |
2863 | case bspstore_when: | |
2864 | case rnat_when: | |
2865 | ptr->r.record.p.t = t; | |
2866 | break; | |
e0c9811a | 2867 | |
542d6675 KH |
2868 | case spill_reg: |
2869 | case spill_sprel: | |
2870 | case spill_psprel: | |
2871 | case spill_reg_p: | |
2872 | case spill_sprel_p: | |
2873 | case spill_psprel_p: | |
2874 | ptr->r.record.x.t = t; | |
2875 | break; | |
e0c9811a | 2876 | |
542d6675 KH |
2877 | case frgr_mem: |
2878 | if (!region) | |
2879 | { | |
ad4b42b4 | 2880 | as_bad (_("frgr_mem record before region record!")); |
542d6675 KH |
2881 | return; |
2882 | } | |
2883 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2884 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2885 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2886 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2887 | break; | |
2888 | case fr_mem: | |
2889 | if (!region) | |
2890 | { | |
ad4b42b4 | 2891 | as_bad (_("fr_mem record before region record!")); |
542d6675 KH |
2892 | return; |
2893 | } | |
ba825241 JB |
2894 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; |
2895 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
542d6675 KH |
2896 | break; |
2897 | case gr_mem: | |
2898 | if (!region) | |
2899 | { | |
ad4b42b4 | 2900 | as_bad (_("gr_mem record before region record!")); |
542d6675 KH |
2901 | return; |
2902 | } | |
ba825241 JB |
2903 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; |
2904 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
542d6675 KH |
2905 | break; |
2906 | case br_mem: | |
2907 | if (!region) | |
2908 | { | |
ad4b42b4 | 2909 | as_bad (_("br_mem record before region record!")); |
542d6675 KH |
2910 | return; |
2911 | } | |
2912 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2913 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2914 | break; | |
e0c9811a | 2915 | |
542d6675 KH |
2916 | case gr_gr: |
2917 | if (!region) | |
2918 | { | |
ad4b42b4 | 2919 | as_bad (_("gr_gr record before region record!")); |
542d6675 KH |
2920 | return; |
2921 | } | |
2922 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2923 | break; | |
2924 | case br_gr: | |
2925 | if (!region) | |
2926 | { | |
ad4b42b4 | 2927 | as_bad (_("br_gr record before region record!")); |
542d6675 KH |
2928 | return; |
2929 | } | |
2930 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2931 | break; | |
e0c9811a | 2932 | |
542d6675 KH |
2933 | default: |
2934 | break; | |
800eeca4 JW |
2935 | } |
2936 | } | |
2937 | } | |
2938 | ||
b5e0fabd JW |
2939 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2940 | to handle here, which is the unwind info frag. */ | |
2941 | ||
2942 | int | |
2943 | ia64_estimate_size_before_relax (fragS *frag, | |
2944 | asection *segtype ATTRIBUTE_UNUSED) | |
2945 | { | |
2946 | unw_rec_list *list; | |
2947 | int len, size, pad; | |
2948 | ||
2949 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2950 | list = (unw_rec_list *) frag->fr_opcode; | |
2951 | fixup_unw_records (list, 0); | |
2952 | ||
2953 | len = calc_record_size (list); | |
2954 | /* pad to pointer-size boundary. */ | |
2955 | pad = len % md.pointer_size; | |
2956 | if (pad != 0) | |
2957 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2958 | /* Add 8 for the header. */ |
2959 | size = len + 8; | |
2960 | /* Add a pointer for the personality offset. */ | |
2961 | if (frag->fr_offset) | |
2962 | size += md.pointer_size; | |
b5e0fabd JW |
2963 | |
2964 | /* fr_var carries the max_chars that we created the fragment with. | |
2965 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2966 | gas_assert (frag->fr_var >= size); |
b5e0fabd JW |
2967 | |
2968 | return frag->fr_fix + size; | |
2969 | } | |
2970 | ||
73f20958 L |
2971 | /* This function converts a rs_machine_dependent variant frag into a |
2972 | normal fill frag with the unwind image from the the record list. */ | |
2973 | void | |
2974 | ia64_convert_frag (fragS *frag) | |
557debba | 2975 | { |
73f20958 L |
2976 | unw_rec_list *list; |
2977 | int len, size, pad; | |
1cd8ff38 | 2978 | valueT flag_value; |
557debba | 2979 | |
b5e0fabd | 2980 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2981 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2982 | fixup_unw_records (list, 0); |
1cd8ff38 | 2983 | |
73f20958 L |
2984 | len = calc_record_size (list); |
2985 | /* pad to pointer-size boundary. */ | |
2986 | pad = len % md.pointer_size; | |
2987 | if (pad != 0) | |
2988 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2989 | /* Add 8 for the header. */ |
2990 | size = len + 8; | |
2991 | /* Add a pointer for the personality offset. */ | |
2992 | if (frag->fr_offset) | |
2993 | size += md.pointer_size; | |
73f20958 L |
2994 | |
2995 | /* fr_var carries the max_chars that we created the fragment with. | |
2996 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2997 | gas_assert (frag->fr_var >= size); |
73f20958 L |
2998 | |
2999 | /* Initialize the header area. fr_offset is initialized with | |
3000 | unwind.personality_routine. */ | |
3001 | if (frag->fr_offset) | |
1cd8ff38 NC |
3002 | { |
3003 | if (md.flags & EF_IA_64_ABI64) | |
3004 | flag_value = (bfd_vma) 3 << 32; | |
3005 | else | |
3006 | /* 32-bit unwind info block. */ | |
3007 | flag_value = (bfd_vma) 0x1003 << 32; | |
3008 | } | |
3009 | else | |
3010 | flag_value = 0; | |
557debba | 3011 | |
73f20958 L |
3012 | md_number_to_chars (frag->fr_literal, |
3013 | (((bfd_vma) 1 << 48) /* Version. */ | |
3014 | | flag_value /* U & E handler flags. */ | |
3015 | | (len / md.pointer_size)), /* Length. */ | |
3016 | 8); | |
557debba | 3017 | |
73f20958 L |
3018 | /* Skip the header. */ |
3019 | vbyte_mem_ptr = frag->fr_literal + 8; | |
3020 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
3021 | |
3022 | /* Fill the padding bytes with zeros. */ | |
3023 | if (pad != 0) | |
3024 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
3025 | md.pointer_size - pad); | |
417c21b7 AO |
3026 | /* Fill the unwind personality with zeros. */ |
3027 | if (frag->fr_offset) | |
3028 | md_number_to_chars (frag->fr_literal + size - md.pointer_size, 0, | |
3029 | md.pointer_size); | |
d6e78c11 | 3030 | |
73f20958 L |
3031 | frag->fr_fix += size; |
3032 | frag->fr_type = rs_fill; | |
3033 | frag->fr_var = 0; | |
3034 | frag->fr_offset = 0; | |
800eeca4 JW |
3035 | } |
3036 | ||
e0c9811a | 3037 | static int |
5a49b8ac | 3038 | parse_predicate_and_operand (expressionS *e, unsigned *qp, const char *po) |
e4e8248d | 3039 | { |
cd42ff9c | 3040 | int sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
3041 | |
3042 | *qp = e->X_add_number - REG_P; | |
3043 | if (e->X_op != O_register || *qp > 63) | |
3044 | { | |
ad4b42b4 | 3045 | as_bad (_("First operand to .%s must be a predicate"), po); |
e4e8248d JB |
3046 | *qp = 0; |
3047 | } | |
3048 | else if (*qp == 0) | |
ad4b42b4 | 3049 | as_warn (_("Pointless use of p0 as first operand to .%s"), po); |
e4e8248d | 3050 | if (sep == ',') |
cd42ff9c | 3051 | sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
3052 | else |
3053 | e->X_op = O_absent; | |
3054 | return sep; | |
3055 | } | |
3056 | ||
3057 | static void | |
5a49b8ac AM |
3058 | convert_expr_to_ab_reg (const expressionS *e, |
3059 | unsigned int *ab, | |
3060 | unsigned int *regp, | |
3061 | const char *po, | |
3062 | int n) | |
e0c9811a | 3063 | { |
e4e8248d JB |
3064 | unsigned int reg = e->X_add_number; |
3065 | ||
3066 | *ab = *regp = 0; /* Anything valid is good here. */ | |
e0c9811a JW |
3067 | |
3068 | if (e->X_op != O_register) | |
e4e8248d | 3069 | reg = REG_GR; /* Anything invalid is good here. */ |
e0c9811a | 3070 | |
2434f565 | 3071 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
3072 | { |
3073 | *ab = 0; | |
3074 | *regp = reg - REG_GR; | |
3075 | } | |
2434f565 JW |
3076 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
3077 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
3078 | { |
3079 | *ab = 1; | |
3080 | *regp = reg - REG_FR; | |
3081 | } | |
2434f565 | 3082 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3083 | { |
3084 | *ab = 2; | |
3085 | *regp = reg - REG_BR; | |
3086 | } | |
3087 | else | |
3088 | { | |
3089 | *ab = 3; | |
3090 | switch (reg) | |
3091 | { | |
3092 | case REG_PR: *regp = 0; break; | |
3093 | case REG_PSP: *regp = 1; break; | |
3094 | case REG_PRIUNAT: *regp = 2; break; | |
3095 | case REG_BR + 0: *regp = 3; break; | |
3096 | case REG_AR + AR_BSP: *regp = 4; break; | |
3097 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3098 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3099 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3100 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3101 | case REG_AR + AR_PFS: *regp = 9; break; | |
3102 | case REG_AR + AR_LC: *regp = 10; break; | |
3103 | ||
3104 | default: | |
ad4b42b4 | 3105 | as_bad (_("Operand %d to .%s must be a preserved register"), n, po); |
e4e8248d | 3106 | break; |
e0c9811a JW |
3107 | } |
3108 | } | |
197865e8 | 3109 | } |
e0c9811a | 3110 | |
e4e8248d | 3111 | static void |
5a49b8ac AM |
3112 | convert_expr_to_xy_reg (const expressionS *e, |
3113 | unsigned int *xy, | |
3114 | unsigned int *regp, | |
3115 | const char *po, | |
3116 | int n) | |
e0c9811a | 3117 | { |
e4e8248d | 3118 | unsigned int reg = e->X_add_number; |
e0c9811a | 3119 | |
e4e8248d | 3120 | *xy = *regp = 0; /* Anything valid is good here. */ |
e0c9811a | 3121 | |
e4e8248d JB |
3122 | if (e->X_op != O_register) |
3123 | reg = REG_GR; /* Anything invalid is good here. */ | |
e0c9811a | 3124 | |
e4e8248d | 3125 | if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) |
e0c9811a JW |
3126 | { |
3127 | *xy = 0; | |
3128 | *regp = reg - REG_GR; | |
3129 | } | |
e4e8248d | 3130 | else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) |
e0c9811a JW |
3131 | { |
3132 | *xy = 1; | |
3133 | *regp = reg - REG_FR; | |
3134 | } | |
2434f565 | 3135 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3136 | { |
3137 | *xy = 2; | |
3138 | *regp = reg - REG_BR; | |
3139 | } | |
3140 | else | |
ad4b42b4 | 3141 | as_bad (_("Operand %d to .%s must be a writable register"), n, po); |
197865e8 | 3142 | } |
e0c9811a | 3143 | |
d9201763 L |
3144 | static void |
3145 | dot_align (int arg) | |
3146 | { | |
3147 | /* The current frag is an alignment frag. */ | |
3148 | align_frag = frag_now; | |
3149 | s_align_bytes (arg); | |
3150 | } | |
3151 | ||
800eeca4 | 3152 | static void |
5a49b8ac | 3153 | dot_radix (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3154 | { |
fa30c84f JB |
3155 | char *radix; |
3156 | int ch; | |
800eeca4 JW |
3157 | |
3158 | SKIP_WHITESPACE (); | |
800eeca4 | 3159 | |
fa30c84f JB |
3160 | if (is_it_end_of_statement ()) |
3161 | return; | |
3162 | radix = input_line_pointer; | |
3163 | ch = get_symbol_end (); | |
3164 | ia64_canonicalize_symbol_name (radix); | |
3165 | if (strcasecmp (radix, "C")) | |
ad4b42b4 | 3166 | as_bad (_("Radix `%s' unsupported or invalid"), radix); |
fa30c84f JB |
3167 | *input_line_pointer = ch; |
3168 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3169 | } |
3170 | ||
196e8040 JW |
3171 | /* Helper function for .loc directives. If the assembler is not generating |
3172 | line number info, then we need to remember which instructions have a .loc | |
3173 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3174 | ||
3175 | static void | |
3176 | dot_loc (int x) | |
3177 | { | |
3178 | CURR_SLOT.loc_directive_seen = 1; | |
3179 | dwarf2_directive_loc (x); | |
3180 | } | |
3181 | ||
800eeca4 JW |
3182 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3183 | static void | |
5a49b8ac | 3184 | dot_special_section (int which) |
800eeca4 JW |
3185 | { |
3186 | set_section ((char *) special_section_name[which]); | |
3187 | } | |
3188 | ||
07450571 L |
3189 | /* Return -1 for warning and 0 for error. */ |
3190 | ||
3191 | static int | |
970d6792 L |
3192 | unwind_diagnostic (const char * region, const char *directive) |
3193 | { | |
3194 | if (md.unwind_check == unwind_check_warning) | |
07450571 | 3195 | { |
ad4b42b4 | 3196 | as_warn (_(".%s outside of %s"), directive, region); |
07450571 L |
3197 | return -1; |
3198 | } | |
970d6792 L |
3199 | else |
3200 | { | |
ad4b42b4 | 3201 | as_bad (_(".%s outside of %s"), directive, region); |
970d6792 | 3202 | ignore_rest_of_line (); |
07450571 | 3203 | return 0; |
970d6792 L |
3204 | } |
3205 | } | |
3206 | ||
07450571 L |
3207 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3208 | a procedure but the unwind directive check is set to warning, 0 if | |
3209 | a directive isn't in a procedure and the unwind directive check is set | |
3210 | to error. */ | |
3211 | ||
75e09913 JB |
3212 | static int |
3213 | in_procedure (const char *directive) | |
3214 | { | |
5656b6b8 | 3215 | if (unwind.proc_pending.sym |
75e09913 JB |
3216 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3217 | return 1; | |
07450571 | 3218 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3219 | } |
3220 | ||
07450571 L |
3221 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3222 | a prologue but the unwind directive check is set to warning, 0 if | |
3223 | a directive isn't in a prologue and the unwind directive check is set | |
3224 | to error. */ | |
3225 | ||
75e09913 JB |
3226 | static int |
3227 | in_prologue (const char *directive) | |
3228 | { | |
07450571 | 3229 | int in = in_procedure (directive); |
ba825241 JB |
3230 | |
3231 | if (in > 0 && !unwind.prologue) | |
3232 | in = unwind_diagnostic ("prologue", directive); | |
3233 | check_pending_save (); | |
3234 | return in; | |
75e09913 JB |
3235 | } |
3236 | ||
07450571 L |
3237 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3238 | a body but the unwind directive check is set to warning, 0 if | |
3239 | a directive isn't in a body and the unwind directive check is set | |
3240 | to error. */ | |
3241 | ||
75e09913 JB |
3242 | static int |
3243 | in_body (const char *directive) | |
3244 | { | |
07450571 | 3245 | int in = in_procedure (directive); |
ba825241 JB |
3246 | |
3247 | if (in > 0 && !unwind.body) | |
3248 | in = unwind_diagnostic ("body region", directive); | |
3249 | return in; | |
75e09913 JB |
3250 | } |
3251 | ||
800eeca4 | 3252 | static void |
5a49b8ac | 3253 | add_unwind_entry (unw_rec_list *ptr, int sep) |
800eeca4 | 3254 | { |
e4e8248d JB |
3255 | if (ptr) |
3256 | { | |
3257 | if (unwind.tail) | |
3258 | unwind.tail->next = ptr; | |
3259 | else | |
3260 | unwind.list = ptr; | |
3261 | unwind.tail = ptr; | |
3262 | ||
3263 | /* The current entry can in fact be a chain of unwind entries. */ | |
3264 | if (unwind.current_entry == NULL) | |
3265 | unwind.current_entry = ptr; | |
3266 | } | |
800eeca4 JW |
3267 | |
3268 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3269 | if (unwind.current_entry == NULL) |
3270 | unwind.current_entry = ptr; | |
e4e8248d JB |
3271 | |
3272 | if (sep == ',') | |
3273 | { | |
3274 | /* Parse a tag permitted for the current directive. */ | |
3275 | int ch; | |
3276 | ||
3277 | SKIP_WHITESPACE (); | |
3278 | ch = get_symbol_end (); | |
3279 | /* FIXME: For now, just issue a warning that this isn't implemented. */ | |
3280 | { | |
3281 | static int warned; | |
3282 | ||
3283 | if (!warned) | |
3284 | { | |
3285 | warned = 1; | |
ad4b42b4 | 3286 | as_warn (_("Tags on unwind pseudo-ops aren't supported, yet")); |
e4e8248d JB |
3287 | } |
3288 | } | |
3289 | *input_line_pointer = ch; | |
3290 | } | |
3291 | if (sep != NOT_A_CHAR) | |
3292 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3293 | } |
3294 | ||
197865e8 | 3295 | static void |
5a49b8ac | 3296 | dot_fframe (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3297 | { |
3298 | expressionS e; | |
e4e8248d | 3299 | int sep; |
e0c9811a | 3300 | |
75e09913 JB |
3301 | if (!in_prologue ("fframe")) |
3302 | return; | |
3303 | ||
cd42ff9c | 3304 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3305 | |
800eeca4 | 3306 | if (e.X_op != O_constant) |
e4e8248d | 3307 | { |
ad4b42b4 | 3308 | as_bad (_("First operand to .fframe must be a constant")); |
e4e8248d JB |
3309 | e.X_add_number = 0; |
3310 | } | |
3311 | add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); | |
e0c9811a JW |
3312 | } |
3313 | ||
197865e8 | 3314 | static void |
5a49b8ac | 3315 | dot_vframe (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
3316 | { |
3317 | expressionS e; | |
3318 | unsigned reg; | |
e4e8248d | 3319 | int sep; |
e0c9811a | 3320 | |
75e09913 JB |
3321 | if (!in_prologue ("vframe")) |
3322 | return; | |
3323 | ||
cd42ff9c | 3324 | sep = parse_operand_and_eval (&e, ','); |
e0c9811a | 3325 | reg = e.X_add_number - REG_GR; |
e4e8248d | 3326 | if (e.X_op != O_register || reg > 127) |
800eeca4 | 3327 | { |
ad4b42b4 | 3328 | as_bad (_("First operand to .vframe must be a general register")); |
e4e8248d | 3329 | reg = 0; |
800eeca4 | 3330 | } |
e4e8248d JB |
3331 | add_unwind_entry (output_mem_stack_v (), sep); |
3332 | if (! (unwind.prologue_mask & 2)) | |
3333 | add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); | |
3334 | else if (reg != unwind.prologue_gr | |
3335 | + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) | |
ad4b42b4 | 3336 | as_warn (_("Operand of .vframe contradicts .prologue")); |
800eeca4 JW |
3337 | } |
3338 | ||
197865e8 | 3339 | static void |
5a49b8ac | 3340 | dot_vframesp (int psp) |
800eeca4 | 3341 | { |
e0c9811a | 3342 | expressionS e; |
e4e8248d | 3343 | int sep; |
e0c9811a | 3344 | |
e4e8248d | 3345 | if (psp) |
ad4b42b4 | 3346 | as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant")); |
e0c9811a | 3347 | |
e4e8248d | 3348 | if (!in_prologue ("vframesp")) |
75e09913 JB |
3349 | return; |
3350 | ||
cd42ff9c | 3351 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3352 | if (e.X_op != O_constant) |
e0c9811a | 3353 | { |
ad4b42b4 | 3354 | as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)")); |
e4e8248d | 3355 | e.X_add_number = 0; |
e0c9811a | 3356 | } |
e4e8248d JB |
3357 | add_unwind_entry (output_mem_stack_v (), sep); |
3358 | add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); | |
800eeca4 JW |
3359 | } |
3360 | ||
197865e8 | 3361 | static void |
5a49b8ac | 3362 | dot_save (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3363 | { |
3364 | expressionS e1, e2; | |
e4e8248d | 3365 | unsigned reg1, reg2; |
800eeca4 | 3366 | int sep; |
800eeca4 | 3367 | |
75e09913 JB |
3368 | if (!in_prologue ("save")) |
3369 | return; | |
3370 | ||
cd42ff9c | 3371 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3372 | if (sep == ',') |
cd42ff9c | 3373 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3374 | else |
3375 | e2.X_op = O_absent; | |
800eeca4 | 3376 | |
e0c9811a | 3377 | reg1 = e1.X_add_number; |
800eeca4 | 3378 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3379 | if (e1.X_op != O_register) |
800eeca4 | 3380 | { |
ad4b42b4 | 3381 | as_bad (_("First operand to .save not a register")); |
e4e8248d JB |
3382 | reg1 = REG_PR; /* Anything valid is good here. */ |
3383 | } | |
3384 | reg2 = e2.X_add_number - REG_GR; | |
3385 | if (e2.X_op != O_register || reg2 > 127) | |
3386 | { | |
ad4b42b4 | 3387 | as_bad (_("Second operand to .save not a valid register")); |
e4e8248d JB |
3388 | reg2 = 0; |
3389 | } | |
3390 | switch (reg1) | |
3391 | { | |
3392 | case REG_AR + AR_BSP: | |
3393 | add_unwind_entry (output_bsp_when (), sep); | |
3394 | add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); | |
3395 | break; | |
3396 | case REG_AR + AR_BSPSTORE: | |
3397 | add_unwind_entry (output_bspstore_when (), sep); | |
3398 | add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); | |
3399 | break; | |
3400 | case REG_AR + AR_RNAT: | |
3401 | add_unwind_entry (output_rnat_when (), sep); | |
3402 | add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); | |
3403 | break; | |
3404 | case REG_AR + AR_UNAT: | |
3405 | add_unwind_entry (output_unat_when (), sep); | |
3406 | add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); | |
3407 | break; | |
3408 | case REG_AR + AR_FPSR: | |
3409 | add_unwind_entry (output_fpsr_when (), sep); | |
3410 | add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); | |
3411 | break; | |
3412 | case REG_AR + AR_PFS: | |
3413 | add_unwind_entry (output_pfs_when (), sep); | |
3414 | if (! (unwind.prologue_mask & 4)) | |
3415 | add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); | |
3416 | else if (reg2 != unwind.prologue_gr | |
3417 | + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) | |
ad4b42b4 | 3418 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3419 | break; |
3420 | case REG_AR + AR_LC: | |
3421 | add_unwind_entry (output_lc_when (), sep); | |
3422 | add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); | |
3423 | break; | |
3424 | case REG_BR: | |
3425 | add_unwind_entry (output_rp_when (), sep); | |
3426 | if (! (unwind.prologue_mask & 8)) | |
3427 | add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); | |
3428 | else if (reg2 != unwind.prologue_gr) | |
ad4b42b4 | 3429 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3430 | break; |
3431 | case REG_PR: | |
3432 | add_unwind_entry (output_preds_when (), sep); | |
3433 | if (! (unwind.prologue_mask & 1)) | |
3434 | add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); | |
3435 | else if (reg2 != unwind.prologue_gr | |
3436 | + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) | |
ad4b42b4 | 3437 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3438 | break; |
3439 | case REG_PRIUNAT: | |
3440 | add_unwind_entry (output_priunat_when_gr (), sep); | |
3441 | add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); | |
3442 | break; | |
3443 | default: | |
ad4b42b4 | 3444 | as_bad (_("First operand to .save not a valid register")); |
e4e8248d JB |
3445 | add_unwind_entry (NULL, sep); |
3446 | break; | |
800eeca4 | 3447 | } |
800eeca4 JW |
3448 | } |
3449 | ||
197865e8 | 3450 | static void |
5a49b8ac | 3451 | dot_restore (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3452 | { |
e4e8248d | 3453 | expressionS e1; |
33d01f33 | 3454 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3455 | int sep; |
3456 | ||
75e09913 JB |
3457 | if (!in_body ("restore")) |
3458 | return; | |
3459 | ||
cd42ff9c | 3460 | sep = parse_operand_and_eval (&e1, ','); |
e0c9811a | 3461 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) |
ad4b42b4 | 3462 | as_bad (_("First operand to .restore must be stack pointer (sp)")); |
e0c9811a JW |
3463 | |
3464 | if (sep == ',') | |
3465 | { | |
e4e8248d JB |
3466 | expressionS e2; |
3467 | ||
cd42ff9c | 3468 | sep = parse_operand_and_eval (&e2, ','); |
33d01f33 | 3469 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3470 | { |
ad4b42b4 | 3471 | as_bad (_("Second operand to .restore must be a constant >= 0")); |
e4e8248d | 3472 | e2.X_add_number = 0; |
e0c9811a | 3473 | } |
33d01f33 | 3474 | ecount = e2.X_add_number; |
e0c9811a | 3475 | } |
33d01f33 JW |
3476 | else |
3477 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3478 | |
3479 | if (ecount >= unwind.prologue_count) | |
3480 | { | |
ad4b42b4 | 3481 | as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"), |
6290819d | 3482 | ecount + 1, unwind.prologue_count); |
e4e8248d | 3483 | ecount = 0; |
6290819d NC |
3484 | } |
3485 | ||
e4e8248d | 3486 | add_unwind_entry (output_epilogue (ecount), sep); |
33d01f33 JW |
3487 | |
3488 | if (ecount < unwind.prologue_count) | |
3489 | unwind.prologue_count -= ecount + 1; | |
3490 | else | |
3491 | unwind.prologue_count = 0; | |
e0c9811a JW |
3492 | } |
3493 | ||
197865e8 | 3494 | static void |
5a49b8ac | 3495 | dot_restorereg (int pred) |
e0c9811a JW |
3496 | { |
3497 | unsigned int qp, ab, reg; | |
e4e8248d | 3498 | expressionS e; |
e0c9811a | 3499 | int sep; |
e4e8248d | 3500 | const char * const po = pred ? "restorereg.p" : "restorereg"; |
e0c9811a | 3501 | |
e4e8248d | 3502 | if (!in_procedure (po)) |
75e09913 JB |
3503 | return; |
3504 | ||
e4e8248d JB |
3505 | if (pred) |
3506 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3507 | else | |
e0c9811a | 3508 | { |
cd42ff9c | 3509 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3510 | qp = 0; |
e0c9811a | 3511 | } |
e4e8248d | 3512 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3513 | |
e4e8248d | 3514 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); |
800eeca4 JW |
3515 | } |
3516 | ||
2d6ed997 L |
3517 | static char *special_linkonce_name[] = |
3518 | { | |
3519 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3520 | }; | |
3521 | ||
3522 | static void | |
da9f89d4 | 3523 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3524 | { |
3525 | /* | |
3526 | Use a slightly ugly scheme to derive the unwind section names from | |
3527 | the text section name: | |
3528 | ||
3529 | text sect. unwind table sect. | |
3530 | name: name: comments: | |
3531 | ---------- ----------------- -------------------------------- | |
3532 | .text .IA_64.unwind | |
3533 | .text.foo .IA_64.unwind.text.foo | |
3534 | .foo .IA_64.unwind.foo | |
3535 | .gnu.linkonce.t.foo | |
3536 | .gnu.linkonce.ia64unw.foo | |
3537 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3538 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3539 | ||
3540 | This mapping is done so that: | |
3541 | ||
3542 | (a) An object file with unwind info only in .text will use | |
3543 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3544 | This follows the letter of the ABI and also ensures backwards | |
3545 | compatibility with older toolchains. | |
3546 | ||
3547 | (b) An object file with unwind info in multiple text sections | |
3548 | will use separate unwind sections for each text section. | |
3549 | This allows us to properly set the "sh_info" and "sh_link" | |
3550 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3551 | lets GNU ld support programs with multiple segments | |
3552 | containing unwind info (as might be the case for certain | |
3553 | embedded applications). | |
3554 | ||
3555 | (c) An error is issued if there would be a name clash. | |
3556 | */ | |
3557 | ||
3558 | const char *text_name, *sec_text_name; | |
3559 | char *sec_name; | |
3560 | const char *prefix = special_section_name [sec_index]; | |
3561 | const char *suffix; | |
3562 | size_t prefix_len, suffix_len, sec_name_len; | |
3563 | ||
3564 | sec_text_name = segment_name (text_seg); | |
3565 | text_name = sec_text_name; | |
3566 | if (strncmp (text_name, "_info", 5) == 0) | |
3567 | { | |
ad4b42b4 | 3568 | as_bad (_("Illegal section name `%s' (causes unwind section name clash)"), |
2d6ed997 L |
3569 | text_name); |
3570 | ignore_rest_of_line (); | |
3571 | return; | |
3572 | } | |
3573 | if (strcmp (text_name, ".text") == 0) | |
3574 | text_name = ""; | |
3575 | ||
3576 | /* Build the unwind section name by appending the (possibly stripped) | |
3577 | text section name to the unwind prefix. */ | |
3578 | suffix = text_name; | |
3579 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3580 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3581 | { | |
3582 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3583 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3584 | } | |
3585 | ||
3586 | prefix_len = strlen (prefix); | |
3587 | suffix_len = strlen (suffix); | |
3588 | sec_name_len = prefix_len + suffix_len; | |
3589 | sec_name = alloca (sec_name_len + 1); | |
3590 | memcpy (sec_name, prefix, prefix_len); | |
3591 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3592 | sec_name [sec_name_len] = '\0'; | |
3593 | ||
3594 | /* Handle COMDAT group. */ | |
6e3f953d L |
3595 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3596 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3597 | { |
3598 | char *section; | |
3599 | size_t len, group_name_len; | |
3600 | const char *group_name = elf_group_name (text_seg); | |
3601 | ||
3602 | if (group_name == NULL) | |
3603 | { | |
ad4b42b4 | 3604 | as_bad (_("Group section `%s' has no group signature"), |
2d6ed997 L |
3605 | sec_text_name); |
3606 | ignore_rest_of_line (); | |
3607 | return; | |
3608 | } | |
3609 | /* We have to construct a fake section directive. */ | |
3610 | group_name_len = strlen (group_name); | |
3611 | len = (sec_name_len | |
3612 | + 16 /* ,"aG",@progbits, */ | |
3613 | + group_name_len /* ,group_name */ | |
3614 | + 7); /* ,comdat */ | |
3615 | ||
3616 | section = alloca (len + 1); | |
3617 | memcpy (section, sec_name, sec_name_len); | |
3618 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3619 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3620 | memcpy (section + len - 7, ",comdat", 7); | |
3621 | section [len] = '\0'; | |
3622 | set_section (section); | |
3623 | } | |
3624 | else | |
3625 | { | |
3626 | set_section (sec_name); | |
3627 | bfd_set_section_flags (stdoutput, now_seg, | |
3628 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3629 | } | |
38ce5b11 L |
3630 | |
3631 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3632 | } |
3633 | ||
73f20958 | 3634 | static void |
2d6ed997 | 3635 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3636 | { |
73f20958 L |
3637 | int size, pad; |
3638 | unw_rec_list *list; | |
800eeca4 | 3639 | |
c97b7ef6 JW |
3640 | /* Mark the end of the unwind info, so that we can compute the size of the |
3641 | last unwind region. */ | |
e4e8248d | 3642 | add_unwind_entry (output_endp (), NOT_A_CHAR); |
c97b7ef6 | 3643 | |
10850f29 JW |
3644 | /* Force out pending instructions, to make sure all unwind records have |
3645 | a valid slot_number field. */ | |
3646 | ia64_flush_insns (); | |
3647 | ||
800eeca4 | 3648 | /* Generate the unwind record. */ |
73f20958 | 3649 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3650 | fixup_unw_records (list, 1); |
73f20958 L |
3651 | size = calc_record_size (list); |
3652 | ||
3653 | if (size > 0 || unwind.force_unwind_entry) | |
3654 | { | |
3655 | unwind.force_unwind_entry = 0; | |
3656 | /* pad to pointer-size boundary. */ | |
3657 | pad = size % md.pointer_size; | |
3658 | if (pad != 0) | |
3659 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3660 | /* Add 8 for the header. */ |
3661 | size += 8; | |
3662 | /* Add a pointer for the personality offset. */ | |
3663 | if (unwind.personality_routine) | |
3664 | size += md.pointer_size; | |
73f20958 | 3665 | } |
6290819d | 3666 | |
800eeca4 JW |
3667 | /* If there are unwind records, switch sections, and output the info. */ |
3668 | if (size != 0) | |
3669 | { | |
800eeca4 | 3670 | expressionS exp; |
1cd8ff38 | 3671 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3672 | |
da9f89d4 | 3673 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3674 | |
557debba JW |
3675 | /* Make sure the section has 4 byte alignment for ILP32 and |
3676 | 8 byte alignment for LP64. */ | |
3677 | frag_align (md.pointer_size_shift, 0, 0); | |
3678 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3679 | |
800eeca4 | 3680 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3681 | unwind.info = expr_build_dot (); |
73f20958 L |
3682 | |
3683 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3684 | (offsetT) (long) unwind.personality_routine, |
3685 | (char *) list); | |
91a2ae2a | 3686 | |
800eeca4 | 3687 | /* Add the personality address to the image. */ |
e0c9811a | 3688 | if (unwind.personality_routine != 0) |
542d6675 | 3689 | { |
40449e9f | 3690 | exp.X_op = O_symbol; |
e0c9811a | 3691 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3692 | exp.X_add_number = 0; |
1cd8ff38 NC |
3693 | |
3694 | if (md.flags & EF_IA_64_BE) | |
3695 | { | |
3696 | if (md.flags & EF_IA_64_ABI64) | |
3697 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3698 | else | |
3699 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3700 | } | |
40449e9f | 3701 | else |
1cd8ff38 NC |
3702 | { |
3703 | if (md.flags & EF_IA_64_ABI64) | |
3704 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3705 | else | |
3706 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3707 | } | |
3708 | ||
3709 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3710 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3711 | unwind.personality_routine = 0; |
542d6675 | 3712 | } |
800eeca4 JW |
3713 | } |
3714 | ||
6290819d | 3715 | free_saved_prologue_counts (); |
e0c9811a | 3716 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3717 | } |
3718 | ||
197865e8 | 3719 | static void |
5a49b8ac | 3720 | dot_handlerdata (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3721 | { |
75e09913 JB |
3722 | if (!in_procedure ("handlerdata")) |
3723 | return; | |
91a2ae2a RH |
3724 | unwind.force_unwind_entry = 1; |
3725 | ||
3726 | /* Remember which segment we're in so we can switch back after .endp */ | |
3727 | unwind.saved_text_seg = now_seg; | |
3728 | unwind.saved_text_subseg = now_subseg; | |
3729 | ||
3730 | /* Generate unwind info into unwind-info section and then leave that | |
3731 | section as the currently active one so dataXX directives go into | |
3732 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3733 | generate_unwind_image (now_seg); |
e0c9811a | 3734 | demand_empty_rest_of_line (); |
800eeca4 JW |
3735 | } |
3736 | ||
197865e8 | 3737 | static void |
5a49b8ac | 3738 | dot_unwentry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3739 | { |
75e09913 JB |
3740 | if (!in_procedure ("unwentry")) |
3741 | return; | |
91a2ae2a | 3742 | unwind.force_unwind_entry = 1; |
e0c9811a | 3743 | demand_empty_rest_of_line (); |
800eeca4 JW |
3744 | } |
3745 | ||
197865e8 | 3746 | static void |
5a49b8ac | 3747 | dot_altrp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3748 | { |
e0c9811a JW |
3749 | expressionS e; |
3750 | unsigned reg; | |
3751 | ||
75e09913 JB |
3752 | if (!in_prologue ("altrp")) |
3753 | return; | |
3754 | ||
cd42ff9c | 3755 | parse_operand_and_eval (&e, 0); |
e0c9811a | 3756 | reg = e.X_add_number - REG_BR; |
e4e8248d JB |
3757 | if (e.X_op != O_register || reg > 7) |
3758 | { | |
ad4b42b4 | 3759 | as_bad (_("First operand to .altrp not a valid branch register")); |
e4e8248d JB |
3760 | reg = 0; |
3761 | } | |
3762 | add_unwind_entry (output_rp_br (reg), 0); | |
800eeca4 JW |
3763 | } |
3764 | ||
197865e8 | 3765 | static void |
5a49b8ac | 3766 | dot_savemem (int psprel) |
800eeca4 JW |
3767 | { |
3768 | expressionS e1, e2; | |
3769 | int sep; | |
3770 | int reg1, val; | |
e4e8248d | 3771 | const char * const po = psprel ? "savepsp" : "savesp"; |
800eeca4 | 3772 | |
e4e8248d | 3773 | if (!in_prologue (po)) |
75e09913 JB |
3774 | return; |
3775 | ||
cd42ff9c | 3776 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3777 | if (sep == ',') |
cd42ff9c | 3778 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3779 | else |
3780 | e2.X_op = O_absent; | |
800eeca4 | 3781 | |
e0c9811a | 3782 | reg1 = e1.X_add_number; |
800eeca4 | 3783 | val = e2.X_add_number; |
197865e8 | 3784 | |
800eeca4 | 3785 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3786 | if (e1.X_op != O_register) |
800eeca4 | 3787 | { |
ad4b42b4 | 3788 | as_bad (_("First operand to .%s not a register"), po); |
e4e8248d JB |
3789 | reg1 = REG_PR; /* Anything valid is good here. */ |
3790 | } | |
3791 | if (e2.X_op != O_constant) | |
3792 | { | |
ad4b42b4 | 3793 | as_bad (_("Second operand to .%s not a constant"), po); |
e4e8248d JB |
3794 | val = 0; |
3795 | } | |
3796 | ||
3797 | switch (reg1) | |
3798 | { | |
3799 | case REG_AR + AR_BSP: | |
3800 | add_unwind_entry (output_bsp_when (), sep); | |
3801 | add_unwind_entry ((psprel | |
3802 | ? output_bsp_psprel | |
3803 | : output_bsp_sprel) (val), NOT_A_CHAR); | |
3804 | break; | |
3805 | case REG_AR + AR_BSPSTORE: | |
3806 | add_unwind_entry (output_bspstore_when (), sep); | |
3807 | add_unwind_entry ((psprel | |
3808 | ? output_bspstore_psprel | |
3809 | : output_bspstore_sprel) (val), NOT_A_CHAR); | |
3810 | break; | |
3811 | case REG_AR + AR_RNAT: | |
3812 | add_unwind_entry (output_rnat_when (), sep); | |
3813 | add_unwind_entry ((psprel | |
3814 | ? output_rnat_psprel | |
3815 | : output_rnat_sprel) (val), NOT_A_CHAR); | |
3816 | break; | |
3817 | case REG_AR + AR_UNAT: | |
3818 | add_unwind_entry (output_unat_when (), sep); | |
3819 | add_unwind_entry ((psprel | |
3820 | ? output_unat_psprel | |
3821 | : output_unat_sprel) (val), NOT_A_CHAR); | |
3822 | break; | |
3823 | case REG_AR + AR_FPSR: | |
3824 | add_unwind_entry (output_fpsr_when (), sep); | |
3825 | add_unwind_entry ((psprel | |
3826 | ? output_fpsr_psprel | |
3827 | : output_fpsr_sprel) (val), NOT_A_CHAR); | |
3828 | break; | |
3829 | case REG_AR + AR_PFS: | |
3830 | add_unwind_entry (output_pfs_when (), sep); | |
3831 | add_unwind_entry ((psprel | |
3832 | ? output_pfs_psprel | |
3833 | : output_pfs_sprel) (val), NOT_A_CHAR); | |
3834 | break; | |
3835 | case REG_AR + AR_LC: | |
3836 | add_unwind_entry (output_lc_when (), sep); | |
3837 | add_unwind_entry ((psprel | |
3838 | ? output_lc_psprel | |
3839 | : output_lc_sprel) (val), NOT_A_CHAR); | |
3840 | break; | |
3841 | case REG_BR: | |
3842 | add_unwind_entry (output_rp_when (), sep); | |
3843 | add_unwind_entry ((psprel | |
3844 | ? output_rp_psprel | |
3845 | : output_rp_sprel) (val), NOT_A_CHAR); | |
3846 | break; | |
3847 | case REG_PR: | |
3848 | add_unwind_entry (output_preds_when (), sep); | |
3849 | add_unwind_entry ((psprel | |
3850 | ? output_preds_psprel | |
3851 | : output_preds_sprel) (val), NOT_A_CHAR); | |
3852 | break; | |
3853 | case REG_PRIUNAT: | |
3854 | add_unwind_entry (output_priunat_when_mem (), sep); | |
3855 | add_unwind_entry ((psprel | |
3856 | ? output_priunat_psprel | |
3857 | : output_priunat_sprel) (val), NOT_A_CHAR); | |
3858 | break; | |
3859 | default: | |
ad4b42b4 | 3860 | as_bad (_("First operand to .%s not a valid register"), po); |
e4e8248d JB |
3861 | add_unwind_entry (NULL, sep); |
3862 | break; | |
800eeca4 | 3863 | } |
800eeca4 JW |
3864 | } |
3865 | ||
197865e8 | 3866 | static void |
5a49b8ac | 3867 | dot_saveg (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3868 | { |
e4e8248d JB |
3869 | expressionS e; |
3870 | unsigned grmask; | |
800eeca4 | 3871 | int sep; |
75e09913 JB |
3872 | |
3873 | if (!in_prologue ("save.g")) | |
3874 | return; | |
3875 | ||
cd42ff9c | 3876 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3877 | |
e4e8248d JB |
3878 | grmask = e.X_add_number; |
3879 | if (e.X_op != O_constant | |
3880 | || e.X_add_number <= 0 | |
3881 | || e.X_add_number > 0xf) | |
800eeca4 | 3882 | { |
ad4b42b4 | 3883 | as_bad (_("First operand to .save.g must be a positive 4-bit constant")); |
e4e8248d JB |
3884 | grmask = 0; |
3885 | } | |
3886 | ||
3887 | if (sep == ',') | |
3888 | { | |
3889 | unsigned reg; | |
3890 | int n = popcount (grmask); | |
3891 | ||
cd42ff9c | 3892 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3893 | reg = e.X_add_number - REG_GR; |
3894 | if (e.X_op != O_register || reg > 127) | |
542d6675 | 3895 | { |
ad4b42b4 | 3896 | as_bad (_("Second operand to .save.g must be a general register")); |
e4e8248d JB |
3897 | reg = 0; |
3898 | } | |
3899 | else if (reg > 128U - n) | |
3900 | { | |
ad4b42b4 | 3901 | as_bad (_("Second operand to .save.g must be the first of %d general registers"), n); |
e4e8248d | 3902 | reg = 0; |
800eeca4 | 3903 | } |
e4e8248d | 3904 | add_unwind_entry (output_gr_gr (grmask, reg), 0); |
800eeca4 | 3905 | } |
e4e8248d JB |
3906 | else |
3907 | add_unwind_entry (output_gr_mem (grmask), 0); | |
800eeca4 JW |
3908 | } |
3909 | ||
197865e8 | 3910 | static void |
5a49b8ac | 3911 | dot_savef (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3912 | { |
e4e8248d | 3913 | expressionS e; |
75e09913 JB |
3914 | |
3915 | if (!in_prologue ("save.f")) | |
3916 | return; | |
3917 | ||
cd42ff9c | 3918 | parse_operand_and_eval (&e, 0); |
197865e8 | 3919 | |
e4e8248d JB |
3920 | if (e.X_op != O_constant |
3921 | || e.X_add_number <= 0 | |
3922 | || e.X_add_number > 0xfffff) | |
3923 | { | |
ad4b42b4 | 3924 | as_bad (_("Operand to .save.f must be a positive 20-bit constant")); |
e4e8248d JB |
3925 | e.X_add_number = 0; |
3926 | } | |
3927 | add_unwind_entry (output_fr_mem (e.X_add_number), 0); | |
800eeca4 JW |
3928 | } |
3929 | ||
197865e8 | 3930 | static void |
5a49b8ac | 3931 | dot_saveb (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3932 | { |
e4e8248d JB |
3933 | expressionS e; |
3934 | unsigned brmask; | |
3935 | int sep; | |
e0c9811a | 3936 | |
75e09913 JB |
3937 | if (!in_prologue ("save.b")) |
3938 | return; | |
3939 | ||
cd42ff9c | 3940 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3941 | |
3942 | brmask = e.X_add_number; | |
3943 | if (e.X_op != O_constant | |
3944 | || e.X_add_number <= 0 | |
3945 | || e.X_add_number > 0x1f) | |
800eeca4 | 3946 | { |
ad4b42b4 | 3947 | as_bad (_("First operand to .save.b must be a positive 5-bit constant")); |
e4e8248d | 3948 | brmask = 0; |
800eeca4 | 3949 | } |
e0c9811a JW |
3950 | |
3951 | if (sep == ',') | |
3952 | { | |
e4e8248d JB |
3953 | unsigned reg; |
3954 | int n = popcount (brmask); | |
3955 | ||
cd42ff9c | 3956 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3957 | reg = e.X_add_number - REG_GR; |
3958 | if (e.X_op != O_register || reg > 127) | |
e0c9811a | 3959 | { |
ad4b42b4 | 3960 | as_bad (_("Second operand to .save.b must be a general register")); |
e4e8248d | 3961 | reg = 0; |
e0c9811a | 3962 | } |
e4e8248d JB |
3963 | else if (reg > 128U - n) |
3964 | { | |
ad4b42b4 | 3965 | as_bad (_("Second operand to .save.b must be the first of %d general registers"), n); |
e4e8248d JB |
3966 | reg = 0; |
3967 | } | |
3968 | add_unwind_entry (output_br_gr (brmask, reg), 0); | |
e0c9811a JW |
3969 | } |
3970 | else | |
e4e8248d | 3971 | add_unwind_entry (output_br_mem (brmask), 0); |
800eeca4 JW |
3972 | } |
3973 | ||
197865e8 | 3974 | static void |
5a49b8ac | 3975 | dot_savegf (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3976 | { |
3977 | expressionS e1, e2; | |
75e09913 JB |
3978 | |
3979 | if (!in_prologue ("save.gf")) | |
3980 | return; | |
3981 | ||
cd42ff9c AM |
3982 | if (parse_operand_and_eval (&e1, ',') == ',') |
3983 | parse_operand_and_eval (&e2, 0); | |
800eeca4 | 3984 | else |
e4e8248d JB |
3985 | e2.X_op = O_absent; |
3986 | ||
3987 | if (e1.X_op != O_constant | |
3988 | || e1.X_add_number < 0 | |
3989 | || e1.X_add_number > 0xf) | |
3990 | { | |
ad4b42b4 | 3991 | as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant")); |
e4e8248d JB |
3992 | e1.X_op = O_absent; |
3993 | e1.X_add_number = 0; | |
3994 | } | |
3995 | if (e2.X_op != O_constant | |
3996 | || e2.X_add_number < 0 | |
3997 | || e2.X_add_number > 0xfffff) | |
800eeca4 | 3998 | { |
ad4b42b4 | 3999 | as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant")); |
e4e8248d JB |
4000 | e2.X_op = O_absent; |
4001 | e2.X_add_number = 0; | |
800eeca4 | 4002 | } |
e4e8248d JB |
4003 | if (e1.X_op == O_constant |
4004 | && e2.X_op == O_constant | |
4005 | && e1.X_add_number == 0 | |
4006 | && e2.X_add_number == 0) | |
ad4b42b4 | 4007 | as_bad (_("Operands to .save.gf may not be both zero")); |
e4e8248d JB |
4008 | |
4009 | add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); | |
800eeca4 JW |
4010 | } |
4011 | ||
197865e8 | 4012 | static void |
5a49b8ac | 4013 | dot_spill (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4014 | { |
4015 | expressionS e; | |
e0c9811a | 4016 | |
75e09913 JB |
4017 | if (!in_prologue ("spill")) |
4018 | return; | |
4019 | ||
cd42ff9c | 4020 | parse_operand_and_eval (&e, 0); |
197865e8 | 4021 | |
800eeca4 | 4022 | if (e.X_op != O_constant) |
800eeca4 | 4023 | { |
ad4b42b4 | 4024 | as_bad (_("Operand to .spill must be a constant")); |
e4e8248d | 4025 | e.X_add_number = 0; |
e0c9811a | 4026 | } |
e4e8248d | 4027 | add_unwind_entry (output_spill_base (e.X_add_number), 0); |
e0c9811a JW |
4028 | } |
4029 | ||
4030 | static void | |
5a49b8ac | 4031 | dot_spillreg (int pred) |
e0c9811a | 4032 | { |
2132e3a3 | 4033 | int sep; |
e4e8248d JB |
4034 | unsigned int qp, ab, xy, reg, treg; |
4035 | expressionS e; | |
4036 | const char * const po = pred ? "spillreg.p" : "spillreg"; | |
e0c9811a | 4037 | |
e4e8248d | 4038 | if (!in_procedure (po)) |
75e09913 JB |
4039 | return; |
4040 | ||
e4e8248d JB |
4041 | if (pred) |
4042 | sep = parse_predicate_and_operand (&e, &qp, po); | |
e0c9811a | 4043 | else |
e0c9811a | 4044 | { |
cd42ff9c | 4045 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 4046 | qp = 0; |
e0c9811a | 4047 | } |
e4e8248d | 4048 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4049 | |
e4e8248d | 4050 | if (sep == ',') |
cd42ff9c | 4051 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
4052 | else |
4053 | e.X_op = O_absent; | |
4054 | convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); | |
e0c9811a | 4055 | |
e4e8248d | 4056 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); |
e0c9811a JW |
4057 | } |
4058 | ||
4059 | static void | |
5a49b8ac | 4060 | dot_spillmem (int psprel) |
e0c9811a | 4061 | { |
e4e8248d JB |
4062 | expressionS e; |
4063 | int pred = (psprel < 0), sep; | |
4064 | unsigned int qp, ab, reg; | |
4065 | const char * po; | |
e0c9811a | 4066 | |
e4e8248d | 4067 | if (pred) |
e0c9811a | 4068 | { |
e4e8248d JB |
4069 | psprel = ~psprel; |
4070 | po = psprel ? "spillpsp.p" : "spillsp.p"; | |
e0c9811a | 4071 | } |
e4e8248d JB |
4072 | else |
4073 | po = psprel ? "spillpsp" : "spillsp"; | |
e0c9811a | 4074 | |
e4e8248d JB |
4075 | if (!in_procedure (po)) |
4076 | return; | |
e0c9811a | 4077 | |
e4e8248d JB |
4078 | if (pred) |
4079 | sep = parse_predicate_and_operand (&e, &qp, po); | |
4080 | else | |
e0c9811a | 4081 | { |
cd42ff9c | 4082 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 4083 | qp = 0; |
e0c9811a | 4084 | } |
e4e8248d | 4085 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4086 | |
e4e8248d | 4087 | if (sep == ',') |
cd42ff9c | 4088 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
4089 | else |
4090 | e.X_op = O_absent; | |
4091 | if (e.X_op != O_constant) | |
e0c9811a | 4092 | { |
ad4b42b4 | 4093 | as_bad (_("Operand %d to .%s must be a constant"), 2 + pred, po); |
e4e8248d | 4094 | e.X_add_number = 0; |
e0c9811a JW |
4095 | } |
4096 | ||
4097 | if (psprel) | |
e4e8248d | 4098 | add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a | 4099 | else |
e4e8248d | 4100 | add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a JW |
4101 | } |
4102 | ||
6290819d | 4103 | static unsigned int |
5a49b8ac | 4104 | get_saved_prologue_count (unsigned long lbl) |
6290819d NC |
4105 | { |
4106 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4107 | ||
4108 | while (lpc != NULL && lpc->label_number != lbl) | |
4109 | lpc = lpc->next; | |
4110 | ||
4111 | if (lpc != NULL) | |
4112 | return lpc->prologue_count; | |
4113 | ||
ad4b42b4 | 4114 | as_bad (_("Missing .label_state %ld"), lbl); |
6290819d NC |
4115 | return 1; |
4116 | } | |
4117 | ||
4118 | static void | |
5a49b8ac | 4119 | save_prologue_count (unsigned long lbl, unsigned int count) |
6290819d NC |
4120 | { |
4121 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4122 | ||
4123 | while (lpc != NULL && lpc->label_number != lbl) | |
4124 | lpc = lpc->next; | |
4125 | ||
4126 | if (lpc != NULL) | |
4127 | lpc->prologue_count = count; | |
4128 | else | |
4129 | { | |
40449e9f | 4130 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4131 | |
4132 | new_lpc->next = unwind.saved_prologue_counts; | |
4133 | new_lpc->label_number = lbl; | |
4134 | new_lpc->prologue_count = count; | |
4135 | unwind.saved_prologue_counts = new_lpc; | |
4136 | } | |
4137 | } | |
4138 | ||
4139 | static void | |
4140 | free_saved_prologue_counts () | |
4141 | { | |
40449e9f KH |
4142 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4143 | label_prologue_count *next; | |
6290819d NC |
4144 | |
4145 | while (lpc != NULL) | |
4146 | { | |
4147 | next = lpc->next; | |
4148 | free (lpc); | |
4149 | lpc = next; | |
4150 | } | |
4151 | ||
4152 | unwind.saved_prologue_counts = NULL; | |
4153 | } | |
4154 | ||
e0c9811a | 4155 | static void |
5a49b8ac | 4156 | dot_label_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4157 | { |
4158 | expressionS e; | |
4159 | ||
75e09913 JB |
4160 | if (!in_body ("label_state")) |
4161 | return; | |
4162 | ||
cd42ff9c | 4163 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4164 | if (e.X_op == O_constant) |
4165 | save_prologue_count (e.X_add_number, unwind.prologue_count); | |
4166 | else | |
e0c9811a | 4167 | { |
ad4b42b4 | 4168 | as_bad (_("Operand to .label_state must be a constant")); |
e4e8248d | 4169 | e.X_add_number = 0; |
e0c9811a | 4170 | } |
e4e8248d | 4171 | add_unwind_entry (output_label_state (e.X_add_number), 0); |
e0c9811a JW |
4172 | } |
4173 | ||
4174 | static void | |
5a49b8ac | 4175 | dot_copy_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4176 | { |
4177 | expressionS e; | |
4178 | ||
75e09913 JB |
4179 | if (!in_body ("copy_state")) |
4180 | return; | |
4181 | ||
cd42ff9c | 4182 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4183 | if (e.X_op == O_constant) |
4184 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); | |
4185 | else | |
e0c9811a | 4186 | { |
ad4b42b4 | 4187 | as_bad (_("Operand to .copy_state must be a constant")); |
e4e8248d | 4188 | e.X_add_number = 0; |
e0c9811a | 4189 | } |
e4e8248d | 4190 | add_unwind_entry (output_copy_state (e.X_add_number), 0); |
800eeca4 JW |
4191 | } |
4192 | ||
197865e8 | 4193 | static void |
5a49b8ac | 4194 | dot_unwabi (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4195 | { |
e0c9811a JW |
4196 | expressionS e1, e2; |
4197 | unsigned char sep; | |
4198 | ||
e4e8248d | 4199 | if (!in_prologue ("unwabi")) |
75e09913 JB |
4200 | return; |
4201 | ||
cd42ff9c | 4202 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 4203 | if (sep == ',') |
cd42ff9c | 4204 | parse_operand_and_eval (&e2, 0); |
e4e8248d JB |
4205 | else |
4206 | e2.X_op = O_absent; | |
e0c9811a JW |
4207 | |
4208 | if (e1.X_op != O_constant) | |
4209 | { | |
ad4b42b4 | 4210 | as_bad (_("First operand to .unwabi must be a constant")); |
e4e8248d | 4211 | e1.X_add_number = 0; |
e0c9811a JW |
4212 | } |
4213 | ||
4214 | if (e2.X_op != O_constant) | |
4215 | { | |
ad4b42b4 | 4216 | as_bad (_("Second operand to .unwabi must be a constant")); |
e4e8248d | 4217 | e2.X_add_number = 0; |
e0c9811a JW |
4218 | } |
4219 | ||
e4e8248d | 4220 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); |
800eeca4 JW |
4221 | } |
4222 | ||
197865e8 | 4223 | static void |
5a49b8ac | 4224 | dot_personality (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4225 | { |
4226 | char *name, *p, c; | |
75e09913 JB |
4227 | if (!in_procedure ("personality")) |
4228 | return; | |
800eeca4 JW |
4229 | SKIP_WHITESPACE (); |
4230 | name = input_line_pointer; | |
4231 | c = get_symbol_end (); | |
4232 | p = input_line_pointer; | |
e0c9811a | 4233 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4234 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4235 | *p = c; |
4236 | SKIP_WHITESPACE (); | |
4237 | demand_empty_rest_of_line (); | |
4238 | } | |
4239 | ||
4240 | static void | |
5a49b8ac | 4241 | dot_proc (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4242 | { |
4243 | char *name, *p, c; | |
4244 | symbolS *sym; | |
5656b6b8 JB |
4245 | proc_pending *pending, *last_pending; |
4246 | ||
4247 | if (unwind.proc_pending.sym) | |
4248 | { | |
4249 | (md.unwind_check == unwind_check_warning | |
4250 | ? as_warn | |
ad4b42b4 | 4251 | : as_bad) (_("Missing .endp after previous .proc")); |
5656b6b8 JB |
4252 | while (unwind.proc_pending.next) |
4253 | { | |
4254 | pending = unwind.proc_pending.next; | |
4255 | unwind.proc_pending.next = pending->next; | |
4256 | free (pending); | |
4257 | } | |
4258 | } | |
4259 | last_pending = NULL; | |
800eeca4 | 4260 | |
e0c9811a | 4261 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4262 | function symbols: */ |
800eeca4 JW |
4263 | while (1) |
4264 | { | |
4265 | SKIP_WHITESPACE (); | |
4266 | name = input_line_pointer; | |
4267 | c = get_symbol_end (); | |
4268 | p = input_line_pointer; | |
75e09913 | 4269 | if (!*name) |
ad4b42b4 | 4270 | as_bad (_("Empty argument of .proc")); |
75e09913 | 4271 | else |
542d6675 | 4272 | { |
75e09913 JB |
4273 | sym = symbol_find_or_make (name); |
4274 | if (S_IS_DEFINED (sym)) | |
ad4b42b4 | 4275 | as_bad (_("`%s' was already defined"), name); |
5656b6b8 JB |
4276 | else if (!last_pending) |
4277 | { | |
4278 | unwind.proc_pending.sym = sym; | |
4279 | last_pending = &unwind.proc_pending; | |
4280 | } | |
4281 | else | |
75e09913 | 4282 | { |
5656b6b8 JB |
4283 | pending = xmalloc (sizeof (*pending)); |
4284 | pending->sym = sym; | |
4285 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4286 | } |
4287 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4288 | } |
800eeca4 JW |
4289 | *p = c; |
4290 | SKIP_WHITESPACE (); | |
4291 | if (*input_line_pointer != ',') | |
4292 | break; | |
4293 | ++input_line_pointer; | |
4294 | } | |
5656b6b8 JB |
4295 | if (!last_pending) |
4296 | { | |
4297 | unwind.proc_pending.sym = expr_build_dot (); | |
4298 | last_pending = &unwind.proc_pending; | |
4299 | } | |
4300 | last_pending->next = NULL; | |
800eeca4 JW |
4301 | demand_empty_rest_of_line (); |
4302 | ia64_do_align (16); | |
4303 | ||
75e09913 | 4304 | unwind.prologue = 0; |
33d01f33 | 4305 | unwind.prologue_count = 0; |
75e09913 JB |
4306 | unwind.body = 0; |
4307 | unwind.insn = 0; | |
e0c9811a JW |
4308 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4309 | unwind.personality_routine = 0; | |
800eeca4 JW |
4310 | } |
4311 | ||
4312 | static void | |
5a49b8ac | 4313 | dot_body (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4314 | { |
75e09913 JB |
4315 | if (!in_procedure ("body")) |
4316 | return; | |
4317 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
ad4b42b4 | 4318 | as_warn (_("Initial .body should precede any instructions")); |
ba825241 | 4319 | check_pending_save (); |
75e09913 | 4320 | |
e0c9811a | 4321 | unwind.prologue = 0; |
30d25259 | 4322 | unwind.prologue_mask = 0; |
75e09913 | 4323 | unwind.body = 1; |
30d25259 | 4324 | |
e4e8248d | 4325 | add_unwind_entry (output_body (), 0); |
800eeca4 JW |
4326 | } |
4327 | ||
4328 | static void | |
5a49b8ac | 4329 | dot_prologue (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4330 | { |
e4e8248d | 4331 | unsigned mask = 0, grsave = 0; |
e0c9811a | 4332 | |
75e09913 JB |
4333 | if (!in_procedure ("prologue")) |
4334 | return; | |
4335 | if (unwind.prologue) | |
4336 | { | |
ad4b42b4 | 4337 | as_bad (_(".prologue within prologue")); |
75e09913 JB |
4338 | ignore_rest_of_line (); |
4339 | return; | |
4340 | } | |
4341 | if (!unwind.body && unwind.insn) | |
ad4b42b4 | 4342 | as_warn (_("Initial .prologue should precede any instructions")); |
75e09913 | 4343 | |
e0c9811a | 4344 | if (!is_it_end_of_statement ()) |
800eeca4 | 4345 | { |
e4e8248d | 4346 | expressionS e; |
cd42ff9c | 4347 | int n, sep = parse_operand_and_eval (&e, ','); |
30d25259 | 4348 | |
e4e8248d JB |
4349 | if (e.X_op != O_constant |
4350 | || e.X_add_number < 0 | |
4351 | || e.X_add_number > 0xf) | |
ad4b42b4 | 4352 | as_bad (_("First operand to .prologue must be a positive 4-bit constant")); |
e4e8248d | 4353 | else if (e.X_add_number == 0) |
ad4b42b4 | 4354 | as_warn (_("Pointless use of zero first operand to .prologue")); |
e4e8248d JB |
4355 | else |
4356 | mask = e.X_add_number; | |
4357 | n = popcount (mask); | |
30d25259 | 4358 | |
e4e8248d | 4359 | if (sep == ',') |
cd42ff9c | 4360 | parse_operand_and_eval (&e, 0); |
800eeca4 | 4361 | else |
e4e8248d JB |
4362 | e.X_op = O_absent; |
4363 | if (e.X_op == O_constant | |
4364 | && e.X_add_number >= 0 | |
4365 | && e.X_add_number < 128) | |
4366 | { | |
4367 | if (md.unwind_check == unwind_check_error) | |
ad4b42b4 | 4368 | as_warn (_("Using a constant as second operand to .prologue is deprecated")); |
e4e8248d JB |
4369 | grsave = e.X_add_number; |
4370 | } | |
4371 | else if (e.X_op != O_register | |
4372 | || (grsave = e.X_add_number - REG_GR) > 127) | |
4373 | { | |
ad4b42b4 | 4374 | as_bad (_("Second operand to .prologue must be a general register")); |
e4e8248d JB |
4375 | grsave = 0; |
4376 | } | |
4377 | else if (grsave > 128U - n) | |
4378 | { | |
ad4b42b4 | 4379 | as_bad (_("Second operand to .prologue must be the first of %d general registers"), n); |
e4e8248d JB |
4380 | grsave = 0; |
4381 | } | |
4382 | ||
800eeca4 | 4383 | } |
e4e8248d JB |
4384 | |
4385 | if (mask) | |
4386 | add_unwind_entry (output_prologue_gr (mask, grsave), 0); | |
800eeca4 | 4387 | else |
e4e8248d | 4388 | add_unwind_entry (output_prologue (), 0); |
30d25259 RH |
4389 | |
4390 | unwind.prologue = 1; | |
4391 | unwind.prologue_mask = mask; | |
e4e8248d | 4392 | unwind.prologue_gr = grsave; |
75e09913 | 4393 | unwind.body = 0; |
33d01f33 | 4394 | ++unwind.prologue_count; |
800eeca4 JW |
4395 | } |
4396 | ||
4397 | static void | |
5a49b8ac | 4398 | dot_endp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4399 | { |
4400 | expressionS e; | |
44f5c83a | 4401 | int bytes_per_address; |
800eeca4 JW |
4402 | long where; |
4403 | segT saved_seg; | |
4404 | subsegT saved_subseg; | |
5656b6b8 | 4405 | proc_pending *pending; |
970d6792 | 4406 | int unwind_check = md.unwind_check; |
800eeca4 | 4407 | |
970d6792 | 4408 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4409 | if (!in_procedure ("endp")) |
4410 | return; | |
970d6792 | 4411 | md.unwind_check = unwind_check; |
75e09913 | 4412 | |
91a2ae2a RH |
4413 | if (unwind.saved_text_seg) |
4414 | { | |
4415 | saved_seg = unwind.saved_text_seg; | |
4416 | saved_subseg = unwind.saved_text_subseg; | |
4417 | unwind.saved_text_seg = NULL; | |
4418 | } | |
4419 | else | |
4420 | { | |
4421 | saved_seg = now_seg; | |
4422 | saved_subseg = now_subseg; | |
4423 | } | |
4424 | ||
800eeca4 | 4425 | insn_group_break (1, 0, 0); |
800eeca4 | 4426 | |
91a2ae2a RH |
4427 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4428 | if (!unwind.info) | |
2d6ed997 | 4429 | generate_unwind_image (saved_seg); |
800eeca4 | 4430 | |
91a2ae2a RH |
4431 | if (unwind.info || unwind.force_unwind_entry) |
4432 | { | |
75e09913 JB |
4433 | symbolS *proc_end; |
4434 | ||
91a2ae2a | 4435 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4436 | proc_end = expr_build_dot (); |
5e7474a7 | 4437 | |
da9f89d4 | 4438 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4439 | |
557debba JW |
4440 | /* Make sure that section has 4 byte alignment for ILP32 and |
4441 | 8 byte alignment for LP64. */ | |
4442 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4443 | |
557debba JW |
4444 | /* Need space for 3 pointers for procedure start, procedure end, |
4445 | and unwind info. */ | |
6baf2b51 | 4446 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4447 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4448 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4449 | |
40449e9f | 4450 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4451 | e.X_op = O_pseudo_fixup; |
4452 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4453 | e.X_add_number = 0; | |
5656b6b8 JB |
4454 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4455 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4456 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4457 | S_GET_VALUE (unwind.proc_pending.sym), | |
4458 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4459 | else |
5656b6b8 | 4460 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4461 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4462 | |
800eeca4 JW |
4463 | e.X_op = O_pseudo_fixup; |
4464 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4465 | e.X_add_number = 0; | |
75e09913 | 4466 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4467 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4468 | bytes_per_address, &e); | |
4469 | ||
4470 | if (unwind.info) | |
4471 | { | |
4472 | e.X_op = O_pseudo_fixup; | |
4473 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4474 | e.X_add_number = 0; | |
4475 | e.X_add_symbol = unwind.info; | |
4476 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4477 | bytes_per_address, &e); | |
4478 | } | |
91a2ae2a | 4479 | } |
800eeca4 | 4480 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4481 | |
5656b6b8 JB |
4482 | /* Set symbol sizes. */ |
4483 | pending = &unwind.proc_pending; | |
4484 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4485 | { |
5656b6b8 | 4486 | do |
75e09913 | 4487 | { |
5656b6b8 JB |
4488 | symbolS *sym = pending->sym; |
4489 | ||
4490 | if (!S_IS_DEFINED (sym)) | |
ad4b42b4 | 4491 | as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym)); |
5656b6b8 JB |
4492 | else if (S_GET_SIZE (sym) == 0 |
4493 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4494 | { |
75e09913 JB |
4495 | fragS *frag = symbol_get_frag (sym); |
4496 | ||
5656b6b8 | 4497 | if (frag) |
c538998c | 4498 | { |
75e09913 JB |
4499 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4500 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4501 | else | |
4502 | { | |
4503 | symbol_get_obj (sym)->size = | |
4504 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4505 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4506 | symbol_get_obj (sym)->size->X_add_symbol | |
4507 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4508 | frag_now_fix (), frag_now); | |
4509 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4510 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4511 | } | |
c538998c JJ |
4512 | } |
4513 | } | |
5656b6b8 JB |
4514 | } while ((pending = pending->next) != NULL); |
4515 | } | |
4516 | ||
4517 | /* Parse names of main and alternate entry points. */ | |
4518 | while (1) | |
4519 | { | |
4520 | char *name, *p, c; | |
4521 | ||
4522 | SKIP_WHITESPACE (); | |
4523 | name = input_line_pointer; | |
4524 | c = get_symbol_end (); | |
4525 | p = input_line_pointer; | |
4526 | if (!*name) | |
4527 | (md.unwind_check == unwind_check_warning | |
4528 | ? as_warn | |
ad4b42b4 | 4529 | : as_bad) (_("Empty argument of .endp")); |
5656b6b8 JB |
4530 | else |
4531 | { | |
4532 | symbolS *sym = symbol_find (name); | |
4533 | ||
4534 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4535 | { | |
4536 | if (sym == pending->sym) | |
4537 | { | |
4538 | pending->sym = NULL; | |
4539 | break; | |
4540 | } | |
4541 | } | |
4542 | if (!sym || !pending) | |
ad4b42b4 | 4543 | as_warn (_("`%s' was not specified with previous .proc"), name); |
c538998c JJ |
4544 | } |
4545 | *p = c; | |
4546 | SKIP_WHITESPACE (); | |
4547 | if (*input_line_pointer != ',') | |
4548 | break; | |
4549 | ++input_line_pointer; | |
4550 | } | |
4551 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4552 | |
4553 | /* Deliberately only checking for the main entry point here; the | |
4554 | language spec even says all arguments to .endp are ignored. */ | |
4555 | if (unwind.proc_pending.sym | |
4556 | && S_GET_NAME (unwind.proc_pending.sym) | |
4557 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
ad4b42b4 | 4558 | as_warn (_("`%s' should be an operand to this .endp"), |
5656b6b8 JB |
4559 | S_GET_NAME (unwind.proc_pending.sym)); |
4560 | while (unwind.proc_pending.next) | |
4561 | { | |
4562 | pending = unwind.proc_pending.next; | |
4563 | unwind.proc_pending.next = pending->next; | |
4564 | free (pending); | |
4565 | } | |
4566 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4567 | } |
4568 | ||
4569 | static void | |
d3ce72d0 | 4570 | dot_template (int template_val) |
800eeca4 | 4571 | { |
d3ce72d0 | 4572 | CURR_SLOT.user_template = template_val; |
800eeca4 JW |
4573 | } |
4574 | ||
4575 | static void | |
5a49b8ac | 4576 | dot_regstk (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4577 | { |
4578 | int ins, locs, outs, rots; | |
4579 | ||
4580 | if (is_it_end_of_statement ()) | |
4581 | ins = locs = outs = rots = 0; | |
4582 | else | |
4583 | { | |
4584 | ins = get_absolute_expression (); | |
4585 | if (*input_line_pointer++ != ',') | |
4586 | goto err; | |
4587 | locs = get_absolute_expression (); | |
4588 | if (*input_line_pointer++ != ',') | |
4589 | goto err; | |
4590 | outs = get_absolute_expression (); | |
4591 | if (*input_line_pointer++ != ',') | |
4592 | goto err; | |
4593 | rots = get_absolute_expression (); | |
4594 | } | |
4595 | set_regstack (ins, locs, outs, rots); | |
4596 | return; | |
4597 | ||
4598 | err: | |
ad4b42b4 | 4599 | as_bad (_("Comma expected")); |
800eeca4 JW |
4600 | ignore_rest_of_line (); |
4601 | } | |
4602 | ||
4603 | static void | |
5a49b8ac | 4604 | dot_rot (int type) |
800eeca4 | 4605 | { |
6a2375c6 JB |
4606 | offsetT num_regs; |
4607 | valueT num_alloced = 0; | |
800eeca4 JW |
4608 | struct dynreg **drpp, *dr; |
4609 | int ch, base_reg = 0; | |
4610 | char *name, *start; | |
4611 | size_t len; | |
4612 | ||
4613 | switch (type) | |
4614 | { | |
4615 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4616 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4617 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4618 | default: break; | |
4619 | } | |
4620 | ||
542d6675 | 4621 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4622 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4623 | { | |
db0bc284 | 4624 | hash_delete (md.dynreg_hash, dr->name, FALSE); |
20b36a95 | 4625 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4626 | dr->num_regs = 0; |
4627 | } | |
4628 | ||
4629 | drpp = &md.dynreg[type]; | |
4630 | while (1) | |
4631 | { | |
4632 | start = input_line_pointer; | |
4633 | ch = get_symbol_end (); | |
20b36a95 | 4634 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4635 | *input_line_pointer = ch; |
800eeca4 JW |
4636 | |
4637 | SKIP_WHITESPACE (); | |
4638 | if (*input_line_pointer != '[') | |
4639 | { | |
ad4b42b4 | 4640 | as_bad (_("Expected '['")); |
800eeca4 JW |
4641 | goto err; |
4642 | } | |
4643 | ++input_line_pointer; /* skip '[' */ | |
4644 | ||
4645 | num_regs = get_absolute_expression (); | |
4646 | ||
4647 | if (*input_line_pointer++ != ']') | |
4648 | { | |
ad4b42b4 | 4649 | as_bad (_("Expected ']'")); |
800eeca4 JW |
4650 | goto err; |
4651 | } | |
6a2375c6 JB |
4652 | if (num_regs <= 0) |
4653 | { | |
ad4b42b4 | 4654 | as_bad (_("Number of elements must be positive")); |
6a2375c6 JB |
4655 | goto err; |
4656 | } | |
800eeca4 JW |
4657 | SKIP_WHITESPACE (); |
4658 | ||
4659 | num_alloced += num_regs; | |
4660 | switch (type) | |
4661 | { | |
4662 | case DYNREG_GR: | |
4663 | if (num_alloced > md.rot.num_regs) | |
4664 | { | |
ad4b42b4 | 4665 | as_bad (_("Used more than the declared %d rotating registers"), |
800eeca4 JW |
4666 | md.rot.num_regs); |
4667 | goto err; | |
4668 | } | |
4669 | break; | |
4670 | case DYNREG_FR: | |
4671 | if (num_alloced > 96) | |
4672 | { | |
ad4b42b4 | 4673 | as_bad (_("Used more than the available 96 rotating registers")); |
800eeca4 JW |
4674 | goto err; |
4675 | } | |
4676 | break; | |
4677 | case DYNREG_PR: | |
4678 | if (num_alloced > 48) | |
4679 | { | |
ad4b42b4 | 4680 | as_bad (_("Used more than the available 48 rotating registers")); |
800eeca4 JW |
4681 | goto err; |
4682 | } | |
4683 | break; | |
4684 | ||
4685 | default: | |
4686 | break; | |
4687 | } | |
4688 | ||
800eeca4 JW |
4689 | if (!*drpp) |
4690 | { | |
4691 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4692 | memset (*drpp, 0, sizeof (*dr)); | |
4693 | } | |
4694 | ||
20b36a95 JB |
4695 | name = obstack_alloc (¬es, len + 1); |
4696 | memcpy (name, start, len); | |
4697 | name[len] = '\0'; | |
4698 | ||
800eeca4 JW |
4699 | dr = *drpp; |
4700 | dr->name = name; | |
4701 | dr->num_regs = num_regs; | |
4702 | dr->base = base_reg; | |
4703 | drpp = &dr->next; | |
4704 | base_reg += num_regs; | |
4705 | ||
4706 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4707 | { | |
ad4b42b4 | 4708 | as_bad (_("Attempt to redefine register set `%s'"), name); |
20b36a95 | 4709 | obstack_free (¬es, name); |
800eeca4 JW |
4710 | goto err; |
4711 | } | |
4712 | ||
4713 | if (*input_line_pointer != ',') | |
4714 | break; | |
4715 | ++input_line_pointer; /* skip comma */ | |
4716 | SKIP_WHITESPACE (); | |
4717 | } | |
4718 | demand_empty_rest_of_line (); | |
4719 | return; | |
4720 | ||
4721 | err: | |
4722 | ignore_rest_of_line (); | |
4723 | } | |
4724 | ||
4725 | static void | |
5a49b8ac | 4726 | dot_byteorder (int byteorder) |
800eeca4 | 4727 | { |
10a98291 L |
4728 | segment_info_type *seginfo = seg_info (now_seg); |
4729 | ||
4730 | if (byteorder == -1) | |
4731 | { | |
4732 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4733 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4734 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4735 | } | |
4736 | else | |
4737 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4738 | ||
4739 | if (target_big_endian != byteorder) | |
4740 | { | |
4741 | target_big_endian = byteorder; | |
4742 | if (target_big_endian) | |
4743 | { | |
4744 | ia64_number_to_chars = number_to_chars_bigendian; | |
4745 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4746 | } | |
4747 | else | |
4748 | { | |
4749 | ia64_number_to_chars = number_to_chars_littleendian; | |
4750 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4751 | } | |
4752 | } | |
800eeca4 JW |
4753 | } |
4754 | ||
4755 | static void | |
5a49b8ac | 4756 | dot_psr (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4757 | { |
4758 | char *option; | |
4759 | int ch; | |
4760 | ||
4761 | while (1) | |
4762 | { | |
4763 | option = input_line_pointer; | |
4764 | ch = get_symbol_end (); | |
4765 | if (strcmp (option, "lsb") == 0) | |
4766 | md.flags &= ~EF_IA_64_BE; | |
4767 | else if (strcmp (option, "msb") == 0) | |
4768 | md.flags |= EF_IA_64_BE; | |
4769 | else if (strcmp (option, "abi32") == 0) | |
4770 | md.flags &= ~EF_IA_64_ABI64; | |
4771 | else if (strcmp (option, "abi64") == 0) | |
4772 | md.flags |= EF_IA_64_ABI64; | |
4773 | else | |
ad4b42b4 | 4774 | as_bad (_("Unknown psr option `%s'"), option); |
800eeca4 JW |
4775 | *input_line_pointer = ch; |
4776 | ||
4777 | SKIP_WHITESPACE (); | |
4778 | if (*input_line_pointer != ',') | |
4779 | break; | |
4780 | ||
4781 | ++input_line_pointer; | |
4782 | SKIP_WHITESPACE (); | |
4783 | } | |
4784 | demand_empty_rest_of_line (); | |
4785 | } | |
4786 | ||
800eeca4 | 4787 | static void |
5a49b8ac | 4788 | dot_ln (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4789 | { |
4790 | new_logical_line (0, get_absolute_expression ()); | |
4791 | demand_empty_rest_of_line (); | |
4792 | } | |
4793 | ||
ef6a2b41 | 4794 | static void |
91d6fa6a | 4795 | cross_section (int ref, void (*builder) (int), int ua) |
800eeca4 | 4796 | { |
ef6a2b41 JB |
4797 | char *start, *end; |
4798 | int saved_auto_align; | |
4799 | unsigned int section_count; | |
800eeca4 JW |
4800 | |
4801 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4802 | start = input_line_pointer; |
4803 | if (*start == '"') | |
4804 | { | |
4805 | int len; | |
4806 | char *name; | |
4807 | ||
b3f19c14 | 4808 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4809 | obstack_free(¬es, name); |
4810 | if (!name) | |
4811 | { | |
4812 | ignore_rest_of_line (); | |
4813 | return; | |
4814 | } | |
4815 | } | |
b3f19c14 | 4816 | else |
800eeca4 | 4817 | { |
b3f19c14 JB |
4818 | char c = get_symbol_end (); |
4819 | ||
4820 | if (input_line_pointer == start) | |
4821 | { | |
ad4b42b4 | 4822 | as_bad (_("Missing section name")); |
b3f19c14 | 4823 | ignore_rest_of_line (); |
ef6a2b41 | 4824 | return; |
b3f19c14 | 4825 | } |
b3f19c14 | 4826 | *input_line_pointer = c; |
800eeca4 | 4827 | } |
ef6a2b41 | 4828 | end = input_line_pointer; |
800eeca4 JW |
4829 | SKIP_WHITESPACE (); |
4830 | if (*input_line_pointer != ',') | |
4831 | { | |
ad4b42b4 | 4832 | as_bad (_("Comma expected after section name")); |
800eeca4 | 4833 | ignore_rest_of_line (); |
ef6a2b41 | 4834 | return; |
800eeca4 | 4835 | } |
ef6a2b41 JB |
4836 | *end = '\0'; |
4837 | end = input_line_pointer + 1; /* skip comma */ | |
4838 | input_line_pointer = start; | |
4839 | md.keep_pending_output = 1; | |
91d6fa6a | 4840 | section_count = bfd_count_sections (stdoutput); |
ef6a2b41 | 4841 | obj_elf_section (0); |
91d6fa6a | 4842 | if (section_count != bfd_count_sections (stdoutput)) |
ad4b42b4 | 4843 | as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.")); |
ef6a2b41 JB |
4844 | input_line_pointer = end; |
4845 | saved_auto_align = md.auto_align; | |
4846 | if (ua) | |
4847 | md.auto_align = 0; | |
91d6fa6a | 4848 | (*builder) (ref); |
ef6a2b41 JB |
4849 | if (ua) |
4850 | md.auto_align = saved_auto_align; | |
4851 | obj_elf_previous (0); | |
4852 | md.keep_pending_output = 0; | |
800eeca4 JW |
4853 | } |
4854 | ||
4855 | static void | |
5a49b8ac | 4856 | dot_xdata (int size) |
800eeca4 | 4857 | { |
ef6a2b41 | 4858 | cross_section (size, cons, 0); |
800eeca4 JW |
4859 | } |
4860 | ||
4861 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4862 | |
800eeca4 | 4863 | static void |
5a49b8ac | 4864 | stmt_float_cons (int kind) |
800eeca4 | 4865 | { |
165a7f90 | 4866 | size_t alignment; |
800eeca4 JW |
4867 | |
4868 | switch (kind) | |
4869 | { | |
165a7f90 L |
4870 | case 'd': |
4871 | alignment = 8; | |
4872 | break; | |
4873 | ||
4874 | case 'x': | |
4875 | case 'X': | |
4876 | alignment = 16; | |
4877 | break; | |
800eeca4 JW |
4878 | |
4879 | case 'f': | |
4880 | default: | |
165a7f90 | 4881 | alignment = 4; |
800eeca4 JW |
4882 | break; |
4883 | } | |
165a7f90 | 4884 | ia64_do_align (alignment); |
800eeca4 JW |
4885 | float_cons (kind); |
4886 | } | |
4887 | ||
4888 | static void | |
5a49b8ac | 4889 | stmt_cons_ua (int size) |
800eeca4 JW |
4890 | { |
4891 | int saved_auto_align = md.auto_align; | |
4892 | ||
4893 | md.auto_align = 0; | |
4894 | cons (size); | |
4895 | md.auto_align = saved_auto_align; | |
4896 | } | |
4897 | ||
4898 | static void | |
5a49b8ac | 4899 | dot_xfloat_cons (int kind) |
800eeca4 | 4900 | { |
ef6a2b41 | 4901 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4902 | } |
4903 | ||
4904 | static void | |
38a57ae7 | 4905 | dot_xstringer (int zero) |
800eeca4 | 4906 | { |
ef6a2b41 | 4907 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4908 | } |
4909 | ||
4910 | static void | |
5a49b8ac | 4911 | dot_xdata_ua (int size) |
800eeca4 | 4912 | { |
ef6a2b41 | 4913 | cross_section (size, cons, 1); |
800eeca4 JW |
4914 | } |
4915 | ||
4916 | static void | |
5a49b8ac | 4917 | dot_xfloat_cons_ua (int kind) |
800eeca4 | 4918 | { |
ef6a2b41 | 4919 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4920 | } |
4921 | ||
4922 | /* .reg.val <regname>,value */ | |
542d6675 | 4923 | |
800eeca4 | 4924 | static void |
5a49b8ac | 4925 | dot_reg_val (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4926 | { |
4927 | expressionS reg; | |
4928 | ||
60d11e55 | 4929 | expression_and_evaluate (®); |
800eeca4 JW |
4930 | if (reg.X_op != O_register) |
4931 | { | |
4932 | as_bad (_("Register name expected")); | |
4933 | ignore_rest_of_line (); | |
4934 | } | |
4935 | else if (*input_line_pointer++ != ',') | |
4936 | { | |
4937 | as_bad (_("Comma expected")); | |
4938 | ignore_rest_of_line (); | |
4939 | } | |
197865e8 | 4940 | else |
800eeca4 JW |
4941 | { |
4942 | valueT value = get_absolute_expression (); | |
4943 | int regno = reg.X_add_number; | |
a66d2bb7 | 4944 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4945 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4946 | else |
542d6675 KH |
4947 | { |
4948 | gr_values[regno - REG_GR].known = 1; | |
4949 | gr_values[regno - REG_GR].value = value; | |
4950 | gr_values[regno - REG_GR].path = md.path; | |
4951 | } | |
800eeca4 JW |
4952 | } |
4953 | demand_empty_rest_of_line (); | |
4954 | } | |
4955 | ||
5e819f9c JW |
4956 | /* |
4957 | .serialize.data | |
4958 | .serialize.instruction | |
4959 | */ | |
4960 | static void | |
5a49b8ac | 4961 | dot_serialize (int type) |
5e819f9c JW |
4962 | { |
4963 | insn_group_break (0, 0, 0); | |
4964 | if (type) | |
4965 | instruction_serialization (); | |
4966 | else | |
4967 | data_serialization (); | |
4968 | insn_group_break (0, 0, 0); | |
4969 | demand_empty_rest_of_line (); | |
4970 | } | |
4971 | ||
197865e8 | 4972 | /* select dv checking mode |
800eeca4 JW |
4973 | .auto |
4974 | .explicit | |
4975 | .default | |
4976 | ||
197865e8 | 4977 | A stop is inserted when changing modes |
800eeca4 | 4978 | */ |
542d6675 | 4979 | |
800eeca4 | 4980 | static void |
5a49b8ac | 4981 | dot_dv_mode (int type) |
800eeca4 JW |
4982 | { |
4983 | if (md.manual_bundling) | |
4984 | as_warn (_("Directive invalid within a bundle")); | |
4985 | ||
4986 | if (type == 'E' || type == 'A') | |
4987 | md.mode_explicitly_set = 0; | |
4988 | else | |
4989 | md.mode_explicitly_set = 1; | |
4990 | ||
4991 | md.detect_dv = 1; | |
4992 | switch (type) | |
4993 | { | |
4994 | case 'A': | |
4995 | case 'a': | |
4996 | if (md.explicit_mode) | |
542d6675 | 4997 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4998 | md.explicit_mode = 0; |
4999 | break; | |
5000 | case 'E': | |
5001 | case 'e': | |
5002 | if (!md.explicit_mode) | |
542d6675 | 5003 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5004 | md.explicit_mode = 1; |
5005 | break; | |
5006 | default: | |
5007 | case 'd': | |
5008 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5009 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5010 | md.explicit_mode = md.default_explicit_mode; |
5011 | md.mode_explicitly_set = 0; | |
5012 | break; | |
5013 | } | |
5014 | } | |
5015 | ||
5016 | static void | |
5a49b8ac | 5017 | print_prmask (valueT mask) |
800eeca4 JW |
5018 | { |
5019 | int regno; | |
5020 | char *comma = ""; | |
542d6675 | 5021 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5022 | { |
542d6675 KH |
5023 | if (mask & ((valueT) 1 << regno)) |
5024 | { | |
5025 | fprintf (stderr, "%s p%d", comma, regno); | |
5026 | comma = ","; | |
5027 | } | |
800eeca4 JW |
5028 | } |
5029 | } | |
5030 | ||
5031 | /* | |
05ee4b0f JB |
5032 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5033 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5034 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5035 | .pred.safe_across_calls p1 [, p2 [,...]] |
5036 | */ | |
542d6675 | 5037 | |
800eeca4 | 5038 | static void |
5a49b8ac | 5039 | dot_pred_rel (int type) |
800eeca4 JW |
5040 | { |
5041 | valueT mask = 0; | |
5042 | int count = 0; | |
5043 | int p1 = -1, p2 = -1; | |
5044 | ||
5045 | if (type == 0) | |
5046 | { | |
05ee4b0f | 5047 | if (*input_line_pointer == '"') |
542d6675 KH |
5048 | { |
5049 | int len; | |
5050 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5051 | |
542d6675 KH |
5052 | if (strcmp (form, "mutex") == 0) |
5053 | type = 'm'; | |
5054 | else if (strcmp (form, "clear") == 0) | |
5055 | type = 'c'; | |
5056 | else if (strcmp (form, "imply") == 0) | |
5057 | type = 'i'; | |
05ee4b0f JB |
5058 | obstack_free (¬es, form); |
5059 | } | |
5060 | else if (*input_line_pointer == '@') | |
5061 | { | |
5062 | char *form = ++input_line_pointer; | |
5063 | char c = get_symbol_end(); | |
5064 | ||
5065 | if (strcmp (form, "mutex") == 0) | |
5066 | type = 'm'; | |
5067 | else if (strcmp (form, "clear") == 0) | |
5068 | type = 'c'; | |
5069 | else if (strcmp (form, "imply") == 0) | |
5070 | type = 'i'; | |
5071 | *input_line_pointer = c; | |
5072 | } | |
5073 | else | |
5074 | { | |
5075 | as_bad (_("Missing predicate relation type")); | |
5076 | ignore_rest_of_line (); | |
5077 | return; | |
5078 | } | |
5079 | if (type == 0) | |
5080 | { | |
5081 | as_bad (_("Unrecognized predicate relation type")); | |
5082 | ignore_rest_of_line (); | |
5083 | return; | |
542d6675 | 5084 | } |
800eeca4 | 5085 | if (*input_line_pointer == ',') |
542d6675 | 5086 | ++input_line_pointer; |
800eeca4 JW |
5087 | SKIP_WHITESPACE (); |
5088 | } | |
5089 | ||
800eeca4 JW |
5090 | while (1) |
5091 | { | |
20b36a95 | 5092 | valueT bits = 1; |
cc941dee | 5093 | int sep, regno; |
20b36a95 JB |
5094 | expressionS pr, *pr1, *pr2; |
5095 | ||
cd42ff9c | 5096 | sep = parse_operand_and_eval (&pr, ','); |
20b36a95 JB |
5097 | if (pr.X_op == O_register |
5098 | && pr.X_add_number >= REG_P | |
5099 | && pr.X_add_number <= REG_P + 63) | |
5100 | { | |
5101 | regno = pr.X_add_number - REG_P; | |
5102 | bits <<= regno; | |
5103 | count++; | |
5104 | if (p1 == -1) | |
5105 | p1 = regno; | |
5106 | else if (p2 == -1) | |
5107 | p2 = regno; | |
5108 | } | |
5109 | else if (type != 'i' | |
5110 | && pr.X_op == O_subtract | |
5111 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5112 | && pr1->X_op == O_register | |
5113 | && pr1->X_add_number >= REG_P | |
5114 | && pr1->X_add_number <= REG_P + 63 | |
5115 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5116 | && pr2->X_op == O_register | |
5117 | && pr2->X_add_number >= REG_P | |
5118 | && pr2->X_add_number <= REG_P + 63) | |
5119 | { | |
5120 | /* It's a range. */ | |
5121 | int stop; | |
5122 | ||
5123 | regno = pr1->X_add_number - REG_P; | |
5124 | stop = pr2->X_add_number - REG_P; | |
5125 | if (regno >= stop) | |
542d6675 KH |
5126 | { |
5127 | as_bad (_("Bad register range")); | |
5128 | ignore_rest_of_line (); | |
5129 | return; | |
5130 | } | |
20b36a95 JB |
5131 | bits = ((bits << stop) << 1) - (bits << regno); |
5132 | count += stop - regno + 1; | |
5133 | } | |
5134 | else | |
5135 | { | |
5136 | as_bad (_("Predicate register expected")); | |
5137 | ignore_rest_of_line (); | |
5138 | return; | |
542d6675 | 5139 | } |
20b36a95 JB |
5140 | if (mask & bits) |
5141 | as_warn (_("Duplicate predicate register ignored")); | |
5142 | mask |= bits; | |
cc941dee | 5143 | if (sep != ',') |
542d6675 | 5144 | break; |
800eeca4 JW |
5145 | } |
5146 | ||
5147 | switch (type) | |
5148 | { | |
5149 | case 'c': | |
5150 | if (count == 0) | |
542d6675 | 5151 | mask = ~(valueT) 0; |
800eeca4 | 5152 | clear_qp_mutex (mask); |
197865e8 | 5153 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5154 | break; |
5155 | case 'i': | |
5156 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5157 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5158 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5159 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5160 | else |
542d6675 | 5161 | add_qp_imply (p1, p2); |
800eeca4 JW |
5162 | break; |
5163 | case 'm': | |
5164 | if (count < 2) | |
542d6675 KH |
5165 | { |
5166 | as_bad (_("At least two PR arguments expected")); | |
5167 | break; | |
5168 | } | |
800eeca4 | 5169 | else if (mask & 1) |
542d6675 KH |
5170 | { |
5171 | as_bad (_("Use of p0 is not valid in this context")); | |
5172 | break; | |
5173 | } | |
800eeca4 JW |
5174 | add_qp_mutex (mask); |
5175 | break; | |
5176 | case 's': | |
5177 | /* note that we don't override any existing relations */ | |
5178 | if (count == 0) | |
542d6675 KH |
5179 | { |
5180 | as_bad (_("At least one PR argument expected")); | |
5181 | break; | |
5182 | } | |
800eeca4 | 5183 | if (md.debug_dv) |
542d6675 KH |
5184 | { |
5185 | fprintf (stderr, "Safe across calls: "); | |
5186 | print_prmask (mask); | |
5187 | fprintf (stderr, "\n"); | |
5188 | } | |
800eeca4 JW |
5189 | qp_safe_across_calls = mask; |
5190 | break; | |
5191 | } | |
5192 | demand_empty_rest_of_line (); | |
5193 | } | |
5194 | ||
5195 | /* .entry label [, label [, ...]] | |
5196 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5197 | Otherwise, only global labels are considered entry points. */ |
5198 | ||
800eeca4 | 5199 | static void |
5a49b8ac | 5200 | dot_entry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5201 | { |
5202 | const char *err; | |
5203 | char *name; | |
5204 | int c; | |
5205 | symbolS *symbolP; | |
5206 | ||
5207 | do | |
5208 | { | |
5209 | name = input_line_pointer; | |
5210 | c = get_symbol_end (); | |
5211 | symbolP = symbol_find_or_make (name); | |
5212 | ||
5a49b8ac | 5213 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (void *) symbolP); |
800eeca4 | 5214 | if (err) |
542d6675 KH |
5215 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5216 | name, err); | |
800eeca4 JW |
5217 | |
5218 | *input_line_pointer = c; | |
5219 | SKIP_WHITESPACE (); | |
5220 | c = *input_line_pointer; | |
5221 | if (c == ',') | |
5222 | { | |
5223 | input_line_pointer++; | |
5224 | SKIP_WHITESPACE (); | |
5225 | if (*input_line_pointer == '\n') | |
5226 | c = '\n'; | |
5227 | } | |
5228 | } | |
5229 | while (c == ','); | |
5230 | ||
5231 | demand_empty_rest_of_line (); | |
5232 | } | |
5233 | ||
197865e8 | 5234 | /* .mem.offset offset, base |
542d6675 KH |
5235 | "base" is used to distinguish between offsets from a different base. */ |
5236 | ||
800eeca4 | 5237 | static void |
5a49b8ac | 5238 | dot_mem_offset (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5239 | { |
5240 | md.mem_offset.hint = 1; | |
5241 | md.mem_offset.offset = get_absolute_expression (); | |
5242 | if (*input_line_pointer != ',') | |
5243 | { | |
5244 | as_bad (_("Comma expected")); | |
5245 | ignore_rest_of_line (); | |
5246 | return; | |
5247 | } | |
5248 | ++input_line_pointer; | |
5249 | md.mem_offset.base = get_absolute_expression (); | |
5250 | demand_empty_rest_of_line (); | |
5251 | } | |
5252 | ||
542d6675 | 5253 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5254 | const pseudo_typeS md_pseudo_table[] = |
5255 | { | |
5256 | { "radix", dot_radix, 0 }, | |
5257 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5258 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5259 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5260 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5261 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5262 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5263 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5264 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5265 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5266 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5267 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5268 | { "proc", dot_proc, 0 }, |
5269 | { "body", dot_body, 0 }, | |
5270 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5271 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5272 | |
5273 | { "fframe", dot_fframe, 0 }, | |
5274 | { "vframe", dot_vframe, 0 }, | |
5275 | { "vframesp", dot_vframesp, 0 }, | |
e4e8248d | 5276 | { "vframepsp", dot_vframesp, 1 }, |
2434f565 JW |
5277 | { "save", dot_save, 0 }, |
5278 | { "restore", dot_restore, 0 }, | |
5279 | { "restorereg", dot_restorereg, 0 }, | |
e4e8248d | 5280 | { "restorereg.p", dot_restorereg, 1 }, |
2434f565 JW |
5281 | { "handlerdata", dot_handlerdata, 0 }, |
5282 | { "unwentry", dot_unwentry, 0 }, | |
5283 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5284 | { "savesp", dot_savemem, 0 }, |
5285 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5286 | { "save.g", dot_saveg, 0 }, |
5287 | { "save.f", dot_savef, 0 }, | |
5288 | { "save.b", dot_saveb, 0 }, | |
5289 | { "save.gf", dot_savegf, 0 }, | |
5290 | { "spill", dot_spill, 0 }, | |
5291 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5292 | { "spillsp", dot_spillmem, 0 }, |
5293 | { "spillpsp", dot_spillmem, 1 }, | |
e4e8248d JB |
5294 | { "spillreg.p", dot_spillreg, 1 }, |
5295 | { "spillsp.p", dot_spillmem, ~0 }, | |
5296 | { "spillpsp.p", dot_spillmem, ~1 }, | |
2434f565 JW |
5297 | { "label_state", dot_label_state, 0 }, |
5298 | { "copy_state", dot_copy_state, 0 }, | |
5299 | { "unwabi", dot_unwabi, 0 }, | |
5300 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5301 | { "mii", dot_template, 0x0 }, |
5302 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5303 | { "mlx", dot_template, 0x2 }, | |
5304 | { "mmi", dot_template, 0x4 }, | |
5305 | { "mfi", dot_template, 0x6 }, | |
5306 | { "mmf", dot_template, 0x7 }, | |
5307 | { "mib", dot_template, 0x8 }, | |
5308 | { "mbb", dot_template, 0x9 }, | |
5309 | { "bbb", dot_template, 0xb }, | |
5310 | { "mmb", dot_template, 0xc }, | |
5311 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5312 | { "align", dot_align, 0 }, |
800eeca4 JW |
5313 | { "regstk", dot_regstk, 0 }, |
5314 | { "rotr", dot_rot, DYNREG_GR }, | |
5315 | { "rotf", dot_rot, DYNREG_FR }, | |
5316 | { "rotp", dot_rot, DYNREG_PR }, | |
5317 | { "lsb", dot_byteorder, 0 }, | |
5318 | { "msb", dot_byteorder, 1 }, | |
5319 | { "psr", dot_psr, 0 }, | |
5320 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5321 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5322 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5323 | ||
5324 | { "xdata1", dot_xdata, 1 }, | |
5325 | { "xdata2", dot_xdata, 2 }, | |
5326 | { "xdata4", dot_xdata, 4 }, | |
5327 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5328 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5329 | { "xreal4", dot_xfloat_cons, 'f' }, |
5330 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5331 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5332 | { "xreal16", dot_xfloat_cons, 'X' }, |
38a57ae7 NC |
5333 | { "xstring", dot_xstringer, 8 + 0 }, |
5334 | { "xstringz", dot_xstringer, 8 + 1 }, | |
800eeca4 | 5335 | |
542d6675 | 5336 | /* unaligned versions: */ |
800eeca4 JW |
5337 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5338 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5339 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5340 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5341 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5342 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5343 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5344 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5345 | |
5346 | /* annotations/DV checking support */ | |
5347 | { "entry", dot_entry, 0 }, | |
2434f565 | 5348 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5349 | { "pred.rel", dot_pred_rel, 0 }, |
5350 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5351 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5352 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5353 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5354 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5355 | { "serialize.data", dot_serialize, 0 }, |
5356 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5357 | { "auto", dot_dv_mode, 'a' }, |
5358 | { "explicit", dot_dv_mode, 'e' }, | |
5359 | { "default", dot_dv_mode, 'd' }, | |
5360 | ||
87885043 JW |
5361 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5362 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5363 | tell it that these ones are supposed to be unaligned. Long term, | |
5364 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5365 | are aligned by default. */ | |
5366 | {"2byte", stmt_cons_ua, 2}, | |
5367 | {"4byte", stmt_cons_ua, 4}, | |
5368 | {"8byte", stmt_cons_ua, 8}, | |
5369 | ||
2b0bc501 TG |
5370 | #ifdef TE_VMS |
5371 | {"vms_common", obj_elf_vms_common, 0}, | |
5372 | #endif | |
5373 | ||
800eeca4 JW |
5374 | { NULL, 0, 0 } |
5375 | }; | |
5376 | ||
5377 | static const struct pseudo_opcode | |
5378 | { | |
5379 | const char *name; | |
5380 | void (*handler) (int); | |
5381 | int arg; | |
5382 | } | |
5383 | pseudo_opcode[] = | |
5384 | { | |
5385 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5386 | { "data1", cons, 1 }, | |
5387 | { "data2", cons, 2 }, | |
5388 | { "data4", cons, 4 }, | |
5389 | { "data8", cons, 8 }, | |
3969b680 | 5390 | { "data16", cons, 16 }, |
800eeca4 JW |
5391 | { "real4", stmt_float_cons, 'f' }, |
5392 | { "real8", stmt_float_cons, 'd' }, | |
5393 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5394 | { "real16", stmt_float_cons, 'X' }, |
38a57ae7 NC |
5395 | { "string", stringer, 8 + 0 }, |
5396 | { "stringz", stringer, 8 + 1 }, | |
800eeca4 | 5397 | |
542d6675 | 5398 | /* unaligned versions: */ |
800eeca4 JW |
5399 | { "data2.ua", stmt_cons_ua, 2 }, |
5400 | { "data4.ua", stmt_cons_ua, 4 }, | |
5401 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5402 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5403 | { "real4.ua", float_cons, 'f' }, |
5404 | { "real8.ua", float_cons, 'd' }, | |
5405 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5406 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5407 | }; |
5408 | ||
5409 | /* Declare a register by creating a symbol for it and entering it in | |
5410 | the symbol table. */ | |
542d6675 KH |
5411 | |
5412 | static symbolS * | |
5a49b8ac | 5413 | declare_register (const char *name, unsigned int regnum) |
800eeca4 JW |
5414 | { |
5415 | const char *err; | |
5416 | symbolS *sym; | |
5417 | ||
5e0bd176 | 5418 | sym = symbol_create (name, reg_section, regnum, &zero_address_frag); |
800eeca4 | 5419 | |
5a49b8ac | 5420 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (void *) sym); |
800eeca4 JW |
5421 | if (err) |
5422 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5423 | name, err); | |
5424 | ||
5425 | return sym; | |
5426 | } | |
5427 | ||
5428 | static void | |
5a49b8ac AM |
5429 | declare_register_set (const char *prefix, |
5430 | unsigned int num_regs, | |
5431 | unsigned int base_regnum) | |
800eeca4 JW |
5432 | { |
5433 | char name[8]; | |
8b84be9d | 5434 | unsigned int i; |
800eeca4 JW |
5435 | |
5436 | for (i = 0; i < num_regs; ++i) | |
5437 | { | |
f9f21a03 | 5438 | snprintf (name, sizeof (name), "%s%u", prefix, i); |
800eeca4 JW |
5439 | declare_register (name, base_regnum + i); |
5440 | } | |
5441 | } | |
5442 | ||
5443 | static unsigned int | |
5a49b8ac | 5444 | operand_width (enum ia64_opnd opnd) |
800eeca4 JW |
5445 | { |
5446 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5447 | unsigned int bits = 0; | |
5448 | int i; | |
5449 | ||
5450 | bits = 0; | |
5451 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5452 | bits += odesc->field[i].bits; | |
5453 | ||
5454 | return bits; | |
5455 | } | |
5456 | ||
87f8eb97 | 5457 | static enum operand_match_result |
91d6fa6a | 5458 | operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) |
800eeca4 | 5459 | { |
91d6fa6a | 5460 | enum ia64_opnd opnd = idesc->operands[res_index]; |
800eeca4 JW |
5461 | int bits, relocatable = 0; |
5462 | struct insn_fix *fix; | |
5463 | bfd_signed_vma val; | |
5464 | ||
5465 | switch (opnd) | |
5466 | { | |
542d6675 | 5467 | /* constants: */ |
800eeca4 JW |
5468 | |
5469 | case IA64_OPND_AR_CCV: | |
5470 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5471 | return OPERAND_MATCH; |
800eeca4 JW |
5472 | break; |
5473 | ||
c10d9d8f JW |
5474 | case IA64_OPND_AR_CSD: |
5475 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5476 | return OPERAND_MATCH; | |
5477 | break; | |
5478 | ||
800eeca4 JW |
5479 | case IA64_OPND_AR_PFS: |
5480 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5481 | return OPERAND_MATCH; |
800eeca4 JW |
5482 | break; |
5483 | ||
5484 | case IA64_OPND_GR0: | |
5485 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5486 | return OPERAND_MATCH; |
800eeca4 JW |
5487 | break; |
5488 | ||
5489 | case IA64_OPND_IP: | |
5490 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5491 | return OPERAND_MATCH; |
800eeca4 JW |
5492 | break; |
5493 | ||
5494 | case IA64_OPND_PR: | |
5495 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5496 | return OPERAND_MATCH; |
800eeca4 JW |
5497 | break; |
5498 | ||
5499 | case IA64_OPND_PR_ROT: | |
5500 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5501 | return OPERAND_MATCH; |
800eeca4 JW |
5502 | break; |
5503 | ||
5504 | case IA64_OPND_PSR: | |
5505 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5506 | return OPERAND_MATCH; |
800eeca4 JW |
5507 | break; |
5508 | ||
5509 | case IA64_OPND_PSR_L: | |
5510 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5511 | return OPERAND_MATCH; |
800eeca4 JW |
5512 | break; |
5513 | ||
5514 | case IA64_OPND_PSR_UM: | |
5515 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5516 | return OPERAND_MATCH; |
800eeca4 JW |
5517 | break; |
5518 | ||
5519 | case IA64_OPND_C1: | |
87f8eb97 JW |
5520 | if (e->X_op == O_constant) |
5521 | { | |
5522 | if (e->X_add_number == 1) | |
5523 | return OPERAND_MATCH; | |
5524 | else | |
5525 | return OPERAND_OUT_OF_RANGE; | |
5526 | } | |
800eeca4 JW |
5527 | break; |
5528 | ||
5529 | case IA64_OPND_C8: | |
87f8eb97 JW |
5530 | if (e->X_op == O_constant) |
5531 | { | |
5532 | if (e->X_add_number == 8) | |
5533 | return OPERAND_MATCH; | |
5534 | else | |
5535 | return OPERAND_OUT_OF_RANGE; | |
5536 | } | |
800eeca4 JW |
5537 | break; |
5538 | ||
5539 | case IA64_OPND_C16: | |
87f8eb97 JW |
5540 | if (e->X_op == O_constant) |
5541 | { | |
5542 | if (e->X_add_number == 16) | |
5543 | return OPERAND_MATCH; | |
5544 | else | |
5545 | return OPERAND_OUT_OF_RANGE; | |
5546 | } | |
800eeca4 JW |
5547 | break; |
5548 | ||
542d6675 | 5549 | /* register operands: */ |
800eeca4 JW |
5550 | |
5551 | case IA64_OPND_AR3: | |
5552 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5553 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5554 | return OPERAND_MATCH; |
800eeca4 JW |
5555 | break; |
5556 | ||
5557 | case IA64_OPND_B1: | |
5558 | case IA64_OPND_B2: | |
5559 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5560 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5561 | return OPERAND_MATCH; |
800eeca4 JW |
5562 | break; |
5563 | ||
5564 | case IA64_OPND_CR3: | |
5565 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5566 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5567 | return OPERAND_MATCH; |
800eeca4 JW |
5568 | break; |
5569 | ||
5570 | case IA64_OPND_F1: | |
5571 | case IA64_OPND_F2: | |
5572 | case IA64_OPND_F3: | |
5573 | case IA64_OPND_F4: | |
5574 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5575 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5576 | return OPERAND_MATCH; |
800eeca4 JW |
5577 | break; |
5578 | ||
5579 | case IA64_OPND_P1: | |
5580 | case IA64_OPND_P2: | |
5581 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5582 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5583 | return OPERAND_MATCH; |
800eeca4 JW |
5584 | break; |
5585 | ||
5586 | case IA64_OPND_R1: | |
5587 | case IA64_OPND_R2: | |
5588 | case IA64_OPND_R3: | |
5589 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5590 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5591 | return OPERAND_MATCH; |
800eeca4 JW |
5592 | break; |
5593 | ||
5594 | case IA64_OPND_R3_2: | |
87f8eb97 | 5595 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5596 | { |
87f8eb97 JW |
5597 | if (e->X_add_number < REG_GR + 4) |
5598 | return OPERAND_MATCH; | |
5599 | else if (e->X_add_number < REG_GR + 128) | |
5600 | return OPERAND_OUT_OF_RANGE; | |
5601 | } | |
800eeca4 JW |
5602 | break; |
5603 | ||
542d6675 | 5604 | /* indirect operands: */ |
800eeca4 JW |
5605 | case IA64_OPND_CPUID_R3: |
5606 | case IA64_OPND_DBR_R3: | |
5607 | case IA64_OPND_DTR_R3: | |
5608 | case IA64_OPND_ITR_R3: | |
5609 | case IA64_OPND_IBR_R3: | |
5610 | case IA64_OPND_MSR_R3: | |
5611 | case IA64_OPND_PKR_R3: | |
5612 | case IA64_OPND_PMC_R3: | |
5613 | case IA64_OPND_PMD_R3: | |
5614 | case IA64_OPND_RR_R3: | |
5615 | if (e->X_op == O_index && e->X_op_symbol | |
5616 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5617 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5618 | return OPERAND_MATCH; |
800eeca4 JW |
5619 | break; |
5620 | ||
5621 | case IA64_OPND_MR3: | |
5622 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5623 | return OPERAND_MATCH; |
800eeca4 JW |
5624 | break; |
5625 | ||
542d6675 | 5626 | /* immediate operands: */ |
800eeca4 JW |
5627 | case IA64_OPND_CNT2a: |
5628 | case IA64_OPND_LEN4: | |
5629 | case IA64_OPND_LEN6: | |
91d6fa6a | 5630 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 JW |
5631 | if (e->X_op == O_constant) |
5632 | { | |
5633 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5634 | return OPERAND_MATCH; | |
5635 | else | |
5636 | return OPERAND_OUT_OF_RANGE; | |
5637 | } | |
800eeca4 JW |
5638 | break; |
5639 | ||
5640 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5641 | if (e->X_op == O_constant) |
5642 | { | |
5643 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5644 | return OPERAND_MATCH; | |
5645 | else | |
5646 | return OPERAND_OUT_OF_RANGE; | |
5647 | } | |
800eeca4 JW |
5648 | break; |
5649 | ||
5650 | case IA64_OPND_CNT2c: | |
5651 | val = e->X_add_number; | |
87f8eb97 JW |
5652 | if (e->X_op == O_constant) |
5653 | { | |
5654 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5655 | return OPERAND_MATCH; | |
5656 | else | |
5657 | return OPERAND_OUT_OF_RANGE; | |
5658 | } | |
800eeca4 JW |
5659 | break; |
5660 | ||
5661 | case IA64_OPND_SOR: | |
5662 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5663 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5664 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5665 | case IA64_OPND_SOF: |
5666 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5667 | if (e->X_op == O_constant) |
5668 | { | |
5669 | if ((bfd_vma) e->X_add_number <= 96) | |
5670 | return OPERAND_MATCH; | |
5671 | else | |
5672 | return OPERAND_OUT_OF_RANGE; | |
5673 | } | |
800eeca4 JW |
5674 | break; |
5675 | ||
5676 | case IA64_OPND_IMMU62: | |
5677 | if (e->X_op == O_constant) | |
542d6675 | 5678 | { |
800eeca4 | 5679 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5680 | return OPERAND_MATCH; |
5681 | else | |
5682 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5683 | } |
197865e8 | 5684 | else |
542d6675 KH |
5685 | { |
5686 | /* FIXME -- need 62-bit relocation type */ | |
5687 | as_bad (_("62-bit relocation not yet implemented")); | |
5688 | } | |
800eeca4 JW |
5689 | break; |
5690 | ||
5691 | case IA64_OPND_IMMU64: | |
5692 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5693 | || e->X_op == O_subtract) | |
5694 | { | |
5695 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5696 | fix->code = BFD_RELOC_IA64_IMM64; | |
5697 | if (e->X_op != O_subtract) | |
5698 | { | |
5699 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5700 | if (e->X_op == O_pseudo_fixup) | |
5701 | e->X_op = O_symbol; | |
5702 | } | |
5703 | ||
91d6fa6a | 5704 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5705 | fix->expr = *e; |
5706 | fix->is_pcrel = 0; | |
5707 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5708 | return OPERAND_MATCH; |
800eeca4 JW |
5709 | } |
5710 | else if (e->X_op == O_constant) | |
87f8eb97 | 5711 | return OPERAND_MATCH; |
800eeca4 JW |
5712 | break; |
5713 | ||
59cf82fe L |
5714 | case IA64_OPND_IMMU5b: |
5715 | if (e->X_op == O_constant) | |
5716 | { | |
5717 | val = e->X_add_number; | |
5718 | if (val >= 32 && val <= 63) | |
5719 | return OPERAND_MATCH; | |
5720 | else | |
5721 | return OPERAND_OUT_OF_RANGE; | |
5722 | } | |
5723 | break; | |
5724 | ||
800eeca4 JW |
5725 | case IA64_OPND_CCNT5: |
5726 | case IA64_OPND_CNT5: | |
5727 | case IA64_OPND_CNT6: | |
5728 | case IA64_OPND_CPOS6a: | |
5729 | case IA64_OPND_CPOS6b: | |
5730 | case IA64_OPND_CPOS6c: | |
5731 | case IA64_OPND_IMMU2: | |
5732 | case IA64_OPND_IMMU7a: | |
5733 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5734 | case IA64_OPND_IMMU21: |
5735 | case IA64_OPND_IMMU24: | |
5736 | case IA64_OPND_MBTYPE4: | |
5737 | case IA64_OPND_MHTYPE8: | |
5738 | case IA64_OPND_POS6: | |
91d6fa6a | 5739 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 JW |
5740 | if (e->X_op == O_constant) |
5741 | { | |
5742 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5743 | return OPERAND_MATCH; | |
5744 | else | |
5745 | return OPERAND_OUT_OF_RANGE; | |
5746 | } | |
800eeca4 JW |
5747 | break; |
5748 | ||
bf3ca999 | 5749 | case IA64_OPND_IMMU9: |
91d6fa6a | 5750 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 | 5751 | if (e->X_op == O_constant) |
542d6675 | 5752 | { |
87f8eb97 JW |
5753 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5754 | { | |
5755 | int lobits = e->X_add_number & 0x3; | |
5756 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5757 | e->X_add_number |= (bfd_vma) 0x3; | |
5758 | return OPERAND_MATCH; | |
5759 | } | |
5760 | else | |
5761 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5762 | } |
bf3ca999 TW |
5763 | break; |
5764 | ||
800eeca4 JW |
5765 | case IA64_OPND_IMM44: |
5766 | /* least 16 bits must be zero */ | |
5767 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5768 | /* XXX technically, this is wrong: we should not be issuing warning |
5769 | messages until we're sure this instruction pattern is going to | |
5770 | be used! */ | |
542d6675 | 5771 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5772 | |
87f8eb97 | 5773 | if (e->X_op == O_constant) |
542d6675 | 5774 | { |
87f8eb97 JW |
5775 | if (((e->X_add_number >= 0 |
5776 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5777 | || (e->X_add_number < 0 | |
5778 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5779 | { |
87f8eb97 JW |
5780 | /* sign-extend */ |
5781 | if (e->X_add_number >= 0 | |
5782 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5783 | { | |
5784 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5785 | } | |
5786 | return OPERAND_MATCH; | |
542d6675 | 5787 | } |
87f8eb97 JW |
5788 | else |
5789 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5790 | } |
800eeca4 JW |
5791 | break; |
5792 | ||
5793 | case IA64_OPND_IMM17: | |
5794 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5795 | if (e->X_op == O_constant) |
542d6675 | 5796 | { |
87f8eb97 JW |
5797 | if (((e->X_add_number >= 0 |
5798 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5799 | || (e->X_add_number < 0 | |
5800 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5801 | { |
87f8eb97 JW |
5802 | /* sign-extend */ |
5803 | if (e->X_add_number >= 0 | |
5804 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5805 | { | |
5806 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5807 | } | |
5808 | return OPERAND_MATCH; | |
542d6675 | 5809 | } |
87f8eb97 JW |
5810 | else |
5811 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5812 | } |
800eeca4 JW |
5813 | break; |
5814 | ||
5815 | case IA64_OPND_IMM14: | |
5816 | case IA64_OPND_IMM22: | |
5817 | relocatable = 1; | |
5818 | case IA64_OPND_IMM1: | |
5819 | case IA64_OPND_IMM8: | |
5820 | case IA64_OPND_IMM8U4: | |
5821 | case IA64_OPND_IMM8M1: | |
5822 | case IA64_OPND_IMM8M1U4: | |
5823 | case IA64_OPND_IMM8M1U8: | |
5824 | case IA64_OPND_IMM9a: | |
5825 | case IA64_OPND_IMM9b: | |
91d6fa6a | 5826 | bits = operand_width (idesc->operands[res_index]); |
800eeca4 JW |
5827 | if (relocatable && (e->X_op == O_symbol |
5828 | || e->X_op == O_subtract | |
5829 | || e->X_op == O_pseudo_fixup)) | |
5830 | { | |
5831 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5832 | ||
91d6fa6a | 5833 | if (idesc->operands[res_index] == IA64_OPND_IMM14) |
800eeca4 JW |
5834 | fix->code = BFD_RELOC_IA64_IMM14; |
5835 | else | |
5836 | fix->code = BFD_RELOC_IA64_IMM22; | |
5837 | ||
5838 | if (e->X_op != O_subtract) | |
5839 | { | |
5840 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5841 | if (e->X_op == O_pseudo_fixup) | |
5842 | e->X_op = O_symbol; | |
5843 | } | |
5844 | ||
91d6fa6a | 5845 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5846 | fix->expr = *e; |
5847 | fix->is_pcrel = 0; | |
5848 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5849 | return OPERAND_MATCH; |
800eeca4 JW |
5850 | } |
5851 | else if (e->X_op != O_constant | |
5852 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5853 | return OPERAND_MISMATCH; |
800eeca4 JW |
5854 | |
5855 | if (opnd == IA64_OPND_IMM8M1U4) | |
5856 | { | |
5857 | /* Zero is not valid for unsigned compares that take an adjusted | |
5858 | constant immediate range. */ | |
5859 | if (e->X_add_number == 0) | |
87f8eb97 | 5860 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5861 | |
5862 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5863 | checks will work. */ | |
5864 | val = e->X_add_number; | |
197865e8 KH |
5865 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5866 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5867 | val = ((val << 32) >> 32); |
5868 | ||
5869 | /* Check for 0x100000000. This is valid because | |
5870 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5871 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5872 | return OPERAND_MATCH; |
800eeca4 JW |
5873 | |
5874 | val = val - 1; | |
5875 | } | |
5876 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5877 | { | |
5878 | /* Zero is not valid for unsigned compares that take an adjusted | |
5879 | constant immediate range. */ | |
5880 | if (e->X_add_number == 0) | |
87f8eb97 | 5881 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5882 | |
5883 | /* Check for 0x10000000000000000. */ | |
5884 | if (e->X_op == O_big) | |
5885 | { | |
5886 | if (generic_bignum[0] == 0 | |
5887 | && generic_bignum[1] == 0 | |
5888 | && generic_bignum[2] == 0 | |
5889 | && generic_bignum[3] == 0 | |
5890 | && generic_bignum[4] == 1) | |
87f8eb97 | 5891 | return OPERAND_MATCH; |
800eeca4 | 5892 | else |
87f8eb97 | 5893 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5894 | } |
5895 | else | |
5896 | val = e->X_add_number - 1; | |
5897 | } | |
5898 | else if (opnd == IA64_OPND_IMM8M1) | |
5899 | val = e->X_add_number - 1; | |
5900 | else if (opnd == IA64_OPND_IMM8U4) | |
5901 | { | |
5902 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5903 | checks will work. */ | |
5904 | val = e->X_add_number; | |
197865e8 KH |
5905 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5906 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5907 | val = ((val << 32) >> 32); |
5908 | } | |
5909 | else | |
5910 | val = e->X_add_number; | |
5911 | ||
2434f565 JW |
5912 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5913 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5914 | return OPERAND_MATCH; |
5915 | else | |
5916 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5917 | |
5918 | case IA64_OPND_INC3: | |
5919 | /* +/- 1, 4, 8, 16 */ | |
5920 | val = e->X_add_number; | |
5921 | if (val < 0) | |
5922 | val = -val; | |
87f8eb97 JW |
5923 | if (e->X_op == O_constant) |
5924 | { | |
5925 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5926 | return OPERAND_MATCH; | |
5927 | else | |
5928 | return OPERAND_OUT_OF_RANGE; | |
5929 | } | |
800eeca4 JW |
5930 | break; |
5931 | ||
5932 | case IA64_OPND_TGT25: | |
5933 | case IA64_OPND_TGT25b: | |
5934 | case IA64_OPND_TGT25c: | |
5935 | case IA64_OPND_TGT64: | |
5936 | if (e->X_op == O_symbol) | |
5937 | { | |
5938 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5939 | if (opnd == IA64_OPND_TGT25) | |
5940 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5941 | else if (opnd == IA64_OPND_TGT25b) | |
5942 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5943 | else if (opnd == IA64_OPND_TGT25c) | |
5944 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5945 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5946 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5947 | else | |
5948 | abort (); | |
5949 | ||
800eeca4 | 5950 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
91d6fa6a | 5951 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5952 | fix->expr = *e; |
5953 | fix->is_pcrel = 1; | |
5954 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5955 | return OPERAND_MATCH; |
800eeca4 JW |
5956 | } |
5957 | case IA64_OPND_TAG13: | |
5958 | case IA64_OPND_TAG13b: | |
5959 | switch (e->X_op) | |
5960 | { | |
5961 | case O_constant: | |
87f8eb97 | 5962 | return OPERAND_MATCH; |
800eeca4 JW |
5963 | |
5964 | case O_symbol: | |
5965 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 5966 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 5967 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
5968 | fix->code = BFD_RELOC_UNUSED; |
5969 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
91d6fa6a | 5970 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5971 | fix->expr = *e; |
5972 | fix->is_pcrel = 1; | |
5973 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5974 | return OPERAND_MATCH; |
800eeca4 JW |
5975 | |
5976 | default: | |
5977 | break; | |
5978 | } | |
5979 | break; | |
5980 | ||
a823923b RH |
5981 | case IA64_OPND_LDXMOV: |
5982 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5983 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
91d6fa6a | 5984 | fix->opnd = idesc->operands[res_index]; |
a823923b RH |
5985 | fix->expr = *e; |
5986 | fix->is_pcrel = 0; | |
5987 | ++CURR_SLOT.num_fixups; | |
5988 | return OPERAND_MATCH; | |
5989 | ||
800eeca4 JW |
5990 | default: |
5991 | break; | |
5992 | } | |
87f8eb97 | 5993 | return OPERAND_MISMATCH; |
800eeca4 JW |
5994 | } |
5995 | ||
5996 | static int | |
5a49b8ac | 5997 | parse_operand (expressionS *e, int more) |
800eeca4 JW |
5998 | { |
5999 | int sep = '\0'; | |
6000 | ||
6001 | memset (e, 0, sizeof (*e)); | |
6002 | e->X_op = O_absent; | |
6003 | SKIP_WHITESPACE (); | |
cd42ff9c | 6004 | expression (e); |
e4e8248d JB |
6005 | sep = *input_line_pointer; |
6006 | if (more && (sep == ',' || sep == more)) | |
6007 | ++input_line_pointer; | |
800eeca4 JW |
6008 | return sep; |
6009 | } | |
6010 | ||
cd42ff9c AM |
6011 | static int |
6012 | parse_operand_and_eval (expressionS *e, int more) | |
6013 | { | |
6014 | int sep = parse_operand (e, more); | |
6015 | resolve_expression (e); | |
6016 | return sep; | |
6017 | } | |
6018 | ||
6019 | static int | |
6020 | parse_operand_maybe_eval (expressionS *e, int more, enum ia64_opnd op) | |
6021 | { | |
6022 | int sep = parse_operand (e, more); | |
6023 | switch (op) | |
6024 | { | |
6025 | case IA64_OPND_IMM14: | |
6026 | case IA64_OPND_IMM22: | |
6027 | case IA64_OPND_IMMU64: | |
6028 | case IA64_OPND_TGT25: | |
6029 | case IA64_OPND_TGT25b: | |
6030 | case IA64_OPND_TGT25c: | |
6031 | case IA64_OPND_TGT64: | |
6032 | case IA64_OPND_TAG13: | |
6033 | case IA64_OPND_TAG13b: | |
6034 | case IA64_OPND_LDXMOV: | |
6035 | break; | |
6036 | default: | |
6037 | resolve_expression (e); | |
6038 | break; | |
6039 | } | |
6040 | return sep; | |
6041 | } | |
6042 | ||
800eeca4 JW |
6043 | /* Returns the next entry in the opcode table that matches the one in |
6044 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6045 | found, NULL is returned instead. */ |
800eeca4 JW |
6046 | |
6047 | static struct ia64_opcode * | |
6048 | get_next_opcode (struct ia64_opcode *idesc) | |
6049 | { | |
6050 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6051 | ia64_free_opcode (idesc); | |
6052 | return next; | |
6053 | } | |
6054 | ||
6055 | /* Parse the operands for the opcode and find the opcode variant that | |
6056 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6057 | |
6058 | static struct ia64_opcode * | |
5a49b8ac | 6059 | parse_operands (struct ia64_opcode *idesc) |
800eeca4 JW |
6060 | { |
6061 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6062 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6063 | int reg1, reg2; |
6064 | char reg_class; | |
800eeca4 | 6065 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6066 | enum operand_match_result result; |
800eeca4 JW |
6067 | char mnemonic[129]; |
6068 | char *first_arg = 0, *end, *saved_input_pointer; | |
6069 | unsigned int sof; | |
6070 | ||
9c2799c2 | 6071 | gas_assert (strlen (idesc->name) <= 128); |
800eeca4 JW |
6072 | |
6073 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6074 | if (idesc->operands[2] == IA64_OPND_SOF |
6075 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6076 | { |
6077 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6078 | can't parse the first operand until we have parsed the | |
6079 | remaining operands of the "alloc" instruction. */ | |
6080 | SKIP_WHITESPACE (); | |
6081 | first_arg = input_line_pointer; | |
6082 | end = strchr (input_line_pointer, '='); | |
6083 | if (!end) | |
6084 | { | |
ad4b42b4 | 6085 | as_bad (_("Expected separator `='")); |
800eeca4 JW |
6086 | return 0; |
6087 | } | |
6088 | input_line_pointer = end + 1; | |
6089 | ++i; | |
6090 | ++num_outputs; | |
6091 | } | |
6092 | ||
d3156ecc | 6093 | for (; ; ++i) |
800eeca4 | 6094 | { |
d3156ecc JB |
6095 | if (i < NELEMS (CURR_SLOT.opnd)) |
6096 | { | |
cd42ff9c AM |
6097 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + i, '=', |
6098 | idesc->operands[i]); | |
d3156ecc JB |
6099 | if (CURR_SLOT.opnd[i].X_op == O_absent) |
6100 | break; | |
6101 | } | |
6102 | else | |
6103 | { | |
6104 | expressionS dummy; | |
6105 | ||
e4e8248d | 6106 | sep = parse_operand (&dummy, '='); |
d3156ecc JB |
6107 | if (dummy.X_op == O_absent) |
6108 | break; | |
6109 | } | |
800eeca4 JW |
6110 | |
6111 | ++num_operands; | |
6112 | ||
6113 | if (sep != '=' && sep != ',') | |
6114 | break; | |
6115 | ||
6116 | if (sep == '=') | |
6117 | { | |
6118 | if (num_outputs > 0) | |
ad4b42b4 | 6119 | as_bad (_("Duplicate equal sign (=) in instruction")); |
800eeca4 JW |
6120 | else |
6121 | num_outputs = i + 1; | |
6122 | } | |
6123 | } | |
6124 | if (sep != '\0') | |
6125 | { | |
ad4b42b4 | 6126 | as_bad (_("Illegal operand separator `%c'"), sep); |
800eeca4 JW |
6127 | return 0; |
6128 | } | |
197865e8 | 6129 | |
60b9a617 JB |
6130 | if (idesc->operands[2] == IA64_OPND_SOF |
6131 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 | 6132 | { |
ef0241e7 JB |
6133 | /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r. |
6134 | Note, however, that due to that mapping operand numbers in error | |
6135 | messages for any of the constant operands will not be correct. */ | |
800eeca4 | 6136 | know (strcmp (idesc->name, "alloc") == 0); |
ef0241e7 JB |
6137 | /* The first operand hasn't been parsed/initialized, yet (but |
6138 | num_operands intentionally doesn't account for that). */ | |
6139 | i = num_operands > 4 ? 2 : 1; | |
6140 | #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \ | |
6141 | ? CURR_SLOT.opnd[n].X_add_number \ | |
6142 | : 0) | |
6143 | sof = set_regstack (FORCE_CONST(i), | |
6144 | FORCE_CONST(i + 1), | |
6145 | FORCE_CONST(i + 2), | |
6146 | FORCE_CONST(i + 3)); | |
6147 | #undef FORCE_CONST | |
6148 | ||
6149 | /* now we can parse the first arg: */ | |
6150 | saved_input_pointer = input_line_pointer; | |
6151 | input_line_pointer = first_arg; | |
cd42ff9c AM |
6152 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + 0, '=', |
6153 | idesc->operands[0]); | |
ef0241e7 JB |
6154 | if (sep != '=') |
6155 | --num_outputs; /* force error */ | |
6156 | input_line_pointer = saved_input_pointer; | |
6157 | ||
6158 | CURR_SLOT.opnd[i].X_add_number = sof; | |
6159 | if (CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6160 | && CURR_SLOT.opnd[i + 2].X_op == O_constant) | |
6161 | CURR_SLOT.opnd[i + 1].X_add_number | |
6162 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6163 | else | |
6164 | CURR_SLOT.opnd[i + 1].X_op = O_illegal; | |
6165 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6166 | } |
6167 | ||
d3156ecc | 6168 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6169 | curr_out_of_range_pos = -1; |
6170 | error_pos = 0; | |
800eeca4 JW |
6171 | for (; idesc; idesc = get_next_opcode (idesc)) |
6172 | { | |
6173 | if (num_outputs != idesc->num_outputs) | |
6174 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6175 | if (highest_unmatched_operand < 0) |
6176 | highest_unmatched_operand |= 1; | |
6177 | if (num_operands > NELEMS (idesc->operands) | |
6178 | || (num_operands < NELEMS (idesc->operands) | |
6179 | && idesc->operands[num_operands]) | |
6180 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6181 | continue; /* mismatch in number of arguments */ | |
6182 | if (highest_unmatched_operand < 0) | |
6183 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6184 | |
6185 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6186 | |
6187 | /* Try to match all operands. If we see an out-of-range operand, | |
6188 | then continue trying to match the rest of the operands, since if | |
6189 | the rest match, then this idesc will give the best error message. */ | |
6190 | ||
6191 | out_of_range_pos = -1; | |
800eeca4 | 6192 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6193 | { |
6194 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6195 | if (result != OPERAND_MATCH) | |
6196 | { | |
6197 | if (result != OPERAND_OUT_OF_RANGE) | |
6198 | break; | |
6199 | if (out_of_range_pos < 0) | |
6200 | /* remember position of the first out-of-range operand: */ | |
6201 | out_of_range_pos = i; | |
6202 | } | |
6203 | } | |
800eeca4 | 6204 | |
87f8eb97 JW |
6205 | /* If we did not match all operands, or if at least one operand was |
6206 | out-of-range, then this idesc does not match. Keep track of which | |
6207 | idesc matched the most operands before failing. If we have two | |
6208 | idescs that failed at the same position, and one had an out-of-range | |
6209 | operand, then prefer the out-of-range operand. Thus if we have | |
6210 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6211 | of range instead of an error saying that the constant should have been | |
6212 | a register. */ | |
6213 | ||
6214 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6215 | { |
87f8eb97 JW |
6216 | if (i > highest_unmatched_operand |
6217 | || (i == highest_unmatched_operand | |
6218 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6219 | { |
6220 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6221 | if (out_of_range_pos >= 0) |
6222 | { | |
6223 | expected_operand = idesc->operands[out_of_range_pos]; | |
6224 | error_pos = out_of_range_pos; | |
6225 | } | |
6226 | else | |
6227 | { | |
6228 | expected_operand = idesc->operands[i]; | |
6229 | error_pos = i; | |
6230 | } | |
6231 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6232 | } |
6233 | continue; | |
6234 | } | |
6235 | ||
800eeca4 JW |
6236 | break; |
6237 | } | |
6238 | if (!idesc) | |
6239 | { | |
6240 | if (expected_operand) | |
ad4b42b4 | 6241 | as_bad (_("Operand %u of `%s' should be %s"), |
87f8eb97 | 6242 | error_pos + 1, mnemonic, |
800eeca4 | 6243 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc | 6244 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
ad4b42b4 | 6245 | as_bad (_("Wrong number of output operands")); |
d3156ecc | 6246 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) |
ad4b42b4 | 6247 | as_bad (_("Wrong number of input operands")); |
800eeca4 | 6248 | else |
ad4b42b4 | 6249 | as_bad (_("Operand mismatch")); |
800eeca4 JW |
6250 | return 0; |
6251 | } | |
4b09e828 JB |
6252 | |
6253 | /* Check that the instruction doesn't use | |
6254 | - r0, f0, or f1 as output operands | |
6255 | - the same predicate twice as output operands | |
6256 | - r0 as address of a base update load or store | |
6257 | - the same GR as output and address of a base update load | |
6258 | - two even- or two odd-numbered FRs as output operands of a floating | |
6259 | point parallel load. | |
6260 | At most two (conflicting) output (or output-like) operands can exist, | |
6261 | (floating point parallel loads have three outputs, but the base register, | |
6262 | if updated, cannot conflict with the actual outputs). */ | |
6263 | reg2 = reg1 = -1; | |
6264 | for (i = 0; i < num_operands; ++i) | |
6265 | { | |
6266 | int regno = 0; | |
6267 | ||
6268 | reg_class = 0; | |
6269 | switch (idesc->operands[i]) | |
6270 | { | |
6271 | case IA64_OPND_R1: | |
6272 | case IA64_OPND_R2: | |
6273 | case IA64_OPND_R3: | |
6274 | if (i < num_outputs) | |
6275 | { | |
6276 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6277 | reg_class = 'r'; | |
6278 | else if (reg1 < 0) | |
6279 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6280 | else if (reg2 < 0) | |
6281 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6282 | } | |
6283 | break; | |
6284 | case IA64_OPND_P1: | |
6285 | case IA64_OPND_P2: | |
6286 | if (i < num_outputs) | |
6287 | { | |
6288 | if (reg1 < 0) | |
6289 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6290 | else if (reg2 < 0) | |
6291 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6292 | } | |
6293 | break; | |
6294 | case IA64_OPND_F1: | |
6295 | case IA64_OPND_F2: | |
6296 | case IA64_OPND_F3: | |
6297 | case IA64_OPND_F4: | |
6298 | if (i < num_outputs) | |
6299 | { | |
6300 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6301 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6302 | { | |
6303 | reg_class = 'f'; | |
6304 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6305 | } | |
6306 | else if (reg1 < 0) | |
6307 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6308 | else if (reg2 < 0) | |
6309 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6310 | } | |
6311 | break; | |
6312 | case IA64_OPND_MR3: | |
6313 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6314 | { | |
6315 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6316 | reg_class = 'm'; | |
6317 | else if (reg1 < 0) | |
6318 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6319 | else if (reg2 < 0) | |
6320 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6321 | } | |
6322 | break; | |
6323 | default: | |
6324 | break; | |
6325 | } | |
6326 | switch (reg_class) | |
6327 | { | |
6328 | case 0: | |
6329 | break; | |
6330 | default: | |
ad4b42b4 | 6331 | as_warn (_("Invalid use of `%c%d' as output operand"), reg_class, regno); |
4b09e828 JB |
6332 | break; |
6333 | case 'm': | |
ad4b42b4 | 6334 | as_warn (_("Invalid use of `r%d' as base update address operand"), regno); |
4b09e828 JB |
6335 | break; |
6336 | } | |
6337 | } | |
6338 | if (reg1 == reg2) | |
6339 | { | |
6340 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6341 | { | |
6342 | reg1 -= REG_GR; | |
6343 | reg_class = 'r'; | |
6344 | } | |
6345 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6346 | { | |
6347 | reg1 -= REG_P; | |
6348 | reg_class = 'p'; | |
6349 | } | |
6350 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6351 | { | |
6352 | reg1 -= REG_FR; | |
6353 | reg_class = 'f'; | |
6354 | } | |
6355 | else | |
6356 | reg_class = 0; | |
6357 | if (reg_class) | |
ad4b42b4 | 6358 | as_warn (_("Invalid duplicate use of `%c%d'"), reg_class, reg1); |
4b09e828 JB |
6359 | } |
6360 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6361 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6362 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6363 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6364 | && ! ((reg1 ^ reg2) & 1)) | |
ad4b42b4 | 6365 | as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"), |
4b09e828 JB |
6366 | reg1 - REG_FR, reg2 - REG_FR); |
6367 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6368 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6369 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6370 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
ad4b42b4 | 6371 | as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"), |
4b09e828 | 6372 | reg1 - REG_FR, reg2 - REG_FR); |
800eeca4 JW |
6373 | return idesc; |
6374 | } | |
6375 | ||
6376 | static void | |
5a49b8ac | 6377 | build_insn (struct slot *slot, bfd_vma *insnp) |
800eeca4 JW |
6378 | { |
6379 | const struct ia64_operand *odesc, *o2desc; | |
6380 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6381 | bfd_vma insn; |
6382 | bfd_signed_vma val; | |
800eeca4 JW |
6383 | const char *err; |
6384 | int i; | |
6385 | ||
6386 | insn = idesc->opcode | slot->qp_regno; | |
6387 | ||
6388 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6389 | { | |
c67e42c9 RH |
6390 | if (slot->opnd[i].X_op == O_register |
6391 | || slot->opnd[i].X_op == O_constant | |
6392 | || slot->opnd[i].X_op == O_index) | |
6393 | val = slot->opnd[i].X_add_number; | |
6394 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6395 | { |
c67e42c9 | 6396 | /* This must be the value 0x10000000000000000. */ |
9c2799c2 | 6397 | gas_assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); |
c67e42c9 RH |
6398 | val = 0; |
6399 | } | |
6400 | else | |
6401 | val = 0; | |
6402 | ||
6403 | switch (idesc->operands[i]) | |
6404 | { | |
6405 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6406 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6407 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6408 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6409 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6410 | continue; |
6411 | ||
6412 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6413 | val &= 0x3fffffffffffffffULL; |
6414 | if (val != slot->opnd[i].X_add_number) | |
6415 | as_warn (_("Value truncated to 62 bits")); | |
6416 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6417 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6418 | continue; |
800eeca4 | 6419 | |
c67e42c9 RH |
6420 | case IA64_OPND_TGT64: |
6421 | val >>= 4; | |
6422 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6423 | insn |= ((((val >> 59) & 0x1) << 36) | |
6424 | | (((val >> 0) & 0xfffff) << 13)); | |
6425 | continue; | |
800eeca4 | 6426 | |
c67e42c9 RH |
6427 | case IA64_OPND_AR3: |
6428 | val -= REG_AR; | |
6429 | break; | |
6430 | ||
6431 | case IA64_OPND_B1: | |
6432 | case IA64_OPND_B2: | |
6433 | val -= REG_BR; | |
6434 | break; | |
6435 | ||
6436 | case IA64_OPND_CR3: | |
6437 | val -= REG_CR; | |
6438 | break; | |
6439 | ||
6440 | case IA64_OPND_F1: | |
6441 | case IA64_OPND_F2: | |
6442 | case IA64_OPND_F3: | |
6443 | case IA64_OPND_F4: | |
6444 | val -= REG_FR; | |
6445 | break; | |
6446 | ||
6447 | case IA64_OPND_P1: | |
6448 | case IA64_OPND_P2: | |
6449 | val -= REG_P; | |
6450 | break; | |
6451 | ||
6452 | case IA64_OPND_R1: | |
6453 | case IA64_OPND_R2: | |
6454 | case IA64_OPND_R3: | |
6455 | case IA64_OPND_R3_2: | |
6456 | case IA64_OPND_CPUID_R3: | |
6457 | case IA64_OPND_DBR_R3: | |
6458 | case IA64_OPND_DTR_R3: | |
6459 | case IA64_OPND_ITR_R3: | |
6460 | case IA64_OPND_IBR_R3: | |
6461 | case IA64_OPND_MR3: | |
6462 | case IA64_OPND_MSR_R3: | |
6463 | case IA64_OPND_PKR_R3: | |
6464 | case IA64_OPND_PMC_R3: | |
6465 | case IA64_OPND_PMD_R3: | |
197865e8 | 6466 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6467 | val -= REG_GR; |
6468 | break; | |
6469 | ||
6470 | default: | |
6471 | break; | |
6472 | } | |
6473 | ||
6474 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6475 | err = (*odesc->insert) (odesc, val, &insn); | |
6476 | if (err) | |
6477 | as_bad_where (slot->src_file, slot->src_line, | |
ad4b42b4 | 6478 | _("Bad operand value: %s"), err); |
c67e42c9 RH |
6479 | if (idesc->flags & IA64_OPCODE_PSEUDO) |
6480 | { | |
6481 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6482 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6483 | { | |
6484 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6485 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6486 | } |
c67e42c9 RH |
6487 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6488 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6489 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6490 | { |
c67e42c9 RH |
6491 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6492 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6493 | } |
6494 | } | |
6495 | } | |
6496 | *insnp = insn; | |
6497 | } | |
6498 | ||
6499 | static void | |
5a49b8ac | 6500 | emit_one_bundle (void) |
800eeca4 | 6501 | { |
f4660e2c | 6502 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6503 | enum ia64_unit required_unit, insn_unit = 0; |
6504 | enum ia64_insn_type type[3], insn_type; | |
d3ce72d0 | 6505 | unsigned int template_val, orig_template; |
542d6675 | 6506 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6507 | struct ia64_opcode *idesc; |
6508 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6509 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6510 | bfd_vma t0 = 0, t1 = 0; |
6511 | struct label_fix *lfix; | |
07a53e5c | 6512 | bfd_boolean mark_label; |
800eeca4 JW |
6513 | struct insn_fix *ifix; |
6514 | char mnemonic[16]; | |
6515 | fixS *fix; | |
6516 | char *f; | |
5a9ff93d | 6517 | int addr_mod; |
800eeca4 JW |
6518 | |
6519 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
c13781b8 | 6520 | know (first >= 0 && first < NUM_SLOTS); |
800eeca4 JW |
6521 | n = MIN (3, md.num_slots_in_use); |
6522 | ||
6523 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6524 | otherwise: */ |
800eeca4 JW |
6525 | |
6526 | if (md.slot[first].user_template >= 0) | |
d3ce72d0 | 6527 | user_template = template_val = md.slot[first].user_template; |
800eeca4 JW |
6528 | else |
6529 | { | |
032efc85 | 6530 | /* Auto select appropriate template. */ |
800eeca4 JW |
6531 | memset (type, 0, sizeof (type)); |
6532 | curr = first; | |
6533 | for (i = 0; i < n; ++i) | |
6534 | { | |
032efc85 RH |
6535 | if (md.slot[curr].label_fixups && i != 0) |
6536 | break; | |
800eeca4 JW |
6537 | type[i] = md.slot[curr].idesc->type; |
6538 | curr = (curr + 1) % NUM_SLOTS; | |
6539 | } | |
d3ce72d0 | 6540 | template_val = best_template[type[0]][type[1]][type[2]]; |
800eeca4 JW |
6541 | } |
6542 | ||
542d6675 | 6543 | /* initialize instructions with appropriate nops: */ |
800eeca4 | 6544 | for (i = 0; i < 3; ++i) |
d3ce72d0 | 6545 | insn[i] = nop[ia64_templ_desc[template_val].exec_unit[i]]; |
800eeca4 JW |
6546 | |
6547 | f = frag_more (16); | |
6548 | ||
5a9ff93d JW |
6549 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6550 | from the start of the frag. */ | |
6551 | addr_mod = frag_now_fix () & 15; | |
6552 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6553 | as_bad (_("instruction address is not a multiple of 16")); | |
6554 | frag_now->insn_addr = addr_mod; | |
6555 | frag_now->has_code = 1; | |
6556 | ||
542d6675 | 6557 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6558 | curr = first; |
6559 | idesc = md.slot[curr].idesc; | |
6560 | end_of_insn_group = 0; | |
9b505842 | 6561 | last_slot = -1; |
800eeca4 JW |
6562 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6563 | { | |
d6e78c11 | 6564 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6565 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6566 | unw_rec_list *end_ptr = NULL; | |
6567 | ||
d6e78c11 JW |
6568 | if (ptr) |
6569 | { | |
6570 | /* Find the last prologue/body record in the list for the current | |
6571 | insn, and set the slot number for all records up to that point. | |
6572 | This needs to be done now, because prologue/body records refer to | |
6573 | the current point, not the point after the instruction has been | |
6574 | issued. This matters because there may have been nops emitted | |
6575 | meanwhile. Any non-prologue non-body record followed by a | |
6576 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6577 | unw_rec_list *last_ptr; |
6578 | ||
6579 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6580 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6581 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6582 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6583 | || ptr->r.type == body) | |
6584 | last_ptr = ptr; | |
6585 | if (last_ptr) | |
6586 | { | |
6587 | /* Make last_ptr point one after the last prologue/body | |
6588 | record. */ | |
6589 | last_ptr = last_ptr->next; | |
6590 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6591 | ptr = ptr->next) | |
6592 | { | |
6593 | ptr->slot_number = (unsigned long) f + i; | |
6594 | ptr->slot_frag = frag_now; | |
6595 | } | |
6596 | /* Remove the initialized records, so that we won't accidentally | |
6597 | update them again if we insert a nop and continue. */ | |
6598 | md.slot[curr].unwind_record = last_ptr; | |
6599 | } | |
6600 | } | |
e0c9811a | 6601 | |
f4660e2c JB |
6602 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6603 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6604 | { |
f4660e2c JB |
6605 | if (curr == first) |
6606 | manual_bundling = 1; | |
800eeca4 | 6607 | else |
f4660e2c JB |
6608 | break; /* Need to start a new bundle. */ |
6609 | } | |
6610 | ||
744b6414 JW |
6611 | /* If this instruction specifies a template, then it must be the first |
6612 | instruction of a bundle. */ | |
6613 | if (curr != first && md.slot[curr].user_template >= 0) | |
6614 | break; | |
6615 | ||
f4660e2c JB |
6616 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6617 | { | |
6618 | if (manual_bundling && !manual_bundling_off) | |
6619 | { | |
6620 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6621 | _("`%s' must be last in bundle"), idesc->name); |
f4660e2c JB |
6622 | if (i < 2) |
6623 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6624 | } | |
6625 | i = 2; | |
800eeca4 JW |
6626 | } |
6627 | if (idesc->flags & IA64_OPCODE_LAST) | |
6628 | { | |
2434f565 JW |
6629 | int required_slot; |
6630 | unsigned int required_template; | |
800eeca4 JW |
6631 | |
6632 | /* If we need a stop bit after an M slot, our only choice is | |
6633 | template 5 (M;;MI). If we need a stop bit after a B | |
6634 | slot, our only choice is to place it at the end of the | |
6635 | bundle, because the only available templates are MIB, | |
6636 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6637 | than M and B slots because these are the only kind of | |
6638 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
d3ce72d0 | 6639 | required_template = template_val; |
800eeca4 JW |
6640 | switch (idesc->type) |
6641 | { | |
6642 | case IA64_TYPE_M: | |
6643 | required_slot = 0; | |
6644 | required_template = 5; | |
6645 | break; | |
6646 | ||
6647 | case IA64_TYPE_B: | |
6648 | required_slot = 2; | |
6649 | break; | |
6650 | ||
6651 | default: | |
6652 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 NC |
6653 | _("Internal error: don't know how to force %s to end of instruction group"), |
6654 | idesc->name); | |
800eeca4 JW |
6655 | required_slot = i; |
6656 | break; | |
6657 | } | |
f4660e2c JB |
6658 | if (manual_bundling |
6659 | && (i > required_slot | |
6660 | || (required_slot == 2 && !manual_bundling_off) | |
6661 | || (user_template >= 0 | |
6662 | /* Changing from MMI to M;MI is OK. */ | |
d3ce72d0 | 6663 | && (template_val ^ required_template) > 1))) |
f4660e2c JB |
6664 | { |
6665 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6666 | _("`%s' must be last in instruction group"), |
f4660e2c JB |
6667 | idesc->name); |
6668 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6669 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6670 | } | |
800eeca4 JW |
6671 | if (required_slot < i) |
6672 | /* Can't fit this instruction. */ | |
6673 | break; | |
6674 | ||
6675 | i = required_slot; | |
d3ce72d0 | 6676 | if (required_template != template_val) |
800eeca4 JW |
6677 | { |
6678 | /* If we switch the template, we need to reset the NOPs | |
6679 | after slot i. The slot-types of the instructions ahead | |
6680 | of i never change, so we don't need to worry about | |
6681 | changing NOPs in front of this slot. */ | |
6682 | for (j = i; j < 3; ++j) | |
6683 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
53022e4a JW |
6684 | |
6685 | /* We just picked a template that includes the stop bit in the | |
6686 | middle, so we don't need another one emitted later. */ | |
6687 | md.slot[curr].end_of_insn_group = 0; | |
800eeca4 | 6688 | } |
d3ce72d0 | 6689 | template_val = required_template; |
800eeca4 JW |
6690 | } |
6691 | if (curr != first && md.slot[curr].label_fixups) | |
6692 | { | |
f4660e2c JB |
6693 | if (manual_bundling) |
6694 | { | |
6695 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6696 | _("Label must be first in a bundle")); |
f4660e2c JB |
6697 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6698 | } | |
800eeca4 JW |
6699 | /* This insn must go into the first slot of a bundle. */ |
6700 | break; | |
6701 | } | |
6702 | ||
800eeca4 JW |
6703 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6704 | { | |
6705 | /* We need an instruction group boundary in the middle of a | |
6706 | bundle. See if we can switch to an other template with | |
6707 | an appropriate boundary. */ | |
6708 | ||
d3ce72d0 | 6709 | orig_template = template_val; |
800eeca4 JW |
6710 | if (i == 1 && (user_template == 4 |
6711 | || (user_template < 0 | |
d3ce72d0 | 6712 | && (ia64_templ_desc[template_val].exec_unit[0] |
800eeca4 JW |
6713 | == IA64_UNIT_M)))) |
6714 | { | |
d3ce72d0 | 6715 | template_val = 5; |
800eeca4 JW |
6716 | end_of_insn_group = 0; |
6717 | } | |
6718 | else if (i == 2 && (user_template == 0 | |
6719 | || (user_template < 0 | |
d3ce72d0 | 6720 | && (ia64_templ_desc[template_val].exec_unit[1] |
800eeca4 JW |
6721 | == IA64_UNIT_I))) |
6722 | /* This test makes sure we don't switch the template if | |
6723 | the next instruction is one that needs to be first in | |
6724 | an instruction group. Since all those instructions are | |
6725 | in the M group, there is no way such an instruction can | |
6726 | fit in this bundle even if we switch the template. The | |
6727 | reason we have to check for this is that otherwise we | |
6728 | may end up generating "MI;;I M.." which has the deadly | |
6729 | effect that the second M instruction is no longer the | |
f4660e2c | 6730 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6731 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6732 | { | |
d3ce72d0 | 6733 | template_val = 1; |
800eeca4 JW |
6734 | end_of_insn_group = 0; |
6735 | } | |
f4660e2c JB |
6736 | else if (i == 1 |
6737 | && user_template == 0 | |
6738 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6739 | /* Use the next slot. */ | |
6740 | continue; | |
800eeca4 JW |
6741 | else if (curr != first) |
6742 | /* can't fit this insn */ | |
6743 | break; | |
6744 | ||
d3ce72d0 | 6745 | if (template_val != orig_template) |
800eeca4 JW |
6746 | /* if we switch the template, we need to reset the NOPs |
6747 | after slot i. The slot-types of the instructions ahead | |
6748 | of i never change, so we don't need to worry about | |
6749 | changing NOPs in front of this slot. */ | |
6750 | for (j = i; j < 3; ++j) | |
d3ce72d0 | 6751 | insn[j] = nop[ia64_templ_desc[template_val].exec_unit[j]]; |
800eeca4 | 6752 | } |
d3ce72d0 | 6753 | required_unit = ia64_templ_desc[template_val].exec_unit[i]; |
800eeca4 | 6754 | |
c10d9d8f | 6755 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6756 | if (idesc->type == IA64_TYPE_DYN) |
6757 | { | |
97762d08 JB |
6758 | enum ia64_opnd opnd1, opnd2; |
6759 | ||
800eeca4 JW |
6760 | if ((strcmp (idesc->name, "nop") == 0) |
6761 | || (strcmp (idesc->name, "break") == 0)) | |
6762 | insn_unit = required_unit; | |
91d777ee L |
6763 | else if (strcmp (idesc->name, "hint") == 0) |
6764 | { | |
6765 | insn_unit = required_unit; | |
6766 | if (required_unit == IA64_UNIT_B) | |
6767 | { | |
6768 | switch (md.hint_b) | |
6769 | { | |
6770 | case hint_b_ok: | |
6771 | break; | |
6772 | case hint_b_warning: | |
ad4b42b4 | 6773 | as_warn (_("hint in B unit may be treated as nop")); |
91d777ee L |
6774 | break; |
6775 | case hint_b_error: | |
6776 | /* When manual bundling is off and there is no | |
6777 | user template, we choose a different unit so | |
6778 | that hint won't go into the current slot. We | |
6779 | will fill the current bundle with nops and | |
6780 | try to put hint into the next bundle. */ | |
6781 | if (!manual_bundling && user_template < 0) | |
6782 | insn_unit = IA64_UNIT_I; | |
6783 | else | |
ad4b42b4 | 6784 | as_bad (_("hint in B unit can't be used")); |
91d777ee L |
6785 | break; |
6786 | } | |
6787 | } | |
6788 | } | |
97762d08 JB |
6789 | else if (strcmp (idesc->name, "chk.s") == 0 |
6790 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6791 | { |
6792 | insn_unit = IA64_UNIT_M; | |
97762d08 | 6793 | if (required_unit == IA64_UNIT_I |
d3ce72d0 | 6794 | || (required_unit == IA64_UNIT_F && template_val == 6)) |
800eeca4 JW |
6795 | insn_unit = IA64_UNIT_I; |
6796 | } | |
6797 | else | |
ad4b42b4 | 6798 | as_fatal (_("emit_one_bundle: unexpected dynamic op")); |
800eeca4 | 6799 | |
f9f21a03 L |
6800 | snprintf (mnemonic, sizeof (mnemonic), "%s.%c", |
6801 | idesc->name, "?imbfxx"[insn_unit]); | |
97762d08 JB |
6802 | opnd1 = idesc->operands[0]; |
6803 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6804 | ia64_free_opcode (idesc); |
97762d08 JB |
6805 | idesc = ia64_find_opcode (mnemonic); |
6806 | /* moves to/from ARs have collisions */ | |
6807 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6808 | { | |
6809 | while (idesc != NULL | |
6810 | && (idesc->operands[0] != opnd1 | |
6811 | || idesc->operands[1] != opnd2)) | |
6812 | idesc = get_next_opcode (idesc); | |
6813 | } | |
97762d08 | 6814 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6815 | } |
6816 | else | |
6817 | { | |
6818 | insn_type = idesc->type; | |
6819 | insn_unit = IA64_UNIT_NIL; | |
6820 | switch (insn_type) | |
6821 | { | |
6822 | case IA64_TYPE_A: | |
6823 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6824 | insn_unit = required_unit; | |
6825 | break; | |
542d6675 | 6826 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6827 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6828 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6829 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6830 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6831 | default: break; | |
6832 | } | |
6833 | } | |
6834 | ||
6835 | if (insn_unit != required_unit) | |
9b505842 | 6836 | continue; /* Try next slot. */ |
800eeca4 | 6837 | |
07a53e5c RH |
6838 | /* Now is a good time to fix up the labels for this insn. */ |
6839 | mark_label = FALSE; | |
6840 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) | |
6841 | { | |
6842 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6843 | symbol_set_frag (lfix->sym, frag_now); | |
6844 | mark_label |= lfix->dw2_mark_labels; | |
6845 | } | |
6846 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6847 | { | |
6848 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6849 | symbol_set_frag (lfix->sym, frag_now); | |
6850 | } | |
6851 | ||
6852 | if (debug_type == DEBUG_DWARF2 | |
6853 | || md.slot[curr].loc_directive_seen | |
6854 | || mark_label) | |
196e8040 JW |
6855 | { |
6856 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6857 | |
196e8040 | 6858 | md.slot[curr].loc_directive_seen = 0; |
07a53e5c RH |
6859 | if (mark_label) |
6860 | md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
6861 | ||
196e8040 JW |
6862 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); |
6863 | } | |
800eeca4 JW |
6864 | |
6865 | build_insn (md.slot + curr, insn + i); | |
6866 | ||
d6e78c11 JW |
6867 | ptr = md.slot[curr].unwind_record; |
6868 | if (ptr) | |
6869 | { | |
6870 | /* Set slot numbers for all remaining unwind records belonging to the | |
6871 | current insn. There can not be any prologue/body unwind records | |
6872 | here. */ | |
d6e78c11 JW |
6873 | for (; ptr != end_ptr; ptr = ptr->next) |
6874 | { | |
6875 | ptr->slot_number = (unsigned long) f + i; | |
6876 | ptr->slot_frag = frag_now; | |
6877 | } | |
6878 | md.slot[curr].unwind_record = NULL; | |
6879 | } | |
10850f29 | 6880 | |
800eeca4 JW |
6881 | if (required_unit == IA64_UNIT_L) |
6882 | { | |
6883 | know (i == 1); | |
6884 | /* skip one slot for long/X-unit instructions */ | |
6885 | ++i; | |
6886 | } | |
6887 | --md.num_slots_in_use; | |
9b505842 | 6888 | last_slot = i; |
800eeca4 | 6889 | |
800eeca4 JW |
6890 | for (j = 0; j < md.slot[curr].num_fixups; ++j) |
6891 | { | |
6892 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6893 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6894 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6895 | fix->tc_fix_data.opnd = ifix->opnd; | |
800eeca4 JW |
6896 | fix->fx_file = md.slot[curr].src_file; |
6897 | fix->fx_line = md.slot[curr].src_line; | |
6898 | } | |
6899 | ||
6900 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6901 | ||
542d6675 | 6902 | /* clear slot: */ |
800eeca4 JW |
6903 | ia64_free_opcode (md.slot[curr].idesc); |
6904 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6905 | md.slot[curr].user_template = -1; | |
6906 | ||
6907 | if (manual_bundling_off) | |
6908 | { | |
6909 | manual_bundling = 0; | |
6910 | break; | |
6911 | } | |
6912 | curr = (curr + 1) % NUM_SLOTS; | |
6913 | idesc = md.slot[curr].idesc; | |
6914 | } | |
6abae71c JW |
6915 | |
6916 | /* A user template was specified, but the first following instruction did | |
6917 | not fit. This can happen with or without manual bundling. */ | |
6918 | if (md.num_slots_in_use > 0 && last_slot < 0) | |
6919 | { | |
6920 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6921 | _("`%s' does not fit into %s template"), |
d3ce72d0 | 6922 | idesc->name, ia64_templ_desc[template_val].name); |
6abae71c JW |
6923 | /* Drop first insn so we don't livelock. */ |
6924 | --md.num_slots_in_use; | |
6925 | know (curr == first); | |
6926 | ia64_free_opcode (md.slot[curr].idesc); | |
6927 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6928 | md.slot[curr].user_template = -1; | |
6929 | } | |
6930 | else if (manual_bundling > 0) | |
800eeca4 JW |
6931 | { |
6932 | if (md.num_slots_in_use > 0) | |
ac025970 | 6933 | { |
9b505842 JB |
6934 | if (last_slot >= 2) |
6935 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6936 | _("`%s' does not fit into bundle"), idesc->name); |
9b505842 JB |
6937 | else |
6938 | { | |
6939 | const char *where; | |
6940 | ||
d3ce72d0 | 6941 | if (template_val == 2) |
9b505842 JB |
6942 | where = "X slot"; |
6943 | else if (last_slot == 0) | |
6944 | where = "slots 2 or 3"; | |
6945 | else | |
6946 | where = "slot 3"; | |
6947 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6948 | _("`%s' can't go in %s of %s template"), |
d3ce72d0 | 6949 | idesc->name, where, ia64_templ_desc[template_val].name); |
9b505842 | 6950 | } |
ac025970 | 6951 | } |
800eeca4 JW |
6952 | else |
6953 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6954 | _("Missing '}' at end of file")); |
800eeca4 | 6955 | } |
6abae71c | 6956 | |
800eeca4 JW |
6957 | know (md.num_slots_in_use < NUM_SLOTS); |
6958 | ||
d3ce72d0 | 6959 | t0 = end_of_insn_group | (template_val << 1) | (insn[0] << 5) | (insn[1] << 46); |
800eeca4 JW |
6960 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); |
6961 | ||
44f5c83a JW |
6962 | number_to_chars_littleendian (f + 0, t0, 8); |
6963 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
6964 | } |
6965 | ||
6966 | int | |
5a49b8ac | 6967 | md_parse_option (int c, char *arg) |
800eeca4 | 6968 | { |
7463c317 | 6969 | |
800eeca4 JW |
6970 | switch (c) |
6971 | { | |
c43c2cc5 | 6972 | /* Switches from the Intel assembler. */ |
44f5c83a | 6973 | case 'm': |
800eeca4 JW |
6974 | if (strcmp (arg, "ilp64") == 0 |
6975 | || strcmp (arg, "lp64") == 0 | |
6976 | || strcmp (arg, "p64") == 0) | |
6977 | { | |
6978 | md.flags |= EF_IA_64_ABI64; | |
6979 | } | |
6980 | else if (strcmp (arg, "ilp32") == 0) | |
6981 | { | |
6982 | md.flags &= ~EF_IA_64_ABI64; | |
6983 | } | |
6984 | else if (strcmp (arg, "le") == 0) | |
6985 | { | |
6986 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6987 | default_big_endian = 0; |
800eeca4 JW |
6988 | } |
6989 | else if (strcmp (arg, "be") == 0) | |
6990 | { | |
6991 | md.flags |= EF_IA_64_BE; | |
549f748d | 6992 | default_big_endian = 1; |
800eeca4 | 6993 | } |
970d6792 L |
6994 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6995 | { | |
6996 | arg += 13; | |
6997 | if (strcmp (arg, "warning") == 0) | |
6998 | md.unwind_check = unwind_check_warning; | |
6999 | else if (strcmp (arg, "error") == 0) | |
7000 | md.unwind_check = unwind_check_error; | |
7001 | else | |
7002 | return 0; | |
7003 | } | |
91d777ee L |
7004 | else if (strncmp (arg, "hint.b=", 7) == 0) |
7005 | { | |
7006 | arg += 7; | |
7007 | if (strcmp (arg, "ok") == 0) | |
7008 | md.hint_b = hint_b_ok; | |
7009 | else if (strcmp (arg, "warning") == 0) | |
7010 | md.hint_b = hint_b_warning; | |
7011 | else if (strcmp (arg, "error") == 0) | |
7012 | md.hint_b = hint_b_error; | |
7013 | else | |
7014 | return 0; | |
7015 | } | |
8c2fda1d L |
7016 | else if (strncmp (arg, "tune=", 5) == 0) |
7017 | { | |
7018 | arg += 5; | |
7019 | if (strcmp (arg, "itanium1") == 0) | |
7020 | md.tune = itanium1; | |
7021 | else if (strcmp (arg, "itanium2") == 0) | |
7022 | md.tune = itanium2; | |
7023 | else | |
7024 | return 0; | |
7025 | } | |
800eeca4 JW |
7026 | else |
7027 | return 0; | |
7028 | break; | |
7029 | ||
7030 | case 'N': | |
7031 | if (strcmp (arg, "so") == 0) | |
7032 | { | |
542d6675 | 7033 | /* Suppress signon message. */ |
800eeca4 JW |
7034 | } |
7035 | else if (strcmp (arg, "pi") == 0) | |
7036 | { | |
7037 | /* Reject privileged instructions. FIXME */ | |
7038 | } | |
7039 | else if (strcmp (arg, "us") == 0) | |
7040 | { | |
7041 | /* Allow union of signed and unsigned range. FIXME */ | |
7042 | } | |
7043 | else if (strcmp (arg, "close_fcalls") == 0) | |
7044 | { | |
7045 | /* Do not resolve global function calls. */ | |
7046 | } | |
7047 | else | |
7048 | return 0; | |
7049 | break; | |
7050 | ||
7051 | case 'C': | |
7052 | /* temp[="prefix"] Insert temporary labels into the object file | |
7053 | symbol table prefixed by "prefix". | |
7054 | Default prefix is ":temp:". | |
7055 | */ | |
7056 | break; | |
7057 | ||
7058 | case 'a': | |
800eeca4 JW |
7059 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7060 | according to <tgt> -- | |
7061 | exit: branch out from the current context (default) | |
7062 | labels: all labels in context may be branch targets | |
7063 | */ | |
85b40035 L |
7064 | if (strncmp (arg, "indirect=", 9) != 0) |
7065 | return 0; | |
800eeca4 JW |
7066 | break; |
7067 | ||
7068 | case 'x': | |
7069 | /* -X conflicts with an ignored option, use -x instead */ | |
7070 | md.detect_dv = 1; | |
7071 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7072 | { |
7073 | /* set default mode to explicit */ | |
7074 | md.default_explicit_mode = 1; | |
7075 | break; | |
7076 | } | |
800eeca4 | 7077 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7078 | { |
7079 | md.default_explicit_mode = 0; | |
7080 | } | |
f1dab70d JB |
7081 | else if (strcmp (arg, "none") == 0) |
7082 | { | |
7083 | md.detect_dv = 0; | |
7084 | } | |
800eeca4 | 7085 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7086 | { |
7087 | md.debug_dv = 1; | |
7088 | } | |
800eeca4 | 7089 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7090 | { |
7091 | md.default_explicit_mode = 1; | |
7092 | md.debug_dv = 1; | |
7093 | } | |
f1dab70d JB |
7094 | else if (strcmp (arg, "debugn") == 0) |
7095 | { | |
7096 | md.debug_dv = 1; | |
7097 | md.detect_dv = 0; | |
7098 | } | |
800eeca4 | 7099 | else |
542d6675 KH |
7100 | { |
7101 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7102 | } | |
800eeca4 JW |
7103 | break; |
7104 | ||
7105 | case 'S': | |
7106 | /* nops Print nops statistics. */ | |
7107 | break; | |
7108 | ||
c43c2cc5 JW |
7109 | /* GNU specific switches for gcc. */ |
7110 | case OPTION_MCONSTANT_GP: | |
7111 | md.flags |= EF_IA_64_CONS_GP; | |
7112 | break; | |
7113 | ||
7114 | case OPTION_MAUTO_PIC: | |
7115 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7116 | break; | |
7117 | ||
800eeca4 JW |
7118 | default: |
7119 | return 0; | |
7120 | } | |
7121 | ||
7122 | return 1; | |
7123 | } | |
7124 | ||
7125 | void | |
5a49b8ac | 7126 | md_show_usage (FILE *stream) |
800eeca4 | 7127 | { |
542d6675 | 7128 | fputs (_("\ |
800eeca4 | 7129 | IA-64 options:\n\ |
6290819d NC |
7130 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7131 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7132 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7133 | without function descriptors (sets ELF header flag\n\ | |
7134 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7135 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7136 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7137 | -mtune=[itanium1|itanium2]\n\ |
7138 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7139 | -munwind-check=[warning|error]\n\ |
7140 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7141 | -mhint.b=[ok|warning|error]\n\ |
7142 | hint.b check (default -mhint.b=error)\n\ | |
a1727c1a NC |
7143 | -x | -xexplicit turn on dependency violation checking\n"), stream); |
7144 | /* Note for translators: "automagically" can be translated as "automatically" here. */ | |
7145 | fputs (_("\ | |
f1dab70d JB |
7146 | -xauto automagically remove dependency violations (default)\n\ |
7147 | -xnone turn off dependency violation checking\n\ | |
7148 | -xdebug debug dependency violation checker\n\ | |
7149 | -xdebugn debug dependency violation checker but turn off\n\ | |
7150 | dependency violation checking\n\ | |
7151 | -xdebugx debug dependency violation checker and turn on\n\ | |
7152 | dependency violation checking\n"), | |
800eeca4 JW |
7153 | stream); |
7154 | } | |
7155 | ||
acebd4ce | 7156 | void |
5a49b8ac | 7157 | ia64_after_parse_args (void) |
acebd4ce AS |
7158 | { |
7159 | if (debug_type == DEBUG_STABS) | |
7160 | as_fatal (_("--gstabs is not supported for ia64")); | |
7161 | } | |
7162 | ||
44576e1f RH |
7163 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7164 | ||
7165 | static int | |
800eeca4 JW |
7166 | match (int templ, int type, int slot) |
7167 | { | |
7168 | enum ia64_unit unit; | |
7169 | int result; | |
7170 | ||
7171 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7172 | switch (type) | |
7173 | { | |
7174 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7175 | case IA64_TYPE_A: | |
7176 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7177 | break; | |
7178 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7179 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7180 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7181 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7182 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7183 | default: result = 0; break; | |
7184 | } | |
7185 | return result; | |
7186 | } | |
7187 | ||
7c06efaa JW |
7188 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7189 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7190 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7191 | |
7192 | static inline int | |
7193 | extra_goodness (int templ, int slot) | |
7194 | { | |
8c2fda1d L |
7195 | switch (md.tune) |
7196 | { | |
7197 | case itanium1: | |
7198 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7199 | return 2; | |
7200 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7201 | return 1; | |
7202 | else | |
7203 | return 0; | |
7204 | break; | |
7205 | case itanium2: | |
7206 | if (match (templ, IA64_TYPE_M, slot) | |
7207 | || match (templ, IA64_TYPE_I, slot)) | |
7208 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7209 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7210 | branch-prediction. */ | |
7211 | return 2; | |
7212 | else | |
7213 | return 0; | |
7214 | break; | |
7215 | default: | |
7216 | abort (); | |
7217 | return 0; | |
7218 | } | |
44576e1f RH |
7219 | } |
7220 | ||
800eeca4 JW |
7221 | /* This function is called once, at assembler startup time. It sets |
7222 | up all the tables, etc. that the MD part of the assembler will need | |
7223 | that can be determined before arguments are parsed. */ | |
7224 | void | |
5a49b8ac | 7225 | md_begin (void) |
800eeca4 | 7226 | { |
8b84be9d | 7227 | int i, j, k, t, goodness, best, ok; |
800eeca4 JW |
7228 | const char *err; |
7229 | char name[8]; | |
7230 | ||
7231 | md.auto_align = 1; | |
7232 | md.explicit_mode = md.default_explicit_mode; | |
7233 | ||
7234 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7235 | ||
0234cb7c | 7236 | /* Make sure function pointers get initialized. */ |
10a98291 | 7237 | target_big_endian = -1; |
549f748d | 7238 | dot_byteorder (default_big_endian); |
10a98291 | 7239 | |
35f5df7f L |
7240 | alias_hash = hash_new (); |
7241 | alias_name_hash = hash_new (); | |
7242 | secalias_hash = hash_new (); | |
7243 | secalias_name_hash = hash_new (); | |
7244 | ||
13ae64f3 JJ |
7245 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7246 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7247 | &zero_address_frag); | |
7248 | ||
7249 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7250 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7251 | &zero_address_frag); | |
7252 | ||
800eeca4 | 7253 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7254 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7255 | &zero_address_frag); | |
800eeca4 JW |
7256 | |
7257 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7258 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7259 | &zero_address_frag); | |
800eeca4 JW |
7260 | |
7261 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7262 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7263 | &zero_address_frag); | |
800eeca4 | 7264 | |
fa2c7eff RH |
7265 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7266 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7267 | &zero_address_frag); | |
7268 | ||
c67e42c9 | 7269 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7270 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7271 | &zero_address_frag); | |
c67e42c9 | 7272 | |
800eeca4 | 7273 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7274 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7275 | &zero_address_frag); | |
800eeca4 JW |
7276 | |
7277 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7278 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7279 | &zero_address_frag); | |
800eeca4 JW |
7280 | |
7281 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7282 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7283 | &zero_address_frag); | |
800eeca4 | 7284 | |
13ae64f3 JJ |
7285 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7286 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7287 | &zero_address_frag); | |
7288 | ||
800eeca4 | 7289 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7290 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7291 | &zero_address_frag); | |
800eeca4 JW |
7292 | |
7293 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7294 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7295 | &zero_address_frag); | |
800eeca4 | 7296 | |
13ae64f3 JJ |
7297 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7298 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7299 | &zero_address_frag); | |
7300 | ||
7301 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7302 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7303 | &zero_address_frag); | |
7304 | ||
7305 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7306 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7307 | &zero_address_frag); | |
7308 | ||
3969b680 RH |
7309 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7310 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7311 | &zero_address_frag); | |
7312 | ||
9d0e8497 TG |
7313 | #ifdef TE_VMS |
7314 | pseudo_func[FUNC_SLOTCOUNT_RELOC].u.sym = | |
7315 | symbol_new (".<slotcount>", undefined_section, FUNC_SLOTCOUNT_RELOC, | |
7316 | &zero_address_frag); | |
7317 | #endif | |
7318 | ||
f6fe78d6 JW |
7319 | if (md.tune != itanium1) |
7320 | { | |
7321 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7322 | le_nop[0] = 0x8; | |
7323 | le_nop_stop[0] = 0x9; | |
7324 | } | |
7325 | ||
197865e8 | 7326 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7327 | base 4 value, in which each match counts for 3. Match-failures |
7328 | result in NOPs and we use extra_goodness() to pick the execution | |
7329 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7330 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7331 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7332 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7333 | { | |
7334 | best = 0; | |
7335 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7336 | { | |
7337 | goodness = 0; | |
7338 | if (match (t, i, 0)) | |
7339 | { | |
7340 | if (match (t, j, 1)) | |
7341 | { | |
286cee81 | 7342 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7343 | goodness = 3 + 3 + 3; |
800eeca4 | 7344 | else |
44576e1f | 7345 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7346 | } |
7347 | else if (match (t, j, 2)) | |
44576e1f | 7348 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7349 | else |
44576e1f RH |
7350 | { |
7351 | goodness = 3; | |
7352 | goodness += extra_goodness (t, 1); | |
7353 | goodness += extra_goodness (t, 2); | |
7354 | } | |
800eeca4 JW |
7355 | } |
7356 | else if (match (t, i, 1)) | |
7357 | { | |
286cee81 | 7358 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7359 | goodness = 3 + 3; |
800eeca4 | 7360 | else |
44576e1f | 7361 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7362 | } |
7363 | else if (match (t, i, 2)) | |
44576e1f | 7364 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7365 | |
7366 | if (goodness > best) | |
7367 | { | |
7368 | best = goodness; | |
7369 | best_template[i][j][k] = t; | |
7370 | } | |
7371 | } | |
7372 | } | |
7373 | ||
7c06efaa JW |
7374 | #ifdef DEBUG_TEMPLATES |
7375 | /* For debugging changes to the best_template calculations. We don't care | |
7376 | about combinations with invalid instructions, so start the loops at 1. */ | |
7377 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7378 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7379 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7380 | { | |
7381 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7382 | 'x', 'd' }; | |
7383 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7384 | type_letter[k], | |
7385 | ia64_templ_desc[best_template[i][j][k]].name); | |
7386 | } | |
7387 | #endif | |
7388 | ||
800eeca4 JW |
7389 | for (i = 0; i < NUM_SLOTS; ++i) |
7390 | md.slot[i].user_template = -1; | |
7391 | ||
7392 | md.pseudo_hash = hash_new (); | |
7393 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7394 | { | |
7395 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7396 | (void *) (pseudo_opcode + i)); | |
7397 | if (err) | |
ad4b42b4 | 7398 | as_fatal (_("ia64.md_begin: can't hash `%s': %s"), |
800eeca4 JW |
7399 | pseudo_opcode[i].name, err); |
7400 | } | |
7401 | ||
7402 | md.reg_hash = hash_new (); | |
7403 | md.dynreg_hash = hash_new (); | |
7404 | md.const_hash = hash_new (); | |
7405 | md.entry_hash = hash_new (); | |
7406 | ||
542d6675 | 7407 | /* general registers: */ |
8b84be9d JB |
7408 | declare_register_set ("r", 128, REG_GR); |
7409 | declare_register ("gp", REG_GR + 1); | |
7410 | declare_register ("sp", REG_GR + 12); | |
7411 | declare_register ("tp", REG_GR + 13); | |
7412 | declare_register_set ("ret", 4, REG_GR + 8); | |
800eeca4 | 7413 | |
542d6675 | 7414 | /* floating point registers: */ |
8b84be9d JB |
7415 | declare_register_set ("f", 128, REG_FR); |
7416 | declare_register_set ("farg", 8, REG_FR + 8); | |
7417 | declare_register_set ("fret", 8, REG_FR + 8); | |
800eeca4 | 7418 | |
542d6675 | 7419 | /* branch registers: */ |
8b84be9d JB |
7420 | declare_register_set ("b", 8, REG_BR); |
7421 | declare_register ("rp", REG_BR + 0); | |
800eeca4 | 7422 | |
8b84be9d JB |
7423 | /* predicate registers: */ |
7424 | declare_register_set ("p", 64, REG_P); | |
7425 | declare_register ("pr", REG_PR); | |
7426 | declare_register ("pr.rot", REG_PR_ROT); | |
800eeca4 | 7427 | |
8b84be9d JB |
7428 | /* application registers: */ |
7429 | declare_register_set ("ar", 128, REG_AR); | |
5e0bd176 JB |
7430 | for (i = 0; i < NELEMS (ar); ++i) |
7431 | declare_register (ar[i].name, REG_AR + ar[i].regnum); | |
800eeca4 | 7432 | |
8b84be9d JB |
7433 | /* control registers: */ |
7434 | declare_register_set ("cr", 128, REG_CR); | |
5e0bd176 JB |
7435 | for (i = 0; i < NELEMS (cr); ++i) |
7436 | declare_register (cr[i].name, REG_CR + cr[i].regnum); | |
800eeca4 | 7437 | |
8b84be9d JB |
7438 | declare_register ("ip", REG_IP); |
7439 | declare_register ("cfm", REG_CFM); | |
7440 | declare_register ("psr", REG_PSR); | |
7441 | declare_register ("psr.l", REG_PSR_L); | |
7442 | declare_register ("psr.um", REG_PSR_UM); | |
7443 | ||
7444 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7445 | { | |
7446 | unsigned int regnum = indirect_reg[i].regnum; | |
7447 | ||
7448 | md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum); | |
7449 | } | |
800eeca4 | 7450 | |
542d6675 | 7451 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7452 | declare_register ("psp", REG_PSP); |
7453 | ||
800eeca4 JW |
7454 | for (i = 0; i < NELEMS (const_bits); ++i) |
7455 | { | |
7456 | err = hash_insert (md.const_hash, const_bits[i].name, | |
5a49b8ac | 7457 | (void *) (const_bits + i)); |
800eeca4 | 7458 | if (err) |
ad4b42b4 | 7459 | as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"), |
800eeca4 JW |
7460 | name, err); |
7461 | } | |
7462 | ||
44f5c83a JW |
7463 | /* Set the architecture and machine depending on defaults and command line |
7464 | options. */ | |
7465 | if (md.flags & EF_IA_64_ABI64) | |
7466 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7467 | else | |
7468 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7469 | ||
7470 | if (! ok) | |
7471 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7472 | |
557debba JW |
7473 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7474 | ||
7475 | if (md.flags & EF_IA_64_ABI64) | |
7476 | { | |
7477 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7478 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7479 | } | |
7480 | else | |
7481 | { | |
7482 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7483 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7484 | } | |
7485 | ||
800eeca4 JW |
7486 | md.mem_offset.hint = 0; |
7487 | md.path = 0; | |
7488 | md.maxpaths = 0; | |
7489 | md.entry_labels = NULL; | |
7490 | } | |
7491 | ||
970d6792 L |
7492 | /* Set the default options in md. Cannot do this in md_begin because |
7493 | that is called after md_parse_option which is where we set the | |
7494 | options in md based on command line options. */ | |
44f5c83a JW |
7495 | |
7496 | void | |
5a49b8ac | 7497 | ia64_init (int argc ATTRIBUTE_UNUSED, char **argv ATTRIBUTE_UNUSED) |
44f5c83a | 7498 | { |
1cd8ff38 | 7499 | md.flags = MD_FLAGS_DEFAULT; |
01e1a5bc NC |
7500 | #ifndef TE_VMS |
7501 | /* Don't turn on dependency checking for VMS, doesn't work. */ | |
f1dab70d | 7502 | md.detect_dv = 1; |
01e1a5bc | 7503 | #endif |
970d6792 L |
7504 | /* FIXME: We should change it to unwind_check_error someday. */ |
7505 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7506 | md.hint_b = hint_b_error; |
8c2fda1d | 7507 | md.tune = itanium2; |
44f5c83a JW |
7508 | } |
7509 | ||
7510 | /* Return a string for the target object file format. */ | |
7511 | ||
7512 | const char * | |
5a49b8ac | 7513 | ia64_target_format (void) |
44f5c83a JW |
7514 | { |
7515 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7516 | { | |
72a76794 JW |
7517 | if (md.flags & EF_IA_64_BE) |
7518 | { | |
7519 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7520 | #if defined(TE_AIX50) |
7463c317 | 7521 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7522 | #elif defined(TE_HPUX) |
7523 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7524 | #else |
72a76794 | 7525 | return "elf64-ia64-big"; |
7463c317 | 7526 | #endif |
72a76794 | 7527 | else |
1cd8ff38 | 7528 | #if defined(TE_AIX50) |
7463c317 | 7529 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7530 | #elif defined(TE_HPUX) |
7531 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7532 | #else |
72a76794 | 7533 | return "elf32-ia64-big"; |
7463c317 | 7534 | #endif |
72a76794 | 7535 | } |
44f5c83a | 7536 | else |
72a76794 JW |
7537 | { |
7538 | if (md.flags & EF_IA_64_ABI64) | |
01e1a5bc | 7539 | #if defined (TE_AIX50) |
7463c317 | 7540 | return "elf64-ia64-aix-little"; |
01e1a5bc NC |
7541 | #elif defined (TE_VMS) |
7542 | { | |
7543 | md.flags |= EF_IA_64_ARCHVER_1; | |
7544 | return "elf64-ia64-vms"; | |
7545 | } | |
7463c317 | 7546 | #else |
72a76794 | 7547 | return "elf64-ia64-little"; |
7463c317 | 7548 | #endif |
72a76794 | 7549 | else |
7463c317 TW |
7550 | #ifdef TE_AIX50 |
7551 | return "elf32-ia64-aix-little"; | |
7552 | #else | |
72a76794 | 7553 | return "elf32-ia64-little"; |
7463c317 | 7554 | #endif |
72a76794 | 7555 | } |
44f5c83a JW |
7556 | } |
7557 | else | |
7558 | return "unknown-format"; | |
7559 | } | |
7560 | ||
800eeca4 | 7561 | void |
5a49b8ac | 7562 | ia64_end_of_source (void) |
800eeca4 | 7563 | { |
542d6675 | 7564 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7565 | insn_group_break (1, 0, 0); |
7566 | ||
542d6675 | 7567 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7568 | ia64_flush_insns (); |
7569 | ||
7570 | bfd_set_private_flags (stdoutput, md.flags); | |
7571 | ||
800eeca4 JW |
7572 | md.mem_offset.hint = 0; |
7573 | } | |
7574 | ||
7575 | void | |
5a49b8ac | 7576 | ia64_start_line (void) |
800eeca4 | 7577 | { |
e4e8248d JB |
7578 | static int first; |
7579 | ||
7580 | if (!first) { | |
7581 | /* Make sure we don't reference input_line_pointer[-1] when that's | |
7582 | not valid. */ | |
7583 | first = 1; | |
7584 | return; | |
7585 | } | |
7586 | ||
f1bcba5b | 7587 | if (md.qp.X_op == O_register) |
ad4b42b4 | 7588 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
7589 | md.qp.X_op = O_absent; |
7590 | ||
7591 | if (ignore_input ()) | |
7592 | return; | |
7593 | ||
7594 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7595 | { | |
7596 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7597 | { |
7598 | static int warned; | |
7599 | ||
7600 | if (!warned) | |
7601 | { | |
7602 | warned = 1; | |
7603 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7604 | } | |
7605 | } | |
800eeca4 | 7606 | else |
542d6675 | 7607 | insn_group_break (1, 0, 0); |
800eeca4 | 7608 | } |
e4e8248d | 7609 | else if (input_line_pointer[-1] == '{') |
800eeca4 | 7610 | { |
800eeca4 | 7611 | if (md.manual_bundling) |
ad4b42b4 | 7612 | as_warn (_("Found '{' when manual bundling is already turned on")); |
800eeca4 JW |
7613 | else |
7614 | CURR_SLOT.manual_bundling_on = 1; | |
7615 | md.manual_bundling = 1; | |
7616 | ||
542d6675 KH |
7617 | /* Bundling is only acceptable in explicit mode |
7618 | or when in default automatic mode. */ | |
800eeca4 | 7619 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7620 | { |
7621 | if (!md.mode_explicitly_set | |
7622 | && !md.default_explicit_mode) | |
7623 | dot_dv_mode ('E'); | |
7624 | else | |
7625 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7626 | } | |
e4e8248d JB |
7627 | } |
7628 | else if (input_line_pointer[-1] == '}') | |
7629 | { | |
800eeca4 | 7630 | if (!md.manual_bundling) |
ad4b42b4 | 7631 | as_warn (_("Found '}' when manual bundling is off")); |
800eeca4 JW |
7632 | else |
7633 | PREV_SLOT.manual_bundling_off = 1; | |
7634 | md.manual_bundling = 0; | |
7635 | ||
7636 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7637 | if (md.detect_dv |
542d6675 KH |
7638 | && md.explicit_mode |
7639 | && !md.mode_explicitly_set | |
7640 | && !md.default_explicit_mode) | |
7641 | dot_dv_mode ('A'); | |
e4e8248d JB |
7642 | } |
7643 | } | |
800eeca4 | 7644 | |
e4e8248d JB |
7645 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7646 | labels. */ | |
7647 | static int defining_tag = 0; | |
7648 | ||
7649 | int | |
5a49b8ac | 7650 | ia64_unrecognized_line (int ch) |
e4e8248d JB |
7651 | { |
7652 | switch (ch) | |
7653 | { | |
7654 | case '(': | |
60d11e55 | 7655 | expression_and_evaluate (&md.qp); |
e4e8248d | 7656 | if (*input_line_pointer++ != ')') |
800eeca4 | 7657 | { |
ad4b42b4 | 7658 | as_bad (_("Expected ')'")); |
e4e8248d JB |
7659 | return 0; |
7660 | } | |
7661 | if (md.qp.X_op != O_register) | |
7662 | { | |
ad4b42b4 | 7663 | as_bad (_("Qualifying predicate expected")); |
e4e8248d JB |
7664 | return 0; |
7665 | } | |
7666 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7667 | { | |
ad4b42b4 | 7668 | as_bad (_("Predicate register expected")); |
e4e8248d | 7669 | return 0; |
800eeca4 | 7670 | } |
800eeca4 JW |
7671 | return 1; |
7672 | ||
f1bcba5b JW |
7673 | case '[': |
7674 | { | |
7675 | char *s; | |
7676 | char c; | |
7677 | symbolS *tag; | |
4d5a53ff | 7678 | int temp; |
f1bcba5b JW |
7679 | |
7680 | if (md.qp.X_op == O_register) | |
7681 | { | |
ad4b42b4 | 7682 | as_bad (_("Tag must come before qualifying predicate.")); |
f1bcba5b JW |
7683 | return 0; |
7684 | } | |
4d5a53ff JW |
7685 | |
7686 | /* This implements just enough of read_a_source_file in read.c to | |
7687 | recognize labels. */ | |
7688 | if (is_name_beginner (*input_line_pointer)) | |
7689 | { | |
7690 | s = input_line_pointer; | |
7691 | c = get_symbol_end (); | |
7692 | } | |
7693 | else if (LOCAL_LABELS_FB | |
3882b010 | 7694 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7695 | { |
7696 | temp = 0; | |
3882b010 | 7697 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7698 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7699 | fb_label_instance_inc (temp); | |
7700 | s = fb_label_name (temp, 0); | |
7701 | c = *input_line_pointer; | |
7702 | } | |
7703 | else | |
7704 | { | |
7705 | s = NULL; | |
7706 | c = '\0'; | |
7707 | } | |
f1bcba5b JW |
7708 | if (c != ':') |
7709 | { | |
7710 | /* Put ':' back for error messages' sake. */ | |
7711 | *input_line_pointer++ = ':'; | |
ad4b42b4 | 7712 | as_bad (_("Expected ':'")); |
f1bcba5b JW |
7713 | return 0; |
7714 | } | |
4d5a53ff | 7715 | |
f1bcba5b JW |
7716 | defining_tag = 1; |
7717 | tag = colon (s); | |
7718 | defining_tag = 0; | |
7719 | /* Put ':' back for error messages' sake. */ | |
7720 | *input_line_pointer++ = ':'; | |
7721 | if (*input_line_pointer++ != ']') | |
7722 | { | |
ad4b42b4 | 7723 | as_bad (_("Expected ']'")); |
f1bcba5b JW |
7724 | return 0; |
7725 | } | |
7726 | if (! tag) | |
7727 | { | |
ad4b42b4 | 7728 | as_bad (_("Tag name expected")); |
f1bcba5b JW |
7729 | return 0; |
7730 | } | |
7731 | return 1; | |
7732 | } | |
7733 | ||
800eeca4 JW |
7734 | default: |
7735 | break; | |
7736 | } | |
542d6675 KH |
7737 | |
7738 | /* Not a valid line. */ | |
7739 | return 0; | |
800eeca4 JW |
7740 | } |
7741 | ||
7742 | void | |
5a49b8ac | 7743 | ia64_frob_label (struct symbol *sym) |
800eeca4 JW |
7744 | { |
7745 | struct label_fix *fix; | |
7746 | ||
f1bcba5b JW |
7747 | /* Tags need special handling since they are not bundle breaks like |
7748 | labels. */ | |
7749 | if (defining_tag) | |
7750 | { | |
7751 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7752 | fix->sym = sym; | |
7753 | fix->next = CURR_SLOT.tag_fixups; | |
07a53e5c | 7754 | fix->dw2_mark_labels = FALSE; |
f1bcba5b JW |
7755 | CURR_SLOT.tag_fixups = fix; |
7756 | ||
7757 | return; | |
7758 | } | |
7759 | ||
800eeca4 JW |
7760 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7761 | { | |
7762 | md.last_text_seg = now_seg; | |
7763 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7764 | fix->sym = sym; | |
7765 | fix->next = CURR_SLOT.label_fixups; | |
07a53e5c | 7766 | fix->dw2_mark_labels = dwarf2_loc_mark_labels; |
800eeca4 JW |
7767 | CURR_SLOT.label_fixups = fix; |
7768 | ||
542d6675 | 7769 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7770 | if (md.path == md.maxpaths) |
542d6675 KH |
7771 | { |
7772 | md.maxpaths += 20; | |
7773 | md.entry_labels = (const char **) | |
7774 | xrealloc ((void *) md.entry_labels, | |
7775 | md.maxpaths * sizeof (char *)); | |
7776 | } | |
800eeca4 JW |
7777 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7778 | } | |
7779 | } | |
7780 | ||
936cf02e JW |
7781 | #ifdef TE_HPUX |
7782 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7783 | that are declared but unused. This routine removes declared, | |
7784 | unused symbols from an object. */ | |
7785 | int | |
5a49b8ac | 7786 | ia64_frob_symbol (struct symbol *sym) |
936cf02e | 7787 | { |
45dfa85a | 7788 | if ((S_GET_SEGMENT (sym) == bfd_und_section_ptr && ! symbol_used_p (sym) && |
936cf02e | 7789 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) |
45dfa85a | 7790 | || (S_GET_SEGMENT (sym) == bfd_abs_section_ptr |
936cf02e JW |
7791 | && ! S_IS_EXTERNAL (sym))) |
7792 | return 1; | |
7793 | return 0; | |
7794 | } | |
7795 | #endif | |
7796 | ||
800eeca4 | 7797 | void |
5a49b8ac | 7798 | ia64_flush_pending_output (void) |
800eeca4 | 7799 | { |
4d5a53ff JW |
7800 | if (!md.keep_pending_output |
7801 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7802 | { |
7803 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7804 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7805 | insn_group_break (1, 0, 0); | |
7806 | ia64_flush_insns (); | |
7807 | } | |
7808 | } | |
7809 | ||
7810 | /* Do ia64-specific expression optimization. All that's done here is | |
7811 | to transform index expressions that are either due to the indexing | |
7812 | of rotating registers or due to the indexing of indirect register | |
7813 | sets. */ | |
7814 | int | |
5a49b8ac | 7815 | ia64_optimize_expr (expressionS *l, operatorT op, expressionS *r) |
800eeca4 | 7816 | { |
6a2375c6 JB |
7817 | if (op != O_index) |
7818 | return 0; | |
7819 | resolve_expression (l); | |
7820 | if (l->X_op == O_register) | |
800eeca4 | 7821 | { |
6a2375c6 JB |
7822 | unsigned num_regs = l->X_add_number >> 16; |
7823 | ||
7824 | resolve_expression (r); | |
7825 | if (num_regs) | |
800eeca4 | 7826 | { |
6a2375c6 JB |
7827 | /* Left side is a .rotX-allocated register. */ |
7828 | if (r->X_op != O_constant) | |
800eeca4 | 7829 | { |
ad4b42b4 | 7830 | as_bad (_("Rotating register index must be a non-negative constant")); |
6a2375c6 JB |
7831 | r->X_add_number = 0; |
7832 | } | |
7833 | else if ((valueT) r->X_add_number >= num_regs) | |
7834 | { | |
ad4b42b4 | 7835 | as_bad (_("Index out of range 0..%u"), num_regs - 1); |
800eeca4 JW |
7836 | r->X_add_number = 0; |
7837 | } | |
7838 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7839 | return 1; | |
7840 | } | |
6a2375c6 | 7841 | else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR) |
800eeca4 | 7842 | { |
6a2375c6 JB |
7843 | if (r->X_op != O_register |
7844 | || r->X_add_number < REG_GR | |
7845 | || r->X_add_number > REG_GR + 127) | |
800eeca4 | 7846 | { |
ad4b42b4 | 7847 | as_bad (_("Indirect register index must be a general register")); |
6a2375c6 | 7848 | r->X_add_number = REG_GR; |
800eeca4 JW |
7849 | } |
7850 | l->X_op = O_index; | |
8b84be9d | 7851 | l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID]; |
800eeca4 JW |
7852 | l->X_add_number = r->X_add_number; |
7853 | return 1; | |
7854 | } | |
7855 | } | |
ad4b42b4 | 7856 | as_bad (_("Index can only be applied to rotating or indirect registers")); |
6a2375c6 JB |
7857 | /* Fall back to some register use of which has as little as possible |
7858 | side effects, to minimize subsequent error messages. */ | |
7859 | l->X_op = O_register; | |
7860 | l->X_add_number = REG_GR + 3; | |
7861 | return 1; | |
800eeca4 JW |
7862 | } |
7863 | ||
7864 | int | |
5a49b8ac | 7865 | ia64_parse_name (char *name, expressionS *e, char *nextcharP) |
800eeca4 JW |
7866 | { |
7867 | struct const_desc *cdesc; | |
7868 | struct dynreg *dr = 0; | |
16a48f83 | 7869 | unsigned int idx; |
800eeca4 JW |
7870 | struct symbol *sym; |
7871 | char *end; | |
7872 | ||
16a48f83 JB |
7873 | if (*name == '@') |
7874 | { | |
7875 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7876 | ||
7877 | /* Find what relocation pseudo-function we're dealing with. */ | |
7878 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7879 | if (pseudo_func[idx].name | |
7880 | && pseudo_func[idx].name[0] == name[1] | |
7881 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7882 | { | |
7883 | pseudo_type = pseudo_func[idx].type; | |
7884 | break; | |
7885 | } | |
7886 | switch (pseudo_type) | |
7887 | { | |
7888 | case PSEUDO_FUNC_RELOC: | |
7889 | end = input_line_pointer; | |
7890 | if (*nextcharP != '(') | |
7891 | { | |
ad4b42b4 | 7892 | as_bad (_("Expected '('")); |
2f6d622e | 7893 | break; |
16a48f83 JB |
7894 | } |
7895 | /* Skip '('. */ | |
7896 | ++input_line_pointer; | |
7897 | expression (e); | |
7898 | if (*input_line_pointer != ')') | |
7899 | { | |
ad4b42b4 | 7900 | as_bad (_("Missing ')'")); |
16a48f83 JB |
7901 | goto done; |
7902 | } | |
7903 | /* Skip ')'. */ | |
7904 | ++input_line_pointer; | |
9d0e8497 TG |
7905 | #ifdef TE_VMS |
7906 | if (idx == FUNC_SLOTCOUNT_RELOC) | |
7907 | { | |
7908 | /* @slotcount can accept any expression. Canonicalize. */ | |
7909 | e->X_add_symbol = make_expr_symbol (e); | |
7910 | e->X_op = O_symbol; | |
7911 | e->X_add_number = 0; | |
7912 | } | |
7913 | #endif | |
16a48f83 JB |
7914 | if (e->X_op != O_symbol) |
7915 | { | |
7916 | if (e->X_op != O_pseudo_fixup) | |
7917 | { | |
ad4b42b4 | 7918 | as_bad (_("Not a symbolic expression")); |
16a48f83 JB |
7919 | goto done; |
7920 | } | |
7921 | if (idx != FUNC_LT_RELATIVE) | |
7922 | { | |
ad4b42b4 | 7923 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7924 | goto done; |
7925 | } | |
7926 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7927 | { | |
7928 | case FUNC_FPTR_RELATIVE: | |
7929 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7930 | case FUNC_DTP_MODULE: | |
7931 | idx = FUNC_LT_DTP_MODULE; break; | |
7932 | case FUNC_DTP_RELATIVE: | |
7933 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7934 | case FUNC_TP_RELATIVE: | |
7935 | idx = FUNC_LT_TP_RELATIVE; break; | |
7936 | default: | |
ad4b42b4 | 7937 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7938 | goto done; |
7939 | } | |
7940 | } | |
7941 | /* Make sure gas doesn't get rid of local symbols that are used | |
7942 | in relocs. */ | |
7943 | e->X_op = O_pseudo_fixup; | |
7944 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7945 | done: |
7946 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7947 | break; |
7948 | ||
7949 | case PSEUDO_FUNC_CONST: | |
7950 | e->X_op = O_constant; | |
7951 | e->X_add_number = pseudo_func[idx].u.ival; | |
7952 | break; | |
7953 | ||
7954 | case PSEUDO_FUNC_REG: | |
7955 | e->X_op = O_register; | |
7956 | e->X_add_number = pseudo_func[idx].u.ival; | |
7957 | break; | |
7958 | ||
7959 | default: | |
7960 | return 0; | |
7961 | } | |
16a48f83 JB |
7962 | return 1; |
7963 | } | |
7964 | ||
542d6675 | 7965 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7966 | sym = hash_find (md.reg_hash, name); |
7967 | if (sym) | |
7968 | { | |
7969 | e->X_op = O_register; | |
7970 | e->X_add_number = S_GET_VALUE (sym); | |
7971 | return 1; | |
7972 | } | |
7973 | ||
7974 | cdesc = hash_find (md.const_hash, name); | |
7975 | if (cdesc) | |
7976 | { | |
7977 | e->X_op = O_constant; | |
7978 | e->X_add_number = cdesc->value; | |
7979 | return 1; | |
7980 | } | |
7981 | ||
542d6675 | 7982 | /* check for inN, locN, or outN: */ |
26b810ce | 7983 | idx = 0; |
800eeca4 JW |
7984 | switch (name[0]) |
7985 | { | |
7986 | case 'i': | |
3882b010 | 7987 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7988 | { |
7989 | dr = &md.in; | |
26b810ce | 7990 | idx = 2; |
800eeca4 JW |
7991 | } |
7992 | break; | |
7993 | ||
7994 | case 'l': | |
3882b010 | 7995 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7996 | { |
7997 | dr = &md.loc; | |
26b810ce | 7998 | idx = 3; |
800eeca4 JW |
7999 | } |
8000 | break; | |
8001 | ||
8002 | case 'o': | |
3882b010 | 8003 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
8004 | { |
8005 | dr = &md.out; | |
26b810ce | 8006 | idx = 3; |
800eeca4 JW |
8007 | } |
8008 | break; | |
8009 | ||
8010 | default: | |
8011 | break; | |
8012 | } | |
8013 | ||
26b810ce JB |
8014 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
8015 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 8016 | { |
26b810ce JB |
8017 | unsigned long regnum; |
8018 | ||
542d6675 | 8019 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
8020 | regnum = strtoul (name + idx, &end, 10); |
8021 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 8022 | { |
26b810ce | 8023 | if (regnum >= dr->num_regs) |
800eeca4 JW |
8024 | { |
8025 | if (!dr->num_regs) | |
ad4b42b4 | 8026 | as_bad (_("No current frame")); |
800eeca4 | 8027 | else |
ad4b42b4 | 8028 | as_bad (_("Register number out of range 0..%u"), |
542d6675 | 8029 | dr->num_regs - 1); |
800eeca4 JW |
8030 | regnum = 0; |
8031 | } | |
8032 | e->X_op = O_register; | |
8033 | e->X_add_number = dr->base + regnum; | |
8034 | return 1; | |
8035 | } | |
8036 | } | |
8037 | ||
20b36a95 JB |
8038 | end = alloca (strlen (name) + 1); |
8039 | strcpy (end, name); | |
8040 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8041 | if ((dr = hash_find (md.dynreg_hash, name))) |
8042 | { | |
8043 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8044 | Store the base register number in the low 16 bits of |
8045 | X_add_number and the size of the register set in the top 16 | |
8046 | bits. */ | |
800eeca4 JW |
8047 | e->X_op = O_register; |
8048 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8049 | return 1; | |
8050 | } | |
8051 | return 0; | |
8052 | } | |
8053 | ||
8054 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8055 | ||
8056 | char * | |
5a49b8ac | 8057 | ia64_canonicalize_symbol_name (char *name) |
800eeca4 | 8058 | { |
20b36a95 JB |
8059 | size_t len = strlen (name), full = len; |
8060 | ||
8061 | while (len > 0 && name[len - 1] == '#') | |
8062 | --len; | |
8063 | if (len <= 0) | |
8064 | { | |
8065 | if (full > 0) | |
ad4b42b4 | 8066 | as_bad (_("Standalone `#' is illegal")); |
20b36a95 JB |
8067 | } |
8068 | else if (len < full - 1) | |
ad4b42b4 | 8069 | as_warn (_("Redundant `#' suffix operators")); |
20b36a95 | 8070 | name[len] = '\0'; |
800eeca4 JW |
8071 | return name; |
8072 | } | |
8073 | ||
3e37788f JW |
8074 | /* Return true if idesc is a conditional branch instruction. This excludes |
8075 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8076 | because they always read/write resources regardless of the value of the | |
8077 | qualifying predicate. br.ia must always use p0, and hence is always | |
8078 | taken. Thus this function returns true for branches which can fall | |
8079 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8080 | |
800eeca4 | 8081 | static int |
5a49b8ac | 8082 | is_conditional_branch (struct ia64_opcode *idesc) |
800eeca4 | 8083 | { |
1deb8127 | 8084 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8085 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8086 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8087 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8088 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8089 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8090 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8091 | || idesc->name[2] == 'l' | |
8092 | /* br.cond, br.call, br.clr */ | |
8093 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8094 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8095 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8096 | } |
8097 | ||
8098 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8099 | returns zero. */ |
8100 | ||
800eeca4 | 8101 | static int |
5a49b8ac | 8102 | is_taken_branch (struct ia64_opcode *idesc) |
800eeca4 JW |
8103 | { |
8104 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8105 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8106 | } |
8107 | ||
8108 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8109 | doubt, returns zero. */ |
8110 | ||
800eeca4 | 8111 | static int |
5a49b8ac | 8112 | is_interruption_or_rfi (struct ia64_opcode *idesc) |
800eeca4 JW |
8113 | { |
8114 | if (strcmp (idesc->name, "rfi") == 0) | |
8115 | return 1; | |
8116 | return 0; | |
8117 | } | |
8118 | ||
8119 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8120 | -1 if there is no dependency. */ | |
542d6675 | 8121 | |
800eeca4 | 8122 | static int |
5a49b8ac | 8123 | depends_on (int depind, struct ia64_opcode *idesc) |
800eeca4 JW |
8124 | { |
8125 | int i; | |
8126 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8127 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8128 | { |
542d6675 KH |
8129 | if (depind == DEP (dep->chks[i])) |
8130 | return i; | |
800eeca4 JW |
8131 | } |
8132 | return -1; | |
8133 | } | |
8134 | ||
8135 | /* Determine a set of specific resources used for a particular resource | |
8136 | class. Returns the number of specific resources identified For those | |
8137 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8138 | marked nonspecific. |
800eeca4 JW |
8139 | |
8140 | Meanings of value in 'NOTE': | |
8141 | 1) only read/write when the register number is explicitly encoded in the | |
8142 | insn. | |
8143 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8144 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8145 | 3) general register value is used to specify an indirect register; not |
8146 | determinable statically. | |
8147 | 4) only read the given resource when bits 7:0 of the indirect index | |
8148 | register value does not match the register number of the resource; not | |
8149 | determinable statically. | |
8150 | 5) all rules are implementation specific. | |
8151 | 6) only when both the index specified by the reader and the index specified | |
8152 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8153 | statically. |
800eeca4 | 8154 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8155 | set |
800eeca4 JW |
8156 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8157 | only read when these insns reference FR2-31 | |
8158 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8159 | written when these insns write FR32-127 | |
8160 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8161 | instruction | |
8162 | 11) The target predicates are written independently of PR[qp], but source | |
8163 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8164 | cannot statically be determined, all source registers are marked used. | |
8165 | 12) This insn only reads the specified predicate register when that | |
8166 | register is the PR[qp]. | |
ad4b42b4 | 8167 | 13) This reference to ld-c only applies to the GR whose value is loaded |
197865e8 | 8168 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8169 | 14) The RSE resource includes the implementation-specific RSE internal |
8170 | state resources. At least one (and possibly more) of these resources are | |
8171 | read by each instruction listed in IC:rse-readers. At least one (and | |
8172 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8173 | IC:rse-writers. |
800eeca4 | 8174 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8175 | generate. |
7f3dfb9c L |
8176 | 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and |
8177 | mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up. | |
800eeca4 JW |
8178 | |
8179 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8180 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8181 | */ |
8182 | ||
8183 | #define MAX_SPECS 256 | |
8184 | #define DV_CHK 1 | |
8185 | #define DV_REG 0 | |
8186 | ||
8187 | static int | |
5a49b8ac AM |
8188 | specify_resource (const struct ia64_dependency *dep, |
8189 | struct ia64_opcode *idesc, | |
8190 | /* is this a DV chk or a DV reg? */ | |
8191 | int type, | |
8192 | /* returned specific resources */ | |
8193 | struct rsrc specs[MAX_SPECS], | |
8194 | /* resource note for this insn's usage */ | |
8195 | int note, | |
8196 | /* which execution path to examine */ | |
8197 | int path) | |
800eeca4 JW |
8198 | { |
8199 | int count = 0; | |
8200 | int i; | |
8201 | int rsrc_write = 0; | |
8202 | struct rsrc tmpl; | |
197865e8 | 8203 | |
800eeca4 JW |
8204 | if (dep->mode == IA64_DV_WAW |
8205 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8206 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8207 | rsrc_write = 1; | |
8208 | ||
8209 | /* template for any resources we identify */ | |
8210 | tmpl.dependency = dep; | |
8211 | tmpl.note = note; | |
8212 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8213 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8214 | tmpl.link_to_qp_branch = 1; | |
8215 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8216 | tmpl.mem_offset.offset = 0; |
8217 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8218 | tmpl.specific = 1; |
a66d2bb7 | 8219 | tmpl.index = -1; |
7484b8e6 | 8220 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8221 | tmpl.depind = 0; |
8222 | tmpl.file = NULL; | |
8223 | tmpl.line = 0; | |
8224 | tmpl.path = 0; | |
800eeca4 JW |
8225 | |
8226 | #define UNHANDLED \ | |
8227 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8228 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8229 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8230 | ||
8231 | /* we don't need to track these */ | |
8232 | if (dep->semantics == IA64_DVS_NONE) | |
8233 | return 0; | |
8234 | ||
8235 | switch (dep->specifier) | |
8236 | { | |
8237 | case IA64_RS_AR_K: | |
8238 | if (note == 1) | |
542d6675 KH |
8239 | { |
8240 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8241 | { | |
8242 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8243 | if (regno >= 0 && regno <= 7) | |
8244 | { | |
8245 | specs[count] = tmpl; | |
8246 | specs[count++].index = regno; | |
8247 | } | |
8248 | } | |
8249 | } | |
800eeca4 | 8250 | else if (note == 0) |
542d6675 KH |
8251 | { |
8252 | for (i = 0; i < 8; i++) | |
8253 | { | |
8254 | specs[count] = tmpl; | |
8255 | specs[count++].index = i; | |
8256 | } | |
8257 | } | |
800eeca4 | 8258 | else |
542d6675 KH |
8259 | { |
8260 | UNHANDLED; | |
8261 | } | |
800eeca4 JW |
8262 | break; |
8263 | ||
8264 | case IA64_RS_AR_UNAT: | |
8265 | /* This is a mov =AR or mov AR= instruction. */ | |
8266 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8267 | { | |
8268 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8269 | if (regno == AR_UNAT) | |
8270 | { | |
8271 | specs[count++] = tmpl; | |
8272 | } | |
8273 | } | |
8274 | else | |
8275 | { | |
8276 | /* This is a spill/fill, or other instruction that modifies the | |
8277 | unat register. */ | |
8278 | ||
8279 | /* Unless we can determine the specific bits used, mark the whole | |
8280 | thing; bits 8:3 of the memory address indicate the bit used in | |
8281 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8282 | subset of conflicts. */ | |
8283 | specs[count] = tmpl; | |
8284 | if (md.mem_offset.hint) | |
8285 | { | |
542d6675 KH |
8286 | if (md.debug_dv) |
8287 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8288 | /* The index isn't actually used, just set it to something | |
8289 | approximating the bit index. */ | |
800eeca4 JW |
8290 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8291 | specs[count].mem_offset.hint = 1; | |
8292 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8293 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8294 | } | |
8295 | else | |
8296 | { | |
8297 | specs[count++].specific = 0; | |
8298 | } | |
8299 | } | |
8300 | break; | |
8301 | ||
8302 | case IA64_RS_AR: | |
8303 | if (note == 1) | |
542d6675 KH |
8304 | { |
8305 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8306 | { | |
8307 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8308 | if ((regno >= 8 && regno <= 15) | |
8309 | || (regno >= 20 && regno <= 23) | |
8310 | || (regno >= 31 && regno <= 39) | |
8311 | || (regno >= 41 && regno <= 47) | |
8312 | || (regno >= 67 && regno <= 111)) | |
8313 | { | |
8314 | specs[count] = tmpl; | |
8315 | specs[count++].index = regno; | |
8316 | } | |
8317 | } | |
8318 | } | |
800eeca4 | 8319 | else |
542d6675 KH |
8320 | { |
8321 | UNHANDLED; | |
8322 | } | |
800eeca4 JW |
8323 | break; |
8324 | ||
8325 | case IA64_RS_ARb: | |
8326 | if (note == 1) | |
542d6675 KH |
8327 | { |
8328 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8329 | { | |
8330 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8331 | if ((regno >= 48 && regno <= 63) | |
8332 | || (regno >= 112 && regno <= 127)) | |
8333 | { | |
8334 | specs[count] = tmpl; | |
8335 | specs[count++].index = regno; | |
8336 | } | |
8337 | } | |
8338 | } | |
800eeca4 | 8339 | else if (note == 0) |
542d6675 KH |
8340 | { |
8341 | for (i = 48; i < 64; i++) | |
8342 | { | |
8343 | specs[count] = tmpl; | |
8344 | specs[count++].index = i; | |
8345 | } | |
8346 | for (i = 112; i < 128; i++) | |
8347 | { | |
8348 | specs[count] = tmpl; | |
8349 | specs[count++].index = i; | |
8350 | } | |
8351 | } | |
197865e8 | 8352 | else |
542d6675 KH |
8353 | { |
8354 | UNHANDLED; | |
8355 | } | |
800eeca4 JW |
8356 | break; |
8357 | ||
8358 | case IA64_RS_BR: | |
8359 | if (note != 1) | |
542d6675 KH |
8360 | { |
8361 | UNHANDLED; | |
8362 | } | |
800eeca4 | 8363 | else |
542d6675 KH |
8364 | { |
8365 | if (rsrc_write) | |
8366 | { | |
8367 | for (i = 0; i < idesc->num_outputs; i++) | |
8368 | if (idesc->operands[i] == IA64_OPND_B1 | |
8369 | || idesc->operands[i] == IA64_OPND_B2) | |
8370 | { | |
8371 | specs[count] = tmpl; | |
8372 | specs[count++].index = | |
8373 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8374 | } | |
8375 | } | |
8376 | else | |
8377 | { | |
40449e9f | 8378 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8379 | if (idesc->operands[i] == IA64_OPND_B1 |
8380 | || idesc->operands[i] == IA64_OPND_B2) | |
8381 | { | |
8382 | specs[count] = tmpl; | |
8383 | specs[count++].index = | |
8384 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8385 | } | |
8386 | } | |
8387 | } | |
800eeca4 JW |
8388 | break; |
8389 | ||
8390 | case IA64_RS_CPUID: /* four or more registers */ | |
8391 | if (note == 3) | |
542d6675 KH |
8392 | { |
8393 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8394 | { | |
8395 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8396 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8397 | && KNOWN (regno)) | |
8398 | { | |
8399 | specs[count] = tmpl; | |
8400 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8401 | } | |
8402 | else | |
8403 | { | |
8404 | specs[count] = tmpl; | |
8405 | specs[count++].specific = 0; | |
8406 | } | |
8407 | } | |
8408 | } | |
800eeca4 | 8409 | else |
542d6675 KH |
8410 | { |
8411 | UNHANDLED; | |
8412 | } | |
800eeca4 JW |
8413 | break; |
8414 | ||
8415 | case IA64_RS_DBR: /* four or more registers */ | |
8416 | if (note == 3) | |
542d6675 KH |
8417 | { |
8418 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8419 | { | |
8420 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8421 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8422 | && KNOWN (regno)) | |
8423 | { | |
8424 | specs[count] = tmpl; | |
8425 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8426 | } | |
8427 | else | |
8428 | { | |
8429 | specs[count] = tmpl; | |
8430 | specs[count++].specific = 0; | |
8431 | } | |
8432 | } | |
8433 | } | |
800eeca4 | 8434 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8435 | { |
8436 | specs[count] = tmpl; | |
8437 | specs[count++].specific = 0; | |
8438 | } | |
800eeca4 | 8439 | else |
542d6675 KH |
8440 | { |
8441 | UNHANDLED; | |
8442 | } | |
800eeca4 JW |
8443 | break; |
8444 | ||
8445 | case IA64_RS_IBR: /* four or more registers */ | |
8446 | if (note == 3) | |
542d6675 KH |
8447 | { |
8448 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8449 | { | |
8450 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8451 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8452 | && KNOWN (regno)) | |
8453 | { | |
8454 | specs[count] = tmpl; | |
8455 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8456 | } | |
8457 | else | |
8458 | { | |
8459 | specs[count] = tmpl; | |
8460 | specs[count++].specific = 0; | |
8461 | } | |
8462 | } | |
8463 | } | |
800eeca4 | 8464 | else |
542d6675 KH |
8465 | { |
8466 | UNHANDLED; | |
8467 | } | |
800eeca4 JW |
8468 | break; |
8469 | ||
8470 | case IA64_RS_MSR: | |
8471 | if (note == 5) | |
8472 | { | |
8473 | /* These are implementation specific. Force all references to | |
8474 | conflict with all other references. */ | |
8475 | specs[count] = tmpl; | |
8476 | specs[count++].specific = 0; | |
8477 | } | |
8478 | else | |
8479 | { | |
8480 | UNHANDLED; | |
8481 | } | |
8482 | break; | |
8483 | ||
8484 | case IA64_RS_PKR: /* 16 or more registers */ | |
8485 | if (note == 3 || note == 4) | |
542d6675 KH |
8486 | { |
8487 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8488 | { | |
8489 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8490 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8491 | && KNOWN (regno)) | |
8492 | { | |
8493 | if (note == 3) | |
8494 | { | |
8495 | specs[count] = tmpl; | |
8496 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8497 | } | |
8498 | else | |
8499 | for (i = 0; i < NELEMS (gr_values); i++) | |
8500 | { | |
8501 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8502 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8503 | { |
8504 | specs[count] = tmpl; | |
8505 | specs[count++].index = i; | |
8506 | } | |
8507 | } | |
8508 | } | |
8509 | else | |
8510 | { | |
8511 | specs[count] = tmpl; | |
8512 | specs[count++].specific = 0; | |
8513 | } | |
8514 | } | |
8515 | } | |
8516 | else if (note == 0) | |
8517 | { | |
8518 | /* probe et al. */ | |
8519 | specs[count] = tmpl; | |
8520 | specs[count++].specific = 0; | |
8521 | } | |
8522 | break; | |
8523 | ||
8524 | case IA64_RS_PMC: /* four or more registers */ | |
8525 | if (note == 3) | |
8526 | { | |
8527 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8528 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8529 | ||
8530 | { | |
91d6fa6a NC |
8531 | int reg_index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) |
8532 | ? 1 : !rsrc_write); | |
8533 | int regno = CURR_SLOT.opnd[reg_index].X_add_number - REG_GR; | |
542d6675 KH |
8534 | if (regno >= 0 && regno < NELEMS (gr_values) |
8535 | && KNOWN (regno)) | |
8536 | { | |
8537 | specs[count] = tmpl; | |
8538 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8539 | } | |
8540 | else | |
8541 | { | |
8542 | specs[count] = tmpl; | |
8543 | specs[count++].specific = 0; | |
8544 | } | |
8545 | } | |
8546 | } | |
8547 | else | |
8548 | { | |
8549 | UNHANDLED; | |
8550 | } | |
800eeca4 JW |
8551 | break; |
8552 | ||
8553 | case IA64_RS_PMD: /* four or more registers */ | |
8554 | if (note == 3) | |
542d6675 KH |
8555 | { |
8556 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8557 | { | |
8558 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8559 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8560 | && KNOWN (regno)) | |
8561 | { | |
8562 | specs[count] = tmpl; | |
8563 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8564 | } | |
8565 | else | |
8566 | { | |
8567 | specs[count] = tmpl; | |
8568 | specs[count++].specific = 0; | |
8569 | } | |
8570 | } | |
8571 | } | |
800eeca4 | 8572 | else |
542d6675 KH |
8573 | { |
8574 | UNHANDLED; | |
8575 | } | |
800eeca4 JW |
8576 | break; |
8577 | ||
8578 | case IA64_RS_RR: /* eight registers */ | |
8579 | if (note == 6) | |
542d6675 KH |
8580 | { |
8581 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8582 | { | |
8583 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8584 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8585 | && KNOWN (regno)) | |
8586 | { | |
8587 | specs[count] = tmpl; | |
8588 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8589 | } | |
8590 | else | |
8591 | { | |
8592 | specs[count] = tmpl; | |
8593 | specs[count++].specific = 0; | |
8594 | } | |
8595 | } | |
8596 | } | |
800eeca4 | 8597 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8598 | { |
8599 | specs[count] = tmpl; | |
8600 | specs[count++].specific = 0; | |
8601 | } | |
197865e8 | 8602 | else |
542d6675 KH |
8603 | { |
8604 | UNHANDLED; | |
8605 | } | |
800eeca4 JW |
8606 | break; |
8607 | ||
8608 | case IA64_RS_CR_IRR: | |
197865e8 | 8609 | if (note == 0) |
542d6675 KH |
8610 | { |
8611 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8612 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8613 | if (rsrc_write | |
8614 | && idesc->operands[1] == IA64_OPND_CR3 | |
8615 | && regno == CR_IVR) | |
8616 | { | |
8617 | for (i = 0; i < 4; i++) | |
8618 | { | |
8619 | specs[count] = tmpl; | |
8620 | specs[count++].index = CR_IRR0 + i; | |
8621 | } | |
8622 | } | |
8623 | } | |
800eeca4 | 8624 | else if (note == 1) |
542d6675 KH |
8625 | { |
8626 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8627 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8628 | && regno >= CR_IRR0 | |
8629 | && regno <= CR_IRR3) | |
8630 | { | |
8631 | specs[count] = tmpl; | |
8632 | specs[count++].index = regno; | |
8633 | } | |
8634 | } | |
800eeca4 | 8635 | else |
542d6675 KH |
8636 | { |
8637 | UNHANDLED; | |
8638 | } | |
800eeca4 JW |
8639 | break; |
8640 | ||
1ca35711 L |
8641 | case IA64_RS_CR_IIB: |
8642 | if (note != 0) | |
8643 | { | |
8644 | UNHANDLED; | |
8645 | } | |
8646 | else | |
8647 | { | |
8648 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8649 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8650 | && (regno == CR_IIB0 || regno == CR_IIB1)) | |
8651 | { | |
8652 | specs[count] = tmpl; | |
8653 | specs[count++].index = regno; | |
8654 | } | |
8655 | } | |
8656 | break; | |
8657 | ||
800eeca4 JW |
8658 | case IA64_RS_CR_LRR: |
8659 | if (note != 1) | |
542d6675 KH |
8660 | { |
8661 | UNHANDLED; | |
8662 | } | |
197865e8 | 8663 | else |
542d6675 KH |
8664 | { |
8665 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8666 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8667 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8668 | { | |
8669 | specs[count] = tmpl; | |
8670 | specs[count++].index = regno; | |
8671 | } | |
8672 | } | |
800eeca4 JW |
8673 | break; |
8674 | ||
8675 | case IA64_RS_CR: | |
8676 | if (note == 1) | |
542d6675 KH |
8677 | { |
8678 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8679 | { | |
8680 | specs[count] = tmpl; | |
8681 | specs[count++].index = | |
8682 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8683 | } | |
8684 | } | |
800eeca4 | 8685 | else |
542d6675 KH |
8686 | { |
8687 | UNHANDLED; | |
8688 | } | |
800eeca4 JW |
8689 | break; |
8690 | ||
8691 | case IA64_RS_FR: | |
8692 | case IA64_RS_FRb: | |
8693 | if (note != 1) | |
542d6675 KH |
8694 | { |
8695 | UNHANDLED; | |
8696 | } | |
800eeca4 | 8697 | else if (rsrc_write) |
542d6675 KH |
8698 | { |
8699 | if (dep->specifier == IA64_RS_FRb | |
8700 | && idesc->operands[0] == IA64_OPND_F1) | |
8701 | { | |
8702 | specs[count] = tmpl; | |
8703 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8704 | } | |
8705 | } | |
800eeca4 | 8706 | else |
542d6675 KH |
8707 | { |
8708 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8709 | { | |
8710 | if (idesc->operands[i] == IA64_OPND_F2 | |
8711 | || idesc->operands[i] == IA64_OPND_F3 | |
8712 | || idesc->operands[i] == IA64_OPND_F4) | |
8713 | { | |
8714 | specs[count] = tmpl; | |
8715 | specs[count++].index = | |
8716 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8717 | } | |
8718 | } | |
8719 | } | |
800eeca4 JW |
8720 | break; |
8721 | ||
8722 | case IA64_RS_GR: | |
8723 | if (note == 13) | |
542d6675 KH |
8724 | { |
8725 | /* This reference applies only to the GR whose value is loaded with | |
8726 | data returned from memory. */ | |
8727 | specs[count] = tmpl; | |
8728 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8729 | } | |
800eeca4 | 8730 | else if (note == 1) |
542d6675 KH |
8731 | { |
8732 | if (rsrc_write) | |
8733 | { | |
8734 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8735 | if (idesc->operands[i] == IA64_OPND_R1 |
8736 | || idesc->operands[i] == IA64_OPND_R2 | |
8737 | || idesc->operands[i] == IA64_OPND_R3) | |
8738 | { | |
8739 | specs[count] = tmpl; | |
197865e8 | 8740 | specs[count++].index = |
50b81f19 JW |
8741 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8742 | } | |
8743 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8744 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8745 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8746 | { | |
8747 | specs[count] = tmpl; | |
8748 | specs[count++].index = | |
8749 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8750 | } | |
542d6675 KH |
8751 | } |
8752 | else | |
8753 | { | |
8754 | /* Look for anything that reads a GR. */ | |
8755 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8756 | { | |
8757 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8758 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8759 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8760 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8761 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8762 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8763 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8764 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8765 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8766 | || ((i >= idesc->num_outputs) | |
8767 | && (idesc->operands[i] == IA64_OPND_R1 | |
8768 | || idesc->operands[i] == IA64_OPND_R2 | |
8769 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8770 | /* addl source register. */ |
8771 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8772 | { |
8773 | specs[count] = tmpl; | |
8774 | specs[count++].index = | |
8775 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8776 | } | |
8777 | } | |
8778 | } | |
8779 | } | |
197865e8 | 8780 | else |
542d6675 KH |
8781 | { |
8782 | UNHANDLED; | |
8783 | } | |
800eeca4 JW |
8784 | break; |
8785 | ||
139368c9 JW |
8786 | /* This is the same as IA64_RS_PRr, except that the register range is |
8787 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8788 | case IA64_RS_PR: |
8789 | if (note == 0) | |
542d6675 | 8790 | { |
139368c9 | 8791 | for (i = 1; i < 16; i++) |
542d6675 | 8792 | { |
139368c9 JW |
8793 | specs[count] = tmpl; |
8794 | specs[count++].index = i; | |
8795 | } | |
8796 | } | |
8797 | else if (note == 7) | |
8798 | { | |
8799 | valueT mask = 0; | |
8800 | /* Mark only those registers indicated by the mask. */ | |
8801 | if (rsrc_write) | |
8802 | { | |
8803 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8804 | for (i = 1; i < 16; i++) | |
8805 | if (mask & ((valueT) 1 << i)) | |
8806 | { | |
8807 | specs[count] = tmpl; | |
8808 | specs[count++].index = i; | |
8809 | } | |
8810 | } | |
8811 | else | |
8812 | { | |
8813 | UNHANDLED; | |
8814 | } | |
8815 | } | |
8816 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8817 | { | |
8818 | if (rsrc_write) | |
8819 | { | |
8820 | for (i = 0; i < idesc->num_outputs; i++) | |
8821 | { | |
8822 | if (idesc->operands[i] == IA64_OPND_P1 | |
8823 | || idesc->operands[i] == IA64_OPND_P2) | |
8824 | { | |
8825 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8826 | if (regno >= 1 && regno < 16) | |
8827 | { | |
8828 | specs[count] = tmpl; | |
8829 | specs[count++].index = regno; | |
8830 | } | |
8831 | } | |
8832 | } | |
8833 | } | |
8834 | else | |
8835 | { | |
8836 | UNHANDLED; | |
8837 | } | |
8838 | } | |
8839 | else if (note == 12) | |
8840 | { | |
8841 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8842 | { | |
8843 | specs[count] = tmpl; | |
8844 | specs[count++].index = CURR_SLOT.qp_regno; | |
8845 | } | |
8846 | } | |
8847 | else if (note == 1) | |
8848 | { | |
8849 | if (rsrc_write) | |
8850 | { | |
8851 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8852 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8853 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8854 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8855 | |
8856 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8857 | || idesc->operands[0] == IA64_OPND_P2) | |
8858 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8859 | { |
8860 | specs[count] = tmpl; | |
139368c9 JW |
8861 | specs[count].cmp_type = |
8862 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8863 | specs[count++].index = p1; | |
8864 | } | |
8865 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8866 | || idesc->operands[1] == IA64_OPND_P2) | |
8867 | && p2 >= 1 && p2 < 16) | |
8868 | { | |
8869 | specs[count] = tmpl; | |
8870 | specs[count].cmp_type = | |
8871 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8872 | specs[count++].index = p2; | |
542d6675 KH |
8873 | } |
8874 | } | |
8875 | else | |
8876 | { | |
139368c9 | 8877 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8878 | { |
8879 | specs[count] = tmpl; | |
139368c9 JW |
8880 | specs[count++].index = CURR_SLOT.qp_regno; |
8881 | } | |
8882 | if (idesc->operands[1] == IA64_OPND_PR) | |
8883 | { | |
8884 | for (i = 1; i < 16; i++) | |
8885 | { | |
8886 | specs[count] = tmpl; | |
8887 | specs[count++].index = i; | |
8888 | } | |
542d6675 KH |
8889 | } |
8890 | } | |
8891 | } | |
139368c9 JW |
8892 | else |
8893 | { | |
8894 | UNHANDLED; | |
8895 | } | |
8896 | break; | |
8897 | ||
8898 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8899 | simplified cases of this. */ | |
8900 | case IA64_RS_PRr: | |
8901 | if (note == 0) | |
8902 | { | |
8903 | for (i = 16; i < 63; i++) | |
8904 | { | |
8905 | specs[count] = tmpl; | |
8906 | specs[count++].index = i; | |
8907 | } | |
8908 | } | |
800eeca4 | 8909 | else if (note == 7) |
542d6675 KH |
8910 | { |
8911 | valueT mask = 0; | |
8912 | /* Mark only those registers indicated by the mask. */ | |
8913 | if (rsrc_write | |
8914 | && idesc->operands[0] == IA64_OPND_PR) | |
8915 | { | |
8916 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8917 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8918 | for (i = 16; i < 63; i++) |
8919 | { | |
8920 | specs[count] = tmpl; | |
8921 | specs[count++].index = i; | |
8922 | } | |
542d6675 KH |
8923 | } |
8924 | else if (rsrc_write | |
8925 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8926 | { | |
8927 | for (i = 16; i < 63; i++) | |
8928 | { | |
8929 | specs[count] = tmpl; | |
8930 | specs[count++].index = i; | |
8931 | } | |
8932 | } | |
8933 | else | |
8934 | { | |
8935 | UNHANDLED; | |
8936 | } | |
8937 | } | |
800eeca4 | 8938 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8939 | { |
8940 | if (rsrc_write) | |
8941 | { | |
8942 | for (i = 0; i < idesc->num_outputs; i++) | |
8943 | { | |
8944 | if (idesc->operands[i] == IA64_OPND_P1 | |
8945 | || idesc->operands[i] == IA64_OPND_P2) | |
8946 | { | |
8947 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8948 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8949 | { |
8950 | specs[count] = tmpl; | |
8951 | specs[count++].index = regno; | |
8952 | } | |
8953 | } | |
8954 | } | |
8955 | } | |
8956 | else | |
8957 | { | |
8958 | UNHANDLED; | |
8959 | } | |
8960 | } | |
800eeca4 | 8961 | else if (note == 12) |
542d6675 | 8962 | { |
139368c9 | 8963 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8964 | { |
8965 | specs[count] = tmpl; | |
8966 | specs[count++].index = CURR_SLOT.qp_regno; | |
8967 | } | |
8968 | } | |
800eeca4 | 8969 | else if (note == 1) |
542d6675 KH |
8970 | { |
8971 | if (rsrc_write) | |
8972 | { | |
8973 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8974 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8975 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8976 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8977 | |
542d6675 KH |
8978 | if ((idesc->operands[0] == IA64_OPND_P1 |
8979 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8980 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8981 | { |
8982 | specs[count] = tmpl; | |
4a4f25cf | 8983 | specs[count].cmp_type = |
7484b8e6 | 8984 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8985 | specs[count++].index = p1; |
8986 | } | |
8987 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8988 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8989 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8990 | { |
8991 | specs[count] = tmpl; | |
4a4f25cf | 8992 | specs[count].cmp_type = |
7484b8e6 | 8993 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8994 | specs[count++].index = p2; |
8995 | } | |
8996 | } | |
8997 | else | |
8998 | { | |
139368c9 | 8999 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9000 | { |
9001 | specs[count] = tmpl; | |
9002 | specs[count++].index = CURR_SLOT.qp_regno; | |
9003 | } | |
9004 | if (idesc->operands[1] == IA64_OPND_PR) | |
9005 | { | |
139368c9 | 9006 | for (i = 16; i < 63; i++) |
542d6675 KH |
9007 | { |
9008 | specs[count] = tmpl; | |
9009 | specs[count++].index = i; | |
9010 | } | |
9011 | } | |
9012 | } | |
9013 | } | |
197865e8 | 9014 | else |
542d6675 KH |
9015 | { |
9016 | UNHANDLED; | |
9017 | } | |
800eeca4 JW |
9018 | break; |
9019 | ||
9020 | case IA64_RS_PSR: | |
197865e8 | 9021 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 9022 | dep->regindex. */ |
800eeca4 | 9023 | if (note == 0) |
542d6675 KH |
9024 | { |
9025 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
9026 | { | |
9027 | if (dep->regindex < 6) | |
9028 | { | |
9029 | specs[count++] = tmpl; | |
9030 | } | |
9031 | } | |
9032 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
9033 | { | |
9034 | if (dep->regindex < 32 | |
9035 | || dep->regindex == 35 | |
9036 | || dep->regindex == 36 | |
9037 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
9038 | { | |
9039 | specs[count++] = tmpl; | |
9040 | } | |
9041 | } | |
9042 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
9043 | { | |
9044 | if (dep->regindex < 32 | |
9045 | || dep->regindex == 35 | |
9046 | || dep->regindex == 36 | |
9047 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
9048 | { | |
9049 | specs[count++] = tmpl; | |
9050 | } | |
9051 | } | |
9052 | else | |
9053 | { | |
9054 | /* Several PSR bits have very specific dependencies. */ | |
9055 | switch (dep->regindex) | |
9056 | { | |
9057 | default: | |
9058 | specs[count++] = tmpl; | |
9059 | break; | |
9060 | case PSR_IC: | |
9061 | if (rsrc_write) | |
9062 | { | |
9063 | specs[count++] = tmpl; | |
9064 | } | |
9065 | else | |
9066 | { | |
9067 | /* Only certain CR accesses use PSR.ic */ | |
9068 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9069 | || idesc->operands[1] == IA64_OPND_CR3) | |
9070 | { | |
91d6fa6a | 9071 | int reg_index = |
542d6675 KH |
9072 | ((idesc->operands[0] == IA64_OPND_CR3) |
9073 | ? 0 : 1); | |
9074 | int regno = | |
91d6fa6a | 9075 | CURR_SLOT.opnd[reg_index].X_add_number - REG_CR; |
542d6675 KH |
9076 | |
9077 | switch (regno) | |
9078 | { | |
9079 | default: | |
9080 | break; | |
9081 | case CR_ITIR: | |
9082 | case CR_IFS: | |
9083 | case CR_IIM: | |
9084 | case CR_IIP: | |
9085 | case CR_IPSR: | |
9086 | case CR_ISR: | |
9087 | case CR_IFA: | |
9088 | case CR_IHA: | |
1ca35711 L |
9089 | case CR_IIB0: |
9090 | case CR_IIB1: | |
542d6675 KH |
9091 | case CR_IIPA: |
9092 | specs[count++] = tmpl; | |
9093 | break; | |
9094 | } | |
9095 | } | |
9096 | } | |
9097 | break; | |
9098 | case PSR_CPL: | |
9099 | if (rsrc_write) | |
9100 | { | |
9101 | specs[count++] = tmpl; | |
9102 | } | |
9103 | else | |
9104 | { | |
9105 | /* Only some AR accesses use cpl */ | |
9106 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9107 | || idesc->operands[1] == IA64_OPND_AR3) | |
9108 | { | |
91d6fa6a | 9109 | int reg_index = |
542d6675 KH |
9110 | ((idesc->operands[0] == IA64_OPND_AR3) |
9111 | ? 0 : 1); | |
9112 | int regno = | |
91d6fa6a | 9113 | CURR_SLOT.opnd[reg_index].X_add_number - REG_AR; |
542d6675 KH |
9114 | |
9115 | if (regno == AR_ITC | |
4f8631b1 | 9116 | || regno == AR_RUC |
91d6fa6a | 9117 | || (reg_index == 0 |
4f8631b1 | 9118 | && (regno == AR_RSC |
542d6675 KH |
9119 | || (regno >= AR_K0 |
9120 | && regno <= AR_K7)))) | |
9121 | { | |
9122 | specs[count++] = tmpl; | |
9123 | } | |
9124 | } | |
9125 | else | |
9126 | { | |
9127 | specs[count++] = tmpl; | |
9128 | } | |
9129 | break; | |
9130 | } | |
9131 | } | |
9132 | } | |
9133 | } | |
800eeca4 | 9134 | else if (note == 7) |
542d6675 KH |
9135 | { |
9136 | valueT mask = 0; | |
9137 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9138 | { | |
9139 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9140 | } | |
9141 | else | |
9142 | { | |
9143 | UNHANDLED; | |
9144 | } | |
9145 | if (mask & ((valueT) 1 << dep->regindex)) | |
9146 | { | |
9147 | specs[count++] = tmpl; | |
9148 | } | |
9149 | } | |
800eeca4 | 9150 | else if (note == 8) |
542d6675 KH |
9151 | { |
9152 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9153 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9154 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9155 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9156 | { | |
9157 | if (idesc->operands[i] == IA64_OPND_F1 | |
9158 | || idesc->operands[i] == IA64_OPND_F2 | |
9159 | || idesc->operands[i] == IA64_OPND_F3 | |
9160 | || idesc->operands[i] == IA64_OPND_F4) | |
9161 | { | |
9162 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9163 | if (reg >= min && reg <= max) | |
9164 | { | |
9165 | specs[count++] = tmpl; | |
9166 | } | |
9167 | } | |
9168 | } | |
9169 | } | |
800eeca4 | 9170 | else if (note == 9) |
542d6675 KH |
9171 | { |
9172 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9173 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9174 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9175 | FR2-31 */ | |
9176 | for (i = 0; i < idesc->num_outputs; i++) | |
9177 | { | |
9178 | if (idesc->operands[i] == IA64_OPND_F1) | |
9179 | { | |
9180 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9181 | if (reg >= min && reg <= max) | |
9182 | { | |
9183 | specs[count++] = tmpl; | |
9184 | } | |
9185 | } | |
9186 | } | |
9187 | } | |
800eeca4 | 9188 | else if (note == 10) |
542d6675 KH |
9189 | { |
9190 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9191 | { | |
9192 | if (idesc->operands[i] == IA64_OPND_R1 | |
9193 | || idesc->operands[i] == IA64_OPND_R2 | |
9194 | || idesc->operands[i] == IA64_OPND_R3) | |
9195 | { | |
9196 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9197 | if (regno >= 16 && regno <= 31) | |
9198 | { | |
9199 | specs[count++] = tmpl; | |
9200 | } | |
9201 | } | |
9202 | } | |
9203 | } | |
800eeca4 | 9204 | else |
542d6675 KH |
9205 | { |
9206 | UNHANDLED; | |
9207 | } | |
800eeca4 JW |
9208 | break; |
9209 | ||
9210 | case IA64_RS_AR_FPSR: | |
9211 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9212 | { |
9213 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9214 | if (regno == AR_FPSR) | |
9215 | { | |
9216 | specs[count++] = tmpl; | |
9217 | } | |
9218 | } | |
800eeca4 | 9219 | else |
542d6675 KH |
9220 | { |
9221 | specs[count++] = tmpl; | |
9222 | } | |
800eeca4 JW |
9223 | break; |
9224 | ||
197865e8 | 9225 | case IA64_RS_ARX: |
800eeca4 JW |
9226 | /* Handle all AR[REG] resources */ |
9227 | if (note == 0 || note == 1) | |
542d6675 KH |
9228 | { |
9229 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9230 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9231 | && regno == dep->regindex) | |
9232 | { | |
9233 | specs[count++] = tmpl; | |
9234 | } | |
9235 | /* other AR[REG] resources may be affected by AR accesses */ | |
9236 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9237 | { | |
9238 | /* AR[] writes */ | |
9239 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9240 | switch (dep->regindex) | |
9241 | { | |
9242 | default: | |
9243 | break; | |
9244 | case AR_BSP: | |
9245 | case AR_RNAT: | |
9246 | if (regno == AR_BSPSTORE) | |
9247 | { | |
9248 | specs[count++] = tmpl; | |
9249 | } | |
9250 | case AR_RSC: | |
9251 | if (!rsrc_write && | |
9252 | (regno == AR_BSPSTORE | |
9253 | || regno == AR_RNAT)) | |
9254 | { | |
9255 | specs[count++] = tmpl; | |
9256 | } | |
9257 | break; | |
9258 | } | |
9259 | } | |
9260 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9261 | { | |
9262 | /* AR[] reads */ | |
9263 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9264 | switch (dep->regindex) | |
9265 | { | |
9266 | default: | |
9267 | break; | |
9268 | case AR_RSC: | |
9269 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9270 | { | |
9271 | specs[count++] = tmpl; | |
9272 | } | |
9273 | break; | |
9274 | } | |
9275 | } | |
9276 | else | |
9277 | { | |
9278 | specs[count++] = tmpl; | |
9279 | } | |
9280 | } | |
800eeca4 | 9281 | else |
542d6675 KH |
9282 | { |
9283 | UNHANDLED; | |
9284 | } | |
800eeca4 JW |
9285 | break; |
9286 | ||
9287 | case IA64_RS_CRX: | |
7f3dfb9c L |
9288 | /* Handle all CR[REG] resources. |
9289 | ??? FIXME: The rule 17 isn't really handled correctly. */ | |
9290 | if (note == 0 || note == 1 || note == 17) | |
542d6675 KH |
9291 | { |
9292 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9293 | { | |
9294 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9295 | if (regno == dep->regindex) | |
9296 | { | |
9297 | specs[count++] = tmpl; | |
9298 | } | |
9299 | else if (!rsrc_write) | |
9300 | { | |
9301 | /* Reads from CR[IVR] affect other resources. */ | |
9302 | if (regno == CR_IVR) | |
9303 | { | |
9304 | if ((dep->regindex >= CR_IRR0 | |
9305 | && dep->regindex <= CR_IRR3) | |
9306 | || dep->regindex == CR_TPR) | |
9307 | { | |
9308 | specs[count++] = tmpl; | |
9309 | } | |
9310 | } | |
9311 | } | |
9312 | } | |
9313 | else | |
9314 | { | |
9315 | specs[count++] = tmpl; | |
9316 | } | |
9317 | } | |
800eeca4 | 9318 | else |
542d6675 KH |
9319 | { |
9320 | UNHANDLED; | |
9321 | } | |
800eeca4 JW |
9322 | break; |
9323 | ||
9324 | case IA64_RS_INSERVICE: | |
9325 | /* look for write of EOI (67) or read of IVR (65) */ | |
9326 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9327 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9328 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9329 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9330 | { | |
9331 | specs[count++] = tmpl; | |
9332 | } | |
800eeca4 JW |
9333 | break; |
9334 | ||
9335 | case IA64_RS_GR0: | |
9336 | if (note == 1) | |
542d6675 KH |
9337 | { |
9338 | specs[count++] = tmpl; | |
9339 | } | |
800eeca4 | 9340 | else |
542d6675 KH |
9341 | { |
9342 | UNHANDLED; | |
9343 | } | |
800eeca4 JW |
9344 | break; |
9345 | ||
9346 | case IA64_RS_CFM: | |
9347 | if (note != 2) | |
542d6675 KH |
9348 | { |
9349 | specs[count++] = tmpl; | |
9350 | } | |
800eeca4 | 9351 | else |
542d6675 KH |
9352 | { |
9353 | /* Check if any of the registers accessed are in the rotating region. | |
9354 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9355 | region */ | |
9356 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9357 | { | |
9358 | if (idesc->operands[i] == IA64_OPND_R1 | |
9359 | || idesc->operands[i] == IA64_OPND_R2 | |
9360 | || idesc->operands[i] == IA64_OPND_R3) | |
9361 | { | |
9362 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9363 | /* Assumes that md.rot.num_regs is always valid */ | |
9364 | if (md.rot.num_regs > 0 | |
9365 | && num > 31 | |
9366 | && num < 31 + md.rot.num_regs) | |
9367 | { | |
9368 | specs[count] = tmpl; | |
9369 | specs[count++].specific = 0; | |
9370 | } | |
9371 | } | |
9372 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9373 | || idesc->operands[i] == IA64_OPND_F2 | |
9374 | || idesc->operands[i] == IA64_OPND_F3 | |
9375 | || idesc->operands[i] == IA64_OPND_F4) | |
9376 | { | |
9377 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9378 | if (num > 31) | |
9379 | { | |
9380 | specs[count] = tmpl; | |
9381 | specs[count++].specific = 0; | |
9382 | } | |
9383 | } | |
9384 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9385 | || idesc->operands[i] == IA64_OPND_P2) | |
9386 | { | |
9387 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9388 | if (num > 15) | |
9389 | { | |
9390 | specs[count] = tmpl; | |
9391 | specs[count++].specific = 0; | |
9392 | } | |
9393 | } | |
9394 | } | |
9395 | if (CURR_SLOT.qp_regno > 15) | |
9396 | { | |
9397 | specs[count] = tmpl; | |
9398 | specs[count++].specific = 0; | |
9399 | } | |
9400 | } | |
800eeca4 JW |
9401 | break; |
9402 | ||
139368c9 JW |
9403 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9404 | the fact that there is only one register. */ | |
800eeca4 JW |
9405 | case IA64_RS_PR63: |
9406 | if (note == 0) | |
542d6675 KH |
9407 | { |
9408 | specs[count++] = tmpl; | |
9409 | } | |
139368c9 | 9410 | else if (note == 7) |
40449e9f KH |
9411 | { |
9412 | valueT mask = 0; | |
9413 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9414 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9415 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9416 | specs[count++] = tmpl; |
40449e9f | 9417 | } |
800eeca4 | 9418 | else if (note == 11) |
542d6675 KH |
9419 | { |
9420 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9421 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9422 | || (idesc->operands[1] == IA64_OPND_P2 | |
9423 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9424 | { | |
9425 | specs[count++] = tmpl; | |
9426 | } | |
9427 | } | |
800eeca4 | 9428 | else if (note == 12) |
542d6675 KH |
9429 | { |
9430 | if (CURR_SLOT.qp_regno == 63) | |
9431 | { | |
9432 | specs[count++] = tmpl; | |
9433 | } | |
9434 | } | |
800eeca4 | 9435 | else if (note == 1) |
542d6675 KH |
9436 | { |
9437 | if (rsrc_write) | |
9438 | { | |
40449e9f KH |
9439 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9440 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9441 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9442 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9443 | |
4a4f25cf | 9444 | if (p1 == 63 |
7484b8e6 TW |
9445 | && (idesc->operands[0] == IA64_OPND_P1 |
9446 | || idesc->operands[0] == IA64_OPND_P2)) | |
9447 | { | |
40449e9f | 9448 | specs[count] = tmpl; |
4a4f25cf | 9449 | specs[count++].cmp_type = |
7484b8e6 TW |
9450 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9451 | } | |
9452 | if (p2 == 63 | |
9453 | && (idesc->operands[1] == IA64_OPND_P1 | |
9454 | || idesc->operands[1] == IA64_OPND_P2)) | |
9455 | { | |
40449e9f | 9456 | specs[count] = tmpl; |
4a4f25cf | 9457 | specs[count++].cmp_type = |
7484b8e6 TW |
9458 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9459 | } | |
542d6675 KH |
9460 | } |
9461 | else | |
9462 | { | |
9463 | if (CURR_SLOT.qp_regno == 63) | |
9464 | { | |
9465 | specs[count++] = tmpl; | |
9466 | } | |
9467 | } | |
9468 | } | |
800eeca4 | 9469 | else |
542d6675 KH |
9470 | { |
9471 | UNHANDLED; | |
9472 | } | |
800eeca4 JW |
9473 | break; |
9474 | ||
9475 | case IA64_RS_RSE: | |
9476 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9477 | read resources have not yet been completely identified, so for now |
9478 | treat RSE as a single resource */ | |
800eeca4 | 9479 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9480 | { |
9481 | if (rsrc_write) | |
9482 | { | |
9483 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9484 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9485 | { | |
a66d2bb7 | 9486 | specs[count++] = tmpl; |
542d6675 KH |
9487 | } |
9488 | } | |
9489 | else | |
9490 | { | |
9491 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9492 | { | |
9493 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9494 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9495 | { | |
9496 | specs[count++] = tmpl; | |
9497 | } | |
9498 | } | |
9499 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9500 | { | |
9501 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9502 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9503 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9504 | { | |
9505 | specs[count++] = tmpl; | |
9506 | } | |
9507 | } | |
9508 | } | |
9509 | } | |
197865e8 | 9510 | else |
542d6675 KH |
9511 | { |
9512 | specs[count++] = tmpl; | |
9513 | } | |
800eeca4 JW |
9514 | break; |
9515 | ||
9516 | case IA64_RS_ANY: | |
9517 | /* FIXME -- do any of these need to be non-specific? */ | |
9518 | specs[count++] = tmpl; | |
9519 | break; | |
9520 | ||
9521 | default: | |
9522 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9523 | break; | |
9524 | } | |
9525 | ||
9526 | return count; | |
9527 | } | |
9528 | ||
9529 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9530 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9531 | ||
800eeca4 | 9532 | static void |
5a49b8ac | 9533 | clear_qp_branch_flag (valueT mask) |
800eeca4 JW |
9534 | { |
9535 | int i; | |
542d6675 | 9536 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9537 | { |
197865e8 | 9538 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9539 | if ((bit & mask) != 0) |
542d6675 KH |
9540 | { |
9541 | regdeps[i].link_to_qp_branch = 0; | |
9542 | } | |
800eeca4 JW |
9543 | } |
9544 | } | |
9545 | ||
5e2f6673 L |
9546 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9547 | any mutexes which contain one of the PRs and create new ones when | |
9548 | needed. */ | |
9549 | ||
9550 | static int | |
9551 | update_qp_mutex (valueT mask) | |
9552 | { | |
9553 | int i; | |
9554 | int add = 0; | |
9555 | ||
9556 | i = 0; | |
9557 | while (i < qp_mutexeslen) | |
9558 | { | |
9559 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9560 | { | |
9561 | /* If it destroys and creates the same mutex, do nothing. */ | |
9562 | if (qp_mutexes[i].prmask == mask | |
9563 | && qp_mutexes[i].path == md.path) | |
9564 | { | |
9565 | i++; | |
9566 | add = -1; | |
9567 | } | |
9568 | else | |
9569 | { | |
9570 | int keep = 0; | |
9571 | ||
9572 | if (md.debug_dv) | |
9573 | { | |
9574 | fprintf (stderr, " Clearing mutex relation"); | |
9575 | print_prmask (qp_mutexes[i].prmask); | |
9576 | fprintf (stderr, "\n"); | |
9577 | } | |
9578 | ||
9579 | /* Deal with the old mutex with more than 3+ PRs only if | |
9580 | the new mutex on the same execution path with it. | |
9581 | ||
9582 | FIXME: The 3+ mutex support is incomplete. | |
9583 | dot_pred_rel () may be a better place to fix it. */ | |
9584 | if (qp_mutexes[i].path == md.path) | |
9585 | { | |
9586 | /* If it is a proper subset of the mutex, create a | |
9587 | new mutex. */ | |
9588 | if (add == 0 | |
9589 | && (qp_mutexes[i].prmask & mask) == mask) | |
9590 | add = 1; | |
9591 | ||
9592 | qp_mutexes[i].prmask &= ~mask; | |
9593 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9594 | { | |
9595 | /* Modify the mutex if there are more than one | |
9596 | PR left. */ | |
9597 | keep = 1; | |
9598 | i++; | |
9599 | } | |
9600 | } | |
9601 | ||
9602 | if (keep == 0) | |
9603 | /* Remove the mutex. */ | |
9604 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9605 | } | |
9606 | } | |
9607 | else | |
9608 | ++i; | |
9609 | } | |
9610 | ||
9611 | if (add == 1) | |
9612 | add_qp_mutex (mask); | |
9613 | ||
9614 | return add; | |
9615 | } | |
9616 | ||
197865e8 | 9617 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9618 | |
542d6675 KH |
9619 | Any changes to a PR clears the mutex relations which include that PR. */ |
9620 | ||
800eeca4 | 9621 | static void |
5a49b8ac | 9622 | clear_qp_mutex (valueT mask) |
800eeca4 JW |
9623 | { |
9624 | int i; | |
9625 | ||
9626 | i = 0; | |
9627 | while (i < qp_mutexeslen) | |
9628 | { | |
9629 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9630 | { |
9631 | if (md.debug_dv) | |
9632 | { | |
9633 | fprintf (stderr, " Clearing mutex relation"); | |
9634 | print_prmask (qp_mutexes[i].prmask); | |
9635 | fprintf (stderr, "\n"); | |
9636 | } | |
9637 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9638 | } | |
800eeca4 | 9639 | else |
542d6675 | 9640 | ++i; |
800eeca4 JW |
9641 | } |
9642 | } | |
9643 | ||
9644 | /* Clear implies relations which contain PRs in the given masks. | |
9645 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9646 | indicates the implied PR. */ |
9647 | ||
800eeca4 | 9648 | static void |
5a49b8ac | 9649 | clear_qp_implies (valueT p1_mask, valueT p2_mask) |
800eeca4 JW |
9650 | { |
9651 | int i; | |
9652 | ||
9653 | i = 0; | |
9654 | while (i < qp_implieslen) | |
9655 | { | |
197865e8 | 9656 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9657 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9658 | { | |
9659 | if (md.debug_dv) | |
9660 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9661 | qp_implies[i].p1, qp_implies[i].p2); | |
9662 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9663 | } | |
197865e8 | 9664 | else |
542d6675 | 9665 | ++i; |
800eeca4 JW |
9666 | } |
9667 | } | |
9668 | ||
542d6675 KH |
9669 | /* Add the PRs specified to the list of implied relations. */ |
9670 | ||
800eeca4 | 9671 | static void |
5a49b8ac | 9672 | add_qp_imply (int p1, int p2) |
800eeca4 JW |
9673 | { |
9674 | valueT mask; | |
9675 | valueT bit; | |
9676 | int i; | |
9677 | ||
542d6675 | 9678 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9679 | if (p1 == 0 || p2 == 0) |
9680 | abort (); | |
9681 | ||
9682 | if (p1 == p2) | |
9683 | return; | |
9684 | ||
542d6675 KH |
9685 | /* If it exists already, ignore it. */ |
9686 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9687 | { |
197865e8 | 9688 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9689 | && qp_implies[i].p2 == p2 |
9690 | && qp_implies[i].path == md.path | |
9691 | && !qp_implies[i].p2_branched) | |
9692 | return; | |
800eeca4 JW |
9693 | } |
9694 | ||
9695 | if (qp_implieslen == qp_impliestotlen) | |
9696 | { | |
9697 | qp_impliestotlen += 20; | |
9698 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9699 | xrealloc ((void *) qp_implies, |
9700 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9701 | } |
9702 | if (md.debug_dv) | |
9703 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9704 | qp_implies[qp_implieslen].p1 = p1; | |
9705 | qp_implies[qp_implieslen].p2 = p2; | |
9706 | qp_implies[qp_implieslen].path = md.path; | |
9707 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9708 | ||
9709 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9710 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9711 | as well. */ |
542d6675 | 9712 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9713 | { |
9714 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9715 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9716 | if (qp_implies[i].p2 == p1) |
542d6675 | 9717 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9718 | } |
9719 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9720 | relation containing p2, duplicate it and replace p2 with p1. */ |
9721 | bit = (valueT) 1 << p1; | |
9722 | mask = (valueT) 1 << p2; | |
542d6675 | 9723 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9724 | { |
9725 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9726 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9727 | } |
9728 | } | |
9729 | ||
800eeca4 JW |
9730 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9731 | one of the PRs can be true at any time. PR0 should never be included in | |
9732 | the mask. */ | |
542d6675 | 9733 | |
800eeca4 | 9734 | static void |
5a49b8ac | 9735 | add_qp_mutex (valueT mask) |
800eeca4 JW |
9736 | { |
9737 | if (mask & 0x1) | |
9738 | abort (); | |
9739 | ||
9740 | if (qp_mutexeslen == qp_mutexestotlen) | |
9741 | { | |
9742 | qp_mutexestotlen += 20; | |
9743 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9744 | xrealloc ((void *) qp_mutexes, |
9745 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9746 | } |
9747 | if (md.debug_dv) | |
9748 | { | |
9749 | fprintf (stderr, " Registering mutex on"); | |
9750 | print_prmask (mask); | |
9751 | fprintf (stderr, "\n"); | |
9752 | } | |
9753 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9754 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9755 | } | |
9756 | ||
cb5301b6 | 9757 | static int |
5a49b8ac | 9758 | has_suffix_p (const char *name, const char *suffix) |
cb5301b6 RH |
9759 | { |
9760 | size_t namelen = strlen (name); | |
9761 | size_t sufflen = strlen (suffix); | |
9762 | ||
9763 | if (namelen <= sufflen) | |
9764 | return 0; | |
9765 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9766 | } | |
9767 | ||
800eeca4 | 9768 | static void |
5a49b8ac | 9769 | clear_register_values (void) |
800eeca4 JW |
9770 | { |
9771 | int i; | |
9772 | if (md.debug_dv) | |
9773 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9774 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9775 | gr_values[i].known = 0; |
9776 | } | |
9777 | ||
9778 | /* Keep track of register values/changes which affect DV tracking. | |
9779 | ||
9780 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9781 | have to examine a group of strings to identify them. */ |
800eeca4 | 9782 | |
800eeca4 | 9783 | static void |
5a49b8ac | 9784 | note_register_values (struct ia64_opcode *idesc) |
800eeca4 JW |
9785 | { |
9786 | valueT qp_changemask = 0; | |
9787 | int i; | |
9788 | ||
542d6675 KH |
9789 | /* Invalidate values for registers being written to. */ |
9790 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9791 | { |
197865e8 | 9792 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9793 | || idesc->operands[i] == IA64_OPND_R2 |
9794 | || idesc->operands[i] == IA64_OPND_R3) | |
9795 | { | |
9796 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9797 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9798 | gr_values[regno].known = 0; | |
9799 | } | |
50b81f19 JW |
9800 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9801 | { | |
9802 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9803 | if (regno > 0 && regno < 4) | |
9804 | gr_values[regno].known = 0; | |
9805 | } | |
197865e8 | 9806 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9807 | || idesc->operands[i] == IA64_OPND_P2) |
9808 | { | |
9809 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9810 | qp_changemask |= (valueT) 1 << regno; | |
9811 | } | |
800eeca4 | 9812 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9813 | { |
9814 | if (idesc->operands[2] & (valueT) 0x10000) | |
9815 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9816 | else | |
9817 | qp_changemask = idesc->operands[2]; | |
9818 | break; | |
9819 | } | |
800eeca4 | 9820 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9821 | { |
9822 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9823 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9824 | else |
9825 | qp_changemask = idesc->operands[1]; | |
9826 | qp_changemask &= ~(valueT) 0xFFFF; | |
9827 | break; | |
9828 | } | |
9829 | } | |
9830 | ||
9831 | /* Always clear qp branch flags on any PR change. */ | |
9832 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9833 | clear_qp_branch_flag (qp_changemask); |
9834 | ||
542d6675 | 9835 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9836 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9837 | { | |
197865e8 | 9838 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9839 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9840 | { |
9841 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9842 | gr_values[i].known = 0; | |
9843 | } | |
800eeca4 JW |
9844 | clear_qp_mutex (qp_changemask); |
9845 | clear_qp_implies (qp_changemask, qp_changemask); | |
9846 | } | |
542d6675 KH |
9847 | /* After a call, all register values are undefined, except those marked |
9848 | as "safe". */ | |
800eeca4 | 9849 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9850 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9851 | { |
56d27c17 | 9852 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9853 | clear_register_values (); |
9854 | clear_qp_mutex (~qp_safe_across_calls); | |
9855 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9856 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9857 | } | |
e9718fe1 | 9858 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9859 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9860 | { |
9861 | clear_register_values (); | |
197865e8 KH |
9862 | clear_qp_mutex (~(valueT) 0); |
9863 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9864 | } |
542d6675 | 9865 | /* Look for mutex and implies relations. */ |
197865e8 | 9866 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9867 | || idesc->operands[0] == IA64_OPND_P2) |
9868 | && (idesc->operands[1] == IA64_OPND_P1 | |
9869 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9870 | { |
9871 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9872 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9873 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9874 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9875 | |
5e2f6673 L |
9876 | /* If both PRs are PR0, we can't really do anything. */ |
9877 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9878 | { |
9879 | if (md.debug_dv) | |
9880 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9881 | } | |
800eeca4 | 9882 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9883 | with the following exceptions. */ |
cb5301b6 RH |
9884 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9885 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9886 | { |
542d6675 KH |
9887 | clear_qp_implies (p2mask, p1mask); |
9888 | } | |
cb5301b6 RH |
9889 | else if (has_suffix_p (idesc->name, ".andcm") |
9890 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9891 | { |
9892 | clear_qp_implies (0, p1mask | p2mask); | |
9893 | } | |
cb5301b6 RH |
9894 | else if (has_suffix_p (idesc->name, ".orcm") |
9895 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9896 | { |
9897 | clear_qp_mutex (p1mask | p2mask); | |
9898 | clear_qp_implies (p1mask | p2mask, 0); | |
9899 | } | |
800eeca4 | 9900 | else |
542d6675 | 9901 | { |
5e2f6673 L |
9902 | int added = 0; |
9903 | ||
542d6675 | 9904 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9905 | |
9906 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9907 | if (p1 == 0 || p2 == 0) | |
9908 | clear_qp_mutex (p1mask | p2mask); | |
9909 | else | |
9910 | added = update_qp_mutex (p1mask | p2mask); | |
9911 | ||
9912 | if (CURR_SLOT.qp_regno == 0 | |
9913 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9914 | { |
5e2f6673 L |
9915 | if (added == 0 && p1 && p2) |
9916 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9917 | if (CURR_SLOT.qp_regno != 0) |
9918 | { | |
5e2f6673 L |
9919 | if (p1) |
9920 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9921 | if (p2) | |
9922 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9923 | } |
9924 | } | |
542d6675 KH |
9925 | } |
9926 | } | |
9927 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9928 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9929 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9930 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 9931 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
9932 | && (strcmp (idesc->name, "mov") == 0 |
9933 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9934 | { |
9935 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9936 | if (regno > 0 && regno < NELEMS (gr_values)) |
9937 | { | |
9938 | gr_values[regno].known = 1; | |
9939 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9940 | gr_values[regno].path = md.path; | |
9941 | if (md.debug_dv) | |
2434f565 JW |
9942 | { |
9943 | fprintf (stderr, " Know gr%d = ", regno); | |
9944 | fprintf_vma (stderr, gr_values[regno].value); | |
9945 | fputs ("\n", stderr); | |
9946 | } | |
542d6675 | 9947 | } |
800eeca4 | 9948 | } |
a66d2bb7 JB |
9949 | /* Look for dep.z imm insns. */ |
9950 | else if (idesc->operands[0] == IA64_OPND_R1 | |
9951 | && idesc->operands[1] == IA64_OPND_IMM8 | |
9952 | && strcmp (idesc->name, "dep.z") == 0) | |
9953 | { | |
9954 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
9955 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9956 | { | |
9957 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
9958 | ||
9959 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
9960 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
9961 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
9962 | gr_values[regno].known = 1; | |
9963 | gr_values[regno].value = value; | |
9964 | gr_values[regno].path = md.path; | |
9965 | if (md.debug_dv) | |
9966 | { | |
9967 | fprintf (stderr, " Know gr%d = ", regno); | |
9968 | fprintf_vma (stderr, gr_values[regno].value); | |
9969 | fputs ("\n", stderr); | |
9970 | } | |
9971 | } | |
9972 | } | |
197865e8 | 9973 | else |
800eeca4 JW |
9974 | { |
9975 | clear_qp_mutex (qp_changemask); | |
9976 | clear_qp_implies (qp_changemask, qp_changemask); | |
9977 | } | |
9978 | } | |
9979 | ||
542d6675 KH |
9980 | /* Return whether the given predicate registers are currently mutex. */ |
9981 | ||
800eeca4 | 9982 | static int |
5a49b8ac | 9983 | qp_mutex (int p1, int p2, int path) |
800eeca4 JW |
9984 | { |
9985 | int i; | |
9986 | valueT mask; | |
9987 | ||
9988 | if (p1 != p2) | |
9989 | { | |
542d6675 KH |
9990 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9991 | for (i = 0; i < qp_mutexeslen; i++) | |
9992 | { | |
9993 | if (qp_mutexes[i].path >= path | |
9994 | && (qp_mutexes[i].prmask & mask) == mask) | |
9995 | return 1; | |
9996 | } | |
800eeca4 JW |
9997 | } |
9998 | return 0; | |
9999 | } | |
10000 | ||
10001 | /* Return whether the given resource is in the given insn's list of chks | |
10002 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
10003 | conflict. */ |
10004 | ||
800eeca4 | 10005 | static int |
5a49b8ac AM |
10006 | resources_match (struct rsrc *rs, |
10007 | struct ia64_opcode *idesc, | |
10008 | int note, | |
10009 | int qp_regno, | |
10010 | int path) | |
800eeca4 JW |
10011 | { |
10012 | struct rsrc specs[MAX_SPECS]; | |
10013 | int count; | |
10014 | ||
10015 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
10016 | we don't need to check. One exception is note 11, which indicates that | |
10017 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 10018 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
10019 | && note != 11) |
10020 | return 0; | |
10021 | ||
10022 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
10023 | while (count-- > 0) | |
10024 | { | |
10025 | /* UNAT checking is a bit more specific than other resources */ | |
10026 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
10027 | && specs[count].mem_offset.hint |
10028 | && rs->mem_offset.hint) | |
10029 | { | |
10030 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
10031 | { | |
10032 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
10033 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
10034 | return 1; | |
10035 | else | |
10036 | continue; | |
10037 | } | |
10038 | } | |
800eeca4 | 10039 | |
7484b8e6 | 10040 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 10041 | writes are an OR. */ |
7484b8e6 | 10042 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 10043 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
10044 | || rs->dependency->specifier == IA64_RS_PR63) |
10045 | { | |
10046 | if (specs[count].cmp_type != CMP_NONE | |
10047 | && specs[count].cmp_type == rs->cmp_type) | |
10048 | { | |
10049 | if (md.debug_dv) | |
10050 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10051 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10052 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10053 | specs[count].index : 63); |
10054 | continue; | |
10055 | } | |
10056 | if (md.debug_dv) | |
4a4f25cf | 10057 | fprintf (stderr, |
7484b8e6 TW |
10058 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10059 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10060 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10061 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10062 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10063 | specs[count].index : 63); |
4a4f25cf | 10064 | |
7484b8e6 TW |
10065 | } |
10066 | ||
800eeca4 | 10067 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10068 | */ |
800eeca4 | 10069 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10070 | return 2; |
800eeca4 | 10071 | else if (specs[count].index == rs->index) |
542d6675 | 10072 | return 1; |
800eeca4 | 10073 | } |
800eeca4 JW |
10074 | |
10075 | return 0; | |
10076 | } | |
10077 | ||
10078 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10079 | insert a stop to create the break. Update all resource dependencies | |
10080 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10081 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10082 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10083 | instruction. */ |
800eeca4 JW |
10084 | |
10085 | static void | |
5a49b8ac | 10086 | insn_group_break (int insert_stop, int qp_regno, int save_current) |
800eeca4 JW |
10087 | { |
10088 | int i; | |
10089 | ||
10090 | if (insert_stop && md.num_slots_in_use > 0) | |
10091 | PREV_SLOT.end_of_insn_group = 1; | |
10092 | ||
10093 | if (md.debug_dv) | |
10094 | { | |
197865e8 | 10095 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10096 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10097 | if (qp_regno != 0) |
542d6675 | 10098 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10099 | fprintf (stderr, "\n"); |
10100 | } | |
10101 | ||
10102 | i = 0; | |
10103 | while (i < regdepslen) | |
10104 | { | |
10105 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10106 | ||
10107 | if (qp_regno != 0 | |
542d6675 KH |
10108 | && regdeps[i].qp_regno != qp_regno) |
10109 | { | |
10110 | ++i; | |
10111 | continue; | |
10112 | } | |
800eeca4 JW |
10113 | |
10114 | if (save_current | |
542d6675 KH |
10115 | && CURR_SLOT.src_file == regdeps[i].file |
10116 | && CURR_SLOT.src_line == regdeps[i].line) | |
10117 | { | |
10118 | ++i; | |
10119 | continue; | |
10120 | } | |
800eeca4 JW |
10121 | |
10122 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10123 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10124 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10125 | || dep->semantics == IA64_DVS_IMPLIEDF |
10126 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10127 | { | |
10128 | print_dependency ("Removing", i); | |
10129 | regdeps[i] = regdeps[--regdepslen]; | |
10130 | } | |
800eeca4 | 10131 | else |
542d6675 KH |
10132 | { |
10133 | if (dep->semantics == IA64_DVS_DATA | |
10134 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10135 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10136 | { |
10137 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10138 | regdeps[i].insn_srlz = STATE_STOP; | |
10139 | if (regdeps[i].data_srlz == STATE_NONE) | |
10140 | regdeps[i].data_srlz = STATE_STOP; | |
10141 | } | |
10142 | ++i; | |
10143 | } | |
800eeca4 JW |
10144 | } |
10145 | } | |
10146 | ||
542d6675 KH |
10147 | /* Add the given resource usage spec to the list of active dependencies. */ |
10148 | ||
197865e8 | 10149 | static void |
5a49b8ac AM |
10150 | mark_resource (struct ia64_opcode *idesc ATTRIBUTE_UNUSED, |
10151 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED, | |
10152 | struct rsrc *spec, | |
10153 | int depind, | |
10154 | int path) | |
800eeca4 JW |
10155 | { |
10156 | if (regdepslen == regdepstotlen) | |
10157 | { | |
10158 | regdepstotlen += 20; | |
10159 | regdeps = (struct rsrc *) | |
542d6675 | 10160 | xrealloc ((void *) regdeps, |
bc805888 | 10161 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10162 | } |
10163 | ||
10164 | regdeps[regdepslen] = *spec; | |
10165 | regdeps[regdepslen].depind = depind; | |
10166 | regdeps[regdepslen].path = path; | |
10167 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10168 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10169 | ||
10170 | print_dependency ("Adding", regdepslen); | |
10171 | ||
10172 | ++regdepslen; | |
10173 | } | |
10174 | ||
10175 | static void | |
5a49b8ac | 10176 | print_dependency (const char *action, int depind) |
800eeca4 JW |
10177 | { |
10178 | if (md.debug_dv) | |
10179 | { | |
197865e8 | 10180 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10181 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10182 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10183 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10184 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10185 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10186 | { |
10187 | fputs (" ", stderr); | |
10188 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10189 | fputs ("+", stderr); | |
10190 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10191 | } | |
800eeca4 JW |
10192 | fprintf (stderr, "\n"); |
10193 | } | |
10194 | } | |
10195 | ||
10196 | static void | |
5a49b8ac | 10197 | instruction_serialization (void) |
800eeca4 JW |
10198 | { |
10199 | int i; | |
10200 | if (md.debug_dv) | |
10201 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10202 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10203 | if (regdeps[i].insn_srlz == STATE_STOP) |
10204 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10205 | } | |
10206 | ||
10207 | static void | |
5a49b8ac | 10208 | data_serialization (void) |
800eeca4 JW |
10209 | { |
10210 | int i = 0; | |
10211 | if (md.debug_dv) | |
10212 | fprintf (stderr, " Data serialization\n"); | |
10213 | while (i < regdepslen) | |
10214 | { | |
10215 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10216 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10217 | data serialization. This might change with new tables */ | |
10218 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10219 | { | |
10220 | print_dependency ("Removing", i); | |
10221 | regdeps[i] = regdeps[--regdepslen]; | |
10222 | } | |
800eeca4 | 10223 | else |
542d6675 | 10224 | ++i; |
800eeca4 JW |
10225 | } |
10226 | } | |
10227 | ||
542d6675 KH |
10228 | /* Insert stops and serializations as needed to avoid DVs. */ |
10229 | ||
800eeca4 | 10230 | static void |
5a49b8ac | 10231 | remove_marked_resource (struct rsrc *rs) |
800eeca4 JW |
10232 | { |
10233 | switch (rs->dependency->semantics) | |
10234 | { | |
10235 | case IA64_DVS_SPECIFIC: | |
10236 | if (md.debug_dv) | |
10237 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10238 | /* ...fall through... */ |
800eeca4 JW |
10239 | case IA64_DVS_INSTR: |
10240 | if (md.debug_dv) | |
542d6675 | 10241 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10242 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10243 | insn_group_break (1, 0, 0); |
800eeca4 | 10244 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10245 | { |
888a75be | 10246 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10247 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10248 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10249 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10250 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10251 | instruction_serialization (); | |
10252 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10253 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10254 | emit_one_bundle (); | |
888a75be | 10255 | CURR_SLOT = oldslot; |
542d6675 | 10256 | } |
800eeca4 JW |
10257 | insn_group_break (1, 0, 0); |
10258 | break; | |
10259 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10260 | "other" types of DV are eliminated |
10261 | by a data serialization */ | |
800eeca4 JW |
10262 | case IA64_DVS_DATA: |
10263 | if (md.debug_dv) | |
542d6675 | 10264 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10265 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10266 | insn_group_break (1, 0, 0); |
800eeca4 | 10267 | { |
888a75be | 10268 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10269 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10270 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10271 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10272 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10273 | data_serialization (); | |
10274 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10275 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10276 | emit_one_bundle (); | |
888a75be | 10277 | CURR_SLOT = oldslot; |
800eeca4 JW |
10278 | } |
10279 | break; | |
10280 | case IA64_DVS_IMPLIED: | |
10281 | case IA64_DVS_IMPLIEDF: | |
10282 | if (md.debug_dv) | |
542d6675 | 10283 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10284 | insn_group_break (1, 0, 0); |
10285 | break; | |
10286 | default: | |
10287 | break; | |
10288 | } | |
10289 | } | |
10290 | ||
10291 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10292 | list. |
800eeca4 JW |
10293 | |
10294 | The check is run once for each execution path encountered. In this case, | |
10295 | a unique execution path is the sequence of instructions following a code | |
10296 | entry point, e.g. the following has three execution paths, one starting | |
10297 | at L0, one at L1, and one at L2. | |
197865e8 | 10298 | |
800eeca4 JW |
10299 | L0: nop |
10300 | L1: add | |
10301 | L2: add | |
197865e8 | 10302 | br.ret |
800eeca4 | 10303 | */ |
542d6675 | 10304 | |
800eeca4 | 10305 | static void |
5a49b8ac | 10306 | check_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10307 | { |
10308 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10309 | int path; | |
10310 | int i; | |
10311 | ||
10312 | /* Note that the number of marked resources may change within the | |
197865e8 | 10313 | loop if in auto mode. */ |
800eeca4 JW |
10314 | i = 0; |
10315 | while (i < regdepslen) | |
10316 | { | |
10317 | struct rsrc *rs = ®deps[i]; | |
10318 | const struct ia64_dependency *dep = rs->dependency; | |
10319 | int chkind; | |
10320 | int note; | |
10321 | int start_over = 0; | |
10322 | ||
10323 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10324 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10325 | { | |
10326 | ++i; | |
10327 | continue; | |
10328 | } | |
10329 | ||
10330 | note = NOTE (opdeps->chks[chkind]); | |
10331 | ||
10332 | /* Check this resource against each execution path seen thus far. */ | |
10333 | for (path = 0; path <= md.path; path++) | |
10334 | { | |
10335 | int matchtype; | |
10336 | ||
10337 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10338 | if (rs->path < path) | |
10339 | continue; | |
10340 | ||
10341 | /* If the QP for this insn implies a QP which has branched, don't | |
10342 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10343 | useful; what's the point of generating code which will only be | |
10344 | reached if its QP is zero? | |
10345 | This code was specifically inserted to handle the following code, | |
10346 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10347 | ||
10348 | mov r4 = 2 | |
10349 | (p2) br.cond L | |
10350 | (p1) mov r4 = 7 | |
10351 | */ | |
10352 | if (CURR_SLOT.qp_regno != 0) | |
10353 | { | |
10354 | int skip = 0; | |
10355 | int implies; | |
10356 | for (implies = 0; implies < qp_implieslen; implies++) | |
10357 | { | |
10358 | if (qp_implies[implies].path >= path | |
10359 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10360 | && qp_implies[implies].p2_branched) | |
10361 | { | |
10362 | skip = 1; | |
10363 | break; | |
10364 | } | |
10365 | } | |
10366 | if (skip) | |
10367 | continue; | |
10368 | } | |
10369 | ||
10370 | if ((matchtype = resources_match (rs, idesc, note, | |
10371 | CURR_SLOT.qp_regno, path)) != 0) | |
10372 | { | |
10373 | char msg[1024]; | |
10374 | char pathmsg[256] = ""; | |
10375 | char indexmsg[256] = ""; | |
10376 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10377 | ||
10378 | if (path != 0) | |
f9f21a03 L |
10379 | snprintf (pathmsg, sizeof (pathmsg), |
10380 | " when entry is at label '%s'", | |
542d6675 | 10381 | md.entry_labels[path - 1]); |
a66d2bb7 | 10382 | if (matchtype == 1 && rs->index >= 0) |
f9f21a03 L |
10383 | snprintf (indexmsg, sizeof (indexmsg), |
10384 | ", specific resource number is %d", | |
542d6675 | 10385 | rs->index); |
f9f21a03 L |
10386 | snprintf (msg, sizeof (msg), |
10387 | "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
542d6675 KH |
10388 | idesc->name, |
10389 | (certain ? "violates" : "may violate"), | |
10390 | dv_mode[dep->mode], dep->name, | |
10391 | dv_sem[dep->semantics], | |
10392 | pathmsg, indexmsg); | |
10393 | ||
10394 | if (md.explicit_mode) | |
10395 | { | |
10396 | as_warn ("%s", msg); | |
10397 | if (path < md.path) | |
ad4b42b4 | 10398 | as_warn (_("Only the first path encountering the conflict is reported")); |
542d6675 | 10399 | as_warn_where (rs->file, rs->line, |
ad4b42b4 | 10400 | _("This is the location of the conflicting usage")); |
542d6675 KH |
10401 | /* Don't bother checking other paths, to avoid duplicating |
10402 | the same warning */ | |
10403 | break; | |
10404 | } | |
10405 | else | |
10406 | { | |
10407 | if (md.debug_dv) | |
10408 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10409 | ||
10410 | remove_marked_resource (rs); | |
10411 | ||
10412 | /* since the set of dependencies has changed, start over */ | |
10413 | /* FIXME -- since we're removing dvs as we go, we | |
10414 | probably don't really need to start over... */ | |
10415 | start_over = 1; | |
10416 | break; | |
10417 | } | |
10418 | } | |
10419 | } | |
800eeca4 | 10420 | if (start_over) |
542d6675 | 10421 | i = 0; |
800eeca4 | 10422 | else |
542d6675 | 10423 | ++i; |
800eeca4 JW |
10424 | } |
10425 | } | |
10426 | ||
542d6675 KH |
10427 | /* Register new dependencies based on the given opcode. */ |
10428 | ||
800eeca4 | 10429 | static void |
5a49b8ac | 10430 | mark_resources (struct ia64_opcode *idesc) |
800eeca4 JW |
10431 | { |
10432 | int i; | |
10433 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10434 | int add_only_qp_reads = 0; | |
10435 | ||
10436 | /* A conditional branch only uses its resources if it is taken; if it is | |
10437 | taken, we stop following that path. The other branch types effectively | |
10438 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10439 | reads. */ |
800eeca4 JW |
10440 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10441 | { | |
10442 | add_only_qp_reads = 1; | |
10443 | } | |
10444 | ||
10445 | if (md.debug_dv) | |
10446 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10447 | ||
542d6675 | 10448 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10449 | { |
10450 | const struct ia64_dependency *dep; | |
10451 | struct rsrc specs[MAX_SPECS]; | |
10452 | int note; | |
10453 | int path; | |
10454 | int count; | |
197865e8 | 10455 | |
800eeca4 | 10456 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10457 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10458 | |
10459 | if (add_only_qp_reads | |
542d6675 KH |
10460 | && !(dep->mode == IA64_DV_WAR |
10461 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10462 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10463 | || dep->specifier == IA64_RS_PR63))) |
10464 | continue; | |
800eeca4 JW |
10465 | |
10466 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10467 | ||
800eeca4 | 10468 | while (count-- > 0) |
542d6675 KH |
10469 | { |
10470 | mark_resource (idesc, dep, &specs[count], | |
10471 | DEP (opdeps->regs[i]), md.path); | |
10472 | } | |
800eeca4 JW |
10473 | |
10474 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10475 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10476 | switch (dep->specifier) |
542d6675 KH |
10477 | { |
10478 | default: | |
10479 | break; | |
10480 | case IA64_RS_CPUID: | |
10481 | case IA64_RS_DBR: | |
10482 | case IA64_RS_IBR: | |
800eeca4 | 10483 | case IA64_RS_MSR: |
542d6675 KH |
10484 | case IA64_RS_PKR: |
10485 | case IA64_RS_PMC: | |
10486 | case IA64_RS_PMD: | |
10487 | case IA64_RS_RR: | |
10488 | for (path = 0; path < md.path; path++) | |
10489 | { | |
10490 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10491 | while (count-- > 0) | |
10492 | mark_resource (idesc, dep, &specs[count], | |
10493 | DEP (opdeps->regs[i]), path); | |
10494 | } | |
10495 | break; | |
10496 | } | |
10497 | } | |
10498 | } | |
10499 | ||
10500 | /* Remove dependencies when they no longer apply. */ | |
10501 | ||
800eeca4 | 10502 | static void |
5a49b8ac | 10503 | update_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10504 | { |
10505 | int i; | |
10506 | ||
10507 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10508 | { | |
10509 | instruction_serialization (); | |
10510 | } | |
10511 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10512 | { | |
10513 | data_serialization (); | |
10514 | } | |
10515 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10516 | || is_taken_branch (idesc)) |
800eeca4 | 10517 | { |
542d6675 KH |
10518 | /* Although technically the taken branch doesn't clear dependencies |
10519 | which require a srlz.[id], we don't follow the branch; the next | |
10520 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10521 | regdepslen = 0; |
800eeca4 JW |
10522 | md.path = 0; |
10523 | } | |
10524 | else if (is_conditional_branch (idesc) | |
542d6675 | 10525 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10526 | { |
10527 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10528 | ||
542d6675 KH |
10529 | for (i = 0; i < qp_implieslen; i++) |
10530 | { | |
10531 | /* If the conditional branch's predicate is implied by the predicate | |
10532 | in an existing dependency, remove that dependency. */ | |
10533 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10534 | { | |
10535 | int depind = 0; | |
10536 | /* Note that this implied predicate takes a branch so that if | |
10537 | a later insn generates a DV but its predicate implies this | |
10538 | one, we can avoid the false DV warning. */ | |
10539 | qp_implies[i].p2_branched = 1; | |
10540 | while (depind < regdepslen) | |
10541 | { | |
10542 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10543 | { | |
10544 | print_dependency ("Removing", depind); | |
10545 | regdeps[depind] = regdeps[--regdepslen]; | |
10546 | } | |
10547 | else | |
10548 | ++depind; | |
10549 | } | |
10550 | } | |
10551 | } | |
800eeca4 | 10552 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10553 | cleared, provided that the QP hasn't been modified between the |
10554 | marking instruction and the branch. */ | |
800eeca4 | 10555 | if (is_call) |
542d6675 KH |
10556 | { |
10557 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10558 | } | |
800eeca4 | 10559 | else |
542d6675 KH |
10560 | { |
10561 | i = 0; | |
10562 | while (i < regdepslen) | |
10563 | { | |
10564 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10565 | && regdeps[i].link_to_qp_branch | |
10566 | && (regdeps[i].file != CURR_SLOT.src_file | |
10567 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10568 | { | |
10569 | /* Treat like a taken branch */ | |
10570 | print_dependency ("Removing", i); | |
10571 | regdeps[i] = regdeps[--regdepslen]; | |
10572 | } | |
10573 | else | |
10574 | ++i; | |
10575 | } | |
10576 | } | |
800eeca4 JW |
10577 | } |
10578 | } | |
10579 | ||
10580 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10581 | |
800eeca4 | 10582 | static int |
5a49b8ac | 10583 | check_dv (struct ia64_opcode *idesc) |
800eeca4 JW |
10584 | { |
10585 | if (md.debug_dv) | |
10586 | { | |
197865e8 | 10587 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10588 | idesc->name, CURR_SLOT.src_line, |
10589 | idesc->dependencies->nchks, | |
10590 | idesc->dependencies->nregs); | |
800eeca4 JW |
10591 | } |
10592 | ||
197865e8 | 10593 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10594 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10595 | check against the specific resources used. */ |
800eeca4 JW |
10596 | check_dependencies (idesc); |
10597 | ||
542d6675 KH |
10598 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10599 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10600 | mark_resources (idesc); |
10601 | ||
10602 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10603 | requirements for being cleared |
10604 | ||
800eeca4 JW |
10605 | Instruction serialization (insns separated by interruption, rfi, or |
10606 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10607 | ||
10608 | Data serialization (instruction serialization, or writer + srlz.d + | |
10609 | reader, where writer and srlz.d are in separate groups) clears | |
10610 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10611 | always be the case). | |
10612 | ||
10613 | Instruction group break (groups separated by stop, taken branch, | |
10614 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10615 | */ | |
10616 | update_dependencies (idesc); | |
10617 | ||
10618 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10619 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10620 | note_register_values (idesc); |
10621 | ||
197865e8 | 10622 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10623 | md.mem_offset.hint = 0; |
10624 | ||
10625 | return 0; | |
10626 | } | |
10627 | ||
10628 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10629 | here. */ | |
10630 | void | |
5a49b8ac | 10631 | md_assemble (char *str) |
800eeca4 JW |
10632 | { |
10633 | char *saved_input_line_pointer, *mnemonic; | |
10634 | const struct pseudo_opcode *pdesc; | |
10635 | struct ia64_opcode *idesc; | |
10636 | unsigned char qp_regno; | |
10637 | unsigned int flags; | |
10638 | int ch; | |
10639 | ||
10640 | saved_input_line_pointer = input_line_pointer; | |
10641 | input_line_pointer = str; | |
10642 | ||
542d6675 | 10643 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10644 | |
10645 | mnemonic = input_line_pointer; | |
10646 | ch = get_symbol_end (); | |
10647 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10648 | if (pdesc) | |
10649 | { | |
10650 | *input_line_pointer = ch; | |
10651 | (*pdesc->handler) (pdesc->arg); | |
10652 | goto done; | |
10653 | } | |
10654 | ||
542d6675 | 10655 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10656 | |
10657 | idesc = ia64_find_opcode (mnemonic); | |
10658 | *input_line_pointer = ch; | |
10659 | if (!idesc) | |
10660 | { | |
ad4b42b4 | 10661 | as_bad (_("Unknown opcode `%s'"), mnemonic); |
800eeca4 JW |
10662 | goto done; |
10663 | } | |
10664 | ||
10665 | idesc = parse_operands (idesc); | |
10666 | if (!idesc) | |
10667 | goto done; | |
10668 | ||
542d6675 | 10669 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10670 | if (idesc->type == IA64_TYPE_DYN) |
10671 | { | |
10672 | if (strcmp (idesc->name, "add") == 0) | |
10673 | { | |
10674 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10675 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10676 | mnemonic = "addl"; | |
10677 | else | |
10678 | mnemonic = "adds"; | |
3d56ab85 | 10679 | ia64_free_opcode (idesc); |
800eeca4 | 10680 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10681 | } |
10682 | else if (strcmp (idesc->name, "mov") == 0) | |
10683 | { | |
10684 | enum ia64_opnd opnd1, opnd2; | |
10685 | int rop; | |
10686 | ||
10687 | opnd1 = idesc->operands[0]; | |
10688 | opnd2 = idesc->operands[1]; | |
10689 | if (opnd1 == IA64_OPND_AR3) | |
10690 | rop = 0; | |
10691 | else if (opnd2 == IA64_OPND_AR3) | |
10692 | rop = 1; | |
10693 | else | |
10694 | abort (); | |
652ca075 L |
10695 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10696 | { | |
10697 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10698 | mnemonic = "mov.i"; | |
97762d08 | 10699 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10700 | mnemonic = "mov.m"; |
97762d08 JB |
10701 | else |
10702 | rop = -1; | |
652ca075 | 10703 | } |
800eeca4 | 10704 | else |
652ca075 | 10705 | abort (); |
97762d08 JB |
10706 | if (rop >= 0) |
10707 | { | |
10708 | ia64_free_opcode (idesc); | |
10709 | idesc = ia64_find_opcode (mnemonic); | |
10710 | while (idesc != NULL | |
10711 | && (idesc->operands[0] != opnd1 | |
10712 | || idesc->operands[1] != opnd2)) | |
10713 | idesc = get_next_opcode (idesc); | |
10714 | } | |
800eeca4 JW |
10715 | } |
10716 | } | |
652ca075 L |
10717 | else if (strcmp (idesc->name, "mov.i") == 0 |
10718 | || strcmp (idesc->name, "mov.m") == 0) | |
10719 | { | |
10720 | enum ia64_opnd opnd1, opnd2; | |
10721 | int rop; | |
10722 | ||
10723 | opnd1 = idesc->operands[0]; | |
10724 | opnd2 = idesc->operands[1]; | |
10725 | if (opnd1 == IA64_OPND_AR3) | |
10726 | rop = 0; | |
10727 | else if (opnd2 == IA64_OPND_AR3) | |
10728 | rop = 1; | |
10729 | else | |
10730 | abort (); | |
10731 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10732 | { | |
10733 | char unit = 'a'; | |
10734 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10735 | unit = 'i'; | |
10736 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10737 | unit = 'm'; | |
10738 | if (unit != 'a' && unit != idesc->name [4]) | |
ad4b42b4 | 10739 | as_bad (_("AR %d can only be accessed by %c-unit"), |
652ca075 L |
10740 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10741 | TOUPPER (unit)); | |
10742 | } | |
10743 | } | |
91d777ee L |
10744 | else if (strcmp (idesc->name, "hint.b") == 0) |
10745 | { | |
10746 | switch (md.hint_b) | |
10747 | { | |
10748 | case hint_b_ok: | |
10749 | break; | |
10750 | case hint_b_warning: | |
ad4b42b4 | 10751 | as_warn (_("hint.b may be treated as nop")); |
91d777ee L |
10752 | break; |
10753 | case hint_b_error: | |
ad4b42b4 | 10754 | as_bad (_("hint.b shouldn't be used")); |
91d777ee L |
10755 | break; |
10756 | } | |
10757 | } | |
800eeca4 JW |
10758 | |
10759 | qp_regno = 0; | |
10760 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10761 | { |
10762 | qp_regno = md.qp.X_add_number - REG_P; | |
10763 | md.qp.X_op = O_absent; | |
10764 | } | |
800eeca4 JW |
10765 | |
10766 | flags = idesc->flags; | |
10767 | ||
10768 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10769 | { |
10770 | /* The alignment frag has to end with a stop bit only if the | |
10771 | next instruction after the alignment directive has to be | |
10772 | the first instruction in an instruction group. */ | |
10773 | if (align_frag) | |
10774 | { | |
10775 | while (align_frag->fr_type != rs_align_code) | |
10776 | { | |
10777 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10778 | if (!align_frag) |
10779 | break; | |
9545c4ce | 10780 | } |
bae25f19 L |
10781 | /* align_frag can be NULL if there are directives in |
10782 | between. */ | |
10783 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10784 | align_frag->tc_frag_data = 1; |
10785 | } | |
10786 | ||
10787 | insn_group_break (1, 0, 0); | |
10788 | } | |
10789 | align_frag = NULL; | |
800eeca4 JW |
10790 | |
10791 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10792 | { | |
ad4b42b4 | 10793 | as_bad (_("`%s' cannot be predicated"), idesc->name); |
800eeca4 JW |
10794 | goto done; |
10795 | } | |
10796 | ||
542d6675 | 10797 | /* Build the instruction. */ |
800eeca4 JW |
10798 | CURR_SLOT.qp_regno = qp_regno; |
10799 | CURR_SLOT.idesc = idesc; | |
10800 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10801 | dwarf2_where (&CURR_SLOT.debug_line); |
661ba50f | 10802 | dwarf2_consume_line_info (); |
800eeca4 | 10803 | |
ba825241 | 10804 | /* Add unwind entries, if there are any. */ |
e0c9811a | 10805 | if (unwind.current_entry) |
800eeca4 | 10806 | { |
e0c9811a JW |
10807 | CURR_SLOT.unwind_record = unwind.current_entry; |
10808 | unwind.current_entry = NULL; | |
800eeca4 | 10809 | } |
ba825241 JB |
10810 | if (unwind.pending_saves) |
10811 | { | |
10812 | if (unwind.pending_saves->next) | |
10813 | { | |
10814 | /* Attach the next pending save to the next slot so that its | |
10815 | slot number will get set correctly. */ | |
10816 | add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); | |
10817 | unwind.pending_saves = &unwind.pending_saves->next->r.record.p; | |
10818 | } | |
10819 | else | |
10820 | unwind.pending_saves = NULL; | |
10821 | } | |
5656b6b8 | 10822 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10823 | unwind.insn = 1; |
800eeca4 | 10824 | |
542d6675 | 10825 | /* Check for dependency violations. */ |
800eeca4 | 10826 | if (md.detect_dv) |
542d6675 | 10827 | check_dv (idesc); |
800eeca4 JW |
10828 | |
10829 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10830 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10831 | emit_one_bundle (); | |
10832 | ||
10833 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10834 | insn_group_break (1, 0, 0); | |
10835 | ||
10836 | md.last_text_seg = now_seg; | |
10837 | ||
10838 | done: | |
10839 | input_line_pointer = saved_input_line_pointer; | |
10840 | } | |
10841 | ||
10842 | /* Called when symbol NAME cannot be found in the symbol table. | |
10843 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10844 | |
10845 | symbolS * | |
5a49b8ac | 10846 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
800eeca4 JW |
10847 | { |
10848 | return 0; | |
10849 | } | |
10850 | ||
10851 | /* Called for any expression that can not be recognized. When the | |
10852 | function is called, `input_line_pointer' will point to the start of | |
10853 | the expression. */ | |
542d6675 | 10854 | |
800eeca4 | 10855 | void |
5a49b8ac | 10856 | md_operand (expressionS *e) |
800eeca4 | 10857 | { |
800eeca4 JW |
10858 | switch (*input_line_pointer) |
10859 | { | |
800eeca4 JW |
10860 | case '[': |
10861 | ++input_line_pointer; | |
60d11e55 | 10862 | expression_and_evaluate (e); |
800eeca4 JW |
10863 | if (*input_line_pointer != ']') |
10864 | { | |
ad4b42b4 | 10865 | as_bad (_("Closing bracket missing")); |
800eeca4 JW |
10866 | goto err; |
10867 | } | |
10868 | else | |
10869 | { | |
6a2375c6 JB |
10870 | if (e->X_op != O_register |
10871 | || e->X_add_number < REG_GR | |
10872 | || e->X_add_number > REG_GR + 127) | |
10873 | { | |
ad4b42b4 | 10874 | as_bad (_("Index must be a general register")); |
6a2375c6 JB |
10875 | e->X_add_number = REG_GR; |
10876 | } | |
800eeca4 JW |
10877 | |
10878 | ++input_line_pointer; | |
10879 | e->X_op = O_index; | |
10880 | } | |
10881 | break; | |
10882 | ||
10883 | default: | |
10884 | break; | |
10885 | } | |
10886 | return; | |
10887 | ||
10888 | err: | |
10889 | ignore_rest_of_line (); | |
10890 | } | |
10891 | ||
10892 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10893 | a section symbol plus some offset. For relocs involving @fptr(), | |
10894 | directives we don't want such adjustments since we need to have the | |
10895 | original symbol's name in the reloc. */ | |
10896 | int | |
5a49b8ac | 10897 | ia64_fix_adjustable (fixS *fix) |
800eeca4 JW |
10898 | { |
10899 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 10900 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
10901 | return 0; |
10902 | ||
10903 | switch (fix->fx_r_type) | |
10904 | { | |
10905 | case BFD_RELOC_IA64_FPTR64I: | |
10906 | case BFD_RELOC_IA64_FPTR32MSB: | |
10907 | case BFD_RELOC_IA64_FPTR32LSB: | |
10908 | case BFD_RELOC_IA64_FPTR64MSB: | |
10909 | case BFD_RELOC_IA64_FPTR64LSB: | |
10910 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10911 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10912 | return 0; | |
10913 | default: | |
10914 | break; | |
10915 | } | |
10916 | ||
10917 | return 1; | |
10918 | } | |
10919 | ||
10920 | int | |
5a49b8ac | 10921 | ia64_force_relocation (fixS *fix) |
800eeca4 JW |
10922 | { |
10923 | switch (fix->fx_r_type) | |
10924 | { | |
10925 | case BFD_RELOC_IA64_FPTR64I: | |
10926 | case BFD_RELOC_IA64_FPTR32MSB: | |
10927 | case BFD_RELOC_IA64_FPTR32LSB: | |
10928 | case BFD_RELOC_IA64_FPTR64MSB: | |
10929 | case BFD_RELOC_IA64_FPTR64LSB: | |
10930 | ||
10931 | case BFD_RELOC_IA64_LTOFF22: | |
10932 | case BFD_RELOC_IA64_LTOFF64I: | |
10933 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10934 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10935 | case BFD_RELOC_IA64_PLTOFF22: | |
10936 | case BFD_RELOC_IA64_PLTOFF64I: | |
10937 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10938 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10939 | |
10940 | case BFD_RELOC_IA64_LTOFF22X: | |
10941 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10942 | return 1; |
10943 | ||
10944 | default: | |
a161fe53 | 10945 | break; |
800eeca4 | 10946 | } |
a161fe53 | 10947 | |
ae6063d4 | 10948 | return generic_force_reloc (fix); |
800eeca4 JW |
10949 | } |
10950 | ||
10951 | /* Decide from what point a pc-relative relocation is relative to, | |
10952 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10953 | long | |
5a49b8ac | 10954 | ia64_pcrel_from_section (fixS *fix, segT sec) |
800eeca4 JW |
10955 | { |
10956 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10957 | |
800eeca4 JW |
10958 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10959 | off &= ~0xfUL; | |
10960 | ||
10961 | return off; | |
10962 | } | |
10963 | ||
6174d9c8 RH |
10964 | |
10965 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10966 | void | |
10967 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10968 | { | |
91d6fa6a | 10969 | expressionS exp; |
6174d9c8 | 10970 | |
91d6fa6a NC |
10971 | exp.X_op = O_pseudo_fixup; |
10972 | exp.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10973 | exp.X_add_number = 0; | |
10974 | exp.X_add_symbol = symbol; | |
10975 | emit_expr (&exp, size); | |
6174d9c8 RH |
10976 | } |
10977 | ||
800eeca4 JW |
10978 | /* This is called whenever some data item (not an instruction) needs a |
10979 | fixup. We pick the right reloc code depending on the byteorder | |
10980 | currently in effect. */ | |
10981 | void | |
5a49b8ac | 10982 | ia64_cons_fix_new (fragS *f, int where, int nbytes, expressionS *exp) |
800eeca4 JW |
10983 | { |
10984 | bfd_reloc_code_real_type code; | |
10985 | fixS *fix; | |
10986 | ||
10987 | switch (nbytes) | |
10988 | { | |
10989 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10990 | them here since they will work fine as long as the expression | |
10991 | is fully defined at the end of the pass over the source file. */ | |
10992 | case 1: code = BFD_RELOC_8; break; | |
10993 | case 2: code = BFD_RELOC_16; break; | |
10994 | case 4: | |
10995 | if (target_big_endian) | |
10996 | code = BFD_RELOC_IA64_DIR32MSB; | |
10997 | else | |
10998 | code = BFD_RELOC_IA64_DIR32LSB; | |
10999 | break; | |
11000 | ||
11001 | case 8: | |
40449e9f | 11002 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 11003 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
11004 | && exp->X_op_symbol |
11005 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
11006 | && !(md.flags & EF_IA_64_ABI64)) | |
11007 | { | |
11008 | if (target_big_endian) | |
11009 | code = BFD_RELOC_IA64_IPLTMSB; | |
11010 | else | |
11011 | code = BFD_RELOC_IA64_IPLTLSB; | |
11012 | exp->X_op = O_symbol; | |
11013 | break; | |
11014 | } | |
11015 | else | |
11016 | { | |
11017 | if (target_big_endian) | |
11018 | code = BFD_RELOC_IA64_DIR64MSB; | |
11019 | else | |
11020 | code = BFD_RELOC_IA64_DIR64LSB; | |
11021 | break; | |
11022 | } | |
800eeca4 | 11023 | |
3969b680 RH |
11024 | case 16: |
11025 | if (exp->X_op == O_pseudo_fixup | |
11026 | && exp->X_op_symbol | |
11027 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
11028 | { | |
11029 | if (target_big_endian) | |
11030 | code = BFD_RELOC_IA64_IPLTMSB; | |
11031 | else | |
11032 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
11033 | exp->X_op = O_symbol; |
11034 | break; | |
11035 | } | |
11036 | /* FALLTHRU */ | |
11037 | ||
800eeca4 | 11038 | default: |
ad4b42b4 | 11039 | as_bad (_("Unsupported fixup size %d"), nbytes); |
800eeca4 JW |
11040 | ignore_rest_of_line (); |
11041 | return; | |
11042 | } | |
6174d9c8 | 11043 | |
800eeca4 JW |
11044 | if (exp->X_op == O_pseudo_fixup) |
11045 | { | |
800eeca4 JW |
11046 | exp->X_op = O_symbol; |
11047 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11048 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11049 | } |
3969b680 | 11050 | |
800eeca4 JW |
11051 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11052 | /* We need to store the byte order in effect in case we're going | |
11053 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 11054 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
11055 | fix->tc_fix_data.bigendian = target_big_endian; |
11056 | } | |
11057 | ||
11058 | /* Return the actual relocation we wish to associate with the pseudo | |
11059 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11060 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11061 | |
11062 | static bfd_reloc_code_real_type | |
5a49b8ac | 11063 | ia64_gen_real_reloc_type (struct symbol *sym, bfd_reloc_code_real_type r_type) |
800eeca4 | 11064 | { |
d3ce72d0 | 11065 | bfd_reloc_code_real_type newr = 0; |
0ca3e455 | 11066 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11067 | |
11068 | if (sym == NULL) | |
11069 | { | |
11070 | return r_type; | |
11071 | } | |
11072 | ||
11073 | switch (S_GET_VALUE (sym)) | |
11074 | { | |
11075 | case FUNC_FPTR_RELATIVE: | |
11076 | switch (r_type) | |
11077 | { | |
d3ce72d0 NC |
11078 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_FPTR64I; break; |
11079 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_FPTR32MSB; break; | |
11080 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_FPTR32LSB; break; | |
11081 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_FPTR64MSB; break; | |
11082 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11083 | default: type = "FPTR"; break; |
800eeca4 JW |
11084 | } |
11085 | break; | |
11086 | ||
11087 | case FUNC_GP_RELATIVE: | |
11088 | switch (r_type) | |
11089 | { | |
d3ce72d0 NC |
11090 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_GPREL22; break; |
11091 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_GPREL64I; break; | |
11092 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_GPREL32MSB; break; | |
11093 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_GPREL32LSB; break; | |
11094 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_GPREL64MSB; break; | |
11095 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11096 | default: type = "GPREL"; break; |
800eeca4 JW |
11097 | } |
11098 | break; | |
11099 | ||
11100 | case FUNC_LT_RELATIVE: | |
11101 | switch (r_type) | |
11102 | { | |
d3ce72d0 NC |
11103 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22; break; |
11104 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11105 | default: type = "LTOFF"; break; |
800eeca4 JW |
11106 | } |
11107 | break; | |
11108 | ||
fa2c7eff RH |
11109 | case FUNC_LT_RELATIVE_X: |
11110 | switch (r_type) | |
11111 | { | |
d3ce72d0 | 11112 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22X; break; |
0ca3e455 | 11113 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11114 | } |
11115 | break; | |
11116 | ||
c67e42c9 RH |
11117 | case FUNC_PC_RELATIVE: |
11118 | switch (r_type) | |
11119 | { | |
d3ce72d0 NC |
11120 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PCREL22; break; |
11121 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PCREL64I; break; | |
11122 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_PCREL32MSB; break; | |
11123 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_PCREL32LSB; break; | |
11124 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PCREL64MSB; break; | |
11125 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11126 | default: type = "PCREL"; break; |
c67e42c9 RH |
11127 | } |
11128 | break; | |
11129 | ||
800eeca4 JW |
11130 | case FUNC_PLT_RELATIVE: |
11131 | switch (r_type) | |
11132 | { | |
d3ce72d0 NC |
11133 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PLTOFF22; break; |
11134 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PLTOFF64I; break; | |
11135 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11136 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11137 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11138 | } |
11139 | break; | |
11140 | ||
11141 | case FUNC_SEC_RELATIVE: | |
11142 | switch (r_type) | |
11143 | { | |
d3ce72d0 NC |
11144 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SECREL32MSB;break; |
11145 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SECREL32LSB;break; | |
11146 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SECREL64MSB;break; | |
11147 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11148 | default: type = "SECREL"; break; |
800eeca4 JW |
11149 | } |
11150 | break; | |
11151 | ||
11152 | case FUNC_SEG_RELATIVE: | |
11153 | switch (r_type) | |
11154 | { | |
d3ce72d0 NC |
11155 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SEGREL32MSB;break; |
11156 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11157 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11158 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11159 | default: type = "SEGREL"; break; |
800eeca4 JW |
11160 | } |
11161 | break; | |
11162 | ||
11163 | case FUNC_LTV_RELATIVE: | |
11164 | switch (r_type) | |
11165 | { | |
d3ce72d0 NC |
11166 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_LTV32MSB; break; |
11167 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_LTV32LSB; break; | |
11168 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_LTV64MSB; break; | |
11169 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11170 | default: type = "LTV"; break; |
800eeca4 JW |
11171 | } |
11172 | break; | |
11173 | ||
11174 | case FUNC_LT_FPTR_RELATIVE: | |
11175 | switch (r_type) | |
11176 | { | |
11177 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11178 | newr = BFD_RELOC_IA64_LTOFF_FPTR22; break; |
800eeca4 | 11179 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11180 | newr = BFD_RELOC_IA64_LTOFF_FPTR64I; break; |
0ca3e455 | 11181 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11182 | newr = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; |
0ca3e455 | 11183 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11184 | newr = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; |
0ca3e455 | 11185 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11186 | newr = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; |
0ca3e455 | 11187 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11188 | newr = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; |
800eeca4 | 11189 | default: |
0ca3e455 | 11190 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11191 | } |
11192 | break; | |
3969b680 | 11193 | |
13ae64f3 JJ |
11194 | case FUNC_TP_RELATIVE: |
11195 | switch (r_type) | |
11196 | { | |
d3ce72d0 NC |
11197 | case BFD_RELOC_IA64_IMM14: newr = BFD_RELOC_IA64_TPREL14; break; |
11198 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_TPREL22; break; | |
11199 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_TPREL64I; break; | |
11200 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_TPREL64MSB; break; | |
11201 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_TPREL64LSB; break; | |
0ca3e455 | 11202 | default: type = "TPREL"; break; |
13ae64f3 JJ |
11203 | } |
11204 | break; | |
11205 | ||
11206 | case FUNC_LT_TP_RELATIVE: | |
11207 | switch (r_type) | |
11208 | { | |
11209 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11210 | newr = BFD_RELOC_IA64_LTOFF_TPREL22; break; |
13ae64f3 | 11211 | default: |
0ca3e455 JB |
11212 | type = "LTOFF_TPREL"; break; |
11213 | } | |
11214 | break; | |
11215 | ||
11216 | case FUNC_DTP_MODULE: | |
11217 | switch (r_type) | |
11218 | { | |
11219 | case BFD_RELOC_IA64_DIR64MSB: | |
d3ce72d0 | 11220 | newr = BFD_RELOC_IA64_DTPMOD64MSB; break; |
0ca3e455 | 11221 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11222 | newr = BFD_RELOC_IA64_DTPMOD64LSB; break; |
0ca3e455 JB |
11223 | default: |
11224 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11225 | } |
11226 | break; | |
11227 | ||
11228 | case FUNC_LT_DTP_MODULE: | |
11229 | switch (r_type) | |
11230 | { | |
11231 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11232 | newr = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; |
13ae64f3 | 11233 | default: |
0ca3e455 | 11234 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11235 | } |
11236 | break; | |
11237 | ||
11238 | case FUNC_DTP_RELATIVE: | |
11239 | switch (r_type) | |
11240 | { | |
0ca3e455 | 11241 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11242 | newr = BFD_RELOC_IA64_DTPREL32MSB; break; |
0ca3e455 | 11243 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11244 | newr = BFD_RELOC_IA64_DTPREL32LSB; break; |
6174d9c8 | 11245 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11246 | newr = BFD_RELOC_IA64_DTPREL64MSB; break; |
6174d9c8 | 11247 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11248 | newr = BFD_RELOC_IA64_DTPREL64LSB; break; |
13ae64f3 | 11249 | case BFD_RELOC_IA64_IMM14: |
d3ce72d0 | 11250 | newr = BFD_RELOC_IA64_DTPREL14; break; |
13ae64f3 | 11251 | case BFD_RELOC_IA64_IMM22: |
d3ce72d0 | 11252 | newr = BFD_RELOC_IA64_DTPREL22; break; |
13ae64f3 | 11253 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11254 | newr = BFD_RELOC_IA64_DTPREL64I; break; |
13ae64f3 | 11255 | default: |
0ca3e455 | 11256 | type = "DTPREL"; break; |
13ae64f3 JJ |
11257 | } |
11258 | break; | |
11259 | ||
11260 | case FUNC_LT_DTP_RELATIVE: | |
11261 | switch (r_type) | |
11262 | { | |
11263 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11264 | newr = BFD_RELOC_IA64_LTOFF_DTPREL22; break; |
13ae64f3 | 11265 | default: |
0ca3e455 | 11266 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11267 | } |
11268 | break; | |
11269 | ||
40449e9f | 11270 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11271 | switch (r_type) |
11272 | { | |
11273 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11274 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11275 | default: type = "IPLT"; break; | |
11276 | } | |
40449e9f | 11277 | break; |
1cd8ff38 | 11278 | |
9d0e8497 TG |
11279 | #ifdef TE_VMS |
11280 | case FUNC_SLOTCOUNT_RELOC: | |
11281 | return DUMMY_RELOC_IA64_SLOTCOUNT; | |
11282 | #endif | |
11283 | ||
800eeca4 JW |
11284 | default: |
11285 | abort (); | |
11286 | } | |
6174d9c8 | 11287 | |
d3ce72d0 NC |
11288 | if (newr) |
11289 | return newr; | |
800eeca4 | 11290 | else |
0ca3e455 JB |
11291 | { |
11292 | int width; | |
11293 | ||
11294 | if (!type) | |
11295 | abort (); | |
11296 | switch (r_type) | |
11297 | { | |
11298 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11299 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11300 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11301 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11302 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11303 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11304 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11305 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11306 | default: abort (); | |
11307 | } | |
11308 | ||
11309 | /* This should be an error, but since previously there wasn't any | |
ad4b42b4 NC |
11310 | diagnostic here, don't make it fail because of this for now. */ |
11311 | as_warn (_("Cannot express %s%d%s relocation"), type, width, suffix); | |
0ca3e455 JB |
11312 | return r_type; |
11313 | } | |
800eeca4 JW |
11314 | } |
11315 | ||
11316 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11317 | functions. */ | |
11318 | void | |
5a49b8ac | 11319 | ia64_validate_fix (fixS *fix) |
800eeca4 JW |
11320 | { |
11321 | switch (fix->fx_r_type) | |
11322 | { | |
11323 | case BFD_RELOC_IA64_FPTR64I: | |
11324 | case BFD_RELOC_IA64_FPTR32MSB: | |
11325 | case BFD_RELOC_IA64_FPTR64LSB: | |
11326 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11327 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11328 | if (fix->fx_offset != 0) | |
11329 | as_bad_where (fix->fx_file, fix->fx_line, | |
ad4b42b4 | 11330 | _("No addend allowed in @fptr() relocation")); |
800eeca4 JW |
11331 | break; |
11332 | default: | |
11333 | break; | |
11334 | } | |
800eeca4 JW |
11335 | } |
11336 | ||
11337 | static void | |
5a49b8ac | 11338 | fix_insn (fixS *fix, const struct ia64_operand *odesc, valueT value) |
800eeca4 JW |
11339 | { |
11340 | bfd_vma insn[3], t0, t1, control_bits; | |
11341 | const char *err; | |
11342 | char *fixpos; | |
11343 | long slot; | |
11344 | ||
11345 | slot = fix->fx_where & 0x3; | |
11346 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11347 | ||
c67e42c9 | 11348 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11349 | t0 = bfd_getl64 (fixpos); |
11350 | t1 = bfd_getl64 (fixpos + 8); | |
11351 | control_bits = t0 & 0x1f; | |
11352 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11353 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11354 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11355 | ||
c67e42c9 RH |
11356 | err = NULL; |
11357 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11358 | { |
c67e42c9 RH |
11359 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11360 | insn[2] |= (((value & 0x7f) << 13) | |
11361 | | (((value >> 7) & 0x1ff) << 27) | |
11362 | | (((value >> 16) & 0x1f) << 22) | |
11363 | | (((value >> 21) & 0x1) << 21) | |
11364 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11365 | } |
c67e42c9 RH |
11366 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11367 | { | |
11368 | if (value & ~0x3fffffffffffffffULL) | |
20203fb9 | 11369 | err = _("integer operand out of range"); |
c67e42c9 RH |
11370 | insn[1] = (value >> 21) & 0x1ffffffffffLL; |
11371 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11372 | } | |
11373 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11374 | { | |
11375 | value >>= 4; | |
11376 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11377 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11378 | | (((value >> 0) & 0xfffff) << 13)); | |
11379 | } | |
11380 | else | |
11381 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11382 | ||
11383 | if (err) | |
83cf10fd | 11384 | as_bad_where (fix->fx_file, fix->fx_line, "%s", err); |
800eeca4 JW |
11385 | |
11386 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11387 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11388 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11389 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11390 | } |
11391 | ||
11392 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11393 | ignored; perhaps it was once meaningful, but now it is historical. | |
11394 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11395 | ||
11396 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11397 | (if possible). */ |
94f592af NC |
11398 | |
11399 | void | |
5a49b8ac | 11400 | md_apply_fix (fixS *fix, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
800eeca4 JW |
11401 | { |
11402 | char *fixpos; | |
40449e9f | 11403 | valueT value = *valP; |
800eeca4 JW |
11404 | |
11405 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11406 | ||
11407 | if (fix->fx_pcrel) | |
11408 | { | |
7b347e43 JB |
11409 | switch (fix->fx_r_type) |
11410 | { | |
11411 | case BFD_RELOC_IA64_PCREL21B: break; | |
11412 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11413 | case BFD_RELOC_IA64_PCREL21F: break; | |
11414 | case BFD_RELOC_IA64_PCREL21M: break; | |
11415 | case BFD_RELOC_IA64_PCREL60B: break; | |
11416 | case BFD_RELOC_IA64_PCREL22: break; | |
11417 | case BFD_RELOC_IA64_PCREL64I: break; | |
11418 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11419 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11420 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11421 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11422 | default: | |
11423 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11424 | fix->fx_r_type); | |
11425 | break; | |
11426 | } | |
800eeca4 JW |
11427 | } |
11428 | if (fix->fx_addsy) | |
11429 | { | |
592588f3 | 11430 | switch ((unsigned) fix->fx_r_type) |
800eeca4 | 11431 | { |
00f7efb6 | 11432 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11433 | /* This must be a TAG13 or TAG13b operand. There are no external |
11434 | relocs defined for them, so we must give an error. */ | |
800eeca4 | 11435 | as_bad_where (fix->fx_file, fix->fx_line, |
ad4b42b4 | 11436 | _("%s must have a constant value"), |
800eeca4 | 11437 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); |
fa1cb89c | 11438 | fix->fx_done = 1; |
94f592af | 11439 | return; |
00f7efb6 JJ |
11440 | |
11441 | case BFD_RELOC_IA64_TPREL14: | |
11442 | case BFD_RELOC_IA64_TPREL22: | |
11443 | case BFD_RELOC_IA64_TPREL64I: | |
11444 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11445 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11446 | case BFD_RELOC_IA64_DTPREL14: | |
11447 | case BFD_RELOC_IA64_DTPREL22: | |
11448 | case BFD_RELOC_IA64_DTPREL64I: | |
11449 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11450 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11451 | break; | |
7925dd68 | 11452 | |
9d0e8497 TG |
11453 | #ifdef TE_VMS |
11454 | case DUMMY_RELOC_IA64_SLOTCOUNT: | |
11455 | as_bad_where (fix->fx_file, fix->fx_line, | |
11456 | _("cannot resolve @slotcount parameter")); | |
11457 | fix->fx_done = 1; | |
11458 | return; | |
11459 | #endif | |
11460 | ||
7925dd68 JJ |
11461 | default: |
11462 | break; | |
800eeca4 | 11463 | } |
800eeca4 JW |
11464 | } |
11465 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11466 | { | |
9d0e8497 TG |
11467 | #ifdef TE_VMS |
11468 | if (fix->fx_r_type == DUMMY_RELOC_IA64_SLOTCOUNT) | |
11469 | { | |
11470 | /* For @slotcount, convert an addresses difference to a slots | |
11471 | difference. */ | |
11472 | valueT v; | |
11473 | ||
11474 | v = (value >> 4) * 3; | |
11475 | switch (value & 0x0f) | |
11476 | { | |
11477 | case 0: | |
11478 | case 1: | |
11479 | case 2: | |
11480 | v += value & 0x0f; | |
11481 | break; | |
11482 | case 0x0f: | |
11483 | v += 2; | |
11484 | break; | |
11485 | case 0x0e: | |
11486 | v += 1; | |
11487 | break; | |
11488 | default: | |
11489 | as_bad (_("invalid @slotcount value")); | |
11490 | } | |
11491 | value = v; | |
11492 | } | |
11493 | #endif | |
11494 | ||
800eeca4 JW |
11495 | if (fix->tc_fix_data.bigendian) |
11496 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11497 | else | |
11498 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11499 | fix->fx_done = 1; | |
800eeca4 JW |
11500 | } |
11501 | else | |
11502 | { | |
11503 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11504 | fix->fx_done = 1; | |
800eeca4 | 11505 | } |
800eeca4 JW |
11506 | } |
11507 | ||
11508 | /* Generate the BFD reloc to be stuck in the object file from the | |
11509 | fixup used internally in the assembler. */ | |
542d6675 KH |
11510 | |
11511 | arelent * | |
5a49b8ac | 11512 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp) |
800eeca4 JW |
11513 | { |
11514 | arelent *reloc; | |
11515 | ||
11516 | reloc = xmalloc (sizeof (*reloc)); | |
11517 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11518 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11519 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11520 | reloc->addend = fixp->fx_offset; | |
11521 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11522 | ||
11523 | if (!reloc->howto) | |
11524 | { | |
11525 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ad4b42b4 | 11526 | _("Cannot represent %s relocation in object file"), |
800eeca4 | 11527 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
cf738528 AS |
11528 | free (reloc); |
11529 | return NULL; | |
800eeca4 JW |
11530 | } |
11531 | return reloc; | |
11532 | } | |
11533 | ||
11534 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11535 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11536 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11537 | returned, or NULL on OK. */ |
11538 | ||
11539 | #define MAX_LITTLENUMS 5 | |
11540 | ||
542d6675 | 11541 | char * |
499ac353 | 11542 | md_atof (int type, char *lit, int *size) |
800eeca4 JW |
11543 | { |
11544 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11545 | char *t; |
11546 | int prec; | |
11547 | ||
11548 | switch (type) | |
11549 | { | |
11550 | /* IEEE floats */ | |
11551 | case 'f': | |
11552 | case 'F': | |
11553 | case 's': | |
11554 | case 'S': | |
11555 | prec = 2; | |
11556 | break; | |
11557 | ||
11558 | case 'd': | |
11559 | case 'D': | |
11560 | case 'r': | |
11561 | case 'R': | |
11562 | prec = 4; | |
11563 | break; | |
11564 | ||
11565 | case 'x': | |
11566 | case 'X': | |
11567 | case 'p': | |
11568 | case 'P': | |
11569 | prec = 5; | |
11570 | break; | |
11571 | ||
11572 | default: | |
11573 | *size = 0; | |
499ac353 | 11574 | return _("Unrecognized or unsupported floating point constant"); |
800eeca4 JW |
11575 | } |
11576 | t = atof_ieee (input_line_pointer, type, words); | |
11577 | if (t) | |
11578 | input_line_pointer = t; | |
800eeca4 | 11579 | |
10a98291 L |
11580 | (*ia64_float_to_chars) (lit, words, prec); |
11581 | ||
165a7f90 L |
11582 | if (type == 'X') |
11583 | { | |
11584 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11585 | memset (&lit [10], 0, 6); |
165a7f90 L |
11586 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11587 | } | |
10a98291 L |
11588 | else |
11589 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11590 | ||
499ac353 | 11591 | return NULL; |
800eeca4 JW |
11592 | } |
11593 | ||
800eeca4 JW |
11594 | /* Handle ia64 specific semantics of the align directive. */ |
11595 | ||
0a9ef439 | 11596 | void |
5a49b8ac AM |
11597 | ia64_md_do_align (int n ATTRIBUTE_UNUSED, |
11598 | const char *fill ATTRIBUTE_UNUSED, | |
11599 | int len ATTRIBUTE_UNUSED, | |
11600 | int max ATTRIBUTE_UNUSED) | |
800eeca4 | 11601 | { |
0a9ef439 | 11602 | if (subseg_text_p (now_seg)) |
800eeca4 | 11603 | ia64_flush_insns (); |
0a9ef439 | 11604 | } |
800eeca4 | 11605 | |
0a9ef439 RH |
11606 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11607 | of an rs_align_code fragment. */ | |
800eeca4 | 11608 | |
0a9ef439 | 11609 | void |
5a49b8ac | 11610 | ia64_handle_align (fragS *fragp) |
0a9ef439 | 11611 | { |
0a9ef439 RH |
11612 | int bytes; |
11613 | char *p; | |
91d6fa6a | 11614 | const unsigned char *nop_type; |
0a9ef439 RH |
11615 | |
11616 | if (fragp->fr_type != rs_align_code) | |
11617 | return; | |
11618 | ||
9545c4ce | 11619 | /* Check if this frag has to end with a stop bit. */ |
91d6fa6a | 11620 | nop_type = fragp->tc_frag_data ? le_nop_stop : le_nop; |
9545c4ce | 11621 | |
0a9ef439 RH |
11622 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11623 | p = fragp->fr_literal + fragp->fr_fix; | |
11624 | ||
d9201763 L |
11625 | /* If no paddings are needed, we check if we need a stop bit. */ |
11626 | if (!bytes && fragp->tc_frag_data) | |
11627 | { | |
11628 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11629 | #if 1 |
11630 | /* FIXME: It won't work with | |
11631 | .align 16 | |
11632 | alloc r32=ar.pfs,1,2,4,0 | |
11633 | */ | |
11634 | ; | |
11635 | #else | |
d9201763 L |
11636 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11637 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11638 | #endif |
d9201763 L |
11639 | else |
11640 | /* Bundles are always in little-endian byte order. Make sure | |
11641 | the previous bundle has the stop bit. */ | |
11642 | *(p - 16) |= 1; | |
11643 | } | |
11644 | ||
0a9ef439 RH |
11645 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11646 | putting data into a text section. */ | |
11647 | if (bytes & 15) | |
11648 | { | |
11649 | int fix = bytes & 15; | |
11650 | memset (p, 0, fix); | |
11651 | p += fix; | |
11652 | bytes -= fix; | |
11653 | fragp->fr_fix += fix; | |
800eeca4 JW |
11654 | } |
11655 | ||
012a452b | 11656 | /* Instruction bundles are always little-endian. */ |
91d6fa6a | 11657 | memcpy (p, nop_type, 16); |
0a9ef439 | 11658 | fragp->fr_var = 16; |
800eeca4 | 11659 | } |
10a98291 L |
11660 | |
11661 | static void | |
11662 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11663 | int prec) | |
11664 | { | |
11665 | while (prec--) | |
11666 | { | |
11667 | number_to_chars_bigendian (lit, (long) (*words++), | |
11668 | sizeof (LITTLENUM_TYPE)); | |
11669 | lit += sizeof (LITTLENUM_TYPE); | |
11670 | } | |
11671 | } | |
11672 | ||
11673 | static void | |
11674 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11675 | int prec) | |
11676 | { | |
11677 | while (prec--) | |
11678 | { | |
11679 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11680 | sizeof (LITTLENUM_TYPE)); | |
11681 | lit += sizeof (LITTLENUM_TYPE); | |
11682 | } | |
11683 | } | |
11684 | ||
11685 | void | |
5a49b8ac | 11686 | ia64_elf_section_change_hook (void) |
10a98291 | 11687 | { |
38ce5b11 L |
11688 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11689 | && elf_linked_to_section (now_seg) == NULL) | |
11690 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11691 | dot_byteorder (-1); |
11692 | } | |
a645d1eb L |
11693 | |
11694 | /* Check if a label should be made global. */ | |
11695 | void | |
11696 | ia64_check_label (symbolS *label) | |
11697 | { | |
11698 | if (*input_line_pointer == ':') | |
11699 | { | |
11700 | S_SET_EXTERNAL (label); | |
11701 | input_line_pointer++; | |
11702 | } | |
11703 | } | |
35f5df7f L |
11704 | |
11705 | /* Used to remember where .alias and .secalias directives are seen. We | |
11706 | will rename symbol and section names when we are about to output | |
11707 | the relocatable file. */ | |
11708 | struct alias | |
11709 | { | |
11710 | char *file; /* The file where the directive is seen. */ | |
11711 | unsigned int line; /* The line number the directive is at. */ | |
708587a4 | 11712 | const char *name; /* The original name of the symbol. */ |
35f5df7f L |
11713 | }; |
11714 | ||
11715 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11716 | .secalias. Otherwise, it is .alias. */ | |
11717 | static void | |
11718 | dot_alias (int section) | |
11719 | { | |
11720 | char *name, *alias; | |
11721 | char delim; | |
11722 | char *end_name; | |
11723 | int len; | |
11724 | const char *error_string; | |
11725 | struct alias *h; | |
11726 | const char *a; | |
11727 | struct hash_control *ahash, *nhash; | |
11728 | const char *kind; | |
11729 | ||
11730 | name = input_line_pointer; | |
11731 | delim = get_symbol_end (); | |
11732 | end_name = input_line_pointer; | |
11733 | *end_name = delim; | |
11734 | ||
11735 | if (name == end_name) | |
11736 | { | |
11737 | as_bad (_("expected symbol name")); | |
e4e8248d | 11738 | ignore_rest_of_line (); |
35f5df7f L |
11739 | return; |
11740 | } | |
11741 | ||
11742 | SKIP_WHITESPACE (); | |
11743 | ||
11744 | if (*input_line_pointer != ',') | |
11745 | { | |
11746 | *end_name = 0; | |
11747 | as_bad (_("expected comma after \"%s\""), name); | |
11748 | *end_name = delim; | |
11749 | ignore_rest_of_line (); | |
11750 | return; | |
11751 | } | |
11752 | ||
11753 | input_line_pointer++; | |
11754 | *end_name = 0; | |
20b36a95 | 11755 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11756 | |
11757 | /* We call demand_copy_C_string to check if alias string is valid. | |
11758 | There should be a closing `"' and no `\0' in the string. */ | |
11759 | alias = demand_copy_C_string (&len); | |
11760 | if (alias == NULL) | |
11761 | { | |
11762 | ignore_rest_of_line (); | |
11763 | return; | |
11764 | } | |
11765 | ||
11766 | /* Make a copy of name string. */ | |
11767 | len = strlen (name) + 1; | |
11768 | obstack_grow (¬es, name, len); | |
11769 | name = obstack_finish (¬es); | |
11770 | ||
11771 | if (section) | |
11772 | { | |
11773 | kind = "section"; | |
11774 | ahash = secalias_hash; | |
11775 | nhash = secalias_name_hash; | |
11776 | } | |
11777 | else | |
11778 | { | |
11779 | kind = "symbol"; | |
11780 | ahash = alias_hash; | |
11781 | nhash = alias_name_hash; | |
11782 | } | |
11783 | ||
11784 | /* Check if alias has been used before. */ | |
11785 | h = (struct alias *) hash_find (ahash, alias); | |
11786 | if (h) | |
11787 | { | |
11788 | if (strcmp (h->name, name)) | |
11789 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11790 | alias, kind, h->name); | |
11791 | goto out; | |
11792 | } | |
11793 | ||
11794 | /* Check if name already has an alias. */ | |
11795 | a = (const char *) hash_find (nhash, name); | |
11796 | if (a) | |
11797 | { | |
11798 | if (strcmp (a, alias)) | |
11799 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11800 | goto out; | |
11801 | } | |
11802 | ||
11803 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11804 | as_where (&h->file, &h->line); | |
11805 | h->name = name; | |
11806 | ||
5a49b8ac | 11807 | error_string = hash_jam (ahash, alias, (void *) h); |
35f5df7f L |
11808 | if (error_string) |
11809 | { | |
11810 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11811 | alias, kind, error_string); | |
11812 | goto out; | |
11813 | } | |
11814 | ||
5a49b8ac | 11815 | error_string = hash_jam (nhash, name, (void *) alias); |
35f5df7f L |
11816 | if (error_string) |
11817 | { | |
11818 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11819 | alias, kind, error_string); | |
11820 | out: | |
11821 | obstack_free (¬es, name); | |
11822 | obstack_free (¬es, alias); | |
11823 | } | |
11824 | ||
11825 | demand_empty_rest_of_line (); | |
11826 | } | |
11827 | ||
11828 | /* It renames the original symbol name to its alias. */ | |
11829 | static void | |
5a49b8ac | 11830 | do_alias (const char *alias, void *value) |
35f5df7f L |
11831 | { |
11832 | struct alias *h = (struct alias *) value; | |
11833 | symbolS *sym = symbol_find (h->name); | |
11834 | ||
11835 | if (sym == NULL) | |
01e1a5bc NC |
11836 | { |
11837 | #ifdef TE_VMS | |
11838 | /* Uses .alias extensively to alias CRTL functions to same with | |
11839 | decc$ prefix. Sometimes function gets optimized away and a | |
11840 | warning results, which should be suppressed. */ | |
11841 | if (strncmp (alias, "decc$", 5) != 0) | |
11842 | #endif | |
11843 | as_warn_where (h->file, h->line, | |
11844 | _("symbol `%s' aliased to `%s' is not used"), | |
11845 | h->name, alias); | |
11846 | } | |
35f5df7f L |
11847 | else |
11848 | S_SET_NAME (sym, (char *) alias); | |
11849 | } | |
11850 | ||
11851 | /* Called from write_object_file. */ | |
11852 | void | |
11853 | ia64_adjust_symtab (void) | |
11854 | { | |
11855 | hash_traverse (alias_hash, do_alias); | |
11856 | } | |
11857 | ||
11858 | /* It renames the original section name to its alias. */ | |
11859 | static void | |
5a49b8ac | 11860 | do_secalias (const char *alias, void *value) |
35f5df7f L |
11861 | { |
11862 | struct alias *h = (struct alias *) value; | |
11863 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11864 | ||
11865 | if (sec == NULL) | |
11866 | as_warn_where (h->file, h->line, | |
11867 | _("section `%s' aliased to `%s' is not used"), | |
11868 | h->name, alias); | |
11869 | else | |
11870 | sec->name = alias; | |
11871 | } | |
11872 | ||
11873 | /* Called from write_object_file. */ | |
11874 | void | |
11875 | ia64_frob_file (void) | |
11876 | { | |
11877 | hash_traverse (secalias_hash, do_secalias); | |
11878 | } | |
01e1a5bc NC |
11879 | |
11880 | #ifdef TE_VMS | |
11881 | #define NT_VMS_MHD 1 | |
11882 | #define NT_VMS_LNM 2 | |
11883 | ||
11884 | /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF | |
11885 | .note section. */ | |
11886 | ||
11887 | /* Manufacture a VMS-like time string. */ | |
11888 | static void | |
11889 | get_vms_time (char *Now) | |
11890 | { | |
11891 | char *pnt; | |
11892 | time_t timeb; | |
11893 | ||
11894 | time (&timeb); | |
11895 | pnt = ctime (&timeb); | |
11896 | pnt[3] = 0; | |
11897 | pnt[7] = 0; | |
11898 | pnt[10] = 0; | |
11899 | pnt[16] = 0; | |
11900 | pnt[24] = 0; | |
11901 | sprintf (Now, "%2s-%3s-%s %s", pnt + 8, pnt + 4, pnt + 20, pnt + 11); | |
11902 | } | |
11903 | ||
11904 | void | |
11905 | ia64_vms_note (void) | |
11906 | { | |
11907 | char *p; | |
11908 | asection *seg = now_seg; | |
11909 | subsegT subseg = now_subseg; | |
01e1a5bc | 11910 | asection *secp = NULL; |
a0840211 | 11911 | char *bname; |
01e1a5bc NC |
11912 | char buf [256]; |
11913 | symbolS *sym; | |
11914 | ||
11915 | /* Create the .note section. */ | |
11916 | ||
11917 | secp = subseg_new (".note", 0); | |
11918 | bfd_set_section_flags (stdoutput, | |
11919 | secp, | |
11920 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11921 | ||
37a1f277 | 11922 | /* Module header note (MHD). */ |
a0840211 | 11923 | bname = xstrdup (lbasename (out_file_name)); |
01e1a5bc NC |
11924 | if ((p = strrchr (bname, '.'))) |
11925 | *p = '\0'; | |
37a1f277 TG |
11926 | |
11927 | /* VMS note header is 24 bytes long. */ | |
11928 | p = frag_more (8 + 8 + 8); | |
11929 | number_to_chars_littleendian (p + 0, 8, 8); | |
11930 | number_to_chars_littleendian (p + 8, 40 + strlen (bname), 8); | |
11931 | number_to_chars_littleendian (p + 16, NT_VMS_MHD, 8); | |
01e1a5bc NC |
11932 | |
11933 | p = frag_more (8); | |
11934 | strcpy (p, "IPF/VMS"); | |
11935 | ||
37a1f277 TG |
11936 | p = frag_more (17 + 17 + strlen (bname) + 1 + 5); |
11937 | get_vms_time (p); | |
11938 | strcpy (p + 17, "24-FEB-2005 15:00"); | |
11939 | p += 17 + 17; | |
01e1a5bc | 11940 | strcpy (p, bname); |
37a1f277 | 11941 | p += strlen (bname) + 1; |
a0840211 | 11942 | free (bname); |
01e1a5bc NC |
11943 | strcpy (p, "V1.0"); |
11944 | ||
11945 | frag_align (3, 0, 0); | |
11946 | ||
11947 | /* Language processor name note. */ | |
11948 | sprintf (buf, "GNU assembler version %s (%s) using BFD version %s", | |
11949 | VERSION, TARGET_ALIAS, BFD_VERSION_STRING); | |
11950 | ||
37a1f277 TG |
11951 | p = frag_more (8 + 8 + 8); |
11952 | number_to_chars_littleendian (p + 0, 8, 8); | |
11953 | number_to_chars_littleendian (p + 8, strlen (buf) + 1, 8); | |
11954 | number_to_chars_littleendian (p + 16, NT_VMS_LNM, 8); | |
01e1a5bc NC |
11955 | |
11956 | p = frag_more (8); | |
11957 | strcpy (p, "IPF/VMS"); | |
11958 | ||
11959 | p = frag_more (strlen (buf) + 1); | |
11960 | strcpy (p, buf); | |
11961 | ||
11962 | frag_align (3, 0, 0); | |
11963 | ||
11964 | secp = subseg_new (".vms_display_name_info", 0); | |
11965 | bfd_set_section_flags (stdoutput, | |
11966 | secp, | |
11967 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11968 | ||
11969 | /* This symbol should be passed on the command line and be variable | |
11970 | according to language. */ | |
11971 | sym = symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl", | |
11972 | absolute_section, 0, &zero_address_frag); | |
11973 | symbol_table_insert (sym); | |
11974 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING | BSF_DYNAMIC; | |
11975 | ||
11976 | p = frag_more (4); | |
11977 | /* Format 3 of VMS demangler Spec. */ | |
11978 | number_to_chars_littleendian (p, 3, 4); | |
11979 | ||
11980 | p = frag_more (4); | |
11981 | /* Place holder for symbol table index of above symbol. */ | |
11982 | number_to_chars_littleendian (p, -1, 4); | |
11983 | ||
11984 | frag_align (3, 0, 0); | |
11985 | ||
11986 | /* We probably can't restore the current segment, for there likely | |
11987 | isn't one yet... */ | |
11988 | if (seg && subseg) | |
11989 | subseg_set (seg, subseg); | |
11990 | } | |
11991 | ||
11992 | #endif /* TE_VMS */ |