Commit | Line | Data |
---|---|---|
800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
744b6414 | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 |
d6afba4b | 3 | Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
a66d2bb7 JB |
54 | #ifdef HAVE_LIMITS_H |
55 | #include <limits.h> | |
56 | #endif | |
57 | ||
800eeca4 | 58 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
59 | |
60 | /* Some systems define MIN in, e.g., param.h. */ | |
61 | #undef MIN | |
800eeca4 JW |
62 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
63 | ||
64 | #define NUM_SLOTS 4 | |
65 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
66 | #define CURR_SLOT md.slot[md.curr_slot] | |
67 | ||
68 | #define O_pseudo_fixup (O_max + 1) | |
69 | ||
70 | enum special_section | |
71 | { | |
557debba | 72 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
73 | SPECIAL_SECTION_BSS = 0, |
74 | SPECIAL_SECTION_SBSS, | |
75 | SPECIAL_SECTION_SDATA, | |
76 | SPECIAL_SECTION_RODATA, | |
77 | SPECIAL_SECTION_COMMENT, | |
78 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
79 | SPECIAL_SECTION_UNWIND_INFO, |
80 | /* HPUX specific section pseudo-ops. */ | |
81 | SPECIAL_SECTION_INIT_ARRAY, | |
82 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
83 | }; |
84 | ||
85 | enum reloc_func | |
86 | { | |
13ae64f3 JJ |
87 | FUNC_DTP_MODULE, |
88 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
89 | FUNC_FPTR_RELATIVE, |
90 | FUNC_GP_RELATIVE, | |
91 | FUNC_LT_RELATIVE, | |
fa2c7eff | 92 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 93 | FUNC_PC_RELATIVE, |
800eeca4 JW |
94 | FUNC_PLT_RELATIVE, |
95 | FUNC_SEC_RELATIVE, | |
96 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 97 | FUNC_TP_RELATIVE, |
800eeca4 JW |
98 | FUNC_LTV_RELATIVE, |
99 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
100 | FUNC_LT_DTP_MODULE, |
101 | FUNC_LT_DTP_RELATIVE, | |
102 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 103 | FUNC_IPLT_RELOC, |
800eeca4 JW |
104 | }; |
105 | ||
106 | enum reg_symbol | |
107 | { | |
108 | REG_GR = 0, | |
109 | REG_FR = (REG_GR + 128), | |
110 | REG_AR = (REG_FR + 128), | |
111 | REG_CR = (REG_AR + 128), | |
112 | REG_P = (REG_CR + 128), | |
113 | REG_BR = (REG_P + 64), | |
114 | REG_IP = (REG_BR + 8), | |
115 | REG_CFM, | |
116 | REG_PR, | |
117 | REG_PR_ROT, | |
118 | REG_PSR, | |
119 | REG_PSR_L, | |
120 | REG_PSR_UM, | |
121 | /* The following are pseudo-registers for use by gas only. */ | |
122 | IND_CPUID, | |
123 | IND_DBR, | |
124 | IND_DTR, | |
125 | IND_ITR, | |
126 | IND_IBR, | |
127 | IND_MEM, | |
128 | IND_MSR, | |
129 | IND_PKR, | |
130 | IND_PMC, | |
131 | IND_PMD, | |
132 | IND_RR, | |
542d6675 | 133 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
134 | REG_PSP, |
135 | REG_PRIUNAT, | |
800eeca4 JW |
136 | REG_NUM |
137 | }; | |
138 | ||
139 | enum dynreg_type | |
140 | { | |
141 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
142 | DYNREG_FR, /* dynamic floating point register */ | |
143 | DYNREG_PR, /* dynamic predicate register */ | |
144 | DYNREG_NUM_TYPES | |
145 | }; | |
146 | ||
87f8eb97 JW |
147 | enum operand_match_result |
148 | { | |
149 | OPERAND_MATCH, | |
150 | OPERAND_OUT_OF_RANGE, | |
151 | OPERAND_MISMATCH | |
152 | }; | |
153 | ||
800eeca4 JW |
154 | /* On the ia64, we can't know the address of a text label until the |
155 | instructions are packed into a bundle. To handle this, we keep | |
156 | track of the list of labels that appear in front of each | |
157 | instruction. */ | |
158 | struct label_fix | |
542d6675 KH |
159 | { |
160 | struct label_fix *next; | |
161 | struct symbol *sym; | |
162 | }; | |
800eeca4 | 163 | |
549f748d | 164 | /* This is the endianness of the current section. */ |
800eeca4 JW |
165 | extern int target_big_endian; |
166 | ||
549f748d JW |
167 | /* This is the default endianness. */ |
168 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
169 | ||
10a98291 L |
170 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
171 | ||
172 | static void ia64_float_to_chars_bigendian | |
173 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
174 | static void ia64_float_to_chars_littleendian | |
175 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
176 | static void (*ia64_float_to_chars) | |
177 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
178 | ||
35f5df7f L |
179 | static struct hash_control *alias_hash; |
180 | static struct hash_control *alias_name_hash; | |
181 | static struct hash_control *secalias_hash; | |
182 | static struct hash_control *secalias_name_hash; | |
183 | ||
2fac3d48 JB |
184 | /* List of chars besides those in app.c:symbol_chars that can start an |
185 | operand. Used to prevent the scrubber eating vital white-space. */ | |
186 | const char ia64_symbol_chars[] = "@?"; | |
187 | ||
800eeca4 JW |
188 | /* Characters which always start a comment. */ |
189 | const char comment_chars[] = ""; | |
190 | ||
191 | /* Characters which start a comment at the beginning of a line. */ | |
192 | const char line_comment_chars[] = "#"; | |
193 | ||
194 | /* Characters which may be used to separate multiple commands on a | |
195 | single line. */ | |
196 | const char line_separator_chars[] = ";"; | |
197 | ||
198 | /* Characters which are used to indicate an exponent in a floating | |
199 | point number. */ | |
200 | const char EXP_CHARS[] = "eE"; | |
201 | ||
202 | /* Characters which mean that a number is a floating point constant, | |
203 | as in 0d1.0. */ | |
204 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
205 | ||
542d6675 | 206 | /* ia64-specific option processing: */ |
800eeca4 | 207 | |
44f5c83a | 208 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
209 | |
210 | struct option md_longopts[] = | |
211 | { | |
c43c2cc5 JW |
212 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
213 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
214 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
215 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
216 | }; |
217 | ||
218 | size_t md_longopts_size = sizeof (md_longopts); | |
219 | ||
220 | static struct | |
221 | { | |
222 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
223 | struct hash_control *reg_hash; /* register name hash table */ | |
224 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
225 | struct hash_control *const_hash; /* constant hash table */ | |
226 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
227 | ||
228 | symbolS *regsym[REG_NUM]; | |
229 | ||
230 | /* If X_op is != O_absent, the registername for the instruction's | |
231 | qualifying predicate. If NULL, p0 is assumed for instructions | |
232 | that are predicatable. */ | |
233 | expressionS qp; | |
234 | ||
8c2fda1d L |
235 | /* Optimize for which CPU. */ |
236 | enum | |
237 | { | |
238 | itanium1, | |
239 | itanium2 | |
240 | } tune; | |
241 | ||
91d777ee L |
242 | /* What to do when hint.b is used. */ |
243 | enum | |
244 | { | |
245 | hint_b_error, | |
246 | hint_b_warning, | |
247 | hint_b_ok | |
248 | } hint_b; | |
249 | ||
800eeca4 | 250 | unsigned int |
197865e8 | 251 | manual_bundling : 1, |
800eeca4 JW |
252 | debug_dv: 1, |
253 | detect_dv: 1, | |
254 | explicit_mode : 1, /* which mode we're in */ | |
255 | default_explicit_mode : 1, /* which mode is the default */ | |
256 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
257 | auto_align : 1, |
258 | keep_pending_output : 1; | |
800eeca4 | 259 | |
970d6792 L |
260 | /* What to do when something is wrong with unwind directives. */ |
261 | enum | |
262 | { | |
263 | unwind_check_warning, | |
264 | unwind_check_error | |
265 | } unwind_check; | |
266 | ||
800eeca4 JW |
267 | /* Each bundle consists of up to three instructions. We keep |
268 | track of four most recent instructions so we can correctly set | |
197865e8 | 269 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
270 | int curr_slot; |
271 | int num_slots_in_use; | |
272 | struct slot | |
273 | { | |
274 | unsigned int | |
275 | end_of_insn_group : 1, | |
276 | manual_bundling_on : 1, | |
196e8040 JW |
277 | manual_bundling_off : 1, |
278 | loc_directive_seen : 1; | |
800eeca4 JW |
279 | signed char user_template; /* user-selected template, if any */ |
280 | unsigned char qp_regno; /* qualifying predicate */ | |
281 | /* This duplicates a good fraction of "struct fix" but we | |
282 | can't use a "struct fix" instead since we can't call | |
283 | fix_new_exp() until we know the address of the instruction. */ | |
284 | int num_fixups; | |
285 | struct insn_fix | |
286 | { | |
287 | bfd_reloc_code_real_type code; | |
288 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
289 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
290 | expressionS expr; /* the value to be inserted */ | |
291 | } | |
292 | fixup[2]; /* at most two fixups per insn */ | |
293 | struct ia64_opcode *idesc; | |
294 | struct label_fix *label_fixups; | |
f1bcba5b | 295 | struct label_fix *tag_fixups; |
800eeca4 JW |
296 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
297 | expressionS opnd[6]; | |
298 | char *src_file; | |
299 | unsigned int src_line; | |
300 | struct dwarf2_line_info debug_line; | |
301 | } | |
302 | slot[NUM_SLOTS]; | |
303 | ||
304 | segT last_text_seg; | |
305 | ||
306 | struct dynreg | |
307 | { | |
308 | struct dynreg *next; /* next dynamic register */ | |
309 | const char *name; | |
310 | unsigned short base; /* the base register number */ | |
311 | unsigned short num_regs; /* # of registers in this set */ | |
312 | } | |
313 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
314 | ||
315 | flagword flags; /* ELF-header flags */ | |
316 | ||
317 | struct mem_offset { | |
318 | unsigned hint:1; /* is this hint currently valid? */ | |
319 | bfd_vma offset; /* mem.offset offset */ | |
320 | bfd_vma base; /* mem.offset base */ | |
321 | } mem_offset; | |
322 | ||
323 | int path; /* number of alt. entry points seen */ | |
324 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 325 | the current DV-checking block. */ |
800eeca4 | 326 | int maxpaths; /* size currently allocated for |
542d6675 | 327 | entry_labels */ |
557debba JW |
328 | |
329 | int pointer_size; /* size in bytes of a pointer */ | |
330 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
331 | } |
332 | md; | |
333 | ||
f6fe78d6 JW |
334 | /* These are not const, because they are modified to MMI for non-itanium1 |
335 | targets below. */ | |
336 | /* MFI bundle of nops. */ | |
337 | static unsigned char le_nop[16] = | |
338 | { | |
339 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
340 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
341 | }; | |
342 | /* MFI bundle of nops with stop-bit. */ | |
343 | static unsigned char le_nop_stop[16] = | |
344 | { | |
345 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
346 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
347 | }; | |
348 | ||
542d6675 | 349 | /* application registers: */ |
800eeca4 | 350 | |
e0c9811a JW |
351 | #define AR_K0 0 |
352 | #define AR_K7 7 | |
353 | #define AR_RSC 16 | |
354 | #define AR_BSP 17 | |
355 | #define AR_BSPSTORE 18 | |
356 | #define AR_RNAT 19 | |
357 | #define AR_UNAT 36 | |
358 | #define AR_FPSR 40 | |
359 | #define AR_ITC 44 | |
360 | #define AR_PFS 64 | |
361 | #define AR_LC 65 | |
800eeca4 JW |
362 | |
363 | static const struct | |
364 | { | |
365 | const char *name; | |
366 | int regnum; | |
367 | } | |
368 | ar[] = | |
369 | { | |
370 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
371 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
372 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
373 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
374 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
375 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
376 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
377 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
378 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
379 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
380 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 381 | {"ar.ec", 66}, |
800eeca4 JW |
382 | }; |
383 | ||
384 | #define CR_IPSR 16 | |
385 | #define CR_ISR 17 | |
386 | #define CR_IIP 19 | |
387 | #define CR_IFA 20 | |
388 | #define CR_ITIR 21 | |
389 | #define CR_IIPA 22 | |
390 | #define CR_IFS 23 | |
391 | #define CR_IIM 24 | |
392 | #define CR_IHA 25 | |
393 | #define CR_IVR 65 | |
394 | #define CR_TPR 66 | |
395 | #define CR_EOI 67 | |
396 | #define CR_IRR0 68 | |
397 | #define CR_IRR3 71 | |
398 | #define CR_LRR0 80 | |
399 | #define CR_LRR1 81 | |
400 | ||
542d6675 | 401 | /* control registers: */ |
800eeca4 JW |
402 | static const struct |
403 | { | |
404 | const char *name; | |
405 | int regnum; | |
406 | } | |
407 | cr[] = | |
408 | { | |
409 | {"cr.dcr", 0}, | |
410 | {"cr.itm", 1}, | |
411 | {"cr.iva", 2}, | |
412 | {"cr.pta", 8}, | |
413 | {"cr.gpta", 9}, | |
414 | {"cr.ipsr", 16}, | |
415 | {"cr.isr", 17}, | |
416 | {"cr.iip", 19}, | |
417 | {"cr.ifa", 20}, | |
418 | {"cr.itir", 21}, | |
419 | {"cr.iipa", 22}, | |
420 | {"cr.ifs", 23}, | |
421 | {"cr.iim", 24}, | |
422 | {"cr.iha", 25}, | |
423 | {"cr.lid", 64}, | |
424 | {"cr.ivr", 65}, | |
425 | {"cr.tpr", 66}, | |
426 | {"cr.eoi", 67}, | |
427 | {"cr.irr0", 68}, | |
428 | {"cr.irr1", 69}, | |
429 | {"cr.irr2", 70}, | |
430 | {"cr.irr3", 71}, | |
431 | {"cr.itv", 72}, | |
432 | {"cr.pmv", 73}, | |
433 | {"cr.cmcv", 74}, | |
434 | {"cr.lrr0", 80}, | |
435 | {"cr.lrr1", 81} | |
436 | }; | |
437 | ||
438 | #define PSR_MFL 4 | |
439 | #define PSR_IC 13 | |
440 | #define PSR_DFL 18 | |
441 | #define PSR_CPL 32 | |
442 | ||
443 | static const struct const_desc | |
444 | { | |
445 | const char *name; | |
446 | valueT value; | |
447 | } | |
448 | const_bits[] = | |
449 | { | |
542d6675 | 450 | /* PSR constant masks: */ |
800eeca4 JW |
451 | |
452 | /* 0: reserved */ | |
453 | {"psr.be", ((valueT) 1) << 1}, | |
454 | {"psr.up", ((valueT) 1) << 2}, | |
455 | {"psr.ac", ((valueT) 1) << 3}, | |
456 | {"psr.mfl", ((valueT) 1) << 4}, | |
457 | {"psr.mfh", ((valueT) 1) << 5}, | |
458 | /* 6-12: reserved */ | |
459 | {"psr.ic", ((valueT) 1) << 13}, | |
460 | {"psr.i", ((valueT) 1) << 14}, | |
461 | {"psr.pk", ((valueT) 1) << 15}, | |
462 | /* 16: reserved */ | |
463 | {"psr.dt", ((valueT) 1) << 17}, | |
464 | {"psr.dfl", ((valueT) 1) << 18}, | |
465 | {"psr.dfh", ((valueT) 1) << 19}, | |
466 | {"psr.sp", ((valueT) 1) << 20}, | |
467 | {"psr.pp", ((valueT) 1) << 21}, | |
468 | {"psr.di", ((valueT) 1) << 22}, | |
469 | {"psr.si", ((valueT) 1) << 23}, | |
470 | {"psr.db", ((valueT) 1) << 24}, | |
471 | {"psr.lp", ((valueT) 1) << 25}, | |
472 | {"psr.tb", ((valueT) 1) << 26}, | |
473 | {"psr.rt", ((valueT) 1) << 27}, | |
474 | /* 28-31: reserved */ | |
475 | /* 32-33: cpl (current privilege level) */ | |
476 | {"psr.is", ((valueT) 1) << 34}, | |
477 | {"psr.mc", ((valueT) 1) << 35}, | |
478 | {"psr.it", ((valueT) 1) << 36}, | |
479 | {"psr.id", ((valueT) 1) << 37}, | |
480 | {"psr.da", ((valueT) 1) << 38}, | |
481 | {"psr.dd", ((valueT) 1) << 39}, | |
482 | {"psr.ss", ((valueT) 1) << 40}, | |
483 | /* 41-42: ri (restart instruction) */ | |
484 | {"psr.ed", ((valueT) 1) << 43}, | |
485 | {"psr.bn", ((valueT) 1) << 44}, | |
486 | }; | |
487 | ||
542d6675 | 488 | /* indirect register-sets/memory: */ |
800eeca4 JW |
489 | |
490 | static const struct | |
491 | { | |
492 | const char *name; | |
493 | int regnum; | |
494 | } | |
495 | indirect_reg[] = | |
496 | { | |
497 | { "CPUID", IND_CPUID }, | |
498 | { "cpuid", IND_CPUID }, | |
499 | { "dbr", IND_DBR }, | |
500 | { "dtr", IND_DTR }, | |
501 | { "itr", IND_ITR }, | |
502 | { "ibr", IND_IBR }, | |
503 | { "msr", IND_MSR }, | |
504 | { "pkr", IND_PKR }, | |
505 | { "pmc", IND_PMC }, | |
506 | { "pmd", IND_PMD }, | |
507 | { "rr", IND_RR }, | |
508 | }; | |
509 | ||
510 | /* Pseudo functions used to indicate relocation types (these functions | |
511 | start with an at sign (@). */ | |
512 | static struct | |
513 | { | |
514 | const char *name; | |
515 | enum pseudo_type | |
516 | { | |
517 | PSEUDO_FUNC_NONE, | |
518 | PSEUDO_FUNC_RELOC, | |
519 | PSEUDO_FUNC_CONST, | |
e0c9811a | 520 | PSEUDO_FUNC_REG, |
800eeca4 JW |
521 | PSEUDO_FUNC_FLOAT |
522 | } | |
523 | type; | |
524 | union | |
525 | { | |
526 | unsigned long ival; | |
527 | symbolS *sym; | |
528 | } | |
529 | u; | |
530 | } | |
531 | pseudo_func[] = | |
532 | { | |
542d6675 | 533 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
534 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
535 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
536 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
537 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
538 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 539 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
540 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
541 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
542 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
543 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 544 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 545 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
546 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
547 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
548 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
549 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 550 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 551 | |
542d6675 | 552 | /* mbtype4 constants: */ |
800eeca4 JW |
553 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
554 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
555 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
556 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
557 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
558 | ||
542d6675 | 559 | /* fclass constants: */ |
bf3ca999 | 560 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
561 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
562 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
563 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
564 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
565 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
566 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
567 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
568 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
569 | |
570 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 571 | |
c10d9d8f JW |
572 | /* hint constants: */ |
573 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
574 | ||
542d6675 | 575 | /* unwind-related constants: */ |
041340ad JW |
576 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
577 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
578 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
579 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
580 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
581 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
582 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 583 | |
542d6675 | 584 | /* unwind-related registers: */ |
e0c9811a | 585 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
586 | }; |
587 | ||
542d6675 | 588 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
589 | static const bfd_vma nop[IA64_NUM_UNITS] = |
590 | { | |
591 | 0x0000000000LL, /* NIL => break 0 */ | |
592 | 0x0008000000LL, /* I-unit nop */ | |
593 | 0x0008000000LL, /* M-unit nop */ | |
594 | 0x4000000000LL, /* B-unit nop */ | |
595 | 0x0008000000LL, /* F-unit nop */ | |
596 | 0x0008000000LL, /* L-"unit" nop */ | |
597 | 0x0008000000LL, /* X-unit nop */ | |
598 | }; | |
599 | ||
600 | /* Can't be `const' as it's passed to input routines (which have the | |
601 | habit of setting temporary sentinels. */ | |
602 | static char special_section_name[][20] = | |
603 | { | |
604 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
605 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
606 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
607 | }; |
608 | ||
609 | /* The best template for a particular sequence of up to three | |
610 | instructions: */ | |
611 | #define N IA64_NUM_TYPES | |
612 | static unsigned char best_template[N][N][N]; | |
613 | #undef N | |
614 | ||
615 | /* Resource dependencies currently in effect */ | |
616 | static struct rsrc { | |
617 | int depind; /* dependency index */ | |
618 | const struct ia64_dependency *dependency; /* actual dependency */ | |
619 | unsigned specific:1, /* is this a specific bit/regno? */ | |
620 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
621 | int index; /* specific regno/bit within dependency */ | |
622 | int note; /* optional qualifying note (0 if none) */ | |
623 | #define STATE_NONE 0 | |
624 | #define STATE_STOP 1 | |
625 | #define STATE_SRLZ 2 | |
626 | int insn_srlz; /* current insn serialization state */ | |
627 | int data_srlz; /* current data serialization state */ | |
628 | int qp_regno; /* qualifying predicate for this usage */ | |
629 | char *file; /* what file marked this dependency */ | |
2434f565 | 630 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 631 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 632 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
633 | int path; /* corresponding code entry index */ |
634 | } *regdeps = NULL; | |
635 | static int regdepslen = 0; | |
636 | static int regdepstotlen = 0; | |
637 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
638 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 639 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 640 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
641 | |
642 | /* Current state of PR mutexation */ | |
643 | static struct qpmutex { | |
644 | valueT prmask; | |
645 | int path; | |
646 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
647 | static int qp_mutexeslen = 0; | |
648 | static int qp_mutexestotlen = 0; | |
197865e8 | 649 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
650 | |
651 | /* Current state of PR implications */ | |
652 | static struct qp_imply { | |
653 | unsigned p1:6; | |
654 | unsigned p2:6; | |
655 | unsigned p2_branched:1; | |
656 | int path; | |
657 | } *qp_implies = NULL; | |
658 | static int qp_implieslen = 0; | |
659 | static int qp_impliestotlen = 0; | |
660 | ||
197865e8 KH |
661 | /* Keep track of static GR values so that indirect register usage can |
662 | sometimes be tracked. */ | |
800eeca4 JW |
663 | static struct gr { |
664 | unsigned known:1; | |
665 | int path; | |
666 | valueT value; | |
a66d2bb7 JB |
667 | } gr_values[128] = { |
668 | { | |
669 | 1, | |
670 | #ifdef INT_MAX | |
671 | INT_MAX, | |
672 | #else | |
673 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
674 | #endif | |
675 | 0 | |
676 | } | |
677 | }; | |
800eeca4 | 678 | |
9545c4ce L |
679 | /* Remember the alignment frag. */ |
680 | static fragS *align_frag; | |
681 | ||
800eeca4 JW |
682 | /* These are the routines required to output the various types of |
683 | unwind records. */ | |
684 | ||
f5a30c2e JW |
685 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
686 | frag address here so that if there is a section switch in the middle of | |
687 | a function, then instructions emitted to a different section are not | |
688 | counted. Since there may be more than one frag for a function, this | |
689 | means we also need to keep track of which frag this address belongs to | |
690 | so we can compute inter-frag distances. This also nicely solves the | |
691 | problem with nops emitted for align directives, which can't easily be | |
692 | counted, but can easily be derived from frag sizes. */ | |
693 | ||
800eeca4 JW |
694 | typedef struct unw_rec_list { |
695 | unwind_record r; | |
e0c9811a | 696 | unsigned long slot_number; |
f5a30c2e | 697 | fragS *slot_frag; |
800eeca4 JW |
698 | struct unw_rec_list *next; |
699 | } unw_rec_list; | |
700 | ||
2434f565 | 701 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 702 | |
6290819d NC |
703 | /* Linked list of saved prologue counts. A very poor |
704 | implementation of a map from label numbers to prologue counts. */ | |
705 | typedef struct label_prologue_count | |
706 | { | |
707 | struct label_prologue_count *next; | |
708 | unsigned long label_number; | |
709 | unsigned int prologue_count; | |
710 | } label_prologue_count; | |
711 | ||
e0c9811a JW |
712 | static struct |
713 | { | |
e0c9811a JW |
714 | /* Maintain a list of unwind entries for the current function. */ |
715 | unw_rec_list *list; | |
716 | unw_rec_list *tail; | |
800eeca4 | 717 | |
e0c9811a JW |
718 | /* Any unwind entires that should be attached to the current slot |
719 | that an insn is being constructed for. */ | |
720 | unw_rec_list *current_entry; | |
800eeca4 | 721 | |
e0c9811a JW |
722 | /* These are used to create the unwind table entry for this function. */ |
723 | symbolS *proc_start; | |
e0c9811a JW |
724 | symbolS *info; /* pointer to unwind info */ |
725 | symbolS *personality_routine; | |
91a2ae2a RH |
726 | segT saved_text_seg; |
727 | subsegT saved_text_subseg; | |
728 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 729 | |
e0c9811a | 730 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
731 | unsigned int prologue : 1; |
732 | unsigned int prologue_mask : 4; | |
733 | unsigned int body : 1; | |
734 | unsigned int insn : 1; | |
33d01f33 | 735 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
736 | /* Prologue counts at previous .label_state directives. */ |
737 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 738 | } unwind; |
800eeca4 | 739 | |
9f9a069e JW |
740 | /* The input value is a negated offset from psp, and specifies an address |
741 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
742 | must add 16 and divide by 4 to get the encoded value. */ | |
743 | ||
744 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
745 | ||
800eeca4 JW |
746 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
747 | ||
0234cb7c | 748 | /* Forward declarations: */ |
800eeca4 JW |
749 | static void set_section PARAMS ((char *name)); |
750 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
751 | unsigned int, unsigned int)); | |
d9201763 | 752 | static void dot_align (int); |
800eeca4 JW |
753 | static void dot_radix PARAMS ((int)); |
754 | static void dot_special_section PARAMS ((int)); | |
755 | static void dot_proc PARAMS ((int)); | |
756 | static void dot_fframe PARAMS ((int)); | |
757 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
758 | static void dot_vframesp PARAMS ((int)); |
759 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
760 | static void dot_save PARAMS ((int)); |
761 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
762 | static void dot_restorereg PARAMS ((int)); |
763 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
764 | static void dot_handlerdata PARAMS ((int)); |
765 | static void dot_unwentry PARAMS ((int)); | |
766 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 767 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
768 | static void dot_saveg PARAMS ((int)); |
769 | static void dot_savef PARAMS ((int)); | |
770 | static void dot_saveb PARAMS ((int)); | |
771 | static void dot_savegf PARAMS ((int)); | |
772 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
773 | static void dot_spillreg PARAMS ((int)); |
774 | static void dot_spillmem PARAMS ((int)); | |
775 | static void dot_spillreg_p PARAMS ((int)); | |
776 | static void dot_spillmem_p PARAMS ((int)); | |
777 | static void dot_label_state PARAMS ((int)); | |
778 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
779 | static void dot_unwabi PARAMS ((int)); |
780 | static void dot_personality PARAMS ((int)); | |
781 | static void dot_body PARAMS ((int)); | |
782 | static void dot_prologue PARAMS ((int)); | |
783 | static void dot_endp PARAMS ((int)); | |
784 | static void dot_template PARAMS ((int)); | |
785 | static void dot_regstk PARAMS ((int)); | |
786 | static void dot_rot PARAMS ((int)); | |
787 | static void dot_byteorder PARAMS ((int)); | |
788 | static void dot_psr PARAMS ((int)); | |
789 | static void dot_alias PARAMS ((int)); | |
790 | static void dot_ln PARAMS ((int)); | |
ef6a2b41 | 791 | static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua)); |
800eeca4 JW |
792 | static void dot_xdata PARAMS ((int)); |
793 | static void stmt_float_cons PARAMS ((int)); | |
794 | static void stmt_cons_ua PARAMS ((int)); | |
795 | static void dot_xfloat_cons PARAMS ((int)); | |
796 | static void dot_xstringer PARAMS ((int)); | |
797 | static void dot_xdata_ua PARAMS ((int)); | |
798 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 799 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
800 | static void dot_pred_rel PARAMS ((int)); |
801 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 802 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
803 | static void dot_dv_mode PARAMS ((int)); |
804 | static void dot_entry PARAMS ((int)); | |
805 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 806 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 807 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
808 | static void declare_register_set PARAMS ((const char *, int, int)); |
809 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
810 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
811 | int index, | |
812 | expressionS *e)); | |
800eeca4 JW |
813 | static int parse_operand PARAMS ((expressionS *e)); |
814 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
815 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); | |
816 | static void emit_one_bundle PARAMS ((void)); | |
817 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 818 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
819 | bfd_reloc_code_real_type r_type)); |
820 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
821 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
822 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
823 | static void add_qp_mutex PARAMS((valueT mask)); |
824 | static void add_qp_imply PARAMS((int p1, int p2)); | |
825 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
826 | static void clear_qp_mutex PARAMS((valueT mask)); | |
827 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 828 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
829 | static void clear_register_values PARAMS ((void)); |
830 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
831 | static void instruction_serialization PARAMS ((void)); |
832 | static void data_serialization PARAMS ((void)); | |
833 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 834 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 835 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 836 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
837 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
838 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
839 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
840 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
841 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
842 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
843 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
844 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
845 | static int qp_mutex PARAMS ((int, int, int)); |
846 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
847 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
848 | static void count_output PARAMS ((int, char *, char *)); | |
849 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
850 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 851 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
852 | static void output_P1_format PARAMS ((vbyte_func, int)); |
853 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
854 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
855 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
856 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
857 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
858 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
859 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
860 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
861 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
862 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
863 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
864 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
865 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
866 | static char format_ab_reg PARAMS ((int, int)); |
867 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
868 | unsigned long)); | |
869 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
870 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
871 | unsigned long)); | |
872 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 873 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
874 | static unw_rec_list *output_prologue PARAMS ((void)); |
875 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
876 | static unw_rec_list *output_body PARAMS ((void)); | |
877 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
878 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
879 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
881 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
882 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
883 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
884 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
885 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
886 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
887 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
888 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
889 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
890 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
891 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
892 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
893 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
894 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
895 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
896 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
897 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
898 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
899 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
900 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
901 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
902 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
903 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
904 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
905 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
906 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
907 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
908 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
909 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
910 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
911 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
912 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
913 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
914 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
915 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
916 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
917 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
918 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
919 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
920 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
921 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
922 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
923 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
924 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
925 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
926 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
927 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
928 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
929 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
930 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
931 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
932 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
933 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
934 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
935 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
936 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
937 | unsigned int)); | |
938 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
939 | unsigned int)); | |
940 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
941 | unsigned int)); | |
942 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
943 | unsigned int, unsigned int)); | |
944 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
945 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
946 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
947 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 948 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
949 | unsigned long, fragS *, |
950 | int)); | |
91a2ae2a | 951 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 952 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
150f24a2 JW |
953 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
954 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
6290819d NC |
955 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
956 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
957 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 958 | |
652ca075 | 959 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
960 | unit (as opposed to the memory unit). */ |
961 | static int | |
652ca075 | 962 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
963 | { |
964 | reg -= REG_AR; | |
652ca075 L |
965 | return reg >= 64 && reg <= 111; |
966 | } | |
800eeca4 | 967 | |
652ca075 L |
968 | /* Determine if application register REGNUM resides only in the memory |
969 | unit (as opposed to the integer unit). */ | |
970 | static int | |
971 | ar_is_only_in_memory_unit (int reg) | |
972 | { | |
973 | reg -= REG_AR; | |
974 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
975 | } |
976 | ||
977 | /* Switch to section NAME and create section if necessary. It's | |
978 | rather ugly that we have to manipulate input_line_pointer but I | |
979 | don't see any other way to accomplish the same thing without | |
980 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
981 | static void | |
982 | set_section (name) | |
983 | char *name; | |
984 | { | |
985 | char *saved_input_line_pointer; | |
986 | ||
987 | saved_input_line_pointer = input_line_pointer; | |
988 | input_line_pointer = name; | |
989 | obj_elf_section (0); | |
990 | input_line_pointer = saved_input_line_pointer; | |
991 | } | |
992 | ||
d61a78a7 RH |
993 | /* Map 's' to SHF_IA_64_SHORT. */ |
994 | ||
995 | int | |
996 | ia64_elf_section_letter (letter, ptr_msg) | |
997 | int letter; | |
998 | char **ptr_msg; | |
999 | { | |
1000 | if (letter == 's') | |
1001 | return SHF_IA_64_SHORT; | |
711ef82f L |
1002 | else if (letter == 'o') |
1003 | return SHF_LINK_ORDER; | |
d61a78a7 | 1004 | |
711ef82f L |
1005 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
1006 | return -1; | |
d61a78a7 RH |
1007 | } |
1008 | ||
800eeca4 JW |
1009 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
1010 | ||
1011 | flagword | |
1012 | ia64_elf_section_flags (flags, attr, type) | |
1013 | flagword flags; | |
2434f565 | 1014 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
1015 | { |
1016 | if (attr & SHF_IA_64_SHORT) | |
1017 | flags |= SEC_SMALL_DATA; | |
1018 | return flags; | |
1019 | } | |
1020 | ||
91a2ae2a RH |
1021 | int |
1022 | ia64_elf_section_type (str, len) | |
40449e9f KH |
1023 | const char *str; |
1024 | size_t len; | |
91a2ae2a | 1025 | { |
1cd8ff38 | 1026 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1027 | |
1cd8ff38 | 1028 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1029 | return SHT_PROGBITS; |
1030 | ||
1cd8ff38 | 1031 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1032 | return SHT_PROGBITS; |
1033 | ||
1cd8ff38 | 1034 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1035 | return SHT_IA_64_UNWIND; |
1036 | ||
1cd8ff38 | 1037 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1038 | return SHT_IA_64_UNWIND; |
1039 | ||
711ef82f L |
1040 | if (STREQ ("unwind")) |
1041 | return SHT_IA_64_UNWIND; | |
1042 | ||
91a2ae2a | 1043 | return -1; |
1cd8ff38 | 1044 | #undef STREQ |
91a2ae2a RH |
1045 | } |
1046 | ||
800eeca4 JW |
1047 | static unsigned int |
1048 | set_regstack (ins, locs, outs, rots) | |
1049 | unsigned int ins, locs, outs, rots; | |
1050 | { | |
542d6675 KH |
1051 | /* Size of frame. */ |
1052 | unsigned int sof; | |
800eeca4 JW |
1053 | |
1054 | sof = ins + locs + outs; | |
1055 | if (sof > 96) | |
1056 | { | |
1057 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1058 | return 0; | |
1059 | } | |
1060 | if (rots > sof) | |
1061 | { | |
1062 | as_warn ("Size of rotating registers exceeds frame size"); | |
1063 | return 0; | |
1064 | } | |
1065 | md.in.base = REG_GR + 32; | |
1066 | md.loc.base = md.in.base + ins; | |
1067 | md.out.base = md.loc.base + locs; | |
1068 | ||
1069 | md.in.num_regs = ins; | |
1070 | md.loc.num_regs = locs; | |
1071 | md.out.num_regs = outs; | |
1072 | md.rot.num_regs = rots; | |
1073 | return sof; | |
1074 | } | |
1075 | ||
1076 | void | |
1077 | ia64_flush_insns () | |
1078 | { | |
1079 | struct label_fix *lfix; | |
1080 | segT saved_seg; | |
1081 | subsegT saved_subseg; | |
b44b1b85 | 1082 | unw_rec_list *ptr; |
800eeca4 JW |
1083 | |
1084 | if (!md.last_text_seg) | |
1085 | return; | |
1086 | ||
1087 | saved_seg = now_seg; | |
1088 | saved_subseg = now_subseg; | |
1089 | ||
1090 | subseg_set (md.last_text_seg, 0); | |
1091 | ||
1092 | while (md.num_slots_in_use > 0) | |
1093 | emit_one_bundle (); /* force out queued instructions */ | |
1094 | ||
1095 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1096 | those now: */ |
800eeca4 JW |
1097 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1098 | { | |
1099 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1100 | symbol_set_frag (lfix->sym, frag_now); | |
1101 | } | |
1102 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1103 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1104 | { | |
1105 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1106 | symbol_set_frag (lfix->sym, frag_now); | |
1107 | } | |
1108 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1109 | |
b44b1b85 | 1110 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1111 | resolve those now. We only handle prologue, body, and endp directives |
1112 | here. Give an error for others. */ | |
b44b1b85 JW |
1113 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1114 | { | |
9c59842f | 1115 | switch (ptr->r.type) |
b44b1b85 | 1116 | { |
9c59842f JW |
1117 | case prologue: |
1118 | case prologue_gr: | |
1119 | case body: | |
1120 | case endp: | |
b44b1b85 JW |
1121 | ptr->slot_number = (unsigned long) frag_more (0); |
1122 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1123 | break; |
1124 | ||
1125 | /* Allow any record which doesn't have a "t" field (i.e., | |
1126 | doesn't relate to a particular instruction). */ | |
1127 | case unwabi: | |
1128 | case br_gr: | |
1129 | case copy_state: | |
1130 | case fr_mem: | |
1131 | case frgr_mem: | |
1132 | case gr_gr: | |
1133 | case gr_mem: | |
1134 | case label_state: | |
1135 | case rp_br: | |
1136 | case spill_base: | |
1137 | case spill_mask: | |
1138 | /* nothing */ | |
1139 | break; | |
1140 | ||
1141 | default: | |
1142 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1143 | break; | |
b44b1b85 | 1144 | } |
b44b1b85 JW |
1145 | } |
1146 | unwind.current_entry = NULL; | |
1147 | ||
800eeca4 | 1148 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1149 | |
1150 | if (md.qp.X_op == O_register) | |
1151 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1152 | } |
1153 | ||
d9201763 L |
1154 | static void |
1155 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1156 | { |
1157 | char *saved_input_line_pointer = input_line_pointer; | |
1158 | ||
1159 | input_line_pointer = ""; | |
1160 | s_align_bytes (nbytes); | |
1161 | input_line_pointer = saved_input_line_pointer; | |
1162 | } | |
1163 | ||
1164 | void | |
1165 | ia64_cons_align (nbytes) | |
1166 | int nbytes; | |
1167 | { | |
1168 | if (md.auto_align) | |
1169 | { | |
1170 | char *saved_input_line_pointer = input_line_pointer; | |
1171 | input_line_pointer = ""; | |
1172 | s_align_bytes (nbytes); | |
1173 | input_line_pointer = saved_input_line_pointer; | |
1174 | } | |
1175 | } | |
1176 | ||
1177 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1178 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1179 | |
197865e8 | 1180 | void |
800eeca4 JW |
1181 | output_vbyte_mem (count, ptr, comment) |
1182 | int count; | |
1183 | char *ptr; | |
2434f565 | 1184 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1185 | { |
1186 | int x; | |
1187 | if (vbyte_mem_ptr == NULL) | |
1188 | abort (); | |
1189 | ||
1190 | if (count == 0) | |
1191 | return; | |
1192 | for (x = 0; x < count; x++) | |
1193 | *(vbyte_mem_ptr++) = ptr[x]; | |
1194 | } | |
1195 | ||
1196 | /* Count the number of bytes required for records. */ | |
1197 | static int vbyte_count = 0; | |
197865e8 | 1198 | void |
800eeca4 JW |
1199 | count_output (count, ptr, comment) |
1200 | int count; | |
2434f565 JW |
1201 | char *ptr ATTRIBUTE_UNUSED; |
1202 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1203 | { |
1204 | vbyte_count += count; | |
1205 | } | |
1206 | ||
1207 | static void | |
1208 | output_R1_format (f, rtype, rlen) | |
1209 | vbyte_func f; | |
1210 | unw_record_type rtype; | |
1211 | int rlen; | |
1212 | { | |
e0c9811a | 1213 | int r = 0; |
800eeca4 JW |
1214 | char byte; |
1215 | if (rlen > 0x1f) | |
1216 | { | |
1217 | output_R3_format (f, rtype, rlen); | |
1218 | return; | |
1219 | } | |
197865e8 | 1220 | |
e0c9811a JW |
1221 | if (rtype == body) |
1222 | r = 1; | |
1223 | else if (rtype != prologue) | |
1224 | as_bad ("record type is not valid"); | |
1225 | ||
800eeca4 JW |
1226 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1227 | (*f) (1, &byte, NULL); | |
1228 | } | |
1229 | ||
1230 | static void | |
1231 | output_R2_format (f, mask, grsave, rlen) | |
1232 | vbyte_func f; | |
1233 | int mask, grsave; | |
1234 | unsigned long rlen; | |
1235 | { | |
1236 | char bytes[20]; | |
1237 | int count = 2; | |
1238 | mask = (mask & 0x0f); | |
1239 | grsave = (grsave & 0x7f); | |
1240 | ||
1241 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1242 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1243 | count += output_leb128 (bytes + 2, rlen, 0); | |
1244 | (*f) (count, bytes, NULL); | |
1245 | } | |
1246 | ||
1247 | static void | |
1248 | output_R3_format (f, rtype, rlen) | |
1249 | vbyte_func f; | |
1250 | unw_record_type rtype; | |
1251 | unsigned long rlen; | |
1252 | { | |
e0c9811a | 1253 | int r = 0, count; |
800eeca4 JW |
1254 | char bytes[20]; |
1255 | if (rlen <= 0x1f) | |
1256 | { | |
1257 | output_R1_format (f, rtype, rlen); | |
1258 | return; | |
1259 | } | |
197865e8 | 1260 | |
e0c9811a JW |
1261 | if (rtype == body) |
1262 | r = 1; | |
1263 | else if (rtype != prologue) | |
1264 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1265 | bytes[0] = (UNW_R3 | r); |
1266 | count = output_leb128 (bytes + 1, rlen, 0); | |
1267 | (*f) (count + 1, bytes, NULL); | |
1268 | } | |
1269 | ||
1270 | static void | |
1271 | output_P1_format (f, brmask) | |
1272 | vbyte_func f; | |
1273 | int brmask; | |
1274 | { | |
1275 | char byte; | |
1276 | byte = UNW_P1 | (brmask & 0x1f); | |
1277 | (*f) (1, &byte, NULL); | |
1278 | } | |
1279 | ||
1280 | static void | |
1281 | output_P2_format (f, brmask, gr) | |
1282 | vbyte_func f; | |
1283 | int brmask; | |
1284 | int gr; | |
1285 | { | |
1286 | char bytes[2]; | |
1287 | brmask = (brmask & 0x1f); | |
1288 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1289 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1290 | (*f) (2, bytes, NULL); | |
1291 | } | |
1292 | ||
1293 | static void | |
1294 | output_P3_format (f, rtype, reg) | |
1295 | vbyte_func f; | |
1296 | unw_record_type rtype; | |
1297 | int reg; | |
1298 | { | |
1299 | char bytes[2]; | |
e0c9811a | 1300 | int r = 0; |
800eeca4 JW |
1301 | reg = (reg & 0x7f); |
1302 | switch (rtype) | |
542d6675 | 1303 | { |
800eeca4 JW |
1304 | case psp_gr: |
1305 | r = 0; | |
1306 | break; | |
1307 | case rp_gr: | |
1308 | r = 1; | |
1309 | break; | |
1310 | case pfs_gr: | |
1311 | r = 2; | |
1312 | break; | |
1313 | case preds_gr: | |
1314 | r = 3; | |
1315 | break; | |
1316 | case unat_gr: | |
1317 | r = 4; | |
1318 | break; | |
1319 | case lc_gr: | |
1320 | r = 5; | |
1321 | break; | |
1322 | case rp_br: | |
1323 | r = 6; | |
1324 | break; | |
1325 | case rnat_gr: | |
1326 | r = 7; | |
1327 | break; | |
1328 | case bsp_gr: | |
1329 | r = 8; | |
1330 | break; | |
1331 | case bspstore_gr: | |
1332 | r = 9; | |
1333 | break; | |
1334 | case fpsr_gr: | |
1335 | r = 10; | |
1336 | break; | |
1337 | case priunat_gr: | |
1338 | r = 11; | |
1339 | break; | |
1340 | default: | |
1341 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1342 | } |
800eeca4 JW |
1343 | bytes[0] = (UNW_P3 | (r >> 1)); |
1344 | bytes[1] = (((r & 1) << 7) | reg); | |
1345 | (*f) (2, bytes, NULL); | |
1346 | } | |
1347 | ||
800eeca4 | 1348 | static void |
e0c9811a | 1349 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1350 | vbyte_func f; |
e0c9811a JW |
1351 | unsigned char *imask; |
1352 | unsigned long imask_size; | |
800eeca4 | 1353 | { |
e0c9811a | 1354 | imask[0] = UNW_P4; |
2132e3a3 | 1355 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1356 | } |
1357 | ||
1358 | static void | |
1359 | output_P5_format (f, grmask, frmask) | |
1360 | vbyte_func f; | |
1361 | int grmask; | |
1362 | unsigned long frmask; | |
1363 | { | |
1364 | char bytes[4]; | |
1365 | grmask = (grmask & 0x0f); | |
1366 | ||
1367 | bytes[0] = UNW_P5; | |
1368 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1369 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1370 | bytes[3] = (frmask & 0x000000ff); | |
1371 | (*f) (4, bytes, NULL); | |
1372 | } | |
1373 | ||
1374 | static void | |
1375 | output_P6_format (f, rtype, rmask) | |
1376 | vbyte_func f; | |
1377 | unw_record_type rtype; | |
1378 | int rmask; | |
1379 | { | |
1380 | char byte; | |
e0c9811a | 1381 | int r = 0; |
197865e8 | 1382 | |
e0c9811a JW |
1383 | if (rtype == gr_mem) |
1384 | r = 1; | |
1385 | else if (rtype != fr_mem) | |
1386 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1387 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1388 | (*f) (1, &byte, NULL); | |
1389 | } | |
1390 | ||
1391 | static void | |
1392 | output_P7_format (f, rtype, w1, w2) | |
1393 | vbyte_func f; | |
1394 | unw_record_type rtype; | |
1395 | unsigned long w1; | |
1396 | unsigned long w2; | |
1397 | { | |
1398 | char bytes[20]; | |
1399 | int count = 1; | |
e0c9811a | 1400 | int r = 0; |
800eeca4 JW |
1401 | count += output_leb128 (bytes + 1, w1, 0); |
1402 | switch (rtype) | |
1403 | { | |
542d6675 KH |
1404 | case mem_stack_f: |
1405 | r = 0; | |
1406 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1407 | break; | |
1408 | case mem_stack_v: | |
1409 | r = 1; | |
1410 | break; | |
1411 | case spill_base: | |
1412 | r = 2; | |
1413 | break; | |
1414 | case psp_sprel: | |
1415 | r = 3; | |
1416 | break; | |
1417 | case rp_when: | |
1418 | r = 4; | |
1419 | break; | |
1420 | case rp_psprel: | |
1421 | r = 5; | |
1422 | break; | |
1423 | case pfs_when: | |
1424 | r = 6; | |
1425 | break; | |
1426 | case pfs_psprel: | |
1427 | r = 7; | |
1428 | break; | |
1429 | case preds_when: | |
1430 | r = 8; | |
1431 | break; | |
1432 | case preds_psprel: | |
1433 | r = 9; | |
1434 | break; | |
1435 | case lc_when: | |
1436 | r = 10; | |
1437 | break; | |
1438 | case lc_psprel: | |
1439 | r = 11; | |
1440 | break; | |
1441 | case unat_when: | |
1442 | r = 12; | |
1443 | break; | |
1444 | case unat_psprel: | |
1445 | r = 13; | |
1446 | break; | |
1447 | case fpsr_when: | |
1448 | r = 14; | |
1449 | break; | |
1450 | case fpsr_psprel: | |
1451 | r = 15; | |
1452 | break; | |
1453 | default: | |
1454 | break; | |
800eeca4 JW |
1455 | } |
1456 | bytes[0] = (UNW_P7 | r); | |
1457 | (*f) (count, bytes, NULL); | |
1458 | } | |
1459 | ||
1460 | static void | |
1461 | output_P8_format (f, rtype, t) | |
1462 | vbyte_func f; | |
1463 | unw_record_type rtype; | |
1464 | unsigned long t; | |
1465 | { | |
1466 | char bytes[20]; | |
e0c9811a | 1467 | int r = 0; |
800eeca4 JW |
1468 | int count = 2; |
1469 | bytes[0] = UNW_P8; | |
1470 | switch (rtype) | |
1471 | { | |
542d6675 KH |
1472 | case rp_sprel: |
1473 | r = 1; | |
1474 | break; | |
1475 | case pfs_sprel: | |
1476 | r = 2; | |
1477 | break; | |
1478 | case preds_sprel: | |
1479 | r = 3; | |
1480 | break; | |
1481 | case lc_sprel: | |
1482 | r = 4; | |
1483 | break; | |
1484 | case unat_sprel: | |
1485 | r = 5; | |
1486 | break; | |
1487 | case fpsr_sprel: | |
1488 | r = 6; | |
1489 | break; | |
1490 | case bsp_when: | |
1491 | r = 7; | |
1492 | break; | |
1493 | case bsp_psprel: | |
1494 | r = 8; | |
1495 | break; | |
1496 | case bsp_sprel: | |
1497 | r = 9; | |
1498 | break; | |
1499 | case bspstore_when: | |
1500 | r = 10; | |
1501 | break; | |
1502 | case bspstore_psprel: | |
1503 | r = 11; | |
1504 | break; | |
1505 | case bspstore_sprel: | |
1506 | r = 12; | |
1507 | break; | |
1508 | case rnat_when: | |
1509 | r = 13; | |
1510 | break; | |
1511 | case rnat_psprel: | |
1512 | r = 14; | |
1513 | break; | |
1514 | case rnat_sprel: | |
1515 | r = 15; | |
1516 | break; | |
1517 | case priunat_when_gr: | |
1518 | r = 16; | |
1519 | break; | |
1520 | case priunat_psprel: | |
1521 | r = 17; | |
1522 | break; | |
1523 | case priunat_sprel: | |
1524 | r = 18; | |
1525 | break; | |
1526 | case priunat_when_mem: | |
1527 | r = 19; | |
1528 | break; | |
1529 | default: | |
1530 | break; | |
800eeca4 JW |
1531 | } |
1532 | bytes[1] = r; | |
1533 | count += output_leb128 (bytes + 2, t, 0); | |
1534 | (*f) (count, bytes, NULL); | |
1535 | } | |
1536 | ||
1537 | static void | |
1538 | output_P9_format (f, grmask, gr) | |
1539 | vbyte_func f; | |
1540 | int grmask; | |
1541 | int gr; | |
1542 | { | |
1543 | char bytes[3]; | |
1544 | bytes[0] = UNW_P9; | |
1545 | bytes[1] = (grmask & 0x0f); | |
1546 | bytes[2] = (gr & 0x7f); | |
1547 | (*f) (3, bytes, NULL); | |
1548 | } | |
1549 | ||
1550 | static void | |
1551 | output_P10_format (f, abi, context) | |
1552 | vbyte_func f; | |
1553 | int abi; | |
1554 | int context; | |
1555 | { | |
1556 | char bytes[3]; | |
1557 | bytes[0] = UNW_P10; | |
1558 | bytes[1] = (abi & 0xff); | |
1559 | bytes[2] = (context & 0xff); | |
1560 | (*f) (3, bytes, NULL); | |
1561 | } | |
1562 | ||
1563 | static void | |
1564 | output_B1_format (f, rtype, label) | |
1565 | vbyte_func f; | |
1566 | unw_record_type rtype; | |
1567 | unsigned long label; | |
1568 | { | |
1569 | char byte; | |
e0c9811a | 1570 | int r = 0; |
197865e8 | 1571 | if (label > 0x1f) |
800eeca4 JW |
1572 | { |
1573 | output_B4_format (f, rtype, label); | |
1574 | return; | |
1575 | } | |
e0c9811a JW |
1576 | if (rtype == copy_state) |
1577 | r = 1; | |
1578 | else if (rtype != label_state) | |
1579 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1580 | |
1581 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1582 | (*f) (1, &byte, NULL); | |
1583 | } | |
1584 | ||
1585 | static void | |
1586 | output_B2_format (f, ecount, t) | |
1587 | vbyte_func f; | |
1588 | unsigned long ecount; | |
1589 | unsigned long t; | |
1590 | { | |
1591 | char bytes[20]; | |
1592 | int count = 1; | |
1593 | if (ecount > 0x1f) | |
1594 | { | |
1595 | output_B3_format (f, ecount, t); | |
1596 | return; | |
1597 | } | |
1598 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1599 | count += output_leb128 (bytes + 1, t, 0); | |
1600 | (*f) (count, bytes, NULL); | |
1601 | } | |
1602 | ||
1603 | static void | |
1604 | output_B3_format (f, ecount, t) | |
1605 | vbyte_func f; | |
1606 | unsigned long ecount; | |
1607 | unsigned long t; | |
1608 | { | |
1609 | char bytes[20]; | |
1610 | int count = 1; | |
1611 | if (ecount <= 0x1f) | |
1612 | { | |
1613 | output_B2_format (f, ecount, t); | |
1614 | return; | |
1615 | } | |
1616 | bytes[0] = UNW_B3; | |
1617 | count += output_leb128 (bytes + 1, t, 0); | |
1618 | count += output_leb128 (bytes + count, ecount, 0); | |
1619 | (*f) (count, bytes, NULL); | |
1620 | } | |
1621 | ||
1622 | static void | |
1623 | output_B4_format (f, rtype, label) | |
1624 | vbyte_func f; | |
1625 | unw_record_type rtype; | |
1626 | unsigned long label; | |
1627 | { | |
1628 | char bytes[20]; | |
e0c9811a | 1629 | int r = 0; |
800eeca4 | 1630 | int count = 1; |
197865e8 | 1631 | if (label <= 0x1f) |
800eeca4 JW |
1632 | { |
1633 | output_B1_format (f, rtype, label); | |
1634 | return; | |
1635 | } | |
197865e8 | 1636 | |
e0c9811a JW |
1637 | if (rtype == copy_state) |
1638 | r = 1; | |
1639 | else if (rtype != label_state) | |
1640 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1641 | |
1642 | bytes[0] = (UNW_B4 | (r << 3)); | |
1643 | count += output_leb128 (bytes + 1, label, 0); | |
1644 | (*f) (count, bytes, NULL); | |
1645 | } | |
1646 | ||
1647 | static char | |
e0c9811a | 1648 | format_ab_reg (ab, reg) |
542d6675 KH |
1649 | int ab; |
1650 | int reg; | |
800eeca4 JW |
1651 | { |
1652 | int ret; | |
e0c9811a | 1653 | ab = (ab & 3); |
800eeca4 | 1654 | reg = (reg & 0x1f); |
e0c9811a | 1655 | ret = (ab << 5) | reg; |
800eeca4 JW |
1656 | return ret; |
1657 | } | |
1658 | ||
1659 | static void | |
e0c9811a | 1660 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1661 | vbyte_func f; |
1662 | unw_record_type rtype; | |
e0c9811a | 1663 | int ab, reg; |
800eeca4 JW |
1664 | unsigned long t; |
1665 | unsigned long w1; | |
1666 | { | |
1667 | char bytes[20]; | |
e0c9811a | 1668 | int r = 0; |
800eeca4 JW |
1669 | int count = 2; |
1670 | bytes[0] = UNW_X1; | |
197865e8 | 1671 | |
e0c9811a JW |
1672 | if (rtype == spill_sprel) |
1673 | r = 1; | |
1674 | else if (rtype != spill_psprel) | |
1675 | as_bad ("Invalid record type for format X1"); | |
1676 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1677 | count += output_leb128 (bytes + 2, t, 0); |
1678 | count += output_leb128 (bytes + count, w1, 0); | |
1679 | (*f) (count, bytes, NULL); | |
1680 | } | |
1681 | ||
1682 | static void | |
e0c9811a | 1683 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1684 | vbyte_func f; |
e0c9811a | 1685 | int ab, reg; |
800eeca4 JW |
1686 | int x, y, treg; |
1687 | unsigned long t; | |
1688 | { | |
1689 | char bytes[20]; | |
800eeca4 JW |
1690 | int count = 3; |
1691 | bytes[0] = UNW_X2; | |
e0c9811a | 1692 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1693 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1694 | count += output_leb128 (bytes + 3, t, 0); | |
1695 | (*f) (count, bytes, NULL); | |
1696 | } | |
1697 | ||
1698 | static void | |
e0c9811a | 1699 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1700 | vbyte_func f; |
1701 | unw_record_type rtype; | |
1702 | int qp; | |
e0c9811a | 1703 | int ab, reg; |
800eeca4 JW |
1704 | unsigned long t; |
1705 | unsigned long w1; | |
1706 | { | |
1707 | char bytes[20]; | |
e0c9811a | 1708 | int r = 0; |
800eeca4 | 1709 | int count = 3; |
e0c9811a JW |
1710 | bytes[0] = UNW_X3; |
1711 | ||
1712 | if (rtype == spill_sprel_p) | |
1713 | r = 1; | |
1714 | else if (rtype != spill_psprel_p) | |
1715 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1716 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1717 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1718 | count += output_leb128 (bytes + 3, t, 0); |
1719 | count += output_leb128 (bytes + count, w1, 0); | |
1720 | (*f) (count, bytes, NULL); | |
1721 | } | |
1722 | ||
1723 | static void | |
e0c9811a | 1724 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1725 | vbyte_func f; |
1726 | int qp; | |
e0c9811a | 1727 | int ab, reg; |
800eeca4 JW |
1728 | int x, y, treg; |
1729 | unsigned long t; | |
1730 | { | |
1731 | char bytes[20]; | |
800eeca4 | 1732 | int count = 4; |
e0c9811a | 1733 | bytes[0] = UNW_X4; |
800eeca4 | 1734 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1735 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1736 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1737 | count += output_leb128 (bytes + 4, t, 0); | |
1738 | (*f) (count, bytes, NULL); | |
1739 | } | |
1740 | ||
1741 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1742 | |
800eeca4 | 1743 | static unw_rec_list * |
197865e8 | 1744 | alloc_record (unw_record_type t) |
800eeca4 JW |
1745 | { |
1746 | unw_rec_list *ptr; | |
1747 | ptr = xmalloc (sizeof (*ptr)); | |
1748 | ptr->next = NULL; | |
1749 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1750 | ptr->r.type = t; | |
1751 | return ptr; | |
1752 | } | |
1753 | ||
5738bc24 JW |
1754 | /* Dummy unwind record used for calculating the length of the last prologue or |
1755 | body region. */ | |
1756 | ||
1757 | static unw_rec_list * | |
1758 | output_endp () | |
1759 | { | |
1760 | unw_rec_list *ptr = alloc_record (endp); | |
1761 | return ptr; | |
1762 | } | |
1763 | ||
800eeca4 JW |
1764 | static unw_rec_list * |
1765 | output_prologue () | |
1766 | { | |
1767 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1768 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1769 | return ptr; |
1770 | } | |
1771 | ||
1772 | static unw_rec_list * | |
1773 | output_prologue_gr (saved_mask, reg) | |
1774 | unsigned int saved_mask; | |
1775 | unsigned int reg; | |
1776 | { | |
1777 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1778 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1779 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1780 | ptr->r.record.r.grsave = reg; |
1781 | return ptr; | |
1782 | } | |
1783 | ||
1784 | static unw_rec_list * | |
1785 | output_body () | |
1786 | { | |
1787 | unw_rec_list *ptr = alloc_record (body); | |
1788 | return ptr; | |
1789 | } | |
1790 | ||
1791 | static unw_rec_list * | |
1792 | output_mem_stack_f (size) | |
1793 | unsigned int size; | |
1794 | { | |
1795 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1796 | ptr->r.record.p.size = size; | |
1797 | return ptr; | |
1798 | } | |
1799 | ||
1800 | static unw_rec_list * | |
1801 | output_mem_stack_v () | |
1802 | { | |
1803 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1804 | return ptr; | |
1805 | } | |
1806 | ||
1807 | static unw_rec_list * | |
1808 | output_psp_gr (gr) | |
1809 | unsigned int gr; | |
1810 | { | |
1811 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1812 | ptr->r.record.p.gr = gr; | |
1813 | return ptr; | |
1814 | } | |
1815 | ||
1816 | static unw_rec_list * | |
1817 | output_psp_sprel (offset) | |
1818 | unsigned int offset; | |
1819 | { | |
1820 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1821 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1822 | return ptr; |
1823 | } | |
1824 | ||
1825 | static unw_rec_list * | |
1826 | output_rp_when () | |
1827 | { | |
1828 | unw_rec_list *ptr = alloc_record (rp_when); | |
1829 | return ptr; | |
1830 | } | |
1831 | ||
1832 | static unw_rec_list * | |
1833 | output_rp_gr (gr) | |
1834 | unsigned int gr; | |
1835 | { | |
1836 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1837 | ptr->r.record.p.gr = gr; | |
1838 | return ptr; | |
1839 | } | |
1840 | ||
1841 | static unw_rec_list * | |
1842 | output_rp_br (br) | |
1843 | unsigned int br; | |
1844 | { | |
1845 | unw_rec_list *ptr = alloc_record (rp_br); | |
1846 | ptr->r.record.p.br = br; | |
1847 | return ptr; | |
1848 | } | |
1849 | ||
1850 | static unw_rec_list * | |
1851 | output_rp_psprel (offset) | |
1852 | unsigned int offset; | |
1853 | { | |
1854 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
9f9a069e | 1855 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1856 | return ptr; |
1857 | } | |
1858 | ||
1859 | static unw_rec_list * | |
1860 | output_rp_sprel (offset) | |
1861 | unsigned int offset; | |
1862 | { | |
1863 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1864 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1865 | return ptr; |
1866 | } | |
1867 | ||
1868 | static unw_rec_list * | |
1869 | output_pfs_when () | |
1870 | { | |
1871 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1872 | return ptr; | |
1873 | } | |
1874 | ||
1875 | static unw_rec_list * | |
1876 | output_pfs_gr (gr) | |
1877 | unsigned int gr; | |
1878 | { | |
1879 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1880 | ptr->r.record.p.gr = gr; | |
1881 | return ptr; | |
1882 | } | |
1883 | ||
1884 | static unw_rec_list * | |
1885 | output_pfs_psprel (offset) | |
1886 | unsigned int offset; | |
1887 | { | |
1888 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
9f9a069e | 1889 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1890 | return ptr; |
1891 | } | |
1892 | ||
1893 | static unw_rec_list * | |
1894 | output_pfs_sprel (offset) | |
1895 | unsigned int offset; | |
1896 | { | |
1897 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1898 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1899 | return ptr; |
1900 | } | |
1901 | ||
1902 | static unw_rec_list * | |
1903 | output_preds_when () | |
1904 | { | |
1905 | unw_rec_list *ptr = alloc_record (preds_when); | |
1906 | return ptr; | |
1907 | } | |
1908 | ||
1909 | static unw_rec_list * | |
1910 | output_preds_gr (gr) | |
1911 | unsigned int gr; | |
1912 | { | |
1913 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1914 | ptr->r.record.p.gr = gr; | |
1915 | return ptr; | |
1916 | } | |
1917 | ||
1918 | static unw_rec_list * | |
1919 | output_preds_psprel (offset) | |
1920 | unsigned int offset; | |
1921 | { | |
1922 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
9f9a069e | 1923 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1924 | return ptr; |
1925 | } | |
1926 | ||
1927 | static unw_rec_list * | |
1928 | output_preds_sprel (offset) | |
1929 | unsigned int offset; | |
1930 | { | |
1931 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1932 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1933 | return ptr; |
1934 | } | |
1935 | ||
1936 | static unw_rec_list * | |
1937 | output_fr_mem (mask) | |
1938 | unsigned int mask; | |
1939 | { | |
1940 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1941 | ptr->r.record.p.rmask = mask; | |
1942 | return ptr; | |
1943 | } | |
1944 | ||
1945 | static unw_rec_list * | |
1946 | output_frgr_mem (gr_mask, fr_mask) | |
1947 | unsigned int gr_mask; | |
1948 | unsigned int fr_mask; | |
1949 | { | |
1950 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1951 | ptr->r.record.p.grmask = gr_mask; | |
1952 | ptr->r.record.p.frmask = fr_mask; | |
1953 | return ptr; | |
1954 | } | |
1955 | ||
1956 | static unw_rec_list * | |
1957 | output_gr_gr (mask, reg) | |
1958 | unsigned int mask; | |
1959 | unsigned int reg; | |
1960 | { | |
1961 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1962 | ptr->r.record.p.grmask = mask; | |
1963 | ptr->r.record.p.gr = reg; | |
1964 | return ptr; | |
1965 | } | |
1966 | ||
1967 | static unw_rec_list * | |
1968 | output_gr_mem (mask) | |
1969 | unsigned int mask; | |
1970 | { | |
1971 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1972 | ptr->r.record.p.rmask = mask; | |
1973 | return ptr; | |
1974 | } | |
1975 | ||
1976 | static unw_rec_list * | |
1977 | output_br_mem (unsigned int mask) | |
1978 | { | |
1979 | unw_rec_list *ptr = alloc_record (br_mem); | |
1980 | ptr->r.record.p.brmask = mask; | |
1981 | return ptr; | |
1982 | } | |
1983 | ||
1984 | static unw_rec_list * | |
1985 | output_br_gr (save_mask, reg) | |
1986 | unsigned int save_mask; | |
1987 | unsigned int reg; | |
1988 | { | |
1989 | unw_rec_list *ptr = alloc_record (br_gr); | |
1990 | ptr->r.record.p.brmask = save_mask; | |
1991 | ptr->r.record.p.gr = reg; | |
1992 | return ptr; | |
1993 | } | |
1994 | ||
1995 | static unw_rec_list * | |
1996 | output_spill_base (offset) | |
1997 | unsigned int offset; | |
1998 | { | |
1999 | unw_rec_list *ptr = alloc_record (spill_base); | |
9f9a069e | 2000 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2001 | return ptr; |
2002 | } | |
2003 | ||
2004 | static unw_rec_list * | |
2005 | output_unat_when () | |
2006 | { | |
2007 | unw_rec_list *ptr = alloc_record (unat_when); | |
2008 | return ptr; | |
2009 | } | |
2010 | ||
2011 | static unw_rec_list * | |
2012 | output_unat_gr (gr) | |
2013 | unsigned int gr; | |
2014 | { | |
2015 | unw_rec_list *ptr = alloc_record (unat_gr); | |
2016 | ptr->r.record.p.gr = gr; | |
2017 | return ptr; | |
2018 | } | |
2019 | ||
2020 | static unw_rec_list * | |
2021 | output_unat_psprel (offset) | |
2022 | unsigned int offset; | |
2023 | { | |
2024 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
9f9a069e | 2025 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2026 | return ptr; |
2027 | } | |
2028 | ||
2029 | static unw_rec_list * | |
2030 | output_unat_sprel (offset) | |
2031 | unsigned int offset; | |
2032 | { | |
2033 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 2034 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2035 | return ptr; |
2036 | } | |
2037 | ||
2038 | static unw_rec_list * | |
2039 | output_lc_when () | |
2040 | { | |
2041 | unw_rec_list *ptr = alloc_record (lc_when); | |
2042 | return ptr; | |
2043 | } | |
2044 | ||
2045 | static unw_rec_list * | |
2046 | output_lc_gr (gr) | |
2047 | unsigned int gr; | |
2048 | { | |
2049 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2050 | ptr->r.record.p.gr = gr; | |
2051 | return ptr; | |
2052 | } | |
2053 | ||
2054 | static unw_rec_list * | |
2055 | output_lc_psprel (offset) | |
2056 | unsigned int offset; | |
2057 | { | |
2058 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
9f9a069e | 2059 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2060 | return ptr; |
2061 | } | |
2062 | ||
2063 | static unw_rec_list * | |
2064 | output_lc_sprel (offset) | |
2065 | unsigned int offset; | |
2066 | { | |
2067 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2068 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2069 | return ptr; |
2070 | } | |
2071 | ||
2072 | static unw_rec_list * | |
2073 | output_fpsr_when () | |
2074 | { | |
2075 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2076 | return ptr; | |
2077 | } | |
2078 | ||
2079 | static unw_rec_list * | |
2080 | output_fpsr_gr (gr) | |
2081 | unsigned int gr; | |
2082 | { | |
2083 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2084 | ptr->r.record.p.gr = gr; | |
2085 | return ptr; | |
2086 | } | |
2087 | ||
2088 | static unw_rec_list * | |
2089 | output_fpsr_psprel (offset) | |
2090 | unsigned int offset; | |
2091 | { | |
2092 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
9f9a069e | 2093 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2094 | return ptr; |
2095 | } | |
2096 | ||
2097 | static unw_rec_list * | |
2098 | output_fpsr_sprel (offset) | |
2099 | unsigned int offset; | |
2100 | { | |
2101 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2102 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2103 | return ptr; |
2104 | } | |
2105 | ||
2106 | static unw_rec_list * | |
2107 | output_priunat_when_gr () | |
2108 | { | |
2109 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2110 | return ptr; | |
2111 | } | |
2112 | ||
2113 | static unw_rec_list * | |
2114 | output_priunat_when_mem () | |
2115 | { | |
2116 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2117 | return ptr; | |
2118 | } | |
2119 | ||
2120 | static unw_rec_list * | |
2121 | output_priunat_gr (gr) | |
2122 | unsigned int gr; | |
2123 | { | |
2124 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2125 | ptr->r.record.p.gr = gr; | |
2126 | return ptr; | |
2127 | } | |
2128 | ||
2129 | static unw_rec_list * | |
2130 | output_priunat_psprel (offset) | |
2131 | unsigned int offset; | |
2132 | { | |
2133 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
9f9a069e | 2134 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2135 | return ptr; |
2136 | } | |
2137 | ||
2138 | static unw_rec_list * | |
2139 | output_priunat_sprel (offset) | |
2140 | unsigned int offset; | |
2141 | { | |
2142 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2143 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2144 | return ptr; |
2145 | } | |
2146 | ||
2147 | static unw_rec_list * | |
2148 | output_bsp_when () | |
2149 | { | |
2150 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2151 | return ptr; | |
2152 | } | |
2153 | ||
2154 | static unw_rec_list * | |
2155 | output_bsp_gr (gr) | |
2156 | unsigned int gr; | |
2157 | { | |
2158 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2159 | ptr->r.record.p.gr = gr; | |
2160 | return ptr; | |
2161 | } | |
2162 | ||
2163 | static unw_rec_list * | |
2164 | output_bsp_psprel (offset) | |
2165 | unsigned int offset; | |
2166 | { | |
2167 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
9f9a069e | 2168 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2169 | return ptr; |
2170 | } | |
2171 | ||
2172 | static unw_rec_list * | |
2173 | output_bsp_sprel (offset) | |
2174 | unsigned int offset; | |
2175 | { | |
2176 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2177 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2178 | return ptr; |
2179 | } | |
2180 | ||
2181 | static unw_rec_list * | |
2182 | output_bspstore_when () | |
2183 | { | |
2184 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2185 | return ptr; | |
2186 | } | |
2187 | ||
2188 | static unw_rec_list * | |
2189 | output_bspstore_gr (gr) | |
2190 | unsigned int gr; | |
2191 | { | |
2192 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2193 | ptr->r.record.p.gr = gr; | |
2194 | return ptr; | |
2195 | } | |
2196 | ||
2197 | static unw_rec_list * | |
2198 | output_bspstore_psprel (offset) | |
2199 | unsigned int offset; | |
2200 | { | |
2201 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
9f9a069e | 2202 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2203 | return ptr; |
2204 | } | |
2205 | ||
2206 | static unw_rec_list * | |
2207 | output_bspstore_sprel (offset) | |
2208 | unsigned int offset; | |
2209 | { | |
2210 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2211 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2212 | return ptr; |
2213 | } | |
2214 | ||
2215 | static unw_rec_list * | |
2216 | output_rnat_when () | |
2217 | { | |
2218 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2219 | return ptr; | |
2220 | } | |
2221 | ||
2222 | static unw_rec_list * | |
2223 | output_rnat_gr (gr) | |
2224 | unsigned int gr; | |
2225 | { | |
2226 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2227 | ptr->r.record.p.gr = gr; | |
2228 | return ptr; | |
2229 | } | |
2230 | ||
2231 | static unw_rec_list * | |
2232 | output_rnat_psprel (offset) | |
2233 | unsigned int offset; | |
2234 | { | |
2235 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
9f9a069e | 2236 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2237 | return ptr; |
2238 | } | |
2239 | ||
2240 | static unw_rec_list * | |
2241 | output_rnat_sprel (offset) | |
2242 | unsigned int offset; | |
2243 | { | |
2244 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2245 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2246 | return ptr; |
2247 | } | |
2248 | ||
2249 | static unw_rec_list * | |
e0c9811a JW |
2250 | output_unwabi (abi, context) |
2251 | unsigned long abi; | |
2252 | unsigned long context; | |
800eeca4 | 2253 | { |
e0c9811a JW |
2254 | unw_rec_list *ptr = alloc_record (unwabi); |
2255 | ptr->r.record.p.abi = abi; | |
2256 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2257 | return ptr; |
2258 | } | |
2259 | ||
2260 | static unw_rec_list * | |
e0c9811a | 2261 | output_epilogue (unsigned long ecount) |
800eeca4 | 2262 | { |
e0c9811a JW |
2263 | unw_rec_list *ptr = alloc_record (epilogue); |
2264 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2265 | return ptr; |
2266 | } | |
2267 | ||
2268 | static unw_rec_list * | |
e0c9811a | 2269 | output_label_state (unsigned long label) |
800eeca4 | 2270 | { |
e0c9811a JW |
2271 | unw_rec_list *ptr = alloc_record (label_state); |
2272 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2273 | return ptr; |
2274 | } | |
2275 | ||
2276 | static unw_rec_list * | |
e0c9811a JW |
2277 | output_copy_state (unsigned long label) |
2278 | { | |
2279 | unw_rec_list *ptr = alloc_record (copy_state); | |
2280 | ptr->r.record.b.label = label; | |
2281 | return ptr; | |
2282 | } | |
2283 | ||
2284 | static unw_rec_list * | |
2285 | output_spill_psprel (ab, reg, offset) | |
2286 | unsigned int ab; | |
800eeca4 JW |
2287 | unsigned int reg; |
2288 | unsigned int offset; | |
2289 | { | |
2290 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2291 | ptr->r.record.x.ab = ab; |
800eeca4 | 2292 | ptr->r.record.x.reg = reg; |
9f9a069e | 2293 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2294 | return ptr; |
2295 | } | |
2296 | ||
2297 | static unw_rec_list * | |
e0c9811a JW |
2298 | output_spill_sprel (ab, reg, offset) |
2299 | unsigned int ab; | |
800eeca4 JW |
2300 | unsigned int reg; |
2301 | unsigned int offset; | |
2302 | { | |
2303 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2304 | ptr->r.record.x.ab = ab; |
800eeca4 | 2305 | ptr->r.record.x.reg = reg; |
542d6675 | 2306 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2307 | return ptr; |
2308 | } | |
2309 | ||
2310 | static unw_rec_list * | |
e0c9811a JW |
2311 | output_spill_psprel_p (ab, reg, offset, predicate) |
2312 | unsigned int ab; | |
800eeca4 JW |
2313 | unsigned int reg; |
2314 | unsigned int offset; | |
2315 | unsigned int predicate; | |
2316 | { | |
2317 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2318 | ptr->r.record.x.ab = ab; |
800eeca4 | 2319 | ptr->r.record.x.reg = reg; |
9f9a069e | 2320 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2321 | ptr->r.record.x.qp = predicate; |
2322 | return ptr; | |
2323 | } | |
2324 | ||
2325 | static unw_rec_list * | |
e0c9811a JW |
2326 | output_spill_sprel_p (ab, reg, offset, predicate) |
2327 | unsigned int ab; | |
800eeca4 JW |
2328 | unsigned int reg; |
2329 | unsigned int offset; | |
2330 | unsigned int predicate; | |
2331 | { | |
2332 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2333 | ptr->r.record.x.ab = ab; |
800eeca4 | 2334 | ptr->r.record.x.reg = reg; |
542d6675 | 2335 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2336 | ptr->r.record.x.qp = predicate; |
2337 | return ptr; | |
2338 | } | |
2339 | ||
2340 | static unw_rec_list * | |
e0c9811a JW |
2341 | output_spill_reg (ab, reg, targ_reg, xy) |
2342 | unsigned int ab; | |
800eeca4 JW |
2343 | unsigned int reg; |
2344 | unsigned int targ_reg; | |
2345 | unsigned int xy; | |
2346 | { | |
2347 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2348 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2349 | ptr->r.record.x.reg = reg; |
2350 | ptr->r.record.x.treg = targ_reg; | |
2351 | ptr->r.record.x.xy = xy; | |
2352 | return ptr; | |
2353 | } | |
2354 | ||
2355 | static unw_rec_list * | |
e0c9811a JW |
2356 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2357 | unsigned int ab; | |
800eeca4 JW |
2358 | unsigned int reg; |
2359 | unsigned int targ_reg; | |
2360 | unsigned int xy; | |
2361 | unsigned int predicate; | |
2362 | { | |
2363 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2364 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2365 | ptr->r.record.x.reg = reg; |
2366 | ptr->r.record.x.treg = targ_reg; | |
2367 | ptr->r.record.x.xy = xy; | |
2368 | ptr->r.record.x.qp = predicate; | |
2369 | return ptr; | |
2370 | } | |
2371 | ||
197865e8 | 2372 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2373 | specified function. */ |
542d6675 | 2374 | |
800eeca4 JW |
2375 | static void |
2376 | process_one_record (ptr, f) | |
2377 | unw_rec_list *ptr; | |
2378 | vbyte_func f; | |
2379 | { | |
e0c9811a JW |
2380 | unsigned long fr_mask, gr_mask; |
2381 | ||
197865e8 | 2382 | switch (ptr->r.type) |
800eeca4 | 2383 | { |
5738bc24 JW |
2384 | /* This is a dummy record that takes up no space in the output. */ |
2385 | case endp: | |
2386 | break; | |
2387 | ||
542d6675 KH |
2388 | case gr_mem: |
2389 | case fr_mem: | |
2390 | case br_mem: | |
2391 | case frgr_mem: | |
2392 | /* These are taken care of by prologue/prologue_gr. */ | |
2393 | break; | |
e0c9811a | 2394 | |
542d6675 KH |
2395 | case prologue_gr: |
2396 | case prologue: | |
2397 | if (ptr->r.type == prologue_gr) | |
2398 | output_R2_format (f, ptr->r.record.r.grmask, | |
2399 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2400 | else | |
800eeca4 | 2401 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2402 | |
2403 | /* Output descriptor(s) for union of register spills (if any). */ | |
2404 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2405 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2406 | if (fr_mask) | |
2407 | { | |
2408 | if ((fr_mask & ~0xfUL) == 0) | |
2409 | output_P6_format (f, fr_mem, fr_mask); | |
2410 | else | |
2411 | { | |
2412 | output_P5_format (f, gr_mask, fr_mask); | |
2413 | gr_mask = 0; | |
2414 | } | |
2415 | } | |
2416 | if (gr_mask) | |
2417 | output_P6_format (f, gr_mem, gr_mask); | |
2418 | if (ptr->r.record.r.mask.br_mem) | |
2419 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2420 | ||
2421 | /* output imask descriptor if necessary: */ | |
2422 | if (ptr->r.record.r.mask.i) | |
2423 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2424 | ptr->r.record.r.imask_size); | |
2425 | break; | |
2426 | ||
2427 | case body: | |
2428 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2429 | break; | |
2430 | case mem_stack_f: | |
2431 | case mem_stack_v: | |
2432 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2433 | ptr->r.record.p.size); | |
2434 | break; | |
2435 | case psp_gr: | |
2436 | case rp_gr: | |
2437 | case pfs_gr: | |
2438 | case preds_gr: | |
2439 | case unat_gr: | |
2440 | case lc_gr: | |
2441 | case fpsr_gr: | |
2442 | case priunat_gr: | |
2443 | case bsp_gr: | |
2444 | case bspstore_gr: | |
2445 | case rnat_gr: | |
2446 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2447 | break; | |
2448 | case rp_br: | |
2449 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2450 | break; | |
2451 | case psp_sprel: | |
2452 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2453 | break; | |
2454 | case rp_when: | |
2455 | case pfs_when: | |
2456 | case preds_when: | |
2457 | case unat_when: | |
2458 | case lc_when: | |
2459 | case fpsr_when: | |
2460 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2461 | break; | |
2462 | case rp_psprel: | |
2463 | case pfs_psprel: | |
2464 | case preds_psprel: | |
2465 | case unat_psprel: | |
2466 | case lc_psprel: | |
2467 | case fpsr_psprel: | |
2468 | case spill_base: | |
2469 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2470 | break; | |
2471 | case rp_sprel: | |
2472 | case pfs_sprel: | |
2473 | case preds_sprel: | |
2474 | case unat_sprel: | |
2475 | case lc_sprel: | |
2476 | case fpsr_sprel: | |
2477 | case priunat_sprel: | |
2478 | case bsp_sprel: | |
2479 | case bspstore_sprel: | |
2480 | case rnat_sprel: | |
2481 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2482 | break; | |
2483 | case gr_gr: | |
2484 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2485 | break; | |
2486 | case br_gr: | |
2487 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2488 | break; | |
2489 | case spill_mask: | |
2490 | as_bad ("spill_mask record unimplemented."); | |
2491 | break; | |
2492 | case priunat_when_gr: | |
2493 | case priunat_when_mem: | |
2494 | case bsp_when: | |
2495 | case bspstore_when: | |
2496 | case rnat_when: | |
2497 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2498 | break; | |
2499 | case priunat_psprel: | |
2500 | case bsp_psprel: | |
2501 | case bspstore_psprel: | |
2502 | case rnat_psprel: | |
2503 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2504 | break; | |
2505 | case unwabi: | |
2506 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2507 | break; | |
2508 | case epilogue: | |
2509 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2510 | break; | |
2511 | case label_state: | |
2512 | case copy_state: | |
2513 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2514 | break; | |
2515 | case spill_psprel: | |
2516 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2517 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2518 | ptr->r.record.x.pspoff); | |
2519 | break; | |
2520 | case spill_sprel: | |
2521 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2522 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2523 | ptr->r.record.x.spoff); | |
2524 | break; | |
2525 | case spill_reg: | |
2526 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2527 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2528 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2529 | break; | |
2530 | case spill_psprel_p: | |
2531 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2532 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2533 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2534 | break; | |
2535 | case spill_sprel_p: | |
2536 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2537 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2538 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2539 | break; | |
2540 | case spill_reg_p: | |
2541 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2542 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2543 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2544 | ptr->r.record.x.t); | |
2545 | break; | |
2546 | default: | |
2547 | as_bad ("record_type_not_valid"); | |
2548 | break; | |
800eeca4 JW |
2549 | } |
2550 | } | |
2551 | ||
197865e8 | 2552 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2553 | the specified function. */ |
2554 | static void | |
2555 | process_unw_records (list, f) | |
2556 | unw_rec_list *list; | |
2557 | vbyte_func f; | |
2558 | { | |
2559 | unw_rec_list *ptr; | |
2560 | for (ptr = list; ptr; ptr = ptr->next) | |
2561 | process_one_record (ptr, f); | |
2562 | } | |
2563 | ||
2564 | /* Determine the size of a record list in bytes. */ | |
2565 | static int | |
2566 | calc_record_size (list) | |
2567 | unw_rec_list *list; | |
2568 | { | |
2569 | vbyte_count = 0; | |
2570 | process_unw_records (list, count_output); | |
2571 | return vbyte_count; | |
2572 | } | |
2573 | ||
e0c9811a JW |
2574 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2575 | of type TYPE are saved starting at instruction with index T. If N | |
2576 | bits are set in REGMASK, it is assumed that instructions T through | |
2577 | T+N-1 save these registers. | |
2578 | ||
2579 | TYPE values: | |
2580 | 0: no save | |
2581 | 1: instruction saves next fp reg | |
2582 | 2: instruction saves next general reg | |
2583 | 3: instruction saves next branch reg */ | |
2584 | static void | |
2585 | set_imask (region, regmask, t, type) | |
2586 | unw_rec_list *region; | |
2587 | unsigned long regmask; | |
2588 | unsigned long t; | |
2589 | unsigned int type; | |
2590 | { | |
2591 | unsigned char *imask; | |
2592 | unsigned long imask_size; | |
2593 | unsigned int i; | |
2594 | int pos; | |
2595 | ||
2596 | imask = region->r.record.r.mask.i; | |
2597 | imask_size = region->r.record.r.imask_size; | |
2598 | if (!imask) | |
2599 | { | |
542d6675 | 2600 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2601 | imask = xmalloc (imask_size); |
2602 | memset (imask, 0, imask_size); | |
2603 | ||
2604 | region->r.record.r.imask_size = imask_size; | |
2605 | region->r.record.r.mask.i = imask; | |
2606 | } | |
2607 | ||
542d6675 KH |
2608 | i = (t / 4) + 1; |
2609 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2610 | while (regmask) |
2611 | { | |
2612 | if (i >= imask_size) | |
2613 | { | |
2614 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2615 | return; | |
2616 | } | |
2617 | ||
2618 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2619 | |
e0c9811a JW |
2620 | regmask &= (regmask - 1); |
2621 | pos -= 2; | |
2622 | if (pos < 0) | |
2623 | { | |
2624 | pos = 0; | |
2625 | ++i; | |
2626 | } | |
2627 | } | |
2628 | } | |
2629 | ||
f5a30c2e JW |
2630 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2631 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2632 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2633 | for frag sizes. */ | |
f5a30c2e | 2634 | |
e0c9811a | 2635 | unsigned long |
b5e0fabd | 2636 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2637 | unsigned long slot_addr; |
2638 | fragS *slot_frag; | |
2639 | unsigned long first_addr; | |
2640 | fragS *first_frag; | |
b5e0fabd | 2641 | int before_relax; |
e0c9811a | 2642 | { |
f5a30c2e JW |
2643 | unsigned long index = 0; |
2644 | ||
2645 | /* First time we are called, the initial address and frag are invalid. */ | |
2646 | if (first_addr == 0) | |
2647 | return 0; | |
2648 | ||
2649 | /* If the two addresses are in different frags, then we need to add in | |
2650 | the remaining size of this frag, and then the entire size of intermediate | |
2651 | frags. */ | |
2652 | while (slot_frag != first_frag) | |
2653 | { | |
2654 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2655 | ||
b5e0fabd | 2656 | if (! before_relax) |
73f20958 | 2657 | { |
b5e0fabd JW |
2658 | /* We can get the final addresses only during and after |
2659 | relaxation. */ | |
73f20958 L |
2660 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2661 | index += 3 * ((first_frag->fr_next->fr_address | |
2662 | - first_frag->fr_address | |
2663 | - first_frag->fr_fix) >> 4); | |
2664 | } | |
2665 | else | |
2666 | /* We don't know what the final addresses will be. We try our | |
2667 | best to estimate. */ | |
2668 | switch (first_frag->fr_type) | |
2669 | { | |
2670 | default: | |
2671 | break; | |
2672 | ||
2673 | case rs_space: | |
2674 | as_fatal ("only constant space allocation is supported"); | |
2675 | break; | |
2676 | ||
2677 | case rs_align: | |
2678 | case rs_align_code: | |
2679 | case rs_align_test: | |
2680 | /* Take alignment into account. Assume the worst case | |
2681 | before relaxation. */ | |
2682 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2683 | break; | |
2684 | ||
2685 | case rs_org: | |
2686 | if (first_frag->fr_symbol) | |
2687 | { | |
2688 | as_fatal ("only constant offsets are supported"); | |
2689 | break; | |
2690 | } | |
2691 | case rs_fill: | |
2692 | index += 3 * (first_frag->fr_offset >> 4); | |
2693 | break; | |
2694 | } | |
2695 | ||
f5a30c2e JW |
2696 | /* Add in the full size of the frag converted to instruction slots. */ |
2697 | index += 3 * (first_frag->fr_fix >> 4); | |
2698 | /* Subtract away the initial part before first_addr. */ | |
2699 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2700 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2701 | |
f5a30c2e JW |
2702 | /* Move to the beginning of the next frag. */ |
2703 | first_frag = first_frag->fr_next; | |
2704 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2705 | } | |
2706 | ||
2707 | /* Add in the used part of the last frag. */ | |
2708 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2709 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2710 | return index; | |
2711 | } | |
4a1805b1 | 2712 | |
91a2ae2a RH |
2713 | /* Optimize unwind record directives. */ |
2714 | ||
2715 | static unw_rec_list * | |
2716 | optimize_unw_records (list) | |
2717 | unw_rec_list *list; | |
2718 | { | |
2719 | if (!list) | |
2720 | return NULL; | |
2721 | ||
2722 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2723 | by ".body", then we can optimize the unwind directives away. */ | |
2724 | if (list->r.type == prologue | |
5738bc24 JW |
2725 | && (list->next->r.type == endp |
2726 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2727 | return NULL; |
2728 | ||
2729 | return list; | |
2730 | } | |
2731 | ||
800eeca4 JW |
2732 | /* Given a complete record list, process any records which have |
2733 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2734 | this has been run, all necessary information should be available |
800eeca4 | 2735 | within each record to generate an image. */ |
542d6675 | 2736 | |
800eeca4 | 2737 | static void |
b5e0fabd | 2738 | fixup_unw_records (list, before_relax) |
800eeca4 | 2739 | unw_rec_list *list; |
b5e0fabd | 2740 | int before_relax; |
800eeca4 | 2741 | { |
e0c9811a JW |
2742 | unw_rec_list *ptr, *region = 0; |
2743 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2744 | fragS *first_frag = 0; |
e0c9811a | 2745 | |
800eeca4 JW |
2746 | for (ptr = list; ptr; ptr = ptr->next) |
2747 | { | |
2748 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2749 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2750 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2751 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2752 | switch (ptr->r.type) |
2753 | { | |
542d6675 KH |
2754 | case prologue: |
2755 | case prologue_gr: | |
2756 | case body: | |
2757 | { | |
2758 | unw_rec_list *last; | |
5738bc24 JW |
2759 | int size; |
2760 | unsigned long last_addr = 0; | |
2761 | fragS *last_frag = NULL; | |
542d6675 KH |
2762 | |
2763 | first_addr = ptr->slot_number; | |
f5a30c2e | 2764 | first_frag = ptr->slot_frag; |
542d6675 | 2765 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2766 | the function, and determine the size of the region. */ |
542d6675 KH |
2767 | for (last = ptr->next; last != NULL; last = last->next) |
2768 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2769 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2770 | { |
2771 | last_addr = last->slot_number; | |
f5a30c2e | 2772 | last_frag = last->slot_frag; |
542d6675 KH |
2773 | break; |
2774 | } | |
b5e0fabd JW |
2775 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2776 | before_relax); | |
542d6675 | 2777 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2778 | if (ptr->r.type == body) |
2779 | /* End of region. */ | |
2780 | region = 0; | |
2781 | else | |
2782 | region = ptr; | |
e0c9811a | 2783 | break; |
542d6675 KH |
2784 | } |
2785 | case epilogue: | |
ed7af9f9 L |
2786 | if (t < rlen) |
2787 | ptr->r.record.b.t = rlen - 1 - t; | |
2788 | else | |
2789 | /* This happens when a memory-stack-less procedure uses a | |
2790 | ".restore sp" directive at the end of a region to pop | |
2791 | the frame state. */ | |
2792 | ptr->r.record.b.t = 0; | |
542d6675 | 2793 | break; |
e0c9811a | 2794 | |
542d6675 KH |
2795 | case mem_stack_f: |
2796 | case mem_stack_v: | |
2797 | case rp_when: | |
2798 | case pfs_when: | |
2799 | case preds_when: | |
2800 | case unat_when: | |
2801 | case lc_when: | |
2802 | case fpsr_when: | |
2803 | case priunat_when_gr: | |
2804 | case priunat_when_mem: | |
2805 | case bsp_when: | |
2806 | case bspstore_when: | |
2807 | case rnat_when: | |
2808 | ptr->r.record.p.t = t; | |
2809 | break; | |
e0c9811a | 2810 | |
542d6675 KH |
2811 | case spill_reg: |
2812 | case spill_sprel: | |
2813 | case spill_psprel: | |
2814 | case spill_reg_p: | |
2815 | case spill_sprel_p: | |
2816 | case spill_psprel_p: | |
2817 | ptr->r.record.x.t = t; | |
2818 | break; | |
e0c9811a | 2819 | |
542d6675 KH |
2820 | case frgr_mem: |
2821 | if (!region) | |
2822 | { | |
75e09913 | 2823 | as_bad ("frgr_mem record before region record!"); |
542d6675 KH |
2824 | return; |
2825 | } | |
2826 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2827 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2828 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2829 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2830 | break; | |
2831 | case fr_mem: | |
2832 | if (!region) | |
2833 | { | |
75e09913 | 2834 | as_bad ("fr_mem record before region record!"); |
542d6675 KH |
2835 | return; |
2836 | } | |
2837 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2838 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2839 | break; | |
2840 | case gr_mem: | |
2841 | if (!region) | |
2842 | { | |
75e09913 | 2843 | as_bad ("gr_mem record before region record!"); |
542d6675 KH |
2844 | return; |
2845 | } | |
2846 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2847 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2848 | break; | |
2849 | case br_mem: | |
2850 | if (!region) | |
2851 | { | |
75e09913 | 2852 | as_bad ("br_mem record before region record!"); |
542d6675 KH |
2853 | return; |
2854 | } | |
2855 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2856 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2857 | break; | |
e0c9811a | 2858 | |
542d6675 KH |
2859 | case gr_gr: |
2860 | if (!region) | |
2861 | { | |
75e09913 | 2862 | as_bad ("gr_gr record before region record!"); |
542d6675 KH |
2863 | return; |
2864 | } | |
2865 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2866 | break; | |
2867 | case br_gr: | |
2868 | if (!region) | |
2869 | { | |
75e09913 | 2870 | as_bad ("br_gr record before region record!"); |
542d6675 KH |
2871 | return; |
2872 | } | |
2873 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2874 | break; | |
e0c9811a | 2875 | |
542d6675 KH |
2876 | default: |
2877 | break; | |
800eeca4 JW |
2878 | } |
2879 | } | |
2880 | } | |
2881 | ||
b5e0fabd JW |
2882 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2883 | to handle here, which is the unwind info frag. */ | |
2884 | ||
2885 | int | |
2886 | ia64_estimate_size_before_relax (fragS *frag, | |
2887 | asection *segtype ATTRIBUTE_UNUSED) | |
2888 | { | |
2889 | unw_rec_list *list; | |
2890 | int len, size, pad; | |
2891 | ||
2892 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2893 | list = (unw_rec_list *) frag->fr_opcode; | |
2894 | fixup_unw_records (list, 0); | |
2895 | ||
2896 | len = calc_record_size (list); | |
2897 | /* pad to pointer-size boundary. */ | |
2898 | pad = len % md.pointer_size; | |
2899 | if (pad != 0) | |
2900 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2901 | /* Add 8 for the header. */ |
2902 | size = len + 8; | |
2903 | /* Add a pointer for the personality offset. */ | |
2904 | if (frag->fr_offset) | |
2905 | size += md.pointer_size; | |
b5e0fabd JW |
2906 | |
2907 | /* fr_var carries the max_chars that we created the fragment with. | |
2908 | We must, of course, have allocated enough memory earlier. */ | |
2909 | assert (frag->fr_var >= size); | |
2910 | ||
2911 | return frag->fr_fix + size; | |
2912 | } | |
2913 | ||
73f20958 L |
2914 | /* This function converts a rs_machine_dependent variant frag into a |
2915 | normal fill frag with the unwind image from the the record list. */ | |
2916 | void | |
2917 | ia64_convert_frag (fragS *frag) | |
557debba | 2918 | { |
73f20958 L |
2919 | unw_rec_list *list; |
2920 | int len, size, pad; | |
1cd8ff38 | 2921 | valueT flag_value; |
557debba | 2922 | |
b5e0fabd | 2923 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2924 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2925 | fixup_unw_records (list, 0); |
1cd8ff38 | 2926 | |
73f20958 L |
2927 | len = calc_record_size (list); |
2928 | /* pad to pointer-size boundary. */ | |
2929 | pad = len % md.pointer_size; | |
2930 | if (pad != 0) | |
2931 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2932 | /* Add 8 for the header. */ |
2933 | size = len + 8; | |
2934 | /* Add a pointer for the personality offset. */ | |
2935 | if (frag->fr_offset) | |
2936 | size += md.pointer_size; | |
73f20958 L |
2937 | |
2938 | /* fr_var carries the max_chars that we created the fragment with. | |
2939 | We must, of course, have allocated enough memory earlier. */ | |
2940 | assert (frag->fr_var >= size); | |
2941 | ||
2942 | /* Initialize the header area. fr_offset is initialized with | |
2943 | unwind.personality_routine. */ | |
2944 | if (frag->fr_offset) | |
1cd8ff38 NC |
2945 | { |
2946 | if (md.flags & EF_IA_64_ABI64) | |
2947 | flag_value = (bfd_vma) 3 << 32; | |
2948 | else | |
2949 | /* 32-bit unwind info block. */ | |
2950 | flag_value = (bfd_vma) 0x1003 << 32; | |
2951 | } | |
2952 | else | |
2953 | flag_value = 0; | |
557debba | 2954 | |
73f20958 L |
2955 | md_number_to_chars (frag->fr_literal, |
2956 | (((bfd_vma) 1 << 48) /* Version. */ | |
2957 | | flag_value /* U & E handler flags. */ | |
2958 | | (len / md.pointer_size)), /* Length. */ | |
2959 | 8); | |
557debba | 2960 | |
73f20958 L |
2961 | /* Skip the header. */ |
2962 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2963 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2964 | |
2965 | /* Fill the padding bytes with zeros. */ | |
2966 | if (pad != 0) | |
2967 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2968 | md.pointer_size - pad); | |
2969 | ||
73f20958 L |
2970 | frag->fr_fix += size; |
2971 | frag->fr_type = rs_fill; | |
2972 | frag->fr_var = 0; | |
2973 | frag->fr_offset = 0; | |
800eeca4 JW |
2974 | } |
2975 | ||
e0c9811a JW |
2976 | static int |
2977 | convert_expr_to_ab_reg (e, ab, regp) | |
2978 | expressionS *e; | |
2979 | unsigned int *ab; | |
2980 | unsigned int *regp; | |
2981 | { | |
2982 | unsigned int reg; | |
2983 | ||
2984 | if (e->X_op != O_register) | |
2985 | return 0; | |
2986 | ||
2987 | reg = e->X_add_number; | |
2434f565 | 2988 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2989 | { |
2990 | *ab = 0; | |
2991 | *regp = reg - REG_GR; | |
2992 | } | |
2434f565 JW |
2993 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2994 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2995 | { |
2996 | *ab = 1; | |
2997 | *regp = reg - REG_FR; | |
2998 | } | |
2434f565 | 2999 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3000 | { |
3001 | *ab = 2; | |
3002 | *regp = reg - REG_BR; | |
3003 | } | |
3004 | else | |
3005 | { | |
3006 | *ab = 3; | |
3007 | switch (reg) | |
3008 | { | |
3009 | case REG_PR: *regp = 0; break; | |
3010 | case REG_PSP: *regp = 1; break; | |
3011 | case REG_PRIUNAT: *regp = 2; break; | |
3012 | case REG_BR + 0: *regp = 3; break; | |
3013 | case REG_AR + AR_BSP: *regp = 4; break; | |
3014 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3015 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3016 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3017 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3018 | case REG_AR + AR_PFS: *regp = 9; break; | |
3019 | case REG_AR + AR_LC: *regp = 10; break; | |
3020 | ||
3021 | default: | |
3022 | return 0; | |
3023 | } | |
3024 | } | |
3025 | return 1; | |
197865e8 | 3026 | } |
e0c9811a JW |
3027 | |
3028 | static int | |
3029 | convert_expr_to_xy_reg (e, xy, regp) | |
3030 | expressionS *e; | |
3031 | unsigned int *xy; | |
3032 | unsigned int *regp; | |
3033 | { | |
3034 | unsigned int reg; | |
3035 | ||
3036 | if (e->X_op != O_register) | |
3037 | return 0; | |
3038 | ||
3039 | reg = e->X_add_number; | |
3040 | ||
2434f565 | 3041 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
3042 | { |
3043 | *xy = 0; | |
3044 | *regp = reg - REG_GR; | |
3045 | } | |
2434f565 | 3046 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
3047 | { |
3048 | *xy = 1; | |
3049 | *regp = reg - REG_FR; | |
3050 | } | |
2434f565 | 3051 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3052 | { |
3053 | *xy = 2; | |
3054 | *regp = reg - REG_BR; | |
3055 | } | |
3056 | else | |
3057 | return -1; | |
3058 | return 1; | |
197865e8 | 3059 | } |
e0c9811a | 3060 | |
d9201763 L |
3061 | static void |
3062 | dot_align (int arg) | |
3063 | { | |
3064 | /* The current frag is an alignment frag. */ | |
3065 | align_frag = frag_now; | |
3066 | s_align_bytes (arg); | |
3067 | } | |
3068 | ||
800eeca4 JW |
3069 | static void |
3070 | dot_radix (dummy) | |
2434f565 | 3071 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3072 | { |
fa30c84f JB |
3073 | char *radix; |
3074 | int ch; | |
800eeca4 JW |
3075 | |
3076 | SKIP_WHITESPACE (); | |
800eeca4 | 3077 | |
fa30c84f JB |
3078 | if (is_it_end_of_statement ()) |
3079 | return; | |
3080 | radix = input_line_pointer; | |
3081 | ch = get_symbol_end (); | |
3082 | ia64_canonicalize_symbol_name (radix); | |
3083 | if (strcasecmp (radix, "C")) | |
3084 | as_bad ("Radix `%s' unsupported or invalid", radix); | |
3085 | *input_line_pointer = ch; | |
3086 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3087 | } |
3088 | ||
196e8040 JW |
3089 | /* Helper function for .loc directives. If the assembler is not generating |
3090 | line number info, then we need to remember which instructions have a .loc | |
3091 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3092 | ||
3093 | static void | |
3094 | dot_loc (int x) | |
3095 | { | |
3096 | CURR_SLOT.loc_directive_seen = 1; | |
3097 | dwarf2_directive_loc (x); | |
3098 | } | |
3099 | ||
800eeca4 JW |
3100 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3101 | static void | |
3102 | dot_special_section (which) | |
3103 | int which; | |
3104 | { | |
3105 | set_section ((char *) special_section_name[which]); | |
3106 | } | |
3107 | ||
07450571 L |
3108 | /* Return -1 for warning and 0 for error. */ |
3109 | ||
3110 | static int | |
970d6792 L |
3111 | unwind_diagnostic (const char * region, const char *directive) |
3112 | { | |
3113 | if (md.unwind_check == unwind_check_warning) | |
07450571 L |
3114 | { |
3115 | as_warn (".%s outside of %s", directive, region); | |
3116 | return -1; | |
3117 | } | |
970d6792 L |
3118 | else |
3119 | { | |
3120 | as_bad (".%s outside of %s", directive, region); | |
3121 | ignore_rest_of_line (); | |
07450571 | 3122 | return 0; |
970d6792 L |
3123 | } |
3124 | } | |
3125 | ||
07450571 L |
3126 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3127 | a procedure but the unwind directive check is set to warning, 0 if | |
3128 | a directive isn't in a procedure and the unwind directive check is set | |
3129 | to error. */ | |
3130 | ||
75e09913 JB |
3131 | static int |
3132 | in_procedure (const char *directive) | |
3133 | { | |
3134 | if (unwind.proc_start | |
3135 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) | |
3136 | return 1; | |
07450571 | 3137 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3138 | } |
3139 | ||
07450571 L |
3140 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3141 | a prologue but the unwind directive check is set to warning, 0 if | |
3142 | a directive isn't in a prologue and the unwind directive check is set | |
3143 | to error. */ | |
3144 | ||
75e09913 JB |
3145 | static int |
3146 | in_prologue (const char *directive) | |
3147 | { | |
07450571 L |
3148 | int in = in_procedure (directive); |
3149 | if (in) | |
75e09913 | 3150 | { |
970d6792 | 3151 | /* We are in a procedure. Check if we are in a prologue. */ |
75e09913 JB |
3152 | if (unwind.prologue) |
3153 | return 1; | |
07450571 L |
3154 | /* We only want to issue one message. */ |
3155 | if (in == 1) | |
3156 | return unwind_diagnostic ("prologue", directive); | |
3157 | else | |
3158 | return -1; | |
75e09913 JB |
3159 | } |
3160 | return 0; | |
3161 | } | |
3162 | ||
07450571 L |
3163 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3164 | a body but the unwind directive check is set to warning, 0 if | |
3165 | a directive isn't in a body and the unwind directive check is set | |
3166 | to error. */ | |
3167 | ||
75e09913 JB |
3168 | static int |
3169 | in_body (const char *directive) | |
3170 | { | |
07450571 L |
3171 | int in = in_procedure (directive); |
3172 | if (in) | |
75e09913 | 3173 | { |
970d6792 | 3174 | /* We are in a procedure. Check if we are in a body. */ |
75e09913 JB |
3175 | if (unwind.body) |
3176 | return 1; | |
07450571 L |
3177 | /* We only want to issue one message. */ |
3178 | if (in == 1) | |
3179 | return unwind_diagnostic ("body region", directive); | |
3180 | else | |
3181 | return -1; | |
75e09913 JB |
3182 | } |
3183 | return 0; | |
3184 | } | |
3185 | ||
800eeca4 JW |
3186 | static void |
3187 | add_unwind_entry (ptr) | |
3188 | unw_rec_list *ptr; | |
3189 | { | |
e0c9811a JW |
3190 | if (unwind.tail) |
3191 | unwind.tail->next = ptr; | |
800eeca4 | 3192 | else |
e0c9811a JW |
3193 | unwind.list = ptr; |
3194 | unwind.tail = ptr; | |
800eeca4 JW |
3195 | |
3196 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3197 | if (unwind.current_entry == NULL) |
3198 | unwind.current_entry = ptr; | |
800eeca4 JW |
3199 | } |
3200 | ||
197865e8 | 3201 | static void |
800eeca4 | 3202 | dot_fframe (dummy) |
2434f565 | 3203 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3204 | { |
3205 | expressionS e; | |
e0c9811a | 3206 | |
75e09913 JB |
3207 | if (!in_prologue ("fframe")) |
3208 | return; | |
3209 | ||
800eeca4 | 3210 | parse_operand (&e); |
197865e8 | 3211 | |
800eeca4 JW |
3212 | if (e.X_op != O_constant) |
3213 | as_bad ("Operand to .fframe must be a constant"); | |
3214 | else | |
e0c9811a JW |
3215 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3216 | } | |
3217 | ||
197865e8 | 3218 | static void |
e0c9811a | 3219 | dot_vframe (dummy) |
2434f565 | 3220 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3221 | { |
3222 | expressionS e; | |
3223 | unsigned reg; | |
3224 | ||
75e09913 JB |
3225 | if (!in_prologue ("vframe")) |
3226 | return; | |
3227 | ||
e0c9811a JW |
3228 | parse_operand (&e); |
3229 | reg = e.X_add_number - REG_GR; | |
3230 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3231 | { |
e0c9811a | 3232 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3233 | if (! (unwind.prologue_mask & 2)) |
3234 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3235 | } |
e0c9811a JW |
3236 | else |
3237 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3238 | } |
3239 | ||
197865e8 | 3240 | static void |
e0c9811a | 3241 | dot_vframesp (dummy) |
2434f565 | 3242 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3243 | { |
e0c9811a JW |
3244 | expressionS e; |
3245 | ||
75e09913 JB |
3246 | if (!in_prologue ("vframesp")) |
3247 | return; | |
3248 | ||
e0c9811a JW |
3249 | parse_operand (&e); |
3250 | if (e.X_op == O_constant) | |
3251 | { | |
3252 | add_unwind_entry (output_mem_stack_v ()); | |
3253 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3254 | } | |
3255 | else | |
69906a9b | 3256 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3257 | } |
3258 | ||
197865e8 | 3259 | static void |
e0c9811a | 3260 | dot_vframepsp (dummy) |
2434f565 | 3261 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3262 | { |
3263 | expressionS e; | |
3264 | ||
75e09913 JB |
3265 | if (!in_prologue ("vframepsp")) |
3266 | return; | |
3267 | ||
e0c9811a JW |
3268 | parse_operand (&e); |
3269 | if (e.X_op == O_constant) | |
3270 | { | |
3271 | add_unwind_entry (output_mem_stack_v ()); | |
3272 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3273 | } | |
3274 | else | |
69906a9b | 3275 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3276 | } |
3277 | ||
197865e8 | 3278 | static void |
800eeca4 | 3279 | dot_save (dummy) |
2434f565 | 3280 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3281 | { |
3282 | expressionS e1, e2; | |
3283 | int sep; | |
3284 | int reg1, reg2; | |
3285 | ||
75e09913 JB |
3286 | if (!in_prologue ("save")) |
3287 | return; | |
3288 | ||
800eeca4 JW |
3289 | sep = parse_operand (&e1); |
3290 | if (sep != ',') | |
3291 | as_bad ("No second operand to .save"); | |
3292 | sep = parse_operand (&e2); | |
3293 | ||
e0c9811a | 3294 | reg1 = e1.X_add_number; |
800eeca4 | 3295 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3296 | |
800eeca4 | 3297 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3298 | if (e1.X_op == O_register) |
800eeca4 | 3299 | { |
542d6675 | 3300 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3301 | { |
3302 | switch (reg1) | |
3303 | { | |
542d6675 KH |
3304 | case REG_AR + AR_BSP: |
3305 | add_unwind_entry (output_bsp_when ()); | |
3306 | add_unwind_entry (output_bsp_gr (reg2)); | |
3307 | break; | |
3308 | case REG_AR + AR_BSPSTORE: | |
3309 | add_unwind_entry (output_bspstore_when ()); | |
3310 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3311 | break; | |
3312 | case REG_AR + AR_RNAT: | |
3313 | add_unwind_entry (output_rnat_when ()); | |
3314 | add_unwind_entry (output_rnat_gr (reg2)); | |
3315 | break; | |
3316 | case REG_AR + AR_UNAT: | |
3317 | add_unwind_entry (output_unat_when ()); | |
3318 | add_unwind_entry (output_unat_gr (reg2)); | |
3319 | break; | |
3320 | case REG_AR + AR_FPSR: | |
3321 | add_unwind_entry (output_fpsr_when ()); | |
3322 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3323 | break; | |
3324 | case REG_AR + AR_PFS: | |
3325 | add_unwind_entry (output_pfs_when ()); | |
3326 | if (! (unwind.prologue_mask & 4)) | |
3327 | add_unwind_entry (output_pfs_gr (reg2)); | |
3328 | break; | |
3329 | case REG_AR + AR_LC: | |
3330 | add_unwind_entry (output_lc_when ()); | |
3331 | add_unwind_entry (output_lc_gr (reg2)); | |
3332 | break; | |
3333 | case REG_BR: | |
3334 | add_unwind_entry (output_rp_when ()); | |
3335 | if (! (unwind.prologue_mask & 8)) | |
3336 | add_unwind_entry (output_rp_gr (reg2)); | |
3337 | break; | |
3338 | case REG_PR: | |
3339 | add_unwind_entry (output_preds_when ()); | |
3340 | if (! (unwind.prologue_mask & 1)) | |
3341 | add_unwind_entry (output_preds_gr (reg2)); | |
3342 | break; | |
3343 | case REG_PRIUNAT: | |
3344 | add_unwind_entry (output_priunat_when_gr ()); | |
3345 | add_unwind_entry (output_priunat_gr (reg2)); | |
3346 | break; | |
3347 | default: | |
3348 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3349 | } |
3350 | } | |
3351 | else | |
3352 | as_bad (" Second operand not a valid register"); | |
3353 | } | |
3354 | else | |
e0c9811a | 3355 | as_bad ("First operand not a register"); |
800eeca4 JW |
3356 | } |
3357 | ||
197865e8 | 3358 | static void |
800eeca4 | 3359 | dot_restore (dummy) |
2434f565 | 3360 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3361 | { |
e0c9811a | 3362 | expressionS e1, e2; |
33d01f33 | 3363 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3364 | int sep; |
3365 | ||
75e09913 JB |
3366 | if (!in_body ("restore")) |
3367 | return; | |
3368 | ||
e0c9811a JW |
3369 | sep = parse_operand (&e1); |
3370 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3371 | { | |
3372 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3373 | return; | |
3374 | } | |
3375 | ||
3376 | if (sep == ',') | |
3377 | { | |
3378 | parse_operand (&e2); | |
33d01f33 | 3379 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3380 | { |
33d01f33 | 3381 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3382 | return; |
3383 | } | |
33d01f33 | 3384 | ecount = e2.X_add_number; |
e0c9811a | 3385 | } |
33d01f33 JW |
3386 | else |
3387 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3388 | |
3389 | if (ecount >= unwind.prologue_count) | |
3390 | { | |
3391 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3392 | ecount + 1, unwind.prologue_count); | |
3393 | return; | |
3394 | } | |
3395 | ||
e0c9811a | 3396 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3397 | |
3398 | if (ecount < unwind.prologue_count) | |
3399 | unwind.prologue_count -= ecount + 1; | |
3400 | else | |
3401 | unwind.prologue_count = 0; | |
e0c9811a JW |
3402 | } |
3403 | ||
197865e8 | 3404 | static void |
e0c9811a | 3405 | dot_restorereg (dummy) |
2434f565 | 3406 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3407 | { |
3408 | unsigned int ab, reg; | |
3409 | expressionS e; | |
3410 | ||
75e09913 JB |
3411 | if (!in_procedure ("restorereg")) |
3412 | return; | |
3413 | ||
e0c9811a JW |
3414 | parse_operand (&e); |
3415 | ||
3416 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3417 | { | |
3418 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3419 | return; | |
3420 | } | |
3421 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3422 | } | |
3423 | ||
197865e8 | 3424 | static void |
e0c9811a | 3425 | dot_restorereg_p (dummy) |
2434f565 | 3426 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3427 | { |
3428 | unsigned int qp, ab, reg; | |
3429 | expressionS e1, e2; | |
3430 | int sep; | |
3431 | ||
75e09913 JB |
3432 | if (!in_procedure ("restorereg.p")) |
3433 | return; | |
3434 | ||
e0c9811a JW |
3435 | sep = parse_operand (&e1); |
3436 | if (sep != ',') | |
3437 | { | |
3438 | as_bad ("No second operand to .restorereg.p"); | |
3439 | return; | |
3440 | } | |
3441 | ||
3442 | parse_operand (&e2); | |
3443 | ||
3444 | qp = e1.X_add_number - REG_P; | |
3445 | if (e1.X_op != O_register || qp > 63) | |
3446 | { | |
3447 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3448 | return; | |
3449 | } | |
3450 | ||
3451 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3452 | { | |
3453 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3454 | return; | |
3455 | } | |
3456 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3457 | } |
3458 | ||
2d6ed997 L |
3459 | static char *special_linkonce_name[] = |
3460 | { | |
3461 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3462 | }; | |
3463 | ||
3464 | static void | |
da9f89d4 | 3465 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3466 | { |
3467 | /* | |
3468 | Use a slightly ugly scheme to derive the unwind section names from | |
3469 | the text section name: | |
3470 | ||
3471 | text sect. unwind table sect. | |
3472 | name: name: comments: | |
3473 | ---------- ----------------- -------------------------------- | |
3474 | .text .IA_64.unwind | |
3475 | .text.foo .IA_64.unwind.text.foo | |
3476 | .foo .IA_64.unwind.foo | |
3477 | .gnu.linkonce.t.foo | |
3478 | .gnu.linkonce.ia64unw.foo | |
3479 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3480 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3481 | ||
3482 | This mapping is done so that: | |
3483 | ||
3484 | (a) An object file with unwind info only in .text will use | |
3485 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3486 | This follows the letter of the ABI and also ensures backwards | |
3487 | compatibility with older toolchains. | |
3488 | ||
3489 | (b) An object file with unwind info in multiple text sections | |
3490 | will use separate unwind sections for each text section. | |
3491 | This allows us to properly set the "sh_info" and "sh_link" | |
3492 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3493 | lets GNU ld support programs with multiple segments | |
3494 | containing unwind info (as might be the case for certain | |
3495 | embedded applications). | |
3496 | ||
3497 | (c) An error is issued if there would be a name clash. | |
3498 | */ | |
3499 | ||
3500 | const char *text_name, *sec_text_name; | |
3501 | char *sec_name; | |
3502 | const char *prefix = special_section_name [sec_index]; | |
3503 | const char *suffix; | |
3504 | size_t prefix_len, suffix_len, sec_name_len; | |
3505 | ||
3506 | sec_text_name = segment_name (text_seg); | |
3507 | text_name = sec_text_name; | |
3508 | if (strncmp (text_name, "_info", 5) == 0) | |
3509 | { | |
3510 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3511 | text_name); | |
3512 | ignore_rest_of_line (); | |
3513 | return; | |
3514 | } | |
3515 | if (strcmp (text_name, ".text") == 0) | |
3516 | text_name = ""; | |
3517 | ||
3518 | /* Build the unwind section name by appending the (possibly stripped) | |
3519 | text section name to the unwind prefix. */ | |
3520 | suffix = text_name; | |
3521 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3522 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3523 | { | |
3524 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3525 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3526 | } | |
3527 | ||
3528 | prefix_len = strlen (prefix); | |
3529 | suffix_len = strlen (suffix); | |
3530 | sec_name_len = prefix_len + suffix_len; | |
3531 | sec_name = alloca (sec_name_len + 1); | |
3532 | memcpy (sec_name, prefix, prefix_len); | |
3533 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3534 | sec_name [sec_name_len] = '\0'; | |
3535 | ||
3536 | /* Handle COMDAT group. */ | |
6e3f953d L |
3537 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3538 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3539 | { |
3540 | char *section; | |
3541 | size_t len, group_name_len; | |
3542 | const char *group_name = elf_group_name (text_seg); | |
3543 | ||
3544 | if (group_name == NULL) | |
3545 | { | |
3546 | as_bad ("Group section `%s' has no group signature", | |
3547 | sec_text_name); | |
3548 | ignore_rest_of_line (); | |
3549 | return; | |
3550 | } | |
3551 | /* We have to construct a fake section directive. */ | |
3552 | group_name_len = strlen (group_name); | |
3553 | len = (sec_name_len | |
3554 | + 16 /* ,"aG",@progbits, */ | |
3555 | + group_name_len /* ,group_name */ | |
3556 | + 7); /* ,comdat */ | |
3557 | ||
3558 | section = alloca (len + 1); | |
3559 | memcpy (section, sec_name, sec_name_len); | |
3560 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3561 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3562 | memcpy (section + len - 7, ",comdat", 7); | |
3563 | section [len] = '\0'; | |
3564 | set_section (section); | |
3565 | } | |
3566 | else | |
3567 | { | |
3568 | set_section (sec_name); | |
3569 | bfd_set_section_flags (stdoutput, now_seg, | |
3570 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3571 | } | |
38ce5b11 L |
3572 | |
3573 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3574 | } |
3575 | ||
73f20958 | 3576 | static void |
2d6ed997 | 3577 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3578 | { |
73f20958 L |
3579 | int size, pad; |
3580 | unw_rec_list *list; | |
800eeca4 | 3581 | |
c97b7ef6 JW |
3582 | /* Mark the end of the unwind info, so that we can compute the size of the |
3583 | last unwind region. */ | |
3584 | add_unwind_entry (output_endp ()); | |
3585 | ||
10850f29 JW |
3586 | /* Force out pending instructions, to make sure all unwind records have |
3587 | a valid slot_number field. */ | |
3588 | ia64_flush_insns (); | |
3589 | ||
800eeca4 | 3590 | /* Generate the unwind record. */ |
73f20958 | 3591 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3592 | fixup_unw_records (list, 1); |
73f20958 L |
3593 | size = calc_record_size (list); |
3594 | ||
3595 | if (size > 0 || unwind.force_unwind_entry) | |
3596 | { | |
3597 | unwind.force_unwind_entry = 0; | |
3598 | /* pad to pointer-size boundary. */ | |
3599 | pad = size % md.pointer_size; | |
3600 | if (pad != 0) | |
3601 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3602 | /* Add 8 for the header. */ |
3603 | size += 8; | |
3604 | /* Add a pointer for the personality offset. */ | |
3605 | if (unwind.personality_routine) | |
3606 | size += md.pointer_size; | |
73f20958 | 3607 | } |
6290819d | 3608 | |
800eeca4 JW |
3609 | /* If there are unwind records, switch sections, and output the info. */ |
3610 | if (size != 0) | |
3611 | { | |
800eeca4 | 3612 | expressionS exp; |
1cd8ff38 | 3613 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3614 | |
da9f89d4 | 3615 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3616 | |
557debba JW |
3617 | /* Make sure the section has 4 byte alignment for ILP32 and |
3618 | 8 byte alignment for LP64. */ | |
3619 | frag_align (md.pointer_size_shift, 0, 0); | |
3620 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3621 | |
800eeca4 | 3622 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3623 | unwind.info = expr_build_dot (); |
73f20958 L |
3624 | |
3625 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3626 | (offsetT) (long) unwind.personality_routine, |
3627 | (char *) list); | |
91a2ae2a | 3628 | |
800eeca4 | 3629 | /* Add the personality address to the image. */ |
e0c9811a | 3630 | if (unwind.personality_routine != 0) |
542d6675 | 3631 | { |
40449e9f | 3632 | exp.X_op = O_symbol; |
e0c9811a | 3633 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3634 | exp.X_add_number = 0; |
1cd8ff38 NC |
3635 | |
3636 | if (md.flags & EF_IA_64_BE) | |
3637 | { | |
3638 | if (md.flags & EF_IA_64_ABI64) | |
3639 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3640 | else | |
3641 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3642 | } | |
40449e9f | 3643 | else |
1cd8ff38 NC |
3644 | { |
3645 | if (md.flags & EF_IA_64_ABI64) | |
3646 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3647 | else | |
3648 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3649 | } | |
3650 | ||
3651 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3652 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3653 | unwind.personality_routine = 0; |
542d6675 | 3654 | } |
800eeca4 JW |
3655 | } |
3656 | ||
6290819d | 3657 | free_saved_prologue_counts (); |
e0c9811a | 3658 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3659 | } |
3660 | ||
197865e8 | 3661 | static void |
542d6675 | 3662 | dot_handlerdata (dummy) |
2434f565 | 3663 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3664 | { |
75e09913 JB |
3665 | if (!in_procedure ("handlerdata")) |
3666 | return; | |
91a2ae2a RH |
3667 | unwind.force_unwind_entry = 1; |
3668 | ||
3669 | /* Remember which segment we're in so we can switch back after .endp */ | |
3670 | unwind.saved_text_seg = now_seg; | |
3671 | unwind.saved_text_subseg = now_subseg; | |
3672 | ||
3673 | /* Generate unwind info into unwind-info section and then leave that | |
3674 | section as the currently active one so dataXX directives go into | |
3675 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3676 | generate_unwind_image (now_seg); |
e0c9811a | 3677 | demand_empty_rest_of_line (); |
800eeca4 JW |
3678 | } |
3679 | ||
197865e8 | 3680 | static void |
800eeca4 | 3681 | dot_unwentry (dummy) |
2434f565 | 3682 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3683 | { |
75e09913 JB |
3684 | if (!in_procedure ("unwentry")) |
3685 | return; | |
91a2ae2a | 3686 | unwind.force_unwind_entry = 1; |
e0c9811a | 3687 | demand_empty_rest_of_line (); |
800eeca4 JW |
3688 | } |
3689 | ||
197865e8 | 3690 | static void |
800eeca4 | 3691 | dot_altrp (dummy) |
2434f565 | 3692 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3693 | { |
e0c9811a JW |
3694 | expressionS e; |
3695 | unsigned reg; | |
3696 | ||
75e09913 JB |
3697 | if (!in_prologue ("altrp")) |
3698 | return; | |
3699 | ||
e0c9811a JW |
3700 | parse_operand (&e); |
3701 | reg = e.X_add_number - REG_BR; | |
3702 | if (e.X_op == O_register && reg < 8) | |
3703 | add_unwind_entry (output_rp_br (reg)); | |
3704 | else | |
3705 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3706 | } |
3707 | ||
197865e8 | 3708 | static void |
e0c9811a JW |
3709 | dot_savemem (psprel) |
3710 | int psprel; | |
800eeca4 JW |
3711 | { |
3712 | expressionS e1, e2; | |
3713 | int sep; | |
3714 | int reg1, val; | |
3715 | ||
75e09913 JB |
3716 | if (!in_prologue (psprel ? "savepsp" : "savesp")) |
3717 | return; | |
3718 | ||
800eeca4 JW |
3719 | sep = parse_operand (&e1); |
3720 | if (sep != ',') | |
e0c9811a | 3721 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3722 | sep = parse_operand (&e2); |
3723 | ||
e0c9811a | 3724 | reg1 = e1.X_add_number; |
800eeca4 | 3725 | val = e2.X_add_number; |
197865e8 | 3726 | |
800eeca4 | 3727 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3728 | if (e1.X_op == O_register) |
800eeca4 JW |
3729 | { |
3730 | if (e2.X_op == O_constant) | |
3731 | { | |
3732 | switch (reg1) | |
3733 | { | |
542d6675 KH |
3734 | case REG_AR + AR_BSP: |
3735 | add_unwind_entry (output_bsp_when ()); | |
3736 | add_unwind_entry ((psprel | |
3737 | ? output_bsp_psprel | |
3738 | : output_bsp_sprel) (val)); | |
3739 | break; | |
3740 | case REG_AR + AR_BSPSTORE: | |
3741 | add_unwind_entry (output_bspstore_when ()); | |
3742 | add_unwind_entry ((psprel | |
3743 | ? output_bspstore_psprel | |
3744 | : output_bspstore_sprel) (val)); | |
3745 | break; | |
3746 | case REG_AR + AR_RNAT: | |
3747 | add_unwind_entry (output_rnat_when ()); | |
3748 | add_unwind_entry ((psprel | |
3749 | ? output_rnat_psprel | |
3750 | : output_rnat_sprel) (val)); | |
3751 | break; | |
3752 | case REG_AR + AR_UNAT: | |
3753 | add_unwind_entry (output_unat_when ()); | |
3754 | add_unwind_entry ((psprel | |
3755 | ? output_unat_psprel | |
3756 | : output_unat_sprel) (val)); | |
3757 | break; | |
3758 | case REG_AR + AR_FPSR: | |
3759 | add_unwind_entry (output_fpsr_when ()); | |
3760 | add_unwind_entry ((psprel | |
3761 | ? output_fpsr_psprel | |
3762 | : output_fpsr_sprel) (val)); | |
3763 | break; | |
3764 | case REG_AR + AR_PFS: | |
3765 | add_unwind_entry (output_pfs_when ()); | |
3766 | add_unwind_entry ((psprel | |
3767 | ? output_pfs_psprel | |
3768 | : output_pfs_sprel) (val)); | |
3769 | break; | |
3770 | case REG_AR + AR_LC: | |
3771 | add_unwind_entry (output_lc_when ()); | |
3772 | add_unwind_entry ((psprel | |
3773 | ? output_lc_psprel | |
3774 | : output_lc_sprel) (val)); | |
3775 | break; | |
3776 | case REG_BR: | |
3777 | add_unwind_entry (output_rp_when ()); | |
3778 | add_unwind_entry ((psprel | |
3779 | ? output_rp_psprel | |
3780 | : output_rp_sprel) (val)); | |
3781 | break; | |
3782 | case REG_PR: | |
3783 | add_unwind_entry (output_preds_when ()); | |
3784 | add_unwind_entry ((psprel | |
3785 | ? output_preds_psprel | |
3786 | : output_preds_sprel) (val)); | |
3787 | break; | |
3788 | case REG_PRIUNAT: | |
3789 | add_unwind_entry (output_priunat_when_mem ()); | |
3790 | add_unwind_entry ((psprel | |
3791 | ? output_priunat_psprel | |
3792 | : output_priunat_sprel) (val)); | |
3793 | break; | |
3794 | default: | |
3795 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3796 | } |
3797 | } | |
3798 | else | |
3799 | as_bad (" Second operand not a valid constant"); | |
3800 | } | |
3801 | else | |
e0c9811a | 3802 | as_bad ("First operand not a register"); |
800eeca4 JW |
3803 | } |
3804 | ||
197865e8 | 3805 | static void |
800eeca4 | 3806 | dot_saveg (dummy) |
2434f565 | 3807 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3808 | { |
3809 | expressionS e1, e2; | |
3810 | int sep; | |
75e09913 JB |
3811 | |
3812 | if (!in_prologue ("save.g")) | |
3813 | return; | |
3814 | ||
800eeca4 JW |
3815 | sep = parse_operand (&e1); |
3816 | if (sep == ',') | |
3817 | parse_operand (&e2); | |
197865e8 | 3818 | |
800eeca4 JW |
3819 | if (e1.X_op != O_constant) |
3820 | as_bad ("First operand to .save.g must be a constant."); | |
3821 | else | |
3822 | { | |
3823 | int grmask = e1.X_add_number; | |
3824 | if (sep != ',') | |
3825 | add_unwind_entry (output_gr_mem (grmask)); | |
3826 | else | |
542d6675 | 3827 | { |
800eeca4 | 3828 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3829 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3830 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3831 | else | |
3832 | as_bad ("Second operand is an invalid register."); | |
3833 | } | |
3834 | } | |
3835 | } | |
3836 | ||
197865e8 | 3837 | static void |
800eeca4 | 3838 | dot_savef (dummy) |
2434f565 | 3839 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3840 | { |
e0c9811a | 3841 | expressionS e1; |
800eeca4 | 3842 | int sep; |
75e09913 JB |
3843 | |
3844 | if (!in_prologue ("save.f")) | |
3845 | return; | |
3846 | ||
800eeca4 | 3847 | sep = parse_operand (&e1); |
197865e8 | 3848 | |
800eeca4 JW |
3849 | if (e1.X_op != O_constant) |
3850 | as_bad ("Operand to .save.f must be a constant."); | |
3851 | else | |
e0c9811a | 3852 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3853 | } |
3854 | ||
197865e8 | 3855 | static void |
800eeca4 | 3856 | dot_saveb (dummy) |
2434f565 | 3857 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3858 | { |
e0c9811a JW |
3859 | expressionS e1, e2; |
3860 | unsigned int reg; | |
3861 | unsigned char sep; | |
3862 | int brmask; | |
3863 | ||
75e09913 JB |
3864 | if (!in_prologue ("save.b")) |
3865 | return; | |
3866 | ||
800eeca4 | 3867 | sep = parse_operand (&e1); |
800eeca4 | 3868 | if (e1.X_op != O_constant) |
800eeca4 | 3869 | { |
e0c9811a JW |
3870 | as_bad ("First operand to .save.b must be a constant."); |
3871 | return; | |
800eeca4 | 3872 | } |
e0c9811a JW |
3873 | brmask = e1.X_add_number; |
3874 | ||
3875 | if (sep == ',') | |
3876 | { | |
3877 | sep = parse_operand (&e2); | |
3878 | reg = e2.X_add_number - REG_GR; | |
3879 | if (e2.X_op != O_register || reg > 127) | |
3880 | { | |
3881 | as_bad ("Second operand to .save.b must be a general register."); | |
3882 | return; | |
3883 | } | |
3884 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3885 | } | |
3886 | else | |
3887 | add_unwind_entry (output_br_mem (brmask)); | |
3888 | ||
3889 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3890 | demand_empty_rest_of_line (); |
800eeca4 JW |
3891 | } |
3892 | ||
197865e8 | 3893 | static void |
800eeca4 | 3894 | dot_savegf (dummy) |
2434f565 | 3895 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3896 | { |
3897 | expressionS e1, e2; | |
3898 | int sep; | |
75e09913 JB |
3899 | |
3900 | if (!in_prologue ("save.gf")) | |
3901 | return; | |
3902 | ||
800eeca4 JW |
3903 | sep = parse_operand (&e1); |
3904 | if (sep == ',') | |
3905 | parse_operand (&e2); | |
197865e8 | 3906 | |
800eeca4 JW |
3907 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3908 | as_bad ("Both operands of .save.gf must be constants."); | |
3909 | else | |
3910 | { | |
3911 | int grmask = e1.X_add_number; | |
3912 | int frmask = e2.X_add_number; | |
3913 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3914 | } | |
3915 | } | |
3916 | ||
197865e8 | 3917 | static void |
800eeca4 | 3918 | dot_spill (dummy) |
2434f565 | 3919 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3920 | { |
3921 | expressionS e; | |
e0c9811a JW |
3922 | unsigned char sep; |
3923 | ||
75e09913 JB |
3924 | if (!in_prologue ("spill")) |
3925 | return; | |
3926 | ||
e0c9811a JW |
3927 | sep = parse_operand (&e); |
3928 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3929 | demand_empty_rest_of_line (); |
197865e8 | 3930 | |
800eeca4 JW |
3931 | if (e.X_op != O_constant) |
3932 | as_bad ("Operand to .spill must be a constant"); | |
3933 | else | |
e0c9811a JW |
3934 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3935 | } | |
3936 | ||
3937 | static void | |
3938 | dot_spillreg (dummy) | |
2434f565 | 3939 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a | 3940 | { |
2132e3a3 AM |
3941 | int sep; |
3942 | unsigned int ab, xy, reg, treg; | |
e0c9811a JW |
3943 | expressionS e1, e2; |
3944 | ||
75e09913 JB |
3945 | if (!in_procedure ("spillreg")) |
3946 | return; | |
3947 | ||
e0c9811a JW |
3948 | sep = parse_operand (&e1); |
3949 | if (sep != ',') | |
3950 | { | |
3951 | as_bad ("No second operand to .spillreg"); | |
3952 | return; | |
3953 | } | |
3954 | ||
3955 | parse_operand (&e2); | |
3956 | ||
3957 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3958 | { |
e0c9811a JW |
3959 | as_bad ("First operand to .spillreg must be a preserved register"); |
3960 | return; | |
800eeca4 | 3961 | } |
e0c9811a JW |
3962 | |
3963 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3964 | { | |
3965 | as_bad ("Second operand to .spillreg must be a register"); | |
3966 | return; | |
3967 | } | |
3968 | ||
3969 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3970 | } | |
3971 | ||
3972 | static void | |
3973 | dot_spillmem (psprel) | |
3974 | int psprel; | |
3975 | { | |
3976 | expressionS e1, e2; | |
2132e3a3 AM |
3977 | int sep; |
3978 | unsigned int ab, reg; | |
e0c9811a | 3979 | |
75e09913 JB |
3980 | if (!in_procedure ("spillmem")) |
3981 | return; | |
3982 | ||
e0c9811a JW |
3983 | sep = parse_operand (&e1); |
3984 | if (sep != ',') | |
3985 | { | |
3986 | as_bad ("Second operand missing"); | |
3987 | return; | |
3988 | } | |
3989 | ||
3990 | parse_operand (&e2); | |
3991 | ||
3992 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3993 | { | |
3994 | as_bad ("First operand to .spill%s must be a preserved register", | |
3995 | psprel ? "psp" : "sp"); | |
3996 | return; | |
3997 | } | |
3998 | ||
3999 | if (e2.X_op != O_constant) | |
4000 | { | |
4001 | as_bad ("Second operand to .spill%s must be a constant", | |
4002 | psprel ? "psp" : "sp"); | |
4003 | return; | |
4004 | } | |
4005 | ||
4006 | if (psprel) | |
4007 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
4008 | else | |
4009 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
4010 | } | |
4011 | ||
4012 | static void | |
4013 | dot_spillreg_p (dummy) | |
2434f565 | 4014 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a | 4015 | { |
2132e3a3 AM |
4016 | int sep; |
4017 | unsigned int ab, xy, reg, treg; | |
e0c9811a JW |
4018 | expressionS e1, e2, e3; |
4019 | unsigned int qp; | |
4020 | ||
75e09913 JB |
4021 | if (!in_procedure ("spillreg.p")) |
4022 | return; | |
4023 | ||
e0c9811a JW |
4024 | sep = parse_operand (&e1); |
4025 | if (sep != ',') | |
4026 | { | |
4027 | as_bad ("No second and third operand to .spillreg.p"); | |
4028 | return; | |
4029 | } | |
4030 | ||
4031 | sep = parse_operand (&e2); | |
4032 | if (sep != ',') | |
4033 | { | |
4034 | as_bad ("No third operand to .spillreg.p"); | |
4035 | return; | |
4036 | } | |
4037 | ||
4038 | parse_operand (&e3); | |
4039 | ||
4040 | qp = e1.X_add_number - REG_P; | |
4041 | ||
4042 | if (e1.X_op != O_register || qp > 63) | |
4043 | { | |
4044 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
4045 | return; | |
4046 | } | |
4047 | ||
4048 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4049 | { | |
4050 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
4051 | return; | |
4052 | } | |
4053 | ||
4054 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
4055 | { | |
4056 | as_bad ("Third operand to .spillreg.p must be a register"); | |
4057 | return; | |
4058 | } | |
4059 | ||
4060 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
4061 | } | |
4062 | ||
4063 | static void | |
4064 | dot_spillmem_p (psprel) | |
4065 | int psprel; | |
4066 | { | |
4067 | expressionS e1, e2, e3; | |
2132e3a3 AM |
4068 | int sep; |
4069 | unsigned int ab, reg; | |
e0c9811a JW |
4070 | unsigned int qp; |
4071 | ||
75e09913 JB |
4072 | if (!in_procedure ("spillmem.p")) |
4073 | return; | |
4074 | ||
e0c9811a JW |
4075 | sep = parse_operand (&e1); |
4076 | if (sep != ',') | |
4077 | { | |
4078 | as_bad ("Second operand missing"); | |
4079 | return; | |
4080 | } | |
4081 | ||
4082 | parse_operand (&e2); | |
4083 | if (sep != ',') | |
4084 | { | |
4085 | as_bad ("Second operand missing"); | |
4086 | return; | |
4087 | } | |
4088 | ||
4089 | parse_operand (&e3); | |
4090 | ||
4091 | qp = e1.X_add_number - REG_P; | |
4092 | if (e1.X_op != O_register || qp > 63) | |
4093 | { | |
4094 | as_bad ("First operand to .spill%s_p must be a predicate", | |
4095 | psprel ? "psp" : "sp"); | |
4096 | return; | |
4097 | } | |
4098 | ||
4099 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4100 | { | |
4101 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
4102 | psprel ? "psp" : "sp"); | |
4103 | return; | |
4104 | } | |
4105 | ||
4106 | if (e3.X_op != O_constant) | |
4107 | { | |
4108 | as_bad ("Third operand to .spill%s_p must be a constant", | |
4109 | psprel ? "psp" : "sp"); | |
4110 | return; | |
4111 | } | |
4112 | ||
4113 | if (psprel) | |
fa7fda74 | 4114 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 4115 | else |
fa7fda74 | 4116 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
4117 | } |
4118 | ||
6290819d NC |
4119 | static unsigned int |
4120 | get_saved_prologue_count (lbl) | |
4121 | unsigned long lbl; | |
4122 | { | |
4123 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4124 | ||
4125 | while (lpc != NULL && lpc->label_number != lbl) | |
4126 | lpc = lpc->next; | |
4127 | ||
4128 | if (lpc != NULL) | |
4129 | return lpc->prologue_count; | |
4130 | ||
4131 | as_bad ("Missing .label_state %ld", lbl); | |
4132 | return 1; | |
4133 | } | |
4134 | ||
4135 | static void | |
4136 | save_prologue_count (lbl, count) | |
4137 | unsigned long lbl; | |
4138 | unsigned int count; | |
4139 | { | |
4140 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4141 | ||
4142 | while (lpc != NULL && lpc->label_number != lbl) | |
4143 | lpc = lpc->next; | |
4144 | ||
4145 | if (lpc != NULL) | |
4146 | lpc->prologue_count = count; | |
4147 | else | |
4148 | { | |
40449e9f | 4149 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4150 | |
4151 | new_lpc->next = unwind.saved_prologue_counts; | |
4152 | new_lpc->label_number = lbl; | |
4153 | new_lpc->prologue_count = count; | |
4154 | unwind.saved_prologue_counts = new_lpc; | |
4155 | } | |
4156 | } | |
4157 | ||
4158 | static void | |
4159 | free_saved_prologue_counts () | |
4160 | { | |
40449e9f KH |
4161 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4162 | label_prologue_count *next; | |
6290819d NC |
4163 | |
4164 | while (lpc != NULL) | |
4165 | { | |
4166 | next = lpc->next; | |
4167 | free (lpc); | |
4168 | lpc = next; | |
4169 | } | |
4170 | ||
4171 | unwind.saved_prologue_counts = NULL; | |
4172 | } | |
4173 | ||
e0c9811a JW |
4174 | static void |
4175 | dot_label_state (dummy) | |
2434f565 | 4176 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4177 | { |
4178 | expressionS e; | |
4179 | ||
75e09913 JB |
4180 | if (!in_body ("label_state")) |
4181 | return; | |
4182 | ||
e0c9811a JW |
4183 | parse_operand (&e); |
4184 | if (e.X_op != O_constant) | |
4185 | { | |
4186 | as_bad ("Operand to .label_state must be a constant"); | |
4187 | return; | |
4188 | } | |
4189 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 4190 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
4191 | } |
4192 | ||
4193 | static void | |
4194 | dot_copy_state (dummy) | |
2434f565 | 4195 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4196 | { |
4197 | expressionS e; | |
4198 | ||
75e09913 JB |
4199 | if (!in_body ("copy_state")) |
4200 | return; | |
4201 | ||
e0c9811a JW |
4202 | parse_operand (&e); |
4203 | if (e.X_op != O_constant) | |
4204 | { | |
4205 | as_bad ("Operand to .copy_state must be a constant"); | |
4206 | return; | |
4207 | } | |
4208 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 4209 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
4210 | } |
4211 | ||
197865e8 | 4212 | static void |
800eeca4 | 4213 | dot_unwabi (dummy) |
2434f565 | 4214 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4215 | { |
e0c9811a JW |
4216 | expressionS e1, e2; |
4217 | unsigned char sep; | |
4218 | ||
75e09913 JB |
4219 | if (!in_procedure ("unwabi")) |
4220 | return; | |
4221 | ||
e0c9811a JW |
4222 | sep = parse_operand (&e1); |
4223 | if (sep != ',') | |
4224 | { | |
4225 | as_bad ("Second operand to .unwabi missing"); | |
4226 | return; | |
4227 | } | |
4228 | sep = parse_operand (&e2); | |
4229 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 4230 | demand_empty_rest_of_line (); |
e0c9811a JW |
4231 | |
4232 | if (e1.X_op != O_constant) | |
4233 | { | |
4234 | as_bad ("First operand to .unwabi must be a constant"); | |
4235 | return; | |
4236 | } | |
4237 | ||
4238 | if (e2.X_op != O_constant) | |
4239 | { | |
4240 | as_bad ("Second operand to .unwabi must be a constant"); | |
4241 | return; | |
4242 | } | |
4243 | ||
4244 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
4245 | } |
4246 | ||
197865e8 | 4247 | static void |
800eeca4 | 4248 | dot_personality (dummy) |
2434f565 | 4249 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4250 | { |
4251 | char *name, *p, c; | |
75e09913 JB |
4252 | if (!in_procedure ("personality")) |
4253 | return; | |
800eeca4 JW |
4254 | SKIP_WHITESPACE (); |
4255 | name = input_line_pointer; | |
4256 | c = get_symbol_end (); | |
4257 | p = input_line_pointer; | |
e0c9811a | 4258 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4259 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4260 | *p = c; |
4261 | SKIP_WHITESPACE (); | |
4262 | demand_empty_rest_of_line (); | |
4263 | } | |
4264 | ||
4265 | static void | |
4266 | dot_proc (dummy) | |
2434f565 | 4267 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4268 | { |
4269 | char *name, *p, c; | |
4270 | symbolS *sym; | |
4271 | ||
75e09913 | 4272 | unwind.proc_start = 0; |
e0c9811a | 4273 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4274 | function symbols: */ |
800eeca4 JW |
4275 | while (1) |
4276 | { | |
4277 | SKIP_WHITESPACE (); | |
4278 | name = input_line_pointer; | |
4279 | c = get_symbol_end (); | |
4280 | p = input_line_pointer; | |
75e09913 JB |
4281 | if (!*name) |
4282 | as_bad ("Empty argument of .proc"); | |
4283 | else | |
542d6675 | 4284 | { |
75e09913 JB |
4285 | sym = symbol_find_or_make (name); |
4286 | if (S_IS_DEFINED (sym)) | |
4287 | as_bad ("`%s' was already defined", name); | |
4288 | else if (unwind.proc_start == 0) | |
4289 | { | |
4290 | unwind.proc_start = sym; | |
4291 | } | |
4292 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4293 | } |
800eeca4 JW |
4294 | *p = c; |
4295 | SKIP_WHITESPACE (); | |
4296 | if (*input_line_pointer != ',') | |
4297 | break; | |
4298 | ++input_line_pointer; | |
4299 | } | |
75e09913 JB |
4300 | if (unwind.proc_start == 0) |
4301 | unwind.proc_start = expr_build_dot (); | |
800eeca4 JW |
4302 | demand_empty_rest_of_line (); |
4303 | ia64_do_align (16); | |
4304 | ||
75e09913 | 4305 | unwind.prologue = 0; |
33d01f33 | 4306 | unwind.prologue_count = 0; |
75e09913 JB |
4307 | unwind.body = 0; |
4308 | unwind.insn = 0; | |
e0c9811a JW |
4309 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4310 | unwind.personality_routine = 0; | |
800eeca4 JW |
4311 | } |
4312 | ||
4313 | static void | |
4314 | dot_body (dummy) | |
2434f565 | 4315 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4316 | { |
75e09913 JB |
4317 | if (!in_procedure ("body")) |
4318 | return; | |
4319 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
4320 | as_warn ("Initial .body should precede any instructions"); | |
4321 | ||
e0c9811a | 4322 | unwind.prologue = 0; |
30d25259 | 4323 | unwind.prologue_mask = 0; |
75e09913 | 4324 | unwind.body = 1; |
30d25259 | 4325 | |
800eeca4 | 4326 | add_unwind_entry (output_body ()); |
e0c9811a | 4327 | demand_empty_rest_of_line (); |
800eeca4 JW |
4328 | } |
4329 | ||
4330 | static void | |
4331 | dot_prologue (dummy) | |
2434f565 | 4332 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4333 | { |
e0c9811a | 4334 | unsigned char sep; |
2434f565 | 4335 | int mask = 0, grsave = 0; |
e0c9811a | 4336 | |
75e09913 JB |
4337 | if (!in_procedure ("prologue")) |
4338 | return; | |
4339 | if (unwind.prologue) | |
4340 | { | |
4341 | as_bad (".prologue within prologue"); | |
4342 | ignore_rest_of_line (); | |
4343 | return; | |
4344 | } | |
4345 | if (!unwind.body && unwind.insn) | |
4346 | as_warn ("Initial .prologue should precede any instructions"); | |
4347 | ||
e0c9811a | 4348 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
4349 | { |
4350 | expressionS e1, e2; | |
800eeca4 JW |
4351 | sep = parse_operand (&e1); |
4352 | if (sep != ',') | |
4353 | as_bad ("No second operand to .prologue"); | |
4354 | sep = parse_operand (&e2); | |
e0c9811a | 4355 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
c95b35a9 | 4356 | demand_empty_rest_of_line (); |
800eeca4 JW |
4357 | |
4358 | if (e1.X_op == O_constant) | |
542d6675 | 4359 | { |
30d25259 RH |
4360 | mask = e1.X_add_number; |
4361 | ||
800eeca4 | 4362 | if (e2.X_op == O_constant) |
30d25259 RH |
4363 | grsave = e2.X_add_number; |
4364 | else if (e2.X_op == O_register | |
4365 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
4366 | ; | |
800eeca4 | 4367 | else |
30d25259 RH |
4368 | as_bad ("Second operand not a constant or general register"); |
4369 | ||
4370 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
4371 | } |
4372 | else | |
4373 | as_bad ("First operand not a constant"); | |
4374 | } | |
4375 | else | |
4376 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4377 | |
4378 | unwind.prologue = 1; | |
4379 | unwind.prologue_mask = mask; | |
75e09913 | 4380 | unwind.body = 0; |
33d01f33 | 4381 | ++unwind.prologue_count; |
800eeca4 JW |
4382 | } |
4383 | ||
4384 | static void | |
4385 | dot_endp (dummy) | |
2434f565 | 4386 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4387 | { |
4388 | expressionS e; | |
44f5c83a | 4389 | int bytes_per_address; |
800eeca4 JW |
4390 | long where; |
4391 | segT saved_seg; | |
4392 | subsegT saved_subseg; | |
970d6792 | 4393 | char *name, *default_name, *p, c; |
c538998c | 4394 | symbolS *sym; |
970d6792 | 4395 | int unwind_check = md.unwind_check; |
800eeca4 | 4396 | |
970d6792 | 4397 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4398 | if (!in_procedure ("endp")) |
4399 | return; | |
970d6792 | 4400 | md.unwind_check = unwind_check; |
75e09913 | 4401 | |
91a2ae2a RH |
4402 | if (unwind.saved_text_seg) |
4403 | { | |
4404 | saved_seg = unwind.saved_text_seg; | |
4405 | saved_subseg = unwind.saved_text_subseg; | |
4406 | unwind.saved_text_seg = NULL; | |
4407 | } | |
4408 | else | |
4409 | { | |
4410 | saved_seg = now_seg; | |
4411 | saved_subseg = now_subseg; | |
4412 | } | |
4413 | ||
800eeca4 | 4414 | insn_group_break (1, 0, 0); |
800eeca4 | 4415 | |
91a2ae2a RH |
4416 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4417 | if (!unwind.info) | |
2d6ed997 | 4418 | generate_unwind_image (saved_seg); |
800eeca4 | 4419 | |
91a2ae2a RH |
4420 | if (unwind.info || unwind.force_unwind_entry) |
4421 | { | |
75e09913 JB |
4422 | symbolS *proc_end; |
4423 | ||
91a2ae2a | 4424 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4425 | proc_end = expr_build_dot (); |
5e7474a7 | 4426 | |
da9f89d4 | 4427 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4428 | |
557debba JW |
4429 | /* Make sure that section has 4 byte alignment for ILP32 and |
4430 | 8 byte alignment for LP64. */ | |
4431 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4432 | |
557debba JW |
4433 | /* Need space for 3 pointers for procedure start, procedure end, |
4434 | and unwind info. */ | |
6baf2b51 | 4435 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4436 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4437 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4438 | |
40449e9f | 4439 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4440 | e.X_op = O_pseudo_fixup; |
4441 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4442 | e.X_add_number = 0; | |
4600db48 JB |
4443 | if (!S_IS_LOCAL (unwind.proc_start) |
4444 | && S_IS_DEFINED (unwind.proc_start)) | |
4445 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_start), | |
4446 | S_GET_VALUE (unwind.proc_start), | |
4447 | symbol_get_frag (unwind.proc_start)); | |
4448 | else | |
4449 | e.X_add_symbol = unwind.proc_start; | |
91a2ae2a | 4450 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4451 | |
800eeca4 JW |
4452 | e.X_op = O_pseudo_fixup; |
4453 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4454 | e.X_add_number = 0; | |
75e09913 | 4455 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4456 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4457 | bytes_per_address, &e); | |
4458 | ||
4459 | if (unwind.info) | |
4460 | { | |
4461 | e.X_op = O_pseudo_fixup; | |
4462 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4463 | e.X_add_number = 0; | |
4464 | e.X_add_symbol = unwind.info; | |
4465 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4466 | bytes_per_address, &e); | |
4467 | } | |
91a2ae2a | 4468 | } |
800eeca4 | 4469 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4470 | |
970d6792 L |
4471 | if (unwind.proc_start) |
4472 | default_name = (char *) S_GET_NAME (unwind.proc_start); | |
4473 | else | |
4474 | default_name = NULL; | |
4475 | ||
c538998c JJ |
4476 | /* Parse names of main and alternate entry points and set symbol sizes. */ |
4477 | while (1) | |
4478 | { | |
4479 | SKIP_WHITESPACE (); | |
4480 | name = input_line_pointer; | |
4481 | c = get_symbol_end (); | |
4482 | p = input_line_pointer; | |
75e09913 | 4483 | if (!*name) |
970d6792 L |
4484 | { |
4485 | if (md.unwind_check == unwind_check_warning) | |
4486 | { | |
4487 | if (default_name) | |
4488 | { | |
4489 | as_warn ("Empty argument of .endp. Use the default name `%s'", | |
4490 | default_name); | |
4491 | name = default_name; | |
4492 | } | |
4493 | else | |
4494 | as_warn ("Empty argument of .endp"); | |
4495 | } | |
4496 | else | |
4497 | as_bad ("Empty argument of .endp"); | |
4498 | } | |
4499 | if (*name) | |
75e09913 JB |
4500 | { |
4501 | sym = symbol_find (name); | |
970d6792 L |
4502 | if (!sym |
4503 | && md.unwind_check == unwind_check_warning | |
4504 | && default_name | |
4505 | && default_name != name) | |
4506 | { | |
4507 | /* We have a bad name. Try the default one if needed. */ | |
4508 | as_warn ("`%s' was not defined within procedure. Use the default name `%s'", | |
4509 | name, default_name); | |
4510 | name = default_name; | |
4511 | sym = symbol_find (name); | |
4512 | } | |
75e09913 JB |
4513 | if (!sym || !S_IS_DEFINED (sym)) |
4514 | as_bad ("`%s' was not defined within procedure", name); | |
4515 | else if (unwind.proc_start | |
4516 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4517 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4518 | { | |
4519 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4520 | fragS *frag = symbol_get_frag (sym); | |
4521 | ||
4522 | /* Check whether the function label is at or beyond last | |
4523 | .proc directive. */ | |
4524 | while (fr && fr != frag) | |
4525 | fr = fr->fr_next; | |
4526 | if (fr) | |
c538998c | 4527 | { |
75e09913 JB |
4528 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4529 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4530 | else | |
4531 | { | |
4532 | symbol_get_obj (sym)->size = | |
4533 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4534 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4535 | symbol_get_obj (sym)->size->X_add_symbol | |
4536 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4537 | frag_now_fix (), frag_now); | |
4538 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4539 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4540 | } | |
c538998c JJ |
4541 | } |
4542 | } | |
4543 | } | |
4544 | *p = c; | |
4545 | SKIP_WHITESPACE (); | |
4546 | if (*input_line_pointer != ',') | |
4547 | break; | |
4548 | ++input_line_pointer; | |
4549 | } | |
4550 | demand_empty_rest_of_line (); | |
75e09913 | 4551 | unwind.proc_start = unwind.info = 0; |
800eeca4 JW |
4552 | } |
4553 | ||
4554 | static void | |
4555 | dot_template (template) | |
4556 | int template; | |
4557 | { | |
4558 | CURR_SLOT.user_template = template; | |
4559 | } | |
4560 | ||
4561 | static void | |
4562 | dot_regstk (dummy) | |
2434f565 | 4563 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4564 | { |
4565 | int ins, locs, outs, rots; | |
4566 | ||
4567 | if (is_it_end_of_statement ()) | |
4568 | ins = locs = outs = rots = 0; | |
4569 | else | |
4570 | { | |
4571 | ins = get_absolute_expression (); | |
4572 | if (*input_line_pointer++ != ',') | |
4573 | goto err; | |
4574 | locs = get_absolute_expression (); | |
4575 | if (*input_line_pointer++ != ',') | |
4576 | goto err; | |
4577 | outs = get_absolute_expression (); | |
4578 | if (*input_line_pointer++ != ',') | |
4579 | goto err; | |
4580 | rots = get_absolute_expression (); | |
4581 | } | |
4582 | set_regstack (ins, locs, outs, rots); | |
4583 | return; | |
4584 | ||
4585 | err: | |
4586 | as_bad ("Comma expected"); | |
4587 | ignore_rest_of_line (); | |
4588 | } | |
4589 | ||
4590 | static void | |
4591 | dot_rot (type) | |
4592 | int type; | |
4593 | { | |
4594 | unsigned num_regs, num_alloced = 0; | |
4595 | struct dynreg **drpp, *dr; | |
4596 | int ch, base_reg = 0; | |
4597 | char *name, *start; | |
4598 | size_t len; | |
4599 | ||
4600 | switch (type) | |
4601 | { | |
4602 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4603 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4604 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4605 | default: break; | |
4606 | } | |
4607 | ||
542d6675 | 4608 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4609 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4610 | { | |
4611 | hash_delete (md.dynreg_hash, dr->name); | |
20b36a95 | 4612 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4613 | dr->num_regs = 0; |
4614 | } | |
4615 | ||
4616 | drpp = &md.dynreg[type]; | |
4617 | while (1) | |
4618 | { | |
4619 | start = input_line_pointer; | |
4620 | ch = get_symbol_end (); | |
20b36a95 | 4621 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4622 | *input_line_pointer = ch; |
800eeca4 JW |
4623 | |
4624 | SKIP_WHITESPACE (); | |
4625 | if (*input_line_pointer != '[') | |
4626 | { | |
4627 | as_bad ("Expected '['"); | |
4628 | goto err; | |
4629 | } | |
4630 | ++input_line_pointer; /* skip '[' */ | |
4631 | ||
4632 | num_regs = get_absolute_expression (); | |
4633 | ||
4634 | if (*input_line_pointer++ != ']') | |
4635 | { | |
4636 | as_bad ("Expected ']'"); | |
4637 | goto err; | |
4638 | } | |
4639 | SKIP_WHITESPACE (); | |
4640 | ||
4641 | num_alloced += num_regs; | |
4642 | switch (type) | |
4643 | { | |
4644 | case DYNREG_GR: | |
4645 | if (num_alloced > md.rot.num_regs) | |
4646 | { | |
4647 | as_bad ("Used more than the declared %d rotating registers", | |
4648 | md.rot.num_regs); | |
4649 | goto err; | |
4650 | } | |
4651 | break; | |
4652 | case DYNREG_FR: | |
4653 | if (num_alloced > 96) | |
4654 | { | |
4655 | as_bad ("Used more than the available 96 rotating registers"); | |
4656 | goto err; | |
4657 | } | |
4658 | break; | |
4659 | case DYNREG_PR: | |
4660 | if (num_alloced > 48) | |
4661 | { | |
4662 | as_bad ("Used more than the available 48 rotating registers"); | |
4663 | goto err; | |
4664 | } | |
4665 | break; | |
4666 | ||
4667 | default: | |
4668 | break; | |
4669 | } | |
4670 | ||
800eeca4 JW |
4671 | if (!*drpp) |
4672 | { | |
4673 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4674 | memset (*drpp, 0, sizeof (*dr)); | |
4675 | } | |
4676 | ||
20b36a95 JB |
4677 | name = obstack_alloc (¬es, len + 1); |
4678 | memcpy (name, start, len); | |
4679 | name[len] = '\0'; | |
4680 | ||
800eeca4 JW |
4681 | dr = *drpp; |
4682 | dr->name = name; | |
4683 | dr->num_regs = num_regs; | |
4684 | dr->base = base_reg; | |
4685 | drpp = &dr->next; | |
4686 | base_reg += num_regs; | |
4687 | ||
4688 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4689 | { | |
4690 | as_bad ("Attempt to redefine register set `%s'", name); | |
20b36a95 | 4691 | obstack_free (¬es, name); |
800eeca4 JW |
4692 | goto err; |
4693 | } | |
4694 | ||
4695 | if (*input_line_pointer != ',') | |
4696 | break; | |
4697 | ++input_line_pointer; /* skip comma */ | |
4698 | SKIP_WHITESPACE (); | |
4699 | } | |
4700 | demand_empty_rest_of_line (); | |
4701 | return; | |
4702 | ||
4703 | err: | |
4704 | ignore_rest_of_line (); | |
4705 | } | |
4706 | ||
4707 | static void | |
4708 | dot_byteorder (byteorder) | |
4709 | int byteorder; | |
4710 | { | |
10a98291 L |
4711 | segment_info_type *seginfo = seg_info (now_seg); |
4712 | ||
4713 | if (byteorder == -1) | |
4714 | { | |
4715 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4716 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4717 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4718 | } | |
4719 | else | |
4720 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4721 | ||
4722 | if (target_big_endian != byteorder) | |
4723 | { | |
4724 | target_big_endian = byteorder; | |
4725 | if (target_big_endian) | |
4726 | { | |
4727 | ia64_number_to_chars = number_to_chars_bigendian; | |
4728 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4729 | } | |
4730 | else | |
4731 | { | |
4732 | ia64_number_to_chars = number_to_chars_littleendian; | |
4733 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4734 | } | |
4735 | } | |
800eeca4 JW |
4736 | } |
4737 | ||
4738 | static void | |
4739 | dot_psr (dummy) | |
2434f565 | 4740 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4741 | { |
4742 | char *option; | |
4743 | int ch; | |
4744 | ||
4745 | while (1) | |
4746 | { | |
4747 | option = input_line_pointer; | |
4748 | ch = get_symbol_end (); | |
4749 | if (strcmp (option, "lsb") == 0) | |
4750 | md.flags &= ~EF_IA_64_BE; | |
4751 | else if (strcmp (option, "msb") == 0) | |
4752 | md.flags |= EF_IA_64_BE; | |
4753 | else if (strcmp (option, "abi32") == 0) | |
4754 | md.flags &= ~EF_IA_64_ABI64; | |
4755 | else if (strcmp (option, "abi64") == 0) | |
4756 | md.flags |= EF_IA_64_ABI64; | |
4757 | else | |
4758 | as_bad ("Unknown psr option `%s'", option); | |
4759 | *input_line_pointer = ch; | |
4760 | ||
4761 | SKIP_WHITESPACE (); | |
4762 | if (*input_line_pointer != ',') | |
4763 | break; | |
4764 | ||
4765 | ++input_line_pointer; | |
4766 | SKIP_WHITESPACE (); | |
4767 | } | |
4768 | demand_empty_rest_of_line (); | |
4769 | } | |
4770 | ||
800eeca4 JW |
4771 | static void |
4772 | dot_ln (dummy) | |
2434f565 | 4773 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4774 | { |
4775 | new_logical_line (0, get_absolute_expression ()); | |
4776 | demand_empty_rest_of_line (); | |
4777 | } | |
4778 | ||
ef6a2b41 JB |
4779 | static void |
4780 | cross_section (ref, cons, ua) | |
4781 | int ref; | |
4782 | void (*cons) PARAMS((int)); | |
4783 | int ua; | |
800eeca4 | 4784 | { |
ef6a2b41 JB |
4785 | char *start, *end; |
4786 | int saved_auto_align; | |
4787 | unsigned int section_count; | |
800eeca4 JW |
4788 | |
4789 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4790 | start = input_line_pointer; |
4791 | if (*start == '"') | |
4792 | { | |
4793 | int len; | |
4794 | char *name; | |
4795 | ||
b3f19c14 | 4796 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4797 | obstack_free(¬es, name); |
4798 | if (!name) | |
4799 | { | |
4800 | ignore_rest_of_line (); | |
4801 | return; | |
4802 | } | |
4803 | } | |
b3f19c14 | 4804 | else |
800eeca4 | 4805 | { |
b3f19c14 JB |
4806 | char c = get_symbol_end (); |
4807 | ||
4808 | if (input_line_pointer == start) | |
4809 | { | |
4810 | as_bad ("Missing section name"); | |
4811 | ignore_rest_of_line (); | |
ef6a2b41 | 4812 | return; |
b3f19c14 | 4813 | } |
b3f19c14 | 4814 | *input_line_pointer = c; |
800eeca4 | 4815 | } |
ef6a2b41 | 4816 | end = input_line_pointer; |
800eeca4 JW |
4817 | SKIP_WHITESPACE (); |
4818 | if (*input_line_pointer != ',') | |
4819 | { | |
4820 | as_bad ("Comma expected after section name"); | |
4821 | ignore_rest_of_line (); | |
ef6a2b41 | 4822 | return; |
800eeca4 | 4823 | } |
ef6a2b41 JB |
4824 | *end = '\0'; |
4825 | end = input_line_pointer + 1; /* skip comma */ | |
4826 | input_line_pointer = start; | |
4827 | md.keep_pending_output = 1; | |
4828 | section_count = bfd_count_sections(stdoutput); | |
4829 | obj_elf_section (0); | |
4830 | if (section_count != bfd_count_sections(stdoutput)) | |
4831 | as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."); | |
4832 | input_line_pointer = end; | |
4833 | saved_auto_align = md.auto_align; | |
4834 | if (ua) | |
4835 | md.auto_align = 0; | |
4836 | (*cons) (ref); | |
4837 | if (ua) | |
4838 | md.auto_align = saved_auto_align; | |
4839 | obj_elf_previous (0); | |
4840 | md.keep_pending_output = 0; | |
800eeca4 JW |
4841 | } |
4842 | ||
4843 | static void | |
4844 | dot_xdata (size) | |
4845 | int size; | |
4846 | { | |
ef6a2b41 | 4847 | cross_section (size, cons, 0); |
800eeca4 JW |
4848 | } |
4849 | ||
4850 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4851 | |
800eeca4 JW |
4852 | static void |
4853 | stmt_float_cons (kind) | |
4854 | int kind; | |
4855 | { | |
165a7f90 | 4856 | size_t alignment; |
800eeca4 JW |
4857 | |
4858 | switch (kind) | |
4859 | { | |
165a7f90 L |
4860 | case 'd': |
4861 | alignment = 8; | |
4862 | break; | |
4863 | ||
4864 | case 'x': | |
4865 | case 'X': | |
4866 | alignment = 16; | |
4867 | break; | |
800eeca4 JW |
4868 | |
4869 | case 'f': | |
4870 | default: | |
165a7f90 | 4871 | alignment = 4; |
800eeca4 JW |
4872 | break; |
4873 | } | |
165a7f90 | 4874 | ia64_do_align (alignment); |
800eeca4 JW |
4875 | float_cons (kind); |
4876 | } | |
4877 | ||
4878 | static void | |
4879 | stmt_cons_ua (size) | |
4880 | int size; | |
4881 | { | |
4882 | int saved_auto_align = md.auto_align; | |
4883 | ||
4884 | md.auto_align = 0; | |
4885 | cons (size); | |
4886 | md.auto_align = saved_auto_align; | |
4887 | } | |
4888 | ||
4889 | static void | |
4890 | dot_xfloat_cons (kind) | |
4891 | int kind; | |
4892 | { | |
ef6a2b41 | 4893 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4894 | } |
4895 | ||
4896 | static void | |
4897 | dot_xstringer (zero) | |
4898 | int zero; | |
4899 | { | |
ef6a2b41 | 4900 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4901 | } |
4902 | ||
4903 | static void | |
4904 | dot_xdata_ua (size) | |
4905 | int size; | |
4906 | { | |
ef6a2b41 | 4907 | cross_section (size, cons, 1); |
800eeca4 JW |
4908 | } |
4909 | ||
4910 | static void | |
4911 | dot_xfloat_cons_ua (kind) | |
4912 | int kind; | |
4913 | { | |
ef6a2b41 | 4914 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4915 | } |
4916 | ||
4917 | /* .reg.val <regname>,value */ | |
542d6675 | 4918 | |
800eeca4 JW |
4919 | static void |
4920 | dot_reg_val (dummy) | |
2434f565 | 4921 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4922 | { |
4923 | expressionS reg; | |
4924 | ||
4925 | expression (®); | |
4926 | if (reg.X_op != O_register) | |
4927 | { | |
4928 | as_bad (_("Register name expected")); | |
4929 | ignore_rest_of_line (); | |
4930 | } | |
4931 | else if (*input_line_pointer++ != ',') | |
4932 | { | |
4933 | as_bad (_("Comma expected")); | |
4934 | ignore_rest_of_line (); | |
4935 | } | |
197865e8 | 4936 | else |
800eeca4 JW |
4937 | { |
4938 | valueT value = get_absolute_expression (); | |
4939 | int regno = reg.X_add_number; | |
a66d2bb7 | 4940 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4941 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4942 | else |
542d6675 KH |
4943 | { |
4944 | gr_values[regno - REG_GR].known = 1; | |
4945 | gr_values[regno - REG_GR].value = value; | |
4946 | gr_values[regno - REG_GR].path = md.path; | |
4947 | } | |
800eeca4 JW |
4948 | } |
4949 | demand_empty_rest_of_line (); | |
4950 | } | |
4951 | ||
5e819f9c JW |
4952 | /* |
4953 | .serialize.data | |
4954 | .serialize.instruction | |
4955 | */ | |
4956 | static void | |
4957 | dot_serialize (type) | |
4958 | int type; | |
4959 | { | |
4960 | insn_group_break (0, 0, 0); | |
4961 | if (type) | |
4962 | instruction_serialization (); | |
4963 | else | |
4964 | data_serialization (); | |
4965 | insn_group_break (0, 0, 0); | |
4966 | demand_empty_rest_of_line (); | |
4967 | } | |
4968 | ||
197865e8 | 4969 | /* select dv checking mode |
800eeca4 JW |
4970 | .auto |
4971 | .explicit | |
4972 | .default | |
4973 | ||
197865e8 | 4974 | A stop is inserted when changing modes |
800eeca4 | 4975 | */ |
542d6675 | 4976 | |
800eeca4 JW |
4977 | static void |
4978 | dot_dv_mode (type) | |
542d6675 | 4979 | int type; |
800eeca4 JW |
4980 | { |
4981 | if (md.manual_bundling) | |
4982 | as_warn (_("Directive invalid within a bundle")); | |
4983 | ||
4984 | if (type == 'E' || type == 'A') | |
4985 | md.mode_explicitly_set = 0; | |
4986 | else | |
4987 | md.mode_explicitly_set = 1; | |
4988 | ||
4989 | md.detect_dv = 1; | |
4990 | switch (type) | |
4991 | { | |
4992 | case 'A': | |
4993 | case 'a': | |
4994 | if (md.explicit_mode) | |
542d6675 | 4995 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4996 | md.explicit_mode = 0; |
4997 | break; | |
4998 | case 'E': | |
4999 | case 'e': | |
5000 | if (!md.explicit_mode) | |
542d6675 | 5001 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5002 | md.explicit_mode = 1; |
5003 | break; | |
5004 | default: | |
5005 | case 'd': | |
5006 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5007 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5008 | md.explicit_mode = md.default_explicit_mode; |
5009 | md.mode_explicitly_set = 0; | |
5010 | break; | |
5011 | } | |
5012 | } | |
5013 | ||
5014 | static void | |
5015 | print_prmask (mask) | |
542d6675 | 5016 | valueT mask; |
800eeca4 JW |
5017 | { |
5018 | int regno; | |
5019 | char *comma = ""; | |
542d6675 | 5020 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5021 | { |
542d6675 KH |
5022 | if (mask & ((valueT) 1 << regno)) |
5023 | { | |
5024 | fprintf (stderr, "%s p%d", comma, regno); | |
5025 | comma = ","; | |
5026 | } | |
800eeca4 JW |
5027 | } |
5028 | } | |
5029 | ||
5030 | /* | |
05ee4b0f JB |
5031 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5032 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5033 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5034 | .pred.safe_across_calls p1 [, p2 [,...]] |
5035 | */ | |
542d6675 | 5036 | |
800eeca4 JW |
5037 | static void |
5038 | dot_pred_rel (type) | |
542d6675 | 5039 | int type; |
800eeca4 JW |
5040 | { |
5041 | valueT mask = 0; | |
5042 | int count = 0; | |
5043 | int p1 = -1, p2 = -1; | |
5044 | ||
5045 | if (type == 0) | |
5046 | { | |
05ee4b0f | 5047 | if (*input_line_pointer == '"') |
542d6675 KH |
5048 | { |
5049 | int len; | |
5050 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5051 | |
542d6675 KH |
5052 | if (strcmp (form, "mutex") == 0) |
5053 | type = 'm'; | |
5054 | else if (strcmp (form, "clear") == 0) | |
5055 | type = 'c'; | |
5056 | else if (strcmp (form, "imply") == 0) | |
5057 | type = 'i'; | |
05ee4b0f JB |
5058 | obstack_free (¬es, form); |
5059 | } | |
5060 | else if (*input_line_pointer == '@') | |
5061 | { | |
5062 | char *form = ++input_line_pointer; | |
5063 | char c = get_symbol_end(); | |
5064 | ||
5065 | if (strcmp (form, "mutex") == 0) | |
5066 | type = 'm'; | |
5067 | else if (strcmp (form, "clear") == 0) | |
5068 | type = 'c'; | |
5069 | else if (strcmp (form, "imply") == 0) | |
5070 | type = 'i'; | |
5071 | *input_line_pointer = c; | |
5072 | } | |
5073 | else | |
5074 | { | |
5075 | as_bad (_("Missing predicate relation type")); | |
5076 | ignore_rest_of_line (); | |
5077 | return; | |
5078 | } | |
5079 | if (type == 0) | |
5080 | { | |
5081 | as_bad (_("Unrecognized predicate relation type")); | |
5082 | ignore_rest_of_line (); | |
5083 | return; | |
542d6675 | 5084 | } |
800eeca4 | 5085 | if (*input_line_pointer == ',') |
542d6675 | 5086 | ++input_line_pointer; |
800eeca4 JW |
5087 | SKIP_WHITESPACE (); |
5088 | } | |
5089 | ||
5090 | SKIP_WHITESPACE (); | |
5091 | while (1) | |
5092 | { | |
20b36a95 | 5093 | valueT bits = 1; |
800eeca4 | 5094 | int regno; |
20b36a95 JB |
5095 | expressionS pr, *pr1, *pr2; |
5096 | ||
5097 | expression (&pr); | |
5098 | if (pr.X_op == O_register | |
5099 | && pr.X_add_number >= REG_P | |
5100 | && pr.X_add_number <= REG_P + 63) | |
5101 | { | |
5102 | regno = pr.X_add_number - REG_P; | |
5103 | bits <<= regno; | |
5104 | count++; | |
5105 | if (p1 == -1) | |
5106 | p1 = regno; | |
5107 | else if (p2 == -1) | |
5108 | p2 = regno; | |
5109 | } | |
5110 | else if (type != 'i' | |
5111 | && pr.X_op == O_subtract | |
5112 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5113 | && pr1->X_op == O_register | |
5114 | && pr1->X_add_number >= REG_P | |
5115 | && pr1->X_add_number <= REG_P + 63 | |
5116 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5117 | && pr2->X_op == O_register | |
5118 | && pr2->X_add_number >= REG_P | |
5119 | && pr2->X_add_number <= REG_P + 63) | |
5120 | { | |
5121 | /* It's a range. */ | |
5122 | int stop; | |
5123 | ||
5124 | regno = pr1->X_add_number - REG_P; | |
5125 | stop = pr2->X_add_number - REG_P; | |
5126 | if (regno >= stop) | |
542d6675 KH |
5127 | { |
5128 | as_bad (_("Bad register range")); | |
5129 | ignore_rest_of_line (); | |
5130 | return; | |
5131 | } | |
20b36a95 JB |
5132 | bits = ((bits << stop) << 1) - (bits << regno); |
5133 | count += stop - regno + 1; | |
5134 | } | |
5135 | else | |
5136 | { | |
5137 | as_bad (_("Predicate register expected")); | |
5138 | ignore_rest_of_line (); | |
5139 | return; | |
542d6675 | 5140 | } |
20b36a95 JB |
5141 | if (mask & bits) |
5142 | as_warn (_("Duplicate predicate register ignored")); | |
5143 | mask |= bits; | |
800eeca4 | 5144 | if (*input_line_pointer != ',') |
542d6675 | 5145 | break; |
800eeca4 JW |
5146 | ++input_line_pointer; |
5147 | SKIP_WHITESPACE (); | |
5148 | } | |
5149 | ||
5150 | switch (type) | |
5151 | { | |
5152 | case 'c': | |
5153 | if (count == 0) | |
542d6675 | 5154 | mask = ~(valueT) 0; |
800eeca4 | 5155 | clear_qp_mutex (mask); |
197865e8 | 5156 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5157 | break; |
5158 | case 'i': | |
5159 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5160 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5161 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5162 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5163 | else |
542d6675 | 5164 | add_qp_imply (p1, p2); |
800eeca4 JW |
5165 | break; |
5166 | case 'm': | |
5167 | if (count < 2) | |
542d6675 KH |
5168 | { |
5169 | as_bad (_("At least two PR arguments expected")); | |
5170 | break; | |
5171 | } | |
800eeca4 | 5172 | else if (mask & 1) |
542d6675 KH |
5173 | { |
5174 | as_bad (_("Use of p0 is not valid in this context")); | |
5175 | break; | |
5176 | } | |
800eeca4 JW |
5177 | add_qp_mutex (mask); |
5178 | break; | |
5179 | case 's': | |
5180 | /* note that we don't override any existing relations */ | |
5181 | if (count == 0) | |
542d6675 KH |
5182 | { |
5183 | as_bad (_("At least one PR argument expected")); | |
5184 | break; | |
5185 | } | |
800eeca4 | 5186 | if (md.debug_dv) |
542d6675 KH |
5187 | { |
5188 | fprintf (stderr, "Safe across calls: "); | |
5189 | print_prmask (mask); | |
5190 | fprintf (stderr, "\n"); | |
5191 | } | |
800eeca4 JW |
5192 | qp_safe_across_calls = mask; |
5193 | break; | |
5194 | } | |
5195 | demand_empty_rest_of_line (); | |
5196 | } | |
5197 | ||
5198 | /* .entry label [, label [, ...]] | |
5199 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5200 | Otherwise, only global labels are considered entry points. */ |
5201 | ||
800eeca4 JW |
5202 | static void |
5203 | dot_entry (dummy) | |
2434f565 | 5204 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5205 | { |
5206 | const char *err; | |
5207 | char *name; | |
5208 | int c; | |
5209 | symbolS *symbolP; | |
5210 | ||
5211 | do | |
5212 | { | |
5213 | name = input_line_pointer; | |
5214 | c = get_symbol_end (); | |
5215 | symbolP = symbol_find_or_make (name); | |
5216 | ||
5217 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
5218 | if (err) | |
542d6675 KH |
5219 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5220 | name, err); | |
800eeca4 JW |
5221 | |
5222 | *input_line_pointer = c; | |
5223 | SKIP_WHITESPACE (); | |
5224 | c = *input_line_pointer; | |
5225 | if (c == ',') | |
5226 | { | |
5227 | input_line_pointer++; | |
5228 | SKIP_WHITESPACE (); | |
5229 | if (*input_line_pointer == '\n') | |
5230 | c = '\n'; | |
5231 | } | |
5232 | } | |
5233 | while (c == ','); | |
5234 | ||
5235 | demand_empty_rest_of_line (); | |
5236 | } | |
5237 | ||
197865e8 | 5238 | /* .mem.offset offset, base |
542d6675 KH |
5239 | "base" is used to distinguish between offsets from a different base. */ |
5240 | ||
800eeca4 JW |
5241 | static void |
5242 | dot_mem_offset (dummy) | |
2434f565 | 5243 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5244 | { |
5245 | md.mem_offset.hint = 1; | |
5246 | md.mem_offset.offset = get_absolute_expression (); | |
5247 | if (*input_line_pointer != ',') | |
5248 | { | |
5249 | as_bad (_("Comma expected")); | |
5250 | ignore_rest_of_line (); | |
5251 | return; | |
5252 | } | |
5253 | ++input_line_pointer; | |
5254 | md.mem_offset.base = get_absolute_expression (); | |
5255 | demand_empty_rest_of_line (); | |
5256 | } | |
5257 | ||
542d6675 | 5258 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5259 | const pseudo_typeS md_pseudo_table[] = |
5260 | { | |
5261 | { "radix", dot_radix, 0 }, | |
5262 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5263 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5264 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5265 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5266 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5267 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5268 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5269 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5270 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5271 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5272 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5273 | { "proc", dot_proc, 0 }, |
5274 | { "body", dot_body, 0 }, | |
5275 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5276 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5277 | |
5278 | { "fframe", dot_fframe, 0 }, | |
5279 | { "vframe", dot_vframe, 0 }, | |
5280 | { "vframesp", dot_vframesp, 0 }, | |
5281 | { "vframepsp", dot_vframepsp, 0 }, | |
5282 | { "save", dot_save, 0 }, | |
5283 | { "restore", dot_restore, 0 }, | |
5284 | { "restorereg", dot_restorereg, 0 }, | |
5285 | { "restorereg.p", dot_restorereg_p, 0 }, | |
5286 | { "handlerdata", dot_handlerdata, 0 }, | |
5287 | { "unwentry", dot_unwentry, 0 }, | |
5288 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5289 | { "savesp", dot_savemem, 0 }, |
5290 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5291 | { "save.g", dot_saveg, 0 }, |
5292 | { "save.f", dot_savef, 0 }, | |
5293 | { "save.b", dot_saveb, 0 }, | |
5294 | { "save.gf", dot_savegf, 0 }, | |
5295 | { "spill", dot_spill, 0 }, | |
5296 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5297 | { "spillsp", dot_spillmem, 0 }, |
5298 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 5299 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
5300 | { "spillsp.p", dot_spillmem_p, 0 }, |
5301 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
5302 | { "label_state", dot_label_state, 0 }, |
5303 | { "copy_state", dot_copy_state, 0 }, | |
5304 | { "unwabi", dot_unwabi, 0 }, | |
5305 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5306 | { "mii", dot_template, 0x0 }, |
5307 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5308 | { "mlx", dot_template, 0x2 }, | |
5309 | { "mmi", dot_template, 0x4 }, | |
5310 | { "mfi", dot_template, 0x6 }, | |
5311 | { "mmf", dot_template, 0x7 }, | |
5312 | { "mib", dot_template, 0x8 }, | |
5313 | { "mbb", dot_template, 0x9 }, | |
5314 | { "bbb", dot_template, 0xb }, | |
5315 | { "mmb", dot_template, 0xc }, | |
5316 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5317 | { "align", dot_align, 0 }, |
800eeca4 JW |
5318 | { "regstk", dot_regstk, 0 }, |
5319 | { "rotr", dot_rot, DYNREG_GR }, | |
5320 | { "rotf", dot_rot, DYNREG_FR }, | |
5321 | { "rotp", dot_rot, DYNREG_PR }, | |
5322 | { "lsb", dot_byteorder, 0 }, | |
5323 | { "msb", dot_byteorder, 1 }, | |
5324 | { "psr", dot_psr, 0 }, | |
5325 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5326 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5327 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5328 | ||
5329 | { "xdata1", dot_xdata, 1 }, | |
5330 | { "xdata2", dot_xdata, 2 }, | |
5331 | { "xdata4", dot_xdata, 4 }, | |
5332 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5333 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5334 | { "xreal4", dot_xfloat_cons, 'f' }, |
5335 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5336 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5337 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5338 | { "xstring", dot_xstringer, 0 }, |
5339 | { "xstringz", dot_xstringer, 1 }, | |
5340 | ||
542d6675 | 5341 | /* unaligned versions: */ |
800eeca4 JW |
5342 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5343 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5344 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5345 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5346 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5347 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5348 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5349 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5350 | |
5351 | /* annotations/DV checking support */ | |
5352 | { "entry", dot_entry, 0 }, | |
2434f565 | 5353 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5354 | { "pred.rel", dot_pred_rel, 0 }, |
5355 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5356 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5357 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5358 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5359 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5360 | { "serialize.data", dot_serialize, 0 }, |
5361 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5362 | { "auto", dot_dv_mode, 'a' }, |
5363 | { "explicit", dot_dv_mode, 'e' }, | |
5364 | { "default", dot_dv_mode, 'd' }, | |
5365 | ||
87885043 JW |
5366 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5367 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5368 | tell it that these ones are supposed to be unaligned. Long term, | |
5369 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5370 | are aligned by default. */ | |
5371 | {"2byte", stmt_cons_ua, 2}, | |
5372 | {"4byte", stmt_cons_ua, 4}, | |
5373 | {"8byte", stmt_cons_ua, 8}, | |
5374 | ||
800eeca4 JW |
5375 | { NULL, 0, 0 } |
5376 | }; | |
5377 | ||
5378 | static const struct pseudo_opcode | |
5379 | { | |
5380 | const char *name; | |
5381 | void (*handler) (int); | |
5382 | int arg; | |
5383 | } | |
5384 | pseudo_opcode[] = | |
5385 | { | |
5386 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5387 | { "data1", cons, 1 }, | |
5388 | { "data2", cons, 2 }, | |
5389 | { "data4", cons, 4 }, | |
5390 | { "data8", cons, 8 }, | |
3969b680 | 5391 | { "data16", cons, 16 }, |
800eeca4 JW |
5392 | { "real4", stmt_float_cons, 'f' }, |
5393 | { "real8", stmt_float_cons, 'd' }, | |
5394 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5395 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5396 | { "string", stringer, 0 }, |
5397 | { "stringz", stringer, 1 }, | |
5398 | ||
542d6675 | 5399 | /* unaligned versions: */ |
800eeca4 JW |
5400 | { "data2.ua", stmt_cons_ua, 2 }, |
5401 | { "data4.ua", stmt_cons_ua, 4 }, | |
5402 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5403 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5404 | { "real4.ua", float_cons, 'f' }, |
5405 | { "real8.ua", float_cons, 'd' }, | |
5406 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5407 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5408 | }; |
5409 | ||
5410 | /* Declare a register by creating a symbol for it and entering it in | |
5411 | the symbol table. */ | |
542d6675 KH |
5412 | |
5413 | static symbolS * | |
800eeca4 JW |
5414 | declare_register (name, regnum) |
5415 | const char *name; | |
5416 | int regnum; | |
5417 | { | |
5418 | const char *err; | |
5419 | symbolS *sym; | |
5420 | ||
5421 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5422 | ||
5423 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5424 | if (err) | |
5425 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5426 | name, err); | |
5427 | ||
5428 | return sym; | |
5429 | } | |
5430 | ||
5431 | static void | |
5432 | declare_register_set (prefix, num_regs, base_regnum) | |
5433 | const char *prefix; | |
5434 | int num_regs; | |
5435 | int base_regnum; | |
5436 | { | |
5437 | char name[8]; | |
5438 | int i; | |
5439 | ||
5440 | for (i = 0; i < num_regs; ++i) | |
5441 | { | |
5442 | sprintf (name, "%s%u", prefix, i); | |
5443 | declare_register (name, base_regnum + i); | |
5444 | } | |
5445 | } | |
5446 | ||
5447 | static unsigned int | |
5448 | operand_width (opnd) | |
5449 | enum ia64_opnd opnd; | |
5450 | { | |
5451 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5452 | unsigned int bits = 0; | |
5453 | int i; | |
5454 | ||
5455 | bits = 0; | |
5456 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5457 | bits += odesc->field[i].bits; | |
5458 | ||
5459 | return bits; | |
5460 | } | |
5461 | ||
87f8eb97 | 5462 | static enum operand_match_result |
800eeca4 JW |
5463 | operand_match (idesc, index, e) |
5464 | const struct ia64_opcode *idesc; | |
5465 | int index; | |
5466 | expressionS *e; | |
5467 | { | |
5468 | enum ia64_opnd opnd = idesc->operands[index]; | |
5469 | int bits, relocatable = 0; | |
5470 | struct insn_fix *fix; | |
5471 | bfd_signed_vma val; | |
5472 | ||
5473 | switch (opnd) | |
5474 | { | |
542d6675 | 5475 | /* constants: */ |
800eeca4 JW |
5476 | |
5477 | case IA64_OPND_AR_CCV: | |
5478 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5479 | return OPERAND_MATCH; |
800eeca4 JW |
5480 | break; |
5481 | ||
c10d9d8f JW |
5482 | case IA64_OPND_AR_CSD: |
5483 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5484 | return OPERAND_MATCH; | |
5485 | break; | |
5486 | ||
800eeca4 JW |
5487 | case IA64_OPND_AR_PFS: |
5488 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5489 | return OPERAND_MATCH; |
800eeca4 JW |
5490 | break; |
5491 | ||
5492 | case IA64_OPND_GR0: | |
5493 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5494 | return OPERAND_MATCH; |
800eeca4 JW |
5495 | break; |
5496 | ||
5497 | case IA64_OPND_IP: | |
5498 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5499 | return OPERAND_MATCH; |
800eeca4 JW |
5500 | break; |
5501 | ||
5502 | case IA64_OPND_PR: | |
5503 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5504 | return OPERAND_MATCH; |
800eeca4 JW |
5505 | break; |
5506 | ||
5507 | case IA64_OPND_PR_ROT: | |
5508 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5509 | return OPERAND_MATCH; |
800eeca4 JW |
5510 | break; |
5511 | ||
5512 | case IA64_OPND_PSR: | |
5513 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5514 | return OPERAND_MATCH; |
800eeca4 JW |
5515 | break; |
5516 | ||
5517 | case IA64_OPND_PSR_L: | |
5518 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5519 | return OPERAND_MATCH; |
800eeca4 JW |
5520 | break; |
5521 | ||
5522 | case IA64_OPND_PSR_UM: | |
5523 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5524 | return OPERAND_MATCH; |
800eeca4 JW |
5525 | break; |
5526 | ||
5527 | case IA64_OPND_C1: | |
87f8eb97 JW |
5528 | if (e->X_op == O_constant) |
5529 | { | |
5530 | if (e->X_add_number == 1) | |
5531 | return OPERAND_MATCH; | |
5532 | else | |
5533 | return OPERAND_OUT_OF_RANGE; | |
5534 | } | |
800eeca4 JW |
5535 | break; |
5536 | ||
5537 | case IA64_OPND_C8: | |
87f8eb97 JW |
5538 | if (e->X_op == O_constant) |
5539 | { | |
5540 | if (e->X_add_number == 8) | |
5541 | return OPERAND_MATCH; | |
5542 | else | |
5543 | return OPERAND_OUT_OF_RANGE; | |
5544 | } | |
800eeca4 JW |
5545 | break; |
5546 | ||
5547 | case IA64_OPND_C16: | |
87f8eb97 JW |
5548 | if (e->X_op == O_constant) |
5549 | { | |
5550 | if (e->X_add_number == 16) | |
5551 | return OPERAND_MATCH; | |
5552 | else | |
5553 | return OPERAND_OUT_OF_RANGE; | |
5554 | } | |
800eeca4 JW |
5555 | break; |
5556 | ||
542d6675 | 5557 | /* register operands: */ |
800eeca4 JW |
5558 | |
5559 | case IA64_OPND_AR3: | |
5560 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5561 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5562 | return OPERAND_MATCH; |
800eeca4 JW |
5563 | break; |
5564 | ||
5565 | case IA64_OPND_B1: | |
5566 | case IA64_OPND_B2: | |
5567 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5568 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5569 | return OPERAND_MATCH; |
800eeca4 JW |
5570 | break; |
5571 | ||
5572 | case IA64_OPND_CR3: | |
5573 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5574 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5575 | return OPERAND_MATCH; |
800eeca4 JW |
5576 | break; |
5577 | ||
5578 | case IA64_OPND_F1: | |
5579 | case IA64_OPND_F2: | |
5580 | case IA64_OPND_F3: | |
5581 | case IA64_OPND_F4: | |
5582 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5583 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5584 | return OPERAND_MATCH; |
800eeca4 JW |
5585 | break; |
5586 | ||
5587 | case IA64_OPND_P1: | |
5588 | case IA64_OPND_P2: | |
5589 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5590 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5591 | return OPERAND_MATCH; |
800eeca4 JW |
5592 | break; |
5593 | ||
5594 | case IA64_OPND_R1: | |
5595 | case IA64_OPND_R2: | |
5596 | case IA64_OPND_R3: | |
5597 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5598 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5599 | return OPERAND_MATCH; |
800eeca4 JW |
5600 | break; |
5601 | ||
5602 | case IA64_OPND_R3_2: | |
87f8eb97 | 5603 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5604 | { |
87f8eb97 JW |
5605 | if (e->X_add_number < REG_GR + 4) |
5606 | return OPERAND_MATCH; | |
5607 | else if (e->X_add_number < REG_GR + 128) | |
5608 | return OPERAND_OUT_OF_RANGE; | |
5609 | } | |
800eeca4 JW |
5610 | break; |
5611 | ||
542d6675 | 5612 | /* indirect operands: */ |
800eeca4 JW |
5613 | case IA64_OPND_CPUID_R3: |
5614 | case IA64_OPND_DBR_R3: | |
5615 | case IA64_OPND_DTR_R3: | |
5616 | case IA64_OPND_ITR_R3: | |
5617 | case IA64_OPND_IBR_R3: | |
5618 | case IA64_OPND_MSR_R3: | |
5619 | case IA64_OPND_PKR_R3: | |
5620 | case IA64_OPND_PMC_R3: | |
5621 | case IA64_OPND_PMD_R3: | |
5622 | case IA64_OPND_RR_R3: | |
5623 | if (e->X_op == O_index && e->X_op_symbol | |
5624 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5625 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5626 | return OPERAND_MATCH; |
800eeca4 JW |
5627 | break; |
5628 | ||
5629 | case IA64_OPND_MR3: | |
5630 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5631 | return OPERAND_MATCH; |
800eeca4 JW |
5632 | break; |
5633 | ||
542d6675 | 5634 | /* immediate operands: */ |
800eeca4 JW |
5635 | case IA64_OPND_CNT2a: |
5636 | case IA64_OPND_LEN4: | |
5637 | case IA64_OPND_LEN6: | |
5638 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5639 | if (e->X_op == O_constant) |
5640 | { | |
5641 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5642 | return OPERAND_MATCH; | |
5643 | else | |
5644 | return OPERAND_OUT_OF_RANGE; | |
5645 | } | |
800eeca4 JW |
5646 | break; |
5647 | ||
5648 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5649 | if (e->X_op == O_constant) |
5650 | { | |
5651 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5652 | return OPERAND_MATCH; | |
5653 | else | |
5654 | return OPERAND_OUT_OF_RANGE; | |
5655 | } | |
800eeca4 JW |
5656 | break; |
5657 | ||
5658 | case IA64_OPND_CNT2c: | |
5659 | val = e->X_add_number; | |
87f8eb97 JW |
5660 | if (e->X_op == O_constant) |
5661 | { | |
5662 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5663 | return OPERAND_MATCH; | |
5664 | else | |
5665 | return OPERAND_OUT_OF_RANGE; | |
5666 | } | |
800eeca4 JW |
5667 | break; |
5668 | ||
5669 | case IA64_OPND_SOR: | |
5670 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5671 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5672 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5673 | case IA64_OPND_SOF: |
5674 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5675 | if (e->X_op == O_constant) |
5676 | { | |
5677 | if ((bfd_vma) e->X_add_number <= 96) | |
5678 | return OPERAND_MATCH; | |
5679 | else | |
5680 | return OPERAND_OUT_OF_RANGE; | |
5681 | } | |
800eeca4 JW |
5682 | break; |
5683 | ||
5684 | case IA64_OPND_IMMU62: | |
5685 | if (e->X_op == O_constant) | |
542d6675 | 5686 | { |
800eeca4 | 5687 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5688 | return OPERAND_MATCH; |
5689 | else | |
5690 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5691 | } |
197865e8 | 5692 | else |
542d6675 KH |
5693 | { |
5694 | /* FIXME -- need 62-bit relocation type */ | |
5695 | as_bad (_("62-bit relocation not yet implemented")); | |
5696 | } | |
800eeca4 JW |
5697 | break; |
5698 | ||
5699 | case IA64_OPND_IMMU64: | |
5700 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5701 | || e->X_op == O_subtract) | |
5702 | { | |
5703 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5704 | fix->code = BFD_RELOC_IA64_IMM64; | |
5705 | if (e->X_op != O_subtract) | |
5706 | { | |
5707 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5708 | if (e->X_op == O_pseudo_fixup) | |
5709 | e->X_op = O_symbol; | |
5710 | } | |
5711 | ||
5712 | fix->opnd = idesc->operands[index]; | |
5713 | fix->expr = *e; | |
5714 | fix->is_pcrel = 0; | |
5715 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5716 | return OPERAND_MATCH; |
800eeca4 JW |
5717 | } |
5718 | else if (e->X_op == O_constant) | |
87f8eb97 | 5719 | return OPERAND_MATCH; |
800eeca4 JW |
5720 | break; |
5721 | ||
5722 | case IA64_OPND_CCNT5: | |
5723 | case IA64_OPND_CNT5: | |
5724 | case IA64_OPND_CNT6: | |
5725 | case IA64_OPND_CPOS6a: | |
5726 | case IA64_OPND_CPOS6b: | |
5727 | case IA64_OPND_CPOS6c: | |
5728 | case IA64_OPND_IMMU2: | |
5729 | case IA64_OPND_IMMU7a: | |
5730 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5731 | case IA64_OPND_IMMU21: |
5732 | case IA64_OPND_IMMU24: | |
5733 | case IA64_OPND_MBTYPE4: | |
5734 | case IA64_OPND_MHTYPE8: | |
5735 | case IA64_OPND_POS6: | |
5736 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5737 | if (e->X_op == O_constant) |
5738 | { | |
5739 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5740 | return OPERAND_MATCH; | |
5741 | else | |
5742 | return OPERAND_OUT_OF_RANGE; | |
5743 | } | |
800eeca4 JW |
5744 | break; |
5745 | ||
bf3ca999 TW |
5746 | case IA64_OPND_IMMU9: |
5747 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5748 | if (e->X_op == O_constant) |
542d6675 | 5749 | { |
87f8eb97 JW |
5750 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5751 | { | |
5752 | int lobits = e->X_add_number & 0x3; | |
5753 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5754 | e->X_add_number |= (bfd_vma) 0x3; | |
5755 | return OPERAND_MATCH; | |
5756 | } | |
5757 | else | |
5758 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5759 | } |
bf3ca999 TW |
5760 | break; |
5761 | ||
800eeca4 JW |
5762 | case IA64_OPND_IMM44: |
5763 | /* least 16 bits must be zero */ | |
5764 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5765 | /* XXX technically, this is wrong: we should not be issuing warning |
5766 | messages until we're sure this instruction pattern is going to | |
5767 | be used! */ | |
542d6675 | 5768 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5769 | |
87f8eb97 | 5770 | if (e->X_op == O_constant) |
542d6675 | 5771 | { |
87f8eb97 JW |
5772 | if (((e->X_add_number >= 0 |
5773 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5774 | || (e->X_add_number < 0 | |
5775 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5776 | { |
87f8eb97 JW |
5777 | /* sign-extend */ |
5778 | if (e->X_add_number >= 0 | |
5779 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5780 | { | |
5781 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5782 | } | |
5783 | return OPERAND_MATCH; | |
542d6675 | 5784 | } |
87f8eb97 JW |
5785 | else |
5786 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5787 | } |
800eeca4 JW |
5788 | break; |
5789 | ||
5790 | case IA64_OPND_IMM17: | |
5791 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5792 | if (e->X_op == O_constant) |
542d6675 | 5793 | { |
87f8eb97 JW |
5794 | if (((e->X_add_number >= 0 |
5795 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5796 | || (e->X_add_number < 0 | |
5797 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5798 | { |
87f8eb97 JW |
5799 | /* sign-extend */ |
5800 | if (e->X_add_number >= 0 | |
5801 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5802 | { | |
5803 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5804 | } | |
5805 | return OPERAND_MATCH; | |
542d6675 | 5806 | } |
87f8eb97 JW |
5807 | else |
5808 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5809 | } |
800eeca4 JW |
5810 | break; |
5811 | ||
5812 | case IA64_OPND_IMM14: | |
5813 | case IA64_OPND_IMM22: | |
5814 | relocatable = 1; | |
5815 | case IA64_OPND_IMM1: | |
5816 | case IA64_OPND_IMM8: | |
5817 | case IA64_OPND_IMM8U4: | |
5818 | case IA64_OPND_IMM8M1: | |
5819 | case IA64_OPND_IMM8M1U4: | |
5820 | case IA64_OPND_IMM8M1U8: | |
5821 | case IA64_OPND_IMM9a: | |
5822 | case IA64_OPND_IMM9b: | |
5823 | bits = operand_width (idesc->operands[index]); | |
5824 | if (relocatable && (e->X_op == O_symbol | |
5825 | || e->X_op == O_subtract | |
5826 | || e->X_op == O_pseudo_fixup)) | |
5827 | { | |
5828 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5829 | ||
5830 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5831 | fix->code = BFD_RELOC_IA64_IMM14; | |
5832 | else | |
5833 | fix->code = BFD_RELOC_IA64_IMM22; | |
5834 | ||
5835 | if (e->X_op != O_subtract) | |
5836 | { | |
5837 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5838 | if (e->X_op == O_pseudo_fixup) | |
5839 | e->X_op = O_symbol; | |
5840 | } | |
5841 | ||
5842 | fix->opnd = idesc->operands[index]; | |
5843 | fix->expr = *e; | |
5844 | fix->is_pcrel = 0; | |
5845 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5846 | return OPERAND_MATCH; |
800eeca4 JW |
5847 | } |
5848 | else if (e->X_op != O_constant | |
5849 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5850 | return OPERAND_MISMATCH; |
800eeca4 JW |
5851 | |
5852 | if (opnd == IA64_OPND_IMM8M1U4) | |
5853 | { | |
5854 | /* Zero is not valid for unsigned compares that take an adjusted | |
5855 | constant immediate range. */ | |
5856 | if (e->X_add_number == 0) | |
87f8eb97 | 5857 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5858 | |
5859 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5860 | checks will work. */ | |
5861 | val = e->X_add_number; | |
197865e8 KH |
5862 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5863 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5864 | val = ((val << 32) >> 32); |
5865 | ||
5866 | /* Check for 0x100000000. This is valid because | |
5867 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5868 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5869 | return OPERAND_MATCH; |
800eeca4 JW |
5870 | |
5871 | val = val - 1; | |
5872 | } | |
5873 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5874 | { | |
5875 | /* Zero is not valid for unsigned compares that take an adjusted | |
5876 | constant immediate range. */ | |
5877 | if (e->X_add_number == 0) | |
87f8eb97 | 5878 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5879 | |
5880 | /* Check for 0x10000000000000000. */ | |
5881 | if (e->X_op == O_big) | |
5882 | { | |
5883 | if (generic_bignum[0] == 0 | |
5884 | && generic_bignum[1] == 0 | |
5885 | && generic_bignum[2] == 0 | |
5886 | && generic_bignum[3] == 0 | |
5887 | && generic_bignum[4] == 1) | |
87f8eb97 | 5888 | return OPERAND_MATCH; |
800eeca4 | 5889 | else |
87f8eb97 | 5890 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5891 | } |
5892 | else | |
5893 | val = e->X_add_number - 1; | |
5894 | } | |
5895 | else if (opnd == IA64_OPND_IMM8M1) | |
5896 | val = e->X_add_number - 1; | |
5897 | else if (opnd == IA64_OPND_IMM8U4) | |
5898 | { | |
5899 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5900 | checks will work. */ | |
5901 | val = e->X_add_number; | |
197865e8 KH |
5902 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5903 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5904 | val = ((val << 32) >> 32); |
5905 | } | |
5906 | else | |
5907 | val = e->X_add_number; | |
5908 | ||
2434f565 JW |
5909 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5910 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5911 | return OPERAND_MATCH; |
5912 | else | |
5913 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5914 | |
5915 | case IA64_OPND_INC3: | |
5916 | /* +/- 1, 4, 8, 16 */ | |
5917 | val = e->X_add_number; | |
5918 | if (val < 0) | |
5919 | val = -val; | |
87f8eb97 JW |
5920 | if (e->X_op == O_constant) |
5921 | { | |
5922 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5923 | return OPERAND_MATCH; | |
5924 | else | |
5925 | return OPERAND_OUT_OF_RANGE; | |
5926 | } | |
800eeca4 JW |
5927 | break; |
5928 | ||
5929 | case IA64_OPND_TGT25: | |
5930 | case IA64_OPND_TGT25b: | |
5931 | case IA64_OPND_TGT25c: | |
5932 | case IA64_OPND_TGT64: | |
5933 | if (e->X_op == O_symbol) | |
5934 | { | |
5935 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5936 | if (opnd == IA64_OPND_TGT25) | |
5937 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5938 | else if (opnd == IA64_OPND_TGT25b) | |
5939 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5940 | else if (opnd == IA64_OPND_TGT25c) | |
5941 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5942 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5943 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5944 | else | |
5945 | abort (); | |
5946 | ||
800eeca4 JW |
5947 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5948 | fix->opnd = idesc->operands[index]; | |
5949 | fix->expr = *e; | |
5950 | fix->is_pcrel = 1; | |
5951 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5952 | return OPERAND_MATCH; |
800eeca4 JW |
5953 | } |
5954 | case IA64_OPND_TAG13: | |
5955 | case IA64_OPND_TAG13b: | |
5956 | switch (e->X_op) | |
5957 | { | |
5958 | case O_constant: | |
87f8eb97 | 5959 | return OPERAND_MATCH; |
800eeca4 JW |
5960 | |
5961 | case O_symbol: | |
5962 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5963 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5964 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5965 | fix->code = BFD_RELOC_UNUSED; | |
5966 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5967 | fix->opnd = idesc->operands[index]; |
5968 | fix->expr = *e; | |
5969 | fix->is_pcrel = 1; | |
5970 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5971 | return OPERAND_MATCH; |
800eeca4 JW |
5972 | |
5973 | default: | |
5974 | break; | |
5975 | } | |
5976 | break; | |
5977 | ||
a823923b RH |
5978 | case IA64_OPND_LDXMOV: |
5979 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5980 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5981 | fix->opnd = idesc->operands[index]; | |
5982 | fix->expr = *e; | |
5983 | fix->is_pcrel = 0; | |
5984 | ++CURR_SLOT.num_fixups; | |
5985 | return OPERAND_MATCH; | |
5986 | ||
800eeca4 JW |
5987 | default: |
5988 | break; | |
5989 | } | |
87f8eb97 | 5990 | return OPERAND_MISMATCH; |
800eeca4 JW |
5991 | } |
5992 | ||
5993 | static int | |
5994 | parse_operand (e) | |
5995 | expressionS *e; | |
5996 | { | |
5997 | int sep = '\0'; | |
5998 | ||
5999 | memset (e, 0, sizeof (*e)); | |
6000 | e->X_op = O_absent; | |
6001 | SKIP_WHITESPACE (); | |
6002 | if (*input_line_pointer != '}') | |
6003 | expression (e); | |
6004 | sep = *input_line_pointer++; | |
6005 | ||
6006 | if (sep == '}') | |
6007 | { | |
6008 | if (!md.manual_bundling) | |
6009 | as_warn ("Found '}' when manual bundling is off"); | |
6010 | else | |
6011 | CURR_SLOT.manual_bundling_off = 1; | |
6012 | md.manual_bundling = 0; | |
6013 | sep = '\0'; | |
6014 | } | |
6015 | return sep; | |
6016 | } | |
6017 | ||
6018 | /* Returns the next entry in the opcode table that matches the one in | |
6019 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6020 | found, NULL is returned instead. */ |
800eeca4 JW |
6021 | |
6022 | static struct ia64_opcode * | |
6023 | get_next_opcode (struct ia64_opcode *idesc) | |
6024 | { | |
6025 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6026 | ia64_free_opcode (idesc); | |
6027 | return next; | |
6028 | } | |
6029 | ||
6030 | /* Parse the operands for the opcode and find the opcode variant that | |
6031 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6032 | |
6033 | static struct ia64_opcode * | |
800eeca4 JW |
6034 | parse_operands (idesc) |
6035 | struct ia64_opcode *idesc; | |
6036 | { | |
6037 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6038 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6039 | int reg1, reg2; |
6040 | char reg_class; | |
800eeca4 | 6041 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6042 | enum operand_match_result result; |
800eeca4 JW |
6043 | char mnemonic[129]; |
6044 | char *first_arg = 0, *end, *saved_input_pointer; | |
6045 | unsigned int sof; | |
6046 | ||
6047 | assert (strlen (idesc->name) <= 128); | |
6048 | ||
6049 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6050 | if (idesc->operands[2] == IA64_OPND_SOF |
6051 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6052 | { |
6053 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6054 | can't parse the first operand until we have parsed the | |
6055 | remaining operands of the "alloc" instruction. */ | |
6056 | SKIP_WHITESPACE (); | |
6057 | first_arg = input_line_pointer; | |
6058 | end = strchr (input_line_pointer, '='); | |
6059 | if (!end) | |
6060 | { | |
6061 | as_bad ("Expected separator `='"); | |
6062 | return 0; | |
6063 | } | |
6064 | input_line_pointer = end + 1; | |
6065 | ++i; | |
6066 | ++num_outputs; | |
6067 | } | |
6068 | ||
d3156ecc | 6069 | for (; ; ++i) |
800eeca4 | 6070 | { |
d3156ecc JB |
6071 | if (i < NELEMS (CURR_SLOT.opnd)) |
6072 | { | |
6073 | sep = parse_operand (CURR_SLOT.opnd + i); | |
6074 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
6075 | break; | |
6076 | } | |
6077 | else | |
6078 | { | |
6079 | expressionS dummy; | |
6080 | ||
6081 | sep = parse_operand (&dummy); | |
6082 | if (dummy.X_op == O_absent) | |
6083 | break; | |
6084 | } | |
800eeca4 JW |
6085 | |
6086 | ++num_operands; | |
6087 | ||
6088 | if (sep != '=' && sep != ',') | |
6089 | break; | |
6090 | ||
6091 | if (sep == '=') | |
6092 | { | |
6093 | if (num_outputs > 0) | |
6094 | as_bad ("Duplicate equal sign (=) in instruction"); | |
6095 | else | |
6096 | num_outputs = i + 1; | |
6097 | } | |
6098 | } | |
6099 | if (sep != '\0') | |
6100 | { | |
6101 | as_bad ("Illegal operand separator `%c'", sep); | |
6102 | return 0; | |
6103 | } | |
197865e8 | 6104 | |
60b9a617 JB |
6105 | if (idesc->operands[2] == IA64_OPND_SOF |
6106 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6107 | { |
6108 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
6109 | know (strcmp (idesc->name, "alloc") == 0); | |
60b9a617 JB |
6110 | i = (CURR_SLOT.opnd[1].X_op == O_register |
6111 | && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1; | |
6112 | if (num_operands == i + 3 /* first_arg not included in this count! */ | |
6113 | && CURR_SLOT.opnd[i].X_op == O_constant | |
6114 | && CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6115 | && CURR_SLOT.opnd[i + 2].X_op == O_constant | |
6116 | && CURR_SLOT.opnd[i + 3].X_op == O_constant) | |
800eeca4 | 6117 | { |
60b9a617 JB |
6118 | sof = set_regstack (CURR_SLOT.opnd[i].X_add_number, |
6119 | CURR_SLOT.opnd[i + 1].X_add_number, | |
6120 | CURR_SLOT.opnd[i + 2].X_add_number, | |
6121 | CURR_SLOT.opnd[i + 3].X_add_number); | |
800eeca4 | 6122 | |
542d6675 | 6123 | /* now we can parse the first arg: */ |
800eeca4 JW |
6124 | saved_input_pointer = input_line_pointer; |
6125 | input_line_pointer = first_arg; | |
6126 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
6127 | if (sep != '=') | |
6128 | --num_outputs; /* force error */ | |
6129 | input_line_pointer = saved_input_pointer; | |
6130 | ||
60b9a617 JB |
6131 | CURR_SLOT.opnd[i].X_add_number = sof; |
6132 | CURR_SLOT.opnd[i + 1].X_add_number | |
6133 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6134 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6135 | } |
6136 | } | |
6137 | ||
d3156ecc | 6138 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6139 | curr_out_of_range_pos = -1; |
6140 | error_pos = 0; | |
800eeca4 JW |
6141 | for (; idesc; idesc = get_next_opcode (idesc)) |
6142 | { | |
6143 | if (num_outputs != idesc->num_outputs) | |
6144 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6145 | if (highest_unmatched_operand < 0) |
6146 | highest_unmatched_operand |= 1; | |
6147 | if (num_operands > NELEMS (idesc->operands) | |
6148 | || (num_operands < NELEMS (idesc->operands) | |
6149 | && idesc->operands[num_operands]) | |
6150 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6151 | continue; /* mismatch in number of arguments */ | |
6152 | if (highest_unmatched_operand < 0) | |
6153 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6154 | |
6155 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6156 | |
6157 | /* Try to match all operands. If we see an out-of-range operand, | |
6158 | then continue trying to match the rest of the operands, since if | |
6159 | the rest match, then this idesc will give the best error message. */ | |
6160 | ||
6161 | out_of_range_pos = -1; | |
800eeca4 | 6162 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6163 | { |
6164 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6165 | if (result != OPERAND_MATCH) | |
6166 | { | |
6167 | if (result != OPERAND_OUT_OF_RANGE) | |
6168 | break; | |
6169 | if (out_of_range_pos < 0) | |
6170 | /* remember position of the first out-of-range operand: */ | |
6171 | out_of_range_pos = i; | |
6172 | } | |
6173 | } | |
800eeca4 | 6174 | |
87f8eb97 JW |
6175 | /* If we did not match all operands, or if at least one operand was |
6176 | out-of-range, then this idesc does not match. Keep track of which | |
6177 | idesc matched the most operands before failing. If we have two | |
6178 | idescs that failed at the same position, and one had an out-of-range | |
6179 | operand, then prefer the out-of-range operand. Thus if we have | |
6180 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6181 | of range instead of an error saying that the constant should have been | |
6182 | a register. */ | |
6183 | ||
6184 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6185 | { |
87f8eb97 JW |
6186 | if (i > highest_unmatched_operand |
6187 | || (i == highest_unmatched_operand | |
6188 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6189 | { |
6190 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6191 | if (out_of_range_pos >= 0) |
6192 | { | |
6193 | expected_operand = idesc->operands[out_of_range_pos]; | |
6194 | error_pos = out_of_range_pos; | |
6195 | } | |
6196 | else | |
6197 | { | |
6198 | expected_operand = idesc->operands[i]; | |
6199 | error_pos = i; | |
6200 | } | |
6201 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6202 | } |
6203 | continue; | |
6204 | } | |
6205 | ||
800eeca4 JW |
6206 | break; |
6207 | } | |
6208 | if (!idesc) | |
6209 | { | |
6210 | if (expected_operand) | |
6211 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 6212 | error_pos + 1, mnemonic, |
800eeca4 | 6213 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc JB |
6214 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
6215 | as_bad ("Wrong number of output operands"); | |
6216 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) | |
6217 | as_bad ("Wrong number of input operands"); | |
800eeca4 JW |
6218 | else |
6219 | as_bad ("Operand mismatch"); | |
6220 | return 0; | |
6221 | } | |
4b09e828 JB |
6222 | |
6223 | /* Check that the instruction doesn't use | |
6224 | - r0, f0, or f1 as output operands | |
6225 | - the same predicate twice as output operands | |
6226 | - r0 as address of a base update load or store | |
6227 | - the same GR as output and address of a base update load | |
6228 | - two even- or two odd-numbered FRs as output operands of a floating | |
6229 | point parallel load. | |
6230 | At most two (conflicting) output (or output-like) operands can exist, | |
6231 | (floating point parallel loads have three outputs, but the base register, | |
6232 | if updated, cannot conflict with the actual outputs). */ | |
6233 | reg2 = reg1 = -1; | |
6234 | for (i = 0; i < num_operands; ++i) | |
6235 | { | |
6236 | int regno = 0; | |
6237 | ||
6238 | reg_class = 0; | |
6239 | switch (idesc->operands[i]) | |
6240 | { | |
6241 | case IA64_OPND_R1: | |
6242 | case IA64_OPND_R2: | |
6243 | case IA64_OPND_R3: | |
6244 | if (i < num_outputs) | |
6245 | { | |
6246 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6247 | reg_class = 'r'; | |
6248 | else if (reg1 < 0) | |
6249 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6250 | else if (reg2 < 0) | |
6251 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6252 | } | |
6253 | break; | |
6254 | case IA64_OPND_P1: | |
6255 | case IA64_OPND_P2: | |
6256 | if (i < num_outputs) | |
6257 | { | |
6258 | if (reg1 < 0) | |
6259 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6260 | else if (reg2 < 0) | |
6261 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6262 | } | |
6263 | break; | |
6264 | case IA64_OPND_F1: | |
6265 | case IA64_OPND_F2: | |
6266 | case IA64_OPND_F3: | |
6267 | case IA64_OPND_F4: | |
6268 | if (i < num_outputs) | |
6269 | { | |
6270 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6271 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6272 | { | |
6273 | reg_class = 'f'; | |
6274 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6275 | } | |
6276 | else if (reg1 < 0) | |
6277 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6278 | else if (reg2 < 0) | |
6279 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6280 | } | |
6281 | break; | |
6282 | case IA64_OPND_MR3: | |
6283 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6284 | { | |
6285 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6286 | reg_class = 'm'; | |
6287 | else if (reg1 < 0) | |
6288 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6289 | else if (reg2 < 0) | |
6290 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6291 | } | |
6292 | break; | |
6293 | default: | |
6294 | break; | |
6295 | } | |
6296 | switch (reg_class) | |
6297 | { | |
6298 | case 0: | |
6299 | break; | |
6300 | default: | |
6301 | as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno); | |
6302 | break; | |
6303 | case 'm': | |
6304 | as_warn ("Invalid use of `r%d' as base update address operand", regno); | |
6305 | break; | |
6306 | } | |
6307 | } | |
6308 | if (reg1 == reg2) | |
6309 | { | |
6310 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6311 | { | |
6312 | reg1 -= REG_GR; | |
6313 | reg_class = 'r'; | |
6314 | } | |
6315 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6316 | { | |
6317 | reg1 -= REG_P; | |
6318 | reg_class = 'p'; | |
6319 | } | |
6320 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6321 | { | |
6322 | reg1 -= REG_FR; | |
6323 | reg_class = 'f'; | |
6324 | } | |
6325 | else | |
6326 | reg_class = 0; | |
6327 | if (reg_class) | |
6328 | as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1); | |
6329 | } | |
6330 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6331 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6332 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6333 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6334 | && ! ((reg1 ^ reg2) & 1)) | |
6335 | as_warn ("Invalid simultaneous use of `f%d' and `f%d'", | |
6336 | reg1 - REG_FR, reg2 - REG_FR); | |
6337 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6338 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6339 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6340 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
6341 | as_warn ("Dangerous simultaneous use of `f%d' and `f%d'", | |
6342 | reg1 - REG_FR, reg2 - REG_FR); | |
800eeca4 JW |
6343 | return idesc; |
6344 | } | |
6345 | ||
6346 | static void | |
6347 | build_insn (slot, insnp) | |
6348 | struct slot *slot; | |
6349 | bfd_vma *insnp; | |
6350 | { | |
6351 | const struct ia64_operand *odesc, *o2desc; | |
6352 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6353 | bfd_vma insn; |
6354 | bfd_signed_vma val; | |
800eeca4 JW |
6355 | const char *err; |
6356 | int i; | |
6357 | ||
6358 | insn = idesc->opcode | slot->qp_regno; | |
6359 | ||
6360 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6361 | { | |
c67e42c9 RH |
6362 | if (slot->opnd[i].X_op == O_register |
6363 | || slot->opnd[i].X_op == O_constant | |
6364 | || slot->opnd[i].X_op == O_index) | |
6365 | val = slot->opnd[i].X_add_number; | |
6366 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6367 | { |
c67e42c9 RH |
6368 | /* This must be the value 0x10000000000000000. */ |
6369 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6370 | val = 0; | |
6371 | } | |
6372 | else | |
6373 | val = 0; | |
6374 | ||
6375 | switch (idesc->operands[i]) | |
6376 | { | |
6377 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6378 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6379 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6380 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6381 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6382 | continue; |
6383 | ||
6384 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6385 | val &= 0x3fffffffffffffffULL; |
6386 | if (val != slot->opnd[i].X_add_number) | |
6387 | as_warn (_("Value truncated to 62 bits")); | |
6388 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6389 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6390 | continue; |
800eeca4 | 6391 | |
c67e42c9 RH |
6392 | case IA64_OPND_TGT64: |
6393 | val >>= 4; | |
6394 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6395 | insn |= ((((val >> 59) & 0x1) << 36) | |
6396 | | (((val >> 0) & 0xfffff) << 13)); | |
6397 | continue; | |
800eeca4 | 6398 | |
c67e42c9 RH |
6399 | case IA64_OPND_AR3: |
6400 | val -= REG_AR; | |
6401 | break; | |
6402 | ||
6403 | case IA64_OPND_B1: | |
6404 | case IA64_OPND_B2: | |
6405 | val -= REG_BR; | |
6406 | break; | |
6407 | ||
6408 | case IA64_OPND_CR3: | |
6409 | val -= REG_CR; | |
6410 | break; | |
6411 | ||
6412 | case IA64_OPND_F1: | |
6413 | case IA64_OPND_F2: | |
6414 | case IA64_OPND_F3: | |
6415 | case IA64_OPND_F4: | |
6416 | val -= REG_FR; | |
6417 | break; | |
6418 | ||
6419 | case IA64_OPND_P1: | |
6420 | case IA64_OPND_P2: | |
6421 | val -= REG_P; | |
6422 | break; | |
6423 | ||
6424 | case IA64_OPND_R1: | |
6425 | case IA64_OPND_R2: | |
6426 | case IA64_OPND_R3: | |
6427 | case IA64_OPND_R3_2: | |
6428 | case IA64_OPND_CPUID_R3: | |
6429 | case IA64_OPND_DBR_R3: | |
6430 | case IA64_OPND_DTR_R3: | |
6431 | case IA64_OPND_ITR_R3: | |
6432 | case IA64_OPND_IBR_R3: | |
6433 | case IA64_OPND_MR3: | |
6434 | case IA64_OPND_MSR_R3: | |
6435 | case IA64_OPND_PKR_R3: | |
6436 | case IA64_OPND_PMC_R3: | |
6437 | case IA64_OPND_PMD_R3: | |
197865e8 | 6438 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6439 | val -= REG_GR; |
6440 | break; | |
6441 | ||
6442 | default: | |
6443 | break; | |
6444 | } | |
6445 | ||
6446 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6447 | err = (*odesc->insert) (odesc, val, &insn); | |
6448 | if (err) | |
6449 | as_bad_where (slot->src_file, slot->src_line, | |
6450 | "Bad operand value: %s", err); | |
6451 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6452 | { | |
6453 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6454 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6455 | { | |
6456 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6457 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6458 | } |
c67e42c9 RH |
6459 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6460 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6461 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6462 | { |
c67e42c9 RH |
6463 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6464 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6465 | } |
6466 | } | |
6467 | } | |
6468 | *insnp = insn; | |
6469 | } | |
6470 | ||
6471 | static void | |
6472 | emit_one_bundle () | |
6473 | { | |
f4660e2c | 6474 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6475 | enum ia64_unit required_unit, insn_unit = 0; |
6476 | enum ia64_insn_type type[3], insn_type; | |
6477 | unsigned int template, orig_template; | |
542d6675 | 6478 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6479 | struct ia64_opcode *idesc; |
6480 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6481 | int n, i, j, first, curr, last_slot; |
d6e78c11 | 6482 | unw_rec_list *ptr, *last_ptr, *end_ptr; |
800eeca4 JW |
6483 | bfd_vma t0 = 0, t1 = 0; |
6484 | struct label_fix *lfix; | |
6485 | struct insn_fix *ifix; | |
6486 | char mnemonic[16]; | |
6487 | fixS *fix; | |
6488 | char *f; | |
5a9ff93d | 6489 | int addr_mod; |
800eeca4 JW |
6490 | |
6491 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6492 | know (first >= 0 & first < NUM_SLOTS); | |
6493 | n = MIN (3, md.num_slots_in_use); | |
6494 | ||
6495 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6496 | otherwise: */ |
800eeca4 JW |
6497 | |
6498 | if (md.slot[first].user_template >= 0) | |
6499 | user_template = template = md.slot[first].user_template; | |
6500 | else | |
6501 | { | |
032efc85 | 6502 | /* Auto select appropriate template. */ |
800eeca4 JW |
6503 | memset (type, 0, sizeof (type)); |
6504 | curr = first; | |
6505 | for (i = 0; i < n; ++i) | |
6506 | { | |
032efc85 RH |
6507 | if (md.slot[curr].label_fixups && i != 0) |
6508 | break; | |
800eeca4 JW |
6509 | type[i] = md.slot[curr].idesc->type; |
6510 | curr = (curr + 1) % NUM_SLOTS; | |
6511 | } | |
6512 | template = best_template[type[0]][type[1]][type[2]]; | |
6513 | } | |
6514 | ||
542d6675 | 6515 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6516 | for (i = 0; i < 3; ++i) |
6517 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6518 | ||
6519 | f = frag_more (16); | |
6520 | ||
5a9ff93d JW |
6521 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6522 | from the start of the frag. */ | |
6523 | addr_mod = frag_now_fix () & 15; | |
6524 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6525 | as_bad (_("instruction address is not a multiple of 16")); | |
6526 | frag_now->insn_addr = addr_mod; | |
6527 | frag_now->has_code = 1; | |
6528 | ||
542d6675 | 6529 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6530 | curr = first; |
6531 | idesc = md.slot[curr].idesc; | |
6532 | end_of_insn_group = 0; | |
9b505842 | 6533 | last_slot = -1; |
800eeca4 JW |
6534 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6535 | { | |
d6e78c11 JW |
6536 | /* If we have unwind records, we may need to update some now. */ |
6537 | ptr = md.slot[curr].unwind_record; | |
6538 | if (ptr) | |
6539 | { | |
6540 | /* Find the last prologue/body record in the list for the current | |
6541 | insn, and set the slot number for all records up to that point. | |
6542 | This needs to be done now, because prologue/body records refer to | |
6543 | the current point, not the point after the instruction has been | |
6544 | issued. This matters because there may have been nops emitted | |
6545 | meanwhile. Any non-prologue non-body record followed by a | |
6546 | prologue/body record must also refer to the current point. */ | |
6547 | last_ptr = NULL; | |
6548 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6549 | for (; ptr != end_ptr; ptr = ptr->next) | |
6550 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
6551 | || ptr->r.type == body) | |
6552 | last_ptr = ptr; | |
6553 | if (last_ptr) | |
6554 | { | |
6555 | /* Make last_ptr point one after the last prologue/body | |
6556 | record. */ | |
6557 | last_ptr = last_ptr->next; | |
6558 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6559 | ptr = ptr->next) | |
6560 | { | |
6561 | ptr->slot_number = (unsigned long) f + i; | |
6562 | ptr->slot_frag = frag_now; | |
6563 | } | |
6564 | /* Remove the initialized records, so that we won't accidentally | |
6565 | update them again if we insert a nop and continue. */ | |
6566 | md.slot[curr].unwind_record = last_ptr; | |
6567 | } | |
6568 | } | |
e0c9811a | 6569 | |
f4660e2c JB |
6570 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6571 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6572 | { |
f4660e2c JB |
6573 | if (curr == first) |
6574 | manual_bundling = 1; | |
800eeca4 | 6575 | else |
f4660e2c JB |
6576 | break; /* Need to start a new bundle. */ |
6577 | } | |
6578 | ||
744b6414 JW |
6579 | /* If this instruction specifies a template, then it must be the first |
6580 | instruction of a bundle. */ | |
6581 | if (curr != first && md.slot[curr].user_template >= 0) | |
6582 | break; | |
6583 | ||
f4660e2c JB |
6584 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6585 | { | |
6586 | if (manual_bundling && !manual_bundling_off) | |
6587 | { | |
6588 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6589 | "`%s' must be last in bundle", idesc->name); | |
6590 | if (i < 2) | |
6591 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6592 | } | |
6593 | i = 2; | |
800eeca4 JW |
6594 | } |
6595 | if (idesc->flags & IA64_OPCODE_LAST) | |
6596 | { | |
2434f565 JW |
6597 | int required_slot; |
6598 | unsigned int required_template; | |
800eeca4 JW |
6599 | |
6600 | /* If we need a stop bit after an M slot, our only choice is | |
6601 | template 5 (M;;MI). If we need a stop bit after a B | |
6602 | slot, our only choice is to place it at the end of the | |
6603 | bundle, because the only available templates are MIB, | |
6604 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6605 | than M and B slots because these are the only kind of | |
6606 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6607 | required_template = template; | |
6608 | switch (idesc->type) | |
6609 | { | |
6610 | case IA64_TYPE_M: | |
6611 | required_slot = 0; | |
6612 | required_template = 5; | |
6613 | break; | |
6614 | ||
6615 | case IA64_TYPE_B: | |
6616 | required_slot = 2; | |
6617 | break; | |
6618 | ||
6619 | default: | |
6620 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6621 | "Internal error: don't know how to force %s to end" | |
6622 | "of instruction group", idesc->name); | |
6623 | required_slot = i; | |
6624 | break; | |
6625 | } | |
f4660e2c JB |
6626 | if (manual_bundling |
6627 | && (i > required_slot | |
6628 | || (required_slot == 2 && !manual_bundling_off) | |
6629 | || (user_template >= 0 | |
6630 | /* Changing from MMI to M;MI is OK. */ | |
6631 | && (template ^ required_template) > 1))) | |
6632 | { | |
6633 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6634 | "`%s' must be last in instruction group", | |
6635 | idesc->name); | |
6636 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6637 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6638 | } | |
800eeca4 JW |
6639 | if (required_slot < i) |
6640 | /* Can't fit this instruction. */ | |
6641 | break; | |
6642 | ||
6643 | i = required_slot; | |
6644 | if (required_template != template) | |
6645 | { | |
6646 | /* If we switch the template, we need to reset the NOPs | |
6647 | after slot i. The slot-types of the instructions ahead | |
6648 | of i never change, so we don't need to worry about | |
6649 | changing NOPs in front of this slot. */ | |
6650 | for (j = i; j < 3; ++j) | |
6651 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6652 | } | |
6653 | template = required_template; | |
6654 | } | |
6655 | if (curr != first && md.slot[curr].label_fixups) | |
6656 | { | |
f4660e2c JB |
6657 | if (manual_bundling) |
6658 | { | |
6659 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
800eeca4 | 6660 | "Label must be first in a bundle"); |
f4660e2c JB |
6661 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6662 | } | |
800eeca4 JW |
6663 | /* This insn must go into the first slot of a bundle. */ |
6664 | break; | |
6665 | } | |
6666 | ||
800eeca4 JW |
6667 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6668 | { | |
6669 | /* We need an instruction group boundary in the middle of a | |
6670 | bundle. See if we can switch to an other template with | |
6671 | an appropriate boundary. */ | |
6672 | ||
6673 | orig_template = template; | |
6674 | if (i == 1 && (user_template == 4 | |
6675 | || (user_template < 0 | |
6676 | && (ia64_templ_desc[template].exec_unit[0] | |
6677 | == IA64_UNIT_M)))) | |
6678 | { | |
6679 | template = 5; | |
6680 | end_of_insn_group = 0; | |
6681 | } | |
6682 | else if (i == 2 && (user_template == 0 | |
6683 | || (user_template < 0 | |
6684 | && (ia64_templ_desc[template].exec_unit[1] | |
6685 | == IA64_UNIT_I))) | |
6686 | /* This test makes sure we don't switch the template if | |
6687 | the next instruction is one that needs to be first in | |
6688 | an instruction group. Since all those instructions are | |
6689 | in the M group, there is no way such an instruction can | |
6690 | fit in this bundle even if we switch the template. The | |
6691 | reason we have to check for this is that otherwise we | |
6692 | may end up generating "MI;;I M.." which has the deadly | |
6693 | effect that the second M instruction is no longer the | |
f4660e2c | 6694 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6695 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6696 | { | |
6697 | template = 1; | |
6698 | end_of_insn_group = 0; | |
6699 | } | |
f4660e2c JB |
6700 | else if (i == 1 |
6701 | && user_template == 0 | |
6702 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6703 | /* Use the next slot. */ | |
6704 | continue; | |
800eeca4 JW |
6705 | else if (curr != first) |
6706 | /* can't fit this insn */ | |
6707 | break; | |
6708 | ||
6709 | if (template != orig_template) | |
6710 | /* if we switch the template, we need to reset the NOPs | |
6711 | after slot i. The slot-types of the instructions ahead | |
6712 | of i never change, so we don't need to worry about | |
6713 | changing NOPs in front of this slot. */ | |
6714 | for (j = i; j < 3; ++j) | |
6715 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6716 | } | |
6717 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6718 | ||
c10d9d8f | 6719 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6720 | if (idesc->type == IA64_TYPE_DYN) |
6721 | { | |
97762d08 JB |
6722 | enum ia64_opnd opnd1, opnd2; |
6723 | ||
800eeca4 JW |
6724 | if ((strcmp (idesc->name, "nop") == 0) |
6725 | || (strcmp (idesc->name, "break") == 0)) | |
6726 | insn_unit = required_unit; | |
91d777ee L |
6727 | else if (strcmp (idesc->name, "hint") == 0) |
6728 | { | |
6729 | insn_unit = required_unit; | |
6730 | if (required_unit == IA64_UNIT_B) | |
6731 | { | |
6732 | switch (md.hint_b) | |
6733 | { | |
6734 | case hint_b_ok: | |
6735 | break; | |
6736 | case hint_b_warning: | |
6737 | as_warn ("hint in B unit may be treated as nop"); | |
6738 | break; | |
6739 | case hint_b_error: | |
6740 | /* When manual bundling is off and there is no | |
6741 | user template, we choose a different unit so | |
6742 | that hint won't go into the current slot. We | |
6743 | will fill the current bundle with nops and | |
6744 | try to put hint into the next bundle. */ | |
6745 | if (!manual_bundling && user_template < 0) | |
6746 | insn_unit = IA64_UNIT_I; | |
6747 | else | |
6748 | as_bad ("hint in B unit can't be used"); | |
6749 | break; | |
6750 | } | |
6751 | } | |
6752 | } | |
97762d08 JB |
6753 | else if (strcmp (idesc->name, "chk.s") == 0 |
6754 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6755 | { |
6756 | insn_unit = IA64_UNIT_M; | |
97762d08 JB |
6757 | if (required_unit == IA64_UNIT_I |
6758 | || (required_unit == IA64_UNIT_F && template == 6)) | |
800eeca4 JW |
6759 | insn_unit = IA64_UNIT_I; |
6760 | } | |
6761 | else | |
6762 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6763 | ||
09124b3f | 6764 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]); |
97762d08 JB |
6765 | opnd1 = idesc->operands[0]; |
6766 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6767 | ia64_free_opcode (idesc); |
97762d08 JB |
6768 | idesc = ia64_find_opcode (mnemonic); |
6769 | /* moves to/from ARs have collisions */ | |
6770 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6771 | { | |
6772 | while (idesc != NULL | |
6773 | && (idesc->operands[0] != opnd1 | |
6774 | || idesc->operands[1] != opnd2)) | |
6775 | idesc = get_next_opcode (idesc); | |
6776 | } | |
97762d08 | 6777 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6778 | } |
6779 | else | |
6780 | { | |
6781 | insn_type = idesc->type; | |
6782 | insn_unit = IA64_UNIT_NIL; | |
6783 | switch (insn_type) | |
6784 | { | |
6785 | case IA64_TYPE_A: | |
6786 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6787 | insn_unit = required_unit; | |
6788 | break; | |
542d6675 | 6789 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6790 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6791 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6792 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6793 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6794 | default: break; | |
6795 | } | |
6796 | } | |
6797 | ||
6798 | if (insn_unit != required_unit) | |
9b505842 | 6799 | continue; /* Try next slot. */ |
800eeca4 | 6800 | |
196e8040 JW |
6801 | if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen) |
6802 | { | |
6803 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6804 | |
196e8040 JW |
6805 | md.slot[curr].loc_directive_seen = 0; |
6806 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6807 | } | |
800eeca4 JW |
6808 | |
6809 | build_insn (md.slot + curr, insn + i); | |
6810 | ||
d6e78c11 JW |
6811 | ptr = md.slot[curr].unwind_record; |
6812 | if (ptr) | |
6813 | { | |
6814 | /* Set slot numbers for all remaining unwind records belonging to the | |
6815 | current insn. There can not be any prologue/body unwind records | |
6816 | here. */ | |
6817 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6818 | for (; ptr != end_ptr; ptr = ptr->next) | |
6819 | { | |
6820 | ptr->slot_number = (unsigned long) f + i; | |
6821 | ptr->slot_frag = frag_now; | |
6822 | } | |
6823 | md.slot[curr].unwind_record = NULL; | |
6824 | } | |
10850f29 | 6825 | |
800eeca4 JW |
6826 | if (required_unit == IA64_UNIT_L) |
6827 | { | |
6828 | know (i == 1); | |
6829 | /* skip one slot for long/X-unit instructions */ | |
6830 | ++i; | |
6831 | } | |
6832 | --md.num_slots_in_use; | |
9b505842 | 6833 | last_slot = i; |
800eeca4 | 6834 | |
542d6675 | 6835 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6836 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6837 | { | |
6838 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6839 | symbol_set_frag (lfix->sym, frag_now); | |
6840 | } | |
f1bcba5b JW |
6841 | /* and fix up the tags also. */ |
6842 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6843 | { | |
6844 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6845 | symbol_set_frag (lfix->sym, frag_now); | |
6846 | } | |
800eeca4 JW |
6847 | |
6848 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6849 | { | |
6850 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6851 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6852 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6853 | fix->tc_fix_data.opnd = ifix->opnd; | |
6854 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6855 | fix->fx_file = md.slot[curr].src_file; | |
6856 | fix->fx_line = md.slot[curr].src_line; | |
6857 | } | |
6858 | ||
6859 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6860 | ||
542d6675 | 6861 | /* clear slot: */ |
800eeca4 JW |
6862 | ia64_free_opcode (md.slot[curr].idesc); |
6863 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6864 | md.slot[curr].user_template = -1; | |
6865 | ||
6866 | if (manual_bundling_off) | |
6867 | { | |
6868 | manual_bundling = 0; | |
6869 | break; | |
6870 | } | |
6871 | curr = (curr + 1) % NUM_SLOTS; | |
6872 | idesc = md.slot[curr].idesc; | |
6873 | } | |
f4660e2c | 6874 | if (manual_bundling > 0) |
800eeca4 JW |
6875 | { |
6876 | if (md.num_slots_in_use > 0) | |
ac025970 | 6877 | { |
9b505842 JB |
6878 | if (last_slot >= 2) |
6879 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6880 | "`%s' does not fit into bundle", idesc->name); | |
6881 | else if (last_slot < 0) | |
6882 | { | |
6883 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6884 | "`%s' does not fit into %s template", | |
6885 | idesc->name, ia64_templ_desc[template].name); | |
6886 | /* Drop first insn so we don't livelock. */ | |
6887 | --md.num_slots_in_use; | |
6888 | know (curr == first); | |
6889 | ia64_free_opcode (md.slot[curr].idesc); | |
6890 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6891 | md.slot[curr].user_template = -1; | |
6892 | } | |
6893 | else | |
6894 | { | |
6895 | const char *where; | |
6896 | ||
6897 | if (template == 2) | |
6898 | where = "X slot"; | |
6899 | else if (last_slot == 0) | |
6900 | where = "slots 2 or 3"; | |
6901 | else | |
6902 | where = "slot 3"; | |
6903 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6904 | "`%s' can't go in %s of %s template", | |
6905 | idesc->name, where, ia64_templ_desc[template].name); | |
6906 | } | |
ac025970 | 6907 | } |
800eeca4 JW |
6908 | else |
6909 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6910 | "Missing '}' at end of file"); | |
6911 | } | |
6912 | know (md.num_slots_in_use < NUM_SLOTS); | |
6913 | ||
6914 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6915 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6916 | ||
44f5c83a JW |
6917 | number_to_chars_littleendian (f + 0, t0, 8); |
6918 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
6919 | } |
6920 | ||
6921 | int | |
6922 | md_parse_option (c, arg) | |
6923 | int c; | |
6924 | char *arg; | |
6925 | { | |
7463c317 | 6926 | |
800eeca4 JW |
6927 | switch (c) |
6928 | { | |
c43c2cc5 | 6929 | /* Switches from the Intel assembler. */ |
44f5c83a | 6930 | case 'm': |
800eeca4 JW |
6931 | if (strcmp (arg, "ilp64") == 0 |
6932 | || strcmp (arg, "lp64") == 0 | |
6933 | || strcmp (arg, "p64") == 0) | |
6934 | { | |
6935 | md.flags |= EF_IA_64_ABI64; | |
6936 | } | |
6937 | else if (strcmp (arg, "ilp32") == 0) | |
6938 | { | |
6939 | md.flags &= ~EF_IA_64_ABI64; | |
6940 | } | |
6941 | else if (strcmp (arg, "le") == 0) | |
6942 | { | |
6943 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6944 | default_big_endian = 0; |
800eeca4 JW |
6945 | } |
6946 | else if (strcmp (arg, "be") == 0) | |
6947 | { | |
6948 | md.flags |= EF_IA_64_BE; | |
549f748d | 6949 | default_big_endian = 1; |
800eeca4 | 6950 | } |
970d6792 L |
6951 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6952 | { | |
6953 | arg += 13; | |
6954 | if (strcmp (arg, "warning") == 0) | |
6955 | md.unwind_check = unwind_check_warning; | |
6956 | else if (strcmp (arg, "error") == 0) | |
6957 | md.unwind_check = unwind_check_error; | |
6958 | else | |
6959 | return 0; | |
6960 | } | |
91d777ee L |
6961 | else if (strncmp (arg, "hint.b=", 7) == 0) |
6962 | { | |
6963 | arg += 7; | |
6964 | if (strcmp (arg, "ok") == 0) | |
6965 | md.hint_b = hint_b_ok; | |
6966 | else if (strcmp (arg, "warning") == 0) | |
6967 | md.hint_b = hint_b_warning; | |
6968 | else if (strcmp (arg, "error") == 0) | |
6969 | md.hint_b = hint_b_error; | |
6970 | else | |
6971 | return 0; | |
6972 | } | |
8c2fda1d L |
6973 | else if (strncmp (arg, "tune=", 5) == 0) |
6974 | { | |
6975 | arg += 5; | |
6976 | if (strcmp (arg, "itanium1") == 0) | |
6977 | md.tune = itanium1; | |
6978 | else if (strcmp (arg, "itanium2") == 0) | |
6979 | md.tune = itanium2; | |
6980 | else | |
6981 | return 0; | |
6982 | } | |
800eeca4 JW |
6983 | else |
6984 | return 0; | |
6985 | break; | |
6986 | ||
6987 | case 'N': | |
6988 | if (strcmp (arg, "so") == 0) | |
6989 | { | |
542d6675 | 6990 | /* Suppress signon message. */ |
800eeca4 JW |
6991 | } |
6992 | else if (strcmp (arg, "pi") == 0) | |
6993 | { | |
6994 | /* Reject privileged instructions. FIXME */ | |
6995 | } | |
6996 | else if (strcmp (arg, "us") == 0) | |
6997 | { | |
6998 | /* Allow union of signed and unsigned range. FIXME */ | |
6999 | } | |
7000 | else if (strcmp (arg, "close_fcalls") == 0) | |
7001 | { | |
7002 | /* Do not resolve global function calls. */ | |
7003 | } | |
7004 | else | |
7005 | return 0; | |
7006 | break; | |
7007 | ||
7008 | case 'C': | |
7009 | /* temp[="prefix"] Insert temporary labels into the object file | |
7010 | symbol table prefixed by "prefix". | |
7011 | Default prefix is ":temp:". | |
7012 | */ | |
7013 | break; | |
7014 | ||
7015 | case 'a': | |
800eeca4 JW |
7016 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7017 | according to <tgt> -- | |
7018 | exit: branch out from the current context (default) | |
7019 | labels: all labels in context may be branch targets | |
7020 | */ | |
85b40035 L |
7021 | if (strncmp (arg, "indirect=", 9) != 0) |
7022 | return 0; | |
800eeca4 JW |
7023 | break; |
7024 | ||
7025 | case 'x': | |
7026 | /* -X conflicts with an ignored option, use -x instead */ | |
7027 | md.detect_dv = 1; | |
7028 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7029 | { |
7030 | /* set default mode to explicit */ | |
7031 | md.default_explicit_mode = 1; | |
7032 | break; | |
7033 | } | |
800eeca4 | 7034 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7035 | { |
7036 | md.default_explicit_mode = 0; | |
7037 | } | |
f1dab70d JB |
7038 | else if (strcmp (arg, "none") == 0) |
7039 | { | |
7040 | md.detect_dv = 0; | |
7041 | } | |
800eeca4 | 7042 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7043 | { |
7044 | md.debug_dv = 1; | |
7045 | } | |
800eeca4 | 7046 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7047 | { |
7048 | md.default_explicit_mode = 1; | |
7049 | md.debug_dv = 1; | |
7050 | } | |
f1dab70d JB |
7051 | else if (strcmp (arg, "debugn") == 0) |
7052 | { | |
7053 | md.debug_dv = 1; | |
7054 | md.detect_dv = 0; | |
7055 | } | |
800eeca4 | 7056 | else |
542d6675 KH |
7057 | { |
7058 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7059 | } | |
800eeca4 JW |
7060 | break; |
7061 | ||
7062 | case 'S': | |
7063 | /* nops Print nops statistics. */ | |
7064 | break; | |
7065 | ||
c43c2cc5 JW |
7066 | /* GNU specific switches for gcc. */ |
7067 | case OPTION_MCONSTANT_GP: | |
7068 | md.flags |= EF_IA_64_CONS_GP; | |
7069 | break; | |
7070 | ||
7071 | case OPTION_MAUTO_PIC: | |
7072 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7073 | break; | |
7074 | ||
800eeca4 JW |
7075 | default: |
7076 | return 0; | |
7077 | } | |
7078 | ||
7079 | return 1; | |
7080 | } | |
7081 | ||
7082 | void | |
7083 | md_show_usage (stream) | |
7084 | FILE *stream; | |
7085 | { | |
542d6675 | 7086 | fputs (_("\ |
800eeca4 | 7087 | IA-64 options:\n\ |
6290819d NC |
7088 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7089 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7090 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7091 | without function descriptors (sets ELF header flag\n\ | |
7092 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7093 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7094 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7095 | -mtune=[itanium1|itanium2]\n\ |
7096 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7097 | -munwind-check=[warning|error]\n\ |
7098 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7099 | -mhint.b=[ok|warning|error]\n\ |
7100 | hint.b check (default -mhint.b=error)\n\ | |
f1dab70d JB |
7101 | -x | -xexplicit turn on dependency violation checking\n\ |
7102 | -xauto automagically remove dependency violations (default)\n\ | |
7103 | -xnone turn off dependency violation checking\n\ | |
7104 | -xdebug debug dependency violation checker\n\ | |
7105 | -xdebugn debug dependency violation checker but turn off\n\ | |
7106 | dependency violation checking\n\ | |
7107 | -xdebugx debug dependency violation checker and turn on\n\ | |
7108 | dependency violation checking\n"), | |
800eeca4 JW |
7109 | stream); |
7110 | } | |
7111 | ||
acebd4ce AS |
7112 | void |
7113 | ia64_after_parse_args () | |
7114 | { | |
7115 | if (debug_type == DEBUG_STABS) | |
7116 | as_fatal (_("--gstabs is not supported for ia64")); | |
7117 | } | |
7118 | ||
44576e1f RH |
7119 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7120 | ||
7121 | static int | |
800eeca4 JW |
7122 | match (int templ, int type, int slot) |
7123 | { | |
7124 | enum ia64_unit unit; | |
7125 | int result; | |
7126 | ||
7127 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7128 | switch (type) | |
7129 | { | |
7130 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7131 | case IA64_TYPE_A: | |
7132 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7133 | break; | |
7134 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7135 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7136 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7137 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7138 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7139 | default: result = 0; break; | |
7140 | } | |
7141 | return result; | |
7142 | } | |
7143 | ||
7c06efaa JW |
7144 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7145 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7146 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7147 | |
7148 | static inline int | |
7149 | extra_goodness (int templ, int slot) | |
7150 | { | |
8c2fda1d L |
7151 | switch (md.tune) |
7152 | { | |
7153 | case itanium1: | |
7154 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7155 | return 2; | |
7156 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7157 | return 1; | |
7158 | else | |
7159 | return 0; | |
7160 | break; | |
7161 | case itanium2: | |
7162 | if (match (templ, IA64_TYPE_M, slot) | |
7163 | || match (templ, IA64_TYPE_I, slot)) | |
7164 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7165 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7166 | branch-prediction. */ | |
7167 | return 2; | |
7168 | else | |
7169 | return 0; | |
7170 | break; | |
7171 | default: | |
7172 | abort (); | |
7173 | return 0; | |
7174 | } | |
44576e1f RH |
7175 | } |
7176 | ||
800eeca4 JW |
7177 | /* This function is called once, at assembler startup time. It sets |
7178 | up all the tables, etc. that the MD part of the assembler will need | |
7179 | that can be determined before arguments are parsed. */ | |
7180 | void | |
7181 | md_begin () | |
7182 | { | |
44f5c83a | 7183 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
7184 | const char *err; |
7185 | char name[8]; | |
7186 | ||
7187 | md.auto_align = 1; | |
7188 | md.explicit_mode = md.default_explicit_mode; | |
7189 | ||
7190 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7191 | ||
0234cb7c | 7192 | /* Make sure function pointers get initialized. */ |
10a98291 | 7193 | target_big_endian = -1; |
549f748d | 7194 | dot_byteorder (default_big_endian); |
10a98291 | 7195 | |
35f5df7f L |
7196 | alias_hash = hash_new (); |
7197 | alias_name_hash = hash_new (); | |
7198 | secalias_hash = hash_new (); | |
7199 | secalias_name_hash = hash_new (); | |
7200 | ||
13ae64f3 JJ |
7201 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7202 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7203 | &zero_address_frag); | |
7204 | ||
7205 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7206 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7207 | &zero_address_frag); | |
7208 | ||
800eeca4 | 7209 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7210 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7211 | &zero_address_frag); | |
800eeca4 JW |
7212 | |
7213 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7214 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7215 | &zero_address_frag); | |
800eeca4 JW |
7216 | |
7217 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7218 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7219 | &zero_address_frag); | |
800eeca4 | 7220 | |
fa2c7eff RH |
7221 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7222 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7223 | &zero_address_frag); | |
7224 | ||
c67e42c9 | 7225 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7226 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7227 | &zero_address_frag); | |
c67e42c9 | 7228 | |
800eeca4 | 7229 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7230 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7231 | &zero_address_frag); | |
800eeca4 JW |
7232 | |
7233 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7234 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7235 | &zero_address_frag); | |
800eeca4 JW |
7236 | |
7237 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7238 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7239 | &zero_address_frag); | |
800eeca4 | 7240 | |
13ae64f3 JJ |
7241 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7242 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7243 | &zero_address_frag); | |
7244 | ||
800eeca4 | 7245 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7246 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7247 | &zero_address_frag); | |
800eeca4 JW |
7248 | |
7249 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7250 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7251 | &zero_address_frag); | |
800eeca4 | 7252 | |
13ae64f3 JJ |
7253 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7254 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7255 | &zero_address_frag); | |
7256 | ||
7257 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7258 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7259 | &zero_address_frag); | |
7260 | ||
7261 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7262 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7263 | &zero_address_frag); | |
7264 | ||
3969b680 RH |
7265 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7266 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7267 | &zero_address_frag); | |
7268 | ||
f6fe78d6 JW |
7269 | if (md.tune != itanium1) |
7270 | { | |
7271 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7272 | le_nop[0] = 0x8; | |
7273 | le_nop_stop[0] = 0x9; | |
7274 | } | |
7275 | ||
197865e8 | 7276 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7277 | base 4 value, in which each match counts for 3. Match-failures |
7278 | result in NOPs and we use extra_goodness() to pick the execution | |
7279 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7280 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7281 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7282 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7283 | { | |
7284 | best = 0; | |
7285 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7286 | { | |
7287 | goodness = 0; | |
7288 | if (match (t, i, 0)) | |
7289 | { | |
7290 | if (match (t, j, 1)) | |
7291 | { | |
286cee81 | 7292 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7293 | goodness = 3 + 3 + 3; |
800eeca4 | 7294 | else |
44576e1f | 7295 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7296 | } |
7297 | else if (match (t, j, 2)) | |
44576e1f | 7298 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7299 | else |
44576e1f RH |
7300 | { |
7301 | goodness = 3; | |
7302 | goodness += extra_goodness (t, 1); | |
7303 | goodness += extra_goodness (t, 2); | |
7304 | } | |
800eeca4 JW |
7305 | } |
7306 | else if (match (t, i, 1)) | |
7307 | { | |
286cee81 | 7308 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7309 | goodness = 3 + 3; |
800eeca4 | 7310 | else |
44576e1f | 7311 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7312 | } |
7313 | else if (match (t, i, 2)) | |
44576e1f | 7314 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7315 | |
7316 | if (goodness > best) | |
7317 | { | |
7318 | best = goodness; | |
7319 | best_template[i][j][k] = t; | |
7320 | } | |
7321 | } | |
7322 | } | |
7323 | ||
7c06efaa JW |
7324 | #ifdef DEBUG_TEMPLATES |
7325 | /* For debugging changes to the best_template calculations. We don't care | |
7326 | about combinations with invalid instructions, so start the loops at 1. */ | |
7327 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7328 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7329 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7330 | { | |
7331 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7332 | 'x', 'd' }; | |
7333 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7334 | type_letter[k], | |
7335 | ia64_templ_desc[best_template[i][j][k]].name); | |
7336 | } | |
7337 | #endif | |
7338 | ||
800eeca4 JW |
7339 | for (i = 0; i < NUM_SLOTS; ++i) |
7340 | md.slot[i].user_template = -1; | |
7341 | ||
7342 | md.pseudo_hash = hash_new (); | |
7343 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7344 | { | |
7345 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7346 | (void *) (pseudo_opcode + i)); | |
7347 | if (err) | |
7348 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
7349 | pseudo_opcode[i].name, err); | |
7350 | } | |
7351 | ||
7352 | md.reg_hash = hash_new (); | |
7353 | md.dynreg_hash = hash_new (); | |
7354 | md.const_hash = hash_new (); | |
7355 | md.entry_hash = hash_new (); | |
7356 | ||
542d6675 | 7357 | /* general registers: */ |
800eeca4 JW |
7358 | |
7359 | total = 128; | |
7360 | for (i = 0; i < total; ++i) | |
7361 | { | |
7362 | sprintf (name, "r%d", i - REG_GR); | |
7363 | md.regsym[i] = declare_register (name, i); | |
7364 | } | |
7365 | ||
542d6675 | 7366 | /* floating point registers: */ |
800eeca4 JW |
7367 | total += 128; |
7368 | for (; i < total; ++i) | |
7369 | { | |
7370 | sprintf (name, "f%d", i - REG_FR); | |
7371 | md.regsym[i] = declare_register (name, i); | |
7372 | } | |
7373 | ||
542d6675 | 7374 | /* application registers: */ |
800eeca4 JW |
7375 | total += 128; |
7376 | ar_base = i; | |
7377 | for (; i < total; ++i) | |
7378 | { | |
7379 | sprintf (name, "ar%d", i - REG_AR); | |
7380 | md.regsym[i] = declare_register (name, i); | |
7381 | } | |
7382 | ||
542d6675 | 7383 | /* control registers: */ |
800eeca4 JW |
7384 | total += 128; |
7385 | cr_base = i; | |
7386 | for (; i < total; ++i) | |
7387 | { | |
7388 | sprintf (name, "cr%d", i - REG_CR); | |
7389 | md.regsym[i] = declare_register (name, i); | |
7390 | } | |
7391 | ||
542d6675 | 7392 | /* predicate registers: */ |
800eeca4 JW |
7393 | total += 64; |
7394 | for (; i < total; ++i) | |
7395 | { | |
7396 | sprintf (name, "p%d", i - REG_P); | |
7397 | md.regsym[i] = declare_register (name, i); | |
7398 | } | |
7399 | ||
542d6675 | 7400 | /* branch registers: */ |
800eeca4 JW |
7401 | total += 8; |
7402 | for (; i < total; ++i) | |
7403 | { | |
7404 | sprintf (name, "b%d", i - REG_BR); | |
7405 | md.regsym[i] = declare_register (name, i); | |
7406 | } | |
7407 | ||
7408 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
7409 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
7410 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
7411 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
7412 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
7413 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
7414 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
7415 | ||
7416 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7417 | { | |
7418 | regnum = indirect_reg[i].regnum; | |
7419 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
7420 | } | |
7421 | ||
542d6675 | 7422 | /* define synonyms for application registers: */ |
800eeca4 JW |
7423 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
7424 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
7425 | REG_AR + ar[i - REG_AR].regnum); | |
7426 | ||
542d6675 | 7427 | /* define synonyms for control registers: */ |
800eeca4 JW |
7428 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
7429 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
7430 | REG_CR + cr[i - REG_CR].regnum); | |
7431 | ||
7432 | declare_register ("gp", REG_GR + 1); | |
7433 | declare_register ("sp", REG_GR + 12); | |
7434 | declare_register ("rp", REG_BR + 0); | |
7435 | ||
542d6675 | 7436 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7437 | declare_register ("psp", REG_PSP); |
7438 | ||
800eeca4 JW |
7439 | declare_register_set ("ret", 4, REG_GR + 8); |
7440 | declare_register_set ("farg", 8, REG_FR + 8); | |
7441 | declare_register_set ("fret", 8, REG_FR + 8); | |
7442 | ||
7443 | for (i = 0; i < NELEMS (const_bits); ++i) | |
7444 | { | |
7445 | err = hash_insert (md.const_hash, const_bits[i].name, | |
7446 | (PTR) (const_bits + i)); | |
7447 | if (err) | |
7448 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
7449 | name, err); | |
7450 | } | |
7451 | ||
44f5c83a JW |
7452 | /* Set the architecture and machine depending on defaults and command line |
7453 | options. */ | |
7454 | if (md.flags & EF_IA_64_ABI64) | |
7455 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7456 | else | |
7457 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7458 | ||
7459 | if (! ok) | |
7460 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7461 | |
557debba JW |
7462 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7463 | ||
7464 | if (md.flags & EF_IA_64_ABI64) | |
7465 | { | |
7466 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7467 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7468 | } | |
7469 | else | |
7470 | { | |
7471 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7472 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7473 | } | |
7474 | ||
800eeca4 JW |
7475 | md.mem_offset.hint = 0; |
7476 | md.path = 0; | |
7477 | md.maxpaths = 0; | |
7478 | md.entry_labels = NULL; | |
7479 | } | |
7480 | ||
970d6792 L |
7481 | /* Set the default options in md. Cannot do this in md_begin because |
7482 | that is called after md_parse_option which is where we set the | |
7483 | options in md based on command line options. */ | |
44f5c83a JW |
7484 | |
7485 | void | |
7486 | ia64_init (argc, argv) | |
2434f565 JW |
7487 | int argc ATTRIBUTE_UNUSED; |
7488 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7489 | { |
1cd8ff38 | 7490 | md.flags = MD_FLAGS_DEFAULT; |
f1dab70d | 7491 | md.detect_dv = 1; |
970d6792 L |
7492 | /* FIXME: We should change it to unwind_check_error someday. */ |
7493 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7494 | md.hint_b = hint_b_error; |
8c2fda1d | 7495 | md.tune = itanium2; |
44f5c83a JW |
7496 | } |
7497 | ||
7498 | /* Return a string for the target object file format. */ | |
7499 | ||
7500 | const char * | |
7501 | ia64_target_format () | |
7502 | { | |
7503 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7504 | { | |
72a76794 JW |
7505 | if (md.flags & EF_IA_64_BE) |
7506 | { | |
7507 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7508 | #if defined(TE_AIX50) |
7463c317 | 7509 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7510 | #elif defined(TE_HPUX) |
7511 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7512 | #else |
72a76794 | 7513 | return "elf64-ia64-big"; |
7463c317 | 7514 | #endif |
72a76794 | 7515 | else |
1cd8ff38 | 7516 | #if defined(TE_AIX50) |
7463c317 | 7517 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7518 | #elif defined(TE_HPUX) |
7519 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7520 | #else |
72a76794 | 7521 | return "elf32-ia64-big"; |
7463c317 | 7522 | #endif |
72a76794 | 7523 | } |
44f5c83a | 7524 | else |
72a76794 JW |
7525 | { |
7526 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7527 | #ifdef TE_AIX50 |
7528 | return "elf64-ia64-aix-little"; | |
7529 | #else | |
72a76794 | 7530 | return "elf64-ia64-little"; |
7463c317 | 7531 | #endif |
72a76794 | 7532 | else |
7463c317 TW |
7533 | #ifdef TE_AIX50 |
7534 | return "elf32-ia64-aix-little"; | |
7535 | #else | |
72a76794 | 7536 | return "elf32-ia64-little"; |
7463c317 | 7537 | #endif |
72a76794 | 7538 | } |
44f5c83a JW |
7539 | } |
7540 | else | |
7541 | return "unknown-format"; | |
7542 | } | |
7543 | ||
800eeca4 JW |
7544 | void |
7545 | ia64_end_of_source () | |
7546 | { | |
542d6675 | 7547 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7548 | insn_group_break (1, 0, 0); |
7549 | ||
542d6675 | 7550 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7551 | ia64_flush_insns (); |
7552 | ||
7553 | bfd_set_private_flags (stdoutput, md.flags); | |
7554 | ||
800eeca4 JW |
7555 | md.mem_offset.hint = 0; |
7556 | } | |
7557 | ||
7558 | void | |
7559 | ia64_start_line () | |
7560 | { | |
f1bcba5b JW |
7561 | if (md.qp.X_op == O_register) |
7562 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7563 | md.qp.X_op = O_absent; |
7564 | ||
7565 | if (ignore_input ()) | |
7566 | return; | |
7567 | ||
7568 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7569 | { | |
7570 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7571 | { |
7572 | static int warned; | |
7573 | ||
7574 | if (!warned) | |
7575 | { | |
7576 | warned = 1; | |
7577 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7578 | } | |
7579 | } | |
800eeca4 | 7580 | else |
542d6675 | 7581 | insn_group_break (1, 0, 0); |
800eeca4 JW |
7582 | } |
7583 | } | |
7584 | ||
f1bcba5b JW |
7585 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7586 | labels. */ | |
7587 | static int defining_tag = 0; | |
7588 | ||
800eeca4 JW |
7589 | int |
7590 | ia64_unrecognized_line (ch) | |
7591 | int ch; | |
7592 | { | |
7593 | switch (ch) | |
7594 | { | |
7595 | case '(': | |
7596 | expression (&md.qp); | |
7597 | if (*input_line_pointer++ != ')') | |
7598 | { | |
7599 | as_bad ("Expected ')'"); | |
7600 | return 0; | |
7601 | } | |
7602 | if (md.qp.X_op != O_register) | |
7603 | { | |
7604 | as_bad ("Qualifying predicate expected"); | |
7605 | return 0; | |
7606 | } | |
7607 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7608 | { | |
7609 | as_bad ("Predicate register expected"); | |
7610 | return 0; | |
7611 | } | |
7612 | return 1; | |
7613 | ||
7614 | case '{': | |
7615 | if (md.manual_bundling) | |
7616 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7617 | else | |
7618 | CURR_SLOT.manual_bundling_on = 1; | |
7619 | md.manual_bundling = 1; | |
7620 | ||
542d6675 KH |
7621 | /* Bundling is only acceptable in explicit mode |
7622 | or when in default automatic mode. */ | |
800eeca4 | 7623 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7624 | { |
7625 | if (!md.mode_explicitly_set | |
7626 | && !md.default_explicit_mode) | |
7627 | dot_dv_mode ('E'); | |
7628 | else | |
7629 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7630 | } | |
800eeca4 JW |
7631 | return 1; |
7632 | ||
7633 | case '}': | |
7634 | if (!md.manual_bundling) | |
7635 | as_warn ("Found '}' when manual bundling is off"); | |
7636 | else | |
7637 | PREV_SLOT.manual_bundling_off = 1; | |
7638 | md.manual_bundling = 0; | |
7639 | ||
7640 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7641 | if (md.detect_dv |
542d6675 KH |
7642 | && md.explicit_mode |
7643 | && !md.mode_explicitly_set | |
7644 | && !md.default_explicit_mode) | |
7645 | dot_dv_mode ('A'); | |
800eeca4 JW |
7646 | |
7647 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7648 | happens automatically because ';' is an end of line marker. */ | |
7649 | SKIP_WHITESPACE (); | |
7650 | if (input_line_pointer[0] == '{') | |
7651 | { | |
7652 | input_line_pointer++; | |
7653 | return ia64_unrecognized_line ('{'); | |
7654 | } | |
7655 | ||
7656 | demand_empty_rest_of_line (); | |
7657 | return 1; | |
7658 | ||
f1bcba5b JW |
7659 | case '[': |
7660 | { | |
7661 | char *s; | |
7662 | char c; | |
7663 | symbolS *tag; | |
4d5a53ff | 7664 | int temp; |
f1bcba5b JW |
7665 | |
7666 | if (md.qp.X_op == O_register) | |
7667 | { | |
7668 | as_bad ("Tag must come before qualifying predicate."); | |
7669 | return 0; | |
7670 | } | |
4d5a53ff JW |
7671 | |
7672 | /* This implements just enough of read_a_source_file in read.c to | |
7673 | recognize labels. */ | |
7674 | if (is_name_beginner (*input_line_pointer)) | |
7675 | { | |
7676 | s = input_line_pointer; | |
7677 | c = get_symbol_end (); | |
7678 | } | |
7679 | else if (LOCAL_LABELS_FB | |
3882b010 | 7680 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7681 | { |
7682 | temp = 0; | |
3882b010 | 7683 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7684 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7685 | fb_label_instance_inc (temp); | |
7686 | s = fb_label_name (temp, 0); | |
7687 | c = *input_line_pointer; | |
7688 | } | |
7689 | else | |
7690 | { | |
7691 | s = NULL; | |
7692 | c = '\0'; | |
7693 | } | |
f1bcba5b JW |
7694 | if (c != ':') |
7695 | { | |
7696 | /* Put ':' back for error messages' sake. */ | |
7697 | *input_line_pointer++ = ':'; | |
7698 | as_bad ("Expected ':'"); | |
7699 | return 0; | |
7700 | } | |
4d5a53ff | 7701 | |
f1bcba5b JW |
7702 | defining_tag = 1; |
7703 | tag = colon (s); | |
7704 | defining_tag = 0; | |
7705 | /* Put ':' back for error messages' sake. */ | |
7706 | *input_line_pointer++ = ':'; | |
7707 | if (*input_line_pointer++ != ']') | |
7708 | { | |
7709 | as_bad ("Expected ']'"); | |
7710 | return 0; | |
7711 | } | |
7712 | if (! tag) | |
7713 | { | |
7714 | as_bad ("Tag name expected"); | |
7715 | return 0; | |
7716 | } | |
7717 | return 1; | |
7718 | } | |
7719 | ||
800eeca4 JW |
7720 | default: |
7721 | break; | |
7722 | } | |
542d6675 KH |
7723 | |
7724 | /* Not a valid line. */ | |
7725 | return 0; | |
800eeca4 JW |
7726 | } |
7727 | ||
7728 | void | |
7729 | ia64_frob_label (sym) | |
7730 | struct symbol *sym; | |
7731 | { | |
7732 | struct label_fix *fix; | |
7733 | ||
f1bcba5b JW |
7734 | /* Tags need special handling since they are not bundle breaks like |
7735 | labels. */ | |
7736 | if (defining_tag) | |
7737 | { | |
7738 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7739 | fix->sym = sym; | |
7740 | fix->next = CURR_SLOT.tag_fixups; | |
7741 | CURR_SLOT.tag_fixups = fix; | |
7742 | ||
7743 | return; | |
7744 | } | |
7745 | ||
800eeca4 JW |
7746 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7747 | { | |
7748 | md.last_text_seg = now_seg; | |
7749 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7750 | fix->sym = sym; | |
7751 | fix->next = CURR_SLOT.label_fixups; | |
7752 | CURR_SLOT.label_fixups = fix; | |
7753 | ||
542d6675 | 7754 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7755 | if (md.path == md.maxpaths) |
542d6675 KH |
7756 | { |
7757 | md.maxpaths += 20; | |
7758 | md.entry_labels = (const char **) | |
7759 | xrealloc ((void *) md.entry_labels, | |
7760 | md.maxpaths * sizeof (char *)); | |
7761 | } | |
800eeca4 JW |
7762 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7763 | } | |
7764 | } | |
7765 | ||
936cf02e JW |
7766 | #ifdef TE_HPUX |
7767 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7768 | that are declared but unused. This routine removes declared, | |
7769 | unused symbols from an object. */ | |
7770 | int | |
7771 | ia64_frob_symbol (sym) | |
7772 | struct symbol *sym; | |
7773 | { | |
7774 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7775 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7776 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7777 | && ! S_IS_EXTERNAL (sym))) | |
7778 | return 1; | |
7779 | return 0; | |
7780 | } | |
7781 | #endif | |
7782 | ||
800eeca4 JW |
7783 | void |
7784 | ia64_flush_pending_output () | |
7785 | { | |
4d5a53ff JW |
7786 | if (!md.keep_pending_output |
7787 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7788 | { |
7789 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7790 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7791 | insn_group_break (1, 0, 0); | |
7792 | ia64_flush_insns (); | |
7793 | } | |
7794 | } | |
7795 | ||
7796 | /* Do ia64-specific expression optimization. All that's done here is | |
7797 | to transform index expressions that are either due to the indexing | |
7798 | of rotating registers or due to the indexing of indirect register | |
7799 | sets. */ | |
7800 | int | |
7801 | ia64_optimize_expr (l, op, r) | |
7802 | expressionS *l; | |
7803 | operatorT op; | |
7804 | expressionS *r; | |
7805 | { | |
7806 | unsigned num_regs; | |
7807 | ||
7808 | if (op == O_index) | |
7809 | { | |
7810 | if (l->X_op == O_register && r->X_op == O_constant) | |
7811 | { | |
7812 | num_regs = (l->X_add_number >> 16); | |
7813 | if ((unsigned) r->X_add_number >= num_regs) | |
7814 | { | |
7815 | if (!num_regs) | |
7816 | as_bad ("No current frame"); | |
7817 | else | |
7818 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7819 | r->X_add_number = 0; | |
7820 | } | |
7821 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7822 | return 1; | |
7823 | } | |
7824 | else if (l->X_op == O_register && r->X_op == O_register) | |
7825 | { | |
7826 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7827 | || l->X_add_number == IND_MEM) | |
7828 | { | |
7829 | as_bad ("Indirect register set name expected"); | |
7830 | l->X_add_number = IND_CPUID; | |
7831 | } | |
7832 | l->X_op = O_index; | |
7833 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7834 | l->X_add_number = r->X_add_number; | |
7835 | return 1; | |
7836 | } | |
7837 | } | |
7838 | return 0; | |
7839 | } | |
7840 | ||
7841 | int | |
16a48f83 | 7842 | ia64_parse_name (name, e, nextcharP) |
800eeca4 JW |
7843 | char *name; |
7844 | expressionS *e; | |
16a48f83 | 7845 | char *nextcharP; |
800eeca4 JW |
7846 | { |
7847 | struct const_desc *cdesc; | |
7848 | struct dynreg *dr = 0; | |
16a48f83 | 7849 | unsigned int idx; |
800eeca4 JW |
7850 | struct symbol *sym; |
7851 | char *end; | |
7852 | ||
16a48f83 JB |
7853 | if (*name == '@') |
7854 | { | |
7855 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7856 | ||
7857 | /* Find what relocation pseudo-function we're dealing with. */ | |
7858 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7859 | if (pseudo_func[idx].name | |
7860 | && pseudo_func[idx].name[0] == name[1] | |
7861 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7862 | { | |
7863 | pseudo_type = pseudo_func[idx].type; | |
7864 | break; | |
7865 | } | |
7866 | switch (pseudo_type) | |
7867 | { | |
7868 | case PSEUDO_FUNC_RELOC: | |
7869 | end = input_line_pointer; | |
7870 | if (*nextcharP != '(') | |
7871 | { | |
7872 | as_bad ("Expected '('"); | |
2f6d622e | 7873 | break; |
16a48f83 JB |
7874 | } |
7875 | /* Skip '('. */ | |
7876 | ++input_line_pointer; | |
7877 | expression (e); | |
7878 | if (*input_line_pointer != ')') | |
7879 | { | |
7880 | as_bad ("Missing ')'"); | |
7881 | goto done; | |
7882 | } | |
7883 | /* Skip ')'. */ | |
7884 | ++input_line_pointer; | |
7885 | if (e->X_op != O_symbol) | |
7886 | { | |
7887 | if (e->X_op != O_pseudo_fixup) | |
7888 | { | |
7889 | as_bad ("Not a symbolic expression"); | |
7890 | goto done; | |
7891 | } | |
7892 | if (idx != FUNC_LT_RELATIVE) | |
7893 | { | |
7894 | as_bad ("Illegal combination of relocation functions"); | |
7895 | goto done; | |
7896 | } | |
7897 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7898 | { | |
7899 | case FUNC_FPTR_RELATIVE: | |
7900 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7901 | case FUNC_DTP_MODULE: | |
7902 | idx = FUNC_LT_DTP_MODULE; break; | |
7903 | case FUNC_DTP_RELATIVE: | |
7904 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7905 | case FUNC_TP_RELATIVE: | |
7906 | idx = FUNC_LT_TP_RELATIVE; break; | |
7907 | default: | |
7908 | as_bad ("Illegal combination of relocation functions"); | |
7909 | goto done; | |
7910 | } | |
7911 | } | |
7912 | /* Make sure gas doesn't get rid of local symbols that are used | |
7913 | in relocs. */ | |
7914 | e->X_op = O_pseudo_fixup; | |
7915 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7916 | done: |
7917 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7918 | break; |
7919 | ||
7920 | case PSEUDO_FUNC_CONST: | |
7921 | e->X_op = O_constant; | |
7922 | e->X_add_number = pseudo_func[idx].u.ival; | |
7923 | break; | |
7924 | ||
7925 | case PSEUDO_FUNC_REG: | |
7926 | e->X_op = O_register; | |
7927 | e->X_add_number = pseudo_func[idx].u.ival; | |
7928 | break; | |
7929 | ||
7930 | default: | |
7931 | return 0; | |
7932 | } | |
16a48f83 JB |
7933 | return 1; |
7934 | } | |
7935 | ||
542d6675 | 7936 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7937 | sym = hash_find (md.reg_hash, name); |
7938 | if (sym) | |
7939 | { | |
7940 | e->X_op = O_register; | |
7941 | e->X_add_number = S_GET_VALUE (sym); | |
7942 | return 1; | |
7943 | } | |
7944 | ||
7945 | cdesc = hash_find (md.const_hash, name); | |
7946 | if (cdesc) | |
7947 | { | |
7948 | e->X_op = O_constant; | |
7949 | e->X_add_number = cdesc->value; | |
7950 | return 1; | |
7951 | } | |
7952 | ||
542d6675 | 7953 | /* check for inN, locN, or outN: */ |
26b810ce | 7954 | idx = 0; |
800eeca4 JW |
7955 | switch (name[0]) |
7956 | { | |
7957 | case 'i': | |
3882b010 | 7958 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7959 | { |
7960 | dr = &md.in; | |
26b810ce | 7961 | idx = 2; |
800eeca4 JW |
7962 | } |
7963 | break; | |
7964 | ||
7965 | case 'l': | |
3882b010 | 7966 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7967 | { |
7968 | dr = &md.loc; | |
26b810ce | 7969 | idx = 3; |
800eeca4 JW |
7970 | } |
7971 | break; | |
7972 | ||
7973 | case 'o': | |
3882b010 | 7974 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7975 | { |
7976 | dr = &md.out; | |
26b810ce | 7977 | idx = 3; |
800eeca4 JW |
7978 | } |
7979 | break; | |
7980 | ||
7981 | default: | |
7982 | break; | |
7983 | } | |
7984 | ||
26b810ce JB |
7985 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
7986 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 7987 | { |
26b810ce JB |
7988 | unsigned long regnum; |
7989 | ||
542d6675 | 7990 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
7991 | regnum = strtoul (name + idx, &end, 10); |
7992 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 7993 | { |
26b810ce | 7994 | if (regnum >= dr->num_regs) |
800eeca4 JW |
7995 | { |
7996 | if (!dr->num_regs) | |
7997 | as_bad ("No current frame"); | |
7998 | else | |
542d6675 KH |
7999 | as_bad ("Register number out of range 0..%u", |
8000 | dr->num_regs - 1); | |
800eeca4 JW |
8001 | regnum = 0; |
8002 | } | |
8003 | e->X_op = O_register; | |
8004 | e->X_add_number = dr->base + regnum; | |
8005 | return 1; | |
8006 | } | |
8007 | } | |
8008 | ||
20b36a95 JB |
8009 | end = alloca (strlen (name) + 1); |
8010 | strcpy (end, name); | |
8011 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8012 | if ((dr = hash_find (md.dynreg_hash, name))) |
8013 | { | |
8014 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8015 | Store the base register number in the low 16 bits of |
8016 | X_add_number and the size of the register set in the top 16 | |
8017 | bits. */ | |
800eeca4 JW |
8018 | e->X_op = O_register; |
8019 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8020 | return 1; | |
8021 | } | |
8022 | return 0; | |
8023 | } | |
8024 | ||
8025 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8026 | ||
8027 | char * | |
8028 | ia64_canonicalize_symbol_name (name) | |
8029 | char *name; | |
8030 | { | |
20b36a95 JB |
8031 | size_t len = strlen (name), full = len; |
8032 | ||
8033 | while (len > 0 && name[len - 1] == '#') | |
8034 | --len; | |
8035 | if (len <= 0) | |
8036 | { | |
8037 | if (full > 0) | |
8038 | as_bad ("Standalone `#' is illegal"); | |
20b36a95 JB |
8039 | } |
8040 | else if (len < full - 1) | |
8041 | as_warn ("Redundant `#' suffix operators"); | |
8042 | name[len] = '\0'; | |
800eeca4 JW |
8043 | return name; |
8044 | } | |
8045 | ||
3e37788f JW |
8046 | /* Return true if idesc is a conditional branch instruction. This excludes |
8047 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8048 | because they always read/write resources regardless of the value of the | |
8049 | qualifying predicate. br.ia must always use p0, and hence is always | |
8050 | taken. Thus this function returns true for branches which can fall | |
8051 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8052 | |
800eeca4 JW |
8053 | static int |
8054 | is_conditional_branch (idesc) | |
542d6675 | 8055 | struct ia64_opcode *idesc; |
800eeca4 | 8056 | { |
1deb8127 | 8057 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8058 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8059 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8060 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8061 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8062 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8063 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8064 | || idesc->name[2] == 'l' | |
8065 | /* br.cond, br.call, br.clr */ | |
8066 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8067 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8068 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8069 | } |
8070 | ||
8071 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8072 | returns zero. */ |
8073 | ||
800eeca4 JW |
8074 | static int |
8075 | is_taken_branch (idesc) | |
542d6675 | 8076 | struct ia64_opcode *idesc; |
800eeca4 JW |
8077 | { |
8078 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8079 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8080 | } |
8081 | ||
8082 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8083 | doubt, returns zero. */ |
8084 | ||
800eeca4 JW |
8085 | static int |
8086 | is_interruption_or_rfi (idesc) | |
542d6675 | 8087 | struct ia64_opcode *idesc; |
800eeca4 JW |
8088 | { |
8089 | if (strcmp (idesc->name, "rfi") == 0) | |
8090 | return 1; | |
8091 | return 0; | |
8092 | } | |
8093 | ||
8094 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8095 | -1 if there is no dependency. */ | |
542d6675 | 8096 | |
800eeca4 JW |
8097 | static int |
8098 | depends_on (depind, idesc) | |
542d6675 KH |
8099 | int depind; |
8100 | struct ia64_opcode *idesc; | |
800eeca4 JW |
8101 | { |
8102 | int i; | |
8103 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8104 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8105 | { |
542d6675 KH |
8106 | if (depind == DEP (dep->chks[i])) |
8107 | return i; | |
800eeca4 JW |
8108 | } |
8109 | return -1; | |
8110 | } | |
8111 | ||
8112 | /* Determine a set of specific resources used for a particular resource | |
8113 | class. Returns the number of specific resources identified For those | |
8114 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8115 | marked nonspecific. |
800eeca4 JW |
8116 | |
8117 | Meanings of value in 'NOTE': | |
8118 | 1) only read/write when the register number is explicitly encoded in the | |
8119 | insn. | |
8120 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8121 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8122 | 3) general register value is used to specify an indirect register; not |
8123 | determinable statically. | |
8124 | 4) only read the given resource when bits 7:0 of the indirect index | |
8125 | register value does not match the register number of the resource; not | |
8126 | determinable statically. | |
8127 | 5) all rules are implementation specific. | |
8128 | 6) only when both the index specified by the reader and the index specified | |
8129 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8130 | statically. |
800eeca4 | 8131 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8132 | set |
800eeca4 JW |
8133 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8134 | only read when these insns reference FR2-31 | |
8135 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8136 | written when these insns write FR32-127 | |
8137 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8138 | instruction | |
8139 | 11) The target predicates are written independently of PR[qp], but source | |
8140 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8141 | cannot statically be determined, all source registers are marked used. | |
8142 | 12) This insn only reads the specified predicate register when that | |
8143 | register is the PR[qp]. | |
8144 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 8145 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8146 | 14) The RSE resource includes the implementation-specific RSE internal |
8147 | state resources. At least one (and possibly more) of these resources are | |
8148 | read by each instruction listed in IC:rse-readers. At least one (and | |
8149 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8150 | IC:rse-writers. |
800eeca4 | 8151 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8152 | generate. |
800eeca4 JW |
8153 | |
8154 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8155 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8156 | */ |
8157 | ||
8158 | #define MAX_SPECS 256 | |
8159 | #define DV_CHK 1 | |
8160 | #define DV_REG 0 | |
8161 | ||
8162 | static int | |
8163 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
8164 | const struct ia64_dependency *dep; |
8165 | struct ia64_opcode *idesc; | |
8166 | int type; /* is this a DV chk or a DV reg? */ | |
8167 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
8168 | int note; /* resource note for this insn's usage */ | |
8169 | int path; /* which execution path to examine */ | |
800eeca4 JW |
8170 | { |
8171 | int count = 0; | |
8172 | int i; | |
8173 | int rsrc_write = 0; | |
8174 | struct rsrc tmpl; | |
197865e8 | 8175 | |
800eeca4 JW |
8176 | if (dep->mode == IA64_DV_WAW |
8177 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8178 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8179 | rsrc_write = 1; | |
8180 | ||
8181 | /* template for any resources we identify */ | |
8182 | tmpl.dependency = dep; | |
8183 | tmpl.note = note; | |
8184 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8185 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8186 | tmpl.link_to_qp_branch = 1; | |
8187 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8188 | tmpl.mem_offset.offset = 0; |
8189 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8190 | tmpl.specific = 1; |
a66d2bb7 | 8191 | tmpl.index = -1; |
7484b8e6 | 8192 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8193 | tmpl.depind = 0; |
8194 | tmpl.file = NULL; | |
8195 | tmpl.line = 0; | |
8196 | tmpl.path = 0; | |
800eeca4 JW |
8197 | |
8198 | #define UNHANDLED \ | |
8199 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8200 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8201 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8202 | ||
8203 | /* we don't need to track these */ | |
8204 | if (dep->semantics == IA64_DVS_NONE) | |
8205 | return 0; | |
8206 | ||
8207 | switch (dep->specifier) | |
8208 | { | |
8209 | case IA64_RS_AR_K: | |
8210 | if (note == 1) | |
542d6675 KH |
8211 | { |
8212 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8213 | { | |
8214 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8215 | if (regno >= 0 && regno <= 7) | |
8216 | { | |
8217 | specs[count] = tmpl; | |
8218 | specs[count++].index = regno; | |
8219 | } | |
8220 | } | |
8221 | } | |
800eeca4 | 8222 | else if (note == 0) |
542d6675 KH |
8223 | { |
8224 | for (i = 0; i < 8; i++) | |
8225 | { | |
8226 | specs[count] = tmpl; | |
8227 | specs[count++].index = i; | |
8228 | } | |
8229 | } | |
800eeca4 | 8230 | else |
542d6675 KH |
8231 | { |
8232 | UNHANDLED; | |
8233 | } | |
800eeca4 JW |
8234 | break; |
8235 | ||
8236 | case IA64_RS_AR_UNAT: | |
8237 | /* This is a mov =AR or mov AR= instruction. */ | |
8238 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8239 | { | |
8240 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8241 | if (regno == AR_UNAT) | |
8242 | { | |
8243 | specs[count++] = tmpl; | |
8244 | } | |
8245 | } | |
8246 | else | |
8247 | { | |
8248 | /* This is a spill/fill, or other instruction that modifies the | |
8249 | unat register. */ | |
8250 | ||
8251 | /* Unless we can determine the specific bits used, mark the whole | |
8252 | thing; bits 8:3 of the memory address indicate the bit used in | |
8253 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8254 | subset of conflicts. */ | |
8255 | specs[count] = tmpl; | |
8256 | if (md.mem_offset.hint) | |
8257 | { | |
542d6675 KH |
8258 | if (md.debug_dv) |
8259 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8260 | /* The index isn't actually used, just set it to something | |
8261 | approximating the bit index. */ | |
800eeca4 JW |
8262 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8263 | specs[count].mem_offset.hint = 1; | |
8264 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8265 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8266 | } | |
8267 | else | |
8268 | { | |
8269 | specs[count++].specific = 0; | |
8270 | } | |
8271 | } | |
8272 | break; | |
8273 | ||
8274 | case IA64_RS_AR: | |
8275 | if (note == 1) | |
542d6675 KH |
8276 | { |
8277 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8278 | { | |
8279 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8280 | if ((regno >= 8 && regno <= 15) | |
8281 | || (regno >= 20 && regno <= 23) | |
8282 | || (regno >= 31 && regno <= 39) | |
8283 | || (regno >= 41 && regno <= 47) | |
8284 | || (regno >= 67 && regno <= 111)) | |
8285 | { | |
8286 | specs[count] = tmpl; | |
8287 | specs[count++].index = regno; | |
8288 | } | |
8289 | } | |
8290 | } | |
800eeca4 | 8291 | else |
542d6675 KH |
8292 | { |
8293 | UNHANDLED; | |
8294 | } | |
800eeca4 JW |
8295 | break; |
8296 | ||
8297 | case IA64_RS_ARb: | |
8298 | if (note == 1) | |
542d6675 KH |
8299 | { |
8300 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8301 | { | |
8302 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8303 | if ((regno >= 48 && regno <= 63) | |
8304 | || (regno >= 112 && regno <= 127)) | |
8305 | { | |
8306 | specs[count] = tmpl; | |
8307 | specs[count++].index = regno; | |
8308 | } | |
8309 | } | |
8310 | } | |
800eeca4 | 8311 | else if (note == 0) |
542d6675 KH |
8312 | { |
8313 | for (i = 48; i < 64; i++) | |
8314 | { | |
8315 | specs[count] = tmpl; | |
8316 | specs[count++].index = i; | |
8317 | } | |
8318 | for (i = 112; i < 128; i++) | |
8319 | { | |
8320 | specs[count] = tmpl; | |
8321 | specs[count++].index = i; | |
8322 | } | |
8323 | } | |
197865e8 | 8324 | else |
542d6675 KH |
8325 | { |
8326 | UNHANDLED; | |
8327 | } | |
800eeca4 JW |
8328 | break; |
8329 | ||
8330 | case IA64_RS_BR: | |
8331 | if (note != 1) | |
542d6675 KH |
8332 | { |
8333 | UNHANDLED; | |
8334 | } | |
800eeca4 | 8335 | else |
542d6675 KH |
8336 | { |
8337 | if (rsrc_write) | |
8338 | { | |
8339 | for (i = 0; i < idesc->num_outputs; i++) | |
8340 | if (idesc->operands[i] == IA64_OPND_B1 | |
8341 | || idesc->operands[i] == IA64_OPND_B2) | |
8342 | { | |
8343 | specs[count] = tmpl; | |
8344 | specs[count++].index = | |
8345 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8346 | } | |
8347 | } | |
8348 | else | |
8349 | { | |
40449e9f | 8350 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8351 | if (idesc->operands[i] == IA64_OPND_B1 |
8352 | || idesc->operands[i] == IA64_OPND_B2) | |
8353 | { | |
8354 | specs[count] = tmpl; | |
8355 | specs[count++].index = | |
8356 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8357 | } | |
8358 | } | |
8359 | } | |
800eeca4 JW |
8360 | break; |
8361 | ||
8362 | case IA64_RS_CPUID: /* four or more registers */ | |
8363 | if (note == 3) | |
542d6675 KH |
8364 | { |
8365 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8366 | { | |
8367 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8368 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8369 | && KNOWN (regno)) | |
8370 | { | |
8371 | specs[count] = tmpl; | |
8372 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8373 | } | |
8374 | else | |
8375 | { | |
8376 | specs[count] = tmpl; | |
8377 | specs[count++].specific = 0; | |
8378 | } | |
8379 | } | |
8380 | } | |
800eeca4 | 8381 | else |
542d6675 KH |
8382 | { |
8383 | UNHANDLED; | |
8384 | } | |
800eeca4 JW |
8385 | break; |
8386 | ||
8387 | case IA64_RS_DBR: /* four or more registers */ | |
8388 | if (note == 3) | |
542d6675 KH |
8389 | { |
8390 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8391 | { | |
8392 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8393 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8394 | && KNOWN (regno)) | |
8395 | { | |
8396 | specs[count] = tmpl; | |
8397 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8398 | } | |
8399 | else | |
8400 | { | |
8401 | specs[count] = tmpl; | |
8402 | specs[count++].specific = 0; | |
8403 | } | |
8404 | } | |
8405 | } | |
800eeca4 | 8406 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8407 | { |
8408 | specs[count] = tmpl; | |
8409 | specs[count++].specific = 0; | |
8410 | } | |
800eeca4 | 8411 | else |
542d6675 KH |
8412 | { |
8413 | UNHANDLED; | |
8414 | } | |
800eeca4 JW |
8415 | break; |
8416 | ||
8417 | case IA64_RS_IBR: /* four or more registers */ | |
8418 | if (note == 3) | |
542d6675 KH |
8419 | { |
8420 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8421 | { | |
8422 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8423 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8424 | && KNOWN (regno)) | |
8425 | { | |
8426 | specs[count] = tmpl; | |
8427 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8428 | } | |
8429 | else | |
8430 | { | |
8431 | specs[count] = tmpl; | |
8432 | specs[count++].specific = 0; | |
8433 | } | |
8434 | } | |
8435 | } | |
800eeca4 | 8436 | else |
542d6675 KH |
8437 | { |
8438 | UNHANDLED; | |
8439 | } | |
800eeca4 JW |
8440 | break; |
8441 | ||
8442 | case IA64_RS_MSR: | |
8443 | if (note == 5) | |
8444 | { | |
8445 | /* These are implementation specific. Force all references to | |
8446 | conflict with all other references. */ | |
8447 | specs[count] = tmpl; | |
8448 | specs[count++].specific = 0; | |
8449 | } | |
8450 | else | |
8451 | { | |
8452 | UNHANDLED; | |
8453 | } | |
8454 | break; | |
8455 | ||
8456 | case IA64_RS_PKR: /* 16 or more registers */ | |
8457 | if (note == 3 || note == 4) | |
542d6675 KH |
8458 | { |
8459 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8460 | { | |
8461 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8462 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8463 | && KNOWN (regno)) | |
8464 | { | |
8465 | if (note == 3) | |
8466 | { | |
8467 | specs[count] = tmpl; | |
8468 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8469 | } | |
8470 | else | |
8471 | for (i = 0; i < NELEMS (gr_values); i++) | |
8472 | { | |
8473 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8474 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8475 | { |
8476 | specs[count] = tmpl; | |
8477 | specs[count++].index = i; | |
8478 | } | |
8479 | } | |
8480 | } | |
8481 | else | |
8482 | { | |
8483 | specs[count] = tmpl; | |
8484 | specs[count++].specific = 0; | |
8485 | } | |
8486 | } | |
8487 | } | |
8488 | else if (note == 0) | |
8489 | { | |
8490 | /* probe et al. */ | |
8491 | specs[count] = tmpl; | |
8492 | specs[count++].specific = 0; | |
8493 | } | |
8494 | break; | |
8495 | ||
8496 | case IA64_RS_PMC: /* four or more registers */ | |
8497 | if (note == 3) | |
8498 | { | |
8499 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8500 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8501 | ||
8502 | { | |
8503 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8504 | ? 1 : !rsrc_write); | |
8505 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8506 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8507 | && KNOWN (regno)) | |
8508 | { | |
8509 | specs[count] = tmpl; | |
8510 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8511 | } | |
8512 | else | |
8513 | { | |
8514 | specs[count] = tmpl; | |
8515 | specs[count++].specific = 0; | |
8516 | } | |
8517 | } | |
8518 | } | |
8519 | else | |
8520 | { | |
8521 | UNHANDLED; | |
8522 | } | |
800eeca4 JW |
8523 | break; |
8524 | ||
8525 | case IA64_RS_PMD: /* four or more registers */ | |
8526 | if (note == 3) | |
542d6675 KH |
8527 | { |
8528 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8529 | { | |
8530 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8531 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8532 | && KNOWN (regno)) | |
8533 | { | |
8534 | specs[count] = tmpl; | |
8535 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8536 | } | |
8537 | else | |
8538 | { | |
8539 | specs[count] = tmpl; | |
8540 | specs[count++].specific = 0; | |
8541 | } | |
8542 | } | |
8543 | } | |
800eeca4 | 8544 | else |
542d6675 KH |
8545 | { |
8546 | UNHANDLED; | |
8547 | } | |
800eeca4 JW |
8548 | break; |
8549 | ||
8550 | case IA64_RS_RR: /* eight registers */ | |
8551 | if (note == 6) | |
542d6675 KH |
8552 | { |
8553 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8554 | { | |
8555 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8556 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8557 | && KNOWN (regno)) | |
8558 | { | |
8559 | specs[count] = tmpl; | |
8560 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8561 | } | |
8562 | else | |
8563 | { | |
8564 | specs[count] = tmpl; | |
8565 | specs[count++].specific = 0; | |
8566 | } | |
8567 | } | |
8568 | } | |
800eeca4 | 8569 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8570 | { |
8571 | specs[count] = tmpl; | |
8572 | specs[count++].specific = 0; | |
8573 | } | |
197865e8 | 8574 | else |
542d6675 KH |
8575 | { |
8576 | UNHANDLED; | |
8577 | } | |
800eeca4 JW |
8578 | break; |
8579 | ||
8580 | case IA64_RS_CR_IRR: | |
197865e8 | 8581 | if (note == 0) |
542d6675 KH |
8582 | { |
8583 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8584 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8585 | if (rsrc_write | |
8586 | && idesc->operands[1] == IA64_OPND_CR3 | |
8587 | && regno == CR_IVR) | |
8588 | { | |
8589 | for (i = 0; i < 4; i++) | |
8590 | { | |
8591 | specs[count] = tmpl; | |
8592 | specs[count++].index = CR_IRR0 + i; | |
8593 | } | |
8594 | } | |
8595 | } | |
800eeca4 | 8596 | else if (note == 1) |
542d6675 KH |
8597 | { |
8598 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8599 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8600 | && regno >= CR_IRR0 | |
8601 | && regno <= CR_IRR3) | |
8602 | { | |
8603 | specs[count] = tmpl; | |
8604 | specs[count++].index = regno; | |
8605 | } | |
8606 | } | |
800eeca4 | 8607 | else |
542d6675 KH |
8608 | { |
8609 | UNHANDLED; | |
8610 | } | |
800eeca4 JW |
8611 | break; |
8612 | ||
8613 | case IA64_RS_CR_LRR: | |
8614 | if (note != 1) | |
542d6675 KH |
8615 | { |
8616 | UNHANDLED; | |
8617 | } | |
197865e8 | 8618 | else |
542d6675 KH |
8619 | { |
8620 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8621 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8622 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8623 | { | |
8624 | specs[count] = tmpl; | |
8625 | specs[count++].index = regno; | |
8626 | } | |
8627 | } | |
800eeca4 JW |
8628 | break; |
8629 | ||
8630 | case IA64_RS_CR: | |
8631 | if (note == 1) | |
542d6675 KH |
8632 | { |
8633 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8634 | { | |
8635 | specs[count] = tmpl; | |
8636 | specs[count++].index = | |
8637 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8638 | } | |
8639 | } | |
800eeca4 | 8640 | else |
542d6675 KH |
8641 | { |
8642 | UNHANDLED; | |
8643 | } | |
800eeca4 JW |
8644 | break; |
8645 | ||
8646 | case IA64_RS_FR: | |
8647 | case IA64_RS_FRb: | |
8648 | if (note != 1) | |
542d6675 KH |
8649 | { |
8650 | UNHANDLED; | |
8651 | } | |
800eeca4 | 8652 | else if (rsrc_write) |
542d6675 KH |
8653 | { |
8654 | if (dep->specifier == IA64_RS_FRb | |
8655 | && idesc->operands[0] == IA64_OPND_F1) | |
8656 | { | |
8657 | specs[count] = tmpl; | |
8658 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8659 | } | |
8660 | } | |
800eeca4 | 8661 | else |
542d6675 KH |
8662 | { |
8663 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8664 | { | |
8665 | if (idesc->operands[i] == IA64_OPND_F2 | |
8666 | || idesc->operands[i] == IA64_OPND_F3 | |
8667 | || idesc->operands[i] == IA64_OPND_F4) | |
8668 | { | |
8669 | specs[count] = tmpl; | |
8670 | specs[count++].index = | |
8671 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8672 | } | |
8673 | } | |
8674 | } | |
800eeca4 JW |
8675 | break; |
8676 | ||
8677 | case IA64_RS_GR: | |
8678 | if (note == 13) | |
542d6675 KH |
8679 | { |
8680 | /* This reference applies only to the GR whose value is loaded with | |
8681 | data returned from memory. */ | |
8682 | specs[count] = tmpl; | |
8683 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8684 | } | |
800eeca4 | 8685 | else if (note == 1) |
542d6675 KH |
8686 | { |
8687 | if (rsrc_write) | |
8688 | { | |
8689 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8690 | if (idesc->operands[i] == IA64_OPND_R1 |
8691 | || idesc->operands[i] == IA64_OPND_R2 | |
8692 | || idesc->operands[i] == IA64_OPND_R3) | |
8693 | { | |
8694 | specs[count] = tmpl; | |
197865e8 | 8695 | specs[count++].index = |
50b81f19 JW |
8696 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8697 | } | |
8698 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8699 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8700 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8701 | { | |
8702 | specs[count] = tmpl; | |
8703 | specs[count++].index = | |
8704 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8705 | } | |
542d6675 KH |
8706 | } |
8707 | else | |
8708 | { | |
8709 | /* Look for anything that reads a GR. */ | |
8710 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8711 | { | |
8712 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8713 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8714 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8715 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8716 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8717 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8718 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8719 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8720 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8721 | || ((i >= idesc->num_outputs) | |
8722 | && (idesc->operands[i] == IA64_OPND_R1 | |
8723 | || idesc->operands[i] == IA64_OPND_R2 | |
8724 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8725 | /* addl source register. */ |
8726 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8727 | { |
8728 | specs[count] = tmpl; | |
8729 | specs[count++].index = | |
8730 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8731 | } | |
8732 | } | |
8733 | } | |
8734 | } | |
197865e8 | 8735 | else |
542d6675 KH |
8736 | { |
8737 | UNHANDLED; | |
8738 | } | |
800eeca4 JW |
8739 | break; |
8740 | ||
139368c9 JW |
8741 | /* This is the same as IA64_RS_PRr, except that the register range is |
8742 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8743 | case IA64_RS_PR: |
8744 | if (note == 0) | |
542d6675 | 8745 | { |
139368c9 | 8746 | for (i = 1; i < 16; i++) |
542d6675 | 8747 | { |
139368c9 JW |
8748 | specs[count] = tmpl; |
8749 | specs[count++].index = i; | |
8750 | } | |
8751 | } | |
8752 | else if (note == 7) | |
8753 | { | |
8754 | valueT mask = 0; | |
8755 | /* Mark only those registers indicated by the mask. */ | |
8756 | if (rsrc_write) | |
8757 | { | |
8758 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8759 | for (i = 1; i < 16; i++) | |
8760 | if (mask & ((valueT) 1 << i)) | |
8761 | { | |
8762 | specs[count] = tmpl; | |
8763 | specs[count++].index = i; | |
8764 | } | |
8765 | } | |
8766 | else | |
8767 | { | |
8768 | UNHANDLED; | |
8769 | } | |
8770 | } | |
8771 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8772 | { | |
8773 | if (rsrc_write) | |
8774 | { | |
8775 | for (i = 0; i < idesc->num_outputs; i++) | |
8776 | { | |
8777 | if (idesc->operands[i] == IA64_OPND_P1 | |
8778 | || idesc->operands[i] == IA64_OPND_P2) | |
8779 | { | |
8780 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8781 | if (regno >= 1 && regno < 16) | |
8782 | { | |
8783 | specs[count] = tmpl; | |
8784 | specs[count++].index = regno; | |
8785 | } | |
8786 | } | |
8787 | } | |
8788 | } | |
8789 | else | |
8790 | { | |
8791 | UNHANDLED; | |
8792 | } | |
8793 | } | |
8794 | else if (note == 12) | |
8795 | { | |
8796 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8797 | { | |
8798 | specs[count] = tmpl; | |
8799 | specs[count++].index = CURR_SLOT.qp_regno; | |
8800 | } | |
8801 | } | |
8802 | else if (note == 1) | |
8803 | { | |
8804 | if (rsrc_write) | |
8805 | { | |
8806 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8807 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8808 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8809 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8810 | |
8811 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8812 | || idesc->operands[0] == IA64_OPND_P2) | |
8813 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8814 | { |
8815 | specs[count] = tmpl; | |
139368c9 JW |
8816 | specs[count].cmp_type = |
8817 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8818 | specs[count++].index = p1; | |
8819 | } | |
8820 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8821 | || idesc->operands[1] == IA64_OPND_P2) | |
8822 | && p2 >= 1 && p2 < 16) | |
8823 | { | |
8824 | specs[count] = tmpl; | |
8825 | specs[count].cmp_type = | |
8826 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8827 | specs[count++].index = p2; | |
542d6675 KH |
8828 | } |
8829 | } | |
8830 | else | |
8831 | { | |
139368c9 | 8832 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8833 | { |
8834 | specs[count] = tmpl; | |
139368c9 JW |
8835 | specs[count++].index = CURR_SLOT.qp_regno; |
8836 | } | |
8837 | if (idesc->operands[1] == IA64_OPND_PR) | |
8838 | { | |
8839 | for (i = 1; i < 16; i++) | |
8840 | { | |
8841 | specs[count] = tmpl; | |
8842 | specs[count++].index = i; | |
8843 | } | |
542d6675 KH |
8844 | } |
8845 | } | |
8846 | } | |
139368c9 JW |
8847 | else |
8848 | { | |
8849 | UNHANDLED; | |
8850 | } | |
8851 | break; | |
8852 | ||
8853 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8854 | simplified cases of this. */ | |
8855 | case IA64_RS_PRr: | |
8856 | if (note == 0) | |
8857 | { | |
8858 | for (i = 16; i < 63; i++) | |
8859 | { | |
8860 | specs[count] = tmpl; | |
8861 | specs[count++].index = i; | |
8862 | } | |
8863 | } | |
800eeca4 | 8864 | else if (note == 7) |
542d6675 KH |
8865 | { |
8866 | valueT mask = 0; | |
8867 | /* Mark only those registers indicated by the mask. */ | |
8868 | if (rsrc_write | |
8869 | && idesc->operands[0] == IA64_OPND_PR) | |
8870 | { | |
8871 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8872 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8873 | for (i = 16; i < 63; i++) |
8874 | { | |
8875 | specs[count] = tmpl; | |
8876 | specs[count++].index = i; | |
8877 | } | |
542d6675 KH |
8878 | } |
8879 | else if (rsrc_write | |
8880 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8881 | { | |
8882 | for (i = 16; i < 63; i++) | |
8883 | { | |
8884 | specs[count] = tmpl; | |
8885 | specs[count++].index = i; | |
8886 | } | |
8887 | } | |
8888 | else | |
8889 | { | |
8890 | UNHANDLED; | |
8891 | } | |
8892 | } | |
800eeca4 | 8893 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8894 | { |
8895 | if (rsrc_write) | |
8896 | { | |
8897 | for (i = 0; i < idesc->num_outputs; i++) | |
8898 | { | |
8899 | if (idesc->operands[i] == IA64_OPND_P1 | |
8900 | || idesc->operands[i] == IA64_OPND_P2) | |
8901 | { | |
8902 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8903 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8904 | { |
8905 | specs[count] = tmpl; | |
8906 | specs[count++].index = regno; | |
8907 | } | |
8908 | } | |
8909 | } | |
8910 | } | |
8911 | else | |
8912 | { | |
8913 | UNHANDLED; | |
8914 | } | |
8915 | } | |
800eeca4 | 8916 | else if (note == 12) |
542d6675 | 8917 | { |
139368c9 | 8918 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8919 | { |
8920 | specs[count] = tmpl; | |
8921 | specs[count++].index = CURR_SLOT.qp_regno; | |
8922 | } | |
8923 | } | |
800eeca4 | 8924 | else if (note == 1) |
542d6675 KH |
8925 | { |
8926 | if (rsrc_write) | |
8927 | { | |
8928 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8929 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8930 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8931 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8932 | |
542d6675 KH |
8933 | if ((idesc->operands[0] == IA64_OPND_P1 |
8934 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8935 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8936 | { |
8937 | specs[count] = tmpl; | |
4a4f25cf | 8938 | specs[count].cmp_type = |
7484b8e6 | 8939 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8940 | specs[count++].index = p1; |
8941 | } | |
8942 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8943 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8944 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8945 | { |
8946 | specs[count] = tmpl; | |
4a4f25cf | 8947 | specs[count].cmp_type = |
7484b8e6 | 8948 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8949 | specs[count++].index = p2; |
8950 | } | |
8951 | } | |
8952 | else | |
8953 | { | |
139368c9 | 8954 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8955 | { |
8956 | specs[count] = tmpl; | |
8957 | specs[count++].index = CURR_SLOT.qp_regno; | |
8958 | } | |
8959 | if (idesc->operands[1] == IA64_OPND_PR) | |
8960 | { | |
139368c9 | 8961 | for (i = 16; i < 63; i++) |
542d6675 KH |
8962 | { |
8963 | specs[count] = tmpl; | |
8964 | specs[count++].index = i; | |
8965 | } | |
8966 | } | |
8967 | } | |
8968 | } | |
197865e8 | 8969 | else |
542d6675 KH |
8970 | { |
8971 | UNHANDLED; | |
8972 | } | |
800eeca4 JW |
8973 | break; |
8974 | ||
8975 | case IA64_RS_PSR: | |
197865e8 | 8976 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8977 | dep->regindex. */ |
800eeca4 | 8978 | if (note == 0) |
542d6675 KH |
8979 | { |
8980 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8981 | { | |
8982 | if (dep->regindex < 6) | |
8983 | { | |
8984 | specs[count++] = tmpl; | |
8985 | } | |
8986 | } | |
8987 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8988 | { | |
8989 | if (dep->regindex < 32 | |
8990 | || dep->regindex == 35 | |
8991 | || dep->regindex == 36 | |
8992 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8993 | { | |
8994 | specs[count++] = tmpl; | |
8995 | } | |
8996 | } | |
8997 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8998 | { | |
8999 | if (dep->regindex < 32 | |
9000 | || dep->regindex == 35 | |
9001 | || dep->regindex == 36 | |
9002 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
9003 | { | |
9004 | specs[count++] = tmpl; | |
9005 | } | |
9006 | } | |
9007 | else | |
9008 | { | |
9009 | /* Several PSR bits have very specific dependencies. */ | |
9010 | switch (dep->regindex) | |
9011 | { | |
9012 | default: | |
9013 | specs[count++] = tmpl; | |
9014 | break; | |
9015 | case PSR_IC: | |
9016 | if (rsrc_write) | |
9017 | { | |
9018 | specs[count++] = tmpl; | |
9019 | } | |
9020 | else | |
9021 | { | |
9022 | /* Only certain CR accesses use PSR.ic */ | |
9023 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9024 | || idesc->operands[1] == IA64_OPND_CR3) | |
9025 | { | |
9026 | int index = | |
9027 | ((idesc->operands[0] == IA64_OPND_CR3) | |
9028 | ? 0 : 1); | |
9029 | int regno = | |
9030 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
9031 | ||
9032 | switch (regno) | |
9033 | { | |
9034 | default: | |
9035 | break; | |
9036 | case CR_ITIR: | |
9037 | case CR_IFS: | |
9038 | case CR_IIM: | |
9039 | case CR_IIP: | |
9040 | case CR_IPSR: | |
9041 | case CR_ISR: | |
9042 | case CR_IFA: | |
9043 | case CR_IHA: | |
9044 | case CR_IIPA: | |
9045 | specs[count++] = tmpl; | |
9046 | break; | |
9047 | } | |
9048 | } | |
9049 | } | |
9050 | break; | |
9051 | case PSR_CPL: | |
9052 | if (rsrc_write) | |
9053 | { | |
9054 | specs[count++] = tmpl; | |
9055 | } | |
9056 | else | |
9057 | { | |
9058 | /* Only some AR accesses use cpl */ | |
9059 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9060 | || idesc->operands[1] == IA64_OPND_AR3) | |
9061 | { | |
9062 | int index = | |
9063 | ((idesc->operands[0] == IA64_OPND_AR3) | |
9064 | ? 0 : 1); | |
9065 | int regno = | |
9066 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
9067 | ||
9068 | if (regno == AR_ITC | |
9069 | || (index == 0 | |
9070 | && (regno == AR_ITC | |
9071 | || regno == AR_RSC | |
9072 | || (regno >= AR_K0 | |
9073 | && regno <= AR_K7)))) | |
9074 | { | |
9075 | specs[count++] = tmpl; | |
9076 | } | |
9077 | } | |
9078 | else | |
9079 | { | |
9080 | specs[count++] = tmpl; | |
9081 | } | |
9082 | break; | |
9083 | } | |
9084 | } | |
9085 | } | |
9086 | } | |
800eeca4 | 9087 | else if (note == 7) |
542d6675 KH |
9088 | { |
9089 | valueT mask = 0; | |
9090 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9091 | { | |
9092 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9093 | } | |
9094 | else | |
9095 | { | |
9096 | UNHANDLED; | |
9097 | } | |
9098 | if (mask & ((valueT) 1 << dep->regindex)) | |
9099 | { | |
9100 | specs[count++] = tmpl; | |
9101 | } | |
9102 | } | |
800eeca4 | 9103 | else if (note == 8) |
542d6675 KH |
9104 | { |
9105 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9106 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9107 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9108 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9109 | { | |
9110 | if (idesc->operands[i] == IA64_OPND_F1 | |
9111 | || idesc->operands[i] == IA64_OPND_F2 | |
9112 | || idesc->operands[i] == IA64_OPND_F3 | |
9113 | || idesc->operands[i] == IA64_OPND_F4) | |
9114 | { | |
9115 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9116 | if (reg >= min && reg <= max) | |
9117 | { | |
9118 | specs[count++] = tmpl; | |
9119 | } | |
9120 | } | |
9121 | } | |
9122 | } | |
800eeca4 | 9123 | else if (note == 9) |
542d6675 KH |
9124 | { |
9125 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9126 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9127 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9128 | FR2-31 */ | |
9129 | for (i = 0; i < idesc->num_outputs; i++) | |
9130 | { | |
9131 | if (idesc->operands[i] == IA64_OPND_F1) | |
9132 | { | |
9133 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9134 | if (reg >= min && reg <= max) | |
9135 | { | |
9136 | specs[count++] = tmpl; | |
9137 | } | |
9138 | } | |
9139 | } | |
9140 | } | |
800eeca4 | 9141 | else if (note == 10) |
542d6675 KH |
9142 | { |
9143 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9144 | { | |
9145 | if (idesc->operands[i] == IA64_OPND_R1 | |
9146 | || idesc->operands[i] == IA64_OPND_R2 | |
9147 | || idesc->operands[i] == IA64_OPND_R3) | |
9148 | { | |
9149 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9150 | if (regno >= 16 && regno <= 31) | |
9151 | { | |
9152 | specs[count++] = tmpl; | |
9153 | } | |
9154 | } | |
9155 | } | |
9156 | } | |
800eeca4 | 9157 | else |
542d6675 KH |
9158 | { |
9159 | UNHANDLED; | |
9160 | } | |
800eeca4 JW |
9161 | break; |
9162 | ||
9163 | case IA64_RS_AR_FPSR: | |
9164 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9165 | { |
9166 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9167 | if (regno == AR_FPSR) | |
9168 | { | |
9169 | specs[count++] = tmpl; | |
9170 | } | |
9171 | } | |
800eeca4 | 9172 | else |
542d6675 KH |
9173 | { |
9174 | specs[count++] = tmpl; | |
9175 | } | |
800eeca4 JW |
9176 | break; |
9177 | ||
197865e8 | 9178 | case IA64_RS_ARX: |
800eeca4 JW |
9179 | /* Handle all AR[REG] resources */ |
9180 | if (note == 0 || note == 1) | |
542d6675 KH |
9181 | { |
9182 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9183 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9184 | && regno == dep->regindex) | |
9185 | { | |
9186 | specs[count++] = tmpl; | |
9187 | } | |
9188 | /* other AR[REG] resources may be affected by AR accesses */ | |
9189 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9190 | { | |
9191 | /* AR[] writes */ | |
9192 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9193 | switch (dep->regindex) | |
9194 | { | |
9195 | default: | |
9196 | break; | |
9197 | case AR_BSP: | |
9198 | case AR_RNAT: | |
9199 | if (regno == AR_BSPSTORE) | |
9200 | { | |
9201 | specs[count++] = tmpl; | |
9202 | } | |
9203 | case AR_RSC: | |
9204 | if (!rsrc_write && | |
9205 | (regno == AR_BSPSTORE | |
9206 | || regno == AR_RNAT)) | |
9207 | { | |
9208 | specs[count++] = tmpl; | |
9209 | } | |
9210 | break; | |
9211 | } | |
9212 | } | |
9213 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9214 | { | |
9215 | /* AR[] reads */ | |
9216 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9217 | switch (dep->regindex) | |
9218 | { | |
9219 | default: | |
9220 | break; | |
9221 | case AR_RSC: | |
9222 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9223 | { | |
9224 | specs[count++] = tmpl; | |
9225 | } | |
9226 | break; | |
9227 | } | |
9228 | } | |
9229 | else | |
9230 | { | |
9231 | specs[count++] = tmpl; | |
9232 | } | |
9233 | } | |
800eeca4 | 9234 | else |
542d6675 KH |
9235 | { |
9236 | UNHANDLED; | |
9237 | } | |
800eeca4 JW |
9238 | break; |
9239 | ||
9240 | case IA64_RS_CRX: | |
9241 | /* Handle all CR[REG] resources */ | |
9242 | if (note == 0 || note == 1) | |
542d6675 KH |
9243 | { |
9244 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9245 | { | |
9246 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9247 | if (regno == dep->regindex) | |
9248 | { | |
9249 | specs[count++] = tmpl; | |
9250 | } | |
9251 | else if (!rsrc_write) | |
9252 | { | |
9253 | /* Reads from CR[IVR] affect other resources. */ | |
9254 | if (regno == CR_IVR) | |
9255 | { | |
9256 | if ((dep->regindex >= CR_IRR0 | |
9257 | && dep->regindex <= CR_IRR3) | |
9258 | || dep->regindex == CR_TPR) | |
9259 | { | |
9260 | specs[count++] = tmpl; | |
9261 | } | |
9262 | } | |
9263 | } | |
9264 | } | |
9265 | else | |
9266 | { | |
9267 | specs[count++] = tmpl; | |
9268 | } | |
9269 | } | |
800eeca4 | 9270 | else |
542d6675 KH |
9271 | { |
9272 | UNHANDLED; | |
9273 | } | |
800eeca4 JW |
9274 | break; |
9275 | ||
9276 | case IA64_RS_INSERVICE: | |
9277 | /* look for write of EOI (67) or read of IVR (65) */ | |
9278 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9279 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9280 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9281 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9282 | { | |
9283 | specs[count++] = tmpl; | |
9284 | } | |
800eeca4 JW |
9285 | break; |
9286 | ||
9287 | case IA64_RS_GR0: | |
9288 | if (note == 1) | |
542d6675 KH |
9289 | { |
9290 | specs[count++] = tmpl; | |
9291 | } | |
800eeca4 | 9292 | else |
542d6675 KH |
9293 | { |
9294 | UNHANDLED; | |
9295 | } | |
800eeca4 JW |
9296 | break; |
9297 | ||
9298 | case IA64_RS_CFM: | |
9299 | if (note != 2) | |
542d6675 KH |
9300 | { |
9301 | specs[count++] = tmpl; | |
9302 | } | |
800eeca4 | 9303 | else |
542d6675 KH |
9304 | { |
9305 | /* Check if any of the registers accessed are in the rotating region. | |
9306 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9307 | region */ | |
9308 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9309 | { | |
9310 | if (idesc->operands[i] == IA64_OPND_R1 | |
9311 | || idesc->operands[i] == IA64_OPND_R2 | |
9312 | || idesc->operands[i] == IA64_OPND_R3) | |
9313 | { | |
9314 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9315 | /* Assumes that md.rot.num_regs is always valid */ | |
9316 | if (md.rot.num_regs > 0 | |
9317 | && num > 31 | |
9318 | && num < 31 + md.rot.num_regs) | |
9319 | { | |
9320 | specs[count] = tmpl; | |
9321 | specs[count++].specific = 0; | |
9322 | } | |
9323 | } | |
9324 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9325 | || idesc->operands[i] == IA64_OPND_F2 | |
9326 | || idesc->operands[i] == IA64_OPND_F3 | |
9327 | || idesc->operands[i] == IA64_OPND_F4) | |
9328 | { | |
9329 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9330 | if (num > 31) | |
9331 | { | |
9332 | specs[count] = tmpl; | |
9333 | specs[count++].specific = 0; | |
9334 | } | |
9335 | } | |
9336 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9337 | || idesc->operands[i] == IA64_OPND_P2) | |
9338 | { | |
9339 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9340 | if (num > 15) | |
9341 | { | |
9342 | specs[count] = tmpl; | |
9343 | specs[count++].specific = 0; | |
9344 | } | |
9345 | } | |
9346 | } | |
9347 | if (CURR_SLOT.qp_regno > 15) | |
9348 | { | |
9349 | specs[count] = tmpl; | |
9350 | specs[count++].specific = 0; | |
9351 | } | |
9352 | } | |
800eeca4 JW |
9353 | break; |
9354 | ||
139368c9 JW |
9355 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9356 | the fact that there is only one register. */ | |
800eeca4 JW |
9357 | case IA64_RS_PR63: |
9358 | if (note == 0) | |
542d6675 KH |
9359 | { |
9360 | specs[count++] = tmpl; | |
9361 | } | |
139368c9 | 9362 | else if (note == 7) |
40449e9f KH |
9363 | { |
9364 | valueT mask = 0; | |
9365 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9366 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9367 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9368 | specs[count++] = tmpl; |
40449e9f | 9369 | } |
800eeca4 | 9370 | else if (note == 11) |
542d6675 KH |
9371 | { |
9372 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9373 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9374 | || (idesc->operands[1] == IA64_OPND_P2 | |
9375 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9376 | { | |
9377 | specs[count++] = tmpl; | |
9378 | } | |
9379 | } | |
800eeca4 | 9380 | else if (note == 12) |
542d6675 KH |
9381 | { |
9382 | if (CURR_SLOT.qp_regno == 63) | |
9383 | { | |
9384 | specs[count++] = tmpl; | |
9385 | } | |
9386 | } | |
800eeca4 | 9387 | else if (note == 1) |
542d6675 KH |
9388 | { |
9389 | if (rsrc_write) | |
9390 | { | |
40449e9f KH |
9391 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9392 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9393 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9394 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9395 | |
4a4f25cf | 9396 | if (p1 == 63 |
7484b8e6 TW |
9397 | && (idesc->operands[0] == IA64_OPND_P1 |
9398 | || idesc->operands[0] == IA64_OPND_P2)) | |
9399 | { | |
40449e9f | 9400 | specs[count] = tmpl; |
4a4f25cf | 9401 | specs[count++].cmp_type = |
7484b8e6 TW |
9402 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9403 | } | |
9404 | if (p2 == 63 | |
9405 | && (idesc->operands[1] == IA64_OPND_P1 | |
9406 | || idesc->operands[1] == IA64_OPND_P2)) | |
9407 | { | |
40449e9f | 9408 | specs[count] = tmpl; |
4a4f25cf | 9409 | specs[count++].cmp_type = |
7484b8e6 TW |
9410 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9411 | } | |
542d6675 KH |
9412 | } |
9413 | else | |
9414 | { | |
9415 | if (CURR_SLOT.qp_regno == 63) | |
9416 | { | |
9417 | specs[count++] = tmpl; | |
9418 | } | |
9419 | } | |
9420 | } | |
800eeca4 | 9421 | else |
542d6675 KH |
9422 | { |
9423 | UNHANDLED; | |
9424 | } | |
800eeca4 JW |
9425 | break; |
9426 | ||
9427 | case IA64_RS_RSE: | |
9428 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9429 | read resources have not yet been completely identified, so for now |
9430 | treat RSE as a single resource */ | |
800eeca4 | 9431 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9432 | { |
9433 | if (rsrc_write) | |
9434 | { | |
9435 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9436 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9437 | { | |
a66d2bb7 | 9438 | specs[count++] = tmpl; |
542d6675 KH |
9439 | } |
9440 | } | |
9441 | else | |
9442 | { | |
9443 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9444 | { | |
9445 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9446 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9447 | { | |
9448 | specs[count++] = tmpl; | |
9449 | } | |
9450 | } | |
9451 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9452 | { | |
9453 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9454 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9455 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9456 | { | |
9457 | specs[count++] = tmpl; | |
9458 | } | |
9459 | } | |
9460 | } | |
9461 | } | |
197865e8 | 9462 | else |
542d6675 KH |
9463 | { |
9464 | specs[count++] = tmpl; | |
9465 | } | |
800eeca4 JW |
9466 | break; |
9467 | ||
9468 | case IA64_RS_ANY: | |
9469 | /* FIXME -- do any of these need to be non-specific? */ | |
9470 | specs[count++] = tmpl; | |
9471 | break; | |
9472 | ||
9473 | default: | |
9474 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9475 | break; | |
9476 | } | |
9477 | ||
9478 | return count; | |
9479 | } | |
9480 | ||
9481 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9482 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9483 | ||
800eeca4 JW |
9484 | static void |
9485 | clear_qp_branch_flag (mask) | |
542d6675 | 9486 | valueT mask; |
800eeca4 JW |
9487 | { |
9488 | int i; | |
542d6675 | 9489 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9490 | { |
197865e8 | 9491 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9492 | if ((bit & mask) != 0) |
542d6675 KH |
9493 | { |
9494 | regdeps[i].link_to_qp_branch = 0; | |
9495 | } | |
800eeca4 JW |
9496 | } |
9497 | } | |
9498 | ||
5e2f6673 L |
9499 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9500 | any mutexes which contain one of the PRs and create new ones when | |
9501 | needed. */ | |
9502 | ||
9503 | static int | |
9504 | update_qp_mutex (valueT mask) | |
9505 | { | |
9506 | int i; | |
9507 | int add = 0; | |
9508 | ||
9509 | i = 0; | |
9510 | while (i < qp_mutexeslen) | |
9511 | { | |
9512 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9513 | { | |
9514 | /* If it destroys and creates the same mutex, do nothing. */ | |
9515 | if (qp_mutexes[i].prmask == mask | |
9516 | && qp_mutexes[i].path == md.path) | |
9517 | { | |
9518 | i++; | |
9519 | add = -1; | |
9520 | } | |
9521 | else | |
9522 | { | |
9523 | int keep = 0; | |
9524 | ||
9525 | if (md.debug_dv) | |
9526 | { | |
9527 | fprintf (stderr, " Clearing mutex relation"); | |
9528 | print_prmask (qp_mutexes[i].prmask); | |
9529 | fprintf (stderr, "\n"); | |
9530 | } | |
9531 | ||
9532 | /* Deal with the old mutex with more than 3+ PRs only if | |
9533 | the new mutex on the same execution path with it. | |
9534 | ||
9535 | FIXME: The 3+ mutex support is incomplete. | |
9536 | dot_pred_rel () may be a better place to fix it. */ | |
9537 | if (qp_mutexes[i].path == md.path) | |
9538 | { | |
9539 | /* If it is a proper subset of the mutex, create a | |
9540 | new mutex. */ | |
9541 | if (add == 0 | |
9542 | && (qp_mutexes[i].prmask & mask) == mask) | |
9543 | add = 1; | |
9544 | ||
9545 | qp_mutexes[i].prmask &= ~mask; | |
9546 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9547 | { | |
9548 | /* Modify the mutex if there are more than one | |
9549 | PR left. */ | |
9550 | keep = 1; | |
9551 | i++; | |
9552 | } | |
9553 | } | |
9554 | ||
9555 | if (keep == 0) | |
9556 | /* Remove the mutex. */ | |
9557 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9558 | } | |
9559 | } | |
9560 | else | |
9561 | ++i; | |
9562 | } | |
9563 | ||
9564 | if (add == 1) | |
9565 | add_qp_mutex (mask); | |
9566 | ||
9567 | return add; | |
9568 | } | |
9569 | ||
197865e8 | 9570 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9571 | |
542d6675 KH |
9572 | Any changes to a PR clears the mutex relations which include that PR. */ |
9573 | ||
800eeca4 JW |
9574 | static void |
9575 | clear_qp_mutex (mask) | |
542d6675 | 9576 | valueT mask; |
800eeca4 JW |
9577 | { |
9578 | int i; | |
9579 | ||
9580 | i = 0; | |
9581 | while (i < qp_mutexeslen) | |
9582 | { | |
9583 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9584 | { |
9585 | if (md.debug_dv) | |
9586 | { | |
9587 | fprintf (stderr, " Clearing mutex relation"); | |
9588 | print_prmask (qp_mutexes[i].prmask); | |
9589 | fprintf (stderr, "\n"); | |
9590 | } | |
9591 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9592 | } | |
800eeca4 | 9593 | else |
542d6675 | 9594 | ++i; |
800eeca4 JW |
9595 | } |
9596 | } | |
9597 | ||
9598 | /* Clear implies relations which contain PRs in the given masks. | |
9599 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9600 | indicates the implied PR. */ |
9601 | ||
800eeca4 JW |
9602 | static void |
9603 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9604 | valueT p1_mask; |
9605 | valueT p2_mask; | |
800eeca4 JW |
9606 | { |
9607 | int i; | |
9608 | ||
9609 | i = 0; | |
9610 | while (i < qp_implieslen) | |
9611 | { | |
197865e8 | 9612 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9613 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9614 | { | |
9615 | if (md.debug_dv) | |
9616 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9617 | qp_implies[i].p1, qp_implies[i].p2); | |
9618 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9619 | } | |
197865e8 | 9620 | else |
542d6675 | 9621 | ++i; |
800eeca4 JW |
9622 | } |
9623 | } | |
9624 | ||
542d6675 KH |
9625 | /* Add the PRs specified to the list of implied relations. */ |
9626 | ||
800eeca4 JW |
9627 | static void |
9628 | add_qp_imply (p1, p2) | |
542d6675 | 9629 | int p1, p2; |
800eeca4 JW |
9630 | { |
9631 | valueT mask; | |
9632 | valueT bit; | |
9633 | int i; | |
9634 | ||
542d6675 | 9635 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9636 | if (p1 == 0 || p2 == 0) |
9637 | abort (); | |
9638 | ||
9639 | if (p1 == p2) | |
9640 | return; | |
9641 | ||
542d6675 KH |
9642 | /* If it exists already, ignore it. */ |
9643 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9644 | { |
197865e8 | 9645 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9646 | && qp_implies[i].p2 == p2 |
9647 | && qp_implies[i].path == md.path | |
9648 | && !qp_implies[i].p2_branched) | |
9649 | return; | |
800eeca4 JW |
9650 | } |
9651 | ||
9652 | if (qp_implieslen == qp_impliestotlen) | |
9653 | { | |
9654 | qp_impliestotlen += 20; | |
9655 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9656 | xrealloc ((void *) qp_implies, |
9657 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9658 | } |
9659 | if (md.debug_dv) | |
9660 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9661 | qp_implies[qp_implieslen].p1 = p1; | |
9662 | qp_implies[qp_implieslen].p2 = p2; | |
9663 | qp_implies[qp_implieslen].path = md.path; | |
9664 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9665 | ||
9666 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9667 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9668 | as well. */ |
542d6675 | 9669 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9670 | { |
9671 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9672 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9673 | if (qp_implies[i].p2 == p1) |
542d6675 | 9674 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9675 | } |
9676 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9677 | relation containing p2, duplicate it and replace p2 with p1. */ |
9678 | bit = (valueT) 1 << p1; | |
9679 | mask = (valueT) 1 << p2; | |
542d6675 | 9680 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9681 | { |
9682 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9683 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9684 | } |
9685 | } | |
9686 | ||
800eeca4 JW |
9687 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9688 | one of the PRs can be true at any time. PR0 should never be included in | |
9689 | the mask. */ | |
542d6675 | 9690 | |
800eeca4 JW |
9691 | static void |
9692 | add_qp_mutex (mask) | |
542d6675 | 9693 | valueT mask; |
800eeca4 JW |
9694 | { |
9695 | if (mask & 0x1) | |
9696 | abort (); | |
9697 | ||
9698 | if (qp_mutexeslen == qp_mutexestotlen) | |
9699 | { | |
9700 | qp_mutexestotlen += 20; | |
9701 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9702 | xrealloc ((void *) qp_mutexes, |
9703 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9704 | } |
9705 | if (md.debug_dv) | |
9706 | { | |
9707 | fprintf (stderr, " Registering mutex on"); | |
9708 | print_prmask (mask); | |
9709 | fprintf (stderr, "\n"); | |
9710 | } | |
9711 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9712 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9713 | } | |
9714 | ||
cb5301b6 RH |
9715 | static int |
9716 | has_suffix_p (name, suffix) | |
40449e9f KH |
9717 | const char *name; |
9718 | const char *suffix; | |
cb5301b6 RH |
9719 | { |
9720 | size_t namelen = strlen (name); | |
9721 | size_t sufflen = strlen (suffix); | |
9722 | ||
9723 | if (namelen <= sufflen) | |
9724 | return 0; | |
9725 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9726 | } | |
9727 | ||
800eeca4 JW |
9728 | static void |
9729 | clear_register_values () | |
9730 | { | |
9731 | int i; | |
9732 | if (md.debug_dv) | |
9733 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9734 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9735 | gr_values[i].known = 0; |
9736 | } | |
9737 | ||
9738 | /* Keep track of register values/changes which affect DV tracking. | |
9739 | ||
9740 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9741 | have to examine a group of strings to identify them. */ |
800eeca4 | 9742 | |
800eeca4 JW |
9743 | static void |
9744 | note_register_values (idesc) | |
542d6675 | 9745 | struct ia64_opcode *idesc; |
800eeca4 JW |
9746 | { |
9747 | valueT qp_changemask = 0; | |
9748 | int i; | |
9749 | ||
542d6675 KH |
9750 | /* Invalidate values for registers being written to. */ |
9751 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9752 | { |
197865e8 | 9753 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9754 | || idesc->operands[i] == IA64_OPND_R2 |
9755 | || idesc->operands[i] == IA64_OPND_R3) | |
9756 | { | |
9757 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9758 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9759 | gr_values[regno].known = 0; | |
9760 | } | |
50b81f19 JW |
9761 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9762 | { | |
9763 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9764 | if (regno > 0 && regno < 4) | |
9765 | gr_values[regno].known = 0; | |
9766 | } | |
197865e8 | 9767 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9768 | || idesc->operands[i] == IA64_OPND_P2) |
9769 | { | |
9770 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9771 | qp_changemask |= (valueT) 1 << regno; | |
9772 | } | |
800eeca4 | 9773 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9774 | { |
9775 | if (idesc->operands[2] & (valueT) 0x10000) | |
9776 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9777 | else | |
9778 | qp_changemask = idesc->operands[2]; | |
9779 | break; | |
9780 | } | |
800eeca4 | 9781 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9782 | { |
9783 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9784 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9785 | else |
9786 | qp_changemask = idesc->operands[1]; | |
9787 | qp_changemask &= ~(valueT) 0xFFFF; | |
9788 | break; | |
9789 | } | |
9790 | } | |
9791 | ||
9792 | /* Always clear qp branch flags on any PR change. */ | |
9793 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9794 | clear_qp_branch_flag (qp_changemask); |
9795 | ||
542d6675 | 9796 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9797 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9798 | { | |
197865e8 | 9799 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9800 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9801 | { |
9802 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9803 | gr_values[i].known = 0; | |
9804 | } | |
800eeca4 JW |
9805 | clear_qp_mutex (qp_changemask); |
9806 | clear_qp_implies (qp_changemask, qp_changemask); | |
9807 | } | |
542d6675 KH |
9808 | /* After a call, all register values are undefined, except those marked |
9809 | as "safe". */ | |
800eeca4 | 9810 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9811 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9812 | { |
56d27c17 | 9813 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9814 | clear_register_values (); |
9815 | clear_qp_mutex (~qp_safe_across_calls); | |
9816 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9817 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9818 | } | |
e9718fe1 | 9819 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9820 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9821 | { |
9822 | clear_register_values (); | |
197865e8 KH |
9823 | clear_qp_mutex (~(valueT) 0); |
9824 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9825 | } |
542d6675 | 9826 | /* Look for mutex and implies relations. */ |
197865e8 | 9827 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9828 | || idesc->operands[0] == IA64_OPND_P2) |
9829 | && (idesc->operands[1] == IA64_OPND_P1 | |
9830 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9831 | { |
9832 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9833 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9834 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9835 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9836 | |
5e2f6673 L |
9837 | /* If both PRs are PR0, we can't really do anything. */ |
9838 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9839 | { |
9840 | if (md.debug_dv) | |
9841 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9842 | } | |
800eeca4 | 9843 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9844 | with the following exceptions. */ |
cb5301b6 RH |
9845 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9846 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9847 | { |
542d6675 KH |
9848 | clear_qp_implies (p2mask, p1mask); |
9849 | } | |
cb5301b6 RH |
9850 | else if (has_suffix_p (idesc->name, ".andcm") |
9851 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9852 | { |
9853 | clear_qp_implies (0, p1mask | p2mask); | |
9854 | } | |
cb5301b6 RH |
9855 | else if (has_suffix_p (idesc->name, ".orcm") |
9856 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9857 | { |
9858 | clear_qp_mutex (p1mask | p2mask); | |
9859 | clear_qp_implies (p1mask | p2mask, 0); | |
9860 | } | |
800eeca4 | 9861 | else |
542d6675 | 9862 | { |
5e2f6673 L |
9863 | int added = 0; |
9864 | ||
542d6675 | 9865 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9866 | |
9867 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9868 | if (p1 == 0 || p2 == 0) | |
9869 | clear_qp_mutex (p1mask | p2mask); | |
9870 | else | |
9871 | added = update_qp_mutex (p1mask | p2mask); | |
9872 | ||
9873 | if (CURR_SLOT.qp_regno == 0 | |
9874 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9875 | { |
5e2f6673 L |
9876 | if (added == 0 && p1 && p2) |
9877 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9878 | if (CURR_SLOT.qp_regno != 0) |
9879 | { | |
5e2f6673 L |
9880 | if (p1) |
9881 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9882 | if (p2) | |
9883 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9884 | } |
9885 | } | |
542d6675 KH |
9886 | } |
9887 | } | |
9888 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9889 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9890 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9891 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 9892 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
9893 | && (strcmp (idesc->name, "mov") == 0 |
9894 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9895 | { |
9896 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9897 | if (regno > 0 && regno < NELEMS (gr_values)) |
9898 | { | |
9899 | gr_values[regno].known = 1; | |
9900 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9901 | gr_values[regno].path = md.path; | |
9902 | if (md.debug_dv) | |
2434f565 JW |
9903 | { |
9904 | fprintf (stderr, " Know gr%d = ", regno); | |
9905 | fprintf_vma (stderr, gr_values[regno].value); | |
9906 | fputs ("\n", stderr); | |
9907 | } | |
542d6675 | 9908 | } |
800eeca4 | 9909 | } |
a66d2bb7 JB |
9910 | /* Look for dep.z imm insns. */ |
9911 | else if (idesc->operands[0] == IA64_OPND_R1 | |
9912 | && idesc->operands[1] == IA64_OPND_IMM8 | |
9913 | && strcmp (idesc->name, "dep.z") == 0) | |
9914 | { | |
9915 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
9916 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9917 | { | |
9918 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
9919 | ||
9920 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
9921 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
9922 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
9923 | gr_values[regno].known = 1; | |
9924 | gr_values[regno].value = value; | |
9925 | gr_values[regno].path = md.path; | |
9926 | if (md.debug_dv) | |
9927 | { | |
9928 | fprintf (stderr, " Know gr%d = ", regno); | |
9929 | fprintf_vma (stderr, gr_values[regno].value); | |
9930 | fputs ("\n", stderr); | |
9931 | } | |
9932 | } | |
9933 | } | |
197865e8 | 9934 | else |
800eeca4 JW |
9935 | { |
9936 | clear_qp_mutex (qp_changemask); | |
9937 | clear_qp_implies (qp_changemask, qp_changemask); | |
9938 | } | |
9939 | } | |
9940 | ||
542d6675 KH |
9941 | /* Return whether the given predicate registers are currently mutex. */ |
9942 | ||
800eeca4 JW |
9943 | static int |
9944 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9945 | int p1; |
9946 | int p2; | |
9947 | int path; | |
800eeca4 JW |
9948 | { |
9949 | int i; | |
9950 | valueT mask; | |
9951 | ||
9952 | if (p1 != p2) | |
9953 | { | |
542d6675 KH |
9954 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9955 | for (i = 0; i < qp_mutexeslen; i++) | |
9956 | { | |
9957 | if (qp_mutexes[i].path >= path | |
9958 | && (qp_mutexes[i].prmask & mask) == mask) | |
9959 | return 1; | |
9960 | } | |
800eeca4 JW |
9961 | } |
9962 | return 0; | |
9963 | } | |
9964 | ||
9965 | /* Return whether the given resource is in the given insn's list of chks | |
9966 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9967 | conflict. */ |
9968 | ||
800eeca4 JW |
9969 | static int |
9970 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9971 | struct rsrc *rs; |
9972 | struct ia64_opcode *idesc; | |
9973 | int note; | |
9974 | int qp_regno; | |
9975 | int path; | |
800eeca4 JW |
9976 | { |
9977 | struct rsrc specs[MAX_SPECS]; | |
9978 | int count; | |
9979 | ||
9980 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9981 | we don't need to check. One exception is note 11, which indicates that | |
9982 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9983 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9984 | && note != 11) |
9985 | return 0; | |
9986 | ||
9987 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9988 | while (count-- > 0) | |
9989 | { | |
9990 | /* UNAT checking is a bit more specific than other resources */ | |
9991 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9992 | && specs[count].mem_offset.hint |
9993 | && rs->mem_offset.hint) | |
9994 | { | |
9995 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9996 | { | |
9997 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9998 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9999 | return 1; | |
10000 | else | |
10001 | continue; | |
10002 | } | |
10003 | } | |
800eeca4 | 10004 | |
7484b8e6 | 10005 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 10006 | writes are an OR. */ |
7484b8e6 | 10007 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 10008 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
10009 | || rs->dependency->specifier == IA64_RS_PR63) |
10010 | { | |
10011 | if (specs[count].cmp_type != CMP_NONE | |
10012 | && specs[count].cmp_type == rs->cmp_type) | |
10013 | { | |
10014 | if (md.debug_dv) | |
10015 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10016 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10017 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10018 | specs[count].index : 63); |
10019 | continue; | |
10020 | } | |
10021 | if (md.debug_dv) | |
4a4f25cf | 10022 | fprintf (stderr, |
7484b8e6 TW |
10023 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10024 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10025 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10026 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10027 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10028 | specs[count].index : 63); |
4a4f25cf | 10029 | |
7484b8e6 TW |
10030 | } |
10031 | ||
800eeca4 | 10032 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10033 | */ |
800eeca4 | 10034 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10035 | return 2; |
800eeca4 | 10036 | else if (specs[count].index == rs->index) |
542d6675 | 10037 | return 1; |
800eeca4 | 10038 | } |
800eeca4 JW |
10039 | |
10040 | return 0; | |
10041 | } | |
10042 | ||
10043 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10044 | insert a stop to create the break. Update all resource dependencies | |
10045 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10046 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10047 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10048 | instruction. */ |
800eeca4 JW |
10049 | |
10050 | static void | |
10051 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
10052 | int insert_stop; |
10053 | int qp_regno; | |
10054 | int save_current; | |
800eeca4 JW |
10055 | { |
10056 | int i; | |
10057 | ||
10058 | if (insert_stop && md.num_slots_in_use > 0) | |
10059 | PREV_SLOT.end_of_insn_group = 1; | |
10060 | ||
10061 | if (md.debug_dv) | |
10062 | { | |
197865e8 | 10063 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10064 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10065 | if (qp_regno != 0) |
542d6675 | 10066 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10067 | fprintf (stderr, "\n"); |
10068 | } | |
10069 | ||
10070 | i = 0; | |
10071 | while (i < regdepslen) | |
10072 | { | |
10073 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10074 | ||
10075 | if (qp_regno != 0 | |
542d6675 KH |
10076 | && regdeps[i].qp_regno != qp_regno) |
10077 | { | |
10078 | ++i; | |
10079 | continue; | |
10080 | } | |
800eeca4 JW |
10081 | |
10082 | if (save_current | |
542d6675 KH |
10083 | && CURR_SLOT.src_file == regdeps[i].file |
10084 | && CURR_SLOT.src_line == regdeps[i].line) | |
10085 | { | |
10086 | ++i; | |
10087 | continue; | |
10088 | } | |
800eeca4 JW |
10089 | |
10090 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10091 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10092 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10093 | || dep->semantics == IA64_DVS_IMPLIEDF |
10094 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10095 | { | |
10096 | print_dependency ("Removing", i); | |
10097 | regdeps[i] = regdeps[--regdepslen]; | |
10098 | } | |
800eeca4 | 10099 | else |
542d6675 KH |
10100 | { |
10101 | if (dep->semantics == IA64_DVS_DATA | |
10102 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10103 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10104 | { |
10105 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10106 | regdeps[i].insn_srlz = STATE_STOP; | |
10107 | if (regdeps[i].data_srlz == STATE_NONE) | |
10108 | regdeps[i].data_srlz = STATE_STOP; | |
10109 | } | |
10110 | ++i; | |
10111 | } | |
800eeca4 JW |
10112 | } |
10113 | } | |
10114 | ||
542d6675 KH |
10115 | /* Add the given resource usage spec to the list of active dependencies. */ |
10116 | ||
197865e8 | 10117 | static void |
800eeca4 | 10118 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
10119 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
10120 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
10121 | struct rsrc *spec; |
10122 | int depind; | |
10123 | int path; | |
800eeca4 JW |
10124 | { |
10125 | if (regdepslen == regdepstotlen) | |
10126 | { | |
10127 | regdepstotlen += 20; | |
10128 | regdeps = (struct rsrc *) | |
542d6675 | 10129 | xrealloc ((void *) regdeps, |
bc805888 | 10130 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10131 | } |
10132 | ||
10133 | regdeps[regdepslen] = *spec; | |
10134 | regdeps[regdepslen].depind = depind; | |
10135 | regdeps[regdepslen].path = path; | |
10136 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10137 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10138 | ||
10139 | print_dependency ("Adding", regdepslen); | |
10140 | ||
10141 | ++regdepslen; | |
10142 | } | |
10143 | ||
10144 | static void | |
10145 | print_dependency (action, depind) | |
542d6675 KH |
10146 | const char *action; |
10147 | int depind; | |
800eeca4 JW |
10148 | { |
10149 | if (md.debug_dv) | |
10150 | { | |
197865e8 | 10151 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10152 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10153 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10154 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10155 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10156 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10157 | { |
10158 | fputs (" ", stderr); | |
10159 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10160 | fputs ("+", stderr); | |
10161 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10162 | } | |
800eeca4 JW |
10163 | fprintf (stderr, "\n"); |
10164 | } | |
10165 | } | |
10166 | ||
10167 | static void | |
10168 | instruction_serialization () | |
10169 | { | |
10170 | int i; | |
10171 | if (md.debug_dv) | |
10172 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10173 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10174 | if (regdeps[i].insn_srlz == STATE_STOP) |
10175 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10176 | } | |
10177 | ||
10178 | static void | |
10179 | data_serialization () | |
10180 | { | |
10181 | int i = 0; | |
10182 | if (md.debug_dv) | |
10183 | fprintf (stderr, " Data serialization\n"); | |
10184 | while (i < regdepslen) | |
10185 | { | |
10186 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10187 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10188 | data serialization. This might change with new tables */ | |
10189 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10190 | { | |
10191 | print_dependency ("Removing", i); | |
10192 | regdeps[i] = regdeps[--regdepslen]; | |
10193 | } | |
800eeca4 | 10194 | else |
542d6675 | 10195 | ++i; |
800eeca4 JW |
10196 | } |
10197 | } | |
10198 | ||
542d6675 KH |
10199 | /* Insert stops and serializations as needed to avoid DVs. */ |
10200 | ||
800eeca4 JW |
10201 | static void |
10202 | remove_marked_resource (rs) | |
542d6675 | 10203 | struct rsrc *rs; |
800eeca4 JW |
10204 | { |
10205 | switch (rs->dependency->semantics) | |
10206 | { | |
10207 | case IA64_DVS_SPECIFIC: | |
10208 | if (md.debug_dv) | |
10209 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10210 | /* ...fall through... */ |
800eeca4 JW |
10211 | case IA64_DVS_INSTR: |
10212 | if (md.debug_dv) | |
542d6675 | 10213 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10214 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10215 | insn_group_break (1, 0, 0); |
800eeca4 | 10216 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10217 | { |
888a75be | 10218 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10219 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10220 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10221 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10222 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10223 | instruction_serialization (); | |
10224 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10225 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10226 | emit_one_bundle (); | |
888a75be | 10227 | CURR_SLOT = oldslot; |
542d6675 | 10228 | } |
800eeca4 JW |
10229 | insn_group_break (1, 0, 0); |
10230 | break; | |
10231 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10232 | "other" types of DV are eliminated |
10233 | by a data serialization */ | |
800eeca4 JW |
10234 | case IA64_DVS_DATA: |
10235 | if (md.debug_dv) | |
542d6675 | 10236 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10237 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10238 | insn_group_break (1, 0, 0); |
800eeca4 | 10239 | { |
888a75be | 10240 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10241 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10242 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10243 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10244 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10245 | data_serialization (); | |
10246 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10247 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10248 | emit_one_bundle (); | |
888a75be | 10249 | CURR_SLOT = oldslot; |
800eeca4 JW |
10250 | } |
10251 | break; | |
10252 | case IA64_DVS_IMPLIED: | |
10253 | case IA64_DVS_IMPLIEDF: | |
10254 | if (md.debug_dv) | |
542d6675 | 10255 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10256 | insn_group_break (1, 0, 0); |
10257 | break; | |
10258 | default: | |
10259 | break; | |
10260 | } | |
10261 | } | |
10262 | ||
10263 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10264 | list. |
800eeca4 JW |
10265 | |
10266 | The check is run once for each execution path encountered. In this case, | |
10267 | a unique execution path is the sequence of instructions following a code | |
10268 | entry point, e.g. the following has three execution paths, one starting | |
10269 | at L0, one at L1, and one at L2. | |
197865e8 | 10270 | |
800eeca4 JW |
10271 | L0: nop |
10272 | L1: add | |
10273 | L2: add | |
197865e8 | 10274 | br.ret |
800eeca4 | 10275 | */ |
542d6675 | 10276 | |
800eeca4 JW |
10277 | static void |
10278 | check_dependencies (idesc) | |
542d6675 | 10279 | struct ia64_opcode *idesc; |
800eeca4 JW |
10280 | { |
10281 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10282 | int path; | |
10283 | int i; | |
10284 | ||
10285 | /* Note that the number of marked resources may change within the | |
197865e8 | 10286 | loop if in auto mode. */ |
800eeca4 JW |
10287 | i = 0; |
10288 | while (i < regdepslen) | |
10289 | { | |
10290 | struct rsrc *rs = ®deps[i]; | |
10291 | const struct ia64_dependency *dep = rs->dependency; | |
10292 | int chkind; | |
10293 | int note; | |
10294 | int start_over = 0; | |
10295 | ||
10296 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10297 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10298 | { | |
10299 | ++i; | |
10300 | continue; | |
10301 | } | |
10302 | ||
10303 | note = NOTE (opdeps->chks[chkind]); | |
10304 | ||
10305 | /* Check this resource against each execution path seen thus far. */ | |
10306 | for (path = 0; path <= md.path; path++) | |
10307 | { | |
10308 | int matchtype; | |
10309 | ||
10310 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10311 | if (rs->path < path) | |
10312 | continue; | |
10313 | ||
10314 | /* If the QP for this insn implies a QP which has branched, don't | |
10315 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10316 | useful; what's the point of generating code which will only be | |
10317 | reached if its QP is zero? | |
10318 | This code was specifically inserted to handle the following code, | |
10319 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10320 | ||
10321 | mov r4 = 2 | |
10322 | (p2) br.cond L | |
10323 | (p1) mov r4 = 7 | |
10324 | */ | |
10325 | if (CURR_SLOT.qp_regno != 0) | |
10326 | { | |
10327 | int skip = 0; | |
10328 | int implies; | |
10329 | for (implies = 0; implies < qp_implieslen; implies++) | |
10330 | { | |
10331 | if (qp_implies[implies].path >= path | |
10332 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10333 | && qp_implies[implies].p2_branched) | |
10334 | { | |
10335 | skip = 1; | |
10336 | break; | |
10337 | } | |
10338 | } | |
10339 | if (skip) | |
10340 | continue; | |
10341 | } | |
10342 | ||
10343 | if ((matchtype = resources_match (rs, idesc, note, | |
10344 | CURR_SLOT.qp_regno, path)) != 0) | |
10345 | { | |
10346 | char msg[1024]; | |
10347 | char pathmsg[256] = ""; | |
10348 | char indexmsg[256] = ""; | |
10349 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10350 | ||
10351 | if (path != 0) | |
10352 | sprintf (pathmsg, " when entry is at label '%s'", | |
10353 | md.entry_labels[path - 1]); | |
a66d2bb7 | 10354 | if (matchtype == 1 && rs->index >= 0) |
542d6675 KH |
10355 | sprintf (indexmsg, ", specific resource number is %d", |
10356 | rs->index); | |
10357 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
10358 | idesc->name, | |
10359 | (certain ? "violates" : "may violate"), | |
10360 | dv_mode[dep->mode], dep->name, | |
10361 | dv_sem[dep->semantics], | |
10362 | pathmsg, indexmsg); | |
10363 | ||
10364 | if (md.explicit_mode) | |
10365 | { | |
10366 | as_warn ("%s", msg); | |
10367 | if (path < md.path) | |
10368 | as_warn (_("Only the first path encountering the conflict " | |
10369 | "is reported")); | |
10370 | as_warn_where (rs->file, rs->line, | |
10371 | _("This is the location of the " | |
10372 | "conflicting usage")); | |
10373 | /* Don't bother checking other paths, to avoid duplicating | |
10374 | the same warning */ | |
10375 | break; | |
10376 | } | |
10377 | else | |
10378 | { | |
10379 | if (md.debug_dv) | |
10380 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10381 | ||
10382 | remove_marked_resource (rs); | |
10383 | ||
10384 | /* since the set of dependencies has changed, start over */ | |
10385 | /* FIXME -- since we're removing dvs as we go, we | |
10386 | probably don't really need to start over... */ | |
10387 | start_over = 1; | |
10388 | break; | |
10389 | } | |
10390 | } | |
10391 | } | |
800eeca4 | 10392 | if (start_over) |
542d6675 | 10393 | i = 0; |
800eeca4 | 10394 | else |
542d6675 | 10395 | ++i; |
800eeca4 JW |
10396 | } |
10397 | } | |
10398 | ||
542d6675 KH |
10399 | /* Register new dependencies based on the given opcode. */ |
10400 | ||
800eeca4 JW |
10401 | static void |
10402 | mark_resources (idesc) | |
542d6675 | 10403 | struct ia64_opcode *idesc; |
800eeca4 JW |
10404 | { |
10405 | int i; | |
10406 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10407 | int add_only_qp_reads = 0; | |
10408 | ||
10409 | /* A conditional branch only uses its resources if it is taken; if it is | |
10410 | taken, we stop following that path. The other branch types effectively | |
10411 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10412 | reads. */ |
800eeca4 JW |
10413 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10414 | { | |
10415 | add_only_qp_reads = 1; | |
10416 | } | |
10417 | ||
10418 | if (md.debug_dv) | |
10419 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10420 | ||
542d6675 | 10421 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10422 | { |
10423 | const struct ia64_dependency *dep; | |
10424 | struct rsrc specs[MAX_SPECS]; | |
10425 | int note; | |
10426 | int path; | |
10427 | int count; | |
197865e8 | 10428 | |
800eeca4 | 10429 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10430 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10431 | |
10432 | if (add_only_qp_reads | |
542d6675 KH |
10433 | && !(dep->mode == IA64_DV_WAR |
10434 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10435 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10436 | || dep->specifier == IA64_RS_PR63))) |
10437 | continue; | |
800eeca4 JW |
10438 | |
10439 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10440 | ||
800eeca4 | 10441 | while (count-- > 0) |
542d6675 KH |
10442 | { |
10443 | mark_resource (idesc, dep, &specs[count], | |
10444 | DEP (opdeps->regs[i]), md.path); | |
10445 | } | |
800eeca4 JW |
10446 | |
10447 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10448 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10449 | switch (dep->specifier) |
542d6675 KH |
10450 | { |
10451 | default: | |
10452 | break; | |
10453 | case IA64_RS_CPUID: | |
10454 | case IA64_RS_DBR: | |
10455 | case IA64_RS_IBR: | |
800eeca4 | 10456 | case IA64_RS_MSR: |
542d6675 KH |
10457 | case IA64_RS_PKR: |
10458 | case IA64_RS_PMC: | |
10459 | case IA64_RS_PMD: | |
10460 | case IA64_RS_RR: | |
10461 | for (path = 0; path < md.path; path++) | |
10462 | { | |
10463 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10464 | while (count-- > 0) | |
10465 | mark_resource (idesc, dep, &specs[count], | |
10466 | DEP (opdeps->regs[i]), path); | |
10467 | } | |
10468 | break; | |
10469 | } | |
10470 | } | |
10471 | } | |
10472 | ||
10473 | /* Remove dependencies when they no longer apply. */ | |
10474 | ||
800eeca4 JW |
10475 | static void |
10476 | update_dependencies (idesc) | |
542d6675 | 10477 | struct ia64_opcode *idesc; |
800eeca4 JW |
10478 | { |
10479 | int i; | |
10480 | ||
10481 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10482 | { | |
10483 | instruction_serialization (); | |
10484 | } | |
10485 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10486 | { | |
10487 | data_serialization (); | |
10488 | } | |
10489 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10490 | || is_taken_branch (idesc)) |
800eeca4 | 10491 | { |
542d6675 KH |
10492 | /* Although technically the taken branch doesn't clear dependencies |
10493 | which require a srlz.[id], we don't follow the branch; the next | |
10494 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10495 | regdepslen = 0; |
800eeca4 JW |
10496 | md.path = 0; |
10497 | } | |
10498 | else if (is_conditional_branch (idesc) | |
542d6675 | 10499 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10500 | { |
10501 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10502 | ||
542d6675 KH |
10503 | for (i = 0; i < qp_implieslen; i++) |
10504 | { | |
10505 | /* If the conditional branch's predicate is implied by the predicate | |
10506 | in an existing dependency, remove that dependency. */ | |
10507 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10508 | { | |
10509 | int depind = 0; | |
10510 | /* Note that this implied predicate takes a branch so that if | |
10511 | a later insn generates a DV but its predicate implies this | |
10512 | one, we can avoid the false DV warning. */ | |
10513 | qp_implies[i].p2_branched = 1; | |
10514 | while (depind < regdepslen) | |
10515 | { | |
10516 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10517 | { | |
10518 | print_dependency ("Removing", depind); | |
10519 | regdeps[depind] = regdeps[--regdepslen]; | |
10520 | } | |
10521 | else | |
10522 | ++depind; | |
10523 | } | |
10524 | } | |
10525 | } | |
800eeca4 | 10526 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10527 | cleared, provided that the QP hasn't been modified between the |
10528 | marking instruction and the branch. */ | |
800eeca4 | 10529 | if (is_call) |
542d6675 KH |
10530 | { |
10531 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10532 | } | |
800eeca4 | 10533 | else |
542d6675 KH |
10534 | { |
10535 | i = 0; | |
10536 | while (i < regdepslen) | |
10537 | { | |
10538 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10539 | && regdeps[i].link_to_qp_branch | |
10540 | && (regdeps[i].file != CURR_SLOT.src_file | |
10541 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10542 | { | |
10543 | /* Treat like a taken branch */ | |
10544 | print_dependency ("Removing", i); | |
10545 | regdeps[i] = regdeps[--regdepslen]; | |
10546 | } | |
10547 | else | |
10548 | ++i; | |
10549 | } | |
10550 | } | |
800eeca4 JW |
10551 | } |
10552 | } | |
10553 | ||
10554 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10555 | |
800eeca4 JW |
10556 | static int |
10557 | check_dv (idesc) | |
542d6675 | 10558 | struct ia64_opcode *idesc; |
800eeca4 JW |
10559 | { |
10560 | if (md.debug_dv) | |
10561 | { | |
197865e8 | 10562 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10563 | idesc->name, CURR_SLOT.src_line, |
10564 | idesc->dependencies->nchks, | |
10565 | idesc->dependencies->nregs); | |
800eeca4 JW |
10566 | } |
10567 | ||
197865e8 | 10568 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10569 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10570 | check against the specific resources used. */ |
800eeca4 JW |
10571 | check_dependencies (idesc); |
10572 | ||
542d6675 KH |
10573 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10574 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10575 | mark_resources (idesc); |
10576 | ||
10577 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10578 | requirements for being cleared |
10579 | ||
800eeca4 JW |
10580 | Instruction serialization (insns separated by interruption, rfi, or |
10581 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10582 | ||
10583 | Data serialization (instruction serialization, or writer + srlz.d + | |
10584 | reader, where writer and srlz.d are in separate groups) clears | |
10585 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10586 | always be the case). | |
10587 | ||
10588 | Instruction group break (groups separated by stop, taken branch, | |
10589 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10590 | */ | |
10591 | update_dependencies (idesc); | |
10592 | ||
10593 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10594 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10595 | note_register_values (idesc); |
10596 | ||
197865e8 | 10597 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10598 | md.mem_offset.hint = 0; |
10599 | ||
10600 | return 0; | |
10601 | } | |
10602 | ||
10603 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10604 | here. */ | |
10605 | void | |
10606 | md_assemble (str) | |
10607 | char *str; | |
10608 | { | |
10609 | char *saved_input_line_pointer, *mnemonic; | |
10610 | const struct pseudo_opcode *pdesc; | |
10611 | struct ia64_opcode *idesc; | |
10612 | unsigned char qp_regno; | |
10613 | unsigned int flags; | |
10614 | int ch; | |
10615 | ||
10616 | saved_input_line_pointer = input_line_pointer; | |
10617 | input_line_pointer = str; | |
10618 | ||
542d6675 | 10619 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10620 | |
10621 | mnemonic = input_line_pointer; | |
10622 | ch = get_symbol_end (); | |
10623 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10624 | if (pdesc) | |
10625 | { | |
10626 | *input_line_pointer = ch; | |
10627 | (*pdesc->handler) (pdesc->arg); | |
10628 | goto done; | |
10629 | } | |
10630 | ||
542d6675 | 10631 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10632 | |
10633 | idesc = ia64_find_opcode (mnemonic); | |
10634 | *input_line_pointer = ch; | |
10635 | if (!idesc) | |
10636 | { | |
10637 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10638 | goto done; | |
10639 | } | |
10640 | ||
10641 | idesc = parse_operands (idesc); | |
10642 | if (!idesc) | |
10643 | goto done; | |
10644 | ||
542d6675 | 10645 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10646 | if (idesc->type == IA64_TYPE_DYN) |
10647 | { | |
10648 | if (strcmp (idesc->name, "add") == 0) | |
10649 | { | |
10650 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10651 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10652 | mnemonic = "addl"; | |
10653 | else | |
10654 | mnemonic = "adds"; | |
3d56ab85 | 10655 | ia64_free_opcode (idesc); |
800eeca4 | 10656 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10657 | } |
10658 | else if (strcmp (idesc->name, "mov") == 0) | |
10659 | { | |
10660 | enum ia64_opnd opnd1, opnd2; | |
10661 | int rop; | |
10662 | ||
10663 | opnd1 = idesc->operands[0]; | |
10664 | opnd2 = idesc->operands[1]; | |
10665 | if (opnd1 == IA64_OPND_AR3) | |
10666 | rop = 0; | |
10667 | else if (opnd2 == IA64_OPND_AR3) | |
10668 | rop = 1; | |
10669 | else | |
10670 | abort (); | |
652ca075 L |
10671 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10672 | { | |
10673 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10674 | mnemonic = "mov.i"; | |
97762d08 | 10675 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10676 | mnemonic = "mov.m"; |
97762d08 JB |
10677 | else |
10678 | rop = -1; | |
652ca075 | 10679 | } |
800eeca4 | 10680 | else |
652ca075 | 10681 | abort (); |
97762d08 JB |
10682 | if (rop >= 0) |
10683 | { | |
10684 | ia64_free_opcode (idesc); | |
10685 | idesc = ia64_find_opcode (mnemonic); | |
10686 | while (idesc != NULL | |
10687 | && (idesc->operands[0] != opnd1 | |
10688 | || idesc->operands[1] != opnd2)) | |
10689 | idesc = get_next_opcode (idesc); | |
10690 | } | |
800eeca4 JW |
10691 | } |
10692 | } | |
652ca075 L |
10693 | else if (strcmp (idesc->name, "mov.i") == 0 |
10694 | || strcmp (idesc->name, "mov.m") == 0) | |
10695 | { | |
10696 | enum ia64_opnd opnd1, opnd2; | |
10697 | int rop; | |
10698 | ||
10699 | opnd1 = idesc->operands[0]; | |
10700 | opnd2 = idesc->operands[1]; | |
10701 | if (opnd1 == IA64_OPND_AR3) | |
10702 | rop = 0; | |
10703 | else if (opnd2 == IA64_OPND_AR3) | |
10704 | rop = 1; | |
10705 | else | |
10706 | abort (); | |
10707 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10708 | { | |
10709 | char unit = 'a'; | |
10710 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10711 | unit = 'i'; | |
10712 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10713 | unit = 'm'; | |
10714 | if (unit != 'a' && unit != idesc->name [4]) | |
80b8152b | 10715 | as_bad ("AR %d can only be accessed by %c-unit", |
652ca075 L |
10716 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10717 | TOUPPER (unit)); | |
10718 | } | |
10719 | } | |
91d777ee L |
10720 | else if (strcmp (idesc->name, "hint.b") == 0) |
10721 | { | |
10722 | switch (md.hint_b) | |
10723 | { | |
10724 | case hint_b_ok: | |
10725 | break; | |
10726 | case hint_b_warning: | |
10727 | as_warn ("hint.b may be treated as nop"); | |
10728 | break; | |
10729 | case hint_b_error: | |
10730 | as_bad ("hint.b shouldn't be used"); | |
10731 | break; | |
10732 | } | |
10733 | } | |
800eeca4 JW |
10734 | |
10735 | qp_regno = 0; | |
10736 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10737 | { |
10738 | qp_regno = md.qp.X_add_number - REG_P; | |
10739 | md.qp.X_op = O_absent; | |
10740 | } | |
800eeca4 JW |
10741 | |
10742 | flags = idesc->flags; | |
10743 | ||
10744 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10745 | { |
10746 | /* The alignment frag has to end with a stop bit only if the | |
10747 | next instruction after the alignment directive has to be | |
10748 | the first instruction in an instruction group. */ | |
10749 | if (align_frag) | |
10750 | { | |
10751 | while (align_frag->fr_type != rs_align_code) | |
10752 | { | |
10753 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10754 | if (!align_frag) |
10755 | break; | |
9545c4ce | 10756 | } |
bae25f19 L |
10757 | /* align_frag can be NULL if there are directives in |
10758 | between. */ | |
10759 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10760 | align_frag->tc_frag_data = 1; |
10761 | } | |
10762 | ||
10763 | insn_group_break (1, 0, 0); | |
10764 | } | |
10765 | align_frag = NULL; | |
800eeca4 JW |
10766 | |
10767 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10768 | { | |
10769 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10770 | goto done; | |
10771 | } | |
10772 | ||
542d6675 | 10773 | /* Build the instruction. */ |
800eeca4 JW |
10774 | CURR_SLOT.qp_regno = qp_regno; |
10775 | CURR_SLOT.idesc = idesc; | |
10776 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10777 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
10778 | |
10779 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 10780 | if (unwind.current_entry) |
800eeca4 | 10781 | { |
e0c9811a JW |
10782 | CURR_SLOT.unwind_record = unwind.current_entry; |
10783 | unwind.current_entry = NULL; | |
800eeca4 | 10784 | } |
75e09913 JB |
10785 | if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start)) |
10786 | unwind.insn = 1; | |
800eeca4 | 10787 | |
542d6675 | 10788 | /* Check for dependency violations. */ |
800eeca4 | 10789 | if (md.detect_dv) |
542d6675 | 10790 | check_dv (idesc); |
800eeca4 JW |
10791 | |
10792 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10793 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10794 | emit_one_bundle (); | |
10795 | ||
10796 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10797 | insn_group_break (1, 0, 0); | |
10798 | ||
10799 | md.last_text_seg = now_seg; | |
10800 | ||
10801 | done: | |
10802 | input_line_pointer = saved_input_line_pointer; | |
10803 | } | |
10804 | ||
10805 | /* Called when symbol NAME cannot be found in the symbol table. | |
10806 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10807 | |
10808 | symbolS * | |
800eeca4 | 10809 | md_undefined_symbol (name) |
2434f565 | 10810 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10811 | { |
10812 | return 0; | |
10813 | } | |
10814 | ||
10815 | /* Called for any expression that can not be recognized. When the | |
10816 | function is called, `input_line_pointer' will point to the start of | |
10817 | the expression. */ | |
542d6675 | 10818 | |
800eeca4 JW |
10819 | void |
10820 | md_operand (e) | |
10821 | expressionS *e; | |
10822 | { | |
800eeca4 JW |
10823 | switch (*input_line_pointer) |
10824 | { | |
800eeca4 JW |
10825 | case '[': |
10826 | ++input_line_pointer; | |
10827 | expression (e); | |
10828 | if (*input_line_pointer != ']') | |
10829 | { | |
16a48f83 | 10830 | as_bad ("Closing bracket missing"); |
800eeca4 JW |
10831 | goto err; |
10832 | } | |
10833 | else | |
10834 | { | |
10835 | if (e->X_op != O_register) | |
10836 | as_bad ("Register expected as index"); | |
10837 | ||
10838 | ++input_line_pointer; | |
10839 | e->X_op = O_index; | |
10840 | } | |
10841 | break; | |
10842 | ||
10843 | default: | |
10844 | break; | |
10845 | } | |
10846 | return; | |
10847 | ||
10848 | err: | |
10849 | ignore_rest_of_line (); | |
10850 | } | |
10851 | ||
10852 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10853 | a section symbol plus some offset. For relocs involving @fptr(), | |
10854 | directives we don't want such adjustments since we need to have the | |
10855 | original symbol's name in the reloc. */ | |
10856 | int | |
10857 | ia64_fix_adjustable (fix) | |
10858 | fixS *fix; | |
10859 | { | |
10860 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 10861 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
10862 | return 0; |
10863 | ||
10864 | switch (fix->fx_r_type) | |
10865 | { | |
10866 | case BFD_RELOC_IA64_FPTR64I: | |
10867 | case BFD_RELOC_IA64_FPTR32MSB: | |
10868 | case BFD_RELOC_IA64_FPTR32LSB: | |
10869 | case BFD_RELOC_IA64_FPTR64MSB: | |
10870 | case BFD_RELOC_IA64_FPTR64LSB: | |
10871 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10872 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10873 | return 0; | |
10874 | default: | |
10875 | break; | |
10876 | } | |
10877 | ||
10878 | return 1; | |
10879 | } | |
10880 | ||
10881 | int | |
10882 | ia64_force_relocation (fix) | |
10883 | fixS *fix; | |
10884 | { | |
10885 | switch (fix->fx_r_type) | |
10886 | { | |
10887 | case BFD_RELOC_IA64_FPTR64I: | |
10888 | case BFD_RELOC_IA64_FPTR32MSB: | |
10889 | case BFD_RELOC_IA64_FPTR32LSB: | |
10890 | case BFD_RELOC_IA64_FPTR64MSB: | |
10891 | case BFD_RELOC_IA64_FPTR64LSB: | |
10892 | ||
10893 | case BFD_RELOC_IA64_LTOFF22: | |
10894 | case BFD_RELOC_IA64_LTOFF64I: | |
10895 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10896 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10897 | case BFD_RELOC_IA64_PLTOFF22: | |
10898 | case BFD_RELOC_IA64_PLTOFF64I: | |
10899 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10900 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10901 | |
10902 | case BFD_RELOC_IA64_LTOFF22X: | |
10903 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10904 | return 1; |
10905 | ||
10906 | default: | |
a161fe53 | 10907 | break; |
800eeca4 | 10908 | } |
a161fe53 | 10909 | |
ae6063d4 | 10910 | return generic_force_reloc (fix); |
800eeca4 JW |
10911 | } |
10912 | ||
10913 | /* Decide from what point a pc-relative relocation is relative to, | |
10914 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10915 | long | |
10916 | ia64_pcrel_from_section (fix, sec) | |
10917 | fixS *fix; | |
10918 | segT sec; | |
10919 | { | |
10920 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10921 | |
800eeca4 JW |
10922 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10923 | off &= ~0xfUL; | |
10924 | ||
10925 | return off; | |
10926 | } | |
10927 | ||
6174d9c8 RH |
10928 | |
10929 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10930 | void | |
10931 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10932 | { | |
10933 | expressionS expr; | |
10934 | ||
10935 | expr.X_op = O_pseudo_fixup; | |
10936 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10937 | expr.X_add_number = 0; | |
10938 | expr.X_add_symbol = symbol; | |
10939 | emit_expr (&expr, size); | |
10940 | } | |
10941 | ||
800eeca4 JW |
10942 | /* This is called whenever some data item (not an instruction) needs a |
10943 | fixup. We pick the right reloc code depending on the byteorder | |
10944 | currently in effect. */ | |
10945 | void | |
10946 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10947 | fragS *f; | |
10948 | int where; | |
10949 | int nbytes; | |
10950 | expressionS *exp; | |
10951 | { | |
10952 | bfd_reloc_code_real_type code; | |
10953 | fixS *fix; | |
10954 | ||
10955 | switch (nbytes) | |
10956 | { | |
10957 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10958 | them here since they will work fine as long as the expression | |
10959 | is fully defined at the end of the pass over the source file. */ | |
10960 | case 1: code = BFD_RELOC_8; break; | |
10961 | case 2: code = BFD_RELOC_16; break; | |
10962 | case 4: | |
10963 | if (target_big_endian) | |
10964 | code = BFD_RELOC_IA64_DIR32MSB; | |
10965 | else | |
10966 | code = BFD_RELOC_IA64_DIR32LSB; | |
10967 | break; | |
10968 | ||
10969 | case 8: | |
40449e9f | 10970 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10971 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10972 | && exp->X_op_symbol |
10973 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10974 | && !(md.flags & EF_IA_64_ABI64)) | |
10975 | { | |
10976 | if (target_big_endian) | |
10977 | code = BFD_RELOC_IA64_IPLTMSB; | |
10978 | else | |
10979 | code = BFD_RELOC_IA64_IPLTLSB; | |
10980 | exp->X_op = O_symbol; | |
10981 | break; | |
10982 | } | |
10983 | else | |
10984 | { | |
10985 | if (target_big_endian) | |
10986 | code = BFD_RELOC_IA64_DIR64MSB; | |
10987 | else | |
10988 | code = BFD_RELOC_IA64_DIR64LSB; | |
10989 | break; | |
10990 | } | |
800eeca4 | 10991 | |
3969b680 RH |
10992 | case 16: |
10993 | if (exp->X_op == O_pseudo_fixup | |
10994 | && exp->X_op_symbol | |
10995 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10996 | { | |
10997 | if (target_big_endian) | |
10998 | code = BFD_RELOC_IA64_IPLTMSB; | |
10999 | else | |
11000 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
11001 | exp->X_op = O_symbol; |
11002 | break; | |
11003 | } | |
11004 | /* FALLTHRU */ | |
11005 | ||
800eeca4 JW |
11006 | default: |
11007 | as_bad ("Unsupported fixup size %d", nbytes); | |
11008 | ignore_rest_of_line (); | |
11009 | return; | |
11010 | } | |
6174d9c8 | 11011 | |
800eeca4 JW |
11012 | if (exp->X_op == O_pseudo_fixup) |
11013 | { | |
800eeca4 JW |
11014 | exp->X_op = O_symbol; |
11015 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11016 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11017 | } |
3969b680 | 11018 | |
800eeca4 JW |
11019 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11020 | /* We need to store the byte order in effect in case we're going | |
11021 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 11022 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
11023 | fix->tc_fix_data.bigendian = target_big_endian; |
11024 | } | |
11025 | ||
11026 | /* Return the actual relocation we wish to associate with the pseudo | |
11027 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11028 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11029 | |
11030 | static bfd_reloc_code_real_type | |
11031 | ia64_gen_real_reloc_type (sym, r_type) | |
11032 | struct symbol *sym; | |
11033 | bfd_reloc_code_real_type r_type; | |
11034 | { | |
11035 | bfd_reloc_code_real_type new = 0; | |
0ca3e455 | 11036 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11037 | |
11038 | if (sym == NULL) | |
11039 | { | |
11040 | return r_type; | |
11041 | } | |
11042 | ||
11043 | switch (S_GET_VALUE (sym)) | |
11044 | { | |
11045 | case FUNC_FPTR_RELATIVE: | |
11046 | switch (r_type) | |
11047 | { | |
11048 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
11049 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
11050 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
11051 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
11052 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11053 | default: type = "FPTR"; break; |
800eeca4 JW |
11054 | } |
11055 | break; | |
11056 | ||
11057 | case FUNC_GP_RELATIVE: | |
11058 | switch (r_type) | |
11059 | { | |
11060 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
11061 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
11062 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
11063 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
11064 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
11065 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11066 | default: type = "GPREL"; break; |
800eeca4 JW |
11067 | } |
11068 | break; | |
11069 | ||
11070 | case FUNC_LT_RELATIVE: | |
11071 | switch (r_type) | |
11072 | { | |
11073 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
11074 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11075 | default: type = "LTOFF"; break; |
800eeca4 JW |
11076 | } |
11077 | break; | |
11078 | ||
fa2c7eff RH |
11079 | case FUNC_LT_RELATIVE_X: |
11080 | switch (r_type) | |
11081 | { | |
11082 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
0ca3e455 | 11083 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11084 | } |
11085 | break; | |
11086 | ||
c67e42c9 RH |
11087 | case FUNC_PC_RELATIVE: |
11088 | switch (r_type) | |
11089 | { | |
11090 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
11091 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
11092 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
11093 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
11094 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
11095 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11096 | default: type = "PCREL"; break; |
c67e42c9 RH |
11097 | } |
11098 | break; | |
11099 | ||
800eeca4 JW |
11100 | case FUNC_PLT_RELATIVE: |
11101 | switch (r_type) | |
11102 | { | |
11103 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
11104 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
11105 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11106 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11107 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11108 | } |
11109 | break; | |
11110 | ||
11111 | case FUNC_SEC_RELATIVE: | |
11112 | switch (r_type) | |
11113 | { | |
11114 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
11115 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
11116 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
11117 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11118 | default: type = "SECREL"; break; |
800eeca4 JW |
11119 | } |
11120 | break; | |
11121 | ||
11122 | case FUNC_SEG_RELATIVE: | |
11123 | switch (r_type) | |
11124 | { | |
11125 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
11126 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11127 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11128 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11129 | default: type = "SEGREL"; break; |
800eeca4 JW |
11130 | } |
11131 | break; | |
11132 | ||
11133 | case FUNC_LTV_RELATIVE: | |
11134 | switch (r_type) | |
11135 | { | |
11136 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
11137 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
11138 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
11139 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11140 | default: type = "LTV"; break; |
800eeca4 JW |
11141 | } |
11142 | break; | |
11143 | ||
11144 | case FUNC_LT_FPTR_RELATIVE: | |
11145 | switch (r_type) | |
11146 | { | |
11147 | case BFD_RELOC_IA64_IMM22: | |
11148 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
11149 | case BFD_RELOC_IA64_IMM64: | |
11150 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
0ca3e455 JB |
11151 | case BFD_RELOC_IA64_DIR32MSB: |
11152 | new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; | |
11153 | case BFD_RELOC_IA64_DIR32LSB: | |
11154 | new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; | |
11155 | case BFD_RELOC_IA64_DIR64MSB: | |
11156 | new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; | |
11157 | case BFD_RELOC_IA64_DIR64LSB: | |
11158 | new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; | |
800eeca4 | 11159 | default: |
0ca3e455 | 11160 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11161 | } |
11162 | break; | |
3969b680 | 11163 | |
13ae64f3 JJ |
11164 | case FUNC_TP_RELATIVE: |
11165 | switch (r_type) | |
11166 | { | |
0ca3e455 JB |
11167 | case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; |
11168 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; | |
11169 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; | |
11170 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; | |
11171 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; | |
11172 | default: type = "TPREL"; break; | |
13ae64f3 JJ |
11173 | } |
11174 | break; | |
11175 | ||
11176 | case FUNC_LT_TP_RELATIVE: | |
11177 | switch (r_type) | |
11178 | { | |
11179 | case BFD_RELOC_IA64_IMM22: | |
11180 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
11181 | default: | |
0ca3e455 JB |
11182 | type = "LTOFF_TPREL"; break; |
11183 | } | |
11184 | break; | |
11185 | ||
11186 | case FUNC_DTP_MODULE: | |
11187 | switch (r_type) | |
11188 | { | |
11189 | case BFD_RELOC_IA64_DIR64MSB: | |
11190 | new = BFD_RELOC_IA64_DTPMOD64MSB; break; | |
11191 | case BFD_RELOC_IA64_DIR64LSB: | |
11192 | new = BFD_RELOC_IA64_DTPMOD64LSB; break; | |
11193 | default: | |
11194 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11195 | } |
11196 | break; | |
11197 | ||
11198 | case FUNC_LT_DTP_MODULE: | |
11199 | switch (r_type) | |
11200 | { | |
11201 | case BFD_RELOC_IA64_IMM22: | |
11202 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
11203 | default: | |
0ca3e455 | 11204 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11205 | } |
11206 | break; | |
11207 | ||
11208 | case FUNC_DTP_RELATIVE: | |
11209 | switch (r_type) | |
11210 | { | |
0ca3e455 JB |
11211 | case BFD_RELOC_IA64_DIR32MSB: |
11212 | new = BFD_RELOC_IA64_DTPREL32MSB; break; | |
11213 | case BFD_RELOC_IA64_DIR32LSB: | |
11214 | new = BFD_RELOC_IA64_DTPREL32LSB; break; | |
6174d9c8 RH |
11215 | case BFD_RELOC_IA64_DIR64MSB: |
11216 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
11217 | case BFD_RELOC_IA64_DIR64LSB: | |
11218 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
11219 | case BFD_RELOC_IA64_IMM14: |
11220 | new = BFD_RELOC_IA64_DTPREL14; break; | |
11221 | case BFD_RELOC_IA64_IMM22: | |
11222 | new = BFD_RELOC_IA64_DTPREL22; break; | |
11223 | case BFD_RELOC_IA64_IMM64: | |
11224 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
11225 | default: | |
0ca3e455 | 11226 | type = "DTPREL"; break; |
13ae64f3 JJ |
11227 | } |
11228 | break; | |
11229 | ||
11230 | case FUNC_LT_DTP_RELATIVE: | |
11231 | switch (r_type) | |
11232 | { | |
11233 | case BFD_RELOC_IA64_IMM22: | |
11234 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
11235 | default: | |
0ca3e455 | 11236 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11237 | } |
11238 | break; | |
11239 | ||
40449e9f | 11240 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11241 | switch (r_type) |
11242 | { | |
11243 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11244 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11245 | default: type = "IPLT"; break; | |
11246 | } | |
40449e9f | 11247 | break; |
1cd8ff38 | 11248 | |
800eeca4 JW |
11249 | default: |
11250 | abort (); | |
11251 | } | |
6174d9c8 | 11252 | |
800eeca4 JW |
11253 | if (new) |
11254 | return new; | |
11255 | else | |
0ca3e455 JB |
11256 | { |
11257 | int width; | |
11258 | ||
11259 | if (!type) | |
11260 | abort (); | |
11261 | switch (r_type) | |
11262 | { | |
11263 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11264 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11265 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11266 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11267 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11268 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11269 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11270 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11271 | default: abort (); | |
11272 | } | |
11273 | ||
11274 | /* This should be an error, but since previously there wasn't any | |
11275 | diagnostic here, dont't make it fail because of this for now. */ | |
11276 | as_warn ("Cannot express %s%d%s relocation", type, width, suffix); | |
11277 | return r_type; | |
11278 | } | |
800eeca4 JW |
11279 | } |
11280 | ||
11281 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11282 | functions. */ | |
11283 | void | |
11284 | ia64_validate_fix (fix) | |
11285 | fixS *fix; | |
11286 | { | |
11287 | switch (fix->fx_r_type) | |
11288 | { | |
11289 | case BFD_RELOC_IA64_FPTR64I: | |
11290 | case BFD_RELOC_IA64_FPTR32MSB: | |
11291 | case BFD_RELOC_IA64_FPTR64LSB: | |
11292 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11293 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11294 | if (fix->fx_offset != 0) | |
11295 | as_bad_where (fix->fx_file, fix->fx_line, | |
11296 | "No addend allowed in @fptr() relocation"); | |
11297 | break; | |
11298 | default: | |
11299 | break; | |
11300 | } | |
800eeca4 JW |
11301 | } |
11302 | ||
11303 | static void | |
11304 | fix_insn (fix, odesc, value) | |
11305 | fixS *fix; | |
11306 | const struct ia64_operand *odesc; | |
11307 | valueT value; | |
11308 | { | |
11309 | bfd_vma insn[3], t0, t1, control_bits; | |
11310 | const char *err; | |
11311 | char *fixpos; | |
11312 | long slot; | |
11313 | ||
11314 | slot = fix->fx_where & 0x3; | |
11315 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11316 | ||
c67e42c9 | 11317 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11318 | t0 = bfd_getl64 (fixpos); |
11319 | t1 = bfd_getl64 (fixpos + 8); | |
11320 | control_bits = t0 & 0x1f; | |
11321 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11322 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11323 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11324 | ||
c67e42c9 RH |
11325 | err = NULL; |
11326 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11327 | { |
c67e42c9 RH |
11328 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11329 | insn[2] |= (((value & 0x7f) << 13) | |
11330 | | (((value >> 7) & 0x1ff) << 27) | |
11331 | | (((value >> 16) & 0x1f) << 22) | |
11332 | | (((value >> 21) & 0x1) << 21) | |
11333 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11334 | } |
c67e42c9 RH |
11335 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11336 | { | |
11337 | if (value & ~0x3fffffffffffffffULL) | |
11338 | err = "integer operand out of range"; | |
11339 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
11340 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11341 | } | |
11342 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11343 | { | |
11344 | value >>= 4; | |
11345 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11346 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11347 | | (((value >> 0) & 0xfffff) << 13)); | |
11348 | } | |
11349 | else | |
11350 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11351 | ||
11352 | if (err) | |
11353 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
11354 | |
11355 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11356 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11357 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11358 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11359 | } |
11360 | ||
11361 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11362 | ignored; perhaps it was once meaningful, but now it is historical. | |
11363 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11364 | ||
11365 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11366 | (if possible). */ |
94f592af NC |
11367 | |
11368 | void | |
11369 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 11370 | fixS *fix; |
40449e9f | 11371 | valueT *valP; |
2434f565 | 11372 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
11373 | { |
11374 | char *fixpos; | |
40449e9f | 11375 | valueT value = *valP; |
800eeca4 JW |
11376 | |
11377 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11378 | ||
11379 | if (fix->fx_pcrel) | |
11380 | { | |
7b347e43 JB |
11381 | switch (fix->fx_r_type) |
11382 | { | |
11383 | case BFD_RELOC_IA64_PCREL21B: break; | |
11384 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11385 | case BFD_RELOC_IA64_PCREL21F: break; | |
11386 | case BFD_RELOC_IA64_PCREL21M: break; | |
11387 | case BFD_RELOC_IA64_PCREL60B: break; | |
11388 | case BFD_RELOC_IA64_PCREL22: break; | |
11389 | case BFD_RELOC_IA64_PCREL64I: break; | |
11390 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11391 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11392 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11393 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11394 | default: | |
11395 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11396 | fix->fx_r_type); | |
11397 | break; | |
11398 | } | |
800eeca4 JW |
11399 | } |
11400 | if (fix->fx_addsy) | |
11401 | { | |
00f7efb6 | 11402 | switch (fix->fx_r_type) |
800eeca4 | 11403 | { |
00f7efb6 | 11404 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11405 | /* This must be a TAG13 or TAG13b operand. There are no external |
11406 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
11407 | as_bad_where (fix->fx_file, fix->fx_line, |
11408 | "%s must have a constant value", | |
11409 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 11410 | fix->fx_done = 1; |
94f592af | 11411 | return; |
00f7efb6 JJ |
11412 | |
11413 | case BFD_RELOC_IA64_TPREL14: | |
11414 | case BFD_RELOC_IA64_TPREL22: | |
11415 | case BFD_RELOC_IA64_TPREL64I: | |
11416 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11417 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11418 | case BFD_RELOC_IA64_DTPREL14: | |
11419 | case BFD_RELOC_IA64_DTPREL22: | |
11420 | case BFD_RELOC_IA64_DTPREL64I: | |
11421 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11422 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11423 | break; | |
7925dd68 JJ |
11424 | |
11425 | default: | |
11426 | break; | |
800eeca4 | 11427 | } |
800eeca4 JW |
11428 | } |
11429 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11430 | { | |
11431 | if (fix->tc_fix_data.bigendian) | |
11432 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11433 | else | |
11434 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11435 | fix->fx_done = 1; | |
800eeca4 JW |
11436 | } |
11437 | else | |
11438 | { | |
11439 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11440 | fix->fx_done = 1; | |
800eeca4 | 11441 | } |
800eeca4 JW |
11442 | } |
11443 | ||
11444 | /* Generate the BFD reloc to be stuck in the object file from the | |
11445 | fixup used internally in the assembler. */ | |
542d6675 KH |
11446 | |
11447 | arelent * | |
800eeca4 | 11448 | tc_gen_reloc (sec, fixp) |
2434f565 | 11449 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
11450 | fixS *fixp; |
11451 | { | |
11452 | arelent *reloc; | |
11453 | ||
11454 | reloc = xmalloc (sizeof (*reloc)); | |
11455 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11456 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11457 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11458 | reloc->addend = fixp->fx_offset; | |
11459 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11460 | ||
11461 | if (!reloc->howto) | |
11462 | { | |
11463 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
11464 | "Cannot represent %s relocation in object file", | |
11465 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
11466 | } | |
11467 | return reloc; | |
11468 | } | |
11469 | ||
11470 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11471 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11472 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11473 | returned, or NULL on OK. */ |
11474 | ||
11475 | #define MAX_LITTLENUMS 5 | |
11476 | ||
542d6675 | 11477 | char * |
800eeca4 JW |
11478 | md_atof (type, lit, size) |
11479 | int type; | |
11480 | char *lit; | |
11481 | int *size; | |
11482 | { | |
11483 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11484 | char *t; |
11485 | int prec; | |
11486 | ||
11487 | switch (type) | |
11488 | { | |
11489 | /* IEEE floats */ | |
11490 | case 'f': | |
11491 | case 'F': | |
11492 | case 's': | |
11493 | case 'S': | |
11494 | prec = 2; | |
11495 | break; | |
11496 | ||
11497 | case 'd': | |
11498 | case 'D': | |
11499 | case 'r': | |
11500 | case 'R': | |
11501 | prec = 4; | |
11502 | break; | |
11503 | ||
11504 | case 'x': | |
11505 | case 'X': | |
11506 | case 'p': | |
11507 | case 'P': | |
11508 | prec = 5; | |
11509 | break; | |
11510 | ||
11511 | default: | |
11512 | *size = 0; | |
11513 | return "Bad call to MD_ATOF()"; | |
11514 | } | |
11515 | t = atof_ieee (input_line_pointer, type, words); | |
11516 | if (t) | |
11517 | input_line_pointer = t; | |
800eeca4 | 11518 | |
10a98291 L |
11519 | (*ia64_float_to_chars) (lit, words, prec); |
11520 | ||
165a7f90 L |
11521 | if (type == 'X') |
11522 | { | |
11523 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11524 | memset (&lit [10], 0, 6); |
165a7f90 L |
11525 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11526 | } | |
10a98291 L |
11527 | else |
11528 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11529 | ||
800eeca4 JW |
11530 | return 0; |
11531 | } | |
11532 | ||
800eeca4 JW |
11533 | /* Handle ia64 specific semantics of the align directive. */ |
11534 | ||
0a9ef439 | 11535 | void |
800eeca4 | 11536 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
11537 | int n ATTRIBUTE_UNUSED; |
11538 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 11539 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 11540 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 11541 | { |
0a9ef439 | 11542 | if (subseg_text_p (now_seg)) |
800eeca4 | 11543 | ia64_flush_insns (); |
0a9ef439 | 11544 | } |
800eeca4 | 11545 | |
0a9ef439 RH |
11546 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11547 | of an rs_align_code fragment. */ | |
800eeca4 | 11548 | |
0a9ef439 RH |
11549 | void |
11550 | ia64_handle_align (fragp) | |
11551 | fragS *fragp; | |
11552 | { | |
0a9ef439 RH |
11553 | int bytes; |
11554 | char *p; | |
9545c4ce | 11555 | const unsigned char *nop; |
0a9ef439 RH |
11556 | |
11557 | if (fragp->fr_type != rs_align_code) | |
11558 | return; | |
11559 | ||
9545c4ce L |
11560 | /* Check if this frag has to end with a stop bit. */ |
11561 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11562 | ||
0a9ef439 RH |
11563 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11564 | p = fragp->fr_literal + fragp->fr_fix; | |
11565 | ||
d9201763 L |
11566 | /* If no paddings are needed, we check if we need a stop bit. */ |
11567 | if (!bytes && fragp->tc_frag_data) | |
11568 | { | |
11569 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11570 | #if 1 |
11571 | /* FIXME: It won't work with | |
11572 | .align 16 | |
11573 | alloc r32=ar.pfs,1,2,4,0 | |
11574 | */ | |
11575 | ; | |
11576 | #else | |
d9201763 L |
11577 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11578 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11579 | #endif |
d9201763 L |
11580 | else |
11581 | /* Bundles are always in little-endian byte order. Make sure | |
11582 | the previous bundle has the stop bit. */ | |
11583 | *(p - 16) |= 1; | |
11584 | } | |
11585 | ||
0a9ef439 RH |
11586 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11587 | putting data into a text section. */ | |
11588 | if (bytes & 15) | |
11589 | { | |
11590 | int fix = bytes & 15; | |
11591 | memset (p, 0, fix); | |
11592 | p += fix; | |
11593 | bytes -= fix; | |
11594 | fragp->fr_fix += fix; | |
800eeca4 JW |
11595 | } |
11596 | ||
012a452b | 11597 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11598 | memcpy (p, nop, 16); |
0a9ef439 | 11599 | fragp->fr_var = 16; |
800eeca4 | 11600 | } |
10a98291 L |
11601 | |
11602 | static void | |
11603 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11604 | int prec) | |
11605 | { | |
11606 | while (prec--) | |
11607 | { | |
11608 | number_to_chars_bigendian (lit, (long) (*words++), | |
11609 | sizeof (LITTLENUM_TYPE)); | |
11610 | lit += sizeof (LITTLENUM_TYPE); | |
11611 | } | |
11612 | } | |
11613 | ||
11614 | static void | |
11615 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11616 | int prec) | |
11617 | { | |
11618 | while (prec--) | |
11619 | { | |
11620 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11621 | sizeof (LITTLENUM_TYPE)); | |
11622 | lit += sizeof (LITTLENUM_TYPE); | |
11623 | } | |
11624 | } | |
11625 | ||
11626 | void | |
11627 | ia64_elf_section_change_hook (void) | |
11628 | { | |
38ce5b11 L |
11629 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11630 | && elf_linked_to_section (now_seg) == NULL) | |
11631 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11632 | dot_byteorder (-1); |
11633 | } | |
a645d1eb L |
11634 | |
11635 | /* Check if a label should be made global. */ | |
11636 | void | |
11637 | ia64_check_label (symbolS *label) | |
11638 | { | |
11639 | if (*input_line_pointer == ':') | |
11640 | { | |
11641 | S_SET_EXTERNAL (label); | |
11642 | input_line_pointer++; | |
11643 | } | |
11644 | } | |
35f5df7f L |
11645 | |
11646 | /* Used to remember where .alias and .secalias directives are seen. We | |
11647 | will rename symbol and section names when we are about to output | |
11648 | the relocatable file. */ | |
11649 | struct alias | |
11650 | { | |
11651 | char *file; /* The file where the directive is seen. */ | |
11652 | unsigned int line; /* The line number the directive is at. */ | |
11653 | const char *name; /* The orignale name of the symbol. */ | |
11654 | }; | |
11655 | ||
11656 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11657 | .secalias. Otherwise, it is .alias. */ | |
11658 | static void | |
11659 | dot_alias (int section) | |
11660 | { | |
11661 | char *name, *alias; | |
11662 | char delim; | |
11663 | char *end_name; | |
11664 | int len; | |
11665 | const char *error_string; | |
11666 | struct alias *h; | |
11667 | const char *a; | |
11668 | struct hash_control *ahash, *nhash; | |
11669 | const char *kind; | |
11670 | ||
11671 | name = input_line_pointer; | |
11672 | delim = get_symbol_end (); | |
11673 | end_name = input_line_pointer; | |
11674 | *end_name = delim; | |
11675 | ||
11676 | if (name == end_name) | |
11677 | { | |
11678 | as_bad (_("expected symbol name")); | |
11679 | discard_rest_of_line (); | |
11680 | return; | |
11681 | } | |
11682 | ||
11683 | SKIP_WHITESPACE (); | |
11684 | ||
11685 | if (*input_line_pointer != ',') | |
11686 | { | |
11687 | *end_name = 0; | |
11688 | as_bad (_("expected comma after \"%s\""), name); | |
11689 | *end_name = delim; | |
11690 | ignore_rest_of_line (); | |
11691 | return; | |
11692 | } | |
11693 | ||
11694 | input_line_pointer++; | |
11695 | *end_name = 0; | |
20b36a95 | 11696 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11697 | |
11698 | /* We call demand_copy_C_string to check if alias string is valid. | |
11699 | There should be a closing `"' and no `\0' in the string. */ | |
11700 | alias = demand_copy_C_string (&len); | |
11701 | if (alias == NULL) | |
11702 | { | |
11703 | ignore_rest_of_line (); | |
11704 | return; | |
11705 | } | |
11706 | ||
11707 | /* Make a copy of name string. */ | |
11708 | len = strlen (name) + 1; | |
11709 | obstack_grow (¬es, name, len); | |
11710 | name = obstack_finish (¬es); | |
11711 | ||
11712 | if (section) | |
11713 | { | |
11714 | kind = "section"; | |
11715 | ahash = secalias_hash; | |
11716 | nhash = secalias_name_hash; | |
11717 | } | |
11718 | else | |
11719 | { | |
11720 | kind = "symbol"; | |
11721 | ahash = alias_hash; | |
11722 | nhash = alias_name_hash; | |
11723 | } | |
11724 | ||
11725 | /* Check if alias has been used before. */ | |
11726 | h = (struct alias *) hash_find (ahash, alias); | |
11727 | if (h) | |
11728 | { | |
11729 | if (strcmp (h->name, name)) | |
11730 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11731 | alias, kind, h->name); | |
11732 | goto out; | |
11733 | } | |
11734 | ||
11735 | /* Check if name already has an alias. */ | |
11736 | a = (const char *) hash_find (nhash, name); | |
11737 | if (a) | |
11738 | { | |
11739 | if (strcmp (a, alias)) | |
11740 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11741 | goto out; | |
11742 | } | |
11743 | ||
11744 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11745 | as_where (&h->file, &h->line); | |
11746 | h->name = name; | |
11747 | ||
11748 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11749 | if (error_string) | |
11750 | { | |
11751 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11752 | alias, kind, error_string); | |
11753 | goto out; | |
11754 | } | |
11755 | ||
11756 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11757 | if (error_string) | |
11758 | { | |
11759 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11760 | alias, kind, error_string); | |
11761 | out: | |
11762 | obstack_free (¬es, name); | |
11763 | obstack_free (¬es, alias); | |
11764 | } | |
11765 | ||
11766 | demand_empty_rest_of_line (); | |
11767 | } | |
11768 | ||
11769 | /* It renames the original symbol name to its alias. */ | |
11770 | static void | |
11771 | do_alias (const char *alias, PTR value) | |
11772 | { | |
11773 | struct alias *h = (struct alias *) value; | |
11774 | symbolS *sym = symbol_find (h->name); | |
11775 | ||
11776 | if (sym == NULL) | |
11777 | as_warn_where (h->file, h->line, | |
11778 | _("symbol `%s' aliased to `%s' is not used"), | |
11779 | h->name, alias); | |
11780 | else | |
11781 | S_SET_NAME (sym, (char *) alias); | |
11782 | } | |
11783 | ||
11784 | /* Called from write_object_file. */ | |
11785 | void | |
11786 | ia64_adjust_symtab (void) | |
11787 | { | |
11788 | hash_traverse (alias_hash, do_alias); | |
11789 | } | |
11790 | ||
11791 | /* It renames the original section name to its alias. */ | |
11792 | static void | |
11793 | do_secalias (const char *alias, PTR value) | |
11794 | { | |
11795 | struct alias *h = (struct alias *) value; | |
11796 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11797 | ||
11798 | if (sec == NULL) | |
11799 | as_warn_where (h->file, h->line, | |
11800 | _("section `%s' aliased to `%s' is not used"), | |
11801 | h->name, alias); | |
11802 | else | |
11803 | sec->name = alias; | |
11804 | } | |
11805 | ||
11806 | /* Called from write_object_file. */ | |
11807 | void | |
11808 | ia64_frob_file (void) | |
11809 | { | |
11810 | hash_traverse (secalias_hash, do_secalias); | |
11811 | } |