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2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
CommitLineData
800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
20ee54e8 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
800eeca4
JW		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
4b4da160
NC		 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
800eeca4
JW		 22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
5faa8e39
JW		 59
60/* Some systems define MIN in, e.g., param.h. */
61#undef MIN
800eeca4
JW		 62#define MIN(a,b) ((a) < (b) ? (a) : (b))
63
64#define NUM_SLOTS 4
65#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66#define CURR_SLOT md.slot[md.curr_slot]
67
68#define O_pseudo_fixup (O_max + 1)
69
70enum special_section
71 {
557debba 72 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 73 SPECIAL_SECTION_BSS = 0,
74 SPECIAL_SECTION_SBSS,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
557debba
JW		 79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 83 };
84
85enum reloc_func
86 {
13ae64f3
JJ		 87 FUNC_DTP_MODULE,
88 FUNC_DTP_RELATIVE,
800eeca4
JW		 89 FUNC_FPTR_RELATIVE,
90 FUNC_GP_RELATIVE,
91 FUNC_LT_RELATIVE,
fa2c7eff 92 FUNC_LT_RELATIVE_X,
c67e42c9 93 FUNC_PC_RELATIVE,
800eeca4
JW		 94 FUNC_PLT_RELATIVE,
95 FUNC_SEC_RELATIVE,
96 FUNC_SEG_RELATIVE,
13ae64f3 97 FUNC_TP_RELATIVE,
800eeca4
JW		 98 FUNC_LTV_RELATIVE,
99 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 100 FUNC_LT_DTP_MODULE,
101 FUNC_LT_DTP_RELATIVE,
102 FUNC_LT_TP_RELATIVE,
3969b680 103 FUNC_IPLT_RELOC,
800eeca4
JW		 104 };
105
106enum reg_symbol
107 {
108 REG_GR = 0,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
115 REG_CFM,
116 REG_PR,
117 REG_PR_ROT,
118 REG_PSR,
119 REG_PSR_L,
120 REG_PSR_UM,
121 /* The following are pseudo-registers for use by gas only. */
122 IND_CPUID,
123 IND_DBR,
124 IND_DTR,
125 IND_ITR,
126 IND_IBR,
800eeca4
JW		 127 IND_MSR,
128 IND_PKR,
129 IND_PMC,
130 IND_PMD,
131 IND_RR,
542d6675 132 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 133 REG_PSP,
134 REG_PRIUNAT,
800eeca4
JW		 135 REG_NUM
136 };
137
138enum dynreg_type
139 {
140 DYNREG_GR = 0, /* dynamic general purpose register */
141 DYNREG_FR, /* dynamic floating point register */
142 DYNREG_PR, /* dynamic predicate register */
143 DYNREG_NUM_TYPES
144 };
145
87f8eb97
JW		 146enum operand_match_result
147 {
148 OPERAND_MATCH,
149 OPERAND_OUT_OF_RANGE,
150 OPERAND_MISMATCH
151 };
152
800eeca4
JW		 153/* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
156 instruction. */
157struct label_fix
542d6675
KH		 158{
159 struct label_fix *next;
160 struct symbol *sym;
07a53e5c 161 bfd_boolean dw2_mark_labels;
542d6675 162};
800eeca4 163
549f748d 164/* This is the endianness of the current section. */
800eeca4
JW		 165extern int target_big_endian;
166
549f748d
JW		 167/* This is the default endianness. */
168static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
169
10a98291
L		 170void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
171
172static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE *, int));
174static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE *, int));
176static void (*ia64_float_to_chars)
177 PARAMS ((char *, LITTLENUM_TYPE *, int));
178
35f5df7f
L		 179static struct hash_control *alias_hash;
180static struct hash_control *alias_name_hash;
181static struct hash_control *secalias_hash;
182static struct hash_control *secalias_name_hash;
183
2fac3d48
JB		 184/* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186const char ia64_symbol_chars[] = "@?";
187
800eeca4
JW		 188/* Characters which always start a comment. */
189const char comment_chars[] = "";
190
191/* Characters which start a comment at the beginning of a line. */
192const char line_comment_chars[] = "#";
193
194/* Characters which may be used to separate multiple commands on a
195 single line. */
e4e8248d 196const char line_separator_chars[] = ";{}";
800eeca4
JW		 197
198/* Characters which are used to indicate an exponent in a floating
199 point number. */
200const char EXP_CHARS[] = "eE";
201
202/* Characters which mean that a number is a floating point constant,
203 as in 0d1.0. */
204const char FLT_CHARS[] = "rRsSfFdDxXpP";
205
542d6675 206/* ia64-specific option processing: */
800eeca4 207
44f5c83a 208const char *md_shortopts = "m:N:x::";
800eeca4
JW		 209
210struct option md_longopts[] =
211 {
c43c2cc5
JW		 212#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
214#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 216 };
217
218size_t md_longopts_size = sizeof (md_longopts);
219
220static struct
221 {
222 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
223 struct hash_control *reg_hash; /* register name hash table */
224 struct hash_control *dynreg_hash; /* dynamic register hash table */
225 struct hash_control *const_hash; /* constant hash table */
226 struct hash_control *entry_hash; /* code entry hint hash table */
227
800eeca4
JW		 228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
ad4b42b4 230 that are predictable. */
800eeca4
JW		 231 expressionS qp;
232
8c2fda1d
L		 233 /* Optimize for which CPU. */
234 enum
235 {
236 itanium1,
237 itanium2
238 } tune;
239
91d777ee
L		 240 /* What to do when hint.b is used. */
241 enum
242 {
243 hint_b_error,
244 hint_b_warning,
245 hint_b_ok
246 } hint_b;
247
800eeca4 248 unsigned int
197865e8 249 manual_bundling : 1,
800eeca4
JW		 250 debug_dv: 1,
251 detect_dv: 1,
252 explicit_mode : 1, /* which mode we're in */
253 default_explicit_mode : 1, /* which mode is the default */
254 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 255 auto_align : 1,
256 keep_pending_output : 1;
800eeca4 257
970d6792
L		 258 /* What to do when something is wrong with unwind directives. */
259 enum
260 {
261 unwind_check_warning,
262 unwind_check_error
263 } unwind_check;
264
800eeca4
JW		 265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
197865e8 267 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 268 int curr_slot;
269 int num_slots_in_use;
270 struct slot
271 {
272 unsigned int
273 end_of_insn_group : 1,
274 manual_bundling_on : 1,
196e8040
JW		 275 manual_bundling_off : 1,
276 loc_directive_seen : 1;
800eeca4
JW		 277 signed char user_template; /* user-selected template, if any */
278 unsigned char qp_regno; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
282 int num_fixups;
283 struct insn_fix
284 {
285 bfd_reloc_code_real_type code;
286 enum ia64_opnd opnd; /* type of operand in need of fix */
287 unsigned int is_pcrel : 1; /* is operand pc-relative? */
288 expressionS expr; /* the value to be inserted */
289 }
290 fixup[2]; /* at most two fixups per insn */
291 struct ia64_opcode *idesc;
292 struct label_fix *label_fixups;
f1bcba5b 293 struct label_fix *tag_fixups;
800eeca4
JW		 294 struct unw_rec_list *unwind_record; /* Unwind directive. */
295 expressionS opnd[6];
296 char *src_file;
297 unsigned int src_line;
298 struct dwarf2_line_info debug_line;
299 }
300 slot[NUM_SLOTS];
301
302 segT last_text_seg;
303
304 struct dynreg
305 {
306 struct dynreg *next; /* next dynamic register */
307 const char *name;
308 unsigned short base; /* the base register number */
309 unsigned short num_regs; /* # of registers in this set */
310 }
311 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
312
313 flagword flags; /* ELF-header flags */
314
315 struct mem_offset {
316 unsigned hint:1; /* is this hint currently valid? */
317 bfd_vma offset; /* mem.offset offset */
318 bfd_vma base; /* mem.offset base */
319 } mem_offset;
320
321 int path; /* number of alt. entry points seen */
322 const char **entry_labels; /* labels of all alternate paths in
542d6675 323 the current DV-checking block. */
800eeca4 324 int maxpaths; /* size currently allocated for
542d6675 325 entry_labels */
557debba
JW		 326
327 int pointer_size; /* size in bytes of a pointer */
328 int pointer_size_shift; /* shift size of a pointer for alignment */
8b84be9d
JB		 329
330 symbolS *indregsym[IND_RR - IND_CPUID + 1];
800eeca4
JW		 331 }
332md;
333
f6fe78d6
JW		 334/* These are not const, because they are modified to MMI for non-itanium1
335 targets below. */
336/* MFI bundle of nops. */
337static unsigned char le_nop[16] =
338{
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
341};
342/* MFI bundle of nops with stop-bit. */
343static unsigned char le_nop_stop[16] =
344{
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
347};
348
542d6675 349/* application registers: */
800eeca4 350
e0c9811a
JW		 351#define AR_K0 0
352#define AR_K7 7
353#define AR_RSC 16
354#define AR_BSP 17
355#define AR_BSPSTORE 18
356#define AR_RNAT 19
d8ca90b5
JB		 357#define AR_FCR 21
358#define AR_EFLAG 24
359#define AR_CSD 25
360#define AR_SSD 26
361#define AR_CFLG 27
362#define AR_FSR 28
363#define AR_FIR 29
364#define AR_FDR 30
365#define AR_CCV 32
e0c9811a
JW		 366#define AR_UNAT 36
367#define AR_FPSR 40
368#define AR_ITC 44
4f8631b1 369#define AR_RUC 45
e0c9811a
JW		 370#define AR_PFS 64
371#define AR_LC 65
d8ca90b5 372#define AR_EC 66
800eeca4
JW		 373
374static const struct
375 {
376 const char *name;
8b84be9d 377 unsigned int regnum;
800eeca4
JW		 378 }
379ar[] =
380 {
d8ca90b5
JB		 381 {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1},
382 {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3},
383 {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5},
384 {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7},
385 {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP},
386 {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT},
387 {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG},
388 {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD},
389 {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR},
390 {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR},
391 {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT},
392 {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC},
4f8631b1
L		 393 {"ar.ruc", AR_RUC}, {"ar.pfs", AR_PFS},
394 {"ar.lc", AR_LC}, {"ar.ec", AR_EC},
800eeca4
JW		 395 };
396
d8ca90b5
JB		 397/* control registers: */
398
399#define CR_DCR 0
400#define CR_ITM 1
401#define CR_IVA 2
402#define CR_PTA 8
403#define CR_GPTA 9
800eeca4
JW		 404#define CR_IPSR 16
405#define CR_ISR 17
406#define CR_IIP 19
407#define CR_IFA 20
408#define CR_ITIR 21
409#define CR_IIPA 22
410#define CR_IFS 23
411#define CR_IIM 24
412#define CR_IHA 25
d8ca90b5 413#define CR_LID 64
800eeca4
JW		 414#define CR_IVR 65
415#define CR_TPR 66
416#define CR_EOI 67
417#define CR_IRR0 68
418#define CR_IRR3 71
d8ca90b5
JB		 419#define CR_ITV 72
420#define CR_PMV 73
421#define CR_CMCV 74
800eeca4
JW		 422#define CR_LRR0 80
423#define CR_LRR1 81
424
800eeca4
JW		 425static const struct
426 {
427 const char *name;
8b84be9d 428 unsigned int regnum;
800eeca4
JW		 429 }
430cr[] =
431 {
d8ca90b5
JB		 432 {"cr.dcr", CR_DCR},
433 {"cr.itm", CR_ITM},
434 {"cr.iva", CR_IVA},
435 {"cr.pta", CR_PTA},
436 {"cr.gpta", CR_GPTA},
437 {"cr.ipsr", CR_IPSR},
438 {"cr.isr", CR_ISR},
439 {"cr.iip", CR_IIP},
440 {"cr.ifa", CR_IFA},
441 {"cr.itir", CR_ITIR},
442 {"cr.iipa", CR_IIPA},
443 {"cr.ifs", CR_IFS},
444 {"cr.iim", CR_IIM},
445 {"cr.iha", CR_IHA},
446 {"cr.lid", CR_LID},
447 {"cr.ivr", CR_IVR},
448 {"cr.tpr", CR_TPR},
449 {"cr.eoi", CR_EOI},
450 {"cr.irr0", CR_IRR0},
451 {"cr.irr1", CR_IRR0 + 1},
452 {"cr.irr2", CR_IRR0 + 2},
453 {"cr.irr3", CR_IRR3},
454 {"cr.itv", CR_ITV},
455 {"cr.pmv", CR_PMV},
456 {"cr.cmcv", CR_CMCV},
457 {"cr.lrr0", CR_LRR0},
458 {"cr.lrr1", CR_LRR1}
800eeca4
JW		 459 };
460
461#define PSR_MFL 4
462#define PSR_IC 13
463#define PSR_DFL 18
464#define PSR_CPL 32
465
466static const struct const_desc
467 {
468 const char *name;
469 valueT value;
470 }
471const_bits[] =
472 {
542d6675 473 /* PSR constant masks: */
800eeca4
JW		 474
475 /* 0: reserved */
476 {"psr.be", ((valueT) 1) << 1},
477 {"psr.up", ((valueT) 1) << 2},
478 {"psr.ac", ((valueT) 1) << 3},
479 {"psr.mfl", ((valueT) 1) << 4},
480 {"psr.mfh", ((valueT) 1) << 5},
481 /* 6-12: reserved */
482 {"psr.ic", ((valueT) 1) << 13},
483 {"psr.i", ((valueT) 1) << 14},
484 {"psr.pk", ((valueT) 1) << 15},
485 /* 16: reserved */
486 {"psr.dt", ((valueT) 1) << 17},
487 {"psr.dfl", ((valueT) 1) << 18},
488 {"psr.dfh", ((valueT) 1) << 19},
489 {"psr.sp", ((valueT) 1) << 20},
490 {"psr.pp", ((valueT) 1) << 21},
491 {"psr.di", ((valueT) 1) << 22},
492 {"psr.si", ((valueT) 1) << 23},
493 {"psr.db", ((valueT) 1) << 24},
494 {"psr.lp", ((valueT) 1) << 25},
495 {"psr.tb", ((valueT) 1) << 26},
496 {"psr.rt", ((valueT) 1) << 27},
497 /* 28-31: reserved */
498 /* 32-33: cpl (current privilege level) */
499 {"psr.is", ((valueT) 1) << 34},
500 {"psr.mc", ((valueT) 1) << 35},
501 {"psr.it", ((valueT) 1) << 36},
502 {"psr.id", ((valueT) 1) << 37},
503 {"psr.da", ((valueT) 1) << 38},
504 {"psr.dd", ((valueT) 1) << 39},
505 {"psr.ss", ((valueT) 1) << 40},
506 /* 41-42: ri (restart instruction) */
507 {"psr.ed", ((valueT) 1) << 43},
508 {"psr.bn", ((valueT) 1) << 44},
509 };
510
542d6675 511/* indirect register-sets/memory: */
800eeca4
JW		 512
513static const struct
514 {
515 const char *name;
8b84be9d 516 unsigned int regnum;
800eeca4
JW		 517 }
518indirect_reg[] =
519 {
520 { "CPUID", IND_CPUID },
521 { "cpuid", IND_CPUID },
522 { "dbr", IND_DBR },
523 { "dtr", IND_DTR },
524 { "itr", IND_ITR },
525 { "ibr", IND_IBR },
526 { "msr", IND_MSR },
527 { "pkr", IND_PKR },
528 { "pmc", IND_PMC },
529 { "pmd", IND_PMD },
530 { "rr", IND_RR },
531 };
532
533/* Pseudo functions used to indicate relocation types (these functions
534 start with an at sign (@). */
535static struct
536 {
537 const char *name;
538 enum pseudo_type
539 {
540 PSEUDO_FUNC_NONE,
541 PSEUDO_FUNC_RELOC,
542 PSEUDO_FUNC_CONST,
e0c9811a 543 PSEUDO_FUNC_REG,
800eeca4
JW		 544 PSEUDO_FUNC_FLOAT
545 }
546 type;
547 union
548 {
549 unsigned long ival;
550 symbolS *sym;
551 }
552 u;
553 }
554pseudo_func[] =
555 {
542d6675 556 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 557 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
558 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 559 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
560 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
561 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 562 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 563 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
564 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
565 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
566 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 567 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 568 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 569 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
570 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
571 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
572 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 573 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 574
542d6675 575 /* mbtype4 constants: */
800eeca4
JW		 576 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
577 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
578 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
579 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
580 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
581
542d6675 582 /* fclass constants: */
bf3ca999 583 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 584 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
585 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
586 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
587 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
588 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
589 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
590 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
591 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 592
593 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 594
c10d9d8f
JW		 595 /* hint constants: */
596 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
597
542d6675 598 /* unwind-related constants: */
041340ad
JW		 599 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
600 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
601 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
602 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
603 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
604 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
605 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 606
542d6675 607 /* unwind-related registers: */
e0c9811a 608 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 609 };
610
542d6675 611/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 612static const bfd_vma nop[IA64_NUM_UNITS] =
613 {
614 0x0000000000LL, /* NIL => break 0 */
615 0x0008000000LL, /* I-unit nop */
616 0x0008000000LL, /* M-unit nop */
617 0x4000000000LL, /* B-unit nop */
618 0x0008000000LL, /* F-unit nop */
5d5e6db9 619 0x0000000000LL, /* L-"unit" nop immediate */
800eeca4
JW		 620 0x0008000000LL, /* X-unit nop */
621 };
622
623/* Can't be `const' as it's passed to input routines (which have the
624 habit of setting temporary sentinels. */
625static char special_section_name[][20] =
626 {
627 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 628 {".IA_64.unwind"}, {".IA_64.unwind_info"},
629 {".init_array"}, {".fini_array"}
800eeca4
JW		 630 };
631
632/* The best template for a particular sequence of up to three
633 instructions: */
634#define N IA64_NUM_TYPES
635static unsigned char best_template[N][N][N];
636#undef N
637
638/* Resource dependencies currently in effect */
639static struct rsrc {
640 int depind; /* dependency index */
641 const struct ia64_dependency *dependency; /* actual dependency */
642 unsigned specific:1, /* is this a specific bit/regno? */
643 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
644 int index; /* specific regno/bit within dependency */
645 int note; /* optional qualifying note (0 if none) */
646#define STATE_NONE 0
647#define STATE_STOP 1
648#define STATE_SRLZ 2
649 int insn_srlz; /* current insn serialization state */
650 int data_srlz; /* current data serialization state */
651 int qp_regno; /* qualifying predicate for this usage */
652 char *file; /* what file marked this dependency */
2434f565 653 unsigned int line; /* what line marked this dependency */
800eeca4 654 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 655 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 656 int path; /* corresponding code entry index */
657} *regdeps = NULL;
658static int regdepslen = 0;
659static int regdepstotlen = 0;
660static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
661static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 662 "data", "instr", "specific", "stop", "other" };
7484b8e6 663static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 664
665/* Current state of PR mutexation */
666static struct qpmutex {
667 valueT prmask;
668 int path;
669} *qp_mutexes = NULL; /* QP mutex bitmasks */
670static int qp_mutexeslen = 0;
671static int qp_mutexestotlen = 0;
197865e8 672static valueT qp_safe_across_calls = 0;
800eeca4
JW		 673
674/* Current state of PR implications */
675static struct qp_imply {
676 unsigned p1:6;
677 unsigned p2:6;
678 unsigned p2_branched:1;
679 int path;
680} *qp_implies = NULL;
681static int qp_implieslen = 0;
682static int qp_impliestotlen = 0;
683
197865e8
KH		 684/* Keep track of static GR values so that indirect register usage can
685 sometimes be tracked. */
800eeca4
JW		 686static struct gr {
687 unsigned known:1;
688 int path;
689 valueT value;
a66d2bb7
JB		 690} gr_values[128] = {
691 {
692 1,
693#ifdef INT_MAX
694 INT_MAX,
695#else
696 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
697#endif
698 0
699 }
700};
800eeca4 701
9545c4ce
L		 702/* Remember the alignment frag. */
703static fragS *align_frag;
704
800eeca4
JW		 705/* These are the routines required to output the various types of
706 unwind records. */
707
f5a30c2e
JW		 708/* A slot_number is a frag address plus the slot index (0-2). We use the
709 frag address here so that if there is a section switch in the middle of
710 a function, then instructions emitted to a different section are not
711 counted. Since there may be more than one frag for a function, this
712 means we also need to keep track of which frag this address belongs to
713 so we can compute inter-frag distances. This also nicely solves the
714 problem with nops emitted for align directives, which can't easily be
715 counted, but can easily be derived from frag sizes. */
716
800eeca4
JW		 717typedef struct unw_rec_list {
718 unwind_record r;
e0c9811a 719 unsigned long slot_number;
f5a30c2e 720 fragS *slot_frag;
800eeca4
JW		 721 struct unw_rec_list *next;
722} unw_rec_list;
723
2434f565 724#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 725
6290819d
NC		 726/* Linked list of saved prologue counts. A very poor
727 implementation of a map from label numbers to prologue counts. */
728typedef struct label_prologue_count
729{
730 struct label_prologue_count *next;
731 unsigned long label_number;
732 unsigned int prologue_count;
733} label_prologue_count;
734
5656b6b8
JB		 735typedef struct proc_pending
736{
737 symbolS *sym;
738 struct proc_pending *next;
739} proc_pending;
740
e0c9811a
JW		 741static struct
742{
e0c9811a
JW		 743 /* Maintain a list of unwind entries for the current function. */
744 unw_rec_list *list;
745 unw_rec_list *tail;
800eeca4 746
ad4b42b4 747 /* Any unwind entries that should be attached to the current slot
e0c9811a
JW		 748 that an insn is being constructed for. */
749 unw_rec_list *current_entry;
800eeca4 750
e0c9811a 751 /* These are used to create the unwind table entry for this function. */
5656b6b8 752 proc_pending proc_pending;
e0c9811a
JW		 753 symbolS *info; /* pointer to unwind info */
754 symbolS *personality_routine;
91a2ae2a
RH		 755 segT saved_text_seg;
756 subsegT saved_text_subseg;
757 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 758
e0c9811a 759 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 760 unsigned int prologue : 1;
761 unsigned int prologue_mask : 4;
e4e8248d 762 unsigned int prologue_gr : 7;
75e09913
JB		 763 unsigned int body : 1;
764 unsigned int insn : 1;
33d01f33 765 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 766 /* Prologue counts at previous .label_state directives. */
767 struct label_prologue_count * saved_prologue_counts;
ba825241
JB		 768
769 /* List of split up .save-s. */
770 unw_p_record *pending_saves;
e0c9811a 771} unwind;
800eeca4 772
9f9a069e
JW		 773/* The input value is a negated offset from psp, and specifies an address
774 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
775 must add 16 and divide by 4 to get the encoded value. */
776
777#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
778
800eeca4
JW		 779typedef void (*vbyte_func) PARAMS ((int, char *, char *));
780
0234cb7c 781/* Forward declarations: */
800eeca4
JW		 782static void set_section PARAMS ((char *name));
783static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
784 unsigned int, unsigned int));
d9201763 785static void dot_align (int);
800eeca4
JW		 786static void dot_radix PARAMS ((int));
787static void dot_special_section PARAMS ((int));
788static void dot_proc PARAMS ((int));
789static void dot_fframe PARAMS ((int));
790static void dot_vframe PARAMS ((int));
150f24a2 791static void dot_vframesp PARAMS ((int));
800eeca4
JW		 792static void dot_save PARAMS ((int));
793static void dot_restore PARAMS ((int));
150f24a2 794static void dot_restorereg PARAMS ((int));
800eeca4
JW		 795static void dot_handlerdata PARAMS ((int));
796static void dot_unwentry PARAMS ((int));
797static void dot_altrp PARAMS ((int));
e0c9811a 798static void dot_savemem PARAMS ((int));
800eeca4
JW		 799static void dot_saveg PARAMS ((int));
800static void dot_savef PARAMS ((int));
801static void dot_saveb PARAMS ((int));
802static void dot_savegf PARAMS ((int));
803static void dot_spill PARAMS ((int));
150f24a2
JW		 804static void dot_spillreg PARAMS ((int));
805static void dot_spillmem PARAMS ((int));
150f24a2
JW		 806static void dot_label_state PARAMS ((int));
807static void dot_copy_state PARAMS ((int));
800eeca4
JW		 808static void dot_unwabi PARAMS ((int));
809static void dot_personality PARAMS ((int));
810static void dot_body PARAMS ((int));
811static void dot_prologue PARAMS ((int));
812static void dot_endp PARAMS ((int));
813static void dot_template PARAMS ((int));
814static void dot_regstk PARAMS ((int));
815static void dot_rot PARAMS ((int));
816static void dot_byteorder PARAMS ((int));
817static void dot_psr PARAMS ((int));
818static void dot_alias PARAMS ((int));
819static void dot_ln PARAMS ((int));
ef6a2b41 820static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 821static void dot_xdata PARAMS ((int));
822static void stmt_float_cons PARAMS ((int));
823static void stmt_cons_ua PARAMS ((int));
824static void dot_xfloat_cons PARAMS ((int));
825static void dot_xstringer PARAMS ((int));
826static void dot_xdata_ua PARAMS ((int));
827static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 828static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 829static void dot_pred_rel PARAMS ((int));
830static void dot_reg_val PARAMS ((int));
5e819f9c 831static void dot_serialize PARAMS ((int));
800eeca4
JW		 832static void dot_dv_mode PARAMS ((int));
833static void dot_entry PARAMS ((int));
834static void dot_mem_offset PARAMS ((int));
e4e8248d 835static void add_unwind_entry PARAMS((unw_rec_list *, int));
8b84be9d
JB		 836static symbolS *declare_register PARAMS ((const char *name, unsigned int regnum));
837static void declare_register_set PARAMS ((const char *, unsigned int, unsigned int));
800eeca4 838static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 839static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
840 int index,
841 expressionS *e));
e4e8248d 842static int parse_operand PARAMS ((expressionS *, int));
800eeca4
JW		 843static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
844static void build_insn PARAMS ((struct slot *, bfd_vma *));
845static void emit_one_bundle PARAMS ((void));
846static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 847static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 848 bfd_reloc_code_real_type r_type));
849static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 850static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
851 struct rsrc *, int depind, int path));
800eeca4
JW		 852static void add_qp_mutex PARAMS((valueT mask));
853static void add_qp_imply PARAMS((int p1, int p2));
854static void clear_qp_branch_flag PARAMS((valueT mask));
855static void clear_qp_mutex PARAMS((valueT mask));
856static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 857static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 858static void clear_register_values PARAMS ((void));
859static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 860static void instruction_serialization PARAMS ((void));
861static void data_serialization PARAMS ((void));
862static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 863static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 864static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 865static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 866static int depends_on PARAMS ((int, struct ia64_opcode *));
867static int specify_resource PARAMS ((const struct ia64_dependency *,
868 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 869static int check_dv PARAMS((struct ia64_opcode *idesc));
870static void check_dependencies PARAMS((struct ia64_opcode *));
871static void mark_resources PARAMS((struct ia64_opcode *));
872static void update_dependencies PARAMS((struct ia64_opcode *));
873static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 874static int qp_mutex PARAMS ((int, int, int));
875static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
876static void output_vbyte_mem PARAMS ((int, char *, char *));
877static void count_output PARAMS ((int, char *, char *));
878static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
879static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 880static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 881static void output_P1_format PARAMS ((vbyte_func, int));
882static void output_P2_format PARAMS ((vbyte_func, int, int));
883static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
884static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
885static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
886static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
887static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
888static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
889static void output_P9_format PARAMS ((vbyte_func, int, int));
890static void output_P10_format PARAMS ((vbyte_func, int, int));
891static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
892static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 893static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
894static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 895static char format_ab_reg PARAMS ((int, int));
896static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
897 unsigned long));
898static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
899static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
900 unsigned long));
901static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 902static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 903static unw_rec_list *output_prologue PARAMS ((void));
904static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
905static unw_rec_list *output_body PARAMS ((void));
906static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
907static unw_rec_list *output_mem_stack_v PARAMS ((void));
908static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
909static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
910static unw_rec_list *output_rp_when PARAMS ((void));
911static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
912static unw_rec_list *output_rp_br PARAMS ((unsigned int));
913static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
914static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
915static unw_rec_list *output_pfs_when PARAMS ((void));
916static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
917static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
918static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
919static unw_rec_list *output_preds_when PARAMS ((void));
920static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
921static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
922static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
923static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
924static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
925static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
926static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
927static unw_rec_list *output_br_mem PARAMS ((unsigned int));
928static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
929static unw_rec_list *output_spill_base PARAMS ((unsigned int));
930static unw_rec_list *output_unat_when PARAMS ((void));
931static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
932static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
933static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
934static unw_rec_list *output_lc_when PARAMS ((void));
935static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
936static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
937static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
938static unw_rec_list *output_fpsr_when PARAMS ((void));
939static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
940static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
941static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
942static unw_rec_list *output_priunat_when_gr PARAMS ((void));
943static unw_rec_list *output_priunat_when_mem PARAMS ((void));
944static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
945static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
946static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
947static unw_rec_list *output_bsp_when PARAMS ((void));
948static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
949static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
950static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
951static unw_rec_list *output_bspstore_when PARAMS ((void));
952static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
953static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
954static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
955static unw_rec_list *output_rnat_when PARAMS ((void));
956static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
957static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
958static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
959static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
960static unw_rec_list *output_epilogue PARAMS ((unsigned long));
961static unw_rec_list *output_label_state PARAMS ((unsigned long));
962static unw_rec_list *output_copy_state PARAMS ((unsigned long));
e4e8248d 963static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2 964 unsigned int));
e4e8248d 965static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 966 unsigned int));
967static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 968 unsigned int, unsigned int));
969static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
970static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
971static int calc_record_size PARAMS ((unw_rec_list *));
972static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 973static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 974 unsigned long, fragS *,
975 int));
91a2ae2a 976static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 977static void fixup_unw_records PARAMS ((unw_rec_list *, int));
e4e8248d
JB		 978static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *));
979static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
980static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
6290819d
NC		 981static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
982static void save_prologue_count PARAMS ((unsigned long, unsigned int));
983static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 984
652ca075 985/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 986 unit (as opposed to the memory unit). */
987static int
652ca075 988ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 989{
990 reg -= REG_AR;
652ca075
L		 991 return reg >= 64 && reg <= 111;
992}
800eeca4 993
652ca075
L		 994/* Determine if application register REGNUM resides only in the memory
995 unit (as opposed to the integer unit). */
996static int
997ar_is_only_in_memory_unit (int reg)
998{
999 reg -= REG_AR;
1000 return reg >= 0 && reg <= 47;
800eeca4
JW		 1001}
1002
1003/* Switch to section NAME and create section if necessary. It's
1004 rather ugly that we have to manipulate input_line_pointer but I
1005 don't see any other way to accomplish the same thing without
1006 changing obj-elf.c (which may be the Right Thing, in the end). */
1007static void
1008set_section (name)
1009 char *name;
1010{
1011 char *saved_input_line_pointer;
1012
1013 saved_input_line_pointer = input_line_pointer;
1014 input_line_pointer = name;
1015 obj_elf_section (0);
1016 input_line_pointer = saved_input_line_pointer;
1017}
1018
d61a78a7
RH		 1019/* Map 's' to SHF_IA_64_SHORT. */
1020
1021int
1022ia64_elf_section_letter (letter, ptr_msg)
1023 int letter;
1024 char **ptr_msg;
1025{
1026 if (letter == 's')
1027 return SHF_IA_64_SHORT;
711ef82f
L		 1028 else if (letter == 'o')
1029 return SHF_LINK_ORDER;
d61a78a7 1030
711ef82f
L		 1031 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1032 return -1;
d61a78a7
RH		 1033}
1034
800eeca4
JW		 1035/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1036
1037flagword
1038ia64_elf_section_flags (flags, attr, type)
1039 flagword flags;
2434f565 1040 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 1041{
1042 if (attr & SHF_IA_64_SHORT)
1043 flags |= SEC_SMALL_DATA;
1044 return flags;
1045}
1046
91a2ae2a
RH		 1047int
1048ia64_elf_section_type (str, len)
40449e9f
KH		 1049 const char *str;
1050 size_t len;
91a2ae2a 1051{
1cd8ff38 1052#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1053
1cd8ff38 1054 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1055 return SHT_PROGBITS;
1056
1cd8ff38 1057 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1058 return SHT_PROGBITS;
1059
1cd8ff38 1060 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1061 return SHT_IA_64_UNWIND;
1062
1cd8ff38 1063 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1064 return SHT_IA_64_UNWIND;
1065
711ef82f
L		 1066 if (STREQ ("unwind"))
1067 return SHT_IA_64_UNWIND;
1068
91a2ae2a 1069 return -1;
1cd8ff38 1070#undef STREQ
91a2ae2a
RH		 1071}
1072
800eeca4
JW		 1073static unsigned int
1074set_regstack (ins, locs, outs, rots)
1075 unsigned int ins, locs, outs, rots;
1076{
542d6675
KH		 1077 /* Size of frame. */
1078 unsigned int sof;
800eeca4
JW		 1079
1080 sof = ins + locs + outs;
1081 if (sof > 96)
1082 {
ad4b42b4 1083 as_bad (_("Size of frame exceeds maximum of 96 registers"));
800eeca4
JW		 1084 return 0;
1085 }
1086 if (rots > sof)
1087 {
ad4b42b4 1088 as_warn (_("Size of rotating registers exceeds frame size"));
800eeca4
JW		 1089 return 0;
1090 }
1091 md.in.base = REG_GR + 32;
1092 md.loc.base = md.in.base + ins;
1093 md.out.base = md.loc.base + locs;
1094
1095 md.in.num_regs = ins;
1096 md.loc.num_regs = locs;
1097 md.out.num_regs = outs;
1098 md.rot.num_regs = rots;
1099 return sof;
1100}
1101
1102void
1103ia64_flush_insns ()
1104{
1105 struct label_fix *lfix;
1106 segT saved_seg;
1107 subsegT saved_subseg;
b44b1b85 1108 unw_rec_list *ptr;
07a53e5c 1109 bfd_boolean mark;
800eeca4
JW		 1110
1111 if (!md.last_text_seg)
1112 return;
1113
1114 saved_seg = now_seg;
1115 saved_subseg = now_subseg;
1116
1117 subseg_set (md.last_text_seg, 0);
1118
1119 while (md.num_slots_in_use > 0)
1120 emit_one_bundle (); /* force out queued instructions */
1121
1122 /* In case there are labels following the last instruction, resolve
07a53e5c
RH		 1123 those now. */
1124 mark = FALSE;
800eeca4
JW		 1125 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1126 {
07a53e5c
RH		 1127 symbol_set_value_now (lfix->sym);
1128 mark |= lfix->dw2_mark_labels;
800eeca4 1129 }
07a53e5c 1130 if (mark)
f1bcba5b 1131 {
07a53e5c
RH		 1132 dwarf2_where (&CURR_SLOT.debug_line);
1133 CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
1134 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line);
661ba50f 1135 dwarf2_consume_line_info ();
f1bcba5b 1136 }
07a53e5c
RH		 1137 CURR_SLOT.label_fixups = 0;
1138
1139 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1140 symbol_set_value_now (lfix->sym);
f1bcba5b 1141 CURR_SLOT.tag_fixups = 0;
800eeca4 1142
b44b1b85 1143 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1144 resolve those now. We only handle prologue, body, and endp directives
1145 here. Give an error for others. */
b44b1b85
JW		 1146 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1147 {
9c59842f 1148 switch (ptr->r.type)
b44b1b85 1149 {
9c59842f
JW		 1150 case prologue:
1151 case prologue_gr:
1152 case body:
1153 case endp:
b44b1b85
JW		 1154 ptr->slot_number = (unsigned long) frag_more (0);
1155 ptr->slot_frag = frag_now;
9c59842f
JW		 1156 break;
1157
1158 /* Allow any record which doesn't have a "t" field (i.e.,
1159 doesn't relate to a particular instruction). */
1160 case unwabi:
1161 case br_gr:
1162 case copy_state:
1163 case fr_mem:
1164 case frgr_mem:
1165 case gr_gr:
1166 case gr_mem:
1167 case label_state:
1168 case rp_br:
1169 case spill_base:
1170 case spill_mask:
1171 /* nothing */
1172 break;
1173
1174 default:
1175 as_bad (_("Unwind directive not followed by an instruction."));
1176 break;
b44b1b85 1177 }
b44b1b85
JW		 1178 }
1179 unwind.current_entry = NULL;
1180
800eeca4 1181 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1182
1183 if (md.qp.X_op == O_register)
ad4b42b4 1184 as_bad (_("qualifying predicate not followed by instruction"));
800eeca4
JW		 1185}
1186
d9201763
L		 1187static void
1188ia64_do_align (int nbytes)
800eeca4
JW		 1189{
1190 char *saved_input_line_pointer = input_line_pointer;
1191
1192 input_line_pointer = "";
1193 s_align_bytes (nbytes);
1194 input_line_pointer = saved_input_line_pointer;
1195}
1196
1197void
1198ia64_cons_align (nbytes)
1199 int nbytes;
1200{
1201 if (md.auto_align)
1202 {
1203 char *saved_input_line_pointer = input_line_pointer;
1204 input_line_pointer = "";
1205 s_align_bytes (nbytes);
1206 input_line_pointer = saved_input_line_pointer;
1207 }
1208}
1209
1210/* Output COUNT bytes to a memory location. */
2132e3a3 1211static char *vbyte_mem_ptr = NULL;
800eeca4 1212
197865e8 1213void
800eeca4
JW		 1214output_vbyte_mem (count, ptr, comment)
1215 int count;
1216 char *ptr;
2434f565 1217 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1218{
1219 int x;
1220 if (vbyte_mem_ptr == NULL)
1221 abort ();
1222
1223 if (count == 0)
1224 return;
1225 for (x = 0; x < count; x++)
1226 *(vbyte_mem_ptr++) = ptr[x];
1227}
1228
1229/* Count the number of bytes required for records. */
1230static int vbyte_count = 0;
197865e8 1231void
800eeca4
JW		 1232count_output (count, ptr, comment)
1233 int count;
2434f565
JW		 1234 char *ptr ATTRIBUTE_UNUSED;
1235 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1236{
1237 vbyte_count += count;
1238}
1239
1240static void
1241output_R1_format (f, rtype, rlen)
1242 vbyte_func f;
1243 unw_record_type rtype;
1244 int rlen;
1245{
e0c9811a 1246 int r = 0;
800eeca4
JW		 1247 char byte;
1248 if (rlen > 0x1f)
1249 {
1250 output_R3_format (f, rtype, rlen);
1251 return;
1252 }
197865e8 1253
e0c9811a
JW		 1254 if (rtype == body)
1255 r = 1;
1256 else if (rtype != prologue)
ad4b42b4 1257 as_bad (_("record type is not valid"));
e0c9811a 1258
800eeca4
JW		 1259 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1260 (*f) (1, &byte, NULL);
1261}
1262
1263static void
1264output_R2_format (f, mask, grsave, rlen)
1265 vbyte_func f;
1266 int mask, grsave;
1267 unsigned long rlen;
1268{
1269 char bytes[20];
1270 int count = 2;
1271 mask = (mask & 0x0f);
1272 grsave = (grsave & 0x7f);
1273
1274 bytes[0] = (UNW_R2 | (mask >> 1));
1275 bytes[1] = (((mask & 0x01) << 7) | grsave);
1276 count += output_leb128 (bytes + 2, rlen, 0);
1277 (*f) (count, bytes, NULL);
1278}
1279
1280static void
1281output_R3_format (f, rtype, rlen)
1282 vbyte_func f;
1283 unw_record_type rtype;
1284 unsigned long rlen;
1285{
e0c9811a 1286 int r = 0, count;
800eeca4
JW		 1287 char bytes[20];
1288 if (rlen <= 0x1f)
1289 {
1290 output_R1_format (f, rtype, rlen);
1291 return;
1292 }
197865e8 1293
e0c9811a
JW		 1294 if (rtype == body)
1295 r = 1;
1296 else if (rtype != prologue)
ad4b42b4 1297 as_bad (_("record type is not valid"));
800eeca4
JW		 1298 bytes[0] = (UNW_R3 | r);
1299 count = output_leb128 (bytes + 1, rlen, 0);
1300 (*f) (count + 1, bytes, NULL);
1301}
1302
1303static void
1304output_P1_format (f, brmask)
1305 vbyte_func f;
1306 int brmask;
1307{
1308 char byte;
1309 byte = UNW_P1 | (brmask & 0x1f);
1310 (*f) (1, &byte, NULL);
1311}
1312
1313static void
1314output_P2_format (f, brmask, gr)
1315 vbyte_func f;
1316 int brmask;
1317 int gr;
1318{
1319 char bytes[2];
1320 brmask = (brmask & 0x1f);
1321 bytes[0] = UNW_P2 | (brmask >> 1);
1322 bytes[1] = (((brmask & 1) << 7) | gr);
1323 (*f) (2, bytes, NULL);
1324}
1325
1326static void
1327output_P3_format (f, rtype, reg)
1328 vbyte_func f;
1329 unw_record_type rtype;
1330 int reg;
1331{
1332 char bytes[2];
e0c9811a 1333 int r = 0;
800eeca4
JW		 1334 reg = (reg & 0x7f);
1335 switch (rtype)
542d6675 1336 {
800eeca4
JW		 1337 case psp_gr:
1338 r = 0;
1339 break;
1340 case rp_gr:
1341 r = 1;
1342 break;
1343 case pfs_gr:
1344 r = 2;
1345 break;
1346 case preds_gr:
1347 r = 3;
1348 break;
1349 case unat_gr:
1350 r = 4;
1351 break;
1352 case lc_gr:
1353 r = 5;
1354 break;
1355 case rp_br:
1356 r = 6;
1357 break;
1358 case rnat_gr:
1359 r = 7;
1360 break;
1361 case bsp_gr:
1362 r = 8;
1363 break;
1364 case bspstore_gr:
1365 r = 9;
1366 break;
1367 case fpsr_gr:
1368 r = 10;
1369 break;
1370 case priunat_gr:
1371 r = 11;
1372 break;
1373 default:
ad4b42b4 1374 as_bad (_("Invalid record type for P3 format."));
542d6675 1375 }
800eeca4
JW		 1376 bytes[0] = (UNW_P3 | (r >> 1));
1377 bytes[1] = (((r & 1) << 7) | reg);
1378 (*f) (2, bytes, NULL);
1379}
1380
800eeca4 1381static void
e0c9811a 1382output_P4_format (f, imask, imask_size)
800eeca4 1383 vbyte_func f;
e0c9811a
JW		 1384 unsigned char *imask;
1385 unsigned long imask_size;
800eeca4 1386{
e0c9811a 1387 imask[0] = UNW_P4;
2132e3a3 1388 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1389}
1390
1391static void
1392output_P5_format (f, grmask, frmask)
1393 vbyte_func f;
1394 int grmask;
1395 unsigned long frmask;
1396{
1397 char bytes[4];
1398 grmask = (grmask & 0x0f);
1399
1400 bytes[0] = UNW_P5;
1401 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1402 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1403 bytes[3] = (frmask & 0x000000ff);
1404 (*f) (4, bytes, NULL);
1405}
1406
1407static void
1408output_P6_format (f, rtype, rmask)
1409 vbyte_func f;
1410 unw_record_type rtype;
1411 int rmask;
1412{
1413 char byte;
e0c9811a 1414 int r = 0;
197865e8 1415
e0c9811a
JW		 1416 if (rtype == gr_mem)
1417 r = 1;
1418 else if (rtype != fr_mem)
ad4b42b4 1419 as_bad (_("Invalid record type for format P6"));
800eeca4
JW		 1420 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1421 (*f) (1, &byte, NULL);
1422}
1423
1424static void
1425output_P7_format (f, rtype, w1, w2)
1426 vbyte_func f;
1427 unw_record_type rtype;
1428 unsigned long w1;
1429 unsigned long w2;
1430{
1431 char bytes[20];
1432 int count = 1;
e0c9811a 1433 int r = 0;
800eeca4
JW		 1434 count += output_leb128 (bytes + 1, w1, 0);
1435 switch (rtype)
1436 {
542d6675
KH		 1437 case mem_stack_f:
1438 r = 0;
1439 count += output_leb128 (bytes + count, w2 >> 4, 0);
1440 break;
1441 case mem_stack_v:
1442 r = 1;
1443 break;
1444 case spill_base:
1445 r = 2;
1446 break;
1447 case psp_sprel:
1448 r = 3;
1449 break;
1450 case rp_when:
1451 r = 4;
1452 break;
1453 case rp_psprel:
1454 r = 5;
1455 break;
1456 case pfs_when:
1457 r = 6;
1458 break;
1459 case pfs_psprel:
1460 r = 7;
1461 break;
1462 case preds_when:
1463 r = 8;
1464 break;
1465 case preds_psprel:
1466 r = 9;
1467 break;
1468 case lc_when:
1469 r = 10;
1470 break;
1471 case lc_psprel:
1472 r = 11;
1473 break;
1474 case unat_when:
1475 r = 12;
1476 break;
1477 case unat_psprel:
1478 r = 13;
1479 break;
1480 case fpsr_when:
1481 r = 14;
1482 break;
1483 case fpsr_psprel:
1484 r = 15;
1485 break;
1486 default:
1487 break;
800eeca4
JW		 1488 }
1489 bytes[0] = (UNW_P7 | r);
1490 (*f) (count, bytes, NULL);
1491}
1492
1493static void
1494output_P8_format (f, rtype, t)
1495 vbyte_func f;
1496 unw_record_type rtype;
1497 unsigned long t;
1498{
1499 char bytes[20];
e0c9811a 1500 int r = 0;
800eeca4
JW		 1501 int count = 2;
1502 bytes[0] = UNW_P8;
1503 switch (rtype)
1504 {
542d6675
KH		 1505 case rp_sprel:
1506 r = 1;
1507 break;
1508 case pfs_sprel:
1509 r = 2;
1510 break;
1511 case preds_sprel:
1512 r = 3;
1513 break;
1514 case lc_sprel:
1515 r = 4;
1516 break;
1517 case unat_sprel:
1518 r = 5;
1519 break;
1520 case fpsr_sprel:
1521 r = 6;
1522 break;
1523 case bsp_when:
1524 r = 7;
1525 break;
1526 case bsp_psprel:
1527 r = 8;
1528 break;
1529 case bsp_sprel:
1530 r = 9;
1531 break;
1532 case bspstore_when:
1533 r = 10;
1534 break;
1535 case bspstore_psprel:
1536 r = 11;
1537 break;
1538 case bspstore_sprel:
1539 r = 12;
1540 break;
1541 case rnat_when:
1542 r = 13;
1543 break;
1544 case rnat_psprel:
1545 r = 14;
1546 break;
1547 case rnat_sprel:
1548 r = 15;
1549 break;
1550 case priunat_when_gr:
1551 r = 16;
1552 break;
1553 case priunat_psprel:
1554 r = 17;
1555 break;
1556 case priunat_sprel:
1557 r = 18;
1558 break;
1559 case priunat_when_mem:
1560 r = 19;
1561 break;
1562 default:
1563 break;
800eeca4
JW		 1564 }
1565 bytes[1] = r;
1566 count += output_leb128 (bytes + 2, t, 0);
1567 (*f) (count, bytes, NULL);
1568}
1569
1570static void
1571output_P9_format (f, grmask, gr)
1572 vbyte_func f;
1573 int grmask;
1574 int gr;
1575{
1576 char bytes[3];
1577 bytes[0] = UNW_P9;
1578 bytes[1] = (grmask & 0x0f);
1579 bytes[2] = (gr & 0x7f);
1580 (*f) (3, bytes, NULL);
1581}
1582
1583static void
1584output_P10_format (f, abi, context)
1585 vbyte_func f;
1586 int abi;
1587 int context;
1588{
1589 char bytes[3];
1590 bytes[0] = UNW_P10;
1591 bytes[1] = (abi & 0xff);
1592 bytes[2] = (context & 0xff);
1593 (*f) (3, bytes, NULL);
1594}
1595
1596static void
1597output_B1_format (f, rtype, label)
1598 vbyte_func f;
1599 unw_record_type rtype;
1600 unsigned long label;
1601{
1602 char byte;
e0c9811a 1603 int r = 0;
197865e8 1604 if (label > 0x1f)
800eeca4
JW		 1605 {
1606 output_B4_format (f, rtype, label);
1607 return;
1608 }
e0c9811a
JW		 1609 if (rtype == copy_state)
1610 r = 1;
1611 else if (rtype != label_state)
ad4b42b4 1612 as_bad (_("Invalid record type for format B1"));
800eeca4
JW		 1613
1614 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1615 (*f) (1, &byte, NULL);
1616}
1617
1618static void
1619output_B2_format (f, ecount, t)
1620 vbyte_func f;
1621 unsigned long ecount;
1622 unsigned long t;
1623{
1624 char bytes[20];
1625 int count = 1;
1626 if (ecount > 0x1f)
1627 {
1628 output_B3_format (f, ecount, t);
1629 return;
1630 }
1631 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1632 count += output_leb128 (bytes + 1, t, 0);
1633 (*f) (count, bytes, NULL);
1634}
1635
1636static void
1637output_B3_format (f, ecount, t)
1638 vbyte_func f;
1639 unsigned long ecount;
1640 unsigned long t;
1641{
1642 char bytes[20];
1643 int count = 1;
1644 if (ecount <= 0x1f)
1645 {
1646 output_B2_format (f, ecount, t);
1647 return;
1648 }
1649 bytes[0] = UNW_B3;
1650 count += output_leb128 (bytes + 1, t, 0);
1651 count += output_leb128 (bytes + count, ecount, 0);
1652 (*f) (count, bytes, NULL);
1653}
1654
1655static void
1656output_B4_format (f, rtype, label)
1657 vbyte_func f;
1658 unw_record_type rtype;
1659 unsigned long label;
1660{
1661 char bytes[20];
e0c9811a 1662 int r = 0;
800eeca4 1663 int count = 1;
197865e8 1664 if (label <= 0x1f)
800eeca4
JW		 1665 {
1666 output_B1_format (f, rtype, label);
1667 return;
1668 }
197865e8 1669
e0c9811a
JW		 1670 if (rtype == copy_state)
1671 r = 1;
1672 else if (rtype != label_state)
ad4b42b4 1673 as_bad (_("Invalid record type for format B1"));
800eeca4
JW		 1674
1675 bytes[0] = (UNW_B4 | (r << 3));
1676 count += output_leb128 (bytes + 1, label, 0);
1677 (*f) (count, bytes, NULL);
1678}
1679
1680static char
e0c9811a 1681format_ab_reg (ab, reg)
542d6675
KH		 1682 int ab;
1683 int reg;
800eeca4
JW		 1684{
1685 int ret;
e0c9811a 1686 ab = (ab & 3);
800eeca4 1687 reg = (reg & 0x1f);
e0c9811a 1688 ret = (ab << 5) | reg;
800eeca4
JW		 1689 return ret;
1690}
1691
1692static void
e0c9811a 1693output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1694 vbyte_func f;
1695 unw_record_type rtype;
e0c9811a 1696 int ab, reg;
800eeca4
JW		 1697 unsigned long t;
1698 unsigned long w1;
1699{
1700 char bytes[20];
e0c9811a 1701 int r = 0;
800eeca4
JW		 1702 int count = 2;
1703 bytes[0] = UNW_X1;
197865e8 1704
e0c9811a
JW		 1705 if (rtype == spill_sprel)
1706 r = 1;
1707 else if (rtype != spill_psprel)
ad4b42b4 1708 as_bad (_("Invalid record type for format X1"));
e0c9811a 1709 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1710 count += output_leb128 (bytes + 2, t, 0);
1711 count += output_leb128 (bytes + count, w1, 0);
1712 (*f) (count, bytes, NULL);
1713}
1714
1715static void
e0c9811a 1716output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1717 vbyte_func f;
e0c9811a 1718 int ab, reg;
800eeca4
JW		 1719 int x, y, treg;
1720 unsigned long t;
1721{
1722 char bytes[20];
800eeca4
JW		 1723 int count = 3;
1724 bytes[0] = UNW_X2;
e0c9811a 1725 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1726 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1727 count += output_leb128 (bytes + 3, t, 0);
1728 (*f) (count, bytes, NULL);
1729}
1730
1731static void
e0c9811a 1732output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1733 vbyte_func f;
1734 unw_record_type rtype;
1735 int qp;
e0c9811a 1736 int ab, reg;
800eeca4
JW		 1737 unsigned long t;
1738 unsigned long w1;
1739{
1740 char bytes[20];
e0c9811a 1741 int r = 0;
800eeca4 1742 int count = 3;
e0c9811a
JW		 1743 bytes[0] = UNW_X3;
1744
1745 if (rtype == spill_sprel_p)
1746 r = 1;
1747 else if (rtype != spill_psprel_p)
ad4b42b4 1748 as_bad (_("Invalid record type for format X3"));
800eeca4 1749 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1750 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1751 count += output_leb128 (bytes + 3, t, 0);
1752 count += output_leb128 (bytes + count, w1, 0);
1753 (*f) (count, bytes, NULL);
1754}
1755
1756static void
e0c9811a 1757output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1758 vbyte_func f;
1759 int qp;
e0c9811a 1760 int ab, reg;
800eeca4
JW		 1761 int x, y, treg;
1762 unsigned long t;
1763{
1764 char bytes[20];
800eeca4 1765 int count = 4;
e0c9811a 1766 bytes[0] = UNW_X4;
800eeca4 1767 bytes[1] = (qp & 0x3f);
e0c9811a 1768 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1769 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1770 count += output_leb128 (bytes + 4, t, 0);
1771 (*f) (count, bytes, NULL);
1772}
1773
ba825241
JB		 1774/* This function checks whether there are any outstanding .save-s and
1775 discards them if so. */
1776
1777static void
1778check_pending_save (void)
1779{
1780 if (unwind.pending_saves)
1781 {
1782 unw_rec_list *cur, *prev;
1783
ad4b42b4 1784 as_warn (_("Previous .save incomplete"));
ba825241
JB		 1785 for (cur = unwind.list, prev = NULL; cur; )
1786 if (&cur->r.record.p == unwind.pending_saves)
1787 {
1788 if (prev)
1789 prev->next = cur->next;
1790 else
1791 unwind.list = cur->next;
1792 if (cur == unwind.tail)
1793 unwind.tail = prev;
1794 if (cur == unwind.current_entry)
1795 unwind.current_entry = cur->next;
1796 /* Don't free the first discarded record, it's being used as
1797 terminator for (currently) br_gr and gr_gr processing, and
1798 also prevents leaving a dangling pointer to it in its
1799 predecessor. */
1800 cur->r.record.p.grmask = 0;
1801 cur->r.record.p.brmask = 0;
1802 cur->r.record.p.frmask = 0;
1803 prev = cur->r.record.p.next;
1804 cur->r.record.p.next = NULL;
1805 cur = prev;
1806 break;
1807 }
1808 else
1809 {
1810 prev = cur;
1811 cur = cur->next;
1812 }
1813 while (cur)
1814 {
1815 prev = cur;
1816 cur = cur->r.record.p.next;
1817 free (prev);
1818 }
1819 unwind.pending_saves = NULL;
1820 }
1821}
1822
800eeca4 1823/* This function allocates a record list structure, and initializes fields. */
542d6675 1824
800eeca4 1825static unw_rec_list *
197865e8 1826alloc_record (unw_record_type t)
800eeca4
JW		 1827{
1828 unw_rec_list *ptr;
1829 ptr = xmalloc (sizeof (*ptr));
ba825241 1830 memset (ptr, 0, sizeof (*ptr));
800eeca4
JW		 1831 ptr->slot_number = SLOT_NUM_NOT_SET;
1832 ptr->r.type = t;
1833 return ptr;
1834}
1835
5738bc24
JW		 1836/* Dummy unwind record used for calculating the length of the last prologue or
1837 body region. */
1838
1839static unw_rec_list *
1840output_endp ()
1841{
1842 unw_rec_list *ptr = alloc_record (endp);
1843 return ptr;
1844}
1845
800eeca4
JW		 1846static unw_rec_list *
1847output_prologue ()
1848{
1849 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1850 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1851 return ptr;
1852}
1853
1854static unw_rec_list *
1855output_prologue_gr (saved_mask, reg)
1856 unsigned int saved_mask;
1857 unsigned int reg;
1858{
1859 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1860 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1861 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1862 ptr->r.record.r.grsave = reg;
1863 return ptr;
1864}
1865
1866static unw_rec_list *
1867output_body ()
1868{
1869 unw_rec_list *ptr = alloc_record (body);
1870 return ptr;
1871}
1872
1873static unw_rec_list *
1874output_mem_stack_f (size)
1875 unsigned int size;
1876{
1877 unw_rec_list *ptr = alloc_record (mem_stack_f);
1878 ptr->r.record.p.size = size;
1879 return ptr;
1880}
1881
1882static unw_rec_list *
1883output_mem_stack_v ()
1884{
1885 unw_rec_list *ptr = alloc_record (mem_stack_v);
1886 return ptr;
1887}
1888
1889static unw_rec_list *
1890output_psp_gr (gr)
1891 unsigned int gr;
1892{
1893 unw_rec_list *ptr = alloc_record (psp_gr);
ba825241 1894 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1895 return ptr;
1896}
1897
1898static unw_rec_list *
1899output_psp_sprel (offset)
1900 unsigned int offset;
1901{
1902 unw_rec_list *ptr = alloc_record (psp_sprel);
ba825241 1903 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1904 return ptr;
1905}
1906
1907static unw_rec_list *
1908output_rp_when ()
1909{
1910 unw_rec_list *ptr = alloc_record (rp_when);
1911 return ptr;
1912}
1913
1914static unw_rec_list *
1915output_rp_gr (gr)
1916 unsigned int gr;
1917{
1918 unw_rec_list *ptr = alloc_record (rp_gr);
ba825241 1919 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1920 return ptr;
1921}
1922
1923static unw_rec_list *
1924output_rp_br (br)
1925 unsigned int br;
1926{
1927 unw_rec_list *ptr = alloc_record (rp_br);
ba825241 1928 ptr->r.record.p.r.br = br;
800eeca4
JW		 1929 return ptr;
1930}
1931
1932static unw_rec_list *
1933output_rp_psprel (offset)
1934 unsigned int offset;
1935{
1936 unw_rec_list *ptr = alloc_record (rp_psprel);
ba825241 1937 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1938 return ptr;
1939}
1940
1941static unw_rec_list *
1942output_rp_sprel (offset)
1943 unsigned int offset;
1944{
1945 unw_rec_list *ptr = alloc_record (rp_sprel);
ba825241 1946 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1947 return ptr;
1948}
1949
1950static unw_rec_list *
1951output_pfs_when ()
1952{
1953 unw_rec_list *ptr = alloc_record (pfs_when);
1954 return ptr;
1955}
1956
1957static unw_rec_list *
1958output_pfs_gr (gr)
1959 unsigned int gr;
1960{
1961 unw_rec_list *ptr = alloc_record (pfs_gr);
ba825241 1962 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1963 return ptr;
1964}
1965
1966static unw_rec_list *
1967output_pfs_psprel (offset)
1968 unsigned int offset;
1969{
1970 unw_rec_list *ptr = alloc_record (pfs_psprel);
ba825241 1971 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1972 return ptr;
1973}
1974
1975static unw_rec_list *
1976output_pfs_sprel (offset)
1977 unsigned int offset;
1978{
1979 unw_rec_list *ptr = alloc_record (pfs_sprel);
ba825241 1980 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1981 return ptr;
1982}
1983
1984static unw_rec_list *
1985output_preds_when ()
1986{
1987 unw_rec_list *ptr = alloc_record (preds_when);
1988 return ptr;
1989}
1990
1991static unw_rec_list *
1992output_preds_gr (gr)
1993 unsigned int gr;
1994{
1995 unw_rec_list *ptr = alloc_record (preds_gr);
ba825241 1996 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1997 return ptr;
1998}
1999
2000static unw_rec_list *
2001output_preds_psprel (offset)
2002 unsigned int offset;
2003{
2004 unw_rec_list *ptr = alloc_record (preds_psprel);
ba825241 2005 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2006 return ptr;
2007}
2008
2009static unw_rec_list *
2010output_preds_sprel (offset)
2011 unsigned int offset;
2012{
2013 unw_rec_list *ptr = alloc_record (preds_sprel);
ba825241 2014 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2015 return ptr;
2016}
2017
2018static unw_rec_list *
2019output_fr_mem (mask)
2020 unsigned int mask;
2021{
2022 unw_rec_list *ptr = alloc_record (fr_mem);
ba825241
JB		 2023 unw_rec_list *cur = ptr;
2024
2025 ptr->r.record.p.frmask = mask;
2026 unwind.pending_saves = &ptr->r.record.p;
2027 for (;;)
2028 {
2029 unw_rec_list *prev = cur;
2030
2031 /* Clear least significant set bit. */
2032 mask &= ~(mask & (~mask + 1));
2033 if (!mask)
2034 return ptr;
2035 cur = alloc_record (fr_mem);
2036 cur->r.record.p.frmask = mask;
2037 /* Retain only least significant bit. */
2038 prev->r.record.p.frmask ^= mask;
2039 prev->r.record.p.next = cur;
2040 }
800eeca4
JW		 2041}
2042
2043static unw_rec_list *
2044output_frgr_mem (gr_mask, fr_mask)
2045 unsigned int gr_mask;
2046 unsigned int fr_mask;
2047{
2048 unw_rec_list *ptr = alloc_record (frgr_mem);
ba825241
JB		 2049 unw_rec_list *cur = ptr;
2050
2051 unwind.pending_saves = &cur->r.record.p;
2052 cur->r.record.p.frmask = fr_mask;
2053 while (fr_mask)
2054 {
2055 unw_rec_list *prev = cur;
2056
2057 /* Clear least significant set bit. */
2058 fr_mask &= ~(fr_mask & (~fr_mask + 1));
2059 if (!gr_mask && !fr_mask)
2060 return ptr;
2061 cur = alloc_record (frgr_mem);
2062 cur->r.record.p.frmask = fr_mask;
2063 /* Retain only least significant bit. */
2064 prev->r.record.p.frmask ^= fr_mask;
2065 prev->r.record.p.next = cur;
2066 }
2067 cur->r.record.p.grmask = gr_mask;
2068 for (;;)
2069 {
2070 unw_rec_list *prev = cur;
2071
2072 /* Clear least significant set bit. */
2073 gr_mask &= ~(gr_mask & (~gr_mask + 1));
2074 if (!gr_mask)
2075 return ptr;
2076 cur = alloc_record (frgr_mem);
2077 cur->r.record.p.grmask = gr_mask;
2078 /* Retain only least significant bit. */
2079 prev->r.record.p.grmask ^= gr_mask;
2080 prev->r.record.p.next = cur;
2081 }
800eeca4
JW		 2082}
2083
2084static unw_rec_list *
2085output_gr_gr (mask, reg)
2086 unsigned int mask;
2087 unsigned int reg;
2088{
2089 unw_rec_list *ptr = alloc_record (gr_gr);
ba825241
JB		 2090 unw_rec_list *cur = ptr;
2091
800eeca4 2092 ptr->r.record.p.grmask = mask;
ba825241
JB		 2093 ptr->r.record.p.r.gr = reg;
2094 unwind.pending_saves = &ptr->r.record.p;
2095 for (;;)
2096 {
2097 unw_rec_list *prev = cur;
2098
2099 /* Clear least significant set bit. */
2100 mask &= ~(mask & (~mask + 1));
2101 if (!mask)
2102 return ptr;
2103 cur = alloc_record (gr_gr);
2104 cur->r.record.p.grmask = mask;
2105 /* Indicate this record shouldn't be output. */
2106 cur->r.record.p.r.gr = REG_NUM;
2107 /* Retain only least significant bit. */
2108 prev->r.record.p.grmask ^= mask;
2109 prev->r.record.p.next = cur;
2110 }
800eeca4
JW		 2111}
2112
2113static unw_rec_list *
2114output_gr_mem (mask)
2115 unsigned int mask;
2116{
2117 unw_rec_list *ptr = alloc_record (gr_mem);
ba825241
JB		 2118 unw_rec_list *cur = ptr;
2119
2120 ptr->r.record.p.grmask = mask;
2121 unwind.pending_saves = &ptr->r.record.p;
2122 for (;;)
2123 {
2124 unw_rec_list *prev = cur;
2125
2126 /* Clear least significant set bit. */
2127 mask &= ~(mask & (~mask + 1));
2128 if (!mask)
2129 return ptr;
2130 cur = alloc_record (gr_mem);
2131 cur->r.record.p.grmask = mask;
2132 /* Retain only least significant bit. */
2133 prev->r.record.p.grmask ^= mask;
2134 prev->r.record.p.next = cur;
2135 }
800eeca4
JW		 2136}
2137
2138static unw_rec_list *
2139output_br_mem (unsigned int mask)
2140{
2141 unw_rec_list *ptr = alloc_record (br_mem);
ba825241
JB		 2142 unw_rec_list *cur = ptr;
2143
800eeca4 2144 ptr->r.record.p.brmask = mask;
ba825241
JB		 2145 unwind.pending_saves = &ptr->r.record.p;
2146 for (;;)
2147 {
2148 unw_rec_list *prev = cur;
2149
2150 /* Clear least significant set bit. */
2151 mask &= ~(mask & (~mask + 1));
2152 if (!mask)
2153 return ptr;
2154 cur = alloc_record (br_mem);
2155 cur->r.record.p.brmask = mask;
2156 /* Retain only least significant bit. */
2157 prev->r.record.p.brmask ^= mask;
2158 prev->r.record.p.next = cur;
2159 }
800eeca4
JW		 2160}
2161
2162static unw_rec_list *
ba825241
JB		 2163output_br_gr (mask, reg)
2164 unsigned int mask;
800eeca4
JW		 2165 unsigned int reg;
2166{
2167 unw_rec_list *ptr = alloc_record (br_gr);
ba825241
JB		 2168 unw_rec_list *cur = ptr;
2169
2170 ptr->r.record.p.brmask = mask;
2171 ptr->r.record.p.r.gr = reg;
2172 unwind.pending_saves = &ptr->r.record.p;
2173 for (;;)
2174 {
2175 unw_rec_list *prev = cur;
2176
2177 /* Clear least significant set bit. */
2178 mask &= ~(mask & (~mask + 1));
2179 if (!mask)
2180 return ptr;
2181 cur = alloc_record (br_gr);
2182 cur->r.record.p.brmask = mask;
2183 /* Indicate this record shouldn't be output. */
2184 cur->r.record.p.r.gr = REG_NUM;
2185 /* Retain only least significant bit. */
2186 prev->r.record.p.brmask ^= mask;
2187 prev->r.record.p.next = cur;
2188 }
800eeca4
JW		 2189}
2190
2191static unw_rec_list *
2192output_spill_base (offset)
2193 unsigned int offset;
2194{
2195 unw_rec_list *ptr = alloc_record (spill_base);
ba825241 2196 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2197 return ptr;
2198}
2199
2200static unw_rec_list *
2201output_unat_when ()
2202{
2203 unw_rec_list *ptr = alloc_record (unat_when);
2204 return ptr;
2205}
2206
2207static unw_rec_list *
2208output_unat_gr (gr)
2209 unsigned int gr;
2210{
2211 unw_rec_list *ptr = alloc_record (unat_gr);
ba825241 2212 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2213 return ptr;
2214}
2215
2216static unw_rec_list *
2217output_unat_psprel (offset)
2218 unsigned int offset;
2219{
2220 unw_rec_list *ptr = alloc_record (unat_psprel);
ba825241 2221 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2222 return ptr;
2223}
2224
2225static unw_rec_list *
2226output_unat_sprel (offset)
2227 unsigned int offset;
2228{
2229 unw_rec_list *ptr = alloc_record (unat_sprel);
ba825241 2230 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2231 return ptr;
2232}
2233
2234static unw_rec_list *
2235output_lc_when ()
2236{
2237 unw_rec_list *ptr = alloc_record (lc_when);
2238 return ptr;
2239}
2240
2241static unw_rec_list *
2242output_lc_gr (gr)
2243 unsigned int gr;
2244{
2245 unw_rec_list *ptr = alloc_record (lc_gr);
ba825241 2246 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2247 return ptr;
2248}
2249
2250static unw_rec_list *
2251output_lc_psprel (offset)
2252 unsigned int offset;
2253{
2254 unw_rec_list *ptr = alloc_record (lc_psprel);
ba825241 2255 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2256 return ptr;
2257}
2258
2259static unw_rec_list *
2260output_lc_sprel (offset)
2261 unsigned int offset;
2262{
2263 unw_rec_list *ptr = alloc_record (lc_sprel);
ba825241 2264 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2265 return ptr;
2266}
2267
2268static unw_rec_list *
2269output_fpsr_when ()
2270{
2271 unw_rec_list *ptr = alloc_record (fpsr_when);
2272 return ptr;
2273}
2274
2275static unw_rec_list *
2276output_fpsr_gr (gr)
2277 unsigned int gr;
2278{
2279 unw_rec_list *ptr = alloc_record (fpsr_gr);
ba825241 2280 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2281 return ptr;
2282}
2283
2284static unw_rec_list *
2285output_fpsr_psprel (offset)
2286 unsigned int offset;
2287{
2288 unw_rec_list *ptr = alloc_record (fpsr_psprel);
ba825241 2289 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2290 return ptr;
2291}
2292
2293static unw_rec_list *
2294output_fpsr_sprel (offset)
2295 unsigned int offset;
2296{
2297 unw_rec_list *ptr = alloc_record (fpsr_sprel);
ba825241 2298 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2299 return ptr;
2300}
2301
2302static unw_rec_list *
2303output_priunat_when_gr ()
2304{
2305 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2306 return ptr;
2307}
2308
2309static unw_rec_list *
2310output_priunat_when_mem ()
2311{
2312 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2313 return ptr;
2314}
2315
2316static unw_rec_list *
2317output_priunat_gr (gr)
2318 unsigned int gr;
2319{
2320 unw_rec_list *ptr = alloc_record (priunat_gr);
ba825241 2321 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2322 return ptr;
2323}
2324
2325static unw_rec_list *
2326output_priunat_psprel (offset)
2327 unsigned int offset;
2328{
2329 unw_rec_list *ptr = alloc_record (priunat_psprel);
ba825241 2330 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2331 return ptr;
2332}
2333
2334static unw_rec_list *
2335output_priunat_sprel (offset)
2336 unsigned int offset;
2337{
2338 unw_rec_list *ptr = alloc_record (priunat_sprel);
ba825241 2339 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2340 return ptr;
2341}
2342
2343static unw_rec_list *
2344output_bsp_when ()
2345{
2346 unw_rec_list *ptr = alloc_record (bsp_when);
2347 return ptr;
2348}
2349
2350static unw_rec_list *
2351output_bsp_gr (gr)
2352 unsigned int gr;
2353{
2354 unw_rec_list *ptr = alloc_record (bsp_gr);
ba825241 2355 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2356 return ptr;
2357}
2358
2359static unw_rec_list *
2360output_bsp_psprel (offset)
2361 unsigned int offset;
2362{
2363 unw_rec_list *ptr = alloc_record (bsp_psprel);
ba825241 2364 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2365 return ptr;
2366}
2367
2368static unw_rec_list *
2369output_bsp_sprel (offset)
2370 unsigned int offset;
2371{
2372 unw_rec_list *ptr = alloc_record (bsp_sprel);
ba825241 2373 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2374 return ptr;
2375}
2376
2377static unw_rec_list *
2378output_bspstore_when ()
2379{
2380 unw_rec_list *ptr = alloc_record (bspstore_when);
2381 return ptr;
2382}
2383
2384static unw_rec_list *
2385output_bspstore_gr (gr)
2386 unsigned int gr;
2387{
2388 unw_rec_list *ptr = alloc_record (bspstore_gr);
ba825241 2389 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2390 return ptr;
2391}
2392
2393static unw_rec_list *
2394output_bspstore_psprel (offset)
2395 unsigned int offset;
2396{
2397 unw_rec_list *ptr = alloc_record (bspstore_psprel);
ba825241 2398 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2399 return ptr;
2400}
2401
2402static unw_rec_list *
2403output_bspstore_sprel (offset)
2404 unsigned int offset;
2405{
2406 unw_rec_list *ptr = alloc_record (bspstore_sprel);
ba825241 2407 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2408 return ptr;
2409}
2410
2411static unw_rec_list *
2412output_rnat_when ()
2413{
2414 unw_rec_list *ptr = alloc_record (rnat_when);
2415 return ptr;
2416}
2417
2418static unw_rec_list *
2419output_rnat_gr (gr)
2420 unsigned int gr;
2421{
2422 unw_rec_list *ptr = alloc_record (rnat_gr);
ba825241 2423 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2424 return ptr;
2425}
2426
2427static unw_rec_list *
2428output_rnat_psprel (offset)
2429 unsigned int offset;
2430{
2431 unw_rec_list *ptr = alloc_record (rnat_psprel);
ba825241 2432 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2433 return ptr;
2434}
2435
2436static unw_rec_list *
2437output_rnat_sprel (offset)
2438 unsigned int offset;
2439{
2440 unw_rec_list *ptr = alloc_record (rnat_sprel);
ba825241 2441 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2442 return ptr;
2443}
2444
2445static unw_rec_list *
e0c9811a
JW		 2446output_unwabi (abi, context)
2447 unsigned long abi;
2448 unsigned long context;
800eeca4 2449{
e0c9811a
JW		 2450 unw_rec_list *ptr = alloc_record (unwabi);
2451 ptr->r.record.p.abi = abi;
2452 ptr->r.record.p.context = context;
800eeca4
JW		 2453 return ptr;
2454}
2455
2456static unw_rec_list *
e0c9811a 2457output_epilogue (unsigned long ecount)
800eeca4 2458{
e0c9811a
JW		 2459 unw_rec_list *ptr = alloc_record (epilogue);
2460 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2461 return ptr;
2462}
2463
2464static unw_rec_list *
e0c9811a 2465output_label_state (unsigned long label)
800eeca4 2466{
e0c9811a
JW		 2467 unw_rec_list *ptr = alloc_record (label_state);
2468 ptr->r.record.b.label = label;
800eeca4
JW		 2469 return ptr;
2470}
2471
2472static unw_rec_list *
e0c9811a
JW		 2473output_copy_state (unsigned long label)
2474{
2475 unw_rec_list *ptr = alloc_record (copy_state);
2476 ptr->r.record.b.label = label;
2477 return ptr;
2478}
2479
2480static unw_rec_list *
e4e8248d 2481output_spill_psprel (ab, reg, offset, predicate)
e0c9811a 2482 unsigned int ab;
800eeca4
JW		 2483 unsigned int reg;
2484 unsigned int offset;
2485 unsigned int predicate;
2486{
e4e8248d 2487 unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel);
e0c9811a 2488 ptr->r.record.x.ab = ab;
800eeca4 2489 ptr->r.record.x.reg = reg;
ba825241 2490 ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2491 ptr->r.record.x.qp = predicate;
2492 return ptr;
2493}
2494
2495static unw_rec_list *
e4e8248d 2496output_spill_sprel (ab, reg, offset, predicate)
e0c9811a 2497 unsigned int ab;
800eeca4
JW		 2498 unsigned int reg;
2499 unsigned int offset;
2500 unsigned int predicate;
2501{
e4e8248d 2502 unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel);
e0c9811a 2503 ptr->r.record.x.ab = ab;
800eeca4 2504 ptr->r.record.x.reg = reg;
ba825241 2505 ptr->r.record.x.where.spoff = offset / 4;
800eeca4
JW		 2506 ptr->r.record.x.qp = predicate;
2507 return ptr;
2508}
2509
2510static unw_rec_list *
e4e8248d 2511output_spill_reg (ab, reg, targ_reg, xy, predicate)
e0c9811a 2512 unsigned int ab;
800eeca4
JW		 2513 unsigned int reg;
2514 unsigned int targ_reg;
2515 unsigned int xy;
2516 unsigned int predicate;
2517{
e4e8248d 2518 unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg);
e0c9811a 2519 ptr->r.record.x.ab = ab;
800eeca4 2520 ptr->r.record.x.reg = reg;
ba825241 2521 ptr->r.record.x.where.reg = targ_reg;
800eeca4
JW		 2522 ptr->r.record.x.xy = xy;
2523 ptr->r.record.x.qp = predicate;
2524 return ptr;
2525}
2526
197865e8 2527/* Given a unw_rec_list process the correct format with the
800eeca4 2528 specified function. */
542d6675 2529
800eeca4
JW		 2530static void
2531process_one_record (ptr, f)
2532 unw_rec_list *ptr;
2533 vbyte_func f;
2534{
ba825241 2535 unsigned int fr_mask, gr_mask;
e0c9811a 2536
197865e8 2537 switch (ptr->r.type)
800eeca4 2538 {
5738bc24
JW		 2539 /* This is a dummy record that takes up no space in the output. */
2540 case endp:
2541 break;
2542
542d6675
KH		 2543 case gr_mem:
2544 case fr_mem:
2545 case br_mem:
2546 case frgr_mem:
2547 /* These are taken care of by prologue/prologue_gr. */
2548 break;
e0c9811a 2549
542d6675
KH		 2550 case prologue_gr:
2551 case prologue:
2552 if (ptr->r.type == prologue_gr)
2553 output_R2_format (f, ptr->r.record.r.grmask,
2554 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2555 else
800eeca4 2556 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2557
2558 /* Output descriptor(s) for union of register spills (if any). */
2559 gr_mask = ptr->r.record.r.mask.gr_mem;
2560 fr_mask = ptr->r.record.r.mask.fr_mem;
2561 if (fr_mask)
2562 {
2563 if ((fr_mask & ~0xfUL) == 0)
2564 output_P6_format (f, fr_mem, fr_mask);
2565 else
2566 {
2567 output_P5_format (f, gr_mask, fr_mask);
2568 gr_mask = 0;
2569 }
2570 }
2571 if (gr_mask)
2572 output_P6_format (f, gr_mem, gr_mask);
2573 if (ptr->r.record.r.mask.br_mem)
2574 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2575
2576 /* output imask descriptor if necessary: */
2577 if (ptr->r.record.r.mask.i)
2578 output_P4_format (f, ptr->r.record.r.mask.i,
2579 ptr->r.record.r.imask_size);
2580 break;
2581
2582 case body:
2583 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2584 break;
2585 case mem_stack_f:
2586 case mem_stack_v:
2587 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2588 ptr->r.record.p.size);
2589 break;
2590 case psp_gr:
2591 case rp_gr:
2592 case pfs_gr:
2593 case preds_gr:
2594 case unat_gr:
2595 case lc_gr:
2596 case fpsr_gr:
2597 case priunat_gr:
2598 case bsp_gr:
2599 case bspstore_gr:
2600 case rnat_gr:
ba825241 2601 output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr);
542d6675
KH		 2602 break;
2603 case rp_br:
ba825241 2604 output_P3_format (f, rp_br, ptr->r.record.p.r.br);
542d6675
KH		 2605 break;
2606 case psp_sprel:
ba825241 2607 output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0);
542d6675
KH		 2608 break;
2609 case rp_when:
2610 case pfs_when:
2611 case preds_when:
2612 case unat_when:
2613 case lc_when:
2614 case fpsr_when:
2615 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2616 break;
2617 case rp_psprel:
2618 case pfs_psprel:
2619 case preds_psprel:
2620 case unat_psprel:
2621 case lc_psprel:
2622 case fpsr_psprel:
2623 case spill_base:
ba825241 2624 output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0);
542d6675
KH		 2625 break;
2626 case rp_sprel:
2627 case pfs_sprel:
2628 case preds_sprel:
2629 case unat_sprel:
2630 case lc_sprel:
2631 case fpsr_sprel:
2632 case priunat_sprel:
2633 case bsp_sprel:
2634 case bspstore_sprel:
2635 case rnat_sprel:
ba825241 2636 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp);
542d6675
KH		 2637 break;
2638 case gr_gr:
ba825241
JB		 2639 if (ptr->r.record.p.r.gr < REG_NUM)
2640 {
2641 const unw_rec_list *cur = ptr;
2642
2643 gr_mask = cur->r.record.p.grmask;
2644 while ((cur = cur->r.record.p.next) != NULL)
2645 gr_mask |= cur->r.record.p.grmask;
2646 output_P9_format (f, gr_mask, ptr->r.record.p.r.gr);
2647 }
542d6675
KH		 2648 break;
2649 case br_gr:
ba825241
JB		 2650 if (ptr->r.record.p.r.gr < REG_NUM)
2651 {
2652 const unw_rec_list *cur = ptr;
2653
2654 gr_mask = cur->r.record.p.brmask;
2655 while ((cur = cur->r.record.p.next) != NULL)
2656 gr_mask |= cur->r.record.p.brmask;
2657 output_P2_format (f, gr_mask, ptr->r.record.p.r.gr);
2658 }
542d6675
KH		 2659 break;
2660 case spill_mask:
ad4b42b4 2661 as_bad (_("spill_mask record unimplemented."));
542d6675
KH		 2662 break;
2663 case priunat_when_gr:
2664 case priunat_when_mem:
2665 case bsp_when:
2666 case bspstore_when:
2667 case rnat_when:
2668 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2669 break;
2670 case priunat_psprel:
2671 case bsp_psprel:
2672 case bspstore_psprel:
2673 case rnat_psprel:
ba825241 2674 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp);
542d6675
KH		 2675 break;
2676 case unwabi:
2677 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2678 break;
2679 case epilogue:
2680 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2681 break;
2682 case label_state:
2683 case copy_state:
2684 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2685 break;
2686 case spill_psprel:
2687 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2688 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2689 ptr->r.record.x.where.pspoff);
542d6675
KH		 2690 break;
2691 case spill_sprel:
2692 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2693 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2694 ptr->r.record.x.where.spoff);
542d6675
KH		 2695 break;
2696 case spill_reg:
2697 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2698 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
ba825241 2699 ptr->r.record.x.where.reg, ptr->r.record.x.t);
542d6675
KH		 2700 break;
2701 case spill_psprel_p:
2702 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2703 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2704 ptr->r.record.x.t, ptr->r.record.x.where.pspoff);
542d6675
KH		 2705 break;
2706 case spill_sprel_p:
2707 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2708 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2709 ptr->r.record.x.t, ptr->r.record.x.where.spoff);
542d6675
KH		 2710 break;
2711 case spill_reg_p:
2712 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2713 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
ba825241 2714 ptr->r.record.x.xy, ptr->r.record.x.where.reg,
542d6675
KH		 2715 ptr->r.record.x.t);
2716 break;
2717 default:
ad4b42b4 2718 as_bad (_("record_type_not_valid"));
542d6675 2719 break;
800eeca4
JW		 2720 }
2721}
2722
197865e8 2723/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2724 the specified function. */
2725static void
2726process_unw_records (list, f)
2727 unw_rec_list *list;
2728 vbyte_func f;
2729{
2730 unw_rec_list *ptr;
2731 for (ptr = list; ptr; ptr = ptr->next)
2732 process_one_record (ptr, f);
2733}
2734
2735/* Determine the size of a record list in bytes. */
2736static int
2737calc_record_size (list)
2738 unw_rec_list *list;
2739{
2740 vbyte_count = 0;
2741 process_unw_records (list, count_output);
2742 return vbyte_count;
2743}
2744
e4e8248d
JB		 2745/* Return the number of bits set in the input value.
2746 Perhaps this has a better place... */
2747#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2748# define popcount __builtin_popcount
2749#else
2750static int
2751popcount (unsigned x)
2752{
2753 static const unsigned char popcnt[16] =
2754 {
2755 0, 1, 1, 2,
2756 1, 2, 2, 3,
2757 1, 2, 2, 3,
2758 2, 3, 3, 4
2759 };
2760
2761 if (x < NELEMS (popcnt))
2762 return popcnt[x];
2763 return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt));
2764}
2765#endif
2766
e0c9811a
JW		 2767/* Update IMASK bitmask to reflect the fact that one or more registers
2768 of type TYPE are saved starting at instruction with index T. If N
2769 bits are set in REGMASK, it is assumed that instructions T through
2770 T+N-1 save these registers.
2771
2772 TYPE values:
2773 0: no save
2774 1: instruction saves next fp reg
2775 2: instruction saves next general reg
2776 3: instruction saves next branch reg */
2777static void
2778set_imask (region, regmask, t, type)
2779 unw_rec_list *region;
2780 unsigned long regmask;
2781 unsigned long t;
2782 unsigned int type;
2783{
2784 unsigned char *imask;
2785 unsigned long imask_size;
2786 unsigned int i;
2787 int pos;
2788
2789 imask = region->r.record.r.mask.i;
2790 imask_size = region->r.record.r.imask_size;
2791 if (!imask)
2792 {
542d6675 2793 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2794 imask = xmalloc (imask_size);
2795 memset (imask, 0, imask_size);
2796
2797 region->r.record.r.imask_size = imask_size;
2798 region->r.record.r.mask.i = imask;
2799 }
2800
542d6675
KH		 2801 i = (t / 4) + 1;
2802 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2803 while (regmask)
2804 {
2805 if (i >= imask_size)
2806 {
ad4b42b4 2807 as_bad (_("Ignoring attempt to spill beyond end of region"));
e0c9811a
JW		 2808 return;
2809 }
2810
2811 imask[i] |= (type & 0x3) << pos;
197865e8 2812
e0c9811a
JW		 2813 regmask &= (regmask - 1);
2814 pos -= 2;
2815 if (pos < 0)
2816 {
2817 pos = 0;
2818 ++i;
2819 }
2820 }
2821}
2822
f5a30c2e
JW		 2823/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2824 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2825 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2826 for frag sizes. */
f5a30c2e 2827
e0c9811a 2828unsigned long
b5e0fabd 2829slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2830 unsigned long slot_addr;
2831 fragS *slot_frag;
2832 unsigned long first_addr;
2833 fragS *first_frag;
b5e0fabd 2834 int before_relax;
e0c9811a 2835{
f5a30c2e
JW		 2836 unsigned long index = 0;
2837
2838 /* First time we are called, the initial address and frag are invalid. */
2839 if (first_addr == 0)
2840 return 0;
2841
2842 /* If the two addresses are in different frags, then we need to add in
2843 the remaining size of this frag, and then the entire size of intermediate
2844 frags. */
4dddc1d1 2845 while (slot_frag != first_frag)
f5a30c2e
JW		 2846 {
2847 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2848
b5e0fabd 2849 if (! before_relax)
73f20958 2850 {
b5e0fabd
JW		 2851 /* We can get the final addresses only during and after
2852 relaxation. */
73f20958
L		 2853 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2854 index += 3 * ((first_frag->fr_next->fr_address
2855 - first_frag->fr_address
2856 - first_frag->fr_fix) >> 4);
2857 }
2858 else
2859 /* We don't know what the final addresses will be. We try our
2860 best to estimate. */
2861 switch (first_frag->fr_type)
2862 {
2863 default:
2864 break;
2865
2866 case rs_space:
ad4b42b4 2867 as_fatal (_("Only constant space allocation is supported"));
73f20958
L		 2868 break;
2869
2870 case rs_align:
2871 case rs_align_code:
2872 case rs_align_test:
2873 /* Take alignment into account. Assume the worst case
2874 before relaxation. */
2875 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2876 break;
2877
2878 case rs_org:
2879 if (first_frag->fr_symbol)
2880 {
ad4b42b4 2881 as_fatal (_("Only constant offsets are supported"));
73f20958
L		 2882 break;
2883 }
2884 case rs_fill:
2885 index += 3 * (first_frag->fr_offset >> 4);
2886 break;
2887 }
2888
f5a30c2e
JW		 2889 /* Add in the full size of the frag converted to instruction slots. */
2890 index += 3 * (first_frag->fr_fix >> 4);
2891 /* Subtract away the initial part before first_addr. */
2892 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2893 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2894
f5a30c2e
JW		 2895 /* Move to the beginning of the next frag. */
2896 first_frag = first_frag->fr_next;
2897 first_addr = (unsigned long) &first_frag->fr_literal;
4dddc1d1
JW		 2898
2899 /* This can happen if there is section switching in the middle of a
cb3b8d91
JW		 2900 function, causing the frag chain for the function to be broken.
2901 It is too difficult to recover safely from this problem, so we just
2902 exit with an error. */
4dddc1d1 2903 if (first_frag == NULL)
ad4b42b4 2904 as_fatal (_("Section switching in code is not supported."));
f5a30c2e
JW		 2905 }
2906
2907 /* Add in the used part of the last frag. */
2908 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2909 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2910 return index;
2911}
4a1805b1 2912
91a2ae2a
RH		 2913/* Optimize unwind record directives. */
2914
2915static unw_rec_list *
2916optimize_unw_records (list)
2917 unw_rec_list *list;
2918{
2919 if (!list)
2920 return NULL;
2921
2922 /* If the only unwind record is ".prologue" or ".prologue" followed
2923 by ".body", then we can optimize the unwind directives away. */
2924 if (list->r.type == prologue
5738bc24
JW		 2925 && (list->next->r.type == endp
2926 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2927 return NULL;
2928
2929 return list;
2930}
2931
800eeca4
JW		 2932/* Given a complete record list, process any records which have
2933 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2934 this has been run, all necessary information should be available
800eeca4 2935 within each record to generate an image. */
542d6675 2936
800eeca4 2937static void
b5e0fabd 2938fixup_unw_records (list, before_relax)
800eeca4 2939 unw_rec_list *list;
b5e0fabd 2940 int before_relax;
800eeca4 2941{
e0c9811a
JW		 2942 unw_rec_list *ptr, *region = 0;
2943 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2944 fragS *first_frag = 0;
e0c9811a 2945
800eeca4
JW		 2946 for (ptr = list; ptr; ptr = ptr->next)
2947 {
2948 if (ptr->slot_number == SLOT_NUM_NOT_SET)
ad4b42b4 2949 as_bad (_(" Insn slot not set in unwind record."));
f5a30c2e 2950 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2951 first_addr, first_frag, before_relax);
800eeca4
JW		 2952 switch (ptr->r.type)
2953 {
542d6675
KH		 2954 case prologue:
2955 case prologue_gr:
2956 case body:
2957 {
2958 unw_rec_list *last;
5738bc24
JW		 2959 int size;
2960 unsigned long last_addr = 0;
2961 fragS *last_frag = NULL;
542d6675
KH		 2962
2963 first_addr = ptr->slot_number;
f5a30c2e 2964 first_frag = ptr->slot_frag;
542d6675 2965 /* Find either the next body/prologue start, or the end of
5738bc24 2966 the function, and determine the size of the region. */
542d6675
KH		 2967 for (last = ptr->next; last != NULL; last = last->next)
2968 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2969 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2970 {
2971 last_addr = last->slot_number;
f5a30c2e 2972 last_frag = last->slot_frag;
542d6675
KH		 2973 break;
2974 }
b5e0fabd
JW		 2975 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2976 before_relax);
542d6675 2977 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2978 if (ptr->r.type == body)
2979 /* End of region. */
2980 region = 0;
2981 else
2982 region = ptr;
e0c9811a 2983 break;
542d6675
KH		 2984 }
2985 case epilogue:
ed7af9f9
L		 2986 if (t < rlen)
2987 ptr->r.record.b.t = rlen - 1 - t;
2988 else
2989 /* This happens when a memory-stack-less procedure uses a
2990 ".restore sp" directive at the end of a region to pop
2991 the frame state. */
2992 ptr->r.record.b.t = 0;
542d6675 2993 break;
e0c9811a 2994
542d6675
KH		 2995 case mem_stack_f:
2996 case mem_stack_v:
2997 case rp_when:
2998 case pfs_when:
2999 case preds_when:
3000 case unat_when:
3001 case lc_when:
3002 case fpsr_when:
3003 case priunat_when_gr:
3004 case priunat_when_mem:
3005 case bsp_when:
3006 case bspstore_when:
3007 case rnat_when:
3008 ptr->r.record.p.t = t;
3009 break;
e0c9811a 3010
542d6675
KH		 3011 case spill_reg:
3012 case spill_sprel:
3013 case spill_psprel:
3014 case spill_reg_p:
3015 case spill_sprel_p:
3016 case spill_psprel_p:
3017 ptr->r.record.x.t = t;
3018 break;
e0c9811a 3019
542d6675
KH		 3020 case frgr_mem:
3021 if (!region)
3022 {
ad4b42b4 3023 as_bad (_("frgr_mem record before region record!"));
542d6675
KH		 3024 return;
3025 }
3026 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3027 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3028 set_imask (region, ptr->r.record.p.frmask, t, 1);
3029 set_imask (region, ptr->r.record.p.grmask, t, 2);
3030 break;
3031 case fr_mem:
3032 if (!region)
3033 {
ad4b42b4 3034 as_bad (_("fr_mem record before region record!"));
542d6675
KH		 3035 return;
3036 }
ba825241
JB		 3037 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3038 set_imask (region, ptr->r.record.p.frmask, t, 1);
542d6675
KH		 3039 break;
3040 case gr_mem:
3041 if (!region)
3042 {
ad4b42b4 3043 as_bad (_("gr_mem record before region record!"));
542d6675
KH		 3044 return;
3045 }
ba825241
JB		 3046 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3047 set_imask (region, ptr->r.record.p.grmask, t, 2);
542d6675
KH		 3048 break;
3049 case br_mem:
3050 if (!region)
3051 {
ad4b42b4 3052 as_bad (_("br_mem record before region record!"));
542d6675
KH		 3053 return;
3054 }
3055 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
3056 set_imask (region, ptr->r.record.p.brmask, t, 3);
3057 break;
e0c9811a 3058
542d6675
KH		 3059 case gr_gr:
3060 if (!region)
3061 {
ad4b42b4 3062 as_bad (_("gr_gr record before region record!"));
542d6675
KH		 3063 return;
3064 }
3065 set_imask (region, ptr->r.record.p.grmask, t, 2);
3066 break;
3067 case br_gr:
3068 if (!region)
3069 {
ad4b42b4 3070 as_bad (_("br_gr record before region record!"));
542d6675
KH		 3071 return;
3072 }
3073 set_imask (region, ptr->r.record.p.brmask, t, 3);
3074 break;
e0c9811a 3075
542d6675
KH		 3076 default:
3077 break;
800eeca4
JW		 3078 }
3079 }
3080}
3081
b5e0fabd
JW		 3082/* Estimate the size of a frag before relaxing. We only have one type of frag
3083 to handle here, which is the unwind info frag. */
3084
3085int
3086ia64_estimate_size_before_relax (fragS *frag,
3087 asection *segtype ATTRIBUTE_UNUSED)
3088{
3089 unw_rec_list *list;
3090 int len, size, pad;
3091
3092 /* ??? This code is identical to the first part of ia64_convert_frag. */
3093 list = (unw_rec_list *) frag->fr_opcode;
3094 fixup_unw_records (list, 0);
3095
3096 len = calc_record_size (list);
3097 /* pad to pointer-size boundary. */
3098 pad = len % md.pointer_size;
3099 if (pad != 0)
3100 len += md.pointer_size - pad;
f7e323d5
JB		 3101 /* Add 8 for the header. */
3102 size = len + 8;
3103 /* Add a pointer for the personality offset. */
3104 if (frag->fr_offset)
3105 size += md.pointer_size;
b5e0fabd
JW		 3106
3107 /* fr_var carries the max_chars that we created the fragment with.
3108 We must, of course, have allocated enough memory earlier. */
3109 assert (frag->fr_var >= size);
3110
3111 return frag->fr_fix + size;
3112}
3113
73f20958
L		 3114/* This function converts a rs_machine_dependent variant frag into a
3115 normal fill frag with the unwind image from the the record list. */
3116void
3117ia64_convert_frag (fragS *frag)
557debba 3118{
73f20958
L		 3119 unw_rec_list *list;
3120 int len, size, pad;
1cd8ff38 3121 valueT flag_value;
557debba 3122
b5e0fabd 3123 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 3124 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 3125 fixup_unw_records (list, 0);
1cd8ff38 3126
73f20958
L		 3127 len = calc_record_size (list);
3128 /* pad to pointer-size boundary. */
3129 pad = len % md.pointer_size;
3130 if (pad != 0)
3131 len += md.pointer_size - pad;
f7e323d5
JB		 3132 /* Add 8 for the header. */
3133 size = len + 8;
3134 /* Add a pointer for the personality offset. */
3135 if (frag->fr_offset)
3136 size += md.pointer_size;
73f20958
L		 3137
3138 /* fr_var carries the max_chars that we created the fragment with.
3139 We must, of course, have allocated enough memory earlier. */
3140 assert (frag->fr_var >= size);
3141
3142 /* Initialize the header area. fr_offset is initialized with
3143 unwind.personality_routine. */
3144 if (frag->fr_offset)
1cd8ff38
NC		 3145 {
3146 if (md.flags & EF_IA_64_ABI64)
3147 flag_value = (bfd_vma) 3 << 32;
3148 else
3149 /* 32-bit unwind info block. */
3150 flag_value = (bfd_vma) 0x1003 << 32;
3151 }
3152 else
3153 flag_value = 0;
557debba 3154
73f20958
L		 3155 md_number_to_chars (frag->fr_literal,
3156 (((bfd_vma) 1 << 48) /* Version. */
3157 | flag_value /* U & E handler flags. */
3158 | (len / md.pointer_size)), /* Length. */
3159 8);
557debba 3160
73f20958
L		 3161 /* Skip the header. */
3162 vbyte_mem_ptr = frag->fr_literal + 8;
3163 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 3164
3165 /* Fill the padding bytes with zeros. */
3166 if (pad != 0)
3167 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
3168 md.pointer_size - pad);
3169
73f20958
L		 3170 frag->fr_fix += size;
3171 frag->fr_type = rs_fill;
3172 frag->fr_var = 0;
3173 frag->fr_offset = 0;
800eeca4
JW		 3174}
3175
e0c9811a 3176static int
e4e8248d
JB		 3177parse_predicate_and_operand (e, qp, po)
3178 expressionS * e;
3179 unsigned * qp;
3180 const char * po;
3181{
3182 int sep = parse_operand (e, ',');
3183
3184 *qp = e->X_add_number - REG_P;
3185 if (e->X_op != O_register || *qp > 63)
3186 {
ad4b42b4 3187 as_bad (_("First operand to .%s must be a predicate"), po);
e4e8248d
JB		 3188 *qp = 0;
3189 }
3190 else if (*qp == 0)
ad4b42b4 3191 as_warn (_("Pointless use of p0 as first operand to .%s"), po);
e4e8248d
JB		 3192 if (sep == ',')
3193 sep = parse_operand (e, ',');
3194 else
3195 e->X_op = O_absent;
3196 return sep;
3197}
3198
3199static void
3200convert_expr_to_ab_reg (e, ab, regp, po, n)
3201 const expressionS *e;
e0c9811a
JW		 3202 unsigned int *ab;
3203 unsigned int *regp;
e4e8248d
JB		 3204 const char * po;
3205 int n;
e0c9811a 3206{
e4e8248d
JB		 3207 unsigned int reg = e->X_add_number;
3208
3209 *ab = *regp = 0; /* Anything valid is good here. */
e0c9811a
JW		 3210
3211 if (e->X_op != O_register)
e4e8248d 3212 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3213
2434f565 3214 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 3215 {
3216 *ab = 0;
3217 *regp = reg - REG_GR;
3218 }
2434f565
JW		 3219 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3220 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 3221 {
3222 *ab = 1;
3223 *regp = reg - REG_FR;
3224 }
2434f565 3225 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 3226 {
3227 *ab = 2;
3228 *regp = reg - REG_BR;
3229 }
3230 else
3231 {
3232 *ab = 3;
3233 switch (reg)
3234 {
3235 case REG_PR: *regp = 0; break;
3236 case REG_PSP: *regp = 1; break;
3237 case REG_PRIUNAT: *regp = 2; break;
3238 case REG_BR + 0: *regp = 3; break;
3239 case REG_AR + AR_BSP: *regp = 4; break;
3240 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3241 case REG_AR + AR_RNAT: *regp = 6; break;
3242 case REG_AR + AR_UNAT: *regp = 7; break;
3243 case REG_AR + AR_FPSR: *regp = 8; break;
3244 case REG_AR + AR_PFS: *regp = 9; break;
3245 case REG_AR + AR_LC: *regp = 10; break;
3246
3247 default:
ad4b42b4 3248 as_bad (_("Operand %d to .%s must be a preserved register"), n, po);
e4e8248d 3249 break;
e0c9811a
JW		 3250 }
3251 }
197865e8 3252}
e0c9811a 3253
e4e8248d
JB		 3254static void
3255convert_expr_to_xy_reg (e, xy, regp, po, n)
3256 const expressionS *e;
e0c9811a
JW		 3257 unsigned int *xy;
3258 unsigned int *regp;
e4e8248d
JB		 3259 const char * po;
3260 int n;
e0c9811a 3261{
e4e8248d 3262 unsigned int reg = e->X_add_number;
e0c9811a 3263
e4e8248d 3264 *xy = *regp = 0; /* Anything valid is good here. */
e0c9811a 3265
e4e8248d
JB		 3266 if (e->X_op != O_register)
3267 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3268
e4e8248d 3269 if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127))
e0c9811a
JW		 3270 {
3271 *xy = 0;
3272 *regp = reg - REG_GR;
3273 }
e4e8248d 3274 else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127))
e0c9811a
JW		 3275 {
3276 *xy = 1;
3277 *regp = reg - REG_FR;
3278 }
2434f565 3279 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3280 {
3281 *xy = 2;
3282 *regp = reg - REG_BR;
3283 }
3284 else
ad4b42b4 3285 as_bad (_("Operand %d to .%s must be a writable register"), n, po);
197865e8 3286}
e0c9811a 3287
d9201763
L		 3288static void
3289dot_align (int arg)
3290{
3291 /* The current frag is an alignment frag. */
3292 align_frag = frag_now;
3293 s_align_bytes (arg);
3294}
3295
800eeca4
JW		 3296static void
3297dot_radix (dummy)
2434f565 3298 int dummy ATTRIBUTE_UNUSED;
800eeca4 3299{
fa30c84f
JB		 3300 char *radix;
3301 int ch;
800eeca4
JW		 3302
3303 SKIP_WHITESPACE ();
800eeca4 3304
fa30c84f
JB		 3305 if (is_it_end_of_statement ())
3306 return;
3307 radix = input_line_pointer;
3308 ch = get_symbol_end ();
3309 ia64_canonicalize_symbol_name (radix);
3310 if (strcasecmp (radix, "C"))
ad4b42b4 3311 as_bad (_("Radix `%s' unsupported or invalid"), radix);
fa30c84f
JB		 3312 *input_line_pointer = ch;
3313 demand_empty_rest_of_line ();
800eeca4
JW		 3314}
3315
196e8040
JW		 3316/* Helper function for .loc directives. If the assembler is not generating
3317 line number info, then we need to remember which instructions have a .loc
3318 directive, and only call dwarf2_gen_line_info for those instructions. */
3319
3320static void
3321dot_loc (int x)
3322{
3323 CURR_SLOT.loc_directive_seen = 1;
3324 dwarf2_directive_loc (x);
3325}
3326
800eeca4
JW		 3327/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3328static void
3329dot_special_section (which)
3330 int which;
3331{
3332 set_section ((char *) special_section_name[which]);
3333}
3334
07450571
L		 3335/* Return -1 for warning and 0 for error. */
3336
3337static int
970d6792
L		 3338unwind_diagnostic (const char * region, const char *directive)
3339{
3340 if (md.unwind_check == unwind_check_warning)
07450571 3341 {
ad4b42b4 3342 as_warn (_(".%s outside of %s"), directive, region);
07450571
L		 3343 return -1;
3344 }
970d6792
L		 3345 else
3346 {
ad4b42b4 3347 as_bad (_(".%s outside of %s"), directive, region);
970d6792 3348 ignore_rest_of_line ();
07450571 3349 return 0;
970d6792
L		 3350 }
3351}
3352
07450571
L		 3353/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3354 a procedure but the unwind directive check is set to warning, 0 if
3355 a directive isn't in a procedure and the unwind directive check is set
3356 to error. */
3357
75e09913
JB		 3358static int
3359in_procedure (const char *directive)
3360{
5656b6b8 3361 if (unwind.proc_pending.sym
75e09913
JB		 3362 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3363 return 1;
07450571 3364 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3365}
3366
07450571
L		 3367/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3368 a prologue but the unwind directive check is set to warning, 0 if
3369 a directive isn't in a prologue and the unwind directive check is set
3370 to error. */
3371
75e09913
JB		 3372static int
3373in_prologue (const char *directive)
3374{
07450571 3375 int in = in_procedure (directive);
ba825241
JB		 3376
3377 if (in > 0 && !unwind.prologue)
3378 in = unwind_diagnostic ("prologue", directive);
3379 check_pending_save ();
3380 return in;
75e09913
JB		 3381}
3382
07450571
L		 3383/* Return 1 if a directive is in a body, -1 if a directive isn't in
3384 a body but the unwind directive check is set to warning, 0 if
3385 a directive isn't in a body and the unwind directive check is set
3386 to error. */
3387
75e09913
JB		 3388static int
3389in_body (const char *directive)
3390{
07450571 3391 int in = in_procedure (directive);
ba825241
JB		 3392
3393 if (in > 0 && !unwind.body)
3394 in = unwind_diagnostic ("body region", directive);
3395 return in;
75e09913
JB		 3396}
3397
800eeca4 3398static void
e4e8248d 3399add_unwind_entry (ptr, sep)
800eeca4 3400 unw_rec_list *ptr;
e4e8248d 3401 int sep;
800eeca4 3402{
e4e8248d
JB		 3403 if (ptr)
3404 {
3405 if (unwind.tail)
3406 unwind.tail->next = ptr;
3407 else
3408 unwind.list = ptr;
3409 unwind.tail = ptr;
3410
3411 /* The current entry can in fact be a chain of unwind entries. */
3412 if (unwind.current_entry == NULL)
3413 unwind.current_entry = ptr;
3414 }
800eeca4
JW		 3415
3416 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3417 if (unwind.current_entry == NULL)
3418 unwind.current_entry = ptr;
e4e8248d
JB		 3419
3420 if (sep == ',')
3421 {
3422 /* Parse a tag permitted for the current directive. */
3423 int ch;
3424
3425 SKIP_WHITESPACE ();
3426 ch = get_symbol_end ();
3427 /* FIXME: For now, just issue a warning that this isn't implemented. */
3428 {
3429 static int warned;
3430
3431 if (!warned)
3432 {
3433 warned = 1;
ad4b42b4 3434 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
e4e8248d
JB		 3435 }
3436 }
3437 *input_line_pointer = ch;
3438 }
3439 if (sep != NOT_A_CHAR)
3440 demand_empty_rest_of_line ();
800eeca4
JW		 3441}
3442
197865e8 3443static void
800eeca4 3444dot_fframe (dummy)
2434f565 3445 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3446{
3447 expressionS e;
e4e8248d 3448 int sep;
e0c9811a 3449
75e09913
JB		 3450 if (!in_prologue ("fframe"))
3451 return;
3452
e4e8248d 3453 sep = parse_operand (&e, ',');
197865e8 3454
800eeca4 3455 if (e.X_op != O_constant)
e4e8248d 3456 {
ad4b42b4 3457 as_bad (_("First operand to .fframe must be a constant"));
e4e8248d
JB		 3458 e.X_add_number = 0;
3459 }
3460 add_unwind_entry (output_mem_stack_f (e.X_add_number), sep);
e0c9811a
JW		 3461}
3462
197865e8 3463static void
e0c9811a 3464dot_vframe (dummy)
2434f565 3465 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3466{
3467 expressionS e;
3468 unsigned reg;
e4e8248d 3469 int sep;
e0c9811a 3470
75e09913
JB		 3471 if (!in_prologue ("vframe"))
3472 return;
3473
e4e8248d 3474 sep = parse_operand (&e, ',');
e0c9811a 3475 reg = e.X_add_number - REG_GR;
e4e8248d 3476 if (e.X_op != O_register || reg > 127)
800eeca4 3477 {
ad4b42b4 3478 as_bad (_("First operand to .vframe must be a general register"));
e4e8248d 3479 reg = 0;
800eeca4 3480 }
e4e8248d
JB		 3481 add_unwind_entry (output_mem_stack_v (), sep);
3482 if (! (unwind.prologue_mask & 2))
3483 add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR);
3484 else if (reg != unwind.prologue_gr
3485 + (unsigned) popcount (unwind.prologue_mask & (-2 << 1)))
ad4b42b4 3486 as_warn (_("Operand of .vframe contradicts .prologue"));
800eeca4
JW		 3487}
3488
197865e8 3489static void
e4e8248d
JB		 3490dot_vframesp (psp)
3491 int psp;
800eeca4 3492{
e0c9811a 3493 expressionS e;
e4e8248d 3494 int sep;
e0c9811a 3495
e4e8248d 3496 if (psp)
ad4b42b4 3497 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
e0c9811a 3498
e4e8248d 3499 if (!in_prologue ("vframesp"))
75e09913
JB		 3500 return;
3501
e4e8248d
JB		 3502 sep = parse_operand (&e, ',');
3503 if (e.X_op != O_constant)
e0c9811a 3504 {
ad4b42b4 3505 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
e4e8248d 3506 e.X_add_number = 0;
e0c9811a 3507 }
e4e8248d
JB		 3508 add_unwind_entry (output_mem_stack_v (), sep);
3509 add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR);
800eeca4
JW		 3510}
3511
197865e8 3512static void
800eeca4 3513dot_save (dummy)
2434f565 3514 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3515{
3516 expressionS e1, e2;
e4e8248d 3517 unsigned reg1, reg2;
800eeca4 3518 int sep;
800eeca4 3519
75e09913
JB		 3520 if (!in_prologue ("save"))
3521 return;
3522
e4e8248d
JB		 3523 sep = parse_operand (&e1, ',');
3524 if (sep == ',')
3525 sep = parse_operand (&e2, ',');
3526 else
3527 e2.X_op = O_absent;
800eeca4 3528
e0c9811a 3529 reg1 = e1.X_add_number;
800eeca4 3530 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3531 if (e1.X_op != O_register)
800eeca4 3532 {
ad4b42b4 3533 as_bad (_("First operand to .save not a register"));
e4e8248d
JB		 3534 reg1 = REG_PR; /* Anything valid is good here. */
3535 }
3536 reg2 = e2.X_add_number - REG_GR;
3537 if (e2.X_op != O_register || reg2 > 127)
3538 {
ad4b42b4 3539 as_bad (_("Second operand to .save not a valid register"));
e4e8248d
JB		 3540 reg2 = 0;
3541 }
3542 switch (reg1)
3543 {
3544 case REG_AR + AR_BSP:
3545 add_unwind_entry (output_bsp_when (), sep);
3546 add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR);
3547 break;
3548 case REG_AR + AR_BSPSTORE:
3549 add_unwind_entry (output_bspstore_when (), sep);
3550 add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR);
3551 break;
3552 case REG_AR + AR_RNAT:
3553 add_unwind_entry (output_rnat_when (), sep);
3554 add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR);
3555 break;
3556 case REG_AR + AR_UNAT:
3557 add_unwind_entry (output_unat_when (), sep);
3558 add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR);
3559 break;
3560 case REG_AR + AR_FPSR:
3561 add_unwind_entry (output_fpsr_when (), sep);
3562 add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR);
3563 break;
3564 case REG_AR + AR_PFS:
3565 add_unwind_entry (output_pfs_when (), sep);
3566 if (! (unwind.prologue_mask & 4))
3567 add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR);
3568 else if (reg2 != unwind.prologue_gr
3569 + (unsigned) popcount (unwind.prologue_mask & (-4 << 1)))
ad4b42b4 3570 as_warn (_("Second operand of .save contradicts .prologue"));
e4e8248d
JB		 3571 break;
3572 case REG_AR + AR_LC:
3573 add_unwind_entry (output_lc_when (), sep);
3574 add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR);
3575 break;
3576 case REG_BR:
3577 add_unwind_entry (output_rp_when (), sep);
3578 if (! (unwind.prologue_mask & 8))
3579 add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR);
3580 else if (reg2 != unwind.prologue_gr)
ad4b42b4 3581 as_warn (_("Second operand of .save contradicts .prologue"));
e4e8248d
JB		 3582 break;
3583 case REG_PR:
3584 add_unwind_entry (output_preds_when (), sep);
3585 if (! (unwind.prologue_mask & 1))
3586 add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR);
3587 else if (reg2 != unwind.prologue_gr
3588 + (unsigned) popcount (unwind.prologue_mask & (-1 << 1)))
ad4b42b4 3589 as_warn (_("Second operand of .save contradicts .prologue"));
e4e8248d
JB		 3590 break;
3591 case REG_PRIUNAT:
3592 add_unwind_entry (output_priunat_when_gr (), sep);
3593 add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR);
3594 break;
3595 default:
ad4b42b4 3596 as_bad (_("First operand to .save not a valid register"));
e4e8248d
JB		 3597 add_unwind_entry (NULL, sep);
3598 break;
800eeca4 3599 }
800eeca4
JW		 3600}
3601
197865e8 3602static void
800eeca4 3603dot_restore (dummy)
2434f565 3604 int dummy ATTRIBUTE_UNUSED;
800eeca4 3605{
e4e8248d 3606 expressionS e1;
33d01f33 3607 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3608 int sep;
3609
75e09913
JB		 3610 if (!in_body ("restore"))
3611 return;
3612
e4e8248d 3613 sep = parse_operand (&e1, ',');
e0c9811a 3614 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
ad4b42b4 3615 as_bad (_("First operand to .restore must be stack pointer (sp)"));
e0c9811a
JW		 3616
3617 if (sep == ',')
3618 {
e4e8248d
JB		 3619 expressionS e2;
3620
3621 sep = parse_operand (&e2, ',');
33d01f33 3622 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3623 {
ad4b42b4 3624 as_bad (_("Second operand to .restore must be a constant >= 0"));
e4e8248d 3625 e2.X_add_number = 0;
e0c9811a 3626 }
33d01f33 3627 ecount = e2.X_add_number;
e0c9811a 3628 }
33d01f33
JW		 3629 else
3630 ecount = unwind.prologue_count - 1;
6290819d
NC		 3631
3632 if (ecount >= unwind.prologue_count)
3633 {
ad4b42b4 3634 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
6290819d 3635 ecount + 1, unwind.prologue_count);
e4e8248d 3636 ecount = 0;
6290819d
NC		 3637 }
3638
e4e8248d 3639 add_unwind_entry (output_epilogue (ecount), sep);
33d01f33
JW		 3640
3641 if (ecount < unwind.prologue_count)
3642 unwind.prologue_count -= ecount + 1;
3643 else
3644 unwind.prologue_count = 0;
e0c9811a
JW		 3645}
3646
197865e8 3647static void
e4e8248d
JB		 3648dot_restorereg (pred)
3649 int pred;
e0c9811a
JW		 3650{
3651 unsigned int qp, ab, reg;
e4e8248d 3652 expressionS e;
e0c9811a 3653 int sep;
e4e8248d 3654 const char * const po = pred ? "restorereg.p" : "restorereg";
e0c9811a 3655
e4e8248d 3656 if (!in_procedure (po))
75e09913
JB		 3657 return;
3658
e4e8248d
JB		 3659 if (pred)
3660 sep = parse_predicate_and_operand (&e, &qp, po);
3661 else
e0c9811a 3662 {
e4e8248d
JB		 3663 sep = parse_operand (&e, ',');
3664 qp = 0;
e0c9811a 3665 }
e4e8248d 3666 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 3667
e4e8248d 3668 add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
800eeca4
JW		 3669}
3670
2d6ed997
L		 3671static char *special_linkonce_name[] =
3672 {
3673 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3674 };
3675
3676static void
da9f89d4 3677start_unwind_section (const segT text_seg, int sec_index)
2d6ed997
L		 3678{
3679 /*
3680 Use a slightly ugly scheme to derive the unwind section names from
3681 the text section name:
3682
3683 text sect. unwind table sect.
3684 name: name: comments:
3685 ---------- ----------------- --------------------------------
3686 .text .IA_64.unwind
3687 .text.foo .IA_64.unwind.text.foo
3688 .foo .IA_64.unwind.foo
3689 .gnu.linkonce.t.foo
3690 .gnu.linkonce.ia64unw.foo
3691 _info .IA_64.unwind_info gas issues error message (ditto)
3692 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3693
3694 This mapping is done so that:
3695
3696 (a) An object file with unwind info only in .text will use
3697 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3698 This follows the letter of the ABI and also ensures backwards
3699 compatibility with older toolchains.
3700
3701 (b) An object file with unwind info in multiple text sections
3702 will use separate unwind sections for each text section.
3703 This allows us to properly set the "sh_info" and "sh_link"
3704 fields in SHT_IA_64_UNWIND as required by the ABI and also
3705 lets GNU ld support programs with multiple segments
3706 containing unwind info (as might be the case for certain
3707 embedded applications).
3708
3709 (c) An error is issued if there would be a name clash.
3710 */
3711
3712 const char *text_name, *sec_text_name;
3713 char *sec_name;
3714 const char *prefix = special_section_name [sec_index];
3715 const char *suffix;
3716 size_t prefix_len, suffix_len, sec_name_len;
3717
3718 sec_text_name = segment_name (text_seg);
3719 text_name = sec_text_name;
3720 if (strncmp (text_name, "_info", 5) == 0)
3721 {
ad4b42b4 3722 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
2d6ed997
L		 3723 text_name);
3724 ignore_rest_of_line ();
3725 return;
3726 }
3727 if (strcmp (text_name, ".text") == 0)
3728 text_name = "";
3729
3730 /* Build the unwind section name by appending the (possibly stripped)
3731 text section name to the unwind prefix. */
3732 suffix = text_name;
3733 if (strncmp (text_name, ".gnu.linkonce.t.",
3734 sizeof (".gnu.linkonce.t.") - 1) == 0)
3735 {
3736 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3737 suffix += sizeof (".gnu.linkonce.t.") - 1;
3738 }
3739
3740 prefix_len = strlen (prefix);
3741 suffix_len = strlen (suffix);
3742 sec_name_len = prefix_len + suffix_len;
3743 sec_name = alloca (sec_name_len + 1);
3744 memcpy (sec_name, prefix, prefix_len);
3745 memcpy (sec_name + prefix_len, suffix, suffix_len);
3746 sec_name [sec_name_len] = '\0';
3747
3748 /* Handle COMDAT group. */
6e3f953d
L		 3749 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3750 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
2d6ed997
L		 3751 {
3752 char *section;
3753 size_t len, group_name_len;
3754 const char *group_name = elf_group_name (text_seg);
3755
3756 if (group_name == NULL)
3757 {
ad4b42b4 3758 as_bad (_("Group section `%s' has no group signature"),
2d6ed997
L		 3759 sec_text_name);
3760 ignore_rest_of_line ();
3761 return;
3762 }
3763 /* We have to construct a fake section directive. */
3764 group_name_len = strlen (group_name);
3765 len = (sec_name_len
3766 + 16 /* ,"aG",@progbits, */
3767 + group_name_len /* ,group_name */
3768 + 7); /* ,comdat */
3769
3770 section = alloca (len + 1);
3771 memcpy (section, sec_name, sec_name_len);
3772 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3773 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3774 memcpy (section + len - 7, ",comdat", 7);
3775 section [len] = '\0';
3776 set_section (section);
3777 }
3778 else
3779 {
3780 set_section (sec_name);
3781 bfd_set_section_flags (stdoutput, now_seg,
3782 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3783 }
38ce5b11
L		 3784
3785 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3786}
3787
73f20958 3788static void
2d6ed997 3789generate_unwind_image (const segT text_seg)
800eeca4 3790{
73f20958
L		 3791 int size, pad;
3792 unw_rec_list *list;
800eeca4 3793
c97b7ef6
JW		 3794 /* Mark the end of the unwind info, so that we can compute the size of the
3795 last unwind region. */
e4e8248d 3796 add_unwind_entry (output_endp (), NOT_A_CHAR);
c97b7ef6 3797
10850f29
JW		 3798 /* Force out pending instructions, to make sure all unwind records have
3799 a valid slot_number field. */
3800 ia64_flush_insns ();
3801
800eeca4 3802 /* Generate the unwind record. */
73f20958 3803 list = optimize_unw_records (unwind.list);
b5e0fabd 3804 fixup_unw_records (list, 1);
73f20958
L		 3805 size = calc_record_size (list);
3806
3807 if (size > 0 || unwind.force_unwind_entry)
3808 {
3809 unwind.force_unwind_entry = 0;
3810 /* pad to pointer-size boundary. */
3811 pad = size % md.pointer_size;
3812 if (pad != 0)
3813 size += md.pointer_size - pad;
f7e323d5
JB		 3814 /* Add 8 for the header. */
3815 size += 8;
3816 /* Add a pointer for the personality offset. */
3817 if (unwind.personality_routine)
3818 size += md.pointer_size;
73f20958 3819 }
6290819d 3820
800eeca4
JW		 3821 /* If there are unwind records, switch sections, and output the info. */
3822 if (size != 0)
3823 {
800eeca4 3824 expressionS exp;
1cd8ff38 3825 bfd_reloc_code_real_type reloc;
91a2ae2a 3826
da9f89d4 3827 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3828
557debba
JW		 3829 /* Make sure the section has 4 byte alignment for ILP32 and
3830 8 byte alignment for LP64. */
3831 frag_align (md.pointer_size_shift, 0, 0);
3832 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3833
800eeca4 3834 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3835 unwind.info = expr_build_dot ();
73f20958
L		 3836
3837 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3838 (offsetT) (long) unwind.personality_routine,
3839 (char *) list);
91a2ae2a 3840
800eeca4 3841 /* Add the personality address to the image. */
e0c9811a 3842 if (unwind.personality_routine != 0)
542d6675 3843 {
40449e9f 3844 exp.X_op = O_symbol;
e0c9811a 3845 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3846 exp.X_add_number = 0;
1cd8ff38
NC		 3847
3848 if (md.flags & EF_IA_64_BE)
3849 {
3850 if (md.flags & EF_IA_64_ABI64)
3851 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3852 else
3853 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3854 }
40449e9f 3855 else
1cd8ff38
NC		 3856 {
3857 if (md.flags & EF_IA_64_ABI64)
3858 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3859 else
3860 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3861 }
3862
3863 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3864 md.pointer_size, &exp, 0, reloc);
e0c9811a 3865 unwind.personality_routine = 0;
542d6675 3866 }
800eeca4
JW		 3867 }
3868
6290819d 3869 free_saved_prologue_counts ();
e0c9811a 3870 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3871}
3872
197865e8 3873static void
542d6675 3874dot_handlerdata (dummy)
2434f565 3875 int dummy ATTRIBUTE_UNUSED;
800eeca4 3876{
75e09913
JB		 3877 if (!in_procedure ("handlerdata"))
3878 return;
91a2ae2a
RH		 3879 unwind.force_unwind_entry = 1;
3880
3881 /* Remember which segment we're in so we can switch back after .endp */
3882 unwind.saved_text_seg = now_seg;
3883 unwind.saved_text_subseg = now_subseg;
3884
3885 /* Generate unwind info into unwind-info section and then leave that
3886 section as the currently active one so dataXX directives go into
3887 the language specific data area of the unwind info block. */
2d6ed997 3888 generate_unwind_image (now_seg);
e0c9811a 3889 demand_empty_rest_of_line ();
800eeca4
JW		 3890}
3891
197865e8 3892static void
800eeca4 3893dot_unwentry (dummy)
2434f565 3894 int dummy ATTRIBUTE_UNUSED;
800eeca4 3895{
75e09913
JB		 3896 if (!in_procedure ("unwentry"))
3897 return;
91a2ae2a 3898 unwind.force_unwind_entry = 1;
e0c9811a 3899 demand_empty_rest_of_line ();
800eeca4
JW		 3900}
3901
197865e8 3902static void
800eeca4 3903dot_altrp (dummy)
2434f565 3904 int dummy ATTRIBUTE_UNUSED;
800eeca4 3905{
e0c9811a
JW		 3906 expressionS e;
3907 unsigned reg;
3908
75e09913
JB		 3909 if (!in_prologue ("altrp"))
3910 return;
3911
e4e8248d 3912 parse_operand (&e, 0);
e0c9811a 3913 reg = e.X_add_number - REG_BR;
e4e8248d
JB		 3914 if (e.X_op != O_register || reg > 7)
3915 {
ad4b42b4 3916 as_bad (_("First operand to .altrp not a valid branch register"));
e4e8248d
JB		 3917 reg = 0;
3918 }
3919 add_unwind_entry (output_rp_br (reg), 0);
800eeca4
JW		 3920}
3921
197865e8 3922static void
e0c9811a
JW		 3923dot_savemem (psprel)
3924 int psprel;
800eeca4
JW		 3925{
3926 expressionS e1, e2;
3927 int sep;
3928 int reg1, val;
e4e8248d 3929 const char * const po = psprel ? "savepsp" : "savesp";
800eeca4 3930
e4e8248d 3931 if (!in_prologue (po))
75e09913
JB		 3932 return;
3933
e4e8248d
JB		 3934 sep = parse_operand (&e1, ',');
3935 if (sep == ',')
3936 sep = parse_operand (&e2, ',');
3937 else
3938 e2.X_op = O_absent;
800eeca4 3939
e0c9811a 3940 reg1 = e1.X_add_number;
800eeca4 3941 val = e2.X_add_number;
197865e8 3942
800eeca4 3943 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3944 if (e1.X_op != O_register)
800eeca4 3945 {
ad4b42b4 3946 as_bad (_("First operand to .%s not a register"), po);
e4e8248d
JB		 3947 reg1 = REG_PR; /* Anything valid is good here. */
3948 }
3949 if (e2.X_op != O_constant)
3950 {
ad4b42b4 3951 as_bad (_("Second operand to .%s not a constant"), po);
e4e8248d
JB		 3952 val = 0;
3953 }
3954
3955 switch (reg1)
3956 {
3957 case REG_AR + AR_BSP:
3958 add_unwind_entry (output_bsp_when (), sep);
3959 add_unwind_entry ((psprel
3960 ? output_bsp_psprel
3961 : output_bsp_sprel) (val), NOT_A_CHAR);
3962 break;
3963 case REG_AR + AR_BSPSTORE:
3964 add_unwind_entry (output_bspstore_when (), sep);
3965 add_unwind_entry ((psprel
3966 ? output_bspstore_psprel
3967 : output_bspstore_sprel) (val), NOT_A_CHAR);
3968 break;
3969 case REG_AR + AR_RNAT:
3970 add_unwind_entry (output_rnat_when (), sep);
3971 add_unwind_entry ((psprel
3972 ? output_rnat_psprel
3973 : output_rnat_sprel) (val), NOT_A_CHAR);
3974 break;
3975 case REG_AR + AR_UNAT:
3976 add_unwind_entry (output_unat_when (), sep);
3977 add_unwind_entry ((psprel
3978 ? output_unat_psprel
3979 : output_unat_sprel) (val), NOT_A_CHAR);
3980 break;
3981 case REG_AR + AR_FPSR:
3982 add_unwind_entry (output_fpsr_when (), sep);
3983 add_unwind_entry ((psprel
3984 ? output_fpsr_psprel
3985 : output_fpsr_sprel) (val), NOT_A_CHAR);
3986 break;
3987 case REG_AR + AR_PFS:
3988 add_unwind_entry (output_pfs_when (), sep);
3989 add_unwind_entry ((psprel
3990 ? output_pfs_psprel
3991 : output_pfs_sprel) (val), NOT_A_CHAR);
3992 break;
3993 case REG_AR + AR_LC:
3994 add_unwind_entry (output_lc_when (), sep);
3995 add_unwind_entry ((psprel
3996 ? output_lc_psprel
3997 : output_lc_sprel) (val), NOT_A_CHAR);
3998 break;
3999 case REG_BR:
4000 add_unwind_entry (output_rp_when (), sep);
4001 add_unwind_entry ((psprel
4002 ? output_rp_psprel
4003 : output_rp_sprel) (val), NOT_A_CHAR);
4004 break;
4005 case REG_PR:
4006 add_unwind_entry (output_preds_when (), sep);
4007 add_unwind_entry ((psprel
4008 ? output_preds_psprel
4009 : output_preds_sprel) (val), NOT_A_CHAR);
4010 break;
4011 case REG_PRIUNAT:
4012 add_unwind_entry (output_priunat_when_mem (), sep);
4013 add_unwind_entry ((psprel
4014 ? output_priunat_psprel
4015 : output_priunat_sprel) (val), NOT_A_CHAR);
4016 break;
4017 default:
ad4b42b4 4018 as_bad (_("First operand to .%s not a valid register"), po);
e4e8248d
JB		 4019 add_unwind_entry (NULL, sep);
4020 break;
800eeca4 4021 }
800eeca4
JW		 4022}
4023
197865e8 4024static void
800eeca4 4025dot_saveg (dummy)
2434f565 4026 int dummy ATTRIBUTE_UNUSED;
800eeca4 4027{
e4e8248d
JB		 4028 expressionS e;
4029 unsigned grmask;
800eeca4 4030 int sep;
75e09913
JB		 4031
4032 if (!in_prologue ("save.g"))
4033 return;
4034
e4e8248d 4035 sep = parse_operand (&e, ',');
197865e8 4036
e4e8248d
JB		 4037 grmask = e.X_add_number;
4038 if (e.X_op != O_constant
4039 || e.X_add_number <= 0
4040 || e.X_add_number > 0xf)
800eeca4 4041 {
ad4b42b4 4042 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
e4e8248d
JB		 4043 grmask = 0;
4044 }
4045
4046 if (sep == ',')
4047 {
4048 unsigned reg;
4049 int n = popcount (grmask);
4050
4051 parse_operand (&e, 0);
4052 reg = e.X_add_number - REG_GR;
4053 if (e.X_op != O_register || reg > 127)
542d6675 4054 {
ad4b42b4 4055 as_bad (_("Second operand to .save.g must be a general register"));
e4e8248d
JB		 4056 reg = 0;
4057 }
4058 else if (reg > 128U - n)
4059 {
ad4b42b4 4060 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n);
e4e8248d 4061 reg = 0;
800eeca4 4062 }
e4e8248d 4063 add_unwind_entry (output_gr_gr (grmask, reg), 0);
800eeca4 4064 }
e4e8248d
JB		 4065 else
4066 add_unwind_entry (output_gr_mem (grmask), 0);
800eeca4
JW		 4067}
4068
197865e8 4069static void
800eeca4 4070dot_savef (dummy)
2434f565 4071 int dummy ATTRIBUTE_UNUSED;
800eeca4 4072{
e4e8248d 4073 expressionS e;
75e09913
JB		 4074
4075 if (!in_prologue ("save.f"))
4076 return;
4077
e4e8248d 4078 parse_operand (&e, 0);
197865e8 4079
e4e8248d
JB		 4080 if (e.X_op != O_constant
4081 || e.X_add_number <= 0
4082 || e.X_add_number > 0xfffff)
4083 {
ad4b42b4 4084 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
e4e8248d
JB		 4085 e.X_add_number = 0;
4086 }
4087 add_unwind_entry (output_fr_mem (e.X_add_number), 0);
800eeca4
JW		 4088}
4089
197865e8 4090static void
800eeca4 4091dot_saveb (dummy)
2434f565 4092 int dummy ATTRIBUTE_UNUSED;
800eeca4 4093{
e4e8248d
JB		 4094 expressionS e;
4095 unsigned brmask;
4096 int sep;
e0c9811a 4097
75e09913
JB		 4098 if (!in_prologue ("save.b"))
4099 return;
4100
e4e8248d
JB		 4101 sep = parse_operand (&e, ',');
4102
4103 brmask = e.X_add_number;
4104 if (e.X_op != O_constant
4105 || e.X_add_number <= 0
4106 || e.X_add_number > 0x1f)
800eeca4 4107 {
ad4b42b4 4108 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
e4e8248d 4109 brmask = 0;
800eeca4 4110 }
e0c9811a
JW		 4111
4112 if (sep == ',')
4113 {
e4e8248d
JB		 4114 unsigned reg;
4115 int n = popcount (brmask);
4116
4117 parse_operand (&e, 0);
4118 reg = e.X_add_number - REG_GR;
4119 if (e.X_op != O_register || reg > 127)
e0c9811a 4120 {
ad4b42b4 4121 as_bad (_("Second operand to .save.b must be a general register"));
e4e8248d 4122 reg = 0;
e0c9811a 4123 }
e4e8248d
JB		 4124 else if (reg > 128U - n)
4125 {
ad4b42b4 4126 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n);
e4e8248d
JB		 4127 reg = 0;
4128 }
4129 add_unwind_entry (output_br_gr (brmask, reg), 0);
e0c9811a
JW		 4130 }
4131 else
e4e8248d 4132 add_unwind_entry (output_br_mem (brmask), 0);
800eeca4
JW		 4133}
4134
197865e8 4135static void
800eeca4 4136dot_savegf (dummy)
2434f565 4137 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4138{
4139 expressionS e1, e2;
75e09913
JB		 4140
4141 if (!in_prologue ("save.gf"))
4142 return;
4143
e4e8248d
JB		 4144 if (parse_operand (&e1, ',') == ',')
4145 parse_operand (&e2, 0);
800eeca4 4146 else
e4e8248d
JB		 4147 e2.X_op = O_absent;
4148
4149 if (e1.X_op != O_constant
4150 || e1.X_add_number < 0
4151 || e1.X_add_number > 0xf)
4152 {
ad4b42b4 4153 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
e4e8248d
JB		 4154 e1.X_op = O_absent;
4155 e1.X_add_number = 0;
4156 }
4157 if (e2.X_op != O_constant
4158 || e2.X_add_number < 0
4159 || e2.X_add_number > 0xfffff)
800eeca4 4160 {
ad4b42b4 4161 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
e4e8248d
JB		 4162 e2.X_op = O_absent;
4163 e2.X_add_number = 0;
800eeca4 4164 }
e4e8248d
JB		 4165 if (e1.X_op == O_constant
4166 && e2.X_op == O_constant
4167 && e1.X_add_number == 0
4168 && e2.X_add_number == 0)
ad4b42b4 4169 as_bad (_("Operands to .save.gf may not be both zero"));
e4e8248d
JB		 4170
4171 add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4172}
4173
197865e8 4174static void
800eeca4 4175dot_spill (dummy)
2434f565 4176 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4177{
4178 expressionS e;
e0c9811a 4179
75e09913
JB		 4180 if (!in_prologue ("spill"))
4181 return;
4182
e4e8248d 4183 parse_operand (&e, 0);
197865e8 4184
800eeca4 4185 if (e.X_op != O_constant)
800eeca4 4186 {
ad4b42b4 4187 as_bad (_("Operand to .spill must be a constant"));
e4e8248d 4188 e.X_add_number = 0;
e0c9811a 4189 }
e4e8248d 4190 add_unwind_entry (output_spill_base (e.X_add_number), 0);
e0c9811a
JW		 4191}
4192
4193static void
e4e8248d
JB		 4194dot_spillreg (pred)
4195 int pred;
e0c9811a 4196{
2132e3a3 4197 int sep;
e4e8248d
JB		 4198 unsigned int qp, ab, xy, reg, treg;
4199 expressionS e;
4200 const char * const po = pred ? "spillreg.p" : "spillreg";
e0c9811a 4201
e4e8248d 4202 if (!in_procedure (po))
75e09913
JB		 4203 return;
4204
e4e8248d
JB		 4205 if (pred)
4206 sep = parse_predicate_and_operand (&e, &qp, po);
e0c9811a 4207 else
e0c9811a 4208 {
e4e8248d
JB		 4209 sep = parse_operand (&e, ',');
4210 qp = 0;
e0c9811a 4211 }
e4e8248d 4212 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4213
e4e8248d
JB		 4214 if (sep == ',')
4215 sep = parse_operand (&e, ',');
4216 else
4217 e.X_op = O_absent;
4218 convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred);
e0c9811a 4219
e4e8248d 4220 add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep);
e0c9811a
JW		 4221}
4222
4223static void
e4e8248d 4224dot_spillmem (psprel)
e0c9811a
JW		 4225 int psprel;
4226{
e4e8248d
JB		 4227 expressionS e;
4228 int pred = (psprel < 0), sep;
4229 unsigned int qp, ab, reg;
4230 const char * po;
e0c9811a 4231
e4e8248d 4232 if (pred)
e0c9811a 4233 {
e4e8248d
JB		 4234 psprel = ~psprel;
4235 po = psprel ? "spillpsp.p" : "spillsp.p";
e0c9811a 4236 }
e4e8248d
JB		 4237 else
4238 po = psprel ? "spillpsp" : "spillsp";
e0c9811a 4239
e4e8248d
JB		 4240 if (!in_procedure (po))
4241 return;
e0c9811a 4242
e4e8248d
JB		 4243 if (pred)
4244 sep = parse_predicate_and_operand (&e, &qp, po);
4245 else
e0c9811a 4246 {
e4e8248d
JB		 4247 sep = parse_operand (&e, ',');
4248 qp = 0;
e0c9811a 4249 }
e4e8248d 4250 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4251
e4e8248d
JB		 4252 if (sep == ',')
4253 sep = parse_operand (&e, ',');
4254 else
4255 e.X_op = O_absent;
4256 if (e.X_op != O_constant)
e0c9811a 4257 {
ad4b42b4 4258 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred, po);
e4e8248d 4259 e.X_add_number = 0;
e0c9811a
JW		 4260 }
4261
4262 if (psprel)
e4e8248d 4263 add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a 4264 else
e4e8248d 4265 add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a
JW		 4266}
4267
6290819d
NC		 4268static unsigned int
4269get_saved_prologue_count (lbl)
4270 unsigned long lbl;
4271{
4272 label_prologue_count *lpc = unwind.saved_prologue_counts;
4273
4274 while (lpc != NULL && lpc->label_number != lbl)
4275 lpc = lpc->next;
4276
4277 if (lpc != NULL)
4278 return lpc->prologue_count;
4279
ad4b42b4 4280 as_bad (_("Missing .label_state %ld"), lbl);
6290819d
NC		 4281 return 1;
4282}
4283
4284static void
4285save_prologue_count (lbl, count)
4286 unsigned long lbl;
4287 unsigned int count;
4288{
4289 label_prologue_count *lpc = unwind.saved_prologue_counts;
4290
4291 while (lpc != NULL && lpc->label_number != lbl)
4292 lpc = lpc->next;
4293
4294 if (lpc != NULL)
4295 lpc->prologue_count = count;
4296 else
4297 {
40449e9f 4298 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4299
4300 new_lpc->next = unwind.saved_prologue_counts;
4301 new_lpc->label_number = lbl;
4302 new_lpc->prologue_count = count;
4303 unwind.saved_prologue_counts = new_lpc;
4304 }
4305}
4306
4307static void
4308free_saved_prologue_counts ()
4309{
40449e9f
KH		 4310 label_prologue_count *lpc = unwind.saved_prologue_counts;
4311 label_prologue_count *next;
6290819d
NC		 4312
4313 while (lpc != NULL)
4314 {
4315 next = lpc->next;
4316 free (lpc);
4317 lpc = next;
4318 }
4319
4320 unwind.saved_prologue_counts = NULL;
4321}
4322
e0c9811a
JW		 4323static void
4324dot_label_state (dummy)
2434f565 4325 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4326{
4327 expressionS e;
4328
75e09913
JB		 4329 if (!in_body ("label_state"))
4330 return;
4331
e4e8248d
JB		 4332 parse_operand (&e, 0);
4333 if (e.X_op == O_constant)
4334 save_prologue_count (e.X_add_number, unwind.prologue_count);
4335 else
e0c9811a 4336 {
ad4b42b4 4337 as_bad (_("Operand to .label_state must be a constant"));
e4e8248d 4338 e.X_add_number = 0;
e0c9811a 4339 }
e4e8248d 4340 add_unwind_entry (output_label_state (e.X_add_number), 0);
e0c9811a
JW		 4341}
4342
4343static void
4344dot_copy_state (dummy)
2434f565 4345 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4346{
4347 expressionS e;
4348
75e09913
JB		 4349 if (!in_body ("copy_state"))
4350 return;
4351
e4e8248d
JB		 4352 parse_operand (&e, 0);
4353 if (e.X_op == O_constant)
4354 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4355 else
e0c9811a 4356 {
ad4b42b4 4357 as_bad (_("Operand to .copy_state must be a constant"));
e4e8248d 4358 e.X_add_number = 0;
e0c9811a 4359 }
e4e8248d 4360 add_unwind_entry (output_copy_state (e.X_add_number), 0);
800eeca4
JW		 4361}
4362
197865e8 4363static void
800eeca4 4364dot_unwabi (dummy)
2434f565 4365 int dummy ATTRIBUTE_UNUSED;
800eeca4 4366{
e0c9811a
JW		 4367 expressionS e1, e2;
4368 unsigned char sep;
4369
e4e8248d 4370 if (!in_prologue ("unwabi"))
75e09913
JB		 4371 return;
4372
e4e8248d
JB		 4373 sep = parse_operand (&e1, ',');
4374 if (sep == ',')
4375 parse_operand (&e2, 0);
4376 else
4377 e2.X_op = O_absent;
e0c9811a
JW		 4378
4379 if (e1.X_op != O_constant)
4380 {
ad4b42b4 4381 as_bad (_("First operand to .unwabi must be a constant"));
e4e8248d 4382 e1.X_add_number = 0;
e0c9811a
JW		 4383 }
4384
4385 if (e2.X_op != O_constant)
4386 {
ad4b42b4 4387 as_bad (_("Second operand to .unwabi must be a constant"));
e4e8248d 4388 e2.X_add_number = 0;
e0c9811a
JW		 4389 }
4390
e4e8248d 4391 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4392}
4393
197865e8 4394static void
800eeca4 4395dot_personality (dummy)
2434f565 4396 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4397{
4398 char *name, *p, c;
75e09913
JB		 4399 if (!in_procedure ("personality"))
4400 return;
800eeca4
JW		 4401 SKIP_WHITESPACE ();
4402 name = input_line_pointer;
4403 c = get_symbol_end ();
4404 p = input_line_pointer;
e0c9811a 4405 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4406 unwind.force_unwind_entry = 1;
800eeca4
JW		 4407 *p = c;
4408 SKIP_WHITESPACE ();
4409 demand_empty_rest_of_line ();
4410}
4411
4412static void
4413dot_proc (dummy)
2434f565 4414 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4415{
4416 char *name, *p, c;
4417 symbolS *sym;
5656b6b8
JB		 4418 proc_pending *pending, *last_pending;
4419
4420 if (unwind.proc_pending.sym)
4421 {
4422 (md.unwind_check == unwind_check_warning
4423 ? as_warn
ad4b42b4 4424 : as_bad) (_("Missing .endp after previous .proc"));
5656b6b8
JB		 4425 while (unwind.proc_pending.next)
4426 {
4427 pending = unwind.proc_pending.next;
4428 unwind.proc_pending.next = pending->next;
4429 free (pending);
4430 }
4431 }
4432 last_pending = NULL;
800eeca4 4433
e0c9811a 4434 /* Parse names of main and alternate entry points and mark them as
542d6675 4435 function symbols: */
800eeca4
JW		 4436 while (1)
4437 {
4438 SKIP_WHITESPACE ();
4439 name = input_line_pointer;
4440 c = get_symbol_end ();
4441 p = input_line_pointer;
75e09913 4442 if (!*name)
ad4b42b4 4443 as_bad (_("Empty argument of .proc"));
75e09913 4444 else
542d6675 4445 {
75e09913
JB		 4446 sym = symbol_find_or_make (name);
4447 if (S_IS_DEFINED (sym))
ad4b42b4 4448 as_bad (_("`%s' was already defined"), name);
5656b6b8
JB		 4449 else if (!last_pending)
4450 {
4451 unwind.proc_pending.sym = sym;
4452 last_pending = &unwind.proc_pending;
4453 }
4454 else
75e09913 4455 {
5656b6b8
JB		 4456 pending = xmalloc (sizeof (*pending));
4457 pending->sym = sym;
4458 last_pending = last_pending->next = pending;
75e09913
JB		 4459 }
4460 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4461 }
800eeca4
JW		 4462 *p = c;
4463 SKIP_WHITESPACE ();
4464 if (*input_line_pointer != ',')
4465 break;
4466 ++input_line_pointer;
4467 }
5656b6b8
JB		 4468 if (!last_pending)
4469 {
4470 unwind.proc_pending.sym = expr_build_dot ();
4471 last_pending = &unwind.proc_pending;
4472 }
4473 last_pending->next = NULL;
800eeca4
JW		 4474 demand_empty_rest_of_line ();
4475 ia64_do_align (16);
4476
75e09913 4477 unwind.prologue = 0;
33d01f33 4478 unwind.prologue_count = 0;
75e09913
JB		 4479 unwind.body = 0;
4480 unwind.insn = 0;
e0c9811a
JW		 4481 unwind.list = unwind.tail = unwind.current_entry = NULL;
4482 unwind.personality_routine = 0;
800eeca4
JW		 4483}
4484
4485static void
4486dot_body (dummy)
2434f565 4487 int dummy ATTRIBUTE_UNUSED;
800eeca4 4488{
75e09913
JB		 4489 if (!in_procedure ("body"))
4490 return;
4491 if (!unwind.prologue && !unwind.body && unwind.insn)
ad4b42b4 4492 as_warn (_("Initial .body should precede any instructions"));
ba825241 4493 check_pending_save ();
75e09913 4494
e0c9811a 4495 unwind.prologue = 0;
30d25259 4496 unwind.prologue_mask = 0;
75e09913 4497 unwind.body = 1;
30d25259 4498
e4e8248d 4499 add_unwind_entry (output_body (), 0);
800eeca4
JW		 4500}
4501
4502static void
4503dot_prologue (dummy)
2434f565 4504 int dummy ATTRIBUTE_UNUSED;
800eeca4 4505{
e4e8248d 4506 unsigned mask = 0, grsave = 0;
e0c9811a 4507
75e09913
JB		 4508 if (!in_procedure ("prologue"))
4509 return;
4510 if (unwind.prologue)
4511 {
ad4b42b4 4512 as_bad (_(".prologue within prologue"));
75e09913
JB		 4513 ignore_rest_of_line ();
4514 return;
4515 }
4516 if (!unwind.body && unwind.insn)
ad4b42b4 4517 as_warn (_("Initial .prologue should precede any instructions"));
75e09913 4518
e0c9811a 4519 if (!is_it_end_of_statement ())
800eeca4 4520 {
e4e8248d
JB		 4521 expressionS e;
4522 int n, sep = parse_operand (&e, ',');
30d25259 4523
e4e8248d
JB		 4524 if (e.X_op != O_constant
4525 || e.X_add_number < 0
4526 || e.X_add_number > 0xf)
ad4b42b4 4527 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
e4e8248d 4528 else if (e.X_add_number == 0)
ad4b42b4 4529 as_warn (_("Pointless use of zero first operand to .prologue"));
e4e8248d
JB		 4530 else
4531 mask = e.X_add_number;
4532 n = popcount (mask);
30d25259 4533
e4e8248d
JB		 4534 if (sep == ',')
4535 parse_operand (&e, 0);
800eeca4 4536 else
e4e8248d
JB		 4537 e.X_op = O_absent;
4538 if (e.X_op == O_constant
4539 && e.X_add_number >= 0
4540 && e.X_add_number < 128)
4541 {
4542 if (md.unwind_check == unwind_check_error)
ad4b42b4 4543 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
e4e8248d
JB		 4544 grsave = e.X_add_number;
4545 }
4546 else if (e.X_op != O_register
4547 || (grsave = e.X_add_number - REG_GR) > 127)
4548 {
ad4b42b4 4549 as_bad (_("Second operand to .prologue must be a general register"));
e4e8248d
JB		 4550 grsave = 0;
4551 }
4552 else if (grsave > 128U - n)
4553 {
ad4b42b4 4554 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n);
e4e8248d
JB		 4555 grsave = 0;
4556 }
4557
800eeca4 4558 }
e4e8248d
JB		 4559
4560 if (mask)
4561 add_unwind_entry (output_prologue_gr (mask, grsave), 0);
800eeca4 4562 else
e4e8248d 4563 add_unwind_entry (output_prologue (), 0);
30d25259
RH		 4564
4565 unwind.prologue = 1;
4566 unwind.prologue_mask = mask;
e4e8248d 4567 unwind.prologue_gr = grsave;
75e09913 4568 unwind.body = 0;
33d01f33 4569 ++unwind.prologue_count;
800eeca4
JW		 4570}
4571
4572static void
4573dot_endp (dummy)
2434f565 4574 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4575{
4576 expressionS e;
44f5c83a 4577 int bytes_per_address;
800eeca4
JW		 4578 long where;
4579 segT saved_seg;
4580 subsegT saved_subseg;
5656b6b8 4581 proc_pending *pending;
970d6792 4582 int unwind_check = md.unwind_check;
800eeca4 4583
970d6792 4584 md.unwind_check = unwind_check_error;
75e09913
JB		 4585 if (!in_procedure ("endp"))
4586 return;
970d6792 4587 md.unwind_check = unwind_check;
75e09913 4588
91a2ae2a
RH		 4589 if (unwind.saved_text_seg)
4590 {
4591 saved_seg = unwind.saved_text_seg;
4592 saved_subseg = unwind.saved_text_subseg;
4593 unwind.saved_text_seg = NULL;
4594 }
4595 else
4596 {
4597 saved_seg = now_seg;
4598 saved_subseg = now_subseg;
4599 }
4600
800eeca4 4601 insn_group_break (1, 0, 0);
800eeca4 4602
91a2ae2a
RH		 4603 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4604 if (!unwind.info)
2d6ed997 4605 generate_unwind_image (saved_seg);
800eeca4 4606
91a2ae2a
RH		 4607 if (unwind.info || unwind.force_unwind_entry)
4608 {
75e09913
JB		 4609 symbolS *proc_end;
4610
91a2ae2a 4611 subseg_set (md.last_text_seg, 0);
75e09913 4612 proc_end = expr_build_dot ();
5e7474a7 4613
da9f89d4 4614 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4615
557debba
JW		 4616 /* Make sure that section has 4 byte alignment for ILP32 and
4617 8 byte alignment for LP64. */
4618 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4619
557debba
JW		 4620 /* Need space for 3 pointers for procedure start, procedure end,
4621 and unwind info. */
6baf2b51 4622 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size);
557debba 4623 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4624 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4625
40449e9f 4626 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4627 e.X_op = O_pseudo_fixup;
4628 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4629 e.X_add_number = 0;
5656b6b8
JB		 4630 if (!S_IS_LOCAL (unwind.proc_pending.sym)
4631 && S_IS_DEFINED (unwind.proc_pending.sym))
4632 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym),
4633 S_GET_VALUE (unwind.proc_pending.sym),
4634 symbol_get_frag (unwind.proc_pending.sym));
4600db48 4635 else
5656b6b8 4636 e.X_add_symbol = unwind.proc_pending.sym;
91a2ae2a 4637 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4638
800eeca4
JW		 4639 e.X_op = O_pseudo_fixup;
4640 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4641 e.X_add_number = 0;
75e09913 4642 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4643 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4644 bytes_per_address, &e);
4645
4646 if (unwind.info)
4647 {
4648 e.X_op = O_pseudo_fixup;
4649 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4650 e.X_add_number = 0;
4651 e.X_add_symbol = unwind.info;
4652 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4653 bytes_per_address, &e);
4654 }
91a2ae2a 4655 }
800eeca4 4656 subseg_set (saved_seg, saved_subseg);
c538998c 4657
5656b6b8
JB		 4658 /* Set symbol sizes. */
4659 pending = &unwind.proc_pending;
4660 if (S_GET_NAME (pending->sym))
c538998c 4661 {
5656b6b8 4662 do
75e09913 4663 {
5656b6b8
JB		 4664 symbolS *sym = pending->sym;
4665
4666 if (!S_IS_DEFINED (sym))
ad4b42b4 4667 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym));
5656b6b8
JB		 4668 else if (S_GET_SIZE (sym) == 0
4669 && symbol_get_obj (sym)->size == NULL)
75e09913 4670 {
75e09913
JB		 4671 fragS *frag = symbol_get_frag (sym);
4672
5656b6b8 4673 if (frag)
c538998c 4674 {
75e09913
JB		 4675 if (frag == frag_now && SEG_NORMAL (now_seg))
4676 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4677 else
4678 {
4679 symbol_get_obj (sym)->size =
4680 (expressionS *) xmalloc (sizeof (expressionS));
4681 symbol_get_obj (sym)->size->X_op = O_subtract;
4682 symbol_get_obj (sym)->size->X_add_symbol
4683 = symbol_new (FAKE_LABEL_NAME, now_seg,
4684 frag_now_fix (), frag_now);
4685 symbol_get_obj (sym)->size->X_op_symbol = sym;
4686 symbol_get_obj (sym)->size->X_add_number = 0;
4687 }
c538998c
JJ		 4688 }
4689 }
5656b6b8
JB		 4690 } while ((pending = pending->next) != NULL);
4691 }
4692
4693 /* Parse names of main and alternate entry points. */
4694 while (1)
4695 {
4696 char *name, *p, c;
4697
4698 SKIP_WHITESPACE ();
4699 name = input_line_pointer;
4700 c = get_symbol_end ();
4701 p = input_line_pointer;
4702 if (!*name)
4703 (md.unwind_check == unwind_check_warning
4704 ? as_warn
ad4b42b4 4705 : as_bad) (_("Empty argument of .endp"));
5656b6b8
JB		 4706 else
4707 {
4708 symbolS *sym = symbol_find (name);
4709
4710 for (pending = &unwind.proc_pending; pending; pending = pending->next)
4711 {
4712 if (sym == pending->sym)
4713 {
4714 pending->sym = NULL;
4715 break;
4716 }
4717 }
4718 if (!sym || !pending)
ad4b42b4 4719 as_warn (_("`%s' was not specified with previous .proc"), name);
c538998c
JJ		 4720 }
4721 *p = c;
4722 SKIP_WHITESPACE ();
4723 if (*input_line_pointer != ',')
4724 break;
4725 ++input_line_pointer;
4726 }
4727 demand_empty_rest_of_line ();
5656b6b8
JB		 4728
4729 /* Deliberately only checking for the main entry point here; the
4730 language spec even says all arguments to .endp are ignored. */
4731 if (unwind.proc_pending.sym
4732 && S_GET_NAME (unwind.proc_pending.sym)
4733 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME))
ad4b42b4 4734 as_warn (_("`%s' should be an operand to this .endp"),
5656b6b8
JB		 4735 S_GET_NAME (unwind.proc_pending.sym));
4736 while (unwind.proc_pending.next)
4737 {
4738 pending = unwind.proc_pending.next;
4739 unwind.proc_pending.next = pending->next;
4740 free (pending);
4741 }
4742 unwind.proc_pending.sym = unwind.info = NULL;
800eeca4
JW		 4743}
4744
4745static void
4746dot_template (template)
4747 int template;
4748{
4749 CURR_SLOT.user_template = template;
4750}
4751
4752static void
4753dot_regstk (dummy)
2434f565 4754 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4755{
4756 int ins, locs, outs, rots;
4757
4758 if (is_it_end_of_statement ())
4759 ins = locs = outs = rots = 0;
4760 else
4761 {
4762 ins = get_absolute_expression ();
4763 if (*input_line_pointer++ != ',')
4764 goto err;
4765 locs = get_absolute_expression ();
4766 if (*input_line_pointer++ != ',')
4767 goto err;
4768 outs = get_absolute_expression ();
4769 if (*input_line_pointer++ != ',')
4770 goto err;
4771 rots = get_absolute_expression ();
4772 }
4773 set_regstack (ins, locs, outs, rots);
4774 return;
4775
4776 err:
ad4b42b4 4777 as_bad (_("Comma expected"));
800eeca4
JW		 4778 ignore_rest_of_line ();
4779}
4780
4781static void
4782dot_rot (type)
4783 int type;
4784{
6a2375c6
JB		 4785 offsetT num_regs;
4786 valueT num_alloced = 0;
800eeca4
JW		 4787 struct dynreg **drpp, *dr;
4788 int ch, base_reg = 0;
4789 char *name, *start;
4790 size_t len;
4791
4792 switch (type)
4793 {
4794 case DYNREG_GR: base_reg = REG_GR + 32; break;
4795 case DYNREG_FR: base_reg = REG_FR + 32; break;
4796 case DYNREG_PR: base_reg = REG_P + 16; break;
4797 default: break;
4798 }
4799
542d6675 4800 /* First, remove existing names from hash table. */
800eeca4
JW		 4801 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4802 {
4803 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4804 /* FIXME: Free dr->name. */
800eeca4
JW		 4805 dr->num_regs = 0;
4806 }
4807
4808 drpp = &md.dynreg[type];
4809 while (1)
4810 {
4811 start = input_line_pointer;
4812 ch = get_symbol_end ();
20b36a95 4813 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4814 *input_line_pointer = ch;
800eeca4
JW		 4815
4816 SKIP_WHITESPACE ();
4817 if (*input_line_pointer != '[')
4818 {
ad4b42b4 4819 as_bad (_("Expected '['"));
800eeca4
JW		 4820 goto err;
4821 }
4822 ++input_line_pointer; /* skip '[' */
4823
4824 num_regs = get_absolute_expression ();
4825
4826 if (*input_line_pointer++ != ']')
4827 {
ad4b42b4 4828 as_bad (_("Expected ']'"));
800eeca4
JW		 4829 goto err;
4830 }
6a2375c6
JB		 4831 if (num_regs <= 0)
4832 {
ad4b42b4 4833 as_bad (_("Number of elements must be positive"));
6a2375c6
JB		 4834 goto err;
4835 }
800eeca4
JW		 4836 SKIP_WHITESPACE ();
4837
4838 num_alloced += num_regs;
4839 switch (type)
4840 {
4841 case DYNREG_GR:
4842 if (num_alloced > md.rot.num_regs)
4843 {
ad4b42b4 4844 as_bad (_("Used more than the declared %d rotating registers"),
800eeca4
JW		 4845 md.rot.num_regs);
4846 goto err;
4847 }
4848 break;
4849 case DYNREG_FR:
4850 if (num_alloced > 96)
4851 {
ad4b42b4 4852 as_bad (_("Used more than the available 96 rotating registers"));
800eeca4
JW		 4853 goto err;
4854 }
4855 break;
4856 case DYNREG_PR:
4857 if (num_alloced > 48)
4858 {
ad4b42b4 4859 as_bad (_("Used more than the available 48 rotating registers"));
800eeca4
JW		 4860 goto err;
4861 }
4862 break;
4863
4864 default:
4865 break;
4866 }
4867
800eeca4
JW		 4868 if (!*drpp)
4869 {
4870 *drpp = obstack_alloc (&notes, sizeof (*dr));
4871 memset (*drpp, 0, sizeof (*dr));
4872 }
4873
20b36a95
JB		 4874 name = obstack_alloc (&notes, len + 1);
4875 memcpy (name, start, len);
4876 name[len] = '\0';
4877
800eeca4
JW		 4878 dr = *drpp;
4879 dr->name = name;
4880 dr->num_regs = num_regs;
4881 dr->base = base_reg;
4882 drpp = &dr->next;
4883 base_reg += num_regs;
4884
4885 if (hash_insert (md.dynreg_hash, name, dr))
4886 {
ad4b42b4 4887 as_bad (_("Attempt to redefine register set `%s'"), name);
20b36a95 4888 obstack_free (&notes, name);
800eeca4
JW		 4889 goto err;
4890 }
4891
4892 if (*input_line_pointer != ',')
4893 break;
4894 ++input_line_pointer; /* skip comma */
4895 SKIP_WHITESPACE ();
4896 }
4897 demand_empty_rest_of_line ();
4898 return;
4899
4900 err:
4901 ignore_rest_of_line ();
4902}
4903
4904static void
4905dot_byteorder (byteorder)
4906 int byteorder;
4907{
10a98291
L		 4908 segment_info_type *seginfo = seg_info (now_seg);
4909
4910 if (byteorder == -1)
4911 {
4912 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4913 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4914 byteorder = seginfo->tc_segment_info_data.endian == 1;
4915 }
4916 else
4917 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4918
4919 if (target_big_endian != byteorder)
4920 {
4921 target_big_endian = byteorder;
4922 if (target_big_endian)
4923 {
4924 ia64_number_to_chars = number_to_chars_bigendian;
4925 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4926 }
4927 else
4928 {
4929 ia64_number_to_chars = number_to_chars_littleendian;
4930 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4931 }
4932 }
800eeca4
JW		 4933}
4934
4935static void
4936dot_psr (dummy)
2434f565 4937 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4938{
4939 char *option;
4940 int ch;
4941
4942 while (1)
4943 {
4944 option = input_line_pointer;
4945 ch = get_symbol_end ();
4946 if (strcmp (option, "lsb") == 0)
4947 md.flags &= ~EF_IA_64_BE;
4948 else if (strcmp (option, "msb") == 0)
4949 md.flags |= EF_IA_64_BE;
4950 else if (strcmp (option, "abi32") == 0)
4951 md.flags &= ~EF_IA_64_ABI64;
4952 else if (strcmp (option, "abi64") == 0)
4953 md.flags |= EF_IA_64_ABI64;
4954 else
ad4b42b4 4955 as_bad (_("Unknown psr option `%s'"), option);
800eeca4
JW		 4956 *input_line_pointer = ch;
4957
4958 SKIP_WHITESPACE ();
4959 if (*input_line_pointer != ',')
4960 break;
4961
4962 ++input_line_pointer;
4963 SKIP_WHITESPACE ();
4964 }
4965 demand_empty_rest_of_line ();
4966}
4967
800eeca4
JW		 4968static void
4969dot_ln (dummy)
2434f565 4970 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4971{
4972 new_logical_line (0, get_absolute_expression ());
4973 demand_empty_rest_of_line ();
4974}
4975
ef6a2b41
JB		 4976static void
4977cross_section (ref, cons, ua)
4978 int ref;
4979 void (*cons) PARAMS((int));
4980 int ua;
800eeca4 4981{
ef6a2b41
JB		 4982 char *start, *end;
4983 int saved_auto_align;
4984 unsigned int section_count;
800eeca4
JW		 4985
4986 SKIP_WHITESPACE ();
ef6a2b41
JB		 4987 start = input_line_pointer;
4988 if (*start == '"')
4989 {
4990 int len;
4991 char *name;
4992
b3f19c14 4993 name = demand_copy_C_string (&len);
ef6a2b41
JB		 4994 obstack_free(&notes, name);
4995 if (!name)
4996 {
4997 ignore_rest_of_line ();
4998 return;
4999 }
5000 }
b3f19c14 5001 else
800eeca4 5002 {
b3f19c14
JB		 5003 char c = get_symbol_end ();
5004
5005 if (input_line_pointer == start)
5006 {
ad4b42b4 5007 as_bad (_("Missing section name"));
b3f19c14 5008 ignore_rest_of_line ();
ef6a2b41 5009 return;
b3f19c14 5010 }
b3f19c14 5011 *input_line_pointer = c;
800eeca4 5012 }
ef6a2b41 5013 end = input_line_pointer;
800eeca4
JW		 5014 SKIP_WHITESPACE ();
5015 if (*input_line_pointer != ',')
5016 {
ad4b42b4 5017 as_bad (_("Comma expected after section name"));
800eeca4 5018 ignore_rest_of_line ();
ef6a2b41 5019 return;
800eeca4 5020 }
ef6a2b41
JB		 5021 *end = '\0';
5022 end = input_line_pointer + 1; /* skip comma */
5023 input_line_pointer = start;
5024 md.keep_pending_output = 1;
5025 section_count = bfd_count_sections(stdoutput);
5026 obj_elf_section (0);
5027 if (section_count != bfd_count_sections(stdoutput))
ad4b42b4 5028 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
ef6a2b41
JB		 5029 input_line_pointer = end;
5030 saved_auto_align = md.auto_align;
5031 if (ua)
5032 md.auto_align = 0;
5033 (*cons) (ref);
5034 if (ua)
5035 md.auto_align = saved_auto_align;
5036 obj_elf_previous (0);
5037 md.keep_pending_output = 0;
800eeca4
JW		 5038}
5039
5040static void
5041dot_xdata (size)
5042 int size;
5043{
ef6a2b41 5044 cross_section (size, cons, 0);
800eeca4
JW		 5045}
5046
5047/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 5048
800eeca4
JW		 5049static void
5050stmt_float_cons (kind)
5051 int kind;
5052{
165a7f90 5053 size_t alignment;
800eeca4
JW		 5054
5055 switch (kind)
5056 {
165a7f90
L		 5057 case 'd':
5058 alignment = 8;
5059 break;
5060
5061 case 'x':
5062 case 'X':
5063 alignment = 16;
5064 break;
800eeca4
JW		 5065
5066 case 'f':
5067 default:
165a7f90 5068 alignment = 4;
800eeca4
JW		 5069 break;
5070 }
165a7f90 5071 ia64_do_align (alignment);
800eeca4
JW		 5072 float_cons (kind);
5073}
5074
5075static void
5076stmt_cons_ua (size)
5077 int size;
5078{
5079 int saved_auto_align = md.auto_align;
5080
5081 md.auto_align = 0;
5082 cons (size);
5083 md.auto_align = saved_auto_align;
5084}
5085
5086static void
5087dot_xfloat_cons (kind)
5088 int kind;
5089{
ef6a2b41 5090 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 5091}
5092
5093static void
38a57ae7 5094dot_xstringer (int zero)
800eeca4 5095{
ef6a2b41 5096 cross_section (zero, stringer, 0);
800eeca4
JW		 5097}
5098
5099static void
5100dot_xdata_ua (size)
5101 int size;
5102{
ef6a2b41 5103 cross_section (size, cons, 1);
800eeca4
JW		 5104}
5105
5106static void
5107dot_xfloat_cons_ua (kind)
5108 int kind;
5109{
ef6a2b41 5110 cross_section (kind, float_cons, 1);
800eeca4
JW		 5111}
5112
5113/* .reg.val <regname>,value */
542d6675 5114
800eeca4
JW		 5115static void
5116dot_reg_val (dummy)
2434f565 5117 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5118{
5119 expressionS reg;
5120
60d11e55 5121 expression_and_evaluate (&reg);
800eeca4
JW		 5122 if (reg.X_op != O_register)
5123 {
5124 as_bad (_("Register name expected"));
5125 ignore_rest_of_line ();
5126 }
5127 else if (*input_line_pointer++ != ',')
5128 {
5129 as_bad (_("Comma expected"));
5130 ignore_rest_of_line ();
5131 }
197865e8 5132 else
800eeca4
JW		 5133 {
5134 valueT value = get_absolute_expression ();
5135 int regno = reg.X_add_number;
a66d2bb7 5136 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 5137 as_warn (_("Register value annotation ignored"));
800eeca4 5138 else
542d6675
KH		 5139 {
5140 gr_values[regno - REG_GR].known = 1;
5141 gr_values[regno - REG_GR].value = value;
5142 gr_values[regno - REG_GR].path = md.path;
5143 }
800eeca4
JW		 5144 }
5145 demand_empty_rest_of_line ();
5146}
5147
5e819f9c
JW		 5148/*
5149 .serialize.data
5150 .serialize.instruction
5151 */
5152static void
5153dot_serialize (type)
5154 int type;
5155{
5156 insn_group_break (0, 0, 0);
5157 if (type)
5158 instruction_serialization ();
5159 else
5160 data_serialization ();
5161 insn_group_break (0, 0, 0);
5162 demand_empty_rest_of_line ();
5163}
5164
197865e8 5165/* select dv checking mode
800eeca4
JW		 5166 .auto
5167 .explicit
5168 .default
5169
197865e8 5170 A stop is inserted when changing modes
800eeca4 5171 */
542d6675 5172
800eeca4
JW		 5173static void
5174dot_dv_mode (type)
542d6675 5175 int type;
800eeca4
JW		 5176{
5177 if (md.manual_bundling)
5178 as_warn (_("Directive invalid within a bundle"));
5179
5180 if (type == 'E' || type == 'A')
5181 md.mode_explicitly_set = 0;
5182 else
5183 md.mode_explicitly_set = 1;
5184
5185 md.detect_dv = 1;
5186 switch (type)
5187 {
5188 case 'A':
5189 case 'a':
5190 if (md.explicit_mode)
542d6675 5191 insn_group_break (1, 0, 0);
800eeca4
JW		 5192 md.explicit_mode = 0;
5193 break;
5194 case 'E':
5195 case 'e':
5196 if (!md.explicit_mode)
542d6675 5197 insn_group_break (1, 0, 0);
800eeca4
JW		 5198 md.explicit_mode = 1;
5199 break;
5200 default:
5201 case 'd':
5202 if (md.explicit_mode != md.default_explicit_mode)
542d6675 5203 insn_group_break (1, 0, 0);
800eeca4
JW		 5204 md.explicit_mode = md.default_explicit_mode;
5205 md.mode_explicitly_set = 0;
5206 break;
5207 }
5208}
5209
5210static void
5211print_prmask (mask)
542d6675 5212 valueT mask;
800eeca4
JW		 5213{
5214 int regno;
5215 char *comma = "";
542d6675 5216 for (regno = 0; regno < 64; regno++)
800eeca4 5217 {
542d6675
KH		 5218 if (mask & ((valueT) 1 << regno))
5219 {
5220 fprintf (stderr, "%s p%d", comma, regno);
5221 comma = ",";
5222 }
800eeca4
JW		 5223 }
5224}
5225
5226/*
05ee4b0f
JB		 5227 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5228 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5229 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5230 .pred.safe_across_calls p1 [, p2 [,...]]
5231 */
542d6675 5232
800eeca4
JW		 5233static void
5234dot_pred_rel (type)
542d6675 5235 int type;
800eeca4
JW		 5236{
5237 valueT mask = 0;
5238 int count = 0;
5239 int p1 = -1, p2 = -1;
5240
5241 if (type == 0)
5242 {
05ee4b0f 5243 if (*input_line_pointer == '"')
542d6675
KH		 5244 {
5245 int len;
5246 char *form = demand_copy_C_string (&len);
05ee4b0f 5247
542d6675
KH		 5248 if (strcmp (form, "mutex") == 0)
5249 type = 'm';
5250 else if (strcmp (form, "clear") == 0)
5251 type = 'c';
5252 else if (strcmp (form, "imply") == 0)
5253 type = 'i';
05ee4b0f
JB		 5254 obstack_free (&notes, form);
5255 }
5256 else if (*input_line_pointer == '@')
5257 {
5258 char *form = ++input_line_pointer;
5259 char c = get_symbol_end();
5260
5261 if (strcmp (form, "mutex") == 0)
5262 type = 'm';
5263 else if (strcmp (form, "clear") == 0)
5264 type = 'c';
5265 else if (strcmp (form, "imply") == 0)
5266 type = 'i';
5267 *input_line_pointer = c;
5268 }
5269 else
5270 {
5271 as_bad (_("Missing predicate relation type"));
5272 ignore_rest_of_line ();
5273 return;
5274 }
5275 if (type == 0)
5276 {
5277 as_bad (_("Unrecognized predicate relation type"));
5278 ignore_rest_of_line ();
5279 return;
542d6675 5280 }
800eeca4 5281 if (*input_line_pointer == ',')
542d6675 5282 ++input_line_pointer;
800eeca4
JW		 5283 SKIP_WHITESPACE ();
5284 }
5285
800eeca4
JW		 5286 while (1)
5287 {
20b36a95 5288 valueT bits = 1;
cc941dee 5289 int sep, regno;
20b36a95
JB		 5290 expressionS pr, *pr1, *pr2;
5291
cc941dee 5292 sep = parse_operand (&pr, ',');
20b36a95
JB		 5293 if (pr.X_op == O_register
5294 && pr.X_add_number >= REG_P
5295 && pr.X_add_number <= REG_P + 63)
5296 {
5297 regno = pr.X_add_number - REG_P;
5298 bits <<= regno;
5299 count++;
5300 if (p1 == -1)
5301 p1 = regno;
5302 else if (p2 == -1)
5303 p2 = regno;
5304 }
5305 else if (type != 'i'
5306 && pr.X_op == O_subtract
5307 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5308 && pr1->X_op == O_register
5309 && pr1->X_add_number >= REG_P
5310 && pr1->X_add_number <= REG_P + 63
5311 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5312 && pr2->X_op == O_register
5313 && pr2->X_add_number >= REG_P
5314 && pr2->X_add_number <= REG_P + 63)
5315 {
5316 /* It's a range. */
5317 int stop;
5318
5319 regno = pr1->X_add_number - REG_P;
5320 stop = pr2->X_add_number - REG_P;
5321 if (regno >= stop)
542d6675
KH		 5322 {
5323 as_bad (_("Bad register range"));
5324 ignore_rest_of_line ();
5325 return;
5326 }
20b36a95
JB		 5327 bits = ((bits << stop) << 1) - (bits << regno);
5328 count += stop - regno + 1;
5329 }
5330 else
5331 {
5332 as_bad (_("Predicate register expected"));
5333 ignore_rest_of_line ();
5334 return;
542d6675 5335 }
20b36a95
JB		 5336 if (mask & bits)
5337 as_warn (_("Duplicate predicate register ignored"));
5338 mask |= bits;
cc941dee 5339 if (sep != ',')
542d6675 5340 break;
800eeca4
JW		 5341 }
5342
5343 switch (type)
5344 {
5345 case 'c':
5346 if (count == 0)
542d6675 5347 mask = ~(valueT) 0;
800eeca4 5348 clear_qp_mutex (mask);
197865e8 5349 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5350 break;
5351 case 'i':
5352 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5353 as_bad (_("Predicate source and target required"));
800eeca4 5354 else if (p1 == 0 || p2 == 0)
542d6675 5355 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5356 else
542d6675 5357 add_qp_imply (p1, p2);
800eeca4
JW		 5358 break;
5359 case 'm':
5360 if (count < 2)
542d6675
KH		 5361 {
5362 as_bad (_("At least two PR arguments expected"));
5363 break;
5364 }
800eeca4 5365 else if (mask & 1)
542d6675
KH		 5366 {
5367 as_bad (_("Use of p0 is not valid in this context"));
5368 break;
5369 }
800eeca4
JW		 5370 add_qp_mutex (mask);
5371 break;
5372 case 's':
5373 /* note that we don't override any existing relations */
5374 if (count == 0)
542d6675
KH		 5375 {
5376 as_bad (_("At least one PR argument expected"));
5377 break;
5378 }
800eeca4 5379 if (md.debug_dv)
542d6675
KH		 5380 {
5381 fprintf (stderr, "Safe across calls: ");
5382 print_prmask (mask);
5383 fprintf (stderr, "\n");
5384 }
800eeca4
JW		 5385 qp_safe_across_calls = mask;
5386 break;
5387 }
5388 demand_empty_rest_of_line ();
5389}
5390
5391/* .entry label [, label [, ...]]
5392 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5393 Otherwise, only global labels are considered entry points. */
5394
800eeca4
JW		 5395static void
5396dot_entry (dummy)
2434f565 5397 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5398{
5399 const char *err;
5400 char *name;
5401 int c;
5402 symbolS *symbolP;
5403
5404 do
5405 {
5406 name = input_line_pointer;
5407 c = get_symbol_end ();
5408 symbolP = symbol_find_or_make (name);
5409
5410 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5411 if (err)
542d6675
KH		 5412 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5413 name, err);
800eeca4
JW		 5414
5415 *input_line_pointer = c;
5416 SKIP_WHITESPACE ();
5417 c = *input_line_pointer;
5418 if (c == ',')
5419 {
5420 input_line_pointer++;
5421 SKIP_WHITESPACE ();
5422 if (*input_line_pointer == '\n')
5423 c = '\n';
5424 }
5425 }
5426 while (c == ',');
5427
5428 demand_empty_rest_of_line ();
5429}
5430
197865e8 5431/* .mem.offset offset, base
542d6675
KH		 5432 "base" is used to distinguish between offsets from a different base. */
5433
800eeca4
JW		 5434static void
5435dot_mem_offset (dummy)
2434f565 5436 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5437{
5438 md.mem_offset.hint = 1;
5439 md.mem_offset.offset = get_absolute_expression ();
5440 if (*input_line_pointer != ',')
5441 {
5442 as_bad (_("Comma expected"));
5443 ignore_rest_of_line ();
5444 return;
5445 }
5446 ++input_line_pointer;
5447 md.mem_offset.base = get_absolute_expression ();
5448 demand_empty_rest_of_line ();
5449}
5450
542d6675 5451/* ia64-specific pseudo-ops: */
800eeca4
JW		 5452const pseudo_typeS md_pseudo_table[] =
5453 {
5454 { "radix", dot_radix, 0 },
5455 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5456 { "loc", dot_loc, 0 },
800eeca4
JW		 5457 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5458 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5459 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5460 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5461 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5462 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5463 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5464 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5465 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5466 { "proc", dot_proc, 0 },
5467 { "body", dot_body, 0 },
5468 { "prologue", dot_prologue, 0 },
2434f565 5469 { "endp", dot_endp, 0 },
2434f565
JW		 5470
5471 { "fframe", dot_fframe, 0 },
5472 { "vframe", dot_vframe, 0 },
5473 { "vframesp", dot_vframesp, 0 },
e4e8248d 5474 { "vframepsp", dot_vframesp, 1 },
2434f565
JW		 5475 { "save", dot_save, 0 },
5476 { "restore", dot_restore, 0 },
5477 { "restorereg", dot_restorereg, 0 },
e4e8248d 5478 { "restorereg.p", dot_restorereg, 1 },
2434f565
JW		 5479 { "handlerdata", dot_handlerdata, 0 },
5480 { "unwentry", dot_unwentry, 0 },
5481 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5482 { "savesp", dot_savemem, 0 },
5483 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5484 { "save.g", dot_saveg, 0 },
5485 { "save.f", dot_savef, 0 },
5486 { "save.b", dot_saveb, 0 },
5487 { "save.gf", dot_savegf, 0 },
5488 { "spill", dot_spill, 0 },
5489 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5490 { "spillsp", dot_spillmem, 0 },
5491 { "spillpsp", dot_spillmem, 1 },
e4e8248d
JB		 5492 { "spillreg.p", dot_spillreg, 1 },
5493 { "spillsp.p", dot_spillmem, ~0 },
5494 { "spillpsp.p", dot_spillmem, ~1 },
2434f565
JW		 5495 { "label_state", dot_label_state, 0 },
5496 { "copy_state", dot_copy_state, 0 },
5497 { "unwabi", dot_unwabi, 0 },
5498 { "personality", dot_personality, 0 },
800eeca4
JW		 5499 { "mii", dot_template, 0x0 },
5500 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5501 { "mlx", dot_template, 0x2 },
5502 { "mmi", dot_template, 0x4 },
5503 { "mfi", dot_template, 0x6 },
5504 { "mmf", dot_template, 0x7 },
5505 { "mib", dot_template, 0x8 },
5506 { "mbb", dot_template, 0x9 },
5507 { "bbb", dot_template, 0xb },
5508 { "mmb", dot_template, 0xc },
5509 { "mfb", dot_template, 0xe },
d9201763 5510 { "align", dot_align, 0 },
800eeca4
JW		 5511 { "regstk", dot_regstk, 0 },
5512 { "rotr", dot_rot, DYNREG_GR },
5513 { "rotf", dot_rot, DYNREG_FR },
5514 { "rotp", dot_rot, DYNREG_PR },
5515 { "lsb", dot_byteorder, 0 },
5516 { "msb", dot_byteorder, 1 },
5517 { "psr", dot_psr, 0 },
5518 { "alias", dot_alias, 0 },
35f5df7f 5519 { "secalias", dot_alias, 1 },
800eeca4
JW		 5520 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5521
5522 { "xdata1", dot_xdata, 1 },
5523 { "xdata2", dot_xdata, 2 },
5524 { "xdata4", dot_xdata, 4 },
5525 { "xdata8", dot_xdata, 8 },
b3f19c14 5526 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5527 { "xreal4", dot_xfloat_cons, 'f' },
5528 { "xreal8", dot_xfloat_cons, 'd' },
5529 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5530 { "xreal16", dot_xfloat_cons, 'X' },
38a57ae7
NC		 5531 { "xstring", dot_xstringer, 8 + 0 },
5532 { "xstringz", dot_xstringer, 8 + 1 },
800eeca4 5533
542d6675 5534 /* unaligned versions: */
800eeca4
JW		 5535 { "xdata2.ua", dot_xdata_ua, 2 },
5536 { "xdata4.ua", dot_xdata_ua, 4 },
5537 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5538 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5539 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5540 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5541 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5542 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5543
5544 /* annotations/DV checking support */
5545 { "entry", dot_entry, 0 },
2434f565 5546 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5547 { "pred.rel", dot_pred_rel, 0 },
5548 { "pred.rel.clear", dot_pred_rel, 'c' },
5549 { "pred.rel.imply", dot_pred_rel, 'i' },
5550 { "pred.rel.mutex", dot_pred_rel, 'm' },
5551 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5552 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5553 { "serialize.data", dot_serialize, 0 },
5554 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5555 { "auto", dot_dv_mode, 'a' },
5556 { "explicit", dot_dv_mode, 'e' },
5557 { "default", dot_dv_mode, 'd' },
5558
87885043
JW		 5559 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5560 IA-64 aligns data allocation pseudo-ops by default, so we have to
5561 tell it that these ones are supposed to be unaligned. Long term,
5562 should rewrite so that only IA-64 specific data allocation pseudo-ops
5563 are aligned by default. */
5564 {"2byte", stmt_cons_ua, 2},
5565 {"4byte", stmt_cons_ua, 4},
5566 {"8byte", stmt_cons_ua, 8},
5567
800eeca4
JW		 5568 { NULL, 0, 0 }
5569 };
5570
5571static const struct pseudo_opcode
5572 {
5573 const char *name;
5574 void (*handler) (int);
5575 int arg;
5576 }
5577pseudo_opcode[] =
5578 {
5579 /* these are more like pseudo-ops, but don't start with a dot */
5580 { "data1", cons, 1 },
5581 { "data2", cons, 2 },
5582 { "data4", cons, 4 },
5583 { "data8", cons, 8 },
3969b680 5584 { "data16", cons, 16 },
800eeca4
JW		 5585 { "real4", stmt_float_cons, 'f' },
5586 { "real8", stmt_float_cons, 'd' },
5587 { "real10", stmt_float_cons, 'x' },
165a7f90 5588 { "real16", stmt_float_cons, 'X' },
38a57ae7
NC		 5589 { "string", stringer, 8 + 0 },
5590 { "stringz", stringer, 8 + 1 },
800eeca4 5591
542d6675 5592 /* unaligned versions: */
800eeca4
JW		 5593 { "data2.ua", stmt_cons_ua, 2 },
5594 { "data4.ua", stmt_cons_ua, 4 },
5595 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5596 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5597 { "real4.ua", float_cons, 'f' },
5598 { "real8.ua", float_cons, 'd' },
5599 { "real10.ua", float_cons, 'x' },
165a7f90 5600 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5601 };
5602
5603/* Declare a register by creating a symbol for it and entering it in
5604 the symbol table. */
542d6675
KH		 5605
5606static symbolS *
800eeca4
JW		 5607declare_register (name, regnum)
5608 const char *name;
8b84be9d 5609 unsigned int regnum;
800eeca4
JW		 5610{
5611 const char *err;
5612 symbolS *sym;
5613
5e0bd176 5614 sym = symbol_create (name, reg_section, regnum, &zero_address_frag);
800eeca4
JW		 5615
5616 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5617 if (err)
5618 as_fatal ("Inserting \"%s\" into register table failed: %s",
5619 name, err);
5620
5621 return sym;
5622}
5623
5624static void
5625declare_register_set (prefix, num_regs, base_regnum)
5626 const char *prefix;
8b84be9d
JB		 5627 unsigned int num_regs;
5628 unsigned int base_regnum;
800eeca4
JW		 5629{
5630 char name[8];
8b84be9d 5631 unsigned int i;
800eeca4
JW		 5632
5633 for (i = 0; i < num_regs; ++i)
5634 {
f9f21a03 5635 snprintf (name, sizeof (name), "%s%u", prefix, i);
800eeca4
JW		 5636 declare_register (name, base_regnum + i);
5637 }
5638}
5639
5640static unsigned int
5641operand_width (opnd)
5642 enum ia64_opnd opnd;
5643{
5644 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5645 unsigned int bits = 0;
5646 int i;
5647
5648 bits = 0;
5649 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5650 bits += odesc->field[i].bits;
5651
5652 return bits;
5653}
5654
87f8eb97 5655static enum operand_match_result
800eeca4
JW		 5656operand_match (idesc, index, e)
5657 const struct ia64_opcode *idesc;
5658 int index;
5659 expressionS *e;
5660{
5661 enum ia64_opnd opnd = idesc->operands[index];
5662 int bits, relocatable = 0;
5663 struct insn_fix *fix;
5664 bfd_signed_vma val;
5665
5666 switch (opnd)
5667 {
542d6675 5668 /* constants: */
800eeca4
JW		 5669
5670 case IA64_OPND_AR_CCV:
5671 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5672 return OPERAND_MATCH;
800eeca4
JW		 5673 break;
5674
c10d9d8f
JW		 5675 case IA64_OPND_AR_CSD:
5676 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5677 return OPERAND_MATCH;
5678 break;
5679
800eeca4
JW		 5680 case IA64_OPND_AR_PFS:
5681 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5682 return OPERAND_MATCH;
800eeca4
JW		 5683 break;
5684
5685 case IA64_OPND_GR0:
5686 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5687 return OPERAND_MATCH;
800eeca4
JW		 5688 break;
5689
5690 case IA64_OPND_IP:
5691 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5692 return OPERAND_MATCH;
800eeca4
JW		 5693 break;
5694
5695 case IA64_OPND_PR:
5696 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5697 return OPERAND_MATCH;
800eeca4
JW		 5698 break;
5699
5700 case IA64_OPND_PR_ROT:
5701 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5702 return OPERAND_MATCH;
800eeca4
JW		 5703 break;
5704
5705 case IA64_OPND_PSR:
5706 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5707 return OPERAND_MATCH;
800eeca4
JW		 5708 break;
5709
5710 case IA64_OPND_PSR_L:
5711 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5712 return OPERAND_MATCH;
800eeca4
JW		 5713 break;
5714
5715 case IA64_OPND_PSR_UM:
5716 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5717 return OPERAND_MATCH;
800eeca4
JW		 5718 break;
5719
5720 case IA64_OPND_C1:
87f8eb97
JW		 5721 if (e->X_op == O_constant)
5722 {
5723 if (e->X_add_number == 1)
5724 return OPERAND_MATCH;
5725 else
5726 return OPERAND_OUT_OF_RANGE;
5727 }
800eeca4
JW		 5728 break;
5729
5730 case IA64_OPND_C8:
87f8eb97
JW		 5731 if (e->X_op == O_constant)
5732 {
5733 if (e->X_add_number == 8)
5734 return OPERAND_MATCH;
5735 else
5736 return OPERAND_OUT_OF_RANGE;
5737 }
800eeca4
JW		 5738 break;
5739
5740 case IA64_OPND_C16:
87f8eb97
JW		 5741 if (e->X_op == O_constant)
5742 {
5743 if (e->X_add_number == 16)
5744 return OPERAND_MATCH;
5745 else
5746 return OPERAND_OUT_OF_RANGE;
5747 }
800eeca4
JW		 5748 break;
5749
542d6675 5750 /* register operands: */
800eeca4
JW		 5751
5752 case IA64_OPND_AR3:
5753 if (e->X_op == O_register && e->X_add_number >= REG_AR
5754 && e->X_add_number < REG_AR + 128)
87f8eb97 5755 return OPERAND_MATCH;
800eeca4
JW		 5756 break;
5757
5758 case IA64_OPND_B1:
5759 case IA64_OPND_B2:
5760 if (e->X_op == O_register && e->X_add_number >= REG_BR
5761 && e->X_add_number < REG_BR + 8)
87f8eb97 5762 return OPERAND_MATCH;
800eeca4
JW		 5763 break;
5764
5765 case IA64_OPND_CR3:
5766 if (e->X_op == O_register && e->X_add_number >= REG_CR
5767 && e->X_add_number < REG_CR + 128)
87f8eb97 5768 return OPERAND_MATCH;
800eeca4
JW		 5769 break;
5770
5771 case IA64_OPND_F1:
5772 case IA64_OPND_F2:
5773 case IA64_OPND_F3:
5774 case IA64_OPND_F4:
5775 if (e->X_op == O_register && e->X_add_number >= REG_FR
5776 && e->X_add_number < REG_FR + 128)
87f8eb97 5777 return OPERAND_MATCH;
800eeca4
JW		 5778 break;
5779
5780 case IA64_OPND_P1:
5781 case IA64_OPND_P2:
5782 if (e->X_op == O_register && e->X_add_number >= REG_P
5783 && e->X_add_number < REG_P + 64)
87f8eb97 5784 return OPERAND_MATCH;
800eeca4
JW		 5785 break;
5786
5787 case IA64_OPND_R1:
5788 case IA64_OPND_R2:
5789 case IA64_OPND_R3:
5790 if (e->X_op == O_register && e->X_add_number >= REG_GR
5791 && e->X_add_number < REG_GR + 128)
87f8eb97 5792 return OPERAND_MATCH;
800eeca4
JW		 5793 break;
5794
5795 case IA64_OPND_R3_2:
87f8eb97 5796 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5797 {
87f8eb97
JW		 5798 if (e->X_add_number < REG_GR + 4)
5799 return OPERAND_MATCH;
5800 else if (e->X_add_number < REG_GR + 128)
5801 return OPERAND_OUT_OF_RANGE;
5802 }
800eeca4
JW		 5803 break;
5804
542d6675 5805 /* indirect operands: */
800eeca4
JW		 5806 case IA64_OPND_CPUID_R3:
5807 case IA64_OPND_DBR_R3:
5808 case IA64_OPND_DTR_R3:
5809 case IA64_OPND_ITR_R3:
5810 case IA64_OPND_IBR_R3:
5811 case IA64_OPND_MSR_R3:
5812 case IA64_OPND_PKR_R3:
5813 case IA64_OPND_PMC_R3:
5814 case IA64_OPND_PMD_R3:
5815 case IA64_OPND_RR_R3:
5816 if (e->X_op == O_index && e->X_op_symbol
5817 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5818 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5819 return OPERAND_MATCH;
800eeca4
JW		 5820 break;
5821
5822 case IA64_OPND_MR3:
5823 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5824 return OPERAND_MATCH;
800eeca4
JW		 5825 break;
5826
542d6675 5827 /* immediate operands: */
800eeca4
JW		 5828 case IA64_OPND_CNT2a:
5829 case IA64_OPND_LEN4:
5830 case IA64_OPND_LEN6:
5831 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5832 if (e->X_op == O_constant)
5833 {
5834 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5835 return OPERAND_MATCH;
5836 else
5837 return OPERAND_OUT_OF_RANGE;
5838 }
800eeca4
JW		 5839 break;
5840
5841 case IA64_OPND_CNT2b:
87f8eb97
JW		 5842 if (e->X_op == O_constant)
5843 {
5844 if ((bfd_vma) (e->X_add_number - 1) < 3)
5845 return OPERAND_MATCH;
5846 else
5847 return OPERAND_OUT_OF_RANGE;
5848 }
800eeca4
JW		 5849 break;
5850
5851 case IA64_OPND_CNT2c:
5852 val = e->X_add_number;
87f8eb97
JW		 5853 if (e->X_op == O_constant)
5854 {
5855 if ((val == 0 || val == 7 || val == 15 || val == 16))
5856 return OPERAND_MATCH;
5857 else
5858 return OPERAND_OUT_OF_RANGE;
5859 }
800eeca4
JW		 5860 break;
5861
5862 case IA64_OPND_SOR:
5863 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5864 if (e->X_op == O_constant && e->X_add_number & 0x7)
5865 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5866 case IA64_OPND_SOF:
5867 case IA64_OPND_SOL:
87f8eb97
JW		 5868 if (e->X_op == O_constant)
5869 {
5870 if ((bfd_vma) e->X_add_number <= 96)
5871 return OPERAND_MATCH;
5872 else
5873 return OPERAND_OUT_OF_RANGE;
5874 }
800eeca4
JW		 5875 break;
5876
5877 case IA64_OPND_IMMU62:
5878 if (e->X_op == O_constant)
542d6675 5879 {
800eeca4 5880 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5881 return OPERAND_MATCH;
5882 else
5883 return OPERAND_OUT_OF_RANGE;
542d6675 5884 }
197865e8 5885 else
542d6675
KH		 5886 {
5887 /* FIXME -- need 62-bit relocation type */
5888 as_bad (_("62-bit relocation not yet implemented"));
5889 }
800eeca4
JW		 5890 break;
5891
5892 case IA64_OPND_IMMU64:
5893 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5894 || e->X_op == O_subtract)
5895 {
5896 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5897 fix->code = BFD_RELOC_IA64_IMM64;
5898 if (e->X_op != O_subtract)
5899 {
5900 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5901 if (e->X_op == O_pseudo_fixup)
5902 e->X_op = O_symbol;
5903 }
5904
5905 fix->opnd = idesc->operands[index];
5906 fix->expr = *e;
5907 fix->is_pcrel = 0;
5908 ++CURR_SLOT.num_fixups;
87f8eb97 5909 return OPERAND_MATCH;
800eeca4
JW		 5910 }
5911 else if (e->X_op == O_constant)
87f8eb97 5912 return OPERAND_MATCH;
800eeca4
JW		 5913 break;
5914
59cf82fe
L		 5915 case IA64_OPND_IMMU5b:
5916 if (e->X_op == O_constant)
5917 {
5918 val = e->X_add_number;
5919 if (val >= 32 && val <= 63)
5920 return OPERAND_MATCH;
5921 else
5922 return OPERAND_OUT_OF_RANGE;
5923 }
5924 break;
5925
800eeca4
JW		 5926 case IA64_OPND_CCNT5:
5927 case IA64_OPND_CNT5:
5928 case IA64_OPND_CNT6:
5929 case IA64_OPND_CPOS6a:
5930 case IA64_OPND_CPOS6b:
5931 case IA64_OPND_CPOS6c:
5932 case IA64_OPND_IMMU2:
5933 case IA64_OPND_IMMU7a:
5934 case IA64_OPND_IMMU7b:
800eeca4
JW		 5935 case IA64_OPND_IMMU21:
5936 case IA64_OPND_IMMU24:
5937 case IA64_OPND_MBTYPE4:
5938 case IA64_OPND_MHTYPE8:
5939 case IA64_OPND_POS6:
5940 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5941 if (e->X_op == O_constant)
5942 {
5943 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5944 return OPERAND_MATCH;
5945 else
5946 return OPERAND_OUT_OF_RANGE;
5947 }
800eeca4
JW		 5948 break;
5949
bf3ca999
TW		 5950 case IA64_OPND_IMMU9:
5951 bits = operand_width (idesc->operands[index]);
87f8eb97 5952 if (e->X_op == O_constant)
542d6675 5953 {
87f8eb97
JW		 5954 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5955 {
5956 int lobits = e->X_add_number & 0x3;
5957 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5958 e->X_add_number |= (bfd_vma) 0x3;
5959 return OPERAND_MATCH;
5960 }
5961 else
5962 return OPERAND_OUT_OF_RANGE;
542d6675 5963 }
bf3ca999
TW		 5964 break;
5965
800eeca4
JW		 5966 case IA64_OPND_IMM44:
5967 /* least 16 bits must be zero */
5968 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5969 /* XXX technically, this is wrong: we should not be issuing warning
5970 messages until we're sure this instruction pattern is going to
5971 be used! */
542d6675 5972 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5973
87f8eb97 5974 if (e->X_op == O_constant)
542d6675 5975 {
87f8eb97
JW		 5976 if (((e->X_add_number >= 0
5977 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5978 || (e->X_add_number < 0
5979 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5980 {
87f8eb97
JW		 5981 /* sign-extend */
5982 if (e->X_add_number >= 0
5983 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5984 {
5985 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5986 }
5987 return OPERAND_MATCH;
542d6675 5988 }
87f8eb97
JW		 5989 else
5990 return OPERAND_OUT_OF_RANGE;
542d6675 5991 }
800eeca4
JW		 5992 break;
5993
5994 case IA64_OPND_IMM17:
5995 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5996 if (e->X_op == O_constant)
542d6675 5997 {
87f8eb97
JW		 5998 if (((e->X_add_number >= 0
5999 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
6000 || (e->X_add_number < 0
6001 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 6002 {
87f8eb97
JW		 6003 /* sign-extend */
6004 if (e->X_add_number >= 0
6005 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
6006 {
6007 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
6008 }
6009 return OPERAND_MATCH;
542d6675 6010 }
87f8eb97
JW		 6011 else
6012 return OPERAND_OUT_OF_RANGE;
542d6675 6013 }
800eeca4
JW		 6014 break;
6015
6016 case IA64_OPND_IMM14:
6017 case IA64_OPND_IMM22:
6018 relocatable = 1;
6019 case IA64_OPND_IMM1:
6020 case IA64_OPND_IMM8:
6021 case IA64_OPND_IMM8U4:
6022 case IA64_OPND_IMM8M1:
6023 case IA64_OPND_IMM8M1U4:
6024 case IA64_OPND_IMM8M1U8:
6025 case IA64_OPND_IMM9a:
6026 case IA64_OPND_IMM9b:
6027 bits = operand_width (idesc->operands[index]);
6028 if (relocatable && (e->X_op == O_symbol
6029 || e->X_op == O_subtract
6030 || e->X_op == O_pseudo_fixup))
6031 {
6032 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6033
6034 if (idesc->operands[index] == IA64_OPND_IMM14)
6035 fix->code = BFD_RELOC_IA64_IMM14;
6036 else
6037 fix->code = BFD_RELOC_IA64_IMM22;
6038
6039 if (e->X_op != O_subtract)
6040 {
6041 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6042 if (e->X_op == O_pseudo_fixup)
6043 e->X_op = O_symbol;
6044 }
6045
6046 fix->opnd = idesc->operands[index];
6047 fix->expr = *e;
6048 fix->is_pcrel = 0;
6049 ++CURR_SLOT.num_fixups;
87f8eb97 6050 return OPERAND_MATCH;
800eeca4
JW		 6051 }
6052 else if (e->X_op != O_constant
6053 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 6054 return OPERAND_MISMATCH;
800eeca4
JW		 6055
6056 if (opnd == IA64_OPND_IMM8M1U4)
6057 {
6058 /* Zero is not valid for unsigned compares that take an adjusted
6059 constant immediate range. */
6060 if (e->X_add_number == 0)
87f8eb97 6061 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6062
6063 /* Sign-extend 32-bit unsigned numbers, so that the following range
6064 checks will work. */
6065 val = e->X_add_number;
197865e8
KH		 6066 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6067 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6068 val = ((val << 32) >> 32);
6069
6070 /* Check for 0x100000000. This is valid because
6071 0x100000000-1 is the same as ((uint32_t) -1). */
6072 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 6073 return OPERAND_MATCH;
800eeca4
JW		 6074
6075 val = val - 1;
6076 }
6077 else if (opnd == IA64_OPND_IMM8M1U8)
6078 {
6079 /* Zero is not valid for unsigned compares that take an adjusted
6080 constant immediate range. */
6081 if (e->X_add_number == 0)
87f8eb97 6082 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6083
6084 /* Check for 0x10000000000000000. */
6085 if (e->X_op == O_big)
6086 {
6087 if (generic_bignum[0] == 0
6088 && generic_bignum[1] == 0
6089 && generic_bignum[2] == 0
6090 && generic_bignum[3] == 0
6091 && generic_bignum[4] == 1)
87f8eb97 6092 return OPERAND_MATCH;
800eeca4 6093 else
87f8eb97 6094 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6095 }
6096 else
6097 val = e->X_add_number - 1;
6098 }
6099 else if (opnd == IA64_OPND_IMM8M1)
6100 val = e->X_add_number - 1;
6101 else if (opnd == IA64_OPND_IMM8U4)
6102 {
6103 /* Sign-extend 32-bit unsigned numbers, so that the following range
6104 checks will work. */
6105 val = e->X_add_number;
197865e8
KH		 6106 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6107 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6108 val = ((val << 32) >> 32);
6109 }
6110 else
6111 val = e->X_add_number;
6112
2434f565
JW		 6113 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
6114 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 6115 return OPERAND_MATCH;
6116 else
6117 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6118
6119 case IA64_OPND_INC3:
6120 /* +/- 1, 4, 8, 16 */
6121 val = e->X_add_number;
6122 if (val < 0)
6123 val = -val;
87f8eb97
JW		 6124 if (e->X_op == O_constant)
6125 {
6126 if ((val == 1 || val == 4 || val == 8 || val == 16))
6127 return OPERAND_MATCH;
6128 else
6129 return OPERAND_OUT_OF_RANGE;
6130 }
800eeca4
JW		 6131 break;
6132
6133 case IA64_OPND_TGT25:
6134 case IA64_OPND_TGT25b:
6135 case IA64_OPND_TGT25c:
6136 case IA64_OPND_TGT64:
6137 if (e->X_op == O_symbol)
6138 {
6139 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6140 if (opnd == IA64_OPND_TGT25)
6141 fix->code = BFD_RELOC_IA64_PCREL21F;
6142 else if (opnd == IA64_OPND_TGT25b)
6143 fix->code = BFD_RELOC_IA64_PCREL21M;
6144 else if (opnd == IA64_OPND_TGT25c)
6145 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 6146 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 6147 fix->code = BFD_RELOC_IA64_PCREL60B;
6148 else
6149 abort ();
6150
800eeca4
JW		 6151 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6152 fix->opnd = idesc->operands[index];
6153 fix->expr = *e;
6154 fix->is_pcrel = 1;
6155 ++CURR_SLOT.num_fixups;
87f8eb97 6156 return OPERAND_MATCH;
800eeca4
JW		 6157 }
6158 case IA64_OPND_TAG13:
6159 case IA64_OPND_TAG13b:
6160 switch (e->X_op)
6161 {
6162 case O_constant:
87f8eb97 6163 return OPERAND_MATCH;
800eeca4
JW		 6164
6165 case O_symbol:
6166 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c 6167 /* There are no external relocs for TAG13/TAG13b fields, so we
55cf6793 6168 create a dummy reloc. This will not live past md_apply_fix. */
fa1cb89c
JW		 6169 fix->code = BFD_RELOC_UNUSED;
6170 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 6171 fix->opnd = idesc->operands[index];
6172 fix->expr = *e;
6173 fix->is_pcrel = 1;
6174 ++CURR_SLOT.num_fixups;
87f8eb97 6175 return OPERAND_MATCH;
800eeca4
JW		 6176
6177 default:
6178 break;
6179 }
6180 break;
6181
a823923b
RH		 6182 case IA64_OPND_LDXMOV:
6183 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6184 fix->code = BFD_RELOC_IA64_LDXMOV;
6185 fix->opnd = idesc->operands[index];
6186 fix->expr = *e;
6187 fix->is_pcrel = 0;
6188 ++CURR_SLOT.num_fixups;
6189 return OPERAND_MATCH;
6190
800eeca4
JW		 6191 default:
6192 break;
6193 }
87f8eb97 6194 return OPERAND_MISMATCH;
800eeca4
JW		 6195}
6196
6197static int
e4e8248d 6198parse_operand (e, more)
800eeca4 6199 expressionS *e;
e4e8248d 6200 int more;
800eeca4
JW		 6201{
6202 int sep = '\0';
6203
6204 memset (e, 0, sizeof (*e));
6205 e->X_op = O_absent;
6206 SKIP_WHITESPACE ();
60d11e55 6207 expression_and_evaluate (e);
e4e8248d
JB		 6208 sep = *input_line_pointer;
6209 if (more && (sep == ',' || sep == more))
6210 ++input_line_pointer;
800eeca4
JW		 6211 return sep;
6212}
6213
6214/* Returns the next entry in the opcode table that matches the one in
6215 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6216 found, NULL is returned instead. */
800eeca4
JW		 6217
6218static struct ia64_opcode *
6219get_next_opcode (struct ia64_opcode *idesc)
6220{
6221 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6222 ia64_free_opcode (idesc);
6223 return next;
6224}
6225
6226/* Parse the operands for the opcode and find the opcode variant that
6227 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6228
6229static struct ia64_opcode *
800eeca4
JW		 6230parse_operands (idesc)
6231 struct ia64_opcode *idesc;
6232{
6233 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6234 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6235 int reg1, reg2;
6236 char reg_class;
800eeca4 6237 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6238 enum operand_match_result result;
800eeca4
JW		 6239 char mnemonic[129];
6240 char *first_arg = 0, *end, *saved_input_pointer;
6241 unsigned int sof;
6242
6243 assert (strlen (idesc->name) <= 128);
6244
6245 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6246 if (idesc->operands[2] == IA64_OPND_SOF
6247 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6248 {
6249 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6250 can't parse the first operand until we have parsed the
6251 remaining operands of the "alloc" instruction. */
6252 SKIP_WHITESPACE ();
6253 first_arg = input_line_pointer;
6254 end = strchr (input_line_pointer, '=');
6255 if (!end)
6256 {
ad4b42b4 6257 as_bad (_("Expected separator `='"));
800eeca4
JW		 6258 return 0;
6259 }
6260 input_line_pointer = end + 1;
6261 ++i;
6262 ++num_outputs;
6263 }
6264
d3156ecc 6265 for (; ; ++i)
800eeca4 6266 {
d3156ecc
JB		 6267 if (i < NELEMS (CURR_SLOT.opnd))
6268 {
e4e8248d 6269 sep = parse_operand (CURR_SLOT.opnd + i, '=');
d3156ecc
JB		 6270 if (CURR_SLOT.opnd[i].X_op == O_absent)
6271 break;
6272 }
6273 else
6274 {
6275 expressionS dummy;
6276
e4e8248d 6277 sep = parse_operand (&dummy, '=');
d3156ecc
JB		 6278 if (dummy.X_op == O_absent)
6279 break;
6280 }
800eeca4
JW		 6281
6282 ++num_operands;
6283
6284 if (sep != '=' && sep != ',')
6285 break;
6286
6287 if (sep == '=')
6288 {
6289 if (num_outputs > 0)
ad4b42b4 6290 as_bad (_("Duplicate equal sign (=) in instruction"));
800eeca4
JW		 6291 else
6292 num_outputs = i + 1;
6293 }
6294 }
6295 if (sep != '\0')
6296 {
ad4b42b4 6297 as_bad (_("Illegal operand separator `%c'"), sep);
800eeca4
JW		 6298 return 0;
6299 }
197865e8 6300
60b9a617
JB		 6301 if (idesc->operands[2] == IA64_OPND_SOF
6302 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4 6303 {
ef0241e7
JB		 6304 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6305 Note, however, that due to that mapping operand numbers in error
6306 messages for any of the constant operands will not be correct. */
800eeca4 6307 know (strcmp (idesc->name, "alloc") == 0);
ef0241e7
JB		 6308 /* The first operand hasn't been parsed/initialized, yet (but
6309 num_operands intentionally doesn't account for that). */
6310 i = num_operands > 4 ? 2 : 1;
6311#define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6312 ? CURR_SLOT.opnd[n].X_add_number \
6313 : 0)
6314 sof = set_regstack (FORCE_CONST(i),
6315 FORCE_CONST(i + 1),
6316 FORCE_CONST(i + 2),
6317 FORCE_CONST(i + 3));
6318#undef FORCE_CONST
6319
6320 /* now we can parse the first arg: */
6321 saved_input_pointer = input_line_pointer;
6322 input_line_pointer = first_arg;
6323 sep = parse_operand (CURR_SLOT.opnd + 0, '=');
6324 if (sep != '=')
6325 --num_outputs; /* force error */
6326 input_line_pointer = saved_input_pointer;
6327
6328 CURR_SLOT.opnd[i].X_add_number = sof;
6329 if (CURR_SLOT.opnd[i + 1].X_op == O_constant
6330 && CURR_SLOT.opnd[i + 2].X_op == O_constant)
6331 CURR_SLOT.opnd[i + 1].X_add_number
6332 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6333 else
6334 CURR_SLOT.opnd[i + 1].X_op = O_illegal;
6335 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6336 }
6337
d3156ecc 6338 highest_unmatched_operand = -4;
87f8eb97
JW		 6339 curr_out_of_range_pos = -1;
6340 error_pos = 0;
800eeca4
JW		 6341 for (; idesc; idesc = get_next_opcode (idesc))
6342 {
6343 if (num_outputs != idesc->num_outputs)
6344 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6345 if (highest_unmatched_operand < 0)
6346 highest_unmatched_operand |= 1;
6347 if (num_operands > NELEMS (idesc->operands)
6348 || (num_operands < NELEMS (idesc->operands)
6349 && idesc->operands[num_operands])
6350 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6351 continue; /* mismatch in number of arguments */
6352 if (highest_unmatched_operand < 0)
6353 highest_unmatched_operand |= 2;
800eeca4
JW		 6354
6355 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6356
6357 /* Try to match all operands. If we see an out-of-range operand,
6358 then continue trying to match the rest of the operands, since if
6359 the rest match, then this idesc will give the best error message. */
6360
6361 out_of_range_pos = -1;
800eeca4 6362 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6363 {
6364 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6365 if (result != OPERAND_MATCH)
6366 {
6367 if (result != OPERAND_OUT_OF_RANGE)
6368 break;
6369 if (out_of_range_pos < 0)
6370 /* remember position of the first out-of-range operand: */
6371 out_of_range_pos = i;
6372 }
6373 }
800eeca4 6374
87f8eb97
JW		 6375 /* If we did not match all operands, or if at least one operand was
6376 out-of-range, then this idesc does not match. Keep track of which
6377 idesc matched the most operands before failing. If we have two
6378 idescs that failed at the same position, and one had an out-of-range
6379 operand, then prefer the out-of-range operand. Thus if we have
6380 "add r0=0x1000000,r1" we get an error saying the constant is out
6381 of range instead of an error saying that the constant should have been
6382 a register. */
6383
6384 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6385 {
87f8eb97
JW		 6386 if (i > highest_unmatched_operand
6387 || (i == highest_unmatched_operand
6388 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6389 {
6390 highest_unmatched_operand = i;
87f8eb97
JW		 6391 if (out_of_range_pos >= 0)
6392 {
6393 expected_operand = idesc->operands[out_of_range_pos];
6394 error_pos = out_of_range_pos;
6395 }
6396 else
6397 {
6398 expected_operand = idesc->operands[i];
6399 error_pos = i;
6400 }
6401 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6402 }
6403 continue;
6404 }
6405
800eeca4
JW		 6406 break;
6407 }
6408 if (!idesc)
6409 {
6410 if (expected_operand)
ad4b42b4 6411 as_bad (_("Operand %u of `%s' should be %s"),
87f8eb97 6412 error_pos + 1, mnemonic,
800eeca4 6413 elf64_ia64_operands[expected_operand].desc);
d3156ecc 6414 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
ad4b42b4 6415 as_bad (_("Wrong number of output operands"));
d3156ecc 6416 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
ad4b42b4 6417 as_bad (_("Wrong number of input operands"));
800eeca4 6418 else
ad4b42b4 6419 as_bad (_("Operand mismatch"));
800eeca4
JW		 6420 return 0;
6421 }
4b09e828
JB		 6422
6423 /* Check that the instruction doesn't use
6424 - r0, f0, or f1 as output operands
6425 - the same predicate twice as output operands
6426 - r0 as address of a base update load or store
6427 - the same GR as output and address of a base update load
6428 - two even- or two odd-numbered FRs as output operands of a floating
6429 point parallel load.
6430 At most two (conflicting) output (or output-like) operands can exist,
6431 (floating point parallel loads have three outputs, but the base register,
6432 if updated, cannot conflict with the actual outputs). */
6433 reg2 = reg1 = -1;
6434 for (i = 0; i < num_operands; ++i)
6435 {
6436 int regno = 0;
6437
6438 reg_class = 0;
6439 switch (idesc->operands[i])
6440 {
6441 case IA64_OPND_R1:
6442 case IA64_OPND_R2:
6443 case IA64_OPND_R3:
6444 if (i < num_outputs)
6445 {
6446 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6447 reg_class = 'r';
6448 else if (reg1 < 0)
6449 reg1 = CURR_SLOT.opnd[i].X_add_number;
6450 else if (reg2 < 0)
6451 reg2 = CURR_SLOT.opnd[i].X_add_number;
6452 }
6453 break;
6454 case IA64_OPND_P1:
6455 case IA64_OPND_P2:
6456 if (i < num_outputs)
6457 {
6458 if (reg1 < 0)
6459 reg1 = CURR_SLOT.opnd[i].X_add_number;
6460 else if (reg2 < 0)
6461 reg2 = CURR_SLOT.opnd[i].X_add_number;
6462 }
6463 break;
6464 case IA64_OPND_F1:
6465 case IA64_OPND_F2:
6466 case IA64_OPND_F3:
6467 case IA64_OPND_F4:
6468 if (i < num_outputs)
6469 {
6470 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6471 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6472 {
6473 reg_class = 'f';
6474 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6475 }
6476 else if (reg1 < 0)
6477 reg1 = CURR_SLOT.opnd[i].X_add_number;
6478 else if (reg2 < 0)
6479 reg2 = CURR_SLOT.opnd[i].X_add_number;
6480 }
6481 break;
6482 case IA64_OPND_MR3:
6483 if (idesc->flags & IA64_OPCODE_POSTINC)
6484 {
6485 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6486 reg_class = 'm';
6487 else if (reg1 < 0)
6488 reg1 = CURR_SLOT.opnd[i].X_add_number;
6489 else if (reg2 < 0)
6490 reg2 = CURR_SLOT.opnd[i].X_add_number;
6491 }
6492 break;
6493 default:
6494 break;
6495 }
6496 switch (reg_class)
6497 {
6498 case 0:
6499 break;
6500 default:
ad4b42b4 6501 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class, regno);
4b09e828
JB		 6502 break;
6503 case 'm':
ad4b42b4 6504 as_warn (_("Invalid use of `r%d' as base update address operand"), regno);
4b09e828
JB		 6505 break;
6506 }
6507 }
6508 if (reg1 == reg2)
6509 {
6510 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6511 {
6512 reg1 -= REG_GR;
6513 reg_class = 'r';
6514 }
6515 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6516 {
6517 reg1 -= REG_P;
6518 reg_class = 'p';
6519 }
6520 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6521 {
6522 reg1 -= REG_FR;
6523 reg_class = 'f';
6524 }
6525 else
6526 reg_class = 0;
6527 if (reg_class)
ad4b42b4 6528 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class, reg1);
4b09e828
JB		 6529 }
6530 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6531 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6532 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6533 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6534 && ! ((reg1 ^ reg2) & 1))
ad4b42b4 6535 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
4b09e828
JB		 6536 reg1 - REG_FR, reg2 - REG_FR);
6537 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6538 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6539 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6540 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
ad4b42b4 6541 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
4b09e828 6542 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6543 return idesc;
6544}
6545
6546static void
6547build_insn (slot, insnp)
6548 struct slot *slot;
6549 bfd_vma *insnp;
6550{
6551 const struct ia64_operand *odesc, *o2desc;
6552 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6553 bfd_vma insn;
6554 bfd_signed_vma val;
800eeca4
JW		 6555 const char *err;
6556 int i;
6557
6558 insn = idesc->opcode | slot->qp_regno;
6559
6560 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6561 {
c67e42c9
RH		 6562 if (slot->opnd[i].X_op == O_register
6563 || slot->opnd[i].X_op == O_constant
6564 || slot->opnd[i].X_op == O_index)
6565 val = slot->opnd[i].X_add_number;
6566 else if (slot->opnd[i].X_op == O_big)
800eeca4 6567 {
c67e42c9
RH		 6568 /* This must be the value 0x10000000000000000. */
6569 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6570 val = 0;
6571 }
6572 else
6573 val = 0;
6574
6575 switch (idesc->operands[i])
6576 {
6577 case IA64_OPND_IMMU64:
800eeca4
JW		 6578 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6579 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6580 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6581 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6582 continue;
6583
6584 case IA64_OPND_IMMU62:
542d6675
KH		 6585 val &= 0x3fffffffffffffffULL;
6586 if (val != slot->opnd[i].X_add_number)
6587 as_warn (_("Value truncated to 62 bits"));
6588 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6589 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6590 continue;
800eeca4 6591
c67e42c9
RH		 6592 case IA64_OPND_TGT64:
6593 val >>= 4;
6594 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6595 insn |= ((((val >> 59) & 0x1) << 36)
6596 | (((val >> 0) & 0xfffff) << 13));
6597 continue;
800eeca4 6598
c67e42c9
RH		 6599 case IA64_OPND_AR3:
6600 val -= REG_AR;
6601 break;
6602
6603 case IA64_OPND_B1:
6604 case IA64_OPND_B2:
6605 val -= REG_BR;
6606 break;
6607
6608 case IA64_OPND_CR3:
6609 val -= REG_CR;
6610 break;
6611
6612 case IA64_OPND_F1:
6613 case IA64_OPND_F2:
6614 case IA64_OPND_F3:
6615 case IA64_OPND_F4:
6616 val -= REG_FR;
6617 break;
6618
6619 case IA64_OPND_P1:
6620 case IA64_OPND_P2:
6621 val -= REG_P;
6622 break;
6623
6624 case IA64_OPND_R1:
6625 case IA64_OPND_R2:
6626 case IA64_OPND_R3:
6627 case IA64_OPND_R3_2:
6628 case IA64_OPND_CPUID_R3:
6629 case IA64_OPND_DBR_R3:
6630 case IA64_OPND_DTR_R3:
6631 case IA64_OPND_ITR_R3:
6632 case IA64_OPND_IBR_R3:
6633 case IA64_OPND_MR3:
6634 case IA64_OPND_MSR_R3:
6635 case IA64_OPND_PKR_R3:
6636 case IA64_OPND_PMC_R3:
6637 case IA64_OPND_PMD_R3:
197865e8 6638 case IA64_OPND_RR_R3:
c67e42c9
RH		 6639 val -= REG_GR;
6640 break;
6641
6642 default:
6643 break;
6644 }
6645
6646 odesc = elf64_ia64_operands + idesc->operands[i];
6647 err = (*odesc->insert) (odesc, val, &insn);
6648 if (err)
6649 as_bad_where (slot->src_file, slot->src_line,
ad4b42b4 6650 _("Bad operand value: %s"), err);
c67e42c9
RH		 6651 if (idesc->flags & IA64_OPCODE_PSEUDO)
6652 {
6653 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6654 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6655 {
6656 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6657 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6658 }
c67e42c9
RH		 6659 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6660 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6661 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6662 {
c67e42c9
RH		 6663 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6664 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6665 }
6666 }
6667 }
6668 *insnp = insn;
6669}
6670
6671static void
6672emit_one_bundle ()
6673{
f4660e2c 6674 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6675 enum ia64_unit required_unit, insn_unit = 0;
6676 enum ia64_insn_type type[3], insn_type;
6677 unsigned int template, orig_template;
542d6675 6678 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6679 struct ia64_opcode *idesc;
6680 int end_of_insn_group = 0, user_template = -1;
9b505842 6681 int n, i, j, first, curr, last_slot;
800eeca4
JW		 6682 bfd_vma t0 = 0, t1 = 0;
6683 struct label_fix *lfix;
07a53e5c 6684 bfd_boolean mark_label;
800eeca4
JW		 6685 struct insn_fix *ifix;
6686 char mnemonic[16];
6687 fixS *fix;
6688 char *f;
5a9ff93d 6689 int addr_mod;
800eeca4
JW		 6690
6691 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
c13781b8 6692 know (first >= 0 && first < NUM_SLOTS);
800eeca4
JW		 6693 n = MIN (3, md.num_slots_in_use);
6694
6695 /* Determine template: user user_template if specified, best match
542d6675 6696 otherwise: */
800eeca4
JW		 6697
6698 if (md.slot[first].user_template >= 0)
6699 user_template = template = md.slot[first].user_template;
6700 else
6701 {
032efc85 6702 /* Auto select appropriate template. */
800eeca4
JW		 6703 memset (type, 0, sizeof (type));
6704 curr = first;
6705 for (i = 0; i < n; ++i)
6706 {
032efc85
RH		 6707 if (md.slot[curr].label_fixups && i != 0)
6708 break;
800eeca4
JW		 6709 type[i] = md.slot[curr].idesc->type;
6710 curr = (curr + 1) % NUM_SLOTS;
6711 }
6712 template = best_template[type[0]][type[1]][type[2]];
6713 }
6714
542d6675 6715 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6716 for (i = 0; i < 3; ++i)
6717 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6718
6719 f = frag_more (16);
6720
5a9ff93d
JW		 6721 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6722 from the start of the frag. */
6723 addr_mod = frag_now_fix () & 15;
6724 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6725 as_bad (_("instruction address is not a multiple of 16"));
6726 frag_now->insn_addr = addr_mod;
6727 frag_now->has_code = 1;
6728
542d6675 6729 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6730 curr = first;
6731 idesc = md.slot[curr].idesc;
6732 end_of_insn_group = 0;
9b505842 6733 last_slot = -1;
800eeca4
JW		 6734 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6735 {
d6e78c11 6736 /* If we have unwind records, we may need to update some now. */
75214fb0
JB		 6737 unw_rec_list *ptr = md.slot[curr].unwind_record;
6738 unw_rec_list *end_ptr = NULL;
6739
d6e78c11
JW		 6740 if (ptr)
6741 {
6742 /* Find the last prologue/body record in the list for the current
6743 insn, and set the slot number for all records up to that point.
6744 This needs to be done now, because prologue/body records refer to
6745 the current point, not the point after the instruction has been
6746 issued. This matters because there may have been nops emitted
6747 meanwhile. Any non-prologue non-body record followed by a
6748 prologue/body record must also refer to the current point. */
75214fb0
JB		 6749 unw_rec_list *last_ptr;
6750
6751 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j)
6752 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record;
6753 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next)
d6e78c11
JW		 6754 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6755 || ptr->r.type == body)
6756 last_ptr = ptr;
6757 if (last_ptr)
6758 {
6759 /* Make last_ptr point one after the last prologue/body
6760 record. */
6761 last_ptr = last_ptr->next;
6762 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6763 ptr = ptr->next)
6764 {
6765 ptr->slot_number = (unsigned long) f + i;
6766 ptr->slot_frag = frag_now;
6767 }
6768 /* Remove the initialized records, so that we won't accidentally
6769 update them again if we insert a nop and continue. */
6770 md.slot[curr].unwind_record = last_ptr;
6771 }
6772 }
e0c9811a 6773
f4660e2c
JB		 6774 manual_bundling_off = md.slot[curr].manual_bundling_off;
6775 if (md.slot[curr].manual_bundling_on)
800eeca4 6776 {
f4660e2c
JB		 6777 if (curr == first)
6778 manual_bundling = 1;
800eeca4 6779 else
f4660e2c
JB		 6780 break; /* Need to start a new bundle. */
6781 }
6782
744b6414
JW		 6783 /* If this instruction specifies a template, then it must be the first
6784 instruction of a bundle. */
6785 if (curr != first && md.slot[curr].user_template >= 0)
6786 break;
6787
f4660e2c
JB		 6788 if (idesc->flags & IA64_OPCODE_SLOT2)
6789 {
6790 if (manual_bundling && !manual_bundling_off)
6791 {
6792 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 6793 _("`%s' must be last in bundle"), idesc->name);
f4660e2c
JB		 6794 if (i < 2)
6795 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6796 }
6797 i = 2;
800eeca4
JW		 6798 }
6799 if (idesc->flags & IA64_OPCODE_LAST)
6800 {
2434f565
JW		 6801 int required_slot;
6802 unsigned int required_template;
800eeca4
JW		 6803
6804 /* If we need a stop bit after an M slot, our only choice is
6805 template 5 (M;;MI). If we need a stop bit after a B
6806 slot, our only choice is to place it at the end of the
6807 bundle, because the only available templates are MIB,
6808 MBB, BBB, MMB, and MFB. We don't handle anything other
6809 than M and B slots because these are the only kind of
6810 instructions that can have the IA64_OPCODE_LAST bit set. */
6811 required_template = template;
6812 switch (idesc->type)
6813 {
6814 case IA64_TYPE_M:
6815 required_slot = 0;
6816 required_template = 5;
6817 break;
6818
6819 case IA64_TYPE_B:
6820 required_slot = 2;
6821 break;
6822
6823 default:
6824 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4
NC		 6825 _("Internal error: don't know how to force %s to end of instruction group"),
6826 idesc->name);
800eeca4
JW		 6827 required_slot = i;
6828 break;
6829 }
f4660e2c
JB		 6830 if (manual_bundling
6831 && (i > required_slot
6832 || (required_slot == 2 && !manual_bundling_off)
6833 || (user_template >= 0
6834 /* Changing from MMI to M;MI is OK. */
6835 && (template ^ required_template) > 1)))
6836 {
6837 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 6838 _("`%s' must be last in instruction group"),
f4660e2c
JB		 6839 idesc->name);
6840 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6841 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6842 }
800eeca4
JW		 6843 if (required_slot < i)
6844 /* Can't fit this instruction. */
6845 break;
6846
6847 i = required_slot;
6848 if (required_template != template)
6849 {
6850 /* If we switch the template, we need to reset the NOPs
6851 after slot i. The slot-types of the instructions ahead
6852 of i never change, so we don't need to worry about
6853 changing NOPs in front of this slot. */
6854 for (j = i; j < 3; ++j)
6855 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
53022e4a
JW		 6856
6857 /* We just picked a template that includes the stop bit in the
6858 middle, so we don't need another one emitted later. */
6859 md.slot[curr].end_of_insn_group = 0;
800eeca4
JW		 6860 }
6861 template = required_template;
6862 }
6863 if (curr != first && md.slot[curr].label_fixups)
6864 {
f4660e2c
JB		 6865 if (manual_bundling)
6866 {
6867 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 6868 _("Label must be first in a bundle"));
f4660e2c
JB		 6869 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6870 }
800eeca4
JW		 6871 /* This insn must go into the first slot of a bundle. */
6872 break;
6873 }
6874
800eeca4
JW		 6875 if (end_of_insn_group && md.num_slots_in_use >= 1)
6876 {
6877 /* We need an instruction group boundary in the middle of a
6878 bundle. See if we can switch to an other template with
6879 an appropriate boundary. */
6880
6881 orig_template = template;
6882 if (i == 1 && (user_template == 4
6883 || (user_template < 0
6884 && (ia64_templ_desc[template].exec_unit[0]
6885 == IA64_UNIT_M))))
6886 {
6887 template = 5;
6888 end_of_insn_group = 0;
6889 }
6890 else if (i == 2 && (user_template == 0
6891 || (user_template < 0
6892 && (ia64_templ_desc[template].exec_unit[1]
6893 == IA64_UNIT_I)))
6894 /* This test makes sure we don't switch the template if
6895 the next instruction is one that needs to be first in
6896 an instruction group. Since all those instructions are
6897 in the M group, there is no way such an instruction can
6898 fit in this bundle even if we switch the template. The
6899 reason we have to check for this is that otherwise we
6900 may end up generating "MI;;I M.." which has the deadly
6901 effect that the second M instruction is no longer the
f4660e2c 6902 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6903 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6904 {
6905 template = 1;
6906 end_of_insn_group = 0;
6907 }
f4660e2c
JB		 6908 else if (i == 1
6909 && user_template == 0
6910 && !(idesc->flags & IA64_OPCODE_FIRST))
6911 /* Use the next slot. */
6912 continue;
800eeca4
JW		 6913 else if (curr != first)
6914 /* can't fit this insn */
6915 break;
6916
6917 if (template != orig_template)
6918 /* if we switch the template, we need to reset the NOPs
6919 after slot i. The slot-types of the instructions ahead
6920 of i never change, so we don't need to worry about
6921 changing NOPs in front of this slot. */
6922 for (j = i; j < 3; ++j)
6923 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6924 }
6925 required_unit = ia64_templ_desc[template].exec_unit[i];
6926
c10d9d8f 6927 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6928 if (idesc->type == IA64_TYPE_DYN)
6929 {
97762d08
JB		 6930 enum ia64_opnd opnd1, opnd2;
6931
800eeca4
JW		 6932 if ((strcmp (idesc->name, "nop") == 0)
6933 || (strcmp (idesc->name, "break") == 0))
6934 insn_unit = required_unit;
91d777ee
L		 6935 else if (strcmp (idesc->name, "hint") == 0)
6936 {
6937 insn_unit = required_unit;
6938 if (required_unit == IA64_UNIT_B)
6939 {
6940 switch (md.hint_b)
6941 {
6942 case hint_b_ok:
6943 break;
6944 case hint_b_warning:
ad4b42b4 6945 as_warn (_("hint in B unit may be treated as nop"));
91d777ee
L		 6946 break;
6947 case hint_b_error:
6948 /* When manual bundling is off and there is no
6949 user template, we choose a different unit so
6950 that hint won't go into the current slot. We
6951 will fill the current bundle with nops and
6952 try to put hint into the next bundle. */
6953 if (!manual_bundling && user_template < 0)
6954 insn_unit = IA64_UNIT_I;
6955 else
ad4b42b4 6956 as_bad (_("hint in B unit can't be used"));
91d777ee
L		 6957 break;
6958 }
6959 }
6960 }
97762d08
JB		 6961 else if (strcmp (idesc->name, "chk.s") == 0
6962 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6963 {
6964 insn_unit = IA64_UNIT_M;
97762d08
JB		 6965 if (required_unit == IA64_UNIT_I
6966 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6967 insn_unit = IA64_UNIT_I;
6968 }
6969 else
ad4b42b4 6970 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
800eeca4 6971
f9f21a03
L		 6972 snprintf (mnemonic, sizeof (mnemonic), "%s.%c",
6973 idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6974 opnd1 = idesc->operands[0];
6975 opnd2 = idesc->operands[1];
3d56ab85 6976 ia64_free_opcode (idesc);
97762d08
JB		 6977 idesc = ia64_find_opcode (mnemonic);
6978 /* moves to/from ARs have collisions */
6979 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6980 {
6981 while (idesc != NULL
6982 && (idesc->operands[0] != opnd1
6983 || idesc->operands[1] != opnd2))
6984 idesc = get_next_opcode (idesc);
6985 }
97762d08 6986 md.slot[curr].idesc = idesc;
800eeca4
JW		 6987 }
6988 else
6989 {
6990 insn_type = idesc->type;
6991 insn_unit = IA64_UNIT_NIL;
6992 switch (insn_type)
6993 {
6994 case IA64_TYPE_A:
6995 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6996 insn_unit = required_unit;
6997 break;
542d6675 6998 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6999 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
7000 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
7001 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
7002 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
7003 default: break;
7004 }
7005 }
7006
7007 if (insn_unit != required_unit)
9b505842 7008 continue; /* Try next slot. */
800eeca4 7009
07a53e5c
RH		 7010 /* Now is a good time to fix up the labels for this insn. */
7011 mark_label = FALSE;
7012 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
7013 {
7014 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
7015 symbol_set_frag (lfix->sym, frag_now);
7016 mark_label |= lfix->dw2_mark_labels;
7017 }
7018 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
7019 {
7020 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
7021 symbol_set_frag (lfix->sym, frag_now);
7022 }
7023
7024 if (debug_type == DEBUG_DWARF2
7025 || md.slot[curr].loc_directive_seen
7026 || mark_label)
196e8040
JW		 7027 {
7028 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 7029
196e8040 7030 md.slot[curr].loc_directive_seen = 0;
07a53e5c
RH		 7031 if (mark_label)
7032 md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
7033
196e8040
JW		 7034 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
7035 }
800eeca4
JW		 7036
7037 build_insn (md.slot + curr, insn + i);
7038
d6e78c11
JW		 7039 ptr = md.slot[curr].unwind_record;
7040 if (ptr)
7041 {
7042 /* Set slot numbers for all remaining unwind records belonging to the
7043 current insn. There can not be any prologue/body unwind records
7044 here. */
d6e78c11
JW		 7045 for (; ptr != end_ptr; ptr = ptr->next)
7046 {
7047 ptr->slot_number = (unsigned long) f + i;
7048 ptr->slot_frag = frag_now;
7049 }
7050 md.slot[curr].unwind_record = NULL;
7051 }
10850f29 7052
800eeca4
JW		 7053 if (required_unit == IA64_UNIT_L)
7054 {
7055 know (i == 1);
7056 /* skip one slot for long/X-unit instructions */
7057 ++i;
7058 }
7059 --md.num_slots_in_use;
9b505842 7060 last_slot = i;
800eeca4 7061
800eeca4
JW		 7062 for (j = 0; j < md.slot[curr].num_fixups; ++j)
7063 {
7064 ifix = md.slot[curr].fixup + j;
5a080f89 7065 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 7066 &ifix->expr, ifix->is_pcrel, ifix->code);
7067 fix->tc_fix_data.opnd = ifix->opnd;
800eeca4
JW		 7068 fix->fx_file = md.slot[curr].src_file;
7069 fix->fx_line = md.slot[curr].src_line;
7070 }
7071
7072 end_of_insn_group = md.slot[curr].end_of_insn_group;
7073
542d6675 7074 /* clear slot: */
800eeca4
JW		 7075 ia64_free_opcode (md.slot[curr].idesc);
7076 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7077 md.slot[curr].user_template = -1;
7078
7079 if (manual_bundling_off)
7080 {
7081 manual_bundling = 0;
7082 break;
7083 }
7084 curr = (curr + 1) % NUM_SLOTS;
7085 idesc = md.slot[curr].idesc;
7086 }
6abae71c
JW		 7087
7088 /* A user template was specified, but the first following instruction did
7089 not fit. This can happen with or without manual bundling. */
7090 if (md.num_slots_in_use > 0 && last_slot < 0)
7091 {
7092 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 7093 _("`%s' does not fit into %s template"),
6abae71c
JW		 7094 idesc->name, ia64_templ_desc[template].name);
7095 /* Drop first insn so we don't livelock. */
7096 --md.num_slots_in_use;
7097 know (curr == first);
7098 ia64_free_opcode (md.slot[curr].idesc);
7099 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7100 md.slot[curr].user_template = -1;
7101 }
7102 else if (manual_bundling > 0)
800eeca4
JW		 7103 {
7104 if (md.num_slots_in_use > 0)
ac025970 7105 {
9b505842
JB		 7106 if (last_slot >= 2)
7107 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 7108 _("`%s' does not fit into bundle"), idesc->name);
9b505842
JB		 7109 else
7110 {
7111 const char *where;
7112
7113 if (template == 2)
7114 where = "X slot";
7115 else if (last_slot == 0)
7116 where = "slots 2 or 3";
7117 else
7118 where = "slot 3";
7119 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 7120 _("`%s' can't go in %s of %s template"),
9b505842
JB		 7121 idesc->name, where, ia64_templ_desc[template].name);
7122 }
ac025970 7123 }
800eeca4
JW		 7124 else
7125 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
ad4b42b4 7126 _("Missing '}' at end of file"));
800eeca4 7127 }
6abae71c 7128
800eeca4
JW		 7129 know (md.num_slots_in_use < NUM_SLOTS);
7130
7131 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
7132 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
7133
44f5c83a
JW		 7134 number_to_chars_littleendian (f + 0, t0, 8);
7135 number_to_chars_littleendian (f + 8, t1, 8);
800eeca4
JW		 7136}
7137
7138int
7139md_parse_option (c, arg)
7140 int c;
7141 char *arg;
7142{
7463c317 7143
800eeca4
JW		 7144 switch (c)
7145 {
c43c2cc5 7146 /* Switches from the Intel assembler. */
44f5c83a 7147 case 'm':
800eeca4
JW		 7148 if (strcmp (arg, "ilp64") == 0
7149 || strcmp (arg, "lp64") == 0
7150 || strcmp (arg, "p64") == 0)
7151 {
7152 md.flags |= EF_IA_64_ABI64;
7153 }
7154 else if (strcmp (arg, "ilp32") == 0)
7155 {
7156 md.flags &= ~EF_IA_64_ABI64;
7157 }
7158 else if (strcmp (arg, "le") == 0)
7159 {
7160 md.flags &= ~EF_IA_64_BE;
549f748d 7161 default_big_endian = 0;
800eeca4
JW		 7162 }
7163 else if (strcmp (arg, "be") == 0)
7164 {
7165 md.flags |= EF_IA_64_BE;
549f748d 7166 default_big_endian = 1;
800eeca4 7167 }
970d6792
L		 7168 else if (strncmp (arg, "unwind-check=", 13) == 0)
7169 {
7170 arg += 13;
7171 if (strcmp (arg, "warning") == 0)
7172 md.unwind_check = unwind_check_warning;
7173 else if (strcmp (arg, "error") == 0)
7174 md.unwind_check = unwind_check_error;
7175 else
7176 return 0;
7177 }
91d777ee
L		 7178 else if (strncmp (arg, "hint.b=", 7) == 0)
7179 {
7180 arg += 7;
7181 if (strcmp (arg, "ok") == 0)
7182 md.hint_b = hint_b_ok;
7183 else if (strcmp (arg, "warning") == 0)
7184 md.hint_b = hint_b_warning;
7185 else if (strcmp (arg, "error") == 0)
7186 md.hint_b = hint_b_error;
7187 else
7188 return 0;
7189 }
8c2fda1d
L		 7190 else if (strncmp (arg, "tune=", 5) == 0)
7191 {
7192 arg += 5;
7193 if (strcmp (arg, "itanium1") == 0)
7194 md.tune = itanium1;
7195 else if (strcmp (arg, "itanium2") == 0)
7196 md.tune = itanium2;
7197 else
7198 return 0;
7199 }
800eeca4
JW		 7200 else
7201 return 0;
7202 break;
7203
7204 case 'N':
7205 if (strcmp (arg, "so") == 0)
7206 {
542d6675 7207 /* Suppress signon message. */
800eeca4
JW		 7208 }
7209 else if (strcmp (arg, "pi") == 0)
7210 {
7211 /* Reject privileged instructions. FIXME */
7212 }
7213 else if (strcmp (arg, "us") == 0)
7214 {
7215 /* Allow union of signed and unsigned range. FIXME */
7216 }
7217 else if (strcmp (arg, "close_fcalls") == 0)
7218 {
7219 /* Do not resolve global function calls. */
7220 }
7221 else
7222 return 0;
7223 break;
7224
7225 case 'C':
7226 /* temp[="prefix"] Insert temporary labels into the object file
7227 symbol table prefixed by "prefix".
7228 Default prefix is ":temp:".
7229 */
7230 break;
7231
7232 case 'a':
800eeca4
JW		 7233 /* indirect=<tgt> Assume unannotated indirect branches behavior
7234 according to <tgt> --
7235 exit: branch out from the current context (default)
7236 labels: all labels in context may be branch targets
7237 */
85b40035
L		 7238 if (strncmp (arg, "indirect=", 9) != 0)
7239 return 0;
800eeca4
JW		 7240 break;
7241
7242 case 'x':
7243 /* -X conflicts with an ignored option, use -x instead */
7244 md.detect_dv = 1;
7245 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7246 {
7247 /* set default mode to explicit */
7248 md.default_explicit_mode = 1;
7249 break;
7250 }
800eeca4 7251 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7252 {
7253 md.default_explicit_mode = 0;
7254 }
f1dab70d
JB		 7255 else if (strcmp (arg, "none") == 0)
7256 {
7257 md.detect_dv = 0;
7258 }
800eeca4 7259 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7260 {
7261 md.debug_dv = 1;
7262 }
800eeca4 7263 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7264 {
7265 md.default_explicit_mode = 1;
7266 md.debug_dv = 1;
7267 }
f1dab70d
JB		 7268 else if (strcmp (arg, "debugn") == 0)
7269 {
7270 md.debug_dv = 1;
7271 md.detect_dv = 0;
7272 }
800eeca4 7273 else
542d6675
KH		 7274 {
7275 as_bad (_("Unrecognized option '-x%s'"), arg);
7276 }
800eeca4
JW		 7277 break;
7278
7279 case 'S':
7280 /* nops Print nops statistics. */
7281 break;
7282
c43c2cc5
JW		 7283 /* GNU specific switches for gcc. */
7284 case OPTION_MCONSTANT_GP:
7285 md.flags |= EF_IA_64_CONS_GP;
7286 break;
7287
7288 case OPTION_MAUTO_PIC:
7289 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7290 break;
7291
800eeca4
JW		 7292 default:
7293 return 0;
7294 }
7295
7296 return 1;
7297}
7298
7299void
7300md_show_usage (stream)
7301 FILE *stream;
7302{
542d6675 7303 fputs (_("\
800eeca4 7304IA-64 options:\n\
6290819d
NC		 7305 --mconstant-gp mark output file as using the constant-GP model\n\
7306 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7307 --mauto-pic mark output file as using the constant-GP model\n\
7308 without function descriptors (sets ELF header flag\n\
7309 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7310 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7311 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
8c2fda1d
L		 7312 -mtune=[itanium1|itanium2]\n\
7313 tune for a specific CPU (default -mtune=itanium2)\n\
970d6792
L		 7314 -munwind-check=[warning|error]\n\
7315 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7316 -mhint.b=[ok|warning|error]\n\
7317 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7318 -x | -xexplicit turn on dependency violation checking\n\
7319 -xauto automagically remove dependency violations (default)\n\
7320 -xnone turn off dependency violation checking\n\
7321 -xdebug debug dependency violation checker\n\
7322 -xdebugn debug dependency violation checker but turn off\n\
7323 dependency violation checking\n\
7324 -xdebugx debug dependency violation checker and turn on\n\
7325 dependency violation checking\n"),
800eeca4
JW		 7326 stream);
7327}
7328
acebd4ce
AS		 7329void
7330ia64_after_parse_args ()
7331{
7332 if (debug_type == DEBUG_STABS)
7333 as_fatal (_("--gstabs is not supported for ia64"));
7334}
7335
44576e1f
RH		 7336/* Return true if TYPE fits in TEMPL at SLOT. */
7337
7338static int
800eeca4
JW		 7339match (int templ, int type, int slot)
7340{
7341 enum ia64_unit unit;
7342 int result;
7343
7344 unit = ia64_templ_desc[templ].exec_unit[slot];
7345 switch (type)
7346 {
7347 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7348 case IA64_TYPE_A:
7349 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7350 break;
7351 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7352 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7353 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7354 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7355 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7356 default: result = 0; break;
7357 }
7358 return result;
7359}
7360
7c06efaa
JW		 7361/* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7362 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7363 type M or I would fit in TEMPL at SLOT. */
44576e1f
RH		 7364
7365static inline int
7366extra_goodness (int templ, int slot)
7367{
8c2fda1d
L		 7368 switch (md.tune)
7369 {
7370 case itanium1:
7371 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7372 return 2;
7373 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7374 return 1;
7375 else
7376 return 0;
7377 break;
7378 case itanium2:
7379 if (match (templ, IA64_TYPE_M, slot)
7380 || match (templ, IA64_TYPE_I, slot))
7381 /* Favor M- and I-unit NOPs. We definitely want to avoid
7382 F-unit and B-unit may cause split-issue or less-than-optimal
7383 branch-prediction. */
7384 return 2;
7385 else
7386 return 0;
7387 break;
7388 default:
7389 abort ();
7390 return 0;
7391 }
44576e1f
RH		 7392}
7393
800eeca4
JW		 7394/* This function is called once, at assembler startup time. It sets
7395 up all the tables, etc. that the MD part of the assembler will need
7396 that can be determined before arguments are parsed. */
7397void
7398md_begin ()
7399{
8b84be9d 7400 int i, j, k, t, goodness, best, ok;
800eeca4
JW		 7401 const char *err;
7402 char name[8];
7403
7404 md.auto_align = 1;
7405 md.explicit_mode = md.default_explicit_mode;
7406
7407 bfd_set_section_alignment (stdoutput, text_section, 4);
7408
0234cb7c 7409 /* Make sure function pointers get initialized. */
10a98291 7410 target_big_endian = -1;
549f748d 7411 dot_byteorder (default_big_endian);
10a98291 7412
35f5df7f
L		 7413 alias_hash = hash_new ();
7414 alias_name_hash = hash_new ();
7415 secalias_hash = hash_new ();
7416 secalias_name_hash = hash_new ();
7417
13ae64f3
JJ		 7418 pseudo_func[FUNC_DTP_MODULE].u.sym =
7419 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7420 &zero_address_frag);
7421
7422 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7423 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7424 &zero_address_frag);
7425
800eeca4 7426 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7427 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7428 &zero_address_frag);
800eeca4
JW		 7429
7430 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7431 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7432 &zero_address_frag);
800eeca4
JW		 7433
7434 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7435 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7436 &zero_address_frag);
800eeca4 7437
fa2c7eff
RH		 7438 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7439 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7440 &zero_address_frag);
7441
c67e42c9 7442 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7443 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7444 &zero_address_frag);
c67e42c9 7445
800eeca4 7446 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7447 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7448 &zero_address_frag);
800eeca4
JW		 7449
7450 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7451 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7452 &zero_address_frag);
800eeca4
JW		 7453
7454 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7455 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7456 &zero_address_frag);
800eeca4 7457
13ae64f3
JJ		 7458 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7459 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7460 &zero_address_frag);
7461
800eeca4 7462 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7463 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7464 &zero_address_frag);
800eeca4
JW		 7465
7466 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7467 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7468 &zero_address_frag);
800eeca4 7469
13ae64f3
JJ		 7470 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7471 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7472 &zero_address_frag);
7473
7474 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7475 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7476 &zero_address_frag);
7477
7478 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7479 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7480 &zero_address_frag);
7481
3969b680
RH		 7482 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7483 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7484 &zero_address_frag);
7485
f6fe78d6
JW		 7486 if (md.tune != itanium1)
7487 {
7488 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7489 le_nop[0] = 0x8;
7490 le_nop_stop[0] = 0x9;
7491 }
7492
197865e8 7493 /* Compute the table of best templates. We compute goodness as a
8c2fda1d
L		 7494 base 4 value, in which each match counts for 3. Match-failures
7495 result in NOPs and we use extra_goodness() to pick the execution
7496 units that are best suited for issuing the NOP. */
800eeca4
JW		 7497 for (i = 0; i < IA64_NUM_TYPES; ++i)
7498 for (j = 0; j < IA64_NUM_TYPES; ++j)
7499 for (k = 0; k < IA64_NUM_TYPES; ++k)
7500 {
7501 best = 0;
7502 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7503 {
7504 goodness = 0;
7505 if (match (t, i, 0))
7506 {
7507 if (match (t, j, 1))
7508 {
286cee81 7509 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2))
44576e1f 7510 goodness = 3 + 3 + 3;
800eeca4 7511 else
44576e1f 7512 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7513 }
7514 else if (match (t, j, 2))
44576e1f 7515 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7516 else
44576e1f
RH		 7517 {
7518 goodness = 3;
7519 goodness += extra_goodness (t, 1);
7520 goodness += extra_goodness (t, 2);
7521 }
800eeca4
JW		 7522 }
7523 else if (match (t, i, 1))
7524 {
286cee81 7525 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2))
44576e1f 7526 goodness = 3 + 3;
800eeca4 7527 else
44576e1f 7528 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7529 }
7530 else if (match (t, i, 2))
44576e1f 7531 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7532
7533 if (goodness > best)
7534 {
7535 best = goodness;
7536 best_template[i][j][k] = t;
7537 }
7538 }
7539 }
7540
7c06efaa
JW		 7541#ifdef DEBUG_TEMPLATES
7542 /* For debugging changes to the best_template calculations. We don't care
7543 about combinations with invalid instructions, so start the loops at 1. */
7544 for (i = 0; i < IA64_NUM_TYPES; ++i)
7545 for (j = 0; j < IA64_NUM_TYPES; ++j)
7546 for (k = 0; k < IA64_NUM_TYPES; ++k)
7547 {
7548 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f',
7549 'x', 'd' };
7550 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j],
7551 type_letter[k],
7552 ia64_templ_desc[best_template[i][j][k]].name);
7553 }
7554#endif
7555
800eeca4
JW		 7556 for (i = 0; i < NUM_SLOTS; ++i)
7557 md.slot[i].user_template = -1;
7558
7559 md.pseudo_hash = hash_new ();
7560 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7561 {
7562 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7563 (void *) (pseudo_opcode + i));
7564 if (err)
ad4b42b4 7565 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
800eeca4
JW		 7566 pseudo_opcode[i].name, err);
7567 }
7568
7569 md.reg_hash = hash_new ();
7570 md.dynreg_hash = hash_new ();
7571 md.const_hash = hash_new ();
7572 md.entry_hash = hash_new ();
7573
542d6675 7574 /* general registers: */
8b84be9d
JB		 7575 declare_register_set ("r", 128, REG_GR);
7576 declare_register ("gp", REG_GR + 1);
7577 declare_register ("sp", REG_GR + 12);
7578 declare_register ("tp", REG_GR + 13);
7579 declare_register_set ("ret", 4, REG_GR + 8);
800eeca4 7580
542d6675 7581 /* floating point registers: */
8b84be9d
JB		 7582 declare_register_set ("f", 128, REG_FR);
7583 declare_register_set ("farg", 8, REG_FR + 8);
7584 declare_register_set ("fret", 8, REG_FR + 8);
800eeca4 7585
542d6675 7586 /* branch registers: */
8b84be9d
JB		 7587 declare_register_set ("b", 8, REG_BR);
7588 declare_register ("rp", REG_BR + 0);
800eeca4 7589
8b84be9d
JB		 7590 /* predicate registers: */
7591 declare_register_set ("p", 64, REG_P);
7592 declare_register ("pr", REG_PR);
7593 declare_register ("pr.rot", REG_PR_ROT);
800eeca4 7594
8b84be9d
JB		 7595 /* application registers: */
7596 declare_register_set ("ar", 128, REG_AR);
5e0bd176
JB		 7597 for (i = 0; i < NELEMS (ar); ++i)
7598 declare_register (ar[i].name, REG_AR + ar[i].regnum);
800eeca4 7599
8b84be9d
JB		 7600 /* control registers: */
7601 declare_register_set ("cr", 128, REG_CR);
5e0bd176
JB		 7602 for (i = 0; i < NELEMS (cr); ++i)
7603 declare_register (cr[i].name, REG_CR + cr[i].regnum);
800eeca4 7604
8b84be9d
JB		 7605 declare_register ("ip", REG_IP);
7606 declare_register ("cfm", REG_CFM);
7607 declare_register ("psr", REG_PSR);
7608 declare_register ("psr.l", REG_PSR_L);
7609 declare_register ("psr.um", REG_PSR_UM);
7610
7611 for (i = 0; i < NELEMS (indirect_reg); ++i)
7612 {
7613 unsigned int regnum = indirect_reg[i].regnum;
7614
7615 md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum);
7616 }
800eeca4 7617
542d6675 7618 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7619 declare_register ("psp", REG_PSP);
7620
800eeca4
JW		 7621 for (i = 0; i < NELEMS (const_bits); ++i)
7622 {
7623 err = hash_insert (md.const_hash, const_bits[i].name,
7624 (PTR) (const_bits + i));
7625 if (err)
ad4b42b4 7626 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
800eeca4
JW		 7627 name, err);
7628 }
7629
44f5c83a
JW		 7630 /* Set the architecture and machine depending on defaults and command line
7631 options. */
7632 if (md.flags & EF_IA_64_ABI64)
7633 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7634 else
7635 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7636
7637 if (! ok)
7638 as_warn (_("Could not set architecture and machine"));
800eeca4 7639
557debba
JW		 7640 /* Set the pointer size and pointer shift size depending on md.flags */
7641
7642 if (md.flags & EF_IA_64_ABI64)
7643 {
7644 md.pointer_size = 8; /* pointers are 8 bytes */
7645 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7646 }
7647 else
7648 {
7649 md.pointer_size = 4; /* pointers are 4 bytes */
7650 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7651 }
7652
800eeca4
JW		 7653 md.mem_offset.hint = 0;
7654 md.path = 0;
7655 md.maxpaths = 0;
7656 md.entry_labels = NULL;
7657}
7658
970d6792
L		 7659/* Set the default options in md. Cannot do this in md_begin because
7660 that is called after md_parse_option which is where we set the
7661 options in md based on command line options. */
44f5c83a
JW		 7662
7663void
7664ia64_init (argc, argv)
2434f565
JW		 7665 int argc ATTRIBUTE_UNUSED;
7666 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7667{
1cd8ff38 7668 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7669 md.detect_dv = 1;
970d6792
L		 7670 /* FIXME: We should change it to unwind_check_error someday. */
7671 md.unwind_check = unwind_check_warning;
91d777ee 7672 md.hint_b = hint_b_error;
8c2fda1d 7673 md.tune = itanium2;
44f5c83a
JW		 7674}
7675
7676/* Return a string for the target object file format. */
7677
7678const char *
7679ia64_target_format ()
7680{
7681 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7682 {
72a76794
JW		 7683 if (md.flags & EF_IA_64_BE)
7684 {
7685 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7686#if defined(TE_AIX50)
7463c317 7687 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7688#elif defined(TE_HPUX)
7689 return "elf64-ia64-hpux-big";
7463c317 7690#else
72a76794 7691 return "elf64-ia64-big";
7463c317 7692#endif
72a76794 7693 else
1cd8ff38 7694#if defined(TE_AIX50)
7463c317 7695 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7696#elif defined(TE_HPUX)
7697 return "elf32-ia64-hpux-big";
7463c317 7698#else
72a76794 7699 return "elf32-ia64-big";
7463c317 7700#endif
72a76794 7701 }
44f5c83a 7702 else
72a76794
JW		 7703 {
7704 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7705#ifdef TE_AIX50
7706 return "elf64-ia64-aix-little";
7707#else
72a76794 7708 return "elf64-ia64-little";
7463c317 7709#endif
72a76794 7710 else
7463c317
TW		 7711#ifdef TE_AIX50
7712 return "elf32-ia64-aix-little";
7713#else
72a76794 7714 return "elf32-ia64-little";
7463c317 7715#endif
72a76794 7716 }
44f5c83a
JW		 7717 }
7718 else
7719 return "unknown-format";
7720}
7721
800eeca4
JW		 7722void
7723ia64_end_of_source ()
7724{
542d6675 7725 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7726 insn_group_break (1, 0, 0);
7727
542d6675 7728 /* emits slots we haven't written yet: */
800eeca4
JW		 7729 ia64_flush_insns ();
7730
7731 bfd_set_private_flags (stdoutput, md.flags);
7732
800eeca4
JW		 7733 md.mem_offset.hint = 0;
7734}
7735
7736void
7737ia64_start_line ()
7738{
e4e8248d
JB		 7739 static int first;
7740
7741 if (!first) {
7742 /* Make sure we don't reference input_line_pointer[-1] when that's
7743 not valid. */
7744 first = 1;
7745 return;
7746 }
7747
f1bcba5b 7748 if (md.qp.X_op == O_register)
ad4b42b4 7749 as_bad (_("qualifying predicate not followed by instruction"));
800eeca4
JW		 7750 md.qp.X_op = O_absent;
7751
7752 if (ignore_input ())
7753 return;
7754
7755 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7756 {
7757 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7758 {
7759 static int warned;
7760
7761 if (!warned)
7762 {
7763 warned = 1;
7764 as_warn (_("Explicit stops are ignored in auto mode"));
7765 }
7766 }
800eeca4 7767 else
542d6675 7768 insn_group_break (1, 0, 0);
800eeca4 7769 }
e4e8248d 7770 else if (input_line_pointer[-1] == '{')
800eeca4 7771 {
800eeca4 7772 if (md.manual_bundling)
ad4b42b4 7773 as_warn (_("Found '{' when manual bundling is already turned on"));
800eeca4
JW		 7774 else
7775 CURR_SLOT.manual_bundling_on = 1;
7776 md.manual_bundling = 1;
7777
542d6675
KH		 7778 /* Bundling is only acceptable in explicit mode
7779 or when in default automatic mode. */
800eeca4 7780 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7781 {
7782 if (!md.mode_explicitly_set
7783 && !md.default_explicit_mode)
7784 dot_dv_mode ('E');
7785 else
7786 as_warn (_("Found '{' after explicit switch to automatic mode"));
7787 }
e4e8248d
JB		 7788 }
7789 else if (input_line_pointer[-1] == '}')
7790 {
800eeca4 7791 if (!md.manual_bundling)
ad4b42b4 7792 as_warn (_("Found '}' when manual bundling is off"));
800eeca4
JW		 7793 else
7794 PREV_SLOT.manual_bundling_off = 1;
7795 md.manual_bundling = 0;
7796
7797 /* switch back to automatic mode, if applicable */
197865e8 7798 if (md.detect_dv
542d6675
KH		 7799 && md.explicit_mode
7800 && !md.mode_explicitly_set
7801 && !md.default_explicit_mode)
7802 dot_dv_mode ('A');
e4e8248d
JB		 7803 }
7804}
800eeca4 7805
e4e8248d
JB		 7806/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7807 labels. */
7808static int defining_tag = 0;
7809
7810int
7811ia64_unrecognized_line (ch)
7812 int ch;
7813{
7814 switch (ch)
7815 {
7816 case '(':
60d11e55 7817 expression_and_evaluate (&md.qp);
e4e8248d 7818 if (*input_line_pointer++ != ')')
800eeca4 7819 {
ad4b42b4 7820 as_bad (_("Expected ')'"));
e4e8248d
JB		 7821 return 0;
7822 }
7823 if (md.qp.X_op != O_register)
7824 {
ad4b42b4 7825 as_bad (_("Qualifying predicate expected"));
e4e8248d
JB		 7826 return 0;
7827 }
7828 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7829 {
ad4b42b4 7830 as_bad (_("Predicate register expected"));
e4e8248d 7831 return 0;
800eeca4 7832 }
800eeca4
JW		 7833 return 1;
7834
f1bcba5b
JW		 7835 case '[':
7836 {
7837 char *s;
7838 char c;
7839 symbolS *tag;
4d5a53ff 7840 int temp;
f1bcba5b
JW		 7841
7842 if (md.qp.X_op == O_register)
7843 {
ad4b42b4 7844 as_bad (_("Tag must come before qualifying predicate."));
f1bcba5b
JW		 7845 return 0;
7846 }
4d5a53ff
JW		 7847
7848 /* This implements just enough of read_a_source_file in read.c to
7849 recognize labels. */
7850 if (is_name_beginner (*input_line_pointer))
7851 {
7852 s = input_line_pointer;
7853 c = get_symbol_end ();
7854 }
7855 else if (LOCAL_LABELS_FB
3882b010 7856 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7857 {
7858 temp = 0;
3882b010 7859 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7860 temp = (temp * 10) + *input_line_pointer++ - '0';
7861 fb_label_instance_inc (temp);
7862 s = fb_label_name (temp, 0);
7863 c = *input_line_pointer;
7864 }
7865 else
7866 {
7867 s = NULL;
7868 c = '\0';
7869 }
f1bcba5b
JW		 7870 if (c != ':')
7871 {
7872 /* Put ':' back for error messages' sake. */
7873 *input_line_pointer++ = ':';
ad4b42b4 7874 as_bad (_("Expected ':'"));
f1bcba5b
JW		 7875 return 0;
7876 }
4d5a53ff 7877
f1bcba5b
JW		 7878 defining_tag = 1;
7879 tag = colon (s);
7880 defining_tag = 0;
7881 /* Put ':' back for error messages' sake. */
7882 *input_line_pointer++ = ':';
7883 if (*input_line_pointer++ != ']')
7884 {
ad4b42b4 7885 as_bad (_("Expected ']'"));
f1bcba5b
JW		 7886 return 0;
7887 }
7888 if (! tag)
7889 {
ad4b42b4 7890 as_bad (_("Tag name expected"));
f1bcba5b
JW		 7891 return 0;
7892 }
7893 return 1;
7894 }
7895
800eeca4
JW		 7896 default:
7897 break;
7898 }
542d6675
KH		 7899
7900 /* Not a valid line. */
7901 return 0;
800eeca4
JW		 7902}
7903
7904void
7905ia64_frob_label (sym)
7906 struct symbol *sym;
7907{
7908 struct label_fix *fix;
7909
f1bcba5b
JW		 7910 /* Tags need special handling since they are not bundle breaks like
7911 labels. */
7912 if (defining_tag)
7913 {
7914 fix = obstack_alloc (&notes, sizeof (*fix));
7915 fix->sym = sym;
7916 fix->next = CURR_SLOT.tag_fixups;
07a53e5c 7917 fix->dw2_mark_labels = FALSE;
f1bcba5b
JW		 7918 CURR_SLOT.tag_fixups = fix;
7919
7920 return;
7921 }
7922
800eeca4
JW		 7923 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7924 {
7925 md.last_text_seg = now_seg;
7926 fix = obstack_alloc (&notes, sizeof (*fix));
7927 fix->sym = sym;
7928 fix->next = CURR_SLOT.label_fixups;
07a53e5c 7929 fix->dw2_mark_labels = dwarf2_loc_mark_labels;
800eeca4
JW		 7930 CURR_SLOT.label_fixups = fix;
7931
542d6675 7932 /* Keep track of how many code entry points we've seen. */
800eeca4 7933 if (md.path == md.maxpaths)
542d6675
KH		 7934 {
7935 md.maxpaths += 20;
7936 md.entry_labels = (const char **)
7937 xrealloc ((void *) md.entry_labels,
7938 md.maxpaths * sizeof (char *));
7939 }
800eeca4
JW		 7940 md.entry_labels[md.path++] = S_GET_NAME (sym);
7941 }
7942}
7943
936cf02e
JW		 7944#ifdef TE_HPUX
7945/* The HP-UX linker will give unresolved symbol errors for symbols
7946 that are declared but unused. This routine removes declared,
7947 unused symbols from an object. */
7948int
7949ia64_frob_symbol (sym)
7950 struct symbol *sym;
7951{
7952 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7953 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7954 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7955 && ! S_IS_EXTERNAL (sym)))
7956 return 1;
7957 return 0;
7958}
7959#endif
7960
800eeca4
JW		 7961void
7962ia64_flush_pending_output ()
7963{
4d5a53ff
JW		 7964 if (!md.keep_pending_output
7965 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7966 {
7967 /* ??? This causes many unnecessary stop bits to be emitted.
7968 Unfortunately, it isn't clear if it is safe to remove this. */
7969 insn_group_break (1, 0, 0);
7970 ia64_flush_insns ();
7971 }
7972}
7973
7974/* Do ia64-specific expression optimization. All that's done here is
7975 to transform index expressions that are either due to the indexing
7976 of rotating registers or due to the indexing of indirect register
7977 sets. */
7978int
7979ia64_optimize_expr (l, op, r)
7980 expressionS *l;
7981 operatorT op;
7982 expressionS *r;
7983{
6a2375c6
JB		 7984 if (op != O_index)
7985 return 0;
7986 resolve_expression (l);
7987 if (l->X_op == O_register)
800eeca4 7988 {
6a2375c6
JB		 7989 unsigned num_regs = l->X_add_number >> 16;
7990
7991 resolve_expression (r);
7992 if (num_regs)
800eeca4 7993 {
6a2375c6
JB		 7994 /* Left side is a .rotX-allocated register. */
7995 if (r->X_op != O_constant)
800eeca4 7996 {
ad4b42b4 7997 as_bad (_("Rotating register index must be a non-negative constant"));
6a2375c6
JB		 7998 r->X_add_number = 0;
7999 }
8000 else if ((valueT) r->X_add_number >= num_regs)
8001 {
ad4b42b4 8002 as_bad (_("Index out of range 0..%u"), num_regs - 1);
800eeca4
JW		 8003 r->X_add_number = 0;
8004 }
8005 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
8006 return 1;
8007 }
6a2375c6 8008 else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR)
800eeca4 8009 {
6a2375c6
JB		 8010 if (r->X_op != O_register
8011 || r->X_add_number < REG_GR
8012 || r->X_add_number > REG_GR + 127)
800eeca4 8013 {
ad4b42b4 8014 as_bad (_("Indirect register index must be a general register"));
6a2375c6 8015 r->X_add_number = REG_GR;
800eeca4
JW		 8016 }
8017 l->X_op = O_index;
8b84be9d 8018 l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID];
800eeca4
JW		 8019 l->X_add_number = r->X_add_number;
8020 return 1;
8021 }
8022 }
ad4b42b4 8023 as_bad (_("Index can only be applied to rotating or indirect registers"));
6a2375c6
JB		 8024 /* Fall back to some register use of which has as little as possible
8025 side effects, to minimize subsequent error messages. */
8026 l->X_op = O_register;
8027 l->X_add_number = REG_GR + 3;
8028 return 1;
800eeca4
JW		 8029}
8030
8031int
16a48f83 8032ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 8033 char *name;
8034 expressionS *e;
16a48f83 8035 char *nextcharP;
800eeca4
JW		 8036{
8037 struct const_desc *cdesc;
8038 struct dynreg *dr = 0;
16a48f83 8039 unsigned int idx;
800eeca4
JW		 8040 struct symbol *sym;
8041 char *end;
8042
16a48f83
JB		 8043 if (*name == '@')
8044 {
8045 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
8046
8047 /* Find what relocation pseudo-function we're dealing with. */
8048 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
8049 if (pseudo_func[idx].name
8050 && pseudo_func[idx].name[0] == name[1]
8051 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
8052 {
8053 pseudo_type = pseudo_func[idx].type;
8054 break;
8055 }
8056 switch (pseudo_type)
8057 {
8058 case PSEUDO_FUNC_RELOC:
8059 end = input_line_pointer;
8060 if (*nextcharP != '(')
8061 {
ad4b42b4 8062 as_bad (_("Expected '('"));
2f6d622e 8063 break;
16a48f83
JB		 8064 }
8065 /* Skip '('. */
8066 ++input_line_pointer;
8067 expression (e);
8068 if (*input_line_pointer != ')')
8069 {
ad4b42b4 8070 as_bad (_("Missing ')'"));
16a48f83
JB		 8071 goto done;
8072 }
8073 /* Skip ')'. */
8074 ++input_line_pointer;
8075 if (e->X_op != O_symbol)
8076 {
8077 if (e->X_op != O_pseudo_fixup)
8078 {
ad4b42b4 8079 as_bad (_("Not a symbolic expression"));
16a48f83
JB		 8080 goto done;
8081 }
8082 if (idx != FUNC_LT_RELATIVE)
8083 {
ad4b42b4 8084 as_bad (_("Illegal combination of relocation functions"));
16a48f83
JB		 8085 goto done;
8086 }
8087 switch (S_GET_VALUE (e->X_op_symbol))
8088 {
8089 case FUNC_FPTR_RELATIVE:
8090 idx = FUNC_LT_FPTR_RELATIVE; break;
8091 case FUNC_DTP_MODULE:
8092 idx = FUNC_LT_DTP_MODULE; break;
8093 case FUNC_DTP_RELATIVE:
8094 idx = FUNC_LT_DTP_RELATIVE; break;
8095 case FUNC_TP_RELATIVE:
8096 idx = FUNC_LT_TP_RELATIVE; break;
8097 default:
ad4b42b4 8098 as_bad (_("Illegal combination of relocation functions"));
16a48f83
JB		 8099 goto done;
8100 }
8101 }
8102 /* Make sure gas doesn't get rid of local symbols that are used
8103 in relocs. */
8104 e->X_op = O_pseudo_fixup;
8105 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 8106 done:
8107 *nextcharP = *input_line_pointer;
16a48f83
JB		 8108 break;
8109
8110 case PSEUDO_FUNC_CONST:
8111 e->X_op = O_constant;
8112 e->X_add_number = pseudo_func[idx].u.ival;
8113 break;
8114
8115 case PSEUDO_FUNC_REG:
8116 e->X_op = O_register;
8117 e->X_add_number = pseudo_func[idx].u.ival;
8118 break;
8119
8120 default:
8121 return 0;
8122 }
16a48f83
JB		 8123 return 1;
8124 }
8125
542d6675 8126 /* first see if NAME is a known register name: */
800eeca4
JW		 8127 sym = hash_find (md.reg_hash, name);
8128 if (sym)
8129 {
8130 e->X_op = O_register;
8131 e->X_add_number = S_GET_VALUE (sym);
8132 return 1;
8133 }
8134
8135 cdesc = hash_find (md.const_hash, name);
8136 if (cdesc)
8137 {
8138 e->X_op = O_constant;
8139 e->X_add_number = cdesc->value;
8140 return 1;
8141 }
8142
542d6675 8143 /* check for inN, locN, or outN: */
26b810ce 8144 idx = 0;
800eeca4
JW		 8145 switch (name[0])
8146 {
8147 case 'i':
3882b010 8148 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 8149 {
8150 dr = &md.in;
26b810ce 8151 idx = 2;
800eeca4
JW		 8152 }
8153 break;
8154
8155 case 'l':
3882b010 8156 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 8157 {
8158 dr = &md.loc;
26b810ce 8159 idx = 3;
800eeca4
JW		 8160 }
8161 break;
8162
8163 case 'o':
3882b010 8164 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 8165 {
8166 dr = &md.out;
26b810ce 8167 idx = 3;
800eeca4
JW		 8168 }
8169 break;
8170
8171 default:
8172 break;
8173 }
8174
26b810ce
JB		 8175 /* Ignore register numbers with leading zeroes, except zero itself. */
8176 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 8177 {
26b810ce
JB		 8178 unsigned long regnum;
8179
542d6675 8180 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 8181 regnum = strtoul (name + idx, &end, 10);
8182 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 8183 {
26b810ce 8184 if (regnum >= dr->num_regs)
800eeca4
JW		 8185 {
8186 if (!dr->num_regs)
ad4b42b4 8187 as_bad (_("No current frame"));
800eeca4 8188 else
ad4b42b4 8189 as_bad (_("Register number out of range 0..%u"),
542d6675 8190 dr->num_regs - 1);
800eeca4
JW		 8191 regnum = 0;
8192 }
8193 e->X_op = O_register;
8194 e->X_add_number = dr->base + regnum;
8195 return 1;
8196 }
8197 }
8198
20b36a95
JB		 8199 end = alloca (strlen (name) + 1);
8200 strcpy (end, name);
8201 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 8202 if ((dr = hash_find (md.dynreg_hash, name)))
8203 {
8204 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 8205 Store the base register number in the low 16 bits of
8206 X_add_number and the size of the register set in the top 16
8207 bits. */
800eeca4
JW		 8208 e->X_op = O_register;
8209 e->X_add_number = dr->base | (dr->num_regs << 16);
8210 return 1;
8211 }
8212 return 0;
8213}
8214
8215/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8216
8217char *
8218ia64_canonicalize_symbol_name (name)
8219 char *name;
8220{
20b36a95
JB		 8221 size_t len = strlen (name), full = len;
8222
8223 while (len > 0 && name[len - 1] == '#')
8224 --len;
8225 if (len <= 0)
8226 {
8227 if (full > 0)
ad4b42b4 8228 as_bad (_("Standalone `#' is illegal"));
20b36a95
JB		 8229 }
8230 else if (len < full - 1)
ad4b42b4 8231 as_warn (_("Redundant `#' suffix operators"));
20b36a95 8232 name[len] = '\0';
800eeca4
JW		 8233 return name;
8234}
8235
3e37788f
JW		 8236/* Return true if idesc is a conditional branch instruction. This excludes
8237 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8238 because they always read/write resources regardless of the value of the
8239 qualifying predicate. br.ia must always use p0, and hence is always
8240 taken. Thus this function returns true for branches which can fall
8241 through, and which use no resources if they do fall through. */
1deb8127 8242
800eeca4
JW		 8243static int
8244is_conditional_branch (idesc)
542d6675 8245 struct ia64_opcode *idesc;
800eeca4 8246{
1deb8127 8247 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 8248 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8249 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 8250 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8251 && (idesc->name[2] == '\0'
3e37788f
JW		 8252 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8253 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8254 || idesc->name[2] == 'l'
8255 /* br.cond, br.call, br.clr */
8256 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8257 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8258 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8259}
8260
8261/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8262 returns zero. */
8263
800eeca4
JW		 8264static int
8265is_taken_branch (idesc)
542d6675 8266 struct ia64_opcode *idesc;
800eeca4
JW		 8267{
8268 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8269 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8270}
8271
8272/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8273 doubt, returns zero. */
8274
800eeca4
JW		 8275static int
8276is_interruption_or_rfi (idesc)
542d6675 8277 struct ia64_opcode *idesc;
800eeca4
JW		 8278{
8279 if (strcmp (idesc->name, "rfi") == 0)
8280 return 1;
8281 return 0;
8282}
8283
8284/* Returns the index of the given dependency in the opcode's list of chks, or
8285 -1 if there is no dependency. */
542d6675 8286
800eeca4
JW		 8287static int
8288depends_on (depind, idesc)
542d6675
KH		 8289 int depind;
8290 struct ia64_opcode *idesc;
800eeca4
JW		 8291{
8292 int i;
8293 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8294 for (i = 0; i < dep->nchks; i++)
800eeca4 8295 {
542d6675
KH		 8296 if (depind == DEP (dep->chks[i]))
8297 return i;
800eeca4
JW		 8298 }
8299 return -1;
8300}
8301
8302/* Determine a set of specific resources used for a particular resource
8303 class. Returns the number of specific resources identified For those
8304 cases which are not determinable statically, the resource returned is
197865e8 8305 marked nonspecific.
800eeca4
JW		 8306
8307 Meanings of value in 'NOTE':
8308 1) only read/write when the register number is explicitly encoded in the
8309 insn.
8310 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8311 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8312 3) general register value is used to specify an indirect register; not
8313 determinable statically.
8314 4) only read the given resource when bits 7:0 of the indirect index
8315 register value does not match the register number of the resource; not
8316 determinable statically.
8317 5) all rules are implementation specific.
8318 6) only when both the index specified by the reader and the index specified
8319 by the writer have the same value in bits 63:61; not determinable
197865e8 8320 statically.
800eeca4 8321 7) only access the specified resource when the corresponding mask bit is
197865e8 8322 set
800eeca4
JW		 8323 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8324 only read when these insns reference FR2-31
8325 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8326 written when these insns write FR32-127
8327 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8328 instruction
8329 11) The target predicates are written independently of PR[qp], but source
8330 registers are only read if PR[qp] is true. Since the state of PR[qp]
8331 cannot statically be determined, all source registers are marked used.
8332 12) This insn only reads the specified predicate register when that
8333 register is the PR[qp].
ad4b42b4 8334 13) This reference to ld-c only applies to the GR whose value is loaded
197865e8 8335 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8336 14) The RSE resource includes the implementation-specific RSE internal
8337 state resources. At least one (and possibly more) of these resources are
8338 read by each instruction listed in IC:rse-readers. At least one (and
8339 possibly more) of these resources are written by each insn listed in
197865e8 8340 IC:rse-writers.
800eeca4 8341 15+16) Represents reserved instructions, which the assembler does not
197865e8 8342 generate.
7f3dfb9c
L		 8343 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8344 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
800eeca4
JW		 8345
8346 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8347 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8348*/
8349
8350#define MAX_SPECS 256
8351#define DV_CHK 1
8352#define DV_REG 0
8353
8354static int
8355specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8356 const struct ia64_dependency *dep;
8357 struct ia64_opcode *idesc;
8358 int type; /* is this a DV chk or a DV reg? */
8359 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8360 int note; /* resource note for this insn's usage */
8361 int path; /* which execution path to examine */
800eeca4
JW		 8362{
8363 int count = 0;
8364 int i;
8365 int rsrc_write = 0;
8366 struct rsrc tmpl;
197865e8 8367
800eeca4
JW		 8368 if (dep->mode == IA64_DV_WAW
8369 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8370 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8371 rsrc_write = 1;
8372
8373 /* template for any resources we identify */
8374 tmpl.dependency = dep;
8375 tmpl.note = note;
8376 tmpl.insn_srlz = tmpl.data_srlz = 0;
8377 tmpl.qp_regno = CURR_SLOT.qp_regno;
8378 tmpl.link_to_qp_branch = 1;
8379 tmpl.mem_offset.hint = 0;
1f8b1395
AS		 8380 tmpl.mem_offset.offset = 0;
8381 tmpl.mem_offset.base = 0;
800eeca4 8382 tmpl.specific = 1;
a66d2bb7 8383 tmpl.index = -1;
7484b8e6 8384 tmpl.cmp_type = CMP_NONE;
1f8b1395
AS		 8385 tmpl.depind = 0;
8386 tmpl.file = NULL;
8387 tmpl.line = 0;
8388 tmpl.path = 0;
800eeca4
JW		 8389
8390#define UNHANDLED \
8391as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8392dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8393#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8394
8395 /* we don't need to track these */
8396 if (dep->semantics == IA64_DVS_NONE)
8397 return 0;
8398
8399 switch (dep->specifier)
8400 {
8401 case IA64_RS_AR_K:
8402 if (note == 1)
542d6675
KH		 8403 {
8404 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8405 {
8406 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8407 if (regno >= 0 && regno <= 7)
8408 {
8409 specs[count] = tmpl;
8410 specs[count++].index = regno;
8411 }
8412 }
8413 }
800eeca4 8414 else if (note == 0)
542d6675
KH		 8415 {
8416 for (i = 0; i < 8; i++)
8417 {
8418 specs[count] = tmpl;
8419 specs[count++].index = i;
8420 }
8421 }
800eeca4 8422 else
542d6675
KH		 8423 {
8424 UNHANDLED;
8425 }
800eeca4
JW		 8426 break;
8427
8428 case IA64_RS_AR_UNAT:
8429 /* This is a mov =AR or mov AR= instruction. */
8430 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8431 {
8432 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8433 if (regno == AR_UNAT)
8434 {
8435 specs[count++] = tmpl;
8436 }
8437 }
8438 else
8439 {
8440 /* This is a spill/fill, or other instruction that modifies the
8441 unat register. */
8442
8443 /* Unless we can determine the specific bits used, mark the whole
8444 thing; bits 8:3 of the memory address indicate the bit used in
8445 UNAT. The .mem.offset hint may be used to eliminate a small
8446 subset of conflicts. */
8447 specs[count] = tmpl;
8448 if (md.mem_offset.hint)
8449 {
542d6675
KH		 8450 if (md.debug_dv)
8451 fprintf (stderr, " Using hint for spill/fill\n");
8452 /* The index isn't actually used, just set it to something
8453 approximating the bit index. */
800eeca4
JW		 8454 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8455 specs[count].mem_offset.hint = 1;
8456 specs[count].mem_offset.offset = md.mem_offset.offset;
8457 specs[count++].mem_offset.base = md.mem_offset.base;
8458 }
8459 else
8460 {
8461 specs[count++].specific = 0;
8462 }
8463 }
8464 break;
8465
8466 case IA64_RS_AR:
8467 if (note == 1)
542d6675
KH		 8468 {
8469 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8470 {
8471 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8472 if ((regno >= 8 && regno <= 15)
8473 || (regno >= 20 && regno <= 23)
8474 || (regno >= 31 && regno <= 39)
8475 || (regno >= 41 && regno <= 47)
8476 || (regno >= 67 && regno <= 111))
8477 {
8478 specs[count] = tmpl;
8479 specs[count++].index = regno;
8480 }
8481 }
8482 }
800eeca4 8483 else
542d6675
KH		 8484 {
8485 UNHANDLED;
8486 }
800eeca4
JW		 8487 break;
8488
8489 case IA64_RS_ARb:
8490 if (note == 1)
542d6675
KH		 8491 {
8492 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8493 {
8494 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8495 if ((regno >= 48 && regno <= 63)
8496 || (regno >= 112 && regno <= 127))
8497 {
8498 specs[count] = tmpl;
8499 specs[count++].index = regno;
8500 }
8501 }
8502 }
800eeca4 8503 else if (note == 0)
542d6675
KH		 8504 {
8505 for (i = 48; i < 64; i++)
8506 {
8507 specs[count] = tmpl;
8508 specs[count++].index = i;
8509 }
8510 for (i = 112; i < 128; i++)
8511 {
8512 specs[count] = tmpl;
8513 specs[count++].index = i;
8514 }
8515 }
197865e8 8516 else
542d6675
KH		 8517 {
8518 UNHANDLED;
8519 }
800eeca4
JW		 8520 break;
8521
8522 case IA64_RS_BR:
8523 if (note != 1)
542d6675
KH		 8524 {
8525 UNHANDLED;
8526 }
800eeca4 8527 else
542d6675
KH		 8528 {
8529 if (rsrc_write)
8530 {
8531 for (i = 0; i < idesc->num_outputs; i++)
8532 if (idesc->operands[i] == IA64_OPND_B1
8533 || idesc->operands[i] == IA64_OPND_B2)
8534 {
8535 specs[count] = tmpl;
8536 specs[count++].index =
8537 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8538 }
8539 }
8540 else
8541 {
40449e9f 8542 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8543 if (idesc->operands[i] == IA64_OPND_B1
8544 || idesc->operands[i] == IA64_OPND_B2)
8545 {
8546 specs[count] = tmpl;
8547 specs[count++].index =
8548 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8549 }
8550 }
8551 }
800eeca4
JW		 8552 break;
8553
8554 case IA64_RS_CPUID: /* four or more registers */
8555 if (note == 3)
542d6675
KH		 8556 {
8557 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8558 {
8559 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8560 if (regno >= 0 && regno < NELEMS (gr_values)
8561 && KNOWN (regno))
8562 {
8563 specs[count] = tmpl;
8564 specs[count++].index = gr_values[regno].value & 0xFF;
8565 }
8566 else
8567 {
8568 specs[count] = tmpl;
8569 specs[count++].specific = 0;
8570 }
8571 }
8572 }
800eeca4 8573 else
542d6675
KH		 8574 {
8575 UNHANDLED;
8576 }
800eeca4
JW		 8577 break;
8578
8579 case IA64_RS_DBR: /* four or more registers */
8580 if (note == 3)
542d6675
KH		 8581 {
8582 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8583 {
8584 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8585 if (regno >= 0 && regno < NELEMS (gr_values)
8586 && KNOWN (regno))
8587 {
8588 specs[count] = tmpl;
8589 specs[count++].index = gr_values[regno].value & 0xFF;
8590 }
8591 else
8592 {
8593 specs[count] = tmpl;
8594 specs[count++].specific = 0;
8595 }
8596 }
8597 }
800eeca4 8598 else if (note == 0 && !rsrc_write)
542d6675
KH		 8599 {
8600 specs[count] = tmpl;
8601 specs[count++].specific = 0;
8602 }
800eeca4 8603 else
542d6675
KH		 8604 {
8605 UNHANDLED;
8606 }
800eeca4
JW		 8607 break;
8608
8609 case IA64_RS_IBR: /* four or more registers */
8610 if (note == 3)
542d6675
KH		 8611 {
8612 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8613 {
8614 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8615 if (regno >= 0 && regno < NELEMS (gr_values)
8616 && KNOWN (regno))
8617 {
8618 specs[count] = tmpl;
8619 specs[count++].index = gr_values[regno].value & 0xFF;
8620 }
8621 else
8622 {
8623 specs[count] = tmpl;
8624 specs[count++].specific = 0;
8625 }
8626 }
8627 }
800eeca4 8628 else
542d6675
KH		 8629 {
8630 UNHANDLED;
8631 }
800eeca4
JW		 8632 break;
8633
8634 case IA64_RS_MSR:
8635 if (note == 5)
8636 {
8637 /* These are implementation specific. Force all references to
8638 conflict with all other references. */
8639 specs[count] = tmpl;
8640 specs[count++].specific = 0;
8641 }
8642 else
8643 {
8644 UNHANDLED;
8645 }
8646 break;
8647
8648 case IA64_RS_PKR: /* 16 or more registers */
8649 if (note == 3 || note == 4)
542d6675
KH		 8650 {
8651 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8652 {
8653 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8654 if (regno >= 0 && regno < NELEMS (gr_values)
8655 && KNOWN (regno))
8656 {
8657 if (note == 3)
8658 {
8659 specs[count] = tmpl;
8660 specs[count++].index = gr_values[regno].value & 0xFF;
8661 }
8662 else
8663 for (i = 0; i < NELEMS (gr_values); i++)
8664 {
8665 /* Uses all registers *except* the one in R3. */
2434f565 8666 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8667 {
8668 specs[count] = tmpl;
8669 specs[count++].index = i;
8670 }
8671 }
8672 }
8673 else
8674 {
8675 specs[count] = tmpl;
8676 specs[count++].specific = 0;
8677 }
8678 }
8679 }
8680 else if (note == 0)
8681 {
8682 /* probe et al. */
8683 specs[count] = tmpl;
8684 specs[count++].specific = 0;
8685 }
8686 break;
8687
8688 case IA64_RS_PMC: /* four or more registers */
8689 if (note == 3)
8690 {
8691 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8692 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8693
8694 {
8695 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8696 ? 1 : !rsrc_write);
8697 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8698 if (regno >= 0 && regno < NELEMS (gr_values)
8699 && KNOWN (regno))
8700 {
8701 specs[count] = tmpl;
8702 specs[count++].index = gr_values[regno].value & 0xFF;
8703 }
8704 else
8705 {
8706 specs[count] = tmpl;
8707 specs[count++].specific = 0;
8708 }
8709 }
8710 }
8711 else
8712 {
8713 UNHANDLED;
8714 }
800eeca4
JW		 8715 break;
8716
8717 case IA64_RS_PMD: /* four or more registers */
8718 if (note == 3)
542d6675
KH		 8719 {
8720 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8721 {
8722 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8723 if (regno >= 0 && regno < NELEMS (gr_values)
8724 && KNOWN (regno))
8725 {
8726 specs[count] = tmpl;
8727 specs[count++].index = gr_values[regno].value & 0xFF;
8728 }
8729 else
8730 {
8731 specs[count] = tmpl;
8732 specs[count++].specific = 0;
8733 }
8734 }
8735 }
800eeca4 8736 else
542d6675
KH		 8737 {
8738 UNHANDLED;
8739 }
800eeca4
JW		 8740 break;
8741
8742 case IA64_RS_RR: /* eight registers */
8743 if (note == 6)
542d6675
KH		 8744 {
8745 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8746 {
8747 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8748 if (regno >= 0 && regno < NELEMS (gr_values)
8749 && KNOWN (regno))
8750 {
8751 specs[count] = tmpl;
8752 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8753 }
8754 else
8755 {
8756 specs[count] = tmpl;
8757 specs[count++].specific = 0;
8758 }
8759 }
8760 }
800eeca4 8761 else if (note == 0 && !rsrc_write)
542d6675
KH		 8762 {
8763 specs[count] = tmpl;
8764 specs[count++].specific = 0;
8765 }
197865e8 8766 else
542d6675
KH		 8767 {
8768 UNHANDLED;
8769 }
800eeca4
JW		 8770 break;
8771
8772 case IA64_RS_CR_IRR:
197865e8 8773 if (note == 0)
542d6675
KH		 8774 {
8775 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8776 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8777 if (rsrc_write
8778 && idesc->operands[1] == IA64_OPND_CR3
8779 && regno == CR_IVR)
8780 {
8781 for (i = 0; i < 4; i++)
8782 {
8783 specs[count] = tmpl;
8784 specs[count++].index = CR_IRR0 + i;
8785 }
8786 }
8787 }
800eeca4 8788 else if (note == 1)
542d6675
KH		 8789 {
8790 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8791 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8792 && regno >= CR_IRR0
8793 && regno <= CR_IRR3)
8794 {
8795 specs[count] = tmpl;
8796 specs[count++].index = regno;
8797 }
8798 }
800eeca4 8799 else
542d6675
KH		 8800 {
8801 UNHANDLED;
8802 }
800eeca4
JW		 8803 break;
8804
8805 case IA64_RS_CR_LRR:
8806 if (note != 1)
542d6675
KH		 8807 {
8808 UNHANDLED;
8809 }
197865e8 8810 else
542d6675
KH		 8811 {
8812 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8813 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8814 && (regno == CR_LRR0 || regno == CR_LRR1))
8815 {
8816 specs[count] = tmpl;
8817 specs[count++].index = regno;
8818 }
8819 }
800eeca4
JW		 8820 break;
8821
8822 case IA64_RS_CR:
8823 if (note == 1)
542d6675
KH		 8824 {
8825 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8826 {
8827 specs[count] = tmpl;
8828 specs[count++].index =
8829 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8830 }
8831 }
800eeca4 8832 else
542d6675
KH		 8833 {
8834 UNHANDLED;
8835 }
800eeca4
JW		 8836 break;
8837
8838 case IA64_RS_FR:
8839 case IA64_RS_FRb:
8840 if (note != 1)
542d6675
KH		 8841 {
8842 UNHANDLED;
8843 }
800eeca4 8844 else if (rsrc_write)
542d6675
KH		 8845 {
8846 if (dep->specifier == IA64_RS_FRb
8847 && idesc->operands[0] == IA64_OPND_F1)
8848 {
8849 specs[count] = tmpl;
8850 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8851 }
8852 }
800eeca4 8853 else
542d6675
KH		 8854 {
8855 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8856 {
8857 if (idesc->operands[i] == IA64_OPND_F2
8858 || idesc->operands[i] == IA64_OPND_F3
8859 || idesc->operands[i] == IA64_OPND_F4)
8860 {
8861 specs[count] = tmpl;
8862 specs[count++].index =
8863 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8864 }
8865 }
8866 }
800eeca4
JW		 8867 break;
8868
8869 case IA64_RS_GR:
8870 if (note == 13)
542d6675
KH		 8871 {
8872 /* This reference applies only to the GR whose value is loaded with
8873 data returned from memory. */
8874 specs[count] = tmpl;
8875 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8876 }
800eeca4 8877 else if (note == 1)
542d6675
KH		 8878 {
8879 if (rsrc_write)
8880 {
8881 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8882 if (idesc->operands[i] == IA64_OPND_R1
8883 || idesc->operands[i] == IA64_OPND_R2
8884 || idesc->operands[i] == IA64_OPND_R3)
8885 {
8886 specs[count] = tmpl;
197865e8 8887 specs[count++].index =
50b81f19
JW		 8888 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8889 }
8890 if (idesc->flags & IA64_OPCODE_POSTINC)
8891 for (i = 0; i < NELEMS (idesc->operands); i++)
8892 if (idesc->operands[i] == IA64_OPND_MR3)
8893 {
8894 specs[count] = tmpl;
8895 specs[count++].index =
8896 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8897 }
542d6675
KH		 8898 }
8899 else
8900 {
8901 /* Look for anything that reads a GR. */
8902 for (i = 0; i < NELEMS (idesc->operands); i++)
8903 {
8904 if (idesc->operands[i] == IA64_OPND_MR3
8905 || idesc->operands[i] == IA64_OPND_CPUID_R3
8906 || idesc->operands[i] == IA64_OPND_DBR_R3
8907 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8908 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8909 || idesc->operands[i] == IA64_OPND_PKR_R3
8910 || idesc->operands[i] == IA64_OPND_PMC_R3
8911 || idesc->operands[i] == IA64_OPND_PMD_R3
8912 || idesc->operands[i] == IA64_OPND_RR_R3
8913 || ((i >= idesc->num_outputs)
8914 && (idesc->operands[i] == IA64_OPND_R1
8915 || idesc->operands[i] == IA64_OPND_R2
8916 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8917 /* addl source register. */
8918 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8919 {
8920 specs[count] = tmpl;
8921 specs[count++].index =
8922 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8923 }
8924 }
8925 }
8926 }
197865e8 8927 else
542d6675
KH		 8928 {
8929 UNHANDLED;
8930 }
800eeca4
JW		 8931 break;
8932
139368c9
JW		 8933 /* This is the same as IA64_RS_PRr, except that the register range is
8934 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8935 case IA64_RS_PR:
8936 if (note == 0)
542d6675 8937 {
139368c9 8938 for (i = 1; i < 16; i++)
542d6675 8939 {
139368c9
JW		 8940 specs[count] = tmpl;
8941 specs[count++].index = i;
8942 }
8943 }
8944 else if (note == 7)
8945 {
8946 valueT mask = 0;
8947 /* Mark only those registers indicated by the mask. */
8948 if (rsrc_write)
8949 {
8950 mask = CURR_SLOT.opnd[2].X_add_number;
8951 for (i = 1; i < 16; i++)
8952 if (mask & ((valueT) 1 << i))
8953 {
8954 specs[count] = tmpl;
8955 specs[count++].index = i;
8956 }
8957 }
8958 else
8959 {
8960 UNHANDLED;
8961 }
8962 }
8963 else if (note == 11) /* note 11 implies note 1 as well */
8964 {
8965 if (rsrc_write)
8966 {
8967 for (i = 0; i < idesc->num_outputs; i++)
8968 {
8969 if (idesc->operands[i] == IA64_OPND_P1
8970 || idesc->operands[i] == IA64_OPND_P2)
8971 {
8972 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8973 if (regno >= 1 && regno < 16)
8974 {
8975 specs[count] = tmpl;
8976 specs[count++].index = regno;
8977 }
8978 }
8979 }
8980 }
8981 else
8982 {
8983 UNHANDLED;
8984 }
8985 }
8986 else if (note == 12)
8987 {
8988 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8989 {
8990 specs[count] = tmpl;
8991 specs[count++].index = CURR_SLOT.qp_regno;
8992 }
8993 }
8994 else if (note == 1)
8995 {
8996 if (rsrc_write)
8997 {
8998 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8999 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9000 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9001 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 9002
9003 if ((idesc->operands[0] == IA64_OPND_P1
9004 || idesc->operands[0] == IA64_OPND_P2)
9005 && p1 >= 1 && p1 < 16)
542d6675
KH		 9006 {
9007 specs[count] = tmpl;
139368c9
JW		 9008 specs[count].cmp_type =
9009 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9010 specs[count++].index = p1;
9011 }
9012 if ((idesc->operands[1] == IA64_OPND_P1
9013 || idesc->operands[1] == IA64_OPND_P2)
9014 && p2 >= 1 && p2 < 16)
9015 {
9016 specs[count] = tmpl;
9017 specs[count].cmp_type =
9018 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9019 specs[count++].index = p2;
542d6675
KH		 9020 }
9021 }
9022 else
9023 {
139368c9 9024 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 9025 {
9026 specs[count] = tmpl;
139368c9
JW		 9027 specs[count++].index = CURR_SLOT.qp_regno;
9028 }
9029 if (idesc->operands[1] == IA64_OPND_PR)
9030 {
9031 for (i = 1; i < 16; i++)
9032 {
9033 specs[count] = tmpl;
9034 specs[count++].index = i;
9035 }
542d6675
KH		 9036 }
9037 }
9038 }
139368c9
JW		 9039 else
9040 {
9041 UNHANDLED;
9042 }
9043 break;
9044
9045 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9046 simplified cases of this. */
9047 case IA64_RS_PRr:
9048 if (note == 0)
9049 {
9050 for (i = 16; i < 63; i++)
9051 {
9052 specs[count] = tmpl;
9053 specs[count++].index = i;
9054 }
9055 }
800eeca4 9056 else if (note == 7)
542d6675
KH		 9057 {
9058 valueT mask = 0;
9059 /* Mark only those registers indicated by the mask. */
9060 if (rsrc_write
9061 && idesc->operands[0] == IA64_OPND_PR)
9062 {
9063 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 9064 if (mask & ((valueT) 1 << 16))
139368c9
JW		 9065 for (i = 16; i < 63; i++)
9066 {
9067 specs[count] = tmpl;
9068 specs[count++].index = i;
9069 }
542d6675
KH		 9070 }
9071 else if (rsrc_write
9072 && idesc->operands[0] == IA64_OPND_PR_ROT)
9073 {
9074 for (i = 16; i < 63; i++)
9075 {
9076 specs[count] = tmpl;
9077 specs[count++].index = i;
9078 }
9079 }
9080 else
9081 {
9082 UNHANDLED;
9083 }
9084 }
800eeca4 9085 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 9086 {
9087 if (rsrc_write)
9088 {
9089 for (i = 0; i < idesc->num_outputs; i++)
9090 {
9091 if (idesc->operands[i] == IA64_OPND_P1
9092 || idesc->operands[i] == IA64_OPND_P2)
9093 {
9094 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 9095 if (regno >= 16 && regno < 63)
542d6675
KH		 9096 {
9097 specs[count] = tmpl;
9098 specs[count++].index = regno;
9099 }
9100 }
9101 }
9102 }
9103 else
9104 {
9105 UNHANDLED;
9106 }
9107 }
800eeca4 9108 else if (note == 12)
542d6675 9109 {
139368c9 9110 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9111 {
9112 specs[count] = tmpl;
9113 specs[count++].index = CURR_SLOT.qp_regno;
9114 }
9115 }
800eeca4 9116 else if (note == 1)
542d6675
KH		 9117 {
9118 if (rsrc_write)
9119 {
9120 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9121 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9122 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9123 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9124
542d6675
KH		 9125 if ((idesc->operands[0] == IA64_OPND_P1
9126 || idesc->operands[0] == IA64_OPND_P2)
139368c9 9127 && p1 >= 16 && p1 < 63)
542d6675
KH		 9128 {
9129 specs[count] = tmpl;
4a4f25cf 9130 specs[count].cmp_type =
7484b8e6 9131 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 9132 specs[count++].index = p1;
9133 }
9134 if ((idesc->operands[1] == IA64_OPND_P1
9135 || idesc->operands[1] == IA64_OPND_P2)
139368c9 9136 && p2 >= 16 && p2 < 63)
542d6675
KH		 9137 {
9138 specs[count] = tmpl;
4a4f25cf 9139 specs[count].cmp_type =
7484b8e6 9140 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 9141 specs[count++].index = p2;
9142 }
9143 }
9144 else
9145 {
139368c9 9146 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9147 {
9148 specs[count] = tmpl;
9149 specs[count++].index = CURR_SLOT.qp_regno;
9150 }
9151 if (idesc->operands[1] == IA64_OPND_PR)
9152 {
139368c9 9153 for (i = 16; i < 63; i++)
542d6675
KH		 9154 {
9155 specs[count] = tmpl;
9156 specs[count++].index = i;
9157 }
9158 }
9159 }
9160 }
197865e8 9161 else
542d6675
KH		 9162 {
9163 UNHANDLED;
9164 }
800eeca4
JW		 9165 break;
9166
9167 case IA64_RS_PSR:
197865e8 9168 /* Verify that the instruction is using the PSR bit indicated in
542d6675 9169 dep->regindex. */
800eeca4 9170 if (note == 0)
542d6675
KH		 9171 {
9172 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9173 {
9174 if (dep->regindex < 6)
9175 {
9176 specs[count++] = tmpl;
9177 }
9178 }
9179 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9180 {
9181 if (dep->regindex < 32
9182 || dep->regindex == 35
9183 || dep->regindex == 36
9184 || (!rsrc_write && dep->regindex == PSR_CPL))
9185 {
9186 specs[count++] = tmpl;
9187 }
9188 }
9189 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9190 {
9191 if (dep->regindex < 32
9192 || dep->regindex == 35
9193 || dep->regindex == 36
9194 || (rsrc_write && dep->regindex == PSR_CPL))
9195 {
9196 specs[count++] = tmpl;
9197 }
9198 }
9199 else
9200 {
9201 /* Several PSR bits have very specific dependencies. */
9202 switch (dep->regindex)
9203 {
9204 default:
9205 specs[count++] = tmpl;
9206 break;
9207 case PSR_IC:
9208 if (rsrc_write)
9209 {
9210 specs[count++] = tmpl;
9211 }
9212 else
9213 {
9214 /* Only certain CR accesses use PSR.ic */
9215 if (idesc->operands[0] == IA64_OPND_CR3
9216 || idesc->operands[1] == IA64_OPND_CR3)
9217 {
9218 int index =
9219 ((idesc->operands[0] == IA64_OPND_CR3)
9220 ? 0 : 1);
9221 int regno =
9222 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9223
9224 switch (regno)
9225 {
9226 default:
9227 break;
9228 case CR_ITIR:
9229 case CR_IFS:
9230 case CR_IIM:
9231 case CR_IIP:
9232 case CR_IPSR:
9233 case CR_ISR:
9234 case CR_IFA:
9235 case CR_IHA:
9236 case CR_IIPA:
9237 specs[count++] = tmpl;
9238 break;
9239 }
9240 }
9241 }
9242 break;
9243 case PSR_CPL:
9244 if (rsrc_write)
9245 {
9246 specs[count++] = tmpl;
9247 }
9248 else
9249 {
9250 /* Only some AR accesses use cpl */
9251 if (idesc->operands[0] == IA64_OPND_AR3
9252 || idesc->operands[1] == IA64_OPND_AR3)
9253 {
9254 int index =
9255 ((idesc->operands[0] == IA64_OPND_AR3)
9256 ? 0 : 1);
9257 int regno =
9258 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9259
9260 if (regno == AR_ITC
4f8631b1 9261 || regno == AR_RUC
542d6675 9262 || (index == 0
4f8631b1 9263 && (regno == AR_RSC
542d6675
KH		 9264 || (regno >= AR_K0
9265 && regno <= AR_K7))))
9266 {
9267 specs[count++] = tmpl;
9268 }
9269 }
9270 else
9271 {
9272 specs[count++] = tmpl;
9273 }
9274 break;
9275 }
9276 }
9277 }
9278 }
800eeca4 9279 else if (note == 7)
542d6675
KH		 9280 {
9281 valueT mask = 0;
9282 if (idesc->operands[0] == IA64_OPND_IMMU24)
9283 {
9284 mask = CURR_SLOT.opnd[0].X_add_number;
9285 }
9286 else
9287 {
9288 UNHANDLED;
9289 }
9290 if (mask & ((valueT) 1 << dep->regindex))
9291 {
9292 specs[count++] = tmpl;
9293 }
9294 }
800eeca4 9295 else if (note == 8)
542d6675
KH		 9296 {
9297 int min = dep->regindex == PSR_DFL ? 2 : 32;
9298 int max = dep->regindex == PSR_DFL ? 31 : 127;
9299 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9300 for (i = 0; i < NELEMS (idesc->operands); i++)
9301 {
9302 if (idesc->operands[i] == IA64_OPND_F1
9303 || idesc->operands[i] == IA64_OPND_F2
9304 || idesc->operands[i] == IA64_OPND_F3
9305 || idesc->operands[i] == IA64_OPND_F4)
9306 {
9307 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9308 if (reg >= min && reg <= max)
9309 {
9310 specs[count++] = tmpl;
9311 }
9312 }
9313 }
9314 }
800eeca4 9315 else if (note == 9)
542d6675
KH		 9316 {
9317 int min = dep->regindex == PSR_MFL ? 2 : 32;
9318 int max = dep->regindex == PSR_MFL ? 31 : 127;
9319 /* mfh is read on writes to FR32-127; mfl is read on writes to
9320 FR2-31 */
9321 for (i = 0; i < idesc->num_outputs; i++)
9322 {
9323 if (idesc->operands[i] == IA64_OPND_F1)
9324 {
9325 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9326 if (reg >= min && reg <= max)
9327 {
9328 specs[count++] = tmpl;
9329 }
9330 }
9331 }
9332 }
800eeca4 9333 else if (note == 10)
542d6675
KH		 9334 {
9335 for (i = 0; i < NELEMS (idesc->operands); i++)
9336 {
9337 if (idesc->operands[i] == IA64_OPND_R1
9338 || idesc->operands[i] == IA64_OPND_R2
9339 || idesc->operands[i] == IA64_OPND_R3)
9340 {
9341 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9342 if (regno >= 16 && regno <= 31)
9343 {
9344 specs[count++] = tmpl;
9345 }
9346 }
9347 }
9348 }
800eeca4 9349 else
542d6675
KH		 9350 {
9351 UNHANDLED;
9352 }
800eeca4
JW		 9353 break;
9354
9355 case IA64_RS_AR_FPSR:
9356 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9357 {
9358 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9359 if (regno == AR_FPSR)
9360 {
9361 specs[count++] = tmpl;
9362 }
9363 }
800eeca4 9364 else
542d6675
KH		 9365 {
9366 specs[count++] = tmpl;
9367 }
800eeca4
JW		 9368 break;
9369
197865e8 9370 case IA64_RS_ARX:
800eeca4
JW		 9371 /* Handle all AR[REG] resources */
9372 if (note == 0 || note == 1)
542d6675
KH		 9373 {
9374 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9375 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9376 && regno == dep->regindex)
9377 {
9378 specs[count++] = tmpl;
9379 }
9380 /* other AR[REG] resources may be affected by AR accesses */
9381 else if (idesc->operands[0] == IA64_OPND_AR3)
9382 {
9383 /* AR[] writes */
9384 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9385 switch (dep->regindex)
9386 {
9387 default:
9388 break;
9389 case AR_BSP:
9390 case AR_RNAT:
9391 if (regno == AR_BSPSTORE)
9392 {
9393 specs[count++] = tmpl;
9394 }
9395 case AR_RSC:
9396 if (!rsrc_write &&
9397 (regno == AR_BSPSTORE
9398 || regno == AR_RNAT))
9399 {
9400 specs[count++] = tmpl;
9401 }
9402 break;
9403 }
9404 }
9405 else if (idesc->operands[1] == IA64_OPND_AR3)
9406 {
9407 /* AR[] reads */
9408 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9409 switch (dep->regindex)
9410 {
9411 default:
9412 break;
9413 case AR_RSC:
9414 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9415 {
9416 specs[count++] = tmpl;
9417 }
9418 break;
9419 }
9420 }
9421 else
9422 {
9423 specs[count++] = tmpl;
9424 }
9425 }
800eeca4 9426 else
542d6675
KH		 9427 {
9428 UNHANDLED;
9429 }
800eeca4
JW		 9430 break;
9431
9432 case IA64_RS_CRX:
7f3dfb9c
L		 9433 /* Handle all CR[REG] resources.
9434 ??? FIXME: The rule 17 isn't really handled correctly. */
9435 if (note == 0 || note == 1 || note == 17)
542d6675
KH		 9436 {
9437 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9438 {
9439 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9440 if (regno == dep->regindex)
9441 {
9442 specs[count++] = tmpl;
9443 }
9444 else if (!rsrc_write)
9445 {
9446 /* Reads from CR[IVR] affect other resources. */
9447 if (regno == CR_IVR)
9448 {
9449 if ((dep->regindex >= CR_IRR0
9450 && dep->regindex <= CR_IRR3)
9451 || dep->regindex == CR_TPR)
9452 {
9453 specs[count++] = tmpl;
9454 }
9455 }
9456 }
9457 }
9458 else
9459 {
9460 specs[count++] = tmpl;
9461 }
9462 }
800eeca4 9463 else
542d6675
KH		 9464 {
9465 UNHANDLED;
9466 }
800eeca4
JW		 9467 break;
9468
9469 case IA64_RS_INSERVICE:
9470 /* look for write of EOI (67) or read of IVR (65) */
9471 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9472 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9473 || (idesc->operands[1] == IA64_OPND_CR3
9474 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9475 {
9476 specs[count++] = tmpl;
9477 }
800eeca4
JW		 9478 break;
9479
9480 case IA64_RS_GR0:
9481 if (note == 1)
542d6675
KH		 9482 {
9483 specs[count++] = tmpl;
9484 }
800eeca4 9485 else
542d6675
KH		 9486 {
9487 UNHANDLED;
9488 }
800eeca4
JW		 9489 break;
9490
9491 case IA64_RS_CFM:
9492 if (note != 2)
542d6675
KH		 9493 {
9494 specs[count++] = tmpl;
9495 }
800eeca4 9496 else
542d6675
KH		 9497 {
9498 /* Check if any of the registers accessed are in the rotating region.
9499 mov to/from pr accesses CFM only when qp_regno is in the rotating
9500 region */
9501 for (i = 0; i < NELEMS (idesc->operands); i++)
9502 {
9503 if (idesc->operands[i] == IA64_OPND_R1
9504 || idesc->operands[i] == IA64_OPND_R2
9505 || idesc->operands[i] == IA64_OPND_R3)
9506 {
9507 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9508 /* Assumes that md.rot.num_regs is always valid */
9509 if (md.rot.num_regs > 0
9510 && num > 31
9511 && num < 31 + md.rot.num_regs)
9512 {
9513 specs[count] = tmpl;
9514 specs[count++].specific = 0;
9515 }
9516 }
9517 else if (idesc->operands[i] == IA64_OPND_F1
9518 || idesc->operands[i] == IA64_OPND_F2
9519 || idesc->operands[i] == IA64_OPND_F3
9520 || idesc->operands[i] == IA64_OPND_F4)
9521 {
9522 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9523 if (num > 31)
9524 {
9525 specs[count] = tmpl;
9526 specs[count++].specific = 0;
9527 }
9528 }
9529 else if (idesc->operands[i] == IA64_OPND_P1
9530 || idesc->operands[i] == IA64_OPND_P2)
9531 {
9532 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9533 if (num > 15)
9534 {
9535 specs[count] = tmpl;
9536 specs[count++].specific = 0;
9537 }
9538 }
9539 }
9540 if (CURR_SLOT.qp_regno > 15)
9541 {
9542 specs[count] = tmpl;
9543 specs[count++].specific = 0;
9544 }
9545 }
800eeca4
JW		 9546 break;
9547
139368c9
JW		 9548 /* This is the same as IA64_RS_PRr, except simplified to account for
9549 the fact that there is only one register. */
800eeca4
JW		 9550 case IA64_RS_PR63:
9551 if (note == 0)
542d6675
KH		 9552 {
9553 specs[count++] = tmpl;
9554 }
139368c9 9555 else if (note == 7)
40449e9f
KH		 9556 {
9557 valueT mask = 0;
9558 if (idesc->operands[2] == IA64_OPND_IMM17)
9559 mask = CURR_SLOT.opnd[2].X_add_number;
9560 if (mask & ((valueT) 1 << 63))
139368c9 9561 specs[count++] = tmpl;
40449e9f 9562 }
800eeca4 9563 else if (note == 11)
542d6675
KH		 9564 {
9565 if ((idesc->operands[0] == IA64_OPND_P1
9566 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9567 || (idesc->operands[1] == IA64_OPND_P2
9568 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9569 {
9570 specs[count++] = tmpl;
9571 }
9572 }
800eeca4 9573 else if (note == 12)
542d6675
KH		 9574 {
9575 if (CURR_SLOT.qp_regno == 63)
9576 {
9577 specs[count++] = tmpl;
9578 }
9579 }
800eeca4 9580 else if (note == 1)
542d6675
KH		 9581 {
9582 if (rsrc_write)
9583 {
40449e9f
KH		 9584 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9585 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9586 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9587 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9588
4a4f25cf 9589 if (p1 == 63
7484b8e6
TW		 9590 && (idesc->operands[0] == IA64_OPND_P1
9591 || idesc->operands[0] == IA64_OPND_P2))
9592 {
40449e9f 9593 specs[count] = tmpl;
4a4f25cf 9594 specs[count++].cmp_type =
7484b8e6
TW		 9595 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9596 }
9597 if (p2 == 63
9598 && (idesc->operands[1] == IA64_OPND_P1
9599 || idesc->operands[1] == IA64_OPND_P2))
9600 {
40449e9f 9601 specs[count] = tmpl;
4a4f25cf 9602 specs[count++].cmp_type =
7484b8e6
TW		 9603 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9604 }
542d6675
KH		 9605 }
9606 else
9607 {
9608 if (CURR_SLOT.qp_regno == 63)
9609 {
9610 specs[count++] = tmpl;
9611 }
9612 }
9613 }
800eeca4 9614 else
542d6675
KH		 9615 {
9616 UNHANDLED;
9617 }
800eeca4
JW		 9618 break;
9619
9620 case IA64_RS_RSE:
9621 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9622 read resources have not yet been completely identified, so for now
9623 treat RSE as a single resource */
800eeca4 9624 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9625 {
9626 if (rsrc_write)
9627 {
9628 if (idesc->operands[0] == IA64_OPND_AR3
9629 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9630 {
a66d2bb7 9631 specs[count++] = tmpl;
542d6675
KH		 9632 }
9633 }
9634 else
9635 {
9636 if (idesc->operands[0] == IA64_OPND_AR3)
9637 {
9638 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9639 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9640 {
9641 specs[count++] = tmpl;
9642 }
9643 }
9644 else if (idesc->operands[1] == IA64_OPND_AR3)
9645 {
9646 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9647 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9648 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9649 {
9650 specs[count++] = tmpl;
9651 }
9652 }
9653 }
9654 }
197865e8 9655 else
542d6675
KH		 9656 {
9657 specs[count++] = tmpl;
9658 }
800eeca4
JW		 9659 break;
9660
9661 case IA64_RS_ANY:
9662 /* FIXME -- do any of these need to be non-specific? */
9663 specs[count++] = tmpl;
9664 break;
9665
9666 default:
9667 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9668 break;
9669 }
9670
9671 return count;
9672}
9673
9674/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9675 QP of the marking instruction and a subsequent branch on the same QP. */
9676
800eeca4
JW		 9677static void
9678clear_qp_branch_flag (mask)
542d6675 9679 valueT mask;
800eeca4
JW		 9680{
9681 int i;
542d6675 9682 for (i = 0; i < regdepslen; i++)
800eeca4 9683 {
197865e8 9684 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9685 if ((bit & mask) != 0)
542d6675
KH		 9686 {
9687 regdeps[i].link_to_qp_branch = 0;
9688 }
800eeca4
JW		 9689 }
9690}
9691
5e2f6673
L		 9692/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9693 any mutexes which contain one of the PRs and create new ones when
9694 needed. */
9695
9696static int
9697update_qp_mutex (valueT mask)
9698{
9699 int i;
9700 int add = 0;
9701
9702 i = 0;
9703 while (i < qp_mutexeslen)
9704 {
9705 if ((qp_mutexes[i].prmask & mask) != 0)
9706 {
9707 /* If it destroys and creates the same mutex, do nothing. */
9708 if (qp_mutexes[i].prmask == mask
9709 && qp_mutexes[i].path == md.path)
9710 {
9711 i++;
9712 add = -1;
9713 }
9714 else
9715 {
9716 int keep = 0;
9717
9718 if (md.debug_dv)
9719 {
9720 fprintf (stderr, " Clearing mutex relation");
9721 print_prmask (qp_mutexes[i].prmask);
9722 fprintf (stderr, "\n");
9723 }
9724
9725 /* Deal with the old mutex with more than 3+ PRs only if
9726 the new mutex on the same execution path with it.
9727
9728 FIXME: The 3+ mutex support is incomplete.
9729 dot_pred_rel () may be a better place to fix it. */
9730 if (qp_mutexes[i].path == md.path)
9731 {
9732 /* If it is a proper subset of the mutex, create a
9733 new mutex. */
9734 if (add == 0
9735 && (qp_mutexes[i].prmask & mask) == mask)
9736 add = 1;
9737
9738 qp_mutexes[i].prmask &= ~mask;
9739 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9740 {
9741 /* Modify the mutex if there are more than one
9742 PR left. */
9743 keep = 1;
9744 i++;
9745 }
9746 }
9747
9748 if (keep == 0)
9749 /* Remove the mutex. */
9750 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9751 }
9752 }
9753 else
9754 ++i;
9755 }
9756
9757 if (add == 1)
9758 add_qp_mutex (mask);
9759
9760 return add;
9761}
9762
197865e8 9763/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9764
542d6675
KH		 9765 Any changes to a PR clears the mutex relations which include that PR. */
9766
800eeca4
JW		 9767static void
9768clear_qp_mutex (mask)
542d6675 9769 valueT mask;
800eeca4
JW		 9770{
9771 int i;
9772
9773 i = 0;
9774 while (i < qp_mutexeslen)
9775 {
9776 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9777 {
9778 if (md.debug_dv)
9779 {
9780 fprintf (stderr, " Clearing mutex relation");
9781 print_prmask (qp_mutexes[i].prmask);
9782 fprintf (stderr, "\n");
9783 }
9784 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9785 }
800eeca4 9786 else
542d6675 9787 ++i;
800eeca4
JW		 9788 }
9789}
9790
9791/* Clear implies relations which contain PRs in the given masks.
9792 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9793 indicates the implied PR. */
9794
800eeca4
JW		 9795static void
9796clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9797 valueT p1_mask;
9798 valueT p2_mask;
800eeca4
JW		 9799{
9800 int i;
9801
9802 i = 0;
9803 while (i < qp_implieslen)
9804 {
197865e8 9805 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9806 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9807 {
9808 if (md.debug_dv)
9809 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9810 qp_implies[i].p1, qp_implies[i].p2);
9811 qp_implies[i] = qp_implies[--qp_implieslen];
9812 }
197865e8 9813 else
542d6675 9814 ++i;
800eeca4
JW		 9815 }
9816}
9817
542d6675
KH		 9818/* Add the PRs specified to the list of implied relations. */
9819
800eeca4
JW		 9820static void
9821add_qp_imply (p1, p2)
542d6675 9822 int p1, p2;
800eeca4
JW		 9823{
9824 valueT mask;
9825 valueT bit;
9826 int i;
9827
542d6675 9828 /* p0 is not meaningful here. */
800eeca4
JW		 9829 if (p1 == 0 || p2 == 0)
9830 abort ();
9831
9832 if (p1 == p2)
9833 return;
9834
542d6675
KH		 9835 /* If it exists already, ignore it. */
9836 for (i = 0; i < qp_implieslen; i++)
800eeca4 9837 {
197865e8 9838 if (qp_implies[i].p1 == p1
542d6675
KH		 9839 && qp_implies[i].p2 == p2
9840 && qp_implies[i].path == md.path
9841 && !qp_implies[i].p2_branched)
9842 return;
800eeca4
JW		 9843 }
9844
9845 if (qp_implieslen == qp_impliestotlen)
9846 {
9847 qp_impliestotlen += 20;
9848 qp_implies = (struct qp_imply *)
542d6675
KH		 9849 xrealloc ((void *) qp_implies,
9850 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9851 }
9852 if (md.debug_dv)
9853 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9854 qp_implies[qp_implieslen].p1 = p1;
9855 qp_implies[qp_implieslen].p2 = p2;
9856 qp_implies[qp_implieslen].path = md.path;
9857 qp_implies[qp_implieslen++].p2_branched = 0;
9858
9859 /* Add in the implied transitive relations; for everything that p2 implies,
9860 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9861 as well. */
542d6675 9862 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9863 {
9864 if (qp_implies[i].p1 == p2)
542d6675 9865 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9866 if (qp_implies[i].p2 == p1)
542d6675 9867 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9868 }
9869 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9870 relation containing p2, duplicate it and replace p2 with p1. */
9871 bit = (valueT) 1 << p1;
9872 mask = (valueT) 1 << p2;
542d6675 9873 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9874 {
9875 if (qp_mutexes[i].prmask & mask)
542d6675 9876 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9877 }
9878}
9879
800eeca4
JW		 9880/* Add the PRs specified in the mask to the mutex list; this means that only
9881 one of the PRs can be true at any time. PR0 should never be included in
9882 the mask. */
542d6675 9883
800eeca4
JW		 9884static void
9885add_qp_mutex (mask)
542d6675 9886 valueT mask;
800eeca4
JW		 9887{
9888 if (mask & 0x1)
9889 abort ();
9890
9891 if (qp_mutexeslen == qp_mutexestotlen)
9892 {
9893 qp_mutexestotlen += 20;
9894 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9895 xrealloc ((void *) qp_mutexes,
9896 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9897 }
9898 if (md.debug_dv)
9899 {
9900 fprintf (stderr, " Registering mutex on");
9901 print_prmask (mask);
9902 fprintf (stderr, "\n");
9903 }
9904 qp_mutexes[qp_mutexeslen].path = md.path;
9905 qp_mutexes[qp_mutexeslen++].prmask = mask;
9906}
9907
cb5301b6
RH		 9908static int
9909has_suffix_p (name, suffix)
40449e9f
KH		 9910 const char *name;
9911 const char *suffix;
cb5301b6
RH		 9912{
9913 size_t namelen = strlen (name);
9914 size_t sufflen = strlen (suffix);
9915
9916 if (namelen <= sufflen)
9917 return 0;
9918 return strcmp (name + namelen - sufflen, suffix) == 0;
9919}
9920
800eeca4
JW		 9921static void
9922clear_register_values ()
9923{
9924 int i;
9925 if (md.debug_dv)
9926 fprintf (stderr, " Clearing register values\n");
542d6675 9927 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9928 gr_values[i].known = 0;
9929}
9930
9931/* Keep track of register values/changes which affect DV tracking.
9932
9933 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9934 have to examine a group of strings to identify them. */
800eeca4 9935
800eeca4
JW		 9936static void
9937note_register_values (idesc)
542d6675 9938 struct ia64_opcode *idesc;
800eeca4
JW		 9939{
9940 valueT qp_changemask = 0;
9941 int i;
9942
542d6675
KH		 9943 /* Invalidate values for registers being written to. */
9944 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9945 {
197865e8 9946 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9947 || idesc->operands[i] == IA64_OPND_R2
9948 || idesc->operands[i] == IA64_OPND_R3)
9949 {
9950 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9951 if (regno > 0 && regno < NELEMS (gr_values))
9952 gr_values[regno].known = 0;
9953 }
50b81f19
JW		 9954 else if (idesc->operands[i] == IA64_OPND_R3_2)
9955 {
9956 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9957 if (regno > 0 && regno < 4)
9958 gr_values[regno].known = 0;
9959 }
197865e8 9960 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9961 || idesc->operands[i] == IA64_OPND_P2)
9962 {
9963 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9964 qp_changemask |= (valueT) 1 << regno;
9965 }
800eeca4 9966 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9967 {
9968 if (idesc->operands[2] & (valueT) 0x10000)
9969 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9970 else
9971 qp_changemask = idesc->operands[2];
9972 break;
9973 }
800eeca4 9974 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9975 {
9976 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9977 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9978 else
9979 qp_changemask = idesc->operands[1];
9980 qp_changemask &= ~(valueT) 0xFFFF;
9981 break;
9982 }
9983 }
9984
9985 /* Always clear qp branch flags on any PR change. */
9986 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9987 clear_qp_branch_flag (qp_changemask);
9988
542d6675 9989 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9990 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9991 {
197865e8 9992 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9993 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9994 {
9995 for (i = 32; i < 32 + md.rot.num_regs; i++)
9996 gr_values[i].known = 0;
9997 }
800eeca4
JW		 9998 clear_qp_mutex (qp_changemask);
9999 clear_qp_implies (qp_changemask, qp_changemask);
10000 }
542d6675
KH		 10001 /* After a call, all register values are undefined, except those marked
10002 as "safe". */
800eeca4 10003 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 10004 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 10005 {
56d27c17 10006 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 10007 clear_register_values ();
10008 clear_qp_mutex (~qp_safe_across_calls);
10009 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
10010 clear_qp_branch_flag (~qp_safe_across_calls);
10011 }
e9718fe1 10012 else if (is_interruption_or_rfi (idesc)
542d6675 10013 || is_taken_branch (idesc))
e9718fe1
TW		 10014 {
10015 clear_register_values ();
197865e8
KH		 10016 clear_qp_mutex (~(valueT) 0);
10017 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 10018 }
542d6675 10019 /* Look for mutex and implies relations. */
197865e8 10020 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 10021 || idesc->operands[0] == IA64_OPND_P2)
10022 && (idesc->operands[1] == IA64_OPND_P1
10023 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 10024 {
10025 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 10026 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 10027 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
10028 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 10029
5e2f6673
L		 10030 /* If both PRs are PR0, we can't really do anything. */
10031 if (p1 == 0 && p2 == 0)
542d6675
KH		 10032 {
10033 if (md.debug_dv)
10034 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
10035 }
800eeca4 10036 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 10037 with the following exceptions. */
cb5301b6
RH		 10038 else if (has_suffix_p (idesc->name, ".or.andcm")
10039 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 10040 {
542d6675
KH		 10041 clear_qp_implies (p2mask, p1mask);
10042 }
cb5301b6
RH		 10043 else if (has_suffix_p (idesc->name, ".andcm")
10044 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 10045 {
10046 clear_qp_implies (0, p1mask | p2mask);
10047 }
cb5301b6
RH		 10048 else if (has_suffix_p (idesc->name, ".orcm")
10049 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 10050 {
10051 clear_qp_mutex (p1mask | p2mask);
10052 clear_qp_implies (p1mask | p2mask, 0);
10053 }
800eeca4 10054 else
542d6675 10055 {
5e2f6673
L		 10056 int added = 0;
10057
542d6675 10058 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 10059
10060 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10061 if (p1 == 0 || p2 == 0)
10062 clear_qp_mutex (p1mask | p2mask);
10063 else
10064 added = update_qp_mutex (p1mask | p2mask);
10065
10066 if (CURR_SLOT.qp_regno == 0
10067 || has_suffix_p (idesc->name, ".unc"))
542d6675 10068 {
5e2f6673
L		 10069 if (added == 0 && p1 && p2)
10070 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 10071 if (CURR_SLOT.qp_regno != 0)
10072 {
5e2f6673
L		 10073 if (p1)
10074 add_qp_imply (p1, CURR_SLOT.qp_regno);
10075 if (p2)
10076 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 10077 }
10078 }
542d6675
KH		 10079 }
10080 }
10081 /* Look for mov imm insns into GRs. */
800eeca4 10082 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 10083 && (idesc->operands[1] == IA64_OPND_IMM22
10084 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 10085 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 10086 && (strcmp (idesc->name, "mov") == 0
10087 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 10088 {
10089 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 10090 if (regno > 0 && regno < NELEMS (gr_values))
10091 {
10092 gr_values[regno].known = 1;
10093 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
10094 gr_values[regno].path = md.path;
10095 if (md.debug_dv)
2434f565
JW		 10096 {
10097 fprintf (stderr, " Know gr%d = ", regno);
10098 fprintf_vma (stderr, gr_values[regno].value);
10099 fputs ("\n", stderr);
10100 }
542d6675 10101 }
800eeca4 10102 }
a66d2bb7
JB		 10103 /* Look for dep.z imm insns. */
10104 else if (idesc->operands[0] == IA64_OPND_R1
10105 && idesc->operands[1] == IA64_OPND_IMM8
10106 && strcmp (idesc->name, "dep.z") == 0)
10107 {
10108 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
10109 if (regno > 0 && regno < NELEMS (gr_values))
10110 {
10111 valueT value = CURR_SLOT.opnd[1].X_add_number;
10112
10113 if (CURR_SLOT.opnd[3].X_add_number < 64)
10114 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
10115 value <<= CURR_SLOT.opnd[2].X_add_number;
10116 gr_values[regno].known = 1;
10117 gr_values[regno].value = value;
10118 gr_values[regno].path = md.path;
10119 if (md.debug_dv)
10120 {
10121 fprintf (stderr, " Know gr%d = ", regno);
10122 fprintf_vma (stderr, gr_values[regno].value);
10123 fputs ("\n", stderr);
10124 }
10125 }
10126 }
197865e8 10127 else
800eeca4
JW		 10128 {
10129 clear_qp_mutex (qp_changemask);
10130 clear_qp_implies (qp_changemask, qp_changemask);
10131 }
10132}
10133
542d6675
KH		 10134/* Return whether the given predicate registers are currently mutex. */
10135
800eeca4
JW		 10136static int
10137qp_mutex (p1, p2, path)
542d6675
KH		 10138 int p1;
10139 int p2;
10140 int path;
800eeca4
JW		 10141{
10142 int i;
10143 valueT mask;
10144
10145 if (p1 != p2)
10146 {
542d6675
KH		 10147 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
10148 for (i = 0; i < qp_mutexeslen; i++)
10149 {
10150 if (qp_mutexes[i].path >= path
10151 && (qp_mutexes[i].prmask & mask) == mask)
10152 return 1;
10153 }
800eeca4
JW		 10154 }
10155 return 0;
10156}
10157
10158/* Return whether the given resource is in the given insn's list of chks
10159 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 10160 conflict. */
10161
800eeca4
JW		 10162static int
10163resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 10164 struct rsrc *rs;
10165 struct ia64_opcode *idesc;
10166 int note;
10167 int qp_regno;
10168 int path;
800eeca4
JW		 10169{
10170 struct rsrc specs[MAX_SPECS];
10171 int count;
10172
10173 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10174 we don't need to check. One exception is note 11, which indicates that
10175 target predicates are written regardless of PR[qp]. */
197865e8 10176 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 10177 && note != 11)
10178 return 0;
10179
10180 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
10181 while (count-- > 0)
10182 {
10183 /* UNAT checking is a bit more specific than other resources */
10184 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 10185 && specs[count].mem_offset.hint
10186 && rs->mem_offset.hint)
10187 {
10188 if (rs->mem_offset.base == specs[count].mem_offset.base)
10189 {
10190 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
10191 ((specs[count].mem_offset.offset >> 3) & 0x3F))
10192 return 1;
10193 else
10194 continue;
10195 }
10196 }
800eeca4 10197
7484b8e6 10198 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 10199 writes are an OR. */
7484b8e6 10200 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 10201 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 10202 || rs->dependency->specifier == IA64_RS_PR63)
10203 {
10204 if (specs[count].cmp_type != CMP_NONE
10205 && specs[count].cmp_type == rs->cmp_type)
10206 {
10207 if (md.debug_dv)
10208 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10209 dv_mode[rs->dependency->mode],
afa680f8 10210 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 10211 specs[count].index : 63);
10212 continue;
10213 }
10214 if (md.debug_dv)
4a4f25cf 10215 fprintf (stderr,
7484b8e6
TW		 10216 " %s on parallel compare conflict %s vs %s on PR%d\n",
10217 dv_mode[rs->dependency->mode],
4a4f25cf 10218 dv_cmp_type[rs->cmp_type],
7484b8e6 10219 dv_cmp_type[specs[count].cmp_type],
afa680f8 10220 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 10221 specs[count].index : 63);
4a4f25cf 10222
7484b8e6
TW		 10223 }
10224
800eeca4 10225 /* If either resource is not specific, conservatively assume a conflict
197865e8 10226 */
800eeca4 10227 if (!specs[count].specific || !rs->specific)
542d6675 10228 return 2;
800eeca4 10229 else if (specs[count].index == rs->index)
542d6675 10230 return 1;
800eeca4 10231 }
800eeca4
JW		 10232
10233 return 0;
10234}
10235
10236/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10237 insert a stop to create the break. Update all resource dependencies
10238 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10239 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10240 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 10241 instruction. */
800eeca4
JW		 10242
10243static void
10244insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 10245 int insert_stop;
10246 int qp_regno;
10247 int save_current;
800eeca4
JW		 10248{
10249 int i;
10250
10251 if (insert_stop && md.num_slots_in_use > 0)
10252 PREV_SLOT.end_of_insn_group = 1;
10253
10254 if (md.debug_dv)
10255 {
197865e8 10256 fprintf (stderr, " Insn group break%s",
542d6675 10257 (insert_stop ? " (w/stop)" : ""));
800eeca4 10258 if (qp_regno != 0)
542d6675 10259 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 10260 fprintf (stderr, "\n");
10261 }
10262
10263 i = 0;
10264 while (i < regdepslen)
10265 {
10266 const struct ia64_dependency *dep = regdeps[i].dependency;
10267
10268 if (qp_regno != 0
542d6675
KH		 10269 && regdeps[i].qp_regno != qp_regno)
10270 {
10271 ++i;
10272 continue;
10273 }
800eeca4
JW		 10274
10275 if (save_current
542d6675
KH		 10276 && CURR_SLOT.src_file == regdeps[i].file
10277 && CURR_SLOT.src_line == regdeps[i].line)
10278 {
10279 ++i;
10280 continue;
10281 }
800eeca4
JW		 10282
10283 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10284 those that have reached the appropriate state of insn serialization */
800eeca4 10285 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10286 || dep->semantics == IA64_DVS_IMPLIEDF
10287 || regdeps[i].insn_srlz == STATE_SRLZ)
10288 {
10289 print_dependency ("Removing", i);
10290 regdeps[i] = regdeps[--regdepslen];
10291 }
800eeca4 10292 else
542d6675
KH		 10293 {
10294 if (dep->semantics == IA64_DVS_DATA
10295 || dep->semantics == IA64_DVS_INSTR
800eeca4 10296 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10297 {
10298 if (regdeps[i].insn_srlz == STATE_NONE)
10299 regdeps[i].insn_srlz = STATE_STOP;
10300 if (regdeps[i].data_srlz == STATE_NONE)
10301 regdeps[i].data_srlz = STATE_STOP;
10302 }
10303 ++i;
10304 }
800eeca4
JW		 10305 }
10306}
10307
542d6675
KH		 10308/* Add the given resource usage spec to the list of active dependencies. */
10309
197865e8 10310static void
800eeca4 10311mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10312 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10313 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10314 struct rsrc *spec;
10315 int depind;
10316 int path;
800eeca4
JW		 10317{
10318 if (regdepslen == regdepstotlen)
10319 {
10320 regdepstotlen += 20;
10321 regdeps = (struct rsrc *)
542d6675 10322 xrealloc ((void *) regdeps,
bc805888 10323 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10324 }
10325
10326 regdeps[regdepslen] = *spec;
10327 regdeps[regdepslen].depind = depind;
10328 regdeps[regdepslen].path = path;
10329 regdeps[regdepslen].file = CURR_SLOT.src_file;
10330 regdeps[regdepslen].line = CURR_SLOT.src_line;
10331
10332 print_dependency ("Adding", regdepslen);
10333
10334 ++regdepslen;
10335}
10336
10337static void
10338print_dependency (action, depind)
542d6675
KH		 10339 const char *action;
10340 int depind;
800eeca4
JW		 10341{
10342 if (md.debug_dv)
10343 {
197865e8 10344 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10345 action, dv_mode[(regdeps[depind].dependency)->mode],
10346 (regdeps[depind].dependency)->name);
a66d2bb7 10347 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10348 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10349 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10350 {
10351 fputs (" ", stderr);
10352 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10353 fputs ("+", stderr);
10354 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10355 }
800eeca4
JW		 10356 fprintf (stderr, "\n");
10357 }
10358}
10359
10360static void
10361instruction_serialization ()
10362{
10363 int i;
10364 if (md.debug_dv)
10365 fprintf (stderr, " Instruction serialization\n");
542d6675 10366 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10367 if (regdeps[i].insn_srlz == STATE_STOP)
10368 regdeps[i].insn_srlz = STATE_SRLZ;
10369}
10370
10371static void
10372data_serialization ()
10373{
10374 int i = 0;
10375 if (md.debug_dv)
10376 fprintf (stderr, " Data serialization\n");
10377 while (i < regdepslen)
10378 {
10379 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10380 /* Note: as of 991210, all "other" dependencies are cleared by a
10381 data serialization. This might change with new tables */
10382 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10383 {
10384 print_dependency ("Removing", i);
10385 regdeps[i] = regdeps[--regdepslen];
10386 }
800eeca4 10387 else
542d6675 10388 ++i;
800eeca4
JW		 10389 }
10390}
10391
542d6675
KH		 10392/* Insert stops and serializations as needed to avoid DVs. */
10393
800eeca4
JW		 10394static void
10395remove_marked_resource (rs)
542d6675 10396 struct rsrc *rs;
800eeca4
JW		 10397{
10398 switch (rs->dependency->semantics)
10399 {
10400 case IA64_DVS_SPECIFIC:
10401 if (md.debug_dv)
10402 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10403 /* ...fall through... */
800eeca4
JW		 10404 case IA64_DVS_INSTR:
10405 if (md.debug_dv)
542d6675 10406 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10407 if (rs->insn_srlz < STATE_STOP)
542d6675 10408 insn_group_break (1, 0, 0);
800eeca4 10409 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10410 {
888a75be 10411 struct slot oldslot = CURR_SLOT;
542d6675 10412 /* Manually jam a srlz.i insn into the stream */
888a75be 10413 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10414 CURR_SLOT.user_template = -1;
542d6675
KH		 10415 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10416 instruction_serialization ();
10417 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10418 if (++md.num_slots_in_use >= NUM_SLOTS)
10419 emit_one_bundle ();
888a75be 10420 CURR_SLOT = oldslot;
542d6675 10421 }
800eeca4
JW		 10422 insn_group_break (1, 0, 0);
10423 break;
10424 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10425 "other" types of DV are eliminated
10426 by a data serialization */
800eeca4
JW		 10427 case IA64_DVS_DATA:
10428 if (md.debug_dv)
542d6675 10429 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10430 if (rs->data_srlz < STATE_STOP)
542d6675 10431 insn_group_break (1, 0, 0);
800eeca4 10432 {
888a75be 10433 struct slot oldslot = CURR_SLOT;
542d6675 10434 /* Manually jam a srlz.d insn into the stream */
888a75be 10435 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10436 CURR_SLOT.user_template = -1;
542d6675
KH		 10437 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10438 data_serialization ();
10439 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10440 if (++md.num_slots_in_use >= NUM_SLOTS)
10441 emit_one_bundle ();
888a75be 10442 CURR_SLOT = oldslot;
800eeca4
JW		 10443 }
10444 break;
10445 case IA64_DVS_IMPLIED:
10446 case IA64_DVS_IMPLIEDF:
10447 if (md.debug_dv)
542d6675 10448 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10449 insn_group_break (1, 0, 0);
10450 break;
10451 default:
10452 break;
10453 }
10454}
10455
10456/* Check the resources used by the given opcode against the current dependency
197865e8 10457 list.
800eeca4
JW		 10458
10459 The check is run once for each execution path encountered. In this case,
10460 a unique execution path is the sequence of instructions following a code
10461 entry point, e.g. the following has three execution paths, one starting
10462 at L0, one at L1, and one at L2.
197865e8 10463
800eeca4
JW		 10464 L0: nop
10465 L1: add
10466 L2: add
197865e8 10467 br.ret
800eeca4 10468*/
542d6675 10469
800eeca4
JW		 10470static void
10471check_dependencies (idesc)
542d6675 10472 struct ia64_opcode *idesc;
800eeca4
JW		 10473{
10474 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10475 int path;
10476 int i;
10477
10478 /* Note that the number of marked resources may change within the
197865e8 10479 loop if in auto mode. */
800eeca4
JW		 10480 i = 0;
10481 while (i < regdepslen)
10482 {
10483 struct rsrc *rs = &regdeps[i];
10484 const struct ia64_dependency *dep = rs->dependency;
10485 int chkind;
10486 int note;
10487 int start_over = 0;
10488
10489 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10490 || (chkind = depends_on (rs->depind, idesc)) == -1)
10491 {
10492 ++i;
10493 continue;
10494 }
10495
10496 note = NOTE (opdeps->chks[chkind]);
10497
10498 /* Check this resource against each execution path seen thus far. */
10499 for (path = 0; path <= md.path; path++)
10500 {
10501 int matchtype;
10502
10503 /* If the dependency wasn't on the path being checked, ignore it. */
10504 if (rs->path < path)
10505 continue;
10506
10507 /* If the QP for this insn implies a QP which has branched, don't
10508 bother checking. Ed. NOTE: I don't think this check is terribly
10509 useful; what's the point of generating code which will only be
10510 reached if its QP is zero?
10511 This code was specifically inserted to handle the following code,
10512 based on notes from Intel's DV checking code, where p1 implies p2.
10513
10514 mov r4 = 2
10515 (p2) br.cond L
10516 (p1) mov r4 = 7
10517 */
10518 if (CURR_SLOT.qp_regno != 0)
10519 {
10520 int skip = 0;
10521 int implies;
10522 for (implies = 0; implies < qp_implieslen; implies++)
10523 {
10524 if (qp_implies[implies].path >= path
10525 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10526 && qp_implies[implies].p2_branched)
10527 {
10528 skip = 1;
10529 break;
10530 }
10531 }
10532 if (skip)
10533 continue;
10534 }
10535
10536 if ((matchtype = resources_match (rs, idesc, note,
10537 CURR_SLOT.qp_regno, path)) != 0)
10538 {
10539 char msg[1024];
10540 char pathmsg[256] = "";
10541 char indexmsg[256] = "";
10542 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10543
10544 if (path != 0)
f9f21a03
L		 10545 snprintf (pathmsg, sizeof (pathmsg),
10546 " when entry is at label '%s'",
542d6675 10547 md.entry_labels[path - 1]);
a66d2bb7 10548 if (matchtype == 1 && rs->index >= 0)
f9f21a03
L		 10549 snprintf (indexmsg, sizeof (indexmsg),
10550 ", specific resource number is %d",
542d6675 10551 rs->index);
f9f21a03
L		 10552 snprintf (msg, sizeof (msg),
10553 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
542d6675
KH		 10554 idesc->name,
10555 (certain ? "violates" : "may violate"),
10556 dv_mode[dep->mode], dep->name,
10557 dv_sem[dep->semantics],
10558 pathmsg, indexmsg);
10559
10560 if (md.explicit_mode)
10561 {
10562 as_warn ("%s", msg);
10563 if (path < md.path)
ad4b42b4 10564 as_warn (_("Only the first path encountering the conflict is reported"));
542d6675 10565 as_warn_where (rs->file, rs->line,
ad4b42b4 10566 _("This is the location of the conflicting usage"));
542d6675
KH		 10567 /* Don't bother checking other paths, to avoid duplicating
10568 the same warning */
10569 break;
10570 }
10571 else
10572 {
10573 if (md.debug_dv)
10574 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10575
10576 remove_marked_resource (rs);
10577
10578 /* since the set of dependencies has changed, start over */
10579 /* FIXME -- since we're removing dvs as we go, we
10580 probably don't really need to start over... */
10581 start_over = 1;
10582 break;
10583 }
10584 }
10585 }
800eeca4 10586 if (start_over)
542d6675 10587 i = 0;
800eeca4 10588 else
542d6675 10589 ++i;
800eeca4
JW		 10590 }
10591}
10592
542d6675
KH		 10593/* Register new dependencies based on the given opcode. */
10594
800eeca4
JW		 10595static void
10596mark_resources (idesc)
542d6675 10597 struct ia64_opcode *idesc;
800eeca4
JW		 10598{
10599 int i;
10600 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10601 int add_only_qp_reads = 0;
10602
10603 /* A conditional branch only uses its resources if it is taken; if it is
10604 taken, we stop following that path. The other branch types effectively
10605 *always* write their resources. If it's not taken, register only QP
197865e8 10606 reads. */
800eeca4
JW		 10607 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10608 {
10609 add_only_qp_reads = 1;
10610 }
10611
10612 if (md.debug_dv)
10613 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10614
542d6675 10615 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10616 {
10617 const struct ia64_dependency *dep;
10618 struct rsrc specs[MAX_SPECS];
10619 int note;
10620 int path;
10621 int count;
197865e8 10622
800eeca4 10623 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10624 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10625
10626 if (add_only_qp_reads
542d6675
KH		 10627 && !(dep->mode == IA64_DV_WAR
10628 && (dep->specifier == IA64_RS_PR
139368c9 10629 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10630 || dep->specifier == IA64_RS_PR63)))
10631 continue;
800eeca4
JW		 10632
10633 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10634
800eeca4 10635 while (count-- > 0)
542d6675
KH		 10636 {
10637 mark_resource (idesc, dep, &specs[count],
10638 DEP (opdeps->regs[i]), md.path);
10639 }
800eeca4
JW		 10640
10641 /* The execution path may affect register values, which may in turn
542d6675 10642 affect which indirect-access resources are accessed. */
800eeca4 10643 switch (dep->specifier)
542d6675
KH		 10644 {
10645 default:
10646 break;
10647 case IA64_RS_CPUID:
10648 case IA64_RS_DBR:
10649 case IA64_RS_IBR:
800eeca4 10650 case IA64_RS_MSR:
542d6675
KH		 10651 case IA64_RS_PKR:
10652 case IA64_RS_PMC:
10653 case IA64_RS_PMD:
10654 case IA64_RS_RR:
10655 for (path = 0; path < md.path; path++)
10656 {
10657 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10658 while (count-- > 0)
10659 mark_resource (idesc, dep, &specs[count],
10660 DEP (opdeps->regs[i]), path);
10661 }
10662 break;
10663 }
10664 }
10665}
10666
10667/* Remove dependencies when they no longer apply. */
10668
800eeca4
JW		 10669static void
10670update_dependencies (idesc)
542d6675 10671 struct ia64_opcode *idesc;
800eeca4
JW		 10672{
10673 int i;
10674
10675 if (strcmp (idesc->name, "srlz.i") == 0)
10676 {
10677 instruction_serialization ();
10678 }
10679 else if (strcmp (idesc->name, "srlz.d") == 0)
10680 {
10681 data_serialization ();
10682 }
10683 else if (is_interruption_or_rfi (idesc)
542d6675 10684 || is_taken_branch (idesc))
800eeca4 10685 {
542d6675
KH		 10686 /* Although technically the taken branch doesn't clear dependencies
10687 which require a srlz.[id], we don't follow the branch; the next
10688 instruction is assumed to start with a clean slate. */
800eeca4 10689 regdepslen = 0;
800eeca4
JW		 10690 md.path = 0;
10691 }
10692 else if (is_conditional_branch (idesc)
542d6675 10693 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10694 {
10695 int is_call = strstr (idesc->name, ".call") != NULL;
10696
542d6675
KH		 10697 for (i = 0; i < qp_implieslen; i++)
10698 {
10699 /* If the conditional branch's predicate is implied by the predicate
10700 in an existing dependency, remove that dependency. */
10701 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10702 {
10703 int depind = 0;
10704 /* Note that this implied predicate takes a branch so that if
10705 a later insn generates a DV but its predicate implies this
10706 one, we can avoid the false DV warning. */
10707 qp_implies[i].p2_branched = 1;
10708 while (depind < regdepslen)
10709 {
10710 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10711 {
10712 print_dependency ("Removing", depind);
10713 regdeps[depind] = regdeps[--regdepslen];
10714 }
10715 else
10716 ++depind;
10717 }
10718 }
10719 }
800eeca4 10720 /* Any marked resources which have this same predicate should be
542d6675
KH		 10721 cleared, provided that the QP hasn't been modified between the
10722 marking instruction and the branch. */
800eeca4 10723 if (is_call)
542d6675
KH		 10724 {
10725 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10726 }
800eeca4 10727 else
542d6675
KH		 10728 {
10729 i = 0;
10730 while (i < regdepslen)
10731 {
10732 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10733 && regdeps[i].link_to_qp_branch
10734 && (regdeps[i].file != CURR_SLOT.src_file
10735 || regdeps[i].line != CURR_SLOT.src_line))
10736 {
10737 /* Treat like a taken branch */
10738 print_dependency ("Removing", i);
10739 regdeps[i] = regdeps[--regdepslen];
10740 }
10741 else
10742 ++i;
10743 }
10744 }
800eeca4
JW		 10745 }
10746}
10747
10748/* Examine the current instruction for dependency violations. */
542d6675 10749
800eeca4
JW		 10750static int
10751check_dv (idesc)
542d6675 10752 struct ia64_opcode *idesc;
800eeca4
JW		 10753{
10754 if (md.debug_dv)
10755 {
197865e8 10756 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10757 idesc->name, CURR_SLOT.src_line,
10758 idesc->dependencies->nchks,
10759 idesc->dependencies->nregs);
800eeca4
JW		 10760 }
10761
197865e8 10762 /* Look through the list of currently marked resources; if the current
800eeca4 10763 instruction has the dependency in its chks list which uses that resource,
542d6675 10764 check against the specific resources used. */
800eeca4
JW		 10765 check_dependencies (idesc);
10766
542d6675
KH		 10767 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10768 then add them to the list of marked resources. */
800eeca4
JW		 10769 mark_resources (idesc);
10770
10771 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10772 requirements for being cleared
10773
800eeca4
JW		 10774 Instruction serialization (insns separated by interruption, rfi, or
10775 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10776
10777 Data serialization (instruction serialization, or writer + srlz.d +
10778 reader, where writer and srlz.d are in separate groups) clears
10779 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10780 always be the case).
10781
10782 Instruction group break (groups separated by stop, taken branch,
10783 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10784 */
10785 update_dependencies (idesc);
10786
10787 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10788 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10789 note_register_values (idesc);
10790
197865e8 10791 /* We don't need or want this anymore. */
800eeca4
JW		 10792 md.mem_offset.hint = 0;
10793
10794 return 0;
10795}
10796
10797/* Translate one line of assembly. Pseudo ops and labels do not show
10798 here. */
10799void
10800md_assemble (str)
10801 char *str;
10802{
10803 char *saved_input_line_pointer, *mnemonic;
10804 const struct pseudo_opcode *pdesc;
10805 struct ia64_opcode *idesc;
10806 unsigned char qp_regno;
10807 unsigned int flags;
10808 int ch;
10809
10810 saved_input_line_pointer = input_line_pointer;
10811 input_line_pointer = str;
10812
542d6675 10813 /* extract the opcode (mnemonic): */
800eeca4
JW		 10814
10815 mnemonic = input_line_pointer;
10816 ch = get_symbol_end ();
10817 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10818 if (pdesc)
10819 {
10820 *input_line_pointer = ch;
10821 (*pdesc->handler) (pdesc->arg);
10822 goto done;
10823 }
10824
542d6675 10825 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10826
10827 idesc = ia64_find_opcode (mnemonic);
10828 *input_line_pointer = ch;
10829 if (!idesc)
10830 {
ad4b42b4 10831 as_bad (_("Unknown opcode `%s'"), mnemonic);
800eeca4
JW		 10832 goto done;
10833 }
10834
10835 idesc = parse_operands (idesc);
10836 if (!idesc)
10837 goto done;
10838
542d6675 10839 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10840 if (idesc->type == IA64_TYPE_DYN)
10841 {
10842 if (strcmp (idesc->name, "add") == 0)
10843 {
10844 if (CURR_SLOT.opnd[2].X_op == O_register
10845 && CURR_SLOT.opnd[2].X_add_number < 4)
10846 mnemonic = "addl";
10847 else
10848 mnemonic = "adds";
3d56ab85 10849 ia64_free_opcode (idesc);
800eeca4 10850 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10851 }
10852 else if (strcmp (idesc->name, "mov") == 0)
10853 {
10854 enum ia64_opnd opnd1, opnd2;
10855 int rop;
10856
10857 opnd1 = idesc->operands[0];
10858 opnd2 = idesc->operands[1];
10859 if (opnd1 == IA64_OPND_AR3)
10860 rop = 0;
10861 else if (opnd2 == IA64_OPND_AR3)
10862 rop = 1;
10863 else
10864 abort ();
652ca075
L		 10865 if (CURR_SLOT.opnd[rop].X_op == O_register)
10866 {
10867 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10868 mnemonic = "mov.i";
97762d08 10869 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10870 mnemonic = "mov.m";
97762d08
JB		 10871 else
10872 rop = -1;
652ca075 10873 }
800eeca4 10874 else
652ca075 10875 abort ();
97762d08
JB		 10876 if (rop >= 0)
10877 {
10878 ia64_free_opcode (idesc);
10879 idesc = ia64_find_opcode (mnemonic);
10880 while (idesc != NULL
10881 && (idesc->operands[0] != opnd1
10882 || idesc->operands[1] != opnd2))
10883 idesc = get_next_opcode (idesc);
10884 }
800eeca4
JW		 10885 }
10886 }
652ca075
L		 10887 else if (strcmp (idesc->name, "mov.i") == 0
10888 || strcmp (idesc->name, "mov.m") == 0)
10889 {
10890 enum ia64_opnd opnd1, opnd2;
10891 int rop;
10892
10893 opnd1 = idesc->operands[0];
10894 opnd2 = idesc->operands[1];
10895 if (opnd1 == IA64_OPND_AR3)
10896 rop = 0;
10897 else if (opnd2 == IA64_OPND_AR3)
10898 rop = 1;
10899 else
10900 abort ();
10901 if (CURR_SLOT.opnd[rop].X_op == O_register)
10902 {
10903 char unit = 'a';
10904 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10905 unit = 'i';
10906 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10907 unit = 'm';
10908 if (unit != 'a' && unit != idesc->name [4])
ad4b42b4 10909 as_bad (_("AR %d can only be accessed by %c-unit"),
652ca075
L		 10910 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10911 TOUPPER (unit));
10912 }
10913 }
91d777ee
L		 10914 else if (strcmp (idesc->name, "hint.b") == 0)
10915 {
10916 switch (md.hint_b)
10917 {
10918 case hint_b_ok:
10919 break;
10920 case hint_b_warning:
ad4b42b4 10921 as_warn (_("hint.b may be treated as nop"));
91d777ee
L		 10922 break;
10923 case hint_b_error:
ad4b42b4 10924 as_bad (_("hint.b shouldn't be used"));
91d777ee
L		 10925 break;
10926 }
10927 }
800eeca4
JW		 10928
10929 qp_regno = 0;
10930 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10931 {
10932 qp_regno = md.qp.X_add_number - REG_P;
10933 md.qp.X_op = O_absent;
10934 }
800eeca4
JW		 10935
10936 flags = idesc->flags;
10937
10938 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10939 {
10940 /* The alignment frag has to end with a stop bit only if the
10941 next instruction after the alignment directive has to be
10942 the first instruction in an instruction group. */
10943 if (align_frag)
10944 {
10945 while (align_frag->fr_type != rs_align_code)
10946 {
10947 align_frag = align_frag->fr_next;
bae25f19
L		 10948 if (!align_frag)
10949 break;
9545c4ce 10950 }
bae25f19
L		 10951 /* align_frag can be NULL if there are directives in
10952 between. */
10953 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10954 align_frag->tc_frag_data = 1;
10955 }
10956
10957 insn_group_break (1, 0, 0);
10958 }
10959 align_frag = NULL;
800eeca4
JW		 10960
10961 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10962 {
ad4b42b4 10963 as_bad (_("`%s' cannot be predicated"), idesc->name);
800eeca4
JW		 10964 goto done;
10965 }
10966
542d6675 10967 /* Build the instruction. */
800eeca4
JW		 10968 CURR_SLOT.qp_regno = qp_regno;
10969 CURR_SLOT.idesc = idesc;
10970 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10971 dwarf2_where (&CURR_SLOT.debug_line);
661ba50f 10972 dwarf2_consume_line_info ();
800eeca4 10973
ba825241 10974 /* Add unwind entries, if there are any. */
e0c9811a 10975 if (unwind.current_entry)
800eeca4 10976 {
e0c9811a
JW		 10977 CURR_SLOT.unwind_record = unwind.current_entry;
10978 unwind.current_entry = NULL;
800eeca4 10979 }
ba825241
JB		 10980 if (unwind.pending_saves)
10981 {
10982 if (unwind.pending_saves->next)
10983 {
10984 /* Attach the next pending save to the next slot so that its
10985 slot number will get set correctly. */
10986 add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR);
10987 unwind.pending_saves = &unwind.pending_saves->next->r.record.p;
10988 }
10989 else
10990 unwind.pending_saves = NULL;
10991 }
5656b6b8 10992 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym))
75e09913 10993 unwind.insn = 1;
800eeca4 10994
542d6675 10995 /* Check for dependency violations. */
800eeca4 10996 if (md.detect_dv)
542d6675 10997 check_dv (idesc);
800eeca4
JW		 10998
10999 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
11000 if (++md.num_slots_in_use >= NUM_SLOTS)
11001 emit_one_bundle ();
11002
11003 if ((flags & IA64_OPCODE_LAST) != 0)
11004 insn_group_break (1, 0, 0);
11005
11006 md.last_text_seg = now_seg;
11007
11008 done:
11009 input_line_pointer = saved_input_line_pointer;
11010}
11011
11012/* Called when symbol NAME cannot be found in the symbol table.
11013 Should be used for dynamic valued symbols only. */
542d6675
KH		 11014
11015symbolS *
800eeca4 11016md_undefined_symbol (name)
2434f565 11017 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 11018{
11019 return 0;
11020}
11021
11022/* Called for any expression that can not be recognized. When the
11023 function is called, `input_line_pointer' will point to the start of
11024 the expression. */
542d6675 11025
800eeca4
JW		 11026void
11027md_operand (e)
11028 expressionS *e;
11029{
800eeca4
JW		 11030 switch (*input_line_pointer)
11031 {
800eeca4
JW		 11032 case '[':
11033 ++input_line_pointer;
60d11e55 11034 expression_and_evaluate (e);
800eeca4
JW		 11035 if (*input_line_pointer != ']')
11036 {
ad4b42b4 11037 as_bad (_("Closing bracket missing"));
800eeca4
JW		 11038 goto err;
11039 }
11040 else
11041 {
6a2375c6
JB		 11042 if (e->X_op != O_register
11043 || e->X_add_number < REG_GR
11044 || e->X_add_number > REG_GR + 127)
11045 {
ad4b42b4 11046 as_bad (_("Index must be a general register"));
6a2375c6
JB		 11047 e->X_add_number = REG_GR;
11048 }
800eeca4
JW		 11049
11050 ++input_line_pointer;
11051 e->X_op = O_index;
11052 }
11053 break;
11054
11055 default:
11056 break;
11057 }
11058 return;
11059
11060 err:
11061 ignore_rest_of_line ();
11062}
11063
11064/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11065 a section symbol plus some offset. For relocs involving @fptr(),
11066 directives we don't want such adjustments since we need to have the
11067 original symbol's name in the reloc. */
11068int
11069ia64_fix_adjustable (fix)
11070 fixS *fix;
11071{
11072 /* Prevent all adjustments to global symbols */
e97b3f28 11073 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
800eeca4
JW		 11074 return 0;
11075
11076 switch (fix->fx_r_type)
11077 {
11078 case BFD_RELOC_IA64_FPTR64I:
11079 case BFD_RELOC_IA64_FPTR32MSB:
11080 case BFD_RELOC_IA64_FPTR32LSB:
11081 case BFD_RELOC_IA64_FPTR64MSB:
11082 case BFD_RELOC_IA64_FPTR64LSB:
11083 case BFD_RELOC_IA64_LTOFF_FPTR22:
11084 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11085 return 0;
11086 default:
11087 break;
11088 }
11089
11090 return 1;
11091}
11092
11093int
11094ia64_force_relocation (fix)
11095 fixS *fix;
11096{
11097 switch (fix->fx_r_type)
11098 {
11099 case BFD_RELOC_IA64_FPTR64I:
11100 case BFD_RELOC_IA64_FPTR32MSB:
11101 case BFD_RELOC_IA64_FPTR32LSB:
11102 case BFD_RELOC_IA64_FPTR64MSB:
11103 case BFD_RELOC_IA64_FPTR64LSB:
11104
11105 case BFD_RELOC_IA64_LTOFF22:
11106 case BFD_RELOC_IA64_LTOFF64I:
11107 case BFD_RELOC_IA64_LTOFF_FPTR22:
11108 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11109 case BFD_RELOC_IA64_PLTOFF22:
11110 case BFD_RELOC_IA64_PLTOFF64I:
11111 case BFD_RELOC_IA64_PLTOFF64MSB:
11112 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 11113
11114 case BFD_RELOC_IA64_LTOFF22X:
11115 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 11116 return 1;
11117
11118 default:
a161fe53 11119 break;
800eeca4 11120 }
a161fe53 11121
ae6063d4 11122 return generic_force_reloc (fix);
800eeca4
JW		 11123}
11124
11125/* Decide from what point a pc-relative relocation is relative to,
11126 relative to the pc-relative fixup. Er, relatively speaking. */
11127long
11128ia64_pcrel_from_section (fix, sec)
11129 fixS *fix;
11130 segT sec;
11131{
11132 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 11133
800eeca4
JW		 11134 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
11135 off &= ~0xfUL;
11136
11137 return off;
11138}
11139
6174d9c8
RH		 11140
11141/* Used to emit section-relative relocs for the dwarf2 debug data. */
11142void
11143ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
11144{
11145 expressionS expr;
11146
11147 expr.X_op = O_pseudo_fixup;
11148 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
11149 expr.X_add_number = 0;
11150 expr.X_add_symbol = symbol;
11151 emit_expr (&expr, size);
11152}
11153
800eeca4
JW		 11154/* This is called whenever some data item (not an instruction) needs a
11155 fixup. We pick the right reloc code depending on the byteorder
11156 currently in effect. */
11157void
11158ia64_cons_fix_new (f, where, nbytes, exp)
11159 fragS *f;
11160 int where;
11161 int nbytes;
11162 expressionS *exp;
11163{
11164 bfd_reloc_code_real_type code;
11165 fixS *fix;
11166
11167 switch (nbytes)
11168 {
11169 /* There are no reloc for 8 and 16 bit quantities, but we allow
11170 them here since they will work fine as long as the expression
11171 is fully defined at the end of the pass over the source file. */
11172 case 1: code = BFD_RELOC_8; break;
11173 case 2: code = BFD_RELOC_16; break;
11174 case 4:
11175 if (target_big_endian)
11176 code = BFD_RELOC_IA64_DIR32MSB;
11177 else
11178 code = BFD_RELOC_IA64_DIR32LSB;
11179 break;
11180
11181 case 8:
40449e9f 11182 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 11183 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 11184 && exp->X_op_symbol
11185 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
11186 && !(md.flags & EF_IA_64_ABI64))
11187 {
11188 if (target_big_endian)
11189 code = BFD_RELOC_IA64_IPLTMSB;
11190 else
11191 code = BFD_RELOC_IA64_IPLTLSB;
11192 exp->X_op = O_symbol;
11193 break;
11194 }
11195 else
11196 {
11197 if (target_big_endian)
11198 code = BFD_RELOC_IA64_DIR64MSB;
11199 else
11200 code = BFD_RELOC_IA64_DIR64LSB;
11201 break;
11202 }
800eeca4 11203
3969b680
RH		 11204 case 16:
11205 if (exp->X_op == O_pseudo_fixup
11206 && exp->X_op_symbol
11207 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
11208 {
11209 if (target_big_endian)
11210 code = BFD_RELOC_IA64_IPLTMSB;
11211 else
11212 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 11213 exp->X_op = O_symbol;
11214 break;
11215 }
11216 /* FALLTHRU */
11217
800eeca4 11218 default:
ad4b42b4 11219 as_bad (_("Unsupported fixup size %d"), nbytes);
800eeca4
JW		 11220 ignore_rest_of_line ();
11221 return;
11222 }
6174d9c8 11223
800eeca4
JW		 11224 if (exp->X_op == O_pseudo_fixup)
11225 {
800eeca4
JW		 11226 exp->X_op = O_symbol;
11227 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 11228 /* ??? If code unchanged, unsupported. */
800eeca4 11229 }
3969b680 11230
800eeca4
JW		 11231 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11232 /* We need to store the byte order in effect in case we're going
11233 to fix an 8 or 16 bit relocation (for which there no real
55cf6793 11234 relocs available). See md_apply_fix(). */
800eeca4
JW		 11235 fix->tc_fix_data.bigendian = target_big_endian;
11236}
11237
11238/* Return the actual relocation we wish to associate with the pseudo
11239 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 11240 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 11241
11242static bfd_reloc_code_real_type
11243ia64_gen_real_reloc_type (sym, r_type)
11244 struct symbol *sym;
11245 bfd_reloc_code_real_type r_type;
11246{
11247 bfd_reloc_code_real_type new = 0;
0ca3e455 11248 const char *type = NULL, *suffix = "";
800eeca4
JW		 11249
11250 if (sym == NULL)
11251 {
11252 return r_type;
11253 }
11254
11255 switch (S_GET_VALUE (sym))
11256 {
11257 case FUNC_FPTR_RELATIVE:
11258 switch (r_type)
11259 {
11260 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11261 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11262 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11263 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11264 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 11265 default: type = "FPTR"; break;
800eeca4
JW		 11266 }
11267 break;
11268
11269 case FUNC_GP_RELATIVE:
11270 switch (r_type)
11271 {
11272 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11273 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11274 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11275 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11276 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11277 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 11278 default: type = "GPREL"; break;
800eeca4
JW		 11279 }
11280 break;
11281
11282 case FUNC_LT_RELATIVE:
11283 switch (r_type)
11284 {
11285 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11286 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11287 default: type = "LTOFF"; break;
800eeca4
JW		 11288 }
11289 break;
11290
fa2c7eff
RH		 11291 case FUNC_LT_RELATIVE_X:
11292 switch (r_type)
11293 {
11294 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11295 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11296 }
11297 break;
11298
c67e42c9
RH		 11299 case FUNC_PC_RELATIVE:
11300 switch (r_type)
11301 {
11302 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11303 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11304 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11305 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11306 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11307 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11308 default: type = "PCREL"; break;
c67e42c9
RH		 11309 }
11310 break;
11311
800eeca4
JW		 11312 case FUNC_PLT_RELATIVE:
11313 switch (r_type)
11314 {
11315 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11316 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11317 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11318 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11319 default: type = "PLTOFF"; break;
800eeca4
JW		 11320 }
11321 break;
11322
11323 case FUNC_SEC_RELATIVE:
11324 switch (r_type)
11325 {
11326 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11327 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11328 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11329 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11330 default: type = "SECREL"; break;
800eeca4
JW		 11331 }
11332 break;
11333
11334 case FUNC_SEG_RELATIVE:
11335 switch (r_type)
11336 {
11337 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11338 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11339 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11340 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11341 default: type = "SEGREL"; break;
800eeca4
JW		 11342 }
11343 break;
11344
11345 case FUNC_LTV_RELATIVE:
11346 switch (r_type)
11347 {
11348 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11349 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11350 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11351 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11352 default: type = "LTV"; break;
800eeca4
JW		 11353 }
11354 break;
11355
11356 case FUNC_LT_FPTR_RELATIVE:
11357 switch (r_type)
11358 {
11359 case BFD_RELOC_IA64_IMM22:
11360 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11361 case BFD_RELOC_IA64_IMM64:
11362 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11363 case BFD_RELOC_IA64_DIR32MSB:
11364 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11365 case BFD_RELOC_IA64_DIR32LSB:
11366 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11367 case BFD_RELOC_IA64_DIR64MSB:
11368 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11369 case BFD_RELOC_IA64_DIR64LSB:
11370 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11371 default:
0ca3e455 11372 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11373 }
11374 break;
3969b680 11375
13ae64f3
JJ		 11376 case FUNC_TP_RELATIVE:
11377 switch (r_type)
11378 {
0ca3e455
JB		 11379 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11380 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11381 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11382 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11383 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11384 default: type = "TPREL"; break;
13ae64f3
JJ		 11385 }
11386 break;
11387
11388 case FUNC_LT_TP_RELATIVE:
11389 switch (r_type)
11390 {
11391 case BFD_RELOC_IA64_IMM22:
11392 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11393 default:
0ca3e455
JB		 11394 type = "LTOFF_TPREL"; break;
11395 }
11396 break;
11397
11398 case FUNC_DTP_MODULE:
11399 switch (r_type)
11400 {
11401 case BFD_RELOC_IA64_DIR64MSB:
11402 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11403 case BFD_RELOC_IA64_DIR64LSB:
11404 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11405 default:
11406 type = "DTPMOD"; break;
13ae64f3
JJ		 11407 }
11408 break;
11409
11410 case FUNC_LT_DTP_MODULE:
11411 switch (r_type)
11412 {
11413 case BFD_RELOC_IA64_IMM22:
11414 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11415 default:
0ca3e455 11416 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11417 }
11418 break;
11419
11420 case FUNC_DTP_RELATIVE:
11421 switch (r_type)
11422 {
0ca3e455
JB		 11423 case BFD_RELOC_IA64_DIR32MSB:
11424 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11425 case BFD_RELOC_IA64_DIR32LSB:
11426 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11427 case BFD_RELOC_IA64_DIR64MSB:
11428 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11429 case BFD_RELOC_IA64_DIR64LSB:
11430 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11431 case BFD_RELOC_IA64_IMM14:
11432 new = BFD_RELOC_IA64_DTPREL14; break;
11433 case BFD_RELOC_IA64_IMM22:
11434 new = BFD_RELOC_IA64_DTPREL22; break;
11435 case BFD_RELOC_IA64_IMM64:
11436 new = BFD_RELOC_IA64_DTPREL64I; break;
11437 default:
0ca3e455 11438 type = "DTPREL"; break;
13ae64f3
JJ		 11439 }
11440 break;
11441
11442 case FUNC_LT_DTP_RELATIVE:
11443 switch (r_type)
11444 {
11445 case BFD_RELOC_IA64_IMM22:
11446 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11447 default:
0ca3e455 11448 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11449 }
11450 break;
11451
40449e9f 11452 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11453 switch (r_type)
11454 {
11455 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11456 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11457 default: type = "IPLT"; break;
11458 }
40449e9f 11459 break;
1cd8ff38 11460
800eeca4
JW		 11461 default:
11462 abort ();
11463 }
6174d9c8 11464
800eeca4
JW		 11465 if (new)
11466 return new;
11467 else
0ca3e455
JB		 11468 {
11469 int width;
11470
11471 if (!type)
11472 abort ();
11473 switch (r_type)
11474 {
11475 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11476 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11477 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11478 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
30ad6cb9 11479 case BFD_RELOC_UNUSED: width = 13; break;
0ca3e455
JB		 11480 case BFD_RELOC_IA64_IMM14: width = 14; break;
11481 case BFD_RELOC_IA64_IMM22: width = 22; break;
11482 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11483 default: abort ();
11484 }
11485
11486 /* This should be an error, but since previously there wasn't any
ad4b42b4
NC		 11487 diagnostic here, don't make it fail because of this for now. */
11488 as_warn (_("Cannot express %s%d%s relocation"), type, width, suffix);
0ca3e455
JB		 11489 return r_type;
11490 }
800eeca4
JW		 11491}
11492
11493/* Here is where generate the appropriate reloc for pseudo relocation
11494 functions. */
11495void
11496ia64_validate_fix (fix)
11497 fixS *fix;
11498{
11499 switch (fix->fx_r_type)
11500 {
11501 case BFD_RELOC_IA64_FPTR64I:
11502 case BFD_RELOC_IA64_FPTR32MSB:
11503 case BFD_RELOC_IA64_FPTR64LSB:
11504 case BFD_RELOC_IA64_LTOFF_FPTR22:
11505 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11506 if (fix->fx_offset != 0)
11507 as_bad_where (fix->fx_file, fix->fx_line,
ad4b42b4 11508 _("No addend allowed in @fptr() relocation"));
800eeca4
JW		 11509 break;
11510 default:
11511 break;
11512 }
800eeca4
JW		 11513}
11514
11515static void
11516fix_insn (fix, odesc, value)
11517 fixS *fix;
11518 const struct ia64_operand *odesc;
11519 valueT value;
11520{
11521 bfd_vma insn[3], t0, t1, control_bits;
11522 const char *err;
11523 char *fixpos;
11524 long slot;
11525
11526 slot = fix->fx_where & 0x3;
11527 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11528
c67e42c9 11529 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11530 t0 = bfd_getl64 (fixpos);
11531 t1 = bfd_getl64 (fixpos + 8);
11532 control_bits = t0 & 0x1f;
11533 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11534 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11535 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11536
c67e42c9
RH		 11537 err = NULL;
11538 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11539 {
c67e42c9
RH		 11540 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11541 insn[2] |= (((value & 0x7f) << 13)
11542 | (((value >> 7) & 0x1ff) << 27)
11543 | (((value >> 16) & 0x1f) << 22)
11544 | (((value >> 21) & 0x1) << 21)
11545 | (((value >> 63) & 0x1) << 36));
800eeca4 11546 }
c67e42c9
RH		 11547 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11548 {
11549 if (value & ~0x3fffffffffffffffULL)
11550 err = "integer operand out of range";
11551 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11552 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11553 }
11554 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11555 {
11556 value >>= 4;
11557 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11558 insn[2] |= ((((value >> 59) & 0x1) << 36)
11559 | (((value >> 0) & 0xfffff) << 13));
11560 }
11561 else
11562 err = (*odesc->insert) (odesc, value, insn + slot);
11563
11564 if (err)
11565 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11566
11567 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11568 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11569 number_to_chars_littleendian (fixpos + 0, t0, 8);
11570 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11571}
11572
11573/* Attempt to simplify or even eliminate a fixup. The return value is
11574 ignored; perhaps it was once meaningful, but now it is historical.
11575 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11576
11577 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11578 (if possible). */
94f592af
NC		 11579
11580void
55cf6793 11581md_apply_fix (fix, valP, seg)
800eeca4 11582 fixS *fix;
40449e9f 11583 valueT *valP;
2434f565 11584 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11585{
11586 char *fixpos;
40449e9f 11587 valueT value = *valP;
800eeca4
JW		 11588
11589 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11590
11591 if (fix->fx_pcrel)
11592 {
7b347e43
JB		 11593 switch (fix->fx_r_type)
11594 {
11595 case BFD_RELOC_IA64_PCREL21B: break;
11596 case BFD_RELOC_IA64_PCREL21BI: break;
11597 case BFD_RELOC_IA64_PCREL21F: break;
11598 case BFD_RELOC_IA64_PCREL21M: break;
11599 case BFD_RELOC_IA64_PCREL60B: break;
11600 case BFD_RELOC_IA64_PCREL22: break;
11601 case BFD_RELOC_IA64_PCREL64I: break;
11602 case BFD_RELOC_IA64_PCREL32MSB: break;
11603 case BFD_RELOC_IA64_PCREL32LSB: break;
11604 case BFD_RELOC_IA64_PCREL64MSB: break;
11605 case BFD_RELOC_IA64_PCREL64LSB: break;
11606 default:
11607 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11608 fix->fx_r_type);
11609 break;
11610 }
800eeca4
JW		 11611 }
11612 if (fix->fx_addsy)
11613 {
00f7efb6 11614 switch (fix->fx_r_type)
800eeca4 11615 {
00f7efb6 11616 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11617 /* This must be a TAG13 or TAG13b operand. There are no external
11618 relocs defined for them, so we must give an error. */
800eeca4 11619 as_bad_where (fix->fx_file, fix->fx_line,
ad4b42b4 11620 _("%s must have a constant value"),
800eeca4 11621 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11622 fix->fx_done = 1;
94f592af 11623 return;
00f7efb6
JJ		 11624
11625 case BFD_RELOC_IA64_TPREL14:
11626 case BFD_RELOC_IA64_TPREL22:
11627 case BFD_RELOC_IA64_TPREL64I:
11628 case BFD_RELOC_IA64_LTOFF_TPREL22:
11629 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11630 case BFD_RELOC_IA64_DTPREL14:
11631 case BFD_RELOC_IA64_DTPREL22:
11632 case BFD_RELOC_IA64_DTPREL64I:
11633 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11634 S_SET_THREAD_LOCAL (fix->fx_addsy);
11635 break;
7925dd68
JJ		 11636
11637 default:
11638 break;
800eeca4 11639 }
800eeca4
JW		 11640 }
11641 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11642 {
11643 if (fix->tc_fix_data.bigendian)
11644 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11645 else
11646 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11647 fix->fx_done = 1;
800eeca4
JW		 11648 }
11649 else
11650 {
11651 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11652 fix->fx_done = 1;
800eeca4 11653 }
800eeca4
JW		 11654}
11655
11656/* Generate the BFD reloc to be stuck in the object file from the
11657 fixup used internally in the assembler. */
542d6675
KH		 11658
11659arelent *
800eeca4 11660tc_gen_reloc (sec, fixp)
2434f565 11661 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11662 fixS *fixp;
11663{
11664 arelent *reloc;
11665
11666 reloc = xmalloc (sizeof (*reloc));
11667 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11668 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11669 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11670 reloc->addend = fixp->fx_offset;
11671 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11672
11673 if (!reloc->howto)
11674 {
11675 as_bad_where (fixp->fx_file, fixp->fx_line,
ad4b42b4 11676 _("Cannot represent %s relocation in object file"),
800eeca4 11677 bfd_get_reloc_code_name (fixp->fx_r_type));
cf738528
AS		 11678 free (reloc);
11679 return NULL;
800eeca4
JW		 11680 }
11681 return reloc;
11682}
11683
11684/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11685 of type TYPE, and store the appropriate bytes in *LIT. The number
11686 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11687 returned, or NULL on OK. */
11688
11689#define MAX_LITTLENUMS 5
11690
542d6675 11691char *
499ac353 11692md_atof (int type, char *lit, int *size)
800eeca4
JW		 11693{
11694 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11695 char *t;
11696 int prec;
11697
11698 switch (type)
11699 {
11700 /* IEEE floats */
11701 case 'f':
11702 case 'F':
11703 case 's':
11704 case 'S':
11705 prec = 2;
11706 break;
11707
11708 case 'd':
11709 case 'D':
11710 case 'r':
11711 case 'R':
11712 prec = 4;
11713 break;
11714
11715 case 'x':
11716 case 'X':
11717 case 'p':
11718 case 'P':
11719 prec = 5;
11720 break;
11721
11722 default:
11723 *size = 0;
499ac353 11724 return _("Unrecognized or unsupported floating point constant");
800eeca4
JW		 11725 }
11726 t = atof_ieee (input_line_pointer, type, words);
11727 if (t)
11728 input_line_pointer = t;
800eeca4 11729
10a98291
L		 11730 (*ia64_float_to_chars) (lit, words, prec);
11731
165a7f90
L		 11732 if (type == 'X')
11733 {
11734 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11735 memset (&lit [10], 0, 6);
165a7f90
L		 11736 *size = 8 * sizeof (LITTLENUM_TYPE);
11737 }
10a98291
L		 11738 else
11739 *size = prec * sizeof (LITTLENUM_TYPE);
11740
499ac353 11741 return NULL;
800eeca4
JW		 11742}
11743
800eeca4
JW		 11744/* Handle ia64 specific semantics of the align directive. */
11745
0a9ef439 11746void
800eeca4 11747ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11748 int n ATTRIBUTE_UNUSED;
11749 const char *fill ATTRIBUTE_UNUSED;
2434f565 11750 int len ATTRIBUTE_UNUSED;
91a2ae2a 11751 int max ATTRIBUTE_UNUSED;
800eeca4 11752{
0a9ef439 11753 if (subseg_text_p (now_seg))
800eeca4 11754 ia64_flush_insns ();
0a9ef439 11755}
800eeca4 11756
0a9ef439
RH		 11757/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11758 of an rs_align_code fragment. */
800eeca4 11759
0a9ef439
RH		 11760void
11761ia64_handle_align (fragp)
11762 fragS *fragp;
11763{
0a9ef439
RH		 11764 int bytes;
11765 char *p;
9545c4ce 11766 const unsigned char *nop;
0a9ef439
RH		 11767
11768 if (fragp->fr_type != rs_align_code)
11769 return;
11770
9545c4ce
L		 11771 /* Check if this frag has to end with a stop bit. */
11772 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11773
0a9ef439
RH		 11774 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11775 p = fragp->fr_literal + fragp->fr_fix;
11776
d9201763
L		 11777 /* If no paddings are needed, we check if we need a stop bit. */
11778 if (!bytes && fragp->tc_frag_data)
11779 {
11780 if (fragp->fr_fix < 16)
bae25f19
L		 11781#if 1
11782 /* FIXME: It won't work with
11783 .align 16
11784 alloc r32=ar.pfs,1,2,4,0
11785 */
11786 ;
11787#else
d9201763
L		 11788 as_bad_where (fragp->fr_file, fragp->fr_line,
11789 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11790#endif
d9201763
L		 11791 else
11792 /* Bundles are always in little-endian byte order. Make sure
11793 the previous bundle has the stop bit. */
11794 *(p - 16) |= 1;
11795 }
11796
0a9ef439
RH		 11797 /* Make sure we are on a 16-byte boundary, in case someone has been
11798 putting data into a text section. */
11799 if (bytes & 15)
11800 {
11801 int fix = bytes & 15;
11802 memset (p, 0, fix);
11803 p += fix;
11804 bytes -= fix;
11805 fragp->fr_fix += fix;
800eeca4
JW		 11806 }
11807
012a452b 11808 /* Instruction bundles are always little-endian. */
9545c4ce 11809 memcpy (p, nop, 16);
0a9ef439 11810 fragp->fr_var = 16;
800eeca4 11811}
10a98291
L		 11812
11813static void
11814ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11815 int prec)
11816{
11817 while (prec--)
11818 {
11819 number_to_chars_bigendian (lit, (long) (*words++),
11820 sizeof (LITTLENUM_TYPE));
11821 lit += sizeof (LITTLENUM_TYPE);
11822 }
11823}
11824
11825static void
11826ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11827 int prec)
11828{
11829 while (prec--)
11830 {
11831 number_to_chars_littleendian (lit, (long) (words[prec]),
11832 sizeof (LITTLENUM_TYPE));
11833 lit += sizeof (LITTLENUM_TYPE);
11834 }
11835}
11836
11837void
11838ia64_elf_section_change_hook (void)
11839{
38ce5b11
L		 11840 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11841 && elf_linked_to_section (now_seg) == NULL)
11842 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11843 dot_byteorder (-1);
11844}
a645d1eb
L		 11845
11846/* Check if a label should be made global. */
11847void
11848ia64_check_label (symbolS *label)
11849{
11850 if (*input_line_pointer == ':')
11851 {
11852 S_SET_EXTERNAL (label);
11853 input_line_pointer++;
11854 }
11855}
35f5df7f
L		 11856
11857/* Used to remember where .alias and .secalias directives are seen. We
11858 will rename symbol and section names when we are about to output
11859 the relocatable file. */
11860struct alias
11861{
11862 char *file; /* The file where the directive is seen. */
11863 unsigned int line; /* The line number the directive is at. */
708587a4 11864 const char *name; /* The original name of the symbol. */
35f5df7f
L		 11865};
11866
11867/* Called for .alias and .secalias directives. If SECTION is 1, it is
11868 .secalias. Otherwise, it is .alias. */
11869static void
11870dot_alias (int section)
11871{
11872 char *name, *alias;
11873 char delim;
11874 char *end_name;
11875 int len;
11876 const char *error_string;
11877 struct alias *h;
11878 const char *a;
11879 struct hash_control *ahash, *nhash;
11880 const char *kind;
11881
11882 name = input_line_pointer;
11883 delim = get_symbol_end ();
11884 end_name = input_line_pointer;
11885 *end_name = delim;
11886
11887 if (name == end_name)
11888 {
11889 as_bad (_("expected symbol name"));
e4e8248d 11890 ignore_rest_of_line ();
35f5df7f
L		 11891 return;
11892 }
11893
11894 SKIP_WHITESPACE ();
11895
11896 if (*input_line_pointer != ',')
11897 {
11898 *end_name = 0;
11899 as_bad (_("expected comma after \"%s\""), name);
11900 *end_name = delim;
11901 ignore_rest_of_line ();
11902 return;
11903 }
11904
11905 input_line_pointer++;
11906 *end_name = 0;
20b36a95 11907 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11908
11909 /* We call demand_copy_C_string to check if alias string is valid.
11910 There should be a closing `"' and no `\0' in the string. */
11911 alias = demand_copy_C_string (&len);
11912 if (alias == NULL)
11913 {
11914 ignore_rest_of_line ();
11915 return;
11916 }
11917
11918 /* Make a copy of name string. */
11919 len = strlen (name) + 1;
11920 obstack_grow (&notes, name, len);
11921 name = obstack_finish (&notes);
11922
11923 if (section)
11924 {
11925 kind = "section";
11926 ahash = secalias_hash;
11927 nhash = secalias_name_hash;
11928 }
11929 else
11930 {
11931 kind = "symbol";
11932 ahash = alias_hash;
11933 nhash = alias_name_hash;
11934 }
11935
11936 /* Check if alias has been used before. */
11937 h = (struct alias *) hash_find (ahash, alias);
11938 if (h)
11939 {
11940 if (strcmp (h->name, name))
11941 as_bad (_("`%s' is already the alias of %s `%s'"),
11942 alias, kind, h->name);
11943 goto out;
11944 }
11945
11946 /* Check if name already has an alias. */
11947 a = (const char *) hash_find (nhash, name);
11948 if (a)
11949 {
11950 if (strcmp (a, alias))
11951 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11952 goto out;
11953 }
11954
11955 h = (struct alias *) xmalloc (sizeof (struct alias));
11956 as_where (&h->file, &h->line);
11957 h->name = name;
11958
11959 error_string = hash_jam (ahash, alias, (PTR) h);
11960 if (error_string)
11961 {
11962 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11963 alias, kind, error_string);
11964 goto out;
11965 }
11966
11967 error_string = hash_jam (nhash, name, (PTR) alias);
11968 if (error_string)
11969 {
11970 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11971 alias, kind, error_string);
11972out:
11973 obstack_free (&notes, name);
11974 obstack_free (&notes, alias);
11975 }
11976
11977 demand_empty_rest_of_line ();
11978}
11979
11980/* It renames the original symbol name to its alias. */
11981static void
11982do_alias (const char *alias, PTR value)
11983{
11984 struct alias *h = (struct alias *) value;
11985 symbolS *sym = symbol_find (h->name);
11986
11987 if (sym == NULL)
11988 as_warn_where (h->file, h->line,
11989 _("symbol `%s' aliased to `%s' is not used"),
11990 h->name, alias);
11991 else
11992 S_SET_NAME (sym, (char *) alias);
11993}
11994
11995/* Called from write_object_file. */
11996void
11997ia64_adjust_symtab (void)
11998{
11999 hash_traverse (alias_hash, do_alias);
12000}
12001
12002/* It renames the original section name to its alias. */
12003static void
12004do_secalias (const char *alias, PTR value)
12005{
12006 struct alias *h = (struct alias *) value;
12007 segT sec = bfd_get_section_by_name (stdoutput, h->name);
12008
12009 if (sec == NULL)
12010 as_warn_where (h->file, h->line,
12011 _("section `%s' aliased to `%s' is not used"),
12012 h->name, alias);
12013 else
12014 sec->name = alias;
12015}
12016
12017/* Called from write_object_file. */
12018void
12019ia64_frob_file (void)
12020{
12021 hash_traverse (secalias_hash, do_secalias);
12022}
GDB Binutils - Deliverables
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