Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
01e1a5bc | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
a1727c1a | 3 | 2008, 2009, 2011 Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
800eeca4 JW |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
01e1a5bc NC |
53 | #include "bfdver.h" |
54 | #include <time.h> | |
800eeca4 | 55 | |
a66d2bb7 JB |
56 | #ifdef HAVE_LIMITS_H |
57 | #include <limits.h> | |
58 | #endif | |
59 | ||
800eeca4 | 60 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
61 | |
62 | /* Some systems define MIN in, e.g., param.h. */ | |
63 | #undef MIN | |
800eeca4 JW |
64 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
65 | ||
66 | #define NUM_SLOTS 4 | |
67 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
68 | #define CURR_SLOT md.slot[md.curr_slot] | |
69 | ||
70 | #define O_pseudo_fixup (O_max + 1) | |
71 | ||
72 | enum special_section | |
73 | { | |
557debba | 74 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
75 | SPECIAL_SECTION_BSS = 0, |
76 | SPECIAL_SECTION_SBSS, | |
77 | SPECIAL_SECTION_SDATA, | |
78 | SPECIAL_SECTION_RODATA, | |
79 | SPECIAL_SECTION_COMMENT, | |
80 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
81 | SPECIAL_SECTION_UNWIND_INFO, |
82 | /* HPUX specific section pseudo-ops. */ | |
83 | SPECIAL_SECTION_INIT_ARRAY, | |
84 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
85 | }; |
86 | ||
87 | enum reloc_func | |
88 | { | |
13ae64f3 JJ |
89 | FUNC_DTP_MODULE, |
90 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
91 | FUNC_FPTR_RELATIVE, |
92 | FUNC_GP_RELATIVE, | |
93 | FUNC_LT_RELATIVE, | |
fa2c7eff | 94 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 95 | FUNC_PC_RELATIVE, |
800eeca4 JW |
96 | FUNC_PLT_RELATIVE, |
97 | FUNC_SEC_RELATIVE, | |
98 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 99 | FUNC_TP_RELATIVE, |
800eeca4 JW |
100 | FUNC_LTV_RELATIVE, |
101 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
102 | FUNC_LT_DTP_MODULE, |
103 | FUNC_LT_DTP_RELATIVE, | |
104 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 105 | FUNC_IPLT_RELOC, |
9d0e8497 TG |
106 | #ifdef TE_VMS |
107 | FUNC_SLOTCOUNT_RELOC, | |
108 | #endif | |
800eeca4 JW |
109 | }; |
110 | ||
111 | enum reg_symbol | |
112 | { | |
113 | REG_GR = 0, | |
114 | REG_FR = (REG_GR + 128), | |
115 | REG_AR = (REG_FR + 128), | |
116 | REG_CR = (REG_AR + 128), | |
117 | REG_P = (REG_CR + 128), | |
118 | REG_BR = (REG_P + 64), | |
119 | REG_IP = (REG_BR + 8), | |
120 | REG_CFM, | |
121 | REG_PR, | |
122 | REG_PR_ROT, | |
123 | REG_PSR, | |
124 | REG_PSR_L, | |
125 | REG_PSR_UM, | |
126 | /* The following are pseudo-registers for use by gas only. */ | |
127 | IND_CPUID, | |
128 | IND_DBR, | |
129 | IND_DTR, | |
130 | IND_ITR, | |
131 | IND_IBR, | |
800eeca4 JW |
132 | IND_MSR, |
133 | IND_PKR, | |
134 | IND_PMC, | |
135 | IND_PMD, | |
136 | IND_RR, | |
542d6675 | 137 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
138 | REG_PSP, |
139 | REG_PRIUNAT, | |
800eeca4 JW |
140 | REG_NUM |
141 | }; | |
142 | ||
143 | enum dynreg_type | |
144 | { | |
145 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
146 | DYNREG_FR, /* dynamic floating point register */ | |
147 | DYNREG_PR, /* dynamic predicate register */ | |
148 | DYNREG_NUM_TYPES | |
149 | }; | |
150 | ||
87f8eb97 JW |
151 | enum operand_match_result |
152 | { | |
153 | OPERAND_MATCH, | |
154 | OPERAND_OUT_OF_RANGE, | |
155 | OPERAND_MISMATCH | |
156 | }; | |
157 | ||
800eeca4 JW |
158 | /* On the ia64, we can't know the address of a text label until the |
159 | instructions are packed into a bundle. To handle this, we keep | |
160 | track of the list of labels that appear in front of each | |
161 | instruction. */ | |
162 | struct label_fix | |
542d6675 KH |
163 | { |
164 | struct label_fix *next; | |
165 | struct symbol *sym; | |
07a53e5c | 166 | bfd_boolean dw2_mark_labels; |
542d6675 | 167 | }; |
800eeca4 | 168 | |
9d0e8497 TG |
169 | #ifdef TE_VMS |
170 | /* An internally used relocation. */ | |
171 | #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1) | |
172 | #endif | |
173 | ||
549f748d | 174 | /* This is the endianness of the current section. */ |
800eeca4 JW |
175 | extern int target_big_endian; |
176 | ||
549f748d JW |
177 | /* This is the default endianness. */ |
178 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
179 | ||
5a49b8ac | 180 | void (*ia64_number_to_chars) (char *, valueT, int); |
10a98291 | 181 | |
5a49b8ac AM |
182 | static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE *, int); |
183 | static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE *, int); | |
184 | ||
185 | static void (*ia64_float_to_chars) (char *, LITTLENUM_TYPE *, int); | |
10a98291 | 186 | |
35f5df7f L |
187 | static struct hash_control *alias_hash; |
188 | static struct hash_control *alias_name_hash; | |
189 | static struct hash_control *secalias_hash; | |
190 | static struct hash_control *secalias_name_hash; | |
191 | ||
2fac3d48 JB |
192 | /* List of chars besides those in app.c:symbol_chars that can start an |
193 | operand. Used to prevent the scrubber eating vital white-space. */ | |
194 | const char ia64_symbol_chars[] = "@?"; | |
195 | ||
800eeca4 JW |
196 | /* Characters which always start a comment. */ |
197 | const char comment_chars[] = ""; | |
198 | ||
199 | /* Characters which start a comment at the beginning of a line. */ | |
200 | const char line_comment_chars[] = "#"; | |
201 | ||
202 | /* Characters which may be used to separate multiple commands on a | |
203 | single line. */ | |
e4e8248d | 204 | const char line_separator_chars[] = ";{}"; |
800eeca4 JW |
205 | |
206 | /* Characters which are used to indicate an exponent in a floating | |
207 | point number. */ | |
208 | const char EXP_CHARS[] = "eE"; | |
209 | ||
210 | /* Characters which mean that a number is a floating point constant, | |
211 | as in 0d1.0. */ | |
212 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
213 | ||
542d6675 | 214 | /* ia64-specific option processing: */ |
800eeca4 | 215 | |
44f5c83a | 216 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
217 | |
218 | struct option md_longopts[] = | |
219 | { | |
c43c2cc5 JW |
220 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
221 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
222 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
223 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
224 | }; |
225 | ||
226 | size_t md_longopts_size = sizeof (md_longopts); | |
227 | ||
228 | static struct | |
229 | { | |
230 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
231 | struct hash_control *reg_hash; /* register name hash table */ | |
232 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
233 | struct hash_control *const_hash; /* constant hash table */ | |
234 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
235 | ||
800eeca4 JW |
236 | /* If X_op is != O_absent, the registername for the instruction's |
237 | qualifying predicate. If NULL, p0 is assumed for instructions | |
ad4b42b4 | 238 | that are predictable. */ |
800eeca4 JW |
239 | expressionS qp; |
240 | ||
8c2fda1d L |
241 | /* Optimize for which CPU. */ |
242 | enum | |
243 | { | |
244 | itanium1, | |
245 | itanium2 | |
246 | } tune; | |
247 | ||
91d777ee L |
248 | /* What to do when hint.b is used. */ |
249 | enum | |
250 | { | |
251 | hint_b_error, | |
252 | hint_b_warning, | |
253 | hint_b_ok | |
254 | } hint_b; | |
255 | ||
800eeca4 | 256 | unsigned int |
197865e8 | 257 | manual_bundling : 1, |
800eeca4 JW |
258 | debug_dv: 1, |
259 | detect_dv: 1, | |
260 | explicit_mode : 1, /* which mode we're in */ | |
261 | default_explicit_mode : 1, /* which mode is the default */ | |
262 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
263 | auto_align : 1, |
264 | keep_pending_output : 1; | |
800eeca4 | 265 | |
970d6792 L |
266 | /* What to do when something is wrong with unwind directives. */ |
267 | enum | |
268 | { | |
269 | unwind_check_warning, | |
270 | unwind_check_error | |
271 | } unwind_check; | |
272 | ||
800eeca4 JW |
273 | /* Each bundle consists of up to three instructions. We keep |
274 | track of four most recent instructions so we can correctly set | |
197865e8 | 275 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
276 | int curr_slot; |
277 | int num_slots_in_use; | |
278 | struct slot | |
279 | { | |
280 | unsigned int | |
281 | end_of_insn_group : 1, | |
282 | manual_bundling_on : 1, | |
196e8040 JW |
283 | manual_bundling_off : 1, |
284 | loc_directive_seen : 1; | |
800eeca4 JW |
285 | signed char user_template; /* user-selected template, if any */ |
286 | unsigned char qp_regno; /* qualifying predicate */ | |
287 | /* This duplicates a good fraction of "struct fix" but we | |
288 | can't use a "struct fix" instead since we can't call | |
289 | fix_new_exp() until we know the address of the instruction. */ | |
290 | int num_fixups; | |
291 | struct insn_fix | |
292 | { | |
293 | bfd_reloc_code_real_type code; | |
294 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
295 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
296 | expressionS expr; /* the value to be inserted */ | |
297 | } | |
298 | fixup[2]; /* at most two fixups per insn */ | |
299 | struct ia64_opcode *idesc; | |
300 | struct label_fix *label_fixups; | |
f1bcba5b | 301 | struct label_fix *tag_fixups; |
800eeca4 JW |
302 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
303 | expressionS opnd[6]; | |
304 | char *src_file; | |
305 | unsigned int src_line; | |
306 | struct dwarf2_line_info debug_line; | |
307 | } | |
308 | slot[NUM_SLOTS]; | |
309 | ||
310 | segT last_text_seg; | |
311 | ||
312 | struct dynreg | |
313 | { | |
314 | struct dynreg *next; /* next dynamic register */ | |
315 | const char *name; | |
316 | unsigned short base; /* the base register number */ | |
317 | unsigned short num_regs; /* # of registers in this set */ | |
318 | } | |
319 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
320 | ||
321 | flagword flags; /* ELF-header flags */ | |
322 | ||
323 | struct mem_offset { | |
324 | unsigned hint:1; /* is this hint currently valid? */ | |
325 | bfd_vma offset; /* mem.offset offset */ | |
326 | bfd_vma base; /* mem.offset base */ | |
327 | } mem_offset; | |
328 | ||
329 | int path; /* number of alt. entry points seen */ | |
330 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 331 | the current DV-checking block. */ |
800eeca4 | 332 | int maxpaths; /* size currently allocated for |
542d6675 | 333 | entry_labels */ |
557debba JW |
334 | |
335 | int pointer_size; /* size in bytes of a pointer */ | |
336 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
8b84be9d JB |
337 | |
338 | symbolS *indregsym[IND_RR - IND_CPUID + 1]; | |
800eeca4 JW |
339 | } |
340 | md; | |
341 | ||
f6fe78d6 JW |
342 | /* These are not const, because they are modified to MMI for non-itanium1 |
343 | targets below. */ | |
344 | /* MFI bundle of nops. */ | |
345 | static unsigned char le_nop[16] = | |
346 | { | |
347 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
348 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
349 | }; | |
350 | /* MFI bundle of nops with stop-bit. */ | |
351 | static unsigned char le_nop_stop[16] = | |
352 | { | |
353 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
354 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
355 | }; | |
356 | ||
542d6675 | 357 | /* application registers: */ |
800eeca4 | 358 | |
e0c9811a JW |
359 | #define AR_K0 0 |
360 | #define AR_K7 7 | |
361 | #define AR_RSC 16 | |
362 | #define AR_BSP 17 | |
363 | #define AR_BSPSTORE 18 | |
364 | #define AR_RNAT 19 | |
d8ca90b5 JB |
365 | #define AR_FCR 21 |
366 | #define AR_EFLAG 24 | |
367 | #define AR_CSD 25 | |
368 | #define AR_SSD 26 | |
369 | #define AR_CFLG 27 | |
370 | #define AR_FSR 28 | |
371 | #define AR_FIR 29 | |
372 | #define AR_FDR 30 | |
373 | #define AR_CCV 32 | |
e0c9811a JW |
374 | #define AR_UNAT 36 |
375 | #define AR_FPSR 40 | |
376 | #define AR_ITC 44 | |
4f8631b1 | 377 | #define AR_RUC 45 |
e0c9811a JW |
378 | #define AR_PFS 64 |
379 | #define AR_LC 65 | |
d8ca90b5 | 380 | #define AR_EC 66 |
800eeca4 JW |
381 | |
382 | static const struct | |
383 | { | |
384 | const char *name; | |
8b84be9d | 385 | unsigned int regnum; |
800eeca4 JW |
386 | } |
387 | ar[] = | |
388 | { | |
d8ca90b5 JB |
389 | {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1}, |
390 | {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3}, | |
391 | {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5}, | |
392 | {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7}, | |
393 | {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP}, | |
394 | {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT}, | |
395 | {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG}, | |
396 | {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD}, | |
397 | {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR}, | |
398 | {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR}, | |
399 | {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT}, | |
400 | {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC}, | |
4f8631b1 L |
401 | {"ar.ruc", AR_RUC}, {"ar.pfs", AR_PFS}, |
402 | {"ar.lc", AR_LC}, {"ar.ec", AR_EC}, | |
800eeca4 JW |
403 | }; |
404 | ||
d8ca90b5 JB |
405 | /* control registers: */ |
406 | ||
407 | #define CR_DCR 0 | |
408 | #define CR_ITM 1 | |
409 | #define CR_IVA 2 | |
410 | #define CR_PTA 8 | |
411 | #define CR_GPTA 9 | |
800eeca4 JW |
412 | #define CR_IPSR 16 |
413 | #define CR_ISR 17 | |
414 | #define CR_IIP 19 | |
415 | #define CR_IFA 20 | |
416 | #define CR_ITIR 21 | |
417 | #define CR_IIPA 22 | |
418 | #define CR_IFS 23 | |
419 | #define CR_IIM 24 | |
420 | #define CR_IHA 25 | |
1ca35711 L |
421 | #define CR_IIB0 26 |
422 | #define CR_IIB1 27 | |
d8ca90b5 | 423 | #define CR_LID 64 |
800eeca4 JW |
424 | #define CR_IVR 65 |
425 | #define CR_TPR 66 | |
426 | #define CR_EOI 67 | |
427 | #define CR_IRR0 68 | |
428 | #define CR_IRR3 71 | |
d8ca90b5 JB |
429 | #define CR_ITV 72 |
430 | #define CR_PMV 73 | |
431 | #define CR_CMCV 74 | |
800eeca4 JW |
432 | #define CR_LRR0 80 |
433 | #define CR_LRR1 81 | |
434 | ||
800eeca4 JW |
435 | static const struct |
436 | { | |
437 | const char *name; | |
8b84be9d | 438 | unsigned int regnum; |
800eeca4 JW |
439 | } |
440 | cr[] = | |
441 | { | |
d8ca90b5 JB |
442 | {"cr.dcr", CR_DCR}, |
443 | {"cr.itm", CR_ITM}, | |
444 | {"cr.iva", CR_IVA}, | |
445 | {"cr.pta", CR_PTA}, | |
446 | {"cr.gpta", CR_GPTA}, | |
447 | {"cr.ipsr", CR_IPSR}, | |
448 | {"cr.isr", CR_ISR}, | |
449 | {"cr.iip", CR_IIP}, | |
450 | {"cr.ifa", CR_IFA}, | |
451 | {"cr.itir", CR_ITIR}, | |
452 | {"cr.iipa", CR_IIPA}, | |
453 | {"cr.ifs", CR_IFS}, | |
454 | {"cr.iim", CR_IIM}, | |
455 | {"cr.iha", CR_IHA}, | |
1ca35711 L |
456 | {"cr.iib0", CR_IIB0}, |
457 | {"cr.iib1", CR_IIB1}, | |
d8ca90b5 JB |
458 | {"cr.lid", CR_LID}, |
459 | {"cr.ivr", CR_IVR}, | |
460 | {"cr.tpr", CR_TPR}, | |
461 | {"cr.eoi", CR_EOI}, | |
462 | {"cr.irr0", CR_IRR0}, | |
463 | {"cr.irr1", CR_IRR0 + 1}, | |
464 | {"cr.irr2", CR_IRR0 + 2}, | |
465 | {"cr.irr3", CR_IRR3}, | |
466 | {"cr.itv", CR_ITV}, | |
467 | {"cr.pmv", CR_PMV}, | |
468 | {"cr.cmcv", CR_CMCV}, | |
469 | {"cr.lrr0", CR_LRR0}, | |
470 | {"cr.lrr1", CR_LRR1} | |
800eeca4 JW |
471 | }; |
472 | ||
473 | #define PSR_MFL 4 | |
474 | #define PSR_IC 13 | |
475 | #define PSR_DFL 18 | |
476 | #define PSR_CPL 32 | |
477 | ||
478 | static const struct const_desc | |
479 | { | |
480 | const char *name; | |
481 | valueT value; | |
482 | } | |
483 | const_bits[] = | |
484 | { | |
542d6675 | 485 | /* PSR constant masks: */ |
800eeca4 JW |
486 | |
487 | /* 0: reserved */ | |
488 | {"psr.be", ((valueT) 1) << 1}, | |
489 | {"psr.up", ((valueT) 1) << 2}, | |
490 | {"psr.ac", ((valueT) 1) << 3}, | |
491 | {"psr.mfl", ((valueT) 1) << 4}, | |
492 | {"psr.mfh", ((valueT) 1) << 5}, | |
493 | /* 6-12: reserved */ | |
494 | {"psr.ic", ((valueT) 1) << 13}, | |
495 | {"psr.i", ((valueT) 1) << 14}, | |
496 | {"psr.pk", ((valueT) 1) << 15}, | |
497 | /* 16: reserved */ | |
498 | {"psr.dt", ((valueT) 1) << 17}, | |
499 | {"psr.dfl", ((valueT) 1) << 18}, | |
500 | {"psr.dfh", ((valueT) 1) << 19}, | |
501 | {"psr.sp", ((valueT) 1) << 20}, | |
502 | {"psr.pp", ((valueT) 1) << 21}, | |
503 | {"psr.di", ((valueT) 1) << 22}, | |
504 | {"psr.si", ((valueT) 1) << 23}, | |
505 | {"psr.db", ((valueT) 1) << 24}, | |
506 | {"psr.lp", ((valueT) 1) << 25}, | |
507 | {"psr.tb", ((valueT) 1) << 26}, | |
508 | {"psr.rt", ((valueT) 1) << 27}, | |
509 | /* 28-31: reserved */ | |
510 | /* 32-33: cpl (current privilege level) */ | |
511 | {"psr.is", ((valueT) 1) << 34}, | |
512 | {"psr.mc", ((valueT) 1) << 35}, | |
513 | {"psr.it", ((valueT) 1) << 36}, | |
514 | {"psr.id", ((valueT) 1) << 37}, | |
515 | {"psr.da", ((valueT) 1) << 38}, | |
516 | {"psr.dd", ((valueT) 1) << 39}, | |
517 | {"psr.ss", ((valueT) 1) << 40}, | |
518 | /* 41-42: ri (restart instruction) */ | |
519 | {"psr.ed", ((valueT) 1) << 43}, | |
520 | {"psr.bn", ((valueT) 1) << 44}, | |
521 | }; | |
522 | ||
542d6675 | 523 | /* indirect register-sets/memory: */ |
800eeca4 JW |
524 | |
525 | static const struct | |
526 | { | |
527 | const char *name; | |
8b84be9d | 528 | unsigned int regnum; |
800eeca4 JW |
529 | } |
530 | indirect_reg[] = | |
531 | { | |
532 | { "CPUID", IND_CPUID }, | |
533 | { "cpuid", IND_CPUID }, | |
534 | { "dbr", IND_DBR }, | |
535 | { "dtr", IND_DTR }, | |
536 | { "itr", IND_ITR }, | |
537 | { "ibr", IND_IBR }, | |
538 | { "msr", IND_MSR }, | |
539 | { "pkr", IND_PKR }, | |
540 | { "pmc", IND_PMC }, | |
541 | { "pmd", IND_PMD }, | |
542 | { "rr", IND_RR }, | |
543 | }; | |
544 | ||
545 | /* Pseudo functions used to indicate relocation types (these functions | |
546 | start with an at sign (@). */ | |
547 | static struct | |
548 | { | |
549 | const char *name; | |
550 | enum pseudo_type | |
551 | { | |
552 | PSEUDO_FUNC_NONE, | |
553 | PSEUDO_FUNC_RELOC, | |
554 | PSEUDO_FUNC_CONST, | |
e0c9811a | 555 | PSEUDO_FUNC_REG, |
800eeca4 JW |
556 | PSEUDO_FUNC_FLOAT |
557 | } | |
558 | type; | |
559 | union | |
560 | { | |
561 | unsigned long ival; | |
562 | symbolS *sym; | |
563 | } | |
564 | u; | |
565 | } | |
566 | pseudo_func[] = | |
567 | { | |
542d6675 | 568 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
569 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
570 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
571 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
572 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
573 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 574 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
575 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
576 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
577 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
578 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 579 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 580 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
581 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
582 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
583 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
584 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 585 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
9d0e8497 TG |
586 | #ifdef TE_VMS |
587 | { "slotcount", PSEUDO_FUNC_RELOC, { 0 } }, | |
588 | #endif | |
800eeca4 | 589 | |
542d6675 | 590 | /* mbtype4 constants: */ |
800eeca4 JW |
591 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
592 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
593 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
594 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
595 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
596 | ||
542d6675 | 597 | /* fclass constants: */ |
bf3ca999 | 598 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
599 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
600 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
601 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
602 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
603 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
604 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
605 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
606 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
607 | |
608 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 609 | |
c10d9d8f JW |
610 | /* hint constants: */ |
611 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
612 | ||
542d6675 | 613 | /* unwind-related constants: */ |
041340ad JW |
614 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
615 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
616 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
9c55345c | 617 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_GNU } }, |
041340ad JW |
618 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, |
619 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
620 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 621 | |
542d6675 | 622 | /* unwind-related registers: */ |
e0c9811a | 623 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
624 | }; |
625 | ||
542d6675 | 626 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
627 | static const bfd_vma nop[IA64_NUM_UNITS] = |
628 | { | |
629 | 0x0000000000LL, /* NIL => break 0 */ | |
630 | 0x0008000000LL, /* I-unit nop */ | |
631 | 0x0008000000LL, /* M-unit nop */ | |
632 | 0x4000000000LL, /* B-unit nop */ | |
633 | 0x0008000000LL, /* F-unit nop */ | |
5d5e6db9 | 634 | 0x0000000000LL, /* L-"unit" nop immediate */ |
800eeca4 JW |
635 | 0x0008000000LL, /* X-unit nop */ |
636 | }; | |
637 | ||
638 | /* Can't be `const' as it's passed to input routines (which have the | |
639 | habit of setting temporary sentinels. */ | |
640 | static char special_section_name[][20] = | |
641 | { | |
642 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
643 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
644 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
645 | }; |
646 | ||
647 | /* The best template for a particular sequence of up to three | |
648 | instructions: */ | |
649 | #define N IA64_NUM_TYPES | |
650 | static unsigned char best_template[N][N][N]; | |
651 | #undef N | |
652 | ||
653 | /* Resource dependencies currently in effect */ | |
654 | static struct rsrc { | |
655 | int depind; /* dependency index */ | |
656 | const struct ia64_dependency *dependency; /* actual dependency */ | |
657 | unsigned specific:1, /* is this a specific bit/regno? */ | |
658 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
659 | int index; /* specific regno/bit within dependency */ | |
660 | int note; /* optional qualifying note (0 if none) */ | |
661 | #define STATE_NONE 0 | |
662 | #define STATE_STOP 1 | |
663 | #define STATE_SRLZ 2 | |
664 | int insn_srlz; /* current insn serialization state */ | |
665 | int data_srlz; /* current data serialization state */ | |
666 | int qp_regno; /* qualifying predicate for this usage */ | |
667 | char *file; /* what file marked this dependency */ | |
2434f565 | 668 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 669 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 670 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
671 | int path; /* corresponding code entry index */ |
672 | } *regdeps = NULL; | |
673 | static int regdepslen = 0; | |
674 | static int regdepstotlen = 0; | |
675 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
676 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 677 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 678 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
679 | |
680 | /* Current state of PR mutexation */ | |
681 | static struct qpmutex { | |
682 | valueT prmask; | |
683 | int path; | |
684 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
685 | static int qp_mutexeslen = 0; | |
686 | static int qp_mutexestotlen = 0; | |
197865e8 | 687 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
688 | |
689 | /* Current state of PR implications */ | |
690 | static struct qp_imply { | |
691 | unsigned p1:6; | |
692 | unsigned p2:6; | |
693 | unsigned p2_branched:1; | |
694 | int path; | |
695 | } *qp_implies = NULL; | |
696 | static int qp_implieslen = 0; | |
697 | static int qp_impliestotlen = 0; | |
698 | ||
197865e8 KH |
699 | /* Keep track of static GR values so that indirect register usage can |
700 | sometimes be tracked. */ | |
800eeca4 JW |
701 | static struct gr { |
702 | unsigned known:1; | |
703 | int path; | |
704 | valueT value; | |
a66d2bb7 JB |
705 | } gr_values[128] = { |
706 | { | |
707 | 1, | |
708 | #ifdef INT_MAX | |
709 | INT_MAX, | |
710 | #else | |
711 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
712 | #endif | |
713 | 0 | |
714 | } | |
715 | }; | |
800eeca4 | 716 | |
9545c4ce L |
717 | /* Remember the alignment frag. */ |
718 | static fragS *align_frag; | |
719 | ||
800eeca4 JW |
720 | /* These are the routines required to output the various types of |
721 | unwind records. */ | |
722 | ||
f5a30c2e JW |
723 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
724 | frag address here so that if there is a section switch in the middle of | |
725 | a function, then instructions emitted to a different section are not | |
726 | counted. Since there may be more than one frag for a function, this | |
727 | means we also need to keep track of which frag this address belongs to | |
728 | so we can compute inter-frag distances. This also nicely solves the | |
729 | problem with nops emitted for align directives, which can't easily be | |
730 | counted, but can easily be derived from frag sizes. */ | |
731 | ||
800eeca4 JW |
732 | typedef struct unw_rec_list { |
733 | unwind_record r; | |
e0c9811a | 734 | unsigned long slot_number; |
f5a30c2e | 735 | fragS *slot_frag; |
800eeca4 JW |
736 | struct unw_rec_list *next; |
737 | } unw_rec_list; | |
738 | ||
2434f565 | 739 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 740 | |
6290819d NC |
741 | /* Linked list of saved prologue counts. A very poor |
742 | implementation of a map from label numbers to prologue counts. */ | |
743 | typedef struct label_prologue_count | |
744 | { | |
745 | struct label_prologue_count *next; | |
746 | unsigned long label_number; | |
747 | unsigned int prologue_count; | |
748 | } label_prologue_count; | |
749 | ||
5656b6b8 JB |
750 | typedef struct proc_pending |
751 | { | |
752 | symbolS *sym; | |
753 | struct proc_pending *next; | |
754 | } proc_pending; | |
755 | ||
e0c9811a JW |
756 | static struct |
757 | { | |
e0c9811a JW |
758 | /* Maintain a list of unwind entries for the current function. */ |
759 | unw_rec_list *list; | |
760 | unw_rec_list *tail; | |
800eeca4 | 761 | |
ad4b42b4 | 762 | /* Any unwind entries that should be attached to the current slot |
e0c9811a JW |
763 | that an insn is being constructed for. */ |
764 | unw_rec_list *current_entry; | |
800eeca4 | 765 | |
e0c9811a | 766 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 767 | proc_pending proc_pending; |
e0c9811a JW |
768 | symbolS *info; /* pointer to unwind info */ |
769 | symbolS *personality_routine; | |
91a2ae2a RH |
770 | segT saved_text_seg; |
771 | subsegT saved_text_subseg; | |
772 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 773 | |
e0c9811a | 774 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
775 | unsigned int prologue : 1; |
776 | unsigned int prologue_mask : 4; | |
e4e8248d | 777 | unsigned int prologue_gr : 7; |
75e09913 JB |
778 | unsigned int body : 1; |
779 | unsigned int insn : 1; | |
33d01f33 | 780 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
781 | /* Prologue counts at previous .label_state directives. */ |
782 | struct label_prologue_count * saved_prologue_counts; | |
ba825241 JB |
783 | |
784 | /* List of split up .save-s. */ | |
785 | unw_p_record *pending_saves; | |
e0c9811a | 786 | } unwind; |
800eeca4 | 787 | |
9f9a069e JW |
788 | /* The input value is a negated offset from psp, and specifies an address |
789 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
790 | must add 16 and divide by 4 to get the encoded value. */ | |
791 | ||
792 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
793 | ||
5a49b8ac | 794 | typedef void (*vbyte_func) (int, char *, char *); |
800eeca4 | 795 | |
0234cb7c | 796 | /* Forward declarations: */ |
5a49b8ac | 797 | static void dot_alias (int); |
cd42ff9c | 798 | static int parse_operand_and_eval (expressionS *, int); |
5a49b8ac AM |
799 | static void emit_one_bundle (void); |
800 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type (struct symbol *, | |
801 | bfd_reloc_code_real_type); | |
802 | static void insn_group_break (int, int, int); | |
803 | static void add_qp_mutex (valueT); | |
804 | static void add_qp_imply (int, int); | |
805 | static void clear_qp_mutex (valueT); | |
806 | static void clear_qp_implies (valueT, valueT); | |
807 | static void print_dependency (const char *, int); | |
808 | static void instruction_serialization (void); | |
809 | static void data_serialization (void); | |
810 | static void output_R3_format (vbyte_func, unw_record_type, unsigned long); | |
811 | static void output_B3_format (vbyte_func, unsigned long, unsigned long); | |
812 | static void output_B4_format (vbyte_func, unw_record_type, unsigned long); | |
813 | static void free_saved_prologue_counts (void); | |
91a2ae2a | 814 | |
652ca075 | 815 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
816 | unit (as opposed to the memory unit). */ |
817 | static int | |
652ca075 | 818 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
819 | { |
820 | reg -= REG_AR; | |
652ca075 L |
821 | return reg >= 64 && reg <= 111; |
822 | } | |
800eeca4 | 823 | |
652ca075 L |
824 | /* Determine if application register REGNUM resides only in the memory |
825 | unit (as opposed to the integer unit). */ | |
826 | static int | |
827 | ar_is_only_in_memory_unit (int reg) | |
828 | { | |
829 | reg -= REG_AR; | |
830 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
831 | } |
832 | ||
833 | /* Switch to section NAME and create section if necessary. It's | |
834 | rather ugly that we have to manipulate input_line_pointer but I | |
835 | don't see any other way to accomplish the same thing without | |
836 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
837 | static void | |
5a49b8ac | 838 | set_section (char *name) |
800eeca4 JW |
839 | { |
840 | char *saved_input_line_pointer; | |
841 | ||
842 | saved_input_line_pointer = input_line_pointer; | |
843 | input_line_pointer = name; | |
844 | obj_elf_section (0); | |
845 | input_line_pointer = saved_input_line_pointer; | |
846 | } | |
847 | ||
d61a78a7 RH |
848 | /* Map 's' to SHF_IA_64_SHORT. */ |
849 | ||
01e1a5bc | 850 | bfd_vma |
5a49b8ac | 851 | ia64_elf_section_letter (int letter, char **ptr_msg) |
d61a78a7 RH |
852 | { |
853 | if (letter == 's') | |
854 | return SHF_IA_64_SHORT; | |
711ef82f L |
855 | else if (letter == 'o') |
856 | return SHF_LINK_ORDER; | |
01e1a5bc NC |
857 | #ifdef TE_VMS |
858 | else if (letter == 'O') | |
859 | return SHF_IA_64_VMS_OVERLAID; | |
860 | else if (letter == 'g') | |
861 | return SHF_IA_64_VMS_GLOBAL; | |
862 | #endif | |
d61a78a7 | 863 | |
8f3bae45 | 864 | *ptr_msg = _("bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
711ef82f | 865 | return -1; |
d61a78a7 RH |
866 | } |
867 | ||
800eeca4 JW |
868 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
869 | ||
870 | flagword | |
5a49b8ac | 871 | ia64_elf_section_flags (flagword flags, |
01e1a5bc | 872 | bfd_vma attr, |
5a49b8ac | 873 | int type ATTRIBUTE_UNUSED) |
800eeca4 JW |
874 | { |
875 | if (attr & SHF_IA_64_SHORT) | |
876 | flags |= SEC_SMALL_DATA; | |
877 | return flags; | |
878 | } | |
879 | ||
91a2ae2a | 880 | int |
5a49b8ac | 881 | ia64_elf_section_type (const char *str, size_t len) |
91a2ae2a | 882 | { |
1cd8ff38 | 883 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 884 | |
1cd8ff38 | 885 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
886 | return SHT_PROGBITS; |
887 | ||
1cd8ff38 | 888 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
889 | return SHT_PROGBITS; |
890 | ||
1cd8ff38 | 891 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
892 | return SHT_IA_64_UNWIND; |
893 | ||
1cd8ff38 | 894 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
895 | return SHT_IA_64_UNWIND; |
896 | ||
711ef82f L |
897 | if (STREQ ("unwind")) |
898 | return SHT_IA_64_UNWIND; | |
899 | ||
91a2ae2a | 900 | return -1; |
1cd8ff38 | 901 | #undef STREQ |
91a2ae2a RH |
902 | } |
903 | ||
800eeca4 | 904 | static unsigned int |
5a49b8ac AM |
905 | set_regstack (unsigned int ins, |
906 | unsigned int locs, | |
907 | unsigned int outs, | |
908 | unsigned int rots) | |
800eeca4 | 909 | { |
542d6675 KH |
910 | /* Size of frame. */ |
911 | unsigned int sof; | |
800eeca4 JW |
912 | |
913 | sof = ins + locs + outs; | |
914 | if (sof > 96) | |
915 | { | |
ad4b42b4 | 916 | as_bad (_("Size of frame exceeds maximum of 96 registers")); |
800eeca4 JW |
917 | return 0; |
918 | } | |
919 | if (rots > sof) | |
920 | { | |
ad4b42b4 | 921 | as_warn (_("Size of rotating registers exceeds frame size")); |
800eeca4 JW |
922 | return 0; |
923 | } | |
924 | md.in.base = REG_GR + 32; | |
925 | md.loc.base = md.in.base + ins; | |
926 | md.out.base = md.loc.base + locs; | |
927 | ||
928 | md.in.num_regs = ins; | |
929 | md.loc.num_regs = locs; | |
930 | md.out.num_regs = outs; | |
931 | md.rot.num_regs = rots; | |
932 | return sof; | |
933 | } | |
934 | ||
935 | void | |
5a49b8ac | 936 | ia64_flush_insns (void) |
800eeca4 JW |
937 | { |
938 | struct label_fix *lfix; | |
939 | segT saved_seg; | |
940 | subsegT saved_subseg; | |
b44b1b85 | 941 | unw_rec_list *ptr; |
07a53e5c | 942 | bfd_boolean mark; |
800eeca4 JW |
943 | |
944 | if (!md.last_text_seg) | |
945 | return; | |
946 | ||
947 | saved_seg = now_seg; | |
948 | saved_subseg = now_subseg; | |
949 | ||
950 | subseg_set (md.last_text_seg, 0); | |
951 | ||
952 | while (md.num_slots_in_use > 0) | |
953 | emit_one_bundle (); /* force out queued instructions */ | |
954 | ||
955 | /* In case there are labels following the last instruction, resolve | |
07a53e5c RH |
956 | those now. */ |
957 | mark = FALSE; | |
800eeca4 JW |
958 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
959 | { | |
07a53e5c RH |
960 | symbol_set_value_now (lfix->sym); |
961 | mark |= lfix->dw2_mark_labels; | |
800eeca4 | 962 | } |
07a53e5c | 963 | if (mark) |
f1bcba5b | 964 | { |
07a53e5c RH |
965 | dwarf2_where (&CURR_SLOT.debug_line); |
966 | CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
967 | dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); | |
661ba50f | 968 | dwarf2_consume_line_info (); |
f1bcba5b | 969 | } |
07a53e5c RH |
970 | CURR_SLOT.label_fixups = 0; |
971 | ||
972 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) | |
973 | symbol_set_value_now (lfix->sym); | |
f1bcba5b | 974 | CURR_SLOT.tag_fixups = 0; |
800eeca4 | 975 | |
b44b1b85 | 976 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
977 | resolve those now. We only handle prologue, body, and endp directives |
978 | here. Give an error for others. */ | |
b44b1b85 JW |
979 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
980 | { | |
9c59842f | 981 | switch (ptr->r.type) |
b44b1b85 | 982 | { |
9c59842f JW |
983 | case prologue: |
984 | case prologue_gr: | |
985 | case body: | |
986 | case endp: | |
b44b1b85 JW |
987 | ptr->slot_number = (unsigned long) frag_more (0); |
988 | ptr->slot_frag = frag_now; | |
9c59842f JW |
989 | break; |
990 | ||
991 | /* Allow any record which doesn't have a "t" field (i.e., | |
992 | doesn't relate to a particular instruction). */ | |
993 | case unwabi: | |
994 | case br_gr: | |
995 | case copy_state: | |
996 | case fr_mem: | |
997 | case frgr_mem: | |
998 | case gr_gr: | |
999 | case gr_mem: | |
1000 | case label_state: | |
1001 | case rp_br: | |
1002 | case spill_base: | |
1003 | case spill_mask: | |
1004 | /* nothing */ | |
1005 | break; | |
1006 | ||
1007 | default: | |
1008 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1009 | break; | |
b44b1b85 | 1010 | } |
b44b1b85 JW |
1011 | } |
1012 | unwind.current_entry = NULL; | |
1013 | ||
800eeca4 | 1014 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1015 | |
1016 | if (md.qp.X_op == O_register) | |
ad4b42b4 | 1017 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
1018 | } |
1019 | ||
d9201763 L |
1020 | static void |
1021 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1022 | { |
1023 | char *saved_input_line_pointer = input_line_pointer; | |
1024 | ||
1025 | input_line_pointer = ""; | |
1026 | s_align_bytes (nbytes); | |
1027 | input_line_pointer = saved_input_line_pointer; | |
1028 | } | |
1029 | ||
1030 | void | |
5a49b8ac | 1031 | ia64_cons_align (int nbytes) |
800eeca4 JW |
1032 | { |
1033 | if (md.auto_align) | |
1034 | { | |
1035 | char *saved_input_line_pointer = input_line_pointer; | |
1036 | input_line_pointer = ""; | |
1037 | s_align_bytes (nbytes); | |
1038 | input_line_pointer = saved_input_line_pointer; | |
1039 | } | |
1040 | } | |
1041 | ||
1042 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1043 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1044 | |
5a49b8ac AM |
1045 | static void |
1046 | output_vbyte_mem (int count, char *ptr, char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1047 | { |
1048 | int x; | |
1049 | if (vbyte_mem_ptr == NULL) | |
1050 | abort (); | |
1051 | ||
1052 | if (count == 0) | |
1053 | return; | |
1054 | for (x = 0; x < count; x++) | |
1055 | *(vbyte_mem_ptr++) = ptr[x]; | |
1056 | } | |
1057 | ||
1058 | /* Count the number of bytes required for records. */ | |
1059 | static int vbyte_count = 0; | |
5a49b8ac AM |
1060 | static void |
1061 | count_output (int count, | |
1062 | char *ptr ATTRIBUTE_UNUSED, | |
1063 | char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1064 | { |
1065 | vbyte_count += count; | |
1066 | } | |
1067 | ||
1068 | static void | |
5a49b8ac | 1069 | output_R1_format (vbyte_func f, unw_record_type rtype, int rlen) |
800eeca4 | 1070 | { |
e0c9811a | 1071 | int r = 0; |
800eeca4 JW |
1072 | char byte; |
1073 | if (rlen > 0x1f) | |
1074 | { | |
1075 | output_R3_format (f, rtype, rlen); | |
1076 | return; | |
1077 | } | |
197865e8 | 1078 | |
e0c9811a JW |
1079 | if (rtype == body) |
1080 | r = 1; | |
1081 | else if (rtype != prologue) | |
ad4b42b4 | 1082 | as_bad (_("record type is not valid")); |
e0c9811a | 1083 | |
800eeca4 JW |
1084 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1085 | (*f) (1, &byte, NULL); | |
1086 | } | |
1087 | ||
1088 | static void | |
5a49b8ac | 1089 | output_R2_format (vbyte_func f, int mask, int grsave, unsigned long rlen) |
800eeca4 JW |
1090 | { |
1091 | char bytes[20]; | |
1092 | int count = 2; | |
1093 | mask = (mask & 0x0f); | |
1094 | grsave = (grsave & 0x7f); | |
1095 | ||
1096 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1097 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1098 | count += output_leb128 (bytes + 2, rlen, 0); | |
1099 | (*f) (count, bytes, NULL); | |
1100 | } | |
1101 | ||
1102 | static void | |
5a49b8ac | 1103 | output_R3_format (vbyte_func f, unw_record_type rtype, unsigned long rlen) |
800eeca4 | 1104 | { |
e0c9811a | 1105 | int r = 0, count; |
800eeca4 JW |
1106 | char bytes[20]; |
1107 | if (rlen <= 0x1f) | |
1108 | { | |
1109 | output_R1_format (f, rtype, rlen); | |
1110 | return; | |
1111 | } | |
197865e8 | 1112 | |
e0c9811a JW |
1113 | if (rtype == body) |
1114 | r = 1; | |
1115 | else if (rtype != prologue) | |
ad4b42b4 | 1116 | as_bad (_("record type is not valid")); |
800eeca4 JW |
1117 | bytes[0] = (UNW_R3 | r); |
1118 | count = output_leb128 (bytes + 1, rlen, 0); | |
1119 | (*f) (count + 1, bytes, NULL); | |
1120 | } | |
1121 | ||
1122 | static void | |
5a49b8ac | 1123 | output_P1_format (vbyte_func f, int brmask) |
800eeca4 JW |
1124 | { |
1125 | char byte; | |
1126 | byte = UNW_P1 | (brmask & 0x1f); | |
1127 | (*f) (1, &byte, NULL); | |
1128 | } | |
1129 | ||
1130 | static void | |
5a49b8ac | 1131 | output_P2_format (vbyte_func f, int brmask, int gr) |
800eeca4 JW |
1132 | { |
1133 | char bytes[2]; | |
1134 | brmask = (brmask & 0x1f); | |
1135 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1136 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1137 | (*f) (2, bytes, NULL); | |
1138 | } | |
1139 | ||
1140 | static void | |
5a49b8ac | 1141 | output_P3_format (vbyte_func f, unw_record_type rtype, int reg) |
800eeca4 JW |
1142 | { |
1143 | char bytes[2]; | |
e0c9811a | 1144 | int r = 0; |
800eeca4 JW |
1145 | reg = (reg & 0x7f); |
1146 | switch (rtype) | |
542d6675 | 1147 | { |
800eeca4 JW |
1148 | case psp_gr: |
1149 | r = 0; | |
1150 | break; | |
1151 | case rp_gr: | |
1152 | r = 1; | |
1153 | break; | |
1154 | case pfs_gr: | |
1155 | r = 2; | |
1156 | break; | |
1157 | case preds_gr: | |
1158 | r = 3; | |
1159 | break; | |
1160 | case unat_gr: | |
1161 | r = 4; | |
1162 | break; | |
1163 | case lc_gr: | |
1164 | r = 5; | |
1165 | break; | |
1166 | case rp_br: | |
1167 | r = 6; | |
1168 | break; | |
1169 | case rnat_gr: | |
1170 | r = 7; | |
1171 | break; | |
1172 | case bsp_gr: | |
1173 | r = 8; | |
1174 | break; | |
1175 | case bspstore_gr: | |
1176 | r = 9; | |
1177 | break; | |
1178 | case fpsr_gr: | |
1179 | r = 10; | |
1180 | break; | |
1181 | case priunat_gr: | |
1182 | r = 11; | |
1183 | break; | |
1184 | default: | |
ad4b42b4 | 1185 | as_bad (_("Invalid record type for P3 format.")); |
542d6675 | 1186 | } |
800eeca4 JW |
1187 | bytes[0] = (UNW_P3 | (r >> 1)); |
1188 | bytes[1] = (((r & 1) << 7) | reg); | |
1189 | (*f) (2, bytes, NULL); | |
1190 | } | |
1191 | ||
800eeca4 | 1192 | static void |
5a49b8ac | 1193 | output_P4_format (vbyte_func f, unsigned char *imask, unsigned long imask_size) |
800eeca4 | 1194 | { |
e0c9811a | 1195 | imask[0] = UNW_P4; |
2132e3a3 | 1196 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1197 | } |
1198 | ||
1199 | static void | |
5a49b8ac | 1200 | output_P5_format (vbyte_func f, int grmask, unsigned long frmask) |
800eeca4 JW |
1201 | { |
1202 | char bytes[4]; | |
1203 | grmask = (grmask & 0x0f); | |
1204 | ||
1205 | bytes[0] = UNW_P5; | |
1206 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1207 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1208 | bytes[3] = (frmask & 0x000000ff); | |
1209 | (*f) (4, bytes, NULL); | |
1210 | } | |
1211 | ||
1212 | static void | |
5a49b8ac | 1213 | output_P6_format (vbyte_func f, unw_record_type rtype, int rmask) |
800eeca4 JW |
1214 | { |
1215 | char byte; | |
e0c9811a | 1216 | int r = 0; |
197865e8 | 1217 | |
e0c9811a JW |
1218 | if (rtype == gr_mem) |
1219 | r = 1; | |
1220 | else if (rtype != fr_mem) | |
ad4b42b4 | 1221 | as_bad (_("Invalid record type for format P6")); |
800eeca4 JW |
1222 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1223 | (*f) (1, &byte, NULL); | |
1224 | } | |
1225 | ||
1226 | static void | |
5a49b8ac AM |
1227 | output_P7_format (vbyte_func f, |
1228 | unw_record_type rtype, | |
1229 | unsigned long w1, | |
1230 | unsigned long w2) | |
800eeca4 JW |
1231 | { |
1232 | char bytes[20]; | |
1233 | int count = 1; | |
e0c9811a | 1234 | int r = 0; |
800eeca4 JW |
1235 | count += output_leb128 (bytes + 1, w1, 0); |
1236 | switch (rtype) | |
1237 | { | |
542d6675 KH |
1238 | case mem_stack_f: |
1239 | r = 0; | |
1240 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1241 | break; | |
1242 | case mem_stack_v: | |
1243 | r = 1; | |
1244 | break; | |
1245 | case spill_base: | |
1246 | r = 2; | |
1247 | break; | |
1248 | case psp_sprel: | |
1249 | r = 3; | |
1250 | break; | |
1251 | case rp_when: | |
1252 | r = 4; | |
1253 | break; | |
1254 | case rp_psprel: | |
1255 | r = 5; | |
1256 | break; | |
1257 | case pfs_when: | |
1258 | r = 6; | |
1259 | break; | |
1260 | case pfs_psprel: | |
1261 | r = 7; | |
1262 | break; | |
1263 | case preds_when: | |
1264 | r = 8; | |
1265 | break; | |
1266 | case preds_psprel: | |
1267 | r = 9; | |
1268 | break; | |
1269 | case lc_when: | |
1270 | r = 10; | |
1271 | break; | |
1272 | case lc_psprel: | |
1273 | r = 11; | |
1274 | break; | |
1275 | case unat_when: | |
1276 | r = 12; | |
1277 | break; | |
1278 | case unat_psprel: | |
1279 | r = 13; | |
1280 | break; | |
1281 | case fpsr_when: | |
1282 | r = 14; | |
1283 | break; | |
1284 | case fpsr_psprel: | |
1285 | r = 15; | |
1286 | break; | |
1287 | default: | |
1288 | break; | |
800eeca4 JW |
1289 | } |
1290 | bytes[0] = (UNW_P7 | r); | |
1291 | (*f) (count, bytes, NULL); | |
1292 | } | |
1293 | ||
1294 | static void | |
5a49b8ac | 1295 | output_P8_format (vbyte_func f, unw_record_type rtype, unsigned long t) |
800eeca4 JW |
1296 | { |
1297 | char bytes[20]; | |
e0c9811a | 1298 | int r = 0; |
800eeca4 JW |
1299 | int count = 2; |
1300 | bytes[0] = UNW_P8; | |
1301 | switch (rtype) | |
1302 | { | |
542d6675 KH |
1303 | case rp_sprel: |
1304 | r = 1; | |
1305 | break; | |
1306 | case pfs_sprel: | |
1307 | r = 2; | |
1308 | break; | |
1309 | case preds_sprel: | |
1310 | r = 3; | |
1311 | break; | |
1312 | case lc_sprel: | |
1313 | r = 4; | |
1314 | break; | |
1315 | case unat_sprel: | |
1316 | r = 5; | |
1317 | break; | |
1318 | case fpsr_sprel: | |
1319 | r = 6; | |
1320 | break; | |
1321 | case bsp_when: | |
1322 | r = 7; | |
1323 | break; | |
1324 | case bsp_psprel: | |
1325 | r = 8; | |
1326 | break; | |
1327 | case bsp_sprel: | |
1328 | r = 9; | |
1329 | break; | |
1330 | case bspstore_when: | |
1331 | r = 10; | |
1332 | break; | |
1333 | case bspstore_psprel: | |
1334 | r = 11; | |
1335 | break; | |
1336 | case bspstore_sprel: | |
1337 | r = 12; | |
1338 | break; | |
1339 | case rnat_when: | |
1340 | r = 13; | |
1341 | break; | |
1342 | case rnat_psprel: | |
1343 | r = 14; | |
1344 | break; | |
1345 | case rnat_sprel: | |
1346 | r = 15; | |
1347 | break; | |
1348 | case priunat_when_gr: | |
1349 | r = 16; | |
1350 | break; | |
1351 | case priunat_psprel: | |
1352 | r = 17; | |
1353 | break; | |
1354 | case priunat_sprel: | |
1355 | r = 18; | |
1356 | break; | |
1357 | case priunat_when_mem: | |
1358 | r = 19; | |
1359 | break; | |
1360 | default: | |
1361 | break; | |
800eeca4 JW |
1362 | } |
1363 | bytes[1] = r; | |
1364 | count += output_leb128 (bytes + 2, t, 0); | |
1365 | (*f) (count, bytes, NULL); | |
1366 | } | |
1367 | ||
1368 | static void | |
5a49b8ac | 1369 | output_P9_format (vbyte_func f, int grmask, int gr) |
800eeca4 JW |
1370 | { |
1371 | char bytes[3]; | |
1372 | bytes[0] = UNW_P9; | |
1373 | bytes[1] = (grmask & 0x0f); | |
1374 | bytes[2] = (gr & 0x7f); | |
1375 | (*f) (3, bytes, NULL); | |
1376 | } | |
1377 | ||
1378 | static void | |
5a49b8ac | 1379 | output_P10_format (vbyte_func f, int abi, int context) |
800eeca4 JW |
1380 | { |
1381 | char bytes[3]; | |
1382 | bytes[0] = UNW_P10; | |
1383 | bytes[1] = (abi & 0xff); | |
1384 | bytes[2] = (context & 0xff); | |
1385 | (*f) (3, bytes, NULL); | |
1386 | } | |
1387 | ||
1388 | static void | |
5a49b8ac | 1389 | output_B1_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1390 | { |
1391 | char byte; | |
e0c9811a | 1392 | int r = 0; |
197865e8 | 1393 | if (label > 0x1f) |
800eeca4 JW |
1394 | { |
1395 | output_B4_format (f, rtype, label); | |
1396 | return; | |
1397 | } | |
e0c9811a JW |
1398 | if (rtype == copy_state) |
1399 | r = 1; | |
1400 | else if (rtype != label_state) | |
ad4b42b4 | 1401 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1402 | |
1403 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1404 | (*f) (1, &byte, NULL); | |
1405 | } | |
1406 | ||
1407 | static void | |
5a49b8ac | 1408 | output_B2_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1409 | { |
1410 | char bytes[20]; | |
1411 | int count = 1; | |
1412 | if (ecount > 0x1f) | |
1413 | { | |
1414 | output_B3_format (f, ecount, t); | |
1415 | return; | |
1416 | } | |
1417 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1418 | count += output_leb128 (bytes + 1, t, 0); | |
1419 | (*f) (count, bytes, NULL); | |
1420 | } | |
1421 | ||
1422 | static void | |
5a49b8ac | 1423 | output_B3_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1424 | { |
1425 | char bytes[20]; | |
1426 | int count = 1; | |
1427 | if (ecount <= 0x1f) | |
1428 | { | |
1429 | output_B2_format (f, ecount, t); | |
1430 | return; | |
1431 | } | |
1432 | bytes[0] = UNW_B3; | |
1433 | count += output_leb128 (bytes + 1, t, 0); | |
1434 | count += output_leb128 (bytes + count, ecount, 0); | |
1435 | (*f) (count, bytes, NULL); | |
1436 | } | |
1437 | ||
1438 | static void | |
5a49b8ac | 1439 | output_B4_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1440 | { |
1441 | char bytes[20]; | |
e0c9811a | 1442 | int r = 0; |
800eeca4 | 1443 | int count = 1; |
197865e8 | 1444 | if (label <= 0x1f) |
800eeca4 JW |
1445 | { |
1446 | output_B1_format (f, rtype, label); | |
1447 | return; | |
1448 | } | |
197865e8 | 1449 | |
e0c9811a JW |
1450 | if (rtype == copy_state) |
1451 | r = 1; | |
1452 | else if (rtype != label_state) | |
ad4b42b4 | 1453 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1454 | |
1455 | bytes[0] = (UNW_B4 | (r << 3)); | |
1456 | count += output_leb128 (bytes + 1, label, 0); | |
1457 | (*f) (count, bytes, NULL); | |
1458 | } | |
1459 | ||
1460 | static char | |
5a49b8ac | 1461 | format_ab_reg (int ab, int reg) |
800eeca4 JW |
1462 | { |
1463 | int ret; | |
e0c9811a | 1464 | ab = (ab & 3); |
800eeca4 | 1465 | reg = (reg & 0x1f); |
e0c9811a | 1466 | ret = (ab << 5) | reg; |
800eeca4 JW |
1467 | return ret; |
1468 | } | |
1469 | ||
1470 | static void | |
5a49b8ac AM |
1471 | output_X1_format (vbyte_func f, |
1472 | unw_record_type rtype, | |
1473 | int ab, | |
1474 | int reg, | |
1475 | unsigned long t, | |
1476 | unsigned long w1) | |
800eeca4 JW |
1477 | { |
1478 | char bytes[20]; | |
e0c9811a | 1479 | int r = 0; |
800eeca4 JW |
1480 | int count = 2; |
1481 | bytes[0] = UNW_X1; | |
197865e8 | 1482 | |
e0c9811a JW |
1483 | if (rtype == spill_sprel) |
1484 | r = 1; | |
1485 | else if (rtype != spill_psprel) | |
ad4b42b4 | 1486 | as_bad (_("Invalid record type for format X1")); |
e0c9811a | 1487 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1488 | count += output_leb128 (bytes + 2, t, 0); |
1489 | count += output_leb128 (bytes + count, w1, 0); | |
1490 | (*f) (count, bytes, NULL); | |
1491 | } | |
1492 | ||
1493 | static void | |
5a49b8ac AM |
1494 | output_X2_format (vbyte_func f, |
1495 | int ab, | |
1496 | int reg, | |
1497 | int x, | |
1498 | int y, | |
1499 | int treg, | |
1500 | unsigned long t) | |
800eeca4 JW |
1501 | { |
1502 | char bytes[20]; | |
800eeca4 JW |
1503 | int count = 3; |
1504 | bytes[0] = UNW_X2; | |
e0c9811a | 1505 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1506 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1507 | count += output_leb128 (bytes + 3, t, 0); | |
1508 | (*f) (count, bytes, NULL); | |
1509 | } | |
1510 | ||
1511 | static void | |
5a49b8ac AM |
1512 | output_X3_format (vbyte_func f, |
1513 | unw_record_type rtype, | |
1514 | int qp, | |
1515 | int ab, | |
1516 | int reg, | |
1517 | unsigned long t, | |
1518 | unsigned long w1) | |
800eeca4 JW |
1519 | { |
1520 | char bytes[20]; | |
e0c9811a | 1521 | int r = 0; |
800eeca4 | 1522 | int count = 3; |
e0c9811a JW |
1523 | bytes[0] = UNW_X3; |
1524 | ||
1525 | if (rtype == spill_sprel_p) | |
1526 | r = 1; | |
1527 | else if (rtype != spill_psprel_p) | |
ad4b42b4 | 1528 | as_bad (_("Invalid record type for format X3")); |
800eeca4 | 1529 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1530 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1531 | count += output_leb128 (bytes + 3, t, 0); |
1532 | count += output_leb128 (bytes + count, w1, 0); | |
1533 | (*f) (count, bytes, NULL); | |
1534 | } | |
1535 | ||
1536 | static void | |
5a49b8ac AM |
1537 | output_X4_format (vbyte_func f, |
1538 | int qp, | |
1539 | int ab, | |
1540 | int reg, | |
1541 | int x, | |
1542 | int y, | |
1543 | int treg, | |
1544 | unsigned long t) | |
800eeca4 JW |
1545 | { |
1546 | char bytes[20]; | |
800eeca4 | 1547 | int count = 4; |
e0c9811a | 1548 | bytes[0] = UNW_X4; |
800eeca4 | 1549 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1550 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1551 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1552 | count += output_leb128 (bytes + 4, t, 0); | |
1553 | (*f) (count, bytes, NULL); | |
1554 | } | |
1555 | ||
ba825241 JB |
1556 | /* This function checks whether there are any outstanding .save-s and |
1557 | discards them if so. */ | |
1558 | ||
1559 | static void | |
1560 | check_pending_save (void) | |
1561 | { | |
1562 | if (unwind.pending_saves) | |
1563 | { | |
1564 | unw_rec_list *cur, *prev; | |
1565 | ||
ad4b42b4 | 1566 | as_warn (_("Previous .save incomplete")); |
ba825241 JB |
1567 | for (cur = unwind.list, prev = NULL; cur; ) |
1568 | if (&cur->r.record.p == unwind.pending_saves) | |
1569 | { | |
1570 | if (prev) | |
1571 | prev->next = cur->next; | |
1572 | else | |
1573 | unwind.list = cur->next; | |
1574 | if (cur == unwind.tail) | |
1575 | unwind.tail = prev; | |
1576 | if (cur == unwind.current_entry) | |
1577 | unwind.current_entry = cur->next; | |
1578 | /* Don't free the first discarded record, it's being used as | |
1579 | terminator for (currently) br_gr and gr_gr processing, and | |
1580 | also prevents leaving a dangling pointer to it in its | |
1581 | predecessor. */ | |
1582 | cur->r.record.p.grmask = 0; | |
1583 | cur->r.record.p.brmask = 0; | |
1584 | cur->r.record.p.frmask = 0; | |
1585 | prev = cur->r.record.p.next; | |
1586 | cur->r.record.p.next = NULL; | |
1587 | cur = prev; | |
1588 | break; | |
1589 | } | |
1590 | else | |
1591 | { | |
1592 | prev = cur; | |
1593 | cur = cur->next; | |
1594 | } | |
1595 | while (cur) | |
1596 | { | |
1597 | prev = cur; | |
1598 | cur = cur->r.record.p.next; | |
1599 | free (prev); | |
1600 | } | |
1601 | unwind.pending_saves = NULL; | |
1602 | } | |
1603 | } | |
1604 | ||
800eeca4 | 1605 | /* This function allocates a record list structure, and initializes fields. */ |
542d6675 | 1606 | |
800eeca4 | 1607 | static unw_rec_list * |
197865e8 | 1608 | alloc_record (unw_record_type t) |
800eeca4 JW |
1609 | { |
1610 | unw_rec_list *ptr; | |
1611 | ptr = xmalloc (sizeof (*ptr)); | |
ba825241 | 1612 | memset (ptr, 0, sizeof (*ptr)); |
800eeca4 JW |
1613 | ptr->slot_number = SLOT_NUM_NOT_SET; |
1614 | ptr->r.type = t; | |
1615 | return ptr; | |
1616 | } | |
1617 | ||
5738bc24 JW |
1618 | /* Dummy unwind record used for calculating the length of the last prologue or |
1619 | body region. */ | |
1620 | ||
1621 | static unw_rec_list * | |
5a49b8ac | 1622 | output_endp (void) |
5738bc24 JW |
1623 | { |
1624 | unw_rec_list *ptr = alloc_record (endp); | |
1625 | return ptr; | |
1626 | } | |
1627 | ||
800eeca4 | 1628 | static unw_rec_list * |
5a49b8ac | 1629 | output_prologue (void) |
800eeca4 JW |
1630 | { |
1631 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1632 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1633 | return ptr; |
1634 | } | |
1635 | ||
1636 | static unw_rec_list * | |
5a49b8ac | 1637 | output_prologue_gr (unsigned int saved_mask, unsigned int reg) |
800eeca4 JW |
1638 | { |
1639 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1640 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1641 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1642 | ptr->r.record.r.grsave = reg; |
1643 | return ptr; | |
1644 | } | |
1645 | ||
1646 | static unw_rec_list * | |
5a49b8ac | 1647 | output_body (void) |
800eeca4 JW |
1648 | { |
1649 | unw_rec_list *ptr = alloc_record (body); | |
1650 | return ptr; | |
1651 | } | |
1652 | ||
1653 | static unw_rec_list * | |
5a49b8ac | 1654 | output_mem_stack_f (unsigned int size) |
800eeca4 JW |
1655 | { |
1656 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1657 | ptr->r.record.p.size = size; | |
1658 | return ptr; | |
1659 | } | |
1660 | ||
1661 | static unw_rec_list * | |
5a49b8ac | 1662 | output_mem_stack_v (void) |
800eeca4 JW |
1663 | { |
1664 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1665 | return ptr; | |
1666 | } | |
1667 | ||
1668 | static unw_rec_list * | |
5a49b8ac | 1669 | output_psp_gr (unsigned int gr) |
800eeca4 JW |
1670 | { |
1671 | unw_rec_list *ptr = alloc_record (psp_gr); | |
ba825241 | 1672 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1673 | return ptr; |
1674 | } | |
1675 | ||
1676 | static unw_rec_list * | |
5a49b8ac | 1677 | output_psp_sprel (unsigned int offset) |
800eeca4 JW |
1678 | { |
1679 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
ba825241 | 1680 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1681 | return ptr; |
1682 | } | |
1683 | ||
1684 | static unw_rec_list * | |
5a49b8ac | 1685 | output_rp_when (void) |
800eeca4 JW |
1686 | { |
1687 | unw_rec_list *ptr = alloc_record (rp_when); | |
1688 | return ptr; | |
1689 | } | |
1690 | ||
1691 | static unw_rec_list * | |
5a49b8ac | 1692 | output_rp_gr (unsigned int gr) |
800eeca4 JW |
1693 | { |
1694 | unw_rec_list *ptr = alloc_record (rp_gr); | |
ba825241 | 1695 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1696 | return ptr; |
1697 | } | |
1698 | ||
1699 | static unw_rec_list * | |
5a49b8ac | 1700 | output_rp_br (unsigned int br) |
800eeca4 JW |
1701 | { |
1702 | unw_rec_list *ptr = alloc_record (rp_br); | |
ba825241 | 1703 | ptr->r.record.p.r.br = br; |
800eeca4 JW |
1704 | return ptr; |
1705 | } | |
1706 | ||
1707 | static unw_rec_list * | |
5a49b8ac | 1708 | output_rp_psprel (unsigned int offset) |
800eeca4 JW |
1709 | { |
1710 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
ba825241 | 1711 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1712 | return ptr; |
1713 | } | |
1714 | ||
1715 | static unw_rec_list * | |
5a49b8ac | 1716 | output_rp_sprel (unsigned int offset) |
800eeca4 JW |
1717 | { |
1718 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
ba825241 | 1719 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1720 | return ptr; |
1721 | } | |
1722 | ||
1723 | static unw_rec_list * | |
5a49b8ac | 1724 | output_pfs_when (void) |
800eeca4 JW |
1725 | { |
1726 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1727 | return ptr; | |
1728 | } | |
1729 | ||
1730 | static unw_rec_list * | |
5a49b8ac | 1731 | output_pfs_gr (unsigned int gr) |
800eeca4 JW |
1732 | { |
1733 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
ba825241 | 1734 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1735 | return ptr; |
1736 | } | |
1737 | ||
1738 | static unw_rec_list * | |
5a49b8ac | 1739 | output_pfs_psprel (unsigned int offset) |
800eeca4 JW |
1740 | { |
1741 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
ba825241 | 1742 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1743 | return ptr; |
1744 | } | |
1745 | ||
1746 | static unw_rec_list * | |
5a49b8ac | 1747 | output_pfs_sprel (unsigned int offset) |
800eeca4 JW |
1748 | { |
1749 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
ba825241 | 1750 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1751 | return ptr; |
1752 | } | |
1753 | ||
1754 | static unw_rec_list * | |
5a49b8ac | 1755 | output_preds_when (void) |
800eeca4 JW |
1756 | { |
1757 | unw_rec_list *ptr = alloc_record (preds_when); | |
1758 | return ptr; | |
1759 | } | |
1760 | ||
1761 | static unw_rec_list * | |
5a49b8ac | 1762 | output_preds_gr (unsigned int gr) |
800eeca4 JW |
1763 | { |
1764 | unw_rec_list *ptr = alloc_record (preds_gr); | |
ba825241 | 1765 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1766 | return ptr; |
1767 | } | |
1768 | ||
1769 | static unw_rec_list * | |
5a49b8ac | 1770 | output_preds_psprel (unsigned int offset) |
800eeca4 JW |
1771 | { |
1772 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
ba825241 | 1773 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1774 | return ptr; |
1775 | } | |
1776 | ||
1777 | static unw_rec_list * | |
5a49b8ac | 1778 | output_preds_sprel (unsigned int offset) |
800eeca4 JW |
1779 | { |
1780 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
ba825241 | 1781 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1782 | return ptr; |
1783 | } | |
1784 | ||
1785 | static unw_rec_list * | |
5a49b8ac | 1786 | output_fr_mem (unsigned int mask) |
800eeca4 JW |
1787 | { |
1788 | unw_rec_list *ptr = alloc_record (fr_mem); | |
ba825241 JB |
1789 | unw_rec_list *cur = ptr; |
1790 | ||
1791 | ptr->r.record.p.frmask = mask; | |
1792 | unwind.pending_saves = &ptr->r.record.p; | |
1793 | for (;;) | |
1794 | { | |
1795 | unw_rec_list *prev = cur; | |
1796 | ||
1797 | /* Clear least significant set bit. */ | |
1798 | mask &= ~(mask & (~mask + 1)); | |
1799 | if (!mask) | |
1800 | return ptr; | |
1801 | cur = alloc_record (fr_mem); | |
1802 | cur->r.record.p.frmask = mask; | |
1803 | /* Retain only least significant bit. */ | |
1804 | prev->r.record.p.frmask ^= mask; | |
1805 | prev->r.record.p.next = cur; | |
1806 | } | |
800eeca4 JW |
1807 | } |
1808 | ||
1809 | static unw_rec_list * | |
5a49b8ac | 1810 | output_frgr_mem (unsigned int gr_mask, unsigned int fr_mask) |
800eeca4 JW |
1811 | { |
1812 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
ba825241 JB |
1813 | unw_rec_list *cur = ptr; |
1814 | ||
1815 | unwind.pending_saves = &cur->r.record.p; | |
1816 | cur->r.record.p.frmask = fr_mask; | |
1817 | while (fr_mask) | |
1818 | { | |
1819 | unw_rec_list *prev = cur; | |
1820 | ||
1821 | /* Clear least significant set bit. */ | |
1822 | fr_mask &= ~(fr_mask & (~fr_mask + 1)); | |
1823 | if (!gr_mask && !fr_mask) | |
1824 | return ptr; | |
1825 | cur = alloc_record (frgr_mem); | |
1826 | cur->r.record.p.frmask = fr_mask; | |
1827 | /* Retain only least significant bit. */ | |
1828 | prev->r.record.p.frmask ^= fr_mask; | |
1829 | prev->r.record.p.next = cur; | |
1830 | } | |
1831 | cur->r.record.p.grmask = gr_mask; | |
1832 | for (;;) | |
1833 | { | |
1834 | unw_rec_list *prev = cur; | |
1835 | ||
1836 | /* Clear least significant set bit. */ | |
1837 | gr_mask &= ~(gr_mask & (~gr_mask + 1)); | |
1838 | if (!gr_mask) | |
1839 | return ptr; | |
1840 | cur = alloc_record (frgr_mem); | |
1841 | cur->r.record.p.grmask = gr_mask; | |
1842 | /* Retain only least significant bit. */ | |
1843 | prev->r.record.p.grmask ^= gr_mask; | |
1844 | prev->r.record.p.next = cur; | |
1845 | } | |
800eeca4 JW |
1846 | } |
1847 | ||
1848 | static unw_rec_list * | |
5a49b8ac | 1849 | output_gr_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
1850 | { |
1851 | unw_rec_list *ptr = alloc_record (gr_gr); | |
ba825241 JB |
1852 | unw_rec_list *cur = ptr; |
1853 | ||
800eeca4 | 1854 | ptr->r.record.p.grmask = mask; |
ba825241 JB |
1855 | ptr->r.record.p.r.gr = reg; |
1856 | unwind.pending_saves = &ptr->r.record.p; | |
1857 | for (;;) | |
1858 | { | |
1859 | unw_rec_list *prev = cur; | |
1860 | ||
1861 | /* Clear least significant set bit. */ | |
1862 | mask &= ~(mask & (~mask + 1)); | |
1863 | if (!mask) | |
1864 | return ptr; | |
1865 | cur = alloc_record (gr_gr); | |
1866 | cur->r.record.p.grmask = mask; | |
1867 | /* Indicate this record shouldn't be output. */ | |
1868 | cur->r.record.p.r.gr = REG_NUM; | |
1869 | /* Retain only least significant bit. */ | |
1870 | prev->r.record.p.grmask ^= mask; | |
1871 | prev->r.record.p.next = cur; | |
1872 | } | |
800eeca4 JW |
1873 | } |
1874 | ||
1875 | static unw_rec_list * | |
5a49b8ac | 1876 | output_gr_mem (unsigned int mask) |
800eeca4 JW |
1877 | { |
1878 | unw_rec_list *ptr = alloc_record (gr_mem); | |
ba825241 JB |
1879 | unw_rec_list *cur = ptr; |
1880 | ||
1881 | ptr->r.record.p.grmask = mask; | |
1882 | unwind.pending_saves = &ptr->r.record.p; | |
1883 | for (;;) | |
1884 | { | |
1885 | unw_rec_list *prev = cur; | |
1886 | ||
1887 | /* Clear least significant set bit. */ | |
1888 | mask &= ~(mask & (~mask + 1)); | |
1889 | if (!mask) | |
1890 | return ptr; | |
1891 | cur = alloc_record (gr_mem); | |
1892 | cur->r.record.p.grmask = mask; | |
1893 | /* Retain only least significant bit. */ | |
1894 | prev->r.record.p.grmask ^= mask; | |
1895 | prev->r.record.p.next = cur; | |
1896 | } | |
800eeca4 JW |
1897 | } |
1898 | ||
1899 | static unw_rec_list * | |
1900 | output_br_mem (unsigned int mask) | |
1901 | { | |
1902 | unw_rec_list *ptr = alloc_record (br_mem); | |
ba825241 JB |
1903 | unw_rec_list *cur = ptr; |
1904 | ||
800eeca4 | 1905 | ptr->r.record.p.brmask = mask; |
ba825241 JB |
1906 | unwind.pending_saves = &ptr->r.record.p; |
1907 | for (;;) | |
1908 | { | |
1909 | unw_rec_list *prev = cur; | |
1910 | ||
1911 | /* Clear least significant set bit. */ | |
1912 | mask &= ~(mask & (~mask + 1)); | |
1913 | if (!mask) | |
1914 | return ptr; | |
1915 | cur = alloc_record (br_mem); | |
1916 | cur->r.record.p.brmask = mask; | |
1917 | /* Retain only least significant bit. */ | |
1918 | prev->r.record.p.brmask ^= mask; | |
1919 | prev->r.record.p.next = cur; | |
1920 | } | |
800eeca4 JW |
1921 | } |
1922 | ||
1923 | static unw_rec_list * | |
5a49b8ac | 1924 | output_br_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
1925 | { |
1926 | unw_rec_list *ptr = alloc_record (br_gr); | |
ba825241 JB |
1927 | unw_rec_list *cur = ptr; |
1928 | ||
1929 | ptr->r.record.p.brmask = mask; | |
1930 | ptr->r.record.p.r.gr = reg; | |
1931 | unwind.pending_saves = &ptr->r.record.p; | |
1932 | for (;;) | |
1933 | { | |
1934 | unw_rec_list *prev = cur; | |
1935 | ||
1936 | /* Clear least significant set bit. */ | |
1937 | mask &= ~(mask & (~mask + 1)); | |
1938 | if (!mask) | |
1939 | return ptr; | |
1940 | cur = alloc_record (br_gr); | |
1941 | cur->r.record.p.brmask = mask; | |
1942 | /* Indicate this record shouldn't be output. */ | |
1943 | cur->r.record.p.r.gr = REG_NUM; | |
1944 | /* Retain only least significant bit. */ | |
1945 | prev->r.record.p.brmask ^= mask; | |
1946 | prev->r.record.p.next = cur; | |
1947 | } | |
800eeca4 JW |
1948 | } |
1949 | ||
1950 | static unw_rec_list * | |
5a49b8ac | 1951 | output_spill_base (unsigned int offset) |
800eeca4 JW |
1952 | { |
1953 | unw_rec_list *ptr = alloc_record (spill_base); | |
ba825241 | 1954 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1955 | return ptr; |
1956 | } | |
1957 | ||
1958 | static unw_rec_list * | |
5a49b8ac | 1959 | output_unat_when (void) |
800eeca4 JW |
1960 | { |
1961 | unw_rec_list *ptr = alloc_record (unat_when); | |
1962 | return ptr; | |
1963 | } | |
1964 | ||
1965 | static unw_rec_list * | |
5a49b8ac | 1966 | output_unat_gr (unsigned int gr) |
800eeca4 JW |
1967 | { |
1968 | unw_rec_list *ptr = alloc_record (unat_gr); | |
ba825241 | 1969 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1970 | return ptr; |
1971 | } | |
1972 | ||
1973 | static unw_rec_list * | |
5a49b8ac | 1974 | output_unat_psprel (unsigned int offset) |
800eeca4 JW |
1975 | { |
1976 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
ba825241 | 1977 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1978 | return ptr; |
1979 | } | |
1980 | ||
1981 | static unw_rec_list * | |
5a49b8ac | 1982 | output_unat_sprel (unsigned int offset) |
800eeca4 JW |
1983 | { |
1984 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
ba825241 | 1985 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1986 | return ptr; |
1987 | } | |
1988 | ||
1989 | static unw_rec_list * | |
5a49b8ac | 1990 | output_lc_when (void) |
800eeca4 JW |
1991 | { |
1992 | unw_rec_list *ptr = alloc_record (lc_when); | |
1993 | return ptr; | |
1994 | } | |
1995 | ||
1996 | static unw_rec_list * | |
5a49b8ac | 1997 | output_lc_gr (unsigned int gr) |
800eeca4 JW |
1998 | { |
1999 | unw_rec_list *ptr = alloc_record (lc_gr); | |
ba825241 | 2000 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2001 | return ptr; |
2002 | } | |
2003 | ||
2004 | static unw_rec_list * | |
5a49b8ac | 2005 | output_lc_psprel (unsigned int offset) |
800eeca4 JW |
2006 | { |
2007 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
ba825241 | 2008 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2009 | return ptr; |
2010 | } | |
2011 | ||
2012 | static unw_rec_list * | |
5a49b8ac | 2013 | output_lc_sprel (unsigned int offset) |
800eeca4 JW |
2014 | { |
2015 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
ba825241 | 2016 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2017 | return ptr; |
2018 | } | |
2019 | ||
2020 | static unw_rec_list * | |
5a49b8ac | 2021 | output_fpsr_when (void) |
800eeca4 JW |
2022 | { |
2023 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2024 | return ptr; | |
2025 | } | |
2026 | ||
2027 | static unw_rec_list * | |
5a49b8ac | 2028 | output_fpsr_gr (unsigned int gr) |
800eeca4 JW |
2029 | { |
2030 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
ba825241 | 2031 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2032 | return ptr; |
2033 | } | |
2034 | ||
2035 | static unw_rec_list * | |
5a49b8ac | 2036 | output_fpsr_psprel (unsigned int offset) |
800eeca4 JW |
2037 | { |
2038 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
ba825241 | 2039 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2040 | return ptr; |
2041 | } | |
2042 | ||
2043 | static unw_rec_list * | |
5a49b8ac | 2044 | output_fpsr_sprel (unsigned int offset) |
800eeca4 JW |
2045 | { |
2046 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
ba825241 | 2047 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2048 | return ptr; |
2049 | } | |
2050 | ||
2051 | static unw_rec_list * | |
5a49b8ac | 2052 | output_priunat_when_gr (void) |
800eeca4 JW |
2053 | { |
2054 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2055 | return ptr; | |
2056 | } | |
2057 | ||
2058 | static unw_rec_list * | |
5a49b8ac | 2059 | output_priunat_when_mem (void) |
800eeca4 JW |
2060 | { |
2061 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2062 | return ptr; | |
2063 | } | |
2064 | ||
2065 | static unw_rec_list * | |
5a49b8ac | 2066 | output_priunat_gr (unsigned int gr) |
800eeca4 JW |
2067 | { |
2068 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
ba825241 | 2069 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2070 | return ptr; |
2071 | } | |
2072 | ||
2073 | static unw_rec_list * | |
5a49b8ac | 2074 | output_priunat_psprel (unsigned int offset) |
800eeca4 JW |
2075 | { |
2076 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
ba825241 | 2077 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2078 | return ptr; |
2079 | } | |
2080 | ||
2081 | static unw_rec_list * | |
5a49b8ac | 2082 | output_priunat_sprel (unsigned int offset) |
800eeca4 JW |
2083 | { |
2084 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
ba825241 | 2085 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2086 | return ptr; |
2087 | } | |
2088 | ||
2089 | static unw_rec_list * | |
5a49b8ac | 2090 | output_bsp_when (void) |
800eeca4 JW |
2091 | { |
2092 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2093 | return ptr; | |
2094 | } | |
2095 | ||
2096 | static unw_rec_list * | |
5a49b8ac | 2097 | output_bsp_gr (unsigned int gr) |
800eeca4 JW |
2098 | { |
2099 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
ba825241 | 2100 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2101 | return ptr; |
2102 | } | |
2103 | ||
2104 | static unw_rec_list * | |
5a49b8ac | 2105 | output_bsp_psprel (unsigned int offset) |
800eeca4 JW |
2106 | { |
2107 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
ba825241 | 2108 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2109 | return ptr; |
2110 | } | |
2111 | ||
2112 | static unw_rec_list * | |
5a49b8ac | 2113 | output_bsp_sprel (unsigned int offset) |
800eeca4 JW |
2114 | { |
2115 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
ba825241 | 2116 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2117 | return ptr; |
2118 | } | |
2119 | ||
2120 | static unw_rec_list * | |
5a49b8ac | 2121 | output_bspstore_when (void) |
800eeca4 JW |
2122 | { |
2123 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2124 | return ptr; | |
2125 | } | |
2126 | ||
2127 | static unw_rec_list * | |
5a49b8ac | 2128 | output_bspstore_gr (unsigned int gr) |
800eeca4 JW |
2129 | { |
2130 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
ba825241 | 2131 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2132 | return ptr; |
2133 | } | |
2134 | ||
2135 | static unw_rec_list * | |
5a49b8ac | 2136 | output_bspstore_psprel (unsigned int offset) |
800eeca4 JW |
2137 | { |
2138 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
ba825241 | 2139 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2140 | return ptr; |
2141 | } | |
2142 | ||
2143 | static unw_rec_list * | |
5a49b8ac | 2144 | output_bspstore_sprel (unsigned int offset) |
800eeca4 JW |
2145 | { |
2146 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
ba825241 | 2147 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2148 | return ptr; |
2149 | } | |
2150 | ||
2151 | static unw_rec_list * | |
5a49b8ac | 2152 | output_rnat_when (void) |
800eeca4 JW |
2153 | { |
2154 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2155 | return ptr; | |
2156 | } | |
2157 | ||
2158 | static unw_rec_list * | |
5a49b8ac | 2159 | output_rnat_gr (unsigned int gr) |
800eeca4 JW |
2160 | { |
2161 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
ba825241 | 2162 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2163 | return ptr; |
2164 | } | |
2165 | ||
2166 | static unw_rec_list * | |
5a49b8ac | 2167 | output_rnat_psprel (unsigned int offset) |
800eeca4 JW |
2168 | { |
2169 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
ba825241 | 2170 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2171 | return ptr; |
2172 | } | |
2173 | ||
2174 | static unw_rec_list * | |
5a49b8ac | 2175 | output_rnat_sprel (unsigned int offset) |
800eeca4 JW |
2176 | { |
2177 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
ba825241 | 2178 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2179 | return ptr; |
2180 | } | |
2181 | ||
2182 | static unw_rec_list * | |
5a49b8ac | 2183 | output_unwabi (unsigned long abi, unsigned long context) |
800eeca4 | 2184 | { |
e0c9811a JW |
2185 | unw_rec_list *ptr = alloc_record (unwabi); |
2186 | ptr->r.record.p.abi = abi; | |
2187 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2188 | return ptr; |
2189 | } | |
2190 | ||
2191 | static unw_rec_list * | |
e0c9811a | 2192 | output_epilogue (unsigned long ecount) |
800eeca4 | 2193 | { |
e0c9811a JW |
2194 | unw_rec_list *ptr = alloc_record (epilogue); |
2195 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2196 | return ptr; |
2197 | } | |
2198 | ||
2199 | static unw_rec_list * | |
e0c9811a | 2200 | output_label_state (unsigned long label) |
800eeca4 | 2201 | { |
e0c9811a JW |
2202 | unw_rec_list *ptr = alloc_record (label_state); |
2203 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2204 | return ptr; |
2205 | } | |
2206 | ||
2207 | static unw_rec_list * | |
e0c9811a JW |
2208 | output_copy_state (unsigned long label) |
2209 | { | |
2210 | unw_rec_list *ptr = alloc_record (copy_state); | |
2211 | ptr->r.record.b.label = label; | |
2212 | return ptr; | |
2213 | } | |
2214 | ||
2215 | static unw_rec_list * | |
5a49b8ac AM |
2216 | output_spill_psprel (unsigned int ab, |
2217 | unsigned int reg, | |
2218 | unsigned int offset, | |
2219 | unsigned int predicate) | |
800eeca4 | 2220 | { |
e4e8248d | 2221 | unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); |
e0c9811a | 2222 | ptr->r.record.x.ab = ab; |
800eeca4 | 2223 | ptr->r.record.x.reg = reg; |
ba825241 | 2224 | ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2225 | ptr->r.record.x.qp = predicate; |
2226 | return ptr; | |
2227 | } | |
2228 | ||
2229 | static unw_rec_list * | |
5a49b8ac AM |
2230 | output_spill_sprel (unsigned int ab, |
2231 | unsigned int reg, | |
2232 | unsigned int offset, | |
2233 | unsigned int predicate) | |
800eeca4 | 2234 | { |
e4e8248d | 2235 | unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); |
e0c9811a | 2236 | ptr->r.record.x.ab = ab; |
800eeca4 | 2237 | ptr->r.record.x.reg = reg; |
ba825241 | 2238 | ptr->r.record.x.where.spoff = offset / 4; |
800eeca4 JW |
2239 | ptr->r.record.x.qp = predicate; |
2240 | return ptr; | |
2241 | } | |
2242 | ||
2243 | static unw_rec_list * | |
5a49b8ac AM |
2244 | output_spill_reg (unsigned int ab, |
2245 | unsigned int reg, | |
2246 | unsigned int targ_reg, | |
2247 | unsigned int xy, | |
2248 | unsigned int predicate) | |
800eeca4 | 2249 | { |
e4e8248d | 2250 | unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); |
e0c9811a | 2251 | ptr->r.record.x.ab = ab; |
800eeca4 | 2252 | ptr->r.record.x.reg = reg; |
ba825241 | 2253 | ptr->r.record.x.where.reg = targ_reg; |
800eeca4 JW |
2254 | ptr->r.record.x.xy = xy; |
2255 | ptr->r.record.x.qp = predicate; | |
2256 | return ptr; | |
2257 | } | |
2258 | ||
197865e8 | 2259 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2260 | specified function. */ |
542d6675 | 2261 | |
800eeca4 | 2262 | static void |
5a49b8ac | 2263 | process_one_record (unw_rec_list *ptr, vbyte_func f) |
800eeca4 | 2264 | { |
ba825241 | 2265 | unsigned int fr_mask, gr_mask; |
e0c9811a | 2266 | |
197865e8 | 2267 | switch (ptr->r.type) |
800eeca4 | 2268 | { |
5738bc24 JW |
2269 | /* This is a dummy record that takes up no space in the output. */ |
2270 | case endp: | |
2271 | break; | |
2272 | ||
542d6675 KH |
2273 | case gr_mem: |
2274 | case fr_mem: | |
2275 | case br_mem: | |
2276 | case frgr_mem: | |
2277 | /* These are taken care of by prologue/prologue_gr. */ | |
2278 | break; | |
e0c9811a | 2279 | |
542d6675 KH |
2280 | case prologue_gr: |
2281 | case prologue: | |
2282 | if (ptr->r.type == prologue_gr) | |
2283 | output_R2_format (f, ptr->r.record.r.grmask, | |
2284 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2285 | else | |
800eeca4 | 2286 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2287 | |
2288 | /* Output descriptor(s) for union of register spills (if any). */ | |
2289 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2290 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2291 | if (fr_mask) | |
2292 | { | |
2293 | if ((fr_mask & ~0xfUL) == 0) | |
2294 | output_P6_format (f, fr_mem, fr_mask); | |
2295 | else | |
2296 | { | |
2297 | output_P5_format (f, gr_mask, fr_mask); | |
2298 | gr_mask = 0; | |
2299 | } | |
2300 | } | |
2301 | if (gr_mask) | |
2302 | output_P6_format (f, gr_mem, gr_mask); | |
2303 | if (ptr->r.record.r.mask.br_mem) | |
2304 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2305 | ||
2306 | /* output imask descriptor if necessary: */ | |
2307 | if (ptr->r.record.r.mask.i) | |
2308 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2309 | ptr->r.record.r.imask_size); | |
2310 | break; | |
2311 | ||
2312 | case body: | |
2313 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2314 | break; | |
2315 | case mem_stack_f: | |
2316 | case mem_stack_v: | |
2317 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2318 | ptr->r.record.p.size); | |
2319 | break; | |
2320 | case psp_gr: | |
2321 | case rp_gr: | |
2322 | case pfs_gr: | |
2323 | case preds_gr: | |
2324 | case unat_gr: | |
2325 | case lc_gr: | |
2326 | case fpsr_gr: | |
2327 | case priunat_gr: | |
2328 | case bsp_gr: | |
2329 | case bspstore_gr: | |
2330 | case rnat_gr: | |
ba825241 | 2331 | output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); |
542d6675 KH |
2332 | break; |
2333 | case rp_br: | |
ba825241 | 2334 | output_P3_format (f, rp_br, ptr->r.record.p.r.br); |
542d6675 KH |
2335 | break; |
2336 | case psp_sprel: | |
ba825241 | 2337 | output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); |
542d6675 KH |
2338 | break; |
2339 | case rp_when: | |
2340 | case pfs_when: | |
2341 | case preds_when: | |
2342 | case unat_when: | |
2343 | case lc_when: | |
2344 | case fpsr_when: | |
2345 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2346 | break; | |
2347 | case rp_psprel: | |
2348 | case pfs_psprel: | |
2349 | case preds_psprel: | |
2350 | case unat_psprel: | |
2351 | case lc_psprel: | |
2352 | case fpsr_psprel: | |
2353 | case spill_base: | |
ba825241 | 2354 | output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); |
542d6675 KH |
2355 | break; |
2356 | case rp_sprel: | |
2357 | case pfs_sprel: | |
2358 | case preds_sprel: | |
2359 | case unat_sprel: | |
2360 | case lc_sprel: | |
2361 | case fpsr_sprel: | |
2362 | case priunat_sprel: | |
2363 | case bsp_sprel: | |
2364 | case bspstore_sprel: | |
2365 | case rnat_sprel: | |
ba825241 | 2366 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); |
542d6675 KH |
2367 | break; |
2368 | case gr_gr: | |
ba825241 JB |
2369 | if (ptr->r.record.p.r.gr < REG_NUM) |
2370 | { | |
2371 | const unw_rec_list *cur = ptr; | |
2372 | ||
2373 | gr_mask = cur->r.record.p.grmask; | |
2374 | while ((cur = cur->r.record.p.next) != NULL) | |
2375 | gr_mask |= cur->r.record.p.grmask; | |
2376 | output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2377 | } | |
542d6675 KH |
2378 | break; |
2379 | case br_gr: | |
ba825241 JB |
2380 | if (ptr->r.record.p.r.gr < REG_NUM) |
2381 | { | |
2382 | const unw_rec_list *cur = ptr; | |
2383 | ||
2384 | gr_mask = cur->r.record.p.brmask; | |
2385 | while ((cur = cur->r.record.p.next) != NULL) | |
2386 | gr_mask |= cur->r.record.p.brmask; | |
2387 | output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2388 | } | |
542d6675 KH |
2389 | break; |
2390 | case spill_mask: | |
ad4b42b4 | 2391 | as_bad (_("spill_mask record unimplemented.")); |
542d6675 KH |
2392 | break; |
2393 | case priunat_when_gr: | |
2394 | case priunat_when_mem: | |
2395 | case bsp_when: | |
2396 | case bspstore_when: | |
2397 | case rnat_when: | |
2398 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2399 | break; | |
2400 | case priunat_psprel: | |
2401 | case bsp_psprel: | |
2402 | case bspstore_psprel: | |
2403 | case rnat_psprel: | |
ba825241 | 2404 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); |
542d6675 KH |
2405 | break; |
2406 | case unwabi: | |
2407 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2408 | break; | |
2409 | case epilogue: | |
2410 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2411 | break; | |
2412 | case label_state: | |
2413 | case copy_state: | |
2414 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2415 | break; | |
2416 | case spill_psprel: | |
2417 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2418 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2419 | ptr->r.record.x.where.pspoff); |
542d6675 KH |
2420 | break; |
2421 | case spill_sprel: | |
2422 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2423 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2424 | ptr->r.record.x.where.spoff); |
542d6675 KH |
2425 | break; |
2426 | case spill_reg: | |
2427 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2428 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
ba825241 | 2429 | ptr->r.record.x.where.reg, ptr->r.record.x.t); |
542d6675 KH |
2430 | break; |
2431 | case spill_psprel_p: | |
2432 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2433 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2434 | ptr->r.record.x.t, ptr->r.record.x.where.pspoff); |
542d6675 KH |
2435 | break; |
2436 | case spill_sprel_p: | |
2437 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2438 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2439 | ptr->r.record.x.t, ptr->r.record.x.where.spoff); |
542d6675 KH |
2440 | break; |
2441 | case spill_reg_p: | |
2442 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2443 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
ba825241 | 2444 | ptr->r.record.x.xy, ptr->r.record.x.where.reg, |
542d6675 KH |
2445 | ptr->r.record.x.t); |
2446 | break; | |
2447 | default: | |
ad4b42b4 | 2448 | as_bad (_("record_type_not_valid")); |
542d6675 | 2449 | break; |
800eeca4 JW |
2450 | } |
2451 | } | |
2452 | ||
197865e8 | 2453 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2454 | the specified function. */ |
2455 | static void | |
5a49b8ac | 2456 | process_unw_records (unw_rec_list *list, vbyte_func f) |
800eeca4 JW |
2457 | { |
2458 | unw_rec_list *ptr; | |
2459 | for (ptr = list; ptr; ptr = ptr->next) | |
2460 | process_one_record (ptr, f); | |
2461 | } | |
2462 | ||
2463 | /* Determine the size of a record list in bytes. */ | |
2464 | static int | |
5a49b8ac | 2465 | calc_record_size (unw_rec_list *list) |
800eeca4 JW |
2466 | { |
2467 | vbyte_count = 0; | |
2468 | process_unw_records (list, count_output); | |
2469 | return vbyte_count; | |
2470 | } | |
2471 | ||
e4e8248d JB |
2472 | /* Return the number of bits set in the input value. |
2473 | Perhaps this has a better place... */ | |
2474 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) | |
2475 | # define popcount __builtin_popcount | |
2476 | #else | |
2477 | static int | |
2478 | popcount (unsigned x) | |
2479 | { | |
2480 | static const unsigned char popcnt[16] = | |
2481 | { | |
2482 | 0, 1, 1, 2, | |
2483 | 1, 2, 2, 3, | |
2484 | 1, 2, 2, 3, | |
2485 | 2, 3, 3, 4 | |
2486 | }; | |
2487 | ||
2488 | if (x < NELEMS (popcnt)) | |
2489 | return popcnt[x]; | |
2490 | return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); | |
2491 | } | |
2492 | #endif | |
2493 | ||
e0c9811a JW |
2494 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2495 | of type TYPE are saved starting at instruction with index T. If N | |
2496 | bits are set in REGMASK, it is assumed that instructions T through | |
2497 | T+N-1 save these registers. | |
2498 | ||
2499 | TYPE values: | |
2500 | 0: no save | |
2501 | 1: instruction saves next fp reg | |
2502 | 2: instruction saves next general reg | |
2503 | 3: instruction saves next branch reg */ | |
2504 | static void | |
5a49b8ac AM |
2505 | set_imask (unw_rec_list *region, |
2506 | unsigned long regmask, | |
2507 | unsigned long t, | |
2508 | unsigned int type) | |
e0c9811a JW |
2509 | { |
2510 | unsigned char *imask; | |
2511 | unsigned long imask_size; | |
2512 | unsigned int i; | |
2513 | int pos; | |
2514 | ||
2515 | imask = region->r.record.r.mask.i; | |
2516 | imask_size = region->r.record.r.imask_size; | |
2517 | if (!imask) | |
2518 | { | |
542d6675 | 2519 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2520 | imask = xmalloc (imask_size); |
2521 | memset (imask, 0, imask_size); | |
2522 | ||
2523 | region->r.record.r.imask_size = imask_size; | |
2524 | region->r.record.r.mask.i = imask; | |
2525 | } | |
2526 | ||
542d6675 KH |
2527 | i = (t / 4) + 1; |
2528 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2529 | while (regmask) |
2530 | { | |
2531 | if (i >= imask_size) | |
2532 | { | |
ad4b42b4 | 2533 | as_bad (_("Ignoring attempt to spill beyond end of region")); |
e0c9811a JW |
2534 | return; |
2535 | } | |
2536 | ||
2537 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2538 | |
e0c9811a JW |
2539 | regmask &= (regmask - 1); |
2540 | pos -= 2; | |
2541 | if (pos < 0) | |
2542 | { | |
2543 | pos = 0; | |
2544 | ++i; | |
2545 | } | |
2546 | } | |
2547 | } | |
2548 | ||
f5a30c2e JW |
2549 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2550 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2551 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2552 | for frag sizes. */ | |
f5a30c2e | 2553 | |
5a49b8ac AM |
2554 | static unsigned long |
2555 | slot_index (unsigned long slot_addr, | |
2556 | fragS *slot_frag, | |
2557 | unsigned long first_addr, | |
2558 | fragS *first_frag, | |
2559 | int before_relax) | |
e0c9811a | 2560 | { |
91d6fa6a | 2561 | unsigned long s_index = 0; |
f5a30c2e JW |
2562 | |
2563 | /* First time we are called, the initial address and frag are invalid. */ | |
2564 | if (first_addr == 0) | |
2565 | return 0; | |
2566 | ||
2567 | /* If the two addresses are in different frags, then we need to add in | |
2568 | the remaining size of this frag, and then the entire size of intermediate | |
2569 | frags. */ | |
4dddc1d1 | 2570 | while (slot_frag != first_frag) |
f5a30c2e JW |
2571 | { |
2572 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2573 | ||
b5e0fabd | 2574 | if (! before_relax) |
73f20958 | 2575 | { |
b5e0fabd JW |
2576 | /* We can get the final addresses only during and after |
2577 | relaxation. */ | |
73f20958 | 2578 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
91d6fa6a | 2579 | s_index += 3 * ((first_frag->fr_next->fr_address |
73f20958 L |
2580 | - first_frag->fr_address |
2581 | - first_frag->fr_fix) >> 4); | |
2582 | } | |
2583 | else | |
2584 | /* We don't know what the final addresses will be. We try our | |
2585 | best to estimate. */ | |
2586 | switch (first_frag->fr_type) | |
2587 | { | |
2588 | default: | |
2589 | break; | |
2590 | ||
2591 | case rs_space: | |
ad4b42b4 | 2592 | as_fatal (_("Only constant space allocation is supported")); |
73f20958 L |
2593 | break; |
2594 | ||
2595 | case rs_align: | |
2596 | case rs_align_code: | |
2597 | case rs_align_test: | |
2598 | /* Take alignment into account. Assume the worst case | |
2599 | before relaxation. */ | |
91d6fa6a | 2600 | s_index += 3 * ((1 << first_frag->fr_offset) >> 4); |
73f20958 L |
2601 | break; |
2602 | ||
2603 | case rs_org: | |
2604 | if (first_frag->fr_symbol) | |
2605 | { | |
ad4b42b4 | 2606 | as_fatal (_("Only constant offsets are supported")); |
73f20958 L |
2607 | break; |
2608 | } | |
2609 | case rs_fill: | |
91d6fa6a | 2610 | s_index += 3 * (first_frag->fr_offset >> 4); |
73f20958 L |
2611 | break; |
2612 | } | |
2613 | ||
f5a30c2e | 2614 | /* Add in the full size of the frag converted to instruction slots. */ |
91d6fa6a | 2615 | s_index += 3 * (first_frag->fr_fix >> 4); |
f5a30c2e | 2616 | /* Subtract away the initial part before first_addr. */ |
91d6fa6a | 2617 | s_index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) |
f5a30c2e | 2618 | + ((first_addr & 0x3) - (start_addr & 0x3))); |
e0c9811a | 2619 | |
f5a30c2e JW |
2620 | /* Move to the beginning of the next frag. */ |
2621 | first_frag = first_frag->fr_next; | |
2622 | first_addr = (unsigned long) &first_frag->fr_literal; | |
4dddc1d1 JW |
2623 | |
2624 | /* This can happen if there is section switching in the middle of a | |
cb3b8d91 JW |
2625 | function, causing the frag chain for the function to be broken. |
2626 | It is too difficult to recover safely from this problem, so we just | |
2627 | exit with an error. */ | |
4dddc1d1 | 2628 | if (first_frag == NULL) |
ad4b42b4 | 2629 | as_fatal (_("Section switching in code is not supported.")); |
f5a30c2e JW |
2630 | } |
2631 | ||
2632 | /* Add in the used part of the last frag. */ | |
91d6fa6a | 2633 | s_index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) |
f5a30c2e | 2634 | + ((slot_addr & 0x3) - (first_addr & 0x3))); |
91d6fa6a | 2635 | return s_index; |
f5a30c2e | 2636 | } |
4a1805b1 | 2637 | |
91a2ae2a RH |
2638 | /* Optimize unwind record directives. */ |
2639 | ||
2640 | static unw_rec_list * | |
5a49b8ac | 2641 | optimize_unw_records (unw_rec_list *list) |
91a2ae2a RH |
2642 | { |
2643 | if (!list) | |
2644 | return NULL; | |
2645 | ||
2646 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2647 | by ".body", then we can optimize the unwind directives away. */ | |
2648 | if (list->r.type == prologue | |
5738bc24 JW |
2649 | && (list->next->r.type == endp |
2650 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2651 | return NULL; |
2652 | ||
2653 | return list; | |
2654 | } | |
2655 | ||
800eeca4 JW |
2656 | /* Given a complete record list, process any records which have |
2657 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2658 | this has been run, all necessary information should be available |
800eeca4 | 2659 | within each record to generate an image. */ |
542d6675 | 2660 | |
800eeca4 | 2661 | static void |
5a49b8ac | 2662 | fixup_unw_records (unw_rec_list *list, int before_relax) |
800eeca4 | 2663 | { |
e0c9811a JW |
2664 | unw_rec_list *ptr, *region = 0; |
2665 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2666 | fragS *first_frag = 0; |
e0c9811a | 2667 | |
800eeca4 JW |
2668 | for (ptr = list; ptr; ptr = ptr->next) |
2669 | { | |
2670 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
ad4b42b4 | 2671 | as_bad (_(" Insn slot not set in unwind record.")); |
f5a30c2e | 2672 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2673 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2674 | switch (ptr->r.type) |
2675 | { | |
542d6675 KH |
2676 | case prologue: |
2677 | case prologue_gr: | |
2678 | case body: | |
2679 | { | |
2680 | unw_rec_list *last; | |
5738bc24 JW |
2681 | int size; |
2682 | unsigned long last_addr = 0; | |
2683 | fragS *last_frag = NULL; | |
542d6675 KH |
2684 | |
2685 | first_addr = ptr->slot_number; | |
f5a30c2e | 2686 | first_frag = ptr->slot_frag; |
542d6675 | 2687 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2688 | the function, and determine the size of the region. */ |
542d6675 KH |
2689 | for (last = ptr->next; last != NULL; last = last->next) |
2690 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2691 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2692 | { |
2693 | last_addr = last->slot_number; | |
f5a30c2e | 2694 | last_frag = last->slot_frag; |
542d6675 KH |
2695 | break; |
2696 | } | |
b5e0fabd JW |
2697 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2698 | before_relax); | |
542d6675 | 2699 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2700 | if (ptr->r.type == body) |
2701 | /* End of region. */ | |
2702 | region = 0; | |
2703 | else | |
2704 | region = ptr; | |
e0c9811a | 2705 | break; |
542d6675 KH |
2706 | } |
2707 | case epilogue: | |
ed7af9f9 L |
2708 | if (t < rlen) |
2709 | ptr->r.record.b.t = rlen - 1 - t; | |
2710 | else | |
2711 | /* This happens when a memory-stack-less procedure uses a | |
2712 | ".restore sp" directive at the end of a region to pop | |
2713 | the frame state. */ | |
2714 | ptr->r.record.b.t = 0; | |
542d6675 | 2715 | break; |
e0c9811a | 2716 | |
542d6675 KH |
2717 | case mem_stack_f: |
2718 | case mem_stack_v: | |
2719 | case rp_when: | |
2720 | case pfs_when: | |
2721 | case preds_when: | |
2722 | case unat_when: | |
2723 | case lc_when: | |
2724 | case fpsr_when: | |
2725 | case priunat_when_gr: | |
2726 | case priunat_when_mem: | |
2727 | case bsp_when: | |
2728 | case bspstore_when: | |
2729 | case rnat_when: | |
2730 | ptr->r.record.p.t = t; | |
2731 | break; | |
e0c9811a | 2732 | |
542d6675 KH |
2733 | case spill_reg: |
2734 | case spill_sprel: | |
2735 | case spill_psprel: | |
2736 | case spill_reg_p: | |
2737 | case spill_sprel_p: | |
2738 | case spill_psprel_p: | |
2739 | ptr->r.record.x.t = t; | |
2740 | break; | |
e0c9811a | 2741 | |
542d6675 KH |
2742 | case frgr_mem: |
2743 | if (!region) | |
2744 | { | |
ad4b42b4 | 2745 | as_bad (_("frgr_mem record before region record!")); |
542d6675 KH |
2746 | return; |
2747 | } | |
2748 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2749 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2750 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2751 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2752 | break; | |
2753 | case fr_mem: | |
2754 | if (!region) | |
2755 | { | |
ad4b42b4 | 2756 | as_bad (_("fr_mem record before region record!")); |
542d6675 KH |
2757 | return; |
2758 | } | |
ba825241 JB |
2759 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; |
2760 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
542d6675 KH |
2761 | break; |
2762 | case gr_mem: | |
2763 | if (!region) | |
2764 | { | |
ad4b42b4 | 2765 | as_bad (_("gr_mem record before region record!")); |
542d6675 KH |
2766 | return; |
2767 | } | |
ba825241 JB |
2768 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; |
2769 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
542d6675 KH |
2770 | break; |
2771 | case br_mem: | |
2772 | if (!region) | |
2773 | { | |
ad4b42b4 | 2774 | as_bad (_("br_mem record before region record!")); |
542d6675 KH |
2775 | return; |
2776 | } | |
2777 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2778 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2779 | break; | |
e0c9811a | 2780 | |
542d6675 KH |
2781 | case gr_gr: |
2782 | if (!region) | |
2783 | { | |
ad4b42b4 | 2784 | as_bad (_("gr_gr record before region record!")); |
542d6675 KH |
2785 | return; |
2786 | } | |
2787 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2788 | break; | |
2789 | case br_gr: | |
2790 | if (!region) | |
2791 | { | |
ad4b42b4 | 2792 | as_bad (_("br_gr record before region record!")); |
542d6675 KH |
2793 | return; |
2794 | } | |
2795 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2796 | break; | |
e0c9811a | 2797 | |
542d6675 KH |
2798 | default: |
2799 | break; | |
800eeca4 JW |
2800 | } |
2801 | } | |
2802 | } | |
2803 | ||
b5e0fabd JW |
2804 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2805 | to handle here, which is the unwind info frag. */ | |
2806 | ||
2807 | int | |
2808 | ia64_estimate_size_before_relax (fragS *frag, | |
2809 | asection *segtype ATTRIBUTE_UNUSED) | |
2810 | { | |
2811 | unw_rec_list *list; | |
2812 | int len, size, pad; | |
2813 | ||
2814 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2815 | list = (unw_rec_list *) frag->fr_opcode; | |
2816 | fixup_unw_records (list, 0); | |
2817 | ||
2818 | len = calc_record_size (list); | |
2819 | /* pad to pointer-size boundary. */ | |
2820 | pad = len % md.pointer_size; | |
2821 | if (pad != 0) | |
2822 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2823 | /* Add 8 for the header. */ |
2824 | size = len + 8; | |
2825 | /* Add a pointer for the personality offset. */ | |
2826 | if (frag->fr_offset) | |
2827 | size += md.pointer_size; | |
b5e0fabd JW |
2828 | |
2829 | /* fr_var carries the max_chars that we created the fragment with. | |
2830 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2831 | gas_assert (frag->fr_var >= size); |
b5e0fabd JW |
2832 | |
2833 | return frag->fr_fix + size; | |
2834 | } | |
2835 | ||
73f20958 L |
2836 | /* This function converts a rs_machine_dependent variant frag into a |
2837 | normal fill frag with the unwind image from the the record list. */ | |
2838 | void | |
2839 | ia64_convert_frag (fragS *frag) | |
557debba | 2840 | { |
73f20958 L |
2841 | unw_rec_list *list; |
2842 | int len, size, pad; | |
1cd8ff38 | 2843 | valueT flag_value; |
557debba | 2844 | |
b5e0fabd | 2845 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2846 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2847 | fixup_unw_records (list, 0); |
1cd8ff38 | 2848 | |
73f20958 L |
2849 | len = calc_record_size (list); |
2850 | /* pad to pointer-size boundary. */ | |
2851 | pad = len % md.pointer_size; | |
2852 | if (pad != 0) | |
2853 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2854 | /* Add 8 for the header. */ |
2855 | size = len + 8; | |
2856 | /* Add a pointer for the personality offset. */ | |
2857 | if (frag->fr_offset) | |
2858 | size += md.pointer_size; | |
73f20958 L |
2859 | |
2860 | /* fr_var carries the max_chars that we created the fragment with. | |
2861 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2862 | gas_assert (frag->fr_var >= size); |
73f20958 L |
2863 | |
2864 | /* Initialize the header area. fr_offset is initialized with | |
2865 | unwind.personality_routine. */ | |
2866 | if (frag->fr_offset) | |
1cd8ff38 NC |
2867 | { |
2868 | if (md.flags & EF_IA_64_ABI64) | |
2869 | flag_value = (bfd_vma) 3 << 32; | |
2870 | else | |
2871 | /* 32-bit unwind info block. */ | |
2872 | flag_value = (bfd_vma) 0x1003 << 32; | |
2873 | } | |
2874 | else | |
2875 | flag_value = 0; | |
557debba | 2876 | |
73f20958 L |
2877 | md_number_to_chars (frag->fr_literal, |
2878 | (((bfd_vma) 1 << 48) /* Version. */ | |
2879 | | flag_value /* U & E handler flags. */ | |
2880 | | (len / md.pointer_size)), /* Length. */ | |
2881 | 8); | |
557debba | 2882 | |
73f20958 L |
2883 | /* Skip the header. */ |
2884 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2885 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2886 | |
2887 | /* Fill the padding bytes with zeros. */ | |
2888 | if (pad != 0) | |
2889 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2890 | md.pointer_size - pad); | |
417c21b7 AO |
2891 | /* Fill the unwind personality with zeros. */ |
2892 | if (frag->fr_offset) | |
2893 | md_number_to_chars (frag->fr_literal + size - md.pointer_size, 0, | |
2894 | md.pointer_size); | |
d6e78c11 | 2895 | |
73f20958 L |
2896 | frag->fr_fix += size; |
2897 | frag->fr_type = rs_fill; | |
2898 | frag->fr_var = 0; | |
2899 | frag->fr_offset = 0; | |
800eeca4 JW |
2900 | } |
2901 | ||
e0c9811a | 2902 | static int |
5a49b8ac | 2903 | parse_predicate_and_operand (expressionS *e, unsigned *qp, const char *po) |
e4e8248d | 2904 | { |
cd42ff9c | 2905 | int sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
2906 | |
2907 | *qp = e->X_add_number - REG_P; | |
2908 | if (e->X_op != O_register || *qp > 63) | |
2909 | { | |
ad4b42b4 | 2910 | as_bad (_("First operand to .%s must be a predicate"), po); |
e4e8248d JB |
2911 | *qp = 0; |
2912 | } | |
2913 | else if (*qp == 0) | |
ad4b42b4 | 2914 | as_warn (_("Pointless use of p0 as first operand to .%s"), po); |
e4e8248d | 2915 | if (sep == ',') |
cd42ff9c | 2916 | sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
2917 | else |
2918 | e->X_op = O_absent; | |
2919 | return sep; | |
2920 | } | |
2921 | ||
2922 | static void | |
5a49b8ac AM |
2923 | convert_expr_to_ab_reg (const expressionS *e, |
2924 | unsigned int *ab, | |
2925 | unsigned int *regp, | |
2926 | const char *po, | |
2927 | int n) | |
e0c9811a | 2928 | { |
e4e8248d JB |
2929 | unsigned int reg = e->X_add_number; |
2930 | ||
2931 | *ab = *regp = 0; /* Anything valid is good here. */ | |
e0c9811a JW |
2932 | |
2933 | if (e->X_op != O_register) | |
e4e8248d | 2934 | reg = REG_GR; /* Anything invalid is good here. */ |
e0c9811a | 2935 | |
2434f565 | 2936 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2937 | { |
2938 | *ab = 0; | |
2939 | *regp = reg - REG_GR; | |
2940 | } | |
2434f565 JW |
2941 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2942 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2943 | { |
2944 | *ab = 1; | |
2945 | *regp = reg - REG_FR; | |
2946 | } | |
2434f565 | 2947 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2948 | { |
2949 | *ab = 2; | |
2950 | *regp = reg - REG_BR; | |
2951 | } | |
2952 | else | |
2953 | { | |
2954 | *ab = 3; | |
2955 | switch (reg) | |
2956 | { | |
2957 | case REG_PR: *regp = 0; break; | |
2958 | case REG_PSP: *regp = 1; break; | |
2959 | case REG_PRIUNAT: *regp = 2; break; | |
2960 | case REG_BR + 0: *regp = 3; break; | |
2961 | case REG_AR + AR_BSP: *regp = 4; break; | |
2962 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2963 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2964 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2965 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2966 | case REG_AR + AR_PFS: *regp = 9; break; | |
2967 | case REG_AR + AR_LC: *regp = 10; break; | |
2968 | ||
2969 | default: | |
ad4b42b4 | 2970 | as_bad (_("Operand %d to .%s must be a preserved register"), n, po); |
e4e8248d | 2971 | break; |
e0c9811a JW |
2972 | } |
2973 | } | |
197865e8 | 2974 | } |
e0c9811a | 2975 | |
e4e8248d | 2976 | static void |
5a49b8ac AM |
2977 | convert_expr_to_xy_reg (const expressionS *e, |
2978 | unsigned int *xy, | |
2979 | unsigned int *regp, | |
2980 | const char *po, | |
2981 | int n) | |
e0c9811a | 2982 | { |
e4e8248d | 2983 | unsigned int reg = e->X_add_number; |
e0c9811a | 2984 | |
e4e8248d | 2985 | *xy = *regp = 0; /* Anything valid is good here. */ |
e0c9811a | 2986 | |
e4e8248d JB |
2987 | if (e->X_op != O_register) |
2988 | reg = REG_GR; /* Anything invalid is good here. */ | |
e0c9811a | 2989 | |
e4e8248d | 2990 | if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) |
e0c9811a JW |
2991 | { |
2992 | *xy = 0; | |
2993 | *regp = reg - REG_GR; | |
2994 | } | |
e4e8248d | 2995 | else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) |
e0c9811a JW |
2996 | { |
2997 | *xy = 1; | |
2998 | *regp = reg - REG_FR; | |
2999 | } | |
2434f565 | 3000 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3001 | { |
3002 | *xy = 2; | |
3003 | *regp = reg - REG_BR; | |
3004 | } | |
3005 | else | |
ad4b42b4 | 3006 | as_bad (_("Operand %d to .%s must be a writable register"), n, po); |
197865e8 | 3007 | } |
e0c9811a | 3008 | |
d9201763 L |
3009 | static void |
3010 | dot_align (int arg) | |
3011 | { | |
3012 | /* The current frag is an alignment frag. */ | |
3013 | align_frag = frag_now; | |
3014 | s_align_bytes (arg); | |
3015 | } | |
3016 | ||
800eeca4 | 3017 | static void |
5a49b8ac | 3018 | dot_radix (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3019 | { |
fa30c84f JB |
3020 | char *radix; |
3021 | int ch; | |
800eeca4 JW |
3022 | |
3023 | SKIP_WHITESPACE (); | |
800eeca4 | 3024 | |
fa30c84f JB |
3025 | if (is_it_end_of_statement ()) |
3026 | return; | |
3027 | radix = input_line_pointer; | |
3028 | ch = get_symbol_end (); | |
3029 | ia64_canonicalize_symbol_name (radix); | |
3030 | if (strcasecmp (radix, "C")) | |
ad4b42b4 | 3031 | as_bad (_("Radix `%s' unsupported or invalid"), radix); |
fa30c84f JB |
3032 | *input_line_pointer = ch; |
3033 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3034 | } |
3035 | ||
196e8040 JW |
3036 | /* Helper function for .loc directives. If the assembler is not generating |
3037 | line number info, then we need to remember which instructions have a .loc | |
3038 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3039 | ||
3040 | static void | |
3041 | dot_loc (int x) | |
3042 | { | |
3043 | CURR_SLOT.loc_directive_seen = 1; | |
3044 | dwarf2_directive_loc (x); | |
3045 | } | |
3046 | ||
800eeca4 JW |
3047 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3048 | static void | |
5a49b8ac | 3049 | dot_special_section (int which) |
800eeca4 JW |
3050 | { |
3051 | set_section ((char *) special_section_name[which]); | |
3052 | } | |
3053 | ||
07450571 L |
3054 | /* Return -1 for warning and 0 for error. */ |
3055 | ||
3056 | static int | |
970d6792 L |
3057 | unwind_diagnostic (const char * region, const char *directive) |
3058 | { | |
3059 | if (md.unwind_check == unwind_check_warning) | |
07450571 | 3060 | { |
ad4b42b4 | 3061 | as_warn (_(".%s outside of %s"), directive, region); |
07450571 L |
3062 | return -1; |
3063 | } | |
970d6792 L |
3064 | else |
3065 | { | |
ad4b42b4 | 3066 | as_bad (_(".%s outside of %s"), directive, region); |
970d6792 | 3067 | ignore_rest_of_line (); |
07450571 | 3068 | return 0; |
970d6792 L |
3069 | } |
3070 | } | |
3071 | ||
07450571 L |
3072 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3073 | a procedure but the unwind directive check is set to warning, 0 if | |
3074 | a directive isn't in a procedure and the unwind directive check is set | |
3075 | to error. */ | |
3076 | ||
75e09913 JB |
3077 | static int |
3078 | in_procedure (const char *directive) | |
3079 | { | |
5656b6b8 | 3080 | if (unwind.proc_pending.sym |
75e09913 JB |
3081 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3082 | return 1; | |
07450571 | 3083 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3084 | } |
3085 | ||
07450571 L |
3086 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3087 | a prologue but the unwind directive check is set to warning, 0 if | |
3088 | a directive isn't in a prologue and the unwind directive check is set | |
3089 | to error. */ | |
3090 | ||
75e09913 JB |
3091 | static int |
3092 | in_prologue (const char *directive) | |
3093 | { | |
07450571 | 3094 | int in = in_procedure (directive); |
ba825241 JB |
3095 | |
3096 | if (in > 0 && !unwind.prologue) | |
3097 | in = unwind_diagnostic ("prologue", directive); | |
3098 | check_pending_save (); | |
3099 | return in; | |
75e09913 JB |
3100 | } |
3101 | ||
07450571 L |
3102 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3103 | a body but the unwind directive check is set to warning, 0 if | |
3104 | a directive isn't in a body and the unwind directive check is set | |
3105 | to error. */ | |
3106 | ||
75e09913 JB |
3107 | static int |
3108 | in_body (const char *directive) | |
3109 | { | |
07450571 | 3110 | int in = in_procedure (directive); |
ba825241 JB |
3111 | |
3112 | if (in > 0 && !unwind.body) | |
3113 | in = unwind_diagnostic ("body region", directive); | |
3114 | return in; | |
75e09913 JB |
3115 | } |
3116 | ||
800eeca4 | 3117 | static void |
5a49b8ac | 3118 | add_unwind_entry (unw_rec_list *ptr, int sep) |
800eeca4 | 3119 | { |
e4e8248d JB |
3120 | if (ptr) |
3121 | { | |
3122 | if (unwind.tail) | |
3123 | unwind.tail->next = ptr; | |
3124 | else | |
3125 | unwind.list = ptr; | |
3126 | unwind.tail = ptr; | |
3127 | ||
3128 | /* The current entry can in fact be a chain of unwind entries. */ | |
3129 | if (unwind.current_entry == NULL) | |
3130 | unwind.current_entry = ptr; | |
3131 | } | |
800eeca4 JW |
3132 | |
3133 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3134 | if (unwind.current_entry == NULL) |
3135 | unwind.current_entry = ptr; | |
e4e8248d JB |
3136 | |
3137 | if (sep == ',') | |
3138 | { | |
3139 | /* Parse a tag permitted for the current directive. */ | |
3140 | int ch; | |
3141 | ||
3142 | SKIP_WHITESPACE (); | |
3143 | ch = get_symbol_end (); | |
3144 | /* FIXME: For now, just issue a warning that this isn't implemented. */ | |
3145 | { | |
3146 | static int warned; | |
3147 | ||
3148 | if (!warned) | |
3149 | { | |
3150 | warned = 1; | |
ad4b42b4 | 3151 | as_warn (_("Tags on unwind pseudo-ops aren't supported, yet")); |
e4e8248d JB |
3152 | } |
3153 | } | |
3154 | *input_line_pointer = ch; | |
3155 | } | |
3156 | if (sep != NOT_A_CHAR) | |
3157 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3158 | } |
3159 | ||
197865e8 | 3160 | static void |
5a49b8ac | 3161 | dot_fframe (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3162 | { |
3163 | expressionS e; | |
e4e8248d | 3164 | int sep; |
e0c9811a | 3165 | |
75e09913 JB |
3166 | if (!in_prologue ("fframe")) |
3167 | return; | |
3168 | ||
cd42ff9c | 3169 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3170 | |
800eeca4 | 3171 | if (e.X_op != O_constant) |
e4e8248d | 3172 | { |
ad4b42b4 | 3173 | as_bad (_("First operand to .fframe must be a constant")); |
e4e8248d JB |
3174 | e.X_add_number = 0; |
3175 | } | |
3176 | add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); | |
e0c9811a JW |
3177 | } |
3178 | ||
197865e8 | 3179 | static void |
5a49b8ac | 3180 | dot_vframe (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
3181 | { |
3182 | expressionS e; | |
3183 | unsigned reg; | |
e4e8248d | 3184 | int sep; |
e0c9811a | 3185 | |
75e09913 JB |
3186 | if (!in_prologue ("vframe")) |
3187 | return; | |
3188 | ||
cd42ff9c | 3189 | sep = parse_operand_and_eval (&e, ','); |
e0c9811a | 3190 | reg = e.X_add_number - REG_GR; |
e4e8248d | 3191 | if (e.X_op != O_register || reg > 127) |
800eeca4 | 3192 | { |
ad4b42b4 | 3193 | as_bad (_("First operand to .vframe must be a general register")); |
e4e8248d | 3194 | reg = 0; |
800eeca4 | 3195 | } |
e4e8248d JB |
3196 | add_unwind_entry (output_mem_stack_v (), sep); |
3197 | if (! (unwind.prologue_mask & 2)) | |
3198 | add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); | |
3199 | else if (reg != unwind.prologue_gr | |
3200 | + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) | |
ad4b42b4 | 3201 | as_warn (_("Operand of .vframe contradicts .prologue")); |
800eeca4 JW |
3202 | } |
3203 | ||
197865e8 | 3204 | static void |
5a49b8ac | 3205 | dot_vframesp (int psp) |
800eeca4 | 3206 | { |
e0c9811a | 3207 | expressionS e; |
e4e8248d | 3208 | int sep; |
e0c9811a | 3209 | |
e4e8248d | 3210 | if (psp) |
ad4b42b4 | 3211 | as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant")); |
e0c9811a | 3212 | |
e4e8248d | 3213 | if (!in_prologue ("vframesp")) |
75e09913 JB |
3214 | return; |
3215 | ||
cd42ff9c | 3216 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3217 | if (e.X_op != O_constant) |
e0c9811a | 3218 | { |
ad4b42b4 | 3219 | as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)")); |
e4e8248d | 3220 | e.X_add_number = 0; |
e0c9811a | 3221 | } |
e4e8248d JB |
3222 | add_unwind_entry (output_mem_stack_v (), sep); |
3223 | add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); | |
800eeca4 JW |
3224 | } |
3225 | ||
197865e8 | 3226 | static void |
5a49b8ac | 3227 | dot_save (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3228 | { |
3229 | expressionS e1, e2; | |
e4e8248d | 3230 | unsigned reg1, reg2; |
800eeca4 | 3231 | int sep; |
800eeca4 | 3232 | |
75e09913 JB |
3233 | if (!in_prologue ("save")) |
3234 | return; | |
3235 | ||
cd42ff9c | 3236 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3237 | if (sep == ',') |
cd42ff9c | 3238 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3239 | else |
3240 | e2.X_op = O_absent; | |
800eeca4 | 3241 | |
e0c9811a | 3242 | reg1 = e1.X_add_number; |
800eeca4 | 3243 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3244 | if (e1.X_op != O_register) |
800eeca4 | 3245 | { |
ad4b42b4 | 3246 | as_bad (_("First operand to .save not a register")); |
e4e8248d JB |
3247 | reg1 = REG_PR; /* Anything valid is good here. */ |
3248 | } | |
3249 | reg2 = e2.X_add_number - REG_GR; | |
3250 | if (e2.X_op != O_register || reg2 > 127) | |
3251 | { | |
ad4b42b4 | 3252 | as_bad (_("Second operand to .save not a valid register")); |
e4e8248d JB |
3253 | reg2 = 0; |
3254 | } | |
3255 | switch (reg1) | |
3256 | { | |
3257 | case REG_AR + AR_BSP: | |
3258 | add_unwind_entry (output_bsp_when (), sep); | |
3259 | add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); | |
3260 | break; | |
3261 | case REG_AR + AR_BSPSTORE: | |
3262 | add_unwind_entry (output_bspstore_when (), sep); | |
3263 | add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); | |
3264 | break; | |
3265 | case REG_AR + AR_RNAT: | |
3266 | add_unwind_entry (output_rnat_when (), sep); | |
3267 | add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); | |
3268 | break; | |
3269 | case REG_AR + AR_UNAT: | |
3270 | add_unwind_entry (output_unat_when (), sep); | |
3271 | add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); | |
3272 | break; | |
3273 | case REG_AR + AR_FPSR: | |
3274 | add_unwind_entry (output_fpsr_when (), sep); | |
3275 | add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); | |
3276 | break; | |
3277 | case REG_AR + AR_PFS: | |
3278 | add_unwind_entry (output_pfs_when (), sep); | |
3279 | if (! (unwind.prologue_mask & 4)) | |
3280 | add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); | |
3281 | else if (reg2 != unwind.prologue_gr | |
3282 | + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) | |
ad4b42b4 | 3283 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3284 | break; |
3285 | case REG_AR + AR_LC: | |
3286 | add_unwind_entry (output_lc_when (), sep); | |
3287 | add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); | |
3288 | break; | |
3289 | case REG_BR: | |
3290 | add_unwind_entry (output_rp_when (), sep); | |
3291 | if (! (unwind.prologue_mask & 8)) | |
3292 | add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); | |
3293 | else if (reg2 != unwind.prologue_gr) | |
ad4b42b4 | 3294 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3295 | break; |
3296 | case REG_PR: | |
3297 | add_unwind_entry (output_preds_when (), sep); | |
3298 | if (! (unwind.prologue_mask & 1)) | |
3299 | add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); | |
3300 | else if (reg2 != unwind.prologue_gr | |
3301 | + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) | |
ad4b42b4 | 3302 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3303 | break; |
3304 | case REG_PRIUNAT: | |
3305 | add_unwind_entry (output_priunat_when_gr (), sep); | |
3306 | add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); | |
3307 | break; | |
3308 | default: | |
ad4b42b4 | 3309 | as_bad (_("First operand to .save not a valid register")); |
e4e8248d JB |
3310 | add_unwind_entry (NULL, sep); |
3311 | break; | |
800eeca4 | 3312 | } |
800eeca4 JW |
3313 | } |
3314 | ||
197865e8 | 3315 | static void |
5a49b8ac | 3316 | dot_restore (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3317 | { |
e4e8248d | 3318 | expressionS e1; |
33d01f33 | 3319 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3320 | int sep; |
3321 | ||
75e09913 JB |
3322 | if (!in_body ("restore")) |
3323 | return; | |
3324 | ||
cd42ff9c | 3325 | sep = parse_operand_and_eval (&e1, ','); |
e0c9811a | 3326 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) |
ad4b42b4 | 3327 | as_bad (_("First operand to .restore must be stack pointer (sp)")); |
e0c9811a JW |
3328 | |
3329 | if (sep == ',') | |
3330 | { | |
e4e8248d JB |
3331 | expressionS e2; |
3332 | ||
cd42ff9c | 3333 | sep = parse_operand_and_eval (&e2, ','); |
33d01f33 | 3334 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3335 | { |
ad4b42b4 | 3336 | as_bad (_("Second operand to .restore must be a constant >= 0")); |
e4e8248d | 3337 | e2.X_add_number = 0; |
e0c9811a | 3338 | } |
33d01f33 | 3339 | ecount = e2.X_add_number; |
e0c9811a | 3340 | } |
33d01f33 JW |
3341 | else |
3342 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3343 | |
3344 | if (ecount >= unwind.prologue_count) | |
3345 | { | |
ad4b42b4 | 3346 | as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"), |
6290819d | 3347 | ecount + 1, unwind.prologue_count); |
e4e8248d | 3348 | ecount = 0; |
6290819d NC |
3349 | } |
3350 | ||
e4e8248d | 3351 | add_unwind_entry (output_epilogue (ecount), sep); |
33d01f33 JW |
3352 | |
3353 | if (ecount < unwind.prologue_count) | |
3354 | unwind.prologue_count -= ecount + 1; | |
3355 | else | |
3356 | unwind.prologue_count = 0; | |
e0c9811a JW |
3357 | } |
3358 | ||
197865e8 | 3359 | static void |
5a49b8ac | 3360 | dot_restorereg (int pred) |
e0c9811a JW |
3361 | { |
3362 | unsigned int qp, ab, reg; | |
e4e8248d | 3363 | expressionS e; |
e0c9811a | 3364 | int sep; |
e4e8248d | 3365 | const char * const po = pred ? "restorereg.p" : "restorereg"; |
e0c9811a | 3366 | |
e4e8248d | 3367 | if (!in_procedure (po)) |
75e09913 JB |
3368 | return; |
3369 | ||
e4e8248d JB |
3370 | if (pred) |
3371 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3372 | else | |
e0c9811a | 3373 | { |
cd42ff9c | 3374 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3375 | qp = 0; |
e0c9811a | 3376 | } |
e4e8248d | 3377 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3378 | |
e4e8248d | 3379 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); |
800eeca4 JW |
3380 | } |
3381 | ||
2d6ed997 L |
3382 | static char *special_linkonce_name[] = |
3383 | { | |
3384 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3385 | }; | |
3386 | ||
3387 | static void | |
da9f89d4 | 3388 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3389 | { |
3390 | /* | |
3391 | Use a slightly ugly scheme to derive the unwind section names from | |
3392 | the text section name: | |
3393 | ||
3394 | text sect. unwind table sect. | |
3395 | name: name: comments: | |
3396 | ---------- ----------------- -------------------------------- | |
3397 | .text .IA_64.unwind | |
3398 | .text.foo .IA_64.unwind.text.foo | |
3399 | .foo .IA_64.unwind.foo | |
3400 | .gnu.linkonce.t.foo | |
3401 | .gnu.linkonce.ia64unw.foo | |
3402 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3403 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3404 | ||
3405 | This mapping is done so that: | |
3406 | ||
3407 | (a) An object file with unwind info only in .text will use | |
3408 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3409 | This follows the letter of the ABI and also ensures backwards | |
3410 | compatibility with older toolchains. | |
3411 | ||
3412 | (b) An object file with unwind info in multiple text sections | |
3413 | will use separate unwind sections for each text section. | |
3414 | This allows us to properly set the "sh_info" and "sh_link" | |
3415 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3416 | lets GNU ld support programs with multiple segments | |
3417 | containing unwind info (as might be the case for certain | |
3418 | embedded applications). | |
3419 | ||
3420 | (c) An error is issued if there would be a name clash. | |
3421 | */ | |
3422 | ||
3423 | const char *text_name, *sec_text_name; | |
3424 | char *sec_name; | |
3425 | const char *prefix = special_section_name [sec_index]; | |
3426 | const char *suffix; | |
3427 | size_t prefix_len, suffix_len, sec_name_len; | |
3428 | ||
3429 | sec_text_name = segment_name (text_seg); | |
3430 | text_name = sec_text_name; | |
3431 | if (strncmp (text_name, "_info", 5) == 0) | |
3432 | { | |
ad4b42b4 | 3433 | as_bad (_("Illegal section name `%s' (causes unwind section name clash)"), |
2d6ed997 L |
3434 | text_name); |
3435 | ignore_rest_of_line (); | |
3436 | return; | |
3437 | } | |
3438 | if (strcmp (text_name, ".text") == 0) | |
3439 | text_name = ""; | |
3440 | ||
3441 | /* Build the unwind section name by appending the (possibly stripped) | |
3442 | text section name to the unwind prefix. */ | |
3443 | suffix = text_name; | |
3444 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3445 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3446 | { | |
3447 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3448 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3449 | } | |
3450 | ||
3451 | prefix_len = strlen (prefix); | |
3452 | suffix_len = strlen (suffix); | |
3453 | sec_name_len = prefix_len + suffix_len; | |
3454 | sec_name = alloca (sec_name_len + 1); | |
3455 | memcpy (sec_name, prefix, prefix_len); | |
3456 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3457 | sec_name [sec_name_len] = '\0'; | |
3458 | ||
3459 | /* Handle COMDAT group. */ | |
6e3f953d L |
3460 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3461 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3462 | { |
3463 | char *section; | |
3464 | size_t len, group_name_len; | |
3465 | const char *group_name = elf_group_name (text_seg); | |
3466 | ||
3467 | if (group_name == NULL) | |
3468 | { | |
ad4b42b4 | 3469 | as_bad (_("Group section `%s' has no group signature"), |
2d6ed997 L |
3470 | sec_text_name); |
3471 | ignore_rest_of_line (); | |
3472 | return; | |
3473 | } | |
3474 | /* We have to construct a fake section directive. */ | |
3475 | group_name_len = strlen (group_name); | |
3476 | len = (sec_name_len | |
3477 | + 16 /* ,"aG",@progbits, */ | |
3478 | + group_name_len /* ,group_name */ | |
3479 | + 7); /* ,comdat */ | |
3480 | ||
3481 | section = alloca (len + 1); | |
3482 | memcpy (section, sec_name, sec_name_len); | |
3483 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3484 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3485 | memcpy (section + len - 7, ",comdat", 7); | |
3486 | section [len] = '\0'; | |
3487 | set_section (section); | |
3488 | } | |
3489 | else | |
3490 | { | |
3491 | set_section (sec_name); | |
3492 | bfd_set_section_flags (stdoutput, now_seg, | |
3493 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3494 | } | |
38ce5b11 L |
3495 | |
3496 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3497 | } |
3498 | ||
73f20958 | 3499 | static void |
2d6ed997 | 3500 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3501 | { |
73f20958 L |
3502 | int size, pad; |
3503 | unw_rec_list *list; | |
800eeca4 | 3504 | |
c97b7ef6 JW |
3505 | /* Mark the end of the unwind info, so that we can compute the size of the |
3506 | last unwind region. */ | |
e4e8248d | 3507 | add_unwind_entry (output_endp (), NOT_A_CHAR); |
c97b7ef6 | 3508 | |
10850f29 JW |
3509 | /* Force out pending instructions, to make sure all unwind records have |
3510 | a valid slot_number field. */ | |
3511 | ia64_flush_insns (); | |
3512 | ||
800eeca4 | 3513 | /* Generate the unwind record. */ |
73f20958 | 3514 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3515 | fixup_unw_records (list, 1); |
73f20958 L |
3516 | size = calc_record_size (list); |
3517 | ||
3518 | if (size > 0 || unwind.force_unwind_entry) | |
3519 | { | |
3520 | unwind.force_unwind_entry = 0; | |
3521 | /* pad to pointer-size boundary. */ | |
3522 | pad = size % md.pointer_size; | |
3523 | if (pad != 0) | |
3524 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3525 | /* Add 8 for the header. */ |
3526 | size += 8; | |
3527 | /* Add a pointer for the personality offset. */ | |
3528 | if (unwind.personality_routine) | |
3529 | size += md.pointer_size; | |
73f20958 | 3530 | } |
6290819d | 3531 | |
800eeca4 JW |
3532 | /* If there are unwind records, switch sections, and output the info. */ |
3533 | if (size != 0) | |
3534 | { | |
800eeca4 | 3535 | expressionS exp; |
1cd8ff38 | 3536 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3537 | |
da9f89d4 | 3538 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3539 | |
557debba JW |
3540 | /* Make sure the section has 4 byte alignment for ILP32 and |
3541 | 8 byte alignment for LP64. */ | |
3542 | frag_align (md.pointer_size_shift, 0, 0); | |
3543 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3544 | |
800eeca4 | 3545 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3546 | unwind.info = expr_build_dot (); |
73f20958 L |
3547 | |
3548 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3549 | (offsetT) (long) unwind.personality_routine, |
3550 | (char *) list); | |
91a2ae2a | 3551 | |
800eeca4 | 3552 | /* Add the personality address to the image. */ |
e0c9811a | 3553 | if (unwind.personality_routine != 0) |
542d6675 | 3554 | { |
40449e9f | 3555 | exp.X_op = O_symbol; |
e0c9811a | 3556 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3557 | exp.X_add_number = 0; |
1cd8ff38 NC |
3558 | |
3559 | if (md.flags & EF_IA_64_BE) | |
3560 | { | |
3561 | if (md.flags & EF_IA_64_ABI64) | |
3562 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3563 | else | |
3564 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3565 | } | |
40449e9f | 3566 | else |
1cd8ff38 NC |
3567 | { |
3568 | if (md.flags & EF_IA_64_ABI64) | |
3569 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3570 | else | |
3571 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3572 | } | |
3573 | ||
3574 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3575 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3576 | unwind.personality_routine = 0; |
542d6675 | 3577 | } |
800eeca4 JW |
3578 | } |
3579 | ||
6290819d | 3580 | free_saved_prologue_counts (); |
e0c9811a | 3581 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3582 | } |
3583 | ||
197865e8 | 3584 | static void |
5a49b8ac | 3585 | dot_handlerdata (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3586 | { |
75e09913 JB |
3587 | if (!in_procedure ("handlerdata")) |
3588 | return; | |
91a2ae2a RH |
3589 | unwind.force_unwind_entry = 1; |
3590 | ||
3591 | /* Remember which segment we're in so we can switch back after .endp */ | |
3592 | unwind.saved_text_seg = now_seg; | |
3593 | unwind.saved_text_subseg = now_subseg; | |
3594 | ||
3595 | /* Generate unwind info into unwind-info section and then leave that | |
3596 | section as the currently active one so dataXX directives go into | |
3597 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3598 | generate_unwind_image (now_seg); |
e0c9811a | 3599 | demand_empty_rest_of_line (); |
800eeca4 JW |
3600 | } |
3601 | ||
197865e8 | 3602 | static void |
5a49b8ac | 3603 | dot_unwentry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3604 | { |
75e09913 JB |
3605 | if (!in_procedure ("unwentry")) |
3606 | return; | |
91a2ae2a | 3607 | unwind.force_unwind_entry = 1; |
e0c9811a | 3608 | demand_empty_rest_of_line (); |
800eeca4 JW |
3609 | } |
3610 | ||
197865e8 | 3611 | static void |
5a49b8ac | 3612 | dot_altrp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3613 | { |
e0c9811a JW |
3614 | expressionS e; |
3615 | unsigned reg; | |
3616 | ||
75e09913 JB |
3617 | if (!in_prologue ("altrp")) |
3618 | return; | |
3619 | ||
cd42ff9c | 3620 | parse_operand_and_eval (&e, 0); |
e0c9811a | 3621 | reg = e.X_add_number - REG_BR; |
e4e8248d JB |
3622 | if (e.X_op != O_register || reg > 7) |
3623 | { | |
ad4b42b4 | 3624 | as_bad (_("First operand to .altrp not a valid branch register")); |
e4e8248d JB |
3625 | reg = 0; |
3626 | } | |
3627 | add_unwind_entry (output_rp_br (reg), 0); | |
800eeca4 JW |
3628 | } |
3629 | ||
197865e8 | 3630 | static void |
5a49b8ac | 3631 | dot_savemem (int psprel) |
800eeca4 JW |
3632 | { |
3633 | expressionS e1, e2; | |
3634 | int sep; | |
3635 | int reg1, val; | |
e4e8248d | 3636 | const char * const po = psprel ? "savepsp" : "savesp"; |
800eeca4 | 3637 | |
e4e8248d | 3638 | if (!in_prologue (po)) |
75e09913 JB |
3639 | return; |
3640 | ||
cd42ff9c | 3641 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3642 | if (sep == ',') |
cd42ff9c | 3643 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3644 | else |
3645 | e2.X_op = O_absent; | |
800eeca4 | 3646 | |
e0c9811a | 3647 | reg1 = e1.X_add_number; |
800eeca4 | 3648 | val = e2.X_add_number; |
197865e8 | 3649 | |
800eeca4 | 3650 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3651 | if (e1.X_op != O_register) |
800eeca4 | 3652 | { |
ad4b42b4 | 3653 | as_bad (_("First operand to .%s not a register"), po); |
e4e8248d JB |
3654 | reg1 = REG_PR; /* Anything valid is good here. */ |
3655 | } | |
3656 | if (e2.X_op != O_constant) | |
3657 | { | |
ad4b42b4 | 3658 | as_bad (_("Second operand to .%s not a constant"), po); |
e4e8248d JB |
3659 | val = 0; |
3660 | } | |
3661 | ||
3662 | switch (reg1) | |
3663 | { | |
3664 | case REG_AR + AR_BSP: | |
3665 | add_unwind_entry (output_bsp_when (), sep); | |
3666 | add_unwind_entry ((psprel | |
3667 | ? output_bsp_psprel | |
3668 | : output_bsp_sprel) (val), NOT_A_CHAR); | |
3669 | break; | |
3670 | case REG_AR + AR_BSPSTORE: | |
3671 | add_unwind_entry (output_bspstore_when (), sep); | |
3672 | add_unwind_entry ((psprel | |
3673 | ? output_bspstore_psprel | |
3674 | : output_bspstore_sprel) (val), NOT_A_CHAR); | |
3675 | break; | |
3676 | case REG_AR + AR_RNAT: | |
3677 | add_unwind_entry (output_rnat_when (), sep); | |
3678 | add_unwind_entry ((psprel | |
3679 | ? output_rnat_psprel | |
3680 | : output_rnat_sprel) (val), NOT_A_CHAR); | |
3681 | break; | |
3682 | case REG_AR + AR_UNAT: | |
3683 | add_unwind_entry (output_unat_when (), sep); | |
3684 | add_unwind_entry ((psprel | |
3685 | ? output_unat_psprel | |
3686 | : output_unat_sprel) (val), NOT_A_CHAR); | |
3687 | break; | |
3688 | case REG_AR + AR_FPSR: | |
3689 | add_unwind_entry (output_fpsr_when (), sep); | |
3690 | add_unwind_entry ((psprel | |
3691 | ? output_fpsr_psprel | |
3692 | : output_fpsr_sprel) (val), NOT_A_CHAR); | |
3693 | break; | |
3694 | case REG_AR + AR_PFS: | |
3695 | add_unwind_entry (output_pfs_when (), sep); | |
3696 | add_unwind_entry ((psprel | |
3697 | ? output_pfs_psprel | |
3698 | : output_pfs_sprel) (val), NOT_A_CHAR); | |
3699 | break; | |
3700 | case REG_AR + AR_LC: | |
3701 | add_unwind_entry (output_lc_when (), sep); | |
3702 | add_unwind_entry ((psprel | |
3703 | ? output_lc_psprel | |
3704 | : output_lc_sprel) (val), NOT_A_CHAR); | |
3705 | break; | |
3706 | case REG_BR: | |
3707 | add_unwind_entry (output_rp_when (), sep); | |
3708 | add_unwind_entry ((psprel | |
3709 | ? output_rp_psprel | |
3710 | : output_rp_sprel) (val), NOT_A_CHAR); | |
3711 | break; | |
3712 | case REG_PR: | |
3713 | add_unwind_entry (output_preds_when (), sep); | |
3714 | add_unwind_entry ((psprel | |
3715 | ? output_preds_psprel | |
3716 | : output_preds_sprel) (val), NOT_A_CHAR); | |
3717 | break; | |
3718 | case REG_PRIUNAT: | |
3719 | add_unwind_entry (output_priunat_when_mem (), sep); | |
3720 | add_unwind_entry ((psprel | |
3721 | ? output_priunat_psprel | |
3722 | : output_priunat_sprel) (val), NOT_A_CHAR); | |
3723 | break; | |
3724 | default: | |
ad4b42b4 | 3725 | as_bad (_("First operand to .%s not a valid register"), po); |
e4e8248d JB |
3726 | add_unwind_entry (NULL, sep); |
3727 | break; | |
800eeca4 | 3728 | } |
800eeca4 JW |
3729 | } |
3730 | ||
197865e8 | 3731 | static void |
5a49b8ac | 3732 | dot_saveg (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3733 | { |
e4e8248d JB |
3734 | expressionS e; |
3735 | unsigned grmask; | |
800eeca4 | 3736 | int sep; |
75e09913 JB |
3737 | |
3738 | if (!in_prologue ("save.g")) | |
3739 | return; | |
3740 | ||
cd42ff9c | 3741 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3742 | |
e4e8248d JB |
3743 | grmask = e.X_add_number; |
3744 | if (e.X_op != O_constant | |
3745 | || e.X_add_number <= 0 | |
3746 | || e.X_add_number > 0xf) | |
800eeca4 | 3747 | { |
ad4b42b4 | 3748 | as_bad (_("First operand to .save.g must be a positive 4-bit constant")); |
e4e8248d JB |
3749 | grmask = 0; |
3750 | } | |
3751 | ||
3752 | if (sep == ',') | |
3753 | { | |
3754 | unsigned reg; | |
3755 | int n = popcount (grmask); | |
3756 | ||
cd42ff9c | 3757 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3758 | reg = e.X_add_number - REG_GR; |
3759 | if (e.X_op != O_register || reg > 127) | |
542d6675 | 3760 | { |
ad4b42b4 | 3761 | as_bad (_("Second operand to .save.g must be a general register")); |
e4e8248d JB |
3762 | reg = 0; |
3763 | } | |
3764 | else if (reg > 128U - n) | |
3765 | { | |
ad4b42b4 | 3766 | as_bad (_("Second operand to .save.g must be the first of %d general registers"), n); |
e4e8248d | 3767 | reg = 0; |
800eeca4 | 3768 | } |
e4e8248d | 3769 | add_unwind_entry (output_gr_gr (grmask, reg), 0); |
800eeca4 | 3770 | } |
e4e8248d JB |
3771 | else |
3772 | add_unwind_entry (output_gr_mem (grmask), 0); | |
800eeca4 JW |
3773 | } |
3774 | ||
197865e8 | 3775 | static void |
5a49b8ac | 3776 | dot_savef (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3777 | { |
e4e8248d | 3778 | expressionS e; |
75e09913 JB |
3779 | |
3780 | if (!in_prologue ("save.f")) | |
3781 | return; | |
3782 | ||
cd42ff9c | 3783 | parse_operand_and_eval (&e, 0); |
197865e8 | 3784 | |
e4e8248d JB |
3785 | if (e.X_op != O_constant |
3786 | || e.X_add_number <= 0 | |
3787 | || e.X_add_number > 0xfffff) | |
3788 | { | |
ad4b42b4 | 3789 | as_bad (_("Operand to .save.f must be a positive 20-bit constant")); |
e4e8248d JB |
3790 | e.X_add_number = 0; |
3791 | } | |
3792 | add_unwind_entry (output_fr_mem (e.X_add_number), 0); | |
800eeca4 JW |
3793 | } |
3794 | ||
197865e8 | 3795 | static void |
5a49b8ac | 3796 | dot_saveb (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3797 | { |
e4e8248d JB |
3798 | expressionS e; |
3799 | unsigned brmask; | |
3800 | int sep; | |
e0c9811a | 3801 | |
75e09913 JB |
3802 | if (!in_prologue ("save.b")) |
3803 | return; | |
3804 | ||
cd42ff9c | 3805 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3806 | |
3807 | brmask = e.X_add_number; | |
3808 | if (e.X_op != O_constant | |
3809 | || e.X_add_number <= 0 | |
3810 | || e.X_add_number > 0x1f) | |
800eeca4 | 3811 | { |
ad4b42b4 | 3812 | as_bad (_("First operand to .save.b must be a positive 5-bit constant")); |
e4e8248d | 3813 | brmask = 0; |
800eeca4 | 3814 | } |
e0c9811a JW |
3815 | |
3816 | if (sep == ',') | |
3817 | { | |
e4e8248d JB |
3818 | unsigned reg; |
3819 | int n = popcount (brmask); | |
3820 | ||
cd42ff9c | 3821 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3822 | reg = e.X_add_number - REG_GR; |
3823 | if (e.X_op != O_register || reg > 127) | |
e0c9811a | 3824 | { |
ad4b42b4 | 3825 | as_bad (_("Second operand to .save.b must be a general register")); |
e4e8248d | 3826 | reg = 0; |
e0c9811a | 3827 | } |
e4e8248d JB |
3828 | else if (reg > 128U - n) |
3829 | { | |
ad4b42b4 | 3830 | as_bad (_("Second operand to .save.b must be the first of %d general registers"), n); |
e4e8248d JB |
3831 | reg = 0; |
3832 | } | |
3833 | add_unwind_entry (output_br_gr (brmask, reg), 0); | |
e0c9811a JW |
3834 | } |
3835 | else | |
e4e8248d | 3836 | add_unwind_entry (output_br_mem (brmask), 0); |
800eeca4 JW |
3837 | } |
3838 | ||
197865e8 | 3839 | static void |
5a49b8ac | 3840 | dot_savegf (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3841 | { |
3842 | expressionS e1, e2; | |
75e09913 JB |
3843 | |
3844 | if (!in_prologue ("save.gf")) | |
3845 | return; | |
3846 | ||
cd42ff9c AM |
3847 | if (parse_operand_and_eval (&e1, ',') == ',') |
3848 | parse_operand_and_eval (&e2, 0); | |
800eeca4 | 3849 | else |
e4e8248d JB |
3850 | e2.X_op = O_absent; |
3851 | ||
3852 | if (e1.X_op != O_constant | |
3853 | || e1.X_add_number < 0 | |
3854 | || e1.X_add_number > 0xf) | |
3855 | { | |
ad4b42b4 | 3856 | as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant")); |
e4e8248d JB |
3857 | e1.X_op = O_absent; |
3858 | e1.X_add_number = 0; | |
3859 | } | |
3860 | if (e2.X_op != O_constant | |
3861 | || e2.X_add_number < 0 | |
3862 | || e2.X_add_number > 0xfffff) | |
800eeca4 | 3863 | { |
ad4b42b4 | 3864 | as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant")); |
e4e8248d JB |
3865 | e2.X_op = O_absent; |
3866 | e2.X_add_number = 0; | |
800eeca4 | 3867 | } |
e4e8248d JB |
3868 | if (e1.X_op == O_constant |
3869 | && e2.X_op == O_constant | |
3870 | && e1.X_add_number == 0 | |
3871 | && e2.X_add_number == 0) | |
ad4b42b4 | 3872 | as_bad (_("Operands to .save.gf may not be both zero")); |
e4e8248d JB |
3873 | |
3874 | add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); | |
800eeca4 JW |
3875 | } |
3876 | ||
197865e8 | 3877 | static void |
5a49b8ac | 3878 | dot_spill (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3879 | { |
3880 | expressionS e; | |
e0c9811a | 3881 | |
75e09913 JB |
3882 | if (!in_prologue ("spill")) |
3883 | return; | |
3884 | ||
cd42ff9c | 3885 | parse_operand_and_eval (&e, 0); |
197865e8 | 3886 | |
800eeca4 | 3887 | if (e.X_op != O_constant) |
800eeca4 | 3888 | { |
ad4b42b4 | 3889 | as_bad (_("Operand to .spill must be a constant")); |
e4e8248d | 3890 | e.X_add_number = 0; |
e0c9811a | 3891 | } |
e4e8248d | 3892 | add_unwind_entry (output_spill_base (e.X_add_number), 0); |
e0c9811a JW |
3893 | } |
3894 | ||
3895 | static void | |
5a49b8ac | 3896 | dot_spillreg (int pred) |
e0c9811a | 3897 | { |
2132e3a3 | 3898 | int sep; |
e4e8248d JB |
3899 | unsigned int qp, ab, xy, reg, treg; |
3900 | expressionS e; | |
3901 | const char * const po = pred ? "spillreg.p" : "spillreg"; | |
e0c9811a | 3902 | |
e4e8248d | 3903 | if (!in_procedure (po)) |
75e09913 JB |
3904 | return; |
3905 | ||
e4e8248d JB |
3906 | if (pred) |
3907 | sep = parse_predicate_and_operand (&e, &qp, po); | |
e0c9811a | 3908 | else |
e0c9811a | 3909 | { |
cd42ff9c | 3910 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3911 | qp = 0; |
e0c9811a | 3912 | } |
e4e8248d | 3913 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3914 | |
e4e8248d | 3915 | if (sep == ',') |
cd42ff9c | 3916 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3917 | else |
3918 | e.X_op = O_absent; | |
3919 | convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); | |
e0c9811a | 3920 | |
e4e8248d | 3921 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); |
e0c9811a JW |
3922 | } |
3923 | ||
3924 | static void | |
5a49b8ac | 3925 | dot_spillmem (int psprel) |
e0c9811a | 3926 | { |
e4e8248d JB |
3927 | expressionS e; |
3928 | int pred = (psprel < 0), sep; | |
3929 | unsigned int qp, ab, reg; | |
3930 | const char * po; | |
e0c9811a | 3931 | |
e4e8248d | 3932 | if (pred) |
e0c9811a | 3933 | { |
e4e8248d JB |
3934 | psprel = ~psprel; |
3935 | po = psprel ? "spillpsp.p" : "spillsp.p"; | |
e0c9811a | 3936 | } |
e4e8248d JB |
3937 | else |
3938 | po = psprel ? "spillpsp" : "spillsp"; | |
e0c9811a | 3939 | |
e4e8248d JB |
3940 | if (!in_procedure (po)) |
3941 | return; | |
e0c9811a | 3942 | |
e4e8248d JB |
3943 | if (pred) |
3944 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3945 | else | |
e0c9811a | 3946 | { |
cd42ff9c | 3947 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3948 | qp = 0; |
e0c9811a | 3949 | } |
e4e8248d | 3950 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3951 | |
e4e8248d | 3952 | if (sep == ',') |
cd42ff9c | 3953 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3954 | else |
3955 | e.X_op = O_absent; | |
3956 | if (e.X_op != O_constant) | |
e0c9811a | 3957 | { |
ad4b42b4 | 3958 | as_bad (_("Operand %d to .%s must be a constant"), 2 + pred, po); |
e4e8248d | 3959 | e.X_add_number = 0; |
e0c9811a JW |
3960 | } |
3961 | ||
3962 | if (psprel) | |
e4e8248d | 3963 | add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a | 3964 | else |
e4e8248d | 3965 | add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a JW |
3966 | } |
3967 | ||
6290819d | 3968 | static unsigned int |
5a49b8ac | 3969 | get_saved_prologue_count (unsigned long lbl) |
6290819d NC |
3970 | { |
3971 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3972 | ||
3973 | while (lpc != NULL && lpc->label_number != lbl) | |
3974 | lpc = lpc->next; | |
3975 | ||
3976 | if (lpc != NULL) | |
3977 | return lpc->prologue_count; | |
3978 | ||
ad4b42b4 | 3979 | as_bad (_("Missing .label_state %ld"), lbl); |
6290819d NC |
3980 | return 1; |
3981 | } | |
3982 | ||
3983 | static void | |
5a49b8ac | 3984 | save_prologue_count (unsigned long lbl, unsigned int count) |
6290819d NC |
3985 | { |
3986 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3987 | ||
3988 | while (lpc != NULL && lpc->label_number != lbl) | |
3989 | lpc = lpc->next; | |
3990 | ||
3991 | if (lpc != NULL) | |
3992 | lpc->prologue_count = count; | |
3993 | else | |
3994 | { | |
40449e9f | 3995 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
3996 | |
3997 | new_lpc->next = unwind.saved_prologue_counts; | |
3998 | new_lpc->label_number = lbl; | |
3999 | new_lpc->prologue_count = count; | |
4000 | unwind.saved_prologue_counts = new_lpc; | |
4001 | } | |
4002 | } | |
4003 | ||
4004 | static void | |
4005 | free_saved_prologue_counts () | |
4006 | { | |
40449e9f KH |
4007 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4008 | label_prologue_count *next; | |
6290819d NC |
4009 | |
4010 | while (lpc != NULL) | |
4011 | { | |
4012 | next = lpc->next; | |
4013 | free (lpc); | |
4014 | lpc = next; | |
4015 | } | |
4016 | ||
4017 | unwind.saved_prologue_counts = NULL; | |
4018 | } | |
4019 | ||
e0c9811a | 4020 | static void |
5a49b8ac | 4021 | dot_label_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4022 | { |
4023 | expressionS e; | |
4024 | ||
75e09913 JB |
4025 | if (!in_body ("label_state")) |
4026 | return; | |
4027 | ||
cd42ff9c | 4028 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4029 | if (e.X_op == O_constant) |
4030 | save_prologue_count (e.X_add_number, unwind.prologue_count); | |
4031 | else | |
e0c9811a | 4032 | { |
ad4b42b4 | 4033 | as_bad (_("Operand to .label_state must be a constant")); |
e4e8248d | 4034 | e.X_add_number = 0; |
e0c9811a | 4035 | } |
e4e8248d | 4036 | add_unwind_entry (output_label_state (e.X_add_number), 0); |
e0c9811a JW |
4037 | } |
4038 | ||
4039 | static void | |
5a49b8ac | 4040 | dot_copy_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4041 | { |
4042 | expressionS e; | |
4043 | ||
75e09913 JB |
4044 | if (!in_body ("copy_state")) |
4045 | return; | |
4046 | ||
cd42ff9c | 4047 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4048 | if (e.X_op == O_constant) |
4049 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); | |
4050 | else | |
e0c9811a | 4051 | { |
ad4b42b4 | 4052 | as_bad (_("Operand to .copy_state must be a constant")); |
e4e8248d | 4053 | e.X_add_number = 0; |
e0c9811a | 4054 | } |
e4e8248d | 4055 | add_unwind_entry (output_copy_state (e.X_add_number), 0); |
800eeca4 JW |
4056 | } |
4057 | ||
197865e8 | 4058 | static void |
5a49b8ac | 4059 | dot_unwabi (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4060 | { |
e0c9811a JW |
4061 | expressionS e1, e2; |
4062 | unsigned char sep; | |
4063 | ||
e4e8248d | 4064 | if (!in_prologue ("unwabi")) |
75e09913 JB |
4065 | return; |
4066 | ||
cd42ff9c | 4067 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 4068 | if (sep == ',') |
cd42ff9c | 4069 | parse_operand_and_eval (&e2, 0); |
e4e8248d JB |
4070 | else |
4071 | e2.X_op = O_absent; | |
e0c9811a JW |
4072 | |
4073 | if (e1.X_op != O_constant) | |
4074 | { | |
ad4b42b4 | 4075 | as_bad (_("First operand to .unwabi must be a constant")); |
e4e8248d | 4076 | e1.X_add_number = 0; |
e0c9811a JW |
4077 | } |
4078 | ||
4079 | if (e2.X_op != O_constant) | |
4080 | { | |
ad4b42b4 | 4081 | as_bad (_("Second operand to .unwabi must be a constant")); |
e4e8248d | 4082 | e2.X_add_number = 0; |
e0c9811a JW |
4083 | } |
4084 | ||
e4e8248d | 4085 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); |
800eeca4 JW |
4086 | } |
4087 | ||
197865e8 | 4088 | static void |
5a49b8ac | 4089 | dot_personality (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4090 | { |
4091 | char *name, *p, c; | |
75e09913 JB |
4092 | if (!in_procedure ("personality")) |
4093 | return; | |
800eeca4 JW |
4094 | SKIP_WHITESPACE (); |
4095 | name = input_line_pointer; | |
4096 | c = get_symbol_end (); | |
4097 | p = input_line_pointer; | |
e0c9811a | 4098 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4099 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4100 | *p = c; |
4101 | SKIP_WHITESPACE (); | |
4102 | demand_empty_rest_of_line (); | |
4103 | } | |
4104 | ||
4105 | static void | |
5a49b8ac | 4106 | dot_proc (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4107 | { |
4108 | char *name, *p, c; | |
4109 | symbolS *sym; | |
5656b6b8 JB |
4110 | proc_pending *pending, *last_pending; |
4111 | ||
4112 | if (unwind.proc_pending.sym) | |
4113 | { | |
4114 | (md.unwind_check == unwind_check_warning | |
4115 | ? as_warn | |
ad4b42b4 | 4116 | : as_bad) (_("Missing .endp after previous .proc")); |
5656b6b8 JB |
4117 | while (unwind.proc_pending.next) |
4118 | { | |
4119 | pending = unwind.proc_pending.next; | |
4120 | unwind.proc_pending.next = pending->next; | |
4121 | free (pending); | |
4122 | } | |
4123 | } | |
4124 | last_pending = NULL; | |
800eeca4 | 4125 | |
e0c9811a | 4126 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4127 | function symbols: */ |
800eeca4 JW |
4128 | while (1) |
4129 | { | |
4130 | SKIP_WHITESPACE (); | |
4131 | name = input_line_pointer; | |
4132 | c = get_symbol_end (); | |
4133 | p = input_line_pointer; | |
75e09913 | 4134 | if (!*name) |
ad4b42b4 | 4135 | as_bad (_("Empty argument of .proc")); |
75e09913 | 4136 | else |
542d6675 | 4137 | { |
75e09913 JB |
4138 | sym = symbol_find_or_make (name); |
4139 | if (S_IS_DEFINED (sym)) | |
ad4b42b4 | 4140 | as_bad (_("`%s' was already defined"), name); |
5656b6b8 JB |
4141 | else if (!last_pending) |
4142 | { | |
4143 | unwind.proc_pending.sym = sym; | |
4144 | last_pending = &unwind.proc_pending; | |
4145 | } | |
4146 | else | |
75e09913 | 4147 | { |
5656b6b8 JB |
4148 | pending = xmalloc (sizeof (*pending)); |
4149 | pending->sym = sym; | |
4150 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4151 | } |
4152 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4153 | } |
800eeca4 JW |
4154 | *p = c; |
4155 | SKIP_WHITESPACE (); | |
4156 | if (*input_line_pointer != ',') | |
4157 | break; | |
4158 | ++input_line_pointer; | |
4159 | } | |
5656b6b8 JB |
4160 | if (!last_pending) |
4161 | { | |
4162 | unwind.proc_pending.sym = expr_build_dot (); | |
4163 | last_pending = &unwind.proc_pending; | |
4164 | } | |
4165 | last_pending->next = NULL; | |
800eeca4 JW |
4166 | demand_empty_rest_of_line (); |
4167 | ia64_do_align (16); | |
4168 | ||
75e09913 | 4169 | unwind.prologue = 0; |
33d01f33 | 4170 | unwind.prologue_count = 0; |
75e09913 JB |
4171 | unwind.body = 0; |
4172 | unwind.insn = 0; | |
e0c9811a JW |
4173 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4174 | unwind.personality_routine = 0; | |
800eeca4 JW |
4175 | } |
4176 | ||
4177 | static void | |
5a49b8ac | 4178 | dot_body (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4179 | { |
75e09913 JB |
4180 | if (!in_procedure ("body")) |
4181 | return; | |
4182 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
ad4b42b4 | 4183 | as_warn (_("Initial .body should precede any instructions")); |
ba825241 | 4184 | check_pending_save (); |
75e09913 | 4185 | |
e0c9811a | 4186 | unwind.prologue = 0; |
30d25259 | 4187 | unwind.prologue_mask = 0; |
75e09913 | 4188 | unwind.body = 1; |
30d25259 | 4189 | |
e4e8248d | 4190 | add_unwind_entry (output_body (), 0); |
800eeca4 JW |
4191 | } |
4192 | ||
4193 | static void | |
5a49b8ac | 4194 | dot_prologue (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4195 | { |
e4e8248d | 4196 | unsigned mask = 0, grsave = 0; |
e0c9811a | 4197 | |
75e09913 JB |
4198 | if (!in_procedure ("prologue")) |
4199 | return; | |
4200 | if (unwind.prologue) | |
4201 | { | |
ad4b42b4 | 4202 | as_bad (_(".prologue within prologue")); |
75e09913 JB |
4203 | ignore_rest_of_line (); |
4204 | return; | |
4205 | } | |
4206 | if (!unwind.body && unwind.insn) | |
ad4b42b4 | 4207 | as_warn (_("Initial .prologue should precede any instructions")); |
75e09913 | 4208 | |
e0c9811a | 4209 | if (!is_it_end_of_statement ()) |
800eeca4 | 4210 | { |
e4e8248d | 4211 | expressionS e; |
cd42ff9c | 4212 | int n, sep = parse_operand_and_eval (&e, ','); |
30d25259 | 4213 | |
e4e8248d JB |
4214 | if (e.X_op != O_constant |
4215 | || e.X_add_number < 0 | |
4216 | || e.X_add_number > 0xf) | |
ad4b42b4 | 4217 | as_bad (_("First operand to .prologue must be a positive 4-bit constant")); |
e4e8248d | 4218 | else if (e.X_add_number == 0) |
ad4b42b4 | 4219 | as_warn (_("Pointless use of zero first operand to .prologue")); |
e4e8248d JB |
4220 | else |
4221 | mask = e.X_add_number; | |
4222 | n = popcount (mask); | |
30d25259 | 4223 | |
e4e8248d | 4224 | if (sep == ',') |
cd42ff9c | 4225 | parse_operand_and_eval (&e, 0); |
800eeca4 | 4226 | else |
e4e8248d JB |
4227 | e.X_op = O_absent; |
4228 | if (e.X_op == O_constant | |
4229 | && e.X_add_number >= 0 | |
4230 | && e.X_add_number < 128) | |
4231 | { | |
4232 | if (md.unwind_check == unwind_check_error) | |
ad4b42b4 | 4233 | as_warn (_("Using a constant as second operand to .prologue is deprecated")); |
e4e8248d JB |
4234 | grsave = e.X_add_number; |
4235 | } | |
4236 | else if (e.X_op != O_register | |
4237 | || (grsave = e.X_add_number - REG_GR) > 127) | |
4238 | { | |
ad4b42b4 | 4239 | as_bad (_("Second operand to .prologue must be a general register")); |
e4e8248d JB |
4240 | grsave = 0; |
4241 | } | |
4242 | else if (grsave > 128U - n) | |
4243 | { | |
ad4b42b4 | 4244 | as_bad (_("Second operand to .prologue must be the first of %d general registers"), n); |
e4e8248d JB |
4245 | grsave = 0; |
4246 | } | |
4247 | ||
800eeca4 | 4248 | } |
e4e8248d JB |
4249 | |
4250 | if (mask) | |
4251 | add_unwind_entry (output_prologue_gr (mask, grsave), 0); | |
800eeca4 | 4252 | else |
e4e8248d | 4253 | add_unwind_entry (output_prologue (), 0); |
30d25259 RH |
4254 | |
4255 | unwind.prologue = 1; | |
4256 | unwind.prologue_mask = mask; | |
e4e8248d | 4257 | unwind.prologue_gr = grsave; |
75e09913 | 4258 | unwind.body = 0; |
33d01f33 | 4259 | ++unwind.prologue_count; |
800eeca4 JW |
4260 | } |
4261 | ||
4262 | static void | |
5a49b8ac | 4263 | dot_endp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4264 | { |
4265 | expressionS e; | |
44f5c83a | 4266 | int bytes_per_address; |
800eeca4 JW |
4267 | long where; |
4268 | segT saved_seg; | |
4269 | subsegT saved_subseg; | |
5656b6b8 | 4270 | proc_pending *pending; |
970d6792 | 4271 | int unwind_check = md.unwind_check; |
800eeca4 | 4272 | |
970d6792 | 4273 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4274 | if (!in_procedure ("endp")) |
4275 | return; | |
970d6792 | 4276 | md.unwind_check = unwind_check; |
75e09913 | 4277 | |
91a2ae2a RH |
4278 | if (unwind.saved_text_seg) |
4279 | { | |
4280 | saved_seg = unwind.saved_text_seg; | |
4281 | saved_subseg = unwind.saved_text_subseg; | |
4282 | unwind.saved_text_seg = NULL; | |
4283 | } | |
4284 | else | |
4285 | { | |
4286 | saved_seg = now_seg; | |
4287 | saved_subseg = now_subseg; | |
4288 | } | |
4289 | ||
800eeca4 | 4290 | insn_group_break (1, 0, 0); |
800eeca4 | 4291 | |
91a2ae2a RH |
4292 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4293 | if (!unwind.info) | |
2d6ed997 | 4294 | generate_unwind_image (saved_seg); |
800eeca4 | 4295 | |
91a2ae2a RH |
4296 | if (unwind.info || unwind.force_unwind_entry) |
4297 | { | |
75e09913 JB |
4298 | symbolS *proc_end; |
4299 | ||
91a2ae2a | 4300 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4301 | proc_end = expr_build_dot (); |
5e7474a7 | 4302 | |
da9f89d4 | 4303 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4304 | |
557debba JW |
4305 | /* Make sure that section has 4 byte alignment for ILP32 and |
4306 | 8 byte alignment for LP64. */ | |
4307 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4308 | |
557debba JW |
4309 | /* Need space for 3 pointers for procedure start, procedure end, |
4310 | and unwind info. */ | |
6baf2b51 | 4311 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4312 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4313 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4314 | |
40449e9f | 4315 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4316 | e.X_op = O_pseudo_fixup; |
4317 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4318 | e.X_add_number = 0; | |
5656b6b8 JB |
4319 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4320 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4321 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4322 | S_GET_VALUE (unwind.proc_pending.sym), | |
4323 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4324 | else |
5656b6b8 | 4325 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4326 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4327 | |
800eeca4 JW |
4328 | e.X_op = O_pseudo_fixup; |
4329 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4330 | e.X_add_number = 0; | |
75e09913 | 4331 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4332 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4333 | bytes_per_address, &e); | |
4334 | ||
4335 | if (unwind.info) | |
4336 | { | |
4337 | e.X_op = O_pseudo_fixup; | |
4338 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4339 | e.X_add_number = 0; | |
4340 | e.X_add_symbol = unwind.info; | |
4341 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4342 | bytes_per_address, &e); | |
4343 | } | |
91a2ae2a | 4344 | } |
800eeca4 | 4345 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4346 | |
5656b6b8 JB |
4347 | /* Set symbol sizes. */ |
4348 | pending = &unwind.proc_pending; | |
4349 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4350 | { |
5656b6b8 | 4351 | do |
75e09913 | 4352 | { |
5656b6b8 JB |
4353 | symbolS *sym = pending->sym; |
4354 | ||
4355 | if (!S_IS_DEFINED (sym)) | |
ad4b42b4 | 4356 | as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym)); |
5656b6b8 JB |
4357 | else if (S_GET_SIZE (sym) == 0 |
4358 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4359 | { |
75e09913 JB |
4360 | fragS *frag = symbol_get_frag (sym); |
4361 | ||
5656b6b8 | 4362 | if (frag) |
c538998c | 4363 | { |
75e09913 JB |
4364 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4365 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4366 | else | |
4367 | { | |
4368 | symbol_get_obj (sym)->size = | |
4369 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4370 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4371 | symbol_get_obj (sym)->size->X_add_symbol | |
4372 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4373 | frag_now_fix (), frag_now); | |
4374 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4375 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4376 | } | |
c538998c JJ |
4377 | } |
4378 | } | |
5656b6b8 JB |
4379 | } while ((pending = pending->next) != NULL); |
4380 | } | |
4381 | ||
4382 | /* Parse names of main and alternate entry points. */ | |
4383 | while (1) | |
4384 | { | |
4385 | char *name, *p, c; | |
4386 | ||
4387 | SKIP_WHITESPACE (); | |
4388 | name = input_line_pointer; | |
4389 | c = get_symbol_end (); | |
4390 | p = input_line_pointer; | |
4391 | if (!*name) | |
4392 | (md.unwind_check == unwind_check_warning | |
4393 | ? as_warn | |
ad4b42b4 | 4394 | : as_bad) (_("Empty argument of .endp")); |
5656b6b8 JB |
4395 | else |
4396 | { | |
4397 | symbolS *sym = symbol_find (name); | |
4398 | ||
4399 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4400 | { | |
4401 | if (sym == pending->sym) | |
4402 | { | |
4403 | pending->sym = NULL; | |
4404 | break; | |
4405 | } | |
4406 | } | |
4407 | if (!sym || !pending) | |
ad4b42b4 | 4408 | as_warn (_("`%s' was not specified with previous .proc"), name); |
c538998c JJ |
4409 | } |
4410 | *p = c; | |
4411 | SKIP_WHITESPACE (); | |
4412 | if (*input_line_pointer != ',') | |
4413 | break; | |
4414 | ++input_line_pointer; | |
4415 | } | |
4416 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4417 | |
4418 | /* Deliberately only checking for the main entry point here; the | |
4419 | language spec even says all arguments to .endp are ignored. */ | |
4420 | if (unwind.proc_pending.sym | |
4421 | && S_GET_NAME (unwind.proc_pending.sym) | |
4422 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
ad4b42b4 | 4423 | as_warn (_("`%s' should be an operand to this .endp"), |
5656b6b8 JB |
4424 | S_GET_NAME (unwind.proc_pending.sym)); |
4425 | while (unwind.proc_pending.next) | |
4426 | { | |
4427 | pending = unwind.proc_pending.next; | |
4428 | unwind.proc_pending.next = pending->next; | |
4429 | free (pending); | |
4430 | } | |
4431 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4432 | } |
4433 | ||
4434 | static void | |
d3ce72d0 | 4435 | dot_template (int template_val) |
800eeca4 | 4436 | { |
d3ce72d0 | 4437 | CURR_SLOT.user_template = template_val; |
800eeca4 JW |
4438 | } |
4439 | ||
4440 | static void | |
5a49b8ac | 4441 | dot_regstk (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4442 | { |
4443 | int ins, locs, outs, rots; | |
4444 | ||
4445 | if (is_it_end_of_statement ()) | |
4446 | ins = locs = outs = rots = 0; | |
4447 | else | |
4448 | { | |
4449 | ins = get_absolute_expression (); | |
4450 | if (*input_line_pointer++ != ',') | |
4451 | goto err; | |
4452 | locs = get_absolute_expression (); | |
4453 | if (*input_line_pointer++ != ',') | |
4454 | goto err; | |
4455 | outs = get_absolute_expression (); | |
4456 | if (*input_line_pointer++ != ',') | |
4457 | goto err; | |
4458 | rots = get_absolute_expression (); | |
4459 | } | |
4460 | set_regstack (ins, locs, outs, rots); | |
4461 | return; | |
4462 | ||
4463 | err: | |
ad4b42b4 | 4464 | as_bad (_("Comma expected")); |
800eeca4 JW |
4465 | ignore_rest_of_line (); |
4466 | } | |
4467 | ||
4468 | static void | |
5a49b8ac | 4469 | dot_rot (int type) |
800eeca4 | 4470 | { |
6a2375c6 JB |
4471 | offsetT num_regs; |
4472 | valueT num_alloced = 0; | |
800eeca4 JW |
4473 | struct dynreg **drpp, *dr; |
4474 | int ch, base_reg = 0; | |
4475 | char *name, *start; | |
4476 | size_t len; | |
4477 | ||
4478 | switch (type) | |
4479 | { | |
4480 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4481 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4482 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4483 | default: break; | |
4484 | } | |
4485 | ||
542d6675 | 4486 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4487 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4488 | { | |
db0bc284 | 4489 | hash_delete (md.dynreg_hash, dr->name, FALSE); |
20b36a95 | 4490 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4491 | dr->num_regs = 0; |
4492 | } | |
4493 | ||
4494 | drpp = &md.dynreg[type]; | |
4495 | while (1) | |
4496 | { | |
4497 | start = input_line_pointer; | |
4498 | ch = get_symbol_end (); | |
20b36a95 | 4499 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4500 | *input_line_pointer = ch; |
800eeca4 JW |
4501 | |
4502 | SKIP_WHITESPACE (); | |
4503 | if (*input_line_pointer != '[') | |
4504 | { | |
ad4b42b4 | 4505 | as_bad (_("Expected '['")); |
800eeca4 JW |
4506 | goto err; |
4507 | } | |
4508 | ++input_line_pointer; /* skip '[' */ | |
4509 | ||
4510 | num_regs = get_absolute_expression (); | |
4511 | ||
4512 | if (*input_line_pointer++ != ']') | |
4513 | { | |
ad4b42b4 | 4514 | as_bad (_("Expected ']'")); |
800eeca4 JW |
4515 | goto err; |
4516 | } | |
6a2375c6 JB |
4517 | if (num_regs <= 0) |
4518 | { | |
ad4b42b4 | 4519 | as_bad (_("Number of elements must be positive")); |
6a2375c6 JB |
4520 | goto err; |
4521 | } | |
800eeca4 JW |
4522 | SKIP_WHITESPACE (); |
4523 | ||
4524 | num_alloced += num_regs; | |
4525 | switch (type) | |
4526 | { | |
4527 | case DYNREG_GR: | |
4528 | if (num_alloced > md.rot.num_regs) | |
4529 | { | |
ad4b42b4 | 4530 | as_bad (_("Used more than the declared %d rotating registers"), |
800eeca4 JW |
4531 | md.rot.num_regs); |
4532 | goto err; | |
4533 | } | |
4534 | break; | |
4535 | case DYNREG_FR: | |
4536 | if (num_alloced > 96) | |
4537 | { | |
ad4b42b4 | 4538 | as_bad (_("Used more than the available 96 rotating registers")); |
800eeca4 JW |
4539 | goto err; |
4540 | } | |
4541 | break; | |
4542 | case DYNREG_PR: | |
4543 | if (num_alloced > 48) | |
4544 | { | |
ad4b42b4 | 4545 | as_bad (_("Used more than the available 48 rotating registers")); |
800eeca4 JW |
4546 | goto err; |
4547 | } | |
4548 | break; | |
4549 | ||
4550 | default: | |
4551 | break; | |
4552 | } | |
4553 | ||
800eeca4 JW |
4554 | if (!*drpp) |
4555 | { | |
4556 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4557 | memset (*drpp, 0, sizeof (*dr)); | |
4558 | } | |
4559 | ||
20b36a95 JB |
4560 | name = obstack_alloc (¬es, len + 1); |
4561 | memcpy (name, start, len); | |
4562 | name[len] = '\0'; | |
4563 | ||
800eeca4 JW |
4564 | dr = *drpp; |
4565 | dr->name = name; | |
4566 | dr->num_regs = num_regs; | |
4567 | dr->base = base_reg; | |
4568 | drpp = &dr->next; | |
4569 | base_reg += num_regs; | |
4570 | ||
4571 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4572 | { | |
ad4b42b4 | 4573 | as_bad (_("Attempt to redefine register set `%s'"), name); |
20b36a95 | 4574 | obstack_free (¬es, name); |
800eeca4 JW |
4575 | goto err; |
4576 | } | |
4577 | ||
4578 | if (*input_line_pointer != ',') | |
4579 | break; | |
4580 | ++input_line_pointer; /* skip comma */ | |
4581 | SKIP_WHITESPACE (); | |
4582 | } | |
4583 | demand_empty_rest_of_line (); | |
4584 | return; | |
4585 | ||
4586 | err: | |
4587 | ignore_rest_of_line (); | |
4588 | } | |
4589 | ||
4590 | static void | |
5a49b8ac | 4591 | dot_byteorder (int byteorder) |
800eeca4 | 4592 | { |
10a98291 L |
4593 | segment_info_type *seginfo = seg_info (now_seg); |
4594 | ||
4595 | if (byteorder == -1) | |
4596 | { | |
4597 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4598 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4599 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4600 | } | |
4601 | else | |
4602 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4603 | ||
4604 | if (target_big_endian != byteorder) | |
4605 | { | |
4606 | target_big_endian = byteorder; | |
4607 | if (target_big_endian) | |
4608 | { | |
4609 | ia64_number_to_chars = number_to_chars_bigendian; | |
4610 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4611 | } | |
4612 | else | |
4613 | { | |
4614 | ia64_number_to_chars = number_to_chars_littleendian; | |
4615 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4616 | } | |
4617 | } | |
800eeca4 JW |
4618 | } |
4619 | ||
4620 | static void | |
5a49b8ac | 4621 | dot_psr (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4622 | { |
4623 | char *option; | |
4624 | int ch; | |
4625 | ||
4626 | while (1) | |
4627 | { | |
4628 | option = input_line_pointer; | |
4629 | ch = get_symbol_end (); | |
4630 | if (strcmp (option, "lsb") == 0) | |
4631 | md.flags &= ~EF_IA_64_BE; | |
4632 | else if (strcmp (option, "msb") == 0) | |
4633 | md.flags |= EF_IA_64_BE; | |
4634 | else if (strcmp (option, "abi32") == 0) | |
4635 | md.flags &= ~EF_IA_64_ABI64; | |
4636 | else if (strcmp (option, "abi64") == 0) | |
4637 | md.flags |= EF_IA_64_ABI64; | |
4638 | else | |
ad4b42b4 | 4639 | as_bad (_("Unknown psr option `%s'"), option); |
800eeca4 JW |
4640 | *input_line_pointer = ch; |
4641 | ||
4642 | SKIP_WHITESPACE (); | |
4643 | if (*input_line_pointer != ',') | |
4644 | break; | |
4645 | ||
4646 | ++input_line_pointer; | |
4647 | SKIP_WHITESPACE (); | |
4648 | } | |
4649 | demand_empty_rest_of_line (); | |
4650 | } | |
4651 | ||
800eeca4 | 4652 | static void |
5a49b8ac | 4653 | dot_ln (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4654 | { |
4655 | new_logical_line (0, get_absolute_expression ()); | |
4656 | demand_empty_rest_of_line (); | |
4657 | } | |
4658 | ||
ef6a2b41 | 4659 | static void |
91d6fa6a | 4660 | cross_section (int ref, void (*builder) (int), int ua) |
800eeca4 | 4661 | { |
ef6a2b41 JB |
4662 | char *start, *end; |
4663 | int saved_auto_align; | |
4664 | unsigned int section_count; | |
800eeca4 JW |
4665 | |
4666 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4667 | start = input_line_pointer; |
4668 | if (*start == '"') | |
4669 | { | |
4670 | int len; | |
4671 | char *name; | |
4672 | ||
b3f19c14 | 4673 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4674 | obstack_free(¬es, name); |
4675 | if (!name) | |
4676 | { | |
4677 | ignore_rest_of_line (); | |
4678 | return; | |
4679 | } | |
4680 | } | |
b3f19c14 | 4681 | else |
800eeca4 | 4682 | { |
b3f19c14 JB |
4683 | char c = get_symbol_end (); |
4684 | ||
4685 | if (input_line_pointer == start) | |
4686 | { | |
ad4b42b4 | 4687 | as_bad (_("Missing section name")); |
b3f19c14 | 4688 | ignore_rest_of_line (); |
ef6a2b41 | 4689 | return; |
b3f19c14 | 4690 | } |
b3f19c14 | 4691 | *input_line_pointer = c; |
800eeca4 | 4692 | } |
ef6a2b41 | 4693 | end = input_line_pointer; |
800eeca4 JW |
4694 | SKIP_WHITESPACE (); |
4695 | if (*input_line_pointer != ',') | |
4696 | { | |
ad4b42b4 | 4697 | as_bad (_("Comma expected after section name")); |
800eeca4 | 4698 | ignore_rest_of_line (); |
ef6a2b41 | 4699 | return; |
800eeca4 | 4700 | } |
ef6a2b41 JB |
4701 | *end = '\0'; |
4702 | end = input_line_pointer + 1; /* skip comma */ | |
4703 | input_line_pointer = start; | |
4704 | md.keep_pending_output = 1; | |
91d6fa6a | 4705 | section_count = bfd_count_sections (stdoutput); |
ef6a2b41 | 4706 | obj_elf_section (0); |
91d6fa6a | 4707 | if (section_count != bfd_count_sections (stdoutput)) |
ad4b42b4 | 4708 | as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.")); |
ef6a2b41 JB |
4709 | input_line_pointer = end; |
4710 | saved_auto_align = md.auto_align; | |
4711 | if (ua) | |
4712 | md.auto_align = 0; | |
91d6fa6a | 4713 | (*builder) (ref); |
ef6a2b41 JB |
4714 | if (ua) |
4715 | md.auto_align = saved_auto_align; | |
4716 | obj_elf_previous (0); | |
4717 | md.keep_pending_output = 0; | |
800eeca4 JW |
4718 | } |
4719 | ||
4720 | static void | |
5a49b8ac | 4721 | dot_xdata (int size) |
800eeca4 | 4722 | { |
ef6a2b41 | 4723 | cross_section (size, cons, 0); |
800eeca4 JW |
4724 | } |
4725 | ||
4726 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4727 | |
800eeca4 | 4728 | static void |
5a49b8ac | 4729 | stmt_float_cons (int kind) |
800eeca4 | 4730 | { |
165a7f90 | 4731 | size_t alignment; |
800eeca4 JW |
4732 | |
4733 | switch (kind) | |
4734 | { | |
165a7f90 L |
4735 | case 'd': |
4736 | alignment = 8; | |
4737 | break; | |
4738 | ||
4739 | case 'x': | |
4740 | case 'X': | |
4741 | alignment = 16; | |
4742 | break; | |
800eeca4 JW |
4743 | |
4744 | case 'f': | |
4745 | default: | |
165a7f90 | 4746 | alignment = 4; |
800eeca4 JW |
4747 | break; |
4748 | } | |
165a7f90 | 4749 | ia64_do_align (alignment); |
800eeca4 JW |
4750 | float_cons (kind); |
4751 | } | |
4752 | ||
4753 | static void | |
5a49b8ac | 4754 | stmt_cons_ua (int size) |
800eeca4 JW |
4755 | { |
4756 | int saved_auto_align = md.auto_align; | |
4757 | ||
4758 | md.auto_align = 0; | |
4759 | cons (size); | |
4760 | md.auto_align = saved_auto_align; | |
4761 | } | |
4762 | ||
4763 | static void | |
5a49b8ac | 4764 | dot_xfloat_cons (int kind) |
800eeca4 | 4765 | { |
ef6a2b41 | 4766 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4767 | } |
4768 | ||
4769 | static void | |
38a57ae7 | 4770 | dot_xstringer (int zero) |
800eeca4 | 4771 | { |
ef6a2b41 | 4772 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4773 | } |
4774 | ||
4775 | static void | |
5a49b8ac | 4776 | dot_xdata_ua (int size) |
800eeca4 | 4777 | { |
ef6a2b41 | 4778 | cross_section (size, cons, 1); |
800eeca4 JW |
4779 | } |
4780 | ||
4781 | static void | |
5a49b8ac | 4782 | dot_xfloat_cons_ua (int kind) |
800eeca4 | 4783 | { |
ef6a2b41 | 4784 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4785 | } |
4786 | ||
4787 | /* .reg.val <regname>,value */ | |
542d6675 | 4788 | |
800eeca4 | 4789 | static void |
5a49b8ac | 4790 | dot_reg_val (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4791 | { |
4792 | expressionS reg; | |
4793 | ||
60d11e55 | 4794 | expression_and_evaluate (®); |
800eeca4 JW |
4795 | if (reg.X_op != O_register) |
4796 | { | |
4797 | as_bad (_("Register name expected")); | |
4798 | ignore_rest_of_line (); | |
4799 | } | |
4800 | else if (*input_line_pointer++ != ',') | |
4801 | { | |
4802 | as_bad (_("Comma expected")); | |
4803 | ignore_rest_of_line (); | |
4804 | } | |
197865e8 | 4805 | else |
800eeca4 JW |
4806 | { |
4807 | valueT value = get_absolute_expression (); | |
4808 | int regno = reg.X_add_number; | |
a66d2bb7 | 4809 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4810 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4811 | else |
542d6675 KH |
4812 | { |
4813 | gr_values[regno - REG_GR].known = 1; | |
4814 | gr_values[regno - REG_GR].value = value; | |
4815 | gr_values[regno - REG_GR].path = md.path; | |
4816 | } | |
800eeca4 JW |
4817 | } |
4818 | demand_empty_rest_of_line (); | |
4819 | } | |
4820 | ||
5e819f9c JW |
4821 | /* |
4822 | .serialize.data | |
4823 | .serialize.instruction | |
4824 | */ | |
4825 | static void | |
5a49b8ac | 4826 | dot_serialize (int type) |
5e819f9c JW |
4827 | { |
4828 | insn_group_break (0, 0, 0); | |
4829 | if (type) | |
4830 | instruction_serialization (); | |
4831 | else | |
4832 | data_serialization (); | |
4833 | insn_group_break (0, 0, 0); | |
4834 | demand_empty_rest_of_line (); | |
4835 | } | |
4836 | ||
197865e8 | 4837 | /* select dv checking mode |
800eeca4 JW |
4838 | .auto |
4839 | .explicit | |
4840 | .default | |
4841 | ||
197865e8 | 4842 | A stop is inserted when changing modes |
800eeca4 | 4843 | */ |
542d6675 | 4844 | |
800eeca4 | 4845 | static void |
5a49b8ac | 4846 | dot_dv_mode (int type) |
800eeca4 JW |
4847 | { |
4848 | if (md.manual_bundling) | |
4849 | as_warn (_("Directive invalid within a bundle")); | |
4850 | ||
4851 | if (type == 'E' || type == 'A') | |
4852 | md.mode_explicitly_set = 0; | |
4853 | else | |
4854 | md.mode_explicitly_set = 1; | |
4855 | ||
4856 | md.detect_dv = 1; | |
4857 | switch (type) | |
4858 | { | |
4859 | case 'A': | |
4860 | case 'a': | |
4861 | if (md.explicit_mode) | |
542d6675 | 4862 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4863 | md.explicit_mode = 0; |
4864 | break; | |
4865 | case 'E': | |
4866 | case 'e': | |
4867 | if (!md.explicit_mode) | |
542d6675 | 4868 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4869 | md.explicit_mode = 1; |
4870 | break; | |
4871 | default: | |
4872 | case 'd': | |
4873 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4874 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4875 | md.explicit_mode = md.default_explicit_mode; |
4876 | md.mode_explicitly_set = 0; | |
4877 | break; | |
4878 | } | |
4879 | } | |
4880 | ||
4881 | static void | |
5a49b8ac | 4882 | print_prmask (valueT mask) |
800eeca4 JW |
4883 | { |
4884 | int regno; | |
4885 | char *comma = ""; | |
542d6675 | 4886 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4887 | { |
542d6675 KH |
4888 | if (mask & ((valueT) 1 << regno)) |
4889 | { | |
4890 | fprintf (stderr, "%s p%d", comma, regno); | |
4891 | comma = ","; | |
4892 | } | |
800eeca4 JW |
4893 | } |
4894 | } | |
4895 | ||
4896 | /* | |
05ee4b0f JB |
4897 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
4898 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
4899 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
4900 | .pred.safe_across_calls p1 [, p2 [,...]] |
4901 | */ | |
542d6675 | 4902 | |
800eeca4 | 4903 | static void |
5a49b8ac | 4904 | dot_pred_rel (int type) |
800eeca4 JW |
4905 | { |
4906 | valueT mask = 0; | |
4907 | int count = 0; | |
4908 | int p1 = -1, p2 = -1; | |
4909 | ||
4910 | if (type == 0) | |
4911 | { | |
05ee4b0f | 4912 | if (*input_line_pointer == '"') |
542d6675 KH |
4913 | { |
4914 | int len; | |
4915 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 4916 | |
542d6675 KH |
4917 | if (strcmp (form, "mutex") == 0) |
4918 | type = 'm'; | |
4919 | else if (strcmp (form, "clear") == 0) | |
4920 | type = 'c'; | |
4921 | else if (strcmp (form, "imply") == 0) | |
4922 | type = 'i'; | |
05ee4b0f JB |
4923 | obstack_free (¬es, form); |
4924 | } | |
4925 | else if (*input_line_pointer == '@') | |
4926 | { | |
4927 | char *form = ++input_line_pointer; | |
4928 | char c = get_symbol_end(); | |
4929 | ||
4930 | if (strcmp (form, "mutex") == 0) | |
4931 | type = 'm'; | |
4932 | else if (strcmp (form, "clear") == 0) | |
4933 | type = 'c'; | |
4934 | else if (strcmp (form, "imply") == 0) | |
4935 | type = 'i'; | |
4936 | *input_line_pointer = c; | |
4937 | } | |
4938 | else | |
4939 | { | |
4940 | as_bad (_("Missing predicate relation type")); | |
4941 | ignore_rest_of_line (); | |
4942 | return; | |
4943 | } | |
4944 | if (type == 0) | |
4945 | { | |
4946 | as_bad (_("Unrecognized predicate relation type")); | |
4947 | ignore_rest_of_line (); | |
4948 | return; | |
542d6675 | 4949 | } |
800eeca4 | 4950 | if (*input_line_pointer == ',') |
542d6675 | 4951 | ++input_line_pointer; |
800eeca4 JW |
4952 | SKIP_WHITESPACE (); |
4953 | } | |
4954 | ||
800eeca4 JW |
4955 | while (1) |
4956 | { | |
20b36a95 | 4957 | valueT bits = 1; |
cc941dee | 4958 | int sep, regno; |
20b36a95 JB |
4959 | expressionS pr, *pr1, *pr2; |
4960 | ||
cd42ff9c | 4961 | sep = parse_operand_and_eval (&pr, ','); |
20b36a95 JB |
4962 | if (pr.X_op == O_register |
4963 | && pr.X_add_number >= REG_P | |
4964 | && pr.X_add_number <= REG_P + 63) | |
4965 | { | |
4966 | regno = pr.X_add_number - REG_P; | |
4967 | bits <<= regno; | |
4968 | count++; | |
4969 | if (p1 == -1) | |
4970 | p1 = regno; | |
4971 | else if (p2 == -1) | |
4972 | p2 = regno; | |
4973 | } | |
4974 | else if (type != 'i' | |
4975 | && pr.X_op == O_subtract | |
4976 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
4977 | && pr1->X_op == O_register | |
4978 | && pr1->X_add_number >= REG_P | |
4979 | && pr1->X_add_number <= REG_P + 63 | |
4980 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
4981 | && pr2->X_op == O_register | |
4982 | && pr2->X_add_number >= REG_P | |
4983 | && pr2->X_add_number <= REG_P + 63) | |
4984 | { | |
4985 | /* It's a range. */ | |
4986 | int stop; | |
4987 | ||
4988 | regno = pr1->X_add_number - REG_P; | |
4989 | stop = pr2->X_add_number - REG_P; | |
4990 | if (regno >= stop) | |
542d6675 KH |
4991 | { |
4992 | as_bad (_("Bad register range")); | |
4993 | ignore_rest_of_line (); | |
4994 | return; | |
4995 | } | |
20b36a95 JB |
4996 | bits = ((bits << stop) << 1) - (bits << regno); |
4997 | count += stop - regno + 1; | |
4998 | } | |
4999 | else | |
5000 | { | |
5001 | as_bad (_("Predicate register expected")); | |
5002 | ignore_rest_of_line (); | |
5003 | return; | |
542d6675 | 5004 | } |
20b36a95 JB |
5005 | if (mask & bits) |
5006 | as_warn (_("Duplicate predicate register ignored")); | |
5007 | mask |= bits; | |
cc941dee | 5008 | if (sep != ',') |
542d6675 | 5009 | break; |
800eeca4 JW |
5010 | } |
5011 | ||
5012 | switch (type) | |
5013 | { | |
5014 | case 'c': | |
5015 | if (count == 0) | |
542d6675 | 5016 | mask = ~(valueT) 0; |
800eeca4 | 5017 | clear_qp_mutex (mask); |
197865e8 | 5018 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5019 | break; |
5020 | case 'i': | |
5021 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5022 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5023 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5024 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5025 | else |
542d6675 | 5026 | add_qp_imply (p1, p2); |
800eeca4 JW |
5027 | break; |
5028 | case 'm': | |
5029 | if (count < 2) | |
542d6675 KH |
5030 | { |
5031 | as_bad (_("At least two PR arguments expected")); | |
5032 | break; | |
5033 | } | |
800eeca4 | 5034 | else if (mask & 1) |
542d6675 KH |
5035 | { |
5036 | as_bad (_("Use of p0 is not valid in this context")); | |
5037 | break; | |
5038 | } | |
800eeca4 JW |
5039 | add_qp_mutex (mask); |
5040 | break; | |
5041 | case 's': | |
5042 | /* note that we don't override any existing relations */ | |
5043 | if (count == 0) | |
542d6675 KH |
5044 | { |
5045 | as_bad (_("At least one PR argument expected")); | |
5046 | break; | |
5047 | } | |
800eeca4 | 5048 | if (md.debug_dv) |
542d6675 KH |
5049 | { |
5050 | fprintf (stderr, "Safe across calls: "); | |
5051 | print_prmask (mask); | |
5052 | fprintf (stderr, "\n"); | |
5053 | } | |
800eeca4 JW |
5054 | qp_safe_across_calls = mask; |
5055 | break; | |
5056 | } | |
5057 | demand_empty_rest_of_line (); | |
5058 | } | |
5059 | ||
5060 | /* .entry label [, label [, ...]] | |
5061 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5062 | Otherwise, only global labels are considered entry points. */ |
5063 | ||
800eeca4 | 5064 | static void |
5a49b8ac | 5065 | dot_entry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5066 | { |
5067 | const char *err; | |
5068 | char *name; | |
5069 | int c; | |
5070 | symbolS *symbolP; | |
5071 | ||
5072 | do | |
5073 | { | |
5074 | name = input_line_pointer; | |
5075 | c = get_symbol_end (); | |
5076 | symbolP = symbol_find_or_make (name); | |
5077 | ||
5a49b8ac | 5078 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (void *) symbolP); |
800eeca4 | 5079 | if (err) |
542d6675 KH |
5080 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5081 | name, err); | |
800eeca4 JW |
5082 | |
5083 | *input_line_pointer = c; | |
5084 | SKIP_WHITESPACE (); | |
5085 | c = *input_line_pointer; | |
5086 | if (c == ',') | |
5087 | { | |
5088 | input_line_pointer++; | |
5089 | SKIP_WHITESPACE (); | |
5090 | if (*input_line_pointer == '\n') | |
5091 | c = '\n'; | |
5092 | } | |
5093 | } | |
5094 | while (c == ','); | |
5095 | ||
5096 | demand_empty_rest_of_line (); | |
5097 | } | |
5098 | ||
197865e8 | 5099 | /* .mem.offset offset, base |
542d6675 KH |
5100 | "base" is used to distinguish between offsets from a different base. */ |
5101 | ||
800eeca4 | 5102 | static void |
5a49b8ac | 5103 | dot_mem_offset (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5104 | { |
5105 | md.mem_offset.hint = 1; | |
5106 | md.mem_offset.offset = get_absolute_expression (); | |
5107 | if (*input_line_pointer != ',') | |
5108 | { | |
5109 | as_bad (_("Comma expected")); | |
5110 | ignore_rest_of_line (); | |
5111 | return; | |
5112 | } | |
5113 | ++input_line_pointer; | |
5114 | md.mem_offset.base = get_absolute_expression (); | |
5115 | demand_empty_rest_of_line (); | |
5116 | } | |
5117 | ||
542d6675 | 5118 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5119 | const pseudo_typeS md_pseudo_table[] = |
5120 | { | |
5121 | { "radix", dot_radix, 0 }, | |
5122 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5123 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5124 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5125 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5126 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5127 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5128 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5129 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5130 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5131 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5132 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5133 | { "proc", dot_proc, 0 }, |
5134 | { "body", dot_body, 0 }, | |
5135 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5136 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5137 | |
5138 | { "fframe", dot_fframe, 0 }, | |
5139 | { "vframe", dot_vframe, 0 }, | |
5140 | { "vframesp", dot_vframesp, 0 }, | |
e4e8248d | 5141 | { "vframepsp", dot_vframesp, 1 }, |
2434f565 JW |
5142 | { "save", dot_save, 0 }, |
5143 | { "restore", dot_restore, 0 }, | |
5144 | { "restorereg", dot_restorereg, 0 }, | |
e4e8248d | 5145 | { "restorereg.p", dot_restorereg, 1 }, |
2434f565 JW |
5146 | { "handlerdata", dot_handlerdata, 0 }, |
5147 | { "unwentry", dot_unwentry, 0 }, | |
5148 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5149 | { "savesp", dot_savemem, 0 }, |
5150 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5151 | { "save.g", dot_saveg, 0 }, |
5152 | { "save.f", dot_savef, 0 }, | |
5153 | { "save.b", dot_saveb, 0 }, | |
5154 | { "save.gf", dot_savegf, 0 }, | |
5155 | { "spill", dot_spill, 0 }, | |
5156 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5157 | { "spillsp", dot_spillmem, 0 }, |
5158 | { "spillpsp", dot_spillmem, 1 }, | |
e4e8248d JB |
5159 | { "spillreg.p", dot_spillreg, 1 }, |
5160 | { "spillsp.p", dot_spillmem, ~0 }, | |
5161 | { "spillpsp.p", dot_spillmem, ~1 }, | |
2434f565 JW |
5162 | { "label_state", dot_label_state, 0 }, |
5163 | { "copy_state", dot_copy_state, 0 }, | |
5164 | { "unwabi", dot_unwabi, 0 }, | |
5165 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5166 | { "mii", dot_template, 0x0 }, |
5167 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5168 | { "mlx", dot_template, 0x2 }, | |
5169 | { "mmi", dot_template, 0x4 }, | |
5170 | { "mfi", dot_template, 0x6 }, | |
5171 | { "mmf", dot_template, 0x7 }, | |
5172 | { "mib", dot_template, 0x8 }, | |
5173 | { "mbb", dot_template, 0x9 }, | |
5174 | { "bbb", dot_template, 0xb }, | |
5175 | { "mmb", dot_template, 0xc }, | |
5176 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5177 | { "align", dot_align, 0 }, |
800eeca4 JW |
5178 | { "regstk", dot_regstk, 0 }, |
5179 | { "rotr", dot_rot, DYNREG_GR }, | |
5180 | { "rotf", dot_rot, DYNREG_FR }, | |
5181 | { "rotp", dot_rot, DYNREG_PR }, | |
5182 | { "lsb", dot_byteorder, 0 }, | |
5183 | { "msb", dot_byteorder, 1 }, | |
5184 | { "psr", dot_psr, 0 }, | |
5185 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5186 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5187 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5188 | ||
5189 | { "xdata1", dot_xdata, 1 }, | |
5190 | { "xdata2", dot_xdata, 2 }, | |
5191 | { "xdata4", dot_xdata, 4 }, | |
5192 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5193 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5194 | { "xreal4", dot_xfloat_cons, 'f' }, |
5195 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5196 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5197 | { "xreal16", dot_xfloat_cons, 'X' }, |
38a57ae7 NC |
5198 | { "xstring", dot_xstringer, 8 + 0 }, |
5199 | { "xstringz", dot_xstringer, 8 + 1 }, | |
800eeca4 | 5200 | |
542d6675 | 5201 | /* unaligned versions: */ |
800eeca4 JW |
5202 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5203 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5204 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5205 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5206 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5207 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5208 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5209 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5210 | |
5211 | /* annotations/DV checking support */ | |
5212 | { "entry", dot_entry, 0 }, | |
2434f565 | 5213 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5214 | { "pred.rel", dot_pred_rel, 0 }, |
5215 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5216 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5217 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5218 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5219 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5220 | { "serialize.data", dot_serialize, 0 }, |
5221 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5222 | { "auto", dot_dv_mode, 'a' }, |
5223 | { "explicit", dot_dv_mode, 'e' }, | |
5224 | { "default", dot_dv_mode, 'd' }, | |
5225 | ||
87885043 JW |
5226 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5227 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5228 | tell it that these ones are supposed to be unaligned. Long term, | |
5229 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5230 | are aligned by default. */ | |
5231 | {"2byte", stmt_cons_ua, 2}, | |
5232 | {"4byte", stmt_cons_ua, 4}, | |
5233 | {"8byte", stmt_cons_ua, 8}, | |
5234 | ||
800eeca4 JW |
5235 | { NULL, 0, 0 } |
5236 | }; | |
5237 | ||
5238 | static const struct pseudo_opcode | |
5239 | { | |
5240 | const char *name; | |
5241 | void (*handler) (int); | |
5242 | int arg; | |
5243 | } | |
5244 | pseudo_opcode[] = | |
5245 | { | |
5246 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5247 | { "data1", cons, 1 }, | |
5248 | { "data2", cons, 2 }, | |
5249 | { "data4", cons, 4 }, | |
5250 | { "data8", cons, 8 }, | |
3969b680 | 5251 | { "data16", cons, 16 }, |
800eeca4 JW |
5252 | { "real4", stmt_float_cons, 'f' }, |
5253 | { "real8", stmt_float_cons, 'd' }, | |
5254 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5255 | { "real16", stmt_float_cons, 'X' }, |
38a57ae7 NC |
5256 | { "string", stringer, 8 + 0 }, |
5257 | { "stringz", stringer, 8 + 1 }, | |
800eeca4 | 5258 | |
542d6675 | 5259 | /* unaligned versions: */ |
800eeca4 JW |
5260 | { "data2.ua", stmt_cons_ua, 2 }, |
5261 | { "data4.ua", stmt_cons_ua, 4 }, | |
5262 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5263 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5264 | { "real4.ua", float_cons, 'f' }, |
5265 | { "real8.ua", float_cons, 'd' }, | |
5266 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5267 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5268 | }; |
5269 | ||
5270 | /* Declare a register by creating a symbol for it and entering it in | |
5271 | the symbol table. */ | |
542d6675 KH |
5272 | |
5273 | static symbolS * | |
5a49b8ac | 5274 | declare_register (const char *name, unsigned int regnum) |
800eeca4 JW |
5275 | { |
5276 | const char *err; | |
5277 | symbolS *sym; | |
5278 | ||
5e0bd176 | 5279 | sym = symbol_create (name, reg_section, regnum, &zero_address_frag); |
800eeca4 | 5280 | |
5a49b8ac | 5281 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (void *) sym); |
800eeca4 JW |
5282 | if (err) |
5283 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5284 | name, err); | |
5285 | ||
5286 | return sym; | |
5287 | } | |
5288 | ||
5289 | static void | |
5a49b8ac AM |
5290 | declare_register_set (const char *prefix, |
5291 | unsigned int num_regs, | |
5292 | unsigned int base_regnum) | |
800eeca4 JW |
5293 | { |
5294 | char name[8]; | |
8b84be9d | 5295 | unsigned int i; |
800eeca4 JW |
5296 | |
5297 | for (i = 0; i < num_regs; ++i) | |
5298 | { | |
f9f21a03 | 5299 | snprintf (name, sizeof (name), "%s%u", prefix, i); |
800eeca4 JW |
5300 | declare_register (name, base_regnum + i); |
5301 | } | |
5302 | } | |
5303 | ||
5304 | static unsigned int | |
5a49b8ac | 5305 | operand_width (enum ia64_opnd opnd) |
800eeca4 JW |
5306 | { |
5307 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5308 | unsigned int bits = 0; | |
5309 | int i; | |
5310 | ||
5311 | bits = 0; | |
5312 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5313 | bits += odesc->field[i].bits; | |
5314 | ||
5315 | return bits; | |
5316 | } | |
5317 | ||
87f8eb97 | 5318 | static enum operand_match_result |
91d6fa6a | 5319 | operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) |
800eeca4 | 5320 | { |
91d6fa6a | 5321 | enum ia64_opnd opnd = idesc->operands[res_index]; |
800eeca4 JW |
5322 | int bits, relocatable = 0; |
5323 | struct insn_fix *fix; | |
5324 | bfd_signed_vma val; | |
5325 | ||
5326 | switch (opnd) | |
5327 | { | |
542d6675 | 5328 | /* constants: */ |
800eeca4 JW |
5329 | |
5330 | case IA64_OPND_AR_CCV: | |
5331 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5332 | return OPERAND_MATCH; |
800eeca4 JW |
5333 | break; |
5334 | ||
c10d9d8f JW |
5335 | case IA64_OPND_AR_CSD: |
5336 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5337 | return OPERAND_MATCH; | |
5338 | break; | |
5339 | ||
800eeca4 JW |
5340 | case IA64_OPND_AR_PFS: |
5341 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5342 | return OPERAND_MATCH; |
800eeca4 JW |
5343 | break; |
5344 | ||
5345 | case IA64_OPND_GR0: | |
5346 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5347 | return OPERAND_MATCH; |
800eeca4 JW |
5348 | break; |
5349 | ||
5350 | case IA64_OPND_IP: | |
5351 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5352 | return OPERAND_MATCH; |
800eeca4 JW |
5353 | break; |
5354 | ||
5355 | case IA64_OPND_PR: | |
5356 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5357 | return OPERAND_MATCH; |
800eeca4 JW |
5358 | break; |
5359 | ||
5360 | case IA64_OPND_PR_ROT: | |
5361 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5362 | return OPERAND_MATCH; |
800eeca4 JW |
5363 | break; |
5364 | ||
5365 | case IA64_OPND_PSR: | |
5366 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5367 | return OPERAND_MATCH; |
800eeca4 JW |
5368 | break; |
5369 | ||
5370 | case IA64_OPND_PSR_L: | |
5371 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5372 | return OPERAND_MATCH; |
800eeca4 JW |
5373 | break; |
5374 | ||
5375 | case IA64_OPND_PSR_UM: | |
5376 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5377 | return OPERAND_MATCH; |
800eeca4 JW |
5378 | break; |
5379 | ||
5380 | case IA64_OPND_C1: | |
87f8eb97 JW |
5381 | if (e->X_op == O_constant) |
5382 | { | |
5383 | if (e->X_add_number == 1) | |
5384 | return OPERAND_MATCH; | |
5385 | else | |
5386 | return OPERAND_OUT_OF_RANGE; | |
5387 | } | |
800eeca4 JW |
5388 | break; |
5389 | ||
5390 | case IA64_OPND_C8: | |
87f8eb97 JW |
5391 | if (e->X_op == O_constant) |
5392 | { | |
5393 | if (e->X_add_number == 8) | |
5394 | return OPERAND_MATCH; | |
5395 | else | |
5396 | return OPERAND_OUT_OF_RANGE; | |
5397 | } | |
800eeca4 JW |
5398 | break; |
5399 | ||
5400 | case IA64_OPND_C16: | |
87f8eb97 JW |
5401 | if (e->X_op == O_constant) |
5402 | { | |
5403 | if (e->X_add_number == 16) | |
5404 | return OPERAND_MATCH; | |
5405 | else | |
5406 | return OPERAND_OUT_OF_RANGE; | |
5407 | } | |
800eeca4 JW |
5408 | break; |
5409 | ||
542d6675 | 5410 | /* register operands: */ |
800eeca4 JW |
5411 | |
5412 | case IA64_OPND_AR3: | |
5413 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5414 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5415 | return OPERAND_MATCH; |
800eeca4 JW |
5416 | break; |
5417 | ||
5418 | case IA64_OPND_B1: | |
5419 | case IA64_OPND_B2: | |
5420 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5421 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5422 | return OPERAND_MATCH; |
800eeca4 JW |
5423 | break; |
5424 | ||
5425 | case IA64_OPND_CR3: | |
5426 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5427 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5428 | return OPERAND_MATCH; |
800eeca4 JW |
5429 | break; |
5430 | ||
5431 | case IA64_OPND_F1: | |
5432 | case IA64_OPND_F2: | |
5433 | case IA64_OPND_F3: | |
5434 | case IA64_OPND_F4: | |
5435 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5436 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5437 | return OPERAND_MATCH; |
800eeca4 JW |
5438 | break; |
5439 | ||
5440 | case IA64_OPND_P1: | |
5441 | case IA64_OPND_P2: | |
5442 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5443 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5444 | return OPERAND_MATCH; |
800eeca4 JW |
5445 | break; |
5446 | ||
5447 | case IA64_OPND_R1: | |
5448 | case IA64_OPND_R2: | |
5449 | case IA64_OPND_R3: | |
5450 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5451 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5452 | return OPERAND_MATCH; |
800eeca4 JW |
5453 | break; |
5454 | ||
5455 | case IA64_OPND_R3_2: | |
87f8eb97 | 5456 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5457 | { |
87f8eb97 JW |
5458 | if (e->X_add_number < REG_GR + 4) |
5459 | return OPERAND_MATCH; | |
5460 | else if (e->X_add_number < REG_GR + 128) | |
5461 | return OPERAND_OUT_OF_RANGE; | |
5462 | } | |
800eeca4 JW |
5463 | break; |
5464 | ||
542d6675 | 5465 | /* indirect operands: */ |
800eeca4 JW |
5466 | case IA64_OPND_CPUID_R3: |
5467 | case IA64_OPND_DBR_R3: | |
5468 | case IA64_OPND_DTR_R3: | |
5469 | case IA64_OPND_ITR_R3: | |
5470 | case IA64_OPND_IBR_R3: | |
5471 | case IA64_OPND_MSR_R3: | |
5472 | case IA64_OPND_PKR_R3: | |
5473 | case IA64_OPND_PMC_R3: | |
5474 | case IA64_OPND_PMD_R3: | |
5475 | case IA64_OPND_RR_R3: | |
5476 | if (e->X_op == O_index && e->X_op_symbol | |
5477 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5478 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5479 | return OPERAND_MATCH; |
800eeca4 JW |
5480 | break; |
5481 | ||
5482 | case IA64_OPND_MR3: | |
5483 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5484 | return OPERAND_MATCH; |
800eeca4 JW |
5485 | break; |
5486 | ||
542d6675 | 5487 | /* immediate operands: */ |
800eeca4 JW |
5488 | case IA64_OPND_CNT2a: |
5489 | case IA64_OPND_LEN4: | |
5490 | case IA64_OPND_LEN6: | |
91d6fa6a | 5491 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 JW |
5492 | if (e->X_op == O_constant) |
5493 | { | |
5494 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5495 | return OPERAND_MATCH; | |
5496 | else | |
5497 | return OPERAND_OUT_OF_RANGE; | |
5498 | } | |
800eeca4 JW |
5499 | break; |
5500 | ||
5501 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5502 | if (e->X_op == O_constant) |
5503 | { | |
5504 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5505 | return OPERAND_MATCH; | |
5506 | else | |
5507 | return OPERAND_OUT_OF_RANGE; | |
5508 | } | |
800eeca4 JW |
5509 | break; |
5510 | ||
5511 | case IA64_OPND_CNT2c: | |
5512 | val = e->X_add_number; | |
87f8eb97 JW |
5513 | if (e->X_op == O_constant) |
5514 | { | |
5515 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5516 | return OPERAND_MATCH; | |
5517 | else | |
5518 | return OPERAND_OUT_OF_RANGE; | |
5519 | } | |
800eeca4 JW |
5520 | break; |
5521 | ||
5522 | case IA64_OPND_SOR: | |
5523 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5524 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5525 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5526 | case IA64_OPND_SOF: |
5527 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5528 | if (e->X_op == O_constant) |
5529 | { | |
5530 | if ((bfd_vma) e->X_add_number <= 96) | |
5531 | return OPERAND_MATCH; | |
5532 | else | |
5533 | return OPERAND_OUT_OF_RANGE; | |
5534 | } | |
800eeca4 JW |
5535 | break; |
5536 | ||
5537 | case IA64_OPND_IMMU62: | |
5538 | if (e->X_op == O_constant) | |
542d6675 | 5539 | { |
800eeca4 | 5540 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5541 | return OPERAND_MATCH; |
5542 | else | |
5543 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5544 | } |
197865e8 | 5545 | else |
542d6675 KH |
5546 | { |
5547 | /* FIXME -- need 62-bit relocation type */ | |
5548 | as_bad (_("62-bit relocation not yet implemented")); | |
5549 | } | |
800eeca4 JW |
5550 | break; |
5551 | ||
5552 | case IA64_OPND_IMMU64: | |
5553 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5554 | || e->X_op == O_subtract) | |
5555 | { | |
5556 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5557 | fix->code = BFD_RELOC_IA64_IMM64; | |
5558 | if (e->X_op != O_subtract) | |
5559 | { | |
5560 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5561 | if (e->X_op == O_pseudo_fixup) | |
5562 | e->X_op = O_symbol; | |
5563 | } | |
5564 | ||
91d6fa6a | 5565 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5566 | fix->expr = *e; |
5567 | fix->is_pcrel = 0; | |
5568 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5569 | return OPERAND_MATCH; |
800eeca4 JW |
5570 | } |
5571 | else if (e->X_op == O_constant) | |
87f8eb97 | 5572 | return OPERAND_MATCH; |
800eeca4 JW |
5573 | break; |
5574 | ||
59cf82fe L |
5575 | case IA64_OPND_IMMU5b: |
5576 | if (e->X_op == O_constant) | |
5577 | { | |
5578 | val = e->X_add_number; | |
5579 | if (val >= 32 && val <= 63) | |
5580 | return OPERAND_MATCH; | |
5581 | else | |
5582 | return OPERAND_OUT_OF_RANGE; | |
5583 | } | |
5584 | break; | |
5585 | ||
800eeca4 JW |
5586 | case IA64_OPND_CCNT5: |
5587 | case IA64_OPND_CNT5: | |
5588 | case IA64_OPND_CNT6: | |
5589 | case IA64_OPND_CPOS6a: | |
5590 | case IA64_OPND_CPOS6b: | |
5591 | case IA64_OPND_CPOS6c: | |
5592 | case IA64_OPND_IMMU2: | |
5593 | case IA64_OPND_IMMU7a: | |
5594 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5595 | case IA64_OPND_IMMU21: |
5596 | case IA64_OPND_IMMU24: | |
5597 | case IA64_OPND_MBTYPE4: | |
5598 | case IA64_OPND_MHTYPE8: | |
5599 | case IA64_OPND_POS6: | |
91d6fa6a | 5600 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 JW |
5601 | if (e->X_op == O_constant) |
5602 | { | |
5603 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5604 | return OPERAND_MATCH; | |
5605 | else | |
5606 | return OPERAND_OUT_OF_RANGE; | |
5607 | } | |
800eeca4 JW |
5608 | break; |
5609 | ||
bf3ca999 | 5610 | case IA64_OPND_IMMU9: |
91d6fa6a | 5611 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 | 5612 | if (e->X_op == O_constant) |
542d6675 | 5613 | { |
87f8eb97 JW |
5614 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5615 | { | |
5616 | int lobits = e->X_add_number & 0x3; | |
5617 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5618 | e->X_add_number |= (bfd_vma) 0x3; | |
5619 | return OPERAND_MATCH; | |
5620 | } | |
5621 | else | |
5622 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5623 | } |
bf3ca999 TW |
5624 | break; |
5625 | ||
800eeca4 JW |
5626 | case IA64_OPND_IMM44: |
5627 | /* least 16 bits must be zero */ | |
5628 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5629 | /* XXX technically, this is wrong: we should not be issuing warning |
5630 | messages until we're sure this instruction pattern is going to | |
5631 | be used! */ | |
542d6675 | 5632 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5633 | |
87f8eb97 | 5634 | if (e->X_op == O_constant) |
542d6675 | 5635 | { |
87f8eb97 JW |
5636 | if (((e->X_add_number >= 0 |
5637 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5638 | || (e->X_add_number < 0 | |
5639 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5640 | { |
87f8eb97 JW |
5641 | /* sign-extend */ |
5642 | if (e->X_add_number >= 0 | |
5643 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5644 | { | |
5645 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5646 | } | |
5647 | return OPERAND_MATCH; | |
542d6675 | 5648 | } |
87f8eb97 JW |
5649 | else |
5650 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5651 | } |
800eeca4 JW |
5652 | break; |
5653 | ||
5654 | case IA64_OPND_IMM17: | |
5655 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5656 | if (e->X_op == O_constant) |
542d6675 | 5657 | { |
87f8eb97 JW |
5658 | if (((e->X_add_number >= 0 |
5659 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5660 | || (e->X_add_number < 0 | |
5661 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5662 | { |
87f8eb97 JW |
5663 | /* sign-extend */ |
5664 | if (e->X_add_number >= 0 | |
5665 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5666 | { | |
5667 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5668 | } | |
5669 | return OPERAND_MATCH; | |
542d6675 | 5670 | } |
87f8eb97 JW |
5671 | else |
5672 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5673 | } |
800eeca4 JW |
5674 | break; |
5675 | ||
5676 | case IA64_OPND_IMM14: | |
5677 | case IA64_OPND_IMM22: | |
5678 | relocatable = 1; | |
5679 | case IA64_OPND_IMM1: | |
5680 | case IA64_OPND_IMM8: | |
5681 | case IA64_OPND_IMM8U4: | |
5682 | case IA64_OPND_IMM8M1: | |
5683 | case IA64_OPND_IMM8M1U4: | |
5684 | case IA64_OPND_IMM8M1U8: | |
5685 | case IA64_OPND_IMM9a: | |
5686 | case IA64_OPND_IMM9b: | |
91d6fa6a | 5687 | bits = operand_width (idesc->operands[res_index]); |
800eeca4 JW |
5688 | if (relocatable && (e->X_op == O_symbol |
5689 | || e->X_op == O_subtract | |
5690 | || e->X_op == O_pseudo_fixup)) | |
5691 | { | |
5692 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5693 | ||
91d6fa6a | 5694 | if (idesc->operands[res_index] == IA64_OPND_IMM14) |
800eeca4 JW |
5695 | fix->code = BFD_RELOC_IA64_IMM14; |
5696 | else | |
5697 | fix->code = BFD_RELOC_IA64_IMM22; | |
5698 | ||
5699 | if (e->X_op != O_subtract) | |
5700 | { | |
5701 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5702 | if (e->X_op == O_pseudo_fixup) | |
5703 | e->X_op = O_symbol; | |
5704 | } | |
5705 | ||
91d6fa6a | 5706 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5707 | fix->expr = *e; |
5708 | fix->is_pcrel = 0; | |
5709 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5710 | return OPERAND_MATCH; |
800eeca4 JW |
5711 | } |
5712 | else if (e->X_op != O_constant | |
5713 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5714 | return OPERAND_MISMATCH; |
800eeca4 JW |
5715 | |
5716 | if (opnd == IA64_OPND_IMM8M1U4) | |
5717 | { | |
5718 | /* Zero is not valid for unsigned compares that take an adjusted | |
5719 | constant immediate range. */ | |
5720 | if (e->X_add_number == 0) | |
87f8eb97 | 5721 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5722 | |
5723 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5724 | checks will work. */ | |
5725 | val = e->X_add_number; | |
197865e8 KH |
5726 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5727 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5728 | val = ((val << 32) >> 32); |
5729 | ||
5730 | /* Check for 0x100000000. This is valid because | |
5731 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5732 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5733 | return OPERAND_MATCH; |
800eeca4 JW |
5734 | |
5735 | val = val - 1; | |
5736 | } | |
5737 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5738 | { | |
5739 | /* Zero is not valid for unsigned compares that take an adjusted | |
5740 | constant immediate range. */ | |
5741 | if (e->X_add_number == 0) | |
87f8eb97 | 5742 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5743 | |
5744 | /* Check for 0x10000000000000000. */ | |
5745 | if (e->X_op == O_big) | |
5746 | { | |
5747 | if (generic_bignum[0] == 0 | |
5748 | && generic_bignum[1] == 0 | |
5749 | && generic_bignum[2] == 0 | |
5750 | && generic_bignum[3] == 0 | |
5751 | && generic_bignum[4] == 1) | |
87f8eb97 | 5752 | return OPERAND_MATCH; |
800eeca4 | 5753 | else |
87f8eb97 | 5754 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5755 | } |
5756 | else | |
5757 | val = e->X_add_number - 1; | |
5758 | } | |
5759 | else if (opnd == IA64_OPND_IMM8M1) | |
5760 | val = e->X_add_number - 1; | |
5761 | else if (opnd == IA64_OPND_IMM8U4) | |
5762 | { | |
5763 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5764 | checks will work. */ | |
5765 | val = e->X_add_number; | |
197865e8 KH |
5766 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5767 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5768 | val = ((val << 32) >> 32); |
5769 | } | |
5770 | else | |
5771 | val = e->X_add_number; | |
5772 | ||
2434f565 JW |
5773 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5774 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5775 | return OPERAND_MATCH; |
5776 | else | |
5777 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5778 | |
5779 | case IA64_OPND_INC3: | |
5780 | /* +/- 1, 4, 8, 16 */ | |
5781 | val = e->X_add_number; | |
5782 | if (val < 0) | |
5783 | val = -val; | |
87f8eb97 JW |
5784 | if (e->X_op == O_constant) |
5785 | { | |
5786 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5787 | return OPERAND_MATCH; | |
5788 | else | |
5789 | return OPERAND_OUT_OF_RANGE; | |
5790 | } | |
800eeca4 JW |
5791 | break; |
5792 | ||
5793 | case IA64_OPND_TGT25: | |
5794 | case IA64_OPND_TGT25b: | |
5795 | case IA64_OPND_TGT25c: | |
5796 | case IA64_OPND_TGT64: | |
5797 | if (e->X_op == O_symbol) | |
5798 | { | |
5799 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5800 | if (opnd == IA64_OPND_TGT25) | |
5801 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5802 | else if (opnd == IA64_OPND_TGT25b) | |
5803 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5804 | else if (opnd == IA64_OPND_TGT25c) | |
5805 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5806 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5807 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5808 | else | |
5809 | abort (); | |
5810 | ||
800eeca4 | 5811 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
91d6fa6a | 5812 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5813 | fix->expr = *e; |
5814 | fix->is_pcrel = 1; | |
5815 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5816 | return OPERAND_MATCH; |
800eeca4 JW |
5817 | } |
5818 | case IA64_OPND_TAG13: | |
5819 | case IA64_OPND_TAG13b: | |
5820 | switch (e->X_op) | |
5821 | { | |
5822 | case O_constant: | |
87f8eb97 | 5823 | return OPERAND_MATCH; |
800eeca4 JW |
5824 | |
5825 | case O_symbol: | |
5826 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 5827 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 5828 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
5829 | fix->code = BFD_RELOC_UNUSED; |
5830 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
91d6fa6a | 5831 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5832 | fix->expr = *e; |
5833 | fix->is_pcrel = 1; | |
5834 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5835 | return OPERAND_MATCH; |
800eeca4 JW |
5836 | |
5837 | default: | |
5838 | break; | |
5839 | } | |
5840 | break; | |
5841 | ||
a823923b RH |
5842 | case IA64_OPND_LDXMOV: |
5843 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5844 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
91d6fa6a | 5845 | fix->opnd = idesc->operands[res_index]; |
a823923b RH |
5846 | fix->expr = *e; |
5847 | fix->is_pcrel = 0; | |
5848 | ++CURR_SLOT.num_fixups; | |
5849 | return OPERAND_MATCH; | |
5850 | ||
800eeca4 JW |
5851 | default: |
5852 | break; | |
5853 | } | |
87f8eb97 | 5854 | return OPERAND_MISMATCH; |
800eeca4 JW |
5855 | } |
5856 | ||
5857 | static int | |
5a49b8ac | 5858 | parse_operand (expressionS *e, int more) |
800eeca4 JW |
5859 | { |
5860 | int sep = '\0'; | |
5861 | ||
5862 | memset (e, 0, sizeof (*e)); | |
5863 | e->X_op = O_absent; | |
5864 | SKIP_WHITESPACE (); | |
cd42ff9c | 5865 | expression (e); |
e4e8248d JB |
5866 | sep = *input_line_pointer; |
5867 | if (more && (sep == ',' || sep == more)) | |
5868 | ++input_line_pointer; | |
800eeca4 JW |
5869 | return sep; |
5870 | } | |
5871 | ||
cd42ff9c AM |
5872 | static int |
5873 | parse_operand_and_eval (expressionS *e, int more) | |
5874 | { | |
5875 | int sep = parse_operand (e, more); | |
5876 | resolve_expression (e); | |
5877 | return sep; | |
5878 | } | |
5879 | ||
5880 | static int | |
5881 | parse_operand_maybe_eval (expressionS *e, int more, enum ia64_opnd op) | |
5882 | { | |
5883 | int sep = parse_operand (e, more); | |
5884 | switch (op) | |
5885 | { | |
5886 | case IA64_OPND_IMM14: | |
5887 | case IA64_OPND_IMM22: | |
5888 | case IA64_OPND_IMMU64: | |
5889 | case IA64_OPND_TGT25: | |
5890 | case IA64_OPND_TGT25b: | |
5891 | case IA64_OPND_TGT25c: | |
5892 | case IA64_OPND_TGT64: | |
5893 | case IA64_OPND_TAG13: | |
5894 | case IA64_OPND_TAG13b: | |
5895 | case IA64_OPND_LDXMOV: | |
5896 | break; | |
5897 | default: | |
5898 | resolve_expression (e); | |
5899 | break; | |
5900 | } | |
5901 | return sep; | |
5902 | } | |
5903 | ||
800eeca4 JW |
5904 | /* Returns the next entry in the opcode table that matches the one in |
5905 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5906 | found, NULL is returned instead. */ |
800eeca4 JW |
5907 | |
5908 | static struct ia64_opcode * | |
5909 | get_next_opcode (struct ia64_opcode *idesc) | |
5910 | { | |
5911 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
5912 | ia64_free_opcode (idesc); | |
5913 | return next; | |
5914 | } | |
5915 | ||
5916 | /* Parse the operands for the opcode and find the opcode variant that | |
5917 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
5918 | |
5919 | static struct ia64_opcode * | |
5a49b8ac | 5920 | parse_operands (struct ia64_opcode *idesc) |
800eeca4 JW |
5921 | { |
5922 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 5923 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
5924 | int reg1, reg2; |
5925 | char reg_class; | |
800eeca4 | 5926 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 5927 | enum operand_match_result result; |
800eeca4 JW |
5928 | char mnemonic[129]; |
5929 | char *first_arg = 0, *end, *saved_input_pointer; | |
5930 | unsigned int sof; | |
5931 | ||
9c2799c2 | 5932 | gas_assert (strlen (idesc->name) <= 128); |
800eeca4 JW |
5933 | |
5934 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
5935 | if (idesc->operands[2] == IA64_OPND_SOF |
5936 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
5937 | { |
5938 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
5939 | can't parse the first operand until we have parsed the | |
5940 | remaining operands of the "alloc" instruction. */ | |
5941 | SKIP_WHITESPACE (); | |
5942 | first_arg = input_line_pointer; | |
5943 | end = strchr (input_line_pointer, '='); | |
5944 | if (!end) | |
5945 | { | |
ad4b42b4 | 5946 | as_bad (_("Expected separator `='")); |
800eeca4 JW |
5947 | return 0; |
5948 | } | |
5949 | input_line_pointer = end + 1; | |
5950 | ++i; | |
5951 | ++num_outputs; | |
5952 | } | |
5953 | ||
d3156ecc | 5954 | for (; ; ++i) |
800eeca4 | 5955 | { |
d3156ecc JB |
5956 | if (i < NELEMS (CURR_SLOT.opnd)) |
5957 | { | |
cd42ff9c AM |
5958 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + i, '=', |
5959 | idesc->operands[i]); | |
d3156ecc JB |
5960 | if (CURR_SLOT.opnd[i].X_op == O_absent) |
5961 | break; | |
5962 | } | |
5963 | else | |
5964 | { | |
5965 | expressionS dummy; | |
5966 | ||
e4e8248d | 5967 | sep = parse_operand (&dummy, '='); |
d3156ecc JB |
5968 | if (dummy.X_op == O_absent) |
5969 | break; | |
5970 | } | |
800eeca4 JW |
5971 | |
5972 | ++num_operands; | |
5973 | ||
5974 | if (sep != '=' && sep != ',') | |
5975 | break; | |
5976 | ||
5977 | if (sep == '=') | |
5978 | { | |
5979 | if (num_outputs > 0) | |
ad4b42b4 | 5980 | as_bad (_("Duplicate equal sign (=) in instruction")); |
800eeca4 JW |
5981 | else |
5982 | num_outputs = i + 1; | |
5983 | } | |
5984 | } | |
5985 | if (sep != '\0') | |
5986 | { | |
ad4b42b4 | 5987 | as_bad (_("Illegal operand separator `%c'"), sep); |
800eeca4 JW |
5988 | return 0; |
5989 | } | |
197865e8 | 5990 | |
60b9a617 JB |
5991 | if (idesc->operands[2] == IA64_OPND_SOF |
5992 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 | 5993 | { |
ef0241e7 JB |
5994 | /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r. |
5995 | Note, however, that due to that mapping operand numbers in error | |
5996 | messages for any of the constant operands will not be correct. */ | |
800eeca4 | 5997 | know (strcmp (idesc->name, "alloc") == 0); |
ef0241e7 JB |
5998 | /* The first operand hasn't been parsed/initialized, yet (but |
5999 | num_operands intentionally doesn't account for that). */ | |
6000 | i = num_operands > 4 ? 2 : 1; | |
6001 | #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \ | |
6002 | ? CURR_SLOT.opnd[n].X_add_number \ | |
6003 | : 0) | |
6004 | sof = set_regstack (FORCE_CONST(i), | |
6005 | FORCE_CONST(i + 1), | |
6006 | FORCE_CONST(i + 2), | |
6007 | FORCE_CONST(i + 3)); | |
6008 | #undef FORCE_CONST | |
6009 | ||
6010 | /* now we can parse the first arg: */ | |
6011 | saved_input_pointer = input_line_pointer; | |
6012 | input_line_pointer = first_arg; | |
cd42ff9c AM |
6013 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + 0, '=', |
6014 | idesc->operands[0]); | |
ef0241e7 JB |
6015 | if (sep != '=') |
6016 | --num_outputs; /* force error */ | |
6017 | input_line_pointer = saved_input_pointer; | |
6018 | ||
6019 | CURR_SLOT.opnd[i].X_add_number = sof; | |
6020 | if (CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6021 | && CURR_SLOT.opnd[i + 2].X_op == O_constant) | |
6022 | CURR_SLOT.opnd[i + 1].X_add_number | |
6023 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6024 | else | |
6025 | CURR_SLOT.opnd[i + 1].X_op = O_illegal; | |
6026 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6027 | } |
6028 | ||
d3156ecc | 6029 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6030 | curr_out_of_range_pos = -1; |
6031 | error_pos = 0; | |
800eeca4 JW |
6032 | for (; idesc; idesc = get_next_opcode (idesc)) |
6033 | { | |
6034 | if (num_outputs != idesc->num_outputs) | |
6035 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6036 | if (highest_unmatched_operand < 0) |
6037 | highest_unmatched_operand |= 1; | |
6038 | if (num_operands > NELEMS (idesc->operands) | |
6039 | || (num_operands < NELEMS (idesc->operands) | |
6040 | && idesc->operands[num_operands]) | |
6041 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6042 | continue; /* mismatch in number of arguments */ | |
6043 | if (highest_unmatched_operand < 0) | |
6044 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6045 | |
6046 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6047 | |
6048 | /* Try to match all operands. If we see an out-of-range operand, | |
6049 | then continue trying to match the rest of the operands, since if | |
6050 | the rest match, then this idesc will give the best error message. */ | |
6051 | ||
6052 | out_of_range_pos = -1; | |
800eeca4 | 6053 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6054 | { |
6055 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6056 | if (result != OPERAND_MATCH) | |
6057 | { | |
6058 | if (result != OPERAND_OUT_OF_RANGE) | |
6059 | break; | |
6060 | if (out_of_range_pos < 0) | |
6061 | /* remember position of the first out-of-range operand: */ | |
6062 | out_of_range_pos = i; | |
6063 | } | |
6064 | } | |
800eeca4 | 6065 | |
87f8eb97 JW |
6066 | /* If we did not match all operands, or if at least one operand was |
6067 | out-of-range, then this idesc does not match. Keep track of which | |
6068 | idesc matched the most operands before failing. If we have two | |
6069 | idescs that failed at the same position, and one had an out-of-range | |
6070 | operand, then prefer the out-of-range operand. Thus if we have | |
6071 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6072 | of range instead of an error saying that the constant should have been | |
6073 | a register. */ | |
6074 | ||
6075 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6076 | { |
87f8eb97 JW |
6077 | if (i > highest_unmatched_operand |
6078 | || (i == highest_unmatched_operand | |
6079 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6080 | { |
6081 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6082 | if (out_of_range_pos >= 0) |
6083 | { | |
6084 | expected_operand = idesc->operands[out_of_range_pos]; | |
6085 | error_pos = out_of_range_pos; | |
6086 | } | |
6087 | else | |
6088 | { | |
6089 | expected_operand = idesc->operands[i]; | |
6090 | error_pos = i; | |
6091 | } | |
6092 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6093 | } |
6094 | continue; | |
6095 | } | |
6096 | ||
800eeca4 JW |
6097 | break; |
6098 | } | |
6099 | if (!idesc) | |
6100 | { | |
6101 | if (expected_operand) | |
ad4b42b4 | 6102 | as_bad (_("Operand %u of `%s' should be %s"), |
87f8eb97 | 6103 | error_pos + 1, mnemonic, |
800eeca4 | 6104 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc | 6105 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
ad4b42b4 | 6106 | as_bad (_("Wrong number of output operands")); |
d3156ecc | 6107 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) |
ad4b42b4 | 6108 | as_bad (_("Wrong number of input operands")); |
800eeca4 | 6109 | else |
ad4b42b4 | 6110 | as_bad (_("Operand mismatch")); |
800eeca4 JW |
6111 | return 0; |
6112 | } | |
4b09e828 JB |
6113 | |
6114 | /* Check that the instruction doesn't use | |
6115 | - r0, f0, or f1 as output operands | |
6116 | - the same predicate twice as output operands | |
6117 | - r0 as address of a base update load or store | |
6118 | - the same GR as output and address of a base update load | |
6119 | - two even- or two odd-numbered FRs as output operands of a floating | |
6120 | point parallel load. | |
6121 | At most two (conflicting) output (or output-like) operands can exist, | |
6122 | (floating point parallel loads have three outputs, but the base register, | |
6123 | if updated, cannot conflict with the actual outputs). */ | |
6124 | reg2 = reg1 = -1; | |
6125 | for (i = 0; i < num_operands; ++i) | |
6126 | { | |
6127 | int regno = 0; | |
6128 | ||
6129 | reg_class = 0; | |
6130 | switch (idesc->operands[i]) | |
6131 | { | |
6132 | case IA64_OPND_R1: | |
6133 | case IA64_OPND_R2: | |
6134 | case IA64_OPND_R3: | |
6135 | if (i < num_outputs) | |
6136 | { | |
6137 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6138 | reg_class = 'r'; | |
6139 | else if (reg1 < 0) | |
6140 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6141 | else if (reg2 < 0) | |
6142 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6143 | } | |
6144 | break; | |
6145 | case IA64_OPND_P1: | |
6146 | case IA64_OPND_P2: | |
6147 | if (i < num_outputs) | |
6148 | { | |
6149 | if (reg1 < 0) | |
6150 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6151 | else if (reg2 < 0) | |
6152 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6153 | } | |
6154 | break; | |
6155 | case IA64_OPND_F1: | |
6156 | case IA64_OPND_F2: | |
6157 | case IA64_OPND_F3: | |
6158 | case IA64_OPND_F4: | |
6159 | if (i < num_outputs) | |
6160 | { | |
6161 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6162 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6163 | { | |
6164 | reg_class = 'f'; | |
6165 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6166 | } | |
6167 | else if (reg1 < 0) | |
6168 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6169 | else if (reg2 < 0) | |
6170 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6171 | } | |
6172 | break; | |
6173 | case IA64_OPND_MR3: | |
6174 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6175 | { | |
6176 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6177 | reg_class = 'm'; | |
6178 | else if (reg1 < 0) | |
6179 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6180 | else if (reg2 < 0) | |
6181 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6182 | } | |
6183 | break; | |
6184 | default: | |
6185 | break; | |
6186 | } | |
6187 | switch (reg_class) | |
6188 | { | |
6189 | case 0: | |
6190 | break; | |
6191 | default: | |
ad4b42b4 | 6192 | as_warn (_("Invalid use of `%c%d' as output operand"), reg_class, regno); |
4b09e828 JB |
6193 | break; |
6194 | case 'm': | |
ad4b42b4 | 6195 | as_warn (_("Invalid use of `r%d' as base update address operand"), regno); |
4b09e828 JB |
6196 | break; |
6197 | } | |
6198 | } | |
6199 | if (reg1 == reg2) | |
6200 | { | |
6201 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6202 | { | |
6203 | reg1 -= REG_GR; | |
6204 | reg_class = 'r'; | |
6205 | } | |
6206 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6207 | { | |
6208 | reg1 -= REG_P; | |
6209 | reg_class = 'p'; | |
6210 | } | |
6211 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6212 | { | |
6213 | reg1 -= REG_FR; | |
6214 | reg_class = 'f'; | |
6215 | } | |
6216 | else | |
6217 | reg_class = 0; | |
6218 | if (reg_class) | |
ad4b42b4 | 6219 | as_warn (_("Invalid duplicate use of `%c%d'"), reg_class, reg1); |
4b09e828 JB |
6220 | } |
6221 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6222 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6223 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6224 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6225 | && ! ((reg1 ^ reg2) & 1)) | |
ad4b42b4 | 6226 | as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"), |
4b09e828 JB |
6227 | reg1 - REG_FR, reg2 - REG_FR); |
6228 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6229 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6230 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6231 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
ad4b42b4 | 6232 | as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"), |
4b09e828 | 6233 | reg1 - REG_FR, reg2 - REG_FR); |
800eeca4 JW |
6234 | return idesc; |
6235 | } | |
6236 | ||
6237 | static void | |
5a49b8ac | 6238 | build_insn (struct slot *slot, bfd_vma *insnp) |
800eeca4 JW |
6239 | { |
6240 | const struct ia64_operand *odesc, *o2desc; | |
6241 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6242 | bfd_vma insn; |
6243 | bfd_signed_vma val; | |
800eeca4 JW |
6244 | const char *err; |
6245 | int i; | |
6246 | ||
6247 | insn = idesc->opcode | slot->qp_regno; | |
6248 | ||
6249 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6250 | { | |
c67e42c9 RH |
6251 | if (slot->opnd[i].X_op == O_register |
6252 | || slot->opnd[i].X_op == O_constant | |
6253 | || slot->opnd[i].X_op == O_index) | |
6254 | val = slot->opnd[i].X_add_number; | |
6255 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6256 | { |
c67e42c9 | 6257 | /* This must be the value 0x10000000000000000. */ |
9c2799c2 | 6258 | gas_assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); |
c67e42c9 RH |
6259 | val = 0; |
6260 | } | |
6261 | else | |
6262 | val = 0; | |
6263 | ||
6264 | switch (idesc->operands[i]) | |
6265 | { | |
6266 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6267 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6268 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6269 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6270 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6271 | continue; |
6272 | ||
6273 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6274 | val &= 0x3fffffffffffffffULL; |
6275 | if (val != slot->opnd[i].X_add_number) | |
6276 | as_warn (_("Value truncated to 62 bits")); | |
6277 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6278 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6279 | continue; |
800eeca4 | 6280 | |
c67e42c9 RH |
6281 | case IA64_OPND_TGT64: |
6282 | val >>= 4; | |
6283 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6284 | insn |= ((((val >> 59) & 0x1) << 36) | |
6285 | | (((val >> 0) & 0xfffff) << 13)); | |
6286 | continue; | |
800eeca4 | 6287 | |
c67e42c9 RH |
6288 | case IA64_OPND_AR3: |
6289 | val -= REG_AR; | |
6290 | break; | |
6291 | ||
6292 | case IA64_OPND_B1: | |
6293 | case IA64_OPND_B2: | |
6294 | val -= REG_BR; | |
6295 | break; | |
6296 | ||
6297 | case IA64_OPND_CR3: | |
6298 | val -= REG_CR; | |
6299 | break; | |
6300 | ||
6301 | case IA64_OPND_F1: | |
6302 | case IA64_OPND_F2: | |
6303 | case IA64_OPND_F3: | |
6304 | case IA64_OPND_F4: | |
6305 | val -= REG_FR; | |
6306 | break; | |
6307 | ||
6308 | case IA64_OPND_P1: | |
6309 | case IA64_OPND_P2: | |
6310 | val -= REG_P; | |
6311 | break; | |
6312 | ||
6313 | case IA64_OPND_R1: | |
6314 | case IA64_OPND_R2: | |
6315 | case IA64_OPND_R3: | |
6316 | case IA64_OPND_R3_2: | |
6317 | case IA64_OPND_CPUID_R3: | |
6318 | case IA64_OPND_DBR_R3: | |
6319 | case IA64_OPND_DTR_R3: | |
6320 | case IA64_OPND_ITR_R3: | |
6321 | case IA64_OPND_IBR_R3: | |
6322 | case IA64_OPND_MR3: | |
6323 | case IA64_OPND_MSR_R3: | |
6324 | case IA64_OPND_PKR_R3: | |
6325 | case IA64_OPND_PMC_R3: | |
6326 | case IA64_OPND_PMD_R3: | |
197865e8 | 6327 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6328 | val -= REG_GR; |
6329 | break; | |
6330 | ||
6331 | default: | |
6332 | break; | |
6333 | } | |
6334 | ||
6335 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6336 | err = (*odesc->insert) (odesc, val, &insn); | |
6337 | if (err) | |
6338 | as_bad_where (slot->src_file, slot->src_line, | |
ad4b42b4 | 6339 | _("Bad operand value: %s"), err); |
c67e42c9 RH |
6340 | if (idesc->flags & IA64_OPCODE_PSEUDO) |
6341 | { | |
6342 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6343 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6344 | { | |
6345 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6346 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6347 | } |
c67e42c9 RH |
6348 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6349 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6350 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6351 | { |
c67e42c9 RH |
6352 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6353 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6354 | } |
6355 | } | |
6356 | } | |
6357 | *insnp = insn; | |
6358 | } | |
6359 | ||
6360 | static void | |
5a49b8ac | 6361 | emit_one_bundle (void) |
800eeca4 | 6362 | { |
f4660e2c | 6363 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6364 | enum ia64_unit required_unit, insn_unit = 0; |
6365 | enum ia64_insn_type type[3], insn_type; | |
d3ce72d0 | 6366 | unsigned int template_val, orig_template; |
542d6675 | 6367 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6368 | struct ia64_opcode *idesc; |
6369 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6370 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6371 | bfd_vma t0 = 0, t1 = 0; |
6372 | struct label_fix *lfix; | |
07a53e5c | 6373 | bfd_boolean mark_label; |
800eeca4 JW |
6374 | struct insn_fix *ifix; |
6375 | char mnemonic[16]; | |
6376 | fixS *fix; | |
6377 | char *f; | |
5a9ff93d | 6378 | int addr_mod; |
800eeca4 JW |
6379 | |
6380 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
c13781b8 | 6381 | know (first >= 0 && first < NUM_SLOTS); |
800eeca4 JW |
6382 | n = MIN (3, md.num_slots_in_use); |
6383 | ||
6384 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6385 | otherwise: */ |
800eeca4 JW |
6386 | |
6387 | if (md.slot[first].user_template >= 0) | |
d3ce72d0 | 6388 | user_template = template_val = md.slot[first].user_template; |
800eeca4 JW |
6389 | else |
6390 | { | |
032efc85 | 6391 | /* Auto select appropriate template. */ |
800eeca4 JW |
6392 | memset (type, 0, sizeof (type)); |
6393 | curr = first; | |
6394 | for (i = 0; i < n; ++i) | |
6395 | { | |
032efc85 RH |
6396 | if (md.slot[curr].label_fixups && i != 0) |
6397 | break; | |
800eeca4 JW |
6398 | type[i] = md.slot[curr].idesc->type; |
6399 | curr = (curr + 1) % NUM_SLOTS; | |
6400 | } | |
d3ce72d0 | 6401 | template_val = best_template[type[0]][type[1]][type[2]]; |
800eeca4 JW |
6402 | } |
6403 | ||
542d6675 | 6404 | /* initialize instructions with appropriate nops: */ |
800eeca4 | 6405 | for (i = 0; i < 3; ++i) |
d3ce72d0 | 6406 | insn[i] = nop[ia64_templ_desc[template_val].exec_unit[i]]; |
800eeca4 JW |
6407 | |
6408 | f = frag_more (16); | |
6409 | ||
5a9ff93d JW |
6410 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6411 | from the start of the frag. */ | |
6412 | addr_mod = frag_now_fix () & 15; | |
6413 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6414 | as_bad (_("instruction address is not a multiple of 16")); | |
6415 | frag_now->insn_addr = addr_mod; | |
6416 | frag_now->has_code = 1; | |
6417 | ||
542d6675 | 6418 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6419 | curr = first; |
6420 | idesc = md.slot[curr].idesc; | |
6421 | end_of_insn_group = 0; | |
9b505842 | 6422 | last_slot = -1; |
800eeca4 JW |
6423 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6424 | { | |
d6e78c11 | 6425 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6426 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6427 | unw_rec_list *end_ptr = NULL; | |
6428 | ||
d6e78c11 JW |
6429 | if (ptr) |
6430 | { | |
6431 | /* Find the last prologue/body record in the list for the current | |
6432 | insn, and set the slot number for all records up to that point. | |
6433 | This needs to be done now, because prologue/body records refer to | |
6434 | the current point, not the point after the instruction has been | |
6435 | issued. This matters because there may have been nops emitted | |
6436 | meanwhile. Any non-prologue non-body record followed by a | |
6437 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6438 | unw_rec_list *last_ptr; |
6439 | ||
6440 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6441 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6442 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6443 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6444 | || ptr->r.type == body) | |
6445 | last_ptr = ptr; | |
6446 | if (last_ptr) | |
6447 | { | |
6448 | /* Make last_ptr point one after the last prologue/body | |
6449 | record. */ | |
6450 | last_ptr = last_ptr->next; | |
6451 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6452 | ptr = ptr->next) | |
6453 | { | |
6454 | ptr->slot_number = (unsigned long) f + i; | |
6455 | ptr->slot_frag = frag_now; | |
6456 | } | |
6457 | /* Remove the initialized records, so that we won't accidentally | |
6458 | update them again if we insert a nop and continue. */ | |
6459 | md.slot[curr].unwind_record = last_ptr; | |
6460 | } | |
6461 | } | |
e0c9811a | 6462 | |
f4660e2c JB |
6463 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6464 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6465 | { |
f4660e2c JB |
6466 | if (curr == first) |
6467 | manual_bundling = 1; | |
800eeca4 | 6468 | else |
f4660e2c JB |
6469 | break; /* Need to start a new bundle. */ |
6470 | } | |
6471 | ||
744b6414 JW |
6472 | /* If this instruction specifies a template, then it must be the first |
6473 | instruction of a bundle. */ | |
6474 | if (curr != first && md.slot[curr].user_template >= 0) | |
6475 | break; | |
6476 | ||
f4660e2c JB |
6477 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6478 | { | |
6479 | if (manual_bundling && !manual_bundling_off) | |
6480 | { | |
6481 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6482 | _("`%s' must be last in bundle"), idesc->name); |
f4660e2c JB |
6483 | if (i < 2) |
6484 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6485 | } | |
6486 | i = 2; | |
800eeca4 JW |
6487 | } |
6488 | if (idesc->flags & IA64_OPCODE_LAST) | |
6489 | { | |
2434f565 JW |
6490 | int required_slot; |
6491 | unsigned int required_template; | |
800eeca4 JW |
6492 | |
6493 | /* If we need a stop bit after an M slot, our only choice is | |
6494 | template 5 (M;;MI). If we need a stop bit after a B | |
6495 | slot, our only choice is to place it at the end of the | |
6496 | bundle, because the only available templates are MIB, | |
6497 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6498 | than M and B slots because these are the only kind of | |
6499 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
d3ce72d0 | 6500 | required_template = template_val; |
800eeca4 JW |
6501 | switch (idesc->type) |
6502 | { | |
6503 | case IA64_TYPE_M: | |
6504 | required_slot = 0; | |
6505 | required_template = 5; | |
6506 | break; | |
6507 | ||
6508 | case IA64_TYPE_B: | |
6509 | required_slot = 2; | |
6510 | break; | |
6511 | ||
6512 | default: | |
6513 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 NC |
6514 | _("Internal error: don't know how to force %s to end of instruction group"), |
6515 | idesc->name); | |
800eeca4 JW |
6516 | required_slot = i; |
6517 | break; | |
6518 | } | |
f4660e2c JB |
6519 | if (manual_bundling |
6520 | && (i > required_slot | |
6521 | || (required_slot == 2 && !manual_bundling_off) | |
6522 | || (user_template >= 0 | |
6523 | /* Changing from MMI to M;MI is OK. */ | |
d3ce72d0 | 6524 | && (template_val ^ required_template) > 1))) |
f4660e2c JB |
6525 | { |
6526 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6527 | _("`%s' must be last in instruction group"), |
f4660e2c JB |
6528 | idesc->name); |
6529 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6530 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6531 | } | |
800eeca4 JW |
6532 | if (required_slot < i) |
6533 | /* Can't fit this instruction. */ | |
6534 | break; | |
6535 | ||
6536 | i = required_slot; | |
d3ce72d0 | 6537 | if (required_template != template_val) |
800eeca4 JW |
6538 | { |
6539 | /* If we switch the template, we need to reset the NOPs | |
6540 | after slot i. The slot-types of the instructions ahead | |
6541 | of i never change, so we don't need to worry about | |
6542 | changing NOPs in front of this slot. */ | |
6543 | for (j = i; j < 3; ++j) | |
6544 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
53022e4a JW |
6545 | |
6546 | /* We just picked a template that includes the stop bit in the | |
6547 | middle, so we don't need another one emitted later. */ | |
6548 | md.slot[curr].end_of_insn_group = 0; | |
800eeca4 | 6549 | } |
d3ce72d0 | 6550 | template_val = required_template; |
800eeca4 JW |
6551 | } |
6552 | if (curr != first && md.slot[curr].label_fixups) | |
6553 | { | |
f4660e2c JB |
6554 | if (manual_bundling) |
6555 | { | |
6556 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6557 | _("Label must be first in a bundle")); |
f4660e2c JB |
6558 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6559 | } | |
800eeca4 JW |
6560 | /* This insn must go into the first slot of a bundle. */ |
6561 | break; | |
6562 | } | |
6563 | ||
800eeca4 JW |
6564 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6565 | { | |
6566 | /* We need an instruction group boundary in the middle of a | |
6567 | bundle. See if we can switch to an other template with | |
6568 | an appropriate boundary. */ | |
6569 | ||
d3ce72d0 | 6570 | orig_template = template_val; |
800eeca4 JW |
6571 | if (i == 1 && (user_template == 4 |
6572 | || (user_template < 0 | |
d3ce72d0 | 6573 | && (ia64_templ_desc[template_val].exec_unit[0] |
800eeca4 JW |
6574 | == IA64_UNIT_M)))) |
6575 | { | |
d3ce72d0 | 6576 | template_val = 5; |
800eeca4 JW |
6577 | end_of_insn_group = 0; |
6578 | } | |
6579 | else if (i == 2 && (user_template == 0 | |
6580 | || (user_template < 0 | |
d3ce72d0 | 6581 | && (ia64_templ_desc[template_val].exec_unit[1] |
800eeca4 JW |
6582 | == IA64_UNIT_I))) |
6583 | /* This test makes sure we don't switch the template if | |
6584 | the next instruction is one that needs to be first in | |
6585 | an instruction group. Since all those instructions are | |
6586 | in the M group, there is no way such an instruction can | |
6587 | fit in this bundle even if we switch the template. The | |
6588 | reason we have to check for this is that otherwise we | |
6589 | may end up generating "MI;;I M.." which has the deadly | |
6590 | effect that the second M instruction is no longer the | |
f4660e2c | 6591 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6592 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6593 | { | |
d3ce72d0 | 6594 | template_val = 1; |
800eeca4 JW |
6595 | end_of_insn_group = 0; |
6596 | } | |
f4660e2c JB |
6597 | else if (i == 1 |
6598 | && user_template == 0 | |
6599 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6600 | /* Use the next slot. */ | |
6601 | continue; | |
800eeca4 JW |
6602 | else if (curr != first) |
6603 | /* can't fit this insn */ | |
6604 | break; | |
6605 | ||
d3ce72d0 | 6606 | if (template_val != orig_template) |
800eeca4 JW |
6607 | /* if we switch the template, we need to reset the NOPs |
6608 | after slot i. The slot-types of the instructions ahead | |
6609 | of i never change, so we don't need to worry about | |
6610 | changing NOPs in front of this slot. */ | |
6611 | for (j = i; j < 3; ++j) | |
d3ce72d0 | 6612 | insn[j] = nop[ia64_templ_desc[template_val].exec_unit[j]]; |
800eeca4 | 6613 | } |
d3ce72d0 | 6614 | required_unit = ia64_templ_desc[template_val].exec_unit[i]; |
800eeca4 | 6615 | |
c10d9d8f | 6616 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6617 | if (idesc->type == IA64_TYPE_DYN) |
6618 | { | |
97762d08 JB |
6619 | enum ia64_opnd opnd1, opnd2; |
6620 | ||
800eeca4 JW |
6621 | if ((strcmp (idesc->name, "nop") == 0) |
6622 | || (strcmp (idesc->name, "break") == 0)) | |
6623 | insn_unit = required_unit; | |
91d777ee L |
6624 | else if (strcmp (idesc->name, "hint") == 0) |
6625 | { | |
6626 | insn_unit = required_unit; | |
6627 | if (required_unit == IA64_UNIT_B) | |
6628 | { | |
6629 | switch (md.hint_b) | |
6630 | { | |
6631 | case hint_b_ok: | |
6632 | break; | |
6633 | case hint_b_warning: | |
ad4b42b4 | 6634 | as_warn (_("hint in B unit may be treated as nop")); |
91d777ee L |
6635 | break; |
6636 | case hint_b_error: | |
6637 | /* When manual bundling is off and there is no | |
6638 | user template, we choose a different unit so | |
6639 | that hint won't go into the current slot. We | |
6640 | will fill the current bundle with nops and | |
6641 | try to put hint into the next bundle. */ | |
6642 | if (!manual_bundling && user_template < 0) | |
6643 | insn_unit = IA64_UNIT_I; | |
6644 | else | |
ad4b42b4 | 6645 | as_bad (_("hint in B unit can't be used")); |
91d777ee L |
6646 | break; |
6647 | } | |
6648 | } | |
6649 | } | |
97762d08 JB |
6650 | else if (strcmp (idesc->name, "chk.s") == 0 |
6651 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6652 | { |
6653 | insn_unit = IA64_UNIT_M; | |
97762d08 | 6654 | if (required_unit == IA64_UNIT_I |
d3ce72d0 | 6655 | || (required_unit == IA64_UNIT_F && template_val == 6)) |
800eeca4 JW |
6656 | insn_unit = IA64_UNIT_I; |
6657 | } | |
6658 | else | |
ad4b42b4 | 6659 | as_fatal (_("emit_one_bundle: unexpected dynamic op")); |
800eeca4 | 6660 | |
f9f21a03 L |
6661 | snprintf (mnemonic, sizeof (mnemonic), "%s.%c", |
6662 | idesc->name, "?imbfxx"[insn_unit]); | |
97762d08 JB |
6663 | opnd1 = idesc->operands[0]; |
6664 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6665 | ia64_free_opcode (idesc); |
97762d08 JB |
6666 | idesc = ia64_find_opcode (mnemonic); |
6667 | /* moves to/from ARs have collisions */ | |
6668 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6669 | { | |
6670 | while (idesc != NULL | |
6671 | && (idesc->operands[0] != opnd1 | |
6672 | || idesc->operands[1] != opnd2)) | |
6673 | idesc = get_next_opcode (idesc); | |
6674 | } | |
97762d08 | 6675 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6676 | } |
6677 | else | |
6678 | { | |
6679 | insn_type = idesc->type; | |
6680 | insn_unit = IA64_UNIT_NIL; | |
6681 | switch (insn_type) | |
6682 | { | |
6683 | case IA64_TYPE_A: | |
6684 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6685 | insn_unit = required_unit; | |
6686 | break; | |
542d6675 | 6687 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6688 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6689 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6690 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6691 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6692 | default: break; | |
6693 | } | |
6694 | } | |
6695 | ||
6696 | if (insn_unit != required_unit) | |
9b505842 | 6697 | continue; /* Try next slot. */ |
800eeca4 | 6698 | |
07a53e5c RH |
6699 | /* Now is a good time to fix up the labels for this insn. */ |
6700 | mark_label = FALSE; | |
6701 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) | |
6702 | { | |
6703 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6704 | symbol_set_frag (lfix->sym, frag_now); | |
6705 | mark_label |= lfix->dw2_mark_labels; | |
6706 | } | |
6707 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6708 | { | |
6709 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6710 | symbol_set_frag (lfix->sym, frag_now); | |
6711 | } | |
6712 | ||
6713 | if (debug_type == DEBUG_DWARF2 | |
6714 | || md.slot[curr].loc_directive_seen | |
6715 | || mark_label) | |
196e8040 JW |
6716 | { |
6717 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6718 | |
196e8040 | 6719 | md.slot[curr].loc_directive_seen = 0; |
07a53e5c RH |
6720 | if (mark_label) |
6721 | md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
6722 | ||
196e8040 JW |
6723 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); |
6724 | } | |
800eeca4 JW |
6725 | |
6726 | build_insn (md.slot + curr, insn + i); | |
6727 | ||
d6e78c11 JW |
6728 | ptr = md.slot[curr].unwind_record; |
6729 | if (ptr) | |
6730 | { | |
6731 | /* Set slot numbers for all remaining unwind records belonging to the | |
6732 | current insn. There can not be any prologue/body unwind records | |
6733 | here. */ | |
d6e78c11 JW |
6734 | for (; ptr != end_ptr; ptr = ptr->next) |
6735 | { | |
6736 | ptr->slot_number = (unsigned long) f + i; | |
6737 | ptr->slot_frag = frag_now; | |
6738 | } | |
6739 | md.slot[curr].unwind_record = NULL; | |
6740 | } | |
10850f29 | 6741 | |
800eeca4 JW |
6742 | if (required_unit == IA64_UNIT_L) |
6743 | { | |
6744 | know (i == 1); | |
6745 | /* skip one slot for long/X-unit instructions */ | |
6746 | ++i; | |
6747 | } | |
6748 | --md.num_slots_in_use; | |
9b505842 | 6749 | last_slot = i; |
800eeca4 | 6750 | |
800eeca4 JW |
6751 | for (j = 0; j < md.slot[curr].num_fixups; ++j) |
6752 | { | |
6753 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6754 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6755 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6756 | fix->tc_fix_data.opnd = ifix->opnd; | |
800eeca4 JW |
6757 | fix->fx_file = md.slot[curr].src_file; |
6758 | fix->fx_line = md.slot[curr].src_line; | |
6759 | } | |
6760 | ||
6761 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6762 | ||
542d6675 | 6763 | /* clear slot: */ |
800eeca4 JW |
6764 | ia64_free_opcode (md.slot[curr].idesc); |
6765 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6766 | md.slot[curr].user_template = -1; | |
6767 | ||
6768 | if (manual_bundling_off) | |
6769 | { | |
6770 | manual_bundling = 0; | |
6771 | break; | |
6772 | } | |
6773 | curr = (curr + 1) % NUM_SLOTS; | |
6774 | idesc = md.slot[curr].idesc; | |
6775 | } | |
6abae71c JW |
6776 | |
6777 | /* A user template was specified, but the first following instruction did | |
6778 | not fit. This can happen with or without manual bundling. */ | |
6779 | if (md.num_slots_in_use > 0 && last_slot < 0) | |
6780 | { | |
6781 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6782 | _("`%s' does not fit into %s template"), |
d3ce72d0 | 6783 | idesc->name, ia64_templ_desc[template_val].name); |
6abae71c JW |
6784 | /* Drop first insn so we don't livelock. */ |
6785 | --md.num_slots_in_use; | |
6786 | know (curr == first); | |
6787 | ia64_free_opcode (md.slot[curr].idesc); | |
6788 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6789 | md.slot[curr].user_template = -1; | |
6790 | } | |
6791 | else if (manual_bundling > 0) | |
800eeca4 JW |
6792 | { |
6793 | if (md.num_slots_in_use > 0) | |
ac025970 | 6794 | { |
9b505842 JB |
6795 | if (last_slot >= 2) |
6796 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6797 | _("`%s' does not fit into bundle"), idesc->name); |
9b505842 JB |
6798 | else |
6799 | { | |
6800 | const char *where; | |
6801 | ||
d3ce72d0 | 6802 | if (template_val == 2) |
9b505842 JB |
6803 | where = "X slot"; |
6804 | else if (last_slot == 0) | |
6805 | where = "slots 2 or 3"; | |
6806 | else | |
6807 | where = "slot 3"; | |
6808 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6809 | _("`%s' can't go in %s of %s template"), |
d3ce72d0 | 6810 | idesc->name, where, ia64_templ_desc[template_val].name); |
9b505842 | 6811 | } |
ac025970 | 6812 | } |
800eeca4 JW |
6813 | else |
6814 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6815 | _("Missing '}' at end of file")); |
800eeca4 | 6816 | } |
6abae71c | 6817 | |
800eeca4 JW |
6818 | know (md.num_slots_in_use < NUM_SLOTS); |
6819 | ||
d3ce72d0 | 6820 | t0 = end_of_insn_group | (template_val << 1) | (insn[0] << 5) | (insn[1] << 46); |
800eeca4 JW |
6821 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); |
6822 | ||
44f5c83a JW |
6823 | number_to_chars_littleendian (f + 0, t0, 8); |
6824 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
6825 | } |
6826 | ||
6827 | int | |
5a49b8ac | 6828 | md_parse_option (int c, char *arg) |
800eeca4 | 6829 | { |
7463c317 | 6830 | |
800eeca4 JW |
6831 | switch (c) |
6832 | { | |
c43c2cc5 | 6833 | /* Switches from the Intel assembler. */ |
44f5c83a | 6834 | case 'm': |
800eeca4 JW |
6835 | if (strcmp (arg, "ilp64") == 0 |
6836 | || strcmp (arg, "lp64") == 0 | |
6837 | || strcmp (arg, "p64") == 0) | |
6838 | { | |
6839 | md.flags |= EF_IA_64_ABI64; | |
6840 | } | |
6841 | else if (strcmp (arg, "ilp32") == 0) | |
6842 | { | |
6843 | md.flags &= ~EF_IA_64_ABI64; | |
6844 | } | |
6845 | else if (strcmp (arg, "le") == 0) | |
6846 | { | |
6847 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6848 | default_big_endian = 0; |
800eeca4 JW |
6849 | } |
6850 | else if (strcmp (arg, "be") == 0) | |
6851 | { | |
6852 | md.flags |= EF_IA_64_BE; | |
549f748d | 6853 | default_big_endian = 1; |
800eeca4 | 6854 | } |
970d6792 L |
6855 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6856 | { | |
6857 | arg += 13; | |
6858 | if (strcmp (arg, "warning") == 0) | |
6859 | md.unwind_check = unwind_check_warning; | |
6860 | else if (strcmp (arg, "error") == 0) | |
6861 | md.unwind_check = unwind_check_error; | |
6862 | else | |
6863 | return 0; | |
6864 | } | |
91d777ee L |
6865 | else if (strncmp (arg, "hint.b=", 7) == 0) |
6866 | { | |
6867 | arg += 7; | |
6868 | if (strcmp (arg, "ok") == 0) | |
6869 | md.hint_b = hint_b_ok; | |
6870 | else if (strcmp (arg, "warning") == 0) | |
6871 | md.hint_b = hint_b_warning; | |
6872 | else if (strcmp (arg, "error") == 0) | |
6873 | md.hint_b = hint_b_error; | |
6874 | else | |
6875 | return 0; | |
6876 | } | |
8c2fda1d L |
6877 | else if (strncmp (arg, "tune=", 5) == 0) |
6878 | { | |
6879 | arg += 5; | |
6880 | if (strcmp (arg, "itanium1") == 0) | |
6881 | md.tune = itanium1; | |
6882 | else if (strcmp (arg, "itanium2") == 0) | |
6883 | md.tune = itanium2; | |
6884 | else | |
6885 | return 0; | |
6886 | } | |
800eeca4 JW |
6887 | else |
6888 | return 0; | |
6889 | break; | |
6890 | ||
6891 | case 'N': | |
6892 | if (strcmp (arg, "so") == 0) | |
6893 | { | |
542d6675 | 6894 | /* Suppress signon message. */ |
800eeca4 JW |
6895 | } |
6896 | else if (strcmp (arg, "pi") == 0) | |
6897 | { | |
6898 | /* Reject privileged instructions. FIXME */ | |
6899 | } | |
6900 | else if (strcmp (arg, "us") == 0) | |
6901 | { | |
6902 | /* Allow union of signed and unsigned range. FIXME */ | |
6903 | } | |
6904 | else if (strcmp (arg, "close_fcalls") == 0) | |
6905 | { | |
6906 | /* Do not resolve global function calls. */ | |
6907 | } | |
6908 | else | |
6909 | return 0; | |
6910 | break; | |
6911 | ||
6912 | case 'C': | |
6913 | /* temp[="prefix"] Insert temporary labels into the object file | |
6914 | symbol table prefixed by "prefix". | |
6915 | Default prefix is ":temp:". | |
6916 | */ | |
6917 | break; | |
6918 | ||
6919 | case 'a': | |
800eeca4 JW |
6920 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6921 | according to <tgt> -- | |
6922 | exit: branch out from the current context (default) | |
6923 | labels: all labels in context may be branch targets | |
6924 | */ | |
85b40035 L |
6925 | if (strncmp (arg, "indirect=", 9) != 0) |
6926 | return 0; | |
800eeca4 JW |
6927 | break; |
6928 | ||
6929 | case 'x': | |
6930 | /* -X conflicts with an ignored option, use -x instead */ | |
6931 | md.detect_dv = 1; | |
6932 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6933 | { |
6934 | /* set default mode to explicit */ | |
6935 | md.default_explicit_mode = 1; | |
6936 | break; | |
6937 | } | |
800eeca4 | 6938 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6939 | { |
6940 | md.default_explicit_mode = 0; | |
6941 | } | |
f1dab70d JB |
6942 | else if (strcmp (arg, "none") == 0) |
6943 | { | |
6944 | md.detect_dv = 0; | |
6945 | } | |
800eeca4 | 6946 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6947 | { |
6948 | md.debug_dv = 1; | |
6949 | } | |
800eeca4 | 6950 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6951 | { |
6952 | md.default_explicit_mode = 1; | |
6953 | md.debug_dv = 1; | |
6954 | } | |
f1dab70d JB |
6955 | else if (strcmp (arg, "debugn") == 0) |
6956 | { | |
6957 | md.debug_dv = 1; | |
6958 | md.detect_dv = 0; | |
6959 | } | |
800eeca4 | 6960 | else |
542d6675 KH |
6961 | { |
6962 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6963 | } | |
800eeca4 JW |
6964 | break; |
6965 | ||
6966 | case 'S': | |
6967 | /* nops Print nops statistics. */ | |
6968 | break; | |
6969 | ||
c43c2cc5 JW |
6970 | /* GNU specific switches for gcc. */ |
6971 | case OPTION_MCONSTANT_GP: | |
6972 | md.flags |= EF_IA_64_CONS_GP; | |
6973 | break; | |
6974 | ||
6975 | case OPTION_MAUTO_PIC: | |
6976 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6977 | break; | |
6978 | ||
800eeca4 JW |
6979 | default: |
6980 | return 0; | |
6981 | } | |
6982 | ||
6983 | return 1; | |
6984 | } | |
6985 | ||
6986 | void | |
5a49b8ac | 6987 | md_show_usage (FILE *stream) |
800eeca4 | 6988 | { |
542d6675 | 6989 | fputs (_("\ |
800eeca4 | 6990 | IA-64 options:\n\ |
6290819d NC |
6991 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6992 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6993 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6994 | without function descriptors (sets ELF header flag\n\ | |
6995 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6996 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6997 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
6998 | -mtune=[itanium1|itanium2]\n\ |
6999 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7000 | -munwind-check=[warning|error]\n\ |
7001 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7002 | -mhint.b=[ok|warning|error]\n\ |
7003 | hint.b check (default -mhint.b=error)\n\ | |
a1727c1a NC |
7004 | -x | -xexplicit turn on dependency violation checking\n"), stream); |
7005 | /* Note for translators: "automagically" can be translated as "automatically" here. */ | |
7006 | fputs (_("\ | |
f1dab70d JB |
7007 | -xauto automagically remove dependency violations (default)\n\ |
7008 | -xnone turn off dependency violation checking\n\ | |
7009 | -xdebug debug dependency violation checker\n\ | |
7010 | -xdebugn debug dependency violation checker but turn off\n\ | |
7011 | dependency violation checking\n\ | |
7012 | -xdebugx debug dependency violation checker and turn on\n\ | |
7013 | dependency violation checking\n"), | |
800eeca4 JW |
7014 | stream); |
7015 | } | |
7016 | ||
acebd4ce | 7017 | void |
5a49b8ac | 7018 | ia64_after_parse_args (void) |
acebd4ce AS |
7019 | { |
7020 | if (debug_type == DEBUG_STABS) | |
7021 | as_fatal (_("--gstabs is not supported for ia64")); | |
7022 | } | |
7023 | ||
44576e1f RH |
7024 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7025 | ||
7026 | static int | |
800eeca4 JW |
7027 | match (int templ, int type, int slot) |
7028 | { | |
7029 | enum ia64_unit unit; | |
7030 | int result; | |
7031 | ||
7032 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7033 | switch (type) | |
7034 | { | |
7035 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7036 | case IA64_TYPE_A: | |
7037 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7038 | break; | |
7039 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7040 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7041 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7042 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7043 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7044 | default: result = 0; break; | |
7045 | } | |
7046 | return result; | |
7047 | } | |
7048 | ||
7c06efaa JW |
7049 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7050 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7051 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7052 | |
7053 | static inline int | |
7054 | extra_goodness (int templ, int slot) | |
7055 | { | |
8c2fda1d L |
7056 | switch (md.tune) |
7057 | { | |
7058 | case itanium1: | |
7059 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7060 | return 2; | |
7061 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7062 | return 1; | |
7063 | else | |
7064 | return 0; | |
7065 | break; | |
7066 | case itanium2: | |
7067 | if (match (templ, IA64_TYPE_M, slot) | |
7068 | || match (templ, IA64_TYPE_I, slot)) | |
7069 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7070 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7071 | branch-prediction. */ | |
7072 | return 2; | |
7073 | else | |
7074 | return 0; | |
7075 | break; | |
7076 | default: | |
7077 | abort (); | |
7078 | return 0; | |
7079 | } | |
44576e1f RH |
7080 | } |
7081 | ||
800eeca4 JW |
7082 | /* This function is called once, at assembler startup time. It sets |
7083 | up all the tables, etc. that the MD part of the assembler will need | |
7084 | that can be determined before arguments are parsed. */ | |
7085 | void | |
5a49b8ac | 7086 | md_begin (void) |
800eeca4 | 7087 | { |
8b84be9d | 7088 | int i, j, k, t, goodness, best, ok; |
800eeca4 JW |
7089 | const char *err; |
7090 | char name[8]; | |
7091 | ||
7092 | md.auto_align = 1; | |
7093 | md.explicit_mode = md.default_explicit_mode; | |
7094 | ||
7095 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7096 | ||
0234cb7c | 7097 | /* Make sure function pointers get initialized. */ |
10a98291 | 7098 | target_big_endian = -1; |
549f748d | 7099 | dot_byteorder (default_big_endian); |
10a98291 | 7100 | |
35f5df7f L |
7101 | alias_hash = hash_new (); |
7102 | alias_name_hash = hash_new (); | |
7103 | secalias_hash = hash_new (); | |
7104 | secalias_name_hash = hash_new (); | |
7105 | ||
13ae64f3 JJ |
7106 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7107 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7108 | &zero_address_frag); | |
7109 | ||
7110 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7111 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7112 | &zero_address_frag); | |
7113 | ||
800eeca4 | 7114 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7115 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7116 | &zero_address_frag); | |
800eeca4 JW |
7117 | |
7118 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7119 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7120 | &zero_address_frag); | |
800eeca4 JW |
7121 | |
7122 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7123 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7124 | &zero_address_frag); | |
800eeca4 | 7125 | |
fa2c7eff RH |
7126 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7127 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7128 | &zero_address_frag); | |
7129 | ||
c67e42c9 | 7130 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7131 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7132 | &zero_address_frag); | |
c67e42c9 | 7133 | |
800eeca4 | 7134 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7135 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7136 | &zero_address_frag); | |
800eeca4 JW |
7137 | |
7138 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7139 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7140 | &zero_address_frag); | |
800eeca4 JW |
7141 | |
7142 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7143 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7144 | &zero_address_frag); | |
800eeca4 | 7145 | |
13ae64f3 JJ |
7146 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7147 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7148 | &zero_address_frag); | |
7149 | ||
800eeca4 | 7150 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7151 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7152 | &zero_address_frag); | |
800eeca4 JW |
7153 | |
7154 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7155 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7156 | &zero_address_frag); | |
800eeca4 | 7157 | |
13ae64f3 JJ |
7158 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7159 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7160 | &zero_address_frag); | |
7161 | ||
7162 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7163 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7164 | &zero_address_frag); | |
7165 | ||
7166 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7167 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7168 | &zero_address_frag); | |
7169 | ||
3969b680 RH |
7170 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7171 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7172 | &zero_address_frag); | |
7173 | ||
9d0e8497 TG |
7174 | #ifdef TE_VMS |
7175 | pseudo_func[FUNC_SLOTCOUNT_RELOC].u.sym = | |
7176 | symbol_new (".<slotcount>", undefined_section, FUNC_SLOTCOUNT_RELOC, | |
7177 | &zero_address_frag); | |
7178 | #endif | |
7179 | ||
f6fe78d6 JW |
7180 | if (md.tune != itanium1) |
7181 | { | |
7182 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7183 | le_nop[0] = 0x8; | |
7184 | le_nop_stop[0] = 0x9; | |
7185 | } | |
7186 | ||
197865e8 | 7187 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7188 | base 4 value, in which each match counts for 3. Match-failures |
7189 | result in NOPs and we use extra_goodness() to pick the execution | |
7190 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7191 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7192 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7193 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7194 | { | |
7195 | best = 0; | |
7196 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7197 | { | |
7198 | goodness = 0; | |
7199 | if (match (t, i, 0)) | |
7200 | { | |
7201 | if (match (t, j, 1)) | |
7202 | { | |
286cee81 | 7203 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7204 | goodness = 3 + 3 + 3; |
800eeca4 | 7205 | else |
44576e1f | 7206 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7207 | } |
7208 | else if (match (t, j, 2)) | |
44576e1f | 7209 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7210 | else |
44576e1f RH |
7211 | { |
7212 | goodness = 3; | |
7213 | goodness += extra_goodness (t, 1); | |
7214 | goodness += extra_goodness (t, 2); | |
7215 | } | |
800eeca4 JW |
7216 | } |
7217 | else if (match (t, i, 1)) | |
7218 | { | |
286cee81 | 7219 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7220 | goodness = 3 + 3; |
800eeca4 | 7221 | else |
44576e1f | 7222 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7223 | } |
7224 | else if (match (t, i, 2)) | |
44576e1f | 7225 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7226 | |
7227 | if (goodness > best) | |
7228 | { | |
7229 | best = goodness; | |
7230 | best_template[i][j][k] = t; | |
7231 | } | |
7232 | } | |
7233 | } | |
7234 | ||
7c06efaa JW |
7235 | #ifdef DEBUG_TEMPLATES |
7236 | /* For debugging changes to the best_template calculations. We don't care | |
7237 | about combinations with invalid instructions, so start the loops at 1. */ | |
7238 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7239 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7240 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7241 | { | |
7242 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7243 | 'x', 'd' }; | |
7244 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7245 | type_letter[k], | |
7246 | ia64_templ_desc[best_template[i][j][k]].name); | |
7247 | } | |
7248 | #endif | |
7249 | ||
800eeca4 JW |
7250 | for (i = 0; i < NUM_SLOTS; ++i) |
7251 | md.slot[i].user_template = -1; | |
7252 | ||
7253 | md.pseudo_hash = hash_new (); | |
7254 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7255 | { | |
7256 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7257 | (void *) (pseudo_opcode + i)); | |
7258 | if (err) | |
ad4b42b4 | 7259 | as_fatal (_("ia64.md_begin: can't hash `%s': %s"), |
800eeca4 JW |
7260 | pseudo_opcode[i].name, err); |
7261 | } | |
7262 | ||
7263 | md.reg_hash = hash_new (); | |
7264 | md.dynreg_hash = hash_new (); | |
7265 | md.const_hash = hash_new (); | |
7266 | md.entry_hash = hash_new (); | |
7267 | ||
542d6675 | 7268 | /* general registers: */ |
8b84be9d JB |
7269 | declare_register_set ("r", 128, REG_GR); |
7270 | declare_register ("gp", REG_GR + 1); | |
7271 | declare_register ("sp", REG_GR + 12); | |
7272 | declare_register ("tp", REG_GR + 13); | |
7273 | declare_register_set ("ret", 4, REG_GR + 8); | |
800eeca4 | 7274 | |
542d6675 | 7275 | /* floating point registers: */ |
8b84be9d JB |
7276 | declare_register_set ("f", 128, REG_FR); |
7277 | declare_register_set ("farg", 8, REG_FR + 8); | |
7278 | declare_register_set ("fret", 8, REG_FR + 8); | |
800eeca4 | 7279 | |
542d6675 | 7280 | /* branch registers: */ |
8b84be9d JB |
7281 | declare_register_set ("b", 8, REG_BR); |
7282 | declare_register ("rp", REG_BR + 0); | |
800eeca4 | 7283 | |
8b84be9d JB |
7284 | /* predicate registers: */ |
7285 | declare_register_set ("p", 64, REG_P); | |
7286 | declare_register ("pr", REG_PR); | |
7287 | declare_register ("pr.rot", REG_PR_ROT); | |
800eeca4 | 7288 | |
8b84be9d JB |
7289 | /* application registers: */ |
7290 | declare_register_set ("ar", 128, REG_AR); | |
5e0bd176 JB |
7291 | for (i = 0; i < NELEMS (ar); ++i) |
7292 | declare_register (ar[i].name, REG_AR + ar[i].regnum); | |
800eeca4 | 7293 | |
8b84be9d JB |
7294 | /* control registers: */ |
7295 | declare_register_set ("cr", 128, REG_CR); | |
5e0bd176 JB |
7296 | for (i = 0; i < NELEMS (cr); ++i) |
7297 | declare_register (cr[i].name, REG_CR + cr[i].regnum); | |
800eeca4 | 7298 | |
8b84be9d JB |
7299 | declare_register ("ip", REG_IP); |
7300 | declare_register ("cfm", REG_CFM); | |
7301 | declare_register ("psr", REG_PSR); | |
7302 | declare_register ("psr.l", REG_PSR_L); | |
7303 | declare_register ("psr.um", REG_PSR_UM); | |
7304 | ||
7305 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7306 | { | |
7307 | unsigned int regnum = indirect_reg[i].regnum; | |
7308 | ||
7309 | md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum); | |
7310 | } | |
800eeca4 | 7311 | |
542d6675 | 7312 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7313 | declare_register ("psp", REG_PSP); |
7314 | ||
800eeca4 JW |
7315 | for (i = 0; i < NELEMS (const_bits); ++i) |
7316 | { | |
7317 | err = hash_insert (md.const_hash, const_bits[i].name, | |
5a49b8ac | 7318 | (void *) (const_bits + i)); |
800eeca4 | 7319 | if (err) |
ad4b42b4 | 7320 | as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"), |
800eeca4 JW |
7321 | name, err); |
7322 | } | |
7323 | ||
44f5c83a JW |
7324 | /* Set the architecture and machine depending on defaults and command line |
7325 | options. */ | |
7326 | if (md.flags & EF_IA_64_ABI64) | |
7327 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7328 | else | |
7329 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7330 | ||
7331 | if (! ok) | |
7332 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7333 | |
557debba JW |
7334 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7335 | ||
7336 | if (md.flags & EF_IA_64_ABI64) | |
7337 | { | |
7338 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7339 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7340 | } | |
7341 | else | |
7342 | { | |
7343 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7344 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7345 | } | |
7346 | ||
800eeca4 JW |
7347 | md.mem_offset.hint = 0; |
7348 | md.path = 0; | |
7349 | md.maxpaths = 0; | |
7350 | md.entry_labels = NULL; | |
7351 | } | |
7352 | ||
970d6792 L |
7353 | /* Set the default options in md. Cannot do this in md_begin because |
7354 | that is called after md_parse_option which is where we set the | |
7355 | options in md based on command line options. */ | |
44f5c83a JW |
7356 | |
7357 | void | |
5a49b8ac | 7358 | ia64_init (int argc ATTRIBUTE_UNUSED, char **argv ATTRIBUTE_UNUSED) |
44f5c83a | 7359 | { |
1cd8ff38 | 7360 | md.flags = MD_FLAGS_DEFAULT; |
01e1a5bc NC |
7361 | #ifndef TE_VMS |
7362 | /* Don't turn on dependency checking for VMS, doesn't work. */ | |
f1dab70d | 7363 | md.detect_dv = 1; |
01e1a5bc | 7364 | #endif |
970d6792 L |
7365 | /* FIXME: We should change it to unwind_check_error someday. */ |
7366 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7367 | md.hint_b = hint_b_error; |
8c2fda1d | 7368 | md.tune = itanium2; |
44f5c83a JW |
7369 | } |
7370 | ||
7371 | /* Return a string for the target object file format. */ | |
7372 | ||
7373 | const char * | |
5a49b8ac | 7374 | ia64_target_format (void) |
44f5c83a JW |
7375 | { |
7376 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7377 | { | |
72a76794 JW |
7378 | if (md.flags & EF_IA_64_BE) |
7379 | { | |
7380 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7381 | #if defined(TE_AIX50) |
7463c317 | 7382 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7383 | #elif defined(TE_HPUX) |
7384 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7385 | #else |
72a76794 | 7386 | return "elf64-ia64-big"; |
7463c317 | 7387 | #endif |
72a76794 | 7388 | else |
1cd8ff38 | 7389 | #if defined(TE_AIX50) |
7463c317 | 7390 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7391 | #elif defined(TE_HPUX) |
7392 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7393 | #else |
72a76794 | 7394 | return "elf32-ia64-big"; |
7463c317 | 7395 | #endif |
72a76794 | 7396 | } |
44f5c83a | 7397 | else |
72a76794 JW |
7398 | { |
7399 | if (md.flags & EF_IA_64_ABI64) | |
01e1a5bc | 7400 | #if defined (TE_AIX50) |
7463c317 | 7401 | return "elf64-ia64-aix-little"; |
01e1a5bc NC |
7402 | #elif defined (TE_VMS) |
7403 | { | |
7404 | md.flags |= EF_IA_64_ARCHVER_1; | |
7405 | return "elf64-ia64-vms"; | |
7406 | } | |
7463c317 | 7407 | #else |
72a76794 | 7408 | return "elf64-ia64-little"; |
7463c317 | 7409 | #endif |
72a76794 | 7410 | else |
7463c317 TW |
7411 | #ifdef TE_AIX50 |
7412 | return "elf32-ia64-aix-little"; | |
7413 | #else | |
72a76794 | 7414 | return "elf32-ia64-little"; |
7463c317 | 7415 | #endif |
72a76794 | 7416 | } |
44f5c83a JW |
7417 | } |
7418 | else | |
7419 | return "unknown-format"; | |
7420 | } | |
7421 | ||
800eeca4 | 7422 | void |
5a49b8ac | 7423 | ia64_end_of_source (void) |
800eeca4 | 7424 | { |
542d6675 | 7425 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7426 | insn_group_break (1, 0, 0); |
7427 | ||
542d6675 | 7428 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7429 | ia64_flush_insns (); |
7430 | ||
7431 | bfd_set_private_flags (stdoutput, md.flags); | |
7432 | ||
800eeca4 JW |
7433 | md.mem_offset.hint = 0; |
7434 | } | |
7435 | ||
7436 | void | |
5a49b8ac | 7437 | ia64_start_line (void) |
800eeca4 | 7438 | { |
e4e8248d JB |
7439 | static int first; |
7440 | ||
7441 | if (!first) { | |
7442 | /* Make sure we don't reference input_line_pointer[-1] when that's | |
7443 | not valid. */ | |
7444 | first = 1; | |
7445 | return; | |
7446 | } | |
7447 | ||
f1bcba5b | 7448 | if (md.qp.X_op == O_register) |
ad4b42b4 | 7449 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
7450 | md.qp.X_op = O_absent; |
7451 | ||
7452 | if (ignore_input ()) | |
7453 | return; | |
7454 | ||
7455 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7456 | { | |
7457 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7458 | { |
7459 | static int warned; | |
7460 | ||
7461 | if (!warned) | |
7462 | { | |
7463 | warned = 1; | |
7464 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7465 | } | |
7466 | } | |
800eeca4 | 7467 | else |
542d6675 | 7468 | insn_group_break (1, 0, 0); |
800eeca4 | 7469 | } |
e4e8248d | 7470 | else if (input_line_pointer[-1] == '{') |
800eeca4 | 7471 | { |
800eeca4 | 7472 | if (md.manual_bundling) |
ad4b42b4 | 7473 | as_warn (_("Found '{' when manual bundling is already turned on")); |
800eeca4 JW |
7474 | else |
7475 | CURR_SLOT.manual_bundling_on = 1; | |
7476 | md.manual_bundling = 1; | |
7477 | ||
542d6675 KH |
7478 | /* Bundling is only acceptable in explicit mode |
7479 | or when in default automatic mode. */ | |
800eeca4 | 7480 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7481 | { |
7482 | if (!md.mode_explicitly_set | |
7483 | && !md.default_explicit_mode) | |
7484 | dot_dv_mode ('E'); | |
7485 | else | |
7486 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7487 | } | |
e4e8248d JB |
7488 | } |
7489 | else if (input_line_pointer[-1] == '}') | |
7490 | { | |
800eeca4 | 7491 | if (!md.manual_bundling) |
ad4b42b4 | 7492 | as_warn (_("Found '}' when manual bundling is off")); |
800eeca4 JW |
7493 | else |
7494 | PREV_SLOT.manual_bundling_off = 1; | |
7495 | md.manual_bundling = 0; | |
7496 | ||
7497 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7498 | if (md.detect_dv |
542d6675 KH |
7499 | && md.explicit_mode |
7500 | && !md.mode_explicitly_set | |
7501 | && !md.default_explicit_mode) | |
7502 | dot_dv_mode ('A'); | |
e4e8248d JB |
7503 | } |
7504 | } | |
800eeca4 | 7505 | |
e4e8248d JB |
7506 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7507 | labels. */ | |
7508 | static int defining_tag = 0; | |
7509 | ||
7510 | int | |
5a49b8ac | 7511 | ia64_unrecognized_line (int ch) |
e4e8248d JB |
7512 | { |
7513 | switch (ch) | |
7514 | { | |
7515 | case '(': | |
60d11e55 | 7516 | expression_and_evaluate (&md.qp); |
e4e8248d | 7517 | if (*input_line_pointer++ != ')') |
800eeca4 | 7518 | { |
ad4b42b4 | 7519 | as_bad (_("Expected ')'")); |
e4e8248d JB |
7520 | return 0; |
7521 | } | |
7522 | if (md.qp.X_op != O_register) | |
7523 | { | |
ad4b42b4 | 7524 | as_bad (_("Qualifying predicate expected")); |
e4e8248d JB |
7525 | return 0; |
7526 | } | |
7527 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7528 | { | |
ad4b42b4 | 7529 | as_bad (_("Predicate register expected")); |
e4e8248d | 7530 | return 0; |
800eeca4 | 7531 | } |
800eeca4 JW |
7532 | return 1; |
7533 | ||
f1bcba5b JW |
7534 | case '[': |
7535 | { | |
7536 | char *s; | |
7537 | char c; | |
7538 | symbolS *tag; | |
4d5a53ff | 7539 | int temp; |
f1bcba5b JW |
7540 | |
7541 | if (md.qp.X_op == O_register) | |
7542 | { | |
ad4b42b4 | 7543 | as_bad (_("Tag must come before qualifying predicate.")); |
f1bcba5b JW |
7544 | return 0; |
7545 | } | |
4d5a53ff JW |
7546 | |
7547 | /* This implements just enough of read_a_source_file in read.c to | |
7548 | recognize labels. */ | |
7549 | if (is_name_beginner (*input_line_pointer)) | |
7550 | { | |
7551 | s = input_line_pointer; | |
7552 | c = get_symbol_end (); | |
7553 | } | |
7554 | else if (LOCAL_LABELS_FB | |
3882b010 | 7555 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7556 | { |
7557 | temp = 0; | |
3882b010 | 7558 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7559 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7560 | fb_label_instance_inc (temp); | |
7561 | s = fb_label_name (temp, 0); | |
7562 | c = *input_line_pointer; | |
7563 | } | |
7564 | else | |
7565 | { | |
7566 | s = NULL; | |
7567 | c = '\0'; | |
7568 | } | |
f1bcba5b JW |
7569 | if (c != ':') |
7570 | { | |
7571 | /* Put ':' back for error messages' sake. */ | |
7572 | *input_line_pointer++ = ':'; | |
ad4b42b4 | 7573 | as_bad (_("Expected ':'")); |
f1bcba5b JW |
7574 | return 0; |
7575 | } | |
4d5a53ff | 7576 | |
f1bcba5b JW |
7577 | defining_tag = 1; |
7578 | tag = colon (s); | |
7579 | defining_tag = 0; | |
7580 | /* Put ':' back for error messages' sake. */ | |
7581 | *input_line_pointer++ = ':'; | |
7582 | if (*input_line_pointer++ != ']') | |
7583 | { | |
ad4b42b4 | 7584 | as_bad (_("Expected ']'")); |
f1bcba5b JW |
7585 | return 0; |
7586 | } | |
7587 | if (! tag) | |
7588 | { | |
ad4b42b4 | 7589 | as_bad (_("Tag name expected")); |
f1bcba5b JW |
7590 | return 0; |
7591 | } | |
7592 | return 1; | |
7593 | } | |
7594 | ||
800eeca4 JW |
7595 | default: |
7596 | break; | |
7597 | } | |
542d6675 KH |
7598 | |
7599 | /* Not a valid line. */ | |
7600 | return 0; | |
800eeca4 JW |
7601 | } |
7602 | ||
7603 | void | |
5a49b8ac | 7604 | ia64_frob_label (struct symbol *sym) |
800eeca4 JW |
7605 | { |
7606 | struct label_fix *fix; | |
7607 | ||
f1bcba5b JW |
7608 | /* Tags need special handling since they are not bundle breaks like |
7609 | labels. */ | |
7610 | if (defining_tag) | |
7611 | { | |
7612 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7613 | fix->sym = sym; | |
7614 | fix->next = CURR_SLOT.tag_fixups; | |
07a53e5c | 7615 | fix->dw2_mark_labels = FALSE; |
f1bcba5b JW |
7616 | CURR_SLOT.tag_fixups = fix; |
7617 | ||
7618 | return; | |
7619 | } | |
7620 | ||
800eeca4 JW |
7621 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7622 | { | |
7623 | md.last_text_seg = now_seg; | |
7624 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7625 | fix->sym = sym; | |
7626 | fix->next = CURR_SLOT.label_fixups; | |
07a53e5c | 7627 | fix->dw2_mark_labels = dwarf2_loc_mark_labels; |
800eeca4 JW |
7628 | CURR_SLOT.label_fixups = fix; |
7629 | ||
542d6675 | 7630 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7631 | if (md.path == md.maxpaths) |
542d6675 KH |
7632 | { |
7633 | md.maxpaths += 20; | |
7634 | md.entry_labels = (const char **) | |
7635 | xrealloc ((void *) md.entry_labels, | |
7636 | md.maxpaths * sizeof (char *)); | |
7637 | } | |
800eeca4 JW |
7638 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7639 | } | |
7640 | } | |
7641 | ||
936cf02e JW |
7642 | #ifdef TE_HPUX |
7643 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7644 | that are declared but unused. This routine removes declared, | |
7645 | unused symbols from an object. */ | |
7646 | int | |
5a49b8ac | 7647 | ia64_frob_symbol (struct symbol *sym) |
936cf02e JW |
7648 | { |
7649 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7650 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7651 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7652 | && ! S_IS_EXTERNAL (sym))) | |
7653 | return 1; | |
7654 | return 0; | |
7655 | } | |
7656 | #endif | |
7657 | ||
800eeca4 | 7658 | void |
5a49b8ac | 7659 | ia64_flush_pending_output (void) |
800eeca4 | 7660 | { |
4d5a53ff JW |
7661 | if (!md.keep_pending_output |
7662 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7663 | { |
7664 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7665 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7666 | insn_group_break (1, 0, 0); | |
7667 | ia64_flush_insns (); | |
7668 | } | |
7669 | } | |
7670 | ||
7671 | /* Do ia64-specific expression optimization. All that's done here is | |
7672 | to transform index expressions that are either due to the indexing | |
7673 | of rotating registers or due to the indexing of indirect register | |
7674 | sets. */ | |
7675 | int | |
5a49b8ac | 7676 | ia64_optimize_expr (expressionS *l, operatorT op, expressionS *r) |
800eeca4 | 7677 | { |
6a2375c6 JB |
7678 | if (op != O_index) |
7679 | return 0; | |
7680 | resolve_expression (l); | |
7681 | if (l->X_op == O_register) | |
800eeca4 | 7682 | { |
6a2375c6 JB |
7683 | unsigned num_regs = l->X_add_number >> 16; |
7684 | ||
7685 | resolve_expression (r); | |
7686 | if (num_regs) | |
800eeca4 | 7687 | { |
6a2375c6 JB |
7688 | /* Left side is a .rotX-allocated register. */ |
7689 | if (r->X_op != O_constant) | |
800eeca4 | 7690 | { |
ad4b42b4 | 7691 | as_bad (_("Rotating register index must be a non-negative constant")); |
6a2375c6 JB |
7692 | r->X_add_number = 0; |
7693 | } | |
7694 | else if ((valueT) r->X_add_number >= num_regs) | |
7695 | { | |
ad4b42b4 | 7696 | as_bad (_("Index out of range 0..%u"), num_regs - 1); |
800eeca4 JW |
7697 | r->X_add_number = 0; |
7698 | } | |
7699 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7700 | return 1; | |
7701 | } | |
6a2375c6 | 7702 | else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR) |
800eeca4 | 7703 | { |
6a2375c6 JB |
7704 | if (r->X_op != O_register |
7705 | || r->X_add_number < REG_GR | |
7706 | || r->X_add_number > REG_GR + 127) | |
800eeca4 | 7707 | { |
ad4b42b4 | 7708 | as_bad (_("Indirect register index must be a general register")); |
6a2375c6 | 7709 | r->X_add_number = REG_GR; |
800eeca4 JW |
7710 | } |
7711 | l->X_op = O_index; | |
8b84be9d | 7712 | l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID]; |
800eeca4 JW |
7713 | l->X_add_number = r->X_add_number; |
7714 | return 1; | |
7715 | } | |
7716 | } | |
ad4b42b4 | 7717 | as_bad (_("Index can only be applied to rotating or indirect registers")); |
6a2375c6 JB |
7718 | /* Fall back to some register use of which has as little as possible |
7719 | side effects, to minimize subsequent error messages. */ | |
7720 | l->X_op = O_register; | |
7721 | l->X_add_number = REG_GR + 3; | |
7722 | return 1; | |
800eeca4 JW |
7723 | } |
7724 | ||
7725 | int | |
5a49b8ac | 7726 | ia64_parse_name (char *name, expressionS *e, char *nextcharP) |
800eeca4 JW |
7727 | { |
7728 | struct const_desc *cdesc; | |
7729 | struct dynreg *dr = 0; | |
16a48f83 | 7730 | unsigned int idx; |
800eeca4 JW |
7731 | struct symbol *sym; |
7732 | char *end; | |
7733 | ||
16a48f83 JB |
7734 | if (*name == '@') |
7735 | { | |
7736 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7737 | ||
7738 | /* Find what relocation pseudo-function we're dealing with. */ | |
7739 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7740 | if (pseudo_func[idx].name | |
7741 | && pseudo_func[idx].name[0] == name[1] | |
7742 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7743 | { | |
7744 | pseudo_type = pseudo_func[idx].type; | |
7745 | break; | |
7746 | } | |
7747 | switch (pseudo_type) | |
7748 | { | |
7749 | case PSEUDO_FUNC_RELOC: | |
7750 | end = input_line_pointer; | |
7751 | if (*nextcharP != '(') | |
7752 | { | |
ad4b42b4 | 7753 | as_bad (_("Expected '('")); |
2f6d622e | 7754 | break; |
16a48f83 JB |
7755 | } |
7756 | /* Skip '('. */ | |
7757 | ++input_line_pointer; | |
7758 | expression (e); | |
7759 | if (*input_line_pointer != ')') | |
7760 | { | |
ad4b42b4 | 7761 | as_bad (_("Missing ')'")); |
16a48f83 JB |
7762 | goto done; |
7763 | } | |
7764 | /* Skip ')'. */ | |
7765 | ++input_line_pointer; | |
9d0e8497 TG |
7766 | #ifdef TE_VMS |
7767 | if (idx == FUNC_SLOTCOUNT_RELOC) | |
7768 | { | |
7769 | /* @slotcount can accept any expression. Canonicalize. */ | |
7770 | e->X_add_symbol = make_expr_symbol (e); | |
7771 | e->X_op = O_symbol; | |
7772 | e->X_add_number = 0; | |
7773 | } | |
7774 | #endif | |
16a48f83 JB |
7775 | if (e->X_op != O_symbol) |
7776 | { | |
7777 | if (e->X_op != O_pseudo_fixup) | |
7778 | { | |
ad4b42b4 | 7779 | as_bad (_("Not a symbolic expression")); |
16a48f83 JB |
7780 | goto done; |
7781 | } | |
7782 | if (idx != FUNC_LT_RELATIVE) | |
7783 | { | |
ad4b42b4 | 7784 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7785 | goto done; |
7786 | } | |
7787 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7788 | { | |
7789 | case FUNC_FPTR_RELATIVE: | |
7790 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7791 | case FUNC_DTP_MODULE: | |
7792 | idx = FUNC_LT_DTP_MODULE; break; | |
7793 | case FUNC_DTP_RELATIVE: | |
7794 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7795 | case FUNC_TP_RELATIVE: | |
7796 | idx = FUNC_LT_TP_RELATIVE; break; | |
7797 | default: | |
ad4b42b4 | 7798 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7799 | goto done; |
7800 | } | |
7801 | } | |
7802 | /* Make sure gas doesn't get rid of local symbols that are used | |
7803 | in relocs. */ | |
7804 | e->X_op = O_pseudo_fixup; | |
7805 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7806 | done: |
7807 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7808 | break; |
7809 | ||
7810 | case PSEUDO_FUNC_CONST: | |
7811 | e->X_op = O_constant; | |
7812 | e->X_add_number = pseudo_func[idx].u.ival; | |
7813 | break; | |
7814 | ||
7815 | case PSEUDO_FUNC_REG: | |
7816 | e->X_op = O_register; | |
7817 | e->X_add_number = pseudo_func[idx].u.ival; | |
7818 | break; | |
7819 | ||
7820 | default: | |
7821 | return 0; | |
7822 | } | |
16a48f83 JB |
7823 | return 1; |
7824 | } | |
7825 | ||
542d6675 | 7826 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7827 | sym = hash_find (md.reg_hash, name); |
7828 | if (sym) | |
7829 | { | |
7830 | e->X_op = O_register; | |
7831 | e->X_add_number = S_GET_VALUE (sym); | |
7832 | return 1; | |
7833 | } | |
7834 | ||
7835 | cdesc = hash_find (md.const_hash, name); | |
7836 | if (cdesc) | |
7837 | { | |
7838 | e->X_op = O_constant; | |
7839 | e->X_add_number = cdesc->value; | |
7840 | return 1; | |
7841 | } | |
7842 | ||
542d6675 | 7843 | /* check for inN, locN, or outN: */ |
26b810ce | 7844 | idx = 0; |
800eeca4 JW |
7845 | switch (name[0]) |
7846 | { | |
7847 | case 'i': | |
3882b010 | 7848 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7849 | { |
7850 | dr = &md.in; | |
26b810ce | 7851 | idx = 2; |
800eeca4 JW |
7852 | } |
7853 | break; | |
7854 | ||
7855 | case 'l': | |
3882b010 | 7856 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7857 | { |
7858 | dr = &md.loc; | |
26b810ce | 7859 | idx = 3; |
800eeca4 JW |
7860 | } |
7861 | break; | |
7862 | ||
7863 | case 'o': | |
3882b010 | 7864 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7865 | { |
7866 | dr = &md.out; | |
26b810ce | 7867 | idx = 3; |
800eeca4 JW |
7868 | } |
7869 | break; | |
7870 | ||
7871 | default: | |
7872 | break; | |
7873 | } | |
7874 | ||
26b810ce JB |
7875 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
7876 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 7877 | { |
26b810ce JB |
7878 | unsigned long regnum; |
7879 | ||
542d6675 | 7880 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
7881 | regnum = strtoul (name + idx, &end, 10); |
7882 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 7883 | { |
26b810ce | 7884 | if (regnum >= dr->num_regs) |
800eeca4 JW |
7885 | { |
7886 | if (!dr->num_regs) | |
ad4b42b4 | 7887 | as_bad (_("No current frame")); |
800eeca4 | 7888 | else |
ad4b42b4 | 7889 | as_bad (_("Register number out of range 0..%u"), |
542d6675 | 7890 | dr->num_regs - 1); |
800eeca4 JW |
7891 | regnum = 0; |
7892 | } | |
7893 | e->X_op = O_register; | |
7894 | e->X_add_number = dr->base + regnum; | |
7895 | return 1; | |
7896 | } | |
7897 | } | |
7898 | ||
20b36a95 JB |
7899 | end = alloca (strlen (name) + 1); |
7900 | strcpy (end, name); | |
7901 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
7902 | if ((dr = hash_find (md.dynreg_hash, name))) |
7903 | { | |
7904 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7905 | Store the base register number in the low 16 bits of |
7906 | X_add_number and the size of the register set in the top 16 | |
7907 | bits. */ | |
800eeca4 JW |
7908 | e->X_op = O_register; |
7909 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7910 | return 1; | |
7911 | } | |
7912 | return 0; | |
7913 | } | |
7914 | ||
7915 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7916 | ||
7917 | char * | |
5a49b8ac | 7918 | ia64_canonicalize_symbol_name (char *name) |
800eeca4 | 7919 | { |
20b36a95 JB |
7920 | size_t len = strlen (name), full = len; |
7921 | ||
7922 | while (len > 0 && name[len - 1] == '#') | |
7923 | --len; | |
7924 | if (len <= 0) | |
7925 | { | |
7926 | if (full > 0) | |
ad4b42b4 | 7927 | as_bad (_("Standalone `#' is illegal")); |
20b36a95 JB |
7928 | } |
7929 | else if (len < full - 1) | |
ad4b42b4 | 7930 | as_warn (_("Redundant `#' suffix operators")); |
20b36a95 | 7931 | name[len] = '\0'; |
800eeca4 JW |
7932 | return name; |
7933 | } | |
7934 | ||
3e37788f JW |
7935 | /* Return true if idesc is a conditional branch instruction. This excludes |
7936 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7937 | because they always read/write resources regardless of the value of the | |
7938 | qualifying predicate. br.ia must always use p0, and hence is always | |
7939 | taken. Thus this function returns true for branches which can fall | |
7940 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7941 | |
800eeca4 | 7942 | static int |
5a49b8ac | 7943 | is_conditional_branch (struct ia64_opcode *idesc) |
800eeca4 | 7944 | { |
1deb8127 | 7945 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7946 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7947 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7948 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7949 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7950 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7951 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7952 | || idesc->name[2] == 'l' | |
7953 | /* br.cond, br.call, br.clr */ | |
7954 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7955 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7956 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7957 | } |
7958 | ||
7959 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7960 | returns zero. */ |
7961 | ||
800eeca4 | 7962 | static int |
5a49b8ac | 7963 | is_taken_branch (struct ia64_opcode *idesc) |
800eeca4 JW |
7964 | { |
7965 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7966 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7967 | } |
7968 | ||
7969 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7970 | doubt, returns zero. */ |
7971 | ||
800eeca4 | 7972 | static int |
5a49b8ac | 7973 | is_interruption_or_rfi (struct ia64_opcode *idesc) |
800eeca4 JW |
7974 | { |
7975 | if (strcmp (idesc->name, "rfi") == 0) | |
7976 | return 1; | |
7977 | return 0; | |
7978 | } | |
7979 | ||
7980 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7981 | -1 if there is no dependency. */ | |
542d6675 | 7982 | |
800eeca4 | 7983 | static int |
5a49b8ac | 7984 | depends_on (int depind, struct ia64_opcode *idesc) |
800eeca4 JW |
7985 | { |
7986 | int i; | |
7987 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7988 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7989 | { |
542d6675 KH |
7990 | if (depind == DEP (dep->chks[i])) |
7991 | return i; | |
800eeca4 JW |
7992 | } |
7993 | return -1; | |
7994 | } | |
7995 | ||
7996 | /* Determine a set of specific resources used for a particular resource | |
7997 | class. Returns the number of specific resources identified For those | |
7998 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7999 | marked nonspecific. |
800eeca4 JW |
8000 | |
8001 | Meanings of value in 'NOTE': | |
8002 | 1) only read/write when the register number is explicitly encoded in the | |
8003 | insn. | |
8004 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8005 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8006 | 3) general register value is used to specify an indirect register; not |
8007 | determinable statically. | |
8008 | 4) only read the given resource when bits 7:0 of the indirect index | |
8009 | register value does not match the register number of the resource; not | |
8010 | determinable statically. | |
8011 | 5) all rules are implementation specific. | |
8012 | 6) only when both the index specified by the reader and the index specified | |
8013 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8014 | statically. |
800eeca4 | 8015 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8016 | set |
800eeca4 JW |
8017 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8018 | only read when these insns reference FR2-31 | |
8019 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8020 | written when these insns write FR32-127 | |
8021 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8022 | instruction | |
8023 | 11) The target predicates are written independently of PR[qp], but source | |
8024 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8025 | cannot statically be determined, all source registers are marked used. | |
8026 | 12) This insn only reads the specified predicate register when that | |
8027 | register is the PR[qp]. | |
ad4b42b4 | 8028 | 13) This reference to ld-c only applies to the GR whose value is loaded |
197865e8 | 8029 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8030 | 14) The RSE resource includes the implementation-specific RSE internal |
8031 | state resources. At least one (and possibly more) of these resources are | |
8032 | read by each instruction listed in IC:rse-readers. At least one (and | |
8033 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8034 | IC:rse-writers. |
800eeca4 | 8035 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8036 | generate. |
7f3dfb9c L |
8037 | 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and |
8038 | mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up. | |
800eeca4 JW |
8039 | |
8040 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8041 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8042 | */ |
8043 | ||
8044 | #define MAX_SPECS 256 | |
8045 | #define DV_CHK 1 | |
8046 | #define DV_REG 0 | |
8047 | ||
8048 | static int | |
5a49b8ac AM |
8049 | specify_resource (const struct ia64_dependency *dep, |
8050 | struct ia64_opcode *idesc, | |
8051 | /* is this a DV chk or a DV reg? */ | |
8052 | int type, | |
8053 | /* returned specific resources */ | |
8054 | struct rsrc specs[MAX_SPECS], | |
8055 | /* resource note for this insn's usage */ | |
8056 | int note, | |
8057 | /* which execution path to examine */ | |
8058 | int path) | |
800eeca4 JW |
8059 | { |
8060 | int count = 0; | |
8061 | int i; | |
8062 | int rsrc_write = 0; | |
8063 | struct rsrc tmpl; | |
197865e8 | 8064 | |
800eeca4 JW |
8065 | if (dep->mode == IA64_DV_WAW |
8066 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8067 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8068 | rsrc_write = 1; | |
8069 | ||
8070 | /* template for any resources we identify */ | |
8071 | tmpl.dependency = dep; | |
8072 | tmpl.note = note; | |
8073 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8074 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8075 | tmpl.link_to_qp_branch = 1; | |
8076 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8077 | tmpl.mem_offset.offset = 0; |
8078 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8079 | tmpl.specific = 1; |
a66d2bb7 | 8080 | tmpl.index = -1; |
7484b8e6 | 8081 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8082 | tmpl.depind = 0; |
8083 | tmpl.file = NULL; | |
8084 | tmpl.line = 0; | |
8085 | tmpl.path = 0; | |
800eeca4 JW |
8086 | |
8087 | #define UNHANDLED \ | |
8088 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8089 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8090 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8091 | ||
8092 | /* we don't need to track these */ | |
8093 | if (dep->semantics == IA64_DVS_NONE) | |
8094 | return 0; | |
8095 | ||
8096 | switch (dep->specifier) | |
8097 | { | |
8098 | case IA64_RS_AR_K: | |
8099 | if (note == 1) | |
542d6675 KH |
8100 | { |
8101 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8102 | { | |
8103 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8104 | if (regno >= 0 && regno <= 7) | |
8105 | { | |
8106 | specs[count] = tmpl; | |
8107 | specs[count++].index = regno; | |
8108 | } | |
8109 | } | |
8110 | } | |
800eeca4 | 8111 | else if (note == 0) |
542d6675 KH |
8112 | { |
8113 | for (i = 0; i < 8; i++) | |
8114 | { | |
8115 | specs[count] = tmpl; | |
8116 | specs[count++].index = i; | |
8117 | } | |
8118 | } | |
800eeca4 | 8119 | else |
542d6675 KH |
8120 | { |
8121 | UNHANDLED; | |
8122 | } | |
800eeca4 JW |
8123 | break; |
8124 | ||
8125 | case IA64_RS_AR_UNAT: | |
8126 | /* This is a mov =AR or mov AR= instruction. */ | |
8127 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8128 | { | |
8129 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8130 | if (regno == AR_UNAT) | |
8131 | { | |
8132 | specs[count++] = tmpl; | |
8133 | } | |
8134 | } | |
8135 | else | |
8136 | { | |
8137 | /* This is a spill/fill, or other instruction that modifies the | |
8138 | unat register. */ | |
8139 | ||
8140 | /* Unless we can determine the specific bits used, mark the whole | |
8141 | thing; bits 8:3 of the memory address indicate the bit used in | |
8142 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8143 | subset of conflicts. */ | |
8144 | specs[count] = tmpl; | |
8145 | if (md.mem_offset.hint) | |
8146 | { | |
542d6675 KH |
8147 | if (md.debug_dv) |
8148 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8149 | /* The index isn't actually used, just set it to something | |
8150 | approximating the bit index. */ | |
800eeca4 JW |
8151 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8152 | specs[count].mem_offset.hint = 1; | |
8153 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8154 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8155 | } | |
8156 | else | |
8157 | { | |
8158 | specs[count++].specific = 0; | |
8159 | } | |
8160 | } | |
8161 | break; | |
8162 | ||
8163 | case IA64_RS_AR: | |
8164 | if (note == 1) | |
542d6675 KH |
8165 | { |
8166 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8167 | { | |
8168 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8169 | if ((regno >= 8 && regno <= 15) | |
8170 | || (regno >= 20 && regno <= 23) | |
8171 | || (regno >= 31 && regno <= 39) | |
8172 | || (regno >= 41 && regno <= 47) | |
8173 | || (regno >= 67 && regno <= 111)) | |
8174 | { | |
8175 | specs[count] = tmpl; | |
8176 | specs[count++].index = regno; | |
8177 | } | |
8178 | } | |
8179 | } | |
800eeca4 | 8180 | else |
542d6675 KH |
8181 | { |
8182 | UNHANDLED; | |
8183 | } | |
800eeca4 JW |
8184 | break; |
8185 | ||
8186 | case IA64_RS_ARb: | |
8187 | if (note == 1) | |
542d6675 KH |
8188 | { |
8189 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8190 | { | |
8191 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8192 | if ((regno >= 48 && regno <= 63) | |
8193 | || (regno >= 112 && regno <= 127)) | |
8194 | { | |
8195 | specs[count] = tmpl; | |
8196 | specs[count++].index = regno; | |
8197 | } | |
8198 | } | |
8199 | } | |
800eeca4 | 8200 | else if (note == 0) |
542d6675 KH |
8201 | { |
8202 | for (i = 48; i < 64; i++) | |
8203 | { | |
8204 | specs[count] = tmpl; | |
8205 | specs[count++].index = i; | |
8206 | } | |
8207 | for (i = 112; i < 128; i++) | |
8208 | { | |
8209 | specs[count] = tmpl; | |
8210 | specs[count++].index = i; | |
8211 | } | |
8212 | } | |
197865e8 | 8213 | else |
542d6675 KH |
8214 | { |
8215 | UNHANDLED; | |
8216 | } | |
800eeca4 JW |
8217 | break; |
8218 | ||
8219 | case IA64_RS_BR: | |
8220 | if (note != 1) | |
542d6675 KH |
8221 | { |
8222 | UNHANDLED; | |
8223 | } | |
800eeca4 | 8224 | else |
542d6675 KH |
8225 | { |
8226 | if (rsrc_write) | |
8227 | { | |
8228 | for (i = 0; i < idesc->num_outputs; i++) | |
8229 | if (idesc->operands[i] == IA64_OPND_B1 | |
8230 | || idesc->operands[i] == IA64_OPND_B2) | |
8231 | { | |
8232 | specs[count] = tmpl; | |
8233 | specs[count++].index = | |
8234 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8235 | } | |
8236 | } | |
8237 | else | |
8238 | { | |
40449e9f | 8239 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8240 | if (idesc->operands[i] == IA64_OPND_B1 |
8241 | || idesc->operands[i] == IA64_OPND_B2) | |
8242 | { | |
8243 | specs[count] = tmpl; | |
8244 | specs[count++].index = | |
8245 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8246 | } | |
8247 | } | |
8248 | } | |
800eeca4 JW |
8249 | break; |
8250 | ||
8251 | case IA64_RS_CPUID: /* four or more registers */ | |
8252 | if (note == 3) | |
542d6675 KH |
8253 | { |
8254 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8255 | { | |
8256 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8257 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8258 | && KNOWN (regno)) | |
8259 | { | |
8260 | specs[count] = tmpl; | |
8261 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8262 | } | |
8263 | else | |
8264 | { | |
8265 | specs[count] = tmpl; | |
8266 | specs[count++].specific = 0; | |
8267 | } | |
8268 | } | |
8269 | } | |
800eeca4 | 8270 | else |
542d6675 KH |
8271 | { |
8272 | UNHANDLED; | |
8273 | } | |
800eeca4 JW |
8274 | break; |
8275 | ||
8276 | case IA64_RS_DBR: /* four or more registers */ | |
8277 | if (note == 3) | |
542d6675 KH |
8278 | { |
8279 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8280 | { | |
8281 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8282 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8283 | && KNOWN (regno)) | |
8284 | { | |
8285 | specs[count] = tmpl; | |
8286 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8287 | } | |
8288 | else | |
8289 | { | |
8290 | specs[count] = tmpl; | |
8291 | specs[count++].specific = 0; | |
8292 | } | |
8293 | } | |
8294 | } | |
800eeca4 | 8295 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8296 | { |
8297 | specs[count] = tmpl; | |
8298 | specs[count++].specific = 0; | |
8299 | } | |
800eeca4 | 8300 | else |
542d6675 KH |
8301 | { |
8302 | UNHANDLED; | |
8303 | } | |
800eeca4 JW |
8304 | break; |
8305 | ||
8306 | case IA64_RS_IBR: /* four or more registers */ | |
8307 | if (note == 3) | |
542d6675 KH |
8308 | { |
8309 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8310 | { | |
8311 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8312 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8313 | && KNOWN (regno)) | |
8314 | { | |
8315 | specs[count] = tmpl; | |
8316 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8317 | } | |
8318 | else | |
8319 | { | |
8320 | specs[count] = tmpl; | |
8321 | specs[count++].specific = 0; | |
8322 | } | |
8323 | } | |
8324 | } | |
800eeca4 | 8325 | else |
542d6675 KH |
8326 | { |
8327 | UNHANDLED; | |
8328 | } | |
800eeca4 JW |
8329 | break; |
8330 | ||
8331 | case IA64_RS_MSR: | |
8332 | if (note == 5) | |
8333 | { | |
8334 | /* These are implementation specific. Force all references to | |
8335 | conflict with all other references. */ | |
8336 | specs[count] = tmpl; | |
8337 | specs[count++].specific = 0; | |
8338 | } | |
8339 | else | |
8340 | { | |
8341 | UNHANDLED; | |
8342 | } | |
8343 | break; | |
8344 | ||
8345 | case IA64_RS_PKR: /* 16 or more registers */ | |
8346 | if (note == 3 || note == 4) | |
542d6675 KH |
8347 | { |
8348 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8349 | { | |
8350 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8351 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8352 | && KNOWN (regno)) | |
8353 | { | |
8354 | if (note == 3) | |
8355 | { | |
8356 | specs[count] = tmpl; | |
8357 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8358 | } | |
8359 | else | |
8360 | for (i = 0; i < NELEMS (gr_values); i++) | |
8361 | { | |
8362 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8363 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8364 | { |
8365 | specs[count] = tmpl; | |
8366 | specs[count++].index = i; | |
8367 | } | |
8368 | } | |
8369 | } | |
8370 | else | |
8371 | { | |
8372 | specs[count] = tmpl; | |
8373 | specs[count++].specific = 0; | |
8374 | } | |
8375 | } | |
8376 | } | |
8377 | else if (note == 0) | |
8378 | { | |
8379 | /* probe et al. */ | |
8380 | specs[count] = tmpl; | |
8381 | specs[count++].specific = 0; | |
8382 | } | |
8383 | break; | |
8384 | ||
8385 | case IA64_RS_PMC: /* four or more registers */ | |
8386 | if (note == 3) | |
8387 | { | |
8388 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8389 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8390 | ||
8391 | { | |
91d6fa6a NC |
8392 | int reg_index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) |
8393 | ? 1 : !rsrc_write); | |
8394 | int regno = CURR_SLOT.opnd[reg_index].X_add_number - REG_GR; | |
542d6675 KH |
8395 | if (regno >= 0 && regno < NELEMS (gr_values) |
8396 | && KNOWN (regno)) | |
8397 | { | |
8398 | specs[count] = tmpl; | |
8399 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8400 | } | |
8401 | else | |
8402 | { | |
8403 | specs[count] = tmpl; | |
8404 | specs[count++].specific = 0; | |
8405 | } | |
8406 | } | |
8407 | } | |
8408 | else | |
8409 | { | |
8410 | UNHANDLED; | |
8411 | } | |
800eeca4 JW |
8412 | break; |
8413 | ||
8414 | case IA64_RS_PMD: /* four or more registers */ | |
8415 | if (note == 3) | |
542d6675 KH |
8416 | { |
8417 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8418 | { | |
8419 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8420 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8421 | && KNOWN (regno)) | |
8422 | { | |
8423 | specs[count] = tmpl; | |
8424 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8425 | } | |
8426 | else | |
8427 | { | |
8428 | specs[count] = tmpl; | |
8429 | specs[count++].specific = 0; | |
8430 | } | |
8431 | } | |
8432 | } | |
800eeca4 | 8433 | else |
542d6675 KH |
8434 | { |
8435 | UNHANDLED; | |
8436 | } | |
800eeca4 JW |
8437 | break; |
8438 | ||
8439 | case IA64_RS_RR: /* eight registers */ | |
8440 | if (note == 6) | |
542d6675 KH |
8441 | { |
8442 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8443 | { | |
8444 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8445 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8446 | && KNOWN (regno)) | |
8447 | { | |
8448 | specs[count] = tmpl; | |
8449 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8450 | } | |
8451 | else | |
8452 | { | |
8453 | specs[count] = tmpl; | |
8454 | specs[count++].specific = 0; | |
8455 | } | |
8456 | } | |
8457 | } | |
800eeca4 | 8458 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8459 | { |
8460 | specs[count] = tmpl; | |
8461 | specs[count++].specific = 0; | |
8462 | } | |
197865e8 | 8463 | else |
542d6675 KH |
8464 | { |
8465 | UNHANDLED; | |
8466 | } | |
800eeca4 JW |
8467 | break; |
8468 | ||
8469 | case IA64_RS_CR_IRR: | |
197865e8 | 8470 | if (note == 0) |
542d6675 KH |
8471 | { |
8472 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8473 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8474 | if (rsrc_write | |
8475 | && idesc->operands[1] == IA64_OPND_CR3 | |
8476 | && regno == CR_IVR) | |
8477 | { | |
8478 | for (i = 0; i < 4; i++) | |
8479 | { | |
8480 | specs[count] = tmpl; | |
8481 | specs[count++].index = CR_IRR0 + i; | |
8482 | } | |
8483 | } | |
8484 | } | |
800eeca4 | 8485 | else if (note == 1) |
542d6675 KH |
8486 | { |
8487 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8488 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8489 | && regno >= CR_IRR0 | |
8490 | && regno <= CR_IRR3) | |
8491 | { | |
8492 | specs[count] = tmpl; | |
8493 | specs[count++].index = regno; | |
8494 | } | |
8495 | } | |
800eeca4 | 8496 | else |
542d6675 KH |
8497 | { |
8498 | UNHANDLED; | |
8499 | } | |
800eeca4 JW |
8500 | break; |
8501 | ||
1ca35711 L |
8502 | case IA64_RS_CR_IIB: |
8503 | if (note != 0) | |
8504 | { | |
8505 | UNHANDLED; | |
8506 | } | |
8507 | else | |
8508 | { | |
8509 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8510 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8511 | && (regno == CR_IIB0 || regno == CR_IIB1)) | |
8512 | { | |
8513 | specs[count] = tmpl; | |
8514 | specs[count++].index = regno; | |
8515 | } | |
8516 | } | |
8517 | break; | |
8518 | ||
800eeca4 JW |
8519 | case IA64_RS_CR_LRR: |
8520 | if (note != 1) | |
542d6675 KH |
8521 | { |
8522 | UNHANDLED; | |
8523 | } | |
197865e8 | 8524 | else |
542d6675 KH |
8525 | { |
8526 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8527 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8528 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8529 | { | |
8530 | specs[count] = tmpl; | |
8531 | specs[count++].index = regno; | |
8532 | } | |
8533 | } | |
800eeca4 JW |
8534 | break; |
8535 | ||
8536 | case IA64_RS_CR: | |
8537 | if (note == 1) | |
542d6675 KH |
8538 | { |
8539 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8540 | { | |
8541 | specs[count] = tmpl; | |
8542 | specs[count++].index = | |
8543 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8544 | } | |
8545 | } | |
800eeca4 | 8546 | else |
542d6675 KH |
8547 | { |
8548 | UNHANDLED; | |
8549 | } | |
800eeca4 JW |
8550 | break; |
8551 | ||
8552 | case IA64_RS_FR: | |
8553 | case IA64_RS_FRb: | |
8554 | if (note != 1) | |
542d6675 KH |
8555 | { |
8556 | UNHANDLED; | |
8557 | } | |
800eeca4 | 8558 | else if (rsrc_write) |
542d6675 KH |
8559 | { |
8560 | if (dep->specifier == IA64_RS_FRb | |
8561 | && idesc->operands[0] == IA64_OPND_F1) | |
8562 | { | |
8563 | specs[count] = tmpl; | |
8564 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8565 | } | |
8566 | } | |
800eeca4 | 8567 | else |
542d6675 KH |
8568 | { |
8569 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8570 | { | |
8571 | if (idesc->operands[i] == IA64_OPND_F2 | |
8572 | || idesc->operands[i] == IA64_OPND_F3 | |
8573 | || idesc->operands[i] == IA64_OPND_F4) | |
8574 | { | |
8575 | specs[count] = tmpl; | |
8576 | specs[count++].index = | |
8577 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8578 | } | |
8579 | } | |
8580 | } | |
800eeca4 JW |
8581 | break; |
8582 | ||
8583 | case IA64_RS_GR: | |
8584 | if (note == 13) | |
542d6675 KH |
8585 | { |
8586 | /* This reference applies only to the GR whose value is loaded with | |
8587 | data returned from memory. */ | |
8588 | specs[count] = tmpl; | |
8589 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8590 | } | |
800eeca4 | 8591 | else if (note == 1) |
542d6675 KH |
8592 | { |
8593 | if (rsrc_write) | |
8594 | { | |
8595 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8596 | if (idesc->operands[i] == IA64_OPND_R1 |
8597 | || idesc->operands[i] == IA64_OPND_R2 | |
8598 | || idesc->operands[i] == IA64_OPND_R3) | |
8599 | { | |
8600 | specs[count] = tmpl; | |
197865e8 | 8601 | specs[count++].index = |
50b81f19 JW |
8602 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8603 | } | |
8604 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8605 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8606 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8607 | { | |
8608 | specs[count] = tmpl; | |
8609 | specs[count++].index = | |
8610 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8611 | } | |
542d6675 KH |
8612 | } |
8613 | else | |
8614 | { | |
8615 | /* Look for anything that reads a GR. */ | |
8616 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8617 | { | |
8618 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8619 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8620 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8621 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8622 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8623 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8624 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8625 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8626 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8627 | || ((i >= idesc->num_outputs) | |
8628 | && (idesc->operands[i] == IA64_OPND_R1 | |
8629 | || idesc->operands[i] == IA64_OPND_R2 | |
8630 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8631 | /* addl source register. */ |
8632 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8633 | { |
8634 | specs[count] = tmpl; | |
8635 | specs[count++].index = | |
8636 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8637 | } | |
8638 | } | |
8639 | } | |
8640 | } | |
197865e8 | 8641 | else |
542d6675 KH |
8642 | { |
8643 | UNHANDLED; | |
8644 | } | |
800eeca4 JW |
8645 | break; |
8646 | ||
139368c9 JW |
8647 | /* This is the same as IA64_RS_PRr, except that the register range is |
8648 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8649 | case IA64_RS_PR: |
8650 | if (note == 0) | |
542d6675 | 8651 | { |
139368c9 | 8652 | for (i = 1; i < 16; i++) |
542d6675 | 8653 | { |
139368c9 JW |
8654 | specs[count] = tmpl; |
8655 | specs[count++].index = i; | |
8656 | } | |
8657 | } | |
8658 | else if (note == 7) | |
8659 | { | |
8660 | valueT mask = 0; | |
8661 | /* Mark only those registers indicated by the mask. */ | |
8662 | if (rsrc_write) | |
8663 | { | |
8664 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8665 | for (i = 1; i < 16; i++) | |
8666 | if (mask & ((valueT) 1 << i)) | |
8667 | { | |
8668 | specs[count] = tmpl; | |
8669 | specs[count++].index = i; | |
8670 | } | |
8671 | } | |
8672 | else | |
8673 | { | |
8674 | UNHANDLED; | |
8675 | } | |
8676 | } | |
8677 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8678 | { | |
8679 | if (rsrc_write) | |
8680 | { | |
8681 | for (i = 0; i < idesc->num_outputs; i++) | |
8682 | { | |
8683 | if (idesc->operands[i] == IA64_OPND_P1 | |
8684 | || idesc->operands[i] == IA64_OPND_P2) | |
8685 | { | |
8686 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8687 | if (regno >= 1 && regno < 16) | |
8688 | { | |
8689 | specs[count] = tmpl; | |
8690 | specs[count++].index = regno; | |
8691 | } | |
8692 | } | |
8693 | } | |
8694 | } | |
8695 | else | |
8696 | { | |
8697 | UNHANDLED; | |
8698 | } | |
8699 | } | |
8700 | else if (note == 12) | |
8701 | { | |
8702 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8703 | { | |
8704 | specs[count] = tmpl; | |
8705 | specs[count++].index = CURR_SLOT.qp_regno; | |
8706 | } | |
8707 | } | |
8708 | else if (note == 1) | |
8709 | { | |
8710 | if (rsrc_write) | |
8711 | { | |
8712 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8713 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8714 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8715 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8716 | |
8717 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8718 | || idesc->operands[0] == IA64_OPND_P2) | |
8719 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8720 | { |
8721 | specs[count] = tmpl; | |
139368c9 JW |
8722 | specs[count].cmp_type = |
8723 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8724 | specs[count++].index = p1; | |
8725 | } | |
8726 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8727 | || idesc->operands[1] == IA64_OPND_P2) | |
8728 | && p2 >= 1 && p2 < 16) | |
8729 | { | |
8730 | specs[count] = tmpl; | |
8731 | specs[count].cmp_type = | |
8732 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8733 | specs[count++].index = p2; | |
542d6675 KH |
8734 | } |
8735 | } | |
8736 | else | |
8737 | { | |
139368c9 | 8738 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8739 | { |
8740 | specs[count] = tmpl; | |
139368c9 JW |
8741 | specs[count++].index = CURR_SLOT.qp_regno; |
8742 | } | |
8743 | if (idesc->operands[1] == IA64_OPND_PR) | |
8744 | { | |
8745 | for (i = 1; i < 16; i++) | |
8746 | { | |
8747 | specs[count] = tmpl; | |
8748 | specs[count++].index = i; | |
8749 | } | |
542d6675 KH |
8750 | } |
8751 | } | |
8752 | } | |
139368c9 JW |
8753 | else |
8754 | { | |
8755 | UNHANDLED; | |
8756 | } | |
8757 | break; | |
8758 | ||
8759 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8760 | simplified cases of this. */ | |
8761 | case IA64_RS_PRr: | |
8762 | if (note == 0) | |
8763 | { | |
8764 | for (i = 16; i < 63; i++) | |
8765 | { | |
8766 | specs[count] = tmpl; | |
8767 | specs[count++].index = i; | |
8768 | } | |
8769 | } | |
800eeca4 | 8770 | else if (note == 7) |
542d6675 KH |
8771 | { |
8772 | valueT mask = 0; | |
8773 | /* Mark only those registers indicated by the mask. */ | |
8774 | if (rsrc_write | |
8775 | && idesc->operands[0] == IA64_OPND_PR) | |
8776 | { | |
8777 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8778 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8779 | for (i = 16; i < 63; i++) |
8780 | { | |
8781 | specs[count] = tmpl; | |
8782 | specs[count++].index = i; | |
8783 | } | |
542d6675 KH |
8784 | } |
8785 | else if (rsrc_write | |
8786 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8787 | { | |
8788 | for (i = 16; i < 63; i++) | |
8789 | { | |
8790 | specs[count] = tmpl; | |
8791 | specs[count++].index = i; | |
8792 | } | |
8793 | } | |
8794 | else | |
8795 | { | |
8796 | UNHANDLED; | |
8797 | } | |
8798 | } | |
800eeca4 | 8799 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8800 | { |
8801 | if (rsrc_write) | |
8802 | { | |
8803 | for (i = 0; i < idesc->num_outputs; i++) | |
8804 | { | |
8805 | if (idesc->operands[i] == IA64_OPND_P1 | |
8806 | || idesc->operands[i] == IA64_OPND_P2) | |
8807 | { | |
8808 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8809 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8810 | { |
8811 | specs[count] = tmpl; | |
8812 | specs[count++].index = regno; | |
8813 | } | |
8814 | } | |
8815 | } | |
8816 | } | |
8817 | else | |
8818 | { | |
8819 | UNHANDLED; | |
8820 | } | |
8821 | } | |
800eeca4 | 8822 | else if (note == 12) |
542d6675 | 8823 | { |
139368c9 | 8824 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8825 | { |
8826 | specs[count] = tmpl; | |
8827 | specs[count++].index = CURR_SLOT.qp_regno; | |
8828 | } | |
8829 | } | |
800eeca4 | 8830 | else if (note == 1) |
542d6675 KH |
8831 | { |
8832 | if (rsrc_write) | |
8833 | { | |
8834 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8835 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8836 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8837 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8838 | |
542d6675 KH |
8839 | if ((idesc->operands[0] == IA64_OPND_P1 |
8840 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8841 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8842 | { |
8843 | specs[count] = tmpl; | |
4a4f25cf | 8844 | specs[count].cmp_type = |
7484b8e6 | 8845 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8846 | specs[count++].index = p1; |
8847 | } | |
8848 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8849 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8850 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8851 | { |
8852 | specs[count] = tmpl; | |
4a4f25cf | 8853 | specs[count].cmp_type = |
7484b8e6 | 8854 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8855 | specs[count++].index = p2; |
8856 | } | |
8857 | } | |
8858 | else | |
8859 | { | |
139368c9 | 8860 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8861 | { |
8862 | specs[count] = tmpl; | |
8863 | specs[count++].index = CURR_SLOT.qp_regno; | |
8864 | } | |
8865 | if (idesc->operands[1] == IA64_OPND_PR) | |
8866 | { | |
139368c9 | 8867 | for (i = 16; i < 63; i++) |
542d6675 KH |
8868 | { |
8869 | specs[count] = tmpl; | |
8870 | specs[count++].index = i; | |
8871 | } | |
8872 | } | |
8873 | } | |
8874 | } | |
197865e8 | 8875 | else |
542d6675 KH |
8876 | { |
8877 | UNHANDLED; | |
8878 | } | |
800eeca4 JW |
8879 | break; |
8880 | ||
8881 | case IA64_RS_PSR: | |
197865e8 | 8882 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8883 | dep->regindex. */ |
800eeca4 | 8884 | if (note == 0) |
542d6675 KH |
8885 | { |
8886 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8887 | { | |
8888 | if (dep->regindex < 6) | |
8889 | { | |
8890 | specs[count++] = tmpl; | |
8891 | } | |
8892 | } | |
8893 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8894 | { | |
8895 | if (dep->regindex < 32 | |
8896 | || dep->regindex == 35 | |
8897 | || dep->regindex == 36 | |
8898 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8899 | { | |
8900 | specs[count++] = tmpl; | |
8901 | } | |
8902 | } | |
8903 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8904 | { | |
8905 | if (dep->regindex < 32 | |
8906 | || dep->regindex == 35 | |
8907 | || dep->regindex == 36 | |
8908 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8909 | { | |
8910 | specs[count++] = tmpl; | |
8911 | } | |
8912 | } | |
8913 | else | |
8914 | { | |
8915 | /* Several PSR bits have very specific dependencies. */ | |
8916 | switch (dep->regindex) | |
8917 | { | |
8918 | default: | |
8919 | specs[count++] = tmpl; | |
8920 | break; | |
8921 | case PSR_IC: | |
8922 | if (rsrc_write) | |
8923 | { | |
8924 | specs[count++] = tmpl; | |
8925 | } | |
8926 | else | |
8927 | { | |
8928 | /* Only certain CR accesses use PSR.ic */ | |
8929 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8930 | || idesc->operands[1] == IA64_OPND_CR3) | |
8931 | { | |
91d6fa6a | 8932 | int reg_index = |
542d6675 KH |
8933 | ((idesc->operands[0] == IA64_OPND_CR3) |
8934 | ? 0 : 1); | |
8935 | int regno = | |
91d6fa6a | 8936 | CURR_SLOT.opnd[reg_index].X_add_number - REG_CR; |
542d6675 KH |
8937 | |
8938 | switch (regno) | |
8939 | { | |
8940 | default: | |
8941 | break; | |
8942 | case CR_ITIR: | |
8943 | case CR_IFS: | |
8944 | case CR_IIM: | |
8945 | case CR_IIP: | |
8946 | case CR_IPSR: | |
8947 | case CR_ISR: | |
8948 | case CR_IFA: | |
8949 | case CR_IHA: | |
1ca35711 L |
8950 | case CR_IIB0: |
8951 | case CR_IIB1: | |
542d6675 KH |
8952 | case CR_IIPA: |
8953 | specs[count++] = tmpl; | |
8954 | break; | |
8955 | } | |
8956 | } | |
8957 | } | |
8958 | break; | |
8959 | case PSR_CPL: | |
8960 | if (rsrc_write) | |
8961 | { | |
8962 | specs[count++] = tmpl; | |
8963 | } | |
8964 | else | |
8965 | { | |
8966 | /* Only some AR accesses use cpl */ | |
8967 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8968 | || idesc->operands[1] == IA64_OPND_AR3) | |
8969 | { | |
91d6fa6a | 8970 | int reg_index = |
542d6675 KH |
8971 | ((idesc->operands[0] == IA64_OPND_AR3) |
8972 | ? 0 : 1); | |
8973 | int regno = | |
91d6fa6a | 8974 | CURR_SLOT.opnd[reg_index].X_add_number - REG_AR; |
542d6675 KH |
8975 | |
8976 | if (regno == AR_ITC | |
4f8631b1 | 8977 | || regno == AR_RUC |
91d6fa6a | 8978 | || (reg_index == 0 |
4f8631b1 | 8979 | && (regno == AR_RSC |
542d6675 KH |
8980 | || (regno >= AR_K0 |
8981 | && regno <= AR_K7)))) | |
8982 | { | |
8983 | specs[count++] = tmpl; | |
8984 | } | |
8985 | } | |
8986 | else | |
8987 | { | |
8988 | specs[count++] = tmpl; | |
8989 | } | |
8990 | break; | |
8991 | } | |
8992 | } | |
8993 | } | |
8994 | } | |
800eeca4 | 8995 | else if (note == 7) |
542d6675 KH |
8996 | { |
8997 | valueT mask = 0; | |
8998 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8999 | { | |
9000 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9001 | } | |
9002 | else | |
9003 | { | |
9004 | UNHANDLED; | |
9005 | } | |
9006 | if (mask & ((valueT) 1 << dep->regindex)) | |
9007 | { | |
9008 | specs[count++] = tmpl; | |
9009 | } | |
9010 | } | |
800eeca4 | 9011 | else if (note == 8) |
542d6675 KH |
9012 | { |
9013 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9014 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9015 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9016 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9017 | { | |
9018 | if (idesc->operands[i] == IA64_OPND_F1 | |
9019 | || idesc->operands[i] == IA64_OPND_F2 | |
9020 | || idesc->operands[i] == IA64_OPND_F3 | |
9021 | || idesc->operands[i] == IA64_OPND_F4) | |
9022 | { | |
9023 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9024 | if (reg >= min && reg <= max) | |
9025 | { | |
9026 | specs[count++] = tmpl; | |
9027 | } | |
9028 | } | |
9029 | } | |
9030 | } | |
800eeca4 | 9031 | else if (note == 9) |
542d6675 KH |
9032 | { |
9033 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9034 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9035 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9036 | FR2-31 */ | |
9037 | for (i = 0; i < idesc->num_outputs; i++) | |
9038 | { | |
9039 | if (idesc->operands[i] == IA64_OPND_F1) | |
9040 | { | |
9041 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9042 | if (reg >= min && reg <= max) | |
9043 | { | |
9044 | specs[count++] = tmpl; | |
9045 | } | |
9046 | } | |
9047 | } | |
9048 | } | |
800eeca4 | 9049 | else if (note == 10) |
542d6675 KH |
9050 | { |
9051 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9052 | { | |
9053 | if (idesc->operands[i] == IA64_OPND_R1 | |
9054 | || idesc->operands[i] == IA64_OPND_R2 | |
9055 | || idesc->operands[i] == IA64_OPND_R3) | |
9056 | { | |
9057 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9058 | if (regno >= 16 && regno <= 31) | |
9059 | { | |
9060 | specs[count++] = tmpl; | |
9061 | } | |
9062 | } | |
9063 | } | |
9064 | } | |
800eeca4 | 9065 | else |
542d6675 KH |
9066 | { |
9067 | UNHANDLED; | |
9068 | } | |
800eeca4 JW |
9069 | break; |
9070 | ||
9071 | case IA64_RS_AR_FPSR: | |
9072 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9073 | { |
9074 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9075 | if (regno == AR_FPSR) | |
9076 | { | |
9077 | specs[count++] = tmpl; | |
9078 | } | |
9079 | } | |
800eeca4 | 9080 | else |
542d6675 KH |
9081 | { |
9082 | specs[count++] = tmpl; | |
9083 | } | |
800eeca4 JW |
9084 | break; |
9085 | ||
197865e8 | 9086 | case IA64_RS_ARX: |
800eeca4 JW |
9087 | /* Handle all AR[REG] resources */ |
9088 | if (note == 0 || note == 1) | |
542d6675 KH |
9089 | { |
9090 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9091 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9092 | && regno == dep->regindex) | |
9093 | { | |
9094 | specs[count++] = tmpl; | |
9095 | } | |
9096 | /* other AR[REG] resources may be affected by AR accesses */ | |
9097 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9098 | { | |
9099 | /* AR[] writes */ | |
9100 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9101 | switch (dep->regindex) | |
9102 | { | |
9103 | default: | |
9104 | break; | |
9105 | case AR_BSP: | |
9106 | case AR_RNAT: | |
9107 | if (regno == AR_BSPSTORE) | |
9108 | { | |
9109 | specs[count++] = tmpl; | |
9110 | } | |
9111 | case AR_RSC: | |
9112 | if (!rsrc_write && | |
9113 | (regno == AR_BSPSTORE | |
9114 | || regno == AR_RNAT)) | |
9115 | { | |
9116 | specs[count++] = tmpl; | |
9117 | } | |
9118 | break; | |
9119 | } | |
9120 | } | |
9121 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9122 | { | |
9123 | /* AR[] reads */ | |
9124 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9125 | switch (dep->regindex) | |
9126 | { | |
9127 | default: | |
9128 | break; | |
9129 | case AR_RSC: | |
9130 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9131 | { | |
9132 | specs[count++] = tmpl; | |
9133 | } | |
9134 | break; | |
9135 | } | |
9136 | } | |
9137 | else | |
9138 | { | |
9139 | specs[count++] = tmpl; | |
9140 | } | |
9141 | } | |
800eeca4 | 9142 | else |
542d6675 KH |
9143 | { |
9144 | UNHANDLED; | |
9145 | } | |
800eeca4 JW |
9146 | break; |
9147 | ||
9148 | case IA64_RS_CRX: | |
7f3dfb9c L |
9149 | /* Handle all CR[REG] resources. |
9150 | ??? FIXME: The rule 17 isn't really handled correctly. */ | |
9151 | if (note == 0 || note == 1 || note == 17) | |
542d6675 KH |
9152 | { |
9153 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9154 | { | |
9155 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9156 | if (regno == dep->regindex) | |
9157 | { | |
9158 | specs[count++] = tmpl; | |
9159 | } | |
9160 | else if (!rsrc_write) | |
9161 | { | |
9162 | /* Reads from CR[IVR] affect other resources. */ | |
9163 | if (regno == CR_IVR) | |
9164 | { | |
9165 | if ((dep->regindex >= CR_IRR0 | |
9166 | && dep->regindex <= CR_IRR3) | |
9167 | || dep->regindex == CR_TPR) | |
9168 | { | |
9169 | specs[count++] = tmpl; | |
9170 | } | |
9171 | } | |
9172 | } | |
9173 | } | |
9174 | else | |
9175 | { | |
9176 | specs[count++] = tmpl; | |
9177 | } | |
9178 | } | |
800eeca4 | 9179 | else |
542d6675 KH |
9180 | { |
9181 | UNHANDLED; | |
9182 | } | |
800eeca4 JW |
9183 | break; |
9184 | ||
9185 | case IA64_RS_INSERVICE: | |
9186 | /* look for write of EOI (67) or read of IVR (65) */ | |
9187 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9188 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9189 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9190 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9191 | { | |
9192 | specs[count++] = tmpl; | |
9193 | } | |
800eeca4 JW |
9194 | break; |
9195 | ||
9196 | case IA64_RS_GR0: | |
9197 | if (note == 1) | |
542d6675 KH |
9198 | { |
9199 | specs[count++] = tmpl; | |
9200 | } | |
800eeca4 | 9201 | else |
542d6675 KH |
9202 | { |
9203 | UNHANDLED; | |
9204 | } | |
800eeca4 JW |
9205 | break; |
9206 | ||
9207 | case IA64_RS_CFM: | |
9208 | if (note != 2) | |
542d6675 KH |
9209 | { |
9210 | specs[count++] = tmpl; | |
9211 | } | |
800eeca4 | 9212 | else |
542d6675 KH |
9213 | { |
9214 | /* Check if any of the registers accessed are in the rotating region. | |
9215 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9216 | region */ | |
9217 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9218 | { | |
9219 | if (idesc->operands[i] == IA64_OPND_R1 | |
9220 | || idesc->operands[i] == IA64_OPND_R2 | |
9221 | || idesc->operands[i] == IA64_OPND_R3) | |
9222 | { | |
9223 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9224 | /* Assumes that md.rot.num_regs is always valid */ | |
9225 | if (md.rot.num_regs > 0 | |
9226 | && num > 31 | |
9227 | && num < 31 + md.rot.num_regs) | |
9228 | { | |
9229 | specs[count] = tmpl; | |
9230 | specs[count++].specific = 0; | |
9231 | } | |
9232 | } | |
9233 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9234 | || idesc->operands[i] == IA64_OPND_F2 | |
9235 | || idesc->operands[i] == IA64_OPND_F3 | |
9236 | || idesc->operands[i] == IA64_OPND_F4) | |
9237 | { | |
9238 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9239 | if (num > 31) | |
9240 | { | |
9241 | specs[count] = tmpl; | |
9242 | specs[count++].specific = 0; | |
9243 | } | |
9244 | } | |
9245 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9246 | || idesc->operands[i] == IA64_OPND_P2) | |
9247 | { | |
9248 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9249 | if (num > 15) | |
9250 | { | |
9251 | specs[count] = tmpl; | |
9252 | specs[count++].specific = 0; | |
9253 | } | |
9254 | } | |
9255 | } | |
9256 | if (CURR_SLOT.qp_regno > 15) | |
9257 | { | |
9258 | specs[count] = tmpl; | |
9259 | specs[count++].specific = 0; | |
9260 | } | |
9261 | } | |
800eeca4 JW |
9262 | break; |
9263 | ||
139368c9 JW |
9264 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9265 | the fact that there is only one register. */ | |
800eeca4 JW |
9266 | case IA64_RS_PR63: |
9267 | if (note == 0) | |
542d6675 KH |
9268 | { |
9269 | specs[count++] = tmpl; | |
9270 | } | |
139368c9 | 9271 | else if (note == 7) |
40449e9f KH |
9272 | { |
9273 | valueT mask = 0; | |
9274 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9275 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9276 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9277 | specs[count++] = tmpl; |
40449e9f | 9278 | } |
800eeca4 | 9279 | else if (note == 11) |
542d6675 KH |
9280 | { |
9281 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9282 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9283 | || (idesc->operands[1] == IA64_OPND_P2 | |
9284 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9285 | { | |
9286 | specs[count++] = tmpl; | |
9287 | } | |
9288 | } | |
800eeca4 | 9289 | else if (note == 12) |
542d6675 KH |
9290 | { |
9291 | if (CURR_SLOT.qp_regno == 63) | |
9292 | { | |
9293 | specs[count++] = tmpl; | |
9294 | } | |
9295 | } | |
800eeca4 | 9296 | else if (note == 1) |
542d6675 KH |
9297 | { |
9298 | if (rsrc_write) | |
9299 | { | |
40449e9f KH |
9300 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9301 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9302 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9303 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9304 | |
4a4f25cf | 9305 | if (p1 == 63 |
7484b8e6 TW |
9306 | && (idesc->operands[0] == IA64_OPND_P1 |
9307 | || idesc->operands[0] == IA64_OPND_P2)) | |
9308 | { | |
40449e9f | 9309 | specs[count] = tmpl; |
4a4f25cf | 9310 | specs[count++].cmp_type = |
7484b8e6 TW |
9311 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9312 | } | |
9313 | if (p2 == 63 | |
9314 | && (idesc->operands[1] == IA64_OPND_P1 | |
9315 | || idesc->operands[1] == IA64_OPND_P2)) | |
9316 | { | |
40449e9f | 9317 | specs[count] = tmpl; |
4a4f25cf | 9318 | specs[count++].cmp_type = |
7484b8e6 TW |
9319 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9320 | } | |
542d6675 KH |
9321 | } |
9322 | else | |
9323 | { | |
9324 | if (CURR_SLOT.qp_regno == 63) | |
9325 | { | |
9326 | specs[count++] = tmpl; | |
9327 | } | |
9328 | } | |
9329 | } | |
800eeca4 | 9330 | else |
542d6675 KH |
9331 | { |
9332 | UNHANDLED; | |
9333 | } | |
800eeca4 JW |
9334 | break; |
9335 | ||
9336 | case IA64_RS_RSE: | |
9337 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9338 | read resources have not yet been completely identified, so for now |
9339 | treat RSE as a single resource */ | |
800eeca4 | 9340 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9341 | { |
9342 | if (rsrc_write) | |
9343 | { | |
9344 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9345 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9346 | { | |
a66d2bb7 | 9347 | specs[count++] = tmpl; |
542d6675 KH |
9348 | } |
9349 | } | |
9350 | else | |
9351 | { | |
9352 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9353 | { | |
9354 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9355 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9356 | { | |
9357 | specs[count++] = tmpl; | |
9358 | } | |
9359 | } | |
9360 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9361 | { | |
9362 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9363 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9364 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9365 | { | |
9366 | specs[count++] = tmpl; | |
9367 | } | |
9368 | } | |
9369 | } | |
9370 | } | |
197865e8 | 9371 | else |
542d6675 KH |
9372 | { |
9373 | specs[count++] = tmpl; | |
9374 | } | |
800eeca4 JW |
9375 | break; |
9376 | ||
9377 | case IA64_RS_ANY: | |
9378 | /* FIXME -- do any of these need to be non-specific? */ | |
9379 | specs[count++] = tmpl; | |
9380 | break; | |
9381 | ||
9382 | default: | |
9383 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9384 | break; | |
9385 | } | |
9386 | ||
9387 | return count; | |
9388 | } | |
9389 | ||
9390 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9391 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9392 | ||
800eeca4 | 9393 | static void |
5a49b8ac | 9394 | clear_qp_branch_flag (valueT mask) |
800eeca4 JW |
9395 | { |
9396 | int i; | |
542d6675 | 9397 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9398 | { |
197865e8 | 9399 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9400 | if ((bit & mask) != 0) |
542d6675 KH |
9401 | { |
9402 | regdeps[i].link_to_qp_branch = 0; | |
9403 | } | |
800eeca4 JW |
9404 | } |
9405 | } | |
9406 | ||
5e2f6673 L |
9407 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9408 | any mutexes which contain one of the PRs and create new ones when | |
9409 | needed. */ | |
9410 | ||
9411 | static int | |
9412 | update_qp_mutex (valueT mask) | |
9413 | { | |
9414 | int i; | |
9415 | int add = 0; | |
9416 | ||
9417 | i = 0; | |
9418 | while (i < qp_mutexeslen) | |
9419 | { | |
9420 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9421 | { | |
9422 | /* If it destroys and creates the same mutex, do nothing. */ | |
9423 | if (qp_mutexes[i].prmask == mask | |
9424 | && qp_mutexes[i].path == md.path) | |
9425 | { | |
9426 | i++; | |
9427 | add = -1; | |
9428 | } | |
9429 | else | |
9430 | { | |
9431 | int keep = 0; | |
9432 | ||
9433 | if (md.debug_dv) | |
9434 | { | |
9435 | fprintf (stderr, " Clearing mutex relation"); | |
9436 | print_prmask (qp_mutexes[i].prmask); | |
9437 | fprintf (stderr, "\n"); | |
9438 | } | |
9439 | ||
9440 | /* Deal with the old mutex with more than 3+ PRs only if | |
9441 | the new mutex on the same execution path with it. | |
9442 | ||
9443 | FIXME: The 3+ mutex support is incomplete. | |
9444 | dot_pred_rel () may be a better place to fix it. */ | |
9445 | if (qp_mutexes[i].path == md.path) | |
9446 | { | |
9447 | /* If it is a proper subset of the mutex, create a | |
9448 | new mutex. */ | |
9449 | if (add == 0 | |
9450 | && (qp_mutexes[i].prmask & mask) == mask) | |
9451 | add = 1; | |
9452 | ||
9453 | qp_mutexes[i].prmask &= ~mask; | |
9454 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9455 | { | |
9456 | /* Modify the mutex if there are more than one | |
9457 | PR left. */ | |
9458 | keep = 1; | |
9459 | i++; | |
9460 | } | |
9461 | } | |
9462 | ||
9463 | if (keep == 0) | |
9464 | /* Remove the mutex. */ | |
9465 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9466 | } | |
9467 | } | |
9468 | else | |
9469 | ++i; | |
9470 | } | |
9471 | ||
9472 | if (add == 1) | |
9473 | add_qp_mutex (mask); | |
9474 | ||
9475 | return add; | |
9476 | } | |
9477 | ||
197865e8 | 9478 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9479 | |
542d6675 KH |
9480 | Any changes to a PR clears the mutex relations which include that PR. */ |
9481 | ||
800eeca4 | 9482 | static void |
5a49b8ac | 9483 | clear_qp_mutex (valueT mask) |
800eeca4 JW |
9484 | { |
9485 | int i; | |
9486 | ||
9487 | i = 0; | |
9488 | while (i < qp_mutexeslen) | |
9489 | { | |
9490 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9491 | { |
9492 | if (md.debug_dv) | |
9493 | { | |
9494 | fprintf (stderr, " Clearing mutex relation"); | |
9495 | print_prmask (qp_mutexes[i].prmask); | |
9496 | fprintf (stderr, "\n"); | |
9497 | } | |
9498 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9499 | } | |
800eeca4 | 9500 | else |
542d6675 | 9501 | ++i; |
800eeca4 JW |
9502 | } |
9503 | } | |
9504 | ||
9505 | /* Clear implies relations which contain PRs in the given masks. | |
9506 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9507 | indicates the implied PR. */ |
9508 | ||
800eeca4 | 9509 | static void |
5a49b8ac | 9510 | clear_qp_implies (valueT p1_mask, valueT p2_mask) |
800eeca4 JW |
9511 | { |
9512 | int i; | |
9513 | ||
9514 | i = 0; | |
9515 | while (i < qp_implieslen) | |
9516 | { | |
197865e8 | 9517 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9518 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9519 | { | |
9520 | if (md.debug_dv) | |
9521 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9522 | qp_implies[i].p1, qp_implies[i].p2); | |
9523 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9524 | } | |
197865e8 | 9525 | else |
542d6675 | 9526 | ++i; |
800eeca4 JW |
9527 | } |
9528 | } | |
9529 | ||
542d6675 KH |
9530 | /* Add the PRs specified to the list of implied relations. */ |
9531 | ||
800eeca4 | 9532 | static void |
5a49b8ac | 9533 | add_qp_imply (int p1, int p2) |
800eeca4 JW |
9534 | { |
9535 | valueT mask; | |
9536 | valueT bit; | |
9537 | int i; | |
9538 | ||
542d6675 | 9539 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9540 | if (p1 == 0 || p2 == 0) |
9541 | abort (); | |
9542 | ||
9543 | if (p1 == p2) | |
9544 | return; | |
9545 | ||
542d6675 KH |
9546 | /* If it exists already, ignore it. */ |
9547 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9548 | { |
197865e8 | 9549 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9550 | && qp_implies[i].p2 == p2 |
9551 | && qp_implies[i].path == md.path | |
9552 | && !qp_implies[i].p2_branched) | |
9553 | return; | |
800eeca4 JW |
9554 | } |
9555 | ||
9556 | if (qp_implieslen == qp_impliestotlen) | |
9557 | { | |
9558 | qp_impliestotlen += 20; | |
9559 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9560 | xrealloc ((void *) qp_implies, |
9561 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9562 | } |
9563 | if (md.debug_dv) | |
9564 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9565 | qp_implies[qp_implieslen].p1 = p1; | |
9566 | qp_implies[qp_implieslen].p2 = p2; | |
9567 | qp_implies[qp_implieslen].path = md.path; | |
9568 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9569 | ||
9570 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9571 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9572 | as well. */ |
542d6675 | 9573 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9574 | { |
9575 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9576 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9577 | if (qp_implies[i].p2 == p1) |
542d6675 | 9578 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9579 | } |
9580 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9581 | relation containing p2, duplicate it and replace p2 with p1. */ |
9582 | bit = (valueT) 1 << p1; | |
9583 | mask = (valueT) 1 << p2; | |
542d6675 | 9584 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9585 | { |
9586 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9587 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9588 | } |
9589 | } | |
9590 | ||
800eeca4 JW |
9591 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9592 | one of the PRs can be true at any time. PR0 should never be included in | |
9593 | the mask. */ | |
542d6675 | 9594 | |
800eeca4 | 9595 | static void |
5a49b8ac | 9596 | add_qp_mutex (valueT mask) |
800eeca4 JW |
9597 | { |
9598 | if (mask & 0x1) | |
9599 | abort (); | |
9600 | ||
9601 | if (qp_mutexeslen == qp_mutexestotlen) | |
9602 | { | |
9603 | qp_mutexestotlen += 20; | |
9604 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9605 | xrealloc ((void *) qp_mutexes, |
9606 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9607 | } |
9608 | if (md.debug_dv) | |
9609 | { | |
9610 | fprintf (stderr, " Registering mutex on"); | |
9611 | print_prmask (mask); | |
9612 | fprintf (stderr, "\n"); | |
9613 | } | |
9614 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9615 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9616 | } | |
9617 | ||
cb5301b6 | 9618 | static int |
5a49b8ac | 9619 | has_suffix_p (const char *name, const char *suffix) |
cb5301b6 RH |
9620 | { |
9621 | size_t namelen = strlen (name); | |
9622 | size_t sufflen = strlen (suffix); | |
9623 | ||
9624 | if (namelen <= sufflen) | |
9625 | return 0; | |
9626 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9627 | } | |
9628 | ||
800eeca4 | 9629 | static void |
5a49b8ac | 9630 | clear_register_values (void) |
800eeca4 JW |
9631 | { |
9632 | int i; | |
9633 | if (md.debug_dv) | |
9634 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9635 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9636 | gr_values[i].known = 0; |
9637 | } | |
9638 | ||
9639 | /* Keep track of register values/changes which affect DV tracking. | |
9640 | ||
9641 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9642 | have to examine a group of strings to identify them. */ |
800eeca4 | 9643 | |
800eeca4 | 9644 | static void |
5a49b8ac | 9645 | note_register_values (struct ia64_opcode *idesc) |
800eeca4 JW |
9646 | { |
9647 | valueT qp_changemask = 0; | |
9648 | int i; | |
9649 | ||
542d6675 KH |
9650 | /* Invalidate values for registers being written to. */ |
9651 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9652 | { |
197865e8 | 9653 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9654 | || idesc->operands[i] == IA64_OPND_R2 |
9655 | || idesc->operands[i] == IA64_OPND_R3) | |
9656 | { | |
9657 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9658 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9659 | gr_values[regno].known = 0; | |
9660 | } | |
50b81f19 JW |
9661 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9662 | { | |
9663 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9664 | if (regno > 0 && regno < 4) | |
9665 | gr_values[regno].known = 0; | |
9666 | } | |
197865e8 | 9667 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9668 | || idesc->operands[i] == IA64_OPND_P2) |
9669 | { | |
9670 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9671 | qp_changemask |= (valueT) 1 << regno; | |
9672 | } | |
800eeca4 | 9673 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9674 | { |
9675 | if (idesc->operands[2] & (valueT) 0x10000) | |
9676 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9677 | else | |
9678 | qp_changemask = idesc->operands[2]; | |
9679 | break; | |
9680 | } | |
800eeca4 | 9681 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9682 | { |
9683 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9684 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9685 | else |
9686 | qp_changemask = idesc->operands[1]; | |
9687 | qp_changemask &= ~(valueT) 0xFFFF; | |
9688 | break; | |
9689 | } | |
9690 | } | |
9691 | ||
9692 | /* Always clear qp branch flags on any PR change. */ | |
9693 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9694 | clear_qp_branch_flag (qp_changemask); |
9695 | ||
542d6675 | 9696 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9697 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9698 | { | |
197865e8 | 9699 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9700 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9701 | { |
9702 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9703 | gr_values[i].known = 0; | |
9704 | } | |
800eeca4 JW |
9705 | clear_qp_mutex (qp_changemask); |
9706 | clear_qp_implies (qp_changemask, qp_changemask); | |
9707 | } | |
542d6675 KH |
9708 | /* After a call, all register values are undefined, except those marked |
9709 | as "safe". */ | |
800eeca4 | 9710 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9711 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9712 | { |
56d27c17 | 9713 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9714 | clear_register_values (); |
9715 | clear_qp_mutex (~qp_safe_across_calls); | |
9716 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9717 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9718 | } | |
e9718fe1 | 9719 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9720 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9721 | { |
9722 | clear_register_values (); | |
197865e8 KH |
9723 | clear_qp_mutex (~(valueT) 0); |
9724 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9725 | } |
542d6675 | 9726 | /* Look for mutex and implies relations. */ |
197865e8 | 9727 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9728 | || idesc->operands[0] == IA64_OPND_P2) |
9729 | && (idesc->operands[1] == IA64_OPND_P1 | |
9730 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9731 | { |
9732 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9733 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9734 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9735 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9736 | |
5e2f6673 L |
9737 | /* If both PRs are PR0, we can't really do anything. */ |
9738 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9739 | { |
9740 | if (md.debug_dv) | |
9741 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9742 | } | |
800eeca4 | 9743 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9744 | with the following exceptions. */ |
cb5301b6 RH |
9745 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9746 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9747 | { |
542d6675 KH |
9748 | clear_qp_implies (p2mask, p1mask); |
9749 | } | |
cb5301b6 RH |
9750 | else if (has_suffix_p (idesc->name, ".andcm") |
9751 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9752 | { |
9753 | clear_qp_implies (0, p1mask | p2mask); | |
9754 | } | |
cb5301b6 RH |
9755 | else if (has_suffix_p (idesc->name, ".orcm") |
9756 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9757 | { |
9758 | clear_qp_mutex (p1mask | p2mask); | |
9759 | clear_qp_implies (p1mask | p2mask, 0); | |
9760 | } | |
800eeca4 | 9761 | else |
542d6675 | 9762 | { |
5e2f6673 L |
9763 | int added = 0; |
9764 | ||
542d6675 | 9765 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9766 | |
9767 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9768 | if (p1 == 0 || p2 == 0) | |
9769 | clear_qp_mutex (p1mask | p2mask); | |
9770 | else | |
9771 | added = update_qp_mutex (p1mask | p2mask); | |
9772 | ||
9773 | if (CURR_SLOT.qp_regno == 0 | |
9774 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9775 | { |
5e2f6673 L |
9776 | if (added == 0 && p1 && p2) |
9777 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9778 | if (CURR_SLOT.qp_regno != 0) |
9779 | { | |
5e2f6673 L |
9780 | if (p1) |
9781 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9782 | if (p2) | |
9783 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9784 | } |
9785 | } | |
542d6675 KH |
9786 | } |
9787 | } | |
9788 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9789 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9790 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9791 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 9792 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
9793 | && (strcmp (idesc->name, "mov") == 0 |
9794 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9795 | { |
9796 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9797 | if (regno > 0 && regno < NELEMS (gr_values)) |
9798 | { | |
9799 | gr_values[regno].known = 1; | |
9800 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9801 | gr_values[regno].path = md.path; | |
9802 | if (md.debug_dv) | |
2434f565 JW |
9803 | { |
9804 | fprintf (stderr, " Know gr%d = ", regno); | |
9805 | fprintf_vma (stderr, gr_values[regno].value); | |
9806 | fputs ("\n", stderr); | |
9807 | } | |
542d6675 | 9808 | } |
800eeca4 | 9809 | } |
a66d2bb7 JB |
9810 | /* Look for dep.z imm insns. */ |
9811 | else if (idesc->operands[0] == IA64_OPND_R1 | |
9812 | && idesc->operands[1] == IA64_OPND_IMM8 | |
9813 | && strcmp (idesc->name, "dep.z") == 0) | |
9814 | { | |
9815 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
9816 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9817 | { | |
9818 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
9819 | ||
9820 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
9821 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
9822 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
9823 | gr_values[regno].known = 1; | |
9824 | gr_values[regno].value = value; | |
9825 | gr_values[regno].path = md.path; | |
9826 | if (md.debug_dv) | |
9827 | { | |
9828 | fprintf (stderr, " Know gr%d = ", regno); | |
9829 | fprintf_vma (stderr, gr_values[regno].value); | |
9830 | fputs ("\n", stderr); | |
9831 | } | |
9832 | } | |
9833 | } | |
197865e8 | 9834 | else |
800eeca4 JW |
9835 | { |
9836 | clear_qp_mutex (qp_changemask); | |
9837 | clear_qp_implies (qp_changemask, qp_changemask); | |
9838 | } | |
9839 | } | |
9840 | ||
542d6675 KH |
9841 | /* Return whether the given predicate registers are currently mutex. */ |
9842 | ||
800eeca4 | 9843 | static int |
5a49b8ac | 9844 | qp_mutex (int p1, int p2, int path) |
800eeca4 JW |
9845 | { |
9846 | int i; | |
9847 | valueT mask; | |
9848 | ||
9849 | if (p1 != p2) | |
9850 | { | |
542d6675 KH |
9851 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9852 | for (i = 0; i < qp_mutexeslen; i++) | |
9853 | { | |
9854 | if (qp_mutexes[i].path >= path | |
9855 | && (qp_mutexes[i].prmask & mask) == mask) | |
9856 | return 1; | |
9857 | } | |
800eeca4 JW |
9858 | } |
9859 | return 0; | |
9860 | } | |
9861 | ||
9862 | /* Return whether the given resource is in the given insn's list of chks | |
9863 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9864 | conflict. */ |
9865 | ||
800eeca4 | 9866 | static int |
5a49b8ac AM |
9867 | resources_match (struct rsrc *rs, |
9868 | struct ia64_opcode *idesc, | |
9869 | int note, | |
9870 | int qp_regno, | |
9871 | int path) | |
800eeca4 JW |
9872 | { |
9873 | struct rsrc specs[MAX_SPECS]; | |
9874 | int count; | |
9875 | ||
9876 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9877 | we don't need to check. One exception is note 11, which indicates that | |
9878 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9879 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9880 | && note != 11) |
9881 | return 0; | |
9882 | ||
9883 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9884 | while (count-- > 0) | |
9885 | { | |
9886 | /* UNAT checking is a bit more specific than other resources */ | |
9887 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9888 | && specs[count].mem_offset.hint |
9889 | && rs->mem_offset.hint) | |
9890 | { | |
9891 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9892 | { | |
9893 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9894 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9895 | return 1; | |
9896 | else | |
9897 | continue; | |
9898 | } | |
9899 | } | |
800eeca4 | 9900 | |
7484b8e6 | 9901 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9902 | writes are an OR. */ |
7484b8e6 | 9903 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9904 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9905 | || rs->dependency->specifier == IA64_RS_PR63) |
9906 | { | |
9907 | if (specs[count].cmp_type != CMP_NONE | |
9908 | && specs[count].cmp_type == rs->cmp_type) | |
9909 | { | |
9910 | if (md.debug_dv) | |
9911 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9912 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9913 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9914 | specs[count].index : 63); |
9915 | continue; | |
9916 | } | |
9917 | if (md.debug_dv) | |
4a4f25cf | 9918 | fprintf (stderr, |
7484b8e6 TW |
9919 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9920 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9921 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9922 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9923 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9924 | specs[count].index : 63); |
4a4f25cf | 9925 | |
7484b8e6 TW |
9926 | } |
9927 | ||
800eeca4 | 9928 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9929 | */ |
800eeca4 | 9930 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9931 | return 2; |
800eeca4 | 9932 | else if (specs[count].index == rs->index) |
542d6675 | 9933 | return 1; |
800eeca4 | 9934 | } |
800eeca4 JW |
9935 | |
9936 | return 0; | |
9937 | } | |
9938 | ||
9939 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9940 | insert a stop to create the break. Update all resource dependencies | |
9941 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9942 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9943 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9944 | instruction. */ |
800eeca4 JW |
9945 | |
9946 | static void | |
5a49b8ac | 9947 | insn_group_break (int insert_stop, int qp_regno, int save_current) |
800eeca4 JW |
9948 | { |
9949 | int i; | |
9950 | ||
9951 | if (insert_stop && md.num_slots_in_use > 0) | |
9952 | PREV_SLOT.end_of_insn_group = 1; | |
9953 | ||
9954 | if (md.debug_dv) | |
9955 | { | |
197865e8 | 9956 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9957 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9958 | if (qp_regno != 0) |
542d6675 | 9959 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9960 | fprintf (stderr, "\n"); |
9961 | } | |
9962 | ||
9963 | i = 0; | |
9964 | while (i < regdepslen) | |
9965 | { | |
9966 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9967 | ||
9968 | if (qp_regno != 0 | |
542d6675 KH |
9969 | && regdeps[i].qp_regno != qp_regno) |
9970 | { | |
9971 | ++i; | |
9972 | continue; | |
9973 | } | |
800eeca4 JW |
9974 | |
9975 | if (save_current | |
542d6675 KH |
9976 | && CURR_SLOT.src_file == regdeps[i].file |
9977 | && CURR_SLOT.src_line == regdeps[i].line) | |
9978 | { | |
9979 | ++i; | |
9980 | continue; | |
9981 | } | |
800eeca4 JW |
9982 | |
9983 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9984 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9985 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9986 | || dep->semantics == IA64_DVS_IMPLIEDF |
9987 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9988 | { | |
9989 | print_dependency ("Removing", i); | |
9990 | regdeps[i] = regdeps[--regdepslen]; | |
9991 | } | |
800eeca4 | 9992 | else |
542d6675 KH |
9993 | { |
9994 | if (dep->semantics == IA64_DVS_DATA | |
9995 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9996 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9997 | { |
9998 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9999 | regdeps[i].insn_srlz = STATE_STOP; | |
10000 | if (regdeps[i].data_srlz == STATE_NONE) | |
10001 | regdeps[i].data_srlz = STATE_STOP; | |
10002 | } | |
10003 | ++i; | |
10004 | } | |
800eeca4 JW |
10005 | } |
10006 | } | |
10007 | ||
542d6675 KH |
10008 | /* Add the given resource usage spec to the list of active dependencies. */ |
10009 | ||
197865e8 | 10010 | static void |
5a49b8ac AM |
10011 | mark_resource (struct ia64_opcode *idesc ATTRIBUTE_UNUSED, |
10012 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED, | |
10013 | struct rsrc *spec, | |
10014 | int depind, | |
10015 | int path) | |
800eeca4 JW |
10016 | { |
10017 | if (regdepslen == regdepstotlen) | |
10018 | { | |
10019 | regdepstotlen += 20; | |
10020 | regdeps = (struct rsrc *) | |
542d6675 | 10021 | xrealloc ((void *) regdeps, |
bc805888 | 10022 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10023 | } |
10024 | ||
10025 | regdeps[regdepslen] = *spec; | |
10026 | regdeps[regdepslen].depind = depind; | |
10027 | regdeps[regdepslen].path = path; | |
10028 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10029 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10030 | ||
10031 | print_dependency ("Adding", regdepslen); | |
10032 | ||
10033 | ++regdepslen; | |
10034 | } | |
10035 | ||
10036 | static void | |
5a49b8ac | 10037 | print_dependency (const char *action, int depind) |
800eeca4 JW |
10038 | { |
10039 | if (md.debug_dv) | |
10040 | { | |
197865e8 | 10041 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10042 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10043 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10044 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10045 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10046 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10047 | { |
10048 | fputs (" ", stderr); | |
10049 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10050 | fputs ("+", stderr); | |
10051 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10052 | } | |
800eeca4 JW |
10053 | fprintf (stderr, "\n"); |
10054 | } | |
10055 | } | |
10056 | ||
10057 | static void | |
5a49b8ac | 10058 | instruction_serialization (void) |
800eeca4 JW |
10059 | { |
10060 | int i; | |
10061 | if (md.debug_dv) | |
10062 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10063 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10064 | if (regdeps[i].insn_srlz == STATE_STOP) |
10065 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10066 | } | |
10067 | ||
10068 | static void | |
5a49b8ac | 10069 | data_serialization (void) |
800eeca4 JW |
10070 | { |
10071 | int i = 0; | |
10072 | if (md.debug_dv) | |
10073 | fprintf (stderr, " Data serialization\n"); | |
10074 | while (i < regdepslen) | |
10075 | { | |
10076 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10077 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10078 | data serialization. This might change with new tables */ | |
10079 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10080 | { | |
10081 | print_dependency ("Removing", i); | |
10082 | regdeps[i] = regdeps[--regdepslen]; | |
10083 | } | |
800eeca4 | 10084 | else |
542d6675 | 10085 | ++i; |
800eeca4 JW |
10086 | } |
10087 | } | |
10088 | ||
542d6675 KH |
10089 | /* Insert stops and serializations as needed to avoid DVs. */ |
10090 | ||
800eeca4 | 10091 | static void |
5a49b8ac | 10092 | remove_marked_resource (struct rsrc *rs) |
800eeca4 JW |
10093 | { |
10094 | switch (rs->dependency->semantics) | |
10095 | { | |
10096 | case IA64_DVS_SPECIFIC: | |
10097 | if (md.debug_dv) | |
10098 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10099 | /* ...fall through... */ |
800eeca4 JW |
10100 | case IA64_DVS_INSTR: |
10101 | if (md.debug_dv) | |
542d6675 | 10102 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10103 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10104 | insn_group_break (1, 0, 0); |
800eeca4 | 10105 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10106 | { |
888a75be | 10107 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10108 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10109 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10110 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10111 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10112 | instruction_serialization (); | |
10113 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10114 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10115 | emit_one_bundle (); | |
888a75be | 10116 | CURR_SLOT = oldslot; |
542d6675 | 10117 | } |
800eeca4 JW |
10118 | insn_group_break (1, 0, 0); |
10119 | break; | |
10120 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10121 | "other" types of DV are eliminated |
10122 | by a data serialization */ | |
800eeca4 JW |
10123 | case IA64_DVS_DATA: |
10124 | if (md.debug_dv) | |
542d6675 | 10125 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10126 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10127 | insn_group_break (1, 0, 0); |
800eeca4 | 10128 | { |
888a75be | 10129 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10130 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10131 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10132 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10133 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10134 | data_serialization (); | |
10135 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10136 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10137 | emit_one_bundle (); | |
888a75be | 10138 | CURR_SLOT = oldslot; |
800eeca4 JW |
10139 | } |
10140 | break; | |
10141 | case IA64_DVS_IMPLIED: | |
10142 | case IA64_DVS_IMPLIEDF: | |
10143 | if (md.debug_dv) | |
542d6675 | 10144 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10145 | insn_group_break (1, 0, 0); |
10146 | break; | |
10147 | default: | |
10148 | break; | |
10149 | } | |
10150 | } | |
10151 | ||
10152 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10153 | list. |
800eeca4 JW |
10154 | |
10155 | The check is run once for each execution path encountered. In this case, | |
10156 | a unique execution path is the sequence of instructions following a code | |
10157 | entry point, e.g. the following has three execution paths, one starting | |
10158 | at L0, one at L1, and one at L2. | |
197865e8 | 10159 | |
800eeca4 JW |
10160 | L0: nop |
10161 | L1: add | |
10162 | L2: add | |
197865e8 | 10163 | br.ret |
800eeca4 | 10164 | */ |
542d6675 | 10165 | |
800eeca4 | 10166 | static void |
5a49b8ac | 10167 | check_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10168 | { |
10169 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10170 | int path; | |
10171 | int i; | |
10172 | ||
10173 | /* Note that the number of marked resources may change within the | |
197865e8 | 10174 | loop if in auto mode. */ |
800eeca4 JW |
10175 | i = 0; |
10176 | while (i < regdepslen) | |
10177 | { | |
10178 | struct rsrc *rs = ®deps[i]; | |
10179 | const struct ia64_dependency *dep = rs->dependency; | |
10180 | int chkind; | |
10181 | int note; | |
10182 | int start_over = 0; | |
10183 | ||
10184 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10185 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10186 | { | |
10187 | ++i; | |
10188 | continue; | |
10189 | } | |
10190 | ||
10191 | note = NOTE (opdeps->chks[chkind]); | |
10192 | ||
10193 | /* Check this resource against each execution path seen thus far. */ | |
10194 | for (path = 0; path <= md.path; path++) | |
10195 | { | |
10196 | int matchtype; | |
10197 | ||
10198 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10199 | if (rs->path < path) | |
10200 | continue; | |
10201 | ||
10202 | /* If the QP for this insn implies a QP which has branched, don't | |
10203 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10204 | useful; what's the point of generating code which will only be | |
10205 | reached if its QP is zero? | |
10206 | This code was specifically inserted to handle the following code, | |
10207 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10208 | ||
10209 | mov r4 = 2 | |
10210 | (p2) br.cond L | |
10211 | (p1) mov r4 = 7 | |
10212 | */ | |
10213 | if (CURR_SLOT.qp_regno != 0) | |
10214 | { | |
10215 | int skip = 0; | |
10216 | int implies; | |
10217 | for (implies = 0; implies < qp_implieslen; implies++) | |
10218 | { | |
10219 | if (qp_implies[implies].path >= path | |
10220 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10221 | && qp_implies[implies].p2_branched) | |
10222 | { | |
10223 | skip = 1; | |
10224 | break; | |
10225 | } | |
10226 | } | |
10227 | if (skip) | |
10228 | continue; | |
10229 | } | |
10230 | ||
10231 | if ((matchtype = resources_match (rs, idesc, note, | |
10232 | CURR_SLOT.qp_regno, path)) != 0) | |
10233 | { | |
10234 | char msg[1024]; | |
10235 | char pathmsg[256] = ""; | |
10236 | char indexmsg[256] = ""; | |
10237 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10238 | ||
10239 | if (path != 0) | |
f9f21a03 L |
10240 | snprintf (pathmsg, sizeof (pathmsg), |
10241 | " when entry is at label '%s'", | |
542d6675 | 10242 | md.entry_labels[path - 1]); |
a66d2bb7 | 10243 | if (matchtype == 1 && rs->index >= 0) |
f9f21a03 L |
10244 | snprintf (indexmsg, sizeof (indexmsg), |
10245 | ", specific resource number is %d", | |
542d6675 | 10246 | rs->index); |
f9f21a03 L |
10247 | snprintf (msg, sizeof (msg), |
10248 | "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
542d6675 KH |
10249 | idesc->name, |
10250 | (certain ? "violates" : "may violate"), | |
10251 | dv_mode[dep->mode], dep->name, | |
10252 | dv_sem[dep->semantics], | |
10253 | pathmsg, indexmsg); | |
10254 | ||
10255 | if (md.explicit_mode) | |
10256 | { | |
10257 | as_warn ("%s", msg); | |
10258 | if (path < md.path) | |
ad4b42b4 | 10259 | as_warn (_("Only the first path encountering the conflict is reported")); |
542d6675 | 10260 | as_warn_where (rs->file, rs->line, |
ad4b42b4 | 10261 | _("This is the location of the conflicting usage")); |
542d6675 KH |
10262 | /* Don't bother checking other paths, to avoid duplicating |
10263 | the same warning */ | |
10264 | break; | |
10265 | } | |
10266 | else | |
10267 | { | |
10268 | if (md.debug_dv) | |
10269 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10270 | ||
10271 | remove_marked_resource (rs); | |
10272 | ||
10273 | /* since the set of dependencies has changed, start over */ | |
10274 | /* FIXME -- since we're removing dvs as we go, we | |
10275 | probably don't really need to start over... */ | |
10276 | start_over = 1; | |
10277 | break; | |
10278 | } | |
10279 | } | |
10280 | } | |
800eeca4 | 10281 | if (start_over) |
542d6675 | 10282 | i = 0; |
800eeca4 | 10283 | else |
542d6675 | 10284 | ++i; |
800eeca4 JW |
10285 | } |
10286 | } | |
10287 | ||
542d6675 KH |
10288 | /* Register new dependencies based on the given opcode. */ |
10289 | ||
800eeca4 | 10290 | static void |
5a49b8ac | 10291 | mark_resources (struct ia64_opcode *idesc) |
800eeca4 JW |
10292 | { |
10293 | int i; | |
10294 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10295 | int add_only_qp_reads = 0; | |
10296 | ||
10297 | /* A conditional branch only uses its resources if it is taken; if it is | |
10298 | taken, we stop following that path. The other branch types effectively | |
10299 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10300 | reads. */ |
800eeca4 JW |
10301 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10302 | { | |
10303 | add_only_qp_reads = 1; | |
10304 | } | |
10305 | ||
10306 | if (md.debug_dv) | |
10307 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10308 | ||
542d6675 | 10309 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10310 | { |
10311 | const struct ia64_dependency *dep; | |
10312 | struct rsrc specs[MAX_SPECS]; | |
10313 | int note; | |
10314 | int path; | |
10315 | int count; | |
197865e8 | 10316 | |
800eeca4 | 10317 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10318 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10319 | |
10320 | if (add_only_qp_reads | |
542d6675 KH |
10321 | && !(dep->mode == IA64_DV_WAR |
10322 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10323 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10324 | || dep->specifier == IA64_RS_PR63))) |
10325 | continue; | |
800eeca4 JW |
10326 | |
10327 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10328 | ||
800eeca4 | 10329 | while (count-- > 0) |
542d6675 KH |
10330 | { |
10331 | mark_resource (idesc, dep, &specs[count], | |
10332 | DEP (opdeps->regs[i]), md.path); | |
10333 | } | |
800eeca4 JW |
10334 | |
10335 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10336 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10337 | switch (dep->specifier) |
542d6675 KH |
10338 | { |
10339 | default: | |
10340 | break; | |
10341 | case IA64_RS_CPUID: | |
10342 | case IA64_RS_DBR: | |
10343 | case IA64_RS_IBR: | |
800eeca4 | 10344 | case IA64_RS_MSR: |
542d6675 KH |
10345 | case IA64_RS_PKR: |
10346 | case IA64_RS_PMC: | |
10347 | case IA64_RS_PMD: | |
10348 | case IA64_RS_RR: | |
10349 | for (path = 0; path < md.path; path++) | |
10350 | { | |
10351 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10352 | while (count-- > 0) | |
10353 | mark_resource (idesc, dep, &specs[count], | |
10354 | DEP (opdeps->regs[i]), path); | |
10355 | } | |
10356 | break; | |
10357 | } | |
10358 | } | |
10359 | } | |
10360 | ||
10361 | /* Remove dependencies when they no longer apply. */ | |
10362 | ||
800eeca4 | 10363 | static void |
5a49b8ac | 10364 | update_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10365 | { |
10366 | int i; | |
10367 | ||
10368 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10369 | { | |
10370 | instruction_serialization (); | |
10371 | } | |
10372 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10373 | { | |
10374 | data_serialization (); | |
10375 | } | |
10376 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10377 | || is_taken_branch (idesc)) |
800eeca4 | 10378 | { |
542d6675 KH |
10379 | /* Although technically the taken branch doesn't clear dependencies |
10380 | which require a srlz.[id], we don't follow the branch; the next | |
10381 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10382 | regdepslen = 0; |
800eeca4 JW |
10383 | md.path = 0; |
10384 | } | |
10385 | else if (is_conditional_branch (idesc) | |
542d6675 | 10386 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10387 | { |
10388 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10389 | ||
542d6675 KH |
10390 | for (i = 0; i < qp_implieslen; i++) |
10391 | { | |
10392 | /* If the conditional branch's predicate is implied by the predicate | |
10393 | in an existing dependency, remove that dependency. */ | |
10394 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10395 | { | |
10396 | int depind = 0; | |
10397 | /* Note that this implied predicate takes a branch so that if | |
10398 | a later insn generates a DV but its predicate implies this | |
10399 | one, we can avoid the false DV warning. */ | |
10400 | qp_implies[i].p2_branched = 1; | |
10401 | while (depind < regdepslen) | |
10402 | { | |
10403 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10404 | { | |
10405 | print_dependency ("Removing", depind); | |
10406 | regdeps[depind] = regdeps[--regdepslen]; | |
10407 | } | |
10408 | else | |
10409 | ++depind; | |
10410 | } | |
10411 | } | |
10412 | } | |
800eeca4 | 10413 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10414 | cleared, provided that the QP hasn't been modified between the |
10415 | marking instruction and the branch. */ | |
800eeca4 | 10416 | if (is_call) |
542d6675 KH |
10417 | { |
10418 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10419 | } | |
800eeca4 | 10420 | else |
542d6675 KH |
10421 | { |
10422 | i = 0; | |
10423 | while (i < regdepslen) | |
10424 | { | |
10425 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10426 | && regdeps[i].link_to_qp_branch | |
10427 | && (regdeps[i].file != CURR_SLOT.src_file | |
10428 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10429 | { | |
10430 | /* Treat like a taken branch */ | |
10431 | print_dependency ("Removing", i); | |
10432 | regdeps[i] = regdeps[--regdepslen]; | |
10433 | } | |
10434 | else | |
10435 | ++i; | |
10436 | } | |
10437 | } | |
800eeca4 JW |
10438 | } |
10439 | } | |
10440 | ||
10441 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10442 | |
800eeca4 | 10443 | static int |
5a49b8ac | 10444 | check_dv (struct ia64_opcode *idesc) |
800eeca4 JW |
10445 | { |
10446 | if (md.debug_dv) | |
10447 | { | |
197865e8 | 10448 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10449 | idesc->name, CURR_SLOT.src_line, |
10450 | idesc->dependencies->nchks, | |
10451 | idesc->dependencies->nregs); | |
800eeca4 JW |
10452 | } |
10453 | ||
197865e8 | 10454 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10455 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10456 | check against the specific resources used. */ |
800eeca4 JW |
10457 | check_dependencies (idesc); |
10458 | ||
542d6675 KH |
10459 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10460 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10461 | mark_resources (idesc); |
10462 | ||
10463 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10464 | requirements for being cleared |
10465 | ||
800eeca4 JW |
10466 | Instruction serialization (insns separated by interruption, rfi, or |
10467 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10468 | ||
10469 | Data serialization (instruction serialization, or writer + srlz.d + | |
10470 | reader, where writer and srlz.d are in separate groups) clears | |
10471 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10472 | always be the case). | |
10473 | ||
10474 | Instruction group break (groups separated by stop, taken branch, | |
10475 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10476 | */ | |
10477 | update_dependencies (idesc); | |
10478 | ||
10479 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10480 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10481 | note_register_values (idesc); |
10482 | ||
197865e8 | 10483 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10484 | md.mem_offset.hint = 0; |
10485 | ||
10486 | return 0; | |
10487 | } | |
10488 | ||
10489 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10490 | here. */ | |
10491 | void | |
5a49b8ac | 10492 | md_assemble (char *str) |
800eeca4 JW |
10493 | { |
10494 | char *saved_input_line_pointer, *mnemonic; | |
10495 | const struct pseudo_opcode *pdesc; | |
10496 | struct ia64_opcode *idesc; | |
10497 | unsigned char qp_regno; | |
10498 | unsigned int flags; | |
10499 | int ch; | |
10500 | ||
10501 | saved_input_line_pointer = input_line_pointer; | |
10502 | input_line_pointer = str; | |
10503 | ||
542d6675 | 10504 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10505 | |
10506 | mnemonic = input_line_pointer; | |
10507 | ch = get_symbol_end (); | |
10508 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10509 | if (pdesc) | |
10510 | { | |
10511 | *input_line_pointer = ch; | |
10512 | (*pdesc->handler) (pdesc->arg); | |
10513 | goto done; | |
10514 | } | |
10515 | ||
542d6675 | 10516 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10517 | |
10518 | idesc = ia64_find_opcode (mnemonic); | |
10519 | *input_line_pointer = ch; | |
10520 | if (!idesc) | |
10521 | { | |
ad4b42b4 | 10522 | as_bad (_("Unknown opcode `%s'"), mnemonic); |
800eeca4 JW |
10523 | goto done; |
10524 | } | |
10525 | ||
10526 | idesc = parse_operands (idesc); | |
10527 | if (!idesc) | |
10528 | goto done; | |
10529 | ||
542d6675 | 10530 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10531 | if (idesc->type == IA64_TYPE_DYN) |
10532 | { | |
10533 | if (strcmp (idesc->name, "add") == 0) | |
10534 | { | |
10535 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10536 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10537 | mnemonic = "addl"; | |
10538 | else | |
10539 | mnemonic = "adds"; | |
3d56ab85 | 10540 | ia64_free_opcode (idesc); |
800eeca4 | 10541 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10542 | } |
10543 | else if (strcmp (idesc->name, "mov") == 0) | |
10544 | { | |
10545 | enum ia64_opnd opnd1, opnd2; | |
10546 | int rop; | |
10547 | ||
10548 | opnd1 = idesc->operands[0]; | |
10549 | opnd2 = idesc->operands[1]; | |
10550 | if (opnd1 == IA64_OPND_AR3) | |
10551 | rop = 0; | |
10552 | else if (opnd2 == IA64_OPND_AR3) | |
10553 | rop = 1; | |
10554 | else | |
10555 | abort (); | |
652ca075 L |
10556 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10557 | { | |
10558 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10559 | mnemonic = "mov.i"; | |
97762d08 | 10560 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10561 | mnemonic = "mov.m"; |
97762d08 JB |
10562 | else |
10563 | rop = -1; | |
652ca075 | 10564 | } |
800eeca4 | 10565 | else |
652ca075 | 10566 | abort (); |
97762d08 JB |
10567 | if (rop >= 0) |
10568 | { | |
10569 | ia64_free_opcode (idesc); | |
10570 | idesc = ia64_find_opcode (mnemonic); | |
10571 | while (idesc != NULL | |
10572 | && (idesc->operands[0] != opnd1 | |
10573 | || idesc->operands[1] != opnd2)) | |
10574 | idesc = get_next_opcode (idesc); | |
10575 | } | |
800eeca4 JW |
10576 | } |
10577 | } | |
652ca075 L |
10578 | else if (strcmp (idesc->name, "mov.i") == 0 |
10579 | || strcmp (idesc->name, "mov.m") == 0) | |
10580 | { | |
10581 | enum ia64_opnd opnd1, opnd2; | |
10582 | int rop; | |
10583 | ||
10584 | opnd1 = idesc->operands[0]; | |
10585 | opnd2 = idesc->operands[1]; | |
10586 | if (opnd1 == IA64_OPND_AR3) | |
10587 | rop = 0; | |
10588 | else if (opnd2 == IA64_OPND_AR3) | |
10589 | rop = 1; | |
10590 | else | |
10591 | abort (); | |
10592 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10593 | { | |
10594 | char unit = 'a'; | |
10595 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10596 | unit = 'i'; | |
10597 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10598 | unit = 'm'; | |
10599 | if (unit != 'a' && unit != idesc->name [4]) | |
ad4b42b4 | 10600 | as_bad (_("AR %d can only be accessed by %c-unit"), |
652ca075 L |
10601 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10602 | TOUPPER (unit)); | |
10603 | } | |
10604 | } | |
91d777ee L |
10605 | else if (strcmp (idesc->name, "hint.b") == 0) |
10606 | { | |
10607 | switch (md.hint_b) | |
10608 | { | |
10609 | case hint_b_ok: | |
10610 | break; | |
10611 | case hint_b_warning: | |
ad4b42b4 | 10612 | as_warn (_("hint.b may be treated as nop")); |
91d777ee L |
10613 | break; |
10614 | case hint_b_error: | |
ad4b42b4 | 10615 | as_bad (_("hint.b shouldn't be used")); |
91d777ee L |
10616 | break; |
10617 | } | |
10618 | } | |
800eeca4 JW |
10619 | |
10620 | qp_regno = 0; | |
10621 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10622 | { |
10623 | qp_regno = md.qp.X_add_number - REG_P; | |
10624 | md.qp.X_op = O_absent; | |
10625 | } | |
800eeca4 JW |
10626 | |
10627 | flags = idesc->flags; | |
10628 | ||
10629 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10630 | { |
10631 | /* The alignment frag has to end with a stop bit only if the | |
10632 | next instruction after the alignment directive has to be | |
10633 | the first instruction in an instruction group. */ | |
10634 | if (align_frag) | |
10635 | { | |
10636 | while (align_frag->fr_type != rs_align_code) | |
10637 | { | |
10638 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10639 | if (!align_frag) |
10640 | break; | |
9545c4ce | 10641 | } |
bae25f19 L |
10642 | /* align_frag can be NULL if there are directives in |
10643 | between. */ | |
10644 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10645 | align_frag->tc_frag_data = 1; |
10646 | } | |
10647 | ||
10648 | insn_group_break (1, 0, 0); | |
10649 | } | |
10650 | align_frag = NULL; | |
800eeca4 JW |
10651 | |
10652 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10653 | { | |
ad4b42b4 | 10654 | as_bad (_("`%s' cannot be predicated"), idesc->name); |
800eeca4 JW |
10655 | goto done; |
10656 | } | |
10657 | ||
542d6675 | 10658 | /* Build the instruction. */ |
800eeca4 JW |
10659 | CURR_SLOT.qp_regno = qp_regno; |
10660 | CURR_SLOT.idesc = idesc; | |
10661 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10662 | dwarf2_where (&CURR_SLOT.debug_line); |
661ba50f | 10663 | dwarf2_consume_line_info (); |
800eeca4 | 10664 | |
ba825241 | 10665 | /* Add unwind entries, if there are any. */ |
e0c9811a | 10666 | if (unwind.current_entry) |
800eeca4 | 10667 | { |
e0c9811a JW |
10668 | CURR_SLOT.unwind_record = unwind.current_entry; |
10669 | unwind.current_entry = NULL; | |
800eeca4 | 10670 | } |
ba825241 JB |
10671 | if (unwind.pending_saves) |
10672 | { | |
10673 | if (unwind.pending_saves->next) | |
10674 | { | |
10675 | /* Attach the next pending save to the next slot so that its | |
10676 | slot number will get set correctly. */ | |
10677 | add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); | |
10678 | unwind.pending_saves = &unwind.pending_saves->next->r.record.p; | |
10679 | } | |
10680 | else | |
10681 | unwind.pending_saves = NULL; | |
10682 | } | |
5656b6b8 | 10683 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10684 | unwind.insn = 1; |
800eeca4 | 10685 | |
542d6675 | 10686 | /* Check for dependency violations. */ |
800eeca4 | 10687 | if (md.detect_dv) |
542d6675 | 10688 | check_dv (idesc); |
800eeca4 JW |
10689 | |
10690 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10691 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10692 | emit_one_bundle (); | |
10693 | ||
10694 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10695 | insn_group_break (1, 0, 0); | |
10696 | ||
10697 | md.last_text_seg = now_seg; | |
10698 | ||
10699 | done: | |
10700 | input_line_pointer = saved_input_line_pointer; | |
10701 | } | |
10702 | ||
10703 | /* Called when symbol NAME cannot be found in the symbol table. | |
10704 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10705 | |
10706 | symbolS * | |
5a49b8ac | 10707 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
800eeca4 JW |
10708 | { |
10709 | return 0; | |
10710 | } | |
10711 | ||
10712 | /* Called for any expression that can not be recognized. When the | |
10713 | function is called, `input_line_pointer' will point to the start of | |
10714 | the expression. */ | |
542d6675 | 10715 | |
800eeca4 | 10716 | void |
5a49b8ac | 10717 | md_operand (expressionS *e) |
800eeca4 | 10718 | { |
800eeca4 JW |
10719 | switch (*input_line_pointer) |
10720 | { | |
800eeca4 JW |
10721 | case '[': |
10722 | ++input_line_pointer; | |
60d11e55 | 10723 | expression_and_evaluate (e); |
800eeca4 JW |
10724 | if (*input_line_pointer != ']') |
10725 | { | |
ad4b42b4 | 10726 | as_bad (_("Closing bracket missing")); |
800eeca4 JW |
10727 | goto err; |
10728 | } | |
10729 | else | |
10730 | { | |
6a2375c6 JB |
10731 | if (e->X_op != O_register |
10732 | || e->X_add_number < REG_GR | |
10733 | || e->X_add_number > REG_GR + 127) | |
10734 | { | |
ad4b42b4 | 10735 | as_bad (_("Index must be a general register")); |
6a2375c6 JB |
10736 | e->X_add_number = REG_GR; |
10737 | } | |
800eeca4 JW |
10738 | |
10739 | ++input_line_pointer; | |
10740 | e->X_op = O_index; | |
10741 | } | |
10742 | break; | |
10743 | ||
10744 | default: | |
10745 | break; | |
10746 | } | |
10747 | return; | |
10748 | ||
10749 | err: | |
10750 | ignore_rest_of_line (); | |
10751 | } | |
10752 | ||
10753 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10754 | a section symbol plus some offset. For relocs involving @fptr(), | |
10755 | directives we don't want such adjustments since we need to have the | |
10756 | original symbol's name in the reloc. */ | |
10757 | int | |
5a49b8ac | 10758 | ia64_fix_adjustable (fixS *fix) |
800eeca4 JW |
10759 | { |
10760 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 10761 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
10762 | return 0; |
10763 | ||
10764 | switch (fix->fx_r_type) | |
10765 | { | |
10766 | case BFD_RELOC_IA64_FPTR64I: | |
10767 | case BFD_RELOC_IA64_FPTR32MSB: | |
10768 | case BFD_RELOC_IA64_FPTR32LSB: | |
10769 | case BFD_RELOC_IA64_FPTR64MSB: | |
10770 | case BFD_RELOC_IA64_FPTR64LSB: | |
10771 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10772 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10773 | return 0; | |
10774 | default: | |
10775 | break; | |
10776 | } | |
10777 | ||
10778 | return 1; | |
10779 | } | |
10780 | ||
10781 | int | |
5a49b8ac | 10782 | ia64_force_relocation (fixS *fix) |
800eeca4 JW |
10783 | { |
10784 | switch (fix->fx_r_type) | |
10785 | { | |
10786 | case BFD_RELOC_IA64_FPTR64I: | |
10787 | case BFD_RELOC_IA64_FPTR32MSB: | |
10788 | case BFD_RELOC_IA64_FPTR32LSB: | |
10789 | case BFD_RELOC_IA64_FPTR64MSB: | |
10790 | case BFD_RELOC_IA64_FPTR64LSB: | |
10791 | ||
10792 | case BFD_RELOC_IA64_LTOFF22: | |
10793 | case BFD_RELOC_IA64_LTOFF64I: | |
10794 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10795 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10796 | case BFD_RELOC_IA64_PLTOFF22: | |
10797 | case BFD_RELOC_IA64_PLTOFF64I: | |
10798 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10799 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10800 | |
10801 | case BFD_RELOC_IA64_LTOFF22X: | |
10802 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10803 | return 1; |
10804 | ||
10805 | default: | |
a161fe53 | 10806 | break; |
800eeca4 | 10807 | } |
a161fe53 | 10808 | |
ae6063d4 | 10809 | return generic_force_reloc (fix); |
800eeca4 JW |
10810 | } |
10811 | ||
10812 | /* Decide from what point a pc-relative relocation is relative to, | |
10813 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10814 | long | |
5a49b8ac | 10815 | ia64_pcrel_from_section (fixS *fix, segT sec) |
800eeca4 JW |
10816 | { |
10817 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10818 | |
800eeca4 JW |
10819 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10820 | off &= ~0xfUL; | |
10821 | ||
10822 | return off; | |
10823 | } | |
10824 | ||
6174d9c8 RH |
10825 | |
10826 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10827 | void | |
10828 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10829 | { | |
91d6fa6a | 10830 | expressionS exp; |
6174d9c8 | 10831 | |
91d6fa6a NC |
10832 | exp.X_op = O_pseudo_fixup; |
10833 | exp.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10834 | exp.X_add_number = 0; | |
10835 | exp.X_add_symbol = symbol; | |
10836 | emit_expr (&exp, size); | |
6174d9c8 RH |
10837 | } |
10838 | ||
800eeca4 JW |
10839 | /* This is called whenever some data item (not an instruction) needs a |
10840 | fixup. We pick the right reloc code depending on the byteorder | |
10841 | currently in effect. */ | |
10842 | void | |
5a49b8ac | 10843 | ia64_cons_fix_new (fragS *f, int where, int nbytes, expressionS *exp) |
800eeca4 JW |
10844 | { |
10845 | bfd_reloc_code_real_type code; | |
10846 | fixS *fix; | |
10847 | ||
10848 | switch (nbytes) | |
10849 | { | |
10850 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10851 | them here since they will work fine as long as the expression | |
10852 | is fully defined at the end of the pass over the source file. */ | |
10853 | case 1: code = BFD_RELOC_8; break; | |
10854 | case 2: code = BFD_RELOC_16; break; | |
10855 | case 4: | |
10856 | if (target_big_endian) | |
10857 | code = BFD_RELOC_IA64_DIR32MSB; | |
10858 | else | |
10859 | code = BFD_RELOC_IA64_DIR32LSB; | |
10860 | break; | |
10861 | ||
10862 | case 8: | |
40449e9f | 10863 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10864 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10865 | && exp->X_op_symbol |
10866 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10867 | && !(md.flags & EF_IA_64_ABI64)) | |
10868 | { | |
10869 | if (target_big_endian) | |
10870 | code = BFD_RELOC_IA64_IPLTMSB; | |
10871 | else | |
10872 | code = BFD_RELOC_IA64_IPLTLSB; | |
10873 | exp->X_op = O_symbol; | |
10874 | break; | |
10875 | } | |
10876 | else | |
10877 | { | |
10878 | if (target_big_endian) | |
10879 | code = BFD_RELOC_IA64_DIR64MSB; | |
10880 | else | |
10881 | code = BFD_RELOC_IA64_DIR64LSB; | |
10882 | break; | |
10883 | } | |
800eeca4 | 10884 | |
3969b680 RH |
10885 | case 16: |
10886 | if (exp->X_op == O_pseudo_fixup | |
10887 | && exp->X_op_symbol | |
10888 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10889 | { | |
10890 | if (target_big_endian) | |
10891 | code = BFD_RELOC_IA64_IPLTMSB; | |
10892 | else | |
10893 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10894 | exp->X_op = O_symbol; |
10895 | break; | |
10896 | } | |
10897 | /* FALLTHRU */ | |
10898 | ||
800eeca4 | 10899 | default: |
ad4b42b4 | 10900 | as_bad (_("Unsupported fixup size %d"), nbytes); |
800eeca4 JW |
10901 | ignore_rest_of_line (); |
10902 | return; | |
10903 | } | |
6174d9c8 | 10904 | |
800eeca4 JW |
10905 | if (exp->X_op == O_pseudo_fixup) |
10906 | { | |
800eeca4 JW |
10907 | exp->X_op = O_symbol; |
10908 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10909 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10910 | } |
3969b680 | 10911 | |
800eeca4 JW |
10912 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10913 | /* We need to store the byte order in effect in case we're going | |
10914 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 10915 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
10916 | fix->tc_fix_data.bigendian = target_big_endian; |
10917 | } | |
10918 | ||
10919 | /* Return the actual relocation we wish to associate with the pseudo | |
10920 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10921 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10922 | |
10923 | static bfd_reloc_code_real_type | |
5a49b8ac | 10924 | ia64_gen_real_reloc_type (struct symbol *sym, bfd_reloc_code_real_type r_type) |
800eeca4 | 10925 | { |
d3ce72d0 | 10926 | bfd_reloc_code_real_type newr = 0; |
0ca3e455 | 10927 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
10928 | |
10929 | if (sym == NULL) | |
10930 | { | |
10931 | return r_type; | |
10932 | } | |
10933 | ||
10934 | switch (S_GET_VALUE (sym)) | |
10935 | { | |
10936 | case FUNC_FPTR_RELATIVE: | |
10937 | switch (r_type) | |
10938 | { | |
d3ce72d0 NC |
10939 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_FPTR64I; break; |
10940 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_FPTR32MSB; break; | |
10941 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_FPTR32LSB; break; | |
10942 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_FPTR64MSB; break; | |
10943 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 10944 | default: type = "FPTR"; break; |
800eeca4 JW |
10945 | } |
10946 | break; | |
10947 | ||
10948 | case FUNC_GP_RELATIVE: | |
10949 | switch (r_type) | |
10950 | { | |
d3ce72d0 NC |
10951 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_GPREL22; break; |
10952 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_GPREL64I; break; | |
10953 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_GPREL32MSB; break; | |
10954 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_GPREL32LSB; break; | |
10955 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_GPREL64MSB; break; | |
10956 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 10957 | default: type = "GPREL"; break; |
800eeca4 JW |
10958 | } |
10959 | break; | |
10960 | ||
10961 | case FUNC_LT_RELATIVE: | |
10962 | switch (r_type) | |
10963 | { | |
d3ce72d0 NC |
10964 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22; break; |
10965 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 10966 | default: type = "LTOFF"; break; |
800eeca4 JW |
10967 | } |
10968 | break; | |
10969 | ||
fa2c7eff RH |
10970 | case FUNC_LT_RELATIVE_X: |
10971 | switch (r_type) | |
10972 | { | |
d3ce72d0 | 10973 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22X; break; |
0ca3e455 | 10974 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
10975 | } |
10976 | break; | |
10977 | ||
c67e42c9 RH |
10978 | case FUNC_PC_RELATIVE: |
10979 | switch (r_type) | |
10980 | { | |
d3ce72d0 NC |
10981 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PCREL22; break; |
10982 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PCREL64I; break; | |
10983 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_PCREL32MSB; break; | |
10984 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_PCREL32LSB; break; | |
10985 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PCREL64MSB; break; | |
10986 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 10987 | default: type = "PCREL"; break; |
c67e42c9 RH |
10988 | } |
10989 | break; | |
10990 | ||
800eeca4 JW |
10991 | case FUNC_PLT_RELATIVE: |
10992 | switch (r_type) | |
10993 | { | |
d3ce72d0 NC |
10994 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PLTOFF22; break; |
10995 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PLTOFF64I; break; | |
10996 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10997 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 10998 | default: type = "PLTOFF"; break; |
800eeca4 JW |
10999 | } |
11000 | break; | |
11001 | ||
11002 | case FUNC_SEC_RELATIVE: | |
11003 | switch (r_type) | |
11004 | { | |
d3ce72d0 NC |
11005 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SECREL32MSB;break; |
11006 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SECREL32LSB;break; | |
11007 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SECREL64MSB;break; | |
11008 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11009 | default: type = "SECREL"; break; |
800eeca4 JW |
11010 | } |
11011 | break; | |
11012 | ||
11013 | case FUNC_SEG_RELATIVE: | |
11014 | switch (r_type) | |
11015 | { | |
d3ce72d0 NC |
11016 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SEGREL32MSB;break; |
11017 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11018 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11019 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11020 | default: type = "SEGREL"; break; |
800eeca4 JW |
11021 | } |
11022 | break; | |
11023 | ||
11024 | case FUNC_LTV_RELATIVE: | |
11025 | switch (r_type) | |
11026 | { | |
d3ce72d0 NC |
11027 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_LTV32MSB; break; |
11028 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_LTV32LSB; break; | |
11029 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_LTV64MSB; break; | |
11030 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11031 | default: type = "LTV"; break; |
800eeca4 JW |
11032 | } |
11033 | break; | |
11034 | ||
11035 | case FUNC_LT_FPTR_RELATIVE: | |
11036 | switch (r_type) | |
11037 | { | |
11038 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11039 | newr = BFD_RELOC_IA64_LTOFF_FPTR22; break; |
800eeca4 | 11040 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11041 | newr = BFD_RELOC_IA64_LTOFF_FPTR64I; break; |
0ca3e455 | 11042 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11043 | newr = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; |
0ca3e455 | 11044 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11045 | newr = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; |
0ca3e455 | 11046 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11047 | newr = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; |
0ca3e455 | 11048 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11049 | newr = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; |
800eeca4 | 11050 | default: |
0ca3e455 | 11051 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11052 | } |
11053 | break; | |
3969b680 | 11054 | |
13ae64f3 JJ |
11055 | case FUNC_TP_RELATIVE: |
11056 | switch (r_type) | |
11057 | { | |
d3ce72d0 NC |
11058 | case BFD_RELOC_IA64_IMM14: newr = BFD_RELOC_IA64_TPREL14; break; |
11059 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_TPREL22; break; | |
11060 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_TPREL64I; break; | |
11061 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_TPREL64MSB; break; | |
11062 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_TPREL64LSB; break; | |
0ca3e455 | 11063 | default: type = "TPREL"; break; |
13ae64f3 JJ |
11064 | } |
11065 | break; | |
11066 | ||
11067 | case FUNC_LT_TP_RELATIVE: | |
11068 | switch (r_type) | |
11069 | { | |
11070 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11071 | newr = BFD_RELOC_IA64_LTOFF_TPREL22; break; |
13ae64f3 | 11072 | default: |
0ca3e455 JB |
11073 | type = "LTOFF_TPREL"; break; |
11074 | } | |
11075 | break; | |
11076 | ||
11077 | case FUNC_DTP_MODULE: | |
11078 | switch (r_type) | |
11079 | { | |
11080 | case BFD_RELOC_IA64_DIR64MSB: | |
d3ce72d0 | 11081 | newr = BFD_RELOC_IA64_DTPMOD64MSB; break; |
0ca3e455 | 11082 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11083 | newr = BFD_RELOC_IA64_DTPMOD64LSB; break; |
0ca3e455 JB |
11084 | default: |
11085 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11086 | } |
11087 | break; | |
11088 | ||
11089 | case FUNC_LT_DTP_MODULE: | |
11090 | switch (r_type) | |
11091 | { | |
11092 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11093 | newr = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; |
13ae64f3 | 11094 | default: |
0ca3e455 | 11095 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11096 | } |
11097 | break; | |
11098 | ||
11099 | case FUNC_DTP_RELATIVE: | |
11100 | switch (r_type) | |
11101 | { | |
0ca3e455 | 11102 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11103 | newr = BFD_RELOC_IA64_DTPREL32MSB; break; |
0ca3e455 | 11104 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11105 | newr = BFD_RELOC_IA64_DTPREL32LSB; break; |
6174d9c8 | 11106 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11107 | newr = BFD_RELOC_IA64_DTPREL64MSB; break; |
6174d9c8 | 11108 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11109 | newr = BFD_RELOC_IA64_DTPREL64LSB; break; |
13ae64f3 | 11110 | case BFD_RELOC_IA64_IMM14: |
d3ce72d0 | 11111 | newr = BFD_RELOC_IA64_DTPREL14; break; |
13ae64f3 | 11112 | case BFD_RELOC_IA64_IMM22: |
d3ce72d0 | 11113 | newr = BFD_RELOC_IA64_DTPREL22; break; |
13ae64f3 | 11114 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11115 | newr = BFD_RELOC_IA64_DTPREL64I; break; |
13ae64f3 | 11116 | default: |
0ca3e455 | 11117 | type = "DTPREL"; break; |
13ae64f3 JJ |
11118 | } |
11119 | break; | |
11120 | ||
11121 | case FUNC_LT_DTP_RELATIVE: | |
11122 | switch (r_type) | |
11123 | { | |
11124 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11125 | newr = BFD_RELOC_IA64_LTOFF_DTPREL22; break; |
13ae64f3 | 11126 | default: |
0ca3e455 | 11127 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11128 | } |
11129 | break; | |
11130 | ||
40449e9f | 11131 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11132 | switch (r_type) |
11133 | { | |
11134 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11135 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11136 | default: type = "IPLT"; break; | |
11137 | } | |
40449e9f | 11138 | break; |
1cd8ff38 | 11139 | |
9d0e8497 TG |
11140 | #ifdef TE_VMS |
11141 | case FUNC_SLOTCOUNT_RELOC: | |
11142 | return DUMMY_RELOC_IA64_SLOTCOUNT; | |
11143 | #endif | |
11144 | ||
800eeca4 JW |
11145 | default: |
11146 | abort (); | |
11147 | } | |
6174d9c8 | 11148 | |
d3ce72d0 NC |
11149 | if (newr) |
11150 | return newr; | |
800eeca4 | 11151 | else |
0ca3e455 JB |
11152 | { |
11153 | int width; | |
11154 | ||
11155 | if (!type) | |
11156 | abort (); | |
11157 | switch (r_type) | |
11158 | { | |
11159 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11160 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11161 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11162 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11163 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11164 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11165 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11166 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11167 | default: abort (); | |
11168 | } | |
11169 | ||
11170 | /* This should be an error, but since previously there wasn't any | |
ad4b42b4 NC |
11171 | diagnostic here, don't make it fail because of this for now. */ |
11172 | as_warn (_("Cannot express %s%d%s relocation"), type, width, suffix); | |
0ca3e455 JB |
11173 | return r_type; |
11174 | } | |
800eeca4 JW |
11175 | } |
11176 | ||
11177 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11178 | functions. */ | |
11179 | void | |
5a49b8ac | 11180 | ia64_validate_fix (fixS *fix) |
800eeca4 JW |
11181 | { |
11182 | switch (fix->fx_r_type) | |
11183 | { | |
11184 | case BFD_RELOC_IA64_FPTR64I: | |
11185 | case BFD_RELOC_IA64_FPTR32MSB: | |
11186 | case BFD_RELOC_IA64_FPTR64LSB: | |
11187 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11188 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11189 | if (fix->fx_offset != 0) | |
11190 | as_bad_where (fix->fx_file, fix->fx_line, | |
ad4b42b4 | 11191 | _("No addend allowed in @fptr() relocation")); |
800eeca4 JW |
11192 | break; |
11193 | default: | |
11194 | break; | |
11195 | } | |
800eeca4 JW |
11196 | } |
11197 | ||
11198 | static void | |
5a49b8ac | 11199 | fix_insn (fixS *fix, const struct ia64_operand *odesc, valueT value) |
800eeca4 JW |
11200 | { |
11201 | bfd_vma insn[3], t0, t1, control_bits; | |
11202 | const char *err; | |
11203 | char *fixpos; | |
11204 | long slot; | |
11205 | ||
11206 | slot = fix->fx_where & 0x3; | |
11207 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11208 | ||
c67e42c9 | 11209 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11210 | t0 = bfd_getl64 (fixpos); |
11211 | t1 = bfd_getl64 (fixpos + 8); | |
11212 | control_bits = t0 & 0x1f; | |
11213 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11214 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11215 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11216 | ||
c67e42c9 RH |
11217 | err = NULL; |
11218 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11219 | { |
c67e42c9 RH |
11220 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11221 | insn[2] |= (((value & 0x7f) << 13) | |
11222 | | (((value >> 7) & 0x1ff) << 27) | |
11223 | | (((value >> 16) & 0x1f) << 22) | |
11224 | | (((value >> 21) & 0x1) << 21) | |
11225 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11226 | } |
c67e42c9 RH |
11227 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11228 | { | |
11229 | if (value & ~0x3fffffffffffffffULL) | |
20203fb9 | 11230 | err = _("integer operand out of range"); |
c67e42c9 RH |
11231 | insn[1] = (value >> 21) & 0x1ffffffffffLL; |
11232 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11233 | } | |
11234 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11235 | { | |
11236 | value >>= 4; | |
11237 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11238 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11239 | | (((value >> 0) & 0xfffff) << 13)); | |
11240 | } | |
11241 | else | |
11242 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11243 | ||
11244 | if (err) | |
83cf10fd | 11245 | as_bad_where (fix->fx_file, fix->fx_line, "%s", err); |
800eeca4 JW |
11246 | |
11247 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11248 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11249 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11250 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11251 | } |
11252 | ||
11253 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11254 | ignored; perhaps it was once meaningful, but now it is historical. | |
11255 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11256 | ||
11257 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11258 | (if possible). */ |
94f592af NC |
11259 | |
11260 | void | |
5a49b8ac | 11261 | md_apply_fix (fixS *fix, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
800eeca4 JW |
11262 | { |
11263 | char *fixpos; | |
40449e9f | 11264 | valueT value = *valP; |
800eeca4 JW |
11265 | |
11266 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11267 | ||
11268 | if (fix->fx_pcrel) | |
11269 | { | |
7b347e43 JB |
11270 | switch (fix->fx_r_type) |
11271 | { | |
11272 | case BFD_RELOC_IA64_PCREL21B: break; | |
11273 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11274 | case BFD_RELOC_IA64_PCREL21F: break; | |
11275 | case BFD_RELOC_IA64_PCREL21M: break; | |
11276 | case BFD_RELOC_IA64_PCREL60B: break; | |
11277 | case BFD_RELOC_IA64_PCREL22: break; | |
11278 | case BFD_RELOC_IA64_PCREL64I: break; | |
11279 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11280 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11281 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11282 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11283 | default: | |
11284 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11285 | fix->fx_r_type); | |
11286 | break; | |
11287 | } | |
800eeca4 JW |
11288 | } |
11289 | if (fix->fx_addsy) | |
11290 | { | |
592588f3 | 11291 | switch ((unsigned) fix->fx_r_type) |
800eeca4 | 11292 | { |
00f7efb6 | 11293 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11294 | /* This must be a TAG13 or TAG13b operand. There are no external |
11295 | relocs defined for them, so we must give an error. */ | |
800eeca4 | 11296 | as_bad_where (fix->fx_file, fix->fx_line, |
ad4b42b4 | 11297 | _("%s must have a constant value"), |
800eeca4 | 11298 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); |
fa1cb89c | 11299 | fix->fx_done = 1; |
94f592af | 11300 | return; |
00f7efb6 JJ |
11301 | |
11302 | case BFD_RELOC_IA64_TPREL14: | |
11303 | case BFD_RELOC_IA64_TPREL22: | |
11304 | case BFD_RELOC_IA64_TPREL64I: | |
11305 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11306 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11307 | case BFD_RELOC_IA64_DTPREL14: | |
11308 | case BFD_RELOC_IA64_DTPREL22: | |
11309 | case BFD_RELOC_IA64_DTPREL64I: | |
11310 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11311 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11312 | break; | |
7925dd68 | 11313 | |
9d0e8497 TG |
11314 | #ifdef TE_VMS |
11315 | case DUMMY_RELOC_IA64_SLOTCOUNT: | |
11316 | as_bad_where (fix->fx_file, fix->fx_line, | |
11317 | _("cannot resolve @slotcount parameter")); | |
11318 | fix->fx_done = 1; | |
11319 | return; | |
11320 | #endif | |
11321 | ||
7925dd68 JJ |
11322 | default: |
11323 | break; | |
800eeca4 | 11324 | } |
800eeca4 JW |
11325 | } |
11326 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11327 | { | |
9d0e8497 TG |
11328 | #ifdef TE_VMS |
11329 | if (fix->fx_r_type == DUMMY_RELOC_IA64_SLOTCOUNT) | |
11330 | { | |
11331 | /* For @slotcount, convert an addresses difference to a slots | |
11332 | difference. */ | |
11333 | valueT v; | |
11334 | ||
11335 | v = (value >> 4) * 3; | |
11336 | switch (value & 0x0f) | |
11337 | { | |
11338 | case 0: | |
11339 | case 1: | |
11340 | case 2: | |
11341 | v += value & 0x0f; | |
11342 | break; | |
11343 | case 0x0f: | |
11344 | v += 2; | |
11345 | break; | |
11346 | case 0x0e: | |
11347 | v += 1; | |
11348 | break; | |
11349 | default: | |
11350 | as_bad (_("invalid @slotcount value")); | |
11351 | } | |
11352 | value = v; | |
11353 | } | |
11354 | #endif | |
11355 | ||
800eeca4 JW |
11356 | if (fix->tc_fix_data.bigendian) |
11357 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11358 | else | |
11359 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11360 | fix->fx_done = 1; | |
800eeca4 JW |
11361 | } |
11362 | else | |
11363 | { | |
11364 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11365 | fix->fx_done = 1; | |
800eeca4 | 11366 | } |
800eeca4 JW |
11367 | } |
11368 | ||
11369 | /* Generate the BFD reloc to be stuck in the object file from the | |
11370 | fixup used internally in the assembler. */ | |
542d6675 KH |
11371 | |
11372 | arelent * | |
5a49b8ac | 11373 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp) |
800eeca4 JW |
11374 | { |
11375 | arelent *reloc; | |
11376 | ||
11377 | reloc = xmalloc (sizeof (*reloc)); | |
11378 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11379 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11380 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11381 | reloc->addend = fixp->fx_offset; | |
11382 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11383 | ||
11384 | if (!reloc->howto) | |
11385 | { | |
11386 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ad4b42b4 | 11387 | _("Cannot represent %s relocation in object file"), |
800eeca4 | 11388 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
cf738528 AS |
11389 | free (reloc); |
11390 | return NULL; | |
800eeca4 JW |
11391 | } |
11392 | return reloc; | |
11393 | } | |
11394 | ||
11395 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11396 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11397 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11398 | returned, or NULL on OK. */ |
11399 | ||
11400 | #define MAX_LITTLENUMS 5 | |
11401 | ||
542d6675 | 11402 | char * |
499ac353 | 11403 | md_atof (int type, char *lit, int *size) |
800eeca4 JW |
11404 | { |
11405 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11406 | char *t; |
11407 | int prec; | |
11408 | ||
11409 | switch (type) | |
11410 | { | |
11411 | /* IEEE floats */ | |
11412 | case 'f': | |
11413 | case 'F': | |
11414 | case 's': | |
11415 | case 'S': | |
11416 | prec = 2; | |
11417 | break; | |
11418 | ||
11419 | case 'd': | |
11420 | case 'D': | |
11421 | case 'r': | |
11422 | case 'R': | |
11423 | prec = 4; | |
11424 | break; | |
11425 | ||
11426 | case 'x': | |
11427 | case 'X': | |
11428 | case 'p': | |
11429 | case 'P': | |
11430 | prec = 5; | |
11431 | break; | |
11432 | ||
11433 | default: | |
11434 | *size = 0; | |
499ac353 | 11435 | return _("Unrecognized or unsupported floating point constant"); |
800eeca4 JW |
11436 | } |
11437 | t = atof_ieee (input_line_pointer, type, words); | |
11438 | if (t) | |
11439 | input_line_pointer = t; | |
800eeca4 | 11440 | |
10a98291 L |
11441 | (*ia64_float_to_chars) (lit, words, prec); |
11442 | ||
165a7f90 L |
11443 | if (type == 'X') |
11444 | { | |
11445 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11446 | memset (&lit [10], 0, 6); |
165a7f90 L |
11447 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11448 | } | |
10a98291 L |
11449 | else |
11450 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11451 | ||
499ac353 | 11452 | return NULL; |
800eeca4 JW |
11453 | } |
11454 | ||
800eeca4 JW |
11455 | /* Handle ia64 specific semantics of the align directive. */ |
11456 | ||
0a9ef439 | 11457 | void |
5a49b8ac AM |
11458 | ia64_md_do_align (int n ATTRIBUTE_UNUSED, |
11459 | const char *fill ATTRIBUTE_UNUSED, | |
11460 | int len ATTRIBUTE_UNUSED, | |
11461 | int max ATTRIBUTE_UNUSED) | |
800eeca4 | 11462 | { |
0a9ef439 | 11463 | if (subseg_text_p (now_seg)) |
800eeca4 | 11464 | ia64_flush_insns (); |
0a9ef439 | 11465 | } |
800eeca4 | 11466 | |
0a9ef439 RH |
11467 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11468 | of an rs_align_code fragment. */ | |
800eeca4 | 11469 | |
0a9ef439 | 11470 | void |
5a49b8ac | 11471 | ia64_handle_align (fragS *fragp) |
0a9ef439 | 11472 | { |
0a9ef439 RH |
11473 | int bytes; |
11474 | char *p; | |
91d6fa6a | 11475 | const unsigned char *nop_type; |
0a9ef439 RH |
11476 | |
11477 | if (fragp->fr_type != rs_align_code) | |
11478 | return; | |
11479 | ||
9545c4ce | 11480 | /* Check if this frag has to end with a stop bit. */ |
91d6fa6a | 11481 | nop_type = fragp->tc_frag_data ? le_nop_stop : le_nop; |
9545c4ce | 11482 | |
0a9ef439 RH |
11483 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11484 | p = fragp->fr_literal + fragp->fr_fix; | |
11485 | ||
d9201763 L |
11486 | /* If no paddings are needed, we check if we need a stop bit. */ |
11487 | if (!bytes && fragp->tc_frag_data) | |
11488 | { | |
11489 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11490 | #if 1 |
11491 | /* FIXME: It won't work with | |
11492 | .align 16 | |
11493 | alloc r32=ar.pfs,1,2,4,0 | |
11494 | */ | |
11495 | ; | |
11496 | #else | |
d9201763 L |
11497 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11498 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11499 | #endif |
d9201763 L |
11500 | else |
11501 | /* Bundles are always in little-endian byte order. Make sure | |
11502 | the previous bundle has the stop bit. */ | |
11503 | *(p - 16) |= 1; | |
11504 | } | |
11505 | ||
0a9ef439 RH |
11506 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11507 | putting data into a text section. */ | |
11508 | if (bytes & 15) | |
11509 | { | |
11510 | int fix = bytes & 15; | |
11511 | memset (p, 0, fix); | |
11512 | p += fix; | |
11513 | bytes -= fix; | |
11514 | fragp->fr_fix += fix; | |
800eeca4 JW |
11515 | } |
11516 | ||
012a452b | 11517 | /* Instruction bundles are always little-endian. */ |
91d6fa6a | 11518 | memcpy (p, nop_type, 16); |
0a9ef439 | 11519 | fragp->fr_var = 16; |
800eeca4 | 11520 | } |
10a98291 L |
11521 | |
11522 | static void | |
11523 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11524 | int prec) | |
11525 | { | |
11526 | while (prec--) | |
11527 | { | |
11528 | number_to_chars_bigendian (lit, (long) (*words++), | |
11529 | sizeof (LITTLENUM_TYPE)); | |
11530 | lit += sizeof (LITTLENUM_TYPE); | |
11531 | } | |
11532 | } | |
11533 | ||
11534 | static void | |
11535 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11536 | int prec) | |
11537 | { | |
11538 | while (prec--) | |
11539 | { | |
11540 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11541 | sizeof (LITTLENUM_TYPE)); | |
11542 | lit += sizeof (LITTLENUM_TYPE); | |
11543 | } | |
11544 | } | |
11545 | ||
11546 | void | |
5a49b8ac | 11547 | ia64_elf_section_change_hook (void) |
10a98291 | 11548 | { |
38ce5b11 L |
11549 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11550 | && elf_linked_to_section (now_seg) == NULL) | |
11551 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11552 | dot_byteorder (-1); |
11553 | } | |
a645d1eb L |
11554 | |
11555 | /* Check if a label should be made global. */ | |
11556 | void | |
11557 | ia64_check_label (symbolS *label) | |
11558 | { | |
11559 | if (*input_line_pointer == ':') | |
11560 | { | |
11561 | S_SET_EXTERNAL (label); | |
11562 | input_line_pointer++; | |
11563 | } | |
11564 | } | |
35f5df7f L |
11565 | |
11566 | /* Used to remember where .alias and .secalias directives are seen. We | |
11567 | will rename symbol and section names when we are about to output | |
11568 | the relocatable file. */ | |
11569 | struct alias | |
11570 | { | |
11571 | char *file; /* The file where the directive is seen. */ | |
11572 | unsigned int line; /* The line number the directive is at. */ | |
708587a4 | 11573 | const char *name; /* The original name of the symbol. */ |
35f5df7f L |
11574 | }; |
11575 | ||
11576 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11577 | .secalias. Otherwise, it is .alias. */ | |
11578 | static void | |
11579 | dot_alias (int section) | |
11580 | { | |
11581 | char *name, *alias; | |
11582 | char delim; | |
11583 | char *end_name; | |
11584 | int len; | |
11585 | const char *error_string; | |
11586 | struct alias *h; | |
11587 | const char *a; | |
11588 | struct hash_control *ahash, *nhash; | |
11589 | const char *kind; | |
11590 | ||
11591 | name = input_line_pointer; | |
11592 | delim = get_symbol_end (); | |
11593 | end_name = input_line_pointer; | |
11594 | *end_name = delim; | |
11595 | ||
11596 | if (name == end_name) | |
11597 | { | |
11598 | as_bad (_("expected symbol name")); | |
e4e8248d | 11599 | ignore_rest_of_line (); |
35f5df7f L |
11600 | return; |
11601 | } | |
11602 | ||
11603 | SKIP_WHITESPACE (); | |
11604 | ||
11605 | if (*input_line_pointer != ',') | |
11606 | { | |
11607 | *end_name = 0; | |
11608 | as_bad (_("expected comma after \"%s\""), name); | |
11609 | *end_name = delim; | |
11610 | ignore_rest_of_line (); | |
11611 | return; | |
11612 | } | |
11613 | ||
11614 | input_line_pointer++; | |
11615 | *end_name = 0; | |
20b36a95 | 11616 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11617 | |
11618 | /* We call demand_copy_C_string to check if alias string is valid. | |
11619 | There should be a closing `"' and no `\0' in the string. */ | |
11620 | alias = demand_copy_C_string (&len); | |
11621 | if (alias == NULL) | |
11622 | { | |
11623 | ignore_rest_of_line (); | |
11624 | return; | |
11625 | } | |
11626 | ||
11627 | /* Make a copy of name string. */ | |
11628 | len = strlen (name) + 1; | |
11629 | obstack_grow (¬es, name, len); | |
11630 | name = obstack_finish (¬es); | |
11631 | ||
11632 | if (section) | |
11633 | { | |
11634 | kind = "section"; | |
11635 | ahash = secalias_hash; | |
11636 | nhash = secalias_name_hash; | |
11637 | } | |
11638 | else | |
11639 | { | |
11640 | kind = "symbol"; | |
11641 | ahash = alias_hash; | |
11642 | nhash = alias_name_hash; | |
11643 | } | |
11644 | ||
11645 | /* Check if alias has been used before. */ | |
11646 | h = (struct alias *) hash_find (ahash, alias); | |
11647 | if (h) | |
11648 | { | |
11649 | if (strcmp (h->name, name)) | |
11650 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11651 | alias, kind, h->name); | |
11652 | goto out; | |
11653 | } | |
11654 | ||
11655 | /* Check if name already has an alias. */ | |
11656 | a = (const char *) hash_find (nhash, name); | |
11657 | if (a) | |
11658 | { | |
11659 | if (strcmp (a, alias)) | |
11660 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11661 | goto out; | |
11662 | } | |
11663 | ||
11664 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11665 | as_where (&h->file, &h->line); | |
11666 | h->name = name; | |
11667 | ||
5a49b8ac | 11668 | error_string = hash_jam (ahash, alias, (void *) h); |
35f5df7f L |
11669 | if (error_string) |
11670 | { | |
11671 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11672 | alias, kind, error_string); | |
11673 | goto out; | |
11674 | } | |
11675 | ||
5a49b8ac | 11676 | error_string = hash_jam (nhash, name, (void *) alias); |
35f5df7f L |
11677 | if (error_string) |
11678 | { | |
11679 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11680 | alias, kind, error_string); | |
11681 | out: | |
11682 | obstack_free (¬es, name); | |
11683 | obstack_free (¬es, alias); | |
11684 | } | |
11685 | ||
11686 | demand_empty_rest_of_line (); | |
11687 | } | |
11688 | ||
11689 | /* It renames the original symbol name to its alias. */ | |
11690 | static void | |
5a49b8ac | 11691 | do_alias (const char *alias, void *value) |
35f5df7f L |
11692 | { |
11693 | struct alias *h = (struct alias *) value; | |
11694 | symbolS *sym = symbol_find (h->name); | |
11695 | ||
11696 | if (sym == NULL) | |
01e1a5bc NC |
11697 | { |
11698 | #ifdef TE_VMS | |
11699 | /* Uses .alias extensively to alias CRTL functions to same with | |
11700 | decc$ prefix. Sometimes function gets optimized away and a | |
11701 | warning results, which should be suppressed. */ | |
11702 | if (strncmp (alias, "decc$", 5) != 0) | |
11703 | #endif | |
11704 | as_warn_where (h->file, h->line, | |
11705 | _("symbol `%s' aliased to `%s' is not used"), | |
11706 | h->name, alias); | |
11707 | } | |
35f5df7f L |
11708 | else |
11709 | S_SET_NAME (sym, (char *) alias); | |
11710 | } | |
11711 | ||
11712 | /* Called from write_object_file. */ | |
11713 | void | |
11714 | ia64_adjust_symtab (void) | |
11715 | { | |
11716 | hash_traverse (alias_hash, do_alias); | |
11717 | } | |
11718 | ||
11719 | /* It renames the original section name to its alias. */ | |
11720 | static void | |
5a49b8ac | 11721 | do_secalias (const char *alias, void *value) |
35f5df7f L |
11722 | { |
11723 | struct alias *h = (struct alias *) value; | |
11724 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11725 | ||
11726 | if (sec == NULL) | |
11727 | as_warn_where (h->file, h->line, | |
11728 | _("section `%s' aliased to `%s' is not used"), | |
11729 | h->name, alias); | |
11730 | else | |
11731 | sec->name = alias; | |
11732 | } | |
11733 | ||
11734 | /* Called from write_object_file. */ | |
11735 | void | |
11736 | ia64_frob_file (void) | |
11737 | { | |
11738 | hash_traverse (secalias_hash, do_secalias); | |
11739 | } | |
01e1a5bc NC |
11740 | |
11741 | #ifdef TE_VMS | |
11742 | #define NT_VMS_MHD 1 | |
11743 | #define NT_VMS_LNM 2 | |
11744 | ||
11745 | /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF | |
11746 | .note section. */ | |
11747 | ||
11748 | /* Manufacture a VMS-like time string. */ | |
11749 | static void | |
11750 | get_vms_time (char *Now) | |
11751 | { | |
11752 | char *pnt; | |
11753 | time_t timeb; | |
11754 | ||
11755 | time (&timeb); | |
11756 | pnt = ctime (&timeb); | |
11757 | pnt[3] = 0; | |
11758 | pnt[7] = 0; | |
11759 | pnt[10] = 0; | |
11760 | pnt[16] = 0; | |
11761 | pnt[24] = 0; | |
11762 | sprintf (Now, "%2s-%3s-%s %s", pnt + 8, pnt + 4, pnt + 20, pnt + 11); | |
11763 | } | |
11764 | ||
11765 | void | |
11766 | ia64_vms_note (void) | |
11767 | { | |
11768 | char *p; | |
11769 | asection *seg = now_seg; | |
11770 | subsegT subseg = now_subseg; | |
01e1a5bc | 11771 | asection *secp = NULL; |
a0840211 | 11772 | char *bname; |
01e1a5bc NC |
11773 | char buf [256]; |
11774 | symbolS *sym; | |
11775 | ||
11776 | /* Create the .note section. */ | |
11777 | ||
11778 | secp = subseg_new (".note", 0); | |
11779 | bfd_set_section_flags (stdoutput, | |
11780 | secp, | |
11781 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11782 | ||
37a1f277 | 11783 | /* Module header note (MHD). */ |
a0840211 | 11784 | bname = xstrdup (lbasename (out_file_name)); |
01e1a5bc NC |
11785 | if ((p = strrchr (bname, '.'))) |
11786 | *p = '\0'; | |
37a1f277 TG |
11787 | |
11788 | /* VMS note header is 24 bytes long. */ | |
11789 | p = frag_more (8 + 8 + 8); | |
11790 | number_to_chars_littleendian (p + 0, 8, 8); | |
11791 | number_to_chars_littleendian (p + 8, 40 + strlen (bname), 8); | |
11792 | number_to_chars_littleendian (p + 16, NT_VMS_MHD, 8); | |
01e1a5bc NC |
11793 | |
11794 | p = frag_more (8); | |
11795 | strcpy (p, "IPF/VMS"); | |
11796 | ||
37a1f277 TG |
11797 | p = frag_more (17 + 17 + strlen (bname) + 1 + 5); |
11798 | get_vms_time (p); | |
11799 | strcpy (p + 17, "24-FEB-2005 15:00"); | |
11800 | p += 17 + 17; | |
01e1a5bc | 11801 | strcpy (p, bname); |
37a1f277 | 11802 | p += strlen (bname) + 1; |
a0840211 | 11803 | free (bname); |
01e1a5bc NC |
11804 | strcpy (p, "V1.0"); |
11805 | ||
11806 | frag_align (3, 0, 0); | |
11807 | ||
11808 | /* Language processor name note. */ | |
11809 | sprintf (buf, "GNU assembler version %s (%s) using BFD version %s", | |
11810 | VERSION, TARGET_ALIAS, BFD_VERSION_STRING); | |
11811 | ||
37a1f277 TG |
11812 | p = frag_more (8 + 8 + 8); |
11813 | number_to_chars_littleendian (p + 0, 8, 8); | |
11814 | number_to_chars_littleendian (p + 8, strlen (buf) + 1, 8); | |
11815 | number_to_chars_littleendian (p + 16, NT_VMS_LNM, 8); | |
01e1a5bc NC |
11816 | |
11817 | p = frag_more (8); | |
11818 | strcpy (p, "IPF/VMS"); | |
11819 | ||
11820 | p = frag_more (strlen (buf) + 1); | |
11821 | strcpy (p, buf); | |
11822 | ||
11823 | frag_align (3, 0, 0); | |
11824 | ||
11825 | secp = subseg_new (".vms_display_name_info", 0); | |
11826 | bfd_set_section_flags (stdoutput, | |
11827 | secp, | |
11828 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11829 | ||
11830 | /* This symbol should be passed on the command line and be variable | |
11831 | according to language. */ | |
11832 | sym = symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl", | |
11833 | absolute_section, 0, &zero_address_frag); | |
11834 | symbol_table_insert (sym); | |
11835 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING | BSF_DYNAMIC; | |
11836 | ||
11837 | p = frag_more (4); | |
11838 | /* Format 3 of VMS demangler Spec. */ | |
11839 | number_to_chars_littleendian (p, 3, 4); | |
11840 | ||
11841 | p = frag_more (4); | |
11842 | /* Place holder for symbol table index of above symbol. */ | |
11843 | number_to_chars_littleendian (p, -1, 4); | |
11844 | ||
11845 | frag_align (3, 0, 0); | |
11846 | ||
11847 | /* We probably can't restore the current segment, for there likely | |
11848 | isn't one yet... */ | |
11849 | if (seg && subseg) | |
11850 | subseg_set (seg, subseg); | |
11851 | } | |
11852 | ||
11853 | #endif /* TE_VMS */ |