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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
b3dfd7fe 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
800eeca4
JW		 3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22/*
23 TODO:
24
25 - optional operands
26 - directives:
800eeca4
JW		 27 .eb
28 .estate
29 .lb
30 .popsection
31 .previous
32 .psr
33 .pushsection
800eeca4
JW		 34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
36 - DV-related stuff:
542d6675
KH		 37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
40 notes)
800eeca4
JW		 41
42 */
43
44#include "as.h"
3882b010 45#include "safe-ctype.h"
800eeca4
JW		 46#include "dwarf2dbg.h"
47#include "subsegs.h"
48
49#include "opcode/ia64.h"
50
51#include "elf/ia64.h"
52
53#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54#define MIN(a,b) ((a) < (b) ? (a) : (b))
55
56#define NUM_SLOTS 4
57#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58#define CURR_SLOT md.slot[md.curr_slot]
59
60#define O_pseudo_fixup (O_max + 1)
61
62enum special_section
63 {
557debba 64 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 65 SPECIAL_SECTION_BSS = 0,
66 SPECIAL_SECTION_SBSS,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
557debba
JW		 71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 75 };
76
77enum reloc_func
78 {
13ae64f3
JJ		 79 FUNC_DTP_MODULE,
80 FUNC_DTP_RELATIVE,
800eeca4
JW		 81 FUNC_FPTR_RELATIVE,
82 FUNC_GP_RELATIVE,
83 FUNC_LT_RELATIVE,
fa2c7eff 84 FUNC_LT_RELATIVE_X,
c67e42c9 85 FUNC_PC_RELATIVE,
800eeca4
JW		 86 FUNC_PLT_RELATIVE,
87 FUNC_SEC_RELATIVE,
88 FUNC_SEG_RELATIVE,
13ae64f3 89 FUNC_TP_RELATIVE,
800eeca4
JW		 90 FUNC_LTV_RELATIVE,
91 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 92 FUNC_LT_DTP_MODULE,
93 FUNC_LT_DTP_RELATIVE,
94 FUNC_LT_TP_RELATIVE,
3969b680 95 FUNC_IPLT_RELOC,
800eeca4
JW		 96 };
97
98enum reg_symbol
99 {
100 REG_GR = 0,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
107 REG_CFM,
108 REG_PR,
109 REG_PR_ROT,
110 REG_PSR,
111 REG_PSR_L,
112 REG_PSR_UM,
113 /* The following are pseudo-registers for use by gas only. */
114 IND_CPUID,
115 IND_DBR,
116 IND_DTR,
117 IND_ITR,
118 IND_IBR,
119 IND_MEM,
120 IND_MSR,
121 IND_PKR,
122 IND_PMC,
123 IND_PMD,
124 IND_RR,
542d6675 125 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 126 REG_PSP,
127 REG_PRIUNAT,
800eeca4
JW		 128 REG_NUM
129 };
130
131enum dynreg_type
132 {
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
136 DYNREG_NUM_TYPES
137 };
138
87f8eb97
JW		 139enum operand_match_result
140 {
141 OPERAND_MATCH,
142 OPERAND_OUT_OF_RANGE,
143 OPERAND_MISMATCH
144 };
145
800eeca4
JW		 146/* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
149 instruction. */
150struct label_fix
542d6675
KH		 151{
152 struct label_fix *next;
153 struct symbol *sym;
154};
800eeca4 155
549f748d 156/* This is the endianness of the current section. */
800eeca4
JW		 157extern int target_big_endian;
158
549f748d
JW		 159/* This is the default endianness. */
160static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
161
10a98291
L		 162void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
163
164static void ia64_float_to_chars_bigendian
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
166static void ia64_float_to_chars_littleendian
167 PARAMS ((char *, LITTLENUM_TYPE *, int));
168static void (*ia64_float_to_chars)
169 PARAMS ((char *, LITTLENUM_TYPE *, int));
170
35f5df7f
L		 171static struct hash_control *alias_hash;
172static struct hash_control *alias_name_hash;
173static struct hash_control *secalias_hash;
174static struct hash_control *secalias_name_hash;
175
800eeca4
JW		 176/* Characters which always start a comment. */
177const char comment_chars[] = "";
178
179/* Characters which start a comment at the beginning of a line. */
180const char line_comment_chars[] = "#";
181
182/* Characters which may be used to separate multiple commands on a
183 single line. */
184const char line_separator_chars[] = ";";
185
186/* Characters which are used to indicate an exponent in a floating
187 point number. */
188const char EXP_CHARS[] = "eE";
189
190/* Characters which mean that a number is a floating point constant,
191 as in 0d1.0. */
192const char FLT_CHARS[] = "rRsSfFdDxXpP";
193
542d6675 194/* ia64-specific option processing: */
800eeca4 195
44f5c83a 196const char *md_shortopts = "m:N:x::";
800eeca4
JW		 197
198struct option md_longopts[] =
199 {
c43c2cc5
JW		 200#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
201 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
202#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
203 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 204 };
205
206size_t md_longopts_size = sizeof (md_longopts);
207
208static struct
209 {
210 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
211 struct hash_control *reg_hash; /* register name hash table */
212 struct hash_control *dynreg_hash; /* dynamic register hash table */
213 struct hash_control *const_hash; /* constant hash table */
214 struct hash_control *entry_hash; /* code entry hint hash table */
215
216 symbolS *regsym[REG_NUM];
217
218 /* If X_op is != O_absent, the registername for the instruction's
219 qualifying predicate. If NULL, p0 is assumed for instructions
220 that are predicatable. */
221 expressionS qp;
222
223 unsigned int
197865e8 224 manual_bundling : 1,
800eeca4
JW		 225 debug_dv: 1,
226 detect_dv: 1,
227 explicit_mode : 1, /* which mode we're in */
228 default_explicit_mode : 1, /* which mode is the default */
229 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 230 auto_align : 1,
231 keep_pending_output : 1;
800eeca4
JW		 232
233 /* Each bundle consists of up to three instructions. We keep
234 track of four most recent instructions so we can correctly set
197865e8 235 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 236 int curr_slot;
237 int num_slots_in_use;
238 struct slot
239 {
240 unsigned int
241 end_of_insn_group : 1,
242 manual_bundling_on : 1,
243 manual_bundling_off : 1;
244 signed char user_template; /* user-selected template, if any */
245 unsigned char qp_regno; /* qualifying predicate */
246 /* This duplicates a good fraction of "struct fix" but we
247 can't use a "struct fix" instead since we can't call
248 fix_new_exp() until we know the address of the instruction. */
249 int num_fixups;
250 struct insn_fix
251 {
252 bfd_reloc_code_real_type code;
253 enum ia64_opnd opnd; /* type of operand in need of fix */
254 unsigned int is_pcrel : 1; /* is operand pc-relative? */
255 expressionS expr; /* the value to be inserted */
256 }
257 fixup[2]; /* at most two fixups per insn */
258 struct ia64_opcode *idesc;
259 struct label_fix *label_fixups;
f1bcba5b 260 struct label_fix *tag_fixups;
800eeca4
JW		 261 struct unw_rec_list *unwind_record; /* Unwind directive. */
262 expressionS opnd[6];
263 char *src_file;
264 unsigned int src_line;
265 struct dwarf2_line_info debug_line;
266 }
267 slot[NUM_SLOTS];
268
269 segT last_text_seg;
270
271 struct dynreg
272 {
273 struct dynreg *next; /* next dynamic register */
274 const char *name;
275 unsigned short base; /* the base register number */
276 unsigned short num_regs; /* # of registers in this set */
277 }
278 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
279
280 flagword flags; /* ELF-header flags */
281
282 struct mem_offset {
283 unsigned hint:1; /* is this hint currently valid? */
284 bfd_vma offset; /* mem.offset offset */
285 bfd_vma base; /* mem.offset base */
286 } mem_offset;
287
288 int path; /* number of alt. entry points seen */
289 const char **entry_labels; /* labels of all alternate paths in
542d6675 290 the current DV-checking block. */
800eeca4 291 int maxpaths; /* size currently allocated for
542d6675 292 entry_labels */
88be23ec
BS		 293 /* Support for hardware errata workarounds. */
294
295 /* Record data about the last three insn groups. */
296 struct group
297 {
298 /* B-step workaround.
299 For each predicate register, this is set if the corresponding insn
300 group conditionally sets this register with one of the affected
301 instructions. */
302 int p_reg_set[64];
303 /* B-step workaround.
304 For each general register, this is set if the corresponding insn
305 a) is conditional one one of the predicate registers for which
306 P_REG_SET is 1 in the corresponding entry of the previous group,
307 b) sets this general register with one of the affected
308 instructions. */
309 int g_reg_set_conditionally[128];
310 } last_groups[3];
311 int group_idx;
557debba
JW		 312
313 int pointer_size; /* size in bytes of a pointer */
314 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 315 }
316md;
317
542d6675 318/* application registers: */
800eeca4 319
e0c9811a
JW		 320#define AR_K0 0
321#define AR_K7 7
322#define AR_RSC 16
323#define AR_BSP 17
324#define AR_BSPSTORE 18
325#define AR_RNAT 19
326#define AR_UNAT 36
327#define AR_FPSR 40
328#define AR_ITC 44
329#define AR_PFS 64
330#define AR_LC 65
800eeca4
JW		 331
332static const struct
333 {
334 const char *name;
335 int regnum;
336 }
337ar[] =
338 {
339 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
340 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
341 {"ar.rsc", 16}, {"ar.bsp", 17},
342 {"ar.bspstore", 18}, {"ar.rnat", 19},
343 {"ar.fcr", 21}, {"ar.eflag", 24},
344 {"ar.csd", 25}, {"ar.ssd", 26},
345 {"ar.cflg", 27}, {"ar.fsr", 28},
346 {"ar.fir", 29}, {"ar.fdr", 30},
347 {"ar.ccv", 32}, {"ar.unat", 36},
348 {"ar.fpsr", 40}, {"ar.itc", 44},
349 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 350 {"ar.ec", 66},
800eeca4
JW		 351 };
352
353#define CR_IPSR 16
354#define CR_ISR 17
355#define CR_IIP 19
356#define CR_IFA 20
357#define CR_ITIR 21
358#define CR_IIPA 22
359#define CR_IFS 23
360#define CR_IIM 24
361#define CR_IHA 25
362#define CR_IVR 65
363#define CR_TPR 66
364#define CR_EOI 67
365#define CR_IRR0 68
366#define CR_IRR3 71
367#define CR_LRR0 80
368#define CR_LRR1 81
369
542d6675 370/* control registers: */
800eeca4
JW		 371static const struct
372 {
373 const char *name;
374 int regnum;
375 }
376cr[] =
377 {
378 {"cr.dcr", 0},
379 {"cr.itm", 1},
380 {"cr.iva", 2},
381 {"cr.pta", 8},
382 {"cr.gpta", 9},
383 {"cr.ipsr", 16},
384 {"cr.isr", 17},
385 {"cr.iip", 19},
386 {"cr.ifa", 20},
387 {"cr.itir", 21},
388 {"cr.iipa", 22},
389 {"cr.ifs", 23},
390 {"cr.iim", 24},
391 {"cr.iha", 25},
392 {"cr.lid", 64},
393 {"cr.ivr", 65},
394 {"cr.tpr", 66},
395 {"cr.eoi", 67},
396 {"cr.irr0", 68},
397 {"cr.irr1", 69},
398 {"cr.irr2", 70},
399 {"cr.irr3", 71},
400 {"cr.itv", 72},
401 {"cr.pmv", 73},
402 {"cr.cmcv", 74},
403 {"cr.lrr0", 80},
404 {"cr.lrr1", 81}
405 };
406
407#define PSR_MFL 4
408#define PSR_IC 13
409#define PSR_DFL 18
410#define PSR_CPL 32
411
412static const struct const_desc
413 {
414 const char *name;
415 valueT value;
416 }
417const_bits[] =
418 {
542d6675 419 /* PSR constant masks: */
800eeca4
JW		 420
421 /* 0: reserved */
422 {"psr.be", ((valueT) 1) << 1},
423 {"psr.up", ((valueT) 1) << 2},
424 {"psr.ac", ((valueT) 1) << 3},
425 {"psr.mfl", ((valueT) 1) << 4},
426 {"psr.mfh", ((valueT) 1) << 5},
427 /* 6-12: reserved */
428 {"psr.ic", ((valueT) 1) << 13},
429 {"psr.i", ((valueT) 1) << 14},
430 {"psr.pk", ((valueT) 1) << 15},
431 /* 16: reserved */
432 {"psr.dt", ((valueT) 1) << 17},
433 {"psr.dfl", ((valueT) 1) << 18},
434 {"psr.dfh", ((valueT) 1) << 19},
435 {"psr.sp", ((valueT) 1) << 20},
436 {"psr.pp", ((valueT) 1) << 21},
437 {"psr.di", ((valueT) 1) << 22},
438 {"psr.si", ((valueT) 1) << 23},
439 {"psr.db", ((valueT) 1) << 24},
440 {"psr.lp", ((valueT) 1) << 25},
441 {"psr.tb", ((valueT) 1) << 26},
442 {"psr.rt", ((valueT) 1) << 27},
443 /* 28-31: reserved */
444 /* 32-33: cpl (current privilege level) */
445 {"psr.is", ((valueT) 1) << 34},
446 {"psr.mc", ((valueT) 1) << 35},
447 {"psr.it", ((valueT) 1) << 36},
448 {"psr.id", ((valueT) 1) << 37},
449 {"psr.da", ((valueT) 1) << 38},
450 {"psr.dd", ((valueT) 1) << 39},
451 {"psr.ss", ((valueT) 1) << 40},
452 /* 41-42: ri (restart instruction) */
453 {"psr.ed", ((valueT) 1) << 43},
454 {"psr.bn", ((valueT) 1) << 44},
455 };
456
542d6675 457/* indirect register-sets/memory: */
800eeca4
JW		 458
459static const struct
460 {
461 const char *name;
462 int regnum;
463 }
464indirect_reg[] =
465 {
466 { "CPUID", IND_CPUID },
467 { "cpuid", IND_CPUID },
468 { "dbr", IND_DBR },
469 { "dtr", IND_DTR },
470 { "itr", IND_ITR },
471 { "ibr", IND_IBR },
472 { "msr", IND_MSR },
473 { "pkr", IND_PKR },
474 { "pmc", IND_PMC },
475 { "pmd", IND_PMD },
476 { "rr", IND_RR },
477 };
478
479/* Pseudo functions used to indicate relocation types (these functions
480 start with an at sign (@). */
481static struct
482 {
483 const char *name;
484 enum pseudo_type
485 {
486 PSEUDO_FUNC_NONE,
487 PSEUDO_FUNC_RELOC,
488 PSEUDO_FUNC_CONST,
e0c9811a 489 PSEUDO_FUNC_REG,
800eeca4
JW		 490 PSEUDO_FUNC_FLOAT
491 }
492 type;
493 union
494 {
495 unsigned long ival;
496 symbolS *sym;
497 }
498 u;
499 }
500pseudo_func[] =
501 {
542d6675 502 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 503 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
504 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 505 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
506 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
507 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 508 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 509 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
511 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
512 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 513 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 514 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
515 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
13ae64f3
JJ		 516 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 519 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 520
542d6675 521 /* mbtype4 constants: */
800eeca4
JW		 522 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
523 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
524 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
525 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
526 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
527
542d6675 528 /* fclass constants: */
bf3ca999 529 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 530 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
531 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
532 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
533 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
534 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
535 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
536 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
537 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 538
539 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 540
c10d9d8f
JW		 541 /* hint constants: */
542 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
543
542d6675 544 /* unwind-related constants: */
041340ad
JW		 545 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
546 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
547 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
548 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
549 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
550 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
551 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 552
542d6675 553 /* unwind-related registers: */
e0c9811a 554 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 555 };
556
542d6675 557/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 558static const bfd_vma nop[IA64_NUM_UNITS] =
559 {
560 0x0000000000LL, /* NIL => break 0 */
561 0x0008000000LL, /* I-unit nop */
562 0x0008000000LL, /* M-unit nop */
563 0x4000000000LL, /* B-unit nop */
564 0x0008000000LL, /* F-unit nop */
565 0x0008000000LL, /* L-"unit" nop */
566 0x0008000000LL, /* X-unit nop */
567 };
568
569/* Can't be `const' as it's passed to input routines (which have the
570 habit of setting temporary sentinels. */
571static char special_section_name[][20] =
572 {
573 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 574 {".IA_64.unwind"}, {".IA_64.unwind_info"},
575 {".init_array"}, {".fini_array"}
800eeca4
JW		 576 };
577
578/* The best template for a particular sequence of up to three
579 instructions: */
580#define N IA64_NUM_TYPES
581static unsigned char best_template[N][N][N];
582#undef N
583
584/* Resource dependencies currently in effect */
585static struct rsrc {
586 int depind; /* dependency index */
587 const struct ia64_dependency *dependency; /* actual dependency */
588 unsigned specific:1, /* is this a specific bit/regno? */
589 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
590 int index; /* specific regno/bit within dependency */
591 int note; /* optional qualifying note (0 if none) */
592#define STATE_NONE 0
593#define STATE_STOP 1
594#define STATE_SRLZ 2
595 int insn_srlz; /* current insn serialization state */
596 int data_srlz; /* current data serialization state */
597 int qp_regno; /* qualifying predicate for this usage */
598 char *file; /* what file marked this dependency */
2434f565 599 unsigned int line; /* what line marked this dependency */
800eeca4 600 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 601 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 602 int path; /* corresponding code entry index */
603} *regdeps = NULL;
604static int regdepslen = 0;
605static int regdepstotlen = 0;
606static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
607static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 608 "data", "instr", "specific", "stop", "other" };
7484b8e6 609static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 610
611/* Current state of PR mutexation */
612static struct qpmutex {
613 valueT prmask;
614 int path;
615} *qp_mutexes = NULL; /* QP mutex bitmasks */
616static int qp_mutexeslen = 0;
617static int qp_mutexestotlen = 0;
197865e8 618static valueT qp_safe_across_calls = 0;
800eeca4
JW		 619
620/* Current state of PR implications */
621static struct qp_imply {
622 unsigned p1:6;
623 unsigned p2:6;
624 unsigned p2_branched:1;
625 int path;
626} *qp_implies = NULL;
627static int qp_implieslen = 0;
628static int qp_impliestotlen = 0;
629
197865e8
KH		 630/* Keep track of static GR values so that indirect register usage can
631 sometimes be tracked. */
800eeca4
JW		 632static struct gr {
633 unsigned known:1;
634 int path;
635 valueT value;
2434f565 636} gr_values[128] = {{ 1, 0, 0 }};
800eeca4 637
9545c4ce
L		 638/* Remember the alignment frag. */
639static fragS *align_frag;
640
800eeca4
JW		 641/* These are the routines required to output the various types of
642 unwind records. */
643
f5a30c2e
JW		 644/* A slot_number is a frag address plus the slot index (0-2). We use the
645 frag address here so that if there is a section switch in the middle of
646 a function, then instructions emitted to a different section are not
647 counted. Since there may be more than one frag for a function, this
648 means we also need to keep track of which frag this address belongs to
649 so we can compute inter-frag distances. This also nicely solves the
650 problem with nops emitted for align directives, which can't easily be
651 counted, but can easily be derived from frag sizes. */
652
800eeca4
JW		 653typedef struct unw_rec_list {
654 unwind_record r;
e0c9811a 655 unsigned long slot_number;
f5a30c2e 656 fragS *slot_frag;
73f20958
L		 657 unsigned long next_slot_number;
658 fragS *next_slot_frag;
800eeca4
JW		 659 struct unw_rec_list *next;
660} unw_rec_list;
661
2434f565 662#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 663
6290819d
NC		 664/* Linked list of saved prologue counts. A very poor
665 implementation of a map from label numbers to prologue counts. */
666typedef struct label_prologue_count
667{
668 struct label_prologue_count *next;
669 unsigned long label_number;
670 unsigned int prologue_count;
671} label_prologue_count;
672
e0c9811a
JW		 673static struct
674{
e0c9811a
JW		 675 /* Maintain a list of unwind entries for the current function. */
676 unw_rec_list *list;
677 unw_rec_list *tail;
800eeca4 678
e0c9811a
JW		 679 /* Any unwind entires that should be attached to the current slot
680 that an insn is being constructed for. */
681 unw_rec_list *current_entry;
800eeca4 682
e0c9811a
JW		 683 /* These are used to create the unwind table entry for this function. */
684 symbolS *proc_start;
685 symbolS *proc_end;
686 symbolS *info; /* pointer to unwind info */
687 symbolS *personality_routine;
91a2ae2a
RH		 688 segT saved_text_seg;
689 subsegT saved_text_subseg;
690 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 691
e0c9811a
JW		 692 /* TRUE if processing unwind directives in a prologue region. */
693 int prologue;
30d25259 694 int prologue_mask;
33d01f33 695 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 696 /* Prologue counts at previous .label_state directives. */
697 struct label_prologue_count * saved_prologue_counts;
e0c9811a 698} unwind;
800eeca4
JW		 699
700typedef void (*vbyte_func) PARAMS ((int, char *, char *));
701
0234cb7c 702/* Forward declarations: */
800eeca4
JW		 703static void set_section PARAMS ((char *name));
704static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
705 unsigned int, unsigned int));
d9201763 706static void dot_align (int);
800eeca4
JW		 707static void dot_radix PARAMS ((int));
708static void dot_special_section PARAMS ((int));
709static void dot_proc PARAMS ((int));
710static void dot_fframe PARAMS ((int));
711static void dot_vframe PARAMS ((int));
150f24a2
JW		 712static void dot_vframesp PARAMS ((int));
713static void dot_vframepsp PARAMS ((int));
800eeca4
JW		 714static void dot_save PARAMS ((int));
715static void dot_restore PARAMS ((int));
150f24a2
JW		 716static void dot_restorereg PARAMS ((int));
717static void dot_restorereg_p PARAMS ((int));
800eeca4
JW		 718static void dot_handlerdata PARAMS ((int));
719static void dot_unwentry PARAMS ((int));
720static void dot_altrp PARAMS ((int));
e0c9811a 721static void dot_savemem PARAMS ((int));
800eeca4
JW		 722static void dot_saveg PARAMS ((int));
723static void dot_savef PARAMS ((int));
724static void dot_saveb PARAMS ((int));
725static void dot_savegf PARAMS ((int));
726static void dot_spill PARAMS ((int));
150f24a2
JW		 727static void dot_spillreg PARAMS ((int));
728static void dot_spillmem PARAMS ((int));
729static void dot_spillreg_p PARAMS ((int));
730static void dot_spillmem_p PARAMS ((int));
731static void dot_label_state PARAMS ((int));
732static void dot_copy_state PARAMS ((int));
800eeca4
JW		 733static void dot_unwabi PARAMS ((int));
734static void dot_personality PARAMS ((int));
735static void dot_body PARAMS ((int));
736static void dot_prologue PARAMS ((int));
737static void dot_endp PARAMS ((int));
738static void dot_template PARAMS ((int));
739static void dot_regstk PARAMS ((int));
740static void dot_rot PARAMS ((int));
741static void dot_byteorder PARAMS ((int));
742static void dot_psr PARAMS ((int));
743static void dot_alias PARAMS ((int));
744static void dot_ln PARAMS ((int));
745static char *parse_section_name PARAMS ((void));
746static void dot_xdata PARAMS ((int));
747static void stmt_float_cons PARAMS ((int));
748static void stmt_cons_ua PARAMS ((int));
749static void dot_xfloat_cons PARAMS ((int));
750static void dot_xstringer PARAMS ((int));
751static void dot_xdata_ua PARAMS ((int));
752static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 753static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 754static void dot_pred_rel PARAMS ((int));
755static void dot_reg_val PARAMS ((int));
5e819f9c 756static void dot_serialize PARAMS ((int));
800eeca4
JW		 757static void dot_dv_mode PARAMS ((int));
758static void dot_entry PARAMS ((int));
759static void dot_mem_offset PARAMS ((int));
e0c9811a 760static void add_unwind_entry PARAMS((unw_rec_list *ptr));
542d6675 761static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 762static void declare_register_set PARAMS ((const char *, int, int));
763static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 764static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
765 int index,
766 expressionS *e));
800eeca4
JW		 767static int parse_operand PARAMS ((expressionS *e));
768static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
86cf98f3 769static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
800eeca4
JW		 770static void build_insn PARAMS ((struct slot *, bfd_vma *));
771static void emit_one_bundle PARAMS ((void));
772static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 773static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 774 bfd_reloc_code_real_type r_type));
775static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 776static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
777 struct rsrc *, int depind, int path));
800eeca4
JW		 778static void add_qp_mutex PARAMS((valueT mask));
779static void add_qp_imply PARAMS((int p1, int p2));
780static void clear_qp_branch_flag PARAMS((valueT mask));
781static void clear_qp_mutex PARAMS((valueT mask));
782static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 783static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 784static void clear_register_values PARAMS ((void));
785static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 786static void instruction_serialization PARAMS ((void));
787static void data_serialization PARAMS ((void));
788static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 789static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 790static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 791static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 792static int depends_on PARAMS ((int, struct ia64_opcode *));
793static int specify_resource PARAMS ((const struct ia64_dependency *,
794 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 795static int check_dv PARAMS((struct ia64_opcode *idesc));
796static void check_dependencies PARAMS((struct ia64_opcode *));
797static void mark_resources PARAMS((struct ia64_opcode *));
798static void update_dependencies PARAMS((struct ia64_opcode *));
799static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 800static int qp_mutex PARAMS ((int, int, int));
801static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
802static void output_vbyte_mem PARAMS ((int, char *, char *));
803static void count_output PARAMS ((int, char *, char *));
804static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
805static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 806static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 807static void output_P1_format PARAMS ((vbyte_func, int));
808static void output_P2_format PARAMS ((vbyte_func, int, int));
809static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
810static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
811static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
812static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
813static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
814static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
815static void output_P9_format PARAMS ((vbyte_func, int, int));
816static void output_P10_format PARAMS ((vbyte_func, int, int));
817static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
818static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 819static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
820static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 821static char format_ab_reg PARAMS ((int, int));
822static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
823 unsigned long));
824static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
825static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
826 unsigned long));
827static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 828static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 829static unw_rec_list *output_prologue PARAMS ((void));
830static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
831static unw_rec_list *output_body PARAMS ((void));
832static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
833static unw_rec_list *output_mem_stack_v PARAMS ((void));
834static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
835static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
836static unw_rec_list *output_rp_when PARAMS ((void));
837static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
838static unw_rec_list *output_rp_br PARAMS ((unsigned int));
839static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
840static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
841static unw_rec_list *output_pfs_when PARAMS ((void));
842static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
843static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
844static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
845static unw_rec_list *output_preds_when PARAMS ((void));
846static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
847static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
848static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
849static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
850static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
851static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
852static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
853static unw_rec_list *output_br_mem PARAMS ((unsigned int));
854static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
855static unw_rec_list *output_spill_base PARAMS ((unsigned int));
856static unw_rec_list *output_unat_when PARAMS ((void));
857static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
858static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
859static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
860static unw_rec_list *output_lc_when PARAMS ((void));
861static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
862static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
863static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
864static unw_rec_list *output_fpsr_when PARAMS ((void));
865static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
866static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
867static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
868static unw_rec_list *output_priunat_when_gr PARAMS ((void));
869static unw_rec_list *output_priunat_when_mem PARAMS ((void));
870static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
871static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
872static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
873static unw_rec_list *output_bsp_when PARAMS ((void));
874static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
875static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
876static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
877static unw_rec_list *output_bspstore_when PARAMS ((void));
878static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
879static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
880static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
881static unw_rec_list *output_rnat_when PARAMS ((void));
882static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
883static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
884static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
885static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
886static unw_rec_list *output_epilogue PARAMS ((unsigned long));
887static unw_rec_list *output_label_state PARAMS ((unsigned long));
888static unw_rec_list *output_copy_state PARAMS ((unsigned long));
889static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
890static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
891static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
892 unsigned int));
893static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int));
895static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
896 unsigned int));
897static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
898 unsigned int, unsigned int));
899static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
900static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
901static int calc_record_size PARAMS ((unw_rec_list *));
902static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 903static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 904 unsigned long, fragS *,
905 int));
91a2ae2a 906static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 907static void fixup_unw_records PARAMS ((unw_rec_list *, int));
150f24a2
JW		 908static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
909static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
6290819d
NC		 910static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
911static void save_prologue_count PARAMS ((unsigned long, unsigned int));
912static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 913
652ca075 914/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 915 unit (as opposed to the memory unit). */
916static int
652ca075 917ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 918{
919 reg -= REG_AR;
652ca075
L		 920 return reg >= 64 && reg <= 111;
921}
800eeca4 922
652ca075
L		 923/* Determine if application register REGNUM resides only in the memory
924 unit (as opposed to the integer unit). */
925static int
926ar_is_only_in_memory_unit (int reg)
927{
928 reg -= REG_AR;
929 return reg >= 0 && reg <= 47;
800eeca4
JW		 930}
931
932/* Switch to section NAME and create section if necessary. It's
933 rather ugly that we have to manipulate input_line_pointer but I
934 don't see any other way to accomplish the same thing without
935 changing obj-elf.c (which may be the Right Thing, in the end). */
936static void
937set_section (name)
938 char *name;
939{
940 char *saved_input_line_pointer;
941
942 saved_input_line_pointer = input_line_pointer;
943 input_line_pointer = name;
944 obj_elf_section (0);
945 input_line_pointer = saved_input_line_pointer;
946}
947
d61a78a7
RH		 948/* Map 's' to SHF_IA_64_SHORT. */
949
950int
951ia64_elf_section_letter (letter, ptr_msg)
952 int letter;
953 char **ptr_msg;
954{
955 if (letter == 's')
956 return SHF_IA_64_SHORT;
711ef82f
L		 957 else if (letter == 'o')
958 return SHF_LINK_ORDER;
d61a78a7 959
711ef82f
L		 960 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
961 return -1;
d61a78a7
RH		 962}
963
800eeca4
JW		 964/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
965
966flagword
967ia64_elf_section_flags (flags, attr, type)
968 flagword flags;
2434f565 969 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 970{
971 if (attr & SHF_IA_64_SHORT)
972 flags |= SEC_SMALL_DATA;
973 return flags;
974}
975
91a2ae2a
RH		 976int
977ia64_elf_section_type (str, len)
40449e9f
KH		 978 const char *str;
979 size_t len;
91a2ae2a 980{
1cd8ff38 981#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 982
1cd8ff38 983 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 984 return SHT_PROGBITS;
985
1cd8ff38 986 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 987 return SHT_PROGBITS;
988
1cd8ff38 989 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 990 return SHT_IA_64_UNWIND;
991
1cd8ff38 992 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 993 return SHT_IA_64_UNWIND;
994
711ef82f
L		 995 if (STREQ ("unwind"))
996 return SHT_IA_64_UNWIND;
997
1cd8ff38
NC		 998 if (STREQ ("init_array"))
999 return SHT_INIT_ARRAY;
40449e9f 1000
1cd8ff38
NC		 1001 if (STREQ ("fini_array"))
1002 return SHT_FINI_ARRAY;
40449e9f 1003
91a2ae2a 1004 return -1;
1cd8ff38 1005#undef STREQ
91a2ae2a
RH		 1006}
1007
800eeca4
JW		 1008static unsigned int
1009set_regstack (ins, locs, outs, rots)
1010 unsigned int ins, locs, outs, rots;
1011{
542d6675
KH		 1012 /* Size of frame. */
1013 unsigned int sof;
800eeca4
JW		 1014
1015 sof = ins + locs + outs;
1016 if (sof > 96)
1017 {
1018 as_bad ("Size of frame exceeds maximum of 96 registers");
1019 return 0;
1020 }
1021 if (rots > sof)
1022 {
1023 as_warn ("Size of rotating registers exceeds frame size");
1024 return 0;
1025 }
1026 md.in.base = REG_GR + 32;
1027 md.loc.base = md.in.base + ins;
1028 md.out.base = md.loc.base + locs;
1029
1030 md.in.num_regs = ins;
1031 md.loc.num_regs = locs;
1032 md.out.num_regs = outs;
1033 md.rot.num_regs = rots;
1034 return sof;
1035}
1036
1037void
1038ia64_flush_insns ()
1039{
1040 struct label_fix *lfix;
1041 segT saved_seg;
1042 subsegT saved_subseg;
b44b1b85 1043 unw_rec_list *ptr;
800eeca4
JW		 1044
1045 if (!md.last_text_seg)
1046 return;
1047
1048 saved_seg = now_seg;
1049 saved_subseg = now_subseg;
1050
1051 subseg_set (md.last_text_seg, 0);
1052
1053 while (md.num_slots_in_use > 0)
1054 emit_one_bundle (); /* force out queued instructions */
1055
1056 /* In case there are labels following the last instruction, resolve
542d6675 1057 those now: */
800eeca4
JW		 1058 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1059 {
1060 S_SET_VALUE (lfix->sym, frag_now_fix ());
1061 symbol_set_frag (lfix->sym, frag_now);
1062 }
1063 CURR_SLOT.label_fixups = 0;
f1bcba5b
JW		 1064 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1065 {
1066 S_SET_VALUE (lfix->sym, frag_now_fix ());
1067 symbol_set_frag (lfix->sym, frag_now);
1068 }
1069 CURR_SLOT.tag_fixups = 0;
800eeca4 1070
b44b1b85 1071 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1072 resolve those now. We only handle prologue, body, and endp directives
1073 here. Give an error for others. */
b44b1b85
JW		 1074 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1075 {
9c59842f 1076 switch (ptr->r.type)
b44b1b85 1077 {
9c59842f
JW		 1078 case prologue:
1079 case prologue_gr:
1080 case body:
1081 case endp:
b44b1b85
JW		 1082 ptr->slot_number = (unsigned long) frag_more (0);
1083 ptr->slot_frag = frag_now;
9c59842f
JW		 1084 break;
1085
1086 /* Allow any record which doesn't have a "t" field (i.e.,
1087 doesn't relate to a particular instruction). */
1088 case unwabi:
1089 case br_gr:
1090 case copy_state:
1091 case fr_mem:
1092 case frgr_mem:
1093 case gr_gr:
1094 case gr_mem:
1095 case label_state:
1096 case rp_br:
1097 case spill_base:
1098 case spill_mask:
1099 /* nothing */
1100 break;
1101
1102 default:
1103 as_bad (_("Unwind directive not followed by an instruction."));
1104 break;
b44b1b85 1105 }
b44b1b85
JW		 1106 }
1107 unwind.current_entry = NULL;
1108
800eeca4 1109 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1110
1111 if (md.qp.X_op == O_register)
1112 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1113}
1114
d9201763
L		 1115static void
1116ia64_do_align (int nbytes)
800eeca4
JW		 1117{
1118 char *saved_input_line_pointer = input_line_pointer;
1119
1120 input_line_pointer = "";
1121 s_align_bytes (nbytes);
1122 input_line_pointer = saved_input_line_pointer;
1123}
1124
1125void
1126ia64_cons_align (nbytes)
1127 int nbytes;
1128{
1129 if (md.auto_align)
1130 {
1131 char *saved_input_line_pointer = input_line_pointer;
1132 input_line_pointer = "";
1133 s_align_bytes (nbytes);
1134 input_line_pointer = saved_input_line_pointer;
1135 }
1136}
1137
1138/* Output COUNT bytes to a memory location. */
1139static unsigned char *vbyte_mem_ptr = NULL;
1140
197865e8 1141void
800eeca4
JW		 1142output_vbyte_mem (count, ptr, comment)
1143 int count;
1144 char *ptr;
2434f565 1145 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1146{
1147 int x;
1148 if (vbyte_mem_ptr == NULL)
1149 abort ();
1150
1151 if (count == 0)
1152 return;
1153 for (x = 0; x < count; x++)
1154 *(vbyte_mem_ptr++) = ptr[x];
1155}
1156
1157/* Count the number of bytes required for records. */
1158static int vbyte_count = 0;
197865e8 1159void
800eeca4
JW		 1160count_output (count, ptr, comment)
1161 int count;
2434f565
JW		 1162 char *ptr ATTRIBUTE_UNUSED;
1163 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1164{
1165 vbyte_count += count;
1166}
1167
1168static void
1169output_R1_format (f, rtype, rlen)
1170 vbyte_func f;
1171 unw_record_type rtype;
1172 int rlen;
1173{
e0c9811a 1174 int r = 0;
800eeca4
JW		 1175 char byte;
1176 if (rlen > 0x1f)
1177 {
1178 output_R3_format (f, rtype, rlen);
1179 return;
1180 }
197865e8 1181
e0c9811a
JW		 1182 if (rtype == body)
1183 r = 1;
1184 else if (rtype != prologue)
1185 as_bad ("record type is not valid");
1186
800eeca4
JW		 1187 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1188 (*f) (1, &byte, NULL);
1189}
1190
1191static void
1192output_R2_format (f, mask, grsave, rlen)
1193 vbyte_func f;
1194 int mask, grsave;
1195 unsigned long rlen;
1196{
1197 char bytes[20];
1198 int count = 2;
1199 mask = (mask & 0x0f);
1200 grsave = (grsave & 0x7f);
1201
1202 bytes[0] = (UNW_R2 | (mask >> 1));
1203 bytes[1] = (((mask & 0x01) << 7) | grsave);
1204 count += output_leb128 (bytes + 2, rlen, 0);
1205 (*f) (count, bytes, NULL);
1206}
1207
1208static void
1209output_R3_format (f, rtype, rlen)
1210 vbyte_func f;
1211 unw_record_type rtype;
1212 unsigned long rlen;
1213{
e0c9811a 1214 int r = 0, count;
800eeca4
JW		 1215 char bytes[20];
1216 if (rlen <= 0x1f)
1217 {
1218 output_R1_format (f, rtype, rlen);
1219 return;
1220 }
197865e8 1221
e0c9811a
JW		 1222 if (rtype == body)
1223 r = 1;
1224 else if (rtype != prologue)
1225 as_bad ("record type is not valid");
800eeca4
JW		 1226 bytes[0] = (UNW_R3 | r);
1227 count = output_leb128 (bytes + 1, rlen, 0);
1228 (*f) (count + 1, bytes, NULL);
1229}
1230
1231static void
1232output_P1_format (f, brmask)
1233 vbyte_func f;
1234 int brmask;
1235{
1236 char byte;
1237 byte = UNW_P1 | (brmask & 0x1f);
1238 (*f) (1, &byte, NULL);
1239}
1240
1241static void
1242output_P2_format (f, brmask, gr)
1243 vbyte_func f;
1244 int brmask;
1245 int gr;
1246{
1247 char bytes[2];
1248 brmask = (brmask & 0x1f);
1249 bytes[0] = UNW_P2 | (brmask >> 1);
1250 bytes[1] = (((brmask & 1) << 7) | gr);
1251 (*f) (2, bytes, NULL);
1252}
1253
1254static void
1255output_P3_format (f, rtype, reg)
1256 vbyte_func f;
1257 unw_record_type rtype;
1258 int reg;
1259{
1260 char bytes[2];
e0c9811a 1261 int r = 0;
800eeca4
JW		 1262 reg = (reg & 0x7f);
1263 switch (rtype)
542d6675 1264 {
800eeca4
JW		 1265 case psp_gr:
1266 r = 0;
1267 break;
1268 case rp_gr:
1269 r = 1;
1270 break;
1271 case pfs_gr:
1272 r = 2;
1273 break;
1274 case preds_gr:
1275 r = 3;
1276 break;
1277 case unat_gr:
1278 r = 4;
1279 break;
1280 case lc_gr:
1281 r = 5;
1282 break;
1283 case rp_br:
1284 r = 6;
1285 break;
1286 case rnat_gr:
1287 r = 7;
1288 break;
1289 case bsp_gr:
1290 r = 8;
1291 break;
1292 case bspstore_gr:
1293 r = 9;
1294 break;
1295 case fpsr_gr:
1296 r = 10;
1297 break;
1298 case priunat_gr:
1299 r = 11;
1300 break;
1301 default:
1302 as_bad ("Invalid record type for P3 format.");
542d6675 1303 }
800eeca4
JW		 1304 bytes[0] = (UNW_P3 | (r >> 1));
1305 bytes[1] = (((r & 1) << 7) | reg);
1306 (*f) (2, bytes, NULL);
1307}
1308
800eeca4 1309static void
e0c9811a 1310output_P4_format (f, imask, imask_size)
800eeca4 1311 vbyte_func f;
e0c9811a
JW		 1312 unsigned char *imask;
1313 unsigned long imask_size;
800eeca4 1314{
e0c9811a
JW		 1315 imask[0] = UNW_P4;
1316 (*f) (imask_size, imask, NULL);
800eeca4
JW		 1317}
1318
1319static void
1320output_P5_format (f, grmask, frmask)
1321 vbyte_func f;
1322 int grmask;
1323 unsigned long frmask;
1324{
1325 char bytes[4];
1326 grmask = (grmask & 0x0f);
1327
1328 bytes[0] = UNW_P5;
1329 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1330 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1331 bytes[3] = (frmask & 0x000000ff);
1332 (*f) (4, bytes, NULL);
1333}
1334
1335static void
1336output_P6_format (f, rtype, rmask)
1337 vbyte_func f;
1338 unw_record_type rtype;
1339 int rmask;
1340{
1341 char byte;
e0c9811a 1342 int r = 0;
197865e8 1343
e0c9811a
JW		 1344 if (rtype == gr_mem)
1345 r = 1;
1346 else if (rtype != fr_mem)
1347 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1348 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1349 (*f) (1, &byte, NULL);
1350}
1351
1352static void
1353output_P7_format (f, rtype, w1, w2)
1354 vbyte_func f;
1355 unw_record_type rtype;
1356 unsigned long w1;
1357 unsigned long w2;
1358{
1359 char bytes[20];
1360 int count = 1;
e0c9811a 1361 int r = 0;
800eeca4
JW		 1362 count += output_leb128 (bytes + 1, w1, 0);
1363 switch (rtype)
1364 {
542d6675
KH		 1365 case mem_stack_f:
1366 r = 0;
1367 count += output_leb128 (bytes + count, w2 >> 4, 0);
1368 break;
1369 case mem_stack_v:
1370 r = 1;
1371 break;
1372 case spill_base:
1373 r = 2;
1374 break;
1375 case psp_sprel:
1376 r = 3;
1377 break;
1378 case rp_when:
1379 r = 4;
1380 break;
1381 case rp_psprel:
1382 r = 5;
1383 break;
1384 case pfs_when:
1385 r = 6;
1386 break;
1387 case pfs_psprel:
1388 r = 7;
1389 break;
1390 case preds_when:
1391 r = 8;
1392 break;
1393 case preds_psprel:
1394 r = 9;
1395 break;
1396 case lc_when:
1397 r = 10;
1398 break;
1399 case lc_psprel:
1400 r = 11;
1401 break;
1402 case unat_when:
1403 r = 12;
1404 break;
1405 case unat_psprel:
1406 r = 13;
1407 break;
1408 case fpsr_when:
1409 r = 14;
1410 break;
1411 case fpsr_psprel:
1412 r = 15;
1413 break;
1414 default:
1415 break;
800eeca4
JW		 1416 }
1417 bytes[0] = (UNW_P7 | r);
1418 (*f) (count, bytes, NULL);
1419}
1420
1421static void
1422output_P8_format (f, rtype, t)
1423 vbyte_func f;
1424 unw_record_type rtype;
1425 unsigned long t;
1426{
1427 char bytes[20];
e0c9811a 1428 int r = 0;
800eeca4
JW		 1429 int count = 2;
1430 bytes[0] = UNW_P8;
1431 switch (rtype)
1432 {
542d6675
KH		 1433 case rp_sprel:
1434 r = 1;
1435 break;
1436 case pfs_sprel:
1437 r = 2;
1438 break;
1439 case preds_sprel:
1440 r = 3;
1441 break;
1442 case lc_sprel:
1443 r = 4;
1444 break;
1445 case unat_sprel:
1446 r = 5;
1447 break;
1448 case fpsr_sprel:
1449 r = 6;
1450 break;
1451 case bsp_when:
1452 r = 7;
1453 break;
1454 case bsp_psprel:
1455 r = 8;
1456 break;
1457 case bsp_sprel:
1458 r = 9;
1459 break;
1460 case bspstore_when:
1461 r = 10;
1462 break;
1463 case bspstore_psprel:
1464 r = 11;
1465 break;
1466 case bspstore_sprel:
1467 r = 12;
1468 break;
1469 case rnat_when:
1470 r = 13;
1471 break;
1472 case rnat_psprel:
1473 r = 14;
1474 break;
1475 case rnat_sprel:
1476 r = 15;
1477 break;
1478 case priunat_when_gr:
1479 r = 16;
1480 break;
1481 case priunat_psprel:
1482 r = 17;
1483 break;
1484 case priunat_sprel:
1485 r = 18;
1486 break;
1487 case priunat_when_mem:
1488 r = 19;
1489 break;
1490 default:
1491 break;
800eeca4
JW		 1492 }
1493 bytes[1] = r;
1494 count += output_leb128 (bytes + 2, t, 0);
1495 (*f) (count, bytes, NULL);
1496}
1497
1498static void
1499output_P9_format (f, grmask, gr)
1500 vbyte_func f;
1501 int grmask;
1502 int gr;
1503{
1504 char bytes[3];
1505 bytes[0] = UNW_P9;
1506 bytes[1] = (grmask & 0x0f);
1507 bytes[2] = (gr & 0x7f);
1508 (*f) (3, bytes, NULL);
1509}
1510
1511static void
1512output_P10_format (f, abi, context)
1513 vbyte_func f;
1514 int abi;
1515 int context;
1516{
1517 char bytes[3];
1518 bytes[0] = UNW_P10;
1519 bytes[1] = (abi & 0xff);
1520 bytes[2] = (context & 0xff);
1521 (*f) (3, bytes, NULL);
1522}
1523
1524static void
1525output_B1_format (f, rtype, label)
1526 vbyte_func f;
1527 unw_record_type rtype;
1528 unsigned long label;
1529{
1530 char byte;
e0c9811a 1531 int r = 0;
197865e8 1532 if (label > 0x1f)
800eeca4
JW		 1533 {
1534 output_B4_format (f, rtype, label);
1535 return;
1536 }
e0c9811a
JW		 1537 if (rtype == copy_state)
1538 r = 1;
1539 else if (rtype != label_state)
1540 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1541
1542 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1543 (*f) (1, &byte, NULL);
1544}
1545
1546static void
1547output_B2_format (f, ecount, t)
1548 vbyte_func f;
1549 unsigned long ecount;
1550 unsigned long t;
1551{
1552 char bytes[20];
1553 int count = 1;
1554 if (ecount > 0x1f)
1555 {
1556 output_B3_format (f, ecount, t);
1557 return;
1558 }
1559 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1560 count += output_leb128 (bytes + 1, t, 0);
1561 (*f) (count, bytes, NULL);
1562}
1563
1564static void
1565output_B3_format (f, ecount, t)
1566 vbyte_func f;
1567 unsigned long ecount;
1568 unsigned long t;
1569{
1570 char bytes[20];
1571 int count = 1;
1572 if (ecount <= 0x1f)
1573 {
1574 output_B2_format (f, ecount, t);
1575 return;
1576 }
1577 bytes[0] = UNW_B3;
1578 count += output_leb128 (bytes + 1, t, 0);
1579 count += output_leb128 (bytes + count, ecount, 0);
1580 (*f) (count, bytes, NULL);
1581}
1582
1583static void
1584output_B4_format (f, rtype, label)
1585 vbyte_func f;
1586 unw_record_type rtype;
1587 unsigned long label;
1588{
1589 char bytes[20];
e0c9811a 1590 int r = 0;
800eeca4 1591 int count = 1;
197865e8 1592 if (label <= 0x1f)
800eeca4
JW		 1593 {
1594 output_B1_format (f, rtype, label);
1595 return;
1596 }
197865e8 1597
e0c9811a
JW		 1598 if (rtype == copy_state)
1599 r = 1;
1600 else if (rtype != label_state)
1601 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1602
1603 bytes[0] = (UNW_B4 | (r << 3));
1604 count += output_leb128 (bytes + 1, label, 0);
1605 (*f) (count, bytes, NULL);
1606}
1607
1608static char
e0c9811a 1609format_ab_reg (ab, reg)
542d6675
KH		 1610 int ab;
1611 int reg;
800eeca4
JW		 1612{
1613 int ret;
e0c9811a 1614 ab = (ab & 3);
800eeca4 1615 reg = (reg & 0x1f);
e0c9811a 1616 ret = (ab << 5) | reg;
800eeca4
JW		 1617 return ret;
1618}
1619
1620static void
e0c9811a 1621output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1622 vbyte_func f;
1623 unw_record_type rtype;
e0c9811a 1624 int ab, reg;
800eeca4
JW		 1625 unsigned long t;
1626 unsigned long w1;
1627{
1628 char bytes[20];
e0c9811a 1629 int r = 0;
800eeca4
JW		 1630 int count = 2;
1631 bytes[0] = UNW_X1;
197865e8 1632
e0c9811a
JW		 1633 if (rtype == spill_sprel)
1634 r = 1;
1635 else if (rtype != spill_psprel)
1636 as_bad ("Invalid record type for format X1");
1637 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1638 count += output_leb128 (bytes + 2, t, 0);
1639 count += output_leb128 (bytes + count, w1, 0);
1640 (*f) (count, bytes, NULL);
1641}
1642
1643static void
e0c9811a 1644output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1645 vbyte_func f;
e0c9811a 1646 int ab, reg;
800eeca4
JW		 1647 int x, y, treg;
1648 unsigned long t;
1649{
1650 char bytes[20];
800eeca4
JW		 1651 int count = 3;
1652 bytes[0] = UNW_X2;
e0c9811a 1653 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1654 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1655 count += output_leb128 (bytes + 3, t, 0);
1656 (*f) (count, bytes, NULL);
1657}
1658
1659static void
e0c9811a 1660output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1661 vbyte_func f;
1662 unw_record_type rtype;
1663 int qp;
e0c9811a 1664 int ab, reg;
800eeca4
JW		 1665 unsigned long t;
1666 unsigned long w1;
1667{
1668 char bytes[20];
e0c9811a 1669 int r = 0;
800eeca4 1670 int count = 3;
e0c9811a
JW		 1671 bytes[0] = UNW_X3;
1672
1673 if (rtype == spill_sprel_p)
1674 r = 1;
1675 else if (rtype != spill_psprel_p)
1676 as_bad ("Invalid record type for format X3");
800eeca4 1677 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1678 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1679 count += output_leb128 (bytes + 3, t, 0);
1680 count += output_leb128 (bytes + count, w1, 0);
1681 (*f) (count, bytes, NULL);
1682}
1683
1684static void
e0c9811a 1685output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1686 vbyte_func f;
1687 int qp;
e0c9811a 1688 int ab, reg;
800eeca4
JW		 1689 int x, y, treg;
1690 unsigned long t;
1691{
1692 char bytes[20];
800eeca4 1693 int count = 4;
e0c9811a 1694 bytes[0] = UNW_X4;
800eeca4 1695 bytes[1] = (qp & 0x3f);
e0c9811a 1696 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1697 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1698 count += output_leb128 (bytes + 4, t, 0);
1699 (*f) (count, bytes, NULL);
1700}
1701
1702/* This function allocates a record list structure, and initializes fields. */
542d6675 1703
800eeca4 1704static unw_rec_list *
197865e8 1705alloc_record (unw_record_type t)
800eeca4
JW		 1706{
1707 unw_rec_list *ptr;
1708 ptr = xmalloc (sizeof (*ptr));
1709 ptr->next = NULL;
1710 ptr->slot_number = SLOT_NUM_NOT_SET;
1711 ptr->r.type = t;
73f20958
L		 1712 ptr->next_slot_number = 0;
1713 ptr->next_slot_frag = 0;
800eeca4
JW		 1714 return ptr;
1715}
1716
5738bc24
JW		 1717/* Dummy unwind record used for calculating the length of the last prologue or
1718 body region. */
1719
1720static unw_rec_list *
1721output_endp ()
1722{
1723 unw_rec_list *ptr = alloc_record (endp);
1724 return ptr;
1725}
1726
800eeca4
JW		 1727static unw_rec_list *
1728output_prologue ()
1729{
1730 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1731 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1732 return ptr;
1733}
1734
1735static unw_rec_list *
1736output_prologue_gr (saved_mask, reg)
1737 unsigned int saved_mask;
1738 unsigned int reg;
1739{
1740 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1741 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1742 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1743 ptr->r.record.r.grsave = reg;
1744 return ptr;
1745}
1746
1747static unw_rec_list *
1748output_body ()
1749{
1750 unw_rec_list *ptr = alloc_record (body);
1751 return ptr;
1752}
1753
1754static unw_rec_list *
1755output_mem_stack_f (size)
1756 unsigned int size;
1757{
1758 unw_rec_list *ptr = alloc_record (mem_stack_f);
1759 ptr->r.record.p.size = size;
1760 return ptr;
1761}
1762
1763static unw_rec_list *
1764output_mem_stack_v ()
1765{
1766 unw_rec_list *ptr = alloc_record (mem_stack_v);
1767 return ptr;
1768}
1769
1770static unw_rec_list *
1771output_psp_gr (gr)
1772 unsigned int gr;
1773{
1774 unw_rec_list *ptr = alloc_record (psp_gr);
1775 ptr->r.record.p.gr = gr;
1776 return ptr;
1777}
1778
1779static unw_rec_list *
1780output_psp_sprel (offset)
1781 unsigned int offset;
1782{
1783 unw_rec_list *ptr = alloc_record (psp_sprel);
542d6675 1784 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1785 return ptr;
1786}
1787
1788static unw_rec_list *
1789output_rp_when ()
1790{
1791 unw_rec_list *ptr = alloc_record (rp_when);
1792 return ptr;
1793}
1794
1795static unw_rec_list *
1796output_rp_gr (gr)
1797 unsigned int gr;
1798{
1799 unw_rec_list *ptr = alloc_record (rp_gr);
1800 ptr->r.record.p.gr = gr;
1801 return ptr;
1802}
1803
1804static unw_rec_list *
1805output_rp_br (br)
1806 unsigned int br;
1807{
1808 unw_rec_list *ptr = alloc_record (rp_br);
1809 ptr->r.record.p.br = br;
1810 return ptr;
1811}
1812
1813static unw_rec_list *
1814output_rp_psprel (offset)
1815 unsigned int offset;
1816{
1817 unw_rec_list *ptr = alloc_record (rp_psprel);
542d6675 1818 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 1819 return ptr;
1820}
1821
1822static unw_rec_list *
1823output_rp_sprel (offset)
1824 unsigned int offset;
1825{
1826 unw_rec_list *ptr = alloc_record (rp_sprel);
542d6675 1827 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1828 return ptr;
1829}
1830
1831static unw_rec_list *
1832output_pfs_when ()
1833{
1834 unw_rec_list *ptr = alloc_record (pfs_when);
1835 return ptr;
1836}
1837
1838static unw_rec_list *
1839output_pfs_gr (gr)
1840 unsigned int gr;
1841{
1842 unw_rec_list *ptr = alloc_record (pfs_gr);
1843 ptr->r.record.p.gr = gr;
1844 return ptr;
1845}
1846
1847static unw_rec_list *
1848output_pfs_psprel (offset)
1849 unsigned int offset;
1850{
1851 unw_rec_list *ptr = alloc_record (pfs_psprel);
542d6675 1852 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 1853 return ptr;
1854}
1855
1856static unw_rec_list *
1857output_pfs_sprel (offset)
1858 unsigned int offset;
1859{
1860 unw_rec_list *ptr = alloc_record (pfs_sprel);
542d6675 1861 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1862 return ptr;
1863}
1864
1865static unw_rec_list *
1866output_preds_when ()
1867{
1868 unw_rec_list *ptr = alloc_record (preds_when);
1869 return ptr;
1870}
1871
1872static unw_rec_list *
1873output_preds_gr (gr)
1874 unsigned int gr;
1875{
1876 unw_rec_list *ptr = alloc_record (preds_gr);
1877 ptr->r.record.p.gr = gr;
1878 return ptr;
1879}
1880
1881static unw_rec_list *
1882output_preds_psprel (offset)
1883 unsigned int offset;
1884{
1885 unw_rec_list *ptr = alloc_record (preds_psprel);
542d6675 1886 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 1887 return ptr;
1888}
1889
1890static unw_rec_list *
1891output_preds_sprel (offset)
1892 unsigned int offset;
1893{
1894 unw_rec_list *ptr = alloc_record (preds_sprel);
542d6675 1895 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1896 return ptr;
1897}
1898
1899static unw_rec_list *
1900output_fr_mem (mask)
1901 unsigned int mask;
1902{
1903 unw_rec_list *ptr = alloc_record (fr_mem);
1904 ptr->r.record.p.rmask = mask;
1905 return ptr;
1906}
1907
1908static unw_rec_list *
1909output_frgr_mem (gr_mask, fr_mask)
1910 unsigned int gr_mask;
1911 unsigned int fr_mask;
1912{
1913 unw_rec_list *ptr = alloc_record (frgr_mem);
1914 ptr->r.record.p.grmask = gr_mask;
1915 ptr->r.record.p.frmask = fr_mask;
1916 return ptr;
1917}
1918
1919static unw_rec_list *
1920output_gr_gr (mask, reg)
1921 unsigned int mask;
1922 unsigned int reg;
1923{
1924 unw_rec_list *ptr = alloc_record (gr_gr);
1925 ptr->r.record.p.grmask = mask;
1926 ptr->r.record.p.gr = reg;
1927 return ptr;
1928}
1929
1930static unw_rec_list *
1931output_gr_mem (mask)
1932 unsigned int mask;
1933{
1934 unw_rec_list *ptr = alloc_record (gr_mem);
1935 ptr->r.record.p.rmask = mask;
1936 return ptr;
1937}
1938
1939static unw_rec_list *
1940output_br_mem (unsigned int mask)
1941{
1942 unw_rec_list *ptr = alloc_record (br_mem);
1943 ptr->r.record.p.brmask = mask;
1944 return ptr;
1945}
1946
1947static unw_rec_list *
1948output_br_gr (save_mask, reg)
1949 unsigned int save_mask;
1950 unsigned int reg;
1951{
1952 unw_rec_list *ptr = alloc_record (br_gr);
1953 ptr->r.record.p.brmask = save_mask;
1954 ptr->r.record.p.gr = reg;
1955 return ptr;
1956}
1957
1958static unw_rec_list *
1959output_spill_base (offset)
1960 unsigned int offset;
1961{
1962 unw_rec_list *ptr = alloc_record (spill_base);
542d6675 1963 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 1964 return ptr;
1965}
1966
1967static unw_rec_list *
1968output_unat_when ()
1969{
1970 unw_rec_list *ptr = alloc_record (unat_when);
1971 return ptr;
1972}
1973
1974static unw_rec_list *
1975output_unat_gr (gr)
1976 unsigned int gr;
1977{
1978 unw_rec_list *ptr = alloc_record (unat_gr);
1979 ptr->r.record.p.gr = gr;
1980 return ptr;
1981}
1982
1983static unw_rec_list *
1984output_unat_psprel (offset)
1985 unsigned int offset;
1986{
1987 unw_rec_list *ptr = alloc_record (unat_psprel);
542d6675 1988 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 1989 return ptr;
1990}
1991
1992static unw_rec_list *
1993output_unat_sprel (offset)
1994 unsigned int offset;
1995{
1996 unw_rec_list *ptr = alloc_record (unat_sprel);
542d6675 1997 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1998 return ptr;
1999}
2000
2001static unw_rec_list *
2002output_lc_when ()
2003{
2004 unw_rec_list *ptr = alloc_record (lc_when);
2005 return ptr;
2006}
2007
2008static unw_rec_list *
2009output_lc_gr (gr)
2010 unsigned int gr;
2011{
2012 unw_rec_list *ptr = alloc_record (lc_gr);
2013 ptr->r.record.p.gr = gr;
2014 return ptr;
2015}
2016
2017static unw_rec_list *
2018output_lc_psprel (offset)
2019 unsigned int offset;
2020{
2021 unw_rec_list *ptr = alloc_record (lc_psprel);
542d6675 2022 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 2023 return ptr;
2024}
2025
2026static unw_rec_list *
2027output_lc_sprel (offset)
2028 unsigned int offset;
2029{
2030 unw_rec_list *ptr = alloc_record (lc_sprel);
542d6675 2031 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2032 return ptr;
2033}
2034
2035static unw_rec_list *
2036output_fpsr_when ()
2037{
2038 unw_rec_list *ptr = alloc_record (fpsr_when);
2039 return ptr;
2040}
2041
2042static unw_rec_list *
2043output_fpsr_gr (gr)
2044 unsigned int gr;
2045{
2046 unw_rec_list *ptr = alloc_record (fpsr_gr);
2047 ptr->r.record.p.gr = gr;
2048 return ptr;
2049}
2050
2051static unw_rec_list *
2052output_fpsr_psprel (offset)
2053 unsigned int offset;
2054{
2055 unw_rec_list *ptr = alloc_record (fpsr_psprel);
542d6675 2056 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 2057 return ptr;
2058}
2059
2060static unw_rec_list *
2061output_fpsr_sprel (offset)
2062 unsigned int offset;
2063{
2064 unw_rec_list *ptr = alloc_record (fpsr_sprel);
542d6675 2065 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2066 return ptr;
2067}
2068
2069static unw_rec_list *
2070output_priunat_when_gr ()
2071{
2072 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2073 return ptr;
2074}
2075
2076static unw_rec_list *
2077output_priunat_when_mem ()
2078{
2079 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2080 return ptr;
2081}
2082
2083static unw_rec_list *
2084output_priunat_gr (gr)
2085 unsigned int gr;
2086{
2087 unw_rec_list *ptr = alloc_record (priunat_gr);
2088 ptr->r.record.p.gr = gr;
2089 return ptr;
2090}
2091
2092static unw_rec_list *
2093output_priunat_psprel (offset)
2094 unsigned int offset;
2095{
2096 unw_rec_list *ptr = alloc_record (priunat_psprel);
542d6675 2097 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 2098 return ptr;
2099}
2100
2101static unw_rec_list *
2102output_priunat_sprel (offset)
2103 unsigned int offset;
2104{
2105 unw_rec_list *ptr = alloc_record (priunat_sprel);
542d6675 2106 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2107 return ptr;
2108}
2109
2110static unw_rec_list *
2111output_bsp_when ()
2112{
2113 unw_rec_list *ptr = alloc_record (bsp_when);
2114 return ptr;
2115}
2116
2117static unw_rec_list *
2118output_bsp_gr (gr)
2119 unsigned int gr;
2120{
2121 unw_rec_list *ptr = alloc_record (bsp_gr);
2122 ptr->r.record.p.gr = gr;
2123 return ptr;
2124}
2125
2126static unw_rec_list *
2127output_bsp_psprel (offset)
2128 unsigned int offset;
2129{
2130 unw_rec_list *ptr = alloc_record (bsp_psprel);
542d6675 2131 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 2132 return ptr;
2133}
2134
2135static unw_rec_list *
2136output_bsp_sprel (offset)
2137 unsigned int offset;
2138{
2139 unw_rec_list *ptr = alloc_record (bsp_sprel);
542d6675 2140 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2141 return ptr;
2142}
2143
2144static unw_rec_list *
2145output_bspstore_when ()
2146{
2147 unw_rec_list *ptr = alloc_record (bspstore_when);
2148 return ptr;
2149}
2150
2151static unw_rec_list *
2152output_bspstore_gr (gr)
2153 unsigned int gr;
2154{
2155 unw_rec_list *ptr = alloc_record (bspstore_gr);
2156 ptr->r.record.p.gr = gr;
2157 return ptr;
2158}
2159
2160static unw_rec_list *
2161output_bspstore_psprel (offset)
2162 unsigned int offset;
2163{
2164 unw_rec_list *ptr = alloc_record (bspstore_psprel);
542d6675 2165 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 2166 return ptr;
2167}
2168
2169static unw_rec_list *
2170output_bspstore_sprel (offset)
2171 unsigned int offset;
2172{
2173 unw_rec_list *ptr = alloc_record (bspstore_sprel);
542d6675 2174 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2175 return ptr;
2176}
2177
2178static unw_rec_list *
2179output_rnat_when ()
2180{
2181 unw_rec_list *ptr = alloc_record (rnat_when);
2182 return ptr;
2183}
2184
2185static unw_rec_list *
2186output_rnat_gr (gr)
2187 unsigned int gr;
2188{
2189 unw_rec_list *ptr = alloc_record (rnat_gr);
2190 ptr->r.record.p.gr = gr;
2191 return ptr;
2192}
2193
2194static unw_rec_list *
2195output_rnat_psprel (offset)
2196 unsigned int offset;
2197{
2198 unw_rec_list *ptr = alloc_record (rnat_psprel);
542d6675 2199 ptr->r.record.p.pspoff = offset / 4;
800eeca4
JW		 2200 return ptr;
2201}
2202
2203static unw_rec_list *
2204output_rnat_sprel (offset)
2205 unsigned int offset;
2206{
2207 unw_rec_list *ptr = alloc_record (rnat_sprel);
542d6675 2208 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2209 return ptr;
2210}
2211
2212static unw_rec_list *
e0c9811a
JW		 2213output_unwabi (abi, context)
2214 unsigned long abi;
2215 unsigned long context;
800eeca4 2216{
e0c9811a
JW		 2217 unw_rec_list *ptr = alloc_record (unwabi);
2218 ptr->r.record.p.abi = abi;
2219 ptr->r.record.p.context = context;
800eeca4
JW		 2220 return ptr;
2221}
2222
2223static unw_rec_list *
e0c9811a 2224output_epilogue (unsigned long ecount)
800eeca4 2225{
e0c9811a
JW		 2226 unw_rec_list *ptr = alloc_record (epilogue);
2227 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2228 return ptr;
2229}
2230
2231static unw_rec_list *
e0c9811a 2232output_label_state (unsigned long label)
800eeca4 2233{
e0c9811a
JW		 2234 unw_rec_list *ptr = alloc_record (label_state);
2235 ptr->r.record.b.label = label;
800eeca4
JW		 2236 return ptr;
2237}
2238
2239static unw_rec_list *
e0c9811a
JW		 2240output_copy_state (unsigned long label)
2241{
2242 unw_rec_list *ptr = alloc_record (copy_state);
2243 ptr->r.record.b.label = label;
2244 return ptr;
2245}
2246
2247static unw_rec_list *
2248output_spill_psprel (ab, reg, offset)
2249 unsigned int ab;
800eeca4
JW		 2250 unsigned int reg;
2251 unsigned int offset;
2252{
2253 unw_rec_list *ptr = alloc_record (spill_psprel);
e0c9811a 2254 ptr->r.record.x.ab = ab;
800eeca4 2255 ptr->r.record.x.reg = reg;
542d6675 2256 ptr->r.record.x.pspoff = offset / 4;
800eeca4
JW		 2257 return ptr;
2258}
2259
2260static unw_rec_list *
e0c9811a
JW		 2261output_spill_sprel (ab, reg, offset)
2262 unsigned int ab;
800eeca4
JW		 2263 unsigned int reg;
2264 unsigned int offset;
2265{
2266 unw_rec_list *ptr = alloc_record (spill_sprel);
e0c9811a 2267 ptr->r.record.x.ab = ab;
800eeca4 2268 ptr->r.record.x.reg = reg;
542d6675 2269 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2270 return ptr;
2271}
2272
2273static unw_rec_list *
e0c9811a
JW		 2274output_spill_psprel_p (ab, reg, offset, predicate)
2275 unsigned int ab;
800eeca4
JW		 2276 unsigned int reg;
2277 unsigned int offset;
2278 unsigned int predicate;
2279{
2280 unw_rec_list *ptr = alloc_record (spill_psprel_p);
e0c9811a 2281 ptr->r.record.x.ab = ab;
800eeca4 2282 ptr->r.record.x.reg = reg;
542d6675 2283 ptr->r.record.x.pspoff = offset / 4;
800eeca4
JW		 2284 ptr->r.record.x.qp = predicate;
2285 return ptr;
2286}
2287
2288static unw_rec_list *
e0c9811a
JW		 2289output_spill_sprel_p (ab, reg, offset, predicate)
2290 unsigned int ab;
800eeca4
JW		 2291 unsigned int reg;
2292 unsigned int offset;
2293 unsigned int predicate;
2294{
2295 unw_rec_list *ptr = alloc_record (spill_sprel_p);
e0c9811a 2296 ptr->r.record.x.ab = ab;
800eeca4 2297 ptr->r.record.x.reg = reg;
542d6675 2298 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2299 ptr->r.record.x.qp = predicate;
2300 return ptr;
2301}
2302
2303static unw_rec_list *
e0c9811a
JW		 2304output_spill_reg (ab, reg, targ_reg, xy)
2305 unsigned int ab;
800eeca4
JW		 2306 unsigned int reg;
2307 unsigned int targ_reg;
2308 unsigned int xy;
2309{
2310 unw_rec_list *ptr = alloc_record (spill_reg);
e0c9811a 2311 ptr->r.record.x.ab = ab;
800eeca4
JW		 2312 ptr->r.record.x.reg = reg;
2313 ptr->r.record.x.treg = targ_reg;
2314 ptr->r.record.x.xy = xy;
2315 return ptr;
2316}
2317
2318static unw_rec_list *
e0c9811a
JW		 2319output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2320 unsigned int ab;
800eeca4
JW		 2321 unsigned int reg;
2322 unsigned int targ_reg;
2323 unsigned int xy;
2324 unsigned int predicate;
2325{
2326 unw_rec_list *ptr = alloc_record (spill_reg_p);
e0c9811a 2327 ptr->r.record.x.ab = ab;
800eeca4
JW		 2328 ptr->r.record.x.reg = reg;
2329 ptr->r.record.x.treg = targ_reg;
2330 ptr->r.record.x.xy = xy;
2331 ptr->r.record.x.qp = predicate;
2332 return ptr;
2333}
2334
197865e8 2335/* Given a unw_rec_list process the correct format with the
800eeca4 2336 specified function. */
542d6675 2337
800eeca4
JW		 2338static void
2339process_one_record (ptr, f)
2340 unw_rec_list *ptr;
2341 vbyte_func f;
2342{
e0c9811a
JW		 2343 unsigned long fr_mask, gr_mask;
2344
197865e8 2345 switch (ptr->r.type)
800eeca4 2346 {
5738bc24
JW		 2347 /* This is a dummy record that takes up no space in the output. */
2348 case endp:
2349 break;
2350
542d6675
KH		 2351 case gr_mem:
2352 case fr_mem:
2353 case br_mem:
2354 case frgr_mem:
2355 /* These are taken care of by prologue/prologue_gr. */
2356 break;
e0c9811a 2357
542d6675
KH		 2358 case prologue_gr:
2359 case prologue:
2360 if (ptr->r.type == prologue_gr)
2361 output_R2_format (f, ptr->r.record.r.grmask,
2362 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2363 else
800eeca4 2364 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2365
2366 /* Output descriptor(s) for union of register spills (if any). */
2367 gr_mask = ptr->r.record.r.mask.gr_mem;
2368 fr_mask = ptr->r.record.r.mask.fr_mem;
2369 if (fr_mask)
2370 {
2371 if ((fr_mask & ~0xfUL) == 0)
2372 output_P6_format (f, fr_mem, fr_mask);
2373 else
2374 {
2375 output_P5_format (f, gr_mask, fr_mask);
2376 gr_mask = 0;
2377 }
2378 }
2379 if (gr_mask)
2380 output_P6_format (f, gr_mem, gr_mask);
2381 if (ptr->r.record.r.mask.br_mem)
2382 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2383
2384 /* output imask descriptor if necessary: */
2385 if (ptr->r.record.r.mask.i)
2386 output_P4_format (f, ptr->r.record.r.mask.i,
2387 ptr->r.record.r.imask_size);
2388 break;
2389
2390 case body:
2391 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2392 break;
2393 case mem_stack_f:
2394 case mem_stack_v:
2395 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2396 ptr->r.record.p.size);
2397 break;
2398 case psp_gr:
2399 case rp_gr:
2400 case pfs_gr:
2401 case preds_gr:
2402 case unat_gr:
2403 case lc_gr:
2404 case fpsr_gr:
2405 case priunat_gr:
2406 case bsp_gr:
2407 case bspstore_gr:
2408 case rnat_gr:
2409 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2410 break;
2411 case rp_br:
2412 output_P3_format (f, rp_br, ptr->r.record.p.br);
2413 break;
2414 case psp_sprel:
2415 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2416 break;
2417 case rp_when:
2418 case pfs_when:
2419 case preds_when:
2420 case unat_when:
2421 case lc_when:
2422 case fpsr_when:
2423 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2424 break;
2425 case rp_psprel:
2426 case pfs_psprel:
2427 case preds_psprel:
2428 case unat_psprel:
2429 case lc_psprel:
2430 case fpsr_psprel:
2431 case spill_base:
2432 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2433 break;
2434 case rp_sprel:
2435 case pfs_sprel:
2436 case preds_sprel:
2437 case unat_sprel:
2438 case lc_sprel:
2439 case fpsr_sprel:
2440 case priunat_sprel:
2441 case bsp_sprel:
2442 case bspstore_sprel:
2443 case rnat_sprel:
2444 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2445 break;
2446 case gr_gr:
2447 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2448 break;
2449 case br_gr:
2450 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2451 break;
2452 case spill_mask:
2453 as_bad ("spill_mask record unimplemented.");
2454 break;
2455 case priunat_when_gr:
2456 case priunat_when_mem:
2457 case bsp_when:
2458 case bspstore_when:
2459 case rnat_when:
2460 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2461 break;
2462 case priunat_psprel:
2463 case bsp_psprel:
2464 case bspstore_psprel:
2465 case rnat_psprel:
2466 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2467 break;
2468 case unwabi:
2469 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2470 break;
2471 case epilogue:
2472 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2473 break;
2474 case label_state:
2475 case copy_state:
2476 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2477 break;
2478 case spill_psprel:
2479 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2480 ptr->r.record.x.reg, ptr->r.record.x.t,
2481 ptr->r.record.x.pspoff);
2482 break;
2483 case spill_sprel:
2484 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2485 ptr->r.record.x.reg, ptr->r.record.x.t,
2486 ptr->r.record.x.spoff);
2487 break;
2488 case spill_reg:
2489 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2490 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2491 ptr->r.record.x.treg, ptr->r.record.x.t);
2492 break;
2493 case spill_psprel_p:
2494 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2495 ptr->r.record.x.ab, ptr->r.record.x.reg,
2496 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2497 break;
2498 case spill_sprel_p:
2499 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2500 ptr->r.record.x.ab, ptr->r.record.x.reg,
2501 ptr->r.record.x.t, ptr->r.record.x.spoff);
2502 break;
2503 case spill_reg_p:
2504 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2505 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2506 ptr->r.record.x.xy, ptr->r.record.x.treg,
2507 ptr->r.record.x.t);
2508 break;
2509 default:
2510 as_bad ("record_type_not_valid");
2511 break;
800eeca4
JW		 2512 }
2513}
2514
197865e8 2515/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2516 the specified function. */
2517static void
2518process_unw_records (list, f)
2519 unw_rec_list *list;
2520 vbyte_func f;
2521{
2522 unw_rec_list *ptr;
2523 for (ptr = list; ptr; ptr = ptr->next)
2524 process_one_record (ptr, f);
2525}
2526
2527/* Determine the size of a record list in bytes. */
2528static int
2529calc_record_size (list)
2530 unw_rec_list *list;
2531{
2532 vbyte_count = 0;
2533 process_unw_records (list, count_output);
2534 return vbyte_count;
2535}
2536
e0c9811a
JW		 2537/* Update IMASK bitmask to reflect the fact that one or more registers
2538 of type TYPE are saved starting at instruction with index T. If N
2539 bits are set in REGMASK, it is assumed that instructions T through
2540 T+N-1 save these registers.
2541
2542 TYPE values:
2543 0: no save
2544 1: instruction saves next fp reg
2545 2: instruction saves next general reg
2546 3: instruction saves next branch reg */
2547static void
2548set_imask (region, regmask, t, type)
2549 unw_rec_list *region;
2550 unsigned long regmask;
2551 unsigned long t;
2552 unsigned int type;
2553{
2554 unsigned char *imask;
2555 unsigned long imask_size;
2556 unsigned int i;
2557 int pos;
2558
2559 imask = region->r.record.r.mask.i;
2560 imask_size = region->r.record.r.imask_size;
2561 if (!imask)
2562 {
542d6675 2563 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2564 imask = xmalloc (imask_size);
2565 memset (imask, 0, imask_size);
2566
2567 region->r.record.r.imask_size = imask_size;
2568 region->r.record.r.mask.i = imask;
2569 }
2570
542d6675
KH		 2571 i = (t / 4) + 1;
2572 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2573 while (regmask)
2574 {
2575 if (i >= imask_size)
2576 {
2577 as_bad ("Ignoring attempt to spill beyond end of region");
2578 return;
2579 }
2580
2581 imask[i] |= (type & 0x3) << pos;
197865e8 2582
e0c9811a
JW		 2583 regmask &= (regmask - 1);
2584 pos -= 2;
2585 if (pos < 0)
2586 {
2587 pos = 0;
2588 ++i;
2589 }
2590 }
2591}
2592
f5a30c2e
JW		 2593/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2594 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2595 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2596 for frag sizes. */
f5a30c2e 2597
e0c9811a 2598unsigned long
b5e0fabd 2599slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2600 unsigned long slot_addr;
2601 fragS *slot_frag;
2602 unsigned long first_addr;
2603 fragS *first_frag;
b5e0fabd 2604 int before_relax;
e0c9811a 2605{
f5a30c2e
JW		 2606 unsigned long index = 0;
2607
2608 /* First time we are called, the initial address and frag are invalid. */
2609 if (first_addr == 0)
2610 return 0;
2611
2612 /* If the two addresses are in different frags, then we need to add in
2613 the remaining size of this frag, and then the entire size of intermediate
2614 frags. */
2615 while (slot_frag != first_frag)
2616 {
2617 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2618
b5e0fabd 2619 if (! before_relax)
73f20958 2620 {
b5e0fabd
JW		 2621 /* We can get the final addresses only during and after
2622 relaxation. */
73f20958
L		 2623 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2624 index += 3 * ((first_frag->fr_next->fr_address
2625 - first_frag->fr_address
2626 - first_frag->fr_fix) >> 4);
2627 }
2628 else
2629 /* We don't know what the final addresses will be. We try our
2630 best to estimate. */
2631 switch (first_frag->fr_type)
2632 {
2633 default:
2634 break;
2635
2636 case rs_space:
2637 as_fatal ("only constant space allocation is supported");
2638 break;
2639
2640 case rs_align:
2641 case rs_align_code:
2642 case rs_align_test:
2643 /* Take alignment into account. Assume the worst case
2644 before relaxation. */
2645 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2646 break;
2647
2648 case rs_org:
2649 if (first_frag->fr_symbol)
2650 {
2651 as_fatal ("only constant offsets are supported");
2652 break;
2653 }
2654 case rs_fill:
2655 index += 3 * (first_frag->fr_offset >> 4);
2656 break;
2657 }
2658
f5a30c2e
JW		 2659 /* Add in the full size of the frag converted to instruction slots. */
2660 index += 3 * (first_frag->fr_fix >> 4);
2661 /* Subtract away the initial part before first_addr. */
2662 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2663 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2664
f5a30c2e
JW		 2665 /* Move to the beginning of the next frag. */
2666 first_frag = first_frag->fr_next;
2667 first_addr = (unsigned long) &first_frag->fr_literal;
2668 }
2669
2670 /* Add in the used part of the last frag. */
2671 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2672 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2673 return index;
2674}
4a1805b1 2675
91a2ae2a
RH		 2676/* Optimize unwind record directives. */
2677
2678static unw_rec_list *
2679optimize_unw_records (list)
2680 unw_rec_list *list;
2681{
2682 if (!list)
2683 return NULL;
2684
2685 /* If the only unwind record is ".prologue" or ".prologue" followed
2686 by ".body", then we can optimize the unwind directives away. */
2687 if (list->r.type == prologue
5738bc24
JW		 2688 && (list->next->r.type == endp
2689 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2690 return NULL;
2691
2692 return list;
2693}
2694
800eeca4
JW		 2695/* Given a complete record list, process any records which have
2696 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2697 this has been run, all necessary information should be available
800eeca4 2698 within each record to generate an image. */
542d6675 2699
800eeca4 2700static void
b5e0fabd 2701fixup_unw_records (list, before_relax)
800eeca4 2702 unw_rec_list *list;
b5e0fabd 2703 int before_relax;
800eeca4 2704{
e0c9811a
JW		 2705 unw_rec_list *ptr, *region = 0;
2706 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2707 fragS *first_frag = 0;
e0c9811a 2708
800eeca4
JW		 2709 for (ptr = list; ptr; ptr = ptr->next)
2710 {
2711 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2712 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2713 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2714 first_addr, first_frag, before_relax);
800eeca4
JW		 2715 switch (ptr->r.type)
2716 {
542d6675
KH		 2717 case prologue:
2718 case prologue_gr:
2719 case body:
2720 {
2721 unw_rec_list *last;
5738bc24
JW		 2722 int size;
2723 unsigned long last_addr = 0;
2724 fragS *last_frag = NULL;
542d6675
KH		 2725
2726 first_addr = ptr->slot_number;
f5a30c2e 2727 first_frag = ptr->slot_frag;
542d6675 2728 /* Find either the next body/prologue start, or the end of
5738bc24 2729 the function, and determine the size of the region. */
542d6675
KH		 2730 for (last = ptr->next; last != NULL; last = last->next)
2731 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2732 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2733 {
2734 last_addr = last->slot_number;
f5a30c2e 2735 last_frag = last->slot_frag;
542d6675
KH		 2736 break;
2737 }
b5e0fabd
JW		 2738 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2739 before_relax);
542d6675 2740 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2741 if (ptr->r.type == body)
2742 /* End of region. */
2743 region = 0;
2744 else
2745 region = ptr;
e0c9811a 2746 break;
542d6675
KH		 2747 }
2748 case epilogue:
2749 ptr->r.record.b.t = rlen - 1 - t;
2750 break;
e0c9811a 2751
542d6675
KH		 2752 case mem_stack_f:
2753 case mem_stack_v:
2754 case rp_when:
2755 case pfs_when:
2756 case preds_when:
2757 case unat_when:
2758 case lc_when:
2759 case fpsr_when:
2760 case priunat_when_gr:
2761 case priunat_when_mem:
2762 case bsp_when:
2763 case bspstore_when:
2764 case rnat_when:
2765 ptr->r.record.p.t = t;
2766 break;
e0c9811a 2767
542d6675
KH		 2768 case spill_reg:
2769 case spill_sprel:
2770 case spill_psprel:
2771 case spill_reg_p:
2772 case spill_sprel_p:
2773 case spill_psprel_p:
2774 ptr->r.record.x.t = t;
2775 break;
e0c9811a 2776
542d6675
KH		 2777 case frgr_mem:
2778 if (!region)
2779 {
2780 as_bad ("frgr_mem record before region record!\n");
2781 return;
2782 }
2783 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2784 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2785 set_imask (region, ptr->r.record.p.frmask, t, 1);
2786 set_imask (region, ptr->r.record.p.grmask, t, 2);
2787 break;
2788 case fr_mem:
2789 if (!region)
2790 {
2791 as_bad ("fr_mem record before region record!\n");
2792 return;
2793 }
2794 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2795 set_imask (region, ptr->r.record.p.rmask, t, 1);
2796 break;
2797 case gr_mem:
2798 if (!region)
2799 {
2800 as_bad ("gr_mem record before region record!\n");
2801 return;
2802 }
2803 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2804 set_imask (region, ptr->r.record.p.rmask, t, 2);
2805 break;
2806 case br_mem:
2807 if (!region)
2808 {
2809 as_bad ("br_mem record before region record!\n");
2810 return;
2811 }
2812 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2813 set_imask (region, ptr->r.record.p.brmask, t, 3);
2814 break;
e0c9811a 2815
542d6675
KH		 2816 case gr_gr:
2817 if (!region)
2818 {
2819 as_bad ("gr_gr record before region record!\n");
2820 return;
2821 }
2822 set_imask (region, ptr->r.record.p.grmask, t, 2);
2823 break;
2824 case br_gr:
2825 if (!region)
2826 {
2827 as_bad ("br_gr record before region record!\n");
2828 return;
2829 }
2830 set_imask (region, ptr->r.record.p.brmask, t, 3);
2831 break;
e0c9811a 2832
542d6675
KH		 2833 default:
2834 break;
800eeca4
JW		 2835 }
2836 }
2837}
2838
b5e0fabd
JW		 2839/* Estimate the size of a frag before relaxing. We only have one type of frag
2840 to handle here, which is the unwind info frag. */
2841
2842int
2843ia64_estimate_size_before_relax (fragS *frag,
2844 asection *segtype ATTRIBUTE_UNUSED)
2845{
2846 unw_rec_list *list;
2847 int len, size, pad;
2848
2849 /* ??? This code is identical to the first part of ia64_convert_frag. */
2850 list = (unw_rec_list *) frag->fr_opcode;
2851 fixup_unw_records (list, 0);
2852
2853 len = calc_record_size (list);
2854 /* pad to pointer-size boundary. */
2855 pad = len % md.pointer_size;
2856 if (pad != 0)
2857 len += md.pointer_size - pad;
2858 /* Add 8 for the header + a pointer for the personality offset. */
2859 size = len + 8 + md.pointer_size;
2860
2861 /* fr_var carries the max_chars that we created the fragment with.
2862 We must, of course, have allocated enough memory earlier. */
2863 assert (frag->fr_var >= size);
2864
2865 return frag->fr_fix + size;
2866}
2867
73f20958
L		 2868/* This function converts a rs_machine_dependent variant frag into a
2869 normal fill frag with the unwind image from the the record list. */
2870void
2871ia64_convert_frag (fragS *frag)
557debba 2872{
73f20958
L		 2873 unw_rec_list *list;
2874 int len, size, pad;
1cd8ff38 2875 valueT flag_value;
557debba 2876
b5e0fabd 2877 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 2878 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 2879 fixup_unw_records (list, 0);
1cd8ff38 2880
73f20958
L		 2881 len = calc_record_size (list);
2882 /* pad to pointer-size boundary. */
2883 pad = len % md.pointer_size;
2884 if (pad != 0)
2885 len += md.pointer_size - pad;
2886 /* Add 8 for the header + a pointer for the personality offset. */
2887 size = len + 8 + md.pointer_size;
2888
2889 /* fr_var carries the max_chars that we created the fragment with.
2890 We must, of course, have allocated enough memory earlier. */
2891 assert (frag->fr_var >= size);
2892
2893 /* Initialize the header area. fr_offset is initialized with
2894 unwind.personality_routine. */
2895 if (frag->fr_offset)
1cd8ff38
NC		 2896 {
2897 if (md.flags & EF_IA_64_ABI64)
2898 flag_value = (bfd_vma) 3 << 32;
2899 else
2900 /* 32-bit unwind info block. */
2901 flag_value = (bfd_vma) 0x1003 << 32;
2902 }
2903 else
2904 flag_value = 0;
557debba 2905
73f20958
L		 2906 md_number_to_chars (frag->fr_literal,
2907 (((bfd_vma) 1 << 48) /* Version. */
2908 | flag_value /* U & E handler flags. */
2909 | (len / md.pointer_size)), /* Length. */
2910 8);
557debba 2911
73f20958
L		 2912 /* Skip the header. */
2913 vbyte_mem_ptr = frag->fr_literal + 8;
2914 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 2915
2916 /* Fill the padding bytes with zeros. */
2917 if (pad != 0)
2918 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2919 md.pointer_size - pad);
2920
73f20958
L		 2921 frag->fr_fix += size;
2922 frag->fr_type = rs_fill;
2923 frag->fr_var = 0;
2924 frag->fr_offset = 0;
800eeca4
JW		 2925}
2926
e0c9811a
JW		 2927static int
2928convert_expr_to_ab_reg (e, ab, regp)
2929 expressionS *e;
2930 unsigned int *ab;
2931 unsigned int *regp;
2932{
2933 unsigned int reg;
2934
2935 if (e->X_op != O_register)
2936 return 0;
2937
2938 reg = e->X_add_number;
2434f565 2939 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 2940 {
2941 *ab = 0;
2942 *regp = reg - REG_GR;
2943 }
2434f565
JW		 2944 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2945 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 2946 {
2947 *ab = 1;
2948 *regp = reg - REG_FR;
2949 }
2434f565 2950 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 2951 {
2952 *ab = 2;
2953 *regp = reg - REG_BR;
2954 }
2955 else
2956 {
2957 *ab = 3;
2958 switch (reg)
2959 {
2960 case REG_PR: *regp = 0; break;
2961 case REG_PSP: *regp = 1; break;
2962 case REG_PRIUNAT: *regp = 2; break;
2963 case REG_BR + 0: *regp = 3; break;
2964 case REG_AR + AR_BSP: *regp = 4; break;
2965 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2966 case REG_AR + AR_RNAT: *regp = 6; break;
2967 case REG_AR + AR_UNAT: *regp = 7; break;
2968 case REG_AR + AR_FPSR: *regp = 8; break;
2969 case REG_AR + AR_PFS: *regp = 9; break;
2970 case REG_AR + AR_LC: *regp = 10; break;
2971
2972 default:
2973 return 0;
2974 }
2975 }
2976 return 1;
197865e8 2977}
e0c9811a
JW		 2978
2979static int
2980convert_expr_to_xy_reg (e, xy, regp)
2981 expressionS *e;
2982 unsigned int *xy;
2983 unsigned int *regp;
2984{
2985 unsigned int reg;
2986
2987 if (e->X_op != O_register)
2988 return 0;
2989
2990 reg = e->X_add_number;
2991
2434f565 2992 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
e0c9811a
JW		 2993 {
2994 *xy = 0;
2995 *regp = reg - REG_GR;
2996 }
2434f565 2997 else if (reg >= REG_FR && reg <= (REG_FR + 127))
e0c9811a
JW		 2998 {
2999 *xy = 1;
3000 *regp = reg - REG_FR;
3001 }
2434f565 3002 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3003 {
3004 *xy = 2;
3005 *regp = reg - REG_BR;
3006 }
3007 else
3008 return -1;
3009 return 1;
197865e8 3010}
e0c9811a 3011
d9201763
L		 3012static void
3013dot_align (int arg)
3014{
3015 /* The current frag is an alignment frag. */
3016 align_frag = frag_now;
3017 s_align_bytes (arg);
3018}
3019
800eeca4
JW		 3020static void
3021dot_radix (dummy)
2434f565 3022 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3023{
3024 int radix;
3025
3026 SKIP_WHITESPACE ();
3027 radix = *input_line_pointer++;
3028
3029 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3030 {
3031 as_bad ("Radix `%c' unsupported", *input_line_pointer);
542d6675 3032 ignore_rest_of_line ();
800eeca4
JW		 3033 return;
3034 }
3035}
3036
3037/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3038static void
3039dot_special_section (which)
3040 int which;
3041{
3042 set_section ((char *) special_section_name[which]);
3043}
3044
3045static void
3046add_unwind_entry (ptr)
3047 unw_rec_list *ptr;
3048{
e0c9811a
JW		 3049 if (unwind.tail)
3050 unwind.tail->next = ptr;
800eeca4 3051 else
e0c9811a
JW		 3052 unwind.list = ptr;
3053 unwind.tail = ptr;
800eeca4
JW		 3054
3055 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3056 if (unwind.current_entry == NULL)
3057 unwind.current_entry = ptr;
800eeca4
JW		 3058}
3059
197865e8 3060static void
800eeca4 3061dot_fframe (dummy)
2434f565 3062 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3063{
3064 expressionS e;
e0c9811a 3065
800eeca4 3066 parse_operand (&e);
197865e8 3067
800eeca4
JW		 3068 if (e.X_op != O_constant)
3069 as_bad ("Operand to .fframe must be a constant");
3070 else
e0c9811a
JW		 3071 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3072}
3073
197865e8 3074static void
e0c9811a 3075dot_vframe (dummy)
2434f565 3076 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3077{
3078 expressionS e;
3079 unsigned reg;
3080
3081 parse_operand (&e);
3082 reg = e.X_add_number - REG_GR;
3083 if (e.X_op == O_register && reg < 128)
800eeca4 3084 {
e0c9811a 3085 add_unwind_entry (output_mem_stack_v ());
30d25259
RH		 3086 if (! (unwind.prologue_mask & 2))
3087 add_unwind_entry (output_psp_gr (reg));
800eeca4 3088 }
e0c9811a
JW		 3089 else
3090 as_bad ("First operand to .vframe must be a general register");
800eeca4
JW		 3091}
3092
197865e8 3093static void
e0c9811a 3094dot_vframesp (dummy)
2434f565 3095 int dummy ATTRIBUTE_UNUSED;
800eeca4 3096{
e0c9811a
JW		 3097 expressionS e;
3098
3099 parse_operand (&e);
3100 if (e.X_op == O_constant)
3101 {
3102 add_unwind_entry (output_mem_stack_v ());
3103 add_unwind_entry (output_psp_sprel (e.X_add_number));
3104 }
3105 else
69906a9b 3106 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
e0c9811a
JW		 3107}
3108
197865e8 3109static void
e0c9811a 3110dot_vframepsp (dummy)
2434f565 3111 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3112{
3113 expressionS e;
3114
3115 parse_operand (&e);
3116 if (e.X_op == O_constant)
3117 {
3118 add_unwind_entry (output_mem_stack_v ());
3119 add_unwind_entry (output_psp_sprel (e.X_add_number));
3120 }
3121 else
69906a9b 3122 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
800eeca4
JW		 3123}
3124
197865e8 3125static void
800eeca4 3126dot_save (dummy)
2434f565 3127 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3128{
3129 expressionS e1, e2;
3130 int sep;
3131 int reg1, reg2;
3132
3133 sep = parse_operand (&e1);
3134 if (sep != ',')
3135 as_bad ("No second operand to .save");
3136 sep = parse_operand (&e2);
3137
e0c9811a 3138 reg1 = e1.X_add_number;
800eeca4 3139 reg2 = e2.X_add_number - REG_GR;
197865e8 3140
800eeca4 3141 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3142 if (e1.X_op == O_register)
800eeca4 3143 {
542d6675 3144 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
800eeca4
JW		 3145 {
3146 switch (reg1)
3147 {
542d6675
KH		 3148 case REG_AR + AR_BSP:
3149 add_unwind_entry (output_bsp_when ());
3150 add_unwind_entry (output_bsp_gr (reg2));
3151 break;
3152 case REG_AR + AR_BSPSTORE:
3153 add_unwind_entry (output_bspstore_when ());
3154 add_unwind_entry (output_bspstore_gr (reg2));
3155 break;
3156 case REG_AR + AR_RNAT:
3157 add_unwind_entry (output_rnat_when ());
3158 add_unwind_entry (output_rnat_gr (reg2));
3159 break;
3160 case REG_AR + AR_UNAT:
3161 add_unwind_entry (output_unat_when ());
3162 add_unwind_entry (output_unat_gr (reg2));
3163 break;
3164 case REG_AR + AR_FPSR:
3165 add_unwind_entry (output_fpsr_when ());
3166 add_unwind_entry (output_fpsr_gr (reg2));
3167 break;
3168 case REG_AR + AR_PFS:
3169 add_unwind_entry (output_pfs_when ());
3170 if (! (unwind.prologue_mask & 4))
3171 add_unwind_entry (output_pfs_gr (reg2));
3172 break;
3173 case REG_AR + AR_LC:
3174 add_unwind_entry (output_lc_when ());
3175 add_unwind_entry (output_lc_gr (reg2));
3176 break;
3177 case REG_BR:
3178 add_unwind_entry (output_rp_when ());
3179 if (! (unwind.prologue_mask & 8))
3180 add_unwind_entry (output_rp_gr (reg2));
3181 break;
3182 case REG_PR:
3183 add_unwind_entry (output_preds_when ());
3184 if (! (unwind.prologue_mask & 1))
3185 add_unwind_entry (output_preds_gr (reg2));
3186 break;
3187 case REG_PRIUNAT:
3188 add_unwind_entry (output_priunat_when_gr ());
3189 add_unwind_entry (output_priunat_gr (reg2));
3190 break;
3191 default:
3192 as_bad ("First operand not a valid register");
800eeca4
JW		 3193 }
3194 }
3195 else
3196 as_bad (" Second operand not a valid register");
3197 }
3198 else
e0c9811a 3199 as_bad ("First operand not a register");
800eeca4
JW		 3200}
3201
197865e8 3202static void
800eeca4 3203dot_restore (dummy)
2434f565 3204 int dummy ATTRIBUTE_UNUSED;
800eeca4 3205{
e0c9811a 3206 expressionS e1, e2;
33d01f33 3207 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3208 int sep;
3209
3210 sep = parse_operand (&e1);
3211 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3212 {
3213 as_bad ("First operand to .restore must be stack pointer (sp)");
3214 return;
3215 }
3216
3217 if (sep == ',')
3218 {
3219 parse_operand (&e2);
33d01f33 3220 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3221 {
33d01f33 3222 as_bad ("Second operand to .restore must be a constant >= 0");
e0c9811a
JW		 3223 return;
3224 }
33d01f33 3225 ecount = e2.X_add_number;
e0c9811a 3226 }
33d01f33
JW		 3227 else
3228 ecount = unwind.prologue_count - 1;
6290819d
NC		 3229
3230 if (ecount >= unwind.prologue_count)
3231 {
3232 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3233 ecount + 1, unwind.prologue_count);
3234 return;
3235 }
3236
e0c9811a 3237 add_unwind_entry (output_epilogue (ecount));
33d01f33
JW		 3238
3239 if (ecount < unwind.prologue_count)
3240 unwind.prologue_count -= ecount + 1;
3241 else
3242 unwind.prologue_count = 0;
e0c9811a
JW		 3243}
3244
197865e8 3245static void
e0c9811a 3246dot_restorereg (dummy)
2434f565 3247 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3248{
3249 unsigned int ab, reg;
3250 expressionS e;
3251
3252 parse_operand (&e);
3253
3254 if (!convert_expr_to_ab_reg (&e, &ab, &reg))
3255 {
3256 as_bad ("First operand to .restorereg must be a preserved register");
3257 return;
3258 }
3259 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3260}
3261
197865e8 3262static void
e0c9811a 3263dot_restorereg_p (dummy)
2434f565 3264 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3265{
3266 unsigned int qp, ab, reg;
3267 expressionS e1, e2;
3268 int sep;
3269
3270 sep = parse_operand (&e1);
3271 if (sep != ',')
3272 {
3273 as_bad ("No second operand to .restorereg.p");
3274 return;
3275 }
3276
3277 parse_operand (&e2);
3278
3279 qp = e1.X_add_number - REG_P;
3280 if (e1.X_op != O_register || qp > 63)
3281 {
3282 as_bad ("First operand to .restorereg.p must be a predicate");
3283 return;
3284 }
3285
3286 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3287 {
3288 as_bad ("Second operand to .restorereg.p must be a preserved register");
3289 return;
3290 }
3291 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
800eeca4
JW		 3292}
3293
2d6ed997
L		 3294static char *special_linkonce_name[] =
3295 {
3296 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3297 };
3298
3299static void
3300start_unwind_section (const segT text_seg, int sec_index)
3301{
3302 /*
3303 Use a slightly ugly scheme to derive the unwind section names from
3304 the text section name:
3305
3306 text sect. unwind table sect.
3307 name: name: comments:
3308 ---------- ----------------- --------------------------------
3309 .text .IA_64.unwind
3310 .text.foo .IA_64.unwind.text.foo
3311 .foo .IA_64.unwind.foo
3312 .gnu.linkonce.t.foo
3313 .gnu.linkonce.ia64unw.foo
3314 _info .IA_64.unwind_info gas issues error message (ditto)
3315 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3316
3317 This mapping is done so that:
3318
3319 (a) An object file with unwind info only in .text will use
3320 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3321 This follows the letter of the ABI and also ensures backwards
3322 compatibility with older toolchains.
3323
3324 (b) An object file with unwind info in multiple text sections
3325 will use separate unwind sections for each text section.
3326 This allows us to properly set the "sh_info" and "sh_link"
3327 fields in SHT_IA_64_UNWIND as required by the ABI and also
3328 lets GNU ld support programs with multiple segments
3329 containing unwind info (as might be the case for certain
3330 embedded applications).
3331
3332 (c) An error is issued if there would be a name clash.
3333 */
3334
3335 const char *text_name, *sec_text_name;
3336 char *sec_name;
3337 const char *prefix = special_section_name [sec_index];
3338 const char *suffix;
3339 size_t prefix_len, suffix_len, sec_name_len;
3340
3341 sec_text_name = segment_name (text_seg);
3342 text_name = sec_text_name;
3343 if (strncmp (text_name, "_info", 5) == 0)
3344 {
3345 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3346 text_name);
3347 ignore_rest_of_line ();
3348 return;
3349 }
3350 if (strcmp (text_name, ".text") == 0)
3351 text_name = "";
3352
3353 /* Build the unwind section name by appending the (possibly stripped)
3354 text section name to the unwind prefix. */
3355 suffix = text_name;
3356 if (strncmp (text_name, ".gnu.linkonce.t.",
3357 sizeof (".gnu.linkonce.t.") - 1) == 0)
3358 {
3359 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3360 suffix += sizeof (".gnu.linkonce.t.") - 1;
3361 }
3362
3363 prefix_len = strlen (prefix);
3364 suffix_len = strlen (suffix);
3365 sec_name_len = prefix_len + suffix_len;
3366 sec_name = alloca (sec_name_len + 1);
3367 memcpy (sec_name, prefix, prefix_len);
3368 memcpy (sec_name + prefix_len, suffix, suffix_len);
3369 sec_name [sec_name_len] = '\0';
3370
3371 /* Handle COMDAT group. */
3372 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3373 {
3374 char *section;
3375 size_t len, group_name_len;
3376 const char *group_name = elf_group_name (text_seg);
3377
3378 if (group_name == NULL)
3379 {
3380 as_bad ("Group section `%s' has no group signature",
3381 sec_text_name);
3382 ignore_rest_of_line ();
3383 return;
3384 }
3385 /* We have to construct a fake section directive. */
3386 group_name_len = strlen (group_name);
3387 len = (sec_name_len
3388 + 16 /* ,"aG",@progbits, */
3389 + group_name_len /* ,group_name */
3390 + 7); /* ,comdat */
3391
3392 section = alloca (len + 1);
3393 memcpy (section, sec_name, sec_name_len);
3394 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3395 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3396 memcpy (section + len - 7, ",comdat", 7);
3397 section [len] = '\0';
3398 set_section (section);
3399 }
3400 else
3401 {
3402 set_section (sec_name);
3403 bfd_set_section_flags (stdoutput, now_seg,
3404 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3405 }
38ce5b11
L		 3406
3407 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3408}
3409
73f20958 3410static void
2d6ed997 3411generate_unwind_image (const segT text_seg)
800eeca4 3412{
73f20958
L		 3413 int size, pad;
3414 unw_rec_list *list;
800eeca4 3415
c97b7ef6
JW		 3416 /* Mark the end of the unwind info, so that we can compute the size of the
3417 last unwind region. */
3418 add_unwind_entry (output_endp ());
3419
10850f29
JW		 3420 /* Force out pending instructions, to make sure all unwind records have
3421 a valid slot_number field. */
3422 ia64_flush_insns ();
3423
800eeca4 3424 /* Generate the unwind record. */
73f20958 3425 list = optimize_unw_records (unwind.list);
b5e0fabd 3426 fixup_unw_records (list, 1);
73f20958
L		 3427 size = calc_record_size (list);
3428
3429 if (size > 0 || unwind.force_unwind_entry)
3430 {
3431 unwind.force_unwind_entry = 0;
3432 /* pad to pointer-size boundary. */
3433 pad = size % md.pointer_size;
3434 if (pad != 0)
3435 size += md.pointer_size - pad;
3436 /* Add 8 for the header + a pointer for the personality
3437 offset. */
3438 size += 8 + md.pointer_size;
3439 }
6290819d 3440
800eeca4
JW		 3441 /* If there are unwind records, switch sections, and output the info. */
3442 if (size != 0)
3443 {
800eeca4 3444 expressionS exp;
1cd8ff38 3445 bfd_reloc_code_real_type reloc;
91a2ae2a 3446
2d6ed997 3447 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3448
557debba
JW		 3449 /* Make sure the section has 4 byte alignment for ILP32 and
3450 8 byte alignment for LP64. */
3451 frag_align (md.pointer_size_shift, 0, 0);
3452 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3453
800eeca4 3454 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3455 unwind.info = expr_build_dot ();
73f20958
L		 3456
3457 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3458 (offsetT) (long) unwind.personality_routine,
3459 (char *) list);
91a2ae2a 3460
800eeca4 3461 /* Add the personality address to the image. */
e0c9811a 3462 if (unwind.personality_routine != 0)
542d6675 3463 {
40449e9f 3464 exp.X_op = O_symbol;
e0c9811a 3465 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3466 exp.X_add_number = 0;
1cd8ff38
NC		 3467
3468 if (md.flags & EF_IA_64_BE)
3469 {
3470 if (md.flags & EF_IA_64_ABI64)
3471 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3472 else
3473 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3474 }
40449e9f 3475 else
1cd8ff38
NC		 3476 {
3477 if (md.flags & EF_IA_64_ABI64)
3478 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3479 else
3480 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3481 }
3482
3483 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3484 md.pointer_size, &exp, 0, reloc);
e0c9811a 3485 unwind.personality_routine = 0;
542d6675 3486 }
800eeca4
JW		 3487 }
3488
6290819d 3489 free_saved_prologue_counts ();
e0c9811a 3490 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3491}
3492
197865e8 3493static void
542d6675 3494dot_handlerdata (dummy)
2434f565 3495 int dummy ATTRIBUTE_UNUSED;
800eeca4 3496{
91a2ae2a
RH		 3497 unwind.force_unwind_entry = 1;
3498
3499 /* Remember which segment we're in so we can switch back after .endp */
3500 unwind.saved_text_seg = now_seg;
3501 unwind.saved_text_subseg = now_subseg;
3502
3503 /* Generate unwind info into unwind-info section and then leave that
3504 section as the currently active one so dataXX directives go into
3505 the language specific data area of the unwind info block. */
2d6ed997 3506 generate_unwind_image (now_seg);
e0c9811a 3507 demand_empty_rest_of_line ();
800eeca4
JW		 3508}
3509
197865e8 3510static void
800eeca4 3511dot_unwentry (dummy)
2434f565 3512 int dummy ATTRIBUTE_UNUSED;
800eeca4 3513{
91a2ae2a 3514 unwind.force_unwind_entry = 1;
e0c9811a 3515 demand_empty_rest_of_line ();
800eeca4
JW		 3516}
3517
197865e8 3518static void
800eeca4 3519dot_altrp (dummy)
2434f565 3520 int dummy ATTRIBUTE_UNUSED;
800eeca4 3521{
e0c9811a
JW		 3522 expressionS e;
3523 unsigned reg;
3524
3525 parse_operand (&e);
3526 reg = e.X_add_number - REG_BR;
3527 if (e.X_op == O_register && reg < 8)
3528 add_unwind_entry (output_rp_br (reg));
3529 else
3530 as_bad ("First operand not a valid branch register");
800eeca4
JW		 3531}
3532
197865e8 3533static void
e0c9811a
JW		 3534dot_savemem (psprel)
3535 int psprel;
800eeca4
JW		 3536{
3537 expressionS e1, e2;
3538 int sep;
3539 int reg1, val;
3540
3541 sep = parse_operand (&e1);
3542 if (sep != ',')
e0c9811a 3543 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
800eeca4
JW		 3544 sep = parse_operand (&e2);
3545
e0c9811a 3546 reg1 = e1.X_add_number;
800eeca4 3547 val = e2.X_add_number;
197865e8 3548
800eeca4 3549 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3550 if (e1.X_op == O_register)
800eeca4
JW		 3551 {
3552 if (e2.X_op == O_constant)
3553 {
3554 switch (reg1)
3555 {
542d6675
KH		 3556 case REG_AR + AR_BSP:
3557 add_unwind_entry (output_bsp_when ());
3558 add_unwind_entry ((psprel
3559 ? output_bsp_psprel
3560 : output_bsp_sprel) (val));
3561 break;
3562 case REG_AR + AR_BSPSTORE:
3563 add_unwind_entry (output_bspstore_when ());
3564 add_unwind_entry ((psprel
3565 ? output_bspstore_psprel
3566 : output_bspstore_sprel) (val));
3567 break;
3568 case REG_AR + AR_RNAT:
3569 add_unwind_entry (output_rnat_when ());
3570 add_unwind_entry ((psprel
3571 ? output_rnat_psprel
3572 : output_rnat_sprel) (val));
3573 break;
3574 case REG_AR + AR_UNAT:
3575 add_unwind_entry (output_unat_when ());
3576 add_unwind_entry ((psprel
3577 ? output_unat_psprel
3578 : output_unat_sprel) (val));
3579 break;
3580 case REG_AR + AR_FPSR:
3581 add_unwind_entry (output_fpsr_when ());
3582 add_unwind_entry ((psprel
3583 ? output_fpsr_psprel
3584 : output_fpsr_sprel) (val));
3585 break;
3586 case REG_AR + AR_PFS:
3587 add_unwind_entry (output_pfs_when ());
3588 add_unwind_entry ((psprel
3589 ? output_pfs_psprel
3590 : output_pfs_sprel) (val));
3591 break;
3592 case REG_AR + AR_LC:
3593 add_unwind_entry (output_lc_when ());
3594 add_unwind_entry ((psprel
3595 ? output_lc_psprel
3596 : output_lc_sprel) (val));
3597 break;
3598 case REG_BR:
3599 add_unwind_entry (output_rp_when ());
3600 add_unwind_entry ((psprel
3601 ? output_rp_psprel
3602 : output_rp_sprel) (val));
3603 break;
3604 case REG_PR:
3605 add_unwind_entry (output_preds_when ());
3606 add_unwind_entry ((psprel
3607 ? output_preds_psprel
3608 : output_preds_sprel) (val));
3609 break;
3610 case REG_PRIUNAT:
3611 add_unwind_entry (output_priunat_when_mem ());
3612 add_unwind_entry ((psprel
3613 ? output_priunat_psprel
3614 : output_priunat_sprel) (val));
3615 break;
3616 default:
3617 as_bad ("First operand not a valid register");
800eeca4
JW		 3618 }
3619 }
3620 else
3621 as_bad (" Second operand not a valid constant");
3622 }
3623 else
e0c9811a 3624 as_bad ("First operand not a register");
800eeca4
JW		 3625}
3626
197865e8 3627static void
800eeca4 3628dot_saveg (dummy)
2434f565 3629 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3630{
3631 expressionS e1, e2;
3632 int sep;
3633 sep = parse_operand (&e1);
3634 if (sep == ',')
3635 parse_operand (&e2);
197865e8 3636
800eeca4
JW		 3637 if (e1.X_op != O_constant)
3638 as_bad ("First operand to .save.g must be a constant.");
3639 else
3640 {
3641 int grmask = e1.X_add_number;
3642 if (sep != ',')
3643 add_unwind_entry (output_gr_mem (grmask));
3644 else
542d6675 3645 {
800eeca4 3646 int reg = e2.X_add_number - REG_GR;
542d6675 3647 if (e2.X_op == O_register && reg >= 0 && reg < 128)
800eeca4
JW		 3648 add_unwind_entry (output_gr_gr (grmask, reg));
3649 else
3650 as_bad ("Second operand is an invalid register.");
3651 }
3652 }
3653}
3654
197865e8 3655static void
800eeca4 3656dot_savef (dummy)
2434f565 3657 int dummy ATTRIBUTE_UNUSED;
800eeca4 3658{
e0c9811a 3659 expressionS e1;
800eeca4
JW		 3660 int sep;
3661 sep = parse_operand (&e1);
197865e8 3662
800eeca4
JW		 3663 if (e1.X_op != O_constant)
3664 as_bad ("Operand to .save.f must be a constant.");
3665 else
e0c9811a 3666 add_unwind_entry (output_fr_mem (e1.X_add_number));
800eeca4
JW		 3667}
3668
197865e8 3669static void
800eeca4 3670dot_saveb (dummy)
2434f565 3671 int dummy ATTRIBUTE_UNUSED;
800eeca4 3672{
e0c9811a
JW		 3673 expressionS e1, e2;
3674 unsigned int reg;
3675 unsigned char sep;
3676 int brmask;
3677
800eeca4 3678 sep = parse_operand (&e1);
800eeca4 3679 if (e1.X_op != O_constant)
800eeca4 3680 {
e0c9811a
JW		 3681 as_bad ("First operand to .save.b must be a constant.");
3682 return;
800eeca4 3683 }
e0c9811a
JW		 3684 brmask = e1.X_add_number;
3685
3686 if (sep == ',')
3687 {
3688 sep = parse_operand (&e2);
3689 reg = e2.X_add_number - REG_GR;
3690 if (e2.X_op != O_register || reg > 127)
3691 {
3692 as_bad ("Second operand to .save.b must be a general register.");
3693 return;
3694 }
3695 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3696 }
3697 else
3698 add_unwind_entry (output_br_mem (brmask));
3699
3700 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3701 demand_empty_rest_of_line ();
800eeca4
JW		 3702}
3703
197865e8 3704static void
800eeca4 3705dot_savegf (dummy)
2434f565 3706 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3707{
3708 expressionS e1, e2;
3709 int sep;
3710 sep = parse_operand (&e1);
3711 if (sep == ',')
3712 parse_operand (&e2);
197865e8 3713
800eeca4
JW		 3714 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3715 as_bad ("Both operands of .save.gf must be constants.");
3716 else
3717 {
3718 int grmask = e1.X_add_number;
3719 int frmask = e2.X_add_number;
3720 add_unwind_entry (output_frgr_mem (grmask, frmask));
3721 }
3722}
3723
197865e8 3724static void
800eeca4 3725dot_spill (dummy)
2434f565 3726 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3727{
3728 expressionS e;
e0c9811a
JW		 3729 unsigned char sep;
3730
3731 sep = parse_operand (&e);
3732 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3733 demand_empty_rest_of_line ();
197865e8 3734
800eeca4
JW		 3735 if (e.X_op != O_constant)
3736 as_bad ("Operand to .spill must be a constant");
3737 else
e0c9811a
JW		 3738 add_unwind_entry (output_spill_base (e.X_add_number));
3739}
3740
3741static void
3742dot_spillreg (dummy)
2434f565 3743 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3744{
3745 int sep, ab, xy, reg, treg;
3746 expressionS e1, e2;
3747
3748 sep = parse_operand (&e1);
3749 if (sep != ',')
3750 {
3751 as_bad ("No second operand to .spillreg");
3752 return;
3753 }
3754
3755 parse_operand (&e2);
3756
3757 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
800eeca4 3758 {
e0c9811a
JW		 3759 as_bad ("First operand to .spillreg must be a preserved register");
3760 return;
800eeca4 3761 }
e0c9811a
JW		 3762
3763 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3764 {
3765 as_bad ("Second operand to .spillreg must be a register");
3766 return;
3767 }
3768
3769 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3770}
3771
3772static void
3773dot_spillmem (psprel)
3774 int psprel;
3775{
3776 expressionS e1, e2;
3777 int sep, ab, reg;
3778
3779 sep = parse_operand (&e1);
3780 if (sep != ',')
3781 {
3782 as_bad ("Second operand missing");
3783 return;
3784 }
3785
3786 parse_operand (&e2);
3787
3788 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
3789 {
3790 as_bad ("First operand to .spill%s must be a preserved register",
3791 psprel ? "psp" : "sp");
3792 return;
3793 }
3794
3795 if (e2.X_op != O_constant)
3796 {
3797 as_bad ("Second operand to .spill%s must be a constant",
3798 psprel ? "psp" : "sp");
3799 return;
3800 }
3801
3802 if (psprel)
3803 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3804 else
3805 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3806}
3807
3808static void
3809dot_spillreg_p (dummy)
2434f565 3810 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3811{
3812 int sep, ab, xy, reg, treg;
3813 expressionS e1, e2, e3;
3814 unsigned int qp;
3815
3816 sep = parse_operand (&e1);
3817 if (sep != ',')
3818 {
3819 as_bad ("No second and third operand to .spillreg.p");
3820 return;
3821 }
3822
3823 sep = parse_operand (&e2);
3824 if (sep != ',')
3825 {
3826 as_bad ("No third operand to .spillreg.p");
3827 return;
3828 }
3829
3830 parse_operand (&e3);
3831
3832 qp = e1.X_add_number - REG_P;
3833
3834 if (e1.X_op != O_register || qp > 63)
3835 {
3836 as_bad ("First operand to .spillreg.p must be a predicate");
3837 return;
3838 }
3839
3840 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3841 {
3842 as_bad ("Second operand to .spillreg.p must be a preserved register");
3843 return;
3844 }
3845
3846 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3847 {
3848 as_bad ("Third operand to .spillreg.p must be a register");
3849 return;
3850 }
3851
3852 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3853}
3854
3855static void
3856dot_spillmem_p (psprel)
3857 int psprel;
3858{
3859 expressionS e1, e2, e3;
3860 int sep, ab, reg;
3861 unsigned int qp;
3862
3863 sep = parse_operand (&e1);
3864 if (sep != ',')
3865 {
3866 as_bad ("Second operand missing");
3867 return;
3868 }
3869
3870 parse_operand (&e2);
3871 if (sep != ',')
3872 {
3873 as_bad ("Second operand missing");
3874 return;
3875 }
3876
3877 parse_operand (&e3);
3878
3879 qp = e1.X_add_number - REG_P;
3880 if (e1.X_op != O_register || qp > 63)
3881 {
3882 as_bad ("First operand to .spill%s_p must be a predicate",
3883 psprel ? "psp" : "sp");
3884 return;
3885 }
3886
3887 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3888 {
3889 as_bad ("Second operand to .spill%s_p must be a preserved register",
3890 psprel ? "psp" : "sp");
3891 return;
3892 }
3893
3894 if (e3.X_op != O_constant)
3895 {
3896 as_bad ("Third operand to .spill%s_p must be a constant",
3897 psprel ? "psp" : "sp");
3898 return;
3899 }
3900
3901 if (psprel)
fa7fda74 3902 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a 3903 else
fa7fda74 3904 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a
JW		 3905}
3906
6290819d
NC		 3907static unsigned int
3908get_saved_prologue_count (lbl)
3909 unsigned long lbl;
3910{
3911 label_prologue_count *lpc = unwind.saved_prologue_counts;
3912
3913 while (lpc != NULL && lpc->label_number != lbl)
3914 lpc = lpc->next;
3915
3916 if (lpc != NULL)
3917 return lpc->prologue_count;
3918
3919 as_bad ("Missing .label_state %ld", lbl);
3920 return 1;
3921}
3922
3923static void
3924save_prologue_count (lbl, count)
3925 unsigned long lbl;
3926 unsigned int count;
3927{
3928 label_prologue_count *lpc = unwind.saved_prologue_counts;
3929
3930 while (lpc != NULL && lpc->label_number != lbl)
3931 lpc = lpc->next;
3932
3933 if (lpc != NULL)
3934 lpc->prologue_count = count;
3935 else
3936 {
40449e9f 3937 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 3938
3939 new_lpc->next = unwind.saved_prologue_counts;
3940 new_lpc->label_number = lbl;
3941 new_lpc->prologue_count = count;
3942 unwind.saved_prologue_counts = new_lpc;
3943 }
3944}
3945
3946static void
3947free_saved_prologue_counts ()
3948{
40449e9f
KH		 3949 label_prologue_count *lpc = unwind.saved_prologue_counts;
3950 label_prologue_count *next;
6290819d
NC		 3951
3952 while (lpc != NULL)
3953 {
3954 next = lpc->next;
3955 free (lpc);
3956 lpc = next;
3957 }
3958
3959 unwind.saved_prologue_counts = NULL;
3960}
3961
e0c9811a
JW		 3962static void
3963dot_label_state (dummy)
2434f565 3964 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3965{
3966 expressionS e;
3967
3968 parse_operand (&e);
3969 if (e.X_op != O_constant)
3970 {
3971 as_bad ("Operand to .label_state must be a constant");
3972 return;
3973 }
3974 add_unwind_entry (output_label_state (e.X_add_number));
6290819d 3975 save_prologue_count (e.X_add_number, unwind.prologue_count);
e0c9811a
JW		 3976}
3977
3978static void
3979dot_copy_state (dummy)
2434f565 3980 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3981{
3982 expressionS e;
3983
3984 parse_operand (&e);
3985 if (e.X_op != O_constant)
3986 {
3987 as_bad ("Operand to .copy_state must be a constant");
3988 return;
3989 }
3990 add_unwind_entry (output_copy_state (e.X_add_number));
6290819d 3991 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
800eeca4
JW		 3992}
3993
197865e8 3994static void
800eeca4 3995dot_unwabi (dummy)
2434f565 3996 int dummy ATTRIBUTE_UNUSED;
800eeca4 3997{
e0c9811a
JW		 3998 expressionS e1, e2;
3999 unsigned char sep;
4000
4001 sep = parse_operand (&e1);
4002 if (sep != ',')
4003 {
4004 as_bad ("Second operand to .unwabi missing");
4005 return;
4006 }
4007 sep = parse_operand (&e2);
4008 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4009 demand_empty_rest_of_line ();
e0c9811a
JW		 4010
4011 if (e1.X_op != O_constant)
4012 {
4013 as_bad ("First operand to .unwabi must be a constant");
4014 return;
4015 }
4016
4017 if (e2.X_op != O_constant)
4018 {
4019 as_bad ("Second operand to .unwabi must be a constant");
4020 return;
4021 }
4022
4023 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
800eeca4
JW		 4024}
4025
197865e8 4026static void
800eeca4 4027dot_personality (dummy)
2434f565 4028 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4029{
4030 char *name, *p, c;
4031 SKIP_WHITESPACE ();
4032 name = input_line_pointer;
4033 c = get_symbol_end ();
4034 p = input_line_pointer;
e0c9811a 4035 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4036 unwind.force_unwind_entry = 1;
800eeca4
JW		 4037 *p = c;
4038 SKIP_WHITESPACE ();
4039 demand_empty_rest_of_line ();
4040}
4041
4042static void
4043dot_proc (dummy)
2434f565 4044 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4045{
4046 char *name, *p, c;
4047 symbolS *sym;
4048
e0c9811a
JW		 4049 unwind.proc_start = expr_build_dot ();
4050 /* Parse names of main and alternate entry points and mark them as
542d6675 4051 function symbols: */
800eeca4
JW		 4052 while (1)
4053 {
4054 SKIP_WHITESPACE ();
4055 name = input_line_pointer;
4056 c = get_symbol_end ();
4057 p = input_line_pointer;
4058 sym = symbol_find_or_make (name);
e0c9811a 4059 if (unwind.proc_start == 0)
542d6675 4060 {
e0c9811a 4061 unwind.proc_start = sym;
800eeca4
JW		 4062 }
4063 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4064 *p = c;
4065 SKIP_WHITESPACE ();
4066 if (*input_line_pointer != ',')
4067 break;
4068 ++input_line_pointer;
4069 }
4070 demand_empty_rest_of_line ();
4071 ia64_do_align (16);
4072
33d01f33 4073 unwind.prologue_count = 0;
e0c9811a
JW		 4074 unwind.list = unwind.tail = unwind.current_entry = NULL;
4075 unwind.personality_routine = 0;
800eeca4
JW		 4076}
4077
4078static void
4079dot_body (dummy)
2434f565 4080 int dummy ATTRIBUTE_UNUSED;
800eeca4 4081{
e0c9811a 4082 unwind.prologue = 0;
30d25259
RH		 4083 unwind.prologue_mask = 0;
4084
800eeca4 4085 add_unwind_entry (output_body ());
e0c9811a 4086 demand_empty_rest_of_line ();
800eeca4
JW		 4087}
4088
4089static void
4090dot_prologue (dummy)
2434f565 4091 int dummy ATTRIBUTE_UNUSED;
800eeca4 4092{
e0c9811a 4093 unsigned char sep;
2434f565 4094 int mask = 0, grsave = 0;
e0c9811a 4095
e0c9811a 4096 if (!is_it_end_of_statement ())
800eeca4
JW		 4097 {
4098 expressionS e1, e2;
800eeca4
JW		 4099 sep = parse_operand (&e1);
4100 if (sep != ',')
4101 as_bad ("No second operand to .prologue");
4102 sep = parse_operand (&e2);
e0c9811a 4103 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4104 demand_empty_rest_of_line ();
800eeca4
JW		 4105
4106 if (e1.X_op == O_constant)
542d6675 4107 {
30d25259
RH		 4108 mask = e1.X_add_number;
4109
800eeca4 4110 if (e2.X_op == O_constant)
30d25259
RH		 4111 grsave = e2.X_add_number;
4112 else if (e2.X_op == O_register
4113 && (grsave = e2.X_add_number - REG_GR) < 128)
4114 ;
800eeca4 4115 else
30d25259
RH		 4116 as_bad ("Second operand not a constant or general register");
4117
4118 add_unwind_entry (output_prologue_gr (mask, grsave));
800eeca4
JW		 4119 }
4120 else
4121 as_bad ("First operand not a constant");
4122 }
4123 else
4124 add_unwind_entry (output_prologue ());
30d25259
RH		 4125
4126 unwind.prologue = 1;
4127 unwind.prologue_mask = mask;
33d01f33 4128 ++unwind.prologue_count;
800eeca4
JW		 4129}
4130
4131static void
4132dot_endp (dummy)
2434f565 4133 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4134{
4135 expressionS e;
4136 unsigned char *ptr;
44f5c83a 4137 int bytes_per_address;
800eeca4
JW		 4138 long where;
4139 segT saved_seg;
4140 subsegT saved_subseg;
c538998c
JJ		 4141 char *name, *p, c;
4142 symbolS *sym;
800eeca4 4143
91a2ae2a
RH		 4144 if (unwind.saved_text_seg)
4145 {
4146 saved_seg = unwind.saved_text_seg;
4147 saved_subseg = unwind.saved_text_subseg;
4148 unwind.saved_text_seg = NULL;
4149 }
4150 else
4151 {
4152 saved_seg = now_seg;
4153 saved_subseg = now_subseg;
4154 }
4155
800eeca4 4156 insn_group_break (1, 0, 0);
800eeca4 4157
91a2ae2a
RH		 4158 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4159 if (!unwind.info)
2d6ed997 4160 generate_unwind_image (saved_seg);
800eeca4 4161
91a2ae2a
RH		 4162 if (unwind.info || unwind.force_unwind_entry)
4163 {
4164 subseg_set (md.last_text_seg, 0);
4165 unwind.proc_end = expr_build_dot ();
5e7474a7 4166
2d6ed997 4167 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4168
557debba
JW		 4169 /* Make sure that section has 4 byte alignment for ILP32 and
4170 8 byte alignment for LP64. */
4171 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4172
557debba
JW		 4173 /* Need space for 3 pointers for procedure start, procedure end,
4174 and unwind info. */
4175 ptr = frag_more (3 * md.pointer_size);
4176 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4177 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4178
40449e9f 4179 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4180 e.X_op = O_pseudo_fixup;
4181 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4182 e.X_add_number = 0;
4183 e.X_add_symbol = unwind.proc_start;
4184 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4185
800eeca4
JW		 4186 e.X_op = O_pseudo_fixup;
4187 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4188 e.X_add_number = 0;
91a2ae2a
RH		 4189 e.X_add_symbol = unwind.proc_end;
4190 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4191 bytes_per_address, &e);
4192
4193 if (unwind.info)
4194 {
4195 e.X_op = O_pseudo_fixup;
4196 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4197 e.X_add_number = 0;
4198 e.X_add_symbol = unwind.info;
4199 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4200 bytes_per_address, &e);
4201 }
4202 else
4203 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4204 bytes_per_address);
800eeca4 4205
91a2ae2a 4206 }
800eeca4 4207 subseg_set (saved_seg, saved_subseg);
c538998c
JJ		 4208
4209 /* Parse names of main and alternate entry points and set symbol sizes. */
4210 while (1)
4211 {
4212 SKIP_WHITESPACE ();
4213 name = input_line_pointer;
4214 c = get_symbol_end ();
4215 p = input_line_pointer;
4216 sym = symbol_find (name);
4217 if (sym && unwind.proc_start
4218 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4219 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4220 {
4221 fragS *fr = symbol_get_frag (unwind.proc_start);
4222 fragS *frag = symbol_get_frag (sym);
4223
4224 /* Check whether the function label is at or beyond last
4225 .proc directive. */
4226 while (fr && fr != frag)
4227 fr = fr->fr_next;
4228 if (fr)
4229 {
4230 if (frag == frag_now && SEG_NORMAL (now_seg))
4231 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4232 else
4233 {
4234 symbol_get_obj (sym)->size =
4235 (expressionS *) xmalloc (sizeof (expressionS));
4236 symbol_get_obj (sym)->size->X_op = O_subtract;
4237 symbol_get_obj (sym)->size->X_add_symbol
4238 = symbol_new (FAKE_LABEL_NAME, now_seg,
4239 frag_now_fix (), frag_now);
4240 symbol_get_obj (sym)->size->X_op_symbol = sym;
4241 symbol_get_obj (sym)->size->X_add_number = 0;
4242 }
4243 }
4244 }
4245 *p = c;
4246 SKIP_WHITESPACE ();
4247 if (*input_line_pointer != ',')
4248 break;
4249 ++input_line_pointer;
4250 }
4251 demand_empty_rest_of_line ();
e0c9811a 4252 unwind.proc_start = unwind.proc_end = unwind.info = 0;
800eeca4
JW		 4253}
4254
4255static void
4256dot_template (template)
4257 int template;
4258{
4259 CURR_SLOT.user_template = template;
4260}
4261
4262static void
4263dot_regstk (dummy)
2434f565 4264 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4265{
4266 int ins, locs, outs, rots;
4267
4268 if (is_it_end_of_statement ())
4269 ins = locs = outs = rots = 0;
4270 else
4271 {
4272 ins = get_absolute_expression ();
4273 if (*input_line_pointer++ != ',')
4274 goto err;
4275 locs = get_absolute_expression ();
4276 if (*input_line_pointer++ != ',')
4277 goto err;
4278 outs = get_absolute_expression ();
4279 if (*input_line_pointer++ != ',')
4280 goto err;
4281 rots = get_absolute_expression ();
4282 }
4283 set_regstack (ins, locs, outs, rots);
4284 return;
4285
4286 err:
4287 as_bad ("Comma expected");
4288 ignore_rest_of_line ();
4289}
4290
4291static void
4292dot_rot (type)
4293 int type;
4294{
4295 unsigned num_regs, num_alloced = 0;
4296 struct dynreg **drpp, *dr;
4297 int ch, base_reg = 0;
4298 char *name, *start;
4299 size_t len;
4300
4301 switch (type)
4302 {
4303 case DYNREG_GR: base_reg = REG_GR + 32; break;
4304 case DYNREG_FR: base_reg = REG_FR + 32; break;
4305 case DYNREG_PR: base_reg = REG_P + 16; break;
4306 default: break;
4307 }
4308
542d6675 4309 /* First, remove existing names from hash table. */
800eeca4
JW		 4310 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4311 {
4312 hash_delete (md.dynreg_hash, dr->name);
4313 dr->num_regs = 0;
4314 }
4315
4316 drpp = &md.dynreg[type];
4317 while (1)
4318 {
4319 start = input_line_pointer;
4320 ch = get_symbol_end ();
4321 *input_line_pointer = ch;
4322 len = (input_line_pointer - start);
4323
4324 SKIP_WHITESPACE ();
4325 if (*input_line_pointer != '[')
4326 {
4327 as_bad ("Expected '['");
4328 goto err;
4329 }
4330 ++input_line_pointer; /* skip '[' */
4331
4332 num_regs = get_absolute_expression ();
4333
4334 if (*input_line_pointer++ != ']')
4335 {
4336 as_bad ("Expected ']'");
4337 goto err;
4338 }
4339 SKIP_WHITESPACE ();
4340
4341 num_alloced += num_regs;
4342 switch (type)
4343 {
4344 case DYNREG_GR:
4345 if (num_alloced > md.rot.num_regs)
4346 {
4347 as_bad ("Used more than the declared %d rotating registers",
4348 md.rot.num_regs);
4349 goto err;
4350 }
4351 break;
4352 case DYNREG_FR:
4353 if (num_alloced > 96)
4354 {
4355 as_bad ("Used more than the available 96 rotating registers");
4356 goto err;
4357 }
4358 break;
4359 case DYNREG_PR:
4360 if (num_alloced > 48)
4361 {
4362 as_bad ("Used more than the available 48 rotating registers");
4363 goto err;
4364 }
4365 break;
4366
4367 default:
4368 break;
4369 }
4370
4371 name = obstack_alloc (&notes, len + 1);
4372 memcpy (name, start, len);
4373 name[len] = '\0';
4374
4375 if (!*drpp)
4376 {
4377 *drpp = obstack_alloc (&notes, sizeof (*dr));
4378 memset (*drpp, 0, sizeof (*dr));
4379 }
4380
4381 dr = *drpp;
4382 dr->name = name;
4383 dr->num_regs = num_regs;
4384 dr->base = base_reg;
4385 drpp = &dr->next;
4386 base_reg += num_regs;
4387
4388 if (hash_insert (md.dynreg_hash, name, dr))
4389 {
4390 as_bad ("Attempt to redefine register set `%s'", name);
4391 goto err;
4392 }
4393
4394 if (*input_line_pointer != ',')
4395 break;
4396 ++input_line_pointer; /* skip comma */
4397 SKIP_WHITESPACE ();
4398 }
4399 demand_empty_rest_of_line ();
4400 return;
4401
4402 err:
4403 ignore_rest_of_line ();
4404}
4405
4406static void
4407dot_byteorder (byteorder)
4408 int byteorder;
4409{
10a98291
L		 4410 segment_info_type *seginfo = seg_info (now_seg);
4411
4412 if (byteorder == -1)
4413 {
4414 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4415 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4416 byteorder = seginfo->tc_segment_info_data.endian == 1;
4417 }
4418 else
4419 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4420
4421 if (target_big_endian != byteorder)
4422 {
4423 target_big_endian = byteorder;
4424 if (target_big_endian)
4425 {
4426 ia64_number_to_chars = number_to_chars_bigendian;
4427 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4428 }
4429 else
4430 {
4431 ia64_number_to_chars = number_to_chars_littleendian;
4432 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4433 }
4434 }
800eeca4
JW		 4435}
4436
4437static void
4438dot_psr (dummy)
2434f565 4439 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4440{
4441 char *option;
4442 int ch;
4443
4444 while (1)
4445 {
4446 option = input_line_pointer;
4447 ch = get_symbol_end ();
4448 if (strcmp (option, "lsb") == 0)
4449 md.flags &= ~EF_IA_64_BE;
4450 else if (strcmp (option, "msb") == 0)
4451 md.flags |= EF_IA_64_BE;
4452 else if (strcmp (option, "abi32") == 0)
4453 md.flags &= ~EF_IA_64_ABI64;
4454 else if (strcmp (option, "abi64") == 0)
4455 md.flags |= EF_IA_64_ABI64;
4456 else
4457 as_bad ("Unknown psr option `%s'", option);
4458 *input_line_pointer = ch;
4459
4460 SKIP_WHITESPACE ();
4461 if (*input_line_pointer != ',')
4462 break;
4463
4464 ++input_line_pointer;
4465 SKIP_WHITESPACE ();
4466 }
4467 demand_empty_rest_of_line ();
4468}
4469
800eeca4
JW		 4470static void
4471dot_ln (dummy)
2434f565 4472 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4473{
4474 new_logical_line (0, get_absolute_expression ());
4475 demand_empty_rest_of_line ();
4476}
4477
542d6675 4478static char *
800eeca4
JW		 4479parse_section_name ()
4480{
4481 char *name;
4482 int len;
4483
4484 SKIP_WHITESPACE ();
4485 if (*input_line_pointer != '"')
4486 {
4487 as_bad ("Missing section name");
4488 ignore_rest_of_line ();
4489 return 0;
4490 }
4491 name = demand_copy_C_string (&len);
4492 if (!name)
4493 {
4494 ignore_rest_of_line ();
4495 return 0;
4496 }
4497 SKIP_WHITESPACE ();
4498 if (*input_line_pointer != ',')
4499 {
4500 as_bad ("Comma expected after section name");
4501 ignore_rest_of_line ();
4502 return 0;
4503 }
4504 ++input_line_pointer; /* skip comma */
4505 return name;
4506}
4507
4508static void
4509dot_xdata (size)
4510 int size;
4511{
4512 char *name = parse_section_name ();
4513 if (!name)
4514 return;
4515
4d5a53ff 4516 md.keep_pending_output = 1;
800eeca4
JW		 4517 set_section (name);
4518 cons (size);
4519 obj_elf_previous (0);
4d5a53ff 4520 md.keep_pending_output = 0;
800eeca4
JW		 4521}
4522
4523/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 4524
800eeca4
JW		 4525static void
4526stmt_float_cons (kind)
4527 int kind;
4528{
165a7f90 4529 size_t alignment;
800eeca4
JW		 4530
4531 switch (kind)
4532 {
165a7f90
L		 4533 case 'd':
4534 alignment = 8;
4535 break;
4536
4537 case 'x':
4538 case 'X':
4539 alignment = 16;
4540 break;
800eeca4
JW		 4541
4542 case 'f':
4543 default:
165a7f90 4544 alignment = 4;
800eeca4
JW		 4545 break;
4546 }
165a7f90 4547 ia64_do_align (alignment);
800eeca4
JW		 4548 float_cons (kind);
4549}
4550
4551static void
4552stmt_cons_ua (size)
4553 int size;
4554{
4555 int saved_auto_align = md.auto_align;
4556
4557 md.auto_align = 0;
4558 cons (size);
4559 md.auto_align = saved_auto_align;
4560}
4561
4562static void
4563dot_xfloat_cons (kind)
4564 int kind;
4565{
4566 char *name = parse_section_name ();
4567 if (!name)
4568 return;
4569
4d5a53ff 4570 md.keep_pending_output = 1;
800eeca4
JW		 4571 set_section (name);
4572 stmt_float_cons (kind);
4573 obj_elf_previous (0);
4d5a53ff 4574 md.keep_pending_output = 0;
800eeca4
JW		 4575}
4576
4577static void
4578dot_xstringer (zero)
4579 int zero;
4580{
4581 char *name = parse_section_name ();
4582 if (!name)
4583 return;
4584
4d5a53ff 4585 md.keep_pending_output = 1;
800eeca4
JW		 4586 set_section (name);
4587 stringer (zero);
4588 obj_elf_previous (0);
4d5a53ff 4589 md.keep_pending_output = 0;
800eeca4
JW		 4590}
4591
4592static void
4593dot_xdata_ua (size)
4594 int size;
4595{
4596 int saved_auto_align = md.auto_align;
4597 char *name = parse_section_name ();
4598 if (!name)
4599 return;
4600
4d5a53ff 4601 md.keep_pending_output = 1;
800eeca4
JW		 4602 set_section (name);
4603 md.auto_align = 0;
4604 cons (size);
4605 md.auto_align = saved_auto_align;
4606 obj_elf_previous (0);
4d5a53ff 4607 md.keep_pending_output = 0;
800eeca4
JW		 4608}
4609
4610static void
4611dot_xfloat_cons_ua (kind)
4612 int kind;
4613{
4614 int saved_auto_align = md.auto_align;
4615 char *name = parse_section_name ();
4616 if (!name)
4617 return;
4618
4d5a53ff 4619 md.keep_pending_output = 1;
800eeca4
JW		 4620 set_section (name);
4621 md.auto_align = 0;
4622 stmt_float_cons (kind);
4623 md.auto_align = saved_auto_align;
4624 obj_elf_previous (0);
4d5a53ff 4625 md.keep_pending_output = 0;
800eeca4
JW		 4626}
4627
4628/* .reg.val <regname>,value */
542d6675 4629
800eeca4
JW		 4630static void
4631dot_reg_val (dummy)
2434f565 4632 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4633{
4634 expressionS reg;
4635
4636 expression (&reg);
4637 if (reg.X_op != O_register)
4638 {
4639 as_bad (_("Register name expected"));
4640 ignore_rest_of_line ();
4641 }
4642 else if (*input_line_pointer++ != ',')
4643 {
4644 as_bad (_("Comma expected"));
4645 ignore_rest_of_line ();
4646 }
197865e8 4647 else
800eeca4
JW		 4648 {
4649 valueT value = get_absolute_expression ();
4650 int regno = reg.X_add_number;
542d6675
KH		 4651 if (regno < REG_GR || regno > REG_GR + 128)
4652 as_warn (_("Register value annotation ignored"));
800eeca4 4653 else
542d6675
KH		 4654 {
4655 gr_values[regno - REG_GR].known = 1;
4656 gr_values[regno - REG_GR].value = value;
4657 gr_values[regno - REG_GR].path = md.path;
4658 }
800eeca4
JW		 4659 }
4660 demand_empty_rest_of_line ();
4661}
4662
5e819f9c
JW		 4663/*
4664 .serialize.data
4665 .serialize.instruction
4666 */
4667static void
4668dot_serialize (type)
4669 int type;
4670{
4671 insn_group_break (0, 0, 0);
4672 if (type)
4673 instruction_serialization ();
4674 else
4675 data_serialization ();
4676 insn_group_break (0, 0, 0);
4677 demand_empty_rest_of_line ();
4678}
4679
197865e8 4680/* select dv checking mode
800eeca4
JW		 4681 .auto
4682 .explicit
4683 .default
4684
197865e8 4685 A stop is inserted when changing modes
800eeca4 4686 */
542d6675 4687
800eeca4
JW		 4688static void
4689dot_dv_mode (type)
542d6675 4690 int type;
800eeca4
JW		 4691{
4692 if (md.manual_bundling)
4693 as_warn (_("Directive invalid within a bundle"));
4694
4695 if (type == 'E' || type == 'A')
4696 md.mode_explicitly_set = 0;
4697 else
4698 md.mode_explicitly_set = 1;
4699
4700 md.detect_dv = 1;
4701 switch (type)
4702 {
4703 case 'A':
4704 case 'a':
4705 if (md.explicit_mode)
542d6675 4706 insn_group_break (1, 0, 0);
800eeca4
JW		 4707 md.explicit_mode = 0;
4708 break;
4709 case 'E':
4710 case 'e':
4711 if (!md.explicit_mode)
542d6675 4712 insn_group_break (1, 0, 0);
800eeca4
JW		 4713 md.explicit_mode = 1;
4714 break;
4715 default:
4716 case 'd':
4717 if (md.explicit_mode != md.default_explicit_mode)
542d6675 4718 insn_group_break (1, 0, 0);
800eeca4
JW		 4719 md.explicit_mode = md.default_explicit_mode;
4720 md.mode_explicitly_set = 0;
4721 break;
4722 }
4723}
4724
4725static void
4726print_prmask (mask)
542d6675 4727 valueT mask;
800eeca4
JW		 4728{
4729 int regno;
4730 char *comma = "";
542d6675 4731 for (regno = 0; regno < 64; regno++)
800eeca4 4732 {
542d6675
KH		 4733 if (mask & ((valueT) 1 << regno))
4734 {
4735 fprintf (stderr, "%s p%d", comma, regno);
4736 comma = ",";
4737 }
800eeca4
JW		 4738 }
4739}
4740
4741/*
4742 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4743 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4744 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4745 .pred.safe_across_calls p1 [, p2 [,...]]
4746 */
542d6675 4747
800eeca4
JW		 4748static void
4749dot_pred_rel (type)
542d6675 4750 int type;
800eeca4
JW		 4751{
4752 valueT mask = 0;
4753 int count = 0;
4754 int p1 = -1, p2 = -1;
4755
4756 if (type == 0)
4757 {
4758 if (*input_line_pointer != '"')
542d6675
KH		 4759 {
4760 as_bad (_("Missing predicate relation type"));
4761 ignore_rest_of_line ();
4762 return;
4763 }
197865e8 4764 else
542d6675
KH		 4765 {
4766 int len;
4767 char *form = demand_copy_C_string (&len);
4768 if (strcmp (form, "mutex") == 0)
4769 type = 'm';
4770 else if (strcmp (form, "clear") == 0)
4771 type = 'c';
4772 else if (strcmp (form, "imply") == 0)
4773 type = 'i';
4774 else
4775 {
4776 as_bad (_("Unrecognized predicate relation type"));
4777 ignore_rest_of_line ();
4778 return;
4779 }
4780 }
800eeca4 4781 if (*input_line_pointer == ',')
542d6675 4782 ++input_line_pointer;
800eeca4
JW		 4783 SKIP_WHITESPACE ();
4784 }
4785
4786 SKIP_WHITESPACE ();
4787 while (1)
4788 {
4789 valueT bit = 1;
4790 int regno;
197865e8 4791
3882b010 4792 if (TOUPPER (*input_line_pointer) != 'P'
542d6675
KH		 4793 || (regno = atoi (++input_line_pointer)) < 0
4794 || regno > 63)
4795 {
4796 as_bad (_("Predicate register expected"));
4797 ignore_rest_of_line ();
4798 return;
4799 }
3882b010 4800 while (ISDIGIT (*input_line_pointer))
542d6675 4801 ++input_line_pointer;
800eeca4 4802 if (p1 == -1)
542d6675 4803 p1 = regno;
800eeca4 4804 else if (p2 == -1)
542d6675 4805 p2 = regno;
800eeca4
JW		 4806 bit <<= regno;
4807 if (mask & bit)
542d6675
KH		 4808 as_warn (_("Duplicate predicate register ignored"));
4809 mask |= bit;
4810 count++;
4811 /* See if it's a range. */
800eeca4 4812 if (*input_line_pointer == '-')
542d6675
KH		 4813 {
4814 valueT stop = 1;
4815 ++input_line_pointer;
4816
3882b010 4817 if (TOUPPER (*input_line_pointer) != 'P'
542d6675
KH		 4818 || (regno = atoi (++input_line_pointer)) < 0
4819 || regno > 63)
4820 {
4821 as_bad (_("Predicate register expected"));
4822 ignore_rest_of_line ();
4823 return;
4824 }
3882b010 4825 while (ISDIGIT (*input_line_pointer))
542d6675
KH		 4826 ++input_line_pointer;
4827 stop <<= regno;
4828 if (bit >= stop)
4829 {
4830 as_bad (_("Bad register range"));
4831 ignore_rest_of_line ();
4832 return;
4833 }
4834 while (bit < stop)
4835 {
4836 bit <<= 1;
4837 mask |= bit;
4838 count++;
4839 }
4840 SKIP_WHITESPACE ();
4841 }
800eeca4 4842 if (*input_line_pointer != ',')
542d6675 4843 break;
800eeca4
JW		 4844 ++input_line_pointer;
4845 SKIP_WHITESPACE ();
4846 }
4847
4848 switch (type)
4849 {
4850 case 'c':
4851 if (count == 0)
542d6675 4852 mask = ~(valueT) 0;
800eeca4 4853 clear_qp_mutex (mask);
197865e8 4854 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 4855 break;
4856 case 'i':
4857 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 4858 as_bad (_("Predicate source and target required"));
800eeca4 4859 else if (p1 == 0 || p2 == 0)
542d6675 4860 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 4861 else
542d6675 4862 add_qp_imply (p1, p2);
800eeca4
JW		 4863 break;
4864 case 'm':
4865 if (count < 2)
542d6675
KH		 4866 {
4867 as_bad (_("At least two PR arguments expected"));
4868 break;
4869 }
800eeca4 4870 else if (mask & 1)
542d6675
KH		 4871 {
4872 as_bad (_("Use of p0 is not valid in this context"));
4873 break;
4874 }
800eeca4
JW		 4875 add_qp_mutex (mask);
4876 break;
4877 case 's':
4878 /* note that we don't override any existing relations */
4879 if (count == 0)
542d6675
KH		 4880 {
4881 as_bad (_("At least one PR argument expected"));
4882 break;
4883 }
800eeca4 4884 if (md.debug_dv)
542d6675
KH		 4885 {
4886 fprintf (stderr, "Safe across calls: ");
4887 print_prmask (mask);
4888 fprintf (stderr, "\n");
4889 }
800eeca4
JW		 4890 qp_safe_across_calls = mask;
4891 break;
4892 }
4893 demand_empty_rest_of_line ();
4894}
4895
4896/* .entry label [, label [, ...]]
4897 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 4898 Otherwise, only global labels are considered entry points. */
4899
800eeca4
JW		 4900static void
4901dot_entry (dummy)
2434f565 4902 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4903{
4904 const char *err;
4905 char *name;
4906 int c;
4907 symbolS *symbolP;
4908
4909 do
4910 {
4911 name = input_line_pointer;
4912 c = get_symbol_end ();
4913 symbolP = symbol_find_or_make (name);
4914
4915 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4916 if (err)
542d6675
KH		 4917 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4918 name, err);
800eeca4
JW		 4919
4920 *input_line_pointer = c;
4921 SKIP_WHITESPACE ();
4922 c = *input_line_pointer;
4923 if (c == ',')
4924 {
4925 input_line_pointer++;
4926 SKIP_WHITESPACE ();
4927 if (*input_line_pointer == '\n')
4928 c = '\n';
4929 }
4930 }
4931 while (c == ',');
4932
4933 demand_empty_rest_of_line ();
4934}
4935
197865e8 4936/* .mem.offset offset, base
542d6675
KH		 4937 "base" is used to distinguish between offsets from a different base. */
4938
800eeca4
JW		 4939static void
4940dot_mem_offset (dummy)
2434f565 4941 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4942{
4943 md.mem_offset.hint = 1;
4944 md.mem_offset.offset = get_absolute_expression ();
4945 if (*input_line_pointer != ',')
4946 {
4947 as_bad (_("Comma expected"));
4948 ignore_rest_of_line ();
4949 return;
4950 }
4951 ++input_line_pointer;
4952 md.mem_offset.base = get_absolute_expression ();
4953 demand_empty_rest_of_line ();
4954}
4955
542d6675 4956/* ia64-specific pseudo-ops: */
800eeca4
JW		 4957const pseudo_typeS md_pseudo_table[] =
4958 {
4959 { "radix", dot_radix, 0 },
4960 { "lcomm", s_lcomm_bytes, 1 },
4961 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4962 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4963 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4964 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4965 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4966 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4967 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 4968 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4969 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 4970 { "proc", dot_proc, 0 },
4971 { "body", dot_body, 0 },
4972 { "prologue", dot_prologue, 0 },
2434f565 4973 { "endp", dot_endp, 0 },
2434f565
JW		 4974
4975 { "fframe", dot_fframe, 0 },
4976 { "vframe", dot_vframe, 0 },
4977 { "vframesp", dot_vframesp, 0 },
4978 { "vframepsp", dot_vframepsp, 0 },
4979 { "save", dot_save, 0 },
4980 { "restore", dot_restore, 0 },
4981 { "restorereg", dot_restorereg, 0 },
4982 { "restorereg.p", dot_restorereg_p, 0 },
4983 { "handlerdata", dot_handlerdata, 0 },
4984 { "unwentry", dot_unwentry, 0 },
4985 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 4986 { "savesp", dot_savemem, 0 },
4987 { "savepsp", dot_savemem, 1 },
2434f565
JW		 4988 { "save.g", dot_saveg, 0 },
4989 { "save.f", dot_savef, 0 },
4990 { "save.b", dot_saveb, 0 },
4991 { "save.gf", dot_savegf, 0 },
4992 { "spill", dot_spill, 0 },
4993 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 4994 { "spillsp", dot_spillmem, 0 },
4995 { "spillpsp", dot_spillmem, 1 },
2434f565 4996 { "spillreg.p", dot_spillreg_p, 0 },
e0c9811a
JW		 4997 { "spillsp.p", dot_spillmem_p, 0 },
4998 { "spillpsp.p", dot_spillmem_p, 1 },
2434f565
JW		 4999 { "label_state", dot_label_state, 0 },
5000 { "copy_state", dot_copy_state, 0 },
5001 { "unwabi", dot_unwabi, 0 },
5002 { "personality", dot_personality, 0 },
800eeca4 5003#if 0
2434f565 5004 { "estate", dot_estate, 0 },
800eeca4
JW		 5005#endif
5006 { "mii", dot_template, 0x0 },
5007 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5008 { "mlx", dot_template, 0x2 },
5009 { "mmi", dot_template, 0x4 },
5010 { "mfi", dot_template, 0x6 },
5011 { "mmf", dot_template, 0x7 },
5012 { "mib", dot_template, 0x8 },
5013 { "mbb", dot_template, 0x9 },
5014 { "bbb", dot_template, 0xb },
5015 { "mmb", dot_template, 0xc },
5016 { "mfb", dot_template, 0xe },
5017#if 0
5018 { "lb", dot_scope, 0 },
5019 { "le", dot_scope, 1 },
5020#endif
d9201763 5021 { "align", dot_align, 0 },
800eeca4
JW		 5022 { "regstk", dot_regstk, 0 },
5023 { "rotr", dot_rot, DYNREG_GR },
5024 { "rotf", dot_rot, DYNREG_FR },
5025 { "rotp", dot_rot, DYNREG_PR },
5026 { "lsb", dot_byteorder, 0 },
5027 { "msb", dot_byteorder, 1 },
5028 { "psr", dot_psr, 0 },
5029 { "alias", dot_alias, 0 },
35f5df7f 5030 { "secalias", dot_alias, 1 },
800eeca4
JW		 5031 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5032
5033 { "xdata1", dot_xdata, 1 },
5034 { "xdata2", dot_xdata, 2 },
5035 { "xdata4", dot_xdata, 4 },
5036 { "xdata8", dot_xdata, 8 },
5037 { "xreal4", dot_xfloat_cons, 'f' },
5038 { "xreal8", dot_xfloat_cons, 'd' },
5039 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5040 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5041 { "xstring", dot_xstringer, 0 },
5042 { "xstringz", dot_xstringer, 1 },
5043
542d6675 5044 /* unaligned versions: */
800eeca4
JW		 5045 { "xdata2.ua", dot_xdata_ua, 2 },
5046 { "xdata4.ua", dot_xdata_ua, 4 },
5047 { "xdata8.ua", dot_xdata_ua, 8 },
5048 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5049 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5050 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5051 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5052
5053 /* annotations/DV checking support */
5054 { "entry", dot_entry, 0 },
2434f565 5055 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5056 { "pred.rel", dot_pred_rel, 0 },
5057 { "pred.rel.clear", dot_pred_rel, 'c' },
5058 { "pred.rel.imply", dot_pred_rel, 'i' },
5059 { "pred.rel.mutex", dot_pred_rel, 'm' },
5060 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5061 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5062 { "serialize.data", dot_serialize, 0 },
5063 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5064 { "auto", dot_dv_mode, 'a' },
5065 { "explicit", dot_dv_mode, 'e' },
5066 { "default", dot_dv_mode, 'd' },
5067
87885043
JW		 5068 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5069 IA-64 aligns data allocation pseudo-ops by default, so we have to
5070 tell it that these ones are supposed to be unaligned. Long term,
5071 should rewrite so that only IA-64 specific data allocation pseudo-ops
5072 are aligned by default. */
5073 {"2byte", stmt_cons_ua, 2},
5074 {"4byte", stmt_cons_ua, 4},
5075 {"8byte", stmt_cons_ua, 8},
5076
800eeca4
JW		 5077 { NULL, 0, 0 }
5078 };
5079
5080static const struct pseudo_opcode
5081 {
5082 const char *name;
5083 void (*handler) (int);
5084 int arg;
5085 }
5086pseudo_opcode[] =
5087 {
5088 /* these are more like pseudo-ops, but don't start with a dot */
5089 { "data1", cons, 1 },
5090 { "data2", cons, 2 },
5091 { "data4", cons, 4 },
5092 { "data8", cons, 8 },
3969b680 5093 { "data16", cons, 16 },
800eeca4
JW		 5094 { "real4", stmt_float_cons, 'f' },
5095 { "real8", stmt_float_cons, 'd' },
5096 { "real10", stmt_float_cons, 'x' },
165a7f90 5097 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5098 { "string", stringer, 0 },
5099 { "stringz", stringer, 1 },
5100
542d6675 5101 /* unaligned versions: */
800eeca4
JW		 5102 { "data2.ua", stmt_cons_ua, 2 },
5103 { "data4.ua", stmt_cons_ua, 4 },
5104 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5105 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5106 { "real4.ua", float_cons, 'f' },
5107 { "real8.ua", float_cons, 'd' },
5108 { "real10.ua", float_cons, 'x' },
165a7f90 5109 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5110 };
5111
5112/* Declare a register by creating a symbol for it and entering it in
5113 the symbol table. */
542d6675
KH		 5114
5115static symbolS *
800eeca4
JW		 5116declare_register (name, regnum)
5117 const char *name;
5118 int regnum;
5119{
5120 const char *err;
5121 symbolS *sym;
5122
5123 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5124
5125 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5126 if (err)
5127 as_fatal ("Inserting \"%s\" into register table failed: %s",
5128 name, err);
5129
5130 return sym;
5131}
5132
5133static void
5134declare_register_set (prefix, num_regs, base_regnum)
5135 const char *prefix;
5136 int num_regs;
5137 int base_regnum;
5138{
5139 char name[8];
5140 int i;
5141
5142 for (i = 0; i < num_regs; ++i)
5143 {
5144 sprintf (name, "%s%u", prefix, i);
5145 declare_register (name, base_regnum + i);
5146 }
5147}
5148
5149static unsigned int
5150operand_width (opnd)
5151 enum ia64_opnd opnd;
5152{
5153 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5154 unsigned int bits = 0;
5155 int i;
5156
5157 bits = 0;
5158 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5159 bits += odesc->field[i].bits;
5160
5161 return bits;
5162}
5163
87f8eb97 5164static enum operand_match_result
800eeca4
JW		 5165operand_match (idesc, index, e)
5166 const struct ia64_opcode *idesc;
5167 int index;
5168 expressionS *e;
5169{
5170 enum ia64_opnd opnd = idesc->operands[index];
5171 int bits, relocatable = 0;
5172 struct insn_fix *fix;
5173 bfd_signed_vma val;
5174
5175 switch (opnd)
5176 {
542d6675 5177 /* constants: */
800eeca4
JW		 5178
5179 case IA64_OPND_AR_CCV:
5180 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5181 return OPERAND_MATCH;
800eeca4
JW		 5182 break;
5183
c10d9d8f
JW		 5184 case IA64_OPND_AR_CSD:
5185 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5186 return OPERAND_MATCH;
5187 break;
5188
800eeca4
JW		 5189 case IA64_OPND_AR_PFS:
5190 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5191 return OPERAND_MATCH;
800eeca4
JW		 5192 break;
5193
5194 case IA64_OPND_GR0:
5195 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5196 return OPERAND_MATCH;
800eeca4
JW		 5197 break;
5198
5199 case IA64_OPND_IP:
5200 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5201 return OPERAND_MATCH;
800eeca4
JW		 5202 break;
5203
5204 case IA64_OPND_PR:
5205 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5206 return OPERAND_MATCH;
800eeca4
JW		 5207 break;
5208
5209 case IA64_OPND_PR_ROT:
5210 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5211 return OPERAND_MATCH;
800eeca4
JW		 5212 break;
5213
5214 case IA64_OPND_PSR:
5215 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5216 return OPERAND_MATCH;
800eeca4
JW		 5217 break;
5218
5219 case IA64_OPND_PSR_L:
5220 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5221 return OPERAND_MATCH;
800eeca4
JW		 5222 break;
5223
5224 case IA64_OPND_PSR_UM:
5225 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5226 return OPERAND_MATCH;
800eeca4
JW		 5227 break;
5228
5229 case IA64_OPND_C1:
87f8eb97
JW		 5230 if (e->X_op == O_constant)
5231 {
5232 if (e->X_add_number == 1)
5233 return OPERAND_MATCH;
5234 else
5235 return OPERAND_OUT_OF_RANGE;
5236 }
800eeca4
JW		 5237 break;
5238
5239 case IA64_OPND_C8:
87f8eb97
JW		 5240 if (e->X_op == O_constant)
5241 {
5242 if (e->X_add_number == 8)
5243 return OPERAND_MATCH;
5244 else
5245 return OPERAND_OUT_OF_RANGE;
5246 }
800eeca4
JW		 5247 break;
5248
5249 case IA64_OPND_C16:
87f8eb97
JW		 5250 if (e->X_op == O_constant)
5251 {
5252 if (e->X_add_number == 16)
5253 return OPERAND_MATCH;
5254 else
5255 return OPERAND_OUT_OF_RANGE;
5256 }
800eeca4
JW		 5257 break;
5258
542d6675 5259 /* register operands: */
800eeca4
JW		 5260
5261 case IA64_OPND_AR3:
5262 if (e->X_op == O_register && e->X_add_number >= REG_AR
5263 && e->X_add_number < REG_AR + 128)
87f8eb97 5264 return OPERAND_MATCH;
800eeca4
JW		 5265 break;
5266
5267 case IA64_OPND_B1:
5268 case IA64_OPND_B2:
5269 if (e->X_op == O_register && e->X_add_number >= REG_BR
5270 && e->X_add_number < REG_BR + 8)
87f8eb97 5271 return OPERAND_MATCH;
800eeca4
JW		 5272 break;
5273
5274 case IA64_OPND_CR3:
5275 if (e->X_op == O_register && e->X_add_number >= REG_CR
5276 && e->X_add_number < REG_CR + 128)
87f8eb97 5277 return OPERAND_MATCH;
800eeca4
JW		 5278 break;
5279
5280 case IA64_OPND_F1:
5281 case IA64_OPND_F2:
5282 case IA64_OPND_F3:
5283 case IA64_OPND_F4:
5284 if (e->X_op == O_register && e->X_add_number >= REG_FR
5285 && e->X_add_number < REG_FR + 128)
87f8eb97 5286 return OPERAND_MATCH;
800eeca4
JW		 5287 break;
5288
5289 case IA64_OPND_P1:
5290 case IA64_OPND_P2:
5291 if (e->X_op == O_register && e->X_add_number >= REG_P
5292 && e->X_add_number < REG_P + 64)
87f8eb97 5293 return OPERAND_MATCH;
800eeca4
JW		 5294 break;
5295
5296 case IA64_OPND_R1:
5297 case IA64_OPND_R2:
5298 case IA64_OPND_R3:
5299 if (e->X_op == O_register && e->X_add_number >= REG_GR
5300 && e->X_add_number < REG_GR + 128)
87f8eb97 5301 return OPERAND_MATCH;
800eeca4
JW		 5302 break;
5303
5304 case IA64_OPND_R3_2:
87f8eb97 5305 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5306 {
87f8eb97
JW		 5307 if (e->X_add_number < REG_GR + 4)
5308 return OPERAND_MATCH;
5309 else if (e->X_add_number < REG_GR + 128)
5310 return OPERAND_OUT_OF_RANGE;
5311 }
800eeca4
JW		 5312 break;
5313
542d6675 5314 /* indirect operands: */
800eeca4
JW		 5315 case IA64_OPND_CPUID_R3:
5316 case IA64_OPND_DBR_R3:
5317 case IA64_OPND_DTR_R3:
5318 case IA64_OPND_ITR_R3:
5319 case IA64_OPND_IBR_R3:
5320 case IA64_OPND_MSR_R3:
5321 case IA64_OPND_PKR_R3:
5322 case IA64_OPND_PMC_R3:
5323 case IA64_OPND_PMD_R3:
5324 case IA64_OPND_RR_R3:
5325 if (e->X_op == O_index && e->X_op_symbol
5326 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5327 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5328 return OPERAND_MATCH;
800eeca4
JW		 5329 break;
5330
5331 case IA64_OPND_MR3:
5332 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5333 return OPERAND_MATCH;
800eeca4
JW		 5334 break;
5335
542d6675 5336 /* immediate operands: */
800eeca4
JW		 5337 case IA64_OPND_CNT2a:
5338 case IA64_OPND_LEN4:
5339 case IA64_OPND_LEN6:
5340 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5341 if (e->X_op == O_constant)
5342 {
5343 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5344 return OPERAND_MATCH;
5345 else
5346 return OPERAND_OUT_OF_RANGE;
5347 }
800eeca4
JW		 5348 break;
5349
5350 case IA64_OPND_CNT2b:
87f8eb97
JW		 5351 if (e->X_op == O_constant)
5352 {
5353 if ((bfd_vma) (e->X_add_number - 1) < 3)
5354 return OPERAND_MATCH;
5355 else
5356 return OPERAND_OUT_OF_RANGE;
5357 }
800eeca4
JW		 5358 break;
5359
5360 case IA64_OPND_CNT2c:
5361 val = e->X_add_number;
87f8eb97
JW		 5362 if (e->X_op == O_constant)
5363 {
5364 if ((val == 0 || val == 7 || val == 15 || val == 16))
5365 return OPERAND_MATCH;
5366 else
5367 return OPERAND_OUT_OF_RANGE;
5368 }
800eeca4
JW		 5369 break;
5370
5371 case IA64_OPND_SOR:
5372 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5373 if (e->X_op == O_constant && e->X_add_number & 0x7)
5374 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5375 case IA64_OPND_SOF:
5376 case IA64_OPND_SOL:
87f8eb97
JW		 5377 if (e->X_op == O_constant)
5378 {
5379 if ((bfd_vma) e->X_add_number <= 96)
5380 return OPERAND_MATCH;
5381 else
5382 return OPERAND_OUT_OF_RANGE;
5383 }
800eeca4
JW		 5384 break;
5385
5386 case IA64_OPND_IMMU62:
5387 if (e->X_op == O_constant)
542d6675 5388 {
800eeca4 5389 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5390 return OPERAND_MATCH;
5391 else
5392 return OPERAND_OUT_OF_RANGE;
542d6675 5393 }
197865e8 5394 else
542d6675
KH		 5395 {
5396 /* FIXME -- need 62-bit relocation type */
5397 as_bad (_("62-bit relocation not yet implemented"));
5398 }
800eeca4
JW		 5399 break;
5400
5401 case IA64_OPND_IMMU64:
5402 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5403 || e->X_op == O_subtract)
5404 {
5405 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5406 fix->code = BFD_RELOC_IA64_IMM64;
5407 if (e->X_op != O_subtract)
5408 {
5409 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5410 if (e->X_op == O_pseudo_fixup)
5411 e->X_op = O_symbol;
5412 }
5413
5414 fix->opnd = idesc->operands[index];
5415 fix->expr = *e;
5416 fix->is_pcrel = 0;
5417 ++CURR_SLOT.num_fixups;
87f8eb97 5418 return OPERAND_MATCH;
800eeca4
JW		 5419 }
5420 else if (e->X_op == O_constant)
87f8eb97 5421 return OPERAND_MATCH;
800eeca4
JW		 5422 break;
5423
5424 case IA64_OPND_CCNT5:
5425 case IA64_OPND_CNT5:
5426 case IA64_OPND_CNT6:
5427 case IA64_OPND_CPOS6a:
5428 case IA64_OPND_CPOS6b:
5429 case IA64_OPND_CPOS6c:
5430 case IA64_OPND_IMMU2:
5431 case IA64_OPND_IMMU7a:
5432 case IA64_OPND_IMMU7b:
800eeca4
JW		 5433 case IA64_OPND_IMMU21:
5434 case IA64_OPND_IMMU24:
5435 case IA64_OPND_MBTYPE4:
5436 case IA64_OPND_MHTYPE8:
5437 case IA64_OPND_POS6:
5438 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5439 if (e->X_op == O_constant)
5440 {
5441 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5442 return OPERAND_MATCH;
5443 else
5444 return OPERAND_OUT_OF_RANGE;
5445 }
800eeca4
JW		 5446 break;
5447
bf3ca999
TW		 5448 case IA64_OPND_IMMU9:
5449 bits = operand_width (idesc->operands[index]);
87f8eb97 5450 if (e->X_op == O_constant)
542d6675 5451 {
87f8eb97
JW		 5452 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5453 {
5454 int lobits = e->X_add_number & 0x3;
5455 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5456 e->X_add_number |= (bfd_vma) 0x3;
5457 return OPERAND_MATCH;
5458 }
5459 else
5460 return OPERAND_OUT_OF_RANGE;
542d6675 5461 }
bf3ca999
TW		 5462 break;
5463
800eeca4
JW		 5464 case IA64_OPND_IMM44:
5465 /* least 16 bits must be zero */
5466 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5467 /* XXX technically, this is wrong: we should not be issuing warning
5468 messages until we're sure this instruction pattern is going to
5469 be used! */
542d6675 5470 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5471
87f8eb97 5472 if (e->X_op == O_constant)
542d6675 5473 {
87f8eb97
JW		 5474 if (((e->X_add_number >= 0
5475 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5476 || (e->X_add_number < 0
5477 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5478 {
87f8eb97
JW		 5479 /* sign-extend */
5480 if (e->X_add_number >= 0
5481 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5482 {
5483 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5484 }
5485 return OPERAND_MATCH;
542d6675 5486 }
87f8eb97
JW		 5487 else
5488 return OPERAND_OUT_OF_RANGE;
542d6675 5489 }
800eeca4
JW		 5490 break;
5491
5492 case IA64_OPND_IMM17:
5493 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5494 if (e->X_op == O_constant)
542d6675 5495 {
87f8eb97
JW		 5496 if (((e->X_add_number >= 0
5497 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5498 || (e->X_add_number < 0
5499 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5500 {
87f8eb97
JW		 5501 /* sign-extend */
5502 if (e->X_add_number >= 0
5503 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5504 {
5505 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5506 }
5507 return OPERAND_MATCH;
542d6675 5508 }
87f8eb97
JW		 5509 else
5510 return OPERAND_OUT_OF_RANGE;
542d6675 5511 }
800eeca4
JW		 5512 break;
5513
5514 case IA64_OPND_IMM14:
5515 case IA64_OPND_IMM22:
5516 relocatable = 1;
5517 case IA64_OPND_IMM1:
5518 case IA64_OPND_IMM8:
5519 case IA64_OPND_IMM8U4:
5520 case IA64_OPND_IMM8M1:
5521 case IA64_OPND_IMM8M1U4:
5522 case IA64_OPND_IMM8M1U8:
5523 case IA64_OPND_IMM9a:
5524 case IA64_OPND_IMM9b:
5525 bits = operand_width (idesc->operands[index]);
5526 if (relocatable && (e->X_op == O_symbol
5527 || e->X_op == O_subtract
5528 || e->X_op == O_pseudo_fixup))
5529 {
5530 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5531
5532 if (idesc->operands[index] == IA64_OPND_IMM14)
5533 fix->code = BFD_RELOC_IA64_IMM14;
5534 else
5535 fix->code = BFD_RELOC_IA64_IMM22;
5536
5537 if (e->X_op != O_subtract)
5538 {
5539 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5540 if (e->X_op == O_pseudo_fixup)
5541 e->X_op = O_symbol;
5542 }
5543
5544 fix->opnd = idesc->operands[index];
5545 fix->expr = *e;
5546 fix->is_pcrel = 0;
5547 ++CURR_SLOT.num_fixups;
87f8eb97 5548 return OPERAND_MATCH;
800eeca4
JW		 5549 }
5550 else if (e->X_op != O_constant
5551 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 5552 return OPERAND_MISMATCH;
800eeca4
JW		 5553
5554 if (opnd == IA64_OPND_IMM8M1U4)
5555 {
5556 /* Zero is not valid for unsigned compares that take an adjusted
5557 constant immediate range. */
5558 if (e->X_add_number == 0)
87f8eb97 5559 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5560
5561 /* Sign-extend 32-bit unsigned numbers, so that the following range
5562 checks will work. */
5563 val = e->X_add_number;
197865e8
KH		 5564 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5565 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5566 val = ((val << 32) >> 32);
5567
5568 /* Check for 0x100000000. This is valid because
5569 0x100000000-1 is the same as ((uint32_t) -1). */
5570 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 5571 return OPERAND_MATCH;
800eeca4
JW		 5572
5573 val = val - 1;
5574 }
5575 else if (opnd == IA64_OPND_IMM8M1U8)
5576 {
5577 /* Zero is not valid for unsigned compares that take an adjusted
5578 constant immediate range. */
5579 if (e->X_add_number == 0)
87f8eb97 5580 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5581
5582 /* Check for 0x10000000000000000. */
5583 if (e->X_op == O_big)
5584 {
5585 if (generic_bignum[0] == 0
5586 && generic_bignum[1] == 0
5587 && generic_bignum[2] == 0
5588 && generic_bignum[3] == 0
5589 && generic_bignum[4] == 1)
87f8eb97 5590 return OPERAND_MATCH;
800eeca4 5591 else
87f8eb97 5592 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5593 }
5594 else
5595 val = e->X_add_number - 1;
5596 }
5597 else if (opnd == IA64_OPND_IMM8M1)
5598 val = e->X_add_number - 1;
5599 else if (opnd == IA64_OPND_IMM8U4)
5600 {
5601 /* Sign-extend 32-bit unsigned numbers, so that the following range
5602 checks will work. */
5603 val = e->X_add_number;
197865e8
KH		 5604 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5605 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5606 val = ((val << 32) >> 32);
5607 }
5608 else
5609 val = e->X_add_number;
5610
2434f565
JW		 5611 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5612 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 5613 return OPERAND_MATCH;
5614 else
5615 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5616
5617 case IA64_OPND_INC3:
5618 /* +/- 1, 4, 8, 16 */
5619 val = e->X_add_number;
5620 if (val < 0)
5621 val = -val;
87f8eb97
JW		 5622 if (e->X_op == O_constant)
5623 {
5624 if ((val == 1 || val == 4 || val == 8 || val == 16))
5625 return OPERAND_MATCH;
5626 else
5627 return OPERAND_OUT_OF_RANGE;
5628 }
800eeca4
JW		 5629 break;
5630
5631 case IA64_OPND_TGT25:
5632 case IA64_OPND_TGT25b:
5633 case IA64_OPND_TGT25c:
5634 case IA64_OPND_TGT64:
5635 if (e->X_op == O_symbol)
5636 {
5637 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5638 if (opnd == IA64_OPND_TGT25)
5639 fix->code = BFD_RELOC_IA64_PCREL21F;
5640 else if (opnd == IA64_OPND_TGT25b)
5641 fix->code = BFD_RELOC_IA64_PCREL21M;
5642 else if (opnd == IA64_OPND_TGT25c)
5643 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 5644 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 5645 fix->code = BFD_RELOC_IA64_PCREL60B;
5646 else
5647 abort ();
5648
800eeca4
JW		 5649 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5650 fix->opnd = idesc->operands[index];
5651 fix->expr = *e;
5652 fix->is_pcrel = 1;
5653 ++CURR_SLOT.num_fixups;
87f8eb97 5654 return OPERAND_MATCH;
800eeca4
JW		 5655 }
5656 case IA64_OPND_TAG13:
5657 case IA64_OPND_TAG13b:
5658 switch (e->X_op)
5659 {
5660 case O_constant:
87f8eb97 5661 return OPERAND_MATCH;
800eeca4
JW		 5662
5663 case O_symbol:
5664 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c
JW		 5665 /* There are no external relocs for TAG13/TAG13b fields, so we
5666 create a dummy reloc. This will not live past md_apply_fix3. */
5667 fix->code = BFD_RELOC_UNUSED;
5668 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 5669 fix->opnd = idesc->operands[index];
5670 fix->expr = *e;
5671 fix->is_pcrel = 1;
5672 ++CURR_SLOT.num_fixups;
87f8eb97 5673 return OPERAND_MATCH;
800eeca4
JW		 5674
5675 default:
5676 break;
5677 }
5678 break;
5679
a823923b
RH		 5680 case IA64_OPND_LDXMOV:
5681 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5682 fix->code = BFD_RELOC_IA64_LDXMOV;
5683 fix->opnd = idesc->operands[index];
5684 fix->expr = *e;
5685 fix->is_pcrel = 0;
5686 ++CURR_SLOT.num_fixups;
5687 return OPERAND_MATCH;
5688
800eeca4
JW		 5689 default:
5690 break;
5691 }
87f8eb97 5692 return OPERAND_MISMATCH;
800eeca4
JW		 5693}
5694
5695static int
5696parse_operand (e)
5697 expressionS *e;
5698{
5699 int sep = '\0';
5700
5701 memset (e, 0, sizeof (*e));
5702 e->X_op = O_absent;
5703 SKIP_WHITESPACE ();
5704 if (*input_line_pointer != '}')
5705 expression (e);
5706 sep = *input_line_pointer++;
5707
5708 if (sep == '}')
5709 {
5710 if (!md.manual_bundling)
5711 as_warn ("Found '}' when manual bundling is off");
5712 else
5713 CURR_SLOT.manual_bundling_off = 1;
5714 md.manual_bundling = 0;
5715 sep = '\0';
5716 }
5717 return sep;
5718}
5719
5720/* Returns the next entry in the opcode table that matches the one in
5721 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 5722 found, NULL is returned instead. */
800eeca4
JW		 5723
5724static struct ia64_opcode *
5725get_next_opcode (struct ia64_opcode *idesc)
5726{
5727 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5728 ia64_free_opcode (idesc);
5729 return next;
5730}
5731
5732/* Parse the operands for the opcode and find the opcode variant that
5733 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 5734
5735static struct ia64_opcode *
800eeca4
JW		 5736parse_operands (idesc)
5737 struct ia64_opcode *idesc;
5738{
5739 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 5740 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
800eeca4 5741 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 5742 enum operand_match_result result;
800eeca4
JW		 5743 char mnemonic[129];
5744 char *first_arg = 0, *end, *saved_input_pointer;
5745 unsigned int sof;
5746
5747 assert (strlen (idesc->name) <= 128);
5748
5749 strcpy (mnemonic, idesc->name);
5750 if (idesc->operands[2] == IA64_OPND_SOF)
5751 {
5752 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5753 can't parse the first operand until we have parsed the
5754 remaining operands of the "alloc" instruction. */
5755 SKIP_WHITESPACE ();
5756 first_arg = input_line_pointer;
5757 end = strchr (input_line_pointer, '=');
5758 if (!end)
5759 {
5760 as_bad ("Expected separator `='");
5761 return 0;
5762 }
5763 input_line_pointer = end + 1;
5764 ++i;
5765 ++num_outputs;
5766 }
5767
5768 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5769 {
5770 sep = parse_operand (CURR_SLOT.opnd + i);
5771 if (CURR_SLOT.opnd[i].X_op == O_absent)
5772 break;
5773
5774 ++num_operands;
5775
5776 if (sep != '=' && sep != ',')
5777 break;
5778
5779 if (sep == '=')
5780 {
5781 if (num_outputs > 0)
5782 as_bad ("Duplicate equal sign (=) in instruction");
5783 else
5784 num_outputs = i + 1;
5785 }
5786 }
5787 if (sep != '\0')
5788 {
5789 as_bad ("Illegal operand separator `%c'", sep);
5790 return 0;
5791 }
197865e8 5792
800eeca4
JW		 5793 if (idesc->operands[2] == IA64_OPND_SOF)
5794 {
5795 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5796 know (strcmp (idesc->name, "alloc") == 0);
5797 if (num_operands == 5 /* first_arg not included in this count! */
5798 && CURR_SLOT.opnd[2].X_op == O_constant
5799 && CURR_SLOT.opnd[3].X_op == O_constant
5800 && CURR_SLOT.opnd[4].X_op == O_constant
5801 && CURR_SLOT.opnd[5].X_op == O_constant)
5802 {
5803 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5804 CURR_SLOT.opnd[3].X_add_number,
5805 CURR_SLOT.opnd[4].X_add_number,
5806 CURR_SLOT.opnd[5].X_add_number);
5807
542d6675 5808 /* now we can parse the first arg: */
800eeca4
JW		 5809 saved_input_pointer = input_line_pointer;
5810 input_line_pointer = first_arg;
5811 sep = parse_operand (CURR_SLOT.opnd + 0);
5812 if (sep != '=')
5813 --num_outputs; /* force error */
5814 input_line_pointer = saved_input_pointer;
5815
5816 CURR_SLOT.opnd[2].X_add_number = sof;
5817 CURR_SLOT.opnd[3].X_add_number
5818 = sof - CURR_SLOT.opnd[4].X_add_number;
5819 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5820 }
5821 }
5822
5823 highest_unmatched_operand = 0;
87f8eb97
JW		 5824 curr_out_of_range_pos = -1;
5825 error_pos = 0;
800eeca4
JW		 5826 expected_operand = idesc->operands[0];
5827 for (; idesc; idesc = get_next_opcode (idesc))
5828 {
5829 if (num_outputs != idesc->num_outputs)
5830 continue; /* mismatch in # of outputs */
5831
5832 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 5833
5834 /* Try to match all operands. If we see an out-of-range operand,
5835 then continue trying to match the rest of the operands, since if
5836 the rest match, then this idesc will give the best error message. */
5837
5838 out_of_range_pos = -1;
800eeca4 5839 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 5840 {
5841 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5842 if (result != OPERAND_MATCH)
5843 {
5844 if (result != OPERAND_OUT_OF_RANGE)
5845 break;
5846 if (out_of_range_pos < 0)
5847 /* remember position of the first out-of-range operand: */
5848 out_of_range_pos = i;
5849 }
5850 }
800eeca4 5851
87f8eb97
JW		 5852 /* If we did not match all operands, or if at least one operand was
5853 out-of-range, then this idesc does not match. Keep track of which
5854 idesc matched the most operands before failing. If we have two
5855 idescs that failed at the same position, and one had an out-of-range
5856 operand, then prefer the out-of-range operand. Thus if we have
5857 "add r0=0x1000000,r1" we get an error saying the constant is out
5858 of range instead of an error saying that the constant should have been
5859 a register. */
5860
5861 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 5862 {
87f8eb97
JW		 5863 if (i > highest_unmatched_operand
5864 || (i == highest_unmatched_operand
5865 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 5866 {
5867 highest_unmatched_operand = i;
87f8eb97
JW		 5868 if (out_of_range_pos >= 0)
5869 {
5870 expected_operand = idesc->operands[out_of_range_pos];
5871 error_pos = out_of_range_pos;
5872 }
5873 else
5874 {
5875 expected_operand = idesc->operands[i];
5876 error_pos = i;
5877 }
5878 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 5879 }
5880 continue;
5881 }
5882
5883 if (num_operands < NELEMS (idesc->operands)
5884 && idesc->operands[num_operands])
5885 continue; /* mismatch in number of arguments */
5886
5887 break;
5888 }
5889 if (!idesc)
5890 {
5891 if (expected_operand)
5892 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 5893 error_pos + 1, mnemonic,
800eeca4
JW		 5894 elf64_ia64_operands[expected_operand].desc);
5895 else
5896 as_bad ("Operand mismatch");
5897 return 0;
5898 }
5899 return idesc;
5900}
5901
88be23ec
BS		 5902/* Keep track of state necessary to determine whether a NOP is necessary
5903 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5904 detect a case where additional NOPs may be necessary. */
5905static int
5906errata_nop_necessary_p (slot, insn_unit)
5907 struct slot *slot;
5908 enum ia64_unit insn_unit;
5909{
5910 int i;
5911 struct group *this_group = md.last_groups + md.group_idx;
5912 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5913 struct ia64_opcode *idesc = slot->idesc;
5914
5915 /* Test whether this could be the first insn in a problematic sequence. */
5916 if (insn_unit == IA64_UNIT_F)
5917 {
5918 for (i = 0; i < idesc->num_outputs; i++)
5919 if (idesc->operands[i] == IA64_OPND_P1
5920 || idesc->operands[i] == IA64_OPND_P2)
5921 {
5922 int regno = slot->opnd[i].X_add_number - REG_P;
3557da92 5923 /* Ignore invalid operands; they generate errors elsewhere. */
ca683b78 5924 if (regno >= 64)
3557da92 5925 return 0;
88be23ec
BS		 5926 this_group->p_reg_set[regno] = 1;
5927 }
5928 }
5929
5930 /* Test whether this could be the second insn in a problematic sequence. */
5931 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5932 && prev_group->p_reg_set[slot->qp_regno])
5933 {
5934 for (i = 0; i < idesc->num_outputs; i++)
5935 if (idesc->operands[i] == IA64_OPND_R1
5936 || idesc->operands[i] == IA64_OPND_R2
5937 || idesc->operands[i] == IA64_OPND_R3)
5938 {
5939 int regno = slot->opnd[i].X_add_number - REG_GR;
3557da92 5940 /* Ignore invalid operands; they generate errors elsewhere. */
ca683b78 5941 if (regno >= 128)
3557da92 5942 return 0;
88be23ec
BS		 5943 if (strncmp (idesc->name, "add", 3) != 0
5944 && strncmp (idesc->name, "sub", 3) != 0
5945 && strncmp (idesc->name, "shladd", 6) != 0
5946 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5947 this_group->g_reg_set_conditionally[regno] = 1;
5948 }
5949 }
5950
5951 /* Test whether this could be the third insn in a problematic sequence. */
5952 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5953 {
5954 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5955 idesc->operands[i] == IA64_OPND_R3
5956 /* For mov indirect. */
5957 || idesc->operands[i] == IA64_OPND_RR_R3
5958 || idesc->operands[i] == IA64_OPND_DBR_R3
5959 || idesc->operands[i] == IA64_OPND_IBR_R3
5960 || idesc->operands[i] == IA64_OPND_PKR_R3
5961 || idesc->operands[i] == IA64_OPND_PMC_R3
5962 || idesc->operands[i] == IA64_OPND_PMD_R3
5963 || idesc->operands[i] == IA64_OPND_MSR_R3
5964 || idesc->operands[i] == IA64_OPND_CPUID_R3
5965 /* For itr. */
5966 || idesc->operands[i] == IA64_OPND_ITR_R3
5967 || idesc->operands[i] == IA64_OPND_DTR_R3
5968 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5969 || idesc->operands[i] == IA64_OPND_MR3)
5970 {
5971 int regno = slot->opnd[i].X_add_number - REG_GR;
3557da92 5972 /* Ignore invalid operands; they generate errors elsewhere. */
ca683b78 5973 if (regno >= 128)
3557da92 5974 return 0;
88be23ec
BS		 5975 if (idesc->operands[i] == IA64_OPND_R3)
5976 {
5977 if (strcmp (idesc->name, "fc") != 0
5978 && strcmp (idesc->name, "tak") != 0
5979 && strcmp (idesc->name, "thash") != 0
5980 && strcmp (idesc->name, "tpa") != 0
5981 && strcmp (idesc->name, "ttag") != 0
5982 && strncmp (idesc->name, "ptr", 3) != 0
5983 && strncmp (idesc->name, "ptc", 3) != 0
5984 && strncmp (idesc->name, "probe", 5) != 0)
40449e9f 5985 return 0;
88be23ec 5986 }
bc805888 5987 if (prev_group->g_reg_set_conditionally[regno])
88be23ec
BS		 5988 return 1;
5989 }
5990 }
5991 return 0;
5992}
5993
800eeca4
JW		 5994static void
5995build_insn (slot, insnp)
5996 struct slot *slot;
5997 bfd_vma *insnp;
5998{
5999 const struct ia64_operand *odesc, *o2desc;
6000 struct ia64_opcode *idesc = slot->idesc;
6001 bfd_signed_vma insn, val;
6002 const char *err;
6003 int i;
6004
6005 insn = idesc->opcode | slot->qp_regno;
6006
6007 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6008 {
c67e42c9
RH		 6009 if (slot->opnd[i].X_op == O_register
6010 || slot->opnd[i].X_op == O_constant
6011 || slot->opnd[i].X_op == O_index)
6012 val = slot->opnd[i].X_add_number;
6013 else if (slot->opnd[i].X_op == O_big)
800eeca4 6014 {
c67e42c9
RH		 6015 /* This must be the value 0x10000000000000000. */
6016 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6017 val = 0;
6018 }
6019 else
6020 val = 0;
6021
6022 switch (idesc->operands[i])
6023 {
6024 case IA64_OPND_IMMU64:
800eeca4
JW		 6025 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6026 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6027 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6028 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6029 continue;
6030
6031 case IA64_OPND_IMMU62:
542d6675
KH		 6032 val &= 0x3fffffffffffffffULL;
6033 if (val != slot->opnd[i].X_add_number)
6034 as_warn (_("Value truncated to 62 bits"));
6035 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6036 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6037 continue;
800eeca4 6038
c67e42c9
RH		 6039 case IA64_OPND_TGT64:
6040 val >>= 4;
6041 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6042 insn |= ((((val >> 59) & 0x1) << 36)
6043 | (((val >> 0) & 0xfffff) << 13));
6044 continue;
800eeca4 6045
c67e42c9
RH		 6046 case IA64_OPND_AR3:
6047 val -= REG_AR;
6048 break;
6049
6050 case IA64_OPND_B1:
6051 case IA64_OPND_B2:
6052 val -= REG_BR;
6053 break;
6054
6055 case IA64_OPND_CR3:
6056 val -= REG_CR;
6057 break;
6058
6059 case IA64_OPND_F1:
6060 case IA64_OPND_F2:
6061 case IA64_OPND_F3:
6062 case IA64_OPND_F4:
6063 val -= REG_FR;
6064 break;
6065
6066 case IA64_OPND_P1:
6067 case IA64_OPND_P2:
6068 val -= REG_P;
6069 break;
6070
6071 case IA64_OPND_R1:
6072 case IA64_OPND_R2:
6073 case IA64_OPND_R3:
6074 case IA64_OPND_R3_2:
6075 case IA64_OPND_CPUID_R3:
6076 case IA64_OPND_DBR_R3:
6077 case IA64_OPND_DTR_R3:
6078 case IA64_OPND_ITR_R3:
6079 case IA64_OPND_IBR_R3:
6080 case IA64_OPND_MR3:
6081 case IA64_OPND_MSR_R3:
6082 case IA64_OPND_PKR_R3:
6083 case IA64_OPND_PMC_R3:
6084 case IA64_OPND_PMD_R3:
197865e8 6085 case IA64_OPND_RR_R3:
c67e42c9
RH		 6086 val -= REG_GR;
6087 break;
6088
6089 default:
6090 break;
6091 }
6092
6093 odesc = elf64_ia64_operands + idesc->operands[i];
6094 err = (*odesc->insert) (odesc, val, &insn);
6095 if (err)
6096 as_bad_where (slot->src_file, slot->src_line,
6097 "Bad operand value: %s", err);
6098 if (idesc->flags & IA64_OPCODE_PSEUDO)
6099 {
6100 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6101 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6102 {
6103 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6104 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6105 }
c67e42c9
RH		 6106 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6107 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6108 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6109 {
c67e42c9
RH		 6110 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6111 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6112 }
6113 }
6114 }
6115 *insnp = insn;
6116}
6117
6118static void
6119emit_one_bundle ()
6120{
6121 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6122 unsigned int manual_bundling = 0;
6123 enum ia64_unit required_unit, insn_unit = 0;
6124 enum ia64_insn_type type[3], insn_type;
6125 unsigned int template, orig_template;
542d6675 6126 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6127 struct ia64_opcode *idesc;
6128 int end_of_insn_group = 0, user_template = -1;
6129 int n, i, j, first, curr;
d6e78c11 6130 unw_rec_list *ptr, *last_ptr, *end_ptr;
800eeca4
JW		 6131 bfd_vma t0 = 0, t1 = 0;
6132 struct label_fix *lfix;
6133 struct insn_fix *ifix;
6134 char mnemonic[16];
6135 fixS *fix;
6136 char *f;
5a9ff93d 6137 int addr_mod;
800eeca4
JW		 6138
6139 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6140 know (first >= 0 & first < NUM_SLOTS);
6141 n = MIN (3, md.num_slots_in_use);
6142
6143 /* Determine template: user user_template if specified, best match
542d6675 6144 otherwise: */
800eeca4
JW		 6145
6146 if (md.slot[first].user_template >= 0)
6147 user_template = template = md.slot[first].user_template;
6148 else
6149 {
032efc85 6150 /* Auto select appropriate template. */
800eeca4
JW		 6151 memset (type, 0, sizeof (type));
6152 curr = first;
6153 for (i = 0; i < n; ++i)
6154 {
032efc85
RH		 6155 if (md.slot[curr].label_fixups && i != 0)
6156 break;
800eeca4
JW		 6157 type[i] = md.slot[curr].idesc->type;
6158 curr = (curr + 1) % NUM_SLOTS;
6159 }
6160 template = best_template[type[0]][type[1]][type[2]];
6161 }
6162
542d6675 6163 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6164 for (i = 0; i < 3; ++i)
6165 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6166
6167 f = frag_more (16);
6168
5a9ff93d
JW		 6169 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6170 from the start of the frag. */
6171 addr_mod = frag_now_fix () & 15;
6172 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6173 as_bad (_("instruction address is not a multiple of 16"));
6174 frag_now->insn_addr = addr_mod;
6175 frag_now->has_code = 1;
6176
542d6675 6177 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6178 curr = first;
6179 idesc = md.slot[curr].idesc;
6180 end_of_insn_group = 0;
6181 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6182 {
d6e78c11
JW		 6183 /* If we have unwind records, we may need to update some now. */
6184 ptr = md.slot[curr].unwind_record;
6185 if (ptr)
6186 {
6187 /* Find the last prologue/body record in the list for the current
6188 insn, and set the slot number for all records up to that point.
6189 This needs to be done now, because prologue/body records refer to
6190 the current point, not the point after the instruction has been
6191 issued. This matters because there may have been nops emitted
6192 meanwhile. Any non-prologue non-body record followed by a
6193 prologue/body record must also refer to the current point. */
6194 last_ptr = NULL;
6195 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6196 for (; ptr != end_ptr; ptr = ptr->next)
6197 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6198 || ptr->r.type == body)
6199 last_ptr = ptr;
6200 if (last_ptr)
6201 {
6202 /* Make last_ptr point one after the last prologue/body
6203 record. */
6204 last_ptr = last_ptr->next;
6205 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6206 ptr = ptr->next)
6207 {
6208 ptr->slot_number = (unsigned long) f + i;
6209 ptr->slot_frag = frag_now;
6210 }
6211 /* Remove the initialized records, so that we won't accidentally
6212 update them again if we insert a nop and continue. */
6213 md.slot[curr].unwind_record = last_ptr;
6214 }
6215 }
e0c9811a 6216
800eeca4
JW		 6217 if (idesc->flags & IA64_OPCODE_SLOT2)
6218 {
6219 if (manual_bundling && i != 2)
6220 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6221 "`%s' must be last in bundle", idesc->name);
6222 else
6223 i = 2;
6224 }
6225 if (idesc->flags & IA64_OPCODE_LAST)
6226 {
2434f565
JW		 6227 int required_slot;
6228 unsigned int required_template;
800eeca4
JW		 6229
6230 /* If we need a stop bit after an M slot, our only choice is
6231 template 5 (M;;MI). If we need a stop bit after a B
6232 slot, our only choice is to place it at the end of the
6233 bundle, because the only available templates are MIB,
6234 MBB, BBB, MMB, and MFB. We don't handle anything other
6235 than M and B slots because these are the only kind of
6236 instructions that can have the IA64_OPCODE_LAST bit set. */
6237 required_template = template;
6238 switch (idesc->type)
6239 {
6240 case IA64_TYPE_M:
6241 required_slot = 0;
6242 required_template = 5;
6243 break;
6244
6245 case IA64_TYPE_B:
6246 required_slot = 2;
6247 break;
6248
6249 default:
6250 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6251 "Internal error: don't know how to force %s to end"
6252 "of instruction group", idesc->name);
6253 required_slot = i;
6254 break;
6255 }
6256 if (manual_bundling && i != required_slot)
6257 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6258 "`%s' must be last in instruction group",
6259 idesc->name);
6260 if (required_slot < i)
6261 /* Can't fit this instruction. */
6262 break;
6263
6264 i = required_slot;
6265 if (required_template != template)
6266 {
6267 /* If we switch the template, we need to reset the NOPs
6268 after slot i. The slot-types of the instructions ahead
6269 of i never change, so we don't need to worry about
6270 changing NOPs in front of this slot. */
6271 for (j = i; j < 3; ++j)
6272 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6273 }
6274 template = required_template;
6275 }
6276 if (curr != first && md.slot[curr].label_fixups)
6277 {
6278 if (manual_bundling_on)
6279 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6280 "Label must be first in a bundle");
6281 /* This insn must go into the first slot of a bundle. */
6282 break;
6283 }
6284
6285 manual_bundling_on = md.slot[curr].manual_bundling_on;
6286 manual_bundling_off = md.slot[curr].manual_bundling_off;
6287
6288 if (manual_bundling_on)
6289 {
6290 if (curr == first)
6291 manual_bundling = 1;
6292 else
6293 break; /* need to start a new bundle */
6294 }
6295
6296 if (end_of_insn_group && md.num_slots_in_use >= 1)
6297 {
6298 /* We need an instruction group boundary in the middle of a
6299 bundle. See if we can switch to an other template with
6300 an appropriate boundary. */
6301
6302 orig_template = template;
6303 if (i == 1 && (user_template == 4
6304 || (user_template < 0
6305 && (ia64_templ_desc[template].exec_unit[0]
6306 == IA64_UNIT_M))))
6307 {
6308 template = 5;
6309 end_of_insn_group = 0;
6310 }
6311 else if (i == 2 && (user_template == 0
6312 || (user_template < 0
6313 && (ia64_templ_desc[template].exec_unit[1]
6314 == IA64_UNIT_I)))
6315 /* This test makes sure we don't switch the template if
6316 the next instruction is one that needs to be first in
6317 an instruction group. Since all those instructions are
6318 in the M group, there is no way such an instruction can
6319 fit in this bundle even if we switch the template. The
6320 reason we have to check for this is that otherwise we
6321 may end up generating "MI;;I M.." which has the deadly
6322 effect that the second M instruction is no longer the
6323 first in the bundle! --davidm 99/12/16 */
6324 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6325 {
6326 template = 1;
6327 end_of_insn_group = 0;
6328 }
6329 else if (curr != first)
6330 /* can't fit this insn */
6331 break;
6332
6333 if (template != orig_template)
6334 /* if we switch the template, we need to reset the NOPs
6335 after slot i. The slot-types of the instructions ahead
6336 of i never change, so we don't need to worry about
6337 changing NOPs in front of this slot. */
6338 for (j = i; j < 3; ++j)
6339 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6340 }
6341 required_unit = ia64_templ_desc[template].exec_unit[i];
6342
c10d9d8f 6343 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6344 if (idesc->type == IA64_TYPE_DYN)
6345 {
6346 if ((strcmp (idesc->name, "nop") == 0)
c10d9d8f 6347 || (strcmp (idesc->name, "hint") == 0)
800eeca4
JW		 6348 || (strcmp (idesc->name, "break") == 0))
6349 insn_unit = required_unit;
6350 else if (strcmp (idesc->name, "chk.s") == 0)
6351 {
6352 insn_unit = IA64_UNIT_M;
6353 if (required_unit == IA64_UNIT_I)
6354 insn_unit = IA64_UNIT_I;
6355 }
6356 else
6357 as_fatal ("emit_one_bundle: unexpected dynamic op");
6358
6359 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
3d56ab85 6360 ia64_free_opcode (idesc);
800eeca4
JW		 6361 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6362#if 0
6363 know (!idesc->next); /* no resolved dynamic ops have collisions */
6364#endif
6365 }
6366 else
6367 {
6368 insn_type = idesc->type;
6369 insn_unit = IA64_UNIT_NIL;
6370 switch (insn_type)
6371 {
6372 case IA64_TYPE_A:
6373 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6374 insn_unit = required_unit;
6375 break;
542d6675 6376 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6377 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6378 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6379 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6380 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6381 default: break;
6382 }
6383 }
6384
6385 if (insn_unit != required_unit)
6386 {
6387 if (required_unit == IA64_UNIT_L
542d6675 6388 && insn_unit == IA64_UNIT_I
800eeca4
JW		 6389 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6390 {
6391 /* we got ourselves an MLX template but the current
197865e8 6392 instruction isn't an X-unit, or an I-unit instruction
800eeca4
JW		 6393 that can go into the X slot of an MLX template. Duh. */
6394 if (md.num_slots_in_use >= NUM_SLOTS)
6395 {
6396 as_bad_where (md.slot[curr].src_file,
6397 md.slot[curr].src_line,
6398 "`%s' can't go in X slot of "
6399 "MLX template", idesc->name);
542d6675 6400 /* drop this insn so we don't livelock: */
800eeca4
JW		 6401 --md.num_slots_in_use;
6402 }
6403 break;
6404 }
6405 continue; /* try next slot */
6406 }
6407
40449e9f
KH		 6408 {
6409 bfd_vma addr;
800eeca4 6410
40449e9f
KH		 6411 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6412 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6413 }
800eeca4 6414
88be23ec
BS		 6415 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6416 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6417
800eeca4
JW		 6418 build_insn (md.slot + curr, insn + i);
6419
d6e78c11
JW		 6420 ptr = md.slot[curr].unwind_record;
6421 if (ptr)
6422 {
6423 /* Set slot numbers for all remaining unwind records belonging to the
6424 current insn. There can not be any prologue/body unwind records
6425 here. */
6426 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6427 for (; ptr != end_ptr; ptr = ptr->next)
6428 {
6429 ptr->slot_number = (unsigned long) f + i;
6430 ptr->slot_frag = frag_now;
6431 }
6432 md.slot[curr].unwind_record = NULL;
6433 }
10850f29 6434
800eeca4
JW		 6435 if (required_unit == IA64_UNIT_L)
6436 {
6437 know (i == 1);
6438 /* skip one slot for long/X-unit instructions */
6439 ++i;
6440 }
6441 --md.num_slots_in_use;
6442
542d6675 6443 /* now is a good time to fix up the labels for this insn: */
800eeca4
JW		 6444 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6445 {
6446 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6447 symbol_set_frag (lfix->sym, frag_now);
6448 }
f1bcba5b
JW		 6449 /* and fix up the tags also. */
6450 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6451 {
6452 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6453 symbol_set_frag (lfix->sym, frag_now);
6454 }
800eeca4
JW		 6455
6456 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6457 {
6458 ifix = md.slot[curr].fixup + j;
5a080f89 6459 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 6460 &ifix->expr, ifix->is_pcrel, ifix->code);
6461 fix->tc_fix_data.opnd = ifix->opnd;
6462 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6463 fix->fx_file = md.slot[curr].src_file;
6464 fix->fx_line = md.slot[curr].src_line;
6465 }
6466
6467 end_of_insn_group = md.slot[curr].end_of_insn_group;
6468
88be23ec
BS		 6469 if (end_of_insn_group)
6470 {
6471 md.group_idx = (md.group_idx + 1) % 3;
6472 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6473 }
6474
542d6675 6475 /* clear slot: */
800eeca4
JW		 6476 ia64_free_opcode (md.slot[curr].idesc);
6477 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6478 md.slot[curr].user_template = -1;
6479
6480 if (manual_bundling_off)
6481 {
6482 manual_bundling = 0;
6483 break;
6484 }
6485 curr = (curr + 1) % NUM_SLOTS;
6486 idesc = md.slot[curr].idesc;
6487 }
6488 if (manual_bundling)
6489 {
6490 if (md.num_slots_in_use > 0)
6491 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6492 "`%s' does not fit into %s template",
6493 idesc->name, ia64_templ_desc[template].name);
6494 else
6495 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6496 "Missing '}' at end of file");
6497 }
6498 know (md.num_slots_in_use < NUM_SLOTS);
6499
6500 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6501 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6502
44f5c83a
JW		 6503 number_to_chars_littleendian (f + 0, t0, 8);
6504 number_to_chars_littleendian (f + 8, t1, 8);
f5a30c2e 6505
73f20958
L		 6506 if (unwind.list)
6507 {
127cab00
L		 6508 unwind.list->next_slot_number = (unsigned long) f + 16;
6509 unwind.list->next_slot_frag = frag_now;
73f20958 6510 }
800eeca4
JW		 6511}
6512
6513int
6514md_parse_option (c, arg)
6515 int c;
6516 char *arg;
6517{
7463c317 6518
800eeca4
JW		 6519 switch (c)
6520 {
c43c2cc5 6521 /* Switches from the Intel assembler. */
44f5c83a 6522 case 'm':
800eeca4
JW		 6523 if (strcmp (arg, "ilp64") == 0
6524 || strcmp (arg, "lp64") == 0
6525 || strcmp (arg, "p64") == 0)
6526 {
6527 md.flags |= EF_IA_64_ABI64;
6528 }
6529 else if (strcmp (arg, "ilp32") == 0)
6530 {
6531 md.flags &= ~EF_IA_64_ABI64;
6532 }
6533 else if (strcmp (arg, "le") == 0)
6534 {
6535 md.flags &= ~EF_IA_64_BE;
549f748d 6536 default_big_endian = 0;
800eeca4
JW		 6537 }
6538 else if (strcmp (arg, "be") == 0)
6539 {
6540 md.flags |= EF_IA_64_BE;
549f748d 6541 default_big_endian = 1;
800eeca4
JW		 6542 }
6543 else
6544 return 0;
6545 break;
6546
6547 case 'N':
6548 if (strcmp (arg, "so") == 0)
6549 {
542d6675 6550 /* Suppress signon message. */
800eeca4
JW		 6551 }
6552 else if (strcmp (arg, "pi") == 0)
6553 {
6554 /* Reject privileged instructions. FIXME */
6555 }
6556 else if (strcmp (arg, "us") == 0)
6557 {
6558 /* Allow union of signed and unsigned range. FIXME */
6559 }
6560 else if (strcmp (arg, "close_fcalls") == 0)
6561 {
6562 /* Do not resolve global function calls. */
6563 }
6564 else
6565 return 0;
6566 break;
6567
6568 case 'C':
6569 /* temp[="prefix"] Insert temporary labels into the object file
6570 symbol table prefixed by "prefix".
6571 Default prefix is ":temp:".
6572 */
6573 break;
6574
6575 case 'a':
800eeca4
JW		 6576 /* indirect=<tgt> Assume unannotated indirect branches behavior
6577 according to <tgt> --
6578 exit: branch out from the current context (default)
6579 labels: all labels in context may be branch targets
6580 */
85b40035
L		 6581 if (strncmp (arg, "indirect=", 9) != 0)
6582 return 0;
800eeca4
JW		 6583 break;
6584
6585 case 'x':
6586 /* -X conflicts with an ignored option, use -x instead */
6587 md.detect_dv = 1;
6588 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 6589 {
6590 /* set default mode to explicit */
6591 md.default_explicit_mode = 1;
6592 break;
6593 }
800eeca4 6594 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 6595 {
6596 md.default_explicit_mode = 0;
6597 }
800eeca4 6598 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 6599 {
6600 md.debug_dv = 1;
6601 }
800eeca4 6602 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 6603 {
6604 md.default_explicit_mode = 1;
6605 md.debug_dv = 1;
6606 }
800eeca4 6607 else
542d6675
KH		 6608 {
6609 as_bad (_("Unrecognized option '-x%s'"), arg);
6610 }
800eeca4
JW		 6611 break;
6612
6613 case 'S':
6614 /* nops Print nops statistics. */
6615 break;
6616
c43c2cc5
JW		 6617 /* GNU specific switches for gcc. */
6618 case OPTION_MCONSTANT_GP:
6619 md.flags |= EF_IA_64_CONS_GP;
6620 break;
6621
6622 case OPTION_MAUTO_PIC:
6623 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6624 break;
6625
800eeca4
JW		 6626 default:
6627 return 0;
6628 }
6629
6630 return 1;
6631}
6632
6633void
6634md_show_usage (stream)
6635 FILE *stream;
6636{
542d6675 6637 fputs (_("\
800eeca4 6638IA-64 options:\n\
6290819d
NC		 6639 --mconstant-gp mark output file as using the constant-GP model\n\
6640 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6641 --mauto-pic mark output file as using the constant-GP model\n\
6642 without function descriptors (sets ELF header flag\n\
6643 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 6644 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6645 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
800eeca4
JW		 6646 -x | -xexplicit turn on dependency violation checking (default)\n\
6647 -xauto automagically remove dependency violations\n\
6648 -xdebug debug dependency violation checker\n"),
6649 stream);
6650}
6651
acebd4ce
AS		 6652void
6653ia64_after_parse_args ()
6654{
6655 if (debug_type == DEBUG_STABS)
6656 as_fatal (_("--gstabs is not supported for ia64"));
6657}
6658
44576e1f
RH		 6659/* Return true if TYPE fits in TEMPL at SLOT. */
6660
6661static int
800eeca4
JW		 6662match (int templ, int type, int slot)
6663{
6664 enum ia64_unit unit;
6665 int result;
6666
6667 unit = ia64_templ_desc[templ].exec_unit[slot];
6668 switch (type)
6669 {
6670 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6671 case IA64_TYPE_A:
6672 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6673 break;
6674 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6675 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6676 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6677 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6678 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6679 default: result = 0; break;
6680 }
6681 return result;
6682}
6683
44576e1f
RH		 6684/* Add a bit of extra goodness if a nop of type F or B would fit
6685 in TEMPL at SLOT. */
6686
6687static inline int
6688extra_goodness (int templ, int slot)
6689{
ebeeafe6 6690 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
44576e1f 6691 return 2;
ebeeafe6 6692 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
44576e1f
RH		 6693 return 1;
6694 return 0;
6695}
6696
800eeca4
JW		 6697/* This function is called once, at assembler startup time. It sets
6698 up all the tables, etc. that the MD part of the assembler will need
6699 that can be determined before arguments are parsed. */
6700void
6701md_begin ()
6702{
44f5c83a 6703 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
800eeca4
JW		 6704 const char *err;
6705 char name[8];
6706
6707 md.auto_align = 1;
6708 md.explicit_mode = md.default_explicit_mode;
6709
6710 bfd_set_section_alignment (stdoutput, text_section, 4);
6711
0234cb7c 6712 /* Make sure function pointers get initialized. */
10a98291 6713 target_big_endian = -1;
549f748d 6714 dot_byteorder (default_big_endian);
10a98291 6715
35f5df7f
L		 6716 alias_hash = hash_new ();
6717 alias_name_hash = hash_new ();
6718 secalias_hash = hash_new ();
6719 secalias_name_hash = hash_new ();
6720
13ae64f3
JJ		 6721 pseudo_func[FUNC_DTP_MODULE].u.sym =
6722 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6723 &zero_address_frag);
6724
6725 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6726 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6727 &zero_address_frag);
6728
800eeca4 6729 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 6730 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6731 &zero_address_frag);
800eeca4
JW		 6732
6733 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 6734 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6735 &zero_address_frag);
800eeca4
JW		 6736
6737 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 6738 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6739 &zero_address_frag);
800eeca4 6740
fa2c7eff
RH		 6741 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6742 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6743 &zero_address_frag);
6744
c67e42c9 6745 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 6746 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6747 &zero_address_frag);
c67e42c9 6748
800eeca4 6749 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 6750 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6751 &zero_address_frag);
800eeca4
JW		 6752
6753 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 6754 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6755 &zero_address_frag);
800eeca4
JW		 6756
6757 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 6758 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6759 &zero_address_frag);
800eeca4 6760
13ae64f3
JJ		 6761 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6762 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6763 &zero_address_frag);
6764
800eeca4 6765 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 6766 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6767 &zero_address_frag);
800eeca4
JW		 6768
6769 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 6770 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6771 &zero_address_frag);
800eeca4 6772
13ae64f3
JJ		 6773 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6774 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6775 &zero_address_frag);
6776
6777 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6778 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6779 &zero_address_frag);
6780
6781 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6782 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6783 &zero_address_frag);
6784
3969b680
RH		 6785 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6786 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6787 &zero_address_frag);
6788
197865e8 6789 /* Compute the table of best templates. We compute goodness as a
44576e1f
RH		 6790 base 4 value, in which each match counts for 3, each F counts
6791 for 2, each B counts for 1. This should maximize the number of
6792 F and B nops in the chosen bundles, which is good because these
6793 pipelines are least likely to be overcommitted. */
800eeca4
JW		 6794 for (i = 0; i < IA64_NUM_TYPES; ++i)
6795 for (j = 0; j < IA64_NUM_TYPES; ++j)
6796 for (k = 0; k < IA64_NUM_TYPES; ++k)
6797 {
6798 best = 0;
6799 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6800 {
6801 goodness = 0;
6802 if (match (t, i, 0))
6803 {
6804 if (match (t, j, 1))
6805 {
6806 if (match (t, k, 2))
44576e1f 6807 goodness = 3 + 3 + 3;
800eeca4 6808 else
44576e1f 6809 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 6810 }
6811 else if (match (t, j, 2))
44576e1f 6812 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 6813 else
44576e1f
RH		 6814 {
6815 goodness = 3;
6816 goodness += extra_goodness (t, 1);
6817 goodness += extra_goodness (t, 2);
6818 }
800eeca4
JW		 6819 }
6820 else if (match (t, i, 1))
6821 {
6822 if (match (t, j, 2))
44576e1f 6823 goodness = 3 + 3;
800eeca4 6824 else
44576e1f 6825 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 6826 }
6827 else if (match (t, i, 2))
44576e1f 6828 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 6829
6830 if (goodness > best)
6831 {
6832 best = goodness;
6833 best_template[i][j][k] = t;
6834 }
6835 }
6836 }
6837
6838 for (i = 0; i < NUM_SLOTS; ++i)
6839 md.slot[i].user_template = -1;
6840
6841 md.pseudo_hash = hash_new ();
6842 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6843 {
6844 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6845 (void *) (pseudo_opcode + i));
6846 if (err)
6847 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6848 pseudo_opcode[i].name, err);
6849 }
6850
6851 md.reg_hash = hash_new ();
6852 md.dynreg_hash = hash_new ();
6853 md.const_hash = hash_new ();
6854 md.entry_hash = hash_new ();
6855
542d6675 6856 /* general registers: */
800eeca4
JW		 6857
6858 total = 128;
6859 for (i = 0; i < total; ++i)
6860 {
6861 sprintf (name, "r%d", i - REG_GR);
6862 md.regsym[i] = declare_register (name, i);
6863 }
6864
542d6675 6865 /* floating point registers: */
800eeca4
JW		 6866 total += 128;
6867 for (; i < total; ++i)
6868 {
6869 sprintf (name, "f%d", i - REG_FR);
6870 md.regsym[i] = declare_register (name, i);
6871 }
6872
542d6675 6873 /* application registers: */
800eeca4
JW		 6874 total += 128;
6875 ar_base = i;
6876 for (; i < total; ++i)
6877 {
6878 sprintf (name, "ar%d", i - REG_AR);
6879 md.regsym[i] = declare_register (name, i);
6880 }
6881
542d6675 6882 /* control registers: */
800eeca4
JW		 6883 total += 128;
6884 cr_base = i;
6885 for (; i < total; ++i)
6886 {
6887 sprintf (name, "cr%d", i - REG_CR);
6888 md.regsym[i] = declare_register (name, i);
6889 }
6890
542d6675 6891 /* predicate registers: */
800eeca4
JW		 6892 total += 64;
6893 for (; i < total; ++i)
6894 {
6895 sprintf (name, "p%d", i - REG_P);
6896 md.regsym[i] = declare_register (name, i);
6897 }
6898
542d6675 6899 /* branch registers: */
800eeca4
JW		 6900 total += 8;
6901 for (; i < total; ++i)
6902 {
6903 sprintf (name, "b%d", i - REG_BR);
6904 md.regsym[i] = declare_register (name, i);
6905 }
6906
6907 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6908 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6909 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6910 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6911 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6912 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6913 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6914
6915 for (i = 0; i < NELEMS (indirect_reg); ++i)
6916 {
6917 regnum = indirect_reg[i].regnum;
6918 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6919 }
6920
542d6675 6921 /* define synonyms for application registers: */
800eeca4
JW		 6922 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6923 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6924 REG_AR + ar[i - REG_AR].regnum);
6925
542d6675 6926 /* define synonyms for control registers: */
800eeca4
JW		 6927 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6928 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6929 REG_CR + cr[i - REG_CR].regnum);
6930
6931 declare_register ("gp", REG_GR + 1);
6932 declare_register ("sp", REG_GR + 12);
6933 declare_register ("rp", REG_BR + 0);
6934
542d6675 6935 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 6936 declare_register ("psp", REG_PSP);
6937
800eeca4
JW		 6938 declare_register_set ("ret", 4, REG_GR + 8);
6939 declare_register_set ("farg", 8, REG_FR + 8);
6940 declare_register_set ("fret", 8, REG_FR + 8);
6941
6942 for (i = 0; i < NELEMS (const_bits); ++i)
6943 {
6944 err = hash_insert (md.const_hash, const_bits[i].name,
6945 (PTR) (const_bits + i));
6946 if (err)
6947 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6948 name, err);
6949 }
6950
44f5c83a
JW		 6951 /* Set the architecture and machine depending on defaults and command line
6952 options. */
6953 if (md.flags & EF_IA_64_ABI64)
6954 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6955 else
6956 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6957
6958 if (! ok)
6959 as_warn (_("Could not set architecture and machine"));
800eeca4 6960
557debba
JW		 6961 /* Set the pointer size and pointer shift size depending on md.flags */
6962
6963 if (md.flags & EF_IA_64_ABI64)
6964 {
6965 md.pointer_size = 8; /* pointers are 8 bytes */
6966 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6967 }
6968 else
6969 {
6970 md.pointer_size = 4; /* pointers are 4 bytes */
6971 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6972 }
6973
800eeca4
JW		 6974 md.mem_offset.hint = 0;
6975 md.path = 0;
6976 md.maxpaths = 0;
6977 md.entry_labels = NULL;
6978}
6979
44f5c83a
JW		 6980/* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6981 because that is called after md_parse_option which is where we do the
6982 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6983 default endianness. */
6984
6985void
6986ia64_init (argc, argv)
2434f565
JW		 6987 int argc ATTRIBUTE_UNUSED;
6988 char **argv ATTRIBUTE_UNUSED;
44f5c83a 6989{
1cd8ff38 6990 md.flags = MD_FLAGS_DEFAULT;
44f5c83a
JW		 6991}
6992
6993/* Return a string for the target object file format. */
6994
6995const char *
6996ia64_target_format ()
6997{
6998 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6999 {
72a76794
JW		 7000 if (md.flags & EF_IA_64_BE)
7001 {
7002 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7003#if defined(TE_AIX50)
7463c317 7004 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7005#elif defined(TE_HPUX)
7006 return "elf64-ia64-hpux-big";
7463c317 7007#else
72a76794 7008 return "elf64-ia64-big";
7463c317 7009#endif
72a76794 7010 else
1cd8ff38 7011#if defined(TE_AIX50)
7463c317 7012 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7013#elif defined(TE_HPUX)
7014 return "elf32-ia64-hpux-big";
7463c317 7015#else
72a76794 7016 return "elf32-ia64-big";
7463c317 7017#endif
72a76794 7018 }
44f5c83a 7019 else
72a76794
JW		 7020 {
7021 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7022#ifdef TE_AIX50
7023 return "elf64-ia64-aix-little";
7024#else
72a76794 7025 return "elf64-ia64-little";
7463c317 7026#endif
72a76794 7027 else
7463c317
TW		 7028#ifdef TE_AIX50
7029 return "elf32-ia64-aix-little";
7030#else
72a76794 7031 return "elf32-ia64-little";
7463c317 7032#endif
72a76794 7033 }
44f5c83a
JW		 7034 }
7035 else
7036 return "unknown-format";
7037}
7038
800eeca4
JW		 7039void
7040ia64_end_of_source ()
7041{
542d6675 7042 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7043 insn_group_break (1, 0, 0);
7044
542d6675 7045 /* emits slots we haven't written yet: */
800eeca4
JW		 7046 ia64_flush_insns ();
7047
7048 bfd_set_private_flags (stdoutput, md.flags);
7049
800eeca4
JW		 7050 md.mem_offset.hint = 0;
7051}
7052
7053void
7054ia64_start_line ()
7055{
f1bcba5b
JW		 7056 if (md.qp.X_op == O_register)
7057 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7058 md.qp.X_op = O_absent;
7059
7060 if (ignore_input ())
7061 return;
7062
7063 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7064 {
7065 if (md.detect_dv && !md.explicit_mode)
542d6675 7066 as_warn (_("Explicit stops are ignored in auto mode"));
800eeca4 7067 else
542d6675 7068 insn_group_break (1, 0, 0);
800eeca4
JW		 7069 }
7070}
7071
f1bcba5b
JW		 7072/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7073 labels. */
7074static int defining_tag = 0;
7075
800eeca4
JW		 7076int
7077ia64_unrecognized_line (ch)
7078 int ch;
7079{
7080 switch (ch)
7081 {
7082 case '(':
7083 expression (&md.qp);
7084 if (*input_line_pointer++ != ')')
7085 {
7086 as_bad ("Expected ')'");
7087 return 0;
7088 }
7089 if (md.qp.X_op != O_register)
7090 {
7091 as_bad ("Qualifying predicate expected");
7092 return 0;
7093 }
7094 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7095 {
7096 as_bad ("Predicate register expected");
7097 return 0;
7098 }
7099 return 1;
7100
7101 case '{':
7102 if (md.manual_bundling)
7103 as_warn ("Found '{' when manual bundling is already turned on");
7104 else
7105 CURR_SLOT.manual_bundling_on = 1;
7106 md.manual_bundling = 1;
7107
542d6675
KH		 7108 /* Bundling is only acceptable in explicit mode
7109 or when in default automatic mode. */
800eeca4 7110 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7111 {
7112 if (!md.mode_explicitly_set
7113 && !md.default_explicit_mode)
7114 dot_dv_mode ('E');
7115 else
7116 as_warn (_("Found '{' after explicit switch to automatic mode"));
7117 }
800eeca4
JW		 7118 return 1;
7119
7120 case '}':
7121 if (!md.manual_bundling)
7122 as_warn ("Found '}' when manual bundling is off");
7123 else
7124 PREV_SLOT.manual_bundling_off = 1;
7125 md.manual_bundling = 0;
7126
7127 /* switch back to automatic mode, if applicable */
197865e8 7128 if (md.detect_dv
542d6675
KH		 7129 && md.explicit_mode
7130 && !md.mode_explicitly_set
7131 && !md.default_explicit_mode)
7132 dot_dv_mode ('A');
800eeca4
JW		 7133
7134 /* Allow '{' to follow on the same line. We also allow ";;", but that
7135 happens automatically because ';' is an end of line marker. */
7136 SKIP_WHITESPACE ();
7137 if (input_line_pointer[0] == '{')
7138 {
7139 input_line_pointer++;
7140 return ia64_unrecognized_line ('{');
7141 }
7142
7143 demand_empty_rest_of_line ();
7144 return 1;
7145
f1bcba5b
JW		 7146 case '[':
7147 {
7148 char *s;
7149 char c;
7150 symbolS *tag;
4d5a53ff 7151 int temp;
f1bcba5b
JW		 7152
7153 if (md.qp.X_op == O_register)
7154 {
7155 as_bad ("Tag must come before qualifying predicate.");
7156 return 0;
7157 }
4d5a53ff
JW		 7158
7159 /* This implements just enough of read_a_source_file in read.c to
7160 recognize labels. */
7161 if (is_name_beginner (*input_line_pointer))
7162 {
7163 s = input_line_pointer;
7164 c = get_symbol_end ();
7165 }
7166 else if (LOCAL_LABELS_FB
3882b010 7167 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7168 {
7169 temp = 0;
3882b010 7170 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7171 temp = (temp * 10) + *input_line_pointer++ - '0';
7172 fb_label_instance_inc (temp);
7173 s = fb_label_name (temp, 0);
7174 c = *input_line_pointer;
7175 }
7176 else
7177 {
7178 s = NULL;
7179 c = '\0';
7180 }
f1bcba5b
JW		 7181 if (c != ':')
7182 {
7183 /* Put ':' back for error messages' sake. */
7184 *input_line_pointer++ = ':';
7185 as_bad ("Expected ':'");
7186 return 0;
7187 }
4d5a53ff 7188
f1bcba5b
JW		 7189 defining_tag = 1;
7190 tag = colon (s);
7191 defining_tag = 0;
7192 /* Put ':' back for error messages' sake. */
7193 *input_line_pointer++ = ':';
7194 if (*input_line_pointer++ != ']')
7195 {
7196 as_bad ("Expected ']'");
7197 return 0;
7198 }
7199 if (! tag)
7200 {
7201 as_bad ("Tag name expected");
7202 return 0;
7203 }
7204 return 1;
7205 }
7206
800eeca4
JW		 7207 default:
7208 break;
7209 }
542d6675
KH		 7210
7211 /* Not a valid line. */
7212 return 0;
800eeca4
JW		 7213}
7214
7215void
7216ia64_frob_label (sym)
7217 struct symbol *sym;
7218{
7219 struct label_fix *fix;
7220
f1bcba5b
JW		 7221 /* Tags need special handling since they are not bundle breaks like
7222 labels. */
7223 if (defining_tag)
7224 {
7225 fix = obstack_alloc (&notes, sizeof (*fix));
7226 fix->sym = sym;
7227 fix->next = CURR_SLOT.tag_fixups;
7228 CURR_SLOT.tag_fixups = fix;
7229
7230 return;
7231 }
7232
800eeca4
JW		 7233 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7234 {
7235 md.last_text_seg = now_seg;
7236 fix = obstack_alloc (&notes, sizeof (*fix));
7237 fix->sym = sym;
7238 fix->next = CURR_SLOT.label_fixups;
7239 CURR_SLOT.label_fixups = fix;
7240
542d6675 7241 /* Keep track of how many code entry points we've seen. */
800eeca4 7242 if (md.path == md.maxpaths)
542d6675
KH		 7243 {
7244 md.maxpaths += 20;
7245 md.entry_labels = (const char **)
7246 xrealloc ((void *) md.entry_labels,
7247 md.maxpaths * sizeof (char *));
7248 }
800eeca4
JW		 7249 md.entry_labels[md.path++] = S_GET_NAME (sym);
7250 }
7251}
7252
936cf02e
JW		 7253#ifdef TE_HPUX
7254/* The HP-UX linker will give unresolved symbol errors for symbols
7255 that are declared but unused. This routine removes declared,
7256 unused symbols from an object. */
7257int
7258ia64_frob_symbol (sym)
7259 struct symbol *sym;
7260{
7261 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7262 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7263 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7264 && ! S_IS_EXTERNAL (sym)))
7265 return 1;
7266 return 0;
7267}
7268#endif
7269
800eeca4
JW		 7270void
7271ia64_flush_pending_output ()
7272{
4d5a53ff
JW		 7273 if (!md.keep_pending_output
7274 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7275 {
7276 /* ??? This causes many unnecessary stop bits to be emitted.
7277 Unfortunately, it isn't clear if it is safe to remove this. */
7278 insn_group_break (1, 0, 0);
7279 ia64_flush_insns ();
7280 }
7281}
7282
7283/* Do ia64-specific expression optimization. All that's done here is
7284 to transform index expressions that are either due to the indexing
7285 of rotating registers or due to the indexing of indirect register
7286 sets. */
7287int
7288ia64_optimize_expr (l, op, r)
7289 expressionS *l;
7290 operatorT op;
7291 expressionS *r;
7292{
7293 unsigned num_regs;
7294
7295 if (op == O_index)
7296 {
7297 if (l->X_op == O_register && r->X_op == O_constant)
7298 {
7299 num_regs = (l->X_add_number >> 16);
7300 if ((unsigned) r->X_add_number >= num_regs)
7301 {
7302 if (!num_regs)
7303 as_bad ("No current frame");
7304 else
7305 as_bad ("Index out of range 0..%u", num_regs - 1);
7306 r->X_add_number = 0;
7307 }
7308 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7309 return 1;
7310 }
7311 else if (l->X_op == O_register && r->X_op == O_register)
7312 {
7313 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7314 || l->X_add_number == IND_MEM)
7315 {
7316 as_bad ("Indirect register set name expected");
7317 l->X_add_number = IND_CPUID;
7318 }
7319 l->X_op = O_index;
7320 l->X_op_symbol = md.regsym[l->X_add_number];
7321 l->X_add_number = r->X_add_number;
7322 return 1;
7323 }
7324 }
7325 return 0;
7326}
7327
7328int
7329ia64_parse_name (name, e)
7330 char *name;
7331 expressionS *e;
7332{
7333 struct const_desc *cdesc;
7334 struct dynreg *dr = 0;
7335 unsigned int regnum;
7336 struct symbol *sym;
7337 char *end;
7338
542d6675 7339 /* first see if NAME is a known register name: */
800eeca4
JW		 7340 sym = hash_find (md.reg_hash, name);
7341 if (sym)
7342 {
7343 e->X_op = O_register;
7344 e->X_add_number = S_GET_VALUE (sym);
7345 return 1;
7346 }
7347
7348 cdesc = hash_find (md.const_hash, name);
7349 if (cdesc)
7350 {
7351 e->X_op = O_constant;
7352 e->X_add_number = cdesc->value;
7353 return 1;
7354 }
7355
542d6675 7356 /* check for inN, locN, or outN: */
800eeca4
JW		 7357 switch (name[0])
7358 {
7359 case 'i':
3882b010 7360 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 7361 {
7362 dr = &md.in;
7363 name += 2;
7364 }
7365 break;
7366
7367 case 'l':
3882b010 7368 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 7369 {
7370 dr = &md.loc;
7371 name += 3;
7372 }
7373 break;
7374
7375 case 'o':
3882b010 7376 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 7377 {
7378 dr = &md.out;
7379 name += 3;
7380 }
7381 break;
7382
7383 default:
7384 break;
7385 }
7386
7387 if (dr)
7388 {
542d6675 7389 /* The name is inN, locN, or outN; parse the register number. */
800eeca4
JW		 7390 regnum = strtoul (name, &end, 10);
7391 if (end > name && *end == '\0')
7392 {
7393 if ((unsigned) regnum >= dr->num_regs)
7394 {
7395 if (!dr->num_regs)
7396 as_bad ("No current frame");
7397 else
542d6675
KH		 7398 as_bad ("Register number out of range 0..%u",
7399 dr->num_regs - 1);
800eeca4
JW		 7400 regnum = 0;
7401 }
7402 e->X_op = O_register;
7403 e->X_add_number = dr->base + regnum;
7404 return 1;
7405 }
7406 }
7407
7408 if ((dr = hash_find (md.dynreg_hash, name)))
7409 {
7410 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 7411 Store the base register number in the low 16 bits of
7412 X_add_number and the size of the register set in the top 16
7413 bits. */
800eeca4
JW		 7414 e->X_op = O_register;
7415 e->X_add_number = dr->base | (dr->num_regs << 16);
7416 return 1;
7417 }
7418 return 0;
7419}
7420
7421/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7422
7423char *
7424ia64_canonicalize_symbol_name (name)
7425 char *name;
7426{
542d6675
KH		 7427 size_t len = strlen (name);
7428 if (len > 1 && name[len - 1] == '#')
7429 name[len - 1] = '\0';
800eeca4
JW		 7430 return name;
7431}
7432
3e37788f
JW		 7433/* Return true if idesc is a conditional branch instruction. This excludes
7434 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7435 because they always read/write resources regardless of the value of the
7436 qualifying predicate. br.ia must always use p0, and hence is always
7437 taken. Thus this function returns true for branches which can fall
7438 through, and which use no resources if they do fall through. */
1deb8127 7439
800eeca4
JW		 7440static int
7441is_conditional_branch (idesc)
542d6675 7442 struct ia64_opcode *idesc;
800eeca4 7443{
1deb8127 7444 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 7445 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7446 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 7447 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7448 && (idesc->name[2] == '\0'
3e37788f
JW		 7449 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7450 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7451 || idesc->name[2] == 'l'
7452 /* br.cond, br.call, br.clr */
7453 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7454 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7455 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 7456}
7457
7458/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 7459 returns zero. */
7460
800eeca4
JW		 7461static int
7462is_taken_branch (idesc)
542d6675 7463 struct ia64_opcode *idesc;
800eeca4
JW		 7464{
7465 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 7466 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 7467}
7468
7469/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 7470 doubt, returns zero. */
7471
800eeca4
JW		 7472static int
7473is_interruption_or_rfi (idesc)
542d6675 7474 struct ia64_opcode *idesc;
800eeca4
JW		 7475{
7476 if (strcmp (idesc->name, "rfi") == 0)
7477 return 1;
7478 return 0;
7479}
7480
7481/* Returns the index of the given dependency in the opcode's list of chks, or
7482 -1 if there is no dependency. */
542d6675 7483
800eeca4
JW		 7484static int
7485depends_on (depind, idesc)
542d6675
KH		 7486 int depind;
7487 struct ia64_opcode *idesc;
800eeca4
JW		 7488{
7489 int i;
7490 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 7491 for (i = 0; i < dep->nchks; i++)
800eeca4 7492 {
542d6675
KH		 7493 if (depind == DEP (dep->chks[i]))
7494 return i;
800eeca4
JW		 7495 }
7496 return -1;
7497}
7498
7499/* Determine a set of specific resources used for a particular resource
7500 class. Returns the number of specific resources identified For those
7501 cases which are not determinable statically, the resource returned is
197865e8 7502 marked nonspecific.
800eeca4
JW		 7503
7504 Meanings of value in 'NOTE':
7505 1) only read/write when the register number is explicitly encoded in the
7506 insn.
7507 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 7508 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 7509 3) general register value is used to specify an indirect register; not
7510 determinable statically.
7511 4) only read the given resource when bits 7:0 of the indirect index
7512 register value does not match the register number of the resource; not
7513 determinable statically.
7514 5) all rules are implementation specific.
7515 6) only when both the index specified by the reader and the index specified
7516 by the writer have the same value in bits 63:61; not determinable
197865e8 7517 statically.
800eeca4 7518 7) only access the specified resource when the corresponding mask bit is
197865e8 7519 set
800eeca4
JW		 7520 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7521 only read when these insns reference FR2-31
7522 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7523 written when these insns write FR32-127
7524 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7525 instruction
7526 11) The target predicates are written independently of PR[qp], but source
7527 registers are only read if PR[qp] is true. Since the state of PR[qp]
7528 cannot statically be determined, all source registers are marked used.
7529 12) This insn only reads the specified predicate register when that
7530 register is the PR[qp].
7531 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 7532 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 7533 14) The RSE resource includes the implementation-specific RSE internal
7534 state resources. At least one (and possibly more) of these resources are
7535 read by each instruction listed in IC:rse-readers. At least one (and
7536 possibly more) of these resources are written by each insn listed in
197865e8 7537 IC:rse-writers.
800eeca4 7538 15+16) Represents reserved instructions, which the assembler does not
197865e8 7539 generate.
800eeca4
JW		 7540
7541 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7542 this code; there are no dependency violations based on memory access.
800eeca4
JW		 7543*/
7544
7545#define MAX_SPECS 256
7546#define DV_CHK 1
7547#define DV_REG 0
7548
7549static int
7550specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 7551 const struct ia64_dependency *dep;
7552 struct ia64_opcode *idesc;
7553 int type; /* is this a DV chk or a DV reg? */
7554 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7555 int note; /* resource note for this insn's usage */
7556 int path; /* which execution path to examine */
800eeca4
JW		 7557{
7558 int count = 0;
7559 int i;
7560 int rsrc_write = 0;
7561 struct rsrc tmpl;
197865e8 7562
800eeca4
JW		 7563 if (dep->mode == IA64_DV_WAW
7564 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7565 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7566 rsrc_write = 1;
7567
7568 /* template for any resources we identify */
7569 tmpl.dependency = dep;
7570 tmpl.note = note;
7571 tmpl.insn_srlz = tmpl.data_srlz = 0;
7572 tmpl.qp_regno = CURR_SLOT.qp_regno;
7573 tmpl.link_to_qp_branch = 1;
7574 tmpl.mem_offset.hint = 0;
7575 tmpl.specific = 1;
7576 tmpl.index = 0;
7484b8e6 7577 tmpl.cmp_type = CMP_NONE;
800eeca4
JW		 7578
7579#define UNHANDLED \
7580as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7581dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7582#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7583
7584 /* we don't need to track these */
7585 if (dep->semantics == IA64_DVS_NONE)
7586 return 0;
7587
7588 switch (dep->specifier)
7589 {
7590 case IA64_RS_AR_K:
7591 if (note == 1)
542d6675
KH		 7592 {
7593 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7594 {
7595 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7596 if (regno >= 0 && regno <= 7)
7597 {
7598 specs[count] = tmpl;
7599 specs[count++].index = regno;
7600 }
7601 }
7602 }
800eeca4 7603 else if (note == 0)
542d6675
KH		 7604 {
7605 for (i = 0; i < 8; i++)
7606 {
7607 specs[count] = tmpl;
7608 specs[count++].index = i;
7609 }
7610 }
800eeca4 7611 else
542d6675
KH		 7612 {
7613 UNHANDLED;
7614 }
800eeca4
JW		 7615 break;
7616
7617 case IA64_RS_AR_UNAT:
7618 /* This is a mov =AR or mov AR= instruction. */
7619 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7620 {
7621 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7622 if (regno == AR_UNAT)
7623 {
7624 specs[count++] = tmpl;
7625 }
7626 }
7627 else
7628 {
7629 /* This is a spill/fill, or other instruction that modifies the
7630 unat register. */
7631
7632 /* Unless we can determine the specific bits used, mark the whole
7633 thing; bits 8:3 of the memory address indicate the bit used in
7634 UNAT. The .mem.offset hint may be used to eliminate a small
7635 subset of conflicts. */
7636 specs[count] = tmpl;
7637 if (md.mem_offset.hint)
7638 {
542d6675
KH		 7639 if (md.debug_dv)
7640 fprintf (stderr, " Using hint for spill/fill\n");
7641 /* The index isn't actually used, just set it to something
7642 approximating the bit index. */
800eeca4
JW		 7643 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7644 specs[count].mem_offset.hint = 1;
7645 specs[count].mem_offset.offset = md.mem_offset.offset;
7646 specs[count++].mem_offset.base = md.mem_offset.base;
7647 }
7648 else
7649 {
7650 specs[count++].specific = 0;
7651 }
7652 }
7653 break;
7654
7655 case IA64_RS_AR:
7656 if (note == 1)
542d6675
KH		 7657 {
7658 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7659 {
7660 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7661 if ((regno >= 8 && regno <= 15)
7662 || (regno >= 20 && regno <= 23)
7663 || (regno >= 31 && regno <= 39)
7664 || (regno >= 41 && regno <= 47)
7665 || (regno >= 67 && regno <= 111))
7666 {
7667 specs[count] = tmpl;
7668 specs[count++].index = regno;
7669 }
7670 }
7671 }
800eeca4 7672 else
542d6675
KH		 7673 {
7674 UNHANDLED;
7675 }
800eeca4
JW		 7676 break;
7677
7678 case IA64_RS_ARb:
7679 if (note == 1)
542d6675
KH		 7680 {
7681 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7682 {
7683 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7684 if ((regno >= 48 && regno <= 63)
7685 || (regno >= 112 && regno <= 127))
7686 {
7687 specs[count] = tmpl;
7688 specs[count++].index = regno;
7689 }
7690 }
7691 }
800eeca4 7692 else if (note == 0)
542d6675
KH		 7693 {
7694 for (i = 48; i < 64; i++)
7695 {
7696 specs[count] = tmpl;
7697 specs[count++].index = i;
7698 }
7699 for (i = 112; i < 128; i++)
7700 {
7701 specs[count] = tmpl;
7702 specs[count++].index = i;
7703 }
7704 }
197865e8 7705 else
542d6675
KH		 7706 {
7707 UNHANDLED;
7708 }
800eeca4
JW		 7709 break;
7710
7711 case IA64_RS_BR:
7712 if (note != 1)
542d6675
KH		 7713 {
7714 UNHANDLED;
7715 }
800eeca4 7716 else
542d6675
KH		 7717 {
7718 if (rsrc_write)
7719 {
7720 for (i = 0; i < idesc->num_outputs; i++)
7721 if (idesc->operands[i] == IA64_OPND_B1
7722 || idesc->operands[i] == IA64_OPND_B2)
7723 {
7724 specs[count] = tmpl;
7725 specs[count++].index =
7726 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7727 }
7728 }
7729 else
7730 {
40449e9f 7731 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 7732 if (idesc->operands[i] == IA64_OPND_B1
7733 || idesc->operands[i] == IA64_OPND_B2)
7734 {
7735 specs[count] = tmpl;
7736 specs[count++].index =
7737 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7738 }
7739 }
7740 }
800eeca4
JW		 7741 break;
7742
7743 case IA64_RS_CPUID: /* four or more registers */
7744 if (note == 3)
542d6675
KH		 7745 {
7746 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7747 {
7748 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7749 if (regno >= 0 && regno < NELEMS (gr_values)
7750 && KNOWN (regno))
7751 {
7752 specs[count] = tmpl;
7753 specs[count++].index = gr_values[regno].value & 0xFF;
7754 }
7755 else
7756 {
7757 specs[count] = tmpl;
7758 specs[count++].specific = 0;
7759 }
7760 }
7761 }
800eeca4 7762 else
542d6675
KH		 7763 {
7764 UNHANDLED;
7765 }
800eeca4
JW		 7766 break;
7767
7768 case IA64_RS_DBR: /* four or more registers */
7769 if (note == 3)
542d6675
KH		 7770 {
7771 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7772 {
7773 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7774 if (regno >= 0 && regno < NELEMS (gr_values)
7775 && KNOWN (regno))
7776 {
7777 specs[count] = tmpl;
7778 specs[count++].index = gr_values[regno].value & 0xFF;
7779 }
7780 else
7781 {
7782 specs[count] = tmpl;
7783 specs[count++].specific = 0;
7784 }
7785 }
7786 }
800eeca4 7787 else if (note == 0 && !rsrc_write)
542d6675
KH		 7788 {
7789 specs[count] = tmpl;
7790 specs[count++].specific = 0;
7791 }
800eeca4 7792 else
542d6675
KH		 7793 {
7794 UNHANDLED;
7795 }
800eeca4
JW		 7796 break;
7797
7798 case IA64_RS_IBR: /* four or more registers */
7799 if (note == 3)
542d6675
KH		 7800 {
7801 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7802 {
7803 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7804 if (regno >= 0 && regno < NELEMS (gr_values)
7805 && KNOWN (regno))
7806 {
7807 specs[count] = tmpl;
7808 specs[count++].index = gr_values[regno].value & 0xFF;
7809 }
7810 else
7811 {
7812 specs[count] = tmpl;
7813 specs[count++].specific = 0;
7814 }
7815 }
7816 }
800eeca4 7817 else
542d6675
KH		 7818 {
7819 UNHANDLED;
7820 }
800eeca4
JW		 7821 break;
7822
7823 case IA64_RS_MSR:
7824 if (note == 5)
7825 {
7826 /* These are implementation specific. Force all references to
7827 conflict with all other references. */
7828 specs[count] = tmpl;
7829 specs[count++].specific = 0;
7830 }
7831 else
7832 {
7833 UNHANDLED;
7834 }
7835 break;
7836
7837 case IA64_RS_PKR: /* 16 or more registers */
7838 if (note == 3 || note == 4)
542d6675
KH		 7839 {
7840 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7841 {
7842 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7843 if (regno >= 0 && regno < NELEMS (gr_values)
7844 && KNOWN (regno))
7845 {
7846 if (note == 3)
7847 {
7848 specs[count] = tmpl;
7849 specs[count++].index = gr_values[regno].value & 0xFF;
7850 }
7851 else
7852 for (i = 0; i < NELEMS (gr_values); i++)
7853 {
7854 /* Uses all registers *except* the one in R3. */
2434f565 7855 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 7856 {
7857 specs[count] = tmpl;
7858 specs[count++].index = i;
7859 }
7860 }
7861 }
7862 else
7863 {
7864 specs[count] = tmpl;
7865 specs[count++].specific = 0;
7866 }
7867 }
7868 }
7869 else if (note == 0)
7870 {
7871 /* probe et al. */
7872 specs[count] = tmpl;
7873 specs[count++].specific = 0;
7874 }
7875 break;
7876
7877 case IA64_RS_PMC: /* four or more registers */
7878 if (note == 3)
7879 {
7880 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7881 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7882
7883 {
7884 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7885 ? 1 : !rsrc_write);
7886 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7887 if (regno >= 0 && regno < NELEMS (gr_values)
7888 && KNOWN (regno))
7889 {
7890 specs[count] = tmpl;
7891 specs[count++].index = gr_values[regno].value & 0xFF;
7892 }
7893 else
7894 {
7895 specs[count] = tmpl;
7896 specs[count++].specific = 0;
7897 }
7898 }
7899 }
7900 else
7901 {
7902 UNHANDLED;
7903 }
800eeca4
JW		 7904 break;
7905
7906 case IA64_RS_PMD: /* four or more registers */
7907 if (note == 3)
542d6675
KH		 7908 {
7909 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7910 {
7911 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7912 if (regno >= 0 && regno < NELEMS (gr_values)
7913 && KNOWN (regno))
7914 {
7915 specs[count] = tmpl;
7916 specs[count++].index = gr_values[regno].value & 0xFF;
7917 }
7918 else
7919 {
7920 specs[count] = tmpl;
7921 specs[count++].specific = 0;
7922 }
7923 }
7924 }
800eeca4 7925 else
542d6675
KH		 7926 {
7927 UNHANDLED;
7928 }
800eeca4
JW		 7929 break;
7930
7931 case IA64_RS_RR: /* eight registers */
7932 if (note == 6)
542d6675
KH		 7933 {
7934 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7935 {
7936 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7937 if (regno >= 0 && regno < NELEMS (gr_values)
7938 && KNOWN (regno))
7939 {
7940 specs[count] = tmpl;
7941 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7942 }
7943 else
7944 {
7945 specs[count] = tmpl;
7946 specs[count++].specific = 0;
7947 }
7948 }
7949 }
800eeca4 7950 else if (note == 0 && !rsrc_write)
542d6675
KH		 7951 {
7952 specs[count] = tmpl;
7953 specs[count++].specific = 0;
7954 }
197865e8 7955 else
542d6675
KH		 7956 {
7957 UNHANDLED;
7958 }
800eeca4
JW		 7959 break;
7960
7961 case IA64_RS_CR_IRR:
197865e8 7962 if (note == 0)
542d6675
KH		 7963 {
7964 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7965 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7966 if (rsrc_write
7967 && idesc->operands[1] == IA64_OPND_CR3
7968 && regno == CR_IVR)
7969 {
7970 for (i = 0; i < 4; i++)
7971 {
7972 specs[count] = tmpl;
7973 specs[count++].index = CR_IRR0 + i;
7974 }
7975 }
7976 }
800eeca4 7977 else if (note == 1)
542d6675
KH		 7978 {
7979 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7980 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7981 && regno >= CR_IRR0
7982 && regno <= CR_IRR3)
7983 {
7984 specs[count] = tmpl;
7985 specs[count++].index = regno;
7986 }
7987 }
800eeca4 7988 else
542d6675
KH		 7989 {
7990 UNHANDLED;
7991 }
800eeca4
JW		 7992 break;
7993
7994 case IA64_RS_CR_LRR:
7995 if (note != 1)
542d6675
KH		 7996 {
7997 UNHANDLED;
7998 }
197865e8 7999 else
542d6675
KH		 8000 {
8001 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8002 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8003 && (regno == CR_LRR0 || regno == CR_LRR1))
8004 {
8005 specs[count] = tmpl;
8006 specs[count++].index = regno;
8007 }
8008 }
800eeca4
JW		 8009 break;
8010
8011 case IA64_RS_CR:
8012 if (note == 1)
542d6675
KH		 8013 {
8014 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8015 {
8016 specs[count] = tmpl;
8017 specs[count++].index =
8018 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8019 }
8020 }
800eeca4 8021 else
542d6675
KH		 8022 {
8023 UNHANDLED;
8024 }
800eeca4
JW		 8025 break;
8026
8027 case IA64_RS_FR:
8028 case IA64_RS_FRb:
8029 if (note != 1)
542d6675
KH		 8030 {
8031 UNHANDLED;
8032 }
800eeca4 8033 else if (rsrc_write)
542d6675
KH		 8034 {
8035 if (dep->specifier == IA64_RS_FRb
8036 && idesc->operands[0] == IA64_OPND_F1)
8037 {
8038 specs[count] = tmpl;
8039 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8040 }
8041 }
800eeca4 8042 else
542d6675
KH		 8043 {
8044 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8045 {
8046 if (idesc->operands[i] == IA64_OPND_F2
8047 || idesc->operands[i] == IA64_OPND_F3
8048 || idesc->operands[i] == IA64_OPND_F4)
8049 {
8050 specs[count] = tmpl;
8051 specs[count++].index =
8052 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8053 }
8054 }
8055 }
800eeca4
JW		 8056 break;
8057
8058 case IA64_RS_GR:
8059 if (note == 13)
542d6675
KH		 8060 {
8061 /* This reference applies only to the GR whose value is loaded with
8062 data returned from memory. */
8063 specs[count] = tmpl;
8064 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8065 }
800eeca4 8066 else if (note == 1)
542d6675
KH		 8067 {
8068 if (rsrc_write)
8069 {
8070 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8071 if (idesc->operands[i] == IA64_OPND_R1
8072 || idesc->operands[i] == IA64_OPND_R2
8073 || idesc->operands[i] == IA64_OPND_R3)
8074 {
8075 specs[count] = tmpl;
197865e8 8076 specs[count++].index =
50b81f19
JW		 8077 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8078 }
8079 if (idesc->flags & IA64_OPCODE_POSTINC)
8080 for (i = 0; i < NELEMS (idesc->operands); i++)
8081 if (idesc->operands[i] == IA64_OPND_MR3)
8082 {
8083 specs[count] = tmpl;
8084 specs[count++].index =
8085 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8086 }
542d6675
KH		 8087 }
8088 else
8089 {
8090 /* Look for anything that reads a GR. */
8091 for (i = 0; i < NELEMS (idesc->operands); i++)
8092 {
8093 if (idesc->operands[i] == IA64_OPND_MR3
8094 || idesc->operands[i] == IA64_OPND_CPUID_R3
8095 || idesc->operands[i] == IA64_OPND_DBR_R3
8096 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8097 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8098 || idesc->operands[i] == IA64_OPND_PKR_R3
8099 || idesc->operands[i] == IA64_OPND_PMC_R3
8100 || idesc->operands[i] == IA64_OPND_PMD_R3
8101 || idesc->operands[i] == IA64_OPND_RR_R3
8102 || ((i >= idesc->num_outputs)
8103 && (idesc->operands[i] == IA64_OPND_R1
8104 || idesc->operands[i] == IA64_OPND_R2
8105 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8106 /* addl source register. */
8107 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8108 {
8109 specs[count] = tmpl;
8110 specs[count++].index =
8111 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8112 }
8113 }
8114 }
8115 }
197865e8 8116 else
542d6675
KH		 8117 {
8118 UNHANDLED;
8119 }
800eeca4
JW		 8120 break;
8121
139368c9
JW		 8122 /* This is the same as IA64_RS_PRr, except that the register range is
8123 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8124 case IA64_RS_PR:
8125 if (note == 0)
542d6675 8126 {
139368c9 8127 for (i = 1; i < 16; i++)
542d6675 8128 {
139368c9
JW		 8129 specs[count] = tmpl;
8130 specs[count++].index = i;
8131 }
8132 }
8133 else if (note == 7)
8134 {
8135 valueT mask = 0;
8136 /* Mark only those registers indicated by the mask. */
8137 if (rsrc_write)
8138 {
8139 mask = CURR_SLOT.opnd[2].X_add_number;
8140 for (i = 1; i < 16; i++)
8141 if (mask & ((valueT) 1 << i))
8142 {
8143 specs[count] = tmpl;
8144 specs[count++].index = i;
8145 }
8146 }
8147 else
8148 {
8149 UNHANDLED;
8150 }
8151 }
8152 else if (note == 11) /* note 11 implies note 1 as well */
8153 {
8154 if (rsrc_write)
8155 {
8156 for (i = 0; i < idesc->num_outputs; i++)
8157 {
8158 if (idesc->operands[i] == IA64_OPND_P1
8159 || idesc->operands[i] == IA64_OPND_P2)
8160 {
8161 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8162 if (regno >= 1 && regno < 16)
8163 {
8164 specs[count] = tmpl;
8165 specs[count++].index = regno;
8166 }
8167 }
8168 }
8169 }
8170 else
8171 {
8172 UNHANDLED;
8173 }
8174 }
8175 else if (note == 12)
8176 {
8177 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8178 {
8179 specs[count] = tmpl;
8180 specs[count++].index = CURR_SLOT.qp_regno;
8181 }
8182 }
8183 else if (note == 1)
8184 {
8185 if (rsrc_write)
8186 {
8187 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8188 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8189 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8190 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8191
8192 if ((idesc->operands[0] == IA64_OPND_P1
8193 || idesc->operands[0] == IA64_OPND_P2)
8194 && p1 >= 1 && p1 < 16)
542d6675
KH		 8195 {
8196 specs[count] = tmpl;
139368c9
JW		 8197 specs[count].cmp_type =
8198 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8199 specs[count++].index = p1;
8200 }
8201 if ((idesc->operands[1] == IA64_OPND_P1
8202 || idesc->operands[1] == IA64_OPND_P2)
8203 && p2 >= 1 && p2 < 16)
8204 {
8205 specs[count] = tmpl;
8206 specs[count].cmp_type =
8207 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8208 specs[count++].index = p2;
542d6675
KH		 8209 }
8210 }
8211 else
8212 {
139368c9 8213 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8214 {
8215 specs[count] = tmpl;
139368c9
JW		 8216 specs[count++].index = CURR_SLOT.qp_regno;
8217 }
8218 if (idesc->operands[1] == IA64_OPND_PR)
8219 {
8220 for (i = 1; i < 16; i++)
8221 {
8222 specs[count] = tmpl;
8223 specs[count++].index = i;
8224 }
542d6675
KH		 8225 }
8226 }
8227 }
139368c9
JW		 8228 else
8229 {
8230 UNHANDLED;
8231 }
8232 break;
8233
8234 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8235 simplified cases of this. */
8236 case IA64_RS_PRr:
8237 if (note == 0)
8238 {
8239 for (i = 16; i < 63; i++)
8240 {
8241 specs[count] = tmpl;
8242 specs[count++].index = i;
8243 }
8244 }
800eeca4 8245 else if (note == 7)
542d6675
KH		 8246 {
8247 valueT mask = 0;
8248 /* Mark only those registers indicated by the mask. */
8249 if (rsrc_write
8250 && idesc->operands[0] == IA64_OPND_PR)
8251 {
8252 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 8253 if (mask & ((valueT) 1 << 16))
139368c9
JW		 8254 for (i = 16; i < 63; i++)
8255 {
8256 specs[count] = tmpl;
8257 specs[count++].index = i;
8258 }
542d6675
KH		 8259 }
8260 else if (rsrc_write
8261 && idesc->operands[0] == IA64_OPND_PR_ROT)
8262 {
8263 for (i = 16; i < 63; i++)
8264 {
8265 specs[count] = tmpl;
8266 specs[count++].index = i;
8267 }
8268 }
8269 else
8270 {
8271 UNHANDLED;
8272 }
8273 }
800eeca4 8274 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 8275 {
8276 if (rsrc_write)
8277 {
8278 for (i = 0; i < idesc->num_outputs; i++)
8279 {
8280 if (idesc->operands[i] == IA64_OPND_P1
8281 || idesc->operands[i] == IA64_OPND_P2)
8282 {
8283 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 8284 if (regno >= 16 && regno < 63)
542d6675
KH		 8285 {
8286 specs[count] = tmpl;
8287 specs[count++].index = regno;
8288 }
8289 }
8290 }
8291 }
8292 else
8293 {
8294 UNHANDLED;
8295 }
8296 }
800eeca4 8297 else if (note == 12)
542d6675 8298 {
139368c9 8299 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8300 {
8301 specs[count] = tmpl;
8302 specs[count++].index = CURR_SLOT.qp_regno;
8303 }
8304 }
800eeca4 8305 else if (note == 1)
542d6675
KH		 8306 {
8307 if (rsrc_write)
8308 {
8309 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8310 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8311 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8312 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8313
542d6675
KH		 8314 if ((idesc->operands[0] == IA64_OPND_P1
8315 || idesc->operands[0] == IA64_OPND_P2)
139368c9 8316 && p1 >= 16 && p1 < 63)
542d6675
KH		 8317 {
8318 specs[count] = tmpl;
4a4f25cf 8319 specs[count].cmp_type =
7484b8e6 8320 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 8321 specs[count++].index = p1;
8322 }
8323 if ((idesc->operands[1] == IA64_OPND_P1
8324 || idesc->operands[1] == IA64_OPND_P2)
139368c9 8325 && p2 >= 16 && p2 < 63)
542d6675
KH		 8326 {
8327 specs[count] = tmpl;
4a4f25cf 8328 specs[count].cmp_type =
7484b8e6 8329 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 8330 specs[count++].index = p2;
8331 }
8332 }
8333 else
8334 {
139368c9 8335 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8336 {
8337 specs[count] = tmpl;
8338 specs[count++].index = CURR_SLOT.qp_regno;
8339 }
8340 if (idesc->operands[1] == IA64_OPND_PR)
8341 {
139368c9 8342 for (i = 16; i < 63; i++)
542d6675
KH		 8343 {
8344 specs[count] = tmpl;
8345 specs[count++].index = i;
8346 }
8347 }
8348 }
8349 }
197865e8 8350 else
542d6675
KH		 8351 {
8352 UNHANDLED;
8353 }
800eeca4
JW		 8354 break;
8355
8356 case IA64_RS_PSR:
197865e8 8357 /* Verify that the instruction is using the PSR bit indicated in
542d6675 8358 dep->regindex. */
800eeca4 8359 if (note == 0)
542d6675
KH		 8360 {
8361 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8362 {
8363 if (dep->regindex < 6)
8364 {
8365 specs[count++] = tmpl;
8366 }
8367 }
8368 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8369 {
8370 if (dep->regindex < 32
8371 || dep->regindex == 35
8372 || dep->regindex == 36
8373 || (!rsrc_write && dep->regindex == PSR_CPL))
8374 {
8375 specs[count++] = tmpl;
8376 }
8377 }
8378 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8379 {
8380 if (dep->regindex < 32
8381 || dep->regindex == 35
8382 || dep->regindex == 36
8383 || (rsrc_write && dep->regindex == PSR_CPL))
8384 {
8385 specs[count++] = tmpl;
8386 }
8387 }
8388 else
8389 {
8390 /* Several PSR bits have very specific dependencies. */
8391 switch (dep->regindex)
8392 {
8393 default:
8394 specs[count++] = tmpl;
8395 break;
8396 case PSR_IC:
8397 if (rsrc_write)
8398 {
8399 specs[count++] = tmpl;
8400 }
8401 else
8402 {
8403 /* Only certain CR accesses use PSR.ic */
8404 if (idesc->operands[0] == IA64_OPND_CR3
8405 || idesc->operands[1] == IA64_OPND_CR3)
8406 {
8407 int index =
8408 ((idesc->operands[0] == IA64_OPND_CR3)
8409 ? 0 : 1);
8410 int regno =
8411 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8412
8413 switch (regno)
8414 {
8415 default:
8416 break;
8417 case CR_ITIR:
8418 case CR_IFS:
8419 case CR_IIM:
8420 case CR_IIP:
8421 case CR_IPSR:
8422 case CR_ISR:
8423 case CR_IFA:
8424 case CR_IHA:
8425 case CR_IIPA:
8426 specs[count++] = tmpl;
8427 break;
8428 }
8429 }
8430 }
8431 break;
8432 case PSR_CPL:
8433 if (rsrc_write)
8434 {
8435 specs[count++] = tmpl;
8436 }
8437 else
8438 {
8439 /* Only some AR accesses use cpl */
8440 if (idesc->operands[0] == IA64_OPND_AR3
8441 || idesc->operands[1] == IA64_OPND_AR3)
8442 {
8443 int index =
8444 ((idesc->operands[0] == IA64_OPND_AR3)
8445 ? 0 : 1);
8446 int regno =
8447 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8448
8449 if (regno == AR_ITC
8450 || (index == 0
8451 && (regno == AR_ITC
8452 || regno == AR_RSC
8453 || (regno >= AR_K0
8454 && regno <= AR_K7))))
8455 {
8456 specs[count++] = tmpl;
8457 }
8458 }
8459 else
8460 {
8461 specs[count++] = tmpl;
8462 }
8463 break;
8464 }
8465 }
8466 }
8467 }
800eeca4 8468 else if (note == 7)
542d6675
KH		 8469 {
8470 valueT mask = 0;
8471 if (idesc->operands[0] == IA64_OPND_IMMU24)
8472 {
8473 mask = CURR_SLOT.opnd[0].X_add_number;
8474 }
8475 else
8476 {
8477 UNHANDLED;
8478 }
8479 if (mask & ((valueT) 1 << dep->regindex))
8480 {
8481 specs[count++] = tmpl;
8482 }
8483 }
800eeca4 8484 else if (note == 8)
542d6675
KH		 8485 {
8486 int min = dep->regindex == PSR_DFL ? 2 : 32;
8487 int max = dep->regindex == PSR_DFL ? 31 : 127;
8488 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8489 for (i = 0; i < NELEMS (idesc->operands); i++)
8490 {
8491 if (idesc->operands[i] == IA64_OPND_F1
8492 || idesc->operands[i] == IA64_OPND_F2
8493 || idesc->operands[i] == IA64_OPND_F3
8494 || idesc->operands[i] == IA64_OPND_F4)
8495 {
8496 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8497 if (reg >= min && reg <= max)
8498 {
8499 specs[count++] = tmpl;
8500 }
8501 }
8502 }
8503 }
800eeca4 8504 else if (note == 9)
542d6675
KH		 8505 {
8506 int min = dep->regindex == PSR_MFL ? 2 : 32;
8507 int max = dep->regindex == PSR_MFL ? 31 : 127;
8508 /* mfh is read on writes to FR32-127; mfl is read on writes to
8509 FR2-31 */
8510 for (i = 0; i < idesc->num_outputs; i++)
8511 {
8512 if (idesc->operands[i] == IA64_OPND_F1)
8513 {
8514 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8515 if (reg >= min && reg <= max)
8516 {
8517 specs[count++] = tmpl;
8518 }
8519 }
8520 }
8521 }
800eeca4 8522 else if (note == 10)
542d6675
KH		 8523 {
8524 for (i = 0; i < NELEMS (idesc->operands); i++)
8525 {
8526 if (idesc->operands[i] == IA64_OPND_R1
8527 || idesc->operands[i] == IA64_OPND_R2
8528 || idesc->operands[i] == IA64_OPND_R3)
8529 {
8530 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8531 if (regno >= 16 && regno <= 31)
8532 {
8533 specs[count++] = tmpl;
8534 }
8535 }
8536 }
8537 }
800eeca4 8538 else
542d6675
KH		 8539 {
8540 UNHANDLED;
8541 }
800eeca4
JW		 8542 break;
8543
8544 case IA64_RS_AR_FPSR:
8545 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 8546 {
8547 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8548 if (regno == AR_FPSR)
8549 {
8550 specs[count++] = tmpl;
8551 }
8552 }
800eeca4 8553 else
542d6675
KH		 8554 {
8555 specs[count++] = tmpl;
8556 }
800eeca4
JW		 8557 break;
8558
197865e8 8559 case IA64_RS_ARX:
800eeca4
JW		 8560 /* Handle all AR[REG] resources */
8561 if (note == 0 || note == 1)
542d6675
KH		 8562 {
8563 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8564 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8565 && regno == dep->regindex)
8566 {
8567 specs[count++] = tmpl;
8568 }
8569 /* other AR[REG] resources may be affected by AR accesses */
8570 else if (idesc->operands[0] == IA64_OPND_AR3)
8571 {
8572 /* AR[] writes */
8573 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8574 switch (dep->regindex)
8575 {
8576 default:
8577 break;
8578 case AR_BSP:
8579 case AR_RNAT:
8580 if (regno == AR_BSPSTORE)
8581 {
8582 specs[count++] = tmpl;
8583 }
8584 case AR_RSC:
8585 if (!rsrc_write &&
8586 (regno == AR_BSPSTORE
8587 || regno == AR_RNAT))
8588 {
8589 specs[count++] = tmpl;
8590 }
8591 break;
8592 }
8593 }
8594 else if (idesc->operands[1] == IA64_OPND_AR3)
8595 {
8596 /* AR[] reads */
8597 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8598 switch (dep->regindex)
8599 {
8600 default:
8601 break;
8602 case AR_RSC:
8603 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8604 {
8605 specs[count++] = tmpl;
8606 }
8607 break;
8608 }
8609 }
8610 else
8611 {
8612 specs[count++] = tmpl;
8613 }
8614 }
800eeca4 8615 else
542d6675
KH		 8616 {
8617 UNHANDLED;
8618 }
800eeca4
JW		 8619 break;
8620
8621 case IA64_RS_CRX:
8622 /* Handle all CR[REG] resources */
8623 if (note == 0 || note == 1)
542d6675
KH		 8624 {
8625 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8626 {
8627 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8628 if (regno == dep->regindex)
8629 {
8630 specs[count++] = tmpl;
8631 }
8632 else if (!rsrc_write)
8633 {
8634 /* Reads from CR[IVR] affect other resources. */
8635 if (regno == CR_IVR)
8636 {
8637 if ((dep->regindex >= CR_IRR0
8638 && dep->regindex <= CR_IRR3)
8639 || dep->regindex == CR_TPR)
8640 {
8641 specs[count++] = tmpl;
8642 }
8643 }
8644 }
8645 }
8646 else
8647 {
8648 specs[count++] = tmpl;
8649 }
8650 }
800eeca4 8651 else
542d6675
KH		 8652 {
8653 UNHANDLED;
8654 }
800eeca4
JW		 8655 break;
8656
8657 case IA64_RS_INSERVICE:
8658 /* look for write of EOI (67) or read of IVR (65) */
8659 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 8660 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8661 || (idesc->operands[1] == IA64_OPND_CR3
8662 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8663 {
8664 specs[count++] = tmpl;
8665 }
800eeca4
JW		 8666 break;
8667
8668 case IA64_RS_GR0:
8669 if (note == 1)
542d6675
KH		 8670 {
8671 specs[count++] = tmpl;
8672 }
800eeca4 8673 else
542d6675
KH		 8674 {
8675 UNHANDLED;
8676 }
800eeca4
JW		 8677 break;
8678
8679 case IA64_RS_CFM:
8680 if (note != 2)
542d6675
KH		 8681 {
8682 specs[count++] = tmpl;
8683 }
800eeca4 8684 else
542d6675
KH		 8685 {
8686 /* Check if any of the registers accessed are in the rotating region.
8687 mov to/from pr accesses CFM only when qp_regno is in the rotating
8688 region */
8689 for (i = 0; i < NELEMS (idesc->operands); i++)
8690 {
8691 if (idesc->operands[i] == IA64_OPND_R1
8692 || idesc->operands[i] == IA64_OPND_R2
8693 || idesc->operands[i] == IA64_OPND_R3)
8694 {
8695 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8696 /* Assumes that md.rot.num_regs is always valid */
8697 if (md.rot.num_regs > 0
8698 && num > 31
8699 && num < 31 + md.rot.num_regs)
8700 {
8701 specs[count] = tmpl;
8702 specs[count++].specific = 0;
8703 }
8704 }
8705 else if (idesc->operands[i] == IA64_OPND_F1
8706 || idesc->operands[i] == IA64_OPND_F2
8707 || idesc->operands[i] == IA64_OPND_F3
8708 || idesc->operands[i] == IA64_OPND_F4)
8709 {
8710 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8711 if (num > 31)
8712 {
8713 specs[count] = tmpl;
8714 specs[count++].specific = 0;
8715 }
8716 }
8717 else if (idesc->operands[i] == IA64_OPND_P1
8718 || idesc->operands[i] == IA64_OPND_P2)
8719 {
8720 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8721 if (num > 15)
8722 {
8723 specs[count] = tmpl;
8724 specs[count++].specific = 0;
8725 }
8726 }
8727 }
8728 if (CURR_SLOT.qp_regno > 15)
8729 {
8730 specs[count] = tmpl;
8731 specs[count++].specific = 0;
8732 }
8733 }
800eeca4
JW		 8734 break;
8735
139368c9
JW		 8736 /* This is the same as IA64_RS_PRr, except simplified to account for
8737 the fact that there is only one register. */
800eeca4
JW		 8738 case IA64_RS_PR63:
8739 if (note == 0)
542d6675
KH		 8740 {
8741 specs[count++] = tmpl;
8742 }
139368c9 8743 else if (note == 7)
40449e9f
KH		 8744 {
8745 valueT mask = 0;
8746 if (idesc->operands[2] == IA64_OPND_IMM17)
8747 mask = CURR_SLOT.opnd[2].X_add_number;
8748 if (mask & ((valueT) 1 << 63))
139368c9 8749 specs[count++] = tmpl;
40449e9f 8750 }
800eeca4 8751 else if (note == 11)
542d6675
KH		 8752 {
8753 if ((idesc->operands[0] == IA64_OPND_P1
8754 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8755 || (idesc->operands[1] == IA64_OPND_P2
8756 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8757 {
8758 specs[count++] = tmpl;
8759 }
8760 }
800eeca4 8761 else if (note == 12)
542d6675
KH		 8762 {
8763 if (CURR_SLOT.qp_regno == 63)
8764 {
8765 specs[count++] = tmpl;
8766 }
8767 }
800eeca4 8768 else if (note == 1)
542d6675
KH		 8769 {
8770 if (rsrc_write)
8771 {
40449e9f
KH		 8772 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8773 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8774 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8775 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8776
4a4f25cf 8777 if (p1 == 63
7484b8e6
TW		 8778 && (idesc->operands[0] == IA64_OPND_P1
8779 || idesc->operands[0] == IA64_OPND_P2))
8780 {
40449e9f 8781 specs[count] = tmpl;
4a4f25cf 8782 specs[count++].cmp_type =
7484b8e6
TW		 8783 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8784 }
8785 if (p2 == 63
8786 && (idesc->operands[1] == IA64_OPND_P1
8787 || idesc->operands[1] == IA64_OPND_P2))
8788 {
40449e9f 8789 specs[count] = tmpl;
4a4f25cf 8790 specs[count++].cmp_type =
7484b8e6
TW		 8791 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8792 }
542d6675
KH		 8793 }
8794 else
8795 {
8796 if (CURR_SLOT.qp_regno == 63)
8797 {
8798 specs[count++] = tmpl;
8799 }
8800 }
8801 }
800eeca4 8802 else
542d6675
KH		 8803 {
8804 UNHANDLED;
8805 }
800eeca4
JW		 8806 break;
8807
8808 case IA64_RS_RSE:
8809 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 8810 read resources have not yet been completely identified, so for now
8811 treat RSE as a single resource */
800eeca4 8812 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 8813 {
8814 if (rsrc_write)
8815 {
8816 if (idesc->operands[0] == IA64_OPND_AR3
8817 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8818 {
8819 specs[count] = tmpl;
8820 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8821 }
8822 }
8823 else
8824 {
8825 if (idesc->operands[0] == IA64_OPND_AR3)
8826 {
8827 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8828 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8829 {
8830 specs[count++] = tmpl;
8831 }
8832 }
8833 else if (idesc->operands[1] == IA64_OPND_AR3)
8834 {
8835 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8836 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8837 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8838 {
8839 specs[count++] = tmpl;
8840 }
8841 }
8842 }
8843 }
197865e8 8844 else
542d6675
KH		 8845 {
8846 specs[count++] = tmpl;
8847 }
800eeca4
JW		 8848 break;
8849
8850 case IA64_RS_ANY:
8851 /* FIXME -- do any of these need to be non-specific? */
8852 specs[count++] = tmpl;
8853 break;
8854
8855 default:
8856 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8857 break;
8858 }
8859
8860 return count;
8861}
8862
8863/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 8864 QP of the marking instruction and a subsequent branch on the same QP. */
8865
800eeca4
JW		 8866static void
8867clear_qp_branch_flag (mask)
542d6675 8868 valueT mask;
800eeca4
JW		 8869{
8870 int i;
542d6675 8871 for (i = 0; i < regdepslen; i++)
800eeca4 8872 {
197865e8 8873 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 8874 if ((bit & mask) != 0)
542d6675
KH		 8875 {
8876 regdeps[i].link_to_qp_branch = 0;
8877 }
800eeca4
JW		 8878 }
8879}
8880
5e2f6673
L		 8881/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8882 any mutexes which contain one of the PRs and create new ones when
8883 needed. */
8884
8885static int
8886update_qp_mutex (valueT mask)
8887{
8888 int i;
8889 int add = 0;
8890
8891 i = 0;
8892 while (i < qp_mutexeslen)
8893 {
8894 if ((qp_mutexes[i].prmask & mask) != 0)
8895 {
8896 /* If it destroys and creates the same mutex, do nothing. */
8897 if (qp_mutexes[i].prmask == mask
8898 && qp_mutexes[i].path == md.path)
8899 {
8900 i++;
8901 add = -1;
8902 }
8903 else
8904 {
8905 int keep = 0;
8906
8907 if (md.debug_dv)
8908 {
8909 fprintf (stderr, " Clearing mutex relation");
8910 print_prmask (qp_mutexes[i].prmask);
8911 fprintf (stderr, "\n");
8912 }
8913
8914 /* Deal with the old mutex with more than 3+ PRs only if
8915 the new mutex on the same execution path with it.
8916
8917 FIXME: The 3+ mutex support is incomplete.
8918 dot_pred_rel () may be a better place to fix it. */
8919 if (qp_mutexes[i].path == md.path)
8920 {
8921 /* If it is a proper subset of the mutex, create a
8922 new mutex. */
8923 if (add == 0
8924 && (qp_mutexes[i].prmask & mask) == mask)
8925 add = 1;
8926
8927 qp_mutexes[i].prmask &= ~mask;
8928 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8929 {
8930 /* Modify the mutex if there are more than one
8931 PR left. */
8932 keep = 1;
8933 i++;
8934 }
8935 }
8936
8937 if (keep == 0)
8938 /* Remove the mutex. */
8939 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8940 }
8941 }
8942 else
8943 ++i;
8944 }
8945
8946 if (add == 1)
8947 add_qp_mutex (mask);
8948
8949 return add;
8950}
8951
197865e8 8952/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 8953
542d6675
KH		 8954 Any changes to a PR clears the mutex relations which include that PR. */
8955
800eeca4
JW		 8956static void
8957clear_qp_mutex (mask)
542d6675 8958 valueT mask;
800eeca4
JW		 8959{
8960 int i;
8961
8962 i = 0;
8963 while (i < qp_mutexeslen)
8964 {
8965 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 8966 {
8967 if (md.debug_dv)
8968 {
8969 fprintf (stderr, " Clearing mutex relation");
8970 print_prmask (qp_mutexes[i].prmask);
8971 fprintf (stderr, "\n");
8972 }
8973 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8974 }
800eeca4 8975 else
542d6675 8976 ++i;
800eeca4
JW		 8977 }
8978}
8979
8980/* Clear implies relations which contain PRs in the given masks.
8981 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 8982 indicates the implied PR. */
8983
800eeca4
JW		 8984static void
8985clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 8986 valueT p1_mask;
8987 valueT p2_mask;
800eeca4
JW		 8988{
8989 int i;
8990
8991 i = 0;
8992 while (i < qp_implieslen)
8993 {
197865e8 8994 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 8995 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8996 {
8997 if (md.debug_dv)
8998 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8999 qp_implies[i].p1, qp_implies[i].p2);
9000 qp_implies[i] = qp_implies[--qp_implieslen];
9001 }
197865e8 9002 else
542d6675 9003 ++i;
800eeca4
JW		 9004 }
9005}
9006
542d6675
KH		 9007/* Add the PRs specified to the list of implied relations. */
9008
800eeca4
JW		 9009static void
9010add_qp_imply (p1, p2)
542d6675 9011 int p1, p2;
800eeca4
JW		 9012{
9013 valueT mask;
9014 valueT bit;
9015 int i;
9016
542d6675 9017 /* p0 is not meaningful here. */
800eeca4
JW		 9018 if (p1 == 0 || p2 == 0)
9019 abort ();
9020
9021 if (p1 == p2)
9022 return;
9023
542d6675
KH		 9024 /* If it exists already, ignore it. */
9025 for (i = 0; i < qp_implieslen; i++)
800eeca4 9026 {
197865e8 9027 if (qp_implies[i].p1 == p1
542d6675
KH		 9028 && qp_implies[i].p2 == p2
9029 && qp_implies[i].path == md.path
9030 && !qp_implies[i].p2_branched)
9031 return;
800eeca4
JW		 9032 }
9033
9034 if (qp_implieslen == qp_impliestotlen)
9035 {
9036 qp_impliestotlen += 20;
9037 qp_implies = (struct qp_imply *)
542d6675
KH		 9038 xrealloc ((void *) qp_implies,
9039 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9040 }
9041 if (md.debug_dv)
9042 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9043 qp_implies[qp_implieslen].p1 = p1;
9044 qp_implies[qp_implieslen].p2 = p2;
9045 qp_implies[qp_implieslen].path = md.path;
9046 qp_implies[qp_implieslen++].p2_branched = 0;
9047
9048 /* Add in the implied transitive relations; for everything that p2 implies,
9049 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9050 as well. */
542d6675 9051 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9052 {
9053 if (qp_implies[i].p1 == p2)
542d6675 9054 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9055 if (qp_implies[i].p2 == p1)
542d6675 9056 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9057 }
9058 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9059 relation containing p2, duplicate it and replace p2 with p1. */
9060 bit = (valueT) 1 << p1;
9061 mask = (valueT) 1 << p2;
542d6675 9062 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9063 {
9064 if (qp_mutexes[i].prmask & mask)
542d6675 9065 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9066 }
9067}
9068
800eeca4
JW		 9069/* Add the PRs specified in the mask to the mutex list; this means that only
9070 one of the PRs can be true at any time. PR0 should never be included in
9071 the mask. */
542d6675 9072
800eeca4
JW		 9073static void
9074add_qp_mutex (mask)
542d6675 9075 valueT mask;
800eeca4
JW		 9076{
9077 if (mask & 0x1)
9078 abort ();
9079
9080 if (qp_mutexeslen == qp_mutexestotlen)
9081 {
9082 qp_mutexestotlen += 20;
9083 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9084 xrealloc ((void *) qp_mutexes,
9085 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9086 }
9087 if (md.debug_dv)
9088 {
9089 fprintf (stderr, " Registering mutex on");
9090 print_prmask (mask);
9091 fprintf (stderr, "\n");
9092 }
9093 qp_mutexes[qp_mutexeslen].path = md.path;
9094 qp_mutexes[qp_mutexeslen++].prmask = mask;
9095}
9096
cb5301b6
RH		 9097static int
9098has_suffix_p (name, suffix)
40449e9f
KH		 9099 const char *name;
9100 const char *suffix;
cb5301b6
RH		 9101{
9102 size_t namelen = strlen (name);
9103 size_t sufflen = strlen (suffix);
9104
9105 if (namelen <= sufflen)
9106 return 0;
9107 return strcmp (name + namelen - sufflen, suffix) == 0;
9108}
9109
800eeca4
JW		 9110static void
9111clear_register_values ()
9112{
9113 int i;
9114 if (md.debug_dv)
9115 fprintf (stderr, " Clearing register values\n");
542d6675 9116 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9117 gr_values[i].known = 0;
9118}
9119
9120/* Keep track of register values/changes which affect DV tracking.
9121
9122 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9123 have to examine a group of strings to identify them. */
800eeca4 9124
800eeca4
JW		 9125static void
9126note_register_values (idesc)
542d6675 9127 struct ia64_opcode *idesc;
800eeca4
JW		 9128{
9129 valueT qp_changemask = 0;
9130 int i;
9131
542d6675
KH		 9132 /* Invalidate values for registers being written to. */
9133 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9134 {
197865e8 9135 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9136 || idesc->operands[i] == IA64_OPND_R2
9137 || idesc->operands[i] == IA64_OPND_R3)
9138 {
9139 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9140 if (regno > 0 && regno < NELEMS (gr_values))
9141 gr_values[regno].known = 0;
9142 }
50b81f19
JW		 9143 else if (idesc->operands[i] == IA64_OPND_R3_2)
9144 {
9145 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9146 if (regno > 0 && regno < 4)
9147 gr_values[regno].known = 0;
9148 }
197865e8 9149 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9150 || idesc->operands[i] == IA64_OPND_P2)
9151 {
9152 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9153 qp_changemask |= (valueT) 1 << regno;
9154 }
800eeca4 9155 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9156 {
9157 if (idesc->operands[2] & (valueT) 0x10000)
9158 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9159 else
9160 qp_changemask = idesc->operands[2];
9161 break;
9162 }
800eeca4 9163 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9164 {
9165 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9166 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9167 else
9168 qp_changemask = idesc->operands[1];
9169 qp_changemask &= ~(valueT) 0xFFFF;
9170 break;
9171 }
9172 }
9173
9174 /* Always clear qp branch flags on any PR change. */
9175 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9176 clear_qp_branch_flag (qp_changemask);
9177
542d6675 9178 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9179 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9180 {
197865e8 9181 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9182 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9183 {
9184 for (i = 32; i < 32 + md.rot.num_regs; i++)
9185 gr_values[i].known = 0;
9186 }
800eeca4
JW		 9187 clear_qp_mutex (qp_changemask);
9188 clear_qp_implies (qp_changemask, qp_changemask);
9189 }
542d6675
KH		 9190 /* After a call, all register values are undefined, except those marked
9191 as "safe". */
800eeca4 9192 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9193 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9194 {
56d27c17 9195 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9196 clear_register_values ();
9197 clear_qp_mutex (~qp_safe_across_calls);
9198 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9199 clear_qp_branch_flag (~qp_safe_across_calls);
9200 }
e9718fe1 9201 else if (is_interruption_or_rfi (idesc)
542d6675 9202 || is_taken_branch (idesc))
e9718fe1
TW		 9203 {
9204 clear_register_values ();
197865e8
KH		 9205 clear_qp_mutex (~(valueT) 0);
9206 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9207 }
542d6675 9208 /* Look for mutex and implies relations. */
197865e8 9209 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9210 || idesc->operands[0] == IA64_OPND_P2)
9211 && (idesc->operands[1] == IA64_OPND_P1
9212 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9213 {
9214 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9215 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9216 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9217 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 9218
5e2f6673
L		 9219 /* If both PRs are PR0, we can't really do anything. */
9220 if (p1 == 0 && p2 == 0)
542d6675
KH		 9221 {
9222 if (md.debug_dv)
9223 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9224 }
800eeca4 9225 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 9226 with the following exceptions. */
cb5301b6
RH		 9227 else if (has_suffix_p (idesc->name, ".or.andcm")
9228 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 9229 {
542d6675
KH		 9230 clear_qp_implies (p2mask, p1mask);
9231 }
cb5301b6
RH		 9232 else if (has_suffix_p (idesc->name, ".andcm")
9233 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 9234 {
9235 clear_qp_implies (0, p1mask | p2mask);
9236 }
cb5301b6
RH		 9237 else if (has_suffix_p (idesc->name, ".orcm")
9238 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 9239 {
9240 clear_qp_mutex (p1mask | p2mask);
9241 clear_qp_implies (p1mask | p2mask, 0);
9242 }
800eeca4 9243 else
542d6675 9244 {
5e2f6673
L		 9245 int added = 0;
9246
542d6675 9247 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 9248
9249 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9250 if (p1 == 0 || p2 == 0)
9251 clear_qp_mutex (p1mask | p2mask);
9252 else
9253 added = update_qp_mutex (p1mask | p2mask);
9254
9255 if (CURR_SLOT.qp_regno == 0
9256 || has_suffix_p (idesc->name, ".unc"))
542d6675 9257 {
5e2f6673
L		 9258 if (added == 0 && p1 && p2)
9259 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 9260 if (CURR_SLOT.qp_regno != 0)
9261 {
5e2f6673
L		 9262 if (p1)
9263 add_qp_imply (p1, CURR_SLOT.qp_regno);
9264 if (p2)
9265 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 9266 }
9267 }
542d6675
KH		 9268 }
9269 }
9270 /* Look for mov imm insns into GRs. */
800eeca4 9271 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 9272 && (idesc->operands[1] == IA64_OPND_IMM22
9273 || idesc->operands[1] == IA64_OPND_IMMU64)
9274 && (strcmp (idesc->name, "mov") == 0
9275 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 9276 {
9277 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 9278 if (regno > 0 && regno < NELEMS (gr_values))
9279 {
9280 gr_values[regno].known = 1;
9281 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9282 gr_values[regno].path = md.path;
9283 if (md.debug_dv)
2434f565
JW		 9284 {
9285 fprintf (stderr, " Know gr%d = ", regno);
9286 fprintf_vma (stderr, gr_values[regno].value);
9287 fputs ("\n", stderr);
9288 }
542d6675 9289 }
800eeca4 9290 }
197865e8 9291 else
800eeca4
JW		 9292 {
9293 clear_qp_mutex (qp_changemask);
9294 clear_qp_implies (qp_changemask, qp_changemask);
9295 }
9296}
9297
542d6675
KH		 9298/* Return whether the given predicate registers are currently mutex. */
9299
800eeca4
JW		 9300static int
9301qp_mutex (p1, p2, path)
542d6675
KH		 9302 int p1;
9303 int p2;
9304 int path;
800eeca4
JW		 9305{
9306 int i;
9307 valueT mask;
9308
9309 if (p1 != p2)
9310 {
542d6675
KH		 9311 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9312 for (i = 0; i < qp_mutexeslen; i++)
9313 {
9314 if (qp_mutexes[i].path >= path
9315 && (qp_mutexes[i].prmask & mask) == mask)
9316 return 1;
9317 }
800eeca4
JW		 9318 }
9319 return 0;
9320}
9321
9322/* Return whether the given resource is in the given insn's list of chks
9323 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 9324 conflict. */
9325
800eeca4
JW		 9326static int
9327resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 9328 struct rsrc *rs;
9329 struct ia64_opcode *idesc;
9330 int note;
9331 int qp_regno;
9332 int path;
800eeca4
JW		 9333{
9334 struct rsrc specs[MAX_SPECS];
9335 int count;
9336
9337 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9338 we don't need to check. One exception is note 11, which indicates that
9339 target predicates are written regardless of PR[qp]. */
197865e8 9340 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 9341 && note != 11)
9342 return 0;
9343
9344 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9345 while (count-- > 0)
9346 {
9347 /* UNAT checking is a bit more specific than other resources */
9348 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 9349 && specs[count].mem_offset.hint
9350 && rs->mem_offset.hint)
9351 {
9352 if (rs->mem_offset.base == specs[count].mem_offset.base)
9353 {
9354 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9355 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9356 return 1;
9357 else
9358 continue;
9359 }
9360 }
800eeca4 9361
7484b8e6 9362 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 9363 writes are an OR. */
7484b8e6 9364 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 9365 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 9366 || rs->dependency->specifier == IA64_RS_PR63)
9367 {
9368 if (specs[count].cmp_type != CMP_NONE
9369 && specs[count].cmp_type == rs->cmp_type)
9370 {
9371 if (md.debug_dv)
9372 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9373 dv_mode[rs->dependency->mode],
afa680f8 9374 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 9375 specs[count].index : 63);
9376 continue;
9377 }
9378 if (md.debug_dv)
4a4f25cf 9379 fprintf (stderr,
7484b8e6
TW		 9380 " %s on parallel compare conflict %s vs %s on PR%d\n",
9381 dv_mode[rs->dependency->mode],
4a4f25cf 9382 dv_cmp_type[rs->cmp_type],
7484b8e6 9383 dv_cmp_type[specs[count].cmp_type],
afa680f8 9384 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 9385 specs[count].index : 63);
4a4f25cf 9386
7484b8e6
TW		 9387 }
9388
800eeca4 9389 /* If either resource is not specific, conservatively assume a conflict
197865e8 9390 */
800eeca4 9391 if (!specs[count].specific || !rs->specific)
542d6675 9392 return 2;
800eeca4 9393 else if (specs[count].index == rs->index)
542d6675 9394 return 1;
800eeca4
JW		 9395 }
9396#if 0
9397 if (md.debug_dv)
9398 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9399#endif
9400
9401 return 0;
9402}
9403
9404/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9405 insert a stop to create the break. Update all resource dependencies
9406 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9407 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9408 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 9409 instruction. */
800eeca4
JW		 9410
9411static void
9412insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 9413 int insert_stop;
9414 int qp_regno;
9415 int save_current;
800eeca4
JW		 9416{
9417 int i;
9418
9419 if (insert_stop && md.num_slots_in_use > 0)
9420 PREV_SLOT.end_of_insn_group = 1;
9421
9422 if (md.debug_dv)
9423 {
197865e8 9424 fprintf (stderr, " Insn group break%s",
542d6675 9425 (insert_stop ? " (w/stop)" : ""));
800eeca4 9426 if (qp_regno != 0)
542d6675 9427 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 9428 fprintf (stderr, "\n");
9429 }
9430
9431 i = 0;
9432 while (i < regdepslen)
9433 {
9434 const struct ia64_dependency *dep = regdeps[i].dependency;
9435
9436 if (qp_regno != 0
542d6675
KH		 9437 && regdeps[i].qp_regno != qp_regno)
9438 {
9439 ++i;
9440 continue;
9441 }
800eeca4
JW		 9442
9443 if (save_current
542d6675
KH		 9444 && CURR_SLOT.src_file == regdeps[i].file
9445 && CURR_SLOT.src_line == regdeps[i].line)
9446 {
9447 ++i;
9448 continue;
9449 }
800eeca4
JW		 9450
9451 /* clear dependencies which are automatically cleared by a stop, or
542d6675 9452 those that have reached the appropriate state of insn serialization */
800eeca4 9453 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 9454 || dep->semantics == IA64_DVS_IMPLIEDF
9455 || regdeps[i].insn_srlz == STATE_SRLZ)
9456 {
9457 print_dependency ("Removing", i);
9458 regdeps[i] = regdeps[--regdepslen];
9459 }
800eeca4 9460 else
542d6675
KH		 9461 {
9462 if (dep->semantics == IA64_DVS_DATA
9463 || dep->semantics == IA64_DVS_INSTR
800eeca4 9464 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 9465 {
9466 if (regdeps[i].insn_srlz == STATE_NONE)
9467 regdeps[i].insn_srlz = STATE_STOP;
9468 if (regdeps[i].data_srlz == STATE_NONE)
9469 regdeps[i].data_srlz = STATE_STOP;
9470 }
9471 ++i;
9472 }
800eeca4
JW		 9473 }
9474}
9475
542d6675
KH		 9476/* Add the given resource usage spec to the list of active dependencies. */
9477
197865e8 9478static void
800eeca4 9479mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 9480 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9481 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 9482 struct rsrc *spec;
9483 int depind;
9484 int path;
800eeca4
JW		 9485{
9486 if (regdepslen == regdepstotlen)
9487 {
9488 regdepstotlen += 20;
9489 regdeps = (struct rsrc *)
542d6675 9490 xrealloc ((void *) regdeps,
bc805888 9491 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 9492 }
9493
9494 regdeps[regdepslen] = *spec;
9495 regdeps[regdepslen].depind = depind;
9496 regdeps[regdepslen].path = path;
9497 regdeps[regdepslen].file = CURR_SLOT.src_file;
9498 regdeps[regdepslen].line = CURR_SLOT.src_line;
9499
9500 print_dependency ("Adding", regdepslen);
9501
9502 ++regdepslen;
9503}
9504
9505static void
9506print_dependency (action, depind)
542d6675
KH		 9507 const char *action;
9508 int depind;
800eeca4
JW		 9509{
9510 if (md.debug_dv)
9511 {
197865e8 9512 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 9513 action, dv_mode[(regdeps[depind].dependency)->mode],
9514 (regdeps[depind].dependency)->name);
800eeca4 9515 if (regdeps[depind].specific && regdeps[depind].index != 0)
542d6675 9516 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 9517 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 9518 {
9519 fputs (" ", stderr);
9520 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9521 fputs ("+", stderr);
9522 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9523 }
800eeca4
JW		 9524 fprintf (stderr, "\n");
9525 }
9526}
9527
9528static void
9529instruction_serialization ()
9530{
9531 int i;
9532 if (md.debug_dv)
9533 fprintf (stderr, " Instruction serialization\n");
542d6675 9534 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 9535 if (regdeps[i].insn_srlz == STATE_STOP)
9536 regdeps[i].insn_srlz = STATE_SRLZ;
9537}
9538
9539static void
9540data_serialization ()
9541{
9542 int i = 0;
9543 if (md.debug_dv)
9544 fprintf (stderr, " Data serialization\n");
9545 while (i < regdepslen)
9546 {
9547 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 9548 /* Note: as of 991210, all "other" dependencies are cleared by a
9549 data serialization. This might change with new tables */
9550 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9551 {
9552 print_dependency ("Removing", i);
9553 regdeps[i] = regdeps[--regdepslen];
9554 }
800eeca4 9555 else
542d6675 9556 ++i;
800eeca4
JW		 9557 }
9558}
9559
542d6675
KH		 9560/* Insert stops and serializations as needed to avoid DVs. */
9561
800eeca4
JW		 9562static void
9563remove_marked_resource (rs)
542d6675 9564 struct rsrc *rs;
800eeca4
JW		 9565{
9566 switch (rs->dependency->semantics)
9567 {
9568 case IA64_DVS_SPECIFIC:
9569 if (md.debug_dv)
9570 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 9571 /* ...fall through... */
800eeca4
JW		 9572 case IA64_DVS_INSTR:
9573 if (md.debug_dv)
542d6675 9574 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 9575 if (rs->insn_srlz < STATE_STOP)
542d6675 9576 insn_group_break (1, 0, 0);
800eeca4 9577 if (rs->insn_srlz < STATE_SRLZ)
542d6675 9578 {
888a75be 9579 struct slot oldslot = CURR_SLOT;
542d6675 9580 /* Manually jam a srlz.i insn into the stream */
888a75be 9581 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
542d6675
KH		 9582 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9583 instruction_serialization ();
9584 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9585 if (++md.num_slots_in_use >= NUM_SLOTS)
9586 emit_one_bundle ();
888a75be 9587 CURR_SLOT = oldslot;
542d6675 9588 }
800eeca4
JW		 9589 insn_group_break (1, 0, 0);
9590 break;
9591 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 9592 "other" types of DV are eliminated
9593 by a data serialization */
800eeca4
JW		 9594 case IA64_DVS_DATA:
9595 if (md.debug_dv)
542d6675 9596 fprintf (stderr, "Inserting data serialization\n");
800eeca4 9597 if (rs->data_srlz < STATE_STOP)
542d6675 9598 insn_group_break (1, 0, 0);
800eeca4 9599 {
888a75be 9600 struct slot oldslot = CURR_SLOT;
542d6675 9601 /* Manually jam a srlz.d insn into the stream */
888a75be 9602 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
542d6675
KH		 9603 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9604 data_serialization ();
9605 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9606 if (++md.num_slots_in_use >= NUM_SLOTS)
9607 emit_one_bundle ();
888a75be 9608 CURR_SLOT = oldslot;
800eeca4
JW		 9609 }
9610 break;
9611 case IA64_DVS_IMPLIED:
9612 case IA64_DVS_IMPLIEDF:
9613 if (md.debug_dv)
542d6675 9614 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 9615 insn_group_break (1, 0, 0);
9616 break;
9617 default:
9618 break;
9619 }
9620}
9621
9622/* Check the resources used by the given opcode against the current dependency
197865e8 9623 list.
800eeca4
JW		 9624
9625 The check is run once for each execution path encountered. In this case,
9626 a unique execution path is the sequence of instructions following a code
9627 entry point, e.g. the following has three execution paths, one starting
9628 at L0, one at L1, and one at L2.
197865e8 9629
800eeca4
JW		 9630 L0: nop
9631 L1: add
9632 L2: add
197865e8 9633 br.ret
800eeca4 9634*/
542d6675 9635
800eeca4
JW		 9636static void
9637check_dependencies (idesc)
542d6675 9638 struct ia64_opcode *idesc;
800eeca4
JW		 9639{
9640 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9641 int path;
9642 int i;
9643
9644 /* Note that the number of marked resources may change within the
197865e8 9645 loop if in auto mode. */
800eeca4
JW		 9646 i = 0;
9647 while (i < regdepslen)
9648 {
9649 struct rsrc *rs = &regdeps[i];
9650 const struct ia64_dependency *dep = rs->dependency;
9651 int chkind;
9652 int note;
9653 int start_over = 0;
9654
9655 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 9656 || (chkind = depends_on (rs->depind, idesc)) == -1)
9657 {
9658 ++i;
9659 continue;
9660 }
9661
9662 note = NOTE (opdeps->chks[chkind]);
9663
9664 /* Check this resource against each execution path seen thus far. */
9665 for (path = 0; path <= md.path; path++)
9666 {
9667 int matchtype;
9668
9669 /* If the dependency wasn't on the path being checked, ignore it. */
9670 if (rs->path < path)
9671 continue;
9672
9673 /* If the QP for this insn implies a QP which has branched, don't
9674 bother checking. Ed. NOTE: I don't think this check is terribly
9675 useful; what's the point of generating code which will only be
9676 reached if its QP is zero?
9677 This code was specifically inserted to handle the following code,
9678 based on notes from Intel's DV checking code, where p1 implies p2.
9679
9680 mov r4 = 2
9681 (p2) br.cond L
9682 (p1) mov r4 = 7
9683 */
9684 if (CURR_SLOT.qp_regno != 0)
9685 {
9686 int skip = 0;
9687 int implies;
9688 for (implies = 0; implies < qp_implieslen; implies++)
9689 {
9690 if (qp_implies[implies].path >= path
9691 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9692 && qp_implies[implies].p2_branched)
9693 {
9694 skip = 1;
9695 break;
9696 }
9697 }
9698 if (skip)
9699 continue;
9700 }
9701
9702 if ((matchtype = resources_match (rs, idesc, note,
9703 CURR_SLOT.qp_regno, path)) != 0)
9704 {
9705 char msg[1024];
9706 char pathmsg[256] = "";
9707 char indexmsg[256] = "";
9708 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9709
9710 if (path != 0)
9711 sprintf (pathmsg, " when entry is at label '%s'",
9712 md.entry_labels[path - 1]);
9713 if (rs->specific && rs->index != 0)
9714 sprintf (indexmsg, ", specific resource number is %d",
9715 rs->index);
9716 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9717 idesc->name,
9718 (certain ? "violates" : "may violate"),
9719 dv_mode[dep->mode], dep->name,
9720 dv_sem[dep->semantics],
9721 pathmsg, indexmsg);
9722
9723 if (md.explicit_mode)
9724 {
9725 as_warn ("%s", msg);
9726 if (path < md.path)
9727 as_warn (_("Only the first path encountering the conflict "
9728 "is reported"));
9729 as_warn_where (rs->file, rs->line,
9730 _("This is the location of the "
9731 "conflicting usage"));
9732 /* Don't bother checking other paths, to avoid duplicating
9733 the same warning */
9734 break;
9735 }
9736 else
9737 {
9738 if (md.debug_dv)
9739 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9740
9741 remove_marked_resource (rs);
9742
9743 /* since the set of dependencies has changed, start over */
9744 /* FIXME -- since we're removing dvs as we go, we
9745 probably don't really need to start over... */
9746 start_over = 1;
9747 break;
9748 }
9749 }
9750 }
800eeca4 9751 if (start_over)
542d6675 9752 i = 0;
800eeca4 9753 else
542d6675 9754 ++i;
800eeca4
JW		 9755 }
9756}
9757
542d6675
KH		 9758/* Register new dependencies based on the given opcode. */
9759
800eeca4
JW		 9760static void
9761mark_resources (idesc)
542d6675 9762 struct ia64_opcode *idesc;
800eeca4
JW		 9763{
9764 int i;
9765 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9766 int add_only_qp_reads = 0;
9767
9768 /* A conditional branch only uses its resources if it is taken; if it is
9769 taken, we stop following that path. The other branch types effectively
9770 *always* write their resources. If it's not taken, register only QP
197865e8 9771 reads. */
800eeca4
JW		 9772 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9773 {
9774 add_only_qp_reads = 1;
9775 }
9776
9777 if (md.debug_dv)
9778 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9779
542d6675 9780 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 9781 {
9782 const struct ia64_dependency *dep;
9783 struct rsrc specs[MAX_SPECS];
9784 int note;
9785 int path;
9786 int count;
197865e8 9787
800eeca4 9788 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 9789 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 9790
9791 if (add_only_qp_reads
542d6675
KH		 9792 && !(dep->mode == IA64_DV_WAR
9793 && (dep->specifier == IA64_RS_PR
139368c9 9794 || dep->specifier == IA64_RS_PRr
542d6675
KH		 9795 || dep->specifier == IA64_RS_PR63)))
9796 continue;
800eeca4
JW		 9797
9798 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9799
9800#if 0
9801 if (md.debug_dv && !count)
542d6675
KH		 9802 fprintf (stderr, " No %s %s usage found (path %d)\n",
9803 dv_mode[dep->mode], dep->name, md.path);
800eeca4 9804#endif
197865e8 9805
800eeca4 9806 while (count-- > 0)
542d6675
KH		 9807 {
9808 mark_resource (idesc, dep, &specs[count],
9809 DEP (opdeps->regs[i]), md.path);
9810 }
800eeca4
JW		 9811
9812 /* The execution path may affect register values, which may in turn
542d6675 9813 affect which indirect-access resources are accessed. */
800eeca4 9814 switch (dep->specifier)
542d6675
KH		 9815 {
9816 default:
9817 break;
9818 case IA64_RS_CPUID:
9819 case IA64_RS_DBR:
9820 case IA64_RS_IBR:
800eeca4 9821 case IA64_RS_MSR:
542d6675
KH		 9822 case IA64_RS_PKR:
9823 case IA64_RS_PMC:
9824 case IA64_RS_PMD:
9825 case IA64_RS_RR:
9826 for (path = 0; path < md.path; path++)
9827 {
9828 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9829 while (count-- > 0)
9830 mark_resource (idesc, dep, &specs[count],
9831 DEP (opdeps->regs[i]), path);
9832 }
9833 break;
9834 }
9835 }
9836}
9837
9838/* Remove dependencies when they no longer apply. */
9839
800eeca4
JW		 9840static void
9841update_dependencies (idesc)
542d6675 9842 struct ia64_opcode *idesc;
800eeca4
JW		 9843{
9844 int i;
9845
9846 if (strcmp (idesc->name, "srlz.i") == 0)
9847 {
9848 instruction_serialization ();
9849 }
9850 else if (strcmp (idesc->name, "srlz.d") == 0)
9851 {
9852 data_serialization ();
9853 }
9854 else if (is_interruption_or_rfi (idesc)
542d6675 9855 || is_taken_branch (idesc))
800eeca4 9856 {
542d6675
KH		 9857 /* Although technically the taken branch doesn't clear dependencies
9858 which require a srlz.[id], we don't follow the branch; the next
9859 instruction is assumed to start with a clean slate. */
800eeca4 9860 regdepslen = 0;
800eeca4
JW		 9861 md.path = 0;
9862 }
9863 else if (is_conditional_branch (idesc)
542d6675 9864 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 9865 {
9866 int is_call = strstr (idesc->name, ".call") != NULL;
9867
542d6675
KH		 9868 for (i = 0; i < qp_implieslen; i++)
9869 {
9870 /* If the conditional branch's predicate is implied by the predicate
9871 in an existing dependency, remove that dependency. */
9872 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9873 {
9874 int depind = 0;
9875 /* Note that this implied predicate takes a branch so that if
9876 a later insn generates a DV but its predicate implies this
9877 one, we can avoid the false DV warning. */
9878 qp_implies[i].p2_branched = 1;
9879 while (depind < regdepslen)
9880 {
9881 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9882 {
9883 print_dependency ("Removing", depind);
9884 regdeps[depind] = regdeps[--regdepslen];
9885 }
9886 else
9887 ++depind;
9888 }
9889 }
9890 }
800eeca4 9891 /* Any marked resources which have this same predicate should be
542d6675
KH		 9892 cleared, provided that the QP hasn't been modified between the
9893 marking instruction and the branch. */
800eeca4 9894 if (is_call)
542d6675
KH		 9895 {
9896 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9897 }
800eeca4 9898 else
542d6675
KH		 9899 {
9900 i = 0;
9901 while (i < regdepslen)
9902 {
9903 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9904 && regdeps[i].link_to_qp_branch
9905 && (regdeps[i].file != CURR_SLOT.src_file
9906 || regdeps[i].line != CURR_SLOT.src_line))
9907 {
9908 /* Treat like a taken branch */
9909 print_dependency ("Removing", i);
9910 regdeps[i] = regdeps[--regdepslen];
9911 }
9912 else
9913 ++i;
9914 }
9915 }
800eeca4
JW		 9916 }
9917}
9918
9919/* Examine the current instruction for dependency violations. */
542d6675 9920
800eeca4
JW		 9921static int
9922check_dv (idesc)
542d6675 9923 struct ia64_opcode *idesc;
800eeca4
JW		 9924{
9925 if (md.debug_dv)
9926 {
197865e8 9927 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 9928 idesc->name, CURR_SLOT.src_line,
9929 idesc->dependencies->nchks,
9930 idesc->dependencies->nregs);
800eeca4
JW		 9931 }
9932
197865e8 9933 /* Look through the list of currently marked resources; if the current
800eeca4 9934 instruction has the dependency in its chks list which uses that resource,
542d6675 9935 check against the specific resources used. */
800eeca4
JW		 9936 check_dependencies (idesc);
9937
542d6675
KH		 9938 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9939 then add them to the list of marked resources. */
800eeca4
JW		 9940 mark_resources (idesc);
9941
9942 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 9943 requirements for being cleared
9944
800eeca4
JW		 9945 Instruction serialization (insns separated by interruption, rfi, or
9946 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9947
9948 Data serialization (instruction serialization, or writer + srlz.d +
9949 reader, where writer and srlz.d are in separate groups) clears
9950 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9951 always be the case).
9952
9953 Instruction group break (groups separated by stop, taken branch,
9954 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9955 */
9956 update_dependencies (idesc);
9957
9958 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 9959 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 9960 note_register_values (idesc);
9961
197865e8 9962 /* We don't need or want this anymore. */
800eeca4
JW		 9963 md.mem_offset.hint = 0;
9964
9965 return 0;
9966}
9967
9968/* Translate one line of assembly. Pseudo ops and labels do not show
9969 here. */
9970void
9971md_assemble (str)
9972 char *str;
9973{
9974 char *saved_input_line_pointer, *mnemonic;
9975 const struct pseudo_opcode *pdesc;
9976 struct ia64_opcode *idesc;
9977 unsigned char qp_regno;
9978 unsigned int flags;
9979 int ch;
9980
9981 saved_input_line_pointer = input_line_pointer;
9982 input_line_pointer = str;
9983
542d6675 9984 /* extract the opcode (mnemonic): */
800eeca4
JW		 9985
9986 mnemonic = input_line_pointer;
9987 ch = get_symbol_end ();
9988 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9989 if (pdesc)
9990 {
9991 *input_line_pointer = ch;
9992 (*pdesc->handler) (pdesc->arg);
9993 goto done;
9994 }
9995
542d6675 9996 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 9997
9998 idesc = ia64_find_opcode (mnemonic);
9999 *input_line_pointer = ch;
10000 if (!idesc)
10001 {
10002 as_bad ("Unknown opcode `%s'", mnemonic);
10003 goto done;
10004 }
10005
10006 idesc = parse_operands (idesc);
10007 if (!idesc)
10008 goto done;
10009
542d6675 10010 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10011 if (idesc->type == IA64_TYPE_DYN)
10012 {
10013 if (strcmp (idesc->name, "add") == 0)
10014 {
10015 if (CURR_SLOT.opnd[2].X_op == O_register
10016 && CURR_SLOT.opnd[2].X_add_number < 4)
10017 mnemonic = "addl";
10018 else
10019 mnemonic = "adds";
3d56ab85 10020 ia64_free_opcode (idesc);
800eeca4
JW		 10021 idesc = ia64_find_opcode (mnemonic);
10022#if 0
10023 know (!idesc->next);
10024#endif
10025 }
10026 else if (strcmp (idesc->name, "mov") == 0)
10027 {
10028 enum ia64_opnd opnd1, opnd2;
10029 int rop;
10030
10031 opnd1 = idesc->operands[0];
10032 opnd2 = idesc->operands[1];
10033 if (opnd1 == IA64_OPND_AR3)
10034 rop = 0;
10035 else if (opnd2 == IA64_OPND_AR3)
10036 rop = 1;
10037 else
10038 abort ();
652ca075
L		 10039 if (CURR_SLOT.opnd[rop].X_op == O_register)
10040 {
10041 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10042 mnemonic = "mov.i";
10043 else
10044 mnemonic = "mov.m";
10045 }
800eeca4 10046 else
652ca075 10047 abort ();
3d56ab85 10048 ia64_free_opcode (idesc);
800eeca4
JW		 10049 idesc = ia64_find_opcode (mnemonic);
10050 while (idesc != NULL
10051 && (idesc->operands[0] != opnd1
10052 || idesc->operands[1] != opnd2))
10053 idesc = get_next_opcode (idesc);
10054 }
10055 }
652ca075
L		 10056 else if (strcmp (idesc->name, "mov.i") == 0
10057 || strcmp (idesc->name, "mov.m") == 0)
10058 {
10059 enum ia64_opnd opnd1, opnd2;
10060 int rop;
10061
10062 opnd1 = idesc->operands[0];
10063 opnd2 = idesc->operands[1];
10064 if (opnd1 == IA64_OPND_AR3)
10065 rop = 0;
10066 else if (opnd2 == IA64_OPND_AR3)
10067 rop = 1;
10068 else
10069 abort ();
10070 if (CURR_SLOT.opnd[rop].X_op == O_register)
10071 {
10072 char unit = 'a';
10073 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10074 unit = 'i';
10075 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10076 unit = 'm';
10077 if (unit != 'a' && unit != idesc->name [4])
10078 as_bad ("AR %d cannot be accessed by %c-unit",
10079 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10080 TOUPPER (unit));
10081 }
10082 }
800eeca4
JW		 10083
10084 qp_regno = 0;
10085 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10086 {
10087 qp_regno = md.qp.X_add_number - REG_P;
10088 md.qp.X_op = O_absent;
10089 }
800eeca4
JW		 10090
10091 flags = idesc->flags;
10092
10093 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10094 {
10095 /* The alignment frag has to end with a stop bit only if the
10096 next instruction after the alignment directive has to be
10097 the first instruction in an instruction group. */
10098 if (align_frag)
10099 {
10100 while (align_frag->fr_type != rs_align_code)
10101 {
10102 align_frag = align_frag->fr_next;
bae25f19
L		 10103 if (!align_frag)
10104 break;
9545c4ce 10105 }
bae25f19
L		 10106 /* align_frag can be NULL if there are directives in
10107 between. */
10108 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10109 align_frag->tc_frag_data = 1;
10110 }
10111
10112 insn_group_break (1, 0, 0);
10113 }
10114 align_frag = NULL;
800eeca4
JW		 10115
10116 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10117 {
10118 as_bad ("`%s' cannot be predicated", idesc->name);
10119 goto done;
10120 }
10121
542d6675 10122 /* Build the instruction. */
800eeca4
JW		 10123 CURR_SLOT.qp_regno = qp_regno;
10124 CURR_SLOT.idesc = idesc;
10125 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10126 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4
JW		 10127
10128 /* Add unwind entry, if there is one. */
e0c9811a 10129 if (unwind.current_entry)
800eeca4 10130 {
e0c9811a
JW		 10131 CURR_SLOT.unwind_record = unwind.current_entry;
10132 unwind.current_entry = NULL;
800eeca4
JW		 10133 }
10134
542d6675 10135 /* Check for dependency violations. */
800eeca4 10136 if (md.detect_dv)
542d6675 10137 check_dv (idesc);
800eeca4
JW		 10138
10139 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10140 if (++md.num_slots_in_use >= NUM_SLOTS)
10141 emit_one_bundle ();
10142
10143 if ((flags & IA64_OPCODE_LAST) != 0)
10144 insn_group_break (1, 0, 0);
10145
10146 md.last_text_seg = now_seg;
10147
10148 done:
10149 input_line_pointer = saved_input_line_pointer;
10150}
10151
10152/* Called when symbol NAME cannot be found in the symbol table.
10153 Should be used for dynamic valued symbols only. */
542d6675
KH		 10154
10155symbolS *
800eeca4 10156md_undefined_symbol (name)
2434f565 10157 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10158{
10159 return 0;
10160}
10161
10162/* Called for any expression that can not be recognized. When the
10163 function is called, `input_line_pointer' will point to the start of
10164 the expression. */
542d6675 10165
800eeca4
JW		 10166void
10167md_operand (e)
10168 expressionS *e;
10169{
10170 enum pseudo_type pseudo_type;
e0c9811a 10171 const char *name;
800eeca4
JW		 10172 size_t len;
10173 int ch, i;
10174
10175 switch (*input_line_pointer)
10176 {
10177 case '@':
542d6675 10178 /* Find what relocation pseudo-function we're dealing with. */
800eeca4
JW		 10179 pseudo_type = 0;
10180 ch = *++input_line_pointer;
10181 for (i = 0; i < NELEMS (pseudo_func); ++i)
10182 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10183 {
10184 len = strlen (pseudo_func[i].name);
10185 if (strncmp (pseudo_func[i].name + 1,
10186 input_line_pointer + 1, len - 1) == 0
10187 && !is_part_of_name (input_line_pointer[len]))
10188 {
10189 input_line_pointer += len;
10190 pseudo_type = pseudo_func[i].type;
10191 break;
10192 }
10193 }
10194 switch (pseudo_type)
10195 {
10196 case PSEUDO_FUNC_RELOC:
10197 SKIP_WHITESPACE ();
10198 if (*input_line_pointer != '(')
10199 {
10200 as_bad ("Expected '('");
10201 goto err;
10202 }
542d6675
KH		 10203 /* Skip '('. */
10204 ++input_line_pointer;
800eeca4
JW		 10205 expression (e);
10206 if (*input_line_pointer++ != ')')
10207 {
10208 as_bad ("Missing ')'");
10209 goto err;
10210 }
10211 if (e->X_op != O_symbol)
10212 {
10213 if (e->X_op != O_pseudo_fixup)
10214 {
10215 as_bad ("Not a symbolic expression");
10216 goto err;
10217 }
13ae64f3
JJ		 10218 if (i != FUNC_LT_RELATIVE)
10219 {
10220 as_bad ("Illegal combination of relocation functions");
10221 goto err;
10222 }
10223 switch (S_GET_VALUE (e->X_op_symbol))
800eeca4 10224 {
13ae64f3
JJ		 10225 case FUNC_FPTR_RELATIVE:
10226 i = FUNC_LT_FPTR_RELATIVE; break;
10227 case FUNC_DTP_MODULE:
10228 i = FUNC_LT_DTP_MODULE; break;
10229 case FUNC_DTP_RELATIVE:
10230 i = FUNC_LT_DTP_RELATIVE; break;
10231 case FUNC_TP_RELATIVE:
10232 i = FUNC_LT_TP_RELATIVE; break;
10233 default:
800eeca4
JW		 10234 as_bad ("Illegal combination of relocation functions");
10235 goto err;
10236 }
10237 }
542d6675
KH		 10238 /* Make sure gas doesn't get rid of local symbols that are used
10239 in relocs. */
800eeca4
JW		 10240 e->X_op = O_pseudo_fixup;
10241 e->X_op_symbol = pseudo_func[i].u.sym;
10242 break;
10243
10244 case PSEUDO_FUNC_CONST:
10245 e->X_op = O_constant;
10246 e->X_add_number = pseudo_func[i].u.ival;
10247 break;
10248
e0c9811a
JW		 10249 case PSEUDO_FUNC_REG:
10250 e->X_op = O_register;
10251 e->X_add_number = pseudo_func[i].u.ival;
10252 break;
10253
800eeca4 10254 default:
e0c9811a
JW		 10255 name = input_line_pointer - 1;
10256 get_symbol_end ();
10257 as_bad ("Unknown pseudo function `%s'", name);
800eeca4
JW		 10258 goto err;
10259 }
10260 break;
10261
10262 case '[':
10263 ++input_line_pointer;
10264 expression (e);
10265 if (*input_line_pointer != ']')
10266 {
10267 as_bad ("Closing bracket misssing");
10268 goto err;
10269 }
10270 else
10271 {
10272 if (e->X_op != O_register)
10273 as_bad ("Register expected as index");
10274
10275 ++input_line_pointer;
10276 e->X_op = O_index;
10277 }
10278 break;
10279
10280 default:
10281 break;
10282 }
10283 return;
10284
10285 err:
10286 ignore_rest_of_line ();
10287}
10288
10289/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10290 a section symbol plus some offset. For relocs involving @fptr(),
10291 directives we don't want such adjustments since we need to have the
10292 original symbol's name in the reloc. */
10293int
10294ia64_fix_adjustable (fix)
10295 fixS *fix;
10296{
10297 /* Prevent all adjustments to global symbols */
10298 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10299 return 0;
10300
10301 switch (fix->fx_r_type)
10302 {
10303 case BFD_RELOC_IA64_FPTR64I:
10304 case BFD_RELOC_IA64_FPTR32MSB:
10305 case BFD_RELOC_IA64_FPTR32LSB:
10306 case BFD_RELOC_IA64_FPTR64MSB:
10307 case BFD_RELOC_IA64_FPTR64LSB:
10308 case BFD_RELOC_IA64_LTOFF_FPTR22:
10309 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10310 return 0;
10311 default:
10312 break;
10313 }
10314
10315 return 1;
10316}
10317
10318int
10319ia64_force_relocation (fix)
10320 fixS *fix;
10321{
10322 switch (fix->fx_r_type)
10323 {
10324 case BFD_RELOC_IA64_FPTR64I:
10325 case BFD_RELOC_IA64_FPTR32MSB:
10326 case BFD_RELOC_IA64_FPTR32LSB:
10327 case BFD_RELOC_IA64_FPTR64MSB:
10328 case BFD_RELOC_IA64_FPTR64LSB:
10329
10330 case BFD_RELOC_IA64_LTOFF22:
10331 case BFD_RELOC_IA64_LTOFF64I:
10332 case BFD_RELOC_IA64_LTOFF_FPTR22:
10333 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10334 case BFD_RELOC_IA64_PLTOFF22:
10335 case BFD_RELOC_IA64_PLTOFF64I:
10336 case BFD_RELOC_IA64_PLTOFF64MSB:
10337 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 10338
10339 case BFD_RELOC_IA64_LTOFF22X:
10340 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 10341 return 1;
10342
10343 default:
a161fe53 10344 break;
800eeca4 10345 }
a161fe53 10346
ae6063d4 10347 return generic_force_reloc (fix);
800eeca4
JW		 10348}
10349
10350/* Decide from what point a pc-relative relocation is relative to,
10351 relative to the pc-relative fixup. Er, relatively speaking. */
10352long
10353ia64_pcrel_from_section (fix, sec)
10354 fixS *fix;
10355 segT sec;
10356{
10357 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 10358
800eeca4
JW		 10359 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10360 off &= ~0xfUL;
10361
10362 return off;
10363}
10364
6174d9c8
RH		 10365
10366/* Used to emit section-relative relocs for the dwarf2 debug data. */
10367void
10368ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10369{
10370 expressionS expr;
10371
10372 expr.X_op = O_pseudo_fixup;
10373 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10374 expr.X_add_number = 0;
10375 expr.X_add_symbol = symbol;
10376 emit_expr (&expr, size);
10377}
10378
800eeca4
JW		 10379/* This is called whenever some data item (not an instruction) needs a
10380 fixup. We pick the right reloc code depending on the byteorder
10381 currently in effect. */
10382void
10383ia64_cons_fix_new (f, where, nbytes, exp)
10384 fragS *f;
10385 int where;
10386 int nbytes;
10387 expressionS *exp;
10388{
10389 bfd_reloc_code_real_type code;
10390 fixS *fix;
10391
10392 switch (nbytes)
10393 {
10394 /* There are no reloc for 8 and 16 bit quantities, but we allow
10395 them here since they will work fine as long as the expression
10396 is fully defined at the end of the pass over the source file. */
10397 case 1: code = BFD_RELOC_8; break;
10398 case 2: code = BFD_RELOC_16; break;
10399 case 4:
10400 if (target_big_endian)
10401 code = BFD_RELOC_IA64_DIR32MSB;
10402 else
10403 code = BFD_RELOC_IA64_DIR32LSB;
10404 break;
10405
10406 case 8:
40449e9f 10407 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 10408 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 10409 && exp->X_op_symbol
10410 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10411 && !(md.flags & EF_IA_64_ABI64))
10412 {
10413 if (target_big_endian)
10414 code = BFD_RELOC_IA64_IPLTMSB;
10415 else
10416 code = BFD_RELOC_IA64_IPLTLSB;
10417 exp->X_op = O_symbol;
10418 break;
10419 }
10420 else
10421 {
10422 if (target_big_endian)
10423 code = BFD_RELOC_IA64_DIR64MSB;
10424 else
10425 code = BFD_RELOC_IA64_DIR64LSB;
10426 break;
10427 }
800eeca4 10428
3969b680
RH		 10429 case 16:
10430 if (exp->X_op == O_pseudo_fixup
10431 && exp->X_op_symbol
10432 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10433 {
10434 if (target_big_endian)
10435 code = BFD_RELOC_IA64_IPLTMSB;
10436 else
10437 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 10438 exp->X_op = O_symbol;
10439 break;
10440 }
10441 /* FALLTHRU */
10442
800eeca4
JW		 10443 default:
10444 as_bad ("Unsupported fixup size %d", nbytes);
10445 ignore_rest_of_line ();
10446 return;
10447 }
6174d9c8 10448
800eeca4
JW		 10449 if (exp->X_op == O_pseudo_fixup)
10450 {
800eeca4
JW		 10451 exp->X_op = O_symbol;
10452 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 10453 /* ??? If code unchanged, unsupported. */
800eeca4 10454 }
3969b680 10455
800eeca4
JW		 10456 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10457 /* We need to store the byte order in effect in case we're going
10458 to fix an 8 or 16 bit relocation (for which there no real
94f592af 10459 relocs available). See md_apply_fix3(). */
800eeca4
JW		 10460 fix->tc_fix_data.bigendian = target_big_endian;
10461}
10462
10463/* Return the actual relocation we wish to associate with the pseudo
10464 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 10465 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 10466
10467static bfd_reloc_code_real_type
10468ia64_gen_real_reloc_type (sym, r_type)
10469 struct symbol *sym;
10470 bfd_reloc_code_real_type r_type;
10471{
10472 bfd_reloc_code_real_type new = 0;
10473
10474 if (sym == NULL)
10475 {
10476 return r_type;
10477 }
10478
10479 switch (S_GET_VALUE (sym))
10480 {
10481 case FUNC_FPTR_RELATIVE:
10482 switch (r_type)
10483 {
10484 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10485 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10486 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10487 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10488 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10489 default: break;
10490 }
10491 break;
10492
10493 case FUNC_GP_RELATIVE:
10494 switch (r_type)
10495 {
10496 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10497 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10498 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10499 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10500 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10501 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10502 default: break;
10503 }
10504 break;
10505
10506 case FUNC_LT_RELATIVE:
10507 switch (r_type)
10508 {
10509 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10510 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10511 default: break;
10512 }
10513 break;
10514
fa2c7eff
RH		 10515 case FUNC_LT_RELATIVE_X:
10516 switch (r_type)
10517 {
10518 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10519 default: break;
10520 }
10521 break;
10522
c67e42c9
RH		 10523 case FUNC_PC_RELATIVE:
10524 switch (r_type)
10525 {
10526 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10527 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10528 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10529 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10530 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10531 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10532 default: break;
10533 }
10534 break;
10535
800eeca4
JW		 10536 case FUNC_PLT_RELATIVE:
10537 switch (r_type)
10538 {
10539 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10540 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10541 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10542 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10543 default: break;
10544 }
10545 break;
10546
10547 case FUNC_SEC_RELATIVE:
10548 switch (r_type)
10549 {
10550 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10551 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10552 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10553 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10554 default: break;
10555 }
10556 break;
10557
10558 case FUNC_SEG_RELATIVE:
10559 switch (r_type)
10560 {
10561 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10562 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10563 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10564 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10565 default: break;
10566 }
10567 break;
10568
10569 case FUNC_LTV_RELATIVE:
10570 switch (r_type)
10571 {
10572 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10573 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10574 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10575 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10576 default: break;
10577 }
10578 break;
10579
10580 case FUNC_LT_FPTR_RELATIVE:
10581 switch (r_type)
10582 {
10583 case BFD_RELOC_IA64_IMM22:
10584 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10585 case BFD_RELOC_IA64_IMM64:
10586 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10587 default:
10588 break;
10589 }
10590 break;
3969b680 10591
13ae64f3
JJ		 10592 case FUNC_TP_RELATIVE:
10593 switch (r_type)
10594 {
10595 case BFD_RELOC_IA64_IMM14:
10596 new = BFD_RELOC_IA64_TPREL14; break;
10597 case BFD_RELOC_IA64_IMM22:
10598 new = BFD_RELOC_IA64_TPREL22; break;
10599 case BFD_RELOC_IA64_IMM64:
10600 new = BFD_RELOC_IA64_TPREL64I; break;
10601 default:
10602 break;
10603 }
10604 break;
10605
10606 case FUNC_LT_TP_RELATIVE:
10607 switch (r_type)
10608 {
10609 case BFD_RELOC_IA64_IMM22:
10610 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10611 default:
10612 break;
10613 }
10614 break;
10615
10616 case FUNC_LT_DTP_MODULE:
10617 switch (r_type)
10618 {
10619 case BFD_RELOC_IA64_IMM22:
10620 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10621 default:
10622 break;
10623 }
10624 break;
10625
10626 case FUNC_DTP_RELATIVE:
10627 switch (r_type)
10628 {
6174d9c8
RH		 10629 case BFD_RELOC_IA64_DIR64MSB:
10630 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10631 case BFD_RELOC_IA64_DIR64LSB:
10632 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 10633 case BFD_RELOC_IA64_IMM14:
10634 new = BFD_RELOC_IA64_DTPREL14; break;
10635 case BFD_RELOC_IA64_IMM22:
10636 new = BFD_RELOC_IA64_DTPREL22; break;
10637 case BFD_RELOC_IA64_IMM64:
10638 new = BFD_RELOC_IA64_DTPREL64I; break;
10639 default:
10640 break;
10641 }
10642 break;
10643
10644 case FUNC_LT_DTP_RELATIVE:
10645 switch (r_type)
10646 {
10647 case BFD_RELOC_IA64_IMM22:
10648 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10649 default:
10650 break;
10651 }
10652 break;
10653
40449e9f
KH		 10654 case FUNC_IPLT_RELOC:
10655 break;
1cd8ff38 10656
800eeca4
JW		 10657 default:
10658 abort ();
10659 }
6174d9c8 10660
800eeca4
JW		 10661 /* Hmmmm. Should this ever occur? */
10662 if (new)
10663 return new;
10664 else
10665 return r_type;
10666}
10667
10668/* Here is where generate the appropriate reloc for pseudo relocation
10669 functions. */
10670void
10671ia64_validate_fix (fix)
10672 fixS *fix;
10673{
10674 switch (fix->fx_r_type)
10675 {
10676 case BFD_RELOC_IA64_FPTR64I:
10677 case BFD_RELOC_IA64_FPTR32MSB:
10678 case BFD_RELOC_IA64_FPTR64LSB:
10679 case BFD_RELOC_IA64_LTOFF_FPTR22:
10680 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10681 if (fix->fx_offset != 0)
10682 as_bad_where (fix->fx_file, fix->fx_line,
10683 "No addend allowed in @fptr() relocation");
10684 break;
10685 default:
10686 break;
10687 }
800eeca4
JW		 10688}
10689
10690static void
10691fix_insn (fix, odesc, value)
10692 fixS *fix;
10693 const struct ia64_operand *odesc;
10694 valueT value;
10695{
10696 bfd_vma insn[3], t0, t1, control_bits;
10697 const char *err;
10698 char *fixpos;
10699 long slot;
10700
10701 slot = fix->fx_where & 0x3;
10702 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10703
c67e42c9 10704 /* Bundles are always in little-endian byte order */
800eeca4
JW		 10705 t0 = bfd_getl64 (fixpos);
10706 t1 = bfd_getl64 (fixpos + 8);
10707 control_bits = t0 & 0x1f;
10708 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10709 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10710 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10711
c67e42c9
RH		 10712 err = NULL;
10713 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 10714 {
c67e42c9
RH		 10715 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10716 insn[2] |= (((value & 0x7f) << 13)
10717 | (((value >> 7) & 0x1ff) << 27)
10718 | (((value >> 16) & 0x1f) << 22)
10719 | (((value >> 21) & 0x1) << 21)
10720 | (((value >> 63) & 0x1) << 36));
800eeca4 10721 }
c67e42c9
RH		 10722 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10723 {
10724 if (value & ~0x3fffffffffffffffULL)
10725 err = "integer operand out of range";
10726 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10727 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10728 }
10729 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10730 {
10731 value >>= 4;
10732 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10733 insn[2] |= ((((value >> 59) & 0x1) << 36)
10734 | (((value >> 0) & 0xfffff) << 13));
10735 }
10736 else
10737 err = (*odesc->insert) (odesc, value, insn + slot);
10738
10739 if (err)
10740 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 10741
10742 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10743 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 10744 number_to_chars_littleendian (fixpos + 0, t0, 8);
10745 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 10746}
10747
10748/* Attempt to simplify or even eliminate a fixup. The return value is
10749 ignored; perhaps it was once meaningful, but now it is historical.
10750 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10751
10752 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 10753 (if possible). */
94f592af
NC		 10754
10755void
10756md_apply_fix3 (fix, valP, seg)
800eeca4 10757 fixS *fix;
40449e9f 10758 valueT *valP;
2434f565 10759 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 10760{
10761 char *fixpos;
40449e9f 10762 valueT value = *valP;
800eeca4
JW		 10763
10764 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10765
10766 if (fix->fx_pcrel)
10767 {
10768 switch (fix->fx_r_type)
10769 {
10770 case BFD_RELOC_IA64_DIR32MSB:
10771 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
800eeca4
JW		 10772 break;
10773
10774 case BFD_RELOC_IA64_DIR32LSB:
10775 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
800eeca4
JW		 10776 break;
10777
10778 case BFD_RELOC_IA64_DIR64MSB:
10779 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
800eeca4
JW		 10780 break;
10781
10782 case BFD_RELOC_IA64_DIR64LSB:
10783 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
800eeca4
JW		 10784 break;
10785
10786 default:
10787 break;
10788 }
10789 }
10790 if (fix->fx_addsy)
10791 {
00f7efb6 10792 switch (fix->fx_r_type)
800eeca4 10793 {
00f7efb6 10794 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 10795 /* This must be a TAG13 or TAG13b operand. There are no external
10796 relocs defined for them, so we must give an error. */
800eeca4
JW		 10797 as_bad_where (fix->fx_file, fix->fx_line,
10798 "%s must have a constant value",
10799 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 10800 fix->fx_done = 1;
94f592af 10801 return;
00f7efb6
JJ		 10802
10803 case BFD_RELOC_IA64_TPREL14:
10804 case BFD_RELOC_IA64_TPREL22:
10805 case BFD_RELOC_IA64_TPREL64I:
10806 case BFD_RELOC_IA64_LTOFF_TPREL22:
10807 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10808 case BFD_RELOC_IA64_DTPREL14:
10809 case BFD_RELOC_IA64_DTPREL22:
10810 case BFD_RELOC_IA64_DTPREL64I:
10811 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10812 S_SET_THREAD_LOCAL (fix->fx_addsy);
10813 break;
7925dd68
JJ		 10814
10815 default:
10816 break;
800eeca4 10817 }
800eeca4
JW		 10818 }
10819 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10820 {
10821 if (fix->tc_fix_data.bigendian)
10822 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10823 else
10824 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10825 fix->fx_done = 1;
800eeca4
JW		 10826 }
10827 else
10828 {
10829 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10830 fix->fx_done = 1;
800eeca4 10831 }
800eeca4
JW		 10832}
10833
10834/* Generate the BFD reloc to be stuck in the object file from the
10835 fixup used internally in the assembler. */
542d6675
KH		 10836
10837arelent *
800eeca4 10838tc_gen_reloc (sec, fixp)
2434f565 10839 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 10840 fixS *fixp;
10841{
10842 arelent *reloc;
10843
10844 reloc = xmalloc (sizeof (*reloc));
10845 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10846 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10847 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10848 reloc->addend = fixp->fx_offset;
10849 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10850
10851 if (!reloc->howto)
10852 {
10853 as_bad_where (fixp->fx_file, fixp->fx_line,
10854 "Cannot represent %s relocation in object file",
10855 bfd_get_reloc_code_name (fixp->fx_r_type));
10856 }
10857 return reloc;
10858}
10859
10860/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 10861 of type TYPE, and store the appropriate bytes in *LIT. The number
10862 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 10863 returned, or NULL on OK. */
10864
10865#define MAX_LITTLENUMS 5
10866
542d6675 10867char *
800eeca4
JW		 10868md_atof (type, lit, size)
10869 int type;
10870 char *lit;
10871 int *size;
10872{
10873 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 10874 char *t;
10875 int prec;
10876
10877 switch (type)
10878 {
10879 /* IEEE floats */
10880 case 'f':
10881 case 'F':
10882 case 's':
10883 case 'S':
10884 prec = 2;
10885 break;
10886
10887 case 'd':
10888 case 'D':
10889 case 'r':
10890 case 'R':
10891 prec = 4;
10892 break;
10893
10894 case 'x':
10895 case 'X':
10896 case 'p':
10897 case 'P':
10898 prec = 5;
10899 break;
10900
10901 default:
10902 *size = 0;
10903 return "Bad call to MD_ATOF()";
10904 }
10905 t = atof_ieee (input_line_pointer, type, words);
10906 if (t)
10907 input_line_pointer = t;
800eeca4 10908
10a98291
L		 10909 (*ia64_float_to_chars) (lit, words, prec);
10910
165a7f90
L		 10911 if (type == 'X')
10912 {
10913 /* It is 10 byte floating point with 6 byte padding. */
10a98291 10914 memset (&lit [10], 0, 6);
165a7f90
L		 10915 *size = 8 * sizeof (LITTLENUM_TYPE);
10916 }
10a98291
L		 10917 else
10918 *size = prec * sizeof (LITTLENUM_TYPE);
10919
800eeca4
JW		 10920 return 0;
10921}
10922
800eeca4
JW		 10923/* Handle ia64 specific semantics of the align directive. */
10924
0a9ef439 10925void
800eeca4 10926ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 10927 int n ATTRIBUTE_UNUSED;
10928 const char *fill ATTRIBUTE_UNUSED;
2434f565 10929 int len ATTRIBUTE_UNUSED;
91a2ae2a 10930 int max ATTRIBUTE_UNUSED;
800eeca4 10931{
0a9ef439 10932 if (subseg_text_p (now_seg))
800eeca4 10933 ia64_flush_insns ();
0a9ef439 10934}
800eeca4 10935
0a9ef439
RH		 10936/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10937 of an rs_align_code fragment. */
800eeca4 10938
0a9ef439
RH		 10939void
10940ia64_handle_align (fragp)
10941 fragS *fragp;
10942{
10943 /* Use mfi bundle of nops with no stop bits. */
0a9ef439
RH		 10944 static const unsigned char le_nop[]
10945 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10946 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
9545c4ce
L		 10947 static const unsigned char le_nop_stop[]
10948 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10949 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
0a9ef439
RH		 10950
10951 int bytes;
10952 char *p;
9545c4ce 10953 const unsigned char *nop;
0a9ef439
RH		 10954
10955 if (fragp->fr_type != rs_align_code)
10956 return;
10957
9545c4ce
L		 10958 /* Check if this frag has to end with a stop bit. */
10959 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
10960
0a9ef439
RH		 10961 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10962 p = fragp->fr_literal + fragp->fr_fix;
10963
d9201763
L		 10964 /* If no paddings are needed, we check if we need a stop bit. */
10965 if (!bytes && fragp->tc_frag_data)
10966 {
10967 if (fragp->fr_fix < 16)
bae25f19
L		 10968#if 1
10969 /* FIXME: It won't work with
10970 .align 16
10971 alloc r32=ar.pfs,1,2,4,0
10972 */
10973 ;
10974#else
d9201763
L		 10975 as_bad_where (fragp->fr_file, fragp->fr_line,
10976 _("Can't add stop bit to mark end of instruction group"));
bae25f19 10977#endif
d9201763
L		 10978 else
10979 /* Bundles are always in little-endian byte order. Make sure
10980 the previous bundle has the stop bit. */
10981 *(p - 16) |= 1;
10982 }
10983
0a9ef439
RH		 10984 /* Make sure we are on a 16-byte boundary, in case someone has been
10985 putting data into a text section. */
10986 if (bytes & 15)
10987 {
10988 int fix = bytes & 15;
10989 memset (p, 0, fix);
10990 p += fix;
10991 bytes -= fix;
10992 fragp->fr_fix += fix;
800eeca4
JW		 10993 }
10994
012a452b 10995 /* Instruction bundles are always little-endian. */
9545c4ce 10996 memcpy (p, nop, 16);
0a9ef439 10997 fragp->fr_var = 16;
800eeca4 10998}
10a98291
L		 10999
11000static void
11001ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11002 int prec)
11003{
11004 while (prec--)
11005 {
11006 number_to_chars_bigendian (lit, (long) (*words++),
11007 sizeof (LITTLENUM_TYPE));
11008 lit += sizeof (LITTLENUM_TYPE);
11009 }
11010}
11011
11012static void
11013ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11014 int prec)
11015{
11016 while (prec--)
11017 {
11018 number_to_chars_littleendian (lit, (long) (words[prec]),
11019 sizeof (LITTLENUM_TYPE));
11020 lit += sizeof (LITTLENUM_TYPE);
11021 }
11022}
11023
11024void
11025ia64_elf_section_change_hook (void)
11026{
38ce5b11
L		 11027 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11028 && elf_linked_to_section (now_seg) == NULL)
11029 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11030 dot_byteorder (-1);
11031}
a645d1eb
L		 11032
11033/* Check if a label should be made global. */
11034void
11035ia64_check_label (symbolS *label)
11036{
11037 if (*input_line_pointer == ':')
11038 {
11039 S_SET_EXTERNAL (label);
11040 input_line_pointer++;
11041 }
11042}
35f5df7f
L		 11043
11044/* Used to remember where .alias and .secalias directives are seen. We
11045 will rename symbol and section names when we are about to output
11046 the relocatable file. */
11047struct alias
11048{
11049 char *file; /* The file where the directive is seen. */
11050 unsigned int line; /* The line number the directive is at. */
11051 const char *name; /* The orignale name of the symbol. */
11052};
11053
11054/* Called for .alias and .secalias directives. If SECTION is 1, it is
11055 .secalias. Otherwise, it is .alias. */
11056static void
11057dot_alias (int section)
11058{
11059 char *name, *alias;
11060 char delim;
11061 char *end_name;
11062 int len;
11063 const char *error_string;
11064 struct alias *h;
11065 const char *a;
11066 struct hash_control *ahash, *nhash;
11067 const char *kind;
11068
11069 name = input_line_pointer;
11070 delim = get_symbol_end ();
11071 end_name = input_line_pointer;
11072 *end_name = delim;
11073
11074 if (name == end_name)
11075 {
11076 as_bad (_("expected symbol name"));
11077 discard_rest_of_line ();
11078 return;
11079 }
11080
11081 SKIP_WHITESPACE ();
11082
11083 if (*input_line_pointer != ',')
11084 {
11085 *end_name = 0;
11086 as_bad (_("expected comma after \"%s\""), name);
11087 *end_name = delim;
11088 ignore_rest_of_line ();
11089 return;
11090 }
11091
11092 input_line_pointer++;
11093 *end_name = 0;
11094
11095 /* We call demand_copy_C_string to check if alias string is valid.
11096 There should be a closing `"' and no `\0' in the string. */
11097 alias = demand_copy_C_string (&len);
11098 if (alias == NULL)
11099 {
11100 ignore_rest_of_line ();
11101 return;
11102 }
11103
11104 /* Make a copy of name string. */
11105 len = strlen (name) + 1;
11106 obstack_grow (&notes, name, len);
11107 name = obstack_finish (&notes);
11108
11109 if (section)
11110 {
11111 kind = "section";
11112 ahash = secalias_hash;
11113 nhash = secalias_name_hash;
11114 }
11115 else
11116 {
11117 kind = "symbol";
11118 ahash = alias_hash;
11119 nhash = alias_name_hash;
11120 }
11121
11122 /* Check if alias has been used before. */
11123 h = (struct alias *) hash_find (ahash, alias);
11124 if (h)
11125 {
11126 if (strcmp (h->name, name))
11127 as_bad (_("`%s' is already the alias of %s `%s'"),
11128 alias, kind, h->name);
11129 goto out;
11130 }
11131
11132 /* Check if name already has an alias. */
11133 a = (const char *) hash_find (nhash, name);
11134 if (a)
11135 {
11136 if (strcmp (a, alias))
11137 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11138 goto out;
11139 }
11140
11141 h = (struct alias *) xmalloc (sizeof (struct alias));
11142 as_where (&h->file, &h->line);
11143 h->name = name;
11144
11145 error_string = hash_jam (ahash, alias, (PTR) h);
11146 if (error_string)
11147 {
11148 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11149 alias, kind, error_string);
11150 goto out;
11151 }
11152
11153 error_string = hash_jam (nhash, name, (PTR) alias);
11154 if (error_string)
11155 {
11156 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11157 alias, kind, error_string);
11158out:
11159 obstack_free (&notes, name);
11160 obstack_free (&notes, alias);
11161 }
11162
11163 demand_empty_rest_of_line ();
11164}
11165
11166/* It renames the original symbol name to its alias. */
11167static void
11168do_alias (const char *alias, PTR value)
11169{
11170 struct alias *h = (struct alias *) value;
11171 symbolS *sym = symbol_find (h->name);
11172
11173 if (sym == NULL)
11174 as_warn_where (h->file, h->line,
11175 _("symbol `%s' aliased to `%s' is not used"),
11176 h->name, alias);
11177 else
11178 S_SET_NAME (sym, (char *) alias);
11179}
11180
11181/* Called from write_object_file. */
11182void
11183ia64_adjust_symtab (void)
11184{
11185 hash_traverse (alias_hash, do_alias);
11186}
11187
11188/* It renames the original section name to its alias. */
11189static void
11190do_secalias (const char *alias, PTR value)
11191{
11192 struct alias *h = (struct alias *) value;
11193 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11194
11195 if (sec == NULL)
11196 as_warn_where (h->file, h->line,
11197 _("section `%s' aliased to `%s' is not used"),
11198 h->name, alias);
11199 else
11200 sec->name = alias;
11201}
11202
11203/* Called from write_object_file. */
11204void
11205ia64_frob_file (void)
11206{
11207 hash_traverse (secalias_hash, do_secalias);
11208}
GDB Binutils - Deliverables
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