Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
01e1a5bc NC |
2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
3 | 2008, 2009 Free Software Foundation, Inc. | |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
800eeca4 JW |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
01e1a5bc NC |
53 | #include "bfdver.h" |
54 | #include <time.h> | |
800eeca4 | 55 | |
a66d2bb7 JB |
56 | #ifdef HAVE_LIMITS_H |
57 | #include <limits.h> | |
58 | #endif | |
59 | ||
800eeca4 | 60 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
61 | |
62 | /* Some systems define MIN in, e.g., param.h. */ | |
63 | #undef MIN | |
800eeca4 JW |
64 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
65 | ||
66 | #define NUM_SLOTS 4 | |
67 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
68 | #define CURR_SLOT md.slot[md.curr_slot] | |
69 | ||
70 | #define O_pseudo_fixup (O_max + 1) | |
71 | ||
72 | enum special_section | |
73 | { | |
557debba | 74 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
75 | SPECIAL_SECTION_BSS = 0, |
76 | SPECIAL_SECTION_SBSS, | |
77 | SPECIAL_SECTION_SDATA, | |
78 | SPECIAL_SECTION_RODATA, | |
79 | SPECIAL_SECTION_COMMENT, | |
80 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
81 | SPECIAL_SECTION_UNWIND_INFO, |
82 | /* HPUX specific section pseudo-ops. */ | |
83 | SPECIAL_SECTION_INIT_ARRAY, | |
84 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
85 | }; |
86 | ||
87 | enum reloc_func | |
88 | { | |
13ae64f3 JJ |
89 | FUNC_DTP_MODULE, |
90 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
91 | FUNC_FPTR_RELATIVE, |
92 | FUNC_GP_RELATIVE, | |
93 | FUNC_LT_RELATIVE, | |
fa2c7eff | 94 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 95 | FUNC_PC_RELATIVE, |
800eeca4 JW |
96 | FUNC_PLT_RELATIVE, |
97 | FUNC_SEC_RELATIVE, | |
98 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 99 | FUNC_TP_RELATIVE, |
800eeca4 JW |
100 | FUNC_LTV_RELATIVE, |
101 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
102 | FUNC_LT_DTP_MODULE, |
103 | FUNC_LT_DTP_RELATIVE, | |
104 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 105 | FUNC_IPLT_RELOC, |
800eeca4 JW |
106 | }; |
107 | ||
108 | enum reg_symbol | |
109 | { | |
110 | REG_GR = 0, | |
111 | REG_FR = (REG_GR + 128), | |
112 | REG_AR = (REG_FR + 128), | |
113 | REG_CR = (REG_AR + 128), | |
114 | REG_P = (REG_CR + 128), | |
115 | REG_BR = (REG_P + 64), | |
116 | REG_IP = (REG_BR + 8), | |
117 | REG_CFM, | |
118 | REG_PR, | |
119 | REG_PR_ROT, | |
120 | REG_PSR, | |
121 | REG_PSR_L, | |
122 | REG_PSR_UM, | |
123 | /* The following are pseudo-registers for use by gas only. */ | |
124 | IND_CPUID, | |
125 | IND_DBR, | |
126 | IND_DTR, | |
127 | IND_ITR, | |
128 | IND_IBR, | |
800eeca4 JW |
129 | IND_MSR, |
130 | IND_PKR, | |
131 | IND_PMC, | |
132 | IND_PMD, | |
133 | IND_RR, | |
542d6675 | 134 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
135 | REG_PSP, |
136 | REG_PRIUNAT, | |
800eeca4 JW |
137 | REG_NUM |
138 | }; | |
139 | ||
140 | enum dynreg_type | |
141 | { | |
142 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
143 | DYNREG_FR, /* dynamic floating point register */ | |
144 | DYNREG_PR, /* dynamic predicate register */ | |
145 | DYNREG_NUM_TYPES | |
146 | }; | |
147 | ||
87f8eb97 JW |
148 | enum operand_match_result |
149 | { | |
150 | OPERAND_MATCH, | |
151 | OPERAND_OUT_OF_RANGE, | |
152 | OPERAND_MISMATCH | |
153 | }; | |
154 | ||
800eeca4 JW |
155 | /* On the ia64, we can't know the address of a text label until the |
156 | instructions are packed into a bundle. To handle this, we keep | |
157 | track of the list of labels that appear in front of each | |
158 | instruction. */ | |
159 | struct label_fix | |
542d6675 KH |
160 | { |
161 | struct label_fix *next; | |
162 | struct symbol *sym; | |
07a53e5c | 163 | bfd_boolean dw2_mark_labels; |
542d6675 | 164 | }; |
800eeca4 | 165 | |
549f748d | 166 | /* This is the endianness of the current section. */ |
800eeca4 JW |
167 | extern int target_big_endian; |
168 | ||
549f748d JW |
169 | /* This is the default endianness. */ |
170 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
171 | ||
5a49b8ac | 172 | void (*ia64_number_to_chars) (char *, valueT, int); |
10a98291 | 173 | |
5a49b8ac AM |
174 | static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE *, int); |
175 | static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE *, int); | |
176 | ||
177 | static void (*ia64_float_to_chars) (char *, LITTLENUM_TYPE *, int); | |
10a98291 | 178 | |
35f5df7f L |
179 | static struct hash_control *alias_hash; |
180 | static struct hash_control *alias_name_hash; | |
181 | static struct hash_control *secalias_hash; | |
182 | static struct hash_control *secalias_name_hash; | |
183 | ||
2fac3d48 JB |
184 | /* List of chars besides those in app.c:symbol_chars that can start an |
185 | operand. Used to prevent the scrubber eating vital white-space. */ | |
186 | const char ia64_symbol_chars[] = "@?"; | |
187 | ||
800eeca4 JW |
188 | /* Characters which always start a comment. */ |
189 | const char comment_chars[] = ""; | |
190 | ||
191 | /* Characters which start a comment at the beginning of a line. */ | |
192 | const char line_comment_chars[] = "#"; | |
193 | ||
194 | /* Characters which may be used to separate multiple commands on a | |
195 | single line. */ | |
e4e8248d | 196 | const char line_separator_chars[] = ";{}"; |
800eeca4 JW |
197 | |
198 | /* Characters which are used to indicate an exponent in a floating | |
199 | point number. */ | |
200 | const char EXP_CHARS[] = "eE"; | |
201 | ||
202 | /* Characters which mean that a number is a floating point constant, | |
203 | as in 0d1.0. */ | |
204 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
205 | ||
542d6675 | 206 | /* ia64-specific option processing: */ |
800eeca4 | 207 | |
44f5c83a | 208 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
209 | |
210 | struct option md_longopts[] = | |
211 | { | |
c43c2cc5 JW |
212 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
213 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
214 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
215 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
216 | }; |
217 | ||
218 | size_t md_longopts_size = sizeof (md_longopts); | |
219 | ||
220 | static struct | |
221 | { | |
222 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
223 | struct hash_control *reg_hash; /* register name hash table */ | |
224 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
225 | struct hash_control *const_hash; /* constant hash table */ | |
226 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
227 | ||
800eeca4 JW |
228 | /* If X_op is != O_absent, the registername for the instruction's |
229 | qualifying predicate. If NULL, p0 is assumed for instructions | |
ad4b42b4 | 230 | that are predictable. */ |
800eeca4 JW |
231 | expressionS qp; |
232 | ||
8c2fda1d L |
233 | /* Optimize for which CPU. */ |
234 | enum | |
235 | { | |
236 | itanium1, | |
237 | itanium2 | |
238 | } tune; | |
239 | ||
91d777ee L |
240 | /* What to do when hint.b is used. */ |
241 | enum | |
242 | { | |
243 | hint_b_error, | |
244 | hint_b_warning, | |
245 | hint_b_ok | |
246 | } hint_b; | |
247 | ||
800eeca4 | 248 | unsigned int |
197865e8 | 249 | manual_bundling : 1, |
800eeca4 JW |
250 | debug_dv: 1, |
251 | detect_dv: 1, | |
252 | explicit_mode : 1, /* which mode we're in */ | |
253 | default_explicit_mode : 1, /* which mode is the default */ | |
254 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
255 | auto_align : 1, |
256 | keep_pending_output : 1; | |
800eeca4 | 257 | |
970d6792 L |
258 | /* What to do when something is wrong with unwind directives. */ |
259 | enum | |
260 | { | |
261 | unwind_check_warning, | |
262 | unwind_check_error | |
263 | } unwind_check; | |
264 | ||
800eeca4 JW |
265 | /* Each bundle consists of up to three instructions. We keep |
266 | track of four most recent instructions so we can correctly set | |
197865e8 | 267 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
268 | int curr_slot; |
269 | int num_slots_in_use; | |
270 | struct slot | |
271 | { | |
272 | unsigned int | |
273 | end_of_insn_group : 1, | |
274 | manual_bundling_on : 1, | |
196e8040 JW |
275 | manual_bundling_off : 1, |
276 | loc_directive_seen : 1; | |
800eeca4 JW |
277 | signed char user_template; /* user-selected template, if any */ |
278 | unsigned char qp_regno; /* qualifying predicate */ | |
279 | /* This duplicates a good fraction of "struct fix" but we | |
280 | can't use a "struct fix" instead since we can't call | |
281 | fix_new_exp() until we know the address of the instruction. */ | |
282 | int num_fixups; | |
283 | struct insn_fix | |
284 | { | |
285 | bfd_reloc_code_real_type code; | |
286 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
287 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
288 | expressionS expr; /* the value to be inserted */ | |
289 | } | |
290 | fixup[2]; /* at most two fixups per insn */ | |
291 | struct ia64_opcode *idesc; | |
292 | struct label_fix *label_fixups; | |
f1bcba5b | 293 | struct label_fix *tag_fixups; |
800eeca4 JW |
294 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
295 | expressionS opnd[6]; | |
296 | char *src_file; | |
297 | unsigned int src_line; | |
298 | struct dwarf2_line_info debug_line; | |
299 | } | |
300 | slot[NUM_SLOTS]; | |
301 | ||
302 | segT last_text_seg; | |
303 | ||
304 | struct dynreg | |
305 | { | |
306 | struct dynreg *next; /* next dynamic register */ | |
307 | const char *name; | |
308 | unsigned short base; /* the base register number */ | |
309 | unsigned short num_regs; /* # of registers in this set */ | |
310 | } | |
311 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
312 | ||
313 | flagword flags; /* ELF-header flags */ | |
314 | ||
315 | struct mem_offset { | |
316 | unsigned hint:1; /* is this hint currently valid? */ | |
317 | bfd_vma offset; /* mem.offset offset */ | |
318 | bfd_vma base; /* mem.offset base */ | |
319 | } mem_offset; | |
320 | ||
321 | int path; /* number of alt. entry points seen */ | |
322 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 323 | the current DV-checking block. */ |
800eeca4 | 324 | int maxpaths; /* size currently allocated for |
542d6675 | 325 | entry_labels */ |
557debba JW |
326 | |
327 | int pointer_size; /* size in bytes of a pointer */ | |
328 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
8b84be9d JB |
329 | |
330 | symbolS *indregsym[IND_RR - IND_CPUID + 1]; | |
800eeca4 JW |
331 | } |
332 | md; | |
333 | ||
f6fe78d6 JW |
334 | /* These are not const, because they are modified to MMI for non-itanium1 |
335 | targets below. */ | |
336 | /* MFI bundle of nops. */ | |
337 | static unsigned char le_nop[16] = | |
338 | { | |
339 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
340 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
341 | }; | |
342 | /* MFI bundle of nops with stop-bit. */ | |
343 | static unsigned char le_nop_stop[16] = | |
344 | { | |
345 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
346 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
347 | }; | |
348 | ||
542d6675 | 349 | /* application registers: */ |
800eeca4 | 350 | |
e0c9811a JW |
351 | #define AR_K0 0 |
352 | #define AR_K7 7 | |
353 | #define AR_RSC 16 | |
354 | #define AR_BSP 17 | |
355 | #define AR_BSPSTORE 18 | |
356 | #define AR_RNAT 19 | |
d8ca90b5 JB |
357 | #define AR_FCR 21 |
358 | #define AR_EFLAG 24 | |
359 | #define AR_CSD 25 | |
360 | #define AR_SSD 26 | |
361 | #define AR_CFLG 27 | |
362 | #define AR_FSR 28 | |
363 | #define AR_FIR 29 | |
364 | #define AR_FDR 30 | |
365 | #define AR_CCV 32 | |
e0c9811a JW |
366 | #define AR_UNAT 36 |
367 | #define AR_FPSR 40 | |
368 | #define AR_ITC 44 | |
4f8631b1 | 369 | #define AR_RUC 45 |
e0c9811a JW |
370 | #define AR_PFS 64 |
371 | #define AR_LC 65 | |
d8ca90b5 | 372 | #define AR_EC 66 |
800eeca4 JW |
373 | |
374 | static const struct | |
375 | { | |
376 | const char *name; | |
8b84be9d | 377 | unsigned int regnum; |
800eeca4 JW |
378 | } |
379 | ar[] = | |
380 | { | |
d8ca90b5 JB |
381 | {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1}, |
382 | {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3}, | |
383 | {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5}, | |
384 | {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7}, | |
385 | {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP}, | |
386 | {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT}, | |
387 | {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG}, | |
388 | {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD}, | |
389 | {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR}, | |
390 | {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR}, | |
391 | {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT}, | |
392 | {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC}, | |
4f8631b1 L |
393 | {"ar.ruc", AR_RUC}, {"ar.pfs", AR_PFS}, |
394 | {"ar.lc", AR_LC}, {"ar.ec", AR_EC}, | |
800eeca4 JW |
395 | }; |
396 | ||
d8ca90b5 JB |
397 | /* control registers: */ |
398 | ||
399 | #define CR_DCR 0 | |
400 | #define CR_ITM 1 | |
401 | #define CR_IVA 2 | |
402 | #define CR_PTA 8 | |
403 | #define CR_GPTA 9 | |
800eeca4 JW |
404 | #define CR_IPSR 16 |
405 | #define CR_ISR 17 | |
406 | #define CR_IIP 19 | |
407 | #define CR_IFA 20 | |
408 | #define CR_ITIR 21 | |
409 | #define CR_IIPA 22 | |
410 | #define CR_IFS 23 | |
411 | #define CR_IIM 24 | |
412 | #define CR_IHA 25 | |
1ca35711 L |
413 | #define CR_IIB0 26 |
414 | #define CR_IIB1 27 | |
d8ca90b5 | 415 | #define CR_LID 64 |
800eeca4 JW |
416 | #define CR_IVR 65 |
417 | #define CR_TPR 66 | |
418 | #define CR_EOI 67 | |
419 | #define CR_IRR0 68 | |
420 | #define CR_IRR3 71 | |
d8ca90b5 JB |
421 | #define CR_ITV 72 |
422 | #define CR_PMV 73 | |
423 | #define CR_CMCV 74 | |
800eeca4 JW |
424 | #define CR_LRR0 80 |
425 | #define CR_LRR1 81 | |
426 | ||
800eeca4 JW |
427 | static const struct |
428 | { | |
429 | const char *name; | |
8b84be9d | 430 | unsigned int regnum; |
800eeca4 JW |
431 | } |
432 | cr[] = | |
433 | { | |
d8ca90b5 JB |
434 | {"cr.dcr", CR_DCR}, |
435 | {"cr.itm", CR_ITM}, | |
436 | {"cr.iva", CR_IVA}, | |
437 | {"cr.pta", CR_PTA}, | |
438 | {"cr.gpta", CR_GPTA}, | |
439 | {"cr.ipsr", CR_IPSR}, | |
440 | {"cr.isr", CR_ISR}, | |
441 | {"cr.iip", CR_IIP}, | |
442 | {"cr.ifa", CR_IFA}, | |
443 | {"cr.itir", CR_ITIR}, | |
444 | {"cr.iipa", CR_IIPA}, | |
445 | {"cr.ifs", CR_IFS}, | |
446 | {"cr.iim", CR_IIM}, | |
447 | {"cr.iha", CR_IHA}, | |
1ca35711 L |
448 | {"cr.iib0", CR_IIB0}, |
449 | {"cr.iib1", CR_IIB1}, | |
d8ca90b5 JB |
450 | {"cr.lid", CR_LID}, |
451 | {"cr.ivr", CR_IVR}, | |
452 | {"cr.tpr", CR_TPR}, | |
453 | {"cr.eoi", CR_EOI}, | |
454 | {"cr.irr0", CR_IRR0}, | |
455 | {"cr.irr1", CR_IRR0 + 1}, | |
456 | {"cr.irr2", CR_IRR0 + 2}, | |
457 | {"cr.irr3", CR_IRR3}, | |
458 | {"cr.itv", CR_ITV}, | |
459 | {"cr.pmv", CR_PMV}, | |
460 | {"cr.cmcv", CR_CMCV}, | |
461 | {"cr.lrr0", CR_LRR0}, | |
462 | {"cr.lrr1", CR_LRR1} | |
800eeca4 JW |
463 | }; |
464 | ||
465 | #define PSR_MFL 4 | |
466 | #define PSR_IC 13 | |
467 | #define PSR_DFL 18 | |
468 | #define PSR_CPL 32 | |
469 | ||
470 | static const struct const_desc | |
471 | { | |
472 | const char *name; | |
473 | valueT value; | |
474 | } | |
475 | const_bits[] = | |
476 | { | |
542d6675 | 477 | /* PSR constant masks: */ |
800eeca4 JW |
478 | |
479 | /* 0: reserved */ | |
480 | {"psr.be", ((valueT) 1) << 1}, | |
481 | {"psr.up", ((valueT) 1) << 2}, | |
482 | {"psr.ac", ((valueT) 1) << 3}, | |
483 | {"psr.mfl", ((valueT) 1) << 4}, | |
484 | {"psr.mfh", ((valueT) 1) << 5}, | |
485 | /* 6-12: reserved */ | |
486 | {"psr.ic", ((valueT) 1) << 13}, | |
487 | {"psr.i", ((valueT) 1) << 14}, | |
488 | {"psr.pk", ((valueT) 1) << 15}, | |
489 | /* 16: reserved */ | |
490 | {"psr.dt", ((valueT) 1) << 17}, | |
491 | {"psr.dfl", ((valueT) 1) << 18}, | |
492 | {"psr.dfh", ((valueT) 1) << 19}, | |
493 | {"psr.sp", ((valueT) 1) << 20}, | |
494 | {"psr.pp", ((valueT) 1) << 21}, | |
495 | {"psr.di", ((valueT) 1) << 22}, | |
496 | {"psr.si", ((valueT) 1) << 23}, | |
497 | {"psr.db", ((valueT) 1) << 24}, | |
498 | {"psr.lp", ((valueT) 1) << 25}, | |
499 | {"psr.tb", ((valueT) 1) << 26}, | |
500 | {"psr.rt", ((valueT) 1) << 27}, | |
501 | /* 28-31: reserved */ | |
502 | /* 32-33: cpl (current privilege level) */ | |
503 | {"psr.is", ((valueT) 1) << 34}, | |
504 | {"psr.mc", ((valueT) 1) << 35}, | |
505 | {"psr.it", ((valueT) 1) << 36}, | |
506 | {"psr.id", ((valueT) 1) << 37}, | |
507 | {"psr.da", ((valueT) 1) << 38}, | |
508 | {"psr.dd", ((valueT) 1) << 39}, | |
509 | {"psr.ss", ((valueT) 1) << 40}, | |
510 | /* 41-42: ri (restart instruction) */ | |
511 | {"psr.ed", ((valueT) 1) << 43}, | |
512 | {"psr.bn", ((valueT) 1) << 44}, | |
513 | }; | |
514 | ||
542d6675 | 515 | /* indirect register-sets/memory: */ |
800eeca4 JW |
516 | |
517 | static const struct | |
518 | { | |
519 | const char *name; | |
8b84be9d | 520 | unsigned int regnum; |
800eeca4 JW |
521 | } |
522 | indirect_reg[] = | |
523 | { | |
524 | { "CPUID", IND_CPUID }, | |
525 | { "cpuid", IND_CPUID }, | |
526 | { "dbr", IND_DBR }, | |
527 | { "dtr", IND_DTR }, | |
528 | { "itr", IND_ITR }, | |
529 | { "ibr", IND_IBR }, | |
530 | { "msr", IND_MSR }, | |
531 | { "pkr", IND_PKR }, | |
532 | { "pmc", IND_PMC }, | |
533 | { "pmd", IND_PMD }, | |
534 | { "rr", IND_RR }, | |
535 | }; | |
536 | ||
537 | /* Pseudo functions used to indicate relocation types (these functions | |
538 | start with an at sign (@). */ | |
539 | static struct | |
540 | { | |
541 | const char *name; | |
542 | enum pseudo_type | |
543 | { | |
544 | PSEUDO_FUNC_NONE, | |
545 | PSEUDO_FUNC_RELOC, | |
546 | PSEUDO_FUNC_CONST, | |
e0c9811a | 547 | PSEUDO_FUNC_REG, |
800eeca4 JW |
548 | PSEUDO_FUNC_FLOAT |
549 | } | |
550 | type; | |
551 | union | |
552 | { | |
553 | unsigned long ival; | |
554 | symbolS *sym; | |
555 | } | |
556 | u; | |
557 | } | |
558 | pseudo_func[] = | |
559 | { | |
542d6675 | 560 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
561 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
562 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
563 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
564 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
565 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 566 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
567 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
568 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
569 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
570 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 571 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 572 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
573 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
574 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
575 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
576 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 577 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 578 | |
542d6675 | 579 | /* mbtype4 constants: */ |
800eeca4 JW |
580 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
581 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
582 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
583 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
584 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
585 | ||
542d6675 | 586 | /* fclass constants: */ |
bf3ca999 | 587 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
588 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
589 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
590 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
591 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
592 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
593 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
594 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
595 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
596 | |
597 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 598 | |
c10d9d8f JW |
599 | /* hint constants: */ |
600 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
601 | ||
542d6675 | 602 | /* unwind-related constants: */ |
041340ad JW |
603 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
604 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
605 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
606 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
607 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
608 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
609 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 610 | |
542d6675 | 611 | /* unwind-related registers: */ |
e0c9811a | 612 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
613 | }; |
614 | ||
542d6675 | 615 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
616 | static const bfd_vma nop[IA64_NUM_UNITS] = |
617 | { | |
618 | 0x0000000000LL, /* NIL => break 0 */ | |
619 | 0x0008000000LL, /* I-unit nop */ | |
620 | 0x0008000000LL, /* M-unit nop */ | |
621 | 0x4000000000LL, /* B-unit nop */ | |
622 | 0x0008000000LL, /* F-unit nop */ | |
5d5e6db9 | 623 | 0x0000000000LL, /* L-"unit" nop immediate */ |
800eeca4 JW |
624 | 0x0008000000LL, /* X-unit nop */ |
625 | }; | |
626 | ||
627 | /* Can't be `const' as it's passed to input routines (which have the | |
628 | habit of setting temporary sentinels. */ | |
629 | static char special_section_name[][20] = | |
630 | { | |
631 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
632 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
633 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
634 | }; |
635 | ||
636 | /* The best template for a particular sequence of up to three | |
637 | instructions: */ | |
638 | #define N IA64_NUM_TYPES | |
639 | static unsigned char best_template[N][N][N]; | |
640 | #undef N | |
641 | ||
642 | /* Resource dependencies currently in effect */ | |
643 | static struct rsrc { | |
644 | int depind; /* dependency index */ | |
645 | const struct ia64_dependency *dependency; /* actual dependency */ | |
646 | unsigned specific:1, /* is this a specific bit/regno? */ | |
647 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
648 | int index; /* specific regno/bit within dependency */ | |
649 | int note; /* optional qualifying note (0 if none) */ | |
650 | #define STATE_NONE 0 | |
651 | #define STATE_STOP 1 | |
652 | #define STATE_SRLZ 2 | |
653 | int insn_srlz; /* current insn serialization state */ | |
654 | int data_srlz; /* current data serialization state */ | |
655 | int qp_regno; /* qualifying predicate for this usage */ | |
656 | char *file; /* what file marked this dependency */ | |
2434f565 | 657 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 658 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 659 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
660 | int path; /* corresponding code entry index */ |
661 | } *regdeps = NULL; | |
662 | static int regdepslen = 0; | |
663 | static int regdepstotlen = 0; | |
664 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
665 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 666 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 667 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
668 | |
669 | /* Current state of PR mutexation */ | |
670 | static struct qpmutex { | |
671 | valueT prmask; | |
672 | int path; | |
673 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
674 | static int qp_mutexeslen = 0; | |
675 | static int qp_mutexestotlen = 0; | |
197865e8 | 676 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
677 | |
678 | /* Current state of PR implications */ | |
679 | static struct qp_imply { | |
680 | unsigned p1:6; | |
681 | unsigned p2:6; | |
682 | unsigned p2_branched:1; | |
683 | int path; | |
684 | } *qp_implies = NULL; | |
685 | static int qp_implieslen = 0; | |
686 | static int qp_impliestotlen = 0; | |
687 | ||
197865e8 KH |
688 | /* Keep track of static GR values so that indirect register usage can |
689 | sometimes be tracked. */ | |
800eeca4 JW |
690 | static struct gr { |
691 | unsigned known:1; | |
692 | int path; | |
693 | valueT value; | |
a66d2bb7 JB |
694 | } gr_values[128] = { |
695 | { | |
696 | 1, | |
697 | #ifdef INT_MAX | |
698 | INT_MAX, | |
699 | #else | |
700 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
701 | #endif | |
702 | 0 | |
703 | } | |
704 | }; | |
800eeca4 | 705 | |
9545c4ce L |
706 | /* Remember the alignment frag. */ |
707 | static fragS *align_frag; | |
708 | ||
800eeca4 JW |
709 | /* These are the routines required to output the various types of |
710 | unwind records. */ | |
711 | ||
f5a30c2e JW |
712 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
713 | frag address here so that if there is a section switch in the middle of | |
714 | a function, then instructions emitted to a different section are not | |
715 | counted. Since there may be more than one frag for a function, this | |
716 | means we also need to keep track of which frag this address belongs to | |
717 | so we can compute inter-frag distances. This also nicely solves the | |
718 | problem with nops emitted for align directives, which can't easily be | |
719 | counted, but can easily be derived from frag sizes. */ | |
720 | ||
800eeca4 JW |
721 | typedef struct unw_rec_list { |
722 | unwind_record r; | |
e0c9811a | 723 | unsigned long slot_number; |
f5a30c2e | 724 | fragS *slot_frag; |
800eeca4 JW |
725 | struct unw_rec_list *next; |
726 | } unw_rec_list; | |
727 | ||
2434f565 | 728 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 729 | |
6290819d NC |
730 | /* Linked list of saved prologue counts. A very poor |
731 | implementation of a map from label numbers to prologue counts. */ | |
732 | typedef struct label_prologue_count | |
733 | { | |
734 | struct label_prologue_count *next; | |
735 | unsigned long label_number; | |
736 | unsigned int prologue_count; | |
737 | } label_prologue_count; | |
738 | ||
5656b6b8 JB |
739 | typedef struct proc_pending |
740 | { | |
741 | symbolS *sym; | |
742 | struct proc_pending *next; | |
743 | } proc_pending; | |
744 | ||
e0c9811a JW |
745 | static struct |
746 | { | |
e0c9811a JW |
747 | /* Maintain a list of unwind entries for the current function. */ |
748 | unw_rec_list *list; | |
749 | unw_rec_list *tail; | |
800eeca4 | 750 | |
ad4b42b4 | 751 | /* Any unwind entries that should be attached to the current slot |
e0c9811a JW |
752 | that an insn is being constructed for. */ |
753 | unw_rec_list *current_entry; | |
800eeca4 | 754 | |
e0c9811a | 755 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 756 | proc_pending proc_pending; |
e0c9811a JW |
757 | symbolS *info; /* pointer to unwind info */ |
758 | symbolS *personality_routine; | |
91a2ae2a RH |
759 | segT saved_text_seg; |
760 | subsegT saved_text_subseg; | |
761 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 762 | |
e0c9811a | 763 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
764 | unsigned int prologue : 1; |
765 | unsigned int prologue_mask : 4; | |
e4e8248d | 766 | unsigned int prologue_gr : 7; |
75e09913 JB |
767 | unsigned int body : 1; |
768 | unsigned int insn : 1; | |
33d01f33 | 769 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
770 | /* Prologue counts at previous .label_state directives. */ |
771 | struct label_prologue_count * saved_prologue_counts; | |
ba825241 JB |
772 | |
773 | /* List of split up .save-s. */ | |
774 | unw_p_record *pending_saves; | |
e0c9811a | 775 | } unwind; |
800eeca4 | 776 | |
9f9a069e JW |
777 | /* The input value is a negated offset from psp, and specifies an address |
778 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
779 | must add 16 and divide by 4 to get the encoded value. */ | |
780 | ||
781 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
782 | ||
5a49b8ac | 783 | typedef void (*vbyte_func) (int, char *, char *); |
800eeca4 | 784 | |
0234cb7c | 785 | /* Forward declarations: */ |
5a49b8ac | 786 | static void dot_alias (int); |
cd42ff9c | 787 | static int parse_operand_and_eval (expressionS *, int); |
5a49b8ac AM |
788 | static void emit_one_bundle (void); |
789 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type (struct symbol *, | |
790 | bfd_reloc_code_real_type); | |
791 | static void insn_group_break (int, int, int); | |
792 | static void add_qp_mutex (valueT); | |
793 | static void add_qp_imply (int, int); | |
794 | static void clear_qp_mutex (valueT); | |
795 | static void clear_qp_implies (valueT, valueT); | |
796 | static void print_dependency (const char *, int); | |
797 | static void instruction_serialization (void); | |
798 | static void data_serialization (void); | |
799 | static void output_R3_format (vbyte_func, unw_record_type, unsigned long); | |
800 | static void output_B3_format (vbyte_func, unsigned long, unsigned long); | |
801 | static void output_B4_format (vbyte_func, unw_record_type, unsigned long); | |
802 | static void free_saved_prologue_counts (void); | |
91a2ae2a | 803 | |
652ca075 | 804 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
805 | unit (as opposed to the memory unit). */ |
806 | static int | |
652ca075 | 807 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
808 | { |
809 | reg -= REG_AR; | |
652ca075 L |
810 | return reg >= 64 && reg <= 111; |
811 | } | |
800eeca4 | 812 | |
652ca075 L |
813 | /* Determine if application register REGNUM resides only in the memory |
814 | unit (as opposed to the integer unit). */ | |
815 | static int | |
816 | ar_is_only_in_memory_unit (int reg) | |
817 | { | |
818 | reg -= REG_AR; | |
819 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
820 | } |
821 | ||
822 | /* Switch to section NAME and create section if necessary. It's | |
823 | rather ugly that we have to manipulate input_line_pointer but I | |
824 | don't see any other way to accomplish the same thing without | |
825 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
826 | static void | |
5a49b8ac | 827 | set_section (char *name) |
800eeca4 JW |
828 | { |
829 | char *saved_input_line_pointer; | |
830 | ||
831 | saved_input_line_pointer = input_line_pointer; | |
832 | input_line_pointer = name; | |
833 | obj_elf_section (0); | |
834 | input_line_pointer = saved_input_line_pointer; | |
835 | } | |
836 | ||
d61a78a7 RH |
837 | /* Map 's' to SHF_IA_64_SHORT. */ |
838 | ||
01e1a5bc | 839 | bfd_vma |
5a49b8ac | 840 | ia64_elf_section_letter (int letter, char **ptr_msg) |
d61a78a7 RH |
841 | { |
842 | if (letter == 's') | |
843 | return SHF_IA_64_SHORT; | |
711ef82f L |
844 | else if (letter == 'o') |
845 | return SHF_LINK_ORDER; | |
01e1a5bc NC |
846 | #ifdef TE_VMS |
847 | else if (letter == 'O') | |
848 | return SHF_IA_64_VMS_OVERLAID; | |
849 | else if (letter == 'g') | |
850 | return SHF_IA_64_VMS_GLOBAL; | |
851 | #endif | |
d61a78a7 | 852 | |
711ef82f L |
853 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
854 | return -1; | |
d61a78a7 RH |
855 | } |
856 | ||
800eeca4 JW |
857 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
858 | ||
859 | flagword | |
5a49b8ac | 860 | ia64_elf_section_flags (flagword flags, |
01e1a5bc | 861 | bfd_vma attr, |
5a49b8ac | 862 | int type ATTRIBUTE_UNUSED) |
800eeca4 JW |
863 | { |
864 | if (attr & SHF_IA_64_SHORT) | |
865 | flags |= SEC_SMALL_DATA; | |
866 | return flags; | |
867 | } | |
868 | ||
91a2ae2a | 869 | int |
5a49b8ac | 870 | ia64_elf_section_type (const char *str, size_t len) |
91a2ae2a | 871 | { |
1cd8ff38 | 872 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 873 | |
1cd8ff38 | 874 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
875 | return SHT_PROGBITS; |
876 | ||
1cd8ff38 | 877 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
878 | return SHT_PROGBITS; |
879 | ||
1cd8ff38 | 880 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
881 | return SHT_IA_64_UNWIND; |
882 | ||
1cd8ff38 | 883 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
884 | return SHT_IA_64_UNWIND; |
885 | ||
711ef82f L |
886 | if (STREQ ("unwind")) |
887 | return SHT_IA_64_UNWIND; | |
888 | ||
91a2ae2a | 889 | return -1; |
1cd8ff38 | 890 | #undef STREQ |
91a2ae2a RH |
891 | } |
892 | ||
800eeca4 | 893 | static unsigned int |
5a49b8ac AM |
894 | set_regstack (unsigned int ins, |
895 | unsigned int locs, | |
896 | unsigned int outs, | |
897 | unsigned int rots) | |
800eeca4 | 898 | { |
542d6675 KH |
899 | /* Size of frame. */ |
900 | unsigned int sof; | |
800eeca4 JW |
901 | |
902 | sof = ins + locs + outs; | |
903 | if (sof > 96) | |
904 | { | |
ad4b42b4 | 905 | as_bad (_("Size of frame exceeds maximum of 96 registers")); |
800eeca4 JW |
906 | return 0; |
907 | } | |
908 | if (rots > sof) | |
909 | { | |
ad4b42b4 | 910 | as_warn (_("Size of rotating registers exceeds frame size")); |
800eeca4 JW |
911 | return 0; |
912 | } | |
913 | md.in.base = REG_GR + 32; | |
914 | md.loc.base = md.in.base + ins; | |
915 | md.out.base = md.loc.base + locs; | |
916 | ||
917 | md.in.num_regs = ins; | |
918 | md.loc.num_regs = locs; | |
919 | md.out.num_regs = outs; | |
920 | md.rot.num_regs = rots; | |
921 | return sof; | |
922 | } | |
923 | ||
924 | void | |
5a49b8ac | 925 | ia64_flush_insns (void) |
800eeca4 JW |
926 | { |
927 | struct label_fix *lfix; | |
928 | segT saved_seg; | |
929 | subsegT saved_subseg; | |
b44b1b85 | 930 | unw_rec_list *ptr; |
07a53e5c | 931 | bfd_boolean mark; |
800eeca4 JW |
932 | |
933 | if (!md.last_text_seg) | |
934 | return; | |
935 | ||
936 | saved_seg = now_seg; | |
937 | saved_subseg = now_subseg; | |
938 | ||
939 | subseg_set (md.last_text_seg, 0); | |
940 | ||
941 | while (md.num_slots_in_use > 0) | |
942 | emit_one_bundle (); /* force out queued instructions */ | |
943 | ||
944 | /* In case there are labels following the last instruction, resolve | |
07a53e5c RH |
945 | those now. */ |
946 | mark = FALSE; | |
800eeca4 JW |
947 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
948 | { | |
07a53e5c RH |
949 | symbol_set_value_now (lfix->sym); |
950 | mark |= lfix->dw2_mark_labels; | |
800eeca4 | 951 | } |
07a53e5c | 952 | if (mark) |
f1bcba5b | 953 | { |
07a53e5c RH |
954 | dwarf2_where (&CURR_SLOT.debug_line); |
955 | CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
956 | dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); | |
661ba50f | 957 | dwarf2_consume_line_info (); |
f1bcba5b | 958 | } |
07a53e5c RH |
959 | CURR_SLOT.label_fixups = 0; |
960 | ||
961 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) | |
962 | symbol_set_value_now (lfix->sym); | |
f1bcba5b | 963 | CURR_SLOT.tag_fixups = 0; |
800eeca4 | 964 | |
b44b1b85 | 965 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
966 | resolve those now. We only handle prologue, body, and endp directives |
967 | here. Give an error for others. */ | |
b44b1b85 JW |
968 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
969 | { | |
9c59842f | 970 | switch (ptr->r.type) |
b44b1b85 | 971 | { |
9c59842f JW |
972 | case prologue: |
973 | case prologue_gr: | |
974 | case body: | |
975 | case endp: | |
b44b1b85 JW |
976 | ptr->slot_number = (unsigned long) frag_more (0); |
977 | ptr->slot_frag = frag_now; | |
9c59842f JW |
978 | break; |
979 | ||
980 | /* Allow any record which doesn't have a "t" field (i.e., | |
981 | doesn't relate to a particular instruction). */ | |
982 | case unwabi: | |
983 | case br_gr: | |
984 | case copy_state: | |
985 | case fr_mem: | |
986 | case frgr_mem: | |
987 | case gr_gr: | |
988 | case gr_mem: | |
989 | case label_state: | |
990 | case rp_br: | |
991 | case spill_base: | |
992 | case spill_mask: | |
993 | /* nothing */ | |
994 | break; | |
995 | ||
996 | default: | |
997 | as_bad (_("Unwind directive not followed by an instruction.")); | |
998 | break; | |
b44b1b85 | 999 | } |
b44b1b85 JW |
1000 | } |
1001 | unwind.current_entry = NULL; | |
1002 | ||
800eeca4 | 1003 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1004 | |
1005 | if (md.qp.X_op == O_register) | |
ad4b42b4 | 1006 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
1007 | } |
1008 | ||
d9201763 L |
1009 | static void |
1010 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1011 | { |
1012 | char *saved_input_line_pointer = input_line_pointer; | |
1013 | ||
1014 | input_line_pointer = ""; | |
1015 | s_align_bytes (nbytes); | |
1016 | input_line_pointer = saved_input_line_pointer; | |
1017 | } | |
1018 | ||
1019 | void | |
5a49b8ac | 1020 | ia64_cons_align (int nbytes) |
800eeca4 JW |
1021 | { |
1022 | if (md.auto_align) | |
1023 | { | |
1024 | char *saved_input_line_pointer = input_line_pointer; | |
1025 | input_line_pointer = ""; | |
1026 | s_align_bytes (nbytes); | |
1027 | input_line_pointer = saved_input_line_pointer; | |
1028 | } | |
1029 | } | |
1030 | ||
1031 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1032 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1033 | |
5a49b8ac AM |
1034 | static void |
1035 | output_vbyte_mem (int count, char *ptr, char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1036 | { |
1037 | int x; | |
1038 | if (vbyte_mem_ptr == NULL) | |
1039 | abort (); | |
1040 | ||
1041 | if (count == 0) | |
1042 | return; | |
1043 | for (x = 0; x < count; x++) | |
1044 | *(vbyte_mem_ptr++) = ptr[x]; | |
1045 | } | |
1046 | ||
1047 | /* Count the number of bytes required for records. */ | |
1048 | static int vbyte_count = 0; | |
5a49b8ac AM |
1049 | static void |
1050 | count_output (int count, | |
1051 | char *ptr ATTRIBUTE_UNUSED, | |
1052 | char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1053 | { |
1054 | vbyte_count += count; | |
1055 | } | |
1056 | ||
1057 | static void | |
5a49b8ac | 1058 | output_R1_format (vbyte_func f, unw_record_type rtype, int rlen) |
800eeca4 | 1059 | { |
e0c9811a | 1060 | int r = 0; |
800eeca4 JW |
1061 | char byte; |
1062 | if (rlen > 0x1f) | |
1063 | { | |
1064 | output_R3_format (f, rtype, rlen); | |
1065 | return; | |
1066 | } | |
197865e8 | 1067 | |
e0c9811a JW |
1068 | if (rtype == body) |
1069 | r = 1; | |
1070 | else if (rtype != prologue) | |
ad4b42b4 | 1071 | as_bad (_("record type is not valid")); |
e0c9811a | 1072 | |
800eeca4 JW |
1073 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1074 | (*f) (1, &byte, NULL); | |
1075 | } | |
1076 | ||
1077 | static void | |
5a49b8ac | 1078 | output_R2_format (vbyte_func f, int mask, int grsave, unsigned long rlen) |
800eeca4 JW |
1079 | { |
1080 | char bytes[20]; | |
1081 | int count = 2; | |
1082 | mask = (mask & 0x0f); | |
1083 | grsave = (grsave & 0x7f); | |
1084 | ||
1085 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1086 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1087 | count += output_leb128 (bytes + 2, rlen, 0); | |
1088 | (*f) (count, bytes, NULL); | |
1089 | } | |
1090 | ||
1091 | static void | |
5a49b8ac | 1092 | output_R3_format (vbyte_func f, unw_record_type rtype, unsigned long rlen) |
800eeca4 | 1093 | { |
e0c9811a | 1094 | int r = 0, count; |
800eeca4 JW |
1095 | char bytes[20]; |
1096 | if (rlen <= 0x1f) | |
1097 | { | |
1098 | output_R1_format (f, rtype, rlen); | |
1099 | return; | |
1100 | } | |
197865e8 | 1101 | |
e0c9811a JW |
1102 | if (rtype == body) |
1103 | r = 1; | |
1104 | else if (rtype != prologue) | |
ad4b42b4 | 1105 | as_bad (_("record type is not valid")); |
800eeca4 JW |
1106 | bytes[0] = (UNW_R3 | r); |
1107 | count = output_leb128 (bytes + 1, rlen, 0); | |
1108 | (*f) (count + 1, bytes, NULL); | |
1109 | } | |
1110 | ||
1111 | static void | |
5a49b8ac | 1112 | output_P1_format (vbyte_func f, int brmask) |
800eeca4 JW |
1113 | { |
1114 | char byte; | |
1115 | byte = UNW_P1 | (brmask & 0x1f); | |
1116 | (*f) (1, &byte, NULL); | |
1117 | } | |
1118 | ||
1119 | static void | |
5a49b8ac | 1120 | output_P2_format (vbyte_func f, int brmask, int gr) |
800eeca4 JW |
1121 | { |
1122 | char bytes[2]; | |
1123 | brmask = (brmask & 0x1f); | |
1124 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1125 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1126 | (*f) (2, bytes, NULL); | |
1127 | } | |
1128 | ||
1129 | static void | |
5a49b8ac | 1130 | output_P3_format (vbyte_func f, unw_record_type rtype, int reg) |
800eeca4 JW |
1131 | { |
1132 | char bytes[2]; | |
e0c9811a | 1133 | int r = 0; |
800eeca4 JW |
1134 | reg = (reg & 0x7f); |
1135 | switch (rtype) | |
542d6675 | 1136 | { |
800eeca4 JW |
1137 | case psp_gr: |
1138 | r = 0; | |
1139 | break; | |
1140 | case rp_gr: | |
1141 | r = 1; | |
1142 | break; | |
1143 | case pfs_gr: | |
1144 | r = 2; | |
1145 | break; | |
1146 | case preds_gr: | |
1147 | r = 3; | |
1148 | break; | |
1149 | case unat_gr: | |
1150 | r = 4; | |
1151 | break; | |
1152 | case lc_gr: | |
1153 | r = 5; | |
1154 | break; | |
1155 | case rp_br: | |
1156 | r = 6; | |
1157 | break; | |
1158 | case rnat_gr: | |
1159 | r = 7; | |
1160 | break; | |
1161 | case bsp_gr: | |
1162 | r = 8; | |
1163 | break; | |
1164 | case bspstore_gr: | |
1165 | r = 9; | |
1166 | break; | |
1167 | case fpsr_gr: | |
1168 | r = 10; | |
1169 | break; | |
1170 | case priunat_gr: | |
1171 | r = 11; | |
1172 | break; | |
1173 | default: | |
ad4b42b4 | 1174 | as_bad (_("Invalid record type for P3 format.")); |
542d6675 | 1175 | } |
800eeca4 JW |
1176 | bytes[0] = (UNW_P3 | (r >> 1)); |
1177 | bytes[1] = (((r & 1) << 7) | reg); | |
1178 | (*f) (2, bytes, NULL); | |
1179 | } | |
1180 | ||
800eeca4 | 1181 | static void |
5a49b8ac | 1182 | output_P4_format (vbyte_func f, unsigned char *imask, unsigned long imask_size) |
800eeca4 | 1183 | { |
e0c9811a | 1184 | imask[0] = UNW_P4; |
2132e3a3 | 1185 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1186 | } |
1187 | ||
1188 | static void | |
5a49b8ac | 1189 | output_P5_format (vbyte_func f, int grmask, unsigned long frmask) |
800eeca4 JW |
1190 | { |
1191 | char bytes[4]; | |
1192 | grmask = (grmask & 0x0f); | |
1193 | ||
1194 | bytes[0] = UNW_P5; | |
1195 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1196 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1197 | bytes[3] = (frmask & 0x000000ff); | |
1198 | (*f) (4, bytes, NULL); | |
1199 | } | |
1200 | ||
1201 | static void | |
5a49b8ac | 1202 | output_P6_format (vbyte_func f, unw_record_type rtype, int rmask) |
800eeca4 JW |
1203 | { |
1204 | char byte; | |
e0c9811a | 1205 | int r = 0; |
197865e8 | 1206 | |
e0c9811a JW |
1207 | if (rtype == gr_mem) |
1208 | r = 1; | |
1209 | else if (rtype != fr_mem) | |
ad4b42b4 | 1210 | as_bad (_("Invalid record type for format P6")); |
800eeca4 JW |
1211 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1212 | (*f) (1, &byte, NULL); | |
1213 | } | |
1214 | ||
1215 | static void | |
5a49b8ac AM |
1216 | output_P7_format (vbyte_func f, |
1217 | unw_record_type rtype, | |
1218 | unsigned long w1, | |
1219 | unsigned long w2) | |
800eeca4 JW |
1220 | { |
1221 | char bytes[20]; | |
1222 | int count = 1; | |
e0c9811a | 1223 | int r = 0; |
800eeca4 JW |
1224 | count += output_leb128 (bytes + 1, w1, 0); |
1225 | switch (rtype) | |
1226 | { | |
542d6675 KH |
1227 | case mem_stack_f: |
1228 | r = 0; | |
1229 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1230 | break; | |
1231 | case mem_stack_v: | |
1232 | r = 1; | |
1233 | break; | |
1234 | case spill_base: | |
1235 | r = 2; | |
1236 | break; | |
1237 | case psp_sprel: | |
1238 | r = 3; | |
1239 | break; | |
1240 | case rp_when: | |
1241 | r = 4; | |
1242 | break; | |
1243 | case rp_psprel: | |
1244 | r = 5; | |
1245 | break; | |
1246 | case pfs_when: | |
1247 | r = 6; | |
1248 | break; | |
1249 | case pfs_psprel: | |
1250 | r = 7; | |
1251 | break; | |
1252 | case preds_when: | |
1253 | r = 8; | |
1254 | break; | |
1255 | case preds_psprel: | |
1256 | r = 9; | |
1257 | break; | |
1258 | case lc_when: | |
1259 | r = 10; | |
1260 | break; | |
1261 | case lc_psprel: | |
1262 | r = 11; | |
1263 | break; | |
1264 | case unat_when: | |
1265 | r = 12; | |
1266 | break; | |
1267 | case unat_psprel: | |
1268 | r = 13; | |
1269 | break; | |
1270 | case fpsr_when: | |
1271 | r = 14; | |
1272 | break; | |
1273 | case fpsr_psprel: | |
1274 | r = 15; | |
1275 | break; | |
1276 | default: | |
1277 | break; | |
800eeca4 JW |
1278 | } |
1279 | bytes[0] = (UNW_P7 | r); | |
1280 | (*f) (count, bytes, NULL); | |
1281 | } | |
1282 | ||
1283 | static void | |
5a49b8ac | 1284 | output_P8_format (vbyte_func f, unw_record_type rtype, unsigned long t) |
800eeca4 JW |
1285 | { |
1286 | char bytes[20]; | |
e0c9811a | 1287 | int r = 0; |
800eeca4 JW |
1288 | int count = 2; |
1289 | bytes[0] = UNW_P8; | |
1290 | switch (rtype) | |
1291 | { | |
542d6675 KH |
1292 | case rp_sprel: |
1293 | r = 1; | |
1294 | break; | |
1295 | case pfs_sprel: | |
1296 | r = 2; | |
1297 | break; | |
1298 | case preds_sprel: | |
1299 | r = 3; | |
1300 | break; | |
1301 | case lc_sprel: | |
1302 | r = 4; | |
1303 | break; | |
1304 | case unat_sprel: | |
1305 | r = 5; | |
1306 | break; | |
1307 | case fpsr_sprel: | |
1308 | r = 6; | |
1309 | break; | |
1310 | case bsp_when: | |
1311 | r = 7; | |
1312 | break; | |
1313 | case bsp_psprel: | |
1314 | r = 8; | |
1315 | break; | |
1316 | case bsp_sprel: | |
1317 | r = 9; | |
1318 | break; | |
1319 | case bspstore_when: | |
1320 | r = 10; | |
1321 | break; | |
1322 | case bspstore_psprel: | |
1323 | r = 11; | |
1324 | break; | |
1325 | case bspstore_sprel: | |
1326 | r = 12; | |
1327 | break; | |
1328 | case rnat_when: | |
1329 | r = 13; | |
1330 | break; | |
1331 | case rnat_psprel: | |
1332 | r = 14; | |
1333 | break; | |
1334 | case rnat_sprel: | |
1335 | r = 15; | |
1336 | break; | |
1337 | case priunat_when_gr: | |
1338 | r = 16; | |
1339 | break; | |
1340 | case priunat_psprel: | |
1341 | r = 17; | |
1342 | break; | |
1343 | case priunat_sprel: | |
1344 | r = 18; | |
1345 | break; | |
1346 | case priunat_when_mem: | |
1347 | r = 19; | |
1348 | break; | |
1349 | default: | |
1350 | break; | |
800eeca4 JW |
1351 | } |
1352 | bytes[1] = r; | |
1353 | count += output_leb128 (bytes + 2, t, 0); | |
1354 | (*f) (count, bytes, NULL); | |
1355 | } | |
1356 | ||
1357 | static void | |
5a49b8ac | 1358 | output_P9_format (vbyte_func f, int grmask, int gr) |
800eeca4 JW |
1359 | { |
1360 | char bytes[3]; | |
1361 | bytes[0] = UNW_P9; | |
1362 | bytes[1] = (grmask & 0x0f); | |
1363 | bytes[2] = (gr & 0x7f); | |
1364 | (*f) (3, bytes, NULL); | |
1365 | } | |
1366 | ||
1367 | static void | |
5a49b8ac | 1368 | output_P10_format (vbyte_func f, int abi, int context) |
800eeca4 JW |
1369 | { |
1370 | char bytes[3]; | |
1371 | bytes[0] = UNW_P10; | |
1372 | bytes[1] = (abi & 0xff); | |
1373 | bytes[2] = (context & 0xff); | |
1374 | (*f) (3, bytes, NULL); | |
1375 | } | |
1376 | ||
1377 | static void | |
5a49b8ac | 1378 | output_B1_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1379 | { |
1380 | char byte; | |
e0c9811a | 1381 | int r = 0; |
197865e8 | 1382 | if (label > 0x1f) |
800eeca4 JW |
1383 | { |
1384 | output_B4_format (f, rtype, label); | |
1385 | return; | |
1386 | } | |
e0c9811a JW |
1387 | if (rtype == copy_state) |
1388 | r = 1; | |
1389 | else if (rtype != label_state) | |
ad4b42b4 | 1390 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1391 | |
1392 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1393 | (*f) (1, &byte, NULL); | |
1394 | } | |
1395 | ||
1396 | static void | |
5a49b8ac | 1397 | output_B2_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1398 | { |
1399 | char bytes[20]; | |
1400 | int count = 1; | |
1401 | if (ecount > 0x1f) | |
1402 | { | |
1403 | output_B3_format (f, ecount, t); | |
1404 | return; | |
1405 | } | |
1406 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1407 | count += output_leb128 (bytes + 1, t, 0); | |
1408 | (*f) (count, bytes, NULL); | |
1409 | } | |
1410 | ||
1411 | static void | |
5a49b8ac | 1412 | output_B3_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1413 | { |
1414 | char bytes[20]; | |
1415 | int count = 1; | |
1416 | if (ecount <= 0x1f) | |
1417 | { | |
1418 | output_B2_format (f, ecount, t); | |
1419 | return; | |
1420 | } | |
1421 | bytes[0] = UNW_B3; | |
1422 | count += output_leb128 (bytes + 1, t, 0); | |
1423 | count += output_leb128 (bytes + count, ecount, 0); | |
1424 | (*f) (count, bytes, NULL); | |
1425 | } | |
1426 | ||
1427 | static void | |
5a49b8ac | 1428 | output_B4_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1429 | { |
1430 | char bytes[20]; | |
e0c9811a | 1431 | int r = 0; |
800eeca4 | 1432 | int count = 1; |
197865e8 | 1433 | if (label <= 0x1f) |
800eeca4 JW |
1434 | { |
1435 | output_B1_format (f, rtype, label); | |
1436 | return; | |
1437 | } | |
197865e8 | 1438 | |
e0c9811a JW |
1439 | if (rtype == copy_state) |
1440 | r = 1; | |
1441 | else if (rtype != label_state) | |
ad4b42b4 | 1442 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1443 | |
1444 | bytes[0] = (UNW_B4 | (r << 3)); | |
1445 | count += output_leb128 (bytes + 1, label, 0); | |
1446 | (*f) (count, bytes, NULL); | |
1447 | } | |
1448 | ||
1449 | static char | |
5a49b8ac | 1450 | format_ab_reg (int ab, int reg) |
800eeca4 JW |
1451 | { |
1452 | int ret; | |
e0c9811a | 1453 | ab = (ab & 3); |
800eeca4 | 1454 | reg = (reg & 0x1f); |
e0c9811a | 1455 | ret = (ab << 5) | reg; |
800eeca4 JW |
1456 | return ret; |
1457 | } | |
1458 | ||
1459 | static void | |
5a49b8ac AM |
1460 | output_X1_format (vbyte_func f, |
1461 | unw_record_type rtype, | |
1462 | int ab, | |
1463 | int reg, | |
1464 | unsigned long t, | |
1465 | unsigned long w1) | |
800eeca4 JW |
1466 | { |
1467 | char bytes[20]; | |
e0c9811a | 1468 | int r = 0; |
800eeca4 JW |
1469 | int count = 2; |
1470 | bytes[0] = UNW_X1; | |
197865e8 | 1471 | |
e0c9811a JW |
1472 | if (rtype == spill_sprel) |
1473 | r = 1; | |
1474 | else if (rtype != spill_psprel) | |
ad4b42b4 | 1475 | as_bad (_("Invalid record type for format X1")); |
e0c9811a | 1476 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1477 | count += output_leb128 (bytes + 2, t, 0); |
1478 | count += output_leb128 (bytes + count, w1, 0); | |
1479 | (*f) (count, bytes, NULL); | |
1480 | } | |
1481 | ||
1482 | static void | |
5a49b8ac AM |
1483 | output_X2_format (vbyte_func f, |
1484 | int ab, | |
1485 | int reg, | |
1486 | int x, | |
1487 | int y, | |
1488 | int treg, | |
1489 | unsigned long t) | |
800eeca4 JW |
1490 | { |
1491 | char bytes[20]; | |
800eeca4 JW |
1492 | int count = 3; |
1493 | bytes[0] = UNW_X2; | |
e0c9811a | 1494 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1495 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1496 | count += output_leb128 (bytes + 3, t, 0); | |
1497 | (*f) (count, bytes, NULL); | |
1498 | } | |
1499 | ||
1500 | static void | |
5a49b8ac AM |
1501 | output_X3_format (vbyte_func f, |
1502 | unw_record_type rtype, | |
1503 | int qp, | |
1504 | int ab, | |
1505 | int reg, | |
1506 | unsigned long t, | |
1507 | unsigned long w1) | |
800eeca4 JW |
1508 | { |
1509 | char bytes[20]; | |
e0c9811a | 1510 | int r = 0; |
800eeca4 | 1511 | int count = 3; |
e0c9811a JW |
1512 | bytes[0] = UNW_X3; |
1513 | ||
1514 | if (rtype == spill_sprel_p) | |
1515 | r = 1; | |
1516 | else if (rtype != spill_psprel_p) | |
ad4b42b4 | 1517 | as_bad (_("Invalid record type for format X3")); |
800eeca4 | 1518 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1519 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1520 | count += output_leb128 (bytes + 3, t, 0); |
1521 | count += output_leb128 (bytes + count, w1, 0); | |
1522 | (*f) (count, bytes, NULL); | |
1523 | } | |
1524 | ||
1525 | static void | |
5a49b8ac AM |
1526 | output_X4_format (vbyte_func f, |
1527 | int qp, | |
1528 | int ab, | |
1529 | int reg, | |
1530 | int x, | |
1531 | int y, | |
1532 | int treg, | |
1533 | unsigned long t) | |
800eeca4 JW |
1534 | { |
1535 | char bytes[20]; | |
800eeca4 | 1536 | int count = 4; |
e0c9811a | 1537 | bytes[0] = UNW_X4; |
800eeca4 | 1538 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1539 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1540 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1541 | count += output_leb128 (bytes + 4, t, 0); | |
1542 | (*f) (count, bytes, NULL); | |
1543 | } | |
1544 | ||
ba825241 JB |
1545 | /* This function checks whether there are any outstanding .save-s and |
1546 | discards them if so. */ | |
1547 | ||
1548 | static void | |
1549 | check_pending_save (void) | |
1550 | { | |
1551 | if (unwind.pending_saves) | |
1552 | { | |
1553 | unw_rec_list *cur, *prev; | |
1554 | ||
ad4b42b4 | 1555 | as_warn (_("Previous .save incomplete")); |
ba825241 JB |
1556 | for (cur = unwind.list, prev = NULL; cur; ) |
1557 | if (&cur->r.record.p == unwind.pending_saves) | |
1558 | { | |
1559 | if (prev) | |
1560 | prev->next = cur->next; | |
1561 | else | |
1562 | unwind.list = cur->next; | |
1563 | if (cur == unwind.tail) | |
1564 | unwind.tail = prev; | |
1565 | if (cur == unwind.current_entry) | |
1566 | unwind.current_entry = cur->next; | |
1567 | /* Don't free the first discarded record, it's being used as | |
1568 | terminator for (currently) br_gr and gr_gr processing, and | |
1569 | also prevents leaving a dangling pointer to it in its | |
1570 | predecessor. */ | |
1571 | cur->r.record.p.grmask = 0; | |
1572 | cur->r.record.p.brmask = 0; | |
1573 | cur->r.record.p.frmask = 0; | |
1574 | prev = cur->r.record.p.next; | |
1575 | cur->r.record.p.next = NULL; | |
1576 | cur = prev; | |
1577 | break; | |
1578 | } | |
1579 | else | |
1580 | { | |
1581 | prev = cur; | |
1582 | cur = cur->next; | |
1583 | } | |
1584 | while (cur) | |
1585 | { | |
1586 | prev = cur; | |
1587 | cur = cur->r.record.p.next; | |
1588 | free (prev); | |
1589 | } | |
1590 | unwind.pending_saves = NULL; | |
1591 | } | |
1592 | } | |
1593 | ||
800eeca4 | 1594 | /* This function allocates a record list structure, and initializes fields. */ |
542d6675 | 1595 | |
800eeca4 | 1596 | static unw_rec_list * |
197865e8 | 1597 | alloc_record (unw_record_type t) |
800eeca4 JW |
1598 | { |
1599 | unw_rec_list *ptr; | |
1600 | ptr = xmalloc (sizeof (*ptr)); | |
ba825241 | 1601 | memset (ptr, 0, sizeof (*ptr)); |
800eeca4 JW |
1602 | ptr->slot_number = SLOT_NUM_NOT_SET; |
1603 | ptr->r.type = t; | |
1604 | return ptr; | |
1605 | } | |
1606 | ||
5738bc24 JW |
1607 | /* Dummy unwind record used for calculating the length of the last prologue or |
1608 | body region. */ | |
1609 | ||
1610 | static unw_rec_list * | |
5a49b8ac | 1611 | output_endp (void) |
5738bc24 JW |
1612 | { |
1613 | unw_rec_list *ptr = alloc_record (endp); | |
1614 | return ptr; | |
1615 | } | |
1616 | ||
800eeca4 | 1617 | static unw_rec_list * |
5a49b8ac | 1618 | output_prologue (void) |
800eeca4 JW |
1619 | { |
1620 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1621 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1622 | return ptr; |
1623 | } | |
1624 | ||
1625 | static unw_rec_list * | |
5a49b8ac | 1626 | output_prologue_gr (unsigned int saved_mask, unsigned int reg) |
800eeca4 JW |
1627 | { |
1628 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1629 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1630 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1631 | ptr->r.record.r.grsave = reg; |
1632 | return ptr; | |
1633 | } | |
1634 | ||
1635 | static unw_rec_list * | |
5a49b8ac | 1636 | output_body (void) |
800eeca4 JW |
1637 | { |
1638 | unw_rec_list *ptr = alloc_record (body); | |
1639 | return ptr; | |
1640 | } | |
1641 | ||
1642 | static unw_rec_list * | |
5a49b8ac | 1643 | output_mem_stack_f (unsigned int size) |
800eeca4 JW |
1644 | { |
1645 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1646 | ptr->r.record.p.size = size; | |
1647 | return ptr; | |
1648 | } | |
1649 | ||
1650 | static unw_rec_list * | |
5a49b8ac | 1651 | output_mem_stack_v (void) |
800eeca4 JW |
1652 | { |
1653 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1654 | return ptr; | |
1655 | } | |
1656 | ||
1657 | static unw_rec_list * | |
5a49b8ac | 1658 | output_psp_gr (unsigned int gr) |
800eeca4 JW |
1659 | { |
1660 | unw_rec_list *ptr = alloc_record (psp_gr); | |
ba825241 | 1661 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1662 | return ptr; |
1663 | } | |
1664 | ||
1665 | static unw_rec_list * | |
5a49b8ac | 1666 | output_psp_sprel (unsigned int offset) |
800eeca4 JW |
1667 | { |
1668 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
ba825241 | 1669 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1670 | return ptr; |
1671 | } | |
1672 | ||
1673 | static unw_rec_list * | |
5a49b8ac | 1674 | output_rp_when (void) |
800eeca4 JW |
1675 | { |
1676 | unw_rec_list *ptr = alloc_record (rp_when); | |
1677 | return ptr; | |
1678 | } | |
1679 | ||
1680 | static unw_rec_list * | |
5a49b8ac | 1681 | output_rp_gr (unsigned int gr) |
800eeca4 JW |
1682 | { |
1683 | unw_rec_list *ptr = alloc_record (rp_gr); | |
ba825241 | 1684 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1685 | return ptr; |
1686 | } | |
1687 | ||
1688 | static unw_rec_list * | |
5a49b8ac | 1689 | output_rp_br (unsigned int br) |
800eeca4 JW |
1690 | { |
1691 | unw_rec_list *ptr = alloc_record (rp_br); | |
ba825241 | 1692 | ptr->r.record.p.r.br = br; |
800eeca4 JW |
1693 | return ptr; |
1694 | } | |
1695 | ||
1696 | static unw_rec_list * | |
5a49b8ac | 1697 | output_rp_psprel (unsigned int offset) |
800eeca4 JW |
1698 | { |
1699 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
ba825241 | 1700 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1701 | return ptr; |
1702 | } | |
1703 | ||
1704 | static unw_rec_list * | |
5a49b8ac | 1705 | output_rp_sprel (unsigned int offset) |
800eeca4 JW |
1706 | { |
1707 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
ba825241 | 1708 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1709 | return ptr; |
1710 | } | |
1711 | ||
1712 | static unw_rec_list * | |
5a49b8ac | 1713 | output_pfs_when (void) |
800eeca4 JW |
1714 | { |
1715 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1716 | return ptr; | |
1717 | } | |
1718 | ||
1719 | static unw_rec_list * | |
5a49b8ac | 1720 | output_pfs_gr (unsigned int gr) |
800eeca4 JW |
1721 | { |
1722 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
ba825241 | 1723 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1724 | return ptr; |
1725 | } | |
1726 | ||
1727 | static unw_rec_list * | |
5a49b8ac | 1728 | output_pfs_psprel (unsigned int offset) |
800eeca4 JW |
1729 | { |
1730 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
ba825241 | 1731 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1732 | return ptr; |
1733 | } | |
1734 | ||
1735 | static unw_rec_list * | |
5a49b8ac | 1736 | output_pfs_sprel (unsigned int offset) |
800eeca4 JW |
1737 | { |
1738 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
ba825241 | 1739 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1740 | return ptr; |
1741 | } | |
1742 | ||
1743 | static unw_rec_list * | |
5a49b8ac | 1744 | output_preds_when (void) |
800eeca4 JW |
1745 | { |
1746 | unw_rec_list *ptr = alloc_record (preds_when); | |
1747 | return ptr; | |
1748 | } | |
1749 | ||
1750 | static unw_rec_list * | |
5a49b8ac | 1751 | output_preds_gr (unsigned int gr) |
800eeca4 JW |
1752 | { |
1753 | unw_rec_list *ptr = alloc_record (preds_gr); | |
ba825241 | 1754 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1755 | return ptr; |
1756 | } | |
1757 | ||
1758 | static unw_rec_list * | |
5a49b8ac | 1759 | output_preds_psprel (unsigned int offset) |
800eeca4 JW |
1760 | { |
1761 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
ba825241 | 1762 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1763 | return ptr; |
1764 | } | |
1765 | ||
1766 | static unw_rec_list * | |
5a49b8ac | 1767 | output_preds_sprel (unsigned int offset) |
800eeca4 JW |
1768 | { |
1769 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
ba825241 | 1770 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1771 | return ptr; |
1772 | } | |
1773 | ||
1774 | static unw_rec_list * | |
5a49b8ac | 1775 | output_fr_mem (unsigned int mask) |
800eeca4 JW |
1776 | { |
1777 | unw_rec_list *ptr = alloc_record (fr_mem); | |
ba825241 JB |
1778 | unw_rec_list *cur = ptr; |
1779 | ||
1780 | ptr->r.record.p.frmask = mask; | |
1781 | unwind.pending_saves = &ptr->r.record.p; | |
1782 | for (;;) | |
1783 | { | |
1784 | unw_rec_list *prev = cur; | |
1785 | ||
1786 | /* Clear least significant set bit. */ | |
1787 | mask &= ~(mask & (~mask + 1)); | |
1788 | if (!mask) | |
1789 | return ptr; | |
1790 | cur = alloc_record (fr_mem); | |
1791 | cur->r.record.p.frmask = mask; | |
1792 | /* Retain only least significant bit. */ | |
1793 | prev->r.record.p.frmask ^= mask; | |
1794 | prev->r.record.p.next = cur; | |
1795 | } | |
800eeca4 JW |
1796 | } |
1797 | ||
1798 | static unw_rec_list * | |
5a49b8ac | 1799 | output_frgr_mem (unsigned int gr_mask, unsigned int fr_mask) |
800eeca4 JW |
1800 | { |
1801 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
ba825241 JB |
1802 | unw_rec_list *cur = ptr; |
1803 | ||
1804 | unwind.pending_saves = &cur->r.record.p; | |
1805 | cur->r.record.p.frmask = fr_mask; | |
1806 | while (fr_mask) | |
1807 | { | |
1808 | unw_rec_list *prev = cur; | |
1809 | ||
1810 | /* Clear least significant set bit. */ | |
1811 | fr_mask &= ~(fr_mask & (~fr_mask + 1)); | |
1812 | if (!gr_mask && !fr_mask) | |
1813 | return ptr; | |
1814 | cur = alloc_record (frgr_mem); | |
1815 | cur->r.record.p.frmask = fr_mask; | |
1816 | /* Retain only least significant bit. */ | |
1817 | prev->r.record.p.frmask ^= fr_mask; | |
1818 | prev->r.record.p.next = cur; | |
1819 | } | |
1820 | cur->r.record.p.grmask = gr_mask; | |
1821 | for (;;) | |
1822 | { | |
1823 | unw_rec_list *prev = cur; | |
1824 | ||
1825 | /* Clear least significant set bit. */ | |
1826 | gr_mask &= ~(gr_mask & (~gr_mask + 1)); | |
1827 | if (!gr_mask) | |
1828 | return ptr; | |
1829 | cur = alloc_record (frgr_mem); | |
1830 | cur->r.record.p.grmask = gr_mask; | |
1831 | /* Retain only least significant bit. */ | |
1832 | prev->r.record.p.grmask ^= gr_mask; | |
1833 | prev->r.record.p.next = cur; | |
1834 | } | |
800eeca4 JW |
1835 | } |
1836 | ||
1837 | static unw_rec_list * | |
5a49b8ac | 1838 | output_gr_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
1839 | { |
1840 | unw_rec_list *ptr = alloc_record (gr_gr); | |
ba825241 JB |
1841 | unw_rec_list *cur = ptr; |
1842 | ||
800eeca4 | 1843 | ptr->r.record.p.grmask = mask; |
ba825241 JB |
1844 | ptr->r.record.p.r.gr = reg; |
1845 | unwind.pending_saves = &ptr->r.record.p; | |
1846 | for (;;) | |
1847 | { | |
1848 | unw_rec_list *prev = cur; | |
1849 | ||
1850 | /* Clear least significant set bit. */ | |
1851 | mask &= ~(mask & (~mask + 1)); | |
1852 | if (!mask) | |
1853 | return ptr; | |
1854 | cur = alloc_record (gr_gr); | |
1855 | cur->r.record.p.grmask = mask; | |
1856 | /* Indicate this record shouldn't be output. */ | |
1857 | cur->r.record.p.r.gr = REG_NUM; | |
1858 | /* Retain only least significant bit. */ | |
1859 | prev->r.record.p.grmask ^= mask; | |
1860 | prev->r.record.p.next = cur; | |
1861 | } | |
800eeca4 JW |
1862 | } |
1863 | ||
1864 | static unw_rec_list * | |
5a49b8ac | 1865 | output_gr_mem (unsigned int mask) |
800eeca4 JW |
1866 | { |
1867 | unw_rec_list *ptr = alloc_record (gr_mem); | |
ba825241 JB |
1868 | unw_rec_list *cur = ptr; |
1869 | ||
1870 | ptr->r.record.p.grmask = mask; | |
1871 | unwind.pending_saves = &ptr->r.record.p; | |
1872 | for (;;) | |
1873 | { | |
1874 | unw_rec_list *prev = cur; | |
1875 | ||
1876 | /* Clear least significant set bit. */ | |
1877 | mask &= ~(mask & (~mask + 1)); | |
1878 | if (!mask) | |
1879 | return ptr; | |
1880 | cur = alloc_record (gr_mem); | |
1881 | cur->r.record.p.grmask = mask; | |
1882 | /* Retain only least significant bit. */ | |
1883 | prev->r.record.p.grmask ^= mask; | |
1884 | prev->r.record.p.next = cur; | |
1885 | } | |
800eeca4 JW |
1886 | } |
1887 | ||
1888 | static unw_rec_list * | |
1889 | output_br_mem (unsigned int mask) | |
1890 | { | |
1891 | unw_rec_list *ptr = alloc_record (br_mem); | |
ba825241 JB |
1892 | unw_rec_list *cur = ptr; |
1893 | ||
800eeca4 | 1894 | ptr->r.record.p.brmask = mask; |
ba825241 JB |
1895 | unwind.pending_saves = &ptr->r.record.p; |
1896 | for (;;) | |
1897 | { | |
1898 | unw_rec_list *prev = cur; | |
1899 | ||
1900 | /* Clear least significant set bit. */ | |
1901 | mask &= ~(mask & (~mask + 1)); | |
1902 | if (!mask) | |
1903 | return ptr; | |
1904 | cur = alloc_record (br_mem); | |
1905 | cur->r.record.p.brmask = mask; | |
1906 | /* Retain only least significant bit. */ | |
1907 | prev->r.record.p.brmask ^= mask; | |
1908 | prev->r.record.p.next = cur; | |
1909 | } | |
800eeca4 JW |
1910 | } |
1911 | ||
1912 | static unw_rec_list * | |
5a49b8ac | 1913 | output_br_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
1914 | { |
1915 | unw_rec_list *ptr = alloc_record (br_gr); | |
ba825241 JB |
1916 | unw_rec_list *cur = ptr; |
1917 | ||
1918 | ptr->r.record.p.brmask = mask; | |
1919 | ptr->r.record.p.r.gr = reg; | |
1920 | unwind.pending_saves = &ptr->r.record.p; | |
1921 | for (;;) | |
1922 | { | |
1923 | unw_rec_list *prev = cur; | |
1924 | ||
1925 | /* Clear least significant set bit. */ | |
1926 | mask &= ~(mask & (~mask + 1)); | |
1927 | if (!mask) | |
1928 | return ptr; | |
1929 | cur = alloc_record (br_gr); | |
1930 | cur->r.record.p.brmask = mask; | |
1931 | /* Indicate this record shouldn't be output. */ | |
1932 | cur->r.record.p.r.gr = REG_NUM; | |
1933 | /* Retain only least significant bit. */ | |
1934 | prev->r.record.p.brmask ^= mask; | |
1935 | prev->r.record.p.next = cur; | |
1936 | } | |
800eeca4 JW |
1937 | } |
1938 | ||
1939 | static unw_rec_list * | |
5a49b8ac | 1940 | output_spill_base (unsigned int offset) |
800eeca4 JW |
1941 | { |
1942 | unw_rec_list *ptr = alloc_record (spill_base); | |
ba825241 | 1943 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1944 | return ptr; |
1945 | } | |
1946 | ||
1947 | static unw_rec_list * | |
5a49b8ac | 1948 | output_unat_when (void) |
800eeca4 JW |
1949 | { |
1950 | unw_rec_list *ptr = alloc_record (unat_when); | |
1951 | return ptr; | |
1952 | } | |
1953 | ||
1954 | static unw_rec_list * | |
5a49b8ac | 1955 | output_unat_gr (unsigned int gr) |
800eeca4 JW |
1956 | { |
1957 | unw_rec_list *ptr = alloc_record (unat_gr); | |
ba825241 | 1958 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1959 | return ptr; |
1960 | } | |
1961 | ||
1962 | static unw_rec_list * | |
5a49b8ac | 1963 | output_unat_psprel (unsigned int offset) |
800eeca4 JW |
1964 | { |
1965 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
ba825241 | 1966 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1967 | return ptr; |
1968 | } | |
1969 | ||
1970 | static unw_rec_list * | |
5a49b8ac | 1971 | output_unat_sprel (unsigned int offset) |
800eeca4 JW |
1972 | { |
1973 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
ba825241 | 1974 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1975 | return ptr; |
1976 | } | |
1977 | ||
1978 | static unw_rec_list * | |
5a49b8ac | 1979 | output_lc_when (void) |
800eeca4 JW |
1980 | { |
1981 | unw_rec_list *ptr = alloc_record (lc_when); | |
1982 | return ptr; | |
1983 | } | |
1984 | ||
1985 | static unw_rec_list * | |
5a49b8ac | 1986 | output_lc_gr (unsigned int gr) |
800eeca4 JW |
1987 | { |
1988 | unw_rec_list *ptr = alloc_record (lc_gr); | |
ba825241 | 1989 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1990 | return ptr; |
1991 | } | |
1992 | ||
1993 | static unw_rec_list * | |
5a49b8ac | 1994 | output_lc_psprel (unsigned int offset) |
800eeca4 JW |
1995 | { |
1996 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
ba825241 | 1997 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1998 | return ptr; |
1999 | } | |
2000 | ||
2001 | static unw_rec_list * | |
5a49b8ac | 2002 | output_lc_sprel (unsigned int offset) |
800eeca4 JW |
2003 | { |
2004 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
ba825241 | 2005 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2006 | return ptr; |
2007 | } | |
2008 | ||
2009 | static unw_rec_list * | |
5a49b8ac | 2010 | output_fpsr_when (void) |
800eeca4 JW |
2011 | { |
2012 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2013 | return ptr; | |
2014 | } | |
2015 | ||
2016 | static unw_rec_list * | |
5a49b8ac | 2017 | output_fpsr_gr (unsigned int gr) |
800eeca4 JW |
2018 | { |
2019 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
ba825241 | 2020 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2021 | return ptr; |
2022 | } | |
2023 | ||
2024 | static unw_rec_list * | |
5a49b8ac | 2025 | output_fpsr_psprel (unsigned int offset) |
800eeca4 JW |
2026 | { |
2027 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
ba825241 | 2028 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2029 | return ptr; |
2030 | } | |
2031 | ||
2032 | static unw_rec_list * | |
5a49b8ac | 2033 | output_fpsr_sprel (unsigned int offset) |
800eeca4 JW |
2034 | { |
2035 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
ba825241 | 2036 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2037 | return ptr; |
2038 | } | |
2039 | ||
2040 | static unw_rec_list * | |
5a49b8ac | 2041 | output_priunat_when_gr (void) |
800eeca4 JW |
2042 | { |
2043 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2044 | return ptr; | |
2045 | } | |
2046 | ||
2047 | static unw_rec_list * | |
5a49b8ac | 2048 | output_priunat_when_mem (void) |
800eeca4 JW |
2049 | { |
2050 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2051 | return ptr; | |
2052 | } | |
2053 | ||
2054 | static unw_rec_list * | |
5a49b8ac | 2055 | output_priunat_gr (unsigned int gr) |
800eeca4 JW |
2056 | { |
2057 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
ba825241 | 2058 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2059 | return ptr; |
2060 | } | |
2061 | ||
2062 | static unw_rec_list * | |
5a49b8ac | 2063 | output_priunat_psprel (unsigned int offset) |
800eeca4 JW |
2064 | { |
2065 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
ba825241 | 2066 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2067 | return ptr; |
2068 | } | |
2069 | ||
2070 | static unw_rec_list * | |
5a49b8ac | 2071 | output_priunat_sprel (unsigned int offset) |
800eeca4 JW |
2072 | { |
2073 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
ba825241 | 2074 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2075 | return ptr; |
2076 | } | |
2077 | ||
2078 | static unw_rec_list * | |
5a49b8ac | 2079 | output_bsp_when (void) |
800eeca4 JW |
2080 | { |
2081 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2082 | return ptr; | |
2083 | } | |
2084 | ||
2085 | static unw_rec_list * | |
5a49b8ac | 2086 | output_bsp_gr (unsigned int gr) |
800eeca4 JW |
2087 | { |
2088 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
ba825241 | 2089 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2090 | return ptr; |
2091 | } | |
2092 | ||
2093 | static unw_rec_list * | |
5a49b8ac | 2094 | output_bsp_psprel (unsigned int offset) |
800eeca4 JW |
2095 | { |
2096 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
ba825241 | 2097 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2098 | return ptr; |
2099 | } | |
2100 | ||
2101 | static unw_rec_list * | |
5a49b8ac | 2102 | output_bsp_sprel (unsigned int offset) |
800eeca4 JW |
2103 | { |
2104 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
ba825241 | 2105 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2106 | return ptr; |
2107 | } | |
2108 | ||
2109 | static unw_rec_list * | |
5a49b8ac | 2110 | output_bspstore_when (void) |
800eeca4 JW |
2111 | { |
2112 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2113 | return ptr; | |
2114 | } | |
2115 | ||
2116 | static unw_rec_list * | |
5a49b8ac | 2117 | output_bspstore_gr (unsigned int gr) |
800eeca4 JW |
2118 | { |
2119 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
ba825241 | 2120 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2121 | return ptr; |
2122 | } | |
2123 | ||
2124 | static unw_rec_list * | |
5a49b8ac | 2125 | output_bspstore_psprel (unsigned int offset) |
800eeca4 JW |
2126 | { |
2127 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
ba825241 | 2128 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2129 | return ptr; |
2130 | } | |
2131 | ||
2132 | static unw_rec_list * | |
5a49b8ac | 2133 | output_bspstore_sprel (unsigned int offset) |
800eeca4 JW |
2134 | { |
2135 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
ba825241 | 2136 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2137 | return ptr; |
2138 | } | |
2139 | ||
2140 | static unw_rec_list * | |
5a49b8ac | 2141 | output_rnat_when (void) |
800eeca4 JW |
2142 | { |
2143 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2144 | return ptr; | |
2145 | } | |
2146 | ||
2147 | static unw_rec_list * | |
5a49b8ac | 2148 | output_rnat_gr (unsigned int gr) |
800eeca4 JW |
2149 | { |
2150 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
ba825241 | 2151 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2152 | return ptr; |
2153 | } | |
2154 | ||
2155 | static unw_rec_list * | |
5a49b8ac | 2156 | output_rnat_psprel (unsigned int offset) |
800eeca4 JW |
2157 | { |
2158 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
ba825241 | 2159 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2160 | return ptr; |
2161 | } | |
2162 | ||
2163 | static unw_rec_list * | |
5a49b8ac | 2164 | output_rnat_sprel (unsigned int offset) |
800eeca4 JW |
2165 | { |
2166 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
ba825241 | 2167 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2168 | return ptr; |
2169 | } | |
2170 | ||
2171 | static unw_rec_list * | |
5a49b8ac | 2172 | output_unwabi (unsigned long abi, unsigned long context) |
800eeca4 | 2173 | { |
e0c9811a JW |
2174 | unw_rec_list *ptr = alloc_record (unwabi); |
2175 | ptr->r.record.p.abi = abi; | |
2176 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2177 | return ptr; |
2178 | } | |
2179 | ||
2180 | static unw_rec_list * | |
e0c9811a | 2181 | output_epilogue (unsigned long ecount) |
800eeca4 | 2182 | { |
e0c9811a JW |
2183 | unw_rec_list *ptr = alloc_record (epilogue); |
2184 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2185 | return ptr; |
2186 | } | |
2187 | ||
2188 | static unw_rec_list * | |
e0c9811a | 2189 | output_label_state (unsigned long label) |
800eeca4 | 2190 | { |
e0c9811a JW |
2191 | unw_rec_list *ptr = alloc_record (label_state); |
2192 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2193 | return ptr; |
2194 | } | |
2195 | ||
2196 | static unw_rec_list * | |
e0c9811a JW |
2197 | output_copy_state (unsigned long label) |
2198 | { | |
2199 | unw_rec_list *ptr = alloc_record (copy_state); | |
2200 | ptr->r.record.b.label = label; | |
2201 | return ptr; | |
2202 | } | |
2203 | ||
2204 | static unw_rec_list * | |
5a49b8ac AM |
2205 | output_spill_psprel (unsigned int ab, |
2206 | unsigned int reg, | |
2207 | unsigned int offset, | |
2208 | unsigned int predicate) | |
800eeca4 | 2209 | { |
e4e8248d | 2210 | unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); |
e0c9811a | 2211 | ptr->r.record.x.ab = ab; |
800eeca4 | 2212 | ptr->r.record.x.reg = reg; |
ba825241 | 2213 | ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2214 | ptr->r.record.x.qp = predicate; |
2215 | return ptr; | |
2216 | } | |
2217 | ||
2218 | static unw_rec_list * | |
5a49b8ac AM |
2219 | output_spill_sprel (unsigned int ab, |
2220 | unsigned int reg, | |
2221 | unsigned int offset, | |
2222 | unsigned int predicate) | |
800eeca4 | 2223 | { |
e4e8248d | 2224 | unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); |
e0c9811a | 2225 | ptr->r.record.x.ab = ab; |
800eeca4 | 2226 | ptr->r.record.x.reg = reg; |
ba825241 | 2227 | ptr->r.record.x.where.spoff = offset / 4; |
800eeca4 JW |
2228 | ptr->r.record.x.qp = predicate; |
2229 | return ptr; | |
2230 | } | |
2231 | ||
2232 | static unw_rec_list * | |
5a49b8ac AM |
2233 | output_spill_reg (unsigned int ab, |
2234 | unsigned int reg, | |
2235 | unsigned int targ_reg, | |
2236 | unsigned int xy, | |
2237 | unsigned int predicate) | |
800eeca4 | 2238 | { |
e4e8248d | 2239 | unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); |
e0c9811a | 2240 | ptr->r.record.x.ab = ab; |
800eeca4 | 2241 | ptr->r.record.x.reg = reg; |
ba825241 | 2242 | ptr->r.record.x.where.reg = targ_reg; |
800eeca4 JW |
2243 | ptr->r.record.x.xy = xy; |
2244 | ptr->r.record.x.qp = predicate; | |
2245 | return ptr; | |
2246 | } | |
2247 | ||
197865e8 | 2248 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2249 | specified function. */ |
542d6675 | 2250 | |
800eeca4 | 2251 | static void |
5a49b8ac | 2252 | process_one_record (unw_rec_list *ptr, vbyte_func f) |
800eeca4 | 2253 | { |
ba825241 | 2254 | unsigned int fr_mask, gr_mask; |
e0c9811a | 2255 | |
197865e8 | 2256 | switch (ptr->r.type) |
800eeca4 | 2257 | { |
5738bc24 JW |
2258 | /* This is a dummy record that takes up no space in the output. */ |
2259 | case endp: | |
2260 | break; | |
2261 | ||
542d6675 KH |
2262 | case gr_mem: |
2263 | case fr_mem: | |
2264 | case br_mem: | |
2265 | case frgr_mem: | |
2266 | /* These are taken care of by prologue/prologue_gr. */ | |
2267 | break; | |
e0c9811a | 2268 | |
542d6675 KH |
2269 | case prologue_gr: |
2270 | case prologue: | |
2271 | if (ptr->r.type == prologue_gr) | |
2272 | output_R2_format (f, ptr->r.record.r.grmask, | |
2273 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2274 | else | |
800eeca4 | 2275 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2276 | |
2277 | /* Output descriptor(s) for union of register spills (if any). */ | |
2278 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2279 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2280 | if (fr_mask) | |
2281 | { | |
2282 | if ((fr_mask & ~0xfUL) == 0) | |
2283 | output_P6_format (f, fr_mem, fr_mask); | |
2284 | else | |
2285 | { | |
2286 | output_P5_format (f, gr_mask, fr_mask); | |
2287 | gr_mask = 0; | |
2288 | } | |
2289 | } | |
2290 | if (gr_mask) | |
2291 | output_P6_format (f, gr_mem, gr_mask); | |
2292 | if (ptr->r.record.r.mask.br_mem) | |
2293 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2294 | ||
2295 | /* output imask descriptor if necessary: */ | |
2296 | if (ptr->r.record.r.mask.i) | |
2297 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2298 | ptr->r.record.r.imask_size); | |
2299 | break; | |
2300 | ||
2301 | case body: | |
2302 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2303 | break; | |
2304 | case mem_stack_f: | |
2305 | case mem_stack_v: | |
2306 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2307 | ptr->r.record.p.size); | |
2308 | break; | |
2309 | case psp_gr: | |
2310 | case rp_gr: | |
2311 | case pfs_gr: | |
2312 | case preds_gr: | |
2313 | case unat_gr: | |
2314 | case lc_gr: | |
2315 | case fpsr_gr: | |
2316 | case priunat_gr: | |
2317 | case bsp_gr: | |
2318 | case bspstore_gr: | |
2319 | case rnat_gr: | |
ba825241 | 2320 | output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); |
542d6675 KH |
2321 | break; |
2322 | case rp_br: | |
ba825241 | 2323 | output_P3_format (f, rp_br, ptr->r.record.p.r.br); |
542d6675 KH |
2324 | break; |
2325 | case psp_sprel: | |
ba825241 | 2326 | output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); |
542d6675 KH |
2327 | break; |
2328 | case rp_when: | |
2329 | case pfs_when: | |
2330 | case preds_when: | |
2331 | case unat_when: | |
2332 | case lc_when: | |
2333 | case fpsr_when: | |
2334 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2335 | break; | |
2336 | case rp_psprel: | |
2337 | case pfs_psprel: | |
2338 | case preds_psprel: | |
2339 | case unat_psprel: | |
2340 | case lc_psprel: | |
2341 | case fpsr_psprel: | |
2342 | case spill_base: | |
ba825241 | 2343 | output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); |
542d6675 KH |
2344 | break; |
2345 | case rp_sprel: | |
2346 | case pfs_sprel: | |
2347 | case preds_sprel: | |
2348 | case unat_sprel: | |
2349 | case lc_sprel: | |
2350 | case fpsr_sprel: | |
2351 | case priunat_sprel: | |
2352 | case bsp_sprel: | |
2353 | case bspstore_sprel: | |
2354 | case rnat_sprel: | |
ba825241 | 2355 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); |
542d6675 KH |
2356 | break; |
2357 | case gr_gr: | |
ba825241 JB |
2358 | if (ptr->r.record.p.r.gr < REG_NUM) |
2359 | { | |
2360 | const unw_rec_list *cur = ptr; | |
2361 | ||
2362 | gr_mask = cur->r.record.p.grmask; | |
2363 | while ((cur = cur->r.record.p.next) != NULL) | |
2364 | gr_mask |= cur->r.record.p.grmask; | |
2365 | output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2366 | } | |
542d6675 KH |
2367 | break; |
2368 | case br_gr: | |
ba825241 JB |
2369 | if (ptr->r.record.p.r.gr < REG_NUM) |
2370 | { | |
2371 | const unw_rec_list *cur = ptr; | |
2372 | ||
2373 | gr_mask = cur->r.record.p.brmask; | |
2374 | while ((cur = cur->r.record.p.next) != NULL) | |
2375 | gr_mask |= cur->r.record.p.brmask; | |
2376 | output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2377 | } | |
542d6675 KH |
2378 | break; |
2379 | case spill_mask: | |
ad4b42b4 | 2380 | as_bad (_("spill_mask record unimplemented.")); |
542d6675 KH |
2381 | break; |
2382 | case priunat_when_gr: | |
2383 | case priunat_when_mem: | |
2384 | case bsp_when: | |
2385 | case bspstore_when: | |
2386 | case rnat_when: | |
2387 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2388 | break; | |
2389 | case priunat_psprel: | |
2390 | case bsp_psprel: | |
2391 | case bspstore_psprel: | |
2392 | case rnat_psprel: | |
ba825241 | 2393 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); |
542d6675 KH |
2394 | break; |
2395 | case unwabi: | |
2396 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2397 | break; | |
2398 | case epilogue: | |
2399 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2400 | break; | |
2401 | case label_state: | |
2402 | case copy_state: | |
2403 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2404 | break; | |
2405 | case spill_psprel: | |
2406 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2407 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2408 | ptr->r.record.x.where.pspoff); |
542d6675 KH |
2409 | break; |
2410 | case spill_sprel: | |
2411 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2412 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2413 | ptr->r.record.x.where.spoff); |
542d6675 KH |
2414 | break; |
2415 | case spill_reg: | |
2416 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2417 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
ba825241 | 2418 | ptr->r.record.x.where.reg, ptr->r.record.x.t); |
542d6675 KH |
2419 | break; |
2420 | case spill_psprel_p: | |
2421 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2422 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2423 | ptr->r.record.x.t, ptr->r.record.x.where.pspoff); |
542d6675 KH |
2424 | break; |
2425 | case spill_sprel_p: | |
2426 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2427 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2428 | ptr->r.record.x.t, ptr->r.record.x.where.spoff); |
542d6675 KH |
2429 | break; |
2430 | case spill_reg_p: | |
2431 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2432 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
ba825241 | 2433 | ptr->r.record.x.xy, ptr->r.record.x.where.reg, |
542d6675 KH |
2434 | ptr->r.record.x.t); |
2435 | break; | |
2436 | default: | |
ad4b42b4 | 2437 | as_bad (_("record_type_not_valid")); |
542d6675 | 2438 | break; |
800eeca4 JW |
2439 | } |
2440 | } | |
2441 | ||
197865e8 | 2442 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2443 | the specified function. */ |
2444 | static void | |
5a49b8ac | 2445 | process_unw_records (unw_rec_list *list, vbyte_func f) |
800eeca4 JW |
2446 | { |
2447 | unw_rec_list *ptr; | |
2448 | for (ptr = list; ptr; ptr = ptr->next) | |
2449 | process_one_record (ptr, f); | |
2450 | } | |
2451 | ||
2452 | /* Determine the size of a record list in bytes. */ | |
2453 | static int | |
5a49b8ac | 2454 | calc_record_size (unw_rec_list *list) |
800eeca4 JW |
2455 | { |
2456 | vbyte_count = 0; | |
2457 | process_unw_records (list, count_output); | |
2458 | return vbyte_count; | |
2459 | } | |
2460 | ||
e4e8248d JB |
2461 | /* Return the number of bits set in the input value. |
2462 | Perhaps this has a better place... */ | |
2463 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) | |
2464 | # define popcount __builtin_popcount | |
2465 | #else | |
2466 | static int | |
2467 | popcount (unsigned x) | |
2468 | { | |
2469 | static const unsigned char popcnt[16] = | |
2470 | { | |
2471 | 0, 1, 1, 2, | |
2472 | 1, 2, 2, 3, | |
2473 | 1, 2, 2, 3, | |
2474 | 2, 3, 3, 4 | |
2475 | }; | |
2476 | ||
2477 | if (x < NELEMS (popcnt)) | |
2478 | return popcnt[x]; | |
2479 | return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); | |
2480 | } | |
2481 | #endif | |
2482 | ||
e0c9811a JW |
2483 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2484 | of type TYPE are saved starting at instruction with index T. If N | |
2485 | bits are set in REGMASK, it is assumed that instructions T through | |
2486 | T+N-1 save these registers. | |
2487 | ||
2488 | TYPE values: | |
2489 | 0: no save | |
2490 | 1: instruction saves next fp reg | |
2491 | 2: instruction saves next general reg | |
2492 | 3: instruction saves next branch reg */ | |
2493 | static void | |
5a49b8ac AM |
2494 | set_imask (unw_rec_list *region, |
2495 | unsigned long regmask, | |
2496 | unsigned long t, | |
2497 | unsigned int type) | |
e0c9811a JW |
2498 | { |
2499 | unsigned char *imask; | |
2500 | unsigned long imask_size; | |
2501 | unsigned int i; | |
2502 | int pos; | |
2503 | ||
2504 | imask = region->r.record.r.mask.i; | |
2505 | imask_size = region->r.record.r.imask_size; | |
2506 | if (!imask) | |
2507 | { | |
542d6675 | 2508 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2509 | imask = xmalloc (imask_size); |
2510 | memset (imask, 0, imask_size); | |
2511 | ||
2512 | region->r.record.r.imask_size = imask_size; | |
2513 | region->r.record.r.mask.i = imask; | |
2514 | } | |
2515 | ||
542d6675 KH |
2516 | i = (t / 4) + 1; |
2517 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2518 | while (regmask) |
2519 | { | |
2520 | if (i >= imask_size) | |
2521 | { | |
ad4b42b4 | 2522 | as_bad (_("Ignoring attempt to spill beyond end of region")); |
e0c9811a JW |
2523 | return; |
2524 | } | |
2525 | ||
2526 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2527 | |
e0c9811a JW |
2528 | regmask &= (regmask - 1); |
2529 | pos -= 2; | |
2530 | if (pos < 0) | |
2531 | { | |
2532 | pos = 0; | |
2533 | ++i; | |
2534 | } | |
2535 | } | |
2536 | } | |
2537 | ||
f5a30c2e JW |
2538 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2539 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2540 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2541 | for frag sizes. */ | |
f5a30c2e | 2542 | |
5a49b8ac AM |
2543 | static unsigned long |
2544 | slot_index (unsigned long slot_addr, | |
2545 | fragS *slot_frag, | |
2546 | unsigned long first_addr, | |
2547 | fragS *first_frag, | |
2548 | int before_relax) | |
e0c9811a | 2549 | { |
f5a30c2e JW |
2550 | unsigned long index = 0; |
2551 | ||
2552 | /* First time we are called, the initial address and frag are invalid. */ | |
2553 | if (first_addr == 0) | |
2554 | return 0; | |
2555 | ||
2556 | /* If the two addresses are in different frags, then we need to add in | |
2557 | the remaining size of this frag, and then the entire size of intermediate | |
2558 | frags. */ | |
4dddc1d1 | 2559 | while (slot_frag != first_frag) |
f5a30c2e JW |
2560 | { |
2561 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2562 | ||
b5e0fabd | 2563 | if (! before_relax) |
73f20958 | 2564 | { |
b5e0fabd JW |
2565 | /* We can get the final addresses only during and after |
2566 | relaxation. */ | |
73f20958 L |
2567 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2568 | index += 3 * ((first_frag->fr_next->fr_address | |
2569 | - first_frag->fr_address | |
2570 | - first_frag->fr_fix) >> 4); | |
2571 | } | |
2572 | else | |
2573 | /* We don't know what the final addresses will be. We try our | |
2574 | best to estimate. */ | |
2575 | switch (first_frag->fr_type) | |
2576 | { | |
2577 | default: | |
2578 | break; | |
2579 | ||
2580 | case rs_space: | |
ad4b42b4 | 2581 | as_fatal (_("Only constant space allocation is supported")); |
73f20958 L |
2582 | break; |
2583 | ||
2584 | case rs_align: | |
2585 | case rs_align_code: | |
2586 | case rs_align_test: | |
2587 | /* Take alignment into account. Assume the worst case | |
2588 | before relaxation. */ | |
2589 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2590 | break; | |
2591 | ||
2592 | case rs_org: | |
2593 | if (first_frag->fr_symbol) | |
2594 | { | |
ad4b42b4 | 2595 | as_fatal (_("Only constant offsets are supported")); |
73f20958 L |
2596 | break; |
2597 | } | |
2598 | case rs_fill: | |
2599 | index += 3 * (first_frag->fr_offset >> 4); | |
2600 | break; | |
2601 | } | |
2602 | ||
f5a30c2e JW |
2603 | /* Add in the full size of the frag converted to instruction slots. */ |
2604 | index += 3 * (first_frag->fr_fix >> 4); | |
2605 | /* Subtract away the initial part before first_addr. */ | |
2606 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2607 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2608 | |
f5a30c2e JW |
2609 | /* Move to the beginning of the next frag. */ |
2610 | first_frag = first_frag->fr_next; | |
2611 | first_addr = (unsigned long) &first_frag->fr_literal; | |
4dddc1d1 JW |
2612 | |
2613 | /* This can happen if there is section switching in the middle of a | |
cb3b8d91 JW |
2614 | function, causing the frag chain for the function to be broken. |
2615 | It is too difficult to recover safely from this problem, so we just | |
2616 | exit with an error. */ | |
4dddc1d1 | 2617 | if (first_frag == NULL) |
ad4b42b4 | 2618 | as_fatal (_("Section switching in code is not supported.")); |
f5a30c2e JW |
2619 | } |
2620 | ||
2621 | /* Add in the used part of the last frag. */ | |
2622 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2623 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2624 | return index; | |
2625 | } | |
4a1805b1 | 2626 | |
91a2ae2a RH |
2627 | /* Optimize unwind record directives. */ |
2628 | ||
2629 | static unw_rec_list * | |
5a49b8ac | 2630 | optimize_unw_records (unw_rec_list *list) |
91a2ae2a RH |
2631 | { |
2632 | if (!list) | |
2633 | return NULL; | |
2634 | ||
2635 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2636 | by ".body", then we can optimize the unwind directives away. */ | |
2637 | if (list->r.type == prologue | |
5738bc24 JW |
2638 | && (list->next->r.type == endp |
2639 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2640 | return NULL; |
2641 | ||
2642 | return list; | |
2643 | } | |
2644 | ||
800eeca4 JW |
2645 | /* Given a complete record list, process any records which have |
2646 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2647 | this has been run, all necessary information should be available |
800eeca4 | 2648 | within each record to generate an image. */ |
542d6675 | 2649 | |
800eeca4 | 2650 | static void |
5a49b8ac | 2651 | fixup_unw_records (unw_rec_list *list, int before_relax) |
800eeca4 | 2652 | { |
e0c9811a JW |
2653 | unw_rec_list *ptr, *region = 0; |
2654 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2655 | fragS *first_frag = 0; |
e0c9811a | 2656 | |
800eeca4 JW |
2657 | for (ptr = list; ptr; ptr = ptr->next) |
2658 | { | |
2659 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
ad4b42b4 | 2660 | as_bad (_(" Insn slot not set in unwind record.")); |
f5a30c2e | 2661 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2662 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2663 | switch (ptr->r.type) |
2664 | { | |
542d6675 KH |
2665 | case prologue: |
2666 | case prologue_gr: | |
2667 | case body: | |
2668 | { | |
2669 | unw_rec_list *last; | |
5738bc24 JW |
2670 | int size; |
2671 | unsigned long last_addr = 0; | |
2672 | fragS *last_frag = NULL; | |
542d6675 KH |
2673 | |
2674 | first_addr = ptr->slot_number; | |
f5a30c2e | 2675 | first_frag = ptr->slot_frag; |
542d6675 | 2676 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2677 | the function, and determine the size of the region. */ |
542d6675 KH |
2678 | for (last = ptr->next; last != NULL; last = last->next) |
2679 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2680 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2681 | { |
2682 | last_addr = last->slot_number; | |
f5a30c2e | 2683 | last_frag = last->slot_frag; |
542d6675 KH |
2684 | break; |
2685 | } | |
b5e0fabd JW |
2686 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2687 | before_relax); | |
542d6675 | 2688 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2689 | if (ptr->r.type == body) |
2690 | /* End of region. */ | |
2691 | region = 0; | |
2692 | else | |
2693 | region = ptr; | |
e0c9811a | 2694 | break; |
542d6675 KH |
2695 | } |
2696 | case epilogue: | |
ed7af9f9 L |
2697 | if (t < rlen) |
2698 | ptr->r.record.b.t = rlen - 1 - t; | |
2699 | else | |
2700 | /* This happens when a memory-stack-less procedure uses a | |
2701 | ".restore sp" directive at the end of a region to pop | |
2702 | the frame state. */ | |
2703 | ptr->r.record.b.t = 0; | |
542d6675 | 2704 | break; |
e0c9811a | 2705 | |
542d6675 KH |
2706 | case mem_stack_f: |
2707 | case mem_stack_v: | |
2708 | case rp_when: | |
2709 | case pfs_when: | |
2710 | case preds_when: | |
2711 | case unat_when: | |
2712 | case lc_when: | |
2713 | case fpsr_when: | |
2714 | case priunat_when_gr: | |
2715 | case priunat_when_mem: | |
2716 | case bsp_when: | |
2717 | case bspstore_when: | |
2718 | case rnat_when: | |
2719 | ptr->r.record.p.t = t; | |
2720 | break; | |
e0c9811a | 2721 | |
542d6675 KH |
2722 | case spill_reg: |
2723 | case spill_sprel: | |
2724 | case spill_psprel: | |
2725 | case spill_reg_p: | |
2726 | case spill_sprel_p: | |
2727 | case spill_psprel_p: | |
2728 | ptr->r.record.x.t = t; | |
2729 | break; | |
e0c9811a | 2730 | |
542d6675 KH |
2731 | case frgr_mem: |
2732 | if (!region) | |
2733 | { | |
ad4b42b4 | 2734 | as_bad (_("frgr_mem record before region record!")); |
542d6675 KH |
2735 | return; |
2736 | } | |
2737 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2738 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2739 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2740 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2741 | break; | |
2742 | case fr_mem: | |
2743 | if (!region) | |
2744 | { | |
ad4b42b4 | 2745 | as_bad (_("fr_mem record before region record!")); |
542d6675 KH |
2746 | return; |
2747 | } | |
ba825241 JB |
2748 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; |
2749 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
542d6675 KH |
2750 | break; |
2751 | case gr_mem: | |
2752 | if (!region) | |
2753 | { | |
ad4b42b4 | 2754 | as_bad (_("gr_mem record before region record!")); |
542d6675 KH |
2755 | return; |
2756 | } | |
ba825241 JB |
2757 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; |
2758 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
542d6675 KH |
2759 | break; |
2760 | case br_mem: | |
2761 | if (!region) | |
2762 | { | |
ad4b42b4 | 2763 | as_bad (_("br_mem record before region record!")); |
542d6675 KH |
2764 | return; |
2765 | } | |
2766 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2767 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2768 | break; | |
e0c9811a | 2769 | |
542d6675 KH |
2770 | case gr_gr: |
2771 | if (!region) | |
2772 | { | |
ad4b42b4 | 2773 | as_bad (_("gr_gr record before region record!")); |
542d6675 KH |
2774 | return; |
2775 | } | |
2776 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2777 | break; | |
2778 | case br_gr: | |
2779 | if (!region) | |
2780 | { | |
ad4b42b4 | 2781 | as_bad (_("br_gr record before region record!")); |
542d6675 KH |
2782 | return; |
2783 | } | |
2784 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2785 | break; | |
e0c9811a | 2786 | |
542d6675 KH |
2787 | default: |
2788 | break; | |
800eeca4 JW |
2789 | } |
2790 | } | |
2791 | } | |
2792 | ||
b5e0fabd JW |
2793 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2794 | to handle here, which is the unwind info frag. */ | |
2795 | ||
2796 | int | |
2797 | ia64_estimate_size_before_relax (fragS *frag, | |
2798 | asection *segtype ATTRIBUTE_UNUSED) | |
2799 | { | |
2800 | unw_rec_list *list; | |
2801 | int len, size, pad; | |
2802 | ||
2803 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2804 | list = (unw_rec_list *) frag->fr_opcode; | |
2805 | fixup_unw_records (list, 0); | |
2806 | ||
2807 | len = calc_record_size (list); | |
2808 | /* pad to pointer-size boundary. */ | |
2809 | pad = len % md.pointer_size; | |
2810 | if (pad != 0) | |
2811 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2812 | /* Add 8 for the header. */ |
2813 | size = len + 8; | |
2814 | /* Add a pointer for the personality offset. */ | |
2815 | if (frag->fr_offset) | |
2816 | size += md.pointer_size; | |
b5e0fabd JW |
2817 | |
2818 | /* fr_var carries the max_chars that we created the fragment with. | |
2819 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2820 | gas_assert (frag->fr_var >= size); |
b5e0fabd JW |
2821 | |
2822 | return frag->fr_fix + size; | |
2823 | } | |
2824 | ||
73f20958 L |
2825 | /* This function converts a rs_machine_dependent variant frag into a |
2826 | normal fill frag with the unwind image from the the record list. */ | |
2827 | void | |
2828 | ia64_convert_frag (fragS *frag) | |
557debba | 2829 | { |
73f20958 L |
2830 | unw_rec_list *list; |
2831 | int len, size, pad; | |
1cd8ff38 | 2832 | valueT flag_value; |
557debba | 2833 | |
b5e0fabd | 2834 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2835 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2836 | fixup_unw_records (list, 0); |
1cd8ff38 | 2837 | |
73f20958 L |
2838 | len = calc_record_size (list); |
2839 | /* pad to pointer-size boundary. */ | |
2840 | pad = len % md.pointer_size; | |
2841 | if (pad != 0) | |
2842 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2843 | /* Add 8 for the header. */ |
2844 | size = len + 8; | |
2845 | /* Add a pointer for the personality offset. */ | |
2846 | if (frag->fr_offset) | |
2847 | size += md.pointer_size; | |
73f20958 L |
2848 | |
2849 | /* fr_var carries the max_chars that we created the fragment with. | |
2850 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2851 | gas_assert (frag->fr_var >= size); |
73f20958 L |
2852 | |
2853 | /* Initialize the header area. fr_offset is initialized with | |
2854 | unwind.personality_routine. */ | |
2855 | if (frag->fr_offset) | |
1cd8ff38 NC |
2856 | { |
2857 | if (md.flags & EF_IA_64_ABI64) | |
2858 | flag_value = (bfd_vma) 3 << 32; | |
2859 | else | |
2860 | /* 32-bit unwind info block. */ | |
2861 | flag_value = (bfd_vma) 0x1003 << 32; | |
2862 | } | |
2863 | else | |
2864 | flag_value = 0; | |
557debba | 2865 | |
73f20958 L |
2866 | md_number_to_chars (frag->fr_literal, |
2867 | (((bfd_vma) 1 << 48) /* Version. */ | |
2868 | | flag_value /* U & E handler flags. */ | |
2869 | | (len / md.pointer_size)), /* Length. */ | |
2870 | 8); | |
557debba | 2871 | |
73f20958 L |
2872 | /* Skip the header. */ |
2873 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2874 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2875 | |
2876 | /* Fill the padding bytes with zeros. */ | |
2877 | if (pad != 0) | |
2878 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2879 | md.pointer_size - pad); | |
417c21b7 AO |
2880 | /* Fill the unwind personality with zeros. */ |
2881 | if (frag->fr_offset) | |
2882 | md_number_to_chars (frag->fr_literal + size - md.pointer_size, 0, | |
2883 | md.pointer_size); | |
d6e78c11 | 2884 | |
73f20958 L |
2885 | frag->fr_fix += size; |
2886 | frag->fr_type = rs_fill; | |
2887 | frag->fr_var = 0; | |
2888 | frag->fr_offset = 0; | |
800eeca4 JW |
2889 | } |
2890 | ||
e0c9811a | 2891 | static int |
5a49b8ac | 2892 | parse_predicate_and_operand (expressionS *e, unsigned *qp, const char *po) |
e4e8248d | 2893 | { |
cd42ff9c | 2894 | int sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
2895 | |
2896 | *qp = e->X_add_number - REG_P; | |
2897 | if (e->X_op != O_register || *qp > 63) | |
2898 | { | |
ad4b42b4 | 2899 | as_bad (_("First operand to .%s must be a predicate"), po); |
e4e8248d JB |
2900 | *qp = 0; |
2901 | } | |
2902 | else if (*qp == 0) | |
ad4b42b4 | 2903 | as_warn (_("Pointless use of p0 as first operand to .%s"), po); |
e4e8248d | 2904 | if (sep == ',') |
cd42ff9c | 2905 | sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
2906 | else |
2907 | e->X_op = O_absent; | |
2908 | return sep; | |
2909 | } | |
2910 | ||
2911 | static void | |
5a49b8ac AM |
2912 | convert_expr_to_ab_reg (const expressionS *e, |
2913 | unsigned int *ab, | |
2914 | unsigned int *regp, | |
2915 | const char *po, | |
2916 | int n) | |
e0c9811a | 2917 | { |
e4e8248d JB |
2918 | unsigned int reg = e->X_add_number; |
2919 | ||
2920 | *ab = *regp = 0; /* Anything valid is good here. */ | |
e0c9811a JW |
2921 | |
2922 | if (e->X_op != O_register) | |
e4e8248d | 2923 | reg = REG_GR; /* Anything invalid is good here. */ |
e0c9811a | 2924 | |
2434f565 | 2925 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2926 | { |
2927 | *ab = 0; | |
2928 | *regp = reg - REG_GR; | |
2929 | } | |
2434f565 JW |
2930 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2931 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2932 | { |
2933 | *ab = 1; | |
2934 | *regp = reg - REG_FR; | |
2935 | } | |
2434f565 | 2936 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2937 | { |
2938 | *ab = 2; | |
2939 | *regp = reg - REG_BR; | |
2940 | } | |
2941 | else | |
2942 | { | |
2943 | *ab = 3; | |
2944 | switch (reg) | |
2945 | { | |
2946 | case REG_PR: *regp = 0; break; | |
2947 | case REG_PSP: *regp = 1; break; | |
2948 | case REG_PRIUNAT: *regp = 2; break; | |
2949 | case REG_BR + 0: *regp = 3; break; | |
2950 | case REG_AR + AR_BSP: *regp = 4; break; | |
2951 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2952 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2953 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2954 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2955 | case REG_AR + AR_PFS: *regp = 9; break; | |
2956 | case REG_AR + AR_LC: *regp = 10; break; | |
2957 | ||
2958 | default: | |
ad4b42b4 | 2959 | as_bad (_("Operand %d to .%s must be a preserved register"), n, po); |
e4e8248d | 2960 | break; |
e0c9811a JW |
2961 | } |
2962 | } | |
197865e8 | 2963 | } |
e0c9811a | 2964 | |
e4e8248d | 2965 | static void |
5a49b8ac AM |
2966 | convert_expr_to_xy_reg (const expressionS *e, |
2967 | unsigned int *xy, | |
2968 | unsigned int *regp, | |
2969 | const char *po, | |
2970 | int n) | |
e0c9811a | 2971 | { |
e4e8248d | 2972 | unsigned int reg = e->X_add_number; |
e0c9811a | 2973 | |
e4e8248d | 2974 | *xy = *regp = 0; /* Anything valid is good here. */ |
e0c9811a | 2975 | |
e4e8248d JB |
2976 | if (e->X_op != O_register) |
2977 | reg = REG_GR; /* Anything invalid is good here. */ | |
e0c9811a | 2978 | |
e4e8248d | 2979 | if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) |
e0c9811a JW |
2980 | { |
2981 | *xy = 0; | |
2982 | *regp = reg - REG_GR; | |
2983 | } | |
e4e8248d | 2984 | else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) |
e0c9811a JW |
2985 | { |
2986 | *xy = 1; | |
2987 | *regp = reg - REG_FR; | |
2988 | } | |
2434f565 | 2989 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
2990 | { |
2991 | *xy = 2; | |
2992 | *regp = reg - REG_BR; | |
2993 | } | |
2994 | else | |
ad4b42b4 | 2995 | as_bad (_("Operand %d to .%s must be a writable register"), n, po); |
197865e8 | 2996 | } |
e0c9811a | 2997 | |
d9201763 L |
2998 | static void |
2999 | dot_align (int arg) | |
3000 | { | |
3001 | /* The current frag is an alignment frag. */ | |
3002 | align_frag = frag_now; | |
3003 | s_align_bytes (arg); | |
3004 | } | |
3005 | ||
800eeca4 | 3006 | static void |
5a49b8ac | 3007 | dot_radix (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3008 | { |
fa30c84f JB |
3009 | char *radix; |
3010 | int ch; | |
800eeca4 JW |
3011 | |
3012 | SKIP_WHITESPACE (); | |
800eeca4 | 3013 | |
fa30c84f JB |
3014 | if (is_it_end_of_statement ()) |
3015 | return; | |
3016 | radix = input_line_pointer; | |
3017 | ch = get_symbol_end (); | |
3018 | ia64_canonicalize_symbol_name (radix); | |
3019 | if (strcasecmp (radix, "C")) | |
ad4b42b4 | 3020 | as_bad (_("Radix `%s' unsupported or invalid"), radix); |
fa30c84f JB |
3021 | *input_line_pointer = ch; |
3022 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3023 | } |
3024 | ||
196e8040 JW |
3025 | /* Helper function for .loc directives. If the assembler is not generating |
3026 | line number info, then we need to remember which instructions have a .loc | |
3027 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3028 | ||
3029 | static void | |
3030 | dot_loc (int x) | |
3031 | { | |
3032 | CURR_SLOT.loc_directive_seen = 1; | |
3033 | dwarf2_directive_loc (x); | |
3034 | } | |
3035 | ||
800eeca4 JW |
3036 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3037 | static void | |
5a49b8ac | 3038 | dot_special_section (int which) |
800eeca4 JW |
3039 | { |
3040 | set_section ((char *) special_section_name[which]); | |
3041 | } | |
3042 | ||
07450571 L |
3043 | /* Return -1 for warning and 0 for error. */ |
3044 | ||
3045 | static int | |
970d6792 L |
3046 | unwind_diagnostic (const char * region, const char *directive) |
3047 | { | |
3048 | if (md.unwind_check == unwind_check_warning) | |
07450571 | 3049 | { |
ad4b42b4 | 3050 | as_warn (_(".%s outside of %s"), directive, region); |
07450571 L |
3051 | return -1; |
3052 | } | |
970d6792 L |
3053 | else |
3054 | { | |
ad4b42b4 | 3055 | as_bad (_(".%s outside of %s"), directive, region); |
970d6792 | 3056 | ignore_rest_of_line (); |
07450571 | 3057 | return 0; |
970d6792 L |
3058 | } |
3059 | } | |
3060 | ||
07450571 L |
3061 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3062 | a procedure but the unwind directive check is set to warning, 0 if | |
3063 | a directive isn't in a procedure and the unwind directive check is set | |
3064 | to error. */ | |
3065 | ||
75e09913 JB |
3066 | static int |
3067 | in_procedure (const char *directive) | |
3068 | { | |
5656b6b8 | 3069 | if (unwind.proc_pending.sym |
75e09913 JB |
3070 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3071 | return 1; | |
07450571 | 3072 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3073 | } |
3074 | ||
07450571 L |
3075 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3076 | a prologue but the unwind directive check is set to warning, 0 if | |
3077 | a directive isn't in a prologue and the unwind directive check is set | |
3078 | to error. */ | |
3079 | ||
75e09913 JB |
3080 | static int |
3081 | in_prologue (const char *directive) | |
3082 | { | |
07450571 | 3083 | int in = in_procedure (directive); |
ba825241 JB |
3084 | |
3085 | if (in > 0 && !unwind.prologue) | |
3086 | in = unwind_diagnostic ("prologue", directive); | |
3087 | check_pending_save (); | |
3088 | return in; | |
75e09913 JB |
3089 | } |
3090 | ||
07450571 L |
3091 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3092 | a body but the unwind directive check is set to warning, 0 if | |
3093 | a directive isn't in a body and the unwind directive check is set | |
3094 | to error. */ | |
3095 | ||
75e09913 JB |
3096 | static int |
3097 | in_body (const char *directive) | |
3098 | { | |
07450571 | 3099 | int in = in_procedure (directive); |
ba825241 JB |
3100 | |
3101 | if (in > 0 && !unwind.body) | |
3102 | in = unwind_diagnostic ("body region", directive); | |
3103 | return in; | |
75e09913 JB |
3104 | } |
3105 | ||
800eeca4 | 3106 | static void |
5a49b8ac | 3107 | add_unwind_entry (unw_rec_list *ptr, int sep) |
800eeca4 | 3108 | { |
e4e8248d JB |
3109 | if (ptr) |
3110 | { | |
3111 | if (unwind.tail) | |
3112 | unwind.tail->next = ptr; | |
3113 | else | |
3114 | unwind.list = ptr; | |
3115 | unwind.tail = ptr; | |
3116 | ||
3117 | /* The current entry can in fact be a chain of unwind entries. */ | |
3118 | if (unwind.current_entry == NULL) | |
3119 | unwind.current_entry = ptr; | |
3120 | } | |
800eeca4 JW |
3121 | |
3122 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3123 | if (unwind.current_entry == NULL) |
3124 | unwind.current_entry = ptr; | |
e4e8248d JB |
3125 | |
3126 | if (sep == ',') | |
3127 | { | |
3128 | /* Parse a tag permitted for the current directive. */ | |
3129 | int ch; | |
3130 | ||
3131 | SKIP_WHITESPACE (); | |
3132 | ch = get_symbol_end (); | |
3133 | /* FIXME: For now, just issue a warning that this isn't implemented. */ | |
3134 | { | |
3135 | static int warned; | |
3136 | ||
3137 | if (!warned) | |
3138 | { | |
3139 | warned = 1; | |
ad4b42b4 | 3140 | as_warn (_("Tags on unwind pseudo-ops aren't supported, yet")); |
e4e8248d JB |
3141 | } |
3142 | } | |
3143 | *input_line_pointer = ch; | |
3144 | } | |
3145 | if (sep != NOT_A_CHAR) | |
3146 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3147 | } |
3148 | ||
197865e8 | 3149 | static void |
5a49b8ac | 3150 | dot_fframe (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3151 | { |
3152 | expressionS e; | |
e4e8248d | 3153 | int sep; |
e0c9811a | 3154 | |
75e09913 JB |
3155 | if (!in_prologue ("fframe")) |
3156 | return; | |
3157 | ||
cd42ff9c | 3158 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3159 | |
800eeca4 | 3160 | if (e.X_op != O_constant) |
e4e8248d | 3161 | { |
ad4b42b4 | 3162 | as_bad (_("First operand to .fframe must be a constant")); |
e4e8248d JB |
3163 | e.X_add_number = 0; |
3164 | } | |
3165 | add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); | |
e0c9811a JW |
3166 | } |
3167 | ||
197865e8 | 3168 | static void |
5a49b8ac | 3169 | dot_vframe (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
3170 | { |
3171 | expressionS e; | |
3172 | unsigned reg; | |
e4e8248d | 3173 | int sep; |
e0c9811a | 3174 | |
75e09913 JB |
3175 | if (!in_prologue ("vframe")) |
3176 | return; | |
3177 | ||
cd42ff9c | 3178 | sep = parse_operand_and_eval (&e, ','); |
e0c9811a | 3179 | reg = e.X_add_number - REG_GR; |
e4e8248d | 3180 | if (e.X_op != O_register || reg > 127) |
800eeca4 | 3181 | { |
ad4b42b4 | 3182 | as_bad (_("First operand to .vframe must be a general register")); |
e4e8248d | 3183 | reg = 0; |
800eeca4 | 3184 | } |
e4e8248d JB |
3185 | add_unwind_entry (output_mem_stack_v (), sep); |
3186 | if (! (unwind.prologue_mask & 2)) | |
3187 | add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); | |
3188 | else if (reg != unwind.prologue_gr | |
3189 | + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) | |
ad4b42b4 | 3190 | as_warn (_("Operand of .vframe contradicts .prologue")); |
800eeca4 JW |
3191 | } |
3192 | ||
197865e8 | 3193 | static void |
5a49b8ac | 3194 | dot_vframesp (int psp) |
800eeca4 | 3195 | { |
e0c9811a | 3196 | expressionS e; |
e4e8248d | 3197 | int sep; |
e0c9811a | 3198 | |
e4e8248d | 3199 | if (psp) |
ad4b42b4 | 3200 | as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant")); |
e0c9811a | 3201 | |
e4e8248d | 3202 | if (!in_prologue ("vframesp")) |
75e09913 JB |
3203 | return; |
3204 | ||
cd42ff9c | 3205 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3206 | if (e.X_op != O_constant) |
e0c9811a | 3207 | { |
ad4b42b4 | 3208 | as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)")); |
e4e8248d | 3209 | e.X_add_number = 0; |
e0c9811a | 3210 | } |
e4e8248d JB |
3211 | add_unwind_entry (output_mem_stack_v (), sep); |
3212 | add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); | |
800eeca4 JW |
3213 | } |
3214 | ||
197865e8 | 3215 | static void |
5a49b8ac | 3216 | dot_save (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3217 | { |
3218 | expressionS e1, e2; | |
e4e8248d | 3219 | unsigned reg1, reg2; |
800eeca4 | 3220 | int sep; |
800eeca4 | 3221 | |
75e09913 JB |
3222 | if (!in_prologue ("save")) |
3223 | return; | |
3224 | ||
cd42ff9c | 3225 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3226 | if (sep == ',') |
cd42ff9c | 3227 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3228 | else |
3229 | e2.X_op = O_absent; | |
800eeca4 | 3230 | |
e0c9811a | 3231 | reg1 = e1.X_add_number; |
800eeca4 | 3232 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3233 | if (e1.X_op != O_register) |
800eeca4 | 3234 | { |
ad4b42b4 | 3235 | as_bad (_("First operand to .save not a register")); |
e4e8248d JB |
3236 | reg1 = REG_PR; /* Anything valid is good here. */ |
3237 | } | |
3238 | reg2 = e2.X_add_number - REG_GR; | |
3239 | if (e2.X_op != O_register || reg2 > 127) | |
3240 | { | |
ad4b42b4 | 3241 | as_bad (_("Second operand to .save not a valid register")); |
e4e8248d JB |
3242 | reg2 = 0; |
3243 | } | |
3244 | switch (reg1) | |
3245 | { | |
3246 | case REG_AR + AR_BSP: | |
3247 | add_unwind_entry (output_bsp_when (), sep); | |
3248 | add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); | |
3249 | break; | |
3250 | case REG_AR + AR_BSPSTORE: | |
3251 | add_unwind_entry (output_bspstore_when (), sep); | |
3252 | add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); | |
3253 | break; | |
3254 | case REG_AR + AR_RNAT: | |
3255 | add_unwind_entry (output_rnat_when (), sep); | |
3256 | add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); | |
3257 | break; | |
3258 | case REG_AR + AR_UNAT: | |
3259 | add_unwind_entry (output_unat_when (), sep); | |
3260 | add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); | |
3261 | break; | |
3262 | case REG_AR + AR_FPSR: | |
3263 | add_unwind_entry (output_fpsr_when (), sep); | |
3264 | add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); | |
3265 | break; | |
3266 | case REG_AR + AR_PFS: | |
3267 | add_unwind_entry (output_pfs_when (), sep); | |
3268 | if (! (unwind.prologue_mask & 4)) | |
3269 | add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); | |
3270 | else if (reg2 != unwind.prologue_gr | |
3271 | + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) | |
ad4b42b4 | 3272 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3273 | break; |
3274 | case REG_AR + AR_LC: | |
3275 | add_unwind_entry (output_lc_when (), sep); | |
3276 | add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); | |
3277 | break; | |
3278 | case REG_BR: | |
3279 | add_unwind_entry (output_rp_when (), sep); | |
3280 | if (! (unwind.prologue_mask & 8)) | |
3281 | add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); | |
3282 | else if (reg2 != unwind.prologue_gr) | |
ad4b42b4 | 3283 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3284 | break; |
3285 | case REG_PR: | |
3286 | add_unwind_entry (output_preds_when (), sep); | |
3287 | if (! (unwind.prologue_mask & 1)) | |
3288 | add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); | |
3289 | else if (reg2 != unwind.prologue_gr | |
3290 | + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) | |
ad4b42b4 | 3291 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3292 | break; |
3293 | case REG_PRIUNAT: | |
3294 | add_unwind_entry (output_priunat_when_gr (), sep); | |
3295 | add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); | |
3296 | break; | |
3297 | default: | |
ad4b42b4 | 3298 | as_bad (_("First operand to .save not a valid register")); |
e4e8248d JB |
3299 | add_unwind_entry (NULL, sep); |
3300 | break; | |
800eeca4 | 3301 | } |
800eeca4 JW |
3302 | } |
3303 | ||
197865e8 | 3304 | static void |
5a49b8ac | 3305 | dot_restore (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3306 | { |
e4e8248d | 3307 | expressionS e1; |
33d01f33 | 3308 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3309 | int sep; |
3310 | ||
75e09913 JB |
3311 | if (!in_body ("restore")) |
3312 | return; | |
3313 | ||
cd42ff9c | 3314 | sep = parse_operand_and_eval (&e1, ','); |
e0c9811a | 3315 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) |
ad4b42b4 | 3316 | as_bad (_("First operand to .restore must be stack pointer (sp)")); |
e0c9811a JW |
3317 | |
3318 | if (sep == ',') | |
3319 | { | |
e4e8248d JB |
3320 | expressionS e2; |
3321 | ||
cd42ff9c | 3322 | sep = parse_operand_and_eval (&e2, ','); |
33d01f33 | 3323 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3324 | { |
ad4b42b4 | 3325 | as_bad (_("Second operand to .restore must be a constant >= 0")); |
e4e8248d | 3326 | e2.X_add_number = 0; |
e0c9811a | 3327 | } |
33d01f33 | 3328 | ecount = e2.X_add_number; |
e0c9811a | 3329 | } |
33d01f33 JW |
3330 | else |
3331 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3332 | |
3333 | if (ecount >= unwind.prologue_count) | |
3334 | { | |
ad4b42b4 | 3335 | as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"), |
6290819d | 3336 | ecount + 1, unwind.prologue_count); |
e4e8248d | 3337 | ecount = 0; |
6290819d NC |
3338 | } |
3339 | ||
e4e8248d | 3340 | add_unwind_entry (output_epilogue (ecount), sep); |
33d01f33 JW |
3341 | |
3342 | if (ecount < unwind.prologue_count) | |
3343 | unwind.prologue_count -= ecount + 1; | |
3344 | else | |
3345 | unwind.prologue_count = 0; | |
e0c9811a JW |
3346 | } |
3347 | ||
197865e8 | 3348 | static void |
5a49b8ac | 3349 | dot_restorereg (int pred) |
e0c9811a JW |
3350 | { |
3351 | unsigned int qp, ab, reg; | |
e4e8248d | 3352 | expressionS e; |
e0c9811a | 3353 | int sep; |
e4e8248d | 3354 | const char * const po = pred ? "restorereg.p" : "restorereg"; |
e0c9811a | 3355 | |
e4e8248d | 3356 | if (!in_procedure (po)) |
75e09913 JB |
3357 | return; |
3358 | ||
e4e8248d JB |
3359 | if (pred) |
3360 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3361 | else | |
e0c9811a | 3362 | { |
cd42ff9c | 3363 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3364 | qp = 0; |
e0c9811a | 3365 | } |
e4e8248d | 3366 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3367 | |
e4e8248d | 3368 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); |
800eeca4 JW |
3369 | } |
3370 | ||
2d6ed997 L |
3371 | static char *special_linkonce_name[] = |
3372 | { | |
3373 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3374 | }; | |
3375 | ||
3376 | static void | |
da9f89d4 | 3377 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3378 | { |
3379 | /* | |
3380 | Use a slightly ugly scheme to derive the unwind section names from | |
3381 | the text section name: | |
3382 | ||
3383 | text sect. unwind table sect. | |
3384 | name: name: comments: | |
3385 | ---------- ----------------- -------------------------------- | |
3386 | .text .IA_64.unwind | |
3387 | .text.foo .IA_64.unwind.text.foo | |
3388 | .foo .IA_64.unwind.foo | |
3389 | .gnu.linkonce.t.foo | |
3390 | .gnu.linkonce.ia64unw.foo | |
3391 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3392 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3393 | ||
3394 | This mapping is done so that: | |
3395 | ||
3396 | (a) An object file with unwind info only in .text will use | |
3397 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3398 | This follows the letter of the ABI and also ensures backwards | |
3399 | compatibility with older toolchains. | |
3400 | ||
3401 | (b) An object file with unwind info in multiple text sections | |
3402 | will use separate unwind sections for each text section. | |
3403 | This allows us to properly set the "sh_info" and "sh_link" | |
3404 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3405 | lets GNU ld support programs with multiple segments | |
3406 | containing unwind info (as might be the case for certain | |
3407 | embedded applications). | |
3408 | ||
3409 | (c) An error is issued if there would be a name clash. | |
3410 | */ | |
3411 | ||
3412 | const char *text_name, *sec_text_name; | |
3413 | char *sec_name; | |
3414 | const char *prefix = special_section_name [sec_index]; | |
3415 | const char *suffix; | |
3416 | size_t prefix_len, suffix_len, sec_name_len; | |
3417 | ||
3418 | sec_text_name = segment_name (text_seg); | |
3419 | text_name = sec_text_name; | |
3420 | if (strncmp (text_name, "_info", 5) == 0) | |
3421 | { | |
ad4b42b4 | 3422 | as_bad (_("Illegal section name `%s' (causes unwind section name clash)"), |
2d6ed997 L |
3423 | text_name); |
3424 | ignore_rest_of_line (); | |
3425 | return; | |
3426 | } | |
3427 | if (strcmp (text_name, ".text") == 0) | |
3428 | text_name = ""; | |
3429 | ||
3430 | /* Build the unwind section name by appending the (possibly stripped) | |
3431 | text section name to the unwind prefix. */ | |
3432 | suffix = text_name; | |
3433 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3434 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3435 | { | |
3436 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3437 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3438 | } | |
3439 | ||
3440 | prefix_len = strlen (prefix); | |
3441 | suffix_len = strlen (suffix); | |
3442 | sec_name_len = prefix_len + suffix_len; | |
3443 | sec_name = alloca (sec_name_len + 1); | |
3444 | memcpy (sec_name, prefix, prefix_len); | |
3445 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3446 | sec_name [sec_name_len] = '\0'; | |
3447 | ||
3448 | /* Handle COMDAT group. */ | |
6e3f953d L |
3449 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3450 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3451 | { |
3452 | char *section; | |
3453 | size_t len, group_name_len; | |
3454 | const char *group_name = elf_group_name (text_seg); | |
3455 | ||
3456 | if (group_name == NULL) | |
3457 | { | |
ad4b42b4 | 3458 | as_bad (_("Group section `%s' has no group signature"), |
2d6ed997 L |
3459 | sec_text_name); |
3460 | ignore_rest_of_line (); | |
3461 | return; | |
3462 | } | |
3463 | /* We have to construct a fake section directive. */ | |
3464 | group_name_len = strlen (group_name); | |
3465 | len = (sec_name_len | |
3466 | + 16 /* ,"aG",@progbits, */ | |
3467 | + group_name_len /* ,group_name */ | |
3468 | + 7); /* ,comdat */ | |
3469 | ||
3470 | section = alloca (len + 1); | |
3471 | memcpy (section, sec_name, sec_name_len); | |
3472 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3473 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3474 | memcpy (section + len - 7, ",comdat", 7); | |
3475 | section [len] = '\0'; | |
3476 | set_section (section); | |
3477 | } | |
3478 | else | |
3479 | { | |
3480 | set_section (sec_name); | |
3481 | bfd_set_section_flags (stdoutput, now_seg, | |
3482 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3483 | } | |
38ce5b11 L |
3484 | |
3485 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3486 | } |
3487 | ||
73f20958 | 3488 | static void |
2d6ed997 | 3489 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3490 | { |
73f20958 L |
3491 | int size, pad; |
3492 | unw_rec_list *list; | |
800eeca4 | 3493 | |
c97b7ef6 JW |
3494 | /* Mark the end of the unwind info, so that we can compute the size of the |
3495 | last unwind region. */ | |
e4e8248d | 3496 | add_unwind_entry (output_endp (), NOT_A_CHAR); |
c97b7ef6 | 3497 | |
10850f29 JW |
3498 | /* Force out pending instructions, to make sure all unwind records have |
3499 | a valid slot_number field. */ | |
3500 | ia64_flush_insns (); | |
3501 | ||
800eeca4 | 3502 | /* Generate the unwind record. */ |
73f20958 | 3503 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3504 | fixup_unw_records (list, 1); |
73f20958 L |
3505 | size = calc_record_size (list); |
3506 | ||
3507 | if (size > 0 || unwind.force_unwind_entry) | |
3508 | { | |
3509 | unwind.force_unwind_entry = 0; | |
3510 | /* pad to pointer-size boundary. */ | |
3511 | pad = size % md.pointer_size; | |
3512 | if (pad != 0) | |
3513 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3514 | /* Add 8 for the header. */ |
3515 | size += 8; | |
3516 | /* Add a pointer for the personality offset. */ | |
3517 | if (unwind.personality_routine) | |
3518 | size += md.pointer_size; | |
73f20958 | 3519 | } |
6290819d | 3520 | |
800eeca4 JW |
3521 | /* If there are unwind records, switch sections, and output the info. */ |
3522 | if (size != 0) | |
3523 | { | |
800eeca4 | 3524 | expressionS exp; |
1cd8ff38 | 3525 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3526 | |
da9f89d4 | 3527 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3528 | |
557debba JW |
3529 | /* Make sure the section has 4 byte alignment for ILP32 and |
3530 | 8 byte alignment for LP64. */ | |
3531 | frag_align (md.pointer_size_shift, 0, 0); | |
3532 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3533 | |
800eeca4 | 3534 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3535 | unwind.info = expr_build_dot (); |
73f20958 L |
3536 | |
3537 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3538 | (offsetT) (long) unwind.personality_routine, |
3539 | (char *) list); | |
91a2ae2a | 3540 | |
800eeca4 | 3541 | /* Add the personality address to the image. */ |
e0c9811a | 3542 | if (unwind.personality_routine != 0) |
542d6675 | 3543 | { |
40449e9f | 3544 | exp.X_op = O_symbol; |
e0c9811a | 3545 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3546 | exp.X_add_number = 0; |
1cd8ff38 NC |
3547 | |
3548 | if (md.flags & EF_IA_64_BE) | |
3549 | { | |
3550 | if (md.flags & EF_IA_64_ABI64) | |
3551 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3552 | else | |
3553 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3554 | } | |
40449e9f | 3555 | else |
1cd8ff38 NC |
3556 | { |
3557 | if (md.flags & EF_IA_64_ABI64) | |
3558 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3559 | else | |
3560 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3561 | } | |
3562 | ||
3563 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3564 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3565 | unwind.personality_routine = 0; |
542d6675 | 3566 | } |
800eeca4 JW |
3567 | } |
3568 | ||
6290819d | 3569 | free_saved_prologue_counts (); |
e0c9811a | 3570 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3571 | } |
3572 | ||
197865e8 | 3573 | static void |
5a49b8ac | 3574 | dot_handlerdata (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3575 | { |
75e09913 JB |
3576 | if (!in_procedure ("handlerdata")) |
3577 | return; | |
91a2ae2a RH |
3578 | unwind.force_unwind_entry = 1; |
3579 | ||
3580 | /* Remember which segment we're in so we can switch back after .endp */ | |
3581 | unwind.saved_text_seg = now_seg; | |
3582 | unwind.saved_text_subseg = now_subseg; | |
3583 | ||
3584 | /* Generate unwind info into unwind-info section and then leave that | |
3585 | section as the currently active one so dataXX directives go into | |
3586 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3587 | generate_unwind_image (now_seg); |
e0c9811a | 3588 | demand_empty_rest_of_line (); |
800eeca4 JW |
3589 | } |
3590 | ||
197865e8 | 3591 | static void |
5a49b8ac | 3592 | dot_unwentry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3593 | { |
75e09913 JB |
3594 | if (!in_procedure ("unwentry")) |
3595 | return; | |
91a2ae2a | 3596 | unwind.force_unwind_entry = 1; |
e0c9811a | 3597 | demand_empty_rest_of_line (); |
800eeca4 JW |
3598 | } |
3599 | ||
197865e8 | 3600 | static void |
5a49b8ac | 3601 | dot_altrp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3602 | { |
e0c9811a JW |
3603 | expressionS e; |
3604 | unsigned reg; | |
3605 | ||
75e09913 JB |
3606 | if (!in_prologue ("altrp")) |
3607 | return; | |
3608 | ||
cd42ff9c | 3609 | parse_operand_and_eval (&e, 0); |
e0c9811a | 3610 | reg = e.X_add_number - REG_BR; |
e4e8248d JB |
3611 | if (e.X_op != O_register || reg > 7) |
3612 | { | |
ad4b42b4 | 3613 | as_bad (_("First operand to .altrp not a valid branch register")); |
e4e8248d JB |
3614 | reg = 0; |
3615 | } | |
3616 | add_unwind_entry (output_rp_br (reg), 0); | |
800eeca4 JW |
3617 | } |
3618 | ||
197865e8 | 3619 | static void |
5a49b8ac | 3620 | dot_savemem (int psprel) |
800eeca4 JW |
3621 | { |
3622 | expressionS e1, e2; | |
3623 | int sep; | |
3624 | int reg1, val; | |
e4e8248d | 3625 | const char * const po = psprel ? "savepsp" : "savesp"; |
800eeca4 | 3626 | |
e4e8248d | 3627 | if (!in_prologue (po)) |
75e09913 JB |
3628 | return; |
3629 | ||
cd42ff9c | 3630 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3631 | if (sep == ',') |
cd42ff9c | 3632 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3633 | else |
3634 | e2.X_op = O_absent; | |
800eeca4 | 3635 | |
e0c9811a | 3636 | reg1 = e1.X_add_number; |
800eeca4 | 3637 | val = e2.X_add_number; |
197865e8 | 3638 | |
800eeca4 | 3639 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3640 | if (e1.X_op != O_register) |
800eeca4 | 3641 | { |
ad4b42b4 | 3642 | as_bad (_("First operand to .%s not a register"), po); |
e4e8248d JB |
3643 | reg1 = REG_PR; /* Anything valid is good here. */ |
3644 | } | |
3645 | if (e2.X_op != O_constant) | |
3646 | { | |
ad4b42b4 | 3647 | as_bad (_("Second operand to .%s not a constant"), po); |
e4e8248d JB |
3648 | val = 0; |
3649 | } | |
3650 | ||
3651 | switch (reg1) | |
3652 | { | |
3653 | case REG_AR + AR_BSP: | |
3654 | add_unwind_entry (output_bsp_when (), sep); | |
3655 | add_unwind_entry ((psprel | |
3656 | ? output_bsp_psprel | |
3657 | : output_bsp_sprel) (val), NOT_A_CHAR); | |
3658 | break; | |
3659 | case REG_AR + AR_BSPSTORE: | |
3660 | add_unwind_entry (output_bspstore_when (), sep); | |
3661 | add_unwind_entry ((psprel | |
3662 | ? output_bspstore_psprel | |
3663 | : output_bspstore_sprel) (val), NOT_A_CHAR); | |
3664 | break; | |
3665 | case REG_AR + AR_RNAT: | |
3666 | add_unwind_entry (output_rnat_when (), sep); | |
3667 | add_unwind_entry ((psprel | |
3668 | ? output_rnat_psprel | |
3669 | : output_rnat_sprel) (val), NOT_A_CHAR); | |
3670 | break; | |
3671 | case REG_AR + AR_UNAT: | |
3672 | add_unwind_entry (output_unat_when (), sep); | |
3673 | add_unwind_entry ((psprel | |
3674 | ? output_unat_psprel | |
3675 | : output_unat_sprel) (val), NOT_A_CHAR); | |
3676 | break; | |
3677 | case REG_AR + AR_FPSR: | |
3678 | add_unwind_entry (output_fpsr_when (), sep); | |
3679 | add_unwind_entry ((psprel | |
3680 | ? output_fpsr_psprel | |
3681 | : output_fpsr_sprel) (val), NOT_A_CHAR); | |
3682 | break; | |
3683 | case REG_AR + AR_PFS: | |
3684 | add_unwind_entry (output_pfs_when (), sep); | |
3685 | add_unwind_entry ((psprel | |
3686 | ? output_pfs_psprel | |
3687 | : output_pfs_sprel) (val), NOT_A_CHAR); | |
3688 | break; | |
3689 | case REG_AR + AR_LC: | |
3690 | add_unwind_entry (output_lc_when (), sep); | |
3691 | add_unwind_entry ((psprel | |
3692 | ? output_lc_psprel | |
3693 | : output_lc_sprel) (val), NOT_A_CHAR); | |
3694 | break; | |
3695 | case REG_BR: | |
3696 | add_unwind_entry (output_rp_when (), sep); | |
3697 | add_unwind_entry ((psprel | |
3698 | ? output_rp_psprel | |
3699 | : output_rp_sprel) (val), NOT_A_CHAR); | |
3700 | break; | |
3701 | case REG_PR: | |
3702 | add_unwind_entry (output_preds_when (), sep); | |
3703 | add_unwind_entry ((psprel | |
3704 | ? output_preds_psprel | |
3705 | : output_preds_sprel) (val), NOT_A_CHAR); | |
3706 | break; | |
3707 | case REG_PRIUNAT: | |
3708 | add_unwind_entry (output_priunat_when_mem (), sep); | |
3709 | add_unwind_entry ((psprel | |
3710 | ? output_priunat_psprel | |
3711 | : output_priunat_sprel) (val), NOT_A_CHAR); | |
3712 | break; | |
3713 | default: | |
ad4b42b4 | 3714 | as_bad (_("First operand to .%s not a valid register"), po); |
e4e8248d JB |
3715 | add_unwind_entry (NULL, sep); |
3716 | break; | |
800eeca4 | 3717 | } |
800eeca4 JW |
3718 | } |
3719 | ||
197865e8 | 3720 | static void |
5a49b8ac | 3721 | dot_saveg (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3722 | { |
e4e8248d JB |
3723 | expressionS e; |
3724 | unsigned grmask; | |
800eeca4 | 3725 | int sep; |
75e09913 JB |
3726 | |
3727 | if (!in_prologue ("save.g")) | |
3728 | return; | |
3729 | ||
cd42ff9c | 3730 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3731 | |
e4e8248d JB |
3732 | grmask = e.X_add_number; |
3733 | if (e.X_op != O_constant | |
3734 | || e.X_add_number <= 0 | |
3735 | || e.X_add_number > 0xf) | |
800eeca4 | 3736 | { |
ad4b42b4 | 3737 | as_bad (_("First operand to .save.g must be a positive 4-bit constant")); |
e4e8248d JB |
3738 | grmask = 0; |
3739 | } | |
3740 | ||
3741 | if (sep == ',') | |
3742 | { | |
3743 | unsigned reg; | |
3744 | int n = popcount (grmask); | |
3745 | ||
cd42ff9c | 3746 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3747 | reg = e.X_add_number - REG_GR; |
3748 | if (e.X_op != O_register || reg > 127) | |
542d6675 | 3749 | { |
ad4b42b4 | 3750 | as_bad (_("Second operand to .save.g must be a general register")); |
e4e8248d JB |
3751 | reg = 0; |
3752 | } | |
3753 | else if (reg > 128U - n) | |
3754 | { | |
ad4b42b4 | 3755 | as_bad (_("Second operand to .save.g must be the first of %d general registers"), n); |
e4e8248d | 3756 | reg = 0; |
800eeca4 | 3757 | } |
e4e8248d | 3758 | add_unwind_entry (output_gr_gr (grmask, reg), 0); |
800eeca4 | 3759 | } |
e4e8248d JB |
3760 | else |
3761 | add_unwind_entry (output_gr_mem (grmask), 0); | |
800eeca4 JW |
3762 | } |
3763 | ||
197865e8 | 3764 | static void |
5a49b8ac | 3765 | dot_savef (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3766 | { |
e4e8248d | 3767 | expressionS e; |
75e09913 JB |
3768 | |
3769 | if (!in_prologue ("save.f")) | |
3770 | return; | |
3771 | ||
cd42ff9c | 3772 | parse_operand_and_eval (&e, 0); |
197865e8 | 3773 | |
e4e8248d JB |
3774 | if (e.X_op != O_constant |
3775 | || e.X_add_number <= 0 | |
3776 | || e.X_add_number > 0xfffff) | |
3777 | { | |
ad4b42b4 | 3778 | as_bad (_("Operand to .save.f must be a positive 20-bit constant")); |
e4e8248d JB |
3779 | e.X_add_number = 0; |
3780 | } | |
3781 | add_unwind_entry (output_fr_mem (e.X_add_number), 0); | |
800eeca4 JW |
3782 | } |
3783 | ||
197865e8 | 3784 | static void |
5a49b8ac | 3785 | dot_saveb (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3786 | { |
e4e8248d JB |
3787 | expressionS e; |
3788 | unsigned brmask; | |
3789 | int sep; | |
e0c9811a | 3790 | |
75e09913 JB |
3791 | if (!in_prologue ("save.b")) |
3792 | return; | |
3793 | ||
cd42ff9c | 3794 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3795 | |
3796 | brmask = e.X_add_number; | |
3797 | if (e.X_op != O_constant | |
3798 | || e.X_add_number <= 0 | |
3799 | || e.X_add_number > 0x1f) | |
800eeca4 | 3800 | { |
ad4b42b4 | 3801 | as_bad (_("First operand to .save.b must be a positive 5-bit constant")); |
e4e8248d | 3802 | brmask = 0; |
800eeca4 | 3803 | } |
e0c9811a JW |
3804 | |
3805 | if (sep == ',') | |
3806 | { | |
e4e8248d JB |
3807 | unsigned reg; |
3808 | int n = popcount (brmask); | |
3809 | ||
cd42ff9c | 3810 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3811 | reg = e.X_add_number - REG_GR; |
3812 | if (e.X_op != O_register || reg > 127) | |
e0c9811a | 3813 | { |
ad4b42b4 | 3814 | as_bad (_("Second operand to .save.b must be a general register")); |
e4e8248d | 3815 | reg = 0; |
e0c9811a | 3816 | } |
e4e8248d JB |
3817 | else if (reg > 128U - n) |
3818 | { | |
ad4b42b4 | 3819 | as_bad (_("Second operand to .save.b must be the first of %d general registers"), n); |
e4e8248d JB |
3820 | reg = 0; |
3821 | } | |
3822 | add_unwind_entry (output_br_gr (brmask, reg), 0); | |
e0c9811a JW |
3823 | } |
3824 | else | |
e4e8248d | 3825 | add_unwind_entry (output_br_mem (brmask), 0); |
800eeca4 JW |
3826 | } |
3827 | ||
197865e8 | 3828 | static void |
5a49b8ac | 3829 | dot_savegf (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3830 | { |
3831 | expressionS e1, e2; | |
75e09913 JB |
3832 | |
3833 | if (!in_prologue ("save.gf")) | |
3834 | return; | |
3835 | ||
cd42ff9c AM |
3836 | if (parse_operand_and_eval (&e1, ',') == ',') |
3837 | parse_operand_and_eval (&e2, 0); | |
800eeca4 | 3838 | else |
e4e8248d JB |
3839 | e2.X_op = O_absent; |
3840 | ||
3841 | if (e1.X_op != O_constant | |
3842 | || e1.X_add_number < 0 | |
3843 | || e1.X_add_number > 0xf) | |
3844 | { | |
ad4b42b4 | 3845 | as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant")); |
e4e8248d JB |
3846 | e1.X_op = O_absent; |
3847 | e1.X_add_number = 0; | |
3848 | } | |
3849 | if (e2.X_op != O_constant | |
3850 | || e2.X_add_number < 0 | |
3851 | || e2.X_add_number > 0xfffff) | |
800eeca4 | 3852 | { |
ad4b42b4 | 3853 | as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant")); |
e4e8248d JB |
3854 | e2.X_op = O_absent; |
3855 | e2.X_add_number = 0; | |
800eeca4 | 3856 | } |
e4e8248d JB |
3857 | if (e1.X_op == O_constant |
3858 | && e2.X_op == O_constant | |
3859 | && e1.X_add_number == 0 | |
3860 | && e2.X_add_number == 0) | |
ad4b42b4 | 3861 | as_bad (_("Operands to .save.gf may not be both zero")); |
e4e8248d JB |
3862 | |
3863 | add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); | |
800eeca4 JW |
3864 | } |
3865 | ||
197865e8 | 3866 | static void |
5a49b8ac | 3867 | dot_spill (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3868 | { |
3869 | expressionS e; | |
e0c9811a | 3870 | |
75e09913 JB |
3871 | if (!in_prologue ("spill")) |
3872 | return; | |
3873 | ||
cd42ff9c | 3874 | parse_operand_and_eval (&e, 0); |
197865e8 | 3875 | |
800eeca4 | 3876 | if (e.X_op != O_constant) |
800eeca4 | 3877 | { |
ad4b42b4 | 3878 | as_bad (_("Operand to .spill must be a constant")); |
e4e8248d | 3879 | e.X_add_number = 0; |
e0c9811a | 3880 | } |
e4e8248d | 3881 | add_unwind_entry (output_spill_base (e.X_add_number), 0); |
e0c9811a JW |
3882 | } |
3883 | ||
3884 | static void | |
5a49b8ac | 3885 | dot_spillreg (int pred) |
e0c9811a | 3886 | { |
2132e3a3 | 3887 | int sep; |
e4e8248d JB |
3888 | unsigned int qp, ab, xy, reg, treg; |
3889 | expressionS e; | |
3890 | const char * const po = pred ? "spillreg.p" : "spillreg"; | |
e0c9811a | 3891 | |
e4e8248d | 3892 | if (!in_procedure (po)) |
75e09913 JB |
3893 | return; |
3894 | ||
e4e8248d JB |
3895 | if (pred) |
3896 | sep = parse_predicate_and_operand (&e, &qp, po); | |
e0c9811a | 3897 | else |
e0c9811a | 3898 | { |
cd42ff9c | 3899 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3900 | qp = 0; |
e0c9811a | 3901 | } |
e4e8248d | 3902 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3903 | |
e4e8248d | 3904 | if (sep == ',') |
cd42ff9c | 3905 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3906 | else |
3907 | e.X_op = O_absent; | |
3908 | convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); | |
e0c9811a | 3909 | |
e4e8248d | 3910 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); |
e0c9811a JW |
3911 | } |
3912 | ||
3913 | static void | |
5a49b8ac | 3914 | dot_spillmem (int psprel) |
e0c9811a | 3915 | { |
e4e8248d JB |
3916 | expressionS e; |
3917 | int pred = (psprel < 0), sep; | |
3918 | unsigned int qp, ab, reg; | |
3919 | const char * po; | |
e0c9811a | 3920 | |
e4e8248d | 3921 | if (pred) |
e0c9811a | 3922 | { |
e4e8248d JB |
3923 | psprel = ~psprel; |
3924 | po = psprel ? "spillpsp.p" : "spillsp.p"; | |
e0c9811a | 3925 | } |
e4e8248d JB |
3926 | else |
3927 | po = psprel ? "spillpsp" : "spillsp"; | |
e0c9811a | 3928 | |
e4e8248d JB |
3929 | if (!in_procedure (po)) |
3930 | return; | |
e0c9811a | 3931 | |
e4e8248d JB |
3932 | if (pred) |
3933 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3934 | else | |
e0c9811a | 3935 | { |
cd42ff9c | 3936 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3937 | qp = 0; |
e0c9811a | 3938 | } |
e4e8248d | 3939 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3940 | |
e4e8248d | 3941 | if (sep == ',') |
cd42ff9c | 3942 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3943 | else |
3944 | e.X_op = O_absent; | |
3945 | if (e.X_op != O_constant) | |
e0c9811a | 3946 | { |
ad4b42b4 | 3947 | as_bad (_("Operand %d to .%s must be a constant"), 2 + pred, po); |
e4e8248d | 3948 | e.X_add_number = 0; |
e0c9811a JW |
3949 | } |
3950 | ||
3951 | if (psprel) | |
e4e8248d | 3952 | add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a | 3953 | else |
e4e8248d | 3954 | add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a JW |
3955 | } |
3956 | ||
6290819d | 3957 | static unsigned int |
5a49b8ac | 3958 | get_saved_prologue_count (unsigned long lbl) |
6290819d NC |
3959 | { |
3960 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3961 | ||
3962 | while (lpc != NULL && lpc->label_number != lbl) | |
3963 | lpc = lpc->next; | |
3964 | ||
3965 | if (lpc != NULL) | |
3966 | return lpc->prologue_count; | |
3967 | ||
ad4b42b4 | 3968 | as_bad (_("Missing .label_state %ld"), lbl); |
6290819d NC |
3969 | return 1; |
3970 | } | |
3971 | ||
3972 | static void | |
5a49b8ac | 3973 | save_prologue_count (unsigned long lbl, unsigned int count) |
6290819d NC |
3974 | { |
3975 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3976 | ||
3977 | while (lpc != NULL && lpc->label_number != lbl) | |
3978 | lpc = lpc->next; | |
3979 | ||
3980 | if (lpc != NULL) | |
3981 | lpc->prologue_count = count; | |
3982 | else | |
3983 | { | |
40449e9f | 3984 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
3985 | |
3986 | new_lpc->next = unwind.saved_prologue_counts; | |
3987 | new_lpc->label_number = lbl; | |
3988 | new_lpc->prologue_count = count; | |
3989 | unwind.saved_prologue_counts = new_lpc; | |
3990 | } | |
3991 | } | |
3992 | ||
3993 | static void | |
3994 | free_saved_prologue_counts () | |
3995 | { | |
40449e9f KH |
3996 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
3997 | label_prologue_count *next; | |
6290819d NC |
3998 | |
3999 | while (lpc != NULL) | |
4000 | { | |
4001 | next = lpc->next; | |
4002 | free (lpc); | |
4003 | lpc = next; | |
4004 | } | |
4005 | ||
4006 | unwind.saved_prologue_counts = NULL; | |
4007 | } | |
4008 | ||
e0c9811a | 4009 | static void |
5a49b8ac | 4010 | dot_label_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4011 | { |
4012 | expressionS e; | |
4013 | ||
75e09913 JB |
4014 | if (!in_body ("label_state")) |
4015 | return; | |
4016 | ||
cd42ff9c | 4017 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4018 | if (e.X_op == O_constant) |
4019 | save_prologue_count (e.X_add_number, unwind.prologue_count); | |
4020 | else | |
e0c9811a | 4021 | { |
ad4b42b4 | 4022 | as_bad (_("Operand to .label_state must be a constant")); |
e4e8248d | 4023 | e.X_add_number = 0; |
e0c9811a | 4024 | } |
e4e8248d | 4025 | add_unwind_entry (output_label_state (e.X_add_number), 0); |
e0c9811a JW |
4026 | } |
4027 | ||
4028 | static void | |
5a49b8ac | 4029 | dot_copy_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4030 | { |
4031 | expressionS e; | |
4032 | ||
75e09913 JB |
4033 | if (!in_body ("copy_state")) |
4034 | return; | |
4035 | ||
cd42ff9c | 4036 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4037 | if (e.X_op == O_constant) |
4038 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); | |
4039 | else | |
e0c9811a | 4040 | { |
ad4b42b4 | 4041 | as_bad (_("Operand to .copy_state must be a constant")); |
e4e8248d | 4042 | e.X_add_number = 0; |
e0c9811a | 4043 | } |
e4e8248d | 4044 | add_unwind_entry (output_copy_state (e.X_add_number), 0); |
800eeca4 JW |
4045 | } |
4046 | ||
197865e8 | 4047 | static void |
5a49b8ac | 4048 | dot_unwabi (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4049 | { |
e0c9811a JW |
4050 | expressionS e1, e2; |
4051 | unsigned char sep; | |
4052 | ||
e4e8248d | 4053 | if (!in_prologue ("unwabi")) |
75e09913 JB |
4054 | return; |
4055 | ||
cd42ff9c | 4056 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 4057 | if (sep == ',') |
cd42ff9c | 4058 | parse_operand_and_eval (&e2, 0); |
e4e8248d JB |
4059 | else |
4060 | e2.X_op = O_absent; | |
e0c9811a JW |
4061 | |
4062 | if (e1.X_op != O_constant) | |
4063 | { | |
ad4b42b4 | 4064 | as_bad (_("First operand to .unwabi must be a constant")); |
e4e8248d | 4065 | e1.X_add_number = 0; |
e0c9811a JW |
4066 | } |
4067 | ||
4068 | if (e2.X_op != O_constant) | |
4069 | { | |
ad4b42b4 | 4070 | as_bad (_("Second operand to .unwabi must be a constant")); |
e4e8248d | 4071 | e2.X_add_number = 0; |
e0c9811a JW |
4072 | } |
4073 | ||
e4e8248d | 4074 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); |
800eeca4 JW |
4075 | } |
4076 | ||
197865e8 | 4077 | static void |
5a49b8ac | 4078 | dot_personality (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4079 | { |
4080 | char *name, *p, c; | |
75e09913 JB |
4081 | if (!in_procedure ("personality")) |
4082 | return; | |
800eeca4 JW |
4083 | SKIP_WHITESPACE (); |
4084 | name = input_line_pointer; | |
4085 | c = get_symbol_end (); | |
4086 | p = input_line_pointer; | |
e0c9811a | 4087 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4088 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4089 | *p = c; |
4090 | SKIP_WHITESPACE (); | |
4091 | demand_empty_rest_of_line (); | |
4092 | } | |
4093 | ||
4094 | static void | |
5a49b8ac | 4095 | dot_proc (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4096 | { |
4097 | char *name, *p, c; | |
4098 | symbolS *sym; | |
5656b6b8 JB |
4099 | proc_pending *pending, *last_pending; |
4100 | ||
4101 | if (unwind.proc_pending.sym) | |
4102 | { | |
4103 | (md.unwind_check == unwind_check_warning | |
4104 | ? as_warn | |
ad4b42b4 | 4105 | : as_bad) (_("Missing .endp after previous .proc")); |
5656b6b8 JB |
4106 | while (unwind.proc_pending.next) |
4107 | { | |
4108 | pending = unwind.proc_pending.next; | |
4109 | unwind.proc_pending.next = pending->next; | |
4110 | free (pending); | |
4111 | } | |
4112 | } | |
4113 | last_pending = NULL; | |
800eeca4 | 4114 | |
e0c9811a | 4115 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4116 | function symbols: */ |
800eeca4 JW |
4117 | while (1) |
4118 | { | |
4119 | SKIP_WHITESPACE (); | |
4120 | name = input_line_pointer; | |
4121 | c = get_symbol_end (); | |
4122 | p = input_line_pointer; | |
75e09913 | 4123 | if (!*name) |
ad4b42b4 | 4124 | as_bad (_("Empty argument of .proc")); |
75e09913 | 4125 | else |
542d6675 | 4126 | { |
75e09913 JB |
4127 | sym = symbol_find_or_make (name); |
4128 | if (S_IS_DEFINED (sym)) | |
ad4b42b4 | 4129 | as_bad (_("`%s' was already defined"), name); |
5656b6b8 JB |
4130 | else if (!last_pending) |
4131 | { | |
4132 | unwind.proc_pending.sym = sym; | |
4133 | last_pending = &unwind.proc_pending; | |
4134 | } | |
4135 | else | |
75e09913 | 4136 | { |
5656b6b8 JB |
4137 | pending = xmalloc (sizeof (*pending)); |
4138 | pending->sym = sym; | |
4139 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4140 | } |
4141 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4142 | } |
800eeca4 JW |
4143 | *p = c; |
4144 | SKIP_WHITESPACE (); | |
4145 | if (*input_line_pointer != ',') | |
4146 | break; | |
4147 | ++input_line_pointer; | |
4148 | } | |
5656b6b8 JB |
4149 | if (!last_pending) |
4150 | { | |
4151 | unwind.proc_pending.sym = expr_build_dot (); | |
4152 | last_pending = &unwind.proc_pending; | |
4153 | } | |
4154 | last_pending->next = NULL; | |
800eeca4 JW |
4155 | demand_empty_rest_of_line (); |
4156 | ia64_do_align (16); | |
4157 | ||
75e09913 | 4158 | unwind.prologue = 0; |
33d01f33 | 4159 | unwind.prologue_count = 0; |
75e09913 JB |
4160 | unwind.body = 0; |
4161 | unwind.insn = 0; | |
e0c9811a JW |
4162 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4163 | unwind.personality_routine = 0; | |
800eeca4 JW |
4164 | } |
4165 | ||
4166 | static void | |
5a49b8ac | 4167 | dot_body (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4168 | { |
75e09913 JB |
4169 | if (!in_procedure ("body")) |
4170 | return; | |
4171 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
ad4b42b4 | 4172 | as_warn (_("Initial .body should precede any instructions")); |
ba825241 | 4173 | check_pending_save (); |
75e09913 | 4174 | |
e0c9811a | 4175 | unwind.prologue = 0; |
30d25259 | 4176 | unwind.prologue_mask = 0; |
75e09913 | 4177 | unwind.body = 1; |
30d25259 | 4178 | |
e4e8248d | 4179 | add_unwind_entry (output_body (), 0); |
800eeca4 JW |
4180 | } |
4181 | ||
4182 | static void | |
5a49b8ac | 4183 | dot_prologue (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4184 | { |
e4e8248d | 4185 | unsigned mask = 0, grsave = 0; |
e0c9811a | 4186 | |
75e09913 JB |
4187 | if (!in_procedure ("prologue")) |
4188 | return; | |
4189 | if (unwind.prologue) | |
4190 | { | |
ad4b42b4 | 4191 | as_bad (_(".prologue within prologue")); |
75e09913 JB |
4192 | ignore_rest_of_line (); |
4193 | return; | |
4194 | } | |
4195 | if (!unwind.body && unwind.insn) | |
ad4b42b4 | 4196 | as_warn (_("Initial .prologue should precede any instructions")); |
75e09913 | 4197 | |
e0c9811a | 4198 | if (!is_it_end_of_statement ()) |
800eeca4 | 4199 | { |
e4e8248d | 4200 | expressionS e; |
cd42ff9c | 4201 | int n, sep = parse_operand_and_eval (&e, ','); |
30d25259 | 4202 | |
e4e8248d JB |
4203 | if (e.X_op != O_constant |
4204 | || e.X_add_number < 0 | |
4205 | || e.X_add_number > 0xf) | |
ad4b42b4 | 4206 | as_bad (_("First operand to .prologue must be a positive 4-bit constant")); |
e4e8248d | 4207 | else if (e.X_add_number == 0) |
ad4b42b4 | 4208 | as_warn (_("Pointless use of zero first operand to .prologue")); |
e4e8248d JB |
4209 | else |
4210 | mask = e.X_add_number; | |
4211 | n = popcount (mask); | |
30d25259 | 4212 | |
e4e8248d | 4213 | if (sep == ',') |
cd42ff9c | 4214 | parse_operand_and_eval (&e, 0); |
800eeca4 | 4215 | else |
e4e8248d JB |
4216 | e.X_op = O_absent; |
4217 | if (e.X_op == O_constant | |
4218 | && e.X_add_number >= 0 | |
4219 | && e.X_add_number < 128) | |
4220 | { | |
4221 | if (md.unwind_check == unwind_check_error) | |
ad4b42b4 | 4222 | as_warn (_("Using a constant as second operand to .prologue is deprecated")); |
e4e8248d JB |
4223 | grsave = e.X_add_number; |
4224 | } | |
4225 | else if (e.X_op != O_register | |
4226 | || (grsave = e.X_add_number - REG_GR) > 127) | |
4227 | { | |
ad4b42b4 | 4228 | as_bad (_("Second operand to .prologue must be a general register")); |
e4e8248d JB |
4229 | grsave = 0; |
4230 | } | |
4231 | else if (grsave > 128U - n) | |
4232 | { | |
ad4b42b4 | 4233 | as_bad (_("Second operand to .prologue must be the first of %d general registers"), n); |
e4e8248d JB |
4234 | grsave = 0; |
4235 | } | |
4236 | ||
800eeca4 | 4237 | } |
e4e8248d JB |
4238 | |
4239 | if (mask) | |
4240 | add_unwind_entry (output_prologue_gr (mask, grsave), 0); | |
800eeca4 | 4241 | else |
e4e8248d | 4242 | add_unwind_entry (output_prologue (), 0); |
30d25259 RH |
4243 | |
4244 | unwind.prologue = 1; | |
4245 | unwind.prologue_mask = mask; | |
e4e8248d | 4246 | unwind.prologue_gr = grsave; |
75e09913 | 4247 | unwind.body = 0; |
33d01f33 | 4248 | ++unwind.prologue_count; |
800eeca4 JW |
4249 | } |
4250 | ||
4251 | static void | |
5a49b8ac | 4252 | dot_endp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4253 | { |
4254 | expressionS e; | |
44f5c83a | 4255 | int bytes_per_address; |
800eeca4 JW |
4256 | long where; |
4257 | segT saved_seg; | |
4258 | subsegT saved_subseg; | |
5656b6b8 | 4259 | proc_pending *pending; |
970d6792 | 4260 | int unwind_check = md.unwind_check; |
800eeca4 | 4261 | |
970d6792 | 4262 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4263 | if (!in_procedure ("endp")) |
4264 | return; | |
970d6792 | 4265 | md.unwind_check = unwind_check; |
75e09913 | 4266 | |
91a2ae2a RH |
4267 | if (unwind.saved_text_seg) |
4268 | { | |
4269 | saved_seg = unwind.saved_text_seg; | |
4270 | saved_subseg = unwind.saved_text_subseg; | |
4271 | unwind.saved_text_seg = NULL; | |
4272 | } | |
4273 | else | |
4274 | { | |
4275 | saved_seg = now_seg; | |
4276 | saved_subseg = now_subseg; | |
4277 | } | |
4278 | ||
800eeca4 | 4279 | insn_group_break (1, 0, 0); |
800eeca4 | 4280 | |
91a2ae2a RH |
4281 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4282 | if (!unwind.info) | |
2d6ed997 | 4283 | generate_unwind_image (saved_seg); |
800eeca4 | 4284 | |
91a2ae2a RH |
4285 | if (unwind.info || unwind.force_unwind_entry) |
4286 | { | |
75e09913 JB |
4287 | symbolS *proc_end; |
4288 | ||
91a2ae2a | 4289 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4290 | proc_end = expr_build_dot (); |
5e7474a7 | 4291 | |
da9f89d4 | 4292 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4293 | |
557debba JW |
4294 | /* Make sure that section has 4 byte alignment for ILP32 and |
4295 | 8 byte alignment for LP64. */ | |
4296 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4297 | |
557debba JW |
4298 | /* Need space for 3 pointers for procedure start, procedure end, |
4299 | and unwind info. */ | |
6baf2b51 | 4300 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4301 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4302 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4303 | |
40449e9f | 4304 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4305 | e.X_op = O_pseudo_fixup; |
4306 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4307 | e.X_add_number = 0; | |
5656b6b8 JB |
4308 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4309 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4310 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4311 | S_GET_VALUE (unwind.proc_pending.sym), | |
4312 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4313 | else |
5656b6b8 | 4314 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4315 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4316 | |
800eeca4 JW |
4317 | e.X_op = O_pseudo_fixup; |
4318 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4319 | e.X_add_number = 0; | |
75e09913 | 4320 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4321 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4322 | bytes_per_address, &e); | |
4323 | ||
4324 | if (unwind.info) | |
4325 | { | |
4326 | e.X_op = O_pseudo_fixup; | |
4327 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4328 | e.X_add_number = 0; | |
4329 | e.X_add_symbol = unwind.info; | |
4330 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4331 | bytes_per_address, &e); | |
4332 | } | |
91a2ae2a | 4333 | } |
800eeca4 | 4334 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4335 | |
5656b6b8 JB |
4336 | /* Set symbol sizes. */ |
4337 | pending = &unwind.proc_pending; | |
4338 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4339 | { |
5656b6b8 | 4340 | do |
75e09913 | 4341 | { |
5656b6b8 JB |
4342 | symbolS *sym = pending->sym; |
4343 | ||
4344 | if (!S_IS_DEFINED (sym)) | |
ad4b42b4 | 4345 | as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym)); |
5656b6b8 JB |
4346 | else if (S_GET_SIZE (sym) == 0 |
4347 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4348 | { |
75e09913 JB |
4349 | fragS *frag = symbol_get_frag (sym); |
4350 | ||
5656b6b8 | 4351 | if (frag) |
c538998c | 4352 | { |
75e09913 JB |
4353 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4354 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4355 | else | |
4356 | { | |
4357 | symbol_get_obj (sym)->size = | |
4358 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4359 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4360 | symbol_get_obj (sym)->size->X_add_symbol | |
4361 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4362 | frag_now_fix (), frag_now); | |
4363 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4364 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4365 | } | |
c538998c JJ |
4366 | } |
4367 | } | |
5656b6b8 JB |
4368 | } while ((pending = pending->next) != NULL); |
4369 | } | |
4370 | ||
4371 | /* Parse names of main and alternate entry points. */ | |
4372 | while (1) | |
4373 | { | |
4374 | char *name, *p, c; | |
4375 | ||
4376 | SKIP_WHITESPACE (); | |
4377 | name = input_line_pointer; | |
4378 | c = get_symbol_end (); | |
4379 | p = input_line_pointer; | |
4380 | if (!*name) | |
4381 | (md.unwind_check == unwind_check_warning | |
4382 | ? as_warn | |
ad4b42b4 | 4383 | : as_bad) (_("Empty argument of .endp")); |
5656b6b8 JB |
4384 | else |
4385 | { | |
4386 | symbolS *sym = symbol_find (name); | |
4387 | ||
4388 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4389 | { | |
4390 | if (sym == pending->sym) | |
4391 | { | |
4392 | pending->sym = NULL; | |
4393 | break; | |
4394 | } | |
4395 | } | |
4396 | if (!sym || !pending) | |
ad4b42b4 | 4397 | as_warn (_("`%s' was not specified with previous .proc"), name); |
c538998c JJ |
4398 | } |
4399 | *p = c; | |
4400 | SKIP_WHITESPACE (); | |
4401 | if (*input_line_pointer != ',') | |
4402 | break; | |
4403 | ++input_line_pointer; | |
4404 | } | |
4405 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4406 | |
4407 | /* Deliberately only checking for the main entry point here; the | |
4408 | language spec even says all arguments to .endp are ignored. */ | |
4409 | if (unwind.proc_pending.sym | |
4410 | && S_GET_NAME (unwind.proc_pending.sym) | |
4411 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
ad4b42b4 | 4412 | as_warn (_("`%s' should be an operand to this .endp"), |
5656b6b8 JB |
4413 | S_GET_NAME (unwind.proc_pending.sym)); |
4414 | while (unwind.proc_pending.next) | |
4415 | { | |
4416 | pending = unwind.proc_pending.next; | |
4417 | unwind.proc_pending.next = pending->next; | |
4418 | free (pending); | |
4419 | } | |
4420 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4421 | } |
4422 | ||
4423 | static void | |
d3ce72d0 | 4424 | dot_template (int template_val) |
800eeca4 | 4425 | { |
d3ce72d0 | 4426 | CURR_SLOT.user_template = template_val; |
800eeca4 JW |
4427 | } |
4428 | ||
4429 | static void | |
5a49b8ac | 4430 | dot_regstk (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4431 | { |
4432 | int ins, locs, outs, rots; | |
4433 | ||
4434 | if (is_it_end_of_statement ()) | |
4435 | ins = locs = outs = rots = 0; | |
4436 | else | |
4437 | { | |
4438 | ins = get_absolute_expression (); | |
4439 | if (*input_line_pointer++ != ',') | |
4440 | goto err; | |
4441 | locs = get_absolute_expression (); | |
4442 | if (*input_line_pointer++ != ',') | |
4443 | goto err; | |
4444 | outs = get_absolute_expression (); | |
4445 | if (*input_line_pointer++ != ',') | |
4446 | goto err; | |
4447 | rots = get_absolute_expression (); | |
4448 | } | |
4449 | set_regstack (ins, locs, outs, rots); | |
4450 | return; | |
4451 | ||
4452 | err: | |
ad4b42b4 | 4453 | as_bad (_("Comma expected")); |
800eeca4 JW |
4454 | ignore_rest_of_line (); |
4455 | } | |
4456 | ||
4457 | static void | |
5a49b8ac | 4458 | dot_rot (int type) |
800eeca4 | 4459 | { |
6a2375c6 JB |
4460 | offsetT num_regs; |
4461 | valueT num_alloced = 0; | |
800eeca4 JW |
4462 | struct dynreg **drpp, *dr; |
4463 | int ch, base_reg = 0; | |
4464 | char *name, *start; | |
4465 | size_t len; | |
4466 | ||
4467 | switch (type) | |
4468 | { | |
4469 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4470 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4471 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4472 | default: break; | |
4473 | } | |
4474 | ||
542d6675 | 4475 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4476 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4477 | { | |
db0bc284 | 4478 | hash_delete (md.dynreg_hash, dr->name, FALSE); |
20b36a95 | 4479 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4480 | dr->num_regs = 0; |
4481 | } | |
4482 | ||
4483 | drpp = &md.dynreg[type]; | |
4484 | while (1) | |
4485 | { | |
4486 | start = input_line_pointer; | |
4487 | ch = get_symbol_end (); | |
20b36a95 | 4488 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4489 | *input_line_pointer = ch; |
800eeca4 JW |
4490 | |
4491 | SKIP_WHITESPACE (); | |
4492 | if (*input_line_pointer != '[') | |
4493 | { | |
ad4b42b4 | 4494 | as_bad (_("Expected '['")); |
800eeca4 JW |
4495 | goto err; |
4496 | } | |
4497 | ++input_line_pointer; /* skip '[' */ | |
4498 | ||
4499 | num_regs = get_absolute_expression (); | |
4500 | ||
4501 | if (*input_line_pointer++ != ']') | |
4502 | { | |
ad4b42b4 | 4503 | as_bad (_("Expected ']'")); |
800eeca4 JW |
4504 | goto err; |
4505 | } | |
6a2375c6 JB |
4506 | if (num_regs <= 0) |
4507 | { | |
ad4b42b4 | 4508 | as_bad (_("Number of elements must be positive")); |
6a2375c6 JB |
4509 | goto err; |
4510 | } | |
800eeca4 JW |
4511 | SKIP_WHITESPACE (); |
4512 | ||
4513 | num_alloced += num_regs; | |
4514 | switch (type) | |
4515 | { | |
4516 | case DYNREG_GR: | |
4517 | if (num_alloced > md.rot.num_regs) | |
4518 | { | |
ad4b42b4 | 4519 | as_bad (_("Used more than the declared %d rotating registers"), |
800eeca4 JW |
4520 | md.rot.num_regs); |
4521 | goto err; | |
4522 | } | |
4523 | break; | |
4524 | case DYNREG_FR: | |
4525 | if (num_alloced > 96) | |
4526 | { | |
ad4b42b4 | 4527 | as_bad (_("Used more than the available 96 rotating registers")); |
800eeca4 JW |
4528 | goto err; |
4529 | } | |
4530 | break; | |
4531 | case DYNREG_PR: | |
4532 | if (num_alloced > 48) | |
4533 | { | |
ad4b42b4 | 4534 | as_bad (_("Used more than the available 48 rotating registers")); |
800eeca4 JW |
4535 | goto err; |
4536 | } | |
4537 | break; | |
4538 | ||
4539 | default: | |
4540 | break; | |
4541 | } | |
4542 | ||
800eeca4 JW |
4543 | if (!*drpp) |
4544 | { | |
4545 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4546 | memset (*drpp, 0, sizeof (*dr)); | |
4547 | } | |
4548 | ||
20b36a95 JB |
4549 | name = obstack_alloc (¬es, len + 1); |
4550 | memcpy (name, start, len); | |
4551 | name[len] = '\0'; | |
4552 | ||
800eeca4 JW |
4553 | dr = *drpp; |
4554 | dr->name = name; | |
4555 | dr->num_regs = num_regs; | |
4556 | dr->base = base_reg; | |
4557 | drpp = &dr->next; | |
4558 | base_reg += num_regs; | |
4559 | ||
4560 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4561 | { | |
ad4b42b4 | 4562 | as_bad (_("Attempt to redefine register set `%s'"), name); |
20b36a95 | 4563 | obstack_free (¬es, name); |
800eeca4 JW |
4564 | goto err; |
4565 | } | |
4566 | ||
4567 | if (*input_line_pointer != ',') | |
4568 | break; | |
4569 | ++input_line_pointer; /* skip comma */ | |
4570 | SKIP_WHITESPACE (); | |
4571 | } | |
4572 | demand_empty_rest_of_line (); | |
4573 | return; | |
4574 | ||
4575 | err: | |
4576 | ignore_rest_of_line (); | |
4577 | } | |
4578 | ||
4579 | static void | |
5a49b8ac | 4580 | dot_byteorder (int byteorder) |
800eeca4 | 4581 | { |
10a98291 L |
4582 | segment_info_type *seginfo = seg_info (now_seg); |
4583 | ||
4584 | if (byteorder == -1) | |
4585 | { | |
4586 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4587 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4588 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4589 | } | |
4590 | else | |
4591 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4592 | ||
4593 | if (target_big_endian != byteorder) | |
4594 | { | |
4595 | target_big_endian = byteorder; | |
4596 | if (target_big_endian) | |
4597 | { | |
4598 | ia64_number_to_chars = number_to_chars_bigendian; | |
4599 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4600 | } | |
4601 | else | |
4602 | { | |
4603 | ia64_number_to_chars = number_to_chars_littleendian; | |
4604 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4605 | } | |
4606 | } | |
800eeca4 JW |
4607 | } |
4608 | ||
4609 | static void | |
5a49b8ac | 4610 | dot_psr (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4611 | { |
4612 | char *option; | |
4613 | int ch; | |
4614 | ||
4615 | while (1) | |
4616 | { | |
4617 | option = input_line_pointer; | |
4618 | ch = get_symbol_end (); | |
4619 | if (strcmp (option, "lsb") == 0) | |
4620 | md.flags &= ~EF_IA_64_BE; | |
4621 | else if (strcmp (option, "msb") == 0) | |
4622 | md.flags |= EF_IA_64_BE; | |
4623 | else if (strcmp (option, "abi32") == 0) | |
4624 | md.flags &= ~EF_IA_64_ABI64; | |
4625 | else if (strcmp (option, "abi64") == 0) | |
4626 | md.flags |= EF_IA_64_ABI64; | |
4627 | else | |
ad4b42b4 | 4628 | as_bad (_("Unknown psr option `%s'"), option); |
800eeca4 JW |
4629 | *input_line_pointer = ch; |
4630 | ||
4631 | SKIP_WHITESPACE (); | |
4632 | if (*input_line_pointer != ',') | |
4633 | break; | |
4634 | ||
4635 | ++input_line_pointer; | |
4636 | SKIP_WHITESPACE (); | |
4637 | } | |
4638 | demand_empty_rest_of_line (); | |
4639 | } | |
4640 | ||
800eeca4 | 4641 | static void |
5a49b8ac | 4642 | dot_ln (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4643 | { |
4644 | new_logical_line (0, get_absolute_expression ()); | |
4645 | demand_empty_rest_of_line (); | |
4646 | } | |
4647 | ||
ef6a2b41 | 4648 | static void |
5a49b8ac | 4649 | cross_section (int ref, void (*cons) (int), int ua) |
800eeca4 | 4650 | { |
ef6a2b41 JB |
4651 | char *start, *end; |
4652 | int saved_auto_align; | |
4653 | unsigned int section_count; | |
800eeca4 JW |
4654 | |
4655 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4656 | start = input_line_pointer; |
4657 | if (*start == '"') | |
4658 | { | |
4659 | int len; | |
4660 | char *name; | |
4661 | ||
b3f19c14 | 4662 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4663 | obstack_free(¬es, name); |
4664 | if (!name) | |
4665 | { | |
4666 | ignore_rest_of_line (); | |
4667 | return; | |
4668 | } | |
4669 | } | |
b3f19c14 | 4670 | else |
800eeca4 | 4671 | { |
b3f19c14 JB |
4672 | char c = get_symbol_end (); |
4673 | ||
4674 | if (input_line_pointer == start) | |
4675 | { | |
ad4b42b4 | 4676 | as_bad (_("Missing section name")); |
b3f19c14 | 4677 | ignore_rest_of_line (); |
ef6a2b41 | 4678 | return; |
b3f19c14 | 4679 | } |
b3f19c14 | 4680 | *input_line_pointer = c; |
800eeca4 | 4681 | } |
ef6a2b41 | 4682 | end = input_line_pointer; |
800eeca4 JW |
4683 | SKIP_WHITESPACE (); |
4684 | if (*input_line_pointer != ',') | |
4685 | { | |
ad4b42b4 | 4686 | as_bad (_("Comma expected after section name")); |
800eeca4 | 4687 | ignore_rest_of_line (); |
ef6a2b41 | 4688 | return; |
800eeca4 | 4689 | } |
ef6a2b41 JB |
4690 | *end = '\0'; |
4691 | end = input_line_pointer + 1; /* skip comma */ | |
4692 | input_line_pointer = start; | |
4693 | md.keep_pending_output = 1; | |
4694 | section_count = bfd_count_sections(stdoutput); | |
4695 | obj_elf_section (0); | |
4696 | if (section_count != bfd_count_sections(stdoutput)) | |
ad4b42b4 | 4697 | as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.")); |
ef6a2b41 JB |
4698 | input_line_pointer = end; |
4699 | saved_auto_align = md.auto_align; | |
4700 | if (ua) | |
4701 | md.auto_align = 0; | |
4702 | (*cons) (ref); | |
4703 | if (ua) | |
4704 | md.auto_align = saved_auto_align; | |
4705 | obj_elf_previous (0); | |
4706 | md.keep_pending_output = 0; | |
800eeca4 JW |
4707 | } |
4708 | ||
4709 | static void | |
5a49b8ac | 4710 | dot_xdata (int size) |
800eeca4 | 4711 | { |
ef6a2b41 | 4712 | cross_section (size, cons, 0); |
800eeca4 JW |
4713 | } |
4714 | ||
4715 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4716 | |
800eeca4 | 4717 | static void |
5a49b8ac | 4718 | stmt_float_cons (int kind) |
800eeca4 | 4719 | { |
165a7f90 | 4720 | size_t alignment; |
800eeca4 JW |
4721 | |
4722 | switch (kind) | |
4723 | { | |
165a7f90 L |
4724 | case 'd': |
4725 | alignment = 8; | |
4726 | break; | |
4727 | ||
4728 | case 'x': | |
4729 | case 'X': | |
4730 | alignment = 16; | |
4731 | break; | |
800eeca4 JW |
4732 | |
4733 | case 'f': | |
4734 | default: | |
165a7f90 | 4735 | alignment = 4; |
800eeca4 JW |
4736 | break; |
4737 | } | |
165a7f90 | 4738 | ia64_do_align (alignment); |
800eeca4 JW |
4739 | float_cons (kind); |
4740 | } | |
4741 | ||
4742 | static void | |
5a49b8ac | 4743 | stmt_cons_ua (int size) |
800eeca4 JW |
4744 | { |
4745 | int saved_auto_align = md.auto_align; | |
4746 | ||
4747 | md.auto_align = 0; | |
4748 | cons (size); | |
4749 | md.auto_align = saved_auto_align; | |
4750 | } | |
4751 | ||
4752 | static void | |
5a49b8ac | 4753 | dot_xfloat_cons (int kind) |
800eeca4 | 4754 | { |
ef6a2b41 | 4755 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4756 | } |
4757 | ||
4758 | static void | |
38a57ae7 | 4759 | dot_xstringer (int zero) |
800eeca4 | 4760 | { |
ef6a2b41 | 4761 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4762 | } |
4763 | ||
4764 | static void | |
5a49b8ac | 4765 | dot_xdata_ua (int size) |
800eeca4 | 4766 | { |
ef6a2b41 | 4767 | cross_section (size, cons, 1); |
800eeca4 JW |
4768 | } |
4769 | ||
4770 | static void | |
5a49b8ac | 4771 | dot_xfloat_cons_ua (int kind) |
800eeca4 | 4772 | { |
ef6a2b41 | 4773 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4774 | } |
4775 | ||
4776 | /* .reg.val <regname>,value */ | |
542d6675 | 4777 | |
800eeca4 | 4778 | static void |
5a49b8ac | 4779 | dot_reg_val (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4780 | { |
4781 | expressionS reg; | |
4782 | ||
60d11e55 | 4783 | expression_and_evaluate (®); |
800eeca4 JW |
4784 | if (reg.X_op != O_register) |
4785 | { | |
4786 | as_bad (_("Register name expected")); | |
4787 | ignore_rest_of_line (); | |
4788 | } | |
4789 | else if (*input_line_pointer++ != ',') | |
4790 | { | |
4791 | as_bad (_("Comma expected")); | |
4792 | ignore_rest_of_line (); | |
4793 | } | |
197865e8 | 4794 | else |
800eeca4 JW |
4795 | { |
4796 | valueT value = get_absolute_expression (); | |
4797 | int regno = reg.X_add_number; | |
a66d2bb7 | 4798 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4799 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4800 | else |
542d6675 KH |
4801 | { |
4802 | gr_values[regno - REG_GR].known = 1; | |
4803 | gr_values[regno - REG_GR].value = value; | |
4804 | gr_values[regno - REG_GR].path = md.path; | |
4805 | } | |
800eeca4 JW |
4806 | } |
4807 | demand_empty_rest_of_line (); | |
4808 | } | |
4809 | ||
5e819f9c JW |
4810 | /* |
4811 | .serialize.data | |
4812 | .serialize.instruction | |
4813 | */ | |
4814 | static void | |
5a49b8ac | 4815 | dot_serialize (int type) |
5e819f9c JW |
4816 | { |
4817 | insn_group_break (0, 0, 0); | |
4818 | if (type) | |
4819 | instruction_serialization (); | |
4820 | else | |
4821 | data_serialization (); | |
4822 | insn_group_break (0, 0, 0); | |
4823 | demand_empty_rest_of_line (); | |
4824 | } | |
4825 | ||
197865e8 | 4826 | /* select dv checking mode |
800eeca4 JW |
4827 | .auto |
4828 | .explicit | |
4829 | .default | |
4830 | ||
197865e8 | 4831 | A stop is inserted when changing modes |
800eeca4 | 4832 | */ |
542d6675 | 4833 | |
800eeca4 | 4834 | static void |
5a49b8ac | 4835 | dot_dv_mode (int type) |
800eeca4 JW |
4836 | { |
4837 | if (md.manual_bundling) | |
4838 | as_warn (_("Directive invalid within a bundle")); | |
4839 | ||
4840 | if (type == 'E' || type == 'A') | |
4841 | md.mode_explicitly_set = 0; | |
4842 | else | |
4843 | md.mode_explicitly_set = 1; | |
4844 | ||
4845 | md.detect_dv = 1; | |
4846 | switch (type) | |
4847 | { | |
4848 | case 'A': | |
4849 | case 'a': | |
4850 | if (md.explicit_mode) | |
542d6675 | 4851 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4852 | md.explicit_mode = 0; |
4853 | break; | |
4854 | case 'E': | |
4855 | case 'e': | |
4856 | if (!md.explicit_mode) | |
542d6675 | 4857 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4858 | md.explicit_mode = 1; |
4859 | break; | |
4860 | default: | |
4861 | case 'd': | |
4862 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4863 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4864 | md.explicit_mode = md.default_explicit_mode; |
4865 | md.mode_explicitly_set = 0; | |
4866 | break; | |
4867 | } | |
4868 | } | |
4869 | ||
4870 | static void | |
5a49b8ac | 4871 | print_prmask (valueT mask) |
800eeca4 JW |
4872 | { |
4873 | int regno; | |
4874 | char *comma = ""; | |
542d6675 | 4875 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4876 | { |
542d6675 KH |
4877 | if (mask & ((valueT) 1 << regno)) |
4878 | { | |
4879 | fprintf (stderr, "%s p%d", comma, regno); | |
4880 | comma = ","; | |
4881 | } | |
800eeca4 JW |
4882 | } |
4883 | } | |
4884 | ||
4885 | /* | |
05ee4b0f JB |
4886 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
4887 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
4888 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
4889 | .pred.safe_across_calls p1 [, p2 [,...]] |
4890 | */ | |
542d6675 | 4891 | |
800eeca4 | 4892 | static void |
5a49b8ac | 4893 | dot_pred_rel (int type) |
800eeca4 JW |
4894 | { |
4895 | valueT mask = 0; | |
4896 | int count = 0; | |
4897 | int p1 = -1, p2 = -1; | |
4898 | ||
4899 | if (type == 0) | |
4900 | { | |
05ee4b0f | 4901 | if (*input_line_pointer == '"') |
542d6675 KH |
4902 | { |
4903 | int len; | |
4904 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 4905 | |
542d6675 KH |
4906 | if (strcmp (form, "mutex") == 0) |
4907 | type = 'm'; | |
4908 | else if (strcmp (form, "clear") == 0) | |
4909 | type = 'c'; | |
4910 | else if (strcmp (form, "imply") == 0) | |
4911 | type = 'i'; | |
05ee4b0f JB |
4912 | obstack_free (¬es, form); |
4913 | } | |
4914 | else if (*input_line_pointer == '@') | |
4915 | { | |
4916 | char *form = ++input_line_pointer; | |
4917 | char c = get_symbol_end(); | |
4918 | ||
4919 | if (strcmp (form, "mutex") == 0) | |
4920 | type = 'm'; | |
4921 | else if (strcmp (form, "clear") == 0) | |
4922 | type = 'c'; | |
4923 | else if (strcmp (form, "imply") == 0) | |
4924 | type = 'i'; | |
4925 | *input_line_pointer = c; | |
4926 | } | |
4927 | else | |
4928 | { | |
4929 | as_bad (_("Missing predicate relation type")); | |
4930 | ignore_rest_of_line (); | |
4931 | return; | |
4932 | } | |
4933 | if (type == 0) | |
4934 | { | |
4935 | as_bad (_("Unrecognized predicate relation type")); | |
4936 | ignore_rest_of_line (); | |
4937 | return; | |
542d6675 | 4938 | } |
800eeca4 | 4939 | if (*input_line_pointer == ',') |
542d6675 | 4940 | ++input_line_pointer; |
800eeca4 JW |
4941 | SKIP_WHITESPACE (); |
4942 | } | |
4943 | ||
800eeca4 JW |
4944 | while (1) |
4945 | { | |
20b36a95 | 4946 | valueT bits = 1; |
cc941dee | 4947 | int sep, regno; |
20b36a95 JB |
4948 | expressionS pr, *pr1, *pr2; |
4949 | ||
cd42ff9c | 4950 | sep = parse_operand_and_eval (&pr, ','); |
20b36a95 JB |
4951 | if (pr.X_op == O_register |
4952 | && pr.X_add_number >= REG_P | |
4953 | && pr.X_add_number <= REG_P + 63) | |
4954 | { | |
4955 | regno = pr.X_add_number - REG_P; | |
4956 | bits <<= regno; | |
4957 | count++; | |
4958 | if (p1 == -1) | |
4959 | p1 = regno; | |
4960 | else if (p2 == -1) | |
4961 | p2 = regno; | |
4962 | } | |
4963 | else if (type != 'i' | |
4964 | && pr.X_op == O_subtract | |
4965 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
4966 | && pr1->X_op == O_register | |
4967 | && pr1->X_add_number >= REG_P | |
4968 | && pr1->X_add_number <= REG_P + 63 | |
4969 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
4970 | && pr2->X_op == O_register | |
4971 | && pr2->X_add_number >= REG_P | |
4972 | && pr2->X_add_number <= REG_P + 63) | |
4973 | { | |
4974 | /* It's a range. */ | |
4975 | int stop; | |
4976 | ||
4977 | regno = pr1->X_add_number - REG_P; | |
4978 | stop = pr2->X_add_number - REG_P; | |
4979 | if (regno >= stop) | |
542d6675 KH |
4980 | { |
4981 | as_bad (_("Bad register range")); | |
4982 | ignore_rest_of_line (); | |
4983 | return; | |
4984 | } | |
20b36a95 JB |
4985 | bits = ((bits << stop) << 1) - (bits << regno); |
4986 | count += stop - regno + 1; | |
4987 | } | |
4988 | else | |
4989 | { | |
4990 | as_bad (_("Predicate register expected")); | |
4991 | ignore_rest_of_line (); | |
4992 | return; | |
542d6675 | 4993 | } |
20b36a95 JB |
4994 | if (mask & bits) |
4995 | as_warn (_("Duplicate predicate register ignored")); | |
4996 | mask |= bits; | |
cc941dee | 4997 | if (sep != ',') |
542d6675 | 4998 | break; |
800eeca4 JW |
4999 | } |
5000 | ||
5001 | switch (type) | |
5002 | { | |
5003 | case 'c': | |
5004 | if (count == 0) | |
542d6675 | 5005 | mask = ~(valueT) 0; |
800eeca4 | 5006 | clear_qp_mutex (mask); |
197865e8 | 5007 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5008 | break; |
5009 | case 'i': | |
5010 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5011 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5012 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5013 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5014 | else |
542d6675 | 5015 | add_qp_imply (p1, p2); |
800eeca4 JW |
5016 | break; |
5017 | case 'm': | |
5018 | if (count < 2) | |
542d6675 KH |
5019 | { |
5020 | as_bad (_("At least two PR arguments expected")); | |
5021 | break; | |
5022 | } | |
800eeca4 | 5023 | else if (mask & 1) |
542d6675 KH |
5024 | { |
5025 | as_bad (_("Use of p0 is not valid in this context")); | |
5026 | break; | |
5027 | } | |
800eeca4 JW |
5028 | add_qp_mutex (mask); |
5029 | break; | |
5030 | case 's': | |
5031 | /* note that we don't override any existing relations */ | |
5032 | if (count == 0) | |
542d6675 KH |
5033 | { |
5034 | as_bad (_("At least one PR argument expected")); | |
5035 | break; | |
5036 | } | |
800eeca4 | 5037 | if (md.debug_dv) |
542d6675 KH |
5038 | { |
5039 | fprintf (stderr, "Safe across calls: "); | |
5040 | print_prmask (mask); | |
5041 | fprintf (stderr, "\n"); | |
5042 | } | |
800eeca4 JW |
5043 | qp_safe_across_calls = mask; |
5044 | break; | |
5045 | } | |
5046 | demand_empty_rest_of_line (); | |
5047 | } | |
5048 | ||
5049 | /* .entry label [, label [, ...]] | |
5050 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5051 | Otherwise, only global labels are considered entry points. */ |
5052 | ||
800eeca4 | 5053 | static void |
5a49b8ac | 5054 | dot_entry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5055 | { |
5056 | const char *err; | |
5057 | char *name; | |
5058 | int c; | |
5059 | symbolS *symbolP; | |
5060 | ||
5061 | do | |
5062 | { | |
5063 | name = input_line_pointer; | |
5064 | c = get_symbol_end (); | |
5065 | symbolP = symbol_find_or_make (name); | |
5066 | ||
5a49b8ac | 5067 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (void *) symbolP); |
800eeca4 | 5068 | if (err) |
542d6675 KH |
5069 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5070 | name, err); | |
800eeca4 JW |
5071 | |
5072 | *input_line_pointer = c; | |
5073 | SKIP_WHITESPACE (); | |
5074 | c = *input_line_pointer; | |
5075 | if (c == ',') | |
5076 | { | |
5077 | input_line_pointer++; | |
5078 | SKIP_WHITESPACE (); | |
5079 | if (*input_line_pointer == '\n') | |
5080 | c = '\n'; | |
5081 | } | |
5082 | } | |
5083 | while (c == ','); | |
5084 | ||
5085 | demand_empty_rest_of_line (); | |
5086 | } | |
5087 | ||
197865e8 | 5088 | /* .mem.offset offset, base |
542d6675 KH |
5089 | "base" is used to distinguish between offsets from a different base. */ |
5090 | ||
800eeca4 | 5091 | static void |
5a49b8ac | 5092 | dot_mem_offset (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5093 | { |
5094 | md.mem_offset.hint = 1; | |
5095 | md.mem_offset.offset = get_absolute_expression (); | |
5096 | if (*input_line_pointer != ',') | |
5097 | { | |
5098 | as_bad (_("Comma expected")); | |
5099 | ignore_rest_of_line (); | |
5100 | return; | |
5101 | } | |
5102 | ++input_line_pointer; | |
5103 | md.mem_offset.base = get_absolute_expression (); | |
5104 | demand_empty_rest_of_line (); | |
5105 | } | |
5106 | ||
542d6675 | 5107 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5108 | const pseudo_typeS md_pseudo_table[] = |
5109 | { | |
5110 | { "radix", dot_radix, 0 }, | |
5111 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5112 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5113 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5114 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5115 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5116 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5117 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5118 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5119 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5120 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5121 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5122 | { "proc", dot_proc, 0 }, |
5123 | { "body", dot_body, 0 }, | |
5124 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5125 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5126 | |
5127 | { "fframe", dot_fframe, 0 }, | |
5128 | { "vframe", dot_vframe, 0 }, | |
5129 | { "vframesp", dot_vframesp, 0 }, | |
e4e8248d | 5130 | { "vframepsp", dot_vframesp, 1 }, |
2434f565 JW |
5131 | { "save", dot_save, 0 }, |
5132 | { "restore", dot_restore, 0 }, | |
5133 | { "restorereg", dot_restorereg, 0 }, | |
e4e8248d | 5134 | { "restorereg.p", dot_restorereg, 1 }, |
2434f565 JW |
5135 | { "handlerdata", dot_handlerdata, 0 }, |
5136 | { "unwentry", dot_unwentry, 0 }, | |
5137 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5138 | { "savesp", dot_savemem, 0 }, |
5139 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5140 | { "save.g", dot_saveg, 0 }, |
5141 | { "save.f", dot_savef, 0 }, | |
5142 | { "save.b", dot_saveb, 0 }, | |
5143 | { "save.gf", dot_savegf, 0 }, | |
5144 | { "spill", dot_spill, 0 }, | |
5145 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5146 | { "spillsp", dot_spillmem, 0 }, |
5147 | { "spillpsp", dot_spillmem, 1 }, | |
e4e8248d JB |
5148 | { "spillreg.p", dot_spillreg, 1 }, |
5149 | { "spillsp.p", dot_spillmem, ~0 }, | |
5150 | { "spillpsp.p", dot_spillmem, ~1 }, | |
2434f565 JW |
5151 | { "label_state", dot_label_state, 0 }, |
5152 | { "copy_state", dot_copy_state, 0 }, | |
5153 | { "unwabi", dot_unwabi, 0 }, | |
5154 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5155 | { "mii", dot_template, 0x0 }, |
5156 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5157 | { "mlx", dot_template, 0x2 }, | |
5158 | { "mmi", dot_template, 0x4 }, | |
5159 | { "mfi", dot_template, 0x6 }, | |
5160 | { "mmf", dot_template, 0x7 }, | |
5161 | { "mib", dot_template, 0x8 }, | |
5162 | { "mbb", dot_template, 0x9 }, | |
5163 | { "bbb", dot_template, 0xb }, | |
5164 | { "mmb", dot_template, 0xc }, | |
5165 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5166 | { "align", dot_align, 0 }, |
800eeca4 JW |
5167 | { "regstk", dot_regstk, 0 }, |
5168 | { "rotr", dot_rot, DYNREG_GR }, | |
5169 | { "rotf", dot_rot, DYNREG_FR }, | |
5170 | { "rotp", dot_rot, DYNREG_PR }, | |
5171 | { "lsb", dot_byteorder, 0 }, | |
5172 | { "msb", dot_byteorder, 1 }, | |
5173 | { "psr", dot_psr, 0 }, | |
5174 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5175 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5176 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5177 | ||
5178 | { "xdata1", dot_xdata, 1 }, | |
5179 | { "xdata2", dot_xdata, 2 }, | |
5180 | { "xdata4", dot_xdata, 4 }, | |
5181 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5182 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5183 | { "xreal4", dot_xfloat_cons, 'f' }, |
5184 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5185 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5186 | { "xreal16", dot_xfloat_cons, 'X' }, |
38a57ae7 NC |
5187 | { "xstring", dot_xstringer, 8 + 0 }, |
5188 | { "xstringz", dot_xstringer, 8 + 1 }, | |
800eeca4 | 5189 | |
542d6675 | 5190 | /* unaligned versions: */ |
800eeca4 JW |
5191 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5192 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5193 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5194 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5195 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5196 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5197 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5198 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5199 | |
5200 | /* annotations/DV checking support */ | |
5201 | { "entry", dot_entry, 0 }, | |
2434f565 | 5202 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5203 | { "pred.rel", dot_pred_rel, 0 }, |
5204 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5205 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5206 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5207 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5208 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5209 | { "serialize.data", dot_serialize, 0 }, |
5210 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5211 | { "auto", dot_dv_mode, 'a' }, |
5212 | { "explicit", dot_dv_mode, 'e' }, | |
5213 | { "default", dot_dv_mode, 'd' }, | |
5214 | ||
87885043 JW |
5215 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5216 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5217 | tell it that these ones are supposed to be unaligned. Long term, | |
5218 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5219 | are aligned by default. */ | |
5220 | {"2byte", stmt_cons_ua, 2}, | |
5221 | {"4byte", stmt_cons_ua, 4}, | |
5222 | {"8byte", stmt_cons_ua, 8}, | |
5223 | ||
800eeca4 JW |
5224 | { NULL, 0, 0 } |
5225 | }; | |
5226 | ||
5227 | static const struct pseudo_opcode | |
5228 | { | |
5229 | const char *name; | |
5230 | void (*handler) (int); | |
5231 | int arg; | |
5232 | } | |
5233 | pseudo_opcode[] = | |
5234 | { | |
5235 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5236 | { "data1", cons, 1 }, | |
5237 | { "data2", cons, 2 }, | |
5238 | { "data4", cons, 4 }, | |
5239 | { "data8", cons, 8 }, | |
3969b680 | 5240 | { "data16", cons, 16 }, |
800eeca4 JW |
5241 | { "real4", stmt_float_cons, 'f' }, |
5242 | { "real8", stmt_float_cons, 'd' }, | |
5243 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5244 | { "real16", stmt_float_cons, 'X' }, |
38a57ae7 NC |
5245 | { "string", stringer, 8 + 0 }, |
5246 | { "stringz", stringer, 8 + 1 }, | |
800eeca4 | 5247 | |
542d6675 | 5248 | /* unaligned versions: */ |
800eeca4 JW |
5249 | { "data2.ua", stmt_cons_ua, 2 }, |
5250 | { "data4.ua", stmt_cons_ua, 4 }, | |
5251 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5252 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5253 | { "real4.ua", float_cons, 'f' }, |
5254 | { "real8.ua", float_cons, 'd' }, | |
5255 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5256 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5257 | }; |
5258 | ||
5259 | /* Declare a register by creating a symbol for it and entering it in | |
5260 | the symbol table. */ | |
542d6675 KH |
5261 | |
5262 | static symbolS * | |
5a49b8ac | 5263 | declare_register (const char *name, unsigned int regnum) |
800eeca4 JW |
5264 | { |
5265 | const char *err; | |
5266 | symbolS *sym; | |
5267 | ||
5e0bd176 | 5268 | sym = symbol_create (name, reg_section, regnum, &zero_address_frag); |
800eeca4 | 5269 | |
5a49b8ac | 5270 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (void *) sym); |
800eeca4 JW |
5271 | if (err) |
5272 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5273 | name, err); | |
5274 | ||
5275 | return sym; | |
5276 | } | |
5277 | ||
5278 | static void | |
5a49b8ac AM |
5279 | declare_register_set (const char *prefix, |
5280 | unsigned int num_regs, | |
5281 | unsigned int base_regnum) | |
800eeca4 JW |
5282 | { |
5283 | char name[8]; | |
8b84be9d | 5284 | unsigned int i; |
800eeca4 JW |
5285 | |
5286 | for (i = 0; i < num_regs; ++i) | |
5287 | { | |
f9f21a03 | 5288 | snprintf (name, sizeof (name), "%s%u", prefix, i); |
800eeca4 JW |
5289 | declare_register (name, base_regnum + i); |
5290 | } | |
5291 | } | |
5292 | ||
5293 | static unsigned int | |
5a49b8ac | 5294 | operand_width (enum ia64_opnd opnd) |
800eeca4 JW |
5295 | { |
5296 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5297 | unsigned int bits = 0; | |
5298 | int i; | |
5299 | ||
5300 | bits = 0; | |
5301 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5302 | bits += odesc->field[i].bits; | |
5303 | ||
5304 | return bits; | |
5305 | } | |
5306 | ||
87f8eb97 | 5307 | static enum operand_match_result |
5a49b8ac | 5308 | operand_match (const struct ia64_opcode *idesc, int index, expressionS *e) |
800eeca4 JW |
5309 | { |
5310 | enum ia64_opnd opnd = idesc->operands[index]; | |
5311 | int bits, relocatable = 0; | |
5312 | struct insn_fix *fix; | |
5313 | bfd_signed_vma val; | |
5314 | ||
5315 | switch (opnd) | |
5316 | { | |
542d6675 | 5317 | /* constants: */ |
800eeca4 JW |
5318 | |
5319 | case IA64_OPND_AR_CCV: | |
5320 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5321 | return OPERAND_MATCH; |
800eeca4 JW |
5322 | break; |
5323 | ||
c10d9d8f JW |
5324 | case IA64_OPND_AR_CSD: |
5325 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5326 | return OPERAND_MATCH; | |
5327 | break; | |
5328 | ||
800eeca4 JW |
5329 | case IA64_OPND_AR_PFS: |
5330 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5331 | return OPERAND_MATCH; |
800eeca4 JW |
5332 | break; |
5333 | ||
5334 | case IA64_OPND_GR0: | |
5335 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5336 | return OPERAND_MATCH; |
800eeca4 JW |
5337 | break; |
5338 | ||
5339 | case IA64_OPND_IP: | |
5340 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5341 | return OPERAND_MATCH; |
800eeca4 JW |
5342 | break; |
5343 | ||
5344 | case IA64_OPND_PR: | |
5345 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5346 | return OPERAND_MATCH; |
800eeca4 JW |
5347 | break; |
5348 | ||
5349 | case IA64_OPND_PR_ROT: | |
5350 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5351 | return OPERAND_MATCH; |
800eeca4 JW |
5352 | break; |
5353 | ||
5354 | case IA64_OPND_PSR: | |
5355 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5356 | return OPERAND_MATCH; |
800eeca4 JW |
5357 | break; |
5358 | ||
5359 | case IA64_OPND_PSR_L: | |
5360 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5361 | return OPERAND_MATCH; |
800eeca4 JW |
5362 | break; |
5363 | ||
5364 | case IA64_OPND_PSR_UM: | |
5365 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5366 | return OPERAND_MATCH; |
800eeca4 JW |
5367 | break; |
5368 | ||
5369 | case IA64_OPND_C1: | |
87f8eb97 JW |
5370 | if (e->X_op == O_constant) |
5371 | { | |
5372 | if (e->X_add_number == 1) | |
5373 | return OPERAND_MATCH; | |
5374 | else | |
5375 | return OPERAND_OUT_OF_RANGE; | |
5376 | } | |
800eeca4 JW |
5377 | break; |
5378 | ||
5379 | case IA64_OPND_C8: | |
87f8eb97 JW |
5380 | if (e->X_op == O_constant) |
5381 | { | |
5382 | if (e->X_add_number == 8) | |
5383 | return OPERAND_MATCH; | |
5384 | else | |
5385 | return OPERAND_OUT_OF_RANGE; | |
5386 | } | |
800eeca4 JW |
5387 | break; |
5388 | ||
5389 | case IA64_OPND_C16: | |
87f8eb97 JW |
5390 | if (e->X_op == O_constant) |
5391 | { | |
5392 | if (e->X_add_number == 16) | |
5393 | return OPERAND_MATCH; | |
5394 | else | |
5395 | return OPERAND_OUT_OF_RANGE; | |
5396 | } | |
800eeca4 JW |
5397 | break; |
5398 | ||
542d6675 | 5399 | /* register operands: */ |
800eeca4 JW |
5400 | |
5401 | case IA64_OPND_AR3: | |
5402 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5403 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5404 | return OPERAND_MATCH; |
800eeca4 JW |
5405 | break; |
5406 | ||
5407 | case IA64_OPND_B1: | |
5408 | case IA64_OPND_B2: | |
5409 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5410 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5411 | return OPERAND_MATCH; |
800eeca4 JW |
5412 | break; |
5413 | ||
5414 | case IA64_OPND_CR3: | |
5415 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5416 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5417 | return OPERAND_MATCH; |
800eeca4 JW |
5418 | break; |
5419 | ||
5420 | case IA64_OPND_F1: | |
5421 | case IA64_OPND_F2: | |
5422 | case IA64_OPND_F3: | |
5423 | case IA64_OPND_F4: | |
5424 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5425 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5426 | return OPERAND_MATCH; |
800eeca4 JW |
5427 | break; |
5428 | ||
5429 | case IA64_OPND_P1: | |
5430 | case IA64_OPND_P2: | |
5431 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5432 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5433 | return OPERAND_MATCH; |
800eeca4 JW |
5434 | break; |
5435 | ||
5436 | case IA64_OPND_R1: | |
5437 | case IA64_OPND_R2: | |
5438 | case IA64_OPND_R3: | |
5439 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5440 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5441 | return OPERAND_MATCH; |
800eeca4 JW |
5442 | break; |
5443 | ||
5444 | case IA64_OPND_R3_2: | |
87f8eb97 | 5445 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5446 | { |
87f8eb97 JW |
5447 | if (e->X_add_number < REG_GR + 4) |
5448 | return OPERAND_MATCH; | |
5449 | else if (e->X_add_number < REG_GR + 128) | |
5450 | return OPERAND_OUT_OF_RANGE; | |
5451 | } | |
800eeca4 JW |
5452 | break; |
5453 | ||
542d6675 | 5454 | /* indirect operands: */ |
800eeca4 JW |
5455 | case IA64_OPND_CPUID_R3: |
5456 | case IA64_OPND_DBR_R3: | |
5457 | case IA64_OPND_DTR_R3: | |
5458 | case IA64_OPND_ITR_R3: | |
5459 | case IA64_OPND_IBR_R3: | |
5460 | case IA64_OPND_MSR_R3: | |
5461 | case IA64_OPND_PKR_R3: | |
5462 | case IA64_OPND_PMC_R3: | |
5463 | case IA64_OPND_PMD_R3: | |
5464 | case IA64_OPND_RR_R3: | |
5465 | if (e->X_op == O_index && e->X_op_symbol | |
5466 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5467 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5468 | return OPERAND_MATCH; |
800eeca4 JW |
5469 | break; |
5470 | ||
5471 | case IA64_OPND_MR3: | |
5472 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5473 | return OPERAND_MATCH; |
800eeca4 JW |
5474 | break; |
5475 | ||
542d6675 | 5476 | /* immediate operands: */ |
800eeca4 JW |
5477 | case IA64_OPND_CNT2a: |
5478 | case IA64_OPND_LEN4: | |
5479 | case IA64_OPND_LEN6: | |
5480 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5481 | if (e->X_op == O_constant) |
5482 | { | |
5483 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5484 | return OPERAND_MATCH; | |
5485 | else | |
5486 | return OPERAND_OUT_OF_RANGE; | |
5487 | } | |
800eeca4 JW |
5488 | break; |
5489 | ||
5490 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5491 | if (e->X_op == O_constant) |
5492 | { | |
5493 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5494 | return OPERAND_MATCH; | |
5495 | else | |
5496 | return OPERAND_OUT_OF_RANGE; | |
5497 | } | |
800eeca4 JW |
5498 | break; |
5499 | ||
5500 | case IA64_OPND_CNT2c: | |
5501 | val = e->X_add_number; | |
87f8eb97 JW |
5502 | if (e->X_op == O_constant) |
5503 | { | |
5504 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5505 | return OPERAND_MATCH; | |
5506 | else | |
5507 | return OPERAND_OUT_OF_RANGE; | |
5508 | } | |
800eeca4 JW |
5509 | break; |
5510 | ||
5511 | case IA64_OPND_SOR: | |
5512 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5513 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5514 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5515 | case IA64_OPND_SOF: |
5516 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5517 | if (e->X_op == O_constant) |
5518 | { | |
5519 | if ((bfd_vma) e->X_add_number <= 96) | |
5520 | return OPERAND_MATCH; | |
5521 | else | |
5522 | return OPERAND_OUT_OF_RANGE; | |
5523 | } | |
800eeca4 JW |
5524 | break; |
5525 | ||
5526 | case IA64_OPND_IMMU62: | |
5527 | if (e->X_op == O_constant) | |
542d6675 | 5528 | { |
800eeca4 | 5529 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5530 | return OPERAND_MATCH; |
5531 | else | |
5532 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5533 | } |
197865e8 | 5534 | else |
542d6675 KH |
5535 | { |
5536 | /* FIXME -- need 62-bit relocation type */ | |
5537 | as_bad (_("62-bit relocation not yet implemented")); | |
5538 | } | |
800eeca4 JW |
5539 | break; |
5540 | ||
5541 | case IA64_OPND_IMMU64: | |
5542 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5543 | || e->X_op == O_subtract) | |
5544 | { | |
5545 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5546 | fix->code = BFD_RELOC_IA64_IMM64; | |
5547 | if (e->X_op != O_subtract) | |
5548 | { | |
5549 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5550 | if (e->X_op == O_pseudo_fixup) | |
5551 | e->X_op = O_symbol; | |
5552 | } | |
5553 | ||
5554 | fix->opnd = idesc->operands[index]; | |
5555 | fix->expr = *e; | |
5556 | fix->is_pcrel = 0; | |
5557 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5558 | return OPERAND_MATCH; |
800eeca4 JW |
5559 | } |
5560 | else if (e->X_op == O_constant) | |
87f8eb97 | 5561 | return OPERAND_MATCH; |
800eeca4 JW |
5562 | break; |
5563 | ||
59cf82fe L |
5564 | case IA64_OPND_IMMU5b: |
5565 | if (e->X_op == O_constant) | |
5566 | { | |
5567 | val = e->X_add_number; | |
5568 | if (val >= 32 && val <= 63) | |
5569 | return OPERAND_MATCH; | |
5570 | else | |
5571 | return OPERAND_OUT_OF_RANGE; | |
5572 | } | |
5573 | break; | |
5574 | ||
800eeca4 JW |
5575 | case IA64_OPND_CCNT5: |
5576 | case IA64_OPND_CNT5: | |
5577 | case IA64_OPND_CNT6: | |
5578 | case IA64_OPND_CPOS6a: | |
5579 | case IA64_OPND_CPOS6b: | |
5580 | case IA64_OPND_CPOS6c: | |
5581 | case IA64_OPND_IMMU2: | |
5582 | case IA64_OPND_IMMU7a: | |
5583 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5584 | case IA64_OPND_IMMU21: |
5585 | case IA64_OPND_IMMU24: | |
5586 | case IA64_OPND_MBTYPE4: | |
5587 | case IA64_OPND_MHTYPE8: | |
5588 | case IA64_OPND_POS6: | |
5589 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5590 | if (e->X_op == O_constant) |
5591 | { | |
5592 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5593 | return OPERAND_MATCH; | |
5594 | else | |
5595 | return OPERAND_OUT_OF_RANGE; | |
5596 | } | |
800eeca4 JW |
5597 | break; |
5598 | ||
bf3ca999 TW |
5599 | case IA64_OPND_IMMU9: |
5600 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5601 | if (e->X_op == O_constant) |
542d6675 | 5602 | { |
87f8eb97 JW |
5603 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5604 | { | |
5605 | int lobits = e->X_add_number & 0x3; | |
5606 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5607 | e->X_add_number |= (bfd_vma) 0x3; | |
5608 | return OPERAND_MATCH; | |
5609 | } | |
5610 | else | |
5611 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5612 | } |
bf3ca999 TW |
5613 | break; |
5614 | ||
800eeca4 JW |
5615 | case IA64_OPND_IMM44: |
5616 | /* least 16 bits must be zero */ | |
5617 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5618 | /* XXX technically, this is wrong: we should not be issuing warning |
5619 | messages until we're sure this instruction pattern is going to | |
5620 | be used! */ | |
542d6675 | 5621 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5622 | |
87f8eb97 | 5623 | if (e->X_op == O_constant) |
542d6675 | 5624 | { |
87f8eb97 JW |
5625 | if (((e->X_add_number >= 0 |
5626 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5627 | || (e->X_add_number < 0 | |
5628 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5629 | { |
87f8eb97 JW |
5630 | /* sign-extend */ |
5631 | if (e->X_add_number >= 0 | |
5632 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5633 | { | |
5634 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5635 | } | |
5636 | return OPERAND_MATCH; | |
542d6675 | 5637 | } |
87f8eb97 JW |
5638 | else |
5639 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5640 | } |
800eeca4 JW |
5641 | break; |
5642 | ||
5643 | case IA64_OPND_IMM17: | |
5644 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5645 | if (e->X_op == O_constant) |
542d6675 | 5646 | { |
87f8eb97 JW |
5647 | if (((e->X_add_number >= 0 |
5648 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5649 | || (e->X_add_number < 0 | |
5650 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5651 | { |
87f8eb97 JW |
5652 | /* sign-extend */ |
5653 | if (e->X_add_number >= 0 | |
5654 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5655 | { | |
5656 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5657 | } | |
5658 | return OPERAND_MATCH; | |
542d6675 | 5659 | } |
87f8eb97 JW |
5660 | else |
5661 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5662 | } |
800eeca4 JW |
5663 | break; |
5664 | ||
5665 | case IA64_OPND_IMM14: | |
5666 | case IA64_OPND_IMM22: | |
5667 | relocatable = 1; | |
5668 | case IA64_OPND_IMM1: | |
5669 | case IA64_OPND_IMM8: | |
5670 | case IA64_OPND_IMM8U4: | |
5671 | case IA64_OPND_IMM8M1: | |
5672 | case IA64_OPND_IMM8M1U4: | |
5673 | case IA64_OPND_IMM8M1U8: | |
5674 | case IA64_OPND_IMM9a: | |
5675 | case IA64_OPND_IMM9b: | |
5676 | bits = operand_width (idesc->operands[index]); | |
5677 | if (relocatable && (e->X_op == O_symbol | |
5678 | || e->X_op == O_subtract | |
5679 | || e->X_op == O_pseudo_fixup)) | |
5680 | { | |
5681 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5682 | ||
5683 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5684 | fix->code = BFD_RELOC_IA64_IMM14; | |
5685 | else | |
5686 | fix->code = BFD_RELOC_IA64_IMM22; | |
5687 | ||
5688 | if (e->X_op != O_subtract) | |
5689 | { | |
5690 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5691 | if (e->X_op == O_pseudo_fixup) | |
5692 | e->X_op = O_symbol; | |
5693 | } | |
5694 | ||
5695 | fix->opnd = idesc->operands[index]; | |
5696 | fix->expr = *e; | |
5697 | fix->is_pcrel = 0; | |
5698 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5699 | return OPERAND_MATCH; |
800eeca4 JW |
5700 | } |
5701 | else if (e->X_op != O_constant | |
5702 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5703 | return OPERAND_MISMATCH; |
800eeca4 JW |
5704 | |
5705 | if (opnd == IA64_OPND_IMM8M1U4) | |
5706 | { | |
5707 | /* Zero is not valid for unsigned compares that take an adjusted | |
5708 | constant immediate range. */ | |
5709 | if (e->X_add_number == 0) | |
87f8eb97 | 5710 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5711 | |
5712 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5713 | checks will work. */ | |
5714 | val = e->X_add_number; | |
197865e8 KH |
5715 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5716 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5717 | val = ((val << 32) >> 32); |
5718 | ||
5719 | /* Check for 0x100000000. This is valid because | |
5720 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5721 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5722 | return OPERAND_MATCH; |
800eeca4 JW |
5723 | |
5724 | val = val - 1; | |
5725 | } | |
5726 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5727 | { | |
5728 | /* Zero is not valid for unsigned compares that take an adjusted | |
5729 | constant immediate range. */ | |
5730 | if (e->X_add_number == 0) | |
87f8eb97 | 5731 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5732 | |
5733 | /* Check for 0x10000000000000000. */ | |
5734 | if (e->X_op == O_big) | |
5735 | { | |
5736 | if (generic_bignum[0] == 0 | |
5737 | && generic_bignum[1] == 0 | |
5738 | && generic_bignum[2] == 0 | |
5739 | && generic_bignum[3] == 0 | |
5740 | && generic_bignum[4] == 1) | |
87f8eb97 | 5741 | return OPERAND_MATCH; |
800eeca4 | 5742 | else |
87f8eb97 | 5743 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5744 | } |
5745 | else | |
5746 | val = e->X_add_number - 1; | |
5747 | } | |
5748 | else if (opnd == IA64_OPND_IMM8M1) | |
5749 | val = e->X_add_number - 1; | |
5750 | else if (opnd == IA64_OPND_IMM8U4) | |
5751 | { | |
5752 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5753 | checks will work. */ | |
5754 | val = e->X_add_number; | |
197865e8 KH |
5755 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5756 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5757 | val = ((val << 32) >> 32); |
5758 | } | |
5759 | else | |
5760 | val = e->X_add_number; | |
5761 | ||
2434f565 JW |
5762 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5763 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5764 | return OPERAND_MATCH; |
5765 | else | |
5766 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5767 | |
5768 | case IA64_OPND_INC3: | |
5769 | /* +/- 1, 4, 8, 16 */ | |
5770 | val = e->X_add_number; | |
5771 | if (val < 0) | |
5772 | val = -val; | |
87f8eb97 JW |
5773 | if (e->X_op == O_constant) |
5774 | { | |
5775 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5776 | return OPERAND_MATCH; | |
5777 | else | |
5778 | return OPERAND_OUT_OF_RANGE; | |
5779 | } | |
800eeca4 JW |
5780 | break; |
5781 | ||
5782 | case IA64_OPND_TGT25: | |
5783 | case IA64_OPND_TGT25b: | |
5784 | case IA64_OPND_TGT25c: | |
5785 | case IA64_OPND_TGT64: | |
5786 | if (e->X_op == O_symbol) | |
5787 | { | |
5788 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5789 | if (opnd == IA64_OPND_TGT25) | |
5790 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5791 | else if (opnd == IA64_OPND_TGT25b) | |
5792 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5793 | else if (opnd == IA64_OPND_TGT25c) | |
5794 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5795 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5796 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5797 | else | |
5798 | abort (); | |
5799 | ||
800eeca4 JW |
5800 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5801 | fix->opnd = idesc->operands[index]; | |
5802 | fix->expr = *e; | |
5803 | fix->is_pcrel = 1; | |
5804 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5805 | return OPERAND_MATCH; |
800eeca4 JW |
5806 | } |
5807 | case IA64_OPND_TAG13: | |
5808 | case IA64_OPND_TAG13b: | |
5809 | switch (e->X_op) | |
5810 | { | |
5811 | case O_constant: | |
87f8eb97 | 5812 | return OPERAND_MATCH; |
800eeca4 JW |
5813 | |
5814 | case O_symbol: | |
5815 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 5816 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 5817 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
5818 | fix->code = BFD_RELOC_UNUSED; |
5819 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5820 | fix->opnd = idesc->operands[index]; |
5821 | fix->expr = *e; | |
5822 | fix->is_pcrel = 1; | |
5823 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5824 | return OPERAND_MATCH; |
800eeca4 JW |
5825 | |
5826 | default: | |
5827 | break; | |
5828 | } | |
5829 | break; | |
5830 | ||
a823923b RH |
5831 | case IA64_OPND_LDXMOV: |
5832 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5833 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5834 | fix->opnd = idesc->operands[index]; | |
5835 | fix->expr = *e; | |
5836 | fix->is_pcrel = 0; | |
5837 | ++CURR_SLOT.num_fixups; | |
5838 | return OPERAND_MATCH; | |
5839 | ||
800eeca4 JW |
5840 | default: |
5841 | break; | |
5842 | } | |
87f8eb97 | 5843 | return OPERAND_MISMATCH; |
800eeca4 JW |
5844 | } |
5845 | ||
5846 | static int | |
5a49b8ac | 5847 | parse_operand (expressionS *e, int more) |
800eeca4 JW |
5848 | { |
5849 | int sep = '\0'; | |
5850 | ||
5851 | memset (e, 0, sizeof (*e)); | |
5852 | e->X_op = O_absent; | |
5853 | SKIP_WHITESPACE (); | |
cd42ff9c | 5854 | expression (e); |
e4e8248d JB |
5855 | sep = *input_line_pointer; |
5856 | if (more && (sep == ',' || sep == more)) | |
5857 | ++input_line_pointer; | |
800eeca4 JW |
5858 | return sep; |
5859 | } | |
5860 | ||
cd42ff9c AM |
5861 | static int |
5862 | parse_operand_and_eval (expressionS *e, int more) | |
5863 | { | |
5864 | int sep = parse_operand (e, more); | |
5865 | resolve_expression (e); | |
5866 | return sep; | |
5867 | } | |
5868 | ||
5869 | static int | |
5870 | parse_operand_maybe_eval (expressionS *e, int more, enum ia64_opnd op) | |
5871 | { | |
5872 | int sep = parse_operand (e, more); | |
5873 | switch (op) | |
5874 | { | |
5875 | case IA64_OPND_IMM14: | |
5876 | case IA64_OPND_IMM22: | |
5877 | case IA64_OPND_IMMU64: | |
5878 | case IA64_OPND_TGT25: | |
5879 | case IA64_OPND_TGT25b: | |
5880 | case IA64_OPND_TGT25c: | |
5881 | case IA64_OPND_TGT64: | |
5882 | case IA64_OPND_TAG13: | |
5883 | case IA64_OPND_TAG13b: | |
5884 | case IA64_OPND_LDXMOV: | |
5885 | break; | |
5886 | default: | |
5887 | resolve_expression (e); | |
5888 | break; | |
5889 | } | |
5890 | return sep; | |
5891 | } | |
5892 | ||
800eeca4 JW |
5893 | /* Returns the next entry in the opcode table that matches the one in |
5894 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5895 | found, NULL is returned instead. */ |
800eeca4 JW |
5896 | |
5897 | static struct ia64_opcode * | |
5898 | get_next_opcode (struct ia64_opcode *idesc) | |
5899 | { | |
5900 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
5901 | ia64_free_opcode (idesc); | |
5902 | return next; | |
5903 | } | |
5904 | ||
5905 | /* Parse the operands for the opcode and find the opcode variant that | |
5906 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
5907 | |
5908 | static struct ia64_opcode * | |
5a49b8ac | 5909 | parse_operands (struct ia64_opcode *idesc) |
800eeca4 JW |
5910 | { |
5911 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 5912 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
5913 | int reg1, reg2; |
5914 | char reg_class; | |
800eeca4 | 5915 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 5916 | enum operand_match_result result; |
800eeca4 JW |
5917 | char mnemonic[129]; |
5918 | char *first_arg = 0, *end, *saved_input_pointer; | |
5919 | unsigned int sof; | |
5920 | ||
9c2799c2 | 5921 | gas_assert (strlen (idesc->name) <= 128); |
800eeca4 JW |
5922 | |
5923 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
5924 | if (idesc->operands[2] == IA64_OPND_SOF |
5925 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
5926 | { |
5927 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
5928 | can't parse the first operand until we have parsed the | |
5929 | remaining operands of the "alloc" instruction. */ | |
5930 | SKIP_WHITESPACE (); | |
5931 | first_arg = input_line_pointer; | |
5932 | end = strchr (input_line_pointer, '='); | |
5933 | if (!end) | |
5934 | { | |
ad4b42b4 | 5935 | as_bad (_("Expected separator `='")); |
800eeca4 JW |
5936 | return 0; |
5937 | } | |
5938 | input_line_pointer = end + 1; | |
5939 | ++i; | |
5940 | ++num_outputs; | |
5941 | } | |
5942 | ||
d3156ecc | 5943 | for (; ; ++i) |
800eeca4 | 5944 | { |
d3156ecc JB |
5945 | if (i < NELEMS (CURR_SLOT.opnd)) |
5946 | { | |
cd42ff9c AM |
5947 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + i, '=', |
5948 | idesc->operands[i]); | |
d3156ecc JB |
5949 | if (CURR_SLOT.opnd[i].X_op == O_absent) |
5950 | break; | |
5951 | } | |
5952 | else | |
5953 | { | |
5954 | expressionS dummy; | |
5955 | ||
e4e8248d | 5956 | sep = parse_operand (&dummy, '='); |
d3156ecc JB |
5957 | if (dummy.X_op == O_absent) |
5958 | break; | |
5959 | } | |
800eeca4 JW |
5960 | |
5961 | ++num_operands; | |
5962 | ||
5963 | if (sep != '=' && sep != ',') | |
5964 | break; | |
5965 | ||
5966 | if (sep == '=') | |
5967 | { | |
5968 | if (num_outputs > 0) | |
ad4b42b4 | 5969 | as_bad (_("Duplicate equal sign (=) in instruction")); |
800eeca4 JW |
5970 | else |
5971 | num_outputs = i + 1; | |
5972 | } | |
5973 | } | |
5974 | if (sep != '\0') | |
5975 | { | |
ad4b42b4 | 5976 | as_bad (_("Illegal operand separator `%c'"), sep); |
800eeca4 JW |
5977 | return 0; |
5978 | } | |
197865e8 | 5979 | |
60b9a617 JB |
5980 | if (idesc->operands[2] == IA64_OPND_SOF |
5981 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 | 5982 | { |
ef0241e7 JB |
5983 | /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r. |
5984 | Note, however, that due to that mapping operand numbers in error | |
5985 | messages for any of the constant operands will not be correct. */ | |
800eeca4 | 5986 | know (strcmp (idesc->name, "alloc") == 0); |
ef0241e7 JB |
5987 | /* The first operand hasn't been parsed/initialized, yet (but |
5988 | num_operands intentionally doesn't account for that). */ | |
5989 | i = num_operands > 4 ? 2 : 1; | |
5990 | #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \ | |
5991 | ? CURR_SLOT.opnd[n].X_add_number \ | |
5992 | : 0) | |
5993 | sof = set_regstack (FORCE_CONST(i), | |
5994 | FORCE_CONST(i + 1), | |
5995 | FORCE_CONST(i + 2), | |
5996 | FORCE_CONST(i + 3)); | |
5997 | #undef FORCE_CONST | |
5998 | ||
5999 | /* now we can parse the first arg: */ | |
6000 | saved_input_pointer = input_line_pointer; | |
6001 | input_line_pointer = first_arg; | |
cd42ff9c AM |
6002 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + 0, '=', |
6003 | idesc->operands[0]); | |
ef0241e7 JB |
6004 | if (sep != '=') |
6005 | --num_outputs; /* force error */ | |
6006 | input_line_pointer = saved_input_pointer; | |
6007 | ||
6008 | CURR_SLOT.opnd[i].X_add_number = sof; | |
6009 | if (CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6010 | && CURR_SLOT.opnd[i + 2].X_op == O_constant) | |
6011 | CURR_SLOT.opnd[i + 1].X_add_number | |
6012 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6013 | else | |
6014 | CURR_SLOT.opnd[i + 1].X_op = O_illegal; | |
6015 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6016 | } |
6017 | ||
d3156ecc | 6018 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6019 | curr_out_of_range_pos = -1; |
6020 | error_pos = 0; | |
800eeca4 JW |
6021 | for (; idesc; idesc = get_next_opcode (idesc)) |
6022 | { | |
6023 | if (num_outputs != idesc->num_outputs) | |
6024 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6025 | if (highest_unmatched_operand < 0) |
6026 | highest_unmatched_operand |= 1; | |
6027 | if (num_operands > NELEMS (idesc->operands) | |
6028 | || (num_operands < NELEMS (idesc->operands) | |
6029 | && idesc->operands[num_operands]) | |
6030 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6031 | continue; /* mismatch in number of arguments */ | |
6032 | if (highest_unmatched_operand < 0) | |
6033 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6034 | |
6035 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6036 | |
6037 | /* Try to match all operands. If we see an out-of-range operand, | |
6038 | then continue trying to match the rest of the operands, since if | |
6039 | the rest match, then this idesc will give the best error message. */ | |
6040 | ||
6041 | out_of_range_pos = -1; | |
800eeca4 | 6042 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6043 | { |
6044 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6045 | if (result != OPERAND_MATCH) | |
6046 | { | |
6047 | if (result != OPERAND_OUT_OF_RANGE) | |
6048 | break; | |
6049 | if (out_of_range_pos < 0) | |
6050 | /* remember position of the first out-of-range operand: */ | |
6051 | out_of_range_pos = i; | |
6052 | } | |
6053 | } | |
800eeca4 | 6054 | |
87f8eb97 JW |
6055 | /* If we did not match all operands, or if at least one operand was |
6056 | out-of-range, then this idesc does not match. Keep track of which | |
6057 | idesc matched the most operands before failing. If we have two | |
6058 | idescs that failed at the same position, and one had an out-of-range | |
6059 | operand, then prefer the out-of-range operand. Thus if we have | |
6060 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6061 | of range instead of an error saying that the constant should have been | |
6062 | a register. */ | |
6063 | ||
6064 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6065 | { |
87f8eb97 JW |
6066 | if (i > highest_unmatched_operand |
6067 | || (i == highest_unmatched_operand | |
6068 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6069 | { |
6070 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6071 | if (out_of_range_pos >= 0) |
6072 | { | |
6073 | expected_operand = idesc->operands[out_of_range_pos]; | |
6074 | error_pos = out_of_range_pos; | |
6075 | } | |
6076 | else | |
6077 | { | |
6078 | expected_operand = idesc->operands[i]; | |
6079 | error_pos = i; | |
6080 | } | |
6081 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6082 | } |
6083 | continue; | |
6084 | } | |
6085 | ||
800eeca4 JW |
6086 | break; |
6087 | } | |
6088 | if (!idesc) | |
6089 | { | |
6090 | if (expected_operand) | |
ad4b42b4 | 6091 | as_bad (_("Operand %u of `%s' should be %s"), |
87f8eb97 | 6092 | error_pos + 1, mnemonic, |
800eeca4 | 6093 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc | 6094 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
ad4b42b4 | 6095 | as_bad (_("Wrong number of output operands")); |
d3156ecc | 6096 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) |
ad4b42b4 | 6097 | as_bad (_("Wrong number of input operands")); |
800eeca4 | 6098 | else |
ad4b42b4 | 6099 | as_bad (_("Operand mismatch")); |
800eeca4 JW |
6100 | return 0; |
6101 | } | |
4b09e828 JB |
6102 | |
6103 | /* Check that the instruction doesn't use | |
6104 | - r0, f0, or f1 as output operands | |
6105 | - the same predicate twice as output operands | |
6106 | - r0 as address of a base update load or store | |
6107 | - the same GR as output and address of a base update load | |
6108 | - two even- or two odd-numbered FRs as output operands of a floating | |
6109 | point parallel load. | |
6110 | At most two (conflicting) output (or output-like) operands can exist, | |
6111 | (floating point parallel loads have three outputs, but the base register, | |
6112 | if updated, cannot conflict with the actual outputs). */ | |
6113 | reg2 = reg1 = -1; | |
6114 | for (i = 0; i < num_operands; ++i) | |
6115 | { | |
6116 | int regno = 0; | |
6117 | ||
6118 | reg_class = 0; | |
6119 | switch (idesc->operands[i]) | |
6120 | { | |
6121 | case IA64_OPND_R1: | |
6122 | case IA64_OPND_R2: | |
6123 | case IA64_OPND_R3: | |
6124 | if (i < num_outputs) | |
6125 | { | |
6126 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6127 | reg_class = 'r'; | |
6128 | else if (reg1 < 0) | |
6129 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6130 | else if (reg2 < 0) | |
6131 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6132 | } | |
6133 | break; | |
6134 | case IA64_OPND_P1: | |
6135 | case IA64_OPND_P2: | |
6136 | if (i < num_outputs) | |
6137 | { | |
6138 | if (reg1 < 0) | |
6139 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6140 | else if (reg2 < 0) | |
6141 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6142 | } | |
6143 | break; | |
6144 | case IA64_OPND_F1: | |
6145 | case IA64_OPND_F2: | |
6146 | case IA64_OPND_F3: | |
6147 | case IA64_OPND_F4: | |
6148 | if (i < num_outputs) | |
6149 | { | |
6150 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6151 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6152 | { | |
6153 | reg_class = 'f'; | |
6154 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6155 | } | |
6156 | else if (reg1 < 0) | |
6157 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6158 | else if (reg2 < 0) | |
6159 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6160 | } | |
6161 | break; | |
6162 | case IA64_OPND_MR3: | |
6163 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6164 | { | |
6165 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6166 | reg_class = 'm'; | |
6167 | else if (reg1 < 0) | |
6168 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6169 | else if (reg2 < 0) | |
6170 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6171 | } | |
6172 | break; | |
6173 | default: | |
6174 | break; | |
6175 | } | |
6176 | switch (reg_class) | |
6177 | { | |
6178 | case 0: | |
6179 | break; | |
6180 | default: | |
ad4b42b4 | 6181 | as_warn (_("Invalid use of `%c%d' as output operand"), reg_class, regno); |
4b09e828 JB |
6182 | break; |
6183 | case 'm': | |
ad4b42b4 | 6184 | as_warn (_("Invalid use of `r%d' as base update address operand"), regno); |
4b09e828 JB |
6185 | break; |
6186 | } | |
6187 | } | |
6188 | if (reg1 == reg2) | |
6189 | { | |
6190 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6191 | { | |
6192 | reg1 -= REG_GR; | |
6193 | reg_class = 'r'; | |
6194 | } | |
6195 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6196 | { | |
6197 | reg1 -= REG_P; | |
6198 | reg_class = 'p'; | |
6199 | } | |
6200 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6201 | { | |
6202 | reg1 -= REG_FR; | |
6203 | reg_class = 'f'; | |
6204 | } | |
6205 | else | |
6206 | reg_class = 0; | |
6207 | if (reg_class) | |
ad4b42b4 | 6208 | as_warn (_("Invalid duplicate use of `%c%d'"), reg_class, reg1); |
4b09e828 JB |
6209 | } |
6210 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6211 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6212 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6213 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6214 | && ! ((reg1 ^ reg2) & 1)) | |
ad4b42b4 | 6215 | as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"), |
4b09e828 JB |
6216 | reg1 - REG_FR, reg2 - REG_FR); |
6217 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6218 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6219 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6220 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
ad4b42b4 | 6221 | as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"), |
4b09e828 | 6222 | reg1 - REG_FR, reg2 - REG_FR); |
800eeca4 JW |
6223 | return idesc; |
6224 | } | |
6225 | ||
6226 | static void | |
5a49b8ac | 6227 | build_insn (struct slot *slot, bfd_vma *insnp) |
800eeca4 JW |
6228 | { |
6229 | const struct ia64_operand *odesc, *o2desc; | |
6230 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6231 | bfd_vma insn; |
6232 | bfd_signed_vma val; | |
800eeca4 JW |
6233 | const char *err; |
6234 | int i; | |
6235 | ||
6236 | insn = idesc->opcode | slot->qp_regno; | |
6237 | ||
6238 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6239 | { | |
c67e42c9 RH |
6240 | if (slot->opnd[i].X_op == O_register |
6241 | || slot->opnd[i].X_op == O_constant | |
6242 | || slot->opnd[i].X_op == O_index) | |
6243 | val = slot->opnd[i].X_add_number; | |
6244 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6245 | { |
c67e42c9 | 6246 | /* This must be the value 0x10000000000000000. */ |
9c2799c2 | 6247 | gas_assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); |
c67e42c9 RH |
6248 | val = 0; |
6249 | } | |
6250 | else | |
6251 | val = 0; | |
6252 | ||
6253 | switch (idesc->operands[i]) | |
6254 | { | |
6255 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6256 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6257 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6258 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6259 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6260 | continue; |
6261 | ||
6262 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6263 | val &= 0x3fffffffffffffffULL; |
6264 | if (val != slot->opnd[i].X_add_number) | |
6265 | as_warn (_("Value truncated to 62 bits")); | |
6266 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6267 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6268 | continue; |
800eeca4 | 6269 | |
c67e42c9 RH |
6270 | case IA64_OPND_TGT64: |
6271 | val >>= 4; | |
6272 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6273 | insn |= ((((val >> 59) & 0x1) << 36) | |
6274 | | (((val >> 0) & 0xfffff) << 13)); | |
6275 | continue; | |
800eeca4 | 6276 | |
c67e42c9 RH |
6277 | case IA64_OPND_AR3: |
6278 | val -= REG_AR; | |
6279 | break; | |
6280 | ||
6281 | case IA64_OPND_B1: | |
6282 | case IA64_OPND_B2: | |
6283 | val -= REG_BR; | |
6284 | break; | |
6285 | ||
6286 | case IA64_OPND_CR3: | |
6287 | val -= REG_CR; | |
6288 | break; | |
6289 | ||
6290 | case IA64_OPND_F1: | |
6291 | case IA64_OPND_F2: | |
6292 | case IA64_OPND_F3: | |
6293 | case IA64_OPND_F4: | |
6294 | val -= REG_FR; | |
6295 | break; | |
6296 | ||
6297 | case IA64_OPND_P1: | |
6298 | case IA64_OPND_P2: | |
6299 | val -= REG_P; | |
6300 | break; | |
6301 | ||
6302 | case IA64_OPND_R1: | |
6303 | case IA64_OPND_R2: | |
6304 | case IA64_OPND_R3: | |
6305 | case IA64_OPND_R3_2: | |
6306 | case IA64_OPND_CPUID_R3: | |
6307 | case IA64_OPND_DBR_R3: | |
6308 | case IA64_OPND_DTR_R3: | |
6309 | case IA64_OPND_ITR_R3: | |
6310 | case IA64_OPND_IBR_R3: | |
6311 | case IA64_OPND_MR3: | |
6312 | case IA64_OPND_MSR_R3: | |
6313 | case IA64_OPND_PKR_R3: | |
6314 | case IA64_OPND_PMC_R3: | |
6315 | case IA64_OPND_PMD_R3: | |
197865e8 | 6316 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6317 | val -= REG_GR; |
6318 | break; | |
6319 | ||
6320 | default: | |
6321 | break; | |
6322 | } | |
6323 | ||
6324 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6325 | err = (*odesc->insert) (odesc, val, &insn); | |
6326 | if (err) | |
6327 | as_bad_where (slot->src_file, slot->src_line, | |
ad4b42b4 | 6328 | _("Bad operand value: %s"), err); |
c67e42c9 RH |
6329 | if (idesc->flags & IA64_OPCODE_PSEUDO) |
6330 | { | |
6331 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6332 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6333 | { | |
6334 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6335 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6336 | } |
c67e42c9 RH |
6337 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6338 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6339 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6340 | { |
c67e42c9 RH |
6341 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6342 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6343 | } |
6344 | } | |
6345 | } | |
6346 | *insnp = insn; | |
6347 | } | |
6348 | ||
6349 | static void | |
5a49b8ac | 6350 | emit_one_bundle (void) |
800eeca4 | 6351 | { |
f4660e2c | 6352 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6353 | enum ia64_unit required_unit, insn_unit = 0; |
6354 | enum ia64_insn_type type[3], insn_type; | |
d3ce72d0 | 6355 | unsigned int template_val, orig_template; |
542d6675 | 6356 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6357 | struct ia64_opcode *idesc; |
6358 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6359 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6360 | bfd_vma t0 = 0, t1 = 0; |
6361 | struct label_fix *lfix; | |
07a53e5c | 6362 | bfd_boolean mark_label; |
800eeca4 JW |
6363 | struct insn_fix *ifix; |
6364 | char mnemonic[16]; | |
6365 | fixS *fix; | |
6366 | char *f; | |
5a9ff93d | 6367 | int addr_mod; |
800eeca4 JW |
6368 | |
6369 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
c13781b8 | 6370 | know (first >= 0 && first < NUM_SLOTS); |
800eeca4 JW |
6371 | n = MIN (3, md.num_slots_in_use); |
6372 | ||
6373 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6374 | otherwise: */ |
800eeca4 JW |
6375 | |
6376 | if (md.slot[first].user_template >= 0) | |
d3ce72d0 | 6377 | user_template = template_val = md.slot[first].user_template; |
800eeca4 JW |
6378 | else |
6379 | { | |
032efc85 | 6380 | /* Auto select appropriate template. */ |
800eeca4 JW |
6381 | memset (type, 0, sizeof (type)); |
6382 | curr = first; | |
6383 | for (i = 0; i < n; ++i) | |
6384 | { | |
032efc85 RH |
6385 | if (md.slot[curr].label_fixups && i != 0) |
6386 | break; | |
800eeca4 JW |
6387 | type[i] = md.slot[curr].idesc->type; |
6388 | curr = (curr + 1) % NUM_SLOTS; | |
6389 | } | |
d3ce72d0 | 6390 | template_val = best_template[type[0]][type[1]][type[2]]; |
800eeca4 JW |
6391 | } |
6392 | ||
542d6675 | 6393 | /* initialize instructions with appropriate nops: */ |
800eeca4 | 6394 | for (i = 0; i < 3; ++i) |
d3ce72d0 | 6395 | insn[i] = nop[ia64_templ_desc[template_val].exec_unit[i]]; |
800eeca4 JW |
6396 | |
6397 | f = frag_more (16); | |
6398 | ||
5a9ff93d JW |
6399 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6400 | from the start of the frag. */ | |
6401 | addr_mod = frag_now_fix () & 15; | |
6402 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6403 | as_bad (_("instruction address is not a multiple of 16")); | |
6404 | frag_now->insn_addr = addr_mod; | |
6405 | frag_now->has_code = 1; | |
6406 | ||
542d6675 | 6407 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6408 | curr = first; |
6409 | idesc = md.slot[curr].idesc; | |
6410 | end_of_insn_group = 0; | |
9b505842 | 6411 | last_slot = -1; |
800eeca4 JW |
6412 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6413 | { | |
d6e78c11 | 6414 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6415 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6416 | unw_rec_list *end_ptr = NULL; | |
6417 | ||
d6e78c11 JW |
6418 | if (ptr) |
6419 | { | |
6420 | /* Find the last prologue/body record in the list for the current | |
6421 | insn, and set the slot number for all records up to that point. | |
6422 | This needs to be done now, because prologue/body records refer to | |
6423 | the current point, not the point after the instruction has been | |
6424 | issued. This matters because there may have been nops emitted | |
6425 | meanwhile. Any non-prologue non-body record followed by a | |
6426 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6427 | unw_rec_list *last_ptr; |
6428 | ||
6429 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6430 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6431 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6432 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6433 | || ptr->r.type == body) | |
6434 | last_ptr = ptr; | |
6435 | if (last_ptr) | |
6436 | { | |
6437 | /* Make last_ptr point one after the last prologue/body | |
6438 | record. */ | |
6439 | last_ptr = last_ptr->next; | |
6440 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6441 | ptr = ptr->next) | |
6442 | { | |
6443 | ptr->slot_number = (unsigned long) f + i; | |
6444 | ptr->slot_frag = frag_now; | |
6445 | } | |
6446 | /* Remove the initialized records, so that we won't accidentally | |
6447 | update them again if we insert a nop and continue. */ | |
6448 | md.slot[curr].unwind_record = last_ptr; | |
6449 | } | |
6450 | } | |
e0c9811a | 6451 | |
f4660e2c JB |
6452 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6453 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6454 | { |
f4660e2c JB |
6455 | if (curr == first) |
6456 | manual_bundling = 1; | |
800eeca4 | 6457 | else |
f4660e2c JB |
6458 | break; /* Need to start a new bundle. */ |
6459 | } | |
6460 | ||
744b6414 JW |
6461 | /* If this instruction specifies a template, then it must be the first |
6462 | instruction of a bundle. */ | |
6463 | if (curr != first && md.slot[curr].user_template >= 0) | |
6464 | break; | |
6465 | ||
f4660e2c JB |
6466 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6467 | { | |
6468 | if (manual_bundling && !manual_bundling_off) | |
6469 | { | |
6470 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6471 | _("`%s' must be last in bundle"), idesc->name); |
f4660e2c JB |
6472 | if (i < 2) |
6473 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6474 | } | |
6475 | i = 2; | |
800eeca4 JW |
6476 | } |
6477 | if (idesc->flags & IA64_OPCODE_LAST) | |
6478 | { | |
2434f565 JW |
6479 | int required_slot; |
6480 | unsigned int required_template; | |
800eeca4 JW |
6481 | |
6482 | /* If we need a stop bit after an M slot, our only choice is | |
6483 | template 5 (M;;MI). If we need a stop bit after a B | |
6484 | slot, our only choice is to place it at the end of the | |
6485 | bundle, because the only available templates are MIB, | |
6486 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6487 | than M and B slots because these are the only kind of | |
6488 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
d3ce72d0 | 6489 | required_template = template_val; |
800eeca4 JW |
6490 | switch (idesc->type) |
6491 | { | |
6492 | case IA64_TYPE_M: | |
6493 | required_slot = 0; | |
6494 | required_template = 5; | |
6495 | break; | |
6496 | ||
6497 | case IA64_TYPE_B: | |
6498 | required_slot = 2; | |
6499 | break; | |
6500 | ||
6501 | default: | |
6502 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 NC |
6503 | _("Internal error: don't know how to force %s to end of instruction group"), |
6504 | idesc->name); | |
800eeca4 JW |
6505 | required_slot = i; |
6506 | break; | |
6507 | } | |
f4660e2c JB |
6508 | if (manual_bundling |
6509 | && (i > required_slot | |
6510 | || (required_slot == 2 && !manual_bundling_off) | |
6511 | || (user_template >= 0 | |
6512 | /* Changing from MMI to M;MI is OK. */ | |
d3ce72d0 | 6513 | && (template_val ^ required_template) > 1))) |
f4660e2c JB |
6514 | { |
6515 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6516 | _("`%s' must be last in instruction group"), |
f4660e2c JB |
6517 | idesc->name); |
6518 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6519 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6520 | } | |
800eeca4 JW |
6521 | if (required_slot < i) |
6522 | /* Can't fit this instruction. */ | |
6523 | break; | |
6524 | ||
6525 | i = required_slot; | |
d3ce72d0 | 6526 | if (required_template != template_val) |
800eeca4 JW |
6527 | { |
6528 | /* If we switch the template, we need to reset the NOPs | |
6529 | after slot i. The slot-types of the instructions ahead | |
6530 | of i never change, so we don't need to worry about | |
6531 | changing NOPs in front of this slot. */ | |
6532 | for (j = i; j < 3; ++j) | |
6533 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
53022e4a JW |
6534 | |
6535 | /* We just picked a template that includes the stop bit in the | |
6536 | middle, so we don't need another one emitted later. */ | |
6537 | md.slot[curr].end_of_insn_group = 0; | |
800eeca4 | 6538 | } |
d3ce72d0 | 6539 | template_val = required_template; |
800eeca4 JW |
6540 | } |
6541 | if (curr != first && md.slot[curr].label_fixups) | |
6542 | { | |
f4660e2c JB |
6543 | if (manual_bundling) |
6544 | { | |
6545 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6546 | _("Label must be first in a bundle")); |
f4660e2c JB |
6547 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6548 | } | |
800eeca4 JW |
6549 | /* This insn must go into the first slot of a bundle. */ |
6550 | break; | |
6551 | } | |
6552 | ||
800eeca4 JW |
6553 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6554 | { | |
6555 | /* We need an instruction group boundary in the middle of a | |
6556 | bundle. See if we can switch to an other template with | |
6557 | an appropriate boundary. */ | |
6558 | ||
d3ce72d0 | 6559 | orig_template = template_val; |
800eeca4 JW |
6560 | if (i == 1 && (user_template == 4 |
6561 | || (user_template < 0 | |
d3ce72d0 | 6562 | && (ia64_templ_desc[template_val].exec_unit[0] |
800eeca4 JW |
6563 | == IA64_UNIT_M)))) |
6564 | { | |
d3ce72d0 | 6565 | template_val = 5; |
800eeca4 JW |
6566 | end_of_insn_group = 0; |
6567 | } | |
6568 | else if (i == 2 && (user_template == 0 | |
6569 | || (user_template < 0 | |
d3ce72d0 | 6570 | && (ia64_templ_desc[template_val].exec_unit[1] |
800eeca4 JW |
6571 | == IA64_UNIT_I))) |
6572 | /* This test makes sure we don't switch the template if | |
6573 | the next instruction is one that needs to be first in | |
6574 | an instruction group. Since all those instructions are | |
6575 | in the M group, there is no way such an instruction can | |
6576 | fit in this bundle even if we switch the template. The | |
6577 | reason we have to check for this is that otherwise we | |
6578 | may end up generating "MI;;I M.." which has the deadly | |
6579 | effect that the second M instruction is no longer the | |
f4660e2c | 6580 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6581 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6582 | { | |
d3ce72d0 | 6583 | template_val = 1; |
800eeca4 JW |
6584 | end_of_insn_group = 0; |
6585 | } | |
f4660e2c JB |
6586 | else if (i == 1 |
6587 | && user_template == 0 | |
6588 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6589 | /* Use the next slot. */ | |
6590 | continue; | |
800eeca4 JW |
6591 | else if (curr != first) |
6592 | /* can't fit this insn */ | |
6593 | break; | |
6594 | ||
d3ce72d0 | 6595 | if (template_val != orig_template) |
800eeca4 JW |
6596 | /* if we switch the template, we need to reset the NOPs |
6597 | after slot i. The slot-types of the instructions ahead | |
6598 | of i never change, so we don't need to worry about | |
6599 | changing NOPs in front of this slot. */ | |
6600 | for (j = i; j < 3; ++j) | |
d3ce72d0 | 6601 | insn[j] = nop[ia64_templ_desc[template_val].exec_unit[j]]; |
800eeca4 | 6602 | } |
d3ce72d0 | 6603 | required_unit = ia64_templ_desc[template_val].exec_unit[i]; |
800eeca4 | 6604 | |
c10d9d8f | 6605 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6606 | if (idesc->type == IA64_TYPE_DYN) |
6607 | { | |
97762d08 JB |
6608 | enum ia64_opnd opnd1, opnd2; |
6609 | ||
800eeca4 JW |
6610 | if ((strcmp (idesc->name, "nop") == 0) |
6611 | || (strcmp (idesc->name, "break") == 0)) | |
6612 | insn_unit = required_unit; | |
91d777ee L |
6613 | else if (strcmp (idesc->name, "hint") == 0) |
6614 | { | |
6615 | insn_unit = required_unit; | |
6616 | if (required_unit == IA64_UNIT_B) | |
6617 | { | |
6618 | switch (md.hint_b) | |
6619 | { | |
6620 | case hint_b_ok: | |
6621 | break; | |
6622 | case hint_b_warning: | |
ad4b42b4 | 6623 | as_warn (_("hint in B unit may be treated as nop")); |
91d777ee L |
6624 | break; |
6625 | case hint_b_error: | |
6626 | /* When manual bundling is off and there is no | |
6627 | user template, we choose a different unit so | |
6628 | that hint won't go into the current slot. We | |
6629 | will fill the current bundle with nops and | |
6630 | try to put hint into the next bundle. */ | |
6631 | if (!manual_bundling && user_template < 0) | |
6632 | insn_unit = IA64_UNIT_I; | |
6633 | else | |
ad4b42b4 | 6634 | as_bad (_("hint in B unit can't be used")); |
91d777ee L |
6635 | break; |
6636 | } | |
6637 | } | |
6638 | } | |
97762d08 JB |
6639 | else if (strcmp (idesc->name, "chk.s") == 0 |
6640 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6641 | { |
6642 | insn_unit = IA64_UNIT_M; | |
97762d08 | 6643 | if (required_unit == IA64_UNIT_I |
d3ce72d0 | 6644 | || (required_unit == IA64_UNIT_F && template_val == 6)) |
800eeca4 JW |
6645 | insn_unit = IA64_UNIT_I; |
6646 | } | |
6647 | else | |
ad4b42b4 | 6648 | as_fatal (_("emit_one_bundle: unexpected dynamic op")); |
800eeca4 | 6649 | |
f9f21a03 L |
6650 | snprintf (mnemonic, sizeof (mnemonic), "%s.%c", |
6651 | idesc->name, "?imbfxx"[insn_unit]); | |
97762d08 JB |
6652 | opnd1 = idesc->operands[0]; |
6653 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6654 | ia64_free_opcode (idesc); |
97762d08 JB |
6655 | idesc = ia64_find_opcode (mnemonic); |
6656 | /* moves to/from ARs have collisions */ | |
6657 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6658 | { | |
6659 | while (idesc != NULL | |
6660 | && (idesc->operands[0] != opnd1 | |
6661 | || idesc->operands[1] != opnd2)) | |
6662 | idesc = get_next_opcode (idesc); | |
6663 | } | |
97762d08 | 6664 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6665 | } |
6666 | else | |
6667 | { | |
6668 | insn_type = idesc->type; | |
6669 | insn_unit = IA64_UNIT_NIL; | |
6670 | switch (insn_type) | |
6671 | { | |
6672 | case IA64_TYPE_A: | |
6673 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6674 | insn_unit = required_unit; | |
6675 | break; | |
542d6675 | 6676 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6677 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6678 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6679 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6680 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6681 | default: break; | |
6682 | } | |
6683 | } | |
6684 | ||
6685 | if (insn_unit != required_unit) | |
9b505842 | 6686 | continue; /* Try next slot. */ |
800eeca4 | 6687 | |
07a53e5c RH |
6688 | /* Now is a good time to fix up the labels for this insn. */ |
6689 | mark_label = FALSE; | |
6690 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) | |
6691 | { | |
6692 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6693 | symbol_set_frag (lfix->sym, frag_now); | |
6694 | mark_label |= lfix->dw2_mark_labels; | |
6695 | } | |
6696 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6697 | { | |
6698 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6699 | symbol_set_frag (lfix->sym, frag_now); | |
6700 | } | |
6701 | ||
6702 | if (debug_type == DEBUG_DWARF2 | |
6703 | || md.slot[curr].loc_directive_seen | |
6704 | || mark_label) | |
196e8040 JW |
6705 | { |
6706 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6707 | |
196e8040 | 6708 | md.slot[curr].loc_directive_seen = 0; |
07a53e5c RH |
6709 | if (mark_label) |
6710 | md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
6711 | ||
196e8040 JW |
6712 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); |
6713 | } | |
800eeca4 JW |
6714 | |
6715 | build_insn (md.slot + curr, insn + i); | |
6716 | ||
d6e78c11 JW |
6717 | ptr = md.slot[curr].unwind_record; |
6718 | if (ptr) | |
6719 | { | |
6720 | /* Set slot numbers for all remaining unwind records belonging to the | |
6721 | current insn. There can not be any prologue/body unwind records | |
6722 | here. */ | |
d6e78c11 JW |
6723 | for (; ptr != end_ptr; ptr = ptr->next) |
6724 | { | |
6725 | ptr->slot_number = (unsigned long) f + i; | |
6726 | ptr->slot_frag = frag_now; | |
6727 | } | |
6728 | md.slot[curr].unwind_record = NULL; | |
6729 | } | |
10850f29 | 6730 | |
800eeca4 JW |
6731 | if (required_unit == IA64_UNIT_L) |
6732 | { | |
6733 | know (i == 1); | |
6734 | /* skip one slot for long/X-unit instructions */ | |
6735 | ++i; | |
6736 | } | |
6737 | --md.num_slots_in_use; | |
9b505842 | 6738 | last_slot = i; |
800eeca4 | 6739 | |
800eeca4 JW |
6740 | for (j = 0; j < md.slot[curr].num_fixups; ++j) |
6741 | { | |
6742 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6743 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6744 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6745 | fix->tc_fix_data.opnd = ifix->opnd; | |
800eeca4 JW |
6746 | fix->fx_file = md.slot[curr].src_file; |
6747 | fix->fx_line = md.slot[curr].src_line; | |
6748 | } | |
6749 | ||
6750 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6751 | ||
542d6675 | 6752 | /* clear slot: */ |
800eeca4 JW |
6753 | ia64_free_opcode (md.slot[curr].idesc); |
6754 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6755 | md.slot[curr].user_template = -1; | |
6756 | ||
6757 | if (manual_bundling_off) | |
6758 | { | |
6759 | manual_bundling = 0; | |
6760 | break; | |
6761 | } | |
6762 | curr = (curr + 1) % NUM_SLOTS; | |
6763 | idesc = md.slot[curr].idesc; | |
6764 | } | |
6abae71c JW |
6765 | |
6766 | /* A user template was specified, but the first following instruction did | |
6767 | not fit. This can happen with or without manual bundling. */ | |
6768 | if (md.num_slots_in_use > 0 && last_slot < 0) | |
6769 | { | |
6770 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6771 | _("`%s' does not fit into %s template"), |
d3ce72d0 | 6772 | idesc->name, ia64_templ_desc[template_val].name); |
6abae71c JW |
6773 | /* Drop first insn so we don't livelock. */ |
6774 | --md.num_slots_in_use; | |
6775 | know (curr == first); | |
6776 | ia64_free_opcode (md.slot[curr].idesc); | |
6777 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6778 | md.slot[curr].user_template = -1; | |
6779 | } | |
6780 | else if (manual_bundling > 0) | |
800eeca4 JW |
6781 | { |
6782 | if (md.num_slots_in_use > 0) | |
ac025970 | 6783 | { |
9b505842 JB |
6784 | if (last_slot >= 2) |
6785 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6786 | _("`%s' does not fit into bundle"), idesc->name); |
9b505842 JB |
6787 | else |
6788 | { | |
6789 | const char *where; | |
6790 | ||
d3ce72d0 | 6791 | if (template_val == 2) |
9b505842 JB |
6792 | where = "X slot"; |
6793 | else if (last_slot == 0) | |
6794 | where = "slots 2 or 3"; | |
6795 | else | |
6796 | where = "slot 3"; | |
6797 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6798 | _("`%s' can't go in %s of %s template"), |
d3ce72d0 | 6799 | idesc->name, where, ia64_templ_desc[template_val].name); |
9b505842 | 6800 | } |
ac025970 | 6801 | } |
800eeca4 JW |
6802 | else |
6803 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6804 | _("Missing '}' at end of file")); |
800eeca4 | 6805 | } |
6abae71c | 6806 | |
800eeca4 JW |
6807 | know (md.num_slots_in_use < NUM_SLOTS); |
6808 | ||
d3ce72d0 | 6809 | t0 = end_of_insn_group | (template_val << 1) | (insn[0] << 5) | (insn[1] << 46); |
800eeca4 JW |
6810 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); |
6811 | ||
44f5c83a JW |
6812 | number_to_chars_littleendian (f + 0, t0, 8); |
6813 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
6814 | } |
6815 | ||
6816 | int | |
5a49b8ac | 6817 | md_parse_option (int c, char *arg) |
800eeca4 | 6818 | { |
7463c317 | 6819 | |
800eeca4 JW |
6820 | switch (c) |
6821 | { | |
c43c2cc5 | 6822 | /* Switches from the Intel assembler. */ |
44f5c83a | 6823 | case 'm': |
800eeca4 JW |
6824 | if (strcmp (arg, "ilp64") == 0 |
6825 | || strcmp (arg, "lp64") == 0 | |
6826 | || strcmp (arg, "p64") == 0) | |
6827 | { | |
6828 | md.flags |= EF_IA_64_ABI64; | |
6829 | } | |
6830 | else if (strcmp (arg, "ilp32") == 0) | |
6831 | { | |
6832 | md.flags &= ~EF_IA_64_ABI64; | |
6833 | } | |
6834 | else if (strcmp (arg, "le") == 0) | |
6835 | { | |
6836 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6837 | default_big_endian = 0; |
800eeca4 JW |
6838 | } |
6839 | else if (strcmp (arg, "be") == 0) | |
6840 | { | |
6841 | md.flags |= EF_IA_64_BE; | |
549f748d | 6842 | default_big_endian = 1; |
800eeca4 | 6843 | } |
970d6792 L |
6844 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6845 | { | |
6846 | arg += 13; | |
6847 | if (strcmp (arg, "warning") == 0) | |
6848 | md.unwind_check = unwind_check_warning; | |
6849 | else if (strcmp (arg, "error") == 0) | |
6850 | md.unwind_check = unwind_check_error; | |
6851 | else | |
6852 | return 0; | |
6853 | } | |
91d777ee L |
6854 | else if (strncmp (arg, "hint.b=", 7) == 0) |
6855 | { | |
6856 | arg += 7; | |
6857 | if (strcmp (arg, "ok") == 0) | |
6858 | md.hint_b = hint_b_ok; | |
6859 | else if (strcmp (arg, "warning") == 0) | |
6860 | md.hint_b = hint_b_warning; | |
6861 | else if (strcmp (arg, "error") == 0) | |
6862 | md.hint_b = hint_b_error; | |
6863 | else | |
6864 | return 0; | |
6865 | } | |
8c2fda1d L |
6866 | else if (strncmp (arg, "tune=", 5) == 0) |
6867 | { | |
6868 | arg += 5; | |
6869 | if (strcmp (arg, "itanium1") == 0) | |
6870 | md.tune = itanium1; | |
6871 | else if (strcmp (arg, "itanium2") == 0) | |
6872 | md.tune = itanium2; | |
6873 | else | |
6874 | return 0; | |
6875 | } | |
800eeca4 JW |
6876 | else |
6877 | return 0; | |
6878 | break; | |
6879 | ||
6880 | case 'N': | |
6881 | if (strcmp (arg, "so") == 0) | |
6882 | { | |
542d6675 | 6883 | /* Suppress signon message. */ |
800eeca4 JW |
6884 | } |
6885 | else if (strcmp (arg, "pi") == 0) | |
6886 | { | |
6887 | /* Reject privileged instructions. FIXME */ | |
6888 | } | |
6889 | else if (strcmp (arg, "us") == 0) | |
6890 | { | |
6891 | /* Allow union of signed and unsigned range. FIXME */ | |
6892 | } | |
6893 | else if (strcmp (arg, "close_fcalls") == 0) | |
6894 | { | |
6895 | /* Do not resolve global function calls. */ | |
6896 | } | |
6897 | else | |
6898 | return 0; | |
6899 | break; | |
6900 | ||
6901 | case 'C': | |
6902 | /* temp[="prefix"] Insert temporary labels into the object file | |
6903 | symbol table prefixed by "prefix". | |
6904 | Default prefix is ":temp:". | |
6905 | */ | |
6906 | break; | |
6907 | ||
6908 | case 'a': | |
800eeca4 JW |
6909 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6910 | according to <tgt> -- | |
6911 | exit: branch out from the current context (default) | |
6912 | labels: all labels in context may be branch targets | |
6913 | */ | |
85b40035 L |
6914 | if (strncmp (arg, "indirect=", 9) != 0) |
6915 | return 0; | |
800eeca4 JW |
6916 | break; |
6917 | ||
6918 | case 'x': | |
6919 | /* -X conflicts with an ignored option, use -x instead */ | |
6920 | md.detect_dv = 1; | |
6921 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6922 | { |
6923 | /* set default mode to explicit */ | |
6924 | md.default_explicit_mode = 1; | |
6925 | break; | |
6926 | } | |
800eeca4 | 6927 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6928 | { |
6929 | md.default_explicit_mode = 0; | |
6930 | } | |
f1dab70d JB |
6931 | else if (strcmp (arg, "none") == 0) |
6932 | { | |
6933 | md.detect_dv = 0; | |
6934 | } | |
800eeca4 | 6935 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6936 | { |
6937 | md.debug_dv = 1; | |
6938 | } | |
800eeca4 | 6939 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6940 | { |
6941 | md.default_explicit_mode = 1; | |
6942 | md.debug_dv = 1; | |
6943 | } | |
f1dab70d JB |
6944 | else if (strcmp (arg, "debugn") == 0) |
6945 | { | |
6946 | md.debug_dv = 1; | |
6947 | md.detect_dv = 0; | |
6948 | } | |
800eeca4 | 6949 | else |
542d6675 KH |
6950 | { |
6951 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6952 | } | |
800eeca4 JW |
6953 | break; |
6954 | ||
6955 | case 'S': | |
6956 | /* nops Print nops statistics. */ | |
6957 | break; | |
6958 | ||
c43c2cc5 JW |
6959 | /* GNU specific switches for gcc. */ |
6960 | case OPTION_MCONSTANT_GP: | |
6961 | md.flags |= EF_IA_64_CONS_GP; | |
6962 | break; | |
6963 | ||
6964 | case OPTION_MAUTO_PIC: | |
6965 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6966 | break; | |
6967 | ||
800eeca4 JW |
6968 | default: |
6969 | return 0; | |
6970 | } | |
6971 | ||
6972 | return 1; | |
6973 | } | |
6974 | ||
6975 | void | |
5a49b8ac | 6976 | md_show_usage (FILE *stream) |
800eeca4 | 6977 | { |
542d6675 | 6978 | fputs (_("\ |
800eeca4 | 6979 | IA-64 options:\n\ |
6290819d NC |
6980 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6981 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6982 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6983 | without function descriptors (sets ELF header flag\n\ | |
6984 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6985 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6986 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
6987 | -mtune=[itanium1|itanium2]\n\ |
6988 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
6989 | -munwind-check=[warning|error]\n\ |
6990 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
6991 | -mhint.b=[ok|warning|error]\n\ |
6992 | hint.b check (default -mhint.b=error)\n\ | |
f1dab70d JB |
6993 | -x | -xexplicit turn on dependency violation checking\n\ |
6994 | -xauto automagically remove dependency violations (default)\n\ | |
6995 | -xnone turn off dependency violation checking\n\ | |
6996 | -xdebug debug dependency violation checker\n\ | |
6997 | -xdebugn debug dependency violation checker but turn off\n\ | |
6998 | dependency violation checking\n\ | |
6999 | -xdebugx debug dependency violation checker and turn on\n\ | |
7000 | dependency violation checking\n"), | |
800eeca4 JW |
7001 | stream); |
7002 | } | |
7003 | ||
acebd4ce | 7004 | void |
5a49b8ac | 7005 | ia64_after_parse_args (void) |
acebd4ce AS |
7006 | { |
7007 | if (debug_type == DEBUG_STABS) | |
7008 | as_fatal (_("--gstabs is not supported for ia64")); | |
7009 | } | |
7010 | ||
44576e1f RH |
7011 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7012 | ||
7013 | static int | |
800eeca4 JW |
7014 | match (int templ, int type, int slot) |
7015 | { | |
7016 | enum ia64_unit unit; | |
7017 | int result; | |
7018 | ||
7019 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7020 | switch (type) | |
7021 | { | |
7022 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7023 | case IA64_TYPE_A: | |
7024 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7025 | break; | |
7026 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7027 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7028 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7029 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7030 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7031 | default: result = 0; break; | |
7032 | } | |
7033 | return result; | |
7034 | } | |
7035 | ||
7c06efaa JW |
7036 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7037 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7038 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7039 | |
7040 | static inline int | |
7041 | extra_goodness (int templ, int slot) | |
7042 | { | |
8c2fda1d L |
7043 | switch (md.tune) |
7044 | { | |
7045 | case itanium1: | |
7046 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7047 | return 2; | |
7048 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7049 | return 1; | |
7050 | else | |
7051 | return 0; | |
7052 | break; | |
7053 | case itanium2: | |
7054 | if (match (templ, IA64_TYPE_M, slot) | |
7055 | || match (templ, IA64_TYPE_I, slot)) | |
7056 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7057 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7058 | branch-prediction. */ | |
7059 | return 2; | |
7060 | else | |
7061 | return 0; | |
7062 | break; | |
7063 | default: | |
7064 | abort (); | |
7065 | return 0; | |
7066 | } | |
44576e1f RH |
7067 | } |
7068 | ||
800eeca4 JW |
7069 | /* This function is called once, at assembler startup time. It sets |
7070 | up all the tables, etc. that the MD part of the assembler will need | |
7071 | that can be determined before arguments are parsed. */ | |
7072 | void | |
5a49b8ac | 7073 | md_begin (void) |
800eeca4 | 7074 | { |
8b84be9d | 7075 | int i, j, k, t, goodness, best, ok; |
800eeca4 JW |
7076 | const char *err; |
7077 | char name[8]; | |
7078 | ||
7079 | md.auto_align = 1; | |
7080 | md.explicit_mode = md.default_explicit_mode; | |
7081 | ||
7082 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7083 | ||
0234cb7c | 7084 | /* Make sure function pointers get initialized. */ |
10a98291 | 7085 | target_big_endian = -1; |
549f748d | 7086 | dot_byteorder (default_big_endian); |
10a98291 | 7087 | |
35f5df7f L |
7088 | alias_hash = hash_new (); |
7089 | alias_name_hash = hash_new (); | |
7090 | secalias_hash = hash_new (); | |
7091 | secalias_name_hash = hash_new (); | |
7092 | ||
13ae64f3 JJ |
7093 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7094 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7095 | &zero_address_frag); | |
7096 | ||
7097 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7098 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7099 | &zero_address_frag); | |
7100 | ||
800eeca4 | 7101 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7102 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7103 | &zero_address_frag); | |
800eeca4 JW |
7104 | |
7105 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7106 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7107 | &zero_address_frag); | |
800eeca4 JW |
7108 | |
7109 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7110 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7111 | &zero_address_frag); | |
800eeca4 | 7112 | |
fa2c7eff RH |
7113 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7114 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7115 | &zero_address_frag); | |
7116 | ||
c67e42c9 | 7117 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7118 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7119 | &zero_address_frag); | |
c67e42c9 | 7120 | |
800eeca4 | 7121 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7122 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7123 | &zero_address_frag); | |
800eeca4 JW |
7124 | |
7125 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7126 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7127 | &zero_address_frag); | |
800eeca4 JW |
7128 | |
7129 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7130 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7131 | &zero_address_frag); | |
800eeca4 | 7132 | |
13ae64f3 JJ |
7133 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7134 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7135 | &zero_address_frag); | |
7136 | ||
800eeca4 | 7137 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7138 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7139 | &zero_address_frag); | |
800eeca4 JW |
7140 | |
7141 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7142 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7143 | &zero_address_frag); | |
800eeca4 | 7144 | |
13ae64f3 JJ |
7145 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7146 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7147 | &zero_address_frag); | |
7148 | ||
7149 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7150 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7151 | &zero_address_frag); | |
7152 | ||
7153 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7154 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7155 | &zero_address_frag); | |
7156 | ||
3969b680 RH |
7157 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7158 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7159 | &zero_address_frag); | |
7160 | ||
f6fe78d6 JW |
7161 | if (md.tune != itanium1) |
7162 | { | |
7163 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7164 | le_nop[0] = 0x8; | |
7165 | le_nop_stop[0] = 0x9; | |
7166 | } | |
7167 | ||
197865e8 | 7168 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7169 | base 4 value, in which each match counts for 3. Match-failures |
7170 | result in NOPs and we use extra_goodness() to pick the execution | |
7171 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7172 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7173 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7174 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7175 | { | |
7176 | best = 0; | |
7177 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7178 | { | |
7179 | goodness = 0; | |
7180 | if (match (t, i, 0)) | |
7181 | { | |
7182 | if (match (t, j, 1)) | |
7183 | { | |
286cee81 | 7184 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7185 | goodness = 3 + 3 + 3; |
800eeca4 | 7186 | else |
44576e1f | 7187 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7188 | } |
7189 | else if (match (t, j, 2)) | |
44576e1f | 7190 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7191 | else |
44576e1f RH |
7192 | { |
7193 | goodness = 3; | |
7194 | goodness += extra_goodness (t, 1); | |
7195 | goodness += extra_goodness (t, 2); | |
7196 | } | |
800eeca4 JW |
7197 | } |
7198 | else if (match (t, i, 1)) | |
7199 | { | |
286cee81 | 7200 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7201 | goodness = 3 + 3; |
800eeca4 | 7202 | else |
44576e1f | 7203 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7204 | } |
7205 | else if (match (t, i, 2)) | |
44576e1f | 7206 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7207 | |
7208 | if (goodness > best) | |
7209 | { | |
7210 | best = goodness; | |
7211 | best_template[i][j][k] = t; | |
7212 | } | |
7213 | } | |
7214 | } | |
7215 | ||
7c06efaa JW |
7216 | #ifdef DEBUG_TEMPLATES |
7217 | /* For debugging changes to the best_template calculations. We don't care | |
7218 | about combinations with invalid instructions, so start the loops at 1. */ | |
7219 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7220 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7221 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7222 | { | |
7223 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7224 | 'x', 'd' }; | |
7225 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7226 | type_letter[k], | |
7227 | ia64_templ_desc[best_template[i][j][k]].name); | |
7228 | } | |
7229 | #endif | |
7230 | ||
800eeca4 JW |
7231 | for (i = 0; i < NUM_SLOTS; ++i) |
7232 | md.slot[i].user_template = -1; | |
7233 | ||
7234 | md.pseudo_hash = hash_new (); | |
7235 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7236 | { | |
7237 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7238 | (void *) (pseudo_opcode + i)); | |
7239 | if (err) | |
ad4b42b4 | 7240 | as_fatal (_("ia64.md_begin: can't hash `%s': %s"), |
800eeca4 JW |
7241 | pseudo_opcode[i].name, err); |
7242 | } | |
7243 | ||
7244 | md.reg_hash = hash_new (); | |
7245 | md.dynreg_hash = hash_new (); | |
7246 | md.const_hash = hash_new (); | |
7247 | md.entry_hash = hash_new (); | |
7248 | ||
542d6675 | 7249 | /* general registers: */ |
8b84be9d JB |
7250 | declare_register_set ("r", 128, REG_GR); |
7251 | declare_register ("gp", REG_GR + 1); | |
7252 | declare_register ("sp", REG_GR + 12); | |
7253 | declare_register ("tp", REG_GR + 13); | |
7254 | declare_register_set ("ret", 4, REG_GR + 8); | |
800eeca4 | 7255 | |
542d6675 | 7256 | /* floating point registers: */ |
8b84be9d JB |
7257 | declare_register_set ("f", 128, REG_FR); |
7258 | declare_register_set ("farg", 8, REG_FR + 8); | |
7259 | declare_register_set ("fret", 8, REG_FR + 8); | |
800eeca4 | 7260 | |
542d6675 | 7261 | /* branch registers: */ |
8b84be9d JB |
7262 | declare_register_set ("b", 8, REG_BR); |
7263 | declare_register ("rp", REG_BR + 0); | |
800eeca4 | 7264 | |
8b84be9d JB |
7265 | /* predicate registers: */ |
7266 | declare_register_set ("p", 64, REG_P); | |
7267 | declare_register ("pr", REG_PR); | |
7268 | declare_register ("pr.rot", REG_PR_ROT); | |
800eeca4 | 7269 | |
8b84be9d JB |
7270 | /* application registers: */ |
7271 | declare_register_set ("ar", 128, REG_AR); | |
5e0bd176 JB |
7272 | for (i = 0; i < NELEMS (ar); ++i) |
7273 | declare_register (ar[i].name, REG_AR + ar[i].regnum); | |
800eeca4 | 7274 | |
8b84be9d JB |
7275 | /* control registers: */ |
7276 | declare_register_set ("cr", 128, REG_CR); | |
5e0bd176 JB |
7277 | for (i = 0; i < NELEMS (cr); ++i) |
7278 | declare_register (cr[i].name, REG_CR + cr[i].regnum); | |
800eeca4 | 7279 | |
8b84be9d JB |
7280 | declare_register ("ip", REG_IP); |
7281 | declare_register ("cfm", REG_CFM); | |
7282 | declare_register ("psr", REG_PSR); | |
7283 | declare_register ("psr.l", REG_PSR_L); | |
7284 | declare_register ("psr.um", REG_PSR_UM); | |
7285 | ||
7286 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7287 | { | |
7288 | unsigned int regnum = indirect_reg[i].regnum; | |
7289 | ||
7290 | md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum); | |
7291 | } | |
800eeca4 | 7292 | |
542d6675 | 7293 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7294 | declare_register ("psp", REG_PSP); |
7295 | ||
800eeca4 JW |
7296 | for (i = 0; i < NELEMS (const_bits); ++i) |
7297 | { | |
7298 | err = hash_insert (md.const_hash, const_bits[i].name, | |
5a49b8ac | 7299 | (void *) (const_bits + i)); |
800eeca4 | 7300 | if (err) |
ad4b42b4 | 7301 | as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"), |
800eeca4 JW |
7302 | name, err); |
7303 | } | |
7304 | ||
44f5c83a JW |
7305 | /* Set the architecture and machine depending on defaults and command line |
7306 | options. */ | |
7307 | if (md.flags & EF_IA_64_ABI64) | |
7308 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7309 | else | |
7310 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7311 | ||
7312 | if (! ok) | |
7313 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7314 | |
557debba JW |
7315 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7316 | ||
7317 | if (md.flags & EF_IA_64_ABI64) | |
7318 | { | |
7319 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7320 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7321 | } | |
7322 | else | |
7323 | { | |
7324 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7325 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7326 | } | |
7327 | ||
800eeca4 JW |
7328 | md.mem_offset.hint = 0; |
7329 | md.path = 0; | |
7330 | md.maxpaths = 0; | |
7331 | md.entry_labels = NULL; | |
7332 | } | |
7333 | ||
970d6792 L |
7334 | /* Set the default options in md. Cannot do this in md_begin because |
7335 | that is called after md_parse_option which is where we set the | |
7336 | options in md based on command line options. */ | |
44f5c83a JW |
7337 | |
7338 | void | |
5a49b8ac | 7339 | ia64_init (int argc ATTRIBUTE_UNUSED, char **argv ATTRIBUTE_UNUSED) |
44f5c83a | 7340 | { |
1cd8ff38 | 7341 | md.flags = MD_FLAGS_DEFAULT; |
01e1a5bc NC |
7342 | #ifndef TE_VMS |
7343 | /* Don't turn on dependency checking for VMS, doesn't work. */ | |
f1dab70d | 7344 | md.detect_dv = 1; |
01e1a5bc | 7345 | #endif |
970d6792 L |
7346 | /* FIXME: We should change it to unwind_check_error someday. */ |
7347 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7348 | md.hint_b = hint_b_error; |
8c2fda1d | 7349 | md.tune = itanium2; |
44f5c83a JW |
7350 | } |
7351 | ||
7352 | /* Return a string for the target object file format. */ | |
7353 | ||
7354 | const char * | |
5a49b8ac | 7355 | ia64_target_format (void) |
44f5c83a JW |
7356 | { |
7357 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7358 | { | |
72a76794 JW |
7359 | if (md.flags & EF_IA_64_BE) |
7360 | { | |
7361 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7362 | #if defined(TE_AIX50) |
7463c317 | 7363 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7364 | #elif defined(TE_HPUX) |
7365 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7366 | #else |
72a76794 | 7367 | return "elf64-ia64-big"; |
7463c317 | 7368 | #endif |
72a76794 | 7369 | else |
1cd8ff38 | 7370 | #if defined(TE_AIX50) |
7463c317 | 7371 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7372 | #elif defined(TE_HPUX) |
7373 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7374 | #else |
72a76794 | 7375 | return "elf32-ia64-big"; |
7463c317 | 7376 | #endif |
72a76794 | 7377 | } |
44f5c83a | 7378 | else |
72a76794 JW |
7379 | { |
7380 | if (md.flags & EF_IA_64_ABI64) | |
01e1a5bc | 7381 | #if defined (TE_AIX50) |
7463c317 | 7382 | return "elf64-ia64-aix-little"; |
01e1a5bc NC |
7383 | #elif defined (TE_VMS) |
7384 | { | |
7385 | md.flags |= EF_IA_64_ARCHVER_1; | |
7386 | return "elf64-ia64-vms"; | |
7387 | } | |
7463c317 | 7388 | #else |
72a76794 | 7389 | return "elf64-ia64-little"; |
7463c317 | 7390 | #endif |
72a76794 | 7391 | else |
7463c317 TW |
7392 | #ifdef TE_AIX50 |
7393 | return "elf32-ia64-aix-little"; | |
7394 | #else | |
72a76794 | 7395 | return "elf32-ia64-little"; |
7463c317 | 7396 | #endif |
72a76794 | 7397 | } |
44f5c83a JW |
7398 | } |
7399 | else | |
7400 | return "unknown-format"; | |
7401 | } | |
7402 | ||
800eeca4 | 7403 | void |
5a49b8ac | 7404 | ia64_end_of_source (void) |
800eeca4 | 7405 | { |
542d6675 | 7406 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7407 | insn_group_break (1, 0, 0); |
7408 | ||
542d6675 | 7409 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7410 | ia64_flush_insns (); |
7411 | ||
7412 | bfd_set_private_flags (stdoutput, md.flags); | |
7413 | ||
800eeca4 JW |
7414 | md.mem_offset.hint = 0; |
7415 | } | |
7416 | ||
7417 | void | |
5a49b8ac | 7418 | ia64_start_line (void) |
800eeca4 | 7419 | { |
e4e8248d JB |
7420 | static int first; |
7421 | ||
7422 | if (!first) { | |
7423 | /* Make sure we don't reference input_line_pointer[-1] when that's | |
7424 | not valid. */ | |
7425 | first = 1; | |
7426 | return; | |
7427 | } | |
7428 | ||
f1bcba5b | 7429 | if (md.qp.X_op == O_register) |
ad4b42b4 | 7430 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
7431 | md.qp.X_op = O_absent; |
7432 | ||
7433 | if (ignore_input ()) | |
7434 | return; | |
7435 | ||
7436 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7437 | { | |
7438 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7439 | { |
7440 | static int warned; | |
7441 | ||
7442 | if (!warned) | |
7443 | { | |
7444 | warned = 1; | |
7445 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7446 | } | |
7447 | } | |
800eeca4 | 7448 | else |
542d6675 | 7449 | insn_group_break (1, 0, 0); |
800eeca4 | 7450 | } |
e4e8248d | 7451 | else if (input_line_pointer[-1] == '{') |
800eeca4 | 7452 | { |
800eeca4 | 7453 | if (md.manual_bundling) |
ad4b42b4 | 7454 | as_warn (_("Found '{' when manual bundling is already turned on")); |
800eeca4 JW |
7455 | else |
7456 | CURR_SLOT.manual_bundling_on = 1; | |
7457 | md.manual_bundling = 1; | |
7458 | ||
542d6675 KH |
7459 | /* Bundling is only acceptable in explicit mode |
7460 | or when in default automatic mode. */ | |
800eeca4 | 7461 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7462 | { |
7463 | if (!md.mode_explicitly_set | |
7464 | && !md.default_explicit_mode) | |
7465 | dot_dv_mode ('E'); | |
7466 | else | |
7467 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7468 | } | |
e4e8248d JB |
7469 | } |
7470 | else if (input_line_pointer[-1] == '}') | |
7471 | { | |
800eeca4 | 7472 | if (!md.manual_bundling) |
ad4b42b4 | 7473 | as_warn (_("Found '}' when manual bundling is off")); |
800eeca4 JW |
7474 | else |
7475 | PREV_SLOT.manual_bundling_off = 1; | |
7476 | md.manual_bundling = 0; | |
7477 | ||
7478 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7479 | if (md.detect_dv |
542d6675 KH |
7480 | && md.explicit_mode |
7481 | && !md.mode_explicitly_set | |
7482 | && !md.default_explicit_mode) | |
7483 | dot_dv_mode ('A'); | |
e4e8248d JB |
7484 | } |
7485 | } | |
800eeca4 | 7486 | |
e4e8248d JB |
7487 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7488 | labels. */ | |
7489 | static int defining_tag = 0; | |
7490 | ||
7491 | int | |
5a49b8ac | 7492 | ia64_unrecognized_line (int ch) |
e4e8248d JB |
7493 | { |
7494 | switch (ch) | |
7495 | { | |
7496 | case '(': | |
60d11e55 | 7497 | expression_and_evaluate (&md.qp); |
e4e8248d | 7498 | if (*input_line_pointer++ != ')') |
800eeca4 | 7499 | { |
ad4b42b4 | 7500 | as_bad (_("Expected ')'")); |
e4e8248d JB |
7501 | return 0; |
7502 | } | |
7503 | if (md.qp.X_op != O_register) | |
7504 | { | |
ad4b42b4 | 7505 | as_bad (_("Qualifying predicate expected")); |
e4e8248d JB |
7506 | return 0; |
7507 | } | |
7508 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7509 | { | |
ad4b42b4 | 7510 | as_bad (_("Predicate register expected")); |
e4e8248d | 7511 | return 0; |
800eeca4 | 7512 | } |
800eeca4 JW |
7513 | return 1; |
7514 | ||
f1bcba5b JW |
7515 | case '[': |
7516 | { | |
7517 | char *s; | |
7518 | char c; | |
7519 | symbolS *tag; | |
4d5a53ff | 7520 | int temp; |
f1bcba5b JW |
7521 | |
7522 | if (md.qp.X_op == O_register) | |
7523 | { | |
ad4b42b4 | 7524 | as_bad (_("Tag must come before qualifying predicate.")); |
f1bcba5b JW |
7525 | return 0; |
7526 | } | |
4d5a53ff JW |
7527 | |
7528 | /* This implements just enough of read_a_source_file in read.c to | |
7529 | recognize labels. */ | |
7530 | if (is_name_beginner (*input_line_pointer)) | |
7531 | { | |
7532 | s = input_line_pointer; | |
7533 | c = get_symbol_end (); | |
7534 | } | |
7535 | else if (LOCAL_LABELS_FB | |
3882b010 | 7536 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7537 | { |
7538 | temp = 0; | |
3882b010 | 7539 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7540 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7541 | fb_label_instance_inc (temp); | |
7542 | s = fb_label_name (temp, 0); | |
7543 | c = *input_line_pointer; | |
7544 | } | |
7545 | else | |
7546 | { | |
7547 | s = NULL; | |
7548 | c = '\0'; | |
7549 | } | |
f1bcba5b JW |
7550 | if (c != ':') |
7551 | { | |
7552 | /* Put ':' back for error messages' sake. */ | |
7553 | *input_line_pointer++ = ':'; | |
ad4b42b4 | 7554 | as_bad (_("Expected ':'")); |
f1bcba5b JW |
7555 | return 0; |
7556 | } | |
4d5a53ff | 7557 | |
f1bcba5b JW |
7558 | defining_tag = 1; |
7559 | tag = colon (s); | |
7560 | defining_tag = 0; | |
7561 | /* Put ':' back for error messages' sake. */ | |
7562 | *input_line_pointer++ = ':'; | |
7563 | if (*input_line_pointer++ != ']') | |
7564 | { | |
ad4b42b4 | 7565 | as_bad (_("Expected ']'")); |
f1bcba5b JW |
7566 | return 0; |
7567 | } | |
7568 | if (! tag) | |
7569 | { | |
ad4b42b4 | 7570 | as_bad (_("Tag name expected")); |
f1bcba5b JW |
7571 | return 0; |
7572 | } | |
7573 | return 1; | |
7574 | } | |
7575 | ||
800eeca4 JW |
7576 | default: |
7577 | break; | |
7578 | } | |
542d6675 KH |
7579 | |
7580 | /* Not a valid line. */ | |
7581 | return 0; | |
800eeca4 JW |
7582 | } |
7583 | ||
7584 | void | |
5a49b8ac | 7585 | ia64_frob_label (struct symbol *sym) |
800eeca4 JW |
7586 | { |
7587 | struct label_fix *fix; | |
7588 | ||
f1bcba5b JW |
7589 | /* Tags need special handling since they are not bundle breaks like |
7590 | labels. */ | |
7591 | if (defining_tag) | |
7592 | { | |
7593 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7594 | fix->sym = sym; | |
7595 | fix->next = CURR_SLOT.tag_fixups; | |
07a53e5c | 7596 | fix->dw2_mark_labels = FALSE; |
f1bcba5b JW |
7597 | CURR_SLOT.tag_fixups = fix; |
7598 | ||
7599 | return; | |
7600 | } | |
7601 | ||
800eeca4 JW |
7602 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7603 | { | |
7604 | md.last_text_seg = now_seg; | |
7605 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7606 | fix->sym = sym; | |
7607 | fix->next = CURR_SLOT.label_fixups; | |
07a53e5c | 7608 | fix->dw2_mark_labels = dwarf2_loc_mark_labels; |
800eeca4 JW |
7609 | CURR_SLOT.label_fixups = fix; |
7610 | ||
542d6675 | 7611 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7612 | if (md.path == md.maxpaths) |
542d6675 KH |
7613 | { |
7614 | md.maxpaths += 20; | |
7615 | md.entry_labels = (const char **) | |
7616 | xrealloc ((void *) md.entry_labels, | |
7617 | md.maxpaths * sizeof (char *)); | |
7618 | } | |
800eeca4 JW |
7619 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7620 | } | |
7621 | } | |
7622 | ||
936cf02e JW |
7623 | #ifdef TE_HPUX |
7624 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7625 | that are declared but unused. This routine removes declared, | |
7626 | unused symbols from an object. */ | |
7627 | int | |
5a49b8ac | 7628 | ia64_frob_symbol (struct symbol *sym) |
936cf02e JW |
7629 | { |
7630 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7631 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7632 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7633 | && ! S_IS_EXTERNAL (sym))) | |
7634 | return 1; | |
7635 | return 0; | |
7636 | } | |
7637 | #endif | |
7638 | ||
800eeca4 | 7639 | void |
5a49b8ac | 7640 | ia64_flush_pending_output (void) |
800eeca4 | 7641 | { |
4d5a53ff JW |
7642 | if (!md.keep_pending_output |
7643 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7644 | { |
7645 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7646 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7647 | insn_group_break (1, 0, 0); | |
7648 | ia64_flush_insns (); | |
7649 | } | |
7650 | } | |
7651 | ||
7652 | /* Do ia64-specific expression optimization. All that's done here is | |
7653 | to transform index expressions that are either due to the indexing | |
7654 | of rotating registers or due to the indexing of indirect register | |
7655 | sets. */ | |
7656 | int | |
5a49b8ac | 7657 | ia64_optimize_expr (expressionS *l, operatorT op, expressionS *r) |
800eeca4 | 7658 | { |
6a2375c6 JB |
7659 | if (op != O_index) |
7660 | return 0; | |
7661 | resolve_expression (l); | |
7662 | if (l->X_op == O_register) | |
800eeca4 | 7663 | { |
6a2375c6 JB |
7664 | unsigned num_regs = l->X_add_number >> 16; |
7665 | ||
7666 | resolve_expression (r); | |
7667 | if (num_regs) | |
800eeca4 | 7668 | { |
6a2375c6 JB |
7669 | /* Left side is a .rotX-allocated register. */ |
7670 | if (r->X_op != O_constant) | |
800eeca4 | 7671 | { |
ad4b42b4 | 7672 | as_bad (_("Rotating register index must be a non-negative constant")); |
6a2375c6 JB |
7673 | r->X_add_number = 0; |
7674 | } | |
7675 | else if ((valueT) r->X_add_number >= num_regs) | |
7676 | { | |
ad4b42b4 | 7677 | as_bad (_("Index out of range 0..%u"), num_regs - 1); |
800eeca4 JW |
7678 | r->X_add_number = 0; |
7679 | } | |
7680 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7681 | return 1; | |
7682 | } | |
6a2375c6 | 7683 | else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR) |
800eeca4 | 7684 | { |
6a2375c6 JB |
7685 | if (r->X_op != O_register |
7686 | || r->X_add_number < REG_GR | |
7687 | || r->X_add_number > REG_GR + 127) | |
800eeca4 | 7688 | { |
ad4b42b4 | 7689 | as_bad (_("Indirect register index must be a general register")); |
6a2375c6 | 7690 | r->X_add_number = REG_GR; |
800eeca4 JW |
7691 | } |
7692 | l->X_op = O_index; | |
8b84be9d | 7693 | l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID]; |
800eeca4 JW |
7694 | l->X_add_number = r->X_add_number; |
7695 | return 1; | |
7696 | } | |
7697 | } | |
ad4b42b4 | 7698 | as_bad (_("Index can only be applied to rotating or indirect registers")); |
6a2375c6 JB |
7699 | /* Fall back to some register use of which has as little as possible |
7700 | side effects, to minimize subsequent error messages. */ | |
7701 | l->X_op = O_register; | |
7702 | l->X_add_number = REG_GR + 3; | |
7703 | return 1; | |
800eeca4 JW |
7704 | } |
7705 | ||
7706 | int | |
5a49b8ac | 7707 | ia64_parse_name (char *name, expressionS *e, char *nextcharP) |
800eeca4 JW |
7708 | { |
7709 | struct const_desc *cdesc; | |
7710 | struct dynreg *dr = 0; | |
16a48f83 | 7711 | unsigned int idx; |
800eeca4 JW |
7712 | struct symbol *sym; |
7713 | char *end; | |
7714 | ||
16a48f83 JB |
7715 | if (*name == '@') |
7716 | { | |
7717 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7718 | ||
7719 | /* Find what relocation pseudo-function we're dealing with. */ | |
7720 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7721 | if (pseudo_func[idx].name | |
7722 | && pseudo_func[idx].name[0] == name[1] | |
7723 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7724 | { | |
7725 | pseudo_type = pseudo_func[idx].type; | |
7726 | break; | |
7727 | } | |
7728 | switch (pseudo_type) | |
7729 | { | |
7730 | case PSEUDO_FUNC_RELOC: | |
7731 | end = input_line_pointer; | |
7732 | if (*nextcharP != '(') | |
7733 | { | |
ad4b42b4 | 7734 | as_bad (_("Expected '('")); |
2f6d622e | 7735 | break; |
16a48f83 JB |
7736 | } |
7737 | /* Skip '('. */ | |
7738 | ++input_line_pointer; | |
7739 | expression (e); | |
7740 | if (*input_line_pointer != ')') | |
7741 | { | |
ad4b42b4 | 7742 | as_bad (_("Missing ')'")); |
16a48f83 JB |
7743 | goto done; |
7744 | } | |
7745 | /* Skip ')'. */ | |
7746 | ++input_line_pointer; | |
7747 | if (e->X_op != O_symbol) | |
7748 | { | |
7749 | if (e->X_op != O_pseudo_fixup) | |
7750 | { | |
ad4b42b4 | 7751 | as_bad (_("Not a symbolic expression")); |
16a48f83 JB |
7752 | goto done; |
7753 | } | |
7754 | if (idx != FUNC_LT_RELATIVE) | |
7755 | { | |
ad4b42b4 | 7756 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7757 | goto done; |
7758 | } | |
7759 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7760 | { | |
7761 | case FUNC_FPTR_RELATIVE: | |
7762 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7763 | case FUNC_DTP_MODULE: | |
7764 | idx = FUNC_LT_DTP_MODULE; break; | |
7765 | case FUNC_DTP_RELATIVE: | |
7766 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7767 | case FUNC_TP_RELATIVE: | |
7768 | idx = FUNC_LT_TP_RELATIVE; break; | |
7769 | default: | |
ad4b42b4 | 7770 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7771 | goto done; |
7772 | } | |
7773 | } | |
7774 | /* Make sure gas doesn't get rid of local symbols that are used | |
7775 | in relocs. */ | |
7776 | e->X_op = O_pseudo_fixup; | |
7777 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7778 | done: |
7779 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7780 | break; |
7781 | ||
7782 | case PSEUDO_FUNC_CONST: | |
7783 | e->X_op = O_constant; | |
7784 | e->X_add_number = pseudo_func[idx].u.ival; | |
7785 | break; | |
7786 | ||
7787 | case PSEUDO_FUNC_REG: | |
7788 | e->X_op = O_register; | |
7789 | e->X_add_number = pseudo_func[idx].u.ival; | |
7790 | break; | |
7791 | ||
7792 | default: | |
7793 | return 0; | |
7794 | } | |
16a48f83 JB |
7795 | return 1; |
7796 | } | |
7797 | ||
542d6675 | 7798 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7799 | sym = hash_find (md.reg_hash, name); |
7800 | if (sym) | |
7801 | { | |
7802 | e->X_op = O_register; | |
7803 | e->X_add_number = S_GET_VALUE (sym); | |
7804 | return 1; | |
7805 | } | |
7806 | ||
7807 | cdesc = hash_find (md.const_hash, name); | |
7808 | if (cdesc) | |
7809 | { | |
7810 | e->X_op = O_constant; | |
7811 | e->X_add_number = cdesc->value; | |
7812 | return 1; | |
7813 | } | |
7814 | ||
542d6675 | 7815 | /* check for inN, locN, or outN: */ |
26b810ce | 7816 | idx = 0; |
800eeca4 JW |
7817 | switch (name[0]) |
7818 | { | |
7819 | case 'i': | |
3882b010 | 7820 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7821 | { |
7822 | dr = &md.in; | |
26b810ce | 7823 | idx = 2; |
800eeca4 JW |
7824 | } |
7825 | break; | |
7826 | ||
7827 | case 'l': | |
3882b010 | 7828 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7829 | { |
7830 | dr = &md.loc; | |
26b810ce | 7831 | idx = 3; |
800eeca4 JW |
7832 | } |
7833 | break; | |
7834 | ||
7835 | case 'o': | |
3882b010 | 7836 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7837 | { |
7838 | dr = &md.out; | |
26b810ce | 7839 | idx = 3; |
800eeca4 JW |
7840 | } |
7841 | break; | |
7842 | ||
7843 | default: | |
7844 | break; | |
7845 | } | |
7846 | ||
26b810ce JB |
7847 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
7848 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 7849 | { |
26b810ce JB |
7850 | unsigned long regnum; |
7851 | ||
542d6675 | 7852 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
7853 | regnum = strtoul (name + idx, &end, 10); |
7854 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 7855 | { |
26b810ce | 7856 | if (regnum >= dr->num_regs) |
800eeca4 JW |
7857 | { |
7858 | if (!dr->num_regs) | |
ad4b42b4 | 7859 | as_bad (_("No current frame")); |
800eeca4 | 7860 | else |
ad4b42b4 | 7861 | as_bad (_("Register number out of range 0..%u"), |
542d6675 | 7862 | dr->num_regs - 1); |
800eeca4 JW |
7863 | regnum = 0; |
7864 | } | |
7865 | e->X_op = O_register; | |
7866 | e->X_add_number = dr->base + regnum; | |
7867 | return 1; | |
7868 | } | |
7869 | } | |
7870 | ||
20b36a95 JB |
7871 | end = alloca (strlen (name) + 1); |
7872 | strcpy (end, name); | |
7873 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
7874 | if ((dr = hash_find (md.dynreg_hash, name))) |
7875 | { | |
7876 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7877 | Store the base register number in the low 16 bits of |
7878 | X_add_number and the size of the register set in the top 16 | |
7879 | bits. */ | |
800eeca4 JW |
7880 | e->X_op = O_register; |
7881 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7882 | return 1; | |
7883 | } | |
7884 | return 0; | |
7885 | } | |
7886 | ||
7887 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7888 | ||
7889 | char * | |
5a49b8ac | 7890 | ia64_canonicalize_symbol_name (char *name) |
800eeca4 | 7891 | { |
20b36a95 JB |
7892 | size_t len = strlen (name), full = len; |
7893 | ||
7894 | while (len > 0 && name[len - 1] == '#') | |
7895 | --len; | |
7896 | if (len <= 0) | |
7897 | { | |
7898 | if (full > 0) | |
ad4b42b4 | 7899 | as_bad (_("Standalone `#' is illegal")); |
20b36a95 JB |
7900 | } |
7901 | else if (len < full - 1) | |
ad4b42b4 | 7902 | as_warn (_("Redundant `#' suffix operators")); |
20b36a95 | 7903 | name[len] = '\0'; |
800eeca4 JW |
7904 | return name; |
7905 | } | |
7906 | ||
3e37788f JW |
7907 | /* Return true if idesc is a conditional branch instruction. This excludes |
7908 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7909 | because they always read/write resources regardless of the value of the | |
7910 | qualifying predicate. br.ia must always use p0, and hence is always | |
7911 | taken. Thus this function returns true for branches which can fall | |
7912 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7913 | |
800eeca4 | 7914 | static int |
5a49b8ac | 7915 | is_conditional_branch (struct ia64_opcode *idesc) |
800eeca4 | 7916 | { |
1deb8127 | 7917 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7918 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7919 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7920 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7921 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7922 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7923 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7924 | || idesc->name[2] == 'l' | |
7925 | /* br.cond, br.call, br.clr */ | |
7926 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7927 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7928 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7929 | } |
7930 | ||
7931 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7932 | returns zero. */ |
7933 | ||
800eeca4 | 7934 | static int |
5a49b8ac | 7935 | is_taken_branch (struct ia64_opcode *idesc) |
800eeca4 JW |
7936 | { |
7937 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7938 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7939 | } |
7940 | ||
7941 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7942 | doubt, returns zero. */ |
7943 | ||
800eeca4 | 7944 | static int |
5a49b8ac | 7945 | is_interruption_or_rfi (struct ia64_opcode *idesc) |
800eeca4 JW |
7946 | { |
7947 | if (strcmp (idesc->name, "rfi") == 0) | |
7948 | return 1; | |
7949 | return 0; | |
7950 | } | |
7951 | ||
7952 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7953 | -1 if there is no dependency. */ | |
542d6675 | 7954 | |
800eeca4 | 7955 | static int |
5a49b8ac | 7956 | depends_on (int depind, struct ia64_opcode *idesc) |
800eeca4 JW |
7957 | { |
7958 | int i; | |
7959 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7960 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7961 | { |
542d6675 KH |
7962 | if (depind == DEP (dep->chks[i])) |
7963 | return i; | |
800eeca4 JW |
7964 | } |
7965 | return -1; | |
7966 | } | |
7967 | ||
7968 | /* Determine a set of specific resources used for a particular resource | |
7969 | class. Returns the number of specific resources identified For those | |
7970 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7971 | marked nonspecific. |
800eeca4 JW |
7972 | |
7973 | Meanings of value in 'NOTE': | |
7974 | 1) only read/write when the register number is explicitly encoded in the | |
7975 | insn. | |
7976 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 7977 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
7978 | 3) general register value is used to specify an indirect register; not |
7979 | determinable statically. | |
7980 | 4) only read the given resource when bits 7:0 of the indirect index | |
7981 | register value does not match the register number of the resource; not | |
7982 | determinable statically. | |
7983 | 5) all rules are implementation specific. | |
7984 | 6) only when both the index specified by the reader and the index specified | |
7985 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 7986 | statically. |
800eeca4 | 7987 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 7988 | set |
800eeca4 JW |
7989 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
7990 | only read when these insns reference FR2-31 | |
7991 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
7992 | written when these insns write FR32-127 | |
7993 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
7994 | instruction | |
7995 | 11) The target predicates are written independently of PR[qp], but source | |
7996 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
7997 | cannot statically be determined, all source registers are marked used. | |
7998 | 12) This insn only reads the specified predicate register when that | |
7999 | register is the PR[qp]. | |
ad4b42b4 | 8000 | 13) This reference to ld-c only applies to the GR whose value is loaded |
197865e8 | 8001 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8002 | 14) The RSE resource includes the implementation-specific RSE internal |
8003 | state resources. At least one (and possibly more) of these resources are | |
8004 | read by each instruction listed in IC:rse-readers. At least one (and | |
8005 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8006 | IC:rse-writers. |
800eeca4 | 8007 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8008 | generate. |
7f3dfb9c L |
8009 | 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and |
8010 | mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up. | |
800eeca4 JW |
8011 | |
8012 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8013 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8014 | */ |
8015 | ||
8016 | #define MAX_SPECS 256 | |
8017 | #define DV_CHK 1 | |
8018 | #define DV_REG 0 | |
8019 | ||
8020 | static int | |
5a49b8ac AM |
8021 | specify_resource (const struct ia64_dependency *dep, |
8022 | struct ia64_opcode *idesc, | |
8023 | /* is this a DV chk or a DV reg? */ | |
8024 | int type, | |
8025 | /* returned specific resources */ | |
8026 | struct rsrc specs[MAX_SPECS], | |
8027 | /* resource note for this insn's usage */ | |
8028 | int note, | |
8029 | /* which execution path to examine */ | |
8030 | int path) | |
800eeca4 JW |
8031 | { |
8032 | int count = 0; | |
8033 | int i; | |
8034 | int rsrc_write = 0; | |
8035 | struct rsrc tmpl; | |
197865e8 | 8036 | |
800eeca4 JW |
8037 | if (dep->mode == IA64_DV_WAW |
8038 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8039 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8040 | rsrc_write = 1; | |
8041 | ||
8042 | /* template for any resources we identify */ | |
8043 | tmpl.dependency = dep; | |
8044 | tmpl.note = note; | |
8045 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8046 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8047 | tmpl.link_to_qp_branch = 1; | |
8048 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8049 | tmpl.mem_offset.offset = 0; |
8050 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8051 | tmpl.specific = 1; |
a66d2bb7 | 8052 | tmpl.index = -1; |
7484b8e6 | 8053 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8054 | tmpl.depind = 0; |
8055 | tmpl.file = NULL; | |
8056 | tmpl.line = 0; | |
8057 | tmpl.path = 0; | |
800eeca4 JW |
8058 | |
8059 | #define UNHANDLED \ | |
8060 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8061 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8062 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8063 | ||
8064 | /* we don't need to track these */ | |
8065 | if (dep->semantics == IA64_DVS_NONE) | |
8066 | return 0; | |
8067 | ||
8068 | switch (dep->specifier) | |
8069 | { | |
8070 | case IA64_RS_AR_K: | |
8071 | if (note == 1) | |
542d6675 KH |
8072 | { |
8073 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8074 | { | |
8075 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8076 | if (regno >= 0 && regno <= 7) | |
8077 | { | |
8078 | specs[count] = tmpl; | |
8079 | specs[count++].index = regno; | |
8080 | } | |
8081 | } | |
8082 | } | |
800eeca4 | 8083 | else if (note == 0) |
542d6675 KH |
8084 | { |
8085 | for (i = 0; i < 8; i++) | |
8086 | { | |
8087 | specs[count] = tmpl; | |
8088 | specs[count++].index = i; | |
8089 | } | |
8090 | } | |
800eeca4 | 8091 | else |
542d6675 KH |
8092 | { |
8093 | UNHANDLED; | |
8094 | } | |
800eeca4 JW |
8095 | break; |
8096 | ||
8097 | case IA64_RS_AR_UNAT: | |
8098 | /* This is a mov =AR or mov AR= instruction. */ | |
8099 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8100 | { | |
8101 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8102 | if (regno == AR_UNAT) | |
8103 | { | |
8104 | specs[count++] = tmpl; | |
8105 | } | |
8106 | } | |
8107 | else | |
8108 | { | |
8109 | /* This is a spill/fill, or other instruction that modifies the | |
8110 | unat register. */ | |
8111 | ||
8112 | /* Unless we can determine the specific bits used, mark the whole | |
8113 | thing; bits 8:3 of the memory address indicate the bit used in | |
8114 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8115 | subset of conflicts. */ | |
8116 | specs[count] = tmpl; | |
8117 | if (md.mem_offset.hint) | |
8118 | { | |
542d6675 KH |
8119 | if (md.debug_dv) |
8120 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8121 | /* The index isn't actually used, just set it to something | |
8122 | approximating the bit index. */ | |
800eeca4 JW |
8123 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8124 | specs[count].mem_offset.hint = 1; | |
8125 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8126 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8127 | } | |
8128 | else | |
8129 | { | |
8130 | specs[count++].specific = 0; | |
8131 | } | |
8132 | } | |
8133 | break; | |
8134 | ||
8135 | case IA64_RS_AR: | |
8136 | if (note == 1) | |
542d6675 KH |
8137 | { |
8138 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8139 | { | |
8140 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8141 | if ((regno >= 8 && regno <= 15) | |
8142 | || (regno >= 20 && regno <= 23) | |
8143 | || (regno >= 31 && regno <= 39) | |
8144 | || (regno >= 41 && regno <= 47) | |
8145 | || (regno >= 67 && regno <= 111)) | |
8146 | { | |
8147 | specs[count] = tmpl; | |
8148 | specs[count++].index = regno; | |
8149 | } | |
8150 | } | |
8151 | } | |
800eeca4 | 8152 | else |
542d6675 KH |
8153 | { |
8154 | UNHANDLED; | |
8155 | } | |
800eeca4 JW |
8156 | break; |
8157 | ||
8158 | case IA64_RS_ARb: | |
8159 | if (note == 1) | |
542d6675 KH |
8160 | { |
8161 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8162 | { | |
8163 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8164 | if ((regno >= 48 && regno <= 63) | |
8165 | || (regno >= 112 && regno <= 127)) | |
8166 | { | |
8167 | specs[count] = tmpl; | |
8168 | specs[count++].index = regno; | |
8169 | } | |
8170 | } | |
8171 | } | |
800eeca4 | 8172 | else if (note == 0) |
542d6675 KH |
8173 | { |
8174 | for (i = 48; i < 64; i++) | |
8175 | { | |
8176 | specs[count] = tmpl; | |
8177 | specs[count++].index = i; | |
8178 | } | |
8179 | for (i = 112; i < 128; i++) | |
8180 | { | |
8181 | specs[count] = tmpl; | |
8182 | specs[count++].index = i; | |
8183 | } | |
8184 | } | |
197865e8 | 8185 | else |
542d6675 KH |
8186 | { |
8187 | UNHANDLED; | |
8188 | } | |
800eeca4 JW |
8189 | break; |
8190 | ||
8191 | case IA64_RS_BR: | |
8192 | if (note != 1) | |
542d6675 KH |
8193 | { |
8194 | UNHANDLED; | |
8195 | } | |
800eeca4 | 8196 | else |
542d6675 KH |
8197 | { |
8198 | if (rsrc_write) | |
8199 | { | |
8200 | for (i = 0; i < idesc->num_outputs; i++) | |
8201 | if (idesc->operands[i] == IA64_OPND_B1 | |
8202 | || idesc->operands[i] == IA64_OPND_B2) | |
8203 | { | |
8204 | specs[count] = tmpl; | |
8205 | specs[count++].index = | |
8206 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8207 | } | |
8208 | } | |
8209 | else | |
8210 | { | |
40449e9f | 8211 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8212 | if (idesc->operands[i] == IA64_OPND_B1 |
8213 | || idesc->operands[i] == IA64_OPND_B2) | |
8214 | { | |
8215 | specs[count] = tmpl; | |
8216 | specs[count++].index = | |
8217 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8218 | } | |
8219 | } | |
8220 | } | |
800eeca4 JW |
8221 | break; |
8222 | ||
8223 | case IA64_RS_CPUID: /* four or more registers */ | |
8224 | if (note == 3) | |
542d6675 KH |
8225 | { |
8226 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8227 | { | |
8228 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8229 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8230 | && KNOWN (regno)) | |
8231 | { | |
8232 | specs[count] = tmpl; | |
8233 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8234 | } | |
8235 | else | |
8236 | { | |
8237 | specs[count] = tmpl; | |
8238 | specs[count++].specific = 0; | |
8239 | } | |
8240 | } | |
8241 | } | |
800eeca4 | 8242 | else |
542d6675 KH |
8243 | { |
8244 | UNHANDLED; | |
8245 | } | |
800eeca4 JW |
8246 | break; |
8247 | ||
8248 | case IA64_RS_DBR: /* four or more registers */ | |
8249 | if (note == 3) | |
542d6675 KH |
8250 | { |
8251 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8252 | { | |
8253 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8254 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8255 | && KNOWN (regno)) | |
8256 | { | |
8257 | specs[count] = tmpl; | |
8258 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8259 | } | |
8260 | else | |
8261 | { | |
8262 | specs[count] = tmpl; | |
8263 | specs[count++].specific = 0; | |
8264 | } | |
8265 | } | |
8266 | } | |
800eeca4 | 8267 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8268 | { |
8269 | specs[count] = tmpl; | |
8270 | specs[count++].specific = 0; | |
8271 | } | |
800eeca4 | 8272 | else |
542d6675 KH |
8273 | { |
8274 | UNHANDLED; | |
8275 | } | |
800eeca4 JW |
8276 | break; |
8277 | ||
8278 | case IA64_RS_IBR: /* four or more registers */ | |
8279 | if (note == 3) | |
542d6675 KH |
8280 | { |
8281 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8282 | { | |
8283 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8284 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8285 | && KNOWN (regno)) | |
8286 | { | |
8287 | specs[count] = tmpl; | |
8288 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8289 | } | |
8290 | else | |
8291 | { | |
8292 | specs[count] = tmpl; | |
8293 | specs[count++].specific = 0; | |
8294 | } | |
8295 | } | |
8296 | } | |
800eeca4 | 8297 | else |
542d6675 KH |
8298 | { |
8299 | UNHANDLED; | |
8300 | } | |
800eeca4 JW |
8301 | break; |
8302 | ||
8303 | case IA64_RS_MSR: | |
8304 | if (note == 5) | |
8305 | { | |
8306 | /* These are implementation specific. Force all references to | |
8307 | conflict with all other references. */ | |
8308 | specs[count] = tmpl; | |
8309 | specs[count++].specific = 0; | |
8310 | } | |
8311 | else | |
8312 | { | |
8313 | UNHANDLED; | |
8314 | } | |
8315 | break; | |
8316 | ||
8317 | case IA64_RS_PKR: /* 16 or more registers */ | |
8318 | if (note == 3 || note == 4) | |
542d6675 KH |
8319 | { |
8320 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8321 | { | |
8322 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8323 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8324 | && KNOWN (regno)) | |
8325 | { | |
8326 | if (note == 3) | |
8327 | { | |
8328 | specs[count] = tmpl; | |
8329 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8330 | } | |
8331 | else | |
8332 | for (i = 0; i < NELEMS (gr_values); i++) | |
8333 | { | |
8334 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8335 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8336 | { |
8337 | specs[count] = tmpl; | |
8338 | specs[count++].index = i; | |
8339 | } | |
8340 | } | |
8341 | } | |
8342 | else | |
8343 | { | |
8344 | specs[count] = tmpl; | |
8345 | specs[count++].specific = 0; | |
8346 | } | |
8347 | } | |
8348 | } | |
8349 | else if (note == 0) | |
8350 | { | |
8351 | /* probe et al. */ | |
8352 | specs[count] = tmpl; | |
8353 | specs[count++].specific = 0; | |
8354 | } | |
8355 | break; | |
8356 | ||
8357 | case IA64_RS_PMC: /* four or more registers */ | |
8358 | if (note == 3) | |
8359 | { | |
8360 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8361 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8362 | ||
8363 | { | |
8364 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8365 | ? 1 : !rsrc_write); | |
8366 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8367 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8368 | && KNOWN (regno)) | |
8369 | { | |
8370 | specs[count] = tmpl; | |
8371 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8372 | } | |
8373 | else | |
8374 | { | |
8375 | specs[count] = tmpl; | |
8376 | specs[count++].specific = 0; | |
8377 | } | |
8378 | } | |
8379 | } | |
8380 | else | |
8381 | { | |
8382 | UNHANDLED; | |
8383 | } | |
800eeca4 JW |
8384 | break; |
8385 | ||
8386 | case IA64_RS_PMD: /* four or more registers */ | |
8387 | if (note == 3) | |
542d6675 KH |
8388 | { |
8389 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8390 | { | |
8391 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8392 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8393 | && KNOWN (regno)) | |
8394 | { | |
8395 | specs[count] = tmpl; | |
8396 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8397 | } | |
8398 | else | |
8399 | { | |
8400 | specs[count] = tmpl; | |
8401 | specs[count++].specific = 0; | |
8402 | } | |
8403 | } | |
8404 | } | |
800eeca4 | 8405 | else |
542d6675 KH |
8406 | { |
8407 | UNHANDLED; | |
8408 | } | |
800eeca4 JW |
8409 | break; |
8410 | ||
8411 | case IA64_RS_RR: /* eight registers */ | |
8412 | if (note == 6) | |
542d6675 KH |
8413 | { |
8414 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8415 | { | |
8416 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8417 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8418 | && KNOWN (regno)) | |
8419 | { | |
8420 | specs[count] = tmpl; | |
8421 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8422 | } | |
8423 | else | |
8424 | { | |
8425 | specs[count] = tmpl; | |
8426 | specs[count++].specific = 0; | |
8427 | } | |
8428 | } | |
8429 | } | |
800eeca4 | 8430 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8431 | { |
8432 | specs[count] = tmpl; | |
8433 | specs[count++].specific = 0; | |
8434 | } | |
197865e8 | 8435 | else |
542d6675 KH |
8436 | { |
8437 | UNHANDLED; | |
8438 | } | |
800eeca4 JW |
8439 | break; |
8440 | ||
8441 | case IA64_RS_CR_IRR: | |
197865e8 | 8442 | if (note == 0) |
542d6675 KH |
8443 | { |
8444 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8445 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8446 | if (rsrc_write | |
8447 | && idesc->operands[1] == IA64_OPND_CR3 | |
8448 | && regno == CR_IVR) | |
8449 | { | |
8450 | for (i = 0; i < 4; i++) | |
8451 | { | |
8452 | specs[count] = tmpl; | |
8453 | specs[count++].index = CR_IRR0 + i; | |
8454 | } | |
8455 | } | |
8456 | } | |
800eeca4 | 8457 | else if (note == 1) |
542d6675 KH |
8458 | { |
8459 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8460 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8461 | && regno >= CR_IRR0 | |
8462 | && regno <= CR_IRR3) | |
8463 | { | |
8464 | specs[count] = tmpl; | |
8465 | specs[count++].index = regno; | |
8466 | } | |
8467 | } | |
800eeca4 | 8468 | else |
542d6675 KH |
8469 | { |
8470 | UNHANDLED; | |
8471 | } | |
800eeca4 JW |
8472 | break; |
8473 | ||
1ca35711 L |
8474 | case IA64_RS_CR_IIB: |
8475 | if (note != 0) | |
8476 | { | |
8477 | UNHANDLED; | |
8478 | } | |
8479 | else | |
8480 | { | |
8481 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8482 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8483 | && (regno == CR_IIB0 || regno == CR_IIB1)) | |
8484 | { | |
8485 | specs[count] = tmpl; | |
8486 | specs[count++].index = regno; | |
8487 | } | |
8488 | } | |
8489 | break; | |
8490 | ||
800eeca4 JW |
8491 | case IA64_RS_CR_LRR: |
8492 | if (note != 1) | |
542d6675 KH |
8493 | { |
8494 | UNHANDLED; | |
8495 | } | |
197865e8 | 8496 | else |
542d6675 KH |
8497 | { |
8498 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8499 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8500 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8501 | { | |
8502 | specs[count] = tmpl; | |
8503 | specs[count++].index = regno; | |
8504 | } | |
8505 | } | |
800eeca4 JW |
8506 | break; |
8507 | ||
8508 | case IA64_RS_CR: | |
8509 | if (note == 1) | |
542d6675 KH |
8510 | { |
8511 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8512 | { | |
8513 | specs[count] = tmpl; | |
8514 | specs[count++].index = | |
8515 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8516 | } | |
8517 | } | |
800eeca4 | 8518 | else |
542d6675 KH |
8519 | { |
8520 | UNHANDLED; | |
8521 | } | |
800eeca4 JW |
8522 | break; |
8523 | ||
8524 | case IA64_RS_FR: | |
8525 | case IA64_RS_FRb: | |
8526 | if (note != 1) | |
542d6675 KH |
8527 | { |
8528 | UNHANDLED; | |
8529 | } | |
800eeca4 | 8530 | else if (rsrc_write) |
542d6675 KH |
8531 | { |
8532 | if (dep->specifier == IA64_RS_FRb | |
8533 | && idesc->operands[0] == IA64_OPND_F1) | |
8534 | { | |
8535 | specs[count] = tmpl; | |
8536 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8537 | } | |
8538 | } | |
800eeca4 | 8539 | else |
542d6675 KH |
8540 | { |
8541 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8542 | { | |
8543 | if (idesc->operands[i] == IA64_OPND_F2 | |
8544 | || idesc->operands[i] == IA64_OPND_F3 | |
8545 | || idesc->operands[i] == IA64_OPND_F4) | |
8546 | { | |
8547 | specs[count] = tmpl; | |
8548 | specs[count++].index = | |
8549 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8550 | } | |
8551 | } | |
8552 | } | |
800eeca4 JW |
8553 | break; |
8554 | ||
8555 | case IA64_RS_GR: | |
8556 | if (note == 13) | |
542d6675 KH |
8557 | { |
8558 | /* This reference applies only to the GR whose value is loaded with | |
8559 | data returned from memory. */ | |
8560 | specs[count] = tmpl; | |
8561 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8562 | } | |
800eeca4 | 8563 | else if (note == 1) |
542d6675 KH |
8564 | { |
8565 | if (rsrc_write) | |
8566 | { | |
8567 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8568 | if (idesc->operands[i] == IA64_OPND_R1 |
8569 | || idesc->operands[i] == IA64_OPND_R2 | |
8570 | || idesc->operands[i] == IA64_OPND_R3) | |
8571 | { | |
8572 | specs[count] = tmpl; | |
197865e8 | 8573 | specs[count++].index = |
50b81f19 JW |
8574 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8575 | } | |
8576 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8577 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8578 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8579 | { | |
8580 | specs[count] = tmpl; | |
8581 | specs[count++].index = | |
8582 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8583 | } | |
542d6675 KH |
8584 | } |
8585 | else | |
8586 | { | |
8587 | /* Look for anything that reads a GR. */ | |
8588 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8589 | { | |
8590 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8591 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8592 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8593 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8594 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8595 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8596 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8597 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8598 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8599 | || ((i >= idesc->num_outputs) | |
8600 | && (idesc->operands[i] == IA64_OPND_R1 | |
8601 | || idesc->operands[i] == IA64_OPND_R2 | |
8602 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8603 | /* addl source register. */ |
8604 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8605 | { |
8606 | specs[count] = tmpl; | |
8607 | specs[count++].index = | |
8608 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8609 | } | |
8610 | } | |
8611 | } | |
8612 | } | |
197865e8 | 8613 | else |
542d6675 KH |
8614 | { |
8615 | UNHANDLED; | |
8616 | } | |
800eeca4 JW |
8617 | break; |
8618 | ||
139368c9 JW |
8619 | /* This is the same as IA64_RS_PRr, except that the register range is |
8620 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8621 | case IA64_RS_PR: |
8622 | if (note == 0) | |
542d6675 | 8623 | { |
139368c9 | 8624 | for (i = 1; i < 16; i++) |
542d6675 | 8625 | { |
139368c9 JW |
8626 | specs[count] = tmpl; |
8627 | specs[count++].index = i; | |
8628 | } | |
8629 | } | |
8630 | else if (note == 7) | |
8631 | { | |
8632 | valueT mask = 0; | |
8633 | /* Mark only those registers indicated by the mask. */ | |
8634 | if (rsrc_write) | |
8635 | { | |
8636 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8637 | for (i = 1; i < 16; i++) | |
8638 | if (mask & ((valueT) 1 << i)) | |
8639 | { | |
8640 | specs[count] = tmpl; | |
8641 | specs[count++].index = i; | |
8642 | } | |
8643 | } | |
8644 | else | |
8645 | { | |
8646 | UNHANDLED; | |
8647 | } | |
8648 | } | |
8649 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8650 | { | |
8651 | if (rsrc_write) | |
8652 | { | |
8653 | for (i = 0; i < idesc->num_outputs; i++) | |
8654 | { | |
8655 | if (idesc->operands[i] == IA64_OPND_P1 | |
8656 | || idesc->operands[i] == IA64_OPND_P2) | |
8657 | { | |
8658 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8659 | if (regno >= 1 && regno < 16) | |
8660 | { | |
8661 | specs[count] = tmpl; | |
8662 | specs[count++].index = regno; | |
8663 | } | |
8664 | } | |
8665 | } | |
8666 | } | |
8667 | else | |
8668 | { | |
8669 | UNHANDLED; | |
8670 | } | |
8671 | } | |
8672 | else if (note == 12) | |
8673 | { | |
8674 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8675 | { | |
8676 | specs[count] = tmpl; | |
8677 | specs[count++].index = CURR_SLOT.qp_regno; | |
8678 | } | |
8679 | } | |
8680 | else if (note == 1) | |
8681 | { | |
8682 | if (rsrc_write) | |
8683 | { | |
8684 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8685 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8686 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8687 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8688 | |
8689 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8690 | || idesc->operands[0] == IA64_OPND_P2) | |
8691 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8692 | { |
8693 | specs[count] = tmpl; | |
139368c9 JW |
8694 | specs[count].cmp_type = |
8695 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8696 | specs[count++].index = p1; | |
8697 | } | |
8698 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8699 | || idesc->operands[1] == IA64_OPND_P2) | |
8700 | && p2 >= 1 && p2 < 16) | |
8701 | { | |
8702 | specs[count] = tmpl; | |
8703 | specs[count].cmp_type = | |
8704 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8705 | specs[count++].index = p2; | |
542d6675 KH |
8706 | } |
8707 | } | |
8708 | else | |
8709 | { | |
139368c9 | 8710 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8711 | { |
8712 | specs[count] = tmpl; | |
139368c9 JW |
8713 | specs[count++].index = CURR_SLOT.qp_regno; |
8714 | } | |
8715 | if (idesc->operands[1] == IA64_OPND_PR) | |
8716 | { | |
8717 | for (i = 1; i < 16; i++) | |
8718 | { | |
8719 | specs[count] = tmpl; | |
8720 | specs[count++].index = i; | |
8721 | } | |
542d6675 KH |
8722 | } |
8723 | } | |
8724 | } | |
139368c9 JW |
8725 | else |
8726 | { | |
8727 | UNHANDLED; | |
8728 | } | |
8729 | break; | |
8730 | ||
8731 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8732 | simplified cases of this. */ | |
8733 | case IA64_RS_PRr: | |
8734 | if (note == 0) | |
8735 | { | |
8736 | for (i = 16; i < 63; i++) | |
8737 | { | |
8738 | specs[count] = tmpl; | |
8739 | specs[count++].index = i; | |
8740 | } | |
8741 | } | |
800eeca4 | 8742 | else if (note == 7) |
542d6675 KH |
8743 | { |
8744 | valueT mask = 0; | |
8745 | /* Mark only those registers indicated by the mask. */ | |
8746 | if (rsrc_write | |
8747 | && idesc->operands[0] == IA64_OPND_PR) | |
8748 | { | |
8749 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8750 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8751 | for (i = 16; i < 63; i++) |
8752 | { | |
8753 | specs[count] = tmpl; | |
8754 | specs[count++].index = i; | |
8755 | } | |
542d6675 KH |
8756 | } |
8757 | else if (rsrc_write | |
8758 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8759 | { | |
8760 | for (i = 16; i < 63; i++) | |
8761 | { | |
8762 | specs[count] = tmpl; | |
8763 | specs[count++].index = i; | |
8764 | } | |
8765 | } | |
8766 | else | |
8767 | { | |
8768 | UNHANDLED; | |
8769 | } | |
8770 | } | |
800eeca4 | 8771 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8772 | { |
8773 | if (rsrc_write) | |
8774 | { | |
8775 | for (i = 0; i < idesc->num_outputs; i++) | |
8776 | { | |
8777 | if (idesc->operands[i] == IA64_OPND_P1 | |
8778 | || idesc->operands[i] == IA64_OPND_P2) | |
8779 | { | |
8780 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8781 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8782 | { |
8783 | specs[count] = tmpl; | |
8784 | specs[count++].index = regno; | |
8785 | } | |
8786 | } | |
8787 | } | |
8788 | } | |
8789 | else | |
8790 | { | |
8791 | UNHANDLED; | |
8792 | } | |
8793 | } | |
800eeca4 | 8794 | else if (note == 12) |
542d6675 | 8795 | { |
139368c9 | 8796 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8797 | { |
8798 | specs[count] = tmpl; | |
8799 | specs[count++].index = CURR_SLOT.qp_regno; | |
8800 | } | |
8801 | } | |
800eeca4 | 8802 | else if (note == 1) |
542d6675 KH |
8803 | { |
8804 | if (rsrc_write) | |
8805 | { | |
8806 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8807 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8808 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8809 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8810 | |
542d6675 KH |
8811 | if ((idesc->operands[0] == IA64_OPND_P1 |
8812 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8813 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8814 | { |
8815 | specs[count] = tmpl; | |
4a4f25cf | 8816 | specs[count].cmp_type = |
7484b8e6 | 8817 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8818 | specs[count++].index = p1; |
8819 | } | |
8820 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8821 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8822 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8823 | { |
8824 | specs[count] = tmpl; | |
4a4f25cf | 8825 | specs[count].cmp_type = |
7484b8e6 | 8826 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8827 | specs[count++].index = p2; |
8828 | } | |
8829 | } | |
8830 | else | |
8831 | { | |
139368c9 | 8832 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8833 | { |
8834 | specs[count] = tmpl; | |
8835 | specs[count++].index = CURR_SLOT.qp_regno; | |
8836 | } | |
8837 | if (idesc->operands[1] == IA64_OPND_PR) | |
8838 | { | |
139368c9 | 8839 | for (i = 16; i < 63; i++) |
542d6675 KH |
8840 | { |
8841 | specs[count] = tmpl; | |
8842 | specs[count++].index = i; | |
8843 | } | |
8844 | } | |
8845 | } | |
8846 | } | |
197865e8 | 8847 | else |
542d6675 KH |
8848 | { |
8849 | UNHANDLED; | |
8850 | } | |
800eeca4 JW |
8851 | break; |
8852 | ||
8853 | case IA64_RS_PSR: | |
197865e8 | 8854 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8855 | dep->regindex. */ |
800eeca4 | 8856 | if (note == 0) |
542d6675 KH |
8857 | { |
8858 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8859 | { | |
8860 | if (dep->regindex < 6) | |
8861 | { | |
8862 | specs[count++] = tmpl; | |
8863 | } | |
8864 | } | |
8865 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8866 | { | |
8867 | if (dep->regindex < 32 | |
8868 | || dep->regindex == 35 | |
8869 | || dep->regindex == 36 | |
8870 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8871 | { | |
8872 | specs[count++] = tmpl; | |
8873 | } | |
8874 | } | |
8875 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8876 | { | |
8877 | if (dep->regindex < 32 | |
8878 | || dep->regindex == 35 | |
8879 | || dep->regindex == 36 | |
8880 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8881 | { | |
8882 | specs[count++] = tmpl; | |
8883 | } | |
8884 | } | |
8885 | else | |
8886 | { | |
8887 | /* Several PSR bits have very specific dependencies. */ | |
8888 | switch (dep->regindex) | |
8889 | { | |
8890 | default: | |
8891 | specs[count++] = tmpl; | |
8892 | break; | |
8893 | case PSR_IC: | |
8894 | if (rsrc_write) | |
8895 | { | |
8896 | specs[count++] = tmpl; | |
8897 | } | |
8898 | else | |
8899 | { | |
8900 | /* Only certain CR accesses use PSR.ic */ | |
8901 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8902 | || idesc->operands[1] == IA64_OPND_CR3) | |
8903 | { | |
8904 | int index = | |
8905 | ((idesc->operands[0] == IA64_OPND_CR3) | |
8906 | ? 0 : 1); | |
8907 | int regno = | |
8908 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
8909 | ||
8910 | switch (regno) | |
8911 | { | |
8912 | default: | |
8913 | break; | |
8914 | case CR_ITIR: | |
8915 | case CR_IFS: | |
8916 | case CR_IIM: | |
8917 | case CR_IIP: | |
8918 | case CR_IPSR: | |
8919 | case CR_ISR: | |
8920 | case CR_IFA: | |
8921 | case CR_IHA: | |
1ca35711 L |
8922 | case CR_IIB0: |
8923 | case CR_IIB1: | |
542d6675 KH |
8924 | case CR_IIPA: |
8925 | specs[count++] = tmpl; | |
8926 | break; | |
8927 | } | |
8928 | } | |
8929 | } | |
8930 | break; | |
8931 | case PSR_CPL: | |
8932 | if (rsrc_write) | |
8933 | { | |
8934 | specs[count++] = tmpl; | |
8935 | } | |
8936 | else | |
8937 | { | |
8938 | /* Only some AR accesses use cpl */ | |
8939 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8940 | || idesc->operands[1] == IA64_OPND_AR3) | |
8941 | { | |
8942 | int index = | |
8943 | ((idesc->operands[0] == IA64_OPND_AR3) | |
8944 | ? 0 : 1); | |
8945 | int regno = | |
8946 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
8947 | ||
8948 | if (regno == AR_ITC | |
4f8631b1 | 8949 | || regno == AR_RUC |
542d6675 | 8950 | || (index == 0 |
4f8631b1 | 8951 | && (regno == AR_RSC |
542d6675 KH |
8952 | || (regno >= AR_K0 |
8953 | && regno <= AR_K7)))) | |
8954 | { | |
8955 | specs[count++] = tmpl; | |
8956 | } | |
8957 | } | |
8958 | else | |
8959 | { | |
8960 | specs[count++] = tmpl; | |
8961 | } | |
8962 | break; | |
8963 | } | |
8964 | } | |
8965 | } | |
8966 | } | |
800eeca4 | 8967 | else if (note == 7) |
542d6675 KH |
8968 | { |
8969 | valueT mask = 0; | |
8970 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8971 | { | |
8972 | mask = CURR_SLOT.opnd[0].X_add_number; | |
8973 | } | |
8974 | else | |
8975 | { | |
8976 | UNHANDLED; | |
8977 | } | |
8978 | if (mask & ((valueT) 1 << dep->regindex)) | |
8979 | { | |
8980 | specs[count++] = tmpl; | |
8981 | } | |
8982 | } | |
800eeca4 | 8983 | else if (note == 8) |
542d6675 KH |
8984 | { |
8985 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
8986 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
8987 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
8988 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8989 | { | |
8990 | if (idesc->operands[i] == IA64_OPND_F1 | |
8991 | || idesc->operands[i] == IA64_OPND_F2 | |
8992 | || idesc->operands[i] == IA64_OPND_F3 | |
8993 | || idesc->operands[i] == IA64_OPND_F4) | |
8994 | { | |
8995 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8996 | if (reg >= min && reg <= max) | |
8997 | { | |
8998 | specs[count++] = tmpl; | |
8999 | } | |
9000 | } | |
9001 | } | |
9002 | } | |
800eeca4 | 9003 | else if (note == 9) |
542d6675 KH |
9004 | { |
9005 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9006 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9007 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9008 | FR2-31 */ | |
9009 | for (i = 0; i < idesc->num_outputs; i++) | |
9010 | { | |
9011 | if (idesc->operands[i] == IA64_OPND_F1) | |
9012 | { | |
9013 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9014 | if (reg >= min && reg <= max) | |
9015 | { | |
9016 | specs[count++] = tmpl; | |
9017 | } | |
9018 | } | |
9019 | } | |
9020 | } | |
800eeca4 | 9021 | else if (note == 10) |
542d6675 KH |
9022 | { |
9023 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9024 | { | |
9025 | if (idesc->operands[i] == IA64_OPND_R1 | |
9026 | || idesc->operands[i] == IA64_OPND_R2 | |
9027 | || idesc->operands[i] == IA64_OPND_R3) | |
9028 | { | |
9029 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9030 | if (regno >= 16 && regno <= 31) | |
9031 | { | |
9032 | specs[count++] = tmpl; | |
9033 | } | |
9034 | } | |
9035 | } | |
9036 | } | |
800eeca4 | 9037 | else |
542d6675 KH |
9038 | { |
9039 | UNHANDLED; | |
9040 | } | |
800eeca4 JW |
9041 | break; |
9042 | ||
9043 | case IA64_RS_AR_FPSR: | |
9044 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9045 | { |
9046 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9047 | if (regno == AR_FPSR) | |
9048 | { | |
9049 | specs[count++] = tmpl; | |
9050 | } | |
9051 | } | |
800eeca4 | 9052 | else |
542d6675 KH |
9053 | { |
9054 | specs[count++] = tmpl; | |
9055 | } | |
800eeca4 JW |
9056 | break; |
9057 | ||
197865e8 | 9058 | case IA64_RS_ARX: |
800eeca4 JW |
9059 | /* Handle all AR[REG] resources */ |
9060 | if (note == 0 || note == 1) | |
542d6675 KH |
9061 | { |
9062 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9063 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9064 | && regno == dep->regindex) | |
9065 | { | |
9066 | specs[count++] = tmpl; | |
9067 | } | |
9068 | /* other AR[REG] resources may be affected by AR accesses */ | |
9069 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9070 | { | |
9071 | /* AR[] writes */ | |
9072 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9073 | switch (dep->regindex) | |
9074 | { | |
9075 | default: | |
9076 | break; | |
9077 | case AR_BSP: | |
9078 | case AR_RNAT: | |
9079 | if (regno == AR_BSPSTORE) | |
9080 | { | |
9081 | specs[count++] = tmpl; | |
9082 | } | |
9083 | case AR_RSC: | |
9084 | if (!rsrc_write && | |
9085 | (regno == AR_BSPSTORE | |
9086 | || regno == AR_RNAT)) | |
9087 | { | |
9088 | specs[count++] = tmpl; | |
9089 | } | |
9090 | break; | |
9091 | } | |
9092 | } | |
9093 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9094 | { | |
9095 | /* AR[] reads */ | |
9096 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9097 | switch (dep->regindex) | |
9098 | { | |
9099 | default: | |
9100 | break; | |
9101 | case AR_RSC: | |
9102 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9103 | { | |
9104 | specs[count++] = tmpl; | |
9105 | } | |
9106 | break; | |
9107 | } | |
9108 | } | |
9109 | else | |
9110 | { | |
9111 | specs[count++] = tmpl; | |
9112 | } | |
9113 | } | |
800eeca4 | 9114 | else |
542d6675 KH |
9115 | { |
9116 | UNHANDLED; | |
9117 | } | |
800eeca4 JW |
9118 | break; |
9119 | ||
9120 | case IA64_RS_CRX: | |
7f3dfb9c L |
9121 | /* Handle all CR[REG] resources. |
9122 | ??? FIXME: The rule 17 isn't really handled correctly. */ | |
9123 | if (note == 0 || note == 1 || note == 17) | |
542d6675 KH |
9124 | { |
9125 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9126 | { | |
9127 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9128 | if (regno == dep->regindex) | |
9129 | { | |
9130 | specs[count++] = tmpl; | |
9131 | } | |
9132 | else if (!rsrc_write) | |
9133 | { | |
9134 | /* Reads from CR[IVR] affect other resources. */ | |
9135 | if (regno == CR_IVR) | |
9136 | { | |
9137 | if ((dep->regindex >= CR_IRR0 | |
9138 | && dep->regindex <= CR_IRR3) | |
9139 | || dep->regindex == CR_TPR) | |
9140 | { | |
9141 | specs[count++] = tmpl; | |
9142 | } | |
9143 | } | |
9144 | } | |
9145 | } | |
9146 | else | |
9147 | { | |
9148 | specs[count++] = tmpl; | |
9149 | } | |
9150 | } | |
800eeca4 | 9151 | else |
542d6675 KH |
9152 | { |
9153 | UNHANDLED; | |
9154 | } | |
800eeca4 JW |
9155 | break; |
9156 | ||
9157 | case IA64_RS_INSERVICE: | |
9158 | /* look for write of EOI (67) or read of IVR (65) */ | |
9159 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9160 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9161 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9162 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9163 | { | |
9164 | specs[count++] = tmpl; | |
9165 | } | |
800eeca4 JW |
9166 | break; |
9167 | ||
9168 | case IA64_RS_GR0: | |
9169 | if (note == 1) | |
542d6675 KH |
9170 | { |
9171 | specs[count++] = tmpl; | |
9172 | } | |
800eeca4 | 9173 | else |
542d6675 KH |
9174 | { |
9175 | UNHANDLED; | |
9176 | } | |
800eeca4 JW |
9177 | break; |
9178 | ||
9179 | case IA64_RS_CFM: | |
9180 | if (note != 2) | |
542d6675 KH |
9181 | { |
9182 | specs[count++] = tmpl; | |
9183 | } | |
800eeca4 | 9184 | else |
542d6675 KH |
9185 | { |
9186 | /* Check if any of the registers accessed are in the rotating region. | |
9187 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9188 | region */ | |
9189 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9190 | { | |
9191 | if (idesc->operands[i] == IA64_OPND_R1 | |
9192 | || idesc->operands[i] == IA64_OPND_R2 | |
9193 | || idesc->operands[i] == IA64_OPND_R3) | |
9194 | { | |
9195 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9196 | /* Assumes that md.rot.num_regs is always valid */ | |
9197 | if (md.rot.num_regs > 0 | |
9198 | && num > 31 | |
9199 | && num < 31 + md.rot.num_regs) | |
9200 | { | |
9201 | specs[count] = tmpl; | |
9202 | specs[count++].specific = 0; | |
9203 | } | |
9204 | } | |
9205 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9206 | || idesc->operands[i] == IA64_OPND_F2 | |
9207 | || idesc->operands[i] == IA64_OPND_F3 | |
9208 | || idesc->operands[i] == IA64_OPND_F4) | |
9209 | { | |
9210 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9211 | if (num > 31) | |
9212 | { | |
9213 | specs[count] = tmpl; | |
9214 | specs[count++].specific = 0; | |
9215 | } | |
9216 | } | |
9217 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9218 | || idesc->operands[i] == IA64_OPND_P2) | |
9219 | { | |
9220 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9221 | if (num > 15) | |
9222 | { | |
9223 | specs[count] = tmpl; | |
9224 | specs[count++].specific = 0; | |
9225 | } | |
9226 | } | |
9227 | } | |
9228 | if (CURR_SLOT.qp_regno > 15) | |
9229 | { | |
9230 | specs[count] = tmpl; | |
9231 | specs[count++].specific = 0; | |
9232 | } | |
9233 | } | |
800eeca4 JW |
9234 | break; |
9235 | ||
139368c9 JW |
9236 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9237 | the fact that there is only one register. */ | |
800eeca4 JW |
9238 | case IA64_RS_PR63: |
9239 | if (note == 0) | |
542d6675 KH |
9240 | { |
9241 | specs[count++] = tmpl; | |
9242 | } | |
139368c9 | 9243 | else if (note == 7) |
40449e9f KH |
9244 | { |
9245 | valueT mask = 0; | |
9246 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9247 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9248 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9249 | specs[count++] = tmpl; |
40449e9f | 9250 | } |
800eeca4 | 9251 | else if (note == 11) |
542d6675 KH |
9252 | { |
9253 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9254 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9255 | || (idesc->operands[1] == IA64_OPND_P2 | |
9256 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9257 | { | |
9258 | specs[count++] = tmpl; | |
9259 | } | |
9260 | } | |
800eeca4 | 9261 | else if (note == 12) |
542d6675 KH |
9262 | { |
9263 | if (CURR_SLOT.qp_regno == 63) | |
9264 | { | |
9265 | specs[count++] = tmpl; | |
9266 | } | |
9267 | } | |
800eeca4 | 9268 | else if (note == 1) |
542d6675 KH |
9269 | { |
9270 | if (rsrc_write) | |
9271 | { | |
40449e9f KH |
9272 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9273 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9274 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9275 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9276 | |
4a4f25cf | 9277 | if (p1 == 63 |
7484b8e6 TW |
9278 | && (idesc->operands[0] == IA64_OPND_P1 |
9279 | || idesc->operands[0] == IA64_OPND_P2)) | |
9280 | { | |
40449e9f | 9281 | specs[count] = tmpl; |
4a4f25cf | 9282 | specs[count++].cmp_type = |
7484b8e6 TW |
9283 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9284 | } | |
9285 | if (p2 == 63 | |
9286 | && (idesc->operands[1] == IA64_OPND_P1 | |
9287 | || idesc->operands[1] == IA64_OPND_P2)) | |
9288 | { | |
40449e9f | 9289 | specs[count] = tmpl; |
4a4f25cf | 9290 | specs[count++].cmp_type = |
7484b8e6 TW |
9291 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9292 | } | |
542d6675 KH |
9293 | } |
9294 | else | |
9295 | { | |
9296 | if (CURR_SLOT.qp_regno == 63) | |
9297 | { | |
9298 | specs[count++] = tmpl; | |
9299 | } | |
9300 | } | |
9301 | } | |
800eeca4 | 9302 | else |
542d6675 KH |
9303 | { |
9304 | UNHANDLED; | |
9305 | } | |
800eeca4 JW |
9306 | break; |
9307 | ||
9308 | case IA64_RS_RSE: | |
9309 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9310 | read resources have not yet been completely identified, so for now |
9311 | treat RSE as a single resource */ | |
800eeca4 | 9312 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9313 | { |
9314 | if (rsrc_write) | |
9315 | { | |
9316 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9317 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9318 | { | |
a66d2bb7 | 9319 | specs[count++] = tmpl; |
542d6675 KH |
9320 | } |
9321 | } | |
9322 | else | |
9323 | { | |
9324 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9325 | { | |
9326 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9327 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9328 | { | |
9329 | specs[count++] = tmpl; | |
9330 | } | |
9331 | } | |
9332 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9333 | { | |
9334 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9335 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9336 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9337 | { | |
9338 | specs[count++] = tmpl; | |
9339 | } | |
9340 | } | |
9341 | } | |
9342 | } | |
197865e8 | 9343 | else |
542d6675 KH |
9344 | { |
9345 | specs[count++] = tmpl; | |
9346 | } | |
800eeca4 JW |
9347 | break; |
9348 | ||
9349 | case IA64_RS_ANY: | |
9350 | /* FIXME -- do any of these need to be non-specific? */ | |
9351 | specs[count++] = tmpl; | |
9352 | break; | |
9353 | ||
9354 | default: | |
9355 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9356 | break; | |
9357 | } | |
9358 | ||
9359 | return count; | |
9360 | } | |
9361 | ||
9362 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9363 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9364 | ||
800eeca4 | 9365 | static void |
5a49b8ac | 9366 | clear_qp_branch_flag (valueT mask) |
800eeca4 JW |
9367 | { |
9368 | int i; | |
542d6675 | 9369 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9370 | { |
197865e8 | 9371 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9372 | if ((bit & mask) != 0) |
542d6675 KH |
9373 | { |
9374 | regdeps[i].link_to_qp_branch = 0; | |
9375 | } | |
800eeca4 JW |
9376 | } |
9377 | } | |
9378 | ||
5e2f6673 L |
9379 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9380 | any mutexes which contain one of the PRs and create new ones when | |
9381 | needed. */ | |
9382 | ||
9383 | static int | |
9384 | update_qp_mutex (valueT mask) | |
9385 | { | |
9386 | int i; | |
9387 | int add = 0; | |
9388 | ||
9389 | i = 0; | |
9390 | while (i < qp_mutexeslen) | |
9391 | { | |
9392 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9393 | { | |
9394 | /* If it destroys and creates the same mutex, do nothing. */ | |
9395 | if (qp_mutexes[i].prmask == mask | |
9396 | && qp_mutexes[i].path == md.path) | |
9397 | { | |
9398 | i++; | |
9399 | add = -1; | |
9400 | } | |
9401 | else | |
9402 | { | |
9403 | int keep = 0; | |
9404 | ||
9405 | if (md.debug_dv) | |
9406 | { | |
9407 | fprintf (stderr, " Clearing mutex relation"); | |
9408 | print_prmask (qp_mutexes[i].prmask); | |
9409 | fprintf (stderr, "\n"); | |
9410 | } | |
9411 | ||
9412 | /* Deal with the old mutex with more than 3+ PRs only if | |
9413 | the new mutex on the same execution path with it. | |
9414 | ||
9415 | FIXME: The 3+ mutex support is incomplete. | |
9416 | dot_pred_rel () may be a better place to fix it. */ | |
9417 | if (qp_mutexes[i].path == md.path) | |
9418 | { | |
9419 | /* If it is a proper subset of the mutex, create a | |
9420 | new mutex. */ | |
9421 | if (add == 0 | |
9422 | && (qp_mutexes[i].prmask & mask) == mask) | |
9423 | add = 1; | |
9424 | ||
9425 | qp_mutexes[i].prmask &= ~mask; | |
9426 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9427 | { | |
9428 | /* Modify the mutex if there are more than one | |
9429 | PR left. */ | |
9430 | keep = 1; | |
9431 | i++; | |
9432 | } | |
9433 | } | |
9434 | ||
9435 | if (keep == 0) | |
9436 | /* Remove the mutex. */ | |
9437 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9438 | } | |
9439 | } | |
9440 | else | |
9441 | ++i; | |
9442 | } | |
9443 | ||
9444 | if (add == 1) | |
9445 | add_qp_mutex (mask); | |
9446 | ||
9447 | return add; | |
9448 | } | |
9449 | ||
197865e8 | 9450 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9451 | |
542d6675 KH |
9452 | Any changes to a PR clears the mutex relations which include that PR. */ |
9453 | ||
800eeca4 | 9454 | static void |
5a49b8ac | 9455 | clear_qp_mutex (valueT mask) |
800eeca4 JW |
9456 | { |
9457 | int i; | |
9458 | ||
9459 | i = 0; | |
9460 | while (i < qp_mutexeslen) | |
9461 | { | |
9462 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9463 | { |
9464 | if (md.debug_dv) | |
9465 | { | |
9466 | fprintf (stderr, " Clearing mutex relation"); | |
9467 | print_prmask (qp_mutexes[i].prmask); | |
9468 | fprintf (stderr, "\n"); | |
9469 | } | |
9470 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9471 | } | |
800eeca4 | 9472 | else |
542d6675 | 9473 | ++i; |
800eeca4 JW |
9474 | } |
9475 | } | |
9476 | ||
9477 | /* Clear implies relations which contain PRs in the given masks. | |
9478 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9479 | indicates the implied PR. */ |
9480 | ||
800eeca4 | 9481 | static void |
5a49b8ac | 9482 | clear_qp_implies (valueT p1_mask, valueT p2_mask) |
800eeca4 JW |
9483 | { |
9484 | int i; | |
9485 | ||
9486 | i = 0; | |
9487 | while (i < qp_implieslen) | |
9488 | { | |
197865e8 | 9489 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9490 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9491 | { | |
9492 | if (md.debug_dv) | |
9493 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9494 | qp_implies[i].p1, qp_implies[i].p2); | |
9495 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9496 | } | |
197865e8 | 9497 | else |
542d6675 | 9498 | ++i; |
800eeca4 JW |
9499 | } |
9500 | } | |
9501 | ||
542d6675 KH |
9502 | /* Add the PRs specified to the list of implied relations. */ |
9503 | ||
800eeca4 | 9504 | static void |
5a49b8ac | 9505 | add_qp_imply (int p1, int p2) |
800eeca4 JW |
9506 | { |
9507 | valueT mask; | |
9508 | valueT bit; | |
9509 | int i; | |
9510 | ||
542d6675 | 9511 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9512 | if (p1 == 0 || p2 == 0) |
9513 | abort (); | |
9514 | ||
9515 | if (p1 == p2) | |
9516 | return; | |
9517 | ||
542d6675 KH |
9518 | /* If it exists already, ignore it. */ |
9519 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9520 | { |
197865e8 | 9521 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9522 | && qp_implies[i].p2 == p2 |
9523 | && qp_implies[i].path == md.path | |
9524 | && !qp_implies[i].p2_branched) | |
9525 | return; | |
800eeca4 JW |
9526 | } |
9527 | ||
9528 | if (qp_implieslen == qp_impliestotlen) | |
9529 | { | |
9530 | qp_impliestotlen += 20; | |
9531 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9532 | xrealloc ((void *) qp_implies, |
9533 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9534 | } |
9535 | if (md.debug_dv) | |
9536 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9537 | qp_implies[qp_implieslen].p1 = p1; | |
9538 | qp_implies[qp_implieslen].p2 = p2; | |
9539 | qp_implies[qp_implieslen].path = md.path; | |
9540 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9541 | ||
9542 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9543 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9544 | as well. */ |
542d6675 | 9545 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9546 | { |
9547 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9548 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9549 | if (qp_implies[i].p2 == p1) |
542d6675 | 9550 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9551 | } |
9552 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9553 | relation containing p2, duplicate it and replace p2 with p1. */ |
9554 | bit = (valueT) 1 << p1; | |
9555 | mask = (valueT) 1 << p2; | |
542d6675 | 9556 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9557 | { |
9558 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9559 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9560 | } |
9561 | } | |
9562 | ||
800eeca4 JW |
9563 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9564 | one of the PRs can be true at any time. PR0 should never be included in | |
9565 | the mask. */ | |
542d6675 | 9566 | |
800eeca4 | 9567 | static void |
5a49b8ac | 9568 | add_qp_mutex (valueT mask) |
800eeca4 JW |
9569 | { |
9570 | if (mask & 0x1) | |
9571 | abort (); | |
9572 | ||
9573 | if (qp_mutexeslen == qp_mutexestotlen) | |
9574 | { | |
9575 | qp_mutexestotlen += 20; | |
9576 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9577 | xrealloc ((void *) qp_mutexes, |
9578 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9579 | } |
9580 | if (md.debug_dv) | |
9581 | { | |
9582 | fprintf (stderr, " Registering mutex on"); | |
9583 | print_prmask (mask); | |
9584 | fprintf (stderr, "\n"); | |
9585 | } | |
9586 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9587 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9588 | } | |
9589 | ||
cb5301b6 | 9590 | static int |
5a49b8ac | 9591 | has_suffix_p (const char *name, const char *suffix) |
cb5301b6 RH |
9592 | { |
9593 | size_t namelen = strlen (name); | |
9594 | size_t sufflen = strlen (suffix); | |
9595 | ||
9596 | if (namelen <= sufflen) | |
9597 | return 0; | |
9598 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9599 | } | |
9600 | ||
800eeca4 | 9601 | static void |
5a49b8ac | 9602 | clear_register_values (void) |
800eeca4 JW |
9603 | { |
9604 | int i; | |
9605 | if (md.debug_dv) | |
9606 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9607 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9608 | gr_values[i].known = 0; |
9609 | } | |
9610 | ||
9611 | /* Keep track of register values/changes which affect DV tracking. | |
9612 | ||
9613 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9614 | have to examine a group of strings to identify them. */ |
800eeca4 | 9615 | |
800eeca4 | 9616 | static void |
5a49b8ac | 9617 | note_register_values (struct ia64_opcode *idesc) |
800eeca4 JW |
9618 | { |
9619 | valueT qp_changemask = 0; | |
9620 | int i; | |
9621 | ||
542d6675 KH |
9622 | /* Invalidate values for registers being written to. */ |
9623 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9624 | { |
197865e8 | 9625 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9626 | || idesc->operands[i] == IA64_OPND_R2 |
9627 | || idesc->operands[i] == IA64_OPND_R3) | |
9628 | { | |
9629 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9630 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9631 | gr_values[regno].known = 0; | |
9632 | } | |
50b81f19 JW |
9633 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9634 | { | |
9635 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9636 | if (regno > 0 && regno < 4) | |
9637 | gr_values[regno].known = 0; | |
9638 | } | |
197865e8 | 9639 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9640 | || idesc->operands[i] == IA64_OPND_P2) |
9641 | { | |
9642 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9643 | qp_changemask |= (valueT) 1 << regno; | |
9644 | } | |
800eeca4 | 9645 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9646 | { |
9647 | if (idesc->operands[2] & (valueT) 0x10000) | |
9648 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9649 | else | |
9650 | qp_changemask = idesc->operands[2]; | |
9651 | break; | |
9652 | } | |
800eeca4 | 9653 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9654 | { |
9655 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9656 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9657 | else |
9658 | qp_changemask = idesc->operands[1]; | |
9659 | qp_changemask &= ~(valueT) 0xFFFF; | |
9660 | break; | |
9661 | } | |
9662 | } | |
9663 | ||
9664 | /* Always clear qp branch flags on any PR change. */ | |
9665 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9666 | clear_qp_branch_flag (qp_changemask); |
9667 | ||
542d6675 | 9668 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9669 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9670 | { | |
197865e8 | 9671 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9672 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9673 | { |
9674 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9675 | gr_values[i].known = 0; | |
9676 | } | |
800eeca4 JW |
9677 | clear_qp_mutex (qp_changemask); |
9678 | clear_qp_implies (qp_changemask, qp_changemask); | |
9679 | } | |
542d6675 KH |
9680 | /* After a call, all register values are undefined, except those marked |
9681 | as "safe". */ | |
800eeca4 | 9682 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9683 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9684 | { |
56d27c17 | 9685 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9686 | clear_register_values (); |
9687 | clear_qp_mutex (~qp_safe_across_calls); | |
9688 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9689 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9690 | } | |
e9718fe1 | 9691 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9692 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9693 | { |
9694 | clear_register_values (); | |
197865e8 KH |
9695 | clear_qp_mutex (~(valueT) 0); |
9696 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9697 | } |
542d6675 | 9698 | /* Look for mutex and implies relations. */ |
197865e8 | 9699 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9700 | || idesc->operands[0] == IA64_OPND_P2) |
9701 | && (idesc->operands[1] == IA64_OPND_P1 | |
9702 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9703 | { |
9704 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9705 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9706 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9707 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9708 | |
5e2f6673 L |
9709 | /* If both PRs are PR0, we can't really do anything. */ |
9710 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9711 | { |
9712 | if (md.debug_dv) | |
9713 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9714 | } | |
800eeca4 | 9715 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9716 | with the following exceptions. */ |
cb5301b6 RH |
9717 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9718 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9719 | { |
542d6675 KH |
9720 | clear_qp_implies (p2mask, p1mask); |
9721 | } | |
cb5301b6 RH |
9722 | else if (has_suffix_p (idesc->name, ".andcm") |
9723 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9724 | { |
9725 | clear_qp_implies (0, p1mask | p2mask); | |
9726 | } | |
cb5301b6 RH |
9727 | else if (has_suffix_p (idesc->name, ".orcm") |
9728 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9729 | { |
9730 | clear_qp_mutex (p1mask | p2mask); | |
9731 | clear_qp_implies (p1mask | p2mask, 0); | |
9732 | } | |
800eeca4 | 9733 | else |
542d6675 | 9734 | { |
5e2f6673 L |
9735 | int added = 0; |
9736 | ||
542d6675 | 9737 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9738 | |
9739 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9740 | if (p1 == 0 || p2 == 0) | |
9741 | clear_qp_mutex (p1mask | p2mask); | |
9742 | else | |
9743 | added = update_qp_mutex (p1mask | p2mask); | |
9744 | ||
9745 | if (CURR_SLOT.qp_regno == 0 | |
9746 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9747 | { |
5e2f6673 L |
9748 | if (added == 0 && p1 && p2) |
9749 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9750 | if (CURR_SLOT.qp_regno != 0) |
9751 | { | |
5e2f6673 L |
9752 | if (p1) |
9753 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9754 | if (p2) | |
9755 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9756 | } |
9757 | } | |
542d6675 KH |
9758 | } |
9759 | } | |
9760 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9761 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9762 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9763 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 9764 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
9765 | && (strcmp (idesc->name, "mov") == 0 |
9766 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9767 | { |
9768 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9769 | if (regno > 0 && regno < NELEMS (gr_values)) |
9770 | { | |
9771 | gr_values[regno].known = 1; | |
9772 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9773 | gr_values[regno].path = md.path; | |
9774 | if (md.debug_dv) | |
2434f565 JW |
9775 | { |
9776 | fprintf (stderr, " Know gr%d = ", regno); | |
9777 | fprintf_vma (stderr, gr_values[regno].value); | |
9778 | fputs ("\n", stderr); | |
9779 | } | |
542d6675 | 9780 | } |
800eeca4 | 9781 | } |
a66d2bb7 JB |
9782 | /* Look for dep.z imm insns. */ |
9783 | else if (idesc->operands[0] == IA64_OPND_R1 | |
9784 | && idesc->operands[1] == IA64_OPND_IMM8 | |
9785 | && strcmp (idesc->name, "dep.z") == 0) | |
9786 | { | |
9787 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
9788 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9789 | { | |
9790 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
9791 | ||
9792 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
9793 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
9794 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
9795 | gr_values[regno].known = 1; | |
9796 | gr_values[regno].value = value; | |
9797 | gr_values[regno].path = md.path; | |
9798 | if (md.debug_dv) | |
9799 | { | |
9800 | fprintf (stderr, " Know gr%d = ", regno); | |
9801 | fprintf_vma (stderr, gr_values[regno].value); | |
9802 | fputs ("\n", stderr); | |
9803 | } | |
9804 | } | |
9805 | } | |
197865e8 | 9806 | else |
800eeca4 JW |
9807 | { |
9808 | clear_qp_mutex (qp_changemask); | |
9809 | clear_qp_implies (qp_changemask, qp_changemask); | |
9810 | } | |
9811 | } | |
9812 | ||
542d6675 KH |
9813 | /* Return whether the given predicate registers are currently mutex. */ |
9814 | ||
800eeca4 | 9815 | static int |
5a49b8ac | 9816 | qp_mutex (int p1, int p2, int path) |
800eeca4 JW |
9817 | { |
9818 | int i; | |
9819 | valueT mask; | |
9820 | ||
9821 | if (p1 != p2) | |
9822 | { | |
542d6675 KH |
9823 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9824 | for (i = 0; i < qp_mutexeslen; i++) | |
9825 | { | |
9826 | if (qp_mutexes[i].path >= path | |
9827 | && (qp_mutexes[i].prmask & mask) == mask) | |
9828 | return 1; | |
9829 | } | |
800eeca4 JW |
9830 | } |
9831 | return 0; | |
9832 | } | |
9833 | ||
9834 | /* Return whether the given resource is in the given insn's list of chks | |
9835 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9836 | conflict. */ |
9837 | ||
800eeca4 | 9838 | static int |
5a49b8ac AM |
9839 | resources_match (struct rsrc *rs, |
9840 | struct ia64_opcode *idesc, | |
9841 | int note, | |
9842 | int qp_regno, | |
9843 | int path) | |
800eeca4 JW |
9844 | { |
9845 | struct rsrc specs[MAX_SPECS]; | |
9846 | int count; | |
9847 | ||
9848 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9849 | we don't need to check. One exception is note 11, which indicates that | |
9850 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9851 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9852 | && note != 11) |
9853 | return 0; | |
9854 | ||
9855 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9856 | while (count-- > 0) | |
9857 | { | |
9858 | /* UNAT checking is a bit more specific than other resources */ | |
9859 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9860 | && specs[count].mem_offset.hint |
9861 | && rs->mem_offset.hint) | |
9862 | { | |
9863 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9864 | { | |
9865 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9866 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9867 | return 1; | |
9868 | else | |
9869 | continue; | |
9870 | } | |
9871 | } | |
800eeca4 | 9872 | |
7484b8e6 | 9873 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9874 | writes are an OR. */ |
7484b8e6 | 9875 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9876 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9877 | || rs->dependency->specifier == IA64_RS_PR63) |
9878 | { | |
9879 | if (specs[count].cmp_type != CMP_NONE | |
9880 | && specs[count].cmp_type == rs->cmp_type) | |
9881 | { | |
9882 | if (md.debug_dv) | |
9883 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9884 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9885 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9886 | specs[count].index : 63); |
9887 | continue; | |
9888 | } | |
9889 | if (md.debug_dv) | |
4a4f25cf | 9890 | fprintf (stderr, |
7484b8e6 TW |
9891 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9892 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9893 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9894 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9895 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9896 | specs[count].index : 63); |
4a4f25cf | 9897 | |
7484b8e6 TW |
9898 | } |
9899 | ||
800eeca4 | 9900 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9901 | */ |
800eeca4 | 9902 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9903 | return 2; |
800eeca4 | 9904 | else if (specs[count].index == rs->index) |
542d6675 | 9905 | return 1; |
800eeca4 | 9906 | } |
800eeca4 JW |
9907 | |
9908 | return 0; | |
9909 | } | |
9910 | ||
9911 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9912 | insert a stop to create the break. Update all resource dependencies | |
9913 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9914 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9915 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9916 | instruction. */ |
800eeca4 JW |
9917 | |
9918 | static void | |
5a49b8ac | 9919 | insn_group_break (int insert_stop, int qp_regno, int save_current) |
800eeca4 JW |
9920 | { |
9921 | int i; | |
9922 | ||
9923 | if (insert_stop && md.num_slots_in_use > 0) | |
9924 | PREV_SLOT.end_of_insn_group = 1; | |
9925 | ||
9926 | if (md.debug_dv) | |
9927 | { | |
197865e8 | 9928 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9929 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9930 | if (qp_regno != 0) |
542d6675 | 9931 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9932 | fprintf (stderr, "\n"); |
9933 | } | |
9934 | ||
9935 | i = 0; | |
9936 | while (i < regdepslen) | |
9937 | { | |
9938 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9939 | ||
9940 | if (qp_regno != 0 | |
542d6675 KH |
9941 | && regdeps[i].qp_regno != qp_regno) |
9942 | { | |
9943 | ++i; | |
9944 | continue; | |
9945 | } | |
800eeca4 JW |
9946 | |
9947 | if (save_current | |
542d6675 KH |
9948 | && CURR_SLOT.src_file == regdeps[i].file |
9949 | && CURR_SLOT.src_line == regdeps[i].line) | |
9950 | { | |
9951 | ++i; | |
9952 | continue; | |
9953 | } | |
800eeca4 JW |
9954 | |
9955 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9956 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9957 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9958 | || dep->semantics == IA64_DVS_IMPLIEDF |
9959 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9960 | { | |
9961 | print_dependency ("Removing", i); | |
9962 | regdeps[i] = regdeps[--regdepslen]; | |
9963 | } | |
800eeca4 | 9964 | else |
542d6675 KH |
9965 | { |
9966 | if (dep->semantics == IA64_DVS_DATA | |
9967 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9968 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9969 | { |
9970 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9971 | regdeps[i].insn_srlz = STATE_STOP; | |
9972 | if (regdeps[i].data_srlz == STATE_NONE) | |
9973 | regdeps[i].data_srlz = STATE_STOP; | |
9974 | } | |
9975 | ++i; | |
9976 | } | |
800eeca4 JW |
9977 | } |
9978 | } | |
9979 | ||
542d6675 KH |
9980 | /* Add the given resource usage spec to the list of active dependencies. */ |
9981 | ||
197865e8 | 9982 | static void |
5a49b8ac AM |
9983 | mark_resource (struct ia64_opcode *idesc ATTRIBUTE_UNUSED, |
9984 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED, | |
9985 | struct rsrc *spec, | |
9986 | int depind, | |
9987 | int path) | |
800eeca4 JW |
9988 | { |
9989 | if (regdepslen == regdepstotlen) | |
9990 | { | |
9991 | regdepstotlen += 20; | |
9992 | regdeps = (struct rsrc *) | |
542d6675 | 9993 | xrealloc ((void *) regdeps, |
bc805888 | 9994 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
9995 | } |
9996 | ||
9997 | regdeps[regdepslen] = *spec; | |
9998 | regdeps[regdepslen].depind = depind; | |
9999 | regdeps[regdepslen].path = path; | |
10000 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10001 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10002 | ||
10003 | print_dependency ("Adding", regdepslen); | |
10004 | ||
10005 | ++regdepslen; | |
10006 | } | |
10007 | ||
10008 | static void | |
5a49b8ac | 10009 | print_dependency (const char *action, int depind) |
800eeca4 JW |
10010 | { |
10011 | if (md.debug_dv) | |
10012 | { | |
197865e8 | 10013 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10014 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10015 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10016 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10017 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10018 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10019 | { |
10020 | fputs (" ", stderr); | |
10021 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10022 | fputs ("+", stderr); | |
10023 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10024 | } | |
800eeca4 JW |
10025 | fprintf (stderr, "\n"); |
10026 | } | |
10027 | } | |
10028 | ||
10029 | static void | |
5a49b8ac | 10030 | instruction_serialization (void) |
800eeca4 JW |
10031 | { |
10032 | int i; | |
10033 | if (md.debug_dv) | |
10034 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10035 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10036 | if (regdeps[i].insn_srlz == STATE_STOP) |
10037 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10038 | } | |
10039 | ||
10040 | static void | |
5a49b8ac | 10041 | data_serialization (void) |
800eeca4 JW |
10042 | { |
10043 | int i = 0; | |
10044 | if (md.debug_dv) | |
10045 | fprintf (stderr, " Data serialization\n"); | |
10046 | while (i < regdepslen) | |
10047 | { | |
10048 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10049 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10050 | data serialization. This might change with new tables */ | |
10051 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10052 | { | |
10053 | print_dependency ("Removing", i); | |
10054 | regdeps[i] = regdeps[--regdepslen]; | |
10055 | } | |
800eeca4 | 10056 | else |
542d6675 | 10057 | ++i; |
800eeca4 JW |
10058 | } |
10059 | } | |
10060 | ||
542d6675 KH |
10061 | /* Insert stops and serializations as needed to avoid DVs. */ |
10062 | ||
800eeca4 | 10063 | static void |
5a49b8ac | 10064 | remove_marked_resource (struct rsrc *rs) |
800eeca4 JW |
10065 | { |
10066 | switch (rs->dependency->semantics) | |
10067 | { | |
10068 | case IA64_DVS_SPECIFIC: | |
10069 | if (md.debug_dv) | |
10070 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10071 | /* ...fall through... */ |
800eeca4 JW |
10072 | case IA64_DVS_INSTR: |
10073 | if (md.debug_dv) | |
542d6675 | 10074 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10075 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10076 | insn_group_break (1, 0, 0); |
800eeca4 | 10077 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10078 | { |
888a75be | 10079 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10080 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10081 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10082 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10083 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10084 | instruction_serialization (); | |
10085 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10086 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10087 | emit_one_bundle (); | |
888a75be | 10088 | CURR_SLOT = oldslot; |
542d6675 | 10089 | } |
800eeca4 JW |
10090 | insn_group_break (1, 0, 0); |
10091 | break; | |
10092 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10093 | "other" types of DV are eliminated |
10094 | by a data serialization */ | |
800eeca4 JW |
10095 | case IA64_DVS_DATA: |
10096 | if (md.debug_dv) | |
542d6675 | 10097 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10098 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10099 | insn_group_break (1, 0, 0); |
800eeca4 | 10100 | { |
888a75be | 10101 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10102 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10103 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10104 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10105 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10106 | data_serialization (); | |
10107 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10108 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10109 | emit_one_bundle (); | |
888a75be | 10110 | CURR_SLOT = oldslot; |
800eeca4 JW |
10111 | } |
10112 | break; | |
10113 | case IA64_DVS_IMPLIED: | |
10114 | case IA64_DVS_IMPLIEDF: | |
10115 | if (md.debug_dv) | |
542d6675 | 10116 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10117 | insn_group_break (1, 0, 0); |
10118 | break; | |
10119 | default: | |
10120 | break; | |
10121 | } | |
10122 | } | |
10123 | ||
10124 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10125 | list. |
800eeca4 JW |
10126 | |
10127 | The check is run once for each execution path encountered. In this case, | |
10128 | a unique execution path is the sequence of instructions following a code | |
10129 | entry point, e.g. the following has three execution paths, one starting | |
10130 | at L0, one at L1, and one at L2. | |
197865e8 | 10131 | |
800eeca4 JW |
10132 | L0: nop |
10133 | L1: add | |
10134 | L2: add | |
197865e8 | 10135 | br.ret |
800eeca4 | 10136 | */ |
542d6675 | 10137 | |
800eeca4 | 10138 | static void |
5a49b8ac | 10139 | check_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10140 | { |
10141 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10142 | int path; | |
10143 | int i; | |
10144 | ||
10145 | /* Note that the number of marked resources may change within the | |
197865e8 | 10146 | loop if in auto mode. */ |
800eeca4 JW |
10147 | i = 0; |
10148 | while (i < regdepslen) | |
10149 | { | |
10150 | struct rsrc *rs = ®deps[i]; | |
10151 | const struct ia64_dependency *dep = rs->dependency; | |
10152 | int chkind; | |
10153 | int note; | |
10154 | int start_over = 0; | |
10155 | ||
10156 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10157 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10158 | { | |
10159 | ++i; | |
10160 | continue; | |
10161 | } | |
10162 | ||
10163 | note = NOTE (opdeps->chks[chkind]); | |
10164 | ||
10165 | /* Check this resource against each execution path seen thus far. */ | |
10166 | for (path = 0; path <= md.path; path++) | |
10167 | { | |
10168 | int matchtype; | |
10169 | ||
10170 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10171 | if (rs->path < path) | |
10172 | continue; | |
10173 | ||
10174 | /* If the QP for this insn implies a QP which has branched, don't | |
10175 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10176 | useful; what's the point of generating code which will only be | |
10177 | reached if its QP is zero? | |
10178 | This code was specifically inserted to handle the following code, | |
10179 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10180 | ||
10181 | mov r4 = 2 | |
10182 | (p2) br.cond L | |
10183 | (p1) mov r4 = 7 | |
10184 | */ | |
10185 | if (CURR_SLOT.qp_regno != 0) | |
10186 | { | |
10187 | int skip = 0; | |
10188 | int implies; | |
10189 | for (implies = 0; implies < qp_implieslen; implies++) | |
10190 | { | |
10191 | if (qp_implies[implies].path >= path | |
10192 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10193 | && qp_implies[implies].p2_branched) | |
10194 | { | |
10195 | skip = 1; | |
10196 | break; | |
10197 | } | |
10198 | } | |
10199 | if (skip) | |
10200 | continue; | |
10201 | } | |
10202 | ||
10203 | if ((matchtype = resources_match (rs, idesc, note, | |
10204 | CURR_SLOT.qp_regno, path)) != 0) | |
10205 | { | |
10206 | char msg[1024]; | |
10207 | char pathmsg[256] = ""; | |
10208 | char indexmsg[256] = ""; | |
10209 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10210 | ||
10211 | if (path != 0) | |
f9f21a03 L |
10212 | snprintf (pathmsg, sizeof (pathmsg), |
10213 | " when entry is at label '%s'", | |
542d6675 | 10214 | md.entry_labels[path - 1]); |
a66d2bb7 | 10215 | if (matchtype == 1 && rs->index >= 0) |
f9f21a03 L |
10216 | snprintf (indexmsg, sizeof (indexmsg), |
10217 | ", specific resource number is %d", | |
542d6675 | 10218 | rs->index); |
f9f21a03 L |
10219 | snprintf (msg, sizeof (msg), |
10220 | "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
542d6675 KH |
10221 | idesc->name, |
10222 | (certain ? "violates" : "may violate"), | |
10223 | dv_mode[dep->mode], dep->name, | |
10224 | dv_sem[dep->semantics], | |
10225 | pathmsg, indexmsg); | |
10226 | ||
10227 | if (md.explicit_mode) | |
10228 | { | |
10229 | as_warn ("%s", msg); | |
10230 | if (path < md.path) | |
ad4b42b4 | 10231 | as_warn (_("Only the first path encountering the conflict is reported")); |
542d6675 | 10232 | as_warn_where (rs->file, rs->line, |
ad4b42b4 | 10233 | _("This is the location of the conflicting usage")); |
542d6675 KH |
10234 | /* Don't bother checking other paths, to avoid duplicating |
10235 | the same warning */ | |
10236 | break; | |
10237 | } | |
10238 | else | |
10239 | { | |
10240 | if (md.debug_dv) | |
10241 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10242 | ||
10243 | remove_marked_resource (rs); | |
10244 | ||
10245 | /* since the set of dependencies has changed, start over */ | |
10246 | /* FIXME -- since we're removing dvs as we go, we | |
10247 | probably don't really need to start over... */ | |
10248 | start_over = 1; | |
10249 | break; | |
10250 | } | |
10251 | } | |
10252 | } | |
800eeca4 | 10253 | if (start_over) |
542d6675 | 10254 | i = 0; |
800eeca4 | 10255 | else |
542d6675 | 10256 | ++i; |
800eeca4 JW |
10257 | } |
10258 | } | |
10259 | ||
542d6675 KH |
10260 | /* Register new dependencies based on the given opcode. */ |
10261 | ||
800eeca4 | 10262 | static void |
5a49b8ac | 10263 | mark_resources (struct ia64_opcode *idesc) |
800eeca4 JW |
10264 | { |
10265 | int i; | |
10266 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10267 | int add_only_qp_reads = 0; | |
10268 | ||
10269 | /* A conditional branch only uses its resources if it is taken; if it is | |
10270 | taken, we stop following that path. The other branch types effectively | |
10271 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10272 | reads. */ |
800eeca4 JW |
10273 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10274 | { | |
10275 | add_only_qp_reads = 1; | |
10276 | } | |
10277 | ||
10278 | if (md.debug_dv) | |
10279 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10280 | ||
542d6675 | 10281 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10282 | { |
10283 | const struct ia64_dependency *dep; | |
10284 | struct rsrc specs[MAX_SPECS]; | |
10285 | int note; | |
10286 | int path; | |
10287 | int count; | |
197865e8 | 10288 | |
800eeca4 | 10289 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10290 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10291 | |
10292 | if (add_only_qp_reads | |
542d6675 KH |
10293 | && !(dep->mode == IA64_DV_WAR |
10294 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10295 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10296 | || dep->specifier == IA64_RS_PR63))) |
10297 | continue; | |
800eeca4 JW |
10298 | |
10299 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10300 | ||
800eeca4 | 10301 | while (count-- > 0) |
542d6675 KH |
10302 | { |
10303 | mark_resource (idesc, dep, &specs[count], | |
10304 | DEP (opdeps->regs[i]), md.path); | |
10305 | } | |
800eeca4 JW |
10306 | |
10307 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10308 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10309 | switch (dep->specifier) |
542d6675 KH |
10310 | { |
10311 | default: | |
10312 | break; | |
10313 | case IA64_RS_CPUID: | |
10314 | case IA64_RS_DBR: | |
10315 | case IA64_RS_IBR: | |
800eeca4 | 10316 | case IA64_RS_MSR: |
542d6675 KH |
10317 | case IA64_RS_PKR: |
10318 | case IA64_RS_PMC: | |
10319 | case IA64_RS_PMD: | |
10320 | case IA64_RS_RR: | |
10321 | for (path = 0; path < md.path; path++) | |
10322 | { | |
10323 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10324 | while (count-- > 0) | |
10325 | mark_resource (idesc, dep, &specs[count], | |
10326 | DEP (opdeps->regs[i]), path); | |
10327 | } | |
10328 | break; | |
10329 | } | |
10330 | } | |
10331 | } | |
10332 | ||
10333 | /* Remove dependencies when they no longer apply. */ | |
10334 | ||
800eeca4 | 10335 | static void |
5a49b8ac | 10336 | update_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10337 | { |
10338 | int i; | |
10339 | ||
10340 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10341 | { | |
10342 | instruction_serialization (); | |
10343 | } | |
10344 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10345 | { | |
10346 | data_serialization (); | |
10347 | } | |
10348 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10349 | || is_taken_branch (idesc)) |
800eeca4 | 10350 | { |
542d6675 KH |
10351 | /* Although technically the taken branch doesn't clear dependencies |
10352 | which require a srlz.[id], we don't follow the branch; the next | |
10353 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10354 | regdepslen = 0; |
800eeca4 JW |
10355 | md.path = 0; |
10356 | } | |
10357 | else if (is_conditional_branch (idesc) | |
542d6675 | 10358 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10359 | { |
10360 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10361 | ||
542d6675 KH |
10362 | for (i = 0; i < qp_implieslen; i++) |
10363 | { | |
10364 | /* If the conditional branch's predicate is implied by the predicate | |
10365 | in an existing dependency, remove that dependency. */ | |
10366 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10367 | { | |
10368 | int depind = 0; | |
10369 | /* Note that this implied predicate takes a branch so that if | |
10370 | a later insn generates a DV but its predicate implies this | |
10371 | one, we can avoid the false DV warning. */ | |
10372 | qp_implies[i].p2_branched = 1; | |
10373 | while (depind < regdepslen) | |
10374 | { | |
10375 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10376 | { | |
10377 | print_dependency ("Removing", depind); | |
10378 | regdeps[depind] = regdeps[--regdepslen]; | |
10379 | } | |
10380 | else | |
10381 | ++depind; | |
10382 | } | |
10383 | } | |
10384 | } | |
800eeca4 | 10385 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10386 | cleared, provided that the QP hasn't been modified between the |
10387 | marking instruction and the branch. */ | |
800eeca4 | 10388 | if (is_call) |
542d6675 KH |
10389 | { |
10390 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10391 | } | |
800eeca4 | 10392 | else |
542d6675 KH |
10393 | { |
10394 | i = 0; | |
10395 | while (i < regdepslen) | |
10396 | { | |
10397 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10398 | && regdeps[i].link_to_qp_branch | |
10399 | && (regdeps[i].file != CURR_SLOT.src_file | |
10400 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10401 | { | |
10402 | /* Treat like a taken branch */ | |
10403 | print_dependency ("Removing", i); | |
10404 | regdeps[i] = regdeps[--regdepslen]; | |
10405 | } | |
10406 | else | |
10407 | ++i; | |
10408 | } | |
10409 | } | |
800eeca4 JW |
10410 | } |
10411 | } | |
10412 | ||
10413 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10414 | |
800eeca4 | 10415 | static int |
5a49b8ac | 10416 | check_dv (struct ia64_opcode *idesc) |
800eeca4 JW |
10417 | { |
10418 | if (md.debug_dv) | |
10419 | { | |
197865e8 | 10420 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10421 | idesc->name, CURR_SLOT.src_line, |
10422 | idesc->dependencies->nchks, | |
10423 | idesc->dependencies->nregs); | |
800eeca4 JW |
10424 | } |
10425 | ||
197865e8 | 10426 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10427 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10428 | check against the specific resources used. */ |
800eeca4 JW |
10429 | check_dependencies (idesc); |
10430 | ||
542d6675 KH |
10431 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10432 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10433 | mark_resources (idesc); |
10434 | ||
10435 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10436 | requirements for being cleared |
10437 | ||
800eeca4 JW |
10438 | Instruction serialization (insns separated by interruption, rfi, or |
10439 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10440 | ||
10441 | Data serialization (instruction serialization, or writer + srlz.d + | |
10442 | reader, where writer and srlz.d are in separate groups) clears | |
10443 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10444 | always be the case). | |
10445 | ||
10446 | Instruction group break (groups separated by stop, taken branch, | |
10447 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10448 | */ | |
10449 | update_dependencies (idesc); | |
10450 | ||
10451 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10452 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10453 | note_register_values (idesc); |
10454 | ||
197865e8 | 10455 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10456 | md.mem_offset.hint = 0; |
10457 | ||
10458 | return 0; | |
10459 | } | |
10460 | ||
10461 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10462 | here. */ | |
10463 | void | |
5a49b8ac | 10464 | md_assemble (char *str) |
800eeca4 JW |
10465 | { |
10466 | char *saved_input_line_pointer, *mnemonic; | |
10467 | const struct pseudo_opcode *pdesc; | |
10468 | struct ia64_opcode *idesc; | |
10469 | unsigned char qp_regno; | |
10470 | unsigned int flags; | |
10471 | int ch; | |
10472 | ||
10473 | saved_input_line_pointer = input_line_pointer; | |
10474 | input_line_pointer = str; | |
10475 | ||
542d6675 | 10476 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10477 | |
10478 | mnemonic = input_line_pointer; | |
10479 | ch = get_symbol_end (); | |
10480 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10481 | if (pdesc) | |
10482 | { | |
10483 | *input_line_pointer = ch; | |
10484 | (*pdesc->handler) (pdesc->arg); | |
10485 | goto done; | |
10486 | } | |
10487 | ||
542d6675 | 10488 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10489 | |
10490 | idesc = ia64_find_opcode (mnemonic); | |
10491 | *input_line_pointer = ch; | |
10492 | if (!idesc) | |
10493 | { | |
ad4b42b4 | 10494 | as_bad (_("Unknown opcode `%s'"), mnemonic); |
800eeca4 JW |
10495 | goto done; |
10496 | } | |
10497 | ||
10498 | idesc = parse_operands (idesc); | |
10499 | if (!idesc) | |
10500 | goto done; | |
10501 | ||
542d6675 | 10502 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10503 | if (idesc->type == IA64_TYPE_DYN) |
10504 | { | |
10505 | if (strcmp (idesc->name, "add") == 0) | |
10506 | { | |
10507 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10508 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10509 | mnemonic = "addl"; | |
10510 | else | |
10511 | mnemonic = "adds"; | |
3d56ab85 | 10512 | ia64_free_opcode (idesc); |
800eeca4 | 10513 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10514 | } |
10515 | else if (strcmp (idesc->name, "mov") == 0) | |
10516 | { | |
10517 | enum ia64_opnd opnd1, opnd2; | |
10518 | int rop; | |
10519 | ||
10520 | opnd1 = idesc->operands[0]; | |
10521 | opnd2 = idesc->operands[1]; | |
10522 | if (opnd1 == IA64_OPND_AR3) | |
10523 | rop = 0; | |
10524 | else if (opnd2 == IA64_OPND_AR3) | |
10525 | rop = 1; | |
10526 | else | |
10527 | abort (); | |
652ca075 L |
10528 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10529 | { | |
10530 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10531 | mnemonic = "mov.i"; | |
97762d08 | 10532 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10533 | mnemonic = "mov.m"; |
97762d08 JB |
10534 | else |
10535 | rop = -1; | |
652ca075 | 10536 | } |
800eeca4 | 10537 | else |
652ca075 | 10538 | abort (); |
97762d08 JB |
10539 | if (rop >= 0) |
10540 | { | |
10541 | ia64_free_opcode (idesc); | |
10542 | idesc = ia64_find_opcode (mnemonic); | |
10543 | while (idesc != NULL | |
10544 | && (idesc->operands[0] != opnd1 | |
10545 | || idesc->operands[1] != opnd2)) | |
10546 | idesc = get_next_opcode (idesc); | |
10547 | } | |
800eeca4 JW |
10548 | } |
10549 | } | |
652ca075 L |
10550 | else if (strcmp (idesc->name, "mov.i") == 0 |
10551 | || strcmp (idesc->name, "mov.m") == 0) | |
10552 | { | |
10553 | enum ia64_opnd opnd1, opnd2; | |
10554 | int rop; | |
10555 | ||
10556 | opnd1 = idesc->operands[0]; | |
10557 | opnd2 = idesc->operands[1]; | |
10558 | if (opnd1 == IA64_OPND_AR3) | |
10559 | rop = 0; | |
10560 | else if (opnd2 == IA64_OPND_AR3) | |
10561 | rop = 1; | |
10562 | else | |
10563 | abort (); | |
10564 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10565 | { | |
10566 | char unit = 'a'; | |
10567 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10568 | unit = 'i'; | |
10569 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10570 | unit = 'm'; | |
10571 | if (unit != 'a' && unit != idesc->name [4]) | |
ad4b42b4 | 10572 | as_bad (_("AR %d can only be accessed by %c-unit"), |
652ca075 L |
10573 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10574 | TOUPPER (unit)); | |
10575 | } | |
10576 | } | |
91d777ee L |
10577 | else if (strcmp (idesc->name, "hint.b") == 0) |
10578 | { | |
10579 | switch (md.hint_b) | |
10580 | { | |
10581 | case hint_b_ok: | |
10582 | break; | |
10583 | case hint_b_warning: | |
ad4b42b4 | 10584 | as_warn (_("hint.b may be treated as nop")); |
91d777ee L |
10585 | break; |
10586 | case hint_b_error: | |
ad4b42b4 | 10587 | as_bad (_("hint.b shouldn't be used")); |
91d777ee L |
10588 | break; |
10589 | } | |
10590 | } | |
800eeca4 JW |
10591 | |
10592 | qp_regno = 0; | |
10593 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10594 | { |
10595 | qp_regno = md.qp.X_add_number - REG_P; | |
10596 | md.qp.X_op = O_absent; | |
10597 | } | |
800eeca4 JW |
10598 | |
10599 | flags = idesc->flags; | |
10600 | ||
10601 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10602 | { |
10603 | /* The alignment frag has to end with a stop bit only if the | |
10604 | next instruction after the alignment directive has to be | |
10605 | the first instruction in an instruction group. */ | |
10606 | if (align_frag) | |
10607 | { | |
10608 | while (align_frag->fr_type != rs_align_code) | |
10609 | { | |
10610 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10611 | if (!align_frag) |
10612 | break; | |
9545c4ce | 10613 | } |
bae25f19 L |
10614 | /* align_frag can be NULL if there are directives in |
10615 | between. */ | |
10616 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10617 | align_frag->tc_frag_data = 1; |
10618 | } | |
10619 | ||
10620 | insn_group_break (1, 0, 0); | |
10621 | } | |
10622 | align_frag = NULL; | |
800eeca4 JW |
10623 | |
10624 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10625 | { | |
ad4b42b4 | 10626 | as_bad (_("`%s' cannot be predicated"), idesc->name); |
800eeca4 JW |
10627 | goto done; |
10628 | } | |
10629 | ||
542d6675 | 10630 | /* Build the instruction. */ |
800eeca4 JW |
10631 | CURR_SLOT.qp_regno = qp_regno; |
10632 | CURR_SLOT.idesc = idesc; | |
10633 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10634 | dwarf2_where (&CURR_SLOT.debug_line); |
661ba50f | 10635 | dwarf2_consume_line_info (); |
800eeca4 | 10636 | |
ba825241 | 10637 | /* Add unwind entries, if there are any. */ |
e0c9811a | 10638 | if (unwind.current_entry) |
800eeca4 | 10639 | { |
e0c9811a JW |
10640 | CURR_SLOT.unwind_record = unwind.current_entry; |
10641 | unwind.current_entry = NULL; | |
800eeca4 | 10642 | } |
ba825241 JB |
10643 | if (unwind.pending_saves) |
10644 | { | |
10645 | if (unwind.pending_saves->next) | |
10646 | { | |
10647 | /* Attach the next pending save to the next slot so that its | |
10648 | slot number will get set correctly. */ | |
10649 | add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); | |
10650 | unwind.pending_saves = &unwind.pending_saves->next->r.record.p; | |
10651 | } | |
10652 | else | |
10653 | unwind.pending_saves = NULL; | |
10654 | } | |
5656b6b8 | 10655 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10656 | unwind.insn = 1; |
800eeca4 | 10657 | |
542d6675 | 10658 | /* Check for dependency violations. */ |
800eeca4 | 10659 | if (md.detect_dv) |
542d6675 | 10660 | check_dv (idesc); |
800eeca4 JW |
10661 | |
10662 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10663 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10664 | emit_one_bundle (); | |
10665 | ||
10666 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10667 | insn_group_break (1, 0, 0); | |
10668 | ||
10669 | md.last_text_seg = now_seg; | |
10670 | ||
10671 | done: | |
10672 | input_line_pointer = saved_input_line_pointer; | |
10673 | } | |
10674 | ||
10675 | /* Called when symbol NAME cannot be found in the symbol table. | |
10676 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10677 | |
10678 | symbolS * | |
5a49b8ac | 10679 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
800eeca4 JW |
10680 | { |
10681 | return 0; | |
10682 | } | |
10683 | ||
10684 | /* Called for any expression that can not be recognized. When the | |
10685 | function is called, `input_line_pointer' will point to the start of | |
10686 | the expression. */ | |
542d6675 | 10687 | |
800eeca4 | 10688 | void |
5a49b8ac | 10689 | md_operand (expressionS *e) |
800eeca4 | 10690 | { |
800eeca4 JW |
10691 | switch (*input_line_pointer) |
10692 | { | |
800eeca4 JW |
10693 | case '[': |
10694 | ++input_line_pointer; | |
60d11e55 | 10695 | expression_and_evaluate (e); |
800eeca4 JW |
10696 | if (*input_line_pointer != ']') |
10697 | { | |
ad4b42b4 | 10698 | as_bad (_("Closing bracket missing")); |
800eeca4 JW |
10699 | goto err; |
10700 | } | |
10701 | else | |
10702 | { | |
6a2375c6 JB |
10703 | if (e->X_op != O_register |
10704 | || e->X_add_number < REG_GR | |
10705 | || e->X_add_number > REG_GR + 127) | |
10706 | { | |
ad4b42b4 | 10707 | as_bad (_("Index must be a general register")); |
6a2375c6 JB |
10708 | e->X_add_number = REG_GR; |
10709 | } | |
800eeca4 JW |
10710 | |
10711 | ++input_line_pointer; | |
10712 | e->X_op = O_index; | |
10713 | } | |
10714 | break; | |
10715 | ||
10716 | default: | |
10717 | break; | |
10718 | } | |
10719 | return; | |
10720 | ||
10721 | err: | |
10722 | ignore_rest_of_line (); | |
10723 | } | |
10724 | ||
10725 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10726 | a section symbol plus some offset. For relocs involving @fptr(), | |
10727 | directives we don't want such adjustments since we need to have the | |
10728 | original symbol's name in the reloc. */ | |
10729 | int | |
5a49b8ac | 10730 | ia64_fix_adjustable (fixS *fix) |
800eeca4 JW |
10731 | { |
10732 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 10733 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
10734 | return 0; |
10735 | ||
10736 | switch (fix->fx_r_type) | |
10737 | { | |
10738 | case BFD_RELOC_IA64_FPTR64I: | |
10739 | case BFD_RELOC_IA64_FPTR32MSB: | |
10740 | case BFD_RELOC_IA64_FPTR32LSB: | |
10741 | case BFD_RELOC_IA64_FPTR64MSB: | |
10742 | case BFD_RELOC_IA64_FPTR64LSB: | |
10743 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10744 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10745 | return 0; | |
10746 | default: | |
10747 | break; | |
10748 | } | |
10749 | ||
10750 | return 1; | |
10751 | } | |
10752 | ||
10753 | int | |
5a49b8ac | 10754 | ia64_force_relocation (fixS *fix) |
800eeca4 JW |
10755 | { |
10756 | switch (fix->fx_r_type) | |
10757 | { | |
10758 | case BFD_RELOC_IA64_FPTR64I: | |
10759 | case BFD_RELOC_IA64_FPTR32MSB: | |
10760 | case BFD_RELOC_IA64_FPTR32LSB: | |
10761 | case BFD_RELOC_IA64_FPTR64MSB: | |
10762 | case BFD_RELOC_IA64_FPTR64LSB: | |
10763 | ||
10764 | case BFD_RELOC_IA64_LTOFF22: | |
10765 | case BFD_RELOC_IA64_LTOFF64I: | |
10766 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10767 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10768 | case BFD_RELOC_IA64_PLTOFF22: | |
10769 | case BFD_RELOC_IA64_PLTOFF64I: | |
10770 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10771 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10772 | |
10773 | case BFD_RELOC_IA64_LTOFF22X: | |
10774 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10775 | return 1; |
10776 | ||
10777 | default: | |
a161fe53 | 10778 | break; |
800eeca4 | 10779 | } |
a161fe53 | 10780 | |
ae6063d4 | 10781 | return generic_force_reloc (fix); |
800eeca4 JW |
10782 | } |
10783 | ||
10784 | /* Decide from what point a pc-relative relocation is relative to, | |
10785 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10786 | long | |
5a49b8ac | 10787 | ia64_pcrel_from_section (fixS *fix, segT sec) |
800eeca4 JW |
10788 | { |
10789 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10790 | |
800eeca4 JW |
10791 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10792 | off &= ~0xfUL; | |
10793 | ||
10794 | return off; | |
10795 | } | |
10796 | ||
6174d9c8 RH |
10797 | |
10798 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10799 | void | |
10800 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10801 | { | |
10802 | expressionS expr; | |
10803 | ||
10804 | expr.X_op = O_pseudo_fixup; | |
10805 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10806 | expr.X_add_number = 0; | |
10807 | expr.X_add_symbol = symbol; | |
10808 | emit_expr (&expr, size); | |
10809 | } | |
10810 | ||
800eeca4 JW |
10811 | /* This is called whenever some data item (not an instruction) needs a |
10812 | fixup. We pick the right reloc code depending on the byteorder | |
10813 | currently in effect. */ | |
10814 | void | |
5a49b8ac | 10815 | ia64_cons_fix_new (fragS *f, int where, int nbytes, expressionS *exp) |
800eeca4 JW |
10816 | { |
10817 | bfd_reloc_code_real_type code; | |
10818 | fixS *fix; | |
10819 | ||
10820 | switch (nbytes) | |
10821 | { | |
10822 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10823 | them here since they will work fine as long as the expression | |
10824 | is fully defined at the end of the pass over the source file. */ | |
10825 | case 1: code = BFD_RELOC_8; break; | |
10826 | case 2: code = BFD_RELOC_16; break; | |
10827 | case 4: | |
10828 | if (target_big_endian) | |
10829 | code = BFD_RELOC_IA64_DIR32MSB; | |
10830 | else | |
10831 | code = BFD_RELOC_IA64_DIR32LSB; | |
10832 | break; | |
10833 | ||
10834 | case 8: | |
40449e9f | 10835 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10836 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10837 | && exp->X_op_symbol |
10838 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10839 | && !(md.flags & EF_IA_64_ABI64)) | |
10840 | { | |
10841 | if (target_big_endian) | |
10842 | code = BFD_RELOC_IA64_IPLTMSB; | |
10843 | else | |
10844 | code = BFD_RELOC_IA64_IPLTLSB; | |
10845 | exp->X_op = O_symbol; | |
10846 | break; | |
10847 | } | |
10848 | else | |
10849 | { | |
10850 | if (target_big_endian) | |
10851 | code = BFD_RELOC_IA64_DIR64MSB; | |
10852 | else | |
10853 | code = BFD_RELOC_IA64_DIR64LSB; | |
10854 | break; | |
10855 | } | |
800eeca4 | 10856 | |
3969b680 RH |
10857 | case 16: |
10858 | if (exp->X_op == O_pseudo_fixup | |
10859 | && exp->X_op_symbol | |
10860 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10861 | { | |
10862 | if (target_big_endian) | |
10863 | code = BFD_RELOC_IA64_IPLTMSB; | |
10864 | else | |
10865 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10866 | exp->X_op = O_symbol; |
10867 | break; | |
10868 | } | |
10869 | /* FALLTHRU */ | |
10870 | ||
800eeca4 | 10871 | default: |
ad4b42b4 | 10872 | as_bad (_("Unsupported fixup size %d"), nbytes); |
800eeca4 JW |
10873 | ignore_rest_of_line (); |
10874 | return; | |
10875 | } | |
6174d9c8 | 10876 | |
800eeca4 JW |
10877 | if (exp->X_op == O_pseudo_fixup) |
10878 | { | |
800eeca4 JW |
10879 | exp->X_op = O_symbol; |
10880 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10881 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10882 | } |
3969b680 | 10883 | |
800eeca4 JW |
10884 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10885 | /* We need to store the byte order in effect in case we're going | |
10886 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 10887 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
10888 | fix->tc_fix_data.bigendian = target_big_endian; |
10889 | } | |
10890 | ||
10891 | /* Return the actual relocation we wish to associate with the pseudo | |
10892 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10893 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10894 | |
10895 | static bfd_reloc_code_real_type | |
5a49b8ac | 10896 | ia64_gen_real_reloc_type (struct symbol *sym, bfd_reloc_code_real_type r_type) |
800eeca4 | 10897 | { |
d3ce72d0 | 10898 | bfd_reloc_code_real_type newr = 0; |
0ca3e455 | 10899 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
10900 | |
10901 | if (sym == NULL) | |
10902 | { | |
10903 | return r_type; | |
10904 | } | |
10905 | ||
10906 | switch (S_GET_VALUE (sym)) | |
10907 | { | |
10908 | case FUNC_FPTR_RELATIVE: | |
10909 | switch (r_type) | |
10910 | { | |
d3ce72d0 NC |
10911 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_FPTR64I; break; |
10912 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_FPTR32MSB; break; | |
10913 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_FPTR32LSB; break; | |
10914 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_FPTR64MSB; break; | |
10915 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 10916 | default: type = "FPTR"; break; |
800eeca4 JW |
10917 | } |
10918 | break; | |
10919 | ||
10920 | case FUNC_GP_RELATIVE: | |
10921 | switch (r_type) | |
10922 | { | |
d3ce72d0 NC |
10923 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_GPREL22; break; |
10924 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_GPREL64I; break; | |
10925 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_GPREL32MSB; break; | |
10926 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_GPREL32LSB; break; | |
10927 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_GPREL64MSB; break; | |
10928 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 10929 | default: type = "GPREL"; break; |
800eeca4 JW |
10930 | } |
10931 | break; | |
10932 | ||
10933 | case FUNC_LT_RELATIVE: | |
10934 | switch (r_type) | |
10935 | { | |
d3ce72d0 NC |
10936 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22; break; |
10937 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 10938 | default: type = "LTOFF"; break; |
800eeca4 JW |
10939 | } |
10940 | break; | |
10941 | ||
fa2c7eff RH |
10942 | case FUNC_LT_RELATIVE_X: |
10943 | switch (r_type) | |
10944 | { | |
d3ce72d0 | 10945 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22X; break; |
0ca3e455 | 10946 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
10947 | } |
10948 | break; | |
10949 | ||
c67e42c9 RH |
10950 | case FUNC_PC_RELATIVE: |
10951 | switch (r_type) | |
10952 | { | |
d3ce72d0 NC |
10953 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PCREL22; break; |
10954 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PCREL64I; break; | |
10955 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_PCREL32MSB; break; | |
10956 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_PCREL32LSB; break; | |
10957 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PCREL64MSB; break; | |
10958 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 10959 | default: type = "PCREL"; break; |
c67e42c9 RH |
10960 | } |
10961 | break; | |
10962 | ||
800eeca4 JW |
10963 | case FUNC_PLT_RELATIVE: |
10964 | switch (r_type) | |
10965 | { | |
d3ce72d0 NC |
10966 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PLTOFF22; break; |
10967 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PLTOFF64I; break; | |
10968 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10969 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 10970 | default: type = "PLTOFF"; break; |
800eeca4 JW |
10971 | } |
10972 | break; | |
10973 | ||
10974 | case FUNC_SEC_RELATIVE: | |
10975 | switch (r_type) | |
10976 | { | |
d3ce72d0 NC |
10977 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SECREL32MSB;break; |
10978 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SECREL32LSB;break; | |
10979 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SECREL64MSB;break; | |
10980 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 10981 | default: type = "SECREL"; break; |
800eeca4 JW |
10982 | } |
10983 | break; | |
10984 | ||
10985 | case FUNC_SEG_RELATIVE: | |
10986 | switch (r_type) | |
10987 | { | |
d3ce72d0 NC |
10988 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SEGREL32MSB;break; |
10989 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SEGREL32LSB;break; | |
10990 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SEGREL64MSB;break; | |
10991 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 10992 | default: type = "SEGREL"; break; |
800eeca4 JW |
10993 | } |
10994 | break; | |
10995 | ||
10996 | case FUNC_LTV_RELATIVE: | |
10997 | switch (r_type) | |
10998 | { | |
d3ce72d0 NC |
10999 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_LTV32MSB; break; |
11000 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_LTV32LSB; break; | |
11001 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_LTV64MSB; break; | |
11002 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11003 | default: type = "LTV"; break; |
800eeca4 JW |
11004 | } |
11005 | break; | |
11006 | ||
11007 | case FUNC_LT_FPTR_RELATIVE: | |
11008 | switch (r_type) | |
11009 | { | |
11010 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11011 | newr = BFD_RELOC_IA64_LTOFF_FPTR22; break; |
800eeca4 | 11012 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11013 | newr = BFD_RELOC_IA64_LTOFF_FPTR64I; break; |
0ca3e455 | 11014 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11015 | newr = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; |
0ca3e455 | 11016 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11017 | newr = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; |
0ca3e455 | 11018 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11019 | newr = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; |
0ca3e455 | 11020 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11021 | newr = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; |
800eeca4 | 11022 | default: |
0ca3e455 | 11023 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11024 | } |
11025 | break; | |
3969b680 | 11026 | |
13ae64f3 JJ |
11027 | case FUNC_TP_RELATIVE: |
11028 | switch (r_type) | |
11029 | { | |
d3ce72d0 NC |
11030 | case BFD_RELOC_IA64_IMM14: newr = BFD_RELOC_IA64_TPREL14; break; |
11031 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_TPREL22; break; | |
11032 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_TPREL64I; break; | |
11033 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_TPREL64MSB; break; | |
11034 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_TPREL64LSB; break; | |
0ca3e455 | 11035 | default: type = "TPREL"; break; |
13ae64f3 JJ |
11036 | } |
11037 | break; | |
11038 | ||
11039 | case FUNC_LT_TP_RELATIVE: | |
11040 | switch (r_type) | |
11041 | { | |
11042 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11043 | newr = BFD_RELOC_IA64_LTOFF_TPREL22; break; |
13ae64f3 | 11044 | default: |
0ca3e455 JB |
11045 | type = "LTOFF_TPREL"; break; |
11046 | } | |
11047 | break; | |
11048 | ||
11049 | case FUNC_DTP_MODULE: | |
11050 | switch (r_type) | |
11051 | { | |
11052 | case BFD_RELOC_IA64_DIR64MSB: | |
d3ce72d0 | 11053 | newr = BFD_RELOC_IA64_DTPMOD64MSB; break; |
0ca3e455 | 11054 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11055 | newr = BFD_RELOC_IA64_DTPMOD64LSB; break; |
0ca3e455 JB |
11056 | default: |
11057 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11058 | } |
11059 | break; | |
11060 | ||
11061 | case FUNC_LT_DTP_MODULE: | |
11062 | switch (r_type) | |
11063 | { | |
11064 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11065 | newr = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; |
13ae64f3 | 11066 | default: |
0ca3e455 | 11067 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11068 | } |
11069 | break; | |
11070 | ||
11071 | case FUNC_DTP_RELATIVE: | |
11072 | switch (r_type) | |
11073 | { | |
0ca3e455 | 11074 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11075 | newr = BFD_RELOC_IA64_DTPREL32MSB; break; |
0ca3e455 | 11076 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11077 | newr = BFD_RELOC_IA64_DTPREL32LSB; break; |
6174d9c8 | 11078 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11079 | newr = BFD_RELOC_IA64_DTPREL64MSB; break; |
6174d9c8 | 11080 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11081 | newr = BFD_RELOC_IA64_DTPREL64LSB; break; |
13ae64f3 | 11082 | case BFD_RELOC_IA64_IMM14: |
d3ce72d0 | 11083 | newr = BFD_RELOC_IA64_DTPREL14; break; |
13ae64f3 | 11084 | case BFD_RELOC_IA64_IMM22: |
d3ce72d0 | 11085 | newr = BFD_RELOC_IA64_DTPREL22; break; |
13ae64f3 | 11086 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11087 | newr = BFD_RELOC_IA64_DTPREL64I; break; |
13ae64f3 | 11088 | default: |
0ca3e455 | 11089 | type = "DTPREL"; break; |
13ae64f3 JJ |
11090 | } |
11091 | break; | |
11092 | ||
11093 | case FUNC_LT_DTP_RELATIVE: | |
11094 | switch (r_type) | |
11095 | { | |
11096 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11097 | newr = BFD_RELOC_IA64_LTOFF_DTPREL22; break; |
13ae64f3 | 11098 | default: |
0ca3e455 | 11099 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11100 | } |
11101 | break; | |
11102 | ||
40449e9f | 11103 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11104 | switch (r_type) |
11105 | { | |
11106 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11107 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11108 | default: type = "IPLT"; break; | |
11109 | } | |
40449e9f | 11110 | break; |
1cd8ff38 | 11111 | |
800eeca4 JW |
11112 | default: |
11113 | abort (); | |
11114 | } | |
6174d9c8 | 11115 | |
d3ce72d0 NC |
11116 | if (newr) |
11117 | return newr; | |
800eeca4 | 11118 | else |
0ca3e455 JB |
11119 | { |
11120 | int width; | |
11121 | ||
11122 | if (!type) | |
11123 | abort (); | |
11124 | switch (r_type) | |
11125 | { | |
11126 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11127 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11128 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11129 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11130 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11131 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11132 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11133 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11134 | default: abort (); | |
11135 | } | |
11136 | ||
11137 | /* This should be an error, but since previously there wasn't any | |
ad4b42b4 NC |
11138 | diagnostic here, don't make it fail because of this for now. */ |
11139 | as_warn (_("Cannot express %s%d%s relocation"), type, width, suffix); | |
0ca3e455 JB |
11140 | return r_type; |
11141 | } | |
800eeca4 JW |
11142 | } |
11143 | ||
11144 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11145 | functions. */ | |
11146 | void | |
5a49b8ac | 11147 | ia64_validate_fix (fixS *fix) |
800eeca4 JW |
11148 | { |
11149 | switch (fix->fx_r_type) | |
11150 | { | |
11151 | case BFD_RELOC_IA64_FPTR64I: | |
11152 | case BFD_RELOC_IA64_FPTR32MSB: | |
11153 | case BFD_RELOC_IA64_FPTR64LSB: | |
11154 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11155 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11156 | if (fix->fx_offset != 0) | |
11157 | as_bad_where (fix->fx_file, fix->fx_line, | |
ad4b42b4 | 11158 | _("No addend allowed in @fptr() relocation")); |
800eeca4 JW |
11159 | break; |
11160 | default: | |
11161 | break; | |
11162 | } | |
800eeca4 JW |
11163 | } |
11164 | ||
11165 | static void | |
5a49b8ac | 11166 | fix_insn (fixS *fix, const struct ia64_operand *odesc, valueT value) |
800eeca4 JW |
11167 | { |
11168 | bfd_vma insn[3], t0, t1, control_bits; | |
11169 | const char *err; | |
11170 | char *fixpos; | |
11171 | long slot; | |
11172 | ||
11173 | slot = fix->fx_where & 0x3; | |
11174 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11175 | ||
c67e42c9 | 11176 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11177 | t0 = bfd_getl64 (fixpos); |
11178 | t1 = bfd_getl64 (fixpos + 8); | |
11179 | control_bits = t0 & 0x1f; | |
11180 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11181 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11182 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11183 | ||
c67e42c9 RH |
11184 | err = NULL; |
11185 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11186 | { |
c67e42c9 RH |
11187 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11188 | insn[2] |= (((value & 0x7f) << 13) | |
11189 | | (((value >> 7) & 0x1ff) << 27) | |
11190 | | (((value >> 16) & 0x1f) << 22) | |
11191 | | (((value >> 21) & 0x1) << 21) | |
11192 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11193 | } |
c67e42c9 RH |
11194 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11195 | { | |
11196 | if (value & ~0x3fffffffffffffffULL) | |
20203fb9 | 11197 | err = _("integer operand out of range"); |
c67e42c9 RH |
11198 | insn[1] = (value >> 21) & 0x1ffffffffffLL; |
11199 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11200 | } | |
11201 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11202 | { | |
11203 | value >>= 4; | |
11204 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11205 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11206 | | (((value >> 0) & 0xfffff) << 13)); | |
11207 | } | |
11208 | else | |
11209 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11210 | ||
11211 | if (err) | |
83cf10fd | 11212 | as_bad_where (fix->fx_file, fix->fx_line, "%s", err); |
800eeca4 JW |
11213 | |
11214 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11215 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11216 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11217 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11218 | } |
11219 | ||
11220 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11221 | ignored; perhaps it was once meaningful, but now it is historical. | |
11222 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11223 | ||
11224 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11225 | (if possible). */ |
94f592af NC |
11226 | |
11227 | void | |
5a49b8ac | 11228 | md_apply_fix (fixS *fix, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
800eeca4 JW |
11229 | { |
11230 | char *fixpos; | |
40449e9f | 11231 | valueT value = *valP; |
800eeca4 JW |
11232 | |
11233 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11234 | ||
11235 | if (fix->fx_pcrel) | |
11236 | { | |
7b347e43 JB |
11237 | switch (fix->fx_r_type) |
11238 | { | |
11239 | case BFD_RELOC_IA64_PCREL21B: break; | |
11240 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11241 | case BFD_RELOC_IA64_PCREL21F: break; | |
11242 | case BFD_RELOC_IA64_PCREL21M: break; | |
11243 | case BFD_RELOC_IA64_PCREL60B: break; | |
11244 | case BFD_RELOC_IA64_PCREL22: break; | |
11245 | case BFD_RELOC_IA64_PCREL64I: break; | |
11246 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11247 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11248 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11249 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11250 | default: | |
11251 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11252 | fix->fx_r_type); | |
11253 | break; | |
11254 | } | |
800eeca4 JW |
11255 | } |
11256 | if (fix->fx_addsy) | |
11257 | { | |
00f7efb6 | 11258 | switch (fix->fx_r_type) |
800eeca4 | 11259 | { |
00f7efb6 | 11260 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11261 | /* This must be a TAG13 or TAG13b operand. There are no external |
11262 | relocs defined for them, so we must give an error. */ | |
800eeca4 | 11263 | as_bad_where (fix->fx_file, fix->fx_line, |
ad4b42b4 | 11264 | _("%s must have a constant value"), |
800eeca4 | 11265 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); |
fa1cb89c | 11266 | fix->fx_done = 1; |
94f592af | 11267 | return; |
00f7efb6 JJ |
11268 | |
11269 | case BFD_RELOC_IA64_TPREL14: | |
11270 | case BFD_RELOC_IA64_TPREL22: | |
11271 | case BFD_RELOC_IA64_TPREL64I: | |
11272 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11273 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11274 | case BFD_RELOC_IA64_DTPREL14: | |
11275 | case BFD_RELOC_IA64_DTPREL22: | |
11276 | case BFD_RELOC_IA64_DTPREL64I: | |
11277 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11278 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11279 | break; | |
7925dd68 JJ |
11280 | |
11281 | default: | |
11282 | break; | |
800eeca4 | 11283 | } |
800eeca4 JW |
11284 | } |
11285 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11286 | { | |
11287 | if (fix->tc_fix_data.bigendian) | |
11288 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11289 | else | |
11290 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11291 | fix->fx_done = 1; | |
800eeca4 JW |
11292 | } |
11293 | else | |
11294 | { | |
11295 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11296 | fix->fx_done = 1; | |
800eeca4 | 11297 | } |
800eeca4 JW |
11298 | } |
11299 | ||
11300 | /* Generate the BFD reloc to be stuck in the object file from the | |
11301 | fixup used internally in the assembler. */ | |
542d6675 KH |
11302 | |
11303 | arelent * | |
5a49b8ac | 11304 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp) |
800eeca4 JW |
11305 | { |
11306 | arelent *reloc; | |
11307 | ||
11308 | reloc = xmalloc (sizeof (*reloc)); | |
11309 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11310 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11311 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11312 | reloc->addend = fixp->fx_offset; | |
11313 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11314 | ||
11315 | if (!reloc->howto) | |
11316 | { | |
11317 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ad4b42b4 | 11318 | _("Cannot represent %s relocation in object file"), |
800eeca4 | 11319 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
cf738528 AS |
11320 | free (reloc); |
11321 | return NULL; | |
800eeca4 JW |
11322 | } |
11323 | return reloc; | |
11324 | } | |
11325 | ||
11326 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11327 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11328 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11329 | returned, or NULL on OK. */ |
11330 | ||
11331 | #define MAX_LITTLENUMS 5 | |
11332 | ||
542d6675 | 11333 | char * |
499ac353 | 11334 | md_atof (int type, char *lit, int *size) |
800eeca4 JW |
11335 | { |
11336 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11337 | char *t; |
11338 | int prec; | |
11339 | ||
11340 | switch (type) | |
11341 | { | |
11342 | /* IEEE floats */ | |
11343 | case 'f': | |
11344 | case 'F': | |
11345 | case 's': | |
11346 | case 'S': | |
11347 | prec = 2; | |
11348 | break; | |
11349 | ||
11350 | case 'd': | |
11351 | case 'D': | |
11352 | case 'r': | |
11353 | case 'R': | |
11354 | prec = 4; | |
11355 | break; | |
11356 | ||
11357 | case 'x': | |
11358 | case 'X': | |
11359 | case 'p': | |
11360 | case 'P': | |
11361 | prec = 5; | |
11362 | break; | |
11363 | ||
11364 | default: | |
11365 | *size = 0; | |
499ac353 | 11366 | return _("Unrecognized or unsupported floating point constant"); |
800eeca4 JW |
11367 | } |
11368 | t = atof_ieee (input_line_pointer, type, words); | |
11369 | if (t) | |
11370 | input_line_pointer = t; | |
800eeca4 | 11371 | |
10a98291 L |
11372 | (*ia64_float_to_chars) (lit, words, prec); |
11373 | ||
165a7f90 L |
11374 | if (type == 'X') |
11375 | { | |
11376 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11377 | memset (&lit [10], 0, 6); |
165a7f90 L |
11378 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11379 | } | |
10a98291 L |
11380 | else |
11381 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11382 | ||
499ac353 | 11383 | return NULL; |
800eeca4 JW |
11384 | } |
11385 | ||
800eeca4 JW |
11386 | /* Handle ia64 specific semantics of the align directive. */ |
11387 | ||
0a9ef439 | 11388 | void |
5a49b8ac AM |
11389 | ia64_md_do_align (int n ATTRIBUTE_UNUSED, |
11390 | const char *fill ATTRIBUTE_UNUSED, | |
11391 | int len ATTRIBUTE_UNUSED, | |
11392 | int max ATTRIBUTE_UNUSED) | |
800eeca4 | 11393 | { |
0a9ef439 | 11394 | if (subseg_text_p (now_seg)) |
800eeca4 | 11395 | ia64_flush_insns (); |
0a9ef439 | 11396 | } |
800eeca4 | 11397 | |
0a9ef439 RH |
11398 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11399 | of an rs_align_code fragment. */ | |
800eeca4 | 11400 | |
0a9ef439 | 11401 | void |
5a49b8ac | 11402 | ia64_handle_align (fragS *fragp) |
0a9ef439 | 11403 | { |
0a9ef439 RH |
11404 | int bytes; |
11405 | char *p; | |
9545c4ce | 11406 | const unsigned char *nop; |
0a9ef439 RH |
11407 | |
11408 | if (fragp->fr_type != rs_align_code) | |
11409 | return; | |
11410 | ||
9545c4ce L |
11411 | /* Check if this frag has to end with a stop bit. */ |
11412 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11413 | ||
0a9ef439 RH |
11414 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11415 | p = fragp->fr_literal + fragp->fr_fix; | |
11416 | ||
d9201763 L |
11417 | /* If no paddings are needed, we check if we need a stop bit. */ |
11418 | if (!bytes && fragp->tc_frag_data) | |
11419 | { | |
11420 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11421 | #if 1 |
11422 | /* FIXME: It won't work with | |
11423 | .align 16 | |
11424 | alloc r32=ar.pfs,1,2,4,0 | |
11425 | */ | |
11426 | ; | |
11427 | #else | |
d9201763 L |
11428 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11429 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11430 | #endif |
d9201763 L |
11431 | else |
11432 | /* Bundles are always in little-endian byte order. Make sure | |
11433 | the previous bundle has the stop bit. */ | |
11434 | *(p - 16) |= 1; | |
11435 | } | |
11436 | ||
0a9ef439 RH |
11437 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11438 | putting data into a text section. */ | |
11439 | if (bytes & 15) | |
11440 | { | |
11441 | int fix = bytes & 15; | |
11442 | memset (p, 0, fix); | |
11443 | p += fix; | |
11444 | bytes -= fix; | |
11445 | fragp->fr_fix += fix; | |
800eeca4 JW |
11446 | } |
11447 | ||
012a452b | 11448 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11449 | memcpy (p, nop, 16); |
0a9ef439 | 11450 | fragp->fr_var = 16; |
800eeca4 | 11451 | } |
10a98291 L |
11452 | |
11453 | static void | |
11454 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11455 | int prec) | |
11456 | { | |
11457 | while (prec--) | |
11458 | { | |
11459 | number_to_chars_bigendian (lit, (long) (*words++), | |
11460 | sizeof (LITTLENUM_TYPE)); | |
11461 | lit += sizeof (LITTLENUM_TYPE); | |
11462 | } | |
11463 | } | |
11464 | ||
11465 | static void | |
11466 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11467 | int prec) | |
11468 | { | |
11469 | while (prec--) | |
11470 | { | |
11471 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11472 | sizeof (LITTLENUM_TYPE)); | |
11473 | lit += sizeof (LITTLENUM_TYPE); | |
11474 | } | |
11475 | } | |
11476 | ||
11477 | void | |
5a49b8ac | 11478 | ia64_elf_section_change_hook (void) |
10a98291 | 11479 | { |
38ce5b11 L |
11480 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11481 | && elf_linked_to_section (now_seg) == NULL) | |
11482 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11483 | dot_byteorder (-1); |
11484 | } | |
a645d1eb L |
11485 | |
11486 | /* Check if a label should be made global. */ | |
11487 | void | |
11488 | ia64_check_label (symbolS *label) | |
11489 | { | |
11490 | if (*input_line_pointer == ':') | |
11491 | { | |
11492 | S_SET_EXTERNAL (label); | |
11493 | input_line_pointer++; | |
11494 | } | |
11495 | } | |
35f5df7f L |
11496 | |
11497 | /* Used to remember where .alias and .secalias directives are seen. We | |
11498 | will rename symbol and section names when we are about to output | |
11499 | the relocatable file. */ | |
11500 | struct alias | |
11501 | { | |
11502 | char *file; /* The file where the directive is seen. */ | |
11503 | unsigned int line; /* The line number the directive is at. */ | |
708587a4 | 11504 | const char *name; /* The original name of the symbol. */ |
35f5df7f L |
11505 | }; |
11506 | ||
11507 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11508 | .secalias. Otherwise, it is .alias. */ | |
11509 | static void | |
11510 | dot_alias (int section) | |
11511 | { | |
11512 | char *name, *alias; | |
11513 | char delim; | |
11514 | char *end_name; | |
11515 | int len; | |
11516 | const char *error_string; | |
11517 | struct alias *h; | |
11518 | const char *a; | |
11519 | struct hash_control *ahash, *nhash; | |
11520 | const char *kind; | |
11521 | ||
11522 | name = input_line_pointer; | |
11523 | delim = get_symbol_end (); | |
11524 | end_name = input_line_pointer; | |
11525 | *end_name = delim; | |
11526 | ||
11527 | if (name == end_name) | |
11528 | { | |
11529 | as_bad (_("expected symbol name")); | |
e4e8248d | 11530 | ignore_rest_of_line (); |
35f5df7f L |
11531 | return; |
11532 | } | |
11533 | ||
11534 | SKIP_WHITESPACE (); | |
11535 | ||
11536 | if (*input_line_pointer != ',') | |
11537 | { | |
11538 | *end_name = 0; | |
11539 | as_bad (_("expected comma after \"%s\""), name); | |
11540 | *end_name = delim; | |
11541 | ignore_rest_of_line (); | |
11542 | return; | |
11543 | } | |
11544 | ||
11545 | input_line_pointer++; | |
11546 | *end_name = 0; | |
20b36a95 | 11547 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11548 | |
11549 | /* We call demand_copy_C_string to check if alias string is valid. | |
11550 | There should be a closing `"' and no `\0' in the string. */ | |
11551 | alias = demand_copy_C_string (&len); | |
11552 | if (alias == NULL) | |
11553 | { | |
11554 | ignore_rest_of_line (); | |
11555 | return; | |
11556 | } | |
11557 | ||
11558 | /* Make a copy of name string. */ | |
11559 | len = strlen (name) + 1; | |
11560 | obstack_grow (¬es, name, len); | |
11561 | name = obstack_finish (¬es); | |
11562 | ||
11563 | if (section) | |
11564 | { | |
11565 | kind = "section"; | |
11566 | ahash = secalias_hash; | |
11567 | nhash = secalias_name_hash; | |
11568 | } | |
11569 | else | |
11570 | { | |
11571 | kind = "symbol"; | |
11572 | ahash = alias_hash; | |
11573 | nhash = alias_name_hash; | |
11574 | } | |
11575 | ||
11576 | /* Check if alias has been used before. */ | |
11577 | h = (struct alias *) hash_find (ahash, alias); | |
11578 | if (h) | |
11579 | { | |
11580 | if (strcmp (h->name, name)) | |
11581 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11582 | alias, kind, h->name); | |
11583 | goto out; | |
11584 | } | |
11585 | ||
11586 | /* Check if name already has an alias. */ | |
11587 | a = (const char *) hash_find (nhash, name); | |
11588 | if (a) | |
11589 | { | |
11590 | if (strcmp (a, alias)) | |
11591 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11592 | goto out; | |
11593 | } | |
11594 | ||
11595 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11596 | as_where (&h->file, &h->line); | |
11597 | h->name = name; | |
11598 | ||
5a49b8ac | 11599 | error_string = hash_jam (ahash, alias, (void *) h); |
35f5df7f L |
11600 | if (error_string) |
11601 | { | |
11602 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11603 | alias, kind, error_string); | |
11604 | goto out; | |
11605 | } | |
11606 | ||
5a49b8ac | 11607 | error_string = hash_jam (nhash, name, (void *) alias); |
35f5df7f L |
11608 | if (error_string) |
11609 | { | |
11610 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11611 | alias, kind, error_string); | |
11612 | out: | |
11613 | obstack_free (¬es, name); | |
11614 | obstack_free (¬es, alias); | |
11615 | } | |
11616 | ||
11617 | demand_empty_rest_of_line (); | |
11618 | } | |
11619 | ||
11620 | /* It renames the original symbol name to its alias. */ | |
11621 | static void | |
5a49b8ac | 11622 | do_alias (const char *alias, void *value) |
35f5df7f L |
11623 | { |
11624 | struct alias *h = (struct alias *) value; | |
11625 | symbolS *sym = symbol_find (h->name); | |
11626 | ||
11627 | if (sym == NULL) | |
01e1a5bc NC |
11628 | { |
11629 | #ifdef TE_VMS | |
11630 | /* Uses .alias extensively to alias CRTL functions to same with | |
11631 | decc$ prefix. Sometimes function gets optimized away and a | |
11632 | warning results, which should be suppressed. */ | |
11633 | if (strncmp (alias, "decc$", 5) != 0) | |
11634 | #endif | |
11635 | as_warn_where (h->file, h->line, | |
11636 | _("symbol `%s' aliased to `%s' is not used"), | |
11637 | h->name, alias); | |
11638 | } | |
35f5df7f L |
11639 | else |
11640 | S_SET_NAME (sym, (char *) alias); | |
11641 | } | |
11642 | ||
11643 | /* Called from write_object_file. */ | |
11644 | void | |
11645 | ia64_adjust_symtab (void) | |
11646 | { | |
11647 | hash_traverse (alias_hash, do_alias); | |
11648 | } | |
11649 | ||
11650 | /* It renames the original section name to its alias. */ | |
11651 | static void | |
5a49b8ac | 11652 | do_secalias (const char *alias, void *value) |
35f5df7f L |
11653 | { |
11654 | struct alias *h = (struct alias *) value; | |
11655 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11656 | ||
11657 | if (sec == NULL) | |
11658 | as_warn_where (h->file, h->line, | |
11659 | _("section `%s' aliased to `%s' is not used"), | |
11660 | h->name, alias); | |
11661 | else | |
11662 | sec->name = alias; | |
11663 | } | |
11664 | ||
11665 | /* Called from write_object_file. */ | |
11666 | void | |
11667 | ia64_frob_file (void) | |
11668 | { | |
11669 | hash_traverse (secalias_hash, do_secalias); | |
11670 | } | |
01e1a5bc NC |
11671 | |
11672 | #ifdef TE_VMS | |
11673 | #define NT_VMS_MHD 1 | |
11674 | #define NT_VMS_LNM 2 | |
11675 | ||
11676 | /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF | |
11677 | .note section. */ | |
11678 | ||
11679 | /* Manufacture a VMS-like time string. */ | |
11680 | static void | |
11681 | get_vms_time (char *Now) | |
11682 | { | |
11683 | char *pnt; | |
11684 | time_t timeb; | |
11685 | ||
11686 | time (&timeb); | |
11687 | pnt = ctime (&timeb); | |
11688 | pnt[3] = 0; | |
11689 | pnt[7] = 0; | |
11690 | pnt[10] = 0; | |
11691 | pnt[16] = 0; | |
11692 | pnt[24] = 0; | |
11693 | sprintf (Now, "%2s-%3s-%s %s", pnt + 8, pnt + 4, pnt + 20, pnt + 11); | |
11694 | } | |
11695 | ||
11696 | void | |
11697 | ia64_vms_note (void) | |
11698 | { | |
11699 | char *p; | |
11700 | asection *seg = now_seg; | |
11701 | subsegT subseg = now_subseg; | |
11702 | Elf_Internal_Note i_note; | |
11703 | asection *secp = NULL; | |
a0840211 | 11704 | char *bname; |
01e1a5bc NC |
11705 | char buf [256]; |
11706 | symbolS *sym; | |
11707 | ||
11708 | /* Create the .note section. */ | |
11709 | ||
11710 | secp = subseg_new (".note", 0); | |
11711 | bfd_set_section_flags (stdoutput, | |
11712 | secp, | |
11713 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11714 | ||
11715 | /* Module header note. */ | |
a0840211 | 11716 | bname = xstrdup (lbasename (out_file_name)); |
01e1a5bc NC |
11717 | if ((p = strrchr (bname, '.'))) |
11718 | *p = '\0'; | |
11719 | ||
11720 | i_note.namesz = 8; | |
11721 | i_note.descsz = 40 + strlen (bname); | |
11722 | i_note.type = NT_VMS_MHD; | |
11723 | ||
11724 | p = frag_more (sizeof (i_note.namesz)); | |
11725 | number_to_chars_littleendian (p, i_note.namesz, 8); | |
11726 | ||
11727 | p = frag_more (sizeof (i_note.descsz)); | |
11728 | number_to_chars_littleendian (p, i_note.descsz, 8); | |
11729 | ||
11730 | p = frag_more (sizeof (i_note.type)); | |
11731 | number_to_chars_littleendian (p, i_note.type, 8); | |
11732 | ||
11733 | p = frag_more (8); | |
11734 | strcpy (p, "IPF/VMS"); | |
11735 | ||
11736 | get_vms_time (buf); | |
11737 | p = frag_more (17); | |
11738 | strcpy (p, buf); | |
11739 | ||
11740 | p = frag_more (17); | |
11741 | strcpy (p, "24-FEB-2005 15:00"); | |
11742 | ||
11743 | p = frag_more (strlen (bname) + 1); | |
11744 | strcpy (p, bname); | |
a0840211 | 11745 | free (bname); |
01e1a5bc NC |
11746 | |
11747 | p = frag_more (5); | |
11748 | strcpy (p, "V1.0"); | |
11749 | ||
11750 | frag_align (3, 0, 0); | |
11751 | ||
11752 | /* Language processor name note. */ | |
11753 | sprintf (buf, "GNU assembler version %s (%s) using BFD version %s", | |
11754 | VERSION, TARGET_ALIAS, BFD_VERSION_STRING); | |
11755 | ||
11756 | i_note.namesz = 8; | |
11757 | i_note.descsz = 1 + strlen (buf); | |
11758 | i_note.type = NT_VMS_LNM; | |
11759 | ||
11760 | p = frag_more (sizeof (i_note.namesz)); | |
11761 | number_to_chars_littleendian (p, i_note.namesz, 8); | |
11762 | ||
11763 | p = frag_more (sizeof (i_note.descsz)); | |
11764 | number_to_chars_littleendian (p, i_note.descsz, 8); | |
11765 | ||
11766 | p = frag_more (sizeof (i_note.type)); | |
11767 | number_to_chars_littleendian (p, i_note.type, 8); | |
11768 | ||
11769 | p = frag_more (8); | |
11770 | strcpy (p, "IPF/VMS"); | |
11771 | ||
11772 | p = frag_more (strlen (buf) + 1); | |
11773 | strcpy (p, buf); | |
11774 | ||
11775 | frag_align (3, 0, 0); | |
11776 | ||
11777 | secp = subseg_new (".vms_display_name_info", 0); | |
11778 | bfd_set_section_flags (stdoutput, | |
11779 | secp, | |
11780 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11781 | ||
11782 | /* This symbol should be passed on the command line and be variable | |
11783 | according to language. */ | |
11784 | sym = symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl", | |
11785 | absolute_section, 0, &zero_address_frag); | |
11786 | symbol_table_insert (sym); | |
11787 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING | BSF_DYNAMIC; | |
11788 | ||
11789 | p = frag_more (4); | |
11790 | /* Format 3 of VMS demangler Spec. */ | |
11791 | number_to_chars_littleendian (p, 3, 4); | |
11792 | ||
11793 | p = frag_more (4); | |
11794 | /* Place holder for symbol table index of above symbol. */ | |
11795 | number_to_chars_littleendian (p, -1, 4); | |
11796 | ||
11797 | frag_align (3, 0, 0); | |
11798 | ||
11799 | /* We probably can't restore the current segment, for there likely | |
11800 | isn't one yet... */ | |
11801 | if (seg && subseg) | |
11802 | subseg_set (seg, subseg); | |
11803 | } | |
11804 | ||
11805 | #endif /* TE_VMS */ |