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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
d6afba4b JJ |
2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
3 | Free Software Foundation, Inc. | |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
54 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) | |
55 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) | |
56 | ||
57 | #define NUM_SLOTS 4 | |
58 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
59 | #define CURR_SLOT md.slot[md.curr_slot] | |
60 | ||
61 | #define O_pseudo_fixup (O_max + 1) | |
62 | ||
63 | enum special_section | |
64 | { | |
557debba | 65 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
66 | SPECIAL_SECTION_BSS = 0, |
67 | SPECIAL_SECTION_SBSS, | |
68 | SPECIAL_SECTION_SDATA, | |
69 | SPECIAL_SECTION_RODATA, | |
70 | SPECIAL_SECTION_COMMENT, | |
71 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
72 | SPECIAL_SECTION_UNWIND_INFO, |
73 | /* HPUX specific section pseudo-ops. */ | |
74 | SPECIAL_SECTION_INIT_ARRAY, | |
75 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
76 | }; |
77 | ||
78 | enum reloc_func | |
79 | { | |
13ae64f3 JJ |
80 | FUNC_DTP_MODULE, |
81 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
82 | FUNC_FPTR_RELATIVE, |
83 | FUNC_GP_RELATIVE, | |
84 | FUNC_LT_RELATIVE, | |
fa2c7eff | 85 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 86 | FUNC_PC_RELATIVE, |
800eeca4 JW |
87 | FUNC_PLT_RELATIVE, |
88 | FUNC_SEC_RELATIVE, | |
89 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 90 | FUNC_TP_RELATIVE, |
800eeca4 JW |
91 | FUNC_LTV_RELATIVE, |
92 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
93 | FUNC_LT_DTP_MODULE, |
94 | FUNC_LT_DTP_RELATIVE, | |
95 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 96 | FUNC_IPLT_RELOC, |
800eeca4 JW |
97 | }; |
98 | ||
99 | enum reg_symbol | |
100 | { | |
101 | REG_GR = 0, | |
102 | REG_FR = (REG_GR + 128), | |
103 | REG_AR = (REG_FR + 128), | |
104 | REG_CR = (REG_AR + 128), | |
105 | REG_P = (REG_CR + 128), | |
106 | REG_BR = (REG_P + 64), | |
107 | REG_IP = (REG_BR + 8), | |
108 | REG_CFM, | |
109 | REG_PR, | |
110 | REG_PR_ROT, | |
111 | REG_PSR, | |
112 | REG_PSR_L, | |
113 | REG_PSR_UM, | |
114 | /* The following are pseudo-registers for use by gas only. */ | |
115 | IND_CPUID, | |
116 | IND_DBR, | |
117 | IND_DTR, | |
118 | IND_ITR, | |
119 | IND_IBR, | |
120 | IND_MEM, | |
121 | IND_MSR, | |
122 | IND_PKR, | |
123 | IND_PMC, | |
124 | IND_PMD, | |
125 | IND_RR, | |
542d6675 | 126 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
127 | REG_PSP, |
128 | REG_PRIUNAT, | |
800eeca4 JW |
129 | REG_NUM |
130 | }; | |
131 | ||
132 | enum dynreg_type | |
133 | { | |
134 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
135 | DYNREG_FR, /* dynamic floating point register */ | |
136 | DYNREG_PR, /* dynamic predicate register */ | |
137 | DYNREG_NUM_TYPES | |
138 | }; | |
139 | ||
87f8eb97 JW |
140 | enum operand_match_result |
141 | { | |
142 | OPERAND_MATCH, | |
143 | OPERAND_OUT_OF_RANGE, | |
144 | OPERAND_MISMATCH | |
145 | }; | |
146 | ||
800eeca4 JW |
147 | /* On the ia64, we can't know the address of a text label until the |
148 | instructions are packed into a bundle. To handle this, we keep | |
149 | track of the list of labels that appear in front of each | |
150 | instruction. */ | |
151 | struct label_fix | |
542d6675 KH |
152 | { |
153 | struct label_fix *next; | |
154 | struct symbol *sym; | |
155 | }; | |
800eeca4 | 156 | |
549f748d | 157 | /* This is the endianness of the current section. */ |
800eeca4 JW |
158 | extern int target_big_endian; |
159 | ||
549f748d JW |
160 | /* This is the default endianness. */ |
161 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
162 | ||
10a98291 L |
163 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
164 | ||
165 | static void ia64_float_to_chars_bigendian | |
166 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
167 | static void ia64_float_to_chars_littleendian | |
168 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
169 | static void (*ia64_float_to_chars) | |
170 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
171 | ||
35f5df7f L |
172 | static struct hash_control *alias_hash; |
173 | static struct hash_control *alias_name_hash; | |
174 | static struct hash_control *secalias_hash; | |
175 | static struct hash_control *secalias_name_hash; | |
176 | ||
800eeca4 JW |
177 | /* Characters which always start a comment. */ |
178 | const char comment_chars[] = ""; | |
179 | ||
180 | /* Characters which start a comment at the beginning of a line. */ | |
181 | const char line_comment_chars[] = "#"; | |
182 | ||
183 | /* Characters which may be used to separate multiple commands on a | |
184 | single line. */ | |
185 | const char line_separator_chars[] = ";"; | |
186 | ||
187 | /* Characters which are used to indicate an exponent in a floating | |
188 | point number. */ | |
189 | const char EXP_CHARS[] = "eE"; | |
190 | ||
191 | /* Characters which mean that a number is a floating point constant, | |
192 | as in 0d1.0. */ | |
193 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
194 | ||
542d6675 | 195 | /* ia64-specific option processing: */ |
800eeca4 | 196 | |
44f5c83a | 197 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
198 | |
199 | struct option md_longopts[] = | |
200 | { | |
c43c2cc5 JW |
201 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
202 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
203 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
204 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
205 | }; |
206 | ||
207 | size_t md_longopts_size = sizeof (md_longopts); | |
208 | ||
209 | static struct | |
210 | { | |
211 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
212 | struct hash_control *reg_hash; /* register name hash table */ | |
213 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
214 | struct hash_control *const_hash; /* constant hash table */ | |
215 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
216 | ||
217 | symbolS *regsym[REG_NUM]; | |
218 | ||
219 | /* If X_op is != O_absent, the registername for the instruction's | |
220 | qualifying predicate. If NULL, p0 is assumed for instructions | |
221 | that are predicatable. */ | |
222 | expressionS qp; | |
223 | ||
224 | unsigned int | |
197865e8 | 225 | manual_bundling : 1, |
800eeca4 JW |
226 | debug_dv: 1, |
227 | detect_dv: 1, | |
228 | explicit_mode : 1, /* which mode we're in */ | |
229 | default_explicit_mode : 1, /* which mode is the default */ | |
230 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
231 | auto_align : 1, |
232 | keep_pending_output : 1; | |
800eeca4 JW |
233 | |
234 | /* Each bundle consists of up to three instructions. We keep | |
235 | track of four most recent instructions so we can correctly set | |
197865e8 | 236 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
237 | int curr_slot; |
238 | int num_slots_in_use; | |
239 | struct slot | |
240 | { | |
241 | unsigned int | |
242 | end_of_insn_group : 1, | |
243 | manual_bundling_on : 1, | |
244 | manual_bundling_off : 1; | |
245 | signed char user_template; /* user-selected template, if any */ | |
246 | unsigned char qp_regno; /* qualifying predicate */ | |
247 | /* This duplicates a good fraction of "struct fix" but we | |
248 | can't use a "struct fix" instead since we can't call | |
249 | fix_new_exp() until we know the address of the instruction. */ | |
250 | int num_fixups; | |
251 | struct insn_fix | |
252 | { | |
253 | bfd_reloc_code_real_type code; | |
254 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
255 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
256 | expressionS expr; /* the value to be inserted */ | |
257 | } | |
258 | fixup[2]; /* at most two fixups per insn */ | |
259 | struct ia64_opcode *idesc; | |
260 | struct label_fix *label_fixups; | |
f1bcba5b | 261 | struct label_fix *tag_fixups; |
800eeca4 JW |
262 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
263 | expressionS opnd[6]; | |
264 | char *src_file; | |
265 | unsigned int src_line; | |
266 | struct dwarf2_line_info debug_line; | |
267 | } | |
268 | slot[NUM_SLOTS]; | |
269 | ||
270 | segT last_text_seg; | |
271 | ||
272 | struct dynreg | |
273 | { | |
274 | struct dynreg *next; /* next dynamic register */ | |
275 | const char *name; | |
276 | unsigned short base; /* the base register number */ | |
277 | unsigned short num_regs; /* # of registers in this set */ | |
278 | } | |
279 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
280 | ||
281 | flagword flags; /* ELF-header flags */ | |
282 | ||
283 | struct mem_offset { | |
284 | unsigned hint:1; /* is this hint currently valid? */ | |
285 | bfd_vma offset; /* mem.offset offset */ | |
286 | bfd_vma base; /* mem.offset base */ | |
287 | } mem_offset; | |
288 | ||
289 | int path; /* number of alt. entry points seen */ | |
290 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 291 | the current DV-checking block. */ |
800eeca4 | 292 | int maxpaths; /* size currently allocated for |
542d6675 | 293 | entry_labels */ |
88be23ec BS |
294 | /* Support for hardware errata workarounds. */ |
295 | ||
296 | /* Record data about the last three insn groups. */ | |
297 | struct group | |
298 | { | |
299 | /* B-step workaround. | |
300 | For each predicate register, this is set if the corresponding insn | |
301 | group conditionally sets this register with one of the affected | |
302 | instructions. */ | |
303 | int p_reg_set[64]; | |
304 | /* B-step workaround. | |
305 | For each general register, this is set if the corresponding insn | |
306 | a) is conditional one one of the predicate registers for which | |
307 | P_REG_SET is 1 in the corresponding entry of the previous group, | |
308 | b) sets this general register with one of the affected | |
309 | instructions. */ | |
310 | int g_reg_set_conditionally[128]; | |
311 | } last_groups[3]; | |
312 | int group_idx; | |
557debba JW |
313 | |
314 | int pointer_size; /* size in bytes of a pointer */ | |
315 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
316 | } |
317 | md; | |
318 | ||
542d6675 | 319 | /* application registers: */ |
800eeca4 | 320 | |
e0c9811a JW |
321 | #define AR_K0 0 |
322 | #define AR_K7 7 | |
323 | #define AR_RSC 16 | |
324 | #define AR_BSP 17 | |
325 | #define AR_BSPSTORE 18 | |
326 | #define AR_RNAT 19 | |
327 | #define AR_UNAT 36 | |
328 | #define AR_FPSR 40 | |
329 | #define AR_ITC 44 | |
330 | #define AR_PFS 64 | |
331 | #define AR_LC 65 | |
800eeca4 JW |
332 | |
333 | static const struct | |
334 | { | |
335 | const char *name; | |
336 | int regnum; | |
337 | } | |
338 | ar[] = | |
339 | { | |
340 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
341 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
342 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
343 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
344 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
345 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
346 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
347 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
348 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
349 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
350 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 351 | {"ar.ec", 66}, |
800eeca4 JW |
352 | }; |
353 | ||
354 | #define CR_IPSR 16 | |
355 | #define CR_ISR 17 | |
356 | #define CR_IIP 19 | |
357 | #define CR_IFA 20 | |
358 | #define CR_ITIR 21 | |
359 | #define CR_IIPA 22 | |
360 | #define CR_IFS 23 | |
361 | #define CR_IIM 24 | |
362 | #define CR_IHA 25 | |
363 | #define CR_IVR 65 | |
364 | #define CR_TPR 66 | |
365 | #define CR_EOI 67 | |
366 | #define CR_IRR0 68 | |
367 | #define CR_IRR3 71 | |
368 | #define CR_LRR0 80 | |
369 | #define CR_LRR1 81 | |
370 | ||
542d6675 | 371 | /* control registers: */ |
800eeca4 JW |
372 | static const struct |
373 | { | |
374 | const char *name; | |
375 | int regnum; | |
376 | } | |
377 | cr[] = | |
378 | { | |
379 | {"cr.dcr", 0}, | |
380 | {"cr.itm", 1}, | |
381 | {"cr.iva", 2}, | |
382 | {"cr.pta", 8}, | |
383 | {"cr.gpta", 9}, | |
384 | {"cr.ipsr", 16}, | |
385 | {"cr.isr", 17}, | |
386 | {"cr.iip", 19}, | |
387 | {"cr.ifa", 20}, | |
388 | {"cr.itir", 21}, | |
389 | {"cr.iipa", 22}, | |
390 | {"cr.ifs", 23}, | |
391 | {"cr.iim", 24}, | |
392 | {"cr.iha", 25}, | |
393 | {"cr.lid", 64}, | |
394 | {"cr.ivr", 65}, | |
395 | {"cr.tpr", 66}, | |
396 | {"cr.eoi", 67}, | |
397 | {"cr.irr0", 68}, | |
398 | {"cr.irr1", 69}, | |
399 | {"cr.irr2", 70}, | |
400 | {"cr.irr3", 71}, | |
401 | {"cr.itv", 72}, | |
402 | {"cr.pmv", 73}, | |
403 | {"cr.cmcv", 74}, | |
404 | {"cr.lrr0", 80}, | |
405 | {"cr.lrr1", 81} | |
406 | }; | |
407 | ||
408 | #define PSR_MFL 4 | |
409 | #define PSR_IC 13 | |
410 | #define PSR_DFL 18 | |
411 | #define PSR_CPL 32 | |
412 | ||
413 | static const struct const_desc | |
414 | { | |
415 | const char *name; | |
416 | valueT value; | |
417 | } | |
418 | const_bits[] = | |
419 | { | |
542d6675 | 420 | /* PSR constant masks: */ |
800eeca4 JW |
421 | |
422 | /* 0: reserved */ | |
423 | {"psr.be", ((valueT) 1) << 1}, | |
424 | {"psr.up", ((valueT) 1) << 2}, | |
425 | {"psr.ac", ((valueT) 1) << 3}, | |
426 | {"psr.mfl", ((valueT) 1) << 4}, | |
427 | {"psr.mfh", ((valueT) 1) << 5}, | |
428 | /* 6-12: reserved */ | |
429 | {"psr.ic", ((valueT) 1) << 13}, | |
430 | {"psr.i", ((valueT) 1) << 14}, | |
431 | {"psr.pk", ((valueT) 1) << 15}, | |
432 | /* 16: reserved */ | |
433 | {"psr.dt", ((valueT) 1) << 17}, | |
434 | {"psr.dfl", ((valueT) 1) << 18}, | |
435 | {"psr.dfh", ((valueT) 1) << 19}, | |
436 | {"psr.sp", ((valueT) 1) << 20}, | |
437 | {"psr.pp", ((valueT) 1) << 21}, | |
438 | {"psr.di", ((valueT) 1) << 22}, | |
439 | {"psr.si", ((valueT) 1) << 23}, | |
440 | {"psr.db", ((valueT) 1) << 24}, | |
441 | {"psr.lp", ((valueT) 1) << 25}, | |
442 | {"psr.tb", ((valueT) 1) << 26}, | |
443 | {"psr.rt", ((valueT) 1) << 27}, | |
444 | /* 28-31: reserved */ | |
445 | /* 32-33: cpl (current privilege level) */ | |
446 | {"psr.is", ((valueT) 1) << 34}, | |
447 | {"psr.mc", ((valueT) 1) << 35}, | |
448 | {"psr.it", ((valueT) 1) << 36}, | |
449 | {"psr.id", ((valueT) 1) << 37}, | |
450 | {"psr.da", ((valueT) 1) << 38}, | |
451 | {"psr.dd", ((valueT) 1) << 39}, | |
452 | {"psr.ss", ((valueT) 1) << 40}, | |
453 | /* 41-42: ri (restart instruction) */ | |
454 | {"psr.ed", ((valueT) 1) << 43}, | |
455 | {"psr.bn", ((valueT) 1) << 44}, | |
456 | }; | |
457 | ||
542d6675 | 458 | /* indirect register-sets/memory: */ |
800eeca4 JW |
459 | |
460 | static const struct | |
461 | { | |
462 | const char *name; | |
463 | int regnum; | |
464 | } | |
465 | indirect_reg[] = | |
466 | { | |
467 | { "CPUID", IND_CPUID }, | |
468 | { "cpuid", IND_CPUID }, | |
469 | { "dbr", IND_DBR }, | |
470 | { "dtr", IND_DTR }, | |
471 | { "itr", IND_ITR }, | |
472 | { "ibr", IND_IBR }, | |
473 | { "msr", IND_MSR }, | |
474 | { "pkr", IND_PKR }, | |
475 | { "pmc", IND_PMC }, | |
476 | { "pmd", IND_PMD }, | |
477 | { "rr", IND_RR }, | |
478 | }; | |
479 | ||
480 | /* Pseudo functions used to indicate relocation types (these functions | |
481 | start with an at sign (@). */ | |
482 | static struct | |
483 | { | |
484 | const char *name; | |
485 | enum pseudo_type | |
486 | { | |
487 | PSEUDO_FUNC_NONE, | |
488 | PSEUDO_FUNC_RELOC, | |
489 | PSEUDO_FUNC_CONST, | |
e0c9811a | 490 | PSEUDO_FUNC_REG, |
800eeca4 JW |
491 | PSEUDO_FUNC_FLOAT |
492 | } | |
493 | type; | |
494 | union | |
495 | { | |
496 | unsigned long ival; | |
497 | symbolS *sym; | |
498 | } | |
499 | u; | |
500 | } | |
501 | pseudo_func[] = | |
502 | { | |
542d6675 | 503 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
504 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
505 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
506 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
507 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
508 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 509 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
510 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
511 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
512 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
513 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 514 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
515 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
516 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ | |
13ae64f3 JJ |
517 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ |
518 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
519 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 520 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 521 | |
542d6675 | 522 | /* mbtype4 constants: */ |
800eeca4 JW |
523 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
524 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
525 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
526 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
527 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
528 | ||
542d6675 | 529 | /* fclass constants: */ |
bf3ca999 | 530 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
531 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
532 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
533 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
534 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
535 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
536 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
537 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
538 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
539 | |
540 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 541 | |
c10d9d8f JW |
542 | /* hint constants: */ |
543 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
544 | ||
542d6675 | 545 | /* unwind-related constants: */ |
041340ad JW |
546 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
547 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
548 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
549 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
550 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
551 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
552 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 553 | |
542d6675 | 554 | /* unwind-related registers: */ |
e0c9811a | 555 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
556 | }; |
557 | ||
542d6675 | 558 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
559 | static const bfd_vma nop[IA64_NUM_UNITS] = |
560 | { | |
561 | 0x0000000000LL, /* NIL => break 0 */ | |
562 | 0x0008000000LL, /* I-unit nop */ | |
563 | 0x0008000000LL, /* M-unit nop */ | |
564 | 0x4000000000LL, /* B-unit nop */ | |
565 | 0x0008000000LL, /* F-unit nop */ | |
566 | 0x0008000000LL, /* L-"unit" nop */ | |
567 | 0x0008000000LL, /* X-unit nop */ | |
568 | }; | |
569 | ||
570 | /* Can't be `const' as it's passed to input routines (which have the | |
571 | habit of setting temporary sentinels. */ | |
572 | static char special_section_name[][20] = | |
573 | { | |
574 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
575 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
576 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
577 | }; |
578 | ||
579 | /* The best template for a particular sequence of up to three | |
580 | instructions: */ | |
581 | #define N IA64_NUM_TYPES | |
582 | static unsigned char best_template[N][N][N]; | |
583 | #undef N | |
584 | ||
585 | /* Resource dependencies currently in effect */ | |
586 | static struct rsrc { | |
587 | int depind; /* dependency index */ | |
588 | const struct ia64_dependency *dependency; /* actual dependency */ | |
589 | unsigned specific:1, /* is this a specific bit/regno? */ | |
590 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
591 | int index; /* specific regno/bit within dependency */ | |
592 | int note; /* optional qualifying note (0 if none) */ | |
593 | #define STATE_NONE 0 | |
594 | #define STATE_STOP 1 | |
595 | #define STATE_SRLZ 2 | |
596 | int insn_srlz; /* current insn serialization state */ | |
597 | int data_srlz; /* current data serialization state */ | |
598 | int qp_regno; /* qualifying predicate for this usage */ | |
599 | char *file; /* what file marked this dependency */ | |
2434f565 | 600 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 601 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 602 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
603 | int path; /* corresponding code entry index */ |
604 | } *regdeps = NULL; | |
605 | static int regdepslen = 0; | |
606 | static int regdepstotlen = 0; | |
607 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
608 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 609 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 610 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
611 | |
612 | /* Current state of PR mutexation */ | |
613 | static struct qpmutex { | |
614 | valueT prmask; | |
615 | int path; | |
616 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
617 | static int qp_mutexeslen = 0; | |
618 | static int qp_mutexestotlen = 0; | |
197865e8 | 619 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
620 | |
621 | /* Current state of PR implications */ | |
622 | static struct qp_imply { | |
623 | unsigned p1:6; | |
624 | unsigned p2:6; | |
625 | unsigned p2_branched:1; | |
626 | int path; | |
627 | } *qp_implies = NULL; | |
628 | static int qp_implieslen = 0; | |
629 | static int qp_impliestotlen = 0; | |
630 | ||
197865e8 KH |
631 | /* Keep track of static GR values so that indirect register usage can |
632 | sometimes be tracked. */ | |
800eeca4 JW |
633 | static struct gr { |
634 | unsigned known:1; | |
635 | int path; | |
636 | valueT value; | |
2434f565 | 637 | } gr_values[128] = {{ 1, 0, 0 }}; |
800eeca4 | 638 | |
9545c4ce L |
639 | /* Remember the alignment frag. */ |
640 | static fragS *align_frag; | |
641 | ||
800eeca4 JW |
642 | /* These are the routines required to output the various types of |
643 | unwind records. */ | |
644 | ||
f5a30c2e JW |
645 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
646 | frag address here so that if there is a section switch in the middle of | |
647 | a function, then instructions emitted to a different section are not | |
648 | counted. Since there may be more than one frag for a function, this | |
649 | means we also need to keep track of which frag this address belongs to | |
650 | so we can compute inter-frag distances. This also nicely solves the | |
651 | problem with nops emitted for align directives, which can't easily be | |
652 | counted, but can easily be derived from frag sizes. */ | |
653 | ||
800eeca4 JW |
654 | typedef struct unw_rec_list { |
655 | unwind_record r; | |
e0c9811a | 656 | unsigned long slot_number; |
f5a30c2e | 657 | fragS *slot_frag; |
73f20958 L |
658 | unsigned long next_slot_number; |
659 | fragS *next_slot_frag; | |
800eeca4 JW |
660 | struct unw_rec_list *next; |
661 | } unw_rec_list; | |
662 | ||
2434f565 | 663 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 664 | |
6290819d NC |
665 | /* Linked list of saved prologue counts. A very poor |
666 | implementation of a map from label numbers to prologue counts. */ | |
667 | typedef struct label_prologue_count | |
668 | { | |
669 | struct label_prologue_count *next; | |
670 | unsigned long label_number; | |
671 | unsigned int prologue_count; | |
672 | } label_prologue_count; | |
673 | ||
e0c9811a JW |
674 | static struct |
675 | { | |
e0c9811a JW |
676 | /* Maintain a list of unwind entries for the current function. */ |
677 | unw_rec_list *list; | |
678 | unw_rec_list *tail; | |
800eeca4 | 679 | |
e0c9811a JW |
680 | /* Any unwind entires that should be attached to the current slot |
681 | that an insn is being constructed for. */ | |
682 | unw_rec_list *current_entry; | |
800eeca4 | 683 | |
e0c9811a JW |
684 | /* These are used to create the unwind table entry for this function. */ |
685 | symbolS *proc_start; | |
686 | symbolS *proc_end; | |
687 | symbolS *info; /* pointer to unwind info */ | |
688 | symbolS *personality_routine; | |
91a2ae2a RH |
689 | segT saved_text_seg; |
690 | subsegT saved_text_subseg; | |
691 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 692 | |
e0c9811a JW |
693 | /* TRUE if processing unwind directives in a prologue region. */ |
694 | int prologue; | |
30d25259 | 695 | int prologue_mask; |
33d01f33 | 696 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
697 | /* Prologue counts at previous .label_state directives. */ |
698 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 699 | } unwind; |
800eeca4 | 700 | |
9f9a069e JW |
701 | /* The input value is a negated offset from psp, and specifies an address |
702 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
703 | must add 16 and divide by 4 to get the encoded value. */ | |
704 | ||
705 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
706 | ||
800eeca4 JW |
707 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
708 | ||
0234cb7c | 709 | /* Forward declarations: */ |
800eeca4 JW |
710 | static void set_section PARAMS ((char *name)); |
711 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
712 | unsigned int, unsigned int)); | |
d9201763 | 713 | static void dot_align (int); |
800eeca4 JW |
714 | static void dot_radix PARAMS ((int)); |
715 | static void dot_special_section PARAMS ((int)); | |
716 | static void dot_proc PARAMS ((int)); | |
717 | static void dot_fframe PARAMS ((int)); | |
718 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
719 | static void dot_vframesp PARAMS ((int)); |
720 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
721 | static void dot_save PARAMS ((int)); |
722 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
723 | static void dot_restorereg PARAMS ((int)); |
724 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
725 | static void dot_handlerdata PARAMS ((int)); |
726 | static void dot_unwentry PARAMS ((int)); | |
727 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 728 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
729 | static void dot_saveg PARAMS ((int)); |
730 | static void dot_savef PARAMS ((int)); | |
731 | static void dot_saveb PARAMS ((int)); | |
732 | static void dot_savegf PARAMS ((int)); | |
733 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
734 | static void dot_spillreg PARAMS ((int)); |
735 | static void dot_spillmem PARAMS ((int)); | |
736 | static void dot_spillreg_p PARAMS ((int)); | |
737 | static void dot_spillmem_p PARAMS ((int)); | |
738 | static void dot_label_state PARAMS ((int)); | |
739 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
740 | static void dot_unwabi PARAMS ((int)); |
741 | static void dot_personality PARAMS ((int)); | |
742 | static void dot_body PARAMS ((int)); | |
743 | static void dot_prologue PARAMS ((int)); | |
744 | static void dot_endp PARAMS ((int)); | |
745 | static void dot_template PARAMS ((int)); | |
746 | static void dot_regstk PARAMS ((int)); | |
747 | static void dot_rot PARAMS ((int)); | |
748 | static void dot_byteorder PARAMS ((int)); | |
749 | static void dot_psr PARAMS ((int)); | |
750 | static void dot_alias PARAMS ((int)); | |
751 | static void dot_ln PARAMS ((int)); | |
752 | static char *parse_section_name PARAMS ((void)); | |
753 | static void dot_xdata PARAMS ((int)); | |
754 | static void stmt_float_cons PARAMS ((int)); | |
755 | static void stmt_cons_ua PARAMS ((int)); | |
756 | static void dot_xfloat_cons PARAMS ((int)); | |
757 | static void dot_xstringer PARAMS ((int)); | |
758 | static void dot_xdata_ua PARAMS ((int)); | |
759 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 760 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
761 | static void dot_pred_rel PARAMS ((int)); |
762 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 763 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
764 | static void dot_dv_mode PARAMS ((int)); |
765 | static void dot_entry PARAMS ((int)); | |
766 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 767 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 768 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
769 | static void declare_register_set PARAMS ((const char *, int, int)); |
770 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
771 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
772 | int index, | |
773 | expressionS *e)); | |
800eeca4 JW |
774 | static int parse_operand PARAMS ((expressionS *e)); |
775 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
86cf98f3 | 776 | static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit)); |
800eeca4 JW |
777 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); |
778 | static void emit_one_bundle PARAMS ((void)); | |
779 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 780 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
781 | bfd_reloc_code_real_type r_type)); |
782 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
783 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
784 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
785 | static void add_qp_mutex PARAMS((valueT mask)); |
786 | static void add_qp_imply PARAMS((int p1, int p2)); | |
787 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
788 | static void clear_qp_mutex PARAMS((valueT mask)); | |
789 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 790 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
791 | static void clear_register_values PARAMS ((void)); |
792 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
793 | static void instruction_serialization PARAMS ((void)); |
794 | static void data_serialization PARAMS ((void)); | |
795 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 796 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 797 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 798 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
799 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
800 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
801 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
802 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
803 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
804 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
805 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
806 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
807 | static int qp_mutex PARAMS ((int, int, int)); |
808 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
809 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
810 | static void count_output PARAMS ((int, char *, char *)); | |
811 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
812 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 813 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
814 | static void output_P1_format PARAMS ((vbyte_func, int)); |
815 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
816 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
817 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
818 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
819 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
820 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
821 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
822 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
823 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
824 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
825 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
826 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
827 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
828 | static char format_ab_reg PARAMS ((int, int)); |
829 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
830 | unsigned long)); | |
831 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
832 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
833 | unsigned long)); | |
834 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 835 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
836 | static unw_rec_list *output_prologue PARAMS ((void)); |
837 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
838 | static unw_rec_list *output_body PARAMS ((void)); | |
839 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
840 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
841 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
842 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
843 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
844 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
845 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
846 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
847 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
848 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
849 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
850 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
851 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
852 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
853 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
854 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
855 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
856 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
857 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
858 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
859 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
860 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
861 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
862 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
863 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
864 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
865 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
866 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
867 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
868 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
869 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
870 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
871 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
872 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
873 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
874 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
875 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
876 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
877 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
878 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
879 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
881 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
882 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
883 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
884 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
885 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
886 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
887 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
888 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
889 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
890 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
891 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
892 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
893 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
894 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
895 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
896 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
897 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
898 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
899 | unsigned int)); | |
900 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
901 | unsigned int)); | |
902 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
903 | unsigned int)); | |
904 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
905 | unsigned int, unsigned int)); | |
906 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
907 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
908 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
909 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 910 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
911 | unsigned long, fragS *, |
912 | int)); | |
91a2ae2a | 913 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 914 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
150f24a2 JW |
915 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
916 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
6290819d NC |
917 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
918 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
919 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 920 | |
652ca075 | 921 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
922 | unit (as opposed to the memory unit). */ |
923 | static int | |
652ca075 | 924 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
925 | { |
926 | reg -= REG_AR; | |
652ca075 L |
927 | return reg >= 64 && reg <= 111; |
928 | } | |
800eeca4 | 929 | |
652ca075 L |
930 | /* Determine if application register REGNUM resides only in the memory |
931 | unit (as opposed to the integer unit). */ | |
932 | static int | |
933 | ar_is_only_in_memory_unit (int reg) | |
934 | { | |
935 | reg -= REG_AR; | |
936 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
937 | } |
938 | ||
939 | /* Switch to section NAME and create section if necessary. It's | |
940 | rather ugly that we have to manipulate input_line_pointer but I | |
941 | don't see any other way to accomplish the same thing without | |
942 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
943 | static void | |
944 | set_section (name) | |
945 | char *name; | |
946 | { | |
947 | char *saved_input_line_pointer; | |
948 | ||
949 | saved_input_line_pointer = input_line_pointer; | |
950 | input_line_pointer = name; | |
951 | obj_elf_section (0); | |
952 | input_line_pointer = saved_input_line_pointer; | |
953 | } | |
954 | ||
d61a78a7 RH |
955 | /* Map 's' to SHF_IA_64_SHORT. */ |
956 | ||
957 | int | |
958 | ia64_elf_section_letter (letter, ptr_msg) | |
959 | int letter; | |
960 | char **ptr_msg; | |
961 | { | |
962 | if (letter == 's') | |
963 | return SHF_IA_64_SHORT; | |
711ef82f L |
964 | else if (letter == 'o') |
965 | return SHF_LINK_ORDER; | |
d61a78a7 | 966 | |
711ef82f L |
967 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
968 | return -1; | |
d61a78a7 RH |
969 | } |
970 | ||
800eeca4 JW |
971 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
972 | ||
973 | flagword | |
974 | ia64_elf_section_flags (flags, attr, type) | |
975 | flagword flags; | |
2434f565 | 976 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
977 | { |
978 | if (attr & SHF_IA_64_SHORT) | |
979 | flags |= SEC_SMALL_DATA; | |
980 | return flags; | |
981 | } | |
982 | ||
91a2ae2a RH |
983 | int |
984 | ia64_elf_section_type (str, len) | |
40449e9f KH |
985 | const char *str; |
986 | size_t len; | |
91a2ae2a | 987 | { |
1cd8ff38 | 988 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 989 | |
1cd8ff38 | 990 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
991 | return SHT_PROGBITS; |
992 | ||
1cd8ff38 | 993 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
994 | return SHT_PROGBITS; |
995 | ||
1cd8ff38 | 996 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
997 | return SHT_IA_64_UNWIND; |
998 | ||
1cd8ff38 | 999 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1000 | return SHT_IA_64_UNWIND; |
1001 | ||
711ef82f L |
1002 | if (STREQ ("unwind")) |
1003 | return SHT_IA_64_UNWIND; | |
1004 | ||
91a2ae2a | 1005 | return -1; |
1cd8ff38 | 1006 | #undef STREQ |
91a2ae2a RH |
1007 | } |
1008 | ||
800eeca4 JW |
1009 | static unsigned int |
1010 | set_regstack (ins, locs, outs, rots) | |
1011 | unsigned int ins, locs, outs, rots; | |
1012 | { | |
542d6675 KH |
1013 | /* Size of frame. */ |
1014 | unsigned int sof; | |
800eeca4 JW |
1015 | |
1016 | sof = ins + locs + outs; | |
1017 | if (sof > 96) | |
1018 | { | |
1019 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1020 | return 0; | |
1021 | } | |
1022 | if (rots > sof) | |
1023 | { | |
1024 | as_warn ("Size of rotating registers exceeds frame size"); | |
1025 | return 0; | |
1026 | } | |
1027 | md.in.base = REG_GR + 32; | |
1028 | md.loc.base = md.in.base + ins; | |
1029 | md.out.base = md.loc.base + locs; | |
1030 | ||
1031 | md.in.num_regs = ins; | |
1032 | md.loc.num_regs = locs; | |
1033 | md.out.num_regs = outs; | |
1034 | md.rot.num_regs = rots; | |
1035 | return sof; | |
1036 | } | |
1037 | ||
1038 | void | |
1039 | ia64_flush_insns () | |
1040 | { | |
1041 | struct label_fix *lfix; | |
1042 | segT saved_seg; | |
1043 | subsegT saved_subseg; | |
b44b1b85 | 1044 | unw_rec_list *ptr; |
800eeca4 JW |
1045 | |
1046 | if (!md.last_text_seg) | |
1047 | return; | |
1048 | ||
1049 | saved_seg = now_seg; | |
1050 | saved_subseg = now_subseg; | |
1051 | ||
1052 | subseg_set (md.last_text_seg, 0); | |
1053 | ||
1054 | while (md.num_slots_in_use > 0) | |
1055 | emit_one_bundle (); /* force out queued instructions */ | |
1056 | ||
1057 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1058 | those now: */ |
800eeca4 JW |
1059 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1060 | { | |
1061 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1062 | symbol_set_frag (lfix->sym, frag_now); | |
1063 | } | |
1064 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1065 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1066 | { | |
1067 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1068 | symbol_set_frag (lfix->sym, frag_now); | |
1069 | } | |
1070 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1071 | |
b44b1b85 | 1072 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1073 | resolve those now. We only handle prologue, body, and endp directives |
1074 | here. Give an error for others. */ | |
b44b1b85 JW |
1075 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1076 | { | |
9c59842f | 1077 | switch (ptr->r.type) |
b44b1b85 | 1078 | { |
9c59842f JW |
1079 | case prologue: |
1080 | case prologue_gr: | |
1081 | case body: | |
1082 | case endp: | |
b44b1b85 JW |
1083 | ptr->slot_number = (unsigned long) frag_more (0); |
1084 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1085 | break; |
1086 | ||
1087 | /* Allow any record which doesn't have a "t" field (i.e., | |
1088 | doesn't relate to a particular instruction). */ | |
1089 | case unwabi: | |
1090 | case br_gr: | |
1091 | case copy_state: | |
1092 | case fr_mem: | |
1093 | case frgr_mem: | |
1094 | case gr_gr: | |
1095 | case gr_mem: | |
1096 | case label_state: | |
1097 | case rp_br: | |
1098 | case spill_base: | |
1099 | case spill_mask: | |
1100 | /* nothing */ | |
1101 | break; | |
1102 | ||
1103 | default: | |
1104 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1105 | break; | |
b44b1b85 | 1106 | } |
b44b1b85 JW |
1107 | } |
1108 | unwind.current_entry = NULL; | |
1109 | ||
800eeca4 | 1110 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1111 | |
1112 | if (md.qp.X_op == O_register) | |
1113 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1114 | } |
1115 | ||
d9201763 L |
1116 | static void |
1117 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1118 | { |
1119 | char *saved_input_line_pointer = input_line_pointer; | |
1120 | ||
1121 | input_line_pointer = ""; | |
1122 | s_align_bytes (nbytes); | |
1123 | input_line_pointer = saved_input_line_pointer; | |
1124 | } | |
1125 | ||
1126 | void | |
1127 | ia64_cons_align (nbytes) | |
1128 | int nbytes; | |
1129 | { | |
1130 | if (md.auto_align) | |
1131 | { | |
1132 | char *saved_input_line_pointer = input_line_pointer; | |
1133 | input_line_pointer = ""; | |
1134 | s_align_bytes (nbytes); | |
1135 | input_line_pointer = saved_input_line_pointer; | |
1136 | } | |
1137 | } | |
1138 | ||
1139 | /* Output COUNT bytes to a memory location. */ | |
1140 | static unsigned char *vbyte_mem_ptr = NULL; | |
1141 | ||
197865e8 | 1142 | void |
800eeca4 JW |
1143 | output_vbyte_mem (count, ptr, comment) |
1144 | int count; | |
1145 | char *ptr; | |
2434f565 | 1146 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1147 | { |
1148 | int x; | |
1149 | if (vbyte_mem_ptr == NULL) | |
1150 | abort (); | |
1151 | ||
1152 | if (count == 0) | |
1153 | return; | |
1154 | for (x = 0; x < count; x++) | |
1155 | *(vbyte_mem_ptr++) = ptr[x]; | |
1156 | } | |
1157 | ||
1158 | /* Count the number of bytes required for records. */ | |
1159 | static int vbyte_count = 0; | |
197865e8 | 1160 | void |
800eeca4 JW |
1161 | count_output (count, ptr, comment) |
1162 | int count; | |
2434f565 JW |
1163 | char *ptr ATTRIBUTE_UNUSED; |
1164 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1165 | { |
1166 | vbyte_count += count; | |
1167 | } | |
1168 | ||
1169 | static void | |
1170 | output_R1_format (f, rtype, rlen) | |
1171 | vbyte_func f; | |
1172 | unw_record_type rtype; | |
1173 | int rlen; | |
1174 | { | |
e0c9811a | 1175 | int r = 0; |
800eeca4 JW |
1176 | char byte; |
1177 | if (rlen > 0x1f) | |
1178 | { | |
1179 | output_R3_format (f, rtype, rlen); | |
1180 | return; | |
1181 | } | |
197865e8 | 1182 | |
e0c9811a JW |
1183 | if (rtype == body) |
1184 | r = 1; | |
1185 | else if (rtype != prologue) | |
1186 | as_bad ("record type is not valid"); | |
1187 | ||
800eeca4 JW |
1188 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1189 | (*f) (1, &byte, NULL); | |
1190 | } | |
1191 | ||
1192 | static void | |
1193 | output_R2_format (f, mask, grsave, rlen) | |
1194 | vbyte_func f; | |
1195 | int mask, grsave; | |
1196 | unsigned long rlen; | |
1197 | { | |
1198 | char bytes[20]; | |
1199 | int count = 2; | |
1200 | mask = (mask & 0x0f); | |
1201 | grsave = (grsave & 0x7f); | |
1202 | ||
1203 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1204 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1205 | count += output_leb128 (bytes + 2, rlen, 0); | |
1206 | (*f) (count, bytes, NULL); | |
1207 | } | |
1208 | ||
1209 | static void | |
1210 | output_R3_format (f, rtype, rlen) | |
1211 | vbyte_func f; | |
1212 | unw_record_type rtype; | |
1213 | unsigned long rlen; | |
1214 | { | |
e0c9811a | 1215 | int r = 0, count; |
800eeca4 JW |
1216 | char bytes[20]; |
1217 | if (rlen <= 0x1f) | |
1218 | { | |
1219 | output_R1_format (f, rtype, rlen); | |
1220 | return; | |
1221 | } | |
197865e8 | 1222 | |
e0c9811a JW |
1223 | if (rtype == body) |
1224 | r = 1; | |
1225 | else if (rtype != prologue) | |
1226 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1227 | bytes[0] = (UNW_R3 | r); |
1228 | count = output_leb128 (bytes + 1, rlen, 0); | |
1229 | (*f) (count + 1, bytes, NULL); | |
1230 | } | |
1231 | ||
1232 | static void | |
1233 | output_P1_format (f, brmask) | |
1234 | vbyte_func f; | |
1235 | int brmask; | |
1236 | { | |
1237 | char byte; | |
1238 | byte = UNW_P1 | (brmask & 0x1f); | |
1239 | (*f) (1, &byte, NULL); | |
1240 | } | |
1241 | ||
1242 | static void | |
1243 | output_P2_format (f, brmask, gr) | |
1244 | vbyte_func f; | |
1245 | int brmask; | |
1246 | int gr; | |
1247 | { | |
1248 | char bytes[2]; | |
1249 | brmask = (brmask & 0x1f); | |
1250 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1251 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1252 | (*f) (2, bytes, NULL); | |
1253 | } | |
1254 | ||
1255 | static void | |
1256 | output_P3_format (f, rtype, reg) | |
1257 | vbyte_func f; | |
1258 | unw_record_type rtype; | |
1259 | int reg; | |
1260 | { | |
1261 | char bytes[2]; | |
e0c9811a | 1262 | int r = 0; |
800eeca4 JW |
1263 | reg = (reg & 0x7f); |
1264 | switch (rtype) | |
542d6675 | 1265 | { |
800eeca4 JW |
1266 | case psp_gr: |
1267 | r = 0; | |
1268 | break; | |
1269 | case rp_gr: | |
1270 | r = 1; | |
1271 | break; | |
1272 | case pfs_gr: | |
1273 | r = 2; | |
1274 | break; | |
1275 | case preds_gr: | |
1276 | r = 3; | |
1277 | break; | |
1278 | case unat_gr: | |
1279 | r = 4; | |
1280 | break; | |
1281 | case lc_gr: | |
1282 | r = 5; | |
1283 | break; | |
1284 | case rp_br: | |
1285 | r = 6; | |
1286 | break; | |
1287 | case rnat_gr: | |
1288 | r = 7; | |
1289 | break; | |
1290 | case bsp_gr: | |
1291 | r = 8; | |
1292 | break; | |
1293 | case bspstore_gr: | |
1294 | r = 9; | |
1295 | break; | |
1296 | case fpsr_gr: | |
1297 | r = 10; | |
1298 | break; | |
1299 | case priunat_gr: | |
1300 | r = 11; | |
1301 | break; | |
1302 | default: | |
1303 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1304 | } |
800eeca4 JW |
1305 | bytes[0] = (UNW_P3 | (r >> 1)); |
1306 | bytes[1] = (((r & 1) << 7) | reg); | |
1307 | (*f) (2, bytes, NULL); | |
1308 | } | |
1309 | ||
800eeca4 | 1310 | static void |
e0c9811a | 1311 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1312 | vbyte_func f; |
e0c9811a JW |
1313 | unsigned char *imask; |
1314 | unsigned long imask_size; | |
800eeca4 | 1315 | { |
e0c9811a JW |
1316 | imask[0] = UNW_P4; |
1317 | (*f) (imask_size, imask, NULL); | |
800eeca4 JW |
1318 | } |
1319 | ||
1320 | static void | |
1321 | output_P5_format (f, grmask, frmask) | |
1322 | vbyte_func f; | |
1323 | int grmask; | |
1324 | unsigned long frmask; | |
1325 | { | |
1326 | char bytes[4]; | |
1327 | grmask = (grmask & 0x0f); | |
1328 | ||
1329 | bytes[0] = UNW_P5; | |
1330 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1331 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1332 | bytes[3] = (frmask & 0x000000ff); | |
1333 | (*f) (4, bytes, NULL); | |
1334 | } | |
1335 | ||
1336 | static void | |
1337 | output_P6_format (f, rtype, rmask) | |
1338 | vbyte_func f; | |
1339 | unw_record_type rtype; | |
1340 | int rmask; | |
1341 | { | |
1342 | char byte; | |
e0c9811a | 1343 | int r = 0; |
197865e8 | 1344 | |
e0c9811a JW |
1345 | if (rtype == gr_mem) |
1346 | r = 1; | |
1347 | else if (rtype != fr_mem) | |
1348 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1349 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1350 | (*f) (1, &byte, NULL); | |
1351 | } | |
1352 | ||
1353 | static void | |
1354 | output_P7_format (f, rtype, w1, w2) | |
1355 | vbyte_func f; | |
1356 | unw_record_type rtype; | |
1357 | unsigned long w1; | |
1358 | unsigned long w2; | |
1359 | { | |
1360 | char bytes[20]; | |
1361 | int count = 1; | |
e0c9811a | 1362 | int r = 0; |
800eeca4 JW |
1363 | count += output_leb128 (bytes + 1, w1, 0); |
1364 | switch (rtype) | |
1365 | { | |
542d6675 KH |
1366 | case mem_stack_f: |
1367 | r = 0; | |
1368 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1369 | break; | |
1370 | case mem_stack_v: | |
1371 | r = 1; | |
1372 | break; | |
1373 | case spill_base: | |
1374 | r = 2; | |
1375 | break; | |
1376 | case psp_sprel: | |
1377 | r = 3; | |
1378 | break; | |
1379 | case rp_when: | |
1380 | r = 4; | |
1381 | break; | |
1382 | case rp_psprel: | |
1383 | r = 5; | |
1384 | break; | |
1385 | case pfs_when: | |
1386 | r = 6; | |
1387 | break; | |
1388 | case pfs_psprel: | |
1389 | r = 7; | |
1390 | break; | |
1391 | case preds_when: | |
1392 | r = 8; | |
1393 | break; | |
1394 | case preds_psprel: | |
1395 | r = 9; | |
1396 | break; | |
1397 | case lc_when: | |
1398 | r = 10; | |
1399 | break; | |
1400 | case lc_psprel: | |
1401 | r = 11; | |
1402 | break; | |
1403 | case unat_when: | |
1404 | r = 12; | |
1405 | break; | |
1406 | case unat_psprel: | |
1407 | r = 13; | |
1408 | break; | |
1409 | case fpsr_when: | |
1410 | r = 14; | |
1411 | break; | |
1412 | case fpsr_psprel: | |
1413 | r = 15; | |
1414 | break; | |
1415 | default: | |
1416 | break; | |
800eeca4 JW |
1417 | } |
1418 | bytes[0] = (UNW_P7 | r); | |
1419 | (*f) (count, bytes, NULL); | |
1420 | } | |
1421 | ||
1422 | static void | |
1423 | output_P8_format (f, rtype, t) | |
1424 | vbyte_func f; | |
1425 | unw_record_type rtype; | |
1426 | unsigned long t; | |
1427 | { | |
1428 | char bytes[20]; | |
e0c9811a | 1429 | int r = 0; |
800eeca4 JW |
1430 | int count = 2; |
1431 | bytes[0] = UNW_P8; | |
1432 | switch (rtype) | |
1433 | { | |
542d6675 KH |
1434 | case rp_sprel: |
1435 | r = 1; | |
1436 | break; | |
1437 | case pfs_sprel: | |
1438 | r = 2; | |
1439 | break; | |
1440 | case preds_sprel: | |
1441 | r = 3; | |
1442 | break; | |
1443 | case lc_sprel: | |
1444 | r = 4; | |
1445 | break; | |
1446 | case unat_sprel: | |
1447 | r = 5; | |
1448 | break; | |
1449 | case fpsr_sprel: | |
1450 | r = 6; | |
1451 | break; | |
1452 | case bsp_when: | |
1453 | r = 7; | |
1454 | break; | |
1455 | case bsp_psprel: | |
1456 | r = 8; | |
1457 | break; | |
1458 | case bsp_sprel: | |
1459 | r = 9; | |
1460 | break; | |
1461 | case bspstore_when: | |
1462 | r = 10; | |
1463 | break; | |
1464 | case bspstore_psprel: | |
1465 | r = 11; | |
1466 | break; | |
1467 | case bspstore_sprel: | |
1468 | r = 12; | |
1469 | break; | |
1470 | case rnat_when: | |
1471 | r = 13; | |
1472 | break; | |
1473 | case rnat_psprel: | |
1474 | r = 14; | |
1475 | break; | |
1476 | case rnat_sprel: | |
1477 | r = 15; | |
1478 | break; | |
1479 | case priunat_when_gr: | |
1480 | r = 16; | |
1481 | break; | |
1482 | case priunat_psprel: | |
1483 | r = 17; | |
1484 | break; | |
1485 | case priunat_sprel: | |
1486 | r = 18; | |
1487 | break; | |
1488 | case priunat_when_mem: | |
1489 | r = 19; | |
1490 | break; | |
1491 | default: | |
1492 | break; | |
800eeca4 JW |
1493 | } |
1494 | bytes[1] = r; | |
1495 | count += output_leb128 (bytes + 2, t, 0); | |
1496 | (*f) (count, bytes, NULL); | |
1497 | } | |
1498 | ||
1499 | static void | |
1500 | output_P9_format (f, grmask, gr) | |
1501 | vbyte_func f; | |
1502 | int grmask; | |
1503 | int gr; | |
1504 | { | |
1505 | char bytes[3]; | |
1506 | bytes[0] = UNW_P9; | |
1507 | bytes[1] = (grmask & 0x0f); | |
1508 | bytes[2] = (gr & 0x7f); | |
1509 | (*f) (3, bytes, NULL); | |
1510 | } | |
1511 | ||
1512 | static void | |
1513 | output_P10_format (f, abi, context) | |
1514 | vbyte_func f; | |
1515 | int abi; | |
1516 | int context; | |
1517 | { | |
1518 | char bytes[3]; | |
1519 | bytes[0] = UNW_P10; | |
1520 | bytes[1] = (abi & 0xff); | |
1521 | bytes[2] = (context & 0xff); | |
1522 | (*f) (3, bytes, NULL); | |
1523 | } | |
1524 | ||
1525 | static void | |
1526 | output_B1_format (f, rtype, label) | |
1527 | vbyte_func f; | |
1528 | unw_record_type rtype; | |
1529 | unsigned long label; | |
1530 | { | |
1531 | char byte; | |
e0c9811a | 1532 | int r = 0; |
197865e8 | 1533 | if (label > 0x1f) |
800eeca4 JW |
1534 | { |
1535 | output_B4_format (f, rtype, label); | |
1536 | return; | |
1537 | } | |
e0c9811a JW |
1538 | if (rtype == copy_state) |
1539 | r = 1; | |
1540 | else if (rtype != label_state) | |
1541 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1542 | |
1543 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1544 | (*f) (1, &byte, NULL); | |
1545 | } | |
1546 | ||
1547 | static void | |
1548 | output_B2_format (f, ecount, t) | |
1549 | vbyte_func f; | |
1550 | unsigned long ecount; | |
1551 | unsigned long t; | |
1552 | { | |
1553 | char bytes[20]; | |
1554 | int count = 1; | |
1555 | if (ecount > 0x1f) | |
1556 | { | |
1557 | output_B3_format (f, ecount, t); | |
1558 | return; | |
1559 | } | |
1560 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1561 | count += output_leb128 (bytes + 1, t, 0); | |
1562 | (*f) (count, bytes, NULL); | |
1563 | } | |
1564 | ||
1565 | static void | |
1566 | output_B3_format (f, ecount, t) | |
1567 | vbyte_func f; | |
1568 | unsigned long ecount; | |
1569 | unsigned long t; | |
1570 | { | |
1571 | char bytes[20]; | |
1572 | int count = 1; | |
1573 | if (ecount <= 0x1f) | |
1574 | { | |
1575 | output_B2_format (f, ecount, t); | |
1576 | return; | |
1577 | } | |
1578 | bytes[0] = UNW_B3; | |
1579 | count += output_leb128 (bytes + 1, t, 0); | |
1580 | count += output_leb128 (bytes + count, ecount, 0); | |
1581 | (*f) (count, bytes, NULL); | |
1582 | } | |
1583 | ||
1584 | static void | |
1585 | output_B4_format (f, rtype, label) | |
1586 | vbyte_func f; | |
1587 | unw_record_type rtype; | |
1588 | unsigned long label; | |
1589 | { | |
1590 | char bytes[20]; | |
e0c9811a | 1591 | int r = 0; |
800eeca4 | 1592 | int count = 1; |
197865e8 | 1593 | if (label <= 0x1f) |
800eeca4 JW |
1594 | { |
1595 | output_B1_format (f, rtype, label); | |
1596 | return; | |
1597 | } | |
197865e8 | 1598 | |
e0c9811a JW |
1599 | if (rtype == copy_state) |
1600 | r = 1; | |
1601 | else if (rtype != label_state) | |
1602 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1603 | |
1604 | bytes[0] = (UNW_B4 | (r << 3)); | |
1605 | count += output_leb128 (bytes + 1, label, 0); | |
1606 | (*f) (count, bytes, NULL); | |
1607 | } | |
1608 | ||
1609 | static char | |
e0c9811a | 1610 | format_ab_reg (ab, reg) |
542d6675 KH |
1611 | int ab; |
1612 | int reg; | |
800eeca4 JW |
1613 | { |
1614 | int ret; | |
e0c9811a | 1615 | ab = (ab & 3); |
800eeca4 | 1616 | reg = (reg & 0x1f); |
e0c9811a | 1617 | ret = (ab << 5) | reg; |
800eeca4 JW |
1618 | return ret; |
1619 | } | |
1620 | ||
1621 | static void | |
e0c9811a | 1622 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1623 | vbyte_func f; |
1624 | unw_record_type rtype; | |
e0c9811a | 1625 | int ab, reg; |
800eeca4 JW |
1626 | unsigned long t; |
1627 | unsigned long w1; | |
1628 | { | |
1629 | char bytes[20]; | |
e0c9811a | 1630 | int r = 0; |
800eeca4 JW |
1631 | int count = 2; |
1632 | bytes[0] = UNW_X1; | |
197865e8 | 1633 | |
e0c9811a JW |
1634 | if (rtype == spill_sprel) |
1635 | r = 1; | |
1636 | else if (rtype != spill_psprel) | |
1637 | as_bad ("Invalid record type for format X1"); | |
1638 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1639 | count += output_leb128 (bytes + 2, t, 0); |
1640 | count += output_leb128 (bytes + count, w1, 0); | |
1641 | (*f) (count, bytes, NULL); | |
1642 | } | |
1643 | ||
1644 | static void | |
e0c9811a | 1645 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1646 | vbyte_func f; |
e0c9811a | 1647 | int ab, reg; |
800eeca4 JW |
1648 | int x, y, treg; |
1649 | unsigned long t; | |
1650 | { | |
1651 | char bytes[20]; | |
800eeca4 JW |
1652 | int count = 3; |
1653 | bytes[0] = UNW_X2; | |
e0c9811a | 1654 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1655 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1656 | count += output_leb128 (bytes + 3, t, 0); | |
1657 | (*f) (count, bytes, NULL); | |
1658 | } | |
1659 | ||
1660 | static void | |
e0c9811a | 1661 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1662 | vbyte_func f; |
1663 | unw_record_type rtype; | |
1664 | int qp; | |
e0c9811a | 1665 | int ab, reg; |
800eeca4 JW |
1666 | unsigned long t; |
1667 | unsigned long w1; | |
1668 | { | |
1669 | char bytes[20]; | |
e0c9811a | 1670 | int r = 0; |
800eeca4 | 1671 | int count = 3; |
e0c9811a JW |
1672 | bytes[0] = UNW_X3; |
1673 | ||
1674 | if (rtype == spill_sprel_p) | |
1675 | r = 1; | |
1676 | else if (rtype != spill_psprel_p) | |
1677 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1678 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1679 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1680 | count += output_leb128 (bytes + 3, t, 0); |
1681 | count += output_leb128 (bytes + count, w1, 0); | |
1682 | (*f) (count, bytes, NULL); | |
1683 | } | |
1684 | ||
1685 | static void | |
e0c9811a | 1686 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1687 | vbyte_func f; |
1688 | int qp; | |
e0c9811a | 1689 | int ab, reg; |
800eeca4 JW |
1690 | int x, y, treg; |
1691 | unsigned long t; | |
1692 | { | |
1693 | char bytes[20]; | |
800eeca4 | 1694 | int count = 4; |
e0c9811a | 1695 | bytes[0] = UNW_X4; |
800eeca4 | 1696 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1697 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1698 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1699 | count += output_leb128 (bytes + 4, t, 0); | |
1700 | (*f) (count, bytes, NULL); | |
1701 | } | |
1702 | ||
1703 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1704 | |
800eeca4 | 1705 | static unw_rec_list * |
197865e8 | 1706 | alloc_record (unw_record_type t) |
800eeca4 JW |
1707 | { |
1708 | unw_rec_list *ptr; | |
1709 | ptr = xmalloc (sizeof (*ptr)); | |
1710 | ptr->next = NULL; | |
1711 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1712 | ptr->r.type = t; | |
73f20958 L |
1713 | ptr->next_slot_number = 0; |
1714 | ptr->next_slot_frag = 0; | |
800eeca4 JW |
1715 | return ptr; |
1716 | } | |
1717 | ||
5738bc24 JW |
1718 | /* Dummy unwind record used for calculating the length of the last prologue or |
1719 | body region. */ | |
1720 | ||
1721 | static unw_rec_list * | |
1722 | output_endp () | |
1723 | { | |
1724 | unw_rec_list *ptr = alloc_record (endp); | |
1725 | return ptr; | |
1726 | } | |
1727 | ||
800eeca4 JW |
1728 | static unw_rec_list * |
1729 | output_prologue () | |
1730 | { | |
1731 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1732 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1733 | return ptr; |
1734 | } | |
1735 | ||
1736 | static unw_rec_list * | |
1737 | output_prologue_gr (saved_mask, reg) | |
1738 | unsigned int saved_mask; | |
1739 | unsigned int reg; | |
1740 | { | |
1741 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1742 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1743 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1744 | ptr->r.record.r.grsave = reg; |
1745 | return ptr; | |
1746 | } | |
1747 | ||
1748 | static unw_rec_list * | |
1749 | output_body () | |
1750 | { | |
1751 | unw_rec_list *ptr = alloc_record (body); | |
1752 | return ptr; | |
1753 | } | |
1754 | ||
1755 | static unw_rec_list * | |
1756 | output_mem_stack_f (size) | |
1757 | unsigned int size; | |
1758 | { | |
1759 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1760 | ptr->r.record.p.size = size; | |
1761 | return ptr; | |
1762 | } | |
1763 | ||
1764 | static unw_rec_list * | |
1765 | output_mem_stack_v () | |
1766 | { | |
1767 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1768 | return ptr; | |
1769 | } | |
1770 | ||
1771 | static unw_rec_list * | |
1772 | output_psp_gr (gr) | |
1773 | unsigned int gr; | |
1774 | { | |
1775 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1776 | ptr->r.record.p.gr = gr; | |
1777 | return ptr; | |
1778 | } | |
1779 | ||
1780 | static unw_rec_list * | |
1781 | output_psp_sprel (offset) | |
1782 | unsigned int offset; | |
1783 | { | |
1784 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1785 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1786 | return ptr; |
1787 | } | |
1788 | ||
1789 | static unw_rec_list * | |
1790 | output_rp_when () | |
1791 | { | |
1792 | unw_rec_list *ptr = alloc_record (rp_when); | |
1793 | return ptr; | |
1794 | } | |
1795 | ||
1796 | static unw_rec_list * | |
1797 | output_rp_gr (gr) | |
1798 | unsigned int gr; | |
1799 | { | |
1800 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1801 | ptr->r.record.p.gr = gr; | |
1802 | return ptr; | |
1803 | } | |
1804 | ||
1805 | static unw_rec_list * | |
1806 | output_rp_br (br) | |
1807 | unsigned int br; | |
1808 | { | |
1809 | unw_rec_list *ptr = alloc_record (rp_br); | |
1810 | ptr->r.record.p.br = br; | |
1811 | return ptr; | |
1812 | } | |
1813 | ||
1814 | static unw_rec_list * | |
1815 | output_rp_psprel (offset) | |
1816 | unsigned int offset; | |
1817 | { | |
1818 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
9f9a069e | 1819 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1820 | return ptr; |
1821 | } | |
1822 | ||
1823 | static unw_rec_list * | |
1824 | output_rp_sprel (offset) | |
1825 | unsigned int offset; | |
1826 | { | |
1827 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1828 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1829 | return ptr; |
1830 | } | |
1831 | ||
1832 | static unw_rec_list * | |
1833 | output_pfs_when () | |
1834 | { | |
1835 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1836 | return ptr; | |
1837 | } | |
1838 | ||
1839 | static unw_rec_list * | |
1840 | output_pfs_gr (gr) | |
1841 | unsigned int gr; | |
1842 | { | |
1843 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1844 | ptr->r.record.p.gr = gr; | |
1845 | return ptr; | |
1846 | } | |
1847 | ||
1848 | static unw_rec_list * | |
1849 | output_pfs_psprel (offset) | |
1850 | unsigned int offset; | |
1851 | { | |
1852 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
9f9a069e | 1853 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1854 | return ptr; |
1855 | } | |
1856 | ||
1857 | static unw_rec_list * | |
1858 | output_pfs_sprel (offset) | |
1859 | unsigned int offset; | |
1860 | { | |
1861 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1862 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1863 | return ptr; |
1864 | } | |
1865 | ||
1866 | static unw_rec_list * | |
1867 | output_preds_when () | |
1868 | { | |
1869 | unw_rec_list *ptr = alloc_record (preds_when); | |
1870 | return ptr; | |
1871 | } | |
1872 | ||
1873 | static unw_rec_list * | |
1874 | output_preds_gr (gr) | |
1875 | unsigned int gr; | |
1876 | { | |
1877 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1878 | ptr->r.record.p.gr = gr; | |
1879 | return ptr; | |
1880 | } | |
1881 | ||
1882 | static unw_rec_list * | |
1883 | output_preds_psprel (offset) | |
1884 | unsigned int offset; | |
1885 | { | |
1886 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
9f9a069e | 1887 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1888 | return ptr; |
1889 | } | |
1890 | ||
1891 | static unw_rec_list * | |
1892 | output_preds_sprel (offset) | |
1893 | unsigned int offset; | |
1894 | { | |
1895 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1896 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1897 | return ptr; |
1898 | } | |
1899 | ||
1900 | static unw_rec_list * | |
1901 | output_fr_mem (mask) | |
1902 | unsigned int mask; | |
1903 | { | |
1904 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1905 | ptr->r.record.p.rmask = mask; | |
1906 | return ptr; | |
1907 | } | |
1908 | ||
1909 | static unw_rec_list * | |
1910 | output_frgr_mem (gr_mask, fr_mask) | |
1911 | unsigned int gr_mask; | |
1912 | unsigned int fr_mask; | |
1913 | { | |
1914 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1915 | ptr->r.record.p.grmask = gr_mask; | |
1916 | ptr->r.record.p.frmask = fr_mask; | |
1917 | return ptr; | |
1918 | } | |
1919 | ||
1920 | static unw_rec_list * | |
1921 | output_gr_gr (mask, reg) | |
1922 | unsigned int mask; | |
1923 | unsigned int reg; | |
1924 | { | |
1925 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1926 | ptr->r.record.p.grmask = mask; | |
1927 | ptr->r.record.p.gr = reg; | |
1928 | return ptr; | |
1929 | } | |
1930 | ||
1931 | static unw_rec_list * | |
1932 | output_gr_mem (mask) | |
1933 | unsigned int mask; | |
1934 | { | |
1935 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1936 | ptr->r.record.p.rmask = mask; | |
1937 | return ptr; | |
1938 | } | |
1939 | ||
1940 | static unw_rec_list * | |
1941 | output_br_mem (unsigned int mask) | |
1942 | { | |
1943 | unw_rec_list *ptr = alloc_record (br_mem); | |
1944 | ptr->r.record.p.brmask = mask; | |
1945 | return ptr; | |
1946 | } | |
1947 | ||
1948 | static unw_rec_list * | |
1949 | output_br_gr (save_mask, reg) | |
1950 | unsigned int save_mask; | |
1951 | unsigned int reg; | |
1952 | { | |
1953 | unw_rec_list *ptr = alloc_record (br_gr); | |
1954 | ptr->r.record.p.brmask = save_mask; | |
1955 | ptr->r.record.p.gr = reg; | |
1956 | return ptr; | |
1957 | } | |
1958 | ||
1959 | static unw_rec_list * | |
1960 | output_spill_base (offset) | |
1961 | unsigned int offset; | |
1962 | { | |
1963 | unw_rec_list *ptr = alloc_record (spill_base); | |
9f9a069e | 1964 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1965 | return ptr; |
1966 | } | |
1967 | ||
1968 | static unw_rec_list * | |
1969 | output_unat_when () | |
1970 | { | |
1971 | unw_rec_list *ptr = alloc_record (unat_when); | |
1972 | return ptr; | |
1973 | } | |
1974 | ||
1975 | static unw_rec_list * | |
1976 | output_unat_gr (gr) | |
1977 | unsigned int gr; | |
1978 | { | |
1979 | unw_rec_list *ptr = alloc_record (unat_gr); | |
1980 | ptr->r.record.p.gr = gr; | |
1981 | return ptr; | |
1982 | } | |
1983 | ||
1984 | static unw_rec_list * | |
1985 | output_unat_psprel (offset) | |
1986 | unsigned int offset; | |
1987 | { | |
1988 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
9f9a069e | 1989 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1990 | return ptr; |
1991 | } | |
1992 | ||
1993 | static unw_rec_list * | |
1994 | output_unat_sprel (offset) | |
1995 | unsigned int offset; | |
1996 | { | |
1997 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 1998 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1999 | return ptr; |
2000 | } | |
2001 | ||
2002 | static unw_rec_list * | |
2003 | output_lc_when () | |
2004 | { | |
2005 | unw_rec_list *ptr = alloc_record (lc_when); | |
2006 | return ptr; | |
2007 | } | |
2008 | ||
2009 | static unw_rec_list * | |
2010 | output_lc_gr (gr) | |
2011 | unsigned int gr; | |
2012 | { | |
2013 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2014 | ptr->r.record.p.gr = gr; | |
2015 | return ptr; | |
2016 | } | |
2017 | ||
2018 | static unw_rec_list * | |
2019 | output_lc_psprel (offset) | |
2020 | unsigned int offset; | |
2021 | { | |
2022 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
9f9a069e | 2023 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2024 | return ptr; |
2025 | } | |
2026 | ||
2027 | static unw_rec_list * | |
2028 | output_lc_sprel (offset) | |
2029 | unsigned int offset; | |
2030 | { | |
2031 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2032 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2033 | return ptr; |
2034 | } | |
2035 | ||
2036 | static unw_rec_list * | |
2037 | output_fpsr_when () | |
2038 | { | |
2039 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2040 | return ptr; | |
2041 | } | |
2042 | ||
2043 | static unw_rec_list * | |
2044 | output_fpsr_gr (gr) | |
2045 | unsigned int gr; | |
2046 | { | |
2047 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2048 | ptr->r.record.p.gr = gr; | |
2049 | return ptr; | |
2050 | } | |
2051 | ||
2052 | static unw_rec_list * | |
2053 | output_fpsr_psprel (offset) | |
2054 | unsigned int offset; | |
2055 | { | |
2056 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
9f9a069e | 2057 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2058 | return ptr; |
2059 | } | |
2060 | ||
2061 | static unw_rec_list * | |
2062 | output_fpsr_sprel (offset) | |
2063 | unsigned int offset; | |
2064 | { | |
2065 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2066 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2067 | return ptr; |
2068 | } | |
2069 | ||
2070 | static unw_rec_list * | |
2071 | output_priunat_when_gr () | |
2072 | { | |
2073 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2074 | return ptr; | |
2075 | } | |
2076 | ||
2077 | static unw_rec_list * | |
2078 | output_priunat_when_mem () | |
2079 | { | |
2080 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2081 | return ptr; | |
2082 | } | |
2083 | ||
2084 | static unw_rec_list * | |
2085 | output_priunat_gr (gr) | |
2086 | unsigned int gr; | |
2087 | { | |
2088 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2089 | ptr->r.record.p.gr = gr; | |
2090 | return ptr; | |
2091 | } | |
2092 | ||
2093 | static unw_rec_list * | |
2094 | output_priunat_psprel (offset) | |
2095 | unsigned int offset; | |
2096 | { | |
2097 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
9f9a069e | 2098 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2099 | return ptr; |
2100 | } | |
2101 | ||
2102 | static unw_rec_list * | |
2103 | output_priunat_sprel (offset) | |
2104 | unsigned int offset; | |
2105 | { | |
2106 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2107 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2108 | return ptr; |
2109 | } | |
2110 | ||
2111 | static unw_rec_list * | |
2112 | output_bsp_when () | |
2113 | { | |
2114 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2115 | return ptr; | |
2116 | } | |
2117 | ||
2118 | static unw_rec_list * | |
2119 | output_bsp_gr (gr) | |
2120 | unsigned int gr; | |
2121 | { | |
2122 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2123 | ptr->r.record.p.gr = gr; | |
2124 | return ptr; | |
2125 | } | |
2126 | ||
2127 | static unw_rec_list * | |
2128 | output_bsp_psprel (offset) | |
2129 | unsigned int offset; | |
2130 | { | |
2131 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
9f9a069e | 2132 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2133 | return ptr; |
2134 | } | |
2135 | ||
2136 | static unw_rec_list * | |
2137 | output_bsp_sprel (offset) | |
2138 | unsigned int offset; | |
2139 | { | |
2140 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2141 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2142 | return ptr; |
2143 | } | |
2144 | ||
2145 | static unw_rec_list * | |
2146 | output_bspstore_when () | |
2147 | { | |
2148 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2149 | return ptr; | |
2150 | } | |
2151 | ||
2152 | static unw_rec_list * | |
2153 | output_bspstore_gr (gr) | |
2154 | unsigned int gr; | |
2155 | { | |
2156 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2157 | ptr->r.record.p.gr = gr; | |
2158 | return ptr; | |
2159 | } | |
2160 | ||
2161 | static unw_rec_list * | |
2162 | output_bspstore_psprel (offset) | |
2163 | unsigned int offset; | |
2164 | { | |
2165 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
9f9a069e | 2166 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2167 | return ptr; |
2168 | } | |
2169 | ||
2170 | static unw_rec_list * | |
2171 | output_bspstore_sprel (offset) | |
2172 | unsigned int offset; | |
2173 | { | |
2174 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2175 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2176 | return ptr; |
2177 | } | |
2178 | ||
2179 | static unw_rec_list * | |
2180 | output_rnat_when () | |
2181 | { | |
2182 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2183 | return ptr; | |
2184 | } | |
2185 | ||
2186 | static unw_rec_list * | |
2187 | output_rnat_gr (gr) | |
2188 | unsigned int gr; | |
2189 | { | |
2190 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2191 | ptr->r.record.p.gr = gr; | |
2192 | return ptr; | |
2193 | } | |
2194 | ||
2195 | static unw_rec_list * | |
2196 | output_rnat_psprel (offset) | |
2197 | unsigned int offset; | |
2198 | { | |
2199 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
9f9a069e | 2200 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2201 | return ptr; |
2202 | } | |
2203 | ||
2204 | static unw_rec_list * | |
2205 | output_rnat_sprel (offset) | |
2206 | unsigned int offset; | |
2207 | { | |
2208 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2209 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2210 | return ptr; |
2211 | } | |
2212 | ||
2213 | static unw_rec_list * | |
e0c9811a JW |
2214 | output_unwabi (abi, context) |
2215 | unsigned long abi; | |
2216 | unsigned long context; | |
800eeca4 | 2217 | { |
e0c9811a JW |
2218 | unw_rec_list *ptr = alloc_record (unwabi); |
2219 | ptr->r.record.p.abi = abi; | |
2220 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2221 | return ptr; |
2222 | } | |
2223 | ||
2224 | static unw_rec_list * | |
e0c9811a | 2225 | output_epilogue (unsigned long ecount) |
800eeca4 | 2226 | { |
e0c9811a JW |
2227 | unw_rec_list *ptr = alloc_record (epilogue); |
2228 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2229 | return ptr; |
2230 | } | |
2231 | ||
2232 | static unw_rec_list * | |
e0c9811a | 2233 | output_label_state (unsigned long label) |
800eeca4 | 2234 | { |
e0c9811a JW |
2235 | unw_rec_list *ptr = alloc_record (label_state); |
2236 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2237 | return ptr; |
2238 | } | |
2239 | ||
2240 | static unw_rec_list * | |
e0c9811a JW |
2241 | output_copy_state (unsigned long label) |
2242 | { | |
2243 | unw_rec_list *ptr = alloc_record (copy_state); | |
2244 | ptr->r.record.b.label = label; | |
2245 | return ptr; | |
2246 | } | |
2247 | ||
2248 | static unw_rec_list * | |
2249 | output_spill_psprel (ab, reg, offset) | |
2250 | unsigned int ab; | |
800eeca4 JW |
2251 | unsigned int reg; |
2252 | unsigned int offset; | |
2253 | { | |
2254 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2255 | ptr->r.record.x.ab = ab; |
800eeca4 | 2256 | ptr->r.record.x.reg = reg; |
9f9a069e | 2257 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2258 | return ptr; |
2259 | } | |
2260 | ||
2261 | static unw_rec_list * | |
e0c9811a JW |
2262 | output_spill_sprel (ab, reg, offset) |
2263 | unsigned int ab; | |
800eeca4 JW |
2264 | unsigned int reg; |
2265 | unsigned int offset; | |
2266 | { | |
2267 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2268 | ptr->r.record.x.ab = ab; |
800eeca4 | 2269 | ptr->r.record.x.reg = reg; |
542d6675 | 2270 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2271 | return ptr; |
2272 | } | |
2273 | ||
2274 | static unw_rec_list * | |
e0c9811a JW |
2275 | output_spill_psprel_p (ab, reg, offset, predicate) |
2276 | unsigned int ab; | |
800eeca4 JW |
2277 | unsigned int reg; |
2278 | unsigned int offset; | |
2279 | unsigned int predicate; | |
2280 | { | |
2281 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2282 | ptr->r.record.x.ab = ab; |
800eeca4 | 2283 | ptr->r.record.x.reg = reg; |
9f9a069e | 2284 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2285 | ptr->r.record.x.qp = predicate; |
2286 | return ptr; | |
2287 | } | |
2288 | ||
2289 | static unw_rec_list * | |
e0c9811a JW |
2290 | output_spill_sprel_p (ab, reg, offset, predicate) |
2291 | unsigned int ab; | |
800eeca4 JW |
2292 | unsigned int reg; |
2293 | unsigned int offset; | |
2294 | unsigned int predicate; | |
2295 | { | |
2296 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2297 | ptr->r.record.x.ab = ab; |
800eeca4 | 2298 | ptr->r.record.x.reg = reg; |
542d6675 | 2299 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2300 | ptr->r.record.x.qp = predicate; |
2301 | return ptr; | |
2302 | } | |
2303 | ||
2304 | static unw_rec_list * | |
e0c9811a JW |
2305 | output_spill_reg (ab, reg, targ_reg, xy) |
2306 | unsigned int ab; | |
800eeca4 JW |
2307 | unsigned int reg; |
2308 | unsigned int targ_reg; | |
2309 | unsigned int xy; | |
2310 | { | |
2311 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2312 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2313 | ptr->r.record.x.reg = reg; |
2314 | ptr->r.record.x.treg = targ_reg; | |
2315 | ptr->r.record.x.xy = xy; | |
2316 | return ptr; | |
2317 | } | |
2318 | ||
2319 | static unw_rec_list * | |
e0c9811a JW |
2320 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2321 | unsigned int ab; | |
800eeca4 JW |
2322 | unsigned int reg; |
2323 | unsigned int targ_reg; | |
2324 | unsigned int xy; | |
2325 | unsigned int predicate; | |
2326 | { | |
2327 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2328 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2329 | ptr->r.record.x.reg = reg; |
2330 | ptr->r.record.x.treg = targ_reg; | |
2331 | ptr->r.record.x.xy = xy; | |
2332 | ptr->r.record.x.qp = predicate; | |
2333 | return ptr; | |
2334 | } | |
2335 | ||
197865e8 | 2336 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2337 | specified function. */ |
542d6675 | 2338 | |
800eeca4 JW |
2339 | static void |
2340 | process_one_record (ptr, f) | |
2341 | unw_rec_list *ptr; | |
2342 | vbyte_func f; | |
2343 | { | |
e0c9811a JW |
2344 | unsigned long fr_mask, gr_mask; |
2345 | ||
197865e8 | 2346 | switch (ptr->r.type) |
800eeca4 | 2347 | { |
5738bc24 JW |
2348 | /* This is a dummy record that takes up no space in the output. */ |
2349 | case endp: | |
2350 | break; | |
2351 | ||
542d6675 KH |
2352 | case gr_mem: |
2353 | case fr_mem: | |
2354 | case br_mem: | |
2355 | case frgr_mem: | |
2356 | /* These are taken care of by prologue/prologue_gr. */ | |
2357 | break; | |
e0c9811a | 2358 | |
542d6675 KH |
2359 | case prologue_gr: |
2360 | case prologue: | |
2361 | if (ptr->r.type == prologue_gr) | |
2362 | output_R2_format (f, ptr->r.record.r.grmask, | |
2363 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2364 | else | |
800eeca4 | 2365 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2366 | |
2367 | /* Output descriptor(s) for union of register spills (if any). */ | |
2368 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2369 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2370 | if (fr_mask) | |
2371 | { | |
2372 | if ((fr_mask & ~0xfUL) == 0) | |
2373 | output_P6_format (f, fr_mem, fr_mask); | |
2374 | else | |
2375 | { | |
2376 | output_P5_format (f, gr_mask, fr_mask); | |
2377 | gr_mask = 0; | |
2378 | } | |
2379 | } | |
2380 | if (gr_mask) | |
2381 | output_P6_format (f, gr_mem, gr_mask); | |
2382 | if (ptr->r.record.r.mask.br_mem) | |
2383 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2384 | ||
2385 | /* output imask descriptor if necessary: */ | |
2386 | if (ptr->r.record.r.mask.i) | |
2387 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2388 | ptr->r.record.r.imask_size); | |
2389 | break; | |
2390 | ||
2391 | case body: | |
2392 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2393 | break; | |
2394 | case mem_stack_f: | |
2395 | case mem_stack_v: | |
2396 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2397 | ptr->r.record.p.size); | |
2398 | break; | |
2399 | case psp_gr: | |
2400 | case rp_gr: | |
2401 | case pfs_gr: | |
2402 | case preds_gr: | |
2403 | case unat_gr: | |
2404 | case lc_gr: | |
2405 | case fpsr_gr: | |
2406 | case priunat_gr: | |
2407 | case bsp_gr: | |
2408 | case bspstore_gr: | |
2409 | case rnat_gr: | |
2410 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2411 | break; | |
2412 | case rp_br: | |
2413 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2414 | break; | |
2415 | case psp_sprel: | |
2416 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2417 | break; | |
2418 | case rp_when: | |
2419 | case pfs_when: | |
2420 | case preds_when: | |
2421 | case unat_when: | |
2422 | case lc_when: | |
2423 | case fpsr_when: | |
2424 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2425 | break; | |
2426 | case rp_psprel: | |
2427 | case pfs_psprel: | |
2428 | case preds_psprel: | |
2429 | case unat_psprel: | |
2430 | case lc_psprel: | |
2431 | case fpsr_psprel: | |
2432 | case spill_base: | |
2433 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2434 | break; | |
2435 | case rp_sprel: | |
2436 | case pfs_sprel: | |
2437 | case preds_sprel: | |
2438 | case unat_sprel: | |
2439 | case lc_sprel: | |
2440 | case fpsr_sprel: | |
2441 | case priunat_sprel: | |
2442 | case bsp_sprel: | |
2443 | case bspstore_sprel: | |
2444 | case rnat_sprel: | |
2445 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2446 | break; | |
2447 | case gr_gr: | |
2448 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2449 | break; | |
2450 | case br_gr: | |
2451 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2452 | break; | |
2453 | case spill_mask: | |
2454 | as_bad ("spill_mask record unimplemented."); | |
2455 | break; | |
2456 | case priunat_when_gr: | |
2457 | case priunat_when_mem: | |
2458 | case bsp_when: | |
2459 | case bspstore_when: | |
2460 | case rnat_when: | |
2461 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2462 | break; | |
2463 | case priunat_psprel: | |
2464 | case bsp_psprel: | |
2465 | case bspstore_psprel: | |
2466 | case rnat_psprel: | |
2467 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2468 | break; | |
2469 | case unwabi: | |
2470 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2471 | break; | |
2472 | case epilogue: | |
2473 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2474 | break; | |
2475 | case label_state: | |
2476 | case copy_state: | |
2477 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2478 | break; | |
2479 | case spill_psprel: | |
2480 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2481 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2482 | ptr->r.record.x.pspoff); | |
2483 | break; | |
2484 | case spill_sprel: | |
2485 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2486 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2487 | ptr->r.record.x.spoff); | |
2488 | break; | |
2489 | case spill_reg: | |
2490 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2491 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2492 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2493 | break; | |
2494 | case spill_psprel_p: | |
2495 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2496 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2497 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2498 | break; | |
2499 | case spill_sprel_p: | |
2500 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2501 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2502 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2503 | break; | |
2504 | case spill_reg_p: | |
2505 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2506 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2507 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2508 | ptr->r.record.x.t); | |
2509 | break; | |
2510 | default: | |
2511 | as_bad ("record_type_not_valid"); | |
2512 | break; | |
800eeca4 JW |
2513 | } |
2514 | } | |
2515 | ||
197865e8 | 2516 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2517 | the specified function. */ |
2518 | static void | |
2519 | process_unw_records (list, f) | |
2520 | unw_rec_list *list; | |
2521 | vbyte_func f; | |
2522 | { | |
2523 | unw_rec_list *ptr; | |
2524 | for (ptr = list; ptr; ptr = ptr->next) | |
2525 | process_one_record (ptr, f); | |
2526 | } | |
2527 | ||
2528 | /* Determine the size of a record list in bytes. */ | |
2529 | static int | |
2530 | calc_record_size (list) | |
2531 | unw_rec_list *list; | |
2532 | { | |
2533 | vbyte_count = 0; | |
2534 | process_unw_records (list, count_output); | |
2535 | return vbyte_count; | |
2536 | } | |
2537 | ||
e0c9811a JW |
2538 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2539 | of type TYPE are saved starting at instruction with index T. If N | |
2540 | bits are set in REGMASK, it is assumed that instructions T through | |
2541 | T+N-1 save these registers. | |
2542 | ||
2543 | TYPE values: | |
2544 | 0: no save | |
2545 | 1: instruction saves next fp reg | |
2546 | 2: instruction saves next general reg | |
2547 | 3: instruction saves next branch reg */ | |
2548 | static void | |
2549 | set_imask (region, regmask, t, type) | |
2550 | unw_rec_list *region; | |
2551 | unsigned long regmask; | |
2552 | unsigned long t; | |
2553 | unsigned int type; | |
2554 | { | |
2555 | unsigned char *imask; | |
2556 | unsigned long imask_size; | |
2557 | unsigned int i; | |
2558 | int pos; | |
2559 | ||
2560 | imask = region->r.record.r.mask.i; | |
2561 | imask_size = region->r.record.r.imask_size; | |
2562 | if (!imask) | |
2563 | { | |
542d6675 | 2564 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2565 | imask = xmalloc (imask_size); |
2566 | memset (imask, 0, imask_size); | |
2567 | ||
2568 | region->r.record.r.imask_size = imask_size; | |
2569 | region->r.record.r.mask.i = imask; | |
2570 | } | |
2571 | ||
542d6675 KH |
2572 | i = (t / 4) + 1; |
2573 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2574 | while (regmask) |
2575 | { | |
2576 | if (i >= imask_size) | |
2577 | { | |
2578 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2579 | return; | |
2580 | } | |
2581 | ||
2582 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2583 | |
e0c9811a JW |
2584 | regmask &= (regmask - 1); |
2585 | pos -= 2; | |
2586 | if (pos < 0) | |
2587 | { | |
2588 | pos = 0; | |
2589 | ++i; | |
2590 | } | |
2591 | } | |
2592 | } | |
2593 | ||
f5a30c2e JW |
2594 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2595 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2596 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2597 | for frag sizes. */ | |
f5a30c2e | 2598 | |
e0c9811a | 2599 | unsigned long |
b5e0fabd | 2600 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2601 | unsigned long slot_addr; |
2602 | fragS *slot_frag; | |
2603 | unsigned long first_addr; | |
2604 | fragS *first_frag; | |
b5e0fabd | 2605 | int before_relax; |
e0c9811a | 2606 | { |
f5a30c2e JW |
2607 | unsigned long index = 0; |
2608 | ||
2609 | /* First time we are called, the initial address and frag are invalid. */ | |
2610 | if (first_addr == 0) | |
2611 | return 0; | |
2612 | ||
2613 | /* If the two addresses are in different frags, then we need to add in | |
2614 | the remaining size of this frag, and then the entire size of intermediate | |
2615 | frags. */ | |
2616 | while (slot_frag != first_frag) | |
2617 | { | |
2618 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2619 | ||
b5e0fabd | 2620 | if (! before_relax) |
73f20958 | 2621 | { |
b5e0fabd JW |
2622 | /* We can get the final addresses only during and after |
2623 | relaxation. */ | |
73f20958 L |
2624 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2625 | index += 3 * ((first_frag->fr_next->fr_address | |
2626 | - first_frag->fr_address | |
2627 | - first_frag->fr_fix) >> 4); | |
2628 | } | |
2629 | else | |
2630 | /* We don't know what the final addresses will be. We try our | |
2631 | best to estimate. */ | |
2632 | switch (first_frag->fr_type) | |
2633 | { | |
2634 | default: | |
2635 | break; | |
2636 | ||
2637 | case rs_space: | |
2638 | as_fatal ("only constant space allocation is supported"); | |
2639 | break; | |
2640 | ||
2641 | case rs_align: | |
2642 | case rs_align_code: | |
2643 | case rs_align_test: | |
2644 | /* Take alignment into account. Assume the worst case | |
2645 | before relaxation. */ | |
2646 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2647 | break; | |
2648 | ||
2649 | case rs_org: | |
2650 | if (first_frag->fr_symbol) | |
2651 | { | |
2652 | as_fatal ("only constant offsets are supported"); | |
2653 | break; | |
2654 | } | |
2655 | case rs_fill: | |
2656 | index += 3 * (first_frag->fr_offset >> 4); | |
2657 | break; | |
2658 | } | |
2659 | ||
f5a30c2e JW |
2660 | /* Add in the full size of the frag converted to instruction slots. */ |
2661 | index += 3 * (first_frag->fr_fix >> 4); | |
2662 | /* Subtract away the initial part before first_addr. */ | |
2663 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2664 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2665 | |
f5a30c2e JW |
2666 | /* Move to the beginning of the next frag. */ |
2667 | first_frag = first_frag->fr_next; | |
2668 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2669 | } | |
2670 | ||
2671 | /* Add in the used part of the last frag. */ | |
2672 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2673 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2674 | return index; | |
2675 | } | |
4a1805b1 | 2676 | |
91a2ae2a RH |
2677 | /* Optimize unwind record directives. */ |
2678 | ||
2679 | static unw_rec_list * | |
2680 | optimize_unw_records (list) | |
2681 | unw_rec_list *list; | |
2682 | { | |
2683 | if (!list) | |
2684 | return NULL; | |
2685 | ||
2686 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2687 | by ".body", then we can optimize the unwind directives away. */ | |
2688 | if (list->r.type == prologue | |
5738bc24 JW |
2689 | && (list->next->r.type == endp |
2690 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2691 | return NULL; |
2692 | ||
2693 | return list; | |
2694 | } | |
2695 | ||
800eeca4 JW |
2696 | /* Given a complete record list, process any records which have |
2697 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2698 | this has been run, all necessary information should be available |
800eeca4 | 2699 | within each record to generate an image. */ |
542d6675 | 2700 | |
800eeca4 | 2701 | static void |
b5e0fabd | 2702 | fixup_unw_records (list, before_relax) |
800eeca4 | 2703 | unw_rec_list *list; |
b5e0fabd | 2704 | int before_relax; |
800eeca4 | 2705 | { |
e0c9811a JW |
2706 | unw_rec_list *ptr, *region = 0; |
2707 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2708 | fragS *first_frag = 0; |
e0c9811a | 2709 | |
800eeca4 JW |
2710 | for (ptr = list; ptr; ptr = ptr->next) |
2711 | { | |
2712 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2713 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2714 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2715 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2716 | switch (ptr->r.type) |
2717 | { | |
542d6675 KH |
2718 | case prologue: |
2719 | case prologue_gr: | |
2720 | case body: | |
2721 | { | |
2722 | unw_rec_list *last; | |
5738bc24 JW |
2723 | int size; |
2724 | unsigned long last_addr = 0; | |
2725 | fragS *last_frag = NULL; | |
542d6675 KH |
2726 | |
2727 | first_addr = ptr->slot_number; | |
f5a30c2e | 2728 | first_frag = ptr->slot_frag; |
542d6675 | 2729 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2730 | the function, and determine the size of the region. */ |
542d6675 KH |
2731 | for (last = ptr->next; last != NULL; last = last->next) |
2732 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2733 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2734 | { |
2735 | last_addr = last->slot_number; | |
f5a30c2e | 2736 | last_frag = last->slot_frag; |
542d6675 KH |
2737 | break; |
2738 | } | |
b5e0fabd JW |
2739 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2740 | before_relax); | |
542d6675 | 2741 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2742 | if (ptr->r.type == body) |
2743 | /* End of region. */ | |
2744 | region = 0; | |
2745 | else | |
2746 | region = ptr; | |
e0c9811a | 2747 | break; |
542d6675 KH |
2748 | } |
2749 | case epilogue: | |
ed7af9f9 L |
2750 | if (t < rlen) |
2751 | ptr->r.record.b.t = rlen - 1 - t; | |
2752 | else | |
2753 | /* This happens when a memory-stack-less procedure uses a | |
2754 | ".restore sp" directive at the end of a region to pop | |
2755 | the frame state. */ | |
2756 | ptr->r.record.b.t = 0; | |
542d6675 | 2757 | break; |
e0c9811a | 2758 | |
542d6675 KH |
2759 | case mem_stack_f: |
2760 | case mem_stack_v: | |
2761 | case rp_when: | |
2762 | case pfs_when: | |
2763 | case preds_when: | |
2764 | case unat_when: | |
2765 | case lc_when: | |
2766 | case fpsr_when: | |
2767 | case priunat_when_gr: | |
2768 | case priunat_when_mem: | |
2769 | case bsp_when: | |
2770 | case bspstore_when: | |
2771 | case rnat_when: | |
2772 | ptr->r.record.p.t = t; | |
2773 | break; | |
e0c9811a | 2774 | |
542d6675 KH |
2775 | case spill_reg: |
2776 | case spill_sprel: | |
2777 | case spill_psprel: | |
2778 | case spill_reg_p: | |
2779 | case spill_sprel_p: | |
2780 | case spill_psprel_p: | |
2781 | ptr->r.record.x.t = t; | |
2782 | break; | |
e0c9811a | 2783 | |
542d6675 KH |
2784 | case frgr_mem: |
2785 | if (!region) | |
2786 | { | |
2787 | as_bad ("frgr_mem record before region record!\n"); | |
2788 | return; | |
2789 | } | |
2790 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2791 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2792 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2793 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2794 | break; | |
2795 | case fr_mem: | |
2796 | if (!region) | |
2797 | { | |
2798 | as_bad ("fr_mem record before region record!\n"); | |
2799 | return; | |
2800 | } | |
2801 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2802 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2803 | break; | |
2804 | case gr_mem: | |
2805 | if (!region) | |
2806 | { | |
2807 | as_bad ("gr_mem record before region record!\n"); | |
2808 | return; | |
2809 | } | |
2810 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2811 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2812 | break; | |
2813 | case br_mem: | |
2814 | if (!region) | |
2815 | { | |
2816 | as_bad ("br_mem record before region record!\n"); | |
2817 | return; | |
2818 | } | |
2819 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2820 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2821 | break; | |
e0c9811a | 2822 | |
542d6675 KH |
2823 | case gr_gr: |
2824 | if (!region) | |
2825 | { | |
2826 | as_bad ("gr_gr record before region record!\n"); | |
2827 | return; | |
2828 | } | |
2829 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2830 | break; | |
2831 | case br_gr: | |
2832 | if (!region) | |
2833 | { | |
2834 | as_bad ("br_gr record before region record!\n"); | |
2835 | return; | |
2836 | } | |
2837 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2838 | break; | |
e0c9811a | 2839 | |
542d6675 KH |
2840 | default: |
2841 | break; | |
800eeca4 JW |
2842 | } |
2843 | } | |
2844 | } | |
2845 | ||
b5e0fabd JW |
2846 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2847 | to handle here, which is the unwind info frag. */ | |
2848 | ||
2849 | int | |
2850 | ia64_estimate_size_before_relax (fragS *frag, | |
2851 | asection *segtype ATTRIBUTE_UNUSED) | |
2852 | { | |
2853 | unw_rec_list *list; | |
2854 | int len, size, pad; | |
2855 | ||
2856 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2857 | list = (unw_rec_list *) frag->fr_opcode; | |
2858 | fixup_unw_records (list, 0); | |
2859 | ||
2860 | len = calc_record_size (list); | |
2861 | /* pad to pointer-size boundary. */ | |
2862 | pad = len % md.pointer_size; | |
2863 | if (pad != 0) | |
2864 | len += md.pointer_size - pad; | |
2865 | /* Add 8 for the header + a pointer for the personality offset. */ | |
2866 | size = len + 8 + md.pointer_size; | |
2867 | ||
2868 | /* fr_var carries the max_chars that we created the fragment with. | |
2869 | We must, of course, have allocated enough memory earlier. */ | |
2870 | assert (frag->fr_var >= size); | |
2871 | ||
2872 | return frag->fr_fix + size; | |
2873 | } | |
2874 | ||
73f20958 L |
2875 | /* This function converts a rs_machine_dependent variant frag into a |
2876 | normal fill frag with the unwind image from the the record list. */ | |
2877 | void | |
2878 | ia64_convert_frag (fragS *frag) | |
557debba | 2879 | { |
73f20958 L |
2880 | unw_rec_list *list; |
2881 | int len, size, pad; | |
1cd8ff38 | 2882 | valueT flag_value; |
557debba | 2883 | |
b5e0fabd | 2884 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2885 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2886 | fixup_unw_records (list, 0); |
1cd8ff38 | 2887 | |
73f20958 L |
2888 | len = calc_record_size (list); |
2889 | /* pad to pointer-size boundary. */ | |
2890 | pad = len % md.pointer_size; | |
2891 | if (pad != 0) | |
2892 | len += md.pointer_size - pad; | |
2893 | /* Add 8 for the header + a pointer for the personality offset. */ | |
2894 | size = len + 8 + md.pointer_size; | |
2895 | ||
2896 | /* fr_var carries the max_chars that we created the fragment with. | |
2897 | We must, of course, have allocated enough memory earlier. */ | |
2898 | assert (frag->fr_var >= size); | |
2899 | ||
2900 | /* Initialize the header area. fr_offset is initialized with | |
2901 | unwind.personality_routine. */ | |
2902 | if (frag->fr_offset) | |
1cd8ff38 NC |
2903 | { |
2904 | if (md.flags & EF_IA_64_ABI64) | |
2905 | flag_value = (bfd_vma) 3 << 32; | |
2906 | else | |
2907 | /* 32-bit unwind info block. */ | |
2908 | flag_value = (bfd_vma) 0x1003 << 32; | |
2909 | } | |
2910 | else | |
2911 | flag_value = 0; | |
557debba | 2912 | |
73f20958 L |
2913 | md_number_to_chars (frag->fr_literal, |
2914 | (((bfd_vma) 1 << 48) /* Version. */ | |
2915 | | flag_value /* U & E handler flags. */ | |
2916 | | (len / md.pointer_size)), /* Length. */ | |
2917 | 8); | |
557debba | 2918 | |
73f20958 L |
2919 | /* Skip the header. */ |
2920 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2921 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2922 | |
2923 | /* Fill the padding bytes with zeros. */ | |
2924 | if (pad != 0) | |
2925 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2926 | md.pointer_size - pad); | |
2927 | ||
73f20958 L |
2928 | frag->fr_fix += size; |
2929 | frag->fr_type = rs_fill; | |
2930 | frag->fr_var = 0; | |
2931 | frag->fr_offset = 0; | |
800eeca4 JW |
2932 | } |
2933 | ||
e0c9811a JW |
2934 | static int |
2935 | convert_expr_to_ab_reg (e, ab, regp) | |
2936 | expressionS *e; | |
2937 | unsigned int *ab; | |
2938 | unsigned int *regp; | |
2939 | { | |
2940 | unsigned int reg; | |
2941 | ||
2942 | if (e->X_op != O_register) | |
2943 | return 0; | |
2944 | ||
2945 | reg = e->X_add_number; | |
2434f565 | 2946 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2947 | { |
2948 | *ab = 0; | |
2949 | *regp = reg - REG_GR; | |
2950 | } | |
2434f565 JW |
2951 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2952 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2953 | { |
2954 | *ab = 1; | |
2955 | *regp = reg - REG_FR; | |
2956 | } | |
2434f565 | 2957 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2958 | { |
2959 | *ab = 2; | |
2960 | *regp = reg - REG_BR; | |
2961 | } | |
2962 | else | |
2963 | { | |
2964 | *ab = 3; | |
2965 | switch (reg) | |
2966 | { | |
2967 | case REG_PR: *regp = 0; break; | |
2968 | case REG_PSP: *regp = 1; break; | |
2969 | case REG_PRIUNAT: *regp = 2; break; | |
2970 | case REG_BR + 0: *regp = 3; break; | |
2971 | case REG_AR + AR_BSP: *regp = 4; break; | |
2972 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2973 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2974 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2975 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2976 | case REG_AR + AR_PFS: *regp = 9; break; | |
2977 | case REG_AR + AR_LC: *regp = 10; break; | |
2978 | ||
2979 | default: | |
2980 | return 0; | |
2981 | } | |
2982 | } | |
2983 | return 1; | |
197865e8 | 2984 | } |
e0c9811a JW |
2985 | |
2986 | static int | |
2987 | convert_expr_to_xy_reg (e, xy, regp) | |
2988 | expressionS *e; | |
2989 | unsigned int *xy; | |
2990 | unsigned int *regp; | |
2991 | { | |
2992 | unsigned int reg; | |
2993 | ||
2994 | if (e->X_op != O_register) | |
2995 | return 0; | |
2996 | ||
2997 | reg = e->X_add_number; | |
2998 | ||
2434f565 | 2999 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
3000 | { |
3001 | *xy = 0; | |
3002 | *regp = reg - REG_GR; | |
3003 | } | |
2434f565 | 3004 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
3005 | { |
3006 | *xy = 1; | |
3007 | *regp = reg - REG_FR; | |
3008 | } | |
2434f565 | 3009 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3010 | { |
3011 | *xy = 2; | |
3012 | *regp = reg - REG_BR; | |
3013 | } | |
3014 | else | |
3015 | return -1; | |
3016 | return 1; | |
197865e8 | 3017 | } |
e0c9811a | 3018 | |
d9201763 L |
3019 | static void |
3020 | dot_align (int arg) | |
3021 | { | |
3022 | /* The current frag is an alignment frag. */ | |
3023 | align_frag = frag_now; | |
3024 | s_align_bytes (arg); | |
3025 | } | |
3026 | ||
800eeca4 JW |
3027 | static void |
3028 | dot_radix (dummy) | |
2434f565 | 3029 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3030 | { |
3031 | int radix; | |
3032 | ||
3033 | SKIP_WHITESPACE (); | |
3034 | radix = *input_line_pointer++; | |
3035 | ||
3036 | if (radix != 'C' && !is_end_of_line[(unsigned char) radix]) | |
3037 | { | |
3038 | as_bad ("Radix `%c' unsupported", *input_line_pointer); | |
542d6675 | 3039 | ignore_rest_of_line (); |
800eeca4 JW |
3040 | return; |
3041 | } | |
3042 | } | |
3043 | ||
3044 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ | |
3045 | static void | |
3046 | dot_special_section (which) | |
3047 | int which; | |
3048 | { | |
3049 | set_section ((char *) special_section_name[which]); | |
3050 | } | |
3051 | ||
3052 | static void | |
3053 | add_unwind_entry (ptr) | |
3054 | unw_rec_list *ptr; | |
3055 | { | |
e0c9811a JW |
3056 | if (unwind.tail) |
3057 | unwind.tail->next = ptr; | |
800eeca4 | 3058 | else |
e0c9811a JW |
3059 | unwind.list = ptr; |
3060 | unwind.tail = ptr; | |
800eeca4 JW |
3061 | |
3062 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3063 | if (unwind.current_entry == NULL) |
3064 | unwind.current_entry = ptr; | |
800eeca4 JW |
3065 | } |
3066 | ||
197865e8 | 3067 | static void |
800eeca4 | 3068 | dot_fframe (dummy) |
2434f565 | 3069 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3070 | { |
3071 | expressionS e; | |
e0c9811a | 3072 | |
800eeca4 | 3073 | parse_operand (&e); |
197865e8 | 3074 | |
800eeca4 JW |
3075 | if (e.X_op != O_constant) |
3076 | as_bad ("Operand to .fframe must be a constant"); | |
3077 | else | |
e0c9811a JW |
3078 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3079 | } | |
3080 | ||
197865e8 | 3081 | static void |
e0c9811a | 3082 | dot_vframe (dummy) |
2434f565 | 3083 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3084 | { |
3085 | expressionS e; | |
3086 | unsigned reg; | |
3087 | ||
3088 | parse_operand (&e); | |
3089 | reg = e.X_add_number - REG_GR; | |
3090 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3091 | { |
e0c9811a | 3092 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3093 | if (! (unwind.prologue_mask & 2)) |
3094 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3095 | } |
e0c9811a JW |
3096 | else |
3097 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3098 | } |
3099 | ||
197865e8 | 3100 | static void |
e0c9811a | 3101 | dot_vframesp (dummy) |
2434f565 | 3102 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3103 | { |
e0c9811a JW |
3104 | expressionS e; |
3105 | ||
3106 | parse_operand (&e); | |
3107 | if (e.X_op == O_constant) | |
3108 | { | |
3109 | add_unwind_entry (output_mem_stack_v ()); | |
3110 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3111 | } | |
3112 | else | |
69906a9b | 3113 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3114 | } |
3115 | ||
197865e8 | 3116 | static void |
e0c9811a | 3117 | dot_vframepsp (dummy) |
2434f565 | 3118 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3119 | { |
3120 | expressionS e; | |
3121 | ||
3122 | parse_operand (&e); | |
3123 | if (e.X_op == O_constant) | |
3124 | { | |
3125 | add_unwind_entry (output_mem_stack_v ()); | |
3126 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3127 | } | |
3128 | else | |
69906a9b | 3129 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3130 | } |
3131 | ||
197865e8 | 3132 | static void |
800eeca4 | 3133 | dot_save (dummy) |
2434f565 | 3134 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3135 | { |
3136 | expressionS e1, e2; | |
3137 | int sep; | |
3138 | int reg1, reg2; | |
3139 | ||
3140 | sep = parse_operand (&e1); | |
3141 | if (sep != ',') | |
3142 | as_bad ("No second operand to .save"); | |
3143 | sep = parse_operand (&e2); | |
3144 | ||
e0c9811a | 3145 | reg1 = e1.X_add_number; |
800eeca4 | 3146 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3147 | |
800eeca4 | 3148 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3149 | if (e1.X_op == O_register) |
800eeca4 | 3150 | { |
542d6675 | 3151 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3152 | { |
3153 | switch (reg1) | |
3154 | { | |
542d6675 KH |
3155 | case REG_AR + AR_BSP: |
3156 | add_unwind_entry (output_bsp_when ()); | |
3157 | add_unwind_entry (output_bsp_gr (reg2)); | |
3158 | break; | |
3159 | case REG_AR + AR_BSPSTORE: | |
3160 | add_unwind_entry (output_bspstore_when ()); | |
3161 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3162 | break; | |
3163 | case REG_AR + AR_RNAT: | |
3164 | add_unwind_entry (output_rnat_when ()); | |
3165 | add_unwind_entry (output_rnat_gr (reg2)); | |
3166 | break; | |
3167 | case REG_AR + AR_UNAT: | |
3168 | add_unwind_entry (output_unat_when ()); | |
3169 | add_unwind_entry (output_unat_gr (reg2)); | |
3170 | break; | |
3171 | case REG_AR + AR_FPSR: | |
3172 | add_unwind_entry (output_fpsr_when ()); | |
3173 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3174 | break; | |
3175 | case REG_AR + AR_PFS: | |
3176 | add_unwind_entry (output_pfs_when ()); | |
3177 | if (! (unwind.prologue_mask & 4)) | |
3178 | add_unwind_entry (output_pfs_gr (reg2)); | |
3179 | break; | |
3180 | case REG_AR + AR_LC: | |
3181 | add_unwind_entry (output_lc_when ()); | |
3182 | add_unwind_entry (output_lc_gr (reg2)); | |
3183 | break; | |
3184 | case REG_BR: | |
3185 | add_unwind_entry (output_rp_when ()); | |
3186 | if (! (unwind.prologue_mask & 8)) | |
3187 | add_unwind_entry (output_rp_gr (reg2)); | |
3188 | break; | |
3189 | case REG_PR: | |
3190 | add_unwind_entry (output_preds_when ()); | |
3191 | if (! (unwind.prologue_mask & 1)) | |
3192 | add_unwind_entry (output_preds_gr (reg2)); | |
3193 | break; | |
3194 | case REG_PRIUNAT: | |
3195 | add_unwind_entry (output_priunat_when_gr ()); | |
3196 | add_unwind_entry (output_priunat_gr (reg2)); | |
3197 | break; | |
3198 | default: | |
3199 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3200 | } |
3201 | } | |
3202 | else | |
3203 | as_bad (" Second operand not a valid register"); | |
3204 | } | |
3205 | else | |
e0c9811a | 3206 | as_bad ("First operand not a register"); |
800eeca4 JW |
3207 | } |
3208 | ||
197865e8 | 3209 | static void |
800eeca4 | 3210 | dot_restore (dummy) |
2434f565 | 3211 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3212 | { |
e0c9811a | 3213 | expressionS e1, e2; |
33d01f33 | 3214 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3215 | int sep; |
3216 | ||
3217 | sep = parse_operand (&e1); | |
3218 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3219 | { | |
3220 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3221 | return; | |
3222 | } | |
3223 | ||
3224 | if (sep == ',') | |
3225 | { | |
3226 | parse_operand (&e2); | |
33d01f33 | 3227 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3228 | { |
33d01f33 | 3229 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3230 | return; |
3231 | } | |
33d01f33 | 3232 | ecount = e2.X_add_number; |
e0c9811a | 3233 | } |
33d01f33 JW |
3234 | else |
3235 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3236 | |
3237 | if (ecount >= unwind.prologue_count) | |
3238 | { | |
3239 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3240 | ecount + 1, unwind.prologue_count); | |
3241 | return; | |
3242 | } | |
3243 | ||
e0c9811a | 3244 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3245 | |
3246 | if (ecount < unwind.prologue_count) | |
3247 | unwind.prologue_count -= ecount + 1; | |
3248 | else | |
3249 | unwind.prologue_count = 0; | |
e0c9811a JW |
3250 | } |
3251 | ||
197865e8 | 3252 | static void |
e0c9811a | 3253 | dot_restorereg (dummy) |
2434f565 | 3254 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3255 | { |
3256 | unsigned int ab, reg; | |
3257 | expressionS e; | |
3258 | ||
3259 | parse_operand (&e); | |
3260 | ||
3261 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3262 | { | |
3263 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3264 | return; | |
3265 | } | |
3266 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3267 | } | |
3268 | ||
197865e8 | 3269 | static void |
e0c9811a | 3270 | dot_restorereg_p (dummy) |
2434f565 | 3271 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3272 | { |
3273 | unsigned int qp, ab, reg; | |
3274 | expressionS e1, e2; | |
3275 | int sep; | |
3276 | ||
3277 | sep = parse_operand (&e1); | |
3278 | if (sep != ',') | |
3279 | { | |
3280 | as_bad ("No second operand to .restorereg.p"); | |
3281 | return; | |
3282 | } | |
3283 | ||
3284 | parse_operand (&e2); | |
3285 | ||
3286 | qp = e1.X_add_number - REG_P; | |
3287 | if (e1.X_op != O_register || qp > 63) | |
3288 | { | |
3289 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3290 | return; | |
3291 | } | |
3292 | ||
3293 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3294 | { | |
3295 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3296 | return; | |
3297 | } | |
3298 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3299 | } |
3300 | ||
2d6ed997 L |
3301 | static char *special_linkonce_name[] = |
3302 | { | |
3303 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3304 | }; | |
3305 | ||
3306 | static void | |
d6afba4b | 3307 | start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty) |
2d6ed997 L |
3308 | { |
3309 | /* | |
3310 | Use a slightly ugly scheme to derive the unwind section names from | |
3311 | the text section name: | |
3312 | ||
3313 | text sect. unwind table sect. | |
3314 | name: name: comments: | |
3315 | ---------- ----------------- -------------------------------- | |
3316 | .text .IA_64.unwind | |
3317 | .text.foo .IA_64.unwind.text.foo | |
3318 | .foo .IA_64.unwind.foo | |
3319 | .gnu.linkonce.t.foo | |
3320 | .gnu.linkonce.ia64unw.foo | |
3321 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3322 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3323 | ||
3324 | This mapping is done so that: | |
3325 | ||
3326 | (a) An object file with unwind info only in .text will use | |
3327 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3328 | This follows the letter of the ABI and also ensures backwards | |
3329 | compatibility with older toolchains. | |
3330 | ||
3331 | (b) An object file with unwind info in multiple text sections | |
3332 | will use separate unwind sections for each text section. | |
3333 | This allows us to properly set the "sh_info" and "sh_link" | |
3334 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3335 | lets GNU ld support programs with multiple segments | |
3336 | containing unwind info (as might be the case for certain | |
3337 | embedded applications). | |
3338 | ||
3339 | (c) An error is issued if there would be a name clash. | |
3340 | */ | |
3341 | ||
3342 | const char *text_name, *sec_text_name; | |
3343 | char *sec_name; | |
3344 | const char *prefix = special_section_name [sec_index]; | |
3345 | const char *suffix; | |
3346 | size_t prefix_len, suffix_len, sec_name_len; | |
3347 | ||
3348 | sec_text_name = segment_name (text_seg); | |
3349 | text_name = sec_text_name; | |
3350 | if (strncmp (text_name, "_info", 5) == 0) | |
3351 | { | |
3352 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3353 | text_name); | |
3354 | ignore_rest_of_line (); | |
3355 | return; | |
3356 | } | |
3357 | if (strcmp (text_name, ".text") == 0) | |
3358 | text_name = ""; | |
3359 | ||
3360 | /* Build the unwind section name by appending the (possibly stripped) | |
3361 | text section name to the unwind prefix. */ | |
3362 | suffix = text_name; | |
3363 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3364 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3365 | { | |
3366 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3367 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3368 | } | |
d6afba4b JJ |
3369 | else if (linkonce_empty) |
3370 | return; | |
2d6ed997 L |
3371 | |
3372 | prefix_len = strlen (prefix); | |
3373 | suffix_len = strlen (suffix); | |
3374 | sec_name_len = prefix_len + suffix_len; | |
3375 | sec_name = alloca (sec_name_len + 1); | |
3376 | memcpy (sec_name, prefix, prefix_len); | |
3377 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3378 | sec_name [sec_name_len] = '\0'; | |
3379 | ||
3380 | /* Handle COMDAT group. */ | |
3381 | if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0) | |
3382 | { | |
3383 | char *section; | |
3384 | size_t len, group_name_len; | |
3385 | const char *group_name = elf_group_name (text_seg); | |
3386 | ||
3387 | if (group_name == NULL) | |
3388 | { | |
3389 | as_bad ("Group section `%s' has no group signature", | |
3390 | sec_text_name); | |
3391 | ignore_rest_of_line (); | |
3392 | return; | |
3393 | } | |
3394 | /* We have to construct a fake section directive. */ | |
3395 | group_name_len = strlen (group_name); | |
3396 | len = (sec_name_len | |
3397 | + 16 /* ,"aG",@progbits, */ | |
3398 | + group_name_len /* ,group_name */ | |
3399 | + 7); /* ,comdat */ | |
3400 | ||
3401 | section = alloca (len + 1); | |
3402 | memcpy (section, sec_name, sec_name_len); | |
3403 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3404 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3405 | memcpy (section + len - 7, ",comdat", 7); | |
3406 | section [len] = '\0'; | |
3407 | set_section (section); | |
3408 | } | |
3409 | else | |
3410 | { | |
3411 | set_section (sec_name); | |
3412 | bfd_set_section_flags (stdoutput, now_seg, | |
3413 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3414 | } | |
38ce5b11 L |
3415 | |
3416 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3417 | } |
3418 | ||
73f20958 | 3419 | static void |
2d6ed997 | 3420 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3421 | { |
73f20958 L |
3422 | int size, pad; |
3423 | unw_rec_list *list; | |
800eeca4 | 3424 | |
c97b7ef6 JW |
3425 | /* Mark the end of the unwind info, so that we can compute the size of the |
3426 | last unwind region. */ | |
3427 | add_unwind_entry (output_endp ()); | |
3428 | ||
10850f29 JW |
3429 | /* Force out pending instructions, to make sure all unwind records have |
3430 | a valid slot_number field. */ | |
3431 | ia64_flush_insns (); | |
3432 | ||
800eeca4 | 3433 | /* Generate the unwind record. */ |
73f20958 | 3434 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3435 | fixup_unw_records (list, 1); |
73f20958 L |
3436 | size = calc_record_size (list); |
3437 | ||
3438 | if (size > 0 || unwind.force_unwind_entry) | |
3439 | { | |
3440 | unwind.force_unwind_entry = 0; | |
3441 | /* pad to pointer-size boundary. */ | |
3442 | pad = size % md.pointer_size; | |
3443 | if (pad != 0) | |
3444 | size += md.pointer_size - pad; | |
3445 | /* Add 8 for the header + a pointer for the personality | |
3446 | offset. */ | |
3447 | size += 8 + md.pointer_size; | |
3448 | } | |
6290819d | 3449 | |
800eeca4 JW |
3450 | /* If there are unwind records, switch sections, and output the info. */ |
3451 | if (size != 0) | |
3452 | { | |
800eeca4 | 3453 | expressionS exp; |
1cd8ff38 | 3454 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3455 | |
d6afba4b | 3456 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0); |
800eeca4 | 3457 | |
557debba JW |
3458 | /* Make sure the section has 4 byte alignment for ILP32 and |
3459 | 8 byte alignment for LP64. */ | |
3460 | frag_align (md.pointer_size_shift, 0, 0); | |
3461 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3462 | |
800eeca4 | 3463 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3464 | unwind.info = expr_build_dot (); |
73f20958 L |
3465 | |
3466 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3467 | (offsetT) (long) unwind.personality_routine, |
3468 | (char *) list); | |
91a2ae2a | 3469 | |
800eeca4 | 3470 | /* Add the personality address to the image. */ |
e0c9811a | 3471 | if (unwind.personality_routine != 0) |
542d6675 | 3472 | { |
40449e9f | 3473 | exp.X_op = O_symbol; |
e0c9811a | 3474 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3475 | exp.X_add_number = 0; |
1cd8ff38 NC |
3476 | |
3477 | if (md.flags & EF_IA_64_BE) | |
3478 | { | |
3479 | if (md.flags & EF_IA_64_ABI64) | |
3480 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3481 | else | |
3482 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3483 | } | |
40449e9f | 3484 | else |
1cd8ff38 NC |
3485 | { |
3486 | if (md.flags & EF_IA_64_ABI64) | |
3487 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3488 | else | |
3489 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3490 | } | |
3491 | ||
3492 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3493 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3494 | unwind.personality_routine = 0; |
542d6675 | 3495 | } |
800eeca4 | 3496 | } |
d6afba4b JJ |
3497 | else |
3498 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1); | |
800eeca4 | 3499 | |
6290819d | 3500 | free_saved_prologue_counts (); |
e0c9811a | 3501 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3502 | } |
3503 | ||
197865e8 | 3504 | static void |
542d6675 | 3505 | dot_handlerdata (dummy) |
2434f565 | 3506 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3507 | { |
91a2ae2a RH |
3508 | unwind.force_unwind_entry = 1; |
3509 | ||
3510 | /* Remember which segment we're in so we can switch back after .endp */ | |
3511 | unwind.saved_text_seg = now_seg; | |
3512 | unwind.saved_text_subseg = now_subseg; | |
3513 | ||
3514 | /* Generate unwind info into unwind-info section and then leave that | |
3515 | section as the currently active one so dataXX directives go into | |
3516 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3517 | generate_unwind_image (now_seg); |
e0c9811a | 3518 | demand_empty_rest_of_line (); |
800eeca4 JW |
3519 | } |
3520 | ||
197865e8 | 3521 | static void |
800eeca4 | 3522 | dot_unwentry (dummy) |
2434f565 | 3523 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3524 | { |
91a2ae2a | 3525 | unwind.force_unwind_entry = 1; |
e0c9811a | 3526 | demand_empty_rest_of_line (); |
800eeca4 JW |
3527 | } |
3528 | ||
197865e8 | 3529 | static void |
800eeca4 | 3530 | dot_altrp (dummy) |
2434f565 | 3531 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3532 | { |
e0c9811a JW |
3533 | expressionS e; |
3534 | unsigned reg; | |
3535 | ||
3536 | parse_operand (&e); | |
3537 | reg = e.X_add_number - REG_BR; | |
3538 | if (e.X_op == O_register && reg < 8) | |
3539 | add_unwind_entry (output_rp_br (reg)); | |
3540 | else | |
3541 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3542 | } |
3543 | ||
197865e8 | 3544 | static void |
e0c9811a JW |
3545 | dot_savemem (psprel) |
3546 | int psprel; | |
800eeca4 JW |
3547 | { |
3548 | expressionS e1, e2; | |
3549 | int sep; | |
3550 | int reg1, val; | |
3551 | ||
3552 | sep = parse_operand (&e1); | |
3553 | if (sep != ',') | |
e0c9811a | 3554 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3555 | sep = parse_operand (&e2); |
3556 | ||
e0c9811a | 3557 | reg1 = e1.X_add_number; |
800eeca4 | 3558 | val = e2.X_add_number; |
197865e8 | 3559 | |
800eeca4 | 3560 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3561 | if (e1.X_op == O_register) |
800eeca4 JW |
3562 | { |
3563 | if (e2.X_op == O_constant) | |
3564 | { | |
3565 | switch (reg1) | |
3566 | { | |
542d6675 KH |
3567 | case REG_AR + AR_BSP: |
3568 | add_unwind_entry (output_bsp_when ()); | |
3569 | add_unwind_entry ((psprel | |
3570 | ? output_bsp_psprel | |
3571 | : output_bsp_sprel) (val)); | |
3572 | break; | |
3573 | case REG_AR + AR_BSPSTORE: | |
3574 | add_unwind_entry (output_bspstore_when ()); | |
3575 | add_unwind_entry ((psprel | |
3576 | ? output_bspstore_psprel | |
3577 | : output_bspstore_sprel) (val)); | |
3578 | break; | |
3579 | case REG_AR + AR_RNAT: | |
3580 | add_unwind_entry (output_rnat_when ()); | |
3581 | add_unwind_entry ((psprel | |
3582 | ? output_rnat_psprel | |
3583 | : output_rnat_sprel) (val)); | |
3584 | break; | |
3585 | case REG_AR + AR_UNAT: | |
3586 | add_unwind_entry (output_unat_when ()); | |
3587 | add_unwind_entry ((psprel | |
3588 | ? output_unat_psprel | |
3589 | : output_unat_sprel) (val)); | |
3590 | break; | |
3591 | case REG_AR + AR_FPSR: | |
3592 | add_unwind_entry (output_fpsr_when ()); | |
3593 | add_unwind_entry ((psprel | |
3594 | ? output_fpsr_psprel | |
3595 | : output_fpsr_sprel) (val)); | |
3596 | break; | |
3597 | case REG_AR + AR_PFS: | |
3598 | add_unwind_entry (output_pfs_when ()); | |
3599 | add_unwind_entry ((psprel | |
3600 | ? output_pfs_psprel | |
3601 | : output_pfs_sprel) (val)); | |
3602 | break; | |
3603 | case REG_AR + AR_LC: | |
3604 | add_unwind_entry (output_lc_when ()); | |
3605 | add_unwind_entry ((psprel | |
3606 | ? output_lc_psprel | |
3607 | : output_lc_sprel) (val)); | |
3608 | break; | |
3609 | case REG_BR: | |
3610 | add_unwind_entry (output_rp_when ()); | |
3611 | add_unwind_entry ((psprel | |
3612 | ? output_rp_psprel | |
3613 | : output_rp_sprel) (val)); | |
3614 | break; | |
3615 | case REG_PR: | |
3616 | add_unwind_entry (output_preds_when ()); | |
3617 | add_unwind_entry ((psprel | |
3618 | ? output_preds_psprel | |
3619 | : output_preds_sprel) (val)); | |
3620 | break; | |
3621 | case REG_PRIUNAT: | |
3622 | add_unwind_entry (output_priunat_when_mem ()); | |
3623 | add_unwind_entry ((psprel | |
3624 | ? output_priunat_psprel | |
3625 | : output_priunat_sprel) (val)); | |
3626 | break; | |
3627 | default: | |
3628 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3629 | } |
3630 | } | |
3631 | else | |
3632 | as_bad (" Second operand not a valid constant"); | |
3633 | } | |
3634 | else | |
e0c9811a | 3635 | as_bad ("First operand not a register"); |
800eeca4 JW |
3636 | } |
3637 | ||
197865e8 | 3638 | static void |
800eeca4 | 3639 | dot_saveg (dummy) |
2434f565 | 3640 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3641 | { |
3642 | expressionS e1, e2; | |
3643 | int sep; | |
3644 | sep = parse_operand (&e1); | |
3645 | if (sep == ',') | |
3646 | parse_operand (&e2); | |
197865e8 | 3647 | |
800eeca4 JW |
3648 | if (e1.X_op != O_constant) |
3649 | as_bad ("First operand to .save.g must be a constant."); | |
3650 | else | |
3651 | { | |
3652 | int grmask = e1.X_add_number; | |
3653 | if (sep != ',') | |
3654 | add_unwind_entry (output_gr_mem (grmask)); | |
3655 | else | |
542d6675 | 3656 | { |
800eeca4 | 3657 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3658 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3659 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3660 | else | |
3661 | as_bad ("Second operand is an invalid register."); | |
3662 | } | |
3663 | } | |
3664 | } | |
3665 | ||
197865e8 | 3666 | static void |
800eeca4 | 3667 | dot_savef (dummy) |
2434f565 | 3668 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3669 | { |
e0c9811a | 3670 | expressionS e1; |
800eeca4 JW |
3671 | int sep; |
3672 | sep = parse_operand (&e1); | |
197865e8 | 3673 | |
800eeca4 JW |
3674 | if (e1.X_op != O_constant) |
3675 | as_bad ("Operand to .save.f must be a constant."); | |
3676 | else | |
e0c9811a | 3677 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3678 | } |
3679 | ||
197865e8 | 3680 | static void |
800eeca4 | 3681 | dot_saveb (dummy) |
2434f565 | 3682 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3683 | { |
e0c9811a JW |
3684 | expressionS e1, e2; |
3685 | unsigned int reg; | |
3686 | unsigned char sep; | |
3687 | int brmask; | |
3688 | ||
800eeca4 | 3689 | sep = parse_operand (&e1); |
800eeca4 | 3690 | if (e1.X_op != O_constant) |
800eeca4 | 3691 | { |
e0c9811a JW |
3692 | as_bad ("First operand to .save.b must be a constant."); |
3693 | return; | |
800eeca4 | 3694 | } |
e0c9811a JW |
3695 | brmask = e1.X_add_number; |
3696 | ||
3697 | if (sep == ',') | |
3698 | { | |
3699 | sep = parse_operand (&e2); | |
3700 | reg = e2.X_add_number - REG_GR; | |
3701 | if (e2.X_op != O_register || reg > 127) | |
3702 | { | |
3703 | as_bad ("Second operand to .save.b must be a general register."); | |
3704 | return; | |
3705 | } | |
3706 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3707 | } | |
3708 | else | |
3709 | add_unwind_entry (output_br_mem (brmask)); | |
3710 | ||
3711 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3712 | demand_empty_rest_of_line (); |
800eeca4 JW |
3713 | } |
3714 | ||
197865e8 | 3715 | static void |
800eeca4 | 3716 | dot_savegf (dummy) |
2434f565 | 3717 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3718 | { |
3719 | expressionS e1, e2; | |
3720 | int sep; | |
3721 | sep = parse_operand (&e1); | |
3722 | if (sep == ',') | |
3723 | parse_operand (&e2); | |
197865e8 | 3724 | |
800eeca4 JW |
3725 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3726 | as_bad ("Both operands of .save.gf must be constants."); | |
3727 | else | |
3728 | { | |
3729 | int grmask = e1.X_add_number; | |
3730 | int frmask = e2.X_add_number; | |
3731 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3732 | } | |
3733 | } | |
3734 | ||
197865e8 | 3735 | static void |
800eeca4 | 3736 | dot_spill (dummy) |
2434f565 | 3737 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3738 | { |
3739 | expressionS e; | |
e0c9811a JW |
3740 | unsigned char sep; |
3741 | ||
3742 | sep = parse_operand (&e); | |
3743 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3744 | demand_empty_rest_of_line (); |
197865e8 | 3745 | |
800eeca4 JW |
3746 | if (e.X_op != O_constant) |
3747 | as_bad ("Operand to .spill must be a constant"); | |
3748 | else | |
e0c9811a JW |
3749 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3750 | } | |
3751 | ||
3752 | static void | |
3753 | dot_spillreg (dummy) | |
2434f565 | 3754 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3755 | { |
3756 | int sep, ab, xy, reg, treg; | |
3757 | expressionS e1, e2; | |
3758 | ||
3759 | sep = parse_operand (&e1); | |
3760 | if (sep != ',') | |
3761 | { | |
3762 | as_bad ("No second operand to .spillreg"); | |
3763 | return; | |
3764 | } | |
3765 | ||
3766 | parse_operand (&e2); | |
3767 | ||
3768 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3769 | { |
e0c9811a JW |
3770 | as_bad ("First operand to .spillreg must be a preserved register"); |
3771 | return; | |
800eeca4 | 3772 | } |
e0c9811a JW |
3773 | |
3774 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3775 | { | |
3776 | as_bad ("Second operand to .spillreg must be a register"); | |
3777 | return; | |
3778 | } | |
3779 | ||
3780 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3781 | } | |
3782 | ||
3783 | static void | |
3784 | dot_spillmem (psprel) | |
3785 | int psprel; | |
3786 | { | |
3787 | expressionS e1, e2; | |
3788 | int sep, ab, reg; | |
3789 | ||
3790 | sep = parse_operand (&e1); | |
3791 | if (sep != ',') | |
3792 | { | |
3793 | as_bad ("Second operand missing"); | |
3794 | return; | |
3795 | } | |
3796 | ||
3797 | parse_operand (&e2); | |
3798 | ||
3799 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3800 | { | |
3801 | as_bad ("First operand to .spill%s must be a preserved register", | |
3802 | psprel ? "psp" : "sp"); | |
3803 | return; | |
3804 | } | |
3805 | ||
3806 | if (e2.X_op != O_constant) | |
3807 | { | |
3808 | as_bad ("Second operand to .spill%s must be a constant", | |
3809 | psprel ? "psp" : "sp"); | |
3810 | return; | |
3811 | } | |
3812 | ||
3813 | if (psprel) | |
3814 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
3815 | else | |
3816 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
3817 | } | |
3818 | ||
3819 | static void | |
3820 | dot_spillreg_p (dummy) | |
2434f565 | 3821 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3822 | { |
3823 | int sep, ab, xy, reg, treg; | |
3824 | expressionS e1, e2, e3; | |
3825 | unsigned int qp; | |
3826 | ||
3827 | sep = parse_operand (&e1); | |
3828 | if (sep != ',') | |
3829 | { | |
3830 | as_bad ("No second and third operand to .spillreg.p"); | |
3831 | return; | |
3832 | } | |
3833 | ||
3834 | sep = parse_operand (&e2); | |
3835 | if (sep != ',') | |
3836 | { | |
3837 | as_bad ("No third operand to .spillreg.p"); | |
3838 | return; | |
3839 | } | |
3840 | ||
3841 | parse_operand (&e3); | |
3842 | ||
3843 | qp = e1.X_add_number - REG_P; | |
3844 | ||
3845 | if (e1.X_op != O_register || qp > 63) | |
3846 | { | |
3847 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
3848 | return; | |
3849 | } | |
3850 | ||
3851 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3852 | { | |
3853 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
3854 | return; | |
3855 | } | |
3856 | ||
3857 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
3858 | { | |
3859 | as_bad ("Third operand to .spillreg.p must be a register"); | |
3860 | return; | |
3861 | } | |
3862 | ||
3863 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
3864 | } | |
3865 | ||
3866 | static void | |
3867 | dot_spillmem_p (psprel) | |
3868 | int psprel; | |
3869 | { | |
3870 | expressionS e1, e2, e3; | |
3871 | int sep, ab, reg; | |
3872 | unsigned int qp; | |
3873 | ||
3874 | sep = parse_operand (&e1); | |
3875 | if (sep != ',') | |
3876 | { | |
3877 | as_bad ("Second operand missing"); | |
3878 | return; | |
3879 | } | |
3880 | ||
3881 | parse_operand (&e2); | |
3882 | if (sep != ',') | |
3883 | { | |
3884 | as_bad ("Second operand missing"); | |
3885 | return; | |
3886 | } | |
3887 | ||
3888 | parse_operand (&e3); | |
3889 | ||
3890 | qp = e1.X_add_number - REG_P; | |
3891 | if (e1.X_op != O_register || qp > 63) | |
3892 | { | |
3893 | as_bad ("First operand to .spill%s_p must be a predicate", | |
3894 | psprel ? "psp" : "sp"); | |
3895 | return; | |
3896 | } | |
3897 | ||
3898 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3899 | { | |
3900 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
3901 | psprel ? "psp" : "sp"); | |
3902 | return; | |
3903 | } | |
3904 | ||
3905 | if (e3.X_op != O_constant) | |
3906 | { | |
3907 | as_bad ("Third operand to .spill%s_p must be a constant", | |
3908 | psprel ? "psp" : "sp"); | |
3909 | return; | |
3910 | } | |
3911 | ||
3912 | if (psprel) | |
fa7fda74 | 3913 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 3914 | else |
fa7fda74 | 3915 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
3916 | } |
3917 | ||
6290819d NC |
3918 | static unsigned int |
3919 | get_saved_prologue_count (lbl) | |
3920 | unsigned long lbl; | |
3921 | { | |
3922 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3923 | ||
3924 | while (lpc != NULL && lpc->label_number != lbl) | |
3925 | lpc = lpc->next; | |
3926 | ||
3927 | if (lpc != NULL) | |
3928 | return lpc->prologue_count; | |
3929 | ||
3930 | as_bad ("Missing .label_state %ld", lbl); | |
3931 | return 1; | |
3932 | } | |
3933 | ||
3934 | static void | |
3935 | save_prologue_count (lbl, count) | |
3936 | unsigned long lbl; | |
3937 | unsigned int count; | |
3938 | { | |
3939 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3940 | ||
3941 | while (lpc != NULL && lpc->label_number != lbl) | |
3942 | lpc = lpc->next; | |
3943 | ||
3944 | if (lpc != NULL) | |
3945 | lpc->prologue_count = count; | |
3946 | else | |
3947 | { | |
40449e9f | 3948 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
3949 | |
3950 | new_lpc->next = unwind.saved_prologue_counts; | |
3951 | new_lpc->label_number = lbl; | |
3952 | new_lpc->prologue_count = count; | |
3953 | unwind.saved_prologue_counts = new_lpc; | |
3954 | } | |
3955 | } | |
3956 | ||
3957 | static void | |
3958 | free_saved_prologue_counts () | |
3959 | { | |
40449e9f KH |
3960 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
3961 | label_prologue_count *next; | |
6290819d NC |
3962 | |
3963 | while (lpc != NULL) | |
3964 | { | |
3965 | next = lpc->next; | |
3966 | free (lpc); | |
3967 | lpc = next; | |
3968 | } | |
3969 | ||
3970 | unwind.saved_prologue_counts = NULL; | |
3971 | } | |
3972 | ||
e0c9811a JW |
3973 | static void |
3974 | dot_label_state (dummy) | |
2434f565 | 3975 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3976 | { |
3977 | expressionS e; | |
3978 | ||
3979 | parse_operand (&e); | |
3980 | if (e.X_op != O_constant) | |
3981 | { | |
3982 | as_bad ("Operand to .label_state must be a constant"); | |
3983 | return; | |
3984 | } | |
3985 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 3986 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
3987 | } |
3988 | ||
3989 | static void | |
3990 | dot_copy_state (dummy) | |
2434f565 | 3991 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3992 | { |
3993 | expressionS e; | |
3994 | ||
3995 | parse_operand (&e); | |
3996 | if (e.X_op != O_constant) | |
3997 | { | |
3998 | as_bad ("Operand to .copy_state must be a constant"); | |
3999 | return; | |
4000 | } | |
4001 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 4002 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
4003 | } |
4004 | ||
197865e8 | 4005 | static void |
800eeca4 | 4006 | dot_unwabi (dummy) |
2434f565 | 4007 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4008 | { |
e0c9811a JW |
4009 | expressionS e1, e2; |
4010 | unsigned char sep; | |
4011 | ||
4012 | sep = parse_operand (&e1); | |
4013 | if (sep != ',') | |
4014 | { | |
4015 | as_bad ("Second operand to .unwabi missing"); | |
4016 | return; | |
4017 | } | |
4018 | sep = parse_operand (&e2); | |
4019 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 4020 | demand_empty_rest_of_line (); |
e0c9811a JW |
4021 | |
4022 | if (e1.X_op != O_constant) | |
4023 | { | |
4024 | as_bad ("First operand to .unwabi must be a constant"); | |
4025 | return; | |
4026 | } | |
4027 | ||
4028 | if (e2.X_op != O_constant) | |
4029 | { | |
4030 | as_bad ("Second operand to .unwabi must be a constant"); | |
4031 | return; | |
4032 | } | |
4033 | ||
4034 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
4035 | } |
4036 | ||
197865e8 | 4037 | static void |
800eeca4 | 4038 | dot_personality (dummy) |
2434f565 | 4039 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4040 | { |
4041 | char *name, *p, c; | |
4042 | SKIP_WHITESPACE (); | |
4043 | name = input_line_pointer; | |
4044 | c = get_symbol_end (); | |
4045 | p = input_line_pointer; | |
e0c9811a | 4046 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4047 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4048 | *p = c; |
4049 | SKIP_WHITESPACE (); | |
4050 | demand_empty_rest_of_line (); | |
4051 | } | |
4052 | ||
4053 | static void | |
4054 | dot_proc (dummy) | |
2434f565 | 4055 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4056 | { |
4057 | char *name, *p, c; | |
4058 | symbolS *sym; | |
4059 | ||
e0c9811a JW |
4060 | unwind.proc_start = expr_build_dot (); |
4061 | /* Parse names of main and alternate entry points and mark them as | |
542d6675 | 4062 | function symbols: */ |
800eeca4 JW |
4063 | while (1) |
4064 | { | |
4065 | SKIP_WHITESPACE (); | |
4066 | name = input_line_pointer; | |
4067 | c = get_symbol_end (); | |
4068 | p = input_line_pointer; | |
4069 | sym = symbol_find_or_make (name); | |
e0c9811a | 4070 | if (unwind.proc_start == 0) |
542d6675 | 4071 | { |
e0c9811a | 4072 | unwind.proc_start = sym; |
800eeca4 JW |
4073 | } |
4074 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
4075 | *p = c; | |
4076 | SKIP_WHITESPACE (); | |
4077 | if (*input_line_pointer != ',') | |
4078 | break; | |
4079 | ++input_line_pointer; | |
4080 | } | |
4081 | demand_empty_rest_of_line (); | |
4082 | ia64_do_align (16); | |
4083 | ||
33d01f33 | 4084 | unwind.prologue_count = 0; |
e0c9811a JW |
4085 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4086 | unwind.personality_routine = 0; | |
800eeca4 JW |
4087 | } |
4088 | ||
4089 | static void | |
4090 | dot_body (dummy) | |
2434f565 | 4091 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4092 | { |
e0c9811a | 4093 | unwind.prologue = 0; |
30d25259 RH |
4094 | unwind.prologue_mask = 0; |
4095 | ||
800eeca4 | 4096 | add_unwind_entry (output_body ()); |
e0c9811a | 4097 | demand_empty_rest_of_line (); |
800eeca4 JW |
4098 | } |
4099 | ||
4100 | static void | |
4101 | dot_prologue (dummy) | |
2434f565 | 4102 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4103 | { |
e0c9811a | 4104 | unsigned char sep; |
2434f565 | 4105 | int mask = 0, grsave = 0; |
e0c9811a | 4106 | |
e0c9811a | 4107 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
4108 | { |
4109 | expressionS e1, e2; | |
800eeca4 JW |
4110 | sep = parse_operand (&e1); |
4111 | if (sep != ',') | |
4112 | as_bad ("No second operand to .prologue"); | |
4113 | sep = parse_operand (&e2); | |
e0c9811a | 4114 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
c95b35a9 | 4115 | demand_empty_rest_of_line (); |
800eeca4 JW |
4116 | |
4117 | if (e1.X_op == O_constant) | |
542d6675 | 4118 | { |
30d25259 RH |
4119 | mask = e1.X_add_number; |
4120 | ||
800eeca4 | 4121 | if (e2.X_op == O_constant) |
30d25259 RH |
4122 | grsave = e2.X_add_number; |
4123 | else if (e2.X_op == O_register | |
4124 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
4125 | ; | |
800eeca4 | 4126 | else |
30d25259 RH |
4127 | as_bad ("Second operand not a constant or general register"); |
4128 | ||
4129 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
4130 | } |
4131 | else | |
4132 | as_bad ("First operand not a constant"); | |
4133 | } | |
4134 | else | |
4135 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4136 | |
4137 | unwind.prologue = 1; | |
4138 | unwind.prologue_mask = mask; | |
33d01f33 | 4139 | ++unwind.prologue_count; |
800eeca4 JW |
4140 | } |
4141 | ||
4142 | static void | |
4143 | dot_endp (dummy) | |
2434f565 | 4144 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4145 | { |
4146 | expressionS e; | |
4147 | unsigned char *ptr; | |
44f5c83a | 4148 | int bytes_per_address; |
800eeca4 JW |
4149 | long where; |
4150 | segT saved_seg; | |
4151 | subsegT saved_subseg; | |
c538998c JJ |
4152 | char *name, *p, c; |
4153 | symbolS *sym; | |
800eeca4 | 4154 | |
91a2ae2a RH |
4155 | if (unwind.saved_text_seg) |
4156 | { | |
4157 | saved_seg = unwind.saved_text_seg; | |
4158 | saved_subseg = unwind.saved_text_subseg; | |
4159 | unwind.saved_text_seg = NULL; | |
4160 | } | |
4161 | else | |
4162 | { | |
4163 | saved_seg = now_seg; | |
4164 | saved_subseg = now_subseg; | |
4165 | } | |
4166 | ||
800eeca4 | 4167 | insn_group_break (1, 0, 0); |
800eeca4 | 4168 | |
91a2ae2a RH |
4169 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4170 | if (!unwind.info) | |
2d6ed997 | 4171 | generate_unwind_image (saved_seg); |
800eeca4 | 4172 | |
91a2ae2a RH |
4173 | if (unwind.info || unwind.force_unwind_entry) |
4174 | { | |
4175 | subseg_set (md.last_text_seg, 0); | |
4176 | unwind.proc_end = expr_build_dot (); | |
5e7474a7 | 4177 | |
d6afba4b | 4178 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0); |
5e7474a7 | 4179 | |
557debba JW |
4180 | /* Make sure that section has 4 byte alignment for ILP32 and |
4181 | 8 byte alignment for LP64. */ | |
4182 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4183 | |
557debba JW |
4184 | /* Need space for 3 pointers for procedure start, procedure end, |
4185 | and unwind info. */ | |
4186 | ptr = frag_more (3 * md.pointer_size); | |
4187 | where = frag_now_fix () - (3 * md.pointer_size); | |
91a2ae2a | 4188 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4189 | |
40449e9f | 4190 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4191 | e.X_op = O_pseudo_fixup; |
4192 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4193 | e.X_add_number = 0; | |
4194 | e.X_add_symbol = unwind.proc_start; | |
4195 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); | |
800eeca4 | 4196 | |
800eeca4 JW |
4197 | e.X_op = O_pseudo_fixup; |
4198 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4199 | e.X_add_number = 0; | |
91a2ae2a RH |
4200 | e.X_add_symbol = unwind.proc_end; |
4201 | ia64_cons_fix_new (frag_now, where + bytes_per_address, | |
4202 | bytes_per_address, &e); | |
4203 | ||
4204 | if (unwind.info) | |
4205 | { | |
4206 | e.X_op = O_pseudo_fixup; | |
4207 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4208 | e.X_add_number = 0; | |
4209 | e.X_add_symbol = unwind.info; | |
4210 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4211 | bytes_per_address, &e); | |
4212 | } | |
4213 | else | |
4214 | md_number_to_chars (ptr + (bytes_per_address * 2), 0, | |
4215 | bytes_per_address); | |
800eeca4 | 4216 | |
91a2ae2a | 4217 | } |
d6afba4b JJ |
4218 | else |
4219 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1); | |
4220 | ||
800eeca4 | 4221 | subseg_set (saved_seg, saved_subseg); |
c538998c JJ |
4222 | |
4223 | /* Parse names of main and alternate entry points and set symbol sizes. */ | |
4224 | while (1) | |
4225 | { | |
4226 | SKIP_WHITESPACE (); | |
4227 | name = input_line_pointer; | |
4228 | c = get_symbol_end (); | |
4229 | p = input_line_pointer; | |
4230 | sym = symbol_find (name); | |
4231 | if (sym && unwind.proc_start | |
4232 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4233 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4234 | { | |
4235 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4236 | fragS *frag = symbol_get_frag (sym); | |
4237 | ||
4238 | /* Check whether the function label is at or beyond last | |
4239 | .proc directive. */ | |
4240 | while (fr && fr != frag) | |
4241 | fr = fr->fr_next; | |
4242 | if (fr) | |
4243 | { | |
4244 | if (frag == frag_now && SEG_NORMAL (now_seg)) | |
4245 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4246 | else | |
4247 | { | |
4248 | symbol_get_obj (sym)->size = | |
4249 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4250 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4251 | symbol_get_obj (sym)->size->X_add_symbol | |
4252 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4253 | frag_now_fix (), frag_now); | |
4254 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4255 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4256 | } | |
4257 | } | |
4258 | } | |
4259 | *p = c; | |
4260 | SKIP_WHITESPACE (); | |
4261 | if (*input_line_pointer != ',') | |
4262 | break; | |
4263 | ++input_line_pointer; | |
4264 | } | |
4265 | demand_empty_rest_of_line (); | |
e0c9811a | 4266 | unwind.proc_start = unwind.proc_end = unwind.info = 0; |
800eeca4 JW |
4267 | } |
4268 | ||
4269 | static void | |
4270 | dot_template (template) | |
4271 | int template; | |
4272 | { | |
4273 | CURR_SLOT.user_template = template; | |
4274 | } | |
4275 | ||
4276 | static void | |
4277 | dot_regstk (dummy) | |
2434f565 | 4278 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4279 | { |
4280 | int ins, locs, outs, rots; | |
4281 | ||
4282 | if (is_it_end_of_statement ()) | |
4283 | ins = locs = outs = rots = 0; | |
4284 | else | |
4285 | { | |
4286 | ins = get_absolute_expression (); | |
4287 | if (*input_line_pointer++ != ',') | |
4288 | goto err; | |
4289 | locs = get_absolute_expression (); | |
4290 | if (*input_line_pointer++ != ',') | |
4291 | goto err; | |
4292 | outs = get_absolute_expression (); | |
4293 | if (*input_line_pointer++ != ',') | |
4294 | goto err; | |
4295 | rots = get_absolute_expression (); | |
4296 | } | |
4297 | set_regstack (ins, locs, outs, rots); | |
4298 | return; | |
4299 | ||
4300 | err: | |
4301 | as_bad ("Comma expected"); | |
4302 | ignore_rest_of_line (); | |
4303 | } | |
4304 | ||
4305 | static void | |
4306 | dot_rot (type) | |
4307 | int type; | |
4308 | { | |
4309 | unsigned num_regs, num_alloced = 0; | |
4310 | struct dynreg **drpp, *dr; | |
4311 | int ch, base_reg = 0; | |
4312 | char *name, *start; | |
4313 | size_t len; | |
4314 | ||
4315 | switch (type) | |
4316 | { | |
4317 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4318 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4319 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4320 | default: break; | |
4321 | } | |
4322 | ||
542d6675 | 4323 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4324 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4325 | { | |
4326 | hash_delete (md.dynreg_hash, dr->name); | |
4327 | dr->num_regs = 0; | |
4328 | } | |
4329 | ||
4330 | drpp = &md.dynreg[type]; | |
4331 | while (1) | |
4332 | { | |
4333 | start = input_line_pointer; | |
4334 | ch = get_symbol_end (); | |
4335 | *input_line_pointer = ch; | |
4336 | len = (input_line_pointer - start); | |
4337 | ||
4338 | SKIP_WHITESPACE (); | |
4339 | if (*input_line_pointer != '[') | |
4340 | { | |
4341 | as_bad ("Expected '['"); | |
4342 | goto err; | |
4343 | } | |
4344 | ++input_line_pointer; /* skip '[' */ | |
4345 | ||
4346 | num_regs = get_absolute_expression (); | |
4347 | ||
4348 | if (*input_line_pointer++ != ']') | |
4349 | { | |
4350 | as_bad ("Expected ']'"); | |
4351 | goto err; | |
4352 | } | |
4353 | SKIP_WHITESPACE (); | |
4354 | ||
4355 | num_alloced += num_regs; | |
4356 | switch (type) | |
4357 | { | |
4358 | case DYNREG_GR: | |
4359 | if (num_alloced > md.rot.num_regs) | |
4360 | { | |
4361 | as_bad ("Used more than the declared %d rotating registers", | |
4362 | md.rot.num_regs); | |
4363 | goto err; | |
4364 | } | |
4365 | break; | |
4366 | case DYNREG_FR: | |
4367 | if (num_alloced > 96) | |
4368 | { | |
4369 | as_bad ("Used more than the available 96 rotating registers"); | |
4370 | goto err; | |
4371 | } | |
4372 | break; | |
4373 | case DYNREG_PR: | |
4374 | if (num_alloced > 48) | |
4375 | { | |
4376 | as_bad ("Used more than the available 48 rotating registers"); | |
4377 | goto err; | |
4378 | } | |
4379 | break; | |
4380 | ||
4381 | default: | |
4382 | break; | |
4383 | } | |
4384 | ||
4385 | name = obstack_alloc (¬es, len + 1); | |
4386 | memcpy (name, start, len); | |
4387 | name[len] = '\0'; | |
4388 | ||
4389 | if (!*drpp) | |
4390 | { | |
4391 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4392 | memset (*drpp, 0, sizeof (*dr)); | |
4393 | } | |
4394 | ||
4395 | dr = *drpp; | |
4396 | dr->name = name; | |
4397 | dr->num_regs = num_regs; | |
4398 | dr->base = base_reg; | |
4399 | drpp = &dr->next; | |
4400 | base_reg += num_regs; | |
4401 | ||
4402 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4403 | { | |
4404 | as_bad ("Attempt to redefine register set `%s'", name); | |
4405 | goto err; | |
4406 | } | |
4407 | ||
4408 | if (*input_line_pointer != ',') | |
4409 | break; | |
4410 | ++input_line_pointer; /* skip comma */ | |
4411 | SKIP_WHITESPACE (); | |
4412 | } | |
4413 | demand_empty_rest_of_line (); | |
4414 | return; | |
4415 | ||
4416 | err: | |
4417 | ignore_rest_of_line (); | |
4418 | } | |
4419 | ||
4420 | static void | |
4421 | dot_byteorder (byteorder) | |
4422 | int byteorder; | |
4423 | { | |
10a98291 L |
4424 | segment_info_type *seginfo = seg_info (now_seg); |
4425 | ||
4426 | if (byteorder == -1) | |
4427 | { | |
4428 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4429 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4430 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4431 | } | |
4432 | else | |
4433 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4434 | ||
4435 | if (target_big_endian != byteorder) | |
4436 | { | |
4437 | target_big_endian = byteorder; | |
4438 | if (target_big_endian) | |
4439 | { | |
4440 | ia64_number_to_chars = number_to_chars_bigendian; | |
4441 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4442 | } | |
4443 | else | |
4444 | { | |
4445 | ia64_number_to_chars = number_to_chars_littleendian; | |
4446 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4447 | } | |
4448 | } | |
800eeca4 JW |
4449 | } |
4450 | ||
4451 | static void | |
4452 | dot_psr (dummy) | |
2434f565 | 4453 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4454 | { |
4455 | char *option; | |
4456 | int ch; | |
4457 | ||
4458 | while (1) | |
4459 | { | |
4460 | option = input_line_pointer; | |
4461 | ch = get_symbol_end (); | |
4462 | if (strcmp (option, "lsb") == 0) | |
4463 | md.flags &= ~EF_IA_64_BE; | |
4464 | else if (strcmp (option, "msb") == 0) | |
4465 | md.flags |= EF_IA_64_BE; | |
4466 | else if (strcmp (option, "abi32") == 0) | |
4467 | md.flags &= ~EF_IA_64_ABI64; | |
4468 | else if (strcmp (option, "abi64") == 0) | |
4469 | md.flags |= EF_IA_64_ABI64; | |
4470 | else | |
4471 | as_bad ("Unknown psr option `%s'", option); | |
4472 | *input_line_pointer = ch; | |
4473 | ||
4474 | SKIP_WHITESPACE (); | |
4475 | if (*input_line_pointer != ',') | |
4476 | break; | |
4477 | ||
4478 | ++input_line_pointer; | |
4479 | SKIP_WHITESPACE (); | |
4480 | } | |
4481 | demand_empty_rest_of_line (); | |
4482 | } | |
4483 | ||
800eeca4 JW |
4484 | static void |
4485 | dot_ln (dummy) | |
2434f565 | 4486 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4487 | { |
4488 | new_logical_line (0, get_absolute_expression ()); | |
4489 | demand_empty_rest_of_line (); | |
4490 | } | |
4491 | ||
542d6675 | 4492 | static char * |
800eeca4 JW |
4493 | parse_section_name () |
4494 | { | |
4495 | char *name; | |
4496 | int len; | |
4497 | ||
4498 | SKIP_WHITESPACE (); | |
4499 | if (*input_line_pointer != '"') | |
4500 | { | |
4501 | as_bad ("Missing section name"); | |
4502 | ignore_rest_of_line (); | |
4503 | return 0; | |
4504 | } | |
4505 | name = demand_copy_C_string (&len); | |
4506 | if (!name) | |
4507 | { | |
4508 | ignore_rest_of_line (); | |
4509 | return 0; | |
4510 | } | |
4511 | SKIP_WHITESPACE (); | |
4512 | if (*input_line_pointer != ',') | |
4513 | { | |
4514 | as_bad ("Comma expected after section name"); | |
4515 | ignore_rest_of_line (); | |
4516 | return 0; | |
4517 | } | |
4518 | ++input_line_pointer; /* skip comma */ | |
4519 | return name; | |
4520 | } | |
4521 | ||
4522 | static void | |
4523 | dot_xdata (size) | |
4524 | int size; | |
4525 | { | |
4526 | char *name = parse_section_name (); | |
4527 | if (!name) | |
4528 | return; | |
4529 | ||
4d5a53ff | 4530 | md.keep_pending_output = 1; |
800eeca4 JW |
4531 | set_section (name); |
4532 | cons (size); | |
4533 | obj_elf_previous (0); | |
4d5a53ff | 4534 | md.keep_pending_output = 0; |
800eeca4 JW |
4535 | } |
4536 | ||
4537 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4538 | |
800eeca4 JW |
4539 | static void |
4540 | stmt_float_cons (kind) | |
4541 | int kind; | |
4542 | { | |
165a7f90 | 4543 | size_t alignment; |
800eeca4 JW |
4544 | |
4545 | switch (kind) | |
4546 | { | |
165a7f90 L |
4547 | case 'd': |
4548 | alignment = 8; | |
4549 | break; | |
4550 | ||
4551 | case 'x': | |
4552 | case 'X': | |
4553 | alignment = 16; | |
4554 | break; | |
800eeca4 JW |
4555 | |
4556 | case 'f': | |
4557 | default: | |
165a7f90 | 4558 | alignment = 4; |
800eeca4 JW |
4559 | break; |
4560 | } | |
165a7f90 | 4561 | ia64_do_align (alignment); |
800eeca4 JW |
4562 | float_cons (kind); |
4563 | } | |
4564 | ||
4565 | static void | |
4566 | stmt_cons_ua (size) | |
4567 | int size; | |
4568 | { | |
4569 | int saved_auto_align = md.auto_align; | |
4570 | ||
4571 | md.auto_align = 0; | |
4572 | cons (size); | |
4573 | md.auto_align = saved_auto_align; | |
4574 | } | |
4575 | ||
4576 | static void | |
4577 | dot_xfloat_cons (kind) | |
4578 | int kind; | |
4579 | { | |
4580 | char *name = parse_section_name (); | |
4581 | if (!name) | |
4582 | return; | |
4583 | ||
4d5a53ff | 4584 | md.keep_pending_output = 1; |
800eeca4 JW |
4585 | set_section (name); |
4586 | stmt_float_cons (kind); | |
4587 | obj_elf_previous (0); | |
4d5a53ff | 4588 | md.keep_pending_output = 0; |
800eeca4 JW |
4589 | } |
4590 | ||
4591 | static void | |
4592 | dot_xstringer (zero) | |
4593 | int zero; | |
4594 | { | |
4595 | char *name = parse_section_name (); | |
4596 | if (!name) | |
4597 | return; | |
4598 | ||
4d5a53ff | 4599 | md.keep_pending_output = 1; |
800eeca4 JW |
4600 | set_section (name); |
4601 | stringer (zero); | |
4602 | obj_elf_previous (0); | |
4d5a53ff | 4603 | md.keep_pending_output = 0; |
800eeca4 JW |
4604 | } |
4605 | ||
4606 | static void | |
4607 | dot_xdata_ua (size) | |
4608 | int size; | |
4609 | { | |
4610 | int saved_auto_align = md.auto_align; | |
4611 | char *name = parse_section_name (); | |
4612 | if (!name) | |
4613 | return; | |
4614 | ||
4d5a53ff | 4615 | md.keep_pending_output = 1; |
800eeca4 JW |
4616 | set_section (name); |
4617 | md.auto_align = 0; | |
4618 | cons (size); | |
4619 | md.auto_align = saved_auto_align; | |
4620 | obj_elf_previous (0); | |
4d5a53ff | 4621 | md.keep_pending_output = 0; |
800eeca4 JW |
4622 | } |
4623 | ||
4624 | static void | |
4625 | dot_xfloat_cons_ua (kind) | |
4626 | int kind; | |
4627 | { | |
4628 | int saved_auto_align = md.auto_align; | |
4629 | char *name = parse_section_name (); | |
4630 | if (!name) | |
4631 | return; | |
4632 | ||
4d5a53ff | 4633 | md.keep_pending_output = 1; |
800eeca4 JW |
4634 | set_section (name); |
4635 | md.auto_align = 0; | |
4636 | stmt_float_cons (kind); | |
4637 | md.auto_align = saved_auto_align; | |
4638 | obj_elf_previous (0); | |
4d5a53ff | 4639 | md.keep_pending_output = 0; |
800eeca4 JW |
4640 | } |
4641 | ||
4642 | /* .reg.val <regname>,value */ | |
542d6675 | 4643 | |
800eeca4 JW |
4644 | static void |
4645 | dot_reg_val (dummy) | |
2434f565 | 4646 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4647 | { |
4648 | expressionS reg; | |
4649 | ||
4650 | expression (®); | |
4651 | if (reg.X_op != O_register) | |
4652 | { | |
4653 | as_bad (_("Register name expected")); | |
4654 | ignore_rest_of_line (); | |
4655 | } | |
4656 | else if (*input_line_pointer++ != ',') | |
4657 | { | |
4658 | as_bad (_("Comma expected")); | |
4659 | ignore_rest_of_line (); | |
4660 | } | |
197865e8 | 4661 | else |
800eeca4 JW |
4662 | { |
4663 | valueT value = get_absolute_expression (); | |
4664 | int regno = reg.X_add_number; | |
542d6675 KH |
4665 | if (regno < REG_GR || regno > REG_GR + 128) |
4666 | as_warn (_("Register value annotation ignored")); | |
800eeca4 | 4667 | else |
542d6675 KH |
4668 | { |
4669 | gr_values[regno - REG_GR].known = 1; | |
4670 | gr_values[regno - REG_GR].value = value; | |
4671 | gr_values[regno - REG_GR].path = md.path; | |
4672 | } | |
800eeca4 JW |
4673 | } |
4674 | demand_empty_rest_of_line (); | |
4675 | } | |
4676 | ||
5e819f9c JW |
4677 | /* |
4678 | .serialize.data | |
4679 | .serialize.instruction | |
4680 | */ | |
4681 | static void | |
4682 | dot_serialize (type) | |
4683 | int type; | |
4684 | { | |
4685 | insn_group_break (0, 0, 0); | |
4686 | if (type) | |
4687 | instruction_serialization (); | |
4688 | else | |
4689 | data_serialization (); | |
4690 | insn_group_break (0, 0, 0); | |
4691 | demand_empty_rest_of_line (); | |
4692 | } | |
4693 | ||
197865e8 | 4694 | /* select dv checking mode |
800eeca4 JW |
4695 | .auto |
4696 | .explicit | |
4697 | .default | |
4698 | ||
197865e8 | 4699 | A stop is inserted when changing modes |
800eeca4 | 4700 | */ |
542d6675 | 4701 | |
800eeca4 JW |
4702 | static void |
4703 | dot_dv_mode (type) | |
542d6675 | 4704 | int type; |
800eeca4 JW |
4705 | { |
4706 | if (md.manual_bundling) | |
4707 | as_warn (_("Directive invalid within a bundle")); | |
4708 | ||
4709 | if (type == 'E' || type == 'A') | |
4710 | md.mode_explicitly_set = 0; | |
4711 | else | |
4712 | md.mode_explicitly_set = 1; | |
4713 | ||
4714 | md.detect_dv = 1; | |
4715 | switch (type) | |
4716 | { | |
4717 | case 'A': | |
4718 | case 'a': | |
4719 | if (md.explicit_mode) | |
542d6675 | 4720 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4721 | md.explicit_mode = 0; |
4722 | break; | |
4723 | case 'E': | |
4724 | case 'e': | |
4725 | if (!md.explicit_mode) | |
542d6675 | 4726 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4727 | md.explicit_mode = 1; |
4728 | break; | |
4729 | default: | |
4730 | case 'd': | |
4731 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4732 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4733 | md.explicit_mode = md.default_explicit_mode; |
4734 | md.mode_explicitly_set = 0; | |
4735 | break; | |
4736 | } | |
4737 | } | |
4738 | ||
4739 | static void | |
4740 | print_prmask (mask) | |
542d6675 | 4741 | valueT mask; |
800eeca4 JW |
4742 | { |
4743 | int regno; | |
4744 | char *comma = ""; | |
542d6675 | 4745 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4746 | { |
542d6675 KH |
4747 | if (mask & ((valueT) 1 << regno)) |
4748 | { | |
4749 | fprintf (stderr, "%s p%d", comma, regno); | |
4750 | comma = ","; | |
4751 | } | |
800eeca4 JW |
4752 | } |
4753 | } | |
4754 | ||
4755 | /* | |
4756 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear") | |
4757 | .pred.rel.imply p1, p2 (also .pred.rel "imply") | |
4758 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex") | |
4759 | .pred.safe_across_calls p1 [, p2 [,...]] | |
4760 | */ | |
542d6675 | 4761 | |
800eeca4 JW |
4762 | static void |
4763 | dot_pred_rel (type) | |
542d6675 | 4764 | int type; |
800eeca4 JW |
4765 | { |
4766 | valueT mask = 0; | |
4767 | int count = 0; | |
4768 | int p1 = -1, p2 = -1; | |
4769 | ||
4770 | if (type == 0) | |
4771 | { | |
4772 | if (*input_line_pointer != '"') | |
542d6675 KH |
4773 | { |
4774 | as_bad (_("Missing predicate relation type")); | |
4775 | ignore_rest_of_line (); | |
4776 | return; | |
4777 | } | |
197865e8 | 4778 | else |
542d6675 KH |
4779 | { |
4780 | int len; | |
4781 | char *form = demand_copy_C_string (&len); | |
4782 | if (strcmp (form, "mutex") == 0) | |
4783 | type = 'm'; | |
4784 | else if (strcmp (form, "clear") == 0) | |
4785 | type = 'c'; | |
4786 | else if (strcmp (form, "imply") == 0) | |
4787 | type = 'i'; | |
4788 | else | |
4789 | { | |
4790 | as_bad (_("Unrecognized predicate relation type")); | |
4791 | ignore_rest_of_line (); | |
4792 | return; | |
4793 | } | |
4794 | } | |
800eeca4 | 4795 | if (*input_line_pointer == ',') |
542d6675 | 4796 | ++input_line_pointer; |
800eeca4 JW |
4797 | SKIP_WHITESPACE (); |
4798 | } | |
4799 | ||
4800 | SKIP_WHITESPACE (); | |
4801 | while (1) | |
4802 | { | |
4803 | valueT bit = 1; | |
4804 | int regno; | |
197865e8 | 4805 | |
3882b010 | 4806 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4807 | || (regno = atoi (++input_line_pointer)) < 0 |
4808 | || regno > 63) | |
4809 | { | |
4810 | as_bad (_("Predicate register expected")); | |
4811 | ignore_rest_of_line (); | |
4812 | return; | |
4813 | } | |
3882b010 | 4814 | while (ISDIGIT (*input_line_pointer)) |
542d6675 | 4815 | ++input_line_pointer; |
800eeca4 | 4816 | if (p1 == -1) |
542d6675 | 4817 | p1 = regno; |
800eeca4 | 4818 | else if (p2 == -1) |
542d6675 | 4819 | p2 = regno; |
800eeca4 JW |
4820 | bit <<= regno; |
4821 | if (mask & bit) | |
542d6675 KH |
4822 | as_warn (_("Duplicate predicate register ignored")); |
4823 | mask |= bit; | |
4824 | count++; | |
4825 | /* See if it's a range. */ | |
800eeca4 | 4826 | if (*input_line_pointer == '-') |
542d6675 KH |
4827 | { |
4828 | valueT stop = 1; | |
4829 | ++input_line_pointer; | |
4830 | ||
3882b010 | 4831 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4832 | || (regno = atoi (++input_line_pointer)) < 0 |
4833 | || regno > 63) | |
4834 | { | |
4835 | as_bad (_("Predicate register expected")); | |
4836 | ignore_rest_of_line (); | |
4837 | return; | |
4838 | } | |
3882b010 | 4839 | while (ISDIGIT (*input_line_pointer)) |
542d6675 KH |
4840 | ++input_line_pointer; |
4841 | stop <<= regno; | |
4842 | if (bit >= stop) | |
4843 | { | |
4844 | as_bad (_("Bad register range")); | |
4845 | ignore_rest_of_line (); | |
4846 | return; | |
4847 | } | |
4848 | while (bit < stop) | |
4849 | { | |
4850 | bit <<= 1; | |
4851 | mask |= bit; | |
4852 | count++; | |
4853 | } | |
4854 | SKIP_WHITESPACE (); | |
4855 | } | |
800eeca4 | 4856 | if (*input_line_pointer != ',') |
542d6675 | 4857 | break; |
800eeca4 JW |
4858 | ++input_line_pointer; |
4859 | SKIP_WHITESPACE (); | |
4860 | } | |
4861 | ||
4862 | switch (type) | |
4863 | { | |
4864 | case 'c': | |
4865 | if (count == 0) | |
542d6675 | 4866 | mask = ~(valueT) 0; |
800eeca4 | 4867 | clear_qp_mutex (mask); |
197865e8 | 4868 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
4869 | break; |
4870 | case 'i': | |
4871 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 4872 | as_bad (_("Predicate source and target required")); |
800eeca4 | 4873 | else if (p1 == 0 || p2 == 0) |
542d6675 | 4874 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 4875 | else |
542d6675 | 4876 | add_qp_imply (p1, p2); |
800eeca4 JW |
4877 | break; |
4878 | case 'm': | |
4879 | if (count < 2) | |
542d6675 KH |
4880 | { |
4881 | as_bad (_("At least two PR arguments expected")); | |
4882 | break; | |
4883 | } | |
800eeca4 | 4884 | else if (mask & 1) |
542d6675 KH |
4885 | { |
4886 | as_bad (_("Use of p0 is not valid in this context")); | |
4887 | break; | |
4888 | } | |
800eeca4 JW |
4889 | add_qp_mutex (mask); |
4890 | break; | |
4891 | case 's': | |
4892 | /* note that we don't override any existing relations */ | |
4893 | if (count == 0) | |
542d6675 KH |
4894 | { |
4895 | as_bad (_("At least one PR argument expected")); | |
4896 | break; | |
4897 | } | |
800eeca4 | 4898 | if (md.debug_dv) |
542d6675 KH |
4899 | { |
4900 | fprintf (stderr, "Safe across calls: "); | |
4901 | print_prmask (mask); | |
4902 | fprintf (stderr, "\n"); | |
4903 | } | |
800eeca4 JW |
4904 | qp_safe_across_calls = mask; |
4905 | break; | |
4906 | } | |
4907 | demand_empty_rest_of_line (); | |
4908 | } | |
4909 | ||
4910 | /* .entry label [, label [, ...]] | |
4911 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
4912 | Otherwise, only global labels are considered entry points. */ |
4913 | ||
800eeca4 JW |
4914 | static void |
4915 | dot_entry (dummy) | |
2434f565 | 4916 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4917 | { |
4918 | const char *err; | |
4919 | char *name; | |
4920 | int c; | |
4921 | symbolS *symbolP; | |
4922 | ||
4923 | do | |
4924 | { | |
4925 | name = input_line_pointer; | |
4926 | c = get_symbol_end (); | |
4927 | symbolP = symbol_find_or_make (name); | |
4928 | ||
4929 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
4930 | if (err) | |
542d6675 KH |
4931 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
4932 | name, err); | |
800eeca4 JW |
4933 | |
4934 | *input_line_pointer = c; | |
4935 | SKIP_WHITESPACE (); | |
4936 | c = *input_line_pointer; | |
4937 | if (c == ',') | |
4938 | { | |
4939 | input_line_pointer++; | |
4940 | SKIP_WHITESPACE (); | |
4941 | if (*input_line_pointer == '\n') | |
4942 | c = '\n'; | |
4943 | } | |
4944 | } | |
4945 | while (c == ','); | |
4946 | ||
4947 | demand_empty_rest_of_line (); | |
4948 | } | |
4949 | ||
197865e8 | 4950 | /* .mem.offset offset, base |
542d6675 KH |
4951 | "base" is used to distinguish between offsets from a different base. */ |
4952 | ||
800eeca4 JW |
4953 | static void |
4954 | dot_mem_offset (dummy) | |
2434f565 | 4955 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4956 | { |
4957 | md.mem_offset.hint = 1; | |
4958 | md.mem_offset.offset = get_absolute_expression (); | |
4959 | if (*input_line_pointer != ',') | |
4960 | { | |
4961 | as_bad (_("Comma expected")); | |
4962 | ignore_rest_of_line (); | |
4963 | return; | |
4964 | } | |
4965 | ++input_line_pointer; | |
4966 | md.mem_offset.base = get_absolute_expression (); | |
4967 | demand_empty_rest_of_line (); | |
4968 | } | |
4969 | ||
542d6675 | 4970 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
4971 | const pseudo_typeS md_pseudo_table[] = |
4972 | { | |
4973 | { "radix", dot_radix, 0 }, | |
4974 | { "lcomm", s_lcomm_bytes, 1 }, | |
4975 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, | |
4976 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
4977 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
4978 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
4979 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
4980 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
4981 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
4982 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
4983 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
4984 | { "proc", dot_proc, 0 }, |
4985 | { "body", dot_body, 0 }, | |
4986 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 4987 | { "endp", dot_endp, 0 }, |
2434f565 JW |
4988 | |
4989 | { "fframe", dot_fframe, 0 }, | |
4990 | { "vframe", dot_vframe, 0 }, | |
4991 | { "vframesp", dot_vframesp, 0 }, | |
4992 | { "vframepsp", dot_vframepsp, 0 }, | |
4993 | { "save", dot_save, 0 }, | |
4994 | { "restore", dot_restore, 0 }, | |
4995 | { "restorereg", dot_restorereg, 0 }, | |
4996 | { "restorereg.p", dot_restorereg_p, 0 }, | |
4997 | { "handlerdata", dot_handlerdata, 0 }, | |
4998 | { "unwentry", dot_unwentry, 0 }, | |
4999 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5000 | { "savesp", dot_savemem, 0 }, |
5001 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5002 | { "save.g", dot_saveg, 0 }, |
5003 | { "save.f", dot_savef, 0 }, | |
5004 | { "save.b", dot_saveb, 0 }, | |
5005 | { "save.gf", dot_savegf, 0 }, | |
5006 | { "spill", dot_spill, 0 }, | |
5007 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5008 | { "spillsp", dot_spillmem, 0 }, |
5009 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 5010 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
5011 | { "spillsp.p", dot_spillmem_p, 0 }, |
5012 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
5013 | { "label_state", dot_label_state, 0 }, |
5014 | { "copy_state", dot_copy_state, 0 }, | |
5015 | { "unwabi", dot_unwabi, 0 }, | |
5016 | { "personality", dot_personality, 0 }, | |
800eeca4 | 5017 | #if 0 |
2434f565 | 5018 | { "estate", dot_estate, 0 }, |
800eeca4 JW |
5019 | #endif |
5020 | { "mii", dot_template, 0x0 }, | |
5021 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5022 | { "mlx", dot_template, 0x2 }, | |
5023 | { "mmi", dot_template, 0x4 }, | |
5024 | { "mfi", dot_template, 0x6 }, | |
5025 | { "mmf", dot_template, 0x7 }, | |
5026 | { "mib", dot_template, 0x8 }, | |
5027 | { "mbb", dot_template, 0x9 }, | |
5028 | { "bbb", dot_template, 0xb }, | |
5029 | { "mmb", dot_template, 0xc }, | |
5030 | { "mfb", dot_template, 0xe }, | |
5031 | #if 0 | |
5032 | { "lb", dot_scope, 0 }, | |
5033 | { "le", dot_scope, 1 }, | |
5034 | #endif | |
d9201763 | 5035 | { "align", dot_align, 0 }, |
800eeca4 JW |
5036 | { "regstk", dot_regstk, 0 }, |
5037 | { "rotr", dot_rot, DYNREG_GR }, | |
5038 | { "rotf", dot_rot, DYNREG_FR }, | |
5039 | { "rotp", dot_rot, DYNREG_PR }, | |
5040 | { "lsb", dot_byteorder, 0 }, | |
5041 | { "msb", dot_byteorder, 1 }, | |
5042 | { "psr", dot_psr, 0 }, | |
5043 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5044 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5045 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5046 | ||
5047 | { "xdata1", dot_xdata, 1 }, | |
5048 | { "xdata2", dot_xdata, 2 }, | |
5049 | { "xdata4", dot_xdata, 4 }, | |
5050 | { "xdata8", dot_xdata, 8 }, | |
5051 | { "xreal4", dot_xfloat_cons, 'f' }, | |
5052 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5053 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5054 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5055 | { "xstring", dot_xstringer, 0 }, |
5056 | { "xstringz", dot_xstringer, 1 }, | |
5057 | ||
542d6675 | 5058 | /* unaligned versions: */ |
800eeca4 JW |
5059 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5060 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5061 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
5062 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, | |
5063 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5064 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5065 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5066 | |
5067 | /* annotations/DV checking support */ | |
5068 | { "entry", dot_entry, 0 }, | |
2434f565 | 5069 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5070 | { "pred.rel", dot_pred_rel, 0 }, |
5071 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5072 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5073 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5074 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5075 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5076 | { "serialize.data", dot_serialize, 0 }, |
5077 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5078 | { "auto", dot_dv_mode, 'a' }, |
5079 | { "explicit", dot_dv_mode, 'e' }, | |
5080 | { "default", dot_dv_mode, 'd' }, | |
5081 | ||
87885043 JW |
5082 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5083 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5084 | tell it that these ones are supposed to be unaligned. Long term, | |
5085 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5086 | are aligned by default. */ | |
5087 | {"2byte", stmt_cons_ua, 2}, | |
5088 | {"4byte", stmt_cons_ua, 4}, | |
5089 | {"8byte", stmt_cons_ua, 8}, | |
5090 | ||
800eeca4 JW |
5091 | { NULL, 0, 0 } |
5092 | }; | |
5093 | ||
5094 | static const struct pseudo_opcode | |
5095 | { | |
5096 | const char *name; | |
5097 | void (*handler) (int); | |
5098 | int arg; | |
5099 | } | |
5100 | pseudo_opcode[] = | |
5101 | { | |
5102 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5103 | { "data1", cons, 1 }, | |
5104 | { "data2", cons, 2 }, | |
5105 | { "data4", cons, 4 }, | |
5106 | { "data8", cons, 8 }, | |
3969b680 | 5107 | { "data16", cons, 16 }, |
800eeca4 JW |
5108 | { "real4", stmt_float_cons, 'f' }, |
5109 | { "real8", stmt_float_cons, 'd' }, | |
5110 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5111 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5112 | { "string", stringer, 0 }, |
5113 | { "stringz", stringer, 1 }, | |
5114 | ||
542d6675 | 5115 | /* unaligned versions: */ |
800eeca4 JW |
5116 | { "data2.ua", stmt_cons_ua, 2 }, |
5117 | { "data4.ua", stmt_cons_ua, 4 }, | |
5118 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5119 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5120 | { "real4.ua", float_cons, 'f' }, |
5121 | { "real8.ua", float_cons, 'd' }, | |
5122 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5123 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5124 | }; |
5125 | ||
5126 | /* Declare a register by creating a symbol for it and entering it in | |
5127 | the symbol table. */ | |
542d6675 KH |
5128 | |
5129 | static symbolS * | |
800eeca4 JW |
5130 | declare_register (name, regnum) |
5131 | const char *name; | |
5132 | int regnum; | |
5133 | { | |
5134 | const char *err; | |
5135 | symbolS *sym; | |
5136 | ||
5137 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5138 | ||
5139 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5140 | if (err) | |
5141 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5142 | name, err); | |
5143 | ||
5144 | return sym; | |
5145 | } | |
5146 | ||
5147 | static void | |
5148 | declare_register_set (prefix, num_regs, base_regnum) | |
5149 | const char *prefix; | |
5150 | int num_regs; | |
5151 | int base_regnum; | |
5152 | { | |
5153 | char name[8]; | |
5154 | int i; | |
5155 | ||
5156 | for (i = 0; i < num_regs; ++i) | |
5157 | { | |
5158 | sprintf (name, "%s%u", prefix, i); | |
5159 | declare_register (name, base_regnum + i); | |
5160 | } | |
5161 | } | |
5162 | ||
5163 | static unsigned int | |
5164 | operand_width (opnd) | |
5165 | enum ia64_opnd opnd; | |
5166 | { | |
5167 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5168 | unsigned int bits = 0; | |
5169 | int i; | |
5170 | ||
5171 | bits = 0; | |
5172 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5173 | bits += odesc->field[i].bits; | |
5174 | ||
5175 | return bits; | |
5176 | } | |
5177 | ||
87f8eb97 | 5178 | static enum operand_match_result |
800eeca4 JW |
5179 | operand_match (idesc, index, e) |
5180 | const struct ia64_opcode *idesc; | |
5181 | int index; | |
5182 | expressionS *e; | |
5183 | { | |
5184 | enum ia64_opnd opnd = idesc->operands[index]; | |
5185 | int bits, relocatable = 0; | |
5186 | struct insn_fix *fix; | |
5187 | bfd_signed_vma val; | |
5188 | ||
5189 | switch (opnd) | |
5190 | { | |
542d6675 | 5191 | /* constants: */ |
800eeca4 JW |
5192 | |
5193 | case IA64_OPND_AR_CCV: | |
5194 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5195 | return OPERAND_MATCH; |
800eeca4 JW |
5196 | break; |
5197 | ||
c10d9d8f JW |
5198 | case IA64_OPND_AR_CSD: |
5199 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5200 | return OPERAND_MATCH; | |
5201 | break; | |
5202 | ||
800eeca4 JW |
5203 | case IA64_OPND_AR_PFS: |
5204 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5205 | return OPERAND_MATCH; |
800eeca4 JW |
5206 | break; |
5207 | ||
5208 | case IA64_OPND_GR0: | |
5209 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5210 | return OPERAND_MATCH; |
800eeca4 JW |
5211 | break; |
5212 | ||
5213 | case IA64_OPND_IP: | |
5214 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5215 | return OPERAND_MATCH; |
800eeca4 JW |
5216 | break; |
5217 | ||
5218 | case IA64_OPND_PR: | |
5219 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5220 | return OPERAND_MATCH; |
800eeca4 JW |
5221 | break; |
5222 | ||
5223 | case IA64_OPND_PR_ROT: | |
5224 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5225 | return OPERAND_MATCH; |
800eeca4 JW |
5226 | break; |
5227 | ||
5228 | case IA64_OPND_PSR: | |
5229 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5230 | return OPERAND_MATCH; |
800eeca4 JW |
5231 | break; |
5232 | ||
5233 | case IA64_OPND_PSR_L: | |
5234 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5235 | return OPERAND_MATCH; |
800eeca4 JW |
5236 | break; |
5237 | ||
5238 | case IA64_OPND_PSR_UM: | |
5239 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5240 | return OPERAND_MATCH; |
800eeca4 JW |
5241 | break; |
5242 | ||
5243 | case IA64_OPND_C1: | |
87f8eb97 JW |
5244 | if (e->X_op == O_constant) |
5245 | { | |
5246 | if (e->X_add_number == 1) | |
5247 | return OPERAND_MATCH; | |
5248 | else | |
5249 | return OPERAND_OUT_OF_RANGE; | |
5250 | } | |
800eeca4 JW |
5251 | break; |
5252 | ||
5253 | case IA64_OPND_C8: | |
87f8eb97 JW |
5254 | if (e->X_op == O_constant) |
5255 | { | |
5256 | if (e->X_add_number == 8) | |
5257 | return OPERAND_MATCH; | |
5258 | else | |
5259 | return OPERAND_OUT_OF_RANGE; | |
5260 | } | |
800eeca4 JW |
5261 | break; |
5262 | ||
5263 | case IA64_OPND_C16: | |
87f8eb97 JW |
5264 | if (e->X_op == O_constant) |
5265 | { | |
5266 | if (e->X_add_number == 16) | |
5267 | return OPERAND_MATCH; | |
5268 | else | |
5269 | return OPERAND_OUT_OF_RANGE; | |
5270 | } | |
800eeca4 JW |
5271 | break; |
5272 | ||
542d6675 | 5273 | /* register operands: */ |
800eeca4 JW |
5274 | |
5275 | case IA64_OPND_AR3: | |
5276 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5277 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5278 | return OPERAND_MATCH; |
800eeca4 JW |
5279 | break; |
5280 | ||
5281 | case IA64_OPND_B1: | |
5282 | case IA64_OPND_B2: | |
5283 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5284 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5285 | return OPERAND_MATCH; |
800eeca4 JW |
5286 | break; |
5287 | ||
5288 | case IA64_OPND_CR3: | |
5289 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5290 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5291 | return OPERAND_MATCH; |
800eeca4 JW |
5292 | break; |
5293 | ||
5294 | case IA64_OPND_F1: | |
5295 | case IA64_OPND_F2: | |
5296 | case IA64_OPND_F3: | |
5297 | case IA64_OPND_F4: | |
5298 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5299 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5300 | return OPERAND_MATCH; |
800eeca4 JW |
5301 | break; |
5302 | ||
5303 | case IA64_OPND_P1: | |
5304 | case IA64_OPND_P2: | |
5305 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5306 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5307 | return OPERAND_MATCH; |
800eeca4 JW |
5308 | break; |
5309 | ||
5310 | case IA64_OPND_R1: | |
5311 | case IA64_OPND_R2: | |
5312 | case IA64_OPND_R3: | |
5313 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5314 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5315 | return OPERAND_MATCH; |
800eeca4 JW |
5316 | break; |
5317 | ||
5318 | case IA64_OPND_R3_2: | |
87f8eb97 | 5319 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5320 | { |
87f8eb97 JW |
5321 | if (e->X_add_number < REG_GR + 4) |
5322 | return OPERAND_MATCH; | |
5323 | else if (e->X_add_number < REG_GR + 128) | |
5324 | return OPERAND_OUT_OF_RANGE; | |
5325 | } | |
800eeca4 JW |
5326 | break; |
5327 | ||
542d6675 | 5328 | /* indirect operands: */ |
800eeca4 JW |
5329 | case IA64_OPND_CPUID_R3: |
5330 | case IA64_OPND_DBR_R3: | |
5331 | case IA64_OPND_DTR_R3: | |
5332 | case IA64_OPND_ITR_R3: | |
5333 | case IA64_OPND_IBR_R3: | |
5334 | case IA64_OPND_MSR_R3: | |
5335 | case IA64_OPND_PKR_R3: | |
5336 | case IA64_OPND_PMC_R3: | |
5337 | case IA64_OPND_PMD_R3: | |
5338 | case IA64_OPND_RR_R3: | |
5339 | if (e->X_op == O_index && e->X_op_symbol | |
5340 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5341 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5342 | return OPERAND_MATCH; |
800eeca4 JW |
5343 | break; |
5344 | ||
5345 | case IA64_OPND_MR3: | |
5346 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5347 | return OPERAND_MATCH; |
800eeca4 JW |
5348 | break; |
5349 | ||
542d6675 | 5350 | /* immediate operands: */ |
800eeca4 JW |
5351 | case IA64_OPND_CNT2a: |
5352 | case IA64_OPND_LEN4: | |
5353 | case IA64_OPND_LEN6: | |
5354 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5355 | if (e->X_op == O_constant) |
5356 | { | |
5357 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5358 | return OPERAND_MATCH; | |
5359 | else | |
5360 | return OPERAND_OUT_OF_RANGE; | |
5361 | } | |
800eeca4 JW |
5362 | break; |
5363 | ||
5364 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5365 | if (e->X_op == O_constant) |
5366 | { | |
5367 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5368 | return OPERAND_MATCH; | |
5369 | else | |
5370 | return OPERAND_OUT_OF_RANGE; | |
5371 | } | |
800eeca4 JW |
5372 | break; |
5373 | ||
5374 | case IA64_OPND_CNT2c: | |
5375 | val = e->X_add_number; | |
87f8eb97 JW |
5376 | if (e->X_op == O_constant) |
5377 | { | |
5378 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5379 | return OPERAND_MATCH; | |
5380 | else | |
5381 | return OPERAND_OUT_OF_RANGE; | |
5382 | } | |
800eeca4 JW |
5383 | break; |
5384 | ||
5385 | case IA64_OPND_SOR: | |
5386 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5387 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5388 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5389 | case IA64_OPND_SOF: |
5390 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5391 | if (e->X_op == O_constant) |
5392 | { | |
5393 | if ((bfd_vma) e->X_add_number <= 96) | |
5394 | return OPERAND_MATCH; | |
5395 | else | |
5396 | return OPERAND_OUT_OF_RANGE; | |
5397 | } | |
800eeca4 JW |
5398 | break; |
5399 | ||
5400 | case IA64_OPND_IMMU62: | |
5401 | if (e->X_op == O_constant) | |
542d6675 | 5402 | { |
800eeca4 | 5403 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5404 | return OPERAND_MATCH; |
5405 | else | |
5406 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5407 | } |
197865e8 | 5408 | else |
542d6675 KH |
5409 | { |
5410 | /* FIXME -- need 62-bit relocation type */ | |
5411 | as_bad (_("62-bit relocation not yet implemented")); | |
5412 | } | |
800eeca4 JW |
5413 | break; |
5414 | ||
5415 | case IA64_OPND_IMMU64: | |
5416 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5417 | || e->X_op == O_subtract) | |
5418 | { | |
5419 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5420 | fix->code = BFD_RELOC_IA64_IMM64; | |
5421 | if (e->X_op != O_subtract) | |
5422 | { | |
5423 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5424 | if (e->X_op == O_pseudo_fixup) | |
5425 | e->X_op = O_symbol; | |
5426 | } | |
5427 | ||
5428 | fix->opnd = idesc->operands[index]; | |
5429 | fix->expr = *e; | |
5430 | fix->is_pcrel = 0; | |
5431 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5432 | return OPERAND_MATCH; |
800eeca4 JW |
5433 | } |
5434 | else if (e->X_op == O_constant) | |
87f8eb97 | 5435 | return OPERAND_MATCH; |
800eeca4 JW |
5436 | break; |
5437 | ||
5438 | case IA64_OPND_CCNT5: | |
5439 | case IA64_OPND_CNT5: | |
5440 | case IA64_OPND_CNT6: | |
5441 | case IA64_OPND_CPOS6a: | |
5442 | case IA64_OPND_CPOS6b: | |
5443 | case IA64_OPND_CPOS6c: | |
5444 | case IA64_OPND_IMMU2: | |
5445 | case IA64_OPND_IMMU7a: | |
5446 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5447 | case IA64_OPND_IMMU21: |
5448 | case IA64_OPND_IMMU24: | |
5449 | case IA64_OPND_MBTYPE4: | |
5450 | case IA64_OPND_MHTYPE8: | |
5451 | case IA64_OPND_POS6: | |
5452 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5453 | if (e->X_op == O_constant) |
5454 | { | |
5455 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5456 | return OPERAND_MATCH; | |
5457 | else | |
5458 | return OPERAND_OUT_OF_RANGE; | |
5459 | } | |
800eeca4 JW |
5460 | break; |
5461 | ||
bf3ca999 TW |
5462 | case IA64_OPND_IMMU9: |
5463 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5464 | if (e->X_op == O_constant) |
542d6675 | 5465 | { |
87f8eb97 JW |
5466 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5467 | { | |
5468 | int lobits = e->X_add_number & 0x3; | |
5469 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5470 | e->X_add_number |= (bfd_vma) 0x3; | |
5471 | return OPERAND_MATCH; | |
5472 | } | |
5473 | else | |
5474 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5475 | } |
bf3ca999 TW |
5476 | break; |
5477 | ||
800eeca4 JW |
5478 | case IA64_OPND_IMM44: |
5479 | /* least 16 bits must be zero */ | |
5480 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5481 | /* XXX technically, this is wrong: we should not be issuing warning |
5482 | messages until we're sure this instruction pattern is going to | |
5483 | be used! */ | |
542d6675 | 5484 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5485 | |
87f8eb97 | 5486 | if (e->X_op == O_constant) |
542d6675 | 5487 | { |
87f8eb97 JW |
5488 | if (((e->X_add_number >= 0 |
5489 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5490 | || (e->X_add_number < 0 | |
5491 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5492 | { |
87f8eb97 JW |
5493 | /* sign-extend */ |
5494 | if (e->X_add_number >= 0 | |
5495 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5496 | { | |
5497 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5498 | } | |
5499 | return OPERAND_MATCH; | |
542d6675 | 5500 | } |
87f8eb97 JW |
5501 | else |
5502 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5503 | } |
800eeca4 JW |
5504 | break; |
5505 | ||
5506 | case IA64_OPND_IMM17: | |
5507 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5508 | if (e->X_op == O_constant) |
542d6675 | 5509 | { |
87f8eb97 JW |
5510 | if (((e->X_add_number >= 0 |
5511 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5512 | || (e->X_add_number < 0 | |
5513 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5514 | { |
87f8eb97 JW |
5515 | /* sign-extend */ |
5516 | if (e->X_add_number >= 0 | |
5517 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5518 | { | |
5519 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5520 | } | |
5521 | return OPERAND_MATCH; | |
542d6675 | 5522 | } |
87f8eb97 JW |
5523 | else |
5524 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5525 | } |
800eeca4 JW |
5526 | break; |
5527 | ||
5528 | case IA64_OPND_IMM14: | |
5529 | case IA64_OPND_IMM22: | |
5530 | relocatable = 1; | |
5531 | case IA64_OPND_IMM1: | |
5532 | case IA64_OPND_IMM8: | |
5533 | case IA64_OPND_IMM8U4: | |
5534 | case IA64_OPND_IMM8M1: | |
5535 | case IA64_OPND_IMM8M1U4: | |
5536 | case IA64_OPND_IMM8M1U8: | |
5537 | case IA64_OPND_IMM9a: | |
5538 | case IA64_OPND_IMM9b: | |
5539 | bits = operand_width (idesc->operands[index]); | |
5540 | if (relocatable && (e->X_op == O_symbol | |
5541 | || e->X_op == O_subtract | |
5542 | || e->X_op == O_pseudo_fixup)) | |
5543 | { | |
5544 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5545 | ||
5546 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5547 | fix->code = BFD_RELOC_IA64_IMM14; | |
5548 | else | |
5549 | fix->code = BFD_RELOC_IA64_IMM22; | |
5550 | ||
5551 | if (e->X_op != O_subtract) | |
5552 | { | |
5553 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5554 | if (e->X_op == O_pseudo_fixup) | |
5555 | e->X_op = O_symbol; | |
5556 | } | |
5557 | ||
5558 | fix->opnd = idesc->operands[index]; | |
5559 | fix->expr = *e; | |
5560 | fix->is_pcrel = 0; | |
5561 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5562 | return OPERAND_MATCH; |
800eeca4 JW |
5563 | } |
5564 | else if (e->X_op != O_constant | |
5565 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5566 | return OPERAND_MISMATCH; |
800eeca4 JW |
5567 | |
5568 | if (opnd == IA64_OPND_IMM8M1U4) | |
5569 | { | |
5570 | /* Zero is not valid for unsigned compares that take an adjusted | |
5571 | constant immediate range. */ | |
5572 | if (e->X_add_number == 0) | |
87f8eb97 | 5573 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5574 | |
5575 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5576 | checks will work. */ | |
5577 | val = e->X_add_number; | |
197865e8 KH |
5578 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5579 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5580 | val = ((val << 32) >> 32); |
5581 | ||
5582 | /* Check for 0x100000000. This is valid because | |
5583 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5584 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5585 | return OPERAND_MATCH; |
800eeca4 JW |
5586 | |
5587 | val = val - 1; | |
5588 | } | |
5589 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5590 | { | |
5591 | /* Zero is not valid for unsigned compares that take an adjusted | |
5592 | constant immediate range. */ | |
5593 | if (e->X_add_number == 0) | |
87f8eb97 | 5594 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5595 | |
5596 | /* Check for 0x10000000000000000. */ | |
5597 | if (e->X_op == O_big) | |
5598 | { | |
5599 | if (generic_bignum[0] == 0 | |
5600 | && generic_bignum[1] == 0 | |
5601 | && generic_bignum[2] == 0 | |
5602 | && generic_bignum[3] == 0 | |
5603 | && generic_bignum[4] == 1) | |
87f8eb97 | 5604 | return OPERAND_MATCH; |
800eeca4 | 5605 | else |
87f8eb97 | 5606 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5607 | } |
5608 | else | |
5609 | val = e->X_add_number - 1; | |
5610 | } | |
5611 | else if (opnd == IA64_OPND_IMM8M1) | |
5612 | val = e->X_add_number - 1; | |
5613 | else if (opnd == IA64_OPND_IMM8U4) | |
5614 | { | |
5615 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5616 | checks will work. */ | |
5617 | val = e->X_add_number; | |
197865e8 KH |
5618 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5619 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5620 | val = ((val << 32) >> 32); |
5621 | } | |
5622 | else | |
5623 | val = e->X_add_number; | |
5624 | ||
2434f565 JW |
5625 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5626 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5627 | return OPERAND_MATCH; |
5628 | else | |
5629 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5630 | |
5631 | case IA64_OPND_INC3: | |
5632 | /* +/- 1, 4, 8, 16 */ | |
5633 | val = e->X_add_number; | |
5634 | if (val < 0) | |
5635 | val = -val; | |
87f8eb97 JW |
5636 | if (e->X_op == O_constant) |
5637 | { | |
5638 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5639 | return OPERAND_MATCH; | |
5640 | else | |
5641 | return OPERAND_OUT_OF_RANGE; | |
5642 | } | |
800eeca4 JW |
5643 | break; |
5644 | ||
5645 | case IA64_OPND_TGT25: | |
5646 | case IA64_OPND_TGT25b: | |
5647 | case IA64_OPND_TGT25c: | |
5648 | case IA64_OPND_TGT64: | |
5649 | if (e->X_op == O_symbol) | |
5650 | { | |
5651 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5652 | if (opnd == IA64_OPND_TGT25) | |
5653 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5654 | else if (opnd == IA64_OPND_TGT25b) | |
5655 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5656 | else if (opnd == IA64_OPND_TGT25c) | |
5657 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5658 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5659 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5660 | else | |
5661 | abort (); | |
5662 | ||
800eeca4 JW |
5663 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5664 | fix->opnd = idesc->operands[index]; | |
5665 | fix->expr = *e; | |
5666 | fix->is_pcrel = 1; | |
5667 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5668 | return OPERAND_MATCH; |
800eeca4 JW |
5669 | } |
5670 | case IA64_OPND_TAG13: | |
5671 | case IA64_OPND_TAG13b: | |
5672 | switch (e->X_op) | |
5673 | { | |
5674 | case O_constant: | |
87f8eb97 | 5675 | return OPERAND_MATCH; |
800eeca4 JW |
5676 | |
5677 | case O_symbol: | |
5678 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5679 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5680 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5681 | fix->code = BFD_RELOC_UNUSED; | |
5682 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5683 | fix->opnd = idesc->operands[index]; |
5684 | fix->expr = *e; | |
5685 | fix->is_pcrel = 1; | |
5686 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5687 | return OPERAND_MATCH; |
800eeca4 JW |
5688 | |
5689 | default: | |
5690 | break; | |
5691 | } | |
5692 | break; | |
5693 | ||
a823923b RH |
5694 | case IA64_OPND_LDXMOV: |
5695 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5696 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5697 | fix->opnd = idesc->operands[index]; | |
5698 | fix->expr = *e; | |
5699 | fix->is_pcrel = 0; | |
5700 | ++CURR_SLOT.num_fixups; | |
5701 | return OPERAND_MATCH; | |
5702 | ||
800eeca4 JW |
5703 | default: |
5704 | break; | |
5705 | } | |
87f8eb97 | 5706 | return OPERAND_MISMATCH; |
800eeca4 JW |
5707 | } |
5708 | ||
5709 | static int | |
5710 | parse_operand (e) | |
5711 | expressionS *e; | |
5712 | { | |
5713 | int sep = '\0'; | |
5714 | ||
5715 | memset (e, 0, sizeof (*e)); | |
5716 | e->X_op = O_absent; | |
5717 | SKIP_WHITESPACE (); | |
5718 | if (*input_line_pointer != '}') | |
5719 | expression (e); | |
5720 | sep = *input_line_pointer++; | |
5721 | ||
5722 | if (sep == '}') | |
5723 | { | |
5724 | if (!md.manual_bundling) | |
5725 | as_warn ("Found '}' when manual bundling is off"); | |
5726 | else | |
5727 | CURR_SLOT.manual_bundling_off = 1; | |
5728 | md.manual_bundling = 0; | |
5729 | sep = '\0'; | |
5730 | } | |
5731 | return sep; | |
5732 | } | |
5733 | ||
5734 | /* Returns the next entry in the opcode table that matches the one in | |
5735 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5736 | found, NULL is returned instead. */ |
800eeca4 JW |
5737 | |
5738 | static struct ia64_opcode * | |
5739 | get_next_opcode (struct ia64_opcode *idesc) | |
5740 | { | |
5741 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
5742 | ia64_free_opcode (idesc); | |
5743 | return next; | |
5744 | } | |
5745 | ||
5746 | /* Parse the operands for the opcode and find the opcode variant that | |
5747 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
5748 | |
5749 | static struct ia64_opcode * | |
800eeca4 JW |
5750 | parse_operands (idesc) |
5751 | struct ia64_opcode *idesc; | |
5752 | { | |
5753 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 5754 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
800eeca4 | 5755 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 5756 | enum operand_match_result result; |
800eeca4 JW |
5757 | char mnemonic[129]; |
5758 | char *first_arg = 0, *end, *saved_input_pointer; | |
5759 | unsigned int sof; | |
5760 | ||
5761 | assert (strlen (idesc->name) <= 128); | |
5762 | ||
5763 | strcpy (mnemonic, idesc->name); | |
5764 | if (idesc->operands[2] == IA64_OPND_SOF) | |
5765 | { | |
5766 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
5767 | can't parse the first operand until we have parsed the | |
5768 | remaining operands of the "alloc" instruction. */ | |
5769 | SKIP_WHITESPACE (); | |
5770 | first_arg = input_line_pointer; | |
5771 | end = strchr (input_line_pointer, '='); | |
5772 | if (!end) | |
5773 | { | |
5774 | as_bad ("Expected separator `='"); | |
5775 | return 0; | |
5776 | } | |
5777 | input_line_pointer = end + 1; | |
5778 | ++i; | |
5779 | ++num_outputs; | |
5780 | } | |
5781 | ||
5782 | for (; i < NELEMS (CURR_SLOT.opnd); ++i) | |
5783 | { | |
5784 | sep = parse_operand (CURR_SLOT.opnd + i); | |
5785 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
5786 | break; | |
5787 | ||
5788 | ++num_operands; | |
5789 | ||
5790 | if (sep != '=' && sep != ',') | |
5791 | break; | |
5792 | ||
5793 | if (sep == '=') | |
5794 | { | |
5795 | if (num_outputs > 0) | |
5796 | as_bad ("Duplicate equal sign (=) in instruction"); | |
5797 | else | |
5798 | num_outputs = i + 1; | |
5799 | } | |
5800 | } | |
5801 | if (sep != '\0') | |
5802 | { | |
5803 | as_bad ("Illegal operand separator `%c'", sep); | |
5804 | return 0; | |
5805 | } | |
197865e8 | 5806 | |
800eeca4 JW |
5807 | if (idesc->operands[2] == IA64_OPND_SOF) |
5808 | { | |
5809 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
5810 | know (strcmp (idesc->name, "alloc") == 0); | |
5811 | if (num_operands == 5 /* first_arg not included in this count! */ | |
5812 | && CURR_SLOT.opnd[2].X_op == O_constant | |
5813 | && CURR_SLOT.opnd[3].X_op == O_constant | |
5814 | && CURR_SLOT.opnd[4].X_op == O_constant | |
5815 | && CURR_SLOT.opnd[5].X_op == O_constant) | |
5816 | { | |
5817 | sof = set_regstack (CURR_SLOT.opnd[2].X_add_number, | |
5818 | CURR_SLOT.opnd[3].X_add_number, | |
5819 | CURR_SLOT.opnd[4].X_add_number, | |
5820 | CURR_SLOT.opnd[5].X_add_number); | |
5821 | ||
542d6675 | 5822 | /* now we can parse the first arg: */ |
800eeca4 JW |
5823 | saved_input_pointer = input_line_pointer; |
5824 | input_line_pointer = first_arg; | |
5825 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
5826 | if (sep != '=') | |
5827 | --num_outputs; /* force error */ | |
5828 | input_line_pointer = saved_input_pointer; | |
5829 | ||
5830 | CURR_SLOT.opnd[2].X_add_number = sof; | |
5831 | CURR_SLOT.opnd[3].X_add_number | |
5832 | = sof - CURR_SLOT.opnd[4].X_add_number; | |
5833 | CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5]; | |
5834 | } | |
5835 | } | |
5836 | ||
5837 | highest_unmatched_operand = 0; | |
87f8eb97 JW |
5838 | curr_out_of_range_pos = -1; |
5839 | error_pos = 0; | |
800eeca4 JW |
5840 | expected_operand = idesc->operands[0]; |
5841 | for (; idesc; idesc = get_next_opcode (idesc)) | |
5842 | { | |
5843 | if (num_outputs != idesc->num_outputs) | |
5844 | continue; /* mismatch in # of outputs */ | |
5845 | ||
5846 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
5847 | |
5848 | /* Try to match all operands. If we see an out-of-range operand, | |
5849 | then continue trying to match the rest of the operands, since if | |
5850 | the rest match, then this idesc will give the best error message. */ | |
5851 | ||
5852 | out_of_range_pos = -1; | |
800eeca4 | 5853 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
5854 | { |
5855 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
5856 | if (result != OPERAND_MATCH) | |
5857 | { | |
5858 | if (result != OPERAND_OUT_OF_RANGE) | |
5859 | break; | |
5860 | if (out_of_range_pos < 0) | |
5861 | /* remember position of the first out-of-range operand: */ | |
5862 | out_of_range_pos = i; | |
5863 | } | |
5864 | } | |
800eeca4 | 5865 | |
87f8eb97 JW |
5866 | /* If we did not match all operands, or if at least one operand was |
5867 | out-of-range, then this idesc does not match. Keep track of which | |
5868 | idesc matched the most operands before failing. If we have two | |
5869 | idescs that failed at the same position, and one had an out-of-range | |
5870 | operand, then prefer the out-of-range operand. Thus if we have | |
5871 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
5872 | of range instead of an error saying that the constant should have been | |
5873 | a register. */ | |
5874 | ||
5875 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 5876 | { |
87f8eb97 JW |
5877 | if (i > highest_unmatched_operand |
5878 | || (i == highest_unmatched_operand | |
5879 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
5880 | { |
5881 | highest_unmatched_operand = i; | |
87f8eb97 JW |
5882 | if (out_of_range_pos >= 0) |
5883 | { | |
5884 | expected_operand = idesc->operands[out_of_range_pos]; | |
5885 | error_pos = out_of_range_pos; | |
5886 | } | |
5887 | else | |
5888 | { | |
5889 | expected_operand = idesc->operands[i]; | |
5890 | error_pos = i; | |
5891 | } | |
5892 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
5893 | } |
5894 | continue; | |
5895 | } | |
5896 | ||
5897 | if (num_operands < NELEMS (idesc->operands) | |
5898 | && idesc->operands[num_operands]) | |
5899 | continue; /* mismatch in number of arguments */ | |
5900 | ||
5901 | break; | |
5902 | } | |
5903 | if (!idesc) | |
5904 | { | |
5905 | if (expected_operand) | |
5906 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 5907 | error_pos + 1, mnemonic, |
800eeca4 JW |
5908 | elf64_ia64_operands[expected_operand].desc); |
5909 | else | |
5910 | as_bad ("Operand mismatch"); | |
5911 | return 0; | |
5912 | } | |
5913 | return idesc; | |
5914 | } | |
5915 | ||
88be23ec BS |
5916 | /* Keep track of state necessary to determine whether a NOP is necessary |
5917 | to avoid an erratum in A and B step Itanium chips, and return 1 if we | |
5918 | detect a case where additional NOPs may be necessary. */ | |
5919 | static int | |
5920 | errata_nop_necessary_p (slot, insn_unit) | |
5921 | struct slot *slot; | |
5922 | enum ia64_unit insn_unit; | |
5923 | { | |
5924 | int i; | |
5925 | struct group *this_group = md.last_groups + md.group_idx; | |
5926 | struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3; | |
5927 | struct ia64_opcode *idesc = slot->idesc; | |
5928 | ||
5929 | /* Test whether this could be the first insn in a problematic sequence. */ | |
5930 | if (insn_unit == IA64_UNIT_F) | |
5931 | { | |
5932 | for (i = 0; i < idesc->num_outputs; i++) | |
5933 | if (idesc->operands[i] == IA64_OPND_P1 | |
5934 | || idesc->operands[i] == IA64_OPND_P2) | |
5935 | { | |
5936 | int regno = slot->opnd[i].X_add_number - REG_P; | |
3557da92 | 5937 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5938 | if (regno >= 64) |
3557da92 | 5939 | return 0; |
88be23ec BS |
5940 | this_group->p_reg_set[regno] = 1; |
5941 | } | |
5942 | } | |
5943 | ||
5944 | /* Test whether this could be the second insn in a problematic sequence. */ | |
5945 | if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0 | |
5946 | && prev_group->p_reg_set[slot->qp_regno]) | |
5947 | { | |
5948 | for (i = 0; i < idesc->num_outputs; i++) | |
5949 | if (idesc->operands[i] == IA64_OPND_R1 | |
5950 | || idesc->operands[i] == IA64_OPND_R2 | |
5951 | || idesc->operands[i] == IA64_OPND_R3) | |
5952 | { | |
5953 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5954 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5955 | if (regno >= 128) |
3557da92 | 5956 | return 0; |
88be23ec BS |
5957 | if (strncmp (idesc->name, "add", 3) != 0 |
5958 | && strncmp (idesc->name, "sub", 3) != 0 | |
5959 | && strncmp (idesc->name, "shladd", 6) != 0 | |
5960 | && (idesc->flags & IA64_OPCODE_POSTINC) == 0) | |
5961 | this_group->g_reg_set_conditionally[regno] = 1; | |
5962 | } | |
5963 | } | |
5964 | ||
5965 | /* Test whether this could be the third insn in a problematic sequence. */ | |
5966 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++) | |
5967 | { | |
5968 | if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */ | |
5969 | idesc->operands[i] == IA64_OPND_R3 | |
5970 | /* For mov indirect. */ | |
5971 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
5972 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
5973 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
5974 | || idesc->operands[i] == IA64_OPND_PKR_R3 | |
5975 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
5976 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
5977 | || idesc->operands[i] == IA64_OPND_MSR_R3 | |
5978 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
5979 | /* For itr. */ | |
5980 | || idesc->operands[i] == IA64_OPND_ITR_R3 | |
5981 | || idesc->operands[i] == IA64_OPND_DTR_R3 | |
5982 | /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */ | |
5983 | || idesc->operands[i] == IA64_OPND_MR3) | |
5984 | { | |
5985 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5986 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5987 | if (regno >= 128) |
3557da92 | 5988 | return 0; |
88be23ec BS |
5989 | if (idesc->operands[i] == IA64_OPND_R3) |
5990 | { | |
5991 | if (strcmp (idesc->name, "fc") != 0 | |
5992 | && strcmp (idesc->name, "tak") != 0 | |
5993 | && strcmp (idesc->name, "thash") != 0 | |
5994 | && strcmp (idesc->name, "tpa") != 0 | |
5995 | && strcmp (idesc->name, "ttag") != 0 | |
5996 | && strncmp (idesc->name, "ptr", 3) != 0 | |
5997 | && strncmp (idesc->name, "ptc", 3) != 0 | |
5998 | && strncmp (idesc->name, "probe", 5) != 0) | |
40449e9f | 5999 | return 0; |
88be23ec | 6000 | } |
bc805888 | 6001 | if (prev_group->g_reg_set_conditionally[regno]) |
88be23ec BS |
6002 | return 1; |
6003 | } | |
6004 | } | |
6005 | return 0; | |
6006 | } | |
6007 | ||
800eeca4 JW |
6008 | static void |
6009 | build_insn (slot, insnp) | |
6010 | struct slot *slot; | |
6011 | bfd_vma *insnp; | |
6012 | { | |
6013 | const struct ia64_operand *odesc, *o2desc; | |
6014 | struct ia64_opcode *idesc = slot->idesc; | |
6015 | bfd_signed_vma insn, val; | |
6016 | const char *err; | |
6017 | int i; | |
6018 | ||
6019 | insn = idesc->opcode | slot->qp_regno; | |
6020 | ||
6021 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6022 | { | |
c67e42c9 RH |
6023 | if (slot->opnd[i].X_op == O_register |
6024 | || slot->opnd[i].X_op == O_constant | |
6025 | || slot->opnd[i].X_op == O_index) | |
6026 | val = slot->opnd[i].X_add_number; | |
6027 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6028 | { |
c67e42c9 RH |
6029 | /* This must be the value 0x10000000000000000. */ |
6030 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6031 | val = 0; | |
6032 | } | |
6033 | else | |
6034 | val = 0; | |
6035 | ||
6036 | switch (idesc->operands[i]) | |
6037 | { | |
6038 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6039 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6040 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6041 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6042 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6043 | continue; |
6044 | ||
6045 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6046 | val &= 0x3fffffffffffffffULL; |
6047 | if (val != slot->opnd[i].X_add_number) | |
6048 | as_warn (_("Value truncated to 62 bits")); | |
6049 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6050 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6051 | continue; |
800eeca4 | 6052 | |
c67e42c9 RH |
6053 | case IA64_OPND_TGT64: |
6054 | val >>= 4; | |
6055 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6056 | insn |= ((((val >> 59) & 0x1) << 36) | |
6057 | | (((val >> 0) & 0xfffff) << 13)); | |
6058 | continue; | |
800eeca4 | 6059 | |
c67e42c9 RH |
6060 | case IA64_OPND_AR3: |
6061 | val -= REG_AR; | |
6062 | break; | |
6063 | ||
6064 | case IA64_OPND_B1: | |
6065 | case IA64_OPND_B2: | |
6066 | val -= REG_BR; | |
6067 | break; | |
6068 | ||
6069 | case IA64_OPND_CR3: | |
6070 | val -= REG_CR; | |
6071 | break; | |
6072 | ||
6073 | case IA64_OPND_F1: | |
6074 | case IA64_OPND_F2: | |
6075 | case IA64_OPND_F3: | |
6076 | case IA64_OPND_F4: | |
6077 | val -= REG_FR; | |
6078 | break; | |
6079 | ||
6080 | case IA64_OPND_P1: | |
6081 | case IA64_OPND_P2: | |
6082 | val -= REG_P; | |
6083 | break; | |
6084 | ||
6085 | case IA64_OPND_R1: | |
6086 | case IA64_OPND_R2: | |
6087 | case IA64_OPND_R3: | |
6088 | case IA64_OPND_R3_2: | |
6089 | case IA64_OPND_CPUID_R3: | |
6090 | case IA64_OPND_DBR_R3: | |
6091 | case IA64_OPND_DTR_R3: | |
6092 | case IA64_OPND_ITR_R3: | |
6093 | case IA64_OPND_IBR_R3: | |
6094 | case IA64_OPND_MR3: | |
6095 | case IA64_OPND_MSR_R3: | |
6096 | case IA64_OPND_PKR_R3: | |
6097 | case IA64_OPND_PMC_R3: | |
6098 | case IA64_OPND_PMD_R3: | |
197865e8 | 6099 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6100 | val -= REG_GR; |
6101 | break; | |
6102 | ||
6103 | default: | |
6104 | break; | |
6105 | } | |
6106 | ||
6107 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6108 | err = (*odesc->insert) (odesc, val, &insn); | |
6109 | if (err) | |
6110 | as_bad_where (slot->src_file, slot->src_line, | |
6111 | "Bad operand value: %s", err); | |
6112 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6113 | { | |
6114 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6115 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6116 | { | |
6117 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6118 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6119 | } |
c67e42c9 RH |
6120 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6121 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6122 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6123 | { |
c67e42c9 RH |
6124 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6125 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6126 | } |
6127 | } | |
6128 | } | |
6129 | *insnp = insn; | |
6130 | } | |
6131 | ||
6132 | static void | |
6133 | emit_one_bundle () | |
6134 | { | |
6135 | unsigned int manual_bundling_on = 0, manual_bundling_off = 0; | |
6136 | unsigned int manual_bundling = 0; | |
6137 | enum ia64_unit required_unit, insn_unit = 0; | |
6138 | enum ia64_insn_type type[3], insn_type; | |
6139 | unsigned int template, orig_template; | |
542d6675 | 6140 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6141 | struct ia64_opcode *idesc; |
6142 | int end_of_insn_group = 0, user_template = -1; | |
6143 | int n, i, j, first, curr; | |
d6e78c11 | 6144 | unw_rec_list *ptr, *last_ptr, *end_ptr; |
800eeca4 JW |
6145 | bfd_vma t0 = 0, t1 = 0; |
6146 | struct label_fix *lfix; | |
6147 | struct insn_fix *ifix; | |
6148 | char mnemonic[16]; | |
6149 | fixS *fix; | |
6150 | char *f; | |
5a9ff93d | 6151 | int addr_mod; |
800eeca4 JW |
6152 | |
6153 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6154 | know (first >= 0 & first < NUM_SLOTS); | |
6155 | n = MIN (3, md.num_slots_in_use); | |
6156 | ||
6157 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6158 | otherwise: */ |
800eeca4 JW |
6159 | |
6160 | if (md.slot[first].user_template >= 0) | |
6161 | user_template = template = md.slot[first].user_template; | |
6162 | else | |
6163 | { | |
032efc85 | 6164 | /* Auto select appropriate template. */ |
800eeca4 JW |
6165 | memset (type, 0, sizeof (type)); |
6166 | curr = first; | |
6167 | for (i = 0; i < n; ++i) | |
6168 | { | |
032efc85 RH |
6169 | if (md.slot[curr].label_fixups && i != 0) |
6170 | break; | |
800eeca4 JW |
6171 | type[i] = md.slot[curr].idesc->type; |
6172 | curr = (curr + 1) % NUM_SLOTS; | |
6173 | } | |
6174 | template = best_template[type[0]][type[1]][type[2]]; | |
6175 | } | |
6176 | ||
542d6675 | 6177 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6178 | for (i = 0; i < 3; ++i) |
6179 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6180 | ||
6181 | f = frag_more (16); | |
6182 | ||
5a9ff93d JW |
6183 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6184 | from the start of the frag. */ | |
6185 | addr_mod = frag_now_fix () & 15; | |
6186 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6187 | as_bad (_("instruction address is not a multiple of 16")); | |
6188 | frag_now->insn_addr = addr_mod; | |
6189 | frag_now->has_code = 1; | |
6190 | ||
542d6675 | 6191 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6192 | curr = first; |
6193 | idesc = md.slot[curr].idesc; | |
6194 | end_of_insn_group = 0; | |
6195 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) | |
6196 | { | |
d6e78c11 JW |
6197 | /* If we have unwind records, we may need to update some now. */ |
6198 | ptr = md.slot[curr].unwind_record; | |
6199 | if (ptr) | |
6200 | { | |
6201 | /* Find the last prologue/body record in the list for the current | |
6202 | insn, and set the slot number for all records up to that point. | |
6203 | This needs to be done now, because prologue/body records refer to | |
6204 | the current point, not the point after the instruction has been | |
6205 | issued. This matters because there may have been nops emitted | |
6206 | meanwhile. Any non-prologue non-body record followed by a | |
6207 | prologue/body record must also refer to the current point. */ | |
6208 | last_ptr = NULL; | |
6209 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6210 | for (; ptr != end_ptr; ptr = ptr->next) | |
6211 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
6212 | || ptr->r.type == body) | |
6213 | last_ptr = ptr; | |
6214 | if (last_ptr) | |
6215 | { | |
6216 | /* Make last_ptr point one after the last prologue/body | |
6217 | record. */ | |
6218 | last_ptr = last_ptr->next; | |
6219 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6220 | ptr = ptr->next) | |
6221 | { | |
6222 | ptr->slot_number = (unsigned long) f + i; | |
6223 | ptr->slot_frag = frag_now; | |
6224 | } | |
6225 | /* Remove the initialized records, so that we won't accidentally | |
6226 | update them again if we insert a nop and continue. */ | |
6227 | md.slot[curr].unwind_record = last_ptr; | |
6228 | } | |
6229 | } | |
e0c9811a | 6230 | |
800eeca4 JW |
6231 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6232 | { | |
6233 | if (manual_bundling && i != 2) | |
6234 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6235 | "`%s' must be last in bundle", idesc->name); | |
6236 | else | |
6237 | i = 2; | |
6238 | } | |
6239 | if (idesc->flags & IA64_OPCODE_LAST) | |
6240 | { | |
2434f565 JW |
6241 | int required_slot; |
6242 | unsigned int required_template; | |
800eeca4 JW |
6243 | |
6244 | /* If we need a stop bit after an M slot, our only choice is | |
6245 | template 5 (M;;MI). If we need a stop bit after a B | |
6246 | slot, our only choice is to place it at the end of the | |
6247 | bundle, because the only available templates are MIB, | |
6248 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6249 | than M and B slots because these are the only kind of | |
6250 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6251 | required_template = template; | |
6252 | switch (idesc->type) | |
6253 | { | |
6254 | case IA64_TYPE_M: | |
6255 | required_slot = 0; | |
6256 | required_template = 5; | |
6257 | break; | |
6258 | ||
6259 | case IA64_TYPE_B: | |
6260 | required_slot = 2; | |
6261 | break; | |
6262 | ||
6263 | default: | |
6264 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6265 | "Internal error: don't know how to force %s to end" | |
6266 | "of instruction group", idesc->name); | |
6267 | required_slot = i; | |
6268 | break; | |
6269 | } | |
6270 | if (manual_bundling && i != required_slot) | |
6271 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6272 | "`%s' must be last in instruction group", | |
6273 | idesc->name); | |
6274 | if (required_slot < i) | |
6275 | /* Can't fit this instruction. */ | |
6276 | break; | |
6277 | ||
6278 | i = required_slot; | |
6279 | if (required_template != template) | |
6280 | { | |
6281 | /* If we switch the template, we need to reset the NOPs | |
6282 | after slot i. The slot-types of the instructions ahead | |
6283 | of i never change, so we don't need to worry about | |
6284 | changing NOPs in front of this slot. */ | |
6285 | for (j = i; j < 3; ++j) | |
6286 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6287 | } | |
6288 | template = required_template; | |
6289 | } | |
6290 | if (curr != first && md.slot[curr].label_fixups) | |
6291 | { | |
6292 | if (manual_bundling_on) | |
6293 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6294 | "Label must be first in a bundle"); | |
6295 | /* This insn must go into the first slot of a bundle. */ | |
6296 | break; | |
6297 | } | |
6298 | ||
6299 | manual_bundling_on = md.slot[curr].manual_bundling_on; | |
6300 | manual_bundling_off = md.slot[curr].manual_bundling_off; | |
6301 | ||
6302 | if (manual_bundling_on) | |
6303 | { | |
6304 | if (curr == first) | |
6305 | manual_bundling = 1; | |
6306 | else | |
6307 | break; /* need to start a new bundle */ | |
6308 | } | |
6309 | ||
6310 | if (end_of_insn_group && md.num_slots_in_use >= 1) | |
6311 | { | |
6312 | /* We need an instruction group boundary in the middle of a | |
6313 | bundle. See if we can switch to an other template with | |
6314 | an appropriate boundary. */ | |
6315 | ||
6316 | orig_template = template; | |
6317 | if (i == 1 && (user_template == 4 | |
6318 | || (user_template < 0 | |
6319 | && (ia64_templ_desc[template].exec_unit[0] | |
6320 | == IA64_UNIT_M)))) | |
6321 | { | |
6322 | template = 5; | |
6323 | end_of_insn_group = 0; | |
6324 | } | |
6325 | else if (i == 2 && (user_template == 0 | |
6326 | || (user_template < 0 | |
6327 | && (ia64_templ_desc[template].exec_unit[1] | |
6328 | == IA64_UNIT_I))) | |
6329 | /* This test makes sure we don't switch the template if | |
6330 | the next instruction is one that needs to be first in | |
6331 | an instruction group. Since all those instructions are | |
6332 | in the M group, there is no way such an instruction can | |
6333 | fit in this bundle even if we switch the template. The | |
6334 | reason we have to check for this is that otherwise we | |
6335 | may end up generating "MI;;I M.." which has the deadly | |
6336 | effect that the second M instruction is no longer the | |
6337 | first in the bundle! --davidm 99/12/16 */ | |
6338 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) | |
6339 | { | |
6340 | template = 1; | |
6341 | end_of_insn_group = 0; | |
6342 | } | |
6343 | else if (curr != first) | |
6344 | /* can't fit this insn */ | |
6345 | break; | |
6346 | ||
6347 | if (template != orig_template) | |
6348 | /* if we switch the template, we need to reset the NOPs | |
6349 | after slot i. The slot-types of the instructions ahead | |
6350 | of i never change, so we don't need to worry about | |
6351 | changing NOPs in front of this slot. */ | |
6352 | for (j = i; j < 3; ++j) | |
6353 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6354 | } | |
6355 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6356 | ||
c10d9d8f | 6357 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6358 | if (idesc->type == IA64_TYPE_DYN) |
6359 | { | |
6360 | if ((strcmp (idesc->name, "nop") == 0) | |
c10d9d8f | 6361 | || (strcmp (idesc->name, "hint") == 0) |
800eeca4 JW |
6362 | || (strcmp (idesc->name, "break") == 0)) |
6363 | insn_unit = required_unit; | |
6364 | else if (strcmp (idesc->name, "chk.s") == 0) | |
6365 | { | |
6366 | insn_unit = IA64_UNIT_M; | |
6367 | if (required_unit == IA64_UNIT_I) | |
6368 | insn_unit = IA64_UNIT_I; | |
6369 | } | |
6370 | else | |
6371 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6372 | ||
6373 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]); | |
3d56ab85 | 6374 | ia64_free_opcode (idesc); |
800eeca4 JW |
6375 | md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic); |
6376 | #if 0 | |
6377 | know (!idesc->next); /* no resolved dynamic ops have collisions */ | |
6378 | #endif | |
6379 | } | |
6380 | else | |
6381 | { | |
6382 | insn_type = idesc->type; | |
6383 | insn_unit = IA64_UNIT_NIL; | |
6384 | switch (insn_type) | |
6385 | { | |
6386 | case IA64_TYPE_A: | |
6387 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6388 | insn_unit = required_unit; | |
6389 | break; | |
542d6675 | 6390 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6391 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6392 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6393 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6394 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6395 | default: break; | |
6396 | } | |
6397 | } | |
6398 | ||
6399 | if (insn_unit != required_unit) | |
6400 | { | |
6401 | if (required_unit == IA64_UNIT_L | |
542d6675 | 6402 | && insn_unit == IA64_UNIT_I |
800eeca4 JW |
6403 | && !(idesc->flags & IA64_OPCODE_X_IN_MLX)) |
6404 | { | |
6405 | /* we got ourselves an MLX template but the current | |
197865e8 | 6406 | instruction isn't an X-unit, or an I-unit instruction |
800eeca4 JW |
6407 | that can go into the X slot of an MLX template. Duh. */ |
6408 | if (md.num_slots_in_use >= NUM_SLOTS) | |
6409 | { | |
6410 | as_bad_where (md.slot[curr].src_file, | |
6411 | md.slot[curr].src_line, | |
6412 | "`%s' can't go in X slot of " | |
6413 | "MLX template", idesc->name); | |
542d6675 | 6414 | /* drop this insn so we don't livelock: */ |
800eeca4 JW |
6415 | --md.num_slots_in_use; |
6416 | } | |
6417 | break; | |
6418 | } | |
6419 | continue; /* try next slot */ | |
6420 | } | |
6421 | ||
40449e9f KH |
6422 | { |
6423 | bfd_vma addr; | |
800eeca4 | 6424 | |
40449e9f KH |
6425 | addr = frag_now->fr_address + frag_now_fix () - 16 + i; |
6426 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6427 | } | |
800eeca4 | 6428 | |
88be23ec BS |
6429 | if (errata_nop_necessary_p (md.slot + curr, insn_unit)) |
6430 | as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata")); | |
6431 | ||
800eeca4 JW |
6432 | build_insn (md.slot + curr, insn + i); |
6433 | ||
d6e78c11 JW |
6434 | ptr = md.slot[curr].unwind_record; |
6435 | if (ptr) | |
6436 | { | |
6437 | /* Set slot numbers for all remaining unwind records belonging to the | |
6438 | current insn. There can not be any prologue/body unwind records | |
6439 | here. */ | |
6440 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6441 | for (; ptr != end_ptr; ptr = ptr->next) | |
6442 | { | |
6443 | ptr->slot_number = (unsigned long) f + i; | |
6444 | ptr->slot_frag = frag_now; | |
6445 | } | |
6446 | md.slot[curr].unwind_record = NULL; | |
6447 | } | |
10850f29 | 6448 | |
800eeca4 JW |
6449 | if (required_unit == IA64_UNIT_L) |
6450 | { | |
6451 | know (i == 1); | |
6452 | /* skip one slot for long/X-unit instructions */ | |
6453 | ++i; | |
6454 | } | |
6455 | --md.num_slots_in_use; | |
6456 | ||
542d6675 | 6457 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6458 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6459 | { | |
6460 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6461 | symbol_set_frag (lfix->sym, frag_now); | |
6462 | } | |
f1bcba5b JW |
6463 | /* and fix up the tags also. */ |
6464 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6465 | { | |
6466 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6467 | symbol_set_frag (lfix->sym, frag_now); | |
6468 | } | |
800eeca4 JW |
6469 | |
6470 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6471 | { | |
6472 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6473 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6474 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6475 | fix->tc_fix_data.opnd = ifix->opnd; | |
6476 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6477 | fix->fx_file = md.slot[curr].src_file; | |
6478 | fix->fx_line = md.slot[curr].src_line; | |
6479 | } | |
6480 | ||
6481 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6482 | ||
88be23ec BS |
6483 | if (end_of_insn_group) |
6484 | { | |
6485 | md.group_idx = (md.group_idx + 1) % 3; | |
6486 | memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]); | |
6487 | } | |
6488 | ||
542d6675 | 6489 | /* clear slot: */ |
800eeca4 JW |
6490 | ia64_free_opcode (md.slot[curr].idesc); |
6491 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6492 | md.slot[curr].user_template = -1; | |
6493 | ||
6494 | if (manual_bundling_off) | |
6495 | { | |
6496 | manual_bundling = 0; | |
6497 | break; | |
6498 | } | |
6499 | curr = (curr + 1) % NUM_SLOTS; | |
6500 | idesc = md.slot[curr].idesc; | |
6501 | } | |
6502 | if (manual_bundling) | |
6503 | { | |
6504 | if (md.num_slots_in_use > 0) | |
ac025970 L |
6505 | { |
6506 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6507 | "`%s' does not fit into %s template", | |
6508 | idesc->name, ia64_templ_desc[template].name); | |
6509 | --md.num_slots_in_use; | |
6510 | } | |
800eeca4 JW |
6511 | else |
6512 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6513 | "Missing '}' at end of file"); | |
6514 | } | |
6515 | know (md.num_slots_in_use < NUM_SLOTS); | |
6516 | ||
6517 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6518 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6519 | ||
44f5c83a JW |
6520 | number_to_chars_littleendian (f + 0, t0, 8); |
6521 | number_to_chars_littleendian (f + 8, t1, 8); | |
f5a30c2e | 6522 | |
73f20958 L |
6523 | if (unwind.list) |
6524 | { | |
127cab00 L |
6525 | unwind.list->next_slot_number = (unsigned long) f + 16; |
6526 | unwind.list->next_slot_frag = frag_now; | |
73f20958 | 6527 | } |
800eeca4 JW |
6528 | } |
6529 | ||
6530 | int | |
6531 | md_parse_option (c, arg) | |
6532 | int c; | |
6533 | char *arg; | |
6534 | { | |
7463c317 | 6535 | |
800eeca4 JW |
6536 | switch (c) |
6537 | { | |
c43c2cc5 | 6538 | /* Switches from the Intel assembler. */ |
44f5c83a | 6539 | case 'm': |
800eeca4 JW |
6540 | if (strcmp (arg, "ilp64") == 0 |
6541 | || strcmp (arg, "lp64") == 0 | |
6542 | || strcmp (arg, "p64") == 0) | |
6543 | { | |
6544 | md.flags |= EF_IA_64_ABI64; | |
6545 | } | |
6546 | else if (strcmp (arg, "ilp32") == 0) | |
6547 | { | |
6548 | md.flags &= ~EF_IA_64_ABI64; | |
6549 | } | |
6550 | else if (strcmp (arg, "le") == 0) | |
6551 | { | |
6552 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6553 | default_big_endian = 0; |
800eeca4 JW |
6554 | } |
6555 | else if (strcmp (arg, "be") == 0) | |
6556 | { | |
6557 | md.flags |= EF_IA_64_BE; | |
549f748d | 6558 | default_big_endian = 1; |
800eeca4 JW |
6559 | } |
6560 | else | |
6561 | return 0; | |
6562 | break; | |
6563 | ||
6564 | case 'N': | |
6565 | if (strcmp (arg, "so") == 0) | |
6566 | { | |
542d6675 | 6567 | /* Suppress signon message. */ |
800eeca4 JW |
6568 | } |
6569 | else if (strcmp (arg, "pi") == 0) | |
6570 | { | |
6571 | /* Reject privileged instructions. FIXME */ | |
6572 | } | |
6573 | else if (strcmp (arg, "us") == 0) | |
6574 | { | |
6575 | /* Allow union of signed and unsigned range. FIXME */ | |
6576 | } | |
6577 | else if (strcmp (arg, "close_fcalls") == 0) | |
6578 | { | |
6579 | /* Do not resolve global function calls. */ | |
6580 | } | |
6581 | else | |
6582 | return 0; | |
6583 | break; | |
6584 | ||
6585 | case 'C': | |
6586 | /* temp[="prefix"] Insert temporary labels into the object file | |
6587 | symbol table prefixed by "prefix". | |
6588 | Default prefix is ":temp:". | |
6589 | */ | |
6590 | break; | |
6591 | ||
6592 | case 'a': | |
800eeca4 JW |
6593 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6594 | according to <tgt> -- | |
6595 | exit: branch out from the current context (default) | |
6596 | labels: all labels in context may be branch targets | |
6597 | */ | |
85b40035 L |
6598 | if (strncmp (arg, "indirect=", 9) != 0) |
6599 | return 0; | |
800eeca4 JW |
6600 | break; |
6601 | ||
6602 | case 'x': | |
6603 | /* -X conflicts with an ignored option, use -x instead */ | |
6604 | md.detect_dv = 1; | |
6605 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6606 | { |
6607 | /* set default mode to explicit */ | |
6608 | md.default_explicit_mode = 1; | |
6609 | break; | |
6610 | } | |
800eeca4 | 6611 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6612 | { |
6613 | md.default_explicit_mode = 0; | |
6614 | } | |
800eeca4 | 6615 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6616 | { |
6617 | md.debug_dv = 1; | |
6618 | } | |
800eeca4 | 6619 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6620 | { |
6621 | md.default_explicit_mode = 1; | |
6622 | md.debug_dv = 1; | |
6623 | } | |
800eeca4 | 6624 | else |
542d6675 KH |
6625 | { |
6626 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6627 | } | |
800eeca4 JW |
6628 | break; |
6629 | ||
6630 | case 'S': | |
6631 | /* nops Print nops statistics. */ | |
6632 | break; | |
6633 | ||
c43c2cc5 JW |
6634 | /* GNU specific switches for gcc. */ |
6635 | case OPTION_MCONSTANT_GP: | |
6636 | md.flags |= EF_IA_64_CONS_GP; | |
6637 | break; | |
6638 | ||
6639 | case OPTION_MAUTO_PIC: | |
6640 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6641 | break; | |
6642 | ||
800eeca4 JW |
6643 | default: |
6644 | return 0; | |
6645 | } | |
6646 | ||
6647 | return 1; | |
6648 | } | |
6649 | ||
6650 | void | |
6651 | md_show_usage (stream) | |
6652 | FILE *stream; | |
6653 | { | |
542d6675 | 6654 | fputs (_("\ |
800eeca4 | 6655 | IA-64 options:\n\ |
6290819d NC |
6656 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6657 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6658 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6659 | without function descriptors (sets ELF header flag\n\ | |
6660 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6661 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6662 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
800eeca4 JW |
6663 | -x | -xexplicit turn on dependency violation checking (default)\n\ |
6664 | -xauto automagically remove dependency violations\n\ | |
6665 | -xdebug debug dependency violation checker\n"), | |
6666 | stream); | |
6667 | } | |
6668 | ||
acebd4ce AS |
6669 | void |
6670 | ia64_after_parse_args () | |
6671 | { | |
6672 | if (debug_type == DEBUG_STABS) | |
6673 | as_fatal (_("--gstabs is not supported for ia64")); | |
6674 | } | |
6675 | ||
44576e1f RH |
6676 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
6677 | ||
6678 | static int | |
800eeca4 JW |
6679 | match (int templ, int type, int slot) |
6680 | { | |
6681 | enum ia64_unit unit; | |
6682 | int result; | |
6683 | ||
6684 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
6685 | switch (type) | |
6686 | { | |
6687 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
6688 | case IA64_TYPE_A: | |
6689 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
6690 | break; | |
6691 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
6692 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
6693 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
6694 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
6695 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
6696 | default: result = 0; break; | |
6697 | } | |
6698 | return result; | |
6699 | } | |
6700 | ||
44576e1f RH |
6701 | /* Add a bit of extra goodness if a nop of type F or B would fit |
6702 | in TEMPL at SLOT. */ | |
6703 | ||
6704 | static inline int | |
6705 | extra_goodness (int templ, int slot) | |
6706 | { | |
ebeeafe6 | 6707 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) |
44576e1f | 6708 | return 2; |
ebeeafe6 | 6709 | if (slot == 2 && match (templ, IA64_TYPE_B, slot)) |
44576e1f RH |
6710 | return 1; |
6711 | return 0; | |
6712 | } | |
6713 | ||
800eeca4 JW |
6714 | /* This function is called once, at assembler startup time. It sets |
6715 | up all the tables, etc. that the MD part of the assembler will need | |
6716 | that can be determined before arguments are parsed. */ | |
6717 | void | |
6718 | md_begin () | |
6719 | { | |
44f5c83a | 6720 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
6721 | const char *err; |
6722 | char name[8]; | |
6723 | ||
6724 | md.auto_align = 1; | |
6725 | md.explicit_mode = md.default_explicit_mode; | |
6726 | ||
6727 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
6728 | ||
0234cb7c | 6729 | /* Make sure function pointers get initialized. */ |
10a98291 | 6730 | target_big_endian = -1; |
549f748d | 6731 | dot_byteorder (default_big_endian); |
10a98291 | 6732 | |
35f5df7f L |
6733 | alias_hash = hash_new (); |
6734 | alias_name_hash = hash_new (); | |
6735 | secalias_hash = hash_new (); | |
6736 | secalias_name_hash = hash_new (); | |
6737 | ||
13ae64f3 JJ |
6738 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
6739 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
6740 | &zero_address_frag); | |
6741 | ||
6742 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
6743 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
6744 | &zero_address_frag); | |
6745 | ||
800eeca4 | 6746 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
6747 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
6748 | &zero_address_frag); | |
800eeca4 JW |
6749 | |
6750 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
6751 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
6752 | &zero_address_frag); | |
800eeca4 JW |
6753 | |
6754 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
6755 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
6756 | &zero_address_frag); | |
800eeca4 | 6757 | |
fa2c7eff RH |
6758 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
6759 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
6760 | &zero_address_frag); | |
6761 | ||
c67e42c9 | 6762 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
6763 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
6764 | &zero_address_frag); | |
c67e42c9 | 6765 | |
800eeca4 | 6766 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
6767 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
6768 | &zero_address_frag); | |
800eeca4 JW |
6769 | |
6770 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
6771 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
6772 | &zero_address_frag); | |
800eeca4 JW |
6773 | |
6774 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
6775 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
6776 | &zero_address_frag); | |
800eeca4 | 6777 | |
13ae64f3 JJ |
6778 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
6779 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
6780 | &zero_address_frag); | |
6781 | ||
800eeca4 | 6782 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
6783 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
6784 | &zero_address_frag); | |
800eeca4 JW |
6785 | |
6786 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
6787 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
6788 | &zero_address_frag); | |
800eeca4 | 6789 | |
13ae64f3 JJ |
6790 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
6791 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
6792 | &zero_address_frag); | |
6793 | ||
6794 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
6795 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
6796 | &zero_address_frag); | |
6797 | ||
6798 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
6799 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
6800 | &zero_address_frag); | |
6801 | ||
3969b680 RH |
6802 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
6803 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
6804 | &zero_address_frag); | |
6805 | ||
197865e8 | 6806 | /* Compute the table of best templates. We compute goodness as a |
44576e1f RH |
6807 | base 4 value, in which each match counts for 3, each F counts |
6808 | for 2, each B counts for 1. This should maximize the number of | |
6809 | F and B nops in the chosen bundles, which is good because these | |
6810 | pipelines are least likely to be overcommitted. */ | |
800eeca4 JW |
6811 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
6812 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
6813 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
6814 | { | |
6815 | best = 0; | |
6816 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
6817 | { | |
6818 | goodness = 0; | |
6819 | if (match (t, i, 0)) | |
6820 | { | |
6821 | if (match (t, j, 1)) | |
6822 | { | |
6823 | if (match (t, k, 2)) | |
44576e1f | 6824 | goodness = 3 + 3 + 3; |
800eeca4 | 6825 | else |
44576e1f | 6826 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
6827 | } |
6828 | else if (match (t, j, 2)) | |
44576e1f | 6829 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 6830 | else |
44576e1f RH |
6831 | { |
6832 | goodness = 3; | |
6833 | goodness += extra_goodness (t, 1); | |
6834 | goodness += extra_goodness (t, 2); | |
6835 | } | |
800eeca4 JW |
6836 | } |
6837 | else if (match (t, i, 1)) | |
6838 | { | |
6839 | if (match (t, j, 2)) | |
44576e1f | 6840 | goodness = 3 + 3; |
800eeca4 | 6841 | else |
44576e1f | 6842 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
6843 | } |
6844 | else if (match (t, i, 2)) | |
44576e1f | 6845 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
6846 | |
6847 | if (goodness > best) | |
6848 | { | |
6849 | best = goodness; | |
6850 | best_template[i][j][k] = t; | |
6851 | } | |
6852 | } | |
6853 | } | |
6854 | ||
6855 | for (i = 0; i < NUM_SLOTS; ++i) | |
6856 | md.slot[i].user_template = -1; | |
6857 | ||
6858 | md.pseudo_hash = hash_new (); | |
6859 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
6860 | { | |
6861 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
6862 | (void *) (pseudo_opcode + i)); | |
6863 | if (err) | |
6864 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
6865 | pseudo_opcode[i].name, err); | |
6866 | } | |
6867 | ||
6868 | md.reg_hash = hash_new (); | |
6869 | md.dynreg_hash = hash_new (); | |
6870 | md.const_hash = hash_new (); | |
6871 | md.entry_hash = hash_new (); | |
6872 | ||
542d6675 | 6873 | /* general registers: */ |
800eeca4 JW |
6874 | |
6875 | total = 128; | |
6876 | for (i = 0; i < total; ++i) | |
6877 | { | |
6878 | sprintf (name, "r%d", i - REG_GR); | |
6879 | md.regsym[i] = declare_register (name, i); | |
6880 | } | |
6881 | ||
542d6675 | 6882 | /* floating point registers: */ |
800eeca4 JW |
6883 | total += 128; |
6884 | for (; i < total; ++i) | |
6885 | { | |
6886 | sprintf (name, "f%d", i - REG_FR); | |
6887 | md.regsym[i] = declare_register (name, i); | |
6888 | } | |
6889 | ||
542d6675 | 6890 | /* application registers: */ |
800eeca4 JW |
6891 | total += 128; |
6892 | ar_base = i; | |
6893 | for (; i < total; ++i) | |
6894 | { | |
6895 | sprintf (name, "ar%d", i - REG_AR); | |
6896 | md.regsym[i] = declare_register (name, i); | |
6897 | } | |
6898 | ||
542d6675 | 6899 | /* control registers: */ |
800eeca4 JW |
6900 | total += 128; |
6901 | cr_base = i; | |
6902 | for (; i < total; ++i) | |
6903 | { | |
6904 | sprintf (name, "cr%d", i - REG_CR); | |
6905 | md.regsym[i] = declare_register (name, i); | |
6906 | } | |
6907 | ||
542d6675 | 6908 | /* predicate registers: */ |
800eeca4 JW |
6909 | total += 64; |
6910 | for (; i < total; ++i) | |
6911 | { | |
6912 | sprintf (name, "p%d", i - REG_P); | |
6913 | md.regsym[i] = declare_register (name, i); | |
6914 | } | |
6915 | ||
542d6675 | 6916 | /* branch registers: */ |
800eeca4 JW |
6917 | total += 8; |
6918 | for (; i < total; ++i) | |
6919 | { | |
6920 | sprintf (name, "b%d", i - REG_BR); | |
6921 | md.regsym[i] = declare_register (name, i); | |
6922 | } | |
6923 | ||
6924 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
6925 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
6926 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
6927 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
6928 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
6929 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
6930 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
6931 | ||
6932 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
6933 | { | |
6934 | regnum = indirect_reg[i].regnum; | |
6935 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
6936 | } | |
6937 | ||
542d6675 | 6938 | /* define synonyms for application registers: */ |
800eeca4 JW |
6939 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
6940 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
6941 | REG_AR + ar[i - REG_AR].regnum); | |
6942 | ||
542d6675 | 6943 | /* define synonyms for control registers: */ |
800eeca4 JW |
6944 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
6945 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
6946 | REG_CR + cr[i - REG_CR].regnum); | |
6947 | ||
6948 | declare_register ("gp", REG_GR + 1); | |
6949 | declare_register ("sp", REG_GR + 12); | |
6950 | declare_register ("rp", REG_BR + 0); | |
6951 | ||
542d6675 | 6952 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
6953 | declare_register ("psp", REG_PSP); |
6954 | ||
800eeca4 JW |
6955 | declare_register_set ("ret", 4, REG_GR + 8); |
6956 | declare_register_set ("farg", 8, REG_FR + 8); | |
6957 | declare_register_set ("fret", 8, REG_FR + 8); | |
6958 | ||
6959 | for (i = 0; i < NELEMS (const_bits); ++i) | |
6960 | { | |
6961 | err = hash_insert (md.const_hash, const_bits[i].name, | |
6962 | (PTR) (const_bits + i)); | |
6963 | if (err) | |
6964 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
6965 | name, err); | |
6966 | } | |
6967 | ||
44f5c83a JW |
6968 | /* Set the architecture and machine depending on defaults and command line |
6969 | options. */ | |
6970 | if (md.flags & EF_IA_64_ABI64) | |
6971 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
6972 | else | |
6973 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
6974 | ||
6975 | if (! ok) | |
6976 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 6977 | |
557debba JW |
6978 | /* Set the pointer size and pointer shift size depending on md.flags */ |
6979 | ||
6980 | if (md.flags & EF_IA_64_ABI64) | |
6981 | { | |
6982 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
6983 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
6984 | } | |
6985 | else | |
6986 | { | |
6987 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
6988 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
6989 | } | |
6990 | ||
800eeca4 JW |
6991 | md.mem_offset.hint = 0; |
6992 | md.path = 0; | |
6993 | md.maxpaths = 0; | |
6994 | md.entry_labels = NULL; | |
6995 | } | |
6996 | ||
44f5c83a JW |
6997 | /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin |
6998 | because that is called after md_parse_option which is where we do the | |
6999 | dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the | |
7000 | default endianness. */ | |
7001 | ||
7002 | void | |
7003 | ia64_init (argc, argv) | |
2434f565 JW |
7004 | int argc ATTRIBUTE_UNUSED; |
7005 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7006 | { |
1cd8ff38 | 7007 | md.flags = MD_FLAGS_DEFAULT; |
44f5c83a JW |
7008 | } |
7009 | ||
7010 | /* Return a string for the target object file format. */ | |
7011 | ||
7012 | const char * | |
7013 | ia64_target_format () | |
7014 | { | |
7015 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7016 | { | |
72a76794 JW |
7017 | if (md.flags & EF_IA_64_BE) |
7018 | { | |
7019 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7020 | #if defined(TE_AIX50) |
7463c317 | 7021 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7022 | #elif defined(TE_HPUX) |
7023 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7024 | #else |
72a76794 | 7025 | return "elf64-ia64-big"; |
7463c317 | 7026 | #endif |
72a76794 | 7027 | else |
1cd8ff38 | 7028 | #if defined(TE_AIX50) |
7463c317 | 7029 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7030 | #elif defined(TE_HPUX) |
7031 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7032 | #else |
72a76794 | 7033 | return "elf32-ia64-big"; |
7463c317 | 7034 | #endif |
72a76794 | 7035 | } |
44f5c83a | 7036 | else |
72a76794 JW |
7037 | { |
7038 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7039 | #ifdef TE_AIX50 |
7040 | return "elf64-ia64-aix-little"; | |
7041 | #else | |
72a76794 | 7042 | return "elf64-ia64-little"; |
7463c317 | 7043 | #endif |
72a76794 | 7044 | else |
7463c317 TW |
7045 | #ifdef TE_AIX50 |
7046 | return "elf32-ia64-aix-little"; | |
7047 | #else | |
72a76794 | 7048 | return "elf32-ia64-little"; |
7463c317 | 7049 | #endif |
72a76794 | 7050 | } |
44f5c83a JW |
7051 | } |
7052 | else | |
7053 | return "unknown-format"; | |
7054 | } | |
7055 | ||
800eeca4 JW |
7056 | void |
7057 | ia64_end_of_source () | |
7058 | { | |
542d6675 | 7059 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7060 | insn_group_break (1, 0, 0); |
7061 | ||
542d6675 | 7062 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7063 | ia64_flush_insns (); |
7064 | ||
7065 | bfd_set_private_flags (stdoutput, md.flags); | |
7066 | ||
800eeca4 JW |
7067 | md.mem_offset.hint = 0; |
7068 | } | |
7069 | ||
7070 | void | |
7071 | ia64_start_line () | |
7072 | { | |
f1bcba5b JW |
7073 | if (md.qp.X_op == O_register) |
7074 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7075 | md.qp.X_op = O_absent; |
7076 | ||
7077 | if (ignore_input ()) | |
7078 | return; | |
7079 | ||
7080 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7081 | { | |
7082 | if (md.detect_dv && !md.explicit_mode) | |
542d6675 | 7083 | as_warn (_("Explicit stops are ignored in auto mode")); |
800eeca4 | 7084 | else |
542d6675 | 7085 | insn_group_break (1, 0, 0); |
800eeca4 JW |
7086 | } |
7087 | } | |
7088 | ||
f1bcba5b JW |
7089 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7090 | labels. */ | |
7091 | static int defining_tag = 0; | |
7092 | ||
800eeca4 JW |
7093 | int |
7094 | ia64_unrecognized_line (ch) | |
7095 | int ch; | |
7096 | { | |
7097 | switch (ch) | |
7098 | { | |
7099 | case '(': | |
7100 | expression (&md.qp); | |
7101 | if (*input_line_pointer++ != ')') | |
7102 | { | |
7103 | as_bad ("Expected ')'"); | |
7104 | return 0; | |
7105 | } | |
7106 | if (md.qp.X_op != O_register) | |
7107 | { | |
7108 | as_bad ("Qualifying predicate expected"); | |
7109 | return 0; | |
7110 | } | |
7111 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7112 | { | |
7113 | as_bad ("Predicate register expected"); | |
7114 | return 0; | |
7115 | } | |
7116 | return 1; | |
7117 | ||
7118 | case '{': | |
7119 | if (md.manual_bundling) | |
7120 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7121 | else | |
7122 | CURR_SLOT.manual_bundling_on = 1; | |
7123 | md.manual_bundling = 1; | |
7124 | ||
542d6675 KH |
7125 | /* Bundling is only acceptable in explicit mode |
7126 | or when in default automatic mode. */ | |
800eeca4 | 7127 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7128 | { |
7129 | if (!md.mode_explicitly_set | |
7130 | && !md.default_explicit_mode) | |
7131 | dot_dv_mode ('E'); | |
7132 | else | |
7133 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7134 | } | |
800eeca4 JW |
7135 | return 1; |
7136 | ||
7137 | case '}': | |
7138 | if (!md.manual_bundling) | |
7139 | as_warn ("Found '}' when manual bundling is off"); | |
7140 | else | |
7141 | PREV_SLOT.manual_bundling_off = 1; | |
7142 | md.manual_bundling = 0; | |
7143 | ||
7144 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7145 | if (md.detect_dv |
542d6675 KH |
7146 | && md.explicit_mode |
7147 | && !md.mode_explicitly_set | |
7148 | && !md.default_explicit_mode) | |
7149 | dot_dv_mode ('A'); | |
800eeca4 JW |
7150 | |
7151 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7152 | happens automatically because ';' is an end of line marker. */ | |
7153 | SKIP_WHITESPACE (); | |
7154 | if (input_line_pointer[0] == '{') | |
7155 | { | |
7156 | input_line_pointer++; | |
7157 | return ia64_unrecognized_line ('{'); | |
7158 | } | |
7159 | ||
7160 | demand_empty_rest_of_line (); | |
7161 | return 1; | |
7162 | ||
f1bcba5b JW |
7163 | case '[': |
7164 | { | |
7165 | char *s; | |
7166 | char c; | |
7167 | symbolS *tag; | |
4d5a53ff | 7168 | int temp; |
f1bcba5b JW |
7169 | |
7170 | if (md.qp.X_op == O_register) | |
7171 | { | |
7172 | as_bad ("Tag must come before qualifying predicate."); | |
7173 | return 0; | |
7174 | } | |
4d5a53ff JW |
7175 | |
7176 | /* This implements just enough of read_a_source_file in read.c to | |
7177 | recognize labels. */ | |
7178 | if (is_name_beginner (*input_line_pointer)) | |
7179 | { | |
7180 | s = input_line_pointer; | |
7181 | c = get_symbol_end (); | |
7182 | } | |
7183 | else if (LOCAL_LABELS_FB | |
3882b010 | 7184 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7185 | { |
7186 | temp = 0; | |
3882b010 | 7187 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7188 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7189 | fb_label_instance_inc (temp); | |
7190 | s = fb_label_name (temp, 0); | |
7191 | c = *input_line_pointer; | |
7192 | } | |
7193 | else | |
7194 | { | |
7195 | s = NULL; | |
7196 | c = '\0'; | |
7197 | } | |
f1bcba5b JW |
7198 | if (c != ':') |
7199 | { | |
7200 | /* Put ':' back for error messages' sake. */ | |
7201 | *input_line_pointer++ = ':'; | |
7202 | as_bad ("Expected ':'"); | |
7203 | return 0; | |
7204 | } | |
4d5a53ff | 7205 | |
f1bcba5b JW |
7206 | defining_tag = 1; |
7207 | tag = colon (s); | |
7208 | defining_tag = 0; | |
7209 | /* Put ':' back for error messages' sake. */ | |
7210 | *input_line_pointer++ = ':'; | |
7211 | if (*input_line_pointer++ != ']') | |
7212 | { | |
7213 | as_bad ("Expected ']'"); | |
7214 | return 0; | |
7215 | } | |
7216 | if (! tag) | |
7217 | { | |
7218 | as_bad ("Tag name expected"); | |
7219 | return 0; | |
7220 | } | |
7221 | return 1; | |
7222 | } | |
7223 | ||
800eeca4 JW |
7224 | default: |
7225 | break; | |
7226 | } | |
542d6675 KH |
7227 | |
7228 | /* Not a valid line. */ | |
7229 | return 0; | |
800eeca4 JW |
7230 | } |
7231 | ||
7232 | void | |
7233 | ia64_frob_label (sym) | |
7234 | struct symbol *sym; | |
7235 | { | |
7236 | struct label_fix *fix; | |
7237 | ||
f1bcba5b JW |
7238 | /* Tags need special handling since they are not bundle breaks like |
7239 | labels. */ | |
7240 | if (defining_tag) | |
7241 | { | |
7242 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7243 | fix->sym = sym; | |
7244 | fix->next = CURR_SLOT.tag_fixups; | |
7245 | CURR_SLOT.tag_fixups = fix; | |
7246 | ||
7247 | return; | |
7248 | } | |
7249 | ||
800eeca4 JW |
7250 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7251 | { | |
7252 | md.last_text_seg = now_seg; | |
7253 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7254 | fix->sym = sym; | |
7255 | fix->next = CURR_SLOT.label_fixups; | |
7256 | CURR_SLOT.label_fixups = fix; | |
7257 | ||
542d6675 | 7258 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7259 | if (md.path == md.maxpaths) |
542d6675 KH |
7260 | { |
7261 | md.maxpaths += 20; | |
7262 | md.entry_labels = (const char **) | |
7263 | xrealloc ((void *) md.entry_labels, | |
7264 | md.maxpaths * sizeof (char *)); | |
7265 | } | |
800eeca4 JW |
7266 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7267 | } | |
7268 | } | |
7269 | ||
936cf02e JW |
7270 | #ifdef TE_HPUX |
7271 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7272 | that are declared but unused. This routine removes declared, | |
7273 | unused symbols from an object. */ | |
7274 | int | |
7275 | ia64_frob_symbol (sym) | |
7276 | struct symbol *sym; | |
7277 | { | |
7278 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7279 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7280 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7281 | && ! S_IS_EXTERNAL (sym))) | |
7282 | return 1; | |
7283 | return 0; | |
7284 | } | |
7285 | #endif | |
7286 | ||
800eeca4 JW |
7287 | void |
7288 | ia64_flush_pending_output () | |
7289 | { | |
4d5a53ff JW |
7290 | if (!md.keep_pending_output |
7291 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7292 | { |
7293 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7294 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7295 | insn_group_break (1, 0, 0); | |
7296 | ia64_flush_insns (); | |
7297 | } | |
7298 | } | |
7299 | ||
7300 | /* Do ia64-specific expression optimization. All that's done here is | |
7301 | to transform index expressions that are either due to the indexing | |
7302 | of rotating registers or due to the indexing of indirect register | |
7303 | sets. */ | |
7304 | int | |
7305 | ia64_optimize_expr (l, op, r) | |
7306 | expressionS *l; | |
7307 | operatorT op; | |
7308 | expressionS *r; | |
7309 | { | |
7310 | unsigned num_regs; | |
7311 | ||
7312 | if (op == O_index) | |
7313 | { | |
7314 | if (l->X_op == O_register && r->X_op == O_constant) | |
7315 | { | |
7316 | num_regs = (l->X_add_number >> 16); | |
7317 | if ((unsigned) r->X_add_number >= num_regs) | |
7318 | { | |
7319 | if (!num_regs) | |
7320 | as_bad ("No current frame"); | |
7321 | else | |
7322 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7323 | r->X_add_number = 0; | |
7324 | } | |
7325 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7326 | return 1; | |
7327 | } | |
7328 | else if (l->X_op == O_register && r->X_op == O_register) | |
7329 | { | |
7330 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7331 | || l->X_add_number == IND_MEM) | |
7332 | { | |
7333 | as_bad ("Indirect register set name expected"); | |
7334 | l->X_add_number = IND_CPUID; | |
7335 | } | |
7336 | l->X_op = O_index; | |
7337 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7338 | l->X_add_number = r->X_add_number; | |
7339 | return 1; | |
7340 | } | |
7341 | } | |
7342 | return 0; | |
7343 | } | |
7344 | ||
7345 | int | |
7346 | ia64_parse_name (name, e) | |
7347 | char *name; | |
7348 | expressionS *e; | |
7349 | { | |
7350 | struct const_desc *cdesc; | |
7351 | struct dynreg *dr = 0; | |
7352 | unsigned int regnum; | |
7353 | struct symbol *sym; | |
7354 | char *end; | |
7355 | ||
542d6675 | 7356 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7357 | sym = hash_find (md.reg_hash, name); |
7358 | if (sym) | |
7359 | { | |
7360 | e->X_op = O_register; | |
7361 | e->X_add_number = S_GET_VALUE (sym); | |
7362 | return 1; | |
7363 | } | |
7364 | ||
7365 | cdesc = hash_find (md.const_hash, name); | |
7366 | if (cdesc) | |
7367 | { | |
7368 | e->X_op = O_constant; | |
7369 | e->X_add_number = cdesc->value; | |
7370 | return 1; | |
7371 | } | |
7372 | ||
542d6675 | 7373 | /* check for inN, locN, or outN: */ |
800eeca4 JW |
7374 | switch (name[0]) |
7375 | { | |
7376 | case 'i': | |
3882b010 | 7377 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7378 | { |
7379 | dr = &md.in; | |
7380 | name += 2; | |
7381 | } | |
7382 | break; | |
7383 | ||
7384 | case 'l': | |
3882b010 | 7385 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7386 | { |
7387 | dr = &md.loc; | |
7388 | name += 3; | |
7389 | } | |
7390 | break; | |
7391 | ||
7392 | case 'o': | |
3882b010 | 7393 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7394 | { |
7395 | dr = &md.out; | |
7396 | name += 3; | |
7397 | } | |
7398 | break; | |
7399 | ||
7400 | default: | |
7401 | break; | |
7402 | } | |
7403 | ||
7404 | if (dr) | |
7405 | { | |
542d6675 | 7406 | /* The name is inN, locN, or outN; parse the register number. */ |
800eeca4 JW |
7407 | regnum = strtoul (name, &end, 10); |
7408 | if (end > name && *end == '\0') | |
7409 | { | |
7410 | if ((unsigned) regnum >= dr->num_regs) | |
7411 | { | |
7412 | if (!dr->num_regs) | |
7413 | as_bad ("No current frame"); | |
7414 | else | |
542d6675 KH |
7415 | as_bad ("Register number out of range 0..%u", |
7416 | dr->num_regs - 1); | |
800eeca4 JW |
7417 | regnum = 0; |
7418 | } | |
7419 | e->X_op = O_register; | |
7420 | e->X_add_number = dr->base + regnum; | |
7421 | return 1; | |
7422 | } | |
7423 | } | |
7424 | ||
7425 | if ((dr = hash_find (md.dynreg_hash, name))) | |
7426 | { | |
7427 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7428 | Store the base register number in the low 16 bits of |
7429 | X_add_number and the size of the register set in the top 16 | |
7430 | bits. */ | |
800eeca4 JW |
7431 | e->X_op = O_register; |
7432 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7433 | return 1; | |
7434 | } | |
7435 | return 0; | |
7436 | } | |
7437 | ||
7438 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7439 | ||
7440 | char * | |
7441 | ia64_canonicalize_symbol_name (name) | |
7442 | char *name; | |
7443 | { | |
542d6675 KH |
7444 | size_t len = strlen (name); |
7445 | if (len > 1 && name[len - 1] == '#') | |
7446 | name[len - 1] = '\0'; | |
800eeca4 JW |
7447 | return name; |
7448 | } | |
7449 | ||
3e37788f JW |
7450 | /* Return true if idesc is a conditional branch instruction. This excludes |
7451 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7452 | because they always read/write resources regardless of the value of the | |
7453 | qualifying predicate. br.ia must always use p0, and hence is always | |
7454 | taken. Thus this function returns true for branches which can fall | |
7455 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7456 | |
800eeca4 JW |
7457 | static int |
7458 | is_conditional_branch (idesc) | |
542d6675 | 7459 | struct ia64_opcode *idesc; |
800eeca4 | 7460 | { |
1deb8127 | 7461 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7462 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7463 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7464 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7465 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7466 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7467 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7468 | || idesc->name[2] == 'l' | |
7469 | /* br.cond, br.call, br.clr */ | |
7470 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7471 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7472 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7473 | } |
7474 | ||
7475 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7476 | returns zero. */ |
7477 | ||
800eeca4 JW |
7478 | static int |
7479 | is_taken_branch (idesc) | |
542d6675 | 7480 | struct ia64_opcode *idesc; |
800eeca4 JW |
7481 | { |
7482 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7483 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7484 | } |
7485 | ||
7486 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7487 | doubt, returns zero. */ |
7488 | ||
800eeca4 JW |
7489 | static int |
7490 | is_interruption_or_rfi (idesc) | |
542d6675 | 7491 | struct ia64_opcode *idesc; |
800eeca4 JW |
7492 | { |
7493 | if (strcmp (idesc->name, "rfi") == 0) | |
7494 | return 1; | |
7495 | return 0; | |
7496 | } | |
7497 | ||
7498 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7499 | -1 if there is no dependency. */ | |
542d6675 | 7500 | |
800eeca4 JW |
7501 | static int |
7502 | depends_on (depind, idesc) | |
542d6675 KH |
7503 | int depind; |
7504 | struct ia64_opcode *idesc; | |
800eeca4 JW |
7505 | { |
7506 | int i; | |
7507 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7508 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7509 | { |
542d6675 KH |
7510 | if (depind == DEP (dep->chks[i])) |
7511 | return i; | |
800eeca4 JW |
7512 | } |
7513 | return -1; | |
7514 | } | |
7515 | ||
7516 | /* Determine a set of specific resources used for a particular resource | |
7517 | class. Returns the number of specific resources identified For those | |
7518 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7519 | marked nonspecific. |
800eeca4 JW |
7520 | |
7521 | Meanings of value in 'NOTE': | |
7522 | 1) only read/write when the register number is explicitly encoded in the | |
7523 | insn. | |
7524 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 7525 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
7526 | 3) general register value is used to specify an indirect register; not |
7527 | determinable statically. | |
7528 | 4) only read the given resource when bits 7:0 of the indirect index | |
7529 | register value does not match the register number of the resource; not | |
7530 | determinable statically. | |
7531 | 5) all rules are implementation specific. | |
7532 | 6) only when both the index specified by the reader and the index specified | |
7533 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 7534 | statically. |
800eeca4 | 7535 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 7536 | set |
800eeca4 JW |
7537 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
7538 | only read when these insns reference FR2-31 | |
7539 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
7540 | written when these insns write FR32-127 | |
7541 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
7542 | instruction | |
7543 | 11) The target predicates are written independently of PR[qp], but source | |
7544 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
7545 | cannot statically be determined, all source registers are marked used. | |
7546 | 12) This insn only reads the specified predicate register when that | |
7547 | register is the PR[qp]. | |
7548 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 7549 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
7550 | 14) The RSE resource includes the implementation-specific RSE internal |
7551 | state resources. At least one (and possibly more) of these resources are | |
7552 | read by each instruction listed in IC:rse-readers. At least one (and | |
7553 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 7554 | IC:rse-writers. |
800eeca4 | 7555 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 7556 | generate. |
800eeca4 JW |
7557 | |
7558 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
7559 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
7560 | */ |
7561 | ||
7562 | #define MAX_SPECS 256 | |
7563 | #define DV_CHK 1 | |
7564 | #define DV_REG 0 | |
7565 | ||
7566 | static int | |
7567 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
7568 | const struct ia64_dependency *dep; |
7569 | struct ia64_opcode *idesc; | |
7570 | int type; /* is this a DV chk or a DV reg? */ | |
7571 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
7572 | int note; /* resource note for this insn's usage */ | |
7573 | int path; /* which execution path to examine */ | |
800eeca4 JW |
7574 | { |
7575 | int count = 0; | |
7576 | int i; | |
7577 | int rsrc_write = 0; | |
7578 | struct rsrc tmpl; | |
197865e8 | 7579 | |
800eeca4 JW |
7580 | if (dep->mode == IA64_DV_WAW |
7581 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
7582 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
7583 | rsrc_write = 1; | |
7584 | ||
7585 | /* template for any resources we identify */ | |
7586 | tmpl.dependency = dep; | |
7587 | tmpl.note = note; | |
7588 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
7589 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
7590 | tmpl.link_to_qp_branch = 1; | |
7591 | tmpl.mem_offset.hint = 0; | |
7592 | tmpl.specific = 1; | |
7593 | tmpl.index = 0; | |
7484b8e6 | 7594 | tmpl.cmp_type = CMP_NONE; |
800eeca4 JW |
7595 | |
7596 | #define UNHANDLED \ | |
7597 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
7598 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
7599 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
7600 | ||
7601 | /* we don't need to track these */ | |
7602 | if (dep->semantics == IA64_DVS_NONE) | |
7603 | return 0; | |
7604 | ||
7605 | switch (dep->specifier) | |
7606 | { | |
7607 | case IA64_RS_AR_K: | |
7608 | if (note == 1) | |
542d6675 KH |
7609 | { |
7610 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7611 | { | |
7612 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7613 | if (regno >= 0 && regno <= 7) | |
7614 | { | |
7615 | specs[count] = tmpl; | |
7616 | specs[count++].index = regno; | |
7617 | } | |
7618 | } | |
7619 | } | |
800eeca4 | 7620 | else if (note == 0) |
542d6675 KH |
7621 | { |
7622 | for (i = 0; i < 8; i++) | |
7623 | { | |
7624 | specs[count] = tmpl; | |
7625 | specs[count++].index = i; | |
7626 | } | |
7627 | } | |
800eeca4 | 7628 | else |
542d6675 KH |
7629 | { |
7630 | UNHANDLED; | |
7631 | } | |
800eeca4 JW |
7632 | break; |
7633 | ||
7634 | case IA64_RS_AR_UNAT: | |
7635 | /* This is a mov =AR or mov AR= instruction. */ | |
7636 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7637 | { | |
7638 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7639 | if (regno == AR_UNAT) | |
7640 | { | |
7641 | specs[count++] = tmpl; | |
7642 | } | |
7643 | } | |
7644 | else | |
7645 | { | |
7646 | /* This is a spill/fill, or other instruction that modifies the | |
7647 | unat register. */ | |
7648 | ||
7649 | /* Unless we can determine the specific bits used, mark the whole | |
7650 | thing; bits 8:3 of the memory address indicate the bit used in | |
7651 | UNAT. The .mem.offset hint may be used to eliminate a small | |
7652 | subset of conflicts. */ | |
7653 | specs[count] = tmpl; | |
7654 | if (md.mem_offset.hint) | |
7655 | { | |
542d6675 KH |
7656 | if (md.debug_dv) |
7657 | fprintf (stderr, " Using hint for spill/fill\n"); | |
7658 | /* The index isn't actually used, just set it to something | |
7659 | approximating the bit index. */ | |
800eeca4 JW |
7660 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
7661 | specs[count].mem_offset.hint = 1; | |
7662 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
7663 | specs[count++].mem_offset.base = md.mem_offset.base; | |
7664 | } | |
7665 | else | |
7666 | { | |
7667 | specs[count++].specific = 0; | |
7668 | } | |
7669 | } | |
7670 | break; | |
7671 | ||
7672 | case IA64_RS_AR: | |
7673 | if (note == 1) | |
542d6675 KH |
7674 | { |
7675 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7676 | { | |
7677 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7678 | if ((regno >= 8 && regno <= 15) | |
7679 | || (regno >= 20 && regno <= 23) | |
7680 | || (regno >= 31 && regno <= 39) | |
7681 | || (regno >= 41 && regno <= 47) | |
7682 | || (regno >= 67 && regno <= 111)) | |
7683 | { | |
7684 | specs[count] = tmpl; | |
7685 | specs[count++].index = regno; | |
7686 | } | |
7687 | } | |
7688 | } | |
800eeca4 | 7689 | else |
542d6675 KH |
7690 | { |
7691 | UNHANDLED; | |
7692 | } | |
800eeca4 JW |
7693 | break; |
7694 | ||
7695 | case IA64_RS_ARb: | |
7696 | if (note == 1) | |
542d6675 KH |
7697 | { |
7698 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7699 | { | |
7700 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7701 | if ((regno >= 48 && regno <= 63) | |
7702 | || (regno >= 112 && regno <= 127)) | |
7703 | { | |
7704 | specs[count] = tmpl; | |
7705 | specs[count++].index = regno; | |
7706 | } | |
7707 | } | |
7708 | } | |
800eeca4 | 7709 | else if (note == 0) |
542d6675 KH |
7710 | { |
7711 | for (i = 48; i < 64; i++) | |
7712 | { | |
7713 | specs[count] = tmpl; | |
7714 | specs[count++].index = i; | |
7715 | } | |
7716 | for (i = 112; i < 128; i++) | |
7717 | { | |
7718 | specs[count] = tmpl; | |
7719 | specs[count++].index = i; | |
7720 | } | |
7721 | } | |
197865e8 | 7722 | else |
542d6675 KH |
7723 | { |
7724 | UNHANDLED; | |
7725 | } | |
800eeca4 JW |
7726 | break; |
7727 | ||
7728 | case IA64_RS_BR: | |
7729 | if (note != 1) | |
542d6675 KH |
7730 | { |
7731 | UNHANDLED; | |
7732 | } | |
800eeca4 | 7733 | else |
542d6675 KH |
7734 | { |
7735 | if (rsrc_write) | |
7736 | { | |
7737 | for (i = 0; i < idesc->num_outputs; i++) | |
7738 | if (idesc->operands[i] == IA64_OPND_B1 | |
7739 | || idesc->operands[i] == IA64_OPND_B2) | |
7740 | { | |
7741 | specs[count] = tmpl; | |
7742 | specs[count++].index = | |
7743 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7744 | } | |
7745 | } | |
7746 | else | |
7747 | { | |
40449e9f | 7748 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
7749 | if (idesc->operands[i] == IA64_OPND_B1 |
7750 | || idesc->operands[i] == IA64_OPND_B2) | |
7751 | { | |
7752 | specs[count] = tmpl; | |
7753 | specs[count++].index = | |
7754 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7755 | } | |
7756 | } | |
7757 | } | |
800eeca4 JW |
7758 | break; |
7759 | ||
7760 | case IA64_RS_CPUID: /* four or more registers */ | |
7761 | if (note == 3) | |
542d6675 KH |
7762 | { |
7763 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
7764 | { | |
7765 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7766 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7767 | && KNOWN (regno)) | |
7768 | { | |
7769 | specs[count] = tmpl; | |
7770 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7771 | } | |
7772 | else | |
7773 | { | |
7774 | specs[count] = tmpl; | |
7775 | specs[count++].specific = 0; | |
7776 | } | |
7777 | } | |
7778 | } | |
800eeca4 | 7779 | else |
542d6675 KH |
7780 | { |
7781 | UNHANDLED; | |
7782 | } | |
800eeca4 JW |
7783 | break; |
7784 | ||
7785 | case IA64_RS_DBR: /* four or more registers */ | |
7786 | if (note == 3) | |
542d6675 KH |
7787 | { |
7788 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
7789 | { | |
7790 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7791 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7792 | && KNOWN (regno)) | |
7793 | { | |
7794 | specs[count] = tmpl; | |
7795 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7796 | } | |
7797 | else | |
7798 | { | |
7799 | specs[count] = tmpl; | |
7800 | specs[count++].specific = 0; | |
7801 | } | |
7802 | } | |
7803 | } | |
800eeca4 | 7804 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7805 | { |
7806 | specs[count] = tmpl; | |
7807 | specs[count++].specific = 0; | |
7808 | } | |
800eeca4 | 7809 | else |
542d6675 KH |
7810 | { |
7811 | UNHANDLED; | |
7812 | } | |
800eeca4 JW |
7813 | break; |
7814 | ||
7815 | case IA64_RS_IBR: /* four or more registers */ | |
7816 | if (note == 3) | |
542d6675 KH |
7817 | { |
7818 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
7819 | { | |
7820 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7821 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7822 | && KNOWN (regno)) | |
7823 | { | |
7824 | specs[count] = tmpl; | |
7825 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7826 | } | |
7827 | else | |
7828 | { | |
7829 | specs[count] = tmpl; | |
7830 | specs[count++].specific = 0; | |
7831 | } | |
7832 | } | |
7833 | } | |
800eeca4 | 7834 | else |
542d6675 KH |
7835 | { |
7836 | UNHANDLED; | |
7837 | } | |
800eeca4 JW |
7838 | break; |
7839 | ||
7840 | case IA64_RS_MSR: | |
7841 | if (note == 5) | |
7842 | { | |
7843 | /* These are implementation specific. Force all references to | |
7844 | conflict with all other references. */ | |
7845 | specs[count] = tmpl; | |
7846 | specs[count++].specific = 0; | |
7847 | } | |
7848 | else | |
7849 | { | |
7850 | UNHANDLED; | |
7851 | } | |
7852 | break; | |
7853 | ||
7854 | case IA64_RS_PKR: /* 16 or more registers */ | |
7855 | if (note == 3 || note == 4) | |
542d6675 KH |
7856 | { |
7857 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
7858 | { | |
7859 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7860 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7861 | && KNOWN (regno)) | |
7862 | { | |
7863 | if (note == 3) | |
7864 | { | |
7865 | specs[count] = tmpl; | |
7866 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7867 | } | |
7868 | else | |
7869 | for (i = 0; i < NELEMS (gr_values); i++) | |
7870 | { | |
7871 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 7872 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
7873 | { |
7874 | specs[count] = tmpl; | |
7875 | specs[count++].index = i; | |
7876 | } | |
7877 | } | |
7878 | } | |
7879 | else | |
7880 | { | |
7881 | specs[count] = tmpl; | |
7882 | specs[count++].specific = 0; | |
7883 | } | |
7884 | } | |
7885 | } | |
7886 | else if (note == 0) | |
7887 | { | |
7888 | /* probe et al. */ | |
7889 | specs[count] = tmpl; | |
7890 | specs[count++].specific = 0; | |
7891 | } | |
7892 | break; | |
7893 | ||
7894 | case IA64_RS_PMC: /* four or more registers */ | |
7895 | if (note == 3) | |
7896 | { | |
7897 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
7898 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
7899 | ||
7900 | { | |
7901 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
7902 | ? 1 : !rsrc_write); | |
7903 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
7904 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7905 | && KNOWN (regno)) | |
7906 | { | |
7907 | specs[count] = tmpl; | |
7908 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7909 | } | |
7910 | else | |
7911 | { | |
7912 | specs[count] = tmpl; | |
7913 | specs[count++].specific = 0; | |
7914 | } | |
7915 | } | |
7916 | } | |
7917 | else | |
7918 | { | |
7919 | UNHANDLED; | |
7920 | } | |
800eeca4 JW |
7921 | break; |
7922 | ||
7923 | case IA64_RS_PMD: /* four or more registers */ | |
7924 | if (note == 3) | |
542d6675 KH |
7925 | { |
7926 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
7927 | { | |
7928 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7929 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7930 | && KNOWN (regno)) | |
7931 | { | |
7932 | specs[count] = tmpl; | |
7933 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7934 | } | |
7935 | else | |
7936 | { | |
7937 | specs[count] = tmpl; | |
7938 | specs[count++].specific = 0; | |
7939 | } | |
7940 | } | |
7941 | } | |
800eeca4 | 7942 | else |
542d6675 KH |
7943 | { |
7944 | UNHANDLED; | |
7945 | } | |
800eeca4 JW |
7946 | break; |
7947 | ||
7948 | case IA64_RS_RR: /* eight registers */ | |
7949 | if (note == 6) | |
542d6675 KH |
7950 | { |
7951 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
7952 | { | |
7953 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7954 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7955 | && KNOWN (regno)) | |
7956 | { | |
7957 | specs[count] = tmpl; | |
7958 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
7959 | } | |
7960 | else | |
7961 | { | |
7962 | specs[count] = tmpl; | |
7963 | specs[count++].specific = 0; | |
7964 | } | |
7965 | } | |
7966 | } | |
800eeca4 | 7967 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7968 | { |
7969 | specs[count] = tmpl; | |
7970 | specs[count++].specific = 0; | |
7971 | } | |
197865e8 | 7972 | else |
542d6675 KH |
7973 | { |
7974 | UNHANDLED; | |
7975 | } | |
800eeca4 JW |
7976 | break; |
7977 | ||
7978 | case IA64_RS_CR_IRR: | |
197865e8 | 7979 | if (note == 0) |
542d6675 KH |
7980 | { |
7981 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
7982 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
7983 | if (rsrc_write | |
7984 | && idesc->operands[1] == IA64_OPND_CR3 | |
7985 | && regno == CR_IVR) | |
7986 | { | |
7987 | for (i = 0; i < 4; i++) | |
7988 | { | |
7989 | specs[count] = tmpl; | |
7990 | specs[count++].index = CR_IRR0 + i; | |
7991 | } | |
7992 | } | |
7993 | } | |
800eeca4 | 7994 | else if (note == 1) |
542d6675 KH |
7995 | { |
7996 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7997 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
7998 | && regno >= CR_IRR0 | |
7999 | && regno <= CR_IRR3) | |
8000 | { | |
8001 | specs[count] = tmpl; | |
8002 | specs[count++].index = regno; | |
8003 | } | |
8004 | } | |
800eeca4 | 8005 | else |
542d6675 KH |
8006 | { |
8007 | UNHANDLED; | |
8008 | } | |
800eeca4 JW |
8009 | break; |
8010 | ||
8011 | case IA64_RS_CR_LRR: | |
8012 | if (note != 1) | |
542d6675 KH |
8013 | { |
8014 | UNHANDLED; | |
8015 | } | |
197865e8 | 8016 | else |
542d6675 KH |
8017 | { |
8018 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8019 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8020 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8021 | { | |
8022 | specs[count] = tmpl; | |
8023 | specs[count++].index = regno; | |
8024 | } | |
8025 | } | |
800eeca4 JW |
8026 | break; |
8027 | ||
8028 | case IA64_RS_CR: | |
8029 | if (note == 1) | |
542d6675 KH |
8030 | { |
8031 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8032 | { | |
8033 | specs[count] = tmpl; | |
8034 | specs[count++].index = | |
8035 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8036 | } | |
8037 | } | |
800eeca4 | 8038 | else |
542d6675 KH |
8039 | { |
8040 | UNHANDLED; | |
8041 | } | |
800eeca4 JW |
8042 | break; |
8043 | ||
8044 | case IA64_RS_FR: | |
8045 | case IA64_RS_FRb: | |
8046 | if (note != 1) | |
542d6675 KH |
8047 | { |
8048 | UNHANDLED; | |
8049 | } | |
800eeca4 | 8050 | else if (rsrc_write) |
542d6675 KH |
8051 | { |
8052 | if (dep->specifier == IA64_RS_FRb | |
8053 | && idesc->operands[0] == IA64_OPND_F1) | |
8054 | { | |
8055 | specs[count] = tmpl; | |
8056 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8057 | } | |
8058 | } | |
800eeca4 | 8059 | else |
542d6675 KH |
8060 | { |
8061 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8062 | { | |
8063 | if (idesc->operands[i] == IA64_OPND_F2 | |
8064 | || idesc->operands[i] == IA64_OPND_F3 | |
8065 | || idesc->operands[i] == IA64_OPND_F4) | |
8066 | { | |
8067 | specs[count] = tmpl; | |
8068 | specs[count++].index = | |
8069 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8070 | } | |
8071 | } | |
8072 | } | |
800eeca4 JW |
8073 | break; |
8074 | ||
8075 | case IA64_RS_GR: | |
8076 | if (note == 13) | |
542d6675 KH |
8077 | { |
8078 | /* This reference applies only to the GR whose value is loaded with | |
8079 | data returned from memory. */ | |
8080 | specs[count] = tmpl; | |
8081 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8082 | } | |
800eeca4 | 8083 | else if (note == 1) |
542d6675 KH |
8084 | { |
8085 | if (rsrc_write) | |
8086 | { | |
8087 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8088 | if (idesc->operands[i] == IA64_OPND_R1 |
8089 | || idesc->operands[i] == IA64_OPND_R2 | |
8090 | || idesc->operands[i] == IA64_OPND_R3) | |
8091 | { | |
8092 | specs[count] = tmpl; | |
197865e8 | 8093 | specs[count++].index = |
50b81f19 JW |
8094 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8095 | } | |
8096 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8097 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8098 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8099 | { | |
8100 | specs[count] = tmpl; | |
8101 | specs[count++].index = | |
8102 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8103 | } | |
542d6675 KH |
8104 | } |
8105 | else | |
8106 | { | |
8107 | /* Look for anything that reads a GR. */ | |
8108 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8109 | { | |
8110 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8111 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8112 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8113 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8114 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8115 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8116 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8117 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8118 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8119 | || ((i >= idesc->num_outputs) | |
8120 | && (idesc->operands[i] == IA64_OPND_R1 | |
8121 | || idesc->operands[i] == IA64_OPND_R2 | |
8122 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8123 | /* addl source register. */ |
8124 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8125 | { |
8126 | specs[count] = tmpl; | |
8127 | specs[count++].index = | |
8128 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8129 | } | |
8130 | } | |
8131 | } | |
8132 | } | |
197865e8 | 8133 | else |
542d6675 KH |
8134 | { |
8135 | UNHANDLED; | |
8136 | } | |
800eeca4 JW |
8137 | break; |
8138 | ||
139368c9 JW |
8139 | /* This is the same as IA64_RS_PRr, except that the register range is |
8140 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8141 | case IA64_RS_PR: |
8142 | if (note == 0) | |
542d6675 | 8143 | { |
139368c9 | 8144 | for (i = 1; i < 16; i++) |
542d6675 | 8145 | { |
139368c9 JW |
8146 | specs[count] = tmpl; |
8147 | specs[count++].index = i; | |
8148 | } | |
8149 | } | |
8150 | else if (note == 7) | |
8151 | { | |
8152 | valueT mask = 0; | |
8153 | /* Mark only those registers indicated by the mask. */ | |
8154 | if (rsrc_write) | |
8155 | { | |
8156 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8157 | for (i = 1; i < 16; i++) | |
8158 | if (mask & ((valueT) 1 << i)) | |
8159 | { | |
8160 | specs[count] = tmpl; | |
8161 | specs[count++].index = i; | |
8162 | } | |
8163 | } | |
8164 | else | |
8165 | { | |
8166 | UNHANDLED; | |
8167 | } | |
8168 | } | |
8169 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8170 | { | |
8171 | if (rsrc_write) | |
8172 | { | |
8173 | for (i = 0; i < idesc->num_outputs; i++) | |
8174 | { | |
8175 | if (idesc->operands[i] == IA64_OPND_P1 | |
8176 | || idesc->operands[i] == IA64_OPND_P2) | |
8177 | { | |
8178 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8179 | if (regno >= 1 && regno < 16) | |
8180 | { | |
8181 | specs[count] = tmpl; | |
8182 | specs[count++].index = regno; | |
8183 | } | |
8184 | } | |
8185 | } | |
8186 | } | |
8187 | else | |
8188 | { | |
8189 | UNHANDLED; | |
8190 | } | |
8191 | } | |
8192 | else if (note == 12) | |
8193 | { | |
8194 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8195 | { | |
8196 | specs[count] = tmpl; | |
8197 | specs[count++].index = CURR_SLOT.qp_regno; | |
8198 | } | |
8199 | } | |
8200 | else if (note == 1) | |
8201 | { | |
8202 | if (rsrc_write) | |
8203 | { | |
8204 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8205 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8206 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8207 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8208 | |
8209 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8210 | || idesc->operands[0] == IA64_OPND_P2) | |
8211 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8212 | { |
8213 | specs[count] = tmpl; | |
139368c9 JW |
8214 | specs[count].cmp_type = |
8215 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8216 | specs[count++].index = p1; | |
8217 | } | |
8218 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8219 | || idesc->operands[1] == IA64_OPND_P2) | |
8220 | && p2 >= 1 && p2 < 16) | |
8221 | { | |
8222 | specs[count] = tmpl; | |
8223 | specs[count].cmp_type = | |
8224 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8225 | specs[count++].index = p2; | |
542d6675 KH |
8226 | } |
8227 | } | |
8228 | else | |
8229 | { | |
139368c9 | 8230 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8231 | { |
8232 | specs[count] = tmpl; | |
139368c9 JW |
8233 | specs[count++].index = CURR_SLOT.qp_regno; |
8234 | } | |
8235 | if (idesc->operands[1] == IA64_OPND_PR) | |
8236 | { | |
8237 | for (i = 1; i < 16; i++) | |
8238 | { | |
8239 | specs[count] = tmpl; | |
8240 | specs[count++].index = i; | |
8241 | } | |
542d6675 KH |
8242 | } |
8243 | } | |
8244 | } | |
139368c9 JW |
8245 | else |
8246 | { | |
8247 | UNHANDLED; | |
8248 | } | |
8249 | break; | |
8250 | ||
8251 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8252 | simplified cases of this. */ | |
8253 | case IA64_RS_PRr: | |
8254 | if (note == 0) | |
8255 | { | |
8256 | for (i = 16; i < 63; i++) | |
8257 | { | |
8258 | specs[count] = tmpl; | |
8259 | specs[count++].index = i; | |
8260 | } | |
8261 | } | |
800eeca4 | 8262 | else if (note == 7) |
542d6675 KH |
8263 | { |
8264 | valueT mask = 0; | |
8265 | /* Mark only those registers indicated by the mask. */ | |
8266 | if (rsrc_write | |
8267 | && idesc->operands[0] == IA64_OPND_PR) | |
8268 | { | |
8269 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8270 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8271 | for (i = 16; i < 63; i++) |
8272 | { | |
8273 | specs[count] = tmpl; | |
8274 | specs[count++].index = i; | |
8275 | } | |
542d6675 KH |
8276 | } |
8277 | else if (rsrc_write | |
8278 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8279 | { | |
8280 | for (i = 16; i < 63; i++) | |
8281 | { | |
8282 | specs[count] = tmpl; | |
8283 | specs[count++].index = i; | |
8284 | } | |
8285 | } | |
8286 | else | |
8287 | { | |
8288 | UNHANDLED; | |
8289 | } | |
8290 | } | |
800eeca4 | 8291 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8292 | { |
8293 | if (rsrc_write) | |
8294 | { | |
8295 | for (i = 0; i < idesc->num_outputs; i++) | |
8296 | { | |
8297 | if (idesc->operands[i] == IA64_OPND_P1 | |
8298 | || idesc->operands[i] == IA64_OPND_P2) | |
8299 | { | |
8300 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8301 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8302 | { |
8303 | specs[count] = tmpl; | |
8304 | specs[count++].index = regno; | |
8305 | } | |
8306 | } | |
8307 | } | |
8308 | } | |
8309 | else | |
8310 | { | |
8311 | UNHANDLED; | |
8312 | } | |
8313 | } | |
800eeca4 | 8314 | else if (note == 12) |
542d6675 | 8315 | { |
139368c9 | 8316 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8317 | { |
8318 | specs[count] = tmpl; | |
8319 | specs[count++].index = CURR_SLOT.qp_regno; | |
8320 | } | |
8321 | } | |
800eeca4 | 8322 | else if (note == 1) |
542d6675 KH |
8323 | { |
8324 | if (rsrc_write) | |
8325 | { | |
8326 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8327 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8328 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8329 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8330 | |
542d6675 KH |
8331 | if ((idesc->operands[0] == IA64_OPND_P1 |
8332 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8333 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8334 | { |
8335 | specs[count] = tmpl; | |
4a4f25cf | 8336 | specs[count].cmp_type = |
7484b8e6 | 8337 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8338 | specs[count++].index = p1; |
8339 | } | |
8340 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8341 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8342 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8343 | { |
8344 | specs[count] = tmpl; | |
4a4f25cf | 8345 | specs[count].cmp_type = |
7484b8e6 | 8346 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8347 | specs[count++].index = p2; |
8348 | } | |
8349 | } | |
8350 | else | |
8351 | { | |
139368c9 | 8352 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8353 | { |
8354 | specs[count] = tmpl; | |
8355 | specs[count++].index = CURR_SLOT.qp_regno; | |
8356 | } | |
8357 | if (idesc->operands[1] == IA64_OPND_PR) | |
8358 | { | |
139368c9 | 8359 | for (i = 16; i < 63; i++) |
542d6675 KH |
8360 | { |
8361 | specs[count] = tmpl; | |
8362 | specs[count++].index = i; | |
8363 | } | |
8364 | } | |
8365 | } | |
8366 | } | |
197865e8 | 8367 | else |
542d6675 KH |
8368 | { |
8369 | UNHANDLED; | |
8370 | } | |
800eeca4 JW |
8371 | break; |
8372 | ||
8373 | case IA64_RS_PSR: | |
197865e8 | 8374 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8375 | dep->regindex. */ |
800eeca4 | 8376 | if (note == 0) |
542d6675 KH |
8377 | { |
8378 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8379 | { | |
8380 | if (dep->regindex < 6) | |
8381 | { | |
8382 | specs[count++] = tmpl; | |
8383 | } | |
8384 | } | |
8385 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8386 | { | |
8387 | if (dep->regindex < 32 | |
8388 | || dep->regindex == 35 | |
8389 | || dep->regindex == 36 | |
8390 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8391 | { | |
8392 | specs[count++] = tmpl; | |
8393 | } | |
8394 | } | |
8395 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8396 | { | |
8397 | if (dep->regindex < 32 | |
8398 | || dep->regindex == 35 | |
8399 | || dep->regindex == 36 | |
8400 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8401 | { | |
8402 | specs[count++] = tmpl; | |
8403 | } | |
8404 | } | |
8405 | else | |
8406 | { | |
8407 | /* Several PSR bits have very specific dependencies. */ | |
8408 | switch (dep->regindex) | |
8409 | { | |
8410 | default: | |
8411 | specs[count++] = tmpl; | |
8412 | break; | |
8413 | case PSR_IC: | |
8414 | if (rsrc_write) | |
8415 | { | |
8416 | specs[count++] = tmpl; | |
8417 | } | |
8418 | else | |
8419 | { | |
8420 | /* Only certain CR accesses use PSR.ic */ | |
8421 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8422 | || idesc->operands[1] == IA64_OPND_CR3) | |
8423 | { | |
8424 | int index = | |
8425 | ((idesc->operands[0] == IA64_OPND_CR3) | |
8426 | ? 0 : 1); | |
8427 | int regno = | |
8428 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
8429 | ||
8430 | switch (regno) | |
8431 | { | |
8432 | default: | |
8433 | break; | |
8434 | case CR_ITIR: | |
8435 | case CR_IFS: | |
8436 | case CR_IIM: | |
8437 | case CR_IIP: | |
8438 | case CR_IPSR: | |
8439 | case CR_ISR: | |
8440 | case CR_IFA: | |
8441 | case CR_IHA: | |
8442 | case CR_IIPA: | |
8443 | specs[count++] = tmpl; | |
8444 | break; | |
8445 | } | |
8446 | } | |
8447 | } | |
8448 | break; | |
8449 | case PSR_CPL: | |
8450 | if (rsrc_write) | |
8451 | { | |
8452 | specs[count++] = tmpl; | |
8453 | } | |
8454 | else | |
8455 | { | |
8456 | /* Only some AR accesses use cpl */ | |
8457 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8458 | || idesc->operands[1] == IA64_OPND_AR3) | |
8459 | { | |
8460 | int index = | |
8461 | ((idesc->operands[0] == IA64_OPND_AR3) | |
8462 | ? 0 : 1); | |
8463 | int regno = | |
8464 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
8465 | ||
8466 | if (regno == AR_ITC | |
8467 | || (index == 0 | |
8468 | && (regno == AR_ITC | |
8469 | || regno == AR_RSC | |
8470 | || (regno >= AR_K0 | |
8471 | && regno <= AR_K7)))) | |
8472 | { | |
8473 | specs[count++] = tmpl; | |
8474 | } | |
8475 | } | |
8476 | else | |
8477 | { | |
8478 | specs[count++] = tmpl; | |
8479 | } | |
8480 | break; | |
8481 | } | |
8482 | } | |
8483 | } | |
8484 | } | |
800eeca4 | 8485 | else if (note == 7) |
542d6675 KH |
8486 | { |
8487 | valueT mask = 0; | |
8488 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8489 | { | |
8490 | mask = CURR_SLOT.opnd[0].X_add_number; | |
8491 | } | |
8492 | else | |
8493 | { | |
8494 | UNHANDLED; | |
8495 | } | |
8496 | if (mask & ((valueT) 1 << dep->regindex)) | |
8497 | { | |
8498 | specs[count++] = tmpl; | |
8499 | } | |
8500 | } | |
800eeca4 | 8501 | else if (note == 8) |
542d6675 KH |
8502 | { |
8503 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
8504 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
8505 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
8506 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8507 | { | |
8508 | if (idesc->operands[i] == IA64_OPND_F1 | |
8509 | || idesc->operands[i] == IA64_OPND_F2 | |
8510 | || idesc->operands[i] == IA64_OPND_F3 | |
8511 | || idesc->operands[i] == IA64_OPND_F4) | |
8512 | { | |
8513 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8514 | if (reg >= min && reg <= max) | |
8515 | { | |
8516 | specs[count++] = tmpl; | |
8517 | } | |
8518 | } | |
8519 | } | |
8520 | } | |
800eeca4 | 8521 | else if (note == 9) |
542d6675 KH |
8522 | { |
8523 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
8524 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
8525 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
8526 | FR2-31 */ | |
8527 | for (i = 0; i < idesc->num_outputs; i++) | |
8528 | { | |
8529 | if (idesc->operands[i] == IA64_OPND_F1) | |
8530 | { | |
8531 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8532 | if (reg >= min && reg <= max) | |
8533 | { | |
8534 | specs[count++] = tmpl; | |
8535 | } | |
8536 | } | |
8537 | } | |
8538 | } | |
800eeca4 | 8539 | else if (note == 10) |
542d6675 KH |
8540 | { |
8541 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8542 | { | |
8543 | if (idesc->operands[i] == IA64_OPND_R1 | |
8544 | || idesc->operands[i] == IA64_OPND_R2 | |
8545 | || idesc->operands[i] == IA64_OPND_R3) | |
8546 | { | |
8547 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8548 | if (regno >= 16 && regno <= 31) | |
8549 | { | |
8550 | specs[count++] = tmpl; | |
8551 | } | |
8552 | } | |
8553 | } | |
8554 | } | |
800eeca4 | 8555 | else |
542d6675 KH |
8556 | { |
8557 | UNHANDLED; | |
8558 | } | |
800eeca4 JW |
8559 | break; |
8560 | ||
8561 | case IA64_RS_AR_FPSR: | |
8562 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
8563 | { |
8564 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8565 | if (regno == AR_FPSR) | |
8566 | { | |
8567 | specs[count++] = tmpl; | |
8568 | } | |
8569 | } | |
800eeca4 | 8570 | else |
542d6675 KH |
8571 | { |
8572 | specs[count++] = tmpl; | |
8573 | } | |
800eeca4 JW |
8574 | break; |
8575 | ||
197865e8 | 8576 | case IA64_RS_ARX: |
800eeca4 JW |
8577 | /* Handle all AR[REG] resources */ |
8578 | if (note == 0 || note == 1) | |
542d6675 KH |
8579 | { |
8580 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8581 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
8582 | && regno == dep->regindex) | |
8583 | { | |
8584 | specs[count++] = tmpl; | |
8585 | } | |
8586 | /* other AR[REG] resources may be affected by AR accesses */ | |
8587 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
8588 | { | |
8589 | /* AR[] writes */ | |
8590 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
8591 | switch (dep->regindex) | |
8592 | { | |
8593 | default: | |
8594 | break; | |
8595 | case AR_BSP: | |
8596 | case AR_RNAT: | |
8597 | if (regno == AR_BSPSTORE) | |
8598 | { | |
8599 | specs[count++] = tmpl; | |
8600 | } | |
8601 | case AR_RSC: | |
8602 | if (!rsrc_write && | |
8603 | (regno == AR_BSPSTORE | |
8604 | || regno == AR_RNAT)) | |
8605 | { | |
8606 | specs[count++] = tmpl; | |
8607 | } | |
8608 | break; | |
8609 | } | |
8610 | } | |
8611 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8612 | { | |
8613 | /* AR[] reads */ | |
8614 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
8615 | switch (dep->regindex) | |
8616 | { | |
8617 | default: | |
8618 | break; | |
8619 | case AR_RSC: | |
8620 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
8621 | { | |
8622 | specs[count++] = tmpl; | |
8623 | } | |
8624 | break; | |
8625 | } | |
8626 | } | |
8627 | else | |
8628 | { | |
8629 | specs[count++] = tmpl; | |
8630 | } | |
8631 | } | |
800eeca4 | 8632 | else |
542d6675 KH |
8633 | { |
8634 | UNHANDLED; | |
8635 | } | |
800eeca4 JW |
8636 | break; |
8637 | ||
8638 | case IA64_RS_CRX: | |
8639 | /* Handle all CR[REG] resources */ | |
8640 | if (note == 0 || note == 1) | |
542d6675 KH |
8641 | { |
8642 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8643 | { | |
8644 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8645 | if (regno == dep->regindex) | |
8646 | { | |
8647 | specs[count++] = tmpl; | |
8648 | } | |
8649 | else if (!rsrc_write) | |
8650 | { | |
8651 | /* Reads from CR[IVR] affect other resources. */ | |
8652 | if (regno == CR_IVR) | |
8653 | { | |
8654 | if ((dep->regindex >= CR_IRR0 | |
8655 | && dep->regindex <= CR_IRR3) | |
8656 | || dep->regindex == CR_TPR) | |
8657 | { | |
8658 | specs[count++] = tmpl; | |
8659 | } | |
8660 | } | |
8661 | } | |
8662 | } | |
8663 | else | |
8664 | { | |
8665 | specs[count++] = tmpl; | |
8666 | } | |
8667 | } | |
800eeca4 | 8668 | else |
542d6675 KH |
8669 | { |
8670 | UNHANDLED; | |
8671 | } | |
800eeca4 JW |
8672 | break; |
8673 | ||
8674 | case IA64_RS_INSERVICE: | |
8675 | /* look for write of EOI (67) or read of IVR (65) */ | |
8676 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
8677 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
8678 | || (idesc->operands[1] == IA64_OPND_CR3 | |
8679 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
8680 | { | |
8681 | specs[count++] = tmpl; | |
8682 | } | |
800eeca4 JW |
8683 | break; |
8684 | ||
8685 | case IA64_RS_GR0: | |
8686 | if (note == 1) | |
542d6675 KH |
8687 | { |
8688 | specs[count++] = tmpl; | |
8689 | } | |
800eeca4 | 8690 | else |
542d6675 KH |
8691 | { |
8692 | UNHANDLED; | |
8693 | } | |
800eeca4 JW |
8694 | break; |
8695 | ||
8696 | case IA64_RS_CFM: | |
8697 | if (note != 2) | |
542d6675 KH |
8698 | { |
8699 | specs[count++] = tmpl; | |
8700 | } | |
800eeca4 | 8701 | else |
542d6675 KH |
8702 | { |
8703 | /* Check if any of the registers accessed are in the rotating region. | |
8704 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
8705 | region */ | |
8706 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8707 | { | |
8708 | if (idesc->operands[i] == IA64_OPND_R1 | |
8709 | || idesc->operands[i] == IA64_OPND_R2 | |
8710 | || idesc->operands[i] == IA64_OPND_R3) | |
8711 | { | |
8712 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8713 | /* Assumes that md.rot.num_regs is always valid */ | |
8714 | if (md.rot.num_regs > 0 | |
8715 | && num > 31 | |
8716 | && num < 31 + md.rot.num_regs) | |
8717 | { | |
8718 | specs[count] = tmpl; | |
8719 | specs[count++].specific = 0; | |
8720 | } | |
8721 | } | |
8722 | else if (idesc->operands[i] == IA64_OPND_F1 | |
8723 | || idesc->operands[i] == IA64_OPND_F2 | |
8724 | || idesc->operands[i] == IA64_OPND_F3 | |
8725 | || idesc->operands[i] == IA64_OPND_F4) | |
8726 | { | |
8727 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8728 | if (num > 31) | |
8729 | { | |
8730 | specs[count] = tmpl; | |
8731 | specs[count++].specific = 0; | |
8732 | } | |
8733 | } | |
8734 | else if (idesc->operands[i] == IA64_OPND_P1 | |
8735 | || idesc->operands[i] == IA64_OPND_P2) | |
8736 | { | |
8737 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8738 | if (num > 15) | |
8739 | { | |
8740 | specs[count] = tmpl; | |
8741 | specs[count++].specific = 0; | |
8742 | } | |
8743 | } | |
8744 | } | |
8745 | if (CURR_SLOT.qp_regno > 15) | |
8746 | { | |
8747 | specs[count] = tmpl; | |
8748 | specs[count++].specific = 0; | |
8749 | } | |
8750 | } | |
800eeca4 JW |
8751 | break; |
8752 | ||
139368c9 JW |
8753 | /* This is the same as IA64_RS_PRr, except simplified to account for |
8754 | the fact that there is only one register. */ | |
800eeca4 JW |
8755 | case IA64_RS_PR63: |
8756 | if (note == 0) | |
542d6675 KH |
8757 | { |
8758 | specs[count++] = tmpl; | |
8759 | } | |
139368c9 | 8760 | else if (note == 7) |
40449e9f KH |
8761 | { |
8762 | valueT mask = 0; | |
8763 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
8764 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8765 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 8766 | specs[count++] = tmpl; |
40449e9f | 8767 | } |
800eeca4 | 8768 | else if (note == 11) |
542d6675 KH |
8769 | { |
8770 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8771 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
8772 | || (idesc->operands[1] == IA64_OPND_P2 | |
8773 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
8774 | { | |
8775 | specs[count++] = tmpl; | |
8776 | } | |
8777 | } | |
800eeca4 | 8778 | else if (note == 12) |
542d6675 KH |
8779 | { |
8780 | if (CURR_SLOT.qp_regno == 63) | |
8781 | { | |
8782 | specs[count++] = tmpl; | |
8783 | } | |
8784 | } | |
800eeca4 | 8785 | else if (note == 1) |
542d6675 KH |
8786 | { |
8787 | if (rsrc_write) | |
8788 | { | |
40449e9f KH |
8789 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
8790 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8791 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8792 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8793 | |
4a4f25cf | 8794 | if (p1 == 63 |
7484b8e6 TW |
8795 | && (idesc->operands[0] == IA64_OPND_P1 |
8796 | || idesc->operands[0] == IA64_OPND_P2)) | |
8797 | { | |
40449e9f | 8798 | specs[count] = tmpl; |
4a4f25cf | 8799 | specs[count++].cmp_type = |
7484b8e6 TW |
8800 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
8801 | } | |
8802 | if (p2 == 63 | |
8803 | && (idesc->operands[1] == IA64_OPND_P1 | |
8804 | || idesc->operands[1] == IA64_OPND_P2)) | |
8805 | { | |
40449e9f | 8806 | specs[count] = tmpl; |
4a4f25cf | 8807 | specs[count++].cmp_type = |
7484b8e6 TW |
8808 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
8809 | } | |
542d6675 KH |
8810 | } |
8811 | else | |
8812 | { | |
8813 | if (CURR_SLOT.qp_regno == 63) | |
8814 | { | |
8815 | specs[count++] = tmpl; | |
8816 | } | |
8817 | } | |
8818 | } | |
800eeca4 | 8819 | else |
542d6675 KH |
8820 | { |
8821 | UNHANDLED; | |
8822 | } | |
800eeca4 JW |
8823 | break; |
8824 | ||
8825 | case IA64_RS_RSE: | |
8826 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
8827 | read resources have not yet been completely identified, so for now |
8828 | treat RSE as a single resource */ | |
800eeca4 | 8829 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
8830 | { |
8831 | if (rsrc_write) | |
8832 | { | |
8833 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8834 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
8835 | { | |
8836 | specs[count] = tmpl; | |
8837 | specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */ | |
8838 | } | |
8839 | } | |
8840 | else | |
8841 | { | |
8842 | if (idesc->operands[0] == IA64_OPND_AR3) | |
8843 | { | |
8844 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
8845 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
8846 | { | |
8847 | specs[count++] = tmpl; | |
8848 | } | |
8849 | } | |
8850 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8851 | { | |
8852 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
8853 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
8854 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
8855 | { | |
8856 | specs[count++] = tmpl; | |
8857 | } | |
8858 | } | |
8859 | } | |
8860 | } | |
197865e8 | 8861 | else |
542d6675 KH |
8862 | { |
8863 | specs[count++] = tmpl; | |
8864 | } | |
800eeca4 JW |
8865 | break; |
8866 | ||
8867 | case IA64_RS_ANY: | |
8868 | /* FIXME -- do any of these need to be non-specific? */ | |
8869 | specs[count++] = tmpl; | |
8870 | break; | |
8871 | ||
8872 | default: | |
8873 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
8874 | break; | |
8875 | } | |
8876 | ||
8877 | return count; | |
8878 | } | |
8879 | ||
8880 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
8881 | QP of the marking instruction and a subsequent branch on the same QP. */ |
8882 | ||
800eeca4 JW |
8883 | static void |
8884 | clear_qp_branch_flag (mask) | |
542d6675 | 8885 | valueT mask; |
800eeca4 JW |
8886 | { |
8887 | int i; | |
542d6675 | 8888 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 8889 | { |
197865e8 | 8890 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 8891 | if ((bit & mask) != 0) |
542d6675 KH |
8892 | { |
8893 | regdeps[i].link_to_qp_branch = 0; | |
8894 | } | |
800eeca4 JW |
8895 | } |
8896 | } | |
8897 | ||
5e2f6673 L |
8898 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
8899 | any mutexes which contain one of the PRs and create new ones when | |
8900 | needed. */ | |
8901 | ||
8902 | static int | |
8903 | update_qp_mutex (valueT mask) | |
8904 | { | |
8905 | int i; | |
8906 | int add = 0; | |
8907 | ||
8908 | i = 0; | |
8909 | while (i < qp_mutexeslen) | |
8910 | { | |
8911 | if ((qp_mutexes[i].prmask & mask) != 0) | |
8912 | { | |
8913 | /* If it destroys and creates the same mutex, do nothing. */ | |
8914 | if (qp_mutexes[i].prmask == mask | |
8915 | && qp_mutexes[i].path == md.path) | |
8916 | { | |
8917 | i++; | |
8918 | add = -1; | |
8919 | } | |
8920 | else | |
8921 | { | |
8922 | int keep = 0; | |
8923 | ||
8924 | if (md.debug_dv) | |
8925 | { | |
8926 | fprintf (stderr, " Clearing mutex relation"); | |
8927 | print_prmask (qp_mutexes[i].prmask); | |
8928 | fprintf (stderr, "\n"); | |
8929 | } | |
8930 | ||
8931 | /* Deal with the old mutex with more than 3+ PRs only if | |
8932 | the new mutex on the same execution path with it. | |
8933 | ||
8934 | FIXME: The 3+ mutex support is incomplete. | |
8935 | dot_pred_rel () may be a better place to fix it. */ | |
8936 | if (qp_mutexes[i].path == md.path) | |
8937 | { | |
8938 | /* If it is a proper subset of the mutex, create a | |
8939 | new mutex. */ | |
8940 | if (add == 0 | |
8941 | && (qp_mutexes[i].prmask & mask) == mask) | |
8942 | add = 1; | |
8943 | ||
8944 | qp_mutexes[i].prmask &= ~mask; | |
8945 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
8946 | { | |
8947 | /* Modify the mutex if there are more than one | |
8948 | PR left. */ | |
8949 | keep = 1; | |
8950 | i++; | |
8951 | } | |
8952 | } | |
8953 | ||
8954 | if (keep == 0) | |
8955 | /* Remove the mutex. */ | |
8956 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8957 | } | |
8958 | } | |
8959 | else | |
8960 | ++i; | |
8961 | } | |
8962 | ||
8963 | if (add == 1) | |
8964 | add_qp_mutex (mask); | |
8965 | ||
8966 | return add; | |
8967 | } | |
8968 | ||
197865e8 | 8969 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 8970 | |
542d6675 KH |
8971 | Any changes to a PR clears the mutex relations which include that PR. */ |
8972 | ||
800eeca4 JW |
8973 | static void |
8974 | clear_qp_mutex (mask) | |
542d6675 | 8975 | valueT mask; |
800eeca4 JW |
8976 | { |
8977 | int i; | |
8978 | ||
8979 | i = 0; | |
8980 | while (i < qp_mutexeslen) | |
8981 | { | |
8982 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
8983 | { |
8984 | if (md.debug_dv) | |
8985 | { | |
8986 | fprintf (stderr, " Clearing mutex relation"); | |
8987 | print_prmask (qp_mutexes[i].prmask); | |
8988 | fprintf (stderr, "\n"); | |
8989 | } | |
8990 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8991 | } | |
800eeca4 | 8992 | else |
542d6675 | 8993 | ++i; |
800eeca4 JW |
8994 | } |
8995 | } | |
8996 | ||
8997 | /* Clear implies relations which contain PRs in the given masks. | |
8998 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
8999 | indicates the implied PR. */ |
9000 | ||
800eeca4 JW |
9001 | static void |
9002 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9003 | valueT p1_mask; |
9004 | valueT p2_mask; | |
800eeca4 JW |
9005 | { |
9006 | int i; | |
9007 | ||
9008 | i = 0; | |
9009 | while (i < qp_implieslen) | |
9010 | { | |
197865e8 | 9011 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9012 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9013 | { | |
9014 | if (md.debug_dv) | |
9015 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9016 | qp_implies[i].p1, qp_implies[i].p2); | |
9017 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9018 | } | |
197865e8 | 9019 | else |
542d6675 | 9020 | ++i; |
800eeca4 JW |
9021 | } |
9022 | } | |
9023 | ||
542d6675 KH |
9024 | /* Add the PRs specified to the list of implied relations. */ |
9025 | ||
800eeca4 JW |
9026 | static void |
9027 | add_qp_imply (p1, p2) | |
542d6675 | 9028 | int p1, p2; |
800eeca4 JW |
9029 | { |
9030 | valueT mask; | |
9031 | valueT bit; | |
9032 | int i; | |
9033 | ||
542d6675 | 9034 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9035 | if (p1 == 0 || p2 == 0) |
9036 | abort (); | |
9037 | ||
9038 | if (p1 == p2) | |
9039 | return; | |
9040 | ||
542d6675 KH |
9041 | /* If it exists already, ignore it. */ |
9042 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9043 | { |
197865e8 | 9044 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9045 | && qp_implies[i].p2 == p2 |
9046 | && qp_implies[i].path == md.path | |
9047 | && !qp_implies[i].p2_branched) | |
9048 | return; | |
800eeca4 JW |
9049 | } |
9050 | ||
9051 | if (qp_implieslen == qp_impliestotlen) | |
9052 | { | |
9053 | qp_impliestotlen += 20; | |
9054 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9055 | xrealloc ((void *) qp_implies, |
9056 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9057 | } |
9058 | if (md.debug_dv) | |
9059 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9060 | qp_implies[qp_implieslen].p1 = p1; | |
9061 | qp_implies[qp_implieslen].p2 = p2; | |
9062 | qp_implies[qp_implieslen].path = md.path; | |
9063 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9064 | ||
9065 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9066 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9067 | as well. */ |
542d6675 | 9068 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9069 | { |
9070 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9071 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9072 | if (qp_implies[i].p2 == p1) |
542d6675 | 9073 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9074 | } |
9075 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9076 | relation containing p2, duplicate it and replace p2 with p1. */ |
9077 | bit = (valueT) 1 << p1; | |
9078 | mask = (valueT) 1 << p2; | |
542d6675 | 9079 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9080 | { |
9081 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9082 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9083 | } |
9084 | } | |
9085 | ||
800eeca4 JW |
9086 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9087 | one of the PRs can be true at any time. PR0 should never be included in | |
9088 | the mask. */ | |
542d6675 | 9089 | |
800eeca4 JW |
9090 | static void |
9091 | add_qp_mutex (mask) | |
542d6675 | 9092 | valueT mask; |
800eeca4 JW |
9093 | { |
9094 | if (mask & 0x1) | |
9095 | abort (); | |
9096 | ||
9097 | if (qp_mutexeslen == qp_mutexestotlen) | |
9098 | { | |
9099 | qp_mutexestotlen += 20; | |
9100 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9101 | xrealloc ((void *) qp_mutexes, |
9102 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9103 | } |
9104 | if (md.debug_dv) | |
9105 | { | |
9106 | fprintf (stderr, " Registering mutex on"); | |
9107 | print_prmask (mask); | |
9108 | fprintf (stderr, "\n"); | |
9109 | } | |
9110 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9111 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9112 | } | |
9113 | ||
cb5301b6 RH |
9114 | static int |
9115 | has_suffix_p (name, suffix) | |
40449e9f KH |
9116 | const char *name; |
9117 | const char *suffix; | |
cb5301b6 RH |
9118 | { |
9119 | size_t namelen = strlen (name); | |
9120 | size_t sufflen = strlen (suffix); | |
9121 | ||
9122 | if (namelen <= sufflen) | |
9123 | return 0; | |
9124 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9125 | } | |
9126 | ||
800eeca4 JW |
9127 | static void |
9128 | clear_register_values () | |
9129 | { | |
9130 | int i; | |
9131 | if (md.debug_dv) | |
9132 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9133 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9134 | gr_values[i].known = 0; |
9135 | } | |
9136 | ||
9137 | /* Keep track of register values/changes which affect DV tracking. | |
9138 | ||
9139 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9140 | have to examine a group of strings to identify them. */ |
800eeca4 | 9141 | |
800eeca4 JW |
9142 | static void |
9143 | note_register_values (idesc) | |
542d6675 | 9144 | struct ia64_opcode *idesc; |
800eeca4 JW |
9145 | { |
9146 | valueT qp_changemask = 0; | |
9147 | int i; | |
9148 | ||
542d6675 KH |
9149 | /* Invalidate values for registers being written to. */ |
9150 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9151 | { |
197865e8 | 9152 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9153 | || idesc->operands[i] == IA64_OPND_R2 |
9154 | || idesc->operands[i] == IA64_OPND_R3) | |
9155 | { | |
9156 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9157 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9158 | gr_values[regno].known = 0; | |
9159 | } | |
50b81f19 JW |
9160 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9161 | { | |
9162 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9163 | if (regno > 0 && regno < 4) | |
9164 | gr_values[regno].known = 0; | |
9165 | } | |
197865e8 | 9166 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9167 | || idesc->operands[i] == IA64_OPND_P2) |
9168 | { | |
9169 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9170 | qp_changemask |= (valueT) 1 << regno; | |
9171 | } | |
800eeca4 | 9172 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9173 | { |
9174 | if (idesc->operands[2] & (valueT) 0x10000) | |
9175 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9176 | else | |
9177 | qp_changemask = idesc->operands[2]; | |
9178 | break; | |
9179 | } | |
800eeca4 | 9180 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9181 | { |
9182 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9183 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9184 | else |
9185 | qp_changemask = idesc->operands[1]; | |
9186 | qp_changemask &= ~(valueT) 0xFFFF; | |
9187 | break; | |
9188 | } | |
9189 | } | |
9190 | ||
9191 | /* Always clear qp branch flags on any PR change. */ | |
9192 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9193 | clear_qp_branch_flag (qp_changemask); |
9194 | ||
542d6675 | 9195 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9196 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9197 | { | |
197865e8 | 9198 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9199 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9200 | { |
9201 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9202 | gr_values[i].known = 0; | |
9203 | } | |
800eeca4 JW |
9204 | clear_qp_mutex (qp_changemask); |
9205 | clear_qp_implies (qp_changemask, qp_changemask); | |
9206 | } | |
542d6675 KH |
9207 | /* After a call, all register values are undefined, except those marked |
9208 | as "safe". */ | |
800eeca4 | 9209 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9210 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9211 | { |
56d27c17 | 9212 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9213 | clear_register_values (); |
9214 | clear_qp_mutex (~qp_safe_across_calls); | |
9215 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9216 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9217 | } | |
e9718fe1 | 9218 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9219 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9220 | { |
9221 | clear_register_values (); | |
197865e8 KH |
9222 | clear_qp_mutex (~(valueT) 0); |
9223 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9224 | } |
542d6675 | 9225 | /* Look for mutex and implies relations. */ |
197865e8 | 9226 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9227 | || idesc->operands[0] == IA64_OPND_P2) |
9228 | && (idesc->operands[1] == IA64_OPND_P1 | |
9229 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9230 | { |
9231 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9232 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9233 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9234 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9235 | |
5e2f6673 L |
9236 | /* If both PRs are PR0, we can't really do anything. */ |
9237 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9238 | { |
9239 | if (md.debug_dv) | |
9240 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9241 | } | |
800eeca4 | 9242 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9243 | with the following exceptions. */ |
cb5301b6 RH |
9244 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9245 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9246 | { |
542d6675 KH |
9247 | clear_qp_implies (p2mask, p1mask); |
9248 | } | |
cb5301b6 RH |
9249 | else if (has_suffix_p (idesc->name, ".andcm") |
9250 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9251 | { |
9252 | clear_qp_implies (0, p1mask | p2mask); | |
9253 | } | |
cb5301b6 RH |
9254 | else if (has_suffix_p (idesc->name, ".orcm") |
9255 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9256 | { |
9257 | clear_qp_mutex (p1mask | p2mask); | |
9258 | clear_qp_implies (p1mask | p2mask, 0); | |
9259 | } | |
800eeca4 | 9260 | else |
542d6675 | 9261 | { |
5e2f6673 L |
9262 | int added = 0; |
9263 | ||
542d6675 | 9264 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9265 | |
9266 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9267 | if (p1 == 0 || p2 == 0) | |
9268 | clear_qp_mutex (p1mask | p2mask); | |
9269 | else | |
9270 | added = update_qp_mutex (p1mask | p2mask); | |
9271 | ||
9272 | if (CURR_SLOT.qp_regno == 0 | |
9273 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9274 | { |
5e2f6673 L |
9275 | if (added == 0 && p1 && p2) |
9276 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9277 | if (CURR_SLOT.qp_regno != 0) |
9278 | { | |
5e2f6673 L |
9279 | if (p1) |
9280 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9281 | if (p2) | |
9282 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9283 | } |
9284 | } | |
542d6675 KH |
9285 | } |
9286 | } | |
9287 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9288 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9289 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9290 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
9291 | && (strcmp (idesc->name, "mov") == 0 | |
9292 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9293 | { |
9294 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9295 | if (regno > 0 && regno < NELEMS (gr_values)) |
9296 | { | |
9297 | gr_values[regno].known = 1; | |
9298 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9299 | gr_values[regno].path = md.path; | |
9300 | if (md.debug_dv) | |
2434f565 JW |
9301 | { |
9302 | fprintf (stderr, " Know gr%d = ", regno); | |
9303 | fprintf_vma (stderr, gr_values[regno].value); | |
9304 | fputs ("\n", stderr); | |
9305 | } | |
542d6675 | 9306 | } |
800eeca4 | 9307 | } |
197865e8 | 9308 | else |
800eeca4 JW |
9309 | { |
9310 | clear_qp_mutex (qp_changemask); | |
9311 | clear_qp_implies (qp_changemask, qp_changemask); | |
9312 | } | |
9313 | } | |
9314 | ||
542d6675 KH |
9315 | /* Return whether the given predicate registers are currently mutex. */ |
9316 | ||
800eeca4 JW |
9317 | static int |
9318 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9319 | int p1; |
9320 | int p2; | |
9321 | int path; | |
800eeca4 JW |
9322 | { |
9323 | int i; | |
9324 | valueT mask; | |
9325 | ||
9326 | if (p1 != p2) | |
9327 | { | |
542d6675 KH |
9328 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9329 | for (i = 0; i < qp_mutexeslen; i++) | |
9330 | { | |
9331 | if (qp_mutexes[i].path >= path | |
9332 | && (qp_mutexes[i].prmask & mask) == mask) | |
9333 | return 1; | |
9334 | } | |
800eeca4 JW |
9335 | } |
9336 | return 0; | |
9337 | } | |
9338 | ||
9339 | /* Return whether the given resource is in the given insn's list of chks | |
9340 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9341 | conflict. */ |
9342 | ||
800eeca4 JW |
9343 | static int |
9344 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9345 | struct rsrc *rs; |
9346 | struct ia64_opcode *idesc; | |
9347 | int note; | |
9348 | int qp_regno; | |
9349 | int path; | |
800eeca4 JW |
9350 | { |
9351 | struct rsrc specs[MAX_SPECS]; | |
9352 | int count; | |
9353 | ||
9354 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9355 | we don't need to check. One exception is note 11, which indicates that | |
9356 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9357 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9358 | && note != 11) |
9359 | return 0; | |
9360 | ||
9361 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9362 | while (count-- > 0) | |
9363 | { | |
9364 | /* UNAT checking is a bit more specific than other resources */ | |
9365 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9366 | && specs[count].mem_offset.hint |
9367 | && rs->mem_offset.hint) | |
9368 | { | |
9369 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9370 | { | |
9371 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9372 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9373 | return 1; | |
9374 | else | |
9375 | continue; | |
9376 | } | |
9377 | } | |
800eeca4 | 9378 | |
7484b8e6 | 9379 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9380 | writes are an OR. */ |
7484b8e6 | 9381 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9382 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9383 | || rs->dependency->specifier == IA64_RS_PR63) |
9384 | { | |
9385 | if (specs[count].cmp_type != CMP_NONE | |
9386 | && specs[count].cmp_type == rs->cmp_type) | |
9387 | { | |
9388 | if (md.debug_dv) | |
9389 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9390 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9391 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9392 | specs[count].index : 63); |
9393 | continue; | |
9394 | } | |
9395 | if (md.debug_dv) | |
4a4f25cf | 9396 | fprintf (stderr, |
7484b8e6 TW |
9397 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9398 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9399 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9400 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9401 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9402 | specs[count].index : 63); |
4a4f25cf | 9403 | |
7484b8e6 TW |
9404 | } |
9405 | ||
800eeca4 | 9406 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9407 | */ |
800eeca4 | 9408 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9409 | return 2; |
800eeca4 | 9410 | else if (specs[count].index == rs->index) |
542d6675 | 9411 | return 1; |
800eeca4 JW |
9412 | } |
9413 | #if 0 | |
9414 | if (md.debug_dv) | |
9415 | fprintf (stderr, " No %s conflicts\n", rs->dependency->name); | |
9416 | #endif | |
9417 | ||
9418 | return 0; | |
9419 | } | |
9420 | ||
9421 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9422 | insert a stop to create the break. Update all resource dependencies | |
9423 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9424 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9425 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9426 | instruction. */ |
800eeca4 JW |
9427 | |
9428 | static void | |
9429 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
9430 | int insert_stop; |
9431 | int qp_regno; | |
9432 | int save_current; | |
800eeca4 JW |
9433 | { |
9434 | int i; | |
9435 | ||
9436 | if (insert_stop && md.num_slots_in_use > 0) | |
9437 | PREV_SLOT.end_of_insn_group = 1; | |
9438 | ||
9439 | if (md.debug_dv) | |
9440 | { | |
197865e8 | 9441 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9442 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9443 | if (qp_regno != 0) |
542d6675 | 9444 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9445 | fprintf (stderr, "\n"); |
9446 | } | |
9447 | ||
9448 | i = 0; | |
9449 | while (i < regdepslen) | |
9450 | { | |
9451 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9452 | ||
9453 | if (qp_regno != 0 | |
542d6675 KH |
9454 | && regdeps[i].qp_regno != qp_regno) |
9455 | { | |
9456 | ++i; | |
9457 | continue; | |
9458 | } | |
800eeca4 JW |
9459 | |
9460 | if (save_current | |
542d6675 KH |
9461 | && CURR_SLOT.src_file == regdeps[i].file |
9462 | && CURR_SLOT.src_line == regdeps[i].line) | |
9463 | { | |
9464 | ++i; | |
9465 | continue; | |
9466 | } | |
800eeca4 JW |
9467 | |
9468 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9469 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9470 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9471 | || dep->semantics == IA64_DVS_IMPLIEDF |
9472 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9473 | { | |
9474 | print_dependency ("Removing", i); | |
9475 | regdeps[i] = regdeps[--regdepslen]; | |
9476 | } | |
800eeca4 | 9477 | else |
542d6675 KH |
9478 | { |
9479 | if (dep->semantics == IA64_DVS_DATA | |
9480 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9481 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9482 | { |
9483 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9484 | regdeps[i].insn_srlz = STATE_STOP; | |
9485 | if (regdeps[i].data_srlz == STATE_NONE) | |
9486 | regdeps[i].data_srlz = STATE_STOP; | |
9487 | } | |
9488 | ++i; | |
9489 | } | |
800eeca4 JW |
9490 | } |
9491 | } | |
9492 | ||
542d6675 KH |
9493 | /* Add the given resource usage spec to the list of active dependencies. */ |
9494 | ||
197865e8 | 9495 | static void |
800eeca4 | 9496 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
9497 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
9498 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
9499 | struct rsrc *spec; |
9500 | int depind; | |
9501 | int path; | |
800eeca4 JW |
9502 | { |
9503 | if (regdepslen == regdepstotlen) | |
9504 | { | |
9505 | regdepstotlen += 20; | |
9506 | regdeps = (struct rsrc *) | |
542d6675 | 9507 | xrealloc ((void *) regdeps, |
bc805888 | 9508 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
9509 | } |
9510 | ||
9511 | regdeps[regdepslen] = *spec; | |
9512 | regdeps[regdepslen].depind = depind; | |
9513 | regdeps[regdepslen].path = path; | |
9514 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
9515 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
9516 | ||
9517 | print_dependency ("Adding", regdepslen); | |
9518 | ||
9519 | ++regdepslen; | |
9520 | } | |
9521 | ||
9522 | static void | |
9523 | print_dependency (action, depind) | |
542d6675 KH |
9524 | const char *action; |
9525 | int depind; | |
800eeca4 JW |
9526 | { |
9527 | if (md.debug_dv) | |
9528 | { | |
197865e8 | 9529 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
9530 | action, dv_mode[(regdeps[depind].dependency)->mode], |
9531 | (regdeps[depind].dependency)->name); | |
800eeca4 | 9532 | if (regdeps[depind].specific && regdeps[depind].index != 0) |
542d6675 | 9533 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 9534 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
9535 | { |
9536 | fputs (" ", stderr); | |
9537 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
9538 | fputs ("+", stderr); | |
9539 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
9540 | } | |
800eeca4 JW |
9541 | fprintf (stderr, "\n"); |
9542 | } | |
9543 | } | |
9544 | ||
9545 | static void | |
9546 | instruction_serialization () | |
9547 | { | |
9548 | int i; | |
9549 | if (md.debug_dv) | |
9550 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 9551 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
9552 | if (regdeps[i].insn_srlz == STATE_STOP) |
9553 | regdeps[i].insn_srlz = STATE_SRLZ; | |
9554 | } | |
9555 | ||
9556 | static void | |
9557 | data_serialization () | |
9558 | { | |
9559 | int i = 0; | |
9560 | if (md.debug_dv) | |
9561 | fprintf (stderr, " Data serialization\n"); | |
9562 | while (i < regdepslen) | |
9563 | { | |
9564 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
9565 | /* Note: as of 991210, all "other" dependencies are cleared by a |
9566 | data serialization. This might change with new tables */ | |
9567 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
9568 | { | |
9569 | print_dependency ("Removing", i); | |
9570 | regdeps[i] = regdeps[--regdepslen]; | |
9571 | } | |
800eeca4 | 9572 | else |
542d6675 | 9573 | ++i; |
800eeca4 JW |
9574 | } |
9575 | } | |
9576 | ||
542d6675 KH |
9577 | /* Insert stops and serializations as needed to avoid DVs. */ |
9578 | ||
800eeca4 JW |
9579 | static void |
9580 | remove_marked_resource (rs) | |
542d6675 | 9581 | struct rsrc *rs; |
800eeca4 JW |
9582 | { |
9583 | switch (rs->dependency->semantics) | |
9584 | { | |
9585 | case IA64_DVS_SPECIFIC: | |
9586 | if (md.debug_dv) | |
9587 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 9588 | /* ...fall through... */ |
800eeca4 JW |
9589 | case IA64_DVS_INSTR: |
9590 | if (md.debug_dv) | |
542d6675 | 9591 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 9592 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 9593 | insn_group_break (1, 0, 0); |
800eeca4 | 9594 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 9595 | { |
888a75be | 9596 | struct slot oldslot = CURR_SLOT; |
542d6675 | 9597 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 9598 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
542d6675 KH |
9599 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
9600 | instruction_serialization (); | |
9601 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9602 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9603 | emit_one_bundle (); | |
888a75be | 9604 | CURR_SLOT = oldslot; |
542d6675 | 9605 | } |
800eeca4 JW |
9606 | insn_group_break (1, 0, 0); |
9607 | break; | |
9608 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
9609 | "other" types of DV are eliminated |
9610 | by a data serialization */ | |
800eeca4 JW |
9611 | case IA64_DVS_DATA: |
9612 | if (md.debug_dv) | |
542d6675 | 9613 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 9614 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 9615 | insn_group_break (1, 0, 0); |
800eeca4 | 9616 | { |
888a75be | 9617 | struct slot oldslot = CURR_SLOT; |
542d6675 | 9618 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 9619 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
542d6675 KH |
9620 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
9621 | data_serialization (); | |
9622 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9623 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9624 | emit_one_bundle (); | |
888a75be | 9625 | CURR_SLOT = oldslot; |
800eeca4 JW |
9626 | } |
9627 | break; | |
9628 | case IA64_DVS_IMPLIED: | |
9629 | case IA64_DVS_IMPLIEDF: | |
9630 | if (md.debug_dv) | |
542d6675 | 9631 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
9632 | insn_group_break (1, 0, 0); |
9633 | break; | |
9634 | default: | |
9635 | break; | |
9636 | } | |
9637 | } | |
9638 | ||
9639 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 9640 | list. |
800eeca4 JW |
9641 | |
9642 | The check is run once for each execution path encountered. In this case, | |
9643 | a unique execution path is the sequence of instructions following a code | |
9644 | entry point, e.g. the following has three execution paths, one starting | |
9645 | at L0, one at L1, and one at L2. | |
197865e8 | 9646 | |
800eeca4 JW |
9647 | L0: nop |
9648 | L1: add | |
9649 | L2: add | |
197865e8 | 9650 | br.ret |
800eeca4 | 9651 | */ |
542d6675 | 9652 | |
800eeca4 JW |
9653 | static void |
9654 | check_dependencies (idesc) | |
542d6675 | 9655 | struct ia64_opcode *idesc; |
800eeca4 JW |
9656 | { |
9657 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9658 | int path; | |
9659 | int i; | |
9660 | ||
9661 | /* Note that the number of marked resources may change within the | |
197865e8 | 9662 | loop if in auto mode. */ |
800eeca4 JW |
9663 | i = 0; |
9664 | while (i < regdepslen) | |
9665 | { | |
9666 | struct rsrc *rs = ®deps[i]; | |
9667 | const struct ia64_dependency *dep = rs->dependency; | |
9668 | int chkind; | |
9669 | int note; | |
9670 | int start_over = 0; | |
9671 | ||
9672 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
9673 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
9674 | { | |
9675 | ++i; | |
9676 | continue; | |
9677 | } | |
9678 | ||
9679 | note = NOTE (opdeps->chks[chkind]); | |
9680 | ||
9681 | /* Check this resource against each execution path seen thus far. */ | |
9682 | for (path = 0; path <= md.path; path++) | |
9683 | { | |
9684 | int matchtype; | |
9685 | ||
9686 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
9687 | if (rs->path < path) | |
9688 | continue; | |
9689 | ||
9690 | /* If the QP for this insn implies a QP which has branched, don't | |
9691 | bother checking. Ed. NOTE: I don't think this check is terribly | |
9692 | useful; what's the point of generating code which will only be | |
9693 | reached if its QP is zero? | |
9694 | This code was specifically inserted to handle the following code, | |
9695 | based on notes from Intel's DV checking code, where p1 implies p2. | |
9696 | ||
9697 | mov r4 = 2 | |
9698 | (p2) br.cond L | |
9699 | (p1) mov r4 = 7 | |
9700 | */ | |
9701 | if (CURR_SLOT.qp_regno != 0) | |
9702 | { | |
9703 | int skip = 0; | |
9704 | int implies; | |
9705 | for (implies = 0; implies < qp_implieslen; implies++) | |
9706 | { | |
9707 | if (qp_implies[implies].path >= path | |
9708 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
9709 | && qp_implies[implies].p2_branched) | |
9710 | { | |
9711 | skip = 1; | |
9712 | break; | |
9713 | } | |
9714 | } | |
9715 | if (skip) | |
9716 | continue; | |
9717 | } | |
9718 | ||
9719 | if ((matchtype = resources_match (rs, idesc, note, | |
9720 | CURR_SLOT.qp_regno, path)) != 0) | |
9721 | { | |
9722 | char msg[1024]; | |
9723 | char pathmsg[256] = ""; | |
9724 | char indexmsg[256] = ""; | |
9725 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
9726 | ||
9727 | if (path != 0) | |
9728 | sprintf (pathmsg, " when entry is at label '%s'", | |
9729 | md.entry_labels[path - 1]); | |
9730 | if (rs->specific && rs->index != 0) | |
9731 | sprintf (indexmsg, ", specific resource number is %d", | |
9732 | rs->index); | |
9733 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
9734 | idesc->name, | |
9735 | (certain ? "violates" : "may violate"), | |
9736 | dv_mode[dep->mode], dep->name, | |
9737 | dv_sem[dep->semantics], | |
9738 | pathmsg, indexmsg); | |
9739 | ||
9740 | if (md.explicit_mode) | |
9741 | { | |
9742 | as_warn ("%s", msg); | |
9743 | if (path < md.path) | |
9744 | as_warn (_("Only the first path encountering the conflict " | |
9745 | "is reported")); | |
9746 | as_warn_where (rs->file, rs->line, | |
9747 | _("This is the location of the " | |
9748 | "conflicting usage")); | |
9749 | /* Don't bother checking other paths, to avoid duplicating | |
9750 | the same warning */ | |
9751 | break; | |
9752 | } | |
9753 | else | |
9754 | { | |
9755 | if (md.debug_dv) | |
9756 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
9757 | ||
9758 | remove_marked_resource (rs); | |
9759 | ||
9760 | /* since the set of dependencies has changed, start over */ | |
9761 | /* FIXME -- since we're removing dvs as we go, we | |
9762 | probably don't really need to start over... */ | |
9763 | start_over = 1; | |
9764 | break; | |
9765 | } | |
9766 | } | |
9767 | } | |
800eeca4 | 9768 | if (start_over) |
542d6675 | 9769 | i = 0; |
800eeca4 | 9770 | else |
542d6675 | 9771 | ++i; |
800eeca4 JW |
9772 | } |
9773 | } | |
9774 | ||
542d6675 KH |
9775 | /* Register new dependencies based on the given opcode. */ |
9776 | ||
800eeca4 JW |
9777 | static void |
9778 | mark_resources (idesc) | |
542d6675 | 9779 | struct ia64_opcode *idesc; |
800eeca4 JW |
9780 | { |
9781 | int i; | |
9782 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9783 | int add_only_qp_reads = 0; | |
9784 | ||
9785 | /* A conditional branch only uses its resources if it is taken; if it is | |
9786 | taken, we stop following that path. The other branch types effectively | |
9787 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 9788 | reads. */ |
800eeca4 JW |
9789 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
9790 | { | |
9791 | add_only_qp_reads = 1; | |
9792 | } | |
9793 | ||
9794 | if (md.debug_dv) | |
9795 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
9796 | ||
542d6675 | 9797 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
9798 | { |
9799 | const struct ia64_dependency *dep; | |
9800 | struct rsrc specs[MAX_SPECS]; | |
9801 | int note; | |
9802 | int path; | |
9803 | int count; | |
197865e8 | 9804 | |
800eeca4 | 9805 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 9806 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
9807 | |
9808 | if (add_only_qp_reads | |
542d6675 KH |
9809 | && !(dep->mode == IA64_DV_WAR |
9810 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 9811 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
9812 | || dep->specifier == IA64_RS_PR63))) |
9813 | continue; | |
800eeca4 JW |
9814 | |
9815 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
9816 | ||
9817 | #if 0 | |
9818 | if (md.debug_dv && !count) | |
542d6675 KH |
9819 | fprintf (stderr, " No %s %s usage found (path %d)\n", |
9820 | dv_mode[dep->mode], dep->name, md.path); | |
800eeca4 | 9821 | #endif |
197865e8 | 9822 | |
800eeca4 | 9823 | while (count-- > 0) |
542d6675 KH |
9824 | { |
9825 | mark_resource (idesc, dep, &specs[count], | |
9826 | DEP (opdeps->regs[i]), md.path); | |
9827 | } | |
800eeca4 JW |
9828 | |
9829 | /* The execution path may affect register values, which may in turn | |
542d6675 | 9830 | affect which indirect-access resources are accessed. */ |
800eeca4 | 9831 | switch (dep->specifier) |
542d6675 KH |
9832 | { |
9833 | default: | |
9834 | break; | |
9835 | case IA64_RS_CPUID: | |
9836 | case IA64_RS_DBR: | |
9837 | case IA64_RS_IBR: | |
800eeca4 | 9838 | case IA64_RS_MSR: |
542d6675 KH |
9839 | case IA64_RS_PKR: |
9840 | case IA64_RS_PMC: | |
9841 | case IA64_RS_PMD: | |
9842 | case IA64_RS_RR: | |
9843 | for (path = 0; path < md.path; path++) | |
9844 | { | |
9845 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
9846 | while (count-- > 0) | |
9847 | mark_resource (idesc, dep, &specs[count], | |
9848 | DEP (opdeps->regs[i]), path); | |
9849 | } | |
9850 | break; | |
9851 | } | |
9852 | } | |
9853 | } | |
9854 | ||
9855 | /* Remove dependencies when they no longer apply. */ | |
9856 | ||
800eeca4 JW |
9857 | static void |
9858 | update_dependencies (idesc) | |
542d6675 | 9859 | struct ia64_opcode *idesc; |
800eeca4 JW |
9860 | { |
9861 | int i; | |
9862 | ||
9863 | if (strcmp (idesc->name, "srlz.i") == 0) | |
9864 | { | |
9865 | instruction_serialization (); | |
9866 | } | |
9867 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
9868 | { | |
9869 | data_serialization (); | |
9870 | } | |
9871 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 9872 | || is_taken_branch (idesc)) |
800eeca4 | 9873 | { |
542d6675 KH |
9874 | /* Although technically the taken branch doesn't clear dependencies |
9875 | which require a srlz.[id], we don't follow the branch; the next | |
9876 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 9877 | regdepslen = 0; |
800eeca4 JW |
9878 | md.path = 0; |
9879 | } | |
9880 | else if (is_conditional_branch (idesc) | |
542d6675 | 9881 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
9882 | { |
9883 | int is_call = strstr (idesc->name, ".call") != NULL; | |
9884 | ||
542d6675 KH |
9885 | for (i = 0; i < qp_implieslen; i++) |
9886 | { | |
9887 | /* If the conditional branch's predicate is implied by the predicate | |
9888 | in an existing dependency, remove that dependency. */ | |
9889 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
9890 | { | |
9891 | int depind = 0; | |
9892 | /* Note that this implied predicate takes a branch so that if | |
9893 | a later insn generates a DV but its predicate implies this | |
9894 | one, we can avoid the false DV warning. */ | |
9895 | qp_implies[i].p2_branched = 1; | |
9896 | while (depind < regdepslen) | |
9897 | { | |
9898 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
9899 | { | |
9900 | print_dependency ("Removing", depind); | |
9901 | regdeps[depind] = regdeps[--regdepslen]; | |
9902 | } | |
9903 | else | |
9904 | ++depind; | |
9905 | } | |
9906 | } | |
9907 | } | |
800eeca4 | 9908 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
9909 | cleared, provided that the QP hasn't been modified between the |
9910 | marking instruction and the branch. */ | |
800eeca4 | 9911 | if (is_call) |
542d6675 KH |
9912 | { |
9913 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
9914 | } | |
800eeca4 | 9915 | else |
542d6675 KH |
9916 | { |
9917 | i = 0; | |
9918 | while (i < regdepslen) | |
9919 | { | |
9920 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
9921 | && regdeps[i].link_to_qp_branch | |
9922 | && (regdeps[i].file != CURR_SLOT.src_file | |
9923 | || regdeps[i].line != CURR_SLOT.src_line)) | |
9924 | { | |
9925 | /* Treat like a taken branch */ | |
9926 | print_dependency ("Removing", i); | |
9927 | regdeps[i] = regdeps[--regdepslen]; | |
9928 | } | |
9929 | else | |
9930 | ++i; | |
9931 | } | |
9932 | } | |
800eeca4 JW |
9933 | } |
9934 | } | |
9935 | ||
9936 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 9937 | |
800eeca4 JW |
9938 | static int |
9939 | check_dv (idesc) | |
542d6675 | 9940 | struct ia64_opcode *idesc; |
800eeca4 JW |
9941 | { |
9942 | if (md.debug_dv) | |
9943 | { | |
197865e8 | 9944 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
9945 | idesc->name, CURR_SLOT.src_line, |
9946 | idesc->dependencies->nchks, | |
9947 | idesc->dependencies->nregs); | |
800eeca4 JW |
9948 | } |
9949 | ||
197865e8 | 9950 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 9951 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 9952 | check against the specific resources used. */ |
800eeca4 JW |
9953 | check_dependencies (idesc); |
9954 | ||
542d6675 KH |
9955 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
9956 | then add them to the list of marked resources. */ | |
800eeca4 JW |
9957 | mark_resources (idesc); |
9958 | ||
9959 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
9960 | requirements for being cleared |
9961 | ||
800eeca4 JW |
9962 | Instruction serialization (insns separated by interruption, rfi, or |
9963 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
9964 | ||
9965 | Data serialization (instruction serialization, or writer + srlz.d + | |
9966 | reader, where writer and srlz.d are in separate groups) clears | |
9967 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
9968 | always be the case). | |
9969 | ||
9970 | Instruction group break (groups separated by stop, taken branch, | |
9971 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
9972 | */ | |
9973 | update_dependencies (idesc); | |
9974 | ||
9975 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 9976 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
9977 | note_register_values (idesc); |
9978 | ||
197865e8 | 9979 | /* We don't need or want this anymore. */ |
800eeca4 JW |
9980 | md.mem_offset.hint = 0; |
9981 | ||
9982 | return 0; | |
9983 | } | |
9984 | ||
9985 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
9986 | here. */ | |
9987 | void | |
9988 | md_assemble (str) | |
9989 | char *str; | |
9990 | { | |
9991 | char *saved_input_line_pointer, *mnemonic; | |
9992 | const struct pseudo_opcode *pdesc; | |
9993 | struct ia64_opcode *idesc; | |
9994 | unsigned char qp_regno; | |
9995 | unsigned int flags; | |
9996 | int ch; | |
9997 | ||
9998 | saved_input_line_pointer = input_line_pointer; | |
9999 | input_line_pointer = str; | |
10000 | ||
542d6675 | 10001 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10002 | |
10003 | mnemonic = input_line_pointer; | |
10004 | ch = get_symbol_end (); | |
10005 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10006 | if (pdesc) | |
10007 | { | |
10008 | *input_line_pointer = ch; | |
10009 | (*pdesc->handler) (pdesc->arg); | |
10010 | goto done; | |
10011 | } | |
10012 | ||
542d6675 | 10013 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10014 | |
10015 | idesc = ia64_find_opcode (mnemonic); | |
10016 | *input_line_pointer = ch; | |
10017 | if (!idesc) | |
10018 | { | |
10019 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10020 | goto done; | |
10021 | } | |
10022 | ||
10023 | idesc = parse_operands (idesc); | |
10024 | if (!idesc) | |
10025 | goto done; | |
10026 | ||
542d6675 | 10027 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10028 | if (idesc->type == IA64_TYPE_DYN) |
10029 | { | |
10030 | if (strcmp (idesc->name, "add") == 0) | |
10031 | { | |
10032 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10033 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10034 | mnemonic = "addl"; | |
10035 | else | |
10036 | mnemonic = "adds"; | |
3d56ab85 | 10037 | ia64_free_opcode (idesc); |
800eeca4 JW |
10038 | idesc = ia64_find_opcode (mnemonic); |
10039 | #if 0 | |
10040 | know (!idesc->next); | |
10041 | #endif | |
10042 | } | |
10043 | else if (strcmp (idesc->name, "mov") == 0) | |
10044 | { | |
10045 | enum ia64_opnd opnd1, opnd2; | |
10046 | int rop; | |
10047 | ||
10048 | opnd1 = idesc->operands[0]; | |
10049 | opnd2 = idesc->operands[1]; | |
10050 | if (opnd1 == IA64_OPND_AR3) | |
10051 | rop = 0; | |
10052 | else if (opnd2 == IA64_OPND_AR3) | |
10053 | rop = 1; | |
10054 | else | |
10055 | abort (); | |
652ca075 L |
10056 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10057 | { | |
10058 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10059 | mnemonic = "mov.i"; | |
10060 | else | |
10061 | mnemonic = "mov.m"; | |
10062 | } | |
800eeca4 | 10063 | else |
652ca075 | 10064 | abort (); |
3d56ab85 | 10065 | ia64_free_opcode (idesc); |
800eeca4 JW |
10066 | idesc = ia64_find_opcode (mnemonic); |
10067 | while (idesc != NULL | |
10068 | && (idesc->operands[0] != opnd1 | |
10069 | || idesc->operands[1] != opnd2)) | |
10070 | idesc = get_next_opcode (idesc); | |
10071 | } | |
10072 | } | |
652ca075 L |
10073 | else if (strcmp (idesc->name, "mov.i") == 0 |
10074 | || strcmp (idesc->name, "mov.m") == 0) | |
10075 | { | |
10076 | enum ia64_opnd opnd1, opnd2; | |
10077 | int rop; | |
10078 | ||
10079 | opnd1 = idesc->operands[0]; | |
10080 | opnd2 = idesc->operands[1]; | |
10081 | if (opnd1 == IA64_OPND_AR3) | |
10082 | rop = 0; | |
10083 | else if (opnd2 == IA64_OPND_AR3) | |
10084 | rop = 1; | |
10085 | else | |
10086 | abort (); | |
10087 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10088 | { | |
10089 | char unit = 'a'; | |
10090 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10091 | unit = 'i'; | |
10092 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10093 | unit = 'm'; | |
10094 | if (unit != 'a' && unit != idesc->name [4]) | |
10095 | as_bad ("AR %d cannot be accessed by %c-unit", | |
10096 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), | |
10097 | TOUPPER (unit)); | |
10098 | } | |
10099 | } | |
800eeca4 JW |
10100 | |
10101 | qp_regno = 0; | |
10102 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10103 | { |
10104 | qp_regno = md.qp.X_add_number - REG_P; | |
10105 | md.qp.X_op = O_absent; | |
10106 | } | |
800eeca4 JW |
10107 | |
10108 | flags = idesc->flags; | |
10109 | ||
10110 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10111 | { |
10112 | /* The alignment frag has to end with a stop bit only if the | |
10113 | next instruction after the alignment directive has to be | |
10114 | the first instruction in an instruction group. */ | |
10115 | if (align_frag) | |
10116 | { | |
10117 | while (align_frag->fr_type != rs_align_code) | |
10118 | { | |
10119 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10120 | if (!align_frag) |
10121 | break; | |
9545c4ce | 10122 | } |
bae25f19 L |
10123 | /* align_frag can be NULL if there are directives in |
10124 | between. */ | |
10125 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10126 | align_frag->tc_frag_data = 1; |
10127 | } | |
10128 | ||
10129 | insn_group_break (1, 0, 0); | |
10130 | } | |
10131 | align_frag = NULL; | |
800eeca4 JW |
10132 | |
10133 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10134 | { | |
10135 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10136 | goto done; | |
10137 | } | |
10138 | ||
542d6675 | 10139 | /* Build the instruction. */ |
800eeca4 JW |
10140 | CURR_SLOT.qp_regno = qp_regno; |
10141 | CURR_SLOT.idesc = idesc; | |
10142 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10143 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
10144 | |
10145 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 10146 | if (unwind.current_entry) |
800eeca4 | 10147 | { |
e0c9811a JW |
10148 | CURR_SLOT.unwind_record = unwind.current_entry; |
10149 | unwind.current_entry = NULL; | |
800eeca4 JW |
10150 | } |
10151 | ||
542d6675 | 10152 | /* Check for dependency violations. */ |
800eeca4 | 10153 | if (md.detect_dv) |
542d6675 | 10154 | check_dv (idesc); |
800eeca4 JW |
10155 | |
10156 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10157 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10158 | emit_one_bundle (); | |
10159 | ||
10160 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10161 | insn_group_break (1, 0, 0); | |
10162 | ||
10163 | md.last_text_seg = now_seg; | |
10164 | ||
10165 | done: | |
10166 | input_line_pointer = saved_input_line_pointer; | |
10167 | } | |
10168 | ||
10169 | /* Called when symbol NAME cannot be found in the symbol table. | |
10170 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10171 | |
10172 | symbolS * | |
800eeca4 | 10173 | md_undefined_symbol (name) |
2434f565 | 10174 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10175 | { |
10176 | return 0; | |
10177 | } | |
10178 | ||
10179 | /* Called for any expression that can not be recognized. When the | |
10180 | function is called, `input_line_pointer' will point to the start of | |
10181 | the expression. */ | |
542d6675 | 10182 | |
800eeca4 JW |
10183 | void |
10184 | md_operand (e) | |
10185 | expressionS *e; | |
10186 | { | |
10187 | enum pseudo_type pseudo_type; | |
e0c9811a | 10188 | const char *name; |
800eeca4 JW |
10189 | size_t len; |
10190 | int ch, i; | |
10191 | ||
10192 | switch (*input_line_pointer) | |
10193 | { | |
10194 | case '@': | |
542d6675 | 10195 | /* Find what relocation pseudo-function we're dealing with. */ |
800eeca4 JW |
10196 | pseudo_type = 0; |
10197 | ch = *++input_line_pointer; | |
10198 | for (i = 0; i < NELEMS (pseudo_func); ++i) | |
10199 | if (pseudo_func[i].name && pseudo_func[i].name[0] == ch) | |
10200 | { | |
10201 | len = strlen (pseudo_func[i].name); | |
10202 | if (strncmp (pseudo_func[i].name + 1, | |
10203 | input_line_pointer + 1, len - 1) == 0 | |
10204 | && !is_part_of_name (input_line_pointer[len])) | |
10205 | { | |
10206 | input_line_pointer += len; | |
10207 | pseudo_type = pseudo_func[i].type; | |
10208 | break; | |
10209 | } | |
10210 | } | |
10211 | switch (pseudo_type) | |
10212 | { | |
10213 | case PSEUDO_FUNC_RELOC: | |
10214 | SKIP_WHITESPACE (); | |
10215 | if (*input_line_pointer != '(') | |
10216 | { | |
10217 | as_bad ("Expected '('"); | |
10218 | goto err; | |
10219 | } | |
542d6675 KH |
10220 | /* Skip '('. */ |
10221 | ++input_line_pointer; | |
800eeca4 JW |
10222 | expression (e); |
10223 | if (*input_line_pointer++ != ')') | |
10224 | { | |
10225 | as_bad ("Missing ')'"); | |
10226 | goto err; | |
10227 | } | |
10228 | if (e->X_op != O_symbol) | |
10229 | { | |
10230 | if (e->X_op != O_pseudo_fixup) | |
10231 | { | |
10232 | as_bad ("Not a symbolic expression"); | |
10233 | goto err; | |
10234 | } | |
13ae64f3 JJ |
10235 | if (i != FUNC_LT_RELATIVE) |
10236 | { | |
10237 | as_bad ("Illegal combination of relocation functions"); | |
10238 | goto err; | |
10239 | } | |
10240 | switch (S_GET_VALUE (e->X_op_symbol)) | |
800eeca4 | 10241 | { |
13ae64f3 JJ |
10242 | case FUNC_FPTR_RELATIVE: |
10243 | i = FUNC_LT_FPTR_RELATIVE; break; | |
10244 | case FUNC_DTP_MODULE: | |
10245 | i = FUNC_LT_DTP_MODULE; break; | |
10246 | case FUNC_DTP_RELATIVE: | |
10247 | i = FUNC_LT_DTP_RELATIVE; break; | |
10248 | case FUNC_TP_RELATIVE: | |
10249 | i = FUNC_LT_TP_RELATIVE; break; | |
10250 | default: | |
800eeca4 JW |
10251 | as_bad ("Illegal combination of relocation functions"); |
10252 | goto err; | |
10253 | } | |
10254 | } | |
542d6675 KH |
10255 | /* Make sure gas doesn't get rid of local symbols that are used |
10256 | in relocs. */ | |
800eeca4 JW |
10257 | e->X_op = O_pseudo_fixup; |
10258 | e->X_op_symbol = pseudo_func[i].u.sym; | |
10259 | break; | |
10260 | ||
10261 | case PSEUDO_FUNC_CONST: | |
10262 | e->X_op = O_constant; | |
10263 | e->X_add_number = pseudo_func[i].u.ival; | |
10264 | break; | |
10265 | ||
e0c9811a JW |
10266 | case PSEUDO_FUNC_REG: |
10267 | e->X_op = O_register; | |
10268 | e->X_add_number = pseudo_func[i].u.ival; | |
10269 | break; | |
10270 | ||
800eeca4 | 10271 | default: |
e0c9811a JW |
10272 | name = input_line_pointer - 1; |
10273 | get_symbol_end (); | |
10274 | as_bad ("Unknown pseudo function `%s'", name); | |
800eeca4 JW |
10275 | goto err; |
10276 | } | |
10277 | break; | |
10278 | ||
10279 | case '[': | |
10280 | ++input_line_pointer; | |
10281 | expression (e); | |
10282 | if (*input_line_pointer != ']') | |
10283 | { | |
10284 | as_bad ("Closing bracket misssing"); | |
10285 | goto err; | |
10286 | } | |
10287 | else | |
10288 | { | |
10289 | if (e->X_op != O_register) | |
10290 | as_bad ("Register expected as index"); | |
10291 | ||
10292 | ++input_line_pointer; | |
10293 | e->X_op = O_index; | |
10294 | } | |
10295 | break; | |
10296 | ||
10297 | default: | |
10298 | break; | |
10299 | } | |
10300 | return; | |
10301 | ||
10302 | err: | |
10303 | ignore_rest_of_line (); | |
10304 | } | |
10305 | ||
10306 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10307 | a section symbol plus some offset. For relocs involving @fptr(), | |
10308 | directives we don't want such adjustments since we need to have the | |
10309 | original symbol's name in the reloc. */ | |
10310 | int | |
10311 | ia64_fix_adjustable (fix) | |
10312 | fixS *fix; | |
10313 | { | |
10314 | /* Prevent all adjustments to global symbols */ | |
10315 | if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) | |
10316 | return 0; | |
10317 | ||
10318 | switch (fix->fx_r_type) | |
10319 | { | |
10320 | case BFD_RELOC_IA64_FPTR64I: | |
10321 | case BFD_RELOC_IA64_FPTR32MSB: | |
10322 | case BFD_RELOC_IA64_FPTR32LSB: | |
10323 | case BFD_RELOC_IA64_FPTR64MSB: | |
10324 | case BFD_RELOC_IA64_FPTR64LSB: | |
10325 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10326 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10327 | return 0; | |
10328 | default: | |
10329 | break; | |
10330 | } | |
10331 | ||
10332 | return 1; | |
10333 | } | |
10334 | ||
10335 | int | |
10336 | ia64_force_relocation (fix) | |
10337 | fixS *fix; | |
10338 | { | |
10339 | switch (fix->fx_r_type) | |
10340 | { | |
10341 | case BFD_RELOC_IA64_FPTR64I: | |
10342 | case BFD_RELOC_IA64_FPTR32MSB: | |
10343 | case BFD_RELOC_IA64_FPTR32LSB: | |
10344 | case BFD_RELOC_IA64_FPTR64MSB: | |
10345 | case BFD_RELOC_IA64_FPTR64LSB: | |
10346 | ||
10347 | case BFD_RELOC_IA64_LTOFF22: | |
10348 | case BFD_RELOC_IA64_LTOFF64I: | |
10349 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10350 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10351 | case BFD_RELOC_IA64_PLTOFF22: | |
10352 | case BFD_RELOC_IA64_PLTOFF64I: | |
10353 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10354 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10355 | |
10356 | case BFD_RELOC_IA64_LTOFF22X: | |
10357 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10358 | return 1; |
10359 | ||
10360 | default: | |
a161fe53 | 10361 | break; |
800eeca4 | 10362 | } |
a161fe53 | 10363 | |
ae6063d4 | 10364 | return generic_force_reloc (fix); |
800eeca4 JW |
10365 | } |
10366 | ||
10367 | /* Decide from what point a pc-relative relocation is relative to, | |
10368 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10369 | long | |
10370 | ia64_pcrel_from_section (fix, sec) | |
10371 | fixS *fix; | |
10372 | segT sec; | |
10373 | { | |
10374 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10375 | |
800eeca4 JW |
10376 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10377 | off &= ~0xfUL; | |
10378 | ||
10379 | return off; | |
10380 | } | |
10381 | ||
6174d9c8 RH |
10382 | |
10383 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10384 | void | |
10385 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10386 | { | |
10387 | expressionS expr; | |
10388 | ||
10389 | expr.X_op = O_pseudo_fixup; | |
10390 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10391 | expr.X_add_number = 0; | |
10392 | expr.X_add_symbol = symbol; | |
10393 | emit_expr (&expr, size); | |
10394 | } | |
10395 | ||
800eeca4 JW |
10396 | /* This is called whenever some data item (not an instruction) needs a |
10397 | fixup. We pick the right reloc code depending on the byteorder | |
10398 | currently in effect. */ | |
10399 | void | |
10400 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10401 | fragS *f; | |
10402 | int where; | |
10403 | int nbytes; | |
10404 | expressionS *exp; | |
10405 | { | |
10406 | bfd_reloc_code_real_type code; | |
10407 | fixS *fix; | |
10408 | ||
10409 | switch (nbytes) | |
10410 | { | |
10411 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10412 | them here since they will work fine as long as the expression | |
10413 | is fully defined at the end of the pass over the source file. */ | |
10414 | case 1: code = BFD_RELOC_8; break; | |
10415 | case 2: code = BFD_RELOC_16; break; | |
10416 | case 4: | |
10417 | if (target_big_endian) | |
10418 | code = BFD_RELOC_IA64_DIR32MSB; | |
10419 | else | |
10420 | code = BFD_RELOC_IA64_DIR32LSB; | |
10421 | break; | |
10422 | ||
10423 | case 8: | |
40449e9f | 10424 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10425 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10426 | && exp->X_op_symbol |
10427 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10428 | && !(md.flags & EF_IA_64_ABI64)) | |
10429 | { | |
10430 | if (target_big_endian) | |
10431 | code = BFD_RELOC_IA64_IPLTMSB; | |
10432 | else | |
10433 | code = BFD_RELOC_IA64_IPLTLSB; | |
10434 | exp->X_op = O_symbol; | |
10435 | break; | |
10436 | } | |
10437 | else | |
10438 | { | |
10439 | if (target_big_endian) | |
10440 | code = BFD_RELOC_IA64_DIR64MSB; | |
10441 | else | |
10442 | code = BFD_RELOC_IA64_DIR64LSB; | |
10443 | break; | |
10444 | } | |
800eeca4 | 10445 | |
3969b680 RH |
10446 | case 16: |
10447 | if (exp->X_op == O_pseudo_fixup | |
10448 | && exp->X_op_symbol | |
10449 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10450 | { | |
10451 | if (target_big_endian) | |
10452 | code = BFD_RELOC_IA64_IPLTMSB; | |
10453 | else | |
10454 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10455 | exp->X_op = O_symbol; |
10456 | break; | |
10457 | } | |
10458 | /* FALLTHRU */ | |
10459 | ||
800eeca4 JW |
10460 | default: |
10461 | as_bad ("Unsupported fixup size %d", nbytes); | |
10462 | ignore_rest_of_line (); | |
10463 | return; | |
10464 | } | |
6174d9c8 | 10465 | |
800eeca4 JW |
10466 | if (exp->X_op == O_pseudo_fixup) |
10467 | { | |
800eeca4 JW |
10468 | exp->X_op = O_symbol; |
10469 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10470 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10471 | } |
3969b680 | 10472 | |
800eeca4 JW |
10473 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10474 | /* We need to store the byte order in effect in case we're going | |
10475 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 10476 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
10477 | fix->tc_fix_data.bigendian = target_big_endian; |
10478 | } | |
10479 | ||
10480 | /* Return the actual relocation we wish to associate with the pseudo | |
10481 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10482 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10483 | |
10484 | static bfd_reloc_code_real_type | |
10485 | ia64_gen_real_reloc_type (sym, r_type) | |
10486 | struct symbol *sym; | |
10487 | bfd_reloc_code_real_type r_type; | |
10488 | { | |
10489 | bfd_reloc_code_real_type new = 0; | |
10490 | ||
10491 | if (sym == NULL) | |
10492 | { | |
10493 | return r_type; | |
10494 | } | |
10495 | ||
10496 | switch (S_GET_VALUE (sym)) | |
10497 | { | |
10498 | case FUNC_FPTR_RELATIVE: | |
10499 | switch (r_type) | |
10500 | { | |
10501 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
10502 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
10503 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
10504 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
10505 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
10506 | default: break; | |
10507 | } | |
10508 | break; | |
10509 | ||
10510 | case FUNC_GP_RELATIVE: | |
10511 | switch (r_type) | |
10512 | { | |
10513 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
10514 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
10515 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
10516 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
10517 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
10518 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
10519 | default: break; | |
10520 | } | |
10521 | break; | |
10522 | ||
10523 | case FUNC_LT_RELATIVE: | |
10524 | switch (r_type) | |
10525 | { | |
10526 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
10527 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
10528 | default: break; | |
10529 | } | |
10530 | break; | |
10531 | ||
fa2c7eff RH |
10532 | case FUNC_LT_RELATIVE_X: |
10533 | switch (r_type) | |
10534 | { | |
10535 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
10536 | default: break; | |
10537 | } | |
10538 | break; | |
10539 | ||
c67e42c9 RH |
10540 | case FUNC_PC_RELATIVE: |
10541 | switch (r_type) | |
10542 | { | |
10543 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
10544 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
10545 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
10546 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
10547 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
10548 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
10549 | default: break; | |
10550 | } | |
10551 | break; | |
10552 | ||
800eeca4 JW |
10553 | case FUNC_PLT_RELATIVE: |
10554 | switch (r_type) | |
10555 | { | |
10556 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
10557 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
10558 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10559 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
10560 | default: break; | |
10561 | } | |
10562 | break; | |
10563 | ||
10564 | case FUNC_SEC_RELATIVE: | |
10565 | switch (r_type) | |
10566 | { | |
10567 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
10568 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
10569 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
10570 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
10571 | default: break; | |
10572 | } | |
10573 | break; | |
10574 | ||
10575 | case FUNC_SEG_RELATIVE: | |
10576 | switch (r_type) | |
10577 | { | |
10578 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
10579 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
10580 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
10581 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
10582 | default: break; | |
10583 | } | |
10584 | break; | |
10585 | ||
10586 | case FUNC_LTV_RELATIVE: | |
10587 | switch (r_type) | |
10588 | { | |
10589 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
10590 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
10591 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
10592 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
10593 | default: break; | |
10594 | } | |
10595 | break; | |
10596 | ||
10597 | case FUNC_LT_FPTR_RELATIVE: | |
10598 | switch (r_type) | |
10599 | { | |
10600 | case BFD_RELOC_IA64_IMM22: | |
10601 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
10602 | case BFD_RELOC_IA64_IMM64: | |
10603 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
10604 | default: | |
10605 | break; | |
10606 | } | |
10607 | break; | |
3969b680 | 10608 | |
13ae64f3 JJ |
10609 | case FUNC_TP_RELATIVE: |
10610 | switch (r_type) | |
10611 | { | |
10612 | case BFD_RELOC_IA64_IMM14: | |
10613 | new = BFD_RELOC_IA64_TPREL14; break; | |
10614 | case BFD_RELOC_IA64_IMM22: | |
10615 | new = BFD_RELOC_IA64_TPREL22; break; | |
10616 | case BFD_RELOC_IA64_IMM64: | |
10617 | new = BFD_RELOC_IA64_TPREL64I; break; | |
10618 | default: | |
10619 | break; | |
10620 | } | |
10621 | break; | |
10622 | ||
10623 | case FUNC_LT_TP_RELATIVE: | |
10624 | switch (r_type) | |
10625 | { | |
10626 | case BFD_RELOC_IA64_IMM22: | |
10627 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
10628 | default: | |
10629 | break; | |
10630 | } | |
10631 | break; | |
10632 | ||
10633 | case FUNC_LT_DTP_MODULE: | |
10634 | switch (r_type) | |
10635 | { | |
10636 | case BFD_RELOC_IA64_IMM22: | |
10637 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
10638 | default: | |
10639 | break; | |
10640 | } | |
10641 | break; | |
10642 | ||
10643 | case FUNC_DTP_RELATIVE: | |
10644 | switch (r_type) | |
10645 | { | |
6174d9c8 RH |
10646 | case BFD_RELOC_IA64_DIR64MSB: |
10647 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
10648 | case BFD_RELOC_IA64_DIR64LSB: | |
10649 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
10650 | case BFD_RELOC_IA64_IMM14: |
10651 | new = BFD_RELOC_IA64_DTPREL14; break; | |
10652 | case BFD_RELOC_IA64_IMM22: | |
10653 | new = BFD_RELOC_IA64_DTPREL22; break; | |
10654 | case BFD_RELOC_IA64_IMM64: | |
10655 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
10656 | default: | |
10657 | break; | |
10658 | } | |
10659 | break; | |
10660 | ||
10661 | case FUNC_LT_DTP_RELATIVE: | |
10662 | switch (r_type) | |
10663 | { | |
10664 | case BFD_RELOC_IA64_IMM22: | |
10665 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
10666 | default: | |
10667 | break; | |
10668 | } | |
10669 | break; | |
10670 | ||
40449e9f KH |
10671 | case FUNC_IPLT_RELOC: |
10672 | break; | |
1cd8ff38 | 10673 | |
800eeca4 JW |
10674 | default: |
10675 | abort (); | |
10676 | } | |
6174d9c8 | 10677 | |
800eeca4 JW |
10678 | /* Hmmmm. Should this ever occur? */ |
10679 | if (new) | |
10680 | return new; | |
10681 | else | |
10682 | return r_type; | |
10683 | } | |
10684 | ||
10685 | /* Here is where generate the appropriate reloc for pseudo relocation | |
10686 | functions. */ | |
10687 | void | |
10688 | ia64_validate_fix (fix) | |
10689 | fixS *fix; | |
10690 | { | |
10691 | switch (fix->fx_r_type) | |
10692 | { | |
10693 | case BFD_RELOC_IA64_FPTR64I: | |
10694 | case BFD_RELOC_IA64_FPTR32MSB: | |
10695 | case BFD_RELOC_IA64_FPTR64LSB: | |
10696 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10697 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10698 | if (fix->fx_offset != 0) | |
10699 | as_bad_where (fix->fx_file, fix->fx_line, | |
10700 | "No addend allowed in @fptr() relocation"); | |
10701 | break; | |
10702 | default: | |
10703 | break; | |
10704 | } | |
800eeca4 JW |
10705 | } |
10706 | ||
10707 | static void | |
10708 | fix_insn (fix, odesc, value) | |
10709 | fixS *fix; | |
10710 | const struct ia64_operand *odesc; | |
10711 | valueT value; | |
10712 | { | |
10713 | bfd_vma insn[3], t0, t1, control_bits; | |
10714 | const char *err; | |
10715 | char *fixpos; | |
10716 | long slot; | |
10717 | ||
10718 | slot = fix->fx_where & 0x3; | |
10719 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
10720 | ||
c67e42c9 | 10721 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
10722 | t0 = bfd_getl64 (fixpos); |
10723 | t1 = bfd_getl64 (fixpos + 8); | |
10724 | control_bits = t0 & 0x1f; | |
10725 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
10726 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
10727 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
10728 | ||
c67e42c9 RH |
10729 | err = NULL; |
10730 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 10731 | { |
c67e42c9 RH |
10732 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
10733 | insn[2] |= (((value & 0x7f) << 13) | |
10734 | | (((value >> 7) & 0x1ff) << 27) | |
10735 | | (((value >> 16) & 0x1f) << 22) | |
10736 | | (((value >> 21) & 0x1) << 21) | |
10737 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 10738 | } |
c67e42c9 RH |
10739 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
10740 | { | |
10741 | if (value & ~0x3fffffffffffffffULL) | |
10742 | err = "integer operand out of range"; | |
10743 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
10744 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
10745 | } | |
10746 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
10747 | { | |
10748 | value >>= 4; | |
10749 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
10750 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
10751 | | (((value >> 0) & 0xfffff) << 13)); | |
10752 | } | |
10753 | else | |
10754 | err = (*odesc->insert) (odesc, value, insn + slot); | |
10755 | ||
10756 | if (err) | |
10757 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
10758 | |
10759 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
10760 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
10761 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
10762 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
10763 | } |
10764 | ||
10765 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
10766 | ignored; perhaps it was once meaningful, but now it is historical. | |
10767 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
10768 | ||
10769 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 10770 | (if possible). */ |
94f592af NC |
10771 | |
10772 | void | |
10773 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 10774 | fixS *fix; |
40449e9f | 10775 | valueT *valP; |
2434f565 | 10776 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
10777 | { |
10778 | char *fixpos; | |
40449e9f | 10779 | valueT value = *valP; |
800eeca4 JW |
10780 | |
10781 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
10782 | ||
10783 | if (fix->fx_pcrel) | |
10784 | { | |
10785 | switch (fix->fx_r_type) | |
10786 | { | |
10787 | case BFD_RELOC_IA64_DIR32MSB: | |
10788 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB; | |
800eeca4 JW |
10789 | break; |
10790 | ||
10791 | case BFD_RELOC_IA64_DIR32LSB: | |
10792 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB; | |
800eeca4 JW |
10793 | break; |
10794 | ||
10795 | case BFD_RELOC_IA64_DIR64MSB: | |
10796 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB; | |
800eeca4 JW |
10797 | break; |
10798 | ||
10799 | case BFD_RELOC_IA64_DIR64LSB: | |
10800 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB; | |
800eeca4 JW |
10801 | break; |
10802 | ||
10803 | default: | |
10804 | break; | |
10805 | } | |
10806 | } | |
10807 | if (fix->fx_addsy) | |
10808 | { | |
00f7efb6 | 10809 | switch (fix->fx_r_type) |
800eeca4 | 10810 | { |
00f7efb6 | 10811 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
10812 | /* This must be a TAG13 or TAG13b operand. There are no external |
10813 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
10814 | as_bad_where (fix->fx_file, fix->fx_line, |
10815 | "%s must have a constant value", | |
10816 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 10817 | fix->fx_done = 1; |
94f592af | 10818 | return; |
00f7efb6 JJ |
10819 | |
10820 | case BFD_RELOC_IA64_TPREL14: | |
10821 | case BFD_RELOC_IA64_TPREL22: | |
10822 | case BFD_RELOC_IA64_TPREL64I: | |
10823 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
10824 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
10825 | case BFD_RELOC_IA64_DTPREL14: | |
10826 | case BFD_RELOC_IA64_DTPREL22: | |
10827 | case BFD_RELOC_IA64_DTPREL64I: | |
10828 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
10829 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
10830 | break; | |
7925dd68 JJ |
10831 | |
10832 | default: | |
10833 | break; | |
800eeca4 | 10834 | } |
800eeca4 JW |
10835 | } |
10836 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
10837 | { | |
10838 | if (fix->tc_fix_data.bigendian) | |
10839 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
10840 | else | |
10841 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
10842 | fix->fx_done = 1; | |
800eeca4 JW |
10843 | } |
10844 | else | |
10845 | { | |
10846 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
10847 | fix->fx_done = 1; | |
800eeca4 | 10848 | } |
800eeca4 JW |
10849 | } |
10850 | ||
10851 | /* Generate the BFD reloc to be stuck in the object file from the | |
10852 | fixup used internally in the assembler. */ | |
542d6675 KH |
10853 | |
10854 | arelent * | |
800eeca4 | 10855 | tc_gen_reloc (sec, fixp) |
2434f565 | 10856 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
10857 | fixS *fixp; |
10858 | { | |
10859 | arelent *reloc; | |
10860 | ||
10861 | reloc = xmalloc (sizeof (*reloc)); | |
10862 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
10863 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
10864 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
10865 | reloc->addend = fixp->fx_offset; | |
10866 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
10867 | ||
10868 | if (!reloc->howto) | |
10869 | { | |
10870 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
10871 | "Cannot represent %s relocation in object file", | |
10872 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
10873 | } | |
10874 | return reloc; | |
10875 | } | |
10876 | ||
10877 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
10878 | of type TYPE, and store the appropriate bytes in *LIT. The number |
10879 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
10880 | returned, or NULL on OK. */ |
10881 | ||
10882 | #define MAX_LITTLENUMS 5 | |
10883 | ||
542d6675 | 10884 | char * |
800eeca4 JW |
10885 | md_atof (type, lit, size) |
10886 | int type; | |
10887 | char *lit; | |
10888 | int *size; | |
10889 | { | |
10890 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
10891 | char *t; |
10892 | int prec; | |
10893 | ||
10894 | switch (type) | |
10895 | { | |
10896 | /* IEEE floats */ | |
10897 | case 'f': | |
10898 | case 'F': | |
10899 | case 's': | |
10900 | case 'S': | |
10901 | prec = 2; | |
10902 | break; | |
10903 | ||
10904 | case 'd': | |
10905 | case 'D': | |
10906 | case 'r': | |
10907 | case 'R': | |
10908 | prec = 4; | |
10909 | break; | |
10910 | ||
10911 | case 'x': | |
10912 | case 'X': | |
10913 | case 'p': | |
10914 | case 'P': | |
10915 | prec = 5; | |
10916 | break; | |
10917 | ||
10918 | default: | |
10919 | *size = 0; | |
10920 | return "Bad call to MD_ATOF()"; | |
10921 | } | |
10922 | t = atof_ieee (input_line_pointer, type, words); | |
10923 | if (t) | |
10924 | input_line_pointer = t; | |
800eeca4 | 10925 | |
10a98291 L |
10926 | (*ia64_float_to_chars) (lit, words, prec); |
10927 | ||
165a7f90 L |
10928 | if (type == 'X') |
10929 | { | |
10930 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 10931 | memset (&lit [10], 0, 6); |
165a7f90 L |
10932 | *size = 8 * sizeof (LITTLENUM_TYPE); |
10933 | } | |
10a98291 L |
10934 | else |
10935 | *size = prec * sizeof (LITTLENUM_TYPE); | |
10936 | ||
800eeca4 JW |
10937 | return 0; |
10938 | } | |
10939 | ||
800eeca4 JW |
10940 | /* Handle ia64 specific semantics of the align directive. */ |
10941 | ||
0a9ef439 | 10942 | void |
800eeca4 | 10943 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
10944 | int n ATTRIBUTE_UNUSED; |
10945 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 10946 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 10947 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 10948 | { |
0a9ef439 | 10949 | if (subseg_text_p (now_seg)) |
800eeca4 | 10950 | ia64_flush_insns (); |
0a9ef439 | 10951 | } |
800eeca4 | 10952 | |
0a9ef439 RH |
10953 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
10954 | of an rs_align_code fragment. */ | |
800eeca4 | 10955 | |
0a9ef439 RH |
10956 | void |
10957 | ia64_handle_align (fragp) | |
10958 | fragS *fragp; | |
10959 | { | |
10960 | /* Use mfi bundle of nops with no stop bits. */ | |
0a9ef439 RH |
10961 | static const unsigned char le_nop[] |
10962 | = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
10963 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
9545c4ce L |
10964 | static const unsigned char le_nop_stop[] |
10965 | = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
10966 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
0a9ef439 RH |
10967 | |
10968 | int bytes; | |
10969 | char *p; | |
9545c4ce | 10970 | const unsigned char *nop; |
0a9ef439 RH |
10971 | |
10972 | if (fragp->fr_type != rs_align_code) | |
10973 | return; | |
10974 | ||
9545c4ce L |
10975 | /* Check if this frag has to end with a stop bit. */ |
10976 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
10977 | ||
0a9ef439 RH |
10978 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
10979 | p = fragp->fr_literal + fragp->fr_fix; | |
10980 | ||
d9201763 L |
10981 | /* If no paddings are needed, we check if we need a stop bit. */ |
10982 | if (!bytes && fragp->tc_frag_data) | |
10983 | { | |
10984 | if (fragp->fr_fix < 16) | |
bae25f19 L |
10985 | #if 1 |
10986 | /* FIXME: It won't work with | |
10987 | .align 16 | |
10988 | alloc r32=ar.pfs,1,2,4,0 | |
10989 | */ | |
10990 | ; | |
10991 | #else | |
d9201763 L |
10992 | as_bad_where (fragp->fr_file, fragp->fr_line, |
10993 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 10994 | #endif |
d9201763 L |
10995 | else |
10996 | /* Bundles are always in little-endian byte order. Make sure | |
10997 | the previous bundle has the stop bit. */ | |
10998 | *(p - 16) |= 1; | |
10999 | } | |
11000 | ||
0a9ef439 RH |
11001 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11002 | putting data into a text section. */ | |
11003 | if (bytes & 15) | |
11004 | { | |
11005 | int fix = bytes & 15; | |
11006 | memset (p, 0, fix); | |
11007 | p += fix; | |
11008 | bytes -= fix; | |
11009 | fragp->fr_fix += fix; | |
800eeca4 JW |
11010 | } |
11011 | ||
012a452b | 11012 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11013 | memcpy (p, nop, 16); |
0a9ef439 | 11014 | fragp->fr_var = 16; |
800eeca4 | 11015 | } |
10a98291 L |
11016 | |
11017 | static void | |
11018 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11019 | int prec) | |
11020 | { | |
11021 | while (prec--) | |
11022 | { | |
11023 | number_to_chars_bigendian (lit, (long) (*words++), | |
11024 | sizeof (LITTLENUM_TYPE)); | |
11025 | lit += sizeof (LITTLENUM_TYPE); | |
11026 | } | |
11027 | } | |
11028 | ||
11029 | static void | |
11030 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11031 | int prec) | |
11032 | { | |
11033 | while (prec--) | |
11034 | { | |
11035 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11036 | sizeof (LITTLENUM_TYPE)); | |
11037 | lit += sizeof (LITTLENUM_TYPE); | |
11038 | } | |
11039 | } | |
11040 | ||
11041 | void | |
11042 | ia64_elf_section_change_hook (void) | |
11043 | { | |
38ce5b11 L |
11044 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11045 | && elf_linked_to_section (now_seg) == NULL) | |
11046 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11047 | dot_byteorder (-1); |
11048 | } | |
a645d1eb L |
11049 | |
11050 | /* Check if a label should be made global. */ | |
11051 | void | |
11052 | ia64_check_label (symbolS *label) | |
11053 | { | |
11054 | if (*input_line_pointer == ':') | |
11055 | { | |
11056 | S_SET_EXTERNAL (label); | |
11057 | input_line_pointer++; | |
11058 | } | |
11059 | } | |
35f5df7f L |
11060 | |
11061 | /* Used to remember where .alias and .secalias directives are seen. We | |
11062 | will rename symbol and section names when we are about to output | |
11063 | the relocatable file. */ | |
11064 | struct alias | |
11065 | { | |
11066 | char *file; /* The file where the directive is seen. */ | |
11067 | unsigned int line; /* The line number the directive is at. */ | |
11068 | const char *name; /* The orignale name of the symbol. */ | |
11069 | }; | |
11070 | ||
11071 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11072 | .secalias. Otherwise, it is .alias. */ | |
11073 | static void | |
11074 | dot_alias (int section) | |
11075 | { | |
11076 | char *name, *alias; | |
11077 | char delim; | |
11078 | char *end_name; | |
11079 | int len; | |
11080 | const char *error_string; | |
11081 | struct alias *h; | |
11082 | const char *a; | |
11083 | struct hash_control *ahash, *nhash; | |
11084 | const char *kind; | |
11085 | ||
11086 | name = input_line_pointer; | |
11087 | delim = get_symbol_end (); | |
11088 | end_name = input_line_pointer; | |
11089 | *end_name = delim; | |
11090 | ||
11091 | if (name == end_name) | |
11092 | { | |
11093 | as_bad (_("expected symbol name")); | |
11094 | discard_rest_of_line (); | |
11095 | return; | |
11096 | } | |
11097 | ||
11098 | SKIP_WHITESPACE (); | |
11099 | ||
11100 | if (*input_line_pointer != ',') | |
11101 | { | |
11102 | *end_name = 0; | |
11103 | as_bad (_("expected comma after \"%s\""), name); | |
11104 | *end_name = delim; | |
11105 | ignore_rest_of_line (); | |
11106 | return; | |
11107 | } | |
11108 | ||
11109 | input_line_pointer++; | |
11110 | *end_name = 0; | |
11111 | ||
11112 | /* We call demand_copy_C_string to check if alias string is valid. | |
11113 | There should be a closing `"' and no `\0' in the string. */ | |
11114 | alias = demand_copy_C_string (&len); | |
11115 | if (alias == NULL) | |
11116 | { | |
11117 | ignore_rest_of_line (); | |
11118 | return; | |
11119 | } | |
11120 | ||
11121 | /* Make a copy of name string. */ | |
11122 | len = strlen (name) + 1; | |
11123 | obstack_grow (¬es, name, len); | |
11124 | name = obstack_finish (¬es); | |
11125 | ||
11126 | if (section) | |
11127 | { | |
11128 | kind = "section"; | |
11129 | ahash = secalias_hash; | |
11130 | nhash = secalias_name_hash; | |
11131 | } | |
11132 | else | |
11133 | { | |
11134 | kind = "symbol"; | |
11135 | ahash = alias_hash; | |
11136 | nhash = alias_name_hash; | |
11137 | } | |
11138 | ||
11139 | /* Check if alias has been used before. */ | |
11140 | h = (struct alias *) hash_find (ahash, alias); | |
11141 | if (h) | |
11142 | { | |
11143 | if (strcmp (h->name, name)) | |
11144 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11145 | alias, kind, h->name); | |
11146 | goto out; | |
11147 | } | |
11148 | ||
11149 | /* Check if name already has an alias. */ | |
11150 | a = (const char *) hash_find (nhash, name); | |
11151 | if (a) | |
11152 | { | |
11153 | if (strcmp (a, alias)) | |
11154 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11155 | goto out; | |
11156 | } | |
11157 | ||
11158 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11159 | as_where (&h->file, &h->line); | |
11160 | h->name = name; | |
11161 | ||
11162 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11163 | if (error_string) | |
11164 | { | |
11165 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11166 | alias, kind, error_string); | |
11167 | goto out; | |
11168 | } | |
11169 | ||
11170 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11171 | if (error_string) | |
11172 | { | |
11173 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11174 | alias, kind, error_string); | |
11175 | out: | |
11176 | obstack_free (¬es, name); | |
11177 | obstack_free (¬es, alias); | |
11178 | } | |
11179 | ||
11180 | demand_empty_rest_of_line (); | |
11181 | } | |
11182 | ||
11183 | /* It renames the original symbol name to its alias. */ | |
11184 | static void | |
11185 | do_alias (const char *alias, PTR value) | |
11186 | { | |
11187 | struct alias *h = (struct alias *) value; | |
11188 | symbolS *sym = symbol_find (h->name); | |
11189 | ||
11190 | if (sym == NULL) | |
11191 | as_warn_where (h->file, h->line, | |
11192 | _("symbol `%s' aliased to `%s' is not used"), | |
11193 | h->name, alias); | |
11194 | else | |
11195 | S_SET_NAME (sym, (char *) alias); | |
11196 | } | |
11197 | ||
11198 | /* Called from write_object_file. */ | |
11199 | void | |
11200 | ia64_adjust_symtab (void) | |
11201 | { | |
11202 | hash_traverse (alias_hash, do_alias); | |
11203 | } | |
11204 | ||
11205 | /* It renames the original section name to its alias. */ | |
11206 | static void | |
11207 | do_secalias (const char *alias, PTR value) | |
11208 | { | |
11209 | struct alias *h = (struct alias *) value; | |
11210 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11211 | ||
11212 | if (sec == NULL) | |
11213 | as_warn_where (h->file, h->line, | |
11214 | _("section `%s' aliased to `%s' is not used"), | |
11215 | h->name, alias); | |
11216 | else | |
11217 | sec->name = alias; | |
11218 | } | |
11219 | ||
11220 | /* Called from write_object_file. */ | |
11221 | void | |
11222 | ia64_frob_file (void) | |
11223 | { | |
11224 | hash_traverse (secalias_hash, do_secalias); | |
11225 | } |