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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
744b6414 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
4b4da160
NC		 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
800eeca4
JW		 22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
5faa8e39
JW		 59
60/* Some systems define MIN in, e.g., param.h. */
61#undef MIN
800eeca4
JW		 62#define MIN(a,b) ((a) < (b) ? (a) : (b))
63
64#define NUM_SLOTS 4
65#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66#define CURR_SLOT md.slot[md.curr_slot]
67
68#define O_pseudo_fixup (O_max + 1)
69
70enum special_section
71 {
557debba 72 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 73 SPECIAL_SECTION_BSS = 0,
74 SPECIAL_SECTION_SBSS,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
557debba
JW		 79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 83 };
84
85enum reloc_func
86 {
13ae64f3
JJ		 87 FUNC_DTP_MODULE,
88 FUNC_DTP_RELATIVE,
800eeca4
JW		 89 FUNC_FPTR_RELATIVE,
90 FUNC_GP_RELATIVE,
91 FUNC_LT_RELATIVE,
fa2c7eff 92 FUNC_LT_RELATIVE_X,
c67e42c9 93 FUNC_PC_RELATIVE,
800eeca4
JW		 94 FUNC_PLT_RELATIVE,
95 FUNC_SEC_RELATIVE,
96 FUNC_SEG_RELATIVE,
13ae64f3 97 FUNC_TP_RELATIVE,
800eeca4
JW		 98 FUNC_LTV_RELATIVE,
99 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 100 FUNC_LT_DTP_MODULE,
101 FUNC_LT_DTP_RELATIVE,
102 FUNC_LT_TP_RELATIVE,
3969b680 103 FUNC_IPLT_RELOC,
800eeca4
JW		 104 };
105
106enum reg_symbol
107 {
108 REG_GR = 0,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
115 REG_CFM,
116 REG_PR,
117 REG_PR_ROT,
118 REG_PSR,
119 REG_PSR_L,
120 REG_PSR_UM,
121 /* The following are pseudo-registers for use by gas only. */
122 IND_CPUID,
123 IND_DBR,
124 IND_DTR,
125 IND_ITR,
126 IND_IBR,
127 IND_MEM,
128 IND_MSR,
129 IND_PKR,
130 IND_PMC,
131 IND_PMD,
132 IND_RR,
542d6675 133 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 134 REG_PSP,
135 REG_PRIUNAT,
800eeca4
JW		 136 REG_NUM
137 };
138
139enum dynreg_type
140 {
141 DYNREG_GR = 0, /* dynamic general purpose register */
142 DYNREG_FR, /* dynamic floating point register */
143 DYNREG_PR, /* dynamic predicate register */
144 DYNREG_NUM_TYPES
145 };
146
87f8eb97
JW		 147enum operand_match_result
148 {
149 OPERAND_MATCH,
150 OPERAND_OUT_OF_RANGE,
151 OPERAND_MISMATCH
152 };
153
800eeca4
JW		 154/* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
157 instruction. */
158struct label_fix
542d6675
KH		 159{
160 struct label_fix *next;
161 struct symbol *sym;
07a53e5c 162 bfd_boolean dw2_mark_labels;
542d6675 163};
800eeca4 164
549f748d 165/* This is the endianness of the current section. */
800eeca4
JW		 166extern int target_big_endian;
167
549f748d
JW		 168/* This is the default endianness. */
169static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
170
10a98291
L		 171void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
172
173static void ia64_float_to_chars_bigendian
174 PARAMS ((char *, LITTLENUM_TYPE *, int));
175static void ia64_float_to_chars_littleendian
176 PARAMS ((char *, LITTLENUM_TYPE *, int));
177static void (*ia64_float_to_chars)
178 PARAMS ((char *, LITTLENUM_TYPE *, int));
179
35f5df7f
L		 180static struct hash_control *alias_hash;
181static struct hash_control *alias_name_hash;
182static struct hash_control *secalias_hash;
183static struct hash_control *secalias_name_hash;
184
2fac3d48
JB		 185/* List of chars besides those in app.c:symbol_chars that can start an
186 operand. Used to prevent the scrubber eating vital white-space. */
187const char ia64_symbol_chars[] = "@?";
188
800eeca4
JW		 189/* Characters which always start a comment. */
190const char comment_chars[] = "";
191
192/* Characters which start a comment at the beginning of a line. */
193const char line_comment_chars[] = "#";
194
195/* Characters which may be used to separate multiple commands on a
196 single line. */
e4e8248d 197const char line_separator_chars[] = ";{}";
800eeca4
JW		 198
199/* Characters which are used to indicate an exponent in a floating
200 point number. */
201const char EXP_CHARS[] = "eE";
202
203/* Characters which mean that a number is a floating point constant,
204 as in 0d1.0. */
205const char FLT_CHARS[] = "rRsSfFdDxXpP";
206
542d6675 207/* ia64-specific option processing: */
800eeca4 208
44f5c83a 209const char *md_shortopts = "m:N:x::";
800eeca4
JW		 210
211struct option md_longopts[] =
212 {
c43c2cc5
JW		 213#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
214 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
215#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
216 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 217 };
218
219size_t md_longopts_size = sizeof (md_longopts);
220
221static struct
222 {
223 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
224 struct hash_control *reg_hash; /* register name hash table */
225 struct hash_control *dynreg_hash; /* dynamic register hash table */
226 struct hash_control *const_hash; /* constant hash table */
227 struct hash_control *entry_hash; /* code entry hint hash table */
228
229 symbolS *regsym[REG_NUM];
230
231 /* If X_op is != O_absent, the registername for the instruction's
232 qualifying predicate. If NULL, p0 is assumed for instructions
233 that are predicatable. */
234 expressionS qp;
235
8c2fda1d
L		 236 /* Optimize for which CPU. */
237 enum
238 {
239 itanium1,
240 itanium2
241 } tune;
242
91d777ee
L		 243 /* What to do when hint.b is used. */
244 enum
245 {
246 hint_b_error,
247 hint_b_warning,
248 hint_b_ok
249 } hint_b;
250
800eeca4 251 unsigned int
197865e8 252 manual_bundling : 1,
800eeca4
JW		 253 debug_dv: 1,
254 detect_dv: 1,
255 explicit_mode : 1, /* which mode we're in */
256 default_explicit_mode : 1, /* which mode is the default */
257 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 258 auto_align : 1,
259 keep_pending_output : 1;
800eeca4 260
970d6792
L		 261 /* What to do when something is wrong with unwind directives. */
262 enum
263 {
264 unwind_check_warning,
265 unwind_check_error
266 } unwind_check;
267
800eeca4
JW		 268 /* Each bundle consists of up to three instructions. We keep
269 track of four most recent instructions so we can correctly set
197865e8 270 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 271 int curr_slot;
272 int num_slots_in_use;
273 struct slot
274 {
275 unsigned int
276 end_of_insn_group : 1,
277 manual_bundling_on : 1,
196e8040
JW		 278 manual_bundling_off : 1,
279 loc_directive_seen : 1;
800eeca4
JW		 280 signed char user_template; /* user-selected template, if any */
281 unsigned char qp_regno; /* qualifying predicate */
282 /* This duplicates a good fraction of "struct fix" but we
283 can't use a "struct fix" instead since we can't call
284 fix_new_exp() until we know the address of the instruction. */
285 int num_fixups;
286 struct insn_fix
287 {
288 bfd_reloc_code_real_type code;
289 enum ia64_opnd opnd; /* type of operand in need of fix */
290 unsigned int is_pcrel : 1; /* is operand pc-relative? */
291 expressionS expr; /* the value to be inserted */
292 }
293 fixup[2]; /* at most two fixups per insn */
294 struct ia64_opcode *idesc;
295 struct label_fix *label_fixups;
f1bcba5b 296 struct label_fix *tag_fixups;
800eeca4
JW		 297 struct unw_rec_list *unwind_record; /* Unwind directive. */
298 expressionS opnd[6];
299 char *src_file;
300 unsigned int src_line;
301 struct dwarf2_line_info debug_line;
302 }
303 slot[NUM_SLOTS];
304
305 segT last_text_seg;
306
307 struct dynreg
308 {
309 struct dynreg *next; /* next dynamic register */
310 const char *name;
311 unsigned short base; /* the base register number */
312 unsigned short num_regs; /* # of registers in this set */
313 }
314 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
315
316 flagword flags; /* ELF-header flags */
317
318 struct mem_offset {
319 unsigned hint:1; /* is this hint currently valid? */
320 bfd_vma offset; /* mem.offset offset */
321 bfd_vma base; /* mem.offset base */
322 } mem_offset;
323
324 int path; /* number of alt. entry points seen */
325 const char **entry_labels; /* labels of all alternate paths in
542d6675 326 the current DV-checking block. */
800eeca4 327 int maxpaths; /* size currently allocated for
542d6675 328 entry_labels */
557debba
JW		 329
330 int pointer_size; /* size in bytes of a pointer */
331 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 332 }
333md;
334
f6fe78d6
JW		 335/* These are not const, because they are modified to MMI for non-itanium1
336 targets below. */
337/* MFI bundle of nops. */
338static unsigned char le_nop[16] =
339{
340 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
341 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342};
343/* MFI bundle of nops with stop-bit. */
344static unsigned char le_nop_stop[16] =
345{
346 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
347 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
348};
349
542d6675 350/* application registers: */
800eeca4 351
e0c9811a
JW		 352#define AR_K0 0
353#define AR_K7 7
354#define AR_RSC 16
355#define AR_BSP 17
356#define AR_BSPSTORE 18
357#define AR_RNAT 19
358#define AR_UNAT 36
359#define AR_FPSR 40
360#define AR_ITC 44
361#define AR_PFS 64
362#define AR_LC 65
800eeca4
JW		 363
364static const struct
365 {
366 const char *name;
367 int regnum;
368 }
369ar[] =
370 {
371 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
372 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
373 {"ar.rsc", 16}, {"ar.bsp", 17},
374 {"ar.bspstore", 18}, {"ar.rnat", 19},
375 {"ar.fcr", 21}, {"ar.eflag", 24},
376 {"ar.csd", 25}, {"ar.ssd", 26},
377 {"ar.cflg", 27}, {"ar.fsr", 28},
378 {"ar.fir", 29}, {"ar.fdr", 30},
379 {"ar.ccv", 32}, {"ar.unat", 36},
380 {"ar.fpsr", 40}, {"ar.itc", 44},
381 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 382 {"ar.ec", 66},
800eeca4
JW		 383 };
384
385#define CR_IPSR 16
386#define CR_ISR 17
387#define CR_IIP 19
388#define CR_IFA 20
389#define CR_ITIR 21
390#define CR_IIPA 22
391#define CR_IFS 23
392#define CR_IIM 24
393#define CR_IHA 25
394#define CR_IVR 65
395#define CR_TPR 66
396#define CR_EOI 67
397#define CR_IRR0 68
398#define CR_IRR3 71
399#define CR_LRR0 80
400#define CR_LRR1 81
401
542d6675 402/* control registers: */
800eeca4
JW		 403static const struct
404 {
405 const char *name;
406 int regnum;
407 }
408cr[] =
409 {
410 {"cr.dcr", 0},
411 {"cr.itm", 1},
412 {"cr.iva", 2},
413 {"cr.pta", 8},
414 {"cr.gpta", 9},
415 {"cr.ipsr", 16},
416 {"cr.isr", 17},
417 {"cr.iip", 19},
418 {"cr.ifa", 20},
419 {"cr.itir", 21},
420 {"cr.iipa", 22},
421 {"cr.ifs", 23},
422 {"cr.iim", 24},
423 {"cr.iha", 25},
424 {"cr.lid", 64},
425 {"cr.ivr", 65},
426 {"cr.tpr", 66},
427 {"cr.eoi", 67},
428 {"cr.irr0", 68},
429 {"cr.irr1", 69},
430 {"cr.irr2", 70},
431 {"cr.irr3", 71},
432 {"cr.itv", 72},
433 {"cr.pmv", 73},
434 {"cr.cmcv", 74},
435 {"cr.lrr0", 80},
436 {"cr.lrr1", 81}
437 };
438
439#define PSR_MFL 4
440#define PSR_IC 13
441#define PSR_DFL 18
442#define PSR_CPL 32
443
444static const struct const_desc
445 {
446 const char *name;
447 valueT value;
448 }
449const_bits[] =
450 {
542d6675 451 /* PSR constant masks: */
800eeca4
JW		 452
453 /* 0: reserved */
454 {"psr.be", ((valueT) 1) << 1},
455 {"psr.up", ((valueT) 1) << 2},
456 {"psr.ac", ((valueT) 1) << 3},
457 {"psr.mfl", ((valueT) 1) << 4},
458 {"psr.mfh", ((valueT) 1) << 5},
459 /* 6-12: reserved */
460 {"psr.ic", ((valueT) 1) << 13},
461 {"psr.i", ((valueT) 1) << 14},
462 {"psr.pk", ((valueT) 1) << 15},
463 /* 16: reserved */
464 {"psr.dt", ((valueT) 1) << 17},
465 {"psr.dfl", ((valueT) 1) << 18},
466 {"psr.dfh", ((valueT) 1) << 19},
467 {"psr.sp", ((valueT) 1) << 20},
468 {"psr.pp", ((valueT) 1) << 21},
469 {"psr.di", ((valueT) 1) << 22},
470 {"psr.si", ((valueT) 1) << 23},
471 {"psr.db", ((valueT) 1) << 24},
472 {"psr.lp", ((valueT) 1) << 25},
473 {"psr.tb", ((valueT) 1) << 26},
474 {"psr.rt", ((valueT) 1) << 27},
475 /* 28-31: reserved */
476 /* 32-33: cpl (current privilege level) */
477 {"psr.is", ((valueT) 1) << 34},
478 {"psr.mc", ((valueT) 1) << 35},
479 {"psr.it", ((valueT) 1) << 36},
480 {"psr.id", ((valueT) 1) << 37},
481 {"psr.da", ((valueT) 1) << 38},
482 {"psr.dd", ((valueT) 1) << 39},
483 {"psr.ss", ((valueT) 1) << 40},
484 /* 41-42: ri (restart instruction) */
485 {"psr.ed", ((valueT) 1) << 43},
486 {"psr.bn", ((valueT) 1) << 44},
487 };
488
542d6675 489/* indirect register-sets/memory: */
800eeca4
JW		 490
491static const struct
492 {
493 const char *name;
494 int regnum;
495 }
496indirect_reg[] =
497 {
498 { "CPUID", IND_CPUID },
499 { "cpuid", IND_CPUID },
500 { "dbr", IND_DBR },
501 { "dtr", IND_DTR },
502 { "itr", IND_ITR },
503 { "ibr", IND_IBR },
504 { "msr", IND_MSR },
505 { "pkr", IND_PKR },
506 { "pmc", IND_PMC },
507 { "pmd", IND_PMD },
508 { "rr", IND_RR },
509 };
510
511/* Pseudo functions used to indicate relocation types (these functions
512 start with an at sign (@). */
513static struct
514 {
515 const char *name;
516 enum pseudo_type
517 {
518 PSEUDO_FUNC_NONE,
519 PSEUDO_FUNC_RELOC,
520 PSEUDO_FUNC_CONST,
e0c9811a 521 PSEUDO_FUNC_REG,
800eeca4
JW		 522 PSEUDO_FUNC_FLOAT
523 }
524 type;
525 union
526 {
527 unsigned long ival;
528 symbolS *sym;
529 }
530 u;
531 }
532pseudo_func[] =
533 {
542d6675 534 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 535 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
536 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 537 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
538 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
539 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 540 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 541 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
542 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
543 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
544 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 545 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 546 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 547 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
548 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
549 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
550 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 551 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 552
542d6675 553 /* mbtype4 constants: */
800eeca4
JW		 554 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
555 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
556 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
557 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
558 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
559
542d6675 560 /* fclass constants: */
bf3ca999 561 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 562 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
563 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
564 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
565 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
566 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
567 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
568 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
569 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 570
571 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 572
c10d9d8f
JW		 573 /* hint constants: */
574 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
575
542d6675 576 /* unwind-related constants: */
041340ad
JW		 577 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
578 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
579 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
580 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
581 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
582 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
583 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 584
542d6675 585 /* unwind-related registers: */
e0c9811a 586 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 587 };
588
542d6675 589/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 590static const bfd_vma nop[IA64_NUM_UNITS] =
591 {
592 0x0000000000LL, /* NIL => break 0 */
593 0x0008000000LL, /* I-unit nop */
594 0x0008000000LL, /* M-unit nop */
595 0x4000000000LL, /* B-unit nop */
596 0x0008000000LL, /* F-unit nop */
5d5e6db9 597 0x0000000000LL, /* L-"unit" nop immediate */
800eeca4
JW		 598 0x0008000000LL, /* X-unit nop */
599 };
600
601/* Can't be `const' as it's passed to input routines (which have the
602 habit of setting temporary sentinels. */
603static char special_section_name[][20] =
604 {
605 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 606 {".IA_64.unwind"}, {".IA_64.unwind_info"},
607 {".init_array"}, {".fini_array"}
800eeca4
JW		 608 };
609
610/* The best template for a particular sequence of up to three
611 instructions: */
612#define N IA64_NUM_TYPES
613static unsigned char best_template[N][N][N];
614#undef N
615
616/* Resource dependencies currently in effect */
617static struct rsrc {
618 int depind; /* dependency index */
619 const struct ia64_dependency *dependency; /* actual dependency */
620 unsigned specific:1, /* is this a specific bit/regno? */
621 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
622 int index; /* specific regno/bit within dependency */
623 int note; /* optional qualifying note (0 if none) */
624#define STATE_NONE 0
625#define STATE_STOP 1
626#define STATE_SRLZ 2
627 int insn_srlz; /* current insn serialization state */
628 int data_srlz; /* current data serialization state */
629 int qp_regno; /* qualifying predicate for this usage */
630 char *file; /* what file marked this dependency */
2434f565 631 unsigned int line; /* what line marked this dependency */
800eeca4 632 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 633 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 634 int path; /* corresponding code entry index */
635} *regdeps = NULL;
636static int regdepslen = 0;
637static int regdepstotlen = 0;
638static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
639static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 640 "data", "instr", "specific", "stop", "other" };
7484b8e6 641static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 642
643/* Current state of PR mutexation */
644static struct qpmutex {
645 valueT prmask;
646 int path;
647} *qp_mutexes = NULL; /* QP mutex bitmasks */
648static int qp_mutexeslen = 0;
649static int qp_mutexestotlen = 0;
197865e8 650static valueT qp_safe_across_calls = 0;
800eeca4
JW		 651
652/* Current state of PR implications */
653static struct qp_imply {
654 unsigned p1:6;
655 unsigned p2:6;
656 unsigned p2_branched:1;
657 int path;
658} *qp_implies = NULL;
659static int qp_implieslen = 0;
660static int qp_impliestotlen = 0;
661
197865e8
KH		 662/* Keep track of static GR values so that indirect register usage can
663 sometimes be tracked. */
800eeca4
JW		 664static struct gr {
665 unsigned known:1;
666 int path;
667 valueT value;
a66d2bb7
JB		 668} gr_values[128] = {
669 {
670 1,
671#ifdef INT_MAX
672 INT_MAX,
673#else
674 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
675#endif
676 0
677 }
678};
800eeca4 679
9545c4ce
L		 680/* Remember the alignment frag. */
681static fragS *align_frag;
682
800eeca4
JW		 683/* These are the routines required to output the various types of
684 unwind records. */
685
f5a30c2e
JW		 686/* A slot_number is a frag address plus the slot index (0-2). We use the
687 frag address here so that if there is a section switch in the middle of
688 a function, then instructions emitted to a different section are not
689 counted. Since there may be more than one frag for a function, this
690 means we also need to keep track of which frag this address belongs to
691 so we can compute inter-frag distances. This also nicely solves the
692 problem with nops emitted for align directives, which can't easily be
693 counted, but can easily be derived from frag sizes. */
694
800eeca4
JW		 695typedef struct unw_rec_list {
696 unwind_record r;
e0c9811a 697 unsigned long slot_number;
f5a30c2e 698 fragS *slot_frag;
800eeca4
JW		 699 struct unw_rec_list *next;
700} unw_rec_list;
701
2434f565 702#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 703
6290819d
NC		 704/* Linked list of saved prologue counts. A very poor
705 implementation of a map from label numbers to prologue counts. */
706typedef struct label_prologue_count
707{
708 struct label_prologue_count *next;
709 unsigned long label_number;
710 unsigned int prologue_count;
711} label_prologue_count;
712
5656b6b8
JB		 713typedef struct proc_pending
714{
715 symbolS *sym;
716 struct proc_pending *next;
717} proc_pending;
718
e0c9811a
JW		 719static struct
720{
e0c9811a
JW		 721 /* Maintain a list of unwind entries for the current function. */
722 unw_rec_list *list;
723 unw_rec_list *tail;
800eeca4 724
e0c9811a
JW		 725 /* Any unwind entires that should be attached to the current slot
726 that an insn is being constructed for. */
727 unw_rec_list *current_entry;
800eeca4 728
e0c9811a 729 /* These are used to create the unwind table entry for this function. */
5656b6b8 730 proc_pending proc_pending;
e0c9811a
JW		 731 symbolS *info; /* pointer to unwind info */
732 symbolS *personality_routine;
91a2ae2a
RH		 733 segT saved_text_seg;
734 subsegT saved_text_subseg;
735 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 736
e0c9811a 737 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 738 unsigned int prologue : 1;
739 unsigned int prologue_mask : 4;
e4e8248d 740 unsigned int prologue_gr : 7;
75e09913
JB		 741 unsigned int body : 1;
742 unsigned int insn : 1;
33d01f33 743 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 744 /* Prologue counts at previous .label_state directives. */
745 struct label_prologue_count * saved_prologue_counts;
ba825241
JB		 746
747 /* List of split up .save-s. */
748 unw_p_record *pending_saves;
e0c9811a 749} unwind;
800eeca4 750
9f9a069e
JW		 751/* The input value is a negated offset from psp, and specifies an address
752 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
753 must add 16 and divide by 4 to get the encoded value. */
754
755#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
756
800eeca4
JW		 757typedef void (*vbyte_func) PARAMS ((int, char *, char *));
758
0234cb7c 759/* Forward declarations: */
800eeca4
JW		 760static void set_section PARAMS ((char *name));
761static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
762 unsigned int, unsigned int));
d9201763 763static void dot_align (int);
800eeca4
JW		 764static void dot_radix PARAMS ((int));
765static void dot_special_section PARAMS ((int));
766static void dot_proc PARAMS ((int));
767static void dot_fframe PARAMS ((int));
768static void dot_vframe PARAMS ((int));
150f24a2 769static void dot_vframesp PARAMS ((int));
800eeca4
JW		 770static void dot_save PARAMS ((int));
771static void dot_restore PARAMS ((int));
150f24a2 772static void dot_restorereg PARAMS ((int));
800eeca4
JW		 773static void dot_handlerdata PARAMS ((int));
774static void dot_unwentry PARAMS ((int));
775static void dot_altrp PARAMS ((int));
e0c9811a 776static void dot_savemem PARAMS ((int));
800eeca4
JW		 777static void dot_saveg PARAMS ((int));
778static void dot_savef PARAMS ((int));
779static void dot_saveb PARAMS ((int));
780static void dot_savegf PARAMS ((int));
781static void dot_spill PARAMS ((int));
150f24a2
JW		 782static void dot_spillreg PARAMS ((int));
783static void dot_spillmem PARAMS ((int));
150f24a2
JW		 784static void dot_label_state PARAMS ((int));
785static void dot_copy_state PARAMS ((int));
800eeca4
JW		 786static void dot_unwabi PARAMS ((int));
787static void dot_personality PARAMS ((int));
788static void dot_body PARAMS ((int));
789static void dot_prologue PARAMS ((int));
790static void dot_endp PARAMS ((int));
791static void dot_template PARAMS ((int));
792static void dot_regstk PARAMS ((int));
793static void dot_rot PARAMS ((int));
794static void dot_byteorder PARAMS ((int));
795static void dot_psr PARAMS ((int));
796static void dot_alias PARAMS ((int));
797static void dot_ln PARAMS ((int));
ef6a2b41 798static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 799static void dot_xdata PARAMS ((int));
800static void stmt_float_cons PARAMS ((int));
801static void stmt_cons_ua PARAMS ((int));
802static void dot_xfloat_cons PARAMS ((int));
803static void dot_xstringer PARAMS ((int));
804static void dot_xdata_ua PARAMS ((int));
805static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 806static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 807static void dot_pred_rel PARAMS ((int));
808static void dot_reg_val PARAMS ((int));
5e819f9c 809static void dot_serialize PARAMS ((int));
800eeca4
JW		 810static void dot_dv_mode PARAMS ((int));
811static void dot_entry PARAMS ((int));
812static void dot_mem_offset PARAMS ((int));
e4e8248d 813static void add_unwind_entry PARAMS((unw_rec_list *, int));
542d6675 814static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 815static void declare_register_set PARAMS ((const char *, int, int));
816static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 817static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
818 int index,
819 expressionS *e));
e4e8248d 820static int parse_operand PARAMS ((expressionS *, int));
800eeca4
JW		 821static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
822static void build_insn PARAMS ((struct slot *, bfd_vma *));
823static void emit_one_bundle PARAMS ((void));
824static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 825static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 826 bfd_reloc_code_real_type r_type));
827static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 828static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
829 struct rsrc *, int depind, int path));
800eeca4
JW		 830static void add_qp_mutex PARAMS((valueT mask));
831static void add_qp_imply PARAMS((int p1, int p2));
832static void clear_qp_branch_flag PARAMS((valueT mask));
833static void clear_qp_mutex PARAMS((valueT mask));
834static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 835static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 836static void clear_register_values PARAMS ((void));
837static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 838static void instruction_serialization PARAMS ((void));
839static void data_serialization PARAMS ((void));
840static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 841static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 842static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 843static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 844static int depends_on PARAMS ((int, struct ia64_opcode *));
845static int specify_resource PARAMS ((const struct ia64_dependency *,
846 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 847static int check_dv PARAMS((struct ia64_opcode *idesc));
848static void check_dependencies PARAMS((struct ia64_opcode *));
849static void mark_resources PARAMS((struct ia64_opcode *));
850static void update_dependencies PARAMS((struct ia64_opcode *));
851static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 852static int qp_mutex PARAMS ((int, int, int));
853static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
854static void output_vbyte_mem PARAMS ((int, char *, char *));
855static void count_output PARAMS ((int, char *, char *));
856static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
857static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 858static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 859static void output_P1_format PARAMS ((vbyte_func, int));
860static void output_P2_format PARAMS ((vbyte_func, int, int));
861static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
862static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
863static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
864static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
865static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
866static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
867static void output_P9_format PARAMS ((vbyte_func, int, int));
868static void output_P10_format PARAMS ((vbyte_func, int, int));
869static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
870static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 871static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
872static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 873static char format_ab_reg PARAMS ((int, int));
874static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
875 unsigned long));
876static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
877static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
878 unsigned long));
879static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 880static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 881static unw_rec_list *output_prologue PARAMS ((void));
882static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
883static unw_rec_list *output_body PARAMS ((void));
884static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
885static unw_rec_list *output_mem_stack_v PARAMS ((void));
886static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
887static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
888static unw_rec_list *output_rp_when PARAMS ((void));
889static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
890static unw_rec_list *output_rp_br PARAMS ((unsigned int));
891static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
892static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
893static unw_rec_list *output_pfs_when PARAMS ((void));
894static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
895static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
896static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
897static unw_rec_list *output_preds_when PARAMS ((void));
898static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
899static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
900static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
901static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
902static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
903static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
904static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
905static unw_rec_list *output_br_mem PARAMS ((unsigned int));
906static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
907static unw_rec_list *output_spill_base PARAMS ((unsigned int));
908static unw_rec_list *output_unat_when PARAMS ((void));
909static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
910static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
911static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
912static unw_rec_list *output_lc_when PARAMS ((void));
913static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
914static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
915static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
916static unw_rec_list *output_fpsr_when PARAMS ((void));
917static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
918static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
919static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
920static unw_rec_list *output_priunat_when_gr PARAMS ((void));
921static unw_rec_list *output_priunat_when_mem PARAMS ((void));
922static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
923static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
924static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
925static unw_rec_list *output_bsp_when PARAMS ((void));
926static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
927static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
928static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
929static unw_rec_list *output_bspstore_when PARAMS ((void));
930static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
931static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
932static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
933static unw_rec_list *output_rnat_when PARAMS ((void));
934static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
935static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
936static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
937static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
938static unw_rec_list *output_epilogue PARAMS ((unsigned long));
939static unw_rec_list *output_label_state PARAMS ((unsigned long));
940static unw_rec_list *output_copy_state PARAMS ((unsigned long));
e4e8248d 941static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2 942 unsigned int));
e4e8248d 943static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 944 unsigned int));
945static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 946 unsigned int, unsigned int));
947static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
948static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
949static int calc_record_size PARAMS ((unw_rec_list *));
950static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 951static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 952 unsigned long, fragS *,
953 int));
91a2ae2a 954static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 955static void fixup_unw_records PARAMS ((unw_rec_list *, int));
e4e8248d
JB		 956static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *));
957static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
958static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
6290819d
NC		 959static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
960static void save_prologue_count PARAMS ((unsigned long, unsigned int));
961static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 962
652ca075 963/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 964 unit (as opposed to the memory unit). */
965static int
652ca075 966ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 967{
968 reg -= REG_AR;
652ca075
L		 969 return reg >= 64 && reg <= 111;
970}
800eeca4 971
652ca075
L		 972/* Determine if application register REGNUM resides only in the memory
973 unit (as opposed to the integer unit). */
974static int
975ar_is_only_in_memory_unit (int reg)
976{
977 reg -= REG_AR;
978 return reg >= 0 && reg <= 47;
800eeca4
JW		 979}
980
981/* Switch to section NAME and create section if necessary. It's
982 rather ugly that we have to manipulate input_line_pointer but I
983 don't see any other way to accomplish the same thing without
984 changing obj-elf.c (which may be the Right Thing, in the end). */
985static void
986set_section (name)
987 char *name;
988{
989 char *saved_input_line_pointer;
990
991 saved_input_line_pointer = input_line_pointer;
992 input_line_pointer = name;
993 obj_elf_section (0);
994 input_line_pointer = saved_input_line_pointer;
995}
996
d61a78a7
RH		 997/* Map 's' to SHF_IA_64_SHORT. */
998
999int
1000ia64_elf_section_letter (letter, ptr_msg)
1001 int letter;
1002 char **ptr_msg;
1003{
1004 if (letter == 's')
1005 return SHF_IA_64_SHORT;
711ef82f
L		 1006 else if (letter == 'o')
1007 return SHF_LINK_ORDER;
d61a78a7 1008
711ef82f
L		 1009 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1010 return -1;
d61a78a7
RH		 1011}
1012
800eeca4
JW		 1013/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1014
1015flagword
1016ia64_elf_section_flags (flags, attr, type)
1017 flagword flags;
2434f565 1018 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 1019{
1020 if (attr & SHF_IA_64_SHORT)
1021 flags |= SEC_SMALL_DATA;
1022 return flags;
1023}
1024
91a2ae2a
RH		 1025int
1026ia64_elf_section_type (str, len)
40449e9f
KH		 1027 const char *str;
1028 size_t len;
91a2ae2a 1029{
1cd8ff38 1030#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1031
1cd8ff38 1032 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1033 return SHT_PROGBITS;
1034
1cd8ff38 1035 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1036 return SHT_PROGBITS;
1037
1cd8ff38 1038 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1039 return SHT_IA_64_UNWIND;
1040
1cd8ff38 1041 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1042 return SHT_IA_64_UNWIND;
1043
711ef82f
L		 1044 if (STREQ ("unwind"))
1045 return SHT_IA_64_UNWIND;
1046
91a2ae2a 1047 return -1;
1cd8ff38 1048#undef STREQ
91a2ae2a
RH		 1049}
1050
800eeca4
JW		 1051static unsigned int
1052set_regstack (ins, locs, outs, rots)
1053 unsigned int ins, locs, outs, rots;
1054{
542d6675
KH		 1055 /* Size of frame. */
1056 unsigned int sof;
800eeca4
JW		 1057
1058 sof = ins + locs + outs;
1059 if (sof > 96)
1060 {
1061 as_bad ("Size of frame exceeds maximum of 96 registers");
1062 return 0;
1063 }
1064 if (rots > sof)
1065 {
1066 as_warn ("Size of rotating registers exceeds frame size");
1067 return 0;
1068 }
1069 md.in.base = REG_GR + 32;
1070 md.loc.base = md.in.base + ins;
1071 md.out.base = md.loc.base + locs;
1072
1073 md.in.num_regs = ins;
1074 md.loc.num_regs = locs;
1075 md.out.num_regs = outs;
1076 md.rot.num_regs = rots;
1077 return sof;
1078}
1079
1080void
1081ia64_flush_insns ()
1082{
1083 struct label_fix *lfix;
1084 segT saved_seg;
1085 subsegT saved_subseg;
b44b1b85 1086 unw_rec_list *ptr;
07a53e5c 1087 bfd_boolean mark;
800eeca4
JW		 1088
1089 if (!md.last_text_seg)
1090 return;
1091
1092 saved_seg = now_seg;
1093 saved_subseg = now_subseg;
1094
1095 subseg_set (md.last_text_seg, 0);
1096
1097 while (md.num_slots_in_use > 0)
1098 emit_one_bundle (); /* force out queued instructions */
1099
1100 /* In case there are labels following the last instruction, resolve
07a53e5c
RH		 1101 those now. */
1102 mark = FALSE;
800eeca4
JW		 1103 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1104 {
07a53e5c
RH		 1105 symbol_set_value_now (lfix->sym);
1106 mark |= lfix->dw2_mark_labels;
800eeca4 1107 }
07a53e5c 1108 if (mark)
f1bcba5b 1109 {
07a53e5c
RH		 1110 dwarf2_where (&CURR_SLOT.debug_line);
1111 CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
1112 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line);
f1bcba5b 1113 }
07a53e5c
RH		 1114 CURR_SLOT.label_fixups = 0;
1115
1116 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1117 symbol_set_value_now (lfix->sym);
f1bcba5b 1118 CURR_SLOT.tag_fixups = 0;
800eeca4 1119
b44b1b85 1120 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1121 resolve those now. We only handle prologue, body, and endp directives
1122 here. Give an error for others. */
b44b1b85
JW		 1123 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1124 {
9c59842f 1125 switch (ptr->r.type)
b44b1b85 1126 {
9c59842f
JW		 1127 case prologue:
1128 case prologue_gr:
1129 case body:
1130 case endp:
b44b1b85
JW		 1131 ptr->slot_number = (unsigned long) frag_more (0);
1132 ptr->slot_frag = frag_now;
9c59842f
JW		 1133 break;
1134
1135 /* Allow any record which doesn't have a "t" field (i.e.,
1136 doesn't relate to a particular instruction). */
1137 case unwabi:
1138 case br_gr:
1139 case copy_state:
1140 case fr_mem:
1141 case frgr_mem:
1142 case gr_gr:
1143 case gr_mem:
1144 case label_state:
1145 case rp_br:
1146 case spill_base:
1147 case spill_mask:
1148 /* nothing */
1149 break;
1150
1151 default:
1152 as_bad (_("Unwind directive not followed by an instruction."));
1153 break;
b44b1b85 1154 }
b44b1b85
JW		 1155 }
1156 unwind.current_entry = NULL;
1157
800eeca4 1158 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1159
1160 if (md.qp.X_op == O_register)
1161 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1162}
1163
d9201763
L		 1164static void
1165ia64_do_align (int nbytes)
800eeca4
JW		 1166{
1167 char *saved_input_line_pointer = input_line_pointer;
1168
1169 input_line_pointer = "";
1170 s_align_bytes (nbytes);
1171 input_line_pointer = saved_input_line_pointer;
1172}
1173
1174void
1175ia64_cons_align (nbytes)
1176 int nbytes;
1177{
1178 if (md.auto_align)
1179 {
1180 char *saved_input_line_pointer = input_line_pointer;
1181 input_line_pointer = "";
1182 s_align_bytes (nbytes);
1183 input_line_pointer = saved_input_line_pointer;
1184 }
1185}
1186
1187/* Output COUNT bytes to a memory location. */
2132e3a3 1188static char *vbyte_mem_ptr = NULL;
800eeca4 1189
197865e8 1190void
800eeca4
JW		 1191output_vbyte_mem (count, ptr, comment)
1192 int count;
1193 char *ptr;
2434f565 1194 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1195{
1196 int x;
1197 if (vbyte_mem_ptr == NULL)
1198 abort ();
1199
1200 if (count == 0)
1201 return;
1202 for (x = 0; x < count; x++)
1203 *(vbyte_mem_ptr++) = ptr[x];
1204}
1205
1206/* Count the number of bytes required for records. */
1207static int vbyte_count = 0;
197865e8 1208void
800eeca4
JW		 1209count_output (count, ptr, comment)
1210 int count;
2434f565
JW		 1211 char *ptr ATTRIBUTE_UNUSED;
1212 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1213{
1214 vbyte_count += count;
1215}
1216
1217static void
1218output_R1_format (f, rtype, rlen)
1219 vbyte_func f;
1220 unw_record_type rtype;
1221 int rlen;
1222{
e0c9811a 1223 int r = 0;
800eeca4
JW		 1224 char byte;
1225 if (rlen > 0x1f)
1226 {
1227 output_R3_format (f, rtype, rlen);
1228 return;
1229 }
197865e8 1230
e0c9811a
JW		 1231 if (rtype == body)
1232 r = 1;
1233 else if (rtype != prologue)
1234 as_bad ("record type is not valid");
1235
800eeca4
JW		 1236 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1237 (*f) (1, &byte, NULL);
1238}
1239
1240static void
1241output_R2_format (f, mask, grsave, rlen)
1242 vbyte_func f;
1243 int mask, grsave;
1244 unsigned long rlen;
1245{
1246 char bytes[20];
1247 int count = 2;
1248 mask = (mask & 0x0f);
1249 grsave = (grsave & 0x7f);
1250
1251 bytes[0] = (UNW_R2 | (mask >> 1));
1252 bytes[1] = (((mask & 0x01) << 7) | grsave);
1253 count += output_leb128 (bytes + 2, rlen, 0);
1254 (*f) (count, bytes, NULL);
1255}
1256
1257static void
1258output_R3_format (f, rtype, rlen)
1259 vbyte_func f;
1260 unw_record_type rtype;
1261 unsigned long rlen;
1262{
e0c9811a 1263 int r = 0, count;
800eeca4
JW		 1264 char bytes[20];
1265 if (rlen <= 0x1f)
1266 {
1267 output_R1_format (f, rtype, rlen);
1268 return;
1269 }
197865e8 1270
e0c9811a
JW		 1271 if (rtype == body)
1272 r = 1;
1273 else if (rtype != prologue)
1274 as_bad ("record type is not valid");
800eeca4
JW		 1275 bytes[0] = (UNW_R3 | r);
1276 count = output_leb128 (bytes + 1, rlen, 0);
1277 (*f) (count + 1, bytes, NULL);
1278}
1279
1280static void
1281output_P1_format (f, brmask)
1282 vbyte_func f;
1283 int brmask;
1284{
1285 char byte;
1286 byte = UNW_P1 | (brmask & 0x1f);
1287 (*f) (1, &byte, NULL);
1288}
1289
1290static void
1291output_P2_format (f, brmask, gr)
1292 vbyte_func f;
1293 int brmask;
1294 int gr;
1295{
1296 char bytes[2];
1297 brmask = (brmask & 0x1f);
1298 bytes[0] = UNW_P2 | (brmask >> 1);
1299 bytes[1] = (((brmask & 1) << 7) | gr);
1300 (*f) (2, bytes, NULL);
1301}
1302
1303static void
1304output_P3_format (f, rtype, reg)
1305 vbyte_func f;
1306 unw_record_type rtype;
1307 int reg;
1308{
1309 char bytes[2];
e0c9811a 1310 int r = 0;
800eeca4
JW		 1311 reg = (reg & 0x7f);
1312 switch (rtype)
542d6675 1313 {
800eeca4
JW		 1314 case psp_gr:
1315 r = 0;
1316 break;
1317 case rp_gr:
1318 r = 1;
1319 break;
1320 case pfs_gr:
1321 r = 2;
1322 break;
1323 case preds_gr:
1324 r = 3;
1325 break;
1326 case unat_gr:
1327 r = 4;
1328 break;
1329 case lc_gr:
1330 r = 5;
1331 break;
1332 case rp_br:
1333 r = 6;
1334 break;
1335 case rnat_gr:
1336 r = 7;
1337 break;
1338 case bsp_gr:
1339 r = 8;
1340 break;
1341 case bspstore_gr:
1342 r = 9;
1343 break;
1344 case fpsr_gr:
1345 r = 10;
1346 break;
1347 case priunat_gr:
1348 r = 11;
1349 break;
1350 default:
1351 as_bad ("Invalid record type for P3 format.");
542d6675 1352 }
800eeca4
JW		 1353 bytes[0] = (UNW_P3 | (r >> 1));
1354 bytes[1] = (((r & 1) << 7) | reg);
1355 (*f) (2, bytes, NULL);
1356}
1357
800eeca4 1358static void
e0c9811a 1359output_P4_format (f, imask, imask_size)
800eeca4 1360 vbyte_func f;
e0c9811a
JW		 1361 unsigned char *imask;
1362 unsigned long imask_size;
800eeca4 1363{
e0c9811a 1364 imask[0] = UNW_P4;
2132e3a3 1365 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1366}
1367
1368static void
1369output_P5_format (f, grmask, frmask)
1370 vbyte_func f;
1371 int grmask;
1372 unsigned long frmask;
1373{
1374 char bytes[4];
1375 grmask = (grmask & 0x0f);
1376
1377 bytes[0] = UNW_P5;
1378 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1379 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1380 bytes[3] = (frmask & 0x000000ff);
1381 (*f) (4, bytes, NULL);
1382}
1383
1384static void
1385output_P6_format (f, rtype, rmask)
1386 vbyte_func f;
1387 unw_record_type rtype;
1388 int rmask;
1389{
1390 char byte;
e0c9811a 1391 int r = 0;
197865e8 1392
e0c9811a
JW		 1393 if (rtype == gr_mem)
1394 r = 1;
1395 else if (rtype != fr_mem)
1396 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1397 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1398 (*f) (1, &byte, NULL);
1399}
1400
1401static void
1402output_P7_format (f, rtype, w1, w2)
1403 vbyte_func f;
1404 unw_record_type rtype;
1405 unsigned long w1;
1406 unsigned long w2;
1407{
1408 char bytes[20];
1409 int count = 1;
e0c9811a 1410 int r = 0;
800eeca4
JW		 1411 count += output_leb128 (bytes + 1, w1, 0);
1412 switch (rtype)
1413 {
542d6675
KH		 1414 case mem_stack_f:
1415 r = 0;
1416 count += output_leb128 (bytes + count, w2 >> 4, 0);
1417 break;
1418 case mem_stack_v:
1419 r = 1;
1420 break;
1421 case spill_base:
1422 r = 2;
1423 break;
1424 case psp_sprel:
1425 r = 3;
1426 break;
1427 case rp_when:
1428 r = 4;
1429 break;
1430 case rp_psprel:
1431 r = 5;
1432 break;
1433 case pfs_when:
1434 r = 6;
1435 break;
1436 case pfs_psprel:
1437 r = 7;
1438 break;
1439 case preds_when:
1440 r = 8;
1441 break;
1442 case preds_psprel:
1443 r = 9;
1444 break;
1445 case lc_when:
1446 r = 10;
1447 break;
1448 case lc_psprel:
1449 r = 11;
1450 break;
1451 case unat_when:
1452 r = 12;
1453 break;
1454 case unat_psprel:
1455 r = 13;
1456 break;
1457 case fpsr_when:
1458 r = 14;
1459 break;
1460 case fpsr_psprel:
1461 r = 15;
1462 break;
1463 default:
1464 break;
800eeca4
JW		 1465 }
1466 bytes[0] = (UNW_P7 | r);
1467 (*f) (count, bytes, NULL);
1468}
1469
1470static void
1471output_P8_format (f, rtype, t)
1472 vbyte_func f;
1473 unw_record_type rtype;
1474 unsigned long t;
1475{
1476 char bytes[20];
e0c9811a 1477 int r = 0;
800eeca4
JW		 1478 int count = 2;
1479 bytes[0] = UNW_P8;
1480 switch (rtype)
1481 {
542d6675
KH		 1482 case rp_sprel:
1483 r = 1;
1484 break;
1485 case pfs_sprel:
1486 r = 2;
1487 break;
1488 case preds_sprel:
1489 r = 3;
1490 break;
1491 case lc_sprel:
1492 r = 4;
1493 break;
1494 case unat_sprel:
1495 r = 5;
1496 break;
1497 case fpsr_sprel:
1498 r = 6;
1499 break;
1500 case bsp_when:
1501 r = 7;
1502 break;
1503 case bsp_psprel:
1504 r = 8;
1505 break;
1506 case bsp_sprel:
1507 r = 9;
1508 break;
1509 case bspstore_when:
1510 r = 10;
1511 break;
1512 case bspstore_psprel:
1513 r = 11;
1514 break;
1515 case bspstore_sprel:
1516 r = 12;
1517 break;
1518 case rnat_when:
1519 r = 13;
1520 break;
1521 case rnat_psprel:
1522 r = 14;
1523 break;
1524 case rnat_sprel:
1525 r = 15;
1526 break;
1527 case priunat_when_gr:
1528 r = 16;
1529 break;
1530 case priunat_psprel:
1531 r = 17;
1532 break;
1533 case priunat_sprel:
1534 r = 18;
1535 break;
1536 case priunat_when_mem:
1537 r = 19;
1538 break;
1539 default:
1540 break;
800eeca4
JW		 1541 }
1542 bytes[1] = r;
1543 count += output_leb128 (bytes + 2, t, 0);
1544 (*f) (count, bytes, NULL);
1545}
1546
1547static void
1548output_P9_format (f, grmask, gr)
1549 vbyte_func f;
1550 int grmask;
1551 int gr;
1552{
1553 char bytes[3];
1554 bytes[0] = UNW_P9;
1555 bytes[1] = (grmask & 0x0f);
1556 bytes[2] = (gr & 0x7f);
1557 (*f) (3, bytes, NULL);
1558}
1559
1560static void
1561output_P10_format (f, abi, context)
1562 vbyte_func f;
1563 int abi;
1564 int context;
1565{
1566 char bytes[3];
1567 bytes[0] = UNW_P10;
1568 bytes[1] = (abi & 0xff);
1569 bytes[2] = (context & 0xff);
1570 (*f) (3, bytes, NULL);
1571}
1572
1573static void
1574output_B1_format (f, rtype, label)
1575 vbyte_func f;
1576 unw_record_type rtype;
1577 unsigned long label;
1578{
1579 char byte;
e0c9811a 1580 int r = 0;
197865e8 1581 if (label > 0x1f)
800eeca4
JW		 1582 {
1583 output_B4_format (f, rtype, label);
1584 return;
1585 }
e0c9811a
JW		 1586 if (rtype == copy_state)
1587 r = 1;
1588 else if (rtype != label_state)
1589 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1590
1591 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1592 (*f) (1, &byte, NULL);
1593}
1594
1595static void
1596output_B2_format (f, ecount, t)
1597 vbyte_func f;
1598 unsigned long ecount;
1599 unsigned long t;
1600{
1601 char bytes[20];
1602 int count = 1;
1603 if (ecount > 0x1f)
1604 {
1605 output_B3_format (f, ecount, t);
1606 return;
1607 }
1608 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1609 count += output_leb128 (bytes + 1, t, 0);
1610 (*f) (count, bytes, NULL);
1611}
1612
1613static void
1614output_B3_format (f, ecount, t)
1615 vbyte_func f;
1616 unsigned long ecount;
1617 unsigned long t;
1618{
1619 char bytes[20];
1620 int count = 1;
1621 if (ecount <= 0x1f)
1622 {
1623 output_B2_format (f, ecount, t);
1624 return;
1625 }
1626 bytes[0] = UNW_B3;
1627 count += output_leb128 (bytes + 1, t, 0);
1628 count += output_leb128 (bytes + count, ecount, 0);
1629 (*f) (count, bytes, NULL);
1630}
1631
1632static void
1633output_B4_format (f, rtype, label)
1634 vbyte_func f;
1635 unw_record_type rtype;
1636 unsigned long label;
1637{
1638 char bytes[20];
e0c9811a 1639 int r = 0;
800eeca4 1640 int count = 1;
197865e8 1641 if (label <= 0x1f)
800eeca4
JW		 1642 {
1643 output_B1_format (f, rtype, label);
1644 return;
1645 }
197865e8 1646
e0c9811a
JW		 1647 if (rtype == copy_state)
1648 r = 1;
1649 else if (rtype != label_state)
1650 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1651
1652 bytes[0] = (UNW_B4 | (r << 3));
1653 count += output_leb128 (bytes + 1, label, 0);
1654 (*f) (count, bytes, NULL);
1655}
1656
1657static char
e0c9811a 1658format_ab_reg (ab, reg)
542d6675
KH		 1659 int ab;
1660 int reg;
800eeca4
JW		 1661{
1662 int ret;
e0c9811a 1663 ab = (ab & 3);
800eeca4 1664 reg = (reg & 0x1f);
e0c9811a 1665 ret = (ab << 5) | reg;
800eeca4
JW		 1666 return ret;
1667}
1668
1669static void
e0c9811a 1670output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1671 vbyte_func f;
1672 unw_record_type rtype;
e0c9811a 1673 int ab, reg;
800eeca4
JW		 1674 unsigned long t;
1675 unsigned long w1;
1676{
1677 char bytes[20];
e0c9811a 1678 int r = 0;
800eeca4
JW		 1679 int count = 2;
1680 bytes[0] = UNW_X1;
197865e8 1681
e0c9811a
JW		 1682 if (rtype == spill_sprel)
1683 r = 1;
1684 else if (rtype != spill_psprel)
1685 as_bad ("Invalid record type for format X1");
1686 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1687 count += output_leb128 (bytes + 2, t, 0);
1688 count += output_leb128 (bytes + count, w1, 0);
1689 (*f) (count, bytes, NULL);
1690}
1691
1692static void
e0c9811a 1693output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1694 vbyte_func f;
e0c9811a 1695 int ab, reg;
800eeca4
JW		 1696 int x, y, treg;
1697 unsigned long t;
1698{
1699 char bytes[20];
800eeca4
JW		 1700 int count = 3;
1701 bytes[0] = UNW_X2;
e0c9811a 1702 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1703 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1704 count += output_leb128 (bytes + 3, t, 0);
1705 (*f) (count, bytes, NULL);
1706}
1707
1708static void
e0c9811a 1709output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1710 vbyte_func f;
1711 unw_record_type rtype;
1712 int qp;
e0c9811a 1713 int ab, reg;
800eeca4
JW		 1714 unsigned long t;
1715 unsigned long w1;
1716{
1717 char bytes[20];
e0c9811a 1718 int r = 0;
800eeca4 1719 int count = 3;
e0c9811a
JW		 1720 bytes[0] = UNW_X3;
1721
1722 if (rtype == spill_sprel_p)
1723 r = 1;
1724 else if (rtype != spill_psprel_p)
1725 as_bad ("Invalid record type for format X3");
800eeca4 1726 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1727 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1728 count += output_leb128 (bytes + 3, t, 0);
1729 count += output_leb128 (bytes + count, w1, 0);
1730 (*f) (count, bytes, NULL);
1731}
1732
1733static void
e0c9811a 1734output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1735 vbyte_func f;
1736 int qp;
e0c9811a 1737 int ab, reg;
800eeca4
JW		 1738 int x, y, treg;
1739 unsigned long t;
1740{
1741 char bytes[20];
800eeca4 1742 int count = 4;
e0c9811a 1743 bytes[0] = UNW_X4;
800eeca4 1744 bytes[1] = (qp & 0x3f);
e0c9811a 1745 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1746 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1747 count += output_leb128 (bytes + 4, t, 0);
1748 (*f) (count, bytes, NULL);
1749}
1750
ba825241
JB		 1751/* This function checks whether there are any outstanding .save-s and
1752 discards them if so. */
1753
1754static void
1755check_pending_save (void)
1756{
1757 if (unwind.pending_saves)
1758 {
1759 unw_rec_list *cur, *prev;
1760
1761 as_warn ("Previous .save incomplete");
1762 for (cur = unwind.list, prev = NULL; cur; )
1763 if (&cur->r.record.p == unwind.pending_saves)
1764 {
1765 if (prev)
1766 prev->next = cur->next;
1767 else
1768 unwind.list = cur->next;
1769 if (cur == unwind.tail)
1770 unwind.tail = prev;
1771 if (cur == unwind.current_entry)
1772 unwind.current_entry = cur->next;
1773 /* Don't free the first discarded record, it's being used as
1774 terminator for (currently) br_gr and gr_gr processing, and
1775 also prevents leaving a dangling pointer to it in its
1776 predecessor. */
1777 cur->r.record.p.grmask = 0;
1778 cur->r.record.p.brmask = 0;
1779 cur->r.record.p.frmask = 0;
1780 prev = cur->r.record.p.next;
1781 cur->r.record.p.next = NULL;
1782 cur = prev;
1783 break;
1784 }
1785 else
1786 {
1787 prev = cur;
1788 cur = cur->next;
1789 }
1790 while (cur)
1791 {
1792 prev = cur;
1793 cur = cur->r.record.p.next;
1794 free (prev);
1795 }
1796 unwind.pending_saves = NULL;
1797 }
1798}
1799
800eeca4 1800/* This function allocates a record list structure, and initializes fields. */
542d6675 1801
800eeca4 1802static unw_rec_list *
197865e8 1803alloc_record (unw_record_type t)
800eeca4
JW		 1804{
1805 unw_rec_list *ptr;
1806 ptr = xmalloc (sizeof (*ptr));
ba825241 1807 memset (ptr, 0, sizeof (*ptr));
800eeca4
JW		 1808 ptr->slot_number = SLOT_NUM_NOT_SET;
1809 ptr->r.type = t;
1810 return ptr;
1811}
1812
5738bc24
JW		 1813/* Dummy unwind record used for calculating the length of the last prologue or
1814 body region. */
1815
1816static unw_rec_list *
1817output_endp ()
1818{
1819 unw_rec_list *ptr = alloc_record (endp);
1820 return ptr;
1821}
1822
800eeca4
JW		 1823static unw_rec_list *
1824output_prologue ()
1825{
1826 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1827 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1828 return ptr;
1829}
1830
1831static unw_rec_list *
1832output_prologue_gr (saved_mask, reg)
1833 unsigned int saved_mask;
1834 unsigned int reg;
1835{
1836 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1837 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1838 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1839 ptr->r.record.r.grsave = reg;
1840 return ptr;
1841}
1842
1843static unw_rec_list *
1844output_body ()
1845{
1846 unw_rec_list *ptr = alloc_record (body);
1847 return ptr;
1848}
1849
1850static unw_rec_list *
1851output_mem_stack_f (size)
1852 unsigned int size;
1853{
1854 unw_rec_list *ptr = alloc_record (mem_stack_f);
1855 ptr->r.record.p.size = size;
1856 return ptr;
1857}
1858
1859static unw_rec_list *
1860output_mem_stack_v ()
1861{
1862 unw_rec_list *ptr = alloc_record (mem_stack_v);
1863 return ptr;
1864}
1865
1866static unw_rec_list *
1867output_psp_gr (gr)
1868 unsigned int gr;
1869{
1870 unw_rec_list *ptr = alloc_record (psp_gr);
ba825241 1871 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1872 return ptr;
1873}
1874
1875static unw_rec_list *
1876output_psp_sprel (offset)
1877 unsigned int offset;
1878{
1879 unw_rec_list *ptr = alloc_record (psp_sprel);
ba825241 1880 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1881 return ptr;
1882}
1883
1884static unw_rec_list *
1885output_rp_when ()
1886{
1887 unw_rec_list *ptr = alloc_record (rp_when);
1888 return ptr;
1889}
1890
1891static unw_rec_list *
1892output_rp_gr (gr)
1893 unsigned int gr;
1894{
1895 unw_rec_list *ptr = alloc_record (rp_gr);
ba825241 1896 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1897 return ptr;
1898}
1899
1900static unw_rec_list *
1901output_rp_br (br)
1902 unsigned int br;
1903{
1904 unw_rec_list *ptr = alloc_record (rp_br);
ba825241 1905 ptr->r.record.p.r.br = br;
800eeca4
JW		 1906 return ptr;
1907}
1908
1909static unw_rec_list *
1910output_rp_psprel (offset)
1911 unsigned int offset;
1912{
1913 unw_rec_list *ptr = alloc_record (rp_psprel);
ba825241 1914 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1915 return ptr;
1916}
1917
1918static unw_rec_list *
1919output_rp_sprel (offset)
1920 unsigned int offset;
1921{
1922 unw_rec_list *ptr = alloc_record (rp_sprel);
ba825241 1923 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1924 return ptr;
1925}
1926
1927static unw_rec_list *
1928output_pfs_when ()
1929{
1930 unw_rec_list *ptr = alloc_record (pfs_when);
1931 return ptr;
1932}
1933
1934static unw_rec_list *
1935output_pfs_gr (gr)
1936 unsigned int gr;
1937{
1938 unw_rec_list *ptr = alloc_record (pfs_gr);
ba825241 1939 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1940 return ptr;
1941}
1942
1943static unw_rec_list *
1944output_pfs_psprel (offset)
1945 unsigned int offset;
1946{
1947 unw_rec_list *ptr = alloc_record (pfs_psprel);
ba825241 1948 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1949 return ptr;
1950}
1951
1952static unw_rec_list *
1953output_pfs_sprel (offset)
1954 unsigned int offset;
1955{
1956 unw_rec_list *ptr = alloc_record (pfs_sprel);
ba825241 1957 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1958 return ptr;
1959}
1960
1961static unw_rec_list *
1962output_preds_when ()
1963{
1964 unw_rec_list *ptr = alloc_record (preds_when);
1965 return ptr;
1966}
1967
1968static unw_rec_list *
1969output_preds_gr (gr)
1970 unsigned int gr;
1971{
1972 unw_rec_list *ptr = alloc_record (preds_gr);
ba825241 1973 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1974 return ptr;
1975}
1976
1977static unw_rec_list *
1978output_preds_psprel (offset)
1979 unsigned int offset;
1980{
1981 unw_rec_list *ptr = alloc_record (preds_psprel);
ba825241 1982 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1983 return ptr;
1984}
1985
1986static unw_rec_list *
1987output_preds_sprel (offset)
1988 unsigned int offset;
1989{
1990 unw_rec_list *ptr = alloc_record (preds_sprel);
ba825241 1991 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1992 return ptr;
1993}
1994
1995static unw_rec_list *
1996output_fr_mem (mask)
1997 unsigned int mask;
1998{
1999 unw_rec_list *ptr = alloc_record (fr_mem);
ba825241
JB		 2000 unw_rec_list *cur = ptr;
2001
2002 ptr->r.record.p.frmask = mask;
2003 unwind.pending_saves = &ptr->r.record.p;
2004 for (;;)
2005 {
2006 unw_rec_list *prev = cur;
2007
2008 /* Clear least significant set bit. */
2009 mask &= ~(mask & (~mask + 1));
2010 if (!mask)
2011 return ptr;
2012 cur = alloc_record (fr_mem);
2013 cur->r.record.p.frmask = mask;
2014 /* Retain only least significant bit. */
2015 prev->r.record.p.frmask ^= mask;
2016 prev->r.record.p.next = cur;
2017 }
800eeca4
JW		 2018}
2019
2020static unw_rec_list *
2021output_frgr_mem (gr_mask, fr_mask)
2022 unsigned int gr_mask;
2023 unsigned int fr_mask;
2024{
2025 unw_rec_list *ptr = alloc_record (frgr_mem);
ba825241
JB		 2026 unw_rec_list *cur = ptr;
2027
2028 unwind.pending_saves = &cur->r.record.p;
2029 cur->r.record.p.frmask = fr_mask;
2030 while (fr_mask)
2031 {
2032 unw_rec_list *prev = cur;
2033
2034 /* Clear least significant set bit. */
2035 fr_mask &= ~(fr_mask & (~fr_mask + 1));
2036 if (!gr_mask && !fr_mask)
2037 return ptr;
2038 cur = alloc_record (frgr_mem);
2039 cur->r.record.p.frmask = fr_mask;
2040 /* Retain only least significant bit. */
2041 prev->r.record.p.frmask ^= fr_mask;
2042 prev->r.record.p.next = cur;
2043 }
2044 cur->r.record.p.grmask = gr_mask;
2045 for (;;)
2046 {
2047 unw_rec_list *prev = cur;
2048
2049 /* Clear least significant set bit. */
2050 gr_mask &= ~(gr_mask & (~gr_mask + 1));
2051 if (!gr_mask)
2052 return ptr;
2053 cur = alloc_record (frgr_mem);
2054 cur->r.record.p.grmask = gr_mask;
2055 /* Retain only least significant bit. */
2056 prev->r.record.p.grmask ^= gr_mask;
2057 prev->r.record.p.next = cur;
2058 }
800eeca4
JW		 2059}
2060
2061static unw_rec_list *
2062output_gr_gr (mask, reg)
2063 unsigned int mask;
2064 unsigned int reg;
2065{
2066 unw_rec_list *ptr = alloc_record (gr_gr);
ba825241
JB		 2067 unw_rec_list *cur = ptr;
2068
800eeca4 2069 ptr->r.record.p.grmask = mask;
ba825241
JB		 2070 ptr->r.record.p.r.gr = reg;
2071 unwind.pending_saves = &ptr->r.record.p;
2072 for (;;)
2073 {
2074 unw_rec_list *prev = cur;
2075
2076 /* Clear least significant set bit. */
2077 mask &= ~(mask & (~mask + 1));
2078 if (!mask)
2079 return ptr;
2080 cur = alloc_record (gr_gr);
2081 cur->r.record.p.grmask = mask;
2082 /* Indicate this record shouldn't be output. */
2083 cur->r.record.p.r.gr = REG_NUM;
2084 /* Retain only least significant bit. */
2085 prev->r.record.p.grmask ^= mask;
2086 prev->r.record.p.next = cur;
2087 }
800eeca4
JW		 2088}
2089
2090static unw_rec_list *
2091output_gr_mem (mask)
2092 unsigned int mask;
2093{
2094 unw_rec_list *ptr = alloc_record (gr_mem);
ba825241
JB		 2095 unw_rec_list *cur = ptr;
2096
2097 ptr->r.record.p.grmask = mask;
2098 unwind.pending_saves = &ptr->r.record.p;
2099 for (;;)
2100 {
2101 unw_rec_list *prev = cur;
2102
2103 /* Clear least significant set bit. */
2104 mask &= ~(mask & (~mask + 1));
2105 if (!mask)
2106 return ptr;
2107 cur = alloc_record (gr_mem);
2108 cur->r.record.p.grmask = mask;
2109 /* Retain only least significant bit. */
2110 prev->r.record.p.grmask ^= mask;
2111 prev->r.record.p.next = cur;
2112 }
800eeca4
JW		 2113}
2114
2115static unw_rec_list *
2116output_br_mem (unsigned int mask)
2117{
2118 unw_rec_list *ptr = alloc_record (br_mem);
ba825241
JB		 2119 unw_rec_list *cur = ptr;
2120
800eeca4 2121 ptr->r.record.p.brmask = mask;
ba825241
JB		 2122 unwind.pending_saves = &ptr->r.record.p;
2123 for (;;)
2124 {
2125 unw_rec_list *prev = cur;
2126
2127 /* Clear least significant set bit. */
2128 mask &= ~(mask & (~mask + 1));
2129 if (!mask)
2130 return ptr;
2131 cur = alloc_record (br_mem);
2132 cur->r.record.p.brmask = mask;
2133 /* Retain only least significant bit. */
2134 prev->r.record.p.brmask ^= mask;
2135 prev->r.record.p.next = cur;
2136 }
800eeca4
JW		 2137}
2138
2139static unw_rec_list *
ba825241
JB		 2140output_br_gr (mask, reg)
2141 unsigned int mask;
800eeca4
JW		 2142 unsigned int reg;
2143{
2144 unw_rec_list *ptr = alloc_record (br_gr);
ba825241
JB		 2145 unw_rec_list *cur = ptr;
2146
2147 ptr->r.record.p.brmask = mask;
2148 ptr->r.record.p.r.gr = reg;
2149 unwind.pending_saves = &ptr->r.record.p;
2150 for (;;)
2151 {
2152 unw_rec_list *prev = cur;
2153
2154 /* Clear least significant set bit. */
2155 mask &= ~(mask & (~mask + 1));
2156 if (!mask)
2157 return ptr;
2158 cur = alloc_record (br_gr);
2159 cur->r.record.p.brmask = mask;
2160 /* Indicate this record shouldn't be output. */
2161 cur->r.record.p.r.gr = REG_NUM;
2162 /* Retain only least significant bit. */
2163 prev->r.record.p.brmask ^= mask;
2164 prev->r.record.p.next = cur;
2165 }
800eeca4
JW		 2166}
2167
2168static unw_rec_list *
2169output_spill_base (offset)
2170 unsigned int offset;
2171{
2172 unw_rec_list *ptr = alloc_record (spill_base);
ba825241 2173 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2174 return ptr;
2175}
2176
2177static unw_rec_list *
2178output_unat_when ()
2179{
2180 unw_rec_list *ptr = alloc_record (unat_when);
2181 return ptr;
2182}
2183
2184static unw_rec_list *
2185output_unat_gr (gr)
2186 unsigned int gr;
2187{
2188 unw_rec_list *ptr = alloc_record (unat_gr);
ba825241 2189 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2190 return ptr;
2191}
2192
2193static unw_rec_list *
2194output_unat_psprel (offset)
2195 unsigned int offset;
2196{
2197 unw_rec_list *ptr = alloc_record (unat_psprel);
ba825241 2198 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2199 return ptr;
2200}
2201
2202static unw_rec_list *
2203output_unat_sprel (offset)
2204 unsigned int offset;
2205{
2206 unw_rec_list *ptr = alloc_record (unat_sprel);
ba825241 2207 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2208 return ptr;
2209}
2210
2211static unw_rec_list *
2212output_lc_when ()
2213{
2214 unw_rec_list *ptr = alloc_record (lc_when);
2215 return ptr;
2216}
2217
2218static unw_rec_list *
2219output_lc_gr (gr)
2220 unsigned int gr;
2221{
2222 unw_rec_list *ptr = alloc_record (lc_gr);
ba825241 2223 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2224 return ptr;
2225}
2226
2227static unw_rec_list *
2228output_lc_psprel (offset)
2229 unsigned int offset;
2230{
2231 unw_rec_list *ptr = alloc_record (lc_psprel);
ba825241 2232 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2233 return ptr;
2234}
2235
2236static unw_rec_list *
2237output_lc_sprel (offset)
2238 unsigned int offset;
2239{
2240 unw_rec_list *ptr = alloc_record (lc_sprel);
ba825241 2241 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2242 return ptr;
2243}
2244
2245static unw_rec_list *
2246output_fpsr_when ()
2247{
2248 unw_rec_list *ptr = alloc_record (fpsr_when);
2249 return ptr;
2250}
2251
2252static unw_rec_list *
2253output_fpsr_gr (gr)
2254 unsigned int gr;
2255{
2256 unw_rec_list *ptr = alloc_record (fpsr_gr);
ba825241 2257 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2258 return ptr;
2259}
2260
2261static unw_rec_list *
2262output_fpsr_psprel (offset)
2263 unsigned int offset;
2264{
2265 unw_rec_list *ptr = alloc_record (fpsr_psprel);
ba825241 2266 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2267 return ptr;
2268}
2269
2270static unw_rec_list *
2271output_fpsr_sprel (offset)
2272 unsigned int offset;
2273{
2274 unw_rec_list *ptr = alloc_record (fpsr_sprel);
ba825241 2275 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2276 return ptr;
2277}
2278
2279static unw_rec_list *
2280output_priunat_when_gr ()
2281{
2282 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2283 return ptr;
2284}
2285
2286static unw_rec_list *
2287output_priunat_when_mem ()
2288{
2289 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2290 return ptr;
2291}
2292
2293static unw_rec_list *
2294output_priunat_gr (gr)
2295 unsigned int gr;
2296{
2297 unw_rec_list *ptr = alloc_record (priunat_gr);
ba825241 2298 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2299 return ptr;
2300}
2301
2302static unw_rec_list *
2303output_priunat_psprel (offset)
2304 unsigned int offset;
2305{
2306 unw_rec_list *ptr = alloc_record (priunat_psprel);
ba825241 2307 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2308 return ptr;
2309}
2310
2311static unw_rec_list *
2312output_priunat_sprel (offset)
2313 unsigned int offset;
2314{
2315 unw_rec_list *ptr = alloc_record (priunat_sprel);
ba825241 2316 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2317 return ptr;
2318}
2319
2320static unw_rec_list *
2321output_bsp_when ()
2322{
2323 unw_rec_list *ptr = alloc_record (bsp_when);
2324 return ptr;
2325}
2326
2327static unw_rec_list *
2328output_bsp_gr (gr)
2329 unsigned int gr;
2330{
2331 unw_rec_list *ptr = alloc_record (bsp_gr);
ba825241 2332 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2333 return ptr;
2334}
2335
2336static unw_rec_list *
2337output_bsp_psprel (offset)
2338 unsigned int offset;
2339{
2340 unw_rec_list *ptr = alloc_record (bsp_psprel);
ba825241 2341 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2342 return ptr;
2343}
2344
2345static unw_rec_list *
2346output_bsp_sprel (offset)
2347 unsigned int offset;
2348{
2349 unw_rec_list *ptr = alloc_record (bsp_sprel);
ba825241 2350 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2351 return ptr;
2352}
2353
2354static unw_rec_list *
2355output_bspstore_when ()
2356{
2357 unw_rec_list *ptr = alloc_record (bspstore_when);
2358 return ptr;
2359}
2360
2361static unw_rec_list *
2362output_bspstore_gr (gr)
2363 unsigned int gr;
2364{
2365 unw_rec_list *ptr = alloc_record (bspstore_gr);
ba825241 2366 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2367 return ptr;
2368}
2369
2370static unw_rec_list *
2371output_bspstore_psprel (offset)
2372 unsigned int offset;
2373{
2374 unw_rec_list *ptr = alloc_record (bspstore_psprel);
ba825241 2375 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2376 return ptr;
2377}
2378
2379static unw_rec_list *
2380output_bspstore_sprel (offset)
2381 unsigned int offset;
2382{
2383 unw_rec_list *ptr = alloc_record (bspstore_sprel);
ba825241 2384 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2385 return ptr;
2386}
2387
2388static unw_rec_list *
2389output_rnat_when ()
2390{
2391 unw_rec_list *ptr = alloc_record (rnat_when);
2392 return ptr;
2393}
2394
2395static unw_rec_list *
2396output_rnat_gr (gr)
2397 unsigned int gr;
2398{
2399 unw_rec_list *ptr = alloc_record (rnat_gr);
ba825241 2400 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2401 return ptr;
2402}
2403
2404static unw_rec_list *
2405output_rnat_psprel (offset)
2406 unsigned int offset;
2407{
2408 unw_rec_list *ptr = alloc_record (rnat_psprel);
ba825241 2409 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2410 return ptr;
2411}
2412
2413static unw_rec_list *
2414output_rnat_sprel (offset)
2415 unsigned int offset;
2416{
2417 unw_rec_list *ptr = alloc_record (rnat_sprel);
ba825241 2418 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2419 return ptr;
2420}
2421
2422static unw_rec_list *
e0c9811a
JW		 2423output_unwabi (abi, context)
2424 unsigned long abi;
2425 unsigned long context;
800eeca4 2426{
e0c9811a
JW		 2427 unw_rec_list *ptr = alloc_record (unwabi);
2428 ptr->r.record.p.abi = abi;
2429 ptr->r.record.p.context = context;
800eeca4
JW		 2430 return ptr;
2431}
2432
2433static unw_rec_list *
e0c9811a 2434output_epilogue (unsigned long ecount)
800eeca4 2435{
e0c9811a
JW		 2436 unw_rec_list *ptr = alloc_record (epilogue);
2437 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2438 return ptr;
2439}
2440
2441static unw_rec_list *
e0c9811a 2442output_label_state (unsigned long label)
800eeca4 2443{
e0c9811a
JW		 2444 unw_rec_list *ptr = alloc_record (label_state);
2445 ptr->r.record.b.label = label;
800eeca4
JW		 2446 return ptr;
2447}
2448
2449static unw_rec_list *
e0c9811a
JW		 2450output_copy_state (unsigned long label)
2451{
2452 unw_rec_list *ptr = alloc_record (copy_state);
2453 ptr->r.record.b.label = label;
2454 return ptr;
2455}
2456
2457static unw_rec_list *
e4e8248d 2458output_spill_psprel (ab, reg, offset, predicate)
e0c9811a 2459 unsigned int ab;
800eeca4
JW		 2460 unsigned int reg;
2461 unsigned int offset;
2462 unsigned int predicate;
2463{
e4e8248d 2464 unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel);
e0c9811a 2465 ptr->r.record.x.ab = ab;
800eeca4 2466 ptr->r.record.x.reg = reg;
ba825241 2467 ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2468 ptr->r.record.x.qp = predicate;
2469 return ptr;
2470}
2471
2472static unw_rec_list *
e4e8248d 2473output_spill_sprel (ab, reg, offset, predicate)
e0c9811a 2474 unsigned int ab;
800eeca4
JW		 2475 unsigned int reg;
2476 unsigned int offset;
2477 unsigned int predicate;
2478{
e4e8248d 2479 unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel);
e0c9811a 2480 ptr->r.record.x.ab = ab;
800eeca4 2481 ptr->r.record.x.reg = reg;
ba825241 2482 ptr->r.record.x.where.spoff = offset / 4;
800eeca4
JW		 2483 ptr->r.record.x.qp = predicate;
2484 return ptr;
2485}
2486
2487static unw_rec_list *
e4e8248d 2488output_spill_reg (ab, reg, targ_reg, xy, predicate)
e0c9811a 2489 unsigned int ab;
800eeca4
JW		 2490 unsigned int reg;
2491 unsigned int targ_reg;
2492 unsigned int xy;
2493 unsigned int predicate;
2494{
e4e8248d 2495 unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg);
e0c9811a 2496 ptr->r.record.x.ab = ab;
800eeca4 2497 ptr->r.record.x.reg = reg;
ba825241 2498 ptr->r.record.x.where.reg = targ_reg;
800eeca4
JW		 2499 ptr->r.record.x.xy = xy;
2500 ptr->r.record.x.qp = predicate;
2501 return ptr;
2502}
2503
197865e8 2504/* Given a unw_rec_list process the correct format with the
800eeca4 2505 specified function. */
542d6675 2506
800eeca4
JW		 2507static void
2508process_one_record (ptr, f)
2509 unw_rec_list *ptr;
2510 vbyte_func f;
2511{
ba825241 2512 unsigned int fr_mask, gr_mask;
e0c9811a 2513
197865e8 2514 switch (ptr->r.type)
800eeca4 2515 {
5738bc24
JW		 2516 /* This is a dummy record that takes up no space in the output. */
2517 case endp:
2518 break;
2519
542d6675
KH		 2520 case gr_mem:
2521 case fr_mem:
2522 case br_mem:
2523 case frgr_mem:
2524 /* These are taken care of by prologue/prologue_gr. */
2525 break;
e0c9811a 2526
542d6675
KH		 2527 case prologue_gr:
2528 case prologue:
2529 if (ptr->r.type == prologue_gr)
2530 output_R2_format (f, ptr->r.record.r.grmask,
2531 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2532 else
800eeca4 2533 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2534
2535 /* Output descriptor(s) for union of register spills (if any). */
2536 gr_mask = ptr->r.record.r.mask.gr_mem;
2537 fr_mask = ptr->r.record.r.mask.fr_mem;
2538 if (fr_mask)
2539 {
2540 if ((fr_mask & ~0xfUL) == 0)
2541 output_P6_format (f, fr_mem, fr_mask);
2542 else
2543 {
2544 output_P5_format (f, gr_mask, fr_mask);
2545 gr_mask = 0;
2546 }
2547 }
2548 if (gr_mask)
2549 output_P6_format (f, gr_mem, gr_mask);
2550 if (ptr->r.record.r.mask.br_mem)
2551 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2552
2553 /* output imask descriptor if necessary: */
2554 if (ptr->r.record.r.mask.i)
2555 output_P4_format (f, ptr->r.record.r.mask.i,
2556 ptr->r.record.r.imask_size);
2557 break;
2558
2559 case body:
2560 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2561 break;
2562 case mem_stack_f:
2563 case mem_stack_v:
2564 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2565 ptr->r.record.p.size);
2566 break;
2567 case psp_gr:
2568 case rp_gr:
2569 case pfs_gr:
2570 case preds_gr:
2571 case unat_gr:
2572 case lc_gr:
2573 case fpsr_gr:
2574 case priunat_gr:
2575 case bsp_gr:
2576 case bspstore_gr:
2577 case rnat_gr:
ba825241 2578 output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr);
542d6675
KH		 2579 break;
2580 case rp_br:
ba825241 2581 output_P3_format (f, rp_br, ptr->r.record.p.r.br);
542d6675
KH		 2582 break;
2583 case psp_sprel:
ba825241 2584 output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0);
542d6675
KH		 2585 break;
2586 case rp_when:
2587 case pfs_when:
2588 case preds_when:
2589 case unat_when:
2590 case lc_when:
2591 case fpsr_when:
2592 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2593 break;
2594 case rp_psprel:
2595 case pfs_psprel:
2596 case preds_psprel:
2597 case unat_psprel:
2598 case lc_psprel:
2599 case fpsr_psprel:
2600 case spill_base:
ba825241 2601 output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0);
542d6675
KH		 2602 break;
2603 case rp_sprel:
2604 case pfs_sprel:
2605 case preds_sprel:
2606 case unat_sprel:
2607 case lc_sprel:
2608 case fpsr_sprel:
2609 case priunat_sprel:
2610 case bsp_sprel:
2611 case bspstore_sprel:
2612 case rnat_sprel:
ba825241 2613 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp);
542d6675
KH		 2614 break;
2615 case gr_gr:
ba825241
JB		 2616 if (ptr->r.record.p.r.gr < REG_NUM)
2617 {
2618 const unw_rec_list *cur = ptr;
2619
2620 gr_mask = cur->r.record.p.grmask;
2621 while ((cur = cur->r.record.p.next) != NULL)
2622 gr_mask |= cur->r.record.p.grmask;
2623 output_P9_format (f, gr_mask, ptr->r.record.p.r.gr);
2624 }
542d6675
KH		 2625 break;
2626 case br_gr:
ba825241
JB		 2627 if (ptr->r.record.p.r.gr < REG_NUM)
2628 {
2629 const unw_rec_list *cur = ptr;
2630
2631 gr_mask = cur->r.record.p.brmask;
2632 while ((cur = cur->r.record.p.next) != NULL)
2633 gr_mask |= cur->r.record.p.brmask;
2634 output_P2_format (f, gr_mask, ptr->r.record.p.r.gr);
2635 }
542d6675
KH		 2636 break;
2637 case spill_mask:
2638 as_bad ("spill_mask record unimplemented.");
2639 break;
2640 case priunat_when_gr:
2641 case priunat_when_mem:
2642 case bsp_when:
2643 case bspstore_when:
2644 case rnat_when:
2645 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2646 break;
2647 case priunat_psprel:
2648 case bsp_psprel:
2649 case bspstore_psprel:
2650 case rnat_psprel:
ba825241 2651 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp);
542d6675
KH		 2652 break;
2653 case unwabi:
2654 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2655 break;
2656 case epilogue:
2657 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2658 break;
2659 case label_state:
2660 case copy_state:
2661 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2662 break;
2663 case spill_psprel:
2664 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2665 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2666 ptr->r.record.x.where.pspoff);
542d6675
KH		 2667 break;
2668 case spill_sprel:
2669 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2670 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2671 ptr->r.record.x.where.spoff);
542d6675
KH		 2672 break;
2673 case spill_reg:
2674 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2675 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
ba825241 2676 ptr->r.record.x.where.reg, ptr->r.record.x.t);
542d6675
KH		 2677 break;
2678 case spill_psprel_p:
2679 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2680 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2681 ptr->r.record.x.t, ptr->r.record.x.where.pspoff);
542d6675
KH		 2682 break;
2683 case spill_sprel_p:
2684 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2685 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2686 ptr->r.record.x.t, ptr->r.record.x.where.spoff);
542d6675
KH		 2687 break;
2688 case spill_reg_p:
2689 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2690 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
ba825241 2691 ptr->r.record.x.xy, ptr->r.record.x.where.reg,
542d6675
KH		 2692 ptr->r.record.x.t);
2693 break;
2694 default:
2695 as_bad ("record_type_not_valid");
2696 break;
800eeca4
JW		 2697 }
2698}
2699
197865e8 2700/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2701 the specified function. */
2702static void
2703process_unw_records (list, f)
2704 unw_rec_list *list;
2705 vbyte_func f;
2706{
2707 unw_rec_list *ptr;
2708 for (ptr = list; ptr; ptr = ptr->next)
2709 process_one_record (ptr, f);
2710}
2711
2712/* Determine the size of a record list in bytes. */
2713static int
2714calc_record_size (list)
2715 unw_rec_list *list;
2716{
2717 vbyte_count = 0;
2718 process_unw_records (list, count_output);
2719 return vbyte_count;
2720}
2721
e4e8248d
JB		 2722/* Return the number of bits set in the input value.
2723 Perhaps this has a better place... */
2724#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2725# define popcount __builtin_popcount
2726#else
2727static int
2728popcount (unsigned x)
2729{
2730 static const unsigned char popcnt[16] =
2731 {
2732 0, 1, 1, 2,
2733 1, 2, 2, 3,
2734 1, 2, 2, 3,
2735 2, 3, 3, 4
2736 };
2737
2738 if (x < NELEMS (popcnt))
2739 return popcnt[x];
2740 return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt));
2741}
2742#endif
2743
e0c9811a
JW		 2744/* Update IMASK bitmask to reflect the fact that one or more registers
2745 of type TYPE are saved starting at instruction with index T. If N
2746 bits are set in REGMASK, it is assumed that instructions T through
2747 T+N-1 save these registers.
2748
2749 TYPE values:
2750 0: no save
2751 1: instruction saves next fp reg
2752 2: instruction saves next general reg
2753 3: instruction saves next branch reg */
2754static void
2755set_imask (region, regmask, t, type)
2756 unw_rec_list *region;
2757 unsigned long regmask;
2758 unsigned long t;
2759 unsigned int type;
2760{
2761 unsigned char *imask;
2762 unsigned long imask_size;
2763 unsigned int i;
2764 int pos;
2765
2766 imask = region->r.record.r.mask.i;
2767 imask_size = region->r.record.r.imask_size;
2768 if (!imask)
2769 {
542d6675 2770 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2771 imask = xmalloc (imask_size);
2772 memset (imask, 0, imask_size);
2773
2774 region->r.record.r.imask_size = imask_size;
2775 region->r.record.r.mask.i = imask;
2776 }
2777
542d6675
KH		 2778 i = (t / 4) + 1;
2779 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2780 while (regmask)
2781 {
2782 if (i >= imask_size)
2783 {
2784 as_bad ("Ignoring attempt to spill beyond end of region");
2785 return;
2786 }
2787
2788 imask[i] |= (type & 0x3) << pos;
197865e8 2789
e0c9811a
JW		 2790 regmask &= (regmask - 1);
2791 pos -= 2;
2792 if (pos < 0)
2793 {
2794 pos = 0;
2795 ++i;
2796 }
2797 }
2798}
2799
f5a30c2e
JW		 2800/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2801 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2802 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2803 for frag sizes. */
f5a30c2e 2804
e0c9811a 2805unsigned long
b5e0fabd 2806slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2807 unsigned long slot_addr;
2808 fragS *slot_frag;
2809 unsigned long first_addr;
2810 fragS *first_frag;
b5e0fabd 2811 int before_relax;
e0c9811a 2812{
f5a30c2e
JW		 2813 unsigned long index = 0;
2814
2815 /* First time we are called, the initial address and frag are invalid. */
2816 if (first_addr == 0)
2817 return 0;
2818
2819 /* If the two addresses are in different frags, then we need to add in
2820 the remaining size of this frag, and then the entire size of intermediate
2821 frags. */
4dddc1d1 2822 while (slot_frag != first_frag)
f5a30c2e
JW		 2823 {
2824 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2825
b5e0fabd 2826 if (! before_relax)
73f20958 2827 {
b5e0fabd
JW		 2828 /* We can get the final addresses only during and after
2829 relaxation. */
73f20958
L		 2830 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2831 index += 3 * ((first_frag->fr_next->fr_address
2832 - first_frag->fr_address
2833 - first_frag->fr_fix) >> 4);
2834 }
2835 else
2836 /* We don't know what the final addresses will be. We try our
2837 best to estimate. */
2838 switch (first_frag->fr_type)
2839 {
2840 default:
2841 break;
2842
2843 case rs_space:
2844 as_fatal ("only constant space allocation is supported");
2845 break;
2846
2847 case rs_align:
2848 case rs_align_code:
2849 case rs_align_test:
2850 /* Take alignment into account. Assume the worst case
2851 before relaxation. */
2852 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2853 break;
2854
2855 case rs_org:
2856 if (first_frag->fr_symbol)
2857 {
2858 as_fatal ("only constant offsets are supported");
2859 break;
2860 }
2861 case rs_fill:
2862 index += 3 * (first_frag->fr_offset >> 4);
2863 break;
2864 }
2865
f5a30c2e
JW		 2866 /* Add in the full size of the frag converted to instruction slots. */
2867 index += 3 * (first_frag->fr_fix >> 4);
2868 /* Subtract away the initial part before first_addr. */
2869 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2870 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2871
f5a30c2e
JW		 2872 /* Move to the beginning of the next frag. */
2873 first_frag = first_frag->fr_next;
2874 first_addr = (unsigned long) &first_frag->fr_literal;
4dddc1d1
JW		 2875
2876 /* This can happen if there is section switching in the middle of a
2877 function, causing the frag chain for the function to be broken. */
2878 if (first_frag == NULL)
2879 {
2880 /* We get six warnings for one problem, because of the loop in
2881 fixup_unw_records, and because fixup_unw_records is called 3
2882 times: once before creating the variant frag, once to estimate
2883 its size, and once to relax it. This is unreasonable, so we use
2884 a static var to make sure we only emit the warning once. */
2885 static int warned = 0;
2886
2887 if (!warned)
2888 {
2889 as_warn ("Corrupted unwind info due to unsupported section switching");
2890 warned = 1;
2891 }
2892
2893 return index;
2894 }
f5a30c2e
JW		 2895 }
2896
2897 /* Add in the used part of the last frag. */
2898 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2899 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2900 return index;
2901}
4a1805b1 2902
91a2ae2a
RH		 2903/* Optimize unwind record directives. */
2904
2905static unw_rec_list *
2906optimize_unw_records (list)
2907 unw_rec_list *list;
2908{
2909 if (!list)
2910 return NULL;
2911
2912 /* If the only unwind record is ".prologue" or ".prologue" followed
2913 by ".body", then we can optimize the unwind directives away. */
2914 if (list->r.type == prologue
5738bc24
JW		 2915 && (list->next->r.type == endp
2916 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2917 return NULL;
2918
2919 return list;
2920}
2921
800eeca4
JW		 2922/* Given a complete record list, process any records which have
2923 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2924 this has been run, all necessary information should be available
800eeca4 2925 within each record to generate an image. */
542d6675 2926
800eeca4 2927static void
b5e0fabd 2928fixup_unw_records (list, before_relax)
800eeca4 2929 unw_rec_list *list;
b5e0fabd 2930 int before_relax;
800eeca4 2931{
e0c9811a
JW		 2932 unw_rec_list *ptr, *region = 0;
2933 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2934 fragS *first_frag = 0;
e0c9811a 2935
800eeca4
JW		 2936 for (ptr = list; ptr; ptr = ptr->next)
2937 {
2938 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2939 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2940 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2941 first_addr, first_frag, before_relax);
800eeca4
JW		 2942 switch (ptr->r.type)
2943 {
542d6675
KH		 2944 case prologue:
2945 case prologue_gr:
2946 case body:
2947 {
2948 unw_rec_list *last;
5738bc24
JW		 2949 int size;
2950 unsigned long last_addr = 0;
2951 fragS *last_frag = NULL;
542d6675
KH		 2952
2953 first_addr = ptr->slot_number;
f5a30c2e 2954 first_frag = ptr->slot_frag;
542d6675 2955 /* Find either the next body/prologue start, or the end of
5738bc24 2956 the function, and determine the size of the region. */
542d6675
KH		 2957 for (last = ptr->next; last != NULL; last = last->next)
2958 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2959 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2960 {
2961 last_addr = last->slot_number;
f5a30c2e 2962 last_frag = last->slot_frag;
542d6675
KH		 2963 break;
2964 }
b5e0fabd
JW		 2965 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2966 before_relax);
542d6675 2967 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2968 if (ptr->r.type == body)
2969 /* End of region. */
2970 region = 0;
2971 else
2972 region = ptr;
e0c9811a 2973 break;
542d6675
KH		 2974 }
2975 case epilogue:
ed7af9f9
L		 2976 if (t < rlen)
2977 ptr->r.record.b.t = rlen - 1 - t;
2978 else
2979 /* This happens when a memory-stack-less procedure uses a
2980 ".restore sp" directive at the end of a region to pop
2981 the frame state. */
2982 ptr->r.record.b.t = 0;
542d6675 2983 break;
e0c9811a 2984
542d6675
KH		 2985 case mem_stack_f:
2986 case mem_stack_v:
2987 case rp_when:
2988 case pfs_when:
2989 case preds_when:
2990 case unat_when:
2991 case lc_when:
2992 case fpsr_when:
2993 case priunat_when_gr:
2994 case priunat_when_mem:
2995 case bsp_when:
2996 case bspstore_when:
2997 case rnat_when:
2998 ptr->r.record.p.t = t;
2999 break;
e0c9811a 3000
542d6675
KH		 3001 case spill_reg:
3002 case spill_sprel:
3003 case spill_psprel:
3004 case spill_reg_p:
3005 case spill_sprel_p:
3006 case spill_psprel_p:
3007 ptr->r.record.x.t = t;
3008 break;
e0c9811a 3009
542d6675
KH		 3010 case frgr_mem:
3011 if (!region)
3012 {
75e09913 3013 as_bad ("frgr_mem record before region record!");
542d6675
KH		 3014 return;
3015 }
3016 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3017 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3018 set_imask (region, ptr->r.record.p.frmask, t, 1);
3019 set_imask (region, ptr->r.record.p.grmask, t, 2);
3020 break;
3021 case fr_mem:
3022 if (!region)
3023 {
75e09913 3024 as_bad ("fr_mem record before region record!");
542d6675
KH		 3025 return;
3026 }
ba825241
JB		 3027 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3028 set_imask (region, ptr->r.record.p.frmask, t, 1);
542d6675
KH		 3029 break;
3030 case gr_mem:
3031 if (!region)
3032 {
75e09913 3033 as_bad ("gr_mem record before region record!");
542d6675
KH		 3034 return;
3035 }
ba825241
JB		 3036 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3037 set_imask (region, ptr->r.record.p.grmask, t, 2);
542d6675
KH		 3038 break;
3039 case br_mem:
3040 if (!region)
3041 {
75e09913 3042 as_bad ("br_mem record before region record!");
542d6675
KH		 3043 return;
3044 }
3045 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
3046 set_imask (region, ptr->r.record.p.brmask, t, 3);
3047 break;
e0c9811a 3048
542d6675
KH		 3049 case gr_gr:
3050 if (!region)
3051 {
75e09913 3052 as_bad ("gr_gr record before region record!");
542d6675
KH		 3053 return;
3054 }
3055 set_imask (region, ptr->r.record.p.grmask, t, 2);
3056 break;
3057 case br_gr:
3058 if (!region)
3059 {
75e09913 3060 as_bad ("br_gr record before region record!");
542d6675
KH		 3061 return;
3062 }
3063 set_imask (region, ptr->r.record.p.brmask, t, 3);
3064 break;
e0c9811a 3065
542d6675
KH		 3066 default:
3067 break;
800eeca4
JW		 3068 }
3069 }
3070}
3071
b5e0fabd
JW		 3072/* Estimate the size of a frag before relaxing. We only have one type of frag
3073 to handle here, which is the unwind info frag. */
3074
3075int
3076ia64_estimate_size_before_relax (fragS *frag,
3077 asection *segtype ATTRIBUTE_UNUSED)
3078{
3079 unw_rec_list *list;
3080 int len, size, pad;
3081
3082 /* ??? This code is identical to the first part of ia64_convert_frag. */
3083 list = (unw_rec_list *) frag->fr_opcode;
3084 fixup_unw_records (list, 0);
3085
3086 len = calc_record_size (list);
3087 /* pad to pointer-size boundary. */
3088 pad = len % md.pointer_size;
3089 if (pad != 0)
3090 len += md.pointer_size - pad;
f7e323d5
JB		 3091 /* Add 8 for the header. */
3092 size = len + 8;
3093 /* Add a pointer for the personality offset. */
3094 if (frag->fr_offset)
3095 size += md.pointer_size;
b5e0fabd
JW		 3096
3097 /* fr_var carries the max_chars that we created the fragment with.
3098 We must, of course, have allocated enough memory earlier. */
3099 assert (frag->fr_var >= size);
3100
3101 return frag->fr_fix + size;
3102}
3103
73f20958
L		 3104/* This function converts a rs_machine_dependent variant frag into a
3105 normal fill frag with the unwind image from the the record list. */
3106void
3107ia64_convert_frag (fragS *frag)
557debba 3108{
73f20958
L		 3109 unw_rec_list *list;
3110 int len, size, pad;
1cd8ff38 3111 valueT flag_value;
557debba 3112
b5e0fabd 3113 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 3114 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 3115 fixup_unw_records (list, 0);
1cd8ff38 3116
73f20958
L		 3117 len = calc_record_size (list);
3118 /* pad to pointer-size boundary. */
3119 pad = len % md.pointer_size;
3120 if (pad != 0)
3121 len += md.pointer_size - pad;
f7e323d5
JB		 3122 /* Add 8 for the header. */
3123 size = len + 8;
3124 /* Add a pointer for the personality offset. */
3125 if (frag->fr_offset)
3126 size += md.pointer_size;
73f20958
L		 3127
3128 /* fr_var carries the max_chars that we created the fragment with.
3129 We must, of course, have allocated enough memory earlier. */
3130 assert (frag->fr_var >= size);
3131
3132 /* Initialize the header area. fr_offset is initialized with
3133 unwind.personality_routine. */
3134 if (frag->fr_offset)
1cd8ff38
NC		 3135 {
3136 if (md.flags & EF_IA_64_ABI64)
3137 flag_value = (bfd_vma) 3 << 32;
3138 else
3139 /* 32-bit unwind info block. */
3140 flag_value = (bfd_vma) 0x1003 << 32;
3141 }
3142 else
3143 flag_value = 0;
557debba 3144
73f20958
L		 3145 md_number_to_chars (frag->fr_literal,
3146 (((bfd_vma) 1 << 48) /* Version. */
3147 | flag_value /* U & E handler flags. */
3148 | (len / md.pointer_size)), /* Length. */
3149 8);
557debba 3150
73f20958
L		 3151 /* Skip the header. */
3152 vbyte_mem_ptr = frag->fr_literal + 8;
3153 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 3154
3155 /* Fill the padding bytes with zeros. */
3156 if (pad != 0)
3157 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
3158 md.pointer_size - pad);
3159
73f20958
L		 3160 frag->fr_fix += size;
3161 frag->fr_type = rs_fill;
3162 frag->fr_var = 0;
3163 frag->fr_offset = 0;
800eeca4
JW		 3164}
3165
e0c9811a 3166static int
e4e8248d
JB		 3167parse_predicate_and_operand (e, qp, po)
3168 expressionS * e;
3169 unsigned * qp;
3170 const char * po;
3171{
3172 int sep = parse_operand (e, ',');
3173
3174 *qp = e->X_add_number - REG_P;
3175 if (e->X_op != O_register || *qp > 63)
3176 {
3177 as_bad ("First operand to .%s must be a predicate", po);
3178 *qp = 0;
3179 }
3180 else if (*qp == 0)
3181 as_warn ("Pointless use of p0 as first operand to .%s", po);
3182 if (sep == ',')
3183 sep = parse_operand (e, ',');
3184 else
3185 e->X_op = O_absent;
3186 return sep;
3187}
3188
3189static void
3190convert_expr_to_ab_reg (e, ab, regp, po, n)
3191 const expressionS *e;
e0c9811a
JW		 3192 unsigned int *ab;
3193 unsigned int *regp;
e4e8248d
JB		 3194 const char * po;
3195 int n;
e0c9811a 3196{
e4e8248d
JB		 3197 unsigned int reg = e->X_add_number;
3198
3199 *ab = *regp = 0; /* Anything valid is good here. */
e0c9811a
JW		 3200
3201 if (e->X_op != O_register)
e4e8248d 3202 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3203
2434f565 3204 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 3205 {
3206 *ab = 0;
3207 *regp = reg - REG_GR;
3208 }
2434f565
JW		 3209 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3210 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 3211 {
3212 *ab = 1;
3213 *regp = reg - REG_FR;
3214 }
2434f565 3215 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 3216 {
3217 *ab = 2;
3218 *regp = reg - REG_BR;
3219 }
3220 else
3221 {
3222 *ab = 3;
3223 switch (reg)
3224 {
3225 case REG_PR: *regp = 0; break;
3226 case REG_PSP: *regp = 1; break;
3227 case REG_PRIUNAT: *regp = 2; break;
3228 case REG_BR + 0: *regp = 3; break;
3229 case REG_AR + AR_BSP: *regp = 4; break;
3230 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3231 case REG_AR + AR_RNAT: *regp = 6; break;
3232 case REG_AR + AR_UNAT: *regp = 7; break;
3233 case REG_AR + AR_FPSR: *regp = 8; break;
3234 case REG_AR + AR_PFS: *regp = 9; break;
3235 case REG_AR + AR_LC: *regp = 10; break;
3236
3237 default:
e4e8248d
JB		 3238 as_bad ("Operand %d to .%s must be a preserved register", n, po);
3239 break;
e0c9811a
JW		 3240 }
3241 }
197865e8 3242}
e0c9811a 3243
e4e8248d
JB		 3244static void
3245convert_expr_to_xy_reg (e, xy, regp, po, n)
3246 const expressionS *e;
e0c9811a
JW		 3247 unsigned int *xy;
3248 unsigned int *regp;
e4e8248d
JB		 3249 const char * po;
3250 int n;
e0c9811a 3251{
e4e8248d 3252 unsigned int reg = e->X_add_number;
e0c9811a 3253
e4e8248d 3254 *xy = *regp = 0; /* Anything valid is good here. */
e0c9811a 3255
e4e8248d
JB		 3256 if (e->X_op != O_register)
3257 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3258
e4e8248d 3259 if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127))
e0c9811a
JW		 3260 {
3261 *xy = 0;
3262 *regp = reg - REG_GR;
3263 }
e4e8248d 3264 else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127))
e0c9811a
JW		 3265 {
3266 *xy = 1;
3267 *regp = reg - REG_FR;
3268 }
2434f565 3269 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3270 {
3271 *xy = 2;
3272 *regp = reg - REG_BR;
3273 }
3274 else
e4e8248d 3275 as_bad ("Operand %d to .%s must be a writable register", n, po);
197865e8 3276}
e0c9811a 3277
d9201763
L		 3278static void
3279dot_align (int arg)
3280{
3281 /* The current frag is an alignment frag. */
3282 align_frag = frag_now;
3283 s_align_bytes (arg);
3284}
3285
800eeca4
JW		 3286static void
3287dot_radix (dummy)
2434f565 3288 int dummy ATTRIBUTE_UNUSED;
800eeca4 3289{
fa30c84f
JB		 3290 char *radix;
3291 int ch;
800eeca4
JW		 3292
3293 SKIP_WHITESPACE ();
800eeca4 3294
fa30c84f
JB		 3295 if (is_it_end_of_statement ())
3296 return;
3297 radix = input_line_pointer;
3298 ch = get_symbol_end ();
3299 ia64_canonicalize_symbol_name (radix);
3300 if (strcasecmp (radix, "C"))
3301 as_bad ("Radix `%s' unsupported or invalid", radix);
3302 *input_line_pointer = ch;
3303 demand_empty_rest_of_line ();
800eeca4
JW		 3304}
3305
196e8040
JW		 3306/* Helper function for .loc directives. If the assembler is not generating
3307 line number info, then we need to remember which instructions have a .loc
3308 directive, and only call dwarf2_gen_line_info for those instructions. */
3309
3310static void
3311dot_loc (int x)
3312{
3313 CURR_SLOT.loc_directive_seen = 1;
3314 dwarf2_directive_loc (x);
3315}
3316
800eeca4
JW		 3317/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3318static void
3319dot_special_section (which)
3320 int which;
3321{
3322 set_section ((char *) special_section_name[which]);
3323}
3324
07450571
L		 3325/* Return -1 for warning and 0 for error. */
3326
3327static int
970d6792
L		 3328unwind_diagnostic (const char * region, const char *directive)
3329{
3330 if (md.unwind_check == unwind_check_warning)
07450571
L		 3331 {
3332 as_warn (".%s outside of %s", directive, region);
3333 return -1;
3334 }
970d6792
L		 3335 else
3336 {
3337 as_bad (".%s outside of %s", directive, region);
3338 ignore_rest_of_line ();
07450571 3339 return 0;
970d6792
L		 3340 }
3341}
3342
07450571
L		 3343/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3344 a procedure but the unwind directive check is set to warning, 0 if
3345 a directive isn't in a procedure and the unwind directive check is set
3346 to error. */
3347
75e09913
JB		 3348static int
3349in_procedure (const char *directive)
3350{
5656b6b8 3351 if (unwind.proc_pending.sym
75e09913
JB		 3352 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3353 return 1;
07450571 3354 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3355}
3356
07450571
L		 3357/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3358 a prologue but the unwind directive check is set to warning, 0 if
3359 a directive isn't in a prologue and the unwind directive check is set
3360 to error. */
3361
75e09913
JB		 3362static int
3363in_prologue (const char *directive)
3364{
07450571 3365 int in = in_procedure (directive);
ba825241
JB		 3366
3367 if (in > 0 && !unwind.prologue)
3368 in = unwind_diagnostic ("prologue", directive);
3369 check_pending_save ();
3370 return in;
75e09913
JB		 3371}
3372
07450571
L		 3373/* Return 1 if a directive is in a body, -1 if a directive isn't in
3374 a body but the unwind directive check is set to warning, 0 if
3375 a directive isn't in a body and the unwind directive check is set
3376 to error. */
3377
75e09913
JB		 3378static int
3379in_body (const char *directive)
3380{
07450571 3381 int in = in_procedure (directive);
ba825241
JB		 3382
3383 if (in > 0 && !unwind.body)
3384 in = unwind_diagnostic ("body region", directive);
3385 return in;
75e09913
JB		 3386}
3387
800eeca4 3388static void
e4e8248d 3389add_unwind_entry (ptr, sep)
800eeca4 3390 unw_rec_list *ptr;
e4e8248d 3391 int sep;
800eeca4 3392{
e4e8248d
JB		 3393 if (ptr)
3394 {
3395 if (unwind.tail)
3396 unwind.tail->next = ptr;
3397 else
3398 unwind.list = ptr;
3399 unwind.tail = ptr;
3400
3401 /* The current entry can in fact be a chain of unwind entries. */
3402 if (unwind.current_entry == NULL)
3403 unwind.current_entry = ptr;
3404 }
800eeca4
JW		 3405
3406 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3407 if (unwind.current_entry == NULL)
3408 unwind.current_entry = ptr;
e4e8248d
JB		 3409
3410 if (sep == ',')
3411 {
3412 /* Parse a tag permitted for the current directive. */
3413 int ch;
3414
3415 SKIP_WHITESPACE ();
3416 ch = get_symbol_end ();
3417 /* FIXME: For now, just issue a warning that this isn't implemented. */
3418 {
3419 static int warned;
3420
3421 if (!warned)
3422 {
3423 warned = 1;
3424 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3425 }
3426 }
3427 *input_line_pointer = ch;
3428 }
3429 if (sep != NOT_A_CHAR)
3430 demand_empty_rest_of_line ();
800eeca4
JW		 3431}
3432
197865e8 3433static void
800eeca4 3434dot_fframe (dummy)
2434f565 3435 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3436{
3437 expressionS e;
e4e8248d 3438 int sep;
e0c9811a 3439
75e09913
JB		 3440 if (!in_prologue ("fframe"))
3441 return;
3442
e4e8248d 3443 sep = parse_operand (&e, ',');
197865e8 3444
800eeca4 3445 if (e.X_op != O_constant)
e4e8248d
JB		 3446 {
3447 as_bad ("First operand to .fframe must be a constant");
3448 e.X_add_number = 0;
3449 }
3450 add_unwind_entry (output_mem_stack_f (e.X_add_number), sep);
e0c9811a
JW		 3451}
3452
197865e8 3453static void
e0c9811a 3454dot_vframe (dummy)
2434f565 3455 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3456{
3457 expressionS e;
3458 unsigned reg;
e4e8248d 3459 int sep;
e0c9811a 3460
75e09913
JB		 3461 if (!in_prologue ("vframe"))
3462 return;
3463
e4e8248d 3464 sep = parse_operand (&e, ',');
e0c9811a 3465 reg = e.X_add_number - REG_GR;
e4e8248d 3466 if (e.X_op != O_register || reg > 127)
800eeca4 3467 {
e4e8248d
JB		 3468 as_bad ("First operand to .vframe must be a general register");
3469 reg = 0;
800eeca4 3470 }
e4e8248d
JB		 3471 add_unwind_entry (output_mem_stack_v (), sep);
3472 if (! (unwind.prologue_mask & 2))
3473 add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR);
3474 else if (reg != unwind.prologue_gr
3475 + (unsigned) popcount (unwind.prologue_mask & (-2 << 1)))
3476 as_warn ("Operand of .vframe contradicts .prologue");
800eeca4
JW		 3477}
3478
197865e8 3479static void
e4e8248d
JB		 3480dot_vframesp (psp)
3481 int psp;
800eeca4 3482{
e0c9811a 3483 expressionS e;
e4e8248d 3484 int sep;
e0c9811a 3485
e4e8248d
JB		 3486 if (psp)
3487 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
e0c9811a 3488
e4e8248d 3489 if (!in_prologue ("vframesp"))
75e09913
JB		 3490 return;
3491
e4e8248d
JB		 3492 sep = parse_operand (&e, ',');
3493 if (e.X_op != O_constant)
e0c9811a 3494 {
e4e8248d
JB		 3495 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3496 e.X_add_number = 0;
e0c9811a 3497 }
e4e8248d
JB		 3498 add_unwind_entry (output_mem_stack_v (), sep);
3499 add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR);
800eeca4
JW		 3500}
3501
197865e8 3502static void
800eeca4 3503dot_save (dummy)
2434f565 3504 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3505{
3506 expressionS e1, e2;
e4e8248d 3507 unsigned reg1, reg2;
800eeca4 3508 int sep;
800eeca4 3509
75e09913
JB		 3510 if (!in_prologue ("save"))
3511 return;
3512
e4e8248d
JB		 3513 sep = parse_operand (&e1, ',');
3514 if (sep == ',')
3515 sep = parse_operand (&e2, ',');
3516 else
3517 e2.X_op = O_absent;
800eeca4 3518
e0c9811a 3519 reg1 = e1.X_add_number;
800eeca4 3520 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3521 if (e1.X_op != O_register)
800eeca4 3522 {
e4e8248d
JB		 3523 as_bad ("First operand to .save not a register");
3524 reg1 = REG_PR; /* Anything valid is good here. */
3525 }
3526 reg2 = e2.X_add_number - REG_GR;
3527 if (e2.X_op != O_register || reg2 > 127)
3528 {
3529 as_bad ("Second operand to .save not a valid register");
3530 reg2 = 0;
3531 }
3532 switch (reg1)
3533 {
3534 case REG_AR + AR_BSP:
3535 add_unwind_entry (output_bsp_when (), sep);
3536 add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR);
3537 break;
3538 case REG_AR + AR_BSPSTORE:
3539 add_unwind_entry (output_bspstore_when (), sep);
3540 add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR);
3541 break;
3542 case REG_AR + AR_RNAT:
3543 add_unwind_entry (output_rnat_when (), sep);
3544 add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR);
3545 break;
3546 case REG_AR + AR_UNAT:
3547 add_unwind_entry (output_unat_when (), sep);
3548 add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR);
3549 break;
3550 case REG_AR + AR_FPSR:
3551 add_unwind_entry (output_fpsr_when (), sep);
3552 add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR);
3553 break;
3554 case REG_AR + AR_PFS:
3555 add_unwind_entry (output_pfs_when (), sep);
3556 if (! (unwind.prologue_mask & 4))
3557 add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR);
3558 else if (reg2 != unwind.prologue_gr
3559 + (unsigned) popcount (unwind.prologue_mask & (-4 << 1)))
3560 as_warn ("Second operand of .save contradicts .prologue");
3561 break;
3562 case REG_AR + AR_LC:
3563 add_unwind_entry (output_lc_when (), sep);
3564 add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR);
3565 break;
3566 case REG_BR:
3567 add_unwind_entry (output_rp_when (), sep);
3568 if (! (unwind.prologue_mask & 8))
3569 add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR);
3570 else if (reg2 != unwind.prologue_gr)
3571 as_warn ("Second operand of .save contradicts .prologue");
3572 break;
3573 case REG_PR:
3574 add_unwind_entry (output_preds_when (), sep);
3575 if (! (unwind.prologue_mask & 1))
3576 add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR);
3577 else if (reg2 != unwind.prologue_gr
3578 + (unsigned) popcount (unwind.prologue_mask & (-1 << 1)))
3579 as_warn ("Second operand of .save contradicts .prologue");
3580 break;
3581 case REG_PRIUNAT:
3582 add_unwind_entry (output_priunat_when_gr (), sep);
3583 add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR);
3584 break;
3585 default:
3586 as_bad ("First operand to .save not a valid register");
3587 add_unwind_entry (NULL, sep);
3588 break;
800eeca4 3589 }
800eeca4
JW		 3590}
3591
197865e8 3592static void
800eeca4 3593dot_restore (dummy)
2434f565 3594 int dummy ATTRIBUTE_UNUSED;
800eeca4 3595{
e4e8248d 3596 expressionS e1;
33d01f33 3597 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3598 int sep;
3599
75e09913
JB		 3600 if (!in_body ("restore"))
3601 return;
3602
e4e8248d 3603 sep = parse_operand (&e1, ',');
e0c9811a 3604 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
e4e8248d 3605 as_bad ("First operand to .restore must be stack pointer (sp)");
e0c9811a
JW		 3606
3607 if (sep == ',')
3608 {
e4e8248d
JB		 3609 expressionS e2;
3610
3611 sep = parse_operand (&e2, ',');
33d01f33 3612 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3613 {
33d01f33 3614 as_bad ("Second operand to .restore must be a constant >= 0");
e4e8248d 3615 e2.X_add_number = 0;
e0c9811a 3616 }
33d01f33 3617 ecount = e2.X_add_number;
e0c9811a 3618 }
33d01f33
JW		 3619 else
3620 ecount = unwind.prologue_count - 1;
6290819d
NC		 3621
3622 if (ecount >= unwind.prologue_count)
3623 {
3624 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3625 ecount + 1, unwind.prologue_count);
e4e8248d 3626 ecount = 0;
6290819d
NC		 3627 }
3628
e4e8248d 3629 add_unwind_entry (output_epilogue (ecount), sep);
33d01f33
JW		 3630
3631 if (ecount < unwind.prologue_count)
3632 unwind.prologue_count -= ecount + 1;
3633 else
3634 unwind.prologue_count = 0;
e0c9811a
JW		 3635}
3636
197865e8 3637static void
e4e8248d
JB		 3638dot_restorereg (pred)
3639 int pred;
e0c9811a
JW		 3640{
3641 unsigned int qp, ab, reg;
e4e8248d 3642 expressionS e;
e0c9811a 3643 int sep;
e4e8248d 3644 const char * const po = pred ? "restorereg.p" : "restorereg";
e0c9811a 3645
e4e8248d 3646 if (!in_procedure (po))
75e09913
JB		 3647 return;
3648
e4e8248d
JB		 3649 if (pred)
3650 sep = parse_predicate_and_operand (&e, &qp, po);
3651 else
e0c9811a 3652 {
e4e8248d
JB		 3653 sep = parse_operand (&e, ',');
3654 qp = 0;
e0c9811a 3655 }
e4e8248d 3656 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 3657
e4e8248d 3658 add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
800eeca4
JW		 3659}
3660
2d6ed997
L		 3661static char *special_linkonce_name[] =
3662 {
3663 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3664 };
3665
3666static void
da9f89d4 3667start_unwind_section (const segT text_seg, int sec_index)
2d6ed997
L		 3668{
3669 /*
3670 Use a slightly ugly scheme to derive the unwind section names from
3671 the text section name:
3672
3673 text sect. unwind table sect.
3674 name: name: comments:
3675 ---------- ----------------- --------------------------------
3676 .text .IA_64.unwind
3677 .text.foo .IA_64.unwind.text.foo
3678 .foo .IA_64.unwind.foo
3679 .gnu.linkonce.t.foo
3680 .gnu.linkonce.ia64unw.foo
3681 _info .IA_64.unwind_info gas issues error message (ditto)
3682 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3683
3684 This mapping is done so that:
3685
3686 (a) An object file with unwind info only in .text will use
3687 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3688 This follows the letter of the ABI and also ensures backwards
3689 compatibility with older toolchains.
3690
3691 (b) An object file with unwind info in multiple text sections
3692 will use separate unwind sections for each text section.
3693 This allows us to properly set the "sh_info" and "sh_link"
3694 fields in SHT_IA_64_UNWIND as required by the ABI and also
3695 lets GNU ld support programs with multiple segments
3696 containing unwind info (as might be the case for certain
3697 embedded applications).
3698
3699 (c) An error is issued if there would be a name clash.
3700 */
3701
3702 const char *text_name, *sec_text_name;
3703 char *sec_name;
3704 const char *prefix = special_section_name [sec_index];
3705 const char *suffix;
3706 size_t prefix_len, suffix_len, sec_name_len;
3707
3708 sec_text_name = segment_name (text_seg);
3709 text_name = sec_text_name;
3710 if (strncmp (text_name, "_info", 5) == 0)
3711 {
3712 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3713 text_name);
3714 ignore_rest_of_line ();
3715 return;
3716 }
3717 if (strcmp (text_name, ".text") == 0)
3718 text_name = "";
3719
3720 /* Build the unwind section name by appending the (possibly stripped)
3721 text section name to the unwind prefix. */
3722 suffix = text_name;
3723 if (strncmp (text_name, ".gnu.linkonce.t.",
3724 sizeof (".gnu.linkonce.t.") - 1) == 0)
3725 {
3726 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3727 suffix += sizeof (".gnu.linkonce.t.") - 1;
3728 }
3729
3730 prefix_len = strlen (prefix);
3731 suffix_len = strlen (suffix);
3732 sec_name_len = prefix_len + suffix_len;
3733 sec_name = alloca (sec_name_len + 1);
3734 memcpy (sec_name, prefix, prefix_len);
3735 memcpy (sec_name + prefix_len, suffix, suffix_len);
3736 sec_name [sec_name_len] = '\0';
3737
3738 /* Handle COMDAT group. */
6e3f953d
L		 3739 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3740 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
2d6ed997
L		 3741 {
3742 char *section;
3743 size_t len, group_name_len;
3744 const char *group_name = elf_group_name (text_seg);
3745
3746 if (group_name == NULL)
3747 {
3748 as_bad ("Group section `%s' has no group signature",
3749 sec_text_name);
3750 ignore_rest_of_line ();
3751 return;
3752 }
3753 /* We have to construct a fake section directive. */
3754 group_name_len = strlen (group_name);
3755 len = (sec_name_len
3756 + 16 /* ,"aG",@progbits, */
3757 + group_name_len /* ,group_name */
3758 + 7); /* ,comdat */
3759
3760 section = alloca (len + 1);
3761 memcpy (section, sec_name, sec_name_len);
3762 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3763 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3764 memcpy (section + len - 7, ",comdat", 7);
3765 section [len] = '\0';
3766 set_section (section);
3767 }
3768 else
3769 {
3770 set_section (sec_name);
3771 bfd_set_section_flags (stdoutput, now_seg,
3772 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3773 }
38ce5b11
L		 3774
3775 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3776}
3777
73f20958 3778static void
2d6ed997 3779generate_unwind_image (const segT text_seg)
800eeca4 3780{
73f20958
L		 3781 int size, pad;
3782 unw_rec_list *list;
800eeca4 3783
c97b7ef6
JW		 3784 /* Mark the end of the unwind info, so that we can compute the size of the
3785 last unwind region. */
e4e8248d 3786 add_unwind_entry (output_endp (), NOT_A_CHAR);
c97b7ef6 3787
10850f29
JW		 3788 /* Force out pending instructions, to make sure all unwind records have
3789 a valid slot_number field. */
3790 ia64_flush_insns ();
3791
800eeca4 3792 /* Generate the unwind record. */
73f20958 3793 list = optimize_unw_records (unwind.list);
b5e0fabd 3794 fixup_unw_records (list, 1);
73f20958
L		 3795 size = calc_record_size (list);
3796
3797 if (size > 0 || unwind.force_unwind_entry)
3798 {
3799 unwind.force_unwind_entry = 0;
3800 /* pad to pointer-size boundary. */
3801 pad = size % md.pointer_size;
3802 if (pad != 0)
3803 size += md.pointer_size - pad;
f7e323d5
JB		 3804 /* Add 8 for the header. */
3805 size += 8;
3806 /* Add a pointer for the personality offset. */
3807 if (unwind.personality_routine)
3808 size += md.pointer_size;
73f20958 3809 }
6290819d 3810
800eeca4
JW		 3811 /* If there are unwind records, switch sections, and output the info. */
3812 if (size != 0)
3813 {
800eeca4 3814 expressionS exp;
1cd8ff38 3815 bfd_reloc_code_real_type reloc;
91a2ae2a 3816
da9f89d4 3817 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3818
557debba
JW		 3819 /* Make sure the section has 4 byte alignment for ILP32 and
3820 8 byte alignment for LP64. */
3821 frag_align (md.pointer_size_shift, 0, 0);
3822 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3823
800eeca4 3824 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3825 unwind.info = expr_build_dot ();
73f20958
L		 3826
3827 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3828 (offsetT) (long) unwind.personality_routine,
3829 (char *) list);
91a2ae2a 3830
800eeca4 3831 /* Add the personality address to the image. */
e0c9811a 3832 if (unwind.personality_routine != 0)
542d6675 3833 {
40449e9f 3834 exp.X_op = O_symbol;
e0c9811a 3835 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3836 exp.X_add_number = 0;
1cd8ff38
NC		 3837
3838 if (md.flags & EF_IA_64_BE)
3839 {
3840 if (md.flags & EF_IA_64_ABI64)
3841 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3842 else
3843 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3844 }
40449e9f 3845 else
1cd8ff38
NC		 3846 {
3847 if (md.flags & EF_IA_64_ABI64)
3848 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3849 else
3850 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3851 }
3852
3853 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3854 md.pointer_size, &exp, 0, reloc);
e0c9811a 3855 unwind.personality_routine = 0;
542d6675 3856 }
800eeca4
JW		 3857 }
3858
6290819d 3859 free_saved_prologue_counts ();
e0c9811a 3860 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3861}
3862
197865e8 3863static void
542d6675 3864dot_handlerdata (dummy)
2434f565 3865 int dummy ATTRIBUTE_UNUSED;
800eeca4 3866{
75e09913
JB		 3867 if (!in_procedure ("handlerdata"))
3868 return;
91a2ae2a
RH		 3869 unwind.force_unwind_entry = 1;
3870
3871 /* Remember which segment we're in so we can switch back after .endp */
3872 unwind.saved_text_seg = now_seg;
3873 unwind.saved_text_subseg = now_subseg;
3874
3875 /* Generate unwind info into unwind-info section and then leave that
3876 section as the currently active one so dataXX directives go into
3877 the language specific data area of the unwind info block. */
2d6ed997 3878 generate_unwind_image (now_seg);
e0c9811a 3879 demand_empty_rest_of_line ();
800eeca4
JW		 3880}
3881
197865e8 3882static void
800eeca4 3883dot_unwentry (dummy)
2434f565 3884 int dummy ATTRIBUTE_UNUSED;
800eeca4 3885{
75e09913
JB		 3886 if (!in_procedure ("unwentry"))
3887 return;
91a2ae2a 3888 unwind.force_unwind_entry = 1;
e0c9811a 3889 demand_empty_rest_of_line ();
800eeca4
JW		 3890}
3891
197865e8 3892static void
800eeca4 3893dot_altrp (dummy)
2434f565 3894 int dummy ATTRIBUTE_UNUSED;
800eeca4 3895{
e0c9811a
JW		 3896 expressionS e;
3897 unsigned reg;
3898
75e09913
JB		 3899 if (!in_prologue ("altrp"))
3900 return;
3901
e4e8248d 3902 parse_operand (&e, 0);
e0c9811a 3903 reg = e.X_add_number - REG_BR;
e4e8248d
JB		 3904 if (e.X_op != O_register || reg > 7)
3905 {
3906 as_bad ("First operand to .altrp not a valid branch register");
3907 reg = 0;
3908 }
3909 add_unwind_entry (output_rp_br (reg), 0);
800eeca4
JW		 3910}
3911
197865e8 3912static void
e0c9811a
JW		 3913dot_savemem (psprel)
3914 int psprel;
800eeca4
JW		 3915{
3916 expressionS e1, e2;
3917 int sep;
3918 int reg1, val;
e4e8248d 3919 const char * const po = psprel ? "savepsp" : "savesp";
800eeca4 3920
e4e8248d 3921 if (!in_prologue (po))
75e09913
JB		 3922 return;
3923
e4e8248d
JB		 3924 sep = parse_operand (&e1, ',');
3925 if (sep == ',')
3926 sep = parse_operand (&e2, ',');
3927 else
3928 e2.X_op = O_absent;
800eeca4 3929
e0c9811a 3930 reg1 = e1.X_add_number;
800eeca4 3931 val = e2.X_add_number;
197865e8 3932
800eeca4 3933 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3934 if (e1.X_op != O_register)
800eeca4 3935 {
e4e8248d
JB		 3936 as_bad ("First operand to .%s not a register", po);
3937 reg1 = REG_PR; /* Anything valid is good here. */
3938 }
3939 if (e2.X_op != O_constant)
3940 {
3941 as_bad ("Second operand to .%s not a constant", po);
3942 val = 0;
3943 }
3944
3945 switch (reg1)
3946 {
3947 case REG_AR + AR_BSP:
3948 add_unwind_entry (output_bsp_when (), sep);
3949 add_unwind_entry ((psprel
3950 ? output_bsp_psprel
3951 : output_bsp_sprel) (val), NOT_A_CHAR);
3952 break;
3953 case REG_AR + AR_BSPSTORE:
3954 add_unwind_entry (output_bspstore_when (), sep);
3955 add_unwind_entry ((psprel
3956 ? output_bspstore_psprel
3957 : output_bspstore_sprel) (val), NOT_A_CHAR);
3958 break;
3959 case REG_AR + AR_RNAT:
3960 add_unwind_entry (output_rnat_when (), sep);
3961 add_unwind_entry ((psprel
3962 ? output_rnat_psprel
3963 : output_rnat_sprel) (val), NOT_A_CHAR);
3964 break;
3965 case REG_AR + AR_UNAT:
3966 add_unwind_entry (output_unat_when (), sep);
3967 add_unwind_entry ((psprel
3968 ? output_unat_psprel
3969 : output_unat_sprel) (val), NOT_A_CHAR);
3970 break;
3971 case REG_AR + AR_FPSR:
3972 add_unwind_entry (output_fpsr_when (), sep);
3973 add_unwind_entry ((psprel
3974 ? output_fpsr_psprel
3975 : output_fpsr_sprel) (val), NOT_A_CHAR);
3976 break;
3977 case REG_AR + AR_PFS:
3978 add_unwind_entry (output_pfs_when (), sep);
3979 add_unwind_entry ((psprel
3980 ? output_pfs_psprel
3981 : output_pfs_sprel) (val), NOT_A_CHAR);
3982 break;
3983 case REG_AR + AR_LC:
3984 add_unwind_entry (output_lc_when (), sep);
3985 add_unwind_entry ((psprel
3986 ? output_lc_psprel
3987 : output_lc_sprel) (val), NOT_A_CHAR);
3988 break;
3989 case REG_BR:
3990 add_unwind_entry (output_rp_when (), sep);
3991 add_unwind_entry ((psprel
3992 ? output_rp_psprel
3993 : output_rp_sprel) (val), NOT_A_CHAR);
3994 break;
3995 case REG_PR:
3996 add_unwind_entry (output_preds_when (), sep);
3997 add_unwind_entry ((psprel
3998 ? output_preds_psprel
3999 : output_preds_sprel) (val), NOT_A_CHAR);
4000 break;
4001 case REG_PRIUNAT:
4002 add_unwind_entry (output_priunat_when_mem (), sep);
4003 add_unwind_entry ((psprel
4004 ? output_priunat_psprel
4005 : output_priunat_sprel) (val), NOT_A_CHAR);
4006 break;
4007 default:
4008 as_bad ("First operand to .%s not a valid register", po);
4009 add_unwind_entry (NULL, sep);
4010 break;
800eeca4 4011 }
800eeca4
JW		 4012}
4013
197865e8 4014static void
800eeca4 4015dot_saveg (dummy)
2434f565 4016 int dummy ATTRIBUTE_UNUSED;
800eeca4 4017{
e4e8248d
JB		 4018 expressionS e;
4019 unsigned grmask;
800eeca4 4020 int sep;
75e09913
JB		 4021
4022 if (!in_prologue ("save.g"))
4023 return;
4024
e4e8248d 4025 sep = parse_operand (&e, ',');
197865e8 4026
e4e8248d
JB		 4027 grmask = e.X_add_number;
4028 if (e.X_op != O_constant
4029 || e.X_add_number <= 0
4030 || e.X_add_number > 0xf)
800eeca4 4031 {
e4e8248d
JB		 4032 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4033 grmask = 0;
4034 }
4035
4036 if (sep == ',')
4037 {
4038 unsigned reg;
4039 int n = popcount (grmask);
4040
4041 parse_operand (&e, 0);
4042 reg = e.X_add_number - REG_GR;
4043 if (e.X_op != O_register || reg > 127)
542d6675 4044 {
e4e8248d
JB		 4045 as_bad ("Second operand to .save.g must be a general register");
4046 reg = 0;
4047 }
4048 else if (reg > 128U - n)
4049 {
4050 as_bad ("Second operand to .save.g must be the first of %d general registers", n);
4051 reg = 0;
800eeca4 4052 }
e4e8248d 4053 add_unwind_entry (output_gr_gr (grmask, reg), 0);
800eeca4 4054 }
e4e8248d
JB		 4055 else
4056 add_unwind_entry (output_gr_mem (grmask), 0);
800eeca4
JW		 4057}
4058
197865e8 4059static void
800eeca4 4060dot_savef (dummy)
2434f565 4061 int dummy ATTRIBUTE_UNUSED;
800eeca4 4062{
e4e8248d 4063 expressionS e;
75e09913
JB		 4064
4065 if (!in_prologue ("save.f"))
4066 return;
4067
e4e8248d 4068 parse_operand (&e, 0);
197865e8 4069
e4e8248d
JB		 4070 if (e.X_op != O_constant
4071 || e.X_add_number <= 0
4072 || e.X_add_number > 0xfffff)
4073 {
4074 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4075 e.X_add_number = 0;
4076 }
4077 add_unwind_entry (output_fr_mem (e.X_add_number), 0);
800eeca4
JW		 4078}
4079
197865e8 4080static void
800eeca4 4081dot_saveb (dummy)
2434f565 4082 int dummy ATTRIBUTE_UNUSED;
800eeca4 4083{
e4e8248d
JB		 4084 expressionS e;
4085 unsigned brmask;
4086 int sep;
e0c9811a 4087
75e09913
JB		 4088 if (!in_prologue ("save.b"))
4089 return;
4090
e4e8248d
JB		 4091 sep = parse_operand (&e, ',');
4092
4093 brmask = e.X_add_number;
4094 if (e.X_op != O_constant
4095 || e.X_add_number <= 0
4096 || e.X_add_number > 0x1f)
800eeca4 4097 {
e4e8248d
JB		 4098 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4099 brmask = 0;
800eeca4 4100 }
e0c9811a
JW		 4101
4102 if (sep == ',')
4103 {
e4e8248d
JB		 4104 unsigned reg;
4105 int n = popcount (brmask);
4106
4107 parse_operand (&e, 0);
4108 reg = e.X_add_number - REG_GR;
4109 if (e.X_op != O_register || reg > 127)
e0c9811a 4110 {
e4e8248d
JB		 4111 as_bad ("Second operand to .save.b must be a general register");
4112 reg = 0;
e0c9811a 4113 }
e4e8248d
JB		 4114 else if (reg > 128U - n)
4115 {
4116 as_bad ("Second operand to .save.b must be the first of %d general registers", n);
4117 reg = 0;
4118 }
4119 add_unwind_entry (output_br_gr (brmask, reg), 0);
e0c9811a
JW		 4120 }
4121 else
e4e8248d 4122 add_unwind_entry (output_br_mem (brmask), 0);
800eeca4
JW		 4123}
4124
197865e8 4125static void
800eeca4 4126dot_savegf (dummy)
2434f565 4127 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4128{
4129 expressionS e1, e2;
75e09913
JB		 4130
4131 if (!in_prologue ("save.gf"))
4132 return;
4133
e4e8248d
JB		 4134 if (parse_operand (&e1, ',') == ',')
4135 parse_operand (&e2, 0);
800eeca4 4136 else
e4e8248d
JB		 4137 e2.X_op = O_absent;
4138
4139 if (e1.X_op != O_constant
4140 || e1.X_add_number < 0
4141 || e1.X_add_number > 0xf)
4142 {
4143 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4144 e1.X_op = O_absent;
4145 e1.X_add_number = 0;
4146 }
4147 if (e2.X_op != O_constant
4148 || e2.X_add_number < 0
4149 || e2.X_add_number > 0xfffff)
800eeca4 4150 {
e4e8248d
JB		 4151 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4152 e2.X_op = O_absent;
4153 e2.X_add_number = 0;
800eeca4 4154 }
e4e8248d
JB		 4155 if (e1.X_op == O_constant
4156 && e2.X_op == O_constant
4157 && e1.X_add_number == 0
4158 && e2.X_add_number == 0)
4159 as_bad ("Operands to .save.gf may not be both zero");
4160
4161 add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4162}
4163
197865e8 4164static void
800eeca4 4165dot_spill (dummy)
2434f565 4166 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4167{
4168 expressionS e;
e0c9811a 4169
75e09913
JB		 4170 if (!in_prologue ("spill"))
4171 return;
4172
e4e8248d 4173 parse_operand (&e, 0);
197865e8 4174
800eeca4 4175 if (e.X_op != O_constant)
800eeca4 4176 {
e4e8248d
JB		 4177 as_bad ("Operand to .spill must be a constant");
4178 e.X_add_number = 0;
e0c9811a 4179 }
e4e8248d 4180 add_unwind_entry (output_spill_base (e.X_add_number), 0);
e0c9811a
JW		 4181}
4182
4183static void
e4e8248d
JB		 4184dot_spillreg (pred)
4185 int pred;
e0c9811a 4186{
2132e3a3 4187 int sep;
e4e8248d
JB		 4188 unsigned int qp, ab, xy, reg, treg;
4189 expressionS e;
4190 const char * const po = pred ? "spillreg.p" : "spillreg";
e0c9811a 4191
e4e8248d 4192 if (!in_procedure (po))
75e09913
JB		 4193 return;
4194
e4e8248d
JB		 4195 if (pred)
4196 sep = parse_predicate_and_operand (&e, &qp, po);
e0c9811a 4197 else
e0c9811a 4198 {
e4e8248d
JB		 4199 sep = parse_operand (&e, ',');
4200 qp = 0;
e0c9811a 4201 }
e4e8248d 4202 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4203
e4e8248d
JB		 4204 if (sep == ',')
4205 sep = parse_operand (&e, ',');
4206 else
4207 e.X_op = O_absent;
4208 convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred);
e0c9811a 4209
e4e8248d 4210 add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep);
e0c9811a
JW		 4211}
4212
4213static void
e4e8248d 4214dot_spillmem (psprel)
e0c9811a
JW		 4215 int psprel;
4216{
e4e8248d
JB		 4217 expressionS e;
4218 int pred = (psprel < 0), sep;
4219 unsigned int qp, ab, reg;
4220 const char * po;
e0c9811a 4221
e4e8248d 4222 if (pred)
e0c9811a 4223 {
e4e8248d
JB		 4224 psprel = ~psprel;
4225 po = psprel ? "spillpsp.p" : "spillsp.p";
e0c9811a 4226 }
e4e8248d
JB		 4227 else
4228 po = psprel ? "spillpsp" : "spillsp";
e0c9811a 4229
e4e8248d
JB		 4230 if (!in_procedure (po))
4231 return;
e0c9811a 4232
e4e8248d
JB		 4233 if (pred)
4234 sep = parse_predicate_and_operand (&e, &qp, po);
4235 else
e0c9811a 4236 {
e4e8248d
JB		 4237 sep = parse_operand (&e, ',');
4238 qp = 0;
e0c9811a 4239 }
e4e8248d 4240 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4241
e4e8248d
JB		 4242 if (sep == ',')
4243 sep = parse_operand (&e, ',');
4244 else
4245 e.X_op = O_absent;
4246 if (e.X_op != O_constant)
e0c9811a 4247 {
e4e8248d
JB		 4248 as_bad ("Operand %d to .%s must be a constant", 2 + pred, po);
4249 e.X_add_number = 0;
e0c9811a
JW		 4250 }
4251
4252 if (psprel)
e4e8248d 4253 add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a 4254 else
e4e8248d 4255 add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a
JW		 4256}
4257
6290819d
NC		 4258static unsigned int
4259get_saved_prologue_count (lbl)
4260 unsigned long lbl;
4261{
4262 label_prologue_count *lpc = unwind.saved_prologue_counts;
4263
4264 while (lpc != NULL && lpc->label_number != lbl)
4265 lpc = lpc->next;
4266
4267 if (lpc != NULL)
4268 return lpc->prologue_count;
4269
4270 as_bad ("Missing .label_state %ld", lbl);
4271 return 1;
4272}
4273
4274static void
4275save_prologue_count (lbl, count)
4276 unsigned long lbl;
4277 unsigned int count;
4278{
4279 label_prologue_count *lpc = unwind.saved_prologue_counts;
4280
4281 while (lpc != NULL && lpc->label_number != lbl)
4282 lpc = lpc->next;
4283
4284 if (lpc != NULL)
4285 lpc->prologue_count = count;
4286 else
4287 {
40449e9f 4288 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4289
4290 new_lpc->next = unwind.saved_prologue_counts;
4291 new_lpc->label_number = lbl;
4292 new_lpc->prologue_count = count;
4293 unwind.saved_prologue_counts = new_lpc;
4294 }
4295}
4296
4297static void
4298free_saved_prologue_counts ()
4299{
40449e9f
KH		 4300 label_prologue_count *lpc = unwind.saved_prologue_counts;
4301 label_prologue_count *next;
6290819d
NC		 4302
4303 while (lpc != NULL)
4304 {
4305 next = lpc->next;
4306 free (lpc);
4307 lpc = next;
4308 }
4309
4310 unwind.saved_prologue_counts = NULL;
4311}
4312
e0c9811a
JW		 4313static void
4314dot_label_state (dummy)
2434f565 4315 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4316{
4317 expressionS e;
4318
75e09913
JB		 4319 if (!in_body ("label_state"))
4320 return;
4321
e4e8248d
JB		 4322 parse_operand (&e, 0);
4323 if (e.X_op == O_constant)
4324 save_prologue_count (e.X_add_number, unwind.prologue_count);
4325 else
e0c9811a
JW		 4326 {
4327 as_bad ("Operand to .label_state must be a constant");
e4e8248d 4328 e.X_add_number = 0;
e0c9811a 4329 }
e4e8248d 4330 add_unwind_entry (output_label_state (e.X_add_number), 0);
e0c9811a
JW		 4331}
4332
4333static void
4334dot_copy_state (dummy)
2434f565 4335 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4336{
4337 expressionS e;
4338
75e09913
JB		 4339 if (!in_body ("copy_state"))
4340 return;
4341
e4e8248d
JB		 4342 parse_operand (&e, 0);
4343 if (e.X_op == O_constant)
4344 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4345 else
e0c9811a
JW		 4346 {
4347 as_bad ("Operand to .copy_state must be a constant");
e4e8248d 4348 e.X_add_number = 0;
e0c9811a 4349 }
e4e8248d 4350 add_unwind_entry (output_copy_state (e.X_add_number), 0);
800eeca4
JW		 4351}
4352
197865e8 4353static void
800eeca4 4354dot_unwabi (dummy)
2434f565 4355 int dummy ATTRIBUTE_UNUSED;
800eeca4 4356{
e0c9811a
JW		 4357 expressionS e1, e2;
4358 unsigned char sep;
4359
e4e8248d 4360 if (!in_prologue ("unwabi"))
75e09913
JB		 4361 return;
4362
e4e8248d
JB		 4363 sep = parse_operand (&e1, ',');
4364 if (sep == ',')
4365 parse_operand (&e2, 0);
4366 else
4367 e2.X_op = O_absent;
e0c9811a
JW		 4368
4369 if (e1.X_op != O_constant)
4370 {
4371 as_bad ("First operand to .unwabi must be a constant");
e4e8248d 4372 e1.X_add_number = 0;
e0c9811a
JW		 4373 }
4374
4375 if (e2.X_op != O_constant)
4376 {
4377 as_bad ("Second operand to .unwabi must be a constant");
e4e8248d 4378 e2.X_add_number = 0;
e0c9811a
JW		 4379 }
4380
e4e8248d 4381 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4382}
4383
197865e8 4384static void
800eeca4 4385dot_personality (dummy)
2434f565 4386 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4387{
4388 char *name, *p, c;
75e09913
JB		 4389 if (!in_procedure ("personality"))
4390 return;
800eeca4
JW		 4391 SKIP_WHITESPACE ();
4392 name = input_line_pointer;
4393 c = get_symbol_end ();
4394 p = input_line_pointer;
e0c9811a 4395 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4396 unwind.force_unwind_entry = 1;
800eeca4
JW		 4397 *p = c;
4398 SKIP_WHITESPACE ();
4399 demand_empty_rest_of_line ();
4400}
4401
4402static void
4403dot_proc (dummy)
2434f565 4404 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4405{
4406 char *name, *p, c;
4407 symbolS *sym;
5656b6b8
JB		 4408 proc_pending *pending, *last_pending;
4409
4410 if (unwind.proc_pending.sym)
4411 {
4412 (md.unwind_check == unwind_check_warning
4413 ? as_warn
4414 : as_bad) ("Missing .endp after previous .proc");
4415 while (unwind.proc_pending.next)
4416 {
4417 pending = unwind.proc_pending.next;
4418 unwind.proc_pending.next = pending->next;
4419 free (pending);
4420 }
4421 }
4422 last_pending = NULL;
800eeca4 4423
e0c9811a 4424 /* Parse names of main and alternate entry points and mark them as
542d6675 4425 function symbols: */
800eeca4
JW		 4426 while (1)
4427 {
4428 SKIP_WHITESPACE ();
4429 name = input_line_pointer;
4430 c = get_symbol_end ();
4431 p = input_line_pointer;
75e09913
JB		 4432 if (!*name)
4433 as_bad ("Empty argument of .proc");
4434 else
542d6675 4435 {
75e09913
JB		 4436 sym = symbol_find_or_make (name);
4437 if (S_IS_DEFINED (sym))
4438 as_bad ("`%s' was already defined", name);
5656b6b8
JB		 4439 else if (!last_pending)
4440 {
4441 unwind.proc_pending.sym = sym;
4442 last_pending = &unwind.proc_pending;
4443 }
4444 else
75e09913 4445 {
5656b6b8
JB		 4446 pending = xmalloc (sizeof (*pending));
4447 pending->sym = sym;
4448 last_pending = last_pending->next = pending;
75e09913
JB		 4449 }
4450 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4451 }
800eeca4
JW		 4452 *p = c;
4453 SKIP_WHITESPACE ();
4454 if (*input_line_pointer != ',')
4455 break;
4456 ++input_line_pointer;
4457 }
5656b6b8
JB		 4458 if (!last_pending)
4459 {
4460 unwind.proc_pending.sym = expr_build_dot ();
4461 last_pending = &unwind.proc_pending;
4462 }
4463 last_pending->next = NULL;
800eeca4
JW		 4464 demand_empty_rest_of_line ();
4465 ia64_do_align (16);
4466
75e09913 4467 unwind.prologue = 0;
33d01f33 4468 unwind.prologue_count = 0;
75e09913
JB		 4469 unwind.body = 0;
4470 unwind.insn = 0;
e0c9811a
JW		 4471 unwind.list = unwind.tail = unwind.current_entry = NULL;
4472 unwind.personality_routine = 0;
800eeca4
JW		 4473}
4474
4475static void
4476dot_body (dummy)
2434f565 4477 int dummy ATTRIBUTE_UNUSED;
800eeca4 4478{
75e09913
JB		 4479 if (!in_procedure ("body"))
4480 return;
4481 if (!unwind.prologue && !unwind.body && unwind.insn)
4482 as_warn ("Initial .body should precede any instructions");
ba825241 4483 check_pending_save ();
75e09913 4484
e0c9811a 4485 unwind.prologue = 0;
30d25259 4486 unwind.prologue_mask = 0;
75e09913 4487 unwind.body = 1;
30d25259 4488
e4e8248d 4489 add_unwind_entry (output_body (), 0);
800eeca4
JW		 4490}
4491
4492static void
4493dot_prologue (dummy)
2434f565 4494 int dummy ATTRIBUTE_UNUSED;
800eeca4 4495{
e4e8248d 4496 unsigned mask = 0, grsave = 0;
e0c9811a 4497
75e09913
JB		 4498 if (!in_procedure ("prologue"))
4499 return;
4500 if (unwind.prologue)
4501 {
4502 as_bad (".prologue within prologue");
4503 ignore_rest_of_line ();
4504 return;
4505 }
4506 if (!unwind.body && unwind.insn)
4507 as_warn ("Initial .prologue should precede any instructions");
4508
e0c9811a 4509 if (!is_it_end_of_statement ())
800eeca4 4510 {
e4e8248d
JB		 4511 expressionS e;
4512 int n, sep = parse_operand (&e, ',');
30d25259 4513
e4e8248d
JB		 4514 if (e.X_op != O_constant
4515 || e.X_add_number < 0
4516 || e.X_add_number > 0xf)
4517 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4518 else if (e.X_add_number == 0)
4519 as_warn ("Pointless use of zero first operand to .prologue");
4520 else
4521 mask = e.X_add_number;
4522 n = popcount (mask);
30d25259 4523
e4e8248d
JB		 4524 if (sep == ',')
4525 parse_operand (&e, 0);
800eeca4 4526 else
e4e8248d
JB		 4527 e.X_op = O_absent;
4528 if (e.X_op == O_constant
4529 && e.X_add_number >= 0
4530 && e.X_add_number < 128)
4531 {
4532 if (md.unwind_check == unwind_check_error)
4533 as_warn ("Using a constant as second operand to .prologue is deprecated");
4534 grsave = e.X_add_number;
4535 }
4536 else if (e.X_op != O_register
4537 || (grsave = e.X_add_number - REG_GR) > 127)
4538 {
4539 as_bad ("Second operand to .prologue must be a general register");
4540 grsave = 0;
4541 }
4542 else if (grsave > 128U - n)
4543 {
4544 as_bad ("Second operand to .prologue must be the first of %d general registers", n);
4545 grsave = 0;
4546 }
4547
800eeca4 4548 }
e4e8248d
JB		 4549
4550 if (mask)
4551 add_unwind_entry (output_prologue_gr (mask, grsave), 0);
800eeca4 4552 else
e4e8248d 4553 add_unwind_entry (output_prologue (), 0);
30d25259
RH		 4554
4555 unwind.prologue = 1;
4556 unwind.prologue_mask = mask;
e4e8248d 4557 unwind.prologue_gr = grsave;
75e09913 4558 unwind.body = 0;
33d01f33 4559 ++unwind.prologue_count;
800eeca4
JW		 4560}
4561
4562static void
4563dot_endp (dummy)
2434f565 4564 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4565{
4566 expressionS e;
44f5c83a 4567 int bytes_per_address;
800eeca4
JW		 4568 long where;
4569 segT saved_seg;
4570 subsegT saved_subseg;
5656b6b8 4571 proc_pending *pending;
970d6792 4572 int unwind_check = md.unwind_check;
800eeca4 4573
970d6792 4574 md.unwind_check = unwind_check_error;
75e09913
JB		 4575 if (!in_procedure ("endp"))
4576 return;
970d6792 4577 md.unwind_check = unwind_check;
75e09913 4578
91a2ae2a
RH		 4579 if (unwind.saved_text_seg)
4580 {
4581 saved_seg = unwind.saved_text_seg;
4582 saved_subseg = unwind.saved_text_subseg;
4583 unwind.saved_text_seg = NULL;
4584 }
4585 else
4586 {
4587 saved_seg = now_seg;
4588 saved_subseg = now_subseg;
4589 }
4590
800eeca4 4591 insn_group_break (1, 0, 0);
800eeca4 4592
91a2ae2a
RH		 4593 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4594 if (!unwind.info)
2d6ed997 4595 generate_unwind_image (saved_seg);
800eeca4 4596
91a2ae2a
RH		 4597 if (unwind.info || unwind.force_unwind_entry)
4598 {
75e09913
JB		 4599 symbolS *proc_end;
4600
91a2ae2a 4601 subseg_set (md.last_text_seg, 0);
75e09913 4602 proc_end = expr_build_dot ();
5e7474a7 4603
da9f89d4 4604 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4605
557debba
JW		 4606 /* Make sure that section has 4 byte alignment for ILP32 and
4607 8 byte alignment for LP64. */
4608 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4609
557debba
JW		 4610 /* Need space for 3 pointers for procedure start, procedure end,
4611 and unwind info. */
6baf2b51 4612 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size);
557debba 4613 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4614 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4615
40449e9f 4616 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4617 e.X_op = O_pseudo_fixup;
4618 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4619 e.X_add_number = 0;
5656b6b8
JB		 4620 if (!S_IS_LOCAL (unwind.proc_pending.sym)
4621 && S_IS_DEFINED (unwind.proc_pending.sym))
4622 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym),
4623 S_GET_VALUE (unwind.proc_pending.sym),
4624 symbol_get_frag (unwind.proc_pending.sym));
4600db48 4625 else
5656b6b8 4626 e.X_add_symbol = unwind.proc_pending.sym;
91a2ae2a 4627 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4628
800eeca4
JW		 4629 e.X_op = O_pseudo_fixup;
4630 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4631 e.X_add_number = 0;
75e09913 4632 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4633 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4634 bytes_per_address, &e);
4635
4636 if (unwind.info)
4637 {
4638 e.X_op = O_pseudo_fixup;
4639 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4640 e.X_add_number = 0;
4641 e.X_add_symbol = unwind.info;
4642 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4643 bytes_per_address, &e);
4644 }
91a2ae2a 4645 }
800eeca4 4646 subseg_set (saved_seg, saved_subseg);
c538998c 4647
5656b6b8
JB		 4648 /* Set symbol sizes. */
4649 pending = &unwind.proc_pending;
4650 if (S_GET_NAME (pending->sym))
c538998c 4651 {
5656b6b8 4652 do
75e09913 4653 {
5656b6b8
JB		 4654 symbolS *sym = pending->sym;
4655
4656 if (!S_IS_DEFINED (sym))
4657 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym));
4658 else if (S_GET_SIZE (sym) == 0
4659 && symbol_get_obj (sym)->size == NULL)
75e09913 4660 {
75e09913
JB		 4661 fragS *frag = symbol_get_frag (sym);
4662
5656b6b8 4663 if (frag)
c538998c 4664 {
75e09913
JB		 4665 if (frag == frag_now && SEG_NORMAL (now_seg))
4666 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4667 else
4668 {
4669 symbol_get_obj (sym)->size =
4670 (expressionS *) xmalloc (sizeof (expressionS));
4671 symbol_get_obj (sym)->size->X_op = O_subtract;
4672 symbol_get_obj (sym)->size->X_add_symbol
4673 = symbol_new (FAKE_LABEL_NAME, now_seg,
4674 frag_now_fix (), frag_now);
4675 symbol_get_obj (sym)->size->X_op_symbol = sym;
4676 symbol_get_obj (sym)->size->X_add_number = 0;
4677 }
c538998c
JJ		 4678 }
4679 }
5656b6b8
JB		 4680 } while ((pending = pending->next) != NULL);
4681 }
4682
4683 /* Parse names of main and alternate entry points. */
4684 while (1)
4685 {
4686 char *name, *p, c;
4687
4688 SKIP_WHITESPACE ();
4689 name = input_line_pointer;
4690 c = get_symbol_end ();
4691 p = input_line_pointer;
4692 if (!*name)
4693 (md.unwind_check == unwind_check_warning
4694 ? as_warn
4695 : as_bad) ("Empty argument of .endp");
4696 else
4697 {
4698 symbolS *sym = symbol_find (name);
4699
4700 for (pending = &unwind.proc_pending; pending; pending = pending->next)
4701 {
4702 if (sym == pending->sym)
4703 {
4704 pending->sym = NULL;
4705 break;
4706 }
4707 }
4708 if (!sym || !pending)
4709 as_warn ("`%s' was not specified with previous .proc", name);
c538998c
JJ		 4710 }
4711 *p = c;
4712 SKIP_WHITESPACE ();
4713 if (*input_line_pointer != ',')
4714 break;
4715 ++input_line_pointer;
4716 }
4717 demand_empty_rest_of_line ();
5656b6b8
JB		 4718
4719 /* Deliberately only checking for the main entry point here; the
4720 language spec even says all arguments to .endp are ignored. */
4721 if (unwind.proc_pending.sym
4722 && S_GET_NAME (unwind.proc_pending.sym)
4723 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME))
4724 as_warn ("`%s' should be an operand to this .endp",
4725 S_GET_NAME (unwind.proc_pending.sym));
4726 while (unwind.proc_pending.next)
4727 {
4728 pending = unwind.proc_pending.next;
4729 unwind.proc_pending.next = pending->next;
4730 free (pending);
4731 }
4732 unwind.proc_pending.sym = unwind.info = NULL;
800eeca4
JW		 4733}
4734
4735static void
4736dot_template (template)
4737 int template;
4738{
4739 CURR_SLOT.user_template = template;
4740}
4741
4742static void
4743dot_regstk (dummy)
2434f565 4744 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4745{
4746 int ins, locs, outs, rots;
4747
4748 if (is_it_end_of_statement ())
4749 ins = locs = outs = rots = 0;
4750 else
4751 {
4752 ins = get_absolute_expression ();
4753 if (*input_line_pointer++ != ',')
4754 goto err;
4755 locs = get_absolute_expression ();
4756 if (*input_line_pointer++ != ',')
4757 goto err;
4758 outs = get_absolute_expression ();
4759 if (*input_line_pointer++ != ',')
4760 goto err;
4761 rots = get_absolute_expression ();
4762 }
4763 set_regstack (ins, locs, outs, rots);
4764 return;
4765
4766 err:
4767 as_bad ("Comma expected");
4768 ignore_rest_of_line ();
4769}
4770
4771static void
4772dot_rot (type)
4773 int type;
4774{
4775 unsigned num_regs, num_alloced = 0;
4776 struct dynreg **drpp, *dr;
4777 int ch, base_reg = 0;
4778 char *name, *start;
4779 size_t len;
4780
4781 switch (type)
4782 {
4783 case DYNREG_GR: base_reg = REG_GR + 32; break;
4784 case DYNREG_FR: base_reg = REG_FR + 32; break;
4785 case DYNREG_PR: base_reg = REG_P + 16; break;
4786 default: break;
4787 }
4788
542d6675 4789 /* First, remove existing names from hash table. */
800eeca4
JW		 4790 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4791 {
4792 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4793 /* FIXME: Free dr->name. */
800eeca4
JW		 4794 dr->num_regs = 0;
4795 }
4796
4797 drpp = &md.dynreg[type];
4798 while (1)
4799 {
4800 start = input_line_pointer;
4801 ch = get_symbol_end ();
20b36a95 4802 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4803 *input_line_pointer = ch;
800eeca4
JW		 4804
4805 SKIP_WHITESPACE ();
4806 if (*input_line_pointer != '[')
4807 {
4808 as_bad ("Expected '['");
4809 goto err;
4810 }
4811 ++input_line_pointer; /* skip '[' */
4812
4813 num_regs = get_absolute_expression ();
4814
4815 if (*input_line_pointer++ != ']')
4816 {
4817 as_bad ("Expected ']'");
4818 goto err;
4819 }
4820 SKIP_WHITESPACE ();
4821
4822 num_alloced += num_regs;
4823 switch (type)
4824 {
4825 case DYNREG_GR:
4826 if (num_alloced > md.rot.num_regs)
4827 {
4828 as_bad ("Used more than the declared %d rotating registers",
4829 md.rot.num_regs);
4830 goto err;
4831 }
4832 break;
4833 case DYNREG_FR:
4834 if (num_alloced > 96)
4835 {
4836 as_bad ("Used more than the available 96 rotating registers");
4837 goto err;
4838 }
4839 break;
4840 case DYNREG_PR:
4841 if (num_alloced > 48)
4842 {
4843 as_bad ("Used more than the available 48 rotating registers");
4844 goto err;
4845 }
4846 break;
4847
4848 default:
4849 break;
4850 }
4851
800eeca4
JW		 4852 if (!*drpp)
4853 {
4854 *drpp = obstack_alloc (&notes, sizeof (*dr));
4855 memset (*drpp, 0, sizeof (*dr));
4856 }
4857
20b36a95
JB		 4858 name = obstack_alloc (&notes, len + 1);
4859 memcpy (name, start, len);
4860 name[len] = '\0';
4861
800eeca4
JW		 4862 dr = *drpp;
4863 dr->name = name;
4864 dr->num_regs = num_regs;
4865 dr->base = base_reg;
4866 drpp = &dr->next;
4867 base_reg += num_regs;
4868
4869 if (hash_insert (md.dynreg_hash, name, dr))
4870 {
4871 as_bad ("Attempt to redefine register set `%s'", name);
20b36a95 4872 obstack_free (&notes, name);
800eeca4
JW		 4873 goto err;
4874 }
4875
4876 if (*input_line_pointer != ',')
4877 break;
4878 ++input_line_pointer; /* skip comma */
4879 SKIP_WHITESPACE ();
4880 }
4881 demand_empty_rest_of_line ();
4882 return;
4883
4884 err:
4885 ignore_rest_of_line ();
4886}
4887
4888static void
4889dot_byteorder (byteorder)
4890 int byteorder;
4891{
10a98291
L		 4892 segment_info_type *seginfo = seg_info (now_seg);
4893
4894 if (byteorder == -1)
4895 {
4896 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4897 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4898 byteorder = seginfo->tc_segment_info_data.endian == 1;
4899 }
4900 else
4901 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4902
4903 if (target_big_endian != byteorder)
4904 {
4905 target_big_endian = byteorder;
4906 if (target_big_endian)
4907 {
4908 ia64_number_to_chars = number_to_chars_bigendian;
4909 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4910 }
4911 else
4912 {
4913 ia64_number_to_chars = number_to_chars_littleendian;
4914 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4915 }
4916 }
800eeca4
JW		 4917}
4918
4919static void
4920dot_psr (dummy)
2434f565 4921 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4922{
4923 char *option;
4924 int ch;
4925
4926 while (1)
4927 {
4928 option = input_line_pointer;
4929 ch = get_symbol_end ();
4930 if (strcmp (option, "lsb") == 0)
4931 md.flags &= ~EF_IA_64_BE;
4932 else if (strcmp (option, "msb") == 0)
4933 md.flags |= EF_IA_64_BE;
4934 else if (strcmp (option, "abi32") == 0)
4935 md.flags &= ~EF_IA_64_ABI64;
4936 else if (strcmp (option, "abi64") == 0)
4937 md.flags |= EF_IA_64_ABI64;
4938 else
4939 as_bad ("Unknown psr option `%s'", option);
4940 *input_line_pointer = ch;
4941
4942 SKIP_WHITESPACE ();
4943 if (*input_line_pointer != ',')
4944 break;
4945
4946 ++input_line_pointer;
4947 SKIP_WHITESPACE ();
4948 }
4949 demand_empty_rest_of_line ();
4950}
4951
800eeca4
JW		 4952static void
4953dot_ln (dummy)
2434f565 4954 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4955{
4956 new_logical_line (0, get_absolute_expression ());
4957 demand_empty_rest_of_line ();
4958}
4959
ef6a2b41
JB		 4960static void
4961cross_section (ref, cons, ua)
4962 int ref;
4963 void (*cons) PARAMS((int));
4964 int ua;
800eeca4 4965{
ef6a2b41
JB		 4966 char *start, *end;
4967 int saved_auto_align;
4968 unsigned int section_count;
800eeca4
JW		 4969
4970 SKIP_WHITESPACE ();
ef6a2b41
JB		 4971 start = input_line_pointer;
4972 if (*start == '"')
4973 {
4974 int len;
4975 char *name;
4976
b3f19c14 4977 name = demand_copy_C_string (&len);
ef6a2b41
JB		 4978 obstack_free(&notes, name);
4979 if (!name)
4980 {
4981 ignore_rest_of_line ();
4982 return;
4983 }
4984 }
b3f19c14 4985 else
800eeca4 4986 {
b3f19c14
JB		 4987 char c = get_symbol_end ();
4988
4989 if (input_line_pointer == start)
4990 {
4991 as_bad ("Missing section name");
4992 ignore_rest_of_line ();
ef6a2b41 4993 return;
b3f19c14 4994 }
b3f19c14 4995 *input_line_pointer = c;
800eeca4 4996 }
ef6a2b41 4997 end = input_line_pointer;
800eeca4
JW		 4998 SKIP_WHITESPACE ();
4999 if (*input_line_pointer != ',')
5000 {
5001 as_bad ("Comma expected after section name");
5002 ignore_rest_of_line ();
ef6a2b41 5003 return;
800eeca4 5004 }
ef6a2b41
JB		 5005 *end = '\0';
5006 end = input_line_pointer + 1; /* skip comma */
5007 input_line_pointer = start;
5008 md.keep_pending_output = 1;
5009 section_count = bfd_count_sections(stdoutput);
5010 obj_elf_section (0);
5011 if (section_count != bfd_count_sections(stdoutput))
5012 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5013 input_line_pointer = end;
5014 saved_auto_align = md.auto_align;
5015 if (ua)
5016 md.auto_align = 0;
5017 (*cons) (ref);
5018 if (ua)
5019 md.auto_align = saved_auto_align;
5020 obj_elf_previous (0);
5021 md.keep_pending_output = 0;
800eeca4
JW		 5022}
5023
5024static void
5025dot_xdata (size)
5026 int size;
5027{
ef6a2b41 5028 cross_section (size, cons, 0);
800eeca4
JW		 5029}
5030
5031/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 5032
800eeca4
JW		 5033static void
5034stmt_float_cons (kind)
5035 int kind;
5036{
165a7f90 5037 size_t alignment;
800eeca4
JW		 5038
5039 switch (kind)
5040 {
165a7f90
L		 5041 case 'd':
5042 alignment = 8;
5043 break;
5044
5045 case 'x':
5046 case 'X':
5047 alignment = 16;
5048 break;
800eeca4
JW		 5049
5050 case 'f':
5051 default:
165a7f90 5052 alignment = 4;
800eeca4
JW		 5053 break;
5054 }
165a7f90 5055 ia64_do_align (alignment);
800eeca4
JW		 5056 float_cons (kind);
5057}
5058
5059static void
5060stmt_cons_ua (size)
5061 int size;
5062{
5063 int saved_auto_align = md.auto_align;
5064
5065 md.auto_align = 0;
5066 cons (size);
5067 md.auto_align = saved_auto_align;
5068}
5069
5070static void
5071dot_xfloat_cons (kind)
5072 int kind;
5073{
ef6a2b41 5074 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 5075}
5076
5077static void
5078dot_xstringer (zero)
5079 int zero;
5080{
ef6a2b41 5081 cross_section (zero, stringer, 0);
800eeca4
JW		 5082}
5083
5084static void
5085dot_xdata_ua (size)
5086 int size;
5087{
ef6a2b41 5088 cross_section (size, cons, 1);
800eeca4
JW		 5089}
5090
5091static void
5092dot_xfloat_cons_ua (kind)
5093 int kind;
5094{
ef6a2b41 5095 cross_section (kind, float_cons, 1);
800eeca4
JW		 5096}
5097
5098/* .reg.val <regname>,value */
542d6675 5099
800eeca4
JW		 5100static void
5101dot_reg_val (dummy)
2434f565 5102 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5103{
5104 expressionS reg;
5105
60d11e55 5106 expression_and_evaluate (&reg);
800eeca4
JW		 5107 if (reg.X_op != O_register)
5108 {
5109 as_bad (_("Register name expected"));
5110 ignore_rest_of_line ();
5111 }
5112 else if (*input_line_pointer++ != ',')
5113 {
5114 as_bad (_("Comma expected"));
5115 ignore_rest_of_line ();
5116 }
197865e8 5117 else
800eeca4
JW		 5118 {
5119 valueT value = get_absolute_expression ();
5120 int regno = reg.X_add_number;
a66d2bb7 5121 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 5122 as_warn (_("Register value annotation ignored"));
800eeca4 5123 else
542d6675
KH		 5124 {
5125 gr_values[regno - REG_GR].known = 1;
5126 gr_values[regno - REG_GR].value = value;
5127 gr_values[regno - REG_GR].path = md.path;
5128 }
800eeca4
JW		 5129 }
5130 demand_empty_rest_of_line ();
5131}
5132
5e819f9c
JW		 5133/*
5134 .serialize.data
5135 .serialize.instruction
5136 */
5137static void
5138dot_serialize (type)
5139 int type;
5140{
5141 insn_group_break (0, 0, 0);
5142 if (type)
5143 instruction_serialization ();
5144 else
5145 data_serialization ();
5146 insn_group_break (0, 0, 0);
5147 demand_empty_rest_of_line ();
5148}
5149
197865e8 5150/* select dv checking mode
800eeca4
JW		 5151 .auto
5152 .explicit
5153 .default
5154
197865e8 5155 A stop is inserted when changing modes
800eeca4 5156 */
542d6675 5157
800eeca4
JW		 5158static void
5159dot_dv_mode (type)
542d6675 5160 int type;
800eeca4
JW		 5161{
5162 if (md.manual_bundling)
5163 as_warn (_("Directive invalid within a bundle"));
5164
5165 if (type == 'E' || type == 'A')
5166 md.mode_explicitly_set = 0;
5167 else
5168 md.mode_explicitly_set = 1;
5169
5170 md.detect_dv = 1;
5171 switch (type)
5172 {
5173 case 'A':
5174 case 'a':
5175 if (md.explicit_mode)
542d6675 5176 insn_group_break (1, 0, 0);
800eeca4
JW		 5177 md.explicit_mode = 0;
5178 break;
5179 case 'E':
5180 case 'e':
5181 if (!md.explicit_mode)
542d6675 5182 insn_group_break (1, 0, 0);
800eeca4
JW		 5183 md.explicit_mode = 1;
5184 break;
5185 default:
5186 case 'd':
5187 if (md.explicit_mode != md.default_explicit_mode)
542d6675 5188 insn_group_break (1, 0, 0);
800eeca4
JW		 5189 md.explicit_mode = md.default_explicit_mode;
5190 md.mode_explicitly_set = 0;
5191 break;
5192 }
5193}
5194
5195static void
5196print_prmask (mask)
542d6675 5197 valueT mask;
800eeca4
JW		 5198{
5199 int regno;
5200 char *comma = "";
542d6675 5201 for (regno = 0; regno < 64; regno++)
800eeca4 5202 {
542d6675
KH		 5203 if (mask & ((valueT) 1 << regno))
5204 {
5205 fprintf (stderr, "%s p%d", comma, regno);
5206 comma = ",";
5207 }
800eeca4
JW		 5208 }
5209}
5210
5211/*
05ee4b0f
JB		 5212 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5213 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5214 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5215 .pred.safe_across_calls p1 [, p2 [,...]]
5216 */
542d6675 5217
800eeca4
JW		 5218static void
5219dot_pred_rel (type)
542d6675 5220 int type;
800eeca4
JW		 5221{
5222 valueT mask = 0;
5223 int count = 0;
5224 int p1 = -1, p2 = -1;
5225
5226 if (type == 0)
5227 {
05ee4b0f 5228 if (*input_line_pointer == '"')
542d6675
KH		 5229 {
5230 int len;
5231 char *form = demand_copy_C_string (&len);
05ee4b0f 5232
542d6675
KH		 5233 if (strcmp (form, "mutex") == 0)
5234 type = 'm';
5235 else if (strcmp (form, "clear") == 0)
5236 type = 'c';
5237 else if (strcmp (form, "imply") == 0)
5238 type = 'i';
05ee4b0f
JB		 5239 obstack_free (&notes, form);
5240 }
5241 else if (*input_line_pointer == '@')
5242 {
5243 char *form = ++input_line_pointer;
5244 char c = get_symbol_end();
5245
5246 if (strcmp (form, "mutex") == 0)
5247 type = 'm';
5248 else if (strcmp (form, "clear") == 0)
5249 type = 'c';
5250 else if (strcmp (form, "imply") == 0)
5251 type = 'i';
5252 *input_line_pointer = c;
5253 }
5254 else
5255 {
5256 as_bad (_("Missing predicate relation type"));
5257 ignore_rest_of_line ();
5258 return;
5259 }
5260 if (type == 0)
5261 {
5262 as_bad (_("Unrecognized predicate relation type"));
5263 ignore_rest_of_line ();
5264 return;
542d6675 5265 }
800eeca4 5266 if (*input_line_pointer == ',')
542d6675 5267 ++input_line_pointer;
800eeca4
JW		 5268 SKIP_WHITESPACE ();
5269 }
5270
5271 SKIP_WHITESPACE ();
5272 while (1)
5273 {
20b36a95 5274 valueT bits = 1;
800eeca4 5275 int regno;
20b36a95
JB		 5276 expressionS pr, *pr1, *pr2;
5277
60d11e55 5278 expression_and_evaluate (&pr);
20b36a95
JB		 5279 if (pr.X_op == O_register
5280 && pr.X_add_number >= REG_P
5281 && pr.X_add_number <= REG_P + 63)
5282 {
5283 regno = pr.X_add_number - REG_P;
5284 bits <<= regno;
5285 count++;
5286 if (p1 == -1)
5287 p1 = regno;
5288 else if (p2 == -1)
5289 p2 = regno;
5290 }
5291 else if (type != 'i'
5292 && pr.X_op == O_subtract
5293 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5294 && pr1->X_op == O_register
5295 && pr1->X_add_number >= REG_P
5296 && pr1->X_add_number <= REG_P + 63
5297 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5298 && pr2->X_op == O_register
5299 && pr2->X_add_number >= REG_P
5300 && pr2->X_add_number <= REG_P + 63)
5301 {
5302 /* It's a range. */
5303 int stop;
5304
5305 regno = pr1->X_add_number - REG_P;
5306 stop = pr2->X_add_number - REG_P;
5307 if (regno >= stop)
542d6675
KH		 5308 {
5309 as_bad (_("Bad register range"));
5310 ignore_rest_of_line ();
5311 return;
5312 }
20b36a95
JB		 5313 bits = ((bits << stop) << 1) - (bits << regno);
5314 count += stop - regno + 1;
5315 }
5316 else
5317 {
5318 as_bad (_("Predicate register expected"));
5319 ignore_rest_of_line ();
5320 return;
542d6675 5321 }
20b36a95
JB		 5322 if (mask & bits)
5323 as_warn (_("Duplicate predicate register ignored"));
5324 mask |= bits;
800eeca4 5325 if (*input_line_pointer != ',')
542d6675 5326 break;
800eeca4
JW		 5327 ++input_line_pointer;
5328 SKIP_WHITESPACE ();
5329 }
5330
5331 switch (type)
5332 {
5333 case 'c':
5334 if (count == 0)
542d6675 5335 mask = ~(valueT) 0;
800eeca4 5336 clear_qp_mutex (mask);
197865e8 5337 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5338 break;
5339 case 'i':
5340 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5341 as_bad (_("Predicate source and target required"));
800eeca4 5342 else if (p1 == 0 || p2 == 0)
542d6675 5343 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5344 else
542d6675 5345 add_qp_imply (p1, p2);
800eeca4
JW		 5346 break;
5347 case 'm':
5348 if (count < 2)
542d6675
KH		 5349 {
5350 as_bad (_("At least two PR arguments expected"));
5351 break;
5352 }
800eeca4 5353 else if (mask & 1)
542d6675
KH		 5354 {
5355 as_bad (_("Use of p0 is not valid in this context"));
5356 break;
5357 }
800eeca4
JW		 5358 add_qp_mutex (mask);
5359 break;
5360 case 's':
5361 /* note that we don't override any existing relations */
5362 if (count == 0)
542d6675
KH		 5363 {
5364 as_bad (_("At least one PR argument expected"));
5365 break;
5366 }
800eeca4 5367 if (md.debug_dv)
542d6675
KH		 5368 {
5369 fprintf (stderr, "Safe across calls: ");
5370 print_prmask (mask);
5371 fprintf (stderr, "\n");
5372 }
800eeca4
JW		 5373 qp_safe_across_calls = mask;
5374 break;
5375 }
5376 demand_empty_rest_of_line ();
5377}
5378
5379/* .entry label [, label [, ...]]
5380 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5381 Otherwise, only global labels are considered entry points. */
5382
800eeca4
JW		 5383static void
5384dot_entry (dummy)
2434f565 5385 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5386{
5387 const char *err;
5388 char *name;
5389 int c;
5390 symbolS *symbolP;
5391
5392 do
5393 {
5394 name = input_line_pointer;
5395 c = get_symbol_end ();
5396 symbolP = symbol_find_or_make (name);
5397
5398 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5399 if (err)
542d6675
KH		 5400 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5401 name, err);
800eeca4
JW		 5402
5403 *input_line_pointer = c;
5404 SKIP_WHITESPACE ();
5405 c = *input_line_pointer;
5406 if (c == ',')
5407 {
5408 input_line_pointer++;
5409 SKIP_WHITESPACE ();
5410 if (*input_line_pointer == '\n')
5411 c = '\n';
5412 }
5413 }
5414 while (c == ',');
5415
5416 demand_empty_rest_of_line ();
5417}
5418
197865e8 5419/* .mem.offset offset, base
542d6675
KH		 5420 "base" is used to distinguish between offsets from a different base. */
5421
800eeca4
JW		 5422static void
5423dot_mem_offset (dummy)
2434f565 5424 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5425{
5426 md.mem_offset.hint = 1;
5427 md.mem_offset.offset = get_absolute_expression ();
5428 if (*input_line_pointer != ',')
5429 {
5430 as_bad (_("Comma expected"));
5431 ignore_rest_of_line ();
5432 return;
5433 }
5434 ++input_line_pointer;
5435 md.mem_offset.base = get_absolute_expression ();
5436 demand_empty_rest_of_line ();
5437}
5438
542d6675 5439/* ia64-specific pseudo-ops: */
800eeca4
JW		 5440const pseudo_typeS md_pseudo_table[] =
5441 {
5442 { "radix", dot_radix, 0 },
5443 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5444 { "loc", dot_loc, 0 },
800eeca4
JW		 5445 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5446 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5447 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5448 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5449 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5450 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5451 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5452 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5453 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5454 { "proc", dot_proc, 0 },
5455 { "body", dot_body, 0 },
5456 { "prologue", dot_prologue, 0 },
2434f565 5457 { "endp", dot_endp, 0 },
2434f565
JW		 5458
5459 { "fframe", dot_fframe, 0 },
5460 { "vframe", dot_vframe, 0 },
5461 { "vframesp", dot_vframesp, 0 },
e4e8248d 5462 { "vframepsp", dot_vframesp, 1 },
2434f565
JW		 5463 { "save", dot_save, 0 },
5464 { "restore", dot_restore, 0 },
5465 { "restorereg", dot_restorereg, 0 },
e4e8248d 5466 { "restorereg.p", dot_restorereg, 1 },
2434f565
JW		 5467 { "handlerdata", dot_handlerdata, 0 },
5468 { "unwentry", dot_unwentry, 0 },
5469 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5470 { "savesp", dot_savemem, 0 },
5471 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5472 { "save.g", dot_saveg, 0 },
5473 { "save.f", dot_savef, 0 },
5474 { "save.b", dot_saveb, 0 },
5475 { "save.gf", dot_savegf, 0 },
5476 { "spill", dot_spill, 0 },
5477 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5478 { "spillsp", dot_spillmem, 0 },
5479 { "spillpsp", dot_spillmem, 1 },
e4e8248d
JB		 5480 { "spillreg.p", dot_spillreg, 1 },
5481 { "spillsp.p", dot_spillmem, ~0 },
5482 { "spillpsp.p", dot_spillmem, ~1 },
2434f565
JW		 5483 { "label_state", dot_label_state, 0 },
5484 { "copy_state", dot_copy_state, 0 },
5485 { "unwabi", dot_unwabi, 0 },
5486 { "personality", dot_personality, 0 },
800eeca4
JW		 5487 { "mii", dot_template, 0x0 },
5488 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5489 { "mlx", dot_template, 0x2 },
5490 { "mmi", dot_template, 0x4 },
5491 { "mfi", dot_template, 0x6 },
5492 { "mmf", dot_template, 0x7 },
5493 { "mib", dot_template, 0x8 },
5494 { "mbb", dot_template, 0x9 },
5495 { "bbb", dot_template, 0xb },
5496 { "mmb", dot_template, 0xc },
5497 { "mfb", dot_template, 0xe },
d9201763 5498 { "align", dot_align, 0 },
800eeca4
JW		 5499 { "regstk", dot_regstk, 0 },
5500 { "rotr", dot_rot, DYNREG_GR },
5501 { "rotf", dot_rot, DYNREG_FR },
5502 { "rotp", dot_rot, DYNREG_PR },
5503 { "lsb", dot_byteorder, 0 },
5504 { "msb", dot_byteorder, 1 },
5505 { "psr", dot_psr, 0 },
5506 { "alias", dot_alias, 0 },
35f5df7f 5507 { "secalias", dot_alias, 1 },
800eeca4
JW		 5508 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5509
5510 { "xdata1", dot_xdata, 1 },
5511 { "xdata2", dot_xdata, 2 },
5512 { "xdata4", dot_xdata, 4 },
5513 { "xdata8", dot_xdata, 8 },
b3f19c14 5514 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5515 { "xreal4", dot_xfloat_cons, 'f' },
5516 { "xreal8", dot_xfloat_cons, 'd' },
5517 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5518 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5519 { "xstring", dot_xstringer, 0 },
5520 { "xstringz", dot_xstringer, 1 },
5521
542d6675 5522 /* unaligned versions: */
800eeca4
JW		 5523 { "xdata2.ua", dot_xdata_ua, 2 },
5524 { "xdata4.ua", dot_xdata_ua, 4 },
5525 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5526 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5527 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5528 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5529 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5530 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5531
5532 /* annotations/DV checking support */
5533 { "entry", dot_entry, 0 },
2434f565 5534 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5535 { "pred.rel", dot_pred_rel, 0 },
5536 { "pred.rel.clear", dot_pred_rel, 'c' },
5537 { "pred.rel.imply", dot_pred_rel, 'i' },
5538 { "pred.rel.mutex", dot_pred_rel, 'm' },
5539 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5540 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5541 { "serialize.data", dot_serialize, 0 },
5542 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5543 { "auto", dot_dv_mode, 'a' },
5544 { "explicit", dot_dv_mode, 'e' },
5545 { "default", dot_dv_mode, 'd' },
5546
87885043
JW		 5547 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5548 IA-64 aligns data allocation pseudo-ops by default, so we have to
5549 tell it that these ones are supposed to be unaligned. Long term,
5550 should rewrite so that only IA-64 specific data allocation pseudo-ops
5551 are aligned by default. */
5552 {"2byte", stmt_cons_ua, 2},
5553 {"4byte", stmt_cons_ua, 4},
5554 {"8byte", stmt_cons_ua, 8},
5555
800eeca4
JW		 5556 { NULL, 0, 0 }
5557 };
5558
5559static const struct pseudo_opcode
5560 {
5561 const char *name;
5562 void (*handler) (int);
5563 int arg;
5564 }
5565pseudo_opcode[] =
5566 {
5567 /* these are more like pseudo-ops, but don't start with a dot */
5568 { "data1", cons, 1 },
5569 { "data2", cons, 2 },
5570 { "data4", cons, 4 },
5571 { "data8", cons, 8 },
3969b680 5572 { "data16", cons, 16 },
800eeca4
JW		 5573 { "real4", stmt_float_cons, 'f' },
5574 { "real8", stmt_float_cons, 'd' },
5575 { "real10", stmt_float_cons, 'x' },
165a7f90 5576 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5577 { "string", stringer, 0 },
5578 { "stringz", stringer, 1 },
5579
542d6675 5580 /* unaligned versions: */
800eeca4
JW		 5581 { "data2.ua", stmt_cons_ua, 2 },
5582 { "data4.ua", stmt_cons_ua, 4 },
5583 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5584 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5585 { "real4.ua", float_cons, 'f' },
5586 { "real8.ua", float_cons, 'd' },
5587 { "real10.ua", float_cons, 'x' },
165a7f90 5588 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5589 };
5590
5591/* Declare a register by creating a symbol for it and entering it in
5592 the symbol table. */
542d6675
KH		 5593
5594static symbolS *
800eeca4
JW		 5595declare_register (name, regnum)
5596 const char *name;
5597 int regnum;
5598{
5599 const char *err;
5600 symbolS *sym;
5601
5e0bd176 5602 sym = symbol_create (name, reg_section, regnum, &zero_address_frag);
800eeca4
JW		 5603
5604 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5605 if (err)
5606 as_fatal ("Inserting \"%s\" into register table failed: %s",
5607 name, err);
5608
5609 return sym;
5610}
5611
5612static void
5613declare_register_set (prefix, num_regs, base_regnum)
5614 const char *prefix;
5615 int num_regs;
5616 int base_regnum;
5617{
5618 char name[8];
5619 int i;
5620
5621 for (i = 0; i < num_regs; ++i)
5622 {
5623 sprintf (name, "%s%u", prefix, i);
5624 declare_register (name, base_regnum + i);
5625 }
5626}
5627
5628static unsigned int
5629operand_width (opnd)
5630 enum ia64_opnd opnd;
5631{
5632 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5633 unsigned int bits = 0;
5634 int i;
5635
5636 bits = 0;
5637 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5638 bits += odesc->field[i].bits;
5639
5640 return bits;
5641}
5642
87f8eb97 5643static enum operand_match_result
800eeca4
JW		 5644operand_match (idesc, index, e)
5645 const struct ia64_opcode *idesc;
5646 int index;
5647 expressionS *e;
5648{
5649 enum ia64_opnd opnd = idesc->operands[index];
5650 int bits, relocatable = 0;
5651 struct insn_fix *fix;
5652 bfd_signed_vma val;
5653
5654 switch (opnd)
5655 {
542d6675 5656 /* constants: */
800eeca4
JW		 5657
5658 case IA64_OPND_AR_CCV:
5659 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5660 return OPERAND_MATCH;
800eeca4
JW		 5661 break;
5662
c10d9d8f
JW		 5663 case IA64_OPND_AR_CSD:
5664 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5665 return OPERAND_MATCH;
5666 break;
5667
800eeca4
JW		 5668 case IA64_OPND_AR_PFS:
5669 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5670 return OPERAND_MATCH;
800eeca4
JW		 5671 break;
5672
5673 case IA64_OPND_GR0:
5674 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5675 return OPERAND_MATCH;
800eeca4
JW		 5676 break;
5677
5678 case IA64_OPND_IP:
5679 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5680 return OPERAND_MATCH;
800eeca4
JW		 5681 break;
5682
5683 case IA64_OPND_PR:
5684 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5685 return OPERAND_MATCH;
800eeca4
JW		 5686 break;
5687
5688 case IA64_OPND_PR_ROT:
5689 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5690 return OPERAND_MATCH;
800eeca4
JW		 5691 break;
5692
5693 case IA64_OPND_PSR:
5694 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5695 return OPERAND_MATCH;
800eeca4
JW		 5696 break;
5697
5698 case IA64_OPND_PSR_L:
5699 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5700 return OPERAND_MATCH;
800eeca4
JW		 5701 break;
5702
5703 case IA64_OPND_PSR_UM:
5704 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5705 return OPERAND_MATCH;
800eeca4
JW		 5706 break;
5707
5708 case IA64_OPND_C1:
87f8eb97
JW		 5709 if (e->X_op == O_constant)
5710 {
5711 if (e->X_add_number == 1)
5712 return OPERAND_MATCH;
5713 else
5714 return OPERAND_OUT_OF_RANGE;
5715 }
800eeca4
JW		 5716 break;
5717
5718 case IA64_OPND_C8:
87f8eb97
JW		 5719 if (e->X_op == O_constant)
5720 {
5721 if (e->X_add_number == 8)
5722 return OPERAND_MATCH;
5723 else
5724 return OPERAND_OUT_OF_RANGE;
5725 }
800eeca4
JW		 5726 break;
5727
5728 case IA64_OPND_C16:
87f8eb97
JW		 5729 if (e->X_op == O_constant)
5730 {
5731 if (e->X_add_number == 16)
5732 return OPERAND_MATCH;
5733 else
5734 return OPERAND_OUT_OF_RANGE;
5735 }
800eeca4
JW		 5736 break;
5737
542d6675 5738 /* register operands: */
800eeca4
JW		 5739
5740 case IA64_OPND_AR3:
5741 if (e->X_op == O_register && e->X_add_number >= REG_AR
5742 && e->X_add_number < REG_AR + 128)
87f8eb97 5743 return OPERAND_MATCH;
800eeca4
JW		 5744 break;
5745
5746 case IA64_OPND_B1:
5747 case IA64_OPND_B2:
5748 if (e->X_op == O_register && e->X_add_number >= REG_BR
5749 && e->X_add_number < REG_BR + 8)
87f8eb97 5750 return OPERAND_MATCH;
800eeca4
JW		 5751 break;
5752
5753 case IA64_OPND_CR3:
5754 if (e->X_op == O_register && e->X_add_number >= REG_CR
5755 && e->X_add_number < REG_CR + 128)
87f8eb97 5756 return OPERAND_MATCH;
800eeca4
JW		 5757 break;
5758
5759 case IA64_OPND_F1:
5760 case IA64_OPND_F2:
5761 case IA64_OPND_F3:
5762 case IA64_OPND_F4:
5763 if (e->X_op == O_register && e->X_add_number >= REG_FR
5764 && e->X_add_number < REG_FR + 128)
87f8eb97 5765 return OPERAND_MATCH;
800eeca4
JW		 5766 break;
5767
5768 case IA64_OPND_P1:
5769 case IA64_OPND_P2:
5770 if (e->X_op == O_register && e->X_add_number >= REG_P
5771 && e->X_add_number < REG_P + 64)
87f8eb97 5772 return OPERAND_MATCH;
800eeca4
JW		 5773 break;
5774
5775 case IA64_OPND_R1:
5776 case IA64_OPND_R2:
5777 case IA64_OPND_R3:
5778 if (e->X_op == O_register && e->X_add_number >= REG_GR
5779 && e->X_add_number < REG_GR + 128)
87f8eb97 5780 return OPERAND_MATCH;
800eeca4
JW		 5781 break;
5782
5783 case IA64_OPND_R3_2:
87f8eb97 5784 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5785 {
87f8eb97
JW		 5786 if (e->X_add_number < REG_GR + 4)
5787 return OPERAND_MATCH;
5788 else if (e->X_add_number < REG_GR + 128)
5789 return OPERAND_OUT_OF_RANGE;
5790 }
800eeca4
JW		 5791 break;
5792
542d6675 5793 /* indirect operands: */
800eeca4
JW		 5794 case IA64_OPND_CPUID_R3:
5795 case IA64_OPND_DBR_R3:
5796 case IA64_OPND_DTR_R3:
5797 case IA64_OPND_ITR_R3:
5798 case IA64_OPND_IBR_R3:
5799 case IA64_OPND_MSR_R3:
5800 case IA64_OPND_PKR_R3:
5801 case IA64_OPND_PMC_R3:
5802 case IA64_OPND_PMD_R3:
5803 case IA64_OPND_RR_R3:
5804 if (e->X_op == O_index && e->X_op_symbol
5805 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5806 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5807 return OPERAND_MATCH;
800eeca4
JW		 5808 break;
5809
5810 case IA64_OPND_MR3:
5811 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5812 return OPERAND_MATCH;
800eeca4
JW		 5813 break;
5814
542d6675 5815 /* immediate operands: */
800eeca4
JW		 5816 case IA64_OPND_CNT2a:
5817 case IA64_OPND_LEN4:
5818 case IA64_OPND_LEN6:
5819 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5820 if (e->X_op == O_constant)
5821 {
5822 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5823 return OPERAND_MATCH;
5824 else
5825 return OPERAND_OUT_OF_RANGE;
5826 }
800eeca4
JW		 5827 break;
5828
5829 case IA64_OPND_CNT2b:
87f8eb97
JW		 5830 if (e->X_op == O_constant)
5831 {
5832 if ((bfd_vma) (e->X_add_number - 1) < 3)
5833 return OPERAND_MATCH;
5834 else
5835 return OPERAND_OUT_OF_RANGE;
5836 }
800eeca4
JW		 5837 break;
5838
5839 case IA64_OPND_CNT2c:
5840 val = e->X_add_number;
87f8eb97
JW		 5841 if (e->X_op == O_constant)
5842 {
5843 if ((val == 0 || val == 7 || val == 15 || val == 16))
5844 return OPERAND_MATCH;
5845 else
5846 return OPERAND_OUT_OF_RANGE;
5847 }
800eeca4
JW		 5848 break;
5849
5850 case IA64_OPND_SOR:
5851 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5852 if (e->X_op == O_constant && e->X_add_number & 0x7)
5853 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5854 case IA64_OPND_SOF:
5855 case IA64_OPND_SOL:
87f8eb97
JW		 5856 if (e->X_op == O_constant)
5857 {
5858 if ((bfd_vma) e->X_add_number <= 96)
5859 return OPERAND_MATCH;
5860 else
5861 return OPERAND_OUT_OF_RANGE;
5862 }
800eeca4
JW		 5863 break;
5864
5865 case IA64_OPND_IMMU62:
5866 if (e->X_op == O_constant)
542d6675 5867 {
800eeca4 5868 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5869 return OPERAND_MATCH;
5870 else
5871 return OPERAND_OUT_OF_RANGE;
542d6675 5872 }
197865e8 5873 else
542d6675
KH		 5874 {
5875 /* FIXME -- need 62-bit relocation type */
5876 as_bad (_("62-bit relocation not yet implemented"));
5877 }
800eeca4
JW		 5878 break;
5879
5880 case IA64_OPND_IMMU64:
5881 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5882 || e->X_op == O_subtract)
5883 {
5884 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5885 fix->code = BFD_RELOC_IA64_IMM64;
5886 if (e->X_op != O_subtract)
5887 {
5888 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5889 if (e->X_op == O_pseudo_fixup)
5890 e->X_op = O_symbol;
5891 }
5892
5893 fix->opnd = idesc->operands[index];
5894 fix->expr = *e;
5895 fix->is_pcrel = 0;
5896 ++CURR_SLOT.num_fixups;
87f8eb97 5897 return OPERAND_MATCH;
800eeca4
JW		 5898 }
5899 else if (e->X_op == O_constant)
87f8eb97 5900 return OPERAND_MATCH;
800eeca4
JW		 5901 break;
5902
5903 case IA64_OPND_CCNT5:
5904 case IA64_OPND_CNT5:
5905 case IA64_OPND_CNT6:
5906 case IA64_OPND_CPOS6a:
5907 case IA64_OPND_CPOS6b:
5908 case IA64_OPND_CPOS6c:
5909 case IA64_OPND_IMMU2:
5910 case IA64_OPND_IMMU7a:
5911 case IA64_OPND_IMMU7b:
800eeca4
JW		 5912 case IA64_OPND_IMMU21:
5913 case IA64_OPND_IMMU24:
5914 case IA64_OPND_MBTYPE4:
5915 case IA64_OPND_MHTYPE8:
5916 case IA64_OPND_POS6:
5917 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5918 if (e->X_op == O_constant)
5919 {
5920 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5921 return OPERAND_MATCH;
5922 else
5923 return OPERAND_OUT_OF_RANGE;
5924 }
800eeca4
JW		 5925 break;
5926
bf3ca999
TW		 5927 case IA64_OPND_IMMU9:
5928 bits = operand_width (idesc->operands[index]);
87f8eb97 5929 if (e->X_op == O_constant)
542d6675 5930 {
87f8eb97
JW		 5931 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5932 {
5933 int lobits = e->X_add_number & 0x3;
5934 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5935 e->X_add_number |= (bfd_vma) 0x3;
5936 return OPERAND_MATCH;
5937 }
5938 else
5939 return OPERAND_OUT_OF_RANGE;
542d6675 5940 }
bf3ca999
TW		 5941 break;
5942
800eeca4
JW		 5943 case IA64_OPND_IMM44:
5944 /* least 16 bits must be zero */
5945 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5946 /* XXX technically, this is wrong: we should not be issuing warning
5947 messages until we're sure this instruction pattern is going to
5948 be used! */
542d6675 5949 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5950
87f8eb97 5951 if (e->X_op == O_constant)
542d6675 5952 {
87f8eb97
JW		 5953 if (((e->X_add_number >= 0
5954 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5955 || (e->X_add_number < 0
5956 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5957 {
87f8eb97
JW		 5958 /* sign-extend */
5959 if (e->X_add_number >= 0
5960 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5961 {
5962 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5963 }
5964 return OPERAND_MATCH;
542d6675 5965 }
87f8eb97
JW		 5966 else
5967 return OPERAND_OUT_OF_RANGE;
542d6675 5968 }
800eeca4
JW		 5969 break;
5970
5971 case IA64_OPND_IMM17:
5972 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5973 if (e->X_op == O_constant)
542d6675 5974 {
87f8eb97
JW		 5975 if (((e->X_add_number >= 0
5976 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5977 || (e->X_add_number < 0
5978 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5979 {
87f8eb97
JW		 5980 /* sign-extend */
5981 if (e->X_add_number >= 0
5982 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5983 {
5984 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5985 }
5986 return OPERAND_MATCH;
542d6675 5987 }
87f8eb97
JW		 5988 else
5989 return OPERAND_OUT_OF_RANGE;
542d6675 5990 }
800eeca4
JW		 5991 break;
5992
5993 case IA64_OPND_IMM14:
5994 case IA64_OPND_IMM22:
5995 relocatable = 1;
5996 case IA64_OPND_IMM1:
5997 case IA64_OPND_IMM8:
5998 case IA64_OPND_IMM8U4:
5999 case IA64_OPND_IMM8M1:
6000 case IA64_OPND_IMM8M1U4:
6001 case IA64_OPND_IMM8M1U8:
6002 case IA64_OPND_IMM9a:
6003 case IA64_OPND_IMM9b:
6004 bits = operand_width (idesc->operands[index]);
6005 if (relocatable && (e->X_op == O_symbol
6006 || e->X_op == O_subtract
6007 || e->X_op == O_pseudo_fixup))
6008 {
6009 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6010
6011 if (idesc->operands[index] == IA64_OPND_IMM14)
6012 fix->code = BFD_RELOC_IA64_IMM14;
6013 else
6014 fix->code = BFD_RELOC_IA64_IMM22;
6015
6016 if (e->X_op != O_subtract)
6017 {
6018 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6019 if (e->X_op == O_pseudo_fixup)
6020 e->X_op = O_symbol;
6021 }
6022
6023 fix->opnd = idesc->operands[index];
6024 fix->expr = *e;
6025 fix->is_pcrel = 0;
6026 ++CURR_SLOT.num_fixups;
87f8eb97 6027 return OPERAND_MATCH;
800eeca4
JW		 6028 }
6029 else if (e->X_op != O_constant
6030 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 6031 return OPERAND_MISMATCH;
800eeca4
JW		 6032
6033 if (opnd == IA64_OPND_IMM8M1U4)
6034 {
6035 /* Zero is not valid for unsigned compares that take an adjusted
6036 constant immediate range. */
6037 if (e->X_add_number == 0)
87f8eb97 6038 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6039
6040 /* Sign-extend 32-bit unsigned numbers, so that the following range
6041 checks will work. */
6042 val = e->X_add_number;
197865e8
KH		 6043 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6044 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6045 val = ((val << 32) >> 32);
6046
6047 /* Check for 0x100000000. This is valid because
6048 0x100000000-1 is the same as ((uint32_t) -1). */
6049 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 6050 return OPERAND_MATCH;
800eeca4
JW		 6051
6052 val = val - 1;
6053 }
6054 else if (opnd == IA64_OPND_IMM8M1U8)
6055 {
6056 /* Zero is not valid for unsigned compares that take an adjusted
6057 constant immediate range. */
6058 if (e->X_add_number == 0)
87f8eb97 6059 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6060
6061 /* Check for 0x10000000000000000. */
6062 if (e->X_op == O_big)
6063 {
6064 if (generic_bignum[0] == 0
6065 && generic_bignum[1] == 0
6066 && generic_bignum[2] == 0
6067 && generic_bignum[3] == 0
6068 && generic_bignum[4] == 1)
87f8eb97 6069 return OPERAND_MATCH;
800eeca4 6070 else
87f8eb97 6071 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6072 }
6073 else
6074 val = e->X_add_number - 1;
6075 }
6076 else if (opnd == IA64_OPND_IMM8M1)
6077 val = e->X_add_number - 1;
6078 else if (opnd == IA64_OPND_IMM8U4)
6079 {
6080 /* Sign-extend 32-bit unsigned numbers, so that the following range
6081 checks will work. */
6082 val = e->X_add_number;
197865e8
KH		 6083 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6084 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6085 val = ((val << 32) >> 32);
6086 }
6087 else
6088 val = e->X_add_number;
6089
2434f565
JW		 6090 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
6091 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 6092 return OPERAND_MATCH;
6093 else
6094 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6095
6096 case IA64_OPND_INC3:
6097 /* +/- 1, 4, 8, 16 */
6098 val = e->X_add_number;
6099 if (val < 0)
6100 val = -val;
87f8eb97
JW		 6101 if (e->X_op == O_constant)
6102 {
6103 if ((val == 1 || val == 4 || val == 8 || val == 16))
6104 return OPERAND_MATCH;
6105 else
6106 return OPERAND_OUT_OF_RANGE;
6107 }
800eeca4
JW		 6108 break;
6109
6110 case IA64_OPND_TGT25:
6111 case IA64_OPND_TGT25b:
6112 case IA64_OPND_TGT25c:
6113 case IA64_OPND_TGT64:
6114 if (e->X_op == O_symbol)
6115 {
6116 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6117 if (opnd == IA64_OPND_TGT25)
6118 fix->code = BFD_RELOC_IA64_PCREL21F;
6119 else if (opnd == IA64_OPND_TGT25b)
6120 fix->code = BFD_RELOC_IA64_PCREL21M;
6121 else if (opnd == IA64_OPND_TGT25c)
6122 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 6123 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 6124 fix->code = BFD_RELOC_IA64_PCREL60B;
6125 else
6126 abort ();
6127
800eeca4
JW		 6128 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6129 fix->opnd = idesc->operands[index];
6130 fix->expr = *e;
6131 fix->is_pcrel = 1;
6132 ++CURR_SLOT.num_fixups;
87f8eb97 6133 return OPERAND_MATCH;
800eeca4
JW		 6134 }
6135 case IA64_OPND_TAG13:
6136 case IA64_OPND_TAG13b:
6137 switch (e->X_op)
6138 {
6139 case O_constant:
87f8eb97 6140 return OPERAND_MATCH;
800eeca4
JW		 6141
6142 case O_symbol:
6143 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c 6144 /* There are no external relocs for TAG13/TAG13b fields, so we
55cf6793 6145 create a dummy reloc. This will not live past md_apply_fix. */
fa1cb89c
JW		 6146 fix->code = BFD_RELOC_UNUSED;
6147 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 6148 fix->opnd = idesc->operands[index];
6149 fix->expr = *e;
6150 fix->is_pcrel = 1;
6151 ++CURR_SLOT.num_fixups;
87f8eb97 6152 return OPERAND_MATCH;
800eeca4
JW		 6153
6154 default:
6155 break;
6156 }
6157 break;
6158
a823923b
RH		 6159 case IA64_OPND_LDXMOV:
6160 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6161 fix->code = BFD_RELOC_IA64_LDXMOV;
6162 fix->opnd = idesc->operands[index];
6163 fix->expr = *e;
6164 fix->is_pcrel = 0;
6165 ++CURR_SLOT.num_fixups;
6166 return OPERAND_MATCH;
6167
800eeca4
JW		 6168 default:
6169 break;
6170 }
87f8eb97 6171 return OPERAND_MISMATCH;
800eeca4
JW		 6172}
6173
6174static int
e4e8248d 6175parse_operand (e, more)
800eeca4 6176 expressionS *e;
e4e8248d 6177 int more;
800eeca4
JW		 6178{
6179 int sep = '\0';
6180
6181 memset (e, 0, sizeof (*e));
6182 e->X_op = O_absent;
6183 SKIP_WHITESPACE ();
60d11e55 6184 expression_and_evaluate (e);
e4e8248d
JB		 6185 sep = *input_line_pointer;
6186 if (more && (sep == ',' || sep == more))
6187 ++input_line_pointer;
800eeca4
JW		 6188 return sep;
6189}
6190
6191/* Returns the next entry in the opcode table that matches the one in
6192 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6193 found, NULL is returned instead. */
800eeca4
JW		 6194
6195static struct ia64_opcode *
6196get_next_opcode (struct ia64_opcode *idesc)
6197{
6198 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6199 ia64_free_opcode (idesc);
6200 return next;
6201}
6202
6203/* Parse the operands for the opcode and find the opcode variant that
6204 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6205
6206static struct ia64_opcode *
800eeca4
JW		 6207parse_operands (idesc)
6208 struct ia64_opcode *idesc;
6209{
6210 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6211 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6212 int reg1, reg2;
6213 char reg_class;
800eeca4 6214 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6215 enum operand_match_result result;
800eeca4
JW		 6216 char mnemonic[129];
6217 char *first_arg = 0, *end, *saved_input_pointer;
6218 unsigned int sof;
6219
6220 assert (strlen (idesc->name) <= 128);
6221
6222 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6223 if (idesc->operands[2] == IA64_OPND_SOF
6224 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6225 {
6226 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6227 can't parse the first operand until we have parsed the
6228 remaining operands of the "alloc" instruction. */
6229 SKIP_WHITESPACE ();
6230 first_arg = input_line_pointer;
6231 end = strchr (input_line_pointer, '=');
6232 if (!end)
6233 {
6234 as_bad ("Expected separator `='");
6235 return 0;
6236 }
6237 input_line_pointer = end + 1;
6238 ++i;
6239 ++num_outputs;
6240 }
6241
d3156ecc 6242 for (; ; ++i)
800eeca4 6243 {
d3156ecc
JB		 6244 if (i < NELEMS (CURR_SLOT.opnd))
6245 {
e4e8248d 6246 sep = parse_operand (CURR_SLOT.opnd + i, '=');
d3156ecc
JB		 6247 if (CURR_SLOT.opnd[i].X_op == O_absent)
6248 break;
6249 }
6250 else
6251 {
6252 expressionS dummy;
6253
e4e8248d 6254 sep = parse_operand (&dummy, '=');
d3156ecc
JB		 6255 if (dummy.X_op == O_absent)
6256 break;
6257 }
800eeca4
JW		 6258
6259 ++num_operands;
6260
6261 if (sep != '=' && sep != ',')
6262 break;
6263
6264 if (sep == '=')
6265 {
6266 if (num_outputs > 0)
6267 as_bad ("Duplicate equal sign (=) in instruction");
6268 else
6269 num_outputs = i + 1;
6270 }
6271 }
6272 if (sep != '\0')
6273 {
6274 as_bad ("Illegal operand separator `%c'", sep);
6275 return 0;
6276 }
197865e8 6277
60b9a617
JB		 6278 if (idesc->operands[2] == IA64_OPND_SOF
6279 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4 6280 {
ef0241e7
JB		 6281 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6282 Note, however, that due to that mapping operand numbers in error
6283 messages for any of the constant operands will not be correct. */
800eeca4 6284 know (strcmp (idesc->name, "alloc") == 0);
ef0241e7
JB		 6285 /* The first operand hasn't been parsed/initialized, yet (but
6286 num_operands intentionally doesn't account for that). */
6287 i = num_operands > 4 ? 2 : 1;
6288#define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6289 ? CURR_SLOT.opnd[n].X_add_number \
6290 : 0)
6291 sof = set_regstack (FORCE_CONST(i),
6292 FORCE_CONST(i + 1),
6293 FORCE_CONST(i + 2),
6294 FORCE_CONST(i + 3));
6295#undef FORCE_CONST
6296
6297 /* now we can parse the first arg: */
6298 saved_input_pointer = input_line_pointer;
6299 input_line_pointer = first_arg;
6300 sep = parse_operand (CURR_SLOT.opnd + 0, '=');
6301 if (sep != '=')
6302 --num_outputs; /* force error */
6303 input_line_pointer = saved_input_pointer;
6304
6305 CURR_SLOT.opnd[i].X_add_number = sof;
6306 if (CURR_SLOT.opnd[i + 1].X_op == O_constant
6307 && CURR_SLOT.opnd[i + 2].X_op == O_constant)
6308 CURR_SLOT.opnd[i + 1].X_add_number
6309 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6310 else
6311 CURR_SLOT.opnd[i + 1].X_op = O_illegal;
6312 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6313 }
6314
d3156ecc 6315 highest_unmatched_operand = -4;
87f8eb97
JW		 6316 curr_out_of_range_pos = -1;
6317 error_pos = 0;
800eeca4
JW		 6318 for (; idesc; idesc = get_next_opcode (idesc))
6319 {
6320 if (num_outputs != idesc->num_outputs)
6321 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6322 if (highest_unmatched_operand < 0)
6323 highest_unmatched_operand |= 1;
6324 if (num_operands > NELEMS (idesc->operands)
6325 || (num_operands < NELEMS (idesc->operands)
6326 && idesc->operands[num_operands])
6327 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6328 continue; /* mismatch in number of arguments */
6329 if (highest_unmatched_operand < 0)
6330 highest_unmatched_operand |= 2;
800eeca4
JW		 6331
6332 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6333
6334 /* Try to match all operands. If we see an out-of-range operand,
6335 then continue trying to match the rest of the operands, since if
6336 the rest match, then this idesc will give the best error message. */
6337
6338 out_of_range_pos = -1;
800eeca4 6339 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6340 {
6341 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6342 if (result != OPERAND_MATCH)
6343 {
6344 if (result != OPERAND_OUT_OF_RANGE)
6345 break;
6346 if (out_of_range_pos < 0)
6347 /* remember position of the first out-of-range operand: */
6348 out_of_range_pos = i;
6349 }
6350 }
800eeca4 6351
87f8eb97
JW		 6352 /* If we did not match all operands, or if at least one operand was
6353 out-of-range, then this idesc does not match. Keep track of which
6354 idesc matched the most operands before failing. If we have two
6355 idescs that failed at the same position, and one had an out-of-range
6356 operand, then prefer the out-of-range operand. Thus if we have
6357 "add r0=0x1000000,r1" we get an error saying the constant is out
6358 of range instead of an error saying that the constant should have been
6359 a register. */
6360
6361 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6362 {
87f8eb97
JW		 6363 if (i > highest_unmatched_operand
6364 || (i == highest_unmatched_operand
6365 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6366 {
6367 highest_unmatched_operand = i;
87f8eb97
JW		 6368 if (out_of_range_pos >= 0)
6369 {
6370 expected_operand = idesc->operands[out_of_range_pos];
6371 error_pos = out_of_range_pos;
6372 }
6373 else
6374 {
6375 expected_operand = idesc->operands[i];
6376 error_pos = i;
6377 }
6378 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6379 }
6380 continue;
6381 }
6382
800eeca4
JW		 6383 break;
6384 }
6385 if (!idesc)
6386 {
6387 if (expected_operand)
6388 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6389 error_pos + 1, mnemonic,
800eeca4 6390 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6391 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6392 as_bad ("Wrong number of output operands");
6393 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6394 as_bad ("Wrong number of input operands");
800eeca4
JW		 6395 else
6396 as_bad ("Operand mismatch");
6397 return 0;
6398 }
4b09e828
JB		 6399
6400 /* Check that the instruction doesn't use
6401 - r0, f0, or f1 as output operands
6402 - the same predicate twice as output operands
6403 - r0 as address of a base update load or store
6404 - the same GR as output and address of a base update load
6405 - two even- or two odd-numbered FRs as output operands of a floating
6406 point parallel load.
6407 At most two (conflicting) output (or output-like) operands can exist,
6408 (floating point parallel loads have three outputs, but the base register,
6409 if updated, cannot conflict with the actual outputs). */
6410 reg2 = reg1 = -1;
6411 for (i = 0; i < num_operands; ++i)
6412 {
6413 int regno = 0;
6414
6415 reg_class = 0;
6416 switch (idesc->operands[i])
6417 {
6418 case IA64_OPND_R1:
6419 case IA64_OPND_R2:
6420 case IA64_OPND_R3:
6421 if (i < num_outputs)
6422 {
6423 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6424 reg_class = 'r';
6425 else if (reg1 < 0)
6426 reg1 = CURR_SLOT.opnd[i].X_add_number;
6427 else if (reg2 < 0)
6428 reg2 = CURR_SLOT.opnd[i].X_add_number;
6429 }
6430 break;
6431 case IA64_OPND_P1:
6432 case IA64_OPND_P2:
6433 if (i < num_outputs)
6434 {
6435 if (reg1 < 0)
6436 reg1 = CURR_SLOT.opnd[i].X_add_number;
6437 else if (reg2 < 0)
6438 reg2 = CURR_SLOT.opnd[i].X_add_number;
6439 }
6440 break;
6441 case IA64_OPND_F1:
6442 case IA64_OPND_F2:
6443 case IA64_OPND_F3:
6444 case IA64_OPND_F4:
6445 if (i < num_outputs)
6446 {
6447 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6448 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6449 {
6450 reg_class = 'f';
6451 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6452 }
6453 else if (reg1 < 0)
6454 reg1 = CURR_SLOT.opnd[i].X_add_number;
6455 else if (reg2 < 0)
6456 reg2 = CURR_SLOT.opnd[i].X_add_number;
6457 }
6458 break;
6459 case IA64_OPND_MR3:
6460 if (idesc->flags & IA64_OPCODE_POSTINC)
6461 {
6462 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6463 reg_class = 'm';
6464 else if (reg1 < 0)
6465 reg1 = CURR_SLOT.opnd[i].X_add_number;
6466 else if (reg2 < 0)
6467 reg2 = CURR_SLOT.opnd[i].X_add_number;
6468 }
6469 break;
6470 default:
6471 break;
6472 }
6473 switch (reg_class)
6474 {
6475 case 0:
6476 break;
6477 default:
6478 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6479 break;
6480 case 'm':
6481 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6482 break;
6483 }
6484 }
6485 if (reg1 == reg2)
6486 {
6487 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6488 {
6489 reg1 -= REG_GR;
6490 reg_class = 'r';
6491 }
6492 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6493 {
6494 reg1 -= REG_P;
6495 reg_class = 'p';
6496 }
6497 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6498 {
6499 reg1 -= REG_FR;
6500 reg_class = 'f';
6501 }
6502 else
6503 reg_class = 0;
6504 if (reg_class)
6505 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6506 }
6507 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6508 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6509 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6510 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6511 && ! ((reg1 ^ reg2) & 1))
6512 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6513 reg1 - REG_FR, reg2 - REG_FR);
6514 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6515 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6516 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6517 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6518 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6519 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6520 return idesc;
6521}
6522
6523static void
6524build_insn (slot, insnp)
6525 struct slot *slot;
6526 bfd_vma *insnp;
6527{
6528 const struct ia64_operand *odesc, *o2desc;
6529 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6530 bfd_vma insn;
6531 bfd_signed_vma val;
800eeca4
JW		 6532 const char *err;
6533 int i;
6534
6535 insn = idesc->opcode | slot->qp_regno;
6536
6537 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6538 {
c67e42c9
RH		 6539 if (slot->opnd[i].X_op == O_register
6540 || slot->opnd[i].X_op == O_constant
6541 || slot->opnd[i].X_op == O_index)
6542 val = slot->opnd[i].X_add_number;
6543 else if (slot->opnd[i].X_op == O_big)
800eeca4 6544 {
c67e42c9
RH		 6545 /* This must be the value 0x10000000000000000. */
6546 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6547 val = 0;
6548 }
6549 else
6550 val = 0;
6551
6552 switch (idesc->operands[i])
6553 {
6554 case IA64_OPND_IMMU64:
800eeca4
JW		 6555 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6556 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6557 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6558 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6559 continue;
6560
6561 case IA64_OPND_IMMU62:
542d6675
KH		 6562 val &= 0x3fffffffffffffffULL;
6563 if (val != slot->opnd[i].X_add_number)
6564 as_warn (_("Value truncated to 62 bits"));
6565 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6566 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6567 continue;
800eeca4 6568
c67e42c9
RH		 6569 case IA64_OPND_TGT64:
6570 val >>= 4;
6571 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6572 insn |= ((((val >> 59) & 0x1) << 36)
6573 | (((val >> 0) & 0xfffff) << 13));
6574 continue;
800eeca4 6575
c67e42c9
RH		 6576 case IA64_OPND_AR3:
6577 val -= REG_AR;
6578 break;
6579
6580 case IA64_OPND_B1:
6581 case IA64_OPND_B2:
6582 val -= REG_BR;
6583 break;
6584
6585 case IA64_OPND_CR3:
6586 val -= REG_CR;
6587 break;
6588
6589 case IA64_OPND_F1:
6590 case IA64_OPND_F2:
6591 case IA64_OPND_F3:
6592 case IA64_OPND_F4:
6593 val -= REG_FR;
6594 break;
6595
6596 case IA64_OPND_P1:
6597 case IA64_OPND_P2:
6598 val -= REG_P;
6599 break;
6600
6601 case IA64_OPND_R1:
6602 case IA64_OPND_R2:
6603 case IA64_OPND_R3:
6604 case IA64_OPND_R3_2:
6605 case IA64_OPND_CPUID_R3:
6606 case IA64_OPND_DBR_R3:
6607 case IA64_OPND_DTR_R3:
6608 case IA64_OPND_ITR_R3:
6609 case IA64_OPND_IBR_R3:
6610 case IA64_OPND_MR3:
6611 case IA64_OPND_MSR_R3:
6612 case IA64_OPND_PKR_R3:
6613 case IA64_OPND_PMC_R3:
6614 case IA64_OPND_PMD_R3:
197865e8 6615 case IA64_OPND_RR_R3:
c67e42c9
RH		 6616 val -= REG_GR;
6617 break;
6618
6619 default:
6620 break;
6621 }
6622
6623 odesc = elf64_ia64_operands + idesc->operands[i];
6624 err = (*odesc->insert) (odesc, val, &insn);
6625 if (err)
6626 as_bad_where (slot->src_file, slot->src_line,
6627 "Bad operand value: %s", err);
6628 if (idesc->flags & IA64_OPCODE_PSEUDO)
6629 {
6630 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6631 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6632 {
6633 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6634 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6635 }
c67e42c9
RH		 6636 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6637 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6638 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6639 {
c67e42c9
RH		 6640 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6641 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6642 }
6643 }
6644 }
6645 *insnp = insn;
6646}
6647
6648static void
6649emit_one_bundle ()
6650{
f4660e2c 6651 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6652 enum ia64_unit required_unit, insn_unit = 0;
6653 enum ia64_insn_type type[3], insn_type;
6654 unsigned int template, orig_template;
542d6675 6655 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6656 struct ia64_opcode *idesc;
6657 int end_of_insn_group = 0, user_template = -1;
9b505842 6658 int n, i, j, first, curr, last_slot;
800eeca4
JW		 6659 bfd_vma t0 = 0, t1 = 0;
6660 struct label_fix *lfix;
07a53e5c 6661 bfd_boolean mark_label;
800eeca4
JW		 6662 struct insn_fix *ifix;
6663 char mnemonic[16];
6664 fixS *fix;
6665 char *f;
5a9ff93d 6666 int addr_mod;
800eeca4
JW		 6667
6668 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6669 know (first >= 0 & first < NUM_SLOTS);
6670 n = MIN (3, md.num_slots_in_use);
6671
6672 /* Determine template: user user_template if specified, best match
542d6675 6673 otherwise: */
800eeca4
JW		 6674
6675 if (md.slot[first].user_template >= 0)
6676 user_template = template = md.slot[first].user_template;
6677 else
6678 {
032efc85 6679 /* Auto select appropriate template. */
800eeca4
JW		 6680 memset (type, 0, sizeof (type));
6681 curr = first;
6682 for (i = 0; i < n; ++i)
6683 {
032efc85
RH		 6684 if (md.slot[curr].label_fixups && i != 0)
6685 break;
800eeca4
JW		 6686 type[i] = md.slot[curr].idesc->type;
6687 curr = (curr + 1) % NUM_SLOTS;
6688 }
6689 template = best_template[type[0]][type[1]][type[2]];
6690 }
6691
542d6675 6692 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6693 for (i = 0; i < 3; ++i)
6694 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6695
6696 f = frag_more (16);
6697
5a9ff93d
JW		 6698 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6699 from the start of the frag. */
6700 addr_mod = frag_now_fix () & 15;
6701 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6702 as_bad (_("instruction address is not a multiple of 16"));
6703 frag_now->insn_addr = addr_mod;
6704 frag_now->has_code = 1;
6705
542d6675 6706 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6707 curr = first;
6708 idesc = md.slot[curr].idesc;
6709 end_of_insn_group = 0;
9b505842 6710 last_slot = -1;
800eeca4
JW		 6711 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6712 {
d6e78c11 6713 /* If we have unwind records, we may need to update some now. */
75214fb0
JB		 6714 unw_rec_list *ptr = md.slot[curr].unwind_record;
6715 unw_rec_list *end_ptr = NULL;
6716
d6e78c11
JW		 6717 if (ptr)
6718 {
6719 /* Find the last prologue/body record in the list for the current
6720 insn, and set the slot number for all records up to that point.
6721 This needs to be done now, because prologue/body records refer to
6722 the current point, not the point after the instruction has been
6723 issued. This matters because there may have been nops emitted
6724 meanwhile. Any non-prologue non-body record followed by a
6725 prologue/body record must also refer to the current point. */
75214fb0
JB		 6726 unw_rec_list *last_ptr;
6727
6728 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j)
6729 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record;
6730 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next)
d6e78c11
JW		 6731 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6732 || ptr->r.type == body)
6733 last_ptr = ptr;
6734 if (last_ptr)
6735 {
6736 /* Make last_ptr point one after the last prologue/body
6737 record. */
6738 last_ptr = last_ptr->next;
6739 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6740 ptr = ptr->next)
6741 {
6742 ptr->slot_number = (unsigned long) f + i;
6743 ptr->slot_frag = frag_now;
6744 }
6745 /* Remove the initialized records, so that we won't accidentally
6746 update them again if we insert a nop and continue. */
6747 md.slot[curr].unwind_record = last_ptr;
6748 }
6749 }
e0c9811a 6750
f4660e2c
JB		 6751 manual_bundling_off = md.slot[curr].manual_bundling_off;
6752 if (md.slot[curr].manual_bundling_on)
800eeca4 6753 {
f4660e2c
JB		 6754 if (curr == first)
6755 manual_bundling = 1;
800eeca4 6756 else
f4660e2c
JB		 6757 break; /* Need to start a new bundle. */
6758 }
6759
744b6414
JW		 6760 /* If this instruction specifies a template, then it must be the first
6761 instruction of a bundle. */
6762 if (curr != first && md.slot[curr].user_template >= 0)
6763 break;
6764
f4660e2c
JB		 6765 if (idesc->flags & IA64_OPCODE_SLOT2)
6766 {
6767 if (manual_bundling && !manual_bundling_off)
6768 {
6769 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6770 "`%s' must be last in bundle", idesc->name);
6771 if (i < 2)
6772 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6773 }
6774 i = 2;
800eeca4
JW		 6775 }
6776 if (idesc->flags & IA64_OPCODE_LAST)
6777 {
2434f565
JW		 6778 int required_slot;
6779 unsigned int required_template;
800eeca4
JW		 6780
6781 /* If we need a stop bit after an M slot, our only choice is
6782 template 5 (M;;MI). If we need a stop bit after a B
6783 slot, our only choice is to place it at the end of the
6784 bundle, because the only available templates are MIB,
6785 MBB, BBB, MMB, and MFB. We don't handle anything other
6786 than M and B slots because these are the only kind of
6787 instructions that can have the IA64_OPCODE_LAST bit set. */
6788 required_template = template;
6789 switch (idesc->type)
6790 {
6791 case IA64_TYPE_M:
6792 required_slot = 0;
6793 required_template = 5;
6794 break;
6795
6796 case IA64_TYPE_B:
6797 required_slot = 2;
6798 break;
6799
6800 default:
6801 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6802 "Internal error: don't know how to force %s to end"
6803 "of instruction group", idesc->name);
6804 required_slot = i;
6805 break;
6806 }
f4660e2c
JB		 6807 if (manual_bundling
6808 && (i > required_slot
6809 || (required_slot == 2 && !manual_bundling_off)
6810 || (user_template >= 0
6811 /* Changing from MMI to M;MI is OK. */
6812 && (template ^ required_template) > 1)))
6813 {
6814 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6815 "`%s' must be last in instruction group",
6816 idesc->name);
6817 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6818 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6819 }
800eeca4
JW		 6820 if (required_slot < i)
6821 /* Can't fit this instruction. */
6822 break;
6823
6824 i = required_slot;
6825 if (required_template != template)
6826 {
6827 /* If we switch the template, we need to reset the NOPs
6828 after slot i. The slot-types of the instructions ahead
6829 of i never change, so we don't need to worry about
6830 changing NOPs in front of this slot. */
6831 for (j = i; j < 3; ++j)
6832 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6833 }
6834 template = required_template;
6835 }
6836 if (curr != first && md.slot[curr].label_fixups)
6837 {
f4660e2c
JB		 6838 if (manual_bundling)
6839 {
6840 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6841 "Label must be first in a bundle");
f4660e2c
JB		 6842 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6843 }
800eeca4
JW		 6844 /* This insn must go into the first slot of a bundle. */
6845 break;
6846 }
6847
800eeca4
JW		 6848 if (end_of_insn_group && md.num_slots_in_use >= 1)
6849 {
6850 /* We need an instruction group boundary in the middle of a
6851 bundle. See if we can switch to an other template with
6852 an appropriate boundary. */
6853
6854 orig_template = template;
6855 if (i == 1 && (user_template == 4
6856 || (user_template < 0
6857 && (ia64_templ_desc[template].exec_unit[0]
6858 == IA64_UNIT_M))))
6859 {
6860 template = 5;
6861 end_of_insn_group = 0;
6862 }
6863 else if (i == 2 && (user_template == 0
6864 || (user_template < 0
6865 && (ia64_templ_desc[template].exec_unit[1]
6866 == IA64_UNIT_I)))
6867 /* This test makes sure we don't switch the template if
6868 the next instruction is one that needs to be first in
6869 an instruction group. Since all those instructions are
6870 in the M group, there is no way such an instruction can
6871 fit in this bundle even if we switch the template. The
6872 reason we have to check for this is that otherwise we
6873 may end up generating "MI;;I M.." which has the deadly
6874 effect that the second M instruction is no longer the
f4660e2c 6875 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6876 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6877 {
6878 template = 1;
6879 end_of_insn_group = 0;
6880 }
f4660e2c
JB		 6881 else if (i == 1
6882 && user_template == 0
6883 && !(idesc->flags & IA64_OPCODE_FIRST))
6884 /* Use the next slot. */
6885 continue;
800eeca4
JW		 6886 else if (curr != first)
6887 /* can't fit this insn */
6888 break;
6889
6890 if (template != orig_template)
6891 /* if we switch the template, we need to reset the NOPs
6892 after slot i. The slot-types of the instructions ahead
6893 of i never change, so we don't need to worry about
6894 changing NOPs in front of this slot. */
6895 for (j = i; j < 3; ++j)
6896 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6897 }
6898 required_unit = ia64_templ_desc[template].exec_unit[i];
6899
c10d9d8f 6900 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6901 if (idesc->type == IA64_TYPE_DYN)
6902 {
97762d08
JB		 6903 enum ia64_opnd opnd1, opnd2;
6904
800eeca4
JW		 6905 if ((strcmp (idesc->name, "nop") == 0)
6906 || (strcmp (idesc->name, "break") == 0))
6907 insn_unit = required_unit;
91d777ee
L		 6908 else if (strcmp (idesc->name, "hint") == 0)
6909 {
6910 insn_unit = required_unit;
6911 if (required_unit == IA64_UNIT_B)
6912 {
6913 switch (md.hint_b)
6914 {
6915 case hint_b_ok:
6916 break;
6917 case hint_b_warning:
6918 as_warn ("hint in B unit may be treated as nop");
6919 break;
6920 case hint_b_error:
6921 /* When manual bundling is off and there is no
6922 user template, we choose a different unit so
6923 that hint won't go into the current slot. We
6924 will fill the current bundle with nops and
6925 try to put hint into the next bundle. */
6926 if (!manual_bundling && user_template < 0)
6927 insn_unit = IA64_UNIT_I;
6928 else
6929 as_bad ("hint in B unit can't be used");
6930 break;
6931 }
6932 }
6933 }
97762d08
JB		 6934 else if (strcmp (idesc->name, "chk.s") == 0
6935 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6936 {
6937 insn_unit = IA64_UNIT_M;
97762d08
JB		 6938 if (required_unit == IA64_UNIT_I
6939 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6940 insn_unit = IA64_UNIT_I;
6941 }
6942 else
6943 as_fatal ("emit_one_bundle: unexpected dynamic op");
6944
09124b3f 6945 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6946 opnd1 = idesc->operands[0];
6947 opnd2 = idesc->operands[1];
3d56ab85 6948 ia64_free_opcode (idesc);
97762d08
JB		 6949 idesc = ia64_find_opcode (mnemonic);
6950 /* moves to/from ARs have collisions */
6951 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6952 {
6953 while (idesc != NULL
6954 && (idesc->operands[0] != opnd1
6955 || idesc->operands[1] != opnd2))
6956 idesc = get_next_opcode (idesc);
6957 }
97762d08 6958 md.slot[curr].idesc = idesc;
800eeca4
JW		 6959 }
6960 else
6961 {
6962 insn_type = idesc->type;
6963 insn_unit = IA64_UNIT_NIL;
6964 switch (insn_type)
6965 {
6966 case IA64_TYPE_A:
6967 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6968 insn_unit = required_unit;
6969 break;
542d6675 6970 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6971 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6972 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6973 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6974 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6975 default: break;
6976 }
6977 }
6978
6979 if (insn_unit != required_unit)
9b505842 6980 continue; /* Try next slot. */
800eeca4 6981
07a53e5c
RH		 6982 /* Now is a good time to fix up the labels for this insn. */
6983 mark_label = FALSE;
6984 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6985 {
6986 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6987 symbol_set_frag (lfix->sym, frag_now);
6988 mark_label |= lfix->dw2_mark_labels;
6989 }
6990 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6991 {
6992 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6993 symbol_set_frag (lfix->sym, frag_now);
6994 }
6995
6996 if (debug_type == DEBUG_DWARF2
6997 || md.slot[curr].loc_directive_seen
6998 || mark_label)
196e8040
JW		 6999 {
7000 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 7001
196e8040 7002 md.slot[curr].loc_directive_seen = 0;
07a53e5c
RH		 7003 if (mark_label)
7004 md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
7005
196e8040
JW		 7006 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
7007 }
800eeca4
JW		 7008
7009 build_insn (md.slot + curr, insn + i);
7010
d6e78c11
JW		 7011 ptr = md.slot[curr].unwind_record;
7012 if (ptr)
7013 {
7014 /* Set slot numbers for all remaining unwind records belonging to the
7015 current insn. There can not be any prologue/body unwind records
7016 here. */
d6e78c11
JW		 7017 for (; ptr != end_ptr; ptr = ptr->next)
7018 {
7019 ptr->slot_number = (unsigned long) f + i;
7020 ptr->slot_frag = frag_now;
7021 }
7022 md.slot[curr].unwind_record = NULL;
7023 }
10850f29 7024
800eeca4
JW		 7025 if (required_unit == IA64_UNIT_L)
7026 {
7027 know (i == 1);
7028 /* skip one slot for long/X-unit instructions */
7029 ++i;
7030 }
7031 --md.num_slots_in_use;
9b505842 7032 last_slot = i;
800eeca4 7033
800eeca4
JW		 7034 for (j = 0; j < md.slot[curr].num_fixups; ++j)
7035 {
7036 ifix = md.slot[curr].fixup + j;
5a080f89 7037 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 7038 &ifix->expr, ifix->is_pcrel, ifix->code);
7039 fix->tc_fix_data.opnd = ifix->opnd;
7040 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
7041 fix->fx_file = md.slot[curr].src_file;
7042 fix->fx_line = md.slot[curr].src_line;
7043 }
7044
7045 end_of_insn_group = md.slot[curr].end_of_insn_group;
7046
542d6675 7047 /* clear slot: */
800eeca4
JW		 7048 ia64_free_opcode (md.slot[curr].idesc);
7049 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7050 md.slot[curr].user_template = -1;
7051
7052 if (manual_bundling_off)
7053 {
7054 manual_bundling = 0;
7055 break;
7056 }
7057 curr = (curr + 1) % NUM_SLOTS;
7058 idesc = md.slot[curr].idesc;
7059 }
f4660e2c 7060 if (manual_bundling > 0)
800eeca4
JW		 7061 {
7062 if (md.num_slots_in_use > 0)
ac025970 7063 {
9b505842
JB		 7064 if (last_slot >= 2)
7065 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7066 "`%s' does not fit into bundle", idesc->name);
7067 else if (last_slot < 0)
7068 {
7069 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7070 "`%s' does not fit into %s template",
7071 idesc->name, ia64_templ_desc[template].name);
7072 /* Drop first insn so we don't livelock. */
7073 --md.num_slots_in_use;
7074 know (curr == first);
7075 ia64_free_opcode (md.slot[curr].idesc);
7076 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7077 md.slot[curr].user_template = -1;
7078 }
7079 else
7080 {
7081 const char *where;
7082
7083 if (template == 2)
7084 where = "X slot";
7085 else if (last_slot == 0)
7086 where = "slots 2 or 3";
7087 else
7088 where = "slot 3";
7089 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7090 "`%s' can't go in %s of %s template",
7091 idesc->name, where, ia64_templ_desc[template].name);
7092 }
ac025970 7093 }
800eeca4
JW		 7094 else
7095 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7096 "Missing '}' at end of file");
7097 }
7098 know (md.num_slots_in_use < NUM_SLOTS);
7099
7100 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
7101 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
7102
44f5c83a
JW		 7103 number_to_chars_littleendian (f + 0, t0, 8);
7104 number_to_chars_littleendian (f + 8, t1, 8);
800eeca4
JW		 7105}
7106
7107int
7108md_parse_option (c, arg)
7109 int c;
7110 char *arg;
7111{
7463c317 7112
800eeca4
JW		 7113 switch (c)
7114 {
c43c2cc5 7115 /* Switches from the Intel assembler. */
44f5c83a 7116 case 'm':
800eeca4
JW		 7117 if (strcmp (arg, "ilp64") == 0
7118 || strcmp (arg, "lp64") == 0
7119 || strcmp (arg, "p64") == 0)
7120 {
7121 md.flags |= EF_IA_64_ABI64;
7122 }
7123 else if (strcmp (arg, "ilp32") == 0)
7124 {
7125 md.flags &= ~EF_IA_64_ABI64;
7126 }
7127 else if (strcmp (arg, "le") == 0)
7128 {
7129 md.flags &= ~EF_IA_64_BE;
549f748d 7130 default_big_endian = 0;
800eeca4
JW		 7131 }
7132 else if (strcmp (arg, "be") == 0)
7133 {
7134 md.flags |= EF_IA_64_BE;
549f748d 7135 default_big_endian = 1;
800eeca4 7136 }
970d6792
L		 7137 else if (strncmp (arg, "unwind-check=", 13) == 0)
7138 {
7139 arg += 13;
7140 if (strcmp (arg, "warning") == 0)
7141 md.unwind_check = unwind_check_warning;
7142 else if (strcmp (arg, "error") == 0)
7143 md.unwind_check = unwind_check_error;
7144 else
7145 return 0;
7146 }
91d777ee
L		 7147 else if (strncmp (arg, "hint.b=", 7) == 0)
7148 {
7149 arg += 7;
7150 if (strcmp (arg, "ok") == 0)
7151 md.hint_b = hint_b_ok;
7152 else if (strcmp (arg, "warning") == 0)
7153 md.hint_b = hint_b_warning;
7154 else if (strcmp (arg, "error") == 0)
7155 md.hint_b = hint_b_error;
7156 else
7157 return 0;
7158 }
8c2fda1d
L		 7159 else if (strncmp (arg, "tune=", 5) == 0)
7160 {
7161 arg += 5;
7162 if (strcmp (arg, "itanium1") == 0)
7163 md.tune = itanium1;
7164 else if (strcmp (arg, "itanium2") == 0)
7165 md.tune = itanium2;
7166 else
7167 return 0;
7168 }
800eeca4
JW		 7169 else
7170 return 0;
7171 break;
7172
7173 case 'N':
7174 if (strcmp (arg, "so") == 0)
7175 {
542d6675 7176 /* Suppress signon message. */
800eeca4
JW		 7177 }
7178 else if (strcmp (arg, "pi") == 0)
7179 {
7180 /* Reject privileged instructions. FIXME */
7181 }
7182 else if (strcmp (arg, "us") == 0)
7183 {
7184 /* Allow union of signed and unsigned range. FIXME */
7185 }
7186 else if (strcmp (arg, "close_fcalls") == 0)
7187 {
7188 /* Do not resolve global function calls. */
7189 }
7190 else
7191 return 0;
7192 break;
7193
7194 case 'C':
7195 /* temp[="prefix"] Insert temporary labels into the object file
7196 symbol table prefixed by "prefix".
7197 Default prefix is ":temp:".
7198 */
7199 break;
7200
7201 case 'a':
800eeca4
JW		 7202 /* indirect=<tgt> Assume unannotated indirect branches behavior
7203 according to <tgt> --
7204 exit: branch out from the current context (default)
7205 labels: all labels in context may be branch targets
7206 */
85b40035
L		 7207 if (strncmp (arg, "indirect=", 9) != 0)
7208 return 0;
800eeca4
JW		 7209 break;
7210
7211 case 'x':
7212 /* -X conflicts with an ignored option, use -x instead */
7213 md.detect_dv = 1;
7214 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7215 {
7216 /* set default mode to explicit */
7217 md.default_explicit_mode = 1;
7218 break;
7219 }
800eeca4 7220 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7221 {
7222 md.default_explicit_mode = 0;
7223 }
f1dab70d
JB		 7224 else if (strcmp (arg, "none") == 0)
7225 {
7226 md.detect_dv = 0;
7227 }
800eeca4 7228 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7229 {
7230 md.debug_dv = 1;
7231 }
800eeca4 7232 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7233 {
7234 md.default_explicit_mode = 1;
7235 md.debug_dv = 1;
7236 }
f1dab70d
JB		 7237 else if (strcmp (arg, "debugn") == 0)
7238 {
7239 md.debug_dv = 1;
7240 md.detect_dv = 0;
7241 }
800eeca4 7242 else
542d6675
KH		 7243 {
7244 as_bad (_("Unrecognized option '-x%s'"), arg);
7245 }
800eeca4
JW		 7246 break;
7247
7248 case 'S':
7249 /* nops Print nops statistics. */
7250 break;
7251
c43c2cc5
JW		 7252 /* GNU specific switches for gcc. */
7253 case OPTION_MCONSTANT_GP:
7254 md.flags |= EF_IA_64_CONS_GP;
7255 break;
7256
7257 case OPTION_MAUTO_PIC:
7258 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7259 break;
7260
800eeca4
JW		 7261 default:
7262 return 0;
7263 }
7264
7265 return 1;
7266}
7267
7268void
7269md_show_usage (stream)
7270 FILE *stream;
7271{
542d6675 7272 fputs (_("\
800eeca4 7273IA-64 options:\n\
6290819d
NC		 7274 --mconstant-gp mark output file as using the constant-GP model\n\
7275 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7276 --mauto-pic mark output file as using the constant-GP model\n\
7277 without function descriptors (sets ELF header flag\n\
7278 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7279 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7280 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
8c2fda1d
L		 7281 -mtune=[itanium1|itanium2]\n\
7282 tune for a specific CPU (default -mtune=itanium2)\n\
970d6792
L		 7283 -munwind-check=[warning|error]\n\
7284 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7285 -mhint.b=[ok|warning|error]\n\
7286 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7287 -x | -xexplicit turn on dependency violation checking\n\
7288 -xauto automagically remove dependency violations (default)\n\
7289 -xnone turn off dependency violation checking\n\
7290 -xdebug debug dependency violation checker\n\
7291 -xdebugn debug dependency violation checker but turn off\n\
7292 dependency violation checking\n\
7293 -xdebugx debug dependency violation checker and turn on\n\
7294 dependency violation checking\n"),
800eeca4
JW		 7295 stream);
7296}
7297
acebd4ce
AS		 7298void
7299ia64_after_parse_args ()
7300{
7301 if (debug_type == DEBUG_STABS)
7302 as_fatal (_("--gstabs is not supported for ia64"));
7303}
7304
44576e1f
RH		 7305/* Return true if TYPE fits in TEMPL at SLOT. */
7306
7307static int
800eeca4
JW		 7308match (int templ, int type, int slot)
7309{
7310 enum ia64_unit unit;
7311 int result;
7312
7313 unit = ia64_templ_desc[templ].exec_unit[slot];
7314 switch (type)
7315 {
7316 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7317 case IA64_TYPE_A:
7318 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7319 break;
7320 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7321 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7322 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7323 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7324 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7325 default: result = 0; break;
7326 }
7327 return result;
7328}
7329
7c06efaa
JW		 7330/* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7331 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7332 type M or I would fit in TEMPL at SLOT. */
44576e1f
RH		 7333
7334static inline int
7335extra_goodness (int templ, int slot)
7336{
8c2fda1d
L		 7337 switch (md.tune)
7338 {
7339 case itanium1:
7340 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7341 return 2;
7342 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7343 return 1;
7344 else
7345 return 0;
7346 break;
7347 case itanium2:
7348 if (match (templ, IA64_TYPE_M, slot)
7349 || match (templ, IA64_TYPE_I, slot))
7350 /* Favor M- and I-unit NOPs. We definitely want to avoid
7351 F-unit and B-unit may cause split-issue or less-than-optimal
7352 branch-prediction. */
7353 return 2;
7354 else
7355 return 0;
7356 break;
7357 default:
7358 abort ();
7359 return 0;
7360 }
44576e1f
RH		 7361}
7362
800eeca4
JW		 7363/* This function is called once, at assembler startup time. It sets
7364 up all the tables, etc. that the MD part of the assembler will need
7365 that can be determined before arguments are parsed. */
7366void
7367md_begin ()
7368{
5e0bd176 7369 int i, j, k, t, goodness, best, regnum, ok;
800eeca4
JW		 7370 const char *err;
7371 char name[8];
7372
7373 md.auto_align = 1;
7374 md.explicit_mode = md.default_explicit_mode;
7375
7376 bfd_set_section_alignment (stdoutput, text_section, 4);
7377
0234cb7c 7378 /* Make sure function pointers get initialized. */
10a98291 7379 target_big_endian = -1;
549f748d 7380 dot_byteorder (default_big_endian);
10a98291 7381
35f5df7f
L		 7382 alias_hash = hash_new ();
7383 alias_name_hash = hash_new ();
7384 secalias_hash = hash_new ();
7385 secalias_name_hash = hash_new ();
7386
13ae64f3
JJ		 7387 pseudo_func[FUNC_DTP_MODULE].u.sym =
7388 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7389 &zero_address_frag);
7390
7391 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7392 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7393 &zero_address_frag);
7394
800eeca4 7395 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7396 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7397 &zero_address_frag);
800eeca4
JW		 7398
7399 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7400 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7401 &zero_address_frag);
800eeca4
JW		 7402
7403 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7404 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7405 &zero_address_frag);
800eeca4 7406
fa2c7eff
RH		 7407 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7408 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7409 &zero_address_frag);
7410
c67e42c9 7411 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7412 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7413 &zero_address_frag);
c67e42c9 7414
800eeca4 7415 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7416 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7417 &zero_address_frag);
800eeca4
JW		 7418
7419 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7420 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7421 &zero_address_frag);
800eeca4
JW		 7422
7423 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7424 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7425 &zero_address_frag);
800eeca4 7426
13ae64f3
JJ		 7427 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7428 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7429 &zero_address_frag);
7430
800eeca4 7431 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7432 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7433 &zero_address_frag);
800eeca4
JW		 7434
7435 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7436 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7437 &zero_address_frag);
800eeca4 7438
13ae64f3
JJ		 7439 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7440 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7441 &zero_address_frag);
7442
7443 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7444 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7445 &zero_address_frag);
7446
7447 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7448 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7449 &zero_address_frag);
7450
3969b680
RH		 7451 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7452 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7453 &zero_address_frag);
7454
f6fe78d6
JW		 7455 if (md.tune != itanium1)
7456 {
7457 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7458 le_nop[0] = 0x8;
7459 le_nop_stop[0] = 0x9;
7460 }
7461
197865e8 7462 /* Compute the table of best templates. We compute goodness as a
8c2fda1d
L		 7463 base 4 value, in which each match counts for 3. Match-failures
7464 result in NOPs and we use extra_goodness() to pick the execution
7465 units that are best suited for issuing the NOP. */
800eeca4
JW		 7466 for (i = 0; i < IA64_NUM_TYPES; ++i)
7467 for (j = 0; j < IA64_NUM_TYPES; ++j)
7468 for (k = 0; k < IA64_NUM_TYPES; ++k)
7469 {
7470 best = 0;
7471 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7472 {
7473 goodness = 0;
7474 if (match (t, i, 0))
7475 {
7476 if (match (t, j, 1))
7477 {
286cee81 7478 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2))
44576e1f 7479 goodness = 3 + 3 + 3;
800eeca4 7480 else
44576e1f 7481 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7482 }
7483 else if (match (t, j, 2))
44576e1f 7484 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7485 else
44576e1f
RH		 7486 {
7487 goodness = 3;
7488 goodness += extra_goodness (t, 1);
7489 goodness += extra_goodness (t, 2);
7490 }
800eeca4
JW		 7491 }
7492 else if (match (t, i, 1))
7493 {
286cee81 7494 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2))
44576e1f 7495 goodness = 3 + 3;
800eeca4 7496 else
44576e1f 7497 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7498 }
7499 else if (match (t, i, 2))
44576e1f 7500 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7501
7502 if (goodness > best)
7503 {
7504 best = goodness;
7505 best_template[i][j][k] = t;
7506 }
7507 }
7508 }
7509
7c06efaa
JW		 7510#ifdef DEBUG_TEMPLATES
7511 /* For debugging changes to the best_template calculations. We don't care
7512 about combinations with invalid instructions, so start the loops at 1. */
7513 for (i = 0; i < IA64_NUM_TYPES; ++i)
7514 for (j = 0; j < IA64_NUM_TYPES; ++j)
7515 for (k = 0; k < IA64_NUM_TYPES; ++k)
7516 {
7517 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f',
7518 'x', 'd' };
7519 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j],
7520 type_letter[k],
7521 ia64_templ_desc[best_template[i][j][k]].name);
7522 }
7523#endif
7524
800eeca4
JW		 7525 for (i = 0; i < NUM_SLOTS; ++i)
7526 md.slot[i].user_template = -1;
7527
7528 md.pseudo_hash = hash_new ();
7529 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7530 {
7531 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7532 (void *) (pseudo_opcode + i));
7533 if (err)
7534 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7535 pseudo_opcode[i].name, err);
7536 }
7537
7538 md.reg_hash = hash_new ();
7539 md.dynreg_hash = hash_new ();
7540 md.const_hash = hash_new ();
7541 md.entry_hash = hash_new ();
7542
542d6675 7543 /* general registers: */
5e0bd176 7544 for (i = REG_GR; i < REG_GR + 128; ++i)
800eeca4
JW		 7545 {
7546 sprintf (name, "r%d", i - REG_GR);
7547 md.regsym[i] = declare_register (name, i);
7548 }
7549
542d6675 7550 /* floating point registers: */
5e0bd176 7551 for (i = REG_FR; i < REG_FR + 128; ++i)
800eeca4
JW		 7552 {
7553 sprintf (name, "f%d", i - REG_FR);
7554 md.regsym[i] = declare_register (name, i);
7555 }
7556
542d6675 7557 /* application registers: */
5e0bd176 7558 for (i = REG_AR; i < REG_AR + 128; ++i)
800eeca4
JW		 7559 {
7560 sprintf (name, "ar%d", i - REG_AR);
7561 md.regsym[i] = declare_register (name, i);
7562 }
7563
542d6675 7564 /* control registers: */
5e0bd176 7565 for (i = REG_CR; i < REG_CR + 128; ++i)
800eeca4
JW		 7566 {
7567 sprintf (name, "cr%d", i - REG_CR);
7568 md.regsym[i] = declare_register (name, i);
7569 }
7570
542d6675 7571 /* predicate registers: */
5e0bd176 7572 for (i = REG_P; i < REG_P + 64; ++i)
800eeca4
JW		 7573 {
7574 sprintf (name, "p%d", i - REG_P);
7575 md.regsym[i] = declare_register (name, i);
7576 }
7577
542d6675 7578 /* branch registers: */
5e0bd176 7579 for (i = REG_BR; i < REG_BR + 8; ++i)
800eeca4
JW		 7580 {
7581 sprintf (name, "b%d", i - REG_BR);
7582 md.regsym[i] = declare_register (name, i);
7583 }
7584
7585 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7586 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7587 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7588 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7589 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7590 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7591 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7592
7593 for (i = 0; i < NELEMS (indirect_reg); ++i)
7594 {
7595 regnum = indirect_reg[i].regnum;
7596 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7597 }
7598
542d6675 7599 /* define synonyms for application registers: */
5e0bd176
JB		 7600 for (i = 0; i < NELEMS (ar); ++i)
7601 declare_register (ar[i].name, REG_AR + ar[i].regnum);
800eeca4 7602
542d6675 7603 /* define synonyms for control registers: */
5e0bd176
JB		 7604 for (i = 0; i < NELEMS (cr); ++i)
7605 declare_register (cr[i].name, REG_CR + cr[i].regnum);
800eeca4
JW		 7606
7607 declare_register ("gp", REG_GR + 1);
7608 declare_register ("sp", REG_GR + 12);
5e0bd176 7609 declare_register ("tp", REG_GR + 13);
800eeca4
JW		 7610 declare_register ("rp", REG_BR + 0);
7611
542d6675 7612 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7613 declare_register ("psp", REG_PSP);
7614
800eeca4
JW		 7615 declare_register_set ("ret", 4, REG_GR + 8);
7616 declare_register_set ("farg", 8, REG_FR + 8);
7617 declare_register_set ("fret", 8, REG_FR + 8);
7618
7619 for (i = 0; i < NELEMS (const_bits); ++i)
7620 {
7621 err = hash_insert (md.const_hash, const_bits[i].name,
7622 (PTR) (const_bits + i));
7623 if (err)
7624 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7625 name, err);
7626 }
7627
44f5c83a
JW		 7628 /* Set the architecture and machine depending on defaults and command line
7629 options. */
7630 if (md.flags & EF_IA_64_ABI64)
7631 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7632 else
7633 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7634
7635 if (! ok)
7636 as_warn (_("Could not set architecture and machine"));
800eeca4 7637
557debba
JW		 7638 /* Set the pointer size and pointer shift size depending on md.flags */
7639
7640 if (md.flags & EF_IA_64_ABI64)
7641 {
7642 md.pointer_size = 8; /* pointers are 8 bytes */
7643 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7644 }
7645 else
7646 {
7647 md.pointer_size = 4; /* pointers are 4 bytes */
7648 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7649 }
7650
800eeca4
JW		 7651 md.mem_offset.hint = 0;
7652 md.path = 0;
7653 md.maxpaths = 0;
7654 md.entry_labels = NULL;
7655}
7656
970d6792
L		 7657/* Set the default options in md. Cannot do this in md_begin because
7658 that is called after md_parse_option which is where we set the
7659 options in md based on command line options. */
44f5c83a
JW		 7660
7661void
7662ia64_init (argc, argv)
2434f565
JW		 7663 int argc ATTRIBUTE_UNUSED;
7664 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7665{
1cd8ff38 7666 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7667 md.detect_dv = 1;
970d6792
L		 7668 /* FIXME: We should change it to unwind_check_error someday. */
7669 md.unwind_check = unwind_check_warning;
91d777ee 7670 md.hint_b = hint_b_error;
8c2fda1d 7671 md.tune = itanium2;
44f5c83a
JW		 7672}
7673
7674/* Return a string for the target object file format. */
7675
7676const char *
7677ia64_target_format ()
7678{
7679 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7680 {
72a76794
JW		 7681 if (md.flags & EF_IA_64_BE)
7682 {
7683 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7684#if defined(TE_AIX50)
7463c317 7685 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7686#elif defined(TE_HPUX)
7687 return "elf64-ia64-hpux-big";
7463c317 7688#else
72a76794 7689 return "elf64-ia64-big";
7463c317 7690#endif
72a76794 7691 else
1cd8ff38 7692#if defined(TE_AIX50)
7463c317 7693 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7694#elif defined(TE_HPUX)
7695 return "elf32-ia64-hpux-big";
7463c317 7696#else
72a76794 7697 return "elf32-ia64-big";
7463c317 7698#endif
72a76794 7699 }
44f5c83a 7700 else
72a76794
JW		 7701 {
7702 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7703#ifdef TE_AIX50
7704 return "elf64-ia64-aix-little";
7705#else
72a76794 7706 return "elf64-ia64-little";
7463c317 7707#endif
72a76794 7708 else
7463c317
TW		 7709#ifdef TE_AIX50
7710 return "elf32-ia64-aix-little";
7711#else
72a76794 7712 return "elf32-ia64-little";
7463c317 7713#endif
72a76794 7714 }
44f5c83a
JW		 7715 }
7716 else
7717 return "unknown-format";
7718}
7719
800eeca4
JW		 7720void
7721ia64_end_of_source ()
7722{
542d6675 7723 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7724 insn_group_break (1, 0, 0);
7725
542d6675 7726 /* emits slots we haven't written yet: */
800eeca4
JW		 7727 ia64_flush_insns ();
7728
7729 bfd_set_private_flags (stdoutput, md.flags);
7730
800eeca4
JW		 7731 md.mem_offset.hint = 0;
7732}
7733
7734void
7735ia64_start_line ()
7736{
e4e8248d
JB		 7737 static int first;
7738
7739 if (!first) {
7740 /* Make sure we don't reference input_line_pointer[-1] when that's
7741 not valid. */
7742 first = 1;
7743 return;
7744 }
7745
f1bcba5b
JW		 7746 if (md.qp.X_op == O_register)
7747 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7748 md.qp.X_op = O_absent;
7749
7750 if (ignore_input ())
7751 return;
7752
7753 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7754 {
7755 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7756 {
7757 static int warned;
7758
7759 if (!warned)
7760 {
7761 warned = 1;
7762 as_warn (_("Explicit stops are ignored in auto mode"));
7763 }
7764 }
800eeca4 7765 else
542d6675 7766 insn_group_break (1, 0, 0);
800eeca4 7767 }
e4e8248d 7768 else if (input_line_pointer[-1] == '{')
800eeca4 7769 {
800eeca4
JW		 7770 if (md.manual_bundling)
7771 as_warn ("Found '{' when manual bundling is already turned on");
7772 else
7773 CURR_SLOT.manual_bundling_on = 1;
7774 md.manual_bundling = 1;
7775
542d6675
KH		 7776 /* Bundling is only acceptable in explicit mode
7777 or when in default automatic mode. */
800eeca4 7778 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7779 {
7780 if (!md.mode_explicitly_set
7781 && !md.default_explicit_mode)
7782 dot_dv_mode ('E');
7783 else
7784 as_warn (_("Found '{' after explicit switch to automatic mode"));
7785 }
e4e8248d
JB		 7786 }
7787 else if (input_line_pointer[-1] == '}')
7788 {
800eeca4
JW		 7789 if (!md.manual_bundling)
7790 as_warn ("Found '}' when manual bundling is off");
7791 else
7792 PREV_SLOT.manual_bundling_off = 1;
7793 md.manual_bundling = 0;
7794
7795 /* switch back to automatic mode, if applicable */
197865e8 7796 if (md.detect_dv
542d6675
KH		 7797 && md.explicit_mode
7798 && !md.mode_explicitly_set
7799 && !md.default_explicit_mode)
7800 dot_dv_mode ('A');
e4e8248d
JB		 7801 }
7802}
800eeca4 7803
e4e8248d
JB		 7804/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7805 labels. */
7806static int defining_tag = 0;
7807
7808int
7809ia64_unrecognized_line (ch)
7810 int ch;
7811{
7812 switch (ch)
7813 {
7814 case '(':
60d11e55 7815 expression_and_evaluate (&md.qp);
e4e8248d 7816 if (*input_line_pointer++ != ')')
800eeca4 7817 {
e4e8248d
JB		 7818 as_bad ("Expected ')'");
7819 return 0;
7820 }
7821 if (md.qp.X_op != O_register)
7822 {
7823 as_bad ("Qualifying predicate expected");
7824 return 0;
7825 }
7826 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7827 {
7828 as_bad ("Predicate register expected");
7829 return 0;
800eeca4 7830 }
800eeca4
JW		 7831 return 1;
7832
f1bcba5b
JW		 7833 case '[':
7834 {
7835 char *s;
7836 char c;
7837 symbolS *tag;
4d5a53ff 7838 int temp;
f1bcba5b
JW		 7839
7840 if (md.qp.X_op == O_register)
7841 {
7842 as_bad ("Tag must come before qualifying predicate.");
7843 return 0;
7844 }
4d5a53ff
JW		 7845
7846 /* This implements just enough of read_a_source_file in read.c to
7847 recognize labels. */
7848 if (is_name_beginner (*input_line_pointer))
7849 {
7850 s = input_line_pointer;
7851 c = get_symbol_end ();
7852 }
7853 else if (LOCAL_LABELS_FB
3882b010 7854 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7855 {
7856 temp = 0;
3882b010 7857 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7858 temp = (temp * 10) + *input_line_pointer++ - '0';
7859 fb_label_instance_inc (temp);
7860 s = fb_label_name (temp, 0);
7861 c = *input_line_pointer;
7862 }
7863 else
7864 {
7865 s = NULL;
7866 c = '\0';
7867 }
f1bcba5b
JW		 7868 if (c != ':')
7869 {
7870 /* Put ':' back for error messages' sake. */
7871 *input_line_pointer++ = ':';
7872 as_bad ("Expected ':'");
7873 return 0;
7874 }
4d5a53ff 7875
f1bcba5b
JW		 7876 defining_tag = 1;
7877 tag = colon (s);
7878 defining_tag = 0;
7879 /* Put ':' back for error messages' sake. */
7880 *input_line_pointer++ = ':';
7881 if (*input_line_pointer++ != ']')
7882 {
7883 as_bad ("Expected ']'");
7884 return 0;
7885 }
7886 if (! tag)
7887 {
7888 as_bad ("Tag name expected");
7889 return 0;
7890 }
7891 return 1;
7892 }
7893
800eeca4
JW		 7894 default:
7895 break;
7896 }
542d6675
KH		 7897
7898 /* Not a valid line. */
7899 return 0;
800eeca4
JW		 7900}
7901
7902void
7903ia64_frob_label (sym)
7904 struct symbol *sym;
7905{
7906 struct label_fix *fix;
7907
f1bcba5b
JW		 7908 /* Tags need special handling since they are not bundle breaks like
7909 labels. */
7910 if (defining_tag)
7911 {
7912 fix = obstack_alloc (&notes, sizeof (*fix));
7913 fix->sym = sym;
7914 fix->next = CURR_SLOT.tag_fixups;
07a53e5c 7915 fix->dw2_mark_labels = FALSE;
f1bcba5b
JW		 7916 CURR_SLOT.tag_fixups = fix;
7917
7918 return;
7919 }
7920
800eeca4
JW		 7921 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7922 {
7923 md.last_text_seg = now_seg;
7924 fix = obstack_alloc (&notes, sizeof (*fix));
7925 fix->sym = sym;
7926 fix->next = CURR_SLOT.label_fixups;
07a53e5c 7927 fix->dw2_mark_labels = dwarf2_loc_mark_labels;
800eeca4
JW		 7928 CURR_SLOT.label_fixups = fix;
7929
542d6675 7930 /* Keep track of how many code entry points we've seen. */
800eeca4 7931 if (md.path == md.maxpaths)
542d6675
KH		 7932 {
7933 md.maxpaths += 20;
7934 md.entry_labels = (const char **)
7935 xrealloc ((void *) md.entry_labels,
7936 md.maxpaths * sizeof (char *));
7937 }
800eeca4
JW		 7938 md.entry_labels[md.path++] = S_GET_NAME (sym);
7939 }
7940}
7941
936cf02e
JW		 7942#ifdef TE_HPUX
7943/* The HP-UX linker will give unresolved symbol errors for symbols
7944 that are declared but unused. This routine removes declared,
7945 unused symbols from an object. */
7946int
7947ia64_frob_symbol (sym)
7948 struct symbol *sym;
7949{
7950 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7951 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7952 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7953 && ! S_IS_EXTERNAL (sym)))
7954 return 1;
7955 return 0;
7956}
7957#endif
7958
800eeca4
JW		 7959void
7960ia64_flush_pending_output ()
7961{
4d5a53ff
JW		 7962 if (!md.keep_pending_output
7963 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7964 {
7965 /* ??? This causes many unnecessary stop bits to be emitted.
7966 Unfortunately, it isn't clear if it is safe to remove this. */
7967 insn_group_break (1, 0, 0);
7968 ia64_flush_insns ();
7969 }
7970}
7971
7972/* Do ia64-specific expression optimization. All that's done here is
7973 to transform index expressions that are either due to the indexing
7974 of rotating registers or due to the indexing of indirect register
7975 sets. */
7976int
7977ia64_optimize_expr (l, op, r)
7978 expressionS *l;
7979 operatorT op;
7980 expressionS *r;
7981{
7982 unsigned num_regs;
7983
7984 if (op == O_index)
7985 {
7986 if (l->X_op == O_register && r->X_op == O_constant)
7987 {
7988 num_regs = (l->X_add_number >> 16);
7989 if ((unsigned) r->X_add_number >= num_regs)
7990 {
7991 if (!num_regs)
7992 as_bad ("No current frame");
7993 else
7994 as_bad ("Index out of range 0..%u", num_regs - 1);
7995 r->X_add_number = 0;
7996 }
7997 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7998 return 1;
7999 }
8000 else if (l->X_op == O_register && r->X_op == O_register)
8001 {
8002 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
8003 || l->X_add_number == IND_MEM)
8004 {
8005 as_bad ("Indirect register set name expected");
8006 l->X_add_number = IND_CPUID;
8007 }
8008 l->X_op = O_index;
8009 l->X_op_symbol = md.regsym[l->X_add_number];
8010 l->X_add_number = r->X_add_number;
8011 return 1;
8012 }
8013 }
8014 return 0;
8015}
8016
8017int
16a48f83 8018ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 8019 char *name;
8020 expressionS *e;
16a48f83 8021 char *nextcharP;
800eeca4
JW		 8022{
8023 struct const_desc *cdesc;
8024 struct dynreg *dr = 0;
16a48f83 8025 unsigned int idx;
800eeca4
JW		 8026 struct symbol *sym;
8027 char *end;
8028
16a48f83
JB		 8029 if (*name == '@')
8030 {
8031 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
8032
8033 /* Find what relocation pseudo-function we're dealing with. */
8034 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
8035 if (pseudo_func[idx].name
8036 && pseudo_func[idx].name[0] == name[1]
8037 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
8038 {
8039 pseudo_type = pseudo_func[idx].type;
8040 break;
8041 }
8042 switch (pseudo_type)
8043 {
8044 case PSEUDO_FUNC_RELOC:
8045 end = input_line_pointer;
8046 if (*nextcharP != '(')
8047 {
8048 as_bad ("Expected '('");
2f6d622e 8049 break;
16a48f83
JB		 8050 }
8051 /* Skip '('. */
8052 ++input_line_pointer;
8053 expression (e);
8054 if (*input_line_pointer != ')')
8055 {
8056 as_bad ("Missing ')'");
8057 goto done;
8058 }
8059 /* Skip ')'. */
8060 ++input_line_pointer;
8061 if (e->X_op != O_symbol)
8062 {
8063 if (e->X_op != O_pseudo_fixup)
8064 {
8065 as_bad ("Not a symbolic expression");
8066 goto done;
8067 }
8068 if (idx != FUNC_LT_RELATIVE)
8069 {
8070 as_bad ("Illegal combination of relocation functions");
8071 goto done;
8072 }
8073 switch (S_GET_VALUE (e->X_op_symbol))
8074 {
8075 case FUNC_FPTR_RELATIVE:
8076 idx = FUNC_LT_FPTR_RELATIVE; break;
8077 case FUNC_DTP_MODULE:
8078 idx = FUNC_LT_DTP_MODULE; break;
8079 case FUNC_DTP_RELATIVE:
8080 idx = FUNC_LT_DTP_RELATIVE; break;
8081 case FUNC_TP_RELATIVE:
8082 idx = FUNC_LT_TP_RELATIVE; break;
8083 default:
8084 as_bad ("Illegal combination of relocation functions");
8085 goto done;
8086 }
8087 }
8088 /* Make sure gas doesn't get rid of local symbols that are used
8089 in relocs. */
8090 e->X_op = O_pseudo_fixup;
8091 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 8092 done:
8093 *nextcharP = *input_line_pointer;
16a48f83
JB		 8094 break;
8095
8096 case PSEUDO_FUNC_CONST:
8097 e->X_op = O_constant;
8098 e->X_add_number = pseudo_func[idx].u.ival;
8099 break;
8100
8101 case PSEUDO_FUNC_REG:
8102 e->X_op = O_register;
8103 e->X_add_number = pseudo_func[idx].u.ival;
8104 break;
8105
8106 default:
8107 return 0;
8108 }
16a48f83
JB		 8109 return 1;
8110 }
8111
542d6675 8112 /* first see if NAME is a known register name: */
800eeca4
JW		 8113 sym = hash_find (md.reg_hash, name);
8114 if (sym)
8115 {
8116 e->X_op = O_register;
8117 e->X_add_number = S_GET_VALUE (sym);
8118 return 1;
8119 }
8120
8121 cdesc = hash_find (md.const_hash, name);
8122 if (cdesc)
8123 {
8124 e->X_op = O_constant;
8125 e->X_add_number = cdesc->value;
8126 return 1;
8127 }
8128
542d6675 8129 /* check for inN, locN, or outN: */
26b810ce 8130 idx = 0;
800eeca4
JW		 8131 switch (name[0])
8132 {
8133 case 'i':
3882b010 8134 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 8135 {
8136 dr = &md.in;
26b810ce 8137 idx = 2;
800eeca4
JW		 8138 }
8139 break;
8140
8141 case 'l':
3882b010 8142 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 8143 {
8144 dr = &md.loc;
26b810ce 8145 idx = 3;
800eeca4
JW		 8146 }
8147 break;
8148
8149 case 'o':
3882b010 8150 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 8151 {
8152 dr = &md.out;
26b810ce 8153 idx = 3;
800eeca4
JW		 8154 }
8155 break;
8156
8157 default:
8158 break;
8159 }
8160
26b810ce
JB		 8161 /* Ignore register numbers with leading zeroes, except zero itself. */
8162 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 8163 {
26b810ce
JB		 8164 unsigned long regnum;
8165
542d6675 8166 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 8167 regnum = strtoul (name + idx, &end, 10);
8168 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 8169 {
26b810ce 8170 if (regnum >= dr->num_regs)
800eeca4
JW		 8171 {
8172 if (!dr->num_regs)
8173 as_bad ("No current frame");
8174 else
542d6675
KH		 8175 as_bad ("Register number out of range 0..%u",
8176 dr->num_regs - 1);
800eeca4
JW		 8177 regnum = 0;
8178 }
8179 e->X_op = O_register;
8180 e->X_add_number = dr->base + regnum;
8181 return 1;
8182 }
8183 }
8184
20b36a95
JB		 8185 end = alloca (strlen (name) + 1);
8186 strcpy (end, name);
8187 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 8188 if ((dr = hash_find (md.dynreg_hash, name)))
8189 {
8190 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 8191 Store the base register number in the low 16 bits of
8192 X_add_number and the size of the register set in the top 16
8193 bits. */
800eeca4
JW		 8194 e->X_op = O_register;
8195 e->X_add_number = dr->base | (dr->num_regs << 16);
8196 return 1;
8197 }
8198 return 0;
8199}
8200
8201/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8202
8203char *
8204ia64_canonicalize_symbol_name (name)
8205 char *name;
8206{
20b36a95
JB		 8207 size_t len = strlen (name), full = len;
8208
8209 while (len > 0 && name[len - 1] == '#')
8210 --len;
8211 if (len <= 0)
8212 {
8213 if (full > 0)
8214 as_bad ("Standalone `#' is illegal");
20b36a95
JB		 8215 }
8216 else if (len < full - 1)
8217 as_warn ("Redundant `#' suffix operators");
8218 name[len] = '\0';
800eeca4
JW		 8219 return name;
8220}
8221
3e37788f
JW		 8222/* Return true if idesc is a conditional branch instruction. This excludes
8223 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8224 because they always read/write resources regardless of the value of the
8225 qualifying predicate. br.ia must always use p0, and hence is always
8226 taken. Thus this function returns true for branches which can fall
8227 through, and which use no resources if they do fall through. */
1deb8127 8228
800eeca4
JW		 8229static int
8230is_conditional_branch (idesc)
542d6675 8231 struct ia64_opcode *idesc;
800eeca4 8232{
1deb8127 8233 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 8234 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8235 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 8236 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8237 && (idesc->name[2] == '\0'
3e37788f
JW		 8238 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8239 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8240 || idesc->name[2] == 'l'
8241 /* br.cond, br.call, br.clr */
8242 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8243 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8244 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8245}
8246
8247/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8248 returns zero. */
8249
800eeca4
JW		 8250static int
8251is_taken_branch (idesc)
542d6675 8252 struct ia64_opcode *idesc;
800eeca4
JW		 8253{
8254 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8255 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8256}
8257
8258/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8259 doubt, returns zero. */
8260
800eeca4
JW		 8261static int
8262is_interruption_or_rfi (idesc)
542d6675 8263 struct ia64_opcode *idesc;
800eeca4
JW		 8264{
8265 if (strcmp (idesc->name, "rfi") == 0)
8266 return 1;
8267 return 0;
8268}
8269
8270/* Returns the index of the given dependency in the opcode's list of chks, or
8271 -1 if there is no dependency. */
542d6675 8272
800eeca4
JW		 8273static int
8274depends_on (depind, idesc)
542d6675
KH		 8275 int depind;
8276 struct ia64_opcode *idesc;
800eeca4
JW		 8277{
8278 int i;
8279 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8280 for (i = 0; i < dep->nchks; i++)
800eeca4 8281 {
542d6675
KH		 8282 if (depind == DEP (dep->chks[i]))
8283 return i;
800eeca4
JW		 8284 }
8285 return -1;
8286}
8287
8288/* Determine a set of specific resources used for a particular resource
8289 class. Returns the number of specific resources identified For those
8290 cases which are not determinable statically, the resource returned is
197865e8 8291 marked nonspecific.
800eeca4
JW		 8292
8293 Meanings of value in 'NOTE':
8294 1) only read/write when the register number is explicitly encoded in the
8295 insn.
8296 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8297 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8298 3) general register value is used to specify an indirect register; not
8299 determinable statically.
8300 4) only read the given resource when bits 7:0 of the indirect index
8301 register value does not match the register number of the resource; not
8302 determinable statically.
8303 5) all rules are implementation specific.
8304 6) only when both the index specified by the reader and the index specified
8305 by the writer have the same value in bits 63:61; not determinable
197865e8 8306 statically.
800eeca4 8307 7) only access the specified resource when the corresponding mask bit is
197865e8 8308 set
800eeca4
JW		 8309 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8310 only read when these insns reference FR2-31
8311 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8312 written when these insns write FR32-127
8313 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8314 instruction
8315 11) The target predicates are written independently of PR[qp], but source
8316 registers are only read if PR[qp] is true. Since the state of PR[qp]
8317 cannot statically be determined, all source registers are marked used.
8318 12) This insn only reads the specified predicate register when that
8319 register is the PR[qp].
8320 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 8321 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8322 14) The RSE resource includes the implementation-specific RSE internal
8323 state resources. At least one (and possibly more) of these resources are
8324 read by each instruction listed in IC:rse-readers. At least one (and
8325 possibly more) of these resources are written by each insn listed in
197865e8 8326 IC:rse-writers.
800eeca4 8327 15+16) Represents reserved instructions, which the assembler does not
197865e8 8328 generate.
800eeca4
JW		 8329
8330 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8331 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8332*/
8333
8334#define MAX_SPECS 256
8335#define DV_CHK 1
8336#define DV_REG 0
8337
8338static int
8339specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8340 const struct ia64_dependency *dep;
8341 struct ia64_opcode *idesc;
8342 int type; /* is this a DV chk or a DV reg? */
8343 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8344 int note; /* resource note for this insn's usage */
8345 int path; /* which execution path to examine */
800eeca4
JW		 8346{
8347 int count = 0;
8348 int i;
8349 int rsrc_write = 0;
8350 struct rsrc tmpl;
197865e8 8351
800eeca4
JW		 8352 if (dep->mode == IA64_DV_WAW
8353 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8354 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8355 rsrc_write = 1;
8356
8357 /* template for any resources we identify */
8358 tmpl.dependency = dep;
8359 tmpl.note = note;
8360 tmpl.insn_srlz = tmpl.data_srlz = 0;
8361 tmpl.qp_regno = CURR_SLOT.qp_regno;
8362 tmpl.link_to_qp_branch = 1;
8363 tmpl.mem_offset.hint = 0;
1f8b1395
AS		 8364 tmpl.mem_offset.offset = 0;
8365 tmpl.mem_offset.base = 0;
800eeca4 8366 tmpl.specific = 1;
a66d2bb7 8367 tmpl.index = -1;
7484b8e6 8368 tmpl.cmp_type = CMP_NONE;
1f8b1395
AS		 8369 tmpl.depind = 0;
8370 tmpl.file = NULL;
8371 tmpl.line = 0;
8372 tmpl.path = 0;
800eeca4
JW		 8373
8374#define UNHANDLED \
8375as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8376dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8377#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8378
8379 /* we don't need to track these */
8380 if (dep->semantics == IA64_DVS_NONE)
8381 return 0;
8382
8383 switch (dep->specifier)
8384 {
8385 case IA64_RS_AR_K:
8386 if (note == 1)
542d6675
KH		 8387 {
8388 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8389 {
8390 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8391 if (regno >= 0 && regno <= 7)
8392 {
8393 specs[count] = tmpl;
8394 specs[count++].index = regno;
8395 }
8396 }
8397 }
800eeca4 8398 else if (note == 0)
542d6675
KH		 8399 {
8400 for (i = 0; i < 8; i++)
8401 {
8402 specs[count] = tmpl;
8403 specs[count++].index = i;
8404 }
8405 }
800eeca4 8406 else
542d6675
KH		 8407 {
8408 UNHANDLED;
8409 }
800eeca4
JW		 8410 break;
8411
8412 case IA64_RS_AR_UNAT:
8413 /* This is a mov =AR or mov AR= instruction. */
8414 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8415 {
8416 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8417 if (regno == AR_UNAT)
8418 {
8419 specs[count++] = tmpl;
8420 }
8421 }
8422 else
8423 {
8424 /* This is a spill/fill, or other instruction that modifies the
8425 unat register. */
8426
8427 /* Unless we can determine the specific bits used, mark the whole
8428 thing; bits 8:3 of the memory address indicate the bit used in
8429 UNAT. The .mem.offset hint may be used to eliminate a small
8430 subset of conflicts. */
8431 specs[count] = tmpl;
8432 if (md.mem_offset.hint)
8433 {
542d6675
KH		 8434 if (md.debug_dv)
8435 fprintf (stderr, " Using hint for spill/fill\n");
8436 /* The index isn't actually used, just set it to something
8437 approximating the bit index. */
800eeca4
JW		 8438 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8439 specs[count].mem_offset.hint = 1;
8440 specs[count].mem_offset.offset = md.mem_offset.offset;
8441 specs[count++].mem_offset.base = md.mem_offset.base;
8442 }
8443 else
8444 {
8445 specs[count++].specific = 0;
8446 }
8447 }
8448 break;
8449
8450 case IA64_RS_AR:
8451 if (note == 1)
542d6675
KH		 8452 {
8453 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8454 {
8455 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8456 if ((regno >= 8 && regno <= 15)
8457 || (regno >= 20 && regno <= 23)
8458 || (regno >= 31 && regno <= 39)
8459 || (regno >= 41 && regno <= 47)
8460 || (regno >= 67 && regno <= 111))
8461 {
8462 specs[count] = tmpl;
8463 specs[count++].index = regno;
8464 }
8465 }
8466 }
800eeca4 8467 else
542d6675
KH		 8468 {
8469 UNHANDLED;
8470 }
800eeca4
JW		 8471 break;
8472
8473 case IA64_RS_ARb:
8474 if (note == 1)
542d6675
KH		 8475 {
8476 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8477 {
8478 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8479 if ((regno >= 48 && regno <= 63)
8480 || (regno >= 112 && regno <= 127))
8481 {
8482 specs[count] = tmpl;
8483 specs[count++].index = regno;
8484 }
8485 }
8486 }
800eeca4 8487 else if (note == 0)
542d6675
KH		 8488 {
8489 for (i = 48; i < 64; i++)
8490 {
8491 specs[count] = tmpl;
8492 specs[count++].index = i;
8493 }
8494 for (i = 112; i < 128; i++)
8495 {
8496 specs[count] = tmpl;
8497 specs[count++].index = i;
8498 }
8499 }
197865e8 8500 else
542d6675
KH		 8501 {
8502 UNHANDLED;
8503 }
800eeca4
JW		 8504 break;
8505
8506 case IA64_RS_BR:
8507 if (note != 1)
542d6675
KH		 8508 {
8509 UNHANDLED;
8510 }
800eeca4 8511 else
542d6675
KH		 8512 {
8513 if (rsrc_write)
8514 {
8515 for (i = 0; i < idesc->num_outputs; i++)
8516 if (idesc->operands[i] == IA64_OPND_B1
8517 || idesc->operands[i] == IA64_OPND_B2)
8518 {
8519 specs[count] = tmpl;
8520 specs[count++].index =
8521 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8522 }
8523 }
8524 else
8525 {
40449e9f 8526 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8527 if (idesc->operands[i] == IA64_OPND_B1
8528 || idesc->operands[i] == IA64_OPND_B2)
8529 {
8530 specs[count] = tmpl;
8531 specs[count++].index =
8532 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8533 }
8534 }
8535 }
800eeca4
JW		 8536 break;
8537
8538 case IA64_RS_CPUID: /* four or more registers */
8539 if (note == 3)
542d6675
KH		 8540 {
8541 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8542 {
8543 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8544 if (regno >= 0 && regno < NELEMS (gr_values)
8545 && KNOWN (regno))
8546 {
8547 specs[count] = tmpl;
8548 specs[count++].index = gr_values[regno].value & 0xFF;
8549 }
8550 else
8551 {
8552 specs[count] = tmpl;
8553 specs[count++].specific = 0;
8554 }
8555 }
8556 }
800eeca4 8557 else
542d6675
KH		 8558 {
8559 UNHANDLED;
8560 }
800eeca4
JW		 8561 break;
8562
8563 case IA64_RS_DBR: /* four or more registers */
8564 if (note == 3)
542d6675
KH		 8565 {
8566 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8567 {
8568 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8569 if (regno >= 0 && regno < NELEMS (gr_values)
8570 && KNOWN (regno))
8571 {
8572 specs[count] = tmpl;
8573 specs[count++].index = gr_values[regno].value & 0xFF;
8574 }
8575 else
8576 {
8577 specs[count] = tmpl;
8578 specs[count++].specific = 0;
8579 }
8580 }
8581 }
800eeca4 8582 else if (note == 0 && !rsrc_write)
542d6675
KH		 8583 {
8584 specs[count] = tmpl;
8585 specs[count++].specific = 0;
8586 }
800eeca4 8587 else
542d6675
KH		 8588 {
8589 UNHANDLED;
8590 }
800eeca4
JW		 8591 break;
8592
8593 case IA64_RS_IBR: /* four or more registers */
8594 if (note == 3)
542d6675
KH		 8595 {
8596 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8597 {
8598 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8599 if (regno >= 0 && regno < NELEMS (gr_values)
8600 && KNOWN (regno))
8601 {
8602 specs[count] = tmpl;
8603 specs[count++].index = gr_values[regno].value & 0xFF;
8604 }
8605 else
8606 {
8607 specs[count] = tmpl;
8608 specs[count++].specific = 0;
8609 }
8610 }
8611 }
800eeca4 8612 else
542d6675
KH		 8613 {
8614 UNHANDLED;
8615 }
800eeca4
JW		 8616 break;
8617
8618 case IA64_RS_MSR:
8619 if (note == 5)
8620 {
8621 /* These are implementation specific. Force all references to
8622 conflict with all other references. */
8623 specs[count] = tmpl;
8624 specs[count++].specific = 0;
8625 }
8626 else
8627 {
8628 UNHANDLED;
8629 }
8630 break;
8631
8632 case IA64_RS_PKR: /* 16 or more registers */
8633 if (note == 3 || note == 4)
542d6675
KH		 8634 {
8635 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8636 {
8637 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8638 if (regno >= 0 && regno < NELEMS (gr_values)
8639 && KNOWN (regno))
8640 {
8641 if (note == 3)
8642 {
8643 specs[count] = tmpl;
8644 specs[count++].index = gr_values[regno].value & 0xFF;
8645 }
8646 else
8647 for (i = 0; i < NELEMS (gr_values); i++)
8648 {
8649 /* Uses all registers *except* the one in R3. */
2434f565 8650 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8651 {
8652 specs[count] = tmpl;
8653 specs[count++].index = i;
8654 }
8655 }
8656 }
8657 else
8658 {
8659 specs[count] = tmpl;
8660 specs[count++].specific = 0;
8661 }
8662 }
8663 }
8664 else if (note == 0)
8665 {
8666 /* probe et al. */
8667 specs[count] = tmpl;
8668 specs[count++].specific = 0;
8669 }
8670 break;
8671
8672 case IA64_RS_PMC: /* four or more registers */
8673 if (note == 3)
8674 {
8675 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8676 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8677
8678 {
8679 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8680 ? 1 : !rsrc_write);
8681 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8682 if (regno >= 0 && regno < NELEMS (gr_values)
8683 && KNOWN (regno))
8684 {
8685 specs[count] = tmpl;
8686 specs[count++].index = gr_values[regno].value & 0xFF;
8687 }
8688 else
8689 {
8690 specs[count] = tmpl;
8691 specs[count++].specific = 0;
8692 }
8693 }
8694 }
8695 else
8696 {
8697 UNHANDLED;
8698 }
800eeca4
JW		 8699 break;
8700
8701 case IA64_RS_PMD: /* four or more registers */
8702 if (note == 3)
542d6675
KH		 8703 {
8704 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8705 {
8706 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8707 if (regno >= 0 && regno < NELEMS (gr_values)
8708 && KNOWN (regno))
8709 {
8710 specs[count] = tmpl;
8711 specs[count++].index = gr_values[regno].value & 0xFF;
8712 }
8713 else
8714 {
8715 specs[count] = tmpl;
8716 specs[count++].specific = 0;
8717 }
8718 }
8719 }
800eeca4 8720 else
542d6675
KH		 8721 {
8722 UNHANDLED;
8723 }
800eeca4
JW		 8724 break;
8725
8726 case IA64_RS_RR: /* eight registers */
8727 if (note == 6)
542d6675
KH		 8728 {
8729 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8730 {
8731 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8732 if (regno >= 0 && regno < NELEMS (gr_values)
8733 && KNOWN (regno))
8734 {
8735 specs[count] = tmpl;
8736 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8737 }
8738 else
8739 {
8740 specs[count] = tmpl;
8741 specs[count++].specific = 0;
8742 }
8743 }
8744 }
800eeca4 8745 else if (note == 0 && !rsrc_write)
542d6675
KH		 8746 {
8747 specs[count] = tmpl;
8748 specs[count++].specific = 0;
8749 }
197865e8 8750 else
542d6675
KH		 8751 {
8752 UNHANDLED;
8753 }
800eeca4
JW		 8754 break;
8755
8756 case IA64_RS_CR_IRR:
197865e8 8757 if (note == 0)
542d6675
KH		 8758 {
8759 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8760 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8761 if (rsrc_write
8762 && idesc->operands[1] == IA64_OPND_CR3
8763 && regno == CR_IVR)
8764 {
8765 for (i = 0; i < 4; i++)
8766 {
8767 specs[count] = tmpl;
8768 specs[count++].index = CR_IRR0 + i;
8769 }
8770 }
8771 }
800eeca4 8772 else if (note == 1)
542d6675
KH		 8773 {
8774 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8775 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8776 && regno >= CR_IRR0
8777 && regno <= CR_IRR3)
8778 {
8779 specs[count] = tmpl;
8780 specs[count++].index = regno;
8781 }
8782 }
800eeca4 8783 else
542d6675
KH		 8784 {
8785 UNHANDLED;
8786 }
800eeca4
JW		 8787 break;
8788
8789 case IA64_RS_CR_LRR:
8790 if (note != 1)
542d6675
KH		 8791 {
8792 UNHANDLED;
8793 }
197865e8 8794 else
542d6675
KH		 8795 {
8796 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8797 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8798 && (regno == CR_LRR0 || regno == CR_LRR1))
8799 {
8800 specs[count] = tmpl;
8801 specs[count++].index = regno;
8802 }
8803 }
800eeca4
JW		 8804 break;
8805
8806 case IA64_RS_CR:
8807 if (note == 1)
542d6675
KH		 8808 {
8809 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8810 {
8811 specs[count] = tmpl;
8812 specs[count++].index =
8813 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8814 }
8815 }
800eeca4 8816 else
542d6675
KH		 8817 {
8818 UNHANDLED;
8819 }
800eeca4
JW		 8820 break;
8821
8822 case IA64_RS_FR:
8823 case IA64_RS_FRb:
8824 if (note != 1)
542d6675
KH		 8825 {
8826 UNHANDLED;
8827 }
800eeca4 8828 else if (rsrc_write)
542d6675
KH		 8829 {
8830 if (dep->specifier == IA64_RS_FRb
8831 && idesc->operands[0] == IA64_OPND_F1)
8832 {
8833 specs[count] = tmpl;
8834 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8835 }
8836 }
800eeca4 8837 else
542d6675
KH		 8838 {
8839 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8840 {
8841 if (idesc->operands[i] == IA64_OPND_F2
8842 || idesc->operands[i] == IA64_OPND_F3
8843 || idesc->operands[i] == IA64_OPND_F4)
8844 {
8845 specs[count] = tmpl;
8846 specs[count++].index =
8847 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8848 }
8849 }
8850 }
800eeca4
JW		 8851 break;
8852
8853 case IA64_RS_GR:
8854 if (note == 13)
542d6675
KH		 8855 {
8856 /* This reference applies only to the GR whose value is loaded with
8857 data returned from memory. */
8858 specs[count] = tmpl;
8859 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8860 }
800eeca4 8861 else if (note == 1)
542d6675
KH		 8862 {
8863 if (rsrc_write)
8864 {
8865 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8866 if (idesc->operands[i] == IA64_OPND_R1
8867 || idesc->operands[i] == IA64_OPND_R2
8868 || idesc->operands[i] == IA64_OPND_R3)
8869 {
8870 specs[count] = tmpl;
197865e8 8871 specs[count++].index =
50b81f19
JW		 8872 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8873 }
8874 if (idesc->flags & IA64_OPCODE_POSTINC)
8875 for (i = 0; i < NELEMS (idesc->operands); i++)
8876 if (idesc->operands[i] == IA64_OPND_MR3)
8877 {
8878 specs[count] = tmpl;
8879 specs[count++].index =
8880 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8881 }
542d6675
KH		 8882 }
8883 else
8884 {
8885 /* Look for anything that reads a GR. */
8886 for (i = 0; i < NELEMS (idesc->operands); i++)
8887 {
8888 if (idesc->operands[i] == IA64_OPND_MR3
8889 || idesc->operands[i] == IA64_OPND_CPUID_R3
8890 || idesc->operands[i] == IA64_OPND_DBR_R3
8891 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8892 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8893 || idesc->operands[i] == IA64_OPND_PKR_R3
8894 || idesc->operands[i] == IA64_OPND_PMC_R3
8895 || idesc->operands[i] == IA64_OPND_PMD_R3
8896 || idesc->operands[i] == IA64_OPND_RR_R3
8897 || ((i >= idesc->num_outputs)
8898 && (idesc->operands[i] == IA64_OPND_R1
8899 || idesc->operands[i] == IA64_OPND_R2
8900 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8901 /* addl source register. */
8902 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8903 {
8904 specs[count] = tmpl;
8905 specs[count++].index =
8906 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8907 }
8908 }
8909 }
8910 }
197865e8 8911 else
542d6675
KH		 8912 {
8913 UNHANDLED;
8914 }
800eeca4
JW		 8915 break;
8916
139368c9
JW		 8917 /* This is the same as IA64_RS_PRr, except that the register range is
8918 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8919 case IA64_RS_PR:
8920 if (note == 0)
542d6675 8921 {
139368c9 8922 for (i = 1; i < 16; i++)
542d6675 8923 {
139368c9
JW		 8924 specs[count] = tmpl;
8925 specs[count++].index = i;
8926 }
8927 }
8928 else if (note == 7)
8929 {
8930 valueT mask = 0;
8931 /* Mark only those registers indicated by the mask. */
8932 if (rsrc_write)
8933 {
8934 mask = CURR_SLOT.opnd[2].X_add_number;
8935 for (i = 1; i < 16; i++)
8936 if (mask & ((valueT) 1 << i))
8937 {
8938 specs[count] = tmpl;
8939 specs[count++].index = i;
8940 }
8941 }
8942 else
8943 {
8944 UNHANDLED;
8945 }
8946 }
8947 else if (note == 11) /* note 11 implies note 1 as well */
8948 {
8949 if (rsrc_write)
8950 {
8951 for (i = 0; i < idesc->num_outputs; i++)
8952 {
8953 if (idesc->operands[i] == IA64_OPND_P1
8954 || idesc->operands[i] == IA64_OPND_P2)
8955 {
8956 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8957 if (regno >= 1 && regno < 16)
8958 {
8959 specs[count] = tmpl;
8960 specs[count++].index = regno;
8961 }
8962 }
8963 }
8964 }
8965 else
8966 {
8967 UNHANDLED;
8968 }
8969 }
8970 else if (note == 12)
8971 {
8972 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8973 {
8974 specs[count] = tmpl;
8975 specs[count++].index = CURR_SLOT.qp_regno;
8976 }
8977 }
8978 else if (note == 1)
8979 {
8980 if (rsrc_write)
8981 {
8982 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8983 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8984 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8985 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8986
8987 if ((idesc->operands[0] == IA64_OPND_P1
8988 || idesc->operands[0] == IA64_OPND_P2)
8989 && p1 >= 1 && p1 < 16)
542d6675
KH		 8990 {
8991 specs[count] = tmpl;
139368c9
JW		 8992 specs[count].cmp_type =
8993 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8994 specs[count++].index = p1;
8995 }
8996 if ((idesc->operands[1] == IA64_OPND_P1
8997 || idesc->operands[1] == IA64_OPND_P2)
8998 && p2 >= 1 && p2 < 16)
8999 {
9000 specs[count] = tmpl;
9001 specs[count].cmp_type =
9002 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9003 specs[count++].index = p2;
542d6675
KH		 9004 }
9005 }
9006 else
9007 {
139368c9 9008 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 9009 {
9010 specs[count] = tmpl;
139368c9
JW		 9011 specs[count++].index = CURR_SLOT.qp_regno;
9012 }
9013 if (idesc->operands[1] == IA64_OPND_PR)
9014 {
9015 for (i = 1; i < 16; i++)
9016 {
9017 specs[count] = tmpl;
9018 specs[count++].index = i;
9019 }
542d6675
KH		 9020 }
9021 }
9022 }
139368c9
JW		 9023 else
9024 {
9025 UNHANDLED;
9026 }
9027 break;
9028
9029 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9030 simplified cases of this. */
9031 case IA64_RS_PRr:
9032 if (note == 0)
9033 {
9034 for (i = 16; i < 63; i++)
9035 {
9036 specs[count] = tmpl;
9037 specs[count++].index = i;
9038 }
9039 }
800eeca4 9040 else if (note == 7)
542d6675
KH		 9041 {
9042 valueT mask = 0;
9043 /* Mark only those registers indicated by the mask. */
9044 if (rsrc_write
9045 && idesc->operands[0] == IA64_OPND_PR)
9046 {
9047 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 9048 if (mask & ((valueT) 1 << 16))
139368c9
JW		 9049 for (i = 16; i < 63; i++)
9050 {
9051 specs[count] = tmpl;
9052 specs[count++].index = i;
9053 }
542d6675
KH		 9054 }
9055 else if (rsrc_write
9056 && idesc->operands[0] == IA64_OPND_PR_ROT)
9057 {
9058 for (i = 16; i < 63; i++)
9059 {
9060 specs[count] = tmpl;
9061 specs[count++].index = i;
9062 }
9063 }
9064 else
9065 {
9066 UNHANDLED;
9067 }
9068 }
800eeca4 9069 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 9070 {
9071 if (rsrc_write)
9072 {
9073 for (i = 0; i < idesc->num_outputs; i++)
9074 {
9075 if (idesc->operands[i] == IA64_OPND_P1
9076 || idesc->operands[i] == IA64_OPND_P2)
9077 {
9078 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 9079 if (regno >= 16 && regno < 63)
542d6675
KH		 9080 {
9081 specs[count] = tmpl;
9082 specs[count++].index = regno;
9083 }
9084 }
9085 }
9086 }
9087 else
9088 {
9089 UNHANDLED;
9090 }
9091 }
800eeca4 9092 else if (note == 12)
542d6675 9093 {
139368c9 9094 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9095 {
9096 specs[count] = tmpl;
9097 specs[count++].index = CURR_SLOT.qp_regno;
9098 }
9099 }
800eeca4 9100 else if (note == 1)
542d6675
KH		 9101 {
9102 if (rsrc_write)
9103 {
9104 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9105 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9106 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9107 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9108
542d6675
KH		 9109 if ((idesc->operands[0] == IA64_OPND_P1
9110 || idesc->operands[0] == IA64_OPND_P2)
139368c9 9111 && p1 >= 16 && p1 < 63)
542d6675
KH		 9112 {
9113 specs[count] = tmpl;
4a4f25cf 9114 specs[count].cmp_type =
7484b8e6 9115 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 9116 specs[count++].index = p1;
9117 }
9118 if ((idesc->operands[1] == IA64_OPND_P1
9119 || idesc->operands[1] == IA64_OPND_P2)
139368c9 9120 && p2 >= 16 && p2 < 63)
542d6675
KH		 9121 {
9122 specs[count] = tmpl;
4a4f25cf 9123 specs[count].cmp_type =
7484b8e6 9124 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 9125 specs[count++].index = p2;
9126 }
9127 }
9128 else
9129 {
139368c9 9130 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9131 {
9132 specs[count] = tmpl;
9133 specs[count++].index = CURR_SLOT.qp_regno;
9134 }
9135 if (idesc->operands[1] == IA64_OPND_PR)
9136 {
139368c9 9137 for (i = 16; i < 63; i++)
542d6675
KH		 9138 {
9139 specs[count] = tmpl;
9140 specs[count++].index = i;
9141 }
9142 }
9143 }
9144 }
197865e8 9145 else
542d6675
KH		 9146 {
9147 UNHANDLED;
9148 }
800eeca4
JW		 9149 break;
9150
9151 case IA64_RS_PSR:
197865e8 9152 /* Verify that the instruction is using the PSR bit indicated in
542d6675 9153 dep->regindex. */
800eeca4 9154 if (note == 0)
542d6675
KH		 9155 {
9156 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9157 {
9158 if (dep->regindex < 6)
9159 {
9160 specs[count++] = tmpl;
9161 }
9162 }
9163 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9164 {
9165 if (dep->regindex < 32
9166 || dep->regindex == 35
9167 || dep->regindex == 36
9168 || (!rsrc_write && dep->regindex == PSR_CPL))
9169 {
9170 specs[count++] = tmpl;
9171 }
9172 }
9173 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9174 {
9175 if (dep->regindex < 32
9176 || dep->regindex == 35
9177 || dep->regindex == 36
9178 || (rsrc_write && dep->regindex == PSR_CPL))
9179 {
9180 specs[count++] = tmpl;
9181 }
9182 }
9183 else
9184 {
9185 /* Several PSR bits have very specific dependencies. */
9186 switch (dep->regindex)
9187 {
9188 default:
9189 specs[count++] = tmpl;
9190 break;
9191 case PSR_IC:
9192 if (rsrc_write)
9193 {
9194 specs[count++] = tmpl;
9195 }
9196 else
9197 {
9198 /* Only certain CR accesses use PSR.ic */
9199 if (idesc->operands[0] == IA64_OPND_CR3
9200 || idesc->operands[1] == IA64_OPND_CR3)
9201 {
9202 int index =
9203 ((idesc->operands[0] == IA64_OPND_CR3)
9204 ? 0 : 1);
9205 int regno =
9206 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9207
9208 switch (regno)
9209 {
9210 default:
9211 break;
9212 case CR_ITIR:
9213 case CR_IFS:
9214 case CR_IIM:
9215 case CR_IIP:
9216 case CR_IPSR:
9217 case CR_ISR:
9218 case CR_IFA:
9219 case CR_IHA:
9220 case CR_IIPA:
9221 specs[count++] = tmpl;
9222 break;
9223 }
9224 }
9225 }
9226 break;
9227 case PSR_CPL:
9228 if (rsrc_write)
9229 {
9230 specs[count++] = tmpl;
9231 }
9232 else
9233 {
9234 /* Only some AR accesses use cpl */
9235 if (idesc->operands[0] == IA64_OPND_AR3
9236 || idesc->operands[1] == IA64_OPND_AR3)
9237 {
9238 int index =
9239 ((idesc->operands[0] == IA64_OPND_AR3)
9240 ? 0 : 1);
9241 int regno =
9242 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9243
9244 if (regno == AR_ITC
9245 || (index == 0
9246 && (regno == AR_ITC
9247 || regno == AR_RSC
9248 || (regno >= AR_K0
9249 && regno <= AR_K7))))
9250 {
9251 specs[count++] = tmpl;
9252 }
9253 }
9254 else
9255 {
9256 specs[count++] = tmpl;
9257 }
9258 break;
9259 }
9260 }
9261 }
9262 }
800eeca4 9263 else if (note == 7)
542d6675
KH		 9264 {
9265 valueT mask = 0;
9266 if (idesc->operands[0] == IA64_OPND_IMMU24)
9267 {
9268 mask = CURR_SLOT.opnd[0].X_add_number;
9269 }
9270 else
9271 {
9272 UNHANDLED;
9273 }
9274 if (mask & ((valueT) 1 << dep->regindex))
9275 {
9276 specs[count++] = tmpl;
9277 }
9278 }
800eeca4 9279 else if (note == 8)
542d6675
KH		 9280 {
9281 int min = dep->regindex == PSR_DFL ? 2 : 32;
9282 int max = dep->regindex == PSR_DFL ? 31 : 127;
9283 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9284 for (i = 0; i < NELEMS (idesc->operands); i++)
9285 {
9286 if (idesc->operands[i] == IA64_OPND_F1
9287 || idesc->operands[i] == IA64_OPND_F2
9288 || idesc->operands[i] == IA64_OPND_F3
9289 || idesc->operands[i] == IA64_OPND_F4)
9290 {
9291 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9292 if (reg >= min && reg <= max)
9293 {
9294 specs[count++] = tmpl;
9295 }
9296 }
9297 }
9298 }
800eeca4 9299 else if (note == 9)
542d6675
KH		 9300 {
9301 int min = dep->regindex == PSR_MFL ? 2 : 32;
9302 int max = dep->regindex == PSR_MFL ? 31 : 127;
9303 /* mfh is read on writes to FR32-127; mfl is read on writes to
9304 FR2-31 */
9305 for (i = 0; i < idesc->num_outputs; i++)
9306 {
9307 if (idesc->operands[i] == IA64_OPND_F1)
9308 {
9309 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9310 if (reg >= min && reg <= max)
9311 {
9312 specs[count++] = tmpl;
9313 }
9314 }
9315 }
9316 }
800eeca4 9317 else if (note == 10)
542d6675
KH		 9318 {
9319 for (i = 0; i < NELEMS (idesc->operands); i++)
9320 {
9321 if (idesc->operands[i] == IA64_OPND_R1
9322 || idesc->operands[i] == IA64_OPND_R2
9323 || idesc->operands[i] == IA64_OPND_R3)
9324 {
9325 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9326 if (regno >= 16 && regno <= 31)
9327 {
9328 specs[count++] = tmpl;
9329 }
9330 }
9331 }
9332 }
800eeca4 9333 else
542d6675
KH		 9334 {
9335 UNHANDLED;
9336 }
800eeca4
JW		 9337 break;
9338
9339 case IA64_RS_AR_FPSR:
9340 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9341 {
9342 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9343 if (regno == AR_FPSR)
9344 {
9345 specs[count++] = tmpl;
9346 }
9347 }
800eeca4 9348 else
542d6675
KH		 9349 {
9350 specs[count++] = tmpl;
9351 }
800eeca4
JW		 9352 break;
9353
197865e8 9354 case IA64_RS_ARX:
800eeca4
JW		 9355 /* Handle all AR[REG] resources */
9356 if (note == 0 || note == 1)
542d6675
KH		 9357 {
9358 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9359 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9360 && regno == dep->regindex)
9361 {
9362 specs[count++] = tmpl;
9363 }
9364 /* other AR[REG] resources may be affected by AR accesses */
9365 else if (idesc->operands[0] == IA64_OPND_AR3)
9366 {
9367 /* AR[] writes */
9368 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9369 switch (dep->regindex)
9370 {
9371 default:
9372 break;
9373 case AR_BSP:
9374 case AR_RNAT:
9375 if (regno == AR_BSPSTORE)
9376 {
9377 specs[count++] = tmpl;
9378 }
9379 case AR_RSC:
9380 if (!rsrc_write &&
9381 (regno == AR_BSPSTORE
9382 || regno == AR_RNAT))
9383 {
9384 specs[count++] = tmpl;
9385 }
9386 break;
9387 }
9388 }
9389 else if (idesc->operands[1] == IA64_OPND_AR3)
9390 {
9391 /* AR[] reads */
9392 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9393 switch (dep->regindex)
9394 {
9395 default:
9396 break;
9397 case AR_RSC:
9398 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9399 {
9400 specs[count++] = tmpl;
9401 }
9402 break;
9403 }
9404 }
9405 else
9406 {
9407 specs[count++] = tmpl;
9408 }
9409 }
800eeca4 9410 else
542d6675
KH		 9411 {
9412 UNHANDLED;
9413 }
800eeca4
JW		 9414 break;
9415
9416 case IA64_RS_CRX:
9417 /* Handle all CR[REG] resources */
9418 if (note == 0 || note == 1)
542d6675
KH		 9419 {
9420 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9421 {
9422 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9423 if (regno == dep->regindex)
9424 {
9425 specs[count++] = tmpl;
9426 }
9427 else if (!rsrc_write)
9428 {
9429 /* Reads from CR[IVR] affect other resources. */
9430 if (regno == CR_IVR)
9431 {
9432 if ((dep->regindex >= CR_IRR0
9433 && dep->regindex <= CR_IRR3)
9434 || dep->regindex == CR_TPR)
9435 {
9436 specs[count++] = tmpl;
9437 }
9438 }
9439 }
9440 }
9441 else
9442 {
9443 specs[count++] = tmpl;
9444 }
9445 }
800eeca4 9446 else
542d6675
KH		 9447 {
9448 UNHANDLED;
9449 }
800eeca4
JW		 9450 break;
9451
9452 case IA64_RS_INSERVICE:
9453 /* look for write of EOI (67) or read of IVR (65) */
9454 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9455 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9456 || (idesc->operands[1] == IA64_OPND_CR3
9457 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9458 {
9459 specs[count++] = tmpl;
9460 }
800eeca4
JW		 9461 break;
9462
9463 case IA64_RS_GR0:
9464 if (note == 1)
542d6675
KH		 9465 {
9466 specs[count++] = tmpl;
9467 }
800eeca4 9468 else
542d6675
KH		 9469 {
9470 UNHANDLED;
9471 }
800eeca4
JW		 9472 break;
9473
9474 case IA64_RS_CFM:
9475 if (note != 2)
542d6675
KH		 9476 {
9477 specs[count++] = tmpl;
9478 }
800eeca4 9479 else
542d6675
KH		 9480 {
9481 /* Check if any of the registers accessed are in the rotating region.
9482 mov to/from pr accesses CFM only when qp_regno is in the rotating
9483 region */
9484 for (i = 0; i < NELEMS (idesc->operands); i++)
9485 {
9486 if (idesc->operands[i] == IA64_OPND_R1
9487 || idesc->operands[i] == IA64_OPND_R2
9488 || idesc->operands[i] == IA64_OPND_R3)
9489 {
9490 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9491 /* Assumes that md.rot.num_regs is always valid */
9492 if (md.rot.num_regs > 0
9493 && num > 31
9494 && num < 31 + md.rot.num_regs)
9495 {
9496 specs[count] = tmpl;
9497 specs[count++].specific = 0;
9498 }
9499 }
9500 else if (idesc->operands[i] == IA64_OPND_F1
9501 || idesc->operands[i] == IA64_OPND_F2
9502 || idesc->operands[i] == IA64_OPND_F3
9503 || idesc->operands[i] == IA64_OPND_F4)
9504 {
9505 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9506 if (num > 31)
9507 {
9508 specs[count] = tmpl;
9509 specs[count++].specific = 0;
9510 }
9511 }
9512 else if (idesc->operands[i] == IA64_OPND_P1
9513 || idesc->operands[i] == IA64_OPND_P2)
9514 {
9515 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9516 if (num > 15)
9517 {
9518 specs[count] = tmpl;
9519 specs[count++].specific = 0;
9520 }
9521 }
9522 }
9523 if (CURR_SLOT.qp_regno > 15)
9524 {
9525 specs[count] = tmpl;
9526 specs[count++].specific = 0;
9527 }
9528 }
800eeca4
JW		 9529 break;
9530
139368c9
JW		 9531 /* This is the same as IA64_RS_PRr, except simplified to account for
9532 the fact that there is only one register. */
800eeca4
JW		 9533 case IA64_RS_PR63:
9534 if (note == 0)
542d6675
KH		 9535 {
9536 specs[count++] = tmpl;
9537 }
139368c9 9538 else if (note == 7)
40449e9f
KH		 9539 {
9540 valueT mask = 0;
9541 if (idesc->operands[2] == IA64_OPND_IMM17)
9542 mask = CURR_SLOT.opnd[2].X_add_number;
9543 if (mask & ((valueT) 1 << 63))
139368c9 9544 specs[count++] = tmpl;
40449e9f 9545 }
800eeca4 9546 else if (note == 11)
542d6675
KH		 9547 {
9548 if ((idesc->operands[0] == IA64_OPND_P1
9549 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9550 || (idesc->operands[1] == IA64_OPND_P2
9551 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9552 {
9553 specs[count++] = tmpl;
9554 }
9555 }
800eeca4 9556 else if (note == 12)
542d6675
KH		 9557 {
9558 if (CURR_SLOT.qp_regno == 63)
9559 {
9560 specs[count++] = tmpl;
9561 }
9562 }
800eeca4 9563 else if (note == 1)
542d6675
KH		 9564 {
9565 if (rsrc_write)
9566 {
40449e9f
KH		 9567 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9568 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9569 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9570 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9571
4a4f25cf 9572 if (p1 == 63
7484b8e6
TW		 9573 && (idesc->operands[0] == IA64_OPND_P1
9574 || idesc->operands[0] == IA64_OPND_P2))
9575 {
40449e9f 9576 specs[count] = tmpl;
4a4f25cf 9577 specs[count++].cmp_type =
7484b8e6
TW		 9578 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9579 }
9580 if (p2 == 63
9581 && (idesc->operands[1] == IA64_OPND_P1
9582 || idesc->operands[1] == IA64_OPND_P2))
9583 {
40449e9f 9584 specs[count] = tmpl;
4a4f25cf 9585 specs[count++].cmp_type =
7484b8e6
TW		 9586 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9587 }
542d6675
KH		 9588 }
9589 else
9590 {
9591 if (CURR_SLOT.qp_regno == 63)
9592 {
9593 specs[count++] = tmpl;
9594 }
9595 }
9596 }
800eeca4 9597 else
542d6675
KH		 9598 {
9599 UNHANDLED;
9600 }
800eeca4
JW		 9601 break;
9602
9603 case IA64_RS_RSE:
9604 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9605 read resources have not yet been completely identified, so for now
9606 treat RSE as a single resource */
800eeca4 9607 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9608 {
9609 if (rsrc_write)
9610 {
9611 if (idesc->operands[0] == IA64_OPND_AR3
9612 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9613 {
a66d2bb7 9614 specs[count++] = tmpl;
542d6675
KH		 9615 }
9616 }
9617 else
9618 {
9619 if (idesc->operands[0] == IA64_OPND_AR3)
9620 {
9621 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9622 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9623 {
9624 specs[count++] = tmpl;
9625 }
9626 }
9627 else if (idesc->operands[1] == IA64_OPND_AR3)
9628 {
9629 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9630 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9631 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9632 {
9633 specs[count++] = tmpl;
9634 }
9635 }
9636 }
9637 }
197865e8 9638 else
542d6675
KH		 9639 {
9640 specs[count++] = tmpl;
9641 }
800eeca4
JW		 9642 break;
9643
9644 case IA64_RS_ANY:
9645 /* FIXME -- do any of these need to be non-specific? */
9646 specs[count++] = tmpl;
9647 break;
9648
9649 default:
9650 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9651 break;
9652 }
9653
9654 return count;
9655}
9656
9657/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9658 QP of the marking instruction and a subsequent branch on the same QP. */
9659
800eeca4
JW		 9660static void
9661clear_qp_branch_flag (mask)
542d6675 9662 valueT mask;
800eeca4
JW		 9663{
9664 int i;
542d6675 9665 for (i = 0; i < regdepslen; i++)
800eeca4 9666 {
197865e8 9667 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9668 if ((bit & mask) != 0)
542d6675
KH		 9669 {
9670 regdeps[i].link_to_qp_branch = 0;
9671 }
800eeca4
JW		 9672 }
9673}
9674
5e2f6673
L		 9675/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9676 any mutexes which contain one of the PRs and create new ones when
9677 needed. */
9678
9679static int
9680update_qp_mutex (valueT mask)
9681{
9682 int i;
9683 int add = 0;
9684
9685 i = 0;
9686 while (i < qp_mutexeslen)
9687 {
9688 if ((qp_mutexes[i].prmask & mask) != 0)
9689 {
9690 /* If it destroys and creates the same mutex, do nothing. */
9691 if (qp_mutexes[i].prmask == mask
9692 && qp_mutexes[i].path == md.path)
9693 {
9694 i++;
9695 add = -1;
9696 }
9697 else
9698 {
9699 int keep = 0;
9700
9701 if (md.debug_dv)
9702 {
9703 fprintf (stderr, " Clearing mutex relation");
9704 print_prmask (qp_mutexes[i].prmask);
9705 fprintf (stderr, "\n");
9706 }
9707
9708 /* Deal with the old mutex with more than 3+ PRs only if
9709 the new mutex on the same execution path with it.
9710
9711 FIXME: The 3+ mutex support is incomplete.
9712 dot_pred_rel () may be a better place to fix it. */
9713 if (qp_mutexes[i].path == md.path)
9714 {
9715 /* If it is a proper subset of the mutex, create a
9716 new mutex. */
9717 if (add == 0
9718 && (qp_mutexes[i].prmask & mask) == mask)
9719 add = 1;
9720
9721 qp_mutexes[i].prmask &= ~mask;
9722 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9723 {
9724 /* Modify the mutex if there are more than one
9725 PR left. */
9726 keep = 1;
9727 i++;
9728 }
9729 }
9730
9731 if (keep == 0)
9732 /* Remove the mutex. */
9733 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9734 }
9735 }
9736 else
9737 ++i;
9738 }
9739
9740 if (add == 1)
9741 add_qp_mutex (mask);
9742
9743 return add;
9744}
9745
197865e8 9746/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9747
542d6675
KH		 9748 Any changes to a PR clears the mutex relations which include that PR. */
9749
800eeca4
JW		 9750static void
9751clear_qp_mutex (mask)
542d6675 9752 valueT mask;
800eeca4
JW		 9753{
9754 int i;
9755
9756 i = 0;
9757 while (i < qp_mutexeslen)
9758 {
9759 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9760 {
9761 if (md.debug_dv)
9762 {
9763 fprintf (stderr, " Clearing mutex relation");
9764 print_prmask (qp_mutexes[i].prmask);
9765 fprintf (stderr, "\n");
9766 }
9767 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9768 }
800eeca4 9769 else
542d6675 9770 ++i;
800eeca4
JW		 9771 }
9772}
9773
9774/* Clear implies relations which contain PRs in the given masks.
9775 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9776 indicates the implied PR. */
9777
800eeca4
JW		 9778static void
9779clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9780 valueT p1_mask;
9781 valueT p2_mask;
800eeca4
JW		 9782{
9783 int i;
9784
9785 i = 0;
9786 while (i < qp_implieslen)
9787 {
197865e8 9788 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9789 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9790 {
9791 if (md.debug_dv)
9792 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9793 qp_implies[i].p1, qp_implies[i].p2);
9794 qp_implies[i] = qp_implies[--qp_implieslen];
9795 }
197865e8 9796 else
542d6675 9797 ++i;
800eeca4
JW		 9798 }
9799}
9800
542d6675
KH		 9801/* Add the PRs specified to the list of implied relations. */
9802
800eeca4
JW		 9803static void
9804add_qp_imply (p1, p2)
542d6675 9805 int p1, p2;
800eeca4
JW		 9806{
9807 valueT mask;
9808 valueT bit;
9809 int i;
9810
542d6675 9811 /* p0 is not meaningful here. */
800eeca4
JW		 9812 if (p1 == 0 || p2 == 0)
9813 abort ();
9814
9815 if (p1 == p2)
9816 return;
9817
542d6675
KH		 9818 /* If it exists already, ignore it. */
9819 for (i = 0; i < qp_implieslen; i++)
800eeca4 9820 {
197865e8 9821 if (qp_implies[i].p1 == p1
542d6675
KH		 9822 && qp_implies[i].p2 == p2
9823 && qp_implies[i].path == md.path
9824 && !qp_implies[i].p2_branched)
9825 return;
800eeca4
JW		 9826 }
9827
9828 if (qp_implieslen == qp_impliestotlen)
9829 {
9830 qp_impliestotlen += 20;
9831 qp_implies = (struct qp_imply *)
542d6675
KH		 9832 xrealloc ((void *) qp_implies,
9833 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9834 }
9835 if (md.debug_dv)
9836 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9837 qp_implies[qp_implieslen].p1 = p1;
9838 qp_implies[qp_implieslen].p2 = p2;
9839 qp_implies[qp_implieslen].path = md.path;
9840 qp_implies[qp_implieslen++].p2_branched = 0;
9841
9842 /* Add in the implied transitive relations; for everything that p2 implies,
9843 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9844 as well. */
542d6675 9845 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9846 {
9847 if (qp_implies[i].p1 == p2)
542d6675 9848 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9849 if (qp_implies[i].p2 == p1)
542d6675 9850 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9851 }
9852 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9853 relation containing p2, duplicate it and replace p2 with p1. */
9854 bit = (valueT) 1 << p1;
9855 mask = (valueT) 1 << p2;
542d6675 9856 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9857 {
9858 if (qp_mutexes[i].prmask & mask)
542d6675 9859 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9860 }
9861}
9862
800eeca4
JW		 9863/* Add the PRs specified in the mask to the mutex list; this means that only
9864 one of the PRs can be true at any time. PR0 should never be included in
9865 the mask. */
542d6675 9866
800eeca4
JW		 9867static void
9868add_qp_mutex (mask)
542d6675 9869 valueT mask;
800eeca4
JW		 9870{
9871 if (mask & 0x1)
9872 abort ();
9873
9874 if (qp_mutexeslen == qp_mutexestotlen)
9875 {
9876 qp_mutexestotlen += 20;
9877 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9878 xrealloc ((void *) qp_mutexes,
9879 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9880 }
9881 if (md.debug_dv)
9882 {
9883 fprintf (stderr, " Registering mutex on");
9884 print_prmask (mask);
9885 fprintf (stderr, "\n");
9886 }
9887 qp_mutexes[qp_mutexeslen].path = md.path;
9888 qp_mutexes[qp_mutexeslen++].prmask = mask;
9889}
9890
cb5301b6
RH		 9891static int
9892has_suffix_p (name, suffix)
40449e9f
KH		 9893 const char *name;
9894 const char *suffix;
cb5301b6
RH		 9895{
9896 size_t namelen = strlen (name);
9897 size_t sufflen = strlen (suffix);
9898
9899 if (namelen <= sufflen)
9900 return 0;
9901 return strcmp (name + namelen - sufflen, suffix) == 0;
9902}
9903
800eeca4
JW		 9904static void
9905clear_register_values ()
9906{
9907 int i;
9908 if (md.debug_dv)
9909 fprintf (stderr, " Clearing register values\n");
542d6675 9910 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9911 gr_values[i].known = 0;
9912}
9913
9914/* Keep track of register values/changes which affect DV tracking.
9915
9916 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9917 have to examine a group of strings to identify them. */
800eeca4 9918
800eeca4
JW		 9919static void
9920note_register_values (idesc)
542d6675 9921 struct ia64_opcode *idesc;
800eeca4
JW		 9922{
9923 valueT qp_changemask = 0;
9924 int i;
9925
542d6675
KH		 9926 /* Invalidate values for registers being written to. */
9927 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9928 {
197865e8 9929 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9930 || idesc->operands[i] == IA64_OPND_R2
9931 || idesc->operands[i] == IA64_OPND_R3)
9932 {
9933 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9934 if (regno > 0 && regno < NELEMS (gr_values))
9935 gr_values[regno].known = 0;
9936 }
50b81f19
JW		 9937 else if (idesc->operands[i] == IA64_OPND_R3_2)
9938 {
9939 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9940 if (regno > 0 && regno < 4)
9941 gr_values[regno].known = 0;
9942 }
197865e8 9943 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9944 || idesc->operands[i] == IA64_OPND_P2)
9945 {
9946 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9947 qp_changemask |= (valueT) 1 << regno;
9948 }
800eeca4 9949 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9950 {
9951 if (idesc->operands[2] & (valueT) 0x10000)
9952 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9953 else
9954 qp_changemask = idesc->operands[2];
9955 break;
9956 }
800eeca4 9957 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9958 {
9959 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9960 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9961 else
9962 qp_changemask = idesc->operands[1];
9963 qp_changemask &= ~(valueT) 0xFFFF;
9964 break;
9965 }
9966 }
9967
9968 /* Always clear qp branch flags on any PR change. */
9969 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9970 clear_qp_branch_flag (qp_changemask);
9971
542d6675 9972 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9973 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9974 {
197865e8 9975 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9976 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9977 {
9978 for (i = 32; i < 32 + md.rot.num_regs; i++)
9979 gr_values[i].known = 0;
9980 }
800eeca4
JW		 9981 clear_qp_mutex (qp_changemask);
9982 clear_qp_implies (qp_changemask, qp_changemask);
9983 }
542d6675
KH		 9984 /* After a call, all register values are undefined, except those marked
9985 as "safe". */
800eeca4 9986 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9987 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9988 {
56d27c17 9989 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9990 clear_register_values ();
9991 clear_qp_mutex (~qp_safe_across_calls);
9992 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9993 clear_qp_branch_flag (~qp_safe_across_calls);
9994 }
e9718fe1 9995 else if (is_interruption_or_rfi (idesc)
542d6675 9996 || is_taken_branch (idesc))
e9718fe1
TW		 9997 {
9998 clear_register_values ();
197865e8
KH		 9999 clear_qp_mutex (~(valueT) 0);
10000 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 10001 }
542d6675 10002 /* Look for mutex and implies relations. */
197865e8 10003 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 10004 || idesc->operands[0] == IA64_OPND_P2)
10005 && (idesc->operands[1] == IA64_OPND_P1
10006 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 10007 {
10008 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 10009 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 10010 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
10011 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 10012
5e2f6673
L		 10013 /* If both PRs are PR0, we can't really do anything. */
10014 if (p1 == 0 && p2 == 0)
542d6675
KH		 10015 {
10016 if (md.debug_dv)
10017 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
10018 }
800eeca4 10019 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 10020 with the following exceptions. */
cb5301b6
RH		 10021 else if (has_suffix_p (idesc->name, ".or.andcm")
10022 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 10023 {
542d6675
KH		 10024 clear_qp_implies (p2mask, p1mask);
10025 }
cb5301b6
RH		 10026 else if (has_suffix_p (idesc->name, ".andcm")
10027 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 10028 {
10029 clear_qp_implies (0, p1mask | p2mask);
10030 }
cb5301b6
RH		 10031 else if (has_suffix_p (idesc->name, ".orcm")
10032 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 10033 {
10034 clear_qp_mutex (p1mask | p2mask);
10035 clear_qp_implies (p1mask | p2mask, 0);
10036 }
800eeca4 10037 else
542d6675 10038 {
5e2f6673
L		 10039 int added = 0;
10040
542d6675 10041 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 10042
10043 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10044 if (p1 == 0 || p2 == 0)
10045 clear_qp_mutex (p1mask | p2mask);
10046 else
10047 added = update_qp_mutex (p1mask | p2mask);
10048
10049 if (CURR_SLOT.qp_regno == 0
10050 || has_suffix_p (idesc->name, ".unc"))
542d6675 10051 {
5e2f6673
L		 10052 if (added == 0 && p1 && p2)
10053 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 10054 if (CURR_SLOT.qp_regno != 0)
10055 {
5e2f6673
L		 10056 if (p1)
10057 add_qp_imply (p1, CURR_SLOT.qp_regno);
10058 if (p2)
10059 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 10060 }
10061 }
542d6675
KH		 10062 }
10063 }
10064 /* Look for mov imm insns into GRs. */
800eeca4 10065 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 10066 && (idesc->operands[1] == IA64_OPND_IMM22
10067 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 10068 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 10069 && (strcmp (idesc->name, "mov") == 0
10070 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 10071 {
10072 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 10073 if (regno > 0 && regno < NELEMS (gr_values))
10074 {
10075 gr_values[regno].known = 1;
10076 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
10077 gr_values[regno].path = md.path;
10078 if (md.debug_dv)
2434f565
JW		 10079 {
10080 fprintf (stderr, " Know gr%d = ", regno);
10081 fprintf_vma (stderr, gr_values[regno].value);
10082 fputs ("\n", stderr);
10083 }
542d6675 10084 }
800eeca4 10085 }
a66d2bb7
JB		 10086 /* Look for dep.z imm insns. */
10087 else if (idesc->operands[0] == IA64_OPND_R1
10088 && idesc->operands[1] == IA64_OPND_IMM8
10089 && strcmp (idesc->name, "dep.z") == 0)
10090 {
10091 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
10092 if (regno > 0 && regno < NELEMS (gr_values))
10093 {
10094 valueT value = CURR_SLOT.opnd[1].X_add_number;
10095
10096 if (CURR_SLOT.opnd[3].X_add_number < 64)
10097 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
10098 value <<= CURR_SLOT.opnd[2].X_add_number;
10099 gr_values[regno].known = 1;
10100 gr_values[regno].value = value;
10101 gr_values[regno].path = md.path;
10102 if (md.debug_dv)
10103 {
10104 fprintf (stderr, " Know gr%d = ", regno);
10105 fprintf_vma (stderr, gr_values[regno].value);
10106 fputs ("\n", stderr);
10107 }
10108 }
10109 }
197865e8 10110 else
800eeca4
JW		 10111 {
10112 clear_qp_mutex (qp_changemask);
10113 clear_qp_implies (qp_changemask, qp_changemask);
10114 }
10115}
10116
542d6675
KH		 10117/* Return whether the given predicate registers are currently mutex. */
10118
800eeca4
JW		 10119static int
10120qp_mutex (p1, p2, path)
542d6675
KH		 10121 int p1;
10122 int p2;
10123 int path;
800eeca4
JW		 10124{
10125 int i;
10126 valueT mask;
10127
10128 if (p1 != p2)
10129 {
542d6675
KH		 10130 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
10131 for (i = 0; i < qp_mutexeslen; i++)
10132 {
10133 if (qp_mutexes[i].path >= path
10134 && (qp_mutexes[i].prmask & mask) == mask)
10135 return 1;
10136 }
800eeca4
JW		 10137 }
10138 return 0;
10139}
10140
10141/* Return whether the given resource is in the given insn's list of chks
10142 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 10143 conflict. */
10144
800eeca4
JW		 10145static int
10146resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 10147 struct rsrc *rs;
10148 struct ia64_opcode *idesc;
10149 int note;
10150 int qp_regno;
10151 int path;
800eeca4
JW		 10152{
10153 struct rsrc specs[MAX_SPECS];
10154 int count;
10155
10156 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10157 we don't need to check. One exception is note 11, which indicates that
10158 target predicates are written regardless of PR[qp]. */
197865e8 10159 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 10160 && note != 11)
10161 return 0;
10162
10163 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
10164 while (count-- > 0)
10165 {
10166 /* UNAT checking is a bit more specific than other resources */
10167 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 10168 && specs[count].mem_offset.hint
10169 && rs->mem_offset.hint)
10170 {
10171 if (rs->mem_offset.base == specs[count].mem_offset.base)
10172 {
10173 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
10174 ((specs[count].mem_offset.offset >> 3) & 0x3F))
10175 return 1;
10176 else
10177 continue;
10178 }
10179 }
800eeca4 10180
7484b8e6 10181 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 10182 writes are an OR. */
7484b8e6 10183 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 10184 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 10185 || rs->dependency->specifier == IA64_RS_PR63)
10186 {
10187 if (specs[count].cmp_type != CMP_NONE
10188 && specs[count].cmp_type == rs->cmp_type)
10189 {
10190 if (md.debug_dv)
10191 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10192 dv_mode[rs->dependency->mode],
afa680f8 10193 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 10194 specs[count].index : 63);
10195 continue;
10196 }
10197 if (md.debug_dv)
4a4f25cf 10198 fprintf (stderr,
7484b8e6
TW		 10199 " %s on parallel compare conflict %s vs %s on PR%d\n",
10200 dv_mode[rs->dependency->mode],
4a4f25cf 10201 dv_cmp_type[rs->cmp_type],
7484b8e6 10202 dv_cmp_type[specs[count].cmp_type],
afa680f8 10203 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 10204 specs[count].index : 63);
4a4f25cf 10205
7484b8e6
TW		 10206 }
10207
800eeca4 10208 /* If either resource is not specific, conservatively assume a conflict
197865e8 10209 */
800eeca4 10210 if (!specs[count].specific || !rs->specific)
542d6675 10211 return 2;
800eeca4 10212 else if (specs[count].index == rs->index)
542d6675 10213 return 1;
800eeca4 10214 }
800eeca4
JW		 10215
10216 return 0;
10217}
10218
10219/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10220 insert a stop to create the break. Update all resource dependencies
10221 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10222 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10223 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 10224 instruction. */
800eeca4
JW		 10225
10226static void
10227insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 10228 int insert_stop;
10229 int qp_regno;
10230 int save_current;
800eeca4
JW		 10231{
10232 int i;
10233
10234 if (insert_stop && md.num_slots_in_use > 0)
10235 PREV_SLOT.end_of_insn_group = 1;
10236
10237 if (md.debug_dv)
10238 {
197865e8 10239 fprintf (stderr, " Insn group break%s",
542d6675 10240 (insert_stop ? " (w/stop)" : ""));
800eeca4 10241 if (qp_regno != 0)
542d6675 10242 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 10243 fprintf (stderr, "\n");
10244 }
10245
10246 i = 0;
10247 while (i < regdepslen)
10248 {
10249 const struct ia64_dependency *dep = regdeps[i].dependency;
10250
10251 if (qp_regno != 0
542d6675
KH		 10252 && regdeps[i].qp_regno != qp_regno)
10253 {
10254 ++i;
10255 continue;
10256 }
800eeca4
JW		 10257
10258 if (save_current
542d6675
KH		 10259 && CURR_SLOT.src_file == regdeps[i].file
10260 && CURR_SLOT.src_line == regdeps[i].line)
10261 {
10262 ++i;
10263 continue;
10264 }
800eeca4
JW		 10265
10266 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10267 those that have reached the appropriate state of insn serialization */
800eeca4 10268 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10269 || dep->semantics == IA64_DVS_IMPLIEDF
10270 || regdeps[i].insn_srlz == STATE_SRLZ)
10271 {
10272 print_dependency ("Removing", i);
10273 regdeps[i] = regdeps[--regdepslen];
10274 }
800eeca4 10275 else
542d6675
KH		 10276 {
10277 if (dep->semantics == IA64_DVS_DATA
10278 || dep->semantics == IA64_DVS_INSTR
800eeca4 10279 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10280 {
10281 if (regdeps[i].insn_srlz == STATE_NONE)
10282 regdeps[i].insn_srlz = STATE_STOP;
10283 if (regdeps[i].data_srlz == STATE_NONE)
10284 regdeps[i].data_srlz = STATE_STOP;
10285 }
10286 ++i;
10287 }
800eeca4
JW		 10288 }
10289}
10290
542d6675
KH		 10291/* Add the given resource usage spec to the list of active dependencies. */
10292
197865e8 10293static void
800eeca4 10294mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10295 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10296 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10297 struct rsrc *spec;
10298 int depind;
10299 int path;
800eeca4
JW		 10300{
10301 if (regdepslen == regdepstotlen)
10302 {
10303 regdepstotlen += 20;
10304 regdeps = (struct rsrc *)
542d6675 10305 xrealloc ((void *) regdeps,
bc805888 10306 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10307 }
10308
10309 regdeps[regdepslen] = *spec;
10310 regdeps[regdepslen].depind = depind;
10311 regdeps[regdepslen].path = path;
10312 regdeps[regdepslen].file = CURR_SLOT.src_file;
10313 regdeps[regdepslen].line = CURR_SLOT.src_line;
10314
10315 print_dependency ("Adding", regdepslen);
10316
10317 ++regdepslen;
10318}
10319
10320static void
10321print_dependency (action, depind)
542d6675
KH		 10322 const char *action;
10323 int depind;
800eeca4
JW		 10324{
10325 if (md.debug_dv)
10326 {
197865e8 10327 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10328 action, dv_mode[(regdeps[depind].dependency)->mode],
10329 (regdeps[depind].dependency)->name);
a66d2bb7 10330 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10331 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10332 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10333 {
10334 fputs (" ", stderr);
10335 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10336 fputs ("+", stderr);
10337 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10338 }
800eeca4
JW		 10339 fprintf (stderr, "\n");
10340 }
10341}
10342
10343static void
10344instruction_serialization ()
10345{
10346 int i;
10347 if (md.debug_dv)
10348 fprintf (stderr, " Instruction serialization\n");
542d6675 10349 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10350 if (regdeps[i].insn_srlz == STATE_STOP)
10351 regdeps[i].insn_srlz = STATE_SRLZ;
10352}
10353
10354static void
10355data_serialization ()
10356{
10357 int i = 0;
10358 if (md.debug_dv)
10359 fprintf (stderr, " Data serialization\n");
10360 while (i < regdepslen)
10361 {
10362 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10363 /* Note: as of 991210, all "other" dependencies are cleared by a
10364 data serialization. This might change with new tables */
10365 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10366 {
10367 print_dependency ("Removing", i);
10368 regdeps[i] = regdeps[--regdepslen];
10369 }
800eeca4 10370 else
542d6675 10371 ++i;
800eeca4
JW		 10372 }
10373}
10374
542d6675
KH		 10375/* Insert stops and serializations as needed to avoid DVs. */
10376
800eeca4
JW		 10377static void
10378remove_marked_resource (rs)
542d6675 10379 struct rsrc *rs;
800eeca4
JW		 10380{
10381 switch (rs->dependency->semantics)
10382 {
10383 case IA64_DVS_SPECIFIC:
10384 if (md.debug_dv)
10385 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10386 /* ...fall through... */
800eeca4
JW		 10387 case IA64_DVS_INSTR:
10388 if (md.debug_dv)
542d6675 10389 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10390 if (rs->insn_srlz < STATE_STOP)
542d6675 10391 insn_group_break (1, 0, 0);
800eeca4 10392 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10393 {
888a75be 10394 struct slot oldslot = CURR_SLOT;
542d6675 10395 /* Manually jam a srlz.i insn into the stream */
888a75be 10396 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10397 CURR_SLOT.user_template = -1;
542d6675
KH		 10398 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10399 instruction_serialization ();
10400 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10401 if (++md.num_slots_in_use >= NUM_SLOTS)
10402 emit_one_bundle ();
888a75be 10403 CURR_SLOT = oldslot;
542d6675 10404 }
800eeca4
JW		 10405 insn_group_break (1, 0, 0);
10406 break;
10407 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10408 "other" types of DV are eliminated
10409 by a data serialization */
800eeca4
JW		 10410 case IA64_DVS_DATA:
10411 if (md.debug_dv)
542d6675 10412 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10413 if (rs->data_srlz < STATE_STOP)
542d6675 10414 insn_group_break (1, 0, 0);
800eeca4 10415 {
888a75be 10416 struct slot oldslot = CURR_SLOT;
542d6675 10417 /* Manually jam a srlz.d insn into the stream */
888a75be 10418 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10419 CURR_SLOT.user_template = -1;
542d6675
KH		 10420 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10421 data_serialization ();
10422 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10423 if (++md.num_slots_in_use >= NUM_SLOTS)
10424 emit_one_bundle ();
888a75be 10425 CURR_SLOT = oldslot;
800eeca4
JW		 10426 }
10427 break;
10428 case IA64_DVS_IMPLIED:
10429 case IA64_DVS_IMPLIEDF:
10430 if (md.debug_dv)
542d6675 10431 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10432 insn_group_break (1, 0, 0);
10433 break;
10434 default:
10435 break;
10436 }
10437}
10438
10439/* Check the resources used by the given opcode against the current dependency
197865e8 10440 list.
800eeca4
JW		 10441
10442 The check is run once for each execution path encountered. In this case,
10443 a unique execution path is the sequence of instructions following a code
10444 entry point, e.g. the following has three execution paths, one starting
10445 at L0, one at L1, and one at L2.
197865e8 10446
800eeca4
JW		 10447 L0: nop
10448 L1: add
10449 L2: add
197865e8 10450 br.ret
800eeca4 10451*/
542d6675 10452
800eeca4
JW		 10453static void
10454check_dependencies (idesc)
542d6675 10455 struct ia64_opcode *idesc;
800eeca4
JW		 10456{
10457 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10458 int path;
10459 int i;
10460
10461 /* Note that the number of marked resources may change within the
197865e8 10462 loop if in auto mode. */
800eeca4
JW		 10463 i = 0;
10464 while (i < regdepslen)
10465 {
10466 struct rsrc *rs = &regdeps[i];
10467 const struct ia64_dependency *dep = rs->dependency;
10468 int chkind;
10469 int note;
10470 int start_over = 0;
10471
10472 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10473 || (chkind = depends_on (rs->depind, idesc)) == -1)
10474 {
10475 ++i;
10476 continue;
10477 }
10478
10479 note = NOTE (opdeps->chks[chkind]);
10480
10481 /* Check this resource against each execution path seen thus far. */
10482 for (path = 0; path <= md.path; path++)
10483 {
10484 int matchtype;
10485
10486 /* If the dependency wasn't on the path being checked, ignore it. */
10487 if (rs->path < path)
10488 continue;
10489
10490 /* If the QP for this insn implies a QP which has branched, don't
10491 bother checking. Ed. NOTE: I don't think this check is terribly
10492 useful; what's the point of generating code which will only be
10493 reached if its QP is zero?
10494 This code was specifically inserted to handle the following code,
10495 based on notes from Intel's DV checking code, where p1 implies p2.
10496
10497 mov r4 = 2
10498 (p2) br.cond L
10499 (p1) mov r4 = 7
10500 */
10501 if (CURR_SLOT.qp_regno != 0)
10502 {
10503 int skip = 0;
10504 int implies;
10505 for (implies = 0; implies < qp_implieslen; implies++)
10506 {
10507 if (qp_implies[implies].path >= path
10508 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10509 && qp_implies[implies].p2_branched)
10510 {
10511 skip = 1;
10512 break;
10513 }
10514 }
10515 if (skip)
10516 continue;
10517 }
10518
10519 if ((matchtype = resources_match (rs, idesc, note,
10520 CURR_SLOT.qp_regno, path)) != 0)
10521 {
10522 char msg[1024];
10523 char pathmsg[256] = "";
10524 char indexmsg[256] = "";
10525 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10526
10527 if (path != 0)
10528 sprintf (pathmsg, " when entry is at label '%s'",
10529 md.entry_labels[path - 1]);
a66d2bb7 10530 if (matchtype == 1 && rs->index >= 0)
542d6675
KH		 10531 sprintf (indexmsg, ", specific resource number is %d",
10532 rs->index);
10533 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10534 idesc->name,
10535 (certain ? "violates" : "may violate"),
10536 dv_mode[dep->mode], dep->name,
10537 dv_sem[dep->semantics],
10538 pathmsg, indexmsg);
10539
10540 if (md.explicit_mode)
10541 {
10542 as_warn ("%s", msg);
10543 if (path < md.path)
10544 as_warn (_("Only the first path encountering the conflict "
10545 "is reported"));
10546 as_warn_where (rs->file, rs->line,
10547 _("This is the location of the "
10548 "conflicting usage"));
10549 /* Don't bother checking other paths, to avoid duplicating
10550 the same warning */
10551 break;
10552 }
10553 else
10554 {
10555 if (md.debug_dv)
10556 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10557
10558 remove_marked_resource (rs);
10559
10560 /* since the set of dependencies has changed, start over */
10561 /* FIXME -- since we're removing dvs as we go, we
10562 probably don't really need to start over... */
10563 start_over = 1;
10564 break;
10565 }
10566 }
10567 }
800eeca4 10568 if (start_over)
542d6675 10569 i = 0;
800eeca4 10570 else
542d6675 10571 ++i;
800eeca4
JW		 10572 }
10573}
10574
542d6675
KH		 10575/* Register new dependencies based on the given opcode. */
10576
800eeca4
JW		 10577static void
10578mark_resources (idesc)
542d6675 10579 struct ia64_opcode *idesc;
800eeca4
JW		 10580{
10581 int i;
10582 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10583 int add_only_qp_reads = 0;
10584
10585 /* A conditional branch only uses its resources if it is taken; if it is
10586 taken, we stop following that path. The other branch types effectively
10587 *always* write their resources. If it's not taken, register only QP
197865e8 10588 reads. */
800eeca4
JW		 10589 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10590 {
10591 add_only_qp_reads = 1;
10592 }
10593
10594 if (md.debug_dv)
10595 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10596
542d6675 10597 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10598 {
10599 const struct ia64_dependency *dep;
10600 struct rsrc specs[MAX_SPECS];
10601 int note;
10602 int path;
10603 int count;
197865e8 10604
800eeca4 10605 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10606 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10607
10608 if (add_only_qp_reads
542d6675
KH		 10609 && !(dep->mode == IA64_DV_WAR
10610 && (dep->specifier == IA64_RS_PR
139368c9 10611 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10612 || dep->specifier == IA64_RS_PR63)))
10613 continue;
800eeca4
JW		 10614
10615 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10616
800eeca4 10617 while (count-- > 0)
542d6675
KH		 10618 {
10619 mark_resource (idesc, dep, &specs[count],
10620 DEP (opdeps->regs[i]), md.path);
10621 }
800eeca4
JW		 10622
10623 /* The execution path may affect register values, which may in turn
542d6675 10624 affect which indirect-access resources are accessed. */
800eeca4 10625 switch (dep->specifier)
542d6675
KH		 10626 {
10627 default:
10628 break;
10629 case IA64_RS_CPUID:
10630 case IA64_RS_DBR:
10631 case IA64_RS_IBR:
800eeca4 10632 case IA64_RS_MSR:
542d6675
KH		 10633 case IA64_RS_PKR:
10634 case IA64_RS_PMC:
10635 case IA64_RS_PMD:
10636 case IA64_RS_RR:
10637 for (path = 0; path < md.path; path++)
10638 {
10639 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10640 while (count-- > 0)
10641 mark_resource (idesc, dep, &specs[count],
10642 DEP (opdeps->regs[i]), path);
10643 }
10644 break;
10645 }
10646 }
10647}
10648
10649/* Remove dependencies when they no longer apply. */
10650
800eeca4
JW		 10651static void
10652update_dependencies (idesc)
542d6675 10653 struct ia64_opcode *idesc;
800eeca4
JW		 10654{
10655 int i;
10656
10657 if (strcmp (idesc->name, "srlz.i") == 0)
10658 {
10659 instruction_serialization ();
10660 }
10661 else if (strcmp (idesc->name, "srlz.d") == 0)
10662 {
10663 data_serialization ();
10664 }
10665 else if (is_interruption_or_rfi (idesc)
542d6675 10666 || is_taken_branch (idesc))
800eeca4 10667 {
542d6675
KH		 10668 /* Although technically the taken branch doesn't clear dependencies
10669 which require a srlz.[id], we don't follow the branch; the next
10670 instruction is assumed to start with a clean slate. */
800eeca4 10671 regdepslen = 0;
800eeca4
JW		 10672 md.path = 0;
10673 }
10674 else if (is_conditional_branch (idesc)
542d6675 10675 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10676 {
10677 int is_call = strstr (idesc->name, ".call") != NULL;
10678
542d6675
KH		 10679 for (i = 0; i < qp_implieslen; i++)
10680 {
10681 /* If the conditional branch's predicate is implied by the predicate
10682 in an existing dependency, remove that dependency. */
10683 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10684 {
10685 int depind = 0;
10686 /* Note that this implied predicate takes a branch so that if
10687 a later insn generates a DV but its predicate implies this
10688 one, we can avoid the false DV warning. */
10689 qp_implies[i].p2_branched = 1;
10690 while (depind < regdepslen)
10691 {
10692 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10693 {
10694 print_dependency ("Removing", depind);
10695 regdeps[depind] = regdeps[--regdepslen];
10696 }
10697 else
10698 ++depind;
10699 }
10700 }
10701 }
800eeca4 10702 /* Any marked resources which have this same predicate should be
542d6675
KH		 10703 cleared, provided that the QP hasn't been modified between the
10704 marking instruction and the branch. */
800eeca4 10705 if (is_call)
542d6675
KH		 10706 {
10707 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10708 }
800eeca4 10709 else
542d6675
KH		 10710 {
10711 i = 0;
10712 while (i < regdepslen)
10713 {
10714 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10715 && regdeps[i].link_to_qp_branch
10716 && (regdeps[i].file != CURR_SLOT.src_file
10717 || regdeps[i].line != CURR_SLOT.src_line))
10718 {
10719 /* Treat like a taken branch */
10720 print_dependency ("Removing", i);
10721 regdeps[i] = regdeps[--regdepslen];
10722 }
10723 else
10724 ++i;
10725 }
10726 }
800eeca4
JW		 10727 }
10728}
10729
10730/* Examine the current instruction for dependency violations. */
542d6675 10731
800eeca4
JW		 10732static int
10733check_dv (idesc)
542d6675 10734 struct ia64_opcode *idesc;
800eeca4
JW		 10735{
10736 if (md.debug_dv)
10737 {
197865e8 10738 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10739 idesc->name, CURR_SLOT.src_line,
10740 idesc->dependencies->nchks,
10741 idesc->dependencies->nregs);
800eeca4
JW		 10742 }
10743
197865e8 10744 /* Look through the list of currently marked resources; if the current
800eeca4 10745 instruction has the dependency in its chks list which uses that resource,
542d6675 10746 check against the specific resources used. */
800eeca4
JW		 10747 check_dependencies (idesc);
10748
542d6675
KH		 10749 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10750 then add them to the list of marked resources. */
800eeca4
JW		 10751 mark_resources (idesc);
10752
10753 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10754 requirements for being cleared
10755
800eeca4
JW		 10756 Instruction serialization (insns separated by interruption, rfi, or
10757 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10758
10759 Data serialization (instruction serialization, or writer + srlz.d +
10760 reader, where writer and srlz.d are in separate groups) clears
10761 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10762 always be the case).
10763
10764 Instruction group break (groups separated by stop, taken branch,
10765 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10766 */
10767 update_dependencies (idesc);
10768
10769 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10770 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10771 note_register_values (idesc);
10772
197865e8 10773 /* We don't need or want this anymore. */
800eeca4
JW		 10774 md.mem_offset.hint = 0;
10775
10776 return 0;
10777}
10778
10779/* Translate one line of assembly. Pseudo ops and labels do not show
10780 here. */
10781void
10782md_assemble (str)
10783 char *str;
10784{
10785 char *saved_input_line_pointer, *mnemonic;
10786 const struct pseudo_opcode *pdesc;
10787 struct ia64_opcode *idesc;
10788 unsigned char qp_regno;
10789 unsigned int flags;
10790 int ch;
10791
10792 saved_input_line_pointer = input_line_pointer;
10793 input_line_pointer = str;
10794
542d6675 10795 /* extract the opcode (mnemonic): */
800eeca4
JW		 10796
10797 mnemonic = input_line_pointer;
10798 ch = get_symbol_end ();
10799 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10800 if (pdesc)
10801 {
10802 *input_line_pointer = ch;
10803 (*pdesc->handler) (pdesc->arg);
10804 goto done;
10805 }
10806
542d6675 10807 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10808
10809 idesc = ia64_find_opcode (mnemonic);
10810 *input_line_pointer = ch;
10811 if (!idesc)
10812 {
10813 as_bad ("Unknown opcode `%s'", mnemonic);
10814 goto done;
10815 }
10816
10817 idesc = parse_operands (idesc);
10818 if (!idesc)
10819 goto done;
10820
542d6675 10821 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10822 if (idesc->type == IA64_TYPE_DYN)
10823 {
10824 if (strcmp (idesc->name, "add") == 0)
10825 {
10826 if (CURR_SLOT.opnd[2].X_op == O_register
10827 && CURR_SLOT.opnd[2].X_add_number < 4)
10828 mnemonic = "addl";
10829 else
10830 mnemonic = "adds";
3d56ab85 10831 ia64_free_opcode (idesc);
800eeca4 10832 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10833 }
10834 else if (strcmp (idesc->name, "mov") == 0)
10835 {
10836 enum ia64_opnd opnd1, opnd2;
10837 int rop;
10838
10839 opnd1 = idesc->operands[0];
10840 opnd2 = idesc->operands[1];
10841 if (opnd1 == IA64_OPND_AR3)
10842 rop = 0;
10843 else if (opnd2 == IA64_OPND_AR3)
10844 rop = 1;
10845 else
10846 abort ();
652ca075
L		 10847 if (CURR_SLOT.opnd[rop].X_op == O_register)
10848 {
10849 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10850 mnemonic = "mov.i";
97762d08 10851 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10852 mnemonic = "mov.m";
97762d08
JB		 10853 else
10854 rop = -1;
652ca075 10855 }
800eeca4 10856 else
652ca075 10857 abort ();
97762d08
JB		 10858 if (rop >= 0)
10859 {
10860 ia64_free_opcode (idesc);
10861 idesc = ia64_find_opcode (mnemonic);
10862 while (idesc != NULL
10863 && (idesc->operands[0] != opnd1
10864 || idesc->operands[1] != opnd2))
10865 idesc = get_next_opcode (idesc);
10866 }
800eeca4
JW		 10867 }
10868 }
652ca075
L		 10869 else if (strcmp (idesc->name, "mov.i") == 0
10870 || strcmp (idesc->name, "mov.m") == 0)
10871 {
10872 enum ia64_opnd opnd1, opnd2;
10873 int rop;
10874
10875 opnd1 = idesc->operands[0];
10876 opnd2 = idesc->operands[1];
10877 if (opnd1 == IA64_OPND_AR3)
10878 rop = 0;
10879 else if (opnd2 == IA64_OPND_AR3)
10880 rop = 1;
10881 else
10882 abort ();
10883 if (CURR_SLOT.opnd[rop].X_op == O_register)
10884 {
10885 char unit = 'a';
10886 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10887 unit = 'i';
10888 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10889 unit = 'm';
10890 if (unit != 'a' && unit != idesc->name [4])
80b8152b 10891 as_bad ("AR %d can only be accessed by %c-unit",
652ca075
L		 10892 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10893 TOUPPER (unit));
10894 }
10895 }
91d777ee
L		 10896 else if (strcmp (idesc->name, "hint.b") == 0)
10897 {
10898 switch (md.hint_b)
10899 {
10900 case hint_b_ok:
10901 break;
10902 case hint_b_warning:
10903 as_warn ("hint.b may be treated as nop");
10904 break;
10905 case hint_b_error:
10906 as_bad ("hint.b shouldn't be used");
10907 break;
10908 }
10909 }
800eeca4
JW		 10910
10911 qp_regno = 0;
10912 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10913 {
10914 qp_regno = md.qp.X_add_number - REG_P;
10915 md.qp.X_op = O_absent;
10916 }
800eeca4
JW		 10917
10918 flags = idesc->flags;
10919
10920 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10921 {
10922 /* The alignment frag has to end with a stop bit only if the
10923 next instruction after the alignment directive has to be
10924 the first instruction in an instruction group. */
10925 if (align_frag)
10926 {
10927 while (align_frag->fr_type != rs_align_code)
10928 {
10929 align_frag = align_frag->fr_next;
bae25f19
L		 10930 if (!align_frag)
10931 break;
9545c4ce 10932 }
bae25f19
L		 10933 /* align_frag can be NULL if there are directives in
10934 between. */
10935 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10936 align_frag->tc_frag_data = 1;
10937 }
10938
10939 insn_group_break (1, 0, 0);
10940 }
10941 align_frag = NULL;
800eeca4
JW		 10942
10943 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10944 {
10945 as_bad ("`%s' cannot be predicated", idesc->name);
10946 goto done;
10947 }
10948
542d6675 10949 /* Build the instruction. */
800eeca4
JW		 10950 CURR_SLOT.qp_regno = qp_regno;
10951 CURR_SLOT.idesc = idesc;
10952 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10953 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4 10954
ba825241 10955 /* Add unwind entries, if there are any. */
e0c9811a 10956 if (unwind.current_entry)
800eeca4 10957 {
e0c9811a
JW		 10958 CURR_SLOT.unwind_record = unwind.current_entry;
10959 unwind.current_entry = NULL;
800eeca4 10960 }
ba825241
JB		 10961 if (unwind.pending_saves)
10962 {
10963 if (unwind.pending_saves->next)
10964 {
10965 /* Attach the next pending save to the next slot so that its
10966 slot number will get set correctly. */
10967 add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR);
10968 unwind.pending_saves = &unwind.pending_saves->next->r.record.p;
10969 }
10970 else
10971 unwind.pending_saves = NULL;
10972 }
5656b6b8 10973 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym))
75e09913 10974 unwind.insn = 1;
800eeca4 10975
542d6675 10976 /* Check for dependency violations. */
800eeca4 10977 if (md.detect_dv)
542d6675 10978 check_dv (idesc);
800eeca4
JW		 10979
10980 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10981 if (++md.num_slots_in_use >= NUM_SLOTS)
10982 emit_one_bundle ();
10983
10984 if ((flags & IA64_OPCODE_LAST) != 0)
10985 insn_group_break (1, 0, 0);
10986
10987 md.last_text_seg = now_seg;
10988
10989 done:
10990 input_line_pointer = saved_input_line_pointer;
10991}
10992
10993/* Called when symbol NAME cannot be found in the symbol table.
10994 Should be used for dynamic valued symbols only. */
542d6675
KH		 10995
10996symbolS *
800eeca4 10997md_undefined_symbol (name)
2434f565 10998 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10999{
11000 return 0;
11001}
11002
11003/* Called for any expression that can not be recognized. When the
11004 function is called, `input_line_pointer' will point to the start of
11005 the expression. */
542d6675 11006
800eeca4
JW		 11007void
11008md_operand (e)
11009 expressionS *e;
11010{
800eeca4
JW		 11011 switch (*input_line_pointer)
11012 {
800eeca4
JW		 11013 case '[':
11014 ++input_line_pointer;
60d11e55 11015 expression_and_evaluate (e);
800eeca4
JW		 11016 if (*input_line_pointer != ']')
11017 {
16a48f83 11018 as_bad ("Closing bracket missing");
800eeca4
JW		 11019 goto err;
11020 }
11021 else
11022 {
11023 if (e->X_op != O_register)
11024 as_bad ("Register expected as index");
11025
11026 ++input_line_pointer;
11027 e->X_op = O_index;
11028 }
11029 break;
11030
11031 default:
11032 break;
11033 }
11034 return;
11035
11036 err:
11037 ignore_rest_of_line ();
11038}
11039
11040/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11041 a section symbol plus some offset. For relocs involving @fptr(),
11042 directives we don't want such adjustments since we need to have the
11043 original symbol's name in the reloc. */
11044int
11045ia64_fix_adjustable (fix)
11046 fixS *fix;
11047{
11048 /* Prevent all adjustments to global symbols */
e97b3f28 11049 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
800eeca4
JW		 11050 return 0;
11051
11052 switch (fix->fx_r_type)
11053 {
11054 case BFD_RELOC_IA64_FPTR64I:
11055 case BFD_RELOC_IA64_FPTR32MSB:
11056 case BFD_RELOC_IA64_FPTR32LSB:
11057 case BFD_RELOC_IA64_FPTR64MSB:
11058 case BFD_RELOC_IA64_FPTR64LSB:
11059 case BFD_RELOC_IA64_LTOFF_FPTR22:
11060 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11061 return 0;
11062 default:
11063 break;
11064 }
11065
11066 return 1;
11067}
11068
11069int
11070ia64_force_relocation (fix)
11071 fixS *fix;
11072{
11073 switch (fix->fx_r_type)
11074 {
11075 case BFD_RELOC_IA64_FPTR64I:
11076 case BFD_RELOC_IA64_FPTR32MSB:
11077 case BFD_RELOC_IA64_FPTR32LSB:
11078 case BFD_RELOC_IA64_FPTR64MSB:
11079 case BFD_RELOC_IA64_FPTR64LSB:
11080
11081 case BFD_RELOC_IA64_LTOFF22:
11082 case BFD_RELOC_IA64_LTOFF64I:
11083 case BFD_RELOC_IA64_LTOFF_FPTR22:
11084 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11085 case BFD_RELOC_IA64_PLTOFF22:
11086 case BFD_RELOC_IA64_PLTOFF64I:
11087 case BFD_RELOC_IA64_PLTOFF64MSB:
11088 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 11089
11090 case BFD_RELOC_IA64_LTOFF22X:
11091 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 11092 return 1;
11093
11094 default:
a161fe53 11095 break;
800eeca4 11096 }
a161fe53 11097
ae6063d4 11098 return generic_force_reloc (fix);
800eeca4
JW		 11099}
11100
11101/* Decide from what point a pc-relative relocation is relative to,
11102 relative to the pc-relative fixup. Er, relatively speaking. */
11103long
11104ia64_pcrel_from_section (fix, sec)
11105 fixS *fix;
11106 segT sec;
11107{
11108 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 11109
800eeca4
JW		 11110 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
11111 off &= ~0xfUL;
11112
11113 return off;
11114}
11115
6174d9c8
RH		 11116
11117/* Used to emit section-relative relocs for the dwarf2 debug data. */
11118void
11119ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
11120{
11121 expressionS expr;
11122
11123 expr.X_op = O_pseudo_fixup;
11124 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
11125 expr.X_add_number = 0;
11126 expr.X_add_symbol = symbol;
11127 emit_expr (&expr, size);
11128}
11129
800eeca4
JW		 11130/* This is called whenever some data item (not an instruction) needs a
11131 fixup. We pick the right reloc code depending on the byteorder
11132 currently in effect. */
11133void
11134ia64_cons_fix_new (f, where, nbytes, exp)
11135 fragS *f;
11136 int where;
11137 int nbytes;
11138 expressionS *exp;
11139{
11140 bfd_reloc_code_real_type code;
11141 fixS *fix;
11142
11143 switch (nbytes)
11144 {
11145 /* There are no reloc for 8 and 16 bit quantities, but we allow
11146 them here since they will work fine as long as the expression
11147 is fully defined at the end of the pass over the source file. */
11148 case 1: code = BFD_RELOC_8; break;
11149 case 2: code = BFD_RELOC_16; break;
11150 case 4:
11151 if (target_big_endian)
11152 code = BFD_RELOC_IA64_DIR32MSB;
11153 else
11154 code = BFD_RELOC_IA64_DIR32LSB;
11155 break;
11156
11157 case 8:
40449e9f 11158 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 11159 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 11160 && exp->X_op_symbol
11161 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
11162 && !(md.flags & EF_IA_64_ABI64))
11163 {
11164 if (target_big_endian)
11165 code = BFD_RELOC_IA64_IPLTMSB;
11166 else
11167 code = BFD_RELOC_IA64_IPLTLSB;
11168 exp->X_op = O_symbol;
11169 break;
11170 }
11171 else
11172 {
11173 if (target_big_endian)
11174 code = BFD_RELOC_IA64_DIR64MSB;
11175 else
11176 code = BFD_RELOC_IA64_DIR64LSB;
11177 break;
11178 }
800eeca4 11179
3969b680
RH		 11180 case 16:
11181 if (exp->X_op == O_pseudo_fixup
11182 && exp->X_op_symbol
11183 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
11184 {
11185 if (target_big_endian)
11186 code = BFD_RELOC_IA64_IPLTMSB;
11187 else
11188 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 11189 exp->X_op = O_symbol;
11190 break;
11191 }
11192 /* FALLTHRU */
11193
800eeca4
JW		 11194 default:
11195 as_bad ("Unsupported fixup size %d", nbytes);
11196 ignore_rest_of_line ();
11197 return;
11198 }
6174d9c8 11199
800eeca4
JW		 11200 if (exp->X_op == O_pseudo_fixup)
11201 {
800eeca4
JW		 11202 exp->X_op = O_symbol;
11203 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 11204 /* ??? If code unchanged, unsupported. */
800eeca4 11205 }
3969b680 11206
800eeca4
JW		 11207 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11208 /* We need to store the byte order in effect in case we're going
11209 to fix an 8 or 16 bit relocation (for which there no real
55cf6793 11210 relocs available). See md_apply_fix(). */
800eeca4
JW		 11211 fix->tc_fix_data.bigendian = target_big_endian;
11212}
11213
11214/* Return the actual relocation we wish to associate with the pseudo
11215 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 11216 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 11217
11218static bfd_reloc_code_real_type
11219ia64_gen_real_reloc_type (sym, r_type)
11220 struct symbol *sym;
11221 bfd_reloc_code_real_type r_type;
11222{
11223 bfd_reloc_code_real_type new = 0;
0ca3e455 11224 const char *type = NULL, *suffix = "";
800eeca4
JW		 11225
11226 if (sym == NULL)
11227 {
11228 return r_type;
11229 }
11230
11231 switch (S_GET_VALUE (sym))
11232 {
11233 case FUNC_FPTR_RELATIVE:
11234 switch (r_type)
11235 {
11236 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11237 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11238 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11239 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11240 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 11241 default: type = "FPTR"; break;
800eeca4
JW		 11242 }
11243 break;
11244
11245 case FUNC_GP_RELATIVE:
11246 switch (r_type)
11247 {
11248 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11249 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11250 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11251 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11252 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11253 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 11254 default: type = "GPREL"; break;
800eeca4
JW		 11255 }
11256 break;
11257
11258 case FUNC_LT_RELATIVE:
11259 switch (r_type)
11260 {
11261 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11262 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11263 default: type = "LTOFF"; break;
800eeca4
JW		 11264 }
11265 break;
11266
fa2c7eff
RH		 11267 case FUNC_LT_RELATIVE_X:
11268 switch (r_type)
11269 {
11270 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11271 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11272 }
11273 break;
11274
c67e42c9
RH		 11275 case FUNC_PC_RELATIVE:
11276 switch (r_type)
11277 {
11278 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11279 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11280 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11281 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11282 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11283 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11284 default: type = "PCREL"; break;
c67e42c9
RH		 11285 }
11286 break;
11287
800eeca4
JW		 11288 case FUNC_PLT_RELATIVE:
11289 switch (r_type)
11290 {
11291 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11292 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11293 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11294 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11295 default: type = "PLTOFF"; break;
800eeca4
JW		 11296 }
11297 break;
11298
11299 case FUNC_SEC_RELATIVE:
11300 switch (r_type)
11301 {
11302 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11303 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11304 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11305 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11306 default: type = "SECREL"; break;
800eeca4
JW		 11307 }
11308 break;
11309
11310 case FUNC_SEG_RELATIVE:
11311 switch (r_type)
11312 {
11313 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11314 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11315 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11316 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11317 default: type = "SEGREL"; break;
800eeca4
JW		 11318 }
11319 break;
11320
11321 case FUNC_LTV_RELATIVE:
11322 switch (r_type)
11323 {
11324 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11325 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11326 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11327 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11328 default: type = "LTV"; break;
800eeca4
JW		 11329 }
11330 break;
11331
11332 case FUNC_LT_FPTR_RELATIVE:
11333 switch (r_type)
11334 {
11335 case BFD_RELOC_IA64_IMM22:
11336 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11337 case BFD_RELOC_IA64_IMM64:
11338 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11339 case BFD_RELOC_IA64_DIR32MSB:
11340 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11341 case BFD_RELOC_IA64_DIR32LSB:
11342 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11343 case BFD_RELOC_IA64_DIR64MSB:
11344 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11345 case BFD_RELOC_IA64_DIR64LSB:
11346 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11347 default:
0ca3e455 11348 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11349 }
11350 break;
3969b680 11351
13ae64f3
JJ		 11352 case FUNC_TP_RELATIVE:
11353 switch (r_type)
11354 {
0ca3e455
JB		 11355 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11356 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11357 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11358 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11359 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11360 default: type = "TPREL"; break;
13ae64f3
JJ		 11361 }
11362 break;
11363
11364 case FUNC_LT_TP_RELATIVE:
11365 switch (r_type)
11366 {
11367 case BFD_RELOC_IA64_IMM22:
11368 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11369 default:
0ca3e455
JB		 11370 type = "LTOFF_TPREL"; break;
11371 }
11372 break;
11373
11374 case FUNC_DTP_MODULE:
11375 switch (r_type)
11376 {
11377 case BFD_RELOC_IA64_DIR64MSB:
11378 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11379 case BFD_RELOC_IA64_DIR64LSB:
11380 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11381 default:
11382 type = "DTPMOD"; break;
13ae64f3
JJ		 11383 }
11384 break;
11385
11386 case FUNC_LT_DTP_MODULE:
11387 switch (r_type)
11388 {
11389 case BFD_RELOC_IA64_IMM22:
11390 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11391 default:
0ca3e455 11392 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11393 }
11394 break;
11395
11396 case FUNC_DTP_RELATIVE:
11397 switch (r_type)
11398 {
0ca3e455
JB		 11399 case BFD_RELOC_IA64_DIR32MSB:
11400 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11401 case BFD_RELOC_IA64_DIR32LSB:
11402 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11403 case BFD_RELOC_IA64_DIR64MSB:
11404 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11405 case BFD_RELOC_IA64_DIR64LSB:
11406 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11407 case BFD_RELOC_IA64_IMM14:
11408 new = BFD_RELOC_IA64_DTPREL14; break;
11409 case BFD_RELOC_IA64_IMM22:
11410 new = BFD_RELOC_IA64_DTPREL22; break;
11411 case BFD_RELOC_IA64_IMM64:
11412 new = BFD_RELOC_IA64_DTPREL64I; break;
11413 default:
0ca3e455 11414 type = "DTPREL"; break;
13ae64f3
JJ		 11415 }
11416 break;
11417
11418 case FUNC_LT_DTP_RELATIVE:
11419 switch (r_type)
11420 {
11421 case BFD_RELOC_IA64_IMM22:
11422 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11423 default:
0ca3e455 11424 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11425 }
11426 break;
11427
40449e9f 11428 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11429 switch (r_type)
11430 {
11431 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11432 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11433 default: type = "IPLT"; break;
11434 }
40449e9f 11435 break;
1cd8ff38 11436
800eeca4
JW		 11437 default:
11438 abort ();
11439 }
6174d9c8 11440
800eeca4
JW		 11441 if (new)
11442 return new;
11443 else
0ca3e455
JB		 11444 {
11445 int width;
11446
11447 if (!type)
11448 abort ();
11449 switch (r_type)
11450 {
11451 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11452 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11453 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11454 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
30ad6cb9 11455 case BFD_RELOC_UNUSED: width = 13; break;
0ca3e455
JB		 11456 case BFD_RELOC_IA64_IMM14: width = 14; break;
11457 case BFD_RELOC_IA64_IMM22: width = 22; break;
11458 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11459 default: abort ();
11460 }
11461
11462 /* This should be an error, but since previously there wasn't any
11463 diagnostic here, dont't make it fail because of this for now. */
11464 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11465 return r_type;
11466 }
800eeca4
JW		 11467}
11468
11469/* Here is where generate the appropriate reloc for pseudo relocation
11470 functions. */
11471void
11472ia64_validate_fix (fix)
11473 fixS *fix;
11474{
11475 switch (fix->fx_r_type)
11476 {
11477 case BFD_RELOC_IA64_FPTR64I:
11478 case BFD_RELOC_IA64_FPTR32MSB:
11479 case BFD_RELOC_IA64_FPTR64LSB:
11480 case BFD_RELOC_IA64_LTOFF_FPTR22:
11481 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11482 if (fix->fx_offset != 0)
11483 as_bad_where (fix->fx_file, fix->fx_line,
11484 "No addend allowed in @fptr() relocation");
11485 break;
11486 default:
11487 break;
11488 }
800eeca4
JW		 11489}
11490
11491static void
11492fix_insn (fix, odesc, value)
11493 fixS *fix;
11494 const struct ia64_operand *odesc;
11495 valueT value;
11496{
11497 bfd_vma insn[3], t0, t1, control_bits;
11498 const char *err;
11499 char *fixpos;
11500 long slot;
11501
11502 slot = fix->fx_where & 0x3;
11503 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11504
c67e42c9 11505 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11506 t0 = bfd_getl64 (fixpos);
11507 t1 = bfd_getl64 (fixpos + 8);
11508 control_bits = t0 & 0x1f;
11509 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11510 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11511 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11512
c67e42c9
RH		 11513 err = NULL;
11514 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11515 {
c67e42c9
RH		 11516 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11517 insn[2] |= (((value & 0x7f) << 13)
11518 | (((value >> 7) & 0x1ff) << 27)
11519 | (((value >> 16) & 0x1f) << 22)
11520 | (((value >> 21) & 0x1) << 21)
11521 | (((value >> 63) & 0x1) << 36));
800eeca4 11522 }
c67e42c9
RH		 11523 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11524 {
11525 if (value & ~0x3fffffffffffffffULL)
11526 err = "integer operand out of range";
11527 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11528 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11529 }
11530 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11531 {
11532 value >>= 4;
11533 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11534 insn[2] |= ((((value >> 59) & 0x1) << 36)
11535 | (((value >> 0) & 0xfffff) << 13));
11536 }
11537 else
11538 err = (*odesc->insert) (odesc, value, insn + slot);
11539
11540 if (err)
11541 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11542
11543 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11544 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11545 number_to_chars_littleendian (fixpos + 0, t0, 8);
11546 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11547}
11548
11549/* Attempt to simplify or even eliminate a fixup. The return value is
11550 ignored; perhaps it was once meaningful, but now it is historical.
11551 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11552
11553 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11554 (if possible). */
94f592af
NC		 11555
11556void
55cf6793 11557md_apply_fix (fix, valP, seg)
800eeca4 11558 fixS *fix;
40449e9f 11559 valueT *valP;
2434f565 11560 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11561{
11562 char *fixpos;
40449e9f 11563 valueT value = *valP;
800eeca4
JW		 11564
11565 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11566
11567 if (fix->fx_pcrel)
11568 {
7b347e43
JB		 11569 switch (fix->fx_r_type)
11570 {
11571 case BFD_RELOC_IA64_PCREL21B: break;
11572 case BFD_RELOC_IA64_PCREL21BI: break;
11573 case BFD_RELOC_IA64_PCREL21F: break;
11574 case BFD_RELOC_IA64_PCREL21M: break;
11575 case BFD_RELOC_IA64_PCREL60B: break;
11576 case BFD_RELOC_IA64_PCREL22: break;
11577 case BFD_RELOC_IA64_PCREL64I: break;
11578 case BFD_RELOC_IA64_PCREL32MSB: break;
11579 case BFD_RELOC_IA64_PCREL32LSB: break;
11580 case BFD_RELOC_IA64_PCREL64MSB: break;
11581 case BFD_RELOC_IA64_PCREL64LSB: break;
11582 default:
11583 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11584 fix->fx_r_type);
11585 break;
11586 }
800eeca4
JW		 11587 }
11588 if (fix->fx_addsy)
11589 {
00f7efb6 11590 switch (fix->fx_r_type)
800eeca4 11591 {
00f7efb6 11592 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11593 /* This must be a TAG13 or TAG13b operand. There are no external
11594 relocs defined for them, so we must give an error. */
800eeca4
JW		 11595 as_bad_where (fix->fx_file, fix->fx_line,
11596 "%s must have a constant value",
11597 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11598 fix->fx_done = 1;
94f592af 11599 return;
00f7efb6
JJ		 11600
11601 case BFD_RELOC_IA64_TPREL14:
11602 case BFD_RELOC_IA64_TPREL22:
11603 case BFD_RELOC_IA64_TPREL64I:
11604 case BFD_RELOC_IA64_LTOFF_TPREL22:
11605 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11606 case BFD_RELOC_IA64_DTPREL14:
11607 case BFD_RELOC_IA64_DTPREL22:
11608 case BFD_RELOC_IA64_DTPREL64I:
11609 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11610 S_SET_THREAD_LOCAL (fix->fx_addsy);
11611 break;
7925dd68
JJ		 11612
11613 default:
11614 break;
800eeca4 11615 }
800eeca4
JW		 11616 }
11617 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11618 {
11619 if (fix->tc_fix_data.bigendian)
11620 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11621 else
11622 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11623 fix->fx_done = 1;
800eeca4
JW		 11624 }
11625 else
11626 {
11627 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11628 fix->fx_done = 1;
800eeca4 11629 }
800eeca4
JW		 11630}
11631
11632/* Generate the BFD reloc to be stuck in the object file from the
11633 fixup used internally in the assembler. */
542d6675
KH		 11634
11635arelent *
800eeca4 11636tc_gen_reloc (sec, fixp)
2434f565 11637 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11638 fixS *fixp;
11639{
11640 arelent *reloc;
11641
11642 reloc = xmalloc (sizeof (*reloc));
11643 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11644 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11645 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11646 reloc->addend = fixp->fx_offset;
11647 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11648
11649 if (!reloc->howto)
11650 {
11651 as_bad_where (fixp->fx_file, fixp->fx_line,
11652 "Cannot represent %s relocation in object file",
11653 bfd_get_reloc_code_name (fixp->fx_r_type));
11654 }
11655 return reloc;
11656}
11657
11658/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11659 of type TYPE, and store the appropriate bytes in *LIT. The number
11660 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11661 returned, or NULL on OK. */
11662
11663#define MAX_LITTLENUMS 5
11664
542d6675 11665char *
800eeca4
JW		 11666md_atof (type, lit, size)
11667 int type;
11668 char *lit;
11669 int *size;
11670{
11671 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11672 char *t;
11673 int prec;
11674
11675 switch (type)
11676 {
11677 /* IEEE floats */
11678 case 'f':
11679 case 'F':
11680 case 's':
11681 case 'S':
11682 prec = 2;
11683 break;
11684
11685 case 'd':
11686 case 'D':
11687 case 'r':
11688 case 'R':
11689 prec = 4;
11690 break;
11691
11692 case 'x':
11693 case 'X':
11694 case 'p':
11695 case 'P':
11696 prec = 5;
11697 break;
11698
11699 default:
11700 *size = 0;
11701 return "Bad call to MD_ATOF()";
11702 }
11703 t = atof_ieee (input_line_pointer, type, words);
11704 if (t)
11705 input_line_pointer = t;
800eeca4 11706
10a98291
L		 11707 (*ia64_float_to_chars) (lit, words, prec);
11708
165a7f90
L		 11709 if (type == 'X')
11710 {
11711 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11712 memset (&lit [10], 0, 6);
165a7f90
L		 11713 *size = 8 * sizeof (LITTLENUM_TYPE);
11714 }
10a98291
L		 11715 else
11716 *size = prec * sizeof (LITTLENUM_TYPE);
11717
800eeca4
JW		 11718 return 0;
11719}
11720
800eeca4
JW		 11721/* Handle ia64 specific semantics of the align directive. */
11722
0a9ef439 11723void
800eeca4 11724ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11725 int n ATTRIBUTE_UNUSED;
11726 const char *fill ATTRIBUTE_UNUSED;
2434f565 11727 int len ATTRIBUTE_UNUSED;
91a2ae2a 11728 int max ATTRIBUTE_UNUSED;
800eeca4 11729{
0a9ef439 11730 if (subseg_text_p (now_seg))
800eeca4 11731 ia64_flush_insns ();
0a9ef439 11732}
800eeca4 11733
0a9ef439
RH		 11734/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11735 of an rs_align_code fragment. */
800eeca4 11736
0a9ef439
RH		 11737void
11738ia64_handle_align (fragp)
11739 fragS *fragp;
11740{
0a9ef439
RH		 11741 int bytes;
11742 char *p;
9545c4ce 11743 const unsigned char *nop;
0a9ef439
RH		 11744
11745 if (fragp->fr_type != rs_align_code)
11746 return;
11747
9545c4ce
L		 11748 /* Check if this frag has to end with a stop bit. */
11749 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11750
0a9ef439
RH		 11751 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11752 p = fragp->fr_literal + fragp->fr_fix;
11753
d9201763
L		 11754 /* If no paddings are needed, we check if we need a stop bit. */
11755 if (!bytes && fragp->tc_frag_data)
11756 {
11757 if (fragp->fr_fix < 16)
bae25f19
L		 11758#if 1
11759 /* FIXME: It won't work with
11760 .align 16
11761 alloc r32=ar.pfs,1,2,4,0
11762 */
11763 ;
11764#else
d9201763
L		 11765 as_bad_where (fragp->fr_file, fragp->fr_line,
11766 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11767#endif
d9201763
L		 11768 else
11769 /* Bundles are always in little-endian byte order. Make sure
11770 the previous bundle has the stop bit. */
11771 *(p - 16) |= 1;
11772 }
11773
0a9ef439
RH		 11774 /* Make sure we are on a 16-byte boundary, in case someone has been
11775 putting data into a text section. */
11776 if (bytes & 15)
11777 {
11778 int fix = bytes & 15;
11779 memset (p, 0, fix);
11780 p += fix;
11781 bytes -= fix;
11782 fragp->fr_fix += fix;
800eeca4
JW		 11783 }
11784
012a452b 11785 /* Instruction bundles are always little-endian. */
9545c4ce 11786 memcpy (p, nop, 16);
0a9ef439 11787 fragp->fr_var = 16;
800eeca4 11788}
10a98291
L		 11789
11790static void
11791ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11792 int prec)
11793{
11794 while (prec--)
11795 {
11796 number_to_chars_bigendian (lit, (long) (*words++),
11797 sizeof (LITTLENUM_TYPE));
11798 lit += sizeof (LITTLENUM_TYPE);
11799 }
11800}
11801
11802static void
11803ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11804 int prec)
11805{
11806 while (prec--)
11807 {
11808 number_to_chars_littleendian (lit, (long) (words[prec]),
11809 sizeof (LITTLENUM_TYPE));
11810 lit += sizeof (LITTLENUM_TYPE);
11811 }
11812}
11813
11814void
11815ia64_elf_section_change_hook (void)
11816{
38ce5b11
L		 11817 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11818 && elf_linked_to_section (now_seg) == NULL)
11819 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11820 dot_byteorder (-1);
11821}
a645d1eb
L		 11822
11823/* Check if a label should be made global. */
11824void
11825ia64_check_label (symbolS *label)
11826{
11827 if (*input_line_pointer == ':')
11828 {
11829 S_SET_EXTERNAL (label);
11830 input_line_pointer++;
11831 }
11832}
35f5df7f
L		 11833
11834/* Used to remember where .alias and .secalias directives are seen. We
11835 will rename symbol and section names when we are about to output
11836 the relocatable file. */
11837struct alias
11838{
11839 char *file; /* The file where the directive is seen. */
11840 unsigned int line; /* The line number the directive is at. */
11841 const char *name; /* The orignale name of the symbol. */
11842};
11843
11844/* Called for .alias and .secalias directives. If SECTION is 1, it is
11845 .secalias. Otherwise, it is .alias. */
11846static void
11847dot_alias (int section)
11848{
11849 char *name, *alias;
11850 char delim;
11851 char *end_name;
11852 int len;
11853 const char *error_string;
11854 struct alias *h;
11855 const char *a;
11856 struct hash_control *ahash, *nhash;
11857 const char *kind;
11858
11859 name = input_line_pointer;
11860 delim = get_symbol_end ();
11861 end_name = input_line_pointer;
11862 *end_name = delim;
11863
11864 if (name == end_name)
11865 {
11866 as_bad (_("expected symbol name"));
e4e8248d 11867 ignore_rest_of_line ();
35f5df7f
L		 11868 return;
11869 }
11870
11871 SKIP_WHITESPACE ();
11872
11873 if (*input_line_pointer != ',')
11874 {
11875 *end_name = 0;
11876 as_bad (_("expected comma after \"%s\""), name);
11877 *end_name = delim;
11878 ignore_rest_of_line ();
11879 return;
11880 }
11881
11882 input_line_pointer++;
11883 *end_name = 0;
20b36a95 11884 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11885
11886 /* We call demand_copy_C_string to check if alias string is valid.
11887 There should be a closing `"' and no `\0' in the string. */
11888 alias = demand_copy_C_string (&len);
11889 if (alias == NULL)
11890 {
11891 ignore_rest_of_line ();
11892 return;
11893 }
11894
11895 /* Make a copy of name string. */
11896 len = strlen (name) + 1;
11897 obstack_grow (&notes, name, len);
11898 name = obstack_finish (&notes);
11899
11900 if (section)
11901 {
11902 kind = "section";
11903 ahash = secalias_hash;
11904 nhash = secalias_name_hash;
11905 }
11906 else
11907 {
11908 kind = "symbol";
11909 ahash = alias_hash;
11910 nhash = alias_name_hash;
11911 }
11912
11913 /* Check if alias has been used before. */
11914 h = (struct alias *) hash_find (ahash, alias);
11915 if (h)
11916 {
11917 if (strcmp (h->name, name))
11918 as_bad (_("`%s' is already the alias of %s `%s'"),
11919 alias, kind, h->name);
11920 goto out;
11921 }
11922
11923 /* Check if name already has an alias. */
11924 a = (const char *) hash_find (nhash, name);
11925 if (a)
11926 {
11927 if (strcmp (a, alias))
11928 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11929 goto out;
11930 }
11931
11932 h = (struct alias *) xmalloc (sizeof (struct alias));
11933 as_where (&h->file, &h->line);
11934 h->name = name;
11935
11936 error_string = hash_jam (ahash, alias, (PTR) h);
11937 if (error_string)
11938 {
11939 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11940 alias, kind, error_string);
11941 goto out;
11942 }
11943
11944 error_string = hash_jam (nhash, name, (PTR) alias);
11945 if (error_string)
11946 {
11947 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11948 alias, kind, error_string);
11949out:
11950 obstack_free (&notes, name);
11951 obstack_free (&notes, alias);
11952 }
11953
11954 demand_empty_rest_of_line ();
11955}
11956
11957/* It renames the original symbol name to its alias. */
11958static void
11959do_alias (const char *alias, PTR value)
11960{
11961 struct alias *h = (struct alias *) value;
11962 symbolS *sym = symbol_find (h->name);
11963
11964 if (sym == NULL)
11965 as_warn_where (h->file, h->line,
11966 _("symbol `%s' aliased to `%s' is not used"),
11967 h->name, alias);
11968 else
11969 S_SET_NAME (sym, (char *) alias);
11970}
11971
11972/* Called from write_object_file. */
11973void
11974ia64_adjust_symtab (void)
11975{
11976 hash_traverse (alias_hash, do_alias);
11977}
11978
11979/* It renames the original section name to its alias. */
11980static void
11981do_secalias (const char *alias, PTR value)
11982{
11983 struct alias *h = (struct alias *) value;
11984 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11985
11986 if (sec == NULL)
11987 as_warn_where (h->file, h->line,
11988 _("section `%s' aliased to `%s' is not used"),
11989 h->name, alias);
11990 else
11991 sec->name = alias;
11992}
11993
11994/* Called from write_object_file. */
11995void
11996ia64_frob_file (void)
11997{
11998 hash_traverse (secalias_hash, do_secalias);
11999}
GDB Binutils - Deliverables
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