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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
744b6414 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
4b4da160
NC		 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
800eeca4
JW		 22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
5faa8e39
JW		 59
60/* Some systems define MIN in, e.g., param.h. */
61#undef MIN
800eeca4
JW		 62#define MIN(a,b) ((a) < (b) ? (a) : (b))
63
64#define NUM_SLOTS 4
65#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66#define CURR_SLOT md.slot[md.curr_slot]
67
68#define O_pseudo_fixup (O_max + 1)
69
70enum special_section
71 {
557debba 72 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 73 SPECIAL_SECTION_BSS = 0,
74 SPECIAL_SECTION_SBSS,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
557debba
JW		 79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 83 };
84
85enum reloc_func
86 {
13ae64f3
JJ		 87 FUNC_DTP_MODULE,
88 FUNC_DTP_RELATIVE,
800eeca4
JW		 89 FUNC_FPTR_RELATIVE,
90 FUNC_GP_RELATIVE,
91 FUNC_LT_RELATIVE,
fa2c7eff 92 FUNC_LT_RELATIVE_X,
c67e42c9 93 FUNC_PC_RELATIVE,
800eeca4
JW		 94 FUNC_PLT_RELATIVE,
95 FUNC_SEC_RELATIVE,
96 FUNC_SEG_RELATIVE,
13ae64f3 97 FUNC_TP_RELATIVE,
800eeca4
JW		 98 FUNC_LTV_RELATIVE,
99 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 100 FUNC_LT_DTP_MODULE,
101 FUNC_LT_DTP_RELATIVE,
102 FUNC_LT_TP_RELATIVE,
3969b680 103 FUNC_IPLT_RELOC,
800eeca4
JW		 104 };
105
106enum reg_symbol
107 {
108 REG_GR = 0,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
115 REG_CFM,
116 REG_PR,
117 REG_PR_ROT,
118 REG_PSR,
119 REG_PSR_L,
120 REG_PSR_UM,
121 /* The following are pseudo-registers for use by gas only. */
122 IND_CPUID,
123 IND_DBR,
124 IND_DTR,
125 IND_ITR,
126 IND_IBR,
127 IND_MEM,
128 IND_MSR,
129 IND_PKR,
130 IND_PMC,
131 IND_PMD,
132 IND_RR,
542d6675 133 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 134 REG_PSP,
135 REG_PRIUNAT,
800eeca4
JW		 136 REG_NUM
137 };
138
139enum dynreg_type
140 {
141 DYNREG_GR = 0, /* dynamic general purpose register */
142 DYNREG_FR, /* dynamic floating point register */
143 DYNREG_PR, /* dynamic predicate register */
144 DYNREG_NUM_TYPES
145 };
146
87f8eb97
JW		 147enum operand_match_result
148 {
149 OPERAND_MATCH,
150 OPERAND_OUT_OF_RANGE,
151 OPERAND_MISMATCH
152 };
153
800eeca4
JW		 154/* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
157 instruction. */
158struct label_fix
542d6675
KH		 159{
160 struct label_fix *next;
161 struct symbol *sym;
162};
800eeca4 163
549f748d 164/* This is the endianness of the current section. */
800eeca4
JW		 165extern int target_big_endian;
166
549f748d
JW		 167/* This is the default endianness. */
168static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
169
10a98291
L		 170void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
171
172static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE *, int));
174static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE *, int));
176static void (*ia64_float_to_chars)
177 PARAMS ((char *, LITTLENUM_TYPE *, int));
178
35f5df7f
L		 179static struct hash_control *alias_hash;
180static struct hash_control *alias_name_hash;
181static struct hash_control *secalias_hash;
182static struct hash_control *secalias_name_hash;
183
2fac3d48
JB		 184/* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186const char ia64_symbol_chars[] = "@?";
187
800eeca4
JW		 188/* Characters which always start a comment. */
189const char comment_chars[] = "";
190
191/* Characters which start a comment at the beginning of a line. */
192const char line_comment_chars[] = "#";
193
194/* Characters which may be used to separate multiple commands on a
195 single line. */
196const char line_separator_chars[] = ";";
197
198/* Characters which are used to indicate an exponent in a floating
199 point number. */
200const char EXP_CHARS[] = "eE";
201
202/* Characters which mean that a number is a floating point constant,
203 as in 0d1.0. */
204const char FLT_CHARS[] = "rRsSfFdDxXpP";
205
542d6675 206/* ia64-specific option processing: */
800eeca4 207
44f5c83a 208const char *md_shortopts = "m:N:x::";
800eeca4
JW		 209
210struct option md_longopts[] =
211 {
c43c2cc5
JW		 212#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
214#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 216 };
217
218size_t md_longopts_size = sizeof (md_longopts);
219
220static struct
221 {
222 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
223 struct hash_control *reg_hash; /* register name hash table */
224 struct hash_control *dynreg_hash; /* dynamic register hash table */
225 struct hash_control *const_hash; /* constant hash table */
226 struct hash_control *entry_hash; /* code entry hint hash table */
227
228 symbolS *regsym[REG_NUM];
229
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
233 expressionS qp;
234
8c2fda1d
L		 235 /* Optimize for which CPU. */
236 enum
237 {
238 itanium1,
239 itanium2
240 } tune;
241
91d777ee
L		 242 /* What to do when hint.b is used. */
243 enum
244 {
245 hint_b_error,
246 hint_b_warning,
247 hint_b_ok
248 } hint_b;
249
800eeca4 250 unsigned int
197865e8 251 manual_bundling : 1,
800eeca4
JW		 252 debug_dv: 1,
253 detect_dv: 1,
254 explicit_mode : 1, /* which mode we're in */
255 default_explicit_mode : 1, /* which mode is the default */
256 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 257 auto_align : 1,
258 keep_pending_output : 1;
800eeca4 259
970d6792
L		 260 /* What to do when something is wrong with unwind directives. */
261 enum
262 {
263 unwind_check_warning,
264 unwind_check_error
265 } unwind_check;
266
800eeca4
JW		 267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
197865e8 269 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 270 int curr_slot;
271 int num_slots_in_use;
272 struct slot
273 {
274 unsigned int
275 end_of_insn_group : 1,
276 manual_bundling_on : 1,
196e8040
JW		 277 manual_bundling_off : 1,
278 loc_directive_seen : 1;
800eeca4
JW		 279 signed char user_template; /* user-selected template, if any */
280 unsigned char qp_regno; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
284 int num_fixups;
285 struct insn_fix
286 {
287 bfd_reloc_code_real_type code;
288 enum ia64_opnd opnd; /* type of operand in need of fix */
289 unsigned int is_pcrel : 1; /* is operand pc-relative? */
290 expressionS expr; /* the value to be inserted */
291 }
292 fixup[2]; /* at most two fixups per insn */
293 struct ia64_opcode *idesc;
294 struct label_fix *label_fixups;
f1bcba5b 295 struct label_fix *tag_fixups;
800eeca4
JW		 296 struct unw_rec_list *unwind_record; /* Unwind directive. */
297 expressionS opnd[6];
298 char *src_file;
299 unsigned int src_line;
300 struct dwarf2_line_info debug_line;
301 }
302 slot[NUM_SLOTS];
303
304 segT last_text_seg;
305
306 struct dynreg
307 {
308 struct dynreg *next; /* next dynamic register */
309 const char *name;
310 unsigned short base; /* the base register number */
311 unsigned short num_regs; /* # of registers in this set */
312 }
313 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
314
315 flagword flags; /* ELF-header flags */
316
317 struct mem_offset {
318 unsigned hint:1; /* is this hint currently valid? */
319 bfd_vma offset; /* mem.offset offset */
320 bfd_vma base; /* mem.offset base */
321 } mem_offset;
322
323 int path; /* number of alt. entry points seen */
324 const char **entry_labels; /* labels of all alternate paths in
542d6675 325 the current DV-checking block. */
800eeca4 326 int maxpaths; /* size currently allocated for
542d6675 327 entry_labels */
557debba
JW		 328
329 int pointer_size; /* size in bytes of a pointer */
330 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 331 }
332md;
333
f6fe78d6
JW		 334/* These are not const, because they are modified to MMI for non-itanium1
335 targets below. */
336/* MFI bundle of nops. */
337static unsigned char le_nop[16] =
338{
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
341};
342/* MFI bundle of nops with stop-bit. */
343static unsigned char le_nop_stop[16] =
344{
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
347};
348
542d6675 349/* application registers: */
800eeca4 350
e0c9811a
JW		 351#define AR_K0 0
352#define AR_K7 7
353#define AR_RSC 16
354#define AR_BSP 17
355#define AR_BSPSTORE 18
356#define AR_RNAT 19
357#define AR_UNAT 36
358#define AR_FPSR 40
359#define AR_ITC 44
360#define AR_PFS 64
361#define AR_LC 65
800eeca4
JW		 362
363static const struct
364 {
365 const char *name;
366 int regnum;
367 }
368ar[] =
369 {
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 381 {"ar.ec", 66},
800eeca4
JW		 382 };
383
384#define CR_IPSR 16
385#define CR_ISR 17
386#define CR_IIP 19
387#define CR_IFA 20
388#define CR_ITIR 21
389#define CR_IIPA 22
390#define CR_IFS 23
391#define CR_IIM 24
392#define CR_IHA 25
393#define CR_IVR 65
394#define CR_TPR 66
395#define CR_EOI 67
396#define CR_IRR0 68
397#define CR_IRR3 71
398#define CR_LRR0 80
399#define CR_LRR1 81
400
542d6675 401/* control registers: */
800eeca4
JW		 402static const struct
403 {
404 const char *name;
405 int regnum;
406 }
407cr[] =
408 {
409 {"cr.dcr", 0},
410 {"cr.itm", 1},
411 {"cr.iva", 2},
412 {"cr.pta", 8},
413 {"cr.gpta", 9},
414 {"cr.ipsr", 16},
415 {"cr.isr", 17},
416 {"cr.iip", 19},
417 {"cr.ifa", 20},
418 {"cr.itir", 21},
419 {"cr.iipa", 22},
420 {"cr.ifs", 23},
421 {"cr.iim", 24},
422 {"cr.iha", 25},
423 {"cr.lid", 64},
424 {"cr.ivr", 65},
425 {"cr.tpr", 66},
426 {"cr.eoi", 67},
427 {"cr.irr0", 68},
428 {"cr.irr1", 69},
429 {"cr.irr2", 70},
430 {"cr.irr3", 71},
431 {"cr.itv", 72},
432 {"cr.pmv", 73},
433 {"cr.cmcv", 74},
434 {"cr.lrr0", 80},
435 {"cr.lrr1", 81}
436 };
437
438#define PSR_MFL 4
439#define PSR_IC 13
440#define PSR_DFL 18
441#define PSR_CPL 32
442
443static const struct const_desc
444 {
445 const char *name;
446 valueT value;
447 }
448const_bits[] =
449 {
542d6675 450 /* PSR constant masks: */
800eeca4
JW		 451
452 /* 0: reserved */
453 {"psr.be", ((valueT) 1) << 1},
454 {"psr.up", ((valueT) 1) << 2},
455 {"psr.ac", ((valueT) 1) << 3},
456 {"psr.mfl", ((valueT) 1) << 4},
457 {"psr.mfh", ((valueT) 1) << 5},
458 /* 6-12: reserved */
459 {"psr.ic", ((valueT) 1) << 13},
460 {"psr.i", ((valueT) 1) << 14},
461 {"psr.pk", ((valueT) 1) << 15},
462 /* 16: reserved */
463 {"psr.dt", ((valueT) 1) << 17},
464 {"psr.dfl", ((valueT) 1) << 18},
465 {"psr.dfh", ((valueT) 1) << 19},
466 {"psr.sp", ((valueT) 1) << 20},
467 {"psr.pp", ((valueT) 1) << 21},
468 {"psr.di", ((valueT) 1) << 22},
469 {"psr.si", ((valueT) 1) << 23},
470 {"psr.db", ((valueT) 1) << 24},
471 {"psr.lp", ((valueT) 1) << 25},
472 {"psr.tb", ((valueT) 1) << 26},
473 {"psr.rt", ((valueT) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT) 1) << 34},
477 {"psr.mc", ((valueT) 1) << 35},
478 {"psr.it", ((valueT) 1) << 36},
479 {"psr.id", ((valueT) 1) << 37},
480 {"psr.da", ((valueT) 1) << 38},
481 {"psr.dd", ((valueT) 1) << 39},
482 {"psr.ss", ((valueT) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT) 1) << 43},
485 {"psr.bn", ((valueT) 1) << 44},
486 };
487
542d6675 488/* indirect register-sets/memory: */
800eeca4
JW		 489
490static const struct
491 {
492 const char *name;
493 int regnum;
494 }
495indirect_reg[] =
496 {
497 { "CPUID", IND_CPUID },
498 { "cpuid", IND_CPUID },
499 { "dbr", IND_DBR },
500 { "dtr", IND_DTR },
501 { "itr", IND_ITR },
502 { "ibr", IND_IBR },
503 { "msr", IND_MSR },
504 { "pkr", IND_PKR },
505 { "pmc", IND_PMC },
506 { "pmd", IND_PMD },
507 { "rr", IND_RR },
508 };
509
510/* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
512static struct
513 {
514 const char *name;
515 enum pseudo_type
516 {
517 PSEUDO_FUNC_NONE,
518 PSEUDO_FUNC_RELOC,
519 PSEUDO_FUNC_CONST,
e0c9811a 520 PSEUDO_FUNC_REG,
800eeca4
JW		 521 PSEUDO_FUNC_FLOAT
522 }
523 type;
524 union
525 {
526 unsigned long ival;
527 symbolS *sym;
528 }
529 u;
530 }
531pseudo_func[] =
532 {
542d6675 533 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 534 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 536 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 539 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 540 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 544 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 545 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 546 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 550 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 551
542d6675 552 /* mbtype4 constants: */
800eeca4
JW		 553 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
558
542d6675 559 /* fclass constants: */
bf3ca999 560 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 561 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 569
570 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 571
c10d9d8f
JW		 572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
574
542d6675 575 /* unwind-related constants: */
041340ad
JW		 576 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
577 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
578 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
580 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
581 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
582 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 583
542d6675 584 /* unwind-related registers: */
e0c9811a 585 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 586 };
587
542d6675 588/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 589static const bfd_vma nop[IA64_NUM_UNITS] =
590 {
591 0x0000000000LL, /* NIL => break 0 */
592 0x0008000000LL, /* I-unit nop */
593 0x0008000000LL, /* M-unit nop */
594 0x4000000000LL, /* B-unit nop */
595 0x0008000000LL, /* F-unit nop */
596 0x0008000000LL, /* L-"unit" nop */
597 0x0008000000LL, /* X-unit nop */
598 };
599
600/* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602static char special_section_name[][20] =
603 {
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
800eeca4
JW		 607 };
608
609/* The best template for a particular sequence of up to three
610 instructions: */
611#define N IA64_NUM_TYPES
612static unsigned char best_template[N][N][N];
613#undef N
614
615/* Resource dependencies currently in effect */
616static struct rsrc {
617 int depind; /* dependency index */
618 const struct ia64_dependency *dependency; /* actual dependency */
619 unsigned specific:1, /* is this a specific bit/regno? */
620 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
621 int index; /* specific regno/bit within dependency */
622 int note; /* optional qualifying note (0 if none) */
623#define STATE_NONE 0
624#define STATE_STOP 1
625#define STATE_SRLZ 2
626 int insn_srlz; /* current insn serialization state */
627 int data_srlz; /* current data serialization state */
628 int qp_regno; /* qualifying predicate for this usage */
629 char *file; /* what file marked this dependency */
2434f565 630 unsigned int line; /* what line marked this dependency */
800eeca4 631 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 632 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 633 int path; /* corresponding code entry index */
634} *regdeps = NULL;
635static int regdepslen = 0;
636static int regdepstotlen = 0;
637static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
638static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 639 "data", "instr", "specific", "stop", "other" };
7484b8e6 640static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 641
642/* Current state of PR mutexation */
643static struct qpmutex {
644 valueT prmask;
645 int path;
646} *qp_mutexes = NULL; /* QP mutex bitmasks */
647static int qp_mutexeslen = 0;
648static int qp_mutexestotlen = 0;
197865e8 649static valueT qp_safe_across_calls = 0;
800eeca4
JW		 650
651/* Current state of PR implications */
652static struct qp_imply {
653 unsigned p1:6;
654 unsigned p2:6;
655 unsigned p2_branched:1;
656 int path;
657} *qp_implies = NULL;
658static int qp_implieslen = 0;
659static int qp_impliestotlen = 0;
660
197865e8
KH		 661/* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
800eeca4
JW		 663static struct gr {
664 unsigned known:1;
665 int path;
666 valueT value;
a66d2bb7
JB		 667} gr_values[128] = {
668 {
669 1,
670#ifdef INT_MAX
671 INT_MAX,
672#else
673 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
674#endif
675 0
676 }
677};
800eeca4 678
9545c4ce
L		 679/* Remember the alignment frag. */
680static fragS *align_frag;
681
800eeca4
JW		 682/* These are the routines required to output the various types of
683 unwind records. */
684
f5a30c2e
JW		 685/* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
693
800eeca4
JW		 694typedef struct unw_rec_list {
695 unwind_record r;
e0c9811a 696 unsigned long slot_number;
f5a30c2e 697 fragS *slot_frag;
73f20958
L		 698 unsigned long next_slot_number;
699 fragS *next_slot_frag;
800eeca4
JW		 700 struct unw_rec_list *next;
701} unw_rec_list;
702
2434f565 703#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 704
6290819d
NC		 705/* Linked list of saved prologue counts. A very poor
706 implementation of a map from label numbers to prologue counts. */
707typedef struct label_prologue_count
708{
709 struct label_prologue_count *next;
710 unsigned long label_number;
711 unsigned int prologue_count;
712} label_prologue_count;
713
e0c9811a
JW		 714static struct
715{
e0c9811a
JW		 716 /* Maintain a list of unwind entries for the current function. */
717 unw_rec_list *list;
718 unw_rec_list *tail;
800eeca4 719
e0c9811a
JW		 720 /* Any unwind entires that should be attached to the current slot
721 that an insn is being constructed for. */
722 unw_rec_list *current_entry;
800eeca4 723
e0c9811a
JW		 724 /* These are used to create the unwind table entry for this function. */
725 symbolS *proc_start;
e0c9811a
JW		 726 symbolS *info; /* pointer to unwind info */
727 symbolS *personality_routine;
91a2ae2a
RH		 728 segT saved_text_seg;
729 subsegT saved_text_subseg;
730 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 731
e0c9811a 732 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 733 unsigned int prologue : 1;
734 unsigned int prologue_mask : 4;
735 unsigned int body : 1;
736 unsigned int insn : 1;
33d01f33 737 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 738 /* Prologue counts at previous .label_state directives. */
739 struct label_prologue_count * saved_prologue_counts;
e0c9811a 740} unwind;
800eeca4 741
9f9a069e
JW		 742/* The input value is a negated offset from psp, and specifies an address
743 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
744 must add 16 and divide by 4 to get the encoded value. */
745
746#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
747
800eeca4
JW		 748typedef void (*vbyte_func) PARAMS ((int, char *, char *));
749
0234cb7c 750/* Forward declarations: */
800eeca4
JW		 751static void set_section PARAMS ((char *name));
752static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
753 unsigned int, unsigned int));
d9201763 754static void dot_align (int);
800eeca4
JW		 755static void dot_radix PARAMS ((int));
756static void dot_special_section PARAMS ((int));
757static void dot_proc PARAMS ((int));
758static void dot_fframe PARAMS ((int));
759static void dot_vframe PARAMS ((int));
150f24a2
JW		 760static void dot_vframesp PARAMS ((int));
761static void dot_vframepsp PARAMS ((int));
800eeca4
JW		 762static void dot_save PARAMS ((int));
763static void dot_restore PARAMS ((int));
150f24a2
JW		 764static void dot_restorereg PARAMS ((int));
765static void dot_restorereg_p PARAMS ((int));
800eeca4
JW		 766static void dot_handlerdata PARAMS ((int));
767static void dot_unwentry PARAMS ((int));
768static void dot_altrp PARAMS ((int));
e0c9811a 769static void dot_savemem PARAMS ((int));
800eeca4
JW		 770static void dot_saveg PARAMS ((int));
771static void dot_savef PARAMS ((int));
772static void dot_saveb PARAMS ((int));
773static void dot_savegf PARAMS ((int));
774static void dot_spill PARAMS ((int));
150f24a2
JW		 775static void dot_spillreg PARAMS ((int));
776static void dot_spillmem PARAMS ((int));
777static void dot_spillreg_p PARAMS ((int));
778static void dot_spillmem_p PARAMS ((int));
779static void dot_label_state PARAMS ((int));
780static void dot_copy_state PARAMS ((int));
800eeca4
JW		 781static void dot_unwabi PARAMS ((int));
782static void dot_personality PARAMS ((int));
783static void dot_body PARAMS ((int));
784static void dot_prologue PARAMS ((int));
785static void dot_endp PARAMS ((int));
786static void dot_template PARAMS ((int));
787static void dot_regstk PARAMS ((int));
788static void dot_rot PARAMS ((int));
789static void dot_byteorder PARAMS ((int));
790static void dot_psr PARAMS ((int));
791static void dot_alias PARAMS ((int));
792static void dot_ln PARAMS ((int));
ef6a2b41 793static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 794static void dot_xdata PARAMS ((int));
795static void stmt_float_cons PARAMS ((int));
796static void stmt_cons_ua PARAMS ((int));
797static void dot_xfloat_cons PARAMS ((int));
798static void dot_xstringer PARAMS ((int));
799static void dot_xdata_ua PARAMS ((int));
800static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 801static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 802static void dot_pred_rel PARAMS ((int));
803static void dot_reg_val PARAMS ((int));
5e819f9c 804static void dot_serialize PARAMS ((int));
800eeca4
JW		 805static void dot_dv_mode PARAMS ((int));
806static void dot_entry PARAMS ((int));
807static void dot_mem_offset PARAMS ((int));
e0c9811a 808static void add_unwind_entry PARAMS((unw_rec_list *ptr));
542d6675 809static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 810static void declare_register_set PARAMS ((const char *, int, int));
811static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 812static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
813 int index,
814 expressionS *e));
800eeca4
JW		 815static int parse_operand PARAMS ((expressionS *e));
816static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
817static void build_insn PARAMS ((struct slot *, bfd_vma *));
818static void emit_one_bundle PARAMS ((void));
819static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 820static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 821 bfd_reloc_code_real_type r_type));
822static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 823static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
824 struct rsrc *, int depind, int path));
800eeca4
JW		 825static void add_qp_mutex PARAMS((valueT mask));
826static void add_qp_imply PARAMS((int p1, int p2));
827static void clear_qp_branch_flag PARAMS((valueT mask));
828static void clear_qp_mutex PARAMS((valueT mask));
829static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 830static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 831static void clear_register_values PARAMS ((void));
832static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 833static void instruction_serialization PARAMS ((void));
834static void data_serialization PARAMS ((void));
835static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 836static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 837static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 838static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 839static int depends_on PARAMS ((int, struct ia64_opcode *));
840static int specify_resource PARAMS ((const struct ia64_dependency *,
841 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 842static int check_dv PARAMS((struct ia64_opcode *idesc));
843static void check_dependencies PARAMS((struct ia64_opcode *));
844static void mark_resources PARAMS((struct ia64_opcode *));
845static void update_dependencies PARAMS((struct ia64_opcode *));
846static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 847static int qp_mutex PARAMS ((int, int, int));
848static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
849static void output_vbyte_mem PARAMS ((int, char *, char *));
850static void count_output PARAMS ((int, char *, char *));
851static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
852static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 853static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 854static void output_P1_format PARAMS ((vbyte_func, int));
855static void output_P2_format PARAMS ((vbyte_func, int, int));
856static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
857static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
858static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
859static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
860static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
861static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
862static void output_P9_format PARAMS ((vbyte_func, int, int));
863static void output_P10_format PARAMS ((vbyte_func, int, int));
864static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
865static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 866static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
867static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 868static char format_ab_reg PARAMS ((int, int));
869static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
870 unsigned long));
871static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
872static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
873 unsigned long));
874static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 875static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 876static unw_rec_list *output_prologue PARAMS ((void));
877static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
878static unw_rec_list *output_body PARAMS ((void));
879static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
880static unw_rec_list *output_mem_stack_v PARAMS ((void));
881static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
882static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
883static unw_rec_list *output_rp_when PARAMS ((void));
884static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
885static unw_rec_list *output_rp_br PARAMS ((unsigned int));
886static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
887static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
888static unw_rec_list *output_pfs_when PARAMS ((void));
889static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
890static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
891static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
892static unw_rec_list *output_preds_when PARAMS ((void));
893static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
894static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
895static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
896static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
897static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
898static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
899static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
900static unw_rec_list *output_br_mem PARAMS ((unsigned int));
901static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
902static unw_rec_list *output_spill_base PARAMS ((unsigned int));
903static unw_rec_list *output_unat_when PARAMS ((void));
904static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
905static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
906static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
907static unw_rec_list *output_lc_when PARAMS ((void));
908static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
909static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
910static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
911static unw_rec_list *output_fpsr_when PARAMS ((void));
912static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
913static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
914static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
915static unw_rec_list *output_priunat_when_gr PARAMS ((void));
916static unw_rec_list *output_priunat_when_mem PARAMS ((void));
917static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
918static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
919static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
920static unw_rec_list *output_bsp_when PARAMS ((void));
921static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
922static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
923static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
924static unw_rec_list *output_bspstore_when PARAMS ((void));
925static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
926static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
927static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
928static unw_rec_list *output_rnat_when PARAMS ((void));
929static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
930static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
931static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
932static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
933static unw_rec_list *output_epilogue PARAMS ((unsigned long));
934static unw_rec_list *output_label_state PARAMS ((unsigned long));
935static unw_rec_list *output_copy_state PARAMS ((unsigned long));
936static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
937static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
938static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
939 unsigned int));
940static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
941 unsigned int));
942static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
943 unsigned int));
944static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
945 unsigned int, unsigned int));
946static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
947static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
948static int calc_record_size PARAMS ((unw_rec_list *));
949static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 950static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 951 unsigned long, fragS *,
952 int));
91a2ae2a 953static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 954static void fixup_unw_records PARAMS ((unw_rec_list *, int));
150f24a2
JW		 955static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
956static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
6290819d
NC		 957static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
958static void save_prologue_count PARAMS ((unsigned long, unsigned int));
959static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 960
652ca075 961/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 962 unit (as opposed to the memory unit). */
963static int
652ca075 964ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 965{
966 reg -= REG_AR;
652ca075
L		 967 return reg >= 64 && reg <= 111;
968}
800eeca4 969
652ca075
L		 970/* Determine if application register REGNUM resides only in the memory
971 unit (as opposed to the integer unit). */
972static int
973ar_is_only_in_memory_unit (int reg)
974{
975 reg -= REG_AR;
976 return reg >= 0 && reg <= 47;
800eeca4
JW		 977}
978
979/* Switch to section NAME and create section if necessary. It's
980 rather ugly that we have to manipulate input_line_pointer but I
981 don't see any other way to accomplish the same thing without
982 changing obj-elf.c (which may be the Right Thing, in the end). */
983static void
984set_section (name)
985 char *name;
986{
987 char *saved_input_line_pointer;
988
989 saved_input_line_pointer = input_line_pointer;
990 input_line_pointer = name;
991 obj_elf_section (0);
992 input_line_pointer = saved_input_line_pointer;
993}
994
d61a78a7
RH		 995/* Map 's' to SHF_IA_64_SHORT. */
996
997int
998ia64_elf_section_letter (letter, ptr_msg)
999 int letter;
1000 char **ptr_msg;
1001{
1002 if (letter == 's')
1003 return SHF_IA_64_SHORT;
711ef82f
L		 1004 else if (letter == 'o')
1005 return SHF_LINK_ORDER;
d61a78a7 1006
711ef82f
L		 1007 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1008 return -1;
d61a78a7
RH		 1009}
1010
800eeca4
JW		 1011/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1012
1013flagword
1014ia64_elf_section_flags (flags, attr, type)
1015 flagword flags;
2434f565 1016 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 1017{
1018 if (attr & SHF_IA_64_SHORT)
1019 flags |= SEC_SMALL_DATA;
1020 return flags;
1021}
1022
91a2ae2a
RH		 1023int
1024ia64_elf_section_type (str, len)
40449e9f
KH		 1025 const char *str;
1026 size_t len;
91a2ae2a 1027{
1cd8ff38 1028#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1029
1cd8ff38 1030 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1031 return SHT_PROGBITS;
1032
1cd8ff38 1033 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1034 return SHT_PROGBITS;
1035
1cd8ff38 1036 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1037 return SHT_IA_64_UNWIND;
1038
1cd8ff38 1039 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1040 return SHT_IA_64_UNWIND;
1041
711ef82f
L		 1042 if (STREQ ("unwind"))
1043 return SHT_IA_64_UNWIND;
1044
91a2ae2a 1045 return -1;
1cd8ff38 1046#undef STREQ
91a2ae2a
RH		 1047}
1048
800eeca4
JW		 1049static unsigned int
1050set_regstack (ins, locs, outs, rots)
1051 unsigned int ins, locs, outs, rots;
1052{
542d6675
KH		 1053 /* Size of frame. */
1054 unsigned int sof;
800eeca4
JW		 1055
1056 sof = ins + locs + outs;
1057 if (sof > 96)
1058 {
1059 as_bad ("Size of frame exceeds maximum of 96 registers");
1060 return 0;
1061 }
1062 if (rots > sof)
1063 {
1064 as_warn ("Size of rotating registers exceeds frame size");
1065 return 0;
1066 }
1067 md.in.base = REG_GR + 32;
1068 md.loc.base = md.in.base + ins;
1069 md.out.base = md.loc.base + locs;
1070
1071 md.in.num_regs = ins;
1072 md.loc.num_regs = locs;
1073 md.out.num_regs = outs;
1074 md.rot.num_regs = rots;
1075 return sof;
1076}
1077
1078void
1079ia64_flush_insns ()
1080{
1081 struct label_fix *lfix;
1082 segT saved_seg;
1083 subsegT saved_subseg;
b44b1b85 1084 unw_rec_list *ptr;
800eeca4
JW		 1085
1086 if (!md.last_text_seg)
1087 return;
1088
1089 saved_seg = now_seg;
1090 saved_subseg = now_subseg;
1091
1092 subseg_set (md.last_text_seg, 0);
1093
1094 while (md.num_slots_in_use > 0)
1095 emit_one_bundle (); /* force out queued instructions */
1096
1097 /* In case there are labels following the last instruction, resolve
542d6675 1098 those now: */
800eeca4
JW		 1099 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1100 {
1101 S_SET_VALUE (lfix->sym, frag_now_fix ());
1102 symbol_set_frag (lfix->sym, frag_now);
1103 }
1104 CURR_SLOT.label_fixups = 0;
f1bcba5b
JW		 1105 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1106 {
1107 S_SET_VALUE (lfix->sym, frag_now_fix ());
1108 symbol_set_frag (lfix->sym, frag_now);
1109 }
1110 CURR_SLOT.tag_fixups = 0;
800eeca4 1111
b44b1b85 1112 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1113 resolve those now. We only handle prologue, body, and endp directives
1114 here. Give an error for others. */
b44b1b85
JW		 1115 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1116 {
9c59842f 1117 switch (ptr->r.type)
b44b1b85 1118 {
9c59842f
JW		 1119 case prologue:
1120 case prologue_gr:
1121 case body:
1122 case endp:
b44b1b85
JW		 1123 ptr->slot_number = (unsigned long) frag_more (0);
1124 ptr->slot_frag = frag_now;
9c59842f
JW		 1125 break;
1126
1127 /* Allow any record which doesn't have a "t" field (i.e.,
1128 doesn't relate to a particular instruction). */
1129 case unwabi:
1130 case br_gr:
1131 case copy_state:
1132 case fr_mem:
1133 case frgr_mem:
1134 case gr_gr:
1135 case gr_mem:
1136 case label_state:
1137 case rp_br:
1138 case spill_base:
1139 case spill_mask:
1140 /* nothing */
1141 break;
1142
1143 default:
1144 as_bad (_("Unwind directive not followed by an instruction."));
1145 break;
b44b1b85 1146 }
b44b1b85
JW		 1147 }
1148 unwind.current_entry = NULL;
1149
800eeca4 1150 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1151
1152 if (md.qp.X_op == O_register)
1153 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1154}
1155
d9201763
L		 1156static void
1157ia64_do_align (int nbytes)
800eeca4
JW		 1158{
1159 char *saved_input_line_pointer = input_line_pointer;
1160
1161 input_line_pointer = "";
1162 s_align_bytes (nbytes);
1163 input_line_pointer = saved_input_line_pointer;
1164}
1165
1166void
1167ia64_cons_align (nbytes)
1168 int nbytes;
1169{
1170 if (md.auto_align)
1171 {
1172 char *saved_input_line_pointer = input_line_pointer;
1173 input_line_pointer = "";
1174 s_align_bytes (nbytes);
1175 input_line_pointer = saved_input_line_pointer;
1176 }
1177}
1178
1179/* Output COUNT bytes to a memory location. */
2132e3a3 1180static char *vbyte_mem_ptr = NULL;
800eeca4 1181
197865e8 1182void
800eeca4
JW		 1183output_vbyte_mem (count, ptr, comment)
1184 int count;
1185 char *ptr;
2434f565 1186 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1187{
1188 int x;
1189 if (vbyte_mem_ptr == NULL)
1190 abort ();
1191
1192 if (count == 0)
1193 return;
1194 for (x = 0; x < count; x++)
1195 *(vbyte_mem_ptr++) = ptr[x];
1196}
1197
1198/* Count the number of bytes required for records. */
1199static int vbyte_count = 0;
197865e8 1200void
800eeca4
JW		 1201count_output (count, ptr, comment)
1202 int count;
2434f565
JW		 1203 char *ptr ATTRIBUTE_UNUSED;
1204 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1205{
1206 vbyte_count += count;
1207}
1208
1209static void
1210output_R1_format (f, rtype, rlen)
1211 vbyte_func f;
1212 unw_record_type rtype;
1213 int rlen;
1214{
e0c9811a 1215 int r = 0;
800eeca4
JW		 1216 char byte;
1217 if (rlen > 0x1f)
1218 {
1219 output_R3_format (f, rtype, rlen);
1220 return;
1221 }
197865e8 1222
e0c9811a
JW		 1223 if (rtype == body)
1224 r = 1;
1225 else if (rtype != prologue)
1226 as_bad ("record type is not valid");
1227
800eeca4
JW		 1228 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1229 (*f) (1, &byte, NULL);
1230}
1231
1232static void
1233output_R2_format (f, mask, grsave, rlen)
1234 vbyte_func f;
1235 int mask, grsave;
1236 unsigned long rlen;
1237{
1238 char bytes[20];
1239 int count = 2;
1240 mask = (mask & 0x0f);
1241 grsave = (grsave & 0x7f);
1242
1243 bytes[0] = (UNW_R2 | (mask >> 1));
1244 bytes[1] = (((mask & 0x01) << 7) | grsave);
1245 count += output_leb128 (bytes + 2, rlen, 0);
1246 (*f) (count, bytes, NULL);
1247}
1248
1249static void
1250output_R3_format (f, rtype, rlen)
1251 vbyte_func f;
1252 unw_record_type rtype;
1253 unsigned long rlen;
1254{
e0c9811a 1255 int r = 0, count;
800eeca4
JW		 1256 char bytes[20];
1257 if (rlen <= 0x1f)
1258 {
1259 output_R1_format (f, rtype, rlen);
1260 return;
1261 }
197865e8 1262
e0c9811a
JW		 1263 if (rtype == body)
1264 r = 1;
1265 else if (rtype != prologue)
1266 as_bad ("record type is not valid");
800eeca4
JW		 1267 bytes[0] = (UNW_R3 | r);
1268 count = output_leb128 (bytes + 1, rlen, 0);
1269 (*f) (count + 1, bytes, NULL);
1270}
1271
1272static void
1273output_P1_format (f, brmask)
1274 vbyte_func f;
1275 int brmask;
1276{
1277 char byte;
1278 byte = UNW_P1 | (brmask & 0x1f);
1279 (*f) (1, &byte, NULL);
1280}
1281
1282static void
1283output_P2_format (f, brmask, gr)
1284 vbyte_func f;
1285 int brmask;
1286 int gr;
1287{
1288 char bytes[2];
1289 brmask = (brmask & 0x1f);
1290 bytes[0] = UNW_P2 | (brmask >> 1);
1291 bytes[1] = (((brmask & 1) << 7) | gr);
1292 (*f) (2, bytes, NULL);
1293}
1294
1295static void
1296output_P3_format (f, rtype, reg)
1297 vbyte_func f;
1298 unw_record_type rtype;
1299 int reg;
1300{
1301 char bytes[2];
e0c9811a 1302 int r = 0;
800eeca4
JW		 1303 reg = (reg & 0x7f);
1304 switch (rtype)
542d6675 1305 {
800eeca4
JW		 1306 case psp_gr:
1307 r = 0;
1308 break;
1309 case rp_gr:
1310 r = 1;
1311 break;
1312 case pfs_gr:
1313 r = 2;
1314 break;
1315 case preds_gr:
1316 r = 3;
1317 break;
1318 case unat_gr:
1319 r = 4;
1320 break;
1321 case lc_gr:
1322 r = 5;
1323 break;
1324 case rp_br:
1325 r = 6;
1326 break;
1327 case rnat_gr:
1328 r = 7;
1329 break;
1330 case bsp_gr:
1331 r = 8;
1332 break;
1333 case bspstore_gr:
1334 r = 9;
1335 break;
1336 case fpsr_gr:
1337 r = 10;
1338 break;
1339 case priunat_gr:
1340 r = 11;
1341 break;
1342 default:
1343 as_bad ("Invalid record type for P3 format.");
542d6675 1344 }
800eeca4
JW		 1345 bytes[0] = (UNW_P3 | (r >> 1));
1346 bytes[1] = (((r & 1) << 7) | reg);
1347 (*f) (2, bytes, NULL);
1348}
1349
800eeca4 1350static void
e0c9811a 1351output_P4_format (f, imask, imask_size)
800eeca4 1352 vbyte_func f;
e0c9811a
JW		 1353 unsigned char *imask;
1354 unsigned long imask_size;
800eeca4 1355{
e0c9811a 1356 imask[0] = UNW_P4;
2132e3a3 1357 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1358}
1359
1360static void
1361output_P5_format (f, grmask, frmask)
1362 vbyte_func f;
1363 int grmask;
1364 unsigned long frmask;
1365{
1366 char bytes[4];
1367 grmask = (grmask & 0x0f);
1368
1369 bytes[0] = UNW_P5;
1370 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1371 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1372 bytes[3] = (frmask & 0x000000ff);
1373 (*f) (4, bytes, NULL);
1374}
1375
1376static void
1377output_P6_format (f, rtype, rmask)
1378 vbyte_func f;
1379 unw_record_type rtype;
1380 int rmask;
1381{
1382 char byte;
e0c9811a 1383 int r = 0;
197865e8 1384
e0c9811a
JW		 1385 if (rtype == gr_mem)
1386 r = 1;
1387 else if (rtype != fr_mem)
1388 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1389 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1390 (*f) (1, &byte, NULL);
1391}
1392
1393static void
1394output_P7_format (f, rtype, w1, w2)
1395 vbyte_func f;
1396 unw_record_type rtype;
1397 unsigned long w1;
1398 unsigned long w2;
1399{
1400 char bytes[20];
1401 int count = 1;
e0c9811a 1402 int r = 0;
800eeca4
JW		 1403 count += output_leb128 (bytes + 1, w1, 0);
1404 switch (rtype)
1405 {
542d6675
KH		 1406 case mem_stack_f:
1407 r = 0;
1408 count += output_leb128 (bytes + count, w2 >> 4, 0);
1409 break;
1410 case mem_stack_v:
1411 r = 1;
1412 break;
1413 case spill_base:
1414 r = 2;
1415 break;
1416 case psp_sprel:
1417 r = 3;
1418 break;
1419 case rp_when:
1420 r = 4;
1421 break;
1422 case rp_psprel:
1423 r = 5;
1424 break;
1425 case pfs_when:
1426 r = 6;
1427 break;
1428 case pfs_psprel:
1429 r = 7;
1430 break;
1431 case preds_when:
1432 r = 8;
1433 break;
1434 case preds_psprel:
1435 r = 9;
1436 break;
1437 case lc_when:
1438 r = 10;
1439 break;
1440 case lc_psprel:
1441 r = 11;
1442 break;
1443 case unat_when:
1444 r = 12;
1445 break;
1446 case unat_psprel:
1447 r = 13;
1448 break;
1449 case fpsr_when:
1450 r = 14;
1451 break;
1452 case fpsr_psprel:
1453 r = 15;
1454 break;
1455 default:
1456 break;
800eeca4
JW		 1457 }
1458 bytes[0] = (UNW_P7 | r);
1459 (*f) (count, bytes, NULL);
1460}
1461
1462static void
1463output_P8_format (f, rtype, t)
1464 vbyte_func f;
1465 unw_record_type rtype;
1466 unsigned long t;
1467{
1468 char bytes[20];
e0c9811a 1469 int r = 0;
800eeca4
JW		 1470 int count = 2;
1471 bytes[0] = UNW_P8;
1472 switch (rtype)
1473 {
542d6675
KH		 1474 case rp_sprel:
1475 r = 1;
1476 break;
1477 case pfs_sprel:
1478 r = 2;
1479 break;
1480 case preds_sprel:
1481 r = 3;
1482 break;
1483 case lc_sprel:
1484 r = 4;
1485 break;
1486 case unat_sprel:
1487 r = 5;
1488 break;
1489 case fpsr_sprel:
1490 r = 6;
1491 break;
1492 case bsp_when:
1493 r = 7;
1494 break;
1495 case bsp_psprel:
1496 r = 8;
1497 break;
1498 case bsp_sprel:
1499 r = 9;
1500 break;
1501 case bspstore_when:
1502 r = 10;
1503 break;
1504 case bspstore_psprel:
1505 r = 11;
1506 break;
1507 case bspstore_sprel:
1508 r = 12;
1509 break;
1510 case rnat_when:
1511 r = 13;
1512 break;
1513 case rnat_psprel:
1514 r = 14;
1515 break;
1516 case rnat_sprel:
1517 r = 15;
1518 break;
1519 case priunat_when_gr:
1520 r = 16;
1521 break;
1522 case priunat_psprel:
1523 r = 17;
1524 break;
1525 case priunat_sprel:
1526 r = 18;
1527 break;
1528 case priunat_when_mem:
1529 r = 19;
1530 break;
1531 default:
1532 break;
800eeca4
JW		 1533 }
1534 bytes[1] = r;
1535 count += output_leb128 (bytes + 2, t, 0);
1536 (*f) (count, bytes, NULL);
1537}
1538
1539static void
1540output_P9_format (f, grmask, gr)
1541 vbyte_func f;
1542 int grmask;
1543 int gr;
1544{
1545 char bytes[3];
1546 bytes[0] = UNW_P9;
1547 bytes[1] = (grmask & 0x0f);
1548 bytes[2] = (gr & 0x7f);
1549 (*f) (3, bytes, NULL);
1550}
1551
1552static void
1553output_P10_format (f, abi, context)
1554 vbyte_func f;
1555 int abi;
1556 int context;
1557{
1558 char bytes[3];
1559 bytes[0] = UNW_P10;
1560 bytes[1] = (abi & 0xff);
1561 bytes[2] = (context & 0xff);
1562 (*f) (3, bytes, NULL);
1563}
1564
1565static void
1566output_B1_format (f, rtype, label)
1567 vbyte_func f;
1568 unw_record_type rtype;
1569 unsigned long label;
1570{
1571 char byte;
e0c9811a 1572 int r = 0;
197865e8 1573 if (label > 0x1f)
800eeca4
JW		 1574 {
1575 output_B4_format (f, rtype, label);
1576 return;
1577 }
e0c9811a
JW		 1578 if (rtype == copy_state)
1579 r = 1;
1580 else if (rtype != label_state)
1581 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1582
1583 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1584 (*f) (1, &byte, NULL);
1585}
1586
1587static void
1588output_B2_format (f, ecount, t)
1589 vbyte_func f;
1590 unsigned long ecount;
1591 unsigned long t;
1592{
1593 char bytes[20];
1594 int count = 1;
1595 if (ecount > 0x1f)
1596 {
1597 output_B3_format (f, ecount, t);
1598 return;
1599 }
1600 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1601 count += output_leb128 (bytes + 1, t, 0);
1602 (*f) (count, bytes, NULL);
1603}
1604
1605static void
1606output_B3_format (f, ecount, t)
1607 vbyte_func f;
1608 unsigned long ecount;
1609 unsigned long t;
1610{
1611 char bytes[20];
1612 int count = 1;
1613 if (ecount <= 0x1f)
1614 {
1615 output_B2_format (f, ecount, t);
1616 return;
1617 }
1618 bytes[0] = UNW_B3;
1619 count += output_leb128 (bytes + 1, t, 0);
1620 count += output_leb128 (bytes + count, ecount, 0);
1621 (*f) (count, bytes, NULL);
1622}
1623
1624static void
1625output_B4_format (f, rtype, label)
1626 vbyte_func f;
1627 unw_record_type rtype;
1628 unsigned long label;
1629{
1630 char bytes[20];
e0c9811a 1631 int r = 0;
800eeca4 1632 int count = 1;
197865e8 1633 if (label <= 0x1f)
800eeca4
JW		 1634 {
1635 output_B1_format (f, rtype, label);
1636 return;
1637 }
197865e8 1638
e0c9811a
JW		 1639 if (rtype == copy_state)
1640 r = 1;
1641 else if (rtype != label_state)
1642 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1643
1644 bytes[0] = (UNW_B4 | (r << 3));
1645 count += output_leb128 (bytes + 1, label, 0);
1646 (*f) (count, bytes, NULL);
1647}
1648
1649static char
e0c9811a 1650format_ab_reg (ab, reg)
542d6675
KH		 1651 int ab;
1652 int reg;
800eeca4
JW		 1653{
1654 int ret;
e0c9811a 1655 ab = (ab & 3);
800eeca4 1656 reg = (reg & 0x1f);
e0c9811a 1657 ret = (ab << 5) | reg;
800eeca4
JW		 1658 return ret;
1659}
1660
1661static void
e0c9811a 1662output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1663 vbyte_func f;
1664 unw_record_type rtype;
e0c9811a 1665 int ab, reg;
800eeca4
JW		 1666 unsigned long t;
1667 unsigned long w1;
1668{
1669 char bytes[20];
e0c9811a 1670 int r = 0;
800eeca4
JW		 1671 int count = 2;
1672 bytes[0] = UNW_X1;
197865e8 1673
e0c9811a
JW		 1674 if (rtype == spill_sprel)
1675 r = 1;
1676 else if (rtype != spill_psprel)
1677 as_bad ("Invalid record type for format X1");
1678 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1679 count += output_leb128 (bytes + 2, t, 0);
1680 count += output_leb128 (bytes + count, w1, 0);
1681 (*f) (count, bytes, NULL);
1682}
1683
1684static void
e0c9811a 1685output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1686 vbyte_func f;
e0c9811a 1687 int ab, reg;
800eeca4
JW		 1688 int x, y, treg;
1689 unsigned long t;
1690{
1691 char bytes[20];
800eeca4
JW		 1692 int count = 3;
1693 bytes[0] = UNW_X2;
e0c9811a 1694 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1695 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1696 count += output_leb128 (bytes + 3, t, 0);
1697 (*f) (count, bytes, NULL);
1698}
1699
1700static void
e0c9811a 1701output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1702 vbyte_func f;
1703 unw_record_type rtype;
1704 int qp;
e0c9811a 1705 int ab, reg;
800eeca4
JW		 1706 unsigned long t;
1707 unsigned long w1;
1708{
1709 char bytes[20];
e0c9811a 1710 int r = 0;
800eeca4 1711 int count = 3;
e0c9811a
JW		 1712 bytes[0] = UNW_X3;
1713
1714 if (rtype == spill_sprel_p)
1715 r = 1;
1716 else if (rtype != spill_psprel_p)
1717 as_bad ("Invalid record type for format X3");
800eeca4 1718 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1719 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1720 count += output_leb128 (bytes + 3, t, 0);
1721 count += output_leb128 (bytes + count, w1, 0);
1722 (*f) (count, bytes, NULL);
1723}
1724
1725static void
e0c9811a 1726output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1727 vbyte_func f;
1728 int qp;
e0c9811a 1729 int ab, reg;
800eeca4
JW		 1730 int x, y, treg;
1731 unsigned long t;
1732{
1733 char bytes[20];
800eeca4 1734 int count = 4;
e0c9811a 1735 bytes[0] = UNW_X4;
800eeca4 1736 bytes[1] = (qp & 0x3f);
e0c9811a 1737 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1738 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1739 count += output_leb128 (bytes + 4, t, 0);
1740 (*f) (count, bytes, NULL);
1741}
1742
1743/* This function allocates a record list structure, and initializes fields. */
542d6675 1744
800eeca4 1745static unw_rec_list *
197865e8 1746alloc_record (unw_record_type t)
800eeca4
JW		 1747{
1748 unw_rec_list *ptr;
1749 ptr = xmalloc (sizeof (*ptr));
1750 ptr->next = NULL;
1751 ptr->slot_number = SLOT_NUM_NOT_SET;
1752 ptr->r.type = t;
73f20958
L		 1753 ptr->next_slot_number = 0;
1754 ptr->next_slot_frag = 0;
800eeca4
JW		 1755 return ptr;
1756}
1757
5738bc24
JW		 1758/* Dummy unwind record used for calculating the length of the last prologue or
1759 body region. */
1760
1761static unw_rec_list *
1762output_endp ()
1763{
1764 unw_rec_list *ptr = alloc_record (endp);
1765 return ptr;
1766}
1767
800eeca4
JW		 1768static unw_rec_list *
1769output_prologue ()
1770{
1771 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1772 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1773 return ptr;
1774}
1775
1776static unw_rec_list *
1777output_prologue_gr (saved_mask, reg)
1778 unsigned int saved_mask;
1779 unsigned int reg;
1780{
1781 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1782 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1783 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1784 ptr->r.record.r.grsave = reg;
1785 return ptr;
1786}
1787
1788static unw_rec_list *
1789output_body ()
1790{
1791 unw_rec_list *ptr = alloc_record (body);
1792 return ptr;
1793}
1794
1795static unw_rec_list *
1796output_mem_stack_f (size)
1797 unsigned int size;
1798{
1799 unw_rec_list *ptr = alloc_record (mem_stack_f);
1800 ptr->r.record.p.size = size;
1801 return ptr;
1802}
1803
1804static unw_rec_list *
1805output_mem_stack_v ()
1806{
1807 unw_rec_list *ptr = alloc_record (mem_stack_v);
1808 return ptr;
1809}
1810
1811static unw_rec_list *
1812output_psp_gr (gr)
1813 unsigned int gr;
1814{
1815 unw_rec_list *ptr = alloc_record (psp_gr);
1816 ptr->r.record.p.gr = gr;
1817 return ptr;
1818}
1819
1820static unw_rec_list *
1821output_psp_sprel (offset)
1822 unsigned int offset;
1823{
1824 unw_rec_list *ptr = alloc_record (psp_sprel);
542d6675 1825 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1826 return ptr;
1827}
1828
1829static unw_rec_list *
1830output_rp_when ()
1831{
1832 unw_rec_list *ptr = alloc_record (rp_when);
1833 return ptr;
1834}
1835
1836static unw_rec_list *
1837output_rp_gr (gr)
1838 unsigned int gr;
1839{
1840 unw_rec_list *ptr = alloc_record (rp_gr);
1841 ptr->r.record.p.gr = gr;
1842 return ptr;
1843}
1844
1845static unw_rec_list *
1846output_rp_br (br)
1847 unsigned int br;
1848{
1849 unw_rec_list *ptr = alloc_record (rp_br);
1850 ptr->r.record.p.br = br;
1851 return ptr;
1852}
1853
1854static unw_rec_list *
1855output_rp_psprel (offset)
1856 unsigned int offset;
1857{
1858 unw_rec_list *ptr = alloc_record (rp_psprel);
9f9a069e 1859 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1860 return ptr;
1861}
1862
1863static unw_rec_list *
1864output_rp_sprel (offset)
1865 unsigned int offset;
1866{
1867 unw_rec_list *ptr = alloc_record (rp_sprel);
542d6675 1868 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1869 return ptr;
1870}
1871
1872static unw_rec_list *
1873output_pfs_when ()
1874{
1875 unw_rec_list *ptr = alloc_record (pfs_when);
1876 return ptr;
1877}
1878
1879static unw_rec_list *
1880output_pfs_gr (gr)
1881 unsigned int gr;
1882{
1883 unw_rec_list *ptr = alloc_record (pfs_gr);
1884 ptr->r.record.p.gr = gr;
1885 return ptr;
1886}
1887
1888static unw_rec_list *
1889output_pfs_psprel (offset)
1890 unsigned int offset;
1891{
1892 unw_rec_list *ptr = alloc_record (pfs_psprel);
9f9a069e 1893 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1894 return ptr;
1895}
1896
1897static unw_rec_list *
1898output_pfs_sprel (offset)
1899 unsigned int offset;
1900{
1901 unw_rec_list *ptr = alloc_record (pfs_sprel);
542d6675 1902 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1903 return ptr;
1904}
1905
1906static unw_rec_list *
1907output_preds_when ()
1908{
1909 unw_rec_list *ptr = alloc_record (preds_when);
1910 return ptr;
1911}
1912
1913static unw_rec_list *
1914output_preds_gr (gr)
1915 unsigned int gr;
1916{
1917 unw_rec_list *ptr = alloc_record (preds_gr);
1918 ptr->r.record.p.gr = gr;
1919 return ptr;
1920}
1921
1922static unw_rec_list *
1923output_preds_psprel (offset)
1924 unsigned int offset;
1925{
1926 unw_rec_list *ptr = alloc_record (preds_psprel);
9f9a069e 1927 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1928 return ptr;
1929}
1930
1931static unw_rec_list *
1932output_preds_sprel (offset)
1933 unsigned int offset;
1934{
1935 unw_rec_list *ptr = alloc_record (preds_sprel);
542d6675 1936 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1937 return ptr;
1938}
1939
1940static unw_rec_list *
1941output_fr_mem (mask)
1942 unsigned int mask;
1943{
1944 unw_rec_list *ptr = alloc_record (fr_mem);
1945 ptr->r.record.p.rmask = mask;
1946 return ptr;
1947}
1948
1949static unw_rec_list *
1950output_frgr_mem (gr_mask, fr_mask)
1951 unsigned int gr_mask;
1952 unsigned int fr_mask;
1953{
1954 unw_rec_list *ptr = alloc_record (frgr_mem);
1955 ptr->r.record.p.grmask = gr_mask;
1956 ptr->r.record.p.frmask = fr_mask;
1957 return ptr;
1958}
1959
1960static unw_rec_list *
1961output_gr_gr (mask, reg)
1962 unsigned int mask;
1963 unsigned int reg;
1964{
1965 unw_rec_list *ptr = alloc_record (gr_gr);
1966 ptr->r.record.p.grmask = mask;
1967 ptr->r.record.p.gr = reg;
1968 return ptr;
1969}
1970
1971static unw_rec_list *
1972output_gr_mem (mask)
1973 unsigned int mask;
1974{
1975 unw_rec_list *ptr = alloc_record (gr_mem);
1976 ptr->r.record.p.rmask = mask;
1977 return ptr;
1978}
1979
1980static unw_rec_list *
1981output_br_mem (unsigned int mask)
1982{
1983 unw_rec_list *ptr = alloc_record (br_mem);
1984 ptr->r.record.p.brmask = mask;
1985 return ptr;
1986}
1987
1988static unw_rec_list *
1989output_br_gr (save_mask, reg)
1990 unsigned int save_mask;
1991 unsigned int reg;
1992{
1993 unw_rec_list *ptr = alloc_record (br_gr);
1994 ptr->r.record.p.brmask = save_mask;
1995 ptr->r.record.p.gr = reg;
1996 return ptr;
1997}
1998
1999static unw_rec_list *
2000output_spill_base (offset)
2001 unsigned int offset;
2002{
2003 unw_rec_list *ptr = alloc_record (spill_base);
9f9a069e 2004 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2005 return ptr;
2006}
2007
2008static unw_rec_list *
2009output_unat_when ()
2010{
2011 unw_rec_list *ptr = alloc_record (unat_when);
2012 return ptr;
2013}
2014
2015static unw_rec_list *
2016output_unat_gr (gr)
2017 unsigned int gr;
2018{
2019 unw_rec_list *ptr = alloc_record (unat_gr);
2020 ptr->r.record.p.gr = gr;
2021 return ptr;
2022}
2023
2024static unw_rec_list *
2025output_unat_psprel (offset)
2026 unsigned int offset;
2027{
2028 unw_rec_list *ptr = alloc_record (unat_psprel);
9f9a069e 2029 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2030 return ptr;
2031}
2032
2033static unw_rec_list *
2034output_unat_sprel (offset)
2035 unsigned int offset;
2036{
2037 unw_rec_list *ptr = alloc_record (unat_sprel);
542d6675 2038 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2039 return ptr;
2040}
2041
2042static unw_rec_list *
2043output_lc_when ()
2044{
2045 unw_rec_list *ptr = alloc_record (lc_when);
2046 return ptr;
2047}
2048
2049static unw_rec_list *
2050output_lc_gr (gr)
2051 unsigned int gr;
2052{
2053 unw_rec_list *ptr = alloc_record (lc_gr);
2054 ptr->r.record.p.gr = gr;
2055 return ptr;
2056}
2057
2058static unw_rec_list *
2059output_lc_psprel (offset)
2060 unsigned int offset;
2061{
2062 unw_rec_list *ptr = alloc_record (lc_psprel);
9f9a069e 2063 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2064 return ptr;
2065}
2066
2067static unw_rec_list *
2068output_lc_sprel (offset)
2069 unsigned int offset;
2070{
2071 unw_rec_list *ptr = alloc_record (lc_sprel);
542d6675 2072 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2073 return ptr;
2074}
2075
2076static unw_rec_list *
2077output_fpsr_when ()
2078{
2079 unw_rec_list *ptr = alloc_record (fpsr_when);
2080 return ptr;
2081}
2082
2083static unw_rec_list *
2084output_fpsr_gr (gr)
2085 unsigned int gr;
2086{
2087 unw_rec_list *ptr = alloc_record (fpsr_gr);
2088 ptr->r.record.p.gr = gr;
2089 return ptr;
2090}
2091
2092static unw_rec_list *
2093output_fpsr_psprel (offset)
2094 unsigned int offset;
2095{
2096 unw_rec_list *ptr = alloc_record (fpsr_psprel);
9f9a069e 2097 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2098 return ptr;
2099}
2100
2101static unw_rec_list *
2102output_fpsr_sprel (offset)
2103 unsigned int offset;
2104{
2105 unw_rec_list *ptr = alloc_record (fpsr_sprel);
542d6675 2106 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2107 return ptr;
2108}
2109
2110static unw_rec_list *
2111output_priunat_when_gr ()
2112{
2113 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2114 return ptr;
2115}
2116
2117static unw_rec_list *
2118output_priunat_when_mem ()
2119{
2120 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2121 return ptr;
2122}
2123
2124static unw_rec_list *
2125output_priunat_gr (gr)
2126 unsigned int gr;
2127{
2128 unw_rec_list *ptr = alloc_record (priunat_gr);
2129 ptr->r.record.p.gr = gr;
2130 return ptr;
2131}
2132
2133static unw_rec_list *
2134output_priunat_psprel (offset)
2135 unsigned int offset;
2136{
2137 unw_rec_list *ptr = alloc_record (priunat_psprel);
9f9a069e 2138 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2139 return ptr;
2140}
2141
2142static unw_rec_list *
2143output_priunat_sprel (offset)
2144 unsigned int offset;
2145{
2146 unw_rec_list *ptr = alloc_record (priunat_sprel);
542d6675 2147 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2148 return ptr;
2149}
2150
2151static unw_rec_list *
2152output_bsp_when ()
2153{
2154 unw_rec_list *ptr = alloc_record (bsp_when);
2155 return ptr;
2156}
2157
2158static unw_rec_list *
2159output_bsp_gr (gr)
2160 unsigned int gr;
2161{
2162 unw_rec_list *ptr = alloc_record (bsp_gr);
2163 ptr->r.record.p.gr = gr;
2164 return ptr;
2165}
2166
2167static unw_rec_list *
2168output_bsp_psprel (offset)
2169 unsigned int offset;
2170{
2171 unw_rec_list *ptr = alloc_record (bsp_psprel);
9f9a069e 2172 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2173 return ptr;
2174}
2175
2176static unw_rec_list *
2177output_bsp_sprel (offset)
2178 unsigned int offset;
2179{
2180 unw_rec_list *ptr = alloc_record (bsp_sprel);
542d6675 2181 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2182 return ptr;
2183}
2184
2185static unw_rec_list *
2186output_bspstore_when ()
2187{
2188 unw_rec_list *ptr = alloc_record (bspstore_when);
2189 return ptr;
2190}
2191
2192static unw_rec_list *
2193output_bspstore_gr (gr)
2194 unsigned int gr;
2195{
2196 unw_rec_list *ptr = alloc_record (bspstore_gr);
2197 ptr->r.record.p.gr = gr;
2198 return ptr;
2199}
2200
2201static unw_rec_list *
2202output_bspstore_psprel (offset)
2203 unsigned int offset;
2204{
2205 unw_rec_list *ptr = alloc_record (bspstore_psprel);
9f9a069e 2206 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2207 return ptr;
2208}
2209
2210static unw_rec_list *
2211output_bspstore_sprel (offset)
2212 unsigned int offset;
2213{
2214 unw_rec_list *ptr = alloc_record (bspstore_sprel);
542d6675 2215 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2216 return ptr;
2217}
2218
2219static unw_rec_list *
2220output_rnat_when ()
2221{
2222 unw_rec_list *ptr = alloc_record (rnat_when);
2223 return ptr;
2224}
2225
2226static unw_rec_list *
2227output_rnat_gr (gr)
2228 unsigned int gr;
2229{
2230 unw_rec_list *ptr = alloc_record (rnat_gr);
2231 ptr->r.record.p.gr = gr;
2232 return ptr;
2233}
2234
2235static unw_rec_list *
2236output_rnat_psprel (offset)
2237 unsigned int offset;
2238{
2239 unw_rec_list *ptr = alloc_record (rnat_psprel);
9f9a069e 2240 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2241 return ptr;
2242}
2243
2244static unw_rec_list *
2245output_rnat_sprel (offset)
2246 unsigned int offset;
2247{
2248 unw_rec_list *ptr = alloc_record (rnat_sprel);
542d6675 2249 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2250 return ptr;
2251}
2252
2253static unw_rec_list *
e0c9811a
JW		 2254output_unwabi (abi, context)
2255 unsigned long abi;
2256 unsigned long context;
800eeca4 2257{
e0c9811a
JW		 2258 unw_rec_list *ptr = alloc_record (unwabi);
2259 ptr->r.record.p.abi = abi;
2260 ptr->r.record.p.context = context;
800eeca4
JW		 2261 return ptr;
2262}
2263
2264static unw_rec_list *
e0c9811a 2265output_epilogue (unsigned long ecount)
800eeca4 2266{
e0c9811a
JW		 2267 unw_rec_list *ptr = alloc_record (epilogue);
2268 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2269 return ptr;
2270}
2271
2272static unw_rec_list *
e0c9811a 2273output_label_state (unsigned long label)
800eeca4 2274{
e0c9811a
JW		 2275 unw_rec_list *ptr = alloc_record (label_state);
2276 ptr->r.record.b.label = label;
800eeca4
JW		 2277 return ptr;
2278}
2279
2280static unw_rec_list *
e0c9811a
JW		 2281output_copy_state (unsigned long label)
2282{
2283 unw_rec_list *ptr = alloc_record (copy_state);
2284 ptr->r.record.b.label = label;
2285 return ptr;
2286}
2287
2288static unw_rec_list *
2289output_spill_psprel (ab, reg, offset)
2290 unsigned int ab;
800eeca4
JW		 2291 unsigned int reg;
2292 unsigned int offset;
2293{
2294 unw_rec_list *ptr = alloc_record (spill_psprel);
e0c9811a 2295 ptr->r.record.x.ab = ab;
800eeca4 2296 ptr->r.record.x.reg = reg;
9f9a069e 2297 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2298 return ptr;
2299}
2300
2301static unw_rec_list *
e0c9811a
JW		 2302output_spill_sprel (ab, reg, offset)
2303 unsigned int ab;
800eeca4
JW		 2304 unsigned int reg;
2305 unsigned int offset;
2306{
2307 unw_rec_list *ptr = alloc_record (spill_sprel);
e0c9811a 2308 ptr->r.record.x.ab = ab;
800eeca4 2309 ptr->r.record.x.reg = reg;
542d6675 2310 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2311 return ptr;
2312}
2313
2314static unw_rec_list *
e0c9811a
JW		 2315output_spill_psprel_p (ab, reg, offset, predicate)
2316 unsigned int ab;
800eeca4
JW		 2317 unsigned int reg;
2318 unsigned int offset;
2319 unsigned int predicate;
2320{
2321 unw_rec_list *ptr = alloc_record (spill_psprel_p);
e0c9811a 2322 ptr->r.record.x.ab = ab;
800eeca4 2323 ptr->r.record.x.reg = reg;
9f9a069e 2324 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2325 ptr->r.record.x.qp = predicate;
2326 return ptr;
2327}
2328
2329static unw_rec_list *
e0c9811a
JW		 2330output_spill_sprel_p (ab, reg, offset, predicate)
2331 unsigned int ab;
800eeca4
JW		 2332 unsigned int reg;
2333 unsigned int offset;
2334 unsigned int predicate;
2335{
2336 unw_rec_list *ptr = alloc_record (spill_sprel_p);
e0c9811a 2337 ptr->r.record.x.ab = ab;
800eeca4 2338 ptr->r.record.x.reg = reg;
542d6675 2339 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2340 ptr->r.record.x.qp = predicate;
2341 return ptr;
2342}
2343
2344static unw_rec_list *
e0c9811a
JW		 2345output_spill_reg (ab, reg, targ_reg, xy)
2346 unsigned int ab;
800eeca4
JW		 2347 unsigned int reg;
2348 unsigned int targ_reg;
2349 unsigned int xy;
2350{
2351 unw_rec_list *ptr = alloc_record (spill_reg);
e0c9811a 2352 ptr->r.record.x.ab = ab;
800eeca4
JW		 2353 ptr->r.record.x.reg = reg;
2354 ptr->r.record.x.treg = targ_reg;
2355 ptr->r.record.x.xy = xy;
2356 return ptr;
2357}
2358
2359static unw_rec_list *
e0c9811a
JW		 2360output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2361 unsigned int ab;
800eeca4
JW		 2362 unsigned int reg;
2363 unsigned int targ_reg;
2364 unsigned int xy;
2365 unsigned int predicate;
2366{
2367 unw_rec_list *ptr = alloc_record (spill_reg_p);
e0c9811a 2368 ptr->r.record.x.ab = ab;
800eeca4
JW		 2369 ptr->r.record.x.reg = reg;
2370 ptr->r.record.x.treg = targ_reg;
2371 ptr->r.record.x.xy = xy;
2372 ptr->r.record.x.qp = predicate;
2373 return ptr;
2374}
2375
197865e8 2376/* Given a unw_rec_list process the correct format with the
800eeca4 2377 specified function. */
542d6675 2378
800eeca4
JW		 2379static void
2380process_one_record (ptr, f)
2381 unw_rec_list *ptr;
2382 vbyte_func f;
2383{
e0c9811a
JW		 2384 unsigned long fr_mask, gr_mask;
2385
197865e8 2386 switch (ptr->r.type)
800eeca4 2387 {
5738bc24
JW		 2388 /* This is a dummy record that takes up no space in the output. */
2389 case endp:
2390 break;
2391
542d6675
KH		 2392 case gr_mem:
2393 case fr_mem:
2394 case br_mem:
2395 case frgr_mem:
2396 /* These are taken care of by prologue/prologue_gr. */
2397 break;
e0c9811a 2398
542d6675
KH		 2399 case prologue_gr:
2400 case prologue:
2401 if (ptr->r.type == prologue_gr)
2402 output_R2_format (f, ptr->r.record.r.grmask,
2403 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2404 else
800eeca4 2405 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2406
2407 /* Output descriptor(s) for union of register spills (if any). */
2408 gr_mask = ptr->r.record.r.mask.gr_mem;
2409 fr_mask = ptr->r.record.r.mask.fr_mem;
2410 if (fr_mask)
2411 {
2412 if ((fr_mask & ~0xfUL) == 0)
2413 output_P6_format (f, fr_mem, fr_mask);
2414 else
2415 {
2416 output_P5_format (f, gr_mask, fr_mask);
2417 gr_mask = 0;
2418 }
2419 }
2420 if (gr_mask)
2421 output_P6_format (f, gr_mem, gr_mask);
2422 if (ptr->r.record.r.mask.br_mem)
2423 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2424
2425 /* output imask descriptor if necessary: */
2426 if (ptr->r.record.r.mask.i)
2427 output_P4_format (f, ptr->r.record.r.mask.i,
2428 ptr->r.record.r.imask_size);
2429 break;
2430
2431 case body:
2432 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2433 break;
2434 case mem_stack_f:
2435 case mem_stack_v:
2436 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2437 ptr->r.record.p.size);
2438 break;
2439 case psp_gr:
2440 case rp_gr:
2441 case pfs_gr:
2442 case preds_gr:
2443 case unat_gr:
2444 case lc_gr:
2445 case fpsr_gr:
2446 case priunat_gr:
2447 case bsp_gr:
2448 case bspstore_gr:
2449 case rnat_gr:
2450 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2451 break;
2452 case rp_br:
2453 output_P3_format (f, rp_br, ptr->r.record.p.br);
2454 break;
2455 case psp_sprel:
2456 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2457 break;
2458 case rp_when:
2459 case pfs_when:
2460 case preds_when:
2461 case unat_when:
2462 case lc_when:
2463 case fpsr_when:
2464 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2465 break;
2466 case rp_psprel:
2467 case pfs_psprel:
2468 case preds_psprel:
2469 case unat_psprel:
2470 case lc_psprel:
2471 case fpsr_psprel:
2472 case spill_base:
2473 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2474 break;
2475 case rp_sprel:
2476 case pfs_sprel:
2477 case preds_sprel:
2478 case unat_sprel:
2479 case lc_sprel:
2480 case fpsr_sprel:
2481 case priunat_sprel:
2482 case bsp_sprel:
2483 case bspstore_sprel:
2484 case rnat_sprel:
2485 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2486 break;
2487 case gr_gr:
2488 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2489 break;
2490 case br_gr:
2491 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2492 break;
2493 case spill_mask:
2494 as_bad ("spill_mask record unimplemented.");
2495 break;
2496 case priunat_when_gr:
2497 case priunat_when_mem:
2498 case bsp_when:
2499 case bspstore_when:
2500 case rnat_when:
2501 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2502 break;
2503 case priunat_psprel:
2504 case bsp_psprel:
2505 case bspstore_psprel:
2506 case rnat_psprel:
2507 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2508 break;
2509 case unwabi:
2510 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2511 break;
2512 case epilogue:
2513 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2514 break;
2515 case label_state:
2516 case copy_state:
2517 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2518 break;
2519 case spill_psprel:
2520 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2521 ptr->r.record.x.reg, ptr->r.record.x.t,
2522 ptr->r.record.x.pspoff);
2523 break;
2524 case spill_sprel:
2525 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2526 ptr->r.record.x.reg, ptr->r.record.x.t,
2527 ptr->r.record.x.spoff);
2528 break;
2529 case spill_reg:
2530 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2531 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2532 ptr->r.record.x.treg, ptr->r.record.x.t);
2533 break;
2534 case spill_psprel_p:
2535 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2536 ptr->r.record.x.ab, ptr->r.record.x.reg,
2537 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2538 break;
2539 case spill_sprel_p:
2540 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2541 ptr->r.record.x.ab, ptr->r.record.x.reg,
2542 ptr->r.record.x.t, ptr->r.record.x.spoff);
2543 break;
2544 case spill_reg_p:
2545 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2546 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2547 ptr->r.record.x.xy, ptr->r.record.x.treg,
2548 ptr->r.record.x.t);
2549 break;
2550 default:
2551 as_bad ("record_type_not_valid");
2552 break;
800eeca4
JW		 2553 }
2554}
2555
197865e8 2556/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2557 the specified function. */
2558static void
2559process_unw_records (list, f)
2560 unw_rec_list *list;
2561 vbyte_func f;
2562{
2563 unw_rec_list *ptr;
2564 for (ptr = list; ptr; ptr = ptr->next)
2565 process_one_record (ptr, f);
2566}
2567
2568/* Determine the size of a record list in bytes. */
2569static int
2570calc_record_size (list)
2571 unw_rec_list *list;
2572{
2573 vbyte_count = 0;
2574 process_unw_records (list, count_output);
2575 return vbyte_count;
2576}
2577
e0c9811a
JW		 2578/* Update IMASK bitmask to reflect the fact that one or more registers
2579 of type TYPE are saved starting at instruction with index T. If N
2580 bits are set in REGMASK, it is assumed that instructions T through
2581 T+N-1 save these registers.
2582
2583 TYPE values:
2584 0: no save
2585 1: instruction saves next fp reg
2586 2: instruction saves next general reg
2587 3: instruction saves next branch reg */
2588static void
2589set_imask (region, regmask, t, type)
2590 unw_rec_list *region;
2591 unsigned long regmask;
2592 unsigned long t;
2593 unsigned int type;
2594{
2595 unsigned char *imask;
2596 unsigned long imask_size;
2597 unsigned int i;
2598 int pos;
2599
2600 imask = region->r.record.r.mask.i;
2601 imask_size = region->r.record.r.imask_size;
2602 if (!imask)
2603 {
542d6675 2604 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2605 imask = xmalloc (imask_size);
2606 memset (imask, 0, imask_size);
2607
2608 region->r.record.r.imask_size = imask_size;
2609 region->r.record.r.mask.i = imask;
2610 }
2611
542d6675
KH		 2612 i = (t / 4) + 1;
2613 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2614 while (regmask)
2615 {
2616 if (i >= imask_size)
2617 {
2618 as_bad ("Ignoring attempt to spill beyond end of region");
2619 return;
2620 }
2621
2622 imask[i] |= (type & 0x3) << pos;
197865e8 2623
e0c9811a
JW		 2624 regmask &= (regmask - 1);
2625 pos -= 2;
2626 if (pos < 0)
2627 {
2628 pos = 0;
2629 ++i;
2630 }
2631 }
2632}
2633
f5a30c2e
JW		 2634/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2635 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2636 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2637 for frag sizes. */
f5a30c2e 2638
e0c9811a 2639unsigned long
b5e0fabd 2640slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2641 unsigned long slot_addr;
2642 fragS *slot_frag;
2643 unsigned long first_addr;
2644 fragS *first_frag;
b5e0fabd 2645 int before_relax;
e0c9811a 2646{
f5a30c2e
JW		 2647 unsigned long index = 0;
2648
2649 /* First time we are called, the initial address and frag are invalid. */
2650 if (first_addr == 0)
2651 return 0;
2652
2653 /* If the two addresses are in different frags, then we need to add in
2654 the remaining size of this frag, and then the entire size of intermediate
2655 frags. */
2656 while (slot_frag != first_frag)
2657 {
2658 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2659
b5e0fabd 2660 if (! before_relax)
73f20958 2661 {
b5e0fabd
JW		 2662 /* We can get the final addresses only during and after
2663 relaxation. */
73f20958
L		 2664 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2665 index += 3 * ((first_frag->fr_next->fr_address
2666 - first_frag->fr_address
2667 - first_frag->fr_fix) >> 4);
2668 }
2669 else
2670 /* We don't know what the final addresses will be. We try our
2671 best to estimate. */
2672 switch (first_frag->fr_type)
2673 {
2674 default:
2675 break;
2676
2677 case rs_space:
2678 as_fatal ("only constant space allocation is supported");
2679 break;
2680
2681 case rs_align:
2682 case rs_align_code:
2683 case rs_align_test:
2684 /* Take alignment into account. Assume the worst case
2685 before relaxation. */
2686 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2687 break;
2688
2689 case rs_org:
2690 if (first_frag->fr_symbol)
2691 {
2692 as_fatal ("only constant offsets are supported");
2693 break;
2694 }
2695 case rs_fill:
2696 index += 3 * (first_frag->fr_offset >> 4);
2697 break;
2698 }
2699
f5a30c2e
JW		 2700 /* Add in the full size of the frag converted to instruction slots. */
2701 index += 3 * (first_frag->fr_fix >> 4);
2702 /* Subtract away the initial part before first_addr. */
2703 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2704 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2705
f5a30c2e
JW		 2706 /* Move to the beginning of the next frag. */
2707 first_frag = first_frag->fr_next;
2708 first_addr = (unsigned long) &first_frag->fr_literal;
2709 }
2710
2711 /* Add in the used part of the last frag. */
2712 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2713 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2714 return index;
2715}
4a1805b1 2716
91a2ae2a
RH		 2717/* Optimize unwind record directives. */
2718
2719static unw_rec_list *
2720optimize_unw_records (list)
2721 unw_rec_list *list;
2722{
2723 if (!list)
2724 return NULL;
2725
2726 /* If the only unwind record is ".prologue" or ".prologue" followed
2727 by ".body", then we can optimize the unwind directives away. */
2728 if (list->r.type == prologue
5738bc24
JW		 2729 && (list->next->r.type == endp
2730 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2731 return NULL;
2732
2733 return list;
2734}
2735
800eeca4
JW		 2736/* Given a complete record list, process any records which have
2737 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2738 this has been run, all necessary information should be available
800eeca4 2739 within each record to generate an image. */
542d6675 2740
800eeca4 2741static void
b5e0fabd 2742fixup_unw_records (list, before_relax)
800eeca4 2743 unw_rec_list *list;
b5e0fabd 2744 int before_relax;
800eeca4 2745{
e0c9811a
JW		 2746 unw_rec_list *ptr, *region = 0;
2747 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2748 fragS *first_frag = 0;
e0c9811a 2749
800eeca4
JW		 2750 for (ptr = list; ptr; ptr = ptr->next)
2751 {
2752 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2753 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2754 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2755 first_addr, first_frag, before_relax);
800eeca4
JW		 2756 switch (ptr->r.type)
2757 {
542d6675
KH		 2758 case prologue:
2759 case prologue_gr:
2760 case body:
2761 {
2762 unw_rec_list *last;
5738bc24
JW		 2763 int size;
2764 unsigned long last_addr = 0;
2765 fragS *last_frag = NULL;
542d6675
KH		 2766
2767 first_addr = ptr->slot_number;
f5a30c2e 2768 first_frag = ptr->slot_frag;
542d6675 2769 /* Find either the next body/prologue start, or the end of
5738bc24 2770 the function, and determine the size of the region. */
542d6675
KH		 2771 for (last = ptr->next; last != NULL; last = last->next)
2772 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2773 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2774 {
2775 last_addr = last->slot_number;
f5a30c2e 2776 last_frag = last->slot_frag;
542d6675
KH		 2777 break;
2778 }
b5e0fabd
JW		 2779 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2780 before_relax);
542d6675 2781 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2782 if (ptr->r.type == body)
2783 /* End of region. */
2784 region = 0;
2785 else
2786 region = ptr;
e0c9811a 2787 break;
542d6675
KH		 2788 }
2789 case epilogue:
ed7af9f9
L		 2790 if (t < rlen)
2791 ptr->r.record.b.t = rlen - 1 - t;
2792 else
2793 /* This happens when a memory-stack-less procedure uses a
2794 ".restore sp" directive at the end of a region to pop
2795 the frame state. */
2796 ptr->r.record.b.t = 0;
542d6675 2797 break;
e0c9811a 2798
542d6675
KH		 2799 case mem_stack_f:
2800 case mem_stack_v:
2801 case rp_when:
2802 case pfs_when:
2803 case preds_when:
2804 case unat_when:
2805 case lc_when:
2806 case fpsr_when:
2807 case priunat_when_gr:
2808 case priunat_when_mem:
2809 case bsp_when:
2810 case bspstore_when:
2811 case rnat_when:
2812 ptr->r.record.p.t = t;
2813 break;
e0c9811a 2814
542d6675
KH		 2815 case spill_reg:
2816 case spill_sprel:
2817 case spill_psprel:
2818 case spill_reg_p:
2819 case spill_sprel_p:
2820 case spill_psprel_p:
2821 ptr->r.record.x.t = t;
2822 break;
e0c9811a 2823
542d6675
KH		 2824 case frgr_mem:
2825 if (!region)
2826 {
75e09913 2827 as_bad ("frgr_mem record before region record!");
542d6675
KH		 2828 return;
2829 }
2830 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2831 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2832 set_imask (region, ptr->r.record.p.frmask, t, 1);
2833 set_imask (region, ptr->r.record.p.grmask, t, 2);
2834 break;
2835 case fr_mem:
2836 if (!region)
2837 {
75e09913 2838 as_bad ("fr_mem record before region record!");
542d6675
KH		 2839 return;
2840 }
2841 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2842 set_imask (region, ptr->r.record.p.rmask, t, 1);
2843 break;
2844 case gr_mem:
2845 if (!region)
2846 {
75e09913 2847 as_bad ("gr_mem record before region record!");
542d6675
KH		 2848 return;
2849 }
2850 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2851 set_imask (region, ptr->r.record.p.rmask, t, 2);
2852 break;
2853 case br_mem:
2854 if (!region)
2855 {
75e09913 2856 as_bad ("br_mem record before region record!");
542d6675
KH		 2857 return;
2858 }
2859 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2860 set_imask (region, ptr->r.record.p.brmask, t, 3);
2861 break;
e0c9811a 2862
542d6675
KH		 2863 case gr_gr:
2864 if (!region)
2865 {
75e09913 2866 as_bad ("gr_gr record before region record!");
542d6675
KH		 2867 return;
2868 }
2869 set_imask (region, ptr->r.record.p.grmask, t, 2);
2870 break;
2871 case br_gr:
2872 if (!region)
2873 {
75e09913 2874 as_bad ("br_gr record before region record!");
542d6675
KH		 2875 return;
2876 }
2877 set_imask (region, ptr->r.record.p.brmask, t, 3);
2878 break;
e0c9811a 2879
542d6675
KH		 2880 default:
2881 break;
800eeca4
JW		 2882 }
2883 }
2884}
2885
b5e0fabd
JW		 2886/* Estimate the size of a frag before relaxing. We only have one type of frag
2887 to handle here, which is the unwind info frag. */
2888
2889int
2890ia64_estimate_size_before_relax (fragS *frag,
2891 asection *segtype ATTRIBUTE_UNUSED)
2892{
2893 unw_rec_list *list;
2894 int len, size, pad;
2895
2896 /* ??? This code is identical to the first part of ia64_convert_frag. */
2897 list = (unw_rec_list *) frag->fr_opcode;
2898 fixup_unw_records (list, 0);
2899
2900 len = calc_record_size (list);
2901 /* pad to pointer-size boundary. */
2902 pad = len % md.pointer_size;
2903 if (pad != 0)
2904 len += md.pointer_size - pad;
f7e323d5
JB		 2905 /* Add 8 for the header. */
2906 size = len + 8;
2907 /* Add a pointer for the personality offset. */
2908 if (frag->fr_offset)
2909 size += md.pointer_size;
b5e0fabd
JW		 2910
2911 /* fr_var carries the max_chars that we created the fragment with.
2912 We must, of course, have allocated enough memory earlier. */
2913 assert (frag->fr_var >= size);
2914
2915 return frag->fr_fix + size;
2916}
2917
73f20958
L		 2918/* This function converts a rs_machine_dependent variant frag into a
2919 normal fill frag with the unwind image from the the record list. */
2920void
2921ia64_convert_frag (fragS *frag)
557debba 2922{
73f20958
L		 2923 unw_rec_list *list;
2924 int len, size, pad;
1cd8ff38 2925 valueT flag_value;
557debba 2926
b5e0fabd 2927 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 2928 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 2929 fixup_unw_records (list, 0);
1cd8ff38 2930
73f20958
L		 2931 len = calc_record_size (list);
2932 /* pad to pointer-size boundary. */
2933 pad = len % md.pointer_size;
2934 if (pad != 0)
2935 len += md.pointer_size - pad;
f7e323d5
JB		 2936 /* Add 8 for the header. */
2937 size = len + 8;
2938 /* Add a pointer for the personality offset. */
2939 if (frag->fr_offset)
2940 size += md.pointer_size;
73f20958
L		 2941
2942 /* fr_var carries the max_chars that we created the fragment with.
2943 We must, of course, have allocated enough memory earlier. */
2944 assert (frag->fr_var >= size);
2945
2946 /* Initialize the header area. fr_offset is initialized with
2947 unwind.personality_routine. */
2948 if (frag->fr_offset)
1cd8ff38
NC		 2949 {
2950 if (md.flags & EF_IA_64_ABI64)
2951 flag_value = (bfd_vma) 3 << 32;
2952 else
2953 /* 32-bit unwind info block. */
2954 flag_value = (bfd_vma) 0x1003 << 32;
2955 }
2956 else
2957 flag_value = 0;
557debba 2958
73f20958
L		 2959 md_number_to_chars (frag->fr_literal,
2960 (((bfd_vma) 1 << 48) /* Version. */
2961 | flag_value /* U & E handler flags. */
2962 | (len / md.pointer_size)), /* Length. */
2963 8);
557debba 2964
73f20958
L		 2965 /* Skip the header. */
2966 vbyte_mem_ptr = frag->fr_literal + 8;
2967 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 2968
2969 /* Fill the padding bytes with zeros. */
2970 if (pad != 0)
2971 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2972 md.pointer_size - pad);
2973
73f20958
L		 2974 frag->fr_fix += size;
2975 frag->fr_type = rs_fill;
2976 frag->fr_var = 0;
2977 frag->fr_offset = 0;
800eeca4
JW		 2978}
2979
e0c9811a
JW		 2980static int
2981convert_expr_to_ab_reg (e, ab, regp)
2982 expressionS *e;
2983 unsigned int *ab;
2984 unsigned int *regp;
2985{
2986 unsigned int reg;
2987
2988 if (e->X_op != O_register)
2989 return 0;
2990
2991 reg = e->X_add_number;
2434f565 2992 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 2993 {
2994 *ab = 0;
2995 *regp = reg - REG_GR;
2996 }
2434f565
JW		 2997 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2998 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 2999 {
3000 *ab = 1;
3001 *regp = reg - REG_FR;
3002 }
2434f565 3003 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 3004 {
3005 *ab = 2;
3006 *regp = reg - REG_BR;
3007 }
3008 else
3009 {
3010 *ab = 3;
3011 switch (reg)
3012 {
3013 case REG_PR: *regp = 0; break;
3014 case REG_PSP: *regp = 1; break;
3015 case REG_PRIUNAT: *regp = 2; break;
3016 case REG_BR + 0: *regp = 3; break;
3017 case REG_AR + AR_BSP: *regp = 4; break;
3018 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3019 case REG_AR + AR_RNAT: *regp = 6; break;
3020 case REG_AR + AR_UNAT: *regp = 7; break;
3021 case REG_AR + AR_FPSR: *regp = 8; break;
3022 case REG_AR + AR_PFS: *regp = 9; break;
3023 case REG_AR + AR_LC: *regp = 10; break;
3024
3025 default:
3026 return 0;
3027 }
3028 }
3029 return 1;
197865e8 3030}
e0c9811a
JW		 3031
3032static int
3033convert_expr_to_xy_reg (e, xy, regp)
3034 expressionS *e;
3035 unsigned int *xy;
3036 unsigned int *regp;
3037{
3038 unsigned int reg;
3039
3040 if (e->X_op != O_register)
3041 return 0;
3042
3043 reg = e->X_add_number;
3044
2434f565 3045 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
e0c9811a
JW		 3046 {
3047 *xy = 0;
3048 *regp = reg - REG_GR;
3049 }
2434f565 3050 else if (reg >= REG_FR && reg <= (REG_FR + 127))
e0c9811a
JW		 3051 {
3052 *xy = 1;
3053 *regp = reg - REG_FR;
3054 }
2434f565 3055 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3056 {
3057 *xy = 2;
3058 *regp = reg - REG_BR;
3059 }
3060 else
3061 return -1;
3062 return 1;
197865e8 3063}
e0c9811a 3064
d9201763
L		 3065static void
3066dot_align (int arg)
3067{
3068 /* The current frag is an alignment frag. */
3069 align_frag = frag_now;
3070 s_align_bytes (arg);
3071}
3072
800eeca4
JW		 3073static void
3074dot_radix (dummy)
2434f565 3075 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3076{
3077 int radix;
3078
3079 SKIP_WHITESPACE ();
3080 radix = *input_line_pointer++;
3081
3082 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3083 {
3084 as_bad ("Radix `%c' unsupported", *input_line_pointer);
542d6675 3085 ignore_rest_of_line ();
800eeca4
JW		 3086 return;
3087 }
3088}
3089
196e8040
JW		 3090/* Helper function for .loc directives. If the assembler is not generating
3091 line number info, then we need to remember which instructions have a .loc
3092 directive, and only call dwarf2_gen_line_info for those instructions. */
3093
3094static void
3095dot_loc (int x)
3096{
3097 CURR_SLOT.loc_directive_seen = 1;
3098 dwarf2_directive_loc (x);
3099}
3100
800eeca4
JW		 3101/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3102static void
3103dot_special_section (which)
3104 int which;
3105{
3106 set_section ((char *) special_section_name[which]);
3107}
3108
07450571
L		 3109/* Return -1 for warning and 0 for error. */
3110
3111static int
970d6792
L		 3112unwind_diagnostic (const char * region, const char *directive)
3113{
3114 if (md.unwind_check == unwind_check_warning)
07450571
L		 3115 {
3116 as_warn (".%s outside of %s", directive, region);
3117 return -1;
3118 }
970d6792
L		 3119 else
3120 {
3121 as_bad (".%s outside of %s", directive, region);
3122 ignore_rest_of_line ();
07450571 3123 return 0;
970d6792
L		 3124 }
3125}
3126
07450571
L		 3127/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3128 a procedure but the unwind directive check is set to warning, 0 if
3129 a directive isn't in a procedure and the unwind directive check is set
3130 to error. */
3131
75e09913
JB		 3132static int
3133in_procedure (const char *directive)
3134{
3135 if (unwind.proc_start
3136 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3137 return 1;
07450571 3138 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3139}
3140
07450571
L		 3141/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3142 a prologue but the unwind directive check is set to warning, 0 if
3143 a directive isn't in a prologue and the unwind directive check is set
3144 to error. */
3145
75e09913
JB		 3146static int
3147in_prologue (const char *directive)
3148{
07450571
L		 3149 int in = in_procedure (directive);
3150 if (in)
75e09913 3151 {
970d6792 3152 /* We are in a procedure. Check if we are in a prologue. */
75e09913
JB		 3153 if (unwind.prologue)
3154 return 1;
07450571
L		 3155 /* We only want to issue one message. */
3156 if (in == 1)
3157 return unwind_diagnostic ("prologue", directive);
3158 else
3159 return -1;
75e09913
JB		 3160 }
3161 return 0;
3162}
3163
07450571
L		 3164/* Return 1 if a directive is in a body, -1 if a directive isn't in
3165 a body but the unwind directive check is set to warning, 0 if
3166 a directive isn't in a body and the unwind directive check is set
3167 to error. */
3168
75e09913
JB		 3169static int
3170in_body (const char *directive)
3171{
07450571
L		 3172 int in = in_procedure (directive);
3173 if (in)
75e09913 3174 {
970d6792 3175 /* We are in a procedure. Check if we are in a body. */
75e09913
JB		 3176 if (unwind.body)
3177 return 1;
07450571
L		 3178 /* We only want to issue one message. */
3179 if (in == 1)
3180 return unwind_diagnostic ("body region", directive);
3181 else
3182 return -1;
75e09913
JB		 3183 }
3184 return 0;
3185}
3186
800eeca4
JW		 3187static void
3188add_unwind_entry (ptr)
3189 unw_rec_list *ptr;
3190{
e0c9811a
JW		 3191 if (unwind.tail)
3192 unwind.tail->next = ptr;
800eeca4 3193 else
e0c9811a
JW		 3194 unwind.list = ptr;
3195 unwind.tail = ptr;
800eeca4
JW		 3196
3197 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3198 if (unwind.current_entry == NULL)
3199 unwind.current_entry = ptr;
800eeca4
JW		 3200}
3201
197865e8 3202static void
800eeca4 3203dot_fframe (dummy)
2434f565 3204 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3205{
3206 expressionS e;
e0c9811a 3207
75e09913
JB		 3208 if (!in_prologue ("fframe"))
3209 return;
3210
800eeca4 3211 parse_operand (&e);
197865e8 3212
800eeca4
JW		 3213 if (e.X_op != O_constant)
3214 as_bad ("Operand to .fframe must be a constant");
3215 else
e0c9811a
JW		 3216 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3217}
3218
197865e8 3219static void
e0c9811a 3220dot_vframe (dummy)
2434f565 3221 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3222{
3223 expressionS e;
3224 unsigned reg;
3225
75e09913
JB		 3226 if (!in_prologue ("vframe"))
3227 return;
3228
e0c9811a
JW		 3229 parse_operand (&e);
3230 reg = e.X_add_number - REG_GR;
3231 if (e.X_op == O_register && reg < 128)
800eeca4 3232 {
e0c9811a 3233 add_unwind_entry (output_mem_stack_v ());
30d25259
RH		 3234 if (! (unwind.prologue_mask & 2))
3235 add_unwind_entry (output_psp_gr (reg));
800eeca4 3236 }
e0c9811a
JW		 3237 else
3238 as_bad ("First operand to .vframe must be a general register");
800eeca4
JW		 3239}
3240
197865e8 3241static void
e0c9811a 3242dot_vframesp (dummy)
2434f565 3243 int dummy ATTRIBUTE_UNUSED;
800eeca4 3244{
e0c9811a
JW		 3245 expressionS e;
3246
75e09913
JB		 3247 if (!in_prologue ("vframesp"))
3248 return;
3249
e0c9811a
JW		 3250 parse_operand (&e);
3251 if (e.X_op == O_constant)
3252 {
3253 add_unwind_entry (output_mem_stack_v ());
3254 add_unwind_entry (output_psp_sprel (e.X_add_number));
3255 }
3256 else
69906a9b 3257 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
e0c9811a
JW		 3258}
3259
197865e8 3260static void
e0c9811a 3261dot_vframepsp (dummy)
2434f565 3262 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3263{
3264 expressionS e;
3265
75e09913
JB		 3266 if (!in_prologue ("vframepsp"))
3267 return;
3268
e0c9811a
JW		 3269 parse_operand (&e);
3270 if (e.X_op == O_constant)
3271 {
3272 add_unwind_entry (output_mem_stack_v ());
3273 add_unwind_entry (output_psp_sprel (e.X_add_number));
3274 }
3275 else
69906a9b 3276 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
800eeca4
JW		 3277}
3278
197865e8 3279static void
800eeca4 3280dot_save (dummy)
2434f565 3281 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3282{
3283 expressionS e1, e2;
3284 int sep;
3285 int reg1, reg2;
3286
75e09913
JB		 3287 if (!in_prologue ("save"))
3288 return;
3289
800eeca4
JW		 3290 sep = parse_operand (&e1);
3291 if (sep != ',')
3292 as_bad ("No second operand to .save");
3293 sep = parse_operand (&e2);
3294
e0c9811a 3295 reg1 = e1.X_add_number;
800eeca4 3296 reg2 = e2.X_add_number - REG_GR;
197865e8 3297
800eeca4 3298 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3299 if (e1.X_op == O_register)
800eeca4 3300 {
542d6675 3301 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
800eeca4
JW		 3302 {
3303 switch (reg1)
3304 {
542d6675
KH		 3305 case REG_AR + AR_BSP:
3306 add_unwind_entry (output_bsp_when ());
3307 add_unwind_entry (output_bsp_gr (reg2));
3308 break;
3309 case REG_AR + AR_BSPSTORE:
3310 add_unwind_entry (output_bspstore_when ());
3311 add_unwind_entry (output_bspstore_gr (reg2));
3312 break;
3313 case REG_AR + AR_RNAT:
3314 add_unwind_entry (output_rnat_when ());
3315 add_unwind_entry (output_rnat_gr (reg2));
3316 break;
3317 case REG_AR + AR_UNAT:
3318 add_unwind_entry (output_unat_when ());
3319 add_unwind_entry (output_unat_gr (reg2));
3320 break;
3321 case REG_AR + AR_FPSR:
3322 add_unwind_entry (output_fpsr_when ());
3323 add_unwind_entry (output_fpsr_gr (reg2));
3324 break;
3325 case REG_AR + AR_PFS:
3326 add_unwind_entry (output_pfs_when ());
3327 if (! (unwind.prologue_mask & 4))
3328 add_unwind_entry (output_pfs_gr (reg2));
3329 break;
3330 case REG_AR + AR_LC:
3331 add_unwind_entry (output_lc_when ());
3332 add_unwind_entry (output_lc_gr (reg2));
3333 break;
3334 case REG_BR:
3335 add_unwind_entry (output_rp_when ());
3336 if (! (unwind.prologue_mask & 8))
3337 add_unwind_entry (output_rp_gr (reg2));
3338 break;
3339 case REG_PR:
3340 add_unwind_entry (output_preds_when ());
3341 if (! (unwind.prologue_mask & 1))
3342 add_unwind_entry (output_preds_gr (reg2));
3343 break;
3344 case REG_PRIUNAT:
3345 add_unwind_entry (output_priunat_when_gr ());
3346 add_unwind_entry (output_priunat_gr (reg2));
3347 break;
3348 default:
3349 as_bad ("First operand not a valid register");
800eeca4
JW		 3350 }
3351 }
3352 else
3353 as_bad (" Second operand not a valid register");
3354 }
3355 else
e0c9811a 3356 as_bad ("First operand not a register");
800eeca4
JW		 3357}
3358
197865e8 3359static void
800eeca4 3360dot_restore (dummy)
2434f565 3361 int dummy ATTRIBUTE_UNUSED;
800eeca4 3362{
e0c9811a 3363 expressionS e1, e2;
33d01f33 3364 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3365 int sep;
3366
75e09913
JB		 3367 if (!in_body ("restore"))
3368 return;
3369
e0c9811a
JW		 3370 sep = parse_operand (&e1);
3371 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3372 {
3373 as_bad ("First operand to .restore must be stack pointer (sp)");
3374 return;
3375 }
3376
3377 if (sep == ',')
3378 {
3379 parse_operand (&e2);
33d01f33 3380 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3381 {
33d01f33 3382 as_bad ("Second operand to .restore must be a constant >= 0");
e0c9811a
JW		 3383 return;
3384 }
33d01f33 3385 ecount = e2.X_add_number;
e0c9811a 3386 }
33d01f33
JW		 3387 else
3388 ecount = unwind.prologue_count - 1;
6290819d
NC		 3389
3390 if (ecount >= unwind.prologue_count)
3391 {
3392 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3393 ecount + 1, unwind.prologue_count);
3394 return;
3395 }
3396
e0c9811a 3397 add_unwind_entry (output_epilogue (ecount));
33d01f33
JW		 3398
3399 if (ecount < unwind.prologue_count)
3400 unwind.prologue_count -= ecount + 1;
3401 else
3402 unwind.prologue_count = 0;
e0c9811a
JW		 3403}
3404
197865e8 3405static void
e0c9811a 3406dot_restorereg (dummy)
2434f565 3407 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3408{
3409 unsigned int ab, reg;
3410 expressionS e;
3411
75e09913
JB		 3412 if (!in_procedure ("restorereg"))
3413 return;
3414
e0c9811a
JW		 3415 parse_operand (&e);
3416
3417 if (!convert_expr_to_ab_reg (&e, &ab, &reg))
3418 {
3419 as_bad ("First operand to .restorereg must be a preserved register");
3420 return;
3421 }
3422 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3423}
3424
197865e8 3425static void
e0c9811a 3426dot_restorereg_p (dummy)
2434f565 3427 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3428{
3429 unsigned int qp, ab, reg;
3430 expressionS e1, e2;
3431 int sep;
3432
75e09913
JB		 3433 if (!in_procedure ("restorereg.p"))
3434 return;
3435
e0c9811a
JW		 3436 sep = parse_operand (&e1);
3437 if (sep != ',')
3438 {
3439 as_bad ("No second operand to .restorereg.p");
3440 return;
3441 }
3442
3443 parse_operand (&e2);
3444
3445 qp = e1.X_add_number - REG_P;
3446 if (e1.X_op != O_register || qp > 63)
3447 {
3448 as_bad ("First operand to .restorereg.p must be a predicate");
3449 return;
3450 }
3451
3452 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3453 {
3454 as_bad ("Second operand to .restorereg.p must be a preserved register");
3455 return;
3456 }
3457 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
800eeca4
JW		 3458}
3459
2d6ed997
L		 3460static char *special_linkonce_name[] =
3461 {
3462 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3463 };
3464
3465static void
da9f89d4 3466start_unwind_section (const segT text_seg, int sec_index)
2d6ed997
L		 3467{
3468 /*
3469 Use a slightly ugly scheme to derive the unwind section names from
3470 the text section name:
3471
3472 text sect. unwind table sect.
3473 name: name: comments:
3474 ---------- ----------------- --------------------------------
3475 .text .IA_64.unwind
3476 .text.foo .IA_64.unwind.text.foo
3477 .foo .IA_64.unwind.foo
3478 .gnu.linkonce.t.foo
3479 .gnu.linkonce.ia64unw.foo
3480 _info .IA_64.unwind_info gas issues error message (ditto)
3481 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3482
3483 This mapping is done so that:
3484
3485 (a) An object file with unwind info only in .text will use
3486 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3487 This follows the letter of the ABI and also ensures backwards
3488 compatibility with older toolchains.
3489
3490 (b) An object file with unwind info in multiple text sections
3491 will use separate unwind sections for each text section.
3492 This allows us to properly set the "sh_info" and "sh_link"
3493 fields in SHT_IA_64_UNWIND as required by the ABI and also
3494 lets GNU ld support programs with multiple segments
3495 containing unwind info (as might be the case for certain
3496 embedded applications).
3497
3498 (c) An error is issued if there would be a name clash.
3499 */
3500
3501 const char *text_name, *sec_text_name;
3502 char *sec_name;
3503 const char *prefix = special_section_name [sec_index];
3504 const char *suffix;
3505 size_t prefix_len, suffix_len, sec_name_len;
3506
3507 sec_text_name = segment_name (text_seg);
3508 text_name = sec_text_name;
3509 if (strncmp (text_name, "_info", 5) == 0)
3510 {
3511 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3512 text_name);
3513 ignore_rest_of_line ();
3514 return;
3515 }
3516 if (strcmp (text_name, ".text") == 0)
3517 text_name = "";
3518
3519 /* Build the unwind section name by appending the (possibly stripped)
3520 text section name to the unwind prefix. */
3521 suffix = text_name;
3522 if (strncmp (text_name, ".gnu.linkonce.t.",
3523 sizeof (".gnu.linkonce.t.") - 1) == 0)
3524 {
3525 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3526 suffix += sizeof (".gnu.linkonce.t.") - 1;
3527 }
3528
3529 prefix_len = strlen (prefix);
3530 suffix_len = strlen (suffix);
3531 sec_name_len = prefix_len + suffix_len;
3532 sec_name = alloca (sec_name_len + 1);
3533 memcpy (sec_name, prefix, prefix_len);
3534 memcpy (sec_name + prefix_len, suffix, suffix_len);
3535 sec_name [sec_name_len] = '\0';
3536
3537 /* Handle COMDAT group. */
6e3f953d
L		 3538 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3539 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
2d6ed997
L		 3540 {
3541 char *section;
3542 size_t len, group_name_len;
3543 const char *group_name = elf_group_name (text_seg);
3544
3545 if (group_name == NULL)
3546 {
3547 as_bad ("Group section `%s' has no group signature",
3548 sec_text_name);
3549 ignore_rest_of_line ();
3550 return;
3551 }
3552 /* We have to construct a fake section directive. */
3553 group_name_len = strlen (group_name);
3554 len = (sec_name_len
3555 + 16 /* ,"aG",@progbits, */
3556 + group_name_len /* ,group_name */
3557 + 7); /* ,comdat */
3558
3559 section = alloca (len + 1);
3560 memcpy (section, sec_name, sec_name_len);
3561 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3562 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3563 memcpy (section + len - 7, ",comdat", 7);
3564 section [len] = '\0';
3565 set_section (section);
3566 }
3567 else
3568 {
3569 set_section (sec_name);
3570 bfd_set_section_flags (stdoutput, now_seg,
3571 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3572 }
38ce5b11
L		 3573
3574 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3575}
3576
73f20958 3577static void
2d6ed997 3578generate_unwind_image (const segT text_seg)
800eeca4 3579{
73f20958
L		 3580 int size, pad;
3581 unw_rec_list *list;
800eeca4 3582
c97b7ef6
JW		 3583 /* Mark the end of the unwind info, so that we can compute the size of the
3584 last unwind region. */
3585 add_unwind_entry (output_endp ());
3586
10850f29
JW		 3587 /* Force out pending instructions, to make sure all unwind records have
3588 a valid slot_number field. */
3589 ia64_flush_insns ();
3590
800eeca4 3591 /* Generate the unwind record. */
73f20958 3592 list = optimize_unw_records (unwind.list);
b5e0fabd 3593 fixup_unw_records (list, 1);
73f20958
L		 3594 size = calc_record_size (list);
3595
3596 if (size > 0 || unwind.force_unwind_entry)
3597 {
3598 unwind.force_unwind_entry = 0;
3599 /* pad to pointer-size boundary. */
3600 pad = size % md.pointer_size;
3601 if (pad != 0)
3602 size += md.pointer_size - pad;
f7e323d5
JB		 3603 /* Add 8 for the header. */
3604 size += 8;
3605 /* Add a pointer for the personality offset. */
3606 if (unwind.personality_routine)
3607 size += md.pointer_size;
73f20958 3608 }
6290819d 3609
800eeca4
JW		 3610 /* If there are unwind records, switch sections, and output the info. */
3611 if (size != 0)
3612 {
800eeca4 3613 expressionS exp;
1cd8ff38 3614 bfd_reloc_code_real_type reloc;
91a2ae2a 3615
da9f89d4 3616 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3617
557debba
JW		 3618 /* Make sure the section has 4 byte alignment for ILP32 and
3619 8 byte alignment for LP64. */
3620 frag_align (md.pointer_size_shift, 0, 0);
3621 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3622
800eeca4 3623 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3624 unwind.info = expr_build_dot ();
73f20958
L		 3625
3626 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3627 (offsetT) (long) unwind.personality_routine,
3628 (char *) list);
91a2ae2a 3629
800eeca4 3630 /* Add the personality address to the image. */
e0c9811a 3631 if (unwind.personality_routine != 0)
542d6675 3632 {
40449e9f 3633 exp.X_op = O_symbol;
e0c9811a 3634 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3635 exp.X_add_number = 0;
1cd8ff38
NC		 3636
3637 if (md.flags & EF_IA_64_BE)
3638 {
3639 if (md.flags & EF_IA_64_ABI64)
3640 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3641 else
3642 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3643 }
40449e9f 3644 else
1cd8ff38
NC		 3645 {
3646 if (md.flags & EF_IA_64_ABI64)
3647 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3648 else
3649 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3650 }
3651
3652 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3653 md.pointer_size, &exp, 0, reloc);
e0c9811a 3654 unwind.personality_routine = 0;
542d6675 3655 }
800eeca4
JW		 3656 }
3657
6290819d 3658 free_saved_prologue_counts ();
e0c9811a 3659 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3660}
3661
197865e8 3662static void
542d6675 3663dot_handlerdata (dummy)
2434f565 3664 int dummy ATTRIBUTE_UNUSED;
800eeca4 3665{
75e09913
JB		 3666 if (!in_procedure ("handlerdata"))
3667 return;
91a2ae2a
RH		 3668 unwind.force_unwind_entry = 1;
3669
3670 /* Remember which segment we're in so we can switch back after .endp */
3671 unwind.saved_text_seg = now_seg;
3672 unwind.saved_text_subseg = now_subseg;
3673
3674 /* Generate unwind info into unwind-info section and then leave that
3675 section as the currently active one so dataXX directives go into
3676 the language specific data area of the unwind info block. */
2d6ed997 3677 generate_unwind_image (now_seg);
e0c9811a 3678 demand_empty_rest_of_line ();
800eeca4
JW		 3679}
3680
197865e8 3681static void
800eeca4 3682dot_unwentry (dummy)
2434f565 3683 int dummy ATTRIBUTE_UNUSED;
800eeca4 3684{
75e09913
JB		 3685 if (!in_procedure ("unwentry"))
3686 return;
91a2ae2a 3687 unwind.force_unwind_entry = 1;
e0c9811a 3688 demand_empty_rest_of_line ();
800eeca4
JW		 3689}
3690
197865e8 3691static void
800eeca4 3692dot_altrp (dummy)
2434f565 3693 int dummy ATTRIBUTE_UNUSED;
800eeca4 3694{
e0c9811a
JW		 3695 expressionS e;
3696 unsigned reg;
3697
75e09913
JB		 3698 if (!in_prologue ("altrp"))
3699 return;
3700
e0c9811a
JW		 3701 parse_operand (&e);
3702 reg = e.X_add_number - REG_BR;
3703 if (e.X_op == O_register && reg < 8)
3704 add_unwind_entry (output_rp_br (reg));
3705 else
3706 as_bad ("First operand not a valid branch register");
800eeca4
JW		 3707}
3708
197865e8 3709static void
e0c9811a
JW		 3710dot_savemem (psprel)
3711 int psprel;
800eeca4
JW		 3712{
3713 expressionS e1, e2;
3714 int sep;
3715 int reg1, val;
3716
75e09913
JB		 3717 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3718 return;
3719
800eeca4
JW		 3720 sep = parse_operand (&e1);
3721 if (sep != ',')
e0c9811a 3722 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
800eeca4
JW		 3723 sep = parse_operand (&e2);
3724
e0c9811a 3725 reg1 = e1.X_add_number;
800eeca4 3726 val = e2.X_add_number;
197865e8 3727
800eeca4 3728 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3729 if (e1.X_op == O_register)
800eeca4
JW		 3730 {
3731 if (e2.X_op == O_constant)
3732 {
3733 switch (reg1)
3734 {
542d6675
KH		 3735 case REG_AR + AR_BSP:
3736 add_unwind_entry (output_bsp_when ());
3737 add_unwind_entry ((psprel
3738 ? output_bsp_psprel
3739 : output_bsp_sprel) (val));
3740 break;
3741 case REG_AR + AR_BSPSTORE:
3742 add_unwind_entry (output_bspstore_when ());
3743 add_unwind_entry ((psprel
3744 ? output_bspstore_psprel
3745 : output_bspstore_sprel) (val));
3746 break;
3747 case REG_AR + AR_RNAT:
3748 add_unwind_entry (output_rnat_when ());
3749 add_unwind_entry ((psprel
3750 ? output_rnat_psprel
3751 : output_rnat_sprel) (val));
3752 break;
3753 case REG_AR + AR_UNAT:
3754 add_unwind_entry (output_unat_when ());
3755 add_unwind_entry ((psprel
3756 ? output_unat_psprel
3757 : output_unat_sprel) (val));
3758 break;
3759 case REG_AR + AR_FPSR:
3760 add_unwind_entry (output_fpsr_when ());
3761 add_unwind_entry ((psprel
3762 ? output_fpsr_psprel
3763 : output_fpsr_sprel) (val));
3764 break;
3765 case REG_AR + AR_PFS:
3766 add_unwind_entry (output_pfs_when ());
3767 add_unwind_entry ((psprel
3768 ? output_pfs_psprel
3769 : output_pfs_sprel) (val));
3770 break;
3771 case REG_AR + AR_LC:
3772 add_unwind_entry (output_lc_when ());
3773 add_unwind_entry ((psprel
3774 ? output_lc_psprel
3775 : output_lc_sprel) (val));
3776 break;
3777 case REG_BR:
3778 add_unwind_entry (output_rp_when ());
3779 add_unwind_entry ((psprel
3780 ? output_rp_psprel
3781 : output_rp_sprel) (val));
3782 break;
3783 case REG_PR:
3784 add_unwind_entry (output_preds_when ());
3785 add_unwind_entry ((psprel
3786 ? output_preds_psprel
3787 : output_preds_sprel) (val));
3788 break;
3789 case REG_PRIUNAT:
3790 add_unwind_entry (output_priunat_when_mem ());
3791 add_unwind_entry ((psprel
3792 ? output_priunat_psprel
3793 : output_priunat_sprel) (val));
3794 break;
3795 default:
3796 as_bad ("First operand not a valid register");
800eeca4
JW		 3797 }
3798 }
3799 else
3800 as_bad (" Second operand not a valid constant");
3801 }
3802 else
e0c9811a 3803 as_bad ("First operand not a register");
800eeca4
JW		 3804}
3805
197865e8 3806static void
800eeca4 3807dot_saveg (dummy)
2434f565 3808 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3809{
3810 expressionS e1, e2;
3811 int sep;
75e09913
JB		 3812
3813 if (!in_prologue ("save.g"))
3814 return;
3815
800eeca4
JW		 3816 sep = parse_operand (&e1);
3817 if (sep == ',')
3818 parse_operand (&e2);
197865e8 3819
800eeca4
JW		 3820 if (e1.X_op != O_constant)
3821 as_bad ("First operand to .save.g must be a constant.");
3822 else
3823 {
3824 int grmask = e1.X_add_number;
3825 if (sep != ',')
3826 add_unwind_entry (output_gr_mem (grmask));
3827 else
542d6675 3828 {
800eeca4 3829 int reg = e2.X_add_number - REG_GR;
542d6675 3830 if (e2.X_op == O_register && reg >= 0 && reg < 128)
800eeca4
JW		 3831 add_unwind_entry (output_gr_gr (grmask, reg));
3832 else
3833 as_bad ("Second operand is an invalid register.");
3834 }
3835 }
3836}
3837
197865e8 3838static void
800eeca4 3839dot_savef (dummy)
2434f565 3840 int dummy ATTRIBUTE_UNUSED;
800eeca4 3841{
e0c9811a 3842 expressionS e1;
800eeca4 3843 int sep;
75e09913
JB		 3844
3845 if (!in_prologue ("save.f"))
3846 return;
3847
800eeca4 3848 sep = parse_operand (&e1);
197865e8 3849
800eeca4
JW		 3850 if (e1.X_op != O_constant)
3851 as_bad ("Operand to .save.f must be a constant.");
3852 else
e0c9811a 3853 add_unwind_entry (output_fr_mem (e1.X_add_number));
800eeca4
JW		 3854}
3855
197865e8 3856static void
800eeca4 3857dot_saveb (dummy)
2434f565 3858 int dummy ATTRIBUTE_UNUSED;
800eeca4 3859{
e0c9811a
JW		 3860 expressionS e1, e2;
3861 unsigned int reg;
3862 unsigned char sep;
3863 int brmask;
3864
75e09913
JB		 3865 if (!in_prologue ("save.b"))
3866 return;
3867
800eeca4 3868 sep = parse_operand (&e1);
800eeca4 3869 if (e1.X_op != O_constant)
800eeca4 3870 {
e0c9811a
JW		 3871 as_bad ("First operand to .save.b must be a constant.");
3872 return;
800eeca4 3873 }
e0c9811a
JW		 3874 brmask = e1.X_add_number;
3875
3876 if (sep == ',')
3877 {
3878 sep = parse_operand (&e2);
3879 reg = e2.X_add_number - REG_GR;
3880 if (e2.X_op != O_register || reg > 127)
3881 {
3882 as_bad ("Second operand to .save.b must be a general register.");
3883 return;
3884 }
3885 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3886 }
3887 else
3888 add_unwind_entry (output_br_mem (brmask));
3889
3890 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3891 demand_empty_rest_of_line ();
800eeca4
JW		 3892}
3893
197865e8 3894static void
800eeca4 3895dot_savegf (dummy)
2434f565 3896 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3897{
3898 expressionS e1, e2;
3899 int sep;
75e09913
JB		 3900
3901 if (!in_prologue ("save.gf"))
3902 return;
3903
800eeca4
JW		 3904 sep = parse_operand (&e1);
3905 if (sep == ',')
3906 parse_operand (&e2);
197865e8 3907
800eeca4
JW		 3908 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3909 as_bad ("Both operands of .save.gf must be constants.");
3910 else
3911 {
3912 int grmask = e1.X_add_number;
3913 int frmask = e2.X_add_number;
3914 add_unwind_entry (output_frgr_mem (grmask, frmask));
3915 }
3916}
3917
197865e8 3918static void
800eeca4 3919dot_spill (dummy)
2434f565 3920 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3921{
3922 expressionS e;
e0c9811a
JW		 3923 unsigned char sep;
3924
75e09913
JB		 3925 if (!in_prologue ("spill"))
3926 return;
3927
e0c9811a
JW		 3928 sep = parse_operand (&e);
3929 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3930 demand_empty_rest_of_line ();
197865e8 3931
800eeca4
JW		 3932 if (e.X_op != O_constant)
3933 as_bad ("Operand to .spill must be a constant");
3934 else
e0c9811a
JW		 3935 add_unwind_entry (output_spill_base (e.X_add_number));
3936}
3937
3938static void
3939dot_spillreg (dummy)
2434f565 3940 int dummy ATTRIBUTE_UNUSED;
e0c9811a 3941{
2132e3a3
AM		 3942 int sep;
3943 unsigned int ab, xy, reg, treg;
e0c9811a
JW		 3944 expressionS e1, e2;
3945
75e09913
JB		 3946 if (!in_procedure ("spillreg"))
3947 return;
3948
e0c9811a
JW		 3949 sep = parse_operand (&e1);
3950 if (sep != ',')
3951 {
3952 as_bad ("No second operand to .spillreg");
3953 return;
3954 }
3955
3956 parse_operand (&e2);
3957
3958 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
800eeca4 3959 {
e0c9811a
JW		 3960 as_bad ("First operand to .spillreg must be a preserved register");
3961 return;
800eeca4 3962 }
e0c9811a
JW		 3963
3964 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3965 {
3966 as_bad ("Second operand to .spillreg must be a register");
3967 return;
3968 }
3969
3970 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3971}
3972
3973static void
3974dot_spillmem (psprel)
3975 int psprel;
3976{
3977 expressionS e1, e2;
2132e3a3
AM		 3978 int sep;
3979 unsigned int ab, reg;
e0c9811a 3980
75e09913
JB		 3981 if (!in_procedure ("spillmem"))
3982 return;
3983
e0c9811a
JW		 3984 sep = parse_operand (&e1);
3985 if (sep != ',')
3986 {
3987 as_bad ("Second operand missing");
3988 return;
3989 }
3990
3991 parse_operand (&e2);
3992
3993 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
3994 {
3995 as_bad ("First operand to .spill%s must be a preserved register",
3996 psprel ? "psp" : "sp");
3997 return;
3998 }
3999
4000 if (e2.X_op != O_constant)
4001 {
4002 as_bad ("Second operand to .spill%s must be a constant",
4003 psprel ? "psp" : "sp");
4004 return;
4005 }
4006
4007 if (psprel)
4008 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
4009 else
4010 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
4011}
4012
4013static void
4014dot_spillreg_p (dummy)
2434f565 4015 int dummy ATTRIBUTE_UNUSED;
e0c9811a 4016{
2132e3a3
AM		 4017 int sep;
4018 unsigned int ab, xy, reg, treg;
e0c9811a
JW		 4019 expressionS e1, e2, e3;
4020 unsigned int qp;
4021
75e09913
JB		 4022 if (!in_procedure ("spillreg.p"))
4023 return;
4024
e0c9811a
JW		 4025 sep = parse_operand (&e1);
4026 if (sep != ',')
4027 {
4028 as_bad ("No second and third operand to .spillreg.p");
4029 return;
4030 }
4031
4032 sep = parse_operand (&e2);
4033 if (sep != ',')
4034 {
4035 as_bad ("No third operand to .spillreg.p");
4036 return;
4037 }
4038
4039 parse_operand (&e3);
4040
4041 qp = e1.X_add_number - REG_P;
4042
4043 if (e1.X_op != O_register || qp > 63)
4044 {
4045 as_bad ("First operand to .spillreg.p must be a predicate");
4046 return;
4047 }
4048
4049 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4050 {
4051 as_bad ("Second operand to .spillreg.p must be a preserved register");
4052 return;
4053 }
4054
4055 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4056 {
4057 as_bad ("Third operand to .spillreg.p must be a register");
4058 return;
4059 }
4060
4061 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4062}
4063
4064static void
4065dot_spillmem_p (psprel)
4066 int psprel;
4067{
4068 expressionS e1, e2, e3;
2132e3a3
AM		 4069 int sep;
4070 unsigned int ab, reg;
e0c9811a
JW		 4071 unsigned int qp;
4072
75e09913
JB		 4073 if (!in_procedure ("spillmem.p"))
4074 return;
4075
e0c9811a
JW		 4076 sep = parse_operand (&e1);
4077 if (sep != ',')
4078 {
4079 as_bad ("Second operand missing");
4080 return;
4081 }
4082
4083 parse_operand (&e2);
4084 if (sep != ',')
4085 {
4086 as_bad ("Second operand missing");
4087 return;
4088 }
4089
4090 parse_operand (&e3);
4091
4092 qp = e1.X_add_number - REG_P;
4093 if (e1.X_op != O_register || qp > 63)
4094 {
4095 as_bad ("First operand to .spill%s_p must be a predicate",
4096 psprel ? "psp" : "sp");
4097 return;
4098 }
4099
4100 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4101 {
4102 as_bad ("Second operand to .spill%s_p must be a preserved register",
4103 psprel ? "psp" : "sp");
4104 return;
4105 }
4106
4107 if (e3.X_op != O_constant)
4108 {
4109 as_bad ("Third operand to .spill%s_p must be a constant",
4110 psprel ? "psp" : "sp");
4111 return;
4112 }
4113
4114 if (psprel)
fa7fda74 4115 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a 4116 else
fa7fda74 4117 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a
JW		 4118}
4119
6290819d
NC		 4120static unsigned int
4121get_saved_prologue_count (lbl)
4122 unsigned long lbl;
4123{
4124 label_prologue_count *lpc = unwind.saved_prologue_counts;
4125
4126 while (lpc != NULL && lpc->label_number != lbl)
4127 lpc = lpc->next;
4128
4129 if (lpc != NULL)
4130 return lpc->prologue_count;
4131
4132 as_bad ("Missing .label_state %ld", lbl);
4133 return 1;
4134}
4135
4136static void
4137save_prologue_count (lbl, count)
4138 unsigned long lbl;
4139 unsigned int count;
4140{
4141 label_prologue_count *lpc = unwind.saved_prologue_counts;
4142
4143 while (lpc != NULL && lpc->label_number != lbl)
4144 lpc = lpc->next;
4145
4146 if (lpc != NULL)
4147 lpc->prologue_count = count;
4148 else
4149 {
40449e9f 4150 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4151
4152 new_lpc->next = unwind.saved_prologue_counts;
4153 new_lpc->label_number = lbl;
4154 new_lpc->prologue_count = count;
4155 unwind.saved_prologue_counts = new_lpc;
4156 }
4157}
4158
4159static void
4160free_saved_prologue_counts ()
4161{
40449e9f
KH		 4162 label_prologue_count *lpc = unwind.saved_prologue_counts;
4163 label_prologue_count *next;
6290819d
NC		 4164
4165 while (lpc != NULL)
4166 {
4167 next = lpc->next;
4168 free (lpc);
4169 lpc = next;
4170 }
4171
4172 unwind.saved_prologue_counts = NULL;
4173}
4174
e0c9811a
JW		 4175static void
4176dot_label_state (dummy)
2434f565 4177 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4178{
4179 expressionS e;
4180
75e09913
JB		 4181 if (!in_body ("label_state"))
4182 return;
4183
e0c9811a
JW		 4184 parse_operand (&e);
4185 if (e.X_op != O_constant)
4186 {
4187 as_bad ("Operand to .label_state must be a constant");
4188 return;
4189 }
4190 add_unwind_entry (output_label_state (e.X_add_number));
6290819d 4191 save_prologue_count (e.X_add_number, unwind.prologue_count);
e0c9811a
JW		 4192}
4193
4194static void
4195dot_copy_state (dummy)
2434f565 4196 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4197{
4198 expressionS e;
4199
75e09913
JB		 4200 if (!in_body ("copy_state"))
4201 return;
4202
e0c9811a
JW		 4203 parse_operand (&e);
4204 if (e.X_op != O_constant)
4205 {
4206 as_bad ("Operand to .copy_state must be a constant");
4207 return;
4208 }
4209 add_unwind_entry (output_copy_state (e.X_add_number));
6290819d 4210 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
800eeca4
JW		 4211}
4212
197865e8 4213static void
800eeca4 4214dot_unwabi (dummy)
2434f565 4215 int dummy ATTRIBUTE_UNUSED;
800eeca4 4216{
e0c9811a
JW		 4217 expressionS e1, e2;
4218 unsigned char sep;
4219
75e09913
JB		 4220 if (!in_procedure ("unwabi"))
4221 return;
4222
e0c9811a
JW		 4223 sep = parse_operand (&e1);
4224 if (sep != ',')
4225 {
4226 as_bad ("Second operand to .unwabi missing");
4227 return;
4228 }
4229 sep = parse_operand (&e2);
4230 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4231 demand_empty_rest_of_line ();
e0c9811a
JW		 4232
4233 if (e1.X_op != O_constant)
4234 {
4235 as_bad ("First operand to .unwabi must be a constant");
4236 return;
4237 }
4238
4239 if (e2.X_op != O_constant)
4240 {
4241 as_bad ("Second operand to .unwabi must be a constant");
4242 return;
4243 }
4244
4245 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
800eeca4
JW		 4246}
4247
197865e8 4248static void
800eeca4 4249dot_personality (dummy)
2434f565 4250 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4251{
4252 char *name, *p, c;
75e09913
JB		 4253 if (!in_procedure ("personality"))
4254 return;
800eeca4
JW		 4255 SKIP_WHITESPACE ();
4256 name = input_line_pointer;
4257 c = get_symbol_end ();
4258 p = input_line_pointer;
e0c9811a 4259 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4260 unwind.force_unwind_entry = 1;
800eeca4
JW		 4261 *p = c;
4262 SKIP_WHITESPACE ();
4263 demand_empty_rest_of_line ();
4264}
4265
4266static void
4267dot_proc (dummy)
2434f565 4268 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4269{
4270 char *name, *p, c;
4271 symbolS *sym;
4272
75e09913 4273 unwind.proc_start = 0;
e0c9811a 4274 /* Parse names of main and alternate entry points and mark them as
542d6675 4275 function symbols: */
800eeca4
JW		 4276 while (1)
4277 {
4278 SKIP_WHITESPACE ();
4279 name = input_line_pointer;
4280 c = get_symbol_end ();
4281 p = input_line_pointer;
75e09913
JB		 4282 if (!*name)
4283 as_bad ("Empty argument of .proc");
4284 else
542d6675 4285 {
75e09913
JB		 4286 sym = symbol_find_or_make (name);
4287 if (S_IS_DEFINED (sym))
4288 as_bad ("`%s' was already defined", name);
4289 else if (unwind.proc_start == 0)
4290 {
4291 unwind.proc_start = sym;
4292 }
4293 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4294 }
800eeca4
JW		 4295 *p = c;
4296 SKIP_WHITESPACE ();
4297 if (*input_line_pointer != ',')
4298 break;
4299 ++input_line_pointer;
4300 }
75e09913
JB		 4301 if (unwind.proc_start == 0)
4302 unwind.proc_start = expr_build_dot ();
800eeca4
JW		 4303 demand_empty_rest_of_line ();
4304 ia64_do_align (16);
4305
75e09913 4306 unwind.prologue = 0;
33d01f33 4307 unwind.prologue_count = 0;
75e09913
JB		 4308 unwind.body = 0;
4309 unwind.insn = 0;
e0c9811a
JW		 4310 unwind.list = unwind.tail = unwind.current_entry = NULL;
4311 unwind.personality_routine = 0;
800eeca4
JW		 4312}
4313
4314static void
4315dot_body (dummy)
2434f565 4316 int dummy ATTRIBUTE_UNUSED;
800eeca4 4317{
75e09913
JB		 4318 if (!in_procedure ("body"))
4319 return;
4320 if (!unwind.prologue && !unwind.body && unwind.insn)
4321 as_warn ("Initial .body should precede any instructions");
4322
e0c9811a 4323 unwind.prologue = 0;
30d25259 4324 unwind.prologue_mask = 0;
75e09913 4325 unwind.body = 1;
30d25259 4326
800eeca4 4327 add_unwind_entry (output_body ());
e0c9811a 4328 demand_empty_rest_of_line ();
800eeca4
JW		 4329}
4330
4331static void
4332dot_prologue (dummy)
2434f565 4333 int dummy ATTRIBUTE_UNUSED;
800eeca4 4334{
e0c9811a 4335 unsigned char sep;
2434f565 4336 int mask = 0, grsave = 0;
e0c9811a 4337
75e09913
JB		 4338 if (!in_procedure ("prologue"))
4339 return;
4340 if (unwind.prologue)
4341 {
4342 as_bad (".prologue within prologue");
4343 ignore_rest_of_line ();
4344 return;
4345 }
4346 if (!unwind.body && unwind.insn)
4347 as_warn ("Initial .prologue should precede any instructions");
4348
e0c9811a 4349 if (!is_it_end_of_statement ())
800eeca4
JW		 4350 {
4351 expressionS e1, e2;
800eeca4
JW		 4352 sep = parse_operand (&e1);
4353 if (sep != ',')
4354 as_bad ("No second operand to .prologue");
4355 sep = parse_operand (&e2);
e0c9811a 4356 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4357 demand_empty_rest_of_line ();
800eeca4
JW		 4358
4359 if (e1.X_op == O_constant)
542d6675 4360 {
30d25259
RH		 4361 mask = e1.X_add_number;
4362
800eeca4 4363 if (e2.X_op == O_constant)
30d25259
RH		 4364 grsave = e2.X_add_number;
4365 else if (e2.X_op == O_register
4366 && (grsave = e2.X_add_number - REG_GR) < 128)
4367 ;
800eeca4 4368 else
30d25259
RH		 4369 as_bad ("Second operand not a constant or general register");
4370
4371 add_unwind_entry (output_prologue_gr (mask, grsave));
800eeca4
JW		 4372 }
4373 else
4374 as_bad ("First operand not a constant");
4375 }
4376 else
4377 add_unwind_entry (output_prologue ());
30d25259
RH		 4378
4379 unwind.prologue = 1;
4380 unwind.prologue_mask = mask;
75e09913 4381 unwind.body = 0;
33d01f33 4382 ++unwind.prologue_count;
800eeca4
JW		 4383}
4384
4385static void
4386dot_endp (dummy)
2434f565 4387 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4388{
4389 expressionS e;
2132e3a3 4390 char *ptr;
44f5c83a 4391 int bytes_per_address;
800eeca4
JW		 4392 long where;
4393 segT saved_seg;
4394 subsegT saved_subseg;
970d6792 4395 char *name, *default_name, *p, c;
c538998c 4396 symbolS *sym;
970d6792 4397 int unwind_check = md.unwind_check;
800eeca4 4398
970d6792 4399 md.unwind_check = unwind_check_error;
75e09913
JB		 4400 if (!in_procedure ("endp"))
4401 return;
970d6792 4402 md.unwind_check = unwind_check;
75e09913 4403
91a2ae2a
RH		 4404 if (unwind.saved_text_seg)
4405 {
4406 saved_seg = unwind.saved_text_seg;
4407 saved_subseg = unwind.saved_text_subseg;
4408 unwind.saved_text_seg = NULL;
4409 }
4410 else
4411 {
4412 saved_seg = now_seg;
4413 saved_subseg = now_subseg;
4414 }
4415
800eeca4 4416 insn_group_break (1, 0, 0);
800eeca4 4417
91a2ae2a
RH		 4418 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4419 if (!unwind.info)
2d6ed997 4420 generate_unwind_image (saved_seg);
800eeca4 4421
91a2ae2a
RH		 4422 if (unwind.info || unwind.force_unwind_entry)
4423 {
75e09913
JB		 4424 symbolS *proc_end;
4425
91a2ae2a 4426 subseg_set (md.last_text_seg, 0);
75e09913 4427 proc_end = expr_build_dot ();
5e7474a7 4428
da9f89d4 4429 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4430
557debba
JW		 4431 /* Make sure that section has 4 byte alignment for ILP32 and
4432 8 byte alignment for LP64. */
4433 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4434
557debba
JW		 4435 /* Need space for 3 pointers for procedure start, procedure end,
4436 and unwind info. */
4437 ptr = frag_more (3 * md.pointer_size);
4438 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4439 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4440
40449e9f 4441 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4442 e.X_op = O_pseudo_fixup;
4443 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4444 e.X_add_number = 0;
4445 e.X_add_symbol = unwind.proc_start;
4446 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4447
800eeca4
JW		 4448 e.X_op = O_pseudo_fixup;
4449 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4450 e.X_add_number = 0;
75e09913 4451 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4452 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4453 bytes_per_address, &e);
4454
4455 if (unwind.info)
4456 {
4457 e.X_op = O_pseudo_fixup;
4458 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4459 e.X_add_number = 0;
4460 e.X_add_symbol = unwind.info;
4461 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4462 bytes_per_address, &e);
4463 }
4464 else
4465 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4466 bytes_per_address);
800eeca4 4467
91a2ae2a 4468 }
800eeca4 4469 subseg_set (saved_seg, saved_subseg);
c538998c 4470
970d6792
L		 4471 if (unwind.proc_start)
4472 default_name = (char *) S_GET_NAME (unwind.proc_start);
4473 else
4474 default_name = NULL;
4475
c538998c
JJ		 4476 /* Parse names of main and alternate entry points and set symbol sizes. */
4477 while (1)
4478 {
4479 SKIP_WHITESPACE ();
4480 name = input_line_pointer;
4481 c = get_symbol_end ();
4482 p = input_line_pointer;
75e09913 4483 if (!*name)
970d6792
L		 4484 {
4485 if (md.unwind_check == unwind_check_warning)
4486 {
4487 if (default_name)
4488 {
4489 as_warn ("Empty argument of .endp. Use the default name `%s'",
4490 default_name);
4491 name = default_name;
4492 }
4493 else
4494 as_warn ("Empty argument of .endp");
4495 }
4496 else
4497 as_bad ("Empty argument of .endp");
4498 }
4499 if (*name)
75e09913
JB		 4500 {
4501 sym = symbol_find (name);
970d6792
L		 4502 if (!sym
4503 && md.unwind_check == unwind_check_warning
4504 && default_name
4505 && default_name != name)
4506 {
4507 /* We have a bad name. Try the default one if needed. */
4508 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4509 name, default_name);
4510 name = default_name;
4511 sym = symbol_find (name);
4512 }
75e09913
JB		 4513 if (!sym || !S_IS_DEFINED (sym))
4514 as_bad ("`%s' was not defined within procedure", name);
4515 else if (unwind.proc_start
4516 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4517 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4518 {
4519 fragS *fr = symbol_get_frag (unwind.proc_start);
4520 fragS *frag = symbol_get_frag (sym);
4521
4522 /* Check whether the function label is at or beyond last
4523 .proc directive. */
4524 while (fr && fr != frag)
4525 fr = fr->fr_next;
4526 if (fr)
c538998c 4527 {
75e09913
JB		 4528 if (frag == frag_now && SEG_NORMAL (now_seg))
4529 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4530 else
4531 {
4532 symbol_get_obj (sym)->size =
4533 (expressionS *) xmalloc (sizeof (expressionS));
4534 symbol_get_obj (sym)->size->X_op = O_subtract;
4535 symbol_get_obj (sym)->size->X_add_symbol
4536 = symbol_new (FAKE_LABEL_NAME, now_seg,
4537 frag_now_fix (), frag_now);
4538 symbol_get_obj (sym)->size->X_op_symbol = sym;
4539 symbol_get_obj (sym)->size->X_add_number = 0;
4540 }
c538998c
JJ		 4541 }
4542 }
4543 }
4544 *p = c;
4545 SKIP_WHITESPACE ();
4546 if (*input_line_pointer != ',')
4547 break;
4548 ++input_line_pointer;
4549 }
4550 demand_empty_rest_of_line ();
75e09913 4551 unwind.proc_start = unwind.info = 0;
800eeca4
JW		 4552}
4553
4554static void
4555dot_template (template)
4556 int template;
4557{
4558 CURR_SLOT.user_template = template;
4559}
4560
4561static void
4562dot_regstk (dummy)
2434f565 4563 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4564{
4565 int ins, locs, outs, rots;
4566
4567 if (is_it_end_of_statement ())
4568 ins = locs = outs = rots = 0;
4569 else
4570 {
4571 ins = get_absolute_expression ();
4572 if (*input_line_pointer++ != ',')
4573 goto err;
4574 locs = get_absolute_expression ();
4575 if (*input_line_pointer++ != ',')
4576 goto err;
4577 outs = get_absolute_expression ();
4578 if (*input_line_pointer++ != ',')
4579 goto err;
4580 rots = get_absolute_expression ();
4581 }
4582 set_regstack (ins, locs, outs, rots);
4583 return;
4584
4585 err:
4586 as_bad ("Comma expected");
4587 ignore_rest_of_line ();
4588}
4589
4590static void
4591dot_rot (type)
4592 int type;
4593{
4594 unsigned num_regs, num_alloced = 0;
4595 struct dynreg **drpp, *dr;
4596 int ch, base_reg = 0;
4597 char *name, *start;
4598 size_t len;
4599
4600 switch (type)
4601 {
4602 case DYNREG_GR: base_reg = REG_GR + 32; break;
4603 case DYNREG_FR: base_reg = REG_FR + 32; break;
4604 case DYNREG_PR: base_reg = REG_P + 16; break;
4605 default: break;
4606 }
4607
542d6675 4608 /* First, remove existing names from hash table. */
800eeca4
JW		 4609 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4610 {
4611 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4612 /* FIXME: Free dr->name. */
800eeca4
JW		 4613 dr->num_regs = 0;
4614 }
4615
4616 drpp = &md.dynreg[type];
4617 while (1)
4618 {
4619 start = input_line_pointer;
4620 ch = get_symbol_end ();
20b36a95 4621 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4622 *input_line_pointer = ch;
800eeca4
JW		 4623
4624 SKIP_WHITESPACE ();
4625 if (*input_line_pointer != '[')
4626 {
4627 as_bad ("Expected '['");
4628 goto err;
4629 }
4630 ++input_line_pointer; /* skip '[' */
4631
4632 num_regs = get_absolute_expression ();
4633
4634 if (*input_line_pointer++ != ']')
4635 {
4636 as_bad ("Expected ']'");
4637 goto err;
4638 }
4639 SKIP_WHITESPACE ();
4640
4641 num_alloced += num_regs;
4642 switch (type)
4643 {
4644 case DYNREG_GR:
4645 if (num_alloced > md.rot.num_regs)
4646 {
4647 as_bad ("Used more than the declared %d rotating registers",
4648 md.rot.num_regs);
4649 goto err;
4650 }
4651 break;
4652 case DYNREG_FR:
4653 if (num_alloced > 96)
4654 {
4655 as_bad ("Used more than the available 96 rotating registers");
4656 goto err;
4657 }
4658 break;
4659 case DYNREG_PR:
4660 if (num_alloced > 48)
4661 {
4662 as_bad ("Used more than the available 48 rotating registers");
4663 goto err;
4664 }
4665 break;
4666
4667 default:
4668 break;
4669 }
4670
800eeca4
JW		 4671 if (!*drpp)
4672 {
4673 *drpp = obstack_alloc (&notes, sizeof (*dr));
4674 memset (*drpp, 0, sizeof (*dr));
4675 }
4676
20b36a95
JB		 4677 name = obstack_alloc (&notes, len + 1);
4678 memcpy (name, start, len);
4679 name[len] = '\0';
4680
800eeca4
JW		 4681 dr = *drpp;
4682 dr->name = name;
4683 dr->num_regs = num_regs;
4684 dr->base = base_reg;
4685 drpp = &dr->next;
4686 base_reg += num_regs;
4687
4688 if (hash_insert (md.dynreg_hash, name, dr))
4689 {
4690 as_bad ("Attempt to redefine register set `%s'", name);
20b36a95 4691 obstack_free (&notes, name);
800eeca4
JW		 4692 goto err;
4693 }
4694
4695 if (*input_line_pointer != ',')
4696 break;
4697 ++input_line_pointer; /* skip comma */
4698 SKIP_WHITESPACE ();
4699 }
4700 demand_empty_rest_of_line ();
4701 return;
4702
4703 err:
4704 ignore_rest_of_line ();
4705}
4706
4707static void
4708dot_byteorder (byteorder)
4709 int byteorder;
4710{
10a98291
L		 4711 segment_info_type *seginfo = seg_info (now_seg);
4712
4713 if (byteorder == -1)
4714 {
4715 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4716 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4717 byteorder = seginfo->tc_segment_info_data.endian == 1;
4718 }
4719 else
4720 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4721
4722 if (target_big_endian != byteorder)
4723 {
4724 target_big_endian = byteorder;
4725 if (target_big_endian)
4726 {
4727 ia64_number_to_chars = number_to_chars_bigendian;
4728 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4729 }
4730 else
4731 {
4732 ia64_number_to_chars = number_to_chars_littleendian;
4733 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4734 }
4735 }
800eeca4
JW		 4736}
4737
4738static void
4739dot_psr (dummy)
2434f565 4740 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4741{
4742 char *option;
4743 int ch;
4744
4745 while (1)
4746 {
4747 option = input_line_pointer;
4748 ch = get_symbol_end ();
4749 if (strcmp (option, "lsb") == 0)
4750 md.flags &= ~EF_IA_64_BE;
4751 else if (strcmp (option, "msb") == 0)
4752 md.flags |= EF_IA_64_BE;
4753 else if (strcmp (option, "abi32") == 0)
4754 md.flags &= ~EF_IA_64_ABI64;
4755 else if (strcmp (option, "abi64") == 0)
4756 md.flags |= EF_IA_64_ABI64;
4757 else
4758 as_bad ("Unknown psr option `%s'", option);
4759 *input_line_pointer = ch;
4760
4761 SKIP_WHITESPACE ();
4762 if (*input_line_pointer != ',')
4763 break;
4764
4765 ++input_line_pointer;
4766 SKIP_WHITESPACE ();
4767 }
4768 demand_empty_rest_of_line ();
4769}
4770
800eeca4
JW		 4771static void
4772dot_ln (dummy)
2434f565 4773 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4774{
4775 new_logical_line (0, get_absolute_expression ());
4776 demand_empty_rest_of_line ();
4777}
4778
ef6a2b41
JB		 4779static void
4780cross_section (ref, cons, ua)
4781 int ref;
4782 void (*cons) PARAMS((int));
4783 int ua;
800eeca4 4784{
ef6a2b41
JB		 4785 char *start, *end;
4786 int saved_auto_align;
4787 unsigned int section_count;
800eeca4
JW		 4788
4789 SKIP_WHITESPACE ();
ef6a2b41
JB		 4790 start = input_line_pointer;
4791 if (*start == '"')
4792 {
4793 int len;
4794 char *name;
4795
b3f19c14 4796 name = demand_copy_C_string (&len);
ef6a2b41
JB		 4797 obstack_free(&notes, name);
4798 if (!name)
4799 {
4800 ignore_rest_of_line ();
4801 return;
4802 }
4803 }
b3f19c14 4804 else
800eeca4 4805 {
b3f19c14
JB		 4806 char c = get_symbol_end ();
4807
4808 if (input_line_pointer == start)
4809 {
4810 as_bad ("Missing section name");
4811 ignore_rest_of_line ();
ef6a2b41 4812 return;
b3f19c14 4813 }
b3f19c14 4814 *input_line_pointer = c;
800eeca4 4815 }
ef6a2b41 4816 end = input_line_pointer;
800eeca4
JW		 4817 SKIP_WHITESPACE ();
4818 if (*input_line_pointer != ',')
4819 {
4820 as_bad ("Comma expected after section name");
4821 ignore_rest_of_line ();
ef6a2b41 4822 return;
800eeca4 4823 }
ef6a2b41
JB		 4824 *end = '\0';
4825 end = input_line_pointer + 1; /* skip comma */
4826 input_line_pointer = start;
4827 md.keep_pending_output = 1;
4828 section_count = bfd_count_sections(stdoutput);
4829 obj_elf_section (0);
4830 if (section_count != bfd_count_sections(stdoutput))
4831 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4832 input_line_pointer = end;
4833 saved_auto_align = md.auto_align;
4834 if (ua)
4835 md.auto_align = 0;
4836 (*cons) (ref);
4837 if (ua)
4838 md.auto_align = saved_auto_align;
4839 obj_elf_previous (0);
4840 md.keep_pending_output = 0;
800eeca4
JW		 4841}
4842
4843static void
4844dot_xdata (size)
4845 int size;
4846{
ef6a2b41 4847 cross_section (size, cons, 0);
800eeca4
JW		 4848}
4849
4850/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 4851
800eeca4
JW		 4852static void
4853stmt_float_cons (kind)
4854 int kind;
4855{
165a7f90 4856 size_t alignment;
800eeca4
JW		 4857
4858 switch (kind)
4859 {
165a7f90
L		 4860 case 'd':
4861 alignment = 8;
4862 break;
4863
4864 case 'x':
4865 case 'X':
4866 alignment = 16;
4867 break;
800eeca4
JW		 4868
4869 case 'f':
4870 default:
165a7f90 4871 alignment = 4;
800eeca4
JW		 4872 break;
4873 }
165a7f90 4874 ia64_do_align (alignment);
800eeca4
JW		 4875 float_cons (kind);
4876}
4877
4878static void
4879stmt_cons_ua (size)
4880 int size;
4881{
4882 int saved_auto_align = md.auto_align;
4883
4884 md.auto_align = 0;
4885 cons (size);
4886 md.auto_align = saved_auto_align;
4887}
4888
4889static void
4890dot_xfloat_cons (kind)
4891 int kind;
4892{
ef6a2b41 4893 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 4894}
4895
4896static void
4897dot_xstringer (zero)
4898 int zero;
4899{
ef6a2b41 4900 cross_section (zero, stringer, 0);
800eeca4
JW		 4901}
4902
4903static void
4904dot_xdata_ua (size)
4905 int size;
4906{
ef6a2b41 4907 cross_section (size, cons, 1);
800eeca4
JW		 4908}
4909
4910static void
4911dot_xfloat_cons_ua (kind)
4912 int kind;
4913{
ef6a2b41 4914 cross_section (kind, float_cons, 1);
800eeca4
JW		 4915}
4916
4917/* .reg.val <regname>,value */
542d6675 4918
800eeca4
JW		 4919static void
4920dot_reg_val (dummy)
2434f565 4921 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4922{
4923 expressionS reg;
4924
4925 expression (&reg);
4926 if (reg.X_op != O_register)
4927 {
4928 as_bad (_("Register name expected"));
4929 ignore_rest_of_line ();
4930 }
4931 else if (*input_line_pointer++ != ',')
4932 {
4933 as_bad (_("Comma expected"));
4934 ignore_rest_of_line ();
4935 }
197865e8 4936 else
800eeca4
JW		 4937 {
4938 valueT value = get_absolute_expression ();
4939 int regno = reg.X_add_number;
a66d2bb7 4940 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 4941 as_warn (_("Register value annotation ignored"));
800eeca4 4942 else
542d6675
KH		 4943 {
4944 gr_values[regno - REG_GR].known = 1;
4945 gr_values[regno - REG_GR].value = value;
4946 gr_values[regno - REG_GR].path = md.path;
4947 }
800eeca4
JW		 4948 }
4949 demand_empty_rest_of_line ();
4950}
4951
5e819f9c
JW		 4952/*
4953 .serialize.data
4954 .serialize.instruction
4955 */
4956static void
4957dot_serialize (type)
4958 int type;
4959{
4960 insn_group_break (0, 0, 0);
4961 if (type)
4962 instruction_serialization ();
4963 else
4964 data_serialization ();
4965 insn_group_break (0, 0, 0);
4966 demand_empty_rest_of_line ();
4967}
4968
197865e8 4969/* select dv checking mode
800eeca4
JW		 4970 .auto
4971 .explicit
4972 .default
4973
197865e8 4974 A stop is inserted when changing modes
800eeca4 4975 */
542d6675 4976
800eeca4
JW		 4977static void
4978dot_dv_mode (type)
542d6675 4979 int type;
800eeca4
JW		 4980{
4981 if (md.manual_bundling)
4982 as_warn (_("Directive invalid within a bundle"));
4983
4984 if (type == 'E' || type == 'A')
4985 md.mode_explicitly_set = 0;
4986 else
4987 md.mode_explicitly_set = 1;
4988
4989 md.detect_dv = 1;
4990 switch (type)
4991 {
4992 case 'A':
4993 case 'a':
4994 if (md.explicit_mode)
542d6675 4995 insn_group_break (1, 0, 0);
800eeca4
JW		 4996 md.explicit_mode = 0;
4997 break;
4998 case 'E':
4999 case 'e':
5000 if (!md.explicit_mode)
542d6675 5001 insn_group_break (1, 0, 0);
800eeca4
JW		 5002 md.explicit_mode = 1;
5003 break;
5004 default:
5005 case 'd':
5006 if (md.explicit_mode != md.default_explicit_mode)
542d6675 5007 insn_group_break (1, 0, 0);
800eeca4
JW		 5008 md.explicit_mode = md.default_explicit_mode;
5009 md.mode_explicitly_set = 0;
5010 break;
5011 }
5012}
5013
5014static void
5015print_prmask (mask)
542d6675 5016 valueT mask;
800eeca4
JW		 5017{
5018 int regno;
5019 char *comma = "";
542d6675 5020 for (regno = 0; regno < 64; regno++)
800eeca4 5021 {
542d6675
KH		 5022 if (mask & ((valueT) 1 << regno))
5023 {
5024 fprintf (stderr, "%s p%d", comma, regno);
5025 comma = ",";
5026 }
800eeca4
JW		 5027 }
5028}
5029
5030/*
05ee4b0f
JB		 5031 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5032 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5033 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5034 .pred.safe_across_calls p1 [, p2 [,...]]
5035 */
542d6675 5036
800eeca4
JW		 5037static void
5038dot_pred_rel (type)
542d6675 5039 int type;
800eeca4
JW		 5040{
5041 valueT mask = 0;
5042 int count = 0;
5043 int p1 = -1, p2 = -1;
5044
5045 if (type == 0)
5046 {
05ee4b0f 5047 if (*input_line_pointer == '"')
542d6675
KH		 5048 {
5049 int len;
5050 char *form = demand_copy_C_string (&len);
05ee4b0f 5051
542d6675
KH		 5052 if (strcmp (form, "mutex") == 0)
5053 type = 'm';
5054 else if (strcmp (form, "clear") == 0)
5055 type = 'c';
5056 else if (strcmp (form, "imply") == 0)
5057 type = 'i';
05ee4b0f
JB		 5058 obstack_free (&notes, form);
5059 }
5060 else if (*input_line_pointer == '@')
5061 {
5062 char *form = ++input_line_pointer;
5063 char c = get_symbol_end();
5064
5065 if (strcmp (form, "mutex") == 0)
5066 type = 'm';
5067 else if (strcmp (form, "clear") == 0)
5068 type = 'c';
5069 else if (strcmp (form, "imply") == 0)
5070 type = 'i';
5071 *input_line_pointer = c;
5072 }
5073 else
5074 {
5075 as_bad (_("Missing predicate relation type"));
5076 ignore_rest_of_line ();
5077 return;
5078 }
5079 if (type == 0)
5080 {
5081 as_bad (_("Unrecognized predicate relation type"));
5082 ignore_rest_of_line ();
5083 return;
542d6675 5084 }
800eeca4 5085 if (*input_line_pointer == ',')
542d6675 5086 ++input_line_pointer;
800eeca4
JW		 5087 SKIP_WHITESPACE ();
5088 }
5089
5090 SKIP_WHITESPACE ();
5091 while (1)
5092 {
20b36a95 5093 valueT bits = 1;
800eeca4 5094 int regno;
20b36a95
JB		 5095 expressionS pr, *pr1, *pr2;
5096
5097 expression (&pr);
5098 if (pr.X_op == O_register
5099 && pr.X_add_number >= REG_P
5100 && pr.X_add_number <= REG_P + 63)
5101 {
5102 regno = pr.X_add_number - REG_P;
5103 bits <<= regno;
5104 count++;
5105 if (p1 == -1)
5106 p1 = regno;
5107 else if (p2 == -1)
5108 p2 = regno;
5109 }
5110 else if (type != 'i'
5111 && pr.X_op == O_subtract
5112 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5113 && pr1->X_op == O_register
5114 && pr1->X_add_number >= REG_P
5115 && pr1->X_add_number <= REG_P + 63
5116 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5117 && pr2->X_op == O_register
5118 && pr2->X_add_number >= REG_P
5119 && pr2->X_add_number <= REG_P + 63)
5120 {
5121 /* It's a range. */
5122 int stop;
5123
5124 regno = pr1->X_add_number - REG_P;
5125 stop = pr2->X_add_number - REG_P;
5126 if (regno >= stop)
542d6675
KH		 5127 {
5128 as_bad (_("Bad register range"));
5129 ignore_rest_of_line ();
5130 return;
5131 }
20b36a95
JB		 5132 bits = ((bits << stop) << 1) - (bits << regno);
5133 count += stop - regno + 1;
5134 }
5135 else
5136 {
5137 as_bad (_("Predicate register expected"));
5138 ignore_rest_of_line ();
5139 return;
542d6675 5140 }
20b36a95
JB		 5141 if (mask & bits)
5142 as_warn (_("Duplicate predicate register ignored"));
5143 mask |= bits;
800eeca4 5144 if (*input_line_pointer != ',')
542d6675 5145 break;
800eeca4
JW		 5146 ++input_line_pointer;
5147 SKIP_WHITESPACE ();
5148 }
5149
5150 switch (type)
5151 {
5152 case 'c':
5153 if (count == 0)
542d6675 5154 mask = ~(valueT) 0;
800eeca4 5155 clear_qp_mutex (mask);
197865e8 5156 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5157 break;
5158 case 'i':
5159 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5160 as_bad (_("Predicate source and target required"));
800eeca4 5161 else if (p1 == 0 || p2 == 0)
542d6675 5162 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5163 else
542d6675 5164 add_qp_imply (p1, p2);
800eeca4
JW		 5165 break;
5166 case 'm':
5167 if (count < 2)
542d6675
KH		 5168 {
5169 as_bad (_("At least two PR arguments expected"));
5170 break;
5171 }
800eeca4 5172 else if (mask & 1)
542d6675
KH		 5173 {
5174 as_bad (_("Use of p0 is not valid in this context"));
5175 break;
5176 }
800eeca4
JW		 5177 add_qp_mutex (mask);
5178 break;
5179 case 's':
5180 /* note that we don't override any existing relations */
5181 if (count == 0)
542d6675
KH		 5182 {
5183 as_bad (_("At least one PR argument expected"));
5184 break;
5185 }
800eeca4 5186 if (md.debug_dv)
542d6675
KH		 5187 {
5188 fprintf (stderr, "Safe across calls: ");
5189 print_prmask (mask);
5190 fprintf (stderr, "\n");
5191 }
800eeca4
JW		 5192 qp_safe_across_calls = mask;
5193 break;
5194 }
5195 demand_empty_rest_of_line ();
5196}
5197
5198/* .entry label [, label [, ...]]
5199 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5200 Otherwise, only global labels are considered entry points. */
5201
800eeca4
JW		 5202static void
5203dot_entry (dummy)
2434f565 5204 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5205{
5206 const char *err;
5207 char *name;
5208 int c;
5209 symbolS *symbolP;
5210
5211 do
5212 {
5213 name = input_line_pointer;
5214 c = get_symbol_end ();
5215 symbolP = symbol_find_or_make (name);
5216
5217 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5218 if (err)
542d6675
KH		 5219 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5220 name, err);
800eeca4
JW		 5221
5222 *input_line_pointer = c;
5223 SKIP_WHITESPACE ();
5224 c = *input_line_pointer;
5225 if (c == ',')
5226 {
5227 input_line_pointer++;
5228 SKIP_WHITESPACE ();
5229 if (*input_line_pointer == '\n')
5230 c = '\n';
5231 }
5232 }
5233 while (c == ',');
5234
5235 demand_empty_rest_of_line ();
5236}
5237
197865e8 5238/* .mem.offset offset, base
542d6675
KH		 5239 "base" is used to distinguish between offsets from a different base. */
5240
800eeca4
JW		 5241static void
5242dot_mem_offset (dummy)
2434f565 5243 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5244{
5245 md.mem_offset.hint = 1;
5246 md.mem_offset.offset = get_absolute_expression ();
5247 if (*input_line_pointer != ',')
5248 {
5249 as_bad (_("Comma expected"));
5250 ignore_rest_of_line ();
5251 return;
5252 }
5253 ++input_line_pointer;
5254 md.mem_offset.base = get_absolute_expression ();
5255 demand_empty_rest_of_line ();
5256}
5257
542d6675 5258/* ia64-specific pseudo-ops: */
800eeca4
JW		 5259const pseudo_typeS md_pseudo_table[] =
5260 {
5261 { "radix", dot_radix, 0 },
5262 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5263 { "loc", dot_loc, 0 },
800eeca4
JW		 5264 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5265 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5266 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5267 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5268 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5269 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5270 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5271 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5272 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5273 { "proc", dot_proc, 0 },
5274 { "body", dot_body, 0 },
5275 { "prologue", dot_prologue, 0 },
2434f565 5276 { "endp", dot_endp, 0 },
2434f565
JW		 5277
5278 { "fframe", dot_fframe, 0 },
5279 { "vframe", dot_vframe, 0 },
5280 { "vframesp", dot_vframesp, 0 },
5281 { "vframepsp", dot_vframepsp, 0 },
5282 { "save", dot_save, 0 },
5283 { "restore", dot_restore, 0 },
5284 { "restorereg", dot_restorereg, 0 },
5285 { "restorereg.p", dot_restorereg_p, 0 },
5286 { "handlerdata", dot_handlerdata, 0 },
5287 { "unwentry", dot_unwentry, 0 },
5288 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5289 { "savesp", dot_savemem, 0 },
5290 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5291 { "save.g", dot_saveg, 0 },
5292 { "save.f", dot_savef, 0 },
5293 { "save.b", dot_saveb, 0 },
5294 { "save.gf", dot_savegf, 0 },
5295 { "spill", dot_spill, 0 },
5296 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5297 { "spillsp", dot_spillmem, 0 },
5298 { "spillpsp", dot_spillmem, 1 },
2434f565 5299 { "spillreg.p", dot_spillreg_p, 0 },
e0c9811a
JW		 5300 { "spillsp.p", dot_spillmem_p, 0 },
5301 { "spillpsp.p", dot_spillmem_p, 1 },
2434f565
JW		 5302 { "label_state", dot_label_state, 0 },
5303 { "copy_state", dot_copy_state, 0 },
5304 { "unwabi", dot_unwabi, 0 },
5305 { "personality", dot_personality, 0 },
800eeca4
JW		 5306 { "mii", dot_template, 0x0 },
5307 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5308 { "mlx", dot_template, 0x2 },
5309 { "mmi", dot_template, 0x4 },
5310 { "mfi", dot_template, 0x6 },
5311 { "mmf", dot_template, 0x7 },
5312 { "mib", dot_template, 0x8 },
5313 { "mbb", dot_template, 0x9 },
5314 { "bbb", dot_template, 0xb },
5315 { "mmb", dot_template, 0xc },
5316 { "mfb", dot_template, 0xe },
d9201763 5317 { "align", dot_align, 0 },
800eeca4
JW		 5318 { "regstk", dot_regstk, 0 },
5319 { "rotr", dot_rot, DYNREG_GR },
5320 { "rotf", dot_rot, DYNREG_FR },
5321 { "rotp", dot_rot, DYNREG_PR },
5322 { "lsb", dot_byteorder, 0 },
5323 { "msb", dot_byteorder, 1 },
5324 { "psr", dot_psr, 0 },
5325 { "alias", dot_alias, 0 },
35f5df7f 5326 { "secalias", dot_alias, 1 },
800eeca4
JW		 5327 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5328
5329 { "xdata1", dot_xdata, 1 },
5330 { "xdata2", dot_xdata, 2 },
5331 { "xdata4", dot_xdata, 4 },
5332 { "xdata8", dot_xdata, 8 },
b3f19c14 5333 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5334 { "xreal4", dot_xfloat_cons, 'f' },
5335 { "xreal8", dot_xfloat_cons, 'd' },
5336 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5337 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5338 { "xstring", dot_xstringer, 0 },
5339 { "xstringz", dot_xstringer, 1 },
5340
542d6675 5341 /* unaligned versions: */
800eeca4
JW		 5342 { "xdata2.ua", dot_xdata_ua, 2 },
5343 { "xdata4.ua", dot_xdata_ua, 4 },
5344 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5345 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5346 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5347 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5348 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5349 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5350
5351 /* annotations/DV checking support */
5352 { "entry", dot_entry, 0 },
2434f565 5353 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5354 { "pred.rel", dot_pred_rel, 0 },
5355 { "pred.rel.clear", dot_pred_rel, 'c' },
5356 { "pred.rel.imply", dot_pred_rel, 'i' },
5357 { "pred.rel.mutex", dot_pred_rel, 'm' },
5358 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5359 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5360 { "serialize.data", dot_serialize, 0 },
5361 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5362 { "auto", dot_dv_mode, 'a' },
5363 { "explicit", dot_dv_mode, 'e' },
5364 { "default", dot_dv_mode, 'd' },
5365
87885043
JW		 5366 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5367 IA-64 aligns data allocation pseudo-ops by default, so we have to
5368 tell it that these ones are supposed to be unaligned. Long term,
5369 should rewrite so that only IA-64 specific data allocation pseudo-ops
5370 are aligned by default. */
5371 {"2byte", stmt_cons_ua, 2},
5372 {"4byte", stmt_cons_ua, 4},
5373 {"8byte", stmt_cons_ua, 8},
5374
800eeca4
JW		 5375 { NULL, 0, 0 }
5376 };
5377
5378static const struct pseudo_opcode
5379 {
5380 const char *name;
5381 void (*handler) (int);
5382 int arg;
5383 }
5384pseudo_opcode[] =
5385 {
5386 /* these are more like pseudo-ops, but don't start with a dot */
5387 { "data1", cons, 1 },
5388 { "data2", cons, 2 },
5389 { "data4", cons, 4 },
5390 { "data8", cons, 8 },
3969b680 5391 { "data16", cons, 16 },
800eeca4
JW		 5392 { "real4", stmt_float_cons, 'f' },
5393 { "real8", stmt_float_cons, 'd' },
5394 { "real10", stmt_float_cons, 'x' },
165a7f90 5395 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5396 { "string", stringer, 0 },
5397 { "stringz", stringer, 1 },
5398
542d6675 5399 /* unaligned versions: */
800eeca4
JW		 5400 { "data2.ua", stmt_cons_ua, 2 },
5401 { "data4.ua", stmt_cons_ua, 4 },
5402 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5403 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5404 { "real4.ua", float_cons, 'f' },
5405 { "real8.ua", float_cons, 'd' },
5406 { "real10.ua", float_cons, 'x' },
165a7f90 5407 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5408 };
5409
5410/* Declare a register by creating a symbol for it and entering it in
5411 the symbol table. */
542d6675
KH		 5412
5413static symbolS *
800eeca4
JW		 5414declare_register (name, regnum)
5415 const char *name;
5416 int regnum;
5417{
5418 const char *err;
5419 symbolS *sym;
5420
5421 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5422
5423 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5424 if (err)
5425 as_fatal ("Inserting \"%s\" into register table failed: %s",
5426 name, err);
5427
5428 return sym;
5429}
5430
5431static void
5432declare_register_set (prefix, num_regs, base_regnum)
5433 const char *prefix;
5434 int num_regs;
5435 int base_regnum;
5436{
5437 char name[8];
5438 int i;
5439
5440 for (i = 0; i < num_regs; ++i)
5441 {
5442 sprintf (name, "%s%u", prefix, i);
5443 declare_register (name, base_regnum + i);
5444 }
5445}
5446
5447static unsigned int
5448operand_width (opnd)
5449 enum ia64_opnd opnd;
5450{
5451 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5452 unsigned int bits = 0;
5453 int i;
5454
5455 bits = 0;
5456 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5457 bits += odesc->field[i].bits;
5458
5459 return bits;
5460}
5461
87f8eb97 5462static enum operand_match_result
800eeca4
JW		 5463operand_match (idesc, index, e)
5464 const struct ia64_opcode *idesc;
5465 int index;
5466 expressionS *e;
5467{
5468 enum ia64_opnd opnd = idesc->operands[index];
5469 int bits, relocatable = 0;
5470 struct insn_fix *fix;
5471 bfd_signed_vma val;
5472
5473 switch (opnd)
5474 {
542d6675 5475 /* constants: */
800eeca4
JW		 5476
5477 case IA64_OPND_AR_CCV:
5478 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5479 return OPERAND_MATCH;
800eeca4
JW		 5480 break;
5481
c10d9d8f
JW		 5482 case IA64_OPND_AR_CSD:
5483 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5484 return OPERAND_MATCH;
5485 break;
5486
800eeca4
JW		 5487 case IA64_OPND_AR_PFS:
5488 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5489 return OPERAND_MATCH;
800eeca4
JW		 5490 break;
5491
5492 case IA64_OPND_GR0:
5493 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5494 return OPERAND_MATCH;
800eeca4
JW		 5495 break;
5496
5497 case IA64_OPND_IP:
5498 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5499 return OPERAND_MATCH;
800eeca4
JW		 5500 break;
5501
5502 case IA64_OPND_PR:
5503 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5504 return OPERAND_MATCH;
800eeca4
JW		 5505 break;
5506
5507 case IA64_OPND_PR_ROT:
5508 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5509 return OPERAND_MATCH;
800eeca4
JW		 5510 break;
5511
5512 case IA64_OPND_PSR:
5513 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5514 return OPERAND_MATCH;
800eeca4
JW		 5515 break;
5516
5517 case IA64_OPND_PSR_L:
5518 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5519 return OPERAND_MATCH;
800eeca4
JW		 5520 break;
5521
5522 case IA64_OPND_PSR_UM:
5523 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5524 return OPERAND_MATCH;
800eeca4
JW		 5525 break;
5526
5527 case IA64_OPND_C1:
87f8eb97
JW		 5528 if (e->X_op == O_constant)
5529 {
5530 if (e->X_add_number == 1)
5531 return OPERAND_MATCH;
5532 else
5533 return OPERAND_OUT_OF_RANGE;
5534 }
800eeca4
JW		 5535 break;
5536
5537 case IA64_OPND_C8:
87f8eb97
JW		 5538 if (e->X_op == O_constant)
5539 {
5540 if (e->X_add_number == 8)
5541 return OPERAND_MATCH;
5542 else
5543 return OPERAND_OUT_OF_RANGE;
5544 }
800eeca4
JW		 5545 break;
5546
5547 case IA64_OPND_C16:
87f8eb97
JW		 5548 if (e->X_op == O_constant)
5549 {
5550 if (e->X_add_number == 16)
5551 return OPERAND_MATCH;
5552 else
5553 return OPERAND_OUT_OF_RANGE;
5554 }
800eeca4
JW		 5555 break;
5556
542d6675 5557 /* register operands: */
800eeca4
JW		 5558
5559 case IA64_OPND_AR3:
5560 if (e->X_op == O_register && e->X_add_number >= REG_AR
5561 && e->X_add_number < REG_AR + 128)
87f8eb97 5562 return OPERAND_MATCH;
800eeca4
JW		 5563 break;
5564
5565 case IA64_OPND_B1:
5566 case IA64_OPND_B2:
5567 if (e->X_op == O_register && e->X_add_number >= REG_BR
5568 && e->X_add_number < REG_BR + 8)
87f8eb97 5569 return OPERAND_MATCH;
800eeca4
JW		 5570 break;
5571
5572 case IA64_OPND_CR3:
5573 if (e->X_op == O_register && e->X_add_number >= REG_CR
5574 && e->X_add_number < REG_CR + 128)
87f8eb97 5575 return OPERAND_MATCH;
800eeca4
JW		 5576 break;
5577
5578 case IA64_OPND_F1:
5579 case IA64_OPND_F2:
5580 case IA64_OPND_F3:
5581 case IA64_OPND_F4:
5582 if (e->X_op == O_register && e->X_add_number >= REG_FR
5583 && e->X_add_number < REG_FR + 128)
87f8eb97 5584 return OPERAND_MATCH;
800eeca4
JW		 5585 break;
5586
5587 case IA64_OPND_P1:
5588 case IA64_OPND_P2:
5589 if (e->X_op == O_register && e->X_add_number >= REG_P
5590 && e->X_add_number < REG_P + 64)
87f8eb97 5591 return OPERAND_MATCH;
800eeca4
JW		 5592 break;
5593
5594 case IA64_OPND_R1:
5595 case IA64_OPND_R2:
5596 case IA64_OPND_R3:
5597 if (e->X_op == O_register && e->X_add_number >= REG_GR
5598 && e->X_add_number < REG_GR + 128)
87f8eb97 5599 return OPERAND_MATCH;
800eeca4
JW		 5600 break;
5601
5602 case IA64_OPND_R3_2:
87f8eb97 5603 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5604 {
87f8eb97
JW		 5605 if (e->X_add_number < REG_GR + 4)
5606 return OPERAND_MATCH;
5607 else if (e->X_add_number < REG_GR + 128)
5608 return OPERAND_OUT_OF_RANGE;
5609 }
800eeca4
JW		 5610 break;
5611
542d6675 5612 /* indirect operands: */
800eeca4
JW		 5613 case IA64_OPND_CPUID_R3:
5614 case IA64_OPND_DBR_R3:
5615 case IA64_OPND_DTR_R3:
5616 case IA64_OPND_ITR_R3:
5617 case IA64_OPND_IBR_R3:
5618 case IA64_OPND_MSR_R3:
5619 case IA64_OPND_PKR_R3:
5620 case IA64_OPND_PMC_R3:
5621 case IA64_OPND_PMD_R3:
5622 case IA64_OPND_RR_R3:
5623 if (e->X_op == O_index && e->X_op_symbol
5624 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5625 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5626 return OPERAND_MATCH;
800eeca4
JW		 5627 break;
5628
5629 case IA64_OPND_MR3:
5630 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5631 return OPERAND_MATCH;
800eeca4
JW		 5632 break;
5633
542d6675 5634 /* immediate operands: */
800eeca4
JW		 5635 case IA64_OPND_CNT2a:
5636 case IA64_OPND_LEN4:
5637 case IA64_OPND_LEN6:
5638 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5639 if (e->X_op == O_constant)
5640 {
5641 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5642 return OPERAND_MATCH;
5643 else
5644 return OPERAND_OUT_OF_RANGE;
5645 }
800eeca4
JW		 5646 break;
5647
5648 case IA64_OPND_CNT2b:
87f8eb97
JW		 5649 if (e->X_op == O_constant)
5650 {
5651 if ((bfd_vma) (e->X_add_number - 1) < 3)
5652 return OPERAND_MATCH;
5653 else
5654 return OPERAND_OUT_OF_RANGE;
5655 }
800eeca4
JW		 5656 break;
5657
5658 case IA64_OPND_CNT2c:
5659 val = e->X_add_number;
87f8eb97
JW		 5660 if (e->X_op == O_constant)
5661 {
5662 if ((val == 0 || val == 7 || val == 15 || val == 16))
5663 return OPERAND_MATCH;
5664 else
5665 return OPERAND_OUT_OF_RANGE;
5666 }
800eeca4
JW		 5667 break;
5668
5669 case IA64_OPND_SOR:
5670 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5671 if (e->X_op == O_constant && e->X_add_number & 0x7)
5672 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5673 case IA64_OPND_SOF:
5674 case IA64_OPND_SOL:
87f8eb97
JW		 5675 if (e->X_op == O_constant)
5676 {
5677 if ((bfd_vma) e->X_add_number <= 96)
5678 return OPERAND_MATCH;
5679 else
5680 return OPERAND_OUT_OF_RANGE;
5681 }
800eeca4
JW		 5682 break;
5683
5684 case IA64_OPND_IMMU62:
5685 if (e->X_op == O_constant)
542d6675 5686 {
800eeca4 5687 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5688 return OPERAND_MATCH;
5689 else
5690 return OPERAND_OUT_OF_RANGE;
542d6675 5691 }
197865e8 5692 else
542d6675
KH		 5693 {
5694 /* FIXME -- need 62-bit relocation type */
5695 as_bad (_("62-bit relocation not yet implemented"));
5696 }
800eeca4
JW		 5697 break;
5698
5699 case IA64_OPND_IMMU64:
5700 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5701 || e->X_op == O_subtract)
5702 {
5703 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5704 fix->code = BFD_RELOC_IA64_IMM64;
5705 if (e->X_op != O_subtract)
5706 {
5707 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5708 if (e->X_op == O_pseudo_fixup)
5709 e->X_op = O_symbol;
5710 }
5711
5712 fix->opnd = idesc->operands[index];
5713 fix->expr = *e;
5714 fix->is_pcrel = 0;
5715 ++CURR_SLOT.num_fixups;
87f8eb97 5716 return OPERAND_MATCH;
800eeca4
JW		 5717 }
5718 else if (e->X_op == O_constant)
87f8eb97 5719 return OPERAND_MATCH;
800eeca4
JW		 5720 break;
5721
5722 case IA64_OPND_CCNT5:
5723 case IA64_OPND_CNT5:
5724 case IA64_OPND_CNT6:
5725 case IA64_OPND_CPOS6a:
5726 case IA64_OPND_CPOS6b:
5727 case IA64_OPND_CPOS6c:
5728 case IA64_OPND_IMMU2:
5729 case IA64_OPND_IMMU7a:
5730 case IA64_OPND_IMMU7b:
800eeca4
JW		 5731 case IA64_OPND_IMMU21:
5732 case IA64_OPND_IMMU24:
5733 case IA64_OPND_MBTYPE4:
5734 case IA64_OPND_MHTYPE8:
5735 case IA64_OPND_POS6:
5736 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5737 if (e->X_op == O_constant)
5738 {
5739 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5740 return OPERAND_MATCH;
5741 else
5742 return OPERAND_OUT_OF_RANGE;
5743 }
800eeca4
JW		 5744 break;
5745
bf3ca999
TW		 5746 case IA64_OPND_IMMU9:
5747 bits = operand_width (idesc->operands[index]);
87f8eb97 5748 if (e->X_op == O_constant)
542d6675 5749 {
87f8eb97
JW		 5750 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5751 {
5752 int lobits = e->X_add_number & 0x3;
5753 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5754 e->X_add_number |= (bfd_vma) 0x3;
5755 return OPERAND_MATCH;
5756 }
5757 else
5758 return OPERAND_OUT_OF_RANGE;
542d6675 5759 }
bf3ca999
TW		 5760 break;
5761
800eeca4
JW		 5762 case IA64_OPND_IMM44:
5763 /* least 16 bits must be zero */
5764 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5765 /* XXX technically, this is wrong: we should not be issuing warning
5766 messages until we're sure this instruction pattern is going to
5767 be used! */
542d6675 5768 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5769
87f8eb97 5770 if (e->X_op == O_constant)
542d6675 5771 {
87f8eb97
JW		 5772 if (((e->X_add_number >= 0
5773 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5774 || (e->X_add_number < 0
5775 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5776 {
87f8eb97
JW		 5777 /* sign-extend */
5778 if (e->X_add_number >= 0
5779 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5780 {
5781 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5782 }
5783 return OPERAND_MATCH;
542d6675 5784 }
87f8eb97
JW		 5785 else
5786 return OPERAND_OUT_OF_RANGE;
542d6675 5787 }
800eeca4
JW		 5788 break;
5789
5790 case IA64_OPND_IMM17:
5791 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5792 if (e->X_op == O_constant)
542d6675 5793 {
87f8eb97
JW		 5794 if (((e->X_add_number >= 0
5795 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5796 || (e->X_add_number < 0
5797 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5798 {
87f8eb97
JW		 5799 /* sign-extend */
5800 if (e->X_add_number >= 0
5801 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5802 {
5803 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5804 }
5805 return OPERAND_MATCH;
542d6675 5806 }
87f8eb97
JW		 5807 else
5808 return OPERAND_OUT_OF_RANGE;
542d6675 5809 }
800eeca4
JW		 5810 break;
5811
5812 case IA64_OPND_IMM14:
5813 case IA64_OPND_IMM22:
5814 relocatable = 1;
5815 case IA64_OPND_IMM1:
5816 case IA64_OPND_IMM8:
5817 case IA64_OPND_IMM8U4:
5818 case IA64_OPND_IMM8M1:
5819 case IA64_OPND_IMM8M1U4:
5820 case IA64_OPND_IMM8M1U8:
5821 case IA64_OPND_IMM9a:
5822 case IA64_OPND_IMM9b:
5823 bits = operand_width (idesc->operands[index]);
5824 if (relocatable && (e->X_op == O_symbol
5825 || e->X_op == O_subtract
5826 || e->X_op == O_pseudo_fixup))
5827 {
5828 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5829
5830 if (idesc->operands[index] == IA64_OPND_IMM14)
5831 fix->code = BFD_RELOC_IA64_IMM14;
5832 else
5833 fix->code = BFD_RELOC_IA64_IMM22;
5834
5835 if (e->X_op != O_subtract)
5836 {
5837 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5838 if (e->X_op == O_pseudo_fixup)
5839 e->X_op = O_symbol;
5840 }
5841
5842 fix->opnd = idesc->operands[index];
5843 fix->expr = *e;
5844 fix->is_pcrel = 0;
5845 ++CURR_SLOT.num_fixups;
87f8eb97 5846 return OPERAND_MATCH;
800eeca4
JW		 5847 }
5848 else if (e->X_op != O_constant
5849 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 5850 return OPERAND_MISMATCH;
800eeca4
JW		 5851
5852 if (opnd == IA64_OPND_IMM8M1U4)
5853 {
5854 /* Zero is not valid for unsigned compares that take an adjusted
5855 constant immediate range. */
5856 if (e->X_add_number == 0)
87f8eb97 5857 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5858
5859 /* Sign-extend 32-bit unsigned numbers, so that the following range
5860 checks will work. */
5861 val = e->X_add_number;
197865e8
KH		 5862 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5863 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5864 val = ((val << 32) >> 32);
5865
5866 /* Check for 0x100000000. This is valid because
5867 0x100000000-1 is the same as ((uint32_t) -1). */
5868 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 5869 return OPERAND_MATCH;
800eeca4
JW		 5870
5871 val = val - 1;
5872 }
5873 else if (opnd == IA64_OPND_IMM8M1U8)
5874 {
5875 /* Zero is not valid for unsigned compares that take an adjusted
5876 constant immediate range. */
5877 if (e->X_add_number == 0)
87f8eb97 5878 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5879
5880 /* Check for 0x10000000000000000. */
5881 if (e->X_op == O_big)
5882 {
5883 if (generic_bignum[0] == 0
5884 && generic_bignum[1] == 0
5885 && generic_bignum[2] == 0
5886 && generic_bignum[3] == 0
5887 && generic_bignum[4] == 1)
87f8eb97 5888 return OPERAND_MATCH;
800eeca4 5889 else
87f8eb97 5890 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5891 }
5892 else
5893 val = e->X_add_number - 1;
5894 }
5895 else if (opnd == IA64_OPND_IMM8M1)
5896 val = e->X_add_number - 1;
5897 else if (opnd == IA64_OPND_IMM8U4)
5898 {
5899 /* Sign-extend 32-bit unsigned numbers, so that the following range
5900 checks will work. */
5901 val = e->X_add_number;
197865e8
KH		 5902 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5903 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5904 val = ((val << 32) >> 32);
5905 }
5906 else
5907 val = e->X_add_number;
5908
2434f565
JW		 5909 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5910 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 5911 return OPERAND_MATCH;
5912 else
5913 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5914
5915 case IA64_OPND_INC3:
5916 /* +/- 1, 4, 8, 16 */
5917 val = e->X_add_number;
5918 if (val < 0)
5919 val = -val;
87f8eb97
JW		 5920 if (e->X_op == O_constant)
5921 {
5922 if ((val == 1 || val == 4 || val == 8 || val == 16))
5923 return OPERAND_MATCH;
5924 else
5925 return OPERAND_OUT_OF_RANGE;
5926 }
800eeca4
JW		 5927 break;
5928
5929 case IA64_OPND_TGT25:
5930 case IA64_OPND_TGT25b:
5931 case IA64_OPND_TGT25c:
5932 case IA64_OPND_TGT64:
5933 if (e->X_op == O_symbol)
5934 {
5935 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5936 if (opnd == IA64_OPND_TGT25)
5937 fix->code = BFD_RELOC_IA64_PCREL21F;
5938 else if (opnd == IA64_OPND_TGT25b)
5939 fix->code = BFD_RELOC_IA64_PCREL21M;
5940 else if (opnd == IA64_OPND_TGT25c)
5941 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 5942 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 5943 fix->code = BFD_RELOC_IA64_PCREL60B;
5944 else
5945 abort ();
5946
800eeca4
JW		 5947 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5948 fix->opnd = idesc->operands[index];
5949 fix->expr = *e;
5950 fix->is_pcrel = 1;
5951 ++CURR_SLOT.num_fixups;
87f8eb97 5952 return OPERAND_MATCH;
800eeca4
JW		 5953 }
5954 case IA64_OPND_TAG13:
5955 case IA64_OPND_TAG13b:
5956 switch (e->X_op)
5957 {
5958 case O_constant:
87f8eb97 5959 return OPERAND_MATCH;
800eeca4
JW		 5960
5961 case O_symbol:
5962 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c
JW		 5963 /* There are no external relocs for TAG13/TAG13b fields, so we
5964 create a dummy reloc. This will not live past md_apply_fix3. */
5965 fix->code = BFD_RELOC_UNUSED;
5966 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 5967 fix->opnd = idesc->operands[index];
5968 fix->expr = *e;
5969 fix->is_pcrel = 1;
5970 ++CURR_SLOT.num_fixups;
87f8eb97 5971 return OPERAND_MATCH;
800eeca4
JW		 5972
5973 default:
5974 break;
5975 }
5976 break;
5977
a823923b
RH		 5978 case IA64_OPND_LDXMOV:
5979 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5980 fix->code = BFD_RELOC_IA64_LDXMOV;
5981 fix->opnd = idesc->operands[index];
5982 fix->expr = *e;
5983 fix->is_pcrel = 0;
5984 ++CURR_SLOT.num_fixups;
5985 return OPERAND_MATCH;
5986
800eeca4
JW		 5987 default:
5988 break;
5989 }
87f8eb97 5990 return OPERAND_MISMATCH;
800eeca4
JW		 5991}
5992
5993static int
5994parse_operand (e)
5995 expressionS *e;
5996{
5997 int sep = '\0';
5998
5999 memset (e, 0, sizeof (*e));
6000 e->X_op = O_absent;
6001 SKIP_WHITESPACE ();
6002 if (*input_line_pointer != '}')
6003 expression (e);
6004 sep = *input_line_pointer++;
6005
6006 if (sep == '}')
6007 {
6008 if (!md.manual_bundling)
6009 as_warn ("Found '}' when manual bundling is off");
6010 else
6011 CURR_SLOT.manual_bundling_off = 1;
6012 md.manual_bundling = 0;
6013 sep = '\0';
6014 }
6015 return sep;
6016}
6017
6018/* Returns the next entry in the opcode table that matches the one in
6019 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6020 found, NULL is returned instead. */
800eeca4
JW		 6021
6022static struct ia64_opcode *
6023get_next_opcode (struct ia64_opcode *idesc)
6024{
6025 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6026 ia64_free_opcode (idesc);
6027 return next;
6028}
6029
6030/* Parse the operands for the opcode and find the opcode variant that
6031 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6032
6033static struct ia64_opcode *
800eeca4
JW		 6034parse_operands (idesc)
6035 struct ia64_opcode *idesc;
6036{
6037 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6038 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6039 int reg1, reg2;
6040 char reg_class;
800eeca4 6041 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6042 enum operand_match_result result;
800eeca4
JW		 6043 char mnemonic[129];
6044 char *first_arg = 0, *end, *saved_input_pointer;
6045 unsigned int sof;
6046
6047 assert (strlen (idesc->name) <= 128);
6048
6049 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6050 if (idesc->operands[2] == IA64_OPND_SOF
6051 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6052 {
6053 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6054 can't parse the first operand until we have parsed the
6055 remaining operands of the "alloc" instruction. */
6056 SKIP_WHITESPACE ();
6057 first_arg = input_line_pointer;
6058 end = strchr (input_line_pointer, '=');
6059 if (!end)
6060 {
6061 as_bad ("Expected separator `='");
6062 return 0;
6063 }
6064 input_line_pointer = end + 1;
6065 ++i;
6066 ++num_outputs;
6067 }
6068
d3156ecc 6069 for (; ; ++i)
800eeca4 6070 {
d3156ecc
JB		 6071 if (i < NELEMS (CURR_SLOT.opnd))
6072 {
6073 sep = parse_operand (CURR_SLOT.opnd + i);
6074 if (CURR_SLOT.opnd[i].X_op == O_absent)
6075 break;
6076 }
6077 else
6078 {
6079 expressionS dummy;
6080
6081 sep = parse_operand (&dummy);
6082 if (dummy.X_op == O_absent)
6083 break;
6084 }
800eeca4
JW		 6085
6086 ++num_operands;
6087
6088 if (sep != '=' && sep != ',')
6089 break;
6090
6091 if (sep == '=')
6092 {
6093 if (num_outputs > 0)
6094 as_bad ("Duplicate equal sign (=) in instruction");
6095 else
6096 num_outputs = i + 1;
6097 }
6098 }
6099 if (sep != '\0')
6100 {
6101 as_bad ("Illegal operand separator `%c'", sep);
6102 return 0;
6103 }
197865e8 6104
60b9a617
JB		 6105 if (idesc->operands[2] == IA64_OPND_SOF
6106 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6107 {
6108 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6109 know (strcmp (idesc->name, "alloc") == 0);
60b9a617
JB		 6110 i = (CURR_SLOT.opnd[1].X_op == O_register
6111 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6112 if (num_operands == i + 3 /* first_arg not included in this count! */
6113 && CURR_SLOT.opnd[i].X_op == O_constant
6114 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6115 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6116 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
800eeca4 6117 {
60b9a617
JB		 6118 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6119 CURR_SLOT.opnd[i + 1].X_add_number,
6120 CURR_SLOT.opnd[i + 2].X_add_number,
6121 CURR_SLOT.opnd[i + 3].X_add_number);
800eeca4 6122
542d6675 6123 /* now we can parse the first arg: */
800eeca4
JW		 6124 saved_input_pointer = input_line_pointer;
6125 input_line_pointer = first_arg;
6126 sep = parse_operand (CURR_SLOT.opnd + 0);
6127 if (sep != '=')
6128 --num_outputs; /* force error */
6129 input_line_pointer = saved_input_pointer;
6130
60b9a617
JB		 6131 CURR_SLOT.opnd[i].X_add_number = sof;
6132 CURR_SLOT.opnd[i + 1].X_add_number
6133 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6134 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6135 }
6136 }
6137
d3156ecc 6138 highest_unmatched_operand = -4;
87f8eb97
JW		 6139 curr_out_of_range_pos = -1;
6140 error_pos = 0;
800eeca4
JW		 6141 for (; idesc; idesc = get_next_opcode (idesc))
6142 {
6143 if (num_outputs != idesc->num_outputs)
6144 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6145 if (highest_unmatched_operand < 0)
6146 highest_unmatched_operand |= 1;
6147 if (num_operands > NELEMS (idesc->operands)
6148 || (num_operands < NELEMS (idesc->operands)
6149 && idesc->operands[num_operands])
6150 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6151 continue; /* mismatch in number of arguments */
6152 if (highest_unmatched_operand < 0)
6153 highest_unmatched_operand |= 2;
800eeca4
JW		 6154
6155 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6156
6157 /* Try to match all operands. If we see an out-of-range operand,
6158 then continue trying to match the rest of the operands, since if
6159 the rest match, then this idesc will give the best error message. */
6160
6161 out_of_range_pos = -1;
800eeca4 6162 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6163 {
6164 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6165 if (result != OPERAND_MATCH)
6166 {
6167 if (result != OPERAND_OUT_OF_RANGE)
6168 break;
6169 if (out_of_range_pos < 0)
6170 /* remember position of the first out-of-range operand: */
6171 out_of_range_pos = i;
6172 }
6173 }
800eeca4 6174
87f8eb97
JW		 6175 /* If we did not match all operands, or if at least one operand was
6176 out-of-range, then this idesc does not match. Keep track of which
6177 idesc matched the most operands before failing. If we have two
6178 idescs that failed at the same position, and one had an out-of-range
6179 operand, then prefer the out-of-range operand. Thus if we have
6180 "add r0=0x1000000,r1" we get an error saying the constant is out
6181 of range instead of an error saying that the constant should have been
6182 a register. */
6183
6184 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6185 {
87f8eb97
JW		 6186 if (i > highest_unmatched_operand
6187 || (i == highest_unmatched_operand
6188 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6189 {
6190 highest_unmatched_operand = i;
87f8eb97
JW		 6191 if (out_of_range_pos >= 0)
6192 {
6193 expected_operand = idesc->operands[out_of_range_pos];
6194 error_pos = out_of_range_pos;
6195 }
6196 else
6197 {
6198 expected_operand = idesc->operands[i];
6199 error_pos = i;
6200 }
6201 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6202 }
6203 continue;
6204 }
6205
800eeca4
JW		 6206 break;
6207 }
6208 if (!idesc)
6209 {
6210 if (expected_operand)
6211 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6212 error_pos + 1, mnemonic,
800eeca4 6213 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6214 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6215 as_bad ("Wrong number of output operands");
6216 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6217 as_bad ("Wrong number of input operands");
800eeca4
JW		 6218 else
6219 as_bad ("Operand mismatch");
6220 return 0;
6221 }
4b09e828
JB		 6222
6223 /* Check that the instruction doesn't use
6224 - r0, f0, or f1 as output operands
6225 - the same predicate twice as output operands
6226 - r0 as address of a base update load or store
6227 - the same GR as output and address of a base update load
6228 - two even- or two odd-numbered FRs as output operands of a floating
6229 point parallel load.
6230 At most two (conflicting) output (or output-like) operands can exist,
6231 (floating point parallel loads have three outputs, but the base register,
6232 if updated, cannot conflict with the actual outputs). */
6233 reg2 = reg1 = -1;
6234 for (i = 0; i < num_operands; ++i)
6235 {
6236 int regno = 0;
6237
6238 reg_class = 0;
6239 switch (idesc->operands[i])
6240 {
6241 case IA64_OPND_R1:
6242 case IA64_OPND_R2:
6243 case IA64_OPND_R3:
6244 if (i < num_outputs)
6245 {
6246 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6247 reg_class = 'r';
6248 else if (reg1 < 0)
6249 reg1 = CURR_SLOT.opnd[i].X_add_number;
6250 else if (reg2 < 0)
6251 reg2 = CURR_SLOT.opnd[i].X_add_number;
6252 }
6253 break;
6254 case IA64_OPND_P1:
6255 case IA64_OPND_P2:
6256 if (i < num_outputs)
6257 {
6258 if (reg1 < 0)
6259 reg1 = CURR_SLOT.opnd[i].X_add_number;
6260 else if (reg2 < 0)
6261 reg2 = CURR_SLOT.opnd[i].X_add_number;
6262 }
6263 break;
6264 case IA64_OPND_F1:
6265 case IA64_OPND_F2:
6266 case IA64_OPND_F3:
6267 case IA64_OPND_F4:
6268 if (i < num_outputs)
6269 {
6270 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6271 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6272 {
6273 reg_class = 'f';
6274 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6275 }
6276 else if (reg1 < 0)
6277 reg1 = CURR_SLOT.opnd[i].X_add_number;
6278 else if (reg2 < 0)
6279 reg2 = CURR_SLOT.opnd[i].X_add_number;
6280 }
6281 break;
6282 case IA64_OPND_MR3:
6283 if (idesc->flags & IA64_OPCODE_POSTINC)
6284 {
6285 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6286 reg_class = 'm';
6287 else if (reg1 < 0)
6288 reg1 = CURR_SLOT.opnd[i].X_add_number;
6289 else if (reg2 < 0)
6290 reg2 = CURR_SLOT.opnd[i].X_add_number;
6291 }
6292 break;
6293 default:
6294 break;
6295 }
6296 switch (reg_class)
6297 {
6298 case 0:
6299 break;
6300 default:
6301 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6302 break;
6303 case 'm':
6304 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6305 break;
6306 }
6307 }
6308 if (reg1 == reg2)
6309 {
6310 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6311 {
6312 reg1 -= REG_GR;
6313 reg_class = 'r';
6314 }
6315 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6316 {
6317 reg1 -= REG_P;
6318 reg_class = 'p';
6319 }
6320 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6321 {
6322 reg1 -= REG_FR;
6323 reg_class = 'f';
6324 }
6325 else
6326 reg_class = 0;
6327 if (reg_class)
6328 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6329 }
6330 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6331 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6332 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6333 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6334 && ! ((reg1 ^ reg2) & 1))
6335 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6336 reg1 - REG_FR, reg2 - REG_FR);
6337 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6338 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6339 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6340 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6341 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6342 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6343 return idesc;
6344}
6345
6346static void
6347build_insn (slot, insnp)
6348 struct slot *slot;
6349 bfd_vma *insnp;
6350{
6351 const struct ia64_operand *odesc, *o2desc;
6352 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6353 bfd_vma insn;
6354 bfd_signed_vma val;
800eeca4
JW		 6355 const char *err;
6356 int i;
6357
6358 insn = idesc->opcode | slot->qp_regno;
6359
6360 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6361 {
c67e42c9
RH		 6362 if (slot->opnd[i].X_op == O_register
6363 || slot->opnd[i].X_op == O_constant
6364 || slot->opnd[i].X_op == O_index)
6365 val = slot->opnd[i].X_add_number;
6366 else if (slot->opnd[i].X_op == O_big)
800eeca4 6367 {
c67e42c9
RH		 6368 /* This must be the value 0x10000000000000000. */
6369 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6370 val = 0;
6371 }
6372 else
6373 val = 0;
6374
6375 switch (idesc->operands[i])
6376 {
6377 case IA64_OPND_IMMU64:
800eeca4
JW		 6378 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6379 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6380 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6381 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6382 continue;
6383
6384 case IA64_OPND_IMMU62:
542d6675
KH		 6385 val &= 0x3fffffffffffffffULL;
6386 if (val != slot->opnd[i].X_add_number)
6387 as_warn (_("Value truncated to 62 bits"));
6388 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6389 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6390 continue;
800eeca4 6391
c67e42c9
RH		 6392 case IA64_OPND_TGT64:
6393 val >>= 4;
6394 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6395 insn |= ((((val >> 59) & 0x1) << 36)
6396 | (((val >> 0) & 0xfffff) << 13));
6397 continue;
800eeca4 6398
c67e42c9
RH		 6399 case IA64_OPND_AR3:
6400 val -= REG_AR;
6401 break;
6402
6403 case IA64_OPND_B1:
6404 case IA64_OPND_B2:
6405 val -= REG_BR;
6406 break;
6407
6408 case IA64_OPND_CR3:
6409 val -= REG_CR;
6410 break;
6411
6412 case IA64_OPND_F1:
6413 case IA64_OPND_F2:
6414 case IA64_OPND_F3:
6415 case IA64_OPND_F4:
6416 val -= REG_FR;
6417 break;
6418
6419 case IA64_OPND_P1:
6420 case IA64_OPND_P2:
6421 val -= REG_P;
6422 break;
6423
6424 case IA64_OPND_R1:
6425 case IA64_OPND_R2:
6426 case IA64_OPND_R3:
6427 case IA64_OPND_R3_2:
6428 case IA64_OPND_CPUID_R3:
6429 case IA64_OPND_DBR_R3:
6430 case IA64_OPND_DTR_R3:
6431 case IA64_OPND_ITR_R3:
6432 case IA64_OPND_IBR_R3:
6433 case IA64_OPND_MR3:
6434 case IA64_OPND_MSR_R3:
6435 case IA64_OPND_PKR_R3:
6436 case IA64_OPND_PMC_R3:
6437 case IA64_OPND_PMD_R3:
197865e8 6438 case IA64_OPND_RR_R3:
c67e42c9
RH		 6439 val -= REG_GR;
6440 break;
6441
6442 default:
6443 break;
6444 }
6445
6446 odesc = elf64_ia64_operands + idesc->operands[i];
6447 err = (*odesc->insert) (odesc, val, &insn);
6448 if (err)
6449 as_bad_where (slot->src_file, slot->src_line,
6450 "Bad operand value: %s", err);
6451 if (idesc->flags & IA64_OPCODE_PSEUDO)
6452 {
6453 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6454 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6455 {
6456 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6457 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6458 }
c67e42c9
RH		 6459 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6460 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6461 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6462 {
c67e42c9
RH		 6463 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6464 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6465 }
6466 }
6467 }
6468 *insnp = insn;
6469}
6470
6471static void
6472emit_one_bundle ()
6473{
f4660e2c 6474 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6475 enum ia64_unit required_unit, insn_unit = 0;
6476 enum ia64_insn_type type[3], insn_type;
6477 unsigned int template, orig_template;
542d6675 6478 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6479 struct ia64_opcode *idesc;
6480 int end_of_insn_group = 0, user_template = -1;
9b505842 6481 int n, i, j, first, curr, last_slot;
d6e78c11 6482 unw_rec_list *ptr, *last_ptr, *end_ptr;
800eeca4
JW		 6483 bfd_vma t0 = 0, t1 = 0;
6484 struct label_fix *lfix;
6485 struct insn_fix *ifix;
6486 char mnemonic[16];
6487 fixS *fix;
6488 char *f;
5a9ff93d 6489 int addr_mod;
800eeca4
JW		 6490
6491 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6492 know (first >= 0 & first < NUM_SLOTS);
6493 n = MIN (3, md.num_slots_in_use);
6494
6495 /* Determine template: user user_template if specified, best match
542d6675 6496 otherwise: */
800eeca4
JW		 6497
6498 if (md.slot[first].user_template >= 0)
6499 user_template = template = md.slot[first].user_template;
6500 else
6501 {
032efc85 6502 /* Auto select appropriate template. */
800eeca4
JW		 6503 memset (type, 0, sizeof (type));
6504 curr = first;
6505 for (i = 0; i < n; ++i)
6506 {
032efc85
RH		 6507 if (md.slot[curr].label_fixups && i != 0)
6508 break;
800eeca4
JW		 6509 type[i] = md.slot[curr].idesc->type;
6510 curr = (curr + 1) % NUM_SLOTS;
6511 }
6512 template = best_template[type[0]][type[1]][type[2]];
6513 }
6514
542d6675 6515 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6516 for (i = 0; i < 3; ++i)
6517 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6518
6519 f = frag_more (16);
6520
5a9ff93d
JW		 6521 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6522 from the start of the frag. */
6523 addr_mod = frag_now_fix () & 15;
6524 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6525 as_bad (_("instruction address is not a multiple of 16"));
6526 frag_now->insn_addr = addr_mod;
6527 frag_now->has_code = 1;
6528
542d6675 6529 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6530 curr = first;
6531 idesc = md.slot[curr].idesc;
6532 end_of_insn_group = 0;
9b505842 6533 last_slot = -1;
800eeca4
JW		 6534 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6535 {
d6e78c11
JW		 6536 /* If we have unwind records, we may need to update some now. */
6537 ptr = md.slot[curr].unwind_record;
6538 if (ptr)
6539 {
6540 /* Find the last prologue/body record in the list for the current
6541 insn, and set the slot number for all records up to that point.
6542 This needs to be done now, because prologue/body records refer to
6543 the current point, not the point after the instruction has been
6544 issued. This matters because there may have been nops emitted
6545 meanwhile. Any non-prologue non-body record followed by a
6546 prologue/body record must also refer to the current point. */
6547 last_ptr = NULL;
6548 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6549 for (; ptr != end_ptr; ptr = ptr->next)
6550 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6551 || ptr->r.type == body)
6552 last_ptr = ptr;
6553 if (last_ptr)
6554 {
6555 /* Make last_ptr point one after the last prologue/body
6556 record. */
6557 last_ptr = last_ptr->next;
6558 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6559 ptr = ptr->next)
6560 {
6561 ptr->slot_number = (unsigned long) f + i;
6562 ptr->slot_frag = frag_now;
6563 }
6564 /* Remove the initialized records, so that we won't accidentally
6565 update them again if we insert a nop and continue. */
6566 md.slot[curr].unwind_record = last_ptr;
6567 }
6568 }
e0c9811a 6569
f4660e2c
JB		 6570 manual_bundling_off = md.slot[curr].manual_bundling_off;
6571 if (md.slot[curr].manual_bundling_on)
800eeca4 6572 {
f4660e2c
JB		 6573 if (curr == first)
6574 manual_bundling = 1;
800eeca4 6575 else
f4660e2c
JB		 6576 break; /* Need to start a new bundle. */
6577 }
6578
744b6414
JW		 6579 /* If this instruction specifies a template, then it must be the first
6580 instruction of a bundle. */
6581 if (curr != first && md.slot[curr].user_template >= 0)
6582 break;
6583
f4660e2c
JB		 6584 if (idesc->flags & IA64_OPCODE_SLOT2)
6585 {
6586 if (manual_bundling && !manual_bundling_off)
6587 {
6588 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6589 "`%s' must be last in bundle", idesc->name);
6590 if (i < 2)
6591 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6592 }
6593 i = 2;
800eeca4
JW		 6594 }
6595 if (idesc->flags & IA64_OPCODE_LAST)
6596 {
2434f565
JW		 6597 int required_slot;
6598 unsigned int required_template;
800eeca4
JW		 6599
6600 /* If we need a stop bit after an M slot, our only choice is
6601 template 5 (M;;MI). If we need a stop bit after a B
6602 slot, our only choice is to place it at the end of the
6603 bundle, because the only available templates are MIB,
6604 MBB, BBB, MMB, and MFB. We don't handle anything other
6605 than M and B slots because these are the only kind of
6606 instructions that can have the IA64_OPCODE_LAST bit set. */
6607 required_template = template;
6608 switch (idesc->type)
6609 {
6610 case IA64_TYPE_M:
6611 required_slot = 0;
6612 required_template = 5;
6613 break;
6614
6615 case IA64_TYPE_B:
6616 required_slot = 2;
6617 break;
6618
6619 default:
6620 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6621 "Internal error: don't know how to force %s to end"
6622 "of instruction group", idesc->name);
6623 required_slot = i;
6624 break;
6625 }
f4660e2c
JB		 6626 if (manual_bundling
6627 && (i > required_slot
6628 || (required_slot == 2 && !manual_bundling_off)
6629 || (user_template >= 0
6630 /* Changing from MMI to M;MI is OK. */
6631 && (template ^ required_template) > 1)))
6632 {
6633 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6634 "`%s' must be last in instruction group",
6635 idesc->name);
6636 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6637 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6638 }
800eeca4
JW		 6639 if (required_slot < i)
6640 /* Can't fit this instruction. */
6641 break;
6642
6643 i = required_slot;
6644 if (required_template != template)
6645 {
6646 /* If we switch the template, we need to reset the NOPs
6647 after slot i. The slot-types of the instructions ahead
6648 of i never change, so we don't need to worry about
6649 changing NOPs in front of this slot. */
6650 for (j = i; j < 3; ++j)
6651 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6652 }
6653 template = required_template;
6654 }
6655 if (curr != first && md.slot[curr].label_fixups)
6656 {
f4660e2c
JB		 6657 if (manual_bundling)
6658 {
6659 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6660 "Label must be first in a bundle");
f4660e2c
JB		 6661 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6662 }
800eeca4
JW		 6663 /* This insn must go into the first slot of a bundle. */
6664 break;
6665 }
6666
800eeca4
JW		 6667 if (end_of_insn_group && md.num_slots_in_use >= 1)
6668 {
6669 /* We need an instruction group boundary in the middle of a
6670 bundle. See if we can switch to an other template with
6671 an appropriate boundary. */
6672
6673 orig_template = template;
6674 if (i == 1 && (user_template == 4
6675 || (user_template < 0
6676 && (ia64_templ_desc[template].exec_unit[0]
6677 == IA64_UNIT_M))))
6678 {
6679 template = 5;
6680 end_of_insn_group = 0;
6681 }
6682 else if (i == 2 && (user_template == 0
6683 || (user_template < 0
6684 && (ia64_templ_desc[template].exec_unit[1]
6685 == IA64_UNIT_I)))
6686 /* This test makes sure we don't switch the template if
6687 the next instruction is one that needs to be first in
6688 an instruction group. Since all those instructions are
6689 in the M group, there is no way such an instruction can
6690 fit in this bundle even if we switch the template. The
6691 reason we have to check for this is that otherwise we
6692 may end up generating "MI;;I M.." which has the deadly
6693 effect that the second M instruction is no longer the
f4660e2c 6694 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6695 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6696 {
6697 template = 1;
6698 end_of_insn_group = 0;
6699 }
f4660e2c
JB		 6700 else if (i == 1
6701 && user_template == 0
6702 && !(idesc->flags & IA64_OPCODE_FIRST))
6703 /* Use the next slot. */
6704 continue;
800eeca4
JW		 6705 else if (curr != first)
6706 /* can't fit this insn */
6707 break;
6708
6709 if (template != orig_template)
6710 /* if we switch the template, we need to reset the NOPs
6711 after slot i. The slot-types of the instructions ahead
6712 of i never change, so we don't need to worry about
6713 changing NOPs in front of this slot. */
6714 for (j = i; j < 3; ++j)
6715 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6716 }
6717 required_unit = ia64_templ_desc[template].exec_unit[i];
6718
c10d9d8f 6719 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6720 if (idesc->type == IA64_TYPE_DYN)
6721 {
97762d08
JB		 6722 enum ia64_opnd opnd1, opnd2;
6723
800eeca4
JW		 6724 if ((strcmp (idesc->name, "nop") == 0)
6725 || (strcmp (idesc->name, "break") == 0))
6726 insn_unit = required_unit;
91d777ee
L		 6727 else if (strcmp (idesc->name, "hint") == 0)
6728 {
6729 insn_unit = required_unit;
6730 if (required_unit == IA64_UNIT_B)
6731 {
6732 switch (md.hint_b)
6733 {
6734 case hint_b_ok:
6735 break;
6736 case hint_b_warning:
6737 as_warn ("hint in B unit may be treated as nop");
6738 break;
6739 case hint_b_error:
6740 /* When manual bundling is off and there is no
6741 user template, we choose a different unit so
6742 that hint won't go into the current slot. We
6743 will fill the current bundle with nops and
6744 try to put hint into the next bundle. */
6745 if (!manual_bundling && user_template < 0)
6746 insn_unit = IA64_UNIT_I;
6747 else
6748 as_bad ("hint in B unit can't be used");
6749 break;
6750 }
6751 }
6752 }
97762d08
JB		 6753 else if (strcmp (idesc->name, "chk.s") == 0
6754 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6755 {
6756 insn_unit = IA64_UNIT_M;
97762d08
JB		 6757 if (required_unit == IA64_UNIT_I
6758 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6759 insn_unit = IA64_UNIT_I;
6760 }
6761 else
6762 as_fatal ("emit_one_bundle: unexpected dynamic op");
6763
09124b3f 6764 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6765 opnd1 = idesc->operands[0];
6766 opnd2 = idesc->operands[1];
3d56ab85 6767 ia64_free_opcode (idesc);
97762d08
JB		 6768 idesc = ia64_find_opcode (mnemonic);
6769 /* moves to/from ARs have collisions */
6770 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6771 {
6772 while (idesc != NULL
6773 && (idesc->operands[0] != opnd1
6774 || idesc->operands[1] != opnd2))
6775 idesc = get_next_opcode (idesc);
6776 }
97762d08 6777 md.slot[curr].idesc = idesc;
800eeca4
JW		 6778 }
6779 else
6780 {
6781 insn_type = idesc->type;
6782 insn_unit = IA64_UNIT_NIL;
6783 switch (insn_type)
6784 {
6785 case IA64_TYPE_A:
6786 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6787 insn_unit = required_unit;
6788 break;
542d6675 6789 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6790 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6791 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6792 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6793 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6794 default: break;
6795 }
6796 }
6797
6798 if (insn_unit != required_unit)
9b505842 6799 continue; /* Try next slot. */
800eeca4 6800
196e8040
JW		 6801 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6802 {
6803 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 6804
196e8040
JW		 6805 md.slot[curr].loc_directive_seen = 0;
6806 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6807 }
800eeca4
JW		 6808
6809 build_insn (md.slot + curr, insn + i);
6810
d6e78c11
JW		 6811 ptr = md.slot[curr].unwind_record;
6812 if (ptr)
6813 {
6814 /* Set slot numbers for all remaining unwind records belonging to the
6815 current insn. There can not be any prologue/body unwind records
6816 here. */
6817 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6818 for (; ptr != end_ptr; ptr = ptr->next)
6819 {
6820 ptr->slot_number = (unsigned long) f + i;
6821 ptr->slot_frag = frag_now;
6822 }
6823 md.slot[curr].unwind_record = NULL;
6824 }
10850f29 6825
800eeca4
JW		 6826 if (required_unit == IA64_UNIT_L)
6827 {
6828 know (i == 1);
6829 /* skip one slot for long/X-unit instructions */
6830 ++i;
6831 }
6832 --md.num_slots_in_use;
9b505842 6833 last_slot = i;
800eeca4 6834
542d6675 6835 /* now is a good time to fix up the labels for this insn: */
800eeca4
JW		 6836 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6837 {
6838 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6839 symbol_set_frag (lfix->sym, frag_now);
6840 }
f1bcba5b
JW		 6841 /* and fix up the tags also. */
6842 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6843 {
6844 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6845 symbol_set_frag (lfix->sym, frag_now);
6846 }
800eeca4
JW		 6847
6848 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6849 {
6850 ifix = md.slot[curr].fixup + j;
5a080f89 6851 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 6852 &ifix->expr, ifix->is_pcrel, ifix->code);
6853 fix->tc_fix_data.opnd = ifix->opnd;
6854 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6855 fix->fx_file = md.slot[curr].src_file;
6856 fix->fx_line = md.slot[curr].src_line;
6857 }
6858
6859 end_of_insn_group = md.slot[curr].end_of_insn_group;
6860
542d6675 6861 /* clear slot: */
800eeca4
JW		 6862 ia64_free_opcode (md.slot[curr].idesc);
6863 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6864 md.slot[curr].user_template = -1;
6865
6866 if (manual_bundling_off)
6867 {
6868 manual_bundling = 0;
6869 break;
6870 }
6871 curr = (curr + 1) % NUM_SLOTS;
6872 idesc = md.slot[curr].idesc;
6873 }
f4660e2c 6874 if (manual_bundling > 0)
800eeca4
JW		 6875 {
6876 if (md.num_slots_in_use > 0)
ac025970 6877 {
9b505842
JB		 6878 if (last_slot >= 2)
6879 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6880 "`%s' does not fit into bundle", idesc->name);
6881 else if (last_slot < 0)
6882 {
6883 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6884 "`%s' does not fit into %s template",
6885 idesc->name, ia64_templ_desc[template].name);
6886 /* Drop first insn so we don't livelock. */
6887 --md.num_slots_in_use;
6888 know (curr == first);
6889 ia64_free_opcode (md.slot[curr].idesc);
6890 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6891 md.slot[curr].user_template = -1;
6892 }
6893 else
6894 {
6895 const char *where;
6896
6897 if (template == 2)
6898 where = "X slot";
6899 else if (last_slot == 0)
6900 where = "slots 2 or 3";
6901 else
6902 where = "slot 3";
6903 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6904 "`%s' can't go in %s of %s template",
6905 idesc->name, where, ia64_templ_desc[template].name);
6906 }
ac025970 6907 }
800eeca4
JW		 6908 else
6909 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6910 "Missing '}' at end of file");
6911 }
6912 know (md.num_slots_in_use < NUM_SLOTS);
6913
6914 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6915 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6916
44f5c83a
JW		 6917 number_to_chars_littleendian (f + 0, t0, 8);
6918 number_to_chars_littleendian (f + 8, t1, 8);
f5a30c2e 6919
73f20958
L		 6920 if (unwind.list)
6921 {
127cab00
L		 6922 unwind.list->next_slot_number = (unsigned long) f + 16;
6923 unwind.list->next_slot_frag = frag_now;
73f20958 6924 }
800eeca4
JW		 6925}
6926
6927int
6928md_parse_option (c, arg)
6929 int c;
6930 char *arg;
6931{
7463c317 6932
800eeca4
JW		 6933 switch (c)
6934 {
c43c2cc5 6935 /* Switches from the Intel assembler. */
44f5c83a 6936 case 'm':
800eeca4
JW		 6937 if (strcmp (arg, "ilp64") == 0
6938 || strcmp (arg, "lp64") == 0
6939 || strcmp (arg, "p64") == 0)
6940 {
6941 md.flags |= EF_IA_64_ABI64;
6942 }
6943 else if (strcmp (arg, "ilp32") == 0)
6944 {
6945 md.flags &= ~EF_IA_64_ABI64;
6946 }
6947 else if (strcmp (arg, "le") == 0)
6948 {
6949 md.flags &= ~EF_IA_64_BE;
549f748d 6950 default_big_endian = 0;
800eeca4
JW		 6951 }
6952 else if (strcmp (arg, "be") == 0)
6953 {
6954 md.flags |= EF_IA_64_BE;
549f748d 6955 default_big_endian = 1;
800eeca4 6956 }
970d6792
L		 6957 else if (strncmp (arg, "unwind-check=", 13) == 0)
6958 {
6959 arg += 13;
6960 if (strcmp (arg, "warning") == 0)
6961 md.unwind_check = unwind_check_warning;
6962 else if (strcmp (arg, "error") == 0)
6963 md.unwind_check = unwind_check_error;
6964 else
6965 return 0;
6966 }
91d777ee
L		 6967 else if (strncmp (arg, "hint.b=", 7) == 0)
6968 {
6969 arg += 7;
6970 if (strcmp (arg, "ok") == 0)
6971 md.hint_b = hint_b_ok;
6972 else if (strcmp (arg, "warning") == 0)
6973 md.hint_b = hint_b_warning;
6974 else if (strcmp (arg, "error") == 0)
6975 md.hint_b = hint_b_error;
6976 else
6977 return 0;
6978 }
8c2fda1d
L		 6979 else if (strncmp (arg, "tune=", 5) == 0)
6980 {
6981 arg += 5;
6982 if (strcmp (arg, "itanium1") == 0)
6983 md.tune = itanium1;
6984 else if (strcmp (arg, "itanium2") == 0)
6985 md.tune = itanium2;
6986 else
6987 return 0;
6988 }
800eeca4
JW		 6989 else
6990 return 0;
6991 break;
6992
6993 case 'N':
6994 if (strcmp (arg, "so") == 0)
6995 {
542d6675 6996 /* Suppress signon message. */
800eeca4
JW		 6997 }
6998 else if (strcmp (arg, "pi") == 0)
6999 {
7000 /* Reject privileged instructions. FIXME */
7001 }
7002 else if (strcmp (arg, "us") == 0)
7003 {
7004 /* Allow union of signed and unsigned range. FIXME */
7005 }
7006 else if (strcmp (arg, "close_fcalls") == 0)
7007 {
7008 /* Do not resolve global function calls. */
7009 }
7010 else
7011 return 0;
7012 break;
7013
7014 case 'C':
7015 /* temp[="prefix"] Insert temporary labels into the object file
7016 symbol table prefixed by "prefix".
7017 Default prefix is ":temp:".
7018 */
7019 break;
7020
7021 case 'a':
800eeca4
JW		 7022 /* indirect=<tgt> Assume unannotated indirect branches behavior
7023 according to <tgt> --
7024 exit: branch out from the current context (default)
7025 labels: all labels in context may be branch targets
7026 */
85b40035
L		 7027 if (strncmp (arg, "indirect=", 9) != 0)
7028 return 0;
800eeca4
JW		 7029 break;
7030
7031 case 'x':
7032 /* -X conflicts with an ignored option, use -x instead */
7033 md.detect_dv = 1;
7034 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7035 {
7036 /* set default mode to explicit */
7037 md.default_explicit_mode = 1;
7038 break;
7039 }
800eeca4 7040 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7041 {
7042 md.default_explicit_mode = 0;
7043 }
f1dab70d
JB		 7044 else if (strcmp (arg, "none") == 0)
7045 {
7046 md.detect_dv = 0;
7047 }
800eeca4 7048 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7049 {
7050 md.debug_dv = 1;
7051 }
800eeca4 7052 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7053 {
7054 md.default_explicit_mode = 1;
7055 md.debug_dv = 1;
7056 }
f1dab70d
JB		 7057 else if (strcmp (arg, "debugn") == 0)
7058 {
7059 md.debug_dv = 1;
7060 md.detect_dv = 0;
7061 }
800eeca4 7062 else
542d6675
KH		 7063 {
7064 as_bad (_("Unrecognized option '-x%s'"), arg);
7065 }
800eeca4
JW		 7066 break;
7067
7068 case 'S':
7069 /* nops Print nops statistics. */
7070 break;
7071
c43c2cc5
JW		 7072 /* GNU specific switches for gcc. */
7073 case OPTION_MCONSTANT_GP:
7074 md.flags |= EF_IA_64_CONS_GP;
7075 break;
7076
7077 case OPTION_MAUTO_PIC:
7078 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7079 break;
7080
800eeca4
JW		 7081 default:
7082 return 0;
7083 }
7084
7085 return 1;
7086}
7087
7088void
7089md_show_usage (stream)
7090 FILE *stream;
7091{
542d6675 7092 fputs (_("\
800eeca4 7093IA-64 options:\n\
6290819d
NC		 7094 --mconstant-gp mark output file as using the constant-GP model\n\
7095 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7096 --mauto-pic mark output file as using the constant-GP model\n\
7097 without function descriptors (sets ELF header flag\n\
7098 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7099 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7100 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
8c2fda1d
L		 7101 -mtune=[itanium1|itanium2]\n\
7102 tune for a specific CPU (default -mtune=itanium2)\n\
970d6792
L		 7103 -munwind-check=[warning|error]\n\
7104 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7105 -mhint.b=[ok|warning|error]\n\
7106 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7107 -x | -xexplicit turn on dependency violation checking\n\
7108 -xauto automagically remove dependency violations (default)\n\
7109 -xnone turn off dependency violation checking\n\
7110 -xdebug debug dependency violation checker\n\
7111 -xdebugn debug dependency violation checker but turn off\n\
7112 dependency violation checking\n\
7113 -xdebugx debug dependency violation checker and turn on\n\
7114 dependency violation checking\n"),
800eeca4
JW		 7115 stream);
7116}
7117
acebd4ce
AS		 7118void
7119ia64_after_parse_args ()
7120{
7121 if (debug_type == DEBUG_STABS)
7122 as_fatal (_("--gstabs is not supported for ia64"));
7123}
7124
44576e1f
RH		 7125/* Return true if TYPE fits in TEMPL at SLOT. */
7126
7127static int
800eeca4
JW		 7128match (int templ, int type, int slot)
7129{
7130 enum ia64_unit unit;
7131 int result;
7132
7133 unit = ia64_templ_desc[templ].exec_unit[slot];
7134 switch (type)
7135 {
7136 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7137 case IA64_TYPE_A:
7138 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7139 break;
7140 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7141 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7142 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7143 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7144 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7145 default: result = 0; break;
7146 }
7147 return result;
7148}
7149
44576e1f
RH		 7150/* Add a bit of extra goodness if a nop of type F or B would fit
7151 in TEMPL at SLOT. */
7152
7153static inline int
7154extra_goodness (int templ, int slot)
7155{
8c2fda1d
L		 7156 switch (md.tune)
7157 {
7158 case itanium1:
7159 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7160 return 2;
7161 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7162 return 1;
7163 else
7164 return 0;
7165 break;
7166 case itanium2:
7167 if (match (templ, IA64_TYPE_M, slot)
7168 || match (templ, IA64_TYPE_I, slot))
7169 /* Favor M- and I-unit NOPs. We definitely want to avoid
7170 F-unit and B-unit may cause split-issue or less-than-optimal
7171 branch-prediction. */
7172 return 2;
7173 else
7174 return 0;
7175 break;
7176 default:
7177 abort ();
7178 return 0;
7179 }
44576e1f
RH		 7180}
7181
800eeca4
JW		 7182/* This function is called once, at assembler startup time. It sets
7183 up all the tables, etc. that the MD part of the assembler will need
7184 that can be determined before arguments are parsed. */
7185void
7186md_begin ()
7187{
44f5c83a 7188 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
800eeca4
JW		 7189 const char *err;
7190 char name[8];
7191
7192 md.auto_align = 1;
7193 md.explicit_mode = md.default_explicit_mode;
7194
7195 bfd_set_section_alignment (stdoutput, text_section, 4);
7196
0234cb7c 7197 /* Make sure function pointers get initialized. */
10a98291 7198 target_big_endian = -1;
549f748d 7199 dot_byteorder (default_big_endian);
10a98291 7200
35f5df7f
L		 7201 alias_hash = hash_new ();
7202 alias_name_hash = hash_new ();
7203 secalias_hash = hash_new ();
7204 secalias_name_hash = hash_new ();
7205
13ae64f3
JJ		 7206 pseudo_func[FUNC_DTP_MODULE].u.sym =
7207 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7208 &zero_address_frag);
7209
7210 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7211 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7212 &zero_address_frag);
7213
800eeca4 7214 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7215 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7216 &zero_address_frag);
800eeca4
JW		 7217
7218 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7219 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7220 &zero_address_frag);
800eeca4
JW		 7221
7222 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7223 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7224 &zero_address_frag);
800eeca4 7225
fa2c7eff
RH		 7226 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7227 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7228 &zero_address_frag);
7229
c67e42c9 7230 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7231 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7232 &zero_address_frag);
c67e42c9 7233
800eeca4 7234 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7235 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7236 &zero_address_frag);
800eeca4
JW		 7237
7238 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7239 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7240 &zero_address_frag);
800eeca4
JW		 7241
7242 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7243 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7244 &zero_address_frag);
800eeca4 7245
13ae64f3
JJ		 7246 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7247 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7248 &zero_address_frag);
7249
800eeca4 7250 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7251 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7252 &zero_address_frag);
800eeca4
JW		 7253
7254 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7255 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7256 &zero_address_frag);
800eeca4 7257
13ae64f3
JJ		 7258 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7259 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7260 &zero_address_frag);
7261
7262 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7263 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7264 &zero_address_frag);
7265
7266 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7267 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7268 &zero_address_frag);
7269
3969b680
RH		 7270 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7271 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7272 &zero_address_frag);
7273
f6fe78d6
JW		 7274 if (md.tune != itanium1)
7275 {
7276 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7277 le_nop[0] = 0x8;
7278 le_nop_stop[0] = 0x9;
7279 }
7280
197865e8 7281 /* Compute the table of best templates. We compute goodness as a
8c2fda1d
L		 7282 base 4 value, in which each match counts for 3. Match-failures
7283 result in NOPs and we use extra_goodness() to pick the execution
7284 units that are best suited for issuing the NOP. */
800eeca4
JW		 7285 for (i = 0; i < IA64_NUM_TYPES; ++i)
7286 for (j = 0; j < IA64_NUM_TYPES; ++j)
7287 for (k = 0; k < IA64_NUM_TYPES; ++k)
7288 {
7289 best = 0;
7290 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7291 {
7292 goodness = 0;
7293 if (match (t, i, 0))
7294 {
7295 if (match (t, j, 1))
7296 {
7297 if (match (t, k, 2))
44576e1f 7298 goodness = 3 + 3 + 3;
800eeca4 7299 else
44576e1f 7300 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7301 }
7302 else if (match (t, j, 2))
44576e1f 7303 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7304 else
44576e1f
RH		 7305 {
7306 goodness = 3;
7307 goodness += extra_goodness (t, 1);
7308 goodness += extra_goodness (t, 2);
7309 }
800eeca4
JW		 7310 }
7311 else if (match (t, i, 1))
7312 {
7313 if (match (t, j, 2))
44576e1f 7314 goodness = 3 + 3;
800eeca4 7315 else
44576e1f 7316 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7317 }
7318 else if (match (t, i, 2))
44576e1f 7319 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7320
7321 if (goodness > best)
7322 {
7323 best = goodness;
7324 best_template[i][j][k] = t;
7325 }
7326 }
7327 }
7328
7329 for (i = 0; i < NUM_SLOTS; ++i)
7330 md.slot[i].user_template = -1;
7331
7332 md.pseudo_hash = hash_new ();
7333 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7334 {
7335 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7336 (void *) (pseudo_opcode + i));
7337 if (err)
7338 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7339 pseudo_opcode[i].name, err);
7340 }
7341
7342 md.reg_hash = hash_new ();
7343 md.dynreg_hash = hash_new ();
7344 md.const_hash = hash_new ();
7345 md.entry_hash = hash_new ();
7346
542d6675 7347 /* general registers: */
800eeca4
JW		 7348
7349 total = 128;
7350 for (i = 0; i < total; ++i)
7351 {
7352 sprintf (name, "r%d", i - REG_GR);
7353 md.regsym[i] = declare_register (name, i);
7354 }
7355
542d6675 7356 /* floating point registers: */
800eeca4
JW		 7357 total += 128;
7358 for (; i < total; ++i)
7359 {
7360 sprintf (name, "f%d", i - REG_FR);
7361 md.regsym[i] = declare_register (name, i);
7362 }
7363
542d6675 7364 /* application registers: */
800eeca4
JW		 7365 total += 128;
7366 ar_base = i;
7367 for (; i < total; ++i)
7368 {
7369 sprintf (name, "ar%d", i - REG_AR);
7370 md.regsym[i] = declare_register (name, i);
7371 }
7372
542d6675 7373 /* control registers: */
800eeca4
JW		 7374 total += 128;
7375 cr_base = i;
7376 for (; i < total; ++i)
7377 {
7378 sprintf (name, "cr%d", i - REG_CR);
7379 md.regsym[i] = declare_register (name, i);
7380 }
7381
542d6675 7382 /* predicate registers: */
800eeca4
JW		 7383 total += 64;
7384 for (; i < total; ++i)
7385 {
7386 sprintf (name, "p%d", i - REG_P);
7387 md.regsym[i] = declare_register (name, i);
7388 }
7389
542d6675 7390 /* branch registers: */
800eeca4
JW		 7391 total += 8;
7392 for (; i < total; ++i)
7393 {
7394 sprintf (name, "b%d", i - REG_BR);
7395 md.regsym[i] = declare_register (name, i);
7396 }
7397
7398 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7399 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7400 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7401 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7402 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7403 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7404 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7405
7406 for (i = 0; i < NELEMS (indirect_reg); ++i)
7407 {
7408 regnum = indirect_reg[i].regnum;
7409 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7410 }
7411
542d6675 7412 /* define synonyms for application registers: */
800eeca4
JW		 7413 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7414 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7415 REG_AR + ar[i - REG_AR].regnum);
7416
542d6675 7417 /* define synonyms for control registers: */
800eeca4
JW		 7418 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7419 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7420 REG_CR + cr[i - REG_CR].regnum);
7421
7422 declare_register ("gp", REG_GR + 1);
7423 declare_register ("sp", REG_GR + 12);
7424 declare_register ("rp", REG_BR + 0);
7425
542d6675 7426 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7427 declare_register ("psp", REG_PSP);
7428
800eeca4
JW		 7429 declare_register_set ("ret", 4, REG_GR + 8);
7430 declare_register_set ("farg", 8, REG_FR + 8);
7431 declare_register_set ("fret", 8, REG_FR + 8);
7432
7433 for (i = 0; i < NELEMS (const_bits); ++i)
7434 {
7435 err = hash_insert (md.const_hash, const_bits[i].name,
7436 (PTR) (const_bits + i));
7437 if (err)
7438 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7439 name, err);
7440 }
7441
44f5c83a
JW		 7442 /* Set the architecture and machine depending on defaults and command line
7443 options. */
7444 if (md.flags & EF_IA_64_ABI64)
7445 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7446 else
7447 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7448
7449 if (! ok)
7450 as_warn (_("Could not set architecture and machine"));
800eeca4 7451
557debba
JW		 7452 /* Set the pointer size and pointer shift size depending on md.flags */
7453
7454 if (md.flags & EF_IA_64_ABI64)
7455 {
7456 md.pointer_size = 8; /* pointers are 8 bytes */
7457 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7458 }
7459 else
7460 {
7461 md.pointer_size = 4; /* pointers are 4 bytes */
7462 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7463 }
7464
800eeca4
JW		 7465 md.mem_offset.hint = 0;
7466 md.path = 0;
7467 md.maxpaths = 0;
7468 md.entry_labels = NULL;
7469}
7470
970d6792
L		 7471/* Set the default options in md. Cannot do this in md_begin because
7472 that is called after md_parse_option which is where we set the
7473 options in md based on command line options. */
44f5c83a
JW		 7474
7475void
7476ia64_init (argc, argv)
2434f565
JW		 7477 int argc ATTRIBUTE_UNUSED;
7478 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7479{
1cd8ff38 7480 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7481 md.detect_dv = 1;
970d6792
L		 7482 /* FIXME: We should change it to unwind_check_error someday. */
7483 md.unwind_check = unwind_check_warning;
91d777ee 7484 md.hint_b = hint_b_error;
8c2fda1d 7485 md.tune = itanium2;
44f5c83a
JW		 7486}
7487
7488/* Return a string for the target object file format. */
7489
7490const char *
7491ia64_target_format ()
7492{
7493 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7494 {
72a76794
JW		 7495 if (md.flags & EF_IA_64_BE)
7496 {
7497 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7498#if defined(TE_AIX50)
7463c317 7499 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7500#elif defined(TE_HPUX)
7501 return "elf64-ia64-hpux-big";
7463c317 7502#else
72a76794 7503 return "elf64-ia64-big";
7463c317 7504#endif
72a76794 7505 else
1cd8ff38 7506#if defined(TE_AIX50)
7463c317 7507 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7508#elif defined(TE_HPUX)
7509 return "elf32-ia64-hpux-big";
7463c317 7510#else
72a76794 7511 return "elf32-ia64-big";
7463c317 7512#endif
72a76794 7513 }
44f5c83a 7514 else
72a76794
JW		 7515 {
7516 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7517#ifdef TE_AIX50
7518 return "elf64-ia64-aix-little";
7519#else
72a76794 7520 return "elf64-ia64-little";
7463c317 7521#endif
72a76794 7522 else
7463c317
TW		 7523#ifdef TE_AIX50
7524 return "elf32-ia64-aix-little";
7525#else
72a76794 7526 return "elf32-ia64-little";
7463c317 7527#endif
72a76794 7528 }
44f5c83a
JW		 7529 }
7530 else
7531 return "unknown-format";
7532}
7533
800eeca4
JW		 7534void
7535ia64_end_of_source ()
7536{
542d6675 7537 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7538 insn_group_break (1, 0, 0);
7539
542d6675 7540 /* emits slots we haven't written yet: */
800eeca4
JW		 7541 ia64_flush_insns ();
7542
7543 bfd_set_private_flags (stdoutput, md.flags);
7544
800eeca4
JW		 7545 md.mem_offset.hint = 0;
7546}
7547
7548void
7549ia64_start_line ()
7550{
f1bcba5b
JW		 7551 if (md.qp.X_op == O_register)
7552 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7553 md.qp.X_op = O_absent;
7554
7555 if (ignore_input ())
7556 return;
7557
7558 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7559 {
7560 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7561 {
7562 static int warned;
7563
7564 if (!warned)
7565 {
7566 warned = 1;
7567 as_warn (_("Explicit stops are ignored in auto mode"));
7568 }
7569 }
800eeca4 7570 else
542d6675 7571 insn_group_break (1, 0, 0);
800eeca4
JW		 7572 }
7573}
7574
f1bcba5b
JW		 7575/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7576 labels. */
7577static int defining_tag = 0;
7578
800eeca4
JW		 7579int
7580ia64_unrecognized_line (ch)
7581 int ch;
7582{
7583 switch (ch)
7584 {
7585 case '(':
7586 expression (&md.qp);
7587 if (*input_line_pointer++ != ')')
7588 {
7589 as_bad ("Expected ')'");
7590 return 0;
7591 }
7592 if (md.qp.X_op != O_register)
7593 {
7594 as_bad ("Qualifying predicate expected");
7595 return 0;
7596 }
7597 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7598 {
7599 as_bad ("Predicate register expected");
7600 return 0;
7601 }
7602 return 1;
7603
7604 case '{':
7605 if (md.manual_bundling)
7606 as_warn ("Found '{' when manual bundling is already turned on");
7607 else
7608 CURR_SLOT.manual_bundling_on = 1;
7609 md.manual_bundling = 1;
7610
542d6675
KH		 7611 /* Bundling is only acceptable in explicit mode
7612 or when in default automatic mode. */
800eeca4 7613 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7614 {
7615 if (!md.mode_explicitly_set
7616 && !md.default_explicit_mode)
7617 dot_dv_mode ('E');
7618 else
7619 as_warn (_("Found '{' after explicit switch to automatic mode"));
7620 }
800eeca4
JW		 7621 return 1;
7622
7623 case '}':
7624 if (!md.manual_bundling)
7625 as_warn ("Found '}' when manual bundling is off");
7626 else
7627 PREV_SLOT.manual_bundling_off = 1;
7628 md.manual_bundling = 0;
7629
7630 /* switch back to automatic mode, if applicable */
197865e8 7631 if (md.detect_dv
542d6675
KH		 7632 && md.explicit_mode
7633 && !md.mode_explicitly_set
7634 && !md.default_explicit_mode)
7635 dot_dv_mode ('A');
800eeca4
JW		 7636
7637 /* Allow '{' to follow on the same line. We also allow ";;", but that
7638 happens automatically because ';' is an end of line marker. */
7639 SKIP_WHITESPACE ();
7640 if (input_line_pointer[0] == '{')
7641 {
7642 input_line_pointer++;
7643 return ia64_unrecognized_line ('{');
7644 }
7645
7646 demand_empty_rest_of_line ();
7647 return 1;
7648
f1bcba5b
JW		 7649 case '[':
7650 {
7651 char *s;
7652 char c;
7653 symbolS *tag;
4d5a53ff 7654 int temp;
f1bcba5b
JW		 7655
7656 if (md.qp.X_op == O_register)
7657 {
7658 as_bad ("Tag must come before qualifying predicate.");
7659 return 0;
7660 }
4d5a53ff
JW		 7661
7662 /* This implements just enough of read_a_source_file in read.c to
7663 recognize labels. */
7664 if (is_name_beginner (*input_line_pointer))
7665 {
7666 s = input_line_pointer;
7667 c = get_symbol_end ();
7668 }
7669 else if (LOCAL_LABELS_FB
3882b010 7670 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7671 {
7672 temp = 0;
3882b010 7673 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7674 temp = (temp * 10) + *input_line_pointer++ - '0';
7675 fb_label_instance_inc (temp);
7676 s = fb_label_name (temp, 0);
7677 c = *input_line_pointer;
7678 }
7679 else
7680 {
7681 s = NULL;
7682 c = '\0';
7683 }
f1bcba5b
JW		 7684 if (c != ':')
7685 {
7686 /* Put ':' back for error messages' sake. */
7687 *input_line_pointer++ = ':';
7688 as_bad ("Expected ':'");
7689 return 0;
7690 }
4d5a53ff 7691
f1bcba5b
JW		 7692 defining_tag = 1;
7693 tag = colon (s);
7694 defining_tag = 0;
7695 /* Put ':' back for error messages' sake. */
7696 *input_line_pointer++ = ':';
7697 if (*input_line_pointer++ != ']')
7698 {
7699 as_bad ("Expected ']'");
7700 return 0;
7701 }
7702 if (! tag)
7703 {
7704 as_bad ("Tag name expected");
7705 return 0;
7706 }
7707 return 1;
7708 }
7709
800eeca4
JW		 7710 default:
7711 break;
7712 }
542d6675
KH		 7713
7714 /* Not a valid line. */
7715 return 0;
800eeca4
JW		 7716}
7717
7718void
7719ia64_frob_label (sym)
7720 struct symbol *sym;
7721{
7722 struct label_fix *fix;
7723
f1bcba5b
JW		 7724 /* Tags need special handling since they are not bundle breaks like
7725 labels. */
7726 if (defining_tag)
7727 {
7728 fix = obstack_alloc (&notes, sizeof (*fix));
7729 fix->sym = sym;
7730 fix->next = CURR_SLOT.tag_fixups;
7731 CURR_SLOT.tag_fixups = fix;
7732
7733 return;
7734 }
7735
800eeca4
JW		 7736 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7737 {
7738 md.last_text_seg = now_seg;
7739 fix = obstack_alloc (&notes, sizeof (*fix));
7740 fix->sym = sym;
7741 fix->next = CURR_SLOT.label_fixups;
7742 CURR_SLOT.label_fixups = fix;
7743
542d6675 7744 /* Keep track of how many code entry points we've seen. */
800eeca4 7745 if (md.path == md.maxpaths)
542d6675
KH		 7746 {
7747 md.maxpaths += 20;
7748 md.entry_labels = (const char **)
7749 xrealloc ((void *) md.entry_labels,
7750 md.maxpaths * sizeof (char *));
7751 }
800eeca4
JW		 7752 md.entry_labels[md.path++] = S_GET_NAME (sym);
7753 }
7754}
7755
936cf02e
JW		 7756#ifdef TE_HPUX
7757/* The HP-UX linker will give unresolved symbol errors for symbols
7758 that are declared but unused. This routine removes declared,
7759 unused symbols from an object. */
7760int
7761ia64_frob_symbol (sym)
7762 struct symbol *sym;
7763{
7764 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7765 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7766 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7767 && ! S_IS_EXTERNAL (sym)))
7768 return 1;
7769 return 0;
7770}
7771#endif
7772
800eeca4
JW		 7773void
7774ia64_flush_pending_output ()
7775{
4d5a53ff
JW		 7776 if (!md.keep_pending_output
7777 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7778 {
7779 /* ??? This causes many unnecessary stop bits to be emitted.
7780 Unfortunately, it isn't clear if it is safe to remove this. */
7781 insn_group_break (1, 0, 0);
7782 ia64_flush_insns ();
7783 }
7784}
7785
7786/* Do ia64-specific expression optimization. All that's done here is
7787 to transform index expressions that are either due to the indexing
7788 of rotating registers or due to the indexing of indirect register
7789 sets. */
7790int
7791ia64_optimize_expr (l, op, r)
7792 expressionS *l;
7793 operatorT op;
7794 expressionS *r;
7795{
7796 unsigned num_regs;
7797
7798 if (op == O_index)
7799 {
7800 if (l->X_op == O_register && r->X_op == O_constant)
7801 {
7802 num_regs = (l->X_add_number >> 16);
7803 if ((unsigned) r->X_add_number >= num_regs)
7804 {
7805 if (!num_regs)
7806 as_bad ("No current frame");
7807 else
7808 as_bad ("Index out of range 0..%u", num_regs - 1);
7809 r->X_add_number = 0;
7810 }
7811 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7812 return 1;
7813 }
7814 else if (l->X_op == O_register && r->X_op == O_register)
7815 {
7816 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7817 || l->X_add_number == IND_MEM)
7818 {
7819 as_bad ("Indirect register set name expected");
7820 l->X_add_number = IND_CPUID;
7821 }
7822 l->X_op = O_index;
7823 l->X_op_symbol = md.regsym[l->X_add_number];
7824 l->X_add_number = r->X_add_number;
7825 return 1;
7826 }
7827 }
7828 return 0;
7829}
7830
7831int
16a48f83 7832ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 7833 char *name;
7834 expressionS *e;
16a48f83 7835 char *nextcharP;
800eeca4
JW		 7836{
7837 struct const_desc *cdesc;
7838 struct dynreg *dr = 0;
16a48f83 7839 unsigned int idx;
800eeca4
JW		 7840 struct symbol *sym;
7841 char *end;
7842
16a48f83
JB		 7843 if (*name == '@')
7844 {
7845 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7846
7847 /* Find what relocation pseudo-function we're dealing with. */
7848 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7849 if (pseudo_func[idx].name
7850 && pseudo_func[idx].name[0] == name[1]
7851 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7852 {
7853 pseudo_type = pseudo_func[idx].type;
7854 break;
7855 }
7856 switch (pseudo_type)
7857 {
7858 case PSEUDO_FUNC_RELOC:
7859 end = input_line_pointer;
7860 if (*nextcharP != '(')
7861 {
7862 as_bad ("Expected '('");
2f6d622e 7863 break;
16a48f83
JB		 7864 }
7865 /* Skip '('. */
7866 ++input_line_pointer;
7867 expression (e);
7868 if (*input_line_pointer != ')')
7869 {
7870 as_bad ("Missing ')'");
7871 goto done;
7872 }
7873 /* Skip ')'. */
7874 ++input_line_pointer;
7875 if (e->X_op != O_symbol)
7876 {
7877 if (e->X_op != O_pseudo_fixup)
7878 {
7879 as_bad ("Not a symbolic expression");
7880 goto done;
7881 }
7882 if (idx != FUNC_LT_RELATIVE)
7883 {
7884 as_bad ("Illegal combination of relocation functions");
7885 goto done;
7886 }
7887 switch (S_GET_VALUE (e->X_op_symbol))
7888 {
7889 case FUNC_FPTR_RELATIVE:
7890 idx = FUNC_LT_FPTR_RELATIVE; break;
7891 case FUNC_DTP_MODULE:
7892 idx = FUNC_LT_DTP_MODULE; break;
7893 case FUNC_DTP_RELATIVE:
7894 idx = FUNC_LT_DTP_RELATIVE; break;
7895 case FUNC_TP_RELATIVE:
7896 idx = FUNC_LT_TP_RELATIVE; break;
7897 default:
7898 as_bad ("Illegal combination of relocation functions");
7899 goto done;
7900 }
7901 }
7902 /* Make sure gas doesn't get rid of local symbols that are used
7903 in relocs. */
7904 e->X_op = O_pseudo_fixup;
7905 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 7906 done:
7907 *nextcharP = *input_line_pointer;
16a48f83
JB		 7908 break;
7909
7910 case PSEUDO_FUNC_CONST:
7911 e->X_op = O_constant;
7912 e->X_add_number = pseudo_func[idx].u.ival;
7913 break;
7914
7915 case PSEUDO_FUNC_REG:
7916 e->X_op = O_register;
7917 e->X_add_number = pseudo_func[idx].u.ival;
7918 break;
7919
7920 default:
7921 return 0;
7922 }
16a48f83
JB		 7923 return 1;
7924 }
7925
542d6675 7926 /* first see if NAME is a known register name: */
800eeca4
JW		 7927 sym = hash_find (md.reg_hash, name);
7928 if (sym)
7929 {
7930 e->X_op = O_register;
7931 e->X_add_number = S_GET_VALUE (sym);
7932 return 1;
7933 }
7934
7935 cdesc = hash_find (md.const_hash, name);
7936 if (cdesc)
7937 {
7938 e->X_op = O_constant;
7939 e->X_add_number = cdesc->value;
7940 return 1;
7941 }
7942
542d6675 7943 /* check for inN, locN, or outN: */
26b810ce 7944 idx = 0;
800eeca4
JW		 7945 switch (name[0])
7946 {
7947 case 'i':
3882b010 7948 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 7949 {
7950 dr = &md.in;
26b810ce 7951 idx = 2;
800eeca4
JW		 7952 }
7953 break;
7954
7955 case 'l':
3882b010 7956 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 7957 {
7958 dr = &md.loc;
26b810ce 7959 idx = 3;
800eeca4
JW		 7960 }
7961 break;
7962
7963 case 'o':
3882b010 7964 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 7965 {
7966 dr = &md.out;
26b810ce 7967 idx = 3;
800eeca4
JW		 7968 }
7969 break;
7970
7971 default:
7972 break;
7973 }
7974
26b810ce
JB		 7975 /* Ignore register numbers with leading zeroes, except zero itself. */
7976 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 7977 {
26b810ce
JB		 7978 unsigned long regnum;
7979
542d6675 7980 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 7981 regnum = strtoul (name + idx, &end, 10);
7982 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 7983 {
26b810ce 7984 if (regnum >= dr->num_regs)
800eeca4
JW		 7985 {
7986 if (!dr->num_regs)
7987 as_bad ("No current frame");
7988 else
542d6675
KH		 7989 as_bad ("Register number out of range 0..%u",
7990 dr->num_regs - 1);
800eeca4
JW		 7991 regnum = 0;
7992 }
7993 e->X_op = O_register;
7994 e->X_add_number = dr->base + regnum;
7995 return 1;
7996 }
7997 }
7998
20b36a95
JB		 7999 end = alloca (strlen (name) + 1);
8000 strcpy (end, name);
8001 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 8002 if ((dr = hash_find (md.dynreg_hash, name)))
8003 {
8004 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 8005 Store the base register number in the low 16 bits of
8006 X_add_number and the size of the register set in the top 16
8007 bits. */
800eeca4
JW		 8008 e->X_op = O_register;
8009 e->X_add_number = dr->base | (dr->num_regs << 16);
8010 return 1;
8011 }
8012 return 0;
8013}
8014
8015/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8016
8017char *
8018ia64_canonicalize_symbol_name (name)
8019 char *name;
8020{
20b36a95
JB		 8021 size_t len = strlen (name), full = len;
8022
8023 while (len > 0 && name[len - 1] == '#')
8024 --len;
8025 if (len <= 0)
8026 {
8027 if (full > 0)
8028 as_bad ("Standalone `#' is illegal");
20b36a95
JB		 8029 }
8030 else if (len < full - 1)
8031 as_warn ("Redundant `#' suffix operators");
8032 name[len] = '\0';
800eeca4
JW		 8033 return name;
8034}
8035
3e37788f
JW		 8036/* Return true if idesc is a conditional branch instruction. This excludes
8037 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8038 because they always read/write resources regardless of the value of the
8039 qualifying predicate. br.ia must always use p0, and hence is always
8040 taken. Thus this function returns true for branches which can fall
8041 through, and which use no resources if they do fall through. */
1deb8127 8042
800eeca4
JW		 8043static int
8044is_conditional_branch (idesc)
542d6675 8045 struct ia64_opcode *idesc;
800eeca4 8046{
1deb8127 8047 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 8048 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8049 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 8050 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8051 && (idesc->name[2] == '\0'
3e37788f
JW		 8052 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8053 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8054 || idesc->name[2] == 'l'
8055 /* br.cond, br.call, br.clr */
8056 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8057 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8058 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8059}
8060
8061/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8062 returns zero. */
8063
800eeca4
JW		 8064static int
8065is_taken_branch (idesc)
542d6675 8066 struct ia64_opcode *idesc;
800eeca4
JW		 8067{
8068 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8069 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8070}
8071
8072/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8073 doubt, returns zero. */
8074
800eeca4
JW		 8075static int
8076is_interruption_or_rfi (idesc)
542d6675 8077 struct ia64_opcode *idesc;
800eeca4
JW		 8078{
8079 if (strcmp (idesc->name, "rfi") == 0)
8080 return 1;
8081 return 0;
8082}
8083
8084/* Returns the index of the given dependency in the opcode's list of chks, or
8085 -1 if there is no dependency. */
542d6675 8086
800eeca4
JW		 8087static int
8088depends_on (depind, idesc)
542d6675
KH		 8089 int depind;
8090 struct ia64_opcode *idesc;
800eeca4
JW		 8091{
8092 int i;
8093 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8094 for (i = 0; i < dep->nchks; i++)
800eeca4 8095 {
542d6675
KH		 8096 if (depind == DEP (dep->chks[i]))
8097 return i;
800eeca4
JW		 8098 }
8099 return -1;
8100}
8101
8102/* Determine a set of specific resources used for a particular resource
8103 class. Returns the number of specific resources identified For those
8104 cases which are not determinable statically, the resource returned is
197865e8 8105 marked nonspecific.
800eeca4
JW		 8106
8107 Meanings of value in 'NOTE':
8108 1) only read/write when the register number is explicitly encoded in the
8109 insn.
8110 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8111 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8112 3) general register value is used to specify an indirect register; not
8113 determinable statically.
8114 4) only read the given resource when bits 7:0 of the indirect index
8115 register value does not match the register number of the resource; not
8116 determinable statically.
8117 5) all rules are implementation specific.
8118 6) only when both the index specified by the reader and the index specified
8119 by the writer have the same value in bits 63:61; not determinable
197865e8 8120 statically.
800eeca4 8121 7) only access the specified resource when the corresponding mask bit is
197865e8 8122 set
800eeca4
JW		 8123 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8124 only read when these insns reference FR2-31
8125 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8126 written when these insns write FR32-127
8127 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8128 instruction
8129 11) The target predicates are written independently of PR[qp], but source
8130 registers are only read if PR[qp] is true. Since the state of PR[qp]
8131 cannot statically be determined, all source registers are marked used.
8132 12) This insn only reads the specified predicate register when that
8133 register is the PR[qp].
8134 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 8135 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8136 14) The RSE resource includes the implementation-specific RSE internal
8137 state resources. At least one (and possibly more) of these resources are
8138 read by each instruction listed in IC:rse-readers. At least one (and
8139 possibly more) of these resources are written by each insn listed in
197865e8 8140 IC:rse-writers.
800eeca4 8141 15+16) Represents reserved instructions, which the assembler does not
197865e8 8142 generate.
800eeca4
JW		 8143
8144 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8145 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8146*/
8147
8148#define MAX_SPECS 256
8149#define DV_CHK 1
8150#define DV_REG 0
8151
8152static int
8153specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8154 const struct ia64_dependency *dep;
8155 struct ia64_opcode *idesc;
8156 int type; /* is this a DV chk or a DV reg? */
8157 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8158 int note; /* resource note for this insn's usage */
8159 int path; /* which execution path to examine */
800eeca4
JW		 8160{
8161 int count = 0;
8162 int i;
8163 int rsrc_write = 0;
8164 struct rsrc tmpl;
197865e8 8165
800eeca4
JW		 8166 if (dep->mode == IA64_DV_WAW
8167 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8168 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8169 rsrc_write = 1;
8170
8171 /* template for any resources we identify */
8172 tmpl.dependency = dep;
8173 tmpl.note = note;
8174 tmpl.insn_srlz = tmpl.data_srlz = 0;
8175 tmpl.qp_regno = CURR_SLOT.qp_regno;
8176 tmpl.link_to_qp_branch = 1;
8177 tmpl.mem_offset.hint = 0;
1f8b1395
AS		 8178 tmpl.mem_offset.offset = 0;
8179 tmpl.mem_offset.base = 0;
800eeca4 8180 tmpl.specific = 1;
a66d2bb7 8181 tmpl.index = -1;
7484b8e6 8182 tmpl.cmp_type = CMP_NONE;
1f8b1395
AS		 8183 tmpl.depind = 0;
8184 tmpl.file = NULL;
8185 tmpl.line = 0;
8186 tmpl.path = 0;
800eeca4
JW		 8187
8188#define UNHANDLED \
8189as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8190dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8191#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8192
8193 /* we don't need to track these */
8194 if (dep->semantics == IA64_DVS_NONE)
8195 return 0;
8196
8197 switch (dep->specifier)
8198 {
8199 case IA64_RS_AR_K:
8200 if (note == 1)
542d6675
KH		 8201 {
8202 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8203 {
8204 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8205 if (regno >= 0 && regno <= 7)
8206 {
8207 specs[count] = tmpl;
8208 specs[count++].index = regno;
8209 }
8210 }
8211 }
800eeca4 8212 else if (note == 0)
542d6675
KH		 8213 {
8214 for (i = 0; i < 8; i++)
8215 {
8216 specs[count] = tmpl;
8217 specs[count++].index = i;
8218 }
8219 }
800eeca4 8220 else
542d6675
KH		 8221 {
8222 UNHANDLED;
8223 }
800eeca4
JW		 8224 break;
8225
8226 case IA64_RS_AR_UNAT:
8227 /* This is a mov =AR or mov AR= instruction. */
8228 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8229 {
8230 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8231 if (regno == AR_UNAT)
8232 {
8233 specs[count++] = tmpl;
8234 }
8235 }
8236 else
8237 {
8238 /* This is a spill/fill, or other instruction that modifies the
8239 unat register. */
8240
8241 /* Unless we can determine the specific bits used, mark the whole
8242 thing; bits 8:3 of the memory address indicate the bit used in
8243 UNAT. The .mem.offset hint may be used to eliminate a small
8244 subset of conflicts. */
8245 specs[count] = tmpl;
8246 if (md.mem_offset.hint)
8247 {
542d6675
KH		 8248 if (md.debug_dv)
8249 fprintf (stderr, " Using hint for spill/fill\n");
8250 /* The index isn't actually used, just set it to something
8251 approximating the bit index. */
800eeca4
JW		 8252 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8253 specs[count].mem_offset.hint = 1;
8254 specs[count].mem_offset.offset = md.mem_offset.offset;
8255 specs[count++].mem_offset.base = md.mem_offset.base;
8256 }
8257 else
8258 {
8259 specs[count++].specific = 0;
8260 }
8261 }
8262 break;
8263
8264 case IA64_RS_AR:
8265 if (note == 1)
542d6675
KH		 8266 {
8267 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8268 {
8269 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8270 if ((regno >= 8 && regno <= 15)
8271 || (regno >= 20 && regno <= 23)
8272 || (regno >= 31 && regno <= 39)
8273 || (regno >= 41 && regno <= 47)
8274 || (regno >= 67 && regno <= 111))
8275 {
8276 specs[count] = tmpl;
8277 specs[count++].index = regno;
8278 }
8279 }
8280 }
800eeca4 8281 else
542d6675
KH		 8282 {
8283 UNHANDLED;
8284 }
800eeca4
JW		 8285 break;
8286
8287 case IA64_RS_ARb:
8288 if (note == 1)
542d6675
KH		 8289 {
8290 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8291 {
8292 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8293 if ((regno >= 48 && regno <= 63)
8294 || (regno >= 112 && regno <= 127))
8295 {
8296 specs[count] = tmpl;
8297 specs[count++].index = regno;
8298 }
8299 }
8300 }
800eeca4 8301 else if (note == 0)
542d6675
KH		 8302 {
8303 for (i = 48; i < 64; i++)
8304 {
8305 specs[count] = tmpl;
8306 specs[count++].index = i;
8307 }
8308 for (i = 112; i < 128; i++)
8309 {
8310 specs[count] = tmpl;
8311 specs[count++].index = i;
8312 }
8313 }
197865e8 8314 else
542d6675
KH		 8315 {
8316 UNHANDLED;
8317 }
800eeca4
JW		 8318 break;
8319
8320 case IA64_RS_BR:
8321 if (note != 1)
542d6675
KH		 8322 {
8323 UNHANDLED;
8324 }
800eeca4 8325 else
542d6675
KH		 8326 {
8327 if (rsrc_write)
8328 {
8329 for (i = 0; i < idesc->num_outputs; i++)
8330 if (idesc->operands[i] == IA64_OPND_B1
8331 || idesc->operands[i] == IA64_OPND_B2)
8332 {
8333 specs[count] = tmpl;
8334 specs[count++].index =
8335 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8336 }
8337 }
8338 else
8339 {
40449e9f 8340 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8341 if (idesc->operands[i] == IA64_OPND_B1
8342 || idesc->operands[i] == IA64_OPND_B2)
8343 {
8344 specs[count] = tmpl;
8345 specs[count++].index =
8346 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8347 }
8348 }
8349 }
800eeca4
JW		 8350 break;
8351
8352 case IA64_RS_CPUID: /* four or more registers */
8353 if (note == 3)
542d6675
KH		 8354 {
8355 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8356 {
8357 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8358 if (regno >= 0 && regno < NELEMS (gr_values)
8359 && KNOWN (regno))
8360 {
8361 specs[count] = tmpl;
8362 specs[count++].index = gr_values[regno].value & 0xFF;
8363 }
8364 else
8365 {
8366 specs[count] = tmpl;
8367 specs[count++].specific = 0;
8368 }
8369 }
8370 }
800eeca4 8371 else
542d6675
KH		 8372 {
8373 UNHANDLED;
8374 }
800eeca4
JW		 8375 break;
8376
8377 case IA64_RS_DBR: /* four or more registers */
8378 if (note == 3)
542d6675
KH		 8379 {
8380 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8381 {
8382 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8383 if (regno >= 0 && regno < NELEMS (gr_values)
8384 && KNOWN (regno))
8385 {
8386 specs[count] = tmpl;
8387 specs[count++].index = gr_values[regno].value & 0xFF;
8388 }
8389 else
8390 {
8391 specs[count] = tmpl;
8392 specs[count++].specific = 0;
8393 }
8394 }
8395 }
800eeca4 8396 else if (note == 0 && !rsrc_write)
542d6675
KH		 8397 {
8398 specs[count] = tmpl;
8399 specs[count++].specific = 0;
8400 }
800eeca4 8401 else
542d6675
KH		 8402 {
8403 UNHANDLED;
8404 }
800eeca4
JW		 8405 break;
8406
8407 case IA64_RS_IBR: /* four or more registers */
8408 if (note == 3)
542d6675
KH		 8409 {
8410 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8411 {
8412 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8413 if (regno >= 0 && regno < NELEMS (gr_values)
8414 && KNOWN (regno))
8415 {
8416 specs[count] = tmpl;
8417 specs[count++].index = gr_values[regno].value & 0xFF;
8418 }
8419 else
8420 {
8421 specs[count] = tmpl;
8422 specs[count++].specific = 0;
8423 }
8424 }
8425 }
800eeca4 8426 else
542d6675
KH		 8427 {
8428 UNHANDLED;
8429 }
800eeca4
JW		 8430 break;
8431
8432 case IA64_RS_MSR:
8433 if (note == 5)
8434 {
8435 /* These are implementation specific. Force all references to
8436 conflict with all other references. */
8437 specs[count] = tmpl;
8438 specs[count++].specific = 0;
8439 }
8440 else
8441 {
8442 UNHANDLED;
8443 }
8444 break;
8445
8446 case IA64_RS_PKR: /* 16 or more registers */
8447 if (note == 3 || note == 4)
542d6675
KH		 8448 {
8449 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8450 {
8451 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8452 if (regno >= 0 && regno < NELEMS (gr_values)
8453 && KNOWN (regno))
8454 {
8455 if (note == 3)
8456 {
8457 specs[count] = tmpl;
8458 specs[count++].index = gr_values[regno].value & 0xFF;
8459 }
8460 else
8461 for (i = 0; i < NELEMS (gr_values); i++)
8462 {
8463 /* Uses all registers *except* the one in R3. */
2434f565 8464 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8465 {
8466 specs[count] = tmpl;
8467 specs[count++].index = i;
8468 }
8469 }
8470 }
8471 else
8472 {
8473 specs[count] = tmpl;
8474 specs[count++].specific = 0;
8475 }
8476 }
8477 }
8478 else if (note == 0)
8479 {
8480 /* probe et al. */
8481 specs[count] = tmpl;
8482 specs[count++].specific = 0;
8483 }
8484 break;
8485
8486 case IA64_RS_PMC: /* four or more registers */
8487 if (note == 3)
8488 {
8489 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8490 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8491
8492 {
8493 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8494 ? 1 : !rsrc_write);
8495 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8496 if (regno >= 0 && regno < NELEMS (gr_values)
8497 && KNOWN (regno))
8498 {
8499 specs[count] = tmpl;
8500 specs[count++].index = gr_values[regno].value & 0xFF;
8501 }
8502 else
8503 {
8504 specs[count] = tmpl;
8505 specs[count++].specific = 0;
8506 }
8507 }
8508 }
8509 else
8510 {
8511 UNHANDLED;
8512 }
800eeca4
JW		 8513 break;
8514
8515 case IA64_RS_PMD: /* four or more registers */
8516 if (note == 3)
542d6675
KH		 8517 {
8518 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8519 {
8520 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8521 if (regno >= 0 && regno < NELEMS (gr_values)
8522 && KNOWN (regno))
8523 {
8524 specs[count] = tmpl;
8525 specs[count++].index = gr_values[regno].value & 0xFF;
8526 }
8527 else
8528 {
8529 specs[count] = tmpl;
8530 specs[count++].specific = 0;
8531 }
8532 }
8533 }
800eeca4 8534 else
542d6675
KH		 8535 {
8536 UNHANDLED;
8537 }
800eeca4
JW		 8538 break;
8539
8540 case IA64_RS_RR: /* eight registers */
8541 if (note == 6)
542d6675
KH		 8542 {
8543 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8544 {
8545 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8546 if (regno >= 0 && regno < NELEMS (gr_values)
8547 && KNOWN (regno))
8548 {
8549 specs[count] = tmpl;
8550 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8551 }
8552 else
8553 {
8554 specs[count] = tmpl;
8555 specs[count++].specific = 0;
8556 }
8557 }
8558 }
800eeca4 8559 else if (note == 0 && !rsrc_write)
542d6675
KH		 8560 {
8561 specs[count] = tmpl;
8562 specs[count++].specific = 0;
8563 }
197865e8 8564 else
542d6675
KH		 8565 {
8566 UNHANDLED;
8567 }
800eeca4
JW		 8568 break;
8569
8570 case IA64_RS_CR_IRR:
197865e8 8571 if (note == 0)
542d6675
KH		 8572 {
8573 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8574 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8575 if (rsrc_write
8576 && idesc->operands[1] == IA64_OPND_CR3
8577 && regno == CR_IVR)
8578 {
8579 for (i = 0; i < 4; i++)
8580 {
8581 specs[count] = tmpl;
8582 specs[count++].index = CR_IRR0 + i;
8583 }
8584 }
8585 }
800eeca4 8586 else if (note == 1)
542d6675
KH		 8587 {
8588 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8589 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8590 && regno >= CR_IRR0
8591 && regno <= CR_IRR3)
8592 {
8593 specs[count] = tmpl;
8594 specs[count++].index = regno;
8595 }
8596 }
800eeca4 8597 else
542d6675
KH		 8598 {
8599 UNHANDLED;
8600 }
800eeca4
JW		 8601 break;
8602
8603 case IA64_RS_CR_LRR:
8604 if (note != 1)
542d6675
KH		 8605 {
8606 UNHANDLED;
8607 }
197865e8 8608 else
542d6675
KH		 8609 {
8610 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8611 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8612 && (regno == CR_LRR0 || regno == CR_LRR1))
8613 {
8614 specs[count] = tmpl;
8615 specs[count++].index = regno;
8616 }
8617 }
800eeca4
JW		 8618 break;
8619
8620 case IA64_RS_CR:
8621 if (note == 1)
542d6675
KH		 8622 {
8623 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8624 {
8625 specs[count] = tmpl;
8626 specs[count++].index =
8627 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8628 }
8629 }
800eeca4 8630 else
542d6675
KH		 8631 {
8632 UNHANDLED;
8633 }
800eeca4
JW		 8634 break;
8635
8636 case IA64_RS_FR:
8637 case IA64_RS_FRb:
8638 if (note != 1)
542d6675
KH		 8639 {
8640 UNHANDLED;
8641 }
800eeca4 8642 else if (rsrc_write)
542d6675
KH		 8643 {
8644 if (dep->specifier == IA64_RS_FRb
8645 && idesc->operands[0] == IA64_OPND_F1)
8646 {
8647 specs[count] = tmpl;
8648 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8649 }
8650 }
800eeca4 8651 else
542d6675
KH		 8652 {
8653 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8654 {
8655 if (idesc->operands[i] == IA64_OPND_F2
8656 || idesc->operands[i] == IA64_OPND_F3
8657 || idesc->operands[i] == IA64_OPND_F4)
8658 {
8659 specs[count] = tmpl;
8660 specs[count++].index =
8661 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8662 }
8663 }
8664 }
800eeca4
JW		 8665 break;
8666
8667 case IA64_RS_GR:
8668 if (note == 13)
542d6675
KH		 8669 {
8670 /* This reference applies only to the GR whose value is loaded with
8671 data returned from memory. */
8672 specs[count] = tmpl;
8673 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8674 }
800eeca4 8675 else if (note == 1)
542d6675
KH		 8676 {
8677 if (rsrc_write)
8678 {
8679 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8680 if (idesc->operands[i] == IA64_OPND_R1
8681 || idesc->operands[i] == IA64_OPND_R2
8682 || idesc->operands[i] == IA64_OPND_R3)
8683 {
8684 specs[count] = tmpl;
197865e8 8685 specs[count++].index =
50b81f19
JW		 8686 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8687 }
8688 if (idesc->flags & IA64_OPCODE_POSTINC)
8689 for (i = 0; i < NELEMS (idesc->operands); i++)
8690 if (idesc->operands[i] == IA64_OPND_MR3)
8691 {
8692 specs[count] = tmpl;
8693 specs[count++].index =
8694 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8695 }
542d6675
KH		 8696 }
8697 else
8698 {
8699 /* Look for anything that reads a GR. */
8700 for (i = 0; i < NELEMS (idesc->operands); i++)
8701 {
8702 if (idesc->operands[i] == IA64_OPND_MR3
8703 || idesc->operands[i] == IA64_OPND_CPUID_R3
8704 || idesc->operands[i] == IA64_OPND_DBR_R3
8705 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8706 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8707 || idesc->operands[i] == IA64_OPND_PKR_R3
8708 || idesc->operands[i] == IA64_OPND_PMC_R3
8709 || idesc->operands[i] == IA64_OPND_PMD_R3
8710 || idesc->operands[i] == IA64_OPND_RR_R3
8711 || ((i >= idesc->num_outputs)
8712 && (idesc->operands[i] == IA64_OPND_R1
8713 || idesc->operands[i] == IA64_OPND_R2
8714 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8715 /* addl source register. */
8716 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8717 {
8718 specs[count] = tmpl;
8719 specs[count++].index =
8720 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8721 }
8722 }
8723 }
8724 }
197865e8 8725 else
542d6675
KH		 8726 {
8727 UNHANDLED;
8728 }
800eeca4
JW		 8729 break;
8730
139368c9
JW		 8731 /* This is the same as IA64_RS_PRr, except that the register range is
8732 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8733 case IA64_RS_PR:
8734 if (note == 0)
542d6675 8735 {
139368c9 8736 for (i = 1; i < 16; i++)
542d6675 8737 {
139368c9
JW		 8738 specs[count] = tmpl;
8739 specs[count++].index = i;
8740 }
8741 }
8742 else if (note == 7)
8743 {
8744 valueT mask = 0;
8745 /* Mark only those registers indicated by the mask. */
8746 if (rsrc_write)
8747 {
8748 mask = CURR_SLOT.opnd[2].X_add_number;
8749 for (i = 1; i < 16; i++)
8750 if (mask & ((valueT) 1 << i))
8751 {
8752 specs[count] = tmpl;
8753 specs[count++].index = i;
8754 }
8755 }
8756 else
8757 {
8758 UNHANDLED;
8759 }
8760 }
8761 else if (note == 11) /* note 11 implies note 1 as well */
8762 {
8763 if (rsrc_write)
8764 {
8765 for (i = 0; i < idesc->num_outputs; i++)
8766 {
8767 if (idesc->operands[i] == IA64_OPND_P1
8768 || idesc->operands[i] == IA64_OPND_P2)
8769 {
8770 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8771 if (regno >= 1 && regno < 16)
8772 {
8773 specs[count] = tmpl;
8774 specs[count++].index = regno;
8775 }
8776 }
8777 }
8778 }
8779 else
8780 {
8781 UNHANDLED;
8782 }
8783 }
8784 else if (note == 12)
8785 {
8786 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8787 {
8788 specs[count] = tmpl;
8789 specs[count++].index = CURR_SLOT.qp_regno;
8790 }
8791 }
8792 else if (note == 1)
8793 {
8794 if (rsrc_write)
8795 {
8796 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8797 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8798 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8799 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8800
8801 if ((idesc->operands[0] == IA64_OPND_P1
8802 || idesc->operands[0] == IA64_OPND_P2)
8803 && p1 >= 1 && p1 < 16)
542d6675
KH		 8804 {
8805 specs[count] = tmpl;
139368c9
JW		 8806 specs[count].cmp_type =
8807 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8808 specs[count++].index = p1;
8809 }
8810 if ((idesc->operands[1] == IA64_OPND_P1
8811 || idesc->operands[1] == IA64_OPND_P2)
8812 && p2 >= 1 && p2 < 16)
8813 {
8814 specs[count] = tmpl;
8815 specs[count].cmp_type =
8816 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8817 specs[count++].index = p2;
542d6675
KH		 8818 }
8819 }
8820 else
8821 {
139368c9 8822 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8823 {
8824 specs[count] = tmpl;
139368c9
JW		 8825 specs[count++].index = CURR_SLOT.qp_regno;
8826 }
8827 if (idesc->operands[1] == IA64_OPND_PR)
8828 {
8829 for (i = 1; i < 16; i++)
8830 {
8831 specs[count] = tmpl;
8832 specs[count++].index = i;
8833 }
542d6675
KH		 8834 }
8835 }
8836 }
139368c9
JW		 8837 else
8838 {
8839 UNHANDLED;
8840 }
8841 break;
8842
8843 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8844 simplified cases of this. */
8845 case IA64_RS_PRr:
8846 if (note == 0)
8847 {
8848 for (i = 16; i < 63; i++)
8849 {
8850 specs[count] = tmpl;
8851 specs[count++].index = i;
8852 }
8853 }
800eeca4 8854 else if (note == 7)
542d6675
KH		 8855 {
8856 valueT mask = 0;
8857 /* Mark only those registers indicated by the mask. */
8858 if (rsrc_write
8859 && idesc->operands[0] == IA64_OPND_PR)
8860 {
8861 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 8862 if (mask & ((valueT) 1 << 16))
139368c9
JW		 8863 for (i = 16; i < 63; i++)
8864 {
8865 specs[count] = tmpl;
8866 specs[count++].index = i;
8867 }
542d6675
KH		 8868 }
8869 else if (rsrc_write
8870 && idesc->operands[0] == IA64_OPND_PR_ROT)
8871 {
8872 for (i = 16; i < 63; i++)
8873 {
8874 specs[count] = tmpl;
8875 specs[count++].index = i;
8876 }
8877 }
8878 else
8879 {
8880 UNHANDLED;
8881 }
8882 }
800eeca4 8883 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 8884 {
8885 if (rsrc_write)
8886 {
8887 for (i = 0; i < idesc->num_outputs; i++)
8888 {
8889 if (idesc->operands[i] == IA64_OPND_P1
8890 || idesc->operands[i] == IA64_OPND_P2)
8891 {
8892 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 8893 if (regno >= 16 && regno < 63)
542d6675
KH		 8894 {
8895 specs[count] = tmpl;
8896 specs[count++].index = regno;
8897 }
8898 }
8899 }
8900 }
8901 else
8902 {
8903 UNHANDLED;
8904 }
8905 }
800eeca4 8906 else if (note == 12)
542d6675 8907 {
139368c9 8908 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8909 {
8910 specs[count] = tmpl;
8911 specs[count++].index = CURR_SLOT.qp_regno;
8912 }
8913 }
800eeca4 8914 else if (note == 1)
542d6675
KH		 8915 {
8916 if (rsrc_write)
8917 {
8918 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8919 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8920 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8921 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8922
542d6675
KH		 8923 if ((idesc->operands[0] == IA64_OPND_P1
8924 || idesc->operands[0] == IA64_OPND_P2)
139368c9 8925 && p1 >= 16 && p1 < 63)
542d6675
KH		 8926 {
8927 specs[count] = tmpl;
4a4f25cf 8928 specs[count].cmp_type =
7484b8e6 8929 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 8930 specs[count++].index = p1;
8931 }
8932 if ((idesc->operands[1] == IA64_OPND_P1
8933 || idesc->operands[1] == IA64_OPND_P2)
139368c9 8934 && p2 >= 16 && p2 < 63)
542d6675
KH		 8935 {
8936 specs[count] = tmpl;
4a4f25cf 8937 specs[count].cmp_type =
7484b8e6 8938 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 8939 specs[count++].index = p2;
8940 }
8941 }
8942 else
8943 {
139368c9 8944 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8945 {
8946 specs[count] = tmpl;
8947 specs[count++].index = CURR_SLOT.qp_regno;
8948 }
8949 if (idesc->operands[1] == IA64_OPND_PR)
8950 {
139368c9 8951 for (i = 16; i < 63; i++)
542d6675
KH		 8952 {
8953 specs[count] = tmpl;
8954 specs[count++].index = i;
8955 }
8956 }
8957 }
8958 }
197865e8 8959 else
542d6675
KH		 8960 {
8961 UNHANDLED;
8962 }
800eeca4
JW		 8963 break;
8964
8965 case IA64_RS_PSR:
197865e8 8966 /* Verify that the instruction is using the PSR bit indicated in
542d6675 8967 dep->regindex. */
800eeca4 8968 if (note == 0)
542d6675
KH		 8969 {
8970 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8971 {
8972 if (dep->regindex < 6)
8973 {
8974 specs[count++] = tmpl;
8975 }
8976 }
8977 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8978 {
8979 if (dep->regindex < 32
8980 || dep->regindex == 35
8981 || dep->regindex == 36
8982 || (!rsrc_write && dep->regindex == PSR_CPL))
8983 {
8984 specs[count++] = tmpl;
8985 }
8986 }
8987 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8988 {
8989 if (dep->regindex < 32
8990 || dep->regindex == 35
8991 || dep->regindex == 36
8992 || (rsrc_write && dep->regindex == PSR_CPL))
8993 {
8994 specs[count++] = tmpl;
8995 }
8996 }
8997 else
8998 {
8999 /* Several PSR bits have very specific dependencies. */
9000 switch (dep->regindex)
9001 {
9002 default:
9003 specs[count++] = tmpl;
9004 break;
9005 case PSR_IC:
9006 if (rsrc_write)
9007 {
9008 specs[count++] = tmpl;
9009 }
9010 else
9011 {
9012 /* Only certain CR accesses use PSR.ic */
9013 if (idesc->operands[0] == IA64_OPND_CR3
9014 || idesc->operands[1] == IA64_OPND_CR3)
9015 {
9016 int index =
9017 ((idesc->operands[0] == IA64_OPND_CR3)
9018 ? 0 : 1);
9019 int regno =
9020 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9021
9022 switch (regno)
9023 {
9024 default:
9025 break;
9026 case CR_ITIR:
9027 case CR_IFS:
9028 case CR_IIM:
9029 case CR_IIP:
9030 case CR_IPSR:
9031 case CR_ISR:
9032 case CR_IFA:
9033 case CR_IHA:
9034 case CR_IIPA:
9035 specs[count++] = tmpl;
9036 break;
9037 }
9038 }
9039 }
9040 break;
9041 case PSR_CPL:
9042 if (rsrc_write)
9043 {
9044 specs[count++] = tmpl;
9045 }
9046 else
9047 {
9048 /* Only some AR accesses use cpl */
9049 if (idesc->operands[0] == IA64_OPND_AR3
9050 || idesc->operands[1] == IA64_OPND_AR3)
9051 {
9052 int index =
9053 ((idesc->operands[0] == IA64_OPND_AR3)
9054 ? 0 : 1);
9055 int regno =
9056 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9057
9058 if (regno == AR_ITC
9059 || (index == 0
9060 && (regno == AR_ITC
9061 || regno == AR_RSC
9062 || (regno >= AR_K0
9063 && regno <= AR_K7))))
9064 {
9065 specs[count++] = tmpl;
9066 }
9067 }
9068 else
9069 {
9070 specs[count++] = tmpl;
9071 }
9072 break;
9073 }
9074 }
9075 }
9076 }
800eeca4 9077 else if (note == 7)
542d6675
KH		 9078 {
9079 valueT mask = 0;
9080 if (idesc->operands[0] == IA64_OPND_IMMU24)
9081 {
9082 mask = CURR_SLOT.opnd[0].X_add_number;
9083 }
9084 else
9085 {
9086 UNHANDLED;
9087 }
9088 if (mask & ((valueT) 1 << dep->regindex))
9089 {
9090 specs[count++] = tmpl;
9091 }
9092 }
800eeca4 9093 else if (note == 8)
542d6675
KH		 9094 {
9095 int min = dep->regindex == PSR_DFL ? 2 : 32;
9096 int max = dep->regindex == PSR_DFL ? 31 : 127;
9097 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9098 for (i = 0; i < NELEMS (idesc->operands); i++)
9099 {
9100 if (idesc->operands[i] == IA64_OPND_F1
9101 || idesc->operands[i] == IA64_OPND_F2
9102 || idesc->operands[i] == IA64_OPND_F3
9103 || idesc->operands[i] == IA64_OPND_F4)
9104 {
9105 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9106 if (reg >= min && reg <= max)
9107 {
9108 specs[count++] = tmpl;
9109 }
9110 }
9111 }
9112 }
800eeca4 9113 else if (note == 9)
542d6675
KH		 9114 {
9115 int min = dep->regindex == PSR_MFL ? 2 : 32;
9116 int max = dep->regindex == PSR_MFL ? 31 : 127;
9117 /* mfh is read on writes to FR32-127; mfl is read on writes to
9118 FR2-31 */
9119 for (i = 0; i < idesc->num_outputs; i++)
9120 {
9121 if (idesc->operands[i] == IA64_OPND_F1)
9122 {
9123 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9124 if (reg >= min && reg <= max)
9125 {
9126 specs[count++] = tmpl;
9127 }
9128 }
9129 }
9130 }
800eeca4 9131 else if (note == 10)
542d6675
KH		 9132 {
9133 for (i = 0; i < NELEMS (idesc->operands); i++)
9134 {
9135 if (idesc->operands[i] == IA64_OPND_R1
9136 || idesc->operands[i] == IA64_OPND_R2
9137 || idesc->operands[i] == IA64_OPND_R3)
9138 {
9139 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9140 if (regno >= 16 && regno <= 31)
9141 {
9142 specs[count++] = tmpl;
9143 }
9144 }
9145 }
9146 }
800eeca4 9147 else
542d6675
KH		 9148 {
9149 UNHANDLED;
9150 }
800eeca4
JW		 9151 break;
9152
9153 case IA64_RS_AR_FPSR:
9154 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9155 {
9156 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9157 if (regno == AR_FPSR)
9158 {
9159 specs[count++] = tmpl;
9160 }
9161 }
800eeca4 9162 else
542d6675
KH		 9163 {
9164 specs[count++] = tmpl;
9165 }
800eeca4
JW		 9166 break;
9167
197865e8 9168 case IA64_RS_ARX:
800eeca4
JW		 9169 /* Handle all AR[REG] resources */
9170 if (note == 0 || note == 1)
542d6675
KH		 9171 {
9172 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9173 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9174 && regno == dep->regindex)
9175 {
9176 specs[count++] = tmpl;
9177 }
9178 /* other AR[REG] resources may be affected by AR accesses */
9179 else if (idesc->operands[0] == IA64_OPND_AR3)
9180 {
9181 /* AR[] writes */
9182 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9183 switch (dep->regindex)
9184 {
9185 default:
9186 break;
9187 case AR_BSP:
9188 case AR_RNAT:
9189 if (regno == AR_BSPSTORE)
9190 {
9191 specs[count++] = tmpl;
9192 }
9193 case AR_RSC:
9194 if (!rsrc_write &&
9195 (regno == AR_BSPSTORE
9196 || regno == AR_RNAT))
9197 {
9198 specs[count++] = tmpl;
9199 }
9200 break;
9201 }
9202 }
9203 else if (idesc->operands[1] == IA64_OPND_AR3)
9204 {
9205 /* AR[] reads */
9206 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9207 switch (dep->regindex)
9208 {
9209 default:
9210 break;
9211 case AR_RSC:
9212 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9213 {
9214 specs[count++] = tmpl;
9215 }
9216 break;
9217 }
9218 }
9219 else
9220 {
9221 specs[count++] = tmpl;
9222 }
9223 }
800eeca4 9224 else
542d6675
KH		 9225 {
9226 UNHANDLED;
9227 }
800eeca4
JW		 9228 break;
9229
9230 case IA64_RS_CRX:
9231 /* Handle all CR[REG] resources */
9232 if (note == 0 || note == 1)
542d6675
KH		 9233 {
9234 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9235 {
9236 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9237 if (regno == dep->regindex)
9238 {
9239 specs[count++] = tmpl;
9240 }
9241 else if (!rsrc_write)
9242 {
9243 /* Reads from CR[IVR] affect other resources. */
9244 if (regno == CR_IVR)
9245 {
9246 if ((dep->regindex >= CR_IRR0
9247 && dep->regindex <= CR_IRR3)
9248 || dep->regindex == CR_TPR)
9249 {
9250 specs[count++] = tmpl;
9251 }
9252 }
9253 }
9254 }
9255 else
9256 {
9257 specs[count++] = tmpl;
9258 }
9259 }
800eeca4 9260 else
542d6675
KH		 9261 {
9262 UNHANDLED;
9263 }
800eeca4
JW		 9264 break;
9265
9266 case IA64_RS_INSERVICE:
9267 /* look for write of EOI (67) or read of IVR (65) */
9268 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9269 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9270 || (idesc->operands[1] == IA64_OPND_CR3
9271 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9272 {
9273 specs[count++] = tmpl;
9274 }
800eeca4
JW		 9275 break;
9276
9277 case IA64_RS_GR0:
9278 if (note == 1)
542d6675
KH		 9279 {
9280 specs[count++] = tmpl;
9281 }
800eeca4 9282 else
542d6675
KH		 9283 {
9284 UNHANDLED;
9285 }
800eeca4
JW		 9286 break;
9287
9288 case IA64_RS_CFM:
9289 if (note != 2)
542d6675
KH		 9290 {
9291 specs[count++] = tmpl;
9292 }
800eeca4 9293 else
542d6675
KH		 9294 {
9295 /* Check if any of the registers accessed are in the rotating region.
9296 mov to/from pr accesses CFM only when qp_regno is in the rotating
9297 region */
9298 for (i = 0; i < NELEMS (idesc->operands); i++)
9299 {
9300 if (idesc->operands[i] == IA64_OPND_R1
9301 || idesc->operands[i] == IA64_OPND_R2
9302 || idesc->operands[i] == IA64_OPND_R3)
9303 {
9304 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9305 /* Assumes that md.rot.num_regs is always valid */
9306 if (md.rot.num_regs > 0
9307 && num > 31
9308 && num < 31 + md.rot.num_regs)
9309 {
9310 specs[count] = tmpl;
9311 specs[count++].specific = 0;
9312 }
9313 }
9314 else if (idesc->operands[i] == IA64_OPND_F1
9315 || idesc->operands[i] == IA64_OPND_F2
9316 || idesc->operands[i] == IA64_OPND_F3
9317 || idesc->operands[i] == IA64_OPND_F4)
9318 {
9319 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9320 if (num > 31)
9321 {
9322 specs[count] = tmpl;
9323 specs[count++].specific = 0;
9324 }
9325 }
9326 else if (idesc->operands[i] == IA64_OPND_P1
9327 || idesc->operands[i] == IA64_OPND_P2)
9328 {
9329 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9330 if (num > 15)
9331 {
9332 specs[count] = tmpl;
9333 specs[count++].specific = 0;
9334 }
9335 }
9336 }
9337 if (CURR_SLOT.qp_regno > 15)
9338 {
9339 specs[count] = tmpl;
9340 specs[count++].specific = 0;
9341 }
9342 }
800eeca4
JW		 9343 break;
9344
139368c9
JW		 9345 /* This is the same as IA64_RS_PRr, except simplified to account for
9346 the fact that there is only one register. */
800eeca4
JW		 9347 case IA64_RS_PR63:
9348 if (note == 0)
542d6675
KH		 9349 {
9350 specs[count++] = tmpl;
9351 }
139368c9 9352 else if (note == 7)
40449e9f
KH		 9353 {
9354 valueT mask = 0;
9355 if (idesc->operands[2] == IA64_OPND_IMM17)
9356 mask = CURR_SLOT.opnd[2].X_add_number;
9357 if (mask & ((valueT) 1 << 63))
139368c9 9358 specs[count++] = tmpl;
40449e9f 9359 }
800eeca4 9360 else if (note == 11)
542d6675
KH		 9361 {
9362 if ((idesc->operands[0] == IA64_OPND_P1
9363 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9364 || (idesc->operands[1] == IA64_OPND_P2
9365 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9366 {
9367 specs[count++] = tmpl;
9368 }
9369 }
800eeca4 9370 else if (note == 12)
542d6675
KH		 9371 {
9372 if (CURR_SLOT.qp_regno == 63)
9373 {
9374 specs[count++] = tmpl;
9375 }
9376 }
800eeca4 9377 else if (note == 1)
542d6675
KH		 9378 {
9379 if (rsrc_write)
9380 {
40449e9f
KH		 9381 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9382 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9383 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9384 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9385
4a4f25cf 9386 if (p1 == 63
7484b8e6
TW		 9387 && (idesc->operands[0] == IA64_OPND_P1
9388 || idesc->operands[0] == IA64_OPND_P2))
9389 {
40449e9f 9390 specs[count] = tmpl;
4a4f25cf 9391 specs[count++].cmp_type =
7484b8e6
TW		 9392 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9393 }
9394 if (p2 == 63
9395 && (idesc->operands[1] == IA64_OPND_P1
9396 || idesc->operands[1] == IA64_OPND_P2))
9397 {
40449e9f 9398 specs[count] = tmpl;
4a4f25cf 9399 specs[count++].cmp_type =
7484b8e6
TW		 9400 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9401 }
542d6675
KH		 9402 }
9403 else
9404 {
9405 if (CURR_SLOT.qp_regno == 63)
9406 {
9407 specs[count++] = tmpl;
9408 }
9409 }
9410 }
800eeca4 9411 else
542d6675
KH		 9412 {
9413 UNHANDLED;
9414 }
800eeca4
JW		 9415 break;
9416
9417 case IA64_RS_RSE:
9418 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9419 read resources have not yet been completely identified, so for now
9420 treat RSE as a single resource */
800eeca4 9421 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9422 {
9423 if (rsrc_write)
9424 {
9425 if (idesc->operands[0] == IA64_OPND_AR3
9426 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9427 {
a66d2bb7 9428 specs[count++] = tmpl;
542d6675
KH		 9429 }
9430 }
9431 else
9432 {
9433 if (idesc->operands[0] == IA64_OPND_AR3)
9434 {
9435 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9436 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9437 {
9438 specs[count++] = tmpl;
9439 }
9440 }
9441 else if (idesc->operands[1] == IA64_OPND_AR3)
9442 {
9443 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9444 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9445 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9446 {
9447 specs[count++] = tmpl;
9448 }
9449 }
9450 }
9451 }
197865e8 9452 else
542d6675
KH		 9453 {
9454 specs[count++] = tmpl;
9455 }
800eeca4
JW		 9456 break;
9457
9458 case IA64_RS_ANY:
9459 /* FIXME -- do any of these need to be non-specific? */
9460 specs[count++] = tmpl;
9461 break;
9462
9463 default:
9464 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9465 break;
9466 }
9467
9468 return count;
9469}
9470
9471/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9472 QP of the marking instruction and a subsequent branch on the same QP. */
9473
800eeca4
JW		 9474static void
9475clear_qp_branch_flag (mask)
542d6675 9476 valueT mask;
800eeca4
JW		 9477{
9478 int i;
542d6675 9479 for (i = 0; i < regdepslen; i++)
800eeca4 9480 {
197865e8 9481 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9482 if ((bit & mask) != 0)
542d6675
KH		 9483 {
9484 regdeps[i].link_to_qp_branch = 0;
9485 }
800eeca4
JW		 9486 }
9487}
9488
5e2f6673
L		 9489/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9490 any mutexes which contain one of the PRs and create new ones when
9491 needed. */
9492
9493static int
9494update_qp_mutex (valueT mask)
9495{
9496 int i;
9497 int add = 0;
9498
9499 i = 0;
9500 while (i < qp_mutexeslen)
9501 {
9502 if ((qp_mutexes[i].prmask & mask) != 0)
9503 {
9504 /* If it destroys and creates the same mutex, do nothing. */
9505 if (qp_mutexes[i].prmask == mask
9506 && qp_mutexes[i].path == md.path)
9507 {
9508 i++;
9509 add = -1;
9510 }
9511 else
9512 {
9513 int keep = 0;
9514
9515 if (md.debug_dv)
9516 {
9517 fprintf (stderr, " Clearing mutex relation");
9518 print_prmask (qp_mutexes[i].prmask);
9519 fprintf (stderr, "\n");
9520 }
9521
9522 /* Deal with the old mutex with more than 3+ PRs only if
9523 the new mutex on the same execution path with it.
9524
9525 FIXME: The 3+ mutex support is incomplete.
9526 dot_pred_rel () may be a better place to fix it. */
9527 if (qp_mutexes[i].path == md.path)
9528 {
9529 /* If it is a proper subset of the mutex, create a
9530 new mutex. */
9531 if (add == 0
9532 && (qp_mutexes[i].prmask & mask) == mask)
9533 add = 1;
9534
9535 qp_mutexes[i].prmask &= ~mask;
9536 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9537 {
9538 /* Modify the mutex if there are more than one
9539 PR left. */
9540 keep = 1;
9541 i++;
9542 }
9543 }
9544
9545 if (keep == 0)
9546 /* Remove the mutex. */
9547 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9548 }
9549 }
9550 else
9551 ++i;
9552 }
9553
9554 if (add == 1)
9555 add_qp_mutex (mask);
9556
9557 return add;
9558}
9559
197865e8 9560/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9561
542d6675
KH		 9562 Any changes to a PR clears the mutex relations which include that PR. */
9563
800eeca4
JW		 9564static void
9565clear_qp_mutex (mask)
542d6675 9566 valueT mask;
800eeca4
JW		 9567{
9568 int i;
9569
9570 i = 0;
9571 while (i < qp_mutexeslen)
9572 {
9573 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9574 {
9575 if (md.debug_dv)
9576 {
9577 fprintf (stderr, " Clearing mutex relation");
9578 print_prmask (qp_mutexes[i].prmask);
9579 fprintf (stderr, "\n");
9580 }
9581 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9582 }
800eeca4 9583 else
542d6675 9584 ++i;
800eeca4
JW		 9585 }
9586}
9587
9588/* Clear implies relations which contain PRs in the given masks.
9589 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9590 indicates the implied PR. */
9591
800eeca4
JW		 9592static void
9593clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9594 valueT p1_mask;
9595 valueT p2_mask;
800eeca4
JW		 9596{
9597 int i;
9598
9599 i = 0;
9600 while (i < qp_implieslen)
9601 {
197865e8 9602 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9603 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9604 {
9605 if (md.debug_dv)
9606 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9607 qp_implies[i].p1, qp_implies[i].p2);
9608 qp_implies[i] = qp_implies[--qp_implieslen];
9609 }
197865e8 9610 else
542d6675 9611 ++i;
800eeca4
JW		 9612 }
9613}
9614
542d6675
KH		 9615/* Add the PRs specified to the list of implied relations. */
9616
800eeca4
JW		 9617static void
9618add_qp_imply (p1, p2)
542d6675 9619 int p1, p2;
800eeca4
JW		 9620{
9621 valueT mask;
9622 valueT bit;
9623 int i;
9624
542d6675 9625 /* p0 is not meaningful here. */
800eeca4
JW		 9626 if (p1 == 0 || p2 == 0)
9627 abort ();
9628
9629 if (p1 == p2)
9630 return;
9631
542d6675
KH		 9632 /* If it exists already, ignore it. */
9633 for (i = 0; i < qp_implieslen; i++)
800eeca4 9634 {
197865e8 9635 if (qp_implies[i].p1 == p1
542d6675
KH		 9636 && qp_implies[i].p2 == p2
9637 && qp_implies[i].path == md.path
9638 && !qp_implies[i].p2_branched)
9639 return;
800eeca4
JW		 9640 }
9641
9642 if (qp_implieslen == qp_impliestotlen)
9643 {
9644 qp_impliestotlen += 20;
9645 qp_implies = (struct qp_imply *)
542d6675
KH		 9646 xrealloc ((void *) qp_implies,
9647 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9648 }
9649 if (md.debug_dv)
9650 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9651 qp_implies[qp_implieslen].p1 = p1;
9652 qp_implies[qp_implieslen].p2 = p2;
9653 qp_implies[qp_implieslen].path = md.path;
9654 qp_implies[qp_implieslen++].p2_branched = 0;
9655
9656 /* Add in the implied transitive relations; for everything that p2 implies,
9657 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9658 as well. */
542d6675 9659 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9660 {
9661 if (qp_implies[i].p1 == p2)
542d6675 9662 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9663 if (qp_implies[i].p2 == p1)
542d6675 9664 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9665 }
9666 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9667 relation containing p2, duplicate it and replace p2 with p1. */
9668 bit = (valueT) 1 << p1;
9669 mask = (valueT) 1 << p2;
542d6675 9670 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9671 {
9672 if (qp_mutexes[i].prmask & mask)
542d6675 9673 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9674 }
9675}
9676
800eeca4
JW		 9677/* Add the PRs specified in the mask to the mutex list; this means that only
9678 one of the PRs can be true at any time. PR0 should never be included in
9679 the mask. */
542d6675 9680
800eeca4
JW		 9681static void
9682add_qp_mutex (mask)
542d6675 9683 valueT mask;
800eeca4
JW		 9684{
9685 if (mask & 0x1)
9686 abort ();
9687
9688 if (qp_mutexeslen == qp_mutexestotlen)
9689 {
9690 qp_mutexestotlen += 20;
9691 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9692 xrealloc ((void *) qp_mutexes,
9693 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9694 }
9695 if (md.debug_dv)
9696 {
9697 fprintf (stderr, " Registering mutex on");
9698 print_prmask (mask);
9699 fprintf (stderr, "\n");
9700 }
9701 qp_mutexes[qp_mutexeslen].path = md.path;
9702 qp_mutexes[qp_mutexeslen++].prmask = mask;
9703}
9704
cb5301b6
RH		 9705static int
9706has_suffix_p (name, suffix)
40449e9f
KH		 9707 const char *name;
9708 const char *suffix;
cb5301b6
RH		 9709{
9710 size_t namelen = strlen (name);
9711 size_t sufflen = strlen (suffix);
9712
9713 if (namelen <= sufflen)
9714 return 0;
9715 return strcmp (name + namelen - sufflen, suffix) == 0;
9716}
9717
800eeca4
JW		 9718static void
9719clear_register_values ()
9720{
9721 int i;
9722 if (md.debug_dv)
9723 fprintf (stderr, " Clearing register values\n");
542d6675 9724 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9725 gr_values[i].known = 0;
9726}
9727
9728/* Keep track of register values/changes which affect DV tracking.
9729
9730 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9731 have to examine a group of strings to identify them. */
800eeca4 9732
800eeca4
JW		 9733static void
9734note_register_values (idesc)
542d6675 9735 struct ia64_opcode *idesc;
800eeca4
JW		 9736{
9737 valueT qp_changemask = 0;
9738 int i;
9739
542d6675
KH		 9740 /* Invalidate values for registers being written to. */
9741 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9742 {
197865e8 9743 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9744 || idesc->operands[i] == IA64_OPND_R2
9745 || idesc->operands[i] == IA64_OPND_R3)
9746 {
9747 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9748 if (regno > 0 && regno < NELEMS (gr_values))
9749 gr_values[regno].known = 0;
9750 }
50b81f19
JW		 9751 else if (idesc->operands[i] == IA64_OPND_R3_2)
9752 {
9753 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9754 if (regno > 0 && regno < 4)
9755 gr_values[regno].known = 0;
9756 }
197865e8 9757 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9758 || idesc->operands[i] == IA64_OPND_P2)
9759 {
9760 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9761 qp_changemask |= (valueT) 1 << regno;
9762 }
800eeca4 9763 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9764 {
9765 if (idesc->operands[2] & (valueT) 0x10000)
9766 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9767 else
9768 qp_changemask = idesc->operands[2];
9769 break;
9770 }
800eeca4 9771 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9772 {
9773 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9774 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9775 else
9776 qp_changemask = idesc->operands[1];
9777 qp_changemask &= ~(valueT) 0xFFFF;
9778 break;
9779 }
9780 }
9781
9782 /* Always clear qp branch flags on any PR change. */
9783 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9784 clear_qp_branch_flag (qp_changemask);
9785
542d6675 9786 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9787 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9788 {
197865e8 9789 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9790 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9791 {
9792 for (i = 32; i < 32 + md.rot.num_regs; i++)
9793 gr_values[i].known = 0;
9794 }
800eeca4
JW		 9795 clear_qp_mutex (qp_changemask);
9796 clear_qp_implies (qp_changemask, qp_changemask);
9797 }
542d6675
KH		 9798 /* After a call, all register values are undefined, except those marked
9799 as "safe". */
800eeca4 9800 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9801 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9802 {
56d27c17 9803 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9804 clear_register_values ();
9805 clear_qp_mutex (~qp_safe_across_calls);
9806 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9807 clear_qp_branch_flag (~qp_safe_across_calls);
9808 }
e9718fe1 9809 else if (is_interruption_or_rfi (idesc)
542d6675 9810 || is_taken_branch (idesc))
e9718fe1
TW		 9811 {
9812 clear_register_values ();
197865e8
KH		 9813 clear_qp_mutex (~(valueT) 0);
9814 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9815 }
542d6675 9816 /* Look for mutex and implies relations. */
197865e8 9817 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9818 || idesc->operands[0] == IA64_OPND_P2)
9819 && (idesc->operands[1] == IA64_OPND_P1
9820 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9821 {
9822 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9823 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9824 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9825 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 9826
5e2f6673
L		 9827 /* If both PRs are PR0, we can't really do anything. */
9828 if (p1 == 0 && p2 == 0)
542d6675
KH		 9829 {
9830 if (md.debug_dv)
9831 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9832 }
800eeca4 9833 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 9834 with the following exceptions. */
cb5301b6
RH		 9835 else if (has_suffix_p (idesc->name, ".or.andcm")
9836 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 9837 {
542d6675
KH		 9838 clear_qp_implies (p2mask, p1mask);
9839 }
cb5301b6
RH		 9840 else if (has_suffix_p (idesc->name, ".andcm")
9841 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 9842 {
9843 clear_qp_implies (0, p1mask | p2mask);
9844 }
cb5301b6
RH		 9845 else if (has_suffix_p (idesc->name, ".orcm")
9846 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 9847 {
9848 clear_qp_mutex (p1mask | p2mask);
9849 clear_qp_implies (p1mask | p2mask, 0);
9850 }
800eeca4 9851 else
542d6675 9852 {
5e2f6673
L		 9853 int added = 0;
9854
542d6675 9855 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 9856
9857 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9858 if (p1 == 0 || p2 == 0)
9859 clear_qp_mutex (p1mask | p2mask);
9860 else
9861 added = update_qp_mutex (p1mask | p2mask);
9862
9863 if (CURR_SLOT.qp_regno == 0
9864 || has_suffix_p (idesc->name, ".unc"))
542d6675 9865 {
5e2f6673
L		 9866 if (added == 0 && p1 && p2)
9867 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 9868 if (CURR_SLOT.qp_regno != 0)
9869 {
5e2f6673
L		 9870 if (p1)
9871 add_qp_imply (p1, CURR_SLOT.qp_regno);
9872 if (p2)
9873 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 9874 }
9875 }
542d6675
KH		 9876 }
9877 }
9878 /* Look for mov imm insns into GRs. */
800eeca4 9879 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 9880 && (idesc->operands[1] == IA64_OPND_IMM22
9881 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 9882 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 9883 && (strcmp (idesc->name, "mov") == 0
9884 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 9885 {
9886 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 9887 if (regno > 0 && regno < NELEMS (gr_values))
9888 {
9889 gr_values[regno].known = 1;
9890 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9891 gr_values[regno].path = md.path;
9892 if (md.debug_dv)
2434f565
JW		 9893 {
9894 fprintf (stderr, " Know gr%d = ", regno);
9895 fprintf_vma (stderr, gr_values[regno].value);
9896 fputs ("\n", stderr);
9897 }
542d6675 9898 }
800eeca4 9899 }
a66d2bb7
JB		 9900 /* Look for dep.z imm insns. */
9901 else if (idesc->operands[0] == IA64_OPND_R1
9902 && idesc->operands[1] == IA64_OPND_IMM8
9903 && strcmp (idesc->name, "dep.z") == 0)
9904 {
9905 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9906 if (regno > 0 && regno < NELEMS (gr_values))
9907 {
9908 valueT value = CURR_SLOT.opnd[1].X_add_number;
9909
9910 if (CURR_SLOT.opnd[3].X_add_number < 64)
9911 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
9912 value <<= CURR_SLOT.opnd[2].X_add_number;
9913 gr_values[regno].known = 1;
9914 gr_values[regno].value = value;
9915 gr_values[regno].path = md.path;
9916 if (md.debug_dv)
9917 {
9918 fprintf (stderr, " Know gr%d = ", regno);
9919 fprintf_vma (stderr, gr_values[regno].value);
9920 fputs ("\n", stderr);
9921 }
9922 }
9923 }
197865e8 9924 else
800eeca4
JW		 9925 {
9926 clear_qp_mutex (qp_changemask);
9927 clear_qp_implies (qp_changemask, qp_changemask);
9928 }
9929}
9930
542d6675
KH		 9931/* Return whether the given predicate registers are currently mutex. */
9932
800eeca4
JW		 9933static int
9934qp_mutex (p1, p2, path)
542d6675
KH		 9935 int p1;
9936 int p2;
9937 int path;
800eeca4
JW		 9938{
9939 int i;
9940 valueT mask;
9941
9942 if (p1 != p2)
9943 {
542d6675
KH		 9944 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9945 for (i = 0; i < qp_mutexeslen; i++)
9946 {
9947 if (qp_mutexes[i].path >= path
9948 && (qp_mutexes[i].prmask & mask) == mask)
9949 return 1;
9950 }
800eeca4
JW		 9951 }
9952 return 0;
9953}
9954
9955/* Return whether the given resource is in the given insn's list of chks
9956 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 9957 conflict. */
9958
800eeca4
JW		 9959static int
9960resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 9961 struct rsrc *rs;
9962 struct ia64_opcode *idesc;
9963 int note;
9964 int qp_regno;
9965 int path;
800eeca4
JW		 9966{
9967 struct rsrc specs[MAX_SPECS];
9968 int count;
9969
9970 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9971 we don't need to check. One exception is note 11, which indicates that
9972 target predicates are written regardless of PR[qp]. */
197865e8 9973 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 9974 && note != 11)
9975 return 0;
9976
9977 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9978 while (count-- > 0)
9979 {
9980 /* UNAT checking is a bit more specific than other resources */
9981 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 9982 && specs[count].mem_offset.hint
9983 && rs->mem_offset.hint)
9984 {
9985 if (rs->mem_offset.base == specs[count].mem_offset.base)
9986 {
9987 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9988 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9989 return 1;
9990 else
9991 continue;
9992 }
9993 }
800eeca4 9994
7484b8e6 9995 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 9996 writes are an OR. */
7484b8e6 9997 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 9998 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 9999 || rs->dependency->specifier == IA64_RS_PR63)
10000 {
10001 if (specs[count].cmp_type != CMP_NONE
10002 && specs[count].cmp_type == rs->cmp_type)
10003 {
10004 if (md.debug_dv)
10005 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10006 dv_mode[rs->dependency->mode],
afa680f8 10007 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 10008 specs[count].index : 63);
10009 continue;
10010 }
10011 if (md.debug_dv)
4a4f25cf 10012 fprintf (stderr,
7484b8e6
TW		 10013 " %s on parallel compare conflict %s vs %s on PR%d\n",
10014 dv_mode[rs->dependency->mode],
4a4f25cf 10015 dv_cmp_type[rs->cmp_type],
7484b8e6 10016 dv_cmp_type[specs[count].cmp_type],
afa680f8 10017 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 10018 specs[count].index : 63);
4a4f25cf 10019
7484b8e6
TW		 10020 }
10021
800eeca4 10022 /* If either resource is not specific, conservatively assume a conflict
197865e8 10023 */
800eeca4 10024 if (!specs[count].specific || !rs->specific)
542d6675 10025 return 2;
800eeca4 10026 else if (specs[count].index == rs->index)
542d6675 10027 return 1;
800eeca4 10028 }
800eeca4
JW		 10029
10030 return 0;
10031}
10032
10033/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10034 insert a stop to create the break. Update all resource dependencies
10035 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10036 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10037 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 10038 instruction. */
800eeca4
JW		 10039
10040static void
10041insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 10042 int insert_stop;
10043 int qp_regno;
10044 int save_current;
800eeca4
JW		 10045{
10046 int i;
10047
10048 if (insert_stop && md.num_slots_in_use > 0)
10049 PREV_SLOT.end_of_insn_group = 1;
10050
10051 if (md.debug_dv)
10052 {
197865e8 10053 fprintf (stderr, " Insn group break%s",
542d6675 10054 (insert_stop ? " (w/stop)" : ""));
800eeca4 10055 if (qp_regno != 0)
542d6675 10056 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 10057 fprintf (stderr, "\n");
10058 }
10059
10060 i = 0;
10061 while (i < regdepslen)
10062 {
10063 const struct ia64_dependency *dep = regdeps[i].dependency;
10064
10065 if (qp_regno != 0
542d6675
KH		 10066 && regdeps[i].qp_regno != qp_regno)
10067 {
10068 ++i;
10069 continue;
10070 }
800eeca4
JW		 10071
10072 if (save_current
542d6675
KH		 10073 && CURR_SLOT.src_file == regdeps[i].file
10074 && CURR_SLOT.src_line == regdeps[i].line)
10075 {
10076 ++i;
10077 continue;
10078 }
800eeca4
JW		 10079
10080 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10081 those that have reached the appropriate state of insn serialization */
800eeca4 10082 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10083 || dep->semantics == IA64_DVS_IMPLIEDF
10084 || regdeps[i].insn_srlz == STATE_SRLZ)
10085 {
10086 print_dependency ("Removing", i);
10087 regdeps[i] = regdeps[--regdepslen];
10088 }
800eeca4 10089 else
542d6675
KH		 10090 {
10091 if (dep->semantics == IA64_DVS_DATA
10092 || dep->semantics == IA64_DVS_INSTR
800eeca4 10093 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10094 {
10095 if (regdeps[i].insn_srlz == STATE_NONE)
10096 regdeps[i].insn_srlz = STATE_STOP;
10097 if (regdeps[i].data_srlz == STATE_NONE)
10098 regdeps[i].data_srlz = STATE_STOP;
10099 }
10100 ++i;
10101 }
800eeca4
JW		 10102 }
10103}
10104
542d6675
KH		 10105/* Add the given resource usage spec to the list of active dependencies. */
10106
197865e8 10107static void
800eeca4 10108mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10109 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10110 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10111 struct rsrc *spec;
10112 int depind;
10113 int path;
800eeca4
JW		 10114{
10115 if (regdepslen == regdepstotlen)
10116 {
10117 regdepstotlen += 20;
10118 regdeps = (struct rsrc *)
542d6675 10119 xrealloc ((void *) regdeps,
bc805888 10120 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10121 }
10122
10123 regdeps[regdepslen] = *spec;
10124 regdeps[regdepslen].depind = depind;
10125 regdeps[regdepslen].path = path;
10126 regdeps[regdepslen].file = CURR_SLOT.src_file;
10127 regdeps[regdepslen].line = CURR_SLOT.src_line;
10128
10129 print_dependency ("Adding", regdepslen);
10130
10131 ++regdepslen;
10132}
10133
10134static void
10135print_dependency (action, depind)
542d6675
KH		 10136 const char *action;
10137 int depind;
800eeca4
JW		 10138{
10139 if (md.debug_dv)
10140 {
197865e8 10141 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10142 action, dv_mode[(regdeps[depind].dependency)->mode],
10143 (regdeps[depind].dependency)->name);
a66d2bb7 10144 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10145 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10146 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10147 {
10148 fputs (" ", stderr);
10149 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10150 fputs ("+", stderr);
10151 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10152 }
800eeca4
JW		 10153 fprintf (stderr, "\n");
10154 }
10155}
10156
10157static void
10158instruction_serialization ()
10159{
10160 int i;
10161 if (md.debug_dv)
10162 fprintf (stderr, " Instruction serialization\n");
542d6675 10163 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10164 if (regdeps[i].insn_srlz == STATE_STOP)
10165 regdeps[i].insn_srlz = STATE_SRLZ;
10166}
10167
10168static void
10169data_serialization ()
10170{
10171 int i = 0;
10172 if (md.debug_dv)
10173 fprintf (stderr, " Data serialization\n");
10174 while (i < regdepslen)
10175 {
10176 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10177 /* Note: as of 991210, all "other" dependencies are cleared by a
10178 data serialization. This might change with new tables */
10179 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10180 {
10181 print_dependency ("Removing", i);
10182 regdeps[i] = regdeps[--regdepslen];
10183 }
800eeca4 10184 else
542d6675 10185 ++i;
800eeca4
JW		 10186 }
10187}
10188
542d6675
KH		 10189/* Insert stops and serializations as needed to avoid DVs. */
10190
800eeca4
JW		 10191static void
10192remove_marked_resource (rs)
542d6675 10193 struct rsrc *rs;
800eeca4
JW		 10194{
10195 switch (rs->dependency->semantics)
10196 {
10197 case IA64_DVS_SPECIFIC:
10198 if (md.debug_dv)
10199 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10200 /* ...fall through... */
800eeca4
JW		 10201 case IA64_DVS_INSTR:
10202 if (md.debug_dv)
542d6675 10203 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10204 if (rs->insn_srlz < STATE_STOP)
542d6675 10205 insn_group_break (1, 0, 0);
800eeca4 10206 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10207 {
888a75be 10208 struct slot oldslot = CURR_SLOT;
542d6675 10209 /* Manually jam a srlz.i insn into the stream */
888a75be 10210 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10211 CURR_SLOT.user_template = -1;
542d6675
KH		 10212 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10213 instruction_serialization ();
10214 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10215 if (++md.num_slots_in_use >= NUM_SLOTS)
10216 emit_one_bundle ();
888a75be 10217 CURR_SLOT = oldslot;
542d6675 10218 }
800eeca4
JW		 10219 insn_group_break (1, 0, 0);
10220 break;
10221 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10222 "other" types of DV are eliminated
10223 by a data serialization */
800eeca4
JW		 10224 case IA64_DVS_DATA:
10225 if (md.debug_dv)
542d6675 10226 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10227 if (rs->data_srlz < STATE_STOP)
542d6675 10228 insn_group_break (1, 0, 0);
800eeca4 10229 {
888a75be 10230 struct slot oldslot = CURR_SLOT;
542d6675 10231 /* Manually jam a srlz.d insn into the stream */
888a75be 10232 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10233 CURR_SLOT.user_template = -1;
542d6675
KH		 10234 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10235 data_serialization ();
10236 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10237 if (++md.num_slots_in_use >= NUM_SLOTS)
10238 emit_one_bundle ();
888a75be 10239 CURR_SLOT = oldslot;
800eeca4
JW		 10240 }
10241 break;
10242 case IA64_DVS_IMPLIED:
10243 case IA64_DVS_IMPLIEDF:
10244 if (md.debug_dv)
542d6675 10245 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10246 insn_group_break (1, 0, 0);
10247 break;
10248 default:
10249 break;
10250 }
10251}
10252
10253/* Check the resources used by the given opcode against the current dependency
197865e8 10254 list.
800eeca4
JW		 10255
10256 The check is run once for each execution path encountered. In this case,
10257 a unique execution path is the sequence of instructions following a code
10258 entry point, e.g. the following has three execution paths, one starting
10259 at L0, one at L1, and one at L2.
197865e8 10260
800eeca4
JW		 10261 L0: nop
10262 L1: add
10263 L2: add
197865e8 10264 br.ret
800eeca4 10265*/
542d6675 10266
800eeca4
JW		 10267static void
10268check_dependencies (idesc)
542d6675 10269 struct ia64_opcode *idesc;
800eeca4
JW		 10270{
10271 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10272 int path;
10273 int i;
10274
10275 /* Note that the number of marked resources may change within the
197865e8 10276 loop if in auto mode. */
800eeca4
JW		 10277 i = 0;
10278 while (i < regdepslen)
10279 {
10280 struct rsrc *rs = &regdeps[i];
10281 const struct ia64_dependency *dep = rs->dependency;
10282 int chkind;
10283 int note;
10284 int start_over = 0;
10285
10286 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10287 || (chkind = depends_on (rs->depind, idesc)) == -1)
10288 {
10289 ++i;
10290 continue;
10291 }
10292
10293 note = NOTE (opdeps->chks[chkind]);
10294
10295 /* Check this resource against each execution path seen thus far. */
10296 for (path = 0; path <= md.path; path++)
10297 {
10298 int matchtype;
10299
10300 /* If the dependency wasn't on the path being checked, ignore it. */
10301 if (rs->path < path)
10302 continue;
10303
10304 /* If the QP for this insn implies a QP which has branched, don't
10305 bother checking. Ed. NOTE: I don't think this check is terribly
10306 useful; what's the point of generating code which will only be
10307 reached if its QP is zero?
10308 This code was specifically inserted to handle the following code,
10309 based on notes from Intel's DV checking code, where p1 implies p2.
10310
10311 mov r4 = 2
10312 (p2) br.cond L
10313 (p1) mov r4 = 7
10314 */
10315 if (CURR_SLOT.qp_regno != 0)
10316 {
10317 int skip = 0;
10318 int implies;
10319 for (implies = 0; implies < qp_implieslen; implies++)
10320 {
10321 if (qp_implies[implies].path >= path
10322 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10323 && qp_implies[implies].p2_branched)
10324 {
10325 skip = 1;
10326 break;
10327 }
10328 }
10329 if (skip)
10330 continue;
10331 }
10332
10333 if ((matchtype = resources_match (rs, idesc, note,
10334 CURR_SLOT.qp_regno, path)) != 0)
10335 {
10336 char msg[1024];
10337 char pathmsg[256] = "";
10338 char indexmsg[256] = "";
10339 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10340
10341 if (path != 0)
10342 sprintf (pathmsg, " when entry is at label '%s'",
10343 md.entry_labels[path - 1]);
a66d2bb7 10344 if (matchtype == 1 && rs->index >= 0)
542d6675
KH		 10345 sprintf (indexmsg, ", specific resource number is %d",
10346 rs->index);
10347 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10348 idesc->name,
10349 (certain ? "violates" : "may violate"),
10350 dv_mode[dep->mode], dep->name,
10351 dv_sem[dep->semantics],
10352 pathmsg, indexmsg);
10353
10354 if (md.explicit_mode)
10355 {
10356 as_warn ("%s", msg);
10357 if (path < md.path)
10358 as_warn (_("Only the first path encountering the conflict "
10359 "is reported"));
10360 as_warn_where (rs->file, rs->line,
10361 _("This is the location of the "
10362 "conflicting usage"));
10363 /* Don't bother checking other paths, to avoid duplicating
10364 the same warning */
10365 break;
10366 }
10367 else
10368 {
10369 if (md.debug_dv)
10370 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10371
10372 remove_marked_resource (rs);
10373
10374 /* since the set of dependencies has changed, start over */
10375 /* FIXME -- since we're removing dvs as we go, we
10376 probably don't really need to start over... */
10377 start_over = 1;
10378 break;
10379 }
10380 }
10381 }
800eeca4 10382 if (start_over)
542d6675 10383 i = 0;
800eeca4 10384 else
542d6675 10385 ++i;
800eeca4
JW		 10386 }
10387}
10388
542d6675
KH		 10389/* Register new dependencies based on the given opcode. */
10390
800eeca4
JW		 10391static void
10392mark_resources (idesc)
542d6675 10393 struct ia64_opcode *idesc;
800eeca4
JW		 10394{
10395 int i;
10396 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10397 int add_only_qp_reads = 0;
10398
10399 /* A conditional branch only uses its resources if it is taken; if it is
10400 taken, we stop following that path. The other branch types effectively
10401 *always* write their resources. If it's not taken, register only QP
197865e8 10402 reads. */
800eeca4
JW		 10403 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10404 {
10405 add_only_qp_reads = 1;
10406 }
10407
10408 if (md.debug_dv)
10409 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10410
542d6675 10411 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10412 {
10413 const struct ia64_dependency *dep;
10414 struct rsrc specs[MAX_SPECS];
10415 int note;
10416 int path;
10417 int count;
197865e8 10418
800eeca4 10419 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10420 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10421
10422 if (add_only_qp_reads
542d6675
KH		 10423 && !(dep->mode == IA64_DV_WAR
10424 && (dep->specifier == IA64_RS_PR
139368c9 10425 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10426 || dep->specifier == IA64_RS_PR63)))
10427 continue;
800eeca4
JW		 10428
10429 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10430
800eeca4 10431 while (count-- > 0)
542d6675
KH		 10432 {
10433 mark_resource (idesc, dep, &specs[count],
10434 DEP (opdeps->regs[i]), md.path);
10435 }
800eeca4
JW		 10436
10437 /* The execution path may affect register values, which may in turn
542d6675 10438 affect which indirect-access resources are accessed. */
800eeca4 10439 switch (dep->specifier)
542d6675
KH		 10440 {
10441 default:
10442 break;
10443 case IA64_RS_CPUID:
10444 case IA64_RS_DBR:
10445 case IA64_RS_IBR:
800eeca4 10446 case IA64_RS_MSR:
542d6675
KH		 10447 case IA64_RS_PKR:
10448 case IA64_RS_PMC:
10449 case IA64_RS_PMD:
10450 case IA64_RS_RR:
10451 for (path = 0; path < md.path; path++)
10452 {
10453 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10454 while (count-- > 0)
10455 mark_resource (idesc, dep, &specs[count],
10456 DEP (opdeps->regs[i]), path);
10457 }
10458 break;
10459 }
10460 }
10461}
10462
10463/* Remove dependencies when they no longer apply. */
10464
800eeca4
JW		 10465static void
10466update_dependencies (idesc)
542d6675 10467 struct ia64_opcode *idesc;
800eeca4
JW		 10468{
10469 int i;
10470
10471 if (strcmp (idesc->name, "srlz.i") == 0)
10472 {
10473 instruction_serialization ();
10474 }
10475 else if (strcmp (idesc->name, "srlz.d") == 0)
10476 {
10477 data_serialization ();
10478 }
10479 else if (is_interruption_or_rfi (idesc)
542d6675 10480 || is_taken_branch (idesc))
800eeca4 10481 {
542d6675
KH		 10482 /* Although technically the taken branch doesn't clear dependencies
10483 which require a srlz.[id], we don't follow the branch; the next
10484 instruction is assumed to start with a clean slate. */
800eeca4 10485 regdepslen = 0;
800eeca4
JW		 10486 md.path = 0;
10487 }
10488 else if (is_conditional_branch (idesc)
542d6675 10489 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10490 {
10491 int is_call = strstr (idesc->name, ".call") != NULL;
10492
542d6675
KH		 10493 for (i = 0; i < qp_implieslen; i++)
10494 {
10495 /* If the conditional branch's predicate is implied by the predicate
10496 in an existing dependency, remove that dependency. */
10497 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10498 {
10499 int depind = 0;
10500 /* Note that this implied predicate takes a branch so that if
10501 a later insn generates a DV but its predicate implies this
10502 one, we can avoid the false DV warning. */
10503 qp_implies[i].p2_branched = 1;
10504 while (depind < regdepslen)
10505 {
10506 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10507 {
10508 print_dependency ("Removing", depind);
10509 regdeps[depind] = regdeps[--regdepslen];
10510 }
10511 else
10512 ++depind;
10513 }
10514 }
10515 }
800eeca4 10516 /* Any marked resources which have this same predicate should be
542d6675
KH		 10517 cleared, provided that the QP hasn't been modified between the
10518 marking instruction and the branch. */
800eeca4 10519 if (is_call)
542d6675
KH		 10520 {
10521 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10522 }
800eeca4 10523 else
542d6675
KH		 10524 {
10525 i = 0;
10526 while (i < regdepslen)
10527 {
10528 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10529 && regdeps[i].link_to_qp_branch
10530 && (regdeps[i].file != CURR_SLOT.src_file
10531 || regdeps[i].line != CURR_SLOT.src_line))
10532 {
10533 /* Treat like a taken branch */
10534 print_dependency ("Removing", i);
10535 regdeps[i] = regdeps[--regdepslen];
10536 }
10537 else
10538 ++i;
10539 }
10540 }
800eeca4
JW		 10541 }
10542}
10543
10544/* Examine the current instruction for dependency violations. */
542d6675 10545
800eeca4
JW		 10546static int
10547check_dv (idesc)
542d6675 10548 struct ia64_opcode *idesc;
800eeca4
JW		 10549{
10550 if (md.debug_dv)
10551 {
197865e8 10552 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10553 idesc->name, CURR_SLOT.src_line,
10554 idesc->dependencies->nchks,
10555 idesc->dependencies->nregs);
800eeca4
JW		 10556 }
10557
197865e8 10558 /* Look through the list of currently marked resources; if the current
800eeca4 10559 instruction has the dependency in its chks list which uses that resource,
542d6675 10560 check against the specific resources used. */
800eeca4
JW		 10561 check_dependencies (idesc);
10562
542d6675
KH		 10563 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10564 then add them to the list of marked resources. */
800eeca4
JW		 10565 mark_resources (idesc);
10566
10567 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10568 requirements for being cleared
10569
800eeca4
JW		 10570 Instruction serialization (insns separated by interruption, rfi, or
10571 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10572
10573 Data serialization (instruction serialization, or writer + srlz.d +
10574 reader, where writer and srlz.d are in separate groups) clears
10575 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10576 always be the case).
10577
10578 Instruction group break (groups separated by stop, taken branch,
10579 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10580 */
10581 update_dependencies (idesc);
10582
10583 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10584 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10585 note_register_values (idesc);
10586
197865e8 10587 /* We don't need or want this anymore. */
800eeca4
JW		 10588 md.mem_offset.hint = 0;
10589
10590 return 0;
10591}
10592
10593/* Translate one line of assembly. Pseudo ops and labels do not show
10594 here. */
10595void
10596md_assemble (str)
10597 char *str;
10598{
10599 char *saved_input_line_pointer, *mnemonic;
10600 const struct pseudo_opcode *pdesc;
10601 struct ia64_opcode *idesc;
10602 unsigned char qp_regno;
10603 unsigned int flags;
10604 int ch;
10605
10606 saved_input_line_pointer = input_line_pointer;
10607 input_line_pointer = str;
10608
542d6675 10609 /* extract the opcode (mnemonic): */
800eeca4
JW		 10610
10611 mnemonic = input_line_pointer;
10612 ch = get_symbol_end ();
10613 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10614 if (pdesc)
10615 {
10616 *input_line_pointer = ch;
10617 (*pdesc->handler) (pdesc->arg);
10618 goto done;
10619 }
10620
542d6675 10621 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10622
10623 idesc = ia64_find_opcode (mnemonic);
10624 *input_line_pointer = ch;
10625 if (!idesc)
10626 {
10627 as_bad ("Unknown opcode `%s'", mnemonic);
10628 goto done;
10629 }
10630
10631 idesc = parse_operands (idesc);
10632 if (!idesc)
10633 goto done;
10634
542d6675 10635 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10636 if (idesc->type == IA64_TYPE_DYN)
10637 {
10638 if (strcmp (idesc->name, "add") == 0)
10639 {
10640 if (CURR_SLOT.opnd[2].X_op == O_register
10641 && CURR_SLOT.opnd[2].X_add_number < 4)
10642 mnemonic = "addl";
10643 else
10644 mnemonic = "adds";
3d56ab85 10645 ia64_free_opcode (idesc);
800eeca4 10646 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10647 }
10648 else if (strcmp (idesc->name, "mov") == 0)
10649 {
10650 enum ia64_opnd opnd1, opnd2;
10651 int rop;
10652
10653 opnd1 = idesc->operands[0];
10654 opnd2 = idesc->operands[1];
10655 if (opnd1 == IA64_OPND_AR3)
10656 rop = 0;
10657 else if (opnd2 == IA64_OPND_AR3)
10658 rop = 1;
10659 else
10660 abort ();
652ca075
L		 10661 if (CURR_SLOT.opnd[rop].X_op == O_register)
10662 {
10663 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10664 mnemonic = "mov.i";
97762d08 10665 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10666 mnemonic = "mov.m";
97762d08
JB		 10667 else
10668 rop = -1;
652ca075 10669 }
800eeca4 10670 else
652ca075 10671 abort ();
97762d08
JB		 10672 if (rop >= 0)
10673 {
10674 ia64_free_opcode (idesc);
10675 idesc = ia64_find_opcode (mnemonic);
10676 while (idesc != NULL
10677 && (idesc->operands[0] != opnd1
10678 || idesc->operands[1] != opnd2))
10679 idesc = get_next_opcode (idesc);
10680 }
800eeca4
JW		 10681 }
10682 }
652ca075
L		 10683 else if (strcmp (idesc->name, "mov.i") == 0
10684 || strcmp (idesc->name, "mov.m") == 0)
10685 {
10686 enum ia64_opnd opnd1, opnd2;
10687 int rop;
10688
10689 opnd1 = idesc->operands[0];
10690 opnd2 = idesc->operands[1];
10691 if (opnd1 == IA64_OPND_AR3)
10692 rop = 0;
10693 else if (opnd2 == IA64_OPND_AR3)
10694 rop = 1;
10695 else
10696 abort ();
10697 if (CURR_SLOT.opnd[rop].X_op == O_register)
10698 {
10699 char unit = 'a';
10700 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10701 unit = 'i';
10702 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10703 unit = 'm';
10704 if (unit != 'a' && unit != idesc->name [4])
80b8152b 10705 as_bad ("AR %d can only be accessed by %c-unit",
652ca075
L		 10706 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10707 TOUPPER (unit));
10708 }
10709 }
91d777ee
L		 10710 else if (strcmp (idesc->name, "hint.b") == 0)
10711 {
10712 switch (md.hint_b)
10713 {
10714 case hint_b_ok:
10715 break;
10716 case hint_b_warning:
10717 as_warn ("hint.b may be treated as nop");
10718 break;
10719 case hint_b_error:
10720 as_bad ("hint.b shouldn't be used");
10721 break;
10722 }
10723 }
800eeca4
JW		 10724
10725 qp_regno = 0;
10726 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10727 {
10728 qp_regno = md.qp.X_add_number - REG_P;
10729 md.qp.X_op = O_absent;
10730 }
800eeca4
JW		 10731
10732 flags = idesc->flags;
10733
10734 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10735 {
10736 /* The alignment frag has to end with a stop bit only if the
10737 next instruction after the alignment directive has to be
10738 the first instruction in an instruction group. */
10739 if (align_frag)
10740 {
10741 while (align_frag->fr_type != rs_align_code)
10742 {
10743 align_frag = align_frag->fr_next;
bae25f19
L		 10744 if (!align_frag)
10745 break;
9545c4ce 10746 }
bae25f19
L		 10747 /* align_frag can be NULL if there are directives in
10748 between. */
10749 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10750 align_frag->tc_frag_data = 1;
10751 }
10752
10753 insn_group_break (1, 0, 0);
10754 }
10755 align_frag = NULL;
800eeca4
JW		 10756
10757 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10758 {
10759 as_bad ("`%s' cannot be predicated", idesc->name);
10760 goto done;
10761 }
10762
542d6675 10763 /* Build the instruction. */
800eeca4
JW		 10764 CURR_SLOT.qp_regno = qp_regno;
10765 CURR_SLOT.idesc = idesc;
10766 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10767 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4
JW		 10768
10769 /* Add unwind entry, if there is one. */
e0c9811a 10770 if (unwind.current_entry)
800eeca4 10771 {
e0c9811a
JW		 10772 CURR_SLOT.unwind_record = unwind.current_entry;
10773 unwind.current_entry = NULL;
800eeca4 10774 }
75e09913
JB		 10775 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10776 unwind.insn = 1;
800eeca4 10777
542d6675 10778 /* Check for dependency violations. */
800eeca4 10779 if (md.detect_dv)
542d6675 10780 check_dv (idesc);
800eeca4
JW		 10781
10782 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10783 if (++md.num_slots_in_use >= NUM_SLOTS)
10784 emit_one_bundle ();
10785
10786 if ((flags & IA64_OPCODE_LAST) != 0)
10787 insn_group_break (1, 0, 0);
10788
10789 md.last_text_seg = now_seg;
10790
10791 done:
10792 input_line_pointer = saved_input_line_pointer;
10793}
10794
10795/* Called when symbol NAME cannot be found in the symbol table.
10796 Should be used for dynamic valued symbols only. */
542d6675
KH		 10797
10798symbolS *
800eeca4 10799md_undefined_symbol (name)
2434f565 10800 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10801{
10802 return 0;
10803}
10804
10805/* Called for any expression that can not be recognized. When the
10806 function is called, `input_line_pointer' will point to the start of
10807 the expression. */
542d6675 10808
800eeca4
JW		 10809void
10810md_operand (e)
10811 expressionS *e;
10812{
800eeca4
JW		 10813 switch (*input_line_pointer)
10814 {
800eeca4
JW		 10815 case '[':
10816 ++input_line_pointer;
10817 expression (e);
10818 if (*input_line_pointer != ']')
10819 {
16a48f83 10820 as_bad ("Closing bracket missing");
800eeca4
JW		 10821 goto err;
10822 }
10823 else
10824 {
10825 if (e->X_op != O_register)
10826 as_bad ("Register expected as index");
10827
10828 ++input_line_pointer;
10829 e->X_op = O_index;
10830 }
10831 break;
10832
10833 default:
10834 break;
10835 }
10836 return;
10837
10838 err:
10839 ignore_rest_of_line ();
10840}
10841
10842/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10843 a section symbol plus some offset. For relocs involving @fptr(),
10844 directives we don't want such adjustments since we need to have the
10845 original symbol's name in the reloc. */
10846int
10847ia64_fix_adjustable (fix)
10848 fixS *fix;
10849{
10850 /* Prevent all adjustments to global symbols */
e97b3f28 10851 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
800eeca4
JW		 10852 return 0;
10853
10854 switch (fix->fx_r_type)
10855 {
10856 case BFD_RELOC_IA64_FPTR64I:
10857 case BFD_RELOC_IA64_FPTR32MSB:
10858 case BFD_RELOC_IA64_FPTR32LSB:
10859 case BFD_RELOC_IA64_FPTR64MSB:
10860 case BFD_RELOC_IA64_FPTR64LSB:
10861 case BFD_RELOC_IA64_LTOFF_FPTR22:
10862 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10863 return 0;
10864 default:
10865 break;
10866 }
10867
10868 return 1;
10869}
10870
10871int
10872ia64_force_relocation (fix)
10873 fixS *fix;
10874{
10875 switch (fix->fx_r_type)
10876 {
10877 case BFD_RELOC_IA64_FPTR64I:
10878 case BFD_RELOC_IA64_FPTR32MSB:
10879 case BFD_RELOC_IA64_FPTR32LSB:
10880 case BFD_RELOC_IA64_FPTR64MSB:
10881 case BFD_RELOC_IA64_FPTR64LSB:
10882
10883 case BFD_RELOC_IA64_LTOFF22:
10884 case BFD_RELOC_IA64_LTOFF64I:
10885 case BFD_RELOC_IA64_LTOFF_FPTR22:
10886 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10887 case BFD_RELOC_IA64_PLTOFF22:
10888 case BFD_RELOC_IA64_PLTOFF64I:
10889 case BFD_RELOC_IA64_PLTOFF64MSB:
10890 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 10891
10892 case BFD_RELOC_IA64_LTOFF22X:
10893 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 10894 return 1;
10895
10896 default:
a161fe53 10897 break;
800eeca4 10898 }
a161fe53 10899
ae6063d4 10900 return generic_force_reloc (fix);
800eeca4
JW		 10901}
10902
10903/* Decide from what point a pc-relative relocation is relative to,
10904 relative to the pc-relative fixup. Er, relatively speaking. */
10905long
10906ia64_pcrel_from_section (fix, sec)
10907 fixS *fix;
10908 segT sec;
10909{
10910 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 10911
800eeca4
JW		 10912 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10913 off &= ~0xfUL;
10914
10915 return off;
10916}
10917
6174d9c8
RH		 10918
10919/* Used to emit section-relative relocs for the dwarf2 debug data. */
10920void
10921ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10922{
10923 expressionS expr;
10924
10925 expr.X_op = O_pseudo_fixup;
10926 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10927 expr.X_add_number = 0;
10928 expr.X_add_symbol = symbol;
10929 emit_expr (&expr, size);
10930}
10931
800eeca4
JW		 10932/* This is called whenever some data item (not an instruction) needs a
10933 fixup. We pick the right reloc code depending on the byteorder
10934 currently in effect. */
10935void
10936ia64_cons_fix_new (f, where, nbytes, exp)
10937 fragS *f;
10938 int where;
10939 int nbytes;
10940 expressionS *exp;
10941{
10942 bfd_reloc_code_real_type code;
10943 fixS *fix;
10944
10945 switch (nbytes)
10946 {
10947 /* There are no reloc for 8 and 16 bit quantities, but we allow
10948 them here since they will work fine as long as the expression
10949 is fully defined at the end of the pass over the source file. */
10950 case 1: code = BFD_RELOC_8; break;
10951 case 2: code = BFD_RELOC_16; break;
10952 case 4:
10953 if (target_big_endian)
10954 code = BFD_RELOC_IA64_DIR32MSB;
10955 else
10956 code = BFD_RELOC_IA64_DIR32LSB;
10957 break;
10958
10959 case 8:
40449e9f 10960 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 10961 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 10962 && exp->X_op_symbol
10963 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10964 && !(md.flags & EF_IA_64_ABI64))
10965 {
10966 if (target_big_endian)
10967 code = BFD_RELOC_IA64_IPLTMSB;
10968 else
10969 code = BFD_RELOC_IA64_IPLTLSB;
10970 exp->X_op = O_symbol;
10971 break;
10972 }
10973 else
10974 {
10975 if (target_big_endian)
10976 code = BFD_RELOC_IA64_DIR64MSB;
10977 else
10978 code = BFD_RELOC_IA64_DIR64LSB;
10979 break;
10980 }
800eeca4 10981
3969b680
RH		 10982 case 16:
10983 if (exp->X_op == O_pseudo_fixup
10984 && exp->X_op_symbol
10985 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10986 {
10987 if (target_big_endian)
10988 code = BFD_RELOC_IA64_IPLTMSB;
10989 else
10990 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 10991 exp->X_op = O_symbol;
10992 break;
10993 }
10994 /* FALLTHRU */
10995
800eeca4
JW		 10996 default:
10997 as_bad ("Unsupported fixup size %d", nbytes);
10998 ignore_rest_of_line ();
10999 return;
11000 }
6174d9c8 11001
800eeca4
JW		 11002 if (exp->X_op == O_pseudo_fixup)
11003 {
800eeca4
JW		 11004 exp->X_op = O_symbol;
11005 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 11006 /* ??? If code unchanged, unsupported. */
800eeca4 11007 }
3969b680 11008
800eeca4
JW		 11009 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11010 /* We need to store the byte order in effect in case we're going
11011 to fix an 8 or 16 bit relocation (for which there no real
94f592af 11012 relocs available). See md_apply_fix3(). */
800eeca4
JW		 11013 fix->tc_fix_data.bigendian = target_big_endian;
11014}
11015
11016/* Return the actual relocation we wish to associate with the pseudo
11017 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 11018 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 11019
11020static bfd_reloc_code_real_type
11021ia64_gen_real_reloc_type (sym, r_type)
11022 struct symbol *sym;
11023 bfd_reloc_code_real_type r_type;
11024{
11025 bfd_reloc_code_real_type new = 0;
0ca3e455 11026 const char *type = NULL, *suffix = "";
800eeca4
JW		 11027
11028 if (sym == NULL)
11029 {
11030 return r_type;
11031 }
11032
11033 switch (S_GET_VALUE (sym))
11034 {
11035 case FUNC_FPTR_RELATIVE:
11036 switch (r_type)
11037 {
11038 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11039 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11040 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11041 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11042 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 11043 default: type = "FPTR"; break;
800eeca4
JW		 11044 }
11045 break;
11046
11047 case FUNC_GP_RELATIVE:
11048 switch (r_type)
11049 {
11050 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11051 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11052 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11053 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11054 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11055 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 11056 default: type = "GPREL"; break;
800eeca4
JW		 11057 }
11058 break;
11059
11060 case FUNC_LT_RELATIVE:
11061 switch (r_type)
11062 {
11063 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11064 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11065 default: type = "LTOFF"; break;
800eeca4
JW		 11066 }
11067 break;
11068
fa2c7eff
RH		 11069 case FUNC_LT_RELATIVE_X:
11070 switch (r_type)
11071 {
11072 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11073 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11074 }
11075 break;
11076
c67e42c9
RH		 11077 case FUNC_PC_RELATIVE:
11078 switch (r_type)
11079 {
11080 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11081 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11082 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11083 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11084 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11085 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11086 default: type = "PCREL"; break;
c67e42c9
RH		 11087 }
11088 break;
11089
800eeca4
JW		 11090 case FUNC_PLT_RELATIVE:
11091 switch (r_type)
11092 {
11093 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11094 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11095 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11096 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11097 default: type = "PLTOFF"; break;
800eeca4
JW		 11098 }
11099 break;
11100
11101 case FUNC_SEC_RELATIVE:
11102 switch (r_type)
11103 {
11104 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11105 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11106 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11107 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11108 default: type = "SECREL"; break;
800eeca4
JW		 11109 }
11110 break;
11111
11112 case FUNC_SEG_RELATIVE:
11113 switch (r_type)
11114 {
11115 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11116 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11117 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11118 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11119 default: type = "SEGREL"; break;
800eeca4
JW		 11120 }
11121 break;
11122
11123 case FUNC_LTV_RELATIVE:
11124 switch (r_type)
11125 {
11126 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11127 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11128 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11129 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11130 default: type = "LTV"; break;
800eeca4
JW		 11131 }
11132 break;
11133
11134 case FUNC_LT_FPTR_RELATIVE:
11135 switch (r_type)
11136 {
11137 case BFD_RELOC_IA64_IMM22:
11138 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11139 case BFD_RELOC_IA64_IMM64:
11140 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11141 case BFD_RELOC_IA64_DIR32MSB:
11142 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11143 case BFD_RELOC_IA64_DIR32LSB:
11144 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11145 case BFD_RELOC_IA64_DIR64MSB:
11146 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11147 case BFD_RELOC_IA64_DIR64LSB:
11148 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11149 default:
0ca3e455 11150 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11151 }
11152 break;
3969b680 11153
13ae64f3
JJ		 11154 case FUNC_TP_RELATIVE:
11155 switch (r_type)
11156 {
0ca3e455
JB		 11157 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11158 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11159 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11160 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11161 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11162 default: type = "TPREL"; break;
13ae64f3
JJ		 11163 }
11164 break;
11165
11166 case FUNC_LT_TP_RELATIVE:
11167 switch (r_type)
11168 {
11169 case BFD_RELOC_IA64_IMM22:
11170 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11171 default:
0ca3e455
JB		 11172 type = "LTOFF_TPREL"; break;
11173 }
11174 break;
11175
11176 case FUNC_DTP_MODULE:
11177 switch (r_type)
11178 {
11179 case BFD_RELOC_IA64_DIR64MSB:
11180 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11181 case BFD_RELOC_IA64_DIR64LSB:
11182 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11183 default:
11184 type = "DTPMOD"; break;
13ae64f3
JJ		 11185 }
11186 break;
11187
11188 case FUNC_LT_DTP_MODULE:
11189 switch (r_type)
11190 {
11191 case BFD_RELOC_IA64_IMM22:
11192 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11193 default:
0ca3e455 11194 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11195 }
11196 break;
11197
11198 case FUNC_DTP_RELATIVE:
11199 switch (r_type)
11200 {
0ca3e455
JB		 11201 case BFD_RELOC_IA64_DIR32MSB:
11202 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11203 case BFD_RELOC_IA64_DIR32LSB:
11204 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11205 case BFD_RELOC_IA64_DIR64MSB:
11206 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11207 case BFD_RELOC_IA64_DIR64LSB:
11208 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11209 case BFD_RELOC_IA64_IMM14:
11210 new = BFD_RELOC_IA64_DTPREL14; break;
11211 case BFD_RELOC_IA64_IMM22:
11212 new = BFD_RELOC_IA64_DTPREL22; break;
11213 case BFD_RELOC_IA64_IMM64:
11214 new = BFD_RELOC_IA64_DTPREL64I; break;
11215 default:
0ca3e455 11216 type = "DTPREL"; break;
13ae64f3
JJ		 11217 }
11218 break;
11219
11220 case FUNC_LT_DTP_RELATIVE:
11221 switch (r_type)
11222 {
11223 case BFD_RELOC_IA64_IMM22:
11224 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11225 default:
0ca3e455 11226 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11227 }
11228 break;
11229
40449e9f 11230 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11231 switch (r_type)
11232 {
11233 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11234 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11235 default: type = "IPLT"; break;
11236 }
40449e9f 11237 break;
1cd8ff38 11238
800eeca4
JW		 11239 default:
11240 abort ();
11241 }
6174d9c8 11242
800eeca4
JW		 11243 if (new)
11244 return new;
11245 else
0ca3e455
JB		 11246 {
11247 int width;
11248
11249 if (!type)
11250 abort ();
11251 switch (r_type)
11252 {
11253 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11254 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11255 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11256 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
11257 case BFD_RELOC_IA64_IMM14: width = 14; break;
11258 case BFD_RELOC_IA64_IMM22: width = 22; break;
11259 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11260 default: abort ();
11261 }
11262
11263 /* This should be an error, but since previously there wasn't any
11264 diagnostic here, dont't make it fail because of this for now. */
11265 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11266 return r_type;
11267 }
800eeca4
JW		 11268}
11269
11270/* Here is where generate the appropriate reloc for pseudo relocation
11271 functions. */
11272void
11273ia64_validate_fix (fix)
11274 fixS *fix;
11275{
11276 switch (fix->fx_r_type)
11277 {
11278 case BFD_RELOC_IA64_FPTR64I:
11279 case BFD_RELOC_IA64_FPTR32MSB:
11280 case BFD_RELOC_IA64_FPTR64LSB:
11281 case BFD_RELOC_IA64_LTOFF_FPTR22:
11282 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11283 if (fix->fx_offset != 0)
11284 as_bad_where (fix->fx_file, fix->fx_line,
11285 "No addend allowed in @fptr() relocation");
11286 break;
11287 default:
11288 break;
11289 }
800eeca4
JW		 11290}
11291
11292static void
11293fix_insn (fix, odesc, value)
11294 fixS *fix;
11295 const struct ia64_operand *odesc;
11296 valueT value;
11297{
11298 bfd_vma insn[3], t0, t1, control_bits;
11299 const char *err;
11300 char *fixpos;
11301 long slot;
11302
11303 slot = fix->fx_where & 0x3;
11304 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11305
c67e42c9 11306 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11307 t0 = bfd_getl64 (fixpos);
11308 t1 = bfd_getl64 (fixpos + 8);
11309 control_bits = t0 & 0x1f;
11310 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11311 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11312 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11313
c67e42c9
RH		 11314 err = NULL;
11315 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11316 {
c67e42c9
RH		 11317 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11318 insn[2] |= (((value & 0x7f) << 13)
11319 | (((value >> 7) & 0x1ff) << 27)
11320 | (((value >> 16) & 0x1f) << 22)
11321 | (((value >> 21) & 0x1) << 21)
11322 | (((value >> 63) & 0x1) << 36));
800eeca4 11323 }
c67e42c9
RH		 11324 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11325 {
11326 if (value & ~0x3fffffffffffffffULL)
11327 err = "integer operand out of range";
11328 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11329 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11330 }
11331 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11332 {
11333 value >>= 4;
11334 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11335 insn[2] |= ((((value >> 59) & 0x1) << 36)
11336 | (((value >> 0) & 0xfffff) << 13));
11337 }
11338 else
11339 err = (*odesc->insert) (odesc, value, insn + slot);
11340
11341 if (err)
11342 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11343
11344 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11345 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11346 number_to_chars_littleendian (fixpos + 0, t0, 8);
11347 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11348}
11349
11350/* Attempt to simplify or even eliminate a fixup. The return value is
11351 ignored; perhaps it was once meaningful, but now it is historical.
11352 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11353
11354 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11355 (if possible). */
94f592af
NC		 11356
11357void
11358md_apply_fix3 (fix, valP, seg)
800eeca4 11359 fixS *fix;
40449e9f 11360 valueT *valP;
2434f565 11361 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11362{
11363 char *fixpos;
40449e9f 11364 valueT value = *valP;
800eeca4
JW		 11365
11366 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11367
11368 if (fix->fx_pcrel)
11369 {
7b347e43
JB		 11370 switch (fix->fx_r_type)
11371 {
11372 case BFD_RELOC_IA64_PCREL21B: break;
11373 case BFD_RELOC_IA64_PCREL21BI: break;
11374 case BFD_RELOC_IA64_PCREL21F: break;
11375 case BFD_RELOC_IA64_PCREL21M: break;
11376 case BFD_RELOC_IA64_PCREL60B: break;
11377 case BFD_RELOC_IA64_PCREL22: break;
11378 case BFD_RELOC_IA64_PCREL64I: break;
11379 case BFD_RELOC_IA64_PCREL32MSB: break;
11380 case BFD_RELOC_IA64_PCREL32LSB: break;
11381 case BFD_RELOC_IA64_PCREL64MSB: break;
11382 case BFD_RELOC_IA64_PCREL64LSB: break;
11383 default:
11384 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11385 fix->fx_r_type);
11386 break;
11387 }
800eeca4
JW		 11388 }
11389 if (fix->fx_addsy)
11390 {
00f7efb6 11391 switch (fix->fx_r_type)
800eeca4 11392 {
00f7efb6 11393 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11394 /* This must be a TAG13 or TAG13b operand. There are no external
11395 relocs defined for them, so we must give an error. */
800eeca4
JW		 11396 as_bad_where (fix->fx_file, fix->fx_line,
11397 "%s must have a constant value",
11398 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11399 fix->fx_done = 1;
94f592af 11400 return;
00f7efb6
JJ		 11401
11402 case BFD_RELOC_IA64_TPREL14:
11403 case BFD_RELOC_IA64_TPREL22:
11404 case BFD_RELOC_IA64_TPREL64I:
11405 case BFD_RELOC_IA64_LTOFF_TPREL22:
11406 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11407 case BFD_RELOC_IA64_DTPREL14:
11408 case BFD_RELOC_IA64_DTPREL22:
11409 case BFD_RELOC_IA64_DTPREL64I:
11410 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11411 S_SET_THREAD_LOCAL (fix->fx_addsy);
11412 break;
7925dd68
JJ		 11413
11414 default:
11415 break;
800eeca4 11416 }
800eeca4
JW		 11417 }
11418 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11419 {
11420 if (fix->tc_fix_data.bigendian)
11421 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11422 else
11423 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11424 fix->fx_done = 1;
800eeca4
JW		 11425 }
11426 else
11427 {
11428 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11429 fix->fx_done = 1;
800eeca4 11430 }
800eeca4
JW		 11431}
11432
11433/* Generate the BFD reloc to be stuck in the object file from the
11434 fixup used internally in the assembler. */
542d6675
KH		 11435
11436arelent *
800eeca4 11437tc_gen_reloc (sec, fixp)
2434f565 11438 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11439 fixS *fixp;
11440{
11441 arelent *reloc;
11442
11443 reloc = xmalloc (sizeof (*reloc));
11444 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11445 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11446 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11447 reloc->addend = fixp->fx_offset;
11448 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11449
11450 if (!reloc->howto)
11451 {
11452 as_bad_where (fixp->fx_file, fixp->fx_line,
11453 "Cannot represent %s relocation in object file",
11454 bfd_get_reloc_code_name (fixp->fx_r_type));
11455 }
11456 return reloc;
11457}
11458
11459/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11460 of type TYPE, and store the appropriate bytes in *LIT. The number
11461 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11462 returned, or NULL on OK. */
11463
11464#define MAX_LITTLENUMS 5
11465
542d6675 11466char *
800eeca4
JW		 11467md_atof (type, lit, size)
11468 int type;
11469 char *lit;
11470 int *size;
11471{
11472 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11473 char *t;
11474 int prec;
11475
11476 switch (type)
11477 {
11478 /* IEEE floats */
11479 case 'f':
11480 case 'F':
11481 case 's':
11482 case 'S':
11483 prec = 2;
11484 break;
11485
11486 case 'd':
11487 case 'D':
11488 case 'r':
11489 case 'R':
11490 prec = 4;
11491 break;
11492
11493 case 'x':
11494 case 'X':
11495 case 'p':
11496 case 'P':
11497 prec = 5;
11498 break;
11499
11500 default:
11501 *size = 0;
11502 return "Bad call to MD_ATOF()";
11503 }
11504 t = atof_ieee (input_line_pointer, type, words);
11505 if (t)
11506 input_line_pointer = t;
800eeca4 11507
10a98291
L		 11508 (*ia64_float_to_chars) (lit, words, prec);
11509
165a7f90
L		 11510 if (type == 'X')
11511 {
11512 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11513 memset (&lit [10], 0, 6);
165a7f90
L		 11514 *size = 8 * sizeof (LITTLENUM_TYPE);
11515 }
10a98291
L		 11516 else
11517 *size = prec * sizeof (LITTLENUM_TYPE);
11518
800eeca4
JW		 11519 return 0;
11520}
11521
800eeca4
JW		 11522/* Handle ia64 specific semantics of the align directive. */
11523
0a9ef439 11524void
800eeca4 11525ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11526 int n ATTRIBUTE_UNUSED;
11527 const char *fill ATTRIBUTE_UNUSED;
2434f565 11528 int len ATTRIBUTE_UNUSED;
91a2ae2a 11529 int max ATTRIBUTE_UNUSED;
800eeca4 11530{
0a9ef439 11531 if (subseg_text_p (now_seg))
800eeca4 11532 ia64_flush_insns ();
0a9ef439 11533}
800eeca4 11534
0a9ef439
RH		 11535/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11536 of an rs_align_code fragment. */
800eeca4 11537
0a9ef439
RH		 11538void
11539ia64_handle_align (fragp)
11540 fragS *fragp;
11541{
0a9ef439
RH		 11542 int bytes;
11543 char *p;
9545c4ce 11544 const unsigned char *nop;
0a9ef439
RH		 11545
11546 if (fragp->fr_type != rs_align_code)
11547 return;
11548
9545c4ce
L		 11549 /* Check if this frag has to end with a stop bit. */
11550 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11551
0a9ef439
RH		 11552 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11553 p = fragp->fr_literal + fragp->fr_fix;
11554
d9201763
L		 11555 /* If no paddings are needed, we check if we need a stop bit. */
11556 if (!bytes && fragp->tc_frag_data)
11557 {
11558 if (fragp->fr_fix < 16)
bae25f19
L		 11559#if 1
11560 /* FIXME: It won't work with
11561 .align 16
11562 alloc r32=ar.pfs,1,2,4,0
11563 */
11564 ;
11565#else
d9201763
L		 11566 as_bad_where (fragp->fr_file, fragp->fr_line,
11567 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11568#endif
d9201763
L		 11569 else
11570 /* Bundles are always in little-endian byte order. Make sure
11571 the previous bundle has the stop bit. */
11572 *(p - 16) |= 1;
11573 }
11574
0a9ef439
RH		 11575 /* Make sure we are on a 16-byte boundary, in case someone has been
11576 putting data into a text section. */
11577 if (bytes & 15)
11578 {
11579 int fix = bytes & 15;
11580 memset (p, 0, fix);
11581 p += fix;
11582 bytes -= fix;
11583 fragp->fr_fix += fix;
800eeca4
JW		 11584 }
11585
012a452b 11586 /* Instruction bundles are always little-endian. */
9545c4ce 11587 memcpy (p, nop, 16);
0a9ef439 11588 fragp->fr_var = 16;
800eeca4 11589}
10a98291
L		 11590
11591static void
11592ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11593 int prec)
11594{
11595 while (prec--)
11596 {
11597 number_to_chars_bigendian (lit, (long) (*words++),
11598 sizeof (LITTLENUM_TYPE));
11599 lit += sizeof (LITTLENUM_TYPE);
11600 }
11601}
11602
11603static void
11604ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11605 int prec)
11606{
11607 while (prec--)
11608 {
11609 number_to_chars_littleendian (lit, (long) (words[prec]),
11610 sizeof (LITTLENUM_TYPE));
11611 lit += sizeof (LITTLENUM_TYPE);
11612 }
11613}
11614
11615void
11616ia64_elf_section_change_hook (void)
11617{
38ce5b11
L		 11618 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11619 && elf_linked_to_section (now_seg) == NULL)
11620 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11621 dot_byteorder (-1);
11622}
a645d1eb
L		 11623
11624/* Check if a label should be made global. */
11625void
11626ia64_check_label (symbolS *label)
11627{
11628 if (*input_line_pointer == ':')
11629 {
11630 S_SET_EXTERNAL (label);
11631 input_line_pointer++;
11632 }
11633}
35f5df7f
L		 11634
11635/* Used to remember where .alias and .secalias directives are seen. We
11636 will rename symbol and section names when we are about to output
11637 the relocatable file. */
11638struct alias
11639{
11640 char *file; /* The file where the directive is seen. */
11641 unsigned int line; /* The line number the directive is at. */
11642 const char *name; /* The orignale name of the symbol. */
11643};
11644
11645/* Called for .alias and .secalias directives. If SECTION is 1, it is
11646 .secalias. Otherwise, it is .alias. */
11647static void
11648dot_alias (int section)
11649{
11650 char *name, *alias;
11651 char delim;
11652 char *end_name;
11653 int len;
11654 const char *error_string;
11655 struct alias *h;
11656 const char *a;
11657 struct hash_control *ahash, *nhash;
11658 const char *kind;
11659
11660 name = input_line_pointer;
11661 delim = get_symbol_end ();
11662 end_name = input_line_pointer;
11663 *end_name = delim;
11664
11665 if (name == end_name)
11666 {
11667 as_bad (_("expected symbol name"));
11668 discard_rest_of_line ();
11669 return;
11670 }
11671
11672 SKIP_WHITESPACE ();
11673
11674 if (*input_line_pointer != ',')
11675 {
11676 *end_name = 0;
11677 as_bad (_("expected comma after \"%s\""), name);
11678 *end_name = delim;
11679 ignore_rest_of_line ();
11680 return;
11681 }
11682
11683 input_line_pointer++;
11684 *end_name = 0;
20b36a95 11685 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11686
11687 /* We call demand_copy_C_string to check if alias string is valid.
11688 There should be a closing `"' and no `\0' in the string. */
11689 alias = demand_copy_C_string (&len);
11690 if (alias == NULL)
11691 {
11692 ignore_rest_of_line ();
11693 return;
11694 }
11695
11696 /* Make a copy of name string. */
11697 len = strlen (name) + 1;
11698 obstack_grow (&notes, name, len);
11699 name = obstack_finish (&notes);
11700
11701 if (section)
11702 {
11703 kind = "section";
11704 ahash = secalias_hash;
11705 nhash = secalias_name_hash;
11706 }
11707 else
11708 {
11709 kind = "symbol";
11710 ahash = alias_hash;
11711 nhash = alias_name_hash;
11712 }
11713
11714 /* Check if alias has been used before. */
11715 h = (struct alias *) hash_find (ahash, alias);
11716 if (h)
11717 {
11718 if (strcmp (h->name, name))
11719 as_bad (_("`%s' is already the alias of %s `%s'"),
11720 alias, kind, h->name);
11721 goto out;
11722 }
11723
11724 /* Check if name already has an alias. */
11725 a = (const char *) hash_find (nhash, name);
11726 if (a)
11727 {
11728 if (strcmp (a, alias))
11729 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11730 goto out;
11731 }
11732
11733 h = (struct alias *) xmalloc (sizeof (struct alias));
11734 as_where (&h->file, &h->line);
11735 h->name = name;
11736
11737 error_string = hash_jam (ahash, alias, (PTR) h);
11738 if (error_string)
11739 {
11740 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11741 alias, kind, error_string);
11742 goto out;
11743 }
11744
11745 error_string = hash_jam (nhash, name, (PTR) alias);
11746 if (error_string)
11747 {
11748 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11749 alias, kind, error_string);
11750out:
11751 obstack_free (&notes, name);
11752 obstack_free (&notes, alias);
11753 }
11754
11755 demand_empty_rest_of_line ();
11756}
11757
11758/* It renames the original symbol name to its alias. */
11759static void
11760do_alias (const char *alias, PTR value)
11761{
11762 struct alias *h = (struct alias *) value;
11763 symbolS *sym = symbol_find (h->name);
11764
11765 if (sym == NULL)
11766 as_warn_where (h->file, h->line,
11767 _("symbol `%s' aliased to `%s' is not used"),
11768 h->name, alias);
11769 else
11770 S_SET_NAME (sym, (char *) alias);
11771}
11772
11773/* Called from write_object_file. */
11774void
11775ia64_adjust_symtab (void)
11776{
11777 hash_traverse (alias_hash, do_alias);
11778}
11779
11780/* It renames the original section name to its alias. */
11781static void
11782do_secalias (const char *alias, PTR value)
11783{
11784 struct alias *h = (struct alias *) value;
11785 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11786
11787 if (sec == NULL)
11788 as_warn_where (h->file, h->line,
11789 _("section `%s' aliased to `%s' is not used"),
11790 h->name, alias);
11791 else
11792 sec->name = alias;
11793}
11794
11795/* Called from write_object_file. */
11796void
11797ia64_frob_file (void)
11798{
11799 hash_traverse (secalias_hash, do_secalias);
11800}
GDB Binutils - Deliverables
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