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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
b3dfd7fe | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
800eeca4 JW |
3 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | /* | |
23 | TODO: | |
24 | ||
25 | - optional operands | |
26 | - directives: | |
800eeca4 JW |
27 | .eb |
28 | .estate | |
29 | .lb | |
30 | .popsection | |
31 | .previous | |
32 | .psr | |
33 | .pushsection | |
800eeca4 JW |
34 | - labels are wrong if automatic alignment is introduced |
35 | (e.g., checkout the second real10 definition in test-data.s) | |
36 | - DV-related stuff: | |
542d6675 KH |
37 | <reg>.safe_across_calls and any other DV-related directives I don't |
38 | have documentation for. | |
39 | verify mod-sched-brs reads/writes are checked/marked (and other | |
40 | notes) | |
800eeca4 JW |
41 | |
42 | */ | |
43 | ||
44 | #include "as.h" | |
3882b010 | 45 | #include "safe-ctype.h" |
800eeca4 JW |
46 | #include "dwarf2dbg.h" |
47 | #include "subsegs.h" | |
48 | ||
49 | #include "opcode/ia64.h" | |
50 | ||
51 | #include "elf/ia64.h" | |
52 | ||
53 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) | |
54 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) | |
55 | ||
56 | #define NUM_SLOTS 4 | |
57 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
58 | #define CURR_SLOT md.slot[md.curr_slot] | |
59 | ||
60 | #define O_pseudo_fixup (O_max + 1) | |
61 | ||
62 | enum special_section | |
63 | { | |
557debba | 64 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
65 | SPECIAL_SECTION_BSS = 0, |
66 | SPECIAL_SECTION_SBSS, | |
67 | SPECIAL_SECTION_SDATA, | |
68 | SPECIAL_SECTION_RODATA, | |
69 | SPECIAL_SECTION_COMMENT, | |
70 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
71 | SPECIAL_SECTION_UNWIND_INFO, |
72 | /* HPUX specific section pseudo-ops. */ | |
73 | SPECIAL_SECTION_INIT_ARRAY, | |
74 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
75 | }; |
76 | ||
77 | enum reloc_func | |
78 | { | |
13ae64f3 JJ |
79 | FUNC_DTP_MODULE, |
80 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
81 | FUNC_FPTR_RELATIVE, |
82 | FUNC_GP_RELATIVE, | |
83 | FUNC_LT_RELATIVE, | |
fa2c7eff | 84 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 85 | FUNC_PC_RELATIVE, |
800eeca4 JW |
86 | FUNC_PLT_RELATIVE, |
87 | FUNC_SEC_RELATIVE, | |
88 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 89 | FUNC_TP_RELATIVE, |
800eeca4 JW |
90 | FUNC_LTV_RELATIVE, |
91 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
92 | FUNC_LT_DTP_MODULE, |
93 | FUNC_LT_DTP_RELATIVE, | |
94 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 95 | FUNC_IPLT_RELOC, |
800eeca4 JW |
96 | }; |
97 | ||
98 | enum reg_symbol | |
99 | { | |
100 | REG_GR = 0, | |
101 | REG_FR = (REG_GR + 128), | |
102 | REG_AR = (REG_FR + 128), | |
103 | REG_CR = (REG_AR + 128), | |
104 | REG_P = (REG_CR + 128), | |
105 | REG_BR = (REG_P + 64), | |
106 | REG_IP = (REG_BR + 8), | |
107 | REG_CFM, | |
108 | REG_PR, | |
109 | REG_PR_ROT, | |
110 | REG_PSR, | |
111 | REG_PSR_L, | |
112 | REG_PSR_UM, | |
113 | /* The following are pseudo-registers for use by gas only. */ | |
114 | IND_CPUID, | |
115 | IND_DBR, | |
116 | IND_DTR, | |
117 | IND_ITR, | |
118 | IND_IBR, | |
119 | IND_MEM, | |
120 | IND_MSR, | |
121 | IND_PKR, | |
122 | IND_PMC, | |
123 | IND_PMD, | |
124 | IND_RR, | |
542d6675 | 125 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
126 | REG_PSP, |
127 | REG_PRIUNAT, | |
800eeca4 JW |
128 | REG_NUM |
129 | }; | |
130 | ||
131 | enum dynreg_type | |
132 | { | |
133 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
134 | DYNREG_FR, /* dynamic floating point register */ | |
135 | DYNREG_PR, /* dynamic predicate register */ | |
136 | DYNREG_NUM_TYPES | |
137 | }; | |
138 | ||
87f8eb97 JW |
139 | enum operand_match_result |
140 | { | |
141 | OPERAND_MATCH, | |
142 | OPERAND_OUT_OF_RANGE, | |
143 | OPERAND_MISMATCH | |
144 | }; | |
145 | ||
800eeca4 JW |
146 | /* On the ia64, we can't know the address of a text label until the |
147 | instructions are packed into a bundle. To handle this, we keep | |
148 | track of the list of labels that appear in front of each | |
149 | instruction. */ | |
150 | struct label_fix | |
542d6675 KH |
151 | { |
152 | struct label_fix *next; | |
153 | struct symbol *sym; | |
154 | }; | |
800eeca4 JW |
155 | |
156 | extern int target_big_endian; | |
157 | ||
10a98291 L |
158 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
159 | ||
160 | static void ia64_float_to_chars_bigendian | |
161 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
162 | static void ia64_float_to_chars_littleendian | |
163 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
164 | static void (*ia64_float_to_chars) | |
165 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
166 | ||
35f5df7f L |
167 | static struct hash_control *alias_hash; |
168 | static struct hash_control *alias_name_hash; | |
169 | static struct hash_control *secalias_hash; | |
170 | static struct hash_control *secalias_name_hash; | |
171 | ||
800eeca4 JW |
172 | /* Characters which always start a comment. */ |
173 | const char comment_chars[] = ""; | |
174 | ||
175 | /* Characters which start a comment at the beginning of a line. */ | |
176 | const char line_comment_chars[] = "#"; | |
177 | ||
178 | /* Characters which may be used to separate multiple commands on a | |
179 | single line. */ | |
180 | const char line_separator_chars[] = ";"; | |
181 | ||
182 | /* Characters which are used to indicate an exponent in a floating | |
183 | point number. */ | |
184 | const char EXP_CHARS[] = "eE"; | |
185 | ||
186 | /* Characters which mean that a number is a floating point constant, | |
187 | as in 0d1.0. */ | |
188 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
189 | ||
542d6675 | 190 | /* ia64-specific option processing: */ |
800eeca4 | 191 | |
44f5c83a | 192 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
193 | |
194 | struct option md_longopts[] = | |
195 | { | |
c43c2cc5 JW |
196 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
197 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
198 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
199 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
200 | }; |
201 | ||
202 | size_t md_longopts_size = sizeof (md_longopts); | |
203 | ||
204 | static struct | |
205 | { | |
206 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
207 | struct hash_control *reg_hash; /* register name hash table */ | |
208 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
209 | struct hash_control *const_hash; /* constant hash table */ | |
210 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
211 | ||
212 | symbolS *regsym[REG_NUM]; | |
213 | ||
214 | /* If X_op is != O_absent, the registername for the instruction's | |
215 | qualifying predicate. If NULL, p0 is assumed for instructions | |
216 | that are predicatable. */ | |
217 | expressionS qp; | |
218 | ||
219 | unsigned int | |
197865e8 | 220 | manual_bundling : 1, |
800eeca4 JW |
221 | debug_dv: 1, |
222 | detect_dv: 1, | |
223 | explicit_mode : 1, /* which mode we're in */ | |
224 | default_explicit_mode : 1, /* which mode is the default */ | |
225 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
226 | auto_align : 1, |
227 | keep_pending_output : 1; | |
800eeca4 JW |
228 | |
229 | /* Each bundle consists of up to three instructions. We keep | |
230 | track of four most recent instructions so we can correctly set | |
197865e8 | 231 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
232 | int curr_slot; |
233 | int num_slots_in_use; | |
234 | struct slot | |
235 | { | |
236 | unsigned int | |
237 | end_of_insn_group : 1, | |
238 | manual_bundling_on : 1, | |
239 | manual_bundling_off : 1; | |
240 | signed char user_template; /* user-selected template, if any */ | |
241 | unsigned char qp_regno; /* qualifying predicate */ | |
242 | /* This duplicates a good fraction of "struct fix" but we | |
243 | can't use a "struct fix" instead since we can't call | |
244 | fix_new_exp() until we know the address of the instruction. */ | |
245 | int num_fixups; | |
246 | struct insn_fix | |
247 | { | |
248 | bfd_reloc_code_real_type code; | |
249 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
250 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
251 | expressionS expr; /* the value to be inserted */ | |
252 | } | |
253 | fixup[2]; /* at most two fixups per insn */ | |
254 | struct ia64_opcode *idesc; | |
255 | struct label_fix *label_fixups; | |
f1bcba5b | 256 | struct label_fix *tag_fixups; |
800eeca4 JW |
257 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
258 | expressionS opnd[6]; | |
259 | char *src_file; | |
260 | unsigned int src_line; | |
261 | struct dwarf2_line_info debug_line; | |
262 | } | |
263 | slot[NUM_SLOTS]; | |
264 | ||
265 | segT last_text_seg; | |
266 | ||
267 | struct dynreg | |
268 | { | |
269 | struct dynreg *next; /* next dynamic register */ | |
270 | const char *name; | |
271 | unsigned short base; /* the base register number */ | |
272 | unsigned short num_regs; /* # of registers in this set */ | |
273 | } | |
274 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
275 | ||
276 | flagword flags; /* ELF-header flags */ | |
277 | ||
278 | struct mem_offset { | |
279 | unsigned hint:1; /* is this hint currently valid? */ | |
280 | bfd_vma offset; /* mem.offset offset */ | |
281 | bfd_vma base; /* mem.offset base */ | |
282 | } mem_offset; | |
283 | ||
284 | int path; /* number of alt. entry points seen */ | |
285 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 286 | the current DV-checking block. */ |
800eeca4 | 287 | int maxpaths; /* size currently allocated for |
542d6675 | 288 | entry_labels */ |
88be23ec BS |
289 | /* Support for hardware errata workarounds. */ |
290 | ||
291 | /* Record data about the last three insn groups. */ | |
292 | struct group | |
293 | { | |
294 | /* B-step workaround. | |
295 | For each predicate register, this is set if the corresponding insn | |
296 | group conditionally sets this register with one of the affected | |
297 | instructions. */ | |
298 | int p_reg_set[64]; | |
299 | /* B-step workaround. | |
300 | For each general register, this is set if the corresponding insn | |
301 | a) is conditional one one of the predicate registers for which | |
302 | P_REG_SET is 1 in the corresponding entry of the previous group, | |
303 | b) sets this general register with one of the affected | |
304 | instructions. */ | |
305 | int g_reg_set_conditionally[128]; | |
306 | } last_groups[3]; | |
307 | int group_idx; | |
557debba JW |
308 | |
309 | int pointer_size; /* size in bytes of a pointer */ | |
310 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
311 | } |
312 | md; | |
313 | ||
542d6675 | 314 | /* application registers: */ |
800eeca4 | 315 | |
e0c9811a JW |
316 | #define AR_K0 0 |
317 | #define AR_K7 7 | |
318 | #define AR_RSC 16 | |
319 | #define AR_BSP 17 | |
320 | #define AR_BSPSTORE 18 | |
321 | #define AR_RNAT 19 | |
322 | #define AR_UNAT 36 | |
323 | #define AR_FPSR 40 | |
324 | #define AR_ITC 44 | |
325 | #define AR_PFS 64 | |
326 | #define AR_LC 65 | |
800eeca4 JW |
327 | |
328 | static const struct | |
329 | { | |
330 | const char *name; | |
331 | int regnum; | |
332 | } | |
333 | ar[] = | |
334 | { | |
335 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
336 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
337 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
338 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
339 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
340 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
341 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
342 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
343 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
344 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
345 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 346 | {"ar.ec", 66}, |
800eeca4 JW |
347 | }; |
348 | ||
349 | #define CR_IPSR 16 | |
350 | #define CR_ISR 17 | |
351 | #define CR_IIP 19 | |
352 | #define CR_IFA 20 | |
353 | #define CR_ITIR 21 | |
354 | #define CR_IIPA 22 | |
355 | #define CR_IFS 23 | |
356 | #define CR_IIM 24 | |
357 | #define CR_IHA 25 | |
358 | #define CR_IVR 65 | |
359 | #define CR_TPR 66 | |
360 | #define CR_EOI 67 | |
361 | #define CR_IRR0 68 | |
362 | #define CR_IRR3 71 | |
363 | #define CR_LRR0 80 | |
364 | #define CR_LRR1 81 | |
365 | ||
542d6675 | 366 | /* control registers: */ |
800eeca4 JW |
367 | static const struct |
368 | { | |
369 | const char *name; | |
370 | int regnum; | |
371 | } | |
372 | cr[] = | |
373 | { | |
374 | {"cr.dcr", 0}, | |
375 | {"cr.itm", 1}, | |
376 | {"cr.iva", 2}, | |
377 | {"cr.pta", 8}, | |
378 | {"cr.gpta", 9}, | |
379 | {"cr.ipsr", 16}, | |
380 | {"cr.isr", 17}, | |
381 | {"cr.iip", 19}, | |
382 | {"cr.ifa", 20}, | |
383 | {"cr.itir", 21}, | |
384 | {"cr.iipa", 22}, | |
385 | {"cr.ifs", 23}, | |
386 | {"cr.iim", 24}, | |
387 | {"cr.iha", 25}, | |
388 | {"cr.lid", 64}, | |
389 | {"cr.ivr", 65}, | |
390 | {"cr.tpr", 66}, | |
391 | {"cr.eoi", 67}, | |
392 | {"cr.irr0", 68}, | |
393 | {"cr.irr1", 69}, | |
394 | {"cr.irr2", 70}, | |
395 | {"cr.irr3", 71}, | |
396 | {"cr.itv", 72}, | |
397 | {"cr.pmv", 73}, | |
398 | {"cr.cmcv", 74}, | |
399 | {"cr.lrr0", 80}, | |
400 | {"cr.lrr1", 81} | |
401 | }; | |
402 | ||
403 | #define PSR_MFL 4 | |
404 | #define PSR_IC 13 | |
405 | #define PSR_DFL 18 | |
406 | #define PSR_CPL 32 | |
407 | ||
408 | static const struct const_desc | |
409 | { | |
410 | const char *name; | |
411 | valueT value; | |
412 | } | |
413 | const_bits[] = | |
414 | { | |
542d6675 | 415 | /* PSR constant masks: */ |
800eeca4 JW |
416 | |
417 | /* 0: reserved */ | |
418 | {"psr.be", ((valueT) 1) << 1}, | |
419 | {"psr.up", ((valueT) 1) << 2}, | |
420 | {"psr.ac", ((valueT) 1) << 3}, | |
421 | {"psr.mfl", ((valueT) 1) << 4}, | |
422 | {"psr.mfh", ((valueT) 1) << 5}, | |
423 | /* 6-12: reserved */ | |
424 | {"psr.ic", ((valueT) 1) << 13}, | |
425 | {"psr.i", ((valueT) 1) << 14}, | |
426 | {"psr.pk", ((valueT) 1) << 15}, | |
427 | /* 16: reserved */ | |
428 | {"psr.dt", ((valueT) 1) << 17}, | |
429 | {"psr.dfl", ((valueT) 1) << 18}, | |
430 | {"psr.dfh", ((valueT) 1) << 19}, | |
431 | {"psr.sp", ((valueT) 1) << 20}, | |
432 | {"psr.pp", ((valueT) 1) << 21}, | |
433 | {"psr.di", ((valueT) 1) << 22}, | |
434 | {"psr.si", ((valueT) 1) << 23}, | |
435 | {"psr.db", ((valueT) 1) << 24}, | |
436 | {"psr.lp", ((valueT) 1) << 25}, | |
437 | {"psr.tb", ((valueT) 1) << 26}, | |
438 | {"psr.rt", ((valueT) 1) << 27}, | |
439 | /* 28-31: reserved */ | |
440 | /* 32-33: cpl (current privilege level) */ | |
441 | {"psr.is", ((valueT) 1) << 34}, | |
442 | {"psr.mc", ((valueT) 1) << 35}, | |
443 | {"psr.it", ((valueT) 1) << 36}, | |
444 | {"psr.id", ((valueT) 1) << 37}, | |
445 | {"psr.da", ((valueT) 1) << 38}, | |
446 | {"psr.dd", ((valueT) 1) << 39}, | |
447 | {"psr.ss", ((valueT) 1) << 40}, | |
448 | /* 41-42: ri (restart instruction) */ | |
449 | {"psr.ed", ((valueT) 1) << 43}, | |
450 | {"psr.bn", ((valueT) 1) << 44}, | |
451 | }; | |
452 | ||
542d6675 | 453 | /* indirect register-sets/memory: */ |
800eeca4 JW |
454 | |
455 | static const struct | |
456 | { | |
457 | const char *name; | |
458 | int regnum; | |
459 | } | |
460 | indirect_reg[] = | |
461 | { | |
462 | { "CPUID", IND_CPUID }, | |
463 | { "cpuid", IND_CPUID }, | |
464 | { "dbr", IND_DBR }, | |
465 | { "dtr", IND_DTR }, | |
466 | { "itr", IND_ITR }, | |
467 | { "ibr", IND_IBR }, | |
468 | { "msr", IND_MSR }, | |
469 | { "pkr", IND_PKR }, | |
470 | { "pmc", IND_PMC }, | |
471 | { "pmd", IND_PMD }, | |
472 | { "rr", IND_RR }, | |
473 | }; | |
474 | ||
475 | /* Pseudo functions used to indicate relocation types (these functions | |
476 | start with an at sign (@). */ | |
477 | static struct | |
478 | { | |
479 | const char *name; | |
480 | enum pseudo_type | |
481 | { | |
482 | PSEUDO_FUNC_NONE, | |
483 | PSEUDO_FUNC_RELOC, | |
484 | PSEUDO_FUNC_CONST, | |
e0c9811a | 485 | PSEUDO_FUNC_REG, |
800eeca4 JW |
486 | PSEUDO_FUNC_FLOAT |
487 | } | |
488 | type; | |
489 | union | |
490 | { | |
491 | unsigned long ival; | |
492 | symbolS *sym; | |
493 | } | |
494 | u; | |
495 | } | |
496 | pseudo_func[] = | |
497 | { | |
542d6675 | 498 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
499 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
500 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
501 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
502 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
503 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 504 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
505 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
506 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
507 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
508 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 509 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
510 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
511 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ | |
13ae64f3 JJ |
512 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ |
513 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
514 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 515 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 516 | |
542d6675 | 517 | /* mbtype4 constants: */ |
800eeca4 JW |
518 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
519 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
520 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
521 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
522 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
523 | ||
542d6675 | 524 | /* fclass constants: */ |
bf3ca999 | 525 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
526 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
527 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
528 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
529 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
530 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
531 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
532 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
533 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
534 | |
535 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 536 | |
c10d9d8f JW |
537 | /* hint constants: */ |
538 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
539 | ||
542d6675 | 540 | /* unwind-related constants: */ |
041340ad JW |
541 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
542 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
543 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
544 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
545 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
546 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
547 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 548 | |
542d6675 | 549 | /* unwind-related registers: */ |
e0c9811a | 550 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
551 | }; |
552 | ||
542d6675 | 553 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
554 | static const bfd_vma nop[IA64_NUM_UNITS] = |
555 | { | |
556 | 0x0000000000LL, /* NIL => break 0 */ | |
557 | 0x0008000000LL, /* I-unit nop */ | |
558 | 0x0008000000LL, /* M-unit nop */ | |
559 | 0x4000000000LL, /* B-unit nop */ | |
560 | 0x0008000000LL, /* F-unit nop */ | |
561 | 0x0008000000LL, /* L-"unit" nop */ | |
562 | 0x0008000000LL, /* X-unit nop */ | |
563 | }; | |
564 | ||
565 | /* Can't be `const' as it's passed to input routines (which have the | |
566 | habit of setting temporary sentinels. */ | |
567 | static char special_section_name[][20] = | |
568 | { | |
569 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
570 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
571 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
572 | }; |
573 | ||
579f31ac JJ |
574 | static char *special_linkonce_name[] = |
575 | { | |
576 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
577 | }; | |
578 | ||
800eeca4 JW |
579 | /* The best template for a particular sequence of up to three |
580 | instructions: */ | |
581 | #define N IA64_NUM_TYPES | |
582 | static unsigned char best_template[N][N][N]; | |
583 | #undef N | |
584 | ||
585 | /* Resource dependencies currently in effect */ | |
586 | static struct rsrc { | |
587 | int depind; /* dependency index */ | |
588 | const struct ia64_dependency *dependency; /* actual dependency */ | |
589 | unsigned specific:1, /* is this a specific bit/regno? */ | |
590 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
591 | int index; /* specific regno/bit within dependency */ | |
592 | int note; /* optional qualifying note (0 if none) */ | |
593 | #define STATE_NONE 0 | |
594 | #define STATE_STOP 1 | |
595 | #define STATE_SRLZ 2 | |
596 | int insn_srlz; /* current insn serialization state */ | |
597 | int data_srlz; /* current data serialization state */ | |
598 | int qp_regno; /* qualifying predicate for this usage */ | |
599 | char *file; /* what file marked this dependency */ | |
2434f565 | 600 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 601 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 602 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
603 | int path; /* corresponding code entry index */ |
604 | } *regdeps = NULL; | |
605 | static int regdepslen = 0; | |
606 | static int regdepstotlen = 0; | |
607 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
608 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 609 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 610 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
611 | |
612 | /* Current state of PR mutexation */ | |
613 | static struct qpmutex { | |
614 | valueT prmask; | |
615 | int path; | |
616 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
617 | static int qp_mutexeslen = 0; | |
618 | static int qp_mutexestotlen = 0; | |
197865e8 | 619 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
620 | |
621 | /* Current state of PR implications */ | |
622 | static struct qp_imply { | |
623 | unsigned p1:6; | |
624 | unsigned p2:6; | |
625 | unsigned p2_branched:1; | |
626 | int path; | |
627 | } *qp_implies = NULL; | |
628 | static int qp_implieslen = 0; | |
629 | static int qp_impliestotlen = 0; | |
630 | ||
197865e8 KH |
631 | /* Keep track of static GR values so that indirect register usage can |
632 | sometimes be tracked. */ | |
800eeca4 JW |
633 | static struct gr { |
634 | unsigned known:1; | |
635 | int path; | |
636 | valueT value; | |
2434f565 | 637 | } gr_values[128] = {{ 1, 0, 0 }}; |
800eeca4 JW |
638 | |
639 | /* These are the routines required to output the various types of | |
640 | unwind records. */ | |
641 | ||
f5a30c2e JW |
642 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
643 | frag address here so that if there is a section switch in the middle of | |
644 | a function, then instructions emitted to a different section are not | |
645 | counted. Since there may be more than one frag for a function, this | |
646 | means we also need to keep track of which frag this address belongs to | |
647 | so we can compute inter-frag distances. This also nicely solves the | |
648 | problem with nops emitted for align directives, which can't easily be | |
649 | counted, but can easily be derived from frag sizes. */ | |
650 | ||
800eeca4 JW |
651 | typedef struct unw_rec_list { |
652 | unwind_record r; | |
e0c9811a | 653 | unsigned long slot_number; |
f5a30c2e | 654 | fragS *slot_frag; |
73f20958 L |
655 | unsigned long next_slot_number; |
656 | fragS *next_slot_frag; | |
800eeca4 JW |
657 | struct unw_rec_list *next; |
658 | } unw_rec_list; | |
659 | ||
2434f565 | 660 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 661 | |
6290819d NC |
662 | /* Linked list of saved prologue counts. A very poor |
663 | implementation of a map from label numbers to prologue counts. */ | |
664 | typedef struct label_prologue_count | |
665 | { | |
666 | struct label_prologue_count *next; | |
667 | unsigned long label_number; | |
668 | unsigned int prologue_count; | |
669 | } label_prologue_count; | |
670 | ||
e0c9811a JW |
671 | static struct |
672 | { | |
e0c9811a JW |
673 | /* Maintain a list of unwind entries for the current function. */ |
674 | unw_rec_list *list; | |
675 | unw_rec_list *tail; | |
800eeca4 | 676 | |
e0c9811a JW |
677 | /* Any unwind entires that should be attached to the current slot |
678 | that an insn is being constructed for. */ | |
679 | unw_rec_list *current_entry; | |
800eeca4 | 680 | |
e0c9811a JW |
681 | /* These are used to create the unwind table entry for this function. */ |
682 | symbolS *proc_start; | |
683 | symbolS *proc_end; | |
684 | symbolS *info; /* pointer to unwind info */ | |
685 | symbolS *personality_routine; | |
91a2ae2a RH |
686 | segT saved_text_seg; |
687 | subsegT saved_text_subseg; | |
688 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 689 | |
e0c9811a JW |
690 | /* TRUE if processing unwind directives in a prologue region. */ |
691 | int prologue; | |
30d25259 | 692 | int prologue_mask; |
33d01f33 | 693 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
694 | /* Prologue counts at previous .label_state directives. */ |
695 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 696 | } unwind; |
800eeca4 JW |
697 | |
698 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); | |
699 | ||
0234cb7c | 700 | /* Forward declarations: */ |
800eeca4 JW |
701 | static int ar_is_in_integer_unit PARAMS ((int regnum)); |
702 | static void set_section PARAMS ((char *name)); | |
703 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
704 | unsigned int, unsigned int)); | |
705 | static void dot_radix PARAMS ((int)); | |
706 | static void dot_special_section PARAMS ((int)); | |
707 | static void dot_proc PARAMS ((int)); | |
708 | static void dot_fframe PARAMS ((int)); | |
709 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
710 | static void dot_vframesp PARAMS ((int)); |
711 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
712 | static void dot_save PARAMS ((int)); |
713 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
714 | static void dot_restorereg PARAMS ((int)); |
715 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
716 | static void dot_handlerdata PARAMS ((int)); |
717 | static void dot_unwentry PARAMS ((int)); | |
718 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 719 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
720 | static void dot_saveg PARAMS ((int)); |
721 | static void dot_savef PARAMS ((int)); | |
722 | static void dot_saveb PARAMS ((int)); | |
723 | static void dot_savegf PARAMS ((int)); | |
724 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
725 | static void dot_spillreg PARAMS ((int)); |
726 | static void dot_spillmem PARAMS ((int)); | |
727 | static void dot_spillreg_p PARAMS ((int)); | |
728 | static void dot_spillmem_p PARAMS ((int)); | |
729 | static void dot_label_state PARAMS ((int)); | |
730 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
731 | static void dot_unwabi PARAMS ((int)); |
732 | static void dot_personality PARAMS ((int)); | |
733 | static void dot_body PARAMS ((int)); | |
734 | static void dot_prologue PARAMS ((int)); | |
735 | static void dot_endp PARAMS ((int)); | |
736 | static void dot_template PARAMS ((int)); | |
737 | static void dot_regstk PARAMS ((int)); | |
738 | static void dot_rot PARAMS ((int)); | |
739 | static void dot_byteorder PARAMS ((int)); | |
740 | static void dot_psr PARAMS ((int)); | |
741 | static void dot_alias PARAMS ((int)); | |
742 | static void dot_ln PARAMS ((int)); | |
743 | static char *parse_section_name PARAMS ((void)); | |
744 | static void dot_xdata PARAMS ((int)); | |
745 | static void stmt_float_cons PARAMS ((int)); | |
746 | static void stmt_cons_ua PARAMS ((int)); | |
747 | static void dot_xfloat_cons PARAMS ((int)); | |
748 | static void dot_xstringer PARAMS ((int)); | |
749 | static void dot_xdata_ua PARAMS ((int)); | |
750 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 751 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
752 | static void dot_pred_rel PARAMS ((int)); |
753 | static void dot_reg_val PARAMS ((int)); | |
754 | static void dot_dv_mode PARAMS ((int)); | |
755 | static void dot_entry PARAMS ((int)); | |
756 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 757 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 758 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
759 | static void declare_register_set PARAMS ((const char *, int, int)); |
760 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
761 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
762 | int index, | |
763 | expressionS *e)); | |
800eeca4 JW |
764 | static int parse_operand PARAMS ((expressionS *e)); |
765 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
86cf98f3 | 766 | static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit)); |
800eeca4 JW |
767 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); |
768 | static void emit_one_bundle PARAMS ((void)); | |
769 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 770 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
771 | bfd_reloc_code_real_type r_type)); |
772 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
773 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
774 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
775 | static void add_qp_mutex PARAMS((valueT mask)); |
776 | static void add_qp_imply PARAMS((int p1, int p2)); | |
777 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
778 | static void clear_qp_mutex PARAMS((valueT mask)); | |
779 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 780 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
781 | static void clear_register_values PARAMS ((void)); |
782 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
783 | static void instruction_serialization PARAMS ((void)); |
784 | static void data_serialization PARAMS ((void)); | |
785 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 786 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 787 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 788 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
789 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
790 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
791 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
792 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
793 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
794 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
795 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
796 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
797 | static int qp_mutex PARAMS ((int, int, int)); |
798 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
799 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
800 | static void count_output PARAMS ((int, char *, char *)); | |
801 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
802 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 803 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
804 | static void output_P1_format PARAMS ((vbyte_func, int)); |
805 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
806 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
807 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
808 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
809 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
810 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
811 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
812 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
813 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
814 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
815 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
816 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
817 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
818 | static char format_ab_reg PARAMS ((int, int)); |
819 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
820 | unsigned long)); | |
821 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
822 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
823 | unsigned long)); | |
824 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
150f24a2 JW |
825 | static unw_rec_list *output_prologue PARAMS ((void)); |
826 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
827 | static unw_rec_list *output_body PARAMS ((void)); | |
828 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
829 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
830 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
831 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
832 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
833 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
834 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
835 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
836 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
837 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
838 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
839 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
840 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
841 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
842 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
843 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
844 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
845 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
846 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
847 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
848 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
849 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
850 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
851 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
852 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
853 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
854 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
855 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
856 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
857 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
858 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
859 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
860 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
861 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
862 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
863 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
864 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
865 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
866 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
867 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
868 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
869 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
870 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
871 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
872 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
873 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
874 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
875 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
876 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
877 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
878 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
879 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
881 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
882 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
883 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
884 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
885 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
886 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
887 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
888 | unsigned int)); | |
889 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
890 | unsigned int)); | |
891 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
892 | unsigned int)); | |
893 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
894 | unsigned int, unsigned int)); | |
895 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
896 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
897 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
898 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
899 | static int count_bits PARAMS ((unsigned long)); | |
f5a30c2e JW |
900 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
901 | unsigned long, fragS *)); | |
91a2ae2a | 902 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
150f24a2 | 903 | static void fixup_unw_records PARAMS ((unw_rec_list *)); |
150f24a2 JW |
904 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
905 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
73f20958 | 906 | static void generate_unwind_image PARAMS ((const char *)); |
6290819d NC |
907 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
908 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
909 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a RH |
910 | |
911 | /* Build the unwind section name by appending the (possibly stripped) | |
912 | text section NAME to the unwind PREFIX. The resulting string | |
913 | pointer is assigned to RESULT. The string is allocated on the | |
40449e9f | 914 | stack, so this must be a macro... */ |
91a2ae2a RH |
915 | #define make_unw_section_name(special, text_name, result) \ |
916 | { \ | |
86cf98f3 RH |
917 | const char *_prefix = special_section_name[special]; \ |
918 | const char *_suffix = text_name; \ | |
579f31ac JJ |
919 | size_t _prefix_len, _suffix_len; \ |
920 | char *_result; \ | |
921 | if (strncmp (text_name, ".gnu.linkonce.t.", \ | |
922 | sizeof (".gnu.linkonce.t.") - 1) == 0) \ | |
923 | { \ | |
924 | _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \ | |
925 | _suffix += sizeof (".gnu.linkonce.t.") - 1; \ | |
926 | } \ | |
927 | _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \ | |
928 | _result = alloca (_prefix_len + _suffix_len + 1); \ | |
07726851 KH |
929 | memcpy (_result, _prefix, _prefix_len); \ |
930 | memcpy (_result + _prefix_len, _suffix, _suffix_len); \ | |
579f31ac | 931 | _result[_prefix_len + _suffix_len] = '\0'; \ |
91a2ae2a RH |
932 | result = _result; \ |
933 | } \ | |
934 | while (0) | |
800eeca4 JW |
935 | |
936 | /* Determine if application register REGNUM resides in the integer | |
937 | unit (as opposed to the memory unit). */ | |
938 | static int | |
939 | ar_is_in_integer_unit (reg) | |
940 | int reg; | |
941 | { | |
942 | reg -= REG_AR; | |
943 | ||
944 | return (reg == 64 /* pfs */ | |
945 | || reg == 65 /* lc */ | |
946 | || reg == 66 /* ec */ | |
947 | /* ??? ias accepts and puts these in the integer unit. */ | |
948 | || (reg >= 112 && reg <= 127)); | |
949 | } | |
950 | ||
951 | /* Switch to section NAME and create section if necessary. It's | |
952 | rather ugly that we have to manipulate input_line_pointer but I | |
953 | don't see any other way to accomplish the same thing without | |
954 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
955 | static void | |
956 | set_section (name) | |
957 | char *name; | |
958 | { | |
959 | char *saved_input_line_pointer; | |
960 | ||
961 | saved_input_line_pointer = input_line_pointer; | |
962 | input_line_pointer = name; | |
963 | obj_elf_section (0); | |
964 | input_line_pointer = saved_input_line_pointer; | |
965 | } | |
966 | ||
d61a78a7 RH |
967 | /* Map 's' to SHF_IA_64_SHORT. */ |
968 | ||
969 | int | |
970 | ia64_elf_section_letter (letter, ptr_msg) | |
971 | int letter; | |
972 | char **ptr_msg; | |
973 | { | |
974 | if (letter == 's') | |
975 | return SHF_IA_64_SHORT; | |
711ef82f L |
976 | else if (letter == 'o') |
977 | return SHF_LINK_ORDER; | |
d61a78a7 | 978 | |
711ef82f L |
979 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
980 | return -1; | |
d61a78a7 RH |
981 | } |
982 | ||
800eeca4 JW |
983 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
984 | ||
985 | flagword | |
986 | ia64_elf_section_flags (flags, attr, type) | |
987 | flagword flags; | |
2434f565 | 988 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
989 | { |
990 | if (attr & SHF_IA_64_SHORT) | |
991 | flags |= SEC_SMALL_DATA; | |
992 | return flags; | |
993 | } | |
994 | ||
91a2ae2a RH |
995 | int |
996 | ia64_elf_section_type (str, len) | |
40449e9f KH |
997 | const char *str; |
998 | size_t len; | |
91a2ae2a | 999 | { |
1cd8ff38 | 1000 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1001 | |
1cd8ff38 | 1002 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1003 | return SHT_PROGBITS; |
1004 | ||
1cd8ff38 | 1005 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1006 | return SHT_PROGBITS; |
1007 | ||
1cd8ff38 | 1008 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1009 | return SHT_IA_64_UNWIND; |
1010 | ||
1cd8ff38 | 1011 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1012 | return SHT_IA_64_UNWIND; |
1013 | ||
711ef82f L |
1014 | if (STREQ ("unwind")) |
1015 | return SHT_IA_64_UNWIND; | |
1016 | ||
1cd8ff38 NC |
1017 | if (STREQ ("init_array")) |
1018 | return SHT_INIT_ARRAY; | |
40449e9f | 1019 | |
1cd8ff38 NC |
1020 | if (STREQ ("fini_array")) |
1021 | return SHT_FINI_ARRAY; | |
40449e9f | 1022 | |
91a2ae2a | 1023 | return -1; |
1cd8ff38 | 1024 | #undef STREQ |
91a2ae2a RH |
1025 | } |
1026 | ||
800eeca4 JW |
1027 | static unsigned int |
1028 | set_regstack (ins, locs, outs, rots) | |
1029 | unsigned int ins, locs, outs, rots; | |
1030 | { | |
542d6675 KH |
1031 | /* Size of frame. */ |
1032 | unsigned int sof; | |
800eeca4 JW |
1033 | |
1034 | sof = ins + locs + outs; | |
1035 | if (sof > 96) | |
1036 | { | |
1037 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1038 | return 0; | |
1039 | } | |
1040 | if (rots > sof) | |
1041 | { | |
1042 | as_warn ("Size of rotating registers exceeds frame size"); | |
1043 | return 0; | |
1044 | } | |
1045 | md.in.base = REG_GR + 32; | |
1046 | md.loc.base = md.in.base + ins; | |
1047 | md.out.base = md.loc.base + locs; | |
1048 | ||
1049 | md.in.num_regs = ins; | |
1050 | md.loc.num_regs = locs; | |
1051 | md.out.num_regs = outs; | |
1052 | md.rot.num_regs = rots; | |
1053 | return sof; | |
1054 | } | |
1055 | ||
1056 | void | |
1057 | ia64_flush_insns () | |
1058 | { | |
1059 | struct label_fix *lfix; | |
1060 | segT saved_seg; | |
1061 | subsegT saved_subseg; | |
b44b1b85 | 1062 | unw_rec_list *ptr; |
800eeca4 JW |
1063 | |
1064 | if (!md.last_text_seg) | |
1065 | return; | |
1066 | ||
1067 | saved_seg = now_seg; | |
1068 | saved_subseg = now_subseg; | |
1069 | ||
1070 | subseg_set (md.last_text_seg, 0); | |
1071 | ||
1072 | while (md.num_slots_in_use > 0) | |
1073 | emit_one_bundle (); /* force out queued instructions */ | |
1074 | ||
1075 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1076 | those now: */ |
800eeca4 JW |
1077 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1078 | { | |
1079 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1080 | symbol_set_frag (lfix->sym, frag_now); | |
1081 | } | |
1082 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1083 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1084 | { | |
1085 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1086 | symbol_set_frag (lfix->sym, frag_now); | |
1087 | } | |
1088 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1089 | |
b44b1b85 JW |
1090 | /* In case there are unwind directives following the last instruction, |
1091 | resolve those now. We only handle body and prologue directives here. | |
1092 | Give an error for others. */ | |
1093 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) | |
1094 | { | |
1095 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
1096 | || ptr->r.type == body) | |
1097 | { | |
1098 | ptr->slot_number = (unsigned long) frag_more (0); | |
1099 | ptr->slot_frag = frag_now; | |
1100 | } | |
1101 | else | |
1102 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1103 | } | |
1104 | unwind.current_entry = NULL; | |
1105 | ||
800eeca4 | 1106 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1107 | |
1108 | if (md.qp.X_op == O_register) | |
1109 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1110 | } |
1111 | ||
1112 | void | |
1113 | ia64_do_align (nbytes) | |
1114 | int nbytes; | |
1115 | { | |
1116 | char *saved_input_line_pointer = input_line_pointer; | |
1117 | ||
1118 | input_line_pointer = ""; | |
1119 | s_align_bytes (nbytes); | |
1120 | input_line_pointer = saved_input_line_pointer; | |
1121 | } | |
1122 | ||
1123 | void | |
1124 | ia64_cons_align (nbytes) | |
1125 | int nbytes; | |
1126 | { | |
1127 | if (md.auto_align) | |
1128 | { | |
1129 | char *saved_input_line_pointer = input_line_pointer; | |
1130 | input_line_pointer = ""; | |
1131 | s_align_bytes (nbytes); | |
1132 | input_line_pointer = saved_input_line_pointer; | |
1133 | } | |
1134 | } | |
1135 | ||
1136 | /* Output COUNT bytes to a memory location. */ | |
1137 | static unsigned char *vbyte_mem_ptr = NULL; | |
1138 | ||
197865e8 | 1139 | void |
800eeca4 JW |
1140 | output_vbyte_mem (count, ptr, comment) |
1141 | int count; | |
1142 | char *ptr; | |
2434f565 | 1143 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1144 | { |
1145 | int x; | |
1146 | if (vbyte_mem_ptr == NULL) | |
1147 | abort (); | |
1148 | ||
1149 | if (count == 0) | |
1150 | return; | |
1151 | for (x = 0; x < count; x++) | |
1152 | *(vbyte_mem_ptr++) = ptr[x]; | |
1153 | } | |
1154 | ||
1155 | /* Count the number of bytes required for records. */ | |
1156 | static int vbyte_count = 0; | |
197865e8 | 1157 | void |
800eeca4 JW |
1158 | count_output (count, ptr, comment) |
1159 | int count; | |
2434f565 JW |
1160 | char *ptr ATTRIBUTE_UNUSED; |
1161 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1162 | { |
1163 | vbyte_count += count; | |
1164 | } | |
1165 | ||
1166 | static void | |
1167 | output_R1_format (f, rtype, rlen) | |
1168 | vbyte_func f; | |
1169 | unw_record_type rtype; | |
1170 | int rlen; | |
1171 | { | |
e0c9811a | 1172 | int r = 0; |
800eeca4 JW |
1173 | char byte; |
1174 | if (rlen > 0x1f) | |
1175 | { | |
1176 | output_R3_format (f, rtype, rlen); | |
1177 | return; | |
1178 | } | |
197865e8 | 1179 | |
e0c9811a JW |
1180 | if (rtype == body) |
1181 | r = 1; | |
1182 | else if (rtype != prologue) | |
1183 | as_bad ("record type is not valid"); | |
1184 | ||
800eeca4 JW |
1185 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1186 | (*f) (1, &byte, NULL); | |
1187 | } | |
1188 | ||
1189 | static void | |
1190 | output_R2_format (f, mask, grsave, rlen) | |
1191 | vbyte_func f; | |
1192 | int mask, grsave; | |
1193 | unsigned long rlen; | |
1194 | { | |
1195 | char bytes[20]; | |
1196 | int count = 2; | |
1197 | mask = (mask & 0x0f); | |
1198 | grsave = (grsave & 0x7f); | |
1199 | ||
1200 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1201 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1202 | count += output_leb128 (bytes + 2, rlen, 0); | |
1203 | (*f) (count, bytes, NULL); | |
1204 | } | |
1205 | ||
1206 | static void | |
1207 | output_R3_format (f, rtype, rlen) | |
1208 | vbyte_func f; | |
1209 | unw_record_type rtype; | |
1210 | unsigned long rlen; | |
1211 | { | |
e0c9811a | 1212 | int r = 0, count; |
800eeca4 JW |
1213 | char bytes[20]; |
1214 | if (rlen <= 0x1f) | |
1215 | { | |
1216 | output_R1_format (f, rtype, rlen); | |
1217 | return; | |
1218 | } | |
197865e8 | 1219 | |
e0c9811a JW |
1220 | if (rtype == body) |
1221 | r = 1; | |
1222 | else if (rtype != prologue) | |
1223 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1224 | bytes[0] = (UNW_R3 | r); |
1225 | count = output_leb128 (bytes + 1, rlen, 0); | |
1226 | (*f) (count + 1, bytes, NULL); | |
1227 | } | |
1228 | ||
1229 | static void | |
1230 | output_P1_format (f, brmask) | |
1231 | vbyte_func f; | |
1232 | int brmask; | |
1233 | { | |
1234 | char byte; | |
1235 | byte = UNW_P1 | (brmask & 0x1f); | |
1236 | (*f) (1, &byte, NULL); | |
1237 | } | |
1238 | ||
1239 | static void | |
1240 | output_P2_format (f, brmask, gr) | |
1241 | vbyte_func f; | |
1242 | int brmask; | |
1243 | int gr; | |
1244 | { | |
1245 | char bytes[2]; | |
1246 | brmask = (brmask & 0x1f); | |
1247 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1248 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1249 | (*f) (2, bytes, NULL); | |
1250 | } | |
1251 | ||
1252 | static void | |
1253 | output_P3_format (f, rtype, reg) | |
1254 | vbyte_func f; | |
1255 | unw_record_type rtype; | |
1256 | int reg; | |
1257 | { | |
1258 | char bytes[2]; | |
e0c9811a | 1259 | int r = 0; |
800eeca4 JW |
1260 | reg = (reg & 0x7f); |
1261 | switch (rtype) | |
542d6675 | 1262 | { |
800eeca4 JW |
1263 | case psp_gr: |
1264 | r = 0; | |
1265 | break; | |
1266 | case rp_gr: | |
1267 | r = 1; | |
1268 | break; | |
1269 | case pfs_gr: | |
1270 | r = 2; | |
1271 | break; | |
1272 | case preds_gr: | |
1273 | r = 3; | |
1274 | break; | |
1275 | case unat_gr: | |
1276 | r = 4; | |
1277 | break; | |
1278 | case lc_gr: | |
1279 | r = 5; | |
1280 | break; | |
1281 | case rp_br: | |
1282 | r = 6; | |
1283 | break; | |
1284 | case rnat_gr: | |
1285 | r = 7; | |
1286 | break; | |
1287 | case bsp_gr: | |
1288 | r = 8; | |
1289 | break; | |
1290 | case bspstore_gr: | |
1291 | r = 9; | |
1292 | break; | |
1293 | case fpsr_gr: | |
1294 | r = 10; | |
1295 | break; | |
1296 | case priunat_gr: | |
1297 | r = 11; | |
1298 | break; | |
1299 | default: | |
1300 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1301 | } |
800eeca4 JW |
1302 | bytes[0] = (UNW_P3 | (r >> 1)); |
1303 | bytes[1] = (((r & 1) << 7) | reg); | |
1304 | (*f) (2, bytes, NULL); | |
1305 | } | |
1306 | ||
800eeca4 | 1307 | static void |
e0c9811a | 1308 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1309 | vbyte_func f; |
e0c9811a JW |
1310 | unsigned char *imask; |
1311 | unsigned long imask_size; | |
800eeca4 | 1312 | { |
e0c9811a JW |
1313 | imask[0] = UNW_P4; |
1314 | (*f) (imask_size, imask, NULL); | |
800eeca4 JW |
1315 | } |
1316 | ||
1317 | static void | |
1318 | output_P5_format (f, grmask, frmask) | |
1319 | vbyte_func f; | |
1320 | int grmask; | |
1321 | unsigned long frmask; | |
1322 | { | |
1323 | char bytes[4]; | |
1324 | grmask = (grmask & 0x0f); | |
1325 | ||
1326 | bytes[0] = UNW_P5; | |
1327 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1328 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1329 | bytes[3] = (frmask & 0x000000ff); | |
1330 | (*f) (4, bytes, NULL); | |
1331 | } | |
1332 | ||
1333 | static void | |
1334 | output_P6_format (f, rtype, rmask) | |
1335 | vbyte_func f; | |
1336 | unw_record_type rtype; | |
1337 | int rmask; | |
1338 | { | |
1339 | char byte; | |
e0c9811a | 1340 | int r = 0; |
197865e8 | 1341 | |
e0c9811a JW |
1342 | if (rtype == gr_mem) |
1343 | r = 1; | |
1344 | else if (rtype != fr_mem) | |
1345 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1346 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1347 | (*f) (1, &byte, NULL); | |
1348 | } | |
1349 | ||
1350 | static void | |
1351 | output_P7_format (f, rtype, w1, w2) | |
1352 | vbyte_func f; | |
1353 | unw_record_type rtype; | |
1354 | unsigned long w1; | |
1355 | unsigned long w2; | |
1356 | { | |
1357 | char bytes[20]; | |
1358 | int count = 1; | |
e0c9811a | 1359 | int r = 0; |
800eeca4 JW |
1360 | count += output_leb128 (bytes + 1, w1, 0); |
1361 | switch (rtype) | |
1362 | { | |
542d6675 KH |
1363 | case mem_stack_f: |
1364 | r = 0; | |
1365 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1366 | break; | |
1367 | case mem_stack_v: | |
1368 | r = 1; | |
1369 | break; | |
1370 | case spill_base: | |
1371 | r = 2; | |
1372 | break; | |
1373 | case psp_sprel: | |
1374 | r = 3; | |
1375 | break; | |
1376 | case rp_when: | |
1377 | r = 4; | |
1378 | break; | |
1379 | case rp_psprel: | |
1380 | r = 5; | |
1381 | break; | |
1382 | case pfs_when: | |
1383 | r = 6; | |
1384 | break; | |
1385 | case pfs_psprel: | |
1386 | r = 7; | |
1387 | break; | |
1388 | case preds_when: | |
1389 | r = 8; | |
1390 | break; | |
1391 | case preds_psprel: | |
1392 | r = 9; | |
1393 | break; | |
1394 | case lc_when: | |
1395 | r = 10; | |
1396 | break; | |
1397 | case lc_psprel: | |
1398 | r = 11; | |
1399 | break; | |
1400 | case unat_when: | |
1401 | r = 12; | |
1402 | break; | |
1403 | case unat_psprel: | |
1404 | r = 13; | |
1405 | break; | |
1406 | case fpsr_when: | |
1407 | r = 14; | |
1408 | break; | |
1409 | case fpsr_psprel: | |
1410 | r = 15; | |
1411 | break; | |
1412 | default: | |
1413 | break; | |
800eeca4 JW |
1414 | } |
1415 | bytes[0] = (UNW_P7 | r); | |
1416 | (*f) (count, bytes, NULL); | |
1417 | } | |
1418 | ||
1419 | static void | |
1420 | output_P8_format (f, rtype, t) | |
1421 | vbyte_func f; | |
1422 | unw_record_type rtype; | |
1423 | unsigned long t; | |
1424 | { | |
1425 | char bytes[20]; | |
e0c9811a | 1426 | int r = 0; |
800eeca4 JW |
1427 | int count = 2; |
1428 | bytes[0] = UNW_P8; | |
1429 | switch (rtype) | |
1430 | { | |
542d6675 KH |
1431 | case rp_sprel: |
1432 | r = 1; | |
1433 | break; | |
1434 | case pfs_sprel: | |
1435 | r = 2; | |
1436 | break; | |
1437 | case preds_sprel: | |
1438 | r = 3; | |
1439 | break; | |
1440 | case lc_sprel: | |
1441 | r = 4; | |
1442 | break; | |
1443 | case unat_sprel: | |
1444 | r = 5; | |
1445 | break; | |
1446 | case fpsr_sprel: | |
1447 | r = 6; | |
1448 | break; | |
1449 | case bsp_when: | |
1450 | r = 7; | |
1451 | break; | |
1452 | case bsp_psprel: | |
1453 | r = 8; | |
1454 | break; | |
1455 | case bsp_sprel: | |
1456 | r = 9; | |
1457 | break; | |
1458 | case bspstore_when: | |
1459 | r = 10; | |
1460 | break; | |
1461 | case bspstore_psprel: | |
1462 | r = 11; | |
1463 | break; | |
1464 | case bspstore_sprel: | |
1465 | r = 12; | |
1466 | break; | |
1467 | case rnat_when: | |
1468 | r = 13; | |
1469 | break; | |
1470 | case rnat_psprel: | |
1471 | r = 14; | |
1472 | break; | |
1473 | case rnat_sprel: | |
1474 | r = 15; | |
1475 | break; | |
1476 | case priunat_when_gr: | |
1477 | r = 16; | |
1478 | break; | |
1479 | case priunat_psprel: | |
1480 | r = 17; | |
1481 | break; | |
1482 | case priunat_sprel: | |
1483 | r = 18; | |
1484 | break; | |
1485 | case priunat_when_mem: | |
1486 | r = 19; | |
1487 | break; | |
1488 | default: | |
1489 | break; | |
800eeca4 JW |
1490 | } |
1491 | bytes[1] = r; | |
1492 | count += output_leb128 (bytes + 2, t, 0); | |
1493 | (*f) (count, bytes, NULL); | |
1494 | } | |
1495 | ||
1496 | static void | |
1497 | output_P9_format (f, grmask, gr) | |
1498 | vbyte_func f; | |
1499 | int grmask; | |
1500 | int gr; | |
1501 | { | |
1502 | char bytes[3]; | |
1503 | bytes[0] = UNW_P9; | |
1504 | bytes[1] = (grmask & 0x0f); | |
1505 | bytes[2] = (gr & 0x7f); | |
1506 | (*f) (3, bytes, NULL); | |
1507 | } | |
1508 | ||
1509 | static void | |
1510 | output_P10_format (f, abi, context) | |
1511 | vbyte_func f; | |
1512 | int abi; | |
1513 | int context; | |
1514 | { | |
1515 | char bytes[3]; | |
1516 | bytes[0] = UNW_P10; | |
1517 | bytes[1] = (abi & 0xff); | |
1518 | bytes[2] = (context & 0xff); | |
1519 | (*f) (3, bytes, NULL); | |
1520 | } | |
1521 | ||
1522 | static void | |
1523 | output_B1_format (f, rtype, label) | |
1524 | vbyte_func f; | |
1525 | unw_record_type rtype; | |
1526 | unsigned long label; | |
1527 | { | |
1528 | char byte; | |
e0c9811a | 1529 | int r = 0; |
197865e8 | 1530 | if (label > 0x1f) |
800eeca4 JW |
1531 | { |
1532 | output_B4_format (f, rtype, label); | |
1533 | return; | |
1534 | } | |
e0c9811a JW |
1535 | if (rtype == copy_state) |
1536 | r = 1; | |
1537 | else if (rtype != label_state) | |
1538 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1539 | |
1540 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1541 | (*f) (1, &byte, NULL); | |
1542 | } | |
1543 | ||
1544 | static void | |
1545 | output_B2_format (f, ecount, t) | |
1546 | vbyte_func f; | |
1547 | unsigned long ecount; | |
1548 | unsigned long t; | |
1549 | { | |
1550 | char bytes[20]; | |
1551 | int count = 1; | |
1552 | if (ecount > 0x1f) | |
1553 | { | |
1554 | output_B3_format (f, ecount, t); | |
1555 | return; | |
1556 | } | |
1557 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1558 | count += output_leb128 (bytes + 1, t, 0); | |
1559 | (*f) (count, bytes, NULL); | |
1560 | } | |
1561 | ||
1562 | static void | |
1563 | output_B3_format (f, ecount, t) | |
1564 | vbyte_func f; | |
1565 | unsigned long ecount; | |
1566 | unsigned long t; | |
1567 | { | |
1568 | char bytes[20]; | |
1569 | int count = 1; | |
1570 | if (ecount <= 0x1f) | |
1571 | { | |
1572 | output_B2_format (f, ecount, t); | |
1573 | return; | |
1574 | } | |
1575 | bytes[0] = UNW_B3; | |
1576 | count += output_leb128 (bytes + 1, t, 0); | |
1577 | count += output_leb128 (bytes + count, ecount, 0); | |
1578 | (*f) (count, bytes, NULL); | |
1579 | } | |
1580 | ||
1581 | static void | |
1582 | output_B4_format (f, rtype, label) | |
1583 | vbyte_func f; | |
1584 | unw_record_type rtype; | |
1585 | unsigned long label; | |
1586 | { | |
1587 | char bytes[20]; | |
e0c9811a | 1588 | int r = 0; |
800eeca4 | 1589 | int count = 1; |
197865e8 | 1590 | if (label <= 0x1f) |
800eeca4 JW |
1591 | { |
1592 | output_B1_format (f, rtype, label); | |
1593 | return; | |
1594 | } | |
197865e8 | 1595 | |
e0c9811a JW |
1596 | if (rtype == copy_state) |
1597 | r = 1; | |
1598 | else if (rtype != label_state) | |
1599 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1600 | |
1601 | bytes[0] = (UNW_B4 | (r << 3)); | |
1602 | count += output_leb128 (bytes + 1, label, 0); | |
1603 | (*f) (count, bytes, NULL); | |
1604 | } | |
1605 | ||
1606 | static char | |
e0c9811a | 1607 | format_ab_reg (ab, reg) |
542d6675 KH |
1608 | int ab; |
1609 | int reg; | |
800eeca4 JW |
1610 | { |
1611 | int ret; | |
e0c9811a | 1612 | ab = (ab & 3); |
800eeca4 | 1613 | reg = (reg & 0x1f); |
e0c9811a | 1614 | ret = (ab << 5) | reg; |
800eeca4 JW |
1615 | return ret; |
1616 | } | |
1617 | ||
1618 | static void | |
e0c9811a | 1619 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1620 | vbyte_func f; |
1621 | unw_record_type rtype; | |
e0c9811a | 1622 | int ab, reg; |
800eeca4 JW |
1623 | unsigned long t; |
1624 | unsigned long w1; | |
1625 | { | |
1626 | char bytes[20]; | |
e0c9811a | 1627 | int r = 0; |
800eeca4 JW |
1628 | int count = 2; |
1629 | bytes[0] = UNW_X1; | |
197865e8 | 1630 | |
e0c9811a JW |
1631 | if (rtype == spill_sprel) |
1632 | r = 1; | |
1633 | else if (rtype != spill_psprel) | |
1634 | as_bad ("Invalid record type for format X1"); | |
1635 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1636 | count += output_leb128 (bytes + 2, t, 0); |
1637 | count += output_leb128 (bytes + count, w1, 0); | |
1638 | (*f) (count, bytes, NULL); | |
1639 | } | |
1640 | ||
1641 | static void | |
e0c9811a | 1642 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1643 | vbyte_func f; |
e0c9811a | 1644 | int ab, reg; |
800eeca4 JW |
1645 | int x, y, treg; |
1646 | unsigned long t; | |
1647 | { | |
1648 | char bytes[20]; | |
800eeca4 JW |
1649 | int count = 3; |
1650 | bytes[0] = UNW_X2; | |
e0c9811a | 1651 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1652 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1653 | count += output_leb128 (bytes + 3, t, 0); | |
1654 | (*f) (count, bytes, NULL); | |
1655 | } | |
1656 | ||
1657 | static void | |
e0c9811a | 1658 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1659 | vbyte_func f; |
1660 | unw_record_type rtype; | |
1661 | int qp; | |
e0c9811a | 1662 | int ab, reg; |
800eeca4 JW |
1663 | unsigned long t; |
1664 | unsigned long w1; | |
1665 | { | |
1666 | char bytes[20]; | |
e0c9811a | 1667 | int r = 0; |
800eeca4 | 1668 | int count = 3; |
e0c9811a JW |
1669 | bytes[0] = UNW_X3; |
1670 | ||
1671 | if (rtype == spill_sprel_p) | |
1672 | r = 1; | |
1673 | else if (rtype != spill_psprel_p) | |
1674 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1675 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1676 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1677 | count += output_leb128 (bytes + 3, t, 0); |
1678 | count += output_leb128 (bytes + count, w1, 0); | |
1679 | (*f) (count, bytes, NULL); | |
1680 | } | |
1681 | ||
1682 | static void | |
e0c9811a | 1683 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1684 | vbyte_func f; |
1685 | int qp; | |
e0c9811a | 1686 | int ab, reg; |
800eeca4 JW |
1687 | int x, y, treg; |
1688 | unsigned long t; | |
1689 | { | |
1690 | char bytes[20]; | |
800eeca4 | 1691 | int count = 4; |
e0c9811a | 1692 | bytes[0] = UNW_X4; |
800eeca4 | 1693 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1694 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1695 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1696 | count += output_leb128 (bytes + 4, t, 0); | |
1697 | (*f) (count, bytes, NULL); | |
1698 | } | |
1699 | ||
1700 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1701 | |
800eeca4 | 1702 | static unw_rec_list * |
197865e8 | 1703 | alloc_record (unw_record_type t) |
800eeca4 JW |
1704 | { |
1705 | unw_rec_list *ptr; | |
1706 | ptr = xmalloc (sizeof (*ptr)); | |
1707 | ptr->next = NULL; | |
1708 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1709 | ptr->r.type = t; | |
73f20958 L |
1710 | ptr->next_slot_number = 0; |
1711 | ptr->next_slot_frag = 0; | |
800eeca4 JW |
1712 | return ptr; |
1713 | } | |
1714 | ||
800eeca4 JW |
1715 | static unw_rec_list * |
1716 | output_prologue () | |
1717 | { | |
1718 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1719 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1720 | return ptr; |
1721 | } | |
1722 | ||
1723 | static unw_rec_list * | |
1724 | output_prologue_gr (saved_mask, reg) | |
1725 | unsigned int saved_mask; | |
1726 | unsigned int reg; | |
1727 | { | |
1728 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1729 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1730 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1731 | ptr->r.record.r.grsave = reg; |
1732 | return ptr; | |
1733 | } | |
1734 | ||
1735 | static unw_rec_list * | |
1736 | output_body () | |
1737 | { | |
1738 | unw_rec_list *ptr = alloc_record (body); | |
1739 | return ptr; | |
1740 | } | |
1741 | ||
1742 | static unw_rec_list * | |
1743 | output_mem_stack_f (size) | |
1744 | unsigned int size; | |
1745 | { | |
1746 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1747 | ptr->r.record.p.size = size; | |
1748 | return ptr; | |
1749 | } | |
1750 | ||
1751 | static unw_rec_list * | |
1752 | output_mem_stack_v () | |
1753 | { | |
1754 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1755 | return ptr; | |
1756 | } | |
1757 | ||
1758 | static unw_rec_list * | |
1759 | output_psp_gr (gr) | |
1760 | unsigned int gr; | |
1761 | { | |
1762 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1763 | ptr->r.record.p.gr = gr; | |
1764 | return ptr; | |
1765 | } | |
1766 | ||
1767 | static unw_rec_list * | |
1768 | output_psp_sprel (offset) | |
1769 | unsigned int offset; | |
1770 | { | |
1771 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1772 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1773 | return ptr; |
1774 | } | |
1775 | ||
1776 | static unw_rec_list * | |
1777 | output_rp_when () | |
1778 | { | |
1779 | unw_rec_list *ptr = alloc_record (rp_when); | |
1780 | return ptr; | |
1781 | } | |
1782 | ||
1783 | static unw_rec_list * | |
1784 | output_rp_gr (gr) | |
1785 | unsigned int gr; | |
1786 | { | |
1787 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1788 | ptr->r.record.p.gr = gr; | |
1789 | return ptr; | |
1790 | } | |
1791 | ||
1792 | static unw_rec_list * | |
1793 | output_rp_br (br) | |
1794 | unsigned int br; | |
1795 | { | |
1796 | unw_rec_list *ptr = alloc_record (rp_br); | |
1797 | ptr->r.record.p.br = br; | |
1798 | return ptr; | |
1799 | } | |
1800 | ||
1801 | static unw_rec_list * | |
1802 | output_rp_psprel (offset) | |
1803 | unsigned int offset; | |
1804 | { | |
1805 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
542d6675 | 1806 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1807 | return ptr; |
1808 | } | |
1809 | ||
1810 | static unw_rec_list * | |
1811 | output_rp_sprel (offset) | |
1812 | unsigned int offset; | |
1813 | { | |
1814 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1815 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1816 | return ptr; |
1817 | } | |
1818 | ||
1819 | static unw_rec_list * | |
1820 | output_pfs_when () | |
1821 | { | |
1822 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1823 | return ptr; | |
1824 | } | |
1825 | ||
1826 | static unw_rec_list * | |
1827 | output_pfs_gr (gr) | |
1828 | unsigned int gr; | |
1829 | { | |
1830 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1831 | ptr->r.record.p.gr = gr; | |
1832 | return ptr; | |
1833 | } | |
1834 | ||
1835 | static unw_rec_list * | |
1836 | output_pfs_psprel (offset) | |
1837 | unsigned int offset; | |
1838 | { | |
1839 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
542d6675 | 1840 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1841 | return ptr; |
1842 | } | |
1843 | ||
1844 | static unw_rec_list * | |
1845 | output_pfs_sprel (offset) | |
1846 | unsigned int offset; | |
1847 | { | |
1848 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1849 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1850 | return ptr; |
1851 | } | |
1852 | ||
1853 | static unw_rec_list * | |
1854 | output_preds_when () | |
1855 | { | |
1856 | unw_rec_list *ptr = alloc_record (preds_when); | |
1857 | return ptr; | |
1858 | } | |
1859 | ||
1860 | static unw_rec_list * | |
1861 | output_preds_gr (gr) | |
1862 | unsigned int gr; | |
1863 | { | |
1864 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1865 | ptr->r.record.p.gr = gr; | |
1866 | return ptr; | |
1867 | } | |
1868 | ||
1869 | static unw_rec_list * | |
1870 | output_preds_psprel (offset) | |
1871 | unsigned int offset; | |
1872 | { | |
1873 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
542d6675 | 1874 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1875 | return ptr; |
1876 | } | |
1877 | ||
1878 | static unw_rec_list * | |
1879 | output_preds_sprel (offset) | |
1880 | unsigned int offset; | |
1881 | { | |
1882 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1883 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1884 | return ptr; |
1885 | } | |
1886 | ||
1887 | static unw_rec_list * | |
1888 | output_fr_mem (mask) | |
1889 | unsigned int mask; | |
1890 | { | |
1891 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1892 | ptr->r.record.p.rmask = mask; | |
1893 | return ptr; | |
1894 | } | |
1895 | ||
1896 | static unw_rec_list * | |
1897 | output_frgr_mem (gr_mask, fr_mask) | |
1898 | unsigned int gr_mask; | |
1899 | unsigned int fr_mask; | |
1900 | { | |
1901 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1902 | ptr->r.record.p.grmask = gr_mask; | |
1903 | ptr->r.record.p.frmask = fr_mask; | |
1904 | return ptr; | |
1905 | } | |
1906 | ||
1907 | static unw_rec_list * | |
1908 | output_gr_gr (mask, reg) | |
1909 | unsigned int mask; | |
1910 | unsigned int reg; | |
1911 | { | |
1912 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1913 | ptr->r.record.p.grmask = mask; | |
1914 | ptr->r.record.p.gr = reg; | |
1915 | return ptr; | |
1916 | } | |
1917 | ||
1918 | static unw_rec_list * | |
1919 | output_gr_mem (mask) | |
1920 | unsigned int mask; | |
1921 | { | |
1922 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1923 | ptr->r.record.p.rmask = mask; | |
1924 | return ptr; | |
1925 | } | |
1926 | ||
1927 | static unw_rec_list * | |
1928 | output_br_mem (unsigned int mask) | |
1929 | { | |
1930 | unw_rec_list *ptr = alloc_record (br_mem); | |
1931 | ptr->r.record.p.brmask = mask; | |
1932 | return ptr; | |
1933 | } | |
1934 | ||
1935 | static unw_rec_list * | |
1936 | output_br_gr (save_mask, reg) | |
1937 | unsigned int save_mask; | |
1938 | unsigned int reg; | |
1939 | { | |
1940 | unw_rec_list *ptr = alloc_record (br_gr); | |
1941 | ptr->r.record.p.brmask = save_mask; | |
1942 | ptr->r.record.p.gr = reg; | |
1943 | return ptr; | |
1944 | } | |
1945 | ||
1946 | static unw_rec_list * | |
1947 | output_spill_base (offset) | |
1948 | unsigned int offset; | |
1949 | { | |
1950 | unw_rec_list *ptr = alloc_record (spill_base); | |
542d6675 | 1951 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1952 | return ptr; |
1953 | } | |
1954 | ||
1955 | static unw_rec_list * | |
1956 | output_unat_when () | |
1957 | { | |
1958 | unw_rec_list *ptr = alloc_record (unat_when); | |
1959 | return ptr; | |
1960 | } | |
1961 | ||
1962 | static unw_rec_list * | |
1963 | output_unat_gr (gr) | |
1964 | unsigned int gr; | |
1965 | { | |
1966 | unw_rec_list *ptr = alloc_record (unat_gr); | |
1967 | ptr->r.record.p.gr = gr; | |
1968 | return ptr; | |
1969 | } | |
1970 | ||
1971 | static unw_rec_list * | |
1972 | output_unat_psprel (offset) | |
1973 | unsigned int offset; | |
1974 | { | |
1975 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
542d6675 | 1976 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1977 | return ptr; |
1978 | } | |
1979 | ||
1980 | static unw_rec_list * | |
1981 | output_unat_sprel (offset) | |
1982 | unsigned int offset; | |
1983 | { | |
1984 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 1985 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1986 | return ptr; |
1987 | } | |
1988 | ||
1989 | static unw_rec_list * | |
1990 | output_lc_when () | |
1991 | { | |
1992 | unw_rec_list *ptr = alloc_record (lc_when); | |
1993 | return ptr; | |
1994 | } | |
1995 | ||
1996 | static unw_rec_list * | |
1997 | output_lc_gr (gr) | |
1998 | unsigned int gr; | |
1999 | { | |
2000 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2001 | ptr->r.record.p.gr = gr; | |
2002 | return ptr; | |
2003 | } | |
2004 | ||
2005 | static unw_rec_list * | |
2006 | output_lc_psprel (offset) | |
2007 | unsigned int offset; | |
2008 | { | |
2009 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
542d6675 | 2010 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2011 | return ptr; |
2012 | } | |
2013 | ||
2014 | static unw_rec_list * | |
2015 | output_lc_sprel (offset) | |
2016 | unsigned int offset; | |
2017 | { | |
2018 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2019 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2020 | return ptr; |
2021 | } | |
2022 | ||
2023 | static unw_rec_list * | |
2024 | output_fpsr_when () | |
2025 | { | |
2026 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2027 | return ptr; | |
2028 | } | |
2029 | ||
2030 | static unw_rec_list * | |
2031 | output_fpsr_gr (gr) | |
2032 | unsigned int gr; | |
2033 | { | |
2034 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2035 | ptr->r.record.p.gr = gr; | |
2036 | return ptr; | |
2037 | } | |
2038 | ||
2039 | static unw_rec_list * | |
2040 | output_fpsr_psprel (offset) | |
2041 | unsigned int offset; | |
2042 | { | |
2043 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
542d6675 | 2044 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2045 | return ptr; |
2046 | } | |
2047 | ||
2048 | static unw_rec_list * | |
2049 | output_fpsr_sprel (offset) | |
2050 | unsigned int offset; | |
2051 | { | |
2052 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2053 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2054 | return ptr; |
2055 | } | |
2056 | ||
2057 | static unw_rec_list * | |
2058 | output_priunat_when_gr () | |
2059 | { | |
2060 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2061 | return ptr; | |
2062 | } | |
2063 | ||
2064 | static unw_rec_list * | |
2065 | output_priunat_when_mem () | |
2066 | { | |
2067 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2068 | return ptr; | |
2069 | } | |
2070 | ||
2071 | static unw_rec_list * | |
2072 | output_priunat_gr (gr) | |
2073 | unsigned int gr; | |
2074 | { | |
2075 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2076 | ptr->r.record.p.gr = gr; | |
2077 | return ptr; | |
2078 | } | |
2079 | ||
2080 | static unw_rec_list * | |
2081 | output_priunat_psprel (offset) | |
2082 | unsigned int offset; | |
2083 | { | |
2084 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
542d6675 | 2085 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2086 | return ptr; |
2087 | } | |
2088 | ||
2089 | static unw_rec_list * | |
2090 | output_priunat_sprel (offset) | |
2091 | unsigned int offset; | |
2092 | { | |
2093 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2094 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2095 | return ptr; |
2096 | } | |
2097 | ||
2098 | static unw_rec_list * | |
2099 | output_bsp_when () | |
2100 | { | |
2101 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2102 | return ptr; | |
2103 | } | |
2104 | ||
2105 | static unw_rec_list * | |
2106 | output_bsp_gr (gr) | |
2107 | unsigned int gr; | |
2108 | { | |
2109 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2110 | ptr->r.record.p.gr = gr; | |
2111 | return ptr; | |
2112 | } | |
2113 | ||
2114 | static unw_rec_list * | |
2115 | output_bsp_psprel (offset) | |
2116 | unsigned int offset; | |
2117 | { | |
2118 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
542d6675 | 2119 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2120 | return ptr; |
2121 | } | |
2122 | ||
2123 | static unw_rec_list * | |
2124 | output_bsp_sprel (offset) | |
2125 | unsigned int offset; | |
2126 | { | |
2127 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2128 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2129 | return ptr; |
2130 | } | |
2131 | ||
2132 | static unw_rec_list * | |
2133 | output_bspstore_when () | |
2134 | { | |
2135 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2136 | return ptr; | |
2137 | } | |
2138 | ||
2139 | static unw_rec_list * | |
2140 | output_bspstore_gr (gr) | |
2141 | unsigned int gr; | |
2142 | { | |
2143 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2144 | ptr->r.record.p.gr = gr; | |
2145 | return ptr; | |
2146 | } | |
2147 | ||
2148 | static unw_rec_list * | |
2149 | output_bspstore_psprel (offset) | |
2150 | unsigned int offset; | |
2151 | { | |
2152 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
542d6675 | 2153 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2154 | return ptr; |
2155 | } | |
2156 | ||
2157 | static unw_rec_list * | |
2158 | output_bspstore_sprel (offset) | |
2159 | unsigned int offset; | |
2160 | { | |
2161 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2162 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2163 | return ptr; |
2164 | } | |
2165 | ||
2166 | static unw_rec_list * | |
2167 | output_rnat_when () | |
2168 | { | |
2169 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2170 | return ptr; | |
2171 | } | |
2172 | ||
2173 | static unw_rec_list * | |
2174 | output_rnat_gr (gr) | |
2175 | unsigned int gr; | |
2176 | { | |
2177 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2178 | ptr->r.record.p.gr = gr; | |
2179 | return ptr; | |
2180 | } | |
2181 | ||
2182 | static unw_rec_list * | |
2183 | output_rnat_psprel (offset) | |
2184 | unsigned int offset; | |
2185 | { | |
2186 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
542d6675 | 2187 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2188 | return ptr; |
2189 | } | |
2190 | ||
2191 | static unw_rec_list * | |
2192 | output_rnat_sprel (offset) | |
2193 | unsigned int offset; | |
2194 | { | |
2195 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2196 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2197 | return ptr; |
2198 | } | |
2199 | ||
2200 | static unw_rec_list * | |
e0c9811a JW |
2201 | output_unwabi (abi, context) |
2202 | unsigned long abi; | |
2203 | unsigned long context; | |
800eeca4 | 2204 | { |
e0c9811a JW |
2205 | unw_rec_list *ptr = alloc_record (unwabi); |
2206 | ptr->r.record.p.abi = abi; | |
2207 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2208 | return ptr; |
2209 | } | |
2210 | ||
2211 | static unw_rec_list * | |
e0c9811a | 2212 | output_epilogue (unsigned long ecount) |
800eeca4 | 2213 | { |
e0c9811a JW |
2214 | unw_rec_list *ptr = alloc_record (epilogue); |
2215 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2216 | return ptr; |
2217 | } | |
2218 | ||
2219 | static unw_rec_list * | |
e0c9811a | 2220 | output_label_state (unsigned long label) |
800eeca4 | 2221 | { |
e0c9811a JW |
2222 | unw_rec_list *ptr = alloc_record (label_state); |
2223 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2224 | return ptr; |
2225 | } | |
2226 | ||
2227 | static unw_rec_list * | |
e0c9811a JW |
2228 | output_copy_state (unsigned long label) |
2229 | { | |
2230 | unw_rec_list *ptr = alloc_record (copy_state); | |
2231 | ptr->r.record.b.label = label; | |
2232 | return ptr; | |
2233 | } | |
2234 | ||
2235 | static unw_rec_list * | |
2236 | output_spill_psprel (ab, reg, offset) | |
2237 | unsigned int ab; | |
800eeca4 JW |
2238 | unsigned int reg; |
2239 | unsigned int offset; | |
2240 | { | |
2241 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2242 | ptr->r.record.x.ab = ab; |
800eeca4 | 2243 | ptr->r.record.x.reg = reg; |
542d6675 | 2244 | ptr->r.record.x.pspoff = offset / 4; |
800eeca4 JW |
2245 | return ptr; |
2246 | } | |
2247 | ||
2248 | static unw_rec_list * | |
e0c9811a JW |
2249 | output_spill_sprel (ab, reg, offset) |
2250 | unsigned int ab; | |
800eeca4 JW |
2251 | unsigned int reg; |
2252 | unsigned int offset; | |
2253 | { | |
2254 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2255 | ptr->r.record.x.ab = ab; |
800eeca4 | 2256 | ptr->r.record.x.reg = reg; |
542d6675 | 2257 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2258 | return ptr; |
2259 | } | |
2260 | ||
2261 | static unw_rec_list * | |
e0c9811a JW |
2262 | output_spill_psprel_p (ab, reg, offset, predicate) |
2263 | unsigned int ab; | |
800eeca4 JW |
2264 | unsigned int reg; |
2265 | unsigned int offset; | |
2266 | unsigned int predicate; | |
2267 | { | |
2268 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2269 | ptr->r.record.x.ab = ab; |
800eeca4 | 2270 | ptr->r.record.x.reg = reg; |
542d6675 | 2271 | ptr->r.record.x.pspoff = offset / 4; |
800eeca4 JW |
2272 | ptr->r.record.x.qp = predicate; |
2273 | return ptr; | |
2274 | } | |
2275 | ||
2276 | static unw_rec_list * | |
e0c9811a JW |
2277 | output_spill_sprel_p (ab, reg, offset, predicate) |
2278 | unsigned int ab; | |
800eeca4 JW |
2279 | unsigned int reg; |
2280 | unsigned int offset; | |
2281 | unsigned int predicate; | |
2282 | { | |
2283 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2284 | ptr->r.record.x.ab = ab; |
800eeca4 | 2285 | ptr->r.record.x.reg = reg; |
542d6675 | 2286 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2287 | ptr->r.record.x.qp = predicate; |
2288 | return ptr; | |
2289 | } | |
2290 | ||
2291 | static unw_rec_list * | |
e0c9811a JW |
2292 | output_spill_reg (ab, reg, targ_reg, xy) |
2293 | unsigned int ab; | |
800eeca4 JW |
2294 | unsigned int reg; |
2295 | unsigned int targ_reg; | |
2296 | unsigned int xy; | |
2297 | { | |
2298 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2299 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2300 | ptr->r.record.x.reg = reg; |
2301 | ptr->r.record.x.treg = targ_reg; | |
2302 | ptr->r.record.x.xy = xy; | |
2303 | return ptr; | |
2304 | } | |
2305 | ||
2306 | static unw_rec_list * | |
e0c9811a JW |
2307 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2308 | unsigned int ab; | |
800eeca4 JW |
2309 | unsigned int reg; |
2310 | unsigned int targ_reg; | |
2311 | unsigned int xy; | |
2312 | unsigned int predicate; | |
2313 | { | |
2314 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2315 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2316 | ptr->r.record.x.reg = reg; |
2317 | ptr->r.record.x.treg = targ_reg; | |
2318 | ptr->r.record.x.xy = xy; | |
2319 | ptr->r.record.x.qp = predicate; | |
2320 | return ptr; | |
2321 | } | |
2322 | ||
197865e8 | 2323 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2324 | specified function. */ |
542d6675 | 2325 | |
800eeca4 JW |
2326 | static void |
2327 | process_one_record (ptr, f) | |
2328 | unw_rec_list *ptr; | |
2329 | vbyte_func f; | |
2330 | { | |
e0c9811a JW |
2331 | unsigned long fr_mask, gr_mask; |
2332 | ||
197865e8 | 2333 | switch (ptr->r.type) |
800eeca4 | 2334 | { |
542d6675 KH |
2335 | case gr_mem: |
2336 | case fr_mem: | |
2337 | case br_mem: | |
2338 | case frgr_mem: | |
2339 | /* These are taken care of by prologue/prologue_gr. */ | |
2340 | break; | |
e0c9811a | 2341 | |
542d6675 KH |
2342 | case prologue_gr: |
2343 | case prologue: | |
2344 | if (ptr->r.type == prologue_gr) | |
2345 | output_R2_format (f, ptr->r.record.r.grmask, | |
2346 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2347 | else | |
800eeca4 | 2348 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2349 | |
2350 | /* Output descriptor(s) for union of register spills (if any). */ | |
2351 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2352 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2353 | if (fr_mask) | |
2354 | { | |
2355 | if ((fr_mask & ~0xfUL) == 0) | |
2356 | output_P6_format (f, fr_mem, fr_mask); | |
2357 | else | |
2358 | { | |
2359 | output_P5_format (f, gr_mask, fr_mask); | |
2360 | gr_mask = 0; | |
2361 | } | |
2362 | } | |
2363 | if (gr_mask) | |
2364 | output_P6_format (f, gr_mem, gr_mask); | |
2365 | if (ptr->r.record.r.mask.br_mem) | |
2366 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2367 | ||
2368 | /* output imask descriptor if necessary: */ | |
2369 | if (ptr->r.record.r.mask.i) | |
2370 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2371 | ptr->r.record.r.imask_size); | |
2372 | break; | |
2373 | ||
2374 | case body: | |
2375 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2376 | break; | |
2377 | case mem_stack_f: | |
2378 | case mem_stack_v: | |
2379 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2380 | ptr->r.record.p.size); | |
2381 | break; | |
2382 | case psp_gr: | |
2383 | case rp_gr: | |
2384 | case pfs_gr: | |
2385 | case preds_gr: | |
2386 | case unat_gr: | |
2387 | case lc_gr: | |
2388 | case fpsr_gr: | |
2389 | case priunat_gr: | |
2390 | case bsp_gr: | |
2391 | case bspstore_gr: | |
2392 | case rnat_gr: | |
2393 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2394 | break; | |
2395 | case rp_br: | |
2396 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2397 | break; | |
2398 | case psp_sprel: | |
2399 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2400 | break; | |
2401 | case rp_when: | |
2402 | case pfs_when: | |
2403 | case preds_when: | |
2404 | case unat_when: | |
2405 | case lc_when: | |
2406 | case fpsr_when: | |
2407 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2408 | break; | |
2409 | case rp_psprel: | |
2410 | case pfs_psprel: | |
2411 | case preds_psprel: | |
2412 | case unat_psprel: | |
2413 | case lc_psprel: | |
2414 | case fpsr_psprel: | |
2415 | case spill_base: | |
2416 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2417 | break; | |
2418 | case rp_sprel: | |
2419 | case pfs_sprel: | |
2420 | case preds_sprel: | |
2421 | case unat_sprel: | |
2422 | case lc_sprel: | |
2423 | case fpsr_sprel: | |
2424 | case priunat_sprel: | |
2425 | case bsp_sprel: | |
2426 | case bspstore_sprel: | |
2427 | case rnat_sprel: | |
2428 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2429 | break; | |
2430 | case gr_gr: | |
2431 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2432 | break; | |
2433 | case br_gr: | |
2434 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2435 | break; | |
2436 | case spill_mask: | |
2437 | as_bad ("spill_mask record unimplemented."); | |
2438 | break; | |
2439 | case priunat_when_gr: | |
2440 | case priunat_when_mem: | |
2441 | case bsp_when: | |
2442 | case bspstore_when: | |
2443 | case rnat_when: | |
2444 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2445 | break; | |
2446 | case priunat_psprel: | |
2447 | case bsp_psprel: | |
2448 | case bspstore_psprel: | |
2449 | case rnat_psprel: | |
2450 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2451 | break; | |
2452 | case unwabi: | |
2453 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2454 | break; | |
2455 | case epilogue: | |
2456 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2457 | break; | |
2458 | case label_state: | |
2459 | case copy_state: | |
2460 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2461 | break; | |
2462 | case spill_psprel: | |
2463 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2464 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2465 | ptr->r.record.x.pspoff); | |
2466 | break; | |
2467 | case spill_sprel: | |
2468 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2469 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2470 | ptr->r.record.x.spoff); | |
2471 | break; | |
2472 | case spill_reg: | |
2473 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2474 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2475 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2476 | break; | |
2477 | case spill_psprel_p: | |
2478 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2479 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2480 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2481 | break; | |
2482 | case spill_sprel_p: | |
2483 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2484 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2485 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2486 | break; | |
2487 | case spill_reg_p: | |
2488 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2489 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2490 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2491 | ptr->r.record.x.t); | |
2492 | break; | |
2493 | default: | |
2494 | as_bad ("record_type_not_valid"); | |
2495 | break; | |
800eeca4 JW |
2496 | } |
2497 | } | |
2498 | ||
197865e8 | 2499 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2500 | the specified function. */ |
2501 | static void | |
2502 | process_unw_records (list, f) | |
2503 | unw_rec_list *list; | |
2504 | vbyte_func f; | |
2505 | { | |
2506 | unw_rec_list *ptr; | |
2507 | for (ptr = list; ptr; ptr = ptr->next) | |
2508 | process_one_record (ptr, f); | |
2509 | } | |
2510 | ||
2511 | /* Determine the size of a record list in bytes. */ | |
2512 | static int | |
2513 | calc_record_size (list) | |
2514 | unw_rec_list *list; | |
2515 | { | |
2516 | vbyte_count = 0; | |
2517 | process_unw_records (list, count_output); | |
2518 | return vbyte_count; | |
2519 | } | |
2520 | ||
e0c9811a JW |
2521 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2522 | of type TYPE are saved starting at instruction with index T. If N | |
2523 | bits are set in REGMASK, it is assumed that instructions T through | |
2524 | T+N-1 save these registers. | |
2525 | ||
2526 | TYPE values: | |
2527 | 0: no save | |
2528 | 1: instruction saves next fp reg | |
2529 | 2: instruction saves next general reg | |
2530 | 3: instruction saves next branch reg */ | |
2531 | static void | |
2532 | set_imask (region, regmask, t, type) | |
2533 | unw_rec_list *region; | |
2534 | unsigned long regmask; | |
2535 | unsigned long t; | |
2536 | unsigned int type; | |
2537 | { | |
2538 | unsigned char *imask; | |
2539 | unsigned long imask_size; | |
2540 | unsigned int i; | |
2541 | int pos; | |
2542 | ||
2543 | imask = region->r.record.r.mask.i; | |
2544 | imask_size = region->r.record.r.imask_size; | |
2545 | if (!imask) | |
2546 | { | |
542d6675 | 2547 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2548 | imask = xmalloc (imask_size); |
2549 | memset (imask, 0, imask_size); | |
2550 | ||
2551 | region->r.record.r.imask_size = imask_size; | |
2552 | region->r.record.r.mask.i = imask; | |
2553 | } | |
2554 | ||
542d6675 KH |
2555 | i = (t / 4) + 1; |
2556 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2557 | while (regmask) |
2558 | { | |
2559 | if (i >= imask_size) | |
2560 | { | |
2561 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2562 | return; | |
2563 | } | |
2564 | ||
2565 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2566 | |
e0c9811a JW |
2567 | regmask &= (regmask - 1); |
2568 | pos -= 2; | |
2569 | if (pos < 0) | |
2570 | { | |
2571 | pos = 0; | |
2572 | ++i; | |
2573 | } | |
2574 | } | |
2575 | } | |
2576 | ||
2577 | static int | |
2578 | count_bits (unsigned long mask) | |
2579 | { | |
2580 | int n = 0; | |
2581 | ||
2582 | while (mask) | |
2583 | { | |
2584 | mask &= mask - 1; | |
2585 | ++n; | |
2586 | } | |
2587 | return n; | |
2588 | } | |
2589 | ||
f5a30c2e JW |
2590 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2591 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
2592 | containing FIRST_ADDR. */ | |
2593 | ||
e0c9811a | 2594 | unsigned long |
f5a30c2e JW |
2595 | slot_index (slot_addr, slot_frag, first_addr, first_frag) |
2596 | unsigned long slot_addr; | |
2597 | fragS *slot_frag; | |
2598 | unsigned long first_addr; | |
2599 | fragS *first_frag; | |
e0c9811a | 2600 | { |
f5a30c2e JW |
2601 | unsigned long index = 0; |
2602 | ||
2603 | /* First time we are called, the initial address and frag are invalid. */ | |
2604 | if (first_addr == 0) | |
2605 | return 0; | |
2606 | ||
2607 | /* If the two addresses are in different frags, then we need to add in | |
2608 | the remaining size of this frag, and then the entire size of intermediate | |
2609 | frags. */ | |
2610 | while (slot_frag != first_frag) | |
2611 | { | |
2612 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2613 | ||
73f20958 L |
2614 | if (finalize_syms) |
2615 | { | |
2616 | /* We can get the final addresses only after relaxation is | |
2617 | done. */ | |
2618 | if (first_frag->fr_next && first_frag->fr_next->fr_address) | |
2619 | index += 3 * ((first_frag->fr_next->fr_address | |
2620 | - first_frag->fr_address | |
2621 | - first_frag->fr_fix) >> 4); | |
2622 | } | |
2623 | else | |
2624 | /* We don't know what the final addresses will be. We try our | |
2625 | best to estimate. */ | |
2626 | switch (first_frag->fr_type) | |
2627 | { | |
2628 | default: | |
2629 | break; | |
2630 | ||
2631 | case rs_space: | |
2632 | as_fatal ("only constant space allocation is supported"); | |
2633 | break; | |
2634 | ||
2635 | case rs_align: | |
2636 | case rs_align_code: | |
2637 | case rs_align_test: | |
2638 | /* Take alignment into account. Assume the worst case | |
2639 | before relaxation. */ | |
2640 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2641 | break; | |
2642 | ||
2643 | case rs_org: | |
2644 | if (first_frag->fr_symbol) | |
2645 | { | |
2646 | as_fatal ("only constant offsets are supported"); | |
2647 | break; | |
2648 | } | |
2649 | case rs_fill: | |
2650 | index += 3 * (first_frag->fr_offset >> 4); | |
2651 | break; | |
2652 | } | |
2653 | ||
f5a30c2e JW |
2654 | /* Add in the full size of the frag converted to instruction slots. */ |
2655 | index += 3 * (first_frag->fr_fix >> 4); | |
2656 | /* Subtract away the initial part before first_addr. */ | |
2657 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2658 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2659 | |
f5a30c2e JW |
2660 | /* Move to the beginning of the next frag. */ |
2661 | first_frag = first_frag->fr_next; | |
2662 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2663 | } | |
2664 | ||
2665 | /* Add in the used part of the last frag. */ | |
2666 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2667 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2668 | return index; | |
2669 | } | |
4a1805b1 | 2670 | |
91a2ae2a RH |
2671 | /* Optimize unwind record directives. */ |
2672 | ||
2673 | static unw_rec_list * | |
2674 | optimize_unw_records (list) | |
2675 | unw_rec_list *list; | |
2676 | { | |
2677 | if (!list) | |
2678 | return NULL; | |
2679 | ||
2680 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2681 | by ".body", then we can optimize the unwind directives away. */ | |
2682 | if (list->r.type == prologue | |
2683 | && (list->next == NULL | |
2684 | || (list->next->r.type == body && list->next->next == NULL))) | |
2685 | return NULL; | |
2686 | ||
2687 | return list; | |
2688 | } | |
2689 | ||
800eeca4 JW |
2690 | /* Given a complete record list, process any records which have |
2691 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2692 | this has been run, all necessary information should be available |
800eeca4 | 2693 | within each record to generate an image. */ |
542d6675 | 2694 | |
800eeca4 JW |
2695 | static void |
2696 | fixup_unw_records (list) | |
2697 | unw_rec_list *list; | |
2698 | { | |
e0c9811a JW |
2699 | unw_rec_list *ptr, *region = 0; |
2700 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2701 | fragS *first_frag = 0; |
e0c9811a | 2702 | |
800eeca4 JW |
2703 | for (ptr = list; ptr; ptr = ptr->next) |
2704 | { | |
2705 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2706 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e JW |
2707 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
2708 | first_addr, first_frag); | |
800eeca4 JW |
2709 | switch (ptr->r.type) |
2710 | { | |
542d6675 KH |
2711 | case prologue: |
2712 | case prologue_gr: | |
2713 | case body: | |
2714 | { | |
2715 | unw_rec_list *last; | |
2716 | int size, dir_len = 0; | |
2717 | unsigned long last_addr; | |
f5a30c2e | 2718 | fragS *last_frag; |
542d6675 KH |
2719 | |
2720 | first_addr = ptr->slot_number; | |
f5a30c2e | 2721 | first_frag = ptr->slot_frag; |
542d6675 KH |
2722 | /* Find either the next body/prologue start, or the end of |
2723 | the list, and determine the size of the region. */ | |
73f20958 L |
2724 | last_addr = list->next_slot_number; |
2725 | last_frag = list->next_slot_frag; | |
542d6675 KH |
2726 | for (last = ptr->next; last != NULL; last = last->next) |
2727 | if (last->r.type == prologue || last->r.type == prologue_gr | |
2728 | || last->r.type == body) | |
2729 | { | |
2730 | last_addr = last->slot_number; | |
f5a30c2e | 2731 | last_frag = last->slot_frag; |
542d6675 KH |
2732 | break; |
2733 | } | |
2734 | else if (!last->next) | |
2735 | { | |
2736 | /* In the absence of an explicit .body directive, | |
2737 | the prologue ends after the last instruction | |
2738 | covered by an unwind directive. */ | |
2739 | if (ptr->r.type != body) | |
2740 | { | |
2741 | last_addr = last->slot_number; | |
f5a30c2e | 2742 | last_frag = last->slot_frag; |
542d6675 KH |
2743 | switch (last->r.type) |
2744 | { | |
2745 | case frgr_mem: | |
2746 | dir_len = (count_bits (last->r.record.p.frmask) | |
2747 | + count_bits (last->r.record.p.grmask)); | |
2748 | break; | |
2749 | case fr_mem: | |
2750 | case gr_mem: | |
2751 | dir_len += count_bits (last->r.record.p.rmask); | |
2752 | break; | |
2753 | case br_mem: | |
2754 | case br_gr: | |
2755 | dir_len += count_bits (last->r.record.p.brmask); | |
2756 | break; | |
2757 | case gr_gr: | |
2758 | dir_len += count_bits (last->r.record.p.grmask); | |
2759 | break; | |
2760 | default: | |
2761 | dir_len = 1; | |
2762 | break; | |
2763 | } | |
2764 | } | |
2765 | break; | |
2766 | } | |
f5a30c2e JW |
2767 | size = (slot_index (last_addr, last_frag, first_addr, first_frag) |
2768 | + dir_len); | |
542d6675 | 2769 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2770 | if (ptr->r.type == body) |
2771 | /* End of region. */ | |
2772 | region = 0; | |
2773 | else | |
2774 | region = ptr; | |
e0c9811a | 2775 | break; |
542d6675 KH |
2776 | } |
2777 | case epilogue: | |
2778 | ptr->r.record.b.t = rlen - 1 - t; | |
2779 | break; | |
e0c9811a | 2780 | |
542d6675 KH |
2781 | case mem_stack_f: |
2782 | case mem_stack_v: | |
2783 | case rp_when: | |
2784 | case pfs_when: | |
2785 | case preds_when: | |
2786 | case unat_when: | |
2787 | case lc_when: | |
2788 | case fpsr_when: | |
2789 | case priunat_when_gr: | |
2790 | case priunat_when_mem: | |
2791 | case bsp_when: | |
2792 | case bspstore_when: | |
2793 | case rnat_when: | |
2794 | ptr->r.record.p.t = t; | |
2795 | break; | |
e0c9811a | 2796 | |
542d6675 KH |
2797 | case spill_reg: |
2798 | case spill_sprel: | |
2799 | case spill_psprel: | |
2800 | case spill_reg_p: | |
2801 | case spill_sprel_p: | |
2802 | case spill_psprel_p: | |
2803 | ptr->r.record.x.t = t; | |
2804 | break; | |
e0c9811a | 2805 | |
542d6675 KH |
2806 | case frgr_mem: |
2807 | if (!region) | |
2808 | { | |
2809 | as_bad ("frgr_mem record before region record!\n"); | |
2810 | return; | |
2811 | } | |
2812 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2813 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2814 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2815 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2816 | break; | |
2817 | case fr_mem: | |
2818 | if (!region) | |
2819 | { | |
2820 | as_bad ("fr_mem record before region record!\n"); | |
2821 | return; | |
2822 | } | |
2823 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2824 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2825 | break; | |
2826 | case gr_mem: | |
2827 | if (!region) | |
2828 | { | |
2829 | as_bad ("gr_mem record before region record!\n"); | |
2830 | return; | |
2831 | } | |
2832 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2833 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2834 | break; | |
2835 | case br_mem: | |
2836 | if (!region) | |
2837 | { | |
2838 | as_bad ("br_mem record before region record!\n"); | |
2839 | return; | |
2840 | } | |
2841 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2842 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2843 | break; | |
e0c9811a | 2844 | |
542d6675 KH |
2845 | case gr_gr: |
2846 | if (!region) | |
2847 | { | |
2848 | as_bad ("gr_gr record before region record!\n"); | |
2849 | return; | |
2850 | } | |
2851 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2852 | break; | |
2853 | case br_gr: | |
2854 | if (!region) | |
2855 | { | |
2856 | as_bad ("br_gr record before region record!\n"); | |
2857 | return; | |
2858 | } | |
2859 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2860 | break; | |
e0c9811a | 2861 | |
542d6675 KH |
2862 | default: |
2863 | break; | |
800eeca4 JW |
2864 | } |
2865 | } | |
2866 | } | |
2867 | ||
73f20958 L |
2868 | /* This function converts a rs_machine_dependent variant frag into a |
2869 | normal fill frag with the unwind image from the the record list. */ | |
2870 | void | |
2871 | ia64_convert_frag (fragS *frag) | |
557debba | 2872 | { |
73f20958 L |
2873 | unw_rec_list *list; |
2874 | int len, size, pad; | |
1cd8ff38 | 2875 | valueT flag_value; |
557debba | 2876 | |
73f20958 L |
2877 | list = (unw_rec_list *) frag->fr_opcode; |
2878 | fixup_unw_records (list); | |
1cd8ff38 | 2879 | |
73f20958 L |
2880 | len = calc_record_size (list); |
2881 | /* pad to pointer-size boundary. */ | |
2882 | pad = len % md.pointer_size; | |
2883 | if (pad != 0) | |
2884 | len += md.pointer_size - pad; | |
2885 | /* Add 8 for the header + a pointer for the personality offset. */ | |
2886 | size = len + 8 + md.pointer_size; | |
2887 | ||
2888 | /* fr_var carries the max_chars that we created the fragment with. | |
2889 | We must, of course, have allocated enough memory earlier. */ | |
2890 | assert (frag->fr_var >= size); | |
2891 | ||
2892 | /* Initialize the header area. fr_offset is initialized with | |
2893 | unwind.personality_routine. */ | |
2894 | if (frag->fr_offset) | |
1cd8ff38 NC |
2895 | { |
2896 | if (md.flags & EF_IA_64_ABI64) | |
2897 | flag_value = (bfd_vma) 3 << 32; | |
2898 | else | |
2899 | /* 32-bit unwind info block. */ | |
2900 | flag_value = (bfd_vma) 0x1003 << 32; | |
2901 | } | |
2902 | else | |
2903 | flag_value = 0; | |
557debba | 2904 | |
73f20958 L |
2905 | md_number_to_chars (frag->fr_literal, |
2906 | (((bfd_vma) 1 << 48) /* Version. */ | |
2907 | | flag_value /* U & E handler flags. */ | |
2908 | | (len / md.pointer_size)), /* Length. */ | |
2909 | 8); | |
557debba | 2910 | |
73f20958 L |
2911 | /* Skip the header. */ |
2912 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2913 | process_unw_records (list, output_vbyte_mem); | |
2914 | frag->fr_fix += size; | |
2915 | frag->fr_type = rs_fill; | |
2916 | frag->fr_var = 0; | |
2917 | frag->fr_offset = 0; | |
800eeca4 JW |
2918 | } |
2919 | ||
e0c9811a JW |
2920 | static int |
2921 | convert_expr_to_ab_reg (e, ab, regp) | |
2922 | expressionS *e; | |
2923 | unsigned int *ab; | |
2924 | unsigned int *regp; | |
2925 | { | |
2926 | unsigned int reg; | |
2927 | ||
2928 | if (e->X_op != O_register) | |
2929 | return 0; | |
2930 | ||
2931 | reg = e->X_add_number; | |
2434f565 | 2932 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2933 | { |
2934 | *ab = 0; | |
2935 | *regp = reg - REG_GR; | |
2936 | } | |
2434f565 JW |
2937 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2938 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2939 | { |
2940 | *ab = 1; | |
2941 | *regp = reg - REG_FR; | |
2942 | } | |
2434f565 | 2943 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2944 | { |
2945 | *ab = 2; | |
2946 | *regp = reg - REG_BR; | |
2947 | } | |
2948 | else | |
2949 | { | |
2950 | *ab = 3; | |
2951 | switch (reg) | |
2952 | { | |
2953 | case REG_PR: *regp = 0; break; | |
2954 | case REG_PSP: *regp = 1; break; | |
2955 | case REG_PRIUNAT: *regp = 2; break; | |
2956 | case REG_BR + 0: *regp = 3; break; | |
2957 | case REG_AR + AR_BSP: *regp = 4; break; | |
2958 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2959 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2960 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2961 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2962 | case REG_AR + AR_PFS: *regp = 9; break; | |
2963 | case REG_AR + AR_LC: *regp = 10; break; | |
2964 | ||
2965 | default: | |
2966 | return 0; | |
2967 | } | |
2968 | } | |
2969 | return 1; | |
197865e8 | 2970 | } |
e0c9811a JW |
2971 | |
2972 | static int | |
2973 | convert_expr_to_xy_reg (e, xy, regp) | |
2974 | expressionS *e; | |
2975 | unsigned int *xy; | |
2976 | unsigned int *regp; | |
2977 | { | |
2978 | unsigned int reg; | |
2979 | ||
2980 | if (e->X_op != O_register) | |
2981 | return 0; | |
2982 | ||
2983 | reg = e->X_add_number; | |
2984 | ||
2434f565 | 2985 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
2986 | { |
2987 | *xy = 0; | |
2988 | *regp = reg - REG_GR; | |
2989 | } | |
2434f565 | 2990 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
2991 | { |
2992 | *xy = 1; | |
2993 | *regp = reg - REG_FR; | |
2994 | } | |
2434f565 | 2995 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
2996 | { |
2997 | *xy = 2; | |
2998 | *regp = reg - REG_BR; | |
2999 | } | |
3000 | else | |
3001 | return -1; | |
3002 | return 1; | |
197865e8 | 3003 | } |
e0c9811a | 3004 | |
800eeca4 JW |
3005 | static void |
3006 | dot_radix (dummy) | |
2434f565 | 3007 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3008 | { |
3009 | int radix; | |
3010 | ||
3011 | SKIP_WHITESPACE (); | |
3012 | radix = *input_line_pointer++; | |
3013 | ||
3014 | if (radix != 'C' && !is_end_of_line[(unsigned char) radix]) | |
3015 | { | |
3016 | as_bad ("Radix `%c' unsupported", *input_line_pointer); | |
542d6675 | 3017 | ignore_rest_of_line (); |
800eeca4 JW |
3018 | return; |
3019 | } | |
3020 | } | |
3021 | ||
3022 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ | |
3023 | static void | |
3024 | dot_special_section (which) | |
3025 | int which; | |
3026 | { | |
3027 | set_section ((char *) special_section_name[which]); | |
3028 | } | |
3029 | ||
3030 | static void | |
3031 | add_unwind_entry (ptr) | |
3032 | unw_rec_list *ptr; | |
3033 | { | |
e0c9811a JW |
3034 | if (unwind.tail) |
3035 | unwind.tail->next = ptr; | |
800eeca4 | 3036 | else |
e0c9811a JW |
3037 | unwind.list = ptr; |
3038 | unwind.tail = ptr; | |
800eeca4 JW |
3039 | |
3040 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3041 | if (unwind.current_entry == NULL) |
3042 | unwind.current_entry = ptr; | |
800eeca4 JW |
3043 | } |
3044 | ||
197865e8 | 3045 | static void |
800eeca4 | 3046 | dot_fframe (dummy) |
2434f565 | 3047 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3048 | { |
3049 | expressionS e; | |
e0c9811a | 3050 | |
800eeca4 | 3051 | parse_operand (&e); |
197865e8 | 3052 | |
800eeca4 JW |
3053 | if (e.X_op != O_constant) |
3054 | as_bad ("Operand to .fframe must be a constant"); | |
3055 | else | |
e0c9811a JW |
3056 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3057 | } | |
3058 | ||
197865e8 | 3059 | static void |
e0c9811a | 3060 | dot_vframe (dummy) |
2434f565 | 3061 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3062 | { |
3063 | expressionS e; | |
3064 | unsigned reg; | |
3065 | ||
3066 | parse_operand (&e); | |
3067 | reg = e.X_add_number - REG_GR; | |
3068 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3069 | { |
e0c9811a | 3070 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3071 | if (! (unwind.prologue_mask & 2)) |
3072 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3073 | } |
e0c9811a JW |
3074 | else |
3075 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3076 | } |
3077 | ||
197865e8 | 3078 | static void |
e0c9811a | 3079 | dot_vframesp (dummy) |
2434f565 | 3080 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3081 | { |
e0c9811a JW |
3082 | expressionS e; |
3083 | ||
3084 | parse_operand (&e); | |
3085 | if (e.X_op == O_constant) | |
3086 | { | |
3087 | add_unwind_entry (output_mem_stack_v ()); | |
3088 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3089 | } | |
3090 | else | |
69906a9b | 3091 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3092 | } |
3093 | ||
197865e8 | 3094 | static void |
e0c9811a | 3095 | dot_vframepsp (dummy) |
2434f565 | 3096 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3097 | { |
3098 | expressionS e; | |
3099 | ||
3100 | parse_operand (&e); | |
3101 | if (e.X_op == O_constant) | |
3102 | { | |
3103 | add_unwind_entry (output_mem_stack_v ()); | |
3104 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3105 | } | |
3106 | else | |
69906a9b | 3107 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3108 | } |
3109 | ||
197865e8 | 3110 | static void |
800eeca4 | 3111 | dot_save (dummy) |
2434f565 | 3112 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3113 | { |
3114 | expressionS e1, e2; | |
3115 | int sep; | |
3116 | int reg1, reg2; | |
3117 | ||
3118 | sep = parse_operand (&e1); | |
3119 | if (sep != ',') | |
3120 | as_bad ("No second operand to .save"); | |
3121 | sep = parse_operand (&e2); | |
3122 | ||
e0c9811a | 3123 | reg1 = e1.X_add_number; |
800eeca4 | 3124 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3125 | |
800eeca4 | 3126 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3127 | if (e1.X_op == O_register) |
800eeca4 | 3128 | { |
542d6675 | 3129 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3130 | { |
3131 | switch (reg1) | |
3132 | { | |
542d6675 KH |
3133 | case REG_AR + AR_BSP: |
3134 | add_unwind_entry (output_bsp_when ()); | |
3135 | add_unwind_entry (output_bsp_gr (reg2)); | |
3136 | break; | |
3137 | case REG_AR + AR_BSPSTORE: | |
3138 | add_unwind_entry (output_bspstore_when ()); | |
3139 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3140 | break; | |
3141 | case REG_AR + AR_RNAT: | |
3142 | add_unwind_entry (output_rnat_when ()); | |
3143 | add_unwind_entry (output_rnat_gr (reg2)); | |
3144 | break; | |
3145 | case REG_AR + AR_UNAT: | |
3146 | add_unwind_entry (output_unat_when ()); | |
3147 | add_unwind_entry (output_unat_gr (reg2)); | |
3148 | break; | |
3149 | case REG_AR + AR_FPSR: | |
3150 | add_unwind_entry (output_fpsr_when ()); | |
3151 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3152 | break; | |
3153 | case REG_AR + AR_PFS: | |
3154 | add_unwind_entry (output_pfs_when ()); | |
3155 | if (! (unwind.prologue_mask & 4)) | |
3156 | add_unwind_entry (output_pfs_gr (reg2)); | |
3157 | break; | |
3158 | case REG_AR + AR_LC: | |
3159 | add_unwind_entry (output_lc_when ()); | |
3160 | add_unwind_entry (output_lc_gr (reg2)); | |
3161 | break; | |
3162 | case REG_BR: | |
3163 | add_unwind_entry (output_rp_when ()); | |
3164 | if (! (unwind.prologue_mask & 8)) | |
3165 | add_unwind_entry (output_rp_gr (reg2)); | |
3166 | break; | |
3167 | case REG_PR: | |
3168 | add_unwind_entry (output_preds_when ()); | |
3169 | if (! (unwind.prologue_mask & 1)) | |
3170 | add_unwind_entry (output_preds_gr (reg2)); | |
3171 | break; | |
3172 | case REG_PRIUNAT: | |
3173 | add_unwind_entry (output_priunat_when_gr ()); | |
3174 | add_unwind_entry (output_priunat_gr (reg2)); | |
3175 | break; | |
3176 | default: | |
3177 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3178 | } |
3179 | } | |
3180 | else | |
3181 | as_bad (" Second operand not a valid register"); | |
3182 | } | |
3183 | else | |
e0c9811a | 3184 | as_bad ("First operand not a register"); |
800eeca4 JW |
3185 | } |
3186 | ||
197865e8 | 3187 | static void |
800eeca4 | 3188 | dot_restore (dummy) |
2434f565 | 3189 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3190 | { |
e0c9811a | 3191 | expressionS e1, e2; |
33d01f33 | 3192 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3193 | int sep; |
3194 | ||
3195 | sep = parse_operand (&e1); | |
3196 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3197 | { | |
3198 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3199 | return; | |
3200 | } | |
3201 | ||
3202 | if (sep == ',') | |
3203 | { | |
3204 | parse_operand (&e2); | |
33d01f33 | 3205 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3206 | { |
33d01f33 | 3207 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3208 | return; |
3209 | } | |
33d01f33 | 3210 | ecount = e2.X_add_number; |
e0c9811a | 3211 | } |
33d01f33 JW |
3212 | else |
3213 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3214 | |
3215 | if (ecount >= unwind.prologue_count) | |
3216 | { | |
3217 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3218 | ecount + 1, unwind.prologue_count); | |
3219 | return; | |
3220 | } | |
3221 | ||
e0c9811a | 3222 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3223 | |
3224 | if (ecount < unwind.prologue_count) | |
3225 | unwind.prologue_count -= ecount + 1; | |
3226 | else | |
3227 | unwind.prologue_count = 0; | |
e0c9811a JW |
3228 | } |
3229 | ||
197865e8 | 3230 | static void |
e0c9811a | 3231 | dot_restorereg (dummy) |
2434f565 | 3232 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3233 | { |
3234 | unsigned int ab, reg; | |
3235 | expressionS e; | |
3236 | ||
3237 | parse_operand (&e); | |
3238 | ||
3239 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3240 | { | |
3241 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3242 | return; | |
3243 | } | |
3244 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3245 | } | |
3246 | ||
197865e8 | 3247 | static void |
e0c9811a | 3248 | dot_restorereg_p (dummy) |
2434f565 | 3249 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3250 | { |
3251 | unsigned int qp, ab, reg; | |
3252 | expressionS e1, e2; | |
3253 | int sep; | |
3254 | ||
3255 | sep = parse_operand (&e1); | |
3256 | if (sep != ',') | |
3257 | { | |
3258 | as_bad ("No second operand to .restorereg.p"); | |
3259 | return; | |
3260 | } | |
3261 | ||
3262 | parse_operand (&e2); | |
3263 | ||
3264 | qp = e1.X_add_number - REG_P; | |
3265 | if (e1.X_op != O_register || qp > 63) | |
3266 | { | |
3267 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3268 | return; | |
3269 | } | |
3270 | ||
3271 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3272 | { | |
3273 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3274 | return; | |
3275 | } | |
3276 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3277 | } |
3278 | ||
73f20958 | 3279 | static void |
91a2ae2a RH |
3280 | generate_unwind_image (text_name) |
3281 | const char *text_name; | |
800eeca4 | 3282 | { |
73f20958 L |
3283 | int size, pad; |
3284 | unw_rec_list *list; | |
800eeca4 | 3285 | |
10850f29 JW |
3286 | /* Force out pending instructions, to make sure all unwind records have |
3287 | a valid slot_number field. */ | |
3288 | ia64_flush_insns (); | |
3289 | ||
800eeca4 | 3290 | /* Generate the unwind record. */ |
73f20958 L |
3291 | list = optimize_unw_records (unwind.list); |
3292 | fixup_unw_records (list); | |
3293 | size = calc_record_size (list); | |
3294 | ||
3295 | if (size > 0 || unwind.force_unwind_entry) | |
3296 | { | |
3297 | unwind.force_unwind_entry = 0; | |
3298 | /* pad to pointer-size boundary. */ | |
3299 | pad = size % md.pointer_size; | |
3300 | if (pad != 0) | |
3301 | size += md.pointer_size - pad; | |
3302 | /* Add 8 for the header + a pointer for the personality | |
3303 | offset. */ | |
3304 | size += 8 + md.pointer_size; | |
3305 | } | |
6290819d | 3306 | |
800eeca4 JW |
3307 | /* If there are unwind records, switch sections, and output the info. */ |
3308 | if (size != 0) | |
3309 | { | |
91a2ae2a | 3310 | char *sec_name; |
800eeca4 | 3311 | expressionS exp; |
1cd8ff38 | 3312 | bfd_reloc_code_real_type reloc; |
91a2ae2a RH |
3313 | |
3314 | make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO, text_name, sec_name); | |
3315 | set_section (sec_name); | |
3316 | bfd_set_section_flags (stdoutput, now_seg, | |
3317 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
800eeca4 | 3318 | |
557debba JW |
3319 | /* Make sure the section has 4 byte alignment for ILP32 and |
3320 | 8 byte alignment for LP64. */ | |
3321 | frag_align (md.pointer_size_shift, 0, 0); | |
3322 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3323 | |
800eeca4 | 3324 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3325 | unwind.info = expr_build_dot (); |
73f20958 L |
3326 | |
3327 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
3328 | (offsetT) unwind.personality_routine, (char *) list); | |
91a2ae2a | 3329 | |
800eeca4 | 3330 | /* Add the personality address to the image. */ |
e0c9811a | 3331 | if (unwind.personality_routine != 0) |
542d6675 | 3332 | { |
40449e9f | 3333 | exp.X_op = O_symbol; |
e0c9811a | 3334 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3335 | exp.X_add_number = 0; |
1cd8ff38 NC |
3336 | |
3337 | if (md.flags & EF_IA_64_BE) | |
3338 | { | |
3339 | if (md.flags & EF_IA_64_ABI64) | |
3340 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3341 | else | |
3342 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3343 | } | |
40449e9f | 3344 | else |
1cd8ff38 NC |
3345 | { |
3346 | if (md.flags & EF_IA_64_ABI64) | |
3347 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3348 | else | |
3349 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3350 | } | |
3351 | ||
3352 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3353 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3354 | unwind.personality_routine = 0; |
542d6675 | 3355 | } |
800eeca4 JW |
3356 | } |
3357 | ||
6290819d | 3358 | free_saved_prologue_counts (); |
e0c9811a | 3359 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3360 | } |
3361 | ||
197865e8 | 3362 | static void |
542d6675 | 3363 | dot_handlerdata (dummy) |
2434f565 | 3364 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3365 | { |
91a2ae2a RH |
3366 | const char *text_name = segment_name (now_seg); |
3367 | ||
3368 | /* If text section name starts with ".text" (which it should), | |
3369 | strip this prefix off. */ | |
3370 | if (strcmp (text_name, ".text") == 0) | |
3371 | text_name = ""; | |
3372 | ||
3373 | unwind.force_unwind_entry = 1; | |
3374 | ||
3375 | /* Remember which segment we're in so we can switch back after .endp */ | |
3376 | unwind.saved_text_seg = now_seg; | |
3377 | unwind.saved_text_subseg = now_subseg; | |
3378 | ||
3379 | /* Generate unwind info into unwind-info section and then leave that | |
3380 | section as the currently active one so dataXX directives go into | |
3381 | the language specific data area of the unwind info block. */ | |
3382 | generate_unwind_image (text_name); | |
e0c9811a | 3383 | demand_empty_rest_of_line (); |
800eeca4 JW |
3384 | } |
3385 | ||
197865e8 | 3386 | static void |
800eeca4 | 3387 | dot_unwentry (dummy) |
2434f565 | 3388 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3389 | { |
91a2ae2a | 3390 | unwind.force_unwind_entry = 1; |
e0c9811a | 3391 | demand_empty_rest_of_line (); |
800eeca4 JW |
3392 | } |
3393 | ||
197865e8 | 3394 | static void |
800eeca4 | 3395 | dot_altrp (dummy) |
2434f565 | 3396 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3397 | { |
e0c9811a JW |
3398 | expressionS e; |
3399 | unsigned reg; | |
3400 | ||
3401 | parse_operand (&e); | |
3402 | reg = e.X_add_number - REG_BR; | |
3403 | if (e.X_op == O_register && reg < 8) | |
3404 | add_unwind_entry (output_rp_br (reg)); | |
3405 | else | |
3406 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3407 | } |
3408 | ||
197865e8 | 3409 | static void |
e0c9811a JW |
3410 | dot_savemem (psprel) |
3411 | int psprel; | |
800eeca4 JW |
3412 | { |
3413 | expressionS e1, e2; | |
3414 | int sep; | |
3415 | int reg1, val; | |
3416 | ||
3417 | sep = parse_operand (&e1); | |
3418 | if (sep != ',') | |
e0c9811a | 3419 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3420 | sep = parse_operand (&e2); |
3421 | ||
e0c9811a | 3422 | reg1 = e1.X_add_number; |
800eeca4 | 3423 | val = e2.X_add_number; |
197865e8 | 3424 | |
800eeca4 | 3425 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3426 | if (e1.X_op == O_register) |
800eeca4 JW |
3427 | { |
3428 | if (e2.X_op == O_constant) | |
3429 | { | |
3430 | switch (reg1) | |
3431 | { | |
542d6675 KH |
3432 | case REG_AR + AR_BSP: |
3433 | add_unwind_entry (output_bsp_when ()); | |
3434 | add_unwind_entry ((psprel | |
3435 | ? output_bsp_psprel | |
3436 | : output_bsp_sprel) (val)); | |
3437 | break; | |
3438 | case REG_AR + AR_BSPSTORE: | |
3439 | add_unwind_entry (output_bspstore_when ()); | |
3440 | add_unwind_entry ((psprel | |
3441 | ? output_bspstore_psprel | |
3442 | : output_bspstore_sprel) (val)); | |
3443 | break; | |
3444 | case REG_AR + AR_RNAT: | |
3445 | add_unwind_entry (output_rnat_when ()); | |
3446 | add_unwind_entry ((psprel | |
3447 | ? output_rnat_psprel | |
3448 | : output_rnat_sprel) (val)); | |
3449 | break; | |
3450 | case REG_AR + AR_UNAT: | |
3451 | add_unwind_entry (output_unat_when ()); | |
3452 | add_unwind_entry ((psprel | |
3453 | ? output_unat_psprel | |
3454 | : output_unat_sprel) (val)); | |
3455 | break; | |
3456 | case REG_AR + AR_FPSR: | |
3457 | add_unwind_entry (output_fpsr_when ()); | |
3458 | add_unwind_entry ((psprel | |
3459 | ? output_fpsr_psprel | |
3460 | : output_fpsr_sprel) (val)); | |
3461 | break; | |
3462 | case REG_AR + AR_PFS: | |
3463 | add_unwind_entry (output_pfs_when ()); | |
3464 | add_unwind_entry ((psprel | |
3465 | ? output_pfs_psprel | |
3466 | : output_pfs_sprel) (val)); | |
3467 | break; | |
3468 | case REG_AR + AR_LC: | |
3469 | add_unwind_entry (output_lc_when ()); | |
3470 | add_unwind_entry ((psprel | |
3471 | ? output_lc_psprel | |
3472 | : output_lc_sprel) (val)); | |
3473 | break; | |
3474 | case REG_BR: | |
3475 | add_unwind_entry (output_rp_when ()); | |
3476 | add_unwind_entry ((psprel | |
3477 | ? output_rp_psprel | |
3478 | : output_rp_sprel) (val)); | |
3479 | break; | |
3480 | case REG_PR: | |
3481 | add_unwind_entry (output_preds_when ()); | |
3482 | add_unwind_entry ((psprel | |
3483 | ? output_preds_psprel | |
3484 | : output_preds_sprel) (val)); | |
3485 | break; | |
3486 | case REG_PRIUNAT: | |
3487 | add_unwind_entry (output_priunat_when_mem ()); | |
3488 | add_unwind_entry ((psprel | |
3489 | ? output_priunat_psprel | |
3490 | : output_priunat_sprel) (val)); | |
3491 | break; | |
3492 | default: | |
3493 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3494 | } |
3495 | } | |
3496 | else | |
3497 | as_bad (" Second operand not a valid constant"); | |
3498 | } | |
3499 | else | |
e0c9811a | 3500 | as_bad ("First operand not a register"); |
800eeca4 JW |
3501 | } |
3502 | ||
197865e8 | 3503 | static void |
800eeca4 | 3504 | dot_saveg (dummy) |
2434f565 | 3505 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3506 | { |
3507 | expressionS e1, e2; | |
3508 | int sep; | |
3509 | sep = parse_operand (&e1); | |
3510 | if (sep == ',') | |
3511 | parse_operand (&e2); | |
197865e8 | 3512 | |
800eeca4 JW |
3513 | if (e1.X_op != O_constant) |
3514 | as_bad ("First operand to .save.g must be a constant."); | |
3515 | else | |
3516 | { | |
3517 | int grmask = e1.X_add_number; | |
3518 | if (sep != ',') | |
3519 | add_unwind_entry (output_gr_mem (grmask)); | |
3520 | else | |
542d6675 | 3521 | { |
800eeca4 | 3522 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3523 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3524 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3525 | else | |
3526 | as_bad ("Second operand is an invalid register."); | |
3527 | } | |
3528 | } | |
3529 | } | |
3530 | ||
197865e8 | 3531 | static void |
800eeca4 | 3532 | dot_savef (dummy) |
2434f565 | 3533 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3534 | { |
e0c9811a | 3535 | expressionS e1; |
800eeca4 JW |
3536 | int sep; |
3537 | sep = parse_operand (&e1); | |
197865e8 | 3538 | |
800eeca4 JW |
3539 | if (e1.X_op != O_constant) |
3540 | as_bad ("Operand to .save.f must be a constant."); | |
3541 | else | |
e0c9811a | 3542 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3543 | } |
3544 | ||
197865e8 | 3545 | static void |
800eeca4 | 3546 | dot_saveb (dummy) |
2434f565 | 3547 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3548 | { |
e0c9811a JW |
3549 | expressionS e1, e2; |
3550 | unsigned int reg; | |
3551 | unsigned char sep; | |
3552 | int brmask; | |
3553 | ||
800eeca4 | 3554 | sep = parse_operand (&e1); |
800eeca4 | 3555 | if (e1.X_op != O_constant) |
800eeca4 | 3556 | { |
e0c9811a JW |
3557 | as_bad ("First operand to .save.b must be a constant."); |
3558 | return; | |
800eeca4 | 3559 | } |
e0c9811a JW |
3560 | brmask = e1.X_add_number; |
3561 | ||
3562 | if (sep == ',') | |
3563 | { | |
3564 | sep = parse_operand (&e2); | |
3565 | reg = e2.X_add_number - REG_GR; | |
3566 | if (e2.X_op != O_register || reg > 127) | |
3567 | { | |
3568 | as_bad ("Second operand to .save.b must be a general register."); | |
3569 | return; | |
3570 | } | |
3571 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3572 | } | |
3573 | else | |
3574 | add_unwind_entry (output_br_mem (brmask)); | |
3575 | ||
3576 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
3577 | ignore_rest_of_line (); | |
800eeca4 JW |
3578 | } |
3579 | ||
197865e8 | 3580 | static void |
800eeca4 | 3581 | dot_savegf (dummy) |
2434f565 | 3582 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3583 | { |
3584 | expressionS e1, e2; | |
3585 | int sep; | |
3586 | sep = parse_operand (&e1); | |
3587 | if (sep == ',') | |
3588 | parse_operand (&e2); | |
197865e8 | 3589 | |
800eeca4 JW |
3590 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3591 | as_bad ("Both operands of .save.gf must be constants."); | |
3592 | else | |
3593 | { | |
3594 | int grmask = e1.X_add_number; | |
3595 | int frmask = e2.X_add_number; | |
3596 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3597 | } | |
3598 | } | |
3599 | ||
197865e8 | 3600 | static void |
800eeca4 | 3601 | dot_spill (dummy) |
2434f565 | 3602 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3603 | { |
3604 | expressionS e; | |
e0c9811a JW |
3605 | unsigned char sep; |
3606 | ||
3607 | sep = parse_operand (&e); | |
3608 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
3609 | ignore_rest_of_line (); | |
197865e8 | 3610 | |
800eeca4 JW |
3611 | if (e.X_op != O_constant) |
3612 | as_bad ("Operand to .spill must be a constant"); | |
3613 | else | |
e0c9811a JW |
3614 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3615 | } | |
3616 | ||
3617 | static void | |
3618 | dot_spillreg (dummy) | |
2434f565 | 3619 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3620 | { |
3621 | int sep, ab, xy, reg, treg; | |
3622 | expressionS e1, e2; | |
3623 | ||
3624 | sep = parse_operand (&e1); | |
3625 | if (sep != ',') | |
3626 | { | |
3627 | as_bad ("No second operand to .spillreg"); | |
3628 | return; | |
3629 | } | |
3630 | ||
3631 | parse_operand (&e2); | |
3632 | ||
3633 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3634 | { |
e0c9811a JW |
3635 | as_bad ("First operand to .spillreg must be a preserved register"); |
3636 | return; | |
800eeca4 | 3637 | } |
e0c9811a JW |
3638 | |
3639 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3640 | { | |
3641 | as_bad ("Second operand to .spillreg must be a register"); | |
3642 | return; | |
3643 | } | |
3644 | ||
3645 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3646 | } | |
3647 | ||
3648 | static void | |
3649 | dot_spillmem (psprel) | |
3650 | int psprel; | |
3651 | { | |
3652 | expressionS e1, e2; | |
3653 | int sep, ab, reg; | |
3654 | ||
3655 | sep = parse_operand (&e1); | |
3656 | if (sep != ',') | |
3657 | { | |
3658 | as_bad ("Second operand missing"); | |
3659 | return; | |
3660 | } | |
3661 | ||
3662 | parse_operand (&e2); | |
3663 | ||
3664 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3665 | { | |
3666 | as_bad ("First operand to .spill%s must be a preserved register", | |
3667 | psprel ? "psp" : "sp"); | |
3668 | return; | |
3669 | } | |
3670 | ||
3671 | if (e2.X_op != O_constant) | |
3672 | { | |
3673 | as_bad ("Second operand to .spill%s must be a constant", | |
3674 | psprel ? "psp" : "sp"); | |
3675 | return; | |
3676 | } | |
3677 | ||
3678 | if (psprel) | |
3679 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
3680 | else | |
3681 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
3682 | } | |
3683 | ||
3684 | static void | |
3685 | dot_spillreg_p (dummy) | |
2434f565 | 3686 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3687 | { |
3688 | int sep, ab, xy, reg, treg; | |
3689 | expressionS e1, e2, e3; | |
3690 | unsigned int qp; | |
3691 | ||
3692 | sep = parse_operand (&e1); | |
3693 | if (sep != ',') | |
3694 | { | |
3695 | as_bad ("No second and third operand to .spillreg.p"); | |
3696 | return; | |
3697 | } | |
3698 | ||
3699 | sep = parse_operand (&e2); | |
3700 | if (sep != ',') | |
3701 | { | |
3702 | as_bad ("No third operand to .spillreg.p"); | |
3703 | return; | |
3704 | } | |
3705 | ||
3706 | parse_operand (&e3); | |
3707 | ||
3708 | qp = e1.X_add_number - REG_P; | |
3709 | ||
3710 | if (e1.X_op != O_register || qp > 63) | |
3711 | { | |
3712 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
3713 | return; | |
3714 | } | |
3715 | ||
3716 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3717 | { | |
3718 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
3719 | return; | |
3720 | } | |
3721 | ||
3722 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
3723 | { | |
3724 | as_bad ("Third operand to .spillreg.p must be a register"); | |
3725 | return; | |
3726 | } | |
3727 | ||
3728 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
3729 | } | |
3730 | ||
3731 | static void | |
3732 | dot_spillmem_p (psprel) | |
3733 | int psprel; | |
3734 | { | |
3735 | expressionS e1, e2, e3; | |
3736 | int sep, ab, reg; | |
3737 | unsigned int qp; | |
3738 | ||
3739 | sep = parse_operand (&e1); | |
3740 | if (sep != ',') | |
3741 | { | |
3742 | as_bad ("Second operand missing"); | |
3743 | return; | |
3744 | } | |
3745 | ||
3746 | parse_operand (&e2); | |
3747 | if (sep != ',') | |
3748 | { | |
3749 | as_bad ("Second operand missing"); | |
3750 | return; | |
3751 | } | |
3752 | ||
3753 | parse_operand (&e3); | |
3754 | ||
3755 | qp = e1.X_add_number - REG_P; | |
3756 | if (e1.X_op != O_register || qp > 63) | |
3757 | { | |
3758 | as_bad ("First operand to .spill%s_p must be a predicate", | |
3759 | psprel ? "psp" : "sp"); | |
3760 | return; | |
3761 | } | |
3762 | ||
3763 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3764 | { | |
3765 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
3766 | psprel ? "psp" : "sp"); | |
3767 | return; | |
3768 | } | |
3769 | ||
3770 | if (e3.X_op != O_constant) | |
3771 | { | |
3772 | as_bad ("Third operand to .spill%s_p must be a constant", | |
3773 | psprel ? "psp" : "sp"); | |
3774 | return; | |
3775 | } | |
3776 | ||
3777 | if (psprel) | |
fa7fda74 | 3778 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 3779 | else |
fa7fda74 | 3780 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
3781 | } |
3782 | ||
6290819d NC |
3783 | static unsigned int |
3784 | get_saved_prologue_count (lbl) | |
3785 | unsigned long lbl; | |
3786 | { | |
3787 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3788 | ||
3789 | while (lpc != NULL && lpc->label_number != lbl) | |
3790 | lpc = lpc->next; | |
3791 | ||
3792 | if (lpc != NULL) | |
3793 | return lpc->prologue_count; | |
3794 | ||
3795 | as_bad ("Missing .label_state %ld", lbl); | |
3796 | return 1; | |
3797 | } | |
3798 | ||
3799 | static void | |
3800 | save_prologue_count (lbl, count) | |
3801 | unsigned long lbl; | |
3802 | unsigned int count; | |
3803 | { | |
3804 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3805 | ||
3806 | while (lpc != NULL && lpc->label_number != lbl) | |
3807 | lpc = lpc->next; | |
3808 | ||
3809 | if (lpc != NULL) | |
3810 | lpc->prologue_count = count; | |
3811 | else | |
3812 | { | |
40449e9f | 3813 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
3814 | |
3815 | new_lpc->next = unwind.saved_prologue_counts; | |
3816 | new_lpc->label_number = lbl; | |
3817 | new_lpc->prologue_count = count; | |
3818 | unwind.saved_prologue_counts = new_lpc; | |
3819 | } | |
3820 | } | |
3821 | ||
3822 | static void | |
3823 | free_saved_prologue_counts () | |
3824 | { | |
40449e9f KH |
3825 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
3826 | label_prologue_count *next; | |
6290819d NC |
3827 | |
3828 | while (lpc != NULL) | |
3829 | { | |
3830 | next = lpc->next; | |
3831 | free (lpc); | |
3832 | lpc = next; | |
3833 | } | |
3834 | ||
3835 | unwind.saved_prologue_counts = NULL; | |
3836 | } | |
3837 | ||
e0c9811a JW |
3838 | static void |
3839 | dot_label_state (dummy) | |
2434f565 | 3840 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3841 | { |
3842 | expressionS e; | |
3843 | ||
3844 | parse_operand (&e); | |
3845 | if (e.X_op != O_constant) | |
3846 | { | |
3847 | as_bad ("Operand to .label_state must be a constant"); | |
3848 | return; | |
3849 | } | |
3850 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 3851 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
3852 | } |
3853 | ||
3854 | static void | |
3855 | dot_copy_state (dummy) | |
2434f565 | 3856 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3857 | { |
3858 | expressionS e; | |
3859 | ||
3860 | parse_operand (&e); | |
3861 | if (e.X_op != O_constant) | |
3862 | { | |
3863 | as_bad ("Operand to .copy_state must be a constant"); | |
3864 | return; | |
3865 | } | |
3866 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 3867 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
3868 | } |
3869 | ||
197865e8 | 3870 | static void |
800eeca4 | 3871 | dot_unwabi (dummy) |
2434f565 | 3872 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3873 | { |
e0c9811a JW |
3874 | expressionS e1, e2; |
3875 | unsigned char sep; | |
3876 | ||
3877 | sep = parse_operand (&e1); | |
3878 | if (sep != ',') | |
3879 | { | |
3880 | as_bad ("Second operand to .unwabi missing"); | |
3881 | return; | |
3882 | } | |
3883 | sep = parse_operand (&e2); | |
3884 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
3885 | ignore_rest_of_line (); | |
3886 | ||
3887 | if (e1.X_op != O_constant) | |
3888 | { | |
3889 | as_bad ("First operand to .unwabi must be a constant"); | |
3890 | return; | |
3891 | } | |
3892 | ||
3893 | if (e2.X_op != O_constant) | |
3894 | { | |
3895 | as_bad ("Second operand to .unwabi must be a constant"); | |
3896 | return; | |
3897 | } | |
3898 | ||
3899 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
3900 | } |
3901 | ||
197865e8 | 3902 | static void |
800eeca4 | 3903 | dot_personality (dummy) |
2434f565 | 3904 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3905 | { |
3906 | char *name, *p, c; | |
3907 | SKIP_WHITESPACE (); | |
3908 | name = input_line_pointer; | |
3909 | c = get_symbol_end (); | |
3910 | p = input_line_pointer; | |
e0c9811a | 3911 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 3912 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
3913 | *p = c; |
3914 | SKIP_WHITESPACE (); | |
3915 | demand_empty_rest_of_line (); | |
3916 | } | |
3917 | ||
3918 | static void | |
3919 | dot_proc (dummy) | |
2434f565 | 3920 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3921 | { |
3922 | char *name, *p, c; | |
3923 | symbolS *sym; | |
3924 | ||
e0c9811a JW |
3925 | unwind.proc_start = expr_build_dot (); |
3926 | /* Parse names of main and alternate entry points and mark them as | |
542d6675 | 3927 | function symbols: */ |
800eeca4 JW |
3928 | while (1) |
3929 | { | |
3930 | SKIP_WHITESPACE (); | |
3931 | name = input_line_pointer; | |
3932 | c = get_symbol_end (); | |
3933 | p = input_line_pointer; | |
3934 | sym = symbol_find_or_make (name); | |
e0c9811a | 3935 | if (unwind.proc_start == 0) |
542d6675 | 3936 | { |
e0c9811a | 3937 | unwind.proc_start = sym; |
800eeca4 JW |
3938 | } |
3939 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
3940 | *p = c; | |
3941 | SKIP_WHITESPACE (); | |
3942 | if (*input_line_pointer != ',') | |
3943 | break; | |
3944 | ++input_line_pointer; | |
3945 | } | |
3946 | demand_empty_rest_of_line (); | |
3947 | ia64_do_align (16); | |
3948 | ||
33d01f33 | 3949 | unwind.prologue_count = 0; |
e0c9811a JW |
3950 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
3951 | unwind.personality_routine = 0; | |
800eeca4 JW |
3952 | } |
3953 | ||
3954 | static void | |
3955 | dot_body (dummy) | |
2434f565 | 3956 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3957 | { |
e0c9811a | 3958 | unwind.prologue = 0; |
30d25259 RH |
3959 | unwind.prologue_mask = 0; |
3960 | ||
800eeca4 | 3961 | add_unwind_entry (output_body ()); |
e0c9811a | 3962 | demand_empty_rest_of_line (); |
800eeca4 JW |
3963 | } |
3964 | ||
3965 | static void | |
3966 | dot_prologue (dummy) | |
2434f565 | 3967 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3968 | { |
e0c9811a | 3969 | unsigned char sep; |
2434f565 | 3970 | int mask = 0, grsave = 0; |
e0c9811a | 3971 | |
e0c9811a | 3972 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
3973 | { |
3974 | expressionS e1, e2; | |
800eeca4 JW |
3975 | sep = parse_operand (&e1); |
3976 | if (sep != ',') | |
3977 | as_bad ("No second operand to .prologue"); | |
3978 | sep = parse_operand (&e2); | |
e0c9811a | 3979 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
542d6675 | 3980 | ignore_rest_of_line (); |
800eeca4 JW |
3981 | |
3982 | if (e1.X_op == O_constant) | |
542d6675 | 3983 | { |
30d25259 RH |
3984 | mask = e1.X_add_number; |
3985 | ||
800eeca4 | 3986 | if (e2.X_op == O_constant) |
30d25259 RH |
3987 | grsave = e2.X_add_number; |
3988 | else if (e2.X_op == O_register | |
3989 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
3990 | ; | |
800eeca4 | 3991 | else |
30d25259 RH |
3992 | as_bad ("Second operand not a constant or general register"); |
3993 | ||
3994 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
3995 | } |
3996 | else | |
3997 | as_bad ("First operand not a constant"); | |
3998 | } | |
3999 | else | |
4000 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4001 | |
4002 | unwind.prologue = 1; | |
4003 | unwind.prologue_mask = mask; | |
33d01f33 | 4004 | ++unwind.prologue_count; |
800eeca4 JW |
4005 | } |
4006 | ||
4007 | static void | |
4008 | dot_endp (dummy) | |
2434f565 | 4009 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4010 | { |
4011 | expressionS e; | |
4012 | unsigned char *ptr; | |
44f5c83a | 4013 | int bytes_per_address; |
800eeca4 JW |
4014 | long where; |
4015 | segT saved_seg; | |
4016 | subsegT saved_subseg; | |
91a2ae2a | 4017 | const char *sec_name, *text_name; |
c538998c JJ |
4018 | char *name, *p, c; |
4019 | symbolS *sym; | |
800eeca4 | 4020 | |
91a2ae2a RH |
4021 | if (unwind.saved_text_seg) |
4022 | { | |
4023 | saved_seg = unwind.saved_text_seg; | |
4024 | saved_subseg = unwind.saved_text_subseg; | |
4025 | unwind.saved_text_seg = NULL; | |
4026 | } | |
4027 | else | |
4028 | { | |
4029 | saved_seg = now_seg; | |
4030 | saved_subseg = now_subseg; | |
4031 | } | |
4032 | ||
4033 | /* | |
4034 | Use a slightly ugly scheme to derive the unwind section names from | |
4035 | the text section name: | |
4036 | ||
4037 | text sect. unwind table sect. | |
4038 | name: name: comments: | |
4039 | ---------- ----------------- -------------------------------- | |
4040 | .text .IA_64.unwind | |
4041 | .text.foo .IA_64.unwind.text.foo | |
4042 | .foo .IA_64.unwind.foo | |
579f31ac JJ |
4043 | .gnu.linkonce.t.foo |
4044 | .gnu.linkonce.ia64unw.foo | |
91a2ae2a RH |
4045 | _info .IA_64.unwind_info gas issues error message (ditto) |
4046 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
4047 | ||
4048 | This mapping is done so that: | |
4049 | ||
4050 | (a) An object file with unwind info only in .text will use | |
4051 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
4052 | This follows the letter of the ABI and also ensures backwards | |
4053 | compatibility with older toolchains. | |
4054 | ||
4055 | (b) An object file with unwind info in multiple text sections | |
4056 | will use separate unwind sections for each text section. | |
4057 | This allows us to properly set the "sh_info" and "sh_link" | |
4058 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
4059 | lets GNU ld support programs with multiple segments | |
4060 | containing unwind info (as might be the case for certain | |
4061 | embedded applications). | |
40449e9f | 4062 | |
91a2ae2a RH |
4063 | (c) An error is issued if there would be a name clash. |
4064 | */ | |
4065 | text_name = segment_name (saved_seg); | |
4066 | if (strncmp (text_name, "_info", 5) == 0) | |
4067 | { | |
4068 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
4069 | text_name); | |
4070 | ignore_rest_of_line (); | |
4071 | return; | |
4072 | } | |
4073 | if (strcmp (text_name, ".text") == 0) | |
4074 | text_name = ""; | |
800eeca4 | 4075 | |
800eeca4 | 4076 | insn_group_break (1, 0, 0); |
800eeca4 | 4077 | |
91a2ae2a RH |
4078 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4079 | if (!unwind.info) | |
4080 | generate_unwind_image (text_name); | |
800eeca4 | 4081 | |
91a2ae2a RH |
4082 | if (unwind.info || unwind.force_unwind_entry) |
4083 | { | |
4084 | subseg_set (md.last_text_seg, 0); | |
4085 | unwind.proc_end = expr_build_dot (); | |
5e7474a7 | 4086 | |
91a2ae2a RH |
4087 | make_unw_section_name (SPECIAL_SECTION_UNWIND, text_name, sec_name); |
4088 | set_section ((char *) sec_name); | |
4089 | bfd_set_section_flags (stdoutput, now_seg, | |
4090 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
5e7474a7 | 4091 | |
557debba JW |
4092 | /* Make sure that section has 4 byte alignment for ILP32 and |
4093 | 8 byte alignment for LP64. */ | |
4094 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4095 | |
557debba JW |
4096 | /* Need space for 3 pointers for procedure start, procedure end, |
4097 | and unwind info. */ | |
4098 | ptr = frag_more (3 * md.pointer_size); | |
4099 | where = frag_now_fix () - (3 * md.pointer_size); | |
91a2ae2a | 4100 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4101 | |
40449e9f | 4102 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4103 | e.X_op = O_pseudo_fixup; |
4104 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4105 | e.X_add_number = 0; | |
4106 | e.X_add_symbol = unwind.proc_start; | |
4107 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); | |
800eeca4 | 4108 | |
800eeca4 JW |
4109 | e.X_op = O_pseudo_fixup; |
4110 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4111 | e.X_add_number = 0; | |
91a2ae2a RH |
4112 | e.X_add_symbol = unwind.proc_end; |
4113 | ia64_cons_fix_new (frag_now, where + bytes_per_address, | |
4114 | bytes_per_address, &e); | |
4115 | ||
4116 | if (unwind.info) | |
4117 | { | |
4118 | e.X_op = O_pseudo_fixup; | |
4119 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4120 | e.X_add_number = 0; | |
4121 | e.X_add_symbol = unwind.info; | |
4122 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4123 | bytes_per_address, &e); | |
4124 | } | |
4125 | else | |
4126 | md_number_to_chars (ptr + (bytes_per_address * 2), 0, | |
4127 | bytes_per_address); | |
800eeca4 | 4128 | |
91a2ae2a | 4129 | } |
800eeca4 | 4130 | subseg_set (saved_seg, saved_subseg); |
c538998c JJ |
4131 | |
4132 | /* Parse names of main and alternate entry points and set symbol sizes. */ | |
4133 | while (1) | |
4134 | { | |
4135 | SKIP_WHITESPACE (); | |
4136 | name = input_line_pointer; | |
4137 | c = get_symbol_end (); | |
4138 | p = input_line_pointer; | |
4139 | sym = symbol_find (name); | |
4140 | if (sym && unwind.proc_start | |
4141 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4142 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4143 | { | |
4144 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4145 | fragS *frag = symbol_get_frag (sym); | |
4146 | ||
4147 | /* Check whether the function label is at or beyond last | |
4148 | .proc directive. */ | |
4149 | while (fr && fr != frag) | |
4150 | fr = fr->fr_next; | |
4151 | if (fr) | |
4152 | { | |
4153 | if (frag == frag_now && SEG_NORMAL (now_seg)) | |
4154 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4155 | else | |
4156 | { | |
4157 | symbol_get_obj (sym)->size = | |
4158 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4159 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4160 | symbol_get_obj (sym)->size->X_add_symbol | |
4161 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4162 | frag_now_fix (), frag_now); | |
4163 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4164 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4165 | } | |
4166 | } | |
4167 | } | |
4168 | *p = c; | |
4169 | SKIP_WHITESPACE (); | |
4170 | if (*input_line_pointer != ',') | |
4171 | break; | |
4172 | ++input_line_pointer; | |
4173 | } | |
4174 | demand_empty_rest_of_line (); | |
e0c9811a | 4175 | unwind.proc_start = unwind.proc_end = unwind.info = 0; |
800eeca4 JW |
4176 | } |
4177 | ||
4178 | static void | |
4179 | dot_template (template) | |
4180 | int template; | |
4181 | { | |
4182 | CURR_SLOT.user_template = template; | |
4183 | } | |
4184 | ||
4185 | static void | |
4186 | dot_regstk (dummy) | |
2434f565 | 4187 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4188 | { |
4189 | int ins, locs, outs, rots; | |
4190 | ||
4191 | if (is_it_end_of_statement ()) | |
4192 | ins = locs = outs = rots = 0; | |
4193 | else | |
4194 | { | |
4195 | ins = get_absolute_expression (); | |
4196 | if (*input_line_pointer++ != ',') | |
4197 | goto err; | |
4198 | locs = get_absolute_expression (); | |
4199 | if (*input_line_pointer++ != ',') | |
4200 | goto err; | |
4201 | outs = get_absolute_expression (); | |
4202 | if (*input_line_pointer++ != ',') | |
4203 | goto err; | |
4204 | rots = get_absolute_expression (); | |
4205 | } | |
4206 | set_regstack (ins, locs, outs, rots); | |
4207 | return; | |
4208 | ||
4209 | err: | |
4210 | as_bad ("Comma expected"); | |
4211 | ignore_rest_of_line (); | |
4212 | } | |
4213 | ||
4214 | static void | |
4215 | dot_rot (type) | |
4216 | int type; | |
4217 | { | |
4218 | unsigned num_regs, num_alloced = 0; | |
4219 | struct dynreg **drpp, *dr; | |
4220 | int ch, base_reg = 0; | |
4221 | char *name, *start; | |
4222 | size_t len; | |
4223 | ||
4224 | switch (type) | |
4225 | { | |
4226 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4227 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4228 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4229 | default: break; | |
4230 | } | |
4231 | ||
542d6675 | 4232 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4233 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4234 | { | |
4235 | hash_delete (md.dynreg_hash, dr->name); | |
4236 | dr->num_regs = 0; | |
4237 | } | |
4238 | ||
4239 | drpp = &md.dynreg[type]; | |
4240 | while (1) | |
4241 | { | |
4242 | start = input_line_pointer; | |
4243 | ch = get_symbol_end (); | |
4244 | *input_line_pointer = ch; | |
4245 | len = (input_line_pointer - start); | |
4246 | ||
4247 | SKIP_WHITESPACE (); | |
4248 | if (*input_line_pointer != '[') | |
4249 | { | |
4250 | as_bad ("Expected '['"); | |
4251 | goto err; | |
4252 | } | |
4253 | ++input_line_pointer; /* skip '[' */ | |
4254 | ||
4255 | num_regs = get_absolute_expression (); | |
4256 | ||
4257 | if (*input_line_pointer++ != ']') | |
4258 | { | |
4259 | as_bad ("Expected ']'"); | |
4260 | goto err; | |
4261 | } | |
4262 | SKIP_WHITESPACE (); | |
4263 | ||
4264 | num_alloced += num_regs; | |
4265 | switch (type) | |
4266 | { | |
4267 | case DYNREG_GR: | |
4268 | if (num_alloced > md.rot.num_regs) | |
4269 | { | |
4270 | as_bad ("Used more than the declared %d rotating registers", | |
4271 | md.rot.num_regs); | |
4272 | goto err; | |
4273 | } | |
4274 | break; | |
4275 | case DYNREG_FR: | |
4276 | if (num_alloced > 96) | |
4277 | { | |
4278 | as_bad ("Used more than the available 96 rotating registers"); | |
4279 | goto err; | |
4280 | } | |
4281 | break; | |
4282 | case DYNREG_PR: | |
4283 | if (num_alloced > 48) | |
4284 | { | |
4285 | as_bad ("Used more than the available 48 rotating registers"); | |
4286 | goto err; | |
4287 | } | |
4288 | break; | |
4289 | ||
4290 | default: | |
4291 | break; | |
4292 | } | |
4293 | ||
4294 | name = obstack_alloc (¬es, len + 1); | |
4295 | memcpy (name, start, len); | |
4296 | name[len] = '\0'; | |
4297 | ||
4298 | if (!*drpp) | |
4299 | { | |
4300 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4301 | memset (*drpp, 0, sizeof (*dr)); | |
4302 | } | |
4303 | ||
4304 | dr = *drpp; | |
4305 | dr->name = name; | |
4306 | dr->num_regs = num_regs; | |
4307 | dr->base = base_reg; | |
4308 | drpp = &dr->next; | |
4309 | base_reg += num_regs; | |
4310 | ||
4311 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4312 | { | |
4313 | as_bad ("Attempt to redefine register set `%s'", name); | |
4314 | goto err; | |
4315 | } | |
4316 | ||
4317 | if (*input_line_pointer != ',') | |
4318 | break; | |
4319 | ++input_line_pointer; /* skip comma */ | |
4320 | SKIP_WHITESPACE (); | |
4321 | } | |
4322 | demand_empty_rest_of_line (); | |
4323 | return; | |
4324 | ||
4325 | err: | |
4326 | ignore_rest_of_line (); | |
4327 | } | |
4328 | ||
4329 | static void | |
4330 | dot_byteorder (byteorder) | |
4331 | int byteorder; | |
4332 | { | |
10a98291 L |
4333 | segment_info_type *seginfo = seg_info (now_seg); |
4334 | ||
4335 | if (byteorder == -1) | |
4336 | { | |
4337 | if (seginfo->tc_segment_info_data.endian == 0) | |
4338 | seginfo->tc_segment_info_data.endian | |
4339 | = TARGET_BYTES_BIG_ENDIAN ? 1 : 2; | |
4340 | byteorder = seginfo->tc_segment_info_data.endian == 1; | |
4341 | } | |
4342 | else | |
4343 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4344 | ||
4345 | if (target_big_endian != byteorder) | |
4346 | { | |
4347 | target_big_endian = byteorder; | |
4348 | if (target_big_endian) | |
4349 | { | |
4350 | ia64_number_to_chars = number_to_chars_bigendian; | |
4351 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4352 | } | |
4353 | else | |
4354 | { | |
4355 | ia64_number_to_chars = number_to_chars_littleendian; | |
4356 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4357 | } | |
4358 | } | |
800eeca4 JW |
4359 | } |
4360 | ||
4361 | static void | |
4362 | dot_psr (dummy) | |
2434f565 | 4363 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4364 | { |
4365 | char *option; | |
4366 | int ch; | |
4367 | ||
4368 | while (1) | |
4369 | { | |
4370 | option = input_line_pointer; | |
4371 | ch = get_symbol_end (); | |
4372 | if (strcmp (option, "lsb") == 0) | |
4373 | md.flags &= ~EF_IA_64_BE; | |
4374 | else if (strcmp (option, "msb") == 0) | |
4375 | md.flags |= EF_IA_64_BE; | |
4376 | else if (strcmp (option, "abi32") == 0) | |
4377 | md.flags &= ~EF_IA_64_ABI64; | |
4378 | else if (strcmp (option, "abi64") == 0) | |
4379 | md.flags |= EF_IA_64_ABI64; | |
4380 | else | |
4381 | as_bad ("Unknown psr option `%s'", option); | |
4382 | *input_line_pointer = ch; | |
4383 | ||
4384 | SKIP_WHITESPACE (); | |
4385 | if (*input_line_pointer != ',') | |
4386 | break; | |
4387 | ||
4388 | ++input_line_pointer; | |
4389 | SKIP_WHITESPACE (); | |
4390 | } | |
4391 | demand_empty_rest_of_line (); | |
4392 | } | |
4393 | ||
800eeca4 JW |
4394 | static void |
4395 | dot_ln (dummy) | |
2434f565 | 4396 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4397 | { |
4398 | new_logical_line (0, get_absolute_expression ()); | |
4399 | demand_empty_rest_of_line (); | |
4400 | } | |
4401 | ||
542d6675 | 4402 | static char * |
800eeca4 JW |
4403 | parse_section_name () |
4404 | { | |
4405 | char *name; | |
4406 | int len; | |
4407 | ||
4408 | SKIP_WHITESPACE (); | |
4409 | if (*input_line_pointer != '"') | |
4410 | { | |
4411 | as_bad ("Missing section name"); | |
4412 | ignore_rest_of_line (); | |
4413 | return 0; | |
4414 | } | |
4415 | name = demand_copy_C_string (&len); | |
4416 | if (!name) | |
4417 | { | |
4418 | ignore_rest_of_line (); | |
4419 | return 0; | |
4420 | } | |
4421 | SKIP_WHITESPACE (); | |
4422 | if (*input_line_pointer != ',') | |
4423 | { | |
4424 | as_bad ("Comma expected after section name"); | |
4425 | ignore_rest_of_line (); | |
4426 | return 0; | |
4427 | } | |
4428 | ++input_line_pointer; /* skip comma */ | |
4429 | return name; | |
4430 | } | |
4431 | ||
4432 | static void | |
4433 | dot_xdata (size) | |
4434 | int size; | |
4435 | { | |
4436 | char *name = parse_section_name (); | |
4437 | if (!name) | |
4438 | return; | |
4439 | ||
4d5a53ff | 4440 | md.keep_pending_output = 1; |
800eeca4 JW |
4441 | set_section (name); |
4442 | cons (size); | |
4443 | obj_elf_previous (0); | |
4d5a53ff | 4444 | md.keep_pending_output = 0; |
800eeca4 JW |
4445 | } |
4446 | ||
4447 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4448 | |
800eeca4 JW |
4449 | static void |
4450 | stmt_float_cons (kind) | |
4451 | int kind; | |
4452 | { | |
165a7f90 | 4453 | size_t alignment; |
800eeca4 JW |
4454 | |
4455 | switch (kind) | |
4456 | { | |
165a7f90 L |
4457 | case 'd': |
4458 | alignment = 8; | |
4459 | break; | |
4460 | ||
4461 | case 'x': | |
4462 | case 'X': | |
4463 | alignment = 16; | |
4464 | break; | |
800eeca4 JW |
4465 | |
4466 | case 'f': | |
4467 | default: | |
165a7f90 | 4468 | alignment = 4; |
800eeca4 JW |
4469 | break; |
4470 | } | |
165a7f90 | 4471 | ia64_do_align (alignment); |
800eeca4 JW |
4472 | float_cons (kind); |
4473 | } | |
4474 | ||
4475 | static void | |
4476 | stmt_cons_ua (size) | |
4477 | int size; | |
4478 | { | |
4479 | int saved_auto_align = md.auto_align; | |
4480 | ||
4481 | md.auto_align = 0; | |
4482 | cons (size); | |
4483 | md.auto_align = saved_auto_align; | |
4484 | } | |
4485 | ||
4486 | static void | |
4487 | dot_xfloat_cons (kind) | |
4488 | int kind; | |
4489 | { | |
4490 | char *name = parse_section_name (); | |
4491 | if (!name) | |
4492 | return; | |
4493 | ||
4d5a53ff | 4494 | md.keep_pending_output = 1; |
800eeca4 JW |
4495 | set_section (name); |
4496 | stmt_float_cons (kind); | |
4497 | obj_elf_previous (0); | |
4d5a53ff | 4498 | md.keep_pending_output = 0; |
800eeca4 JW |
4499 | } |
4500 | ||
4501 | static void | |
4502 | dot_xstringer (zero) | |
4503 | int zero; | |
4504 | { | |
4505 | char *name = parse_section_name (); | |
4506 | if (!name) | |
4507 | return; | |
4508 | ||
4d5a53ff | 4509 | md.keep_pending_output = 1; |
800eeca4 JW |
4510 | set_section (name); |
4511 | stringer (zero); | |
4512 | obj_elf_previous (0); | |
4d5a53ff | 4513 | md.keep_pending_output = 0; |
800eeca4 JW |
4514 | } |
4515 | ||
4516 | static void | |
4517 | dot_xdata_ua (size) | |
4518 | int size; | |
4519 | { | |
4520 | int saved_auto_align = md.auto_align; | |
4521 | char *name = parse_section_name (); | |
4522 | if (!name) | |
4523 | return; | |
4524 | ||
4d5a53ff | 4525 | md.keep_pending_output = 1; |
800eeca4 JW |
4526 | set_section (name); |
4527 | md.auto_align = 0; | |
4528 | cons (size); | |
4529 | md.auto_align = saved_auto_align; | |
4530 | obj_elf_previous (0); | |
4d5a53ff | 4531 | md.keep_pending_output = 0; |
800eeca4 JW |
4532 | } |
4533 | ||
4534 | static void | |
4535 | dot_xfloat_cons_ua (kind) | |
4536 | int kind; | |
4537 | { | |
4538 | int saved_auto_align = md.auto_align; | |
4539 | char *name = parse_section_name (); | |
4540 | if (!name) | |
4541 | return; | |
4542 | ||
4d5a53ff | 4543 | md.keep_pending_output = 1; |
800eeca4 JW |
4544 | set_section (name); |
4545 | md.auto_align = 0; | |
4546 | stmt_float_cons (kind); | |
4547 | md.auto_align = saved_auto_align; | |
4548 | obj_elf_previous (0); | |
4d5a53ff | 4549 | md.keep_pending_output = 0; |
800eeca4 JW |
4550 | } |
4551 | ||
4552 | /* .reg.val <regname>,value */ | |
542d6675 | 4553 | |
800eeca4 JW |
4554 | static void |
4555 | dot_reg_val (dummy) | |
2434f565 | 4556 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4557 | { |
4558 | expressionS reg; | |
4559 | ||
4560 | expression (®); | |
4561 | if (reg.X_op != O_register) | |
4562 | { | |
4563 | as_bad (_("Register name expected")); | |
4564 | ignore_rest_of_line (); | |
4565 | } | |
4566 | else if (*input_line_pointer++ != ',') | |
4567 | { | |
4568 | as_bad (_("Comma expected")); | |
4569 | ignore_rest_of_line (); | |
4570 | } | |
197865e8 | 4571 | else |
800eeca4 JW |
4572 | { |
4573 | valueT value = get_absolute_expression (); | |
4574 | int regno = reg.X_add_number; | |
542d6675 KH |
4575 | if (regno < REG_GR || regno > REG_GR + 128) |
4576 | as_warn (_("Register value annotation ignored")); | |
800eeca4 | 4577 | else |
542d6675 KH |
4578 | { |
4579 | gr_values[regno - REG_GR].known = 1; | |
4580 | gr_values[regno - REG_GR].value = value; | |
4581 | gr_values[regno - REG_GR].path = md.path; | |
4582 | } | |
800eeca4 JW |
4583 | } |
4584 | demand_empty_rest_of_line (); | |
4585 | } | |
4586 | ||
197865e8 | 4587 | /* select dv checking mode |
800eeca4 JW |
4588 | .auto |
4589 | .explicit | |
4590 | .default | |
4591 | ||
197865e8 | 4592 | A stop is inserted when changing modes |
800eeca4 | 4593 | */ |
542d6675 | 4594 | |
800eeca4 JW |
4595 | static void |
4596 | dot_dv_mode (type) | |
542d6675 | 4597 | int type; |
800eeca4 JW |
4598 | { |
4599 | if (md.manual_bundling) | |
4600 | as_warn (_("Directive invalid within a bundle")); | |
4601 | ||
4602 | if (type == 'E' || type == 'A') | |
4603 | md.mode_explicitly_set = 0; | |
4604 | else | |
4605 | md.mode_explicitly_set = 1; | |
4606 | ||
4607 | md.detect_dv = 1; | |
4608 | switch (type) | |
4609 | { | |
4610 | case 'A': | |
4611 | case 'a': | |
4612 | if (md.explicit_mode) | |
542d6675 | 4613 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4614 | md.explicit_mode = 0; |
4615 | break; | |
4616 | case 'E': | |
4617 | case 'e': | |
4618 | if (!md.explicit_mode) | |
542d6675 | 4619 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4620 | md.explicit_mode = 1; |
4621 | break; | |
4622 | default: | |
4623 | case 'd': | |
4624 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4625 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4626 | md.explicit_mode = md.default_explicit_mode; |
4627 | md.mode_explicitly_set = 0; | |
4628 | break; | |
4629 | } | |
4630 | } | |
4631 | ||
4632 | static void | |
4633 | print_prmask (mask) | |
542d6675 | 4634 | valueT mask; |
800eeca4 JW |
4635 | { |
4636 | int regno; | |
4637 | char *comma = ""; | |
542d6675 | 4638 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4639 | { |
542d6675 KH |
4640 | if (mask & ((valueT) 1 << regno)) |
4641 | { | |
4642 | fprintf (stderr, "%s p%d", comma, regno); | |
4643 | comma = ","; | |
4644 | } | |
800eeca4 JW |
4645 | } |
4646 | } | |
4647 | ||
4648 | /* | |
4649 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear") | |
4650 | .pred.rel.imply p1, p2 (also .pred.rel "imply") | |
4651 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex") | |
4652 | .pred.safe_across_calls p1 [, p2 [,...]] | |
4653 | */ | |
542d6675 | 4654 | |
800eeca4 JW |
4655 | static void |
4656 | dot_pred_rel (type) | |
542d6675 | 4657 | int type; |
800eeca4 JW |
4658 | { |
4659 | valueT mask = 0; | |
4660 | int count = 0; | |
4661 | int p1 = -1, p2 = -1; | |
4662 | ||
4663 | if (type == 0) | |
4664 | { | |
4665 | if (*input_line_pointer != '"') | |
542d6675 KH |
4666 | { |
4667 | as_bad (_("Missing predicate relation type")); | |
4668 | ignore_rest_of_line (); | |
4669 | return; | |
4670 | } | |
197865e8 | 4671 | else |
542d6675 KH |
4672 | { |
4673 | int len; | |
4674 | char *form = demand_copy_C_string (&len); | |
4675 | if (strcmp (form, "mutex") == 0) | |
4676 | type = 'm'; | |
4677 | else if (strcmp (form, "clear") == 0) | |
4678 | type = 'c'; | |
4679 | else if (strcmp (form, "imply") == 0) | |
4680 | type = 'i'; | |
4681 | else | |
4682 | { | |
4683 | as_bad (_("Unrecognized predicate relation type")); | |
4684 | ignore_rest_of_line (); | |
4685 | return; | |
4686 | } | |
4687 | } | |
800eeca4 | 4688 | if (*input_line_pointer == ',') |
542d6675 | 4689 | ++input_line_pointer; |
800eeca4 JW |
4690 | SKIP_WHITESPACE (); |
4691 | } | |
4692 | ||
4693 | SKIP_WHITESPACE (); | |
4694 | while (1) | |
4695 | { | |
4696 | valueT bit = 1; | |
4697 | int regno; | |
197865e8 | 4698 | |
3882b010 | 4699 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4700 | || (regno = atoi (++input_line_pointer)) < 0 |
4701 | || regno > 63) | |
4702 | { | |
4703 | as_bad (_("Predicate register expected")); | |
4704 | ignore_rest_of_line (); | |
4705 | return; | |
4706 | } | |
3882b010 | 4707 | while (ISDIGIT (*input_line_pointer)) |
542d6675 | 4708 | ++input_line_pointer; |
800eeca4 | 4709 | if (p1 == -1) |
542d6675 | 4710 | p1 = regno; |
800eeca4 | 4711 | else if (p2 == -1) |
542d6675 | 4712 | p2 = regno; |
800eeca4 JW |
4713 | bit <<= regno; |
4714 | if (mask & bit) | |
542d6675 KH |
4715 | as_warn (_("Duplicate predicate register ignored")); |
4716 | mask |= bit; | |
4717 | count++; | |
4718 | /* See if it's a range. */ | |
800eeca4 | 4719 | if (*input_line_pointer == '-') |
542d6675 KH |
4720 | { |
4721 | valueT stop = 1; | |
4722 | ++input_line_pointer; | |
4723 | ||
3882b010 | 4724 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4725 | || (regno = atoi (++input_line_pointer)) < 0 |
4726 | || regno > 63) | |
4727 | { | |
4728 | as_bad (_("Predicate register expected")); | |
4729 | ignore_rest_of_line (); | |
4730 | return; | |
4731 | } | |
3882b010 | 4732 | while (ISDIGIT (*input_line_pointer)) |
542d6675 KH |
4733 | ++input_line_pointer; |
4734 | stop <<= regno; | |
4735 | if (bit >= stop) | |
4736 | { | |
4737 | as_bad (_("Bad register range")); | |
4738 | ignore_rest_of_line (); | |
4739 | return; | |
4740 | } | |
4741 | while (bit < stop) | |
4742 | { | |
4743 | bit <<= 1; | |
4744 | mask |= bit; | |
4745 | count++; | |
4746 | } | |
4747 | SKIP_WHITESPACE (); | |
4748 | } | |
800eeca4 | 4749 | if (*input_line_pointer != ',') |
542d6675 | 4750 | break; |
800eeca4 JW |
4751 | ++input_line_pointer; |
4752 | SKIP_WHITESPACE (); | |
4753 | } | |
4754 | ||
4755 | switch (type) | |
4756 | { | |
4757 | case 'c': | |
4758 | if (count == 0) | |
542d6675 | 4759 | mask = ~(valueT) 0; |
800eeca4 | 4760 | clear_qp_mutex (mask); |
197865e8 | 4761 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
4762 | break; |
4763 | case 'i': | |
4764 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 4765 | as_bad (_("Predicate source and target required")); |
800eeca4 | 4766 | else if (p1 == 0 || p2 == 0) |
542d6675 | 4767 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 4768 | else |
542d6675 | 4769 | add_qp_imply (p1, p2); |
800eeca4 JW |
4770 | break; |
4771 | case 'm': | |
4772 | if (count < 2) | |
542d6675 KH |
4773 | { |
4774 | as_bad (_("At least two PR arguments expected")); | |
4775 | break; | |
4776 | } | |
800eeca4 | 4777 | else if (mask & 1) |
542d6675 KH |
4778 | { |
4779 | as_bad (_("Use of p0 is not valid in this context")); | |
4780 | break; | |
4781 | } | |
800eeca4 JW |
4782 | add_qp_mutex (mask); |
4783 | break; | |
4784 | case 's': | |
4785 | /* note that we don't override any existing relations */ | |
4786 | if (count == 0) | |
542d6675 KH |
4787 | { |
4788 | as_bad (_("At least one PR argument expected")); | |
4789 | break; | |
4790 | } | |
800eeca4 | 4791 | if (md.debug_dv) |
542d6675 KH |
4792 | { |
4793 | fprintf (stderr, "Safe across calls: "); | |
4794 | print_prmask (mask); | |
4795 | fprintf (stderr, "\n"); | |
4796 | } | |
800eeca4 JW |
4797 | qp_safe_across_calls = mask; |
4798 | break; | |
4799 | } | |
4800 | demand_empty_rest_of_line (); | |
4801 | } | |
4802 | ||
4803 | /* .entry label [, label [, ...]] | |
4804 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
4805 | Otherwise, only global labels are considered entry points. */ |
4806 | ||
800eeca4 JW |
4807 | static void |
4808 | dot_entry (dummy) | |
2434f565 | 4809 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4810 | { |
4811 | const char *err; | |
4812 | char *name; | |
4813 | int c; | |
4814 | symbolS *symbolP; | |
4815 | ||
4816 | do | |
4817 | { | |
4818 | name = input_line_pointer; | |
4819 | c = get_symbol_end (); | |
4820 | symbolP = symbol_find_or_make (name); | |
4821 | ||
4822 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
4823 | if (err) | |
542d6675 KH |
4824 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
4825 | name, err); | |
800eeca4 JW |
4826 | |
4827 | *input_line_pointer = c; | |
4828 | SKIP_WHITESPACE (); | |
4829 | c = *input_line_pointer; | |
4830 | if (c == ',') | |
4831 | { | |
4832 | input_line_pointer++; | |
4833 | SKIP_WHITESPACE (); | |
4834 | if (*input_line_pointer == '\n') | |
4835 | c = '\n'; | |
4836 | } | |
4837 | } | |
4838 | while (c == ','); | |
4839 | ||
4840 | demand_empty_rest_of_line (); | |
4841 | } | |
4842 | ||
197865e8 | 4843 | /* .mem.offset offset, base |
542d6675 KH |
4844 | "base" is used to distinguish between offsets from a different base. */ |
4845 | ||
800eeca4 JW |
4846 | static void |
4847 | dot_mem_offset (dummy) | |
2434f565 | 4848 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4849 | { |
4850 | md.mem_offset.hint = 1; | |
4851 | md.mem_offset.offset = get_absolute_expression (); | |
4852 | if (*input_line_pointer != ',') | |
4853 | { | |
4854 | as_bad (_("Comma expected")); | |
4855 | ignore_rest_of_line (); | |
4856 | return; | |
4857 | } | |
4858 | ++input_line_pointer; | |
4859 | md.mem_offset.base = get_absolute_expression (); | |
4860 | demand_empty_rest_of_line (); | |
4861 | } | |
4862 | ||
542d6675 | 4863 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
4864 | const pseudo_typeS md_pseudo_table[] = |
4865 | { | |
4866 | { "radix", dot_radix, 0 }, | |
4867 | { "lcomm", s_lcomm_bytes, 1 }, | |
4868 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, | |
4869 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
4870 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
4871 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
4872 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
4873 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
4874 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
4875 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
4876 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
4877 | { "proc", dot_proc, 0 }, |
4878 | { "body", dot_body, 0 }, | |
4879 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 4880 | { "endp", dot_endp, 0 }, |
2434f565 JW |
4881 | |
4882 | { "fframe", dot_fframe, 0 }, | |
4883 | { "vframe", dot_vframe, 0 }, | |
4884 | { "vframesp", dot_vframesp, 0 }, | |
4885 | { "vframepsp", dot_vframepsp, 0 }, | |
4886 | { "save", dot_save, 0 }, | |
4887 | { "restore", dot_restore, 0 }, | |
4888 | { "restorereg", dot_restorereg, 0 }, | |
4889 | { "restorereg.p", dot_restorereg_p, 0 }, | |
4890 | { "handlerdata", dot_handlerdata, 0 }, | |
4891 | { "unwentry", dot_unwentry, 0 }, | |
4892 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
4893 | { "savesp", dot_savemem, 0 }, |
4894 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
4895 | { "save.g", dot_saveg, 0 }, |
4896 | { "save.f", dot_savef, 0 }, | |
4897 | { "save.b", dot_saveb, 0 }, | |
4898 | { "save.gf", dot_savegf, 0 }, | |
4899 | { "spill", dot_spill, 0 }, | |
4900 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
4901 | { "spillsp", dot_spillmem, 0 }, |
4902 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 4903 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
4904 | { "spillsp.p", dot_spillmem_p, 0 }, |
4905 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
4906 | { "label_state", dot_label_state, 0 }, |
4907 | { "copy_state", dot_copy_state, 0 }, | |
4908 | { "unwabi", dot_unwabi, 0 }, | |
4909 | { "personality", dot_personality, 0 }, | |
800eeca4 | 4910 | #if 0 |
2434f565 | 4911 | { "estate", dot_estate, 0 }, |
800eeca4 JW |
4912 | #endif |
4913 | { "mii", dot_template, 0x0 }, | |
4914 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
4915 | { "mlx", dot_template, 0x2 }, | |
4916 | { "mmi", dot_template, 0x4 }, | |
4917 | { "mfi", dot_template, 0x6 }, | |
4918 | { "mmf", dot_template, 0x7 }, | |
4919 | { "mib", dot_template, 0x8 }, | |
4920 | { "mbb", dot_template, 0x9 }, | |
4921 | { "bbb", dot_template, 0xb }, | |
4922 | { "mmb", dot_template, 0xc }, | |
4923 | { "mfb", dot_template, 0xe }, | |
4924 | #if 0 | |
4925 | { "lb", dot_scope, 0 }, | |
4926 | { "le", dot_scope, 1 }, | |
4927 | #endif | |
4928 | { "align", s_align_bytes, 0 }, | |
4929 | { "regstk", dot_regstk, 0 }, | |
4930 | { "rotr", dot_rot, DYNREG_GR }, | |
4931 | { "rotf", dot_rot, DYNREG_FR }, | |
4932 | { "rotp", dot_rot, DYNREG_PR }, | |
4933 | { "lsb", dot_byteorder, 0 }, | |
4934 | { "msb", dot_byteorder, 1 }, | |
4935 | { "psr", dot_psr, 0 }, | |
4936 | { "alias", dot_alias, 0 }, | |
35f5df7f | 4937 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
4938 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
4939 | ||
4940 | { "xdata1", dot_xdata, 1 }, | |
4941 | { "xdata2", dot_xdata, 2 }, | |
4942 | { "xdata4", dot_xdata, 4 }, | |
4943 | { "xdata8", dot_xdata, 8 }, | |
4944 | { "xreal4", dot_xfloat_cons, 'f' }, | |
4945 | { "xreal8", dot_xfloat_cons, 'd' }, | |
4946 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 4947 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
4948 | { "xstring", dot_xstringer, 0 }, |
4949 | { "xstringz", dot_xstringer, 1 }, | |
4950 | ||
542d6675 | 4951 | /* unaligned versions: */ |
800eeca4 JW |
4952 | { "xdata2.ua", dot_xdata_ua, 2 }, |
4953 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
4954 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
4955 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, | |
4956 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
4957 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 4958 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
4959 | |
4960 | /* annotations/DV checking support */ | |
4961 | { "entry", dot_entry, 0 }, | |
2434f565 | 4962 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
4963 | { "pred.rel", dot_pred_rel, 0 }, |
4964 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
4965 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
4966 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
4967 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 4968 | { "reg.val", dot_reg_val, 0 }, |
800eeca4 JW |
4969 | { "auto", dot_dv_mode, 'a' }, |
4970 | { "explicit", dot_dv_mode, 'e' }, | |
4971 | { "default", dot_dv_mode, 'd' }, | |
4972 | ||
87885043 JW |
4973 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
4974 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
4975 | tell it that these ones are supposed to be unaligned. Long term, | |
4976 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
4977 | are aligned by default. */ | |
4978 | {"2byte", stmt_cons_ua, 2}, | |
4979 | {"4byte", stmt_cons_ua, 4}, | |
4980 | {"8byte", stmt_cons_ua, 8}, | |
4981 | ||
800eeca4 JW |
4982 | { NULL, 0, 0 } |
4983 | }; | |
4984 | ||
4985 | static const struct pseudo_opcode | |
4986 | { | |
4987 | const char *name; | |
4988 | void (*handler) (int); | |
4989 | int arg; | |
4990 | } | |
4991 | pseudo_opcode[] = | |
4992 | { | |
4993 | /* these are more like pseudo-ops, but don't start with a dot */ | |
4994 | { "data1", cons, 1 }, | |
4995 | { "data2", cons, 2 }, | |
4996 | { "data4", cons, 4 }, | |
4997 | { "data8", cons, 8 }, | |
3969b680 | 4998 | { "data16", cons, 16 }, |
800eeca4 JW |
4999 | { "real4", stmt_float_cons, 'f' }, |
5000 | { "real8", stmt_float_cons, 'd' }, | |
5001 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5002 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5003 | { "string", stringer, 0 }, |
5004 | { "stringz", stringer, 1 }, | |
5005 | ||
542d6675 | 5006 | /* unaligned versions: */ |
800eeca4 JW |
5007 | { "data2.ua", stmt_cons_ua, 2 }, |
5008 | { "data4.ua", stmt_cons_ua, 4 }, | |
5009 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5010 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5011 | { "real4.ua", float_cons, 'f' }, |
5012 | { "real8.ua", float_cons, 'd' }, | |
5013 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5014 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5015 | }; |
5016 | ||
5017 | /* Declare a register by creating a symbol for it and entering it in | |
5018 | the symbol table. */ | |
542d6675 KH |
5019 | |
5020 | static symbolS * | |
800eeca4 JW |
5021 | declare_register (name, regnum) |
5022 | const char *name; | |
5023 | int regnum; | |
5024 | { | |
5025 | const char *err; | |
5026 | symbolS *sym; | |
5027 | ||
5028 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5029 | ||
5030 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5031 | if (err) | |
5032 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5033 | name, err); | |
5034 | ||
5035 | return sym; | |
5036 | } | |
5037 | ||
5038 | static void | |
5039 | declare_register_set (prefix, num_regs, base_regnum) | |
5040 | const char *prefix; | |
5041 | int num_regs; | |
5042 | int base_regnum; | |
5043 | { | |
5044 | char name[8]; | |
5045 | int i; | |
5046 | ||
5047 | for (i = 0; i < num_regs; ++i) | |
5048 | { | |
5049 | sprintf (name, "%s%u", prefix, i); | |
5050 | declare_register (name, base_regnum + i); | |
5051 | } | |
5052 | } | |
5053 | ||
5054 | static unsigned int | |
5055 | operand_width (opnd) | |
5056 | enum ia64_opnd opnd; | |
5057 | { | |
5058 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5059 | unsigned int bits = 0; | |
5060 | int i; | |
5061 | ||
5062 | bits = 0; | |
5063 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5064 | bits += odesc->field[i].bits; | |
5065 | ||
5066 | return bits; | |
5067 | } | |
5068 | ||
87f8eb97 | 5069 | static enum operand_match_result |
800eeca4 JW |
5070 | operand_match (idesc, index, e) |
5071 | const struct ia64_opcode *idesc; | |
5072 | int index; | |
5073 | expressionS *e; | |
5074 | { | |
5075 | enum ia64_opnd opnd = idesc->operands[index]; | |
5076 | int bits, relocatable = 0; | |
5077 | struct insn_fix *fix; | |
5078 | bfd_signed_vma val; | |
5079 | ||
5080 | switch (opnd) | |
5081 | { | |
542d6675 | 5082 | /* constants: */ |
800eeca4 JW |
5083 | |
5084 | case IA64_OPND_AR_CCV: | |
5085 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5086 | return OPERAND_MATCH; |
800eeca4 JW |
5087 | break; |
5088 | ||
c10d9d8f JW |
5089 | case IA64_OPND_AR_CSD: |
5090 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5091 | return OPERAND_MATCH; | |
5092 | break; | |
5093 | ||
800eeca4 JW |
5094 | case IA64_OPND_AR_PFS: |
5095 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5096 | return OPERAND_MATCH; |
800eeca4 JW |
5097 | break; |
5098 | ||
5099 | case IA64_OPND_GR0: | |
5100 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5101 | return OPERAND_MATCH; |
800eeca4 JW |
5102 | break; |
5103 | ||
5104 | case IA64_OPND_IP: | |
5105 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5106 | return OPERAND_MATCH; |
800eeca4 JW |
5107 | break; |
5108 | ||
5109 | case IA64_OPND_PR: | |
5110 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5111 | return OPERAND_MATCH; |
800eeca4 JW |
5112 | break; |
5113 | ||
5114 | case IA64_OPND_PR_ROT: | |
5115 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5116 | return OPERAND_MATCH; |
800eeca4 JW |
5117 | break; |
5118 | ||
5119 | case IA64_OPND_PSR: | |
5120 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5121 | return OPERAND_MATCH; |
800eeca4 JW |
5122 | break; |
5123 | ||
5124 | case IA64_OPND_PSR_L: | |
5125 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5126 | return OPERAND_MATCH; |
800eeca4 JW |
5127 | break; |
5128 | ||
5129 | case IA64_OPND_PSR_UM: | |
5130 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5131 | return OPERAND_MATCH; |
800eeca4 JW |
5132 | break; |
5133 | ||
5134 | case IA64_OPND_C1: | |
87f8eb97 JW |
5135 | if (e->X_op == O_constant) |
5136 | { | |
5137 | if (e->X_add_number == 1) | |
5138 | return OPERAND_MATCH; | |
5139 | else | |
5140 | return OPERAND_OUT_OF_RANGE; | |
5141 | } | |
800eeca4 JW |
5142 | break; |
5143 | ||
5144 | case IA64_OPND_C8: | |
87f8eb97 JW |
5145 | if (e->X_op == O_constant) |
5146 | { | |
5147 | if (e->X_add_number == 8) | |
5148 | return OPERAND_MATCH; | |
5149 | else | |
5150 | return OPERAND_OUT_OF_RANGE; | |
5151 | } | |
800eeca4 JW |
5152 | break; |
5153 | ||
5154 | case IA64_OPND_C16: | |
87f8eb97 JW |
5155 | if (e->X_op == O_constant) |
5156 | { | |
5157 | if (e->X_add_number == 16) | |
5158 | return OPERAND_MATCH; | |
5159 | else | |
5160 | return OPERAND_OUT_OF_RANGE; | |
5161 | } | |
800eeca4 JW |
5162 | break; |
5163 | ||
542d6675 | 5164 | /* register operands: */ |
800eeca4 JW |
5165 | |
5166 | case IA64_OPND_AR3: | |
5167 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5168 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5169 | return OPERAND_MATCH; |
800eeca4 JW |
5170 | break; |
5171 | ||
5172 | case IA64_OPND_B1: | |
5173 | case IA64_OPND_B2: | |
5174 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5175 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5176 | return OPERAND_MATCH; |
800eeca4 JW |
5177 | break; |
5178 | ||
5179 | case IA64_OPND_CR3: | |
5180 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5181 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5182 | return OPERAND_MATCH; |
800eeca4 JW |
5183 | break; |
5184 | ||
5185 | case IA64_OPND_F1: | |
5186 | case IA64_OPND_F2: | |
5187 | case IA64_OPND_F3: | |
5188 | case IA64_OPND_F4: | |
5189 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5190 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5191 | return OPERAND_MATCH; |
800eeca4 JW |
5192 | break; |
5193 | ||
5194 | case IA64_OPND_P1: | |
5195 | case IA64_OPND_P2: | |
5196 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5197 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5198 | return OPERAND_MATCH; |
800eeca4 JW |
5199 | break; |
5200 | ||
5201 | case IA64_OPND_R1: | |
5202 | case IA64_OPND_R2: | |
5203 | case IA64_OPND_R3: | |
5204 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5205 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5206 | return OPERAND_MATCH; |
800eeca4 JW |
5207 | break; |
5208 | ||
5209 | case IA64_OPND_R3_2: | |
87f8eb97 | 5210 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5211 | { |
87f8eb97 JW |
5212 | if (e->X_add_number < REG_GR + 4) |
5213 | return OPERAND_MATCH; | |
5214 | else if (e->X_add_number < REG_GR + 128) | |
5215 | return OPERAND_OUT_OF_RANGE; | |
5216 | } | |
800eeca4 JW |
5217 | break; |
5218 | ||
542d6675 | 5219 | /* indirect operands: */ |
800eeca4 JW |
5220 | case IA64_OPND_CPUID_R3: |
5221 | case IA64_OPND_DBR_R3: | |
5222 | case IA64_OPND_DTR_R3: | |
5223 | case IA64_OPND_ITR_R3: | |
5224 | case IA64_OPND_IBR_R3: | |
5225 | case IA64_OPND_MSR_R3: | |
5226 | case IA64_OPND_PKR_R3: | |
5227 | case IA64_OPND_PMC_R3: | |
5228 | case IA64_OPND_PMD_R3: | |
5229 | case IA64_OPND_RR_R3: | |
5230 | if (e->X_op == O_index && e->X_op_symbol | |
5231 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5232 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5233 | return OPERAND_MATCH; |
800eeca4 JW |
5234 | break; |
5235 | ||
5236 | case IA64_OPND_MR3: | |
5237 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5238 | return OPERAND_MATCH; |
800eeca4 JW |
5239 | break; |
5240 | ||
542d6675 | 5241 | /* immediate operands: */ |
800eeca4 JW |
5242 | case IA64_OPND_CNT2a: |
5243 | case IA64_OPND_LEN4: | |
5244 | case IA64_OPND_LEN6: | |
5245 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5246 | if (e->X_op == O_constant) |
5247 | { | |
5248 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5249 | return OPERAND_MATCH; | |
5250 | else | |
5251 | return OPERAND_OUT_OF_RANGE; | |
5252 | } | |
800eeca4 JW |
5253 | break; |
5254 | ||
5255 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5256 | if (e->X_op == O_constant) |
5257 | { | |
5258 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5259 | return OPERAND_MATCH; | |
5260 | else | |
5261 | return OPERAND_OUT_OF_RANGE; | |
5262 | } | |
800eeca4 JW |
5263 | break; |
5264 | ||
5265 | case IA64_OPND_CNT2c: | |
5266 | val = e->X_add_number; | |
87f8eb97 JW |
5267 | if (e->X_op == O_constant) |
5268 | { | |
5269 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5270 | return OPERAND_MATCH; | |
5271 | else | |
5272 | return OPERAND_OUT_OF_RANGE; | |
5273 | } | |
800eeca4 JW |
5274 | break; |
5275 | ||
5276 | case IA64_OPND_SOR: | |
5277 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5278 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5279 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5280 | case IA64_OPND_SOF: |
5281 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5282 | if (e->X_op == O_constant) |
5283 | { | |
5284 | if ((bfd_vma) e->X_add_number <= 96) | |
5285 | return OPERAND_MATCH; | |
5286 | else | |
5287 | return OPERAND_OUT_OF_RANGE; | |
5288 | } | |
800eeca4 JW |
5289 | break; |
5290 | ||
5291 | case IA64_OPND_IMMU62: | |
5292 | if (e->X_op == O_constant) | |
542d6675 | 5293 | { |
800eeca4 | 5294 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5295 | return OPERAND_MATCH; |
5296 | else | |
5297 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5298 | } |
197865e8 | 5299 | else |
542d6675 KH |
5300 | { |
5301 | /* FIXME -- need 62-bit relocation type */ | |
5302 | as_bad (_("62-bit relocation not yet implemented")); | |
5303 | } | |
800eeca4 JW |
5304 | break; |
5305 | ||
5306 | case IA64_OPND_IMMU64: | |
5307 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5308 | || e->X_op == O_subtract) | |
5309 | { | |
5310 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5311 | fix->code = BFD_RELOC_IA64_IMM64; | |
5312 | if (e->X_op != O_subtract) | |
5313 | { | |
5314 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5315 | if (e->X_op == O_pseudo_fixup) | |
5316 | e->X_op = O_symbol; | |
5317 | } | |
5318 | ||
5319 | fix->opnd = idesc->operands[index]; | |
5320 | fix->expr = *e; | |
5321 | fix->is_pcrel = 0; | |
5322 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5323 | return OPERAND_MATCH; |
800eeca4 JW |
5324 | } |
5325 | else if (e->X_op == O_constant) | |
87f8eb97 | 5326 | return OPERAND_MATCH; |
800eeca4 JW |
5327 | break; |
5328 | ||
5329 | case IA64_OPND_CCNT5: | |
5330 | case IA64_OPND_CNT5: | |
5331 | case IA64_OPND_CNT6: | |
5332 | case IA64_OPND_CPOS6a: | |
5333 | case IA64_OPND_CPOS6b: | |
5334 | case IA64_OPND_CPOS6c: | |
5335 | case IA64_OPND_IMMU2: | |
5336 | case IA64_OPND_IMMU7a: | |
5337 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5338 | case IA64_OPND_IMMU21: |
5339 | case IA64_OPND_IMMU24: | |
5340 | case IA64_OPND_MBTYPE4: | |
5341 | case IA64_OPND_MHTYPE8: | |
5342 | case IA64_OPND_POS6: | |
5343 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5344 | if (e->X_op == O_constant) |
5345 | { | |
5346 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5347 | return OPERAND_MATCH; | |
5348 | else | |
5349 | return OPERAND_OUT_OF_RANGE; | |
5350 | } | |
800eeca4 JW |
5351 | break; |
5352 | ||
bf3ca999 TW |
5353 | case IA64_OPND_IMMU9: |
5354 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5355 | if (e->X_op == O_constant) |
542d6675 | 5356 | { |
87f8eb97 JW |
5357 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5358 | { | |
5359 | int lobits = e->X_add_number & 0x3; | |
5360 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5361 | e->X_add_number |= (bfd_vma) 0x3; | |
5362 | return OPERAND_MATCH; | |
5363 | } | |
5364 | else | |
5365 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5366 | } |
bf3ca999 TW |
5367 | break; |
5368 | ||
800eeca4 JW |
5369 | case IA64_OPND_IMM44: |
5370 | /* least 16 bits must be zero */ | |
5371 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5372 | /* XXX technically, this is wrong: we should not be issuing warning |
5373 | messages until we're sure this instruction pattern is going to | |
5374 | be used! */ | |
542d6675 | 5375 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5376 | |
87f8eb97 | 5377 | if (e->X_op == O_constant) |
542d6675 | 5378 | { |
87f8eb97 JW |
5379 | if (((e->X_add_number >= 0 |
5380 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5381 | || (e->X_add_number < 0 | |
5382 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5383 | { |
87f8eb97 JW |
5384 | /* sign-extend */ |
5385 | if (e->X_add_number >= 0 | |
5386 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5387 | { | |
5388 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5389 | } | |
5390 | return OPERAND_MATCH; | |
542d6675 | 5391 | } |
87f8eb97 JW |
5392 | else |
5393 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5394 | } |
800eeca4 JW |
5395 | break; |
5396 | ||
5397 | case IA64_OPND_IMM17: | |
5398 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5399 | if (e->X_op == O_constant) |
542d6675 | 5400 | { |
87f8eb97 JW |
5401 | if (((e->X_add_number >= 0 |
5402 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5403 | || (e->X_add_number < 0 | |
5404 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5405 | { |
87f8eb97 JW |
5406 | /* sign-extend */ |
5407 | if (e->X_add_number >= 0 | |
5408 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5409 | { | |
5410 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5411 | } | |
5412 | return OPERAND_MATCH; | |
542d6675 | 5413 | } |
87f8eb97 JW |
5414 | else |
5415 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5416 | } |
800eeca4 JW |
5417 | break; |
5418 | ||
5419 | case IA64_OPND_IMM14: | |
5420 | case IA64_OPND_IMM22: | |
5421 | relocatable = 1; | |
5422 | case IA64_OPND_IMM1: | |
5423 | case IA64_OPND_IMM8: | |
5424 | case IA64_OPND_IMM8U4: | |
5425 | case IA64_OPND_IMM8M1: | |
5426 | case IA64_OPND_IMM8M1U4: | |
5427 | case IA64_OPND_IMM8M1U8: | |
5428 | case IA64_OPND_IMM9a: | |
5429 | case IA64_OPND_IMM9b: | |
5430 | bits = operand_width (idesc->operands[index]); | |
5431 | if (relocatable && (e->X_op == O_symbol | |
5432 | || e->X_op == O_subtract | |
5433 | || e->X_op == O_pseudo_fixup)) | |
5434 | { | |
5435 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5436 | ||
5437 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5438 | fix->code = BFD_RELOC_IA64_IMM14; | |
5439 | else | |
5440 | fix->code = BFD_RELOC_IA64_IMM22; | |
5441 | ||
5442 | if (e->X_op != O_subtract) | |
5443 | { | |
5444 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5445 | if (e->X_op == O_pseudo_fixup) | |
5446 | e->X_op = O_symbol; | |
5447 | } | |
5448 | ||
5449 | fix->opnd = idesc->operands[index]; | |
5450 | fix->expr = *e; | |
5451 | fix->is_pcrel = 0; | |
5452 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5453 | return OPERAND_MATCH; |
800eeca4 JW |
5454 | } |
5455 | else if (e->X_op != O_constant | |
5456 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5457 | return OPERAND_MISMATCH; |
800eeca4 JW |
5458 | |
5459 | if (opnd == IA64_OPND_IMM8M1U4) | |
5460 | { | |
5461 | /* Zero is not valid for unsigned compares that take an adjusted | |
5462 | constant immediate range. */ | |
5463 | if (e->X_add_number == 0) | |
87f8eb97 | 5464 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5465 | |
5466 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5467 | checks will work. */ | |
5468 | val = e->X_add_number; | |
197865e8 KH |
5469 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5470 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5471 | val = ((val << 32) >> 32); |
5472 | ||
5473 | /* Check for 0x100000000. This is valid because | |
5474 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5475 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5476 | return OPERAND_MATCH; |
800eeca4 JW |
5477 | |
5478 | val = val - 1; | |
5479 | } | |
5480 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5481 | { | |
5482 | /* Zero is not valid for unsigned compares that take an adjusted | |
5483 | constant immediate range. */ | |
5484 | if (e->X_add_number == 0) | |
87f8eb97 | 5485 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5486 | |
5487 | /* Check for 0x10000000000000000. */ | |
5488 | if (e->X_op == O_big) | |
5489 | { | |
5490 | if (generic_bignum[0] == 0 | |
5491 | && generic_bignum[1] == 0 | |
5492 | && generic_bignum[2] == 0 | |
5493 | && generic_bignum[3] == 0 | |
5494 | && generic_bignum[4] == 1) | |
87f8eb97 | 5495 | return OPERAND_MATCH; |
800eeca4 | 5496 | else |
87f8eb97 | 5497 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5498 | } |
5499 | else | |
5500 | val = e->X_add_number - 1; | |
5501 | } | |
5502 | else if (opnd == IA64_OPND_IMM8M1) | |
5503 | val = e->X_add_number - 1; | |
5504 | else if (opnd == IA64_OPND_IMM8U4) | |
5505 | { | |
5506 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5507 | checks will work. */ | |
5508 | val = e->X_add_number; | |
197865e8 KH |
5509 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5510 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5511 | val = ((val << 32) >> 32); |
5512 | } | |
5513 | else | |
5514 | val = e->X_add_number; | |
5515 | ||
2434f565 JW |
5516 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5517 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5518 | return OPERAND_MATCH; |
5519 | else | |
5520 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5521 | |
5522 | case IA64_OPND_INC3: | |
5523 | /* +/- 1, 4, 8, 16 */ | |
5524 | val = e->X_add_number; | |
5525 | if (val < 0) | |
5526 | val = -val; | |
87f8eb97 JW |
5527 | if (e->X_op == O_constant) |
5528 | { | |
5529 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5530 | return OPERAND_MATCH; | |
5531 | else | |
5532 | return OPERAND_OUT_OF_RANGE; | |
5533 | } | |
800eeca4 JW |
5534 | break; |
5535 | ||
5536 | case IA64_OPND_TGT25: | |
5537 | case IA64_OPND_TGT25b: | |
5538 | case IA64_OPND_TGT25c: | |
5539 | case IA64_OPND_TGT64: | |
5540 | if (e->X_op == O_symbol) | |
5541 | { | |
5542 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5543 | if (opnd == IA64_OPND_TGT25) | |
5544 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5545 | else if (opnd == IA64_OPND_TGT25b) | |
5546 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5547 | else if (opnd == IA64_OPND_TGT25c) | |
5548 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5549 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5550 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5551 | else | |
5552 | abort (); | |
5553 | ||
800eeca4 JW |
5554 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5555 | fix->opnd = idesc->operands[index]; | |
5556 | fix->expr = *e; | |
5557 | fix->is_pcrel = 1; | |
5558 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5559 | return OPERAND_MATCH; |
800eeca4 JW |
5560 | } |
5561 | case IA64_OPND_TAG13: | |
5562 | case IA64_OPND_TAG13b: | |
5563 | switch (e->X_op) | |
5564 | { | |
5565 | case O_constant: | |
87f8eb97 | 5566 | return OPERAND_MATCH; |
800eeca4 JW |
5567 | |
5568 | case O_symbol: | |
5569 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5570 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5571 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5572 | fix->code = BFD_RELOC_UNUSED; | |
5573 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5574 | fix->opnd = idesc->operands[index]; |
5575 | fix->expr = *e; | |
5576 | fix->is_pcrel = 1; | |
5577 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5578 | return OPERAND_MATCH; |
800eeca4 JW |
5579 | |
5580 | default: | |
5581 | break; | |
5582 | } | |
5583 | break; | |
5584 | ||
a823923b RH |
5585 | case IA64_OPND_LDXMOV: |
5586 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5587 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5588 | fix->opnd = idesc->operands[index]; | |
5589 | fix->expr = *e; | |
5590 | fix->is_pcrel = 0; | |
5591 | ++CURR_SLOT.num_fixups; | |
5592 | return OPERAND_MATCH; | |
5593 | ||
800eeca4 JW |
5594 | default: |
5595 | break; | |
5596 | } | |
87f8eb97 | 5597 | return OPERAND_MISMATCH; |
800eeca4 JW |
5598 | } |
5599 | ||
5600 | static int | |
5601 | parse_operand (e) | |
5602 | expressionS *e; | |
5603 | { | |
5604 | int sep = '\0'; | |
5605 | ||
5606 | memset (e, 0, sizeof (*e)); | |
5607 | e->X_op = O_absent; | |
5608 | SKIP_WHITESPACE (); | |
5609 | if (*input_line_pointer != '}') | |
5610 | expression (e); | |
5611 | sep = *input_line_pointer++; | |
5612 | ||
5613 | if (sep == '}') | |
5614 | { | |
5615 | if (!md.manual_bundling) | |
5616 | as_warn ("Found '}' when manual bundling is off"); | |
5617 | else | |
5618 | CURR_SLOT.manual_bundling_off = 1; | |
5619 | md.manual_bundling = 0; | |
5620 | sep = '\0'; | |
5621 | } | |
5622 | return sep; | |
5623 | } | |
5624 | ||
5625 | /* Returns the next entry in the opcode table that matches the one in | |
5626 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5627 | found, NULL is returned instead. */ |
800eeca4 JW |
5628 | |
5629 | static struct ia64_opcode * | |
5630 | get_next_opcode (struct ia64_opcode *idesc) | |
5631 | { | |
5632 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
5633 | ia64_free_opcode (idesc); | |
5634 | return next; | |
5635 | } | |
5636 | ||
5637 | /* Parse the operands for the opcode and find the opcode variant that | |
5638 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
5639 | |
5640 | static struct ia64_opcode * | |
800eeca4 JW |
5641 | parse_operands (idesc) |
5642 | struct ia64_opcode *idesc; | |
5643 | { | |
5644 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 5645 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
800eeca4 | 5646 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 5647 | enum operand_match_result result; |
800eeca4 JW |
5648 | char mnemonic[129]; |
5649 | char *first_arg = 0, *end, *saved_input_pointer; | |
5650 | unsigned int sof; | |
5651 | ||
5652 | assert (strlen (idesc->name) <= 128); | |
5653 | ||
5654 | strcpy (mnemonic, idesc->name); | |
5655 | if (idesc->operands[2] == IA64_OPND_SOF) | |
5656 | { | |
5657 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
5658 | can't parse the first operand until we have parsed the | |
5659 | remaining operands of the "alloc" instruction. */ | |
5660 | SKIP_WHITESPACE (); | |
5661 | first_arg = input_line_pointer; | |
5662 | end = strchr (input_line_pointer, '='); | |
5663 | if (!end) | |
5664 | { | |
5665 | as_bad ("Expected separator `='"); | |
5666 | return 0; | |
5667 | } | |
5668 | input_line_pointer = end + 1; | |
5669 | ++i; | |
5670 | ++num_outputs; | |
5671 | } | |
5672 | ||
5673 | for (; i < NELEMS (CURR_SLOT.opnd); ++i) | |
5674 | { | |
5675 | sep = parse_operand (CURR_SLOT.opnd + i); | |
5676 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
5677 | break; | |
5678 | ||
5679 | ++num_operands; | |
5680 | ||
5681 | if (sep != '=' && sep != ',') | |
5682 | break; | |
5683 | ||
5684 | if (sep == '=') | |
5685 | { | |
5686 | if (num_outputs > 0) | |
5687 | as_bad ("Duplicate equal sign (=) in instruction"); | |
5688 | else | |
5689 | num_outputs = i + 1; | |
5690 | } | |
5691 | } | |
5692 | if (sep != '\0') | |
5693 | { | |
5694 | as_bad ("Illegal operand separator `%c'", sep); | |
5695 | return 0; | |
5696 | } | |
197865e8 | 5697 | |
800eeca4 JW |
5698 | if (idesc->operands[2] == IA64_OPND_SOF) |
5699 | { | |
5700 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
5701 | know (strcmp (idesc->name, "alloc") == 0); | |
5702 | if (num_operands == 5 /* first_arg not included in this count! */ | |
5703 | && CURR_SLOT.opnd[2].X_op == O_constant | |
5704 | && CURR_SLOT.opnd[3].X_op == O_constant | |
5705 | && CURR_SLOT.opnd[4].X_op == O_constant | |
5706 | && CURR_SLOT.opnd[5].X_op == O_constant) | |
5707 | { | |
5708 | sof = set_regstack (CURR_SLOT.opnd[2].X_add_number, | |
5709 | CURR_SLOT.opnd[3].X_add_number, | |
5710 | CURR_SLOT.opnd[4].X_add_number, | |
5711 | CURR_SLOT.opnd[5].X_add_number); | |
5712 | ||
542d6675 | 5713 | /* now we can parse the first arg: */ |
800eeca4 JW |
5714 | saved_input_pointer = input_line_pointer; |
5715 | input_line_pointer = first_arg; | |
5716 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
5717 | if (sep != '=') | |
5718 | --num_outputs; /* force error */ | |
5719 | input_line_pointer = saved_input_pointer; | |
5720 | ||
5721 | CURR_SLOT.opnd[2].X_add_number = sof; | |
5722 | CURR_SLOT.opnd[3].X_add_number | |
5723 | = sof - CURR_SLOT.opnd[4].X_add_number; | |
5724 | CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5]; | |
5725 | } | |
5726 | } | |
5727 | ||
5728 | highest_unmatched_operand = 0; | |
87f8eb97 JW |
5729 | curr_out_of_range_pos = -1; |
5730 | error_pos = 0; | |
800eeca4 JW |
5731 | expected_operand = idesc->operands[0]; |
5732 | for (; idesc; idesc = get_next_opcode (idesc)) | |
5733 | { | |
5734 | if (num_outputs != idesc->num_outputs) | |
5735 | continue; /* mismatch in # of outputs */ | |
5736 | ||
5737 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
5738 | |
5739 | /* Try to match all operands. If we see an out-of-range operand, | |
5740 | then continue trying to match the rest of the operands, since if | |
5741 | the rest match, then this idesc will give the best error message. */ | |
5742 | ||
5743 | out_of_range_pos = -1; | |
800eeca4 | 5744 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
5745 | { |
5746 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
5747 | if (result != OPERAND_MATCH) | |
5748 | { | |
5749 | if (result != OPERAND_OUT_OF_RANGE) | |
5750 | break; | |
5751 | if (out_of_range_pos < 0) | |
5752 | /* remember position of the first out-of-range operand: */ | |
5753 | out_of_range_pos = i; | |
5754 | } | |
5755 | } | |
800eeca4 | 5756 | |
87f8eb97 JW |
5757 | /* If we did not match all operands, or if at least one operand was |
5758 | out-of-range, then this idesc does not match. Keep track of which | |
5759 | idesc matched the most operands before failing. If we have two | |
5760 | idescs that failed at the same position, and one had an out-of-range | |
5761 | operand, then prefer the out-of-range operand. Thus if we have | |
5762 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
5763 | of range instead of an error saying that the constant should have been | |
5764 | a register. */ | |
5765 | ||
5766 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 5767 | { |
87f8eb97 JW |
5768 | if (i > highest_unmatched_operand |
5769 | || (i == highest_unmatched_operand | |
5770 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
5771 | { |
5772 | highest_unmatched_operand = i; | |
87f8eb97 JW |
5773 | if (out_of_range_pos >= 0) |
5774 | { | |
5775 | expected_operand = idesc->operands[out_of_range_pos]; | |
5776 | error_pos = out_of_range_pos; | |
5777 | } | |
5778 | else | |
5779 | { | |
5780 | expected_operand = idesc->operands[i]; | |
5781 | error_pos = i; | |
5782 | } | |
5783 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
5784 | } |
5785 | continue; | |
5786 | } | |
5787 | ||
5788 | if (num_operands < NELEMS (idesc->operands) | |
5789 | && idesc->operands[num_operands]) | |
5790 | continue; /* mismatch in number of arguments */ | |
5791 | ||
5792 | break; | |
5793 | } | |
5794 | if (!idesc) | |
5795 | { | |
5796 | if (expected_operand) | |
5797 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 5798 | error_pos + 1, mnemonic, |
800eeca4 JW |
5799 | elf64_ia64_operands[expected_operand].desc); |
5800 | else | |
5801 | as_bad ("Operand mismatch"); | |
5802 | return 0; | |
5803 | } | |
5804 | return idesc; | |
5805 | } | |
5806 | ||
88be23ec BS |
5807 | /* Keep track of state necessary to determine whether a NOP is necessary |
5808 | to avoid an erratum in A and B step Itanium chips, and return 1 if we | |
5809 | detect a case where additional NOPs may be necessary. */ | |
5810 | static int | |
5811 | errata_nop_necessary_p (slot, insn_unit) | |
5812 | struct slot *slot; | |
5813 | enum ia64_unit insn_unit; | |
5814 | { | |
5815 | int i; | |
5816 | struct group *this_group = md.last_groups + md.group_idx; | |
5817 | struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3; | |
5818 | struct ia64_opcode *idesc = slot->idesc; | |
5819 | ||
5820 | /* Test whether this could be the first insn in a problematic sequence. */ | |
5821 | if (insn_unit == IA64_UNIT_F) | |
5822 | { | |
5823 | for (i = 0; i < idesc->num_outputs; i++) | |
5824 | if (idesc->operands[i] == IA64_OPND_P1 | |
5825 | || idesc->operands[i] == IA64_OPND_P2) | |
5826 | { | |
5827 | int regno = slot->opnd[i].X_add_number - REG_P; | |
3557da92 | 5828 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5829 | if (regno >= 64) |
3557da92 | 5830 | return 0; |
88be23ec BS |
5831 | this_group->p_reg_set[regno] = 1; |
5832 | } | |
5833 | } | |
5834 | ||
5835 | /* Test whether this could be the second insn in a problematic sequence. */ | |
5836 | if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0 | |
5837 | && prev_group->p_reg_set[slot->qp_regno]) | |
5838 | { | |
5839 | for (i = 0; i < idesc->num_outputs; i++) | |
5840 | if (idesc->operands[i] == IA64_OPND_R1 | |
5841 | || idesc->operands[i] == IA64_OPND_R2 | |
5842 | || idesc->operands[i] == IA64_OPND_R3) | |
5843 | { | |
5844 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5845 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5846 | if (regno >= 128) |
3557da92 | 5847 | return 0; |
88be23ec BS |
5848 | if (strncmp (idesc->name, "add", 3) != 0 |
5849 | && strncmp (idesc->name, "sub", 3) != 0 | |
5850 | && strncmp (idesc->name, "shladd", 6) != 0 | |
5851 | && (idesc->flags & IA64_OPCODE_POSTINC) == 0) | |
5852 | this_group->g_reg_set_conditionally[regno] = 1; | |
5853 | } | |
5854 | } | |
5855 | ||
5856 | /* Test whether this could be the third insn in a problematic sequence. */ | |
5857 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++) | |
5858 | { | |
5859 | if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */ | |
5860 | idesc->operands[i] == IA64_OPND_R3 | |
5861 | /* For mov indirect. */ | |
5862 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
5863 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
5864 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
5865 | || idesc->operands[i] == IA64_OPND_PKR_R3 | |
5866 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
5867 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
5868 | || idesc->operands[i] == IA64_OPND_MSR_R3 | |
5869 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
5870 | /* For itr. */ | |
5871 | || idesc->operands[i] == IA64_OPND_ITR_R3 | |
5872 | || idesc->operands[i] == IA64_OPND_DTR_R3 | |
5873 | /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */ | |
5874 | || idesc->operands[i] == IA64_OPND_MR3) | |
5875 | { | |
5876 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5877 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5878 | if (regno >= 128) |
3557da92 | 5879 | return 0; |
88be23ec BS |
5880 | if (idesc->operands[i] == IA64_OPND_R3) |
5881 | { | |
5882 | if (strcmp (idesc->name, "fc") != 0 | |
5883 | && strcmp (idesc->name, "tak") != 0 | |
5884 | && strcmp (idesc->name, "thash") != 0 | |
5885 | && strcmp (idesc->name, "tpa") != 0 | |
5886 | && strcmp (idesc->name, "ttag") != 0 | |
5887 | && strncmp (idesc->name, "ptr", 3) != 0 | |
5888 | && strncmp (idesc->name, "ptc", 3) != 0 | |
5889 | && strncmp (idesc->name, "probe", 5) != 0) | |
40449e9f | 5890 | return 0; |
88be23ec | 5891 | } |
bc805888 | 5892 | if (prev_group->g_reg_set_conditionally[regno]) |
88be23ec BS |
5893 | return 1; |
5894 | } | |
5895 | } | |
5896 | return 0; | |
5897 | } | |
5898 | ||
800eeca4 JW |
5899 | static void |
5900 | build_insn (slot, insnp) | |
5901 | struct slot *slot; | |
5902 | bfd_vma *insnp; | |
5903 | { | |
5904 | const struct ia64_operand *odesc, *o2desc; | |
5905 | struct ia64_opcode *idesc = slot->idesc; | |
5906 | bfd_signed_vma insn, val; | |
5907 | const char *err; | |
5908 | int i; | |
5909 | ||
5910 | insn = idesc->opcode | slot->qp_regno; | |
5911 | ||
5912 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
5913 | { | |
c67e42c9 RH |
5914 | if (slot->opnd[i].X_op == O_register |
5915 | || slot->opnd[i].X_op == O_constant | |
5916 | || slot->opnd[i].X_op == O_index) | |
5917 | val = slot->opnd[i].X_add_number; | |
5918 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 5919 | { |
c67e42c9 RH |
5920 | /* This must be the value 0x10000000000000000. */ |
5921 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
5922 | val = 0; | |
5923 | } | |
5924 | else | |
5925 | val = 0; | |
5926 | ||
5927 | switch (idesc->operands[i]) | |
5928 | { | |
5929 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
5930 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
5931 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
5932 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
5933 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
5934 | continue; |
5935 | ||
5936 | case IA64_OPND_IMMU62: | |
542d6675 KH |
5937 | val &= 0x3fffffffffffffffULL; |
5938 | if (val != slot->opnd[i].X_add_number) | |
5939 | as_warn (_("Value truncated to 62 bits")); | |
5940 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
5941 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 5942 | continue; |
800eeca4 | 5943 | |
c67e42c9 RH |
5944 | case IA64_OPND_TGT64: |
5945 | val >>= 4; | |
5946 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
5947 | insn |= ((((val >> 59) & 0x1) << 36) | |
5948 | | (((val >> 0) & 0xfffff) << 13)); | |
5949 | continue; | |
800eeca4 | 5950 | |
c67e42c9 RH |
5951 | case IA64_OPND_AR3: |
5952 | val -= REG_AR; | |
5953 | break; | |
5954 | ||
5955 | case IA64_OPND_B1: | |
5956 | case IA64_OPND_B2: | |
5957 | val -= REG_BR; | |
5958 | break; | |
5959 | ||
5960 | case IA64_OPND_CR3: | |
5961 | val -= REG_CR; | |
5962 | break; | |
5963 | ||
5964 | case IA64_OPND_F1: | |
5965 | case IA64_OPND_F2: | |
5966 | case IA64_OPND_F3: | |
5967 | case IA64_OPND_F4: | |
5968 | val -= REG_FR; | |
5969 | break; | |
5970 | ||
5971 | case IA64_OPND_P1: | |
5972 | case IA64_OPND_P2: | |
5973 | val -= REG_P; | |
5974 | break; | |
5975 | ||
5976 | case IA64_OPND_R1: | |
5977 | case IA64_OPND_R2: | |
5978 | case IA64_OPND_R3: | |
5979 | case IA64_OPND_R3_2: | |
5980 | case IA64_OPND_CPUID_R3: | |
5981 | case IA64_OPND_DBR_R3: | |
5982 | case IA64_OPND_DTR_R3: | |
5983 | case IA64_OPND_ITR_R3: | |
5984 | case IA64_OPND_IBR_R3: | |
5985 | case IA64_OPND_MR3: | |
5986 | case IA64_OPND_MSR_R3: | |
5987 | case IA64_OPND_PKR_R3: | |
5988 | case IA64_OPND_PMC_R3: | |
5989 | case IA64_OPND_PMD_R3: | |
197865e8 | 5990 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
5991 | val -= REG_GR; |
5992 | break; | |
5993 | ||
5994 | default: | |
5995 | break; | |
5996 | } | |
5997 | ||
5998 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
5999 | err = (*odesc->insert) (odesc, val, &insn); | |
6000 | if (err) | |
6001 | as_bad_where (slot->src_file, slot->src_line, | |
6002 | "Bad operand value: %s", err); | |
6003 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6004 | { | |
6005 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6006 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6007 | { | |
6008 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6009 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6010 | } |
c67e42c9 RH |
6011 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6012 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6013 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6014 | { |
c67e42c9 RH |
6015 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6016 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6017 | } |
6018 | } | |
6019 | } | |
6020 | *insnp = insn; | |
6021 | } | |
6022 | ||
6023 | static void | |
6024 | emit_one_bundle () | |
6025 | { | |
6026 | unsigned int manual_bundling_on = 0, manual_bundling_off = 0; | |
6027 | unsigned int manual_bundling = 0; | |
6028 | enum ia64_unit required_unit, insn_unit = 0; | |
6029 | enum ia64_insn_type type[3], insn_type; | |
6030 | unsigned int template, orig_template; | |
542d6675 | 6031 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6032 | struct ia64_opcode *idesc; |
6033 | int end_of_insn_group = 0, user_template = -1; | |
6034 | int n, i, j, first, curr; | |
2434f565 | 6035 | unw_rec_list *ptr; |
800eeca4 JW |
6036 | bfd_vma t0 = 0, t1 = 0; |
6037 | struct label_fix *lfix; | |
6038 | struct insn_fix *ifix; | |
6039 | char mnemonic[16]; | |
6040 | fixS *fix; | |
6041 | char *f; | |
6042 | ||
6043 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6044 | know (first >= 0 & first < NUM_SLOTS); | |
6045 | n = MIN (3, md.num_slots_in_use); | |
6046 | ||
6047 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6048 | otherwise: */ |
800eeca4 JW |
6049 | |
6050 | if (md.slot[first].user_template >= 0) | |
6051 | user_template = template = md.slot[first].user_template; | |
6052 | else | |
6053 | { | |
032efc85 | 6054 | /* Auto select appropriate template. */ |
800eeca4 JW |
6055 | memset (type, 0, sizeof (type)); |
6056 | curr = first; | |
6057 | for (i = 0; i < n; ++i) | |
6058 | { | |
032efc85 RH |
6059 | if (md.slot[curr].label_fixups && i != 0) |
6060 | break; | |
800eeca4 JW |
6061 | type[i] = md.slot[curr].idesc->type; |
6062 | curr = (curr + 1) % NUM_SLOTS; | |
6063 | } | |
6064 | template = best_template[type[0]][type[1]][type[2]]; | |
6065 | } | |
6066 | ||
542d6675 | 6067 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6068 | for (i = 0; i < 3; ++i) |
6069 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6070 | ||
6071 | f = frag_more (16); | |
6072 | ||
542d6675 | 6073 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6074 | curr = first; |
6075 | idesc = md.slot[curr].idesc; | |
6076 | end_of_insn_group = 0; | |
6077 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) | |
6078 | { | |
e0c9811a JW |
6079 | /* Set the slot number for prologue/body records now as those |
6080 | refer to the current point, not the point after the | |
542d6675 | 6081 | instruction has been issued: */ |
10850f29 JW |
6082 | /* Don't try to delete prologue/body records here, as that will cause |
6083 | them to also be deleted from the master list of unwind records. */ | |
e0c9811a | 6084 | for (ptr = md.slot[curr].unwind_record; ptr; ptr = ptr->next) |
10850f29 JW |
6085 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6086 | || ptr->r.type == body) | |
f5a30c2e JW |
6087 | { |
6088 | ptr->slot_number = (unsigned long) f + i; | |
6089 | ptr->slot_frag = frag_now; | |
6090 | } | |
e0c9811a | 6091 | |
800eeca4 JW |
6092 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6093 | { | |
6094 | if (manual_bundling && i != 2) | |
6095 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6096 | "`%s' must be last in bundle", idesc->name); | |
6097 | else | |
6098 | i = 2; | |
6099 | } | |
6100 | if (idesc->flags & IA64_OPCODE_LAST) | |
6101 | { | |
2434f565 JW |
6102 | int required_slot; |
6103 | unsigned int required_template; | |
800eeca4 JW |
6104 | |
6105 | /* If we need a stop bit after an M slot, our only choice is | |
6106 | template 5 (M;;MI). If we need a stop bit after a B | |
6107 | slot, our only choice is to place it at the end of the | |
6108 | bundle, because the only available templates are MIB, | |
6109 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6110 | than M and B slots because these are the only kind of | |
6111 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6112 | required_template = template; | |
6113 | switch (idesc->type) | |
6114 | { | |
6115 | case IA64_TYPE_M: | |
6116 | required_slot = 0; | |
6117 | required_template = 5; | |
6118 | break; | |
6119 | ||
6120 | case IA64_TYPE_B: | |
6121 | required_slot = 2; | |
6122 | break; | |
6123 | ||
6124 | default: | |
6125 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6126 | "Internal error: don't know how to force %s to end" | |
6127 | "of instruction group", idesc->name); | |
6128 | required_slot = i; | |
6129 | break; | |
6130 | } | |
6131 | if (manual_bundling && i != required_slot) | |
6132 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6133 | "`%s' must be last in instruction group", | |
6134 | idesc->name); | |
6135 | if (required_slot < i) | |
6136 | /* Can't fit this instruction. */ | |
6137 | break; | |
6138 | ||
6139 | i = required_slot; | |
6140 | if (required_template != template) | |
6141 | { | |
6142 | /* If we switch the template, we need to reset the NOPs | |
6143 | after slot i. The slot-types of the instructions ahead | |
6144 | of i never change, so we don't need to worry about | |
6145 | changing NOPs in front of this slot. */ | |
6146 | for (j = i; j < 3; ++j) | |
6147 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6148 | } | |
6149 | template = required_template; | |
6150 | } | |
6151 | if (curr != first && md.slot[curr].label_fixups) | |
6152 | { | |
6153 | if (manual_bundling_on) | |
6154 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6155 | "Label must be first in a bundle"); | |
6156 | /* This insn must go into the first slot of a bundle. */ | |
6157 | break; | |
6158 | } | |
6159 | ||
6160 | manual_bundling_on = md.slot[curr].manual_bundling_on; | |
6161 | manual_bundling_off = md.slot[curr].manual_bundling_off; | |
6162 | ||
6163 | if (manual_bundling_on) | |
6164 | { | |
6165 | if (curr == first) | |
6166 | manual_bundling = 1; | |
6167 | else | |
6168 | break; /* need to start a new bundle */ | |
6169 | } | |
6170 | ||
6171 | if (end_of_insn_group && md.num_slots_in_use >= 1) | |
6172 | { | |
6173 | /* We need an instruction group boundary in the middle of a | |
6174 | bundle. See if we can switch to an other template with | |
6175 | an appropriate boundary. */ | |
6176 | ||
6177 | orig_template = template; | |
6178 | if (i == 1 && (user_template == 4 | |
6179 | || (user_template < 0 | |
6180 | && (ia64_templ_desc[template].exec_unit[0] | |
6181 | == IA64_UNIT_M)))) | |
6182 | { | |
6183 | template = 5; | |
6184 | end_of_insn_group = 0; | |
6185 | } | |
6186 | else if (i == 2 && (user_template == 0 | |
6187 | || (user_template < 0 | |
6188 | && (ia64_templ_desc[template].exec_unit[1] | |
6189 | == IA64_UNIT_I))) | |
6190 | /* This test makes sure we don't switch the template if | |
6191 | the next instruction is one that needs to be first in | |
6192 | an instruction group. Since all those instructions are | |
6193 | in the M group, there is no way such an instruction can | |
6194 | fit in this bundle even if we switch the template. The | |
6195 | reason we have to check for this is that otherwise we | |
6196 | may end up generating "MI;;I M.." which has the deadly | |
6197 | effect that the second M instruction is no longer the | |
6198 | first in the bundle! --davidm 99/12/16 */ | |
6199 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) | |
6200 | { | |
6201 | template = 1; | |
6202 | end_of_insn_group = 0; | |
6203 | } | |
6204 | else if (curr != first) | |
6205 | /* can't fit this insn */ | |
6206 | break; | |
6207 | ||
6208 | if (template != orig_template) | |
6209 | /* if we switch the template, we need to reset the NOPs | |
6210 | after slot i. The slot-types of the instructions ahead | |
6211 | of i never change, so we don't need to worry about | |
6212 | changing NOPs in front of this slot. */ | |
6213 | for (j = i; j < 3; ++j) | |
6214 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6215 | } | |
6216 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6217 | ||
c10d9d8f | 6218 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6219 | if (idesc->type == IA64_TYPE_DYN) |
6220 | { | |
6221 | if ((strcmp (idesc->name, "nop") == 0) | |
c10d9d8f | 6222 | || (strcmp (idesc->name, "hint") == 0) |
800eeca4 JW |
6223 | || (strcmp (idesc->name, "break") == 0)) |
6224 | insn_unit = required_unit; | |
6225 | else if (strcmp (idesc->name, "chk.s") == 0) | |
6226 | { | |
6227 | insn_unit = IA64_UNIT_M; | |
6228 | if (required_unit == IA64_UNIT_I) | |
6229 | insn_unit = IA64_UNIT_I; | |
6230 | } | |
6231 | else | |
6232 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6233 | ||
6234 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]); | |
3d56ab85 | 6235 | ia64_free_opcode (idesc); |
800eeca4 JW |
6236 | md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic); |
6237 | #if 0 | |
6238 | know (!idesc->next); /* no resolved dynamic ops have collisions */ | |
6239 | #endif | |
6240 | } | |
6241 | else | |
6242 | { | |
6243 | insn_type = idesc->type; | |
6244 | insn_unit = IA64_UNIT_NIL; | |
6245 | switch (insn_type) | |
6246 | { | |
6247 | case IA64_TYPE_A: | |
6248 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6249 | insn_unit = required_unit; | |
6250 | break; | |
542d6675 | 6251 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6252 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6253 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6254 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6255 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6256 | default: break; | |
6257 | } | |
6258 | } | |
6259 | ||
6260 | if (insn_unit != required_unit) | |
6261 | { | |
6262 | if (required_unit == IA64_UNIT_L | |
542d6675 | 6263 | && insn_unit == IA64_UNIT_I |
800eeca4 JW |
6264 | && !(idesc->flags & IA64_OPCODE_X_IN_MLX)) |
6265 | { | |
6266 | /* we got ourselves an MLX template but the current | |
197865e8 | 6267 | instruction isn't an X-unit, or an I-unit instruction |
800eeca4 JW |
6268 | that can go into the X slot of an MLX template. Duh. */ |
6269 | if (md.num_slots_in_use >= NUM_SLOTS) | |
6270 | { | |
6271 | as_bad_where (md.slot[curr].src_file, | |
6272 | md.slot[curr].src_line, | |
6273 | "`%s' can't go in X slot of " | |
6274 | "MLX template", idesc->name); | |
542d6675 | 6275 | /* drop this insn so we don't livelock: */ |
800eeca4 JW |
6276 | --md.num_slots_in_use; |
6277 | } | |
6278 | break; | |
6279 | } | |
6280 | continue; /* try next slot */ | |
6281 | } | |
6282 | ||
40449e9f KH |
6283 | { |
6284 | bfd_vma addr; | |
800eeca4 | 6285 | |
40449e9f KH |
6286 | addr = frag_now->fr_address + frag_now_fix () - 16 + i; |
6287 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6288 | } | |
800eeca4 | 6289 | |
88be23ec BS |
6290 | if (errata_nop_necessary_p (md.slot + curr, insn_unit)) |
6291 | as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata")); | |
6292 | ||
800eeca4 JW |
6293 | build_insn (md.slot + curr, insn + i); |
6294 | ||
10850f29 JW |
6295 | /* Set slot counts for non prologue/body unwind records. */ |
6296 | for (ptr = md.slot[curr].unwind_record; ptr; ptr = ptr->next) | |
6297 | if (ptr->r.type != prologue && ptr->r.type != prologue_gr | |
6298 | && ptr->r.type != body) | |
f5a30c2e JW |
6299 | { |
6300 | ptr->slot_number = (unsigned long) f + i; | |
6301 | ptr->slot_frag = frag_now; | |
6302 | } | |
10850f29 | 6303 | md.slot[curr].unwind_record = NULL; |
10850f29 | 6304 | |
800eeca4 JW |
6305 | if (required_unit == IA64_UNIT_L) |
6306 | { | |
6307 | know (i == 1); | |
6308 | /* skip one slot for long/X-unit instructions */ | |
6309 | ++i; | |
6310 | } | |
6311 | --md.num_slots_in_use; | |
6312 | ||
542d6675 | 6313 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6314 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6315 | { | |
6316 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6317 | symbol_set_frag (lfix->sym, frag_now); | |
6318 | } | |
f1bcba5b JW |
6319 | /* and fix up the tags also. */ |
6320 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6321 | { | |
6322 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6323 | symbol_set_frag (lfix->sym, frag_now); | |
6324 | } | |
800eeca4 JW |
6325 | |
6326 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6327 | { | |
6328 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6329 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6330 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6331 | fix->tc_fix_data.opnd = ifix->opnd; | |
6332 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6333 | fix->fx_file = md.slot[curr].src_file; | |
6334 | fix->fx_line = md.slot[curr].src_line; | |
6335 | } | |
6336 | ||
6337 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6338 | ||
88be23ec BS |
6339 | if (end_of_insn_group) |
6340 | { | |
6341 | md.group_idx = (md.group_idx + 1) % 3; | |
6342 | memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]); | |
6343 | } | |
6344 | ||
542d6675 | 6345 | /* clear slot: */ |
800eeca4 JW |
6346 | ia64_free_opcode (md.slot[curr].idesc); |
6347 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6348 | md.slot[curr].user_template = -1; | |
6349 | ||
6350 | if (manual_bundling_off) | |
6351 | { | |
6352 | manual_bundling = 0; | |
6353 | break; | |
6354 | } | |
6355 | curr = (curr + 1) % NUM_SLOTS; | |
6356 | idesc = md.slot[curr].idesc; | |
6357 | } | |
6358 | if (manual_bundling) | |
6359 | { | |
6360 | if (md.num_slots_in_use > 0) | |
6361 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6362 | "`%s' does not fit into %s template", | |
6363 | idesc->name, ia64_templ_desc[template].name); | |
6364 | else | |
6365 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6366 | "Missing '}' at end of file"); | |
6367 | } | |
6368 | know (md.num_slots_in_use < NUM_SLOTS); | |
6369 | ||
6370 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6371 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6372 | ||
44f5c83a JW |
6373 | number_to_chars_littleendian (f + 0, t0, 8); |
6374 | number_to_chars_littleendian (f + 8, t1, 8); | |
f5a30c2e | 6375 | |
73f20958 L |
6376 | if (unwind.list) |
6377 | { | |
6378 | unwind.list->next_slot_number = (unsigned long) f + 16; | |
6379 | unwind.list->next_slot_frag = frag_now; | |
6380 | } | |
800eeca4 JW |
6381 | } |
6382 | ||
6383 | int | |
6384 | md_parse_option (c, arg) | |
6385 | int c; | |
6386 | char *arg; | |
6387 | { | |
7463c317 | 6388 | |
800eeca4 JW |
6389 | switch (c) |
6390 | { | |
c43c2cc5 | 6391 | /* Switches from the Intel assembler. */ |
44f5c83a | 6392 | case 'm': |
800eeca4 JW |
6393 | if (strcmp (arg, "ilp64") == 0 |
6394 | || strcmp (arg, "lp64") == 0 | |
6395 | || strcmp (arg, "p64") == 0) | |
6396 | { | |
6397 | md.flags |= EF_IA_64_ABI64; | |
6398 | } | |
6399 | else if (strcmp (arg, "ilp32") == 0) | |
6400 | { | |
6401 | md.flags &= ~EF_IA_64_ABI64; | |
6402 | } | |
6403 | else if (strcmp (arg, "le") == 0) | |
6404 | { | |
6405 | md.flags &= ~EF_IA_64_BE; | |
6406 | } | |
6407 | else if (strcmp (arg, "be") == 0) | |
6408 | { | |
6409 | md.flags |= EF_IA_64_BE; | |
6410 | } | |
6411 | else | |
6412 | return 0; | |
6413 | break; | |
6414 | ||
6415 | case 'N': | |
6416 | if (strcmp (arg, "so") == 0) | |
6417 | { | |
542d6675 | 6418 | /* Suppress signon message. */ |
800eeca4 JW |
6419 | } |
6420 | else if (strcmp (arg, "pi") == 0) | |
6421 | { | |
6422 | /* Reject privileged instructions. FIXME */ | |
6423 | } | |
6424 | else if (strcmp (arg, "us") == 0) | |
6425 | { | |
6426 | /* Allow union of signed and unsigned range. FIXME */ | |
6427 | } | |
6428 | else if (strcmp (arg, "close_fcalls") == 0) | |
6429 | { | |
6430 | /* Do not resolve global function calls. */ | |
6431 | } | |
6432 | else | |
6433 | return 0; | |
6434 | break; | |
6435 | ||
6436 | case 'C': | |
6437 | /* temp[="prefix"] Insert temporary labels into the object file | |
6438 | symbol table prefixed by "prefix". | |
6439 | Default prefix is ":temp:". | |
6440 | */ | |
6441 | break; | |
6442 | ||
6443 | case 'a': | |
800eeca4 JW |
6444 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6445 | according to <tgt> -- | |
6446 | exit: branch out from the current context (default) | |
6447 | labels: all labels in context may be branch targets | |
6448 | */ | |
85b40035 L |
6449 | if (strncmp (arg, "indirect=", 9) != 0) |
6450 | return 0; | |
800eeca4 JW |
6451 | break; |
6452 | ||
6453 | case 'x': | |
6454 | /* -X conflicts with an ignored option, use -x instead */ | |
6455 | md.detect_dv = 1; | |
6456 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6457 | { |
6458 | /* set default mode to explicit */ | |
6459 | md.default_explicit_mode = 1; | |
6460 | break; | |
6461 | } | |
800eeca4 | 6462 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6463 | { |
6464 | md.default_explicit_mode = 0; | |
6465 | } | |
800eeca4 | 6466 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6467 | { |
6468 | md.debug_dv = 1; | |
6469 | } | |
800eeca4 | 6470 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6471 | { |
6472 | md.default_explicit_mode = 1; | |
6473 | md.debug_dv = 1; | |
6474 | } | |
800eeca4 | 6475 | else |
542d6675 KH |
6476 | { |
6477 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6478 | } | |
800eeca4 JW |
6479 | break; |
6480 | ||
6481 | case 'S': | |
6482 | /* nops Print nops statistics. */ | |
6483 | break; | |
6484 | ||
c43c2cc5 JW |
6485 | /* GNU specific switches for gcc. */ |
6486 | case OPTION_MCONSTANT_GP: | |
6487 | md.flags |= EF_IA_64_CONS_GP; | |
6488 | break; | |
6489 | ||
6490 | case OPTION_MAUTO_PIC: | |
6491 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6492 | break; | |
6493 | ||
800eeca4 JW |
6494 | default: |
6495 | return 0; | |
6496 | } | |
6497 | ||
6498 | return 1; | |
6499 | } | |
6500 | ||
6501 | void | |
6502 | md_show_usage (stream) | |
6503 | FILE *stream; | |
6504 | { | |
542d6675 | 6505 | fputs (_("\ |
800eeca4 | 6506 | IA-64 options:\n\ |
6290819d NC |
6507 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6508 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6509 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6510 | without function descriptors (sets ELF header flag\n\ | |
6511 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6512 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6513 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
800eeca4 JW |
6514 | -x | -xexplicit turn on dependency violation checking (default)\n\ |
6515 | -xauto automagically remove dependency violations\n\ | |
6516 | -xdebug debug dependency violation checker\n"), | |
6517 | stream); | |
6518 | } | |
6519 | ||
acebd4ce AS |
6520 | void |
6521 | ia64_after_parse_args () | |
6522 | { | |
6523 | if (debug_type == DEBUG_STABS) | |
6524 | as_fatal (_("--gstabs is not supported for ia64")); | |
6525 | } | |
6526 | ||
44576e1f RH |
6527 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
6528 | ||
6529 | static int | |
800eeca4 JW |
6530 | match (int templ, int type, int slot) |
6531 | { | |
6532 | enum ia64_unit unit; | |
6533 | int result; | |
6534 | ||
6535 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
6536 | switch (type) | |
6537 | { | |
6538 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
6539 | case IA64_TYPE_A: | |
6540 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
6541 | break; | |
6542 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
6543 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
6544 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
6545 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
6546 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
6547 | default: result = 0; break; | |
6548 | } | |
6549 | return result; | |
6550 | } | |
6551 | ||
44576e1f RH |
6552 | /* Add a bit of extra goodness if a nop of type F or B would fit |
6553 | in TEMPL at SLOT. */ | |
6554 | ||
6555 | static inline int | |
6556 | extra_goodness (int templ, int slot) | |
6557 | { | |
ebeeafe6 | 6558 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) |
44576e1f | 6559 | return 2; |
ebeeafe6 | 6560 | if (slot == 2 && match (templ, IA64_TYPE_B, slot)) |
44576e1f RH |
6561 | return 1; |
6562 | return 0; | |
6563 | } | |
6564 | ||
800eeca4 JW |
6565 | /* This function is called once, at assembler startup time. It sets |
6566 | up all the tables, etc. that the MD part of the assembler will need | |
6567 | that can be determined before arguments are parsed. */ | |
6568 | void | |
6569 | md_begin () | |
6570 | { | |
44f5c83a | 6571 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
6572 | const char *err; |
6573 | char name[8]; | |
6574 | ||
6575 | md.auto_align = 1; | |
6576 | md.explicit_mode = md.default_explicit_mode; | |
6577 | ||
6578 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
6579 | ||
0234cb7c | 6580 | /* Make sure function pointers get initialized. */ |
10a98291 L |
6581 | target_big_endian = -1; |
6582 | dot_byteorder (TARGET_BYTES_BIG_ENDIAN); | |
6583 | ||
35f5df7f L |
6584 | alias_hash = hash_new (); |
6585 | alias_name_hash = hash_new (); | |
6586 | secalias_hash = hash_new (); | |
6587 | secalias_name_hash = hash_new (); | |
6588 | ||
13ae64f3 JJ |
6589 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
6590 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
6591 | &zero_address_frag); | |
6592 | ||
6593 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
6594 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
6595 | &zero_address_frag); | |
6596 | ||
800eeca4 | 6597 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
6598 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
6599 | &zero_address_frag); | |
800eeca4 JW |
6600 | |
6601 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
6602 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
6603 | &zero_address_frag); | |
800eeca4 JW |
6604 | |
6605 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
6606 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
6607 | &zero_address_frag); | |
800eeca4 | 6608 | |
fa2c7eff RH |
6609 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
6610 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
6611 | &zero_address_frag); | |
6612 | ||
c67e42c9 | 6613 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
6614 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
6615 | &zero_address_frag); | |
c67e42c9 | 6616 | |
800eeca4 | 6617 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
6618 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
6619 | &zero_address_frag); | |
800eeca4 JW |
6620 | |
6621 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
6622 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
6623 | &zero_address_frag); | |
800eeca4 JW |
6624 | |
6625 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
6626 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
6627 | &zero_address_frag); | |
800eeca4 | 6628 | |
13ae64f3 JJ |
6629 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
6630 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
6631 | &zero_address_frag); | |
6632 | ||
800eeca4 | 6633 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
6634 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
6635 | &zero_address_frag); | |
800eeca4 JW |
6636 | |
6637 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
6638 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
6639 | &zero_address_frag); | |
800eeca4 | 6640 | |
13ae64f3 JJ |
6641 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
6642 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
6643 | &zero_address_frag); | |
6644 | ||
6645 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
6646 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
6647 | &zero_address_frag); | |
6648 | ||
6649 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
6650 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
6651 | &zero_address_frag); | |
6652 | ||
3969b680 RH |
6653 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
6654 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
6655 | &zero_address_frag); | |
6656 | ||
197865e8 | 6657 | /* Compute the table of best templates. We compute goodness as a |
44576e1f RH |
6658 | base 4 value, in which each match counts for 3, each F counts |
6659 | for 2, each B counts for 1. This should maximize the number of | |
6660 | F and B nops in the chosen bundles, which is good because these | |
6661 | pipelines are least likely to be overcommitted. */ | |
800eeca4 JW |
6662 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
6663 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
6664 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
6665 | { | |
6666 | best = 0; | |
6667 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
6668 | { | |
6669 | goodness = 0; | |
6670 | if (match (t, i, 0)) | |
6671 | { | |
6672 | if (match (t, j, 1)) | |
6673 | { | |
6674 | if (match (t, k, 2)) | |
44576e1f | 6675 | goodness = 3 + 3 + 3; |
800eeca4 | 6676 | else |
44576e1f | 6677 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
6678 | } |
6679 | else if (match (t, j, 2)) | |
44576e1f | 6680 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 6681 | else |
44576e1f RH |
6682 | { |
6683 | goodness = 3; | |
6684 | goodness += extra_goodness (t, 1); | |
6685 | goodness += extra_goodness (t, 2); | |
6686 | } | |
800eeca4 JW |
6687 | } |
6688 | else if (match (t, i, 1)) | |
6689 | { | |
6690 | if (match (t, j, 2)) | |
44576e1f | 6691 | goodness = 3 + 3; |
800eeca4 | 6692 | else |
44576e1f | 6693 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
6694 | } |
6695 | else if (match (t, i, 2)) | |
44576e1f | 6696 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
6697 | |
6698 | if (goodness > best) | |
6699 | { | |
6700 | best = goodness; | |
6701 | best_template[i][j][k] = t; | |
6702 | } | |
6703 | } | |
6704 | } | |
6705 | ||
6706 | for (i = 0; i < NUM_SLOTS; ++i) | |
6707 | md.slot[i].user_template = -1; | |
6708 | ||
6709 | md.pseudo_hash = hash_new (); | |
6710 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
6711 | { | |
6712 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
6713 | (void *) (pseudo_opcode + i)); | |
6714 | if (err) | |
6715 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
6716 | pseudo_opcode[i].name, err); | |
6717 | } | |
6718 | ||
6719 | md.reg_hash = hash_new (); | |
6720 | md.dynreg_hash = hash_new (); | |
6721 | md.const_hash = hash_new (); | |
6722 | md.entry_hash = hash_new (); | |
6723 | ||
542d6675 | 6724 | /* general registers: */ |
800eeca4 JW |
6725 | |
6726 | total = 128; | |
6727 | for (i = 0; i < total; ++i) | |
6728 | { | |
6729 | sprintf (name, "r%d", i - REG_GR); | |
6730 | md.regsym[i] = declare_register (name, i); | |
6731 | } | |
6732 | ||
542d6675 | 6733 | /* floating point registers: */ |
800eeca4 JW |
6734 | total += 128; |
6735 | for (; i < total; ++i) | |
6736 | { | |
6737 | sprintf (name, "f%d", i - REG_FR); | |
6738 | md.regsym[i] = declare_register (name, i); | |
6739 | } | |
6740 | ||
542d6675 | 6741 | /* application registers: */ |
800eeca4 JW |
6742 | total += 128; |
6743 | ar_base = i; | |
6744 | for (; i < total; ++i) | |
6745 | { | |
6746 | sprintf (name, "ar%d", i - REG_AR); | |
6747 | md.regsym[i] = declare_register (name, i); | |
6748 | } | |
6749 | ||
542d6675 | 6750 | /* control registers: */ |
800eeca4 JW |
6751 | total += 128; |
6752 | cr_base = i; | |
6753 | for (; i < total; ++i) | |
6754 | { | |
6755 | sprintf (name, "cr%d", i - REG_CR); | |
6756 | md.regsym[i] = declare_register (name, i); | |
6757 | } | |
6758 | ||
542d6675 | 6759 | /* predicate registers: */ |
800eeca4 JW |
6760 | total += 64; |
6761 | for (; i < total; ++i) | |
6762 | { | |
6763 | sprintf (name, "p%d", i - REG_P); | |
6764 | md.regsym[i] = declare_register (name, i); | |
6765 | } | |
6766 | ||
542d6675 | 6767 | /* branch registers: */ |
800eeca4 JW |
6768 | total += 8; |
6769 | for (; i < total; ++i) | |
6770 | { | |
6771 | sprintf (name, "b%d", i - REG_BR); | |
6772 | md.regsym[i] = declare_register (name, i); | |
6773 | } | |
6774 | ||
6775 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
6776 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
6777 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
6778 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
6779 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
6780 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
6781 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
6782 | ||
6783 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
6784 | { | |
6785 | regnum = indirect_reg[i].regnum; | |
6786 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
6787 | } | |
6788 | ||
542d6675 | 6789 | /* define synonyms for application registers: */ |
800eeca4 JW |
6790 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
6791 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
6792 | REG_AR + ar[i - REG_AR].regnum); | |
6793 | ||
542d6675 | 6794 | /* define synonyms for control registers: */ |
800eeca4 JW |
6795 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
6796 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
6797 | REG_CR + cr[i - REG_CR].regnum); | |
6798 | ||
6799 | declare_register ("gp", REG_GR + 1); | |
6800 | declare_register ("sp", REG_GR + 12); | |
6801 | declare_register ("rp", REG_BR + 0); | |
6802 | ||
542d6675 | 6803 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
6804 | declare_register ("psp", REG_PSP); |
6805 | ||
800eeca4 JW |
6806 | declare_register_set ("ret", 4, REG_GR + 8); |
6807 | declare_register_set ("farg", 8, REG_FR + 8); | |
6808 | declare_register_set ("fret", 8, REG_FR + 8); | |
6809 | ||
6810 | for (i = 0; i < NELEMS (const_bits); ++i) | |
6811 | { | |
6812 | err = hash_insert (md.const_hash, const_bits[i].name, | |
6813 | (PTR) (const_bits + i)); | |
6814 | if (err) | |
6815 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
6816 | name, err); | |
6817 | } | |
6818 | ||
44f5c83a JW |
6819 | /* Set the architecture and machine depending on defaults and command line |
6820 | options. */ | |
6821 | if (md.flags & EF_IA_64_ABI64) | |
6822 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
6823 | else | |
6824 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
6825 | ||
6826 | if (! ok) | |
6827 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 6828 | |
557debba JW |
6829 | /* Set the pointer size and pointer shift size depending on md.flags */ |
6830 | ||
6831 | if (md.flags & EF_IA_64_ABI64) | |
6832 | { | |
6833 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
6834 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
6835 | } | |
6836 | else | |
6837 | { | |
6838 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
6839 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
6840 | } | |
6841 | ||
800eeca4 JW |
6842 | md.mem_offset.hint = 0; |
6843 | md.path = 0; | |
6844 | md.maxpaths = 0; | |
6845 | md.entry_labels = NULL; | |
6846 | } | |
6847 | ||
44f5c83a JW |
6848 | /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin |
6849 | because that is called after md_parse_option which is where we do the | |
6850 | dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the | |
6851 | default endianness. */ | |
6852 | ||
6853 | void | |
6854 | ia64_init (argc, argv) | |
2434f565 JW |
6855 | int argc ATTRIBUTE_UNUSED; |
6856 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 6857 | { |
1cd8ff38 | 6858 | md.flags = MD_FLAGS_DEFAULT; |
44f5c83a JW |
6859 | } |
6860 | ||
6861 | /* Return a string for the target object file format. */ | |
6862 | ||
6863 | const char * | |
6864 | ia64_target_format () | |
6865 | { | |
6866 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
6867 | { | |
72a76794 JW |
6868 | if (md.flags & EF_IA_64_BE) |
6869 | { | |
6870 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 6871 | #if defined(TE_AIX50) |
7463c317 | 6872 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
6873 | #elif defined(TE_HPUX) |
6874 | return "elf64-ia64-hpux-big"; | |
7463c317 | 6875 | #else |
72a76794 | 6876 | return "elf64-ia64-big"; |
7463c317 | 6877 | #endif |
72a76794 | 6878 | else |
1cd8ff38 | 6879 | #if defined(TE_AIX50) |
7463c317 | 6880 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
6881 | #elif defined(TE_HPUX) |
6882 | return "elf32-ia64-hpux-big"; | |
7463c317 | 6883 | #else |
72a76794 | 6884 | return "elf32-ia64-big"; |
7463c317 | 6885 | #endif |
72a76794 | 6886 | } |
44f5c83a | 6887 | else |
72a76794 JW |
6888 | { |
6889 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
6890 | #ifdef TE_AIX50 |
6891 | return "elf64-ia64-aix-little"; | |
6892 | #else | |
72a76794 | 6893 | return "elf64-ia64-little"; |
7463c317 | 6894 | #endif |
72a76794 | 6895 | else |
7463c317 TW |
6896 | #ifdef TE_AIX50 |
6897 | return "elf32-ia64-aix-little"; | |
6898 | #else | |
72a76794 | 6899 | return "elf32-ia64-little"; |
7463c317 | 6900 | #endif |
72a76794 | 6901 | } |
44f5c83a JW |
6902 | } |
6903 | else | |
6904 | return "unknown-format"; | |
6905 | } | |
6906 | ||
800eeca4 JW |
6907 | void |
6908 | ia64_end_of_source () | |
6909 | { | |
542d6675 | 6910 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
6911 | insn_group_break (1, 0, 0); |
6912 | ||
542d6675 | 6913 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
6914 | ia64_flush_insns (); |
6915 | ||
6916 | bfd_set_private_flags (stdoutput, md.flags); | |
6917 | ||
800eeca4 JW |
6918 | md.mem_offset.hint = 0; |
6919 | } | |
6920 | ||
6921 | void | |
6922 | ia64_start_line () | |
6923 | { | |
f1bcba5b JW |
6924 | if (md.qp.X_op == O_register) |
6925 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
6926 | md.qp.X_op = O_absent; |
6927 | ||
6928 | if (ignore_input ()) | |
6929 | return; | |
6930 | ||
6931 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
6932 | { | |
6933 | if (md.detect_dv && !md.explicit_mode) | |
542d6675 | 6934 | as_warn (_("Explicit stops are ignored in auto mode")); |
800eeca4 | 6935 | else |
542d6675 | 6936 | insn_group_break (1, 0, 0); |
800eeca4 JW |
6937 | } |
6938 | } | |
6939 | ||
f1bcba5b JW |
6940 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
6941 | labels. */ | |
6942 | static int defining_tag = 0; | |
6943 | ||
800eeca4 JW |
6944 | int |
6945 | ia64_unrecognized_line (ch) | |
6946 | int ch; | |
6947 | { | |
6948 | switch (ch) | |
6949 | { | |
6950 | case '(': | |
6951 | expression (&md.qp); | |
6952 | if (*input_line_pointer++ != ')') | |
6953 | { | |
6954 | as_bad ("Expected ')'"); | |
6955 | return 0; | |
6956 | } | |
6957 | if (md.qp.X_op != O_register) | |
6958 | { | |
6959 | as_bad ("Qualifying predicate expected"); | |
6960 | return 0; | |
6961 | } | |
6962 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
6963 | { | |
6964 | as_bad ("Predicate register expected"); | |
6965 | return 0; | |
6966 | } | |
6967 | return 1; | |
6968 | ||
6969 | case '{': | |
6970 | if (md.manual_bundling) | |
6971 | as_warn ("Found '{' when manual bundling is already turned on"); | |
6972 | else | |
6973 | CURR_SLOT.manual_bundling_on = 1; | |
6974 | md.manual_bundling = 1; | |
6975 | ||
542d6675 KH |
6976 | /* Bundling is only acceptable in explicit mode |
6977 | or when in default automatic mode. */ | |
800eeca4 | 6978 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
6979 | { |
6980 | if (!md.mode_explicitly_set | |
6981 | && !md.default_explicit_mode) | |
6982 | dot_dv_mode ('E'); | |
6983 | else | |
6984 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
6985 | } | |
800eeca4 JW |
6986 | return 1; |
6987 | ||
6988 | case '}': | |
6989 | if (!md.manual_bundling) | |
6990 | as_warn ("Found '}' when manual bundling is off"); | |
6991 | else | |
6992 | PREV_SLOT.manual_bundling_off = 1; | |
6993 | md.manual_bundling = 0; | |
6994 | ||
6995 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 6996 | if (md.detect_dv |
542d6675 KH |
6997 | && md.explicit_mode |
6998 | && !md.mode_explicitly_set | |
6999 | && !md.default_explicit_mode) | |
7000 | dot_dv_mode ('A'); | |
800eeca4 JW |
7001 | |
7002 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7003 | happens automatically because ';' is an end of line marker. */ | |
7004 | SKIP_WHITESPACE (); | |
7005 | if (input_line_pointer[0] == '{') | |
7006 | { | |
7007 | input_line_pointer++; | |
7008 | return ia64_unrecognized_line ('{'); | |
7009 | } | |
7010 | ||
7011 | demand_empty_rest_of_line (); | |
7012 | return 1; | |
7013 | ||
f1bcba5b JW |
7014 | case '[': |
7015 | { | |
7016 | char *s; | |
7017 | char c; | |
7018 | symbolS *tag; | |
4d5a53ff | 7019 | int temp; |
f1bcba5b JW |
7020 | |
7021 | if (md.qp.X_op == O_register) | |
7022 | { | |
7023 | as_bad ("Tag must come before qualifying predicate."); | |
7024 | return 0; | |
7025 | } | |
4d5a53ff JW |
7026 | |
7027 | /* This implements just enough of read_a_source_file in read.c to | |
7028 | recognize labels. */ | |
7029 | if (is_name_beginner (*input_line_pointer)) | |
7030 | { | |
7031 | s = input_line_pointer; | |
7032 | c = get_symbol_end (); | |
7033 | } | |
7034 | else if (LOCAL_LABELS_FB | |
3882b010 | 7035 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7036 | { |
7037 | temp = 0; | |
3882b010 | 7038 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7039 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7040 | fb_label_instance_inc (temp); | |
7041 | s = fb_label_name (temp, 0); | |
7042 | c = *input_line_pointer; | |
7043 | } | |
7044 | else | |
7045 | { | |
7046 | s = NULL; | |
7047 | c = '\0'; | |
7048 | } | |
f1bcba5b JW |
7049 | if (c != ':') |
7050 | { | |
7051 | /* Put ':' back for error messages' sake. */ | |
7052 | *input_line_pointer++ = ':'; | |
7053 | as_bad ("Expected ':'"); | |
7054 | return 0; | |
7055 | } | |
4d5a53ff | 7056 | |
f1bcba5b JW |
7057 | defining_tag = 1; |
7058 | tag = colon (s); | |
7059 | defining_tag = 0; | |
7060 | /* Put ':' back for error messages' sake. */ | |
7061 | *input_line_pointer++ = ':'; | |
7062 | if (*input_line_pointer++ != ']') | |
7063 | { | |
7064 | as_bad ("Expected ']'"); | |
7065 | return 0; | |
7066 | } | |
7067 | if (! tag) | |
7068 | { | |
7069 | as_bad ("Tag name expected"); | |
7070 | return 0; | |
7071 | } | |
7072 | return 1; | |
7073 | } | |
7074 | ||
800eeca4 JW |
7075 | default: |
7076 | break; | |
7077 | } | |
542d6675 KH |
7078 | |
7079 | /* Not a valid line. */ | |
7080 | return 0; | |
800eeca4 JW |
7081 | } |
7082 | ||
7083 | void | |
7084 | ia64_frob_label (sym) | |
7085 | struct symbol *sym; | |
7086 | { | |
7087 | struct label_fix *fix; | |
7088 | ||
f1bcba5b JW |
7089 | /* Tags need special handling since they are not bundle breaks like |
7090 | labels. */ | |
7091 | if (defining_tag) | |
7092 | { | |
7093 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7094 | fix->sym = sym; | |
7095 | fix->next = CURR_SLOT.tag_fixups; | |
7096 | CURR_SLOT.tag_fixups = fix; | |
7097 | ||
7098 | return; | |
7099 | } | |
7100 | ||
800eeca4 JW |
7101 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7102 | { | |
7103 | md.last_text_seg = now_seg; | |
7104 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7105 | fix->sym = sym; | |
7106 | fix->next = CURR_SLOT.label_fixups; | |
7107 | CURR_SLOT.label_fixups = fix; | |
7108 | ||
542d6675 | 7109 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7110 | if (md.path == md.maxpaths) |
542d6675 KH |
7111 | { |
7112 | md.maxpaths += 20; | |
7113 | md.entry_labels = (const char **) | |
7114 | xrealloc ((void *) md.entry_labels, | |
7115 | md.maxpaths * sizeof (char *)); | |
7116 | } | |
800eeca4 JW |
7117 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7118 | } | |
7119 | } | |
7120 | ||
7121 | void | |
7122 | ia64_flush_pending_output () | |
7123 | { | |
4d5a53ff JW |
7124 | if (!md.keep_pending_output |
7125 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7126 | { |
7127 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7128 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7129 | insn_group_break (1, 0, 0); | |
7130 | ia64_flush_insns (); | |
7131 | } | |
7132 | } | |
7133 | ||
7134 | /* Do ia64-specific expression optimization. All that's done here is | |
7135 | to transform index expressions that are either due to the indexing | |
7136 | of rotating registers or due to the indexing of indirect register | |
7137 | sets. */ | |
7138 | int | |
7139 | ia64_optimize_expr (l, op, r) | |
7140 | expressionS *l; | |
7141 | operatorT op; | |
7142 | expressionS *r; | |
7143 | { | |
7144 | unsigned num_regs; | |
7145 | ||
7146 | if (op == O_index) | |
7147 | { | |
7148 | if (l->X_op == O_register && r->X_op == O_constant) | |
7149 | { | |
7150 | num_regs = (l->X_add_number >> 16); | |
7151 | if ((unsigned) r->X_add_number >= num_regs) | |
7152 | { | |
7153 | if (!num_regs) | |
7154 | as_bad ("No current frame"); | |
7155 | else | |
7156 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7157 | r->X_add_number = 0; | |
7158 | } | |
7159 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7160 | return 1; | |
7161 | } | |
7162 | else if (l->X_op == O_register && r->X_op == O_register) | |
7163 | { | |
7164 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7165 | || l->X_add_number == IND_MEM) | |
7166 | { | |
7167 | as_bad ("Indirect register set name expected"); | |
7168 | l->X_add_number = IND_CPUID; | |
7169 | } | |
7170 | l->X_op = O_index; | |
7171 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7172 | l->X_add_number = r->X_add_number; | |
7173 | return 1; | |
7174 | } | |
7175 | } | |
7176 | return 0; | |
7177 | } | |
7178 | ||
7179 | int | |
7180 | ia64_parse_name (name, e) | |
7181 | char *name; | |
7182 | expressionS *e; | |
7183 | { | |
7184 | struct const_desc *cdesc; | |
7185 | struct dynreg *dr = 0; | |
7186 | unsigned int regnum; | |
7187 | struct symbol *sym; | |
7188 | char *end; | |
7189 | ||
542d6675 | 7190 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7191 | sym = hash_find (md.reg_hash, name); |
7192 | if (sym) | |
7193 | { | |
7194 | e->X_op = O_register; | |
7195 | e->X_add_number = S_GET_VALUE (sym); | |
7196 | return 1; | |
7197 | } | |
7198 | ||
7199 | cdesc = hash_find (md.const_hash, name); | |
7200 | if (cdesc) | |
7201 | { | |
7202 | e->X_op = O_constant; | |
7203 | e->X_add_number = cdesc->value; | |
7204 | return 1; | |
7205 | } | |
7206 | ||
542d6675 | 7207 | /* check for inN, locN, or outN: */ |
800eeca4 JW |
7208 | switch (name[0]) |
7209 | { | |
7210 | case 'i': | |
3882b010 | 7211 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7212 | { |
7213 | dr = &md.in; | |
7214 | name += 2; | |
7215 | } | |
7216 | break; | |
7217 | ||
7218 | case 'l': | |
3882b010 | 7219 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7220 | { |
7221 | dr = &md.loc; | |
7222 | name += 3; | |
7223 | } | |
7224 | break; | |
7225 | ||
7226 | case 'o': | |
3882b010 | 7227 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7228 | { |
7229 | dr = &md.out; | |
7230 | name += 3; | |
7231 | } | |
7232 | break; | |
7233 | ||
7234 | default: | |
7235 | break; | |
7236 | } | |
7237 | ||
7238 | if (dr) | |
7239 | { | |
542d6675 | 7240 | /* The name is inN, locN, or outN; parse the register number. */ |
800eeca4 JW |
7241 | regnum = strtoul (name, &end, 10); |
7242 | if (end > name && *end == '\0') | |
7243 | { | |
7244 | if ((unsigned) regnum >= dr->num_regs) | |
7245 | { | |
7246 | if (!dr->num_regs) | |
7247 | as_bad ("No current frame"); | |
7248 | else | |
542d6675 KH |
7249 | as_bad ("Register number out of range 0..%u", |
7250 | dr->num_regs - 1); | |
800eeca4 JW |
7251 | regnum = 0; |
7252 | } | |
7253 | e->X_op = O_register; | |
7254 | e->X_add_number = dr->base + regnum; | |
7255 | return 1; | |
7256 | } | |
7257 | } | |
7258 | ||
7259 | if ((dr = hash_find (md.dynreg_hash, name))) | |
7260 | { | |
7261 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7262 | Store the base register number in the low 16 bits of |
7263 | X_add_number and the size of the register set in the top 16 | |
7264 | bits. */ | |
800eeca4 JW |
7265 | e->X_op = O_register; |
7266 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7267 | return 1; | |
7268 | } | |
7269 | return 0; | |
7270 | } | |
7271 | ||
7272 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7273 | ||
7274 | char * | |
7275 | ia64_canonicalize_symbol_name (name) | |
7276 | char *name; | |
7277 | { | |
542d6675 KH |
7278 | size_t len = strlen (name); |
7279 | if (len > 1 && name[len - 1] == '#') | |
7280 | name[len - 1] = '\0'; | |
800eeca4 JW |
7281 | return name; |
7282 | } | |
7283 | ||
3e37788f JW |
7284 | /* Return true if idesc is a conditional branch instruction. This excludes |
7285 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7286 | because they always read/write resources regardless of the value of the | |
7287 | qualifying predicate. br.ia must always use p0, and hence is always | |
7288 | taken. Thus this function returns true for branches which can fall | |
7289 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7290 | |
800eeca4 JW |
7291 | static int |
7292 | is_conditional_branch (idesc) | |
542d6675 | 7293 | struct ia64_opcode *idesc; |
800eeca4 | 7294 | { |
1deb8127 | 7295 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7296 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7297 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7298 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7299 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7300 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7301 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7302 | || idesc->name[2] == 'l' | |
7303 | /* br.cond, br.call, br.clr */ | |
7304 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7305 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7306 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7307 | } |
7308 | ||
7309 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7310 | returns zero. */ |
7311 | ||
800eeca4 JW |
7312 | static int |
7313 | is_taken_branch (idesc) | |
542d6675 | 7314 | struct ia64_opcode *idesc; |
800eeca4 JW |
7315 | { |
7316 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7317 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7318 | } |
7319 | ||
7320 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7321 | doubt, returns zero. */ |
7322 | ||
800eeca4 JW |
7323 | static int |
7324 | is_interruption_or_rfi (idesc) | |
542d6675 | 7325 | struct ia64_opcode *idesc; |
800eeca4 JW |
7326 | { |
7327 | if (strcmp (idesc->name, "rfi") == 0) | |
7328 | return 1; | |
7329 | return 0; | |
7330 | } | |
7331 | ||
7332 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7333 | -1 if there is no dependency. */ | |
542d6675 | 7334 | |
800eeca4 JW |
7335 | static int |
7336 | depends_on (depind, idesc) | |
542d6675 KH |
7337 | int depind; |
7338 | struct ia64_opcode *idesc; | |
800eeca4 JW |
7339 | { |
7340 | int i; | |
7341 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7342 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7343 | { |
542d6675 KH |
7344 | if (depind == DEP (dep->chks[i])) |
7345 | return i; | |
800eeca4 JW |
7346 | } |
7347 | return -1; | |
7348 | } | |
7349 | ||
7350 | /* Determine a set of specific resources used for a particular resource | |
7351 | class. Returns the number of specific resources identified For those | |
7352 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7353 | marked nonspecific. |
800eeca4 JW |
7354 | |
7355 | Meanings of value in 'NOTE': | |
7356 | 1) only read/write when the register number is explicitly encoded in the | |
7357 | insn. | |
7358 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 7359 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
7360 | 3) general register value is used to specify an indirect register; not |
7361 | determinable statically. | |
7362 | 4) only read the given resource when bits 7:0 of the indirect index | |
7363 | register value does not match the register number of the resource; not | |
7364 | determinable statically. | |
7365 | 5) all rules are implementation specific. | |
7366 | 6) only when both the index specified by the reader and the index specified | |
7367 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 7368 | statically. |
800eeca4 | 7369 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 7370 | set |
800eeca4 JW |
7371 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
7372 | only read when these insns reference FR2-31 | |
7373 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
7374 | written when these insns write FR32-127 | |
7375 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
7376 | instruction | |
7377 | 11) The target predicates are written independently of PR[qp], but source | |
7378 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
7379 | cannot statically be determined, all source registers are marked used. | |
7380 | 12) This insn only reads the specified predicate register when that | |
7381 | register is the PR[qp]. | |
7382 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 7383 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
7384 | 14) The RSE resource includes the implementation-specific RSE internal |
7385 | state resources. At least one (and possibly more) of these resources are | |
7386 | read by each instruction listed in IC:rse-readers. At least one (and | |
7387 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 7388 | IC:rse-writers. |
800eeca4 | 7389 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 7390 | generate. |
800eeca4 JW |
7391 | |
7392 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
7393 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
7394 | */ |
7395 | ||
7396 | #define MAX_SPECS 256 | |
7397 | #define DV_CHK 1 | |
7398 | #define DV_REG 0 | |
7399 | ||
7400 | static int | |
7401 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
7402 | const struct ia64_dependency *dep; |
7403 | struct ia64_opcode *idesc; | |
7404 | int type; /* is this a DV chk or a DV reg? */ | |
7405 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
7406 | int note; /* resource note for this insn's usage */ | |
7407 | int path; /* which execution path to examine */ | |
800eeca4 JW |
7408 | { |
7409 | int count = 0; | |
7410 | int i; | |
7411 | int rsrc_write = 0; | |
7412 | struct rsrc tmpl; | |
197865e8 | 7413 | |
800eeca4 JW |
7414 | if (dep->mode == IA64_DV_WAW |
7415 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
7416 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
7417 | rsrc_write = 1; | |
7418 | ||
7419 | /* template for any resources we identify */ | |
7420 | tmpl.dependency = dep; | |
7421 | tmpl.note = note; | |
7422 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
7423 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
7424 | tmpl.link_to_qp_branch = 1; | |
7425 | tmpl.mem_offset.hint = 0; | |
7426 | tmpl.specific = 1; | |
7427 | tmpl.index = 0; | |
7484b8e6 | 7428 | tmpl.cmp_type = CMP_NONE; |
800eeca4 JW |
7429 | |
7430 | #define UNHANDLED \ | |
7431 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
7432 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
7433 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
7434 | ||
7435 | /* we don't need to track these */ | |
7436 | if (dep->semantics == IA64_DVS_NONE) | |
7437 | return 0; | |
7438 | ||
7439 | switch (dep->specifier) | |
7440 | { | |
7441 | case IA64_RS_AR_K: | |
7442 | if (note == 1) | |
542d6675 KH |
7443 | { |
7444 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7445 | { | |
7446 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7447 | if (regno >= 0 && regno <= 7) | |
7448 | { | |
7449 | specs[count] = tmpl; | |
7450 | specs[count++].index = regno; | |
7451 | } | |
7452 | } | |
7453 | } | |
800eeca4 | 7454 | else if (note == 0) |
542d6675 KH |
7455 | { |
7456 | for (i = 0; i < 8; i++) | |
7457 | { | |
7458 | specs[count] = tmpl; | |
7459 | specs[count++].index = i; | |
7460 | } | |
7461 | } | |
800eeca4 | 7462 | else |
542d6675 KH |
7463 | { |
7464 | UNHANDLED; | |
7465 | } | |
800eeca4 JW |
7466 | break; |
7467 | ||
7468 | case IA64_RS_AR_UNAT: | |
7469 | /* This is a mov =AR or mov AR= instruction. */ | |
7470 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7471 | { | |
7472 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7473 | if (regno == AR_UNAT) | |
7474 | { | |
7475 | specs[count++] = tmpl; | |
7476 | } | |
7477 | } | |
7478 | else | |
7479 | { | |
7480 | /* This is a spill/fill, or other instruction that modifies the | |
7481 | unat register. */ | |
7482 | ||
7483 | /* Unless we can determine the specific bits used, mark the whole | |
7484 | thing; bits 8:3 of the memory address indicate the bit used in | |
7485 | UNAT. The .mem.offset hint may be used to eliminate a small | |
7486 | subset of conflicts. */ | |
7487 | specs[count] = tmpl; | |
7488 | if (md.mem_offset.hint) | |
7489 | { | |
542d6675 KH |
7490 | if (md.debug_dv) |
7491 | fprintf (stderr, " Using hint for spill/fill\n"); | |
7492 | /* The index isn't actually used, just set it to something | |
7493 | approximating the bit index. */ | |
800eeca4 JW |
7494 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
7495 | specs[count].mem_offset.hint = 1; | |
7496 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
7497 | specs[count++].mem_offset.base = md.mem_offset.base; | |
7498 | } | |
7499 | else | |
7500 | { | |
7501 | specs[count++].specific = 0; | |
7502 | } | |
7503 | } | |
7504 | break; | |
7505 | ||
7506 | case IA64_RS_AR: | |
7507 | if (note == 1) | |
542d6675 KH |
7508 | { |
7509 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7510 | { | |
7511 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7512 | if ((regno >= 8 && regno <= 15) | |
7513 | || (regno >= 20 && regno <= 23) | |
7514 | || (regno >= 31 && regno <= 39) | |
7515 | || (regno >= 41 && regno <= 47) | |
7516 | || (regno >= 67 && regno <= 111)) | |
7517 | { | |
7518 | specs[count] = tmpl; | |
7519 | specs[count++].index = regno; | |
7520 | } | |
7521 | } | |
7522 | } | |
800eeca4 | 7523 | else |
542d6675 KH |
7524 | { |
7525 | UNHANDLED; | |
7526 | } | |
800eeca4 JW |
7527 | break; |
7528 | ||
7529 | case IA64_RS_ARb: | |
7530 | if (note == 1) | |
542d6675 KH |
7531 | { |
7532 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7533 | { | |
7534 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7535 | if ((regno >= 48 && regno <= 63) | |
7536 | || (regno >= 112 && regno <= 127)) | |
7537 | { | |
7538 | specs[count] = tmpl; | |
7539 | specs[count++].index = regno; | |
7540 | } | |
7541 | } | |
7542 | } | |
800eeca4 | 7543 | else if (note == 0) |
542d6675 KH |
7544 | { |
7545 | for (i = 48; i < 64; i++) | |
7546 | { | |
7547 | specs[count] = tmpl; | |
7548 | specs[count++].index = i; | |
7549 | } | |
7550 | for (i = 112; i < 128; i++) | |
7551 | { | |
7552 | specs[count] = tmpl; | |
7553 | specs[count++].index = i; | |
7554 | } | |
7555 | } | |
197865e8 | 7556 | else |
542d6675 KH |
7557 | { |
7558 | UNHANDLED; | |
7559 | } | |
800eeca4 JW |
7560 | break; |
7561 | ||
7562 | case IA64_RS_BR: | |
7563 | if (note != 1) | |
542d6675 KH |
7564 | { |
7565 | UNHANDLED; | |
7566 | } | |
800eeca4 | 7567 | else |
542d6675 KH |
7568 | { |
7569 | if (rsrc_write) | |
7570 | { | |
7571 | for (i = 0; i < idesc->num_outputs; i++) | |
7572 | if (idesc->operands[i] == IA64_OPND_B1 | |
7573 | || idesc->operands[i] == IA64_OPND_B2) | |
7574 | { | |
7575 | specs[count] = tmpl; | |
7576 | specs[count++].index = | |
7577 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7578 | } | |
7579 | } | |
7580 | else | |
7581 | { | |
40449e9f | 7582 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
7583 | if (idesc->operands[i] == IA64_OPND_B1 |
7584 | || idesc->operands[i] == IA64_OPND_B2) | |
7585 | { | |
7586 | specs[count] = tmpl; | |
7587 | specs[count++].index = | |
7588 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7589 | } | |
7590 | } | |
7591 | } | |
800eeca4 JW |
7592 | break; |
7593 | ||
7594 | case IA64_RS_CPUID: /* four or more registers */ | |
7595 | if (note == 3) | |
542d6675 KH |
7596 | { |
7597 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
7598 | { | |
7599 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7600 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7601 | && KNOWN (regno)) | |
7602 | { | |
7603 | specs[count] = tmpl; | |
7604 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7605 | } | |
7606 | else | |
7607 | { | |
7608 | specs[count] = tmpl; | |
7609 | specs[count++].specific = 0; | |
7610 | } | |
7611 | } | |
7612 | } | |
800eeca4 | 7613 | else |
542d6675 KH |
7614 | { |
7615 | UNHANDLED; | |
7616 | } | |
800eeca4 JW |
7617 | break; |
7618 | ||
7619 | case IA64_RS_DBR: /* four or more registers */ | |
7620 | if (note == 3) | |
542d6675 KH |
7621 | { |
7622 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
7623 | { | |
7624 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7625 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7626 | && KNOWN (regno)) | |
7627 | { | |
7628 | specs[count] = tmpl; | |
7629 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7630 | } | |
7631 | else | |
7632 | { | |
7633 | specs[count] = tmpl; | |
7634 | specs[count++].specific = 0; | |
7635 | } | |
7636 | } | |
7637 | } | |
800eeca4 | 7638 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7639 | { |
7640 | specs[count] = tmpl; | |
7641 | specs[count++].specific = 0; | |
7642 | } | |
800eeca4 | 7643 | else |
542d6675 KH |
7644 | { |
7645 | UNHANDLED; | |
7646 | } | |
800eeca4 JW |
7647 | break; |
7648 | ||
7649 | case IA64_RS_IBR: /* four or more registers */ | |
7650 | if (note == 3) | |
542d6675 KH |
7651 | { |
7652 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
7653 | { | |
7654 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7655 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7656 | && KNOWN (regno)) | |
7657 | { | |
7658 | specs[count] = tmpl; | |
7659 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7660 | } | |
7661 | else | |
7662 | { | |
7663 | specs[count] = tmpl; | |
7664 | specs[count++].specific = 0; | |
7665 | } | |
7666 | } | |
7667 | } | |
800eeca4 | 7668 | else |
542d6675 KH |
7669 | { |
7670 | UNHANDLED; | |
7671 | } | |
800eeca4 JW |
7672 | break; |
7673 | ||
7674 | case IA64_RS_MSR: | |
7675 | if (note == 5) | |
7676 | { | |
7677 | /* These are implementation specific. Force all references to | |
7678 | conflict with all other references. */ | |
7679 | specs[count] = tmpl; | |
7680 | specs[count++].specific = 0; | |
7681 | } | |
7682 | else | |
7683 | { | |
7684 | UNHANDLED; | |
7685 | } | |
7686 | break; | |
7687 | ||
7688 | case IA64_RS_PKR: /* 16 or more registers */ | |
7689 | if (note == 3 || note == 4) | |
542d6675 KH |
7690 | { |
7691 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
7692 | { | |
7693 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7694 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7695 | && KNOWN (regno)) | |
7696 | { | |
7697 | if (note == 3) | |
7698 | { | |
7699 | specs[count] = tmpl; | |
7700 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7701 | } | |
7702 | else | |
7703 | for (i = 0; i < NELEMS (gr_values); i++) | |
7704 | { | |
7705 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 7706 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
7707 | { |
7708 | specs[count] = tmpl; | |
7709 | specs[count++].index = i; | |
7710 | } | |
7711 | } | |
7712 | } | |
7713 | else | |
7714 | { | |
7715 | specs[count] = tmpl; | |
7716 | specs[count++].specific = 0; | |
7717 | } | |
7718 | } | |
7719 | } | |
7720 | else if (note == 0) | |
7721 | { | |
7722 | /* probe et al. */ | |
7723 | specs[count] = tmpl; | |
7724 | specs[count++].specific = 0; | |
7725 | } | |
7726 | break; | |
7727 | ||
7728 | case IA64_RS_PMC: /* four or more registers */ | |
7729 | if (note == 3) | |
7730 | { | |
7731 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
7732 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
7733 | ||
7734 | { | |
7735 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
7736 | ? 1 : !rsrc_write); | |
7737 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
7738 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7739 | && KNOWN (regno)) | |
7740 | { | |
7741 | specs[count] = tmpl; | |
7742 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7743 | } | |
7744 | else | |
7745 | { | |
7746 | specs[count] = tmpl; | |
7747 | specs[count++].specific = 0; | |
7748 | } | |
7749 | } | |
7750 | } | |
7751 | else | |
7752 | { | |
7753 | UNHANDLED; | |
7754 | } | |
800eeca4 JW |
7755 | break; |
7756 | ||
7757 | case IA64_RS_PMD: /* four or more registers */ | |
7758 | if (note == 3) | |
542d6675 KH |
7759 | { |
7760 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
7761 | { | |
7762 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7763 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7764 | && KNOWN (regno)) | |
7765 | { | |
7766 | specs[count] = tmpl; | |
7767 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7768 | } | |
7769 | else | |
7770 | { | |
7771 | specs[count] = tmpl; | |
7772 | specs[count++].specific = 0; | |
7773 | } | |
7774 | } | |
7775 | } | |
800eeca4 | 7776 | else |
542d6675 KH |
7777 | { |
7778 | UNHANDLED; | |
7779 | } | |
800eeca4 JW |
7780 | break; |
7781 | ||
7782 | case IA64_RS_RR: /* eight registers */ | |
7783 | if (note == 6) | |
542d6675 KH |
7784 | { |
7785 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
7786 | { | |
7787 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7788 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7789 | && KNOWN (regno)) | |
7790 | { | |
7791 | specs[count] = tmpl; | |
7792 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
7793 | } | |
7794 | else | |
7795 | { | |
7796 | specs[count] = tmpl; | |
7797 | specs[count++].specific = 0; | |
7798 | } | |
7799 | } | |
7800 | } | |
800eeca4 | 7801 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7802 | { |
7803 | specs[count] = tmpl; | |
7804 | specs[count++].specific = 0; | |
7805 | } | |
197865e8 | 7806 | else |
542d6675 KH |
7807 | { |
7808 | UNHANDLED; | |
7809 | } | |
800eeca4 JW |
7810 | break; |
7811 | ||
7812 | case IA64_RS_CR_IRR: | |
197865e8 | 7813 | if (note == 0) |
542d6675 KH |
7814 | { |
7815 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
7816 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
7817 | if (rsrc_write | |
7818 | && idesc->operands[1] == IA64_OPND_CR3 | |
7819 | && regno == CR_IVR) | |
7820 | { | |
7821 | for (i = 0; i < 4; i++) | |
7822 | { | |
7823 | specs[count] = tmpl; | |
7824 | specs[count++].index = CR_IRR0 + i; | |
7825 | } | |
7826 | } | |
7827 | } | |
800eeca4 | 7828 | else if (note == 1) |
542d6675 KH |
7829 | { |
7830 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7831 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
7832 | && regno >= CR_IRR0 | |
7833 | && regno <= CR_IRR3) | |
7834 | { | |
7835 | specs[count] = tmpl; | |
7836 | specs[count++].index = regno; | |
7837 | } | |
7838 | } | |
800eeca4 | 7839 | else |
542d6675 KH |
7840 | { |
7841 | UNHANDLED; | |
7842 | } | |
800eeca4 JW |
7843 | break; |
7844 | ||
7845 | case IA64_RS_CR_LRR: | |
7846 | if (note != 1) | |
542d6675 KH |
7847 | { |
7848 | UNHANDLED; | |
7849 | } | |
197865e8 | 7850 | else |
542d6675 KH |
7851 | { |
7852 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7853 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
7854 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
7855 | { | |
7856 | specs[count] = tmpl; | |
7857 | specs[count++].index = regno; | |
7858 | } | |
7859 | } | |
800eeca4 JW |
7860 | break; |
7861 | ||
7862 | case IA64_RS_CR: | |
7863 | if (note == 1) | |
542d6675 KH |
7864 | { |
7865 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
7866 | { | |
7867 | specs[count] = tmpl; | |
7868 | specs[count++].index = | |
7869 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7870 | } | |
7871 | } | |
800eeca4 | 7872 | else |
542d6675 KH |
7873 | { |
7874 | UNHANDLED; | |
7875 | } | |
800eeca4 JW |
7876 | break; |
7877 | ||
7878 | case IA64_RS_FR: | |
7879 | case IA64_RS_FRb: | |
7880 | if (note != 1) | |
542d6675 KH |
7881 | { |
7882 | UNHANDLED; | |
7883 | } | |
800eeca4 | 7884 | else if (rsrc_write) |
542d6675 KH |
7885 | { |
7886 | if (dep->specifier == IA64_RS_FRb | |
7887 | && idesc->operands[0] == IA64_OPND_F1) | |
7888 | { | |
7889 | specs[count] = tmpl; | |
7890 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
7891 | } | |
7892 | } | |
800eeca4 | 7893 | else |
542d6675 KH |
7894 | { |
7895 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
7896 | { | |
7897 | if (idesc->operands[i] == IA64_OPND_F2 | |
7898 | || idesc->operands[i] == IA64_OPND_F3 | |
7899 | || idesc->operands[i] == IA64_OPND_F4) | |
7900 | { | |
7901 | specs[count] = tmpl; | |
7902 | specs[count++].index = | |
7903 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
7904 | } | |
7905 | } | |
7906 | } | |
800eeca4 JW |
7907 | break; |
7908 | ||
7909 | case IA64_RS_GR: | |
7910 | if (note == 13) | |
542d6675 KH |
7911 | { |
7912 | /* This reference applies only to the GR whose value is loaded with | |
7913 | data returned from memory. */ | |
7914 | specs[count] = tmpl; | |
7915 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
7916 | } | |
800eeca4 | 7917 | else if (note == 1) |
542d6675 KH |
7918 | { |
7919 | if (rsrc_write) | |
7920 | { | |
7921 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
7922 | if (idesc->operands[i] == IA64_OPND_R1 |
7923 | || idesc->operands[i] == IA64_OPND_R2 | |
7924 | || idesc->operands[i] == IA64_OPND_R3) | |
7925 | { | |
7926 | specs[count] = tmpl; | |
197865e8 | 7927 | specs[count++].index = |
50b81f19 JW |
7928 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
7929 | } | |
7930 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
7931 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
7932 | if (idesc->operands[i] == IA64_OPND_MR3) | |
7933 | { | |
7934 | specs[count] = tmpl; | |
7935 | specs[count++].index = | |
7936 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
7937 | } | |
542d6675 KH |
7938 | } |
7939 | else | |
7940 | { | |
7941 | /* Look for anything that reads a GR. */ | |
7942 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
7943 | { | |
7944 | if (idesc->operands[i] == IA64_OPND_MR3 | |
7945 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
7946 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
7947 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 7948 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
7949 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
7950 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
7951 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
7952 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
7953 | || ((i >= idesc->num_outputs) | |
7954 | && (idesc->operands[i] == IA64_OPND_R1 | |
7955 | || idesc->operands[i] == IA64_OPND_R2 | |
7956 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
7957 | /* addl source register. */ |
7958 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
7959 | { |
7960 | specs[count] = tmpl; | |
7961 | specs[count++].index = | |
7962 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
7963 | } | |
7964 | } | |
7965 | } | |
7966 | } | |
197865e8 | 7967 | else |
542d6675 KH |
7968 | { |
7969 | UNHANDLED; | |
7970 | } | |
800eeca4 JW |
7971 | break; |
7972 | ||
139368c9 JW |
7973 | /* This is the same as IA64_RS_PRr, except that the register range is |
7974 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
7975 | case IA64_RS_PR: |
7976 | if (note == 0) | |
542d6675 | 7977 | { |
139368c9 | 7978 | for (i = 1; i < 16; i++) |
542d6675 | 7979 | { |
139368c9 JW |
7980 | specs[count] = tmpl; |
7981 | specs[count++].index = i; | |
7982 | } | |
7983 | } | |
7984 | else if (note == 7) | |
7985 | { | |
7986 | valueT mask = 0; | |
7987 | /* Mark only those registers indicated by the mask. */ | |
7988 | if (rsrc_write) | |
7989 | { | |
7990 | mask = CURR_SLOT.opnd[2].X_add_number; | |
7991 | for (i = 1; i < 16; i++) | |
7992 | if (mask & ((valueT) 1 << i)) | |
7993 | { | |
7994 | specs[count] = tmpl; | |
7995 | specs[count++].index = i; | |
7996 | } | |
7997 | } | |
7998 | else | |
7999 | { | |
8000 | UNHANDLED; | |
8001 | } | |
8002 | } | |
8003 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8004 | { | |
8005 | if (rsrc_write) | |
8006 | { | |
8007 | for (i = 0; i < idesc->num_outputs; i++) | |
8008 | { | |
8009 | if (idesc->operands[i] == IA64_OPND_P1 | |
8010 | || idesc->operands[i] == IA64_OPND_P2) | |
8011 | { | |
8012 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8013 | if (regno >= 1 && regno < 16) | |
8014 | { | |
8015 | specs[count] = tmpl; | |
8016 | specs[count++].index = regno; | |
8017 | } | |
8018 | } | |
8019 | } | |
8020 | } | |
8021 | else | |
8022 | { | |
8023 | UNHANDLED; | |
8024 | } | |
8025 | } | |
8026 | else if (note == 12) | |
8027 | { | |
8028 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8029 | { | |
8030 | specs[count] = tmpl; | |
8031 | specs[count++].index = CURR_SLOT.qp_regno; | |
8032 | } | |
8033 | } | |
8034 | else if (note == 1) | |
8035 | { | |
8036 | if (rsrc_write) | |
8037 | { | |
8038 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8039 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8040 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8041 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8042 | |
8043 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8044 | || idesc->operands[0] == IA64_OPND_P2) | |
8045 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8046 | { |
8047 | specs[count] = tmpl; | |
139368c9 JW |
8048 | specs[count].cmp_type = |
8049 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8050 | specs[count++].index = p1; | |
8051 | } | |
8052 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8053 | || idesc->operands[1] == IA64_OPND_P2) | |
8054 | && p2 >= 1 && p2 < 16) | |
8055 | { | |
8056 | specs[count] = tmpl; | |
8057 | specs[count].cmp_type = | |
8058 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8059 | specs[count++].index = p2; | |
542d6675 KH |
8060 | } |
8061 | } | |
8062 | else | |
8063 | { | |
139368c9 | 8064 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8065 | { |
8066 | specs[count] = tmpl; | |
139368c9 JW |
8067 | specs[count++].index = CURR_SLOT.qp_regno; |
8068 | } | |
8069 | if (idesc->operands[1] == IA64_OPND_PR) | |
8070 | { | |
8071 | for (i = 1; i < 16; i++) | |
8072 | { | |
8073 | specs[count] = tmpl; | |
8074 | specs[count++].index = i; | |
8075 | } | |
542d6675 KH |
8076 | } |
8077 | } | |
8078 | } | |
139368c9 JW |
8079 | else |
8080 | { | |
8081 | UNHANDLED; | |
8082 | } | |
8083 | break; | |
8084 | ||
8085 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8086 | simplified cases of this. */ | |
8087 | case IA64_RS_PRr: | |
8088 | if (note == 0) | |
8089 | { | |
8090 | for (i = 16; i < 63; i++) | |
8091 | { | |
8092 | specs[count] = tmpl; | |
8093 | specs[count++].index = i; | |
8094 | } | |
8095 | } | |
800eeca4 | 8096 | else if (note == 7) |
542d6675 KH |
8097 | { |
8098 | valueT mask = 0; | |
8099 | /* Mark only those registers indicated by the mask. */ | |
8100 | if (rsrc_write | |
8101 | && idesc->operands[0] == IA64_OPND_PR) | |
8102 | { | |
8103 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8104 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8105 | for (i = 16; i < 63; i++) |
8106 | { | |
8107 | specs[count] = tmpl; | |
8108 | specs[count++].index = i; | |
8109 | } | |
542d6675 KH |
8110 | } |
8111 | else if (rsrc_write | |
8112 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8113 | { | |
8114 | for (i = 16; i < 63; i++) | |
8115 | { | |
8116 | specs[count] = tmpl; | |
8117 | specs[count++].index = i; | |
8118 | } | |
8119 | } | |
8120 | else | |
8121 | { | |
8122 | UNHANDLED; | |
8123 | } | |
8124 | } | |
800eeca4 | 8125 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8126 | { |
8127 | if (rsrc_write) | |
8128 | { | |
8129 | for (i = 0; i < idesc->num_outputs; i++) | |
8130 | { | |
8131 | if (idesc->operands[i] == IA64_OPND_P1 | |
8132 | || idesc->operands[i] == IA64_OPND_P2) | |
8133 | { | |
8134 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8135 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8136 | { |
8137 | specs[count] = tmpl; | |
8138 | specs[count++].index = regno; | |
8139 | } | |
8140 | } | |
8141 | } | |
8142 | } | |
8143 | else | |
8144 | { | |
8145 | UNHANDLED; | |
8146 | } | |
8147 | } | |
800eeca4 | 8148 | else if (note == 12) |
542d6675 | 8149 | { |
139368c9 | 8150 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8151 | { |
8152 | specs[count] = tmpl; | |
8153 | specs[count++].index = CURR_SLOT.qp_regno; | |
8154 | } | |
8155 | } | |
800eeca4 | 8156 | else if (note == 1) |
542d6675 KH |
8157 | { |
8158 | if (rsrc_write) | |
8159 | { | |
8160 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8161 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8162 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8163 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8164 | |
542d6675 KH |
8165 | if ((idesc->operands[0] == IA64_OPND_P1 |
8166 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8167 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8168 | { |
8169 | specs[count] = tmpl; | |
4a4f25cf | 8170 | specs[count].cmp_type = |
7484b8e6 | 8171 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8172 | specs[count++].index = p1; |
8173 | } | |
8174 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8175 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8176 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8177 | { |
8178 | specs[count] = tmpl; | |
4a4f25cf | 8179 | specs[count].cmp_type = |
7484b8e6 | 8180 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8181 | specs[count++].index = p2; |
8182 | } | |
8183 | } | |
8184 | else | |
8185 | { | |
139368c9 | 8186 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8187 | { |
8188 | specs[count] = tmpl; | |
8189 | specs[count++].index = CURR_SLOT.qp_regno; | |
8190 | } | |
8191 | if (idesc->operands[1] == IA64_OPND_PR) | |
8192 | { | |
139368c9 | 8193 | for (i = 16; i < 63; i++) |
542d6675 KH |
8194 | { |
8195 | specs[count] = tmpl; | |
8196 | specs[count++].index = i; | |
8197 | } | |
8198 | } | |
8199 | } | |
8200 | } | |
197865e8 | 8201 | else |
542d6675 KH |
8202 | { |
8203 | UNHANDLED; | |
8204 | } | |
800eeca4 JW |
8205 | break; |
8206 | ||
8207 | case IA64_RS_PSR: | |
197865e8 | 8208 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8209 | dep->regindex. */ |
800eeca4 | 8210 | if (note == 0) |
542d6675 KH |
8211 | { |
8212 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8213 | { | |
8214 | if (dep->regindex < 6) | |
8215 | { | |
8216 | specs[count++] = tmpl; | |
8217 | } | |
8218 | } | |
8219 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8220 | { | |
8221 | if (dep->regindex < 32 | |
8222 | || dep->regindex == 35 | |
8223 | || dep->regindex == 36 | |
8224 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8225 | { | |
8226 | specs[count++] = tmpl; | |
8227 | } | |
8228 | } | |
8229 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8230 | { | |
8231 | if (dep->regindex < 32 | |
8232 | || dep->regindex == 35 | |
8233 | || dep->regindex == 36 | |
8234 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8235 | { | |
8236 | specs[count++] = tmpl; | |
8237 | } | |
8238 | } | |
8239 | else | |
8240 | { | |
8241 | /* Several PSR bits have very specific dependencies. */ | |
8242 | switch (dep->regindex) | |
8243 | { | |
8244 | default: | |
8245 | specs[count++] = tmpl; | |
8246 | break; | |
8247 | case PSR_IC: | |
8248 | if (rsrc_write) | |
8249 | { | |
8250 | specs[count++] = tmpl; | |
8251 | } | |
8252 | else | |
8253 | { | |
8254 | /* Only certain CR accesses use PSR.ic */ | |
8255 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8256 | || idesc->operands[1] == IA64_OPND_CR3) | |
8257 | { | |
8258 | int index = | |
8259 | ((idesc->operands[0] == IA64_OPND_CR3) | |
8260 | ? 0 : 1); | |
8261 | int regno = | |
8262 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
8263 | ||
8264 | switch (regno) | |
8265 | { | |
8266 | default: | |
8267 | break; | |
8268 | case CR_ITIR: | |
8269 | case CR_IFS: | |
8270 | case CR_IIM: | |
8271 | case CR_IIP: | |
8272 | case CR_IPSR: | |
8273 | case CR_ISR: | |
8274 | case CR_IFA: | |
8275 | case CR_IHA: | |
8276 | case CR_IIPA: | |
8277 | specs[count++] = tmpl; | |
8278 | break; | |
8279 | } | |
8280 | } | |
8281 | } | |
8282 | break; | |
8283 | case PSR_CPL: | |
8284 | if (rsrc_write) | |
8285 | { | |
8286 | specs[count++] = tmpl; | |
8287 | } | |
8288 | else | |
8289 | { | |
8290 | /* Only some AR accesses use cpl */ | |
8291 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8292 | || idesc->operands[1] == IA64_OPND_AR3) | |
8293 | { | |
8294 | int index = | |
8295 | ((idesc->operands[0] == IA64_OPND_AR3) | |
8296 | ? 0 : 1); | |
8297 | int regno = | |
8298 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
8299 | ||
8300 | if (regno == AR_ITC | |
8301 | || (index == 0 | |
8302 | && (regno == AR_ITC | |
8303 | || regno == AR_RSC | |
8304 | || (regno >= AR_K0 | |
8305 | && regno <= AR_K7)))) | |
8306 | { | |
8307 | specs[count++] = tmpl; | |
8308 | } | |
8309 | } | |
8310 | else | |
8311 | { | |
8312 | specs[count++] = tmpl; | |
8313 | } | |
8314 | break; | |
8315 | } | |
8316 | } | |
8317 | } | |
8318 | } | |
800eeca4 | 8319 | else if (note == 7) |
542d6675 KH |
8320 | { |
8321 | valueT mask = 0; | |
8322 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8323 | { | |
8324 | mask = CURR_SLOT.opnd[0].X_add_number; | |
8325 | } | |
8326 | else | |
8327 | { | |
8328 | UNHANDLED; | |
8329 | } | |
8330 | if (mask & ((valueT) 1 << dep->regindex)) | |
8331 | { | |
8332 | specs[count++] = tmpl; | |
8333 | } | |
8334 | } | |
800eeca4 | 8335 | else if (note == 8) |
542d6675 KH |
8336 | { |
8337 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
8338 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
8339 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
8340 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8341 | { | |
8342 | if (idesc->operands[i] == IA64_OPND_F1 | |
8343 | || idesc->operands[i] == IA64_OPND_F2 | |
8344 | || idesc->operands[i] == IA64_OPND_F3 | |
8345 | || idesc->operands[i] == IA64_OPND_F4) | |
8346 | { | |
8347 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8348 | if (reg >= min && reg <= max) | |
8349 | { | |
8350 | specs[count++] = tmpl; | |
8351 | } | |
8352 | } | |
8353 | } | |
8354 | } | |
800eeca4 | 8355 | else if (note == 9) |
542d6675 KH |
8356 | { |
8357 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
8358 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
8359 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
8360 | FR2-31 */ | |
8361 | for (i = 0; i < idesc->num_outputs; i++) | |
8362 | { | |
8363 | if (idesc->operands[i] == IA64_OPND_F1) | |
8364 | { | |
8365 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8366 | if (reg >= min && reg <= max) | |
8367 | { | |
8368 | specs[count++] = tmpl; | |
8369 | } | |
8370 | } | |
8371 | } | |
8372 | } | |
800eeca4 | 8373 | else if (note == 10) |
542d6675 KH |
8374 | { |
8375 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8376 | { | |
8377 | if (idesc->operands[i] == IA64_OPND_R1 | |
8378 | || idesc->operands[i] == IA64_OPND_R2 | |
8379 | || idesc->operands[i] == IA64_OPND_R3) | |
8380 | { | |
8381 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8382 | if (regno >= 16 && regno <= 31) | |
8383 | { | |
8384 | specs[count++] = tmpl; | |
8385 | } | |
8386 | } | |
8387 | } | |
8388 | } | |
800eeca4 | 8389 | else |
542d6675 KH |
8390 | { |
8391 | UNHANDLED; | |
8392 | } | |
800eeca4 JW |
8393 | break; |
8394 | ||
8395 | case IA64_RS_AR_FPSR: | |
8396 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
8397 | { |
8398 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8399 | if (regno == AR_FPSR) | |
8400 | { | |
8401 | specs[count++] = tmpl; | |
8402 | } | |
8403 | } | |
800eeca4 | 8404 | else |
542d6675 KH |
8405 | { |
8406 | specs[count++] = tmpl; | |
8407 | } | |
800eeca4 JW |
8408 | break; |
8409 | ||
197865e8 | 8410 | case IA64_RS_ARX: |
800eeca4 JW |
8411 | /* Handle all AR[REG] resources */ |
8412 | if (note == 0 || note == 1) | |
542d6675 KH |
8413 | { |
8414 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8415 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
8416 | && regno == dep->regindex) | |
8417 | { | |
8418 | specs[count++] = tmpl; | |
8419 | } | |
8420 | /* other AR[REG] resources may be affected by AR accesses */ | |
8421 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
8422 | { | |
8423 | /* AR[] writes */ | |
8424 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
8425 | switch (dep->regindex) | |
8426 | { | |
8427 | default: | |
8428 | break; | |
8429 | case AR_BSP: | |
8430 | case AR_RNAT: | |
8431 | if (regno == AR_BSPSTORE) | |
8432 | { | |
8433 | specs[count++] = tmpl; | |
8434 | } | |
8435 | case AR_RSC: | |
8436 | if (!rsrc_write && | |
8437 | (regno == AR_BSPSTORE | |
8438 | || regno == AR_RNAT)) | |
8439 | { | |
8440 | specs[count++] = tmpl; | |
8441 | } | |
8442 | break; | |
8443 | } | |
8444 | } | |
8445 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8446 | { | |
8447 | /* AR[] reads */ | |
8448 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
8449 | switch (dep->regindex) | |
8450 | { | |
8451 | default: | |
8452 | break; | |
8453 | case AR_RSC: | |
8454 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
8455 | { | |
8456 | specs[count++] = tmpl; | |
8457 | } | |
8458 | break; | |
8459 | } | |
8460 | } | |
8461 | else | |
8462 | { | |
8463 | specs[count++] = tmpl; | |
8464 | } | |
8465 | } | |
800eeca4 | 8466 | else |
542d6675 KH |
8467 | { |
8468 | UNHANDLED; | |
8469 | } | |
800eeca4 JW |
8470 | break; |
8471 | ||
8472 | case IA64_RS_CRX: | |
8473 | /* Handle all CR[REG] resources */ | |
8474 | if (note == 0 || note == 1) | |
542d6675 KH |
8475 | { |
8476 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8477 | { | |
8478 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8479 | if (regno == dep->regindex) | |
8480 | { | |
8481 | specs[count++] = tmpl; | |
8482 | } | |
8483 | else if (!rsrc_write) | |
8484 | { | |
8485 | /* Reads from CR[IVR] affect other resources. */ | |
8486 | if (regno == CR_IVR) | |
8487 | { | |
8488 | if ((dep->regindex >= CR_IRR0 | |
8489 | && dep->regindex <= CR_IRR3) | |
8490 | || dep->regindex == CR_TPR) | |
8491 | { | |
8492 | specs[count++] = tmpl; | |
8493 | } | |
8494 | } | |
8495 | } | |
8496 | } | |
8497 | else | |
8498 | { | |
8499 | specs[count++] = tmpl; | |
8500 | } | |
8501 | } | |
800eeca4 | 8502 | else |
542d6675 KH |
8503 | { |
8504 | UNHANDLED; | |
8505 | } | |
800eeca4 JW |
8506 | break; |
8507 | ||
8508 | case IA64_RS_INSERVICE: | |
8509 | /* look for write of EOI (67) or read of IVR (65) */ | |
8510 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
8511 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
8512 | || (idesc->operands[1] == IA64_OPND_CR3 | |
8513 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
8514 | { | |
8515 | specs[count++] = tmpl; | |
8516 | } | |
800eeca4 JW |
8517 | break; |
8518 | ||
8519 | case IA64_RS_GR0: | |
8520 | if (note == 1) | |
542d6675 KH |
8521 | { |
8522 | specs[count++] = tmpl; | |
8523 | } | |
800eeca4 | 8524 | else |
542d6675 KH |
8525 | { |
8526 | UNHANDLED; | |
8527 | } | |
800eeca4 JW |
8528 | break; |
8529 | ||
8530 | case IA64_RS_CFM: | |
8531 | if (note != 2) | |
542d6675 KH |
8532 | { |
8533 | specs[count++] = tmpl; | |
8534 | } | |
800eeca4 | 8535 | else |
542d6675 KH |
8536 | { |
8537 | /* Check if any of the registers accessed are in the rotating region. | |
8538 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
8539 | region */ | |
8540 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8541 | { | |
8542 | if (idesc->operands[i] == IA64_OPND_R1 | |
8543 | || idesc->operands[i] == IA64_OPND_R2 | |
8544 | || idesc->operands[i] == IA64_OPND_R3) | |
8545 | { | |
8546 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8547 | /* Assumes that md.rot.num_regs is always valid */ | |
8548 | if (md.rot.num_regs > 0 | |
8549 | && num > 31 | |
8550 | && num < 31 + md.rot.num_regs) | |
8551 | { | |
8552 | specs[count] = tmpl; | |
8553 | specs[count++].specific = 0; | |
8554 | } | |
8555 | } | |
8556 | else if (idesc->operands[i] == IA64_OPND_F1 | |
8557 | || idesc->operands[i] == IA64_OPND_F2 | |
8558 | || idesc->operands[i] == IA64_OPND_F3 | |
8559 | || idesc->operands[i] == IA64_OPND_F4) | |
8560 | { | |
8561 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8562 | if (num > 31) | |
8563 | { | |
8564 | specs[count] = tmpl; | |
8565 | specs[count++].specific = 0; | |
8566 | } | |
8567 | } | |
8568 | else if (idesc->operands[i] == IA64_OPND_P1 | |
8569 | || idesc->operands[i] == IA64_OPND_P2) | |
8570 | { | |
8571 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8572 | if (num > 15) | |
8573 | { | |
8574 | specs[count] = tmpl; | |
8575 | specs[count++].specific = 0; | |
8576 | } | |
8577 | } | |
8578 | } | |
8579 | if (CURR_SLOT.qp_regno > 15) | |
8580 | { | |
8581 | specs[count] = tmpl; | |
8582 | specs[count++].specific = 0; | |
8583 | } | |
8584 | } | |
800eeca4 JW |
8585 | break; |
8586 | ||
139368c9 JW |
8587 | /* This is the same as IA64_RS_PRr, except simplified to account for |
8588 | the fact that there is only one register. */ | |
800eeca4 JW |
8589 | case IA64_RS_PR63: |
8590 | if (note == 0) | |
542d6675 KH |
8591 | { |
8592 | specs[count++] = tmpl; | |
8593 | } | |
139368c9 | 8594 | else if (note == 7) |
40449e9f KH |
8595 | { |
8596 | valueT mask = 0; | |
8597 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
8598 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8599 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 8600 | specs[count++] = tmpl; |
40449e9f | 8601 | } |
800eeca4 | 8602 | else if (note == 11) |
542d6675 KH |
8603 | { |
8604 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8605 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
8606 | || (idesc->operands[1] == IA64_OPND_P2 | |
8607 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
8608 | { | |
8609 | specs[count++] = tmpl; | |
8610 | } | |
8611 | } | |
800eeca4 | 8612 | else if (note == 12) |
542d6675 KH |
8613 | { |
8614 | if (CURR_SLOT.qp_regno == 63) | |
8615 | { | |
8616 | specs[count++] = tmpl; | |
8617 | } | |
8618 | } | |
800eeca4 | 8619 | else if (note == 1) |
542d6675 KH |
8620 | { |
8621 | if (rsrc_write) | |
8622 | { | |
40449e9f KH |
8623 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
8624 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8625 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8626 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8627 | |
4a4f25cf | 8628 | if (p1 == 63 |
7484b8e6 TW |
8629 | && (idesc->operands[0] == IA64_OPND_P1 |
8630 | || idesc->operands[0] == IA64_OPND_P2)) | |
8631 | { | |
40449e9f | 8632 | specs[count] = tmpl; |
4a4f25cf | 8633 | specs[count++].cmp_type = |
7484b8e6 TW |
8634 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
8635 | } | |
8636 | if (p2 == 63 | |
8637 | && (idesc->operands[1] == IA64_OPND_P1 | |
8638 | || idesc->operands[1] == IA64_OPND_P2)) | |
8639 | { | |
40449e9f | 8640 | specs[count] = tmpl; |
4a4f25cf | 8641 | specs[count++].cmp_type = |
7484b8e6 TW |
8642 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
8643 | } | |
542d6675 KH |
8644 | } |
8645 | else | |
8646 | { | |
8647 | if (CURR_SLOT.qp_regno == 63) | |
8648 | { | |
8649 | specs[count++] = tmpl; | |
8650 | } | |
8651 | } | |
8652 | } | |
800eeca4 | 8653 | else |
542d6675 KH |
8654 | { |
8655 | UNHANDLED; | |
8656 | } | |
800eeca4 JW |
8657 | break; |
8658 | ||
8659 | case IA64_RS_RSE: | |
8660 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
8661 | read resources have not yet been completely identified, so for now |
8662 | treat RSE as a single resource */ | |
800eeca4 | 8663 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
8664 | { |
8665 | if (rsrc_write) | |
8666 | { | |
8667 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8668 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
8669 | { | |
8670 | specs[count] = tmpl; | |
8671 | specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */ | |
8672 | } | |
8673 | } | |
8674 | else | |
8675 | { | |
8676 | if (idesc->operands[0] == IA64_OPND_AR3) | |
8677 | { | |
8678 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
8679 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
8680 | { | |
8681 | specs[count++] = tmpl; | |
8682 | } | |
8683 | } | |
8684 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8685 | { | |
8686 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
8687 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
8688 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
8689 | { | |
8690 | specs[count++] = tmpl; | |
8691 | } | |
8692 | } | |
8693 | } | |
8694 | } | |
197865e8 | 8695 | else |
542d6675 KH |
8696 | { |
8697 | specs[count++] = tmpl; | |
8698 | } | |
800eeca4 JW |
8699 | break; |
8700 | ||
8701 | case IA64_RS_ANY: | |
8702 | /* FIXME -- do any of these need to be non-specific? */ | |
8703 | specs[count++] = tmpl; | |
8704 | break; | |
8705 | ||
8706 | default: | |
8707 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
8708 | break; | |
8709 | } | |
8710 | ||
8711 | return count; | |
8712 | } | |
8713 | ||
8714 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
8715 | QP of the marking instruction and a subsequent branch on the same QP. */ |
8716 | ||
800eeca4 JW |
8717 | static void |
8718 | clear_qp_branch_flag (mask) | |
542d6675 | 8719 | valueT mask; |
800eeca4 JW |
8720 | { |
8721 | int i; | |
542d6675 | 8722 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 8723 | { |
197865e8 | 8724 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 8725 | if ((bit & mask) != 0) |
542d6675 KH |
8726 | { |
8727 | regdeps[i].link_to_qp_branch = 0; | |
8728 | } | |
800eeca4 JW |
8729 | } |
8730 | } | |
8731 | ||
5e2f6673 L |
8732 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
8733 | any mutexes which contain one of the PRs and create new ones when | |
8734 | needed. */ | |
8735 | ||
8736 | static int | |
8737 | update_qp_mutex (valueT mask) | |
8738 | { | |
8739 | int i; | |
8740 | int add = 0; | |
8741 | ||
8742 | i = 0; | |
8743 | while (i < qp_mutexeslen) | |
8744 | { | |
8745 | if ((qp_mutexes[i].prmask & mask) != 0) | |
8746 | { | |
8747 | /* If it destroys and creates the same mutex, do nothing. */ | |
8748 | if (qp_mutexes[i].prmask == mask | |
8749 | && qp_mutexes[i].path == md.path) | |
8750 | { | |
8751 | i++; | |
8752 | add = -1; | |
8753 | } | |
8754 | else | |
8755 | { | |
8756 | int keep = 0; | |
8757 | ||
8758 | if (md.debug_dv) | |
8759 | { | |
8760 | fprintf (stderr, " Clearing mutex relation"); | |
8761 | print_prmask (qp_mutexes[i].prmask); | |
8762 | fprintf (stderr, "\n"); | |
8763 | } | |
8764 | ||
8765 | /* Deal with the old mutex with more than 3+ PRs only if | |
8766 | the new mutex on the same execution path with it. | |
8767 | ||
8768 | FIXME: The 3+ mutex support is incomplete. | |
8769 | dot_pred_rel () may be a better place to fix it. */ | |
8770 | if (qp_mutexes[i].path == md.path) | |
8771 | { | |
8772 | /* If it is a proper subset of the mutex, create a | |
8773 | new mutex. */ | |
8774 | if (add == 0 | |
8775 | && (qp_mutexes[i].prmask & mask) == mask) | |
8776 | add = 1; | |
8777 | ||
8778 | qp_mutexes[i].prmask &= ~mask; | |
8779 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
8780 | { | |
8781 | /* Modify the mutex if there are more than one | |
8782 | PR left. */ | |
8783 | keep = 1; | |
8784 | i++; | |
8785 | } | |
8786 | } | |
8787 | ||
8788 | if (keep == 0) | |
8789 | /* Remove the mutex. */ | |
8790 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8791 | } | |
8792 | } | |
8793 | else | |
8794 | ++i; | |
8795 | } | |
8796 | ||
8797 | if (add == 1) | |
8798 | add_qp_mutex (mask); | |
8799 | ||
8800 | return add; | |
8801 | } | |
8802 | ||
197865e8 | 8803 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 8804 | |
542d6675 KH |
8805 | Any changes to a PR clears the mutex relations which include that PR. */ |
8806 | ||
800eeca4 JW |
8807 | static void |
8808 | clear_qp_mutex (mask) | |
542d6675 | 8809 | valueT mask; |
800eeca4 JW |
8810 | { |
8811 | int i; | |
8812 | ||
8813 | i = 0; | |
8814 | while (i < qp_mutexeslen) | |
8815 | { | |
8816 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
8817 | { |
8818 | if (md.debug_dv) | |
8819 | { | |
8820 | fprintf (stderr, " Clearing mutex relation"); | |
8821 | print_prmask (qp_mutexes[i].prmask); | |
8822 | fprintf (stderr, "\n"); | |
8823 | } | |
8824 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8825 | } | |
800eeca4 | 8826 | else |
542d6675 | 8827 | ++i; |
800eeca4 JW |
8828 | } |
8829 | } | |
8830 | ||
8831 | /* Clear implies relations which contain PRs in the given masks. | |
8832 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
8833 | indicates the implied PR. */ |
8834 | ||
800eeca4 JW |
8835 | static void |
8836 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
8837 | valueT p1_mask; |
8838 | valueT p2_mask; | |
800eeca4 JW |
8839 | { |
8840 | int i; | |
8841 | ||
8842 | i = 0; | |
8843 | while (i < qp_implieslen) | |
8844 | { | |
197865e8 | 8845 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
8846 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
8847 | { | |
8848 | if (md.debug_dv) | |
8849 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
8850 | qp_implies[i].p1, qp_implies[i].p2); | |
8851 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
8852 | } | |
197865e8 | 8853 | else |
542d6675 | 8854 | ++i; |
800eeca4 JW |
8855 | } |
8856 | } | |
8857 | ||
542d6675 KH |
8858 | /* Add the PRs specified to the list of implied relations. */ |
8859 | ||
800eeca4 JW |
8860 | static void |
8861 | add_qp_imply (p1, p2) | |
542d6675 | 8862 | int p1, p2; |
800eeca4 JW |
8863 | { |
8864 | valueT mask; | |
8865 | valueT bit; | |
8866 | int i; | |
8867 | ||
542d6675 | 8868 | /* p0 is not meaningful here. */ |
800eeca4 JW |
8869 | if (p1 == 0 || p2 == 0) |
8870 | abort (); | |
8871 | ||
8872 | if (p1 == p2) | |
8873 | return; | |
8874 | ||
542d6675 KH |
8875 | /* If it exists already, ignore it. */ |
8876 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 8877 | { |
197865e8 | 8878 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
8879 | && qp_implies[i].p2 == p2 |
8880 | && qp_implies[i].path == md.path | |
8881 | && !qp_implies[i].p2_branched) | |
8882 | return; | |
800eeca4 JW |
8883 | } |
8884 | ||
8885 | if (qp_implieslen == qp_impliestotlen) | |
8886 | { | |
8887 | qp_impliestotlen += 20; | |
8888 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
8889 | xrealloc ((void *) qp_implies, |
8890 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
8891 | } |
8892 | if (md.debug_dv) | |
8893 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
8894 | qp_implies[qp_implieslen].p1 = p1; | |
8895 | qp_implies[qp_implieslen].p2 = p2; | |
8896 | qp_implies[qp_implieslen].path = md.path; | |
8897 | qp_implies[qp_implieslen++].p2_branched = 0; | |
8898 | ||
8899 | /* Add in the implied transitive relations; for everything that p2 implies, | |
8900 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 8901 | as well. */ |
542d6675 | 8902 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
8903 | { |
8904 | if (qp_implies[i].p1 == p2) | |
542d6675 | 8905 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 8906 | if (qp_implies[i].p2 == p1) |
542d6675 | 8907 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
8908 | } |
8909 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
8910 | relation containing p2, duplicate it and replace p2 with p1. */ |
8911 | bit = (valueT) 1 << p1; | |
8912 | mask = (valueT) 1 << p2; | |
542d6675 | 8913 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
8914 | { |
8915 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 8916 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
8917 | } |
8918 | } | |
8919 | ||
800eeca4 JW |
8920 | /* Add the PRs specified in the mask to the mutex list; this means that only |
8921 | one of the PRs can be true at any time. PR0 should never be included in | |
8922 | the mask. */ | |
542d6675 | 8923 | |
800eeca4 JW |
8924 | static void |
8925 | add_qp_mutex (mask) | |
542d6675 | 8926 | valueT mask; |
800eeca4 JW |
8927 | { |
8928 | if (mask & 0x1) | |
8929 | abort (); | |
8930 | ||
8931 | if (qp_mutexeslen == qp_mutexestotlen) | |
8932 | { | |
8933 | qp_mutexestotlen += 20; | |
8934 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
8935 | xrealloc ((void *) qp_mutexes, |
8936 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
8937 | } |
8938 | if (md.debug_dv) | |
8939 | { | |
8940 | fprintf (stderr, " Registering mutex on"); | |
8941 | print_prmask (mask); | |
8942 | fprintf (stderr, "\n"); | |
8943 | } | |
8944 | qp_mutexes[qp_mutexeslen].path = md.path; | |
8945 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
8946 | } | |
8947 | ||
cb5301b6 RH |
8948 | static int |
8949 | has_suffix_p (name, suffix) | |
40449e9f KH |
8950 | const char *name; |
8951 | const char *suffix; | |
cb5301b6 RH |
8952 | { |
8953 | size_t namelen = strlen (name); | |
8954 | size_t sufflen = strlen (suffix); | |
8955 | ||
8956 | if (namelen <= sufflen) | |
8957 | return 0; | |
8958 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
8959 | } | |
8960 | ||
800eeca4 JW |
8961 | static void |
8962 | clear_register_values () | |
8963 | { | |
8964 | int i; | |
8965 | if (md.debug_dv) | |
8966 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 8967 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
8968 | gr_values[i].known = 0; |
8969 | } | |
8970 | ||
8971 | /* Keep track of register values/changes which affect DV tracking. | |
8972 | ||
8973 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 8974 | have to examine a group of strings to identify them. */ |
800eeca4 | 8975 | |
800eeca4 JW |
8976 | static void |
8977 | note_register_values (idesc) | |
542d6675 | 8978 | struct ia64_opcode *idesc; |
800eeca4 JW |
8979 | { |
8980 | valueT qp_changemask = 0; | |
8981 | int i; | |
8982 | ||
542d6675 KH |
8983 | /* Invalidate values for registers being written to. */ |
8984 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 8985 | { |
197865e8 | 8986 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
8987 | || idesc->operands[i] == IA64_OPND_R2 |
8988 | || idesc->operands[i] == IA64_OPND_R3) | |
8989 | { | |
8990 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8991 | if (regno > 0 && regno < NELEMS (gr_values)) | |
8992 | gr_values[regno].known = 0; | |
8993 | } | |
50b81f19 JW |
8994 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
8995 | { | |
8996 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8997 | if (regno > 0 && regno < 4) | |
8998 | gr_values[regno].known = 0; | |
8999 | } | |
197865e8 | 9000 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9001 | || idesc->operands[i] == IA64_OPND_P2) |
9002 | { | |
9003 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9004 | qp_changemask |= (valueT) 1 << regno; | |
9005 | } | |
800eeca4 | 9006 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9007 | { |
9008 | if (idesc->operands[2] & (valueT) 0x10000) | |
9009 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9010 | else | |
9011 | qp_changemask = idesc->operands[2]; | |
9012 | break; | |
9013 | } | |
800eeca4 | 9014 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9015 | { |
9016 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9017 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9018 | else |
9019 | qp_changemask = idesc->operands[1]; | |
9020 | qp_changemask &= ~(valueT) 0xFFFF; | |
9021 | break; | |
9022 | } | |
9023 | } | |
9024 | ||
9025 | /* Always clear qp branch flags on any PR change. */ | |
9026 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9027 | clear_qp_branch_flag (qp_changemask); |
9028 | ||
542d6675 | 9029 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9030 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9031 | { | |
197865e8 | 9032 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9033 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9034 | { |
9035 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9036 | gr_values[i].known = 0; | |
9037 | } | |
800eeca4 JW |
9038 | clear_qp_mutex (qp_changemask); |
9039 | clear_qp_implies (qp_changemask, qp_changemask); | |
9040 | } | |
542d6675 KH |
9041 | /* After a call, all register values are undefined, except those marked |
9042 | as "safe". */ | |
800eeca4 | 9043 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9044 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9045 | { |
56d27c17 | 9046 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9047 | clear_register_values (); |
9048 | clear_qp_mutex (~qp_safe_across_calls); | |
9049 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9050 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9051 | } | |
e9718fe1 | 9052 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9053 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9054 | { |
9055 | clear_register_values (); | |
197865e8 KH |
9056 | clear_qp_mutex (~(valueT) 0); |
9057 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9058 | } |
542d6675 | 9059 | /* Look for mutex and implies relations. */ |
197865e8 | 9060 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9061 | || idesc->operands[0] == IA64_OPND_P2) |
9062 | && (idesc->operands[1] == IA64_OPND_P1 | |
9063 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9064 | { |
9065 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9066 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9067 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9068 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9069 | |
5e2f6673 L |
9070 | /* If both PRs are PR0, we can't really do anything. */ |
9071 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9072 | { |
9073 | if (md.debug_dv) | |
9074 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9075 | } | |
800eeca4 | 9076 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9077 | with the following exceptions. */ |
cb5301b6 RH |
9078 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9079 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9080 | { |
542d6675 KH |
9081 | clear_qp_implies (p2mask, p1mask); |
9082 | } | |
cb5301b6 RH |
9083 | else if (has_suffix_p (idesc->name, ".andcm") |
9084 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9085 | { |
9086 | clear_qp_implies (0, p1mask | p2mask); | |
9087 | } | |
cb5301b6 RH |
9088 | else if (has_suffix_p (idesc->name, ".orcm") |
9089 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9090 | { |
9091 | clear_qp_mutex (p1mask | p2mask); | |
9092 | clear_qp_implies (p1mask | p2mask, 0); | |
9093 | } | |
800eeca4 | 9094 | else |
542d6675 | 9095 | { |
5e2f6673 L |
9096 | int added = 0; |
9097 | ||
542d6675 | 9098 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9099 | |
9100 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9101 | if (p1 == 0 || p2 == 0) | |
9102 | clear_qp_mutex (p1mask | p2mask); | |
9103 | else | |
9104 | added = update_qp_mutex (p1mask | p2mask); | |
9105 | ||
9106 | if (CURR_SLOT.qp_regno == 0 | |
9107 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9108 | { |
5e2f6673 L |
9109 | if (added == 0 && p1 && p2) |
9110 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9111 | if (CURR_SLOT.qp_regno != 0) |
9112 | { | |
5e2f6673 L |
9113 | if (p1) |
9114 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9115 | if (p2) | |
9116 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9117 | } |
9118 | } | |
542d6675 KH |
9119 | } |
9120 | } | |
9121 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9122 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9123 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9124 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
9125 | && (strcmp (idesc->name, "mov") == 0 | |
9126 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9127 | { |
9128 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9129 | if (regno > 0 && regno < NELEMS (gr_values)) |
9130 | { | |
9131 | gr_values[regno].known = 1; | |
9132 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9133 | gr_values[regno].path = md.path; | |
9134 | if (md.debug_dv) | |
2434f565 JW |
9135 | { |
9136 | fprintf (stderr, " Know gr%d = ", regno); | |
9137 | fprintf_vma (stderr, gr_values[regno].value); | |
9138 | fputs ("\n", stderr); | |
9139 | } | |
542d6675 | 9140 | } |
800eeca4 | 9141 | } |
197865e8 | 9142 | else |
800eeca4 JW |
9143 | { |
9144 | clear_qp_mutex (qp_changemask); | |
9145 | clear_qp_implies (qp_changemask, qp_changemask); | |
9146 | } | |
9147 | } | |
9148 | ||
542d6675 KH |
9149 | /* Return whether the given predicate registers are currently mutex. */ |
9150 | ||
800eeca4 JW |
9151 | static int |
9152 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9153 | int p1; |
9154 | int p2; | |
9155 | int path; | |
800eeca4 JW |
9156 | { |
9157 | int i; | |
9158 | valueT mask; | |
9159 | ||
9160 | if (p1 != p2) | |
9161 | { | |
542d6675 KH |
9162 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9163 | for (i = 0; i < qp_mutexeslen; i++) | |
9164 | { | |
9165 | if (qp_mutexes[i].path >= path | |
9166 | && (qp_mutexes[i].prmask & mask) == mask) | |
9167 | return 1; | |
9168 | } | |
800eeca4 JW |
9169 | } |
9170 | return 0; | |
9171 | } | |
9172 | ||
9173 | /* Return whether the given resource is in the given insn's list of chks | |
9174 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9175 | conflict. */ |
9176 | ||
800eeca4 JW |
9177 | static int |
9178 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9179 | struct rsrc *rs; |
9180 | struct ia64_opcode *idesc; | |
9181 | int note; | |
9182 | int qp_regno; | |
9183 | int path; | |
800eeca4 JW |
9184 | { |
9185 | struct rsrc specs[MAX_SPECS]; | |
9186 | int count; | |
9187 | ||
9188 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9189 | we don't need to check. One exception is note 11, which indicates that | |
9190 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9191 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9192 | && note != 11) |
9193 | return 0; | |
9194 | ||
9195 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9196 | while (count-- > 0) | |
9197 | { | |
9198 | /* UNAT checking is a bit more specific than other resources */ | |
9199 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9200 | && specs[count].mem_offset.hint |
9201 | && rs->mem_offset.hint) | |
9202 | { | |
9203 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9204 | { | |
9205 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9206 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9207 | return 1; | |
9208 | else | |
9209 | continue; | |
9210 | } | |
9211 | } | |
800eeca4 | 9212 | |
7484b8e6 | 9213 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9214 | writes are an OR. */ |
7484b8e6 | 9215 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9216 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9217 | || rs->dependency->specifier == IA64_RS_PR63) |
9218 | { | |
9219 | if (specs[count].cmp_type != CMP_NONE | |
9220 | && specs[count].cmp_type == rs->cmp_type) | |
9221 | { | |
9222 | if (md.debug_dv) | |
9223 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9224 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9225 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9226 | specs[count].index : 63); |
9227 | continue; | |
9228 | } | |
9229 | if (md.debug_dv) | |
4a4f25cf | 9230 | fprintf (stderr, |
7484b8e6 TW |
9231 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9232 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9233 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9234 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9235 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9236 | specs[count].index : 63); |
4a4f25cf | 9237 | |
7484b8e6 TW |
9238 | } |
9239 | ||
800eeca4 | 9240 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9241 | */ |
800eeca4 | 9242 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9243 | return 2; |
800eeca4 | 9244 | else if (specs[count].index == rs->index) |
542d6675 | 9245 | return 1; |
800eeca4 JW |
9246 | } |
9247 | #if 0 | |
9248 | if (md.debug_dv) | |
9249 | fprintf (stderr, " No %s conflicts\n", rs->dependency->name); | |
9250 | #endif | |
9251 | ||
9252 | return 0; | |
9253 | } | |
9254 | ||
9255 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9256 | insert a stop to create the break. Update all resource dependencies | |
9257 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9258 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9259 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9260 | instruction. */ |
800eeca4 JW |
9261 | |
9262 | static void | |
9263 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
9264 | int insert_stop; |
9265 | int qp_regno; | |
9266 | int save_current; | |
800eeca4 JW |
9267 | { |
9268 | int i; | |
9269 | ||
9270 | if (insert_stop && md.num_slots_in_use > 0) | |
9271 | PREV_SLOT.end_of_insn_group = 1; | |
9272 | ||
9273 | if (md.debug_dv) | |
9274 | { | |
197865e8 | 9275 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9276 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9277 | if (qp_regno != 0) |
542d6675 | 9278 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9279 | fprintf (stderr, "\n"); |
9280 | } | |
9281 | ||
9282 | i = 0; | |
9283 | while (i < regdepslen) | |
9284 | { | |
9285 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9286 | ||
9287 | if (qp_regno != 0 | |
542d6675 KH |
9288 | && regdeps[i].qp_regno != qp_regno) |
9289 | { | |
9290 | ++i; | |
9291 | continue; | |
9292 | } | |
800eeca4 JW |
9293 | |
9294 | if (save_current | |
542d6675 KH |
9295 | && CURR_SLOT.src_file == regdeps[i].file |
9296 | && CURR_SLOT.src_line == regdeps[i].line) | |
9297 | { | |
9298 | ++i; | |
9299 | continue; | |
9300 | } | |
800eeca4 JW |
9301 | |
9302 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9303 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9304 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9305 | || dep->semantics == IA64_DVS_IMPLIEDF |
9306 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9307 | { | |
9308 | print_dependency ("Removing", i); | |
9309 | regdeps[i] = regdeps[--regdepslen]; | |
9310 | } | |
800eeca4 | 9311 | else |
542d6675 KH |
9312 | { |
9313 | if (dep->semantics == IA64_DVS_DATA | |
9314 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9315 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9316 | { |
9317 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9318 | regdeps[i].insn_srlz = STATE_STOP; | |
9319 | if (regdeps[i].data_srlz == STATE_NONE) | |
9320 | regdeps[i].data_srlz = STATE_STOP; | |
9321 | } | |
9322 | ++i; | |
9323 | } | |
800eeca4 JW |
9324 | } |
9325 | } | |
9326 | ||
542d6675 KH |
9327 | /* Add the given resource usage spec to the list of active dependencies. */ |
9328 | ||
197865e8 | 9329 | static void |
800eeca4 | 9330 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
9331 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
9332 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
9333 | struct rsrc *spec; |
9334 | int depind; | |
9335 | int path; | |
800eeca4 JW |
9336 | { |
9337 | if (regdepslen == regdepstotlen) | |
9338 | { | |
9339 | regdepstotlen += 20; | |
9340 | regdeps = (struct rsrc *) | |
542d6675 | 9341 | xrealloc ((void *) regdeps, |
bc805888 | 9342 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
9343 | } |
9344 | ||
9345 | regdeps[regdepslen] = *spec; | |
9346 | regdeps[regdepslen].depind = depind; | |
9347 | regdeps[regdepslen].path = path; | |
9348 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
9349 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
9350 | ||
9351 | print_dependency ("Adding", regdepslen); | |
9352 | ||
9353 | ++regdepslen; | |
9354 | } | |
9355 | ||
9356 | static void | |
9357 | print_dependency (action, depind) | |
542d6675 KH |
9358 | const char *action; |
9359 | int depind; | |
800eeca4 JW |
9360 | { |
9361 | if (md.debug_dv) | |
9362 | { | |
197865e8 | 9363 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
9364 | action, dv_mode[(regdeps[depind].dependency)->mode], |
9365 | (regdeps[depind].dependency)->name); | |
800eeca4 | 9366 | if (regdeps[depind].specific && regdeps[depind].index != 0) |
542d6675 | 9367 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 9368 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
9369 | { |
9370 | fputs (" ", stderr); | |
9371 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
9372 | fputs ("+", stderr); | |
9373 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
9374 | } | |
800eeca4 JW |
9375 | fprintf (stderr, "\n"); |
9376 | } | |
9377 | } | |
9378 | ||
9379 | static void | |
9380 | instruction_serialization () | |
9381 | { | |
9382 | int i; | |
9383 | if (md.debug_dv) | |
9384 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 9385 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
9386 | if (regdeps[i].insn_srlz == STATE_STOP) |
9387 | regdeps[i].insn_srlz = STATE_SRLZ; | |
9388 | } | |
9389 | ||
9390 | static void | |
9391 | data_serialization () | |
9392 | { | |
9393 | int i = 0; | |
9394 | if (md.debug_dv) | |
9395 | fprintf (stderr, " Data serialization\n"); | |
9396 | while (i < regdepslen) | |
9397 | { | |
9398 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
9399 | /* Note: as of 991210, all "other" dependencies are cleared by a |
9400 | data serialization. This might change with new tables */ | |
9401 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
9402 | { | |
9403 | print_dependency ("Removing", i); | |
9404 | regdeps[i] = regdeps[--regdepslen]; | |
9405 | } | |
800eeca4 | 9406 | else |
542d6675 | 9407 | ++i; |
800eeca4 JW |
9408 | } |
9409 | } | |
9410 | ||
542d6675 KH |
9411 | /* Insert stops and serializations as needed to avoid DVs. */ |
9412 | ||
800eeca4 JW |
9413 | static void |
9414 | remove_marked_resource (rs) | |
542d6675 | 9415 | struct rsrc *rs; |
800eeca4 JW |
9416 | { |
9417 | switch (rs->dependency->semantics) | |
9418 | { | |
9419 | case IA64_DVS_SPECIFIC: | |
9420 | if (md.debug_dv) | |
9421 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 9422 | /* ...fall through... */ |
800eeca4 JW |
9423 | case IA64_DVS_INSTR: |
9424 | if (md.debug_dv) | |
542d6675 | 9425 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 9426 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 9427 | insn_group_break (1, 0, 0); |
800eeca4 | 9428 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 KH |
9429 | { |
9430 | int oldqp = CURR_SLOT.qp_regno; | |
9431 | struct ia64_opcode *oldidesc = CURR_SLOT.idesc; | |
9432 | /* Manually jam a srlz.i insn into the stream */ | |
9433 | CURR_SLOT.qp_regno = 0; | |
9434 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); | |
9435 | instruction_serialization (); | |
9436 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9437 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9438 | emit_one_bundle (); | |
9439 | CURR_SLOT.qp_regno = oldqp; | |
9440 | CURR_SLOT.idesc = oldidesc; | |
9441 | } | |
800eeca4 JW |
9442 | insn_group_break (1, 0, 0); |
9443 | break; | |
9444 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
9445 | "other" types of DV are eliminated |
9446 | by a data serialization */ | |
800eeca4 JW |
9447 | case IA64_DVS_DATA: |
9448 | if (md.debug_dv) | |
542d6675 | 9449 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 9450 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 9451 | insn_group_break (1, 0, 0); |
800eeca4 | 9452 | { |
542d6675 KH |
9453 | int oldqp = CURR_SLOT.qp_regno; |
9454 | struct ia64_opcode *oldidesc = CURR_SLOT.idesc; | |
9455 | /* Manually jam a srlz.d insn into the stream */ | |
9456 | CURR_SLOT.qp_regno = 0; | |
9457 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); | |
9458 | data_serialization (); | |
9459 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9460 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9461 | emit_one_bundle (); | |
9462 | CURR_SLOT.qp_regno = oldqp; | |
9463 | CURR_SLOT.idesc = oldidesc; | |
800eeca4 JW |
9464 | } |
9465 | break; | |
9466 | case IA64_DVS_IMPLIED: | |
9467 | case IA64_DVS_IMPLIEDF: | |
9468 | if (md.debug_dv) | |
542d6675 | 9469 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
9470 | insn_group_break (1, 0, 0); |
9471 | break; | |
9472 | default: | |
9473 | break; | |
9474 | } | |
9475 | } | |
9476 | ||
9477 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 9478 | list. |
800eeca4 JW |
9479 | |
9480 | The check is run once for each execution path encountered. In this case, | |
9481 | a unique execution path is the sequence of instructions following a code | |
9482 | entry point, e.g. the following has three execution paths, one starting | |
9483 | at L0, one at L1, and one at L2. | |
197865e8 | 9484 | |
800eeca4 JW |
9485 | L0: nop |
9486 | L1: add | |
9487 | L2: add | |
197865e8 | 9488 | br.ret |
800eeca4 | 9489 | */ |
542d6675 | 9490 | |
800eeca4 JW |
9491 | static void |
9492 | check_dependencies (idesc) | |
542d6675 | 9493 | struct ia64_opcode *idesc; |
800eeca4 JW |
9494 | { |
9495 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9496 | int path; | |
9497 | int i; | |
9498 | ||
9499 | /* Note that the number of marked resources may change within the | |
197865e8 | 9500 | loop if in auto mode. */ |
800eeca4 JW |
9501 | i = 0; |
9502 | while (i < regdepslen) | |
9503 | { | |
9504 | struct rsrc *rs = ®deps[i]; | |
9505 | const struct ia64_dependency *dep = rs->dependency; | |
9506 | int chkind; | |
9507 | int note; | |
9508 | int start_over = 0; | |
9509 | ||
9510 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
9511 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
9512 | { | |
9513 | ++i; | |
9514 | continue; | |
9515 | } | |
9516 | ||
9517 | note = NOTE (opdeps->chks[chkind]); | |
9518 | ||
9519 | /* Check this resource against each execution path seen thus far. */ | |
9520 | for (path = 0; path <= md.path; path++) | |
9521 | { | |
9522 | int matchtype; | |
9523 | ||
9524 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
9525 | if (rs->path < path) | |
9526 | continue; | |
9527 | ||
9528 | /* If the QP for this insn implies a QP which has branched, don't | |
9529 | bother checking. Ed. NOTE: I don't think this check is terribly | |
9530 | useful; what's the point of generating code which will only be | |
9531 | reached if its QP is zero? | |
9532 | This code was specifically inserted to handle the following code, | |
9533 | based on notes from Intel's DV checking code, where p1 implies p2. | |
9534 | ||
9535 | mov r4 = 2 | |
9536 | (p2) br.cond L | |
9537 | (p1) mov r4 = 7 | |
9538 | */ | |
9539 | if (CURR_SLOT.qp_regno != 0) | |
9540 | { | |
9541 | int skip = 0; | |
9542 | int implies; | |
9543 | for (implies = 0; implies < qp_implieslen; implies++) | |
9544 | { | |
9545 | if (qp_implies[implies].path >= path | |
9546 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
9547 | && qp_implies[implies].p2_branched) | |
9548 | { | |
9549 | skip = 1; | |
9550 | break; | |
9551 | } | |
9552 | } | |
9553 | if (skip) | |
9554 | continue; | |
9555 | } | |
9556 | ||
9557 | if ((matchtype = resources_match (rs, idesc, note, | |
9558 | CURR_SLOT.qp_regno, path)) != 0) | |
9559 | { | |
9560 | char msg[1024]; | |
9561 | char pathmsg[256] = ""; | |
9562 | char indexmsg[256] = ""; | |
9563 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
9564 | ||
9565 | if (path != 0) | |
9566 | sprintf (pathmsg, " when entry is at label '%s'", | |
9567 | md.entry_labels[path - 1]); | |
9568 | if (rs->specific && rs->index != 0) | |
9569 | sprintf (indexmsg, ", specific resource number is %d", | |
9570 | rs->index); | |
9571 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
9572 | idesc->name, | |
9573 | (certain ? "violates" : "may violate"), | |
9574 | dv_mode[dep->mode], dep->name, | |
9575 | dv_sem[dep->semantics], | |
9576 | pathmsg, indexmsg); | |
9577 | ||
9578 | if (md.explicit_mode) | |
9579 | { | |
9580 | as_warn ("%s", msg); | |
9581 | if (path < md.path) | |
9582 | as_warn (_("Only the first path encountering the conflict " | |
9583 | "is reported")); | |
9584 | as_warn_where (rs->file, rs->line, | |
9585 | _("This is the location of the " | |
9586 | "conflicting usage")); | |
9587 | /* Don't bother checking other paths, to avoid duplicating | |
9588 | the same warning */ | |
9589 | break; | |
9590 | } | |
9591 | else | |
9592 | { | |
9593 | if (md.debug_dv) | |
9594 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
9595 | ||
9596 | remove_marked_resource (rs); | |
9597 | ||
9598 | /* since the set of dependencies has changed, start over */ | |
9599 | /* FIXME -- since we're removing dvs as we go, we | |
9600 | probably don't really need to start over... */ | |
9601 | start_over = 1; | |
9602 | break; | |
9603 | } | |
9604 | } | |
9605 | } | |
800eeca4 | 9606 | if (start_over) |
542d6675 | 9607 | i = 0; |
800eeca4 | 9608 | else |
542d6675 | 9609 | ++i; |
800eeca4 JW |
9610 | } |
9611 | } | |
9612 | ||
542d6675 KH |
9613 | /* Register new dependencies based on the given opcode. */ |
9614 | ||
800eeca4 JW |
9615 | static void |
9616 | mark_resources (idesc) | |
542d6675 | 9617 | struct ia64_opcode *idesc; |
800eeca4 JW |
9618 | { |
9619 | int i; | |
9620 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9621 | int add_only_qp_reads = 0; | |
9622 | ||
9623 | /* A conditional branch only uses its resources if it is taken; if it is | |
9624 | taken, we stop following that path. The other branch types effectively | |
9625 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 9626 | reads. */ |
800eeca4 JW |
9627 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
9628 | { | |
9629 | add_only_qp_reads = 1; | |
9630 | } | |
9631 | ||
9632 | if (md.debug_dv) | |
9633 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
9634 | ||
542d6675 | 9635 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
9636 | { |
9637 | const struct ia64_dependency *dep; | |
9638 | struct rsrc specs[MAX_SPECS]; | |
9639 | int note; | |
9640 | int path; | |
9641 | int count; | |
197865e8 | 9642 | |
800eeca4 | 9643 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 9644 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
9645 | |
9646 | if (add_only_qp_reads | |
542d6675 KH |
9647 | && !(dep->mode == IA64_DV_WAR |
9648 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 9649 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
9650 | || dep->specifier == IA64_RS_PR63))) |
9651 | continue; | |
800eeca4 JW |
9652 | |
9653 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
9654 | ||
9655 | #if 0 | |
9656 | if (md.debug_dv && !count) | |
542d6675 KH |
9657 | fprintf (stderr, " No %s %s usage found (path %d)\n", |
9658 | dv_mode[dep->mode], dep->name, md.path); | |
800eeca4 | 9659 | #endif |
197865e8 | 9660 | |
800eeca4 | 9661 | while (count-- > 0) |
542d6675 KH |
9662 | { |
9663 | mark_resource (idesc, dep, &specs[count], | |
9664 | DEP (opdeps->regs[i]), md.path); | |
9665 | } | |
800eeca4 JW |
9666 | |
9667 | /* The execution path may affect register values, which may in turn | |
542d6675 | 9668 | affect which indirect-access resources are accessed. */ |
800eeca4 | 9669 | switch (dep->specifier) |
542d6675 KH |
9670 | { |
9671 | default: | |
9672 | break; | |
9673 | case IA64_RS_CPUID: | |
9674 | case IA64_RS_DBR: | |
9675 | case IA64_RS_IBR: | |
800eeca4 | 9676 | case IA64_RS_MSR: |
542d6675 KH |
9677 | case IA64_RS_PKR: |
9678 | case IA64_RS_PMC: | |
9679 | case IA64_RS_PMD: | |
9680 | case IA64_RS_RR: | |
9681 | for (path = 0; path < md.path; path++) | |
9682 | { | |
9683 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
9684 | while (count-- > 0) | |
9685 | mark_resource (idesc, dep, &specs[count], | |
9686 | DEP (opdeps->regs[i]), path); | |
9687 | } | |
9688 | break; | |
9689 | } | |
9690 | } | |
9691 | } | |
9692 | ||
9693 | /* Remove dependencies when they no longer apply. */ | |
9694 | ||
800eeca4 JW |
9695 | static void |
9696 | update_dependencies (idesc) | |
542d6675 | 9697 | struct ia64_opcode *idesc; |
800eeca4 JW |
9698 | { |
9699 | int i; | |
9700 | ||
9701 | if (strcmp (idesc->name, "srlz.i") == 0) | |
9702 | { | |
9703 | instruction_serialization (); | |
9704 | } | |
9705 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
9706 | { | |
9707 | data_serialization (); | |
9708 | } | |
9709 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 9710 | || is_taken_branch (idesc)) |
800eeca4 | 9711 | { |
542d6675 KH |
9712 | /* Although technically the taken branch doesn't clear dependencies |
9713 | which require a srlz.[id], we don't follow the branch; the next | |
9714 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 9715 | regdepslen = 0; |
800eeca4 JW |
9716 | md.path = 0; |
9717 | } | |
9718 | else if (is_conditional_branch (idesc) | |
542d6675 | 9719 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
9720 | { |
9721 | int is_call = strstr (idesc->name, ".call") != NULL; | |
9722 | ||
542d6675 KH |
9723 | for (i = 0; i < qp_implieslen; i++) |
9724 | { | |
9725 | /* If the conditional branch's predicate is implied by the predicate | |
9726 | in an existing dependency, remove that dependency. */ | |
9727 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
9728 | { | |
9729 | int depind = 0; | |
9730 | /* Note that this implied predicate takes a branch so that if | |
9731 | a later insn generates a DV but its predicate implies this | |
9732 | one, we can avoid the false DV warning. */ | |
9733 | qp_implies[i].p2_branched = 1; | |
9734 | while (depind < regdepslen) | |
9735 | { | |
9736 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
9737 | { | |
9738 | print_dependency ("Removing", depind); | |
9739 | regdeps[depind] = regdeps[--regdepslen]; | |
9740 | } | |
9741 | else | |
9742 | ++depind; | |
9743 | } | |
9744 | } | |
9745 | } | |
800eeca4 | 9746 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
9747 | cleared, provided that the QP hasn't been modified between the |
9748 | marking instruction and the branch. */ | |
800eeca4 | 9749 | if (is_call) |
542d6675 KH |
9750 | { |
9751 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
9752 | } | |
800eeca4 | 9753 | else |
542d6675 KH |
9754 | { |
9755 | i = 0; | |
9756 | while (i < regdepslen) | |
9757 | { | |
9758 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
9759 | && regdeps[i].link_to_qp_branch | |
9760 | && (regdeps[i].file != CURR_SLOT.src_file | |
9761 | || regdeps[i].line != CURR_SLOT.src_line)) | |
9762 | { | |
9763 | /* Treat like a taken branch */ | |
9764 | print_dependency ("Removing", i); | |
9765 | regdeps[i] = regdeps[--regdepslen]; | |
9766 | } | |
9767 | else | |
9768 | ++i; | |
9769 | } | |
9770 | } | |
800eeca4 JW |
9771 | } |
9772 | } | |
9773 | ||
9774 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 9775 | |
800eeca4 JW |
9776 | static int |
9777 | check_dv (idesc) | |
542d6675 | 9778 | struct ia64_opcode *idesc; |
800eeca4 JW |
9779 | { |
9780 | if (md.debug_dv) | |
9781 | { | |
197865e8 | 9782 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
9783 | idesc->name, CURR_SLOT.src_line, |
9784 | idesc->dependencies->nchks, | |
9785 | idesc->dependencies->nregs); | |
800eeca4 JW |
9786 | } |
9787 | ||
197865e8 | 9788 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 9789 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 9790 | check against the specific resources used. */ |
800eeca4 JW |
9791 | check_dependencies (idesc); |
9792 | ||
542d6675 KH |
9793 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
9794 | then add them to the list of marked resources. */ | |
800eeca4 JW |
9795 | mark_resources (idesc); |
9796 | ||
9797 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
9798 | requirements for being cleared |
9799 | ||
800eeca4 JW |
9800 | Instruction serialization (insns separated by interruption, rfi, or |
9801 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
9802 | ||
9803 | Data serialization (instruction serialization, or writer + srlz.d + | |
9804 | reader, where writer and srlz.d are in separate groups) clears | |
9805 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
9806 | always be the case). | |
9807 | ||
9808 | Instruction group break (groups separated by stop, taken branch, | |
9809 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
9810 | */ | |
9811 | update_dependencies (idesc); | |
9812 | ||
9813 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 9814 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
9815 | note_register_values (idesc); |
9816 | ||
197865e8 | 9817 | /* We don't need or want this anymore. */ |
800eeca4 JW |
9818 | md.mem_offset.hint = 0; |
9819 | ||
9820 | return 0; | |
9821 | } | |
9822 | ||
9823 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
9824 | here. */ | |
9825 | void | |
9826 | md_assemble (str) | |
9827 | char *str; | |
9828 | { | |
9829 | char *saved_input_line_pointer, *mnemonic; | |
9830 | const struct pseudo_opcode *pdesc; | |
9831 | struct ia64_opcode *idesc; | |
9832 | unsigned char qp_regno; | |
9833 | unsigned int flags; | |
9834 | int ch; | |
9835 | ||
9836 | saved_input_line_pointer = input_line_pointer; | |
9837 | input_line_pointer = str; | |
9838 | ||
542d6675 | 9839 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
9840 | |
9841 | mnemonic = input_line_pointer; | |
9842 | ch = get_symbol_end (); | |
9843 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
9844 | if (pdesc) | |
9845 | { | |
9846 | *input_line_pointer = ch; | |
9847 | (*pdesc->handler) (pdesc->arg); | |
9848 | goto done; | |
9849 | } | |
9850 | ||
542d6675 | 9851 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
9852 | |
9853 | idesc = ia64_find_opcode (mnemonic); | |
9854 | *input_line_pointer = ch; | |
9855 | if (!idesc) | |
9856 | { | |
9857 | as_bad ("Unknown opcode `%s'", mnemonic); | |
9858 | goto done; | |
9859 | } | |
9860 | ||
9861 | idesc = parse_operands (idesc); | |
9862 | if (!idesc) | |
9863 | goto done; | |
9864 | ||
542d6675 | 9865 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
9866 | if (idesc->type == IA64_TYPE_DYN) |
9867 | { | |
9868 | if (strcmp (idesc->name, "add") == 0) | |
9869 | { | |
9870 | if (CURR_SLOT.opnd[2].X_op == O_register | |
9871 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
9872 | mnemonic = "addl"; | |
9873 | else | |
9874 | mnemonic = "adds"; | |
3d56ab85 | 9875 | ia64_free_opcode (idesc); |
800eeca4 JW |
9876 | idesc = ia64_find_opcode (mnemonic); |
9877 | #if 0 | |
9878 | know (!idesc->next); | |
9879 | #endif | |
9880 | } | |
9881 | else if (strcmp (idesc->name, "mov") == 0) | |
9882 | { | |
9883 | enum ia64_opnd opnd1, opnd2; | |
9884 | int rop; | |
9885 | ||
9886 | opnd1 = idesc->operands[0]; | |
9887 | opnd2 = idesc->operands[1]; | |
9888 | if (opnd1 == IA64_OPND_AR3) | |
9889 | rop = 0; | |
9890 | else if (opnd2 == IA64_OPND_AR3) | |
9891 | rop = 1; | |
9892 | else | |
9893 | abort (); | |
9894 | if (CURR_SLOT.opnd[rop].X_op == O_register | |
9895 | && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
9896 | mnemonic = "mov.i"; | |
9897 | else | |
9898 | mnemonic = "mov.m"; | |
3d56ab85 | 9899 | ia64_free_opcode (idesc); |
800eeca4 JW |
9900 | idesc = ia64_find_opcode (mnemonic); |
9901 | while (idesc != NULL | |
9902 | && (idesc->operands[0] != opnd1 | |
9903 | || idesc->operands[1] != opnd2)) | |
9904 | idesc = get_next_opcode (idesc); | |
9905 | } | |
9906 | } | |
9907 | ||
9908 | qp_regno = 0; | |
9909 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
9910 | { |
9911 | qp_regno = md.qp.X_add_number - REG_P; | |
9912 | md.qp.X_op = O_absent; | |
9913 | } | |
800eeca4 JW |
9914 | |
9915 | flags = idesc->flags; | |
9916 | ||
9917 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9918 | insn_group_break (1, 0, 0); | |
9919 | ||
9920 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
9921 | { | |
9922 | as_bad ("`%s' cannot be predicated", idesc->name); | |
9923 | goto done; | |
9924 | } | |
9925 | ||
542d6675 | 9926 | /* Build the instruction. */ |
800eeca4 JW |
9927 | CURR_SLOT.qp_regno = qp_regno; |
9928 | CURR_SLOT.idesc = idesc; | |
9929 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 9930 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
9931 | |
9932 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 9933 | if (unwind.current_entry) |
800eeca4 | 9934 | { |
e0c9811a JW |
9935 | CURR_SLOT.unwind_record = unwind.current_entry; |
9936 | unwind.current_entry = NULL; | |
800eeca4 JW |
9937 | } |
9938 | ||
542d6675 | 9939 | /* Check for dependency violations. */ |
800eeca4 | 9940 | if (md.detect_dv) |
542d6675 | 9941 | check_dv (idesc); |
800eeca4 JW |
9942 | |
9943 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9944 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9945 | emit_one_bundle (); | |
9946 | ||
9947 | if ((flags & IA64_OPCODE_LAST) != 0) | |
9948 | insn_group_break (1, 0, 0); | |
9949 | ||
9950 | md.last_text_seg = now_seg; | |
9951 | ||
9952 | done: | |
9953 | input_line_pointer = saved_input_line_pointer; | |
9954 | } | |
9955 | ||
9956 | /* Called when symbol NAME cannot be found in the symbol table. | |
9957 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
9958 | |
9959 | symbolS * | |
800eeca4 | 9960 | md_undefined_symbol (name) |
2434f565 | 9961 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
9962 | { |
9963 | return 0; | |
9964 | } | |
9965 | ||
9966 | /* Called for any expression that can not be recognized. When the | |
9967 | function is called, `input_line_pointer' will point to the start of | |
9968 | the expression. */ | |
542d6675 | 9969 | |
800eeca4 JW |
9970 | void |
9971 | md_operand (e) | |
9972 | expressionS *e; | |
9973 | { | |
9974 | enum pseudo_type pseudo_type; | |
e0c9811a | 9975 | const char *name; |
800eeca4 JW |
9976 | size_t len; |
9977 | int ch, i; | |
9978 | ||
9979 | switch (*input_line_pointer) | |
9980 | { | |
9981 | case '@': | |
542d6675 | 9982 | /* Find what relocation pseudo-function we're dealing with. */ |
800eeca4 JW |
9983 | pseudo_type = 0; |
9984 | ch = *++input_line_pointer; | |
9985 | for (i = 0; i < NELEMS (pseudo_func); ++i) | |
9986 | if (pseudo_func[i].name && pseudo_func[i].name[0] == ch) | |
9987 | { | |
9988 | len = strlen (pseudo_func[i].name); | |
9989 | if (strncmp (pseudo_func[i].name + 1, | |
9990 | input_line_pointer + 1, len - 1) == 0 | |
9991 | && !is_part_of_name (input_line_pointer[len])) | |
9992 | { | |
9993 | input_line_pointer += len; | |
9994 | pseudo_type = pseudo_func[i].type; | |
9995 | break; | |
9996 | } | |
9997 | } | |
9998 | switch (pseudo_type) | |
9999 | { | |
10000 | case PSEUDO_FUNC_RELOC: | |
10001 | SKIP_WHITESPACE (); | |
10002 | if (*input_line_pointer != '(') | |
10003 | { | |
10004 | as_bad ("Expected '('"); | |
10005 | goto err; | |
10006 | } | |
542d6675 KH |
10007 | /* Skip '('. */ |
10008 | ++input_line_pointer; | |
800eeca4 JW |
10009 | expression (e); |
10010 | if (*input_line_pointer++ != ')') | |
10011 | { | |
10012 | as_bad ("Missing ')'"); | |
10013 | goto err; | |
10014 | } | |
10015 | if (e->X_op != O_symbol) | |
10016 | { | |
10017 | if (e->X_op != O_pseudo_fixup) | |
10018 | { | |
10019 | as_bad ("Not a symbolic expression"); | |
10020 | goto err; | |
10021 | } | |
13ae64f3 JJ |
10022 | if (i != FUNC_LT_RELATIVE) |
10023 | { | |
10024 | as_bad ("Illegal combination of relocation functions"); | |
10025 | goto err; | |
10026 | } | |
10027 | switch (S_GET_VALUE (e->X_op_symbol)) | |
800eeca4 | 10028 | { |
13ae64f3 JJ |
10029 | case FUNC_FPTR_RELATIVE: |
10030 | i = FUNC_LT_FPTR_RELATIVE; break; | |
10031 | case FUNC_DTP_MODULE: | |
10032 | i = FUNC_LT_DTP_MODULE; break; | |
10033 | case FUNC_DTP_RELATIVE: | |
10034 | i = FUNC_LT_DTP_RELATIVE; break; | |
10035 | case FUNC_TP_RELATIVE: | |
10036 | i = FUNC_LT_TP_RELATIVE; break; | |
10037 | default: | |
800eeca4 JW |
10038 | as_bad ("Illegal combination of relocation functions"); |
10039 | goto err; | |
10040 | } | |
10041 | } | |
542d6675 KH |
10042 | /* Make sure gas doesn't get rid of local symbols that are used |
10043 | in relocs. */ | |
800eeca4 JW |
10044 | e->X_op = O_pseudo_fixup; |
10045 | e->X_op_symbol = pseudo_func[i].u.sym; | |
10046 | break; | |
10047 | ||
10048 | case PSEUDO_FUNC_CONST: | |
10049 | e->X_op = O_constant; | |
10050 | e->X_add_number = pseudo_func[i].u.ival; | |
10051 | break; | |
10052 | ||
e0c9811a JW |
10053 | case PSEUDO_FUNC_REG: |
10054 | e->X_op = O_register; | |
10055 | e->X_add_number = pseudo_func[i].u.ival; | |
10056 | break; | |
10057 | ||
800eeca4 | 10058 | default: |
e0c9811a JW |
10059 | name = input_line_pointer - 1; |
10060 | get_symbol_end (); | |
10061 | as_bad ("Unknown pseudo function `%s'", name); | |
800eeca4 JW |
10062 | goto err; |
10063 | } | |
10064 | break; | |
10065 | ||
10066 | case '[': | |
10067 | ++input_line_pointer; | |
10068 | expression (e); | |
10069 | if (*input_line_pointer != ']') | |
10070 | { | |
10071 | as_bad ("Closing bracket misssing"); | |
10072 | goto err; | |
10073 | } | |
10074 | else | |
10075 | { | |
10076 | if (e->X_op != O_register) | |
10077 | as_bad ("Register expected as index"); | |
10078 | ||
10079 | ++input_line_pointer; | |
10080 | e->X_op = O_index; | |
10081 | } | |
10082 | break; | |
10083 | ||
10084 | default: | |
10085 | break; | |
10086 | } | |
10087 | return; | |
10088 | ||
10089 | err: | |
10090 | ignore_rest_of_line (); | |
10091 | } | |
10092 | ||
10093 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10094 | a section symbol plus some offset. For relocs involving @fptr(), | |
10095 | directives we don't want such adjustments since we need to have the | |
10096 | original symbol's name in the reloc. */ | |
10097 | int | |
10098 | ia64_fix_adjustable (fix) | |
10099 | fixS *fix; | |
10100 | { | |
10101 | /* Prevent all adjustments to global symbols */ | |
10102 | if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) | |
10103 | return 0; | |
10104 | ||
10105 | switch (fix->fx_r_type) | |
10106 | { | |
10107 | case BFD_RELOC_IA64_FPTR64I: | |
10108 | case BFD_RELOC_IA64_FPTR32MSB: | |
10109 | case BFD_RELOC_IA64_FPTR32LSB: | |
10110 | case BFD_RELOC_IA64_FPTR64MSB: | |
10111 | case BFD_RELOC_IA64_FPTR64LSB: | |
10112 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10113 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10114 | return 0; | |
10115 | default: | |
10116 | break; | |
10117 | } | |
10118 | ||
10119 | return 1; | |
10120 | } | |
10121 | ||
10122 | int | |
10123 | ia64_force_relocation (fix) | |
10124 | fixS *fix; | |
10125 | { | |
10126 | switch (fix->fx_r_type) | |
10127 | { | |
10128 | case BFD_RELOC_IA64_FPTR64I: | |
10129 | case BFD_RELOC_IA64_FPTR32MSB: | |
10130 | case BFD_RELOC_IA64_FPTR32LSB: | |
10131 | case BFD_RELOC_IA64_FPTR64MSB: | |
10132 | case BFD_RELOC_IA64_FPTR64LSB: | |
10133 | ||
10134 | case BFD_RELOC_IA64_LTOFF22: | |
10135 | case BFD_RELOC_IA64_LTOFF64I: | |
10136 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10137 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10138 | case BFD_RELOC_IA64_PLTOFF22: | |
10139 | case BFD_RELOC_IA64_PLTOFF64I: | |
10140 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10141 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10142 | |
10143 | case BFD_RELOC_IA64_LTOFF22X: | |
10144 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10145 | return 1; |
10146 | ||
10147 | default: | |
a161fe53 | 10148 | break; |
800eeca4 | 10149 | } |
a161fe53 | 10150 | |
ae6063d4 | 10151 | return generic_force_reloc (fix); |
800eeca4 JW |
10152 | } |
10153 | ||
10154 | /* Decide from what point a pc-relative relocation is relative to, | |
10155 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10156 | long | |
10157 | ia64_pcrel_from_section (fix, sec) | |
10158 | fixS *fix; | |
10159 | segT sec; | |
10160 | { | |
10161 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10162 | |
800eeca4 JW |
10163 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10164 | off &= ~0xfUL; | |
10165 | ||
10166 | return off; | |
10167 | } | |
10168 | ||
6174d9c8 RH |
10169 | |
10170 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10171 | void | |
10172 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10173 | { | |
10174 | expressionS expr; | |
10175 | ||
10176 | expr.X_op = O_pseudo_fixup; | |
10177 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10178 | expr.X_add_number = 0; | |
10179 | expr.X_add_symbol = symbol; | |
10180 | emit_expr (&expr, size); | |
10181 | } | |
10182 | ||
800eeca4 JW |
10183 | /* This is called whenever some data item (not an instruction) needs a |
10184 | fixup. We pick the right reloc code depending on the byteorder | |
10185 | currently in effect. */ | |
10186 | void | |
10187 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10188 | fragS *f; | |
10189 | int where; | |
10190 | int nbytes; | |
10191 | expressionS *exp; | |
10192 | { | |
10193 | bfd_reloc_code_real_type code; | |
10194 | fixS *fix; | |
10195 | ||
10196 | switch (nbytes) | |
10197 | { | |
10198 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10199 | them here since they will work fine as long as the expression | |
10200 | is fully defined at the end of the pass over the source file. */ | |
10201 | case 1: code = BFD_RELOC_8; break; | |
10202 | case 2: code = BFD_RELOC_16; break; | |
10203 | case 4: | |
10204 | if (target_big_endian) | |
10205 | code = BFD_RELOC_IA64_DIR32MSB; | |
10206 | else | |
10207 | code = BFD_RELOC_IA64_DIR32LSB; | |
10208 | break; | |
10209 | ||
10210 | case 8: | |
40449e9f | 10211 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10212 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10213 | && exp->X_op_symbol |
10214 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10215 | && !(md.flags & EF_IA_64_ABI64)) | |
10216 | { | |
10217 | if (target_big_endian) | |
10218 | code = BFD_RELOC_IA64_IPLTMSB; | |
10219 | else | |
10220 | code = BFD_RELOC_IA64_IPLTLSB; | |
10221 | exp->X_op = O_symbol; | |
10222 | break; | |
10223 | } | |
10224 | else | |
10225 | { | |
10226 | if (target_big_endian) | |
10227 | code = BFD_RELOC_IA64_DIR64MSB; | |
10228 | else | |
10229 | code = BFD_RELOC_IA64_DIR64LSB; | |
10230 | break; | |
10231 | } | |
800eeca4 | 10232 | |
3969b680 RH |
10233 | case 16: |
10234 | if (exp->X_op == O_pseudo_fixup | |
10235 | && exp->X_op_symbol | |
10236 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10237 | { | |
10238 | if (target_big_endian) | |
10239 | code = BFD_RELOC_IA64_IPLTMSB; | |
10240 | else | |
10241 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10242 | exp->X_op = O_symbol; |
10243 | break; | |
10244 | } | |
10245 | /* FALLTHRU */ | |
10246 | ||
800eeca4 JW |
10247 | default: |
10248 | as_bad ("Unsupported fixup size %d", nbytes); | |
10249 | ignore_rest_of_line (); | |
10250 | return; | |
10251 | } | |
6174d9c8 | 10252 | |
800eeca4 JW |
10253 | if (exp->X_op == O_pseudo_fixup) |
10254 | { | |
800eeca4 JW |
10255 | exp->X_op = O_symbol; |
10256 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10257 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10258 | } |
3969b680 | 10259 | |
800eeca4 JW |
10260 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10261 | /* We need to store the byte order in effect in case we're going | |
10262 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 10263 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
10264 | fix->tc_fix_data.bigendian = target_big_endian; |
10265 | } | |
10266 | ||
10267 | /* Return the actual relocation we wish to associate with the pseudo | |
10268 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10269 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10270 | |
10271 | static bfd_reloc_code_real_type | |
10272 | ia64_gen_real_reloc_type (sym, r_type) | |
10273 | struct symbol *sym; | |
10274 | bfd_reloc_code_real_type r_type; | |
10275 | { | |
10276 | bfd_reloc_code_real_type new = 0; | |
10277 | ||
10278 | if (sym == NULL) | |
10279 | { | |
10280 | return r_type; | |
10281 | } | |
10282 | ||
10283 | switch (S_GET_VALUE (sym)) | |
10284 | { | |
10285 | case FUNC_FPTR_RELATIVE: | |
10286 | switch (r_type) | |
10287 | { | |
10288 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
10289 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
10290 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
10291 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
10292 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
10293 | default: break; | |
10294 | } | |
10295 | break; | |
10296 | ||
10297 | case FUNC_GP_RELATIVE: | |
10298 | switch (r_type) | |
10299 | { | |
10300 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
10301 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
10302 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
10303 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
10304 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
10305 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
10306 | default: break; | |
10307 | } | |
10308 | break; | |
10309 | ||
10310 | case FUNC_LT_RELATIVE: | |
10311 | switch (r_type) | |
10312 | { | |
10313 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
10314 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
10315 | default: break; | |
10316 | } | |
10317 | break; | |
10318 | ||
fa2c7eff RH |
10319 | case FUNC_LT_RELATIVE_X: |
10320 | switch (r_type) | |
10321 | { | |
10322 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
10323 | default: break; | |
10324 | } | |
10325 | break; | |
10326 | ||
c67e42c9 RH |
10327 | case FUNC_PC_RELATIVE: |
10328 | switch (r_type) | |
10329 | { | |
10330 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
10331 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
10332 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
10333 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
10334 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
10335 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
10336 | default: break; | |
10337 | } | |
10338 | break; | |
10339 | ||
800eeca4 JW |
10340 | case FUNC_PLT_RELATIVE: |
10341 | switch (r_type) | |
10342 | { | |
10343 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
10344 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
10345 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10346 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
10347 | default: break; | |
10348 | } | |
10349 | break; | |
10350 | ||
10351 | case FUNC_SEC_RELATIVE: | |
10352 | switch (r_type) | |
10353 | { | |
10354 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
10355 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
10356 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
10357 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
10358 | default: break; | |
10359 | } | |
10360 | break; | |
10361 | ||
10362 | case FUNC_SEG_RELATIVE: | |
10363 | switch (r_type) | |
10364 | { | |
10365 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
10366 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
10367 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
10368 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
10369 | default: break; | |
10370 | } | |
10371 | break; | |
10372 | ||
10373 | case FUNC_LTV_RELATIVE: | |
10374 | switch (r_type) | |
10375 | { | |
10376 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
10377 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
10378 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
10379 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
10380 | default: break; | |
10381 | } | |
10382 | break; | |
10383 | ||
10384 | case FUNC_LT_FPTR_RELATIVE: | |
10385 | switch (r_type) | |
10386 | { | |
10387 | case BFD_RELOC_IA64_IMM22: | |
10388 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
10389 | case BFD_RELOC_IA64_IMM64: | |
10390 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
10391 | default: | |
10392 | break; | |
10393 | } | |
10394 | break; | |
3969b680 | 10395 | |
13ae64f3 JJ |
10396 | case FUNC_TP_RELATIVE: |
10397 | switch (r_type) | |
10398 | { | |
10399 | case BFD_RELOC_IA64_IMM14: | |
10400 | new = BFD_RELOC_IA64_TPREL14; break; | |
10401 | case BFD_RELOC_IA64_IMM22: | |
10402 | new = BFD_RELOC_IA64_TPREL22; break; | |
10403 | case BFD_RELOC_IA64_IMM64: | |
10404 | new = BFD_RELOC_IA64_TPREL64I; break; | |
10405 | default: | |
10406 | break; | |
10407 | } | |
10408 | break; | |
10409 | ||
10410 | case FUNC_LT_TP_RELATIVE: | |
10411 | switch (r_type) | |
10412 | { | |
10413 | case BFD_RELOC_IA64_IMM22: | |
10414 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
10415 | default: | |
10416 | break; | |
10417 | } | |
10418 | break; | |
10419 | ||
10420 | case FUNC_LT_DTP_MODULE: | |
10421 | switch (r_type) | |
10422 | { | |
10423 | case BFD_RELOC_IA64_IMM22: | |
10424 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
10425 | default: | |
10426 | break; | |
10427 | } | |
10428 | break; | |
10429 | ||
10430 | case FUNC_DTP_RELATIVE: | |
10431 | switch (r_type) | |
10432 | { | |
6174d9c8 RH |
10433 | case BFD_RELOC_IA64_DIR64MSB: |
10434 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
10435 | case BFD_RELOC_IA64_DIR64LSB: | |
10436 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
10437 | case BFD_RELOC_IA64_IMM14: |
10438 | new = BFD_RELOC_IA64_DTPREL14; break; | |
10439 | case BFD_RELOC_IA64_IMM22: | |
10440 | new = BFD_RELOC_IA64_DTPREL22; break; | |
10441 | case BFD_RELOC_IA64_IMM64: | |
10442 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
10443 | default: | |
10444 | break; | |
10445 | } | |
10446 | break; | |
10447 | ||
10448 | case FUNC_LT_DTP_RELATIVE: | |
10449 | switch (r_type) | |
10450 | { | |
10451 | case BFD_RELOC_IA64_IMM22: | |
10452 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
10453 | default: | |
10454 | break; | |
10455 | } | |
10456 | break; | |
10457 | ||
40449e9f KH |
10458 | case FUNC_IPLT_RELOC: |
10459 | break; | |
1cd8ff38 | 10460 | |
800eeca4 JW |
10461 | default: |
10462 | abort (); | |
10463 | } | |
6174d9c8 | 10464 | |
800eeca4 JW |
10465 | /* Hmmmm. Should this ever occur? */ |
10466 | if (new) | |
10467 | return new; | |
10468 | else | |
10469 | return r_type; | |
10470 | } | |
10471 | ||
10472 | /* Here is where generate the appropriate reloc for pseudo relocation | |
10473 | functions. */ | |
10474 | void | |
10475 | ia64_validate_fix (fix) | |
10476 | fixS *fix; | |
10477 | { | |
10478 | switch (fix->fx_r_type) | |
10479 | { | |
10480 | case BFD_RELOC_IA64_FPTR64I: | |
10481 | case BFD_RELOC_IA64_FPTR32MSB: | |
10482 | case BFD_RELOC_IA64_FPTR64LSB: | |
10483 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10484 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10485 | if (fix->fx_offset != 0) | |
10486 | as_bad_where (fix->fx_file, fix->fx_line, | |
10487 | "No addend allowed in @fptr() relocation"); | |
10488 | break; | |
10489 | default: | |
10490 | break; | |
10491 | } | |
800eeca4 JW |
10492 | } |
10493 | ||
10494 | static void | |
10495 | fix_insn (fix, odesc, value) | |
10496 | fixS *fix; | |
10497 | const struct ia64_operand *odesc; | |
10498 | valueT value; | |
10499 | { | |
10500 | bfd_vma insn[3], t0, t1, control_bits; | |
10501 | const char *err; | |
10502 | char *fixpos; | |
10503 | long slot; | |
10504 | ||
10505 | slot = fix->fx_where & 0x3; | |
10506 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
10507 | ||
c67e42c9 | 10508 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
10509 | t0 = bfd_getl64 (fixpos); |
10510 | t1 = bfd_getl64 (fixpos + 8); | |
10511 | control_bits = t0 & 0x1f; | |
10512 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
10513 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
10514 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
10515 | ||
c67e42c9 RH |
10516 | err = NULL; |
10517 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 10518 | { |
c67e42c9 RH |
10519 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
10520 | insn[2] |= (((value & 0x7f) << 13) | |
10521 | | (((value >> 7) & 0x1ff) << 27) | |
10522 | | (((value >> 16) & 0x1f) << 22) | |
10523 | | (((value >> 21) & 0x1) << 21) | |
10524 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 10525 | } |
c67e42c9 RH |
10526 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
10527 | { | |
10528 | if (value & ~0x3fffffffffffffffULL) | |
10529 | err = "integer operand out of range"; | |
10530 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
10531 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
10532 | } | |
10533 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
10534 | { | |
10535 | value >>= 4; | |
10536 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
10537 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
10538 | | (((value >> 0) & 0xfffff) << 13)); | |
10539 | } | |
10540 | else | |
10541 | err = (*odesc->insert) (odesc, value, insn + slot); | |
10542 | ||
10543 | if (err) | |
10544 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
10545 | |
10546 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
10547 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
10548 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
10549 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
10550 | } |
10551 | ||
10552 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
10553 | ignored; perhaps it was once meaningful, but now it is historical. | |
10554 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
10555 | ||
10556 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 10557 | (if possible). */ |
94f592af NC |
10558 | |
10559 | void | |
10560 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 10561 | fixS *fix; |
40449e9f | 10562 | valueT *valP; |
2434f565 | 10563 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
10564 | { |
10565 | char *fixpos; | |
40449e9f | 10566 | valueT value = *valP; |
800eeca4 JW |
10567 | |
10568 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
10569 | ||
10570 | if (fix->fx_pcrel) | |
10571 | { | |
10572 | switch (fix->fx_r_type) | |
10573 | { | |
10574 | case BFD_RELOC_IA64_DIR32MSB: | |
10575 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB; | |
800eeca4 JW |
10576 | break; |
10577 | ||
10578 | case BFD_RELOC_IA64_DIR32LSB: | |
10579 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB; | |
800eeca4 JW |
10580 | break; |
10581 | ||
10582 | case BFD_RELOC_IA64_DIR64MSB: | |
10583 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB; | |
800eeca4 JW |
10584 | break; |
10585 | ||
10586 | case BFD_RELOC_IA64_DIR64LSB: | |
10587 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB; | |
800eeca4 JW |
10588 | break; |
10589 | ||
10590 | default: | |
10591 | break; | |
10592 | } | |
10593 | } | |
10594 | if (fix->fx_addsy) | |
10595 | { | |
00f7efb6 | 10596 | switch (fix->fx_r_type) |
800eeca4 | 10597 | { |
00f7efb6 | 10598 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
10599 | /* This must be a TAG13 or TAG13b operand. There are no external |
10600 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
10601 | as_bad_where (fix->fx_file, fix->fx_line, |
10602 | "%s must have a constant value", | |
10603 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 10604 | fix->fx_done = 1; |
94f592af | 10605 | return; |
00f7efb6 JJ |
10606 | |
10607 | case BFD_RELOC_IA64_TPREL14: | |
10608 | case BFD_RELOC_IA64_TPREL22: | |
10609 | case BFD_RELOC_IA64_TPREL64I: | |
10610 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
10611 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
10612 | case BFD_RELOC_IA64_DTPREL14: | |
10613 | case BFD_RELOC_IA64_DTPREL22: | |
10614 | case BFD_RELOC_IA64_DTPREL64I: | |
10615 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
10616 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
10617 | break; | |
7925dd68 JJ |
10618 | |
10619 | default: | |
10620 | break; | |
800eeca4 | 10621 | } |
800eeca4 JW |
10622 | } |
10623 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
10624 | { | |
10625 | if (fix->tc_fix_data.bigendian) | |
10626 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
10627 | else | |
10628 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
10629 | fix->fx_done = 1; | |
800eeca4 JW |
10630 | } |
10631 | else | |
10632 | { | |
10633 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
10634 | fix->fx_done = 1; | |
800eeca4 | 10635 | } |
800eeca4 JW |
10636 | } |
10637 | ||
10638 | /* Generate the BFD reloc to be stuck in the object file from the | |
10639 | fixup used internally in the assembler. */ | |
542d6675 KH |
10640 | |
10641 | arelent * | |
800eeca4 | 10642 | tc_gen_reloc (sec, fixp) |
2434f565 | 10643 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
10644 | fixS *fixp; |
10645 | { | |
10646 | arelent *reloc; | |
10647 | ||
10648 | reloc = xmalloc (sizeof (*reloc)); | |
10649 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
10650 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
10651 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
10652 | reloc->addend = fixp->fx_offset; | |
10653 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
10654 | ||
10655 | if (!reloc->howto) | |
10656 | { | |
10657 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
10658 | "Cannot represent %s relocation in object file", | |
10659 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
10660 | } | |
10661 | return reloc; | |
10662 | } | |
10663 | ||
10664 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
10665 | of type TYPE, and store the appropriate bytes in *LIT. The number |
10666 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
10667 | returned, or NULL on OK. */ |
10668 | ||
10669 | #define MAX_LITTLENUMS 5 | |
10670 | ||
542d6675 | 10671 | char * |
800eeca4 JW |
10672 | md_atof (type, lit, size) |
10673 | int type; | |
10674 | char *lit; | |
10675 | int *size; | |
10676 | { | |
10677 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
10678 | char *t; |
10679 | int prec; | |
10680 | ||
10681 | switch (type) | |
10682 | { | |
10683 | /* IEEE floats */ | |
10684 | case 'f': | |
10685 | case 'F': | |
10686 | case 's': | |
10687 | case 'S': | |
10688 | prec = 2; | |
10689 | break; | |
10690 | ||
10691 | case 'd': | |
10692 | case 'D': | |
10693 | case 'r': | |
10694 | case 'R': | |
10695 | prec = 4; | |
10696 | break; | |
10697 | ||
10698 | case 'x': | |
10699 | case 'X': | |
10700 | case 'p': | |
10701 | case 'P': | |
10702 | prec = 5; | |
10703 | break; | |
10704 | ||
10705 | default: | |
10706 | *size = 0; | |
10707 | return "Bad call to MD_ATOF()"; | |
10708 | } | |
10709 | t = atof_ieee (input_line_pointer, type, words); | |
10710 | if (t) | |
10711 | input_line_pointer = t; | |
800eeca4 | 10712 | |
10a98291 L |
10713 | (*ia64_float_to_chars) (lit, words, prec); |
10714 | ||
165a7f90 L |
10715 | if (type == 'X') |
10716 | { | |
10717 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 10718 | memset (&lit [10], 0, 6); |
165a7f90 L |
10719 | *size = 8 * sizeof (LITTLENUM_TYPE); |
10720 | } | |
10a98291 L |
10721 | else |
10722 | *size = prec * sizeof (LITTLENUM_TYPE); | |
10723 | ||
800eeca4 JW |
10724 | return 0; |
10725 | } | |
10726 | ||
800eeca4 JW |
10727 | /* Handle ia64 specific semantics of the align directive. */ |
10728 | ||
0a9ef439 | 10729 | void |
800eeca4 | 10730 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
10731 | int n ATTRIBUTE_UNUSED; |
10732 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 10733 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 10734 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 10735 | { |
0a9ef439 | 10736 | if (subseg_text_p (now_seg)) |
800eeca4 | 10737 | ia64_flush_insns (); |
0a9ef439 | 10738 | } |
800eeca4 | 10739 | |
0a9ef439 RH |
10740 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
10741 | of an rs_align_code fragment. */ | |
800eeca4 | 10742 | |
0a9ef439 RH |
10743 | void |
10744 | ia64_handle_align (fragp) | |
10745 | fragS *fragp; | |
10746 | { | |
10747 | /* Use mfi bundle of nops with no stop bits. */ | |
0a9ef439 RH |
10748 | static const unsigned char le_nop[] |
10749 | = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
10750 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
10751 | ||
10752 | int bytes; | |
10753 | char *p; | |
10754 | ||
10755 | if (fragp->fr_type != rs_align_code) | |
10756 | return; | |
10757 | ||
10758 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; | |
10759 | p = fragp->fr_literal + fragp->fr_fix; | |
10760 | ||
10761 | /* Make sure we are on a 16-byte boundary, in case someone has been | |
10762 | putting data into a text section. */ | |
10763 | if (bytes & 15) | |
10764 | { | |
10765 | int fix = bytes & 15; | |
10766 | memset (p, 0, fix); | |
10767 | p += fix; | |
10768 | bytes -= fix; | |
10769 | fragp->fr_fix += fix; | |
800eeca4 JW |
10770 | } |
10771 | ||
012a452b AM |
10772 | /* Instruction bundles are always little-endian. */ |
10773 | memcpy (p, le_nop, 16); | |
0a9ef439 | 10774 | fragp->fr_var = 16; |
800eeca4 | 10775 | } |
10a98291 L |
10776 | |
10777 | static void | |
10778 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
10779 | int prec) | |
10780 | { | |
10781 | while (prec--) | |
10782 | { | |
10783 | number_to_chars_bigendian (lit, (long) (*words++), | |
10784 | sizeof (LITTLENUM_TYPE)); | |
10785 | lit += sizeof (LITTLENUM_TYPE); | |
10786 | } | |
10787 | } | |
10788 | ||
10789 | static void | |
10790 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
10791 | int prec) | |
10792 | { | |
10793 | while (prec--) | |
10794 | { | |
10795 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
10796 | sizeof (LITTLENUM_TYPE)); | |
10797 | lit += sizeof (LITTLENUM_TYPE); | |
10798 | } | |
10799 | } | |
10800 | ||
10801 | void | |
10802 | ia64_elf_section_change_hook (void) | |
10803 | { | |
10804 | dot_byteorder (-1); | |
10805 | } | |
a645d1eb L |
10806 | |
10807 | /* Check if a label should be made global. */ | |
10808 | void | |
10809 | ia64_check_label (symbolS *label) | |
10810 | { | |
10811 | if (*input_line_pointer == ':') | |
10812 | { | |
10813 | S_SET_EXTERNAL (label); | |
10814 | input_line_pointer++; | |
10815 | } | |
10816 | } | |
35f5df7f L |
10817 | |
10818 | /* Used to remember where .alias and .secalias directives are seen. We | |
10819 | will rename symbol and section names when we are about to output | |
10820 | the relocatable file. */ | |
10821 | struct alias | |
10822 | { | |
10823 | char *file; /* The file where the directive is seen. */ | |
10824 | unsigned int line; /* The line number the directive is at. */ | |
10825 | const char *name; /* The orignale name of the symbol. */ | |
10826 | }; | |
10827 | ||
10828 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
10829 | .secalias. Otherwise, it is .alias. */ | |
10830 | static void | |
10831 | dot_alias (int section) | |
10832 | { | |
10833 | char *name, *alias; | |
10834 | char delim; | |
10835 | char *end_name; | |
10836 | int len; | |
10837 | const char *error_string; | |
10838 | struct alias *h; | |
10839 | const char *a; | |
10840 | struct hash_control *ahash, *nhash; | |
10841 | const char *kind; | |
10842 | ||
10843 | name = input_line_pointer; | |
10844 | delim = get_symbol_end (); | |
10845 | end_name = input_line_pointer; | |
10846 | *end_name = delim; | |
10847 | ||
10848 | if (name == end_name) | |
10849 | { | |
10850 | as_bad (_("expected symbol name")); | |
10851 | discard_rest_of_line (); | |
10852 | return; | |
10853 | } | |
10854 | ||
10855 | SKIP_WHITESPACE (); | |
10856 | ||
10857 | if (*input_line_pointer != ',') | |
10858 | { | |
10859 | *end_name = 0; | |
10860 | as_bad (_("expected comma after \"%s\""), name); | |
10861 | *end_name = delim; | |
10862 | ignore_rest_of_line (); | |
10863 | return; | |
10864 | } | |
10865 | ||
10866 | input_line_pointer++; | |
10867 | *end_name = 0; | |
10868 | ||
10869 | /* We call demand_copy_C_string to check if alias string is valid. | |
10870 | There should be a closing `"' and no `\0' in the string. */ | |
10871 | alias = demand_copy_C_string (&len); | |
10872 | if (alias == NULL) | |
10873 | { | |
10874 | ignore_rest_of_line (); | |
10875 | return; | |
10876 | } | |
10877 | ||
10878 | /* Make a copy of name string. */ | |
10879 | len = strlen (name) + 1; | |
10880 | obstack_grow (¬es, name, len); | |
10881 | name = obstack_finish (¬es); | |
10882 | ||
10883 | if (section) | |
10884 | { | |
10885 | kind = "section"; | |
10886 | ahash = secalias_hash; | |
10887 | nhash = secalias_name_hash; | |
10888 | } | |
10889 | else | |
10890 | { | |
10891 | kind = "symbol"; | |
10892 | ahash = alias_hash; | |
10893 | nhash = alias_name_hash; | |
10894 | } | |
10895 | ||
10896 | /* Check if alias has been used before. */ | |
10897 | h = (struct alias *) hash_find (ahash, alias); | |
10898 | if (h) | |
10899 | { | |
10900 | if (strcmp (h->name, name)) | |
10901 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
10902 | alias, kind, h->name); | |
10903 | goto out; | |
10904 | } | |
10905 | ||
10906 | /* Check if name already has an alias. */ | |
10907 | a = (const char *) hash_find (nhash, name); | |
10908 | if (a) | |
10909 | { | |
10910 | if (strcmp (a, alias)) | |
10911 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
10912 | goto out; | |
10913 | } | |
10914 | ||
10915 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
10916 | as_where (&h->file, &h->line); | |
10917 | h->name = name; | |
10918 | ||
10919 | error_string = hash_jam (ahash, alias, (PTR) h); | |
10920 | if (error_string) | |
10921 | { | |
10922 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
10923 | alias, kind, error_string); | |
10924 | goto out; | |
10925 | } | |
10926 | ||
10927 | error_string = hash_jam (nhash, name, (PTR) alias); | |
10928 | if (error_string) | |
10929 | { | |
10930 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
10931 | alias, kind, error_string); | |
10932 | out: | |
10933 | obstack_free (¬es, name); | |
10934 | obstack_free (¬es, alias); | |
10935 | } | |
10936 | ||
10937 | demand_empty_rest_of_line (); | |
10938 | } | |
10939 | ||
10940 | /* It renames the original symbol name to its alias. */ | |
10941 | static void | |
10942 | do_alias (const char *alias, PTR value) | |
10943 | { | |
10944 | struct alias *h = (struct alias *) value; | |
10945 | symbolS *sym = symbol_find (h->name); | |
10946 | ||
10947 | if (sym == NULL) | |
10948 | as_warn_where (h->file, h->line, | |
10949 | _("symbol `%s' aliased to `%s' is not used"), | |
10950 | h->name, alias); | |
10951 | else | |
10952 | S_SET_NAME (sym, (char *) alias); | |
10953 | } | |
10954 | ||
10955 | /* Called from write_object_file. */ | |
10956 | void | |
10957 | ia64_adjust_symtab (void) | |
10958 | { | |
10959 | hash_traverse (alias_hash, do_alias); | |
10960 | } | |
10961 | ||
10962 | /* It renames the original section name to its alias. */ | |
10963 | static void | |
10964 | do_secalias (const char *alias, PTR value) | |
10965 | { | |
10966 | struct alias *h = (struct alias *) value; | |
10967 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
10968 | ||
10969 | if (sec == NULL) | |
10970 | as_warn_where (h->file, h->line, | |
10971 | _("section `%s' aliased to `%s' is not used"), | |
10972 | h->name, alias); | |
10973 | else | |
10974 | sec->name = alias; | |
10975 | } | |
10976 | ||
10977 | /* Called from write_object_file. */ | |
10978 | void | |
10979 | ia64_frob_file (void) | |
10980 | { | |
10981 | hash_traverse (secalias_hash, do_secalias); | |
10982 | } |