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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
744b6414 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
4b4da160
NC		 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
800eeca4
JW		 22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
5faa8e39
JW		 59
60/* Some systems define MIN in, e.g., param.h. */
61#undef MIN
800eeca4
JW		 62#define MIN(a,b) ((a) < (b) ? (a) : (b))
63
64#define NUM_SLOTS 4
65#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66#define CURR_SLOT md.slot[md.curr_slot]
67
68#define O_pseudo_fixup (O_max + 1)
69
70enum special_section
71 {
557debba 72 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 73 SPECIAL_SECTION_BSS = 0,
74 SPECIAL_SECTION_SBSS,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
557debba
JW		 79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 83 };
84
85enum reloc_func
86 {
13ae64f3
JJ		 87 FUNC_DTP_MODULE,
88 FUNC_DTP_RELATIVE,
800eeca4
JW		 89 FUNC_FPTR_RELATIVE,
90 FUNC_GP_RELATIVE,
91 FUNC_LT_RELATIVE,
fa2c7eff 92 FUNC_LT_RELATIVE_X,
c67e42c9 93 FUNC_PC_RELATIVE,
800eeca4
JW		 94 FUNC_PLT_RELATIVE,
95 FUNC_SEC_RELATIVE,
96 FUNC_SEG_RELATIVE,
13ae64f3 97 FUNC_TP_RELATIVE,
800eeca4
JW		 98 FUNC_LTV_RELATIVE,
99 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 100 FUNC_LT_DTP_MODULE,
101 FUNC_LT_DTP_RELATIVE,
102 FUNC_LT_TP_RELATIVE,
3969b680 103 FUNC_IPLT_RELOC,
800eeca4
JW		 104 };
105
106enum reg_symbol
107 {
108 REG_GR = 0,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
115 REG_CFM,
116 REG_PR,
117 REG_PR_ROT,
118 REG_PSR,
119 REG_PSR_L,
120 REG_PSR_UM,
121 /* The following are pseudo-registers for use by gas only. */
122 IND_CPUID,
123 IND_DBR,
124 IND_DTR,
125 IND_ITR,
126 IND_IBR,
800eeca4
JW		 127 IND_MSR,
128 IND_PKR,
129 IND_PMC,
130 IND_PMD,
131 IND_RR,
542d6675 132 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 133 REG_PSP,
134 REG_PRIUNAT,
800eeca4
JW		 135 REG_NUM
136 };
137
138enum dynreg_type
139 {
140 DYNREG_GR = 0, /* dynamic general purpose register */
141 DYNREG_FR, /* dynamic floating point register */
142 DYNREG_PR, /* dynamic predicate register */
143 DYNREG_NUM_TYPES
144 };
145
87f8eb97
JW		 146enum operand_match_result
147 {
148 OPERAND_MATCH,
149 OPERAND_OUT_OF_RANGE,
150 OPERAND_MISMATCH
151 };
152
800eeca4
JW		 153/* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
156 instruction. */
157struct label_fix
542d6675
KH		 158{
159 struct label_fix *next;
160 struct symbol *sym;
07a53e5c 161 bfd_boolean dw2_mark_labels;
542d6675 162};
800eeca4 163
549f748d 164/* This is the endianness of the current section. */
800eeca4
JW		 165extern int target_big_endian;
166
549f748d
JW		 167/* This is the default endianness. */
168static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
169
10a98291
L		 170void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
171
172static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE *, int));
174static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE *, int));
176static void (*ia64_float_to_chars)
177 PARAMS ((char *, LITTLENUM_TYPE *, int));
178
35f5df7f
L		 179static struct hash_control *alias_hash;
180static struct hash_control *alias_name_hash;
181static struct hash_control *secalias_hash;
182static struct hash_control *secalias_name_hash;
183
2fac3d48
JB		 184/* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186const char ia64_symbol_chars[] = "@?";
187
800eeca4
JW		 188/* Characters which always start a comment. */
189const char comment_chars[] = "";
190
191/* Characters which start a comment at the beginning of a line. */
192const char line_comment_chars[] = "#";
193
194/* Characters which may be used to separate multiple commands on a
195 single line. */
e4e8248d 196const char line_separator_chars[] = ";{}";
800eeca4
JW		 197
198/* Characters which are used to indicate an exponent in a floating
199 point number. */
200const char EXP_CHARS[] = "eE";
201
202/* Characters which mean that a number is a floating point constant,
203 as in 0d1.0. */
204const char FLT_CHARS[] = "rRsSfFdDxXpP";
205
542d6675 206/* ia64-specific option processing: */
800eeca4 207
44f5c83a 208const char *md_shortopts = "m:N:x::";
800eeca4
JW		 209
210struct option md_longopts[] =
211 {
c43c2cc5
JW		 212#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
214#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 216 };
217
218size_t md_longopts_size = sizeof (md_longopts);
219
220static struct
221 {
222 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
223 struct hash_control *reg_hash; /* register name hash table */
224 struct hash_control *dynreg_hash; /* dynamic register hash table */
225 struct hash_control *const_hash; /* constant hash table */
226 struct hash_control *entry_hash; /* code entry hint hash table */
227
800eeca4
JW		 228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
230 that are predicatable. */
231 expressionS qp;
232
8c2fda1d
L		 233 /* Optimize for which CPU. */
234 enum
235 {
236 itanium1,
237 itanium2
238 } tune;
239
91d777ee
L		 240 /* What to do when hint.b is used. */
241 enum
242 {
243 hint_b_error,
244 hint_b_warning,
245 hint_b_ok
246 } hint_b;
247
800eeca4 248 unsigned int
197865e8 249 manual_bundling : 1,
800eeca4
JW		 250 debug_dv: 1,
251 detect_dv: 1,
252 explicit_mode : 1, /* which mode we're in */
253 default_explicit_mode : 1, /* which mode is the default */
254 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 255 auto_align : 1,
256 keep_pending_output : 1;
800eeca4 257
970d6792
L		 258 /* What to do when something is wrong with unwind directives. */
259 enum
260 {
261 unwind_check_warning,
262 unwind_check_error
263 } unwind_check;
264
800eeca4
JW		 265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
197865e8 267 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 268 int curr_slot;
269 int num_slots_in_use;
270 struct slot
271 {
272 unsigned int
273 end_of_insn_group : 1,
274 manual_bundling_on : 1,
196e8040
JW		 275 manual_bundling_off : 1,
276 loc_directive_seen : 1;
800eeca4
JW		 277 signed char user_template; /* user-selected template, if any */
278 unsigned char qp_regno; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
282 int num_fixups;
283 struct insn_fix
284 {
285 bfd_reloc_code_real_type code;
286 enum ia64_opnd opnd; /* type of operand in need of fix */
287 unsigned int is_pcrel : 1; /* is operand pc-relative? */
288 expressionS expr; /* the value to be inserted */
289 }
290 fixup[2]; /* at most two fixups per insn */
291 struct ia64_opcode *idesc;
292 struct label_fix *label_fixups;
f1bcba5b 293 struct label_fix *tag_fixups;
800eeca4
JW		 294 struct unw_rec_list *unwind_record; /* Unwind directive. */
295 expressionS opnd[6];
296 char *src_file;
297 unsigned int src_line;
298 struct dwarf2_line_info debug_line;
299 }
300 slot[NUM_SLOTS];
301
302 segT last_text_seg;
303
304 struct dynreg
305 {
306 struct dynreg *next; /* next dynamic register */
307 const char *name;
308 unsigned short base; /* the base register number */
309 unsigned short num_regs; /* # of registers in this set */
310 }
311 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
312
313 flagword flags; /* ELF-header flags */
314
315 struct mem_offset {
316 unsigned hint:1; /* is this hint currently valid? */
317 bfd_vma offset; /* mem.offset offset */
318 bfd_vma base; /* mem.offset base */
319 } mem_offset;
320
321 int path; /* number of alt. entry points seen */
322 const char **entry_labels; /* labels of all alternate paths in
542d6675 323 the current DV-checking block. */
800eeca4 324 int maxpaths; /* size currently allocated for
542d6675 325 entry_labels */
557debba
JW		 326
327 int pointer_size; /* size in bytes of a pointer */
328 int pointer_size_shift; /* shift size of a pointer for alignment */
8b84be9d
JB		 329
330 symbolS *indregsym[IND_RR - IND_CPUID + 1];
800eeca4
JW		 331 }
332md;
333
f6fe78d6
JW		 334/* These are not const, because they are modified to MMI for non-itanium1
335 targets below. */
336/* MFI bundle of nops. */
337static unsigned char le_nop[16] =
338{
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
341};
342/* MFI bundle of nops with stop-bit. */
343static unsigned char le_nop_stop[16] =
344{
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
347};
348
542d6675 349/* application registers: */
800eeca4 350
e0c9811a
JW		 351#define AR_K0 0
352#define AR_K7 7
353#define AR_RSC 16
354#define AR_BSP 17
355#define AR_BSPSTORE 18
356#define AR_RNAT 19
357#define AR_UNAT 36
358#define AR_FPSR 40
359#define AR_ITC 44
360#define AR_PFS 64
361#define AR_LC 65
800eeca4
JW		 362
363static const struct
364 {
365 const char *name;
8b84be9d 366 unsigned int regnum;
800eeca4
JW		 367 }
368ar[] =
369 {
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 381 {"ar.ec", 66},
800eeca4
JW		 382 };
383
384#define CR_IPSR 16
385#define CR_ISR 17
386#define CR_IIP 19
387#define CR_IFA 20
388#define CR_ITIR 21
389#define CR_IIPA 22
390#define CR_IFS 23
391#define CR_IIM 24
392#define CR_IHA 25
393#define CR_IVR 65
394#define CR_TPR 66
395#define CR_EOI 67
396#define CR_IRR0 68
397#define CR_IRR3 71
398#define CR_LRR0 80
399#define CR_LRR1 81
400
542d6675 401/* control registers: */
800eeca4
JW		 402static const struct
403 {
404 const char *name;
8b84be9d 405 unsigned int regnum;
800eeca4
JW		 406 }
407cr[] =
408 {
409 {"cr.dcr", 0},
410 {"cr.itm", 1},
411 {"cr.iva", 2},
412 {"cr.pta", 8},
413 {"cr.gpta", 9},
414 {"cr.ipsr", 16},
415 {"cr.isr", 17},
416 {"cr.iip", 19},
417 {"cr.ifa", 20},
418 {"cr.itir", 21},
419 {"cr.iipa", 22},
420 {"cr.ifs", 23},
421 {"cr.iim", 24},
422 {"cr.iha", 25},
423 {"cr.lid", 64},
424 {"cr.ivr", 65},
425 {"cr.tpr", 66},
426 {"cr.eoi", 67},
427 {"cr.irr0", 68},
428 {"cr.irr1", 69},
429 {"cr.irr2", 70},
430 {"cr.irr3", 71},
431 {"cr.itv", 72},
432 {"cr.pmv", 73},
433 {"cr.cmcv", 74},
434 {"cr.lrr0", 80},
435 {"cr.lrr1", 81}
436 };
437
438#define PSR_MFL 4
439#define PSR_IC 13
440#define PSR_DFL 18
441#define PSR_CPL 32
442
443static const struct const_desc
444 {
445 const char *name;
446 valueT value;
447 }
448const_bits[] =
449 {
542d6675 450 /* PSR constant masks: */
800eeca4
JW		 451
452 /* 0: reserved */
453 {"psr.be", ((valueT) 1) << 1},
454 {"psr.up", ((valueT) 1) << 2},
455 {"psr.ac", ((valueT) 1) << 3},
456 {"psr.mfl", ((valueT) 1) << 4},
457 {"psr.mfh", ((valueT) 1) << 5},
458 /* 6-12: reserved */
459 {"psr.ic", ((valueT) 1) << 13},
460 {"psr.i", ((valueT) 1) << 14},
461 {"psr.pk", ((valueT) 1) << 15},
462 /* 16: reserved */
463 {"psr.dt", ((valueT) 1) << 17},
464 {"psr.dfl", ((valueT) 1) << 18},
465 {"psr.dfh", ((valueT) 1) << 19},
466 {"psr.sp", ((valueT) 1) << 20},
467 {"psr.pp", ((valueT) 1) << 21},
468 {"psr.di", ((valueT) 1) << 22},
469 {"psr.si", ((valueT) 1) << 23},
470 {"psr.db", ((valueT) 1) << 24},
471 {"psr.lp", ((valueT) 1) << 25},
472 {"psr.tb", ((valueT) 1) << 26},
473 {"psr.rt", ((valueT) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT) 1) << 34},
477 {"psr.mc", ((valueT) 1) << 35},
478 {"psr.it", ((valueT) 1) << 36},
479 {"psr.id", ((valueT) 1) << 37},
480 {"psr.da", ((valueT) 1) << 38},
481 {"psr.dd", ((valueT) 1) << 39},
482 {"psr.ss", ((valueT) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT) 1) << 43},
485 {"psr.bn", ((valueT) 1) << 44},
486 };
487
542d6675 488/* indirect register-sets/memory: */
800eeca4
JW		 489
490static const struct
491 {
492 const char *name;
8b84be9d 493 unsigned int regnum;
800eeca4
JW		 494 }
495indirect_reg[] =
496 {
497 { "CPUID", IND_CPUID },
498 { "cpuid", IND_CPUID },
499 { "dbr", IND_DBR },
500 { "dtr", IND_DTR },
501 { "itr", IND_ITR },
502 { "ibr", IND_IBR },
503 { "msr", IND_MSR },
504 { "pkr", IND_PKR },
505 { "pmc", IND_PMC },
506 { "pmd", IND_PMD },
507 { "rr", IND_RR },
508 };
509
510/* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
512static struct
513 {
514 const char *name;
515 enum pseudo_type
516 {
517 PSEUDO_FUNC_NONE,
518 PSEUDO_FUNC_RELOC,
519 PSEUDO_FUNC_CONST,
e0c9811a 520 PSEUDO_FUNC_REG,
800eeca4
JW		 521 PSEUDO_FUNC_FLOAT
522 }
523 type;
524 union
525 {
526 unsigned long ival;
527 symbolS *sym;
528 }
529 u;
530 }
531pseudo_func[] =
532 {
542d6675 533 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 534 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 536 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 539 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 540 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 544 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 545 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 546 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 550 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 551
542d6675 552 /* mbtype4 constants: */
800eeca4
JW		 553 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
558
542d6675 559 /* fclass constants: */
bf3ca999 560 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 561 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 569
570 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 571
c10d9d8f
JW		 572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
574
542d6675 575 /* unwind-related constants: */
041340ad
JW		 576 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
577 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
578 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
580 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
581 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
582 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 583
542d6675 584 /* unwind-related registers: */
e0c9811a 585 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 586 };
587
542d6675 588/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 589static const bfd_vma nop[IA64_NUM_UNITS] =
590 {
591 0x0000000000LL, /* NIL => break 0 */
592 0x0008000000LL, /* I-unit nop */
593 0x0008000000LL, /* M-unit nop */
594 0x4000000000LL, /* B-unit nop */
595 0x0008000000LL, /* F-unit nop */
5d5e6db9 596 0x0000000000LL, /* L-"unit" nop immediate */
800eeca4
JW		 597 0x0008000000LL, /* X-unit nop */
598 };
599
600/* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602static char special_section_name[][20] =
603 {
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
800eeca4
JW		 607 };
608
609/* The best template for a particular sequence of up to three
610 instructions: */
611#define N IA64_NUM_TYPES
612static unsigned char best_template[N][N][N];
613#undef N
614
615/* Resource dependencies currently in effect */
616static struct rsrc {
617 int depind; /* dependency index */
618 const struct ia64_dependency *dependency; /* actual dependency */
619 unsigned specific:1, /* is this a specific bit/regno? */
620 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
621 int index; /* specific regno/bit within dependency */
622 int note; /* optional qualifying note (0 if none) */
623#define STATE_NONE 0
624#define STATE_STOP 1
625#define STATE_SRLZ 2
626 int insn_srlz; /* current insn serialization state */
627 int data_srlz; /* current data serialization state */
628 int qp_regno; /* qualifying predicate for this usage */
629 char *file; /* what file marked this dependency */
2434f565 630 unsigned int line; /* what line marked this dependency */
800eeca4 631 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 632 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 633 int path; /* corresponding code entry index */
634} *regdeps = NULL;
635static int regdepslen = 0;
636static int regdepstotlen = 0;
637static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
638static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 639 "data", "instr", "specific", "stop", "other" };
7484b8e6 640static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 641
642/* Current state of PR mutexation */
643static struct qpmutex {
644 valueT prmask;
645 int path;
646} *qp_mutexes = NULL; /* QP mutex bitmasks */
647static int qp_mutexeslen = 0;
648static int qp_mutexestotlen = 0;
197865e8 649static valueT qp_safe_across_calls = 0;
800eeca4
JW		 650
651/* Current state of PR implications */
652static struct qp_imply {
653 unsigned p1:6;
654 unsigned p2:6;
655 unsigned p2_branched:1;
656 int path;
657} *qp_implies = NULL;
658static int qp_implieslen = 0;
659static int qp_impliestotlen = 0;
660
197865e8
KH		 661/* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
800eeca4
JW		 663static struct gr {
664 unsigned known:1;
665 int path;
666 valueT value;
a66d2bb7
JB		 667} gr_values[128] = {
668 {
669 1,
670#ifdef INT_MAX
671 INT_MAX,
672#else
673 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
674#endif
675 0
676 }
677};
800eeca4 678
9545c4ce
L		 679/* Remember the alignment frag. */
680static fragS *align_frag;
681
800eeca4
JW		 682/* These are the routines required to output the various types of
683 unwind records. */
684
f5a30c2e
JW		 685/* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
693
800eeca4
JW		 694typedef struct unw_rec_list {
695 unwind_record r;
e0c9811a 696 unsigned long slot_number;
f5a30c2e 697 fragS *slot_frag;
800eeca4
JW		 698 struct unw_rec_list *next;
699} unw_rec_list;
700
2434f565 701#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 702
6290819d
NC		 703/* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705typedef struct label_prologue_count
706{
707 struct label_prologue_count *next;
708 unsigned long label_number;
709 unsigned int prologue_count;
710} label_prologue_count;
711
5656b6b8
JB		 712typedef struct proc_pending
713{
714 symbolS *sym;
715 struct proc_pending *next;
716} proc_pending;
717
e0c9811a
JW		 718static struct
719{
e0c9811a
JW		 720 /* Maintain a list of unwind entries for the current function. */
721 unw_rec_list *list;
722 unw_rec_list *tail;
800eeca4 723
e0c9811a
JW		 724 /* Any unwind entires that should be attached to the current slot
725 that an insn is being constructed for. */
726 unw_rec_list *current_entry;
800eeca4 727
e0c9811a 728 /* These are used to create the unwind table entry for this function. */
5656b6b8 729 proc_pending proc_pending;
e0c9811a
JW		 730 symbolS *info; /* pointer to unwind info */
731 symbolS *personality_routine;
91a2ae2a
RH		 732 segT saved_text_seg;
733 subsegT saved_text_subseg;
734 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 735
e0c9811a 736 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 737 unsigned int prologue : 1;
738 unsigned int prologue_mask : 4;
e4e8248d 739 unsigned int prologue_gr : 7;
75e09913
JB		 740 unsigned int body : 1;
741 unsigned int insn : 1;
33d01f33 742 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 743 /* Prologue counts at previous .label_state directives. */
744 struct label_prologue_count * saved_prologue_counts;
ba825241
JB		 745
746 /* List of split up .save-s. */
747 unw_p_record *pending_saves;
e0c9811a 748} unwind;
800eeca4 749
9f9a069e
JW		 750/* The input value is a negated offset from psp, and specifies an address
751 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
752 must add 16 and divide by 4 to get the encoded value. */
753
754#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
755
800eeca4
JW		 756typedef void (*vbyte_func) PARAMS ((int, char *, char *));
757
0234cb7c 758/* Forward declarations: */
800eeca4
JW		 759static void set_section PARAMS ((char *name));
760static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
761 unsigned int, unsigned int));
d9201763 762static void dot_align (int);
800eeca4
JW		 763static void dot_radix PARAMS ((int));
764static void dot_special_section PARAMS ((int));
765static void dot_proc PARAMS ((int));
766static void dot_fframe PARAMS ((int));
767static void dot_vframe PARAMS ((int));
150f24a2 768static void dot_vframesp PARAMS ((int));
800eeca4
JW		 769static void dot_save PARAMS ((int));
770static void dot_restore PARAMS ((int));
150f24a2 771static void dot_restorereg PARAMS ((int));
800eeca4
JW		 772static void dot_handlerdata PARAMS ((int));
773static void dot_unwentry PARAMS ((int));
774static void dot_altrp PARAMS ((int));
e0c9811a 775static void dot_savemem PARAMS ((int));
800eeca4
JW		 776static void dot_saveg PARAMS ((int));
777static void dot_savef PARAMS ((int));
778static void dot_saveb PARAMS ((int));
779static void dot_savegf PARAMS ((int));
780static void dot_spill PARAMS ((int));
150f24a2
JW		 781static void dot_spillreg PARAMS ((int));
782static void dot_spillmem PARAMS ((int));
150f24a2
JW		 783static void dot_label_state PARAMS ((int));
784static void dot_copy_state PARAMS ((int));
800eeca4
JW		 785static void dot_unwabi PARAMS ((int));
786static void dot_personality PARAMS ((int));
787static void dot_body PARAMS ((int));
788static void dot_prologue PARAMS ((int));
789static void dot_endp PARAMS ((int));
790static void dot_template PARAMS ((int));
791static void dot_regstk PARAMS ((int));
792static void dot_rot PARAMS ((int));
793static void dot_byteorder PARAMS ((int));
794static void dot_psr PARAMS ((int));
795static void dot_alias PARAMS ((int));
796static void dot_ln PARAMS ((int));
ef6a2b41 797static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 798static void dot_xdata PARAMS ((int));
799static void stmt_float_cons PARAMS ((int));
800static void stmt_cons_ua PARAMS ((int));
801static void dot_xfloat_cons PARAMS ((int));
802static void dot_xstringer PARAMS ((int));
803static void dot_xdata_ua PARAMS ((int));
804static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 805static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 806static void dot_pred_rel PARAMS ((int));
807static void dot_reg_val PARAMS ((int));
5e819f9c 808static void dot_serialize PARAMS ((int));
800eeca4
JW		 809static void dot_dv_mode PARAMS ((int));
810static void dot_entry PARAMS ((int));
811static void dot_mem_offset PARAMS ((int));
e4e8248d 812static void add_unwind_entry PARAMS((unw_rec_list *, int));
8b84be9d
JB		 813static symbolS *declare_register PARAMS ((const char *name, unsigned int regnum));
814static void declare_register_set PARAMS ((const char *, unsigned int, unsigned int));
800eeca4 815static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 816static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
817 int index,
818 expressionS *e));
e4e8248d 819static int parse_operand PARAMS ((expressionS *, int));
800eeca4
JW		 820static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
821static void build_insn PARAMS ((struct slot *, bfd_vma *));
822static void emit_one_bundle PARAMS ((void));
823static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 824static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 825 bfd_reloc_code_real_type r_type));
826static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 827static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
828 struct rsrc *, int depind, int path));
800eeca4
JW		 829static void add_qp_mutex PARAMS((valueT mask));
830static void add_qp_imply PARAMS((int p1, int p2));
831static void clear_qp_branch_flag PARAMS((valueT mask));
832static void clear_qp_mutex PARAMS((valueT mask));
833static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 834static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 835static void clear_register_values PARAMS ((void));
836static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 837static void instruction_serialization PARAMS ((void));
838static void data_serialization PARAMS ((void));
839static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 840static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 841static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 842static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 843static int depends_on PARAMS ((int, struct ia64_opcode *));
844static int specify_resource PARAMS ((const struct ia64_dependency *,
845 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 846static int check_dv PARAMS((struct ia64_opcode *idesc));
847static void check_dependencies PARAMS((struct ia64_opcode *));
848static void mark_resources PARAMS((struct ia64_opcode *));
849static void update_dependencies PARAMS((struct ia64_opcode *));
850static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 851static int qp_mutex PARAMS ((int, int, int));
852static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
853static void output_vbyte_mem PARAMS ((int, char *, char *));
854static void count_output PARAMS ((int, char *, char *));
855static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
856static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 857static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 858static void output_P1_format PARAMS ((vbyte_func, int));
859static void output_P2_format PARAMS ((vbyte_func, int, int));
860static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
861static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
862static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
863static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
864static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
865static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
866static void output_P9_format PARAMS ((vbyte_func, int, int));
867static void output_P10_format PARAMS ((vbyte_func, int, int));
868static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
869static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 870static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
871static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 872static char format_ab_reg PARAMS ((int, int));
873static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
874 unsigned long));
875static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
876static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
877 unsigned long));
878static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 879static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 880static unw_rec_list *output_prologue PARAMS ((void));
881static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
882static unw_rec_list *output_body PARAMS ((void));
883static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
884static unw_rec_list *output_mem_stack_v PARAMS ((void));
885static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
886static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
887static unw_rec_list *output_rp_when PARAMS ((void));
888static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
889static unw_rec_list *output_rp_br PARAMS ((unsigned int));
890static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
891static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
892static unw_rec_list *output_pfs_when PARAMS ((void));
893static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
894static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
895static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
896static unw_rec_list *output_preds_when PARAMS ((void));
897static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
898static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
899static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
900static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
901static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
902static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
903static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
904static unw_rec_list *output_br_mem PARAMS ((unsigned int));
905static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
906static unw_rec_list *output_spill_base PARAMS ((unsigned int));
907static unw_rec_list *output_unat_when PARAMS ((void));
908static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
909static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
910static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
911static unw_rec_list *output_lc_when PARAMS ((void));
912static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
913static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
914static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
915static unw_rec_list *output_fpsr_when PARAMS ((void));
916static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
917static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
918static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
919static unw_rec_list *output_priunat_when_gr PARAMS ((void));
920static unw_rec_list *output_priunat_when_mem PARAMS ((void));
921static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
922static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
923static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
924static unw_rec_list *output_bsp_when PARAMS ((void));
925static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
926static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
927static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
928static unw_rec_list *output_bspstore_when PARAMS ((void));
929static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
930static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
931static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
932static unw_rec_list *output_rnat_when PARAMS ((void));
933static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
934static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
935static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
936static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
937static unw_rec_list *output_epilogue PARAMS ((unsigned long));
938static unw_rec_list *output_label_state PARAMS ((unsigned long));
939static unw_rec_list *output_copy_state PARAMS ((unsigned long));
e4e8248d 940static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2 941 unsigned int));
e4e8248d 942static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 943 unsigned int));
944static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 945 unsigned int, unsigned int));
946static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
947static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
948static int calc_record_size PARAMS ((unw_rec_list *));
949static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 950static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 951 unsigned long, fragS *,
952 int));
91a2ae2a 953static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 954static void fixup_unw_records PARAMS ((unw_rec_list *, int));
e4e8248d
JB		 955static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *));
956static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
957static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
6290819d
NC		 958static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
959static void save_prologue_count PARAMS ((unsigned long, unsigned int));
960static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 961
652ca075 962/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 963 unit (as opposed to the memory unit). */
964static int
652ca075 965ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 966{
967 reg -= REG_AR;
652ca075
L		 968 return reg >= 64 && reg <= 111;
969}
800eeca4 970
652ca075
L		 971/* Determine if application register REGNUM resides only in the memory
972 unit (as opposed to the integer unit). */
973static int
974ar_is_only_in_memory_unit (int reg)
975{
976 reg -= REG_AR;
977 return reg >= 0 && reg <= 47;
800eeca4
JW		 978}
979
980/* Switch to section NAME and create section if necessary. It's
981 rather ugly that we have to manipulate input_line_pointer but I
982 don't see any other way to accomplish the same thing without
983 changing obj-elf.c (which may be the Right Thing, in the end). */
984static void
985set_section (name)
986 char *name;
987{
988 char *saved_input_line_pointer;
989
990 saved_input_line_pointer = input_line_pointer;
991 input_line_pointer = name;
992 obj_elf_section (0);
993 input_line_pointer = saved_input_line_pointer;
994}
995
d61a78a7
RH		 996/* Map 's' to SHF_IA_64_SHORT. */
997
998int
999ia64_elf_section_letter (letter, ptr_msg)
1000 int letter;
1001 char **ptr_msg;
1002{
1003 if (letter == 's')
1004 return SHF_IA_64_SHORT;
711ef82f
L		 1005 else if (letter == 'o')
1006 return SHF_LINK_ORDER;
d61a78a7 1007
711ef82f
L		 1008 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1009 return -1;
d61a78a7
RH		 1010}
1011
800eeca4
JW		 1012/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1013
1014flagword
1015ia64_elf_section_flags (flags, attr, type)
1016 flagword flags;
2434f565 1017 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 1018{
1019 if (attr & SHF_IA_64_SHORT)
1020 flags |= SEC_SMALL_DATA;
1021 return flags;
1022}
1023
91a2ae2a
RH		 1024int
1025ia64_elf_section_type (str, len)
40449e9f
KH		 1026 const char *str;
1027 size_t len;
91a2ae2a 1028{
1cd8ff38 1029#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1030
1cd8ff38 1031 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1032 return SHT_PROGBITS;
1033
1cd8ff38 1034 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1035 return SHT_PROGBITS;
1036
1cd8ff38 1037 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1038 return SHT_IA_64_UNWIND;
1039
1cd8ff38 1040 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1041 return SHT_IA_64_UNWIND;
1042
711ef82f
L		 1043 if (STREQ ("unwind"))
1044 return SHT_IA_64_UNWIND;
1045
91a2ae2a 1046 return -1;
1cd8ff38 1047#undef STREQ
91a2ae2a
RH		 1048}
1049
800eeca4
JW		 1050static unsigned int
1051set_regstack (ins, locs, outs, rots)
1052 unsigned int ins, locs, outs, rots;
1053{
542d6675
KH		 1054 /* Size of frame. */
1055 unsigned int sof;
800eeca4
JW		 1056
1057 sof = ins + locs + outs;
1058 if (sof > 96)
1059 {
1060 as_bad ("Size of frame exceeds maximum of 96 registers");
1061 return 0;
1062 }
1063 if (rots > sof)
1064 {
1065 as_warn ("Size of rotating registers exceeds frame size");
1066 return 0;
1067 }
1068 md.in.base = REG_GR + 32;
1069 md.loc.base = md.in.base + ins;
1070 md.out.base = md.loc.base + locs;
1071
1072 md.in.num_regs = ins;
1073 md.loc.num_regs = locs;
1074 md.out.num_regs = outs;
1075 md.rot.num_regs = rots;
1076 return sof;
1077}
1078
1079void
1080ia64_flush_insns ()
1081{
1082 struct label_fix *lfix;
1083 segT saved_seg;
1084 subsegT saved_subseg;
b44b1b85 1085 unw_rec_list *ptr;
07a53e5c 1086 bfd_boolean mark;
800eeca4
JW		 1087
1088 if (!md.last_text_seg)
1089 return;
1090
1091 saved_seg = now_seg;
1092 saved_subseg = now_subseg;
1093
1094 subseg_set (md.last_text_seg, 0);
1095
1096 while (md.num_slots_in_use > 0)
1097 emit_one_bundle (); /* force out queued instructions */
1098
1099 /* In case there are labels following the last instruction, resolve
07a53e5c
RH		 1100 those now. */
1101 mark = FALSE;
800eeca4
JW		 1102 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1103 {
07a53e5c
RH		 1104 symbol_set_value_now (lfix->sym);
1105 mark |= lfix->dw2_mark_labels;
800eeca4 1106 }
07a53e5c 1107 if (mark)
f1bcba5b 1108 {
07a53e5c
RH		 1109 dwarf2_where (&CURR_SLOT.debug_line);
1110 CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
1111 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line);
f1bcba5b 1112 }
07a53e5c
RH		 1113 CURR_SLOT.label_fixups = 0;
1114
1115 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1116 symbol_set_value_now (lfix->sym);
f1bcba5b 1117 CURR_SLOT.tag_fixups = 0;
800eeca4 1118
b44b1b85 1119 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1120 resolve those now. We only handle prologue, body, and endp directives
1121 here. Give an error for others. */
b44b1b85
JW		 1122 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1123 {
9c59842f 1124 switch (ptr->r.type)
b44b1b85 1125 {
9c59842f
JW		 1126 case prologue:
1127 case prologue_gr:
1128 case body:
1129 case endp:
b44b1b85
JW		 1130 ptr->slot_number = (unsigned long) frag_more (0);
1131 ptr->slot_frag = frag_now;
9c59842f
JW		 1132 break;
1133
1134 /* Allow any record which doesn't have a "t" field (i.e.,
1135 doesn't relate to a particular instruction). */
1136 case unwabi:
1137 case br_gr:
1138 case copy_state:
1139 case fr_mem:
1140 case frgr_mem:
1141 case gr_gr:
1142 case gr_mem:
1143 case label_state:
1144 case rp_br:
1145 case spill_base:
1146 case spill_mask:
1147 /* nothing */
1148 break;
1149
1150 default:
1151 as_bad (_("Unwind directive not followed by an instruction."));
1152 break;
b44b1b85 1153 }
b44b1b85
JW		 1154 }
1155 unwind.current_entry = NULL;
1156
800eeca4 1157 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1158
1159 if (md.qp.X_op == O_register)
1160 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1161}
1162
d9201763
L		 1163static void
1164ia64_do_align (int nbytes)
800eeca4
JW		 1165{
1166 char *saved_input_line_pointer = input_line_pointer;
1167
1168 input_line_pointer = "";
1169 s_align_bytes (nbytes);
1170 input_line_pointer = saved_input_line_pointer;
1171}
1172
1173void
1174ia64_cons_align (nbytes)
1175 int nbytes;
1176{
1177 if (md.auto_align)
1178 {
1179 char *saved_input_line_pointer = input_line_pointer;
1180 input_line_pointer = "";
1181 s_align_bytes (nbytes);
1182 input_line_pointer = saved_input_line_pointer;
1183 }
1184}
1185
1186/* Output COUNT bytes to a memory location. */
2132e3a3 1187static char *vbyte_mem_ptr = NULL;
800eeca4 1188
197865e8 1189void
800eeca4
JW		 1190output_vbyte_mem (count, ptr, comment)
1191 int count;
1192 char *ptr;
2434f565 1193 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1194{
1195 int x;
1196 if (vbyte_mem_ptr == NULL)
1197 abort ();
1198
1199 if (count == 0)
1200 return;
1201 for (x = 0; x < count; x++)
1202 *(vbyte_mem_ptr++) = ptr[x];
1203}
1204
1205/* Count the number of bytes required for records. */
1206static int vbyte_count = 0;
197865e8 1207void
800eeca4
JW		 1208count_output (count, ptr, comment)
1209 int count;
2434f565
JW		 1210 char *ptr ATTRIBUTE_UNUSED;
1211 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1212{
1213 vbyte_count += count;
1214}
1215
1216static void
1217output_R1_format (f, rtype, rlen)
1218 vbyte_func f;
1219 unw_record_type rtype;
1220 int rlen;
1221{
e0c9811a 1222 int r = 0;
800eeca4
JW		 1223 char byte;
1224 if (rlen > 0x1f)
1225 {
1226 output_R3_format (f, rtype, rlen);
1227 return;
1228 }
197865e8 1229
e0c9811a
JW		 1230 if (rtype == body)
1231 r = 1;
1232 else if (rtype != prologue)
1233 as_bad ("record type is not valid");
1234
800eeca4
JW		 1235 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1236 (*f) (1, &byte, NULL);
1237}
1238
1239static void
1240output_R2_format (f, mask, grsave, rlen)
1241 vbyte_func f;
1242 int mask, grsave;
1243 unsigned long rlen;
1244{
1245 char bytes[20];
1246 int count = 2;
1247 mask = (mask & 0x0f);
1248 grsave = (grsave & 0x7f);
1249
1250 bytes[0] = (UNW_R2 | (mask >> 1));
1251 bytes[1] = (((mask & 0x01) << 7) | grsave);
1252 count += output_leb128 (bytes + 2, rlen, 0);
1253 (*f) (count, bytes, NULL);
1254}
1255
1256static void
1257output_R3_format (f, rtype, rlen)
1258 vbyte_func f;
1259 unw_record_type rtype;
1260 unsigned long rlen;
1261{
e0c9811a 1262 int r = 0, count;
800eeca4
JW		 1263 char bytes[20];
1264 if (rlen <= 0x1f)
1265 {
1266 output_R1_format (f, rtype, rlen);
1267 return;
1268 }
197865e8 1269
e0c9811a
JW		 1270 if (rtype == body)
1271 r = 1;
1272 else if (rtype != prologue)
1273 as_bad ("record type is not valid");
800eeca4
JW		 1274 bytes[0] = (UNW_R3 | r);
1275 count = output_leb128 (bytes + 1, rlen, 0);
1276 (*f) (count + 1, bytes, NULL);
1277}
1278
1279static void
1280output_P1_format (f, brmask)
1281 vbyte_func f;
1282 int brmask;
1283{
1284 char byte;
1285 byte = UNW_P1 | (brmask & 0x1f);
1286 (*f) (1, &byte, NULL);
1287}
1288
1289static void
1290output_P2_format (f, brmask, gr)
1291 vbyte_func f;
1292 int brmask;
1293 int gr;
1294{
1295 char bytes[2];
1296 brmask = (brmask & 0x1f);
1297 bytes[0] = UNW_P2 | (brmask >> 1);
1298 bytes[1] = (((brmask & 1) << 7) | gr);
1299 (*f) (2, bytes, NULL);
1300}
1301
1302static void
1303output_P3_format (f, rtype, reg)
1304 vbyte_func f;
1305 unw_record_type rtype;
1306 int reg;
1307{
1308 char bytes[2];
e0c9811a 1309 int r = 0;
800eeca4
JW		 1310 reg = (reg & 0x7f);
1311 switch (rtype)
542d6675 1312 {
800eeca4
JW		 1313 case psp_gr:
1314 r = 0;
1315 break;
1316 case rp_gr:
1317 r = 1;
1318 break;
1319 case pfs_gr:
1320 r = 2;
1321 break;
1322 case preds_gr:
1323 r = 3;
1324 break;
1325 case unat_gr:
1326 r = 4;
1327 break;
1328 case lc_gr:
1329 r = 5;
1330 break;
1331 case rp_br:
1332 r = 6;
1333 break;
1334 case rnat_gr:
1335 r = 7;
1336 break;
1337 case bsp_gr:
1338 r = 8;
1339 break;
1340 case bspstore_gr:
1341 r = 9;
1342 break;
1343 case fpsr_gr:
1344 r = 10;
1345 break;
1346 case priunat_gr:
1347 r = 11;
1348 break;
1349 default:
1350 as_bad ("Invalid record type for P3 format.");
542d6675 1351 }
800eeca4
JW		 1352 bytes[0] = (UNW_P3 | (r >> 1));
1353 bytes[1] = (((r & 1) << 7) | reg);
1354 (*f) (2, bytes, NULL);
1355}
1356
800eeca4 1357static void
e0c9811a 1358output_P4_format (f, imask, imask_size)
800eeca4 1359 vbyte_func f;
e0c9811a
JW		 1360 unsigned char *imask;
1361 unsigned long imask_size;
800eeca4 1362{
e0c9811a 1363 imask[0] = UNW_P4;
2132e3a3 1364 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1365}
1366
1367static void
1368output_P5_format (f, grmask, frmask)
1369 vbyte_func f;
1370 int grmask;
1371 unsigned long frmask;
1372{
1373 char bytes[4];
1374 grmask = (grmask & 0x0f);
1375
1376 bytes[0] = UNW_P5;
1377 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1378 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1379 bytes[3] = (frmask & 0x000000ff);
1380 (*f) (4, bytes, NULL);
1381}
1382
1383static void
1384output_P6_format (f, rtype, rmask)
1385 vbyte_func f;
1386 unw_record_type rtype;
1387 int rmask;
1388{
1389 char byte;
e0c9811a 1390 int r = 0;
197865e8 1391
e0c9811a
JW		 1392 if (rtype == gr_mem)
1393 r = 1;
1394 else if (rtype != fr_mem)
1395 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1396 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1397 (*f) (1, &byte, NULL);
1398}
1399
1400static void
1401output_P7_format (f, rtype, w1, w2)
1402 vbyte_func f;
1403 unw_record_type rtype;
1404 unsigned long w1;
1405 unsigned long w2;
1406{
1407 char bytes[20];
1408 int count = 1;
e0c9811a 1409 int r = 0;
800eeca4
JW		 1410 count += output_leb128 (bytes + 1, w1, 0);
1411 switch (rtype)
1412 {
542d6675
KH		 1413 case mem_stack_f:
1414 r = 0;
1415 count += output_leb128 (bytes + count, w2 >> 4, 0);
1416 break;
1417 case mem_stack_v:
1418 r = 1;
1419 break;
1420 case spill_base:
1421 r = 2;
1422 break;
1423 case psp_sprel:
1424 r = 3;
1425 break;
1426 case rp_when:
1427 r = 4;
1428 break;
1429 case rp_psprel:
1430 r = 5;
1431 break;
1432 case pfs_when:
1433 r = 6;
1434 break;
1435 case pfs_psprel:
1436 r = 7;
1437 break;
1438 case preds_when:
1439 r = 8;
1440 break;
1441 case preds_psprel:
1442 r = 9;
1443 break;
1444 case lc_when:
1445 r = 10;
1446 break;
1447 case lc_psprel:
1448 r = 11;
1449 break;
1450 case unat_when:
1451 r = 12;
1452 break;
1453 case unat_psprel:
1454 r = 13;
1455 break;
1456 case fpsr_when:
1457 r = 14;
1458 break;
1459 case fpsr_psprel:
1460 r = 15;
1461 break;
1462 default:
1463 break;
800eeca4
JW		 1464 }
1465 bytes[0] = (UNW_P7 | r);
1466 (*f) (count, bytes, NULL);
1467}
1468
1469static void
1470output_P8_format (f, rtype, t)
1471 vbyte_func f;
1472 unw_record_type rtype;
1473 unsigned long t;
1474{
1475 char bytes[20];
e0c9811a 1476 int r = 0;
800eeca4
JW		 1477 int count = 2;
1478 bytes[0] = UNW_P8;
1479 switch (rtype)
1480 {
542d6675
KH		 1481 case rp_sprel:
1482 r = 1;
1483 break;
1484 case pfs_sprel:
1485 r = 2;
1486 break;
1487 case preds_sprel:
1488 r = 3;
1489 break;
1490 case lc_sprel:
1491 r = 4;
1492 break;
1493 case unat_sprel:
1494 r = 5;
1495 break;
1496 case fpsr_sprel:
1497 r = 6;
1498 break;
1499 case bsp_when:
1500 r = 7;
1501 break;
1502 case bsp_psprel:
1503 r = 8;
1504 break;
1505 case bsp_sprel:
1506 r = 9;
1507 break;
1508 case bspstore_when:
1509 r = 10;
1510 break;
1511 case bspstore_psprel:
1512 r = 11;
1513 break;
1514 case bspstore_sprel:
1515 r = 12;
1516 break;
1517 case rnat_when:
1518 r = 13;
1519 break;
1520 case rnat_psprel:
1521 r = 14;
1522 break;
1523 case rnat_sprel:
1524 r = 15;
1525 break;
1526 case priunat_when_gr:
1527 r = 16;
1528 break;
1529 case priunat_psprel:
1530 r = 17;
1531 break;
1532 case priunat_sprel:
1533 r = 18;
1534 break;
1535 case priunat_when_mem:
1536 r = 19;
1537 break;
1538 default:
1539 break;
800eeca4
JW		 1540 }
1541 bytes[1] = r;
1542 count += output_leb128 (bytes + 2, t, 0);
1543 (*f) (count, bytes, NULL);
1544}
1545
1546static void
1547output_P9_format (f, grmask, gr)
1548 vbyte_func f;
1549 int grmask;
1550 int gr;
1551{
1552 char bytes[3];
1553 bytes[0] = UNW_P9;
1554 bytes[1] = (grmask & 0x0f);
1555 bytes[2] = (gr & 0x7f);
1556 (*f) (3, bytes, NULL);
1557}
1558
1559static void
1560output_P10_format (f, abi, context)
1561 vbyte_func f;
1562 int abi;
1563 int context;
1564{
1565 char bytes[3];
1566 bytes[0] = UNW_P10;
1567 bytes[1] = (abi & 0xff);
1568 bytes[2] = (context & 0xff);
1569 (*f) (3, bytes, NULL);
1570}
1571
1572static void
1573output_B1_format (f, rtype, label)
1574 vbyte_func f;
1575 unw_record_type rtype;
1576 unsigned long label;
1577{
1578 char byte;
e0c9811a 1579 int r = 0;
197865e8 1580 if (label > 0x1f)
800eeca4
JW		 1581 {
1582 output_B4_format (f, rtype, label);
1583 return;
1584 }
e0c9811a
JW		 1585 if (rtype == copy_state)
1586 r = 1;
1587 else if (rtype != label_state)
1588 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1589
1590 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1591 (*f) (1, &byte, NULL);
1592}
1593
1594static void
1595output_B2_format (f, ecount, t)
1596 vbyte_func f;
1597 unsigned long ecount;
1598 unsigned long t;
1599{
1600 char bytes[20];
1601 int count = 1;
1602 if (ecount > 0x1f)
1603 {
1604 output_B3_format (f, ecount, t);
1605 return;
1606 }
1607 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1608 count += output_leb128 (bytes + 1, t, 0);
1609 (*f) (count, bytes, NULL);
1610}
1611
1612static void
1613output_B3_format (f, ecount, t)
1614 vbyte_func f;
1615 unsigned long ecount;
1616 unsigned long t;
1617{
1618 char bytes[20];
1619 int count = 1;
1620 if (ecount <= 0x1f)
1621 {
1622 output_B2_format (f, ecount, t);
1623 return;
1624 }
1625 bytes[0] = UNW_B3;
1626 count += output_leb128 (bytes + 1, t, 0);
1627 count += output_leb128 (bytes + count, ecount, 0);
1628 (*f) (count, bytes, NULL);
1629}
1630
1631static void
1632output_B4_format (f, rtype, label)
1633 vbyte_func f;
1634 unw_record_type rtype;
1635 unsigned long label;
1636{
1637 char bytes[20];
e0c9811a 1638 int r = 0;
800eeca4 1639 int count = 1;
197865e8 1640 if (label <= 0x1f)
800eeca4
JW		 1641 {
1642 output_B1_format (f, rtype, label);
1643 return;
1644 }
197865e8 1645
e0c9811a
JW		 1646 if (rtype == copy_state)
1647 r = 1;
1648 else if (rtype != label_state)
1649 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1650
1651 bytes[0] = (UNW_B4 | (r << 3));
1652 count += output_leb128 (bytes + 1, label, 0);
1653 (*f) (count, bytes, NULL);
1654}
1655
1656static char
e0c9811a 1657format_ab_reg (ab, reg)
542d6675
KH		 1658 int ab;
1659 int reg;
800eeca4
JW		 1660{
1661 int ret;
e0c9811a 1662 ab = (ab & 3);
800eeca4 1663 reg = (reg & 0x1f);
e0c9811a 1664 ret = (ab << 5) | reg;
800eeca4
JW		 1665 return ret;
1666}
1667
1668static void
e0c9811a 1669output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1670 vbyte_func f;
1671 unw_record_type rtype;
e0c9811a 1672 int ab, reg;
800eeca4
JW		 1673 unsigned long t;
1674 unsigned long w1;
1675{
1676 char bytes[20];
e0c9811a 1677 int r = 0;
800eeca4
JW		 1678 int count = 2;
1679 bytes[0] = UNW_X1;
197865e8 1680
e0c9811a
JW		 1681 if (rtype == spill_sprel)
1682 r = 1;
1683 else if (rtype != spill_psprel)
1684 as_bad ("Invalid record type for format X1");
1685 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1686 count += output_leb128 (bytes + 2, t, 0);
1687 count += output_leb128 (bytes + count, w1, 0);
1688 (*f) (count, bytes, NULL);
1689}
1690
1691static void
e0c9811a 1692output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1693 vbyte_func f;
e0c9811a 1694 int ab, reg;
800eeca4
JW		 1695 int x, y, treg;
1696 unsigned long t;
1697{
1698 char bytes[20];
800eeca4
JW		 1699 int count = 3;
1700 bytes[0] = UNW_X2;
e0c9811a 1701 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1702 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1703 count += output_leb128 (bytes + 3, t, 0);
1704 (*f) (count, bytes, NULL);
1705}
1706
1707static void
e0c9811a 1708output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1709 vbyte_func f;
1710 unw_record_type rtype;
1711 int qp;
e0c9811a 1712 int ab, reg;
800eeca4
JW		 1713 unsigned long t;
1714 unsigned long w1;
1715{
1716 char bytes[20];
e0c9811a 1717 int r = 0;
800eeca4 1718 int count = 3;
e0c9811a
JW		 1719 bytes[0] = UNW_X3;
1720
1721 if (rtype == spill_sprel_p)
1722 r = 1;
1723 else if (rtype != spill_psprel_p)
1724 as_bad ("Invalid record type for format X3");
800eeca4 1725 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1726 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1727 count += output_leb128 (bytes + 3, t, 0);
1728 count += output_leb128 (bytes + count, w1, 0);
1729 (*f) (count, bytes, NULL);
1730}
1731
1732static void
e0c9811a 1733output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1734 vbyte_func f;
1735 int qp;
e0c9811a 1736 int ab, reg;
800eeca4
JW		 1737 int x, y, treg;
1738 unsigned long t;
1739{
1740 char bytes[20];
800eeca4 1741 int count = 4;
e0c9811a 1742 bytes[0] = UNW_X4;
800eeca4 1743 bytes[1] = (qp & 0x3f);
e0c9811a 1744 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1745 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1746 count += output_leb128 (bytes + 4, t, 0);
1747 (*f) (count, bytes, NULL);
1748}
1749
ba825241
JB		 1750/* This function checks whether there are any outstanding .save-s and
1751 discards them if so. */
1752
1753static void
1754check_pending_save (void)
1755{
1756 if (unwind.pending_saves)
1757 {
1758 unw_rec_list *cur, *prev;
1759
1760 as_warn ("Previous .save incomplete");
1761 for (cur = unwind.list, prev = NULL; cur; )
1762 if (&cur->r.record.p == unwind.pending_saves)
1763 {
1764 if (prev)
1765 prev->next = cur->next;
1766 else
1767 unwind.list = cur->next;
1768 if (cur == unwind.tail)
1769 unwind.tail = prev;
1770 if (cur == unwind.current_entry)
1771 unwind.current_entry = cur->next;
1772 /* Don't free the first discarded record, it's being used as
1773 terminator for (currently) br_gr and gr_gr processing, and
1774 also prevents leaving a dangling pointer to it in its
1775 predecessor. */
1776 cur->r.record.p.grmask = 0;
1777 cur->r.record.p.brmask = 0;
1778 cur->r.record.p.frmask = 0;
1779 prev = cur->r.record.p.next;
1780 cur->r.record.p.next = NULL;
1781 cur = prev;
1782 break;
1783 }
1784 else
1785 {
1786 prev = cur;
1787 cur = cur->next;
1788 }
1789 while (cur)
1790 {
1791 prev = cur;
1792 cur = cur->r.record.p.next;
1793 free (prev);
1794 }
1795 unwind.pending_saves = NULL;
1796 }
1797}
1798
800eeca4 1799/* This function allocates a record list structure, and initializes fields. */
542d6675 1800
800eeca4 1801static unw_rec_list *
197865e8 1802alloc_record (unw_record_type t)
800eeca4
JW		 1803{
1804 unw_rec_list *ptr;
1805 ptr = xmalloc (sizeof (*ptr));
ba825241 1806 memset (ptr, 0, sizeof (*ptr));
800eeca4
JW		 1807 ptr->slot_number = SLOT_NUM_NOT_SET;
1808 ptr->r.type = t;
1809 return ptr;
1810}
1811
5738bc24
JW		 1812/* Dummy unwind record used for calculating the length of the last prologue or
1813 body region. */
1814
1815static unw_rec_list *
1816output_endp ()
1817{
1818 unw_rec_list *ptr = alloc_record (endp);
1819 return ptr;
1820}
1821
800eeca4
JW		 1822static unw_rec_list *
1823output_prologue ()
1824{
1825 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1826 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1827 return ptr;
1828}
1829
1830static unw_rec_list *
1831output_prologue_gr (saved_mask, reg)
1832 unsigned int saved_mask;
1833 unsigned int reg;
1834{
1835 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1836 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1837 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1838 ptr->r.record.r.grsave = reg;
1839 return ptr;
1840}
1841
1842static unw_rec_list *
1843output_body ()
1844{
1845 unw_rec_list *ptr = alloc_record (body);
1846 return ptr;
1847}
1848
1849static unw_rec_list *
1850output_mem_stack_f (size)
1851 unsigned int size;
1852{
1853 unw_rec_list *ptr = alloc_record (mem_stack_f);
1854 ptr->r.record.p.size = size;
1855 return ptr;
1856}
1857
1858static unw_rec_list *
1859output_mem_stack_v ()
1860{
1861 unw_rec_list *ptr = alloc_record (mem_stack_v);
1862 return ptr;
1863}
1864
1865static unw_rec_list *
1866output_psp_gr (gr)
1867 unsigned int gr;
1868{
1869 unw_rec_list *ptr = alloc_record (psp_gr);
ba825241 1870 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1871 return ptr;
1872}
1873
1874static unw_rec_list *
1875output_psp_sprel (offset)
1876 unsigned int offset;
1877{
1878 unw_rec_list *ptr = alloc_record (psp_sprel);
ba825241 1879 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1880 return ptr;
1881}
1882
1883static unw_rec_list *
1884output_rp_when ()
1885{
1886 unw_rec_list *ptr = alloc_record (rp_when);
1887 return ptr;
1888}
1889
1890static unw_rec_list *
1891output_rp_gr (gr)
1892 unsigned int gr;
1893{
1894 unw_rec_list *ptr = alloc_record (rp_gr);
ba825241 1895 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1896 return ptr;
1897}
1898
1899static unw_rec_list *
1900output_rp_br (br)
1901 unsigned int br;
1902{
1903 unw_rec_list *ptr = alloc_record (rp_br);
ba825241 1904 ptr->r.record.p.r.br = br;
800eeca4
JW		 1905 return ptr;
1906}
1907
1908static unw_rec_list *
1909output_rp_psprel (offset)
1910 unsigned int offset;
1911{
1912 unw_rec_list *ptr = alloc_record (rp_psprel);
ba825241 1913 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1914 return ptr;
1915}
1916
1917static unw_rec_list *
1918output_rp_sprel (offset)
1919 unsigned int offset;
1920{
1921 unw_rec_list *ptr = alloc_record (rp_sprel);
ba825241 1922 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1923 return ptr;
1924}
1925
1926static unw_rec_list *
1927output_pfs_when ()
1928{
1929 unw_rec_list *ptr = alloc_record (pfs_when);
1930 return ptr;
1931}
1932
1933static unw_rec_list *
1934output_pfs_gr (gr)
1935 unsigned int gr;
1936{
1937 unw_rec_list *ptr = alloc_record (pfs_gr);
ba825241 1938 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1939 return ptr;
1940}
1941
1942static unw_rec_list *
1943output_pfs_psprel (offset)
1944 unsigned int offset;
1945{
1946 unw_rec_list *ptr = alloc_record (pfs_psprel);
ba825241 1947 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1948 return ptr;
1949}
1950
1951static unw_rec_list *
1952output_pfs_sprel (offset)
1953 unsigned int offset;
1954{
1955 unw_rec_list *ptr = alloc_record (pfs_sprel);
ba825241 1956 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1957 return ptr;
1958}
1959
1960static unw_rec_list *
1961output_preds_when ()
1962{
1963 unw_rec_list *ptr = alloc_record (preds_when);
1964 return ptr;
1965}
1966
1967static unw_rec_list *
1968output_preds_gr (gr)
1969 unsigned int gr;
1970{
1971 unw_rec_list *ptr = alloc_record (preds_gr);
ba825241 1972 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1973 return ptr;
1974}
1975
1976static unw_rec_list *
1977output_preds_psprel (offset)
1978 unsigned int offset;
1979{
1980 unw_rec_list *ptr = alloc_record (preds_psprel);
ba825241 1981 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1982 return ptr;
1983}
1984
1985static unw_rec_list *
1986output_preds_sprel (offset)
1987 unsigned int offset;
1988{
1989 unw_rec_list *ptr = alloc_record (preds_sprel);
ba825241 1990 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1991 return ptr;
1992}
1993
1994static unw_rec_list *
1995output_fr_mem (mask)
1996 unsigned int mask;
1997{
1998 unw_rec_list *ptr = alloc_record (fr_mem);
ba825241
JB		 1999 unw_rec_list *cur = ptr;
2000
2001 ptr->r.record.p.frmask = mask;
2002 unwind.pending_saves = &ptr->r.record.p;
2003 for (;;)
2004 {
2005 unw_rec_list *prev = cur;
2006
2007 /* Clear least significant set bit. */
2008 mask &= ~(mask & (~mask + 1));
2009 if (!mask)
2010 return ptr;
2011 cur = alloc_record (fr_mem);
2012 cur->r.record.p.frmask = mask;
2013 /* Retain only least significant bit. */
2014 prev->r.record.p.frmask ^= mask;
2015 prev->r.record.p.next = cur;
2016 }
800eeca4
JW		 2017}
2018
2019static unw_rec_list *
2020output_frgr_mem (gr_mask, fr_mask)
2021 unsigned int gr_mask;
2022 unsigned int fr_mask;
2023{
2024 unw_rec_list *ptr = alloc_record (frgr_mem);
ba825241
JB		 2025 unw_rec_list *cur = ptr;
2026
2027 unwind.pending_saves = &cur->r.record.p;
2028 cur->r.record.p.frmask = fr_mask;
2029 while (fr_mask)
2030 {
2031 unw_rec_list *prev = cur;
2032
2033 /* Clear least significant set bit. */
2034 fr_mask &= ~(fr_mask & (~fr_mask + 1));
2035 if (!gr_mask && !fr_mask)
2036 return ptr;
2037 cur = alloc_record (frgr_mem);
2038 cur->r.record.p.frmask = fr_mask;
2039 /* Retain only least significant bit. */
2040 prev->r.record.p.frmask ^= fr_mask;
2041 prev->r.record.p.next = cur;
2042 }
2043 cur->r.record.p.grmask = gr_mask;
2044 for (;;)
2045 {
2046 unw_rec_list *prev = cur;
2047
2048 /* Clear least significant set bit. */
2049 gr_mask &= ~(gr_mask & (~gr_mask + 1));
2050 if (!gr_mask)
2051 return ptr;
2052 cur = alloc_record (frgr_mem);
2053 cur->r.record.p.grmask = gr_mask;
2054 /* Retain only least significant bit. */
2055 prev->r.record.p.grmask ^= gr_mask;
2056 prev->r.record.p.next = cur;
2057 }
800eeca4
JW		 2058}
2059
2060static unw_rec_list *
2061output_gr_gr (mask, reg)
2062 unsigned int mask;
2063 unsigned int reg;
2064{
2065 unw_rec_list *ptr = alloc_record (gr_gr);
ba825241
JB		 2066 unw_rec_list *cur = ptr;
2067
800eeca4 2068 ptr->r.record.p.grmask = mask;
ba825241
JB		 2069 ptr->r.record.p.r.gr = reg;
2070 unwind.pending_saves = &ptr->r.record.p;
2071 for (;;)
2072 {
2073 unw_rec_list *prev = cur;
2074
2075 /* Clear least significant set bit. */
2076 mask &= ~(mask & (~mask + 1));
2077 if (!mask)
2078 return ptr;
2079 cur = alloc_record (gr_gr);
2080 cur->r.record.p.grmask = mask;
2081 /* Indicate this record shouldn't be output. */
2082 cur->r.record.p.r.gr = REG_NUM;
2083 /* Retain only least significant bit. */
2084 prev->r.record.p.grmask ^= mask;
2085 prev->r.record.p.next = cur;
2086 }
800eeca4
JW		 2087}
2088
2089static unw_rec_list *
2090output_gr_mem (mask)
2091 unsigned int mask;
2092{
2093 unw_rec_list *ptr = alloc_record (gr_mem);
ba825241
JB		 2094 unw_rec_list *cur = ptr;
2095
2096 ptr->r.record.p.grmask = mask;
2097 unwind.pending_saves = &ptr->r.record.p;
2098 for (;;)
2099 {
2100 unw_rec_list *prev = cur;
2101
2102 /* Clear least significant set bit. */
2103 mask &= ~(mask & (~mask + 1));
2104 if (!mask)
2105 return ptr;
2106 cur = alloc_record (gr_mem);
2107 cur->r.record.p.grmask = mask;
2108 /* Retain only least significant bit. */
2109 prev->r.record.p.grmask ^= mask;
2110 prev->r.record.p.next = cur;
2111 }
800eeca4
JW		 2112}
2113
2114static unw_rec_list *
2115output_br_mem (unsigned int mask)
2116{
2117 unw_rec_list *ptr = alloc_record (br_mem);
ba825241
JB		 2118 unw_rec_list *cur = ptr;
2119
800eeca4 2120 ptr->r.record.p.brmask = mask;
ba825241
JB		 2121 unwind.pending_saves = &ptr->r.record.p;
2122 for (;;)
2123 {
2124 unw_rec_list *prev = cur;
2125
2126 /* Clear least significant set bit. */
2127 mask &= ~(mask & (~mask + 1));
2128 if (!mask)
2129 return ptr;
2130 cur = alloc_record (br_mem);
2131 cur->r.record.p.brmask = mask;
2132 /* Retain only least significant bit. */
2133 prev->r.record.p.brmask ^= mask;
2134 prev->r.record.p.next = cur;
2135 }
800eeca4
JW		 2136}
2137
2138static unw_rec_list *
ba825241
JB		 2139output_br_gr (mask, reg)
2140 unsigned int mask;
800eeca4
JW		 2141 unsigned int reg;
2142{
2143 unw_rec_list *ptr = alloc_record (br_gr);
ba825241
JB		 2144 unw_rec_list *cur = ptr;
2145
2146 ptr->r.record.p.brmask = mask;
2147 ptr->r.record.p.r.gr = reg;
2148 unwind.pending_saves = &ptr->r.record.p;
2149 for (;;)
2150 {
2151 unw_rec_list *prev = cur;
2152
2153 /* Clear least significant set bit. */
2154 mask &= ~(mask & (~mask + 1));
2155 if (!mask)
2156 return ptr;
2157 cur = alloc_record (br_gr);
2158 cur->r.record.p.brmask = mask;
2159 /* Indicate this record shouldn't be output. */
2160 cur->r.record.p.r.gr = REG_NUM;
2161 /* Retain only least significant bit. */
2162 prev->r.record.p.brmask ^= mask;
2163 prev->r.record.p.next = cur;
2164 }
800eeca4
JW		 2165}
2166
2167static unw_rec_list *
2168output_spill_base (offset)
2169 unsigned int offset;
2170{
2171 unw_rec_list *ptr = alloc_record (spill_base);
ba825241 2172 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2173 return ptr;
2174}
2175
2176static unw_rec_list *
2177output_unat_when ()
2178{
2179 unw_rec_list *ptr = alloc_record (unat_when);
2180 return ptr;
2181}
2182
2183static unw_rec_list *
2184output_unat_gr (gr)
2185 unsigned int gr;
2186{
2187 unw_rec_list *ptr = alloc_record (unat_gr);
ba825241 2188 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2189 return ptr;
2190}
2191
2192static unw_rec_list *
2193output_unat_psprel (offset)
2194 unsigned int offset;
2195{
2196 unw_rec_list *ptr = alloc_record (unat_psprel);
ba825241 2197 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2198 return ptr;
2199}
2200
2201static unw_rec_list *
2202output_unat_sprel (offset)
2203 unsigned int offset;
2204{
2205 unw_rec_list *ptr = alloc_record (unat_sprel);
ba825241 2206 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2207 return ptr;
2208}
2209
2210static unw_rec_list *
2211output_lc_when ()
2212{
2213 unw_rec_list *ptr = alloc_record (lc_when);
2214 return ptr;
2215}
2216
2217static unw_rec_list *
2218output_lc_gr (gr)
2219 unsigned int gr;
2220{
2221 unw_rec_list *ptr = alloc_record (lc_gr);
ba825241 2222 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2223 return ptr;
2224}
2225
2226static unw_rec_list *
2227output_lc_psprel (offset)
2228 unsigned int offset;
2229{
2230 unw_rec_list *ptr = alloc_record (lc_psprel);
ba825241 2231 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2232 return ptr;
2233}
2234
2235static unw_rec_list *
2236output_lc_sprel (offset)
2237 unsigned int offset;
2238{
2239 unw_rec_list *ptr = alloc_record (lc_sprel);
ba825241 2240 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2241 return ptr;
2242}
2243
2244static unw_rec_list *
2245output_fpsr_when ()
2246{
2247 unw_rec_list *ptr = alloc_record (fpsr_when);
2248 return ptr;
2249}
2250
2251static unw_rec_list *
2252output_fpsr_gr (gr)
2253 unsigned int gr;
2254{
2255 unw_rec_list *ptr = alloc_record (fpsr_gr);
ba825241 2256 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2257 return ptr;
2258}
2259
2260static unw_rec_list *
2261output_fpsr_psprel (offset)
2262 unsigned int offset;
2263{
2264 unw_rec_list *ptr = alloc_record (fpsr_psprel);
ba825241 2265 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2266 return ptr;
2267}
2268
2269static unw_rec_list *
2270output_fpsr_sprel (offset)
2271 unsigned int offset;
2272{
2273 unw_rec_list *ptr = alloc_record (fpsr_sprel);
ba825241 2274 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2275 return ptr;
2276}
2277
2278static unw_rec_list *
2279output_priunat_when_gr ()
2280{
2281 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2282 return ptr;
2283}
2284
2285static unw_rec_list *
2286output_priunat_when_mem ()
2287{
2288 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2289 return ptr;
2290}
2291
2292static unw_rec_list *
2293output_priunat_gr (gr)
2294 unsigned int gr;
2295{
2296 unw_rec_list *ptr = alloc_record (priunat_gr);
ba825241 2297 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2298 return ptr;
2299}
2300
2301static unw_rec_list *
2302output_priunat_psprel (offset)
2303 unsigned int offset;
2304{
2305 unw_rec_list *ptr = alloc_record (priunat_psprel);
ba825241 2306 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2307 return ptr;
2308}
2309
2310static unw_rec_list *
2311output_priunat_sprel (offset)
2312 unsigned int offset;
2313{
2314 unw_rec_list *ptr = alloc_record (priunat_sprel);
ba825241 2315 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2316 return ptr;
2317}
2318
2319static unw_rec_list *
2320output_bsp_when ()
2321{
2322 unw_rec_list *ptr = alloc_record (bsp_when);
2323 return ptr;
2324}
2325
2326static unw_rec_list *
2327output_bsp_gr (gr)
2328 unsigned int gr;
2329{
2330 unw_rec_list *ptr = alloc_record (bsp_gr);
ba825241 2331 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2332 return ptr;
2333}
2334
2335static unw_rec_list *
2336output_bsp_psprel (offset)
2337 unsigned int offset;
2338{
2339 unw_rec_list *ptr = alloc_record (bsp_psprel);
ba825241 2340 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2341 return ptr;
2342}
2343
2344static unw_rec_list *
2345output_bsp_sprel (offset)
2346 unsigned int offset;
2347{
2348 unw_rec_list *ptr = alloc_record (bsp_sprel);
ba825241 2349 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2350 return ptr;
2351}
2352
2353static unw_rec_list *
2354output_bspstore_when ()
2355{
2356 unw_rec_list *ptr = alloc_record (bspstore_when);
2357 return ptr;
2358}
2359
2360static unw_rec_list *
2361output_bspstore_gr (gr)
2362 unsigned int gr;
2363{
2364 unw_rec_list *ptr = alloc_record (bspstore_gr);
ba825241 2365 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2366 return ptr;
2367}
2368
2369static unw_rec_list *
2370output_bspstore_psprel (offset)
2371 unsigned int offset;
2372{
2373 unw_rec_list *ptr = alloc_record (bspstore_psprel);
ba825241 2374 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2375 return ptr;
2376}
2377
2378static unw_rec_list *
2379output_bspstore_sprel (offset)
2380 unsigned int offset;
2381{
2382 unw_rec_list *ptr = alloc_record (bspstore_sprel);
ba825241 2383 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2384 return ptr;
2385}
2386
2387static unw_rec_list *
2388output_rnat_when ()
2389{
2390 unw_rec_list *ptr = alloc_record (rnat_when);
2391 return ptr;
2392}
2393
2394static unw_rec_list *
2395output_rnat_gr (gr)
2396 unsigned int gr;
2397{
2398 unw_rec_list *ptr = alloc_record (rnat_gr);
ba825241 2399 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2400 return ptr;
2401}
2402
2403static unw_rec_list *
2404output_rnat_psprel (offset)
2405 unsigned int offset;
2406{
2407 unw_rec_list *ptr = alloc_record (rnat_psprel);
ba825241 2408 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2409 return ptr;
2410}
2411
2412static unw_rec_list *
2413output_rnat_sprel (offset)
2414 unsigned int offset;
2415{
2416 unw_rec_list *ptr = alloc_record (rnat_sprel);
ba825241 2417 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2418 return ptr;
2419}
2420
2421static unw_rec_list *
e0c9811a
JW		 2422output_unwabi (abi, context)
2423 unsigned long abi;
2424 unsigned long context;
800eeca4 2425{
e0c9811a
JW		 2426 unw_rec_list *ptr = alloc_record (unwabi);
2427 ptr->r.record.p.abi = abi;
2428 ptr->r.record.p.context = context;
800eeca4
JW		 2429 return ptr;
2430}
2431
2432static unw_rec_list *
e0c9811a 2433output_epilogue (unsigned long ecount)
800eeca4 2434{
e0c9811a
JW		 2435 unw_rec_list *ptr = alloc_record (epilogue);
2436 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2437 return ptr;
2438}
2439
2440static unw_rec_list *
e0c9811a 2441output_label_state (unsigned long label)
800eeca4 2442{
e0c9811a
JW		 2443 unw_rec_list *ptr = alloc_record (label_state);
2444 ptr->r.record.b.label = label;
800eeca4
JW		 2445 return ptr;
2446}
2447
2448static unw_rec_list *
e0c9811a
JW		 2449output_copy_state (unsigned long label)
2450{
2451 unw_rec_list *ptr = alloc_record (copy_state);
2452 ptr->r.record.b.label = label;
2453 return ptr;
2454}
2455
2456static unw_rec_list *
e4e8248d 2457output_spill_psprel (ab, reg, offset, predicate)
e0c9811a 2458 unsigned int ab;
800eeca4
JW		 2459 unsigned int reg;
2460 unsigned int offset;
2461 unsigned int predicate;
2462{
e4e8248d 2463 unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel);
e0c9811a 2464 ptr->r.record.x.ab = ab;
800eeca4 2465 ptr->r.record.x.reg = reg;
ba825241 2466 ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2467 ptr->r.record.x.qp = predicate;
2468 return ptr;
2469}
2470
2471static unw_rec_list *
e4e8248d 2472output_spill_sprel (ab, reg, offset, predicate)
e0c9811a 2473 unsigned int ab;
800eeca4
JW		 2474 unsigned int reg;
2475 unsigned int offset;
2476 unsigned int predicate;
2477{
e4e8248d 2478 unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel);
e0c9811a 2479 ptr->r.record.x.ab = ab;
800eeca4 2480 ptr->r.record.x.reg = reg;
ba825241 2481 ptr->r.record.x.where.spoff = offset / 4;
800eeca4
JW		 2482 ptr->r.record.x.qp = predicate;
2483 return ptr;
2484}
2485
2486static unw_rec_list *
e4e8248d 2487output_spill_reg (ab, reg, targ_reg, xy, predicate)
e0c9811a 2488 unsigned int ab;
800eeca4
JW		 2489 unsigned int reg;
2490 unsigned int targ_reg;
2491 unsigned int xy;
2492 unsigned int predicate;
2493{
e4e8248d 2494 unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg);
e0c9811a 2495 ptr->r.record.x.ab = ab;
800eeca4 2496 ptr->r.record.x.reg = reg;
ba825241 2497 ptr->r.record.x.where.reg = targ_reg;
800eeca4
JW		 2498 ptr->r.record.x.xy = xy;
2499 ptr->r.record.x.qp = predicate;
2500 return ptr;
2501}
2502
197865e8 2503/* Given a unw_rec_list process the correct format with the
800eeca4 2504 specified function. */
542d6675 2505
800eeca4
JW		 2506static void
2507process_one_record (ptr, f)
2508 unw_rec_list *ptr;
2509 vbyte_func f;
2510{
ba825241 2511 unsigned int fr_mask, gr_mask;
e0c9811a 2512
197865e8 2513 switch (ptr->r.type)
800eeca4 2514 {
5738bc24
JW		 2515 /* This is a dummy record that takes up no space in the output. */
2516 case endp:
2517 break;
2518
542d6675
KH		 2519 case gr_mem:
2520 case fr_mem:
2521 case br_mem:
2522 case frgr_mem:
2523 /* These are taken care of by prologue/prologue_gr. */
2524 break;
e0c9811a 2525
542d6675
KH		 2526 case prologue_gr:
2527 case prologue:
2528 if (ptr->r.type == prologue_gr)
2529 output_R2_format (f, ptr->r.record.r.grmask,
2530 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2531 else
800eeca4 2532 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2533
2534 /* Output descriptor(s) for union of register spills (if any). */
2535 gr_mask = ptr->r.record.r.mask.gr_mem;
2536 fr_mask = ptr->r.record.r.mask.fr_mem;
2537 if (fr_mask)
2538 {
2539 if ((fr_mask & ~0xfUL) == 0)
2540 output_P6_format (f, fr_mem, fr_mask);
2541 else
2542 {
2543 output_P5_format (f, gr_mask, fr_mask);
2544 gr_mask = 0;
2545 }
2546 }
2547 if (gr_mask)
2548 output_P6_format (f, gr_mem, gr_mask);
2549 if (ptr->r.record.r.mask.br_mem)
2550 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2551
2552 /* output imask descriptor if necessary: */
2553 if (ptr->r.record.r.mask.i)
2554 output_P4_format (f, ptr->r.record.r.mask.i,
2555 ptr->r.record.r.imask_size);
2556 break;
2557
2558 case body:
2559 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2560 break;
2561 case mem_stack_f:
2562 case mem_stack_v:
2563 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2564 ptr->r.record.p.size);
2565 break;
2566 case psp_gr:
2567 case rp_gr:
2568 case pfs_gr:
2569 case preds_gr:
2570 case unat_gr:
2571 case lc_gr:
2572 case fpsr_gr:
2573 case priunat_gr:
2574 case bsp_gr:
2575 case bspstore_gr:
2576 case rnat_gr:
ba825241 2577 output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr);
542d6675
KH		 2578 break;
2579 case rp_br:
ba825241 2580 output_P3_format (f, rp_br, ptr->r.record.p.r.br);
542d6675
KH		 2581 break;
2582 case psp_sprel:
ba825241 2583 output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0);
542d6675
KH		 2584 break;
2585 case rp_when:
2586 case pfs_when:
2587 case preds_when:
2588 case unat_when:
2589 case lc_when:
2590 case fpsr_when:
2591 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2592 break;
2593 case rp_psprel:
2594 case pfs_psprel:
2595 case preds_psprel:
2596 case unat_psprel:
2597 case lc_psprel:
2598 case fpsr_psprel:
2599 case spill_base:
ba825241 2600 output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0);
542d6675
KH		 2601 break;
2602 case rp_sprel:
2603 case pfs_sprel:
2604 case preds_sprel:
2605 case unat_sprel:
2606 case lc_sprel:
2607 case fpsr_sprel:
2608 case priunat_sprel:
2609 case bsp_sprel:
2610 case bspstore_sprel:
2611 case rnat_sprel:
ba825241 2612 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp);
542d6675
KH		 2613 break;
2614 case gr_gr:
ba825241
JB		 2615 if (ptr->r.record.p.r.gr < REG_NUM)
2616 {
2617 const unw_rec_list *cur = ptr;
2618
2619 gr_mask = cur->r.record.p.grmask;
2620 while ((cur = cur->r.record.p.next) != NULL)
2621 gr_mask |= cur->r.record.p.grmask;
2622 output_P9_format (f, gr_mask, ptr->r.record.p.r.gr);
2623 }
542d6675
KH		 2624 break;
2625 case br_gr:
ba825241
JB		 2626 if (ptr->r.record.p.r.gr < REG_NUM)
2627 {
2628 const unw_rec_list *cur = ptr;
2629
2630 gr_mask = cur->r.record.p.brmask;
2631 while ((cur = cur->r.record.p.next) != NULL)
2632 gr_mask |= cur->r.record.p.brmask;
2633 output_P2_format (f, gr_mask, ptr->r.record.p.r.gr);
2634 }
542d6675
KH		 2635 break;
2636 case spill_mask:
2637 as_bad ("spill_mask record unimplemented.");
2638 break;
2639 case priunat_when_gr:
2640 case priunat_when_mem:
2641 case bsp_when:
2642 case bspstore_when:
2643 case rnat_when:
2644 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2645 break;
2646 case priunat_psprel:
2647 case bsp_psprel:
2648 case bspstore_psprel:
2649 case rnat_psprel:
ba825241 2650 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp);
542d6675
KH		 2651 break;
2652 case unwabi:
2653 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2654 break;
2655 case epilogue:
2656 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2657 break;
2658 case label_state:
2659 case copy_state:
2660 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2661 break;
2662 case spill_psprel:
2663 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2664 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2665 ptr->r.record.x.where.pspoff);
542d6675
KH		 2666 break;
2667 case spill_sprel:
2668 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2669 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2670 ptr->r.record.x.where.spoff);
542d6675
KH		 2671 break;
2672 case spill_reg:
2673 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2674 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
ba825241 2675 ptr->r.record.x.where.reg, ptr->r.record.x.t);
542d6675
KH		 2676 break;
2677 case spill_psprel_p:
2678 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2679 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2680 ptr->r.record.x.t, ptr->r.record.x.where.pspoff);
542d6675
KH		 2681 break;
2682 case spill_sprel_p:
2683 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2684 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2685 ptr->r.record.x.t, ptr->r.record.x.where.spoff);
542d6675
KH		 2686 break;
2687 case spill_reg_p:
2688 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2689 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
ba825241 2690 ptr->r.record.x.xy, ptr->r.record.x.where.reg,
542d6675
KH		 2691 ptr->r.record.x.t);
2692 break;
2693 default:
2694 as_bad ("record_type_not_valid");
2695 break;
800eeca4
JW		 2696 }
2697}
2698
197865e8 2699/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2700 the specified function. */
2701static void
2702process_unw_records (list, f)
2703 unw_rec_list *list;
2704 vbyte_func f;
2705{
2706 unw_rec_list *ptr;
2707 for (ptr = list; ptr; ptr = ptr->next)
2708 process_one_record (ptr, f);
2709}
2710
2711/* Determine the size of a record list in bytes. */
2712static int
2713calc_record_size (list)
2714 unw_rec_list *list;
2715{
2716 vbyte_count = 0;
2717 process_unw_records (list, count_output);
2718 return vbyte_count;
2719}
2720
e4e8248d
JB		 2721/* Return the number of bits set in the input value.
2722 Perhaps this has a better place... */
2723#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2724# define popcount __builtin_popcount
2725#else
2726static int
2727popcount (unsigned x)
2728{
2729 static const unsigned char popcnt[16] =
2730 {
2731 0, 1, 1, 2,
2732 1, 2, 2, 3,
2733 1, 2, 2, 3,
2734 2, 3, 3, 4
2735 };
2736
2737 if (x < NELEMS (popcnt))
2738 return popcnt[x];
2739 return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt));
2740}
2741#endif
2742
e0c9811a
JW		 2743/* Update IMASK bitmask to reflect the fact that one or more registers
2744 of type TYPE are saved starting at instruction with index T. If N
2745 bits are set in REGMASK, it is assumed that instructions T through
2746 T+N-1 save these registers.
2747
2748 TYPE values:
2749 0: no save
2750 1: instruction saves next fp reg
2751 2: instruction saves next general reg
2752 3: instruction saves next branch reg */
2753static void
2754set_imask (region, regmask, t, type)
2755 unw_rec_list *region;
2756 unsigned long regmask;
2757 unsigned long t;
2758 unsigned int type;
2759{
2760 unsigned char *imask;
2761 unsigned long imask_size;
2762 unsigned int i;
2763 int pos;
2764
2765 imask = region->r.record.r.mask.i;
2766 imask_size = region->r.record.r.imask_size;
2767 if (!imask)
2768 {
542d6675 2769 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2770 imask = xmalloc (imask_size);
2771 memset (imask, 0, imask_size);
2772
2773 region->r.record.r.imask_size = imask_size;
2774 region->r.record.r.mask.i = imask;
2775 }
2776
542d6675
KH		 2777 i = (t / 4) + 1;
2778 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2779 while (regmask)
2780 {
2781 if (i >= imask_size)
2782 {
2783 as_bad ("Ignoring attempt to spill beyond end of region");
2784 return;
2785 }
2786
2787 imask[i] |= (type & 0x3) << pos;
197865e8 2788
e0c9811a
JW		 2789 regmask &= (regmask - 1);
2790 pos -= 2;
2791 if (pos < 0)
2792 {
2793 pos = 0;
2794 ++i;
2795 }
2796 }
2797}
2798
f5a30c2e
JW		 2799/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2800 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2801 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2802 for frag sizes. */
f5a30c2e 2803
e0c9811a 2804unsigned long
b5e0fabd 2805slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2806 unsigned long slot_addr;
2807 fragS *slot_frag;
2808 unsigned long first_addr;
2809 fragS *first_frag;
b5e0fabd 2810 int before_relax;
e0c9811a 2811{
f5a30c2e
JW		 2812 unsigned long index = 0;
2813
2814 /* First time we are called, the initial address and frag are invalid. */
2815 if (first_addr == 0)
2816 return 0;
2817
2818 /* If the two addresses are in different frags, then we need to add in
2819 the remaining size of this frag, and then the entire size of intermediate
2820 frags. */
4dddc1d1 2821 while (slot_frag != first_frag)
f5a30c2e
JW		 2822 {
2823 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2824
b5e0fabd 2825 if (! before_relax)
73f20958 2826 {
b5e0fabd
JW		 2827 /* We can get the final addresses only during and after
2828 relaxation. */
73f20958
L		 2829 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2830 index += 3 * ((first_frag->fr_next->fr_address
2831 - first_frag->fr_address
2832 - first_frag->fr_fix) >> 4);
2833 }
2834 else
2835 /* We don't know what the final addresses will be. We try our
2836 best to estimate. */
2837 switch (first_frag->fr_type)
2838 {
2839 default:
2840 break;
2841
2842 case rs_space:
2843 as_fatal ("only constant space allocation is supported");
2844 break;
2845
2846 case rs_align:
2847 case rs_align_code:
2848 case rs_align_test:
2849 /* Take alignment into account. Assume the worst case
2850 before relaxation. */
2851 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2852 break;
2853
2854 case rs_org:
2855 if (first_frag->fr_symbol)
2856 {
2857 as_fatal ("only constant offsets are supported");
2858 break;
2859 }
2860 case rs_fill:
2861 index += 3 * (first_frag->fr_offset >> 4);
2862 break;
2863 }
2864
f5a30c2e
JW		 2865 /* Add in the full size of the frag converted to instruction slots. */
2866 index += 3 * (first_frag->fr_fix >> 4);
2867 /* Subtract away the initial part before first_addr. */
2868 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2869 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2870
f5a30c2e
JW		 2871 /* Move to the beginning of the next frag. */
2872 first_frag = first_frag->fr_next;
2873 first_addr = (unsigned long) &first_frag->fr_literal;
4dddc1d1
JW		 2874
2875 /* This can happen if there is section switching in the middle of a
2876 function, causing the frag chain for the function to be broken. */
2877 if (first_frag == NULL)
2878 {
2879 /* We get six warnings for one problem, because of the loop in
2880 fixup_unw_records, and because fixup_unw_records is called 3
2881 times: once before creating the variant frag, once to estimate
2882 its size, and once to relax it. This is unreasonable, so we use
2883 a static var to make sure we only emit the warning once. */
2884 static int warned = 0;
2885
2886 if (!warned)
2887 {
2888 as_warn ("Corrupted unwind info due to unsupported section switching");
2889 warned = 1;
2890 }
2891
2892 return index;
2893 }
f5a30c2e
JW		 2894 }
2895
2896 /* Add in the used part of the last frag. */
2897 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2898 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2899 return index;
2900}
4a1805b1 2901
91a2ae2a
RH		 2902/* Optimize unwind record directives. */
2903
2904static unw_rec_list *
2905optimize_unw_records (list)
2906 unw_rec_list *list;
2907{
2908 if (!list)
2909 return NULL;
2910
2911 /* If the only unwind record is ".prologue" or ".prologue" followed
2912 by ".body", then we can optimize the unwind directives away. */
2913 if (list->r.type == prologue
5738bc24
JW		 2914 && (list->next->r.type == endp
2915 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2916 return NULL;
2917
2918 return list;
2919}
2920
800eeca4
JW		 2921/* Given a complete record list, process any records which have
2922 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2923 this has been run, all necessary information should be available
800eeca4 2924 within each record to generate an image. */
542d6675 2925
800eeca4 2926static void
b5e0fabd 2927fixup_unw_records (list, before_relax)
800eeca4 2928 unw_rec_list *list;
b5e0fabd 2929 int before_relax;
800eeca4 2930{
e0c9811a
JW		 2931 unw_rec_list *ptr, *region = 0;
2932 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2933 fragS *first_frag = 0;
e0c9811a 2934
800eeca4
JW		 2935 for (ptr = list; ptr; ptr = ptr->next)
2936 {
2937 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2938 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2939 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2940 first_addr, first_frag, before_relax);
800eeca4
JW		 2941 switch (ptr->r.type)
2942 {
542d6675
KH		 2943 case prologue:
2944 case prologue_gr:
2945 case body:
2946 {
2947 unw_rec_list *last;
5738bc24
JW		 2948 int size;
2949 unsigned long last_addr = 0;
2950 fragS *last_frag = NULL;
542d6675
KH		 2951
2952 first_addr = ptr->slot_number;
f5a30c2e 2953 first_frag = ptr->slot_frag;
542d6675 2954 /* Find either the next body/prologue start, or the end of
5738bc24 2955 the function, and determine the size of the region. */
542d6675
KH		 2956 for (last = ptr->next; last != NULL; last = last->next)
2957 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2958 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2959 {
2960 last_addr = last->slot_number;
f5a30c2e 2961 last_frag = last->slot_frag;
542d6675
KH		 2962 break;
2963 }
b5e0fabd
JW		 2964 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2965 before_relax);
542d6675 2966 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2967 if (ptr->r.type == body)
2968 /* End of region. */
2969 region = 0;
2970 else
2971 region = ptr;
e0c9811a 2972 break;
542d6675
KH		 2973 }
2974 case epilogue:
ed7af9f9
L		 2975 if (t < rlen)
2976 ptr->r.record.b.t = rlen - 1 - t;
2977 else
2978 /* This happens when a memory-stack-less procedure uses a
2979 ".restore sp" directive at the end of a region to pop
2980 the frame state. */
2981 ptr->r.record.b.t = 0;
542d6675 2982 break;
e0c9811a 2983
542d6675
KH		 2984 case mem_stack_f:
2985 case mem_stack_v:
2986 case rp_when:
2987 case pfs_when:
2988 case preds_when:
2989 case unat_when:
2990 case lc_when:
2991 case fpsr_when:
2992 case priunat_when_gr:
2993 case priunat_when_mem:
2994 case bsp_when:
2995 case bspstore_when:
2996 case rnat_when:
2997 ptr->r.record.p.t = t;
2998 break;
e0c9811a 2999
542d6675
KH		 3000 case spill_reg:
3001 case spill_sprel:
3002 case spill_psprel:
3003 case spill_reg_p:
3004 case spill_sprel_p:
3005 case spill_psprel_p:
3006 ptr->r.record.x.t = t;
3007 break;
e0c9811a 3008
542d6675
KH		 3009 case frgr_mem:
3010 if (!region)
3011 {
75e09913 3012 as_bad ("frgr_mem record before region record!");
542d6675
KH		 3013 return;
3014 }
3015 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3016 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3017 set_imask (region, ptr->r.record.p.frmask, t, 1);
3018 set_imask (region, ptr->r.record.p.grmask, t, 2);
3019 break;
3020 case fr_mem:
3021 if (!region)
3022 {
75e09913 3023 as_bad ("fr_mem record before region record!");
542d6675
KH		 3024 return;
3025 }
ba825241
JB		 3026 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3027 set_imask (region, ptr->r.record.p.frmask, t, 1);
542d6675
KH		 3028 break;
3029 case gr_mem:
3030 if (!region)
3031 {
75e09913 3032 as_bad ("gr_mem record before region record!");
542d6675
KH		 3033 return;
3034 }
ba825241
JB		 3035 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3036 set_imask (region, ptr->r.record.p.grmask, t, 2);
542d6675
KH		 3037 break;
3038 case br_mem:
3039 if (!region)
3040 {
75e09913 3041 as_bad ("br_mem record before region record!");
542d6675
KH		 3042 return;
3043 }
3044 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
3045 set_imask (region, ptr->r.record.p.brmask, t, 3);
3046 break;
e0c9811a 3047
542d6675
KH		 3048 case gr_gr:
3049 if (!region)
3050 {
75e09913 3051 as_bad ("gr_gr record before region record!");
542d6675
KH		 3052 return;
3053 }
3054 set_imask (region, ptr->r.record.p.grmask, t, 2);
3055 break;
3056 case br_gr:
3057 if (!region)
3058 {
75e09913 3059 as_bad ("br_gr record before region record!");
542d6675
KH		 3060 return;
3061 }
3062 set_imask (region, ptr->r.record.p.brmask, t, 3);
3063 break;
e0c9811a 3064
542d6675
KH		 3065 default:
3066 break;
800eeca4
JW		 3067 }
3068 }
3069}
3070
b5e0fabd
JW		 3071/* Estimate the size of a frag before relaxing. We only have one type of frag
3072 to handle here, which is the unwind info frag. */
3073
3074int
3075ia64_estimate_size_before_relax (fragS *frag,
3076 asection *segtype ATTRIBUTE_UNUSED)
3077{
3078 unw_rec_list *list;
3079 int len, size, pad;
3080
3081 /* ??? This code is identical to the first part of ia64_convert_frag. */
3082 list = (unw_rec_list *) frag->fr_opcode;
3083 fixup_unw_records (list, 0);
3084
3085 len = calc_record_size (list);
3086 /* pad to pointer-size boundary. */
3087 pad = len % md.pointer_size;
3088 if (pad != 0)
3089 len += md.pointer_size - pad;
f7e323d5
JB		 3090 /* Add 8 for the header. */
3091 size = len + 8;
3092 /* Add a pointer for the personality offset. */
3093 if (frag->fr_offset)
3094 size += md.pointer_size;
b5e0fabd
JW		 3095
3096 /* fr_var carries the max_chars that we created the fragment with.
3097 We must, of course, have allocated enough memory earlier. */
3098 assert (frag->fr_var >= size);
3099
3100 return frag->fr_fix + size;
3101}
3102
73f20958
L		 3103/* This function converts a rs_machine_dependent variant frag into a
3104 normal fill frag with the unwind image from the the record list. */
3105void
3106ia64_convert_frag (fragS *frag)
557debba 3107{
73f20958
L		 3108 unw_rec_list *list;
3109 int len, size, pad;
1cd8ff38 3110 valueT flag_value;
557debba 3111
b5e0fabd 3112 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 3113 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 3114 fixup_unw_records (list, 0);
1cd8ff38 3115
73f20958
L		 3116 len = calc_record_size (list);
3117 /* pad to pointer-size boundary. */
3118 pad = len % md.pointer_size;
3119 if (pad != 0)
3120 len += md.pointer_size - pad;
f7e323d5
JB		 3121 /* Add 8 for the header. */
3122 size = len + 8;
3123 /* Add a pointer for the personality offset. */
3124 if (frag->fr_offset)
3125 size += md.pointer_size;
73f20958
L		 3126
3127 /* fr_var carries the max_chars that we created the fragment with.
3128 We must, of course, have allocated enough memory earlier. */
3129 assert (frag->fr_var >= size);
3130
3131 /* Initialize the header area. fr_offset is initialized with
3132 unwind.personality_routine. */
3133 if (frag->fr_offset)
1cd8ff38
NC		 3134 {
3135 if (md.flags & EF_IA_64_ABI64)
3136 flag_value = (bfd_vma) 3 << 32;
3137 else
3138 /* 32-bit unwind info block. */
3139 flag_value = (bfd_vma) 0x1003 << 32;
3140 }
3141 else
3142 flag_value = 0;
557debba 3143
73f20958
L		 3144 md_number_to_chars (frag->fr_literal,
3145 (((bfd_vma) 1 << 48) /* Version. */
3146 | flag_value /* U & E handler flags. */
3147 | (len / md.pointer_size)), /* Length. */
3148 8);
557debba 3149
73f20958
L		 3150 /* Skip the header. */
3151 vbyte_mem_ptr = frag->fr_literal + 8;
3152 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 3153
3154 /* Fill the padding bytes with zeros. */
3155 if (pad != 0)
3156 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
3157 md.pointer_size - pad);
3158
73f20958
L		 3159 frag->fr_fix += size;
3160 frag->fr_type = rs_fill;
3161 frag->fr_var = 0;
3162 frag->fr_offset = 0;
800eeca4
JW		 3163}
3164
e0c9811a 3165static int
e4e8248d
JB		 3166parse_predicate_and_operand (e, qp, po)
3167 expressionS * e;
3168 unsigned * qp;
3169 const char * po;
3170{
3171 int sep = parse_operand (e, ',');
3172
3173 *qp = e->X_add_number - REG_P;
3174 if (e->X_op != O_register || *qp > 63)
3175 {
3176 as_bad ("First operand to .%s must be a predicate", po);
3177 *qp = 0;
3178 }
3179 else if (*qp == 0)
3180 as_warn ("Pointless use of p0 as first operand to .%s", po);
3181 if (sep == ',')
3182 sep = parse_operand (e, ',');
3183 else
3184 e->X_op = O_absent;
3185 return sep;
3186}
3187
3188static void
3189convert_expr_to_ab_reg (e, ab, regp, po, n)
3190 const expressionS *e;
e0c9811a
JW		 3191 unsigned int *ab;
3192 unsigned int *regp;
e4e8248d
JB		 3193 const char * po;
3194 int n;
e0c9811a 3195{
e4e8248d
JB		 3196 unsigned int reg = e->X_add_number;
3197
3198 *ab = *regp = 0; /* Anything valid is good here. */
e0c9811a
JW		 3199
3200 if (e->X_op != O_register)
e4e8248d 3201 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3202
2434f565 3203 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 3204 {
3205 *ab = 0;
3206 *regp = reg - REG_GR;
3207 }
2434f565
JW		 3208 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3209 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 3210 {
3211 *ab = 1;
3212 *regp = reg - REG_FR;
3213 }
2434f565 3214 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 3215 {
3216 *ab = 2;
3217 *regp = reg - REG_BR;
3218 }
3219 else
3220 {
3221 *ab = 3;
3222 switch (reg)
3223 {
3224 case REG_PR: *regp = 0; break;
3225 case REG_PSP: *regp = 1; break;
3226 case REG_PRIUNAT: *regp = 2; break;
3227 case REG_BR + 0: *regp = 3; break;
3228 case REG_AR + AR_BSP: *regp = 4; break;
3229 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3230 case REG_AR + AR_RNAT: *regp = 6; break;
3231 case REG_AR + AR_UNAT: *regp = 7; break;
3232 case REG_AR + AR_FPSR: *regp = 8; break;
3233 case REG_AR + AR_PFS: *regp = 9; break;
3234 case REG_AR + AR_LC: *regp = 10; break;
3235
3236 default:
e4e8248d
JB		 3237 as_bad ("Operand %d to .%s must be a preserved register", n, po);
3238 break;
e0c9811a
JW		 3239 }
3240 }
197865e8 3241}
e0c9811a 3242
e4e8248d
JB		 3243static void
3244convert_expr_to_xy_reg (e, xy, regp, po, n)
3245 const expressionS *e;
e0c9811a
JW		 3246 unsigned int *xy;
3247 unsigned int *regp;
e4e8248d
JB		 3248 const char * po;
3249 int n;
e0c9811a 3250{
e4e8248d 3251 unsigned int reg = e->X_add_number;
e0c9811a 3252
e4e8248d 3253 *xy = *regp = 0; /* Anything valid is good here. */
e0c9811a 3254
e4e8248d
JB		 3255 if (e->X_op != O_register)
3256 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3257
e4e8248d 3258 if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127))
e0c9811a
JW		 3259 {
3260 *xy = 0;
3261 *regp = reg - REG_GR;
3262 }
e4e8248d 3263 else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127))
e0c9811a
JW		 3264 {
3265 *xy = 1;
3266 *regp = reg - REG_FR;
3267 }
2434f565 3268 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3269 {
3270 *xy = 2;
3271 *regp = reg - REG_BR;
3272 }
3273 else
e4e8248d 3274 as_bad ("Operand %d to .%s must be a writable register", n, po);
197865e8 3275}
e0c9811a 3276
d9201763
L		 3277static void
3278dot_align (int arg)
3279{
3280 /* The current frag is an alignment frag. */
3281 align_frag = frag_now;
3282 s_align_bytes (arg);
3283}
3284
800eeca4
JW		 3285static void
3286dot_radix (dummy)
2434f565 3287 int dummy ATTRIBUTE_UNUSED;
800eeca4 3288{
fa30c84f
JB		 3289 char *radix;
3290 int ch;
800eeca4
JW		 3291
3292 SKIP_WHITESPACE ();
800eeca4 3293
fa30c84f
JB		 3294 if (is_it_end_of_statement ())
3295 return;
3296 radix = input_line_pointer;
3297 ch = get_symbol_end ();
3298 ia64_canonicalize_symbol_name (radix);
3299 if (strcasecmp (radix, "C"))
3300 as_bad ("Radix `%s' unsupported or invalid", radix);
3301 *input_line_pointer = ch;
3302 demand_empty_rest_of_line ();
800eeca4
JW		 3303}
3304
196e8040
JW		 3305/* Helper function for .loc directives. If the assembler is not generating
3306 line number info, then we need to remember which instructions have a .loc
3307 directive, and only call dwarf2_gen_line_info for those instructions. */
3308
3309static void
3310dot_loc (int x)
3311{
3312 CURR_SLOT.loc_directive_seen = 1;
3313 dwarf2_directive_loc (x);
3314}
3315
800eeca4
JW		 3316/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3317static void
3318dot_special_section (which)
3319 int which;
3320{
3321 set_section ((char *) special_section_name[which]);
3322}
3323
07450571
L		 3324/* Return -1 for warning and 0 for error. */
3325
3326static int
970d6792
L		 3327unwind_diagnostic (const char * region, const char *directive)
3328{
3329 if (md.unwind_check == unwind_check_warning)
07450571
L		 3330 {
3331 as_warn (".%s outside of %s", directive, region);
3332 return -1;
3333 }
970d6792
L		 3334 else
3335 {
3336 as_bad (".%s outside of %s", directive, region);
3337 ignore_rest_of_line ();
07450571 3338 return 0;
970d6792
L		 3339 }
3340}
3341
07450571
L		 3342/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3343 a procedure but the unwind directive check is set to warning, 0 if
3344 a directive isn't in a procedure and the unwind directive check is set
3345 to error. */
3346
75e09913
JB		 3347static int
3348in_procedure (const char *directive)
3349{
5656b6b8 3350 if (unwind.proc_pending.sym
75e09913
JB		 3351 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3352 return 1;
07450571 3353 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3354}
3355
07450571
L		 3356/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3357 a prologue but the unwind directive check is set to warning, 0 if
3358 a directive isn't in a prologue and the unwind directive check is set
3359 to error. */
3360
75e09913
JB		 3361static int
3362in_prologue (const char *directive)
3363{
07450571 3364 int in = in_procedure (directive);
ba825241
JB		 3365
3366 if (in > 0 && !unwind.prologue)
3367 in = unwind_diagnostic ("prologue", directive);
3368 check_pending_save ();
3369 return in;
75e09913
JB		 3370}
3371
07450571
L		 3372/* Return 1 if a directive is in a body, -1 if a directive isn't in
3373 a body but the unwind directive check is set to warning, 0 if
3374 a directive isn't in a body and the unwind directive check is set
3375 to error. */
3376
75e09913
JB		 3377static int
3378in_body (const char *directive)
3379{
07450571 3380 int in = in_procedure (directive);
ba825241
JB		 3381
3382 if (in > 0 && !unwind.body)
3383 in = unwind_diagnostic ("body region", directive);
3384 return in;
75e09913
JB		 3385}
3386
800eeca4 3387static void
e4e8248d 3388add_unwind_entry (ptr, sep)
800eeca4 3389 unw_rec_list *ptr;
e4e8248d 3390 int sep;
800eeca4 3391{
e4e8248d
JB		 3392 if (ptr)
3393 {
3394 if (unwind.tail)
3395 unwind.tail->next = ptr;
3396 else
3397 unwind.list = ptr;
3398 unwind.tail = ptr;
3399
3400 /* The current entry can in fact be a chain of unwind entries. */
3401 if (unwind.current_entry == NULL)
3402 unwind.current_entry = ptr;
3403 }
800eeca4
JW		 3404
3405 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3406 if (unwind.current_entry == NULL)
3407 unwind.current_entry = ptr;
e4e8248d
JB		 3408
3409 if (sep == ',')
3410 {
3411 /* Parse a tag permitted for the current directive. */
3412 int ch;
3413
3414 SKIP_WHITESPACE ();
3415 ch = get_symbol_end ();
3416 /* FIXME: For now, just issue a warning that this isn't implemented. */
3417 {
3418 static int warned;
3419
3420 if (!warned)
3421 {
3422 warned = 1;
3423 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3424 }
3425 }
3426 *input_line_pointer = ch;
3427 }
3428 if (sep != NOT_A_CHAR)
3429 demand_empty_rest_of_line ();
800eeca4
JW		 3430}
3431
197865e8 3432static void
800eeca4 3433dot_fframe (dummy)
2434f565 3434 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3435{
3436 expressionS e;
e4e8248d 3437 int sep;
e0c9811a 3438
75e09913
JB		 3439 if (!in_prologue ("fframe"))
3440 return;
3441
e4e8248d 3442 sep = parse_operand (&e, ',');
197865e8 3443
800eeca4 3444 if (e.X_op != O_constant)
e4e8248d
JB		 3445 {
3446 as_bad ("First operand to .fframe must be a constant");
3447 e.X_add_number = 0;
3448 }
3449 add_unwind_entry (output_mem_stack_f (e.X_add_number), sep);
e0c9811a
JW		 3450}
3451
197865e8 3452static void
e0c9811a 3453dot_vframe (dummy)
2434f565 3454 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3455{
3456 expressionS e;
3457 unsigned reg;
e4e8248d 3458 int sep;
e0c9811a 3459
75e09913
JB		 3460 if (!in_prologue ("vframe"))
3461 return;
3462
e4e8248d 3463 sep = parse_operand (&e, ',');
e0c9811a 3464 reg = e.X_add_number - REG_GR;
e4e8248d 3465 if (e.X_op != O_register || reg > 127)
800eeca4 3466 {
e4e8248d
JB		 3467 as_bad ("First operand to .vframe must be a general register");
3468 reg = 0;
800eeca4 3469 }
e4e8248d
JB		 3470 add_unwind_entry (output_mem_stack_v (), sep);
3471 if (! (unwind.prologue_mask & 2))
3472 add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR);
3473 else if (reg != unwind.prologue_gr
3474 + (unsigned) popcount (unwind.prologue_mask & (-2 << 1)))
3475 as_warn ("Operand of .vframe contradicts .prologue");
800eeca4
JW		 3476}
3477
197865e8 3478static void
e4e8248d
JB		 3479dot_vframesp (psp)
3480 int psp;
800eeca4 3481{
e0c9811a 3482 expressionS e;
e4e8248d 3483 int sep;
e0c9811a 3484
e4e8248d
JB		 3485 if (psp)
3486 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
e0c9811a 3487
e4e8248d 3488 if (!in_prologue ("vframesp"))
75e09913
JB		 3489 return;
3490
e4e8248d
JB		 3491 sep = parse_operand (&e, ',');
3492 if (e.X_op != O_constant)
e0c9811a 3493 {
e4e8248d
JB		 3494 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3495 e.X_add_number = 0;
e0c9811a 3496 }
e4e8248d
JB		 3497 add_unwind_entry (output_mem_stack_v (), sep);
3498 add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR);
800eeca4
JW		 3499}
3500
197865e8 3501static void
800eeca4 3502dot_save (dummy)
2434f565 3503 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3504{
3505 expressionS e1, e2;
e4e8248d 3506 unsigned reg1, reg2;
800eeca4 3507 int sep;
800eeca4 3508
75e09913
JB		 3509 if (!in_prologue ("save"))
3510 return;
3511
e4e8248d
JB		 3512 sep = parse_operand (&e1, ',');
3513 if (sep == ',')
3514 sep = parse_operand (&e2, ',');
3515 else
3516 e2.X_op = O_absent;
800eeca4 3517
e0c9811a 3518 reg1 = e1.X_add_number;
800eeca4 3519 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3520 if (e1.X_op != O_register)
800eeca4 3521 {
e4e8248d
JB		 3522 as_bad ("First operand to .save not a register");
3523 reg1 = REG_PR; /* Anything valid is good here. */
3524 }
3525 reg2 = e2.X_add_number - REG_GR;
3526 if (e2.X_op != O_register || reg2 > 127)
3527 {
3528 as_bad ("Second operand to .save not a valid register");
3529 reg2 = 0;
3530 }
3531 switch (reg1)
3532 {
3533 case REG_AR + AR_BSP:
3534 add_unwind_entry (output_bsp_when (), sep);
3535 add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR);
3536 break;
3537 case REG_AR + AR_BSPSTORE:
3538 add_unwind_entry (output_bspstore_when (), sep);
3539 add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR);
3540 break;
3541 case REG_AR + AR_RNAT:
3542 add_unwind_entry (output_rnat_when (), sep);
3543 add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR);
3544 break;
3545 case REG_AR + AR_UNAT:
3546 add_unwind_entry (output_unat_when (), sep);
3547 add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR);
3548 break;
3549 case REG_AR + AR_FPSR:
3550 add_unwind_entry (output_fpsr_when (), sep);
3551 add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR);
3552 break;
3553 case REG_AR + AR_PFS:
3554 add_unwind_entry (output_pfs_when (), sep);
3555 if (! (unwind.prologue_mask & 4))
3556 add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR);
3557 else if (reg2 != unwind.prologue_gr
3558 + (unsigned) popcount (unwind.prologue_mask & (-4 << 1)))
3559 as_warn ("Second operand of .save contradicts .prologue");
3560 break;
3561 case REG_AR + AR_LC:
3562 add_unwind_entry (output_lc_when (), sep);
3563 add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR);
3564 break;
3565 case REG_BR:
3566 add_unwind_entry (output_rp_when (), sep);
3567 if (! (unwind.prologue_mask & 8))
3568 add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR);
3569 else if (reg2 != unwind.prologue_gr)
3570 as_warn ("Second operand of .save contradicts .prologue");
3571 break;
3572 case REG_PR:
3573 add_unwind_entry (output_preds_when (), sep);
3574 if (! (unwind.prologue_mask & 1))
3575 add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR);
3576 else if (reg2 != unwind.prologue_gr
3577 + (unsigned) popcount (unwind.prologue_mask & (-1 << 1)))
3578 as_warn ("Second operand of .save contradicts .prologue");
3579 break;
3580 case REG_PRIUNAT:
3581 add_unwind_entry (output_priunat_when_gr (), sep);
3582 add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR);
3583 break;
3584 default:
3585 as_bad ("First operand to .save not a valid register");
3586 add_unwind_entry (NULL, sep);
3587 break;
800eeca4 3588 }
800eeca4
JW		 3589}
3590
197865e8 3591static void
800eeca4 3592dot_restore (dummy)
2434f565 3593 int dummy ATTRIBUTE_UNUSED;
800eeca4 3594{
e4e8248d 3595 expressionS e1;
33d01f33 3596 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3597 int sep;
3598
75e09913
JB		 3599 if (!in_body ("restore"))
3600 return;
3601
e4e8248d 3602 sep = parse_operand (&e1, ',');
e0c9811a 3603 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
e4e8248d 3604 as_bad ("First operand to .restore must be stack pointer (sp)");
e0c9811a
JW		 3605
3606 if (sep == ',')
3607 {
e4e8248d
JB		 3608 expressionS e2;
3609
3610 sep = parse_operand (&e2, ',');
33d01f33 3611 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3612 {
33d01f33 3613 as_bad ("Second operand to .restore must be a constant >= 0");
e4e8248d 3614 e2.X_add_number = 0;
e0c9811a 3615 }
33d01f33 3616 ecount = e2.X_add_number;
e0c9811a 3617 }
33d01f33
JW		 3618 else
3619 ecount = unwind.prologue_count - 1;
6290819d
NC		 3620
3621 if (ecount >= unwind.prologue_count)
3622 {
3623 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3624 ecount + 1, unwind.prologue_count);
e4e8248d 3625 ecount = 0;
6290819d
NC		 3626 }
3627
e4e8248d 3628 add_unwind_entry (output_epilogue (ecount), sep);
33d01f33
JW		 3629
3630 if (ecount < unwind.prologue_count)
3631 unwind.prologue_count -= ecount + 1;
3632 else
3633 unwind.prologue_count = 0;
e0c9811a
JW		 3634}
3635
197865e8 3636static void
e4e8248d
JB		 3637dot_restorereg (pred)
3638 int pred;
e0c9811a
JW		 3639{
3640 unsigned int qp, ab, reg;
e4e8248d 3641 expressionS e;
e0c9811a 3642 int sep;
e4e8248d 3643 const char * const po = pred ? "restorereg.p" : "restorereg";
e0c9811a 3644
e4e8248d 3645 if (!in_procedure (po))
75e09913
JB		 3646 return;
3647
e4e8248d
JB		 3648 if (pred)
3649 sep = parse_predicate_and_operand (&e, &qp, po);
3650 else
e0c9811a 3651 {
e4e8248d
JB		 3652 sep = parse_operand (&e, ',');
3653 qp = 0;
e0c9811a 3654 }
e4e8248d 3655 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 3656
e4e8248d 3657 add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
800eeca4
JW		 3658}
3659
2d6ed997
L		 3660static char *special_linkonce_name[] =
3661 {
3662 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3663 };
3664
3665static void
da9f89d4 3666start_unwind_section (const segT text_seg, int sec_index)
2d6ed997
L		 3667{
3668 /*
3669 Use a slightly ugly scheme to derive the unwind section names from
3670 the text section name:
3671
3672 text sect. unwind table sect.
3673 name: name: comments:
3674 ---------- ----------------- --------------------------------
3675 .text .IA_64.unwind
3676 .text.foo .IA_64.unwind.text.foo
3677 .foo .IA_64.unwind.foo
3678 .gnu.linkonce.t.foo
3679 .gnu.linkonce.ia64unw.foo
3680 _info .IA_64.unwind_info gas issues error message (ditto)
3681 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3682
3683 This mapping is done so that:
3684
3685 (a) An object file with unwind info only in .text will use
3686 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3687 This follows the letter of the ABI and also ensures backwards
3688 compatibility with older toolchains.
3689
3690 (b) An object file with unwind info in multiple text sections
3691 will use separate unwind sections for each text section.
3692 This allows us to properly set the "sh_info" and "sh_link"
3693 fields in SHT_IA_64_UNWIND as required by the ABI and also
3694 lets GNU ld support programs with multiple segments
3695 containing unwind info (as might be the case for certain
3696 embedded applications).
3697
3698 (c) An error is issued if there would be a name clash.
3699 */
3700
3701 const char *text_name, *sec_text_name;
3702 char *sec_name;
3703 const char *prefix = special_section_name [sec_index];
3704 const char *suffix;
3705 size_t prefix_len, suffix_len, sec_name_len;
3706
3707 sec_text_name = segment_name (text_seg);
3708 text_name = sec_text_name;
3709 if (strncmp (text_name, "_info", 5) == 0)
3710 {
3711 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3712 text_name);
3713 ignore_rest_of_line ();
3714 return;
3715 }
3716 if (strcmp (text_name, ".text") == 0)
3717 text_name = "";
3718
3719 /* Build the unwind section name by appending the (possibly stripped)
3720 text section name to the unwind prefix. */
3721 suffix = text_name;
3722 if (strncmp (text_name, ".gnu.linkonce.t.",
3723 sizeof (".gnu.linkonce.t.") - 1) == 0)
3724 {
3725 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3726 suffix += sizeof (".gnu.linkonce.t.") - 1;
3727 }
3728
3729 prefix_len = strlen (prefix);
3730 suffix_len = strlen (suffix);
3731 sec_name_len = prefix_len + suffix_len;
3732 sec_name = alloca (sec_name_len + 1);
3733 memcpy (sec_name, prefix, prefix_len);
3734 memcpy (sec_name + prefix_len, suffix, suffix_len);
3735 sec_name [sec_name_len] = '\0';
3736
3737 /* Handle COMDAT group. */
6e3f953d
L		 3738 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3739 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
2d6ed997
L		 3740 {
3741 char *section;
3742 size_t len, group_name_len;
3743 const char *group_name = elf_group_name (text_seg);
3744
3745 if (group_name == NULL)
3746 {
3747 as_bad ("Group section `%s' has no group signature",
3748 sec_text_name);
3749 ignore_rest_of_line ();
3750 return;
3751 }
3752 /* We have to construct a fake section directive. */
3753 group_name_len = strlen (group_name);
3754 len = (sec_name_len
3755 + 16 /* ,"aG",@progbits, */
3756 + group_name_len /* ,group_name */
3757 + 7); /* ,comdat */
3758
3759 section = alloca (len + 1);
3760 memcpy (section, sec_name, sec_name_len);
3761 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3762 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3763 memcpy (section + len - 7, ",comdat", 7);
3764 section [len] = '\0';
3765 set_section (section);
3766 }
3767 else
3768 {
3769 set_section (sec_name);
3770 bfd_set_section_flags (stdoutput, now_seg,
3771 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3772 }
38ce5b11
L		 3773
3774 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3775}
3776
73f20958 3777static void
2d6ed997 3778generate_unwind_image (const segT text_seg)
800eeca4 3779{
73f20958
L		 3780 int size, pad;
3781 unw_rec_list *list;
800eeca4 3782
c97b7ef6
JW		 3783 /* Mark the end of the unwind info, so that we can compute the size of the
3784 last unwind region. */
e4e8248d 3785 add_unwind_entry (output_endp (), NOT_A_CHAR);
c97b7ef6 3786
10850f29
JW		 3787 /* Force out pending instructions, to make sure all unwind records have
3788 a valid slot_number field. */
3789 ia64_flush_insns ();
3790
800eeca4 3791 /* Generate the unwind record. */
73f20958 3792 list = optimize_unw_records (unwind.list);
b5e0fabd 3793 fixup_unw_records (list, 1);
73f20958
L		 3794 size = calc_record_size (list);
3795
3796 if (size > 0 || unwind.force_unwind_entry)
3797 {
3798 unwind.force_unwind_entry = 0;
3799 /* pad to pointer-size boundary. */
3800 pad = size % md.pointer_size;
3801 if (pad != 0)
3802 size += md.pointer_size - pad;
f7e323d5
JB		 3803 /* Add 8 for the header. */
3804 size += 8;
3805 /* Add a pointer for the personality offset. */
3806 if (unwind.personality_routine)
3807 size += md.pointer_size;
73f20958 3808 }
6290819d 3809
800eeca4
JW		 3810 /* If there are unwind records, switch sections, and output the info. */
3811 if (size != 0)
3812 {
800eeca4 3813 expressionS exp;
1cd8ff38 3814 bfd_reloc_code_real_type reloc;
91a2ae2a 3815
da9f89d4 3816 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3817
557debba
JW		 3818 /* Make sure the section has 4 byte alignment for ILP32 and
3819 8 byte alignment for LP64. */
3820 frag_align (md.pointer_size_shift, 0, 0);
3821 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3822
800eeca4 3823 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3824 unwind.info = expr_build_dot ();
73f20958
L		 3825
3826 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3827 (offsetT) (long) unwind.personality_routine,
3828 (char *) list);
91a2ae2a 3829
800eeca4 3830 /* Add the personality address to the image. */
e0c9811a 3831 if (unwind.personality_routine != 0)
542d6675 3832 {
40449e9f 3833 exp.X_op = O_symbol;
e0c9811a 3834 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3835 exp.X_add_number = 0;
1cd8ff38
NC		 3836
3837 if (md.flags & EF_IA_64_BE)
3838 {
3839 if (md.flags & EF_IA_64_ABI64)
3840 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3841 else
3842 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3843 }
40449e9f 3844 else
1cd8ff38
NC		 3845 {
3846 if (md.flags & EF_IA_64_ABI64)
3847 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3848 else
3849 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3850 }
3851
3852 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3853 md.pointer_size, &exp, 0, reloc);
e0c9811a 3854 unwind.personality_routine = 0;
542d6675 3855 }
800eeca4
JW		 3856 }
3857
6290819d 3858 free_saved_prologue_counts ();
e0c9811a 3859 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3860}
3861
197865e8 3862static void
542d6675 3863dot_handlerdata (dummy)
2434f565 3864 int dummy ATTRIBUTE_UNUSED;
800eeca4 3865{
75e09913
JB		 3866 if (!in_procedure ("handlerdata"))
3867 return;
91a2ae2a
RH		 3868 unwind.force_unwind_entry = 1;
3869
3870 /* Remember which segment we're in so we can switch back after .endp */
3871 unwind.saved_text_seg = now_seg;
3872 unwind.saved_text_subseg = now_subseg;
3873
3874 /* Generate unwind info into unwind-info section and then leave that
3875 section as the currently active one so dataXX directives go into
3876 the language specific data area of the unwind info block. */
2d6ed997 3877 generate_unwind_image (now_seg);
e0c9811a 3878 demand_empty_rest_of_line ();
800eeca4
JW		 3879}
3880
197865e8 3881static void
800eeca4 3882dot_unwentry (dummy)
2434f565 3883 int dummy ATTRIBUTE_UNUSED;
800eeca4 3884{
75e09913
JB		 3885 if (!in_procedure ("unwentry"))
3886 return;
91a2ae2a 3887 unwind.force_unwind_entry = 1;
e0c9811a 3888 demand_empty_rest_of_line ();
800eeca4
JW		 3889}
3890
197865e8 3891static void
800eeca4 3892dot_altrp (dummy)
2434f565 3893 int dummy ATTRIBUTE_UNUSED;
800eeca4 3894{
e0c9811a
JW		 3895 expressionS e;
3896 unsigned reg;
3897
75e09913
JB		 3898 if (!in_prologue ("altrp"))
3899 return;
3900
e4e8248d 3901 parse_operand (&e, 0);
e0c9811a 3902 reg = e.X_add_number - REG_BR;
e4e8248d
JB		 3903 if (e.X_op != O_register || reg > 7)
3904 {
3905 as_bad ("First operand to .altrp not a valid branch register");
3906 reg = 0;
3907 }
3908 add_unwind_entry (output_rp_br (reg), 0);
800eeca4
JW		 3909}
3910
197865e8 3911static void
e0c9811a
JW		 3912dot_savemem (psprel)
3913 int psprel;
800eeca4
JW		 3914{
3915 expressionS e1, e2;
3916 int sep;
3917 int reg1, val;
e4e8248d 3918 const char * const po = psprel ? "savepsp" : "savesp";
800eeca4 3919
e4e8248d 3920 if (!in_prologue (po))
75e09913
JB		 3921 return;
3922
e4e8248d
JB		 3923 sep = parse_operand (&e1, ',');
3924 if (sep == ',')
3925 sep = parse_operand (&e2, ',');
3926 else
3927 e2.X_op = O_absent;
800eeca4 3928
e0c9811a 3929 reg1 = e1.X_add_number;
800eeca4 3930 val = e2.X_add_number;
197865e8 3931
800eeca4 3932 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3933 if (e1.X_op != O_register)
800eeca4 3934 {
e4e8248d
JB		 3935 as_bad ("First operand to .%s not a register", po);
3936 reg1 = REG_PR; /* Anything valid is good here. */
3937 }
3938 if (e2.X_op != O_constant)
3939 {
3940 as_bad ("Second operand to .%s not a constant", po);
3941 val = 0;
3942 }
3943
3944 switch (reg1)
3945 {
3946 case REG_AR + AR_BSP:
3947 add_unwind_entry (output_bsp_when (), sep);
3948 add_unwind_entry ((psprel
3949 ? output_bsp_psprel
3950 : output_bsp_sprel) (val), NOT_A_CHAR);
3951 break;
3952 case REG_AR + AR_BSPSTORE:
3953 add_unwind_entry (output_bspstore_when (), sep);
3954 add_unwind_entry ((psprel
3955 ? output_bspstore_psprel
3956 : output_bspstore_sprel) (val), NOT_A_CHAR);
3957 break;
3958 case REG_AR + AR_RNAT:
3959 add_unwind_entry (output_rnat_when (), sep);
3960 add_unwind_entry ((psprel
3961 ? output_rnat_psprel
3962 : output_rnat_sprel) (val), NOT_A_CHAR);
3963 break;
3964 case REG_AR + AR_UNAT:
3965 add_unwind_entry (output_unat_when (), sep);
3966 add_unwind_entry ((psprel
3967 ? output_unat_psprel
3968 : output_unat_sprel) (val), NOT_A_CHAR);
3969 break;
3970 case REG_AR + AR_FPSR:
3971 add_unwind_entry (output_fpsr_when (), sep);
3972 add_unwind_entry ((psprel
3973 ? output_fpsr_psprel
3974 : output_fpsr_sprel) (val), NOT_A_CHAR);
3975 break;
3976 case REG_AR + AR_PFS:
3977 add_unwind_entry (output_pfs_when (), sep);
3978 add_unwind_entry ((psprel
3979 ? output_pfs_psprel
3980 : output_pfs_sprel) (val), NOT_A_CHAR);
3981 break;
3982 case REG_AR + AR_LC:
3983 add_unwind_entry (output_lc_when (), sep);
3984 add_unwind_entry ((psprel
3985 ? output_lc_psprel
3986 : output_lc_sprel) (val), NOT_A_CHAR);
3987 break;
3988 case REG_BR:
3989 add_unwind_entry (output_rp_when (), sep);
3990 add_unwind_entry ((psprel
3991 ? output_rp_psprel
3992 : output_rp_sprel) (val), NOT_A_CHAR);
3993 break;
3994 case REG_PR:
3995 add_unwind_entry (output_preds_when (), sep);
3996 add_unwind_entry ((psprel
3997 ? output_preds_psprel
3998 : output_preds_sprel) (val), NOT_A_CHAR);
3999 break;
4000 case REG_PRIUNAT:
4001 add_unwind_entry (output_priunat_when_mem (), sep);
4002 add_unwind_entry ((psprel
4003 ? output_priunat_psprel
4004 : output_priunat_sprel) (val), NOT_A_CHAR);
4005 break;
4006 default:
4007 as_bad ("First operand to .%s not a valid register", po);
4008 add_unwind_entry (NULL, sep);
4009 break;
800eeca4 4010 }
800eeca4
JW		 4011}
4012
197865e8 4013static void
800eeca4 4014dot_saveg (dummy)
2434f565 4015 int dummy ATTRIBUTE_UNUSED;
800eeca4 4016{
e4e8248d
JB		 4017 expressionS e;
4018 unsigned grmask;
800eeca4 4019 int sep;
75e09913
JB		 4020
4021 if (!in_prologue ("save.g"))
4022 return;
4023
e4e8248d 4024 sep = parse_operand (&e, ',');
197865e8 4025
e4e8248d
JB		 4026 grmask = e.X_add_number;
4027 if (e.X_op != O_constant
4028 || e.X_add_number <= 0
4029 || e.X_add_number > 0xf)
800eeca4 4030 {
e4e8248d
JB		 4031 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4032 grmask = 0;
4033 }
4034
4035 if (sep == ',')
4036 {
4037 unsigned reg;
4038 int n = popcount (grmask);
4039
4040 parse_operand (&e, 0);
4041 reg = e.X_add_number - REG_GR;
4042 if (e.X_op != O_register || reg > 127)
542d6675 4043 {
e4e8248d
JB		 4044 as_bad ("Second operand to .save.g must be a general register");
4045 reg = 0;
4046 }
4047 else if (reg > 128U - n)
4048 {
4049 as_bad ("Second operand to .save.g must be the first of %d general registers", n);
4050 reg = 0;
800eeca4 4051 }
e4e8248d 4052 add_unwind_entry (output_gr_gr (grmask, reg), 0);
800eeca4 4053 }
e4e8248d
JB		 4054 else
4055 add_unwind_entry (output_gr_mem (grmask), 0);
800eeca4
JW		 4056}
4057
197865e8 4058static void
800eeca4 4059dot_savef (dummy)
2434f565 4060 int dummy ATTRIBUTE_UNUSED;
800eeca4 4061{
e4e8248d 4062 expressionS e;
75e09913
JB		 4063
4064 if (!in_prologue ("save.f"))
4065 return;
4066
e4e8248d 4067 parse_operand (&e, 0);
197865e8 4068
e4e8248d
JB		 4069 if (e.X_op != O_constant
4070 || e.X_add_number <= 0
4071 || e.X_add_number > 0xfffff)
4072 {
4073 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4074 e.X_add_number = 0;
4075 }
4076 add_unwind_entry (output_fr_mem (e.X_add_number), 0);
800eeca4
JW		 4077}
4078
197865e8 4079static void
800eeca4 4080dot_saveb (dummy)
2434f565 4081 int dummy ATTRIBUTE_UNUSED;
800eeca4 4082{
e4e8248d
JB		 4083 expressionS e;
4084 unsigned brmask;
4085 int sep;
e0c9811a 4086
75e09913
JB		 4087 if (!in_prologue ("save.b"))
4088 return;
4089
e4e8248d
JB		 4090 sep = parse_operand (&e, ',');
4091
4092 brmask = e.X_add_number;
4093 if (e.X_op != O_constant
4094 || e.X_add_number <= 0
4095 || e.X_add_number > 0x1f)
800eeca4 4096 {
e4e8248d
JB		 4097 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4098 brmask = 0;
800eeca4 4099 }
e0c9811a
JW		 4100
4101 if (sep == ',')
4102 {
e4e8248d
JB		 4103 unsigned reg;
4104 int n = popcount (brmask);
4105
4106 parse_operand (&e, 0);
4107 reg = e.X_add_number - REG_GR;
4108 if (e.X_op != O_register || reg > 127)
e0c9811a 4109 {
e4e8248d
JB		 4110 as_bad ("Second operand to .save.b must be a general register");
4111 reg = 0;
e0c9811a 4112 }
e4e8248d
JB		 4113 else if (reg > 128U - n)
4114 {
4115 as_bad ("Second operand to .save.b must be the first of %d general registers", n);
4116 reg = 0;
4117 }
4118 add_unwind_entry (output_br_gr (brmask, reg), 0);
e0c9811a
JW		 4119 }
4120 else
e4e8248d 4121 add_unwind_entry (output_br_mem (brmask), 0);
800eeca4
JW		 4122}
4123
197865e8 4124static void
800eeca4 4125dot_savegf (dummy)
2434f565 4126 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4127{
4128 expressionS e1, e2;
75e09913
JB		 4129
4130 if (!in_prologue ("save.gf"))
4131 return;
4132
e4e8248d
JB		 4133 if (parse_operand (&e1, ',') == ',')
4134 parse_operand (&e2, 0);
800eeca4 4135 else
e4e8248d
JB		 4136 e2.X_op = O_absent;
4137
4138 if (e1.X_op != O_constant
4139 || e1.X_add_number < 0
4140 || e1.X_add_number > 0xf)
4141 {
4142 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4143 e1.X_op = O_absent;
4144 e1.X_add_number = 0;
4145 }
4146 if (e2.X_op != O_constant
4147 || e2.X_add_number < 0
4148 || e2.X_add_number > 0xfffff)
800eeca4 4149 {
e4e8248d
JB		 4150 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4151 e2.X_op = O_absent;
4152 e2.X_add_number = 0;
800eeca4 4153 }
e4e8248d
JB		 4154 if (e1.X_op == O_constant
4155 && e2.X_op == O_constant
4156 && e1.X_add_number == 0
4157 && e2.X_add_number == 0)
4158 as_bad ("Operands to .save.gf may not be both zero");
4159
4160 add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4161}
4162
197865e8 4163static void
800eeca4 4164dot_spill (dummy)
2434f565 4165 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4166{
4167 expressionS e;
e0c9811a 4168
75e09913
JB		 4169 if (!in_prologue ("spill"))
4170 return;
4171
e4e8248d 4172 parse_operand (&e, 0);
197865e8 4173
800eeca4 4174 if (e.X_op != O_constant)
800eeca4 4175 {
e4e8248d
JB		 4176 as_bad ("Operand to .spill must be a constant");
4177 e.X_add_number = 0;
e0c9811a 4178 }
e4e8248d 4179 add_unwind_entry (output_spill_base (e.X_add_number), 0);
e0c9811a
JW		 4180}
4181
4182static void
e4e8248d
JB		 4183dot_spillreg (pred)
4184 int pred;
e0c9811a 4185{
2132e3a3 4186 int sep;
e4e8248d
JB		 4187 unsigned int qp, ab, xy, reg, treg;
4188 expressionS e;
4189 const char * const po = pred ? "spillreg.p" : "spillreg";
e0c9811a 4190
e4e8248d 4191 if (!in_procedure (po))
75e09913
JB		 4192 return;
4193
e4e8248d
JB		 4194 if (pred)
4195 sep = parse_predicate_and_operand (&e, &qp, po);
e0c9811a 4196 else
e0c9811a 4197 {
e4e8248d
JB		 4198 sep = parse_operand (&e, ',');
4199 qp = 0;
e0c9811a 4200 }
e4e8248d 4201 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4202
e4e8248d
JB		 4203 if (sep == ',')
4204 sep = parse_operand (&e, ',');
4205 else
4206 e.X_op = O_absent;
4207 convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred);
e0c9811a 4208
e4e8248d 4209 add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep);
e0c9811a
JW		 4210}
4211
4212static void
e4e8248d 4213dot_spillmem (psprel)
e0c9811a
JW		 4214 int psprel;
4215{
e4e8248d
JB		 4216 expressionS e;
4217 int pred = (psprel < 0), sep;
4218 unsigned int qp, ab, reg;
4219 const char * po;
e0c9811a 4220
e4e8248d 4221 if (pred)
e0c9811a 4222 {
e4e8248d
JB		 4223 psprel = ~psprel;
4224 po = psprel ? "spillpsp.p" : "spillsp.p";
e0c9811a 4225 }
e4e8248d
JB		 4226 else
4227 po = psprel ? "spillpsp" : "spillsp";
e0c9811a 4228
e4e8248d
JB		 4229 if (!in_procedure (po))
4230 return;
e0c9811a 4231
e4e8248d
JB		 4232 if (pred)
4233 sep = parse_predicate_and_operand (&e, &qp, po);
4234 else
e0c9811a 4235 {
e4e8248d
JB		 4236 sep = parse_operand (&e, ',');
4237 qp = 0;
e0c9811a 4238 }
e4e8248d 4239 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4240
e4e8248d
JB		 4241 if (sep == ',')
4242 sep = parse_operand (&e, ',');
4243 else
4244 e.X_op = O_absent;
4245 if (e.X_op != O_constant)
e0c9811a 4246 {
e4e8248d
JB		 4247 as_bad ("Operand %d to .%s must be a constant", 2 + pred, po);
4248 e.X_add_number = 0;
e0c9811a
JW		 4249 }
4250
4251 if (psprel)
e4e8248d 4252 add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a 4253 else
e4e8248d 4254 add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a
JW		 4255}
4256
6290819d
NC		 4257static unsigned int
4258get_saved_prologue_count (lbl)
4259 unsigned long lbl;
4260{
4261 label_prologue_count *lpc = unwind.saved_prologue_counts;
4262
4263 while (lpc != NULL && lpc->label_number != lbl)
4264 lpc = lpc->next;
4265
4266 if (lpc != NULL)
4267 return lpc->prologue_count;
4268
4269 as_bad ("Missing .label_state %ld", lbl);
4270 return 1;
4271}
4272
4273static void
4274save_prologue_count (lbl, count)
4275 unsigned long lbl;
4276 unsigned int count;
4277{
4278 label_prologue_count *lpc = unwind.saved_prologue_counts;
4279
4280 while (lpc != NULL && lpc->label_number != lbl)
4281 lpc = lpc->next;
4282
4283 if (lpc != NULL)
4284 lpc->prologue_count = count;
4285 else
4286 {
40449e9f 4287 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4288
4289 new_lpc->next = unwind.saved_prologue_counts;
4290 new_lpc->label_number = lbl;
4291 new_lpc->prologue_count = count;
4292 unwind.saved_prologue_counts = new_lpc;
4293 }
4294}
4295
4296static void
4297free_saved_prologue_counts ()
4298{
40449e9f
KH		 4299 label_prologue_count *lpc = unwind.saved_prologue_counts;
4300 label_prologue_count *next;
6290819d
NC		 4301
4302 while (lpc != NULL)
4303 {
4304 next = lpc->next;
4305 free (lpc);
4306 lpc = next;
4307 }
4308
4309 unwind.saved_prologue_counts = NULL;
4310}
4311
e0c9811a
JW		 4312static void
4313dot_label_state (dummy)
2434f565 4314 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4315{
4316 expressionS e;
4317
75e09913
JB		 4318 if (!in_body ("label_state"))
4319 return;
4320
e4e8248d
JB		 4321 parse_operand (&e, 0);
4322 if (e.X_op == O_constant)
4323 save_prologue_count (e.X_add_number, unwind.prologue_count);
4324 else
e0c9811a
JW		 4325 {
4326 as_bad ("Operand to .label_state must be a constant");
e4e8248d 4327 e.X_add_number = 0;
e0c9811a 4328 }
e4e8248d 4329 add_unwind_entry (output_label_state (e.X_add_number), 0);
e0c9811a
JW		 4330}
4331
4332static void
4333dot_copy_state (dummy)
2434f565 4334 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4335{
4336 expressionS e;
4337
75e09913
JB		 4338 if (!in_body ("copy_state"))
4339 return;
4340
e4e8248d
JB		 4341 parse_operand (&e, 0);
4342 if (e.X_op == O_constant)
4343 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4344 else
e0c9811a
JW		 4345 {
4346 as_bad ("Operand to .copy_state must be a constant");
e4e8248d 4347 e.X_add_number = 0;
e0c9811a 4348 }
e4e8248d 4349 add_unwind_entry (output_copy_state (e.X_add_number), 0);
800eeca4
JW		 4350}
4351
197865e8 4352static void
800eeca4 4353dot_unwabi (dummy)
2434f565 4354 int dummy ATTRIBUTE_UNUSED;
800eeca4 4355{
e0c9811a
JW		 4356 expressionS e1, e2;
4357 unsigned char sep;
4358
e4e8248d 4359 if (!in_prologue ("unwabi"))
75e09913
JB		 4360 return;
4361
e4e8248d
JB		 4362 sep = parse_operand (&e1, ',');
4363 if (sep == ',')
4364 parse_operand (&e2, 0);
4365 else
4366 e2.X_op = O_absent;
e0c9811a
JW		 4367
4368 if (e1.X_op != O_constant)
4369 {
4370 as_bad ("First operand to .unwabi must be a constant");
e4e8248d 4371 e1.X_add_number = 0;
e0c9811a
JW		 4372 }
4373
4374 if (e2.X_op != O_constant)
4375 {
4376 as_bad ("Second operand to .unwabi must be a constant");
e4e8248d 4377 e2.X_add_number = 0;
e0c9811a
JW		 4378 }
4379
e4e8248d 4380 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4381}
4382
197865e8 4383static void
800eeca4 4384dot_personality (dummy)
2434f565 4385 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4386{
4387 char *name, *p, c;
75e09913
JB		 4388 if (!in_procedure ("personality"))
4389 return;
800eeca4
JW		 4390 SKIP_WHITESPACE ();
4391 name = input_line_pointer;
4392 c = get_symbol_end ();
4393 p = input_line_pointer;
e0c9811a 4394 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4395 unwind.force_unwind_entry = 1;
800eeca4
JW		 4396 *p = c;
4397 SKIP_WHITESPACE ();
4398 demand_empty_rest_of_line ();
4399}
4400
4401static void
4402dot_proc (dummy)
2434f565 4403 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4404{
4405 char *name, *p, c;
4406 symbolS *sym;
5656b6b8
JB		 4407 proc_pending *pending, *last_pending;
4408
4409 if (unwind.proc_pending.sym)
4410 {
4411 (md.unwind_check == unwind_check_warning
4412 ? as_warn
4413 : as_bad) ("Missing .endp after previous .proc");
4414 while (unwind.proc_pending.next)
4415 {
4416 pending = unwind.proc_pending.next;
4417 unwind.proc_pending.next = pending->next;
4418 free (pending);
4419 }
4420 }
4421 last_pending = NULL;
800eeca4 4422
e0c9811a 4423 /* Parse names of main and alternate entry points and mark them as
542d6675 4424 function symbols: */
800eeca4
JW		 4425 while (1)
4426 {
4427 SKIP_WHITESPACE ();
4428 name = input_line_pointer;
4429 c = get_symbol_end ();
4430 p = input_line_pointer;
75e09913
JB		 4431 if (!*name)
4432 as_bad ("Empty argument of .proc");
4433 else
542d6675 4434 {
75e09913
JB		 4435 sym = symbol_find_or_make (name);
4436 if (S_IS_DEFINED (sym))
4437 as_bad ("`%s' was already defined", name);
5656b6b8
JB		 4438 else if (!last_pending)
4439 {
4440 unwind.proc_pending.sym = sym;
4441 last_pending = &unwind.proc_pending;
4442 }
4443 else
75e09913 4444 {
5656b6b8
JB		 4445 pending = xmalloc (sizeof (*pending));
4446 pending->sym = sym;
4447 last_pending = last_pending->next = pending;
75e09913
JB		 4448 }
4449 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4450 }
800eeca4
JW		 4451 *p = c;
4452 SKIP_WHITESPACE ();
4453 if (*input_line_pointer != ',')
4454 break;
4455 ++input_line_pointer;
4456 }
5656b6b8
JB		 4457 if (!last_pending)
4458 {
4459 unwind.proc_pending.sym = expr_build_dot ();
4460 last_pending = &unwind.proc_pending;
4461 }
4462 last_pending->next = NULL;
800eeca4
JW		 4463 demand_empty_rest_of_line ();
4464 ia64_do_align (16);
4465
75e09913 4466 unwind.prologue = 0;
33d01f33 4467 unwind.prologue_count = 0;
75e09913
JB		 4468 unwind.body = 0;
4469 unwind.insn = 0;
e0c9811a
JW		 4470 unwind.list = unwind.tail = unwind.current_entry = NULL;
4471 unwind.personality_routine = 0;
800eeca4
JW		 4472}
4473
4474static void
4475dot_body (dummy)
2434f565 4476 int dummy ATTRIBUTE_UNUSED;
800eeca4 4477{
75e09913
JB		 4478 if (!in_procedure ("body"))
4479 return;
4480 if (!unwind.prologue && !unwind.body && unwind.insn)
4481 as_warn ("Initial .body should precede any instructions");
ba825241 4482 check_pending_save ();
75e09913 4483
e0c9811a 4484 unwind.prologue = 0;
30d25259 4485 unwind.prologue_mask = 0;
75e09913 4486 unwind.body = 1;
30d25259 4487
e4e8248d 4488 add_unwind_entry (output_body (), 0);
800eeca4
JW		 4489}
4490
4491static void
4492dot_prologue (dummy)
2434f565 4493 int dummy ATTRIBUTE_UNUSED;
800eeca4 4494{
e4e8248d 4495 unsigned mask = 0, grsave = 0;
e0c9811a 4496
75e09913
JB		 4497 if (!in_procedure ("prologue"))
4498 return;
4499 if (unwind.prologue)
4500 {
4501 as_bad (".prologue within prologue");
4502 ignore_rest_of_line ();
4503 return;
4504 }
4505 if (!unwind.body && unwind.insn)
4506 as_warn ("Initial .prologue should precede any instructions");
4507
e0c9811a 4508 if (!is_it_end_of_statement ())
800eeca4 4509 {
e4e8248d
JB		 4510 expressionS e;
4511 int n, sep = parse_operand (&e, ',');
30d25259 4512
e4e8248d
JB		 4513 if (e.X_op != O_constant
4514 || e.X_add_number < 0
4515 || e.X_add_number > 0xf)
4516 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4517 else if (e.X_add_number == 0)
4518 as_warn ("Pointless use of zero first operand to .prologue");
4519 else
4520 mask = e.X_add_number;
4521 n = popcount (mask);
30d25259 4522
e4e8248d
JB		 4523 if (sep == ',')
4524 parse_operand (&e, 0);
800eeca4 4525 else
e4e8248d
JB		 4526 e.X_op = O_absent;
4527 if (e.X_op == O_constant
4528 && e.X_add_number >= 0
4529 && e.X_add_number < 128)
4530 {
4531 if (md.unwind_check == unwind_check_error)
4532 as_warn ("Using a constant as second operand to .prologue is deprecated");
4533 grsave = e.X_add_number;
4534 }
4535 else if (e.X_op != O_register
4536 || (grsave = e.X_add_number - REG_GR) > 127)
4537 {
4538 as_bad ("Second operand to .prologue must be a general register");
4539 grsave = 0;
4540 }
4541 else if (grsave > 128U - n)
4542 {
4543 as_bad ("Second operand to .prologue must be the first of %d general registers", n);
4544 grsave = 0;
4545 }
4546
800eeca4 4547 }
e4e8248d
JB		 4548
4549 if (mask)
4550 add_unwind_entry (output_prologue_gr (mask, grsave), 0);
800eeca4 4551 else
e4e8248d 4552 add_unwind_entry (output_prologue (), 0);
30d25259
RH		 4553
4554 unwind.prologue = 1;
4555 unwind.prologue_mask = mask;
e4e8248d 4556 unwind.prologue_gr = grsave;
75e09913 4557 unwind.body = 0;
33d01f33 4558 ++unwind.prologue_count;
800eeca4
JW		 4559}
4560
4561static void
4562dot_endp (dummy)
2434f565 4563 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4564{
4565 expressionS e;
44f5c83a 4566 int bytes_per_address;
800eeca4
JW		 4567 long where;
4568 segT saved_seg;
4569 subsegT saved_subseg;
5656b6b8 4570 proc_pending *pending;
970d6792 4571 int unwind_check = md.unwind_check;
800eeca4 4572
970d6792 4573 md.unwind_check = unwind_check_error;
75e09913
JB		 4574 if (!in_procedure ("endp"))
4575 return;
970d6792 4576 md.unwind_check = unwind_check;
75e09913 4577
91a2ae2a
RH		 4578 if (unwind.saved_text_seg)
4579 {
4580 saved_seg = unwind.saved_text_seg;
4581 saved_subseg = unwind.saved_text_subseg;
4582 unwind.saved_text_seg = NULL;
4583 }
4584 else
4585 {
4586 saved_seg = now_seg;
4587 saved_subseg = now_subseg;
4588 }
4589
800eeca4 4590 insn_group_break (1, 0, 0);
800eeca4 4591
91a2ae2a
RH		 4592 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4593 if (!unwind.info)
2d6ed997 4594 generate_unwind_image (saved_seg);
800eeca4 4595
91a2ae2a
RH		 4596 if (unwind.info || unwind.force_unwind_entry)
4597 {
75e09913
JB		 4598 symbolS *proc_end;
4599
91a2ae2a 4600 subseg_set (md.last_text_seg, 0);
75e09913 4601 proc_end = expr_build_dot ();
5e7474a7 4602
da9f89d4 4603 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4604
557debba
JW		 4605 /* Make sure that section has 4 byte alignment for ILP32 and
4606 8 byte alignment for LP64. */
4607 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4608
557debba
JW		 4609 /* Need space for 3 pointers for procedure start, procedure end,
4610 and unwind info. */
6baf2b51 4611 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size);
557debba 4612 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4613 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4614
40449e9f 4615 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4616 e.X_op = O_pseudo_fixup;
4617 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4618 e.X_add_number = 0;
5656b6b8
JB		 4619 if (!S_IS_LOCAL (unwind.proc_pending.sym)
4620 && S_IS_DEFINED (unwind.proc_pending.sym))
4621 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym),
4622 S_GET_VALUE (unwind.proc_pending.sym),
4623 symbol_get_frag (unwind.proc_pending.sym));
4600db48 4624 else
5656b6b8 4625 e.X_add_symbol = unwind.proc_pending.sym;
91a2ae2a 4626 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4627
800eeca4
JW		 4628 e.X_op = O_pseudo_fixup;
4629 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4630 e.X_add_number = 0;
75e09913 4631 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4632 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4633 bytes_per_address, &e);
4634
4635 if (unwind.info)
4636 {
4637 e.X_op = O_pseudo_fixup;
4638 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4639 e.X_add_number = 0;
4640 e.X_add_symbol = unwind.info;
4641 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4642 bytes_per_address, &e);
4643 }
91a2ae2a 4644 }
800eeca4 4645 subseg_set (saved_seg, saved_subseg);
c538998c 4646
5656b6b8
JB		 4647 /* Set symbol sizes. */
4648 pending = &unwind.proc_pending;
4649 if (S_GET_NAME (pending->sym))
c538998c 4650 {
5656b6b8 4651 do
75e09913 4652 {
5656b6b8
JB		 4653 symbolS *sym = pending->sym;
4654
4655 if (!S_IS_DEFINED (sym))
4656 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym));
4657 else if (S_GET_SIZE (sym) == 0
4658 && symbol_get_obj (sym)->size == NULL)
75e09913 4659 {
75e09913
JB		 4660 fragS *frag = symbol_get_frag (sym);
4661
5656b6b8 4662 if (frag)
c538998c 4663 {
75e09913
JB		 4664 if (frag == frag_now && SEG_NORMAL (now_seg))
4665 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4666 else
4667 {
4668 symbol_get_obj (sym)->size =
4669 (expressionS *) xmalloc (sizeof (expressionS));
4670 symbol_get_obj (sym)->size->X_op = O_subtract;
4671 symbol_get_obj (sym)->size->X_add_symbol
4672 = symbol_new (FAKE_LABEL_NAME, now_seg,
4673 frag_now_fix (), frag_now);
4674 symbol_get_obj (sym)->size->X_op_symbol = sym;
4675 symbol_get_obj (sym)->size->X_add_number = 0;
4676 }
c538998c
JJ		 4677 }
4678 }
5656b6b8
JB		 4679 } while ((pending = pending->next) != NULL);
4680 }
4681
4682 /* Parse names of main and alternate entry points. */
4683 while (1)
4684 {
4685 char *name, *p, c;
4686
4687 SKIP_WHITESPACE ();
4688 name = input_line_pointer;
4689 c = get_symbol_end ();
4690 p = input_line_pointer;
4691 if (!*name)
4692 (md.unwind_check == unwind_check_warning
4693 ? as_warn
4694 : as_bad) ("Empty argument of .endp");
4695 else
4696 {
4697 symbolS *sym = symbol_find (name);
4698
4699 for (pending = &unwind.proc_pending; pending; pending = pending->next)
4700 {
4701 if (sym == pending->sym)
4702 {
4703 pending->sym = NULL;
4704 break;
4705 }
4706 }
4707 if (!sym || !pending)
4708 as_warn ("`%s' was not specified with previous .proc", name);
c538998c
JJ		 4709 }
4710 *p = c;
4711 SKIP_WHITESPACE ();
4712 if (*input_line_pointer != ',')
4713 break;
4714 ++input_line_pointer;
4715 }
4716 demand_empty_rest_of_line ();
5656b6b8
JB		 4717
4718 /* Deliberately only checking for the main entry point here; the
4719 language spec even says all arguments to .endp are ignored. */
4720 if (unwind.proc_pending.sym
4721 && S_GET_NAME (unwind.proc_pending.sym)
4722 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME))
4723 as_warn ("`%s' should be an operand to this .endp",
4724 S_GET_NAME (unwind.proc_pending.sym));
4725 while (unwind.proc_pending.next)
4726 {
4727 pending = unwind.proc_pending.next;
4728 unwind.proc_pending.next = pending->next;
4729 free (pending);
4730 }
4731 unwind.proc_pending.sym = unwind.info = NULL;
800eeca4
JW		 4732}
4733
4734static void
4735dot_template (template)
4736 int template;
4737{
4738 CURR_SLOT.user_template = template;
4739}
4740
4741static void
4742dot_regstk (dummy)
2434f565 4743 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4744{
4745 int ins, locs, outs, rots;
4746
4747 if (is_it_end_of_statement ())
4748 ins = locs = outs = rots = 0;
4749 else
4750 {
4751 ins = get_absolute_expression ();
4752 if (*input_line_pointer++ != ',')
4753 goto err;
4754 locs = get_absolute_expression ();
4755 if (*input_line_pointer++ != ',')
4756 goto err;
4757 outs = get_absolute_expression ();
4758 if (*input_line_pointer++ != ',')
4759 goto err;
4760 rots = get_absolute_expression ();
4761 }
4762 set_regstack (ins, locs, outs, rots);
4763 return;
4764
4765 err:
4766 as_bad ("Comma expected");
4767 ignore_rest_of_line ();
4768}
4769
4770static void
4771dot_rot (type)
4772 int type;
4773{
6a2375c6
JB		 4774 offsetT num_regs;
4775 valueT num_alloced = 0;
800eeca4
JW		 4776 struct dynreg **drpp, *dr;
4777 int ch, base_reg = 0;
4778 char *name, *start;
4779 size_t len;
4780
4781 switch (type)
4782 {
4783 case DYNREG_GR: base_reg = REG_GR + 32; break;
4784 case DYNREG_FR: base_reg = REG_FR + 32; break;
4785 case DYNREG_PR: base_reg = REG_P + 16; break;
4786 default: break;
4787 }
4788
542d6675 4789 /* First, remove existing names from hash table. */
800eeca4
JW		 4790 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4791 {
4792 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4793 /* FIXME: Free dr->name. */
800eeca4
JW		 4794 dr->num_regs = 0;
4795 }
4796
4797 drpp = &md.dynreg[type];
4798 while (1)
4799 {
4800 start = input_line_pointer;
4801 ch = get_symbol_end ();
20b36a95 4802 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4803 *input_line_pointer = ch;
800eeca4
JW		 4804
4805 SKIP_WHITESPACE ();
4806 if (*input_line_pointer != '[')
4807 {
4808 as_bad ("Expected '['");
4809 goto err;
4810 }
4811 ++input_line_pointer; /* skip '[' */
4812
4813 num_regs = get_absolute_expression ();
4814
4815 if (*input_line_pointer++ != ']')
4816 {
4817 as_bad ("Expected ']'");
4818 goto err;
4819 }
6a2375c6
JB		 4820 if (num_regs <= 0)
4821 {
4822 as_bad ("Number of elements must be positive");
4823 goto err;
4824 }
800eeca4
JW		 4825 SKIP_WHITESPACE ();
4826
4827 num_alloced += num_regs;
4828 switch (type)
4829 {
4830 case DYNREG_GR:
4831 if (num_alloced > md.rot.num_regs)
4832 {
4833 as_bad ("Used more than the declared %d rotating registers",
4834 md.rot.num_regs);
4835 goto err;
4836 }
4837 break;
4838 case DYNREG_FR:
4839 if (num_alloced > 96)
4840 {
4841 as_bad ("Used more than the available 96 rotating registers");
4842 goto err;
4843 }
4844 break;
4845 case DYNREG_PR:
4846 if (num_alloced > 48)
4847 {
4848 as_bad ("Used more than the available 48 rotating registers");
4849 goto err;
4850 }
4851 break;
4852
4853 default:
4854 break;
4855 }
4856
800eeca4
JW		 4857 if (!*drpp)
4858 {
4859 *drpp = obstack_alloc (&notes, sizeof (*dr));
4860 memset (*drpp, 0, sizeof (*dr));
4861 }
4862
20b36a95
JB		 4863 name = obstack_alloc (&notes, len + 1);
4864 memcpy (name, start, len);
4865 name[len] = '\0';
4866
800eeca4
JW		 4867 dr = *drpp;
4868 dr->name = name;
4869 dr->num_regs = num_regs;
4870 dr->base = base_reg;
4871 drpp = &dr->next;
4872 base_reg += num_regs;
4873
4874 if (hash_insert (md.dynreg_hash, name, dr))
4875 {
4876 as_bad ("Attempt to redefine register set `%s'", name);
20b36a95 4877 obstack_free (&notes, name);
800eeca4
JW		 4878 goto err;
4879 }
4880
4881 if (*input_line_pointer != ',')
4882 break;
4883 ++input_line_pointer; /* skip comma */
4884 SKIP_WHITESPACE ();
4885 }
4886 demand_empty_rest_of_line ();
4887 return;
4888
4889 err:
4890 ignore_rest_of_line ();
4891}
4892
4893static void
4894dot_byteorder (byteorder)
4895 int byteorder;
4896{
10a98291
L		 4897 segment_info_type *seginfo = seg_info (now_seg);
4898
4899 if (byteorder == -1)
4900 {
4901 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4902 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4903 byteorder = seginfo->tc_segment_info_data.endian == 1;
4904 }
4905 else
4906 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4907
4908 if (target_big_endian != byteorder)
4909 {
4910 target_big_endian = byteorder;
4911 if (target_big_endian)
4912 {
4913 ia64_number_to_chars = number_to_chars_bigendian;
4914 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4915 }
4916 else
4917 {
4918 ia64_number_to_chars = number_to_chars_littleendian;
4919 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4920 }
4921 }
800eeca4
JW		 4922}
4923
4924static void
4925dot_psr (dummy)
2434f565 4926 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4927{
4928 char *option;
4929 int ch;
4930
4931 while (1)
4932 {
4933 option = input_line_pointer;
4934 ch = get_symbol_end ();
4935 if (strcmp (option, "lsb") == 0)
4936 md.flags &= ~EF_IA_64_BE;
4937 else if (strcmp (option, "msb") == 0)
4938 md.flags |= EF_IA_64_BE;
4939 else if (strcmp (option, "abi32") == 0)
4940 md.flags &= ~EF_IA_64_ABI64;
4941 else if (strcmp (option, "abi64") == 0)
4942 md.flags |= EF_IA_64_ABI64;
4943 else
4944 as_bad ("Unknown psr option `%s'", option);
4945 *input_line_pointer = ch;
4946
4947 SKIP_WHITESPACE ();
4948 if (*input_line_pointer != ',')
4949 break;
4950
4951 ++input_line_pointer;
4952 SKIP_WHITESPACE ();
4953 }
4954 demand_empty_rest_of_line ();
4955}
4956
800eeca4
JW		 4957static void
4958dot_ln (dummy)
2434f565 4959 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4960{
4961 new_logical_line (0, get_absolute_expression ());
4962 demand_empty_rest_of_line ();
4963}
4964
ef6a2b41
JB		 4965static void
4966cross_section (ref, cons, ua)
4967 int ref;
4968 void (*cons) PARAMS((int));
4969 int ua;
800eeca4 4970{
ef6a2b41
JB		 4971 char *start, *end;
4972 int saved_auto_align;
4973 unsigned int section_count;
800eeca4
JW		 4974
4975 SKIP_WHITESPACE ();
ef6a2b41
JB		 4976 start = input_line_pointer;
4977 if (*start == '"')
4978 {
4979 int len;
4980 char *name;
4981
b3f19c14 4982 name = demand_copy_C_string (&len);
ef6a2b41
JB		 4983 obstack_free(&notes, name);
4984 if (!name)
4985 {
4986 ignore_rest_of_line ();
4987 return;
4988 }
4989 }
b3f19c14 4990 else
800eeca4 4991 {
b3f19c14
JB		 4992 char c = get_symbol_end ();
4993
4994 if (input_line_pointer == start)
4995 {
4996 as_bad ("Missing section name");
4997 ignore_rest_of_line ();
ef6a2b41 4998 return;
b3f19c14 4999 }
b3f19c14 5000 *input_line_pointer = c;
800eeca4 5001 }
ef6a2b41 5002 end = input_line_pointer;
800eeca4
JW		 5003 SKIP_WHITESPACE ();
5004 if (*input_line_pointer != ',')
5005 {
5006 as_bad ("Comma expected after section name");
5007 ignore_rest_of_line ();
ef6a2b41 5008 return;
800eeca4 5009 }
ef6a2b41
JB		 5010 *end = '\0';
5011 end = input_line_pointer + 1; /* skip comma */
5012 input_line_pointer = start;
5013 md.keep_pending_output = 1;
5014 section_count = bfd_count_sections(stdoutput);
5015 obj_elf_section (0);
5016 if (section_count != bfd_count_sections(stdoutput))
5017 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5018 input_line_pointer = end;
5019 saved_auto_align = md.auto_align;
5020 if (ua)
5021 md.auto_align = 0;
5022 (*cons) (ref);
5023 if (ua)
5024 md.auto_align = saved_auto_align;
5025 obj_elf_previous (0);
5026 md.keep_pending_output = 0;
800eeca4
JW		 5027}
5028
5029static void
5030dot_xdata (size)
5031 int size;
5032{
ef6a2b41 5033 cross_section (size, cons, 0);
800eeca4
JW		 5034}
5035
5036/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 5037
800eeca4
JW		 5038static void
5039stmt_float_cons (kind)
5040 int kind;
5041{
165a7f90 5042 size_t alignment;
800eeca4
JW		 5043
5044 switch (kind)
5045 {
165a7f90
L		 5046 case 'd':
5047 alignment = 8;
5048 break;
5049
5050 case 'x':
5051 case 'X':
5052 alignment = 16;
5053 break;
800eeca4
JW		 5054
5055 case 'f':
5056 default:
165a7f90 5057 alignment = 4;
800eeca4
JW		 5058 break;
5059 }
165a7f90 5060 ia64_do_align (alignment);
800eeca4
JW		 5061 float_cons (kind);
5062}
5063
5064static void
5065stmt_cons_ua (size)
5066 int size;
5067{
5068 int saved_auto_align = md.auto_align;
5069
5070 md.auto_align = 0;
5071 cons (size);
5072 md.auto_align = saved_auto_align;
5073}
5074
5075static void
5076dot_xfloat_cons (kind)
5077 int kind;
5078{
ef6a2b41 5079 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 5080}
5081
5082static void
5083dot_xstringer (zero)
5084 int zero;
5085{
ef6a2b41 5086 cross_section (zero, stringer, 0);
800eeca4
JW		 5087}
5088
5089static void
5090dot_xdata_ua (size)
5091 int size;
5092{
ef6a2b41 5093 cross_section (size, cons, 1);
800eeca4
JW		 5094}
5095
5096static void
5097dot_xfloat_cons_ua (kind)
5098 int kind;
5099{
ef6a2b41 5100 cross_section (kind, float_cons, 1);
800eeca4
JW		 5101}
5102
5103/* .reg.val <regname>,value */
542d6675 5104
800eeca4
JW		 5105static void
5106dot_reg_val (dummy)
2434f565 5107 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5108{
5109 expressionS reg;
5110
60d11e55 5111 expression_and_evaluate (&reg);
800eeca4
JW		 5112 if (reg.X_op != O_register)
5113 {
5114 as_bad (_("Register name expected"));
5115 ignore_rest_of_line ();
5116 }
5117 else if (*input_line_pointer++ != ',')
5118 {
5119 as_bad (_("Comma expected"));
5120 ignore_rest_of_line ();
5121 }
197865e8 5122 else
800eeca4
JW		 5123 {
5124 valueT value = get_absolute_expression ();
5125 int regno = reg.X_add_number;
a66d2bb7 5126 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 5127 as_warn (_("Register value annotation ignored"));
800eeca4 5128 else
542d6675
KH		 5129 {
5130 gr_values[regno - REG_GR].known = 1;
5131 gr_values[regno - REG_GR].value = value;
5132 gr_values[regno - REG_GR].path = md.path;
5133 }
800eeca4
JW		 5134 }
5135 demand_empty_rest_of_line ();
5136}
5137
5e819f9c
JW		 5138/*
5139 .serialize.data
5140 .serialize.instruction
5141 */
5142static void
5143dot_serialize (type)
5144 int type;
5145{
5146 insn_group_break (0, 0, 0);
5147 if (type)
5148 instruction_serialization ();
5149 else
5150 data_serialization ();
5151 insn_group_break (0, 0, 0);
5152 demand_empty_rest_of_line ();
5153}
5154
197865e8 5155/* select dv checking mode
800eeca4
JW		 5156 .auto
5157 .explicit
5158 .default
5159
197865e8 5160 A stop is inserted when changing modes
800eeca4 5161 */
542d6675 5162
800eeca4
JW		 5163static void
5164dot_dv_mode (type)
542d6675 5165 int type;
800eeca4
JW		 5166{
5167 if (md.manual_bundling)
5168 as_warn (_("Directive invalid within a bundle"));
5169
5170 if (type == 'E' || type == 'A')
5171 md.mode_explicitly_set = 0;
5172 else
5173 md.mode_explicitly_set = 1;
5174
5175 md.detect_dv = 1;
5176 switch (type)
5177 {
5178 case 'A':
5179 case 'a':
5180 if (md.explicit_mode)
542d6675 5181 insn_group_break (1, 0, 0);
800eeca4
JW		 5182 md.explicit_mode = 0;
5183 break;
5184 case 'E':
5185 case 'e':
5186 if (!md.explicit_mode)
542d6675 5187 insn_group_break (1, 0, 0);
800eeca4
JW		 5188 md.explicit_mode = 1;
5189 break;
5190 default:
5191 case 'd':
5192 if (md.explicit_mode != md.default_explicit_mode)
542d6675 5193 insn_group_break (1, 0, 0);
800eeca4
JW		 5194 md.explicit_mode = md.default_explicit_mode;
5195 md.mode_explicitly_set = 0;
5196 break;
5197 }
5198}
5199
5200static void
5201print_prmask (mask)
542d6675 5202 valueT mask;
800eeca4
JW		 5203{
5204 int regno;
5205 char *comma = "";
542d6675 5206 for (regno = 0; regno < 64; regno++)
800eeca4 5207 {
542d6675
KH		 5208 if (mask & ((valueT) 1 << regno))
5209 {
5210 fprintf (stderr, "%s p%d", comma, regno);
5211 comma = ",";
5212 }
800eeca4
JW		 5213 }
5214}
5215
5216/*
05ee4b0f
JB		 5217 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5218 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5219 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5220 .pred.safe_across_calls p1 [, p2 [,...]]
5221 */
542d6675 5222
800eeca4
JW		 5223static void
5224dot_pred_rel (type)
542d6675 5225 int type;
800eeca4
JW		 5226{
5227 valueT mask = 0;
5228 int count = 0;
5229 int p1 = -1, p2 = -1;
5230
5231 if (type == 0)
5232 {
05ee4b0f 5233 if (*input_line_pointer == '"')
542d6675
KH		 5234 {
5235 int len;
5236 char *form = demand_copy_C_string (&len);
05ee4b0f 5237
542d6675
KH		 5238 if (strcmp (form, "mutex") == 0)
5239 type = 'm';
5240 else if (strcmp (form, "clear") == 0)
5241 type = 'c';
5242 else if (strcmp (form, "imply") == 0)
5243 type = 'i';
05ee4b0f
JB		 5244 obstack_free (&notes, form);
5245 }
5246 else if (*input_line_pointer == '@')
5247 {
5248 char *form = ++input_line_pointer;
5249 char c = get_symbol_end();
5250
5251 if (strcmp (form, "mutex") == 0)
5252 type = 'm';
5253 else if (strcmp (form, "clear") == 0)
5254 type = 'c';
5255 else if (strcmp (form, "imply") == 0)
5256 type = 'i';
5257 *input_line_pointer = c;
5258 }
5259 else
5260 {
5261 as_bad (_("Missing predicate relation type"));
5262 ignore_rest_of_line ();
5263 return;
5264 }
5265 if (type == 0)
5266 {
5267 as_bad (_("Unrecognized predicate relation type"));
5268 ignore_rest_of_line ();
5269 return;
542d6675 5270 }
800eeca4 5271 if (*input_line_pointer == ',')
542d6675 5272 ++input_line_pointer;
800eeca4
JW		 5273 SKIP_WHITESPACE ();
5274 }
5275
5276 SKIP_WHITESPACE ();
5277 while (1)
5278 {
20b36a95 5279 valueT bits = 1;
800eeca4 5280 int regno;
20b36a95
JB		 5281 expressionS pr, *pr1, *pr2;
5282
60d11e55 5283 expression_and_evaluate (&pr);
20b36a95
JB		 5284 if (pr.X_op == O_register
5285 && pr.X_add_number >= REG_P
5286 && pr.X_add_number <= REG_P + 63)
5287 {
5288 regno = pr.X_add_number - REG_P;
5289 bits <<= regno;
5290 count++;
5291 if (p1 == -1)
5292 p1 = regno;
5293 else if (p2 == -1)
5294 p2 = regno;
5295 }
5296 else if (type != 'i'
5297 && pr.X_op == O_subtract
5298 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5299 && pr1->X_op == O_register
5300 && pr1->X_add_number >= REG_P
5301 && pr1->X_add_number <= REG_P + 63
5302 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5303 && pr2->X_op == O_register
5304 && pr2->X_add_number >= REG_P
5305 && pr2->X_add_number <= REG_P + 63)
5306 {
5307 /* It's a range. */
5308 int stop;
5309
5310 regno = pr1->X_add_number - REG_P;
5311 stop = pr2->X_add_number - REG_P;
5312 if (regno >= stop)
542d6675
KH		 5313 {
5314 as_bad (_("Bad register range"));
5315 ignore_rest_of_line ();
5316 return;
5317 }
20b36a95
JB		 5318 bits = ((bits << stop) << 1) - (bits << regno);
5319 count += stop - regno + 1;
5320 }
5321 else
5322 {
5323 as_bad (_("Predicate register expected"));
5324 ignore_rest_of_line ();
5325 return;
542d6675 5326 }
20b36a95
JB		 5327 if (mask & bits)
5328 as_warn (_("Duplicate predicate register ignored"));
5329 mask |= bits;
800eeca4 5330 if (*input_line_pointer != ',')
542d6675 5331 break;
800eeca4
JW		 5332 ++input_line_pointer;
5333 SKIP_WHITESPACE ();
5334 }
5335
5336 switch (type)
5337 {
5338 case 'c':
5339 if (count == 0)
542d6675 5340 mask = ~(valueT) 0;
800eeca4 5341 clear_qp_mutex (mask);
197865e8 5342 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5343 break;
5344 case 'i':
5345 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5346 as_bad (_("Predicate source and target required"));
800eeca4 5347 else if (p1 == 0 || p2 == 0)
542d6675 5348 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5349 else
542d6675 5350 add_qp_imply (p1, p2);
800eeca4
JW		 5351 break;
5352 case 'm':
5353 if (count < 2)
542d6675
KH		 5354 {
5355 as_bad (_("At least two PR arguments expected"));
5356 break;
5357 }
800eeca4 5358 else if (mask & 1)
542d6675
KH		 5359 {
5360 as_bad (_("Use of p0 is not valid in this context"));
5361 break;
5362 }
800eeca4
JW		 5363 add_qp_mutex (mask);
5364 break;
5365 case 's':
5366 /* note that we don't override any existing relations */
5367 if (count == 0)
542d6675
KH		 5368 {
5369 as_bad (_("At least one PR argument expected"));
5370 break;
5371 }
800eeca4 5372 if (md.debug_dv)
542d6675
KH		 5373 {
5374 fprintf (stderr, "Safe across calls: ");
5375 print_prmask (mask);
5376 fprintf (stderr, "\n");
5377 }
800eeca4
JW		 5378 qp_safe_across_calls = mask;
5379 break;
5380 }
5381 demand_empty_rest_of_line ();
5382}
5383
5384/* .entry label [, label [, ...]]
5385 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5386 Otherwise, only global labels are considered entry points. */
5387
800eeca4
JW		 5388static void
5389dot_entry (dummy)
2434f565 5390 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5391{
5392 const char *err;
5393 char *name;
5394 int c;
5395 symbolS *symbolP;
5396
5397 do
5398 {
5399 name = input_line_pointer;
5400 c = get_symbol_end ();
5401 symbolP = symbol_find_or_make (name);
5402
5403 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5404 if (err)
542d6675
KH		 5405 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5406 name, err);
800eeca4
JW		 5407
5408 *input_line_pointer = c;
5409 SKIP_WHITESPACE ();
5410 c = *input_line_pointer;
5411 if (c == ',')
5412 {
5413 input_line_pointer++;
5414 SKIP_WHITESPACE ();
5415 if (*input_line_pointer == '\n')
5416 c = '\n';
5417 }
5418 }
5419 while (c == ',');
5420
5421 demand_empty_rest_of_line ();
5422}
5423
197865e8 5424/* .mem.offset offset, base
542d6675
KH		 5425 "base" is used to distinguish between offsets from a different base. */
5426
800eeca4
JW		 5427static void
5428dot_mem_offset (dummy)
2434f565 5429 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5430{
5431 md.mem_offset.hint = 1;
5432 md.mem_offset.offset = get_absolute_expression ();
5433 if (*input_line_pointer != ',')
5434 {
5435 as_bad (_("Comma expected"));
5436 ignore_rest_of_line ();
5437 return;
5438 }
5439 ++input_line_pointer;
5440 md.mem_offset.base = get_absolute_expression ();
5441 demand_empty_rest_of_line ();
5442}
5443
542d6675 5444/* ia64-specific pseudo-ops: */
800eeca4
JW		 5445const pseudo_typeS md_pseudo_table[] =
5446 {
5447 { "radix", dot_radix, 0 },
5448 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5449 { "loc", dot_loc, 0 },
800eeca4
JW		 5450 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5451 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5452 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5453 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5454 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5455 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5456 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5457 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5458 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5459 { "proc", dot_proc, 0 },
5460 { "body", dot_body, 0 },
5461 { "prologue", dot_prologue, 0 },
2434f565 5462 { "endp", dot_endp, 0 },
2434f565
JW		 5463
5464 { "fframe", dot_fframe, 0 },
5465 { "vframe", dot_vframe, 0 },
5466 { "vframesp", dot_vframesp, 0 },
e4e8248d 5467 { "vframepsp", dot_vframesp, 1 },
2434f565
JW		 5468 { "save", dot_save, 0 },
5469 { "restore", dot_restore, 0 },
5470 { "restorereg", dot_restorereg, 0 },
e4e8248d 5471 { "restorereg.p", dot_restorereg, 1 },
2434f565
JW		 5472 { "handlerdata", dot_handlerdata, 0 },
5473 { "unwentry", dot_unwentry, 0 },
5474 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5475 { "savesp", dot_savemem, 0 },
5476 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5477 { "save.g", dot_saveg, 0 },
5478 { "save.f", dot_savef, 0 },
5479 { "save.b", dot_saveb, 0 },
5480 { "save.gf", dot_savegf, 0 },
5481 { "spill", dot_spill, 0 },
5482 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5483 { "spillsp", dot_spillmem, 0 },
5484 { "spillpsp", dot_spillmem, 1 },
e4e8248d
JB		 5485 { "spillreg.p", dot_spillreg, 1 },
5486 { "spillsp.p", dot_spillmem, ~0 },
5487 { "spillpsp.p", dot_spillmem, ~1 },
2434f565
JW		 5488 { "label_state", dot_label_state, 0 },
5489 { "copy_state", dot_copy_state, 0 },
5490 { "unwabi", dot_unwabi, 0 },
5491 { "personality", dot_personality, 0 },
800eeca4
JW		 5492 { "mii", dot_template, 0x0 },
5493 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5494 { "mlx", dot_template, 0x2 },
5495 { "mmi", dot_template, 0x4 },
5496 { "mfi", dot_template, 0x6 },
5497 { "mmf", dot_template, 0x7 },
5498 { "mib", dot_template, 0x8 },
5499 { "mbb", dot_template, 0x9 },
5500 { "bbb", dot_template, 0xb },
5501 { "mmb", dot_template, 0xc },
5502 { "mfb", dot_template, 0xe },
d9201763 5503 { "align", dot_align, 0 },
800eeca4
JW		 5504 { "regstk", dot_regstk, 0 },
5505 { "rotr", dot_rot, DYNREG_GR },
5506 { "rotf", dot_rot, DYNREG_FR },
5507 { "rotp", dot_rot, DYNREG_PR },
5508 { "lsb", dot_byteorder, 0 },
5509 { "msb", dot_byteorder, 1 },
5510 { "psr", dot_psr, 0 },
5511 { "alias", dot_alias, 0 },
35f5df7f 5512 { "secalias", dot_alias, 1 },
800eeca4
JW		 5513 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5514
5515 { "xdata1", dot_xdata, 1 },
5516 { "xdata2", dot_xdata, 2 },
5517 { "xdata4", dot_xdata, 4 },
5518 { "xdata8", dot_xdata, 8 },
b3f19c14 5519 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5520 { "xreal4", dot_xfloat_cons, 'f' },
5521 { "xreal8", dot_xfloat_cons, 'd' },
5522 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5523 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5524 { "xstring", dot_xstringer, 0 },
5525 { "xstringz", dot_xstringer, 1 },
5526
542d6675 5527 /* unaligned versions: */
800eeca4
JW		 5528 { "xdata2.ua", dot_xdata_ua, 2 },
5529 { "xdata4.ua", dot_xdata_ua, 4 },
5530 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5531 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5532 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5533 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5534 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5535 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5536
5537 /* annotations/DV checking support */
5538 { "entry", dot_entry, 0 },
2434f565 5539 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5540 { "pred.rel", dot_pred_rel, 0 },
5541 { "pred.rel.clear", dot_pred_rel, 'c' },
5542 { "pred.rel.imply", dot_pred_rel, 'i' },
5543 { "pred.rel.mutex", dot_pred_rel, 'm' },
5544 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5545 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5546 { "serialize.data", dot_serialize, 0 },
5547 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5548 { "auto", dot_dv_mode, 'a' },
5549 { "explicit", dot_dv_mode, 'e' },
5550 { "default", dot_dv_mode, 'd' },
5551
87885043
JW		 5552 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5553 IA-64 aligns data allocation pseudo-ops by default, so we have to
5554 tell it that these ones are supposed to be unaligned. Long term,
5555 should rewrite so that only IA-64 specific data allocation pseudo-ops
5556 are aligned by default. */
5557 {"2byte", stmt_cons_ua, 2},
5558 {"4byte", stmt_cons_ua, 4},
5559 {"8byte", stmt_cons_ua, 8},
5560
800eeca4
JW		 5561 { NULL, 0, 0 }
5562 };
5563
5564static const struct pseudo_opcode
5565 {
5566 const char *name;
5567 void (*handler) (int);
5568 int arg;
5569 }
5570pseudo_opcode[] =
5571 {
5572 /* these are more like pseudo-ops, but don't start with a dot */
5573 { "data1", cons, 1 },
5574 { "data2", cons, 2 },
5575 { "data4", cons, 4 },
5576 { "data8", cons, 8 },
3969b680 5577 { "data16", cons, 16 },
800eeca4
JW		 5578 { "real4", stmt_float_cons, 'f' },
5579 { "real8", stmt_float_cons, 'd' },
5580 { "real10", stmt_float_cons, 'x' },
165a7f90 5581 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5582 { "string", stringer, 0 },
5583 { "stringz", stringer, 1 },
5584
542d6675 5585 /* unaligned versions: */
800eeca4
JW		 5586 { "data2.ua", stmt_cons_ua, 2 },
5587 { "data4.ua", stmt_cons_ua, 4 },
5588 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5589 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5590 { "real4.ua", float_cons, 'f' },
5591 { "real8.ua", float_cons, 'd' },
5592 { "real10.ua", float_cons, 'x' },
165a7f90 5593 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5594 };
5595
5596/* Declare a register by creating a symbol for it and entering it in
5597 the symbol table. */
542d6675
KH		 5598
5599static symbolS *
800eeca4
JW		 5600declare_register (name, regnum)
5601 const char *name;
8b84be9d 5602 unsigned int regnum;
800eeca4
JW		 5603{
5604 const char *err;
5605 symbolS *sym;
5606
5e0bd176 5607 sym = symbol_create (name, reg_section, regnum, &zero_address_frag);
800eeca4
JW		 5608
5609 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5610 if (err)
5611 as_fatal ("Inserting \"%s\" into register table failed: %s",
5612 name, err);
5613
5614 return sym;
5615}
5616
5617static void
5618declare_register_set (prefix, num_regs, base_regnum)
5619 const char *prefix;
8b84be9d
JB		 5620 unsigned int num_regs;
5621 unsigned int base_regnum;
800eeca4
JW		 5622{
5623 char name[8];
8b84be9d 5624 unsigned int i;
800eeca4
JW		 5625
5626 for (i = 0; i < num_regs; ++i)
5627 {
5628 sprintf (name, "%s%u", prefix, i);
5629 declare_register (name, base_regnum + i);
5630 }
5631}
5632
5633static unsigned int
5634operand_width (opnd)
5635 enum ia64_opnd opnd;
5636{
5637 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5638 unsigned int bits = 0;
5639 int i;
5640
5641 bits = 0;
5642 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5643 bits += odesc->field[i].bits;
5644
5645 return bits;
5646}
5647
87f8eb97 5648static enum operand_match_result
800eeca4
JW		 5649operand_match (idesc, index, e)
5650 const struct ia64_opcode *idesc;
5651 int index;
5652 expressionS *e;
5653{
5654 enum ia64_opnd opnd = idesc->operands[index];
5655 int bits, relocatable = 0;
5656 struct insn_fix *fix;
5657 bfd_signed_vma val;
5658
5659 switch (opnd)
5660 {
542d6675 5661 /* constants: */
800eeca4
JW		 5662
5663 case IA64_OPND_AR_CCV:
5664 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5665 return OPERAND_MATCH;
800eeca4
JW		 5666 break;
5667
c10d9d8f
JW		 5668 case IA64_OPND_AR_CSD:
5669 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5670 return OPERAND_MATCH;
5671 break;
5672
800eeca4
JW		 5673 case IA64_OPND_AR_PFS:
5674 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5675 return OPERAND_MATCH;
800eeca4
JW		 5676 break;
5677
5678 case IA64_OPND_GR0:
5679 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5680 return OPERAND_MATCH;
800eeca4
JW		 5681 break;
5682
5683 case IA64_OPND_IP:
5684 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5685 return OPERAND_MATCH;
800eeca4
JW		 5686 break;
5687
5688 case IA64_OPND_PR:
5689 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5690 return OPERAND_MATCH;
800eeca4
JW		 5691 break;
5692
5693 case IA64_OPND_PR_ROT:
5694 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5695 return OPERAND_MATCH;
800eeca4
JW		 5696 break;
5697
5698 case IA64_OPND_PSR:
5699 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5700 return OPERAND_MATCH;
800eeca4
JW		 5701 break;
5702
5703 case IA64_OPND_PSR_L:
5704 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5705 return OPERAND_MATCH;
800eeca4
JW		 5706 break;
5707
5708 case IA64_OPND_PSR_UM:
5709 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5710 return OPERAND_MATCH;
800eeca4
JW		 5711 break;
5712
5713 case IA64_OPND_C1:
87f8eb97
JW		 5714 if (e->X_op == O_constant)
5715 {
5716 if (e->X_add_number == 1)
5717 return OPERAND_MATCH;
5718 else
5719 return OPERAND_OUT_OF_RANGE;
5720 }
800eeca4
JW		 5721 break;
5722
5723 case IA64_OPND_C8:
87f8eb97
JW		 5724 if (e->X_op == O_constant)
5725 {
5726 if (e->X_add_number == 8)
5727 return OPERAND_MATCH;
5728 else
5729 return OPERAND_OUT_OF_RANGE;
5730 }
800eeca4
JW		 5731 break;
5732
5733 case IA64_OPND_C16:
87f8eb97
JW		 5734 if (e->X_op == O_constant)
5735 {
5736 if (e->X_add_number == 16)
5737 return OPERAND_MATCH;
5738 else
5739 return OPERAND_OUT_OF_RANGE;
5740 }
800eeca4
JW		 5741 break;
5742
542d6675 5743 /* register operands: */
800eeca4
JW		 5744
5745 case IA64_OPND_AR3:
5746 if (e->X_op == O_register && e->X_add_number >= REG_AR
5747 && e->X_add_number < REG_AR + 128)
87f8eb97 5748 return OPERAND_MATCH;
800eeca4
JW		 5749 break;
5750
5751 case IA64_OPND_B1:
5752 case IA64_OPND_B2:
5753 if (e->X_op == O_register && e->X_add_number >= REG_BR
5754 && e->X_add_number < REG_BR + 8)
87f8eb97 5755 return OPERAND_MATCH;
800eeca4
JW		 5756 break;
5757
5758 case IA64_OPND_CR3:
5759 if (e->X_op == O_register && e->X_add_number >= REG_CR
5760 && e->X_add_number < REG_CR + 128)
87f8eb97 5761 return OPERAND_MATCH;
800eeca4
JW		 5762 break;
5763
5764 case IA64_OPND_F1:
5765 case IA64_OPND_F2:
5766 case IA64_OPND_F3:
5767 case IA64_OPND_F4:
5768 if (e->X_op == O_register && e->X_add_number >= REG_FR
5769 && e->X_add_number < REG_FR + 128)
87f8eb97 5770 return OPERAND_MATCH;
800eeca4
JW		 5771 break;
5772
5773 case IA64_OPND_P1:
5774 case IA64_OPND_P2:
5775 if (e->X_op == O_register && e->X_add_number >= REG_P
5776 && e->X_add_number < REG_P + 64)
87f8eb97 5777 return OPERAND_MATCH;
800eeca4
JW		 5778 break;
5779
5780 case IA64_OPND_R1:
5781 case IA64_OPND_R2:
5782 case IA64_OPND_R3:
5783 if (e->X_op == O_register && e->X_add_number >= REG_GR
5784 && e->X_add_number < REG_GR + 128)
87f8eb97 5785 return OPERAND_MATCH;
800eeca4
JW		 5786 break;
5787
5788 case IA64_OPND_R3_2:
87f8eb97 5789 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5790 {
87f8eb97
JW		 5791 if (e->X_add_number < REG_GR + 4)
5792 return OPERAND_MATCH;
5793 else if (e->X_add_number < REG_GR + 128)
5794 return OPERAND_OUT_OF_RANGE;
5795 }
800eeca4
JW		 5796 break;
5797
542d6675 5798 /* indirect operands: */
800eeca4
JW		 5799 case IA64_OPND_CPUID_R3:
5800 case IA64_OPND_DBR_R3:
5801 case IA64_OPND_DTR_R3:
5802 case IA64_OPND_ITR_R3:
5803 case IA64_OPND_IBR_R3:
5804 case IA64_OPND_MSR_R3:
5805 case IA64_OPND_PKR_R3:
5806 case IA64_OPND_PMC_R3:
5807 case IA64_OPND_PMD_R3:
5808 case IA64_OPND_RR_R3:
5809 if (e->X_op == O_index && e->X_op_symbol
5810 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5811 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5812 return OPERAND_MATCH;
800eeca4
JW		 5813 break;
5814
5815 case IA64_OPND_MR3:
5816 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5817 return OPERAND_MATCH;
800eeca4
JW		 5818 break;
5819
542d6675 5820 /* immediate operands: */
800eeca4
JW		 5821 case IA64_OPND_CNT2a:
5822 case IA64_OPND_LEN4:
5823 case IA64_OPND_LEN6:
5824 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5825 if (e->X_op == O_constant)
5826 {
5827 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5828 return OPERAND_MATCH;
5829 else
5830 return OPERAND_OUT_OF_RANGE;
5831 }
800eeca4
JW		 5832 break;
5833
5834 case IA64_OPND_CNT2b:
87f8eb97
JW		 5835 if (e->X_op == O_constant)
5836 {
5837 if ((bfd_vma) (e->X_add_number - 1) < 3)
5838 return OPERAND_MATCH;
5839 else
5840 return OPERAND_OUT_OF_RANGE;
5841 }
800eeca4
JW		 5842 break;
5843
5844 case IA64_OPND_CNT2c:
5845 val = e->X_add_number;
87f8eb97
JW		 5846 if (e->X_op == O_constant)
5847 {
5848 if ((val == 0 || val == 7 || val == 15 || val == 16))
5849 return OPERAND_MATCH;
5850 else
5851 return OPERAND_OUT_OF_RANGE;
5852 }
800eeca4
JW		 5853 break;
5854
5855 case IA64_OPND_SOR:
5856 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5857 if (e->X_op == O_constant && e->X_add_number & 0x7)
5858 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5859 case IA64_OPND_SOF:
5860 case IA64_OPND_SOL:
87f8eb97
JW		 5861 if (e->X_op == O_constant)
5862 {
5863 if ((bfd_vma) e->X_add_number <= 96)
5864 return OPERAND_MATCH;
5865 else
5866 return OPERAND_OUT_OF_RANGE;
5867 }
800eeca4
JW		 5868 break;
5869
5870 case IA64_OPND_IMMU62:
5871 if (e->X_op == O_constant)
542d6675 5872 {
800eeca4 5873 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5874 return OPERAND_MATCH;
5875 else
5876 return OPERAND_OUT_OF_RANGE;
542d6675 5877 }
197865e8 5878 else
542d6675
KH		 5879 {
5880 /* FIXME -- need 62-bit relocation type */
5881 as_bad (_("62-bit relocation not yet implemented"));
5882 }
800eeca4
JW		 5883 break;
5884
5885 case IA64_OPND_IMMU64:
5886 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5887 || e->X_op == O_subtract)
5888 {
5889 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5890 fix->code = BFD_RELOC_IA64_IMM64;
5891 if (e->X_op != O_subtract)
5892 {
5893 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5894 if (e->X_op == O_pseudo_fixup)
5895 e->X_op = O_symbol;
5896 }
5897
5898 fix->opnd = idesc->operands[index];
5899 fix->expr = *e;
5900 fix->is_pcrel = 0;
5901 ++CURR_SLOT.num_fixups;
87f8eb97 5902 return OPERAND_MATCH;
800eeca4
JW		 5903 }
5904 else if (e->X_op == O_constant)
87f8eb97 5905 return OPERAND_MATCH;
800eeca4
JW		 5906 break;
5907
5908 case IA64_OPND_CCNT5:
5909 case IA64_OPND_CNT5:
5910 case IA64_OPND_CNT6:
5911 case IA64_OPND_CPOS6a:
5912 case IA64_OPND_CPOS6b:
5913 case IA64_OPND_CPOS6c:
5914 case IA64_OPND_IMMU2:
5915 case IA64_OPND_IMMU7a:
5916 case IA64_OPND_IMMU7b:
800eeca4
JW		 5917 case IA64_OPND_IMMU21:
5918 case IA64_OPND_IMMU24:
5919 case IA64_OPND_MBTYPE4:
5920 case IA64_OPND_MHTYPE8:
5921 case IA64_OPND_POS6:
5922 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5923 if (e->X_op == O_constant)
5924 {
5925 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5926 return OPERAND_MATCH;
5927 else
5928 return OPERAND_OUT_OF_RANGE;
5929 }
800eeca4
JW		 5930 break;
5931
bf3ca999
TW		 5932 case IA64_OPND_IMMU9:
5933 bits = operand_width (idesc->operands[index]);
87f8eb97 5934 if (e->X_op == O_constant)
542d6675 5935 {
87f8eb97
JW		 5936 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5937 {
5938 int lobits = e->X_add_number & 0x3;
5939 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5940 e->X_add_number |= (bfd_vma) 0x3;
5941 return OPERAND_MATCH;
5942 }
5943 else
5944 return OPERAND_OUT_OF_RANGE;
542d6675 5945 }
bf3ca999
TW		 5946 break;
5947
800eeca4
JW		 5948 case IA64_OPND_IMM44:
5949 /* least 16 bits must be zero */
5950 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5951 /* XXX technically, this is wrong: we should not be issuing warning
5952 messages until we're sure this instruction pattern is going to
5953 be used! */
542d6675 5954 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5955
87f8eb97 5956 if (e->X_op == O_constant)
542d6675 5957 {
87f8eb97
JW		 5958 if (((e->X_add_number >= 0
5959 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5960 || (e->X_add_number < 0
5961 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5962 {
87f8eb97
JW		 5963 /* sign-extend */
5964 if (e->X_add_number >= 0
5965 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5966 {
5967 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5968 }
5969 return OPERAND_MATCH;
542d6675 5970 }
87f8eb97
JW		 5971 else
5972 return OPERAND_OUT_OF_RANGE;
542d6675 5973 }
800eeca4
JW		 5974 break;
5975
5976 case IA64_OPND_IMM17:
5977 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5978 if (e->X_op == O_constant)
542d6675 5979 {
87f8eb97
JW		 5980 if (((e->X_add_number >= 0
5981 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5982 || (e->X_add_number < 0
5983 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5984 {
87f8eb97
JW		 5985 /* sign-extend */
5986 if (e->X_add_number >= 0
5987 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5988 {
5989 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5990 }
5991 return OPERAND_MATCH;
542d6675 5992 }
87f8eb97
JW		 5993 else
5994 return OPERAND_OUT_OF_RANGE;
542d6675 5995 }
800eeca4
JW		 5996 break;
5997
5998 case IA64_OPND_IMM14:
5999 case IA64_OPND_IMM22:
6000 relocatable = 1;
6001 case IA64_OPND_IMM1:
6002 case IA64_OPND_IMM8:
6003 case IA64_OPND_IMM8U4:
6004 case IA64_OPND_IMM8M1:
6005 case IA64_OPND_IMM8M1U4:
6006 case IA64_OPND_IMM8M1U8:
6007 case IA64_OPND_IMM9a:
6008 case IA64_OPND_IMM9b:
6009 bits = operand_width (idesc->operands[index]);
6010 if (relocatable && (e->X_op == O_symbol
6011 || e->X_op == O_subtract
6012 || e->X_op == O_pseudo_fixup))
6013 {
6014 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6015
6016 if (idesc->operands[index] == IA64_OPND_IMM14)
6017 fix->code = BFD_RELOC_IA64_IMM14;
6018 else
6019 fix->code = BFD_RELOC_IA64_IMM22;
6020
6021 if (e->X_op != O_subtract)
6022 {
6023 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6024 if (e->X_op == O_pseudo_fixup)
6025 e->X_op = O_symbol;
6026 }
6027
6028 fix->opnd = idesc->operands[index];
6029 fix->expr = *e;
6030 fix->is_pcrel = 0;
6031 ++CURR_SLOT.num_fixups;
87f8eb97 6032 return OPERAND_MATCH;
800eeca4
JW		 6033 }
6034 else if (e->X_op != O_constant
6035 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 6036 return OPERAND_MISMATCH;
800eeca4
JW		 6037
6038 if (opnd == IA64_OPND_IMM8M1U4)
6039 {
6040 /* Zero is not valid for unsigned compares that take an adjusted
6041 constant immediate range. */
6042 if (e->X_add_number == 0)
87f8eb97 6043 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6044
6045 /* Sign-extend 32-bit unsigned numbers, so that the following range
6046 checks will work. */
6047 val = e->X_add_number;
197865e8
KH		 6048 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6049 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6050 val = ((val << 32) >> 32);
6051
6052 /* Check for 0x100000000. This is valid because
6053 0x100000000-1 is the same as ((uint32_t) -1). */
6054 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 6055 return OPERAND_MATCH;
800eeca4
JW		 6056
6057 val = val - 1;
6058 }
6059 else if (opnd == IA64_OPND_IMM8M1U8)
6060 {
6061 /* Zero is not valid for unsigned compares that take an adjusted
6062 constant immediate range. */
6063 if (e->X_add_number == 0)
87f8eb97 6064 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6065
6066 /* Check for 0x10000000000000000. */
6067 if (e->X_op == O_big)
6068 {
6069 if (generic_bignum[0] == 0
6070 && generic_bignum[1] == 0
6071 && generic_bignum[2] == 0
6072 && generic_bignum[3] == 0
6073 && generic_bignum[4] == 1)
87f8eb97 6074 return OPERAND_MATCH;
800eeca4 6075 else
87f8eb97 6076 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6077 }
6078 else
6079 val = e->X_add_number - 1;
6080 }
6081 else if (opnd == IA64_OPND_IMM8M1)
6082 val = e->X_add_number - 1;
6083 else if (opnd == IA64_OPND_IMM8U4)
6084 {
6085 /* Sign-extend 32-bit unsigned numbers, so that the following range
6086 checks will work. */
6087 val = e->X_add_number;
197865e8
KH		 6088 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6089 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6090 val = ((val << 32) >> 32);
6091 }
6092 else
6093 val = e->X_add_number;
6094
2434f565
JW		 6095 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
6096 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 6097 return OPERAND_MATCH;
6098 else
6099 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6100
6101 case IA64_OPND_INC3:
6102 /* +/- 1, 4, 8, 16 */
6103 val = e->X_add_number;
6104 if (val < 0)
6105 val = -val;
87f8eb97
JW		 6106 if (e->X_op == O_constant)
6107 {
6108 if ((val == 1 || val == 4 || val == 8 || val == 16))
6109 return OPERAND_MATCH;
6110 else
6111 return OPERAND_OUT_OF_RANGE;
6112 }
800eeca4
JW		 6113 break;
6114
6115 case IA64_OPND_TGT25:
6116 case IA64_OPND_TGT25b:
6117 case IA64_OPND_TGT25c:
6118 case IA64_OPND_TGT64:
6119 if (e->X_op == O_symbol)
6120 {
6121 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6122 if (opnd == IA64_OPND_TGT25)
6123 fix->code = BFD_RELOC_IA64_PCREL21F;
6124 else if (opnd == IA64_OPND_TGT25b)
6125 fix->code = BFD_RELOC_IA64_PCREL21M;
6126 else if (opnd == IA64_OPND_TGT25c)
6127 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 6128 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 6129 fix->code = BFD_RELOC_IA64_PCREL60B;
6130 else
6131 abort ();
6132
800eeca4
JW		 6133 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6134 fix->opnd = idesc->operands[index];
6135 fix->expr = *e;
6136 fix->is_pcrel = 1;
6137 ++CURR_SLOT.num_fixups;
87f8eb97 6138 return OPERAND_MATCH;
800eeca4
JW		 6139 }
6140 case IA64_OPND_TAG13:
6141 case IA64_OPND_TAG13b:
6142 switch (e->X_op)
6143 {
6144 case O_constant:
87f8eb97 6145 return OPERAND_MATCH;
800eeca4
JW		 6146
6147 case O_symbol:
6148 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c 6149 /* There are no external relocs for TAG13/TAG13b fields, so we
55cf6793 6150 create a dummy reloc. This will not live past md_apply_fix. */
fa1cb89c
JW		 6151 fix->code = BFD_RELOC_UNUSED;
6152 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 6153 fix->opnd = idesc->operands[index];
6154 fix->expr = *e;
6155 fix->is_pcrel = 1;
6156 ++CURR_SLOT.num_fixups;
87f8eb97 6157 return OPERAND_MATCH;
800eeca4
JW		 6158
6159 default:
6160 break;
6161 }
6162 break;
6163
a823923b
RH		 6164 case IA64_OPND_LDXMOV:
6165 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6166 fix->code = BFD_RELOC_IA64_LDXMOV;
6167 fix->opnd = idesc->operands[index];
6168 fix->expr = *e;
6169 fix->is_pcrel = 0;
6170 ++CURR_SLOT.num_fixups;
6171 return OPERAND_MATCH;
6172
800eeca4
JW		 6173 default:
6174 break;
6175 }
87f8eb97 6176 return OPERAND_MISMATCH;
800eeca4
JW		 6177}
6178
6179static int
e4e8248d 6180parse_operand (e, more)
800eeca4 6181 expressionS *e;
e4e8248d 6182 int more;
800eeca4
JW		 6183{
6184 int sep = '\0';
6185
6186 memset (e, 0, sizeof (*e));
6187 e->X_op = O_absent;
6188 SKIP_WHITESPACE ();
60d11e55 6189 expression_and_evaluate (e);
e4e8248d
JB		 6190 sep = *input_line_pointer;
6191 if (more && (sep == ',' || sep == more))
6192 ++input_line_pointer;
800eeca4
JW		 6193 return sep;
6194}
6195
6196/* Returns the next entry in the opcode table that matches the one in
6197 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6198 found, NULL is returned instead. */
800eeca4
JW		 6199
6200static struct ia64_opcode *
6201get_next_opcode (struct ia64_opcode *idesc)
6202{
6203 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6204 ia64_free_opcode (idesc);
6205 return next;
6206}
6207
6208/* Parse the operands for the opcode and find the opcode variant that
6209 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6210
6211static struct ia64_opcode *
800eeca4
JW		 6212parse_operands (idesc)
6213 struct ia64_opcode *idesc;
6214{
6215 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6216 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6217 int reg1, reg2;
6218 char reg_class;
800eeca4 6219 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6220 enum operand_match_result result;
800eeca4
JW		 6221 char mnemonic[129];
6222 char *first_arg = 0, *end, *saved_input_pointer;
6223 unsigned int sof;
6224
6225 assert (strlen (idesc->name) <= 128);
6226
6227 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6228 if (idesc->operands[2] == IA64_OPND_SOF
6229 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6230 {
6231 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6232 can't parse the first operand until we have parsed the
6233 remaining operands of the "alloc" instruction. */
6234 SKIP_WHITESPACE ();
6235 first_arg = input_line_pointer;
6236 end = strchr (input_line_pointer, '=');
6237 if (!end)
6238 {
6239 as_bad ("Expected separator `='");
6240 return 0;
6241 }
6242 input_line_pointer = end + 1;
6243 ++i;
6244 ++num_outputs;
6245 }
6246
d3156ecc 6247 for (; ; ++i)
800eeca4 6248 {
d3156ecc
JB		 6249 if (i < NELEMS (CURR_SLOT.opnd))
6250 {
e4e8248d 6251 sep = parse_operand (CURR_SLOT.opnd + i, '=');
d3156ecc
JB		 6252 if (CURR_SLOT.opnd[i].X_op == O_absent)
6253 break;
6254 }
6255 else
6256 {
6257 expressionS dummy;
6258
e4e8248d 6259 sep = parse_operand (&dummy, '=');
d3156ecc
JB		 6260 if (dummy.X_op == O_absent)
6261 break;
6262 }
800eeca4
JW		 6263
6264 ++num_operands;
6265
6266 if (sep != '=' && sep != ',')
6267 break;
6268
6269 if (sep == '=')
6270 {
6271 if (num_outputs > 0)
6272 as_bad ("Duplicate equal sign (=) in instruction");
6273 else
6274 num_outputs = i + 1;
6275 }
6276 }
6277 if (sep != '\0')
6278 {
6279 as_bad ("Illegal operand separator `%c'", sep);
6280 return 0;
6281 }
197865e8 6282
60b9a617
JB		 6283 if (idesc->operands[2] == IA64_OPND_SOF
6284 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4 6285 {
ef0241e7
JB		 6286 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6287 Note, however, that due to that mapping operand numbers in error
6288 messages for any of the constant operands will not be correct. */
800eeca4 6289 know (strcmp (idesc->name, "alloc") == 0);
ef0241e7
JB		 6290 /* The first operand hasn't been parsed/initialized, yet (but
6291 num_operands intentionally doesn't account for that). */
6292 i = num_operands > 4 ? 2 : 1;
6293#define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6294 ? CURR_SLOT.opnd[n].X_add_number \
6295 : 0)
6296 sof = set_regstack (FORCE_CONST(i),
6297 FORCE_CONST(i + 1),
6298 FORCE_CONST(i + 2),
6299 FORCE_CONST(i + 3));
6300#undef FORCE_CONST
6301
6302 /* now we can parse the first arg: */
6303 saved_input_pointer = input_line_pointer;
6304 input_line_pointer = first_arg;
6305 sep = parse_operand (CURR_SLOT.opnd + 0, '=');
6306 if (sep != '=')
6307 --num_outputs; /* force error */
6308 input_line_pointer = saved_input_pointer;
6309
6310 CURR_SLOT.opnd[i].X_add_number = sof;
6311 if (CURR_SLOT.opnd[i + 1].X_op == O_constant
6312 && CURR_SLOT.opnd[i + 2].X_op == O_constant)
6313 CURR_SLOT.opnd[i + 1].X_add_number
6314 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6315 else
6316 CURR_SLOT.opnd[i + 1].X_op = O_illegal;
6317 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6318 }
6319
d3156ecc 6320 highest_unmatched_operand = -4;
87f8eb97
JW		 6321 curr_out_of_range_pos = -1;
6322 error_pos = 0;
800eeca4
JW		 6323 for (; idesc; idesc = get_next_opcode (idesc))
6324 {
6325 if (num_outputs != idesc->num_outputs)
6326 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6327 if (highest_unmatched_operand < 0)
6328 highest_unmatched_operand |= 1;
6329 if (num_operands > NELEMS (idesc->operands)
6330 || (num_operands < NELEMS (idesc->operands)
6331 && idesc->operands[num_operands])
6332 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6333 continue; /* mismatch in number of arguments */
6334 if (highest_unmatched_operand < 0)
6335 highest_unmatched_operand |= 2;
800eeca4
JW		 6336
6337 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6338
6339 /* Try to match all operands. If we see an out-of-range operand,
6340 then continue trying to match the rest of the operands, since if
6341 the rest match, then this idesc will give the best error message. */
6342
6343 out_of_range_pos = -1;
800eeca4 6344 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6345 {
6346 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6347 if (result != OPERAND_MATCH)
6348 {
6349 if (result != OPERAND_OUT_OF_RANGE)
6350 break;
6351 if (out_of_range_pos < 0)
6352 /* remember position of the first out-of-range operand: */
6353 out_of_range_pos = i;
6354 }
6355 }
800eeca4 6356
87f8eb97
JW		 6357 /* If we did not match all operands, or if at least one operand was
6358 out-of-range, then this idesc does not match. Keep track of which
6359 idesc matched the most operands before failing. If we have two
6360 idescs that failed at the same position, and one had an out-of-range
6361 operand, then prefer the out-of-range operand. Thus if we have
6362 "add r0=0x1000000,r1" we get an error saying the constant is out
6363 of range instead of an error saying that the constant should have been
6364 a register. */
6365
6366 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6367 {
87f8eb97
JW		 6368 if (i > highest_unmatched_operand
6369 || (i == highest_unmatched_operand
6370 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6371 {
6372 highest_unmatched_operand = i;
87f8eb97
JW		 6373 if (out_of_range_pos >= 0)
6374 {
6375 expected_operand = idesc->operands[out_of_range_pos];
6376 error_pos = out_of_range_pos;
6377 }
6378 else
6379 {
6380 expected_operand = idesc->operands[i];
6381 error_pos = i;
6382 }
6383 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6384 }
6385 continue;
6386 }
6387
800eeca4
JW		 6388 break;
6389 }
6390 if (!idesc)
6391 {
6392 if (expected_operand)
6393 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6394 error_pos + 1, mnemonic,
800eeca4 6395 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6396 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6397 as_bad ("Wrong number of output operands");
6398 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6399 as_bad ("Wrong number of input operands");
800eeca4
JW		 6400 else
6401 as_bad ("Operand mismatch");
6402 return 0;
6403 }
4b09e828
JB		 6404
6405 /* Check that the instruction doesn't use
6406 - r0, f0, or f1 as output operands
6407 - the same predicate twice as output operands
6408 - r0 as address of a base update load or store
6409 - the same GR as output and address of a base update load
6410 - two even- or two odd-numbered FRs as output operands of a floating
6411 point parallel load.
6412 At most two (conflicting) output (or output-like) operands can exist,
6413 (floating point parallel loads have three outputs, but the base register,
6414 if updated, cannot conflict with the actual outputs). */
6415 reg2 = reg1 = -1;
6416 for (i = 0; i < num_operands; ++i)
6417 {
6418 int regno = 0;
6419
6420 reg_class = 0;
6421 switch (idesc->operands[i])
6422 {
6423 case IA64_OPND_R1:
6424 case IA64_OPND_R2:
6425 case IA64_OPND_R3:
6426 if (i < num_outputs)
6427 {
6428 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6429 reg_class = 'r';
6430 else if (reg1 < 0)
6431 reg1 = CURR_SLOT.opnd[i].X_add_number;
6432 else if (reg2 < 0)
6433 reg2 = CURR_SLOT.opnd[i].X_add_number;
6434 }
6435 break;
6436 case IA64_OPND_P1:
6437 case IA64_OPND_P2:
6438 if (i < num_outputs)
6439 {
6440 if (reg1 < 0)
6441 reg1 = CURR_SLOT.opnd[i].X_add_number;
6442 else if (reg2 < 0)
6443 reg2 = CURR_SLOT.opnd[i].X_add_number;
6444 }
6445 break;
6446 case IA64_OPND_F1:
6447 case IA64_OPND_F2:
6448 case IA64_OPND_F3:
6449 case IA64_OPND_F4:
6450 if (i < num_outputs)
6451 {
6452 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6453 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6454 {
6455 reg_class = 'f';
6456 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6457 }
6458 else if (reg1 < 0)
6459 reg1 = CURR_SLOT.opnd[i].X_add_number;
6460 else if (reg2 < 0)
6461 reg2 = CURR_SLOT.opnd[i].X_add_number;
6462 }
6463 break;
6464 case IA64_OPND_MR3:
6465 if (idesc->flags & IA64_OPCODE_POSTINC)
6466 {
6467 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6468 reg_class = 'm';
6469 else if (reg1 < 0)
6470 reg1 = CURR_SLOT.opnd[i].X_add_number;
6471 else if (reg2 < 0)
6472 reg2 = CURR_SLOT.opnd[i].X_add_number;
6473 }
6474 break;
6475 default:
6476 break;
6477 }
6478 switch (reg_class)
6479 {
6480 case 0:
6481 break;
6482 default:
6483 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6484 break;
6485 case 'm':
6486 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6487 break;
6488 }
6489 }
6490 if (reg1 == reg2)
6491 {
6492 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6493 {
6494 reg1 -= REG_GR;
6495 reg_class = 'r';
6496 }
6497 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6498 {
6499 reg1 -= REG_P;
6500 reg_class = 'p';
6501 }
6502 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6503 {
6504 reg1 -= REG_FR;
6505 reg_class = 'f';
6506 }
6507 else
6508 reg_class = 0;
6509 if (reg_class)
6510 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6511 }
6512 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6513 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6514 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6515 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6516 && ! ((reg1 ^ reg2) & 1))
6517 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6518 reg1 - REG_FR, reg2 - REG_FR);
6519 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6520 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6521 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6522 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6523 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6524 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6525 return idesc;
6526}
6527
6528static void
6529build_insn (slot, insnp)
6530 struct slot *slot;
6531 bfd_vma *insnp;
6532{
6533 const struct ia64_operand *odesc, *o2desc;
6534 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6535 bfd_vma insn;
6536 bfd_signed_vma val;
800eeca4
JW		 6537 const char *err;
6538 int i;
6539
6540 insn = idesc->opcode | slot->qp_regno;
6541
6542 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6543 {
c67e42c9
RH		 6544 if (slot->opnd[i].X_op == O_register
6545 || slot->opnd[i].X_op == O_constant
6546 || slot->opnd[i].X_op == O_index)
6547 val = slot->opnd[i].X_add_number;
6548 else if (slot->opnd[i].X_op == O_big)
800eeca4 6549 {
c67e42c9
RH		 6550 /* This must be the value 0x10000000000000000. */
6551 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6552 val = 0;
6553 }
6554 else
6555 val = 0;
6556
6557 switch (idesc->operands[i])
6558 {
6559 case IA64_OPND_IMMU64:
800eeca4
JW		 6560 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6561 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6562 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6563 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6564 continue;
6565
6566 case IA64_OPND_IMMU62:
542d6675
KH		 6567 val &= 0x3fffffffffffffffULL;
6568 if (val != slot->opnd[i].X_add_number)
6569 as_warn (_("Value truncated to 62 bits"));
6570 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6571 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6572 continue;
800eeca4 6573
c67e42c9
RH		 6574 case IA64_OPND_TGT64:
6575 val >>= 4;
6576 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6577 insn |= ((((val >> 59) & 0x1) << 36)
6578 | (((val >> 0) & 0xfffff) << 13));
6579 continue;
800eeca4 6580
c67e42c9
RH		 6581 case IA64_OPND_AR3:
6582 val -= REG_AR;
6583 break;
6584
6585 case IA64_OPND_B1:
6586 case IA64_OPND_B2:
6587 val -= REG_BR;
6588 break;
6589
6590 case IA64_OPND_CR3:
6591 val -= REG_CR;
6592 break;
6593
6594 case IA64_OPND_F1:
6595 case IA64_OPND_F2:
6596 case IA64_OPND_F3:
6597 case IA64_OPND_F4:
6598 val -= REG_FR;
6599 break;
6600
6601 case IA64_OPND_P1:
6602 case IA64_OPND_P2:
6603 val -= REG_P;
6604 break;
6605
6606 case IA64_OPND_R1:
6607 case IA64_OPND_R2:
6608 case IA64_OPND_R3:
6609 case IA64_OPND_R3_2:
6610 case IA64_OPND_CPUID_R3:
6611 case IA64_OPND_DBR_R3:
6612 case IA64_OPND_DTR_R3:
6613 case IA64_OPND_ITR_R3:
6614 case IA64_OPND_IBR_R3:
6615 case IA64_OPND_MR3:
6616 case IA64_OPND_MSR_R3:
6617 case IA64_OPND_PKR_R3:
6618 case IA64_OPND_PMC_R3:
6619 case IA64_OPND_PMD_R3:
197865e8 6620 case IA64_OPND_RR_R3:
c67e42c9
RH		 6621 val -= REG_GR;
6622 break;
6623
6624 default:
6625 break;
6626 }
6627
6628 odesc = elf64_ia64_operands + idesc->operands[i];
6629 err = (*odesc->insert) (odesc, val, &insn);
6630 if (err)
6631 as_bad_where (slot->src_file, slot->src_line,
6632 "Bad operand value: %s", err);
6633 if (idesc->flags & IA64_OPCODE_PSEUDO)
6634 {
6635 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6636 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6637 {
6638 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6639 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6640 }
c67e42c9
RH		 6641 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6642 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6643 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6644 {
c67e42c9
RH		 6645 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6646 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6647 }
6648 }
6649 }
6650 *insnp = insn;
6651}
6652
6653static void
6654emit_one_bundle ()
6655{
f4660e2c 6656 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6657 enum ia64_unit required_unit, insn_unit = 0;
6658 enum ia64_insn_type type[3], insn_type;
6659 unsigned int template, orig_template;
542d6675 6660 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6661 struct ia64_opcode *idesc;
6662 int end_of_insn_group = 0, user_template = -1;
9b505842 6663 int n, i, j, first, curr, last_slot;
800eeca4
JW		 6664 bfd_vma t0 = 0, t1 = 0;
6665 struct label_fix *lfix;
07a53e5c 6666 bfd_boolean mark_label;
800eeca4
JW		 6667 struct insn_fix *ifix;
6668 char mnemonic[16];
6669 fixS *fix;
6670 char *f;
5a9ff93d 6671 int addr_mod;
800eeca4
JW		 6672
6673 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6674 know (first >= 0 & first < NUM_SLOTS);
6675 n = MIN (3, md.num_slots_in_use);
6676
6677 /* Determine template: user user_template if specified, best match
542d6675 6678 otherwise: */
800eeca4
JW		 6679
6680 if (md.slot[first].user_template >= 0)
6681 user_template = template = md.slot[first].user_template;
6682 else
6683 {
032efc85 6684 /* Auto select appropriate template. */
800eeca4
JW		 6685 memset (type, 0, sizeof (type));
6686 curr = first;
6687 for (i = 0; i < n; ++i)
6688 {
032efc85
RH		 6689 if (md.slot[curr].label_fixups && i != 0)
6690 break;
800eeca4
JW		 6691 type[i] = md.slot[curr].idesc->type;
6692 curr = (curr + 1) % NUM_SLOTS;
6693 }
6694 template = best_template[type[0]][type[1]][type[2]];
6695 }
6696
542d6675 6697 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6698 for (i = 0; i < 3; ++i)
6699 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6700
6701 f = frag_more (16);
6702
5a9ff93d
JW		 6703 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6704 from the start of the frag. */
6705 addr_mod = frag_now_fix () & 15;
6706 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6707 as_bad (_("instruction address is not a multiple of 16"));
6708 frag_now->insn_addr = addr_mod;
6709 frag_now->has_code = 1;
6710
542d6675 6711 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6712 curr = first;
6713 idesc = md.slot[curr].idesc;
6714 end_of_insn_group = 0;
9b505842 6715 last_slot = -1;
800eeca4
JW		 6716 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6717 {
d6e78c11 6718 /* If we have unwind records, we may need to update some now. */
75214fb0
JB		 6719 unw_rec_list *ptr = md.slot[curr].unwind_record;
6720 unw_rec_list *end_ptr = NULL;
6721
d6e78c11
JW		 6722 if (ptr)
6723 {
6724 /* Find the last prologue/body record in the list for the current
6725 insn, and set the slot number for all records up to that point.
6726 This needs to be done now, because prologue/body records refer to
6727 the current point, not the point after the instruction has been
6728 issued. This matters because there may have been nops emitted
6729 meanwhile. Any non-prologue non-body record followed by a
6730 prologue/body record must also refer to the current point. */
75214fb0
JB		 6731 unw_rec_list *last_ptr;
6732
6733 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j)
6734 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record;
6735 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next)
d6e78c11
JW		 6736 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6737 || ptr->r.type == body)
6738 last_ptr = ptr;
6739 if (last_ptr)
6740 {
6741 /* Make last_ptr point one after the last prologue/body
6742 record. */
6743 last_ptr = last_ptr->next;
6744 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6745 ptr = ptr->next)
6746 {
6747 ptr->slot_number = (unsigned long) f + i;
6748 ptr->slot_frag = frag_now;
6749 }
6750 /* Remove the initialized records, so that we won't accidentally
6751 update them again if we insert a nop and continue. */
6752 md.slot[curr].unwind_record = last_ptr;
6753 }
6754 }
e0c9811a 6755
f4660e2c
JB		 6756 manual_bundling_off = md.slot[curr].manual_bundling_off;
6757 if (md.slot[curr].manual_bundling_on)
800eeca4 6758 {
f4660e2c
JB		 6759 if (curr == first)
6760 manual_bundling = 1;
800eeca4 6761 else
f4660e2c
JB		 6762 break; /* Need to start a new bundle. */
6763 }
6764
744b6414
JW		 6765 /* If this instruction specifies a template, then it must be the first
6766 instruction of a bundle. */
6767 if (curr != first && md.slot[curr].user_template >= 0)
6768 break;
6769
f4660e2c
JB		 6770 if (idesc->flags & IA64_OPCODE_SLOT2)
6771 {
6772 if (manual_bundling && !manual_bundling_off)
6773 {
6774 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6775 "`%s' must be last in bundle", idesc->name);
6776 if (i < 2)
6777 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6778 }
6779 i = 2;
800eeca4
JW		 6780 }
6781 if (idesc->flags & IA64_OPCODE_LAST)
6782 {
2434f565
JW		 6783 int required_slot;
6784 unsigned int required_template;
800eeca4
JW		 6785
6786 /* If we need a stop bit after an M slot, our only choice is
6787 template 5 (M;;MI). If we need a stop bit after a B
6788 slot, our only choice is to place it at the end of the
6789 bundle, because the only available templates are MIB,
6790 MBB, BBB, MMB, and MFB. We don't handle anything other
6791 than M and B slots because these are the only kind of
6792 instructions that can have the IA64_OPCODE_LAST bit set. */
6793 required_template = template;
6794 switch (idesc->type)
6795 {
6796 case IA64_TYPE_M:
6797 required_slot = 0;
6798 required_template = 5;
6799 break;
6800
6801 case IA64_TYPE_B:
6802 required_slot = 2;
6803 break;
6804
6805 default:
6806 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6807 "Internal error: don't know how to force %s to end"
6808 "of instruction group", idesc->name);
6809 required_slot = i;
6810 break;
6811 }
f4660e2c
JB		 6812 if (manual_bundling
6813 && (i > required_slot
6814 || (required_slot == 2 && !manual_bundling_off)
6815 || (user_template >= 0
6816 /* Changing from MMI to M;MI is OK. */
6817 && (template ^ required_template) > 1)))
6818 {
6819 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6820 "`%s' must be last in instruction group",
6821 idesc->name);
6822 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6823 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6824 }
800eeca4
JW		 6825 if (required_slot < i)
6826 /* Can't fit this instruction. */
6827 break;
6828
6829 i = required_slot;
6830 if (required_template != template)
6831 {
6832 /* If we switch the template, we need to reset the NOPs
6833 after slot i. The slot-types of the instructions ahead
6834 of i never change, so we don't need to worry about
6835 changing NOPs in front of this slot. */
6836 for (j = i; j < 3; ++j)
6837 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6838 }
6839 template = required_template;
6840 }
6841 if (curr != first && md.slot[curr].label_fixups)
6842 {
f4660e2c
JB		 6843 if (manual_bundling)
6844 {
6845 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6846 "Label must be first in a bundle");
f4660e2c
JB		 6847 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6848 }
800eeca4
JW		 6849 /* This insn must go into the first slot of a bundle. */
6850 break;
6851 }
6852
800eeca4
JW		 6853 if (end_of_insn_group && md.num_slots_in_use >= 1)
6854 {
6855 /* We need an instruction group boundary in the middle of a
6856 bundle. See if we can switch to an other template with
6857 an appropriate boundary. */
6858
6859 orig_template = template;
6860 if (i == 1 && (user_template == 4
6861 || (user_template < 0
6862 && (ia64_templ_desc[template].exec_unit[0]
6863 == IA64_UNIT_M))))
6864 {
6865 template = 5;
6866 end_of_insn_group = 0;
6867 }
6868 else if (i == 2 && (user_template == 0
6869 || (user_template < 0
6870 && (ia64_templ_desc[template].exec_unit[1]
6871 == IA64_UNIT_I)))
6872 /* This test makes sure we don't switch the template if
6873 the next instruction is one that needs to be first in
6874 an instruction group. Since all those instructions are
6875 in the M group, there is no way such an instruction can
6876 fit in this bundle even if we switch the template. The
6877 reason we have to check for this is that otherwise we
6878 may end up generating "MI;;I M.." which has the deadly
6879 effect that the second M instruction is no longer the
f4660e2c 6880 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6881 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6882 {
6883 template = 1;
6884 end_of_insn_group = 0;
6885 }
f4660e2c
JB		 6886 else if (i == 1
6887 && user_template == 0
6888 && !(idesc->flags & IA64_OPCODE_FIRST))
6889 /* Use the next slot. */
6890 continue;
800eeca4
JW		 6891 else if (curr != first)
6892 /* can't fit this insn */
6893 break;
6894
6895 if (template != orig_template)
6896 /* if we switch the template, we need to reset the NOPs
6897 after slot i. The slot-types of the instructions ahead
6898 of i never change, so we don't need to worry about
6899 changing NOPs in front of this slot. */
6900 for (j = i; j < 3; ++j)
6901 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6902 }
6903 required_unit = ia64_templ_desc[template].exec_unit[i];
6904
c10d9d8f 6905 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6906 if (idesc->type == IA64_TYPE_DYN)
6907 {
97762d08
JB		 6908 enum ia64_opnd opnd1, opnd2;
6909
800eeca4
JW		 6910 if ((strcmp (idesc->name, "nop") == 0)
6911 || (strcmp (idesc->name, "break") == 0))
6912 insn_unit = required_unit;
91d777ee
L		 6913 else if (strcmp (idesc->name, "hint") == 0)
6914 {
6915 insn_unit = required_unit;
6916 if (required_unit == IA64_UNIT_B)
6917 {
6918 switch (md.hint_b)
6919 {
6920 case hint_b_ok:
6921 break;
6922 case hint_b_warning:
6923 as_warn ("hint in B unit may be treated as nop");
6924 break;
6925 case hint_b_error:
6926 /* When manual bundling is off and there is no
6927 user template, we choose a different unit so
6928 that hint won't go into the current slot. We
6929 will fill the current bundle with nops and
6930 try to put hint into the next bundle. */
6931 if (!manual_bundling && user_template < 0)
6932 insn_unit = IA64_UNIT_I;
6933 else
6934 as_bad ("hint in B unit can't be used");
6935 break;
6936 }
6937 }
6938 }
97762d08
JB		 6939 else if (strcmp (idesc->name, "chk.s") == 0
6940 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6941 {
6942 insn_unit = IA64_UNIT_M;
97762d08
JB		 6943 if (required_unit == IA64_UNIT_I
6944 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6945 insn_unit = IA64_UNIT_I;
6946 }
6947 else
6948 as_fatal ("emit_one_bundle: unexpected dynamic op");
6949
09124b3f 6950 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6951 opnd1 = idesc->operands[0];
6952 opnd2 = idesc->operands[1];
3d56ab85 6953 ia64_free_opcode (idesc);
97762d08
JB		 6954 idesc = ia64_find_opcode (mnemonic);
6955 /* moves to/from ARs have collisions */
6956 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6957 {
6958 while (idesc != NULL
6959 && (idesc->operands[0] != opnd1
6960 || idesc->operands[1] != opnd2))
6961 idesc = get_next_opcode (idesc);
6962 }
97762d08 6963 md.slot[curr].idesc = idesc;
800eeca4
JW		 6964 }
6965 else
6966 {
6967 insn_type = idesc->type;
6968 insn_unit = IA64_UNIT_NIL;
6969 switch (insn_type)
6970 {
6971 case IA64_TYPE_A:
6972 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6973 insn_unit = required_unit;
6974 break;
542d6675 6975 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6976 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6977 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6978 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6979 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6980 default: break;
6981 }
6982 }
6983
6984 if (insn_unit != required_unit)
9b505842 6985 continue; /* Try next slot. */
800eeca4 6986
07a53e5c
RH		 6987 /* Now is a good time to fix up the labels for this insn. */
6988 mark_label = FALSE;
6989 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6990 {
6991 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6992 symbol_set_frag (lfix->sym, frag_now);
6993 mark_label |= lfix->dw2_mark_labels;
6994 }
6995 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6996 {
6997 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6998 symbol_set_frag (lfix->sym, frag_now);
6999 }
7000
7001 if (debug_type == DEBUG_DWARF2
7002 || md.slot[curr].loc_directive_seen
7003 || mark_label)
196e8040
JW		 7004 {
7005 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 7006
196e8040 7007 md.slot[curr].loc_directive_seen = 0;
07a53e5c
RH		 7008 if (mark_label)
7009 md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
7010
196e8040
JW		 7011 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
7012 }
800eeca4
JW		 7013
7014 build_insn (md.slot + curr, insn + i);
7015
d6e78c11
JW		 7016 ptr = md.slot[curr].unwind_record;
7017 if (ptr)
7018 {
7019 /* Set slot numbers for all remaining unwind records belonging to the
7020 current insn. There can not be any prologue/body unwind records
7021 here. */
d6e78c11
JW		 7022 for (; ptr != end_ptr; ptr = ptr->next)
7023 {
7024 ptr->slot_number = (unsigned long) f + i;
7025 ptr->slot_frag = frag_now;
7026 }
7027 md.slot[curr].unwind_record = NULL;
7028 }
10850f29 7029
800eeca4
JW		 7030 if (required_unit == IA64_UNIT_L)
7031 {
7032 know (i == 1);
7033 /* skip one slot for long/X-unit instructions */
7034 ++i;
7035 }
7036 --md.num_slots_in_use;
9b505842 7037 last_slot = i;
800eeca4 7038
800eeca4
JW		 7039 for (j = 0; j < md.slot[curr].num_fixups; ++j)
7040 {
7041 ifix = md.slot[curr].fixup + j;
5a080f89 7042 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 7043 &ifix->expr, ifix->is_pcrel, ifix->code);
7044 fix->tc_fix_data.opnd = ifix->opnd;
7045 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
7046 fix->fx_file = md.slot[curr].src_file;
7047 fix->fx_line = md.slot[curr].src_line;
7048 }
7049
7050 end_of_insn_group = md.slot[curr].end_of_insn_group;
7051
542d6675 7052 /* clear slot: */
800eeca4
JW		 7053 ia64_free_opcode (md.slot[curr].idesc);
7054 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7055 md.slot[curr].user_template = -1;
7056
7057 if (manual_bundling_off)
7058 {
7059 manual_bundling = 0;
7060 break;
7061 }
7062 curr = (curr + 1) % NUM_SLOTS;
7063 idesc = md.slot[curr].idesc;
7064 }
f4660e2c 7065 if (manual_bundling > 0)
800eeca4
JW		 7066 {
7067 if (md.num_slots_in_use > 0)
ac025970 7068 {
9b505842
JB		 7069 if (last_slot >= 2)
7070 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7071 "`%s' does not fit into bundle", idesc->name);
7072 else if (last_slot < 0)
7073 {
7074 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7075 "`%s' does not fit into %s template",
7076 idesc->name, ia64_templ_desc[template].name);
7077 /* Drop first insn so we don't livelock. */
7078 --md.num_slots_in_use;
7079 know (curr == first);
7080 ia64_free_opcode (md.slot[curr].idesc);
7081 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7082 md.slot[curr].user_template = -1;
7083 }
7084 else
7085 {
7086 const char *where;
7087
7088 if (template == 2)
7089 where = "X slot";
7090 else if (last_slot == 0)
7091 where = "slots 2 or 3";
7092 else
7093 where = "slot 3";
7094 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7095 "`%s' can't go in %s of %s template",
7096 idesc->name, where, ia64_templ_desc[template].name);
7097 }
ac025970 7098 }
800eeca4
JW		 7099 else
7100 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7101 "Missing '}' at end of file");
7102 }
7103 know (md.num_slots_in_use < NUM_SLOTS);
7104
7105 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
7106 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
7107
44f5c83a
JW		 7108 number_to_chars_littleendian (f + 0, t0, 8);
7109 number_to_chars_littleendian (f + 8, t1, 8);
800eeca4
JW		 7110}
7111
7112int
7113md_parse_option (c, arg)
7114 int c;
7115 char *arg;
7116{
7463c317 7117
800eeca4
JW		 7118 switch (c)
7119 {
c43c2cc5 7120 /* Switches from the Intel assembler. */
44f5c83a 7121 case 'm':
800eeca4
JW		 7122 if (strcmp (arg, "ilp64") == 0
7123 || strcmp (arg, "lp64") == 0
7124 || strcmp (arg, "p64") == 0)
7125 {
7126 md.flags |= EF_IA_64_ABI64;
7127 }
7128 else if (strcmp (arg, "ilp32") == 0)
7129 {
7130 md.flags &= ~EF_IA_64_ABI64;
7131 }
7132 else if (strcmp (arg, "le") == 0)
7133 {
7134 md.flags &= ~EF_IA_64_BE;
549f748d 7135 default_big_endian = 0;
800eeca4
JW		 7136 }
7137 else if (strcmp (arg, "be") == 0)
7138 {
7139 md.flags |= EF_IA_64_BE;
549f748d 7140 default_big_endian = 1;
800eeca4 7141 }
970d6792
L		 7142 else if (strncmp (arg, "unwind-check=", 13) == 0)
7143 {
7144 arg += 13;
7145 if (strcmp (arg, "warning") == 0)
7146 md.unwind_check = unwind_check_warning;
7147 else if (strcmp (arg, "error") == 0)
7148 md.unwind_check = unwind_check_error;
7149 else
7150 return 0;
7151 }
91d777ee
L		 7152 else if (strncmp (arg, "hint.b=", 7) == 0)
7153 {
7154 arg += 7;
7155 if (strcmp (arg, "ok") == 0)
7156 md.hint_b = hint_b_ok;
7157 else if (strcmp (arg, "warning") == 0)
7158 md.hint_b = hint_b_warning;
7159 else if (strcmp (arg, "error") == 0)
7160 md.hint_b = hint_b_error;
7161 else
7162 return 0;
7163 }
8c2fda1d
L		 7164 else if (strncmp (arg, "tune=", 5) == 0)
7165 {
7166 arg += 5;
7167 if (strcmp (arg, "itanium1") == 0)
7168 md.tune = itanium1;
7169 else if (strcmp (arg, "itanium2") == 0)
7170 md.tune = itanium2;
7171 else
7172 return 0;
7173 }
800eeca4
JW		 7174 else
7175 return 0;
7176 break;
7177
7178 case 'N':
7179 if (strcmp (arg, "so") == 0)
7180 {
542d6675 7181 /* Suppress signon message. */
800eeca4
JW		 7182 }
7183 else if (strcmp (arg, "pi") == 0)
7184 {
7185 /* Reject privileged instructions. FIXME */
7186 }
7187 else if (strcmp (arg, "us") == 0)
7188 {
7189 /* Allow union of signed and unsigned range. FIXME */
7190 }
7191 else if (strcmp (arg, "close_fcalls") == 0)
7192 {
7193 /* Do not resolve global function calls. */
7194 }
7195 else
7196 return 0;
7197 break;
7198
7199 case 'C':
7200 /* temp[="prefix"] Insert temporary labels into the object file
7201 symbol table prefixed by "prefix".
7202 Default prefix is ":temp:".
7203 */
7204 break;
7205
7206 case 'a':
800eeca4
JW		 7207 /* indirect=<tgt> Assume unannotated indirect branches behavior
7208 according to <tgt> --
7209 exit: branch out from the current context (default)
7210 labels: all labels in context may be branch targets
7211 */
85b40035
L		 7212 if (strncmp (arg, "indirect=", 9) != 0)
7213 return 0;
800eeca4
JW		 7214 break;
7215
7216 case 'x':
7217 /* -X conflicts with an ignored option, use -x instead */
7218 md.detect_dv = 1;
7219 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7220 {
7221 /* set default mode to explicit */
7222 md.default_explicit_mode = 1;
7223 break;
7224 }
800eeca4 7225 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7226 {
7227 md.default_explicit_mode = 0;
7228 }
f1dab70d
JB		 7229 else if (strcmp (arg, "none") == 0)
7230 {
7231 md.detect_dv = 0;
7232 }
800eeca4 7233 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7234 {
7235 md.debug_dv = 1;
7236 }
800eeca4 7237 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7238 {
7239 md.default_explicit_mode = 1;
7240 md.debug_dv = 1;
7241 }
f1dab70d
JB		 7242 else if (strcmp (arg, "debugn") == 0)
7243 {
7244 md.debug_dv = 1;
7245 md.detect_dv = 0;
7246 }
800eeca4 7247 else
542d6675
KH		 7248 {
7249 as_bad (_("Unrecognized option '-x%s'"), arg);
7250 }
800eeca4
JW		 7251 break;
7252
7253 case 'S':
7254 /* nops Print nops statistics. */
7255 break;
7256
c43c2cc5
JW		 7257 /* GNU specific switches for gcc. */
7258 case OPTION_MCONSTANT_GP:
7259 md.flags |= EF_IA_64_CONS_GP;
7260 break;
7261
7262 case OPTION_MAUTO_PIC:
7263 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7264 break;
7265
800eeca4
JW		 7266 default:
7267 return 0;
7268 }
7269
7270 return 1;
7271}
7272
7273void
7274md_show_usage (stream)
7275 FILE *stream;
7276{
542d6675 7277 fputs (_("\
800eeca4 7278IA-64 options:\n\
6290819d
NC		 7279 --mconstant-gp mark output file as using the constant-GP model\n\
7280 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7281 --mauto-pic mark output file as using the constant-GP model\n\
7282 without function descriptors (sets ELF header flag\n\
7283 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7284 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7285 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
8c2fda1d
L		 7286 -mtune=[itanium1|itanium2]\n\
7287 tune for a specific CPU (default -mtune=itanium2)\n\
970d6792
L		 7288 -munwind-check=[warning|error]\n\
7289 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7290 -mhint.b=[ok|warning|error]\n\
7291 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7292 -x | -xexplicit turn on dependency violation checking\n\
7293 -xauto automagically remove dependency violations (default)\n\
7294 -xnone turn off dependency violation checking\n\
7295 -xdebug debug dependency violation checker\n\
7296 -xdebugn debug dependency violation checker but turn off\n\
7297 dependency violation checking\n\
7298 -xdebugx debug dependency violation checker and turn on\n\
7299 dependency violation checking\n"),
800eeca4
JW		 7300 stream);
7301}
7302
acebd4ce
AS		 7303void
7304ia64_after_parse_args ()
7305{
7306 if (debug_type == DEBUG_STABS)
7307 as_fatal (_("--gstabs is not supported for ia64"));
7308}
7309
44576e1f
RH		 7310/* Return true if TYPE fits in TEMPL at SLOT. */
7311
7312static int
800eeca4
JW		 7313match (int templ, int type, int slot)
7314{
7315 enum ia64_unit unit;
7316 int result;
7317
7318 unit = ia64_templ_desc[templ].exec_unit[slot];
7319 switch (type)
7320 {
7321 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7322 case IA64_TYPE_A:
7323 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7324 break;
7325 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7326 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7327 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7328 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7329 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7330 default: result = 0; break;
7331 }
7332 return result;
7333}
7334
7c06efaa
JW		 7335/* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7336 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7337 type M or I would fit in TEMPL at SLOT. */
44576e1f
RH		 7338
7339static inline int
7340extra_goodness (int templ, int slot)
7341{
8c2fda1d
L		 7342 switch (md.tune)
7343 {
7344 case itanium1:
7345 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7346 return 2;
7347 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7348 return 1;
7349 else
7350 return 0;
7351 break;
7352 case itanium2:
7353 if (match (templ, IA64_TYPE_M, slot)
7354 || match (templ, IA64_TYPE_I, slot))
7355 /* Favor M- and I-unit NOPs. We definitely want to avoid
7356 F-unit and B-unit may cause split-issue or less-than-optimal
7357 branch-prediction. */
7358 return 2;
7359 else
7360 return 0;
7361 break;
7362 default:
7363 abort ();
7364 return 0;
7365 }
44576e1f
RH		 7366}
7367
800eeca4
JW		 7368/* This function is called once, at assembler startup time. It sets
7369 up all the tables, etc. that the MD part of the assembler will need
7370 that can be determined before arguments are parsed. */
7371void
7372md_begin ()
7373{
8b84be9d 7374 int i, j, k, t, goodness, best, ok;
800eeca4
JW		 7375 const char *err;
7376 char name[8];
7377
7378 md.auto_align = 1;
7379 md.explicit_mode = md.default_explicit_mode;
7380
7381 bfd_set_section_alignment (stdoutput, text_section, 4);
7382
0234cb7c 7383 /* Make sure function pointers get initialized. */
10a98291 7384 target_big_endian = -1;
549f748d 7385 dot_byteorder (default_big_endian);
10a98291 7386
35f5df7f
L		 7387 alias_hash = hash_new ();
7388 alias_name_hash = hash_new ();
7389 secalias_hash = hash_new ();
7390 secalias_name_hash = hash_new ();
7391
13ae64f3
JJ		 7392 pseudo_func[FUNC_DTP_MODULE].u.sym =
7393 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7394 &zero_address_frag);
7395
7396 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7397 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7398 &zero_address_frag);
7399
800eeca4 7400 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7401 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7402 &zero_address_frag);
800eeca4
JW		 7403
7404 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7405 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7406 &zero_address_frag);
800eeca4
JW		 7407
7408 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7409 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7410 &zero_address_frag);
800eeca4 7411
fa2c7eff
RH		 7412 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7413 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7414 &zero_address_frag);
7415
c67e42c9 7416 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7417 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7418 &zero_address_frag);
c67e42c9 7419
800eeca4 7420 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7421 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7422 &zero_address_frag);
800eeca4
JW		 7423
7424 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7425 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7426 &zero_address_frag);
800eeca4
JW		 7427
7428 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7429 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7430 &zero_address_frag);
800eeca4 7431
13ae64f3
JJ		 7432 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7433 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7434 &zero_address_frag);
7435
800eeca4 7436 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7437 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7438 &zero_address_frag);
800eeca4
JW		 7439
7440 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7441 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7442 &zero_address_frag);
800eeca4 7443
13ae64f3
JJ		 7444 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7445 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7446 &zero_address_frag);
7447
7448 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7449 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7450 &zero_address_frag);
7451
7452 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7453 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7454 &zero_address_frag);
7455
3969b680
RH		 7456 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7457 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7458 &zero_address_frag);
7459
f6fe78d6
JW		 7460 if (md.tune != itanium1)
7461 {
7462 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7463 le_nop[0] = 0x8;
7464 le_nop_stop[0] = 0x9;
7465 }
7466
197865e8 7467 /* Compute the table of best templates. We compute goodness as a
8c2fda1d
L		 7468 base 4 value, in which each match counts for 3. Match-failures
7469 result in NOPs and we use extra_goodness() to pick the execution
7470 units that are best suited for issuing the NOP. */
800eeca4
JW		 7471 for (i = 0; i < IA64_NUM_TYPES; ++i)
7472 for (j = 0; j < IA64_NUM_TYPES; ++j)
7473 for (k = 0; k < IA64_NUM_TYPES; ++k)
7474 {
7475 best = 0;
7476 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7477 {
7478 goodness = 0;
7479 if (match (t, i, 0))
7480 {
7481 if (match (t, j, 1))
7482 {
286cee81 7483 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2))
44576e1f 7484 goodness = 3 + 3 + 3;
800eeca4 7485 else
44576e1f 7486 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7487 }
7488 else if (match (t, j, 2))
44576e1f 7489 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7490 else
44576e1f
RH		 7491 {
7492 goodness = 3;
7493 goodness += extra_goodness (t, 1);
7494 goodness += extra_goodness (t, 2);
7495 }
800eeca4
JW		 7496 }
7497 else if (match (t, i, 1))
7498 {
286cee81 7499 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2))
44576e1f 7500 goodness = 3 + 3;
800eeca4 7501 else
44576e1f 7502 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7503 }
7504 else if (match (t, i, 2))
44576e1f 7505 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7506
7507 if (goodness > best)
7508 {
7509 best = goodness;
7510 best_template[i][j][k] = t;
7511 }
7512 }
7513 }
7514
7c06efaa
JW		 7515#ifdef DEBUG_TEMPLATES
7516 /* For debugging changes to the best_template calculations. We don't care
7517 about combinations with invalid instructions, so start the loops at 1. */
7518 for (i = 0; i < IA64_NUM_TYPES; ++i)
7519 for (j = 0; j < IA64_NUM_TYPES; ++j)
7520 for (k = 0; k < IA64_NUM_TYPES; ++k)
7521 {
7522 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f',
7523 'x', 'd' };
7524 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j],
7525 type_letter[k],
7526 ia64_templ_desc[best_template[i][j][k]].name);
7527 }
7528#endif
7529
800eeca4
JW		 7530 for (i = 0; i < NUM_SLOTS; ++i)
7531 md.slot[i].user_template = -1;
7532
7533 md.pseudo_hash = hash_new ();
7534 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7535 {
7536 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7537 (void *) (pseudo_opcode + i));
7538 if (err)
7539 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7540 pseudo_opcode[i].name, err);
7541 }
7542
7543 md.reg_hash = hash_new ();
7544 md.dynreg_hash = hash_new ();
7545 md.const_hash = hash_new ();
7546 md.entry_hash = hash_new ();
7547
542d6675 7548 /* general registers: */
8b84be9d
JB		 7549 declare_register_set ("r", 128, REG_GR);
7550 declare_register ("gp", REG_GR + 1);
7551 declare_register ("sp", REG_GR + 12);
7552 declare_register ("tp", REG_GR + 13);
7553 declare_register_set ("ret", 4, REG_GR + 8);
800eeca4 7554
542d6675 7555 /* floating point registers: */
8b84be9d
JB		 7556 declare_register_set ("f", 128, REG_FR);
7557 declare_register_set ("farg", 8, REG_FR + 8);
7558 declare_register_set ("fret", 8, REG_FR + 8);
800eeca4 7559
542d6675 7560 /* branch registers: */
8b84be9d
JB		 7561 declare_register_set ("b", 8, REG_BR);
7562 declare_register ("rp", REG_BR + 0);
800eeca4 7563
8b84be9d
JB		 7564 /* predicate registers: */
7565 declare_register_set ("p", 64, REG_P);
7566 declare_register ("pr", REG_PR);
7567 declare_register ("pr.rot", REG_PR_ROT);
800eeca4 7568
8b84be9d
JB		 7569 /* application registers: */
7570 declare_register_set ("ar", 128, REG_AR);
5e0bd176
JB		 7571 for (i = 0; i < NELEMS (ar); ++i)
7572 declare_register (ar[i].name, REG_AR + ar[i].regnum);
800eeca4 7573
8b84be9d
JB		 7574 /* control registers: */
7575 declare_register_set ("cr", 128, REG_CR);
5e0bd176
JB		 7576 for (i = 0; i < NELEMS (cr); ++i)
7577 declare_register (cr[i].name, REG_CR + cr[i].regnum);
800eeca4 7578
8b84be9d
JB		 7579 declare_register ("ip", REG_IP);
7580 declare_register ("cfm", REG_CFM);
7581 declare_register ("psr", REG_PSR);
7582 declare_register ("psr.l", REG_PSR_L);
7583 declare_register ("psr.um", REG_PSR_UM);
7584
7585 for (i = 0; i < NELEMS (indirect_reg); ++i)
7586 {
7587 unsigned int regnum = indirect_reg[i].regnum;
7588
7589 md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum);
7590 }
800eeca4 7591
542d6675 7592 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7593 declare_register ("psp", REG_PSP);
7594
800eeca4
JW		 7595 for (i = 0; i < NELEMS (const_bits); ++i)
7596 {
7597 err = hash_insert (md.const_hash, const_bits[i].name,
7598 (PTR) (const_bits + i));
7599 if (err)
7600 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7601 name, err);
7602 }
7603
44f5c83a
JW		 7604 /* Set the architecture and machine depending on defaults and command line
7605 options. */
7606 if (md.flags & EF_IA_64_ABI64)
7607 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7608 else
7609 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7610
7611 if (! ok)
7612 as_warn (_("Could not set architecture and machine"));
800eeca4 7613
557debba
JW		 7614 /* Set the pointer size and pointer shift size depending on md.flags */
7615
7616 if (md.flags & EF_IA_64_ABI64)
7617 {
7618 md.pointer_size = 8; /* pointers are 8 bytes */
7619 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7620 }
7621 else
7622 {
7623 md.pointer_size = 4; /* pointers are 4 bytes */
7624 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7625 }
7626
800eeca4
JW		 7627 md.mem_offset.hint = 0;
7628 md.path = 0;
7629 md.maxpaths = 0;
7630 md.entry_labels = NULL;
7631}
7632
970d6792
L		 7633/* Set the default options in md. Cannot do this in md_begin because
7634 that is called after md_parse_option which is where we set the
7635 options in md based on command line options. */
44f5c83a
JW		 7636
7637void
7638ia64_init (argc, argv)
2434f565
JW		 7639 int argc ATTRIBUTE_UNUSED;
7640 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7641{
1cd8ff38 7642 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7643 md.detect_dv = 1;
970d6792
L		 7644 /* FIXME: We should change it to unwind_check_error someday. */
7645 md.unwind_check = unwind_check_warning;
91d777ee 7646 md.hint_b = hint_b_error;
8c2fda1d 7647 md.tune = itanium2;
44f5c83a
JW		 7648}
7649
7650/* Return a string for the target object file format. */
7651
7652const char *
7653ia64_target_format ()
7654{
7655 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7656 {
72a76794
JW		 7657 if (md.flags & EF_IA_64_BE)
7658 {
7659 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7660#if defined(TE_AIX50)
7463c317 7661 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7662#elif defined(TE_HPUX)
7663 return "elf64-ia64-hpux-big";
7463c317 7664#else
72a76794 7665 return "elf64-ia64-big";
7463c317 7666#endif
72a76794 7667 else
1cd8ff38 7668#if defined(TE_AIX50)
7463c317 7669 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7670#elif defined(TE_HPUX)
7671 return "elf32-ia64-hpux-big";
7463c317 7672#else
72a76794 7673 return "elf32-ia64-big";
7463c317 7674#endif
72a76794 7675 }
44f5c83a 7676 else
72a76794
JW		 7677 {
7678 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7679#ifdef TE_AIX50
7680 return "elf64-ia64-aix-little";
7681#else
72a76794 7682 return "elf64-ia64-little";
7463c317 7683#endif
72a76794 7684 else
7463c317
TW		 7685#ifdef TE_AIX50
7686 return "elf32-ia64-aix-little";
7687#else
72a76794 7688 return "elf32-ia64-little";
7463c317 7689#endif
72a76794 7690 }
44f5c83a
JW		 7691 }
7692 else
7693 return "unknown-format";
7694}
7695
800eeca4
JW		 7696void
7697ia64_end_of_source ()
7698{
542d6675 7699 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7700 insn_group_break (1, 0, 0);
7701
542d6675 7702 /* emits slots we haven't written yet: */
800eeca4
JW		 7703 ia64_flush_insns ();
7704
7705 bfd_set_private_flags (stdoutput, md.flags);
7706
800eeca4
JW		 7707 md.mem_offset.hint = 0;
7708}
7709
7710void
7711ia64_start_line ()
7712{
e4e8248d
JB		 7713 static int first;
7714
7715 if (!first) {
7716 /* Make sure we don't reference input_line_pointer[-1] when that's
7717 not valid. */
7718 first = 1;
7719 return;
7720 }
7721
f1bcba5b
JW		 7722 if (md.qp.X_op == O_register)
7723 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7724 md.qp.X_op = O_absent;
7725
7726 if (ignore_input ())
7727 return;
7728
7729 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7730 {
7731 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7732 {
7733 static int warned;
7734
7735 if (!warned)
7736 {
7737 warned = 1;
7738 as_warn (_("Explicit stops are ignored in auto mode"));
7739 }
7740 }
800eeca4 7741 else
542d6675 7742 insn_group_break (1, 0, 0);
800eeca4 7743 }
e4e8248d 7744 else if (input_line_pointer[-1] == '{')
800eeca4 7745 {
800eeca4
JW		 7746 if (md.manual_bundling)
7747 as_warn ("Found '{' when manual bundling is already turned on");
7748 else
7749 CURR_SLOT.manual_bundling_on = 1;
7750 md.manual_bundling = 1;
7751
542d6675
KH		 7752 /* Bundling is only acceptable in explicit mode
7753 or when in default automatic mode. */
800eeca4 7754 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7755 {
7756 if (!md.mode_explicitly_set
7757 && !md.default_explicit_mode)
7758 dot_dv_mode ('E');
7759 else
7760 as_warn (_("Found '{' after explicit switch to automatic mode"));
7761 }
e4e8248d
JB		 7762 }
7763 else if (input_line_pointer[-1] == '}')
7764 {
800eeca4
JW		 7765 if (!md.manual_bundling)
7766 as_warn ("Found '}' when manual bundling is off");
7767 else
7768 PREV_SLOT.manual_bundling_off = 1;
7769 md.manual_bundling = 0;
7770
7771 /* switch back to automatic mode, if applicable */
197865e8 7772 if (md.detect_dv
542d6675
KH		 7773 && md.explicit_mode
7774 && !md.mode_explicitly_set
7775 && !md.default_explicit_mode)
7776 dot_dv_mode ('A');
e4e8248d
JB		 7777 }
7778}
800eeca4 7779
e4e8248d
JB		 7780/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7781 labels. */
7782static int defining_tag = 0;
7783
7784int
7785ia64_unrecognized_line (ch)
7786 int ch;
7787{
7788 switch (ch)
7789 {
7790 case '(':
60d11e55 7791 expression_and_evaluate (&md.qp);
e4e8248d 7792 if (*input_line_pointer++ != ')')
800eeca4 7793 {
e4e8248d
JB		 7794 as_bad ("Expected ')'");
7795 return 0;
7796 }
7797 if (md.qp.X_op != O_register)
7798 {
7799 as_bad ("Qualifying predicate expected");
7800 return 0;
7801 }
7802 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7803 {
7804 as_bad ("Predicate register expected");
7805 return 0;
800eeca4 7806 }
800eeca4
JW		 7807 return 1;
7808
f1bcba5b
JW		 7809 case '[':
7810 {
7811 char *s;
7812 char c;
7813 symbolS *tag;
4d5a53ff 7814 int temp;
f1bcba5b
JW		 7815
7816 if (md.qp.X_op == O_register)
7817 {
7818 as_bad ("Tag must come before qualifying predicate.");
7819 return 0;
7820 }
4d5a53ff
JW		 7821
7822 /* This implements just enough of read_a_source_file in read.c to
7823 recognize labels. */
7824 if (is_name_beginner (*input_line_pointer))
7825 {
7826 s = input_line_pointer;
7827 c = get_symbol_end ();
7828 }
7829 else if (LOCAL_LABELS_FB
3882b010 7830 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7831 {
7832 temp = 0;
3882b010 7833 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7834 temp = (temp * 10) + *input_line_pointer++ - '0';
7835 fb_label_instance_inc (temp);
7836 s = fb_label_name (temp, 0);
7837 c = *input_line_pointer;
7838 }
7839 else
7840 {
7841 s = NULL;
7842 c = '\0';
7843 }
f1bcba5b
JW		 7844 if (c != ':')
7845 {
7846 /* Put ':' back for error messages' sake. */
7847 *input_line_pointer++ = ':';
7848 as_bad ("Expected ':'");
7849 return 0;
7850 }
4d5a53ff 7851
f1bcba5b
JW		 7852 defining_tag = 1;
7853 tag = colon (s);
7854 defining_tag = 0;
7855 /* Put ':' back for error messages' sake. */
7856 *input_line_pointer++ = ':';
7857 if (*input_line_pointer++ != ']')
7858 {
7859 as_bad ("Expected ']'");
7860 return 0;
7861 }
7862 if (! tag)
7863 {
7864 as_bad ("Tag name expected");
7865 return 0;
7866 }
7867 return 1;
7868 }
7869
800eeca4
JW		 7870 default:
7871 break;
7872 }
542d6675
KH		 7873
7874 /* Not a valid line. */
7875 return 0;
800eeca4
JW		 7876}
7877
7878void
7879ia64_frob_label (sym)
7880 struct symbol *sym;
7881{
7882 struct label_fix *fix;
7883
f1bcba5b
JW		 7884 /* Tags need special handling since they are not bundle breaks like
7885 labels. */
7886 if (defining_tag)
7887 {
7888 fix = obstack_alloc (&notes, sizeof (*fix));
7889 fix->sym = sym;
7890 fix->next = CURR_SLOT.tag_fixups;
07a53e5c 7891 fix->dw2_mark_labels = FALSE;
f1bcba5b
JW		 7892 CURR_SLOT.tag_fixups = fix;
7893
7894 return;
7895 }
7896
800eeca4
JW		 7897 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7898 {
7899 md.last_text_seg = now_seg;
7900 fix = obstack_alloc (&notes, sizeof (*fix));
7901 fix->sym = sym;
7902 fix->next = CURR_SLOT.label_fixups;
07a53e5c 7903 fix->dw2_mark_labels = dwarf2_loc_mark_labels;
800eeca4
JW		 7904 CURR_SLOT.label_fixups = fix;
7905
542d6675 7906 /* Keep track of how many code entry points we've seen. */
800eeca4 7907 if (md.path == md.maxpaths)
542d6675
KH		 7908 {
7909 md.maxpaths += 20;
7910 md.entry_labels = (const char **)
7911 xrealloc ((void *) md.entry_labels,
7912 md.maxpaths * sizeof (char *));
7913 }
800eeca4
JW		 7914 md.entry_labels[md.path++] = S_GET_NAME (sym);
7915 }
7916}
7917
936cf02e
JW		 7918#ifdef TE_HPUX
7919/* The HP-UX linker will give unresolved symbol errors for symbols
7920 that are declared but unused. This routine removes declared,
7921 unused symbols from an object. */
7922int
7923ia64_frob_symbol (sym)
7924 struct symbol *sym;
7925{
7926 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7927 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7928 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7929 && ! S_IS_EXTERNAL (sym)))
7930 return 1;
7931 return 0;
7932}
7933#endif
7934
800eeca4
JW		 7935void
7936ia64_flush_pending_output ()
7937{
4d5a53ff
JW		 7938 if (!md.keep_pending_output
7939 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7940 {
7941 /* ??? This causes many unnecessary stop bits to be emitted.
7942 Unfortunately, it isn't clear if it is safe to remove this. */
7943 insn_group_break (1, 0, 0);
7944 ia64_flush_insns ();
7945 }
7946}
7947
7948/* Do ia64-specific expression optimization. All that's done here is
7949 to transform index expressions that are either due to the indexing
7950 of rotating registers or due to the indexing of indirect register
7951 sets. */
7952int
7953ia64_optimize_expr (l, op, r)
7954 expressionS *l;
7955 operatorT op;
7956 expressionS *r;
7957{
6a2375c6
JB		 7958 if (op != O_index)
7959 return 0;
7960 resolve_expression (l);
7961 if (l->X_op == O_register)
800eeca4 7962 {
6a2375c6
JB		 7963 unsigned num_regs = l->X_add_number >> 16;
7964
7965 resolve_expression (r);
7966 if (num_regs)
800eeca4 7967 {
6a2375c6
JB		 7968 /* Left side is a .rotX-allocated register. */
7969 if (r->X_op != O_constant)
800eeca4 7970 {
6a2375c6
JB		 7971 as_bad ("Rotating register index must be a non-negative constant");
7972 r->X_add_number = 0;
7973 }
7974 else if ((valueT) r->X_add_number >= num_regs)
7975 {
7976 as_bad ("Index out of range 0..%u", num_regs - 1);
800eeca4
JW		 7977 r->X_add_number = 0;
7978 }
7979 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7980 return 1;
7981 }
6a2375c6 7982 else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR)
800eeca4 7983 {
6a2375c6
JB		 7984 if (r->X_op != O_register
7985 || r->X_add_number < REG_GR
7986 || r->X_add_number > REG_GR + 127)
800eeca4 7987 {
6a2375c6
JB		 7988 as_bad ("Indirect register index must be a general register");
7989 r->X_add_number = REG_GR;
800eeca4
JW		 7990 }
7991 l->X_op = O_index;
8b84be9d 7992 l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID];
800eeca4
JW		 7993 l->X_add_number = r->X_add_number;
7994 return 1;
7995 }
7996 }
6a2375c6
JB		 7997 as_bad ("Index can only be applied to rotating or indirect registers");
7998 /* Fall back to some register use of which has as little as possible
7999 side effects, to minimize subsequent error messages. */
8000 l->X_op = O_register;
8001 l->X_add_number = REG_GR + 3;
8002 return 1;
800eeca4
JW		 8003}
8004
8005int
16a48f83 8006ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 8007 char *name;
8008 expressionS *e;
16a48f83 8009 char *nextcharP;
800eeca4
JW		 8010{
8011 struct const_desc *cdesc;
8012 struct dynreg *dr = 0;
16a48f83 8013 unsigned int idx;
800eeca4
JW		 8014 struct symbol *sym;
8015 char *end;
8016
16a48f83
JB		 8017 if (*name == '@')
8018 {
8019 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
8020
8021 /* Find what relocation pseudo-function we're dealing with. */
8022 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
8023 if (pseudo_func[idx].name
8024 && pseudo_func[idx].name[0] == name[1]
8025 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
8026 {
8027 pseudo_type = pseudo_func[idx].type;
8028 break;
8029 }
8030 switch (pseudo_type)
8031 {
8032 case PSEUDO_FUNC_RELOC:
8033 end = input_line_pointer;
8034 if (*nextcharP != '(')
8035 {
8036 as_bad ("Expected '('");
2f6d622e 8037 break;
16a48f83
JB		 8038 }
8039 /* Skip '('. */
8040 ++input_line_pointer;
8041 expression (e);
8042 if (*input_line_pointer != ')')
8043 {
8044 as_bad ("Missing ')'");
8045 goto done;
8046 }
8047 /* Skip ')'. */
8048 ++input_line_pointer;
8049 if (e->X_op != O_symbol)
8050 {
8051 if (e->X_op != O_pseudo_fixup)
8052 {
8053 as_bad ("Not a symbolic expression");
8054 goto done;
8055 }
8056 if (idx != FUNC_LT_RELATIVE)
8057 {
8058 as_bad ("Illegal combination of relocation functions");
8059 goto done;
8060 }
8061 switch (S_GET_VALUE (e->X_op_symbol))
8062 {
8063 case FUNC_FPTR_RELATIVE:
8064 idx = FUNC_LT_FPTR_RELATIVE; break;
8065 case FUNC_DTP_MODULE:
8066 idx = FUNC_LT_DTP_MODULE; break;
8067 case FUNC_DTP_RELATIVE:
8068 idx = FUNC_LT_DTP_RELATIVE; break;
8069 case FUNC_TP_RELATIVE:
8070 idx = FUNC_LT_TP_RELATIVE; break;
8071 default:
8072 as_bad ("Illegal combination of relocation functions");
8073 goto done;
8074 }
8075 }
8076 /* Make sure gas doesn't get rid of local symbols that are used
8077 in relocs. */
8078 e->X_op = O_pseudo_fixup;
8079 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 8080 done:
8081 *nextcharP = *input_line_pointer;
16a48f83
JB		 8082 break;
8083
8084 case PSEUDO_FUNC_CONST:
8085 e->X_op = O_constant;
8086 e->X_add_number = pseudo_func[idx].u.ival;
8087 break;
8088
8089 case PSEUDO_FUNC_REG:
8090 e->X_op = O_register;
8091 e->X_add_number = pseudo_func[idx].u.ival;
8092 break;
8093
8094 default:
8095 return 0;
8096 }
16a48f83
JB		 8097 return 1;
8098 }
8099
542d6675 8100 /* first see if NAME is a known register name: */
800eeca4
JW		 8101 sym = hash_find (md.reg_hash, name);
8102 if (sym)
8103 {
8104 e->X_op = O_register;
8105 e->X_add_number = S_GET_VALUE (sym);
8106 return 1;
8107 }
8108
8109 cdesc = hash_find (md.const_hash, name);
8110 if (cdesc)
8111 {
8112 e->X_op = O_constant;
8113 e->X_add_number = cdesc->value;
8114 return 1;
8115 }
8116
542d6675 8117 /* check for inN, locN, or outN: */
26b810ce 8118 idx = 0;
800eeca4
JW		 8119 switch (name[0])
8120 {
8121 case 'i':
3882b010 8122 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 8123 {
8124 dr = &md.in;
26b810ce 8125 idx = 2;
800eeca4
JW		 8126 }
8127 break;
8128
8129 case 'l':
3882b010 8130 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 8131 {
8132 dr = &md.loc;
26b810ce 8133 idx = 3;
800eeca4
JW		 8134 }
8135 break;
8136
8137 case 'o':
3882b010 8138 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 8139 {
8140 dr = &md.out;
26b810ce 8141 idx = 3;
800eeca4
JW		 8142 }
8143 break;
8144
8145 default:
8146 break;
8147 }
8148
26b810ce
JB		 8149 /* Ignore register numbers with leading zeroes, except zero itself. */
8150 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 8151 {
26b810ce
JB		 8152 unsigned long regnum;
8153
542d6675 8154 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 8155 regnum = strtoul (name + idx, &end, 10);
8156 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 8157 {
26b810ce 8158 if (regnum >= dr->num_regs)
800eeca4
JW		 8159 {
8160 if (!dr->num_regs)
8161 as_bad ("No current frame");
8162 else
542d6675
KH		 8163 as_bad ("Register number out of range 0..%u",
8164 dr->num_regs - 1);
800eeca4
JW		 8165 regnum = 0;
8166 }
8167 e->X_op = O_register;
8168 e->X_add_number = dr->base + regnum;
8169 return 1;
8170 }
8171 }
8172
20b36a95
JB		 8173 end = alloca (strlen (name) + 1);
8174 strcpy (end, name);
8175 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 8176 if ((dr = hash_find (md.dynreg_hash, name)))
8177 {
8178 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 8179 Store the base register number in the low 16 bits of
8180 X_add_number and the size of the register set in the top 16
8181 bits. */
800eeca4
JW		 8182 e->X_op = O_register;
8183 e->X_add_number = dr->base | (dr->num_regs << 16);
8184 return 1;
8185 }
8186 return 0;
8187}
8188
8189/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8190
8191char *
8192ia64_canonicalize_symbol_name (name)
8193 char *name;
8194{
20b36a95
JB		 8195 size_t len = strlen (name), full = len;
8196
8197 while (len > 0 && name[len - 1] == '#')
8198 --len;
8199 if (len <= 0)
8200 {
8201 if (full > 0)
8202 as_bad ("Standalone `#' is illegal");
20b36a95
JB		 8203 }
8204 else if (len < full - 1)
8205 as_warn ("Redundant `#' suffix operators");
8206 name[len] = '\0';
800eeca4
JW		 8207 return name;
8208}
8209
3e37788f
JW		 8210/* Return true if idesc is a conditional branch instruction. This excludes
8211 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8212 because they always read/write resources regardless of the value of the
8213 qualifying predicate. br.ia must always use p0, and hence is always
8214 taken. Thus this function returns true for branches which can fall
8215 through, and which use no resources if they do fall through. */
1deb8127 8216
800eeca4
JW		 8217static int
8218is_conditional_branch (idesc)
542d6675 8219 struct ia64_opcode *idesc;
800eeca4 8220{
1deb8127 8221 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 8222 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8223 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 8224 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8225 && (idesc->name[2] == '\0'
3e37788f
JW		 8226 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8227 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8228 || idesc->name[2] == 'l'
8229 /* br.cond, br.call, br.clr */
8230 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8231 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8232 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8233}
8234
8235/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8236 returns zero. */
8237
800eeca4
JW		 8238static int
8239is_taken_branch (idesc)
542d6675 8240 struct ia64_opcode *idesc;
800eeca4
JW		 8241{
8242 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8243 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8244}
8245
8246/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8247 doubt, returns zero. */
8248
800eeca4
JW		 8249static int
8250is_interruption_or_rfi (idesc)
542d6675 8251 struct ia64_opcode *idesc;
800eeca4
JW		 8252{
8253 if (strcmp (idesc->name, "rfi") == 0)
8254 return 1;
8255 return 0;
8256}
8257
8258/* Returns the index of the given dependency in the opcode's list of chks, or
8259 -1 if there is no dependency. */
542d6675 8260
800eeca4
JW		 8261static int
8262depends_on (depind, idesc)
542d6675
KH		 8263 int depind;
8264 struct ia64_opcode *idesc;
800eeca4
JW		 8265{
8266 int i;
8267 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8268 for (i = 0; i < dep->nchks; i++)
800eeca4 8269 {
542d6675
KH		 8270 if (depind == DEP (dep->chks[i]))
8271 return i;
800eeca4
JW		 8272 }
8273 return -1;
8274}
8275
8276/* Determine a set of specific resources used for a particular resource
8277 class. Returns the number of specific resources identified For those
8278 cases which are not determinable statically, the resource returned is
197865e8 8279 marked nonspecific.
800eeca4
JW		 8280
8281 Meanings of value in 'NOTE':
8282 1) only read/write when the register number is explicitly encoded in the
8283 insn.
8284 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8285 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8286 3) general register value is used to specify an indirect register; not
8287 determinable statically.
8288 4) only read the given resource when bits 7:0 of the indirect index
8289 register value does not match the register number of the resource; not
8290 determinable statically.
8291 5) all rules are implementation specific.
8292 6) only when both the index specified by the reader and the index specified
8293 by the writer have the same value in bits 63:61; not determinable
197865e8 8294 statically.
800eeca4 8295 7) only access the specified resource when the corresponding mask bit is
197865e8 8296 set
800eeca4
JW		 8297 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8298 only read when these insns reference FR2-31
8299 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8300 written when these insns write FR32-127
8301 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8302 instruction
8303 11) The target predicates are written independently of PR[qp], but source
8304 registers are only read if PR[qp] is true. Since the state of PR[qp]
8305 cannot statically be determined, all source registers are marked used.
8306 12) This insn only reads the specified predicate register when that
8307 register is the PR[qp].
8308 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 8309 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8310 14) The RSE resource includes the implementation-specific RSE internal
8311 state resources. At least one (and possibly more) of these resources are
8312 read by each instruction listed in IC:rse-readers. At least one (and
8313 possibly more) of these resources are written by each insn listed in
197865e8 8314 IC:rse-writers.
800eeca4 8315 15+16) Represents reserved instructions, which the assembler does not
197865e8 8316 generate.
800eeca4
JW		 8317
8318 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8319 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8320*/
8321
8322#define MAX_SPECS 256
8323#define DV_CHK 1
8324#define DV_REG 0
8325
8326static int
8327specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8328 const struct ia64_dependency *dep;
8329 struct ia64_opcode *idesc;
8330 int type; /* is this a DV chk or a DV reg? */
8331 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8332 int note; /* resource note for this insn's usage */
8333 int path; /* which execution path to examine */
800eeca4
JW		 8334{
8335 int count = 0;
8336 int i;
8337 int rsrc_write = 0;
8338 struct rsrc tmpl;
197865e8 8339
800eeca4
JW		 8340 if (dep->mode == IA64_DV_WAW
8341 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8342 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8343 rsrc_write = 1;
8344
8345 /* template for any resources we identify */
8346 tmpl.dependency = dep;
8347 tmpl.note = note;
8348 tmpl.insn_srlz = tmpl.data_srlz = 0;
8349 tmpl.qp_regno = CURR_SLOT.qp_regno;
8350 tmpl.link_to_qp_branch = 1;
8351 tmpl.mem_offset.hint = 0;
1f8b1395
AS		 8352 tmpl.mem_offset.offset = 0;
8353 tmpl.mem_offset.base = 0;
800eeca4 8354 tmpl.specific = 1;
a66d2bb7 8355 tmpl.index = -1;
7484b8e6 8356 tmpl.cmp_type = CMP_NONE;
1f8b1395
AS		 8357 tmpl.depind = 0;
8358 tmpl.file = NULL;
8359 tmpl.line = 0;
8360 tmpl.path = 0;
800eeca4
JW		 8361
8362#define UNHANDLED \
8363as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8364dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8365#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8366
8367 /* we don't need to track these */
8368 if (dep->semantics == IA64_DVS_NONE)
8369 return 0;
8370
8371 switch (dep->specifier)
8372 {
8373 case IA64_RS_AR_K:
8374 if (note == 1)
542d6675
KH		 8375 {
8376 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8377 {
8378 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8379 if (regno >= 0 && regno <= 7)
8380 {
8381 specs[count] = tmpl;
8382 specs[count++].index = regno;
8383 }
8384 }
8385 }
800eeca4 8386 else if (note == 0)
542d6675
KH		 8387 {
8388 for (i = 0; i < 8; i++)
8389 {
8390 specs[count] = tmpl;
8391 specs[count++].index = i;
8392 }
8393 }
800eeca4 8394 else
542d6675
KH		 8395 {
8396 UNHANDLED;
8397 }
800eeca4
JW		 8398 break;
8399
8400 case IA64_RS_AR_UNAT:
8401 /* This is a mov =AR or mov AR= instruction. */
8402 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8403 {
8404 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8405 if (regno == AR_UNAT)
8406 {
8407 specs[count++] = tmpl;
8408 }
8409 }
8410 else
8411 {
8412 /* This is a spill/fill, or other instruction that modifies the
8413 unat register. */
8414
8415 /* Unless we can determine the specific bits used, mark the whole
8416 thing; bits 8:3 of the memory address indicate the bit used in
8417 UNAT. The .mem.offset hint may be used to eliminate a small
8418 subset of conflicts. */
8419 specs[count] = tmpl;
8420 if (md.mem_offset.hint)
8421 {
542d6675
KH		 8422 if (md.debug_dv)
8423 fprintf (stderr, " Using hint for spill/fill\n");
8424 /* The index isn't actually used, just set it to something
8425 approximating the bit index. */
800eeca4
JW		 8426 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8427 specs[count].mem_offset.hint = 1;
8428 specs[count].mem_offset.offset = md.mem_offset.offset;
8429 specs[count++].mem_offset.base = md.mem_offset.base;
8430 }
8431 else
8432 {
8433 specs[count++].specific = 0;
8434 }
8435 }
8436 break;
8437
8438 case IA64_RS_AR:
8439 if (note == 1)
542d6675
KH		 8440 {
8441 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8442 {
8443 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8444 if ((regno >= 8 && regno <= 15)
8445 || (regno >= 20 && regno <= 23)
8446 || (regno >= 31 && regno <= 39)
8447 || (regno >= 41 && regno <= 47)
8448 || (regno >= 67 && regno <= 111))
8449 {
8450 specs[count] = tmpl;
8451 specs[count++].index = regno;
8452 }
8453 }
8454 }
800eeca4 8455 else
542d6675
KH		 8456 {
8457 UNHANDLED;
8458 }
800eeca4
JW		 8459 break;
8460
8461 case IA64_RS_ARb:
8462 if (note == 1)
542d6675
KH		 8463 {
8464 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8465 {
8466 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8467 if ((regno >= 48 && regno <= 63)
8468 || (regno >= 112 && regno <= 127))
8469 {
8470 specs[count] = tmpl;
8471 specs[count++].index = regno;
8472 }
8473 }
8474 }
800eeca4 8475 else if (note == 0)
542d6675
KH		 8476 {
8477 for (i = 48; i < 64; i++)
8478 {
8479 specs[count] = tmpl;
8480 specs[count++].index = i;
8481 }
8482 for (i = 112; i < 128; i++)
8483 {
8484 specs[count] = tmpl;
8485 specs[count++].index = i;
8486 }
8487 }
197865e8 8488 else
542d6675
KH		 8489 {
8490 UNHANDLED;
8491 }
800eeca4
JW		 8492 break;
8493
8494 case IA64_RS_BR:
8495 if (note != 1)
542d6675
KH		 8496 {
8497 UNHANDLED;
8498 }
800eeca4 8499 else
542d6675
KH		 8500 {
8501 if (rsrc_write)
8502 {
8503 for (i = 0; i < idesc->num_outputs; i++)
8504 if (idesc->operands[i] == IA64_OPND_B1
8505 || idesc->operands[i] == IA64_OPND_B2)
8506 {
8507 specs[count] = tmpl;
8508 specs[count++].index =
8509 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8510 }
8511 }
8512 else
8513 {
40449e9f 8514 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8515 if (idesc->operands[i] == IA64_OPND_B1
8516 || idesc->operands[i] == IA64_OPND_B2)
8517 {
8518 specs[count] = tmpl;
8519 specs[count++].index =
8520 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8521 }
8522 }
8523 }
800eeca4
JW		 8524 break;
8525
8526 case IA64_RS_CPUID: /* four or more registers */
8527 if (note == 3)
542d6675
KH		 8528 {
8529 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8530 {
8531 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8532 if (regno >= 0 && regno < NELEMS (gr_values)
8533 && KNOWN (regno))
8534 {
8535 specs[count] = tmpl;
8536 specs[count++].index = gr_values[regno].value & 0xFF;
8537 }
8538 else
8539 {
8540 specs[count] = tmpl;
8541 specs[count++].specific = 0;
8542 }
8543 }
8544 }
800eeca4 8545 else
542d6675
KH		 8546 {
8547 UNHANDLED;
8548 }
800eeca4
JW		 8549 break;
8550
8551 case IA64_RS_DBR: /* four or more registers */
8552 if (note == 3)
542d6675
KH		 8553 {
8554 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8555 {
8556 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8557 if (regno >= 0 && regno < NELEMS (gr_values)
8558 && KNOWN (regno))
8559 {
8560 specs[count] = tmpl;
8561 specs[count++].index = gr_values[regno].value & 0xFF;
8562 }
8563 else
8564 {
8565 specs[count] = tmpl;
8566 specs[count++].specific = 0;
8567 }
8568 }
8569 }
800eeca4 8570 else if (note == 0 && !rsrc_write)
542d6675
KH		 8571 {
8572 specs[count] = tmpl;
8573 specs[count++].specific = 0;
8574 }
800eeca4 8575 else
542d6675
KH		 8576 {
8577 UNHANDLED;
8578 }
800eeca4
JW		 8579 break;
8580
8581 case IA64_RS_IBR: /* four or more registers */
8582 if (note == 3)
542d6675
KH		 8583 {
8584 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8585 {
8586 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8587 if (regno >= 0 && regno < NELEMS (gr_values)
8588 && KNOWN (regno))
8589 {
8590 specs[count] = tmpl;
8591 specs[count++].index = gr_values[regno].value & 0xFF;
8592 }
8593 else
8594 {
8595 specs[count] = tmpl;
8596 specs[count++].specific = 0;
8597 }
8598 }
8599 }
800eeca4 8600 else
542d6675
KH		 8601 {
8602 UNHANDLED;
8603 }
800eeca4
JW		 8604 break;
8605
8606 case IA64_RS_MSR:
8607 if (note == 5)
8608 {
8609 /* These are implementation specific. Force all references to
8610 conflict with all other references. */
8611 specs[count] = tmpl;
8612 specs[count++].specific = 0;
8613 }
8614 else
8615 {
8616 UNHANDLED;
8617 }
8618 break;
8619
8620 case IA64_RS_PKR: /* 16 or more registers */
8621 if (note == 3 || note == 4)
542d6675
KH		 8622 {
8623 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8624 {
8625 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8626 if (regno >= 0 && regno < NELEMS (gr_values)
8627 && KNOWN (regno))
8628 {
8629 if (note == 3)
8630 {
8631 specs[count] = tmpl;
8632 specs[count++].index = gr_values[regno].value & 0xFF;
8633 }
8634 else
8635 for (i = 0; i < NELEMS (gr_values); i++)
8636 {
8637 /* Uses all registers *except* the one in R3. */
2434f565 8638 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8639 {
8640 specs[count] = tmpl;
8641 specs[count++].index = i;
8642 }
8643 }
8644 }
8645 else
8646 {
8647 specs[count] = tmpl;
8648 specs[count++].specific = 0;
8649 }
8650 }
8651 }
8652 else if (note == 0)
8653 {
8654 /* probe et al. */
8655 specs[count] = tmpl;
8656 specs[count++].specific = 0;
8657 }
8658 break;
8659
8660 case IA64_RS_PMC: /* four or more registers */
8661 if (note == 3)
8662 {
8663 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8664 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8665
8666 {
8667 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8668 ? 1 : !rsrc_write);
8669 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8670 if (regno >= 0 && regno < NELEMS (gr_values)
8671 && KNOWN (regno))
8672 {
8673 specs[count] = tmpl;
8674 specs[count++].index = gr_values[regno].value & 0xFF;
8675 }
8676 else
8677 {
8678 specs[count] = tmpl;
8679 specs[count++].specific = 0;
8680 }
8681 }
8682 }
8683 else
8684 {
8685 UNHANDLED;
8686 }
800eeca4
JW		 8687 break;
8688
8689 case IA64_RS_PMD: /* four or more registers */
8690 if (note == 3)
542d6675
KH		 8691 {
8692 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8693 {
8694 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8695 if (regno >= 0 && regno < NELEMS (gr_values)
8696 && KNOWN (regno))
8697 {
8698 specs[count] = tmpl;
8699 specs[count++].index = gr_values[regno].value & 0xFF;
8700 }
8701 else
8702 {
8703 specs[count] = tmpl;
8704 specs[count++].specific = 0;
8705 }
8706 }
8707 }
800eeca4 8708 else
542d6675
KH		 8709 {
8710 UNHANDLED;
8711 }
800eeca4
JW		 8712 break;
8713
8714 case IA64_RS_RR: /* eight registers */
8715 if (note == 6)
542d6675
KH		 8716 {
8717 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8718 {
8719 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8720 if (regno >= 0 && regno < NELEMS (gr_values)
8721 && KNOWN (regno))
8722 {
8723 specs[count] = tmpl;
8724 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8725 }
8726 else
8727 {
8728 specs[count] = tmpl;
8729 specs[count++].specific = 0;
8730 }
8731 }
8732 }
800eeca4 8733 else if (note == 0 && !rsrc_write)
542d6675
KH		 8734 {
8735 specs[count] = tmpl;
8736 specs[count++].specific = 0;
8737 }
197865e8 8738 else
542d6675
KH		 8739 {
8740 UNHANDLED;
8741 }
800eeca4
JW		 8742 break;
8743
8744 case IA64_RS_CR_IRR:
197865e8 8745 if (note == 0)
542d6675
KH		 8746 {
8747 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8748 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8749 if (rsrc_write
8750 && idesc->operands[1] == IA64_OPND_CR3
8751 && regno == CR_IVR)
8752 {
8753 for (i = 0; i < 4; i++)
8754 {
8755 specs[count] = tmpl;
8756 specs[count++].index = CR_IRR0 + i;
8757 }
8758 }
8759 }
800eeca4 8760 else if (note == 1)
542d6675
KH		 8761 {
8762 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8763 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8764 && regno >= CR_IRR0
8765 && regno <= CR_IRR3)
8766 {
8767 specs[count] = tmpl;
8768 specs[count++].index = regno;
8769 }
8770 }
800eeca4 8771 else
542d6675
KH		 8772 {
8773 UNHANDLED;
8774 }
800eeca4
JW		 8775 break;
8776
8777 case IA64_RS_CR_LRR:
8778 if (note != 1)
542d6675
KH		 8779 {
8780 UNHANDLED;
8781 }
197865e8 8782 else
542d6675
KH		 8783 {
8784 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8785 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8786 && (regno == CR_LRR0 || regno == CR_LRR1))
8787 {
8788 specs[count] = tmpl;
8789 specs[count++].index = regno;
8790 }
8791 }
800eeca4
JW		 8792 break;
8793
8794 case IA64_RS_CR:
8795 if (note == 1)
542d6675
KH		 8796 {
8797 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8798 {
8799 specs[count] = tmpl;
8800 specs[count++].index =
8801 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8802 }
8803 }
800eeca4 8804 else
542d6675
KH		 8805 {
8806 UNHANDLED;
8807 }
800eeca4
JW		 8808 break;
8809
8810 case IA64_RS_FR:
8811 case IA64_RS_FRb:
8812 if (note != 1)
542d6675
KH		 8813 {
8814 UNHANDLED;
8815 }
800eeca4 8816 else if (rsrc_write)
542d6675
KH		 8817 {
8818 if (dep->specifier == IA64_RS_FRb
8819 && idesc->operands[0] == IA64_OPND_F1)
8820 {
8821 specs[count] = tmpl;
8822 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8823 }
8824 }
800eeca4 8825 else
542d6675
KH		 8826 {
8827 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8828 {
8829 if (idesc->operands[i] == IA64_OPND_F2
8830 || idesc->operands[i] == IA64_OPND_F3
8831 || idesc->operands[i] == IA64_OPND_F4)
8832 {
8833 specs[count] = tmpl;
8834 specs[count++].index =
8835 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8836 }
8837 }
8838 }
800eeca4
JW		 8839 break;
8840
8841 case IA64_RS_GR:
8842 if (note == 13)
542d6675
KH		 8843 {
8844 /* This reference applies only to the GR whose value is loaded with
8845 data returned from memory. */
8846 specs[count] = tmpl;
8847 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8848 }
800eeca4 8849 else if (note == 1)
542d6675
KH		 8850 {
8851 if (rsrc_write)
8852 {
8853 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8854 if (idesc->operands[i] == IA64_OPND_R1
8855 || idesc->operands[i] == IA64_OPND_R2
8856 || idesc->operands[i] == IA64_OPND_R3)
8857 {
8858 specs[count] = tmpl;
197865e8 8859 specs[count++].index =
50b81f19
JW		 8860 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8861 }
8862 if (idesc->flags & IA64_OPCODE_POSTINC)
8863 for (i = 0; i < NELEMS (idesc->operands); i++)
8864 if (idesc->operands[i] == IA64_OPND_MR3)
8865 {
8866 specs[count] = tmpl;
8867 specs[count++].index =
8868 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8869 }
542d6675
KH		 8870 }
8871 else
8872 {
8873 /* Look for anything that reads a GR. */
8874 for (i = 0; i < NELEMS (idesc->operands); i++)
8875 {
8876 if (idesc->operands[i] == IA64_OPND_MR3
8877 || idesc->operands[i] == IA64_OPND_CPUID_R3
8878 || idesc->operands[i] == IA64_OPND_DBR_R3
8879 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8880 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8881 || idesc->operands[i] == IA64_OPND_PKR_R3
8882 || idesc->operands[i] == IA64_OPND_PMC_R3
8883 || idesc->operands[i] == IA64_OPND_PMD_R3
8884 || idesc->operands[i] == IA64_OPND_RR_R3
8885 || ((i >= idesc->num_outputs)
8886 && (idesc->operands[i] == IA64_OPND_R1
8887 || idesc->operands[i] == IA64_OPND_R2
8888 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8889 /* addl source register. */
8890 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8891 {
8892 specs[count] = tmpl;
8893 specs[count++].index =
8894 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8895 }
8896 }
8897 }
8898 }
197865e8 8899 else
542d6675
KH		 8900 {
8901 UNHANDLED;
8902 }
800eeca4
JW		 8903 break;
8904
139368c9
JW		 8905 /* This is the same as IA64_RS_PRr, except that the register range is
8906 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8907 case IA64_RS_PR:
8908 if (note == 0)
542d6675 8909 {
139368c9 8910 for (i = 1; i < 16; i++)
542d6675 8911 {
139368c9
JW		 8912 specs[count] = tmpl;
8913 specs[count++].index = i;
8914 }
8915 }
8916 else if (note == 7)
8917 {
8918 valueT mask = 0;
8919 /* Mark only those registers indicated by the mask. */
8920 if (rsrc_write)
8921 {
8922 mask = CURR_SLOT.opnd[2].X_add_number;
8923 for (i = 1; i < 16; i++)
8924 if (mask & ((valueT) 1 << i))
8925 {
8926 specs[count] = tmpl;
8927 specs[count++].index = i;
8928 }
8929 }
8930 else
8931 {
8932 UNHANDLED;
8933 }
8934 }
8935 else if (note == 11) /* note 11 implies note 1 as well */
8936 {
8937 if (rsrc_write)
8938 {
8939 for (i = 0; i < idesc->num_outputs; i++)
8940 {
8941 if (idesc->operands[i] == IA64_OPND_P1
8942 || idesc->operands[i] == IA64_OPND_P2)
8943 {
8944 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8945 if (regno >= 1 && regno < 16)
8946 {
8947 specs[count] = tmpl;
8948 specs[count++].index = regno;
8949 }
8950 }
8951 }
8952 }
8953 else
8954 {
8955 UNHANDLED;
8956 }
8957 }
8958 else if (note == 12)
8959 {
8960 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8961 {
8962 specs[count] = tmpl;
8963 specs[count++].index = CURR_SLOT.qp_regno;
8964 }
8965 }
8966 else if (note == 1)
8967 {
8968 if (rsrc_write)
8969 {
8970 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8971 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8972 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8973 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8974
8975 if ((idesc->operands[0] == IA64_OPND_P1
8976 || idesc->operands[0] == IA64_OPND_P2)
8977 && p1 >= 1 && p1 < 16)
542d6675
KH		 8978 {
8979 specs[count] = tmpl;
139368c9
JW		 8980 specs[count].cmp_type =
8981 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8982 specs[count++].index = p1;
8983 }
8984 if ((idesc->operands[1] == IA64_OPND_P1
8985 || idesc->operands[1] == IA64_OPND_P2)
8986 && p2 >= 1 && p2 < 16)
8987 {
8988 specs[count] = tmpl;
8989 specs[count].cmp_type =
8990 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8991 specs[count++].index = p2;
542d6675
KH		 8992 }
8993 }
8994 else
8995 {
139368c9 8996 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8997 {
8998 specs[count] = tmpl;
139368c9
JW		 8999 specs[count++].index = CURR_SLOT.qp_regno;
9000 }
9001 if (idesc->operands[1] == IA64_OPND_PR)
9002 {
9003 for (i = 1; i < 16; i++)
9004 {
9005 specs[count] = tmpl;
9006 specs[count++].index = i;
9007 }
542d6675
KH		 9008 }
9009 }
9010 }
139368c9
JW		 9011 else
9012 {
9013 UNHANDLED;
9014 }
9015 break;
9016
9017 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9018 simplified cases of this. */
9019 case IA64_RS_PRr:
9020 if (note == 0)
9021 {
9022 for (i = 16; i < 63; i++)
9023 {
9024 specs[count] = tmpl;
9025 specs[count++].index = i;
9026 }
9027 }
800eeca4 9028 else if (note == 7)
542d6675
KH		 9029 {
9030 valueT mask = 0;
9031 /* Mark only those registers indicated by the mask. */
9032 if (rsrc_write
9033 && idesc->operands[0] == IA64_OPND_PR)
9034 {
9035 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 9036 if (mask & ((valueT) 1 << 16))
139368c9
JW		 9037 for (i = 16; i < 63; i++)
9038 {
9039 specs[count] = tmpl;
9040 specs[count++].index = i;
9041 }
542d6675
KH		 9042 }
9043 else if (rsrc_write
9044 && idesc->operands[0] == IA64_OPND_PR_ROT)
9045 {
9046 for (i = 16; i < 63; i++)
9047 {
9048 specs[count] = tmpl;
9049 specs[count++].index = i;
9050 }
9051 }
9052 else
9053 {
9054 UNHANDLED;
9055 }
9056 }
800eeca4 9057 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 9058 {
9059 if (rsrc_write)
9060 {
9061 for (i = 0; i < idesc->num_outputs; i++)
9062 {
9063 if (idesc->operands[i] == IA64_OPND_P1
9064 || idesc->operands[i] == IA64_OPND_P2)
9065 {
9066 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 9067 if (regno >= 16 && regno < 63)
542d6675
KH		 9068 {
9069 specs[count] = tmpl;
9070 specs[count++].index = regno;
9071 }
9072 }
9073 }
9074 }
9075 else
9076 {
9077 UNHANDLED;
9078 }
9079 }
800eeca4 9080 else if (note == 12)
542d6675 9081 {
139368c9 9082 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9083 {
9084 specs[count] = tmpl;
9085 specs[count++].index = CURR_SLOT.qp_regno;
9086 }
9087 }
800eeca4 9088 else if (note == 1)
542d6675
KH		 9089 {
9090 if (rsrc_write)
9091 {
9092 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9093 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9094 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9095 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9096
542d6675
KH		 9097 if ((idesc->operands[0] == IA64_OPND_P1
9098 || idesc->operands[0] == IA64_OPND_P2)
139368c9 9099 && p1 >= 16 && p1 < 63)
542d6675
KH		 9100 {
9101 specs[count] = tmpl;
4a4f25cf 9102 specs[count].cmp_type =
7484b8e6 9103 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 9104 specs[count++].index = p1;
9105 }
9106 if ((idesc->operands[1] == IA64_OPND_P1
9107 || idesc->operands[1] == IA64_OPND_P2)
139368c9 9108 && p2 >= 16 && p2 < 63)
542d6675
KH		 9109 {
9110 specs[count] = tmpl;
4a4f25cf 9111 specs[count].cmp_type =
7484b8e6 9112 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 9113 specs[count++].index = p2;
9114 }
9115 }
9116 else
9117 {
139368c9 9118 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9119 {
9120 specs[count] = tmpl;
9121 specs[count++].index = CURR_SLOT.qp_regno;
9122 }
9123 if (idesc->operands[1] == IA64_OPND_PR)
9124 {
139368c9 9125 for (i = 16; i < 63; i++)
542d6675
KH		 9126 {
9127 specs[count] = tmpl;
9128 specs[count++].index = i;
9129 }
9130 }
9131 }
9132 }
197865e8 9133 else
542d6675
KH		 9134 {
9135 UNHANDLED;
9136 }
800eeca4
JW		 9137 break;
9138
9139 case IA64_RS_PSR:
197865e8 9140 /* Verify that the instruction is using the PSR bit indicated in
542d6675 9141 dep->regindex. */
800eeca4 9142 if (note == 0)
542d6675
KH		 9143 {
9144 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9145 {
9146 if (dep->regindex < 6)
9147 {
9148 specs[count++] = tmpl;
9149 }
9150 }
9151 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9152 {
9153 if (dep->regindex < 32
9154 || dep->regindex == 35
9155 || dep->regindex == 36
9156 || (!rsrc_write && dep->regindex == PSR_CPL))
9157 {
9158 specs[count++] = tmpl;
9159 }
9160 }
9161 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9162 {
9163 if (dep->regindex < 32
9164 || dep->regindex == 35
9165 || dep->regindex == 36
9166 || (rsrc_write && dep->regindex == PSR_CPL))
9167 {
9168 specs[count++] = tmpl;
9169 }
9170 }
9171 else
9172 {
9173 /* Several PSR bits have very specific dependencies. */
9174 switch (dep->regindex)
9175 {
9176 default:
9177 specs[count++] = tmpl;
9178 break;
9179 case PSR_IC:
9180 if (rsrc_write)
9181 {
9182 specs[count++] = tmpl;
9183 }
9184 else
9185 {
9186 /* Only certain CR accesses use PSR.ic */
9187 if (idesc->operands[0] == IA64_OPND_CR3
9188 || idesc->operands[1] == IA64_OPND_CR3)
9189 {
9190 int index =
9191 ((idesc->operands[0] == IA64_OPND_CR3)
9192 ? 0 : 1);
9193 int regno =
9194 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9195
9196 switch (regno)
9197 {
9198 default:
9199 break;
9200 case CR_ITIR:
9201 case CR_IFS:
9202 case CR_IIM:
9203 case CR_IIP:
9204 case CR_IPSR:
9205 case CR_ISR:
9206 case CR_IFA:
9207 case CR_IHA:
9208 case CR_IIPA:
9209 specs[count++] = tmpl;
9210 break;
9211 }
9212 }
9213 }
9214 break;
9215 case PSR_CPL:
9216 if (rsrc_write)
9217 {
9218 specs[count++] = tmpl;
9219 }
9220 else
9221 {
9222 /* Only some AR accesses use cpl */
9223 if (idesc->operands[0] == IA64_OPND_AR3
9224 || idesc->operands[1] == IA64_OPND_AR3)
9225 {
9226 int index =
9227 ((idesc->operands[0] == IA64_OPND_AR3)
9228 ? 0 : 1);
9229 int regno =
9230 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9231
9232 if (regno == AR_ITC
9233 || (index == 0
9234 && (regno == AR_ITC
9235 || regno == AR_RSC
9236 || (regno >= AR_K0
9237 && regno <= AR_K7))))
9238 {
9239 specs[count++] = tmpl;
9240 }
9241 }
9242 else
9243 {
9244 specs[count++] = tmpl;
9245 }
9246 break;
9247 }
9248 }
9249 }
9250 }
800eeca4 9251 else if (note == 7)
542d6675
KH		 9252 {
9253 valueT mask = 0;
9254 if (idesc->operands[0] == IA64_OPND_IMMU24)
9255 {
9256 mask = CURR_SLOT.opnd[0].X_add_number;
9257 }
9258 else
9259 {
9260 UNHANDLED;
9261 }
9262 if (mask & ((valueT) 1 << dep->regindex))
9263 {
9264 specs[count++] = tmpl;
9265 }
9266 }
800eeca4 9267 else if (note == 8)
542d6675
KH		 9268 {
9269 int min = dep->regindex == PSR_DFL ? 2 : 32;
9270 int max = dep->regindex == PSR_DFL ? 31 : 127;
9271 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9272 for (i = 0; i < NELEMS (idesc->operands); i++)
9273 {
9274 if (idesc->operands[i] == IA64_OPND_F1
9275 || idesc->operands[i] == IA64_OPND_F2
9276 || idesc->operands[i] == IA64_OPND_F3
9277 || idesc->operands[i] == IA64_OPND_F4)
9278 {
9279 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9280 if (reg >= min && reg <= max)
9281 {
9282 specs[count++] = tmpl;
9283 }
9284 }
9285 }
9286 }
800eeca4 9287 else if (note == 9)
542d6675
KH		 9288 {
9289 int min = dep->regindex == PSR_MFL ? 2 : 32;
9290 int max = dep->regindex == PSR_MFL ? 31 : 127;
9291 /* mfh is read on writes to FR32-127; mfl is read on writes to
9292 FR2-31 */
9293 for (i = 0; i < idesc->num_outputs; i++)
9294 {
9295 if (idesc->operands[i] == IA64_OPND_F1)
9296 {
9297 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9298 if (reg >= min && reg <= max)
9299 {
9300 specs[count++] = tmpl;
9301 }
9302 }
9303 }
9304 }
800eeca4 9305 else if (note == 10)
542d6675
KH		 9306 {
9307 for (i = 0; i < NELEMS (idesc->operands); i++)
9308 {
9309 if (idesc->operands[i] == IA64_OPND_R1
9310 || idesc->operands[i] == IA64_OPND_R2
9311 || idesc->operands[i] == IA64_OPND_R3)
9312 {
9313 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9314 if (regno >= 16 && regno <= 31)
9315 {
9316 specs[count++] = tmpl;
9317 }
9318 }
9319 }
9320 }
800eeca4 9321 else
542d6675
KH		 9322 {
9323 UNHANDLED;
9324 }
800eeca4
JW		 9325 break;
9326
9327 case IA64_RS_AR_FPSR:
9328 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9329 {
9330 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9331 if (regno == AR_FPSR)
9332 {
9333 specs[count++] = tmpl;
9334 }
9335 }
800eeca4 9336 else
542d6675
KH		 9337 {
9338 specs[count++] = tmpl;
9339 }
800eeca4
JW		 9340 break;
9341
197865e8 9342 case IA64_RS_ARX:
800eeca4
JW		 9343 /* Handle all AR[REG] resources */
9344 if (note == 0 || note == 1)
542d6675
KH		 9345 {
9346 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9347 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9348 && regno == dep->regindex)
9349 {
9350 specs[count++] = tmpl;
9351 }
9352 /* other AR[REG] resources may be affected by AR accesses */
9353 else if (idesc->operands[0] == IA64_OPND_AR3)
9354 {
9355 /* AR[] writes */
9356 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9357 switch (dep->regindex)
9358 {
9359 default:
9360 break;
9361 case AR_BSP:
9362 case AR_RNAT:
9363 if (regno == AR_BSPSTORE)
9364 {
9365 specs[count++] = tmpl;
9366 }
9367 case AR_RSC:
9368 if (!rsrc_write &&
9369 (regno == AR_BSPSTORE
9370 || regno == AR_RNAT))
9371 {
9372 specs[count++] = tmpl;
9373 }
9374 break;
9375 }
9376 }
9377 else if (idesc->operands[1] == IA64_OPND_AR3)
9378 {
9379 /* AR[] reads */
9380 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9381 switch (dep->regindex)
9382 {
9383 default:
9384 break;
9385 case AR_RSC:
9386 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9387 {
9388 specs[count++] = tmpl;
9389 }
9390 break;
9391 }
9392 }
9393 else
9394 {
9395 specs[count++] = tmpl;
9396 }
9397 }
800eeca4 9398 else
542d6675
KH		 9399 {
9400 UNHANDLED;
9401 }
800eeca4
JW		 9402 break;
9403
9404 case IA64_RS_CRX:
9405 /* Handle all CR[REG] resources */
9406 if (note == 0 || note == 1)
542d6675
KH		 9407 {
9408 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9409 {
9410 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9411 if (regno == dep->regindex)
9412 {
9413 specs[count++] = tmpl;
9414 }
9415 else if (!rsrc_write)
9416 {
9417 /* Reads from CR[IVR] affect other resources. */
9418 if (regno == CR_IVR)
9419 {
9420 if ((dep->regindex >= CR_IRR0
9421 && dep->regindex <= CR_IRR3)
9422 || dep->regindex == CR_TPR)
9423 {
9424 specs[count++] = tmpl;
9425 }
9426 }
9427 }
9428 }
9429 else
9430 {
9431 specs[count++] = tmpl;
9432 }
9433 }
800eeca4 9434 else
542d6675
KH		 9435 {
9436 UNHANDLED;
9437 }
800eeca4
JW		 9438 break;
9439
9440 case IA64_RS_INSERVICE:
9441 /* look for write of EOI (67) or read of IVR (65) */
9442 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9443 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9444 || (idesc->operands[1] == IA64_OPND_CR3
9445 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9446 {
9447 specs[count++] = tmpl;
9448 }
800eeca4
JW		 9449 break;
9450
9451 case IA64_RS_GR0:
9452 if (note == 1)
542d6675
KH		 9453 {
9454 specs[count++] = tmpl;
9455 }
800eeca4 9456 else
542d6675
KH		 9457 {
9458 UNHANDLED;
9459 }
800eeca4
JW		 9460 break;
9461
9462 case IA64_RS_CFM:
9463 if (note != 2)
542d6675
KH		 9464 {
9465 specs[count++] = tmpl;
9466 }
800eeca4 9467 else
542d6675
KH		 9468 {
9469 /* Check if any of the registers accessed are in the rotating region.
9470 mov to/from pr accesses CFM only when qp_regno is in the rotating
9471 region */
9472 for (i = 0; i < NELEMS (idesc->operands); i++)
9473 {
9474 if (idesc->operands[i] == IA64_OPND_R1
9475 || idesc->operands[i] == IA64_OPND_R2
9476 || idesc->operands[i] == IA64_OPND_R3)
9477 {
9478 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9479 /* Assumes that md.rot.num_regs is always valid */
9480 if (md.rot.num_regs > 0
9481 && num > 31
9482 && num < 31 + md.rot.num_regs)
9483 {
9484 specs[count] = tmpl;
9485 specs[count++].specific = 0;
9486 }
9487 }
9488 else if (idesc->operands[i] == IA64_OPND_F1
9489 || idesc->operands[i] == IA64_OPND_F2
9490 || idesc->operands[i] == IA64_OPND_F3
9491 || idesc->operands[i] == IA64_OPND_F4)
9492 {
9493 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9494 if (num > 31)
9495 {
9496 specs[count] = tmpl;
9497 specs[count++].specific = 0;
9498 }
9499 }
9500 else if (idesc->operands[i] == IA64_OPND_P1
9501 || idesc->operands[i] == IA64_OPND_P2)
9502 {
9503 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9504 if (num > 15)
9505 {
9506 specs[count] = tmpl;
9507 specs[count++].specific = 0;
9508 }
9509 }
9510 }
9511 if (CURR_SLOT.qp_regno > 15)
9512 {
9513 specs[count] = tmpl;
9514 specs[count++].specific = 0;
9515 }
9516 }
800eeca4
JW		 9517 break;
9518
139368c9
JW		 9519 /* This is the same as IA64_RS_PRr, except simplified to account for
9520 the fact that there is only one register. */
800eeca4
JW		 9521 case IA64_RS_PR63:
9522 if (note == 0)
542d6675
KH		 9523 {
9524 specs[count++] = tmpl;
9525 }
139368c9 9526 else if (note == 7)
40449e9f
KH		 9527 {
9528 valueT mask = 0;
9529 if (idesc->operands[2] == IA64_OPND_IMM17)
9530 mask = CURR_SLOT.opnd[2].X_add_number;
9531 if (mask & ((valueT) 1 << 63))
139368c9 9532 specs[count++] = tmpl;
40449e9f 9533 }
800eeca4 9534 else if (note == 11)
542d6675
KH		 9535 {
9536 if ((idesc->operands[0] == IA64_OPND_P1
9537 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9538 || (idesc->operands[1] == IA64_OPND_P2
9539 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9540 {
9541 specs[count++] = tmpl;
9542 }
9543 }
800eeca4 9544 else if (note == 12)
542d6675
KH		 9545 {
9546 if (CURR_SLOT.qp_regno == 63)
9547 {
9548 specs[count++] = tmpl;
9549 }
9550 }
800eeca4 9551 else if (note == 1)
542d6675
KH		 9552 {
9553 if (rsrc_write)
9554 {
40449e9f
KH		 9555 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9556 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9557 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9558 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9559
4a4f25cf 9560 if (p1 == 63
7484b8e6
TW		 9561 && (idesc->operands[0] == IA64_OPND_P1
9562 || idesc->operands[0] == IA64_OPND_P2))
9563 {
40449e9f 9564 specs[count] = tmpl;
4a4f25cf 9565 specs[count++].cmp_type =
7484b8e6
TW		 9566 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9567 }
9568 if (p2 == 63
9569 && (idesc->operands[1] == IA64_OPND_P1
9570 || idesc->operands[1] == IA64_OPND_P2))
9571 {
40449e9f 9572 specs[count] = tmpl;
4a4f25cf 9573 specs[count++].cmp_type =
7484b8e6
TW		 9574 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9575 }
542d6675
KH		 9576 }
9577 else
9578 {
9579 if (CURR_SLOT.qp_regno == 63)
9580 {
9581 specs[count++] = tmpl;
9582 }
9583 }
9584 }
800eeca4 9585 else
542d6675
KH		 9586 {
9587 UNHANDLED;
9588 }
800eeca4
JW		 9589 break;
9590
9591 case IA64_RS_RSE:
9592 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9593 read resources have not yet been completely identified, so for now
9594 treat RSE as a single resource */
800eeca4 9595 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9596 {
9597 if (rsrc_write)
9598 {
9599 if (idesc->operands[0] == IA64_OPND_AR3
9600 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9601 {
a66d2bb7 9602 specs[count++] = tmpl;
542d6675
KH		 9603 }
9604 }
9605 else
9606 {
9607 if (idesc->operands[0] == IA64_OPND_AR3)
9608 {
9609 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9610 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9611 {
9612 specs[count++] = tmpl;
9613 }
9614 }
9615 else if (idesc->operands[1] == IA64_OPND_AR3)
9616 {
9617 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9618 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9619 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9620 {
9621 specs[count++] = tmpl;
9622 }
9623 }
9624 }
9625 }
197865e8 9626 else
542d6675
KH		 9627 {
9628 specs[count++] = tmpl;
9629 }
800eeca4
JW		 9630 break;
9631
9632 case IA64_RS_ANY:
9633 /* FIXME -- do any of these need to be non-specific? */
9634 specs[count++] = tmpl;
9635 break;
9636
9637 default:
9638 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9639 break;
9640 }
9641
9642 return count;
9643}
9644
9645/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9646 QP of the marking instruction and a subsequent branch on the same QP. */
9647
800eeca4
JW		 9648static void
9649clear_qp_branch_flag (mask)
542d6675 9650 valueT mask;
800eeca4
JW		 9651{
9652 int i;
542d6675 9653 for (i = 0; i < regdepslen; i++)
800eeca4 9654 {
197865e8 9655 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9656 if ((bit & mask) != 0)
542d6675
KH		 9657 {
9658 regdeps[i].link_to_qp_branch = 0;
9659 }
800eeca4
JW		 9660 }
9661}
9662
5e2f6673
L		 9663/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9664 any mutexes which contain one of the PRs and create new ones when
9665 needed. */
9666
9667static int
9668update_qp_mutex (valueT mask)
9669{
9670 int i;
9671 int add = 0;
9672
9673 i = 0;
9674 while (i < qp_mutexeslen)
9675 {
9676 if ((qp_mutexes[i].prmask & mask) != 0)
9677 {
9678 /* If it destroys and creates the same mutex, do nothing. */
9679 if (qp_mutexes[i].prmask == mask
9680 && qp_mutexes[i].path == md.path)
9681 {
9682 i++;
9683 add = -1;
9684 }
9685 else
9686 {
9687 int keep = 0;
9688
9689 if (md.debug_dv)
9690 {
9691 fprintf (stderr, " Clearing mutex relation");
9692 print_prmask (qp_mutexes[i].prmask);
9693 fprintf (stderr, "\n");
9694 }
9695
9696 /* Deal with the old mutex with more than 3+ PRs only if
9697 the new mutex on the same execution path with it.
9698
9699 FIXME: The 3+ mutex support is incomplete.
9700 dot_pred_rel () may be a better place to fix it. */
9701 if (qp_mutexes[i].path == md.path)
9702 {
9703 /* If it is a proper subset of the mutex, create a
9704 new mutex. */
9705 if (add == 0
9706 && (qp_mutexes[i].prmask & mask) == mask)
9707 add = 1;
9708
9709 qp_mutexes[i].prmask &= ~mask;
9710 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9711 {
9712 /* Modify the mutex if there are more than one
9713 PR left. */
9714 keep = 1;
9715 i++;
9716 }
9717 }
9718
9719 if (keep == 0)
9720 /* Remove the mutex. */
9721 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9722 }
9723 }
9724 else
9725 ++i;
9726 }
9727
9728 if (add == 1)
9729 add_qp_mutex (mask);
9730
9731 return add;
9732}
9733
197865e8 9734/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9735
542d6675
KH		 9736 Any changes to a PR clears the mutex relations which include that PR. */
9737
800eeca4
JW		 9738static void
9739clear_qp_mutex (mask)
542d6675 9740 valueT mask;
800eeca4
JW		 9741{
9742 int i;
9743
9744 i = 0;
9745 while (i < qp_mutexeslen)
9746 {
9747 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9748 {
9749 if (md.debug_dv)
9750 {
9751 fprintf (stderr, " Clearing mutex relation");
9752 print_prmask (qp_mutexes[i].prmask);
9753 fprintf (stderr, "\n");
9754 }
9755 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9756 }
800eeca4 9757 else
542d6675 9758 ++i;
800eeca4
JW		 9759 }
9760}
9761
9762/* Clear implies relations which contain PRs in the given masks.
9763 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9764 indicates the implied PR. */
9765
800eeca4
JW		 9766static void
9767clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9768 valueT p1_mask;
9769 valueT p2_mask;
800eeca4
JW		 9770{
9771 int i;
9772
9773 i = 0;
9774 while (i < qp_implieslen)
9775 {
197865e8 9776 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9777 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9778 {
9779 if (md.debug_dv)
9780 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9781 qp_implies[i].p1, qp_implies[i].p2);
9782 qp_implies[i] = qp_implies[--qp_implieslen];
9783 }
197865e8 9784 else
542d6675 9785 ++i;
800eeca4
JW		 9786 }
9787}
9788
542d6675
KH		 9789/* Add the PRs specified to the list of implied relations. */
9790
800eeca4
JW		 9791static void
9792add_qp_imply (p1, p2)
542d6675 9793 int p1, p2;
800eeca4
JW		 9794{
9795 valueT mask;
9796 valueT bit;
9797 int i;
9798
542d6675 9799 /* p0 is not meaningful here. */
800eeca4
JW		 9800 if (p1 == 0 || p2 == 0)
9801 abort ();
9802
9803 if (p1 == p2)
9804 return;
9805
542d6675
KH		 9806 /* If it exists already, ignore it. */
9807 for (i = 0; i < qp_implieslen; i++)
800eeca4 9808 {
197865e8 9809 if (qp_implies[i].p1 == p1
542d6675
KH		 9810 && qp_implies[i].p2 == p2
9811 && qp_implies[i].path == md.path
9812 && !qp_implies[i].p2_branched)
9813 return;
800eeca4
JW		 9814 }
9815
9816 if (qp_implieslen == qp_impliestotlen)
9817 {
9818 qp_impliestotlen += 20;
9819 qp_implies = (struct qp_imply *)
542d6675
KH		 9820 xrealloc ((void *) qp_implies,
9821 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9822 }
9823 if (md.debug_dv)
9824 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9825 qp_implies[qp_implieslen].p1 = p1;
9826 qp_implies[qp_implieslen].p2 = p2;
9827 qp_implies[qp_implieslen].path = md.path;
9828 qp_implies[qp_implieslen++].p2_branched = 0;
9829
9830 /* Add in the implied transitive relations; for everything that p2 implies,
9831 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9832 as well. */
542d6675 9833 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9834 {
9835 if (qp_implies[i].p1 == p2)
542d6675 9836 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9837 if (qp_implies[i].p2 == p1)
542d6675 9838 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9839 }
9840 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9841 relation containing p2, duplicate it and replace p2 with p1. */
9842 bit = (valueT) 1 << p1;
9843 mask = (valueT) 1 << p2;
542d6675 9844 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9845 {
9846 if (qp_mutexes[i].prmask & mask)
542d6675 9847 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9848 }
9849}
9850
800eeca4
JW		 9851/* Add the PRs specified in the mask to the mutex list; this means that only
9852 one of the PRs can be true at any time. PR0 should never be included in
9853 the mask. */
542d6675 9854
800eeca4
JW		 9855static void
9856add_qp_mutex (mask)
542d6675 9857 valueT mask;
800eeca4
JW		 9858{
9859 if (mask & 0x1)
9860 abort ();
9861
9862 if (qp_mutexeslen == qp_mutexestotlen)
9863 {
9864 qp_mutexestotlen += 20;
9865 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9866 xrealloc ((void *) qp_mutexes,
9867 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9868 }
9869 if (md.debug_dv)
9870 {
9871 fprintf (stderr, " Registering mutex on");
9872 print_prmask (mask);
9873 fprintf (stderr, "\n");
9874 }
9875 qp_mutexes[qp_mutexeslen].path = md.path;
9876 qp_mutexes[qp_mutexeslen++].prmask = mask;
9877}
9878
cb5301b6
RH		 9879static int
9880has_suffix_p (name, suffix)
40449e9f
KH		 9881 const char *name;
9882 const char *suffix;
cb5301b6
RH		 9883{
9884 size_t namelen = strlen (name);
9885 size_t sufflen = strlen (suffix);
9886
9887 if (namelen <= sufflen)
9888 return 0;
9889 return strcmp (name + namelen - sufflen, suffix) == 0;
9890}
9891
800eeca4
JW		 9892static void
9893clear_register_values ()
9894{
9895 int i;
9896 if (md.debug_dv)
9897 fprintf (stderr, " Clearing register values\n");
542d6675 9898 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9899 gr_values[i].known = 0;
9900}
9901
9902/* Keep track of register values/changes which affect DV tracking.
9903
9904 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9905 have to examine a group of strings to identify them. */
800eeca4 9906
800eeca4
JW		 9907static void
9908note_register_values (idesc)
542d6675 9909 struct ia64_opcode *idesc;
800eeca4
JW		 9910{
9911 valueT qp_changemask = 0;
9912 int i;
9913
542d6675
KH		 9914 /* Invalidate values for registers being written to. */
9915 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9916 {
197865e8 9917 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9918 || idesc->operands[i] == IA64_OPND_R2
9919 || idesc->operands[i] == IA64_OPND_R3)
9920 {
9921 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9922 if (regno > 0 && regno < NELEMS (gr_values))
9923 gr_values[regno].known = 0;
9924 }
50b81f19
JW		 9925 else if (idesc->operands[i] == IA64_OPND_R3_2)
9926 {
9927 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9928 if (regno > 0 && regno < 4)
9929 gr_values[regno].known = 0;
9930 }
197865e8 9931 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9932 || idesc->operands[i] == IA64_OPND_P2)
9933 {
9934 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9935 qp_changemask |= (valueT) 1 << regno;
9936 }
800eeca4 9937 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9938 {
9939 if (idesc->operands[2] & (valueT) 0x10000)
9940 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9941 else
9942 qp_changemask = idesc->operands[2];
9943 break;
9944 }
800eeca4 9945 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9946 {
9947 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9948 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9949 else
9950 qp_changemask = idesc->operands[1];
9951 qp_changemask &= ~(valueT) 0xFFFF;
9952 break;
9953 }
9954 }
9955
9956 /* Always clear qp branch flags on any PR change. */
9957 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9958 clear_qp_branch_flag (qp_changemask);
9959
542d6675 9960 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9961 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9962 {
197865e8 9963 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9964 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9965 {
9966 for (i = 32; i < 32 + md.rot.num_regs; i++)
9967 gr_values[i].known = 0;
9968 }
800eeca4
JW		 9969 clear_qp_mutex (qp_changemask);
9970 clear_qp_implies (qp_changemask, qp_changemask);
9971 }
542d6675
KH		 9972 /* After a call, all register values are undefined, except those marked
9973 as "safe". */
800eeca4 9974 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9975 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9976 {
56d27c17 9977 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9978 clear_register_values ();
9979 clear_qp_mutex (~qp_safe_across_calls);
9980 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9981 clear_qp_branch_flag (~qp_safe_across_calls);
9982 }
e9718fe1 9983 else if (is_interruption_or_rfi (idesc)
542d6675 9984 || is_taken_branch (idesc))
e9718fe1
TW		 9985 {
9986 clear_register_values ();
197865e8
KH		 9987 clear_qp_mutex (~(valueT) 0);
9988 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9989 }
542d6675 9990 /* Look for mutex and implies relations. */
197865e8 9991 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9992 || idesc->operands[0] == IA64_OPND_P2)
9993 && (idesc->operands[1] == IA64_OPND_P1
9994 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9995 {
9996 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9997 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9998 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9999 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 10000
5e2f6673
L		 10001 /* If both PRs are PR0, we can't really do anything. */
10002 if (p1 == 0 && p2 == 0)
542d6675
KH		 10003 {
10004 if (md.debug_dv)
10005 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
10006 }
800eeca4 10007 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 10008 with the following exceptions. */
cb5301b6
RH		 10009 else if (has_suffix_p (idesc->name, ".or.andcm")
10010 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 10011 {
542d6675
KH		 10012 clear_qp_implies (p2mask, p1mask);
10013 }
cb5301b6
RH		 10014 else if (has_suffix_p (idesc->name, ".andcm")
10015 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 10016 {
10017 clear_qp_implies (0, p1mask | p2mask);
10018 }
cb5301b6
RH		 10019 else if (has_suffix_p (idesc->name, ".orcm")
10020 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 10021 {
10022 clear_qp_mutex (p1mask | p2mask);
10023 clear_qp_implies (p1mask | p2mask, 0);
10024 }
800eeca4 10025 else
542d6675 10026 {
5e2f6673
L		 10027 int added = 0;
10028
542d6675 10029 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 10030
10031 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10032 if (p1 == 0 || p2 == 0)
10033 clear_qp_mutex (p1mask | p2mask);
10034 else
10035 added = update_qp_mutex (p1mask | p2mask);
10036
10037 if (CURR_SLOT.qp_regno == 0
10038 || has_suffix_p (idesc->name, ".unc"))
542d6675 10039 {
5e2f6673
L		 10040 if (added == 0 && p1 && p2)
10041 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 10042 if (CURR_SLOT.qp_regno != 0)
10043 {
5e2f6673
L		 10044 if (p1)
10045 add_qp_imply (p1, CURR_SLOT.qp_regno);
10046 if (p2)
10047 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 10048 }
10049 }
542d6675
KH		 10050 }
10051 }
10052 /* Look for mov imm insns into GRs. */
800eeca4 10053 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 10054 && (idesc->operands[1] == IA64_OPND_IMM22
10055 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 10056 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 10057 && (strcmp (idesc->name, "mov") == 0
10058 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 10059 {
10060 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 10061 if (regno > 0 && regno < NELEMS (gr_values))
10062 {
10063 gr_values[regno].known = 1;
10064 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
10065 gr_values[regno].path = md.path;
10066 if (md.debug_dv)
2434f565
JW		 10067 {
10068 fprintf (stderr, " Know gr%d = ", regno);
10069 fprintf_vma (stderr, gr_values[regno].value);
10070 fputs ("\n", stderr);
10071 }
542d6675 10072 }
800eeca4 10073 }
a66d2bb7
JB		 10074 /* Look for dep.z imm insns. */
10075 else if (idesc->operands[0] == IA64_OPND_R1
10076 && idesc->operands[1] == IA64_OPND_IMM8
10077 && strcmp (idesc->name, "dep.z") == 0)
10078 {
10079 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
10080 if (regno > 0 && regno < NELEMS (gr_values))
10081 {
10082 valueT value = CURR_SLOT.opnd[1].X_add_number;
10083
10084 if (CURR_SLOT.opnd[3].X_add_number < 64)
10085 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
10086 value <<= CURR_SLOT.opnd[2].X_add_number;
10087 gr_values[regno].known = 1;
10088 gr_values[regno].value = value;
10089 gr_values[regno].path = md.path;
10090 if (md.debug_dv)
10091 {
10092 fprintf (stderr, " Know gr%d = ", regno);
10093 fprintf_vma (stderr, gr_values[regno].value);
10094 fputs ("\n", stderr);
10095 }
10096 }
10097 }
197865e8 10098 else
800eeca4
JW		 10099 {
10100 clear_qp_mutex (qp_changemask);
10101 clear_qp_implies (qp_changemask, qp_changemask);
10102 }
10103}
10104
542d6675
KH		 10105/* Return whether the given predicate registers are currently mutex. */
10106
800eeca4
JW		 10107static int
10108qp_mutex (p1, p2, path)
542d6675
KH		 10109 int p1;
10110 int p2;
10111 int path;
800eeca4
JW		 10112{
10113 int i;
10114 valueT mask;
10115
10116 if (p1 != p2)
10117 {
542d6675
KH		 10118 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
10119 for (i = 0; i < qp_mutexeslen; i++)
10120 {
10121 if (qp_mutexes[i].path >= path
10122 && (qp_mutexes[i].prmask & mask) == mask)
10123 return 1;
10124 }
800eeca4
JW		 10125 }
10126 return 0;
10127}
10128
10129/* Return whether the given resource is in the given insn's list of chks
10130 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 10131 conflict. */
10132
800eeca4
JW		 10133static int
10134resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 10135 struct rsrc *rs;
10136 struct ia64_opcode *idesc;
10137 int note;
10138 int qp_regno;
10139 int path;
800eeca4
JW		 10140{
10141 struct rsrc specs[MAX_SPECS];
10142 int count;
10143
10144 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10145 we don't need to check. One exception is note 11, which indicates that
10146 target predicates are written regardless of PR[qp]. */
197865e8 10147 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 10148 && note != 11)
10149 return 0;
10150
10151 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
10152 while (count-- > 0)
10153 {
10154 /* UNAT checking is a bit more specific than other resources */
10155 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 10156 && specs[count].mem_offset.hint
10157 && rs->mem_offset.hint)
10158 {
10159 if (rs->mem_offset.base == specs[count].mem_offset.base)
10160 {
10161 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
10162 ((specs[count].mem_offset.offset >> 3) & 0x3F))
10163 return 1;
10164 else
10165 continue;
10166 }
10167 }
800eeca4 10168
7484b8e6 10169 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 10170 writes are an OR. */
7484b8e6 10171 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 10172 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 10173 || rs->dependency->specifier == IA64_RS_PR63)
10174 {
10175 if (specs[count].cmp_type != CMP_NONE
10176 && specs[count].cmp_type == rs->cmp_type)
10177 {
10178 if (md.debug_dv)
10179 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10180 dv_mode[rs->dependency->mode],
afa680f8 10181 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 10182 specs[count].index : 63);
10183 continue;
10184 }
10185 if (md.debug_dv)
4a4f25cf 10186 fprintf (stderr,
7484b8e6
TW		 10187 " %s on parallel compare conflict %s vs %s on PR%d\n",
10188 dv_mode[rs->dependency->mode],
4a4f25cf 10189 dv_cmp_type[rs->cmp_type],
7484b8e6 10190 dv_cmp_type[specs[count].cmp_type],
afa680f8 10191 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 10192 specs[count].index : 63);
4a4f25cf 10193
7484b8e6
TW		 10194 }
10195
800eeca4 10196 /* If either resource is not specific, conservatively assume a conflict
197865e8 10197 */
800eeca4 10198 if (!specs[count].specific || !rs->specific)
542d6675 10199 return 2;
800eeca4 10200 else if (specs[count].index == rs->index)
542d6675 10201 return 1;
800eeca4 10202 }
800eeca4
JW		 10203
10204 return 0;
10205}
10206
10207/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10208 insert a stop to create the break. Update all resource dependencies
10209 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10210 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10211 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 10212 instruction. */
800eeca4
JW		 10213
10214static void
10215insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 10216 int insert_stop;
10217 int qp_regno;
10218 int save_current;
800eeca4
JW		 10219{
10220 int i;
10221
10222 if (insert_stop && md.num_slots_in_use > 0)
10223 PREV_SLOT.end_of_insn_group = 1;
10224
10225 if (md.debug_dv)
10226 {
197865e8 10227 fprintf (stderr, " Insn group break%s",
542d6675 10228 (insert_stop ? " (w/stop)" : ""));
800eeca4 10229 if (qp_regno != 0)
542d6675 10230 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 10231 fprintf (stderr, "\n");
10232 }
10233
10234 i = 0;
10235 while (i < regdepslen)
10236 {
10237 const struct ia64_dependency *dep = regdeps[i].dependency;
10238
10239 if (qp_regno != 0
542d6675
KH		 10240 && regdeps[i].qp_regno != qp_regno)
10241 {
10242 ++i;
10243 continue;
10244 }
800eeca4
JW		 10245
10246 if (save_current
542d6675
KH		 10247 && CURR_SLOT.src_file == regdeps[i].file
10248 && CURR_SLOT.src_line == regdeps[i].line)
10249 {
10250 ++i;
10251 continue;
10252 }
800eeca4
JW		 10253
10254 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10255 those that have reached the appropriate state of insn serialization */
800eeca4 10256 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10257 || dep->semantics == IA64_DVS_IMPLIEDF
10258 || regdeps[i].insn_srlz == STATE_SRLZ)
10259 {
10260 print_dependency ("Removing", i);
10261 regdeps[i] = regdeps[--regdepslen];
10262 }
800eeca4 10263 else
542d6675
KH		 10264 {
10265 if (dep->semantics == IA64_DVS_DATA
10266 || dep->semantics == IA64_DVS_INSTR
800eeca4 10267 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10268 {
10269 if (regdeps[i].insn_srlz == STATE_NONE)
10270 regdeps[i].insn_srlz = STATE_STOP;
10271 if (regdeps[i].data_srlz == STATE_NONE)
10272 regdeps[i].data_srlz = STATE_STOP;
10273 }
10274 ++i;
10275 }
800eeca4
JW		 10276 }
10277}
10278
542d6675
KH		 10279/* Add the given resource usage spec to the list of active dependencies. */
10280
197865e8 10281static void
800eeca4 10282mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10283 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10284 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10285 struct rsrc *spec;
10286 int depind;
10287 int path;
800eeca4
JW		 10288{
10289 if (regdepslen == regdepstotlen)
10290 {
10291 regdepstotlen += 20;
10292 regdeps = (struct rsrc *)
542d6675 10293 xrealloc ((void *) regdeps,
bc805888 10294 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10295 }
10296
10297 regdeps[regdepslen] = *spec;
10298 regdeps[regdepslen].depind = depind;
10299 regdeps[regdepslen].path = path;
10300 regdeps[regdepslen].file = CURR_SLOT.src_file;
10301 regdeps[regdepslen].line = CURR_SLOT.src_line;
10302
10303 print_dependency ("Adding", regdepslen);
10304
10305 ++regdepslen;
10306}
10307
10308static void
10309print_dependency (action, depind)
542d6675
KH		 10310 const char *action;
10311 int depind;
800eeca4
JW		 10312{
10313 if (md.debug_dv)
10314 {
197865e8 10315 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10316 action, dv_mode[(regdeps[depind].dependency)->mode],
10317 (regdeps[depind].dependency)->name);
a66d2bb7 10318 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10319 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10320 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10321 {
10322 fputs (" ", stderr);
10323 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10324 fputs ("+", stderr);
10325 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10326 }
800eeca4
JW		 10327 fprintf (stderr, "\n");
10328 }
10329}
10330
10331static void
10332instruction_serialization ()
10333{
10334 int i;
10335 if (md.debug_dv)
10336 fprintf (stderr, " Instruction serialization\n");
542d6675 10337 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10338 if (regdeps[i].insn_srlz == STATE_STOP)
10339 regdeps[i].insn_srlz = STATE_SRLZ;
10340}
10341
10342static void
10343data_serialization ()
10344{
10345 int i = 0;
10346 if (md.debug_dv)
10347 fprintf (stderr, " Data serialization\n");
10348 while (i < regdepslen)
10349 {
10350 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10351 /* Note: as of 991210, all "other" dependencies are cleared by a
10352 data serialization. This might change with new tables */
10353 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10354 {
10355 print_dependency ("Removing", i);
10356 regdeps[i] = regdeps[--regdepslen];
10357 }
800eeca4 10358 else
542d6675 10359 ++i;
800eeca4
JW		 10360 }
10361}
10362
542d6675
KH		 10363/* Insert stops and serializations as needed to avoid DVs. */
10364
800eeca4
JW		 10365static void
10366remove_marked_resource (rs)
542d6675 10367 struct rsrc *rs;
800eeca4
JW		 10368{
10369 switch (rs->dependency->semantics)
10370 {
10371 case IA64_DVS_SPECIFIC:
10372 if (md.debug_dv)
10373 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10374 /* ...fall through... */
800eeca4
JW		 10375 case IA64_DVS_INSTR:
10376 if (md.debug_dv)
542d6675 10377 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10378 if (rs->insn_srlz < STATE_STOP)
542d6675 10379 insn_group_break (1, 0, 0);
800eeca4 10380 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10381 {
888a75be 10382 struct slot oldslot = CURR_SLOT;
542d6675 10383 /* Manually jam a srlz.i insn into the stream */
888a75be 10384 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10385 CURR_SLOT.user_template = -1;
542d6675
KH		 10386 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10387 instruction_serialization ();
10388 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10389 if (++md.num_slots_in_use >= NUM_SLOTS)
10390 emit_one_bundle ();
888a75be 10391 CURR_SLOT = oldslot;
542d6675 10392 }
800eeca4
JW		 10393 insn_group_break (1, 0, 0);
10394 break;
10395 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10396 "other" types of DV are eliminated
10397 by a data serialization */
800eeca4
JW		 10398 case IA64_DVS_DATA:
10399 if (md.debug_dv)
542d6675 10400 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10401 if (rs->data_srlz < STATE_STOP)
542d6675 10402 insn_group_break (1, 0, 0);
800eeca4 10403 {
888a75be 10404 struct slot oldslot = CURR_SLOT;
542d6675 10405 /* Manually jam a srlz.d insn into the stream */
888a75be 10406 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10407 CURR_SLOT.user_template = -1;
542d6675
KH		 10408 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10409 data_serialization ();
10410 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10411 if (++md.num_slots_in_use >= NUM_SLOTS)
10412 emit_one_bundle ();
888a75be 10413 CURR_SLOT = oldslot;
800eeca4
JW		 10414 }
10415 break;
10416 case IA64_DVS_IMPLIED:
10417 case IA64_DVS_IMPLIEDF:
10418 if (md.debug_dv)
542d6675 10419 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10420 insn_group_break (1, 0, 0);
10421 break;
10422 default:
10423 break;
10424 }
10425}
10426
10427/* Check the resources used by the given opcode against the current dependency
197865e8 10428 list.
800eeca4
JW		 10429
10430 The check is run once for each execution path encountered. In this case,
10431 a unique execution path is the sequence of instructions following a code
10432 entry point, e.g. the following has three execution paths, one starting
10433 at L0, one at L1, and one at L2.
197865e8 10434
800eeca4
JW		 10435 L0: nop
10436 L1: add
10437 L2: add
197865e8 10438 br.ret
800eeca4 10439*/
542d6675 10440
800eeca4
JW		 10441static void
10442check_dependencies (idesc)
542d6675 10443 struct ia64_opcode *idesc;
800eeca4
JW		 10444{
10445 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10446 int path;
10447 int i;
10448
10449 /* Note that the number of marked resources may change within the
197865e8 10450 loop if in auto mode. */
800eeca4
JW		 10451 i = 0;
10452 while (i < regdepslen)
10453 {
10454 struct rsrc *rs = &regdeps[i];
10455 const struct ia64_dependency *dep = rs->dependency;
10456 int chkind;
10457 int note;
10458 int start_over = 0;
10459
10460 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10461 || (chkind = depends_on (rs->depind, idesc)) == -1)
10462 {
10463 ++i;
10464 continue;
10465 }
10466
10467 note = NOTE (opdeps->chks[chkind]);
10468
10469 /* Check this resource against each execution path seen thus far. */
10470 for (path = 0; path <= md.path; path++)
10471 {
10472 int matchtype;
10473
10474 /* If the dependency wasn't on the path being checked, ignore it. */
10475 if (rs->path < path)
10476 continue;
10477
10478 /* If the QP for this insn implies a QP which has branched, don't
10479 bother checking. Ed. NOTE: I don't think this check is terribly
10480 useful; what's the point of generating code which will only be
10481 reached if its QP is zero?
10482 This code was specifically inserted to handle the following code,
10483 based on notes from Intel's DV checking code, where p1 implies p2.
10484
10485 mov r4 = 2
10486 (p2) br.cond L
10487 (p1) mov r4 = 7
10488 */
10489 if (CURR_SLOT.qp_regno != 0)
10490 {
10491 int skip = 0;
10492 int implies;
10493 for (implies = 0; implies < qp_implieslen; implies++)
10494 {
10495 if (qp_implies[implies].path >= path
10496 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10497 && qp_implies[implies].p2_branched)
10498 {
10499 skip = 1;
10500 break;
10501 }
10502 }
10503 if (skip)
10504 continue;
10505 }
10506
10507 if ((matchtype = resources_match (rs, idesc, note,
10508 CURR_SLOT.qp_regno, path)) != 0)
10509 {
10510 char msg[1024];
10511 char pathmsg[256] = "";
10512 char indexmsg[256] = "";
10513 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10514
10515 if (path != 0)
10516 sprintf (pathmsg, " when entry is at label '%s'",
10517 md.entry_labels[path - 1]);
a66d2bb7 10518 if (matchtype == 1 && rs->index >= 0)
542d6675
KH		 10519 sprintf (indexmsg, ", specific resource number is %d",
10520 rs->index);
10521 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10522 idesc->name,
10523 (certain ? "violates" : "may violate"),
10524 dv_mode[dep->mode], dep->name,
10525 dv_sem[dep->semantics],
10526 pathmsg, indexmsg);
10527
10528 if (md.explicit_mode)
10529 {
10530 as_warn ("%s", msg);
10531 if (path < md.path)
10532 as_warn (_("Only the first path encountering the conflict "
10533 "is reported"));
10534 as_warn_where (rs->file, rs->line,
10535 _("This is the location of the "
10536 "conflicting usage"));
10537 /* Don't bother checking other paths, to avoid duplicating
10538 the same warning */
10539 break;
10540 }
10541 else
10542 {
10543 if (md.debug_dv)
10544 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10545
10546 remove_marked_resource (rs);
10547
10548 /* since the set of dependencies has changed, start over */
10549 /* FIXME -- since we're removing dvs as we go, we
10550 probably don't really need to start over... */
10551 start_over = 1;
10552 break;
10553 }
10554 }
10555 }
800eeca4 10556 if (start_over)
542d6675 10557 i = 0;
800eeca4 10558 else
542d6675 10559 ++i;
800eeca4
JW		 10560 }
10561}
10562
542d6675
KH		 10563/* Register new dependencies based on the given opcode. */
10564
800eeca4
JW		 10565static void
10566mark_resources (idesc)
542d6675 10567 struct ia64_opcode *idesc;
800eeca4
JW		 10568{
10569 int i;
10570 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10571 int add_only_qp_reads = 0;
10572
10573 /* A conditional branch only uses its resources if it is taken; if it is
10574 taken, we stop following that path. The other branch types effectively
10575 *always* write their resources. If it's not taken, register only QP
197865e8 10576 reads. */
800eeca4
JW		 10577 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10578 {
10579 add_only_qp_reads = 1;
10580 }
10581
10582 if (md.debug_dv)
10583 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10584
542d6675 10585 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10586 {
10587 const struct ia64_dependency *dep;
10588 struct rsrc specs[MAX_SPECS];
10589 int note;
10590 int path;
10591 int count;
197865e8 10592
800eeca4 10593 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10594 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10595
10596 if (add_only_qp_reads
542d6675
KH		 10597 && !(dep->mode == IA64_DV_WAR
10598 && (dep->specifier == IA64_RS_PR
139368c9 10599 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10600 || dep->specifier == IA64_RS_PR63)))
10601 continue;
800eeca4
JW		 10602
10603 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10604
800eeca4 10605 while (count-- > 0)
542d6675
KH		 10606 {
10607 mark_resource (idesc, dep, &specs[count],
10608 DEP (opdeps->regs[i]), md.path);
10609 }
800eeca4
JW		 10610
10611 /* The execution path may affect register values, which may in turn
542d6675 10612 affect which indirect-access resources are accessed. */
800eeca4 10613 switch (dep->specifier)
542d6675
KH		 10614 {
10615 default:
10616 break;
10617 case IA64_RS_CPUID:
10618 case IA64_RS_DBR:
10619 case IA64_RS_IBR:
800eeca4 10620 case IA64_RS_MSR:
542d6675
KH		 10621 case IA64_RS_PKR:
10622 case IA64_RS_PMC:
10623 case IA64_RS_PMD:
10624 case IA64_RS_RR:
10625 for (path = 0; path < md.path; path++)
10626 {
10627 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10628 while (count-- > 0)
10629 mark_resource (idesc, dep, &specs[count],
10630 DEP (opdeps->regs[i]), path);
10631 }
10632 break;
10633 }
10634 }
10635}
10636
10637/* Remove dependencies when they no longer apply. */
10638
800eeca4
JW		 10639static void
10640update_dependencies (idesc)
542d6675 10641 struct ia64_opcode *idesc;
800eeca4
JW		 10642{
10643 int i;
10644
10645 if (strcmp (idesc->name, "srlz.i") == 0)
10646 {
10647 instruction_serialization ();
10648 }
10649 else if (strcmp (idesc->name, "srlz.d") == 0)
10650 {
10651 data_serialization ();
10652 }
10653 else if (is_interruption_or_rfi (idesc)
542d6675 10654 || is_taken_branch (idesc))
800eeca4 10655 {
542d6675
KH		 10656 /* Although technically the taken branch doesn't clear dependencies
10657 which require a srlz.[id], we don't follow the branch; the next
10658 instruction is assumed to start with a clean slate. */
800eeca4 10659 regdepslen = 0;
800eeca4
JW		 10660 md.path = 0;
10661 }
10662 else if (is_conditional_branch (idesc)
542d6675 10663 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10664 {
10665 int is_call = strstr (idesc->name, ".call") != NULL;
10666
542d6675
KH		 10667 for (i = 0; i < qp_implieslen; i++)
10668 {
10669 /* If the conditional branch's predicate is implied by the predicate
10670 in an existing dependency, remove that dependency. */
10671 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10672 {
10673 int depind = 0;
10674 /* Note that this implied predicate takes a branch so that if
10675 a later insn generates a DV but its predicate implies this
10676 one, we can avoid the false DV warning. */
10677 qp_implies[i].p2_branched = 1;
10678 while (depind < regdepslen)
10679 {
10680 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10681 {
10682 print_dependency ("Removing", depind);
10683 regdeps[depind] = regdeps[--regdepslen];
10684 }
10685 else
10686 ++depind;
10687 }
10688 }
10689 }
800eeca4 10690 /* Any marked resources which have this same predicate should be
542d6675
KH		 10691 cleared, provided that the QP hasn't been modified between the
10692 marking instruction and the branch. */
800eeca4 10693 if (is_call)
542d6675
KH		 10694 {
10695 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10696 }
800eeca4 10697 else
542d6675
KH		 10698 {
10699 i = 0;
10700 while (i < regdepslen)
10701 {
10702 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10703 && regdeps[i].link_to_qp_branch
10704 && (regdeps[i].file != CURR_SLOT.src_file
10705 || regdeps[i].line != CURR_SLOT.src_line))
10706 {
10707 /* Treat like a taken branch */
10708 print_dependency ("Removing", i);
10709 regdeps[i] = regdeps[--regdepslen];
10710 }
10711 else
10712 ++i;
10713 }
10714 }
800eeca4
JW		 10715 }
10716}
10717
10718/* Examine the current instruction for dependency violations. */
542d6675 10719
800eeca4
JW		 10720static int
10721check_dv (idesc)
542d6675 10722 struct ia64_opcode *idesc;
800eeca4
JW		 10723{
10724 if (md.debug_dv)
10725 {
197865e8 10726 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10727 idesc->name, CURR_SLOT.src_line,
10728 idesc->dependencies->nchks,
10729 idesc->dependencies->nregs);
800eeca4
JW		 10730 }
10731
197865e8 10732 /* Look through the list of currently marked resources; if the current
800eeca4 10733 instruction has the dependency in its chks list which uses that resource,
542d6675 10734 check against the specific resources used. */
800eeca4
JW		 10735 check_dependencies (idesc);
10736
542d6675
KH		 10737 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10738 then add them to the list of marked resources. */
800eeca4
JW		 10739 mark_resources (idesc);
10740
10741 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10742 requirements for being cleared
10743
800eeca4
JW		 10744 Instruction serialization (insns separated by interruption, rfi, or
10745 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10746
10747 Data serialization (instruction serialization, or writer + srlz.d +
10748 reader, where writer and srlz.d are in separate groups) clears
10749 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10750 always be the case).
10751
10752 Instruction group break (groups separated by stop, taken branch,
10753 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10754 */
10755 update_dependencies (idesc);
10756
10757 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10758 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10759 note_register_values (idesc);
10760
197865e8 10761 /* We don't need or want this anymore. */
800eeca4
JW		 10762 md.mem_offset.hint = 0;
10763
10764 return 0;
10765}
10766
10767/* Translate one line of assembly. Pseudo ops and labels do not show
10768 here. */
10769void
10770md_assemble (str)
10771 char *str;
10772{
10773 char *saved_input_line_pointer, *mnemonic;
10774 const struct pseudo_opcode *pdesc;
10775 struct ia64_opcode *idesc;
10776 unsigned char qp_regno;
10777 unsigned int flags;
10778 int ch;
10779
10780 saved_input_line_pointer = input_line_pointer;
10781 input_line_pointer = str;
10782
542d6675 10783 /* extract the opcode (mnemonic): */
800eeca4
JW		 10784
10785 mnemonic = input_line_pointer;
10786 ch = get_symbol_end ();
10787 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10788 if (pdesc)
10789 {
10790 *input_line_pointer = ch;
10791 (*pdesc->handler) (pdesc->arg);
10792 goto done;
10793 }
10794
542d6675 10795 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10796
10797 idesc = ia64_find_opcode (mnemonic);
10798 *input_line_pointer = ch;
10799 if (!idesc)
10800 {
10801 as_bad ("Unknown opcode `%s'", mnemonic);
10802 goto done;
10803 }
10804
10805 idesc = parse_operands (idesc);
10806 if (!idesc)
10807 goto done;
10808
542d6675 10809 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10810 if (idesc->type == IA64_TYPE_DYN)
10811 {
10812 if (strcmp (idesc->name, "add") == 0)
10813 {
10814 if (CURR_SLOT.opnd[2].X_op == O_register
10815 && CURR_SLOT.opnd[2].X_add_number < 4)
10816 mnemonic = "addl";
10817 else
10818 mnemonic = "adds";
3d56ab85 10819 ia64_free_opcode (idesc);
800eeca4 10820 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10821 }
10822 else if (strcmp (idesc->name, "mov") == 0)
10823 {
10824 enum ia64_opnd opnd1, opnd2;
10825 int rop;
10826
10827 opnd1 = idesc->operands[0];
10828 opnd2 = idesc->operands[1];
10829 if (opnd1 == IA64_OPND_AR3)
10830 rop = 0;
10831 else if (opnd2 == IA64_OPND_AR3)
10832 rop = 1;
10833 else
10834 abort ();
652ca075
L		 10835 if (CURR_SLOT.opnd[rop].X_op == O_register)
10836 {
10837 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10838 mnemonic = "mov.i";
97762d08 10839 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10840 mnemonic = "mov.m";
97762d08
JB		 10841 else
10842 rop = -1;
652ca075 10843 }
800eeca4 10844 else
652ca075 10845 abort ();
97762d08
JB		 10846 if (rop >= 0)
10847 {
10848 ia64_free_opcode (idesc);
10849 idesc = ia64_find_opcode (mnemonic);
10850 while (idesc != NULL
10851 && (idesc->operands[0] != opnd1
10852 || idesc->operands[1] != opnd2))
10853 idesc = get_next_opcode (idesc);
10854 }
800eeca4
JW		 10855 }
10856 }
652ca075
L		 10857 else if (strcmp (idesc->name, "mov.i") == 0
10858 || strcmp (idesc->name, "mov.m") == 0)
10859 {
10860 enum ia64_opnd opnd1, opnd2;
10861 int rop;
10862
10863 opnd1 = idesc->operands[0];
10864 opnd2 = idesc->operands[1];
10865 if (opnd1 == IA64_OPND_AR3)
10866 rop = 0;
10867 else if (opnd2 == IA64_OPND_AR3)
10868 rop = 1;
10869 else
10870 abort ();
10871 if (CURR_SLOT.opnd[rop].X_op == O_register)
10872 {
10873 char unit = 'a';
10874 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10875 unit = 'i';
10876 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10877 unit = 'm';
10878 if (unit != 'a' && unit != idesc->name [4])
80b8152b 10879 as_bad ("AR %d can only be accessed by %c-unit",
652ca075
L		 10880 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10881 TOUPPER (unit));
10882 }
10883 }
91d777ee
L		 10884 else if (strcmp (idesc->name, "hint.b") == 0)
10885 {
10886 switch (md.hint_b)
10887 {
10888 case hint_b_ok:
10889 break;
10890 case hint_b_warning:
10891 as_warn ("hint.b may be treated as nop");
10892 break;
10893 case hint_b_error:
10894 as_bad ("hint.b shouldn't be used");
10895 break;
10896 }
10897 }
800eeca4
JW		 10898
10899 qp_regno = 0;
10900 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10901 {
10902 qp_regno = md.qp.X_add_number - REG_P;
10903 md.qp.X_op = O_absent;
10904 }
800eeca4
JW		 10905
10906 flags = idesc->flags;
10907
10908 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10909 {
10910 /* The alignment frag has to end with a stop bit only if the
10911 next instruction after the alignment directive has to be
10912 the first instruction in an instruction group. */
10913 if (align_frag)
10914 {
10915 while (align_frag->fr_type != rs_align_code)
10916 {
10917 align_frag = align_frag->fr_next;
bae25f19
L		 10918 if (!align_frag)
10919 break;
9545c4ce 10920 }
bae25f19
L		 10921 /* align_frag can be NULL if there are directives in
10922 between. */
10923 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10924 align_frag->tc_frag_data = 1;
10925 }
10926
10927 insn_group_break (1, 0, 0);
10928 }
10929 align_frag = NULL;
800eeca4
JW		 10930
10931 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10932 {
10933 as_bad ("`%s' cannot be predicated", idesc->name);
10934 goto done;
10935 }
10936
542d6675 10937 /* Build the instruction. */
800eeca4
JW		 10938 CURR_SLOT.qp_regno = qp_regno;
10939 CURR_SLOT.idesc = idesc;
10940 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10941 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4 10942
ba825241 10943 /* Add unwind entries, if there are any. */
e0c9811a 10944 if (unwind.current_entry)
800eeca4 10945 {
e0c9811a
JW		 10946 CURR_SLOT.unwind_record = unwind.current_entry;
10947 unwind.current_entry = NULL;
800eeca4 10948 }
ba825241
JB		 10949 if (unwind.pending_saves)
10950 {
10951 if (unwind.pending_saves->next)
10952 {
10953 /* Attach the next pending save to the next slot so that its
10954 slot number will get set correctly. */
10955 add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR);
10956 unwind.pending_saves = &unwind.pending_saves->next->r.record.p;
10957 }
10958 else
10959 unwind.pending_saves = NULL;
10960 }
5656b6b8 10961 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym))
75e09913 10962 unwind.insn = 1;
800eeca4 10963
542d6675 10964 /* Check for dependency violations. */
800eeca4 10965 if (md.detect_dv)
542d6675 10966 check_dv (idesc);
800eeca4
JW		 10967
10968 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10969 if (++md.num_slots_in_use >= NUM_SLOTS)
10970 emit_one_bundle ();
10971
10972 if ((flags & IA64_OPCODE_LAST) != 0)
10973 insn_group_break (1, 0, 0);
10974
10975 md.last_text_seg = now_seg;
10976
10977 done:
10978 input_line_pointer = saved_input_line_pointer;
10979}
10980
10981/* Called when symbol NAME cannot be found in the symbol table.
10982 Should be used for dynamic valued symbols only. */
542d6675
KH		 10983
10984symbolS *
800eeca4 10985md_undefined_symbol (name)
2434f565 10986 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10987{
10988 return 0;
10989}
10990
10991/* Called for any expression that can not be recognized. When the
10992 function is called, `input_line_pointer' will point to the start of
10993 the expression. */
542d6675 10994
800eeca4
JW		 10995void
10996md_operand (e)
10997 expressionS *e;
10998{
800eeca4
JW		 10999 switch (*input_line_pointer)
11000 {
800eeca4
JW		 11001 case '[':
11002 ++input_line_pointer;
60d11e55 11003 expression_and_evaluate (e);
800eeca4
JW		 11004 if (*input_line_pointer != ']')
11005 {
16a48f83 11006 as_bad ("Closing bracket missing");
800eeca4
JW		 11007 goto err;
11008 }
11009 else
11010 {
6a2375c6
JB		 11011 if (e->X_op != O_register
11012 || e->X_add_number < REG_GR
11013 || e->X_add_number > REG_GR + 127)
11014 {
11015 as_bad ("Index must be a general register");
11016 e->X_add_number = REG_GR;
11017 }
800eeca4
JW		 11018
11019 ++input_line_pointer;
11020 e->X_op = O_index;
11021 }
11022 break;
11023
11024 default:
11025 break;
11026 }
11027 return;
11028
11029 err:
11030 ignore_rest_of_line ();
11031}
11032
11033/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11034 a section symbol plus some offset. For relocs involving @fptr(),
11035 directives we don't want such adjustments since we need to have the
11036 original symbol's name in the reloc. */
11037int
11038ia64_fix_adjustable (fix)
11039 fixS *fix;
11040{
11041 /* Prevent all adjustments to global symbols */
e97b3f28 11042 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
800eeca4
JW		 11043 return 0;
11044
11045 switch (fix->fx_r_type)
11046 {
11047 case BFD_RELOC_IA64_FPTR64I:
11048 case BFD_RELOC_IA64_FPTR32MSB:
11049 case BFD_RELOC_IA64_FPTR32LSB:
11050 case BFD_RELOC_IA64_FPTR64MSB:
11051 case BFD_RELOC_IA64_FPTR64LSB:
11052 case BFD_RELOC_IA64_LTOFF_FPTR22:
11053 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11054 return 0;
11055 default:
11056 break;
11057 }
11058
11059 return 1;
11060}
11061
11062int
11063ia64_force_relocation (fix)
11064 fixS *fix;
11065{
11066 switch (fix->fx_r_type)
11067 {
11068 case BFD_RELOC_IA64_FPTR64I:
11069 case BFD_RELOC_IA64_FPTR32MSB:
11070 case BFD_RELOC_IA64_FPTR32LSB:
11071 case BFD_RELOC_IA64_FPTR64MSB:
11072 case BFD_RELOC_IA64_FPTR64LSB:
11073
11074 case BFD_RELOC_IA64_LTOFF22:
11075 case BFD_RELOC_IA64_LTOFF64I:
11076 case BFD_RELOC_IA64_LTOFF_FPTR22:
11077 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11078 case BFD_RELOC_IA64_PLTOFF22:
11079 case BFD_RELOC_IA64_PLTOFF64I:
11080 case BFD_RELOC_IA64_PLTOFF64MSB:
11081 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 11082
11083 case BFD_RELOC_IA64_LTOFF22X:
11084 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 11085 return 1;
11086
11087 default:
a161fe53 11088 break;
800eeca4 11089 }
a161fe53 11090
ae6063d4 11091 return generic_force_reloc (fix);
800eeca4
JW		 11092}
11093
11094/* Decide from what point a pc-relative relocation is relative to,
11095 relative to the pc-relative fixup. Er, relatively speaking. */
11096long
11097ia64_pcrel_from_section (fix, sec)
11098 fixS *fix;
11099 segT sec;
11100{
11101 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 11102
800eeca4
JW		 11103 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
11104 off &= ~0xfUL;
11105
11106 return off;
11107}
11108
6174d9c8
RH		 11109
11110/* Used to emit section-relative relocs for the dwarf2 debug data. */
11111void
11112ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
11113{
11114 expressionS expr;
11115
11116 expr.X_op = O_pseudo_fixup;
11117 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
11118 expr.X_add_number = 0;
11119 expr.X_add_symbol = symbol;
11120 emit_expr (&expr, size);
11121}
11122
800eeca4
JW		 11123/* This is called whenever some data item (not an instruction) needs a
11124 fixup. We pick the right reloc code depending on the byteorder
11125 currently in effect. */
11126void
11127ia64_cons_fix_new (f, where, nbytes, exp)
11128 fragS *f;
11129 int where;
11130 int nbytes;
11131 expressionS *exp;
11132{
11133 bfd_reloc_code_real_type code;
11134 fixS *fix;
11135
11136 switch (nbytes)
11137 {
11138 /* There are no reloc for 8 and 16 bit quantities, but we allow
11139 them here since they will work fine as long as the expression
11140 is fully defined at the end of the pass over the source file. */
11141 case 1: code = BFD_RELOC_8; break;
11142 case 2: code = BFD_RELOC_16; break;
11143 case 4:
11144 if (target_big_endian)
11145 code = BFD_RELOC_IA64_DIR32MSB;
11146 else
11147 code = BFD_RELOC_IA64_DIR32LSB;
11148 break;
11149
11150 case 8:
40449e9f 11151 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 11152 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 11153 && exp->X_op_symbol
11154 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
11155 && !(md.flags & EF_IA_64_ABI64))
11156 {
11157 if (target_big_endian)
11158 code = BFD_RELOC_IA64_IPLTMSB;
11159 else
11160 code = BFD_RELOC_IA64_IPLTLSB;
11161 exp->X_op = O_symbol;
11162 break;
11163 }
11164 else
11165 {
11166 if (target_big_endian)
11167 code = BFD_RELOC_IA64_DIR64MSB;
11168 else
11169 code = BFD_RELOC_IA64_DIR64LSB;
11170 break;
11171 }
800eeca4 11172
3969b680
RH		 11173 case 16:
11174 if (exp->X_op == O_pseudo_fixup
11175 && exp->X_op_symbol
11176 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
11177 {
11178 if (target_big_endian)
11179 code = BFD_RELOC_IA64_IPLTMSB;
11180 else
11181 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 11182 exp->X_op = O_symbol;
11183 break;
11184 }
11185 /* FALLTHRU */
11186
800eeca4
JW		 11187 default:
11188 as_bad ("Unsupported fixup size %d", nbytes);
11189 ignore_rest_of_line ();
11190 return;
11191 }
6174d9c8 11192
800eeca4
JW		 11193 if (exp->X_op == O_pseudo_fixup)
11194 {
800eeca4
JW		 11195 exp->X_op = O_symbol;
11196 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 11197 /* ??? If code unchanged, unsupported. */
800eeca4 11198 }
3969b680 11199
800eeca4
JW		 11200 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11201 /* We need to store the byte order in effect in case we're going
11202 to fix an 8 or 16 bit relocation (for which there no real
55cf6793 11203 relocs available). See md_apply_fix(). */
800eeca4
JW		 11204 fix->tc_fix_data.bigendian = target_big_endian;
11205}
11206
11207/* Return the actual relocation we wish to associate with the pseudo
11208 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 11209 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 11210
11211static bfd_reloc_code_real_type
11212ia64_gen_real_reloc_type (sym, r_type)
11213 struct symbol *sym;
11214 bfd_reloc_code_real_type r_type;
11215{
11216 bfd_reloc_code_real_type new = 0;
0ca3e455 11217 const char *type = NULL, *suffix = "";
800eeca4
JW		 11218
11219 if (sym == NULL)
11220 {
11221 return r_type;
11222 }
11223
11224 switch (S_GET_VALUE (sym))
11225 {
11226 case FUNC_FPTR_RELATIVE:
11227 switch (r_type)
11228 {
11229 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11230 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11231 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11232 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11233 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 11234 default: type = "FPTR"; break;
800eeca4
JW		 11235 }
11236 break;
11237
11238 case FUNC_GP_RELATIVE:
11239 switch (r_type)
11240 {
11241 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11242 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11243 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11244 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11245 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11246 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 11247 default: type = "GPREL"; break;
800eeca4
JW		 11248 }
11249 break;
11250
11251 case FUNC_LT_RELATIVE:
11252 switch (r_type)
11253 {
11254 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11255 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11256 default: type = "LTOFF"; break;
800eeca4
JW		 11257 }
11258 break;
11259
fa2c7eff
RH		 11260 case FUNC_LT_RELATIVE_X:
11261 switch (r_type)
11262 {
11263 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11264 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11265 }
11266 break;
11267
c67e42c9
RH		 11268 case FUNC_PC_RELATIVE:
11269 switch (r_type)
11270 {
11271 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11272 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11273 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11274 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11275 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11276 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11277 default: type = "PCREL"; break;
c67e42c9
RH		 11278 }
11279 break;
11280
800eeca4
JW		 11281 case FUNC_PLT_RELATIVE:
11282 switch (r_type)
11283 {
11284 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11285 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11286 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11287 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11288 default: type = "PLTOFF"; break;
800eeca4
JW		 11289 }
11290 break;
11291
11292 case FUNC_SEC_RELATIVE:
11293 switch (r_type)
11294 {
11295 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11296 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11297 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11298 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11299 default: type = "SECREL"; break;
800eeca4
JW		 11300 }
11301 break;
11302
11303 case FUNC_SEG_RELATIVE:
11304 switch (r_type)
11305 {
11306 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11307 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11308 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11309 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11310 default: type = "SEGREL"; break;
800eeca4
JW		 11311 }
11312 break;
11313
11314 case FUNC_LTV_RELATIVE:
11315 switch (r_type)
11316 {
11317 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11318 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11319 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11320 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11321 default: type = "LTV"; break;
800eeca4
JW		 11322 }
11323 break;
11324
11325 case FUNC_LT_FPTR_RELATIVE:
11326 switch (r_type)
11327 {
11328 case BFD_RELOC_IA64_IMM22:
11329 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11330 case BFD_RELOC_IA64_IMM64:
11331 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11332 case BFD_RELOC_IA64_DIR32MSB:
11333 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11334 case BFD_RELOC_IA64_DIR32LSB:
11335 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11336 case BFD_RELOC_IA64_DIR64MSB:
11337 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11338 case BFD_RELOC_IA64_DIR64LSB:
11339 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11340 default:
0ca3e455 11341 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11342 }
11343 break;
3969b680 11344
13ae64f3
JJ		 11345 case FUNC_TP_RELATIVE:
11346 switch (r_type)
11347 {
0ca3e455
JB		 11348 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11349 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11350 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11351 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11352 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11353 default: type = "TPREL"; break;
13ae64f3
JJ		 11354 }
11355 break;
11356
11357 case FUNC_LT_TP_RELATIVE:
11358 switch (r_type)
11359 {
11360 case BFD_RELOC_IA64_IMM22:
11361 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11362 default:
0ca3e455
JB		 11363 type = "LTOFF_TPREL"; break;
11364 }
11365 break;
11366
11367 case FUNC_DTP_MODULE:
11368 switch (r_type)
11369 {
11370 case BFD_RELOC_IA64_DIR64MSB:
11371 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11372 case BFD_RELOC_IA64_DIR64LSB:
11373 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11374 default:
11375 type = "DTPMOD"; break;
13ae64f3
JJ		 11376 }
11377 break;
11378
11379 case FUNC_LT_DTP_MODULE:
11380 switch (r_type)
11381 {
11382 case BFD_RELOC_IA64_IMM22:
11383 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11384 default:
0ca3e455 11385 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11386 }
11387 break;
11388
11389 case FUNC_DTP_RELATIVE:
11390 switch (r_type)
11391 {
0ca3e455
JB		 11392 case BFD_RELOC_IA64_DIR32MSB:
11393 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11394 case BFD_RELOC_IA64_DIR32LSB:
11395 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11396 case BFD_RELOC_IA64_DIR64MSB:
11397 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11398 case BFD_RELOC_IA64_DIR64LSB:
11399 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11400 case BFD_RELOC_IA64_IMM14:
11401 new = BFD_RELOC_IA64_DTPREL14; break;
11402 case BFD_RELOC_IA64_IMM22:
11403 new = BFD_RELOC_IA64_DTPREL22; break;
11404 case BFD_RELOC_IA64_IMM64:
11405 new = BFD_RELOC_IA64_DTPREL64I; break;
11406 default:
0ca3e455 11407 type = "DTPREL"; break;
13ae64f3
JJ		 11408 }
11409 break;
11410
11411 case FUNC_LT_DTP_RELATIVE:
11412 switch (r_type)
11413 {
11414 case BFD_RELOC_IA64_IMM22:
11415 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11416 default:
0ca3e455 11417 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11418 }
11419 break;
11420
40449e9f 11421 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11422 switch (r_type)
11423 {
11424 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11425 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11426 default: type = "IPLT"; break;
11427 }
40449e9f 11428 break;
1cd8ff38 11429
800eeca4
JW		 11430 default:
11431 abort ();
11432 }
6174d9c8 11433
800eeca4
JW		 11434 if (new)
11435 return new;
11436 else
0ca3e455
JB		 11437 {
11438 int width;
11439
11440 if (!type)
11441 abort ();
11442 switch (r_type)
11443 {
11444 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11445 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11446 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11447 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
30ad6cb9 11448 case BFD_RELOC_UNUSED: width = 13; break;
0ca3e455
JB		 11449 case BFD_RELOC_IA64_IMM14: width = 14; break;
11450 case BFD_RELOC_IA64_IMM22: width = 22; break;
11451 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11452 default: abort ();
11453 }
11454
11455 /* This should be an error, but since previously there wasn't any
11456 diagnostic here, dont't make it fail because of this for now. */
11457 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11458 return r_type;
11459 }
800eeca4
JW		 11460}
11461
11462/* Here is where generate the appropriate reloc for pseudo relocation
11463 functions. */
11464void
11465ia64_validate_fix (fix)
11466 fixS *fix;
11467{
11468 switch (fix->fx_r_type)
11469 {
11470 case BFD_RELOC_IA64_FPTR64I:
11471 case BFD_RELOC_IA64_FPTR32MSB:
11472 case BFD_RELOC_IA64_FPTR64LSB:
11473 case BFD_RELOC_IA64_LTOFF_FPTR22:
11474 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11475 if (fix->fx_offset != 0)
11476 as_bad_where (fix->fx_file, fix->fx_line,
11477 "No addend allowed in @fptr() relocation");
11478 break;
11479 default:
11480 break;
11481 }
800eeca4
JW		 11482}
11483
11484static void
11485fix_insn (fix, odesc, value)
11486 fixS *fix;
11487 const struct ia64_operand *odesc;
11488 valueT value;
11489{
11490 bfd_vma insn[3], t0, t1, control_bits;
11491 const char *err;
11492 char *fixpos;
11493 long slot;
11494
11495 slot = fix->fx_where & 0x3;
11496 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11497
c67e42c9 11498 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11499 t0 = bfd_getl64 (fixpos);
11500 t1 = bfd_getl64 (fixpos + 8);
11501 control_bits = t0 & 0x1f;
11502 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11503 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11504 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11505
c67e42c9
RH		 11506 err = NULL;
11507 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11508 {
c67e42c9
RH		 11509 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11510 insn[2] |= (((value & 0x7f) << 13)
11511 | (((value >> 7) & 0x1ff) << 27)
11512 | (((value >> 16) & 0x1f) << 22)
11513 | (((value >> 21) & 0x1) << 21)
11514 | (((value >> 63) & 0x1) << 36));
800eeca4 11515 }
c67e42c9
RH		 11516 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11517 {
11518 if (value & ~0x3fffffffffffffffULL)
11519 err = "integer operand out of range";
11520 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11521 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11522 }
11523 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11524 {
11525 value >>= 4;
11526 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11527 insn[2] |= ((((value >> 59) & 0x1) << 36)
11528 | (((value >> 0) & 0xfffff) << 13));
11529 }
11530 else
11531 err = (*odesc->insert) (odesc, value, insn + slot);
11532
11533 if (err)
11534 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11535
11536 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11537 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11538 number_to_chars_littleendian (fixpos + 0, t0, 8);
11539 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11540}
11541
11542/* Attempt to simplify or even eliminate a fixup. The return value is
11543 ignored; perhaps it was once meaningful, but now it is historical.
11544 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11545
11546 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11547 (if possible). */
94f592af
NC		 11548
11549void
55cf6793 11550md_apply_fix (fix, valP, seg)
800eeca4 11551 fixS *fix;
40449e9f 11552 valueT *valP;
2434f565 11553 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11554{
11555 char *fixpos;
40449e9f 11556 valueT value = *valP;
800eeca4
JW		 11557
11558 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11559
11560 if (fix->fx_pcrel)
11561 {
7b347e43
JB		 11562 switch (fix->fx_r_type)
11563 {
11564 case BFD_RELOC_IA64_PCREL21B: break;
11565 case BFD_RELOC_IA64_PCREL21BI: break;
11566 case BFD_RELOC_IA64_PCREL21F: break;
11567 case BFD_RELOC_IA64_PCREL21M: break;
11568 case BFD_RELOC_IA64_PCREL60B: break;
11569 case BFD_RELOC_IA64_PCREL22: break;
11570 case BFD_RELOC_IA64_PCREL64I: break;
11571 case BFD_RELOC_IA64_PCREL32MSB: break;
11572 case BFD_RELOC_IA64_PCREL32LSB: break;
11573 case BFD_RELOC_IA64_PCREL64MSB: break;
11574 case BFD_RELOC_IA64_PCREL64LSB: break;
11575 default:
11576 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11577 fix->fx_r_type);
11578 break;
11579 }
800eeca4
JW		 11580 }
11581 if (fix->fx_addsy)
11582 {
00f7efb6 11583 switch (fix->fx_r_type)
800eeca4 11584 {
00f7efb6 11585 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11586 /* This must be a TAG13 or TAG13b operand. There are no external
11587 relocs defined for them, so we must give an error. */
800eeca4
JW		 11588 as_bad_where (fix->fx_file, fix->fx_line,
11589 "%s must have a constant value",
11590 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11591 fix->fx_done = 1;
94f592af 11592 return;
00f7efb6
JJ		 11593
11594 case BFD_RELOC_IA64_TPREL14:
11595 case BFD_RELOC_IA64_TPREL22:
11596 case BFD_RELOC_IA64_TPREL64I:
11597 case BFD_RELOC_IA64_LTOFF_TPREL22:
11598 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11599 case BFD_RELOC_IA64_DTPREL14:
11600 case BFD_RELOC_IA64_DTPREL22:
11601 case BFD_RELOC_IA64_DTPREL64I:
11602 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11603 S_SET_THREAD_LOCAL (fix->fx_addsy);
11604 break;
7925dd68
JJ		 11605
11606 default:
11607 break;
800eeca4 11608 }
800eeca4
JW		 11609 }
11610 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11611 {
11612 if (fix->tc_fix_data.bigendian)
11613 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11614 else
11615 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11616 fix->fx_done = 1;
800eeca4
JW		 11617 }
11618 else
11619 {
11620 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11621 fix->fx_done = 1;
800eeca4 11622 }
800eeca4
JW		 11623}
11624
11625/* Generate the BFD reloc to be stuck in the object file from the
11626 fixup used internally in the assembler. */
542d6675
KH		 11627
11628arelent *
800eeca4 11629tc_gen_reloc (sec, fixp)
2434f565 11630 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11631 fixS *fixp;
11632{
11633 arelent *reloc;
11634
11635 reloc = xmalloc (sizeof (*reloc));
11636 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11637 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11638 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11639 reloc->addend = fixp->fx_offset;
11640 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11641
11642 if (!reloc->howto)
11643 {
11644 as_bad_where (fixp->fx_file, fixp->fx_line,
11645 "Cannot represent %s relocation in object file",
11646 bfd_get_reloc_code_name (fixp->fx_r_type));
11647 }
11648 return reloc;
11649}
11650
11651/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11652 of type TYPE, and store the appropriate bytes in *LIT. The number
11653 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11654 returned, or NULL on OK. */
11655
11656#define MAX_LITTLENUMS 5
11657
542d6675 11658char *
800eeca4
JW		 11659md_atof (type, lit, size)
11660 int type;
11661 char *lit;
11662 int *size;
11663{
11664 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11665 char *t;
11666 int prec;
11667
11668 switch (type)
11669 {
11670 /* IEEE floats */
11671 case 'f':
11672 case 'F':
11673 case 's':
11674 case 'S':
11675 prec = 2;
11676 break;
11677
11678 case 'd':
11679 case 'D':
11680 case 'r':
11681 case 'R':
11682 prec = 4;
11683 break;
11684
11685 case 'x':
11686 case 'X':
11687 case 'p':
11688 case 'P':
11689 prec = 5;
11690 break;
11691
11692 default:
11693 *size = 0;
11694 return "Bad call to MD_ATOF()";
11695 }
11696 t = atof_ieee (input_line_pointer, type, words);
11697 if (t)
11698 input_line_pointer = t;
800eeca4 11699
10a98291
L		 11700 (*ia64_float_to_chars) (lit, words, prec);
11701
165a7f90
L		 11702 if (type == 'X')
11703 {
11704 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11705 memset (&lit [10], 0, 6);
165a7f90
L		 11706 *size = 8 * sizeof (LITTLENUM_TYPE);
11707 }
10a98291
L		 11708 else
11709 *size = prec * sizeof (LITTLENUM_TYPE);
11710
800eeca4
JW		 11711 return 0;
11712}
11713
800eeca4
JW		 11714/* Handle ia64 specific semantics of the align directive. */
11715
0a9ef439 11716void
800eeca4 11717ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11718 int n ATTRIBUTE_UNUSED;
11719 const char *fill ATTRIBUTE_UNUSED;
2434f565 11720 int len ATTRIBUTE_UNUSED;
91a2ae2a 11721 int max ATTRIBUTE_UNUSED;
800eeca4 11722{
0a9ef439 11723 if (subseg_text_p (now_seg))
800eeca4 11724 ia64_flush_insns ();
0a9ef439 11725}
800eeca4 11726
0a9ef439
RH		 11727/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11728 of an rs_align_code fragment. */
800eeca4 11729
0a9ef439
RH		 11730void
11731ia64_handle_align (fragp)
11732 fragS *fragp;
11733{
0a9ef439
RH		 11734 int bytes;
11735 char *p;
9545c4ce 11736 const unsigned char *nop;
0a9ef439
RH		 11737
11738 if (fragp->fr_type != rs_align_code)
11739 return;
11740
9545c4ce
L		 11741 /* Check if this frag has to end with a stop bit. */
11742 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11743
0a9ef439
RH		 11744 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11745 p = fragp->fr_literal + fragp->fr_fix;
11746
d9201763
L		 11747 /* If no paddings are needed, we check if we need a stop bit. */
11748 if (!bytes && fragp->tc_frag_data)
11749 {
11750 if (fragp->fr_fix < 16)
bae25f19
L		 11751#if 1
11752 /* FIXME: It won't work with
11753 .align 16
11754 alloc r32=ar.pfs,1,2,4,0
11755 */
11756 ;
11757#else
d9201763
L		 11758 as_bad_where (fragp->fr_file, fragp->fr_line,
11759 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11760#endif
d9201763
L		 11761 else
11762 /* Bundles are always in little-endian byte order. Make sure
11763 the previous bundle has the stop bit. */
11764 *(p - 16) |= 1;
11765 }
11766
0a9ef439
RH		 11767 /* Make sure we are on a 16-byte boundary, in case someone has been
11768 putting data into a text section. */
11769 if (bytes & 15)
11770 {
11771 int fix = bytes & 15;
11772 memset (p, 0, fix);
11773 p += fix;
11774 bytes -= fix;
11775 fragp->fr_fix += fix;
800eeca4
JW		 11776 }
11777
012a452b 11778 /* Instruction bundles are always little-endian. */
9545c4ce 11779 memcpy (p, nop, 16);
0a9ef439 11780 fragp->fr_var = 16;
800eeca4 11781}
10a98291
L		 11782
11783static void
11784ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11785 int prec)
11786{
11787 while (prec--)
11788 {
11789 number_to_chars_bigendian (lit, (long) (*words++),
11790 sizeof (LITTLENUM_TYPE));
11791 lit += sizeof (LITTLENUM_TYPE);
11792 }
11793}
11794
11795static void
11796ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11797 int prec)
11798{
11799 while (prec--)
11800 {
11801 number_to_chars_littleendian (lit, (long) (words[prec]),
11802 sizeof (LITTLENUM_TYPE));
11803 lit += sizeof (LITTLENUM_TYPE);
11804 }
11805}
11806
11807void
11808ia64_elf_section_change_hook (void)
11809{
38ce5b11
L		 11810 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11811 && elf_linked_to_section (now_seg) == NULL)
11812 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11813 dot_byteorder (-1);
11814}
a645d1eb
L		 11815
11816/* Check if a label should be made global. */
11817void
11818ia64_check_label (symbolS *label)
11819{
11820 if (*input_line_pointer == ':')
11821 {
11822 S_SET_EXTERNAL (label);
11823 input_line_pointer++;
11824 }
11825}
35f5df7f
L		 11826
11827/* Used to remember where .alias and .secalias directives are seen. We
11828 will rename symbol and section names when we are about to output
11829 the relocatable file. */
11830struct alias
11831{
11832 char *file; /* The file where the directive is seen. */
11833 unsigned int line; /* The line number the directive is at. */
11834 const char *name; /* The orignale name of the symbol. */
11835};
11836
11837/* Called for .alias and .secalias directives. If SECTION is 1, it is
11838 .secalias. Otherwise, it is .alias. */
11839static void
11840dot_alias (int section)
11841{
11842 char *name, *alias;
11843 char delim;
11844 char *end_name;
11845 int len;
11846 const char *error_string;
11847 struct alias *h;
11848 const char *a;
11849 struct hash_control *ahash, *nhash;
11850 const char *kind;
11851
11852 name = input_line_pointer;
11853 delim = get_symbol_end ();
11854 end_name = input_line_pointer;
11855 *end_name = delim;
11856
11857 if (name == end_name)
11858 {
11859 as_bad (_("expected symbol name"));
e4e8248d 11860 ignore_rest_of_line ();
35f5df7f
L		 11861 return;
11862 }
11863
11864 SKIP_WHITESPACE ();
11865
11866 if (*input_line_pointer != ',')
11867 {
11868 *end_name = 0;
11869 as_bad (_("expected comma after \"%s\""), name);
11870 *end_name = delim;
11871 ignore_rest_of_line ();
11872 return;
11873 }
11874
11875 input_line_pointer++;
11876 *end_name = 0;
20b36a95 11877 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11878
11879 /* We call demand_copy_C_string to check if alias string is valid.
11880 There should be a closing `"' and no `\0' in the string. */
11881 alias = demand_copy_C_string (&len);
11882 if (alias == NULL)
11883 {
11884 ignore_rest_of_line ();
11885 return;
11886 }
11887
11888 /* Make a copy of name string. */
11889 len = strlen (name) + 1;
11890 obstack_grow (&notes, name, len);
11891 name = obstack_finish (&notes);
11892
11893 if (section)
11894 {
11895 kind = "section";
11896 ahash = secalias_hash;
11897 nhash = secalias_name_hash;
11898 }
11899 else
11900 {
11901 kind = "symbol";
11902 ahash = alias_hash;
11903 nhash = alias_name_hash;
11904 }
11905
11906 /* Check if alias has been used before. */
11907 h = (struct alias *) hash_find (ahash, alias);
11908 if (h)
11909 {
11910 if (strcmp (h->name, name))
11911 as_bad (_("`%s' is already the alias of %s `%s'"),
11912 alias, kind, h->name);
11913 goto out;
11914 }
11915
11916 /* Check if name already has an alias. */
11917 a = (const char *) hash_find (nhash, name);
11918 if (a)
11919 {
11920 if (strcmp (a, alias))
11921 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11922 goto out;
11923 }
11924
11925 h = (struct alias *) xmalloc (sizeof (struct alias));
11926 as_where (&h->file, &h->line);
11927 h->name = name;
11928
11929 error_string = hash_jam (ahash, alias, (PTR) h);
11930 if (error_string)
11931 {
11932 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11933 alias, kind, error_string);
11934 goto out;
11935 }
11936
11937 error_string = hash_jam (nhash, name, (PTR) alias);
11938 if (error_string)
11939 {
11940 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11941 alias, kind, error_string);
11942out:
11943 obstack_free (&notes, name);
11944 obstack_free (&notes, alias);
11945 }
11946
11947 demand_empty_rest_of_line ();
11948}
11949
11950/* It renames the original symbol name to its alias. */
11951static void
11952do_alias (const char *alias, PTR value)
11953{
11954 struct alias *h = (struct alias *) value;
11955 symbolS *sym = symbol_find (h->name);
11956
11957 if (sym == NULL)
11958 as_warn_where (h->file, h->line,
11959 _("symbol `%s' aliased to `%s' is not used"),
11960 h->name, alias);
11961 else
11962 S_SET_NAME (sym, (char *) alias);
11963}
11964
11965/* Called from write_object_file. */
11966void
11967ia64_adjust_symtab (void)
11968{
11969 hash_traverse (alias_hash, do_alias);
11970}
11971
11972/* It renames the original section name to its alias. */
11973static void
11974do_secalias (const char *alias, PTR value)
11975{
11976 struct alias *h = (struct alias *) value;
11977 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11978
11979 if (sec == NULL)
11980 as_warn_where (h->file, h->line,
11981 _("section `%s' aliased to `%s' is not used"),
11982 h->name, alias);
11983 else
11984 sec->name = alias;
11985}
11986
11987/* Called from write_object_file. */
11988void
11989ia64_frob_file (void)
11990{
11991 hash_traverse (secalias_hash, do_secalias);
11992}
GDB Binutils - Deliverables
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