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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
744b6414 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4
JW		 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
59#define MIN(a,b) ((a) < (b) ? (a) : (b))
60
61#define NUM_SLOTS 4
62#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
63#define CURR_SLOT md.slot[md.curr_slot]
64
65#define O_pseudo_fixup (O_max + 1)
66
67enum special_section
68 {
557debba 69 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 70 SPECIAL_SECTION_BSS = 0,
71 SPECIAL_SECTION_SBSS,
72 SPECIAL_SECTION_SDATA,
73 SPECIAL_SECTION_RODATA,
74 SPECIAL_SECTION_COMMENT,
75 SPECIAL_SECTION_UNWIND,
557debba
JW		 76 SPECIAL_SECTION_UNWIND_INFO,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY,
79 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 80 };
81
82enum reloc_func
83 {
13ae64f3
JJ		 84 FUNC_DTP_MODULE,
85 FUNC_DTP_RELATIVE,
800eeca4
JW		 86 FUNC_FPTR_RELATIVE,
87 FUNC_GP_RELATIVE,
88 FUNC_LT_RELATIVE,
fa2c7eff 89 FUNC_LT_RELATIVE_X,
c67e42c9 90 FUNC_PC_RELATIVE,
800eeca4
JW		 91 FUNC_PLT_RELATIVE,
92 FUNC_SEC_RELATIVE,
93 FUNC_SEG_RELATIVE,
13ae64f3 94 FUNC_TP_RELATIVE,
800eeca4
JW		 95 FUNC_LTV_RELATIVE,
96 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 97 FUNC_LT_DTP_MODULE,
98 FUNC_LT_DTP_RELATIVE,
99 FUNC_LT_TP_RELATIVE,
3969b680 100 FUNC_IPLT_RELOC,
800eeca4
JW		 101 };
102
103enum reg_symbol
104 {
105 REG_GR = 0,
106 REG_FR = (REG_GR + 128),
107 REG_AR = (REG_FR + 128),
108 REG_CR = (REG_AR + 128),
109 REG_P = (REG_CR + 128),
110 REG_BR = (REG_P + 64),
111 REG_IP = (REG_BR + 8),
112 REG_CFM,
113 REG_PR,
114 REG_PR_ROT,
115 REG_PSR,
116 REG_PSR_L,
117 REG_PSR_UM,
118 /* The following are pseudo-registers for use by gas only. */
119 IND_CPUID,
120 IND_DBR,
121 IND_DTR,
122 IND_ITR,
123 IND_IBR,
124 IND_MEM,
125 IND_MSR,
126 IND_PKR,
127 IND_PMC,
128 IND_PMD,
129 IND_RR,
542d6675 130 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 131 REG_PSP,
132 REG_PRIUNAT,
800eeca4
JW		 133 REG_NUM
134 };
135
136enum dynreg_type
137 {
138 DYNREG_GR = 0, /* dynamic general purpose register */
139 DYNREG_FR, /* dynamic floating point register */
140 DYNREG_PR, /* dynamic predicate register */
141 DYNREG_NUM_TYPES
142 };
143
87f8eb97
JW		 144enum operand_match_result
145 {
146 OPERAND_MATCH,
147 OPERAND_OUT_OF_RANGE,
148 OPERAND_MISMATCH
149 };
150
800eeca4
JW		 151/* On the ia64, we can't know the address of a text label until the
152 instructions are packed into a bundle. To handle this, we keep
153 track of the list of labels that appear in front of each
154 instruction. */
155struct label_fix
542d6675
KH		 156{
157 struct label_fix *next;
158 struct symbol *sym;
159};
800eeca4 160
549f748d 161/* This is the endianness of the current section. */
800eeca4
JW		 162extern int target_big_endian;
163
549f748d
JW		 164/* This is the default endianness. */
165static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
166
10a98291
L		 167void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
168
169static void ia64_float_to_chars_bigendian
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
171static void ia64_float_to_chars_littleendian
172 PARAMS ((char *, LITTLENUM_TYPE *, int));
173static void (*ia64_float_to_chars)
174 PARAMS ((char *, LITTLENUM_TYPE *, int));
175
35f5df7f
L		 176static struct hash_control *alias_hash;
177static struct hash_control *alias_name_hash;
178static struct hash_control *secalias_hash;
179static struct hash_control *secalias_name_hash;
180
2fac3d48
JB		 181/* List of chars besides those in app.c:symbol_chars that can start an
182 operand. Used to prevent the scrubber eating vital white-space. */
183const char ia64_symbol_chars[] = "@?";
184
800eeca4
JW		 185/* Characters which always start a comment. */
186const char comment_chars[] = "";
187
188/* Characters which start a comment at the beginning of a line. */
189const char line_comment_chars[] = "#";
190
191/* Characters which may be used to separate multiple commands on a
192 single line. */
193const char line_separator_chars[] = ";";
194
195/* Characters which are used to indicate an exponent in a floating
196 point number. */
197const char EXP_CHARS[] = "eE";
198
199/* Characters which mean that a number is a floating point constant,
200 as in 0d1.0. */
201const char FLT_CHARS[] = "rRsSfFdDxXpP";
202
542d6675 203/* ia64-specific option processing: */
800eeca4 204
44f5c83a 205const char *md_shortopts = "m:N:x::";
800eeca4
JW		 206
207struct option md_longopts[] =
208 {
c43c2cc5
JW		 209#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
210 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
211#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
212 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 213 };
214
215size_t md_longopts_size = sizeof (md_longopts);
216
217static struct
218 {
219 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
220 struct hash_control *reg_hash; /* register name hash table */
221 struct hash_control *dynreg_hash; /* dynamic register hash table */
222 struct hash_control *const_hash; /* constant hash table */
223 struct hash_control *entry_hash; /* code entry hint hash table */
224
225 symbolS *regsym[REG_NUM];
226
227 /* If X_op is != O_absent, the registername for the instruction's
228 qualifying predicate. If NULL, p0 is assumed for instructions
229 that are predicatable. */
230 expressionS qp;
231
91d777ee
L		 232 /* What to do when hint.b is used. */
233 enum
234 {
235 hint_b_error,
236 hint_b_warning,
237 hint_b_ok
238 } hint_b;
239
800eeca4 240 unsigned int
197865e8 241 manual_bundling : 1,
800eeca4
JW		 242 debug_dv: 1,
243 detect_dv: 1,
244 explicit_mode : 1, /* which mode we're in */
245 default_explicit_mode : 1, /* which mode is the default */
246 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 247 auto_align : 1,
248 keep_pending_output : 1;
800eeca4 249
970d6792
L		 250 /* What to do when something is wrong with unwind directives. */
251 enum
252 {
253 unwind_check_warning,
254 unwind_check_error
255 } unwind_check;
256
800eeca4
JW		 257 /* Each bundle consists of up to three instructions. We keep
258 track of four most recent instructions so we can correctly set
197865e8 259 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 260 int curr_slot;
261 int num_slots_in_use;
262 struct slot
263 {
264 unsigned int
265 end_of_insn_group : 1,
266 manual_bundling_on : 1,
196e8040
JW		 267 manual_bundling_off : 1,
268 loc_directive_seen : 1;
800eeca4
JW		 269 signed char user_template; /* user-selected template, if any */
270 unsigned char qp_regno; /* qualifying predicate */
271 /* This duplicates a good fraction of "struct fix" but we
272 can't use a "struct fix" instead since we can't call
273 fix_new_exp() until we know the address of the instruction. */
274 int num_fixups;
275 struct insn_fix
276 {
277 bfd_reloc_code_real_type code;
278 enum ia64_opnd opnd; /* type of operand in need of fix */
279 unsigned int is_pcrel : 1; /* is operand pc-relative? */
280 expressionS expr; /* the value to be inserted */
281 }
282 fixup[2]; /* at most two fixups per insn */
283 struct ia64_opcode *idesc;
284 struct label_fix *label_fixups;
f1bcba5b 285 struct label_fix *tag_fixups;
800eeca4
JW		 286 struct unw_rec_list *unwind_record; /* Unwind directive. */
287 expressionS opnd[6];
288 char *src_file;
289 unsigned int src_line;
290 struct dwarf2_line_info debug_line;
291 }
292 slot[NUM_SLOTS];
293
294 segT last_text_seg;
295
296 struct dynreg
297 {
298 struct dynreg *next; /* next dynamic register */
299 const char *name;
300 unsigned short base; /* the base register number */
301 unsigned short num_regs; /* # of registers in this set */
302 }
303 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
304
305 flagword flags; /* ELF-header flags */
306
307 struct mem_offset {
308 unsigned hint:1; /* is this hint currently valid? */
309 bfd_vma offset; /* mem.offset offset */
310 bfd_vma base; /* mem.offset base */
311 } mem_offset;
312
313 int path; /* number of alt. entry points seen */
314 const char **entry_labels; /* labels of all alternate paths in
542d6675 315 the current DV-checking block. */
800eeca4 316 int maxpaths; /* size currently allocated for
542d6675 317 entry_labels */
557debba
JW		 318
319 int pointer_size; /* size in bytes of a pointer */
320 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 321 }
322md;
323
542d6675 324/* application registers: */
800eeca4 325
e0c9811a
JW		 326#define AR_K0 0
327#define AR_K7 7
328#define AR_RSC 16
329#define AR_BSP 17
330#define AR_BSPSTORE 18
331#define AR_RNAT 19
332#define AR_UNAT 36
333#define AR_FPSR 40
334#define AR_ITC 44
335#define AR_PFS 64
336#define AR_LC 65
800eeca4
JW		 337
338static const struct
339 {
340 const char *name;
341 int regnum;
342 }
343ar[] =
344 {
345 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
346 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
347 {"ar.rsc", 16}, {"ar.bsp", 17},
348 {"ar.bspstore", 18}, {"ar.rnat", 19},
349 {"ar.fcr", 21}, {"ar.eflag", 24},
350 {"ar.csd", 25}, {"ar.ssd", 26},
351 {"ar.cflg", 27}, {"ar.fsr", 28},
352 {"ar.fir", 29}, {"ar.fdr", 30},
353 {"ar.ccv", 32}, {"ar.unat", 36},
354 {"ar.fpsr", 40}, {"ar.itc", 44},
355 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 356 {"ar.ec", 66},
800eeca4
JW		 357 };
358
359#define CR_IPSR 16
360#define CR_ISR 17
361#define CR_IIP 19
362#define CR_IFA 20
363#define CR_ITIR 21
364#define CR_IIPA 22
365#define CR_IFS 23
366#define CR_IIM 24
367#define CR_IHA 25
368#define CR_IVR 65
369#define CR_TPR 66
370#define CR_EOI 67
371#define CR_IRR0 68
372#define CR_IRR3 71
373#define CR_LRR0 80
374#define CR_LRR1 81
375
542d6675 376/* control registers: */
800eeca4
JW		 377static const struct
378 {
379 const char *name;
380 int regnum;
381 }
382cr[] =
383 {
384 {"cr.dcr", 0},
385 {"cr.itm", 1},
386 {"cr.iva", 2},
387 {"cr.pta", 8},
388 {"cr.gpta", 9},
389 {"cr.ipsr", 16},
390 {"cr.isr", 17},
391 {"cr.iip", 19},
392 {"cr.ifa", 20},
393 {"cr.itir", 21},
394 {"cr.iipa", 22},
395 {"cr.ifs", 23},
396 {"cr.iim", 24},
397 {"cr.iha", 25},
398 {"cr.lid", 64},
399 {"cr.ivr", 65},
400 {"cr.tpr", 66},
401 {"cr.eoi", 67},
402 {"cr.irr0", 68},
403 {"cr.irr1", 69},
404 {"cr.irr2", 70},
405 {"cr.irr3", 71},
406 {"cr.itv", 72},
407 {"cr.pmv", 73},
408 {"cr.cmcv", 74},
409 {"cr.lrr0", 80},
410 {"cr.lrr1", 81}
411 };
412
413#define PSR_MFL 4
414#define PSR_IC 13
415#define PSR_DFL 18
416#define PSR_CPL 32
417
418static const struct const_desc
419 {
420 const char *name;
421 valueT value;
422 }
423const_bits[] =
424 {
542d6675 425 /* PSR constant masks: */
800eeca4
JW		 426
427 /* 0: reserved */
428 {"psr.be", ((valueT) 1) << 1},
429 {"psr.up", ((valueT) 1) << 2},
430 {"psr.ac", ((valueT) 1) << 3},
431 {"psr.mfl", ((valueT) 1) << 4},
432 {"psr.mfh", ((valueT) 1) << 5},
433 /* 6-12: reserved */
434 {"psr.ic", ((valueT) 1) << 13},
435 {"psr.i", ((valueT) 1) << 14},
436 {"psr.pk", ((valueT) 1) << 15},
437 /* 16: reserved */
438 {"psr.dt", ((valueT) 1) << 17},
439 {"psr.dfl", ((valueT) 1) << 18},
440 {"psr.dfh", ((valueT) 1) << 19},
441 {"psr.sp", ((valueT) 1) << 20},
442 {"psr.pp", ((valueT) 1) << 21},
443 {"psr.di", ((valueT) 1) << 22},
444 {"psr.si", ((valueT) 1) << 23},
445 {"psr.db", ((valueT) 1) << 24},
446 {"psr.lp", ((valueT) 1) << 25},
447 {"psr.tb", ((valueT) 1) << 26},
448 {"psr.rt", ((valueT) 1) << 27},
449 /* 28-31: reserved */
450 /* 32-33: cpl (current privilege level) */
451 {"psr.is", ((valueT) 1) << 34},
452 {"psr.mc", ((valueT) 1) << 35},
453 {"psr.it", ((valueT) 1) << 36},
454 {"psr.id", ((valueT) 1) << 37},
455 {"psr.da", ((valueT) 1) << 38},
456 {"psr.dd", ((valueT) 1) << 39},
457 {"psr.ss", ((valueT) 1) << 40},
458 /* 41-42: ri (restart instruction) */
459 {"psr.ed", ((valueT) 1) << 43},
460 {"psr.bn", ((valueT) 1) << 44},
461 };
462
542d6675 463/* indirect register-sets/memory: */
800eeca4
JW		 464
465static const struct
466 {
467 const char *name;
468 int regnum;
469 }
470indirect_reg[] =
471 {
472 { "CPUID", IND_CPUID },
473 { "cpuid", IND_CPUID },
474 { "dbr", IND_DBR },
475 { "dtr", IND_DTR },
476 { "itr", IND_ITR },
477 { "ibr", IND_IBR },
478 { "msr", IND_MSR },
479 { "pkr", IND_PKR },
480 { "pmc", IND_PMC },
481 { "pmd", IND_PMD },
482 { "rr", IND_RR },
483 };
484
485/* Pseudo functions used to indicate relocation types (these functions
486 start with an at sign (@). */
487static struct
488 {
489 const char *name;
490 enum pseudo_type
491 {
492 PSEUDO_FUNC_NONE,
493 PSEUDO_FUNC_RELOC,
494 PSEUDO_FUNC_CONST,
e0c9811a 495 PSEUDO_FUNC_REG,
800eeca4
JW		 496 PSEUDO_FUNC_FLOAT
497 }
498 type;
499 union
500 {
501 unsigned long ival;
502 symbolS *sym;
503 }
504 u;
505 }
506pseudo_func[] =
507 {
542d6675 508 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 509 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
510 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 511 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
512 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
513 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 514 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 515 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
516 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
517 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
518 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 519 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 520 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 521 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
522 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
523 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
524 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 525 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 526
542d6675 527 /* mbtype4 constants: */
800eeca4
JW		 528 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
529 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
530 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
531 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
532 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
533
542d6675 534 /* fclass constants: */
bf3ca999 535 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 536 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
537 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
538 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
539 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
540 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
541 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
542 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
543 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 544
545 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 546
c10d9d8f
JW		 547 /* hint constants: */
548 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
549
542d6675 550 /* unwind-related constants: */
041340ad
JW		 551 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
552 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
553 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
554 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
555 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
556 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
557 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 558
542d6675 559 /* unwind-related registers: */
e0c9811a 560 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 561 };
562
542d6675 563/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 564static const bfd_vma nop[IA64_NUM_UNITS] =
565 {
566 0x0000000000LL, /* NIL => break 0 */
567 0x0008000000LL, /* I-unit nop */
568 0x0008000000LL, /* M-unit nop */
569 0x4000000000LL, /* B-unit nop */
570 0x0008000000LL, /* F-unit nop */
571 0x0008000000LL, /* L-"unit" nop */
572 0x0008000000LL, /* X-unit nop */
573 };
574
575/* Can't be `const' as it's passed to input routines (which have the
576 habit of setting temporary sentinels. */
577static char special_section_name[][20] =
578 {
579 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 580 {".IA_64.unwind"}, {".IA_64.unwind_info"},
581 {".init_array"}, {".fini_array"}
800eeca4
JW		 582 };
583
584/* The best template for a particular sequence of up to three
585 instructions: */
586#define N IA64_NUM_TYPES
587static unsigned char best_template[N][N][N];
588#undef N
589
590/* Resource dependencies currently in effect */
591static struct rsrc {
592 int depind; /* dependency index */
593 const struct ia64_dependency *dependency; /* actual dependency */
594 unsigned specific:1, /* is this a specific bit/regno? */
595 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
596 int index; /* specific regno/bit within dependency */
597 int note; /* optional qualifying note (0 if none) */
598#define STATE_NONE 0
599#define STATE_STOP 1
600#define STATE_SRLZ 2
601 int insn_srlz; /* current insn serialization state */
602 int data_srlz; /* current data serialization state */
603 int qp_regno; /* qualifying predicate for this usage */
604 char *file; /* what file marked this dependency */
2434f565 605 unsigned int line; /* what line marked this dependency */
800eeca4 606 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 607 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 608 int path; /* corresponding code entry index */
609} *regdeps = NULL;
610static int regdepslen = 0;
611static int regdepstotlen = 0;
612static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
613static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 614 "data", "instr", "specific", "stop", "other" };
7484b8e6 615static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 616
617/* Current state of PR mutexation */
618static struct qpmutex {
619 valueT prmask;
620 int path;
621} *qp_mutexes = NULL; /* QP mutex bitmasks */
622static int qp_mutexeslen = 0;
623static int qp_mutexestotlen = 0;
197865e8 624static valueT qp_safe_across_calls = 0;
800eeca4
JW		 625
626/* Current state of PR implications */
627static struct qp_imply {
628 unsigned p1:6;
629 unsigned p2:6;
630 unsigned p2_branched:1;
631 int path;
632} *qp_implies = NULL;
633static int qp_implieslen = 0;
634static int qp_impliestotlen = 0;
635
197865e8
KH		 636/* Keep track of static GR values so that indirect register usage can
637 sometimes be tracked. */
800eeca4
JW		 638static struct gr {
639 unsigned known:1;
640 int path;
641 valueT value;
a66d2bb7
JB		 642} gr_values[128] = {
643 {
644 1,
645#ifdef INT_MAX
646 INT_MAX,
647#else
648 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
649#endif
650 0
651 }
652};
800eeca4 653
9545c4ce
L		 654/* Remember the alignment frag. */
655static fragS *align_frag;
656
800eeca4
JW		 657/* These are the routines required to output the various types of
658 unwind records. */
659
f5a30c2e
JW		 660/* A slot_number is a frag address plus the slot index (0-2). We use the
661 frag address here so that if there is a section switch in the middle of
662 a function, then instructions emitted to a different section are not
663 counted. Since there may be more than one frag for a function, this
664 means we also need to keep track of which frag this address belongs to
665 so we can compute inter-frag distances. This also nicely solves the
666 problem with nops emitted for align directives, which can't easily be
667 counted, but can easily be derived from frag sizes. */
668
800eeca4
JW		 669typedef struct unw_rec_list {
670 unwind_record r;
e0c9811a 671 unsigned long slot_number;
f5a30c2e 672 fragS *slot_frag;
73f20958
L		 673 unsigned long next_slot_number;
674 fragS *next_slot_frag;
800eeca4
JW		 675 struct unw_rec_list *next;
676} unw_rec_list;
677
2434f565 678#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 679
6290819d
NC		 680/* Linked list of saved prologue counts. A very poor
681 implementation of a map from label numbers to prologue counts. */
682typedef struct label_prologue_count
683{
684 struct label_prologue_count *next;
685 unsigned long label_number;
686 unsigned int prologue_count;
687} label_prologue_count;
688
e0c9811a
JW		 689static struct
690{
e0c9811a
JW		 691 /* Maintain a list of unwind entries for the current function. */
692 unw_rec_list *list;
693 unw_rec_list *tail;
800eeca4 694
e0c9811a
JW		 695 /* Any unwind entires that should be attached to the current slot
696 that an insn is being constructed for. */
697 unw_rec_list *current_entry;
800eeca4 698
e0c9811a
JW		 699 /* These are used to create the unwind table entry for this function. */
700 symbolS *proc_start;
e0c9811a
JW		 701 symbolS *info; /* pointer to unwind info */
702 symbolS *personality_routine;
91a2ae2a
RH		 703 segT saved_text_seg;
704 subsegT saved_text_subseg;
705 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 706
e0c9811a 707 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 708 unsigned int prologue : 1;
709 unsigned int prologue_mask : 4;
710 unsigned int body : 1;
711 unsigned int insn : 1;
33d01f33 712 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 713 /* Prologue counts at previous .label_state directives. */
714 struct label_prologue_count * saved_prologue_counts;
e0c9811a 715} unwind;
800eeca4 716
9f9a069e
JW		 717/* The input value is a negated offset from psp, and specifies an address
718 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
719 must add 16 and divide by 4 to get the encoded value. */
720
721#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
722
800eeca4
JW		 723typedef void (*vbyte_func) PARAMS ((int, char *, char *));
724
0234cb7c 725/* Forward declarations: */
800eeca4
JW		 726static void set_section PARAMS ((char *name));
727static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
728 unsigned int, unsigned int));
d9201763 729static void dot_align (int);
800eeca4
JW		 730static void dot_radix PARAMS ((int));
731static void dot_special_section PARAMS ((int));
732static void dot_proc PARAMS ((int));
733static void dot_fframe PARAMS ((int));
734static void dot_vframe PARAMS ((int));
150f24a2
JW		 735static void dot_vframesp PARAMS ((int));
736static void dot_vframepsp PARAMS ((int));
800eeca4
JW		 737static void dot_save PARAMS ((int));
738static void dot_restore PARAMS ((int));
150f24a2
JW		 739static void dot_restorereg PARAMS ((int));
740static void dot_restorereg_p PARAMS ((int));
800eeca4
JW		 741static void dot_handlerdata PARAMS ((int));
742static void dot_unwentry PARAMS ((int));
743static void dot_altrp PARAMS ((int));
e0c9811a 744static void dot_savemem PARAMS ((int));
800eeca4
JW		 745static void dot_saveg PARAMS ((int));
746static void dot_savef PARAMS ((int));
747static void dot_saveb PARAMS ((int));
748static void dot_savegf PARAMS ((int));
749static void dot_spill PARAMS ((int));
150f24a2
JW		 750static void dot_spillreg PARAMS ((int));
751static void dot_spillmem PARAMS ((int));
752static void dot_spillreg_p PARAMS ((int));
753static void dot_spillmem_p PARAMS ((int));
754static void dot_label_state PARAMS ((int));
755static void dot_copy_state PARAMS ((int));
800eeca4
JW		 756static void dot_unwabi PARAMS ((int));
757static void dot_personality PARAMS ((int));
758static void dot_body PARAMS ((int));
759static void dot_prologue PARAMS ((int));
760static void dot_endp PARAMS ((int));
761static void dot_template PARAMS ((int));
762static void dot_regstk PARAMS ((int));
763static void dot_rot PARAMS ((int));
764static void dot_byteorder PARAMS ((int));
765static void dot_psr PARAMS ((int));
766static void dot_alias PARAMS ((int));
767static void dot_ln PARAMS ((int));
ef6a2b41 768static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 769static void dot_xdata PARAMS ((int));
770static void stmt_float_cons PARAMS ((int));
771static void stmt_cons_ua PARAMS ((int));
772static void dot_xfloat_cons PARAMS ((int));
773static void dot_xstringer PARAMS ((int));
774static void dot_xdata_ua PARAMS ((int));
775static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 776static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 777static void dot_pred_rel PARAMS ((int));
778static void dot_reg_val PARAMS ((int));
5e819f9c 779static void dot_serialize PARAMS ((int));
800eeca4
JW		 780static void dot_dv_mode PARAMS ((int));
781static void dot_entry PARAMS ((int));
782static void dot_mem_offset PARAMS ((int));
e0c9811a 783static void add_unwind_entry PARAMS((unw_rec_list *ptr));
542d6675 784static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 785static void declare_register_set PARAMS ((const char *, int, int));
786static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 787static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
788 int index,
789 expressionS *e));
800eeca4
JW		 790static int parse_operand PARAMS ((expressionS *e));
791static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
792static void build_insn PARAMS ((struct slot *, bfd_vma *));
793static void emit_one_bundle PARAMS ((void));
794static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 795static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 796 bfd_reloc_code_real_type r_type));
797static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 798static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
799 struct rsrc *, int depind, int path));
800eeca4
JW		 800static void add_qp_mutex PARAMS((valueT mask));
801static void add_qp_imply PARAMS((int p1, int p2));
802static void clear_qp_branch_flag PARAMS((valueT mask));
803static void clear_qp_mutex PARAMS((valueT mask));
804static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 805static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 806static void clear_register_values PARAMS ((void));
807static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 808static void instruction_serialization PARAMS ((void));
809static void data_serialization PARAMS ((void));
810static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 811static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 812static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 813static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 814static int depends_on PARAMS ((int, struct ia64_opcode *));
815static int specify_resource PARAMS ((const struct ia64_dependency *,
816 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 817static int check_dv PARAMS((struct ia64_opcode *idesc));
818static void check_dependencies PARAMS((struct ia64_opcode *));
819static void mark_resources PARAMS((struct ia64_opcode *));
820static void update_dependencies PARAMS((struct ia64_opcode *));
821static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 822static int qp_mutex PARAMS ((int, int, int));
823static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
824static void output_vbyte_mem PARAMS ((int, char *, char *));
825static void count_output PARAMS ((int, char *, char *));
826static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
827static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 828static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 829static void output_P1_format PARAMS ((vbyte_func, int));
830static void output_P2_format PARAMS ((vbyte_func, int, int));
831static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
832static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
833static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
834static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
835static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
836static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
837static void output_P9_format PARAMS ((vbyte_func, int, int));
838static void output_P10_format PARAMS ((vbyte_func, int, int));
839static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
840static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 841static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
842static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 843static char format_ab_reg PARAMS ((int, int));
844static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
845 unsigned long));
846static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
847static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
848 unsigned long));
849static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 850static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 851static unw_rec_list *output_prologue PARAMS ((void));
852static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
853static unw_rec_list *output_body PARAMS ((void));
854static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
855static unw_rec_list *output_mem_stack_v PARAMS ((void));
856static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
857static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
858static unw_rec_list *output_rp_when PARAMS ((void));
859static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
860static unw_rec_list *output_rp_br PARAMS ((unsigned int));
861static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
862static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
863static unw_rec_list *output_pfs_when PARAMS ((void));
864static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
865static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
866static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
867static unw_rec_list *output_preds_when PARAMS ((void));
868static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
869static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
870static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
871static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
872static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
873static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
874static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
875static unw_rec_list *output_br_mem PARAMS ((unsigned int));
876static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
877static unw_rec_list *output_spill_base PARAMS ((unsigned int));
878static unw_rec_list *output_unat_when PARAMS ((void));
879static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
880static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
881static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
882static unw_rec_list *output_lc_when PARAMS ((void));
883static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
884static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
885static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
886static unw_rec_list *output_fpsr_when PARAMS ((void));
887static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
888static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
889static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
890static unw_rec_list *output_priunat_when_gr PARAMS ((void));
891static unw_rec_list *output_priunat_when_mem PARAMS ((void));
892static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
893static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
894static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
895static unw_rec_list *output_bsp_when PARAMS ((void));
896static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
897static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
898static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
899static unw_rec_list *output_bspstore_when PARAMS ((void));
900static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
901static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
902static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
903static unw_rec_list *output_rnat_when PARAMS ((void));
904static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
905static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
906static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
907static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
908static unw_rec_list *output_epilogue PARAMS ((unsigned long));
909static unw_rec_list *output_label_state PARAMS ((unsigned long));
910static unw_rec_list *output_copy_state PARAMS ((unsigned long));
911static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
912static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
913static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
914 unsigned int));
915static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
916 unsigned int));
917static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
918 unsigned int));
919static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
920 unsigned int, unsigned int));
921static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
922static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
923static int calc_record_size PARAMS ((unw_rec_list *));
924static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 925static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 926 unsigned long, fragS *,
927 int));
91a2ae2a 928static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 929static void fixup_unw_records PARAMS ((unw_rec_list *, int));
150f24a2
JW		 930static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
931static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
6290819d
NC		 932static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
933static void save_prologue_count PARAMS ((unsigned long, unsigned int));
934static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 935
652ca075 936/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 937 unit (as opposed to the memory unit). */
938static int
652ca075 939ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 940{
941 reg -= REG_AR;
652ca075
L		 942 return reg >= 64 && reg <= 111;
943}
800eeca4 944
652ca075
L		 945/* Determine if application register REGNUM resides only in the memory
946 unit (as opposed to the integer unit). */
947static int
948ar_is_only_in_memory_unit (int reg)
949{
950 reg -= REG_AR;
951 return reg >= 0 && reg <= 47;
800eeca4
JW		 952}
953
954/* Switch to section NAME and create section if necessary. It's
955 rather ugly that we have to manipulate input_line_pointer but I
956 don't see any other way to accomplish the same thing without
957 changing obj-elf.c (which may be the Right Thing, in the end). */
958static void
959set_section (name)
960 char *name;
961{
962 char *saved_input_line_pointer;
963
964 saved_input_line_pointer = input_line_pointer;
965 input_line_pointer = name;
966 obj_elf_section (0);
967 input_line_pointer = saved_input_line_pointer;
968}
969
d61a78a7
RH		 970/* Map 's' to SHF_IA_64_SHORT. */
971
972int
973ia64_elf_section_letter (letter, ptr_msg)
974 int letter;
975 char **ptr_msg;
976{
977 if (letter == 's')
978 return SHF_IA_64_SHORT;
711ef82f
L		 979 else if (letter == 'o')
980 return SHF_LINK_ORDER;
d61a78a7 981
711ef82f
L		 982 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
983 return -1;
d61a78a7
RH		 984}
985
800eeca4
JW		 986/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
987
988flagword
989ia64_elf_section_flags (flags, attr, type)
990 flagword flags;
2434f565 991 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 992{
993 if (attr & SHF_IA_64_SHORT)
994 flags |= SEC_SMALL_DATA;
995 return flags;
996}
997
91a2ae2a
RH		 998int
999ia64_elf_section_type (str, len)
40449e9f
KH		 1000 const char *str;
1001 size_t len;
91a2ae2a 1002{
1cd8ff38 1003#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1004
1cd8ff38 1005 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1006 return SHT_PROGBITS;
1007
1cd8ff38 1008 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1009 return SHT_PROGBITS;
1010
1cd8ff38 1011 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1012 return SHT_IA_64_UNWIND;
1013
1cd8ff38 1014 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1015 return SHT_IA_64_UNWIND;
1016
711ef82f
L		 1017 if (STREQ ("unwind"))
1018 return SHT_IA_64_UNWIND;
1019
91a2ae2a 1020 return -1;
1cd8ff38 1021#undef STREQ
91a2ae2a
RH		 1022}
1023
800eeca4
JW		 1024static unsigned int
1025set_regstack (ins, locs, outs, rots)
1026 unsigned int ins, locs, outs, rots;
1027{
542d6675
KH		 1028 /* Size of frame. */
1029 unsigned int sof;
800eeca4
JW		 1030
1031 sof = ins + locs + outs;
1032 if (sof > 96)
1033 {
1034 as_bad ("Size of frame exceeds maximum of 96 registers");
1035 return 0;
1036 }
1037 if (rots > sof)
1038 {
1039 as_warn ("Size of rotating registers exceeds frame size");
1040 return 0;
1041 }
1042 md.in.base = REG_GR + 32;
1043 md.loc.base = md.in.base + ins;
1044 md.out.base = md.loc.base + locs;
1045
1046 md.in.num_regs = ins;
1047 md.loc.num_regs = locs;
1048 md.out.num_regs = outs;
1049 md.rot.num_regs = rots;
1050 return sof;
1051}
1052
1053void
1054ia64_flush_insns ()
1055{
1056 struct label_fix *lfix;
1057 segT saved_seg;
1058 subsegT saved_subseg;
b44b1b85 1059 unw_rec_list *ptr;
800eeca4
JW		 1060
1061 if (!md.last_text_seg)
1062 return;
1063
1064 saved_seg = now_seg;
1065 saved_subseg = now_subseg;
1066
1067 subseg_set (md.last_text_seg, 0);
1068
1069 while (md.num_slots_in_use > 0)
1070 emit_one_bundle (); /* force out queued instructions */
1071
1072 /* In case there are labels following the last instruction, resolve
542d6675 1073 those now: */
800eeca4
JW		 1074 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1075 {
1076 S_SET_VALUE (lfix->sym, frag_now_fix ());
1077 symbol_set_frag (lfix->sym, frag_now);
1078 }
1079 CURR_SLOT.label_fixups = 0;
f1bcba5b
JW		 1080 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1081 {
1082 S_SET_VALUE (lfix->sym, frag_now_fix ());
1083 symbol_set_frag (lfix->sym, frag_now);
1084 }
1085 CURR_SLOT.tag_fixups = 0;
800eeca4 1086
b44b1b85 1087 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1088 resolve those now. We only handle prologue, body, and endp directives
1089 here. Give an error for others. */
b44b1b85
JW		 1090 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1091 {
9c59842f 1092 switch (ptr->r.type)
b44b1b85 1093 {
9c59842f
JW		 1094 case prologue:
1095 case prologue_gr:
1096 case body:
1097 case endp:
b44b1b85
JW		 1098 ptr->slot_number = (unsigned long) frag_more (0);
1099 ptr->slot_frag = frag_now;
9c59842f
JW		 1100 break;
1101
1102 /* Allow any record which doesn't have a "t" field (i.e.,
1103 doesn't relate to a particular instruction). */
1104 case unwabi:
1105 case br_gr:
1106 case copy_state:
1107 case fr_mem:
1108 case frgr_mem:
1109 case gr_gr:
1110 case gr_mem:
1111 case label_state:
1112 case rp_br:
1113 case spill_base:
1114 case spill_mask:
1115 /* nothing */
1116 break;
1117
1118 default:
1119 as_bad (_("Unwind directive not followed by an instruction."));
1120 break;
b44b1b85 1121 }
b44b1b85
JW		 1122 }
1123 unwind.current_entry = NULL;
1124
800eeca4 1125 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1126
1127 if (md.qp.X_op == O_register)
1128 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1129}
1130
d9201763
L		 1131static void
1132ia64_do_align (int nbytes)
800eeca4
JW		 1133{
1134 char *saved_input_line_pointer = input_line_pointer;
1135
1136 input_line_pointer = "";
1137 s_align_bytes (nbytes);
1138 input_line_pointer = saved_input_line_pointer;
1139}
1140
1141void
1142ia64_cons_align (nbytes)
1143 int nbytes;
1144{
1145 if (md.auto_align)
1146 {
1147 char *saved_input_line_pointer = input_line_pointer;
1148 input_line_pointer = "";
1149 s_align_bytes (nbytes);
1150 input_line_pointer = saved_input_line_pointer;
1151 }
1152}
1153
1154/* Output COUNT bytes to a memory location. */
2132e3a3 1155static char *vbyte_mem_ptr = NULL;
800eeca4 1156
197865e8 1157void
800eeca4
JW		 1158output_vbyte_mem (count, ptr, comment)
1159 int count;
1160 char *ptr;
2434f565 1161 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1162{
1163 int x;
1164 if (vbyte_mem_ptr == NULL)
1165 abort ();
1166
1167 if (count == 0)
1168 return;
1169 for (x = 0; x < count; x++)
1170 *(vbyte_mem_ptr++) = ptr[x];
1171}
1172
1173/* Count the number of bytes required for records. */
1174static int vbyte_count = 0;
197865e8 1175void
800eeca4
JW		 1176count_output (count, ptr, comment)
1177 int count;
2434f565
JW		 1178 char *ptr ATTRIBUTE_UNUSED;
1179 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1180{
1181 vbyte_count += count;
1182}
1183
1184static void
1185output_R1_format (f, rtype, rlen)
1186 vbyte_func f;
1187 unw_record_type rtype;
1188 int rlen;
1189{
e0c9811a 1190 int r = 0;
800eeca4
JW		 1191 char byte;
1192 if (rlen > 0x1f)
1193 {
1194 output_R3_format (f, rtype, rlen);
1195 return;
1196 }
197865e8 1197
e0c9811a
JW		 1198 if (rtype == body)
1199 r = 1;
1200 else if (rtype != prologue)
1201 as_bad ("record type is not valid");
1202
800eeca4
JW		 1203 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1204 (*f) (1, &byte, NULL);
1205}
1206
1207static void
1208output_R2_format (f, mask, grsave, rlen)
1209 vbyte_func f;
1210 int mask, grsave;
1211 unsigned long rlen;
1212{
1213 char bytes[20];
1214 int count = 2;
1215 mask = (mask & 0x0f);
1216 grsave = (grsave & 0x7f);
1217
1218 bytes[0] = (UNW_R2 | (mask >> 1));
1219 bytes[1] = (((mask & 0x01) << 7) | grsave);
1220 count += output_leb128 (bytes + 2, rlen, 0);
1221 (*f) (count, bytes, NULL);
1222}
1223
1224static void
1225output_R3_format (f, rtype, rlen)
1226 vbyte_func f;
1227 unw_record_type rtype;
1228 unsigned long rlen;
1229{
e0c9811a 1230 int r = 0, count;
800eeca4
JW		 1231 char bytes[20];
1232 if (rlen <= 0x1f)
1233 {
1234 output_R1_format (f, rtype, rlen);
1235 return;
1236 }
197865e8 1237
e0c9811a
JW		 1238 if (rtype == body)
1239 r = 1;
1240 else if (rtype != prologue)
1241 as_bad ("record type is not valid");
800eeca4
JW		 1242 bytes[0] = (UNW_R3 | r);
1243 count = output_leb128 (bytes + 1, rlen, 0);
1244 (*f) (count + 1, bytes, NULL);
1245}
1246
1247static void
1248output_P1_format (f, brmask)
1249 vbyte_func f;
1250 int brmask;
1251{
1252 char byte;
1253 byte = UNW_P1 | (brmask & 0x1f);
1254 (*f) (1, &byte, NULL);
1255}
1256
1257static void
1258output_P2_format (f, brmask, gr)
1259 vbyte_func f;
1260 int brmask;
1261 int gr;
1262{
1263 char bytes[2];
1264 brmask = (brmask & 0x1f);
1265 bytes[0] = UNW_P2 | (brmask >> 1);
1266 bytes[1] = (((brmask & 1) << 7) | gr);
1267 (*f) (2, bytes, NULL);
1268}
1269
1270static void
1271output_P3_format (f, rtype, reg)
1272 vbyte_func f;
1273 unw_record_type rtype;
1274 int reg;
1275{
1276 char bytes[2];
e0c9811a 1277 int r = 0;
800eeca4
JW		 1278 reg = (reg & 0x7f);
1279 switch (rtype)
542d6675 1280 {
800eeca4
JW		 1281 case psp_gr:
1282 r = 0;
1283 break;
1284 case rp_gr:
1285 r = 1;
1286 break;
1287 case pfs_gr:
1288 r = 2;
1289 break;
1290 case preds_gr:
1291 r = 3;
1292 break;
1293 case unat_gr:
1294 r = 4;
1295 break;
1296 case lc_gr:
1297 r = 5;
1298 break;
1299 case rp_br:
1300 r = 6;
1301 break;
1302 case rnat_gr:
1303 r = 7;
1304 break;
1305 case bsp_gr:
1306 r = 8;
1307 break;
1308 case bspstore_gr:
1309 r = 9;
1310 break;
1311 case fpsr_gr:
1312 r = 10;
1313 break;
1314 case priunat_gr:
1315 r = 11;
1316 break;
1317 default:
1318 as_bad ("Invalid record type for P3 format.");
542d6675 1319 }
800eeca4
JW		 1320 bytes[0] = (UNW_P3 | (r >> 1));
1321 bytes[1] = (((r & 1) << 7) | reg);
1322 (*f) (2, bytes, NULL);
1323}
1324
800eeca4 1325static void
e0c9811a 1326output_P4_format (f, imask, imask_size)
800eeca4 1327 vbyte_func f;
e0c9811a
JW		 1328 unsigned char *imask;
1329 unsigned long imask_size;
800eeca4 1330{
e0c9811a 1331 imask[0] = UNW_P4;
2132e3a3 1332 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1333}
1334
1335static void
1336output_P5_format (f, grmask, frmask)
1337 vbyte_func f;
1338 int grmask;
1339 unsigned long frmask;
1340{
1341 char bytes[4];
1342 grmask = (grmask & 0x0f);
1343
1344 bytes[0] = UNW_P5;
1345 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1346 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1347 bytes[3] = (frmask & 0x000000ff);
1348 (*f) (4, bytes, NULL);
1349}
1350
1351static void
1352output_P6_format (f, rtype, rmask)
1353 vbyte_func f;
1354 unw_record_type rtype;
1355 int rmask;
1356{
1357 char byte;
e0c9811a 1358 int r = 0;
197865e8 1359
e0c9811a
JW		 1360 if (rtype == gr_mem)
1361 r = 1;
1362 else if (rtype != fr_mem)
1363 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1364 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1365 (*f) (1, &byte, NULL);
1366}
1367
1368static void
1369output_P7_format (f, rtype, w1, w2)
1370 vbyte_func f;
1371 unw_record_type rtype;
1372 unsigned long w1;
1373 unsigned long w2;
1374{
1375 char bytes[20];
1376 int count = 1;
e0c9811a 1377 int r = 0;
800eeca4
JW		 1378 count += output_leb128 (bytes + 1, w1, 0);
1379 switch (rtype)
1380 {
542d6675
KH		 1381 case mem_stack_f:
1382 r = 0;
1383 count += output_leb128 (bytes + count, w2 >> 4, 0);
1384 break;
1385 case mem_stack_v:
1386 r = 1;
1387 break;
1388 case spill_base:
1389 r = 2;
1390 break;
1391 case psp_sprel:
1392 r = 3;
1393 break;
1394 case rp_when:
1395 r = 4;
1396 break;
1397 case rp_psprel:
1398 r = 5;
1399 break;
1400 case pfs_when:
1401 r = 6;
1402 break;
1403 case pfs_psprel:
1404 r = 7;
1405 break;
1406 case preds_when:
1407 r = 8;
1408 break;
1409 case preds_psprel:
1410 r = 9;
1411 break;
1412 case lc_when:
1413 r = 10;
1414 break;
1415 case lc_psprel:
1416 r = 11;
1417 break;
1418 case unat_when:
1419 r = 12;
1420 break;
1421 case unat_psprel:
1422 r = 13;
1423 break;
1424 case fpsr_when:
1425 r = 14;
1426 break;
1427 case fpsr_psprel:
1428 r = 15;
1429 break;
1430 default:
1431 break;
800eeca4
JW		 1432 }
1433 bytes[0] = (UNW_P7 | r);
1434 (*f) (count, bytes, NULL);
1435}
1436
1437static void
1438output_P8_format (f, rtype, t)
1439 vbyte_func f;
1440 unw_record_type rtype;
1441 unsigned long t;
1442{
1443 char bytes[20];
e0c9811a 1444 int r = 0;
800eeca4
JW		 1445 int count = 2;
1446 bytes[0] = UNW_P8;
1447 switch (rtype)
1448 {
542d6675
KH		 1449 case rp_sprel:
1450 r = 1;
1451 break;
1452 case pfs_sprel:
1453 r = 2;
1454 break;
1455 case preds_sprel:
1456 r = 3;
1457 break;
1458 case lc_sprel:
1459 r = 4;
1460 break;
1461 case unat_sprel:
1462 r = 5;
1463 break;
1464 case fpsr_sprel:
1465 r = 6;
1466 break;
1467 case bsp_when:
1468 r = 7;
1469 break;
1470 case bsp_psprel:
1471 r = 8;
1472 break;
1473 case bsp_sprel:
1474 r = 9;
1475 break;
1476 case bspstore_when:
1477 r = 10;
1478 break;
1479 case bspstore_psprel:
1480 r = 11;
1481 break;
1482 case bspstore_sprel:
1483 r = 12;
1484 break;
1485 case rnat_when:
1486 r = 13;
1487 break;
1488 case rnat_psprel:
1489 r = 14;
1490 break;
1491 case rnat_sprel:
1492 r = 15;
1493 break;
1494 case priunat_when_gr:
1495 r = 16;
1496 break;
1497 case priunat_psprel:
1498 r = 17;
1499 break;
1500 case priunat_sprel:
1501 r = 18;
1502 break;
1503 case priunat_when_mem:
1504 r = 19;
1505 break;
1506 default:
1507 break;
800eeca4
JW		 1508 }
1509 bytes[1] = r;
1510 count += output_leb128 (bytes + 2, t, 0);
1511 (*f) (count, bytes, NULL);
1512}
1513
1514static void
1515output_P9_format (f, grmask, gr)
1516 vbyte_func f;
1517 int grmask;
1518 int gr;
1519{
1520 char bytes[3];
1521 bytes[0] = UNW_P9;
1522 bytes[1] = (grmask & 0x0f);
1523 bytes[2] = (gr & 0x7f);
1524 (*f) (3, bytes, NULL);
1525}
1526
1527static void
1528output_P10_format (f, abi, context)
1529 vbyte_func f;
1530 int abi;
1531 int context;
1532{
1533 char bytes[3];
1534 bytes[0] = UNW_P10;
1535 bytes[1] = (abi & 0xff);
1536 bytes[2] = (context & 0xff);
1537 (*f) (3, bytes, NULL);
1538}
1539
1540static void
1541output_B1_format (f, rtype, label)
1542 vbyte_func f;
1543 unw_record_type rtype;
1544 unsigned long label;
1545{
1546 char byte;
e0c9811a 1547 int r = 0;
197865e8 1548 if (label > 0x1f)
800eeca4
JW		 1549 {
1550 output_B4_format (f, rtype, label);
1551 return;
1552 }
e0c9811a
JW		 1553 if (rtype == copy_state)
1554 r = 1;
1555 else if (rtype != label_state)
1556 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1557
1558 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1559 (*f) (1, &byte, NULL);
1560}
1561
1562static void
1563output_B2_format (f, ecount, t)
1564 vbyte_func f;
1565 unsigned long ecount;
1566 unsigned long t;
1567{
1568 char bytes[20];
1569 int count = 1;
1570 if (ecount > 0x1f)
1571 {
1572 output_B3_format (f, ecount, t);
1573 return;
1574 }
1575 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1576 count += output_leb128 (bytes + 1, t, 0);
1577 (*f) (count, bytes, NULL);
1578}
1579
1580static void
1581output_B3_format (f, ecount, t)
1582 vbyte_func f;
1583 unsigned long ecount;
1584 unsigned long t;
1585{
1586 char bytes[20];
1587 int count = 1;
1588 if (ecount <= 0x1f)
1589 {
1590 output_B2_format (f, ecount, t);
1591 return;
1592 }
1593 bytes[0] = UNW_B3;
1594 count += output_leb128 (bytes + 1, t, 0);
1595 count += output_leb128 (bytes + count, ecount, 0);
1596 (*f) (count, bytes, NULL);
1597}
1598
1599static void
1600output_B4_format (f, rtype, label)
1601 vbyte_func f;
1602 unw_record_type rtype;
1603 unsigned long label;
1604{
1605 char bytes[20];
e0c9811a 1606 int r = 0;
800eeca4 1607 int count = 1;
197865e8 1608 if (label <= 0x1f)
800eeca4
JW		 1609 {
1610 output_B1_format (f, rtype, label);
1611 return;
1612 }
197865e8 1613
e0c9811a
JW		 1614 if (rtype == copy_state)
1615 r = 1;
1616 else if (rtype != label_state)
1617 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1618
1619 bytes[0] = (UNW_B4 | (r << 3));
1620 count += output_leb128 (bytes + 1, label, 0);
1621 (*f) (count, bytes, NULL);
1622}
1623
1624static char
e0c9811a 1625format_ab_reg (ab, reg)
542d6675
KH		 1626 int ab;
1627 int reg;
800eeca4
JW		 1628{
1629 int ret;
e0c9811a 1630 ab = (ab & 3);
800eeca4 1631 reg = (reg & 0x1f);
e0c9811a 1632 ret = (ab << 5) | reg;
800eeca4
JW		 1633 return ret;
1634}
1635
1636static void
e0c9811a 1637output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1638 vbyte_func f;
1639 unw_record_type rtype;
e0c9811a 1640 int ab, reg;
800eeca4
JW		 1641 unsigned long t;
1642 unsigned long w1;
1643{
1644 char bytes[20];
e0c9811a 1645 int r = 0;
800eeca4
JW		 1646 int count = 2;
1647 bytes[0] = UNW_X1;
197865e8 1648
e0c9811a
JW		 1649 if (rtype == spill_sprel)
1650 r = 1;
1651 else if (rtype != spill_psprel)
1652 as_bad ("Invalid record type for format X1");
1653 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1654 count += output_leb128 (bytes + 2, t, 0);
1655 count += output_leb128 (bytes + count, w1, 0);
1656 (*f) (count, bytes, NULL);
1657}
1658
1659static void
e0c9811a 1660output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1661 vbyte_func f;
e0c9811a 1662 int ab, reg;
800eeca4
JW		 1663 int x, y, treg;
1664 unsigned long t;
1665{
1666 char bytes[20];
800eeca4
JW		 1667 int count = 3;
1668 bytes[0] = UNW_X2;
e0c9811a 1669 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1670 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1671 count += output_leb128 (bytes + 3, t, 0);
1672 (*f) (count, bytes, NULL);
1673}
1674
1675static void
e0c9811a 1676output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1677 vbyte_func f;
1678 unw_record_type rtype;
1679 int qp;
e0c9811a 1680 int ab, reg;
800eeca4
JW		 1681 unsigned long t;
1682 unsigned long w1;
1683{
1684 char bytes[20];
e0c9811a 1685 int r = 0;
800eeca4 1686 int count = 3;
e0c9811a
JW		 1687 bytes[0] = UNW_X3;
1688
1689 if (rtype == spill_sprel_p)
1690 r = 1;
1691 else if (rtype != spill_psprel_p)
1692 as_bad ("Invalid record type for format X3");
800eeca4 1693 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1694 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1695 count += output_leb128 (bytes + 3, t, 0);
1696 count += output_leb128 (bytes + count, w1, 0);
1697 (*f) (count, bytes, NULL);
1698}
1699
1700static void
e0c9811a 1701output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1702 vbyte_func f;
1703 int qp;
e0c9811a 1704 int ab, reg;
800eeca4
JW		 1705 int x, y, treg;
1706 unsigned long t;
1707{
1708 char bytes[20];
800eeca4 1709 int count = 4;
e0c9811a 1710 bytes[0] = UNW_X4;
800eeca4 1711 bytes[1] = (qp & 0x3f);
e0c9811a 1712 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1713 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1714 count += output_leb128 (bytes + 4, t, 0);
1715 (*f) (count, bytes, NULL);
1716}
1717
1718/* This function allocates a record list structure, and initializes fields. */
542d6675 1719
800eeca4 1720static unw_rec_list *
197865e8 1721alloc_record (unw_record_type t)
800eeca4
JW		 1722{
1723 unw_rec_list *ptr;
1724 ptr = xmalloc (sizeof (*ptr));
1725 ptr->next = NULL;
1726 ptr->slot_number = SLOT_NUM_NOT_SET;
1727 ptr->r.type = t;
73f20958
L		 1728 ptr->next_slot_number = 0;
1729 ptr->next_slot_frag = 0;
800eeca4
JW		 1730 return ptr;
1731}
1732
5738bc24
JW		 1733/* Dummy unwind record used for calculating the length of the last prologue or
1734 body region. */
1735
1736static unw_rec_list *
1737output_endp ()
1738{
1739 unw_rec_list *ptr = alloc_record (endp);
1740 return ptr;
1741}
1742
800eeca4
JW		 1743static unw_rec_list *
1744output_prologue ()
1745{
1746 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1747 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1748 return ptr;
1749}
1750
1751static unw_rec_list *
1752output_prologue_gr (saved_mask, reg)
1753 unsigned int saved_mask;
1754 unsigned int reg;
1755{
1756 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1757 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1758 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1759 ptr->r.record.r.grsave = reg;
1760 return ptr;
1761}
1762
1763static unw_rec_list *
1764output_body ()
1765{
1766 unw_rec_list *ptr = alloc_record (body);
1767 return ptr;
1768}
1769
1770static unw_rec_list *
1771output_mem_stack_f (size)
1772 unsigned int size;
1773{
1774 unw_rec_list *ptr = alloc_record (mem_stack_f);
1775 ptr->r.record.p.size = size;
1776 return ptr;
1777}
1778
1779static unw_rec_list *
1780output_mem_stack_v ()
1781{
1782 unw_rec_list *ptr = alloc_record (mem_stack_v);
1783 return ptr;
1784}
1785
1786static unw_rec_list *
1787output_psp_gr (gr)
1788 unsigned int gr;
1789{
1790 unw_rec_list *ptr = alloc_record (psp_gr);
1791 ptr->r.record.p.gr = gr;
1792 return ptr;
1793}
1794
1795static unw_rec_list *
1796output_psp_sprel (offset)
1797 unsigned int offset;
1798{
1799 unw_rec_list *ptr = alloc_record (psp_sprel);
542d6675 1800 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1801 return ptr;
1802}
1803
1804static unw_rec_list *
1805output_rp_when ()
1806{
1807 unw_rec_list *ptr = alloc_record (rp_when);
1808 return ptr;
1809}
1810
1811static unw_rec_list *
1812output_rp_gr (gr)
1813 unsigned int gr;
1814{
1815 unw_rec_list *ptr = alloc_record (rp_gr);
1816 ptr->r.record.p.gr = gr;
1817 return ptr;
1818}
1819
1820static unw_rec_list *
1821output_rp_br (br)
1822 unsigned int br;
1823{
1824 unw_rec_list *ptr = alloc_record (rp_br);
1825 ptr->r.record.p.br = br;
1826 return ptr;
1827}
1828
1829static unw_rec_list *
1830output_rp_psprel (offset)
1831 unsigned int offset;
1832{
1833 unw_rec_list *ptr = alloc_record (rp_psprel);
9f9a069e 1834 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1835 return ptr;
1836}
1837
1838static unw_rec_list *
1839output_rp_sprel (offset)
1840 unsigned int offset;
1841{
1842 unw_rec_list *ptr = alloc_record (rp_sprel);
542d6675 1843 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1844 return ptr;
1845}
1846
1847static unw_rec_list *
1848output_pfs_when ()
1849{
1850 unw_rec_list *ptr = alloc_record (pfs_when);
1851 return ptr;
1852}
1853
1854static unw_rec_list *
1855output_pfs_gr (gr)
1856 unsigned int gr;
1857{
1858 unw_rec_list *ptr = alloc_record (pfs_gr);
1859 ptr->r.record.p.gr = gr;
1860 return ptr;
1861}
1862
1863static unw_rec_list *
1864output_pfs_psprel (offset)
1865 unsigned int offset;
1866{
1867 unw_rec_list *ptr = alloc_record (pfs_psprel);
9f9a069e 1868 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1869 return ptr;
1870}
1871
1872static unw_rec_list *
1873output_pfs_sprel (offset)
1874 unsigned int offset;
1875{
1876 unw_rec_list *ptr = alloc_record (pfs_sprel);
542d6675 1877 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1878 return ptr;
1879}
1880
1881static unw_rec_list *
1882output_preds_when ()
1883{
1884 unw_rec_list *ptr = alloc_record (preds_when);
1885 return ptr;
1886}
1887
1888static unw_rec_list *
1889output_preds_gr (gr)
1890 unsigned int gr;
1891{
1892 unw_rec_list *ptr = alloc_record (preds_gr);
1893 ptr->r.record.p.gr = gr;
1894 return ptr;
1895}
1896
1897static unw_rec_list *
1898output_preds_psprel (offset)
1899 unsigned int offset;
1900{
1901 unw_rec_list *ptr = alloc_record (preds_psprel);
9f9a069e 1902 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1903 return ptr;
1904}
1905
1906static unw_rec_list *
1907output_preds_sprel (offset)
1908 unsigned int offset;
1909{
1910 unw_rec_list *ptr = alloc_record (preds_sprel);
542d6675 1911 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1912 return ptr;
1913}
1914
1915static unw_rec_list *
1916output_fr_mem (mask)
1917 unsigned int mask;
1918{
1919 unw_rec_list *ptr = alloc_record (fr_mem);
1920 ptr->r.record.p.rmask = mask;
1921 return ptr;
1922}
1923
1924static unw_rec_list *
1925output_frgr_mem (gr_mask, fr_mask)
1926 unsigned int gr_mask;
1927 unsigned int fr_mask;
1928{
1929 unw_rec_list *ptr = alloc_record (frgr_mem);
1930 ptr->r.record.p.grmask = gr_mask;
1931 ptr->r.record.p.frmask = fr_mask;
1932 return ptr;
1933}
1934
1935static unw_rec_list *
1936output_gr_gr (mask, reg)
1937 unsigned int mask;
1938 unsigned int reg;
1939{
1940 unw_rec_list *ptr = alloc_record (gr_gr);
1941 ptr->r.record.p.grmask = mask;
1942 ptr->r.record.p.gr = reg;
1943 return ptr;
1944}
1945
1946static unw_rec_list *
1947output_gr_mem (mask)
1948 unsigned int mask;
1949{
1950 unw_rec_list *ptr = alloc_record (gr_mem);
1951 ptr->r.record.p.rmask = mask;
1952 return ptr;
1953}
1954
1955static unw_rec_list *
1956output_br_mem (unsigned int mask)
1957{
1958 unw_rec_list *ptr = alloc_record (br_mem);
1959 ptr->r.record.p.brmask = mask;
1960 return ptr;
1961}
1962
1963static unw_rec_list *
1964output_br_gr (save_mask, reg)
1965 unsigned int save_mask;
1966 unsigned int reg;
1967{
1968 unw_rec_list *ptr = alloc_record (br_gr);
1969 ptr->r.record.p.brmask = save_mask;
1970 ptr->r.record.p.gr = reg;
1971 return ptr;
1972}
1973
1974static unw_rec_list *
1975output_spill_base (offset)
1976 unsigned int offset;
1977{
1978 unw_rec_list *ptr = alloc_record (spill_base);
9f9a069e 1979 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1980 return ptr;
1981}
1982
1983static unw_rec_list *
1984output_unat_when ()
1985{
1986 unw_rec_list *ptr = alloc_record (unat_when);
1987 return ptr;
1988}
1989
1990static unw_rec_list *
1991output_unat_gr (gr)
1992 unsigned int gr;
1993{
1994 unw_rec_list *ptr = alloc_record (unat_gr);
1995 ptr->r.record.p.gr = gr;
1996 return ptr;
1997}
1998
1999static unw_rec_list *
2000output_unat_psprel (offset)
2001 unsigned int offset;
2002{
2003 unw_rec_list *ptr = alloc_record (unat_psprel);
9f9a069e 2004 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2005 return ptr;
2006}
2007
2008static unw_rec_list *
2009output_unat_sprel (offset)
2010 unsigned int offset;
2011{
2012 unw_rec_list *ptr = alloc_record (unat_sprel);
542d6675 2013 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2014 return ptr;
2015}
2016
2017static unw_rec_list *
2018output_lc_when ()
2019{
2020 unw_rec_list *ptr = alloc_record (lc_when);
2021 return ptr;
2022}
2023
2024static unw_rec_list *
2025output_lc_gr (gr)
2026 unsigned int gr;
2027{
2028 unw_rec_list *ptr = alloc_record (lc_gr);
2029 ptr->r.record.p.gr = gr;
2030 return ptr;
2031}
2032
2033static unw_rec_list *
2034output_lc_psprel (offset)
2035 unsigned int offset;
2036{
2037 unw_rec_list *ptr = alloc_record (lc_psprel);
9f9a069e 2038 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2039 return ptr;
2040}
2041
2042static unw_rec_list *
2043output_lc_sprel (offset)
2044 unsigned int offset;
2045{
2046 unw_rec_list *ptr = alloc_record (lc_sprel);
542d6675 2047 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2048 return ptr;
2049}
2050
2051static unw_rec_list *
2052output_fpsr_when ()
2053{
2054 unw_rec_list *ptr = alloc_record (fpsr_when);
2055 return ptr;
2056}
2057
2058static unw_rec_list *
2059output_fpsr_gr (gr)
2060 unsigned int gr;
2061{
2062 unw_rec_list *ptr = alloc_record (fpsr_gr);
2063 ptr->r.record.p.gr = gr;
2064 return ptr;
2065}
2066
2067static unw_rec_list *
2068output_fpsr_psprel (offset)
2069 unsigned int offset;
2070{
2071 unw_rec_list *ptr = alloc_record (fpsr_psprel);
9f9a069e 2072 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2073 return ptr;
2074}
2075
2076static unw_rec_list *
2077output_fpsr_sprel (offset)
2078 unsigned int offset;
2079{
2080 unw_rec_list *ptr = alloc_record (fpsr_sprel);
542d6675 2081 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2082 return ptr;
2083}
2084
2085static unw_rec_list *
2086output_priunat_when_gr ()
2087{
2088 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2089 return ptr;
2090}
2091
2092static unw_rec_list *
2093output_priunat_when_mem ()
2094{
2095 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2096 return ptr;
2097}
2098
2099static unw_rec_list *
2100output_priunat_gr (gr)
2101 unsigned int gr;
2102{
2103 unw_rec_list *ptr = alloc_record (priunat_gr);
2104 ptr->r.record.p.gr = gr;
2105 return ptr;
2106}
2107
2108static unw_rec_list *
2109output_priunat_psprel (offset)
2110 unsigned int offset;
2111{
2112 unw_rec_list *ptr = alloc_record (priunat_psprel);
9f9a069e 2113 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2114 return ptr;
2115}
2116
2117static unw_rec_list *
2118output_priunat_sprel (offset)
2119 unsigned int offset;
2120{
2121 unw_rec_list *ptr = alloc_record (priunat_sprel);
542d6675 2122 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2123 return ptr;
2124}
2125
2126static unw_rec_list *
2127output_bsp_when ()
2128{
2129 unw_rec_list *ptr = alloc_record (bsp_when);
2130 return ptr;
2131}
2132
2133static unw_rec_list *
2134output_bsp_gr (gr)
2135 unsigned int gr;
2136{
2137 unw_rec_list *ptr = alloc_record (bsp_gr);
2138 ptr->r.record.p.gr = gr;
2139 return ptr;
2140}
2141
2142static unw_rec_list *
2143output_bsp_psprel (offset)
2144 unsigned int offset;
2145{
2146 unw_rec_list *ptr = alloc_record (bsp_psprel);
9f9a069e 2147 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2148 return ptr;
2149}
2150
2151static unw_rec_list *
2152output_bsp_sprel (offset)
2153 unsigned int offset;
2154{
2155 unw_rec_list *ptr = alloc_record (bsp_sprel);
542d6675 2156 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2157 return ptr;
2158}
2159
2160static unw_rec_list *
2161output_bspstore_when ()
2162{
2163 unw_rec_list *ptr = alloc_record (bspstore_when);
2164 return ptr;
2165}
2166
2167static unw_rec_list *
2168output_bspstore_gr (gr)
2169 unsigned int gr;
2170{
2171 unw_rec_list *ptr = alloc_record (bspstore_gr);
2172 ptr->r.record.p.gr = gr;
2173 return ptr;
2174}
2175
2176static unw_rec_list *
2177output_bspstore_psprel (offset)
2178 unsigned int offset;
2179{
2180 unw_rec_list *ptr = alloc_record (bspstore_psprel);
9f9a069e 2181 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2182 return ptr;
2183}
2184
2185static unw_rec_list *
2186output_bspstore_sprel (offset)
2187 unsigned int offset;
2188{
2189 unw_rec_list *ptr = alloc_record (bspstore_sprel);
542d6675 2190 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2191 return ptr;
2192}
2193
2194static unw_rec_list *
2195output_rnat_when ()
2196{
2197 unw_rec_list *ptr = alloc_record (rnat_when);
2198 return ptr;
2199}
2200
2201static unw_rec_list *
2202output_rnat_gr (gr)
2203 unsigned int gr;
2204{
2205 unw_rec_list *ptr = alloc_record (rnat_gr);
2206 ptr->r.record.p.gr = gr;
2207 return ptr;
2208}
2209
2210static unw_rec_list *
2211output_rnat_psprel (offset)
2212 unsigned int offset;
2213{
2214 unw_rec_list *ptr = alloc_record (rnat_psprel);
9f9a069e 2215 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2216 return ptr;
2217}
2218
2219static unw_rec_list *
2220output_rnat_sprel (offset)
2221 unsigned int offset;
2222{
2223 unw_rec_list *ptr = alloc_record (rnat_sprel);
542d6675 2224 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2225 return ptr;
2226}
2227
2228static unw_rec_list *
e0c9811a
JW		 2229output_unwabi (abi, context)
2230 unsigned long abi;
2231 unsigned long context;
800eeca4 2232{
e0c9811a
JW		 2233 unw_rec_list *ptr = alloc_record (unwabi);
2234 ptr->r.record.p.abi = abi;
2235 ptr->r.record.p.context = context;
800eeca4
JW		 2236 return ptr;
2237}
2238
2239static unw_rec_list *
e0c9811a 2240output_epilogue (unsigned long ecount)
800eeca4 2241{
e0c9811a
JW		 2242 unw_rec_list *ptr = alloc_record (epilogue);
2243 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2244 return ptr;
2245}
2246
2247static unw_rec_list *
e0c9811a 2248output_label_state (unsigned long label)
800eeca4 2249{
e0c9811a
JW		 2250 unw_rec_list *ptr = alloc_record (label_state);
2251 ptr->r.record.b.label = label;
800eeca4
JW		 2252 return ptr;
2253}
2254
2255static unw_rec_list *
e0c9811a
JW		 2256output_copy_state (unsigned long label)
2257{
2258 unw_rec_list *ptr = alloc_record (copy_state);
2259 ptr->r.record.b.label = label;
2260 return ptr;
2261}
2262
2263static unw_rec_list *
2264output_spill_psprel (ab, reg, offset)
2265 unsigned int ab;
800eeca4
JW		 2266 unsigned int reg;
2267 unsigned int offset;
2268{
2269 unw_rec_list *ptr = alloc_record (spill_psprel);
e0c9811a 2270 ptr->r.record.x.ab = ab;
800eeca4 2271 ptr->r.record.x.reg = reg;
9f9a069e 2272 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2273 return ptr;
2274}
2275
2276static unw_rec_list *
e0c9811a
JW		 2277output_spill_sprel (ab, reg, offset)
2278 unsigned int ab;
800eeca4
JW		 2279 unsigned int reg;
2280 unsigned int offset;
2281{
2282 unw_rec_list *ptr = alloc_record (spill_sprel);
e0c9811a 2283 ptr->r.record.x.ab = ab;
800eeca4 2284 ptr->r.record.x.reg = reg;
542d6675 2285 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2286 return ptr;
2287}
2288
2289static unw_rec_list *
e0c9811a
JW		 2290output_spill_psprel_p (ab, reg, offset, predicate)
2291 unsigned int ab;
800eeca4
JW		 2292 unsigned int reg;
2293 unsigned int offset;
2294 unsigned int predicate;
2295{
2296 unw_rec_list *ptr = alloc_record (spill_psprel_p);
e0c9811a 2297 ptr->r.record.x.ab = ab;
800eeca4 2298 ptr->r.record.x.reg = reg;
9f9a069e 2299 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2300 ptr->r.record.x.qp = predicate;
2301 return ptr;
2302}
2303
2304static unw_rec_list *
e0c9811a
JW		 2305output_spill_sprel_p (ab, reg, offset, predicate)
2306 unsigned int ab;
800eeca4
JW		 2307 unsigned int reg;
2308 unsigned int offset;
2309 unsigned int predicate;
2310{
2311 unw_rec_list *ptr = alloc_record (spill_sprel_p);
e0c9811a 2312 ptr->r.record.x.ab = ab;
800eeca4 2313 ptr->r.record.x.reg = reg;
542d6675 2314 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2315 ptr->r.record.x.qp = predicate;
2316 return ptr;
2317}
2318
2319static unw_rec_list *
e0c9811a
JW		 2320output_spill_reg (ab, reg, targ_reg, xy)
2321 unsigned int ab;
800eeca4
JW		 2322 unsigned int reg;
2323 unsigned int targ_reg;
2324 unsigned int xy;
2325{
2326 unw_rec_list *ptr = alloc_record (spill_reg);
e0c9811a 2327 ptr->r.record.x.ab = ab;
800eeca4
JW		 2328 ptr->r.record.x.reg = reg;
2329 ptr->r.record.x.treg = targ_reg;
2330 ptr->r.record.x.xy = xy;
2331 return ptr;
2332}
2333
2334static unw_rec_list *
e0c9811a
JW		 2335output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2336 unsigned int ab;
800eeca4
JW		 2337 unsigned int reg;
2338 unsigned int targ_reg;
2339 unsigned int xy;
2340 unsigned int predicate;
2341{
2342 unw_rec_list *ptr = alloc_record (spill_reg_p);
e0c9811a 2343 ptr->r.record.x.ab = ab;
800eeca4
JW		 2344 ptr->r.record.x.reg = reg;
2345 ptr->r.record.x.treg = targ_reg;
2346 ptr->r.record.x.xy = xy;
2347 ptr->r.record.x.qp = predicate;
2348 return ptr;
2349}
2350
197865e8 2351/* Given a unw_rec_list process the correct format with the
800eeca4 2352 specified function. */
542d6675 2353
800eeca4
JW		 2354static void
2355process_one_record (ptr, f)
2356 unw_rec_list *ptr;
2357 vbyte_func f;
2358{
e0c9811a
JW		 2359 unsigned long fr_mask, gr_mask;
2360
197865e8 2361 switch (ptr->r.type)
800eeca4 2362 {
5738bc24
JW		 2363 /* This is a dummy record that takes up no space in the output. */
2364 case endp:
2365 break;
2366
542d6675
KH		 2367 case gr_mem:
2368 case fr_mem:
2369 case br_mem:
2370 case frgr_mem:
2371 /* These are taken care of by prologue/prologue_gr. */
2372 break;
e0c9811a 2373
542d6675
KH		 2374 case prologue_gr:
2375 case prologue:
2376 if (ptr->r.type == prologue_gr)
2377 output_R2_format (f, ptr->r.record.r.grmask,
2378 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2379 else
800eeca4 2380 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2381
2382 /* Output descriptor(s) for union of register spills (if any). */
2383 gr_mask = ptr->r.record.r.mask.gr_mem;
2384 fr_mask = ptr->r.record.r.mask.fr_mem;
2385 if (fr_mask)
2386 {
2387 if ((fr_mask & ~0xfUL) == 0)
2388 output_P6_format (f, fr_mem, fr_mask);
2389 else
2390 {
2391 output_P5_format (f, gr_mask, fr_mask);
2392 gr_mask = 0;
2393 }
2394 }
2395 if (gr_mask)
2396 output_P6_format (f, gr_mem, gr_mask);
2397 if (ptr->r.record.r.mask.br_mem)
2398 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2399
2400 /* output imask descriptor if necessary: */
2401 if (ptr->r.record.r.mask.i)
2402 output_P4_format (f, ptr->r.record.r.mask.i,
2403 ptr->r.record.r.imask_size);
2404 break;
2405
2406 case body:
2407 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2408 break;
2409 case mem_stack_f:
2410 case mem_stack_v:
2411 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2412 ptr->r.record.p.size);
2413 break;
2414 case psp_gr:
2415 case rp_gr:
2416 case pfs_gr:
2417 case preds_gr:
2418 case unat_gr:
2419 case lc_gr:
2420 case fpsr_gr:
2421 case priunat_gr:
2422 case bsp_gr:
2423 case bspstore_gr:
2424 case rnat_gr:
2425 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2426 break;
2427 case rp_br:
2428 output_P3_format (f, rp_br, ptr->r.record.p.br);
2429 break;
2430 case psp_sprel:
2431 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2432 break;
2433 case rp_when:
2434 case pfs_when:
2435 case preds_when:
2436 case unat_when:
2437 case lc_when:
2438 case fpsr_when:
2439 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2440 break;
2441 case rp_psprel:
2442 case pfs_psprel:
2443 case preds_psprel:
2444 case unat_psprel:
2445 case lc_psprel:
2446 case fpsr_psprel:
2447 case spill_base:
2448 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2449 break;
2450 case rp_sprel:
2451 case pfs_sprel:
2452 case preds_sprel:
2453 case unat_sprel:
2454 case lc_sprel:
2455 case fpsr_sprel:
2456 case priunat_sprel:
2457 case bsp_sprel:
2458 case bspstore_sprel:
2459 case rnat_sprel:
2460 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2461 break;
2462 case gr_gr:
2463 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2464 break;
2465 case br_gr:
2466 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2467 break;
2468 case spill_mask:
2469 as_bad ("spill_mask record unimplemented.");
2470 break;
2471 case priunat_when_gr:
2472 case priunat_when_mem:
2473 case bsp_when:
2474 case bspstore_when:
2475 case rnat_when:
2476 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2477 break;
2478 case priunat_psprel:
2479 case bsp_psprel:
2480 case bspstore_psprel:
2481 case rnat_psprel:
2482 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2483 break;
2484 case unwabi:
2485 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2486 break;
2487 case epilogue:
2488 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2489 break;
2490 case label_state:
2491 case copy_state:
2492 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2493 break;
2494 case spill_psprel:
2495 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2496 ptr->r.record.x.reg, ptr->r.record.x.t,
2497 ptr->r.record.x.pspoff);
2498 break;
2499 case spill_sprel:
2500 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2501 ptr->r.record.x.reg, ptr->r.record.x.t,
2502 ptr->r.record.x.spoff);
2503 break;
2504 case spill_reg:
2505 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2506 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2507 ptr->r.record.x.treg, ptr->r.record.x.t);
2508 break;
2509 case spill_psprel_p:
2510 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2511 ptr->r.record.x.ab, ptr->r.record.x.reg,
2512 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2513 break;
2514 case spill_sprel_p:
2515 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2516 ptr->r.record.x.ab, ptr->r.record.x.reg,
2517 ptr->r.record.x.t, ptr->r.record.x.spoff);
2518 break;
2519 case spill_reg_p:
2520 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2521 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2522 ptr->r.record.x.xy, ptr->r.record.x.treg,
2523 ptr->r.record.x.t);
2524 break;
2525 default:
2526 as_bad ("record_type_not_valid");
2527 break;
800eeca4
JW		 2528 }
2529}
2530
197865e8 2531/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2532 the specified function. */
2533static void
2534process_unw_records (list, f)
2535 unw_rec_list *list;
2536 vbyte_func f;
2537{
2538 unw_rec_list *ptr;
2539 for (ptr = list; ptr; ptr = ptr->next)
2540 process_one_record (ptr, f);
2541}
2542
2543/* Determine the size of a record list in bytes. */
2544static int
2545calc_record_size (list)
2546 unw_rec_list *list;
2547{
2548 vbyte_count = 0;
2549 process_unw_records (list, count_output);
2550 return vbyte_count;
2551}
2552
e0c9811a
JW		 2553/* Update IMASK bitmask to reflect the fact that one or more registers
2554 of type TYPE are saved starting at instruction with index T. If N
2555 bits are set in REGMASK, it is assumed that instructions T through
2556 T+N-1 save these registers.
2557
2558 TYPE values:
2559 0: no save
2560 1: instruction saves next fp reg
2561 2: instruction saves next general reg
2562 3: instruction saves next branch reg */
2563static void
2564set_imask (region, regmask, t, type)
2565 unw_rec_list *region;
2566 unsigned long regmask;
2567 unsigned long t;
2568 unsigned int type;
2569{
2570 unsigned char *imask;
2571 unsigned long imask_size;
2572 unsigned int i;
2573 int pos;
2574
2575 imask = region->r.record.r.mask.i;
2576 imask_size = region->r.record.r.imask_size;
2577 if (!imask)
2578 {
542d6675 2579 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2580 imask = xmalloc (imask_size);
2581 memset (imask, 0, imask_size);
2582
2583 region->r.record.r.imask_size = imask_size;
2584 region->r.record.r.mask.i = imask;
2585 }
2586
542d6675
KH		 2587 i = (t / 4) + 1;
2588 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2589 while (regmask)
2590 {
2591 if (i >= imask_size)
2592 {
2593 as_bad ("Ignoring attempt to spill beyond end of region");
2594 return;
2595 }
2596
2597 imask[i] |= (type & 0x3) << pos;
197865e8 2598
e0c9811a
JW		 2599 regmask &= (regmask - 1);
2600 pos -= 2;
2601 if (pos < 0)
2602 {
2603 pos = 0;
2604 ++i;
2605 }
2606 }
2607}
2608
f5a30c2e
JW		 2609/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2610 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2611 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2612 for frag sizes. */
f5a30c2e 2613
e0c9811a 2614unsigned long
b5e0fabd 2615slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2616 unsigned long slot_addr;
2617 fragS *slot_frag;
2618 unsigned long first_addr;
2619 fragS *first_frag;
b5e0fabd 2620 int before_relax;
e0c9811a 2621{
f5a30c2e
JW		 2622 unsigned long index = 0;
2623
2624 /* First time we are called, the initial address and frag are invalid. */
2625 if (first_addr == 0)
2626 return 0;
2627
2628 /* If the two addresses are in different frags, then we need to add in
2629 the remaining size of this frag, and then the entire size of intermediate
2630 frags. */
2631 while (slot_frag != first_frag)
2632 {
2633 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2634
b5e0fabd 2635 if (! before_relax)
73f20958 2636 {
b5e0fabd
JW		 2637 /* We can get the final addresses only during and after
2638 relaxation. */
73f20958
L		 2639 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2640 index += 3 * ((first_frag->fr_next->fr_address
2641 - first_frag->fr_address
2642 - first_frag->fr_fix) >> 4);
2643 }
2644 else
2645 /* We don't know what the final addresses will be. We try our
2646 best to estimate. */
2647 switch (first_frag->fr_type)
2648 {
2649 default:
2650 break;
2651
2652 case rs_space:
2653 as_fatal ("only constant space allocation is supported");
2654 break;
2655
2656 case rs_align:
2657 case rs_align_code:
2658 case rs_align_test:
2659 /* Take alignment into account. Assume the worst case
2660 before relaxation. */
2661 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2662 break;
2663
2664 case rs_org:
2665 if (first_frag->fr_symbol)
2666 {
2667 as_fatal ("only constant offsets are supported");
2668 break;
2669 }
2670 case rs_fill:
2671 index += 3 * (first_frag->fr_offset >> 4);
2672 break;
2673 }
2674
f5a30c2e
JW		 2675 /* Add in the full size of the frag converted to instruction slots. */
2676 index += 3 * (first_frag->fr_fix >> 4);
2677 /* Subtract away the initial part before first_addr. */
2678 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2679 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2680
f5a30c2e
JW		 2681 /* Move to the beginning of the next frag. */
2682 first_frag = first_frag->fr_next;
2683 first_addr = (unsigned long) &first_frag->fr_literal;
2684 }
2685
2686 /* Add in the used part of the last frag. */
2687 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2688 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2689 return index;
2690}
4a1805b1 2691
91a2ae2a
RH		 2692/* Optimize unwind record directives. */
2693
2694static unw_rec_list *
2695optimize_unw_records (list)
2696 unw_rec_list *list;
2697{
2698 if (!list)
2699 return NULL;
2700
2701 /* If the only unwind record is ".prologue" or ".prologue" followed
2702 by ".body", then we can optimize the unwind directives away. */
2703 if (list->r.type == prologue
5738bc24
JW		 2704 && (list->next->r.type == endp
2705 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2706 return NULL;
2707
2708 return list;
2709}
2710
800eeca4
JW		 2711/* Given a complete record list, process any records which have
2712 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2713 this has been run, all necessary information should be available
800eeca4 2714 within each record to generate an image. */
542d6675 2715
800eeca4 2716static void
b5e0fabd 2717fixup_unw_records (list, before_relax)
800eeca4 2718 unw_rec_list *list;
b5e0fabd 2719 int before_relax;
800eeca4 2720{
e0c9811a
JW		 2721 unw_rec_list *ptr, *region = 0;
2722 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2723 fragS *first_frag = 0;
e0c9811a 2724
800eeca4
JW		 2725 for (ptr = list; ptr; ptr = ptr->next)
2726 {
2727 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2728 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2729 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2730 first_addr, first_frag, before_relax);
800eeca4
JW		 2731 switch (ptr->r.type)
2732 {
542d6675
KH		 2733 case prologue:
2734 case prologue_gr:
2735 case body:
2736 {
2737 unw_rec_list *last;
5738bc24
JW		 2738 int size;
2739 unsigned long last_addr = 0;
2740 fragS *last_frag = NULL;
542d6675
KH		 2741
2742 first_addr = ptr->slot_number;
f5a30c2e 2743 first_frag = ptr->slot_frag;
542d6675 2744 /* Find either the next body/prologue start, or the end of
5738bc24 2745 the function, and determine the size of the region. */
542d6675
KH		 2746 for (last = ptr->next; last != NULL; last = last->next)
2747 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2748 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2749 {
2750 last_addr = last->slot_number;
f5a30c2e 2751 last_frag = last->slot_frag;
542d6675
KH		 2752 break;
2753 }
b5e0fabd
JW		 2754 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2755 before_relax);
542d6675 2756 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2757 if (ptr->r.type == body)
2758 /* End of region. */
2759 region = 0;
2760 else
2761 region = ptr;
e0c9811a 2762 break;
542d6675
KH		 2763 }
2764 case epilogue:
ed7af9f9
L		 2765 if (t < rlen)
2766 ptr->r.record.b.t = rlen - 1 - t;
2767 else
2768 /* This happens when a memory-stack-less procedure uses a
2769 ".restore sp" directive at the end of a region to pop
2770 the frame state. */
2771 ptr->r.record.b.t = 0;
542d6675 2772 break;
e0c9811a 2773
542d6675
KH		 2774 case mem_stack_f:
2775 case mem_stack_v:
2776 case rp_when:
2777 case pfs_when:
2778 case preds_when:
2779 case unat_when:
2780 case lc_when:
2781 case fpsr_when:
2782 case priunat_when_gr:
2783 case priunat_when_mem:
2784 case bsp_when:
2785 case bspstore_when:
2786 case rnat_when:
2787 ptr->r.record.p.t = t;
2788 break;
e0c9811a 2789
542d6675
KH		 2790 case spill_reg:
2791 case spill_sprel:
2792 case spill_psprel:
2793 case spill_reg_p:
2794 case spill_sprel_p:
2795 case spill_psprel_p:
2796 ptr->r.record.x.t = t;
2797 break;
e0c9811a 2798
542d6675
KH		 2799 case frgr_mem:
2800 if (!region)
2801 {
75e09913 2802 as_bad ("frgr_mem record before region record!");
542d6675
KH		 2803 return;
2804 }
2805 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2806 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2807 set_imask (region, ptr->r.record.p.frmask, t, 1);
2808 set_imask (region, ptr->r.record.p.grmask, t, 2);
2809 break;
2810 case fr_mem:
2811 if (!region)
2812 {
75e09913 2813 as_bad ("fr_mem record before region record!");
542d6675
KH		 2814 return;
2815 }
2816 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2817 set_imask (region, ptr->r.record.p.rmask, t, 1);
2818 break;
2819 case gr_mem:
2820 if (!region)
2821 {
75e09913 2822 as_bad ("gr_mem record before region record!");
542d6675
KH		 2823 return;
2824 }
2825 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2826 set_imask (region, ptr->r.record.p.rmask, t, 2);
2827 break;
2828 case br_mem:
2829 if (!region)
2830 {
75e09913 2831 as_bad ("br_mem record before region record!");
542d6675
KH		 2832 return;
2833 }
2834 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2835 set_imask (region, ptr->r.record.p.brmask, t, 3);
2836 break;
e0c9811a 2837
542d6675
KH		 2838 case gr_gr:
2839 if (!region)
2840 {
75e09913 2841 as_bad ("gr_gr record before region record!");
542d6675
KH		 2842 return;
2843 }
2844 set_imask (region, ptr->r.record.p.grmask, t, 2);
2845 break;
2846 case br_gr:
2847 if (!region)
2848 {
75e09913 2849 as_bad ("br_gr record before region record!");
542d6675
KH		 2850 return;
2851 }
2852 set_imask (region, ptr->r.record.p.brmask, t, 3);
2853 break;
e0c9811a 2854
542d6675
KH		 2855 default:
2856 break;
800eeca4
JW		 2857 }
2858 }
2859}
2860
b5e0fabd
JW		 2861/* Estimate the size of a frag before relaxing. We only have one type of frag
2862 to handle here, which is the unwind info frag. */
2863
2864int
2865ia64_estimate_size_before_relax (fragS *frag,
2866 asection *segtype ATTRIBUTE_UNUSED)
2867{
2868 unw_rec_list *list;
2869 int len, size, pad;
2870
2871 /* ??? This code is identical to the first part of ia64_convert_frag. */
2872 list = (unw_rec_list *) frag->fr_opcode;
2873 fixup_unw_records (list, 0);
2874
2875 len = calc_record_size (list);
2876 /* pad to pointer-size boundary. */
2877 pad = len % md.pointer_size;
2878 if (pad != 0)
2879 len += md.pointer_size - pad;
f7e323d5
JB		 2880 /* Add 8 for the header. */
2881 size = len + 8;
2882 /* Add a pointer for the personality offset. */
2883 if (frag->fr_offset)
2884 size += md.pointer_size;
b5e0fabd
JW		 2885
2886 /* fr_var carries the max_chars that we created the fragment with.
2887 We must, of course, have allocated enough memory earlier. */
2888 assert (frag->fr_var >= size);
2889
2890 return frag->fr_fix + size;
2891}
2892
73f20958
L		 2893/* This function converts a rs_machine_dependent variant frag into a
2894 normal fill frag with the unwind image from the the record list. */
2895void
2896ia64_convert_frag (fragS *frag)
557debba 2897{
73f20958
L		 2898 unw_rec_list *list;
2899 int len, size, pad;
1cd8ff38 2900 valueT flag_value;
557debba 2901
b5e0fabd 2902 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 2903 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 2904 fixup_unw_records (list, 0);
1cd8ff38 2905
73f20958
L		 2906 len = calc_record_size (list);
2907 /* pad to pointer-size boundary. */
2908 pad = len % md.pointer_size;
2909 if (pad != 0)
2910 len += md.pointer_size - pad;
f7e323d5
JB		 2911 /* Add 8 for the header. */
2912 size = len + 8;
2913 /* Add a pointer for the personality offset. */
2914 if (frag->fr_offset)
2915 size += md.pointer_size;
73f20958
L		 2916
2917 /* fr_var carries the max_chars that we created the fragment with.
2918 We must, of course, have allocated enough memory earlier. */
2919 assert (frag->fr_var >= size);
2920
2921 /* Initialize the header area. fr_offset is initialized with
2922 unwind.personality_routine. */
2923 if (frag->fr_offset)
1cd8ff38
NC		 2924 {
2925 if (md.flags & EF_IA_64_ABI64)
2926 flag_value = (bfd_vma) 3 << 32;
2927 else
2928 /* 32-bit unwind info block. */
2929 flag_value = (bfd_vma) 0x1003 << 32;
2930 }
2931 else
2932 flag_value = 0;
557debba 2933
73f20958
L		 2934 md_number_to_chars (frag->fr_literal,
2935 (((bfd_vma) 1 << 48) /* Version. */
2936 | flag_value /* U & E handler flags. */
2937 | (len / md.pointer_size)), /* Length. */
2938 8);
557debba 2939
73f20958
L		 2940 /* Skip the header. */
2941 vbyte_mem_ptr = frag->fr_literal + 8;
2942 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 2943
2944 /* Fill the padding bytes with zeros. */
2945 if (pad != 0)
2946 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2947 md.pointer_size - pad);
2948
73f20958
L		 2949 frag->fr_fix += size;
2950 frag->fr_type = rs_fill;
2951 frag->fr_var = 0;
2952 frag->fr_offset = 0;
800eeca4
JW		 2953}
2954
e0c9811a
JW		 2955static int
2956convert_expr_to_ab_reg (e, ab, regp)
2957 expressionS *e;
2958 unsigned int *ab;
2959 unsigned int *regp;
2960{
2961 unsigned int reg;
2962
2963 if (e->X_op != O_register)
2964 return 0;
2965
2966 reg = e->X_add_number;
2434f565 2967 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 2968 {
2969 *ab = 0;
2970 *regp = reg - REG_GR;
2971 }
2434f565
JW		 2972 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2973 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 2974 {
2975 *ab = 1;
2976 *regp = reg - REG_FR;
2977 }
2434f565 2978 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 2979 {
2980 *ab = 2;
2981 *regp = reg - REG_BR;
2982 }
2983 else
2984 {
2985 *ab = 3;
2986 switch (reg)
2987 {
2988 case REG_PR: *regp = 0; break;
2989 case REG_PSP: *regp = 1; break;
2990 case REG_PRIUNAT: *regp = 2; break;
2991 case REG_BR + 0: *regp = 3; break;
2992 case REG_AR + AR_BSP: *regp = 4; break;
2993 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2994 case REG_AR + AR_RNAT: *regp = 6; break;
2995 case REG_AR + AR_UNAT: *regp = 7; break;
2996 case REG_AR + AR_FPSR: *regp = 8; break;
2997 case REG_AR + AR_PFS: *regp = 9; break;
2998 case REG_AR + AR_LC: *regp = 10; break;
2999
3000 default:
3001 return 0;
3002 }
3003 }
3004 return 1;
197865e8 3005}
e0c9811a
JW		 3006
3007static int
3008convert_expr_to_xy_reg (e, xy, regp)
3009 expressionS *e;
3010 unsigned int *xy;
3011 unsigned int *regp;
3012{
3013 unsigned int reg;
3014
3015 if (e->X_op != O_register)
3016 return 0;
3017
3018 reg = e->X_add_number;
3019
2434f565 3020 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
e0c9811a
JW		 3021 {
3022 *xy = 0;
3023 *regp = reg - REG_GR;
3024 }
2434f565 3025 else if (reg >= REG_FR && reg <= (REG_FR + 127))
e0c9811a
JW		 3026 {
3027 *xy = 1;
3028 *regp = reg - REG_FR;
3029 }
2434f565 3030 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3031 {
3032 *xy = 2;
3033 *regp = reg - REG_BR;
3034 }
3035 else
3036 return -1;
3037 return 1;
197865e8 3038}
e0c9811a 3039
d9201763
L		 3040static void
3041dot_align (int arg)
3042{
3043 /* The current frag is an alignment frag. */
3044 align_frag = frag_now;
3045 s_align_bytes (arg);
3046}
3047
800eeca4
JW		 3048static void
3049dot_radix (dummy)
2434f565 3050 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3051{
3052 int radix;
3053
3054 SKIP_WHITESPACE ();
3055 radix = *input_line_pointer++;
3056
3057 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3058 {
3059 as_bad ("Radix `%c' unsupported", *input_line_pointer);
542d6675 3060 ignore_rest_of_line ();
800eeca4
JW		 3061 return;
3062 }
3063}
3064
196e8040
JW		 3065/* Helper function for .loc directives. If the assembler is not generating
3066 line number info, then we need to remember which instructions have a .loc
3067 directive, and only call dwarf2_gen_line_info for those instructions. */
3068
3069static void
3070dot_loc (int x)
3071{
3072 CURR_SLOT.loc_directive_seen = 1;
3073 dwarf2_directive_loc (x);
3074}
3075
800eeca4
JW		 3076/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3077static void
3078dot_special_section (which)
3079 int which;
3080{
3081 set_section ((char *) special_section_name[which]);
3082}
3083
07450571
L		 3084/* Return -1 for warning and 0 for error. */
3085
3086static int
970d6792
L		 3087unwind_diagnostic (const char * region, const char *directive)
3088{
3089 if (md.unwind_check == unwind_check_warning)
07450571
L		 3090 {
3091 as_warn (".%s outside of %s", directive, region);
3092 return -1;
3093 }
970d6792
L		 3094 else
3095 {
3096 as_bad (".%s outside of %s", directive, region);
3097 ignore_rest_of_line ();
07450571 3098 return 0;
970d6792
L		 3099 }
3100}
3101
07450571
L		 3102/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3103 a procedure but the unwind directive check is set to warning, 0 if
3104 a directive isn't in a procedure and the unwind directive check is set
3105 to error. */
3106
75e09913
JB		 3107static int
3108in_procedure (const char *directive)
3109{
3110 if (unwind.proc_start
3111 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3112 return 1;
07450571 3113 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3114}
3115
07450571
L		 3116/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3117 a prologue but the unwind directive check is set to warning, 0 if
3118 a directive isn't in a prologue and the unwind directive check is set
3119 to error. */
3120
75e09913
JB		 3121static int
3122in_prologue (const char *directive)
3123{
07450571
L		 3124 int in = in_procedure (directive);
3125 if (in)
75e09913 3126 {
970d6792 3127 /* We are in a procedure. Check if we are in a prologue. */
75e09913
JB		 3128 if (unwind.prologue)
3129 return 1;
07450571
L		 3130 /* We only want to issue one message. */
3131 if (in == 1)
3132 return unwind_diagnostic ("prologue", directive);
3133 else
3134 return -1;
75e09913
JB		 3135 }
3136 return 0;
3137}
3138
07450571
L		 3139/* Return 1 if a directive is in a body, -1 if a directive isn't in
3140 a body but the unwind directive check is set to warning, 0 if
3141 a directive isn't in a body and the unwind directive check is set
3142 to error. */
3143
75e09913
JB		 3144static int
3145in_body (const char *directive)
3146{
07450571
L		 3147 int in = in_procedure (directive);
3148 if (in)
75e09913 3149 {
970d6792 3150 /* We are in a procedure. Check if we are in a body. */
75e09913
JB		 3151 if (unwind.body)
3152 return 1;
07450571
L		 3153 /* We only want to issue one message. */
3154 if (in == 1)
3155 return unwind_diagnostic ("body region", directive);
3156 else
3157 return -1;
75e09913
JB		 3158 }
3159 return 0;
3160}
3161
800eeca4
JW		 3162static void
3163add_unwind_entry (ptr)
3164 unw_rec_list *ptr;
3165{
e0c9811a
JW		 3166 if (unwind.tail)
3167 unwind.tail->next = ptr;
800eeca4 3168 else
e0c9811a
JW		 3169 unwind.list = ptr;
3170 unwind.tail = ptr;
800eeca4
JW		 3171
3172 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3173 if (unwind.current_entry == NULL)
3174 unwind.current_entry = ptr;
800eeca4
JW		 3175}
3176
197865e8 3177static void
800eeca4 3178dot_fframe (dummy)
2434f565 3179 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3180{
3181 expressionS e;
e0c9811a 3182
75e09913
JB		 3183 if (!in_prologue ("fframe"))
3184 return;
3185
800eeca4 3186 parse_operand (&e);
197865e8 3187
800eeca4
JW		 3188 if (e.X_op != O_constant)
3189 as_bad ("Operand to .fframe must be a constant");
3190 else
e0c9811a
JW		 3191 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3192}
3193
197865e8 3194static void
e0c9811a 3195dot_vframe (dummy)
2434f565 3196 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3197{
3198 expressionS e;
3199 unsigned reg;
3200
75e09913
JB		 3201 if (!in_prologue ("vframe"))
3202 return;
3203
e0c9811a
JW		 3204 parse_operand (&e);
3205 reg = e.X_add_number - REG_GR;
3206 if (e.X_op == O_register && reg < 128)
800eeca4 3207 {
e0c9811a 3208 add_unwind_entry (output_mem_stack_v ());
30d25259
RH		 3209 if (! (unwind.prologue_mask & 2))
3210 add_unwind_entry (output_psp_gr (reg));
800eeca4 3211 }
e0c9811a
JW		 3212 else
3213 as_bad ("First operand to .vframe must be a general register");
800eeca4
JW		 3214}
3215
197865e8 3216static void
e0c9811a 3217dot_vframesp (dummy)
2434f565 3218 int dummy ATTRIBUTE_UNUSED;
800eeca4 3219{
e0c9811a
JW		 3220 expressionS e;
3221
75e09913
JB		 3222 if (!in_prologue ("vframesp"))
3223 return;
3224
e0c9811a
JW		 3225 parse_operand (&e);
3226 if (e.X_op == O_constant)
3227 {
3228 add_unwind_entry (output_mem_stack_v ());
3229 add_unwind_entry (output_psp_sprel (e.X_add_number));
3230 }
3231 else
69906a9b 3232 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
e0c9811a
JW		 3233}
3234
197865e8 3235static void
e0c9811a 3236dot_vframepsp (dummy)
2434f565 3237 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3238{
3239 expressionS e;
3240
75e09913
JB		 3241 if (!in_prologue ("vframepsp"))
3242 return;
3243
e0c9811a
JW		 3244 parse_operand (&e);
3245 if (e.X_op == O_constant)
3246 {
3247 add_unwind_entry (output_mem_stack_v ());
3248 add_unwind_entry (output_psp_sprel (e.X_add_number));
3249 }
3250 else
69906a9b 3251 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
800eeca4
JW		 3252}
3253
197865e8 3254static void
800eeca4 3255dot_save (dummy)
2434f565 3256 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3257{
3258 expressionS e1, e2;
3259 int sep;
3260 int reg1, reg2;
3261
75e09913
JB		 3262 if (!in_prologue ("save"))
3263 return;
3264
800eeca4
JW		 3265 sep = parse_operand (&e1);
3266 if (sep != ',')
3267 as_bad ("No second operand to .save");
3268 sep = parse_operand (&e2);
3269
e0c9811a 3270 reg1 = e1.X_add_number;
800eeca4 3271 reg2 = e2.X_add_number - REG_GR;
197865e8 3272
800eeca4 3273 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3274 if (e1.X_op == O_register)
800eeca4 3275 {
542d6675 3276 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
800eeca4
JW		 3277 {
3278 switch (reg1)
3279 {
542d6675
KH		 3280 case REG_AR + AR_BSP:
3281 add_unwind_entry (output_bsp_when ());
3282 add_unwind_entry (output_bsp_gr (reg2));
3283 break;
3284 case REG_AR + AR_BSPSTORE:
3285 add_unwind_entry (output_bspstore_when ());
3286 add_unwind_entry (output_bspstore_gr (reg2));
3287 break;
3288 case REG_AR + AR_RNAT:
3289 add_unwind_entry (output_rnat_when ());
3290 add_unwind_entry (output_rnat_gr (reg2));
3291 break;
3292 case REG_AR + AR_UNAT:
3293 add_unwind_entry (output_unat_when ());
3294 add_unwind_entry (output_unat_gr (reg2));
3295 break;
3296 case REG_AR + AR_FPSR:
3297 add_unwind_entry (output_fpsr_when ());
3298 add_unwind_entry (output_fpsr_gr (reg2));
3299 break;
3300 case REG_AR + AR_PFS:
3301 add_unwind_entry (output_pfs_when ());
3302 if (! (unwind.prologue_mask & 4))
3303 add_unwind_entry (output_pfs_gr (reg2));
3304 break;
3305 case REG_AR + AR_LC:
3306 add_unwind_entry (output_lc_when ());
3307 add_unwind_entry (output_lc_gr (reg2));
3308 break;
3309 case REG_BR:
3310 add_unwind_entry (output_rp_when ());
3311 if (! (unwind.prologue_mask & 8))
3312 add_unwind_entry (output_rp_gr (reg2));
3313 break;
3314 case REG_PR:
3315 add_unwind_entry (output_preds_when ());
3316 if (! (unwind.prologue_mask & 1))
3317 add_unwind_entry (output_preds_gr (reg2));
3318 break;
3319 case REG_PRIUNAT:
3320 add_unwind_entry (output_priunat_when_gr ());
3321 add_unwind_entry (output_priunat_gr (reg2));
3322 break;
3323 default:
3324 as_bad ("First operand not a valid register");
800eeca4
JW		 3325 }
3326 }
3327 else
3328 as_bad (" Second operand not a valid register");
3329 }
3330 else
e0c9811a 3331 as_bad ("First operand not a register");
800eeca4
JW		 3332}
3333
197865e8 3334static void
800eeca4 3335dot_restore (dummy)
2434f565 3336 int dummy ATTRIBUTE_UNUSED;
800eeca4 3337{
e0c9811a 3338 expressionS e1, e2;
33d01f33 3339 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3340 int sep;
3341
75e09913
JB		 3342 if (!in_body ("restore"))
3343 return;
3344
e0c9811a
JW		 3345 sep = parse_operand (&e1);
3346 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3347 {
3348 as_bad ("First operand to .restore must be stack pointer (sp)");
3349 return;
3350 }
3351
3352 if (sep == ',')
3353 {
3354 parse_operand (&e2);
33d01f33 3355 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3356 {
33d01f33 3357 as_bad ("Second operand to .restore must be a constant >= 0");
e0c9811a
JW		 3358 return;
3359 }
33d01f33 3360 ecount = e2.X_add_number;
e0c9811a 3361 }
33d01f33
JW		 3362 else
3363 ecount = unwind.prologue_count - 1;
6290819d
NC		 3364
3365 if (ecount >= unwind.prologue_count)
3366 {
3367 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3368 ecount + 1, unwind.prologue_count);
3369 return;
3370 }
3371
e0c9811a 3372 add_unwind_entry (output_epilogue (ecount));
33d01f33
JW		 3373
3374 if (ecount < unwind.prologue_count)
3375 unwind.prologue_count -= ecount + 1;
3376 else
3377 unwind.prologue_count = 0;
e0c9811a
JW		 3378}
3379
197865e8 3380static void
e0c9811a 3381dot_restorereg (dummy)
2434f565 3382 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3383{
3384 unsigned int ab, reg;
3385 expressionS e;
3386
75e09913
JB		 3387 if (!in_procedure ("restorereg"))
3388 return;
3389
e0c9811a
JW		 3390 parse_operand (&e);
3391
3392 if (!convert_expr_to_ab_reg (&e, &ab, &reg))
3393 {
3394 as_bad ("First operand to .restorereg must be a preserved register");
3395 return;
3396 }
3397 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3398}
3399
197865e8 3400static void
e0c9811a 3401dot_restorereg_p (dummy)
2434f565 3402 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3403{
3404 unsigned int qp, ab, reg;
3405 expressionS e1, e2;
3406 int sep;
3407
75e09913
JB		 3408 if (!in_procedure ("restorereg.p"))
3409 return;
3410
e0c9811a
JW		 3411 sep = parse_operand (&e1);
3412 if (sep != ',')
3413 {
3414 as_bad ("No second operand to .restorereg.p");
3415 return;
3416 }
3417
3418 parse_operand (&e2);
3419
3420 qp = e1.X_add_number - REG_P;
3421 if (e1.X_op != O_register || qp > 63)
3422 {
3423 as_bad ("First operand to .restorereg.p must be a predicate");
3424 return;
3425 }
3426
3427 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3428 {
3429 as_bad ("Second operand to .restorereg.p must be a preserved register");
3430 return;
3431 }
3432 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
800eeca4
JW		 3433}
3434
2d6ed997
L		 3435static char *special_linkonce_name[] =
3436 {
3437 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3438 };
3439
3440static void
d6afba4b 3441start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
2d6ed997
L		 3442{
3443 /*
3444 Use a slightly ugly scheme to derive the unwind section names from
3445 the text section name:
3446
3447 text sect. unwind table sect.
3448 name: name: comments:
3449 ---------- ----------------- --------------------------------
3450 .text .IA_64.unwind
3451 .text.foo .IA_64.unwind.text.foo
3452 .foo .IA_64.unwind.foo
3453 .gnu.linkonce.t.foo
3454 .gnu.linkonce.ia64unw.foo
3455 _info .IA_64.unwind_info gas issues error message (ditto)
3456 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3457
3458 This mapping is done so that:
3459
3460 (a) An object file with unwind info only in .text will use
3461 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3462 This follows the letter of the ABI and also ensures backwards
3463 compatibility with older toolchains.
3464
3465 (b) An object file with unwind info in multiple text sections
3466 will use separate unwind sections for each text section.
3467 This allows us to properly set the "sh_info" and "sh_link"
3468 fields in SHT_IA_64_UNWIND as required by the ABI and also
3469 lets GNU ld support programs with multiple segments
3470 containing unwind info (as might be the case for certain
3471 embedded applications).
3472
3473 (c) An error is issued if there would be a name clash.
3474 */
3475
3476 const char *text_name, *sec_text_name;
3477 char *sec_name;
3478 const char *prefix = special_section_name [sec_index];
3479 const char *suffix;
3480 size_t prefix_len, suffix_len, sec_name_len;
3481
3482 sec_text_name = segment_name (text_seg);
3483 text_name = sec_text_name;
3484 if (strncmp (text_name, "_info", 5) == 0)
3485 {
3486 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3487 text_name);
3488 ignore_rest_of_line ();
3489 return;
3490 }
3491 if (strcmp (text_name, ".text") == 0)
3492 text_name = "";
3493
3494 /* Build the unwind section name by appending the (possibly stripped)
3495 text section name to the unwind prefix. */
3496 suffix = text_name;
3497 if (strncmp (text_name, ".gnu.linkonce.t.",
3498 sizeof (".gnu.linkonce.t.") - 1) == 0)
3499 {
3500 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3501 suffix += sizeof (".gnu.linkonce.t.") - 1;
3502 }
d6afba4b
JJ		 3503 else if (linkonce_empty)
3504 return;
2d6ed997
L		 3505
3506 prefix_len = strlen (prefix);
3507 suffix_len = strlen (suffix);
3508 sec_name_len = prefix_len + suffix_len;
3509 sec_name = alloca (sec_name_len + 1);
3510 memcpy (sec_name, prefix, prefix_len);
3511 memcpy (sec_name + prefix_len, suffix, suffix_len);
3512 sec_name [sec_name_len] = '\0';
3513
3514 /* Handle COMDAT group. */
3515 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3516 {
3517 char *section;
3518 size_t len, group_name_len;
3519 const char *group_name = elf_group_name (text_seg);
3520
3521 if (group_name == NULL)
3522 {
3523 as_bad ("Group section `%s' has no group signature",
3524 sec_text_name);
3525 ignore_rest_of_line ();
3526 return;
3527 }
3528 /* We have to construct a fake section directive. */
3529 group_name_len = strlen (group_name);
3530 len = (sec_name_len
3531 + 16 /* ,"aG",@progbits, */
3532 + group_name_len /* ,group_name */
3533 + 7); /* ,comdat */
3534
3535 section = alloca (len + 1);
3536 memcpy (section, sec_name, sec_name_len);
3537 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3538 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3539 memcpy (section + len - 7, ",comdat", 7);
3540 section [len] = '\0';
3541 set_section (section);
3542 }
3543 else
3544 {
3545 set_section (sec_name);
3546 bfd_set_section_flags (stdoutput, now_seg,
3547 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3548 }
38ce5b11
L		 3549
3550 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3551}
3552
73f20958 3553static void
2d6ed997 3554generate_unwind_image (const segT text_seg)
800eeca4 3555{
73f20958
L		 3556 int size, pad;
3557 unw_rec_list *list;
800eeca4 3558
c97b7ef6
JW		 3559 /* Mark the end of the unwind info, so that we can compute the size of the
3560 last unwind region. */
3561 add_unwind_entry (output_endp ());
3562
10850f29
JW		 3563 /* Force out pending instructions, to make sure all unwind records have
3564 a valid slot_number field. */
3565 ia64_flush_insns ();
3566
800eeca4 3567 /* Generate the unwind record. */
73f20958 3568 list = optimize_unw_records (unwind.list);
b5e0fabd 3569 fixup_unw_records (list, 1);
73f20958
L		 3570 size = calc_record_size (list);
3571
3572 if (size > 0 || unwind.force_unwind_entry)
3573 {
3574 unwind.force_unwind_entry = 0;
3575 /* pad to pointer-size boundary. */
3576 pad = size % md.pointer_size;
3577 if (pad != 0)
3578 size += md.pointer_size - pad;
f7e323d5
JB		 3579 /* Add 8 for the header. */
3580 size += 8;
3581 /* Add a pointer for the personality offset. */
3582 if (unwind.personality_routine)
3583 size += md.pointer_size;
73f20958 3584 }
6290819d 3585
800eeca4
JW		 3586 /* If there are unwind records, switch sections, and output the info. */
3587 if (size != 0)
3588 {
800eeca4 3589 expressionS exp;
1cd8ff38 3590 bfd_reloc_code_real_type reloc;
91a2ae2a 3591
d6afba4b 3592 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
800eeca4 3593
557debba
JW		 3594 /* Make sure the section has 4 byte alignment for ILP32 and
3595 8 byte alignment for LP64. */
3596 frag_align (md.pointer_size_shift, 0, 0);
3597 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3598
800eeca4 3599 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3600 unwind.info = expr_build_dot ();
73f20958
L		 3601
3602 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3603 (offsetT) (long) unwind.personality_routine,
3604 (char *) list);
91a2ae2a 3605
800eeca4 3606 /* Add the personality address to the image. */
e0c9811a 3607 if (unwind.personality_routine != 0)
542d6675 3608 {
40449e9f 3609 exp.X_op = O_symbol;
e0c9811a 3610 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3611 exp.X_add_number = 0;
1cd8ff38
NC		 3612
3613 if (md.flags & EF_IA_64_BE)
3614 {
3615 if (md.flags & EF_IA_64_ABI64)
3616 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3617 else
3618 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3619 }
40449e9f 3620 else
1cd8ff38
NC		 3621 {
3622 if (md.flags & EF_IA_64_ABI64)
3623 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3624 else
3625 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3626 }
3627
3628 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3629 md.pointer_size, &exp, 0, reloc);
e0c9811a 3630 unwind.personality_routine = 0;
542d6675 3631 }
800eeca4 3632 }
d6afba4b
JJ		 3633 else
3634 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
800eeca4 3635
6290819d 3636 free_saved_prologue_counts ();
e0c9811a 3637 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3638}
3639
197865e8 3640static void
542d6675 3641dot_handlerdata (dummy)
2434f565 3642 int dummy ATTRIBUTE_UNUSED;
800eeca4 3643{
75e09913
JB		 3644 if (!in_procedure ("handlerdata"))
3645 return;
91a2ae2a
RH		 3646 unwind.force_unwind_entry = 1;
3647
3648 /* Remember which segment we're in so we can switch back after .endp */
3649 unwind.saved_text_seg = now_seg;
3650 unwind.saved_text_subseg = now_subseg;
3651
3652 /* Generate unwind info into unwind-info section and then leave that
3653 section as the currently active one so dataXX directives go into
3654 the language specific data area of the unwind info block. */
2d6ed997 3655 generate_unwind_image (now_seg);
e0c9811a 3656 demand_empty_rest_of_line ();
800eeca4
JW		 3657}
3658
197865e8 3659static void
800eeca4 3660dot_unwentry (dummy)
2434f565 3661 int dummy ATTRIBUTE_UNUSED;
800eeca4 3662{
75e09913
JB		 3663 if (!in_procedure ("unwentry"))
3664 return;
91a2ae2a 3665 unwind.force_unwind_entry = 1;
e0c9811a 3666 demand_empty_rest_of_line ();
800eeca4
JW		 3667}
3668
197865e8 3669static void
800eeca4 3670dot_altrp (dummy)
2434f565 3671 int dummy ATTRIBUTE_UNUSED;
800eeca4 3672{
e0c9811a
JW		 3673 expressionS e;
3674 unsigned reg;
3675
75e09913
JB		 3676 if (!in_prologue ("altrp"))
3677 return;
3678
e0c9811a
JW		 3679 parse_operand (&e);
3680 reg = e.X_add_number - REG_BR;
3681 if (e.X_op == O_register && reg < 8)
3682 add_unwind_entry (output_rp_br (reg));
3683 else
3684 as_bad ("First operand not a valid branch register");
800eeca4
JW		 3685}
3686
197865e8 3687static void
e0c9811a
JW		 3688dot_savemem (psprel)
3689 int psprel;
800eeca4
JW		 3690{
3691 expressionS e1, e2;
3692 int sep;
3693 int reg1, val;
3694
75e09913
JB		 3695 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3696 return;
3697
800eeca4
JW		 3698 sep = parse_operand (&e1);
3699 if (sep != ',')
e0c9811a 3700 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
800eeca4
JW		 3701 sep = parse_operand (&e2);
3702
e0c9811a 3703 reg1 = e1.X_add_number;
800eeca4 3704 val = e2.X_add_number;
197865e8 3705
800eeca4 3706 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3707 if (e1.X_op == O_register)
800eeca4
JW		 3708 {
3709 if (e2.X_op == O_constant)
3710 {
3711 switch (reg1)
3712 {
542d6675
KH		 3713 case REG_AR + AR_BSP:
3714 add_unwind_entry (output_bsp_when ());
3715 add_unwind_entry ((psprel
3716 ? output_bsp_psprel
3717 : output_bsp_sprel) (val));
3718 break;
3719 case REG_AR + AR_BSPSTORE:
3720 add_unwind_entry (output_bspstore_when ());
3721 add_unwind_entry ((psprel
3722 ? output_bspstore_psprel
3723 : output_bspstore_sprel) (val));
3724 break;
3725 case REG_AR + AR_RNAT:
3726 add_unwind_entry (output_rnat_when ());
3727 add_unwind_entry ((psprel
3728 ? output_rnat_psprel
3729 : output_rnat_sprel) (val));
3730 break;
3731 case REG_AR + AR_UNAT:
3732 add_unwind_entry (output_unat_when ());
3733 add_unwind_entry ((psprel
3734 ? output_unat_psprel
3735 : output_unat_sprel) (val));
3736 break;
3737 case REG_AR + AR_FPSR:
3738 add_unwind_entry (output_fpsr_when ());
3739 add_unwind_entry ((psprel
3740 ? output_fpsr_psprel
3741 : output_fpsr_sprel) (val));
3742 break;
3743 case REG_AR + AR_PFS:
3744 add_unwind_entry (output_pfs_when ());
3745 add_unwind_entry ((psprel
3746 ? output_pfs_psprel
3747 : output_pfs_sprel) (val));
3748 break;
3749 case REG_AR + AR_LC:
3750 add_unwind_entry (output_lc_when ());
3751 add_unwind_entry ((psprel
3752 ? output_lc_psprel
3753 : output_lc_sprel) (val));
3754 break;
3755 case REG_BR:
3756 add_unwind_entry (output_rp_when ());
3757 add_unwind_entry ((psprel
3758 ? output_rp_psprel
3759 : output_rp_sprel) (val));
3760 break;
3761 case REG_PR:
3762 add_unwind_entry (output_preds_when ());
3763 add_unwind_entry ((psprel
3764 ? output_preds_psprel
3765 : output_preds_sprel) (val));
3766 break;
3767 case REG_PRIUNAT:
3768 add_unwind_entry (output_priunat_when_mem ());
3769 add_unwind_entry ((psprel
3770 ? output_priunat_psprel
3771 : output_priunat_sprel) (val));
3772 break;
3773 default:
3774 as_bad ("First operand not a valid register");
800eeca4
JW		 3775 }
3776 }
3777 else
3778 as_bad (" Second operand not a valid constant");
3779 }
3780 else
e0c9811a 3781 as_bad ("First operand not a register");
800eeca4
JW		 3782}
3783
197865e8 3784static void
800eeca4 3785dot_saveg (dummy)
2434f565 3786 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3787{
3788 expressionS e1, e2;
3789 int sep;
75e09913
JB		 3790
3791 if (!in_prologue ("save.g"))
3792 return;
3793
800eeca4
JW		 3794 sep = parse_operand (&e1);
3795 if (sep == ',')
3796 parse_operand (&e2);
197865e8 3797
800eeca4
JW		 3798 if (e1.X_op != O_constant)
3799 as_bad ("First operand to .save.g must be a constant.");
3800 else
3801 {
3802 int grmask = e1.X_add_number;
3803 if (sep != ',')
3804 add_unwind_entry (output_gr_mem (grmask));
3805 else
542d6675 3806 {
800eeca4 3807 int reg = e2.X_add_number - REG_GR;
542d6675 3808 if (e2.X_op == O_register && reg >= 0 && reg < 128)
800eeca4
JW		 3809 add_unwind_entry (output_gr_gr (grmask, reg));
3810 else
3811 as_bad ("Second operand is an invalid register.");
3812 }
3813 }
3814}
3815
197865e8 3816static void
800eeca4 3817dot_savef (dummy)
2434f565 3818 int dummy ATTRIBUTE_UNUSED;
800eeca4 3819{
e0c9811a 3820 expressionS e1;
800eeca4 3821 int sep;
75e09913
JB		 3822
3823 if (!in_prologue ("save.f"))
3824 return;
3825
800eeca4 3826 sep = parse_operand (&e1);
197865e8 3827
800eeca4
JW		 3828 if (e1.X_op != O_constant)
3829 as_bad ("Operand to .save.f must be a constant.");
3830 else
e0c9811a 3831 add_unwind_entry (output_fr_mem (e1.X_add_number));
800eeca4
JW		 3832}
3833
197865e8 3834static void
800eeca4 3835dot_saveb (dummy)
2434f565 3836 int dummy ATTRIBUTE_UNUSED;
800eeca4 3837{
e0c9811a
JW		 3838 expressionS e1, e2;
3839 unsigned int reg;
3840 unsigned char sep;
3841 int brmask;
3842
75e09913
JB		 3843 if (!in_prologue ("save.b"))
3844 return;
3845
800eeca4 3846 sep = parse_operand (&e1);
800eeca4 3847 if (e1.X_op != O_constant)
800eeca4 3848 {
e0c9811a
JW		 3849 as_bad ("First operand to .save.b must be a constant.");
3850 return;
800eeca4 3851 }
e0c9811a
JW		 3852 brmask = e1.X_add_number;
3853
3854 if (sep == ',')
3855 {
3856 sep = parse_operand (&e2);
3857 reg = e2.X_add_number - REG_GR;
3858 if (e2.X_op != O_register || reg > 127)
3859 {
3860 as_bad ("Second operand to .save.b must be a general register.");
3861 return;
3862 }
3863 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3864 }
3865 else
3866 add_unwind_entry (output_br_mem (brmask));
3867
3868 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3869 demand_empty_rest_of_line ();
800eeca4
JW		 3870}
3871
197865e8 3872static void
800eeca4 3873dot_savegf (dummy)
2434f565 3874 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3875{
3876 expressionS e1, e2;
3877 int sep;
75e09913
JB		 3878
3879 if (!in_prologue ("save.gf"))
3880 return;
3881
800eeca4
JW		 3882 sep = parse_operand (&e1);
3883 if (sep == ',')
3884 parse_operand (&e2);
197865e8 3885
800eeca4
JW		 3886 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3887 as_bad ("Both operands of .save.gf must be constants.");
3888 else
3889 {
3890 int grmask = e1.X_add_number;
3891 int frmask = e2.X_add_number;
3892 add_unwind_entry (output_frgr_mem (grmask, frmask));
3893 }
3894}
3895
197865e8 3896static void
800eeca4 3897dot_spill (dummy)
2434f565 3898 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3899{
3900 expressionS e;
e0c9811a
JW		 3901 unsigned char sep;
3902
75e09913
JB		 3903 if (!in_prologue ("spill"))
3904 return;
3905
e0c9811a
JW		 3906 sep = parse_operand (&e);
3907 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3908 demand_empty_rest_of_line ();
197865e8 3909
800eeca4
JW		 3910 if (e.X_op != O_constant)
3911 as_bad ("Operand to .spill must be a constant");
3912 else
e0c9811a
JW		 3913 add_unwind_entry (output_spill_base (e.X_add_number));
3914}
3915
3916static void
3917dot_spillreg (dummy)
2434f565 3918 int dummy ATTRIBUTE_UNUSED;
e0c9811a 3919{
2132e3a3
AM		 3920 int sep;
3921 unsigned int ab, xy, reg, treg;
e0c9811a
JW		 3922 expressionS e1, e2;
3923
75e09913
JB		 3924 if (!in_procedure ("spillreg"))
3925 return;
3926
e0c9811a
JW		 3927 sep = parse_operand (&e1);
3928 if (sep != ',')
3929 {
3930 as_bad ("No second operand to .spillreg");
3931 return;
3932 }
3933
3934 parse_operand (&e2);
3935
3936 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
800eeca4 3937 {
e0c9811a
JW		 3938 as_bad ("First operand to .spillreg must be a preserved register");
3939 return;
800eeca4 3940 }
e0c9811a
JW		 3941
3942 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3943 {
3944 as_bad ("Second operand to .spillreg must be a register");
3945 return;
3946 }
3947
3948 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3949}
3950
3951static void
3952dot_spillmem (psprel)
3953 int psprel;
3954{
3955 expressionS e1, e2;
2132e3a3
AM		 3956 int sep;
3957 unsigned int ab, reg;
e0c9811a 3958
75e09913
JB		 3959 if (!in_procedure ("spillmem"))
3960 return;
3961
e0c9811a
JW		 3962 sep = parse_operand (&e1);
3963 if (sep != ',')
3964 {
3965 as_bad ("Second operand missing");
3966 return;
3967 }
3968
3969 parse_operand (&e2);
3970
3971 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
3972 {
3973 as_bad ("First operand to .spill%s must be a preserved register",
3974 psprel ? "psp" : "sp");
3975 return;
3976 }
3977
3978 if (e2.X_op != O_constant)
3979 {
3980 as_bad ("Second operand to .spill%s must be a constant",
3981 psprel ? "psp" : "sp");
3982 return;
3983 }
3984
3985 if (psprel)
3986 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3987 else
3988 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3989}
3990
3991static void
3992dot_spillreg_p (dummy)
2434f565 3993 int dummy ATTRIBUTE_UNUSED;
e0c9811a 3994{
2132e3a3
AM		 3995 int sep;
3996 unsigned int ab, xy, reg, treg;
e0c9811a
JW		 3997 expressionS e1, e2, e3;
3998 unsigned int qp;
3999
75e09913
JB		 4000 if (!in_procedure ("spillreg.p"))
4001 return;
4002
e0c9811a
JW		 4003 sep = parse_operand (&e1);
4004 if (sep != ',')
4005 {
4006 as_bad ("No second and third operand to .spillreg.p");
4007 return;
4008 }
4009
4010 sep = parse_operand (&e2);
4011 if (sep != ',')
4012 {
4013 as_bad ("No third operand to .spillreg.p");
4014 return;
4015 }
4016
4017 parse_operand (&e3);
4018
4019 qp = e1.X_add_number - REG_P;
4020
4021 if (e1.X_op != O_register || qp > 63)
4022 {
4023 as_bad ("First operand to .spillreg.p must be a predicate");
4024 return;
4025 }
4026
4027 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4028 {
4029 as_bad ("Second operand to .spillreg.p must be a preserved register");
4030 return;
4031 }
4032
4033 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4034 {
4035 as_bad ("Third operand to .spillreg.p must be a register");
4036 return;
4037 }
4038
4039 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4040}
4041
4042static void
4043dot_spillmem_p (psprel)
4044 int psprel;
4045{
4046 expressionS e1, e2, e3;
2132e3a3
AM		 4047 int sep;
4048 unsigned int ab, reg;
e0c9811a
JW		 4049 unsigned int qp;
4050
75e09913
JB		 4051 if (!in_procedure ("spillmem.p"))
4052 return;
4053
e0c9811a
JW		 4054 sep = parse_operand (&e1);
4055 if (sep != ',')
4056 {
4057 as_bad ("Second operand missing");
4058 return;
4059 }
4060
4061 parse_operand (&e2);
4062 if (sep != ',')
4063 {
4064 as_bad ("Second operand missing");
4065 return;
4066 }
4067
4068 parse_operand (&e3);
4069
4070 qp = e1.X_add_number - REG_P;
4071 if (e1.X_op != O_register || qp > 63)
4072 {
4073 as_bad ("First operand to .spill%s_p must be a predicate",
4074 psprel ? "psp" : "sp");
4075 return;
4076 }
4077
4078 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4079 {
4080 as_bad ("Second operand to .spill%s_p must be a preserved register",
4081 psprel ? "psp" : "sp");
4082 return;
4083 }
4084
4085 if (e3.X_op != O_constant)
4086 {
4087 as_bad ("Third operand to .spill%s_p must be a constant",
4088 psprel ? "psp" : "sp");
4089 return;
4090 }
4091
4092 if (psprel)
fa7fda74 4093 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a 4094 else
fa7fda74 4095 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a
JW		 4096}
4097
6290819d
NC		 4098static unsigned int
4099get_saved_prologue_count (lbl)
4100 unsigned long lbl;
4101{
4102 label_prologue_count *lpc = unwind.saved_prologue_counts;
4103
4104 while (lpc != NULL && lpc->label_number != lbl)
4105 lpc = lpc->next;
4106
4107 if (lpc != NULL)
4108 return lpc->prologue_count;
4109
4110 as_bad ("Missing .label_state %ld", lbl);
4111 return 1;
4112}
4113
4114static void
4115save_prologue_count (lbl, count)
4116 unsigned long lbl;
4117 unsigned int count;
4118{
4119 label_prologue_count *lpc = unwind.saved_prologue_counts;
4120
4121 while (lpc != NULL && lpc->label_number != lbl)
4122 lpc = lpc->next;
4123
4124 if (lpc != NULL)
4125 lpc->prologue_count = count;
4126 else
4127 {
40449e9f 4128 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4129
4130 new_lpc->next = unwind.saved_prologue_counts;
4131 new_lpc->label_number = lbl;
4132 new_lpc->prologue_count = count;
4133 unwind.saved_prologue_counts = new_lpc;
4134 }
4135}
4136
4137static void
4138free_saved_prologue_counts ()
4139{
40449e9f
KH		 4140 label_prologue_count *lpc = unwind.saved_prologue_counts;
4141 label_prologue_count *next;
6290819d
NC		 4142
4143 while (lpc != NULL)
4144 {
4145 next = lpc->next;
4146 free (lpc);
4147 lpc = next;
4148 }
4149
4150 unwind.saved_prologue_counts = NULL;
4151}
4152
e0c9811a
JW		 4153static void
4154dot_label_state (dummy)
2434f565 4155 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4156{
4157 expressionS e;
4158
75e09913
JB		 4159 if (!in_body ("label_state"))
4160 return;
4161
e0c9811a
JW		 4162 parse_operand (&e);
4163 if (e.X_op != O_constant)
4164 {
4165 as_bad ("Operand to .label_state must be a constant");
4166 return;
4167 }
4168 add_unwind_entry (output_label_state (e.X_add_number));
6290819d 4169 save_prologue_count (e.X_add_number, unwind.prologue_count);
e0c9811a
JW		 4170}
4171
4172static void
4173dot_copy_state (dummy)
2434f565 4174 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4175{
4176 expressionS e;
4177
75e09913
JB		 4178 if (!in_body ("copy_state"))
4179 return;
4180
e0c9811a
JW		 4181 parse_operand (&e);
4182 if (e.X_op != O_constant)
4183 {
4184 as_bad ("Operand to .copy_state must be a constant");
4185 return;
4186 }
4187 add_unwind_entry (output_copy_state (e.X_add_number));
6290819d 4188 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
800eeca4
JW		 4189}
4190
197865e8 4191static void
800eeca4 4192dot_unwabi (dummy)
2434f565 4193 int dummy ATTRIBUTE_UNUSED;
800eeca4 4194{
e0c9811a
JW		 4195 expressionS e1, e2;
4196 unsigned char sep;
4197
75e09913
JB		 4198 if (!in_procedure ("unwabi"))
4199 return;
4200
e0c9811a
JW		 4201 sep = parse_operand (&e1);
4202 if (sep != ',')
4203 {
4204 as_bad ("Second operand to .unwabi missing");
4205 return;
4206 }
4207 sep = parse_operand (&e2);
4208 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4209 demand_empty_rest_of_line ();
e0c9811a
JW		 4210
4211 if (e1.X_op != O_constant)
4212 {
4213 as_bad ("First operand to .unwabi must be a constant");
4214 return;
4215 }
4216
4217 if (e2.X_op != O_constant)
4218 {
4219 as_bad ("Second operand to .unwabi must be a constant");
4220 return;
4221 }
4222
4223 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
800eeca4
JW		 4224}
4225
197865e8 4226static void
800eeca4 4227dot_personality (dummy)
2434f565 4228 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4229{
4230 char *name, *p, c;
75e09913
JB		 4231 if (!in_procedure ("personality"))
4232 return;
800eeca4
JW		 4233 SKIP_WHITESPACE ();
4234 name = input_line_pointer;
4235 c = get_symbol_end ();
4236 p = input_line_pointer;
e0c9811a 4237 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4238 unwind.force_unwind_entry = 1;
800eeca4
JW		 4239 *p = c;
4240 SKIP_WHITESPACE ();
4241 demand_empty_rest_of_line ();
4242}
4243
4244static void
4245dot_proc (dummy)
2434f565 4246 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4247{
4248 char *name, *p, c;
4249 symbolS *sym;
4250
75e09913 4251 unwind.proc_start = 0;
e0c9811a 4252 /* Parse names of main and alternate entry points and mark them as
542d6675 4253 function symbols: */
800eeca4
JW		 4254 while (1)
4255 {
4256 SKIP_WHITESPACE ();
4257 name = input_line_pointer;
4258 c = get_symbol_end ();
4259 p = input_line_pointer;
75e09913
JB		 4260 if (!*name)
4261 as_bad ("Empty argument of .proc");
4262 else
542d6675 4263 {
75e09913
JB		 4264 sym = symbol_find_or_make (name);
4265 if (S_IS_DEFINED (sym))
4266 as_bad ("`%s' was already defined", name);
4267 else if (unwind.proc_start == 0)
4268 {
4269 unwind.proc_start = sym;
4270 }
4271 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4272 }
800eeca4
JW		 4273 *p = c;
4274 SKIP_WHITESPACE ();
4275 if (*input_line_pointer != ',')
4276 break;
4277 ++input_line_pointer;
4278 }
75e09913
JB		 4279 if (unwind.proc_start == 0)
4280 unwind.proc_start = expr_build_dot ();
800eeca4
JW		 4281 demand_empty_rest_of_line ();
4282 ia64_do_align (16);
4283
75e09913 4284 unwind.prologue = 0;
33d01f33 4285 unwind.prologue_count = 0;
75e09913
JB		 4286 unwind.body = 0;
4287 unwind.insn = 0;
e0c9811a
JW		 4288 unwind.list = unwind.tail = unwind.current_entry = NULL;
4289 unwind.personality_routine = 0;
800eeca4
JW		 4290}
4291
4292static void
4293dot_body (dummy)
2434f565 4294 int dummy ATTRIBUTE_UNUSED;
800eeca4 4295{
75e09913
JB		 4296 if (!in_procedure ("body"))
4297 return;
4298 if (!unwind.prologue && !unwind.body && unwind.insn)
4299 as_warn ("Initial .body should precede any instructions");
4300
e0c9811a 4301 unwind.prologue = 0;
30d25259 4302 unwind.prologue_mask = 0;
75e09913 4303 unwind.body = 1;
30d25259 4304
800eeca4 4305 add_unwind_entry (output_body ());
e0c9811a 4306 demand_empty_rest_of_line ();
800eeca4
JW		 4307}
4308
4309static void
4310dot_prologue (dummy)
2434f565 4311 int dummy ATTRIBUTE_UNUSED;
800eeca4 4312{
e0c9811a 4313 unsigned char sep;
2434f565 4314 int mask = 0, grsave = 0;
e0c9811a 4315
75e09913
JB		 4316 if (!in_procedure ("prologue"))
4317 return;
4318 if (unwind.prologue)
4319 {
4320 as_bad (".prologue within prologue");
4321 ignore_rest_of_line ();
4322 return;
4323 }
4324 if (!unwind.body && unwind.insn)
4325 as_warn ("Initial .prologue should precede any instructions");
4326
e0c9811a 4327 if (!is_it_end_of_statement ())
800eeca4
JW		 4328 {
4329 expressionS e1, e2;
800eeca4
JW		 4330 sep = parse_operand (&e1);
4331 if (sep != ',')
4332 as_bad ("No second operand to .prologue");
4333 sep = parse_operand (&e2);
e0c9811a 4334 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4335 demand_empty_rest_of_line ();
800eeca4
JW		 4336
4337 if (e1.X_op == O_constant)
542d6675 4338 {
30d25259
RH		 4339 mask = e1.X_add_number;
4340
800eeca4 4341 if (e2.X_op == O_constant)
30d25259
RH		 4342 grsave = e2.X_add_number;
4343 else if (e2.X_op == O_register
4344 && (grsave = e2.X_add_number - REG_GR) < 128)
4345 ;
800eeca4 4346 else
30d25259
RH		 4347 as_bad ("Second operand not a constant or general register");
4348
4349 add_unwind_entry (output_prologue_gr (mask, grsave));
800eeca4
JW		 4350 }
4351 else
4352 as_bad ("First operand not a constant");
4353 }
4354 else
4355 add_unwind_entry (output_prologue ());
30d25259
RH		 4356
4357 unwind.prologue = 1;
4358 unwind.prologue_mask = mask;
75e09913 4359 unwind.body = 0;
33d01f33 4360 ++unwind.prologue_count;
800eeca4
JW		 4361}
4362
4363static void
4364dot_endp (dummy)
2434f565 4365 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4366{
4367 expressionS e;
2132e3a3 4368 char *ptr;
44f5c83a 4369 int bytes_per_address;
800eeca4
JW		 4370 long where;
4371 segT saved_seg;
4372 subsegT saved_subseg;
970d6792 4373 char *name, *default_name, *p, c;
c538998c 4374 symbolS *sym;
970d6792 4375 int unwind_check = md.unwind_check;
800eeca4 4376
970d6792 4377 md.unwind_check = unwind_check_error;
75e09913
JB		 4378 if (!in_procedure ("endp"))
4379 return;
970d6792 4380 md.unwind_check = unwind_check;
75e09913 4381
91a2ae2a
RH		 4382 if (unwind.saved_text_seg)
4383 {
4384 saved_seg = unwind.saved_text_seg;
4385 saved_subseg = unwind.saved_text_subseg;
4386 unwind.saved_text_seg = NULL;
4387 }
4388 else
4389 {
4390 saved_seg = now_seg;
4391 saved_subseg = now_subseg;
4392 }
4393
800eeca4 4394 insn_group_break (1, 0, 0);
800eeca4 4395
91a2ae2a
RH		 4396 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4397 if (!unwind.info)
2d6ed997 4398 generate_unwind_image (saved_seg);
800eeca4 4399
91a2ae2a
RH		 4400 if (unwind.info || unwind.force_unwind_entry)
4401 {
75e09913
JB		 4402 symbolS *proc_end;
4403
91a2ae2a 4404 subseg_set (md.last_text_seg, 0);
75e09913 4405 proc_end = expr_build_dot ();
5e7474a7 4406
d6afba4b 4407 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
5e7474a7 4408
557debba
JW		 4409 /* Make sure that section has 4 byte alignment for ILP32 and
4410 8 byte alignment for LP64. */
4411 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4412
557debba
JW		 4413 /* Need space for 3 pointers for procedure start, procedure end,
4414 and unwind info. */
4415 ptr = frag_more (3 * md.pointer_size);
4416 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4417 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4418
40449e9f 4419 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4420 e.X_op = O_pseudo_fixup;
4421 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4422 e.X_add_number = 0;
4423 e.X_add_symbol = unwind.proc_start;
4424 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4425
800eeca4
JW		 4426 e.X_op = O_pseudo_fixup;
4427 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4428 e.X_add_number = 0;
75e09913 4429 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4430 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4431 bytes_per_address, &e);
4432
4433 if (unwind.info)
4434 {
4435 e.X_op = O_pseudo_fixup;
4436 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4437 e.X_add_number = 0;
4438 e.X_add_symbol = unwind.info;
4439 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4440 bytes_per_address, &e);
4441 }
4442 else
4443 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4444 bytes_per_address);
800eeca4 4445
91a2ae2a 4446 }
d6afba4b
JJ		 4447 else
4448 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4449
800eeca4 4450 subseg_set (saved_seg, saved_subseg);
c538998c 4451
970d6792
L		 4452 if (unwind.proc_start)
4453 default_name = (char *) S_GET_NAME (unwind.proc_start);
4454 else
4455 default_name = NULL;
4456
c538998c
JJ		 4457 /* Parse names of main and alternate entry points and set symbol sizes. */
4458 while (1)
4459 {
4460 SKIP_WHITESPACE ();
4461 name = input_line_pointer;
4462 c = get_symbol_end ();
4463 p = input_line_pointer;
75e09913 4464 if (!*name)
970d6792
L		 4465 {
4466 if (md.unwind_check == unwind_check_warning)
4467 {
4468 if (default_name)
4469 {
4470 as_warn ("Empty argument of .endp. Use the default name `%s'",
4471 default_name);
4472 name = default_name;
4473 }
4474 else
4475 as_warn ("Empty argument of .endp");
4476 }
4477 else
4478 as_bad ("Empty argument of .endp");
4479 }
4480 if (*name)
75e09913
JB		 4481 {
4482 sym = symbol_find (name);
970d6792
L		 4483 if (!sym
4484 && md.unwind_check == unwind_check_warning
4485 && default_name
4486 && default_name != name)
4487 {
4488 /* We have a bad name. Try the default one if needed. */
4489 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4490 name, default_name);
4491 name = default_name;
4492 sym = symbol_find (name);
4493 }
75e09913
JB		 4494 if (!sym || !S_IS_DEFINED (sym))
4495 as_bad ("`%s' was not defined within procedure", name);
4496 else if (unwind.proc_start
4497 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4498 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4499 {
4500 fragS *fr = symbol_get_frag (unwind.proc_start);
4501 fragS *frag = symbol_get_frag (sym);
4502
4503 /* Check whether the function label is at or beyond last
4504 .proc directive. */
4505 while (fr && fr != frag)
4506 fr = fr->fr_next;
4507 if (fr)
c538998c 4508 {
75e09913
JB		 4509 if (frag == frag_now && SEG_NORMAL (now_seg))
4510 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4511 else
4512 {
4513 symbol_get_obj (sym)->size =
4514 (expressionS *) xmalloc (sizeof (expressionS));
4515 symbol_get_obj (sym)->size->X_op = O_subtract;
4516 symbol_get_obj (sym)->size->X_add_symbol
4517 = symbol_new (FAKE_LABEL_NAME, now_seg,
4518 frag_now_fix (), frag_now);
4519 symbol_get_obj (sym)->size->X_op_symbol = sym;
4520 symbol_get_obj (sym)->size->X_add_number = 0;
4521 }
c538998c
JJ		 4522 }
4523 }
4524 }
4525 *p = c;
4526 SKIP_WHITESPACE ();
4527 if (*input_line_pointer != ',')
4528 break;
4529 ++input_line_pointer;
4530 }
4531 demand_empty_rest_of_line ();
75e09913 4532 unwind.proc_start = unwind.info = 0;
800eeca4
JW		 4533}
4534
4535static void
4536dot_template (template)
4537 int template;
4538{
4539 CURR_SLOT.user_template = template;
4540}
4541
4542static void
4543dot_regstk (dummy)
2434f565 4544 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4545{
4546 int ins, locs, outs, rots;
4547
4548 if (is_it_end_of_statement ())
4549 ins = locs = outs = rots = 0;
4550 else
4551 {
4552 ins = get_absolute_expression ();
4553 if (*input_line_pointer++ != ',')
4554 goto err;
4555 locs = get_absolute_expression ();
4556 if (*input_line_pointer++ != ',')
4557 goto err;
4558 outs = get_absolute_expression ();
4559 if (*input_line_pointer++ != ',')
4560 goto err;
4561 rots = get_absolute_expression ();
4562 }
4563 set_regstack (ins, locs, outs, rots);
4564 return;
4565
4566 err:
4567 as_bad ("Comma expected");
4568 ignore_rest_of_line ();
4569}
4570
4571static void
4572dot_rot (type)
4573 int type;
4574{
4575 unsigned num_regs, num_alloced = 0;
4576 struct dynreg **drpp, *dr;
4577 int ch, base_reg = 0;
4578 char *name, *start;
4579 size_t len;
4580
4581 switch (type)
4582 {
4583 case DYNREG_GR: base_reg = REG_GR + 32; break;
4584 case DYNREG_FR: base_reg = REG_FR + 32; break;
4585 case DYNREG_PR: base_reg = REG_P + 16; break;
4586 default: break;
4587 }
4588
542d6675 4589 /* First, remove existing names from hash table. */
800eeca4
JW		 4590 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4591 {
4592 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4593 /* FIXME: Free dr->name. */
800eeca4
JW		 4594 dr->num_regs = 0;
4595 }
4596
4597 drpp = &md.dynreg[type];
4598 while (1)
4599 {
4600 start = input_line_pointer;
4601 ch = get_symbol_end ();
20b36a95 4602 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4603 *input_line_pointer = ch;
800eeca4
JW		 4604
4605 SKIP_WHITESPACE ();
4606 if (*input_line_pointer != '[')
4607 {
4608 as_bad ("Expected '['");
4609 goto err;
4610 }
4611 ++input_line_pointer; /* skip '[' */
4612
4613 num_regs = get_absolute_expression ();
4614
4615 if (*input_line_pointer++ != ']')
4616 {
4617 as_bad ("Expected ']'");
4618 goto err;
4619 }
4620 SKIP_WHITESPACE ();
4621
4622 num_alloced += num_regs;
4623 switch (type)
4624 {
4625 case DYNREG_GR:
4626 if (num_alloced > md.rot.num_regs)
4627 {
4628 as_bad ("Used more than the declared %d rotating registers",
4629 md.rot.num_regs);
4630 goto err;
4631 }
4632 break;
4633 case DYNREG_FR:
4634 if (num_alloced > 96)
4635 {
4636 as_bad ("Used more than the available 96 rotating registers");
4637 goto err;
4638 }
4639 break;
4640 case DYNREG_PR:
4641 if (num_alloced > 48)
4642 {
4643 as_bad ("Used more than the available 48 rotating registers");
4644 goto err;
4645 }
4646 break;
4647
4648 default:
4649 break;
4650 }
4651
800eeca4
JW		 4652 if (!*drpp)
4653 {
4654 *drpp = obstack_alloc (&notes, sizeof (*dr));
4655 memset (*drpp, 0, sizeof (*dr));
4656 }
4657
20b36a95
JB		 4658 name = obstack_alloc (&notes, len + 1);
4659 memcpy (name, start, len);
4660 name[len] = '\0';
4661
800eeca4
JW		 4662 dr = *drpp;
4663 dr->name = name;
4664 dr->num_regs = num_regs;
4665 dr->base = base_reg;
4666 drpp = &dr->next;
4667 base_reg += num_regs;
4668
4669 if (hash_insert (md.dynreg_hash, name, dr))
4670 {
4671 as_bad ("Attempt to redefine register set `%s'", name);
20b36a95 4672 obstack_free (&notes, name);
800eeca4
JW		 4673 goto err;
4674 }
4675
4676 if (*input_line_pointer != ',')
4677 break;
4678 ++input_line_pointer; /* skip comma */
4679 SKIP_WHITESPACE ();
4680 }
4681 demand_empty_rest_of_line ();
4682 return;
4683
4684 err:
4685 ignore_rest_of_line ();
4686}
4687
4688static void
4689dot_byteorder (byteorder)
4690 int byteorder;
4691{
10a98291
L		 4692 segment_info_type *seginfo = seg_info (now_seg);
4693
4694 if (byteorder == -1)
4695 {
4696 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4697 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4698 byteorder = seginfo->tc_segment_info_data.endian == 1;
4699 }
4700 else
4701 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4702
4703 if (target_big_endian != byteorder)
4704 {
4705 target_big_endian = byteorder;
4706 if (target_big_endian)
4707 {
4708 ia64_number_to_chars = number_to_chars_bigendian;
4709 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4710 }
4711 else
4712 {
4713 ia64_number_to_chars = number_to_chars_littleendian;
4714 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4715 }
4716 }
800eeca4
JW		 4717}
4718
4719static void
4720dot_psr (dummy)
2434f565 4721 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4722{
4723 char *option;
4724 int ch;
4725
4726 while (1)
4727 {
4728 option = input_line_pointer;
4729 ch = get_symbol_end ();
4730 if (strcmp (option, "lsb") == 0)
4731 md.flags &= ~EF_IA_64_BE;
4732 else if (strcmp (option, "msb") == 0)
4733 md.flags |= EF_IA_64_BE;
4734 else if (strcmp (option, "abi32") == 0)
4735 md.flags &= ~EF_IA_64_ABI64;
4736 else if (strcmp (option, "abi64") == 0)
4737 md.flags |= EF_IA_64_ABI64;
4738 else
4739 as_bad ("Unknown psr option `%s'", option);
4740 *input_line_pointer = ch;
4741
4742 SKIP_WHITESPACE ();
4743 if (*input_line_pointer != ',')
4744 break;
4745
4746 ++input_line_pointer;
4747 SKIP_WHITESPACE ();
4748 }
4749 demand_empty_rest_of_line ();
4750}
4751
800eeca4
JW		 4752static void
4753dot_ln (dummy)
2434f565 4754 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4755{
4756 new_logical_line (0, get_absolute_expression ());
4757 demand_empty_rest_of_line ();
4758}
4759
ef6a2b41
JB		 4760static void
4761cross_section (ref, cons, ua)
4762 int ref;
4763 void (*cons) PARAMS((int));
4764 int ua;
800eeca4 4765{
ef6a2b41
JB		 4766 char *start, *end;
4767 int saved_auto_align;
4768 unsigned int section_count;
800eeca4
JW		 4769
4770 SKIP_WHITESPACE ();
ef6a2b41
JB		 4771 start = input_line_pointer;
4772 if (*start == '"')
4773 {
4774 int len;
4775 char *name;
4776
b3f19c14 4777 name = demand_copy_C_string (&len);
ef6a2b41
JB		 4778 obstack_free(&notes, name);
4779 if (!name)
4780 {
4781 ignore_rest_of_line ();
4782 return;
4783 }
4784 }
b3f19c14 4785 else
800eeca4 4786 {
b3f19c14
JB		 4787 char c = get_symbol_end ();
4788
4789 if (input_line_pointer == start)
4790 {
4791 as_bad ("Missing section name");
4792 ignore_rest_of_line ();
ef6a2b41 4793 return;
b3f19c14 4794 }
b3f19c14 4795 *input_line_pointer = c;
800eeca4 4796 }
ef6a2b41 4797 end = input_line_pointer;
800eeca4
JW		 4798 SKIP_WHITESPACE ();
4799 if (*input_line_pointer != ',')
4800 {
4801 as_bad ("Comma expected after section name");
4802 ignore_rest_of_line ();
ef6a2b41 4803 return;
800eeca4 4804 }
ef6a2b41
JB		 4805 *end = '\0';
4806 end = input_line_pointer + 1; /* skip comma */
4807 input_line_pointer = start;
4808 md.keep_pending_output = 1;
4809 section_count = bfd_count_sections(stdoutput);
4810 obj_elf_section (0);
4811 if (section_count != bfd_count_sections(stdoutput))
4812 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4813 input_line_pointer = end;
4814 saved_auto_align = md.auto_align;
4815 if (ua)
4816 md.auto_align = 0;
4817 (*cons) (ref);
4818 if (ua)
4819 md.auto_align = saved_auto_align;
4820 obj_elf_previous (0);
4821 md.keep_pending_output = 0;
800eeca4
JW		 4822}
4823
4824static void
4825dot_xdata (size)
4826 int size;
4827{
ef6a2b41 4828 cross_section (size, cons, 0);
800eeca4
JW		 4829}
4830
4831/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 4832
800eeca4
JW		 4833static void
4834stmt_float_cons (kind)
4835 int kind;
4836{
165a7f90 4837 size_t alignment;
800eeca4
JW		 4838
4839 switch (kind)
4840 {
165a7f90
L		 4841 case 'd':
4842 alignment = 8;
4843 break;
4844
4845 case 'x':
4846 case 'X':
4847 alignment = 16;
4848 break;
800eeca4
JW		 4849
4850 case 'f':
4851 default:
165a7f90 4852 alignment = 4;
800eeca4
JW		 4853 break;
4854 }
165a7f90 4855 ia64_do_align (alignment);
800eeca4
JW		 4856 float_cons (kind);
4857}
4858
4859static void
4860stmt_cons_ua (size)
4861 int size;
4862{
4863 int saved_auto_align = md.auto_align;
4864
4865 md.auto_align = 0;
4866 cons (size);
4867 md.auto_align = saved_auto_align;
4868}
4869
4870static void
4871dot_xfloat_cons (kind)
4872 int kind;
4873{
ef6a2b41 4874 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 4875}
4876
4877static void
4878dot_xstringer (zero)
4879 int zero;
4880{
ef6a2b41 4881 cross_section (zero, stringer, 0);
800eeca4
JW		 4882}
4883
4884static void
4885dot_xdata_ua (size)
4886 int size;
4887{
ef6a2b41 4888 cross_section (size, cons, 1);
800eeca4
JW		 4889}
4890
4891static void
4892dot_xfloat_cons_ua (kind)
4893 int kind;
4894{
ef6a2b41 4895 cross_section (kind, float_cons, 1);
800eeca4
JW		 4896}
4897
4898/* .reg.val <regname>,value */
542d6675 4899
800eeca4
JW		 4900static void
4901dot_reg_val (dummy)
2434f565 4902 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4903{
4904 expressionS reg;
4905
4906 expression (&reg);
4907 if (reg.X_op != O_register)
4908 {
4909 as_bad (_("Register name expected"));
4910 ignore_rest_of_line ();
4911 }
4912 else if (*input_line_pointer++ != ',')
4913 {
4914 as_bad (_("Comma expected"));
4915 ignore_rest_of_line ();
4916 }
197865e8 4917 else
800eeca4
JW		 4918 {
4919 valueT value = get_absolute_expression ();
4920 int regno = reg.X_add_number;
a66d2bb7 4921 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 4922 as_warn (_("Register value annotation ignored"));
800eeca4 4923 else
542d6675
KH		 4924 {
4925 gr_values[regno - REG_GR].known = 1;
4926 gr_values[regno - REG_GR].value = value;
4927 gr_values[regno - REG_GR].path = md.path;
4928 }
800eeca4
JW		 4929 }
4930 demand_empty_rest_of_line ();
4931}
4932
5e819f9c
JW		 4933/*
4934 .serialize.data
4935 .serialize.instruction
4936 */
4937static void
4938dot_serialize (type)
4939 int type;
4940{
4941 insn_group_break (0, 0, 0);
4942 if (type)
4943 instruction_serialization ();
4944 else
4945 data_serialization ();
4946 insn_group_break (0, 0, 0);
4947 demand_empty_rest_of_line ();
4948}
4949
197865e8 4950/* select dv checking mode
800eeca4
JW		 4951 .auto
4952 .explicit
4953 .default
4954
197865e8 4955 A stop is inserted when changing modes
800eeca4 4956 */
542d6675 4957
800eeca4
JW		 4958static void
4959dot_dv_mode (type)
542d6675 4960 int type;
800eeca4
JW		 4961{
4962 if (md.manual_bundling)
4963 as_warn (_("Directive invalid within a bundle"));
4964
4965 if (type == 'E' || type == 'A')
4966 md.mode_explicitly_set = 0;
4967 else
4968 md.mode_explicitly_set = 1;
4969
4970 md.detect_dv = 1;
4971 switch (type)
4972 {
4973 case 'A':
4974 case 'a':
4975 if (md.explicit_mode)
542d6675 4976 insn_group_break (1, 0, 0);
800eeca4
JW		 4977 md.explicit_mode = 0;
4978 break;
4979 case 'E':
4980 case 'e':
4981 if (!md.explicit_mode)
542d6675 4982 insn_group_break (1, 0, 0);
800eeca4
JW		 4983 md.explicit_mode = 1;
4984 break;
4985 default:
4986 case 'd':
4987 if (md.explicit_mode != md.default_explicit_mode)
542d6675 4988 insn_group_break (1, 0, 0);
800eeca4
JW		 4989 md.explicit_mode = md.default_explicit_mode;
4990 md.mode_explicitly_set = 0;
4991 break;
4992 }
4993}
4994
4995static void
4996print_prmask (mask)
542d6675 4997 valueT mask;
800eeca4
JW		 4998{
4999 int regno;
5000 char *comma = "";
542d6675 5001 for (regno = 0; regno < 64; regno++)
800eeca4 5002 {
542d6675
KH		 5003 if (mask & ((valueT) 1 << regno))
5004 {
5005 fprintf (stderr, "%s p%d", comma, regno);
5006 comma = ",";
5007 }
800eeca4
JW		 5008 }
5009}
5010
5011/*
05ee4b0f
JB		 5012 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5013 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5014 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5015 .pred.safe_across_calls p1 [, p2 [,...]]
5016 */
542d6675 5017
800eeca4
JW		 5018static void
5019dot_pred_rel (type)
542d6675 5020 int type;
800eeca4
JW		 5021{
5022 valueT mask = 0;
5023 int count = 0;
5024 int p1 = -1, p2 = -1;
5025
5026 if (type == 0)
5027 {
05ee4b0f 5028 if (*input_line_pointer == '"')
542d6675
KH		 5029 {
5030 int len;
5031 char *form = demand_copy_C_string (&len);
05ee4b0f 5032
542d6675
KH		 5033 if (strcmp (form, "mutex") == 0)
5034 type = 'm';
5035 else if (strcmp (form, "clear") == 0)
5036 type = 'c';
5037 else if (strcmp (form, "imply") == 0)
5038 type = 'i';
05ee4b0f
JB		 5039 obstack_free (&notes, form);
5040 }
5041 else if (*input_line_pointer == '@')
5042 {
5043 char *form = ++input_line_pointer;
5044 char c = get_symbol_end();
5045
5046 if (strcmp (form, "mutex") == 0)
5047 type = 'm';
5048 else if (strcmp (form, "clear") == 0)
5049 type = 'c';
5050 else if (strcmp (form, "imply") == 0)
5051 type = 'i';
5052 *input_line_pointer = c;
5053 }
5054 else
5055 {
5056 as_bad (_("Missing predicate relation type"));
5057 ignore_rest_of_line ();
5058 return;
5059 }
5060 if (type == 0)
5061 {
5062 as_bad (_("Unrecognized predicate relation type"));
5063 ignore_rest_of_line ();
5064 return;
542d6675 5065 }
800eeca4 5066 if (*input_line_pointer == ',')
542d6675 5067 ++input_line_pointer;
800eeca4
JW		 5068 SKIP_WHITESPACE ();
5069 }
5070
5071 SKIP_WHITESPACE ();
5072 while (1)
5073 {
20b36a95 5074 valueT bits = 1;
800eeca4 5075 int regno;
20b36a95
JB		 5076 expressionS pr, *pr1, *pr2;
5077
5078 expression (&pr);
5079 if (pr.X_op == O_register
5080 && pr.X_add_number >= REG_P
5081 && pr.X_add_number <= REG_P + 63)
5082 {
5083 regno = pr.X_add_number - REG_P;
5084 bits <<= regno;
5085 count++;
5086 if (p1 == -1)
5087 p1 = regno;
5088 else if (p2 == -1)
5089 p2 = regno;
5090 }
5091 else if (type != 'i'
5092 && pr.X_op == O_subtract
5093 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5094 && pr1->X_op == O_register
5095 && pr1->X_add_number >= REG_P
5096 && pr1->X_add_number <= REG_P + 63
5097 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5098 && pr2->X_op == O_register
5099 && pr2->X_add_number >= REG_P
5100 && pr2->X_add_number <= REG_P + 63)
5101 {
5102 /* It's a range. */
5103 int stop;
5104
5105 regno = pr1->X_add_number - REG_P;
5106 stop = pr2->X_add_number - REG_P;
5107 if (regno >= stop)
542d6675
KH		 5108 {
5109 as_bad (_("Bad register range"));
5110 ignore_rest_of_line ();
5111 return;
5112 }
20b36a95
JB		 5113 bits = ((bits << stop) << 1) - (bits << regno);
5114 count += stop - regno + 1;
5115 }
5116 else
5117 {
5118 as_bad (_("Predicate register expected"));
5119 ignore_rest_of_line ();
5120 return;
542d6675 5121 }
20b36a95
JB		 5122 if (mask & bits)
5123 as_warn (_("Duplicate predicate register ignored"));
5124 mask |= bits;
800eeca4 5125 if (*input_line_pointer != ',')
542d6675 5126 break;
800eeca4
JW		 5127 ++input_line_pointer;
5128 SKIP_WHITESPACE ();
5129 }
5130
5131 switch (type)
5132 {
5133 case 'c':
5134 if (count == 0)
542d6675 5135 mask = ~(valueT) 0;
800eeca4 5136 clear_qp_mutex (mask);
197865e8 5137 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5138 break;
5139 case 'i':
5140 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5141 as_bad (_("Predicate source and target required"));
800eeca4 5142 else if (p1 == 0 || p2 == 0)
542d6675 5143 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5144 else
542d6675 5145 add_qp_imply (p1, p2);
800eeca4
JW		 5146 break;
5147 case 'm':
5148 if (count < 2)
542d6675
KH		 5149 {
5150 as_bad (_("At least two PR arguments expected"));
5151 break;
5152 }
800eeca4 5153 else if (mask & 1)
542d6675
KH		 5154 {
5155 as_bad (_("Use of p0 is not valid in this context"));
5156 break;
5157 }
800eeca4
JW		 5158 add_qp_mutex (mask);
5159 break;
5160 case 's':
5161 /* note that we don't override any existing relations */
5162 if (count == 0)
542d6675
KH		 5163 {
5164 as_bad (_("At least one PR argument expected"));
5165 break;
5166 }
800eeca4 5167 if (md.debug_dv)
542d6675
KH		 5168 {
5169 fprintf (stderr, "Safe across calls: ");
5170 print_prmask (mask);
5171 fprintf (stderr, "\n");
5172 }
800eeca4
JW		 5173 qp_safe_across_calls = mask;
5174 break;
5175 }
5176 demand_empty_rest_of_line ();
5177}
5178
5179/* .entry label [, label [, ...]]
5180 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5181 Otherwise, only global labels are considered entry points. */
5182
800eeca4
JW		 5183static void
5184dot_entry (dummy)
2434f565 5185 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5186{
5187 const char *err;
5188 char *name;
5189 int c;
5190 symbolS *symbolP;
5191
5192 do
5193 {
5194 name = input_line_pointer;
5195 c = get_symbol_end ();
5196 symbolP = symbol_find_or_make (name);
5197
5198 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5199 if (err)
542d6675
KH		 5200 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5201 name, err);
800eeca4
JW		 5202
5203 *input_line_pointer = c;
5204 SKIP_WHITESPACE ();
5205 c = *input_line_pointer;
5206 if (c == ',')
5207 {
5208 input_line_pointer++;
5209 SKIP_WHITESPACE ();
5210 if (*input_line_pointer == '\n')
5211 c = '\n';
5212 }
5213 }
5214 while (c == ',');
5215
5216 demand_empty_rest_of_line ();
5217}
5218
197865e8 5219/* .mem.offset offset, base
542d6675
KH		 5220 "base" is used to distinguish between offsets from a different base. */
5221
800eeca4
JW		 5222static void
5223dot_mem_offset (dummy)
2434f565 5224 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5225{
5226 md.mem_offset.hint = 1;
5227 md.mem_offset.offset = get_absolute_expression ();
5228 if (*input_line_pointer != ',')
5229 {
5230 as_bad (_("Comma expected"));
5231 ignore_rest_of_line ();
5232 return;
5233 }
5234 ++input_line_pointer;
5235 md.mem_offset.base = get_absolute_expression ();
5236 demand_empty_rest_of_line ();
5237}
5238
542d6675 5239/* ia64-specific pseudo-ops: */
800eeca4
JW		 5240const pseudo_typeS md_pseudo_table[] =
5241 {
5242 { "radix", dot_radix, 0 },
5243 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5244 { "loc", dot_loc, 0 },
800eeca4
JW		 5245 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5246 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5247 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5248 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5249 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5250 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5251 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5252 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5253 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5254 { "proc", dot_proc, 0 },
5255 { "body", dot_body, 0 },
5256 { "prologue", dot_prologue, 0 },
2434f565 5257 { "endp", dot_endp, 0 },
2434f565
JW		 5258
5259 { "fframe", dot_fframe, 0 },
5260 { "vframe", dot_vframe, 0 },
5261 { "vframesp", dot_vframesp, 0 },
5262 { "vframepsp", dot_vframepsp, 0 },
5263 { "save", dot_save, 0 },
5264 { "restore", dot_restore, 0 },
5265 { "restorereg", dot_restorereg, 0 },
5266 { "restorereg.p", dot_restorereg_p, 0 },
5267 { "handlerdata", dot_handlerdata, 0 },
5268 { "unwentry", dot_unwentry, 0 },
5269 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5270 { "savesp", dot_savemem, 0 },
5271 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5272 { "save.g", dot_saveg, 0 },
5273 { "save.f", dot_savef, 0 },
5274 { "save.b", dot_saveb, 0 },
5275 { "save.gf", dot_savegf, 0 },
5276 { "spill", dot_spill, 0 },
5277 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5278 { "spillsp", dot_spillmem, 0 },
5279 { "spillpsp", dot_spillmem, 1 },
2434f565 5280 { "spillreg.p", dot_spillreg_p, 0 },
e0c9811a
JW		 5281 { "spillsp.p", dot_spillmem_p, 0 },
5282 { "spillpsp.p", dot_spillmem_p, 1 },
2434f565
JW		 5283 { "label_state", dot_label_state, 0 },
5284 { "copy_state", dot_copy_state, 0 },
5285 { "unwabi", dot_unwabi, 0 },
5286 { "personality", dot_personality, 0 },
800eeca4
JW		 5287 { "mii", dot_template, 0x0 },
5288 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5289 { "mlx", dot_template, 0x2 },
5290 { "mmi", dot_template, 0x4 },
5291 { "mfi", dot_template, 0x6 },
5292 { "mmf", dot_template, 0x7 },
5293 { "mib", dot_template, 0x8 },
5294 { "mbb", dot_template, 0x9 },
5295 { "bbb", dot_template, 0xb },
5296 { "mmb", dot_template, 0xc },
5297 { "mfb", dot_template, 0xe },
d9201763 5298 { "align", dot_align, 0 },
800eeca4
JW		 5299 { "regstk", dot_regstk, 0 },
5300 { "rotr", dot_rot, DYNREG_GR },
5301 { "rotf", dot_rot, DYNREG_FR },
5302 { "rotp", dot_rot, DYNREG_PR },
5303 { "lsb", dot_byteorder, 0 },
5304 { "msb", dot_byteorder, 1 },
5305 { "psr", dot_psr, 0 },
5306 { "alias", dot_alias, 0 },
35f5df7f 5307 { "secalias", dot_alias, 1 },
800eeca4
JW		 5308 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5309
5310 { "xdata1", dot_xdata, 1 },
5311 { "xdata2", dot_xdata, 2 },
5312 { "xdata4", dot_xdata, 4 },
5313 { "xdata8", dot_xdata, 8 },
b3f19c14 5314 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5315 { "xreal4", dot_xfloat_cons, 'f' },
5316 { "xreal8", dot_xfloat_cons, 'd' },
5317 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5318 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5319 { "xstring", dot_xstringer, 0 },
5320 { "xstringz", dot_xstringer, 1 },
5321
542d6675 5322 /* unaligned versions: */
800eeca4
JW		 5323 { "xdata2.ua", dot_xdata_ua, 2 },
5324 { "xdata4.ua", dot_xdata_ua, 4 },
5325 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5326 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5327 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5328 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5329 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5330 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5331
5332 /* annotations/DV checking support */
5333 { "entry", dot_entry, 0 },
2434f565 5334 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5335 { "pred.rel", dot_pred_rel, 0 },
5336 { "pred.rel.clear", dot_pred_rel, 'c' },
5337 { "pred.rel.imply", dot_pred_rel, 'i' },
5338 { "pred.rel.mutex", dot_pred_rel, 'm' },
5339 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5340 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5341 { "serialize.data", dot_serialize, 0 },
5342 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5343 { "auto", dot_dv_mode, 'a' },
5344 { "explicit", dot_dv_mode, 'e' },
5345 { "default", dot_dv_mode, 'd' },
5346
87885043
JW		 5347 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5348 IA-64 aligns data allocation pseudo-ops by default, so we have to
5349 tell it that these ones are supposed to be unaligned. Long term,
5350 should rewrite so that only IA-64 specific data allocation pseudo-ops
5351 are aligned by default. */
5352 {"2byte", stmt_cons_ua, 2},
5353 {"4byte", stmt_cons_ua, 4},
5354 {"8byte", stmt_cons_ua, 8},
5355
800eeca4
JW		 5356 { NULL, 0, 0 }
5357 };
5358
5359static const struct pseudo_opcode
5360 {
5361 const char *name;
5362 void (*handler) (int);
5363 int arg;
5364 }
5365pseudo_opcode[] =
5366 {
5367 /* these are more like pseudo-ops, but don't start with a dot */
5368 { "data1", cons, 1 },
5369 { "data2", cons, 2 },
5370 { "data4", cons, 4 },
5371 { "data8", cons, 8 },
3969b680 5372 { "data16", cons, 16 },
800eeca4
JW		 5373 { "real4", stmt_float_cons, 'f' },
5374 { "real8", stmt_float_cons, 'd' },
5375 { "real10", stmt_float_cons, 'x' },
165a7f90 5376 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5377 { "string", stringer, 0 },
5378 { "stringz", stringer, 1 },
5379
542d6675 5380 /* unaligned versions: */
800eeca4
JW		 5381 { "data2.ua", stmt_cons_ua, 2 },
5382 { "data4.ua", stmt_cons_ua, 4 },
5383 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5384 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5385 { "real4.ua", float_cons, 'f' },
5386 { "real8.ua", float_cons, 'd' },
5387 { "real10.ua", float_cons, 'x' },
165a7f90 5388 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5389 };
5390
5391/* Declare a register by creating a symbol for it and entering it in
5392 the symbol table. */
542d6675
KH		 5393
5394static symbolS *
800eeca4
JW		 5395declare_register (name, regnum)
5396 const char *name;
5397 int regnum;
5398{
5399 const char *err;
5400 symbolS *sym;
5401
5402 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5403
5404 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5405 if (err)
5406 as_fatal ("Inserting \"%s\" into register table failed: %s",
5407 name, err);
5408
5409 return sym;
5410}
5411
5412static void
5413declare_register_set (prefix, num_regs, base_regnum)
5414 const char *prefix;
5415 int num_regs;
5416 int base_regnum;
5417{
5418 char name[8];
5419 int i;
5420
5421 for (i = 0; i < num_regs; ++i)
5422 {
5423 sprintf (name, "%s%u", prefix, i);
5424 declare_register (name, base_regnum + i);
5425 }
5426}
5427
5428static unsigned int
5429operand_width (opnd)
5430 enum ia64_opnd opnd;
5431{
5432 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5433 unsigned int bits = 0;
5434 int i;
5435
5436 bits = 0;
5437 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5438 bits += odesc->field[i].bits;
5439
5440 return bits;
5441}
5442
87f8eb97 5443static enum operand_match_result
800eeca4
JW		 5444operand_match (idesc, index, e)
5445 const struct ia64_opcode *idesc;
5446 int index;
5447 expressionS *e;
5448{
5449 enum ia64_opnd opnd = idesc->operands[index];
5450 int bits, relocatable = 0;
5451 struct insn_fix *fix;
5452 bfd_signed_vma val;
5453
5454 switch (opnd)
5455 {
542d6675 5456 /* constants: */
800eeca4
JW		 5457
5458 case IA64_OPND_AR_CCV:
5459 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5460 return OPERAND_MATCH;
800eeca4
JW		 5461 break;
5462
c10d9d8f
JW		 5463 case IA64_OPND_AR_CSD:
5464 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5465 return OPERAND_MATCH;
5466 break;
5467
800eeca4
JW		 5468 case IA64_OPND_AR_PFS:
5469 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5470 return OPERAND_MATCH;
800eeca4
JW		 5471 break;
5472
5473 case IA64_OPND_GR0:
5474 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5475 return OPERAND_MATCH;
800eeca4
JW		 5476 break;
5477
5478 case IA64_OPND_IP:
5479 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5480 return OPERAND_MATCH;
800eeca4
JW		 5481 break;
5482
5483 case IA64_OPND_PR:
5484 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5485 return OPERAND_MATCH;
800eeca4
JW		 5486 break;
5487
5488 case IA64_OPND_PR_ROT:
5489 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5490 return OPERAND_MATCH;
800eeca4
JW		 5491 break;
5492
5493 case IA64_OPND_PSR:
5494 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5495 return OPERAND_MATCH;
800eeca4
JW		 5496 break;
5497
5498 case IA64_OPND_PSR_L:
5499 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5500 return OPERAND_MATCH;
800eeca4
JW		 5501 break;
5502
5503 case IA64_OPND_PSR_UM:
5504 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5505 return OPERAND_MATCH;
800eeca4
JW		 5506 break;
5507
5508 case IA64_OPND_C1:
87f8eb97
JW		 5509 if (e->X_op == O_constant)
5510 {
5511 if (e->X_add_number == 1)
5512 return OPERAND_MATCH;
5513 else
5514 return OPERAND_OUT_OF_RANGE;
5515 }
800eeca4
JW		 5516 break;
5517
5518 case IA64_OPND_C8:
87f8eb97
JW		 5519 if (e->X_op == O_constant)
5520 {
5521 if (e->X_add_number == 8)
5522 return OPERAND_MATCH;
5523 else
5524 return OPERAND_OUT_OF_RANGE;
5525 }
800eeca4
JW		 5526 break;
5527
5528 case IA64_OPND_C16:
87f8eb97
JW		 5529 if (e->X_op == O_constant)
5530 {
5531 if (e->X_add_number == 16)
5532 return OPERAND_MATCH;
5533 else
5534 return OPERAND_OUT_OF_RANGE;
5535 }
800eeca4
JW		 5536 break;
5537
542d6675 5538 /* register operands: */
800eeca4
JW		 5539
5540 case IA64_OPND_AR3:
5541 if (e->X_op == O_register && e->X_add_number >= REG_AR
5542 && e->X_add_number < REG_AR + 128)
87f8eb97 5543 return OPERAND_MATCH;
800eeca4
JW		 5544 break;
5545
5546 case IA64_OPND_B1:
5547 case IA64_OPND_B2:
5548 if (e->X_op == O_register && e->X_add_number >= REG_BR
5549 && e->X_add_number < REG_BR + 8)
87f8eb97 5550 return OPERAND_MATCH;
800eeca4
JW		 5551 break;
5552
5553 case IA64_OPND_CR3:
5554 if (e->X_op == O_register && e->X_add_number >= REG_CR
5555 && e->X_add_number < REG_CR + 128)
87f8eb97 5556 return OPERAND_MATCH;
800eeca4
JW		 5557 break;
5558
5559 case IA64_OPND_F1:
5560 case IA64_OPND_F2:
5561 case IA64_OPND_F3:
5562 case IA64_OPND_F4:
5563 if (e->X_op == O_register && e->X_add_number >= REG_FR
5564 && e->X_add_number < REG_FR + 128)
87f8eb97 5565 return OPERAND_MATCH;
800eeca4
JW		 5566 break;
5567
5568 case IA64_OPND_P1:
5569 case IA64_OPND_P2:
5570 if (e->X_op == O_register && e->X_add_number >= REG_P
5571 && e->X_add_number < REG_P + 64)
87f8eb97 5572 return OPERAND_MATCH;
800eeca4
JW		 5573 break;
5574
5575 case IA64_OPND_R1:
5576 case IA64_OPND_R2:
5577 case IA64_OPND_R3:
5578 if (e->X_op == O_register && e->X_add_number >= REG_GR
5579 && e->X_add_number < REG_GR + 128)
87f8eb97 5580 return OPERAND_MATCH;
800eeca4
JW		 5581 break;
5582
5583 case IA64_OPND_R3_2:
87f8eb97 5584 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5585 {
87f8eb97
JW		 5586 if (e->X_add_number < REG_GR + 4)
5587 return OPERAND_MATCH;
5588 else if (e->X_add_number < REG_GR + 128)
5589 return OPERAND_OUT_OF_RANGE;
5590 }
800eeca4
JW		 5591 break;
5592
542d6675 5593 /* indirect operands: */
800eeca4
JW		 5594 case IA64_OPND_CPUID_R3:
5595 case IA64_OPND_DBR_R3:
5596 case IA64_OPND_DTR_R3:
5597 case IA64_OPND_ITR_R3:
5598 case IA64_OPND_IBR_R3:
5599 case IA64_OPND_MSR_R3:
5600 case IA64_OPND_PKR_R3:
5601 case IA64_OPND_PMC_R3:
5602 case IA64_OPND_PMD_R3:
5603 case IA64_OPND_RR_R3:
5604 if (e->X_op == O_index && e->X_op_symbol
5605 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5606 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5607 return OPERAND_MATCH;
800eeca4
JW		 5608 break;
5609
5610 case IA64_OPND_MR3:
5611 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5612 return OPERAND_MATCH;
800eeca4
JW		 5613 break;
5614
542d6675 5615 /* immediate operands: */
800eeca4
JW		 5616 case IA64_OPND_CNT2a:
5617 case IA64_OPND_LEN4:
5618 case IA64_OPND_LEN6:
5619 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5620 if (e->X_op == O_constant)
5621 {
5622 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5623 return OPERAND_MATCH;
5624 else
5625 return OPERAND_OUT_OF_RANGE;
5626 }
800eeca4
JW		 5627 break;
5628
5629 case IA64_OPND_CNT2b:
87f8eb97
JW		 5630 if (e->X_op == O_constant)
5631 {
5632 if ((bfd_vma) (e->X_add_number - 1) < 3)
5633 return OPERAND_MATCH;
5634 else
5635 return OPERAND_OUT_OF_RANGE;
5636 }
800eeca4
JW		 5637 break;
5638
5639 case IA64_OPND_CNT2c:
5640 val = e->X_add_number;
87f8eb97
JW		 5641 if (e->X_op == O_constant)
5642 {
5643 if ((val == 0 || val == 7 || val == 15 || val == 16))
5644 return OPERAND_MATCH;
5645 else
5646 return OPERAND_OUT_OF_RANGE;
5647 }
800eeca4
JW		 5648 break;
5649
5650 case IA64_OPND_SOR:
5651 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5652 if (e->X_op == O_constant && e->X_add_number & 0x7)
5653 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5654 case IA64_OPND_SOF:
5655 case IA64_OPND_SOL:
87f8eb97
JW		 5656 if (e->X_op == O_constant)
5657 {
5658 if ((bfd_vma) e->X_add_number <= 96)
5659 return OPERAND_MATCH;
5660 else
5661 return OPERAND_OUT_OF_RANGE;
5662 }
800eeca4
JW		 5663 break;
5664
5665 case IA64_OPND_IMMU62:
5666 if (e->X_op == O_constant)
542d6675 5667 {
800eeca4 5668 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5669 return OPERAND_MATCH;
5670 else
5671 return OPERAND_OUT_OF_RANGE;
542d6675 5672 }
197865e8 5673 else
542d6675
KH		 5674 {
5675 /* FIXME -- need 62-bit relocation type */
5676 as_bad (_("62-bit relocation not yet implemented"));
5677 }
800eeca4
JW		 5678 break;
5679
5680 case IA64_OPND_IMMU64:
5681 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5682 || e->X_op == O_subtract)
5683 {
5684 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5685 fix->code = BFD_RELOC_IA64_IMM64;
5686 if (e->X_op != O_subtract)
5687 {
5688 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5689 if (e->X_op == O_pseudo_fixup)
5690 e->X_op = O_symbol;
5691 }
5692
5693 fix->opnd = idesc->operands[index];
5694 fix->expr = *e;
5695 fix->is_pcrel = 0;
5696 ++CURR_SLOT.num_fixups;
87f8eb97 5697 return OPERAND_MATCH;
800eeca4
JW		 5698 }
5699 else if (e->X_op == O_constant)
87f8eb97 5700 return OPERAND_MATCH;
800eeca4
JW		 5701 break;
5702
5703 case IA64_OPND_CCNT5:
5704 case IA64_OPND_CNT5:
5705 case IA64_OPND_CNT6:
5706 case IA64_OPND_CPOS6a:
5707 case IA64_OPND_CPOS6b:
5708 case IA64_OPND_CPOS6c:
5709 case IA64_OPND_IMMU2:
5710 case IA64_OPND_IMMU7a:
5711 case IA64_OPND_IMMU7b:
800eeca4
JW		 5712 case IA64_OPND_IMMU21:
5713 case IA64_OPND_IMMU24:
5714 case IA64_OPND_MBTYPE4:
5715 case IA64_OPND_MHTYPE8:
5716 case IA64_OPND_POS6:
5717 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5718 if (e->X_op == O_constant)
5719 {
5720 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5721 return OPERAND_MATCH;
5722 else
5723 return OPERAND_OUT_OF_RANGE;
5724 }
800eeca4
JW		 5725 break;
5726
bf3ca999
TW		 5727 case IA64_OPND_IMMU9:
5728 bits = operand_width (idesc->operands[index]);
87f8eb97 5729 if (e->X_op == O_constant)
542d6675 5730 {
87f8eb97
JW		 5731 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5732 {
5733 int lobits = e->X_add_number & 0x3;
5734 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5735 e->X_add_number |= (bfd_vma) 0x3;
5736 return OPERAND_MATCH;
5737 }
5738 else
5739 return OPERAND_OUT_OF_RANGE;
542d6675 5740 }
bf3ca999
TW		 5741 break;
5742
800eeca4
JW		 5743 case IA64_OPND_IMM44:
5744 /* least 16 bits must be zero */
5745 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5746 /* XXX technically, this is wrong: we should not be issuing warning
5747 messages until we're sure this instruction pattern is going to
5748 be used! */
542d6675 5749 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5750
87f8eb97 5751 if (e->X_op == O_constant)
542d6675 5752 {
87f8eb97
JW		 5753 if (((e->X_add_number >= 0
5754 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5755 || (e->X_add_number < 0
5756 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5757 {
87f8eb97
JW		 5758 /* sign-extend */
5759 if (e->X_add_number >= 0
5760 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5761 {
5762 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5763 }
5764 return OPERAND_MATCH;
542d6675 5765 }
87f8eb97
JW		 5766 else
5767 return OPERAND_OUT_OF_RANGE;
542d6675 5768 }
800eeca4
JW		 5769 break;
5770
5771 case IA64_OPND_IMM17:
5772 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5773 if (e->X_op == O_constant)
542d6675 5774 {
87f8eb97
JW		 5775 if (((e->X_add_number >= 0
5776 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5777 || (e->X_add_number < 0
5778 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5779 {
87f8eb97
JW		 5780 /* sign-extend */
5781 if (e->X_add_number >= 0
5782 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5783 {
5784 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5785 }
5786 return OPERAND_MATCH;
542d6675 5787 }
87f8eb97
JW		 5788 else
5789 return OPERAND_OUT_OF_RANGE;
542d6675 5790 }
800eeca4
JW		 5791 break;
5792
5793 case IA64_OPND_IMM14:
5794 case IA64_OPND_IMM22:
5795 relocatable = 1;
5796 case IA64_OPND_IMM1:
5797 case IA64_OPND_IMM8:
5798 case IA64_OPND_IMM8U4:
5799 case IA64_OPND_IMM8M1:
5800 case IA64_OPND_IMM8M1U4:
5801 case IA64_OPND_IMM8M1U8:
5802 case IA64_OPND_IMM9a:
5803 case IA64_OPND_IMM9b:
5804 bits = operand_width (idesc->operands[index]);
5805 if (relocatable && (e->X_op == O_symbol
5806 || e->X_op == O_subtract
5807 || e->X_op == O_pseudo_fixup))
5808 {
5809 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5810
5811 if (idesc->operands[index] == IA64_OPND_IMM14)
5812 fix->code = BFD_RELOC_IA64_IMM14;
5813 else
5814 fix->code = BFD_RELOC_IA64_IMM22;
5815
5816 if (e->X_op != O_subtract)
5817 {
5818 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5819 if (e->X_op == O_pseudo_fixup)
5820 e->X_op = O_symbol;
5821 }
5822
5823 fix->opnd = idesc->operands[index];
5824 fix->expr = *e;
5825 fix->is_pcrel = 0;
5826 ++CURR_SLOT.num_fixups;
87f8eb97 5827 return OPERAND_MATCH;
800eeca4
JW		 5828 }
5829 else if (e->X_op != O_constant
5830 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 5831 return OPERAND_MISMATCH;
800eeca4
JW		 5832
5833 if (opnd == IA64_OPND_IMM8M1U4)
5834 {
5835 /* Zero is not valid for unsigned compares that take an adjusted
5836 constant immediate range. */
5837 if (e->X_add_number == 0)
87f8eb97 5838 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5839
5840 /* Sign-extend 32-bit unsigned numbers, so that the following range
5841 checks will work. */
5842 val = e->X_add_number;
197865e8
KH		 5843 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5844 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5845 val = ((val << 32) >> 32);
5846
5847 /* Check for 0x100000000. This is valid because
5848 0x100000000-1 is the same as ((uint32_t) -1). */
5849 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 5850 return OPERAND_MATCH;
800eeca4
JW		 5851
5852 val = val - 1;
5853 }
5854 else if (opnd == IA64_OPND_IMM8M1U8)
5855 {
5856 /* Zero is not valid for unsigned compares that take an adjusted
5857 constant immediate range. */
5858 if (e->X_add_number == 0)
87f8eb97 5859 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5860
5861 /* Check for 0x10000000000000000. */
5862 if (e->X_op == O_big)
5863 {
5864 if (generic_bignum[0] == 0
5865 && generic_bignum[1] == 0
5866 && generic_bignum[2] == 0
5867 && generic_bignum[3] == 0
5868 && generic_bignum[4] == 1)
87f8eb97 5869 return OPERAND_MATCH;
800eeca4 5870 else
87f8eb97 5871 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5872 }
5873 else
5874 val = e->X_add_number - 1;
5875 }
5876 else if (opnd == IA64_OPND_IMM8M1)
5877 val = e->X_add_number - 1;
5878 else if (opnd == IA64_OPND_IMM8U4)
5879 {
5880 /* Sign-extend 32-bit unsigned numbers, so that the following range
5881 checks will work. */
5882 val = e->X_add_number;
197865e8
KH		 5883 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5884 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5885 val = ((val << 32) >> 32);
5886 }
5887 else
5888 val = e->X_add_number;
5889
2434f565
JW		 5890 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5891 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 5892 return OPERAND_MATCH;
5893 else
5894 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5895
5896 case IA64_OPND_INC3:
5897 /* +/- 1, 4, 8, 16 */
5898 val = e->X_add_number;
5899 if (val < 0)
5900 val = -val;
87f8eb97
JW		 5901 if (e->X_op == O_constant)
5902 {
5903 if ((val == 1 || val == 4 || val == 8 || val == 16))
5904 return OPERAND_MATCH;
5905 else
5906 return OPERAND_OUT_OF_RANGE;
5907 }
800eeca4
JW		 5908 break;
5909
5910 case IA64_OPND_TGT25:
5911 case IA64_OPND_TGT25b:
5912 case IA64_OPND_TGT25c:
5913 case IA64_OPND_TGT64:
5914 if (e->X_op == O_symbol)
5915 {
5916 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5917 if (opnd == IA64_OPND_TGT25)
5918 fix->code = BFD_RELOC_IA64_PCREL21F;
5919 else if (opnd == IA64_OPND_TGT25b)
5920 fix->code = BFD_RELOC_IA64_PCREL21M;
5921 else if (opnd == IA64_OPND_TGT25c)
5922 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 5923 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 5924 fix->code = BFD_RELOC_IA64_PCREL60B;
5925 else
5926 abort ();
5927
800eeca4
JW		 5928 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5929 fix->opnd = idesc->operands[index];
5930 fix->expr = *e;
5931 fix->is_pcrel = 1;
5932 ++CURR_SLOT.num_fixups;
87f8eb97 5933 return OPERAND_MATCH;
800eeca4
JW		 5934 }
5935 case IA64_OPND_TAG13:
5936 case IA64_OPND_TAG13b:
5937 switch (e->X_op)
5938 {
5939 case O_constant:
87f8eb97 5940 return OPERAND_MATCH;
800eeca4
JW		 5941
5942 case O_symbol:
5943 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c
JW		 5944 /* There are no external relocs for TAG13/TAG13b fields, so we
5945 create a dummy reloc. This will not live past md_apply_fix3. */
5946 fix->code = BFD_RELOC_UNUSED;
5947 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 5948 fix->opnd = idesc->operands[index];
5949 fix->expr = *e;
5950 fix->is_pcrel = 1;
5951 ++CURR_SLOT.num_fixups;
87f8eb97 5952 return OPERAND_MATCH;
800eeca4
JW		 5953
5954 default:
5955 break;
5956 }
5957 break;
5958
a823923b
RH		 5959 case IA64_OPND_LDXMOV:
5960 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5961 fix->code = BFD_RELOC_IA64_LDXMOV;
5962 fix->opnd = idesc->operands[index];
5963 fix->expr = *e;
5964 fix->is_pcrel = 0;
5965 ++CURR_SLOT.num_fixups;
5966 return OPERAND_MATCH;
5967
800eeca4
JW		 5968 default:
5969 break;
5970 }
87f8eb97 5971 return OPERAND_MISMATCH;
800eeca4
JW		 5972}
5973
5974static int
5975parse_operand (e)
5976 expressionS *e;
5977{
5978 int sep = '\0';
5979
5980 memset (e, 0, sizeof (*e));
5981 e->X_op = O_absent;
5982 SKIP_WHITESPACE ();
5983 if (*input_line_pointer != '}')
5984 expression (e);
5985 sep = *input_line_pointer++;
5986
5987 if (sep == '}')
5988 {
5989 if (!md.manual_bundling)
5990 as_warn ("Found '}' when manual bundling is off");
5991 else
5992 CURR_SLOT.manual_bundling_off = 1;
5993 md.manual_bundling = 0;
5994 sep = '\0';
5995 }
5996 return sep;
5997}
5998
5999/* Returns the next entry in the opcode table that matches the one in
6000 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6001 found, NULL is returned instead. */
800eeca4
JW		 6002
6003static struct ia64_opcode *
6004get_next_opcode (struct ia64_opcode *idesc)
6005{
6006 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6007 ia64_free_opcode (idesc);
6008 return next;
6009}
6010
6011/* Parse the operands for the opcode and find the opcode variant that
6012 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6013
6014static struct ia64_opcode *
800eeca4
JW		 6015parse_operands (idesc)
6016 struct ia64_opcode *idesc;
6017{
6018 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6019 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6020 int reg1, reg2;
6021 char reg_class;
800eeca4 6022 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6023 enum operand_match_result result;
800eeca4
JW		 6024 char mnemonic[129];
6025 char *first_arg = 0, *end, *saved_input_pointer;
6026 unsigned int sof;
6027
6028 assert (strlen (idesc->name) <= 128);
6029
6030 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6031 if (idesc->operands[2] == IA64_OPND_SOF
6032 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6033 {
6034 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6035 can't parse the first operand until we have parsed the
6036 remaining operands of the "alloc" instruction. */
6037 SKIP_WHITESPACE ();
6038 first_arg = input_line_pointer;
6039 end = strchr (input_line_pointer, '=');
6040 if (!end)
6041 {
6042 as_bad ("Expected separator `='");
6043 return 0;
6044 }
6045 input_line_pointer = end + 1;
6046 ++i;
6047 ++num_outputs;
6048 }
6049
d3156ecc 6050 for (; ; ++i)
800eeca4 6051 {
d3156ecc
JB		 6052 if (i < NELEMS (CURR_SLOT.opnd))
6053 {
6054 sep = parse_operand (CURR_SLOT.opnd + i);
6055 if (CURR_SLOT.opnd[i].X_op == O_absent)
6056 break;
6057 }
6058 else
6059 {
6060 expressionS dummy;
6061
6062 sep = parse_operand (&dummy);
6063 if (dummy.X_op == O_absent)
6064 break;
6065 }
800eeca4
JW		 6066
6067 ++num_operands;
6068
6069 if (sep != '=' && sep != ',')
6070 break;
6071
6072 if (sep == '=')
6073 {
6074 if (num_outputs > 0)
6075 as_bad ("Duplicate equal sign (=) in instruction");
6076 else
6077 num_outputs = i + 1;
6078 }
6079 }
6080 if (sep != '\0')
6081 {
6082 as_bad ("Illegal operand separator `%c'", sep);
6083 return 0;
6084 }
197865e8 6085
60b9a617
JB		 6086 if (idesc->operands[2] == IA64_OPND_SOF
6087 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6088 {
6089 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6090 know (strcmp (idesc->name, "alloc") == 0);
60b9a617
JB		 6091 i = (CURR_SLOT.opnd[1].X_op == O_register
6092 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6093 if (num_operands == i + 3 /* first_arg not included in this count! */
6094 && CURR_SLOT.opnd[i].X_op == O_constant
6095 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6096 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6097 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
800eeca4 6098 {
60b9a617
JB		 6099 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6100 CURR_SLOT.opnd[i + 1].X_add_number,
6101 CURR_SLOT.opnd[i + 2].X_add_number,
6102 CURR_SLOT.opnd[i + 3].X_add_number);
800eeca4 6103
542d6675 6104 /* now we can parse the first arg: */
800eeca4
JW		 6105 saved_input_pointer = input_line_pointer;
6106 input_line_pointer = first_arg;
6107 sep = parse_operand (CURR_SLOT.opnd + 0);
6108 if (sep != '=')
6109 --num_outputs; /* force error */
6110 input_line_pointer = saved_input_pointer;
6111
60b9a617
JB		 6112 CURR_SLOT.opnd[i].X_add_number = sof;
6113 CURR_SLOT.opnd[i + 1].X_add_number
6114 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6115 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6116 }
6117 }
6118
d3156ecc 6119 highest_unmatched_operand = -4;
87f8eb97
JW		 6120 curr_out_of_range_pos = -1;
6121 error_pos = 0;
800eeca4
JW		 6122 for (; idesc; idesc = get_next_opcode (idesc))
6123 {
6124 if (num_outputs != idesc->num_outputs)
6125 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6126 if (highest_unmatched_operand < 0)
6127 highest_unmatched_operand |= 1;
6128 if (num_operands > NELEMS (idesc->operands)
6129 || (num_operands < NELEMS (idesc->operands)
6130 && idesc->operands[num_operands])
6131 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6132 continue; /* mismatch in number of arguments */
6133 if (highest_unmatched_operand < 0)
6134 highest_unmatched_operand |= 2;
800eeca4
JW		 6135
6136 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6137
6138 /* Try to match all operands. If we see an out-of-range operand,
6139 then continue trying to match the rest of the operands, since if
6140 the rest match, then this idesc will give the best error message. */
6141
6142 out_of_range_pos = -1;
800eeca4 6143 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6144 {
6145 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6146 if (result != OPERAND_MATCH)
6147 {
6148 if (result != OPERAND_OUT_OF_RANGE)
6149 break;
6150 if (out_of_range_pos < 0)
6151 /* remember position of the first out-of-range operand: */
6152 out_of_range_pos = i;
6153 }
6154 }
800eeca4 6155
87f8eb97
JW		 6156 /* If we did not match all operands, or if at least one operand was
6157 out-of-range, then this idesc does not match. Keep track of which
6158 idesc matched the most operands before failing. If we have two
6159 idescs that failed at the same position, and one had an out-of-range
6160 operand, then prefer the out-of-range operand. Thus if we have
6161 "add r0=0x1000000,r1" we get an error saying the constant is out
6162 of range instead of an error saying that the constant should have been
6163 a register. */
6164
6165 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6166 {
87f8eb97
JW		 6167 if (i > highest_unmatched_operand
6168 || (i == highest_unmatched_operand
6169 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6170 {
6171 highest_unmatched_operand = i;
87f8eb97
JW		 6172 if (out_of_range_pos >= 0)
6173 {
6174 expected_operand = idesc->operands[out_of_range_pos];
6175 error_pos = out_of_range_pos;
6176 }
6177 else
6178 {
6179 expected_operand = idesc->operands[i];
6180 error_pos = i;
6181 }
6182 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6183 }
6184 continue;
6185 }
6186
800eeca4
JW		 6187 break;
6188 }
6189 if (!idesc)
6190 {
6191 if (expected_operand)
6192 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6193 error_pos + 1, mnemonic,
800eeca4 6194 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6195 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6196 as_bad ("Wrong number of output operands");
6197 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6198 as_bad ("Wrong number of input operands");
800eeca4
JW		 6199 else
6200 as_bad ("Operand mismatch");
6201 return 0;
6202 }
4b09e828
JB		 6203
6204 /* Check that the instruction doesn't use
6205 - r0, f0, or f1 as output operands
6206 - the same predicate twice as output operands
6207 - r0 as address of a base update load or store
6208 - the same GR as output and address of a base update load
6209 - two even- or two odd-numbered FRs as output operands of a floating
6210 point parallel load.
6211 At most two (conflicting) output (or output-like) operands can exist,
6212 (floating point parallel loads have three outputs, but the base register,
6213 if updated, cannot conflict with the actual outputs). */
6214 reg2 = reg1 = -1;
6215 for (i = 0; i < num_operands; ++i)
6216 {
6217 int regno = 0;
6218
6219 reg_class = 0;
6220 switch (idesc->operands[i])
6221 {
6222 case IA64_OPND_R1:
6223 case IA64_OPND_R2:
6224 case IA64_OPND_R3:
6225 if (i < num_outputs)
6226 {
6227 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6228 reg_class = 'r';
6229 else if (reg1 < 0)
6230 reg1 = CURR_SLOT.opnd[i].X_add_number;
6231 else if (reg2 < 0)
6232 reg2 = CURR_SLOT.opnd[i].X_add_number;
6233 }
6234 break;
6235 case IA64_OPND_P1:
6236 case IA64_OPND_P2:
6237 if (i < num_outputs)
6238 {
6239 if (reg1 < 0)
6240 reg1 = CURR_SLOT.opnd[i].X_add_number;
6241 else if (reg2 < 0)
6242 reg2 = CURR_SLOT.opnd[i].X_add_number;
6243 }
6244 break;
6245 case IA64_OPND_F1:
6246 case IA64_OPND_F2:
6247 case IA64_OPND_F3:
6248 case IA64_OPND_F4:
6249 if (i < num_outputs)
6250 {
6251 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6252 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6253 {
6254 reg_class = 'f';
6255 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6256 }
6257 else if (reg1 < 0)
6258 reg1 = CURR_SLOT.opnd[i].X_add_number;
6259 else if (reg2 < 0)
6260 reg2 = CURR_SLOT.opnd[i].X_add_number;
6261 }
6262 break;
6263 case IA64_OPND_MR3:
6264 if (idesc->flags & IA64_OPCODE_POSTINC)
6265 {
6266 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6267 reg_class = 'm';
6268 else if (reg1 < 0)
6269 reg1 = CURR_SLOT.opnd[i].X_add_number;
6270 else if (reg2 < 0)
6271 reg2 = CURR_SLOT.opnd[i].X_add_number;
6272 }
6273 break;
6274 default:
6275 break;
6276 }
6277 switch (reg_class)
6278 {
6279 case 0:
6280 break;
6281 default:
6282 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6283 break;
6284 case 'm':
6285 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6286 break;
6287 }
6288 }
6289 if (reg1 == reg2)
6290 {
6291 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6292 {
6293 reg1 -= REG_GR;
6294 reg_class = 'r';
6295 }
6296 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6297 {
6298 reg1 -= REG_P;
6299 reg_class = 'p';
6300 }
6301 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6302 {
6303 reg1 -= REG_FR;
6304 reg_class = 'f';
6305 }
6306 else
6307 reg_class = 0;
6308 if (reg_class)
6309 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6310 }
6311 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6312 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6313 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6314 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6315 && ! ((reg1 ^ reg2) & 1))
6316 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6317 reg1 - REG_FR, reg2 - REG_FR);
6318 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6319 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6320 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6321 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6322 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6323 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6324 return idesc;
6325}
6326
6327static void
6328build_insn (slot, insnp)
6329 struct slot *slot;
6330 bfd_vma *insnp;
6331{
6332 const struct ia64_operand *odesc, *o2desc;
6333 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6334 bfd_vma insn;
6335 bfd_signed_vma val;
800eeca4
JW		 6336 const char *err;
6337 int i;
6338
6339 insn = idesc->opcode | slot->qp_regno;
6340
6341 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6342 {
c67e42c9
RH		 6343 if (slot->opnd[i].X_op == O_register
6344 || slot->opnd[i].X_op == O_constant
6345 || slot->opnd[i].X_op == O_index)
6346 val = slot->opnd[i].X_add_number;
6347 else if (slot->opnd[i].X_op == O_big)
800eeca4 6348 {
c67e42c9
RH		 6349 /* This must be the value 0x10000000000000000. */
6350 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6351 val = 0;
6352 }
6353 else
6354 val = 0;
6355
6356 switch (idesc->operands[i])
6357 {
6358 case IA64_OPND_IMMU64:
800eeca4
JW		 6359 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6360 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6361 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6362 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6363 continue;
6364
6365 case IA64_OPND_IMMU62:
542d6675
KH		 6366 val &= 0x3fffffffffffffffULL;
6367 if (val != slot->opnd[i].X_add_number)
6368 as_warn (_("Value truncated to 62 bits"));
6369 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6370 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6371 continue;
800eeca4 6372
c67e42c9
RH		 6373 case IA64_OPND_TGT64:
6374 val >>= 4;
6375 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6376 insn |= ((((val >> 59) & 0x1) << 36)
6377 | (((val >> 0) & 0xfffff) << 13));
6378 continue;
800eeca4 6379
c67e42c9
RH		 6380 case IA64_OPND_AR3:
6381 val -= REG_AR;
6382 break;
6383
6384 case IA64_OPND_B1:
6385 case IA64_OPND_B2:
6386 val -= REG_BR;
6387 break;
6388
6389 case IA64_OPND_CR3:
6390 val -= REG_CR;
6391 break;
6392
6393 case IA64_OPND_F1:
6394 case IA64_OPND_F2:
6395 case IA64_OPND_F3:
6396 case IA64_OPND_F4:
6397 val -= REG_FR;
6398 break;
6399
6400 case IA64_OPND_P1:
6401 case IA64_OPND_P2:
6402 val -= REG_P;
6403 break;
6404
6405 case IA64_OPND_R1:
6406 case IA64_OPND_R2:
6407 case IA64_OPND_R3:
6408 case IA64_OPND_R3_2:
6409 case IA64_OPND_CPUID_R3:
6410 case IA64_OPND_DBR_R3:
6411 case IA64_OPND_DTR_R3:
6412 case IA64_OPND_ITR_R3:
6413 case IA64_OPND_IBR_R3:
6414 case IA64_OPND_MR3:
6415 case IA64_OPND_MSR_R3:
6416 case IA64_OPND_PKR_R3:
6417 case IA64_OPND_PMC_R3:
6418 case IA64_OPND_PMD_R3:
197865e8 6419 case IA64_OPND_RR_R3:
c67e42c9
RH		 6420 val -= REG_GR;
6421 break;
6422
6423 default:
6424 break;
6425 }
6426
6427 odesc = elf64_ia64_operands + idesc->operands[i];
6428 err = (*odesc->insert) (odesc, val, &insn);
6429 if (err)
6430 as_bad_where (slot->src_file, slot->src_line,
6431 "Bad operand value: %s", err);
6432 if (idesc->flags & IA64_OPCODE_PSEUDO)
6433 {
6434 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6435 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6436 {
6437 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6438 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6439 }
c67e42c9
RH		 6440 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6441 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6442 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6443 {
c67e42c9
RH		 6444 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6445 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6446 }
6447 }
6448 }
6449 *insnp = insn;
6450}
6451
6452static void
6453emit_one_bundle ()
6454{
f4660e2c 6455 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6456 enum ia64_unit required_unit, insn_unit = 0;
6457 enum ia64_insn_type type[3], insn_type;
6458 unsigned int template, orig_template;
542d6675 6459 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6460 struct ia64_opcode *idesc;
6461 int end_of_insn_group = 0, user_template = -1;
9b505842 6462 int n, i, j, first, curr, last_slot;
d6e78c11 6463 unw_rec_list *ptr, *last_ptr, *end_ptr;
800eeca4
JW		 6464 bfd_vma t0 = 0, t1 = 0;
6465 struct label_fix *lfix;
6466 struct insn_fix *ifix;
6467 char mnemonic[16];
6468 fixS *fix;
6469 char *f;
5a9ff93d 6470 int addr_mod;
800eeca4
JW		 6471
6472 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6473 know (first >= 0 & first < NUM_SLOTS);
6474 n = MIN (3, md.num_slots_in_use);
6475
6476 /* Determine template: user user_template if specified, best match
542d6675 6477 otherwise: */
800eeca4
JW		 6478
6479 if (md.slot[first].user_template >= 0)
6480 user_template = template = md.slot[first].user_template;
6481 else
6482 {
032efc85 6483 /* Auto select appropriate template. */
800eeca4
JW		 6484 memset (type, 0, sizeof (type));
6485 curr = first;
6486 for (i = 0; i < n; ++i)
6487 {
032efc85
RH		 6488 if (md.slot[curr].label_fixups && i != 0)
6489 break;
800eeca4
JW		 6490 type[i] = md.slot[curr].idesc->type;
6491 curr = (curr + 1) % NUM_SLOTS;
6492 }
6493 template = best_template[type[0]][type[1]][type[2]];
6494 }
6495
542d6675 6496 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6497 for (i = 0; i < 3; ++i)
6498 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6499
6500 f = frag_more (16);
6501
5a9ff93d
JW		 6502 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6503 from the start of the frag. */
6504 addr_mod = frag_now_fix () & 15;
6505 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6506 as_bad (_("instruction address is not a multiple of 16"));
6507 frag_now->insn_addr = addr_mod;
6508 frag_now->has_code = 1;
6509
542d6675 6510 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6511 curr = first;
6512 idesc = md.slot[curr].idesc;
6513 end_of_insn_group = 0;
9b505842 6514 last_slot = -1;
800eeca4
JW		 6515 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6516 {
d6e78c11
JW		 6517 /* If we have unwind records, we may need to update some now. */
6518 ptr = md.slot[curr].unwind_record;
6519 if (ptr)
6520 {
6521 /* Find the last prologue/body record in the list for the current
6522 insn, and set the slot number for all records up to that point.
6523 This needs to be done now, because prologue/body records refer to
6524 the current point, not the point after the instruction has been
6525 issued. This matters because there may have been nops emitted
6526 meanwhile. Any non-prologue non-body record followed by a
6527 prologue/body record must also refer to the current point. */
6528 last_ptr = NULL;
6529 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6530 for (; ptr != end_ptr; ptr = ptr->next)
6531 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6532 || ptr->r.type == body)
6533 last_ptr = ptr;
6534 if (last_ptr)
6535 {
6536 /* Make last_ptr point one after the last prologue/body
6537 record. */
6538 last_ptr = last_ptr->next;
6539 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6540 ptr = ptr->next)
6541 {
6542 ptr->slot_number = (unsigned long) f + i;
6543 ptr->slot_frag = frag_now;
6544 }
6545 /* Remove the initialized records, so that we won't accidentally
6546 update them again if we insert a nop and continue. */
6547 md.slot[curr].unwind_record = last_ptr;
6548 }
6549 }
e0c9811a 6550
f4660e2c
JB		 6551 manual_bundling_off = md.slot[curr].manual_bundling_off;
6552 if (md.slot[curr].manual_bundling_on)
800eeca4 6553 {
f4660e2c
JB		 6554 if (curr == first)
6555 manual_bundling = 1;
800eeca4 6556 else
f4660e2c
JB		 6557 break; /* Need to start a new bundle. */
6558 }
6559
744b6414
JW		 6560 /* If this instruction specifies a template, then it must be the first
6561 instruction of a bundle. */
6562 if (curr != first && md.slot[curr].user_template >= 0)
6563 break;
6564
f4660e2c
JB		 6565 if (idesc->flags & IA64_OPCODE_SLOT2)
6566 {
6567 if (manual_bundling && !manual_bundling_off)
6568 {
6569 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6570 "`%s' must be last in bundle", idesc->name);
6571 if (i < 2)
6572 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6573 }
6574 i = 2;
800eeca4
JW		 6575 }
6576 if (idesc->flags & IA64_OPCODE_LAST)
6577 {
2434f565
JW		 6578 int required_slot;
6579 unsigned int required_template;
800eeca4
JW		 6580
6581 /* If we need a stop bit after an M slot, our only choice is
6582 template 5 (M;;MI). If we need a stop bit after a B
6583 slot, our only choice is to place it at the end of the
6584 bundle, because the only available templates are MIB,
6585 MBB, BBB, MMB, and MFB. We don't handle anything other
6586 than M and B slots because these are the only kind of
6587 instructions that can have the IA64_OPCODE_LAST bit set. */
6588 required_template = template;
6589 switch (idesc->type)
6590 {
6591 case IA64_TYPE_M:
6592 required_slot = 0;
6593 required_template = 5;
6594 break;
6595
6596 case IA64_TYPE_B:
6597 required_slot = 2;
6598 break;
6599
6600 default:
6601 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6602 "Internal error: don't know how to force %s to end"
6603 "of instruction group", idesc->name);
6604 required_slot = i;
6605 break;
6606 }
f4660e2c
JB		 6607 if (manual_bundling
6608 && (i > required_slot
6609 || (required_slot == 2 && !manual_bundling_off)
6610 || (user_template >= 0
6611 /* Changing from MMI to M;MI is OK. */
6612 && (template ^ required_template) > 1)))
6613 {
6614 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6615 "`%s' must be last in instruction group",
6616 idesc->name);
6617 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6618 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6619 }
800eeca4
JW		 6620 if (required_slot < i)
6621 /* Can't fit this instruction. */
6622 break;
6623
6624 i = required_slot;
6625 if (required_template != template)
6626 {
6627 /* If we switch the template, we need to reset the NOPs
6628 after slot i. The slot-types of the instructions ahead
6629 of i never change, so we don't need to worry about
6630 changing NOPs in front of this slot. */
6631 for (j = i; j < 3; ++j)
6632 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6633 }
6634 template = required_template;
6635 }
6636 if (curr != first && md.slot[curr].label_fixups)
6637 {
f4660e2c
JB		 6638 if (manual_bundling)
6639 {
6640 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6641 "Label must be first in a bundle");
f4660e2c
JB		 6642 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6643 }
800eeca4
JW		 6644 /* This insn must go into the first slot of a bundle. */
6645 break;
6646 }
6647
800eeca4
JW		 6648 if (end_of_insn_group && md.num_slots_in_use >= 1)
6649 {
6650 /* We need an instruction group boundary in the middle of a
6651 bundle. See if we can switch to an other template with
6652 an appropriate boundary. */
6653
6654 orig_template = template;
6655 if (i == 1 && (user_template == 4
6656 || (user_template < 0
6657 && (ia64_templ_desc[template].exec_unit[0]
6658 == IA64_UNIT_M))))
6659 {
6660 template = 5;
6661 end_of_insn_group = 0;
6662 }
6663 else if (i == 2 && (user_template == 0
6664 || (user_template < 0
6665 && (ia64_templ_desc[template].exec_unit[1]
6666 == IA64_UNIT_I)))
6667 /* This test makes sure we don't switch the template if
6668 the next instruction is one that needs to be first in
6669 an instruction group. Since all those instructions are
6670 in the M group, there is no way such an instruction can
6671 fit in this bundle even if we switch the template. The
6672 reason we have to check for this is that otherwise we
6673 may end up generating "MI;;I M.." which has the deadly
6674 effect that the second M instruction is no longer the
f4660e2c 6675 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6676 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6677 {
6678 template = 1;
6679 end_of_insn_group = 0;
6680 }
f4660e2c
JB		 6681 else if (i == 1
6682 && user_template == 0
6683 && !(idesc->flags & IA64_OPCODE_FIRST))
6684 /* Use the next slot. */
6685 continue;
800eeca4
JW		 6686 else if (curr != first)
6687 /* can't fit this insn */
6688 break;
6689
6690 if (template != orig_template)
6691 /* if we switch the template, we need to reset the NOPs
6692 after slot i. The slot-types of the instructions ahead
6693 of i never change, so we don't need to worry about
6694 changing NOPs in front of this slot. */
6695 for (j = i; j < 3; ++j)
6696 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6697 }
6698 required_unit = ia64_templ_desc[template].exec_unit[i];
6699
c10d9d8f 6700 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6701 if (idesc->type == IA64_TYPE_DYN)
6702 {
97762d08
JB		 6703 enum ia64_opnd opnd1, opnd2;
6704
800eeca4
JW		 6705 if ((strcmp (idesc->name, "nop") == 0)
6706 || (strcmp (idesc->name, "break") == 0))
6707 insn_unit = required_unit;
91d777ee
L		 6708 else if (strcmp (idesc->name, "hint") == 0)
6709 {
6710 insn_unit = required_unit;
6711 if (required_unit == IA64_UNIT_B)
6712 {
6713 switch (md.hint_b)
6714 {
6715 case hint_b_ok:
6716 break;
6717 case hint_b_warning:
6718 as_warn ("hint in B unit may be treated as nop");
6719 break;
6720 case hint_b_error:
6721 /* When manual bundling is off and there is no
6722 user template, we choose a different unit so
6723 that hint won't go into the current slot. We
6724 will fill the current bundle with nops and
6725 try to put hint into the next bundle. */
6726 if (!manual_bundling && user_template < 0)
6727 insn_unit = IA64_UNIT_I;
6728 else
6729 as_bad ("hint in B unit can't be used");
6730 break;
6731 }
6732 }
6733 }
97762d08
JB		 6734 else if (strcmp (idesc->name, "chk.s") == 0
6735 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6736 {
6737 insn_unit = IA64_UNIT_M;
97762d08
JB		 6738 if (required_unit == IA64_UNIT_I
6739 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6740 insn_unit = IA64_UNIT_I;
6741 }
6742 else
6743 as_fatal ("emit_one_bundle: unexpected dynamic op");
6744
09124b3f 6745 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6746 opnd1 = idesc->operands[0];
6747 opnd2 = idesc->operands[1];
3d56ab85 6748 ia64_free_opcode (idesc);
97762d08
JB		 6749 idesc = ia64_find_opcode (mnemonic);
6750 /* moves to/from ARs have collisions */
6751 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6752 {
6753 while (idesc != NULL
6754 && (idesc->operands[0] != opnd1
6755 || idesc->operands[1] != opnd2))
6756 idesc = get_next_opcode (idesc);
6757 }
97762d08 6758 md.slot[curr].idesc = idesc;
800eeca4
JW		 6759 }
6760 else
6761 {
6762 insn_type = idesc->type;
6763 insn_unit = IA64_UNIT_NIL;
6764 switch (insn_type)
6765 {
6766 case IA64_TYPE_A:
6767 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6768 insn_unit = required_unit;
6769 break;
542d6675 6770 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6771 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6772 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6773 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6774 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6775 default: break;
6776 }
6777 }
6778
6779 if (insn_unit != required_unit)
9b505842 6780 continue; /* Try next slot. */
800eeca4 6781
196e8040
JW		 6782 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6783 {
6784 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 6785
196e8040
JW		 6786 md.slot[curr].loc_directive_seen = 0;
6787 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6788 }
800eeca4
JW		 6789
6790 build_insn (md.slot + curr, insn + i);
6791
d6e78c11
JW		 6792 ptr = md.slot[curr].unwind_record;
6793 if (ptr)
6794 {
6795 /* Set slot numbers for all remaining unwind records belonging to the
6796 current insn. There can not be any prologue/body unwind records
6797 here. */
6798 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6799 for (; ptr != end_ptr; ptr = ptr->next)
6800 {
6801 ptr->slot_number = (unsigned long) f + i;
6802 ptr->slot_frag = frag_now;
6803 }
6804 md.slot[curr].unwind_record = NULL;
6805 }
10850f29 6806
800eeca4
JW		 6807 if (required_unit == IA64_UNIT_L)
6808 {
6809 know (i == 1);
6810 /* skip one slot for long/X-unit instructions */
6811 ++i;
6812 }
6813 --md.num_slots_in_use;
9b505842 6814 last_slot = i;
800eeca4 6815
542d6675 6816 /* now is a good time to fix up the labels for this insn: */
800eeca4
JW		 6817 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6818 {
6819 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6820 symbol_set_frag (lfix->sym, frag_now);
6821 }
f1bcba5b
JW		 6822 /* and fix up the tags also. */
6823 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6824 {
6825 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6826 symbol_set_frag (lfix->sym, frag_now);
6827 }
800eeca4
JW		 6828
6829 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6830 {
6831 ifix = md.slot[curr].fixup + j;
5a080f89 6832 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 6833 &ifix->expr, ifix->is_pcrel, ifix->code);
6834 fix->tc_fix_data.opnd = ifix->opnd;
6835 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6836 fix->fx_file = md.slot[curr].src_file;
6837 fix->fx_line = md.slot[curr].src_line;
6838 }
6839
6840 end_of_insn_group = md.slot[curr].end_of_insn_group;
6841
542d6675 6842 /* clear slot: */
800eeca4
JW		 6843 ia64_free_opcode (md.slot[curr].idesc);
6844 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6845 md.slot[curr].user_template = -1;
6846
6847 if (manual_bundling_off)
6848 {
6849 manual_bundling = 0;
6850 break;
6851 }
6852 curr = (curr + 1) % NUM_SLOTS;
6853 idesc = md.slot[curr].idesc;
6854 }
f4660e2c 6855 if (manual_bundling > 0)
800eeca4
JW		 6856 {
6857 if (md.num_slots_in_use > 0)
ac025970 6858 {
9b505842
JB		 6859 if (last_slot >= 2)
6860 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6861 "`%s' does not fit into bundle", idesc->name);
6862 else if (last_slot < 0)
6863 {
6864 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6865 "`%s' does not fit into %s template",
6866 idesc->name, ia64_templ_desc[template].name);
6867 /* Drop first insn so we don't livelock. */
6868 --md.num_slots_in_use;
6869 know (curr == first);
6870 ia64_free_opcode (md.slot[curr].idesc);
6871 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6872 md.slot[curr].user_template = -1;
6873 }
6874 else
6875 {
6876 const char *where;
6877
6878 if (template == 2)
6879 where = "X slot";
6880 else if (last_slot == 0)
6881 where = "slots 2 or 3";
6882 else
6883 where = "slot 3";
6884 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6885 "`%s' can't go in %s of %s template",
6886 idesc->name, where, ia64_templ_desc[template].name);
6887 }
ac025970 6888 }
800eeca4
JW		 6889 else
6890 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6891 "Missing '}' at end of file");
6892 }
6893 know (md.num_slots_in_use < NUM_SLOTS);
6894
6895 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6896 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6897
44f5c83a
JW		 6898 number_to_chars_littleendian (f + 0, t0, 8);
6899 number_to_chars_littleendian (f + 8, t1, 8);
f5a30c2e 6900
73f20958
L		 6901 if (unwind.list)
6902 {
127cab00
L		 6903 unwind.list->next_slot_number = (unsigned long) f + 16;
6904 unwind.list->next_slot_frag = frag_now;
73f20958 6905 }
800eeca4
JW		 6906}
6907
6908int
6909md_parse_option (c, arg)
6910 int c;
6911 char *arg;
6912{
7463c317 6913
800eeca4
JW		 6914 switch (c)
6915 {
c43c2cc5 6916 /* Switches from the Intel assembler. */
44f5c83a 6917 case 'm':
800eeca4
JW		 6918 if (strcmp (arg, "ilp64") == 0
6919 || strcmp (arg, "lp64") == 0
6920 || strcmp (arg, "p64") == 0)
6921 {
6922 md.flags |= EF_IA_64_ABI64;
6923 }
6924 else if (strcmp (arg, "ilp32") == 0)
6925 {
6926 md.flags &= ~EF_IA_64_ABI64;
6927 }
6928 else if (strcmp (arg, "le") == 0)
6929 {
6930 md.flags &= ~EF_IA_64_BE;
549f748d 6931 default_big_endian = 0;
800eeca4
JW		 6932 }
6933 else if (strcmp (arg, "be") == 0)
6934 {
6935 md.flags |= EF_IA_64_BE;
549f748d 6936 default_big_endian = 1;
800eeca4 6937 }
970d6792
L		 6938 else if (strncmp (arg, "unwind-check=", 13) == 0)
6939 {
6940 arg += 13;
6941 if (strcmp (arg, "warning") == 0)
6942 md.unwind_check = unwind_check_warning;
6943 else if (strcmp (arg, "error") == 0)
6944 md.unwind_check = unwind_check_error;
6945 else
6946 return 0;
6947 }
91d777ee
L		 6948 else if (strncmp (arg, "hint.b=", 7) == 0)
6949 {
6950 arg += 7;
6951 if (strcmp (arg, "ok") == 0)
6952 md.hint_b = hint_b_ok;
6953 else if (strcmp (arg, "warning") == 0)
6954 md.hint_b = hint_b_warning;
6955 else if (strcmp (arg, "error") == 0)
6956 md.hint_b = hint_b_error;
6957 else
6958 return 0;
6959 }
800eeca4
JW		 6960 else
6961 return 0;
6962 break;
6963
6964 case 'N':
6965 if (strcmp (arg, "so") == 0)
6966 {
542d6675 6967 /* Suppress signon message. */
800eeca4
JW		 6968 }
6969 else if (strcmp (arg, "pi") == 0)
6970 {
6971 /* Reject privileged instructions. FIXME */
6972 }
6973 else if (strcmp (arg, "us") == 0)
6974 {
6975 /* Allow union of signed and unsigned range. FIXME */
6976 }
6977 else if (strcmp (arg, "close_fcalls") == 0)
6978 {
6979 /* Do not resolve global function calls. */
6980 }
6981 else
6982 return 0;
6983 break;
6984
6985 case 'C':
6986 /* temp[="prefix"] Insert temporary labels into the object file
6987 symbol table prefixed by "prefix".
6988 Default prefix is ":temp:".
6989 */
6990 break;
6991
6992 case 'a':
800eeca4
JW		 6993 /* indirect=<tgt> Assume unannotated indirect branches behavior
6994 according to <tgt> --
6995 exit: branch out from the current context (default)
6996 labels: all labels in context may be branch targets
6997 */
85b40035
L		 6998 if (strncmp (arg, "indirect=", 9) != 0)
6999 return 0;
800eeca4
JW		 7000 break;
7001
7002 case 'x':
7003 /* -X conflicts with an ignored option, use -x instead */
7004 md.detect_dv = 1;
7005 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7006 {
7007 /* set default mode to explicit */
7008 md.default_explicit_mode = 1;
7009 break;
7010 }
800eeca4 7011 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7012 {
7013 md.default_explicit_mode = 0;
7014 }
f1dab70d
JB		 7015 else if (strcmp (arg, "none") == 0)
7016 {
7017 md.detect_dv = 0;
7018 }
800eeca4 7019 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7020 {
7021 md.debug_dv = 1;
7022 }
800eeca4 7023 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7024 {
7025 md.default_explicit_mode = 1;
7026 md.debug_dv = 1;
7027 }
f1dab70d
JB		 7028 else if (strcmp (arg, "debugn") == 0)
7029 {
7030 md.debug_dv = 1;
7031 md.detect_dv = 0;
7032 }
800eeca4 7033 else
542d6675
KH		 7034 {
7035 as_bad (_("Unrecognized option '-x%s'"), arg);
7036 }
800eeca4
JW		 7037 break;
7038
7039 case 'S':
7040 /* nops Print nops statistics. */
7041 break;
7042
c43c2cc5
JW		 7043 /* GNU specific switches for gcc. */
7044 case OPTION_MCONSTANT_GP:
7045 md.flags |= EF_IA_64_CONS_GP;
7046 break;
7047
7048 case OPTION_MAUTO_PIC:
7049 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7050 break;
7051
800eeca4
JW		 7052 default:
7053 return 0;
7054 }
7055
7056 return 1;
7057}
7058
7059void
7060md_show_usage (stream)
7061 FILE *stream;
7062{
542d6675 7063 fputs (_("\
800eeca4 7064IA-64 options:\n\
6290819d
NC		 7065 --mconstant-gp mark output file as using the constant-GP model\n\
7066 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7067 --mauto-pic mark output file as using the constant-GP model\n\
7068 without function descriptors (sets ELF header flag\n\
7069 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7070 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7071 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
970d6792
L		 7072 -munwind-check=[warning|error]\n\
7073 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7074 -mhint.b=[ok|warning|error]\n\
7075 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7076 -x | -xexplicit turn on dependency violation checking\n\
7077 -xauto automagically remove dependency violations (default)\n\
7078 -xnone turn off dependency violation checking\n\
7079 -xdebug debug dependency violation checker\n\
7080 -xdebugn debug dependency violation checker but turn off\n\
7081 dependency violation checking\n\
7082 -xdebugx debug dependency violation checker and turn on\n\
7083 dependency violation checking\n"),
800eeca4
JW		 7084 stream);
7085}
7086
acebd4ce
AS		 7087void
7088ia64_after_parse_args ()
7089{
7090 if (debug_type == DEBUG_STABS)
7091 as_fatal (_("--gstabs is not supported for ia64"));
7092}
7093
44576e1f
RH		 7094/* Return true if TYPE fits in TEMPL at SLOT. */
7095
7096static int
800eeca4
JW		 7097match (int templ, int type, int slot)
7098{
7099 enum ia64_unit unit;
7100 int result;
7101
7102 unit = ia64_templ_desc[templ].exec_unit[slot];
7103 switch (type)
7104 {
7105 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7106 case IA64_TYPE_A:
7107 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7108 break;
7109 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7110 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7111 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7112 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7113 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7114 default: result = 0; break;
7115 }
7116 return result;
7117}
7118
44576e1f
RH		 7119/* Add a bit of extra goodness if a nop of type F or B would fit
7120 in TEMPL at SLOT. */
7121
7122static inline int
7123extra_goodness (int templ, int slot)
7124{
ebeeafe6 7125 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
44576e1f 7126 return 2;
ebeeafe6 7127 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
44576e1f
RH		 7128 return 1;
7129 return 0;
7130}
7131
800eeca4
JW		 7132/* This function is called once, at assembler startup time. It sets
7133 up all the tables, etc. that the MD part of the assembler will need
7134 that can be determined before arguments are parsed. */
7135void
7136md_begin ()
7137{
44f5c83a 7138 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
800eeca4
JW		 7139 const char *err;
7140 char name[8];
7141
7142 md.auto_align = 1;
7143 md.explicit_mode = md.default_explicit_mode;
7144
7145 bfd_set_section_alignment (stdoutput, text_section, 4);
7146
0234cb7c 7147 /* Make sure function pointers get initialized. */
10a98291 7148 target_big_endian = -1;
549f748d 7149 dot_byteorder (default_big_endian);
10a98291 7150
35f5df7f
L		 7151 alias_hash = hash_new ();
7152 alias_name_hash = hash_new ();
7153 secalias_hash = hash_new ();
7154 secalias_name_hash = hash_new ();
7155
13ae64f3
JJ		 7156 pseudo_func[FUNC_DTP_MODULE].u.sym =
7157 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7158 &zero_address_frag);
7159
7160 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7161 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7162 &zero_address_frag);
7163
800eeca4 7164 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7165 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7166 &zero_address_frag);
800eeca4
JW		 7167
7168 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7169 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7170 &zero_address_frag);
800eeca4
JW		 7171
7172 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7173 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7174 &zero_address_frag);
800eeca4 7175
fa2c7eff
RH		 7176 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7177 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7178 &zero_address_frag);
7179
c67e42c9 7180 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7181 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7182 &zero_address_frag);
c67e42c9 7183
800eeca4 7184 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7185 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7186 &zero_address_frag);
800eeca4
JW		 7187
7188 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7189 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7190 &zero_address_frag);
800eeca4
JW		 7191
7192 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7193 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7194 &zero_address_frag);
800eeca4 7195
13ae64f3
JJ		 7196 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7197 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7198 &zero_address_frag);
7199
800eeca4 7200 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7201 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7202 &zero_address_frag);
800eeca4
JW		 7203
7204 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7205 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7206 &zero_address_frag);
800eeca4 7207
13ae64f3
JJ		 7208 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7209 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7210 &zero_address_frag);
7211
7212 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7213 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7214 &zero_address_frag);
7215
7216 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7217 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7218 &zero_address_frag);
7219
3969b680
RH		 7220 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7221 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7222 &zero_address_frag);
7223
197865e8 7224 /* Compute the table of best templates. We compute goodness as a
44576e1f
RH		 7225 base 4 value, in which each match counts for 3, each F counts
7226 for 2, each B counts for 1. This should maximize the number of
7227 F and B nops in the chosen bundles, which is good because these
7228 pipelines are least likely to be overcommitted. */
800eeca4
JW		 7229 for (i = 0; i < IA64_NUM_TYPES; ++i)
7230 for (j = 0; j < IA64_NUM_TYPES; ++j)
7231 for (k = 0; k < IA64_NUM_TYPES; ++k)
7232 {
7233 best = 0;
7234 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7235 {
7236 goodness = 0;
7237 if (match (t, i, 0))
7238 {
7239 if (match (t, j, 1))
7240 {
7241 if (match (t, k, 2))
44576e1f 7242 goodness = 3 + 3 + 3;
800eeca4 7243 else
44576e1f 7244 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7245 }
7246 else if (match (t, j, 2))
44576e1f 7247 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7248 else
44576e1f
RH		 7249 {
7250 goodness = 3;
7251 goodness += extra_goodness (t, 1);
7252 goodness += extra_goodness (t, 2);
7253 }
800eeca4
JW		 7254 }
7255 else if (match (t, i, 1))
7256 {
7257 if (match (t, j, 2))
44576e1f 7258 goodness = 3 + 3;
800eeca4 7259 else
44576e1f 7260 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7261 }
7262 else if (match (t, i, 2))
44576e1f 7263 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7264
7265 if (goodness > best)
7266 {
7267 best = goodness;
7268 best_template[i][j][k] = t;
7269 }
7270 }
7271 }
7272
7273 for (i = 0; i < NUM_SLOTS; ++i)
7274 md.slot[i].user_template = -1;
7275
7276 md.pseudo_hash = hash_new ();
7277 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7278 {
7279 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7280 (void *) (pseudo_opcode + i));
7281 if (err)
7282 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7283 pseudo_opcode[i].name, err);
7284 }
7285
7286 md.reg_hash = hash_new ();
7287 md.dynreg_hash = hash_new ();
7288 md.const_hash = hash_new ();
7289 md.entry_hash = hash_new ();
7290
542d6675 7291 /* general registers: */
800eeca4
JW		 7292
7293 total = 128;
7294 for (i = 0; i < total; ++i)
7295 {
7296 sprintf (name, "r%d", i - REG_GR);
7297 md.regsym[i] = declare_register (name, i);
7298 }
7299
542d6675 7300 /* floating point registers: */
800eeca4
JW		 7301 total += 128;
7302 for (; i < total; ++i)
7303 {
7304 sprintf (name, "f%d", i - REG_FR);
7305 md.regsym[i] = declare_register (name, i);
7306 }
7307
542d6675 7308 /* application registers: */
800eeca4
JW		 7309 total += 128;
7310 ar_base = i;
7311 for (; i < total; ++i)
7312 {
7313 sprintf (name, "ar%d", i - REG_AR);
7314 md.regsym[i] = declare_register (name, i);
7315 }
7316
542d6675 7317 /* control registers: */
800eeca4
JW		 7318 total += 128;
7319 cr_base = i;
7320 for (; i < total; ++i)
7321 {
7322 sprintf (name, "cr%d", i - REG_CR);
7323 md.regsym[i] = declare_register (name, i);
7324 }
7325
542d6675 7326 /* predicate registers: */
800eeca4
JW		 7327 total += 64;
7328 for (; i < total; ++i)
7329 {
7330 sprintf (name, "p%d", i - REG_P);
7331 md.regsym[i] = declare_register (name, i);
7332 }
7333
542d6675 7334 /* branch registers: */
800eeca4
JW		 7335 total += 8;
7336 for (; i < total; ++i)
7337 {
7338 sprintf (name, "b%d", i - REG_BR);
7339 md.regsym[i] = declare_register (name, i);
7340 }
7341
7342 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7343 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7344 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7345 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7346 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7347 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7348 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7349
7350 for (i = 0; i < NELEMS (indirect_reg); ++i)
7351 {
7352 regnum = indirect_reg[i].regnum;
7353 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7354 }
7355
542d6675 7356 /* define synonyms for application registers: */
800eeca4
JW		 7357 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7358 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7359 REG_AR + ar[i - REG_AR].regnum);
7360
542d6675 7361 /* define synonyms for control registers: */
800eeca4
JW		 7362 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7363 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7364 REG_CR + cr[i - REG_CR].regnum);
7365
7366 declare_register ("gp", REG_GR + 1);
7367 declare_register ("sp", REG_GR + 12);
7368 declare_register ("rp", REG_BR + 0);
7369
542d6675 7370 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7371 declare_register ("psp", REG_PSP);
7372
800eeca4
JW		 7373 declare_register_set ("ret", 4, REG_GR + 8);
7374 declare_register_set ("farg", 8, REG_FR + 8);
7375 declare_register_set ("fret", 8, REG_FR + 8);
7376
7377 for (i = 0; i < NELEMS (const_bits); ++i)
7378 {
7379 err = hash_insert (md.const_hash, const_bits[i].name,
7380 (PTR) (const_bits + i));
7381 if (err)
7382 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7383 name, err);
7384 }
7385
44f5c83a
JW		 7386 /* Set the architecture and machine depending on defaults and command line
7387 options. */
7388 if (md.flags & EF_IA_64_ABI64)
7389 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7390 else
7391 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7392
7393 if (! ok)
7394 as_warn (_("Could not set architecture and machine"));
800eeca4 7395
557debba
JW		 7396 /* Set the pointer size and pointer shift size depending on md.flags */
7397
7398 if (md.flags & EF_IA_64_ABI64)
7399 {
7400 md.pointer_size = 8; /* pointers are 8 bytes */
7401 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7402 }
7403 else
7404 {
7405 md.pointer_size = 4; /* pointers are 4 bytes */
7406 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7407 }
7408
800eeca4
JW		 7409 md.mem_offset.hint = 0;
7410 md.path = 0;
7411 md.maxpaths = 0;
7412 md.entry_labels = NULL;
7413}
7414
970d6792
L		 7415/* Set the default options in md. Cannot do this in md_begin because
7416 that is called after md_parse_option which is where we set the
7417 options in md based on command line options. */
44f5c83a
JW		 7418
7419void
7420ia64_init (argc, argv)
2434f565
JW		 7421 int argc ATTRIBUTE_UNUSED;
7422 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7423{
1cd8ff38 7424 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7425 md.detect_dv = 1;
970d6792
L		 7426 /* FIXME: We should change it to unwind_check_error someday. */
7427 md.unwind_check = unwind_check_warning;
91d777ee 7428 md.hint_b = hint_b_error;
44f5c83a
JW		 7429}
7430
7431/* Return a string for the target object file format. */
7432
7433const char *
7434ia64_target_format ()
7435{
7436 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7437 {
72a76794
JW		 7438 if (md.flags & EF_IA_64_BE)
7439 {
7440 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7441#if defined(TE_AIX50)
7463c317 7442 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7443#elif defined(TE_HPUX)
7444 return "elf64-ia64-hpux-big";
7463c317 7445#else
72a76794 7446 return "elf64-ia64-big";
7463c317 7447#endif
72a76794 7448 else
1cd8ff38 7449#if defined(TE_AIX50)
7463c317 7450 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7451#elif defined(TE_HPUX)
7452 return "elf32-ia64-hpux-big";
7463c317 7453#else
72a76794 7454 return "elf32-ia64-big";
7463c317 7455#endif
72a76794 7456 }
44f5c83a 7457 else
72a76794
JW		 7458 {
7459 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7460#ifdef TE_AIX50
7461 return "elf64-ia64-aix-little";
7462#else
72a76794 7463 return "elf64-ia64-little";
7463c317 7464#endif
72a76794 7465 else
7463c317
TW		 7466#ifdef TE_AIX50
7467 return "elf32-ia64-aix-little";
7468#else
72a76794 7469 return "elf32-ia64-little";
7463c317 7470#endif
72a76794 7471 }
44f5c83a
JW		 7472 }
7473 else
7474 return "unknown-format";
7475}
7476
800eeca4
JW		 7477void
7478ia64_end_of_source ()
7479{
542d6675 7480 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7481 insn_group_break (1, 0, 0);
7482
542d6675 7483 /* emits slots we haven't written yet: */
800eeca4
JW		 7484 ia64_flush_insns ();
7485
7486 bfd_set_private_flags (stdoutput, md.flags);
7487
800eeca4
JW		 7488 md.mem_offset.hint = 0;
7489}
7490
7491void
7492ia64_start_line ()
7493{
f1bcba5b
JW		 7494 if (md.qp.X_op == O_register)
7495 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7496 md.qp.X_op = O_absent;
7497
7498 if (ignore_input ())
7499 return;
7500
7501 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7502 {
7503 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7504 {
7505 static int warned;
7506
7507 if (!warned)
7508 {
7509 warned = 1;
7510 as_warn (_("Explicit stops are ignored in auto mode"));
7511 }
7512 }
800eeca4 7513 else
542d6675 7514 insn_group_break (1, 0, 0);
800eeca4
JW		 7515 }
7516}
7517
f1bcba5b
JW		 7518/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7519 labels. */
7520static int defining_tag = 0;
7521
800eeca4
JW		 7522int
7523ia64_unrecognized_line (ch)
7524 int ch;
7525{
7526 switch (ch)
7527 {
7528 case '(':
7529 expression (&md.qp);
7530 if (*input_line_pointer++ != ')')
7531 {
7532 as_bad ("Expected ')'");
7533 return 0;
7534 }
7535 if (md.qp.X_op != O_register)
7536 {
7537 as_bad ("Qualifying predicate expected");
7538 return 0;
7539 }
7540 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7541 {
7542 as_bad ("Predicate register expected");
7543 return 0;
7544 }
7545 return 1;
7546
7547 case '{':
7548 if (md.manual_bundling)
7549 as_warn ("Found '{' when manual bundling is already turned on");
7550 else
7551 CURR_SLOT.manual_bundling_on = 1;
7552 md.manual_bundling = 1;
7553
542d6675
KH		 7554 /* Bundling is only acceptable in explicit mode
7555 or when in default automatic mode. */
800eeca4 7556 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7557 {
7558 if (!md.mode_explicitly_set
7559 && !md.default_explicit_mode)
7560 dot_dv_mode ('E');
7561 else
7562 as_warn (_("Found '{' after explicit switch to automatic mode"));
7563 }
800eeca4
JW		 7564 return 1;
7565
7566 case '}':
7567 if (!md.manual_bundling)
7568 as_warn ("Found '}' when manual bundling is off");
7569 else
7570 PREV_SLOT.manual_bundling_off = 1;
7571 md.manual_bundling = 0;
7572
7573 /* switch back to automatic mode, if applicable */
197865e8 7574 if (md.detect_dv
542d6675
KH		 7575 && md.explicit_mode
7576 && !md.mode_explicitly_set
7577 && !md.default_explicit_mode)
7578 dot_dv_mode ('A');
800eeca4
JW		 7579
7580 /* Allow '{' to follow on the same line. We also allow ";;", but that
7581 happens automatically because ';' is an end of line marker. */
7582 SKIP_WHITESPACE ();
7583 if (input_line_pointer[0] == '{')
7584 {
7585 input_line_pointer++;
7586 return ia64_unrecognized_line ('{');
7587 }
7588
7589 demand_empty_rest_of_line ();
7590 return 1;
7591
f1bcba5b
JW		 7592 case '[':
7593 {
7594 char *s;
7595 char c;
7596 symbolS *tag;
4d5a53ff 7597 int temp;
f1bcba5b
JW		 7598
7599 if (md.qp.X_op == O_register)
7600 {
7601 as_bad ("Tag must come before qualifying predicate.");
7602 return 0;
7603 }
4d5a53ff
JW		 7604
7605 /* This implements just enough of read_a_source_file in read.c to
7606 recognize labels. */
7607 if (is_name_beginner (*input_line_pointer))
7608 {
7609 s = input_line_pointer;
7610 c = get_symbol_end ();
7611 }
7612 else if (LOCAL_LABELS_FB
3882b010 7613 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7614 {
7615 temp = 0;
3882b010 7616 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7617 temp = (temp * 10) + *input_line_pointer++ - '0';
7618 fb_label_instance_inc (temp);
7619 s = fb_label_name (temp, 0);
7620 c = *input_line_pointer;
7621 }
7622 else
7623 {
7624 s = NULL;
7625 c = '\0';
7626 }
f1bcba5b
JW		 7627 if (c != ':')
7628 {
7629 /* Put ':' back for error messages' sake. */
7630 *input_line_pointer++ = ':';
7631 as_bad ("Expected ':'");
7632 return 0;
7633 }
4d5a53ff 7634
f1bcba5b
JW		 7635 defining_tag = 1;
7636 tag = colon (s);
7637 defining_tag = 0;
7638 /* Put ':' back for error messages' sake. */
7639 *input_line_pointer++ = ':';
7640 if (*input_line_pointer++ != ']')
7641 {
7642 as_bad ("Expected ']'");
7643 return 0;
7644 }
7645 if (! tag)
7646 {
7647 as_bad ("Tag name expected");
7648 return 0;
7649 }
7650 return 1;
7651 }
7652
800eeca4
JW		 7653 default:
7654 break;
7655 }
542d6675
KH		 7656
7657 /* Not a valid line. */
7658 return 0;
800eeca4
JW		 7659}
7660
7661void
7662ia64_frob_label (sym)
7663 struct symbol *sym;
7664{
7665 struct label_fix *fix;
7666
f1bcba5b
JW		 7667 /* Tags need special handling since they are not bundle breaks like
7668 labels. */
7669 if (defining_tag)
7670 {
7671 fix = obstack_alloc (&notes, sizeof (*fix));
7672 fix->sym = sym;
7673 fix->next = CURR_SLOT.tag_fixups;
7674 CURR_SLOT.tag_fixups = fix;
7675
7676 return;
7677 }
7678
800eeca4
JW		 7679 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7680 {
7681 md.last_text_seg = now_seg;
7682 fix = obstack_alloc (&notes, sizeof (*fix));
7683 fix->sym = sym;
7684 fix->next = CURR_SLOT.label_fixups;
7685 CURR_SLOT.label_fixups = fix;
7686
542d6675 7687 /* Keep track of how many code entry points we've seen. */
800eeca4 7688 if (md.path == md.maxpaths)
542d6675
KH		 7689 {
7690 md.maxpaths += 20;
7691 md.entry_labels = (const char **)
7692 xrealloc ((void *) md.entry_labels,
7693 md.maxpaths * sizeof (char *));
7694 }
800eeca4
JW		 7695 md.entry_labels[md.path++] = S_GET_NAME (sym);
7696 }
7697}
7698
936cf02e
JW		 7699#ifdef TE_HPUX
7700/* The HP-UX linker will give unresolved symbol errors for symbols
7701 that are declared but unused. This routine removes declared,
7702 unused symbols from an object. */
7703int
7704ia64_frob_symbol (sym)
7705 struct symbol *sym;
7706{
7707 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7708 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7709 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7710 && ! S_IS_EXTERNAL (sym)))
7711 return 1;
7712 return 0;
7713}
7714#endif
7715
800eeca4
JW		 7716void
7717ia64_flush_pending_output ()
7718{
4d5a53ff
JW		 7719 if (!md.keep_pending_output
7720 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7721 {
7722 /* ??? This causes many unnecessary stop bits to be emitted.
7723 Unfortunately, it isn't clear if it is safe to remove this. */
7724 insn_group_break (1, 0, 0);
7725 ia64_flush_insns ();
7726 }
7727}
7728
7729/* Do ia64-specific expression optimization. All that's done here is
7730 to transform index expressions that are either due to the indexing
7731 of rotating registers or due to the indexing of indirect register
7732 sets. */
7733int
7734ia64_optimize_expr (l, op, r)
7735 expressionS *l;
7736 operatorT op;
7737 expressionS *r;
7738{
7739 unsigned num_regs;
7740
7741 if (op == O_index)
7742 {
7743 if (l->X_op == O_register && r->X_op == O_constant)
7744 {
7745 num_regs = (l->X_add_number >> 16);
7746 if ((unsigned) r->X_add_number >= num_regs)
7747 {
7748 if (!num_regs)
7749 as_bad ("No current frame");
7750 else
7751 as_bad ("Index out of range 0..%u", num_regs - 1);
7752 r->X_add_number = 0;
7753 }
7754 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7755 return 1;
7756 }
7757 else if (l->X_op == O_register && r->X_op == O_register)
7758 {
7759 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7760 || l->X_add_number == IND_MEM)
7761 {
7762 as_bad ("Indirect register set name expected");
7763 l->X_add_number = IND_CPUID;
7764 }
7765 l->X_op = O_index;
7766 l->X_op_symbol = md.regsym[l->X_add_number];
7767 l->X_add_number = r->X_add_number;
7768 return 1;
7769 }
7770 }
7771 return 0;
7772}
7773
7774int
16a48f83 7775ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 7776 char *name;
7777 expressionS *e;
16a48f83 7778 char *nextcharP;
800eeca4
JW		 7779{
7780 struct const_desc *cdesc;
7781 struct dynreg *dr = 0;
16a48f83 7782 unsigned int idx;
800eeca4
JW		 7783 struct symbol *sym;
7784 char *end;
7785
16a48f83
JB		 7786 if (*name == '@')
7787 {
7788 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7789
7790 /* Find what relocation pseudo-function we're dealing with. */
7791 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7792 if (pseudo_func[idx].name
7793 && pseudo_func[idx].name[0] == name[1]
7794 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7795 {
7796 pseudo_type = pseudo_func[idx].type;
7797 break;
7798 }
7799 switch (pseudo_type)
7800 {
7801 case PSEUDO_FUNC_RELOC:
7802 end = input_line_pointer;
7803 if (*nextcharP != '(')
7804 {
7805 as_bad ("Expected '('");
2f6d622e 7806 break;
16a48f83
JB		 7807 }
7808 /* Skip '('. */
7809 ++input_line_pointer;
7810 expression (e);
7811 if (*input_line_pointer != ')')
7812 {
7813 as_bad ("Missing ')'");
7814 goto done;
7815 }
7816 /* Skip ')'. */
7817 ++input_line_pointer;
7818 if (e->X_op != O_symbol)
7819 {
7820 if (e->X_op != O_pseudo_fixup)
7821 {
7822 as_bad ("Not a symbolic expression");
7823 goto done;
7824 }
7825 if (idx != FUNC_LT_RELATIVE)
7826 {
7827 as_bad ("Illegal combination of relocation functions");
7828 goto done;
7829 }
7830 switch (S_GET_VALUE (e->X_op_symbol))
7831 {
7832 case FUNC_FPTR_RELATIVE:
7833 idx = FUNC_LT_FPTR_RELATIVE; break;
7834 case FUNC_DTP_MODULE:
7835 idx = FUNC_LT_DTP_MODULE; break;
7836 case FUNC_DTP_RELATIVE:
7837 idx = FUNC_LT_DTP_RELATIVE; break;
7838 case FUNC_TP_RELATIVE:
7839 idx = FUNC_LT_TP_RELATIVE; break;
7840 default:
7841 as_bad ("Illegal combination of relocation functions");
7842 goto done;
7843 }
7844 }
7845 /* Make sure gas doesn't get rid of local symbols that are used
7846 in relocs. */
7847 e->X_op = O_pseudo_fixup;
7848 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 7849 done:
7850 *nextcharP = *input_line_pointer;
16a48f83
JB		 7851 break;
7852
7853 case PSEUDO_FUNC_CONST:
7854 e->X_op = O_constant;
7855 e->X_add_number = pseudo_func[idx].u.ival;
7856 break;
7857
7858 case PSEUDO_FUNC_REG:
7859 e->X_op = O_register;
7860 e->X_add_number = pseudo_func[idx].u.ival;
7861 break;
7862
7863 default:
7864 return 0;
7865 }
16a48f83
JB		 7866 return 1;
7867 }
7868
542d6675 7869 /* first see if NAME is a known register name: */
800eeca4
JW		 7870 sym = hash_find (md.reg_hash, name);
7871 if (sym)
7872 {
7873 e->X_op = O_register;
7874 e->X_add_number = S_GET_VALUE (sym);
7875 return 1;
7876 }
7877
7878 cdesc = hash_find (md.const_hash, name);
7879 if (cdesc)
7880 {
7881 e->X_op = O_constant;
7882 e->X_add_number = cdesc->value;
7883 return 1;
7884 }
7885
542d6675 7886 /* check for inN, locN, or outN: */
26b810ce 7887 idx = 0;
800eeca4
JW		 7888 switch (name[0])
7889 {
7890 case 'i':
3882b010 7891 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 7892 {
7893 dr = &md.in;
26b810ce 7894 idx = 2;
800eeca4
JW		 7895 }
7896 break;
7897
7898 case 'l':
3882b010 7899 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 7900 {
7901 dr = &md.loc;
26b810ce 7902 idx = 3;
800eeca4
JW		 7903 }
7904 break;
7905
7906 case 'o':
3882b010 7907 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 7908 {
7909 dr = &md.out;
26b810ce 7910 idx = 3;
800eeca4
JW		 7911 }
7912 break;
7913
7914 default:
7915 break;
7916 }
7917
26b810ce
JB		 7918 /* Ignore register numbers with leading zeroes, except zero itself. */
7919 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 7920 {
26b810ce
JB		 7921 unsigned long regnum;
7922
542d6675 7923 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 7924 regnum = strtoul (name + idx, &end, 10);
7925 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 7926 {
26b810ce 7927 if (regnum >= dr->num_regs)
800eeca4
JW		 7928 {
7929 if (!dr->num_regs)
7930 as_bad ("No current frame");
7931 else
542d6675
KH		 7932 as_bad ("Register number out of range 0..%u",
7933 dr->num_regs - 1);
800eeca4
JW		 7934 regnum = 0;
7935 }
7936 e->X_op = O_register;
7937 e->X_add_number = dr->base + regnum;
7938 return 1;
7939 }
7940 }
7941
20b36a95
JB		 7942 end = alloca (strlen (name) + 1);
7943 strcpy (end, name);
7944 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 7945 if ((dr = hash_find (md.dynreg_hash, name)))
7946 {
7947 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 7948 Store the base register number in the low 16 bits of
7949 X_add_number and the size of the register set in the top 16
7950 bits. */
800eeca4
JW		 7951 e->X_op = O_register;
7952 e->X_add_number = dr->base | (dr->num_regs << 16);
7953 return 1;
7954 }
7955 return 0;
7956}
7957
7958/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7959
7960char *
7961ia64_canonicalize_symbol_name (name)
7962 char *name;
7963{
20b36a95
JB		 7964 size_t len = strlen (name), full = len;
7965
7966 while (len > 0 && name[len - 1] == '#')
7967 --len;
7968 if (len <= 0)
7969 {
7970 if (full > 0)
7971 as_bad ("Standalone `#' is illegal");
7972 else
7973 as_bad ("Zero-length symbol is illegal");
7974 }
7975 else if (len < full - 1)
7976 as_warn ("Redundant `#' suffix operators");
7977 name[len] = '\0';
800eeca4
JW		 7978 return name;
7979}
7980
3e37788f
JW		 7981/* Return true if idesc is a conditional branch instruction. This excludes
7982 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7983 because they always read/write resources regardless of the value of the
7984 qualifying predicate. br.ia must always use p0, and hence is always
7985 taken. Thus this function returns true for branches which can fall
7986 through, and which use no resources if they do fall through. */
1deb8127 7987
800eeca4
JW		 7988static int
7989is_conditional_branch (idesc)
542d6675 7990 struct ia64_opcode *idesc;
800eeca4 7991{
1deb8127 7992 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 7993 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7994 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 7995 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7996 && (idesc->name[2] == '\0'
3e37788f
JW		 7997 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7998 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7999 || idesc->name[2] == 'l'
8000 /* br.cond, br.call, br.clr */
8001 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8002 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8003 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8004}
8005
8006/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8007 returns zero. */
8008
800eeca4
JW		 8009static int
8010is_taken_branch (idesc)
542d6675 8011 struct ia64_opcode *idesc;
800eeca4
JW		 8012{
8013 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8014 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8015}
8016
8017/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8018 doubt, returns zero. */
8019
800eeca4
JW		 8020static int
8021is_interruption_or_rfi (idesc)
542d6675 8022 struct ia64_opcode *idesc;
800eeca4
JW		 8023{
8024 if (strcmp (idesc->name, "rfi") == 0)
8025 return 1;
8026 return 0;
8027}
8028
8029/* Returns the index of the given dependency in the opcode's list of chks, or
8030 -1 if there is no dependency. */
542d6675 8031
800eeca4
JW		 8032static int
8033depends_on (depind, idesc)
542d6675
KH		 8034 int depind;
8035 struct ia64_opcode *idesc;
800eeca4
JW		 8036{
8037 int i;
8038 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8039 for (i = 0; i < dep->nchks; i++)
800eeca4 8040 {
542d6675
KH		 8041 if (depind == DEP (dep->chks[i]))
8042 return i;
800eeca4
JW		 8043 }
8044 return -1;
8045}
8046
8047/* Determine a set of specific resources used for a particular resource
8048 class. Returns the number of specific resources identified For those
8049 cases which are not determinable statically, the resource returned is
197865e8 8050 marked nonspecific.
800eeca4
JW		 8051
8052 Meanings of value in 'NOTE':
8053 1) only read/write when the register number is explicitly encoded in the
8054 insn.
8055 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8056 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8057 3) general register value is used to specify an indirect register; not
8058 determinable statically.
8059 4) only read the given resource when bits 7:0 of the indirect index
8060 register value does not match the register number of the resource; not
8061 determinable statically.
8062 5) all rules are implementation specific.
8063 6) only when both the index specified by the reader and the index specified
8064 by the writer have the same value in bits 63:61; not determinable
197865e8 8065 statically.
800eeca4 8066 7) only access the specified resource when the corresponding mask bit is
197865e8 8067 set
800eeca4
JW		 8068 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8069 only read when these insns reference FR2-31
8070 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8071 written when these insns write FR32-127
8072 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8073 instruction
8074 11) The target predicates are written independently of PR[qp], but source
8075 registers are only read if PR[qp] is true. Since the state of PR[qp]
8076 cannot statically be determined, all source registers are marked used.
8077 12) This insn only reads the specified predicate register when that
8078 register is the PR[qp].
8079 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 8080 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8081 14) The RSE resource includes the implementation-specific RSE internal
8082 state resources. At least one (and possibly more) of these resources are
8083 read by each instruction listed in IC:rse-readers. At least one (and
8084 possibly more) of these resources are written by each insn listed in
197865e8 8085 IC:rse-writers.
800eeca4 8086 15+16) Represents reserved instructions, which the assembler does not
197865e8 8087 generate.
800eeca4
JW		 8088
8089 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8090 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8091*/
8092
8093#define MAX_SPECS 256
8094#define DV_CHK 1
8095#define DV_REG 0
8096
8097static int
8098specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8099 const struct ia64_dependency *dep;
8100 struct ia64_opcode *idesc;
8101 int type; /* is this a DV chk or a DV reg? */
8102 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8103 int note; /* resource note for this insn's usage */
8104 int path; /* which execution path to examine */
800eeca4
JW		 8105{
8106 int count = 0;
8107 int i;
8108 int rsrc_write = 0;
8109 struct rsrc tmpl;
197865e8 8110
800eeca4
JW		 8111 if (dep->mode == IA64_DV_WAW
8112 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8113 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8114 rsrc_write = 1;
8115
8116 /* template for any resources we identify */
8117 tmpl.dependency = dep;
8118 tmpl.note = note;
8119 tmpl.insn_srlz = tmpl.data_srlz = 0;
8120 tmpl.qp_regno = CURR_SLOT.qp_regno;
8121 tmpl.link_to_qp_branch = 1;
8122 tmpl.mem_offset.hint = 0;
8123 tmpl.specific = 1;
a66d2bb7 8124 tmpl.index = -1;
7484b8e6 8125 tmpl.cmp_type = CMP_NONE;
800eeca4
JW		 8126
8127#define UNHANDLED \
8128as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8129dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8130#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8131
8132 /* we don't need to track these */
8133 if (dep->semantics == IA64_DVS_NONE)
8134 return 0;
8135
8136 switch (dep->specifier)
8137 {
8138 case IA64_RS_AR_K:
8139 if (note == 1)
542d6675
KH		 8140 {
8141 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8142 {
8143 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8144 if (regno >= 0 && regno <= 7)
8145 {
8146 specs[count] = tmpl;
8147 specs[count++].index = regno;
8148 }
8149 }
8150 }
800eeca4 8151 else if (note == 0)
542d6675
KH		 8152 {
8153 for (i = 0; i < 8; i++)
8154 {
8155 specs[count] = tmpl;
8156 specs[count++].index = i;
8157 }
8158 }
800eeca4 8159 else
542d6675
KH		 8160 {
8161 UNHANDLED;
8162 }
800eeca4
JW		 8163 break;
8164
8165 case IA64_RS_AR_UNAT:
8166 /* This is a mov =AR or mov AR= instruction. */
8167 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8168 {
8169 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8170 if (regno == AR_UNAT)
8171 {
8172 specs[count++] = tmpl;
8173 }
8174 }
8175 else
8176 {
8177 /* This is a spill/fill, or other instruction that modifies the
8178 unat register. */
8179
8180 /* Unless we can determine the specific bits used, mark the whole
8181 thing; bits 8:3 of the memory address indicate the bit used in
8182 UNAT. The .mem.offset hint may be used to eliminate a small
8183 subset of conflicts. */
8184 specs[count] = tmpl;
8185 if (md.mem_offset.hint)
8186 {
542d6675
KH		 8187 if (md.debug_dv)
8188 fprintf (stderr, " Using hint for spill/fill\n");
8189 /* The index isn't actually used, just set it to something
8190 approximating the bit index. */
800eeca4
JW		 8191 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8192 specs[count].mem_offset.hint = 1;
8193 specs[count].mem_offset.offset = md.mem_offset.offset;
8194 specs[count++].mem_offset.base = md.mem_offset.base;
8195 }
8196 else
8197 {
8198 specs[count++].specific = 0;
8199 }
8200 }
8201 break;
8202
8203 case IA64_RS_AR:
8204 if (note == 1)
542d6675
KH		 8205 {
8206 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8207 {
8208 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8209 if ((regno >= 8 && regno <= 15)
8210 || (regno >= 20 && regno <= 23)
8211 || (regno >= 31 && regno <= 39)
8212 || (regno >= 41 && regno <= 47)
8213 || (regno >= 67 && regno <= 111))
8214 {
8215 specs[count] = tmpl;
8216 specs[count++].index = regno;
8217 }
8218 }
8219 }
800eeca4 8220 else
542d6675
KH		 8221 {
8222 UNHANDLED;
8223 }
800eeca4
JW		 8224 break;
8225
8226 case IA64_RS_ARb:
8227 if (note == 1)
542d6675
KH		 8228 {
8229 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8230 {
8231 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8232 if ((regno >= 48 && regno <= 63)
8233 || (regno >= 112 && regno <= 127))
8234 {
8235 specs[count] = tmpl;
8236 specs[count++].index = regno;
8237 }
8238 }
8239 }
800eeca4 8240 else if (note == 0)
542d6675
KH		 8241 {
8242 for (i = 48; i < 64; i++)
8243 {
8244 specs[count] = tmpl;
8245 specs[count++].index = i;
8246 }
8247 for (i = 112; i < 128; i++)
8248 {
8249 specs[count] = tmpl;
8250 specs[count++].index = i;
8251 }
8252 }
197865e8 8253 else
542d6675
KH		 8254 {
8255 UNHANDLED;
8256 }
800eeca4
JW		 8257 break;
8258
8259 case IA64_RS_BR:
8260 if (note != 1)
542d6675
KH		 8261 {
8262 UNHANDLED;
8263 }
800eeca4 8264 else
542d6675
KH		 8265 {
8266 if (rsrc_write)
8267 {
8268 for (i = 0; i < idesc->num_outputs; i++)
8269 if (idesc->operands[i] == IA64_OPND_B1
8270 || idesc->operands[i] == IA64_OPND_B2)
8271 {
8272 specs[count] = tmpl;
8273 specs[count++].index =
8274 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8275 }
8276 }
8277 else
8278 {
40449e9f 8279 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8280 if (idesc->operands[i] == IA64_OPND_B1
8281 || idesc->operands[i] == IA64_OPND_B2)
8282 {
8283 specs[count] = tmpl;
8284 specs[count++].index =
8285 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8286 }
8287 }
8288 }
800eeca4
JW		 8289 break;
8290
8291 case IA64_RS_CPUID: /* four or more registers */
8292 if (note == 3)
542d6675
KH		 8293 {
8294 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8295 {
8296 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8297 if (regno >= 0 && regno < NELEMS (gr_values)
8298 && KNOWN (regno))
8299 {
8300 specs[count] = tmpl;
8301 specs[count++].index = gr_values[regno].value & 0xFF;
8302 }
8303 else
8304 {
8305 specs[count] = tmpl;
8306 specs[count++].specific = 0;
8307 }
8308 }
8309 }
800eeca4 8310 else
542d6675
KH		 8311 {
8312 UNHANDLED;
8313 }
800eeca4
JW		 8314 break;
8315
8316 case IA64_RS_DBR: /* four or more registers */
8317 if (note == 3)
542d6675
KH		 8318 {
8319 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8320 {
8321 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8322 if (regno >= 0 && regno < NELEMS (gr_values)
8323 && KNOWN (regno))
8324 {
8325 specs[count] = tmpl;
8326 specs[count++].index = gr_values[regno].value & 0xFF;
8327 }
8328 else
8329 {
8330 specs[count] = tmpl;
8331 specs[count++].specific = 0;
8332 }
8333 }
8334 }
800eeca4 8335 else if (note == 0 && !rsrc_write)
542d6675
KH		 8336 {
8337 specs[count] = tmpl;
8338 specs[count++].specific = 0;
8339 }
800eeca4 8340 else
542d6675
KH		 8341 {
8342 UNHANDLED;
8343 }
800eeca4
JW		 8344 break;
8345
8346 case IA64_RS_IBR: /* four or more registers */
8347 if (note == 3)
542d6675
KH		 8348 {
8349 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8350 {
8351 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8352 if (regno >= 0 && regno < NELEMS (gr_values)
8353 && KNOWN (regno))
8354 {
8355 specs[count] = tmpl;
8356 specs[count++].index = gr_values[regno].value & 0xFF;
8357 }
8358 else
8359 {
8360 specs[count] = tmpl;
8361 specs[count++].specific = 0;
8362 }
8363 }
8364 }
800eeca4 8365 else
542d6675
KH		 8366 {
8367 UNHANDLED;
8368 }
800eeca4
JW		 8369 break;
8370
8371 case IA64_RS_MSR:
8372 if (note == 5)
8373 {
8374 /* These are implementation specific. Force all references to
8375 conflict with all other references. */
8376 specs[count] = tmpl;
8377 specs[count++].specific = 0;
8378 }
8379 else
8380 {
8381 UNHANDLED;
8382 }
8383 break;
8384
8385 case IA64_RS_PKR: /* 16 or more registers */
8386 if (note == 3 || note == 4)
542d6675
KH		 8387 {
8388 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8389 {
8390 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8391 if (regno >= 0 && regno < NELEMS (gr_values)
8392 && KNOWN (regno))
8393 {
8394 if (note == 3)
8395 {
8396 specs[count] = tmpl;
8397 specs[count++].index = gr_values[regno].value & 0xFF;
8398 }
8399 else
8400 for (i = 0; i < NELEMS (gr_values); i++)
8401 {
8402 /* Uses all registers *except* the one in R3. */
2434f565 8403 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8404 {
8405 specs[count] = tmpl;
8406 specs[count++].index = i;
8407 }
8408 }
8409 }
8410 else
8411 {
8412 specs[count] = tmpl;
8413 specs[count++].specific = 0;
8414 }
8415 }
8416 }
8417 else if (note == 0)
8418 {
8419 /* probe et al. */
8420 specs[count] = tmpl;
8421 specs[count++].specific = 0;
8422 }
8423 break;
8424
8425 case IA64_RS_PMC: /* four or more registers */
8426 if (note == 3)
8427 {
8428 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8429 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8430
8431 {
8432 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8433 ? 1 : !rsrc_write);
8434 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8435 if (regno >= 0 && regno < NELEMS (gr_values)
8436 && KNOWN (regno))
8437 {
8438 specs[count] = tmpl;
8439 specs[count++].index = gr_values[regno].value & 0xFF;
8440 }
8441 else
8442 {
8443 specs[count] = tmpl;
8444 specs[count++].specific = 0;
8445 }
8446 }
8447 }
8448 else
8449 {
8450 UNHANDLED;
8451 }
800eeca4
JW		 8452 break;
8453
8454 case IA64_RS_PMD: /* four or more registers */
8455 if (note == 3)
542d6675
KH		 8456 {
8457 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8458 {
8459 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8460 if (regno >= 0 && regno < NELEMS (gr_values)
8461 && KNOWN (regno))
8462 {
8463 specs[count] = tmpl;
8464 specs[count++].index = gr_values[regno].value & 0xFF;
8465 }
8466 else
8467 {
8468 specs[count] = tmpl;
8469 specs[count++].specific = 0;
8470 }
8471 }
8472 }
800eeca4 8473 else
542d6675
KH		 8474 {
8475 UNHANDLED;
8476 }
800eeca4
JW		 8477 break;
8478
8479 case IA64_RS_RR: /* eight registers */
8480 if (note == 6)
542d6675
KH		 8481 {
8482 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8483 {
8484 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8485 if (regno >= 0 && regno < NELEMS (gr_values)
8486 && KNOWN (regno))
8487 {
8488 specs[count] = tmpl;
8489 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8490 }
8491 else
8492 {
8493 specs[count] = tmpl;
8494 specs[count++].specific = 0;
8495 }
8496 }
8497 }
800eeca4 8498 else if (note == 0 && !rsrc_write)
542d6675
KH		 8499 {
8500 specs[count] = tmpl;
8501 specs[count++].specific = 0;
8502 }
197865e8 8503 else
542d6675
KH		 8504 {
8505 UNHANDLED;
8506 }
800eeca4
JW		 8507 break;
8508
8509 case IA64_RS_CR_IRR:
197865e8 8510 if (note == 0)
542d6675
KH		 8511 {
8512 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8513 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8514 if (rsrc_write
8515 && idesc->operands[1] == IA64_OPND_CR3
8516 && regno == CR_IVR)
8517 {
8518 for (i = 0; i < 4; i++)
8519 {
8520 specs[count] = tmpl;
8521 specs[count++].index = CR_IRR0 + i;
8522 }
8523 }
8524 }
800eeca4 8525 else if (note == 1)
542d6675
KH		 8526 {
8527 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8528 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8529 && regno >= CR_IRR0
8530 && regno <= CR_IRR3)
8531 {
8532 specs[count] = tmpl;
8533 specs[count++].index = regno;
8534 }
8535 }
800eeca4 8536 else
542d6675
KH		 8537 {
8538 UNHANDLED;
8539 }
800eeca4
JW		 8540 break;
8541
8542 case IA64_RS_CR_LRR:
8543 if (note != 1)
542d6675
KH		 8544 {
8545 UNHANDLED;
8546 }
197865e8 8547 else
542d6675
KH		 8548 {
8549 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8550 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8551 && (regno == CR_LRR0 || regno == CR_LRR1))
8552 {
8553 specs[count] = tmpl;
8554 specs[count++].index = regno;
8555 }
8556 }
800eeca4
JW		 8557 break;
8558
8559 case IA64_RS_CR:
8560 if (note == 1)
542d6675
KH		 8561 {
8562 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8563 {
8564 specs[count] = tmpl;
8565 specs[count++].index =
8566 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8567 }
8568 }
800eeca4 8569 else
542d6675
KH		 8570 {
8571 UNHANDLED;
8572 }
800eeca4
JW		 8573 break;
8574
8575 case IA64_RS_FR:
8576 case IA64_RS_FRb:
8577 if (note != 1)
542d6675
KH		 8578 {
8579 UNHANDLED;
8580 }
800eeca4 8581 else if (rsrc_write)
542d6675
KH		 8582 {
8583 if (dep->specifier == IA64_RS_FRb
8584 && idesc->operands[0] == IA64_OPND_F1)
8585 {
8586 specs[count] = tmpl;
8587 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8588 }
8589 }
800eeca4 8590 else
542d6675
KH		 8591 {
8592 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8593 {
8594 if (idesc->operands[i] == IA64_OPND_F2
8595 || idesc->operands[i] == IA64_OPND_F3
8596 || idesc->operands[i] == IA64_OPND_F4)
8597 {
8598 specs[count] = tmpl;
8599 specs[count++].index =
8600 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8601 }
8602 }
8603 }
800eeca4
JW		 8604 break;
8605
8606 case IA64_RS_GR:
8607 if (note == 13)
542d6675
KH		 8608 {
8609 /* This reference applies only to the GR whose value is loaded with
8610 data returned from memory. */
8611 specs[count] = tmpl;
8612 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8613 }
800eeca4 8614 else if (note == 1)
542d6675
KH		 8615 {
8616 if (rsrc_write)
8617 {
8618 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8619 if (idesc->operands[i] == IA64_OPND_R1
8620 || idesc->operands[i] == IA64_OPND_R2
8621 || idesc->operands[i] == IA64_OPND_R3)
8622 {
8623 specs[count] = tmpl;
197865e8 8624 specs[count++].index =
50b81f19
JW		 8625 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8626 }
8627 if (idesc->flags & IA64_OPCODE_POSTINC)
8628 for (i = 0; i < NELEMS (idesc->operands); i++)
8629 if (idesc->operands[i] == IA64_OPND_MR3)
8630 {
8631 specs[count] = tmpl;
8632 specs[count++].index =
8633 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8634 }
542d6675
KH		 8635 }
8636 else
8637 {
8638 /* Look for anything that reads a GR. */
8639 for (i = 0; i < NELEMS (idesc->operands); i++)
8640 {
8641 if (idesc->operands[i] == IA64_OPND_MR3
8642 || idesc->operands[i] == IA64_OPND_CPUID_R3
8643 || idesc->operands[i] == IA64_OPND_DBR_R3
8644 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8645 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8646 || idesc->operands[i] == IA64_OPND_PKR_R3
8647 || idesc->operands[i] == IA64_OPND_PMC_R3
8648 || idesc->operands[i] == IA64_OPND_PMD_R3
8649 || idesc->operands[i] == IA64_OPND_RR_R3
8650 || ((i >= idesc->num_outputs)
8651 && (idesc->operands[i] == IA64_OPND_R1
8652 || idesc->operands[i] == IA64_OPND_R2
8653 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8654 /* addl source register. */
8655 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8656 {
8657 specs[count] = tmpl;
8658 specs[count++].index =
8659 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8660 }
8661 }
8662 }
8663 }
197865e8 8664 else
542d6675
KH		 8665 {
8666 UNHANDLED;
8667 }
800eeca4
JW		 8668 break;
8669
139368c9
JW		 8670 /* This is the same as IA64_RS_PRr, except that the register range is
8671 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8672 case IA64_RS_PR:
8673 if (note == 0)
542d6675 8674 {
139368c9 8675 for (i = 1; i < 16; i++)
542d6675 8676 {
139368c9
JW		 8677 specs[count] = tmpl;
8678 specs[count++].index = i;
8679 }
8680 }
8681 else if (note == 7)
8682 {
8683 valueT mask = 0;
8684 /* Mark only those registers indicated by the mask. */
8685 if (rsrc_write)
8686 {
8687 mask = CURR_SLOT.opnd[2].X_add_number;
8688 for (i = 1; i < 16; i++)
8689 if (mask & ((valueT) 1 << i))
8690 {
8691 specs[count] = tmpl;
8692 specs[count++].index = i;
8693 }
8694 }
8695 else
8696 {
8697 UNHANDLED;
8698 }
8699 }
8700 else if (note == 11) /* note 11 implies note 1 as well */
8701 {
8702 if (rsrc_write)
8703 {
8704 for (i = 0; i < idesc->num_outputs; i++)
8705 {
8706 if (idesc->operands[i] == IA64_OPND_P1
8707 || idesc->operands[i] == IA64_OPND_P2)
8708 {
8709 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8710 if (regno >= 1 && regno < 16)
8711 {
8712 specs[count] = tmpl;
8713 specs[count++].index = regno;
8714 }
8715 }
8716 }
8717 }
8718 else
8719 {
8720 UNHANDLED;
8721 }
8722 }
8723 else if (note == 12)
8724 {
8725 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8726 {
8727 specs[count] = tmpl;
8728 specs[count++].index = CURR_SLOT.qp_regno;
8729 }
8730 }
8731 else if (note == 1)
8732 {
8733 if (rsrc_write)
8734 {
8735 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8736 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8737 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8738 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8739
8740 if ((idesc->operands[0] == IA64_OPND_P1
8741 || idesc->operands[0] == IA64_OPND_P2)
8742 && p1 >= 1 && p1 < 16)
542d6675
KH		 8743 {
8744 specs[count] = tmpl;
139368c9
JW		 8745 specs[count].cmp_type =
8746 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8747 specs[count++].index = p1;
8748 }
8749 if ((idesc->operands[1] == IA64_OPND_P1
8750 || idesc->operands[1] == IA64_OPND_P2)
8751 && p2 >= 1 && p2 < 16)
8752 {
8753 specs[count] = tmpl;
8754 specs[count].cmp_type =
8755 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8756 specs[count++].index = p2;
542d6675
KH		 8757 }
8758 }
8759 else
8760 {
139368c9 8761 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8762 {
8763 specs[count] = tmpl;
139368c9
JW		 8764 specs[count++].index = CURR_SLOT.qp_regno;
8765 }
8766 if (idesc->operands[1] == IA64_OPND_PR)
8767 {
8768 for (i = 1; i < 16; i++)
8769 {
8770 specs[count] = tmpl;
8771 specs[count++].index = i;
8772 }
542d6675
KH		 8773 }
8774 }
8775 }
139368c9
JW		 8776 else
8777 {
8778 UNHANDLED;
8779 }
8780 break;
8781
8782 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8783 simplified cases of this. */
8784 case IA64_RS_PRr:
8785 if (note == 0)
8786 {
8787 for (i = 16; i < 63; i++)
8788 {
8789 specs[count] = tmpl;
8790 specs[count++].index = i;
8791 }
8792 }
800eeca4 8793 else if (note == 7)
542d6675
KH		 8794 {
8795 valueT mask = 0;
8796 /* Mark only those registers indicated by the mask. */
8797 if (rsrc_write
8798 && idesc->operands[0] == IA64_OPND_PR)
8799 {
8800 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 8801 if (mask & ((valueT) 1 << 16))
139368c9
JW		 8802 for (i = 16; i < 63; i++)
8803 {
8804 specs[count] = tmpl;
8805 specs[count++].index = i;
8806 }
542d6675
KH		 8807 }
8808 else if (rsrc_write
8809 && idesc->operands[0] == IA64_OPND_PR_ROT)
8810 {
8811 for (i = 16; i < 63; i++)
8812 {
8813 specs[count] = tmpl;
8814 specs[count++].index = i;
8815 }
8816 }
8817 else
8818 {
8819 UNHANDLED;
8820 }
8821 }
800eeca4 8822 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 8823 {
8824 if (rsrc_write)
8825 {
8826 for (i = 0; i < idesc->num_outputs; i++)
8827 {
8828 if (idesc->operands[i] == IA64_OPND_P1
8829 || idesc->operands[i] == IA64_OPND_P2)
8830 {
8831 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 8832 if (regno >= 16 && regno < 63)
542d6675
KH		 8833 {
8834 specs[count] = tmpl;
8835 specs[count++].index = regno;
8836 }
8837 }
8838 }
8839 }
8840 else
8841 {
8842 UNHANDLED;
8843 }
8844 }
800eeca4 8845 else if (note == 12)
542d6675 8846 {
139368c9 8847 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8848 {
8849 specs[count] = tmpl;
8850 specs[count++].index = CURR_SLOT.qp_regno;
8851 }
8852 }
800eeca4 8853 else if (note == 1)
542d6675
KH		 8854 {
8855 if (rsrc_write)
8856 {
8857 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8858 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8859 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8860 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8861
542d6675
KH		 8862 if ((idesc->operands[0] == IA64_OPND_P1
8863 || idesc->operands[0] == IA64_OPND_P2)
139368c9 8864 && p1 >= 16 && p1 < 63)
542d6675
KH		 8865 {
8866 specs[count] = tmpl;
4a4f25cf 8867 specs[count].cmp_type =
7484b8e6 8868 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 8869 specs[count++].index = p1;
8870 }
8871 if ((idesc->operands[1] == IA64_OPND_P1
8872 || idesc->operands[1] == IA64_OPND_P2)
139368c9 8873 && p2 >= 16 && p2 < 63)
542d6675
KH		 8874 {
8875 specs[count] = tmpl;
4a4f25cf 8876 specs[count].cmp_type =
7484b8e6 8877 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 8878 specs[count++].index = p2;
8879 }
8880 }
8881 else
8882 {
139368c9 8883 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8884 {
8885 specs[count] = tmpl;
8886 specs[count++].index = CURR_SLOT.qp_regno;
8887 }
8888 if (idesc->operands[1] == IA64_OPND_PR)
8889 {
139368c9 8890 for (i = 16; i < 63; i++)
542d6675
KH		 8891 {
8892 specs[count] = tmpl;
8893 specs[count++].index = i;
8894 }
8895 }
8896 }
8897 }
197865e8 8898 else
542d6675
KH		 8899 {
8900 UNHANDLED;
8901 }
800eeca4
JW		 8902 break;
8903
8904 case IA64_RS_PSR:
197865e8 8905 /* Verify that the instruction is using the PSR bit indicated in
542d6675 8906 dep->regindex. */
800eeca4 8907 if (note == 0)
542d6675
KH		 8908 {
8909 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8910 {
8911 if (dep->regindex < 6)
8912 {
8913 specs[count++] = tmpl;
8914 }
8915 }
8916 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8917 {
8918 if (dep->regindex < 32
8919 || dep->regindex == 35
8920 || dep->regindex == 36
8921 || (!rsrc_write && dep->regindex == PSR_CPL))
8922 {
8923 specs[count++] = tmpl;
8924 }
8925 }
8926 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8927 {
8928 if (dep->regindex < 32
8929 || dep->regindex == 35
8930 || dep->regindex == 36
8931 || (rsrc_write && dep->regindex == PSR_CPL))
8932 {
8933 specs[count++] = tmpl;
8934 }
8935 }
8936 else
8937 {
8938 /* Several PSR bits have very specific dependencies. */
8939 switch (dep->regindex)
8940 {
8941 default:
8942 specs[count++] = tmpl;
8943 break;
8944 case PSR_IC:
8945 if (rsrc_write)
8946 {
8947 specs[count++] = tmpl;
8948 }
8949 else
8950 {
8951 /* Only certain CR accesses use PSR.ic */
8952 if (idesc->operands[0] == IA64_OPND_CR3
8953 || idesc->operands[1] == IA64_OPND_CR3)
8954 {
8955 int index =
8956 ((idesc->operands[0] == IA64_OPND_CR3)
8957 ? 0 : 1);
8958 int regno =
8959 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8960
8961 switch (regno)
8962 {
8963 default:
8964 break;
8965 case CR_ITIR:
8966 case CR_IFS:
8967 case CR_IIM:
8968 case CR_IIP:
8969 case CR_IPSR:
8970 case CR_ISR:
8971 case CR_IFA:
8972 case CR_IHA:
8973 case CR_IIPA:
8974 specs[count++] = tmpl;
8975 break;
8976 }
8977 }
8978 }
8979 break;
8980 case PSR_CPL:
8981 if (rsrc_write)
8982 {
8983 specs[count++] = tmpl;
8984 }
8985 else
8986 {
8987 /* Only some AR accesses use cpl */
8988 if (idesc->operands[0] == IA64_OPND_AR3
8989 || idesc->operands[1] == IA64_OPND_AR3)
8990 {
8991 int index =
8992 ((idesc->operands[0] == IA64_OPND_AR3)
8993 ? 0 : 1);
8994 int regno =
8995 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8996
8997 if (regno == AR_ITC
8998 || (index == 0
8999 && (regno == AR_ITC
9000 || regno == AR_RSC
9001 || (regno >= AR_K0
9002 && regno <= AR_K7))))
9003 {
9004 specs[count++] = tmpl;
9005 }
9006 }
9007 else
9008 {
9009 specs[count++] = tmpl;
9010 }
9011 break;
9012 }
9013 }
9014 }
9015 }
800eeca4 9016 else if (note == 7)
542d6675
KH		 9017 {
9018 valueT mask = 0;
9019 if (idesc->operands[0] == IA64_OPND_IMMU24)
9020 {
9021 mask = CURR_SLOT.opnd[0].X_add_number;
9022 }
9023 else
9024 {
9025 UNHANDLED;
9026 }
9027 if (mask & ((valueT) 1 << dep->regindex))
9028 {
9029 specs[count++] = tmpl;
9030 }
9031 }
800eeca4 9032 else if (note == 8)
542d6675
KH		 9033 {
9034 int min = dep->regindex == PSR_DFL ? 2 : 32;
9035 int max = dep->regindex == PSR_DFL ? 31 : 127;
9036 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9037 for (i = 0; i < NELEMS (idesc->operands); i++)
9038 {
9039 if (idesc->operands[i] == IA64_OPND_F1
9040 || idesc->operands[i] == IA64_OPND_F2
9041 || idesc->operands[i] == IA64_OPND_F3
9042 || idesc->operands[i] == IA64_OPND_F4)
9043 {
9044 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9045 if (reg >= min && reg <= max)
9046 {
9047 specs[count++] = tmpl;
9048 }
9049 }
9050 }
9051 }
800eeca4 9052 else if (note == 9)
542d6675
KH		 9053 {
9054 int min = dep->regindex == PSR_MFL ? 2 : 32;
9055 int max = dep->regindex == PSR_MFL ? 31 : 127;
9056 /* mfh is read on writes to FR32-127; mfl is read on writes to
9057 FR2-31 */
9058 for (i = 0; i < idesc->num_outputs; i++)
9059 {
9060 if (idesc->operands[i] == IA64_OPND_F1)
9061 {
9062 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9063 if (reg >= min && reg <= max)
9064 {
9065 specs[count++] = tmpl;
9066 }
9067 }
9068 }
9069 }
800eeca4 9070 else if (note == 10)
542d6675
KH		 9071 {
9072 for (i = 0; i < NELEMS (idesc->operands); i++)
9073 {
9074 if (idesc->operands[i] == IA64_OPND_R1
9075 || idesc->operands[i] == IA64_OPND_R2
9076 || idesc->operands[i] == IA64_OPND_R3)
9077 {
9078 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9079 if (regno >= 16 && regno <= 31)
9080 {
9081 specs[count++] = tmpl;
9082 }
9083 }
9084 }
9085 }
800eeca4 9086 else
542d6675
KH		 9087 {
9088 UNHANDLED;
9089 }
800eeca4
JW		 9090 break;
9091
9092 case IA64_RS_AR_FPSR:
9093 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9094 {
9095 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9096 if (regno == AR_FPSR)
9097 {
9098 specs[count++] = tmpl;
9099 }
9100 }
800eeca4 9101 else
542d6675
KH		 9102 {
9103 specs[count++] = tmpl;
9104 }
800eeca4
JW		 9105 break;
9106
197865e8 9107 case IA64_RS_ARX:
800eeca4
JW		 9108 /* Handle all AR[REG] resources */
9109 if (note == 0 || note == 1)
542d6675
KH		 9110 {
9111 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9112 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9113 && regno == dep->regindex)
9114 {
9115 specs[count++] = tmpl;
9116 }
9117 /* other AR[REG] resources may be affected by AR accesses */
9118 else if (idesc->operands[0] == IA64_OPND_AR3)
9119 {
9120 /* AR[] writes */
9121 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9122 switch (dep->regindex)
9123 {
9124 default:
9125 break;
9126 case AR_BSP:
9127 case AR_RNAT:
9128 if (regno == AR_BSPSTORE)
9129 {
9130 specs[count++] = tmpl;
9131 }
9132 case AR_RSC:
9133 if (!rsrc_write &&
9134 (regno == AR_BSPSTORE
9135 || regno == AR_RNAT))
9136 {
9137 specs[count++] = tmpl;
9138 }
9139 break;
9140 }
9141 }
9142 else if (idesc->operands[1] == IA64_OPND_AR3)
9143 {
9144 /* AR[] reads */
9145 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9146 switch (dep->regindex)
9147 {
9148 default:
9149 break;
9150 case AR_RSC:
9151 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9152 {
9153 specs[count++] = tmpl;
9154 }
9155 break;
9156 }
9157 }
9158 else
9159 {
9160 specs[count++] = tmpl;
9161 }
9162 }
800eeca4 9163 else
542d6675
KH		 9164 {
9165 UNHANDLED;
9166 }
800eeca4
JW		 9167 break;
9168
9169 case IA64_RS_CRX:
9170 /* Handle all CR[REG] resources */
9171 if (note == 0 || note == 1)
542d6675
KH		 9172 {
9173 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9174 {
9175 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9176 if (regno == dep->regindex)
9177 {
9178 specs[count++] = tmpl;
9179 }
9180 else if (!rsrc_write)
9181 {
9182 /* Reads from CR[IVR] affect other resources. */
9183 if (regno == CR_IVR)
9184 {
9185 if ((dep->regindex >= CR_IRR0
9186 && dep->regindex <= CR_IRR3)
9187 || dep->regindex == CR_TPR)
9188 {
9189 specs[count++] = tmpl;
9190 }
9191 }
9192 }
9193 }
9194 else
9195 {
9196 specs[count++] = tmpl;
9197 }
9198 }
800eeca4 9199 else
542d6675
KH		 9200 {
9201 UNHANDLED;
9202 }
800eeca4
JW		 9203 break;
9204
9205 case IA64_RS_INSERVICE:
9206 /* look for write of EOI (67) or read of IVR (65) */
9207 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9208 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9209 || (idesc->operands[1] == IA64_OPND_CR3
9210 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9211 {
9212 specs[count++] = tmpl;
9213 }
800eeca4
JW		 9214 break;
9215
9216 case IA64_RS_GR0:
9217 if (note == 1)
542d6675
KH		 9218 {
9219 specs[count++] = tmpl;
9220 }
800eeca4 9221 else
542d6675
KH		 9222 {
9223 UNHANDLED;
9224 }
800eeca4
JW		 9225 break;
9226
9227 case IA64_RS_CFM:
9228 if (note != 2)
542d6675
KH		 9229 {
9230 specs[count++] = tmpl;
9231 }
800eeca4 9232 else
542d6675
KH		 9233 {
9234 /* Check if any of the registers accessed are in the rotating region.
9235 mov to/from pr accesses CFM only when qp_regno is in the rotating
9236 region */
9237 for (i = 0; i < NELEMS (idesc->operands); i++)
9238 {
9239 if (idesc->operands[i] == IA64_OPND_R1
9240 || idesc->operands[i] == IA64_OPND_R2
9241 || idesc->operands[i] == IA64_OPND_R3)
9242 {
9243 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9244 /* Assumes that md.rot.num_regs is always valid */
9245 if (md.rot.num_regs > 0
9246 && num > 31
9247 && num < 31 + md.rot.num_regs)
9248 {
9249 specs[count] = tmpl;
9250 specs[count++].specific = 0;
9251 }
9252 }
9253 else if (idesc->operands[i] == IA64_OPND_F1
9254 || idesc->operands[i] == IA64_OPND_F2
9255 || idesc->operands[i] == IA64_OPND_F3
9256 || idesc->operands[i] == IA64_OPND_F4)
9257 {
9258 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9259 if (num > 31)
9260 {
9261 specs[count] = tmpl;
9262 specs[count++].specific = 0;
9263 }
9264 }
9265 else if (idesc->operands[i] == IA64_OPND_P1
9266 || idesc->operands[i] == IA64_OPND_P2)
9267 {
9268 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9269 if (num > 15)
9270 {
9271 specs[count] = tmpl;
9272 specs[count++].specific = 0;
9273 }
9274 }
9275 }
9276 if (CURR_SLOT.qp_regno > 15)
9277 {
9278 specs[count] = tmpl;
9279 specs[count++].specific = 0;
9280 }
9281 }
800eeca4
JW		 9282 break;
9283
139368c9
JW		 9284 /* This is the same as IA64_RS_PRr, except simplified to account for
9285 the fact that there is only one register. */
800eeca4
JW		 9286 case IA64_RS_PR63:
9287 if (note == 0)
542d6675
KH		 9288 {
9289 specs[count++] = tmpl;
9290 }
139368c9 9291 else if (note == 7)
40449e9f
KH		 9292 {
9293 valueT mask = 0;
9294 if (idesc->operands[2] == IA64_OPND_IMM17)
9295 mask = CURR_SLOT.opnd[2].X_add_number;
9296 if (mask & ((valueT) 1 << 63))
139368c9 9297 specs[count++] = tmpl;
40449e9f 9298 }
800eeca4 9299 else if (note == 11)
542d6675
KH		 9300 {
9301 if ((idesc->operands[0] == IA64_OPND_P1
9302 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9303 || (idesc->operands[1] == IA64_OPND_P2
9304 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9305 {
9306 specs[count++] = tmpl;
9307 }
9308 }
800eeca4 9309 else if (note == 12)
542d6675
KH		 9310 {
9311 if (CURR_SLOT.qp_regno == 63)
9312 {
9313 specs[count++] = tmpl;
9314 }
9315 }
800eeca4 9316 else if (note == 1)
542d6675
KH		 9317 {
9318 if (rsrc_write)
9319 {
40449e9f
KH		 9320 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9321 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9322 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9323 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9324
4a4f25cf 9325 if (p1 == 63
7484b8e6
TW		 9326 && (idesc->operands[0] == IA64_OPND_P1
9327 || idesc->operands[0] == IA64_OPND_P2))
9328 {
40449e9f 9329 specs[count] = tmpl;
4a4f25cf 9330 specs[count++].cmp_type =
7484b8e6
TW		 9331 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9332 }
9333 if (p2 == 63
9334 && (idesc->operands[1] == IA64_OPND_P1
9335 || idesc->operands[1] == IA64_OPND_P2))
9336 {
40449e9f 9337 specs[count] = tmpl;
4a4f25cf 9338 specs[count++].cmp_type =
7484b8e6
TW		 9339 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9340 }
542d6675
KH		 9341 }
9342 else
9343 {
9344 if (CURR_SLOT.qp_regno == 63)
9345 {
9346 specs[count++] = tmpl;
9347 }
9348 }
9349 }
800eeca4 9350 else
542d6675
KH		 9351 {
9352 UNHANDLED;
9353 }
800eeca4
JW		 9354 break;
9355
9356 case IA64_RS_RSE:
9357 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9358 read resources have not yet been completely identified, so for now
9359 treat RSE as a single resource */
800eeca4 9360 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9361 {
9362 if (rsrc_write)
9363 {
9364 if (idesc->operands[0] == IA64_OPND_AR3
9365 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9366 {
a66d2bb7 9367 specs[count++] = tmpl;
542d6675
KH		 9368 }
9369 }
9370 else
9371 {
9372 if (idesc->operands[0] == IA64_OPND_AR3)
9373 {
9374 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9375 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9376 {
9377 specs[count++] = tmpl;
9378 }
9379 }
9380 else if (idesc->operands[1] == IA64_OPND_AR3)
9381 {
9382 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9383 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9384 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9385 {
9386 specs[count++] = tmpl;
9387 }
9388 }
9389 }
9390 }
197865e8 9391 else
542d6675
KH		 9392 {
9393 specs[count++] = tmpl;
9394 }
800eeca4
JW		 9395 break;
9396
9397 case IA64_RS_ANY:
9398 /* FIXME -- do any of these need to be non-specific? */
9399 specs[count++] = tmpl;
9400 break;
9401
9402 default:
9403 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9404 break;
9405 }
9406
9407 return count;
9408}
9409
9410/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9411 QP of the marking instruction and a subsequent branch on the same QP. */
9412
800eeca4
JW		 9413static void
9414clear_qp_branch_flag (mask)
542d6675 9415 valueT mask;
800eeca4
JW		 9416{
9417 int i;
542d6675 9418 for (i = 0; i < regdepslen; i++)
800eeca4 9419 {
197865e8 9420 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9421 if ((bit & mask) != 0)
542d6675
KH		 9422 {
9423 regdeps[i].link_to_qp_branch = 0;
9424 }
800eeca4
JW		 9425 }
9426}
9427
5e2f6673
L		 9428/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9429 any mutexes which contain one of the PRs and create new ones when
9430 needed. */
9431
9432static int
9433update_qp_mutex (valueT mask)
9434{
9435 int i;
9436 int add = 0;
9437
9438 i = 0;
9439 while (i < qp_mutexeslen)
9440 {
9441 if ((qp_mutexes[i].prmask & mask) != 0)
9442 {
9443 /* If it destroys and creates the same mutex, do nothing. */
9444 if (qp_mutexes[i].prmask == mask
9445 && qp_mutexes[i].path == md.path)
9446 {
9447 i++;
9448 add = -1;
9449 }
9450 else
9451 {
9452 int keep = 0;
9453
9454 if (md.debug_dv)
9455 {
9456 fprintf (stderr, " Clearing mutex relation");
9457 print_prmask (qp_mutexes[i].prmask);
9458 fprintf (stderr, "\n");
9459 }
9460
9461 /* Deal with the old mutex with more than 3+ PRs only if
9462 the new mutex on the same execution path with it.
9463
9464 FIXME: The 3+ mutex support is incomplete.
9465 dot_pred_rel () may be a better place to fix it. */
9466 if (qp_mutexes[i].path == md.path)
9467 {
9468 /* If it is a proper subset of the mutex, create a
9469 new mutex. */
9470 if (add == 0
9471 && (qp_mutexes[i].prmask & mask) == mask)
9472 add = 1;
9473
9474 qp_mutexes[i].prmask &= ~mask;
9475 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9476 {
9477 /* Modify the mutex if there are more than one
9478 PR left. */
9479 keep = 1;
9480 i++;
9481 }
9482 }
9483
9484 if (keep == 0)
9485 /* Remove the mutex. */
9486 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9487 }
9488 }
9489 else
9490 ++i;
9491 }
9492
9493 if (add == 1)
9494 add_qp_mutex (mask);
9495
9496 return add;
9497}
9498
197865e8 9499/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9500
542d6675
KH		 9501 Any changes to a PR clears the mutex relations which include that PR. */
9502
800eeca4
JW		 9503static void
9504clear_qp_mutex (mask)
542d6675 9505 valueT mask;
800eeca4
JW		 9506{
9507 int i;
9508
9509 i = 0;
9510 while (i < qp_mutexeslen)
9511 {
9512 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9513 {
9514 if (md.debug_dv)
9515 {
9516 fprintf (stderr, " Clearing mutex relation");
9517 print_prmask (qp_mutexes[i].prmask);
9518 fprintf (stderr, "\n");
9519 }
9520 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9521 }
800eeca4 9522 else
542d6675 9523 ++i;
800eeca4
JW		 9524 }
9525}
9526
9527/* Clear implies relations which contain PRs in the given masks.
9528 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9529 indicates the implied PR. */
9530
800eeca4
JW		 9531static void
9532clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9533 valueT p1_mask;
9534 valueT p2_mask;
800eeca4
JW		 9535{
9536 int i;
9537
9538 i = 0;
9539 while (i < qp_implieslen)
9540 {
197865e8 9541 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9542 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9543 {
9544 if (md.debug_dv)
9545 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9546 qp_implies[i].p1, qp_implies[i].p2);
9547 qp_implies[i] = qp_implies[--qp_implieslen];
9548 }
197865e8 9549 else
542d6675 9550 ++i;
800eeca4
JW		 9551 }
9552}
9553
542d6675
KH		 9554/* Add the PRs specified to the list of implied relations. */
9555
800eeca4
JW		 9556static void
9557add_qp_imply (p1, p2)
542d6675 9558 int p1, p2;
800eeca4
JW		 9559{
9560 valueT mask;
9561 valueT bit;
9562 int i;
9563
542d6675 9564 /* p0 is not meaningful here. */
800eeca4
JW		 9565 if (p1 == 0 || p2 == 0)
9566 abort ();
9567
9568 if (p1 == p2)
9569 return;
9570
542d6675
KH		 9571 /* If it exists already, ignore it. */
9572 for (i = 0; i < qp_implieslen; i++)
800eeca4 9573 {
197865e8 9574 if (qp_implies[i].p1 == p1
542d6675
KH		 9575 && qp_implies[i].p2 == p2
9576 && qp_implies[i].path == md.path
9577 && !qp_implies[i].p2_branched)
9578 return;
800eeca4
JW		 9579 }
9580
9581 if (qp_implieslen == qp_impliestotlen)
9582 {
9583 qp_impliestotlen += 20;
9584 qp_implies = (struct qp_imply *)
542d6675
KH		 9585 xrealloc ((void *) qp_implies,
9586 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9587 }
9588 if (md.debug_dv)
9589 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9590 qp_implies[qp_implieslen].p1 = p1;
9591 qp_implies[qp_implieslen].p2 = p2;
9592 qp_implies[qp_implieslen].path = md.path;
9593 qp_implies[qp_implieslen++].p2_branched = 0;
9594
9595 /* Add in the implied transitive relations; for everything that p2 implies,
9596 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9597 as well. */
542d6675 9598 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9599 {
9600 if (qp_implies[i].p1 == p2)
542d6675 9601 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9602 if (qp_implies[i].p2 == p1)
542d6675 9603 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9604 }
9605 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9606 relation containing p2, duplicate it and replace p2 with p1. */
9607 bit = (valueT) 1 << p1;
9608 mask = (valueT) 1 << p2;
542d6675 9609 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9610 {
9611 if (qp_mutexes[i].prmask & mask)
542d6675 9612 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9613 }
9614}
9615
800eeca4
JW		 9616/* Add the PRs specified in the mask to the mutex list; this means that only
9617 one of the PRs can be true at any time. PR0 should never be included in
9618 the mask. */
542d6675 9619
800eeca4
JW		 9620static void
9621add_qp_mutex (mask)
542d6675 9622 valueT mask;
800eeca4
JW		 9623{
9624 if (mask & 0x1)
9625 abort ();
9626
9627 if (qp_mutexeslen == qp_mutexestotlen)
9628 {
9629 qp_mutexestotlen += 20;
9630 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9631 xrealloc ((void *) qp_mutexes,
9632 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9633 }
9634 if (md.debug_dv)
9635 {
9636 fprintf (stderr, " Registering mutex on");
9637 print_prmask (mask);
9638 fprintf (stderr, "\n");
9639 }
9640 qp_mutexes[qp_mutexeslen].path = md.path;
9641 qp_mutexes[qp_mutexeslen++].prmask = mask;
9642}
9643
cb5301b6
RH		 9644static int
9645has_suffix_p (name, suffix)
40449e9f
KH		 9646 const char *name;
9647 const char *suffix;
cb5301b6
RH		 9648{
9649 size_t namelen = strlen (name);
9650 size_t sufflen = strlen (suffix);
9651
9652 if (namelen <= sufflen)
9653 return 0;
9654 return strcmp (name + namelen - sufflen, suffix) == 0;
9655}
9656
800eeca4
JW		 9657static void
9658clear_register_values ()
9659{
9660 int i;
9661 if (md.debug_dv)
9662 fprintf (stderr, " Clearing register values\n");
542d6675 9663 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9664 gr_values[i].known = 0;
9665}
9666
9667/* Keep track of register values/changes which affect DV tracking.
9668
9669 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9670 have to examine a group of strings to identify them. */
800eeca4 9671
800eeca4
JW		 9672static void
9673note_register_values (idesc)
542d6675 9674 struct ia64_opcode *idesc;
800eeca4
JW		 9675{
9676 valueT qp_changemask = 0;
9677 int i;
9678
542d6675
KH		 9679 /* Invalidate values for registers being written to. */
9680 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9681 {
197865e8 9682 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9683 || idesc->operands[i] == IA64_OPND_R2
9684 || idesc->operands[i] == IA64_OPND_R3)
9685 {
9686 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9687 if (regno > 0 && regno < NELEMS (gr_values))
9688 gr_values[regno].known = 0;
9689 }
50b81f19
JW		 9690 else if (idesc->operands[i] == IA64_OPND_R3_2)
9691 {
9692 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9693 if (regno > 0 && regno < 4)
9694 gr_values[regno].known = 0;
9695 }
197865e8 9696 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9697 || idesc->operands[i] == IA64_OPND_P2)
9698 {
9699 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9700 qp_changemask |= (valueT) 1 << regno;
9701 }
800eeca4 9702 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9703 {
9704 if (idesc->operands[2] & (valueT) 0x10000)
9705 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9706 else
9707 qp_changemask = idesc->operands[2];
9708 break;
9709 }
800eeca4 9710 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9711 {
9712 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9713 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9714 else
9715 qp_changemask = idesc->operands[1];
9716 qp_changemask &= ~(valueT) 0xFFFF;
9717 break;
9718 }
9719 }
9720
9721 /* Always clear qp branch flags on any PR change. */
9722 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9723 clear_qp_branch_flag (qp_changemask);
9724
542d6675 9725 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9726 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9727 {
197865e8 9728 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9729 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9730 {
9731 for (i = 32; i < 32 + md.rot.num_regs; i++)
9732 gr_values[i].known = 0;
9733 }
800eeca4
JW		 9734 clear_qp_mutex (qp_changemask);
9735 clear_qp_implies (qp_changemask, qp_changemask);
9736 }
542d6675
KH		 9737 /* After a call, all register values are undefined, except those marked
9738 as "safe". */
800eeca4 9739 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9740 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9741 {
56d27c17 9742 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9743 clear_register_values ();
9744 clear_qp_mutex (~qp_safe_across_calls);
9745 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9746 clear_qp_branch_flag (~qp_safe_across_calls);
9747 }
e9718fe1 9748 else if (is_interruption_or_rfi (idesc)
542d6675 9749 || is_taken_branch (idesc))
e9718fe1
TW		 9750 {
9751 clear_register_values ();
197865e8
KH		 9752 clear_qp_mutex (~(valueT) 0);
9753 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9754 }
542d6675 9755 /* Look for mutex and implies relations. */
197865e8 9756 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9757 || idesc->operands[0] == IA64_OPND_P2)
9758 && (idesc->operands[1] == IA64_OPND_P1
9759 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9760 {
9761 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9762 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9763 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9764 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 9765
5e2f6673
L		 9766 /* If both PRs are PR0, we can't really do anything. */
9767 if (p1 == 0 && p2 == 0)
542d6675
KH		 9768 {
9769 if (md.debug_dv)
9770 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9771 }
800eeca4 9772 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 9773 with the following exceptions. */
cb5301b6
RH		 9774 else if (has_suffix_p (idesc->name, ".or.andcm")
9775 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 9776 {
542d6675
KH		 9777 clear_qp_implies (p2mask, p1mask);
9778 }
cb5301b6
RH		 9779 else if (has_suffix_p (idesc->name, ".andcm")
9780 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 9781 {
9782 clear_qp_implies (0, p1mask | p2mask);
9783 }
cb5301b6
RH		 9784 else if (has_suffix_p (idesc->name, ".orcm")
9785 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 9786 {
9787 clear_qp_mutex (p1mask | p2mask);
9788 clear_qp_implies (p1mask | p2mask, 0);
9789 }
800eeca4 9790 else
542d6675 9791 {
5e2f6673
L		 9792 int added = 0;
9793
542d6675 9794 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 9795
9796 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9797 if (p1 == 0 || p2 == 0)
9798 clear_qp_mutex (p1mask | p2mask);
9799 else
9800 added = update_qp_mutex (p1mask | p2mask);
9801
9802 if (CURR_SLOT.qp_regno == 0
9803 || has_suffix_p (idesc->name, ".unc"))
542d6675 9804 {
5e2f6673
L		 9805 if (added == 0 && p1 && p2)
9806 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 9807 if (CURR_SLOT.qp_regno != 0)
9808 {
5e2f6673
L		 9809 if (p1)
9810 add_qp_imply (p1, CURR_SLOT.qp_regno);
9811 if (p2)
9812 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 9813 }
9814 }
542d6675
KH		 9815 }
9816 }
9817 /* Look for mov imm insns into GRs. */
800eeca4 9818 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 9819 && (idesc->operands[1] == IA64_OPND_IMM22
9820 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 9821 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 9822 && (strcmp (idesc->name, "mov") == 0
9823 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 9824 {
9825 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 9826 if (regno > 0 && regno < NELEMS (gr_values))
9827 {
9828 gr_values[regno].known = 1;
9829 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9830 gr_values[regno].path = md.path;
9831 if (md.debug_dv)
2434f565
JW		 9832 {
9833 fprintf (stderr, " Know gr%d = ", regno);
9834 fprintf_vma (stderr, gr_values[regno].value);
9835 fputs ("\n", stderr);
9836 }
542d6675 9837 }
800eeca4 9838 }
a66d2bb7
JB		 9839 /* Look for dep.z imm insns. */
9840 else if (idesc->operands[0] == IA64_OPND_R1
9841 && idesc->operands[1] == IA64_OPND_IMM8
9842 && strcmp (idesc->name, "dep.z") == 0)
9843 {
9844 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9845 if (regno > 0 && regno < NELEMS (gr_values))
9846 {
9847 valueT value = CURR_SLOT.opnd[1].X_add_number;
9848
9849 if (CURR_SLOT.opnd[3].X_add_number < 64)
9850 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
9851 value <<= CURR_SLOT.opnd[2].X_add_number;
9852 gr_values[regno].known = 1;
9853 gr_values[regno].value = value;
9854 gr_values[regno].path = md.path;
9855 if (md.debug_dv)
9856 {
9857 fprintf (stderr, " Know gr%d = ", regno);
9858 fprintf_vma (stderr, gr_values[regno].value);
9859 fputs ("\n", stderr);
9860 }
9861 }
9862 }
197865e8 9863 else
800eeca4
JW		 9864 {
9865 clear_qp_mutex (qp_changemask);
9866 clear_qp_implies (qp_changemask, qp_changemask);
9867 }
9868}
9869
542d6675
KH		 9870/* Return whether the given predicate registers are currently mutex. */
9871
800eeca4
JW		 9872static int
9873qp_mutex (p1, p2, path)
542d6675
KH		 9874 int p1;
9875 int p2;
9876 int path;
800eeca4
JW		 9877{
9878 int i;
9879 valueT mask;
9880
9881 if (p1 != p2)
9882 {
542d6675
KH		 9883 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9884 for (i = 0; i < qp_mutexeslen; i++)
9885 {
9886 if (qp_mutexes[i].path >= path
9887 && (qp_mutexes[i].prmask & mask) == mask)
9888 return 1;
9889 }
800eeca4
JW		 9890 }
9891 return 0;
9892}
9893
9894/* Return whether the given resource is in the given insn's list of chks
9895 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 9896 conflict. */
9897
800eeca4
JW		 9898static int
9899resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 9900 struct rsrc *rs;
9901 struct ia64_opcode *idesc;
9902 int note;
9903 int qp_regno;
9904 int path;
800eeca4
JW		 9905{
9906 struct rsrc specs[MAX_SPECS];
9907 int count;
9908
9909 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9910 we don't need to check. One exception is note 11, which indicates that
9911 target predicates are written regardless of PR[qp]. */
197865e8 9912 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 9913 && note != 11)
9914 return 0;
9915
9916 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9917 while (count-- > 0)
9918 {
9919 /* UNAT checking is a bit more specific than other resources */
9920 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 9921 && specs[count].mem_offset.hint
9922 && rs->mem_offset.hint)
9923 {
9924 if (rs->mem_offset.base == specs[count].mem_offset.base)
9925 {
9926 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9927 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9928 return 1;
9929 else
9930 continue;
9931 }
9932 }
800eeca4 9933
7484b8e6 9934 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 9935 writes are an OR. */
7484b8e6 9936 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 9937 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 9938 || rs->dependency->specifier == IA64_RS_PR63)
9939 {
9940 if (specs[count].cmp_type != CMP_NONE
9941 && specs[count].cmp_type == rs->cmp_type)
9942 {
9943 if (md.debug_dv)
9944 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9945 dv_mode[rs->dependency->mode],
afa680f8 9946 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 9947 specs[count].index : 63);
9948 continue;
9949 }
9950 if (md.debug_dv)
4a4f25cf 9951 fprintf (stderr,
7484b8e6
TW		 9952 " %s on parallel compare conflict %s vs %s on PR%d\n",
9953 dv_mode[rs->dependency->mode],
4a4f25cf 9954 dv_cmp_type[rs->cmp_type],
7484b8e6 9955 dv_cmp_type[specs[count].cmp_type],
afa680f8 9956 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 9957 specs[count].index : 63);
4a4f25cf 9958
7484b8e6
TW		 9959 }
9960
800eeca4 9961 /* If either resource is not specific, conservatively assume a conflict
197865e8 9962 */
800eeca4 9963 if (!specs[count].specific || !rs->specific)
542d6675 9964 return 2;
800eeca4 9965 else if (specs[count].index == rs->index)
542d6675 9966 return 1;
800eeca4 9967 }
800eeca4
JW		 9968
9969 return 0;
9970}
9971
9972/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9973 insert a stop to create the break. Update all resource dependencies
9974 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9975 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9976 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 9977 instruction. */
800eeca4
JW		 9978
9979static void
9980insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 9981 int insert_stop;
9982 int qp_regno;
9983 int save_current;
800eeca4
JW		 9984{
9985 int i;
9986
9987 if (insert_stop && md.num_slots_in_use > 0)
9988 PREV_SLOT.end_of_insn_group = 1;
9989
9990 if (md.debug_dv)
9991 {
197865e8 9992 fprintf (stderr, " Insn group break%s",
542d6675 9993 (insert_stop ? " (w/stop)" : ""));
800eeca4 9994 if (qp_regno != 0)
542d6675 9995 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 9996 fprintf (stderr, "\n");
9997 }
9998
9999 i = 0;
10000 while (i < regdepslen)
10001 {
10002 const struct ia64_dependency *dep = regdeps[i].dependency;
10003
10004 if (qp_regno != 0
542d6675
KH		 10005 && regdeps[i].qp_regno != qp_regno)
10006 {
10007 ++i;
10008 continue;
10009 }
800eeca4
JW		 10010
10011 if (save_current
542d6675
KH		 10012 && CURR_SLOT.src_file == regdeps[i].file
10013 && CURR_SLOT.src_line == regdeps[i].line)
10014 {
10015 ++i;
10016 continue;
10017 }
800eeca4
JW		 10018
10019 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10020 those that have reached the appropriate state of insn serialization */
800eeca4 10021 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10022 || dep->semantics == IA64_DVS_IMPLIEDF
10023 || regdeps[i].insn_srlz == STATE_SRLZ)
10024 {
10025 print_dependency ("Removing", i);
10026 regdeps[i] = regdeps[--regdepslen];
10027 }
800eeca4 10028 else
542d6675
KH		 10029 {
10030 if (dep->semantics == IA64_DVS_DATA
10031 || dep->semantics == IA64_DVS_INSTR
800eeca4 10032 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10033 {
10034 if (regdeps[i].insn_srlz == STATE_NONE)
10035 regdeps[i].insn_srlz = STATE_STOP;
10036 if (regdeps[i].data_srlz == STATE_NONE)
10037 regdeps[i].data_srlz = STATE_STOP;
10038 }
10039 ++i;
10040 }
800eeca4
JW		 10041 }
10042}
10043
542d6675
KH		 10044/* Add the given resource usage spec to the list of active dependencies. */
10045
197865e8 10046static void
800eeca4 10047mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10048 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10049 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10050 struct rsrc *spec;
10051 int depind;
10052 int path;
800eeca4
JW		 10053{
10054 if (regdepslen == regdepstotlen)
10055 {
10056 regdepstotlen += 20;
10057 regdeps = (struct rsrc *)
542d6675 10058 xrealloc ((void *) regdeps,
bc805888 10059 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10060 }
10061
10062 regdeps[regdepslen] = *spec;
10063 regdeps[regdepslen].depind = depind;
10064 regdeps[regdepslen].path = path;
10065 regdeps[regdepslen].file = CURR_SLOT.src_file;
10066 regdeps[regdepslen].line = CURR_SLOT.src_line;
10067
10068 print_dependency ("Adding", regdepslen);
10069
10070 ++regdepslen;
10071}
10072
10073static void
10074print_dependency (action, depind)
542d6675
KH		 10075 const char *action;
10076 int depind;
800eeca4
JW		 10077{
10078 if (md.debug_dv)
10079 {
197865e8 10080 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10081 action, dv_mode[(regdeps[depind].dependency)->mode],
10082 (regdeps[depind].dependency)->name);
a66d2bb7 10083 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10084 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10085 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10086 {
10087 fputs (" ", stderr);
10088 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10089 fputs ("+", stderr);
10090 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10091 }
800eeca4
JW		 10092 fprintf (stderr, "\n");
10093 }
10094}
10095
10096static void
10097instruction_serialization ()
10098{
10099 int i;
10100 if (md.debug_dv)
10101 fprintf (stderr, " Instruction serialization\n");
542d6675 10102 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10103 if (regdeps[i].insn_srlz == STATE_STOP)
10104 regdeps[i].insn_srlz = STATE_SRLZ;
10105}
10106
10107static void
10108data_serialization ()
10109{
10110 int i = 0;
10111 if (md.debug_dv)
10112 fprintf (stderr, " Data serialization\n");
10113 while (i < regdepslen)
10114 {
10115 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10116 /* Note: as of 991210, all "other" dependencies are cleared by a
10117 data serialization. This might change with new tables */
10118 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10119 {
10120 print_dependency ("Removing", i);
10121 regdeps[i] = regdeps[--regdepslen];
10122 }
800eeca4 10123 else
542d6675 10124 ++i;
800eeca4
JW		 10125 }
10126}
10127
542d6675
KH		 10128/* Insert stops and serializations as needed to avoid DVs. */
10129
800eeca4
JW		 10130static void
10131remove_marked_resource (rs)
542d6675 10132 struct rsrc *rs;
800eeca4
JW		 10133{
10134 switch (rs->dependency->semantics)
10135 {
10136 case IA64_DVS_SPECIFIC:
10137 if (md.debug_dv)
10138 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10139 /* ...fall through... */
800eeca4
JW		 10140 case IA64_DVS_INSTR:
10141 if (md.debug_dv)
542d6675 10142 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10143 if (rs->insn_srlz < STATE_STOP)
542d6675 10144 insn_group_break (1, 0, 0);
800eeca4 10145 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10146 {
888a75be 10147 struct slot oldslot = CURR_SLOT;
542d6675 10148 /* Manually jam a srlz.i insn into the stream */
888a75be 10149 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10150 CURR_SLOT.user_template = -1;
542d6675
KH		 10151 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10152 instruction_serialization ();
10153 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10154 if (++md.num_slots_in_use >= NUM_SLOTS)
10155 emit_one_bundle ();
888a75be 10156 CURR_SLOT = oldslot;
542d6675 10157 }
800eeca4
JW		 10158 insn_group_break (1, 0, 0);
10159 break;
10160 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10161 "other" types of DV are eliminated
10162 by a data serialization */
800eeca4
JW		 10163 case IA64_DVS_DATA:
10164 if (md.debug_dv)
542d6675 10165 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10166 if (rs->data_srlz < STATE_STOP)
542d6675 10167 insn_group_break (1, 0, 0);
800eeca4 10168 {
888a75be 10169 struct slot oldslot = CURR_SLOT;
542d6675 10170 /* Manually jam a srlz.d insn into the stream */
888a75be 10171 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10172 CURR_SLOT.user_template = -1;
542d6675
KH		 10173 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10174 data_serialization ();
10175 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10176 if (++md.num_slots_in_use >= NUM_SLOTS)
10177 emit_one_bundle ();
888a75be 10178 CURR_SLOT = oldslot;
800eeca4
JW		 10179 }
10180 break;
10181 case IA64_DVS_IMPLIED:
10182 case IA64_DVS_IMPLIEDF:
10183 if (md.debug_dv)
542d6675 10184 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10185 insn_group_break (1, 0, 0);
10186 break;
10187 default:
10188 break;
10189 }
10190}
10191
10192/* Check the resources used by the given opcode against the current dependency
197865e8 10193 list.
800eeca4
JW		 10194
10195 The check is run once for each execution path encountered. In this case,
10196 a unique execution path is the sequence of instructions following a code
10197 entry point, e.g. the following has three execution paths, one starting
10198 at L0, one at L1, and one at L2.
197865e8 10199
800eeca4
JW		 10200 L0: nop
10201 L1: add
10202 L2: add
197865e8 10203 br.ret
800eeca4 10204*/
542d6675 10205
800eeca4
JW		 10206static void
10207check_dependencies (idesc)
542d6675 10208 struct ia64_opcode *idesc;
800eeca4
JW		 10209{
10210 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10211 int path;
10212 int i;
10213
10214 /* Note that the number of marked resources may change within the
197865e8 10215 loop if in auto mode. */
800eeca4
JW		 10216 i = 0;
10217 while (i < regdepslen)
10218 {
10219 struct rsrc *rs = &regdeps[i];
10220 const struct ia64_dependency *dep = rs->dependency;
10221 int chkind;
10222 int note;
10223 int start_over = 0;
10224
10225 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10226 || (chkind = depends_on (rs->depind, idesc)) == -1)
10227 {
10228 ++i;
10229 continue;
10230 }
10231
10232 note = NOTE (opdeps->chks[chkind]);
10233
10234 /* Check this resource against each execution path seen thus far. */
10235 for (path = 0; path <= md.path; path++)
10236 {
10237 int matchtype;
10238
10239 /* If the dependency wasn't on the path being checked, ignore it. */
10240 if (rs->path < path)
10241 continue;
10242
10243 /* If the QP for this insn implies a QP which has branched, don't
10244 bother checking. Ed. NOTE: I don't think this check is terribly
10245 useful; what's the point of generating code which will only be
10246 reached if its QP is zero?
10247 This code was specifically inserted to handle the following code,
10248 based on notes from Intel's DV checking code, where p1 implies p2.
10249
10250 mov r4 = 2
10251 (p2) br.cond L
10252 (p1) mov r4 = 7
10253 */
10254 if (CURR_SLOT.qp_regno != 0)
10255 {
10256 int skip = 0;
10257 int implies;
10258 for (implies = 0; implies < qp_implieslen; implies++)
10259 {
10260 if (qp_implies[implies].path >= path
10261 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10262 && qp_implies[implies].p2_branched)
10263 {
10264 skip = 1;
10265 break;
10266 }
10267 }
10268 if (skip)
10269 continue;
10270 }
10271
10272 if ((matchtype = resources_match (rs, idesc, note,
10273 CURR_SLOT.qp_regno, path)) != 0)
10274 {
10275 char msg[1024];
10276 char pathmsg[256] = "";
10277 char indexmsg[256] = "";
10278 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10279
10280 if (path != 0)
10281 sprintf (pathmsg, " when entry is at label '%s'",
10282 md.entry_labels[path - 1]);
a66d2bb7 10283 if (matchtype == 1 && rs->index >= 0)
542d6675
KH		 10284 sprintf (indexmsg, ", specific resource number is %d",
10285 rs->index);
10286 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10287 idesc->name,
10288 (certain ? "violates" : "may violate"),
10289 dv_mode[dep->mode], dep->name,
10290 dv_sem[dep->semantics],
10291 pathmsg, indexmsg);
10292
10293 if (md.explicit_mode)
10294 {
10295 as_warn ("%s", msg);
10296 if (path < md.path)
10297 as_warn (_("Only the first path encountering the conflict "
10298 "is reported"));
10299 as_warn_where (rs->file, rs->line,
10300 _("This is the location of the "
10301 "conflicting usage"));
10302 /* Don't bother checking other paths, to avoid duplicating
10303 the same warning */
10304 break;
10305 }
10306 else
10307 {
10308 if (md.debug_dv)
10309 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10310
10311 remove_marked_resource (rs);
10312
10313 /* since the set of dependencies has changed, start over */
10314 /* FIXME -- since we're removing dvs as we go, we
10315 probably don't really need to start over... */
10316 start_over = 1;
10317 break;
10318 }
10319 }
10320 }
800eeca4 10321 if (start_over)
542d6675 10322 i = 0;
800eeca4 10323 else
542d6675 10324 ++i;
800eeca4
JW		 10325 }
10326}
10327
542d6675
KH		 10328/* Register new dependencies based on the given opcode. */
10329
800eeca4
JW		 10330static void
10331mark_resources (idesc)
542d6675 10332 struct ia64_opcode *idesc;
800eeca4
JW		 10333{
10334 int i;
10335 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10336 int add_only_qp_reads = 0;
10337
10338 /* A conditional branch only uses its resources if it is taken; if it is
10339 taken, we stop following that path. The other branch types effectively
10340 *always* write their resources. If it's not taken, register only QP
197865e8 10341 reads. */
800eeca4
JW		 10342 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10343 {
10344 add_only_qp_reads = 1;
10345 }
10346
10347 if (md.debug_dv)
10348 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10349
542d6675 10350 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10351 {
10352 const struct ia64_dependency *dep;
10353 struct rsrc specs[MAX_SPECS];
10354 int note;
10355 int path;
10356 int count;
197865e8 10357
800eeca4 10358 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10359 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10360
10361 if (add_only_qp_reads
542d6675
KH		 10362 && !(dep->mode == IA64_DV_WAR
10363 && (dep->specifier == IA64_RS_PR
139368c9 10364 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10365 || dep->specifier == IA64_RS_PR63)))
10366 continue;
800eeca4
JW		 10367
10368 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10369
800eeca4 10370 while (count-- > 0)
542d6675
KH		 10371 {
10372 mark_resource (idesc, dep, &specs[count],
10373 DEP (opdeps->regs[i]), md.path);
10374 }
800eeca4
JW		 10375
10376 /* The execution path may affect register values, which may in turn
542d6675 10377 affect which indirect-access resources are accessed. */
800eeca4 10378 switch (dep->specifier)
542d6675
KH		 10379 {
10380 default:
10381 break;
10382 case IA64_RS_CPUID:
10383 case IA64_RS_DBR:
10384 case IA64_RS_IBR:
800eeca4 10385 case IA64_RS_MSR:
542d6675
KH		 10386 case IA64_RS_PKR:
10387 case IA64_RS_PMC:
10388 case IA64_RS_PMD:
10389 case IA64_RS_RR:
10390 for (path = 0; path < md.path; path++)
10391 {
10392 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10393 while (count-- > 0)
10394 mark_resource (idesc, dep, &specs[count],
10395 DEP (opdeps->regs[i]), path);
10396 }
10397 break;
10398 }
10399 }
10400}
10401
10402/* Remove dependencies when they no longer apply. */
10403
800eeca4
JW		 10404static void
10405update_dependencies (idesc)
542d6675 10406 struct ia64_opcode *idesc;
800eeca4
JW		 10407{
10408 int i;
10409
10410 if (strcmp (idesc->name, "srlz.i") == 0)
10411 {
10412 instruction_serialization ();
10413 }
10414 else if (strcmp (idesc->name, "srlz.d") == 0)
10415 {
10416 data_serialization ();
10417 }
10418 else if (is_interruption_or_rfi (idesc)
542d6675 10419 || is_taken_branch (idesc))
800eeca4 10420 {
542d6675
KH		 10421 /* Although technically the taken branch doesn't clear dependencies
10422 which require a srlz.[id], we don't follow the branch; the next
10423 instruction is assumed to start with a clean slate. */
800eeca4 10424 regdepslen = 0;
800eeca4
JW		 10425 md.path = 0;
10426 }
10427 else if (is_conditional_branch (idesc)
542d6675 10428 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10429 {
10430 int is_call = strstr (idesc->name, ".call") != NULL;
10431
542d6675
KH		 10432 for (i = 0; i < qp_implieslen; i++)
10433 {
10434 /* If the conditional branch's predicate is implied by the predicate
10435 in an existing dependency, remove that dependency. */
10436 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10437 {
10438 int depind = 0;
10439 /* Note that this implied predicate takes a branch so that if
10440 a later insn generates a DV but its predicate implies this
10441 one, we can avoid the false DV warning. */
10442 qp_implies[i].p2_branched = 1;
10443 while (depind < regdepslen)
10444 {
10445 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10446 {
10447 print_dependency ("Removing", depind);
10448 regdeps[depind] = regdeps[--regdepslen];
10449 }
10450 else
10451 ++depind;
10452 }
10453 }
10454 }
800eeca4 10455 /* Any marked resources which have this same predicate should be
542d6675
KH		 10456 cleared, provided that the QP hasn't been modified between the
10457 marking instruction and the branch. */
800eeca4 10458 if (is_call)
542d6675
KH		 10459 {
10460 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10461 }
800eeca4 10462 else
542d6675
KH		 10463 {
10464 i = 0;
10465 while (i < regdepslen)
10466 {
10467 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10468 && regdeps[i].link_to_qp_branch
10469 && (regdeps[i].file != CURR_SLOT.src_file
10470 || regdeps[i].line != CURR_SLOT.src_line))
10471 {
10472 /* Treat like a taken branch */
10473 print_dependency ("Removing", i);
10474 regdeps[i] = regdeps[--regdepslen];
10475 }
10476 else
10477 ++i;
10478 }
10479 }
800eeca4
JW		 10480 }
10481}
10482
10483/* Examine the current instruction for dependency violations. */
542d6675 10484
800eeca4
JW		 10485static int
10486check_dv (idesc)
542d6675 10487 struct ia64_opcode *idesc;
800eeca4
JW		 10488{
10489 if (md.debug_dv)
10490 {
197865e8 10491 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10492 idesc->name, CURR_SLOT.src_line,
10493 idesc->dependencies->nchks,
10494 idesc->dependencies->nregs);
800eeca4
JW		 10495 }
10496
197865e8 10497 /* Look through the list of currently marked resources; if the current
800eeca4 10498 instruction has the dependency in its chks list which uses that resource,
542d6675 10499 check against the specific resources used. */
800eeca4
JW		 10500 check_dependencies (idesc);
10501
542d6675
KH		 10502 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10503 then add them to the list of marked resources. */
800eeca4
JW		 10504 mark_resources (idesc);
10505
10506 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10507 requirements for being cleared
10508
800eeca4
JW		 10509 Instruction serialization (insns separated by interruption, rfi, or
10510 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10511
10512 Data serialization (instruction serialization, or writer + srlz.d +
10513 reader, where writer and srlz.d are in separate groups) clears
10514 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10515 always be the case).
10516
10517 Instruction group break (groups separated by stop, taken branch,
10518 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10519 */
10520 update_dependencies (idesc);
10521
10522 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10523 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10524 note_register_values (idesc);
10525
197865e8 10526 /* We don't need or want this anymore. */
800eeca4
JW		 10527 md.mem_offset.hint = 0;
10528
10529 return 0;
10530}
10531
10532/* Translate one line of assembly. Pseudo ops and labels do not show
10533 here. */
10534void
10535md_assemble (str)
10536 char *str;
10537{
10538 char *saved_input_line_pointer, *mnemonic;
10539 const struct pseudo_opcode *pdesc;
10540 struct ia64_opcode *idesc;
10541 unsigned char qp_regno;
10542 unsigned int flags;
10543 int ch;
10544
10545 saved_input_line_pointer = input_line_pointer;
10546 input_line_pointer = str;
10547
542d6675 10548 /* extract the opcode (mnemonic): */
800eeca4
JW		 10549
10550 mnemonic = input_line_pointer;
10551 ch = get_symbol_end ();
10552 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10553 if (pdesc)
10554 {
10555 *input_line_pointer = ch;
10556 (*pdesc->handler) (pdesc->arg);
10557 goto done;
10558 }
10559
542d6675 10560 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10561
10562 idesc = ia64_find_opcode (mnemonic);
10563 *input_line_pointer = ch;
10564 if (!idesc)
10565 {
10566 as_bad ("Unknown opcode `%s'", mnemonic);
10567 goto done;
10568 }
10569
10570 idesc = parse_operands (idesc);
10571 if (!idesc)
10572 goto done;
10573
542d6675 10574 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10575 if (idesc->type == IA64_TYPE_DYN)
10576 {
10577 if (strcmp (idesc->name, "add") == 0)
10578 {
10579 if (CURR_SLOT.opnd[2].X_op == O_register
10580 && CURR_SLOT.opnd[2].X_add_number < 4)
10581 mnemonic = "addl";
10582 else
10583 mnemonic = "adds";
3d56ab85 10584 ia64_free_opcode (idesc);
800eeca4 10585 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10586 }
10587 else if (strcmp (idesc->name, "mov") == 0)
10588 {
10589 enum ia64_opnd opnd1, opnd2;
10590 int rop;
10591
10592 opnd1 = idesc->operands[0];
10593 opnd2 = idesc->operands[1];
10594 if (opnd1 == IA64_OPND_AR3)
10595 rop = 0;
10596 else if (opnd2 == IA64_OPND_AR3)
10597 rop = 1;
10598 else
10599 abort ();
652ca075
L		 10600 if (CURR_SLOT.opnd[rop].X_op == O_register)
10601 {
10602 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10603 mnemonic = "mov.i";
97762d08 10604 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10605 mnemonic = "mov.m";
97762d08
JB		 10606 else
10607 rop = -1;
652ca075 10608 }
800eeca4 10609 else
652ca075 10610 abort ();
97762d08
JB		 10611 if (rop >= 0)
10612 {
10613 ia64_free_opcode (idesc);
10614 idesc = ia64_find_opcode (mnemonic);
10615 while (idesc != NULL
10616 && (idesc->operands[0] != opnd1
10617 || idesc->operands[1] != opnd2))
10618 idesc = get_next_opcode (idesc);
10619 }
800eeca4
JW		 10620 }
10621 }
652ca075
L		 10622 else if (strcmp (idesc->name, "mov.i") == 0
10623 || strcmp (idesc->name, "mov.m") == 0)
10624 {
10625 enum ia64_opnd opnd1, opnd2;
10626 int rop;
10627
10628 opnd1 = idesc->operands[0];
10629 opnd2 = idesc->operands[1];
10630 if (opnd1 == IA64_OPND_AR3)
10631 rop = 0;
10632 else if (opnd2 == IA64_OPND_AR3)
10633 rop = 1;
10634 else
10635 abort ();
10636 if (CURR_SLOT.opnd[rop].X_op == O_register)
10637 {
10638 char unit = 'a';
10639 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10640 unit = 'i';
10641 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10642 unit = 'm';
10643 if (unit != 'a' && unit != idesc->name [4])
10644 as_bad ("AR %d cannot be accessed by %c-unit",
10645 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10646 TOUPPER (unit));
10647 }
10648 }
91d777ee
L		 10649 else if (strcmp (idesc->name, "hint.b") == 0)
10650 {
10651 switch (md.hint_b)
10652 {
10653 case hint_b_ok:
10654 break;
10655 case hint_b_warning:
10656 as_warn ("hint.b may be treated as nop");
10657 break;
10658 case hint_b_error:
10659 as_bad ("hint.b shouldn't be used");
10660 break;
10661 }
10662 }
800eeca4
JW		 10663
10664 qp_regno = 0;
10665 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10666 {
10667 qp_regno = md.qp.X_add_number - REG_P;
10668 md.qp.X_op = O_absent;
10669 }
800eeca4
JW		 10670
10671 flags = idesc->flags;
10672
10673 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10674 {
10675 /* The alignment frag has to end with a stop bit only if the
10676 next instruction after the alignment directive has to be
10677 the first instruction in an instruction group. */
10678 if (align_frag)
10679 {
10680 while (align_frag->fr_type != rs_align_code)
10681 {
10682 align_frag = align_frag->fr_next;
bae25f19
L		 10683 if (!align_frag)
10684 break;
9545c4ce 10685 }
bae25f19
L		 10686 /* align_frag can be NULL if there are directives in
10687 between. */
10688 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10689 align_frag->tc_frag_data = 1;
10690 }
10691
10692 insn_group_break (1, 0, 0);
10693 }
10694 align_frag = NULL;
800eeca4
JW		 10695
10696 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10697 {
10698 as_bad ("`%s' cannot be predicated", idesc->name);
10699 goto done;
10700 }
10701
542d6675 10702 /* Build the instruction. */
800eeca4
JW		 10703 CURR_SLOT.qp_regno = qp_regno;
10704 CURR_SLOT.idesc = idesc;
10705 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10706 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4
JW		 10707
10708 /* Add unwind entry, if there is one. */
e0c9811a 10709 if (unwind.current_entry)
800eeca4 10710 {
e0c9811a
JW		 10711 CURR_SLOT.unwind_record = unwind.current_entry;
10712 unwind.current_entry = NULL;
800eeca4 10713 }
75e09913
JB		 10714 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10715 unwind.insn = 1;
800eeca4 10716
542d6675 10717 /* Check for dependency violations. */
800eeca4 10718 if (md.detect_dv)
542d6675 10719 check_dv (idesc);
800eeca4
JW		 10720
10721 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10722 if (++md.num_slots_in_use >= NUM_SLOTS)
10723 emit_one_bundle ();
10724
10725 if ((flags & IA64_OPCODE_LAST) != 0)
10726 insn_group_break (1, 0, 0);
10727
10728 md.last_text_seg = now_seg;
10729
10730 done:
10731 input_line_pointer = saved_input_line_pointer;
10732}
10733
10734/* Called when symbol NAME cannot be found in the symbol table.
10735 Should be used for dynamic valued symbols only. */
542d6675
KH		 10736
10737symbolS *
800eeca4 10738md_undefined_symbol (name)
2434f565 10739 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10740{
10741 return 0;
10742}
10743
10744/* Called for any expression that can not be recognized. When the
10745 function is called, `input_line_pointer' will point to the start of
10746 the expression. */
542d6675 10747
800eeca4
JW		 10748void
10749md_operand (e)
10750 expressionS *e;
10751{
800eeca4
JW		 10752 switch (*input_line_pointer)
10753 {
800eeca4
JW		 10754 case '[':
10755 ++input_line_pointer;
10756 expression (e);
10757 if (*input_line_pointer != ']')
10758 {
16a48f83 10759 as_bad ("Closing bracket missing");
800eeca4
JW		 10760 goto err;
10761 }
10762 else
10763 {
10764 if (e->X_op != O_register)
10765 as_bad ("Register expected as index");
10766
10767 ++input_line_pointer;
10768 e->X_op = O_index;
10769 }
10770 break;
10771
10772 default:
10773 break;
10774 }
10775 return;
10776
10777 err:
10778 ignore_rest_of_line ();
10779}
10780
10781/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10782 a section symbol plus some offset. For relocs involving @fptr(),
10783 directives we don't want such adjustments since we need to have the
10784 original symbol's name in the reloc. */
10785int
10786ia64_fix_adjustable (fix)
10787 fixS *fix;
10788{
10789 /* Prevent all adjustments to global symbols */
10790 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10791 return 0;
10792
10793 switch (fix->fx_r_type)
10794 {
10795 case BFD_RELOC_IA64_FPTR64I:
10796 case BFD_RELOC_IA64_FPTR32MSB:
10797 case BFD_RELOC_IA64_FPTR32LSB:
10798 case BFD_RELOC_IA64_FPTR64MSB:
10799 case BFD_RELOC_IA64_FPTR64LSB:
10800 case BFD_RELOC_IA64_LTOFF_FPTR22:
10801 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10802 return 0;
10803 default:
10804 break;
10805 }
10806
10807 return 1;
10808}
10809
10810int
10811ia64_force_relocation (fix)
10812 fixS *fix;
10813{
10814 switch (fix->fx_r_type)
10815 {
10816 case BFD_RELOC_IA64_FPTR64I:
10817 case BFD_RELOC_IA64_FPTR32MSB:
10818 case BFD_RELOC_IA64_FPTR32LSB:
10819 case BFD_RELOC_IA64_FPTR64MSB:
10820 case BFD_RELOC_IA64_FPTR64LSB:
10821
10822 case BFD_RELOC_IA64_LTOFF22:
10823 case BFD_RELOC_IA64_LTOFF64I:
10824 case BFD_RELOC_IA64_LTOFF_FPTR22:
10825 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10826 case BFD_RELOC_IA64_PLTOFF22:
10827 case BFD_RELOC_IA64_PLTOFF64I:
10828 case BFD_RELOC_IA64_PLTOFF64MSB:
10829 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 10830
10831 case BFD_RELOC_IA64_LTOFF22X:
10832 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 10833 return 1;
10834
10835 default:
a161fe53 10836 break;
800eeca4 10837 }
a161fe53 10838
ae6063d4 10839 return generic_force_reloc (fix);
800eeca4
JW		 10840}
10841
10842/* Decide from what point a pc-relative relocation is relative to,
10843 relative to the pc-relative fixup. Er, relatively speaking. */
10844long
10845ia64_pcrel_from_section (fix, sec)
10846 fixS *fix;
10847 segT sec;
10848{
10849 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 10850
800eeca4
JW		 10851 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10852 off &= ~0xfUL;
10853
10854 return off;
10855}
10856
6174d9c8
RH		 10857
10858/* Used to emit section-relative relocs for the dwarf2 debug data. */
10859void
10860ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10861{
10862 expressionS expr;
10863
10864 expr.X_op = O_pseudo_fixup;
10865 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10866 expr.X_add_number = 0;
10867 expr.X_add_symbol = symbol;
10868 emit_expr (&expr, size);
10869}
10870
800eeca4
JW		 10871/* This is called whenever some data item (not an instruction) needs a
10872 fixup. We pick the right reloc code depending on the byteorder
10873 currently in effect. */
10874void
10875ia64_cons_fix_new (f, where, nbytes, exp)
10876 fragS *f;
10877 int where;
10878 int nbytes;
10879 expressionS *exp;
10880{
10881 bfd_reloc_code_real_type code;
10882 fixS *fix;
10883
10884 switch (nbytes)
10885 {
10886 /* There are no reloc for 8 and 16 bit quantities, but we allow
10887 them here since they will work fine as long as the expression
10888 is fully defined at the end of the pass over the source file. */
10889 case 1: code = BFD_RELOC_8; break;
10890 case 2: code = BFD_RELOC_16; break;
10891 case 4:
10892 if (target_big_endian)
10893 code = BFD_RELOC_IA64_DIR32MSB;
10894 else
10895 code = BFD_RELOC_IA64_DIR32LSB;
10896 break;
10897
10898 case 8:
40449e9f 10899 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 10900 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 10901 && exp->X_op_symbol
10902 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10903 && !(md.flags & EF_IA_64_ABI64))
10904 {
10905 if (target_big_endian)
10906 code = BFD_RELOC_IA64_IPLTMSB;
10907 else
10908 code = BFD_RELOC_IA64_IPLTLSB;
10909 exp->X_op = O_symbol;
10910 break;
10911 }
10912 else
10913 {
10914 if (target_big_endian)
10915 code = BFD_RELOC_IA64_DIR64MSB;
10916 else
10917 code = BFD_RELOC_IA64_DIR64LSB;
10918 break;
10919 }
800eeca4 10920
3969b680
RH		 10921 case 16:
10922 if (exp->X_op == O_pseudo_fixup
10923 && exp->X_op_symbol
10924 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10925 {
10926 if (target_big_endian)
10927 code = BFD_RELOC_IA64_IPLTMSB;
10928 else
10929 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 10930 exp->X_op = O_symbol;
10931 break;
10932 }
10933 /* FALLTHRU */
10934
800eeca4
JW		 10935 default:
10936 as_bad ("Unsupported fixup size %d", nbytes);
10937 ignore_rest_of_line ();
10938 return;
10939 }
6174d9c8 10940
800eeca4
JW		 10941 if (exp->X_op == O_pseudo_fixup)
10942 {
800eeca4
JW		 10943 exp->X_op = O_symbol;
10944 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 10945 /* ??? If code unchanged, unsupported. */
800eeca4 10946 }
3969b680 10947
800eeca4
JW		 10948 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10949 /* We need to store the byte order in effect in case we're going
10950 to fix an 8 or 16 bit relocation (for which there no real
94f592af 10951 relocs available). See md_apply_fix3(). */
800eeca4
JW		 10952 fix->tc_fix_data.bigendian = target_big_endian;
10953}
10954
10955/* Return the actual relocation we wish to associate with the pseudo
10956 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 10957 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 10958
10959static bfd_reloc_code_real_type
10960ia64_gen_real_reloc_type (sym, r_type)
10961 struct symbol *sym;
10962 bfd_reloc_code_real_type r_type;
10963{
10964 bfd_reloc_code_real_type new = 0;
0ca3e455 10965 const char *type = NULL, *suffix = "";
800eeca4
JW		 10966
10967 if (sym == NULL)
10968 {
10969 return r_type;
10970 }
10971
10972 switch (S_GET_VALUE (sym))
10973 {
10974 case FUNC_FPTR_RELATIVE:
10975 switch (r_type)
10976 {
10977 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10978 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10979 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10980 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10981 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 10982 default: type = "FPTR"; break;
800eeca4
JW		 10983 }
10984 break;
10985
10986 case FUNC_GP_RELATIVE:
10987 switch (r_type)
10988 {
10989 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10990 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10991 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10992 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10993 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10994 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 10995 default: type = "GPREL"; break;
800eeca4
JW		 10996 }
10997 break;
10998
10999 case FUNC_LT_RELATIVE:
11000 switch (r_type)
11001 {
11002 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11003 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11004 default: type = "LTOFF"; break;
800eeca4
JW		 11005 }
11006 break;
11007
fa2c7eff
RH		 11008 case FUNC_LT_RELATIVE_X:
11009 switch (r_type)
11010 {
11011 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11012 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11013 }
11014 break;
11015
c67e42c9
RH		 11016 case FUNC_PC_RELATIVE:
11017 switch (r_type)
11018 {
11019 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11020 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11021 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11022 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11023 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11024 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11025 default: type = "PCREL"; break;
c67e42c9
RH		 11026 }
11027 break;
11028
800eeca4
JW		 11029 case FUNC_PLT_RELATIVE:
11030 switch (r_type)
11031 {
11032 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11033 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11034 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11035 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11036 default: type = "PLTOFF"; break;
800eeca4
JW		 11037 }
11038 break;
11039
11040 case FUNC_SEC_RELATIVE:
11041 switch (r_type)
11042 {
11043 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11044 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11045 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11046 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11047 default: type = "SECREL"; break;
800eeca4
JW		 11048 }
11049 break;
11050
11051 case FUNC_SEG_RELATIVE:
11052 switch (r_type)
11053 {
11054 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11055 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11056 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11057 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11058 default: type = "SEGREL"; break;
800eeca4
JW		 11059 }
11060 break;
11061
11062 case FUNC_LTV_RELATIVE:
11063 switch (r_type)
11064 {
11065 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11066 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11067 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11068 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11069 default: type = "LTV"; break;
800eeca4
JW		 11070 }
11071 break;
11072
11073 case FUNC_LT_FPTR_RELATIVE:
11074 switch (r_type)
11075 {
11076 case BFD_RELOC_IA64_IMM22:
11077 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11078 case BFD_RELOC_IA64_IMM64:
11079 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11080 case BFD_RELOC_IA64_DIR32MSB:
11081 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11082 case BFD_RELOC_IA64_DIR32LSB:
11083 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11084 case BFD_RELOC_IA64_DIR64MSB:
11085 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11086 case BFD_RELOC_IA64_DIR64LSB:
11087 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11088 default:
0ca3e455 11089 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11090 }
11091 break;
3969b680 11092
13ae64f3
JJ		 11093 case FUNC_TP_RELATIVE:
11094 switch (r_type)
11095 {
0ca3e455
JB		 11096 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11097 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11098 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11099 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11100 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11101 default: type = "TPREL"; break;
13ae64f3
JJ		 11102 }
11103 break;
11104
11105 case FUNC_LT_TP_RELATIVE:
11106 switch (r_type)
11107 {
11108 case BFD_RELOC_IA64_IMM22:
11109 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11110 default:
0ca3e455
JB		 11111 type = "LTOFF_TPREL"; break;
11112 }
11113 break;
11114
11115 case FUNC_DTP_MODULE:
11116 switch (r_type)
11117 {
11118 case BFD_RELOC_IA64_DIR64MSB:
11119 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11120 case BFD_RELOC_IA64_DIR64LSB:
11121 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11122 default:
11123 type = "DTPMOD"; break;
13ae64f3
JJ		 11124 }
11125 break;
11126
11127 case FUNC_LT_DTP_MODULE:
11128 switch (r_type)
11129 {
11130 case BFD_RELOC_IA64_IMM22:
11131 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11132 default:
0ca3e455 11133 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11134 }
11135 break;
11136
11137 case FUNC_DTP_RELATIVE:
11138 switch (r_type)
11139 {
0ca3e455
JB		 11140 case BFD_RELOC_IA64_DIR32MSB:
11141 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11142 case BFD_RELOC_IA64_DIR32LSB:
11143 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11144 case BFD_RELOC_IA64_DIR64MSB:
11145 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11146 case BFD_RELOC_IA64_DIR64LSB:
11147 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11148 case BFD_RELOC_IA64_IMM14:
11149 new = BFD_RELOC_IA64_DTPREL14; break;
11150 case BFD_RELOC_IA64_IMM22:
11151 new = BFD_RELOC_IA64_DTPREL22; break;
11152 case BFD_RELOC_IA64_IMM64:
11153 new = BFD_RELOC_IA64_DTPREL64I; break;
11154 default:
0ca3e455 11155 type = "DTPREL"; break;
13ae64f3
JJ		 11156 }
11157 break;
11158
11159 case FUNC_LT_DTP_RELATIVE:
11160 switch (r_type)
11161 {
11162 case BFD_RELOC_IA64_IMM22:
11163 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11164 default:
0ca3e455 11165 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11166 }
11167 break;
11168
40449e9f 11169 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11170 switch (r_type)
11171 {
11172 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11173 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11174 default: type = "IPLT"; break;
11175 }
40449e9f 11176 break;
1cd8ff38 11177
800eeca4
JW		 11178 default:
11179 abort ();
11180 }
6174d9c8 11181
800eeca4
JW		 11182 if (new)
11183 return new;
11184 else
0ca3e455
JB		 11185 {
11186 int width;
11187
11188 if (!type)
11189 abort ();
11190 switch (r_type)
11191 {
11192 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11193 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11194 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11195 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
11196 case BFD_RELOC_IA64_IMM14: width = 14; break;
11197 case BFD_RELOC_IA64_IMM22: width = 22; break;
11198 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11199 default: abort ();
11200 }
11201
11202 /* This should be an error, but since previously there wasn't any
11203 diagnostic here, dont't make it fail because of this for now. */
11204 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11205 return r_type;
11206 }
800eeca4
JW		 11207}
11208
11209/* Here is where generate the appropriate reloc for pseudo relocation
11210 functions. */
11211void
11212ia64_validate_fix (fix)
11213 fixS *fix;
11214{
11215 switch (fix->fx_r_type)
11216 {
11217 case BFD_RELOC_IA64_FPTR64I:
11218 case BFD_RELOC_IA64_FPTR32MSB:
11219 case BFD_RELOC_IA64_FPTR64LSB:
11220 case BFD_RELOC_IA64_LTOFF_FPTR22:
11221 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11222 if (fix->fx_offset != 0)
11223 as_bad_where (fix->fx_file, fix->fx_line,
11224 "No addend allowed in @fptr() relocation");
11225 break;
11226 default:
11227 break;
11228 }
800eeca4
JW		 11229}
11230
11231static void
11232fix_insn (fix, odesc, value)
11233 fixS *fix;
11234 const struct ia64_operand *odesc;
11235 valueT value;
11236{
11237 bfd_vma insn[3], t0, t1, control_bits;
11238 const char *err;
11239 char *fixpos;
11240 long slot;
11241
11242 slot = fix->fx_where & 0x3;
11243 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11244
c67e42c9 11245 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11246 t0 = bfd_getl64 (fixpos);
11247 t1 = bfd_getl64 (fixpos + 8);
11248 control_bits = t0 & 0x1f;
11249 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11250 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11251 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11252
c67e42c9
RH		 11253 err = NULL;
11254 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11255 {
c67e42c9
RH		 11256 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11257 insn[2] |= (((value & 0x7f) << 13)
11258 | (((value >> 7) & 0x1ff) << 27)
11259 | (((value >> 16) & 0x1f) << 22)
11260 | (((value >> 21) & 0x1) << 21)
11261 | (((value >> 63) & 0x1) << 36));
800eeca4 11262 }
c67e42c9
RH		 11263 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11264 {
11265 if (value & ~0x3fffffffffffffffULL)
11266 err = "integer operand out of range";
11267 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11268 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11269 }
11270 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11271 {
11272 value >>= 4;
11273 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11274 insn[2] |= ((((value >> 59) & 0x1) << 36)
11275 | (((value >> 0) & 0xfffff) << 13));
11276 }
11277 else
11278 err = (*odesc->insert) (odesc, value, insn + slot);
11279
11280 if (err)
11281 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11282
11283 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11284 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11285 number_to_chars_littleendian (fixpos + 0, t0, 8);
11286 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11287}
11288
11289/* Attempt to simplify or even eliminate a fixup. The return value is
11290 ignored; perhaps it was once meaningful, but now it is historical.
11291 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11292
11293 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11294 (if possible). */
94f592af
NC		 11295
11296void
11297md_apply_fix3 (fix, valP, seg)
800eeca4 11298 fixS *fix;
40449e9f 11299 valueT *valP;
2434f565 11300 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11301{
11302 char *fixpos;
40449e9f 11303 valueT value = *valP;
800eeca4
JW		 11304
11305 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11306
11307 if (fix->fx_pcrel)
11308 {
7b347e43
JB		 11309 switch (fix->fx_r_type)
11310 {
11311 case BFD_RELOC_IA64_PCREL21B: break;
11312 case BFD_RELOC_IA64_PCREL21BI: break;
11313 case BFD_RELOC_IA64_PCREL21F: break;
11314 case BFD_RELOC_IA64_PCREL21M: break;
11315 case BFD_RELOC_IA64_PCREL60B: break;
11316 case BFD_RELOC_IA64_PCREL22: break;
11317 case BFD_RELOC_IA64_PCREL64I: break;
11318 case BFD_RELOC_IA64_PCREL32MSB: break;
11319 case BFD_RELOC_IA64_PCREL32LSB: break;
11320 case BFD_RELOC_IA64_PCREL64MSB: break;
11321 case BFD_RELOC_IA64_PCREL64LSB: break;
11322 default:
11323 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11324 fix->fx_r_type);
11325 break;
11326 }
800eeca4
JW		 11327 }
11328 if (fix->fx_addsy)
11329 {
00f7efb6 11330 switch (fix->fx_r_type)
800eeca4 11331 {
00f7efb6 11332 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11333 /* This must be a TAG13 or TAG13b operand. There are no external
11334 relocs defined for them, so we must give an error. */
800eeca4
JW		 11335 as_bad_where (fix->fx_file, fix->fx_line,
11336 "%s must have a constant value",
11337 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11338 fix->fx_done = 1;
94f592af 11339 return;
00f7efb6
JJ		 11340
11341 case BFD_RELOC_IA64_TPREL14:
11342 case BFD_RELOC_IA64_TPREL22:
11343 case BFD_RELOC_IA64_TPREL64I:
11344 case BFD_RELOC_IA64_LTOFF_TPREL22:
11345 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11346 case BFD_RELOC_IA64_DTPREL14:
11347 case BFD_RELOC_IA64_DTPREL22:
11348 case BFD_RELOC_IA64_DTPREL64I:
11349 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11350 S_SET_THREAD_LOCAL (fix->fx_addsy);
11351 break;
7925dd68
JJ		 11352
11353 default:
11354 break;
800eeca4 11355 }
800eeca4
JW		 11356 }
11357 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11358 {
11359 if (fix->tc_fix_data.bigendian)
11360 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11361 else
11362 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11363 fix->fx_done = 1;
800eeca4
JW		 11364 }
11365 else
11366 {
11367 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11368 fix->fx_done = 1;
800eeca4 11369 }
800eeca4
JW		 11370}
11371
11372/* Generate the BFD reloc to be stuck in the object file from the
11373 fixup used internally in the assembler. */
542d6675
KH		 11374
11375arelent *
800eeca4 11376tc_gen_reloc (sec, fixp)
2434f565 11377 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11378 fixS *fixp;
11379{
11380 arelent *reloc;
11381
11382 reloc = xmalloc (sizeof (*reloc));
11383 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11384 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11385 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11386 reloc->addend = fixp->fx_offset;
11387 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11388
11389 if (!reloc->howto)
11390 {
11391 as_bad_where (fixp->fx_file, fixp->fx_line,
11392 "Cannot represent %s relocation in object file",
11393 bfd_get_reloc_code_name (fixp->fx_r_type));
11394 }
11395 return reloc;
11396}
11397
11398/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11399 of type TYPE, and store the appropriate bytes in *LIT. The number
11400 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11401 returned, or NULL on OK. */
11402
11403#define MAX_LITTLENUMS 5
11404
542d6675 11405char *
800eeca4
JW		 11406md_atof (type, lit, size)
11407 int type;
11408 char *lit;
11409 int *size;
11410{
11411 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11412 char *t;
11413 int prec;
11414
11415 switch (type)
11416 {
11417 /* IEEE floats */
11418 case 'f':
11419 case 'F':
11420 case 's':
11421 case 'S':
11422 prec = 2;
11423 break;
11424
11425 case 'd':
11426 case 'D':
11427 case 'r':
11428 case 'R':
11429 prec = 4;
11430 break;
11431
11432 case 'x':
11433 case 'X':
11434 case 'p':
11435 case 'P':
11436 prec = 5;
11437 break;
11438
11439 default:
11440 *size = 0;
11441 return "Bad call to MD_ATOF()";
11442 }
11443 t = atof_ieee (input_line_pointer, type, words);
11444 if (t)
11445 input_line_pointer = t;
800eeca4 11446
10a98291
L		 11447 (*ia64_float_to_chars) (lit, words, prec);
11448
165a7f90
L		 11449 if (type == 'X')
11450 {
11451 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11452 memset (&lit [10], 0, 6);
165a7f90
L		 11453 *size = 8 * sizeof (LITTLENUM_TYPE);
11454 }
10a98291
L		 11455 else
11456 *size = prec * sizeof (LITTLENUM_TYPE);
11457
800eeca4
JW		 11458 return 0;
11459}
11460
800eeca4
JW		 11461/* Handle ia64 specific semantics of the align directive. */
11462
0a9ef439 11463void
800eeca4 11464ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11465 int n ATTRIBUTE_UNUSED;
11466 const char *fill ATTRIBUTE_UNUSED;
2434f565 11467 int len ATTRIBUTE_UNUSED;
91a2ae2a 11468 int max ATTRIBUTE_UNUSED;
800eeca4 11469{
0a9ef439 11470 if (subseg_text_p (now_seg))
800eeca4 11471 ia64_flush_insns ();
0a9ef439 11472}
800eeca4 11473
0a9ef439
RH		 11474/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11475 of an rs_align_code fragment. */
800eeca4 11476
0a9ef439
RH		 11477void
11478ia64_handle_align (fragp)
11479 fragS *fragp;
11480{
11481 /* Use mfi bundle of nops with no stop bits. */
0a9ef439
RH		 11482 static const unsigned char le_nop[]
11483 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11484 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
9545c4ce
L		 11485 static const unsigned char le_nop_stop[]
11486 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11487 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
0a9ef439
RH		 11488
11489 int bytes;
11490 char *p;
9545c4ce 11491 const unsigned char *nop;
0a9ef439
RH		 11492
11493 if (fragp->fr_type != rs_align_code)
11494 return;
11495
9545c4ce
L		 11496 /* Check if this frag has to end with a stop bit. */
11497 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11498
0a9ef439
RH		 11499 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11500 p = fragp->fr_literal + fragp->fr_fix;
11501
d9201763
L		 11502 /* If no paddings are needed, we check if we need a stop bit. */
11503 if (!bytes && fragp->tc_frag_data)
11504 {
11505 if (fragp->fr_fix < 16)
bae25f19
L		 11506#if 1
11507 /* FIXME: It won't work with
11508 .align 16
11509 alloc r32=ar.pfs,1,2,4,0
11510 */
11511 ;
11512#else
d9201763
L		 11513 as_bad_where (fragp->fr_file, fragp->fr_line,
11514 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11515#endif
d9201763
L		 11516 else
11517 /* Bundles are always in little-endian byte order. Make sure
11518 the previous bundle has the stop bit. */
11519 *(p - 16) |= 1;
11520 }
11521
0a9ef439
RH		 11522 /* Make sure we are on a 16-byte boundary, in case someone has been
11523 putting data into a text section. */
11524 if (bytes & 15)
11525 {
11526 int fix = bytes & 15;
11527 memset (p, 0, fix);
11528 p += fix;
11529 bytes -= fix;
11530 fragp->fr_fix += fix;
800eeca4
JW		 11531 }
11532
012a452b 11533 /* Instruction bundles are always little-endian. */
9545c4ce 11534 memcpy (p, nop, 16);
0a9ef439 11535 fragp->fr_var = 16;
800eeca4 11536}
10a98291
L		 11537
11538static void
11539ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11540 int prec)
11541{
11542 while (prec--)
11543 {
11544 number_to_chars_bigendian (lit, (long) (*words++),
11545 sizeof (LITTLENUM_TYPE));
11546 lit += sizeof (LITTLENUM_TYPE);
11547 }
11548}
11549
11550static void
11551ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11552 int prec)
11553{
11554 while (prec--)
11555 {
11556 number_to_chars_littleendian (lit, (long) (words[prec]),
11557 sizeof (LITTLENUM_TYPE));
11558 lit += sizeof (LITTLENUM_TYPE);
11559 }
11560}
11561
11562void
11563ia64_elf_section_change_hook (void)
11564{
38ce5b11
L		 11565 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11566 && elf_linked_to_section (now_seg) == NULL)
11567 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11568 dot_byteorder (-1);
11569}
a645d1eb
L		 11570
11571/* Check if a label should be made global. */
11572void
11573ia64_check_label (symbolS *label)
11574{
11575 if (*input_line_pointer == ':')
11576 {
11577 S_SET_EXTERNAL (label);
11578 input_line_pointer++;
11579 }
11580}
35f5df7f
L		 11581
11582/* Used to remember where .alias and .secalias directives are seen. We
11583 will rename symbol and section names when we are about to output
11584 the relocatable file. */
11585struct alias
11586{
11587 char *file; /* The file where the directive is seen. */
11588 unsigned int line; /* The line number the directive is at. */
11589 const char *name; /* The orignale name of the symbol. */
11590};
11591
11592/* Called for .alias and .secalias directives. If SECTION is 1, it is
11593 .secalias. Otherwise, it is .alias. */
11594static void
11595dot_alias (int section)
11596{
11597 char *name, *alias;
11598 char delim;
11599 char *end_name;
11600 int len;
11601 const char *error_string;
11602 struct alias *h;
11603 const char *a;
11604 struct hash_control *ahash, *nhash;
11605 const char *kind;
11606
11607 name = input_line_pointer;
11608 delim = get_symbol_end ();
11609 end_name = input_line_pointer;
11610 *end_name = delim;
11611
11612 if (name == end_name)
11613 {
11614 as_bad (_("expected symbol name"));
11615 discard_rest_of_line ();
11616 return;
11617 }
11618
11619 SKIP_WHITESPACE ();
11620
11621 if (*input_line_pointer != ',')
11622 {
11623 *end_name = 0;
11624 as_bad (_("expected comma after \"%s\""), name);
11625 *end_name = delim;
11626 ignore_rest_of_line ();
11627 return;
11628 }
11629
11630 input_line_pointer++;
11631 *end_name = 0;
20b36a95 11632 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11633
11634 /* We call demand_copy_C_string to check if alias string is valid.
11635 There should be a closing `"' and no `\0' in the string. */
11636 alias = demand_copy_C_string (&len);
11637 if (alias == NULL)
11638 {
11639 ignore_rest_of_line ();
11640 return;
11641 }
11642
11643 /* Make a copy of name string. */
11644 len = strlen (name) + 1;
11645 obstack_grow (&notes, name, len);
11646 name = obstack_finish (&notes);
11647
11648 if (section)
11649 {
11650 kind = "section";
11651 ahash = secalias_hash;
11652 nhash = secalias_name_hash;
11653 }
11654 else
11655 {
11656 kind = "symbol";
11657 ahash = alias_hash;
11658 nhash = alias_name_hash;
11659 }
11660
11661 /* Check if alias has been used before. */
11662 h = (struct alias *) hash_find (ahash, alias);
11663 if (h)
11664 {
11665 if (strcmp (h->name, name))
11666 as_bad (_("`%s' is already the alias of %s `%s'"),
11667 alias, kind, h->name);
11668 goto out;
11669 }
11670
11671 /* Check if name already has an alias. */
11672 a = (const char *) hash_find (nhash, name);
11673 if (a)
11674 {
11675 if (strcmp (a, alias))
11676 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11677 goto out;
11678 }
11679
11680 h = (struct alias *) xmalloc (sizeof (struct alias));
11681 as_where (&h->file, &h->line);
11682 h->name = name;
11683
11684 error_string = hash_jam (ahash, alias, (PTR) h);
11685 if (error_string)
11686 {
11687 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11688 alias, kind, error_string);
11689 goto out;
11690 }
11691
11692 error_string = hash_jam (nhash, name, (PTR) alias);
11693 if (error_string)
11694 {
11695 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11696 alias, kind, error_string);
11697out:
11698 obstack_free (&notes, name);
11699 obstack_free (&notes, alias);
11700 }
11701
11702 demand_empty_rest_of_line ();
11703}
11704
11705/* It renames the original symbol name to its alias. */
11706static void
11707do_alias (const char *alias, PTR value)
11708{
11709 struct alias *h = (struct alias *) value;
11710 symbolS *sym = symbol_find (h->name);
11711
11712 if (sym == NULL)
11713 as_warn_where (h->file, h->line,
11714 _("symbol `%s' aliased to `%s' is not used"),
11715 h->name, alias);
11716 else
11717 S_SET_NAME (sym, (char *) alias);
11718}
11719
11720/* Called from write_object_file. */
11721void
11722ia64_adjust_symtab (void)
11723{
11724 hash_traverse (alias_hash, do_alias);
11725}
11726
11727/* It renames the original section name to its alias. */
11728static void
11729do_secalias (const char *alias, PTR value)
11730{
11731 struct alias *h = (struct alias *) value;
11732 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11733
11734 if (sec == NULL)
11735 as_warn_where (h->file, h->line,
11736 _("section `%s' aliased to `%s' is not used"),
11737 h->name, alias);
11738 else
11739 sec->name = alias;
11740}
11741
11742/* Called from write_object_file. */
11743void
11744ia64_frob_file (void)
11745{
11746 hash_traverse (secalias_hash, do_secalias);
11747}
GDB Binutils - Deliverables
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