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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
744b6414 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
4b4da160
NC		 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
800eeca4
JW		 22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
5faa8e39
JW		 59
60/* Some systems define MIN in, e.g., param.h. */
61#undef MIN
800eeca4
JW		 62#define MIN(a,b) ((a) < (b) ? (a) : (b))
63
64#define NUM_SLOTS 4
65#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66#define CURR_SLOT md.slot[md.curr_slot]
67
68#define O_pseudo_fixup (O_max + 1)
69
70enum special_section
71 {
557debba 72 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 73 SPECIAL_SECTION_BSS = 0,
74 SPECIAL_SECTION_SBSS,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
557debba
JW		 79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 83 };
84
85enum reloc_func
86 {
13ae64f3
JJ		 87 FUNC_DTP_MODULE,
88 FUNC_DTP_RELATIVE,
800eeca4
JW		 89 FUNC_FPTR_RELATIVE,
90 FUNC_GP_RELATIVE,
91 FUNC_LT_RELATIVE,
fa2c7eff 92 FUNC_LT_RELATIVE_X,
c67e42c9 93 FUNC_PC_RELATIVE,
800eeca4
JW		 94 FUNC_PLT_RELATIVE,
95 FUNC_SEC_RELATIVE,
96 FUNC_SEG_RELATIVE,
13ae64f3 97 FUNC_TP_RELATIVE,
800eeca4
JW		 98 FUNC_LTV_RELATIVE,
99 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 100 FUNC_LT_DTP_MODULE,
101 FUNC_LT_DTP_RELATIVE,
102 FUNC_LT_TP_RELATIVE,
3969b680 103 FUNC_IPLT_RELOC,
800eeca4
JW		 104 };
105
106enum reg_symbol
107 {
108 REG_GR = 0,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
115 REG_CFM,
116 REG_PR,
117 REG_PR_ROT,
118 REG_PSR,
119 REG_PSR_L,
120 REG_PSR_UM,
121 /* The following are pseudo-registers for use by gas only. */
122 IND_CPUID,
123 IND_DBR,
124 IND_DTR,
125 IND_ITR,
126 IND_IBR,
800eeca4
JW		 127 IND_MSR,
128 IND_PKR,
129 IND_PMC,
130 IND_PMD,
131 IND_RR,
542d6675 132 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 133 REG_PSP,
134 REG_PRIUNAT,
800eeca4
JW		 135 REG_NUM
136 };
137
138enum dynreg_type
139 {
140 DYNREG_GR = 0, /* dynamic general purpose register */
141 DYNREG_FR, /* dynamic floating point register */
142 DYNREG_PR, /* dynamic predicate register */
143 DYNREG_NUM_TYPES
144 };
145
87f8eb97
JW		 146enum operand_match_result
147 {
148 OPERAND_MATCH,
149 OPERAND_OUT_OF_RANGE,
150 OPERAND_MISMATCH
151 };
152
800eeca4
JW		 153/* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
156 instruction. */
157struct label_fix
542d6675
KH		 158{
159 struct label_fix *next;
160 struct symbol *sym;
07a53e5c 161 bfd_boolean dw2_mark_labels;
542d6675 162};
800eeca4 163
549f748d 164/* This is the endianness of the current section. */
800eeca4
JW		 165extern int target_big_endian;
166
549f748d
JW		 167/* This is the default endianness. */
168static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
169
10a98291
L		 170void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
171
172static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE *, int));
174static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE *, int));
176static void (*ia64_float_to_chars)
177 PARAMS ((char *, LITTLENUM_TYPE *, int));
178
35f5df7f
L		 179static struct hash_control *alias_hash;
180static struct hash_control *alias_name_hash;
181static struct hash_control *secalias_hash;
182static struct hash_control *secalias_name_hash;
183
2fac3d48
JB		 184/* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186const char ia64_symbol_chars[] = "@?";
187
800eeca4
JW		 188/* Characters which always start a comment. */
189const char comment_chars[] = "";
190
191/* Characters which start a comment at the beginning of a line. */
192const char line_comment_chars[] = "#";
193
194/* Characters which may be used to separate multiple commands on a
195 single line. */
e4e8248d 196const char line_separator_chars[] = ";{}";
800eeca4
JW		 197
198/* Characters which are used to indicate an exponent in a floating
199 point number. */
200const char EXP_CHARS[] = "eE";
201
202/* Characters which mean that a number is a floating point constant,
203 as in 0d1.0. */
204const char FLT_CHARS[] = "rRsSfFdDxXpP";
205
542d6675 206/* ia64-specific option processing: */
800eeca4 207
44f5c83a 208const char *md_shortopts = "m:N:x::";
800eeca4
JW		 209
210struct option md_longopts[] =
211 {
c43c2cc5
JW		 212#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
214#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 216 };
217
218size_t md_longopts_size = sizeof (md_longopts);
219
220static struct
221 {
222 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
223 struct hash_control *reg_hash; /* register name hash table */
224 struct hash_control *dynreg_hash; /* dynamic register hash table */
225 struct hash_control *const_hash; /* constant hash table */
226 struct hash_control *entry_hash; /* code entry hint hash table */
227
800eeca4
JW		 228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
230 that are predicatable. */
231 expressionS qp;
232
8c2fda1d
L		 233 /* Optimize for which CPU. */
234 enum
235 {
236 itanium1,
237 itanium2
238 } tune;
239
91d777ee
L		 240 /* What to do when hint.b is used. */
241 enum
242 {
243 hint_b_error,
244 hint_b_warning,
245 hint_b_ok
246 } hint_b;
247
800eeca4 248 unsigned int
197865e8 249 manual_bundling : 1,
800eeca4
JW		 250 debug_dv: 1,
251 detect_dv: 1,
252 explicit_mode : 1, /* which mode we're in */
253 default_explicit_mode : 1, /* which mode is the default */
254 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 255 auto_align : 1,
256 keep_pending_output : 1;
800eeca4 257
970d6792
L		 258 /* What to do when something is wrong with unwind directives. */
259 enum
260 {
261 unwind_check_warning,
262 unwind_check_error
263 } unwind_check;
264
800eeca4
JW		 265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
197865e8 267 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 268 int curr_slot;
269 int num_slots_in_use;
270 struct slot
271 {
272 unsigned int
273 end_of_insn_group : 1,
274 manual_bundling_on : 1,
196e8040
JW		 275 manual_bundling_off : 1,
276 loc_directive_seen : 1;
800eeca4
JW		 277 signed char user_template; /* user-selected template, if any */
278 unsigned char qp_regno; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
282 int num_fixups;
283 struct insn_fix
284 {
285 bfd_reloc_code_real_type code;
286 enum ia64_opnd opnd; /* type of operand in need of fix */
287 unsigned int is_pcrel : 1; /* is operand pc-relative? */
288 expressionS expr; /* the value to be inserted */
289 }
290 fixup[2]; /* at most two fixups per insn */
291 struct ia64_opcode *idesc;
292 struct label_fix *label_fixups;
f1bcba5b 293 struct label_fix *tag_fixups;
800eeca4
JW		 294 struct unw_rec_list *unwind_record; /* Unwind directive. */
295 expressionS opnd[6];
296 char *src_file;
297 unsigned int src_line;
298 struct dwarf2_line_info debug_line;
299 }
300 slot[NUM_SLOTS];
301
302 segT last_text_seg;
303
304 struct dynreg
305 {
306 struct dynreg *next; /* next dynamic register */
307 const char *name;
308 unsigned short base; /* the base register number */
309 unsigned short num_regs; /* # of registers in this set */
310 }
311 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
312
313 flagword flags; /* ELF-header flags */
314
315 struct mem_offset {
316 unsigned hint:1; /* is this hint currently valid? */
317 bfd_vma offset; /* mem.offset offset */
318 bfd_vma base; /* mem.offset base */
319 } mem_offset;
320
321 int path; /* number of alt. entry points seen */
322 const char **entry_labels; /* labels of all alternate paths in
542d6675 323 the current DV-checking block. */
800eeca4 324 int maxpaths; /* size currently allocated for
542d6675 325 entry_labels */
557debba
JW		 326
327 int pointer_size; /* size in bytes of a pointer */
328 int pointer_size_shift; /* shift size of a pointer for alignment */
8b84be9d
JB		 329
330 symbolS *indregsym[IND_RR - IND_CPUID + 1];
800eeca4
JW		 331 }
332md;
333
f6fe78d6
JW		 334/* These are not const, because they are modified to MMI for non-itanium1
335 targets below. */
336/* MFI bundle of nops. */
337static unsigned char le_nop[16] =
338{
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
341};
342/* MFI bundle of nops with stop-bit. */
343static unsigned char le_nop_stop[16] =
344{
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
347};
348
542d6675 349/* application registers: */
800eeca4 350
e0c9811a
JW		 351#define AR_K0 0
352#define AR_K7 7
353#define AR_RSC 16
354#define AR_BSP 17
355#define AR_BSPSTORE 18
356#define AR_RNAT 19
d8ca90b5
JB		 357#define AR_FCR 21
358#define AR_EFLAG 24
359#define AR_CSD 25
360#define AR_SSD 26
361#define AR_CFLG 27
362#define AR_FSR 28
363#define AR_FIR 29
364#define AR_FDR 30
365#define AR_CCV 32
e0c9811a
JW		 366#define AR_UNAT 36
367#define AR_FPSR 40
368#define AR_ITC 44
369#define AR_PFS 64
370#define AR_LC 65
d8ca90b5 371#define AR_EC 66
800eeca4
JW		 372
373static const struct
374 {
375 const char *name;
8b84be9d 376 unsigned int regnum;
800eeca4
JW		 377 }
378ar[] =
379 {
d8ca90b5
JB		 380 {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1},
381 {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3},
382 {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5},
383 {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7},
384 {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP},
385 {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT},
386 {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG},
387 {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD},
388 {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR},
389 {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR},
390 {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT},
391 {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC},
392 {"ar.pfs", AR_PFS}, {"ar.lc", AR_LC},
393 {"ar.ec", AR_EC},
800eeca4
JW		 394 };
395
d8ca90b5
JB		 396/* control registers: */
397
398#define CR_DCR 0
399#define CR_ITM 1
400#define CR_IVA 2
401#define CR_PTA 8
402#define CR_GPTA 9
800eeca4
JW		 403#define CR_IPSR 16
404#define CR_ISR 17
405#define CR_IIP 19
406#define CR_IFA 20
407#define CR_ITIR 21
408#define CR_IIPA 22
409#define CR_IFS 23
410#define CR_IIM 24
411#define CR_IHA 25
d8ca90b5 412#define CR_LID 64
800eeca4
JW		 413#define CR_IVR 65
414#define CR_TPR 66
415#define CR_EOI 67
416#define CR_IRR0 68
417#define CR_IRR3 71
d8ca90b5
JB		 418#define CR_ITV 72
419#define CR_PMV 73
420#define CR_CMCV 74
800eeca4
JW		 421#define CR_LRR0 80
422#define CR_LRR1 81
423
800eeca4
JW		 424static const struct
425 {
426 const char *name;
8b84be9d 427 unsigned int regnum;
800eeca4
JW		 428 }
429cr[] =
430 {
d8ca90b5
JB		 431 {"cr.dcr", CR_DCR},
432 {"cr.itm", CR_ITM},
433 {"cr.iva", CR_IVA},
434 {"cr.pta", CR_PTA},
435 {"cr.gpta", CR_GPTA},
436 {"cr.ipsr", CR_IPSR},
437 {"cr.isr", CR_ISR},
438 {"cr.iip", CR_IIP},
439 {"cr.ifa", CR_IFA},
440 {"cr.itir", CR_ITIR},
441 {"cr.iipa", CR_IIPA},
442 {"cr.ifs", CR_IFS},
443 {"cr.iim", CR_IIM},
444 {"cr.iha", CR_IHA},
445 {"cr.lid", CR_LID},
446 {"cr.ivr", CR_IVR},
447 {"cr.tpr", CR_TPR},
448 {"cr.eoi", CR_EOI},
449 {"cr.irr0", CR_IRR0},
450 {"cr.irr1", CR_IRR0 + 1},
451 {"cr.irr2", CR_IRR0 + 2},
452 {"cr.irr3", CR_IRR3},
453 {"cr.itv", CR_ITV},
454 {"cr.pmv", CR_PMV},
455 {"cr.cmcv", CR_CMCV},
456 {"cr.lrr0", CR_LRR0},
457 {"cr.lrr1", CR_LRR1}
800eeca4
JW		 458 };
459
460#define PSR_MFL 4
461#define PSR_IC 13
462#define PSR_DFL 18
463#define PSR_CPL 32
464
465static const struct const_desc
466 {
467 const char *name;
468 valueT value;
469 }
470const_bits[] =
471 {
542d6675 472 /* PSR constant masks: */
800eeca4
JW		 473
474 /* 0: reserved */
475 {"psr.be", ((valueT) 1) << 1},
476 {"psr.up", ((valueT) 1) << 2},
477 {"psr.ac", ((valueT) 1) << 3},
478 {"psr.mfl", ((valueT) 1) << 4},
479 {"psr.mfh", ((valueT) 1) << 5},
480 /* 6-12: reserved */
481 {"psr.ic", ((valueT) 1) << 13},
482 {"psr.i", ((valueT) 1) << 14},
483 {"psr.pk", ((valueT) 1) << 15},
484 /* 16: reserved */
485 {"psr.dt", ((valueT) 1) << 17},
486 {"psr.dfl", ((valueT) 1) << 18},
487 {"psr.dfh", ((valueT) 1) << 19},
488 {"psr.sp", ((valueT) 1) << 20},
489 {"psr.pp", ((valueT) 1) << 21},
490 {"psr.di", ((valueT) 1) << 22},
491 {"psr.si", ((valueT) 1) << 23},
492 {"psr.db", ((valueT) 1) << 24},
493 {"psr.lp", ((valueT) 1) << 25},
494 {"psr.tb", ((valueT) 1) << 26},
495 {"psr.rt", ((valueT) 1) << 27},
496 /* 28-31: reserved */
497 /* 32-33: cpl (current privilege level) */
498 {"psr.is", ((valueT) 1) << 34},
499 {"psr.mc", ((valueT) 1) << 35},
500 {"psr.it", ((valueT) 1) << 36},
501 {"psr.id", ((valueT) 1) << 37},
502 {"psr.da", ((valueT) 1) << 38},
503 {"psr.dd", ((valueT) 1) << 39},
504 {"psr.ss", ((valueT) 1) << 40},
505 /* 41-42: ri (restart instruction) */
506 {"psr.ed", ((valueT) 1) << 43},
507 {"psr.bn", ((valueT) 1) << 44},
508 };
509
542d6675 510/* indirect register-sets/memory: */
800eeca4
JW		 511
512static const struct
513 {
514 const char *name;
8b84be9d 515 unsigned int regnum;
800eeca4
JW		 516 }
517indirect_reg[] =
518 {
519 { "CPUID", IND_CPUID },
520 { "cpuid", IND_CPUID },
521 { "dbr", IND_DBR },
522 { "dtr", IND_DTR },
523 { "itr", IND_ITR },
524 { "ibr", IND_IBR },
525 { "msr", IND_MSR },
526 { "pkr", IND_PKR },
527 { "pmc", IND_PMC },
528 { "pmd", IND_PMD },
529 { "rr", IND_RR },
530 };
531
532/* Pseudo functions used to indicate relocation types (these functions
533 start with an at sign (@). */
534static struct
535 {
536 const char *name;
537 enum pseudo_type
538 {
539 PSEUDO_FUNC_NONE,
540 PSEUDO_FUNC_RELOC,
541 PSEUDO_FUNC_CONST,
e0c9811a 542 PSEUDO_FUNC_REG,
800eeca4
JW		 543 PSEUDO_FUNC_FLOAT
544 }
545 type;
546 union
547 {
548 unsigned long ival;
549 symbolS *sym;
550 }
551 u;
552 }
553pseudo_func[] =
554 {
542d6675 555 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 556 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
557 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 558 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
559 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
560 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 561 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 562 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
563 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
564 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
565 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 566 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 567 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 568 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
569 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
570 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
571 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 572 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 573
542d6675 574 /* mbtype4 constants: */
800eeca4
JW		 575 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
576 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
577 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
578 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
579 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
580
542d6675 581 /* fclass constants: */
bf3ca999 582 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 583 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
584 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
585 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
586 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
587 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
588 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
589 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
590 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 591
592 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 593
c10d9d8f
JW		 594 /* hint constants: */
595 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
596
542d6675 597 /* unwind-related constants: */
041340ad
JW		 598 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
599 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
600 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
601 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
602 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
603 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
604 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 605
542d6675 606 /* unwind-related registers: */
e0c9811a 607 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 608 };
609
542d6675 610/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 611static const bfd_vma nop[IA64_NUM_UNITS] =
612 {
613 0x0000000000LL, /* NIL => break 0 */
614 0x0008000000LL, /* I-unit nop */
615 0x0008000000LL, /* M-unit nop */
616 0x4000000000LL, /* B-unit nop */
617 0x0008000000LL, /* F-unit nop */
5d5e6db9 618 0x0000000000LL, /* L-"unit" nop immediate */
800eeca4
JW		 619 0x0008000000LL, /* X-unit nop */
620 };
621
622/* Can't be `const' as it's passed to input routines (which have the
623 habit of setting temporary sentinels. */
624static char special_section_name[][20] =
625 {
626 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 627 {".IA_64.unwind"}, {".IA_64.unwind_info"},
628 {".init_array"}, {".fini_array"}
800eeca4
JW		 629 };
630
631/* The best template for a particular sequence of up to three
632 instructions: */
633#define N IA64_NUM_TYPES
634static unsigned char best_template[N][N][N];
635#undef N
636
637/* Resource dependencies currently in effect */
638static struct rsrc {
639 int depind; /* dependency index */
640 const struct ia64_dependency *dependency; /* actual dependency */
641 unsigned specific:1, /* is this a specific bit/regno? */
642 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
643 int index; /* specific regno/bit within dependency */
644 int note; /* optional qualifying note (0 if none) */
645#define STATE_NONE 0
646#define STATE_STOP 1
647#define STATE_SRLZ 2
648 int insn_srlz; /* current insn serialization state */
649 int data_srlz; /* current data serialization state */
650 int qp_regno; /* qualifying predicate for this usage */
651 char *file; /* what file marked this dependency */
2434f565 652 unsigned int line; /* what line marked this dependency */
800eeca4 653 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 654 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 655 int path; /* corresponding code entry index */
656} *regdeps = NULL;
657static int regdepslen = 0;
658static int regdepstotlen = 0;
659static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
660static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 661 "data", "instr", "specific", "stop", "other" };
7484b8e6 662static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 663
664/* Current state of PR mutexation */
665static struct qpmutex {
666 valueT prmask;
667 int path;
668} *qp_mutexes = NULL; /* QP mutex bitmasks */
669static int qp_mutexeslen = 0;
670static int qp_mutexestotlen = 0;
197865e8 671static valueT qp_safe_across_calls = 0;
800eeca4
JW		 672
673/* Current state of PR implications */
674static struct qp_imply {
675 unsigned p1:6;
676 unsigned p2:6;
677 unsigned p2_branched:1;
678 int path;
679} *qp_implies = NULL;
680static int qp_implieslen = 0;
681static int qp_impliestotlen = 0;
682
197865e8
KH		 683/* Keep track of static GR values so that indirect register usage can
684 sometimes be tracked. */
800eeca4
JW		 685static struct gr {
686 unsigned known:1;
687 int path;
688 valueT value;
a66d2bb7
JB		 689} gr_values[128] = {
690 {
691 1,
692#ifdef INT_MAX
693 INT_MAX,
694#else
695 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
696#endif
697 0
698 }
699};
800eeca4 700
9545c4ce
L		 701/* Remember the alignment frag. */
702static fragS *align_frag;
703
800eeca4
JW		 704/* These are the routines required to output the various types of
705 unwind records. */
706
f5a30c2e
JW		 707/* A slot_number is a frag address plus the slot index (0-2). We use the
708 frag address here so that if there is a section switch in the middle of
709 a function, then instructions emitted to a different section are not
710 counted. Since there may be more than one frag for a function, this
711 means we also need to keep track of which frag this address belongs to
712 so we can compute inter-frag distances. This also nicely solves the
713 problem with nops emitted for align directives, which can't easily be
714 counted, but can easily be derived from frag sizes. */
715
800eeca4
JW		 716typedef struct unw_rec_list {
717 unwind_record r;
e0c9811a 718 unsigned long slot_number;
f5a30c2e 719 fragS *slot_frag;
800eeca4
JW		 720 struct unw_rec_list *next;
721} unw_rec_list;
722
2434f565 723#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 724
6290819d
NC		 725/* Linked list of saved prologue counts. A very poor
726 implementation of a map from label numbers to prologue counts. */
727typedef struct label_prologue_count
728{
729 struct label_prologue_count *next;
730 unsigned long label_number;
731 unsigned int prologue_count;
732} label_prologue_count;
733
5656b6b8
JB		 734typedef struct proc_pending
735{
736 symbolS *sym;
737 struct proc_pending *next;
738} proc_pending;
739
e0c9811a
JW		 740static struct
741{
e0c9811a
JW		 742 /* Maintain a list of unwind entries for the current function. */
743 unw_rec_list *list;
744 unw_rec_list *tail;
800eeca4 745
e0c9811a
JW		 746 /* Any unwind entires that should be attached to the current slot
747 that an insn is being constructed for. */
748 unw_rec_list *current_entry;
800eeca4 749
e0c9811a 750 /* These are used to create the unwind table entry for this function. */
5656b6b8 751 proc_pending proc_pending;
e0c9811a
JW		 752 symbolS *info; /* pointer to unwind info */
753 symbolS *personality_routine;
91a2ae2a
RH		 754 segT saved_text_seg;
755 subsegT saved_text_subseg;
756 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 757
e0c9811a 758 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 759 unsigned int prologue : 1;
760 unsigned int prologue_mask : 4;
e4e8248d 761 unsigned int prologue_gr : 7;
75e09913
JB		 762 unsigned int body : 1;
763 unsigned int insn : 1;
33d01f33 764 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 765 /* Prologue counts at previous .label_state directives. */
766 struct label_prologue_count * saved_prologue_counts;
ba825241
JB		 767
768 /* List of split up .save-s. */
769 unw_p_record *pending_saves;
e0c9811a 770} unwind;
800eeca4 771
9f9a069e
JW		 772/* The input value is a negated offset from psp, and specifies an address
773 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
774 must add 16 and divide by 4 to get the encoded value. */
775
776#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
777
800eeca4
JW		 778typedef void (*vbyte_func) PARAMS ((int, char *, char *));
779
0234cb7c 780/* Forward declarations: */
800eeca4
JW		 781static void set_section PARAMS ((char *name));
782static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
783 unsigned int, unsigned int));
d9201763 784static void dot_align (int);
800eeca4
JW		 785static void dot_radix PARAMS ((int));
786static void dot_special_section PARAMS ((int));
787static void dot_proc PARAMS ((int));
788static void dot_fframe PARAMS ((int));
789static void dot_vframe PARAMS ((int));
150f24a2 790static void dot_vframesp PARAMS ((int));
800eeca4
JW		 791static void dot_save PARAMS ((int));
792static void dot_restore PARAMS ((int));
150f24a2 793static void dot_restorereg PARAMS ((int));
800eeca4
JW		 794static void dot_handlerdata PARAMS ((int));
795static void dot_unwentry PARAMS ((int));
796static void dot_altrp PARAMS ((int));
e0c9811a 797static void dot_savemem PARAMS ((int));
800eeca4
JW		 798static void dot_saveg PARAMS ((int));
799static void dot_savef PARAMS ((int));
800static void dot_saveb PARAMS ((int));
801static void dot_savegf PARAMS ((int));
802static void dot_spill PARAMS ((int));
150f24a2
JW		 803static void dot_spillreg PARAMS ((int));
804static void dot_spillmem PARAMS ((int));
150f24a2
JW		 805static void dot_label_state PARAMS ((int));
806static void dot_copy_state PARAMS ((int));
800eeca4
JW		 807static void dot_unwabi PARAMS ((int));
808static void dot_personality PARAMS ((int));
809static void dot_body PARAMS ((int));
810static void dot_prologue PARAMS ((int));
811static void dot_endp PARAMS ((int));
812static void dot_template PARAMS ((int));
813static void dot_regstk PARAMS ((int));
814static void dot_rot PARAMS ((int));
815static void dot_byteorder PARAMS ((int));
816static void dot_psr PARAMS ((int));
817static void dot_alias PARAMS ((int));
818static void dot_ln PARAMS ((int));
ef6a2b41 819static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 820static void dot_xdata PARAMS ((int));
821static void stmt_float_cons PARAMS ((int));
822static void stmt_cons_ua PARAMS ((int));
823static void dot_xfloat_cons PARAMS ((int));
824static void dot_xstringer PARAMS ((int));
825static void dot_xdata_ua PARAMS ((int));
826static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 827static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 828static void dot_pred_rel PARAMS ((int));
829static void dot_reg_val PARAMS ((int));
5e819f9c 830static void dot_serialize PARAMS ((int));
800eeca4
JW		 831static void dot_dv_mode PARAMS ((int));
832static void dot_entry PARAMS ((int));
833static void dot_mem_offset PARAMS ((int));
e4e8248d 834static void add_unwind_entry PARAMS((unw_rec_list *, int));
8b84be9d
JB		 835static symbolS *declare_register PARAMS ((const char *name, unsigned int regnum));
836static void declare_register_set PARAMS ((const char *, unsigned int, unsigned int));
800eeca4 837static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 838static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
839 int index,
840 expressionS *e));
e4e8248d 841static int parse_operand PARAMS ((expressionS *, int));
800eeca4
JW		 842static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
843static void build_insn PARAMS ((struct slot *, bfd_vma *));
844static void emit_one_bundle PARAMS ((void));
845static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 846static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 847 bfd_reloc_code_real_type r_type));
848static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 849static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
850 struct rsrc *, int depind, int path));
800eeca4
JW		 851static void add_qp_mutex PARAMS((valueT mask));
852static void add_qp_imply PARAMS((int p1, int p2));
853static void clear_qp_branch_flag PARAMS((valueT mask));
854static void clear_qp_mutex PARAMS((valueT mask));
855static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 856static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 857static void clear_register_values PARAMS ((void));
858static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 859static void instruction_serialization PARAMS ((void));
860static void data_serialization PARAMS ((void));
861static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 862static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 863static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 864static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 865static int depends_on PARAMS ((int, struct ia64_opcode *));
866static int specify_resource PARAMS ((const struct ia64_dependency *,
867 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 868static int check_dv PARAMS((struct ia64_opcode *idesc));
869static void check_dependencies PARAMS((struct ia64_opcode *));
870static void mark_resources PARAMS((struct ia64_opcode *));
871static void update_dependencies PARAMS((struct ia64_opcode *));
872static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 873static int qp_mutex PARAMS ((int, int, int));
874static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
875static void output_vbyte_mem PARAMS ((int, char *, char *));
876static void count_output PARAMS ((int, char *, char *));
877static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
878static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 879static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 880static void output_P1_format PARAMS ((vbyte_func, int));
881static void output_P2_format PARAMS ((vbyte_func, int, int));
882static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
883static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
884static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
885static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
886static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
887static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
888static void output_P9_format PARAMS ((vbyte_func, int, int));
889static void output_P10_format PARAMS ((vbyte_func, int, int));
890static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
891static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 892static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
893static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 894static char format_ab_reg PARAMS ((int, int));
895static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
896 unsigned long));
897static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
898static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
899 unsigned long));
900static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 901static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 902static unw_rec_list *output_prologue PARAMS ((void));
903static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
904static unw_rec_list *output_body PARAMS ((void));
905static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
906static unw_rec_list *output_mem_stack_v PARAMS ((void));
907static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
908static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
909static unw_rec_list *output_rp_when PARAMS ((void));
910static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
911static unw_rec_list *output_rp_br PARAMS ((unsigned int));
912static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
913static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
914static unw_rec_list *output_pfs_when PARAMS ((void));
915static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
916static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
917static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
918static unw_rec_list *output_preds_when PARAMS ((void));
919static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
920static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
921static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
922static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
923static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
924static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
925static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
926static unw_rec_list *output_br_mem PARAMS ((unsigned int));
927static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
928static unw_rec_list *output_spill_base PARAMS ((unsigned int));
929static unw_rec_list *output_unat_when PARAMS ((void));
930static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
931static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
932static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
933static unw_rec_list *output_lc_when PARAMS ((void));
934static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
935static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
936static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
937static unw_rec_list *output_fpsr_when PARAMS ((void));
938static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
939static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
940static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
941static unw_rec_list *output_priunat_when_gr PARAMS ((void));
942static unw_rec_list *output_priunat_when_mem PARAMS ((void));
943static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
944static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
945static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
946static unw_rec_list *output_bsp_when PARAMS ((void));
947static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
948static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
949static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
950static unw_rec_list *output_bspstore_when PARAMS ((void));
951static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
952static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
953static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
954static unw_rec_list *output_rnat_when PARAMS ((void));
955static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
956static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
957static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
958static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
959static unw_rec_list *output_epilogue PARAMS ((unsigned long));
960static unw_rec_list *output_label_state PARAMS ((unsigned long));
961static unw_rec_list *output_copy_state PARAMS ((unsigned long));
e4e8248d 962static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2 963 unsigned int));
e4e8248d 964static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 965 unsigned int));
966static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
150f24a2
JW		 967 unsigned int, unsigned int));
968static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
969static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
970static int calc_record_size PARAMS ((unw_rec_list *));
971static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 972static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 973 unsigned long, fragS *,
974 int));
91a2ae2a 975static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 976static void fixup_unw_records PARAMS ((unw_rec_list *, int));
e4e8248d
JB		 977static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *));
978static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
979static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
6290819d
NC		 980static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
981static void save_prologue_count PARAMS ((unsigned long, unsigned int));
982static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 983
652ca075 984/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 985 unit (as opposed to the memory unit). */
986static int
652ca075 987ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 988{
989 reg -= REG_AR;
652ca075
L		 990 return reg >= 64 && reg <= 111;
991}
800eeca4 992
652ca075
L		 993/* Determine if application register REGNUM resides only in the memory
994 unit (as opposed to the integer unit). */
995static int
996ar_is_only_in_memory_unit (int reg)
997{
998 reg -= REG_AR;
999 return reg >= 0 && reg <= 47;
800eeca4
JW		 1000}
1001
1002/* Switch to section NAME and create section if necessary. It's
1003 rather ugly that we have to manipulate input_line_pointer but I
1004 don't see any other way to accomplish the same thing without
1005 changing obj-elf.c (which may be the Right Thing, in the end). */
1006static void
1007set_section (name)
1008 char *name;
1009{
1010 char *saved_input_line_pointer;
1011
1012 saved_input_line_pointer = input_line_pointer;
1013 input_line_pointer = name;
1014 obj_elf_section (0);
1015 input_line_pointer = saved_input_line_pointer;
1016}
1017
d61a78a7
RH		 1018/* Map 's' to SHF_IA_64_SHORT. */
1019
1020int
1021ia64_elf_section_letter (letter, ptr_msg)
1022 int letter;
1023 char **ptr_msg;
1024{
1025 if (letter == 's')
1026 return SHF_IA_64_SHORT;
711ef82f
L		 1027 else if (letter == 'o')
1028 return SHF_LINK_ORDER;
d61a78a7 1029
711ef82f
L		 1030 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1031 return -1;
d61a78a7
RH		 1032}
1033
800eeca4
JW		 1034/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1035
1036flagword
1037ia64_elf_section_flags (flags, attr, type)
1038 flagword flags;
2434f565 1039 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 1040{
1041 if (attr & SHF_IA_64_SHORT)
1042 flags |= SEC_SMALL_DATA;
1043 return flags;
1044}
1045
91a2ae2a
RH		 1046int
1047ia64_elf_section_type (str, len)
40449e9f
KH		 1048 const char *str;
1049 size_t len;
91a2ae2a 1050{
1cd8ff38 1051#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1052
1cd8ff38 1053 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1054 return SHT_PROGBITS;
1055
1cd8ff38 1056 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1057 return SHT_PROGBITS;
1058
1cd8ff38 1059 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1060 return SHT_IA_64_UNWIND;
1061
1cd8ff38 1062 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1063 return SHT_IA_64_UNWIND;
1064
711ef82f
L		 1065 if (STREQ ("unwind"))
1066 return SHT_IA_64_UNWIND;
1067
91a2ae2a 1068 return -1;
1cd8ff38 1069#undef STREQ
91a2ae2a
RH		 1070}
1071
800eeca4
JW		 1072static unsigned int
1073set_regstack (ins, locs, outs, rots)
1074 unsigned int ins, locs, outs, rots;
1075{
542d6675
KH		 1076 /* Size of frame. */
1077 unsigned int sof;
800eeca4
JW		 1078
1079 sof = ins + locs + outs;
1080 if (sof > 96)
1081 {
1082 as_bad ("Size of frame exceeds maximum of 96 registers");
1083 return 0;
1084 }
1085 if (rots > sof)
1086 {
1087 as_warn ("Size of rotating registers exceeds frame size");
1088 return 0;
1089 }
1090 md.in.base = REG_GR + 32;
1091 md.loc.base = md.in.base + ins;
1092 md.out.base = md.loc.base + locs;
1093
1094 md.in.num_regs = ins;
1095 md.loc.num_regs = locs;
1096 md.out.num_regs = outs;
1097 md.rot.num_regs = rots;
1098 return sof;
1099}
1100
1101void
1102ia64_flush_insns ()
1103{
1104 struct label_fix *lfix;
1105 segT saved_seg;
1106 subsegT saved_subseg;
b44b1b85 1107 unw_rec_list *ptr;
07a53e5c 1108 bfd_boolean mark;
800eeca4
JW		 1109
1110 if (!md.last_text_seg)
1111 return;
1112
1113 saved_seg = now_seg;
1114 saved_subseg = now_subseg;
1115
1116 subseg_set (md.last_text_seg, 0);
1117
1118 while (md.num_slots_in_use > 0)
1119 emit_one_bundle (); /* force out queued instructions */
1120
1121 /* In case there are labels following the last instruction, resolve
07a53e5c
RH		 1122 those now. */
1123 mark = FALSE;
800eeca4
JW		 1124 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1125 {
07a53e5c
RH		 1126 symbol_set_value_now (lfix->sym);
1127 mark |= lfix->dw2_mark_labels;
800eeca4 1128 }
07a53e5c 1129 if (mark)
f1bcba5b 1130 {
07a53e5c
RH		 1131 dwarf2_where (&CURR_SLOT.debug_line);
1132 CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
1133 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line);
f1bcba5b 1134 }
07a53e5c
RH		 1135 CURR_SLOT.label_fixups = 0;
1136
1137 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1138 symbol_set_value_now (lfix->sym);
f1bcba5b 1139 CURR_SLOT.tag_fixups = 0;
800eeca4 1140
b44b1b85 1141 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1142 resolve those now. We only handle prologue, body, and endp directives
1143 here. Give an error for others. */
b44b1b85
JW		 1144 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1145 {
9c59842f 1146 switch (ptr->r.type)
b44b1b85 1147 {
9c59842f
JW		 1148 case prologue:
1149 case prologue_gr:
1150 case body:
1151 case endp:
b44b1b85
JW		 1152 ptr->slot_number = (unsigned long) frag_more (0);
1153 ptr->slot_frag = frag_now;
9c59842f
JW		 1154 break;
1155
1156 /* Allow any record which doesn't have a "t" field (i.e.,
1157 doesn't relate to a particular instruction). */
1158 case unwabi:
1159 case br_gr:
1160 case copy_state:
1161 case fr_mem:
1162 case frgr_mem:
1163 case gr_gr:
1164 case gr_mem:
1165 case label_state:
1166 case rp_br:
1167 case spill_base:
1168 case spill_mask:
1169 /* nothing */
1170 break;
1171
1172 default:
1173 as_bad (_("Unwind directive not followed by an instruction."));
1174 break;
b44b1b85 1175 }
b44b1b85
JW		 1176 }
1177 unwind.current_entry = NULL;
1178
800eeca4 1179 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1180
1181 if (md.qp.X_op == O_register)
1182 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1183}
1184
d9201763
L		 1185static void
1186ia64_do_align (int nbytes)
800eeca4
JW		 1187{
1188 char *saved_input_line_pointer = input_line_pointer;
1189
1190 input_line_pointer = "";
1191 s_align_bytes (nbytes);
1192 input_line_pointer = saved_input_line_pointer;
1193}
1194
1195void
1196ia64_cons_align (nbytes)
1197 int nbytes;
1198{
1199 if (md.auto_align)
1200 {
1201 char *saved_input_line_pointer = input_line_pointer;
1202 input_line_pointer = "";
1203 s_align_bytes (nbytes);
1204 input_line_pointer = saved_input_line_pointer;
1205 }
1206}
1207
1208/* Output COUNT bytes to a memory location. */
2132e3a3 1209static char *vbyte_mem_ptr = NULL;
800eeca4 1210
197865e8 1211void
800eeca4
JW		 1212output_vbyte_mem (count, ptr, comment)
1213 int count;
1214 char *ptr;
2434f565 1215 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1216{
1217 int x;
1218 if (vbyte_mem_ptr == NULL)
1219 abort ();
1220
1221 if (count == 0)
1222 return;
1223 for (x = 0; x < count; x++)
1224 *(vbyte_mem_ptr++) = ptr[x];
1225}
1226
1227/* Count the number of bytes required for records. */
1228static int vbyte_count = 0;
197865e8 1229void
800eeca4
JW		 1230count_output (count, ptr, comment)
1231 int count;
2434f565
JW		 1232 char *ptr ATTRIBUTE_UNUSED;
1233 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1234{
1235 vbyte_count += count;
1236}
1237
1238static void
1239output_R1_format (f, rtype, rlen)
1240 vbyte_func f;
1241 unw_record_type rtype;
1242 int rlen;
1243{
e0c9811a 1244 int r = 0;
800eeca4
JW		 1245 char byte;
1246 if (rlen > 0x1f)
1247 {
1248 output_R3_format (f, rtype, rlen);
1249 return;
1250 }
197865e8 1251
e0c9811a
JW		 1252 if (rtype == body)
1253 r = 1;
1254 else if (rtype != prologue)
1255 as_bad ("record type is not valid");
1256
800eeca4
JW		 1257 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1258 (*f) (1, &byte, NULL);
1259}
1260
1261static void
1262output_R2_format (f, mask, grsave, rlen)
1263 vbyte_func f;
1264 int mask, grsave;
1265 unsigned long rlen;
1266{
1267 char bytes[20];
1268 int count = 2;
1269 mask = (mask & 0x0f);
1270 grsave = (grsave & 0x7f);
1271
1272 bytes[0] = (UNW_R2 | (mask >> 1));
1273 bytes[1] = (((mask & 0x01) << 7) | grsave);
1274 count += output_leb128 (bytes + 2, rlen, 0);
1275 (*f) (count, bytes, NULL);
1276}
1277
1278static void
1279output_R3_format (f, rtype, rlen)
1280 vbyte_func f;
1281 unw_record_type rtype;
1282 unsigned long rlen;
1283{
e0c9811a 1284 int r = 0, count;
800eeca4
JW		 1285 char bytes[20];
1286 if (rlen <= 0x1f)
1287 {
1288 output_R1_format (f, rtype, rlen);
1289 return;
1290 }
197865e8 1291
e0c9811a
JW		 1292 if (rtype == body)
1293 r = 1;
1294 else if (rtype != prologue)
1295 as_bad ("record type is not valid");
800eeca4
JW		 1296 bytes[0] = (UNW_R3 | r);
1297 count = output_leb128 (bytes + 1, rlen, 0);
1298 (*f) (count + 1, bytes, NULL);
1299}
1300
1301static void
1302output_P1_format (f, brmask)
1303 vbyte_func f;
1304 int brmask;
1305{
1306 char byte;
1307 byte = UNW_P1 | (brmask & 0x1f);
1308 (*f) (1, &byte, NULL);
1309}
1310
1311static void
1312output_P2_format (f, brmask, gr)
1313 vbyte_func f;
1314 int brmask;
1315 int gr;
1316{
1317 char bytes[2];
1318 brmask = (brmask & 0x1f);
1319 bytes[0] = UNW_P2 | (brmask >> 1);
1320 bytes[1] = (((brmask & 1) << 7) | gr);
1321 (*f) (2, bytes, NULL);
1322}
1323
1324static void
1325output_P3_format (f, rtype, reg)
1326 vbyte_func f;
1327 unw_record_type rtype;
1328 int reg;
1329{
1330 char bytes[2];
e0c9811a 1331 int r = 0;
800eeca4
JW		 1332 reg = (reg & 0x7f);
1333 switch (rtype)
542d6675 1334 {
800eeca4
JW		 1335 case psp_gr:
1336 r = 0;
1337 break;
1338 case rp_gr:
1339 r = 1;
1340 break;
1341 case pfs_gr:
1342 r = 2;
1343 break;
1344 case preds_gr:
1345 r = 3;
1346 break;
1347 case unat_gr:
1348 r = 4;
1349 break;
1350 case lc_gr:
1351 r = 5;
1352 break;
1353 case rp_br:
1354 r = 6;
1355 break;
1356 case rnat_gr:
1357 r = 7;
1358 break;
1359 case bsp_gr:
1360 r = 8;
1361 break;
1362 case bspstore_gr:
1363 r = 9;
1364 break;
1365 case fpsr_gr:
1366 r = 10;
1367 break;
1368 case priunat_gr:
1369 r = 11;
1370 break;
1371 default:
1372 as_bad ("Invalid record type for P3 format.");
542d6675 1373 }
800eeca4
JW		 1374 bytes[0] = (UNW_P3 | (r >> 1));
1375 bytes[1] = (((r & 1) << 7) | reg);
1376 (*f) (2, bytes, NULL);
1377}
1378
800eeca4 1379static void
e0c9811a 1380output_P4_format (f, imask, imask_size)
800eeca4 1381 vbyte_func f;
e0c9811a
JW		 1382 unsigned char *imask;
1383 unsigned long imask_size;
800eeca4 1384{
e0c9811a 1385 imask[0] = UNW_P4;
2132e3a3 1386 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1387}
1388
1389static void
1390output_P5_format (f, grmask, frmask)
1391 vbyte_func f;
1392 int grmask;
1393 unsigned long frmask;
1394{
1395 char bytes[4];
1396 grmask = (grmask & 0x0f);
1397
1398 bytes[0] = UNW_P5;
1399 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1400 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1401 bytes[3] = (frmask & 0x000000ff);
1402 (*f) (4, bytes, NULL);
1403}
1404
1405static void
1406output_P6_format (f, rtype, rmask)
1407 vbyte_func f;
1408 unw_record_type rtype;
1409 int rmask;
1410{
1411 char byte;
e0c9811a 1412 int r = 0;
197865e8 1413
e0c9811a
JW		 1414 if (rtype == gr_mem)
1415 r = 1;
1416 else if (rtype != fr_mem)
1417 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1418 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1419 (*f) (1, &byte, NULL);
1420}
1421
1422static void
1423output_P7_format (f, rtype, w1, w2)
1424 vbyte_func f;
1425 unw_record_type rtype;
1426 unsigned long w1;
1427 unsigned long w2;
1428{
1429 char bytes[20];
1430 int count = 1;
e0c9811a 1431 int r = 0;
800eeca4
JW		 1432 count += output_leb128 (bytes + 1, w1, 0);
1433 switch (rtype)
1434 {
542d6675
KH		 1435 case mem_stack_f:
1436 r = 0;
1437 count += output_leb128 (bytes + count, w2 >> 4, 0);
1438 break;
1439 case mem_stack_v:
1440 r = 1;
1441 break;
1442 case spill_base:
1443 r = 2;
1444 break;
1445 case psp_sprel:
1446 r = 3;
1447 break;
1448 case rp_when:
1449 r = 4;
1450 break;
1451 case rp_psprel:
1452 r = 5;
1453 break;
1454 case pfs_when:
1455 r = 6;
1456 break;
1457 case pfs_psprel:
1458 r = 7;
1459 break;
1460 case preds_when:
1461 r = 8;
1462 break;
1463 case preds_psprel:
1464 r = 9;
1465 break;
1466 case lc_when:
1467 r = 10;
1468 break;
1469 case lc_psprel:
1470 r = 11;
1471 break;
1472 case unat_when:
1473 r = 12;
1474 break;
1475 case unat_psprel:
1476 r = 13;
1477 break;
1478 case fpsr_when:
1479 r = 14;
1480 break;
1481 case fpsr_psprel:
1482 r = 15;
1483 break;
1484 default:
1485 break;
800eeca4
JW		 1486 }
1487 bytes[0] = (UNW_P7 | r);
1488 (*f) (count, bytes, NULL);
1489}
1490
1491static void
1492output_P8_format (f, rtype, t)
1493 vbyte_func f;
1494 unw_record_type rtype;
1495 unsigned long t;
1496{
1497 char bytes[20];
e0c9811a 1498 int r = 0;
800eeca4
JW		 1499 int count = 2;
1500 bytes[0] = UNW_P8;
1501 switch (rtype)
1502 {
542d6675
KH		 1503 case rp_sprel:
1504 r = 1;
1505 break;
1506 case pfs_sprel:
1507 r = 2;
1508 break;
1509 case preds_sprel:
1510 r = 3;
1511 break;
1512 case lc_sprel:
1513 r = 4;
1514 break;
1515 case unat_sprel:
1516 r = 5;
1517 break;
1518 case fpsr_sprel:
1519 r = 6;
1520 break;
1521 case bsp_when:
1522 r = 7;
1523 break;
1524 case bsp_psprel:
1525 r = 8;
1526 break;
1527 case bsp_sprel:
1528 r = 9;
1529 break;
1530 case bspstore_when:
1531 r = 10;
1532 break;
1533 case bspstore_psprel:
1534 r = 11;
1535 break;
1536 case bspstore_sprel:
1537 r = 12;
1538 break;
1539 case rnat_when:
1540 r = 13;
1541 break;
1542 case rnat_psprel:
1543 r = 14;
1544 break;
1545 case rnat_sprel:
1546 r = 15;
1547 break;
1548 case priunat_when_gr:
1549 r = 16;
1550 break;
1551 case priunat_psprel:
1552 r = 17;
1553 break;
1554 case priunat_sprel:
1555 r = 18;
1556 break;
1557 case priunat_when_mem:
1558 r = 19;
1559 break;
1560 default:
1561 break;
800eeca4
JW		 1562 }
1563 bytes[1] = r;
1564 count += output_leb128 (bytes + 2, t, 0);
1565 (*f) (count, bytes, NULL);
1566}
1567
1568static void
1569output_P9_format (f, grmask, gr)
1570 vbyte_func f;
1571 int grmask;
1572 int gr;
1573{
1574 char bytes[3];
1575 bytes[0] = UNW_P9;
1576 bytes[1] = (grmask & 0x0f);
1577 bytes[2] = (gr & 0x7f);
1578 (*f) (3, bytes, NULL);
1579}
1580
1581static void
1582output_P10_format (f, abi, context)
1583 vbyte_func f;
1584 int abi;
1585 int context;
1586{
1587 char bytes[3];
1588 bytes[0] = UNW_P10;
1589 bytes[1] = (abi & 0xff);
1590 bytes[2] = (context & 0xff);
1591 (*f) (3, bytes, NULL);
1592}
1593
1594static void
1595output_B1_format (f, rtype, label)
1596 vbyte_func f;
1597 unw_record_type rtype;
1598 unsigned long label;
1599{
1600 char byte;
e0c9811a 1601 int r = 0;
197865e8 1602 if (label > 0x1f)
800eeca4
JW		 1603 {
1604 output_B4_format (f, rtype, label);
1605 return;
1606 }
e0c9811a
JW		 1607 if (rtype == copy_state)
1608 r = 1;
1609 else if (rtype != label_state)
1610 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1611
1612 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1613 (*f) (1, &byte, NULL);
1614}
1615
1616static void
1617output_B2_format (f, ecount, t)
1618 vbyte_func f;
1619 unsigned long ecount;
1620 unsigned long t;
1621{
1622 char bytes[20];
1623 int count = 1;
1624 if (ecount > 0x1f)
1625 {
1626 output_B3_format (f, ecount, t);
1627 return;
1628 }
1629 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1630 count += output_leb128 (bytes + 1, t, 0);
1631 (*f) (count, bytes, NULL);
1632}
1633
1634static void
1635output_B3_format (f, ecount, t)
1636 vbyte_func f;
1637 unsigned long ecount;
1638 unsigned long t;
1639{
1640 char bytes[20];
1641 int count = 1;
1642 if (ecount <= 0x1f)
1643 {
1644 output_B2_format (f, ecount, t);
1645 return;
1646 }
1647 bytes[0] = UNW_B3;
1648 count += output_leb128 (bytes + 1, t, 0);
1649 count += output_leb128 (bytes + count, ecount, 0);
1650 (*f) (count, bytes, NULL);
1651}
1652
1653static void
1654output_B4_format (f, rtype, label)
1655 vbyte_func f;
1656 unw_record_type rtype;
1657 unsigned long label;
1658{
1659 char bytes[20];
e0c9811a 1660 int r = 0;
800eeca4 1661 int count = 1;
197865e8 1662 if (label <= 0x1f)
800eeca4
JW		 1663 {
1664 output_B1_format (f, rtype, label);
1665 return;
1666 }
197865e8 1667
e0c9811a
JW		 1668 if (rtype == copy_state)
1669 r = 1;
1670 else if (rtype != label_state)
1671 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1672
1673 bytes[0] = (UNW_B4 | (r << 3));
1674 count += output_leb128 (bytes + 1, label, 0);
1675 (*f) (count, bytes, NULL);
1676}
1677
1678static char
e0c9811a 1679format_ab_reg (ab, reg)
542d6675
KH		 1680 int ab;
1681 int reg;
800eeca4
JW		 1682{
1683 int ret;
e0c9811a 1684 ab = (ab & 3);
800eeca4 1685 reg = (reg & 0x1f);
e0c9811a 1686 ret = (ab << 5) | reg;
800eeca4
JW		 1687 return ret;
1688}
1689
1690static void
e0c9811a 1691output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1692 vbyte_func f;
1693 unw_record_type rtype;
e0c9811a 1694 int ab, reg;
800eeca4
JW		 1695 unsigned long t;
1696 unsigned long w1;
1697{
1698 char bytes[20];
e0c9811a 1699 int r = 0;
800eeca4
JW		 1700 int count = 2;
1701 bytes[0] = UNW_X1;
197865e8 1702
e0c9811a
JW		 1703 if (rtype == spill_sprel)
1704 r = 1;
1705 else if (rtype != spill_psprel)
1706 as_bad ("Invalid record type for format X1");
1707 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1708 count += output_leb128 (bytes + 2, t, 0);
1709 count += output_leb128 (bytes + count, w1, 0);
1710 (*f) (count, bytes, NULL);
1711}
1712
1713static void
e0c9811a 1714output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1715 vbyte_func f;
e0c9811a 1716 int ab, reg;
800eeca4
JW		 1717 int x, y, treg;
1718 unsigned long t;
1719{
1720 char bytes[20];
800eeca4
JW		 1721 int count = 3;
1722 bytes[0] = UNW_X2;
e0c9811a 1723 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1724 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1725 count += output_leb128 (bytes + 3, t, 0);
1726 (*f) (count, bytes, NULL);
1727}
1728
1729static void
e0c9811a 1730output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1731 vbyte_func f;
1732 unw_record_type rtype;
1733 int qp;
e0c9811a 1734 int ab, reg;
800eeca4
JW		 1735 unsigned long t;
1736 unsigned long w1;
1737{
1738 char bytes[20];
e0c9811a 1739 int r = 0;
800eeca4 1740 int count = 3;
e0c9811a
JW		 1741 bytes[0] = UNW_X3;
1742
1743 if (rtype == spill_sprel_p)
1744 r = 1;
1745 else if (rtype != spill_psprel_p)
1746 as_bad ("Invalid record type for format X3");
800eeca4 1747 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1748 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1749 count += output_leb128 (bytes + 3, t, 0);
1750 count += output_leb128 (bytes + count, w1, 0);
1751 (*f) (count, bytes, NULL);
1752}
1753
1754static void
e0c9811a 1755output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1756 vbyte_func f;
1757 int qp;
e0c9811a 1758 int ab, reg;
800eeca4
JW		 1759 int x, y, treg;
1760 unsigned long t;
1761{
1762 char bytes[20];
800eeca4 1763 int count = 4;
e0c9811a 1764 bytes[0] = UNW_X4;
800eeca4 1765 bytes[1] = (qp & 0x3f);
e0c9811a 1766 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1767 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1768 count += output_leb128 (bytes + 4, t, 0);
1769 (*f) (count, bytes, NULL);
1770}
1771
ba825241
JB		 1772/* This function checks whether there are any outstanding .save-s and
1773 discards them if so. */
1774
1775static void
1776check_pending_save (void)
1777{
1778 if (unwind.pending_saves)
1779 {
1780 unw_rec_list *cur, *prev;
1781
1782 as_warn ("Previous .save incomplete");
1783 for (cur = unwind.list, prev = NULL; cur; )
1784 if (&cur->r.record.p == unwind.pending_saves)
1785 {
1786 if (prev)
1787 prev->next = cur->next;
1788 else
1789 unwind.list = cur->next;
1790 if (cur == unwind.tail)
1791 unwind.tail = prev;
1792 if (cur == unwind.current_entry)
1793 unwind.current_entry = cur->next;
1794 /* Don't free the first discarded record, it's being used as
1795 terminator for (currently) br_gr and gr_gr processing, and
1796 also prevents leaving a dangling pointer to it in its
1797 predecessor. */
1798 cur->r.record.p.grmask = 0;
1799 cur->r.record.p.brmask = 0;
1800 cur->r.record.p.frmask = 0;
1801 prev = cur->r.record.p.next;
1802 cur->r.record.p.next = NULL;
1803 cur = prev;
1804 break;
1805 }
1806 else
1807 {
1808 prev = cur;
1809 cur = cur->next;
1810 }
1811 while (cur)
1812 {
1813 prev = cur;
1814 cur = cur->r.record.p.next;
1815 free (prev);
1816 }
1817 unwind.pending_saves = NULL;
1818 }
1819}
1820
800eeca4 1821/* This function allocates a record list structure, and initializes fields. */
542d6675 1822
800eeca4 1823static unw_rec_list *
197865e8 1824alloc_record (unw_record_type t)
800eeca4
JW		 1825{
1826 unw_rec_list *ptr;
1827 ptr = xmalloc (sizeof (*ptr));
ba825241 1828 memset (ptr, 0, sizeof (*ptr));
800eeca4
JW		 1829 ptr->slot_number = SLOT_NUM_NOT_SET;
1830 ptr->r.type = t;
1831 return ptr;
1832}
1833
5738bc24
JW		 1834/* Dummy unwind record used for calculating the length of the last prologue or
1835 body region. */
1836
1837static unw_rec_list *
1838output_endp ()
1839{
1840 unw_rec_list *ptr = alloc_record (endp);
1841 return ptr;
1842}
1843
800eeca4
JW		 1844static unw_rec_list *
1845output_prologue ()
1846{
1847 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1848 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1849 return ptr;
1850}
1851
1852static unw_rec_list *
1853output_prologue_gr (saved_mask, reg)
1854 unsigned int saved_mask;
1855 unsigned int reg;
1856{
1857 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1858 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1859 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1860 ptr->r.record.r.grsave = reg;
1861 return ptr;
1862}
1863
1864static unw_rec_list *
1865output_body ()
1866{
1867 unw_rec_list *ptr = alloc_record (body);
1868 return ptr;
1869}
1870
1871static unw_rec_list *
1872output_mem_stack_f (size)
1873 unsigned int size;
1874{
1875 unw_rec_list *ptr = alloc_record (mem_stack_f);
1876 ptr->r.record.p.size = size;
1877 return ptr;
1878}
1879
1880static unw_rec_list *
1881output_mem_stack_v ()
1882{
1883 unw_rec_list *ptr = alloc_record (mem_stack_v);
1884 return ptr;
1885}
1886
1887static unw_rec_list *
1888output_psp_gr (gr)
1889 unsigned int gr;
1890{
1891 unw_rec_list *ptr = alloc_record (psp_gr);
ba825241 1892 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1893 return ptr;
1894}
1895
1896static unw_rec_list *
1897output_psp_sprel (offset)
1898 unsigned int offset;
1899{
1900 unw_rec_list *ptr = alloc_record (psp_sprel);
ba825241 1901 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1902 return ptr;
1903}
1904
1905static unw_rec_list *
1906output_rp_when ()
1907{
1908 unw_rec_list *ptr = alloc_record (rp_when);
1909 return ptr;
1910}
1911
1912static unw_rec_list *
1913output_rp_gr (gr)
1914 unsigned int gr;
1915{
1916 unw_rec_list *ptr = alloc_record (rp_gr);
ba825241 1917 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1918 return ptr;
1919}
1920
1921static unw_rec_list *
1922output_rp_br (br)
1923 unsigned int br;
1924{
1925 unw_rec_list *ptr = alloc_record (rp_br);
ba825241 1926 ptr->r.record.p.r.br = br;
800eeca4
JW		 1927 return ptr;
1928}
1929
1930static unw_rec_list *
1931output_rp_psprel (offset)
1932 unsigned int offset;
1933{
1934 unw_rec_list *ptr = alloc_record (rp_psprel);
ba825241 1935 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1936 return ptr;
1937}
1938
1939static unw_rec_list *
1940output_rp_sprel (offset)
1941 unsigned int offset;
1942{
1943 unw_rec_list *ptr = alloc_record (rp_sprel);
ba825241 1944 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1945 return ptr;
1946}
1947
1948static unw_rec_list *
1949output_pfs_when ()
1950{
1951 unw_rec_list *ptr = alloc_record (pfs_when);
1952 return ptr;
1953}
1954
1955static unw_rec_list *
1956output_pfs_gr (gr)
1957 unsigned int gr;
1958{
1959 unw_rec_list *ptr = alloc_record (pfs_gr);
ba825241 1960 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1961 return ptr;
1962}
1963
1964static unw_rec_list *
1965output_pfs_psprel (offset)
1966 unsigned int offset;
1967{
1968 unw_rec_list *ptr = alloc_record (pfs_psprel);
ba825241 1969 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1970 return ptr;
1971}
1972
1973static unw_rec_list *
1974output_pfs_sprel (offset)
1975 unsigned int offset;
1976{
1977 unw_rec_list *ptr = alloc_record (pfs_sprel);
ba825241 1978 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 1979 return ptr;
1980}
1981
1982static unw_rec_list *
1983output_preds_when ()
1984{
1985 unw_rec_list *ptr = alloc_record (preds_when);
1986 return ptr;
1987}
1988
1989static unw_rec_list *
1990output_preds_gr (gr)
1991 unsigned int gr;
1992{
1993 unw_rec_list *ptr = alloc_record (preds_gr);
ba825241 1994 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 1995 return ptr;
1996}
1997
1998static unw_rec_list *
1999output_preds_psprel (offset)
2000 unsigned int offset;
2001{
2002 unw_rec_list *ptr = alloc_record (preds_psprel);
ba825241 2003 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2004 return ptr;
2005}
2006
2007static unw_rec_list *
2008output_preds_sprel (offset)
2009 unsigned int offset;
2010{
2011 unw_rec_list *ptr = alloc_record (preds_sprel);
ba825241 2012 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2013 return ptr;
2014}
2015
2016static unw_rec_list *
2017output_fr_mem (mask)
2018 unsigned int mask;
2019{
2020 unw_rec_list *ptr = alloc_record (fr_mem);
ba825241
JB		 2021 unw_rec_list *cur = ptr;
2022
2023 ptr->r.record.p.frmask = mask;
2024 unwind.pending_saves = &ptr->r.record.p;
2025 for (;;)
2026 {
2027 unw_rec_list *prev = cur;
2028
2029 /* Clear least significant set bit. */
2030 mask &= ~(mask & (~mask + 1));
2031 if (!mask)
2032 return ptr;
2033 cur = alloc_record (fr_mem);
2034 cur->r.record.p.frmask = mask;
2035 /* Retain only least significant bit. */
2036 prev->r.record.p.frmask ^= mask;
2037 prev->r.record.p.next = cur;
2038 }
800eeca4
JW		 2039}
2040
2041static unw_rec_list *
2042output_frgr_mem (gr_mask, fr_mask)
2043 unsigned int gr_mask;
2044 unsigned int fr_mask;
2045{
2046 unw_rec_list *ptr = alloc_record (frgr_mem);
ba825241
JB		 2047 unw_rec_list *cur = ptr;
2048
2049 unwind.pending_saves = &cur->r.record.p;
2050 cur->r.record.p.frmask = fr_mask;
2051 while (fr_mask)
2052 {
2053 unw_rec_list *prev = cur;
2054
2055 /* Clear least significant set bit. */
2056 fr_mask &= ~(fr_mask & (~fr_mask + 1));
2057 if (!gr_mask && !fr_mask)
2058 return ptr;
2059 cur = alloc_record (frgr_mem);
2060 cur->r.record.p.frmask = fr_mask;
2061 /* Retain only least significant bit. */
2062 prev->r.record.p.frmask ^= fr_mask;
2063 prev->r.record.p.next = cur;
2064 }
2065 cur->r.record.p.grmask = gr_mask;
2066 for (;;)
2067 {
2068 unw_rec_list *prev = cur;
2069
2070 /* Clear least significant set bit. */
2071 gr_mask &= ~(gr_mask & (~gr_mask + 1));
2072 if (!gr_mask)
2073 return ptr;
2074 cur = alloc_record (frgr_mem);
2075 cur->r.record.p.grmask = gr_mask;
2076 /* Retain only least significant bit. */
2077 prev->r.record.p.grmask ^= gr_mask;
2078 prev->r.record.p.next = cur;
2079 }
800eeca4
JW		 2080}
2081
2082static unw_rec_list *
2083output_gr_gr (mask, reg)
2084 unsigned int mask;
2085 unsigned int reg;
2086{
2087 unw_rec_list *ptr = alloc_record (gr_gr);
ba825241
JB		 2088 unw_rec_list *cur = ptr;
2089
800eeca4 2090 ptr->r.record.p.grmask = mask;
ba825241
JB		 2091 ptr->r.record.p.r.gr = reg;
2092 unwind.pending_saves = &ptr->r.record.p;
2093 for (;;)
2094 {
2095 unw_rec_list *prev = cur;
2096
2097 /* Clear least significant set bit. */
2098 mask &= ~(mask & (~mask + 1));
2099 if (!mask)
2100 return ptr;
2101 cur = alloc_record (gr_gr);
2102 cur->r.record.p.grmask = mask;
2103 /* Indicate this record shouldn't be output. */
2104 cur->r.record.p.r.gr = REG_NUM;
2105 /* Retain only least significant bit. */
2106 prev->r.record.p.grmask ^= mask;
2107 prev->r.record.p.next = cur;
2108 }
800eeca4
JW		 2109}
2110
2111static unw_rec_list *
2112output_gr_mem (mask)
2113 unsigned int mask;
2114{
2115 unw_rec_list *ptr = alloc_record (gr_mem);
ba825241
JB		 2116 unw_rec_list *cur = ptr;
2117
2118 ptr->r.record.p.grmask = mask;
2119 unwind.pending_saves = &ptr->r.record.p;
2120 for (;;)
2121 {
2122 unw_rec_list *prev = cur;
2123
2124 /* Clear least significant set bit. */
2125 mask &= ~(mask & (~mask + 1));
2126 if (!mask)
2127 return ptr;
2128 cur = alloc_record (gr_mem);
2129 cur->r.record.p.grmask = mask;
2130 /* Retain only least significant bit. */
2131 prev->r.record.p.grmask ^= mask;
2132 prev->r.record.p.next = cur;
2133 }
800eeca4
JW		 2134}
2135
2136static unw_rec_list *
2137output_br_mem (unsigned int mask)
2138{
2139 unw_rec_list *ptr = alloc_record (br_mem);
ba825241
JB		 2140 unw_rec_list *cur = ptr;
2141
800eeca4 2142 ptr->r.record.p.brmask = mask;
ba825241
JB		 2143 unwind.pending_saves = &ptr->r.record.p;
2144 for (;;)
2145 {
2146 unw_rec_list *prev = cur;
2147
2148 /* Clear least significant set bit. */
2149 mask &= ~(mask & (~mask + 1));
2150 if (!mask)
2151 return ptr;
2152 cur = alloc_record (br_mem);
2153 cur->r.record.p.brmask = mask;
2154 /* Retain only least significant bit. */
2155 prev->r.record.p.brmask ^= mask;
2156 prev->r.record.p.next = cur;
2157 }
800eeca4
JW		 2158}
2159
2160static unw_rec_list *
ba825241
JB		 2161output_br_gr (mask, reg)
2162 unsigned int mask;
800eeca4
JW		 2163 unsigned int reg;
2164{
2165 unw_rec_list *ptr = alloc_record (br_gr);
ba825241
JB		 2166 unw_rec_list *cur = ptr;
2167
2168 ptr->r.record.p.brmask = mask;
2169 ptr->r.record.p.r.gr = reg;
2170 unwind.pending_saves = &ptr->r.record.p;
2171 for (;;)
2172 {
2173 unw_rec_list *prev = cur;
2174
2175 /* Clear least significant set bit. */
2176 mask &= ~(mask & (~mask + 1));
2177 if (!mask)
2178 return ptr;
2179 cur = alloc_record (br_gr);
2180 cur->r.record.p.brmask = mask;
2181 /* Indicate this record shouldn't be output. */
2182 cur->r.record.p.r.gr = REG_NUM;
2183 /* Retain only least significant bit. */
2184 prev->r.record.p.brmask ^= mask;
2185 prev->r.record.p.next = cur;
2186 }
800eeca4
JW		 2187}
2188
2189static unw_rec_list *
2190output_spill_base (offset)
2191 unsigned int offset;
2192{
2193 unw_rec_list *ptr = alloc_record (spill_base);
ba825241 2194 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2195 return ptr;
2196}
2197
2198static unw_rec_list *
2199output_unat_when ()
2200{
2201 unw_rec_list *ptr = alloc_record (unat_when);
2202 return ptr;
2203}
2204
2205static unw_rec_list *
2206output_unat_gr (gr)
2207 unsigned int gr;
2208{
2209 unw_rec_list *ptr = alloc_record (unat_gr);
ba825241 2210 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2211 return ptr;
2212}
2213
2214static unw_rec_list *
2215output_unat_psprel (offset)
2216 unsigned int offset;
2217{
2218 unw_rec_list *ptr = alloc_record (unat_psprel);
ba825241 2219 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2220 return ptr;
2221}
2222
2223static unw_rec_list *
2224output_unat_sprel (offset)
2225 unsigned int offset;
2226{
2227 unw_rec_list *ptr = alloc_record (unat_sprel);
ba825241 2228 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2229 return ptr;
2230}
2231
2232static unw_rec_list *
2233output_lc_when ()
2234{
2235 unw_rec_list *ptr = alloc_record (lc_when);
2236 return ptr;
2237}
2238
2239static unw_rec_list *
2240output_lc_gr (gr)
2241 unsigned int gr;
2242{
2243 unw_rec_list *ptr = alloc_record (lc_gr);
ba825241 2244 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2245 return ptr;
2246}
2247
2248static unw_rec_list *
2249output_lc_psprel (offset)
2250 unsigned int offset;
2251{
2252 unw_rec_list *ptr = alloc_record (lc_psprel);
ba825241 2253 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2254 return ptr;
2255}
2256
2257static unw_rec_list *
2258output_lc_sprel (offset)
2259 unsigned int offset;
2260{
2261 unw_rec_list *ptr = alloc_record (lc_sprel);
ba825241 2262 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2263 return ptr;
2264}
2265
2266static unw_rec_list *
2267output_fpsr_when ()
2268{
2269 unw_rec_list *ptr = alloc_record (fpsr_when);
2270 return ptr;
2271}
2272
2273static unw_rec_list *
2274output_fpsr_gr (gr)
2275 unsigned int gr;
2276{
2277 unw_rec_list *ptr = alloc_record (fpsr_gr);
ba825241 2278 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2279 return ptr;
2280}
2281
2282static unw_rec_list *
2283output_fpsr_psprel (offset)
2284 unsigned int offset;
2285{
2286 unw_rec_list *ptr = alloc_record (fpsr_psprel);
ba825241 2287 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2288 return ptr;
2289}
2290
2291static unw_rec_list *
2292output_fpsr_sprel (offset)
2293 unsigned int offset;
2294{
2295 unw_rec_list *ptr = alloc_record (fpsr_sprel);
ba825241 2296 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2297 return ptr;
2298}
2299
2300static unw_rec_list *
2301output_priunat_when_gr ()
2302{
2303 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2304 return ptr;
2305}
2306
2307static unw_rec_list *
2308output_priunat_when_mem ()
2309{
2310 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2311 return ptr;
2312}
2313
2314static unw_rec_list *
2315output_priunat_gr (gr)
2316 unsigned int gr;
2317{
2318 unw_rec_list *ptr = alloc_record (priunat_gr);
ba825241 2319 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2320 return ptr;
2321}
2322
2323static unw_rec_list *
2324output_priunat_psprel (offset)
2325 unsigned int offset;
2326{
2327 unw_rec_list *ptr = alloc_record (priunat_psprel);
ba825241 2328 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2329 return ptr;
2330}
2331
2332static unw_rec_list *
2333output_priunat_sprel (offset)
2334 unsigned int offset;
2335{
2336 unw_rec_list *ptr = alloc_record (priunat_sprel);
ba825241 2337 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2338 return ptr;
2339}
2340
2341static unw_rec_list *
2342output_bsp_when ()
2343{
2344 unw_rec_list *ptr = alloc_record (bsp_when);
2345 return ptr;
2346}
2347
2348static unw_rec_list *
2349output_bsp_gr (gr)
2350 unsigned int gr;
2351{
2352 unw_rec_list *ptr = alloc_record (bsp_gr);
ba825241 2353 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2354 return ptr;
2355}
2356
2357static unw_rec_list *
2358output_bsp_psprel (offset)
2359 unsigned int offset;
2360{
2361 unw_rec_list *ptr = alloc_record (bsp_psprel);
ba825241 2362 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2363 return ptr;
2364}
2365
2366static unw_rec_list *
2367output_bsp_sprel (offset)
2368 unsigned int offset;
2369{
2370 unw_rec_list *ptr = alloc_record (bsp_sprel);
ba825241 2371 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2372 return ptr;
2373}
2374
2375static unw_rec_list *
2376output_bspstore_when ()
2377{
2378 unw_rec_list *ptr = alloc_record (bspstore_when);
2379 return ptr;
2380}
2381
2382static unw_rec_list *
2383output_bspstore_gr (gr)
2384 unsigned int gr;
2385{
2386 unw_rec_list *ptr = alloc_record (bspstore_gr);
ba825241 2387 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2388 return ptr;
2389}
2390
2391static unw_rec_list *
2392output_bspstore_psprel (offset)
2393 unsigned int offset;
2394{
2395 unw_rec_list *ptr = alloc_record (bspstore_psprel);
ba825241 2396 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2397 return ptr;
2398}
2399
2400static unw_rec_list *
2401output_bspstore_sprel (offset)
2402 unsigned int offset;
2403{
2404 unw_rec_list *ptr = alloc_record (bspstore_sprel);
ba825241 2405 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2406 return ptr;
2407}
2408
2409static unw_rec_list *
2410output_rnat_when ()
2411{
2412 unw_rec_list *ptr = alloc_record (rnat_when);
2413 return ptr;
2414}
2415
2416static unw_rec_list *
2417output_rnat_gr (gr)
2418 unsigned int gr;
2419{
2420 unw_rec_list *ptr = alloc_record (rnat_gr);
ba825241 2421 ptr->r.record.p.r.gr = gr;
800eeca4
JW		 2422 return ptr;
2423}
2424
2425static unw_rec_list *
2426output_rnat_psprel (offset)
2427 unsigned int offset;
2428{
2429 unw_rec_list *ptr = alloc_record (rnat_psprel);
ba825241 2430 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2431 return ptr;
2432}
2433
2434static unw_rec_list *
2435output_rnat_sprel (offset)
2436 unsigned int offset;
2437{
2438 unw_rec_list *ptr = alloc_record (rnat_sprel);
ba825241 2439 ptr->r.record.p.off.sp = offset / 4;
800eeca4
JW		 2440 return ptr;
2441}
2442
2443static unw_rec_list *
e0c9811a
JW		 2444output_unwabi (abi, context)
2445 unsigned long abi;
2446 unsigned long context;
800eeca4 2447{
e0c9811a
JW		 2448 unw_rec_list *ptr = alloc_record (unwabi);
2449 ptr->r.record.p.abi = abi;
2450 ptr->r.record.p.context = context;
800eeca4
JW		 2451 return ptr;
2452}
2453
2454static unw_rec_list *
e0c9811a 2455output_epilogue (unsigned long ecount)
800eeca4 2456{
e0c9811a
JW		 2457 unw_rec_list *ptr = alloc_record (epilogue);
2458 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2459 return ptr;
2460}
2461
2462static unw_rec_list *
e0c9811a 2463output_label_state (unsigned long label)
800eeca4 2464{
e0c9811a
JW		 2465 unw_rec_list *ptr = alloc_record (label_state);
2466 ptr->r.record.b.label = label;
800eeca4
JW		 2467 return ptr;
2468}
2469
2470static unw_rec_list *
e0c9811a
JW		 2471output_copy_state (unsigned long label)
2472{
2473 unw_rec_list *ptr = alloc_record (copy_state);
2474 ptr->r.record.b.label = label;
2475 return ptr;
2476}
2477
2478static unw_rec_list *
e4e8248d 2479output_spill_psprel (ab, reg, offset, predicate)
e0c9811a 2480 unsigned int ab;
800eeca4
JW		 2481 unsigned int reg;
2482 unsigned int offset;
2483 unsigned int predicate;
2484{
e4e8248d 2485 unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel);
e0c9811a 2486 ptr->r.record.x.ab = ab;
800eeca4 2487 ptr->r.record.x.reg = reg;
ba825241 2488 ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2489 ptr->r.record.x.qp = predicate;
2490 return ptr;
2491}
2492
2493static unw_rec_list *
e4e8248d 2494output_spill_sprel (ab, reg, offset, predicate)
e0c9811a 2495 unsigned int ab;
800eeca4
JW		 2496 unsigned int reg;
2497 unsigned int offset;
2498 unsigned int predicate;
2499{
e4e8248d 2500 unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel);
e0c9811a 2501 ptr->r.record.x.ab = ab;
800eeca4 2502 ptr->r.record.x.reg = reg;
ba825241 2503 ptr->r.record.x.where.spoff = offset / 4;
800eeca4
JW		 2504 ptr->r.record.x.qp = predicate;
2505 return ptr;
2506}
2507
2508static unw_rec_list *
e4e8248d 2509output_spill_reg (ab, reg, targ_reg, xy, predicate)
e0c9811a 2510 unsigned int ab;
800eeca4
JW		 2511 unsigned int reg;
2512 unsigned int targ_reg;
2513 unsigned int xy;
2514 unsigned int predicate;
2515{
e4e8248d 2516 unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg);
e0c9811a 2517 ptr->r.record.x.ab = ab;
800eeca4 2518 ptr->r.record.x.reg = reg;
ba825241 2519 ptr->r.record.x.where.reg = targ_reg;
800eeca4
JW		 2520 ptr->r.record.x.xy = xy;
2521 ptr->r.record.x.qp = predicate;
2522 return ptr;
2523}
2524
197865e8 2525/* Given a unw_rec_list process the correct format with the
800eeca4 2526 specified function. */
542d6675 2527
800eeca4
JW		 2528static void
2529process_one_record (ptr, f)
2530 unw_rec_list *ptr;
2531 vbyte_func f;
2532{
ba825241 2533 unsigned int fr_mask, gr_mask;
e0c9811a 2534
197865e8 2535 switch (ptr->r.type)
800eeca4 2536 {
5738bc24
JW		 2537 /* This is a dummy record that takes up no space in the output. */
2538 case endp:
2539 break;
2540
542d6675
KH		 2541 case gr_mem:
2542 case fr_mem:
2543 case br_mem:
2544 case frgr_mem:
2545 /* These are taken care of by prologue/prologue_gr. */
2546 break;
e0c9811a 2547
542d6675
KH		 2548 case prologue_gr:
2549 case prologue:
2550 if (ptr->r.type == prologue_gr)
2551 output_R2_format (f, ptr->r.record.r.grmask,
2552 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2553 else
800eeca4 2554 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2555
2556 /* Output descriptor(s) for union of register spills (if any). */
2557 gr_mask = ptr->r.record.r.mask.gr_mem;
2558 fr_mask = ptr->r.record.r.mask.fr_mem;
2559 if (fr_mask)
2560 {
2561 if ((fr_mask & ~0xfUL) == 0)
2562 output_P6_format (f, fr_mem, fr_mask);
2563 else
2564 {
2565 output_P5_format (f, gr_mask, fr_mask);
2566 gr_mask = 0;
2567 }
2568 }
2569 if (gr_mask)
2570 output_P6_format (f, gr_mem, gr_mask);
2571 if (ptr->r.record.r.mask.br_mem)
2572 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2573
2574 /* output imask descriptor if necessary: */
2575 if (ptr->r.record.r.mask.i)
2576 output_P4_format (f, ptr->r.record.r.mask.i,
2577 ptr->r.record.r.imask_size);
2578 break;
2579
2580 case body:
2581 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2582 break;
2583 case mem_stack_f:
2584 case mem_stack_v:
2585 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2586 ptr->r.record.p.size);
2587 break;
2588 case psp_gr:
2589 case rp_gr:
2590 case pfs_gr:
2591 case preds_gr:
2592 case unat_gr:
2593 case lc_gr:
2594 case fpsr_gr:
2595 case priunat_gr:
2596 case bsp_gr:
2597 case bspstore_gr:
2598 case rnat_gr:
ba825241 2599 output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr);
542d6675
KH		 2600 break;
2601 case rp_br:
ba825241 2602 output_P3_format (f, rp_br, ptr->r.record.p.r.br);
542d6675
KH		 2603 break;
2604 case psp_sprel:
ba825241 2605 output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0);
542d6675
KH		 2606 break;
2607 case rp_when:
2608 case pfs_when:
2609 case preds_when:
2610 case unat_when:
2611 case lc_when:
2612 case fpsr_when:
2613 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2614 break;
2615 case rp_psprel:
2616 case pfs_psprel:
2617 case preds_psprel:
2618 case unat_psprel:
2619 case lc_psprel:
2620 case fpsr_psprel:
2621 case spill_base:
ba825241 2622 output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0);
542d6675
KH		 2623 break;
2624 case rp_sprel:
2625 case pfs_sprel:
2626 case preds_sprel:
2627 case unat_sprel:
2628 case lc_sprel:
2629 case fpsr_sprel:
2630 case priunat_sprel:
2631 case bsp_sprel:
2632 case bspstore_sprel:
2633 case rnat_sprel:
ba825241 2634 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp);
542d6675
KH		 2635 break;
2636 case gr_gr:
ba825241
JB		 2637 if (ptr->r.record.p.r.gr < REG_NUM)
2638 {
2639 const unw_rec_list *cur = ptr;
2640
2641 gr_mask = cur->r.record.p.grmask;
2642 while ((cur = cur->r.record.p.next) != NULL)
2643 gr_mask |= cur->r.record.p.grmask;
2644 output_P9_format (f, gr_mask, ptr->r.record.p.r.gr);
2645 }
542d6675
KH		 2646 break;
2647 case br_gr:
ba825241
JB		 2648 if (ptr->r.record.p.r.gr < REG_NUM)
2649 {
2650 const unw_rec_list *cur = ptr;
2651
2652 gr_mask = cur->r.record.p.brmask;
2653 while ((cur = cur->r.record.p.next) != NULL)
2654 gr_mask |= cur->r.record.p.brmask;
2655 output_P2_format (f, gr_mask, ptr->r.record.p.r.gr);
2656 }
542d6675
KH		 2657 break;
2658 case spill_mask:
2659 as_bad ("spill_mask record unimplemented.");
2660 break;
2661 case priunat_when_gr:
2662 case priunat_when_mem:
2663 case bsp_when:
2664 case bspstore_when:
2665 case rnat_when:
2666 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2667 break;
2668 case priunat_psprel:
2669 case bsp_psprel:
2670 case bspstore_psprel:
2671 case rnat_psprel:
ba825241 2672 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp);
542d6675
KH		 2673 break;
2674 case unwabi:
2675 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2676 break;
2677 case epilogue:
2678 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2679 break;
2680 case label_state:
2681 case copy_state:
2682 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2683 break;
2684 case spill_psprel:
2685 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2686 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2687 ptr->r.record.x.where.pspoff);
542d6675
KH		 2688 break;
2689 case spill_sprel:
2690 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2691 ptr->r.record.x.reg, ptr->r.record.x.t,
ba825241 2692 ptr->r.record.x.where.spoff);
542d6675
KH		 2693 break;
2694 case spill_reg:
2695 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2696 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
ba825241 2697 ptr->r.record.x.where.reg, ptr->r.record.x.t);
542d6675
KH		 2698 break;
2699 case spill_psprel_p:
2700 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2701 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2702 ptr->r.record.x.t, ptr->r.record.x.where.pspoff);
542d6675
KH		 2703 break;
2704 case spill_sprel_p:
2705 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2706 ptr->r.record.x.ab, ptr->r.record.x.reg,
ba825241 2707 ptr->r.record.x.t, ptr->r.record.x.where.spoff);
542d6675
KH		 2708 break;
2709 case spill_reg_p:
2710 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2711 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
ba825241 2712 ptr->r.record.x.xy, ptr->r.record.x.where.reg,
542d6675
KH		 2713 ptr->r.record.x.t);
2714 break;
2715 default:
2716 as_bad ("record_type_not_valid");
2717 break;
800eeca4
JW		 2718 }
2719}
2720
197865e8 2721/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2722 the specified function. */
2723static void
2724process_unw_records (list, f)
2725 unw_rec_list *list;
2726 vbyte_func f;
2727{
2728 unw_rec_list *ptr;
2729 for (ptr = list; ptr; ptr = ptr->next)
2730 process_one_record (ptr, f);
2731}
2732
2733/* Determine the size of a record list in bytes. */
2734static int
2735calc_record_size (list)
2736 unw_rec_list *list;
2737{
2738 vbyte_count = 0;
2739 process_unw_records (list, count_output);
2740 return vbyte_count;
2741}
2742
e4e8248d
JB		 2743/* Return the number of bits set in the input value.
2744 Perhaps this has a better place... */
2745#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2746# define popcount __builtin_popcount
2747#else
2748static int
2749popcount (unsigned x)
2750{
2751 static const unsigned char popcnt[16] =
2752 {
2753 0, 1, 1, 2,
2754 1, 2, 2, 3,
2755 1, 2, 2, 3,
2756 2, 3, 3, 4
2757 };
2758
2759 if (x < NELEMS (popcnt))
2760 return popcnt[x];
2761 return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt));
2762}
2763#endif
2764
e0c9811a
JW		 2765/* Update IMASK bitmask to reflect the fact that one or more registers
2766 of type TYPE are saved starting at instruction with index T. If N
2767 bits are set in REGMASK, it is assumed that instructions T through
2768 T+N-1 save these registers.
2769
2770 TYPE values:
2771 0: no save
2772 1: instruction saves next fp reg
2773 2: instruction saves next general reg
2774 3: instruction saves next branch reg */
2775static void
2776set_imask (region, regmask, t, type)
2777 unw_rec_list *region;
2778 unsigned long regmask;
2779 unsigned long t;
2780 unsigned int type;
2781{
2782 unsigned char *imask;
2783 unsigned long imask_size;
2784 unsigned int i;
2785 int pos;
2786
2787 imask = region->r.record.r.mask.i;
2788 imask_size = region->r.record.r.imask_size;
2789 if (!imask)
2790 {
542d6675 2791 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2792 imask = xmalloc (imask_size);
2793 memset (imask, 0, imask_size);
2794
2795 region->r.record.r.imask_size = imask_size;
2796 region->r.record.r.mask.i = imask;
2797 }
2798
542d6675
KH		 2799 i = (t / 4) + 1;
2800 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2801 while (regmask)
2802 {
2803 if (i >= imask_size)
2804 {
2805 as_bad ("Ignoring attempt to spill beyond end of region");
2806 return;
2807 }
2808
2809 imask[i] |= (type & 0x3) << pos;
197865e8 2810
e0c9811a
JW		 2811 regmask &= (regmask - 1);
2812 pos -= 2;
2813 if (pos < 0)
2814 {
2815 pos = 0;
2816 ++i;
2817 }
2818 }
2819}
2820
f5a30c2e
JW		 2821/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2822 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2823 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2824 for frag sizes. */
f5a30c2e 2825
e0c9811a 2826unsigned long
b5e0fabd 2827slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2828 unsigned long slot_addr;
2829 fragS *slot_frag;
2830 unsigned long first_addr;
2831 fragS *first_frag;
b5e0fabd 2832 int before_relax;
e0c9811a 2833{
f5a30c2e
JW		 2834 unsigned long index = 0;
2835
2836 /* First time we are called, the initial address and frag are invalid. */
2837 if (first_addr == 0)
2838 return 0;
2839
2840 /* If the two addresses are in different frags, then we need to add in
2841 the remaining size of this frag, and then the entire size of intermediate
2842 frags. */
4dddc1d1 2843 while (slot_frag != first_frag)
f5a30c2e
JW		 2844 {
2845 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2846
b5e0fabd 2847 if (! before_relax)
73f20958 2848 {
b5e0fabd
JW		 2849 /* We can get the final addresses only during and after
2850 relaxation. */
73f20958
L		 2851 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2852 index += 3 * ((first_frag->fr_next->fr_address
2853 - first_frag->fr_address
2854 - first_frag->fr_fix) >> 4);
2855 }
2856 else
2857 /* We don't know what the final addresses will be. We try our
2858 best to estimate. */
2859 switch (first_frag->fr_type)
2860 {
2861 default:
2862 break;
2863
2864 case rs_space:
2865 as_fatal ("only constant space allocation is supported");
2866 break;
2867
2868 case rs_align:
2869 case rs_align_code:
2870 case rs_align_test:
2871 /* Take alignment into account. Assume the worst case
2872 before relaxation. */
2873 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2874 break;
2875
2876 case rs_org:
2877 if (first_frag->fr_symbol)
2878 {
2879 as_fatal ("only constant offsets are supported");
2880 break;
2881 }
2882 case rs_fill:
2883 index += 3 * (first_frag->fr_offset >> 4);
2884 break;
2885 }
2886
f5a30c2e
JW		 2887 /* Add in the full size of the frag converted to instruction slots. */
2888 index += 3 * (first_frag->fr_fix >> 4);
2889 /* Subtract away the initial part before first_addr. */
2890 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2891 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2892
f5a30c2e
JW		 2893 /* Move to the beginning of the next frag. */
2894 first_frag = first_frag->fr_next;
2895 first_addr = (unsigned long) &first_frag->fr_literal;
4dddc1d1
JW		 2896
2897 /* This can happen if there is section switching in the middle of a
2898 function, causing the frag chain for the function to be broken. */
2899 if (first_frag == NULL)
2900 {
2901 /* We get six warnings for one problem, because of the loop in
2902 fixup_unw_records, and because fixup_unw_records is called 3
2903 times: once before creating the variant frag, once to estimate
2904 its size, and once to relax it. This is unreasonable, so we use
2905 a static var to make sure we only emit the warning once. */
2906 static int warned = 0;
2907
2908 if (!warned)
2909 {
2910 as_warn ("Corrupted unwind info due to unsupported section switching");
2911 warned = 1;
2912 }
2913
2914 return index;
2915 }
f5a30c2e
JW		 2916 }
2917
2918 /* Add in the used part of the last frag. */
2919 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2920 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2921 return index;
2922}
4a1805b1 2923
91a2ae2a
RH		 2924/* Optimize unwind record directives. */
2925
2926static unw_rec_list *
2927optimize_unw_records (list)
2928 unw_rec_list *list;
2929{
2930 if (!list)
2931 return NULL;
2932
2933 /* If the only unwind record is ".prologue" or ".prologue" followed
2934 by ".body", then we can optimize the unwind directives away. */
2935 if (list->r.type == prologue
5738bc24
JW		 2936 && (list->next->r.type == endp
2937 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2938 return NULL;
2939
2940 return list;
2941}
2942
800eeca4
JW		 2943/* Given a complete record list, process any records which have
2944 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2945 this has been run, all necessary information should be available
800eeca4 2946 within each record to generate an image. */
542d6675 2947
800eeca4 2948static void
b5e0fabd 2949fixup_unw_records (list, before_relax)
800eeca4 2950 unw_rec_list *list;
b5e0fabd 2951 int before_relax;
800eeca4 2952{
e0c9811a
JW		 2953 unw_rec_list *ptr, *region = 0;
2954 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2955 fragS *first_frag = 0;
e0c9811a 2956
800eeca4
JW		 2957 for (ptr = list; ptr; ptr = ptr->next)
2958 {
2959 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2960 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2961 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2962 first_addr, first_frag, before_relax);
800eeca4
JW		 2963 switch (ptr->r.type)
2964 {
542d6675
KH		 2965 case prologue:
2966 case prologue_gr:
2967 case body:
2968 {
2969 unw_rec_list *last;
5738bc24
JW		 2970 int size;
2971 unsigned long last_addr = 0;
2972 fragS *last_frag = NULL;
542d6675
KH		 2973
2974 first_addr = ptr->slot_number;
f5a30c2e 2975 first_frag = ptr->slot_frag;
542d6675 2976 /* Find either the next body/prologue start, or the end of
5738bc24 2977 the function, and determine the size of the region. */
542d6675
KH		 2978 for (last = ptr->next; last != NULL; last = last->next)
2979 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2980 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2981 {
2982 last_addr = last->slot_number;
f5a30c2e 2983 last_frag = last->slot_frag;
542d6675
KH		 2984 break;
2985 }
b5e0fabd
JW		 2986 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2987 before_relax);
542d6675 2988 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2989 if (ptr->r.type == body)
2990 /* End of region. */
2991 region = 0;
2992 else
2993 region = ptr;
e0c9811a 2994 break;
542d6675
KH		 2995 }
2996 case epilogue:
ed7af9f9
L		 2997 if (t < rlen)
2998 ptr->r.record.b.t = rlen - 1 - t;
2999 else
3000 /* This happens when a memory-stack-less procedure uses a
3001 ".restore sp" directive at the end of a region to pop
3002 the frame state. */
3003 ptr->r.record.b.t = 0;
542d6675 3004 break;
e0c9811a 3005
542d6675
KH		 3006 case mem_stack_f:
3007 case mem_stack_v:
3008 case rp_when:
3009 case pfs_when:
3010 case preds_when:
3011 case unat_when:
3012 case lc_when:
3013 case fpsr_when:
3014 case priunat_when_gr:
3015 case priunat_when_mem:
3016 case bsp_when:
3017 case bspstore_when:
3018 case rnat_when:
3019 ptr->r.record.p.t = t;
3020 break;
e0c9811a 3021
542d6675
KH		 3022 case spill_reg:
3023 case spill_sprel:
3024 case spill_psprel:
3025 case spill_reg_p:
3026 case spill_sprel_p:
3027 case spill_psprel_p:
3028 ptr->r.record.x.t = t;
3029 break;
e0c9811a 3030
542d6675
KH		 3031 case frgr_mem:
3032 if (!region)
3033 {
75e09913 3034 as_bad ("frgr_mem record before region record!");
542d6675
KH		 3035 return;
3036 }
3037 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3038 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3039 set_imask (region, ptr->r.record.p.frmask, t, 1);
3040 set_imask (region, ptr->r.record.p.grmask, t, 2);
3041 break;
3042 case fr_mem:
3043 if (!region)
3044 {
75e09913 3045 as_bad ("fr_mem record before region record!");
542d6675
KH		 3046 return;
3047 }
ba825241
JB		 3048 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3049 set_imask (region, ptr->r.record.p.frmask, t, 1);
542d6675
KH		 3050 break;
3051 case gr_mem:
3052 if (!region)
3053 {
75e09913 3054 as_bad ("gr_mem record before region record!");
542d6675
KH		 3055 return;
3056 }
ba825241
JB		 3057 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3058 set_imask (region, ptr->r.record.p.grmask, t, 2);
542d6675
KH		 3059 break;
3060 case br_mem:
3061 if (!region)
3062 {
75e09913 3063 as_bad ("br_mem record before region record!");
542d6675
KH		 3064 return;
3065 }
3066 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
3067 set_imask (region, ptr->r.record.p.brmask, t, 3);
3068 break;
e0c9811a 3069
542d6675
KH		 3070 case gr_gr:
3071 if (!region)
3072 {
75e09913 3073 as_bad ("gr_gr record before region record!");
542d6675
KH		 3074 return;
3075 }
3076 set_imask (region, ptr->r.record.p.grmask, t, 2);
3077 break;
3078 case br_gr:
3079 if (!region)
3080 {
75e09913 3081 as_bad ("br_gr record before region record!");
542d6675
KH		 3082 return;
3083 }
3084 set_imask (region, ptr->r.record.p.brmask, t, 3);
3085 break;
e0c9811a 3086
542d6675
KH		 3087 default:
3088 break;
800eeca4
JW		 3089 }
3090 }
3091}
3092
b5e0fabd
JW		 3093/* Estimate the size of a frag before relaxing. We only have one type of frag
3094 to handle here, which is the unwind info frag. */
3095
3096int
3097ia64_estimate_size_before_relax (fragS *frag,
3098 asection *segtype ATTRIBUTE_UNUSED)
3099{
3100 unw_rec_list *list;
3101 int len, size, pad;
3102
3103 /* ??? This code is identical to the first part of ia64_convert_frag. */
3104 list = (unw_rec_list *) frag->fr_opcode;
3105 fixup_unw_records (list, 0);
3106
3107 len = calc_record_size (list);
3108 /* pad to pointer-size boundary. */
3109 pad = len % md.pointer_size;
3110 if (pad != 0)
3111 len += md.pointer_size - pad;
f7e323d5
JB		 3112 /* Add 8 for the header. */
3113 size = len + 8;
3114 /* Add a pointer for the personality offset. */
3115 if (frag->fr_offset)
3116 size += md.pointer_size;
b5e0fabd
JW		 3117
3118 /* fr_var carries the max_chars that we created the fragment with.
3119 We must, of course, have allocated enough memory earlier. */
3120 assert (frag->fr_var >= size);
3121
3122 return frag->fr_fix + size;
3123}
3124
73f20958
L		 3125/* This function converts a rs_machine_dependent variant frag into a
3126 normal fill frag with the unwind image from the the record list. */
3127void
3128ia64_convert_frag (fragS *frag)
557debba 3129{
73f20958
L		 3130 unw_rec_list *list;
3131 int len, size, pad;
1cd8ff38 3132 valueT flag_value;
557debba 3133
b5e0fabd 3134 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 3135 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 3136 fixup_unw_records (list, 0);
1cd8ff38 3137
73f20958
L		 3138 len = calc_record_size (list);
3139 /* pad to pointer-size boundary. */
3140 pad = len % md.pointer_size;
3141 if (pad != 0)
3142 len += md.pointer_size - pad;
f7e323d5
JB		 3143 /* Add 8 for the header. */
3144 size = len + 8;
3145 /* Add a pointer for the personality offset. */
3146 if (frag->fr_offset)
3147 size += md.pointer_size;
73f20958
L		 3148
3149 /* fr_var carries the max_chars that we created the fragment with.
3150 We must, of course, have allocated enough memory earlier. */
3151 assert (frag->fr_var >= size);
3152
3153 /* Initialize the header area. fr_offset is initialized with
3154 unwind.personality_routine. */
3155 if (frag->fr_offset)
1cd8ff38
NC		 3156 {
3157 if (md.flags & EF_IA_64_ABI64)
3158 flag_value = (bfd_vma) 3 << 32;
3159 else
3160 /* 32-bit unwind info block. */
3161 flag_value = (bfd_vma) 0x1003 << 32;
3162 }
3163 else
3164 flag_value = 0;
557debba 3165
73f20958
L		 3166 md_number_to_chars (frag->fr_literal,
3167 (((bfd_vma) 1 << 48) /* Version. */
3168 | flag_value /* U & E handler flags. */
3169 | (len / md.pointer_size)), /* Length. */
3170 8);
557debba 3171
73f20958
L		 3172 /* Skip the header. */
3173 vbyte_mem_ptr = frag->fr_literal + 8;
3174 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 3175
3176 /* Fill the padding bytes with zeros. */
3177 if (pad != 0)
3178 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
3179 md.pointer_size - pad);
3180
73f20958
L		 3181 frag->fr_fix += size;
3182 frag->fr_type = rs_fill;
3183 frag->fr_var = 0;
3184 frag->fr_offset = 0;
800eeca4
JW		 3185}
3186
e0c9811a 3187static int
e4e8248d
JB		 3188parse_predicate_and_operand (e, qp, po)
3189 expressionS * e;
3190 unsigned * qp;
3191 const char * po;
3192{
3193 int sep = parse_operand (e, ',');
3194
3195 *qp = e->X_add_number - REG_P;
3196 if (e->X_op != O_register || *qp > 63)
3197 {
3198 as_bad ("First operand to .%s must be a predicate", po);
3199 *qp = 0;
3200 }
3201 else if (*qp == 0)
3202 as_warn ("Pointless use of p0 as first operand to .%s", po);
3203 if (sep == ',')
3204 sep = parse_operand (e, ',');
3205 else
3206 e->X_op = O_absent;
3207 return sep;
3208}
3209
3210static void
3211convert_expr_to_ab_reg (e, ab, regp, po, n)
3212 const expressionS *e;
e0c9811a
JW		 3213 unsigned int *ab;
3214 unsigned int *regp;
e4e8248d
JB		 3215 const char * po;
3216 int n;
e0c9811a 3217{
e4e8248d
JB		 3218 unsigned int reg = e->X_add_number;
3219
3220 *ab = *regp = 0; /* Anything valid is good here. */
e0c9811a
JW		 3221
3222 if (e->X_op != O_register)
e4e8248d 3223 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3224
2434f565 3225 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 3226 {
3227 *ab = 0;
3228 *regp = reg - REG_GR;
3229 }
2434f565
JW		 3230 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3231 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 3232 {
3233 *ab = 1;
3234 *regp = reg - REG_FR;
3235 }
2434f565 3236 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 3237 {
3238 *ab = 2;
3239 *regp = reg - REG_BR;
3240 }
3241 else
3242 {
3243 *ab = 3;
3244 switch (reg)
3245 {
3246 case REG_PR: *regp = 0; break;
3247 case REG_PSP: *regp = 1; break;
3248 case REG_PRIUNAT: *regp = 2; break;
3249 case REG_BR + 0: *regp = 3; break;
3250 case REG_AR + AR_BSP: *regp = 4; break;
3251 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3252 case REG_AR + AR_RNAT: *regp = 6; break;
3253 case REG_AR + AR_UNAT: *regp = 7; break;
3254 case REG_AR + AR_FPSR: *regp = 8; break;
3255 case REG_AR + AR_PFS: *regp = 9; break;
3256 case REG_AR + AR_LC: *regp = 10; break;
3257
3258 default:
e4e8248d
JB		 3259 as_bad ("Operand %d to .%s must be a preserved register", n, po);
3260 break;
e0c9811a
JW		 3261 }
3262 }
197865e8 3263}
e0c9811a 3264
e4e8248d
JB		 3265static void
3266convert_expr_to_xy_reg (e, xy, regp, po, n)
3267 const expressionS *e;
e0c9811a
JW		 3268 unsigned int *xy;
3269 unsigned int *regp;
e4e8248d
JB		 3270 const char * po;
3271 int n;
e0c9811a 3272{
e4e8248d 3273 unsigned int reg = e->X_add_number;
e0c9811a 3274
e4e8248d 3275 *xy = *regp = 0; /* Anything valid is good here. */
e0c9811a 3276
e4e8248d
JB		 3277 if (e->X_op != O_register)
3278 reg = REG_GR; /* Anything invalid is good here. */
e0c9811a 3279
e4e8248d 3280 if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127))
e0c9811a
JW		 3281 {
3282 *xy = 0;
3283 *regp = reg - REG_GR;
3284 }
e4e8248d 3285 else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127))
e0c9811a
JW		 3286 {
3287 *xy = 1;
3288 *regp = reg - REG_FR;
3289 }
2434f565 3290 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3291 {
3292 *xy = 2;
3293 *regp = reg - REG_BR;
3294 }
3295 else
e4e8248d 3296 as_bad ("Operand %d to .%s must be a writable register", n, po);
197865e8 3297}
e0c9811a 3298
d9201763
L		 3299static void
3300dot_align (int arg)
3301{
3302 /* The current frag is an alignment frag. */
3303 align_frag = frag_now;
3304 s_align_bytes (arg);
3305}
3306
800eeca4
JW		 3307static void
3308dot_radix (dummy)
2434f565 3309 int dummy ATTRIBUTE_UNUSED;
800eeca4 3310{
fa30c84f
JB		 3311 char *radix;
3312 int ch;
800eeca4
JW		 3313
3314 SKIP_WHITESPACE ();
800eeca4 3315
fa30c84f
JB		 3316 if (is_it_end_of_statement ())
3317 return;
3318 radix = input_line_pointer;
3319 ch = get_symbol_end ();
3320 ia64_canonicalize_symbol_name (radix);
3321 if (strcasecmp (radix, "C"))
3322 as_bad ("Radix `%s' unsupported or invalid", radix);
3323 *input_line_pointer = ch;
3324 demand_empty_rest_of_line ();
800eeca4
JW		 3325}
3326
196e8040
JW		 3327/* Helper function for .loc directives. If the assembler is not generating
3328 line number info, then we need to remember which instructions have a .loc
3329 directive, and only call dwarf2_gen_line_info for those instructions. */
3330
3331static void
3332dot_loc (int x)
3333{
3334 CURR_SLOT.loc_directive_seen = 1;
3335 dwarf2_directive_loc (x);
3336}
3337
800eeca4
JW		 3338/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3339static void
3340dot_special_section (which)
3341 int which;
3342{
3343 set_section ((char *) special_section_name[which]);
3344}
3345
07450571
L		 3346/* Return -1 for warning and 0 for error. */
3347
3348static int
970d6792
L		 3349unwind_diagnostic (const char * region, const char *directive)
3350{
3351 if (md.unwind_check == unwind_check_warning)
07450571
L		 3352 {
3353 as_warn (".%s outside of %s", directive, region);
3354 return -1;
3355 }
970d6792
L		 3356 else
3357 {
3358 as_bad (".%s outside of %s", directive, region);
3359 ignore_rest_of_line ();
07450571 3360 return 0;
970d6792
L		 3361 }
3362}
3363
07450571
L		 3364/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3365 a procedure but the unwind directive check is set to warning, 0 if
3366 a directive isn't in a procedure and the unwind directive check is set
3367 to error. */
3368
75e09913
JB		 3369static int
3370in_procedure (const char *directive)
3371{
5656b6b8 3372 if (unwind.proc_pending.sym
75e09913
JB		 3373 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3374 return 1;
07450571 3375 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3376}
3377
07450571
L		 3378/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3379 a prologue but the unwind directive check is set to warning, 0 if
3380 a directive isn't in a prologue and the unwind directive check is set
3381 to error. */
3382
75e09913
JB		 3383static int
3384in_prologue (const char *directive)
3385{
07450571 3386 int in = in_procedure (directive);
ba825241
JB		 3387
3388 if (in > 0 && !unwind.prologue)
3389 in = unwind_diagnostic ("prologue", directive);
3390 check_pending_save ();
3391 return in;
75e09913
JB		 3392}
3393
07450571
L		 3394/* Return 1 if a directive is in a body, -1 if a directive isn't in
3395 a body but the unwind directive check is set to warning, 0 if
3396 a directive isn't in a body and the unwind directive check is set
3397 to error. */
3398
75e09913
JB		 3399static int
3400in_body (const char *directive)
3401{
07450571 3402 int in = in_procedure (directive);
ba825241
JB		 3403
3404 if (in > 0 && !unwind.body)
3405 in = unwind_diagnostic ("body region", directive);
3406 return in;
75e09913
JB		 3407}
3408
800eeca4 3409static void
e4e8248d 3410add_unwind_entry (ptr, sep)
800eeca4 3411 unw_rec_list *ptr;
e4e8248d 3412 int sep;
800eeca4 3413{
e4e8248d
JB		 3414 if (ptr)
3415 {
3416 if (unwind.tail)
3417 unwind.tail->next = ptr;
3418 else
3419 unwind.list = ptr;
3420 unwind.tail = ptr;
3421
3422 /* The current entry can in fact be a chain of unwind entries. */
3423 if (unwind.current_entry == NULL)
3424 unwind.current_entry = ptr;
3425 }
800eeca4
JW		 3426
3427 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3428 if (unwind.current_entry == NULL)
3429 unwind.current_entry = ptr;
e4e8248d
JB		 3430
3431 if (sep == ',')
3432 {
3433 /* Parse a tag permitted for the current directive. */
3434 int ch;
3435
3436 SKIP_WHITESPACE ();
3437 ch = get_symbol_end ();
3438 /* FIXME: For now, just issue a warning that this isn't implemented. */
3439 {
3440 static int warned;
3441
3442 if (!warned)
3443 {
3444 warned = 1;
3445 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3446 }
3447 }
3448 *input_line_pointer = ch;
3449 }
3450 if (sep != NOT_A_CHAR)
3451 demand_empty_rest_of_line ();
800eeca4
JW		 3452}
3453
197865e8 3454static void
800eeca4 3455dot_fframe (dummy)
2434f565 3456 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3457{
3458 expressionS e;
e4e8248d 3459 int sep;
e0c9811a 3460
75e09913
JB		 3461 if (!in_prologue ("fframe"))
3462 return;
3463
e4e8248d 3464 sep = parse_operand (&e, ',');
197865e8 3465
800eeca4 3466 if (e.X_op != O_constant)
e4e8248d
JB		 3467 {
3468 as_bad ("First operand to .fframe must be a constant");
3469 e.X_add_number = 0;
3470 }
3471 add_unwind_entry (output_mem_stack_f (e.X_add_number), sep);
e0c9811a
JW		 3472}
3473
197865e8 3474static void
e0c9811a 3475dot_vframe (dummy)
2434f565 3476 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3477{
3478 expressionS e;
3479 unsigned reg;
e4e8248d 3480 int sep;
e0c9811a 3481
75e09913
JB		 3482 if (!in_prologue ("vframe"))
3483 return;
3484
e4e8248d 3485 sep = parse_operand (&e, ',');
e0c9811a 3486 reg = e.X_add_number - REG_GR;
e4e8248d 3487 if (e.X_op != O_register || reg > 127)
800eeca4 3488 {
e4e8248d
JB		 3489 as_bad ("First operand to .vframe must be a general register");
3490 reg = 0;
800eeca4 3491 }
e4e8248d
JB		 3492 add_unwind_entry (output_mem_stack_v (), sep);
3493 if (! (unwind.prologue_mask & 2))
3494 add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR);
3495 else if (reg != unwind.prologue_gr
3496 + (unsigned) popcount (unwind.prologue_mask & (-2 << 1)))
3497 as_warn ("Operand of .vframe contradicts .prologue");
800eeca4
JW		 3498}
3499
197865e8 3500static void
e4e8248d
JB		 3501dot_vframesp (psp)
3502 int psp;
800eeca4 3503{
e0c9811a 3504 expressionS e;
e4e8248d 3505 int sep;
e0c9811a 3506
e4e8248d
JB		 3507 if (psp)
3508 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
e0c9811a 3509
e4e8248d 3510 if (!in_prologue ("vframesp"))
75e09913
JB		 3511 return;
3512
e4e8248d
JB		 3513 sep = parse_operand (&e, ',');
3514 if (e.X_op != O_constant)
e0c9811a 3515 {
e4e8248d
JB		 3516 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3517 e.X_add_number = 0;
e0c9811a 3518 }
e4e8248d
JB		 3519 add_unwind_entry (output_mem_stack_v (), sep);
3520 add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR);
800eeca4
JW		 3521}
3522
197865e8 3523static void
800eeca4 3524dot_save (dummy)
2434f565 3525 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3526{
3527 expressionS e1, e2;
e4e8248d 3528 unsigned reg1, reg2;
800eeca4 3529 int sep;
800eeca4 3530
75e09913
JB		 3531 if (!in_prologue ("save"))
3532 return;
3533
e4e8248d
JB		 3534 sep = parse_operand (&e1, ',');
3535 if (sep == ',')
3536 sep = parse_operand (&e2, ',');
3537 else
3538 e2.X_op = O_absent;
800eeca4 3539
e0c9811a 3540 reg1 = e1.X_add_number;
800eeca4 3541 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3542 if (e1.X_op != O_register)
800eeca4 3543 {
e4e8248d
JB		 3544 as_bad ("First operand to .save not a register");
3545 reg1 = REG_PR; /* Anything valid is good here. */
3546 }
3547 reg2 = e2.X_add_number - REG_GR;
3548 if (e2.X_op != O_register || reg2 > 127)
3549 {
3550 as_bad ("Second operand to .save not a valid register");
3551 reg2 = 0;
3552 }
3553 switch (reg1)
3554 {
3555 case REG_AR + AR_BSP:
3556 add_unwind_entry (output_bsp_when (), sep);
3557 add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR);
3558 break;
3559 case REG_AR + AR_BSPSTORE:
3560 add_unwind_entry (output_bspstore_when (), sep);
3561 add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR);
3562 break;
3563 case REG_AR + AR_RNAT:
3564 add_unwind_entry (output_rnat_when (), sep);
3565 add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR);
3566 break;
3567 case REG_AR + AR_UNAT:
3568 add_unwind_entry (output_unat_when (), sep);
3569 add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR);
3570 break;
3571 case REG_AR + AR_FPSR:
3572 add_unwind_entry (output_fpsr_when (), sep);
3573 add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR);
3574 break;
3575 case REG_AR + AR_PFS:
3576 add_unwind_entry (output_pfs_when (), sep);
3577 if (! (unwind.prologue_mask & 4))
3578 add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR);
3579 else if (reg2 != unwind.prologue_gr
3580 + (unsigned) popcount (unwind.prologue_mask & (-4 << 1)))
3581 as_warn ("Second operand of .save contradicts .prologue");
3582 break;
3583 case REG_AR + AR_LC:
3584 add_unwind_entry (output_lc_when (), sep);
3585 add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR);
3586 break;
3587 case REG_BR:
3588 add_unwind_entry (output_rp_when (), sep);
3589 if (! (unwind.prologue_mask & 8))
3590 add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR);
3591 else if (reg2 != unwind.prologue_gr)
3592 as_warn ("Second operand of .save contradicts .prologue");
3593 break;
3594 case REG_PR:
3595 add_unwind_entry (output_preds_when (), sep);
3596 if (! (unwind.prologue_mask & 1))
3597 add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR);
3598 else if (reg2 != unwind.prologue_gr
3599 + (unsigned) popcount (unwind.prologue_mask & (-1 << 1)))
3600 as_warn ("Second operand of .save contradicts .prologue");
3601 break;
3602 case REG_PRIUNAT:
3603 add_unwind_entry (output_priunat_when_gr (), sep);
3604 add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR);
3605 break;
3606 default:
3607 as_bad ("First operand to .save not a valid register");
3608 add_unwind_entry (NULL, sep);
3609 break;
800eeca4 3610 }
800eeca4
JW		 3611}
3612
197865e8 3613static void
800eeca4 3614dot_restore (dummy)
2434f565 3615 int dummy ATTRIBUTE_UNUSED;
800eeca4 3616{
e4e8248d 3617 expressionS e1;
33d01f33 3618 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3619 int sep;
3620
75e09913
JB		 3621 if (!in_body ("restore"))
3622 return;
3623
e4e8248d 3624 sep = parse_operand (&e1, ',');
e0c9811a 3625 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
e4e8248d 3626 as_bad ("First operand to .restore must be stack pointer (sp)");
e0c9811a
JW		 3627
3628 if (sep == ',')
3629 {
e4e8248d
JB		 3630 expressionS e2;
3631
3632 sep = parse_operand (&e2, ',');
33d01f33 3633 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3634 {
33d01f33 3635 as_bad ("Second operand to .restore must be a constant >= 0");
e4e8248d 3636 e2.X_add_number = 0;
e0c9811a 3637 }
33d01f33 3638 ecount = e2.X_add_number;
e0c9811a 3639 }
33d01f33
JW		 3640 else
3641 ecount = unwind.prologue_count - 1;
6290819d
NC		 3642
3643 if (ecount >= unwind.prologue_count)
3644 {
3645 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3646 ecount + 1, unwind.prologue_count);
e4e8248d 3647 ecount = 0;
6290819d
NC		 3648 }
3649
e4e8248d 3650 add_unwind_entry (output_epilogue (ecount), sep);
33d01f33
JW		 3651
3652 if (ecount < unwind.prologue_count)
3653 unwind.prologue_count -= ecount + 1;
3654 else
3655 unwind.prologue_count = 0;
e0c9811a
JW		 3656}
3657
197865e8 3658static void
e4e8248d
JB		 3659dot_restorereg (pred)
3660 int pred;
e0c9811a
JW		 3661{
3662 unsigned int qp, ab, reg;
e4e8248d 3663 expressionS e;
e0c9811a 3664 int sep;
e4e8248d 3665 const char * const po = pred ? "restorereg.p" : "restorereg";
e0c9811a 3666
e4e8248d 3667 if (!in_procedure (po))
75e09913
JB		 3668 return;
3669
e4e8248d
JB		 3670 if (pred)
3671 sep = parse_predicate_and_operand (&e, &qp, po);
3672 else
e0c9811a 3673 {
e4e8248d
JB		 3674 sep = parse_operand (&e, ',');
3675 qp = 0;
e0c9811a 3676 }
e4e8248d 3677 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 3678
e4e8248d 3679 add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
800eeca4
JW		 3680}
3681
2d6ed997
L		 3682static char *special_linkonce_name[] =
3683 {
3684 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3685 };
3686
3687static void
da9f89d4 3688start_unwind_section (const segT text_seg, int sec_index)
2d6ed997
L		 3689{
3690 /*
3691 Use a slightly ugly scheme to derive the unwind section names from
3692 the text section name:
3693
3694 text sect. unwind table sect.
3695 name: name: comments:
3696 ---------- ----------------- --------------------------------
3697 .text .IA_64.unwind
3698 .text.foo .IA_64.unwind.text.foo
3699 .foo .IA_64.unwind.foo
3700 .gnu.linkonce.t.foo
3701 .gnu.linkonce.ia64unw.foo
3702 _info .IA_64.unwind_info gas issues error message (ditto)
3703 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3704
3705 This mapping is done so that:
3706
3707 (a) An object file with unwind info only in .text will use
3708 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3709 This follows the letter of the ABI and also ensures backwards
3710 compatibility with older toolchains.
3711
3712 (b) An object file with unwind info in multiple text sections
3713 will use separate unwind sections for each text section.
3714 This allows us to properly set the "sh_info" and "sh_link"
3715 fields in SHT_IA_64_UNWIND as required by the ABI and also
3716 lets GNU ld support programs with multiple segments
3717 containing unwind info (as might be the case for certain
3718 embedded applications).
3719
3720 (c) An error is issued if there would be a name clash.
3721 */
3722
3723 const char *text_name, *sec_text_name;
3724 char *sec_name;
3725 const char *prefix = special_section_name [sec_index];
3726 const char *suffix;
3727 size_t prefix_len, suffix_len, sec_name_len;
3728
3729 sec_text_name = segment_name (text_seg);
3730 text_name = sec_text_name;
3731 if (strncmp (text_name, "_info", 5) == 0)
3732 {
3733 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3734 text_name);
3735 ignore_rest_of_line ();
3736 return;
3737 }
3738 if (strcmp (text_name, ".text") == 0)
3739 text_name = "";
3740
3741 /* Build the unwind section name by appending the (possibly stripped)
3742 text section name to the unwind prefix. */
3743 suffix = text_name;
3744 if (strncmp (text_name, ".gnu.linkonce.t.",
3745 sizeof (".gnu.linkonce.t.") - 1) == 0)
3746 {
3747 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3748 suffix += sizeof (".gnu.linkonce.t.") - 1;
3749 }
3750
3751 prefix_len = strlen (prefix);
3752 suffix_len = strlen (suffix);
3753 sec_name_len = prefix_len + suffix_len;
3754 sec_name = alloca (sec_name_len + 1);
3755 memcpy (sec_name, prefix, prefix_len);
3756 memcpy (sec_name + prefix_len, suffix, suffix_len);
3757 sec_name [sec_name_len] = '\0';
3758
3759 /* Handle COMDAT group. */
6e3f953d
L		 3760 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3761 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
2d6ed997
L		 3762 {
3763 char *section;
3764 size_t len, group_name_len;
3765 const char *group_name = elf_group_name (text_seg);
3766
3767 if (group_name == NULL)
3768 {
3769 as_bad ("Group section `%s' has no group signature",
3770 sec_text_name);
3771 ignore_rest_of_line ();
3772 return;
3773 }
3774 /* We have to construct a fake section directive. */
3775 group_name_len = strlen (group_name);
3776 len = (sec_name_len
3777 + 16 /* ,"aG",@progbits, */
3778 + group_name_len /* ,group_name */
3779 + 7); /* ,comdat */
3780
3781 section = alloca (len + 1);
3782 memcpy (section, sec_name, sec_name_len);
3783 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3784 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3785 memcpy (section + len - 7, ",comdat", 7);
3786 section [len] = '\0';
3787 set_section (section);
3788 }
3789 else
3790 {
3791 set_section (sec_name);
3792 bfd_set_section_flags (stdoutput, now_seg,
3793 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3794 }
38ce5b11
L		 3795
3796 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3797}
3798
73f20958 3799static void
2d6ed997 3800generate_unwind_image (const segT text_seg)
800eeca4 3801{
73f20958
L		 3802 int size, pad;
3803 unw_rec_list *list;
800eeca4 3804
c97b7ef6
JW		 3805 /* Mark the end of the unwind info, so that we can compute the size of the
3806 last unwind region. */
e4e8248d 3807 add_unwind_entry (output_endp (), NOT_A_CHAR);
c97b7ef6 3808
10850f29
JW		 3809 /* Force out pending instructions, to make sure all unwind records have
3810 a valid slot_number field. */
3811 ia64_flush_insns ();
3812
800eeca4 3813 /* Generate the unwind record. */
73f20958 3814 list = optimize_unw_records (unwind.list);
b5e0fabd 3815 fixup_unw_records (list, 1);
73f20958
L		 3816 size = calc_record_size (list);
3817
3818 if (size > 0 || unwind.force_unwind_entry)
3819 {
3820 unwind.force_unwind_entry = 0;
3821 /* pad to pointer-size boundary. */
3822 pad = size % md.pointer_size;
3823 if (pad != 0)
3824 size += md.pointer_size - pad;
f7e323d5
JB		 3825 /* Add 8 for the header. */
3826 size += 8;
3827 /* Add a pointer for the personality offset. */
3828 if (unwind.personality_routine)
3829 size += md.pointer_size;
73f20958 3830 }
6290819d 3831
800eeca4
JW		 3832 /* If there are unwind records, switch sections, and output the info. */
3833 if (size != 0)
3834 {
800eeca4 3835 expressionS exp;
1cd8ff38 3836 bfd_reloc_code_real_type reloc;
91a2ae2a 3837
da9f89d4 3838 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3839
557debba
JW		 3840 /* Make sure the section has 4 byte alignment for ILP32 and
3841 8 byte alignment for LP64. */
3842 frag_align (md.pointer_size_shift, 0, 0);
3843 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3844
800eeca4 3845 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3846 unwind.info = expr_build_dot ();
73f20958
L		 3847
3848 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3849 (offsetT) (long) unwind.personality_routine,
3850 (char *) list);
91a2ae2a 3851
800eeca4 3852 /* Add the personality address to the image. */
e0c9811a 3853 if (unwind.personality_routine != 0)
542d6675 3854 {
40449e9f 3855 exp.X_op = O_symbol;
e0c9811a 3856 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3857 exp.X_add_number = 0;
1cd8ff38
NC		 3858
3859 if (md.flags & EF_IA_64_BE)
3860 {
3861 if (md.flags & EF_IA_64_ABI64)
3862 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3863 else
3864 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3865 }
40449e9f 3866 else
1cd8ff38
NC		 3867 {
3868 if (md.flags & EF_IA_64_ABI64)
3869 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3870 else
3871 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3872 }
3873
3874 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3875 md.pointer_size, &exp, 0, reloc);
e0c9811a 3876 unwind.personality_routine = 0;
542d6675 3877 }
800eeca4
JW		 3878 }
3879
6290819d 3880 free_saved_prologue_counts ();
e0c9811a 3881 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3882}
3883
197865e8 3884static void
542d6675 3885dot_handlerdata (dummy)
2434f565 3886 int dummy ATTRIBUTE_UNUSED;
800eeca4 3887{
75e09913
JB		 3888 if (!in_procedure ("handlerdata"))
3889 return;
91a2ae2a
RH		 3890 unwind.force_unwind_entry = 1;
3891
3892 /* Remember which segment we're in so we can switch back after .endp */
3893 unwind.saved_text_seg = now_seg;
3894 unwind.saved_text_subseg = now_subseg;
3895
3896 /* Generate unwind info into unwind-info section and then leave that
3897 section as the currently active one so dataXX directives go into
3898 the language specific data area of the unwind info block. */
2d6ed997 3899 generate_unwind_image (now_seg);
e0c9811a 3900 demand_empty_rest_of_line ();
800eeca4
JW		 3901}
3902
197865e8 3903static void
800eeca4 3904dot_unwentry (dummy)
2434f565 3905 int dummy ATTRIBUTE_UNUSED;
800eeca4 3906{
75e09913
JB		 3907 if (!in_procedure ("unwentry"))
3908 return;
91a2ae2a 3909 unwind.force_unwind_entry = 1;
e0c9811a 3910 demand_empty_rest_of_line ();
800eeca4
JW		 3911}
3912
197865e8 3913static void
800eeca4 3914dot_altrp (dummy)
2434f565 3915 int dummy ATTRIBUTE_UNUSED;
800eeca4 3916{
e0c9811a
JW		 3917 expressionS e;
3918 unsigned reg;
3919
75e09913
JB		 3920 if (!in_prologue ("altrp"))
3921 return;
3922
e4e8248d 3923 parse_operand (&e, 0);
e0c9811a 3924 reg = e.X_add_number - REG_BR;
e4e8248d
JB		 3925 if (e.X_op != O_register || reg > 7)
3926 {
3927 as_bad ("First operand to .altrp not a valid branch register");
3928 reg = 0;
3929 }
3930 add_unwind_entry (output_rp_br (reg), 0);
800eeca4
JW		 3931}
3932
197865e8 3933static void
e0c9811a
JW		 3934dot_savemem (psprel)
3935 int psprel;
800eeca4
JW		 3936{
3937 expressionS e1, e2;
3938 int sep;
3939 int reg1, val;
e4e8248d 3940 const char * const po = psprel ? "savepsp" : "savesp";
800eeca4 3941
e4e8248d 3942 if (!in_prologue (po))
75e09913
JB		 3943 return;
3944
e4e8248d
JB		 3945 sep = parse_operand (&e1, ',');
3946 if (sep == ',')
3947 sep = parse_operand (&e2, ',');
3948 else
3949 e2.X_op = O_absent;
800eeca4 3950
e0c9811a 3951 reg1 = e1.X_add_number;
800eeca4 3952 val = e2.X_add_number;
197865e8 3953
800eeca4 3954 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e4e8248d 3955 if (e1.X_op != O_register)
800eeca4 3956 {
e4e8248d
JB		 3957 as_bad ("First operand to .%s not a register", po);
3958 reg1 = REG_PR; /* Anything valid is good here. */
3959 }
3960 if (e2.X_op != O_constant)
3961 {
3962 as_bad ("Second operand to .%s not a constant", po);
3963 val = 0;
3964 }
3965
3966 switch (reg1)
3967 {
3968 case REG_AR + AR_BSP:
3969 add_unwind_entry (output_bsp_when (), sep);
3970 add_unwind_entry ((psprel
3971 ? output_bsp_psprel
3972 : output_bsp_sprel) (val), NOT_A_CHAR);
3973 break;
3974 case REG_AR + AR_BSPSTORE:
3975 add_unwind_entry (output_bspstore_when (), sep);
3976 add_unwind_entry ((psprel
3977 ? output_bspstore_psprel
3978 : output_bspstore_sprel) (val), NOT_A_CHAR);
3979 break;
3980 case REG_AR + AR_RNAT:
3981 add_unwind_entry (output_rnat_when (), sep);
3982 add_unwind_entry ((psprel
3983 ? output_rnat_psprel
3984 : output_rnat_sprel) (val), NOT_A_CHAR);
3985 break;
3986 case REG_AR + AR_UNAT:
3987 add_unwind_entry (output_unat_when (), sep);
3988 add_unwind_entry ((psprel
3989 ? output_unat_psprel
3990 : output_unat_sprel) (val), NOT_A_CHAR);
3991 break;
3992 case REG_AR + AR_FPSR:
3993 add_unwind_entry (output_fpsr_when (), sep);
3994 add_unwind_entry ((psprel
3995 ? output_fpsr_psprel
3996 : output_fpsr_sprel) (val), NOT_A_CHAR);
3997 break;
3998 case REG_AR + AR_PFS:
3999 add_unwind_entry (output_pfs_when (), sep);
4000 add_unwind_entry ((psprel
4001 ? output_pfs_psprel
4002 : output_pfs_sprel) (val), NOT_A_CHAR);
4003 break;
4004 case REG_AR + AR_LC:
4005 add_unwind_entry (output_lc_when (), sep);
4006 add_unwind_entry ((psprel
4007 ? output_lc_psprel
4008 : output_lc_sprel) (val), NOT_A_CHAR);
4009 break;
4010 case REG_BR:
4011 add_unwind_entry (output_rp_when (), sep);
4012 add_unwind_entry ((psprel
4013 ? output_rp_psprel
4014 : output_rp_sprel) (val), NOT_A_CHAR);
4015 break;
4016 case REG_PR:
4017 add_unwind_entry (output_preds_when (), sep);
4018 add_unwind_entry ((psprel
4019 ? output_preds_psprel
4020 : output_preds_sprel) (val), NOT_A_CHAR);
4021 break;
4022 case REG_PRIUNAT:
4023 add_unwind_entry (output_priunat_when_mem (), sep);
4024 add_unwind_entry ((psprel
4025 ? output_priunat_psprel
4026 : output_priunat_sprel) (val), NOT_A_CHAR);
4027 break;
4028 default:
4029 as_bad ("First operand to .%s not a valid register", po);
4030 add_unwind_entry (NULL, sep);
4031 break;
800eeca4 4032 }
800eeca4
JW		 4033}
4034
197865e8 4035static void
800eeca4 4036dot_saveg (dummy)
2434f565 4037 int dummy ATTRIBUTE_UNUSED;
800eeca4 4038{
e4e8248d
JB		 4039 expressionS e;
4040 unsigned grmask;
800eeca4 4041 int sep;
75e09913
JB		 4042
4043 if (!in_prologue ("save.g"))
4044 return;
4045
e4e8248d 4046 sep = parse_operand (&e, ',');
197865e8 4047
e4e8248d
JB		 4048 grmask = e.X_add_number;
4049 if (e.X_op != O_constant
4050 || e.X_add_number <= 0
4051 || e.X_add_number > 0xf)
800eeca4 4052 {
e4e8248d
JB		 4053 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4054 grmask = 0;
4055 }
4056
4057 if (sep == ',')
4058 {
4059 unsigned reg;
4060 int n = popcount (grmask);
4061
4062 parse_operand (&e, 0);
4063 reg = e.X_add_number - REG_GR;
4064 if (e.X_op != O_register || reg > 127)
542d6675 4065 {
e4e8248d
JB		 4066 as_bad ("Second operand to .save.g must be a general register");
4067 reg = 0;
4068 }
4069 else if (reg > 128U - n)
4070 {
4071 as_bad ("Second operand to .save.g must be the first of %d general registers", n);
4072 reg = 0;
800eeca4 4073 }
e4e8248d 4074 add_unwind_entry (output_gr_gr (grmask, reg), 0);
800eeca4 4075 }
e4e8248d
JB		 4076 else
4077 add_unwind_entry (output_gr_mem (grmask), 0);
800eeca4
JW		 4078}
4079
197865e8 4080static void
800eeca4 4081dot_savef (dummy)
2434f565 4082 int dummy ATTRIBUTE_UNUSED;
800eeca4 4083{
e4e8248d 4084 expressionS e;
75e09913
JB		 4085
4086 if (!in_prologue ("save.f"))
4087 return;
4088
e4e8248d 4089 parse_operand (&e, 0);
197865e8 4090
e4e8248d
JB		 4091 if (e.X_op != O_constant
4092 || e.X_add_number <= 0
4093 || e.X_add_number > 0xfffff)
4094 {
4095 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4096 e.X_add_number = 0;
4097 }
4098 add_unwind_entry (output_fr_mem (e.X_add_number), 0);
800eeca4
JW		 4099}
4100
197865e8 4101static void
800eeca4 4102dot_saveb (dummy)
2434f565 4103 int dummy ATTRIBUTE_UNUSED;
800eeca4 4104{
e4e8248d
JB		 4105 expressionS e;
4106 unsigned brmask;
4107 int sep;
e0c9811a 4108
75e09913
JB		 4109 if (!in_prologue ("save.b"))
4110 return;
4111
e4e8248d
JB		 4112 sep = parse_operand (&e, ',');
4113
4114 brmask = e.X_add_number;
4115 if (e.X_op != O_constant
4116 || e.X_add_number <= 0
4117 || e.X_add_number > 0x1f)
800eeca4 4118 {
e4e8248d
JB		 4119 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4120 brmask = 0;
800eeca4 4121 }
e0c9811a
JW		 4122
4123 if (sep == ',')
4124 {
e4e8248d
JB		 4125 unsigned reg;
4126 int n = popcount (brmask);
4127
4128 parse_operand (&e, 0);
4129 reg = e.X_add_number - REG_GR;
4130 if (e.X_op != O_register || reg > 127)
e0c9811a 4131 {
e4e8248d
JB		 4132 as_bad ("Second operand to .save.b must be a general register");
4133 reg = 0;
e0c9811a 4134 }
e4e8248d
JB		 4135 else if (reg > 128U - n)
4136 {
4137 as_bad ("Second operand to .save.b must be the first of %d general registers", n);
4138 reg = 0;
4139 }
4140 add_unwind_entry (output_br_gr (brmask, reg), 0);
e0c9811a
JW		 4141 }
4142 else
e4e8248d 4143 add_unwind_entry (output_br_mem (brmask), 0);
800eeca4
JW		 4144}
4145
197865e8 4146static void
800eeca4 4147dot_savegf (dummy)
2434f565 4148 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4149{
4150 expressionS e1, e2;
75e09913
JB		 4151
4152 if (!in_prologue ("save.gf"))
4153 return;
4154
e4e8248d
JB		 4155 if (parse_operand (&e1, ',') == ',')
4156 parse_operand (&e2, 0);
800eeca4 4157 else
e4e8248d
JB		 4158 e2.X_op = O_absent;
4159
4160 if (e1.X_op != O_constant
4161 || e1.X_add_number < 0
4162 || e1.X_add_number > 0xf)
4163 {
4164 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4165 e1.X_op = O_absent;
4166 e1.X_add_number = 0;
4167 }
4168 if (e2.X_op != O_constant
4169 || e2.X_add_number < 0
4170 || e2.X_add_number > 0xfffff)
800eeca4 4171 {
e4e8248d
JB		 4172 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4173 e2.X_op = O_absent;
4174 e2.X_add_number = 0;
800eeca4 4175 }
e4e8248d
JB		 4176 if (e1.X_op == O_constant
4177 && e2.X_op == O_constant
4178 && e1.X_add_number == 0
4179 && e2.X_add_number == 0)
4180 as_bad ("Operands to .save.gf may not be both zero");
4181
4182 add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4183}
4184
197865e8 4185static void
800eeca4 4186dot_spill (dummy)
2434f565 4187 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4188{
4189 expressionS e;
e0c9811a 4190
75e09913
JB		 4191 if (!in_prologue ("spill"))
4192 return;
4193
e4e8248d 4194 parse_operand (&e, 0);
197865e8 4195
800eeca4 4196 if (e.X_op != O_constant)
800eeca4 4197 {
e4e8248d
JB		 4198 as_bad ("Operand to .spill must be a constant");
4199 e.X_add_number = 0;
e0c9811a 4200 }
e4e8248d 4201 add_unwind_entry (output_spill_base (e.X_add_number), 0);
e0c9811a
JW		 4202}
4203
4204static void
e4e8248d
JB		 4205dot_spillreg (pred)
4206 int pred;
e0c9811a 4207{
2132e3a3 4208 int sep;
e4e8248d
JB		 4209 unsigned int qp, ab, xy, reg, treg;
4210 expressionS e;
4211 const char * const po = pred ? "spillreg.p" : "spillreg";
e0c9811a 4212
e4e8248d 4213 if (!in_procedure (po))
75e09913
JB		 4214 return;
4215
e4e8248d
JB		 4216 if (pred)
4217 sep = parse_predicate_and_operand (&e, &qp, po);
e0c9811a 4218 else
e0c9811a 4219 {
e4e8248d
JB		 4220 sep = parse_operand (&e, ',');
4221 qp = 0;
e0c9811a 4222 }
e4e8248d 4223 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4224
e4e8248d
JB		 4225 if (sep == ',')
4226 sep = parse_operand (&e, ',');
4227 else
4228 e.X_op = O_absent;
4229 convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred);
e0c9811a 4230
e4e8248d 4231 add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep);
e0c9811a
JW		 4232}
4233
4234static void
e4e8248d 4235dot_spillmem (psprel)
e0c9811a
JW		 4236 int psprel;
4237{
e4e8248d
JB		 4238 expressionS e;
4239 int pred = (psprel < 0), sep;
4240 unsigned int qp, ab, reg;
4241 const char * po;
e0c9811a 4242
e4e8248d 4243 if (pred)
e0c9811a 4244 {
e4e8248d
JB		 4245 psprel = ~psprel;
4246 po = psprel ? "spillpsp.p" : "spillsp.p";
e0c9811a 4247 }
e4e8248d
JB		 4248 else
4249 po = psprel ? "spillpsp" : "spillsp";
e0c9811a 4250
e4e8248d
JB		 4251 if (!in_procedure (po))
4252 return;
e0c9811a 4253
e4e8248d
JB		 4254 if (pred)
4255 sep = parse_predicate_and_operand (&e, &qp, po);
4256 else
e0c9811a 4257 {
e4e8248d
JB		 4258 sep = parse_operand (&e, ',');
4259 qp = 0;
e0c9811a 4260 }
e4e8248d 4261 convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
e0c9811a 4262
e4e8248d
JB		 4263 if (sep == ',')
4264 sep = parse_operand (&e, ',');
4265 else
4266 e.X_op = O_absent;
4267 if (e.X_op != O_constant)
e0c9811a 4268 {
e4e8248d
JB		 4269 as_bad ("Operand %d to .%s must be a constant", 2 + pred, po);
4270 e.X_add_number = 0;
e0c9811a
JW		 4271 }
4272
4273 if (psprel)
e4e8248d 4274 add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a 4275 else
e4e8248d 4276 add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep);
e0c9811a
JW		 4277}
4278
6290819d
NC		 4279static unsigned int
4280get_saved_prologue_count (lbl)
4281 unsigned long lbl;
4282{
4283 label_prologue_count *lpc = unwind.saved_prologue_counts;
4284
4285 while (lpc != NULL && lpc->label_number != lbl)
4286 lpc = lpc->next;
4287
4288 if (lpc != NULL)
4289 return lpc->prologue_count;
4290
4291 as_bad ("Missing .label_state %ld", lbl);
4292 return 1;
4293}
4294
4295static void
4296save_prologue_count (lbl, count)
4297 unsigned long lbl;
4298 unsigned int count;
4299{
4300 label_prologue_count *lpc = unwind.saved_prologue_counts;
4301
4302 while (lpc != NULL && lpc->label_number != lbl)
4303 lpc = lpc->next;
4304
4305 if (lpc != NULL)
4306 lpc->prologue_count = count;
4307 else
4308 {
40449e9f 4309 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4310
4311 new_lpc->next = unwind.saved_prologue_counts;
4312 new_lpc->label_number = lbl;
4313 new_lpc->prologue_count = count;
4314 unwind.saved_prologue_counts = new_lpc;
4315 }
4316}
4317
4318static void
4319free_saved_prologue_counts ()
4320{
40449e9f
KH		 4321 label_prologue_count *lpc = unwind.saved_prologue_counts;
4322 label_prologue_count *next;
6290819d
NC		 4323
4324 while (lpc != NULL)
4325 {
4326 next = lpc->next;
4327 free (lpc);
4328 lpc = next;
4329 }
4330
4331 unwind.saved_prologue_counts = NULL;
4332}
4333
e0c9811a
JW		 4334static void
4335dot_label_state (dummy)
2434f565 4336 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4337{
4338 expressionS e;
4339
75e09913
JB		 4340 if (!in_body ("label_state"))
4341 return;
4342
e4e8248d
JB		 4343 parse_operand (&e, 0);
4344 if (e.X_op == O_constant)
4345 save_prologue_count (e.X_add_number, unwind.prologue_count);
4346 else
e0c9811a
JW		 4347 {
4348 as_bad ("Operand to .label_state must be a constant");
e4e8248d 4349 e.X_add_number = 0;
e0c9811a 4350 }
e4e8248d 4351 add_unwind_entry (output_label_state (e.X_add_number), 0);
e0c9811a
JW		 4352}
4353
4354static void
4355dot_copy_state (dummy)
2434f565 4356 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4357{
4358 expressionS e;
4359
75e09913
JB		 4360 if (!in_body ("copy_state"))
4361 return;
4362
e4e8248d
JB		 4363 parse_operand (&e, 0);
4364 if (e.X_op == O_constant)
4365 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4366 else
e0c9811a
JW		 4367 {
4368 as_bad ("Operand to .copy_state must be a constant");
e4e8248d 4369 e.X_add_number = 0;
e0c9811a 4370 }
e4e8248d 4371 add_unwind_entry (output_copy_state (e.X_add_number), 0);
800eeca4
JW		 4372}
4373
197865e8 4374static void
800eeca4 4375dot_unwabi (dummy)
2434f565 4376 int dummy ATTRIBUTE_UNUSED;
800eeca4 4377{
e0c9811a
JW		 4378 expressionS e1, e2;
4379 unsigned char sep;
4380
e4e8248d 4381 if (!in_prologue ("unwabi"))
75e09913
JB		 4382 return;
4383
e4e8248d
JB		 4384 sep = parse_operand (&e1, ',');
4385 if (sep == ',')
4386 parse_operand (&e2, 0);
4387 else
4388 e2.X_op = O_absent;
e0c9811a
JW		 4389
4390 if (e1.X_op != O_constant)
4391 {
4392 as_bad ("First operand to .unwabi must be a constant");
e4e8248d 4393 e1.X_add_number = 0;
e0c9811a
JW		 4394 }
4395
4396 if (e2.X_op != O_constant)
4397 {
4398 as_bad ("Second operand to .unwabi must be a constant");
e4e8248d 4399 e2.X_add_number = 0;
e0c9811a
JW		 4400 }
4401
e4e8248d 4402 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0);
800eeca4
JW		 4403}
4404
197865e8 4405static void
800eeca4 4406dot_personality (dummy)
2434f565 4407 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4408{
4409 char *name, *p, c;
75e09913
JB		 4410 if (!in_procedure ("personality"))
4411 return;
800eeca4
JW		 4412 SKIP_WHITESPACE ();
4413 name = input_line_pointer;
4414 c = get_symbol_end ();
4415 p = input_line_pointer;
e0c9811a 4416 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4417 unwind.force_unwind_entry = 1;
800eeca4
JW		 4418 *p = c;
4419 SKIP_WHITESPACE ();
4420 demand_empty_rest_of_line ();
4421}
4422
4423static void
4424dot_proc (dummy)
2434f565 4425 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4426{
4427 char *name, *p, c;
4428 symbolS *sym;
5656b6b8
JB		 4429 proc_pending *pending, *last_pending;
4430
4431 if (unwind.proc_pending.sym)
4432 {
4433 (md.unwind_check == unwind_check_warning
4434 ? as_warn
4435 : as_bad) ("Missing .endp after previous .proc");
4436 while (unwind.proc_pending.next)
4437 {
4438 pending = unwind.proc_pending.next;
4439 unwind.proc_pending.next = pending->next;
4440 free (pending);
4441 }
4442 }
4443 last_pending = NULL;
800eeca4 4444
e0c9811a 4445 /* Parse names of main and alternate entry points and mark them as
542d6675 4446 function symbols: */
800eeca4
JW		 4447 while (1)
4448 {
4449 SKIP_WHITESPACE ();
4450 name = input_line_pointer;
4451 c = get_symbol_end ();
4452 p = input_line_pointer;
75e09913
JB		 4453 if (!*name)
4454 as_bad ("Empty argument of .proc");
4455 else
542d6675 4456 {
75e09913
JB		 4457 sym = symbol_find_or_make (name);
4458 if (S_IS_DEFINED (sym))
4459 as_bad ("`%s' was already defined", name);
5656b6b8
JB		 4460 else if (!last_pending)
4461 {
4462 unwind.proc_pending.sym = sym;
4463 last_pending = &unwind.proc_pending;
4464 }
4465 else
75e09913 4466 {
5656b6b8
JB		 4467 pending = xmalloc (sizeof (*pending));
4468 pending->sym = sym;
4469 last_pending = last_pending->next = pending;
75e09913
JB		 4470 }
4471 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4472 }
800eeca4
JW		 4473 *p = c;
4474 SKIP_WHITESPACE ();
4475 if (*input_line_pointer != ',')
4476 break;
4477 ++input_line_pointer;
4478 }
5656b6b8
JB		 4479 if (!last_pending)
4480 {
4481 unwind.proc_pending.sym = expr_build_dot ();
4482 last_pending = &unwind.proc_pending;
4483 }
4484 last_pending->next = NULL;
800eeca4
JW		 4485 demand_empty_rest_of_line ();
4486 ia64_do_align (16);
4487
75e09913 4488 unwind.prologue = 0;
33d01f33 4489 unwind.prologue_count = 0;
75e09913
JB		 4490 unwind.body = 0;
4491 unwind.insn = 0;
e0c9811a
JW		 4492 unwind.list = unwind.tail = unwind.current_entry = NULL;
4493 unwind.personality_routine = 0;
800eeca4
JW		 4494}
4495
4496static void
4497dot_body (dummy)
2434f565 4498 int dummy ATTRIBUTE_UNUSED;
800eeca4 4499{
75e09913
JB		 4500 if (!in_procedure ("body"))
4501 return;
4502 if (!unwind.prologue && !unwind.body && unwind.insn)
4503 as_warn ("Initial .body should precede any instructions");
ba825241 4504 check_pending_save ();
75e09913 4505
e0c9811a 4506 unwind.prologue = 0;
30d25259 4507 unwind.prologue_mask = 0;
75e09913 4508 unwind.body = 1;
30d25259 4509
e4e8248d 4510 add_unwind_entry (output_body (), 0);
800eeca4
JW		 4511}
4512
4513static void
4514dot_prologue (dummy)
2434f565 4515 int dummy ATTRIBUTE_UNUSED;
800eeca4 4516{
e4e8248d 4517 unsigned mask = 0, grsave = 0;
e0c9811a 4518
75e09913
JB		 4519 if (!in_procedure ("prologue"))
4520 return;
4521 if (unwind.prologue)
4522 {
4523 as_bad (".prologue within prologue");
4524 ignore_rest_of_line ();
4525 return;
4526 }
4527 if (!unwind.body && unwind.insn)
4528 as_warn ("Initial .prologue should precede any instructions");
4529
e0c9811a 4530 if (!is_it_end_of_statement ())
800eeca4 4531 {
e4e8248d
JB		 4532 expressionS e;
4533 int n, sep = parse_operand (&e, ',');
30d25259 4534
e4e8248d
JB		 4535 if (e.X_op != O_constant
4536 || e.X_add_number < 0
4537 || e.X_add_number > 0xf)
4538 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4539 else if (e.X_add_number == 0)
4540 as_warn ("Pointless use of zero first operand to .prologue");
4541 else
4542 mask = e.X_add_number;
4543 n = popcount (mask);
30d25259 4544
e4e8248d
JB		 4545 if (sep == ',')
4546 parse_operand (&e, 0);
800eeca4 4547 else
e4e8248d
JB		 4548 e.X_op = O_absent;
4549 if (e.X_op == O_constant
4550 && e.X_add_number >= 0
4551 && e.X_add_number < 128)
4552 {
4553 if (md.unwind_check == unwind_check_error)
4554 as_warn ("Using a constant as second operand to .prologue is deprecated");
4555 grsave = e.X_add_number;
4556 }
4557 else if (e.X_op != O_register
4558 || (grsave = e.X_add_number - REG_GR) > 127)
4559 {
4560 as_bad ("Second operand to .prologue must be a general register");
4561 grsave = 0;
4562 }
4563 else if (grsave > 128U - n)
4564 {
4565 as_bad ("Second operand to .prologue must be the first of %d general registers", n);
4566 grsave = 0;
4567 }
4568
800eeca4 4569 }
e4e8248d
JB		 4570
4571 if (mask)
4572 add_unwind_entry (output_prologue_gr (mask, grsave), 0);
800eeca4 4573 else
e4e8248d 4574 add_unwind_entry (output_prologue (), 0);
30d25259
RH		 4575
4576 unwind.prologue = 1;
4577 unwind.prologue_mask = mask;
e4e8248d 4578 unwind.prologue_gr = grsave;
75e09913 4579 unwind.body = 0;
33d01f33 4580 ++unwind.prologue_count;
800eeca4
JW		 4581}
4582
4583static void
4584dot_endp (dummy)
2434f565 4585 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4586{
4587 expressionS e;
44f5c83a 4588 int bytes_per_address;
800eeca4
JW		 4589 long where;
4590 segT saved_seg;
4591 subsegT saved_subseg;
5656b6b8 4592 proc_pending *pending;
970d6792 4593 int unwind_check = md.unwind_check;
800eeca4 4594
970d6792 4595 md.unwind_check = unwind_check_error;
75e09913
JB		 4596 if (!in_procedure ("endp"))
4597 return;
970d6792 4598 md.unwind_check = unwind_check;
75e09913 4599
91a2ae2a
RH		 4600 if (unwind.saved_text_seg)
4601 {
4602 saved_seg = unwind.saved_text_seg;
4603 saved_subseg = unwind.saved_text_subseg;
4604 unwind.saved_text_seg = NULL;
4605 }
4606 else
4607 {
4608 saved_seg = now_seg;
4609 saved_subseg = now_subseg;
4610 }
4611
800eeca4 4612 insn_group_break (1, 0, 0);
800eeca4 4613
91a2ae2a
RH		 4614 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4615 if (!unwind.info)
2d6ed997 4616 generate_unwind_image (saved_seg);
800eeca4 4617
91a2ae2a
RH		 4618 if (unwind.info || unwind.force_unwind_entry)
4619 {
75e09913
JB		 4620 symbolS *proc_end;
4621
91a2ae2a 4622 subseg_set (md.last_text_seg, 0);
75e09913 4623 proc_end = expr_build_dot ();
5e7474a7 4624
da9f89d4 4625 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4626
557debba
JW		 4627 /* Make sure that section has 4 byte alignment for ILP32 and
4628 8 byte alignment for LP64. */
4629 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4630
557debba
JW		 4631 /* Need space for 3 pointers for procedure start, procedure end,
4632 and unwind info. */
6baf2b51 4633 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size);
557debba 4634 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4635 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4636
40449e9f 4637 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4638 e.X_op = O_pseudo_fixup;
4639 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4640 e.X_add_number = 0;
5656b6b8
JB		 4641 if (!S_IS_LOCAL (unwind.proc_pending.sym)
4642 && S_IS_DEFINED (unwind.proc_pending.sym))
4643 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym),
4644 S_GET_VALUE (unwind.proc_pending.sym),
4645 symbol_get_frag (unwind.proc_pending.sym));
4600db48 4646 else
5656b6b8 4647 e.X_add_symbol = unwind.proc_pending.sym;
91a2ae2a 4648 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4649
800eeca4
JW		 4650 e.X_op = O_pseudo_fixup;
4651 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4652 e.X_add_number = 0;
75e09913 4653 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4654 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4655 bytes_per_address, &e);
4656
4657 if (unwind.info)
4658 {
4659 e.X_op = O_pseudo_fixup;
4660 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4661 e.X_add_number = 0;
4662 e.X_add_symbol = unwind.info;
4663 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4664 bytes_per_address, &e);
4665 }
91a2ae2a 4666 }
800eeca4 4667 subseg_set (saved_seg, saved_subseg);
c538998c 4668
5656b6b8
JB		 4669 /* Set symbol sizes. */
4670 pending = &unwind.proc_pending;
4671 if (S_GET_NAME (pending->sym))
c538998c 4672 {
5656b6b8 4673 do
75e09913 4674 {
5656b6b8
JB		 4675 symbolS *sym = pending->sym;
4676
4677 if (!S_IS_DEFINED (sym))
4678 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym));
4679 else if (S_GET_SIZE (sym) == 0
4680 && symbol_get_obj (sym)->size == NULL)
75e09913 4681 {
75e09913
JB		 4682 fragS *frag = symbol_get_frag (sym);
4683
5656b6b8 4684 if (frag)
c538998c 4685 {
75e09913
JB		 4686 if (frag == frag_now && SEG_NORMAL (now_seg))
4687 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4688 else
4689 {
4690 symbol_get_obj (sym)->size =
4691 (expressionS *) xmalloc (sizeof (expressionS));
4692 symbol_get_obj (sym)->size->X_op = O_subtract;
4693 symbol_get_obj (sym)->size->X_add_symbol
4694 = symbol_new (FAKE_LABEL_NAME, now_seg,
4695 frag_now_fix (), frag_now);
4696 symbol_get_obj (sym)->size->X_op_symbol = sym;
4697 symbol_get_obj (sym)->size->X_add_number = 0;
4698 }
c538998c
JJ		 4699 }
4700 }
5656b6b8
JB		 4701 } while ((pending = pending->next) != NULL);
4702 }
4703
4704 /* Parse names of main and alternate entry points. */
4705 while (1)
4706 {
4707 char *name, *p, c;
4708
4709 SKIP_WHITESPACE ();
4710 name = input_line_pointer;
4711 c = get_symbol_end ();
4712 p = input_line_pointer;
4713 if (!*name)
4714 (md.unwind_check == unwind_check_warning
4715 ? as_warn
4716 : as_bad) ("Empty argument of .endp");
4717 else
4718 {
4719 symbolS *sym = symbol_find (name);
4720
4721 for (pending = &unwind.proc_pending; pending; pending = pending->next)
4722 {
4723 if (sym == pending->sym)
4724 {
4725 pending->sym = NULL;
4726 break;
4727 }
4728 }
4729 if (!sym || !pending)
4730 as_warn ("`%s' was not specified with previous .proc", name);
c538998c
JJ		 4731 }
4732 *p = c;
4733 SKIP_WHITESPACE ();
4734 if (*input_line_pointer != ',')
4735 break;
4736 ++input_line_pointer;
4737 }
4738 demand_empty_rest_of_line ();
5656b6b8
JB		 4739
4740 /* Deliberately only checking for the main entry point here; the
4741 language spec even says all arguments to .endp are ignored. */
4742 if (unwind.proc_pending.sym
4743 && S_GET_NAME (unwind.proc_pending.sym)
4744 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME))
4745 as_warn ("`%s' should be an operand to this .endp",
4746 S_GET_NAME (unwind.proc_pending.sym));
4747 while (unwind.proc_pending.next)
4748 {
4749 pending = unwind.proc_pending.next;
4750 unwind.proc_pending.next = pending->next;
4751 free (pending);
4752 }
4753 unwind.proc_pending.sym = unwind.info = NULL;
800eeca4
JW		 4754}
4755
4756static void
4757dot_template (template)
4758 int template;
4759{
4760 CURR_SLOT.user_template = template;
4761}
4762
4763static void
4764dot_regstk (dummy)
2434f565 4765 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4766{
4767 int ins, locs, outs, rots;
4768
4769 if (is_it_end_of_statement ())
4770 ins = locs = outs = rots = 0;
4771 else
4772 {
4773 ins = get_absolute_expression ();
4774 if (*input_line_pointer++ != ',')
4775 goto err;
4776 locs = get_absolute_expression ();
4777 if (*input_line_pointer++ != ',')
4778 goto err;
4779 outs = get_absolute_expression ();
4780 if (*input_line_pointer++ != ',')
4781 goto err;
4782 rots = get_absolute_expression ();
4783 }
4784 set_regstack (ins, locs, outs, rots);
4785 return;
4786
4787 err:
4788 as_bad ("Comma expected");
4789 ignore_rest_of_line ();
4790}
4791
4792static void
4793dot_rot (type)
4794 int type;
4795{
6a2375c6
JB		 4796 offsetT num_regs;
4797 valueT num_alloced = 0;
800eeca4
JW		 4798 struct dynreg **drpp, *dr;
4799 int ch, base_reg = 0;
4800 char *name, *start;
4801 size_t len;
4802
4803 switch (type)
4804 {
4805 case DYNREG_GR: base_reg = REG_GR + 32; break;
4806 case DYNREG_FR: base_reg = REG_FR + 32; break;
4807 case DYNREG_PR: base_reg = REG_P + 16; break;
4808 default: break;
4809 }
4810
542d6675 4811 /* First, remove existing names from hash table. */
800eeca4
JW		 4812 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4813 {
4814 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4815 /* FIXME: Free dr->name. */
800eeca4
JW		 4816 dr->num_regs = 0;
4817 }
4818
4819 drpp = &md.dynreg[type];
4820 while (1)
4821 {
4822 start = input_line_pointer;
4823 ch = get_symbol_end ();
20b36a95 4824 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4825 *input_line_pointer = ch;
800eeca4
JW		 4826
4827 SKIP_WHITESPACE ();
4828 if (*input_line_pointer != '[')
4829 {
4830 as_bad ("Expected '['");
4831 goto err;
4832 }
4833 ++input_line_pointer; /* skip '[' */
4834
4835 num_regs = get_absolute_expression ();
4836
4837 if (*input_line_pointer++ != ']')
4838 {
4839 as_bad ("Expected ']'");
4840 goto err;
4841 }
6a2375c6
JB		 4842 if (num_regs <= 0)
4843 {
4844 as_bad ("Number of elements must be positive");
4845 goto err;
4846 }
800eeca4
JW		 4847 SKIP_WHITESPACE ();
4848
4849 num_alloced += num_regs;
4850 switch (type)
4851 {
4852 case DYNREG_GR:
4853 if (num_alloced > md.rot.num_regs)
4854 {
4855 as_bad ("Used more than the declared %d rotating registers",
4856 md.rot.num_regs);
4857 goto err;
4858 }
4859 break;
4860 case DYNREG_FR:
4861 if (num_alloced > 96)
4862 {
4863 as_bad ("Used more than the available 96 rotating registers");
4864 goto err;
4865 }
4866 break;
4867 case DYNREG_PR:
4868 if (num_alloced > 48)
4869 {
4870 as_bad ("Used more than the available 48 rotating registers");
4871 goto err;
4872 }
4873 break;
4874
4875 default:
4876 break;
4877 }
4878
800eeca4
JW		 4879 if (!*drpp)
4880 {
4881 *drpp = obstack_alloc (&notes, sizeof (*dr));
4882 memset (*drpp, 0, sizeof (*dr));
4883 }
4884
20b36a95
JB		 4885 name = obstack_alloc (&notes, len + 1);
4886 memcpy (name, start, len);
4887 name[len] = '\0';
4888
800eeca4
JW		 4889 dr = *drpp;
4890 dr->name = name;
4891 dr->num_regs = num_regs;
4892 dr->base = base_reg;
4893 drpp = &dr->next;
4894 base_reg += num_regs;
4895
4896 if (hash_insert (md.dynreg_hash, name, dr))
4897 {
4898 as_bad ("Attempt to redefine register set `%s'", name);
20b36a95 4899 obstack_free (&notes, name);
800eeca4
JW		 4900 goto err;
4901 }
4902
4903 if (*input_line_pointer != ',')
4904 break;
4905 ++input_line_pointer; /* skip comma */
4906 SKIP_WHITESPACE ();
4907 }
4908 demand_empty_rest_of_line ();
4909 return;
4910
4911 err:
4912 ignore_rest_of_line ();
4913}
4914
4915static void
4916dot_byteorder (byteorder)
4917 int byteorder;
4918{
10a98291
L		 4919 segment_info_type *seginfo = seg_info (now_seg);
4920
4921 if (byteorder == -1)
4922 {
4923 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4924 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4925 byteorder = seginfo->tc_segment_info_data.endian == 1;
4926 }
4927 else
4928 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4929
4930 if (target_big_endian != byteorder)
4931 {
4932 target_big_endian = byteorder;
4933 if (target_big_endian)
4934 {
4935 ia64_number_to_chars = number_to_chars_bigendian;
4936 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4937 }
4938 else
4939 {
4940 ia64_number_to_chars = number_to_chars_littleendian;
4941 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4942 }
4943 }
800eeca4
JW		 4944}
4945
4946static void
4947dot_psr (dummy)
2434f565 4948 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4949{
4950 char *option;
4951 int ch;
4952
4953 while (1)
4954 {
4955 option = input_line_pointer;
4956 ch = get_symbol_end ();
4957 if (strcmp (option, "lsb") == 0)
4958 md.flags &= ~EF_IA_64_BE;
4959 else if (strcmp (option, "msb") == 0)
4960 md.flags |= EF_IA_64_BE;
4961 else if (strcmp (option, "abi32") == 0)
4962 md.flags &= ~EF_IA_64_ABI64;
4963 else if (strcmp (option, "abi64") == 0)
4964 md.flags |= EF_IA_64_ABI64;
4965 else
4966 as_bad ("Unknown psr option `%s'", option);
4967 *input_line_pointer = ch;
4968
4969 SKIP_WHITESPACE ();
4970 if (*input_line_pointer != ',')
4971 break;
4972
4973 ++input_line_pointer;
4974 SKIP_WHITESPACE ();
4975 }
4976 demand_empty_rest_of_line ();
4977}
4978
800eeca4
JW		 4979static void
4980dot_ln (dummy)
2434f565 4981 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4982{
4983 new_logical_line (0, get_absolute_expression ());
4984 demand_empty_rest_of_line ();
4985}
4986
ef6a2b41
JB		 4987static void
4988cross_section (ref, cons, ua)
4989 int ref;
4990 void (*cons) PARAMS((int));
4991 int ua;
800eeca4 4992{
ef6a2b41
JB		 4993 char *start, *end;
4994 int saved_auto_align;
4995 unsigned int section_count;
800eeca4
JW		 4996
4997 SKIP_WHITESPACE ();
ef6a2b41
JB		 4998 start = input_line_pointer;
4999 if (*start == '"')
5000 {
5001 int len;
5002 char *name;
5003
b3f19c14 5004 name = demand_copy_C_string (&len);
ef6a2b41
JB		 5005 obstack_free(&notes, name);
5006 if (!name)
5007 {
5008 ignore_rest_of_line ();
5009 return;
5010 }
5011 }
b3f19c14 5012 else
800eeca4 5013 {
b3f19c14
JB		 5014 char c = get_symbol_end ();
5015
5016 if (input_line_pointer == start)
5017 {
5018 as_bad ("Missing section name");
5019 ignore_rest_of_line ();
ef6a2b41 5020 return;
b3f19c14 5021 }
b3f19c14 5022 *input_line_pointer = c;
800eeca4 5023 }
ef6a2b41 5024 end = input_line_pointer;
800eeca4
JW		 5025 SKIP_WHITESPACE ();
5026 if (*input_line_pointer != ',')
5027 {
5028 as_bad ("Comma expected after section name");
5029 ignore_rest_of_line ();
ef6a2b41 5030 return;
800eeca4 5031 }
ef6a2b41
JB		 5032 *end = '\0';
5033 end = input_line_pointer + 1; /* skip comma */
5034 input_line_pointer = start;
5035 md.keep_pending_output = 1;
5036 section_count = bfd_count_sections(stdoutput);
5037 obj_elf_section (0);
5038 if (section_count != bfd_count_sections(stdoutput))
5039 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5040 input_line_pointer = end;
5041 saved_auto_align = md.auto_align;
5042 if (ua)
5043 md.auto_align = 0;
5044 (*cons) (ref);
5045 if (ua)
5046 md.auto_align = saved_auto_align;
5047 obj_elf_previous (0);
5048 md.keep_pending_output = 0;
800eeca4
JW		 5049}
5050
5051static void
5052dot_xdata (size)
5053 int size;
5054{
ef6a2b41 5055 cross_section (size, cons, 0);
800eeca4
JW		 5056}
5057
5058/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 5059
800eeca4
JW		 5060static void
5061stmt_float_cons (kind)
5062 int kind;
5063{
165a7f90 5064 size_t alignment;
800eeca4
JW		 5065
5066 switch (kind)
5067 {
165a7f90
L		 5068 case 'd':
5069 alignment = 8;
5070 break;
5071
5072 case 'x':
5073 case 'X':
5074 alignment = 16;
5075 break;
800eeca4
JW		 5076
5077 case 'f':
5078 default:
165a7f90 5079 alignment = 4;
800eeca4
JW		 5080 break;
5081 }
165a7f90 5082 ia64_do_align (alignment);
800eeca4
JW		 5083 float_cons (kind);
5084}
5085
5086static void
5087stmt_cons_ua (size)
5088 int size;
5089{
5090 int saved_auto_align = md.auto_align;
5091
5092 md.auto_align = 0;
5093 cons (size);
5094 md.auto_align = saved_auto_align;
5095}
5096
5097static void
5098dot_xfloat_cons (kind)
5099 int kind;
5100{
ef6a2b41 5101 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 5102}
5103
5104static void
5105dot_xstringer (zero)
5106 int zero;
5107{
ef6a2b41 5108 cross_section (zero, stringer, 0);
800eeca4
JW		 5109}
5110
5111static void
5112dot_xdata_ua (size)
5113 int size;
5114{
ef6a2b41 5115 cross_section (size, cons, 1);
800eeca4
JW		 5116}
5117
5118static void
5119dot_xfloat_cons_ua (kind)
5120 int kind;
5121{
ef6a2b41 5122 cross_section (kind, float_cons, 1);
800eeca4
JW		 5123}
5124
5125/* .reg.val <regname>,value */
542d6675 5126
800eeca4
JW		 5127static void
5128dot_reg_val (dummy)
2434f565 5129 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5130{
5131 expressionS reg;
5132
60d11e55 5133 expression_and_evaluate (&reg);
800eeca4
JW		 5134 if (reg.X_op != O_register)
5135 {
5136 as_bad (_("Register name expected"));
5137 ignore_rest_of_line ();
5138 }
5139 else if (*input_line_pointer++ != ',')
5140 {
5141 as_bad (_("Comma expected"));
5142 ignore_rest_of_line ();
5143 }
197865e8 5144 else
800eeca4
JW		 5145 {
5146 valueT value = get_absolute_expression ();
5147 int regno = reg.X_add_number;
a66d2bb7 5148 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 5149 as_warn (_("Register value annotation ignored"));
800eeca4 5150 else
542d6675
KH		 5151 {
5152 gr_values[regno - REG_GR].known = 1;
5153 gr_values[regno - REG_GR].value = value;
5154 gr_values[regno - REG_GR].path = md.path;
5155 }
800eeca4
JW		 5156 }
5157 demand_empty_rest_of_line ();
5158}
5159
5e819f9c
JW		 5160/*
5161 .serialize.data
5162 .serialize.instruction
5163 */
5164static void
5165dot_serialize (type)
5166 int type;
5167{
5168 insn_group_break (0, 0, 0);
5169 if (type)
5170 instruction_serialization ();
5171 else
5172 data_serialization ();
5173 insn_group_break (0, 0, 0);
5174 demand_empty_rest_of_line ();
5175}
5176
197865e8 5177/* select dv checking mode
800eeca4
JW		 5178 .auto
5179 .explicit
5180 .default
5181
197865e8 5182 A stop is inserted when changing modes
800eeca4 5183 */
542d6675 5184
800eeca4
JW		 5185static void
5186dot_dv_mode (type)
542d6675 5187 int type;
800eeca4
JW		 5188{
5189 if (md.manual_bundling)
5190 as_warn (_("Directive invalid within a bundle"));
5191
5192 if (type == 'E' || type == 'A')
5193 md.mode_explicitly_set = 0;
5194 else
5195 md.mode_explicitly_set = 1;
5196
5197 md.detect_dv = 1;
5198 switch (type)
5199 {
5200 case 'A':
5201 case 'a':
5202 if (md.explicit_mode)
542d6675 5203 insn_group_break (1, 0, 0);
800eeca4
JW		 5204 md.explicit_mode = 0;
5205 break;
5206 case 'E':
5207 case 'e':
5208 if (!md.explicit_mode)
542d6675 5209 insn_group_break (1, 0, 0);
800eeca4
JW		 5210 md.explicit_mode = 1;
5211 break;
5212 default:
5213 case 'd':
5214 if (md.explicit_mode != md.default_explicit_mode)
542d6675 5215 insn_group_break (1, 0, 0);
800eeca4
JW		 5216 md.explicit_mode = md.default_explicit_mode;
5217 md.mode_explicitly_set = 0;
5218 break;
5219 }
5220}
5221
5222static void
5223print_prmask (mask)
542d6675 5224 valueT mask;
800eeca4
JW		 5225{
5226 int regno;
5227 char *comma = "";
542d6675 5228 for (regno = 0; regno < 64; regno++)
800eeca4 5229 {
542d6675
KH		 5230 if (mask & ((valueT) 1 << regno))
5231 {
5232 fprintf (stderr, "%s p%d", comma, regno);
5233 comma = ",";
5234 }
800eeca4
JW		 5235 }
5236}
5237
5238/*
05ee4b0f
JB		 5239 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5240 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5241 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5242 .pred.safe_across_calls p1 [, p2 [,...]]
5243 */
542d6675 5244
800eeca4
JW		 5245static void
5246dot_pred_rel (type)
542d6675 5247 int type;
800eeca4
JW		 5248{
5249 valueT mask = 0;
5250 int count = 0;
5251 int p1 = -1, p2 = -1;
5252
5253 if (type == 0)
5254 {
05ee4b0f 5255 if (*input_line_pointer == '"')
542d6675
KH		 5256 {
5257 int len;
5258 char *form = demand_copy_C_string (&len);
05ee4b0f 5259
542d6675
KH		 5260 if (strcmp (form, "mutex") == 0)
5261 type = 'm';
5262 else if (strcmp (form, "clear") == 0)
5263 type = 'c';
5264 else if (strcmp (form, "imply") == 0)
5265 type = 'i';
05ee4b0f
JB		 5266 obstack_free (&notes, form);
5267 }
5268 else if (*input_line_pointer == '@')
5269 {
5270 char *form = ++input_line_pointer;
5271 char c = get_symbol_end();
5272
5273 if (strcmp (form, "mutex") == 0)
5274 type = 'm';
5275 else if (strcmp (form, "clear") == 0)
5276 type = 'c';
5277 else if (strcmp (form, "imply") == 0)
5278 type = 'i';
5279 *input_line_pointer = c;
5280 }
5281 else
5282 {
5283 as_bad (_("Missing predicate relation type"));
5284 ignore_rest_of_line ();
5285 return;
5286 }
5287 if (type == 0)
5288 {
5289 as_bad (_("Unrecognized predicate relation type"));
5290 ignore_rest_of_line ();
5291 return;
542d6675 5292 }
800eeca4 5293 if (*input_line_pointer == ',')
542d6675 5294 ++input_line_pointer;
800eeca4
JW		 5295 SKIP_WHITESPACE ();
5296 }
5297
5298 SKIP_WHITESPACE ();
5299 while (1)
5300 {
20b36a95 5301 valueT bits = 1;
800eeca4 5302 int regno;
20b36a95
JB		 5303 expressionS pr, *pr1, *pr2;
5304
60d11e55 5305 expression_and_evaluate (&pr);
20b36a95
JB		 5306 if (pr.X_op == O_register
5307 && pr.X_add_number >= REG_P
5308 && pr.X_add_number <= REG_P + 63)
5309 {
5310 regno = pr.X_add_number - REG_P;
5311 bits <<= regno;
5312 count++;
5313 if (p1 == -1)
5314 p1 = regno;
5315 else if (p2 == -1)
5316 p2 = regno;
5317 }
5318 else if (type != 'i'
5319 && pr.X_op == O_subtract
5320 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5321 && pr1->X_op == O_register
5322 && pr1->X_add_number >= REG_P
5323 && pr1->X_add_number <= REG_P + 63
5324 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5325 && pr2->X_op == O_register
5326 && pr2->X_add_number >= REG_P
5327 && pr2->X_add_number <= REG_P + 63)
5328 {
5329 /* It's a range. */
5330 int stop;
5331
5332 regno = pr1->X_add_number - REG_P;
5333 stop = pr2->X_add_number - REG_P;
5334 if (regno >= stop)
542d6675
KH		 5335 {
5336 as_bad (_("Bad register range"));
5337 ignore_rest_of_line ();
5338 return;
5339 }
20b36a95
JB		 5340 bits = ((bits << stop) << 1) - (bits << regno);
5341 count += stop - regno + 1;
5342 }
5343 else
5344 {
5345 as_bad (_("Predicate register expected"));
5346 ignore_rest_of_line ();
5347 return;
542d6675 5348 }
20b36a95
JB		 5349 if (mask & bits)
5350 as_warn (_("Duplicate predicate register ignored"));
5351 mask |= bits;
800eeca4 5352 if (*input_line_pointer != ',')
542d6675 5353 break;
800eeca4
JW		 5354 ++input_line_pointer;
5355 SKIP_WHITESPACE ();
5356 }
5357
5358 switch (type)
5359 {
5360 case 'c':
5361 if (count == 0)
542d6675 5362 mask = ~(valueT) 0;
800eeca4 5363 clear_qp_mutex (mask);
197865e8 5364 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5365 break;
5366 case 'i':
5367 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5368 as_bad (_("Predicate source and target required"));
800eeca4 5369 else if (p1 == 0 || p2 == 0)
542d6675 5370 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5371 else
542d6675 5372 add_qp_imply (p1, p2);
800eeca4
JW		 5373 break;
5374 case 'm':
5375 if (count < 2)
542d6675
KH		 5376 {
5377 as_bad (_("At least two PR arguments expected"));
5378 break;
5379 }
800eeca4 5380 else if (mask & 1)
542d6675
KH		 5381 {
5382 as_bad (_("Use of p0 is not valid in this context"));
5383 break;
5384 }
800eeca4
JW		 5385 add_qp_mutex (mask);
5386 break;
5387 case 's':
5388 /* note that we don't override any existing relations */
5389 if (count == 0)
542d6675
KH		 5390 {
5391 as_bad (_("At least one PR argument expected"));
5392 break;
5393 }
800eeca4 5394 if (md.debug_dv)
542d6675
KH		 5395 {
5396 fprintf (stderr, "Safe across calls: ");
5397 print_prmask (mask);
5398 fprintf (stderr, "\n");
5399 }
800eeca4
JW		 5400 qp_safe_across_calls = mask;
5401 break;
5402 }
5403 demand_empty_rest_of_line ();
5404}
5405
5406/* .entry label [, label [, ...]]
5407 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5408 Otherwise, only global labels are considered entry points. */
5409
800eeca4
JW		 5410static void
5411dot_entry (dummy)
2434f565 5412 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5413{
5414 const char *err;
5415 char *name;
5416 int c;
5417 symbolS *symbolP;
5418
5419 do
5420 {
5421 name = input_line_pointer;
5422 c = get_symbol_end ();
5423 symbolP = symbol_find_or_make (name);
5424
5425 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5426 if (err)
542d6675
KH		 5427 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5428 name, err);
800eeca4
JW		 5429
5430 *input_line_pointer = c;
5431 SKIP_WHITESPACE ();
5432 c = *input_line_pointer;
5433 if (c == ',')
5434 {
5435 input_line_pointer++;
5436 SKIP_WHITESPACE ();
5437 if (*input_line_pointer == '\n')
5438 c = '\n';
5439 }
5440 }
5441 while (c == ',');
5442
5443 demand_empty_rest_of_line ();
5444}
5445
197865e8 5446/* .mem.offset offset, base
542d6675
KH		 5447 "base" is used to distinguish between offsets from a different base. */
5448
800eeca4
JW		 5449static void
5450dot_mem_offset (dummy)
2434f565 5451 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5452{
5453 md.mem_offset.hint = 1;
5454 md.mem_offset.offset = get_absolute_expression ();
5455 if (*input_line_pointer != ',')
5456 {
5457 as_bad (_("Comma expected"));
5458 ignore_rest_of_line ();
5459 return;
5460 }
5461 ++input_line_pointer;
5462 md.mem_offset.base = get_absolute_expression ();
5463 demand_empty_rest_of_line ();
5464}
5465
542d6675 5466/* ia64-specific pseudo-ops: */
800eeca4
JW		 5467const pseudo_typeS md_pseudo_table[] =
5468 {
5469 { "radix", dot_radix, 0 },
5470 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5471 { "loc", dot_loc, 0 },
800eeca4
JW		 5472 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5473 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5474 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5475 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5476 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5477 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5478 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5479 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5480 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5481 { "proc", dot_proc, 0 },
5482 { "body", dot_body, 0 },
5483 { "prologue", dot_prologue, 0 },
2434f565 5484 { "endp", dot_endp, 0 },
2434f565
JW		 5485
5486 { "fframe", dot_fframe, 0 },
5487 { "vframe", dot_vframe, 0 },
5488 { "vframesp", dot_vframesp, 0 },
e4e8248d 5489 { "vframepsp", dot_vframesp, 1 },
2434f565
JW		 5490 { "save", dot_save, 0 },
5491 { "restore", dot_restore, 0 },
5492 { "restorereg", dot_restorereg, 0 },
e4e8248d 5493 { "restorereg.p", dot_restorereg, 1 },
2434f565
JW		 5494 { "handlerdata", dot_handlerdata, 0 },
5495 { "unwentry", dot_unwentry, 0 },
5496 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5497 { "savesp", dot_savemem, 0 },
5498 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5499 { "save.g", dot_saveg, 0 },
5500 { "save.f", dot_savef, 0 },
5501 { "save.b", dot_saveb, 0 },
5502 { "save.gf", dot_savegf, 0 },
5503 { "spill", dot_spill, 0 },
5504 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5505 { "spillsp", dot_spillmem, 0 },
5506 { "spillpsp", dot_spillmem, 1 },
e4e8248d
JB		 5507 { "spillreg.p", dot_spillreg, 1 },
5508 { "spillsp.p", dot_spillmem, ~0 },
5509 { "spillpsp.p", dot_spillmem, ~1 },
2434f565
JW		 5510 { "label_state", dot_label_state, 0 },
5511 { "copy_state", dot_copy_state, 0 },
5512 { "unwabi", dot_unwabi, 0 },
5513 { "personality", dot_personality, 0 },
800eeca4
JW		 5514 { "mii", dot_template, 0x0 },
5515 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5516 { "mlx", dot_template, 0x2 },
5517 { "mmi", dot_template, 0x4 },
5518 { "mfi", dot_template, 0x6 },
5519 { "mmf", dot_template, 0x7 },
5520 { "mib", dot_template, 0x8 },
5521 { "mbb", dot_template, 0x9 },
5522 { "bbb", dot_template, 0xb },
5523 { "mmb", dot_template, 0xc },
5524 { "mfb", dot_template, 0xe },
d9201763 5525 { "align", dot_align, 0 },
800eeca4
JW		 5526 { "regstk", dot_regstk, 0 },
5527 { "rotr", dot_rot, DYNREG_GR },
5528 { "rotf", dot_rot, DYNREG_FR },
5529 { "rotp", dot_rot, DYNREG_PR },
5530 { "lsb", dot_byteorder, 0 },
5531 { "msb", dot_byteorder, 1 },
5532 { "psr", dot_psr, 0 },
5533 { "alias", dot_alias, 0 },
35f5df7f 5534 { "secalias", dot_alias, 1 },
800eeca4
JW		 5535 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5536
5537 { "xdata1", dot_xdata, 1 },
5538 { "xdata2", dot_xdata, 2 },
5539 { "xdata4", dot_xdata, 4 },
5540 { "xdata8", dot_xdata, 8 },
b3f19c14 5541 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5542 { "xreal4", dot_xfloat_cons, 'f' },
5543 { "xreal8", dot_xfloat_cons, 'd' },
5544 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5545 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5546 { "xstring", dot_xstringer, 0 },
5547 { "xstringz", dot_xstringer, 1 },
5548
542d6675 5549 /* unaligned versions: */
800eeca4
JW		 5550 { "xdata2.ua", dot_xdata_ua, 2 },
5551 { "xdata4.ua", dot_xdata_ua, 4 },
5552 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5553 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5554 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5555 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5556 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5557 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5558
5559 /* annotations/DV checking support */
5560 { "entry", dot_entry, 0 },
2434f565 5561 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5562 { "pred.rel", dot_pred_rel, 0 },
5563 { "pred.rel.clear", dot_pred_rel, 'c' },
5564 { "pred.rel.imply", dot_pred_rel, 'i' },
5565 { "pred.rel.mutex", dot_pred_rel, 'm' },
5566 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5567 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5568 { "serialize.data", dot_serialize, 0 },
5569 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5570 { "auto", dot_dv_mode, 'a' },
5571 { "explicit", dot_dv_mode, 'e' },
5572 { "default", dot_dv_mode, 'd' },
5573
87885043
JW		 5574 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5575 IA-64 aligns data allocation pseudo-ops by default, so we have to
5576 tell it that these ones are supposed to be unaligned. Long term,
5577 should rewrite so that only IA-64 specific data allocation pseudo-ops
5578 are aligned by default. */
5579 {"2byte", stmt_cons_ua, 2},
5580 {"4byte", stmt_cons_ua, 4},
5581 {"8byte", stmt_cons_ua, 8},
5582
800eeca4
JW		 5583 { NULL, 0, 0 }
5584 };
5585
5586static const struct pseudo_opcode
5587 {
5588 const char *name;
5589 void (*handler) (int);
5590 int arg;
5591 }
5592pseudo_opcode[] =
5593 {
5594 /* these are more like pseudo-ops, but don't start with a dot */
5595 { "data1", cons, 1 },
5596 { "data2", cons, 2 },
5597 { "data4", cons, 4 },
5598 { "data8", cons, 8 },
3969b680 5599 { "data16", cons, 16 },
800eeca4
JW		 5600 { "real4", stmt_float_cons, 'f' },
5601 { "real8", stmt_float_cons, 'd' },
5602 { "real10", stmt_float_cons, 'x' },
165a7f90 5603 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5604 { "string", stringer, 0 },
5605 { "stringz", stringer, 1 },
5606
542d6675 5607 /* unaligned versions: */
800eeca4
JW		 5608 { "data2.ua", stmt_cons_ua, 2 },
5609 { "data4.ua", stmt_cons_ua, 4 },
5610 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5611 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5612 { "real4.ua", float_cons, 'f' },
5613 { "real8.ua", float_cons, 'd' },
5614 { "real10.ua", float_cons, 'x' },
165a7f90 5615 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5616 };
5617
5618/* Declare a register by creating a symbol for it and entering it in
5619 the symbol table. */
542d6675
KH		 5620
5621static symbolS *
800eeca4
JW		 5622declare_register (name, regnum)
5623 const char *name;
8b84be9d 5624 unsigned int regnum;
800eeca4
JW		 5625{
5626 const char *err;
5627 symbolS *sym;
5628
5e0bd176 5629 sym = symbol_create (name, reg_section, regnum, &zero_address_frag);
800eeca4
JW		 5630
5631 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5632 if (err)
5633 as_fatal ("Inserting \"%s\" into register table failed: %s",
5634 name, err);
5635
5636 return sym;
5637}
5638
5639static void
5640declare_register_set (prefix, num_regs, base_regnum)
5641 const char *prefix;
8b84be9d
JB		 5642 unsigned int num_regs;
5643 unsigned int base_regnum;
800eeca4
JW		 5644{
5645 char name[8];
8b84be9d 5646 unsigned int i;
800eeca4
JW		 5647
5648 for (i = 0; i < num_regs; ++i)
5649 {
5650 sprintf (name, "%s%u", prefix, i);
5651 declare_register (name, base_regnum + i);
5652 }
5653}
5654
5655static unsigned int
5656operand_width (opnd)
5657 enum ia64_opnd opnd;
5658{
5659 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5660 unsigned int bits = 0;
5661 int i;
5662
5663 bits = 0;
5664 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5665 bits += odesc->field[i].bits;
5666
5667 return bits;
5668}
5669
87f8eb97 5670static enum operand_match_result
800eeca4
JW		 5671operand_match (idesc, index, e)
5672 const struct ia64_opcode *idesc;
5673 int index;
5674 expressionS *e;
5675{
5676 enum ia64_opnd opnd = idesc->operands[index];
5677 int bits, relocatable = 0;
5678 struct insn_fix *fix;
5679 bfd_signed_vma val;
5680
5681 switch (opnd)
5682 {
542d6675 5683 /* constants: */
800eeca4
JW		 5684
5685 case IA64_OPND_AR_CCV:
5686 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5687 return OPERAND_MATCH;
800eeca4
JW		 5688 break;
5689
c10d9d8f
JW		 5690 case IA64_OPND_AR_CSD:
5691 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5692 return OPERAND_MATCH;
5693 break;
5694
800eeca4
JW		 5695 case IA64_OPND_AR_PFS:
5696 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5697 return OPERAND_MATCH;
800eeca4
JW		 5698 break;
5699
5700 case IA64_OPND_GR0:
5701 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5702 return OPERAND_MATCH;
800eeca4
JW		 5703 break;
5704
5705 case IA64_OPND_IP:
5706 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5707 return OPERAND_MATCH;
800eeca4
JW		 5708 break;
5709
5710 case IA64_OPND_PR:
5711 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5712 return OPERAND_MATCH;
800eeca4
JW		 5713 break;
5714
5715 case IA64_OPND_PR_ROT:
5716 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5717 return OPERAND_MATCH;
800eeca4
JW		 5718 break;
5719
5720 case IA64_OPND_PSR:
5721 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5722 return OPERAND_MATCH;
800eeca4
JW		 5723 break;
5724
5725 case IA64_OPND_PSR_L:
5726 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5727 return OPERAND_MATCH;
800eeca4
JW		 5728 break;
5729
5730 case IA64_OPND_PSR_UM:
5731 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5732 return OPERAND_MATCH;
800eeca4
JW		 5733 break;
5734
5735 case IA64_OPND_C1:
87f8eb97
JW		 5736 if (e->X_op == O_constant)
5737 {
5738 if (e->X_add_number == 1)
5739 return OPERAND_MATCH;
5740 else
5741 return OPERAND_OUT_OF_RANGE;
5742 }
800eeca4
JW		 5743 break;
5744
5745 case IA64_OPND_C8:
87f8eb97
JW		 5746 if (e->X_op == O_constant)
5747 {
5748 if (e->X_add_number == 8)
5749 return OPERAND_MATCH;
5750 else
5751 return OPERAND_OUT_OF_RANGE;
5752 }
800eeca4
JW		 5753 break;
5754
5755 case IA64_OPND_C16:
87f8eb97
JW		 5756 if (e->X_op == O_constant)
5757 {
5758 if (e->X_add_number == 16)
5759 return OPERAND_MATCH;
5760 else
5761 return OPERAND_OUT_OF_RANGE;
5762 }
800eeca4
JW		 5763 break;
5764
542d6675 5765 /* register operands: */
800eeca4
JW		 5766
5767 case IA64_OPND_AR3:
5768 if (e->X_op == O_register && e->X_add_number >= REG_AR
5769 && e->X_add_number < REG_AR + 128)
87f8eb97 5770 return OPERAND_MATCH;
800eeca4
JW		 5771 break;
5772
5773 case IA64_OPND_B1:
5774 case IA64_OPND_B2:
5775 if (e->X_op == O_register && e->X_add_number >= REG_BR
5776 && e->X_add_number < REG_BR + 8)
87f8eb97 5777 return OPERAND_MATCH;
800eeca4
JW		 5778 break;
5779
5780 case IA64_OPND_CR3:
5781 if (e->X_op == O_register && e->X_add_number >= REG_CR
5782 && e->X_add_number < REG_CR + 128)
87f8eb97 5783 return OPERAND_MATCH;
800eeca4
JW		 5784 break;
5785
5786 case IA64_OPND_F1:
5787 case IA64_OPND_F2:
5788 case IA64_OPND_F3:
5789 case IA64_OPND_F4:
5790 if (e->X_op == O_register && e->X_add_number >= REG_FR
5791 && e->X_add_number < REG_FR + 128)
87f8eb97 5792 return OPERAND_MATCH;
800eeca4
JW		 5793 break;
5794
5795 case IA64_OPND_P1:
5796 case IA64_OPND_P2:
5797 if (e->X_op == O_register && e->X_add_number >= REG_P
5798 && e->X_add_number < REG_P + 64)
87f8eb97 5799 return OPERAND_MATCH;
800eeca4
JW		 5800 break;
5801
5802 case IA64_OPND_R1:
5803 case IA64_OPND_R2:
5804 case IA64_OPND_R3:
5805 if (e->X_op == O_register && e->X_add_number >= REG_GR
5806 && e->X_add_number < REG_GR + 128)
87f8eb97 5807 return OPERAND_MATCH;
800eeca4
JW		 5808 break;
5809
5810 case IA64_OPND_R3_2:
87f8eb97 5811 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5812 {
87f8eb97
JW		 5813 if (e->X_add_number < REG_GR + 4)
5814 return OPERAND_MATCH;
5815 else if (e->X_add_number < REG_GR + 128)
5816 return OPERAND_OUT_OF_RANGE;
5817 }
800eeca4
JW		 5818 break;
5819
542d6675 5820 /* indirect operands: */
800eeca4
JW		 5821 case IA64_OPND_CPUID_R3:
5822 case IA64_OPND_DBR_R3:
5823 case IA64_OPND_DTR_R3:
5824 case IA64_OPND_ITR_R3:
5825 case IA64_OPND_IBR_R3:
5826 case IA64_OPND_MSR_R3:
5827 case IA64_OPND_PKR_R3:
5828 case IA64_OPND_PMC_R3:
5829 case IA64_OPND_PMD_R3:
5830 case IA64_OPND_RR_R3:
5831 if (e->X_op == O_index && e->X_op_symbol
5832 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5833 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5834 return OPERAND_MATCH;
800eeca4
JW		 5835 break;
5836
5837 case IA64_OPND_MR3:
5838 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5839 return OPERAND_MATCH;
800eeca4
JW		 5840 break;
5841
542d6675 5842 /* immediate operands: */
800eeca4
JW		 5843 case IA64_OPND_CNT2a:
5844 case IA64_OPND_LEN4:
5845 case IA64_OPND_LEN6:
5846 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5847 if (e->X_op == O_constant)
5848 {
5849 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5850 return OPERAND_MATCH;
5851 else
5852 return OPERAND_OUT_OF_RANGE;
5853 }
800eeca4
JW		 5854 break;
5855
5856 case IA64_OPND_CNT2b:
87f8eb97
JW		 5857 if (e->X_op == O_constant)
5858 {
5859 if ((bfd_vma) (e->X_add_number - 1) < 3)
5860 return OPERAND_MATCH;
5861 else
5862 return OPERAND_OUT_OF_RANGE;
5863 }
800eeca4
JW		 5864 break;
5865
5866 case IA64_OPND_CNT2c:
5867 val = e->X_add_number;
87f8eb97
JW		 5868 if (e->X_op == O_constant)
5869 {
5870 if ((val == 0 || val == 7 || val == 15 || val == 16))
5871 return OPERAND_MATCH;
5872 else
5873 return OPERAND_OUT_OF_RANGE;
5874 }
800eeca4
JW		 5875 break;
5876
5877 case IA64_OPND_SOR:
5878 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5879 if (e->X_op == O_constant && e->X_add_number & 0x7)
5880 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5881 case IA64_OPND_SOF:
5882 case IA64_OPND_SOL:
87f8eb97
JW		 5883 if (e->X_op == O_constant)
5884 {
5885 if ((bfd_vma) e->X_add_number <= 96)
5886 return OPERAND_MATCH;
5887 else
5888 return OPERAND_OUT_OF_RANGE;
5889 }
800eeca4
JW		 5890 break;
5891
5892 case IA64_OPND_IMMU62:
5893 if (e->X_op == O_constant)
542d6675 5894 {
800eeca4 5895 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5896 return OPERAND_MATCH;
5897 else
5898 return OPERAND_OUT_OF_RANGE;
542d6675 5899 }
197865e8 5900 else
542d6675
KH		 5901 {
5902 /* FIXME -- need 62-bit relocation type */
5903 as_bad (_("62-bit relocation not yet implemented"));
5904 }
800eeca4
JW		 5905 break;
5906
5907 case IA64_OPND_IMMU64:
5908 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5909 || e->X_op == O_subtract)
5910 {
5911 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5912 fix->code = BFD_RELOC_IA64_IMM64;
5913 if (e->X_op != O_subtract)
5914 {
5915 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5916 if (e->X_op == O_pseudo_fixup)
5917 e->X_op = O_symbol;
5918 }
5919
5920 fix->opnd = idesc->operands[index];
5921 fix->expr = *e;
5922 fix->is_pcrel = 0;
5923 ++CURR_SLOT.num_fixups;
87f8eb97 5924 return OPERAND_MATCH;
800eeca4
JW		 5925 }
5926 else if (e->X_op == O_constant)
87f8eb97 5927 return OPERAND_MATCH;
800eeca4
JW		 5928 break;
5929
5930 case IA64_OPND_CCNT5:
5931 case IA64_OPND_CNT5:
5932 case IA64_OPND_CNT6:
5933 case IA64_OPND_CPOS6a:
5934 case IA64_OPND_CPOS6b:
5935 case IA64_OPND_CPOS6c:
5936 case IA64_OPND_IMMU2:
5937 case IA64_OPND_IMMU7a:
5938 case IA64_OPND_IMMU7b:
800eeca4
JW		 5939 case IA64_OPND_IMMU21:
5940 case IA64_OPND_IMMU24:
5941 case IA64_OPND_MBTYPE4:
5942 case IA64_OPND_MHTYPE8:
5943 case IA64_OPND_POS6:
5944 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5945 if (e->X_op == O_constant)
5946 {
5947 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5948 return OPERAND_MATCH;
5949 else
5950 return OPERAND_OUT_OF_RANGE;
5951 }
800eeca4
JW		 5952 break;
5953
bf3ca999
TW		 5954 case IA64_OPND_IMMU9:
5955 bits = operand_width (idesc->operands[index]);
87f8eb97 5956 if (e->X_op == O_constant)
542d6675 5957 {
87f8eb97
JW		 5958 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5959 {
5960 int lobits = e->X_add_number & 0x3;
5961 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5962 e->X_add_number |= (bfd_vma) 0x3;
5963 return OPERAND_MATCH;
5964 }
5965 else
5966 return OPERAND_OUT_OF_RANGE;
542d6675 5967 }
bf3ca999
TW		 5968 break;
5969
800eeca4
JW		 5970 case IA64_OPND_IMM44:
5971 /* least 16 bits must be zero */
5972 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5973 /* XXX technically, this is wrong: we should not be issuing warning
5974 messages until we're sure this instruction pattern is going to
5975 be used! */
542d6675 5976 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5977
87f8eb97 5978 if (e->X_op == O_constant)
542d6675 5979 {
87f8eb97
JW		 5980 if (((e->X_add_number >= 0
5981 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5982 || (e->X_add_number < 0
5983 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5984 {
87f8eb97
JW		 5985 /* sign-extend */
5986 if (e->X_add_number >= 0
5987 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5988 {
5989 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5990 }
5991 return OPERAND_MATCH;
542d6675 5992 }
87f8eb97
JW		 5993 else
5994 return OPERAND_OUT_OF_RANGE;
542d6675 5995 }
800eeca4
JW		 5996 break;
5997
5998 case IA64_OPND_IMM17:
5999 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 6000 if (e->X_op == O_constant)
542d6675 6001 {
87f8eb97
JW		 6002 if (((e->X_add_number >= 0
6003 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
6004 || (e->X_add_number < 0
6005 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 6006 {
87f8eb97
JW		 6007 /* sign-extend */
6008 if (e->X_add_number >= 0
6009 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
6010 {
6011 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
6012 }
6013 return OPERAND_MATCH;
542d6675 6014 }
87f8eb97
JW		 6015 else
6016 return OPERAND_OUT_OF_RANGE;
542d6675 6017 }
800eeca4
JW		 6018 break;
6019
6020 case IA64_OPND_IMM14:
6021 case IA64_OPND_IMM22:
6022 relocatable = 1;
6023 case IA64_OPND_IMM1:
6024 case IA64_OPND_IMM8:
6025 case IA64_OPND_IMM8U4:
6026 case IA64_OPND_IMM8M1:
6027 case IA64_OPND_IMM8M1U4:
6028 case IA64_OPND_IMM8M1U8:
6029 case IA64_OPND_IMM9a:
6030 case IA64_OPND_IMM9b:
6031 bits = operand_width (idesc->operands[index]);
6032 if (relocatable && (e->X_op == O_symbol
6033 || e->X_op == O_subtract
6034 || e->X_op == O_pseudo_fixup))
6035 {
6036 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6037
6038 if (idesc->operands[index] == IA64_OPND_IMM14)
6039 fix->code = BFD_RELOC_IA64_IMM14;
6040 else
6041 fix->code = BFD_RELOC_IA64_IMM22;
6042
6043 if (e->X_op != O_subtract)
6044 {
6045 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6046 if (e->X_op == O_pseudo_fixup)
6047 e->X_op = O_symbol;
6048 }
6049
6050 fix->opnd = idesc->operands[index];
6051 fix->expr = *e;
6052 fix->is_pcrel = 0;
6053 ++CURR_SLOT.num_fixups;
87f8eb97 6054 return OPERAND_MATCH;
800eeca4
JW		 6055 }
6056 else if (e->X_op != O_constant
6057 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 6058 return OPERAND_MISMATCH;
800eeca4
JW		 6059
6060 if (opnd == IA64_OPND_IMM8M1U4)
6061 {
6062 /* Zero is not valid for unsigned compares that take an adjusted
6063 constant immediate range. */
6064 if (e->X_add_number == 0)
87f8eb97 6065 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6066
6067 /* Sign-extend 32-bit unsigned numbers, so that the following range
6068 checks will work. */
6069 val = e->X_add_number;
197865e8
KH		 6070 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6071 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6072 val = ((val << 32) >> 32);
6073
6074 /* Check for 0x100000000. This is valid because
6075 0x100000000-1 is the same as ((uint32_t) -1). */
6076 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 6077 return OPERAND_MATCH;
800eeca4
JW		 6078
6079 val = val - 1;
6080 }
6081 else if (opnd == IA64_OPND_IMM8M1U8)
6082 {
6083 /* Zero is not valid for unsigned compares that take an adjusted
6084 constant immediate range. */
6085 if (e->X_add_number == 0)
87f8eb97 6086 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6087
6088 /* Check for 0x10000000000000000. */
6089 if (e->X_op == O_big)
6090 {
6091 if (generic_bignum[0] == 0
6092 && generic_bignum[1] == 0
6093 && generic_bignum[2] == 0
6094 && generic_bignum[3] == 0
6095 && generic_bignum[4] == 1)
87f8eb97 6096 return OPERAND_MATCH;
800eeca4 6097 else
87f8eb97 6098 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6099 }
6100 else
6101 val = e->X_add_number - 1;
6102 }
6103 else if (opnd == IA64_OPND_IMM8M1)
6104 val = e->X_add_number - 1;
6105 else if (opnd == IA64_OPND_IMM8U4)
6106 {
6107 /* Sign-extend 32-bit unsigned numbers, so that the following range
6108 checks will work. */
6109 val = e->X_add_number;
197865e8
KH		 6110 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6111 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 6112 val = ((val << 32) >> 32);
6113 }
6114 else
6115 val = e->X_add_number;
6116
2434f565
JW		 6117 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
6118 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 6119 return OPERAND_MATCH;
6120 else
6121 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 6122
6123 case IA64_OPND_INC3:
6124 /* +/- 1, 4, 8, 16 */
6125 val = e->X_add_number;
6126 if (val < 0)
6127 val = -val;
87f8eb97
JW		 6128 if (e->X_op == O_constant)
6129 {
6130 if ((val == 1 || val == 4 || val == 8 || val == 16))
6131 return OPERAND_MATCH;
6132 else
6133 return OPERAND_OUT_OF_RANGE;
6134 }
800eeca4
JW		 6135 break;
6136
6137 case IA64_OPND_TGT25:
6138 case IA64_OPND_TGT25b:
6139 case IA64_OPND_TGT25c:
6140 case IA64_OPND_TGT64:
6141 if (e->X_op == O_symbol)
6142 {
6143 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6144 if (opnd == IA64_OPND_TGT25)
6145 fix->code = BFD_RELOC_IA64_PCREL21F;
6146 else if (opnd == IA64_OPND_TGT25b)
6147 fix->code = BFD_RELOC_IA64_PCREL21M;
6148 else if (opnd == IA64_OPND_TGT25c)
6149 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 6150 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 6151 fix->code = BFD_RELOC_IA64_PCREL60B;
6152 else
6153 abort ();
6154
800eeca4
JW		 6155 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6156 fix->opnd = idesc->operands[index];
6157 fix->expr = *e;
6158 fix->is_pcrel = 1;
6159 ++CURR_SLOT.num_fixups;
87f8eb97 6160 return OPERAND_MATCH;
800eeca4
JW		 6161 }
6162 case IA64_OPND_TAG13:
6163 case IA64_OPND_TAG13b:
6164 switch (e->X_op)
6165 {
6166 case O_constant:
87f8eb97 6167 return OPERAND_MATCH;
800eeca4
JW		 6168
6169 case O_symbol:
6170 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c 6171 /* There are no external relocs for TAG13/TAG13b fields, so we
55cf6793 6172 create a dummy reloc. This will not live past md_apply_fix. */
fa1cb89c
JW		 6173 fix->code = BFD_RELOC_UNUSED;
6174 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 6175 fix->opnd = idesc->operands[index];
6176 fix->expr = *e;
6177 fix->is_pcrel = 1;
6178 ++CURR_SLOT.num_fixups;
87f8eb97 6179 return OPERAND_MATCH;
800eeca4
JW		 6180
6181 default:
6182 break;
6183 }
6184 break;
6185
a823923b
RH		 6186 case IA64_OPND_LDXMOV:
6187 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6188 fix->code = BFD_RELOC_IA64_LDXMOV;
6189 fix->opnd = idesc->operands[index];
6190 fix->expr = *e;
6191 fix->is_pcrel = 0;
6192 ++CURR_SLOT.num_fixups;
6193 return OPERAND_MATCH;
6194
800eeca4
JW		 6195 default:
6196 break;
6197 }
87f8eb97 6198 return OPERAND_MISMATCH;
800eeca4
JW		 6199}
6200
6201static int
e4e8248d 6202parse_operand (e, more)
800eeca4 6203 expressionS *e;
e4e8248d 6204 int more;
800eeca4
JW		 6205{
6206 int sep = '\0';
6207
6208 memset (e, 0, sizeof (*e));
6209 e->X_op = O_absent;
6210 SKIP_WHITESPACE ();
60d11e55 6211 expression_and_evaluate (e);
e4e8248d
JB		 6212 sep = *input_line_pointer;
6213 if (more && (sep == ',' || sep == more))
6214 ++input_line_pointer;
800eeca4
JW		 6215 return sep;
6216}
6217
6218/* Returns the next entry in the opcode table that matches the one in
6219 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6220 found, NULL is returned instead. */
800eeca4
JW		 6221
6222static struct ia64_opcode *
6223get_next_opcode (struct ia64_opcode *idesc)
6224{
6225 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6226 ia64_free_opcode (idesc);
6227 return next;
6228}
6229
6230/* Parse the operands for the opcode and find the opcode variant that
6231 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6232
6233static struct ia64_opcode *
800eeca4
JW		 6234parse_operands (idesc)
6235 struct ia64_opcode *idesc;
6236{
6237 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6238 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6239 int reg1, reg2;
6240 char reg_class;
800eeca4 6241 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6242 enum operand_match_result result;
800eeca4
JW		 6243 char mnemonic[129];
6244 char *first_arg = 0, *end, *saved_input_pointer;
6245 unsigned int sof;
6246
6247 assert (strlen (idesc->name) <= 128);
6248
6249 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6250 if (idesc->operands[2] == IA64_OPND_SOF
6251 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6252 {
6253 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6254 can't parse the first operand until we have parsed the
6255 remaining operands of the "alloc" instruction. */
6256 SKIP_WHITESPACE ();
6257 first_arg = input_line_pointer;
6258 end = strchr (input_line_pointer, '=');
6259 if (!end)
6260 {
6261 as_bad ("Expected separator `='");
6262 return 0;
6263 }
6264 input_line_pointer = end + 1;
6265 ++i;
6266 ++num_outputs;
6267 }
6268
d3156ecc 6269 for (; ; ++i)
800eeca4 6270 {
d3156ecc
JB		 6271 if (i < NELEMS (CURR_SLOT.opnd))
6272 {
e4e8248d 6273 sep = parse_operand (CURR_SLOT.opnd + i, '=');
d3156ecc
JB		 6274 if (CURR_SLOT.opnd[i].X_op == O_absent)
6275 break;
6276 }
6277 else
6278 {
6279 expressionS dummy;
6280
e4e8248d 6281 sep = parse_operand (&dummy, '=');
d3156ecc
JB		 6282 if (dummy.X_op == O_absent)
6283 break;
6284 }
800eeca4
JW		 6285
6286 ++num_operands;
6287
6288 if (sep != '=' && sep != ',')
6289 break;
6290
6291 if (sep == '=')
6292 {
6293 if (num_outputs > 0)
6294 as_bad ("Duplicate equal sign (=) in instruction");
6295 else
6296 num_outputs = i + 1;
6297 }
6298 }
6299 if (sep != '\0')
6300 {
6301 as_bad ("Illegal operand separator `%c'", sep);
6302 return 0;
6303 }
197865e8 6304
60b9a617
JB		 6305 if (idesc->operands[2] == IA64_OPND_SOF
6306 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4 6307 {
ef0241e7
JB		 6308 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6309 Note, however, that due to that mapping operand numbers in error
6310 messages for any of the constant operands will not be correct. */
800eeca4 6311 know (strcmp (idesc->name, "alloc") == 0);
ef0241e7
JB		 6312 /* The first operand hasn't been parsed/initialized, yet (but
6313 num_operands intentionally doesn't account for that). */
6314 i = num_operands > 4 ? 2 : 1;
6315#define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6316 ? CURR_SLOT.opnd[n].X_add_number \
6317 : 0)
6318 sof = set_regstack (FORCE_CONST(i),
6319 FORCE_CONST(i + 1),
6320 FORCE_CONST(i + 2),
6321 FORCE_CONST(i + 3));
6322#undef FORCE_CONST
6323
6324 /* now we can parse the first arg: */
6325 saved_input_pointer = input_line_pointer;
6326 input_line_pointer = first_arg;
6327 sep = parse_operand (CURR_SLOT.opnd + 0, '=');
6328 if (sep != '=')
6329 --num_outputs; /* force error */
6330 input_line_pointer = saved_input_pointer;
6331
6332 CURR_SLOT.opnd[i].X_add_number = sof;
6333 if (CURR_SLOT.opnd[i + 1].X_op == O_constant
6334 && CURR_SLOT.opnd[i + 2].X_op == O_constant)
6335 CURR_SLOT.opnd[i + 1].X_add_number
6336 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6337 else
6338 CURR_SLOT.opnd[i + 1].X_op = O_illegal;
6339 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6340 }
6341
d3156ecc 6342 highest_unmatched_operand = -4;
87f8eb97
JW		 6343 curr_out_of_range_pos = -1;
6344 error_pos = 0;
800eeca4
JW		 6345 for (; idesc; idesc = get_next_opcode (idesc))
6346 {
6347 if (num_outputs != idesc->num_outputs)
6348 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6349 if (highest_unmatched_operand < 0)
6350 highest_unmatched_operand |= 1;
6351 if (num_operands > NELEMS (idesc->operands)
6352 || (num_operands < NELEMS (idesc->operands)
6353 && idesc->operands[num_operands])
6354 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6355 continue; /* mismatch in number of arguments */
6356 if (highest_unmatched_operand < 0)
6357 highest_unmatched_operand |= 2;
800eeca4
JW		 6358
6359 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6360
6361 /* Try to match all operands. If we see an out-of-range operand,
6362 then continue trying to match the rest of the operands, since if
6363 the rest match, then this idesc will give the best error message. */
6364
6365 out_of_range_pos = -1;
800eeca4 6366 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6367 {
6368 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6369 if (result != OPERAND_MATCH)
6370 {
6371 if (result != OPERAND_OUT_OF_RANGE)
6372 break;
6373 if (out_of_range_pos < 0)
6374 /* remember position of the first out-of-range operand: */
6375 out_of_range_pos = i;
6376 }
6377 }
800eeca4 6378
87f8eb97
JW		 6379 /* If we did not match all operands, or if at least one operand was
6380 out-of-range, then this idesc does not match. Keep track of which
6381 idesc matched the most operands before failing. If we have two
6382 idescs that failed at the same position, and one had an out-of-range
6383 operand, then prefer the out-of-range operand. Thus if we have
6384 "add r0=0x1000000,r1" we get an error saying the constant is out
6385 of range instead of an error saying that the constant should have been
6386 a register. */
6387
6388 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6389 {
87f8eb97
JW		 6390 if (i > highest_unmatched_operand
6391 || (i == highest_unmatched_operand
6392 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6393 {
6394 highest_unmatched_operand = i;
87f8eb97
JW		 6395 if (out_of_range_pos >= 0)
6396 {
6397 expected_operand = idesc->operands[out_of_range_pos];
6398 error_pos = out_of_range_pos;
6399 }
6400 else
6401 {
6402 expected_operand = idesc->operands[i];
6403 error_pos = i;
6404 }
6405 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6406 }
6407 continue;
6408 }
6409
800eeca4
JW		 6410 break;
6411 }
6412 if (!idesc)
6413 {
6414 if (expected_operand)
6415 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6416 error_pos + 1, mnemonic,
800eeca4 6417 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6418 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6419 as_bad ("Wrong number of output operands");
6420 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6421 as_bad ("Wrong number of input operands");
800eeca4
JW		 6422 else
6423 as_bad ("Operand mismatch");
6424 return 0;
6425 }
4b09e828
JB		 6426
6427 /* Check that the instruction doesn't use
6428 - r0, f0, or f1 as output operands
6429 - the same predicate twice as output operands
6430 - r0 as address of a base update load or store
6431 - the same GR as output and address of a base update load
6432 - two even- or two odd-numbered FRs as output operands of a floating
6433 point parallel load.
6434 At most two (conflicting) output (or output-like) operands can exist,
6435 (floating point parallel loads have three outputs, but the base register,
6436 if updated, cannot conflict with the actual outputs). */
6437 reg2 = reg1 = -1;
6438 for (i = 0; i < num_operands; ++i)
6439 {
6440 int regno = 0;
6441
6442 reg_class = 0;
6443 switch (idesc->operands[i])
6444 {
6445 case IA64_OPND_R1:
6446 case IA64_OPND_R2:
6447 case IA64_OPND_R3:
6448 if (i < num_outputs)
6449 {
6450 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6451 reg_class = 'r';
6452 else if (reg1 < 0)
6453 reg1 = CURR_SLOT.opnd[i].X_add_number;
6454 else if (reg2 < 0)
6455 reg2 = CURR_SLOT.opnd[i].X_add_number;
6456 }
6457 break;
6458 case IA64_OPND_P1:
6459 case IA64_OPND_P2:
6460 if (i < num_outputs)
6461 {
6462 if (reg1 < 0)
6463 reg1 = CURR_SLOT.opnd[i].X_add_number;
6464 else if (reg2 < 0)
6465 reg2 = CURR_SLOT.opnd[i].X_add_number;
6466 }
6467 break;
6468 case IA64_OPND_F1:
6469 case IA64_OPND_F2:
6470 case IA64_OPND_F3:
6471 case IA64_OPND_F4:
6472 if (i < num_outputs)
6473 {
6474 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6475 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6476 {
6477 reg_class = 'f';
6478 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6479 }
6480 else if (reg1 < 0)
6481 reg1 = CURR_SLOT.opnd[i].X_add_number;
6482 else if (reg2 < 0)
6483 reg2 = CURR_SLOT.opnd[i].X_add_number;
6484 }
6485 break;
6486 case IA64_OPND_MR3:
6487 if (idesc->flags & IA64_OPCODE_POSTINC)
6488 {
6489 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6490 reg_class = 'm';
6491 else if (reg1 < 0)
6492 reg1 = CURR_SLOT.opnd[i].X_add_number;
6493 else if (reg2 < 0)
6494 reg2 = CURR_SLOT.opnd[i].X_add_number;
6495 }
6496 break;
6497 default:
6498 break;
6499 }
6500 switch (reg_class)
6501 {
6502 case 0:
6503 break;
6504 default:
6505 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6506 break;
6507 case 'm':
6508 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6509 break;
6510 }
6511 }
6512 if (reg1 == reg2)
6513 {
6514 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6515 {
6516 reg1 -= REG_GR;
6517 reg_class = 'r';
6518 }
6519 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6520 {
6521 reg1 -= REG_P;
6522 reg_class = 'p';
6523 }
6524 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6525 {
6526 reg1 -= REG_FR;
6527 reg_class = 'f';
6528 }
6529 else
6530 reg_class = 0;
6531 if (reg_class)
6532 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6533 }
6534 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6535 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6536 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6537 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6538 && ! ((reg1 ^ reg2) & 1))
6539 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6540 reg1 - REG_FR, reg2 - REG_FR);
6541 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6542 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6543 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6544 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6545 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6546 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6547 return idesc;
6548}
6549
6550static void
6551build_insn (slot, insnp)
6552 struct slot *slot;
6553 bfd_vma *insnp;
6554{
6555 const struct ia64_operand *odesc, *o2desc;
6556 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6557 bfd_vma insn;
6558 bfd_signed_vma val;
800eeca4
JW		 6559 const char *err;
6560 int i;
6561
6562 insn = idesc->opcode | slot->qp_regno;
6563
6564 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6565 {
c67e42c9
RH		 6566 if (slot->opnd[i].X_op == O_register
6567 || slot->opnd[i].X_op == O_constant
6568 || slot->opnd[i].X_op == O_index)
6569 val = slot->opnd[i].X_add_number;
6570 else if (slot->opnd[i].X_op == O_big)
800eeca4 6571 {
c67e42c9
RH		 6572 /* This must be the value 0x10000000000000000. */
6573 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6574 val = 0;
6575 }
6576 else
6577 val = 0;
6578
6579 switch (idesc->operands[i])
6580 {
6581 case IA64_OPND_IMMU64:
800eeca4
JW		 6582 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6583 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6584 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6585 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6586 continue;
6587
6588 case IA64_OPND_IMMU62:
542d6675
KH		 6589 val &= 0x3fffffffffffffffULL;
6590 if (val != slot->opnd[i].X_add_number)
6591 as_warn (_("Value truncated to 62 bits"));
6592 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6593 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6594 continue;
800eeca4 6595
c67e42c9
RH		 6596 case IA64_OPND_TGT64:
6597 val >>= 4;
6598 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6599 insn |= ((((val >> 59) & 0x1) << 36)
6600 | (((val >> 0) & 0xfffff) << 13));
6601 continue;
800eeca4 6602
c67e42c9
RH		 6603 case IA64_OPND_AR3:
6604 val -= REG_AR;
6605 break;
6606
6607 case IA64_OPND_B1:
6608 case IA64_OPND_B2:
6609 val -= REG_BR;
6610 break;
6611
6612 case IA64_OPND_CR3:
6613 val -= REG_CR;
6614 break;
6615
6616 case IA64_OPND_F1:
6617 case IA64_OPND_F2:
6618 case IA64_OPND_F3:
6619 case IA64_OPND_F4:
6620 val -= REG_FR;
6621 break;
6622
6623 case IA64_OPND_P1:
6624 case IA64_OPND_P2:
6625 val -= REG_P;
6626 break;
6627
6628 case IA64_OPND_R1:
6629 case IA64_OPND_R2:
6630 case IA64_OPND_R3:
6631 case IA64_OPND_R3_2:
6632 case IA64_OPND_CPUID_R3:
6633 case IA64_OPND_DBR_R3:
6634 case IA64_OPND_DTR_R3:
6635 case IA64_OPND_ITR_R3:
6636 case IA64_OPND_IBR_R3:
6637 case IA64_OPND_MR3:
6638 case IA64_OPND_MSR_R3:
6639 case IA64_OPND_PKR_R3:
6640 case IA64_OPND_PMC_R3:
6641 case IA64_OPND_PMD_R3:
197865e8 6642 case IA64_OPND_RR_R3:
c67e42c9
RH		 6643 val -= REG_GR;
6644 break;
6645
6646 default:
6647 break;
6648 }
6649
6650 odesc = elf64_ia64_operands + idesc->operands[i];
6651 err = (*odesc->insert) (odesc, val, &insn);
6652 if (err)
6653 as_bad_where (slot->src_file, slot->src_line,
6654 "Bad operand value: %s", err);
6655 if (idesc->flags & IA64_OPCODE_PSEUDO)
6656 {
6657 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6658 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6659 {
6660 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6661 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6662 }
c67e42c9
RH		 6663 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6664 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6665 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6666 {
c67e42c9
RH		 6667 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6668 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6669 }
6670 }
6671 }
6672 *insnp = insn;
6673}
6674
6675static void
6676emit_one_bundle ()
6677{
f4660e2c 6678 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6679 enum ia64_unit required_unit, insn_unit = 0;
6680 enum ia64_insn_type type[3], insn_type;
6681 unsigned int template, orig_template;
542d6675 6682 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6683 struct ia64_opcode *idesc;
6684 int end_of_insn_group = 0, user_template = -1;
9b505842 6685 int n, i, j, first, curr, last_slot;
800eeca4
JW		 6686 bfd_vma t0 = 0, t1 = 0;
6687 struct label_fix *lfix;
07a53e5c 6688 bfd_boolean mark_label;
800eeca4
JW		 6689 struct insn_fix *ifix;
6690 char mnemonic[16];
6691 fixS *fix;
6692 char *f;
5a9ff93d 6693 int addr_mod;
800eeca4
JW		 6694
6695 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6696 know (first >= 0 & first < NUM_SLOTS);
6697 n = MIN (3, md.num_slots_in_use);
6698
6699 /* Determine template: user user_template if specified, best match
542d6675 6700 otherwise: */
800eeca4
JW		 6701
6702 if (md.slot[first].user_template >= 0)
6703 user_template = template = md.slot[first].user_template;
6704 else
6705 {
032efc85 6706 /* Auto select appropriate template. */
800eeca4
JW		 6707 memset (type, 0, sizeof (type));
6708 curr = first;
6709 for (i = 0; i < n; ++i)
6710 {
032efc85
RH		 6711 if (md.slot[curr].label_fixups && i != 0)
6712 break;
800eeca4
JW		 6713 type[i] = md.slot[curr].idesc->type;
6714 curr = (curr + 1) % NUM_SLOTS;
6715 }
6716 template = best_template[type[0]][type[1]][type[2]];
6717 }
6718
542d6675 6719 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6720 for (i = 0; i < 3; ++i)
6721 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6722
6723 f = frag_more (16);
6724
5a9ff93d
JW		 6725 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6726 from the start of the frag. */
6727 addr_mod = frag_now_fix () & 15;
6728 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6729 as_bad (_("instruction address is not a multiple of 16"));
6730 frag_now->insn_addr = addr_mod;
6731 frag_now->has_code = 1;
6732
542d6675 6733 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6734 curr = first;
6735 idesc = md.slot[curr].idesc;
6736 end_of_insn_group = 0;
9b505842 6737 last_slot = -1;
800eeca4
JW		 6738 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6739 {
d6e78c11 6740 /* If we have unwind records, we may need to update some now. */
75214fb0
JB		 6741 unw_rec_list *ptr = md.slot[curr].unwind_record;
6742 unw_rec_list *end_ptr = NULL;
6743
d6e78c11
JW		 6744 if (ptr)
6745 {
6746 /* Find the last prologue/body record in the list for the current
6747 insn, and set the slot number for all records up to that point.
6748 This needs to be done now, because prologue/body records refer to
6749 the current point, not the point after the instruction has been
6750 issued. This matters because there may have been nops emitted
6751 meanwhile. Any non-prologue non-body record followed by a
6752 prologue/body record must also refer to the current point. */
75214fb0
JB		 6753 unw_rec_list *last_ptr;
6754
6755 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j)
6756 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record;
6757 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next)
d6e78c11
JW		 6758 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6759 || ptr->r.type == body)
6760 last_ptr = ptr;
6761 if (last_ptr)
6762 {
6763 /* Make last_ptr point one after the last prologue/body
6764 record. */
6765 last_ptr = last_ptr->next;
6766 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6767 ptr = ptr->next)
6768 {
6769 ptr->slot_number = (unsigned long) f + i;
6770 ptr->slot_frag = frag_now;
6771 }
6772 /* Remove the initialized records, so that we won't accidentally
6773 update them again if we insert a nop and continue. */
6774 md.slot[curr].unwind_record = last_ptr;
6775 }
6776 }
e0c9811a 6777
f4660e2c
JB		 6778 manual_bundling_off = md.slot[curr].manual_bundling_off;
6779 if (md.slot[curr].manual_bundling_on)
800eeca4 6780 {
f4660e2c
JB		 6781 if (curr == first)
6782 manual_bundling = 1;
800eeca4 6783 else
f4660e2c
JB		 6784 break; /* Need to start a new bundle. */
6785 }
6786
744b6414
JW		 6787 /* If this instruction specifies a template, then it must be the first
6788 instruction of a bundle. */
6789 if (curr != first && md.slot[curr].user_template >= 0)
6790 break;
6791
f4660e2c
JB		 6792 if (idesc->flags & IA64_OPCODE_SLOT2)
6793 {
6794 if (manual_bundling && !manual_bundling_off)
6795 {
6796 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6797 "`%s' must be last in bundle", idesc->name);
6798 if (i < 2)
6799 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6800 }
6801 i = 2;
800eeca4
JW		 6802 }
6803 if (idesc->flags & IA64_OPCODE_LAST)
6804 {
2434f565
JW		 6805 int required_slot;
6806 unsigned int required_template;
800eeca4
JW		 6807
6808 /* If we need a stop bit after an M slot, our only choice is
6809 template 5 (M;;MI). If we need a stop bit after a B
6810 slot, our only choice is to place it at the end of the
6811 bundle, because the only available templates are MIB,
6812 MBB, BBB, MMB, and MFB. We don't handle anything other
6813 than M and B slots because these are the only kind of
6814 instructions that can have the IA64_OPCODE_LAST bit set. */
6815 required_template = template;
6816 switch (idesc->type)
6817 {
6818 case IA64_TYPE_M:
6819 required_slot = 0;
6820 required_template = 5;
6821 break;
6822
6823 case IA64_TYPE_B:
6824 required_slot = 2;
6825 break;
6826
6827 default:
6828 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6829 "Internal error: don't know how to force %s to end"
6830 "of instruction group", idesc->name);
6831 required_slot = i;
6832 break;
6833 }
f4660e2c
JB		 6834 if (manual_bundling
6835 && (i > required_slot
6836 || (required_slot == 2 && !manual_bundling_off)
6837 || (user_template >= 0
6838 /* Changing from MMI to M;MI is OK. */
6839 && (template ^ required_template) > 1)))
6840 {
6841 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6842 "`%s' must be last in instruction group",
6843 idesc->name);
6844 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6845 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6846 }
800eeca4
JW		 6847 if (required_slot < i)
6848 /* Can't fit this instruction. */
6849 break;
6850
6851 i = required_slot;
6852 if (required_template != template)
6853 {
6854 /* If we switch the template, we need to reset the NOPs
6855 after slot i. The slot-types of the instructions ahead
6856 of i never change, so we don't need to worry about
6857 changing NOPs in front of this slot. */
6858 for (j = i; j < 3; ++j)
6859 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6860 }
6861 template = required_template;
6862 }
6863 if (curr != first && md.slot[curr].label_fixups)
6864 {
f4660e2c
JB		 6865 if (manual_bundling)
6866 {
6867 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6868 "Label must be first in a bundle");
f4660e2c
JB		 6869 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6870 }
800eeca4
JW		 6871 /* This insn must go into the first slot of a bundle. */
6872 break;
6873 }
6874
800eeca4
JW		 6875 if (end_of_insn_group && md.num_slots_in_use >= 1)
6876 {
6877 /* We need an instruction group boundary in the middle of a
6878 bundle. See if we can switch to an other template with
6879 an appropriate boundary. */
6880
6881 orig_template = template;
6882 if (i == 1 && (user_template == 4
6883 || (user_template < 0
6884 && (ia64_templ_desc[template].exec_unit[0]
6885 == IA64_UNIT_M))))
6886 {
6887 template = 5;
6888 end_of_insn_group = 0;
6889 }
6890 else if (i == 2 && (user_template == 0
6891 || (user_template < 0
6892 && (ia64_templ_desc[template].exec_unit[1]
6893 == IA64_UNIT_I)))
6894 /* This test makes sure we don't switch the template if
6895 the next instruction is one that needs to be first in
6896 an instruction group. Since all those instructions are
6897 in the M group, there is no way such an instruction can
6898 fit in this bundle even if we switch the template. The
6899 reason we have to check for this is that otherwise we
6900 may end up generating "MI;;I M.." which has the deadly
6901 effect that the second M instruction is no longer the
f4660e2c 6902 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6903 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6904 {
6905 template = 1;
6906 end_of_insn_group = 0;
6907 }
f4660e2c
JB		 6908 else if (i == 1
6909 && user_template == 0
6910 && !(idesc->flags & IA64_OPCODE_FIRST))
6911 /* Use the next slot. */
6912 continue;
800eeca4
JW		 6913 else if (curr != first)
6914 /* can't fit this insn */
6915 break;
6916
6917 if (template != orig_template)
6918 /* if we switch the template, we need to reset the NOPs
6919 after slot i. The slot-types of the instructions ahead
6920 of i never change, so we don't need to worry about
6921 changing NOPs in front of this slot. */
6922 for (j = i; j < 3; ++j)
6923 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6924 }
6925 required_unit = ia64_templ_desc[template].exec_unit[i];
6926
c10d9d8f 6927 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6928 if (idesc->type == IA64_TYPE_DYN)
6929 {
97762d08
JB		 6930 enum ia64_opnd opnd1, opnd2;
6931
800eeca4
JW		 6932 if ((strcmp (idesc->name, "nop") == 0)
6933 || (strcmp (idesc->name, "break") == 0))
6934 insn_unit = required_unit;
91d777ee
L		 6935 else if (strcmp (idesc->name, "hint") == 0)
6936 {
6937 insn_unit = required_unit;
6938 if (required_unit == IA64_UNIT_B)
6939 {
6940 switch (md.hint_b)
6941 {
6942 case hint_b_ok:
6943 break;
6944 case hint_b_warning:
6945 as_warn ("hint in B unit may be treated as nop");
6946 break;
6947 case hint_b_error:
6948 /* When manual bundling is off and there is no
6949 user template, we choose a different unit so
6950 that hint won't go into the current slot. We
6951 will fill the current bundle with nops and
6952 try to put hint into the next bundle. */
6953 if (!manual_bundling && user_template < 0)
6954 insn_unit = IA64_UNIT_I;
6955 else
6956 as_bad ("hint in B unit can't be used");
6957 break;
6958 }
6959 }
6960 }
97762d08
JB		 6961 else if (strcmp (idesc->name, "chk.s") == 0
6962 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6963 {
6964 insn_unit = IA64_UNIT_M;
97762d08
JB		 6965 if (required_unit == IA64_UNIT_I
6966 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6967 insn_unit = IA64_UNIT_I;
6968 }
6969 else
6970 as_fatal ("emit_one_bundle: unexpected dynamic op");
6971
09124b3f 6972 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6973 opnd1 = idesc->operands[0];
6974 opnd2 = idesc->operands[1];
3d56ab85 6975 ia64_free_opcode (idesc);
97762d08
JB		 6976 idesc = ia64_find_opcode (mnemonic);
6977 /* moves to/from ARs have collisions */
6978 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6979 {
6980 while (idesc != NULL
6981 && (idesc->operands[0] != opnd1
6982 || idesc->operands[1] != opnd2))
6983 idesc = get_next_opcode (idesc);
6984 }
97762d08 6985 md.slot[curr].idesc = idesc;
800eeca4
JW		 6986 }
6987 else
6988 {
6989 insn_type = idesc->type;
6990 insn_unit = IA64_UNIT_NIL;
6991 switch (insn_type)
6992 {
6993 case IA64_TYPE_A:
6994 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6995 insn_unit = required_unit;
6996 break;
542d6675 6997 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6998 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6999 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
7000 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
7001 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
7002 default: break;
7003 }
7004 }
7005
7006 if (insn_unit != required_unit)
9b505842 7007 continue; /* Try next slot. */
800eeca4 7008
07a53e5c
RH		 7009 /* Now is a good time to fix up the labels for this insn. */
7010 mark_label = FALSE;
7011 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
7012 {
7013 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
7014 symbol_set_frag (lfix->sym, frag_now);
7015 mark_label |= lfix->dw2_mark_labels;
7016 }
7017 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
7018 {
7019 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
7020 symbol_set_frag (lfix->sym, frag_now);
7021 }
7022
7023 if (debug_type == DEBUG_DWARF2
7024 || md.slot[curr].loc_directive_seen
7025 || mark_label)
196e8040
JW		 7026 {
7027 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 7028
196e8040 7029 md.slot[curr].loc_directive_seen = 0;
07a53e5c
RH		 7030 if (mark_label)
7031 md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
7032
196e8040
JW		 7033 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
7034 }
800eeca4
JW		 7035
7036 build_insn (md.slot + curr, insn + i);
7037
d6e78c11
JW		 7038 ptr = md.slot[curr].unwind_record;
7039 if (ptr)
7040 {
7041 /* Set slot numbers for all remaining unwind records belonging to the
7042 current insn. There can not be any prologue/body unwind records
7043 here. */
d6e78c11
JW		 7044 for (; ptr != end_ptr; ptr = ptr->next)
7045 {
7046 ptr->slot_number = (unsigned long) f + i;
7047 ptr->slot_frag = frag_now;
7048 }
7049 md.slot[curr].unwind_record = NULL;
7050 }
10850f29 7051
800eeca4
JW		 7052 if (required_unit == IA64_UNIT_L)
7053 {
7054 know (i == 1);
7055 /* skip one slot for long/X-unit instructions */
7056 ++i;
7057 }
7058 --md.num_slots_in_use;
9b505842 7059 last_slot = i;
800eeca4 7060
800eeca4
JW		 7061 for (j = 0; j < md.slot[curr].num_fixups; ++j)
7062 {
7063 ifix = md.slot[curr].fixup + j;
5a080f89 7064 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 7065 &ifix->expr, ifix->is_pcrel, ifix->code);
7066 fix->tc_fix_data.opnd = ifix->opnd;
7067 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
7068 fix->fx_file = md.slot[curr].src_file;
7069 fix->fx_line = md.slot[curr].src_line;
7070 }
7071
7072 end_of_insn_group = md.slot[curr].end_of_insn_group;
7073
542d6675 7074 /* clear slot: */
800eeca4
JW		 7075 ia64_free_opcode (md.slot[curr].idesc);
7076 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7077 md.slot[curr].user_template = -1;
7078
7079 if (manual_bundling_off)
7080 {
7081 manual_bundling = 0;
7082 break;
7083 }
7084 curr = (curr + 1) % NUM_SLOTS;
7085 idesc = md.slot[curr].idesc;
7086 }
f4660e2c 7087 if (manual_bundling > 0)
800eeca4
JW		 7088 {
7089 if (md.num_slots_in_use > 0)
ac025970 7090 {
9b505842
JB		 7091 if (last_slot >= 2)
7092 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7093 "`%s' does not fit into bundle", idesc->name);
7094 else if (last_slot < 0)
7095 {
7096 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7097 "`%s' does not fit into %s template",
7098 idesc->name, ia64_templ_desc[template].name);
7099 /* Drop first insn so we don't livelock. */
7100 --md.num_slots_in_use;
7101 know (curr == first);
7102 ia64_free_opcode (md.slot[curr].idesc);
7103 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7104 md.slot[curr].user_template = -1;
7105 }
7106 else
7107 {
7108 const char *where;
7109
7110 if (template == 2)
7111 where = "X slot";
7112 else if (last_slot == 0)
7113 where = "slots 2 or 3";
7114 else
7115 where = "slot 3";
7116 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7117 "`%s' can't go in %s of %s template",
7118 idesc->name, where, ia64_templ_desc[template].name);
7119 }
ac025970 7120 }
800eeca4
JW		 7121 else
7122 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7123 "Missing '}' at end of file");
7124 }
7125 know (md.num_slots_in_use < NUM_SLOTS);
7126
7127 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
7128 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
7129
44f5c83a
JW		 7130 number_to_chars_littleendian (f + 0, t0, 8);
7131 number_to_chars_littleendian (f + 8, t1, 8);
800eeca4
JW		 7132}
7133
7134int
7135md_parse_option (c, arg)
7136 int c;
7137 char *arg;
7138{
7463c317 7139
800eeca4
JW		 7140 switch (c)
7141 {
c43c2cc5 7142 /* Switches from the Intel assembler. */
44f5c83a 7143 case 'm':
800eeca4
JW		 7144 if (strcmp (arg, "ilp64") == 0
7145 || strcmp (arg, "lp64") == 0
7146 || strcmp (arg, "p64") == 0)
7147 {
7148 md.flags |= EF_IA_64_ABI64;
7149 }
7150 else if (strcmp (arg, "ilp32") == 0)
7151 {
7152 md.flags &= ~EF_IA_64_ABI64;
7153 }
7154 else if (strcmp (arg, "le") == 0)
7155 {
7156 md.flags &= ~EF_IA_64_BE;
549f748d 7157 default_big_endian = 0;
800eeca4
JW		 7158 }
7159 else if (strcmp (arg, "be") == 0)
7160 {
7161 md.flags |= EF_IA_64_BE;
549f748d 7162 default_big_endian = 1;
800eeca4 7163 }
970d6792
L		 7164 else if (strncmp (arg, "unwind-check=", 13) == 0)
7165 {
7166 arg += 13;
7167 if (strcmp (arg, "warning") == 0)
7168 md.unwind_check = unwind_check_warning;
7169 else if (strcmp (arg, "error") == 0)
7170 md.unwind_check = unwind_check_error;
7171 else
7172 return 0;
7173 }
91d777ee
L		 7174 else if (strncmp (arg, "hint.b=", 7) == 0)
7175 {
7176 arg += 7;
7177 if (strcmp (arg, "ok") == 0)
7178 md.hint_b = hint_b_ok;
7179 else if (strcmp (arg, "warning") == 0)
7180 md.hint_b = hint_b_warning;
7181 else if (strcmp (arg, "error") == 0)
7182 md.hint_b = hint_b_error;
7183 else
7184 return 0;
7185 }
8c2fda1d
L		 7186 else if (strncmp (arg, "tune=", 5) == 0)
7187 {
7188 arg += 5;
7189 if (strcmp (arg, "itanium1") == 0)
7190 md.tune = itanium1;
7191 else if (strcmp (arg, "itanium2") == 0)
7192 md.tune = itanium2;
7193 else
7194 return 0;
7195 }
800eeca4
JW		 7196 else
7197 return 0;
7198 break;
7199
7200 case 'N':
7201 if (strcmp (arg, "so") == 0)
7202 {
542d6675 7203 /* Suppress signon message. */
800eeca4
JW		 7204 }
7205 else if (strcmp (arg, "pi") == 0)
7206 {
7207 /* Reject privileged instructions. FIXME */
7208 }
7209 else if (strcmp (arg, "us") == 0)
7210 {
7211 /* Allow union of signed and unsigned range. FIXME */
7212 }
7213 else if (strcmp (arg, "close_fcalls") == 0)
7214 {
7215 /* Do not resolve global function calls. */
7216 }
7217 else
7218 return 0;
7219 break;
7220
7221 case 'C':
7222 /* temp[="prefix"] Insert temporary labels into the object file
7223 symbol table prefixed by "prefix".
7224 Default prefix is ":temp:".
7225 */
7226 break;
7227
7228 case 'a':
800eeca4
JW		 7229 /* indirect=<tgt> Assume unannotated indirect branches behavior
7230 according to <tgt> --
7231 exit: branch out from the current context (default)
7232 labels: all labels in context may be branch targets
7233 */
85b40035
L		 7234 if (strncmp (arg, "indirect=", 9) != 0)
7235 return 0;
800eeca4
JW		 7236 break;
7237
7238 case 'x':
7239 /* -X conflicts with an ignored option, use -x instead */
7240 md.detect_dv = 1;
7241 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7242 {
7243 /* set default mode to explicit */
7244 md.default_explicit_mode = 1;
7245 break;
7246 }
800eeca4 7247 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7248 {
7249 md.default_explicit_mode = 0;
7250 }
f1dab70d
JB		 7251 else if (strcmp (arg, "none") == 0)
7252 {
7253 md.detect_dv = 0;
7254 }
800eeca4 7255 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7256 {
7257 md.debug_dv = 1;
7258 }
800eeca4 7259 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7260 {
7261 md.default_explicit_mode = 1;
7262 md.debug_dv = 1;
7263 }
f1dab70d
JB		 7264 else if (strcmp (arg, "debugn") == 0)
7265 {
7266 md.debug_dv = 1;
7267 md.detect_dv = 0;
7268 }
800eeca4 7269 else
542d6675
KH		 7270 {
7271 as_bad (_("Unrecognized option '-x%s'"), arg);
7272 }
800eeca4
JW		 7273 break;
7274
7275 case 'S':
7276 /* nops Print nops statistics. */
7277 break;
7278
c43c2cc5
JW		 7279 /* GNU specific switches for gcc. */
7280 case OPTION_MCONSTANT_GP:
7281 md.flags |= EF_IA_64_CONS_GP;
7282 break;
7283
7284 case OPTION_MAUTO_PIC:
7285 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7286 break;
7287
800eeca4
JW		 7288 default:
7289 return 0;
7290 }
7291
7292 return 1;
7293}
7294
7295void
7296md_show_usage (stream)
7297 FILE *stream;
7298{
542d6675 7299 fputs (_("\
800eeca4 7300IA-64 options:\n\
6290819d
NC		 7301 --mconstant-gp mark output file as using the constant-GP model\n\
7302 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7303 --mauto-pic mark output file as using the constant-GP model\n\
7304 without function descriptors (sets ELF header flag\n\
7305 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7306 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7307 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
8c2fda1d
L		 7308 -mtune=[itanium1|itanium2]\n\
7309 tune for a specific CPU (default -mtune=itanium2)\n\
970d6792
L		 7310 -munwind-check=[warning|error]\n\
7311 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7312 -mhint.b=[ok|warning|error]\n\
7313 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7314 -x | -xexplicit turn on dependency violation checking\n\
7315 -xauto automagically remove dependency violations (default)\n\
7316 -xnone turn off dependency violation checking\n\
7317 -xdebug debug dependency violation checker\n\
7318 -xdebugn debug dependency violation checker but turn off\n\
7319 dependency violation checking\n\
7320 -xdebugx debug dependency violation checker and turn on\n\
7321 dependency violation checking\n"),
800eeca4
JW		 7322 stream);
7323}
7324
acebd4ce
AS		 7325void
7326ia64_after_parse_args ()
7327{
7328 if (debug_type == DEBUG_STABS)
7329 as_fatal (_("--gstabs is not supported for ia64"));
7330}
7331
44576e1f
RH		 7332/* Return true if TYPE fits in TEMPL at SLOT. */
7333
7334static int
800eeca4
JW		 7335match (int templ, int type, int slot)
7336{
7337 enum ia64_unit unit;
7338 int result;
7339
7340 unit = ia64_templ_desc[templ].exec_unit[slot];
7341 switch (type)
7342 {
7343 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7344 case IA64_TYPE_A:
7345 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7346 break;
7347 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7348 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7349 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7350 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7351 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7352 default: result = 0; break;
7353 }
7354 return result;
7355}
7356
7c06efaa
JW		 7357/* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7358 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7359 type M or I would fit in TEMPL at SLOT. */
44576e1f
RH		 7360
7361static inline int
7362extra_goodness (int templ, int slot)
7363{
8c2fda1d
L		 7364 switch (md.tune)
7365 {
7366 case itanium1:
7367 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7368 return 2;
7369 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7370 return 1;
7371 else
7372 return 0;
7373 break;
7374 case itanium2:
7375 if (match (templ, IA64_TYPE_M, slot)
7376 || match (templ, IA64_TYPE_I, slot))
7377 /* Favor M- and I-unit NOPs. We definitely want to avoid
7378 F-unit and B-unit may cause split-issue or less-than-optimal
7379 branch-prediction. */
7380 return 2;
7381 else
7382 return 0;
7383 break;
7384 default:
7385 abort ();
7386 return 0;
7387 }
44576e1f
RH		 7388}
7389
800eeca4
JW		 7390/* This function is called once, at assembler startup time. It sets
7391 up all the tables, etc. that the MD part of the assembler will need
7392 that can be determined before arguments are parsed. */
7393void
7394md_begin ()
7395{
8b84be9d 7396 int i, j, k, t, goodness, best, ok;
800eeca4
JW		 7397 const char *err;
7398 char name[8];
7399
7400 md.auto_align = 1;
7401 md.explicit_mode = md.default_explicit_mode;
7402
7403 bfd_set_section_alignment (stdoutput, text_section, 4);
7404
0234cb7c 7405 /* Make sure function pointers get initialized. */
10a98291 7406 target_big_endian = -1;
549f748d 7407 dot_byteorder (default_big_endian);
10a98291 7408
35f5df7f
L		 7409 alias_hash = hash_new ();
7410 alias_name_hash = hash_new ();
7411 secalias_hash = hash_new ();
7412 secalias_name_hash = hash_new ();
7413
13ae64f3
JJ		 7414 pseudo_func[FUNC_DTP_MODULE].u.sym =
7415 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7416 &zero_address_frag);
7417
7418 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7419 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7420 &zero_address_frag);
7421
800eeca4 7422 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7423 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7424 &zero_address_frag);
800eeca4
JW		 7425
7426 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7427 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7428 &zero_address_frag);
800eeca4
JW		 7429
7430 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7431 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7432 &zero_address_frag);
800eeca4 7433
fa2c7eff
RH		 7434 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7435 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7436 &zero_address_frag);
7437
c67e42c9 7438 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7439 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7440 &zero_address_frag);
c67e42c9 7441
800eeca4 7442 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7443 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7444 &zero_address_frag);
800eeca4
JW		 7445
7446 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7447 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7448 &zero_address_frag);
800eeca4
JW		 7449
7450 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7451 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7452 &zero_address_frag);
800eeca4 7453
13ae64f3
JJ		 7454 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7455 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7456 &zero_address_frag);
7457
800eeca4 7458 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7459 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7460 &zero_address_frag);
800eeca4
JW		 7461
7462 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7463 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7464 &zero_address_frag);
800eeca4 7465
13ae64f3
JJ		 7466 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7467 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7468 &zero_address_frag);
7469
7470 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7471 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7472 &zero_address_frag);
7473
7474 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7475 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7476 &zero_address_frag);
7477
3969b680
RH		 7478 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7479 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7480 &zero_address_frag);
7481
f6fe78d6
JW		 7482 if (md.tune != itanium1)
7483 {
7484 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7485 le_nop[0] = 0x8;
7486 le_nop_stop[0] = 0x9;
7487 }
7488
197865e8 7489 /* Compute the table of best templates. We compute goodness as a
8c2fda1d
L		 7490 base 4 value, in which each match counts for 3. Match-failures
7491 result in NOPs and we use extra_goodness() to pick the execution
7492 units that are best suited for issuing the NOP. */
800eeca4
JW		 7493 for (i = 0; i < IA64_NUM_TYPES; ++i)
7494 for (j = 0; j < IA64_NUM_TYPES; ++j)
7495 for (k = 0; k < IA64_NUM_TYPES; ++k)
7496 {
7497 best = 0;
7498 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7499 {
7500 goodness = 0;
7501 if (match (t, i, 0))
7502 {
7503 if (match (t, j, 1))
7504 {
286cee81 7505 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2))
44576e1f 7506 goodness = 3 + 3 + 3;
800eeca4 7507 else
44576e1f 7508 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7509 }
7510 else if (match (t, j, 2))
44576e1f 7511 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7512 else
44576e1f
RH		 7513 {
7514 goodness = 3;
7515 goodness += extra_goodness (t, 1);
7516 goodness += extra_goodness (t, 2);
7517 }
800eeca4
JW		 7518 }
7519 else if (match (t, i, 1))
7520 {
286cee81 7521 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2))
44576e1f 7522 goodness = 3 + 3;
800eeca4 7523 else
44576e1f 7524 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7525 }
7526 else if (match (t, i, 2))
44576e1f 7527 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7528
7529 if (goodness > best)
7530 {
7531 best = goodness;
7532 best_template[i][j][k] = t;
7533 }
7534 }
7535 }
7536
7c06efaa
JW		 7537#ifdef DEBUG_TEMPLATES
7538 /* For debugging changes to the best_template calculations. We don't care
7539 about combinations with invalid instructions, so start the loops at 1. */
7540 for (i = 0; i < IA64_NUM_TYPES; ++i)
7541 for (j = 0; j < IA64_NUM_TYPES; ++j)
7542 for (k = 0; k < IA64_NUM_TYPES; ++k)
7543 {
7544 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f',
7545 'x', 'd' };
7546 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j],
7547 type_letter[k],
7548 ia64_templ_desc[best_template[i][j][k]].name);
7549 }
7550#endif
7551
800eeca4
JW		 7552 for (i = 0; i < NUM_SLOTS; ++i)
7553 md.slot[i].user_template = -1;
7554
7555 md.pseudo_hash = hash_new ();
7556 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7557 {
7558 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7559 (void *) (pseudo_opcode + i));
7560 if (err)
7561 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7562 pseudo_opcode[i].name, err);
7563 }
7564
7565 md.reg_hash = hash_new ();
7566 md.dynreg_hash = hash_new ();
7567 md.const_hash = hash_new ();
7568 md.entry_hash = hash_new ();
7569
542d6675 7570 /* general registers: */
8b84be9d
JB		 7571 declare_register_set ("r", 128, REG_GR);
7572 declare_register ("gp", REG_GR + 1);
7573 declare_register ("sp", REG_GR + 12);
7574 declare_register ("tp", REG_GR + 13);
7575 declare_register_set ("ret", 4, REG_GR + 8);
800eeca4 7576
542d6675 7577 /* floating point registers: */
8b84be9d
JB		 7578 declare_register_set ("f", 128, REG_FR);
7579 declare_register_set ("farg", 8, REG_FR + 8);
7580 declare_register_set ("fret", 8, REG_FR + 8);
800eeca4 7581
542d6675 7582 /* branch registers: */
8b84be9d
JB		 7583 declare_register_set ("b", 8, REG_BR);
7584 declare_register ("rp", REG_BR + 0);
800eeca4 7585
8b84be9d
JB		 7586 /* predicate registers: */
7587 declare_register_set ("p", 64, REG_P);
7588 declare_register ("pr", REG_PR);
7589 declare_register ("pr.rot", REG_PR_ROT);
800eeca4 7590
8b84be9d
JB		 7591 /* application registers: */
7592 declare_register_set ("ar", 128, REG_AR);
5e0bd176
JB		 7593 for (i = 0; i < NELEMS (ar); ++i)
7594 declare_register (ar[i].name, REG_AR + ar[i].regnum);
800eeca4 7595
8b84be9d
JB		 7596 /* control registers: */
7597 declare_register_set ("cr", 128, REG_CR);
5e0bd176
JB		 7598 for (i = 0; i < NELEMS (cr); ++i)
7599 declare_register (cr[i].name, REG_CR + cr[i].regnum);
800eeca4 7600
8b84be9d
JB		 7601 declare_register ("ip", REG_IP);
7602 declare_register ("cfm", REG_CFM);
7603 declare_register ("psr", REG_PSR);
7604 declare_register ("psr.l", REG_PSR_L);
7605 declare_register ("psr.um", REG_PSR_UM);
7606
7607 for (i = 0; i < NELEMS (indirect_reg); ++i)
7608 {
7609 unsigned int regnum = indirect_reg[i].regnum;
7610
7611 md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum);
7612 }
800eeca4 7613
542d6675 7614 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7615 declare_register ("psp", REG_PSP);
7616
800eeca4
JW		 7617 for (i = 0; i < NELEMS (const_bits); ++i)
7618 {
7619 err = hash_insert (md.const_hash, const_bits[i].name,
7620 (PTR) (const_bits + i));
7621 if (err)
7622 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7623 name, err);
7624 }
7625
44f5c83a
JW		 7626 /* Set the architecture and machine depending on defaults and command line
7627 options. */
7628 if (md.flags & EF_IA_64_ABI64)
7629 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7630 else
7631 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7632
7633 if (! ok)
7634 as_warn (_("Could not set architecture and machine"));
800eeca4 7635
557debba
JW		 7636 /* Set the pointer size and pointer shift size depending on md.flags */
7637
7638 if (md.flags & EF_IA_64_ABI64)
7639 {
7640 md.pointer_size = 8; /* pointers are 8 bytes */
7641 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7642 }
7643 else
7644 {
7645 md.pointer_size = 4; /* pointers are 4 bytes */
7646 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7647 }
7648
800eeca4
JW		 7649 md.mem_offset.hint = 0;
7650 md.path = 0;
7651 md.maxpaths = 0;
7652 md.entry_labels = NULL;
7653}
7654
970d6792
L		 7655/* Set the default options in md. Cannot do this in md_begin because
7656 that is called after md_parse_option which is where we set the
7657 options in md based on command line options. */
44f5c83a
JW		 7658
7659void
7660ia64_init (argc, argv)
2434f565
JW		 7661 int argc ATTRIBUTE_UNUSED;
7662 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7663{
1cd8ff38 7664 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7665 md.detect_dv = 1;
970d6792
L		 7666 /* FIXME: We should change it to unwind_check_error someday. */
7667 md.unwind_check = unwind_check_warning;
91d777ee 7668 md.hint_b = hint_b_error;
8c2fda1d 7669 md.tune = itanium2;
44f5c83a
JW		 7670}
7671
7672/* Return a string for the target object file format. */
7673
7674const char *
7675ia64_target_format ()
7676{
7677 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7678 {
72a76794
JW		 7679 if (md.flags & EF_IA_64_BE)
7680 {
7681 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7682#if defined(TE_AIX50)
7463c317 7683 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7684#elif defined(TE_HPUX)
7685 return "elf64-ia64-hpux-big";
7463c317 7686#else
72a76794 7687 return "elf64-ia64-big";
7463c317 7688#endif
72a76794 7689 else
1cd8ff38 7690#if defined(TE_AIX50)
7463c317 7691 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7692#elif defined(TE_HPUX)
7693 return "elf32-ia64-hpux-big";
7463c317 7694#else
72a76794 7695 return "elf32-ia64-big";
7463c317 7696#endif
72a76794 7697 }
44f5c83a 7698 else
72a76794
JW		 7699 {
7700 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7701#ifdef TE_AIX50
7702 return "elf64-ia64-aix-little";
7703#else
72a76794 7704 return "elf64-ia64-little";
7463c317 7705#endif
72a76794 7706 else
7463c317
TW		 7707#ifdef TE_AIX50
7708 return "elf32-ia64-aix-little";
7709#else
72a76794 7710 return "elf32-ia64-little";
7463c317 7711#endif
72a76794 7712 }
44f5c83a
JW		 7713 }
7714 else
7715 return "unknown-format";
7716}
7717
800eeca4
JW		 7718void
7719ia64_end_of_source ()
7720{
542d6675 7721 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7722 insn_group_break (1, 0, 0);
7723
542d6675 7724 /* emits slots we haven't written yet: */
800eeca4
JW		 7725 ia64_flush_insns ();
7726
7727 bfd_set_private_flags (stdoutput, md.flags);
7728
800eeca4
JW		 7729 md.mem_offset.hint = 0;
7730}
7731
7732void
7733ia64_start_line ()
7734{
e4e8248d
JB		 7735 static int first;
7736
7737 if (!first) {
7738 /* Make sure we don't reference input_line_pointer[-1] when that's
7739 not valid. */
7740 first = 1;
7741 return;
7742 }
7743
f1bcba5b
JW		 7744 if (md.qp.X_op == O_register)
7745 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7746 md.qp.X_op = O_absent;
7747
7748 if (ignore_input ())
7749 return;
7750
7751 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7752 {
7753 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7754 {
7755 static int warned;
7756
7757 if (!warned)
7758 {
7759 warned = 1;
7760 as_warn (_("Explicit stops are ignored in auto mode"));
7761 }
7762 }
800eeca4 7763 else
542d6675 7764 insn_group_break (1, 0, 0);
800eeca4 7765 }
e4e8248d 7766 else if (input_line_pointer[-1] == '{')
800eeca4 7767 {
800eeca4
JW		 7768 if (md.manual_bundling)
7769 as_warn ("Found '{' when manual bundling is already turned on");
7770 else
7771 CURR_SLOT.manual_bundling_on = 1;
7772 md.manual_bundling = 1;
7773
542d6675
KH		 7774 /* Bundling is only acceptable in explicit mode
7775 or when in default automatic mode. */
800eeca4 7776 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7777 {
7778 if (!md.mode_explicitly_set
7779 && !md.default_explicit_mode)
7780 dot_dv_mode ('E');
7781 else
7782 as_warn (_("Found '{' after explicit switch to automatic mode"));
7783 }
e4e8248d
JB		 7784 }
7785 else if (input_line_pointer[-1] == '}')
7786 {
800eeca4
JW		 7787 if (!md.manual_bundling)
7788 as_warn ("Found '}' when manual bundling is off");
7789 else
7790 PREV_SLOT.manual_bundling_off = 1;
7791 md.manual_bundling = 0;
7792
7793 /* switch back to automatic mode, if applicable */
197865e8 7794 if (md.detect_dv
542d6675
KH		 7795 && md.explicit_mode
7796 && !md.mode_explicitly_set
7797 && !md.default_explicit_mode)
7798 dot_dv_mode ('A');
e4e8248d
JB		 7799 }
7800}
800eeca4 7801
e4e8248d
JB		 7802/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7803 labels. */
7804static int defining_tag = 0;
7805
7806int
7807ia64_unrecognized_line (ch)
7808 int ch;
7809{
7810 switch (ch)
7811 {
7812 case '(':
60d11e55 7813 expression_and_evaluate (&md.qp);
e4e8248d 7814 if (*input_line_pointer++ != ')')
800eeca4 7815 {
e4e8248d
JB		 7816 as_bad ("Expected ')'");
7817 return 0;
7818 }
7819 if (md.qp.X_op != O_register)
7820 {
7821 as_bad ("Qualifying predicate expected");
7822 return 0;
7823 }
7824 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7825 {
7826 as_bad ("Predicate register expected");
7827 return 0;
800eeca4 7828 }
800eeca4
JW		 7829 return 1;
7830
f1bcba5b
JW		 7831 case '[':
7832 {
7833 char *s;
7834 char c;
7835 symbolS *tag;
4d5a53ff 7836 int temp;
f1bcba5b
JW		 7837
7838 if (md.qp.X_op == O_register)
7839 {
7840 as_bad ("Tag must come before qualifying predicate.");
7841 return 0;
7842 }
4d5a53ff
JW		 7843
7844 /* This implements just enough of read_a_source_file in read.c to
7845 recognize labels. */
7846 if (is_name_beginner (*input_line_pointer))
7847 {
7848 s = input_line_pointer;
7849 c = get_symbol_end ();
7850 }
7851 else if (LOCAL_LABELS_FB
3882b010 7852 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7853 {
7854 temp = 0;
3882b010 7855 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7856 temp = (temp * 10) + *input_line_pointer++ - '0';
7857 fb_label_instance_inc (temp);
7858 s = fb_label_name (temp, 0);
7859 c = *input_line_pointer;
7860 }
7861 else
7862 {
7863 s = NULL;
7864 c = '\0';
7865 }
f1bcba5b
JW		 7866 if (c != ':')
7867 {
7868 /* Put ':' back for error messages' sake. */
7869 *input_line_pointer++ = ':';
7870 as_bad ("Expected ':'");
7871 return 0;
7872 }
4d5a53ff 7873
f1bcba5b
JW		 7874 defining_tag = 1;
7875 tag = colon (s);
7876 defining_tag = 0;
7877 /* Put ':' back for error messages' sake. */
7878 *input_line_pointer++ = ':';
7879 if (*input_line_pointer++ != ']')
7880 {
7881 as_bad ("Expected ']'");
7882 return 0;
7883 }
7884 if (! tag)
7885 {
7886 as_bad ("Tag name expected");
7887 return 0;
7888 }
7889 return 1;
7890 }
7891
800eeca4
JW		 7892 default:
7893 break;
7894 }
542d6675
KH		 7895
7896 /* Not a valid line. */
7897 return 0;
800eeca4
JW		 7898}
7899
7900void
7901ia64_frob_label (sym)
7902 struct symbol *sym;
7903{
7904 struct label_fix *fix;
7905
f1bcba5b
JW		 7906 /* Tags need special handling since they are not bundle breaks like
7907 labels. */
7908 if (defining_tag)
7909 {
7910 fix = obstack_alloc (&notes, sizeof (*fix));
7911 fix->sym = sym;
7912 fix->next = CURR_SLOT.tag_fixups;
07a53e5c 7913 fix->dw2_mark_labels = FALSE;
f1bcba5b
JW		 7914 CURR_SLOT.tag_fixups = fix;
7915
7916 return;
7917 }
7918
800eeca4
JW		 7919 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7920 {
7921 md.last_text_seg = now_seg;
7922 fix = obstack_alloc (&notes, sizeof (*fix));
7923 fix->sym = sym;
7924 fix->next = CURR_SLOT.label_fixups;
07a53e5c 7925 fix->dw2_mark_labels = dwarf2_loc_mark_labels;
800eeca4
JW		 7926 CURR_SLOT.label_fixups = fix;
7927
542d6675 7928 /* Keep track of how many code entry points we've seen. */
800eeca4 7929 if (md.path == md.maxpaths)
542d6675
KH		 7930 {
7931 md.maxpaths += 20;
7932 md.entry_labels = (const char **)
7933 xrealloc ((void *) md.entry_labels,
7934 md.maxpaths * sizeof (char *));
7935 }
800eeca4
JW		 7936 md.entry_labels[md.path++] = S_GET_NAME (sym);
7937 }
7938}
7939
936cf02e
JW		 7940#ifdef TE_HPUX
7941/* The HP-UX linker will give unresolved symbol errors for symbols
7942 that are declared but unused. This routine removes declared,
7943 unused symbols from an object. */
7944int
7945ia64_frob_symbol (sym)
7946 struct symbol *sym;
7947{
7948 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7949 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7950 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7951 && ! S_IS_EXTERNAL (sym)))
7952 return 1;
7953 return 0;
7954}
7955#endif
7956
800eeca4
JW		 7957void
7958ia64_flush_pending_output ()
7959{
4d5a53ff
JW		 7960 if (!md.keep_pending_output
7961 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7962 {
7963 /* ??? This causes many unnecessary stop bits to be emitted.
7964 Unfortunately, it isn't clear if it is safe to remove this. */
7965 insn_group_break (1, 0, 0);
7966 ia64_flush_insns ();
7967 }
7968}
7969
7970/* Do ia64-specific expression optimization. All that's done here is
7971 to transform index expressions that are either due to the indexing
7972 of rotating registers or due to the indexing of indirect register
7973 sets. */
7974int
7975ia64_optimize_expr (l, op, r)
7976 expressionS *l;
7977 operatorT op;
7978 expressionS *r;
7979{
6a2375c6
JB		 7980 if (op != O_index)
7981 return 0;
7982 resolve_expression (l);
7983 if (l->X_op == O_register)
800eeca4 7984 {
6a2375c6
JB		 7985 unsigned num_regs = l->X_add_number >> 16;
7986
7987 resolve_expression (r);
7988 if (num_regs)
800eeca4 7989 {
6a2375c6
JB		 7990 /* Left side is a .rotX-allocated register. */
7991 if (r->X_op != O_constant)
800eeca4 7992 {
6a2375c6
JB		 7993 as_bad ("Rotating register index must be a non-negative constant");
7994 r->X_add_number = 0;
7995 }
7996 else if ((valueT) r->X_add_number >= num_regs)
7997 {
7998 as_bad ("Index out of range 0..%u", num_regs - 1);
800eeca4
JW		 7999 r->X_add_number = 0;
8000 }
8001 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
8002 return 1;
8003 }
6a2375c6 8004 else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR)
800eeca4 8005 {
6a2375c6
JB		 8006 if (r->X_op != O_register
8007 || r->X_add_number < REG_GR
8008 || r->X_add_number > REG_GR + 127)
800eeca4 8009 {
6a2375c6
JB		 8010 as_bad ("Indirect register index must be a general register");
8011 r->X_add_number = REG_GR;
800eeca4
JW		 8012 }
8013 l->X_op = O_index;
8b84be9d 8014 l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID];
800eeca4
JW		 8015 l->X_add_number = r->X_add_number;
8016 return 1;
8017 }
8018 }
6a2375c6
JB		 8019 as_bad ("Index can only be applied to rotating or indirect registers");
8020 /* Fall back to some register use of which has as little as possible
8021 side effects, to minimize subsequent error messages. */
8022 l->X_op = O_register;
8023 l->X_add_number = REG_GR + 3;
8024 return 1;
800eeca4
JW		 8025}
8026
8027int
16a48f83 8028ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 8029 char *name;
8030 expressionS *e;
16a48f83 8031 char *nextcharP;
800eeca4
JW		 8032{
8033 struct const_desc *cdesc;
8034 struct dynreg *dr = 0;
16a48f83 8035 unsigned int idx;
800eeca4
JW		 8036 struct symbol *sym;
8037 char *end;
8038
16a48f83
JB		 8039 if (*name == '@')
8040 {
8041 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
8042
8043 /* Find what relocation pseudo-function we're dealing with. */
8044 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
8045 if (pseudo_func[idx].name
8046 && pseudo_func[idx].name[0] == name[1]
8047 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
8048 {
8049 pseudo_type = pseudo_func[idx].type;
8050 break;
8051 }
8052 switch (pseudo_type)
8053 {
8054 case PSEUDO_FUNC_RELOC:
8055 end = input_line_pointer;
8056 if (*nextcharP != '(')
8057 {
8058 as_bad ("Expected '('");
2f6d622e 8059 break;
16a48f83
JB		 8060 }
8061 /* Skip '('. */
8062 ++input_line_pointer;
8063 expression (e);
8064 if (*input_line_pointer != ')')
8065 {
8066 as_bad ("Missing ')'");
8067 goto done;
8068 }
8069 /* Skip ')'. */
8070 ++input_line_pointer;
8071 if (e->X_op != O_symbol)
8072 {
8073 if (e->X_op != O_pseudo_fixup)
8074 {
8075 as_bad ("Not a symbolic expression");
8076 goto done;
8077 }
8078 if (idx != FUNC_LT_RELATIVE)
8079 {
8080 as_bad ("Illegal combination of relocation functions");
8081 goto done;
8082 }
8083 switch (S_GET_VALUE (e->X_op_symbol))
8084 {
8085 case FUNC_FPTR_RELATIVE:
8086 idx = FUNC_LT_FPTR_RELATIVE; break;
8087 case FUNC_DTP_MODULE:
8088 idx = FUNC_LT_DTP_MODULE; break;
8089 case FUNC_DTP_RELATIVE:
8090 idx = FUNC_LT_DTP_RELATIVE; break;
8091 case FUNC_TP_RELATIVE:
8092 idx = FUNC_LT_TP_RELATIVE; break;
8093 default:
8094 as_bad ("Illegal combination of relocation functions");
8095 goto done;
8096 }
8097 }
8098 /* Make sure gas doesn't get rid of local symbols that are used
8099 in relocs. */
8100 e->X_op = O_pseudo_fixup;
8101 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 8102 done:
8103 *nextcharP = *input_line_pointer;
16a48f83
JB		 8104 break;
8105
8106 case PSEUDO_FUNC_CONST:
8107 e->X_op = O_constant;
8108 e->X_add_number = pseudo_func[idx].u.ival;
8109 break;
8110
8111 case PSEUDO_FUNC_REG:
8112 e->X_op = O_register;
8113 e->X_add_number = pseudo_func[idx].u.ival;
8114 break;
8115
8116 default:
8117 return 0;
8118 }
16a48f83
JB		 8119 return 1;
8120 }
8121
542d6675 8122 /* first see if NAME is a known register name: */
800eeca4
JW		 8123 sym = hash_find (md.reg_hash, name);
8124 if (sym)
8125 {
8126 e->X_op = O_register;
8127 e->X_add_number = S_GET_VALUE (sym);
8128 return 1;
8129 }
8130
8131 cdesc = hash_find (md.const_hash, name);
8132 if (cdesc)
8133 {
8134 e->X_op = O_constant;
8135 e->X_add_number = cdesc->value;
8136 return 1;
8137 }
8138
542d6675 8139 /* check for inN, locN, or outN: */
26b810ce 8140 idx = 0;
800eeca4
JW		 8141 switch (name[0])
8142 {
8143 case 'i':
3882b010 8144 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 8145 {
8146 dr = &md.in;
26b810ce 8147 idx = 2;
800eeca4
JW		 8148 }
8149 break;
8150
8151 case 'l':
3882b010 8152 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 8153 {
8154 dr = &md.loc;
26b810ce 8155 idx = 3;
800eeca4
JW		 8156 }
8157 break;
8158
8159 case 'o':
3882b010 8160 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 8161 {
8162 dr = &md.out;
26b810ce 8163 idx = 3;
800eeca4
JW		 8164 }
8165 break;
8166
8167 default:
8168 break;
8169 }
8170
26b810ce
JB		 8171 /* Ignore register numbers with leading zeroes, except zero itself. */
8172 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 8173 {
26b810ce
JB		 8174 unsigned long regnum;
8175
542d6675 8176 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 8177 regnum = strtoul (name + idx, &end, 10);
8178 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 8179 {
26b810ce 8180 if (regnum >= dr->num_regs)
800eeca4
JW		 8181 {
8182 if (!dr->num_regs)
8183 as_bad ("No current frame");
8184 else
542d6675
KH		 8185 as_bad ("Register number out of range 0..%u",
8186 dr->num_regs - 1);
800eeca4
JW		 8187 regnum = 0;
8188 }
8189 e->X_op = O_register;
8190 e->X_add_number = dr->base + regnum;
8191 return 1;
8192 }
8193 }
8194
20b36a95
JB		 8195 end = alloca (strlen (name) + 1);
8196 strcpy (end, name);
8197 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 8198 if ((dr = hash_find (md.dynreg_hash, name)))
8199 {
8200 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 8201 Store the base register number in the low 16 bits of
8202 X_add_number and the size of the register set in the top 16
8203 bits. */
800eeca4
JW		 8204 e->X_op = O_register;
8205 e->X_add_number = dr->base | (dr->num_regs << 16);
8206 return 1;
8207 }
8208 return 0;
8209}
8210
8211/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8212
8213char *
8214ia64_canonicalize_symbol_name (name)
8215 char *name;
8216{
20b36a95
JB		 8217 size_t len = strlen (name), full = len;
8218
8219 while (len > 0 && name[len - 1] == '#')
8220 --len;
8221 if (len <= 0)
8222 {
8223 if (full > 0)
8224 as_bad ("Standalone `#' is illegal");
20b36a95
JB		 8225 }
8226 else if (len < full - 1)
8227 as_warn ("Redundant `#' suffix operators");
8228 name[len] = '\0';
800eeca4
JW		 8229 return name;
8230}
8231
3e37788f
JW		 8232/* Return true if idesc is a conditional branch instruction. This excludes
8233 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8234 because they always read/write resources regardless of the value of the
8235 qualifying predicate. br.ia must always use p0, and hence is always
8236 taken. Thus this function returns true for branches which can fall
8237 through, and which use no resources if they do fall through. */
1deb8127 8238
800eeca4
JW		 8239static int
8240is_conditional_branch (idesc)
542d6675 8241 struct ia64_opcode *idesc;
800eeca4 8242{
1deb8127 8243 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 8244 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8245 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 8246 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8247 && (idesc->name[2] == '\0'
3e37788f
JW		 8248 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8249 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8250 || idesc->name[2] == 'l'
8251 /* br.cond, br.call, br.clr */
8252 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8253 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8254 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8255}
8256
8257/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8258 returns zero. */
8259
800eeca4
JW		 8260static int
8261is_taken_branch (idesc)
542d6675 8262 struct ia64_opcode *idesc;
800eeca4
JW		 8263{
8264 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8265 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8266}
8267
8268/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8269 doubt, returns zero. */
8270
800eeca4
JW		 8271static int
8272is_interruption_or_rfi (idesc)
542d6675 8273 struct ia64_opcode *idesc;
800eeca4
JW		 8274{
8275 if (strcmp (idesc->name, "rfi") == 0)
8276 return 1;
8277 return 0;
8278}
8279
8280/* Returns the index of the given dependency in the opcode's list of chks, or
8281 -1 if there is no dependency. */
542d6675 8282
800eeca4
JW		 8283static int
8284depends_on (depind, idesc)
542d6675
KH		 8285 int depind;
8286 struct ia64_opcode *idesc;
800eeca4
JW		 8287{
8288 int i;
8289 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8290 for (i = 0; i < dep->nchks; i++)
800eeca4 8291 {
542d6675
KH		 8292 if (depind == DEP (dep->chks[i]))
8293 return i;
800eeca4
JW		 8294 }
8295 return -1;
8296}
8297
8298/* Determine a set of specific resources used for a particular resource
8299 class. Returns the number of specific resources identified For those
8300 cases which are not determinable statically, the resource returned is
197865e8 8301 marked nonspecific.
800eeca4
JW		 8302
8303 Meanings of value in 'NOTE':
8304 1) only read/write when the register number is explicitly encoded in the
8305 insn.
8306 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8307 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8308 3) general register value is used to specify an indirect register; not
8309 determinable statically.
8310 4) only read the given resource when bits 7:0 of the indirect index
8311 register value does not match the register number of the resource; not
8312 determinable statically.
8313 5) all rules are implementation specific.
8314 6) only when both the index specified by the reader and the index specified
8315 by the writer have the same value in bits 63:61; not determinable
197865e8 8316 statically.
800eeca4 8317 7) only access the specified resource when the corresponding mask bit is
197865e8 8318 set
800eeca4
JW		 8319 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8320 only read when these insns reference FR2-31
8321 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8322 written when these insns write FR32-127
8323 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8324 instruction
8325 11) The target predicates are written independently of PR[qp], but source
8326 registers are only read if PR[qp] is true. Since the state of PR[qp]
8327 cannot statically be determined, all source registers are marked used.
8328 12) This insn only reads the specified predicate register when that
8329 register is the PR[qp].
8330 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 8331 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8332 14) The RSE resource includes the implementation-specific RSE internal
8333 state resources. At least one (and possibly more) of these resources are
8334 read by each instruction listed in IC:rse-readers. At least one (and
8335 possibly more) of these resources are written by each insn listed in
197865e8 8336 IC:rse-writers.
800eeca4 8337 15+16) Represents reserved instructions, which the assembler does not
197865e8 8338 generate.
800eeca4
JW		 8339
8340 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8341 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8342*/
8343
8344#define MAX_SPECS 256
8345#define DV_CHK 1
8346#define DV_REG 0
8347
8348static int
8349specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8350 const struct ia64_dependency *dep;
8351 struct ia64_opcode *idesc;
8352 int type; /* is this a DV chk or a DV reg? */
8353 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8354 int note; /* resource note for this insn's usage */
8355 int path; /* which execution path to examine */
800eeca4
JW		 8356{
8357 int count = 0;
8358 int i;
8359 int rsrc_write = 0;
8360 struct rsrc tmpl;
197865e8 8361
800eeca4
JW		 8362 if (dep->mode == IA64_DV_WAW
8363 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8364 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8365 rsrc_write = 1;
8366
8367 /* template for any resources we identify */
8368 tmpl.dependency = dep;
8369 tmpl.note = note;
8370 tmpl.insn_srlz = tmpl.data_srlz = 0;
8371 tmpl.qp_regno = CURR_SLOT.qp_regno;
8372 tmpl.link_to_qp_branch = 1;
8373 tmpl.mem_offset.hint = 0;
1f8b1395
AS		 8374 tmpl.mem_offset.offset = 0;
8375 tmpl.mem_offset.base = 0;
800eeca4 8376 tmpl.specific = 1;
a66d2bb7 8377 tmpl.index = -1;
7484b8e6 8378 tmpl.cmp_type = CMP_NONE;
1f8b1395
AS		 8379 tmpl.depind = 0;
8380 tmpl.file = NULL;
8381 tmpl.line = 0;
8382 tmpl.path = 0;
800eeca4
JW		 8383
8384#define UNHANDLED \
8385as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8386dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8387#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8388
8389 /* we don't need to track these */
8390 if (dep->semantics == IA64_DVS_NONE)
8391 return 0;
8392
8393 switch (dep->specifier)
8394 {
8395 case IA64_RS_AR_K:
8396 if (note == 1)
542d6675
KH		 8397 {
8398 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8399 {
8400 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8401 if (regno >= 0 && regno <= 7)
8402 {
8403 specs[count] = tmpl;
8404 specs[count++].index = regno;
8405 }
8406 }
8407 }
800eeca4 8408 else if (note == 0)
542d6675
KH		 8409 {
8410 for (i = 0; i < 8; i++)
8411 {
8412 specs[count] = tmpl;
8413 specs[count++].index = i;
8414 }
8415 }
800eeca4 8416 else
542d6675
KH		 8417 {
8418 UNHANDLED;
8419 }
800eeca4
JW		 8420 break;
8421
8422 case IA64_RS_AR_UNAT:
8423 /* This is a mov =AR or mov AR= instruction. */
8424 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8425 {
8426 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8427 if (regno == AR_UNAT)
8428 {
8429 specs[count++] = tmpl;
8430 }
8431 }
8432 else
8433 {
8434 /* This is a spill/fill, or other instruction that modifies the
8435 unat register. */
8436
8437 /* Unless we can determine the specific bits used, mark the whole
8438 thing; bits 8:3 of the memory address indicate the bit used in
8439 UNAT. The .mem.offset hint may be used to eliminate a small
8440 subset of conflicts. */
8441 specs[count] = tmpl;
8442 if (md.mem_offset.hint)
8443 {
542d6675
KH		 8444 if (md.debug_dv)
8445 fprintf (stderr, " Using hint for spill/fill\n");
8446 /* The index isn't actually used, just set it to something
8447 approximating the bit index. */
800eeca4
JW		 8448 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8449 specs[count].mem_offset.hint = 1;
8450 specs[count].mem_offset.offset = md.mem_offset.offset;
8451 specs[count++].mem_offset.base = md.mem_offset.base;
8452 }
8453 else
8454 {
8455 specs[count++].specific = 0;
8456 }
8457 }
8458 break;
8459
8460 case IA64_RS_AR:
8461 if (note == 1)
542d6675
KH		 8462 {
8463 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8464 {
8465 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8466 if ((regno >= 8 && regno <= 15)
8467 || (regno >= 20 && regno <= 23)
8468 || (regno >= 31 && regno <= 39)
8469 || (regno >= 41 && regno <= 47)
8470 || (regno >= 67 && regno <= 111))
8471 {
8472 specs[count] = tmpl;
8473 specs[count++].index = regno;
8474 }
8475 }
8476 }
800eeca4 8477 else
542d6675
KH		 8478 {
8479 UNHANDLED;
8480 }
800eeca4
JW		 8481 break;
8482
8483 case IA64_RS_ARb:
8484 if (note == 1)
542d6675
KH		 8485 {
8486 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8487 {
8488 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8489 if ((regno >= 48 && regno <= 63)
8490 || (regno >= 112 && regno <= 127))
8491 {
8492 specs[count] = tmpl;
8493 specs[count++].index = regno;
8494 }
8495 }
8496 }
800eeca4 8497 else if (note == 0)
542d6675
KH		 8498 {
8499 for (i = 48; i < 64; i++)
8500 {
8501 specs[count] = tmpl;
8502 specs[count++].index = i;
8503 }
8504 for (i = 112; i < 128; i++)
8505 {
8506 specs[count] = tmpl;
8507 specs[count++].index = i;
8508 }
8509 }
197865e8 8510 else
542d6675
KH		 8511 {
8512 UNHANDLED;
8513 }
800eeca4
JW		 8514 break;
8515
8516 case IA64_RS_BR:
8517 if (note != 1)
542d6675
KH		 8518 {
8519 UNHANDLED;
8520 }
800eeca4 8521 else
542d6675
KH		 8522 {
8523 if (rsrc_write)
8524 {
8525 for (i = 0; i < idesc->num_outputs; i++)
8526 if (idesc->operands[i] == IA64_OPND_B1
8527 || idesc->operands[i] == IA64_OPND_B2)
8528 {
8529 specs[count] = tmpl;
8530 specs[count++].index =
8531 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8532 }
8533 }
8534 else
8535 {
40449e9f 8536 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8537 if (idesc->operands[i] == IA64_OPND_B1
8538 || idesc->operands[i] == IA64_OPND_B2)
8539 {
8540 specs[count] = tmpl;
8541 specs[count++].index =
8542 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8543 }
8544 }
8545 }
800eeca4
JW		 8546 break;
8547
8548 case IA64_RS_CPUID: /* four or more registers */
8549 if (note == 3)
542d6675
KH		 8550 {
8551 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8552 {
8553 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8554 if (regno >= 0 && regno < NELEMS (gr_values)
8555 && KNOWN (regno))
8556 {
8557 specs[count] = tmpl;
8558 specs[count++].index = gr_values[regno].value & 0xFF;
8559 }
8560 else
8561 {
8562 specs[count] = tmpl;
8563 specs[count++].specific = 0;
8564 }
8565 }
8566 }
800eeca4 8567 else
542d6675
KH		 8568 {
8569 UNHANDLED;
8570 }
800eeca4
JW		 8571 break;
8572
8573 case IA64_RS_DBR: /* four or more registers */
8574 if (note == 3)
542d6675
KH		 8575 {
8576 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8577 {
8578 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8579 if (regno >= 0 && regno < NELEMS (gr_values)
8580 && KNOWN (regno))
8581 {
8582 specs[count] = tmpl;
8583 specs[count++].index = gr_values[regno].value & 0xFF;
8584 }
8585 else
8586 {
8587 specs[count] = tmpl;
8588 specs[count++].specific = 0;
8589 }
8590 }
8591 }
800eeca4 8592 else if (note == 0 && !rsrc_write)
542d6675
KH		 8593 {
8594 specs[count] = tmpl;
8595 specs[count++].specific = 0;
8596 }
800eeca4 8597 else
542d6675
KH		 8598 {
8599 UNHANDLED;
8600 }
800eeca4
JW		 8601 break;
8602
8603 case IA64_RS_IBR: /* four or more registers */
8604 if (note == 3)
542d6675
KH		 8605 {
8606 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8607 {
8608 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8609 if (regno >= 0 && regno < NELEMS (gr_values)
8610 && KNOWN (regno))
8611 {
8612 specs[count] = tmpl;
8613 specs[count++].index = gr_values[regno].value & 0xFF;
8614 }
8615 else
8616 {
8617 specs[count] = tmpl;
8618 specs[count++].specific = 0;
8619 }
8620 }
8621 }
800eeca4 8622 else
542d6675
KH		 8623 {
8624 UNHANDLED;
8625 }
800eeca4
JW		 8626 break;
8627
8628 case IA64_RS_MSR:
8629 if (note == 5)
8630 {
8631 /* These are implementation specific. Force all references to
8632 conflict with all other references. */
8633 specs[count] = tmpl;
8634 specs[count++].specific = 0;
8635 }
8636 else
8637 {
8638 UNHANDLED;
8639 }
8640 break;
8641
8642 case IA64_RS_PKR: /* 16 or more registers */
8643 if (note == 3 || note == 4)
542d6675
KH		 8644 {
8645 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8646 {
8647 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8648 if (regno >= 0 && regno < NELEMS (gr_values)
8649 && KNOWN (regno))
8650 {
8651 if (note == 3)
8652 {
8653 specs[count] = tmpl;
8654 specs[count++].index = gr_values[regno].value & 0xFF;
8655 }
8656 else
8657 for (i = 0; i < NELEMS (gr_values); i++)
8658 {
8659 /* Uses all registers *except* the one in R3. */
2434f565 8660 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8661 {
8662 specs[count] = tmpl;
8663 specs[count++].index = i;
8664 }
8665 }
8666 }
8667 else
8668 {
8669 specs[count] = tmpl;
8670 specs[count++].specific = 0;
8671 }
8672 }
8673 }
8674 else if (note == 0)
8675 {
8676 /* probe et al. */
8677 specs[count] = tmpl;
8678 specs[count++].specific = 0;
8679 }
8680 break;
8681
8682 case IA64_RS_PMC: /* four or more registers */
8683 if (note == 3)
8684 {
8685 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8686 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8687
8688 {
8689 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8690 ? 1 : !rsrc_write);
8691 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8692 if (regno >= 0 && regno < NELEMS (gr_values)
8693 && KNOWN (regno))
8694 {
8695 specs[count] = tmpl;
8696 specs[count++].index = gr_values[regno].value & 0xFF;
8697 }
8698 else
8699 {
8700 specs[count] = tmpl;
8701 specs[count++].specific = 0;
8702 }
8703 }
8704 }
8705 else
8706 {
8707 UNHANDLED;
8708 }
800eeca4
JW		 8709 break;
8710
8711 case IA64_RS_PMD: /* four or more registers */
8712 if (note == 3)
542d6675
KH		 8713 {
8714 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8715 {
8716 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8717 if (regno >= 0 && regno < NELEMS (gr_values)
8718 && KNOWN (regno))
8719 {
8720 specs[count] = tmpl;
8721 specs[count++].index = gr_values[regno].value & 0xFF;
8722 }
8723 else
8724 {
8725 specs[count] = tmpl;
8726 specs[count++].specific = 0;
8727 }
8728 }
8729 }
800eeca4 8730 else
542d6675
KH		 8731 {
8732 UNHANDLED;
8733 }
800eeca4
JW		 8734 break;
8735
8736 case IA64_RS_RR: /* eight registers */
8737 if (note == 6)
542d6675
KH		 8738 {
8739 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8740 {
8741 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8742 if (regno >= 0 && regno < NELEMS (gr_values)
8743 && KNOWN (regno))
8744 {
8745 specs[count] = tmpl;
8746 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8747 }
8748 else
8749 {
8750 specs[count] = tmpl;
8751 specs[count++].specific = 0;
8752 }
8753 }
8754 }
800eeca4 8755 else if (note == 0 && !rsrc_write)
542d6675
KH		 8756 {
8757 specs[count] = tmpl;
8758 specs[count++].specific = 0;
8759 }
197865e8 8760 else
542d6675
KH		 8761 {
8762 UNHANDLED;
8763 }
800eeca4
JW		 8764 break;
8765
8766 case IA64_RS_CR_IRR:
197865e8 8767 if (note == 0)
542d6675
KH		 8768 {
8769 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8770 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8771 if (rsrc_write
8772 && idesc->operands[1] == IA64_OPND_CR3
8773 && regno == CR_IVR)
8774 {
8775 for (i = 0; i < 4; i++)
8776 {
8777 specs[count] = tmpl;
8778 specs[count++].index = CR_IRR0 + i;
8779 }
8780 }
8781 }
800eeca4 8782 else if (note == 1)
542d6675
KH		 8783 {
8784 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8785 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8786 && regno >= CR_IRR0
8787 && regno <= CR_IRR3)
8788 {
8789 specs[count] = tmpl;
8790 specs[count++].index = regno;
8791 }
8792 }
800eeca4 8793 else
542d6675
KH		 8794 {
8795 UNHANDLED;
8796 }
800eeca4
JW		 8797 break;
8798
8799 case IA64_RS_CR_LRR:
8800 if (note != 1)
542d6675
KH		 8801 {
8802 UNHANDLED;
8803 }
197865e8 8804 else
542d6675
KH		 8805 {
8806 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8807 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8808 && (regno == CR_LRR0 || regno == CR_LRR1))
8809 {
8810 specs[count] = tmpl;
8811 specs[count++].index = regno;
8812 }
8813 }
800eeca4
JW		 8814 break;
8815
8816 case IA64_RS_CR:
8817 if (note == 1)
542d6675
KH		 8818 {
8819 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8820 {
8821 specs[count] = tmpl;
8822 specs[count++].index =
8823 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8824 }
8825 }
800eeca4 8826 else
542d6675
KH		 8827 {
8828 UNHANDLED;
8829 }
800eeca4
JW		 8830 break;
8831
8832 case IA64_RS_FR:
8833 case IA64_RS_FRb:
8834 if (note != 1)
542d6675
KH		 8835 {
8836 UNHANDLED;
8837 }
800eeca4 8838 else if (rsrc_write)
542d6675
KH		 8839 {
8840 if (dep->specifier == IA64_RS_FRb
8841 && idesc->operands[0] == IA64_OPND_F1)
8842 {
8843 specs[count] = tmpl;
8844 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8845 }
8846 }
800eeca4 8847 else
542d6675
KH		 8848 {
8849 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8850 {
8851 if (idesc->operands[i] == IA64_OPND_F2
8852 || idesc->operands[i] == IA64_OPND_F3
8853 || idesc->operands[i] == IA64_OPND_F4)
8854 {
8855 specs[count] = tmpl;
8856 specs[count++].index =
8857 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8858 }
8859 }
8860 }
800eeca4
JW		 8861 break;
8862
8863 case IA64_RS_GR:
8864 if (note == 13)
542d6675
KH		 8865 {
8866 /* This reference applies only to the GR whose value is loaded with
8867 data returned from memory. */
8868 specs[count] = tmpl;
8869 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8870 }
800eeca4 8871 else if (note == 1)
542d6675
KH		 8872 {
8873 if (rsrc_write)
8874 {
8875 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8876 if (idesc->operands[i] == IA64_OPND_R1
8877 || idesc->operands[i] == IA64_OPND_R2
8878 || idesc->operands[i] == IA64_OPND_R3)
8879 {
8880 specs[count] = tmpl;
197865e8 8881 specs[count++].index =
50b81f19
JW		 8882 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8883 }
8884 if (idesc->flags & IA64_OPCODE_POSTINC)
8885 for (i = 0; i < NELEMS (idesc->operands); i++)
8886 if (idesc->operands[i] == IA64_OPND_MR3)
8887 {
8888 specs[count] = tmpl;
8889 specs[count++].index =
8890 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8891 }
542d6675
KH		 8892 }
8893 else
8894 {
8895 /* Look for anything that reads a GR. */
8896 for (i = 0; i < NELEMS (idesc->operands); i++)
8897 {
8898 if (idesc->operands[i] == IA64_OPND_MR3
8899 || idesc->operands[i] == IA64_OPND_CPUID_R3
8900 || idesc->operands[i] == IA64_OPND_DBR_R3
8901 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8902 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8903 || idesc->operands[i] == IA64_OPND_PKR_R3
8904 || idesc->operands[i] == IA64_OPND_PMC_R3
8905 || idesc->operands[i] == IA64_OPND_PMD_R3
8906 || idesc->operands[i] == IA64_OPND_RR_R3
8907 || ((i >= idesc->num_outputs)
8908 && (idesc->operands[i] == IA64_OPND_R1
8909 || idesc->operands[i] == IA64_OPND_R2
8910 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8911 /* addl source register. */
8912 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8913 {
8914 specs[count] = tmpl;
8915 specs[count++].index =
8916 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8917 }
8918 }
8919 }
8920 }
197865e8 8921 else
542d6675
KH		 8922 {
8923 UNHANDLED;
8924 }
800eeca4
JW		 8925 break;
8926
139368c9
JW		 8927 /* This is the same as IA64_RS_PRr, except that the register range is
8928 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8929 case IA64_RS_PR:
8930 if (note == 0)
542d6675 8931 {
139368c9 8932 for (i = 1; i < 16; i++)
542d6675 8933 {
139368c9
JW		 8934 specs[count] = tmpl;
8935 specs[count++].index = i;
8936 }
8937 }
8938 else if (note == 7)
8939 {
8940 valueT mask = 0;
8941 /* Mark only those registers indicated by the mask. */
8942 if (rsrc_write)
8943 {
8944 mask = CURR_SLOT.opnd[2].X_add_number;
8945 for (i = 1; i < 16; i++)
8946 if (mask & ((valueT) 1 << i))
8947 {
8948 specs[count] = tmpl;
8949 specs[count++].index = i;
8950 }
8951 }
8952 else
8953 {
8954 UNHANDLED;
8955 }
8956 }
8957 else if (note == 11) /* note 11 implies note 1 as well */
8958 {
8959 if (rsrc_write)
8960 {
8961 for (i = 0; i < idesc->num_outputs; i++)
8962 {
8963 if (idesc->operands[i] == IA64_OPND_P1
8964 || idesc->operands[i] == IA64_OPND_P2)
8965 {
8966 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8967 if (regno >= 1 && regno < 16)
8968 {
8969 specs[count] = tmpl;
8970 specs[count++].index = regno;
8971 }
8972 }
8973 }
8974 }
8975 else
8976 {
8977 UNHANDLED;
8978 }
8979 }
8980 else if (note == 12)
8981 {
8982 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8983 {
8984 specs[count] = tmpl;
8985 specs[count++].index = CURR_SLOT.qp_regno;
8986 }
8987 }
8988 else if (note == 1)
8989 {
8990 if (rsrc_write)
8991 {
8992 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8993 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8994 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8995 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8996
8997 if ((idesc->operands[0] == IA64_OPND_P1
8998 || idesc->operands[0] == IA64_OPND_P2)
8999 && p1 >= 1 && p1 < 16)
542d6675
KH		 9000 {
9001 specs[count] = tmpl;
139368c9
JW		 9002 specs[count].cmp_type =
9003 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9004 specs[count++].index = p1;
9005 }
9006 if ((idesc->operands[1] == IA64_OPND_P1
9007 || idesc->operands[1] == IA64_OPND_P2)
9008 && p2 >= 1 && p2 < 16)
9009 {
9010 specs[count] = tmpl;
9011 specs[count].cmp_type =
9012 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9013 specs[count++].index = p2;
542d6675
KH		 9014 }
9015 }
9016 else
9017 {
139368c9 9018 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 9019 {
9020 specs[count] = tmpl;
139368c9
JW		 9021 specs[count++].index = CURR_SLOT.qp_regno;
9022 }
9023 if (idesc->operands[1] == IA64_OPND_PR)
9024 {
9025 for (i = 1; i < 16; i++)
9026 {
9027 specs[count] = tmpl;
9028 specs[count++].index = i;
9029 }
542d6675
KH		 9030 }
9031 }
9032 }
139368c9
JW		 9033 else
9034 {
9035 UNHANDLED;
9036 }
9037 break;
9038
9039 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9040 simplified cases of this. */
9041 case IA64_RS_PRr:
9042 if (note == 0)
9043 {
9044 for (i = 16; i < 63; i++)
9045 {
9046 specs[count] = tmpl;
9047 specs[count++].index = i;
9048 }
9049 }
800eeca4 9050 else if (note == 7)
542d6675
KH		 9051 {
9052 valueT mask = 0;
9053 /* Mark only those registers indicated by the mask. */
9054 if (rsrc_write
9055 && idesc->operands[0] == IA64_OPND_PR)
9056 {
9057 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 9058 if (mask & ((valueT) 1 << 16))
139368c9
JW		 9059 for (i = 16; i < 63; i++)
9060 {
9061 specs[count] = tmpl;
9062 specs[count++].index = i;
9063 }
542d6675
KH		 9064 }
9065 else if (rsrc_write
9066 && idesc->operands[0] == IA64_OPND_PR_ROT)
9067 {
9068 for (i = 16; i < 63; i++)
9069 {
9070 specs[count] = tmpl;
9071 specs[count++].index = i;
9072 }
9073 }
9074 else
9075 {
9076 UNHANDLED;
9077 }
9078 }
800eeca4 9079 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 9080 {
9081 if (rsrc_write)
9082 {
9083 for (i = 0; i < idesc->num_outputs; i++)
9084 {
9085 if (idesc->operands[i] == IA64_OPND_P1
9086 || idesc->operands[i] == IA64_OPND_P2)
9087 {
9088 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 9089 if (regno >= 16 && regno < 63)
542d6675
KH		 9090 {
9091 specs[count] = tmpl;
9092 specs[count++].index = regno;
9093 }
9094 }
9095 }
9096 }
9097 else
9098 {
9099 UNHANDLED;
9100 }
9101 }
800eeca4 9102 else if (note == 12)
542d6675 9103 {
139368c9 9104 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9105 {
9106 specs[count] = tmpl;
9107 specs[count++].index = CURR_SLOT.qp_regno;
9108 }
9109 }
800eeca4 9110 else if (note == 1)
542d6675
KH		 9111 {
9112 if (rsrc_write)
9113 {
9114 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9115 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9116 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9117 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9118
542d6675
KH		 9119 if ((idesc->operands[0] == IA64_OPND_P1
9120 || idesc->operands[0] == IA64_OPND_P2)
139368c9 9121 && p1 >= 16 && p1 < 63)
542d6675
KH		 9122 {
9123 specs[count] = tmpl;
4a4f25cf 9124 specs[count].cmp_type =
7484b8e6 9125 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 9126 specs[count++].index = p1;
9127 }
9128 if ((idesc->operands[1] == IA64_OPND_P1
9129 || idesc->operands[1] == IA64_OPND_P2)
139368c9 9130 && p2 >= 16 && p2 < 63)
542d6675
KH		 9131 {
9132 specs[count] = tmpl;
4a4f25cf 9133 specs[count].cmp_type =
7484b8e6 9134 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 9135 specs[count++].index = p2;
9136 }
9137 }
9138 else
9139 {
139368c9 9140 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 9141 {
9142 specs[count] = tmpl;
9143 specs[count++].index = CURR_SLOT.qp_regno;
9144 }
9145 if (idesc->operands[1] == IA64_OPND_PR)
9146 {
139368c9 9147 for (i = 16; i < 63; i++)
542d6675
KH		 9148 {
9149 specs[count] = tmpl;
9150 specs[count++].index = i;
9151 }
9152 }
9153 }
9154 }
197865e8 9155 else
542d6675
KH		 9156 {
9157 UNHANDLED;
9158 }
800eeca4
JW		 9159 break;
9160
9161 case IA64_RS_PSR:
197865e8 9162 /* Verify that the instruction is using the PSR bit indicated in
542d6675 9163 dep->regindex. */
800eeca4 9164 if (note == 0)
542d6675
KH		 9165 {
9166 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9167 {
9168 if (dep->regindex < 6)
9169 {
9170 specs[count++] = tmpl;
9171 }
9172 }
9173 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9174 {
9175 if (dep->regindex < 32
9176 || dep->regindex == 35
9177 || dep->regindex == 36
9178 || (!rsrc_write && dep->regindex == PSR_CPL))
9179 {
9180 specs[count++] = tmpl;
9181 }
9182 }
9183 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9184 {
9185 if (dep->regindex < 32
9186 || dep->regindex == 35
9187 || dep->regindex == 36
9188 || (rsrc_write && dep->regindex == PSR_CPL))
9189 {
9190 specs[count++] = tmpl;
9191 }
9192 }
9193 else
9194 {
9195 /* Several PSR bits have very specific dependencies. */
9196 switch (dep->regindex)
9197 {
9198 default:
9199 specs[count++] = tmpl;
9200 break;
9201 case PSR_IC:
9202 if (rsrc_write)
9203 {
9204 specs[count++] = tmpl;
9205 }
9206 else
9207 {
9208 /* Only certain CR accesses use PSR.ic */
9209 if (idesc->operands[0] == IA64_OPND_CR3
9210 || idesc->operands[1] == IA64_OPND_CR3)
9211 {
9212 int index =
9213 ((idesc->operands[0] == IA64_OPND_CR3)
9214 ? 0 : 1);
9215 int regno =
9216 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9217
9218 switch (regno)
9219 {
9220 default:
9221 break;
9222 case CR_ITIR:
9223 case CR_IFS:
9224 case CR_IIM:
9225 case CR_IIP:
9226 case CR_IPSR:
9227 case CR_ISR:
9228 case CR_IFA:
9229 case CR_IHA:
9230 case CR_IIPA:
9231 specs[count++] = tmpl;
9232 break;
9233 }
9234 }
9235 }
9236 break;
9237 case PSR_CPL:
9238 if (rsrc_write)
9239 {
9240 specs[count++] = tmpl;
9241 }
9242 else
9243 {
9244 /* Only some AR accesses use cpl */
9245 if (idesc->operands[0] == IA64_OPND_AR3
9246 || idesc->operands[1] == IA64_OPND_AR3)
9247 {
9248 int index =
9249 ((idesc->operands[0] == IA64_OPND_AR3)
9250 ? 0 : 1);
9251 int regno =
9252 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9253
9254 if (regno == AR_ITC
9255 || (index == 0
9256 && (regno == AR_ITC
9257 || regno == AR_RSC
9258 || (regno >= AR_K0
9259 && regno <= AR_K7))))
9260 {
9261 specs[count++] = tmpl;
9262 }
9263 }
9264 else
9265 {
9266 specs[count++] = tmpl;
9267 }
9268 break;
9269 }
9270 }
9271 }
9272 }
800eeca4 9273 else if (note == 7)
542d6675
KH		 9274 {
9275 valueT mask = 0;
9276 if (idesc->operands[0] == IA64_OPND_IMMU24)
9277 {
9278 mask = CURR_SLOT.opnd[0].X_add_number;
9279 }
9280 else
9281 {
9282 UNHANDLED;
9283 }
9284 if (mask & ((valueT) 1 << dep->regindex))
9285 {
9286 specs[count++] = tmpl;
9287 }
9288 }
800eeca4 9289 else if (note == 8)
542d6675
KH		 9290 {
9291 int min = dep->regindex == PSR_DFL ? 2 : 32;
9292 int max = dep->regindex == PSR_DFL ? 31 : 127;
9293 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9294 for (i = 0; i < NELEMS (idesc->operands); i++)
9295 {
9296 if (idesc->operands[i] == IA64_OPND_F1
9297 || idesc->operands[i] == IA64_OPND_F2
9298 || idesc->operands[i] == IA64_OPND_F3
9299 || idesc->operands[i] == IA64_OPND_F4)
9300 {
9301 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9302 if (reg >= min && reg <= max)
9303 {
9304 specs[count++] = tmpl;
9305 }
9306 }
9307 }
9308 }
800eeca4 9309 else if (note == 9)
542d6675
KH		 9310 {
9311 int min = dep->regindex == PSR_MFL ? 2 : 32;
9312 int max = dep->regindex == PSR_MFL ? 31 : 127;
9313 /* mfh is read on writes to FR32-127; mfl is read on writes to
9314 FR2-31 */
9315 for (i = 0; i < idesc->num_outputs; i++)
9316 {
9317 if (idesc->operands[i] == IA64_OPND_F1)
9318 {
9319 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9320 if (reg >= min && reg <= max)
9321 {
9322 specs[count++] = tmpl;
9323 }
9324 }
9325 }
9326 }
800eeca4 9327 else if (note == 10)
542d6675
KH		 9328 {
9329 for (i = 0; i < NELEMS (idesc->operands); i++)
9330 {
9331 if (idesc->operands[i] == IA64_OPND_R1
9332 || idesc->operands[i] == IA64_OPND_R2
9333 || idesc->operands[i] == IA64_OPND_R3)
9334 {
9335 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9336 if (regno >= 16 && regno <= 31)
9337 {
9338 specs[count++] = tmpl;
9339 }
9340 }
9341 }
9342 }
800eeca4 9343 else
542d6675
KH		 9344 {
9345 UNHANDLED;
9346 }
800eeca4
JW		 9347 break;
9348
9349 case IA64_RS_AR_FPSR:
9350 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9351 {
9352 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9353 if (regno == AR_FPSR)
9354 {
9355 specs[count++] = tmpl;
9356 }
9357 }
800eeca4 9358 else
542d6675
KH		 9359 {
9360 specs[count++] = tmpl;
9361 }
800eeca4
JW		 9362 break;
9363
197865e8 9364 case IA64_RS_ARX:
800eeca4
JW		 9365 /* Handle all AR[REG] resources */
9366 if (note == 0 || note == 1)
542d6675
KH		 9367 {
9368 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9369 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9370 && regno == dep->regindex)
9371 {
9372 specs[count++] = tmpl;
9373 }
9374 /* other AR[REG] resources may be affected by AR accesses */
9375 else if (idesc->operands[0] == IA64_OPND_AR3)
9376 {
9377 /* AR[] writes */
9378 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9379 switch (dep->regindex)
9380 {
9381 default:
9382 break;
9383 case AR_BSP:
9384 case AR_RNAT:
9385 if (regno == AR_BSPSTORE)
9386 {
9387 specs[count++] = tmpl;
9388 }
9389 case AR_RSC:
9390 if (!rsrc_write &&
9391 (regno == AR_BSPSTORE
9392 || regno == AR_RNAT))
9393 {
9394 specs[count++] = tmpl;
9395 }
9396 break;
9397 }
9398 }
9399 else if (idesc->operands[1] == IA64_OPND_AR3)
9400 {
9401 /* AR[] reads */
9402 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9403 switch (dep->regindex)
9404 {
9405 default:
9406 break;
9407 case AR_RSC:
9408 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9409 {
9410 specs[count++] = tmpl;
9411 }
9412 break;
9413 }
9414 }
9415 else
9416 {
9417 specs[count++] = tmpl;
9418 }
9419 }
800eeca4 9420 else
542d6675
KH		 9421 {
9422 UNHANDLED;
9423 }
800eeca4
JW		 9424 break;
9425
9426 case IA64_RS_CRX:
9427 /* Handle all CR[REG] resources */
9428 if (note == 0 || note == 1)
542d6675
KH		 9429 {
9430 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9431 {
9432 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9433 if (regno == dep->regindex)
9434 {
9435 specs[count++] = tmpl;
9436 }
9437 else if (!rsrc_write)
9438 {
9439 /* Reads from CR[IVR] affect other resources. */
9440 if (regno == CR_IVR)
9441 {
9442 if ((dep->regindex >= CR_IRR0
9443 && dep->regindex <= CR_IRR3)
9444 || dep->regindex == CR_TPR)
9445 {
9446 specs[count++] = tmpl;
9447 }
9448 }
9449 }
9450 }
9451 else
9452 {
9453 specs[count++] = tmpl;
9454 }
9455 }
800eeca4 9456 else
542d6675
KH		 9457 {
9458 UNHANDLED;
9459 }
800eeca4
JW		 9460 break;
9461
9462 case IA64_RS_INSERVICE:
9463 /* look for write of EOI (67) or read of IVR (65) */
9464 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9465 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9466 || (idesc->operands[1] == IA64_OPND_CR3
9467 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9468 {
9469 specs[count++] = tmpl;
9470 }
800eeca4
JW		 9471 break;
9472
9473 case IA64_RS_GR0:
9474 if (note == 1)
542d6675
KH		 9475 {
9476 specs[count++] = tmpl;
9477 }
800eeca4 9478 else
542d6675
KH		 9479 {
9480 UNHANDLED;
9481 }
800eeca4
JW		 9482 break;
9483
9484 case IA64_RS_CFM:
9485 if (note != 2)
542d6675
KH		 9486 {
9487 specs[count++] = tmpl;
9488 }
800eeca4 9489 else
542d6675
KH		 9490 {
9491 /* Check if any of the registers accessed are in the rotating region.
9492 mov to/from pr accesses CFM only when qp_regno is in the rotating
9493 region */
9494 for (i = 0; i < NELEMS (idesc->operands); i++)
9495 {
9496 if (idesc->operands[i] == IA64_OPND_R1
9497 || idesc->operands[i] == IA64_OPND_R2
9498 || idesc->operands[i] == IA64_OPND_R3)
9499 {
9500 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9501 /* Assumes that md.rot.num_regs is always valid */
9502 if (md.rot.num_regs > 0
9503 && num > 31
9504 && num < 31 + md.rot.num_regs)
9505 {
9506 specs[count] = tmpl;
9507 specs[count++].specific = 0;
9508 }
9509 }
9510 else if (idesc->operands[i] == IA64_OPND_F1
9511 || idesc->operands[i] == IA64_OPND_F2
9512 || idesc->operands[i] == IA64_OPND_F3
9513 || idesc->operands[i] == IA64_OPND_F4)
9514 {
9515 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9516 if (num > 31)
9517 {
9518 specs[count] = tmpl;
9519 specs[count++].specific = 0;
9520 }
9521 }
9522 else if (idesc->operands[i] == IA64_OPND_P1
9523 || idesc->operands[i] == IA64_OPND_P2)
9524 {
9525 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9526 if (num > 15)
9527 {
9528 specs[count] = tmpl;
9529 specs[count++].specific = 0;
9530 }
9531 }
9532 }
9533 if (CURR_SLOT.qp_regno > 15)
9534 {
9535 specs[count] = tmpl;
9536 specs[count++].specific = 0;
9537 }
9538 }
800eeca4
JW		 9539 break;
9540
139368c9
JW		 9541 /* This is the same as IA64_RS_PRr, except simplified to account for
9542 the fact that there is only one register. */
800eeca4
JW		 9543 case IA64_RS_PR63:
9544 if (note == 0)
542d6675
KH		 9545 {
9546 specs[count++] = tmpl;
9547 }
139368c9 9548 else if (note == 7)
40449e9f
KH		 9549 {
9550 valueT mask = 0;
9551 if (idesc->operands[2] == IA64_OPND_IMM17)
9552 mask = CURR_SLOT.opnd[2].X_add_number;
9553 if (mask & ((valueT) 1 << 63))
139368c9 9554 specs[count++] = tmpl;
40449e9f 9555 }
800eeca4 9556 else if (note == 11)
542d6675
KH		 9557 {
9558 if ((idesc->operands[0] == IA64_OPND_P1
9559 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9560 || (idesc->operands[1] == IA64_OPND_P2
9561 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9562 {
9563 specs[count++] = tmpl;
9564 }
9565 }
800eeca4 9566 else if (note == 12)
542d6675
KH		 9567 {
9568 if (CURR_SLOT.qp_regno == 63)
9569 {
9570 specs[count++] = tmpl;
9571 }
9572 }
800eeca4 9573 else if (note == 1)
542d6675
KH		 9574 {
9575 if (rsrc_write)
9576 {
40449e9f
KH		 9577 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9578 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9579 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9580 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9581
4a4f25cf 9582 if (p1 == 63
7484b8e6
TW		 9583 && (idesc->operands[0] == IA64_OPND_P1
9584 || idesc->operands[0] == IA64_OPND_P2))
9585 {
40449e9f 9586 specs[count] = tmpl;
4a4f25cf 9587 specs[count++].cmp_type =
7484b8e6
TW		 9588 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9589 }
9590 if (p2 == 63
9591 && (idesc->operands[1] == IA64_OPND_P1
9592 || idesc->operands[1] == IA64_OPND_P2))
9593 {
40449e9f 9594 specs[count] = tmpl;
4a4f25cf 9595 specs[count++].cmp_type =
7484b8e6
TW		 9596 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9597 }
542d6675
KH		 9598 }
9599 else
9600 {
9601 if (CURR_SLOT.qp_regno == 63)
9602 {
9603 specs[count++] = tmpl;
9604 }
9605 }
9606 }
800eeca4 9607 else
542d6675
KH		 9608 {
9609 UNHANDLED;
9610 }
800eeca4
JW		 9611 break;
9612
9613 case IA64_RS_RSE:
9614 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9615 read resources have not yet been completely identified, so for now
9616 treat RSE as a single resource */
800eeca4 9617 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9618 {
9619 if (rsrc_write)
9620 {
9621 if (idesc->operands[0] == IA64_OPND_AR3
9622 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9623 {
a66d2bb7 9624 specs[count++] = tmpl;
542d6675
KH		 9625 }
9626 }
9627 else
9628 {
9629 if (idesc->operands[0] == IA64_OPND_AR3)
9630 {
9631 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9632 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9633 {
9634 specs[count++] = tmpl;
9635 }
9636 }
9637 else if (idesc->operands[1] == IA64_OPND_AR3)
9638 {
9639 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9640 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9641 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9642 {
9643 specs[count++] = tmpl;
9644 }
9645 }
9646 }
9647 }
197865e8 9648 else
542d6675
KH		 9649 {
9650 specs[count++] = tmpl;
9651 }
800eeca4
JW		 9652 break;
9653
9654 case IA64_RS_ANY:
9655 /* FIXME -- do any of these need to be non-specific? */
9656 specs[count++] = tmpl;
9657 break;
9658
9659 default:
9660 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9661 break;
9662 }
9663
9664 return count;
9665}
9666
9667/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9668 QP of the marking instruction and a subsequent branch on the same QP. */
9669
800eeca4
JW		 9670static void
9671clear_qp_branch_flag (mask)
542d6675 9672 valueT mask;
800eeca4
JW		 9673{
9674 int i;
542d6675 9675 for (i = 0; i < regdepslen; i++)
800eeca4 9676 {
197865e8 9677 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9678 if ((bit & mask) != 0)
542d6675
KH		 9679 {
9680 regdeps[i].link_to_qp_branch = 0;
9681 }
800eeca4
JW		 9682 }
9683}
9684
5e2f6673
L		 9685/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9686 any mutexes which contain one of the PRs and create new ones when
9687 needed. */
9688
9689static int
9690update_qp_mutex (valueT mask)
9691{
9692 int i;
9693 int add = 0;
9694
9695 i = 0;
9696 while (i < qp_mutexeslen)
9697 {
9698 if ((qp_mutexes[i].prmask & mask) != 0)
9699 {
9700 /* If it destroys and creates the same mutex, do nothing. */
9701 if (qp_mutexes[i].prmask == mask
9702 && qp_mutexes[i].path == md.path)
9703 {
9704 i++;
9705 add = -1;
9706 }
9707 else
9708 {
9709 int keep = 0;
9710
9711 if (md.debug_dv)
9712 {
9713 fprintf (stderr, " Clearing mutex relation");
9714 print_prmask (qp_mutexes[i].prmask);
9715 fprintf (stderr, "\n");
9716 }
9717
9718 /* Deal with the old mutex with more than 3+ PRs only if
9719 the new mutex on the same execution path with it.
9720
9721 FIXME: The 3+ mutex support is incomplete.
9722 dot_pred_rel () may be a better place to fix it. */
9723 if (qp_mutexes[i].path == md.path)
9724 {
9725 /* If it is a proper subset of the mutex, create a
9726 new mutex. */
9727 if (add == 0
9728 && (qp_mutexes[i].prmask & mask) == mask)
9729 add = 1;
9730
9731 qp_mutexes[i].prmask &= ~mask;
9732 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9733 {
9734 /* Modify the mutex if there are more than one
9735 PR left. */
9736 keep = 1;
9737 i++;
9738 }
9739 }
9740
9741 if (keep == 0)
9742 /* Remove the mutex. */
9743 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9744 }
9745 }
9746 else
9747 ++i;
9748 }
9749
9750 if (add == 1)
9751 add_qp_mutex (mask);
9752
9753 return add;
9754}
9755
197865e8 9756/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9757
542d6675
KH		 9758 Any changes to a PR clears the mutex relations which include that PR. */
9759
800eeca4
JW		 9760static void
9761clear_qp_mutex (mask)
542d6675 9762 valueT mask;
800eeca4
JW		 9763{
9764 int i;
9765
9766 i = 0;
9767 while (i < qp_mutexeslen)
9768 {
9769 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9770 {
9771 if (md.debug_dv)
9772 {
9773 fprintf (stderr, " Clearing mutex relation");
9774 print_prmask (qp_mutexes[i].prmask);
9775 fprintf (stderr, "\n");
9776 }
9777 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9778 }
800eeca4 9779 else
542d6675 9780 ++i;
800eeca4
JW		 9781 }
9782}
9783
9784/* Clear implies relations which contain PRs in the given masks.
9785 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9786 indicates the implied PR. */
9787
800eeca4
JW		 9788static void
9789clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9790 valueT p1_mask;
9791 valueT p2_mask;
800eeca4
JW		 9792{
9793 int i;
9794
9795 i = 0;
9796 while (i < qp_implieslen)
9797 {
197865e8 9798 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9799 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9800 {
9801 if (md.debug_dv)
9802 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9803 qp_implies[i].p1, qp_implies[i].p2);
9804 qp_implies[i] = qp_implies[--qp_implieslen];
9805 }
197865e8 9806 else
542d6675 9807 ++i;
800eeca4
JW		 9808 }
9809}
9810
542d6675
KH		 9811/* Add the PRs specified to the list of implied relations. */
9812
800eeca4
JW		 9813static void
9814add_qp_imply (p1, p2)
542d6675 9815 int p1, p2;
800eeca4
JW		 9816{
9817 valueT mask;
9818 valueT bit;
9819 int i;
9820
542d6675 9821 /* p0 is not meaningful here. */
800eeca4
JW		 9822 if (p1 == 0 || p2 == 0)
9823 abort ();
9824
9825 if (p1 == p2)
9826 return;
9827
542d6675
KH		 9828 /* If it exists already, ignore it. */
9829 for (i = 0; i < qp_implieslen; i++)
800eeca4 9830 {
197865e8 9831 if (qp_implies[i].p1 == p1
542d6675
KH		 9832 && qp_implies[i].p2 == p2
9833 && qp_implies[i].path == md.path
9834 && !qp_implies[i].p2_branched)
9835 return;
800eeca4
JW		 9836 }
9837
9838 if (qp_implieslen == qp_impliestotlen)
9839 {
9840 qp_impliestotlen += 20;
9841 qp_implies = (struct qp_imply *)
542d6675
KH		 9842 xrealloc ((void *) qp_implies,
9843 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9844 }
9845 if (md.debug_dv)
9846 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9847 qp_implies[qp_implieslen].p1 = p1;
9848 qp_implies[qp_implieslen].p2 = p2;
9849 qp_implies[qp_implieslen].path = md.path;
9850 qp_implies[qp_implieslen++].p2_branched = 0;
9851
9852 /* Add in the implied transitive relations; for everything that p2 implies,
9853 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9854 as well. */
542d6675 9855 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9856 {
9857 if (qp_implies[i].p1 == p2)
542d6675 9858 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9859 if (qp_implies[i].p2 == p1)
542d6675 9860 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9861 }
9862 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9863 relation containing p2, duplicate it and replace p2 with p1. */
9864 bit = (valueT) 1 << p1;
9865 mask = (valueT) 1 << p2;
542d6675 9866 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9867 {
9868 if (qp_mutexes[i].prmask & mask)
542d6675 9869 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9870 }
9871}
9872
800eeca4
JW		 9873/* Add the PRs specified in the mask to the mutex list; this means that only
9874 one of the PRs can be true at any time. PR0 should never be included in
9875 the mask. */
542d6675 9876
800eeca4
JW		 9877static void
9878add_qp_mutex (mask)
542d6675 9879 valueT mask;
800eeca4
JW		 9880{
9881 if (mask & 0x1)
9882 abort ();
9883
9884 if (qp_mutexeslen == qp_mutexestotlen)
9885 {
9886 qp_mutexestotlen += 20;
9887 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9888 xrealloc ((void *) qp_mutexes,
9889 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9890 }
9891 if (md.debug_dv)
9892 {
9893 fprintf (stderr, " Registering mutex on");
9894 print_prmask (mask);
9895 fprintf (stderr, "\n");
9896 }
9897 qp_mutexes[qp_mutexeslen].path = md.path;
9898 qp_mutexes[qp_mutexeslen++].prmask = mask;
9899}
9900
cb5301b6
RH		 9901static int
9902has_suffix_p (name, suffix)
40449e9f
KH		 9903 const char *name;
9904 const char *suffix;
cb5301b6
RH		 9905{
9906 size_t namelen = strlen (name);
9907 size_t sufflen = strlen (suffix);
9908
9909 if (namelen <= sufflen)
9910 return 0;
9911 return strcmp (name + namelen - sufflen, suffix) == 0;
9912}
9913
800eeca4
JW		 9914static void
9915clear_register_values ()
9916{
9917 int i;
9918 if (md.debug_dv)
9919 fprintf (stderr, " Clearing register values\n");
542d6675 9920 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9921 gr_values[i].known = 0;
9922}
9923
9924/* Keep track of register values/changes which affect DV tracking.
9925
9926 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9927 have to examine a group of strings to identify them. */
800eeca4 9928
800eeca4
JW		 9929static void
9930note_register_values (idesc)
542d6675 9931 struct ia64_opcode *idesc;
800eeca4
JW		 9932{
9933 valueT qp_changemask = 0;
9934 int i;
9935
542d6675
KH		 9936 /* Invalidate values for registers being written to. */
9937 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9938 {
197865e8 9939 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9940 || idesc->operands[i] == IA64_OPND_R2
9941 || idesc->operands[i] == IA64_OPND_R3)
9942 {
9943 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9944 if (regno > 0 && regno < NELEMS (gr_values))
9945 gr_values[regno].known = 0;
9946 }
50b81f19
JW		 9947 else if (idesc->operands[i] == IA64_OPND_R3_2)
9948 {
9949 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9950 if (regno > 0 && regno < 4)
9951 gr_values[regno].known = 0;
9952 }
197865e8 9953 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9954 || idesc->operands[i] == IA64_OPND_P2)
9955 {
9956 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9957 qp_changemask |= (valueT) 1 << regno;
9958 }
800eeca4 9959 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9960 {
9961 if (idesc->operands[2] & (valueT) 0x10000)
9962 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9963 else
9964 qp_changemask = idesc->operands[2];
9965 break;
9966 }
800eeca4 9967 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9968 {
9969 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9970 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9971 else
9972 qp_changemask = idesc->operands[1];
9973 qp_changemask &= ~(valueT) 0xFFFF;
9974 break;
9975 }
9976 }
9977
9978 /* Always clear qp branch flags on any PR change. */
9979 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9980 clear_qp_branch_flag (qp_changemask);
9981
542d6675 9982 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9983 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9984 {
197865e8 9985 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9986 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9987 {
9988 for (i = 32; i < 32 + md.rot.num_regs; i++)
9989 gr_values[i].known = 0;
9990 }
800eeca4
JW		 9991 clear_qp_mutex (qp_changemask);
9992 clear_qp_implies (qp_changemask, qp_changemask);
9993 }
542d6675
KH		 9994 /* After a call, all register values are undefined, except those marked
9995 as "safe". */
800eeca4 9996 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9997 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9998 {
56d27c17 9999 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 10000 clear_register_values ();
10001 clear_qp_mutex (~qp_safe_across_calls);
10002 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
10003 clear_qp_branch_flag (~qp_safe_across_calls);
10004 }
e9718fe1 10005 else if (is_interruption_or_rfi (idesc)
542d6675 10006 || is_taken_branch (idesc))
e9718fe1
TW		 10007 {
10008 clear_register_values ();
197865e8
KH		 10009 clear_qp_mutex (~(valueT) 0);
10010 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 10011 }
542d6675 10012 /* Look for mutex and implies relations. */
197865e8 10013 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 10014 || idesc->operands[0] == IA64_OPND_P2)
10015 && (idesc->operands[1] == IA64_OPND_P1
10016 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 10017 {
10018 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 10019 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 10020 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
10021 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 10022
5e2f6673
L		 10023 /* If both PRs are PR0, we can't really do anything. */
10024 if (p1 == 0 && p2 == 0)
542d6675
KH		 10025 {
10026 if (md.debug_dv)
10027 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
10028 }
800eeca4 10029 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 10030 with the following exceptions. */
cb5301b6
RH		 10031 else if (has_suffix_p (idesc->name, ".or.andcm")
10032 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 10033 {
542d6675
KH		 10034 clear_qp_implies (p2mask, p1mask);
10035 }
cb5301b6
RH		 10036 else if (has_suffix_p (idesc->name, ".andcm")
10037 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 10038 {
10039 clear_qp_implies (0, p1mask | p2mask);
10040 }
cb5301b6
RH		 10041 else if (has_suffix_p (idesc->name, ".orcm")
10042 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 10043 {
10044 clear_qp_mutex (p1mask | p2mask);
10045 clear_qp_implies (p1mask | p2mask, 0);
10046 }
800eeca4 10047 else
542d6675 10048 {
5e2f6673
L		 10049 int added = 0;
10050
542d6675 10051 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 10052
10053 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10054 if (p1 == 0 || p2 == 0)
10055 clear_qp_mutex (p1mask | p2mask);
10056 else
10057 added = update_qp_mutex (p1mask | p2mask);
10058
10059 if (CURR_SLOT.qp_regno == 0
10060 || has_suffix_p (idesc->name, ".unc"))
542d6675 10061 {
5e2f6673
L		 10062 if (added == 0 && p1 && p2)
10063 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 10064 if (CURR_SLOT.qp_regno != 0)
10065 {
5e2f6673
L		 10066 if (p1)
10067 add_qp_imply (p1, CURR_SLOT.qp_regno);
10068 if (p2)
10069 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 10070 }
10071 }
542d6675
KH		 10072 }
10073 }
10074 /* Look for mov imm insns into GRs. */
800eeca4 10075 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 10076 && (idesc->operands[1] == IA64_OPND_IMM22
10077 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 10078 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 10079 && (strcmp (idesc->name, "mov") == 0
10080 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 10081 {
10082 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 10083 if (regno > 0 && regno < NELEMS (gr_values))
10084 {
10085 gr_values[regno].known = 1;
10086 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
10087 gr_values[regno].path = md.path;
10088 if (md.debug_dv)
2434f565
JW		 10089 {
10090 fprintf (stderr, " Know gr%d = ", regno);
10091 fprintf_vma (stderr, gr_values[regno].value);
10092 fputs ("\n", stderr);
10093 }
542d6675 10094 }
800eeca4 10095 }
a66d2bb7
JB		 10096 /* Look for dep.z imm insns. */
10097 else if (idesc->operands[0] == IA64_OPND_R1
10098 && idesc->operands[1] == IA64_OPND_IMM8
10099 && strcmp (idesc->name, "dep.z") == 0)
10100 {
10101 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
10102 if (regno > 0 && regno < NELEMS (gr_values))
10103 {
10104 valueT value = CURR_SLOT.opnd[1].X_add_number;
10105
10106 if (CURR_SLOT.opnd[3].X_add_number < 64)
10107 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
10108 value <<= CURR_SLOT.opnd[2].X_add_number;
10109 gr_values[regno].known = 1;
10110 gr_values[regno].value = value;
10111 gr_values[regno].path = md.path;
10112 if (md.debug_dv)
10113 {
10114 fprintf (stderr, " Know gr%d = ", regno);
10115 fprintf_vma (stderr, gr_values[regno].value);
10116 fputs ("\n", stderr);
10117 }
10118 }
10119 }
197865e8 10120 else
800eeca4
JW		 10121 {
10122 clear_qp_mutex (qp_changemask);
10123 clear_qp_implies (qp_changemask, qp_changemask);
10124 }
10125}
10126
542d6675
KH		 10127/* Return whether the given predicate registers are currently mutex. */
10128
800eeca4
JW		 10129static int
10130qp_mutex (p1, p2, path)
542d6675
KH		 10131 int p1;
10132 int p2;
10133 int path;
800eeca4
JW		 10134{
10135 int i;
10136 valueT mask;
10137
10138 if (p1 != p2)
10139 {
542d6675
KH		 10140 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
10141 for (i = 0; i < qp_mutexeslen; i++)
10142 {
10143 if (qp_mutexes[i].path >= path
10144 && (qp_mutexes[i].prmask & mask) == mask)
10145 return 1;
10146 }
800eeca4
JW		 10147 }
10148 return 0;
10149}
10150
10151/* Return whether the given resource is in the given insn's list of chks
10152 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 10153 conflict. */
10154
800eeca4
JW		 10155static int
10156resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 10157 struct rsrc *rs;
10158 struct ia64_opcode *idesc;
10159 int note;
10160 int qp_regno;
10161 int path;
800eeca4
JW		 10162{
10163 struct rsrc specs[MAX_SPECS];
10164 int count;
10165
10166 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10167 we don't need to check. One exception is note 11, which indicates that
10168 target predicates are written regardless of PR[qp]. */
197865e8 10169 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 10170 && note != 11)
10171 return 0;
10172
10173 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
10174 while (count-- > 0)
10175 {
10176 /* UNAT checking is a bit more specific than other resources */
10177 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 10178 && specs[count].mem_offset.hint
10179 && rs->mem_offset.hint)
10180 {
10181 if (rs->mem_offset.base == specs[count].mem_offset.base)
10182 {
10183 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
10184 ((specs[count].mem_offset.offset >> 3) & 0x3F))
10185 return 1;
10186 else
10187 continue;
10188 }
10189 }
800eeca4 10190
7484b8e6 10191 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 10192 writes are an OR. */
7484b8e6 10193 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 10194 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 10195 || rs->dependency->specifier == IA64_RS_PR63)
10196 {
10197 if (specs[count].cmp_type != CMP_NONE
10198 && specs[count].cmp_type == rs->cmp_type)
10199 {
10200 if (md.debug_dv)
10201 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10202 dv_mode[rs->dependency->mode],
afa680f8 10203 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 10204 specs[count].index : 63);
10205 continue;
10206 }
10207 if (md.debug_dv)
4a4f25cf 10208 fprintf (stderr,
7484b8e6
TW		 10209 " %s on parallel compare conflict %s vs %s on PR%d\n",
10210 dv_mode[rs->dependency->mode],
4a4f25cf 10211 dv_cmp_type[rs->cmp_type],
7484b8e6 10212 dv_cmp_type[specs[count].cmp_type],
afa680f8 10213 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 10214 specs[count].index : 63);
4a4f25cf 10215
7484b8e6
TW		 10216 }
10217
800eeca4 10218 /* If either resource is not specific, conservatively assume a conflict
197865e8 10219 */
800eeca4 10220 if (!specs[count].specific || !rs->specific)
542d6675 10221 return 2;
800eeca4 10222 else if (specs[count].index == rs->index)
542d6675 10223 return 1;
800eeca4 10224 }
800eeca4
JW		 10225
10226 return 0;
10227}
10228
10229/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10230 insert a stop to create the break. Update all resource dependencies
10231 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10232 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10233 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 10234 instruction. */
800eeca4
JW		 10235
10236static void
10237insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 10238 int insert_stop;
10239 int qp_regno;
10240 int save_current;
800eeca4
JW		 10241{
10242 int i;
10243
10244 if (insert_stop && md.num_slots_in_use > 0)
10245 PREV_SLOT.end_of_insn_group = 1;
10246
10247 if (md.debug_dv)
10248 {
197865e8 10249 fprintf (stderr, " Insn group break%s",
542d6675 10250 (insert_stop ? " (w/stop)" : ""));
800eeca4 10251 if (qp_regno != 0)
542d6675 10252 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 10253 fprintf (stderr, "\n");
10254 }
10255
10256 i = 0;
10257 while (i < regdepslen)
10258 {
10259 const struct ia64_dependency *dep = regdeps[i].dependency;
10260
10261 if (qp_regno != 0
542d6675
KH		 10262 && regdeps[i].qp_regno != qp_regno)
10263 {
10264 ++i;
10265 continue;
10266 }
800eeca4
JW		 10267
10268 if (save_current
542d6675
KH		 10269 && CURR_SLOT.src_file == regdeps[i].file
10270 && CURR_SLOT.src_line == regdeps[i].line)
10271 {
10272 ++i;
10273 continue;
10274 }
800eeca4
JW		 10275
10276 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10277 those that have reached the appropriate state of insn serialization */
800eeca4 10278 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10279 || dep->semantics == IA64_DVS_IMPLIEDF
10280 || regdeps[i].insn_srlz == STATE_SRLZ)
10281 {
10282 print_dependency ("Removing", i);
10283 regdeps[i] = regdeps[--regdepslen];
10284 }
800eeca4 10285 else
542d6675
KH		 10286 {
10287 if (dep->semantics == IA64_DVS_DATA
10288 || dep->semantics == IA64_DVS_INSTR
800eeca4 10289 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10290 {
10291 if (regdeps[i].insn_srlz == STATE_NONE)
10292 regdeps[i].insn_srlz = STATE_STOP;
10293 if (regdeps[i].data_srlz == STATE_NONE)
10294 regdeps[i].data_srlz = STATE_STOP;
10295 }
10296 ++i;
10297 }
800eeca4
JW		 10298 }
10299}
10300
542d6675
KH		 10301/* Add the given resource usage spec to the list of active dependencies. */
10302
197865e8 10303static void
800eeca4 10304mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10305 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10306 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10307 struct rsrc *spec;
10308 int depind;
10309 int path;
800eeca4
JW		 10310{
10311 if (regdepslen == regdepstotlen)
10312 {
10313 regdepstotlen += 20;
10314 regdeps = (struct rsrc *)
542d6675 10315 xrealloc ((void *) regdeps,
bc805888 10316 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10317 }
10318
10319 regdeps[regdepslen] = *spec;
10320 regdeps[regdepslen].depind = depind;
10321 regdeps[regdepslen].path = path;
10322 regdeps[regdepslen].file = CURR_SLOT.src_file;
10323 regdeps[regdepslen].line = CURR_SLOT.src_line;
10324
10325 print_dependency ("Adding", regdepslen);
10326
10327 ++regdepslen;
10328}
10329
10330static void
10331print_dependency (action, depind)
542d6675
KH		 10332 const char *action;
10333 int depind;
800eeca4
JW		 10334{
10335 if (md.debug_dv)
10336 {
197865e8 10337 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10338 action, dv_mode[(regdeps[depind].dependency)->mode],
10339 (regdeps[depind].dependency)->name);
a66d2bb7 10340 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10341 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10342 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10343 {
10344 fputs (" ", stderr);
10345 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10346 fputs ("+", stderr);
10347 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10348 }
800eeca4
JW		 10349 fprintf (stderr, "\n");
10350 }
10351}
10352
10353static void
10354instruction_serialization ()
10355{
10356 int i;
10357 if (md.debug_dv)
10358 fprintf (stderr, " Instruction serialization\n");
542d6675 10359 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10360 if (regdeps[i].insn_srlz == STATE_STOP)
10361 regdeps[i].insn_srlz = STATE_SRLZ;
10362}
10363
10364static void
10365data_serialization ()
10366{
10367 int i = 0;
10368 if (md.debug_dv)
10369 fprintf (stderr, " Data serialization\n");
10370 while (i < regdepslen)
10371 {
10372 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10373 /* Note: as of 991210, all "other" dependencies are cleared by a
10374 data serialization. This might change with new tables */
10375 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10376 {
10377 print_dependency ("Removing", i);
10378 regdeps[i] = regdeps[--regdepslen];
10379 }
800eeca4 10380 else
542d6675 10381 ++i;
800eeca4
JW		 10382 }
10383}
10384
542d6675
KH		 10385/* Insert stops and serializations as needed to avoid DVs. */
10386
800eeca4
JW		 10387static void
10388remove_marked_resource (rs)
542d6675 10389 struct rsrc *rs;
800eeca4
JW		 10390{
10391 switch (rs->dependency->semantics)
10392 {
10393 case IA64_DVS_SPECIFIC:
10394 if (md.debug_dv)
10395 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10396 /* ...fall through... */
800eeca4
JW		 10397 case IA64_DVS_INSTR:
10398 if (md.debug_dv)
542d6675 10399 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10400 if (rs->insn_srlz < STATE_STOP)
542d6675 10401 insn_group_break (1, 0, 0);
800eeca4 10402 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10403 {
888a75be 10404 struct slot oldslot = CURR_SLOT;
542d6675 10405 /* Manually jam a srlz.i insn into the stream */
888a75be 10406 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10407 CURR_SLOT.user_template = -1;
542d6675
KH		 10408 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10409 instruction_serialization ();
10410 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10411 if (++md.num_slots_in_use >= NUM_SLOTS)
10412 emit_one_bundle ();
888a75be 10413 CURR_SLOT = oldslot;
542d6675 10414 }
800eeca4
JW		 10415 insn_group_break (1, 0, 0);
10416 break;
10417 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10418 "other" types of DV are eliminated
10419 by a data serialization */
800eeca4
JW		 10420 case IA64_DVS_DATA:
10421 if (md.debug_dv)
542d6675 10422 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10423 if (rs->data_srlz < STATE_STOP)
542d6675 10424 insn_group_break (1, 0, 0);
800eeca4 10425 {
888a75be 10426 struct slot oldslot = CURR_SLOT;
542d6675 10427 /* Manually jam a srlz.d insn into the stream */
888a75be 10428 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10429 CURR_SLOT.user_template = -1;
542d6675
KH		 10430 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10431 data_serialization ();
10432 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10433 if (++md.num_slots_in_use >= NUM_SLOTS)
10434 emit_one_bundle ();
888a75be 10435 CURR_SLOT = oldslot;
800eeca4
JW		 10436 }
10437 break;
10438 case IA64_DVS_IMPLIED:
10439 case IA64_DVS_IMPLIEDF:
10440 if (md.debug_dv)
542d6675 10441 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10442 insn_group_break (1, 0, 0);
10443 break;
10444 default:
10445 break;
10446 }
10447}
10448
10449/* Check the resources used by the given opcode against the current dependency
197865e8 10450 list.
800eeca4
JW		 10451
10452 The check is run once for each execution path encountered. In this case,
10453 a unique execution path is the sequence of instructions following a code
10454 entry point, e.g. the following has three execution paths, one starting
10455 at L0, one at L1, and one at L2.
197865e8 10456
800eeca4
JW		 10457 L0: nop
10458 L1: add
10459 L2: add
197865e8 10460 br.ret
800eeca4 10461*/
542d6675 10462
800eeca4
JW		 10463static void
10464check_dependencies (idesc)
542d6675 10465 struct ia64_opcode *idesc;
800eeca4
JW		 10466{
10467 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10468 int path;
10469 int i;
10470
10471 /* Note that the number of marked resources may change within the
197865e8 10472 loop if in auto mode. */
800eeca4
JW		 10473 i = 0;
10474 while (i < regdepslen)
10475 {
10476 struct rsrc *rs = &regdeps[i];
10477 const struct ia64_dependency *dep = rs->dependency;
10478 int chkind;
10479 int note;
10480 int start_over = 0;
10481
10482 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10483 || (chkind = depends_on (rs->depind, idesc)) == -1)
10484 {
10485 ++i;
10486 continue;
10487 }
10488
10489 note = NOTE (opdeps->chks[chkind]);
10490
10491 /* Check this resource against each execution path seen thus far. */
10492 for (path = 0; path <= md.path; path++)
10493 {
10494 int matchtype;
10495
10496 /* If the dependency wasn't on the path being checked, ignore it. */
10497 if (rs->path < path)
10498 continue;
10499
10500 /* If the QP for this insn implies a QP which has branched, don't
10501 bother checking. Ed. NOTE: I don't think this check is terribly
10502 useful; what's the point of generating code which will only be
10503 reached if its QP is zero?
10504 This code was specifically inserted to handle the following code,
10505 based on notes from Intel's DV checking code, where p1 implies p2.
10506
10507 mov r4 = 2
10508 (p2) br.cond L
10509 (p1) mov r4 = 7
10510 */
10511 if (CURR_SLOT.qp_regno != 0)
10512 {
10513 int skip = 0;
10514 int implies;
10515 for (implies = 0; implies < qp_implieslen; implies++)
10516 {
10517 if (qp_implies[implies].path >= path
10518 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10519 && qp_implies[implies].p2_branched)
10520 {
10521 skip = 1;
10522 break;
10523 }
10524 }
10525 if (skip)
10526 continue;
10527 }
10528
10529 if ((matchtype = resources_match (rs, idesc, note,
10530 CURR_SLOT.qp_regno, path)) != 0)
10531 {
10532 char msg[1024];
10533 char pathmsg[256] = "";
10534 char indexmsg[256] = "";
10535 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10536
10537 if (path != 0)
10538 sprintf (pathmsg, " when entry is at label '%s'",
10539 md.entry_labels[path - 1]);
a66d2bb7 10540 if (matchtype == 1 && rs->index >= 0)
542d6675
KH		 10541 sprintf (indexmsg, ", specific resource number is %d",
10542 rs->index);
10543 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10544 idesc->name,
10545 (certain ? "violates" : "may violate"),
10546 dv_mode[dep->mode], dep->name,
10547 dv_sem[dep->semantics],
10548 pathmsg, indexmsg);
10549
10550 if (md.explicit_mode)
10551 {
10552 as_warn ("%s", msg);
10553 if (path < md.path)
10554 as_warn (_("Only the first path encountering the conflict "
10555 "is reported"));
10556 as_warn_where (rs->file, rs->line,
10557 _("This is the location of the "
10558 "conflicting usage"));
10559 /* Don't bother checking other paths, to avoid duplicating
10560 the same warning */
10561 break;
10562 }
10563 else
10564 {
10565 if (md.debug_dv)
10566 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10567
10568 remove_marked_resource (rs);
10569
10570 /* since the set of dependencies has changed, start over */
10571 /* FIXME -- since we're removing dvs as we go, we
10572 probably don't really need to start over... */
10573 start_over = 1;
10574 break;
10575 }
10576 }
10577 }
800eeca4 10578 if (start_over)
542d6675 10579 i = 0;
800eeca4 10580 else
542d6675 10581 ++i;
800eeca4
JW		 10582 }
10583}
10584
542d6675
KH		 10585/* Register new dependencies based on the given opcode. */
10586
800eeca4
JW		 10587static void
10588mark_resources (idesc)
542d6675 10589 struct ia64_opcode *idesc;
800eeca4
JW		 10590{
10591 int i;
10592 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10593 int add_only_qp_reads = 0;
10594
10595 /* A conditional branch only uses its resources if it is taken; if it is
10596 taken, we stop following that path. The other branch types effectively
10597 *always* write their resources. If it's not taken, register only QP
197865e8 10598 reads. */
800eeca4
JW		 10599 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10600 {
10601 add_only_qp_reads = 1;
10602 }
10603
10604 if (md.debug_dv)
10605 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10606
542d6675 10607 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10608 {
10609 const struct ia64_dependency *dep;
10610 struct rsrc specs[MAX_SPECS];
10611 int note;
10612 int path;
10613 int count;
197865e8 10614
800eeca4 10615 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10616 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10617
10618 if (add_only_qp_reads
542d6675
KH		 10619 && !(dep->mode == IA64_DV_WAR
10620 && (dep->specifier == IA64_RS_PR
139368c9 10621 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10622 || dep->specifier == IA64_RS_PR63)))
10623 continue;
800eeca4
JW		 10624
10625 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10626
800eeca4 10627 while (count-- > 0)
542d6675
KH		 10628 {
10629 mark_resource (idesc, dep, &specs[count],
10630 DEP (opdeps->regs[i]), md.path);
10631 }
800eeca4
JW		 10632
10633 /* The execution path may affect register values, which may in turn
542d6675 10634 affect which indirect-access resources are accessed. */
800eeca4 10635 switch (dep->specifier)
542d6675
KH		 10636 {
10637 default:
10638 break;
10639 case IA64_RS_CPUID:
10640 case IA64_RS_DBR:
10641 case IA64_RS_IBR:
800eeca4 10642 case IA64_RS_MSR:
542d6675
KH		 10643 case IA64_RS_PKR:
10644 case IA64_RS_PMC:
10645 case IA64_RS_PMD:
10646 case IA64_RS_RR:
10647 for (path = 0; path < md.path; path++)
10648 {
10649 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10650 while (count-- > 0)
10651 mark_resource (idesc, dep, &specs[count],
10652 DEP (opdeps->regs[i]), path);
10653 }
10654 break;
10655 }
10656 }
10657}
10658
10659/* Remove dependencies when they no longer apply. */
10660
800eeca4
JW		 10661static void
10662update_dependencies (idesc)
542d6675 10663 struct ia64_opcode *idesc;
800eeca4
JW		 10664{
10665 int i;
10666
10667 if (strcmp (idesc->name, "srlz.i") == 0)
10668 {
10669 instruction_serialization ();
10670 }
10671 else if (strcmp (idesc->name, "srlz.d") == 0)
10672 {
10673 data_serialization ();
10674 }
10675 else if (is_interruption_or_rfi (idesc)
542d6675 10676 || is_taken_branch (idesc))
800eeca4 10677 {
542d6675
KH		 10678 /* Although technically the taken branch doesn't clear dependencies
10679 which require a srlz.[id], we don't follow the branch; the next
10680 instruction is assumed to start with a clean slate. */
800eeca4 10681 regdepslen = 0;
800eeca4
JW		 10682 md.path = 0;
10683 }
10684 else if (is_conditional_branch (idesc)
542d6675 10685 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10686 {
10687 int is_call = strstr (idesc->name, ".call") != NULL;
10688
542d6675
KH		 10689 for (i = 0; i < qp_implieslen; i++)
10690 {
10691 /* If the conditional branch's predicate is implied by the predicate
10692 in an existing dependency, remove that dependency. */
10693 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10694 {
10695 int depind = 0;
10696 /* Note that this implied predicate takes a branch so that if
10697 a later insn generates a DV but its predicate implies this
10698 one, we can avoid the false DV warning. */
10699 qp_implies[i].p2_branched = 1;
10700 while (depind < regdepslen)
10701 {
10702 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10703 {
10704 print_dependency ("Removing", depind);
10705 regdeps[depind] = regdeps[--regdepslen];
10706 }
10707 else
10708 ++depind;
10709 }
10710 }
10711 }
800eeca4 10712 /* Any marked resources which have this same predicate should be
542d6675
KH		 10713 cleared, provided that the QP hasn't been modified between the
10714 marking instruction and the branch. */
800eeca4 10715 if (is_call)
542d6675
KH		 10716 {
10717 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10718 }
800eeca4 10719 else
542d6675
KH		 10720 {
10721 i = 0;
10722 while (i < regdepslen)
10723 {
10724 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10725 && regdeps[i].link_to_qp_branch
10726 && (regdeps[i].file != CURR_SLOT.src_file
10727 || regdeps[i].line != CURR_SLOT.src_line))
10728 {
10729 /* Treat like a taken branch */
10730 print_dependency ("Removing", i);
10731 regdeps[i] = regdeps[--regdepslen];
10732 }
10733 else
10734 ++i;
10735 }
10736 }
800eeca4
JW		 10737 }
10738}
10739
10740/* Examine the current instruction for dependency violations. */
542d6675 10741
800eeca4
JW		 10742static int
10743check_dv (idesc)
542d6675 10744 struct ia64_opcode *idesc;
800eeca4
JW		 10745{
10746 if (md.debug_dv)
10747 {
197865e8 10748 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10749 idesc->name, CURR_SLOT.src_line,
10750 idesc->dependencies->nchks,
10751 idesc->dependencies->nregs);
800eeca4
JW		 10752 }
10753
197865e8 10754 /* Look through the list of currently marked resources; if the current
800eeca4 10755 instruction has the dependency in its chks list which uses that resource,
542d6675 10756 check against the specific resources used. */
800eeca4
JW		 10757 check_dependencies (idesc);
10758
542d6675
KH		 10759 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10760 then add them to the list of marked resources. */
800eeca4
JW		 10761 mark_resources (idesc);
10762
10763 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10764 requirements for being cleared
10765
800eeca4
JW		 10766 Instruction serialization (insns separated by interruption, rfi, or
10767 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10768
10769 Data serialization (instruction serialization, or writer + srlz.d +
10770 reader, where writer and srlz.d are in separate groups) clears
10771 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10772 always be the case).
10773
10774 Instruction group break (groups separated by stop, taken branch,
10775 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10776 */
10777 update_dependencies (idesc);
10778
10779 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10780 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10781 note_register_values (idesc);
10782
197865e8 10783 /* We don't need or want this anymore. */
800eeca4
JW		 10784 md.mem_offset.hint = 0;
10785
10786 return 0;
10787}
10788
10789/* Translate one line of assembly. Pseudo ops and labels do not show
10790 here. */
10791void
10792md_assemble (str)
10793 char *str;
10794{
10795 char *saved_input_line_pointer, *mnemonic;
10796 const struct pseudo_opcode *pdesc;
10797 struct ia64_opcode *idesc;
10798 unsigned char qp_regno;
10799 unsigned int flags;
10800 int ch;
10801
10802 saved_input_line_pointer = input_line_pointer;
10803 input_line_pointer = str;
10804
542d6675 10805 /* extract the opcode (mnemonic): */
800eeca4
JW		 10806
10807 mnemonic = input_line_pointer;
10808 ch = get_symbol_end ();
10809 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10810 if (pdesc)
10811 {
10812 *input_line_pointer = ch;
10813 (*pdesc->handler) (pdesc->arg);
10814 goto done;
10815 }
10816
542d6675 10817 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10818
10819 idesc = ia64_find_opcode (mnemonic);
10820 *input_line_pointer = ch;
10821 if (!idesc)
10822 {
10823 as_bad ("Unknown opcode `%s'", mnemonic);
10824 goto done;
10825 }
10826
10827 idesc = parse_operands (idesc);
10828 if (!idesc)
10829 goto done;
10830
542d6675 10831 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10832 if (idesc->type == IA64_TYPE_DYN)
10833 {
10834 if (strcmp (idesc->name, "add") == 0)
10835 {
10836 if (CURR_SLOT.opnd[2].X_op == O_register
10837 && CURR_SLOT.opnd[2].X_add_number < 4)
10838 mnemonic = "addl";
10839 else
10840 mnemonic = "adds";
3d56ab85 10841 ia64_free_opcode (idesc);
800eeca4 10842 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10843 }
10844 else if (strcmp (idesc->name, "mov") == 0)
10845 {
10846 enum ia64_opnd opnd1, opnd2;
10847 int rop;
10848
10849 opnd1 = idesc->operands[0];
10850 opnd2 = idesc->operands[1];
10851 if (opnd1 == IA64_OPND_AR3)
10852 rop = 0;
10853 else if (opnd2 == IA64_OPND_AR3)
10854 rop = 1;
10855 else
10856 abort ();
652ca075
L		 10857 if (CURR_SLOT.opnd[rop].X_op == O_register)
10858 {
10859 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10860 mnemonic = "mov.i";
97762d08 10861 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10862 mnemonic = "mov.m";
97762d08
JB		 10863 else
10864 rop = -1;
652ca075 10865 }
800eeca4 10866 else
652ca075 10867 abort ();
97762d08
JB		 10868 if (rop >= 0)
10869 {
10870 ia64_free_opcode (idesc);
10871 idesc = ia64_find_opcode (mnemonic);
10872 while (idesc != NULL
10873 && (idesc->operands[0] != opnd1
10874 || idesc->operands[1] != opnd2))
10875 idesc = get_next_opcode (idesc);
10876 }
800eeca4
JW		 10877 }
10878 }
652ca075
L		 10879 else if (strcmp (idesc->name, "mov.i") == 0
10880 || strcmp (idesc->name, "mov.m") == 0)
10881 {
10882 enum ia64_opnd opnd1, opnd2;
10883 int rop;
10884
10885 opnd1 = idesc->operands[0];
10886 opnd2 = idesc->operands[1];
10887 if (opnd1 == IA64_OPND_AR3)
10888 rop = 0;
10889 else if (opnd2 == IA64_OPND_AR3)
10890 rop = 1;
10891 else
10892 abort ();
10893 if (CURR_SLOT.opnd[rop].X_op == O_register)
10894 {
10895 char unit = 'a';
10896 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10897 unit = 'i';
10898 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10899 unit = 'm';
10900 if (unit != 'a' && unit != idesc->name [4])
80b8152b 10901 as_bad ("AR %d can only be accessed by %c-unit",
652ca075
L		 10902 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10903 TOUPPER (unit));
10904 }
10905 }
91d777ee
L		 10906 else if (strcmp (idesc->name, "hint.b") == 0)
10907 {
10908 switch (md.hint_b)
10909 {
10910 case hint_b_ok:
10911 break;
10912 case hint_b_warning:
10913 as_warn ("hint.b may be treated as nop");
10914 break;
10915 case hint_b_error:
10916 as_bad ("hint.b shouldn't be used");
10917 break;
10918 }
10919 }
800eeca4
JW		 10920
10921 qp_regno = 0;
10922 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10923 {
10924 qp_regno = md.qp.X_add_number - REG_P;
10925 md.qp.X_op = O_absent;
10926 }
800eeca4
JW		 10927
10928 flags = idesc->flags;
10929
10930 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10931 {
10932 /* The alignment frag has to end with a stop bit only if the
10933 next instruction after the alignment directive has to be
10934 the first instruction in an instruction group. */
10935 if (align_frag)
10936 {
10937 while (align_frag->fr_type != rs_align_code)
10938 {
10939 align_frag = align_frag->fr_next;
bae25f19
L		 10940 if (!align_frag)
10941 break;
9545c4ce 10942 }
bae25f19
L		 10943 /* align_frag can be NULL if there are directives in
10944 between. */
10945 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10946 align_frag->tc_frag_data = 1;
10947 }
10948
10949 insn_group_break (1, 0, 0);
10950 }
10951 align_frag = NULL;
800eeca4
JW		 10952
10953 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10954 {
10955 as_bad ("`%s' cannot be predicated", idesc->name);
10956 goto done;
10957 }
10958
542d6675 10959 /* Build the instruction. */
800eeca4
JW		 10960 CURR_SLOT.qp_regno = qp_regno;
10961 CURR_SLOT.idesc = idesc;
10962 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10963 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4 10964
ba825241 10965 /* Add unwind entries, if there are any. */
e0c9811a 10966 if (unwind.current_entry)
800eeca4 10967 {
e0c9811a
JW		 10968 CURR_SLOT.unwind_record = unwind.current_entry;
10969 unwind.current_entry = NULL;
800eeca4 10970 }
ba825241
JB		 10971 if (unwind.pending_saves)
10972 {
10973 if (unwind.pending_saves->next)
10974 {
10975 /* Attach the next pending save to the next slot so that its
10976 slot number will get set correctly. */
10977 add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR);
10978 unwind.pending_saves = &unwind.pending_saves->next->r.record.p;
10979 }
10980 else
10981 unwind.pending_saves = NULL;
10982 }
5656b6b8 10983 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym))
75e09913 10984 unwind.insn = 1;
800eeca4 10985
542d6675 10986 /* Check for dependency violations. */
800eeca4 10987 if (md.detect_dv)
542d6675 10988 check_dv (idesc);
800eeca4
JW		 10989
10990 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10991 if (++md.num_slots_in_use >= NUM_SLOTS)
10992 emit_one_bundle ();
10993
10994 if ((flags & IA64_OPCODE_LAST) != 0)
10995 insn_group_break (1, 0, 0);
10996
10997 md.last_text_seg = now_seg;
10998
10999 done:
11000 input_line_pointer = saved_input_line_pointer;
11001}
11002
11003/* Called when symbol NAME cannot be found in the symbol table.
11004 Should be used for dynamic valued symbols only. */
542d6675
KH		 11005
11006symbolS *
800eeca4 11007md_undefined_symbol (name)
2434f565 11008 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 11009{
11010 return 0;
11011}
11012
11013/* Called for any expression that can not be recognized. When the
11014 function is called, `input_line_pointer' will point to the start of
11015 the expression. */
542d6675 11016
800eeca4
JW		 11017void
11018md_operand (e)
11019 expressionS *e;
11020{
800eeca4
JW		 11021 switch (*input_line_pointer)
11022 {
800eeca4
JW		 11023 case '[':
11024 ++input_line_pointer;
60d11e55 11025 expression_and_evaluate (e);
800eeca4
JW		 11026 if (*input_line_pointer != ']')
11027 {
16a48f83 11028 as_bad ("Closing bracket missing");
800eeca4
JW		 11029 goto err;
11030 }
11031 else
11032 {
6a2375c6
JB		 11033 if (e->X_op != O_register
11034 || e->X_add_number < REG_GR
11035 || e->X_add_number > REG_GR + 127)
11036 {
11037 as_bad ("Index must be a general register");
11038 e->X_add_number = REG_GR;
11039 }
800eeca4
JW		 11040
11041 ++input_line_pointer;
11042 e->X_op = O_index;
11043 }
11044 break;
11045
11046 default:
11047 break;
11048 }
11049 return;
11050
11051 err:
11052 ignore_rest_of_line ();
11053}
11054
11055/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11056 a section symbol plus some offset. For relocs involving @fptr(),
11057 directives we don't want such adjustments since we need to have the
11058 original symbol's name in the reloc. */
11059int
11060ia64_fix_adjustable (fix)
11061 fixS *fix;
11062{
11063 /* Prevent all adjustments to global symbols */
e97b3f28 11064 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
800eeca4
JW		 11065 return 0;
11066
11067 switch (fix->fx_r_type)
11068 {
11069 case BFD_RELOC_IA64_FPTR64I:
11070 case BFD_RELOC_IA64_FPTR32MSB:
11071 case BFD_RELOC_IA64_FPTR32LSB:
11072 case BFD_RELOC_IA64_FPTR64MSB:
11073 case BFD_RELOC_IA64_FPTR64LSB:
11074 case BFD_RELOC_IA64_LTOFF_FPTR22:
11075 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11076 return 0;
11077 default:
11078 break;
11079 }
11080
11081 return 1;
11082}
11083
11084int
11085ia64_force_relocation (fix)
11086 fixS *fix;
11087{
11088 switch (fix->fx_r_type)
11089 {
11090 case BFD_RELOC_IA64_FPTR64I:
11091 case BFD_RELOC_IA64_FPTR32MSB:
11092 case BFD_RELOC_IA64_FPTR32LSB:
11093 case BFD_RELOC_IA64_FPTR64MSB:
11094 case BFD_RELOC_IA64_FPTR64LSB:
11095
11096 case BFD_RELOC_IA64_LTOFF22:
11097 case BFD_RELOC_IA64_LTOFF64I:
11098 case BFD_RELOC_IA64_LTOFF_FPTR22:
11099 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11100 case BFD_RELOC_IA64_PLTOFF22:
11101 case BFD_RELOC_IA64_PLTOFF64I:
11102 case BFD_RELOC_IA64_PLTOFF64MSB:
11103 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 11104
11105 case BFD_RELOC_IA64_LTOFF22X:
11106 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 11107 return 1;
11108
11109 default:
a161fe53 11110 break;
800eeca4 11111 }
a161fe53 11112
ae6063d4 11113 return generic_force_reloc (fix);
800eeca4
JW		 11114}
11115
11116/* Decide from what point a pc-relative relocation is relative to,
11117 relative to the pc-relative fixup. Er, relatively speaking. */
11118long
11119ia64_pcrel_from_section (fix, sec)
11120 fixS *fix;
11121 segT sec;
11122{
11123 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 11124
800eeca4
JW		 11125 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
11126 off &= ~0xfUL;
11127
11128 return off;
11129}
11130
6174d9c8
RH		 11131
11132/* Used to emit section-relative relocs for the dwarf2 debug data. */
11133void
11134ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
11135{
11136 expressionS expr;
11137
11138 expr.X_op = O_pseudo_fixup;
11139 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
11140 expr.X_add_number = 0;
11141 expr.X_add_symbol = symbol;
11142 emit_expr (&expr, size);
11143}
11144
800eeca4
JW		 11145/* This is called whenever some data item (not an instruction) needs a
11146 fixup. We pick the right reloc code depending on the byteorder
11147 currently in effect. */
11148void
11149ia64_cons_fix_new (f, where, nbytes, exp)
11150 fragS *f;
11151 int where;
11152 int nbytes;
11153 expressionS *exp;
11154{
11155 bfd_reloc_code_real_type code;
11156 fixS *fix;
11157
11158 switch (nbytes)
11159 {
11160 /* There are no reloc for 8 and 16 bit quantities, but we allow
11161 them here since they will work fine as long as the expression
11162 is fully defined at the end of the pass over the source file. */
11163 case 1: code = BFD_RELOC_8; break;
11164 case 2: code = BFD_RELOC_16; break;
11165 case 4:
11166 if (target_big_endian)
11167 code = BFD_RELOC_IA64_DIR32MSB;
11168 else
11169 code = BFD_RELOC_IA64_DIR32LSB;
11170 break;
11171
11172 case 8:
40449e9f 11173 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 11174 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 11175 && exp->X_op_symbol
11176 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
11177 && !(md.flags & EF_IA_64_ABI64))
11178 {
11179 if (target_big_endian)
11180 code = BFD_RELOC_IA64_IPLTMSB;
11181 else
11182 code = BFD_RELOC_IA64_IPLTLSB;
11183 exp->X_op = O_symbol;
11184 break;
11185 }
11186 else
11187 {
11188 if (target_big_endian)
11189 code = BFD_RELOC_IA64_DIR64MSB;
11190 else
11191 code = BFD_RELOC_IA64_DIR64LSB;
11192 break;
11193 }
800eeca4 11194
3969b680
RH		 11195 case 16:
11196 if (exp->X_op == O_pseudo_fixup
11197 && exp->X_op_symbol
11198 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
11199 {
11200 if (target_big_endian)
11201 code = BFD_RELOC_IA64_IPLTMSB;
11202 else
11203 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 11204 exp->X_op = O_symbol;
11205 break;
11206 }
11207 /* FALLTHRU */
11208
800eeca4
JW		 11209 default:
11210 as_bad ("Unsupported fixup size %d", nbytes);
11211 ignore_rest_of_line ();
11212 return;
11213 }
6174d9c8 11214
800eeca4
JW		 11215 if (exp->X_op == O_pseudo_fixup)
11216 {
800eeca4
JW		 11217 exp->X_op = O_symbol;
11218 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 11219 /* ??? If code unchanged, unsupported. */
800eeca4 11220 }
3969b680 11221
800eeca4
JW		 11222 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11223 /* We need to store the byte order in effect in case we're going
11224 to fix an 8 or 16 bit relocation (for which there no real
55cf6793 11225 relocs available). See md_apply_fix(). */
800eeca4
JW		 11226 fix->tc_fix_data.bigendian = target_big_endian;
11227}
11228
11229/* Return the actual relocation we wish to associate with the pseudo
11230 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 11231 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 11232
11233static bfd_reloc_code_real_type
11234ia64_gen_real_reloc_type (sym, r_type)
11235 struct symbol *sym;
11236 bfd_reloc_code_real_type r_type;
11237{
11238 bfd_reloc_code_real_type new = 0;
0ca3e455 11239 const char *type = NULL, *suffix = "";
800eeca4
JW		 11240
11241 if (sym == NULL)
11242 {
11243 return r_type;
11244 }
11245
11246 switch (S_GET_VALUE (sym))
11247 {
11248 case FUNC_FPTR_RELATIVE:
11249 switch (r_type)
11250 {
11251 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11252 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11253 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11254 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11255 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 11256 default: type = "FPTR"; break;
800eeca4
JW		 11257 }
11258 break;
11259
11260 case FUNC_GP_RELATIVE:
11261 switch (r_type)
11262 {
11263 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11264 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11265 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11266 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11267 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11268 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 11269 default: type = "GPREL"; break;
800eeca4
JW		 11270 }
11271 break;
11272
11273 case FUNC_LT_RELATIVE:
11274 switch (r_type)
11275 {
11276 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11277 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11278 default: type = "LTOFF"; break;
800eeca4
JW		 11279 }
11280 break;
11281
fa2c7eff
RH		 11282 case FUNC_LT_RELATIVE_X:
11283 switch (r_type)
11284 {
11285 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11286 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11287 }
11288 break;
11289
c67e42c9
RH		 11290 case FUNC_PC_RELATIVE:
11291 switch (r_type)
11292 {
11293 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11294 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11295 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11296 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11297 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11298 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11299 default: type = "PCREL"; break;
c67e42c9
RH		 11300 }
11301 break;
11302
800eeca4
JW		 11303 case FUNC_PLT_RELATIVE:
11304 switch (r_type)
11305 {
11306 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11307 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11308 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11309 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11310 default: type = "PLTOFF"; break;
800eeca4
JW		 11311 }
11312 break;
11313
11314 case FUNC_SEC_RELATIVE:
11315 switch (r_type)
11316 {
11317 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11318 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11319 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11320 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11321 default: type = "SECREL"; break;
800eeca4
JW		 11322 }
11323 break;
11324
11325 case FUNC_SEG_RELATIVE:
11326 switch (r_type)
11327 {
11328 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11329 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11330 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11331 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11332 default: type = "SEGREL"; break;
800eeca4
JW		 11333 }
11334 break;
11335
11336 case FUNC_LTV_RELATIVE:
11337 switch (r_type)
11338 {
11339 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11340 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11341 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11342 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11343 default: type = "LTV"; break;
800eeca4
JW		 11344 }
11345 break;
11346
11347 case FUNC_LT_FPTR_RELATIVE:
11348 switch (r_type)
11349 {
11350 case BFD_RELOC_IA64_IMM22:
11351 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11352 case BFD_RELOC_IA64_IMM64:
11353 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11354 case BFD_RELOC_IA64_DIR32MSB:
11355 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11356 case BFD_RELOC_IA64_DIR32LSB:
11357 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11358 case BFD_RELOC_IA64_DIR64MSB:
11359 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11360 case BFD_RELOC_IA64_DIR64LSB:
11361 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11362 default:
0ca3e455 11363 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11364 }
11365 break;
3969b680 11366
13ae64f3
JJ		 11367 case FUNC_TP_RELATIVE:
11368 switch (r_type)
11369 {
0ca3e455
JB		 11370 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11371 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11372 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11373 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11374 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11375 default: type = "TPREL"; break;
13ae64f3
JJ		 11376 }
11377 break;
11378
11379 case FUNC_LT_TP_RELATIVE:
11380 switch (r_type)
11381 {
11382 case BFD_RELOC_IA64_IMM22:
11383 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11384 default:
0ca3e455
JB		 11385 type = "LTOFF_TPREL"; break;
11386 }
11387 break;
11388
11389 case FUNC_DTP_MODULE:
11390 switch (r_type)
11391 {
11392 case BFD_RELOC_IA64_DIR64MSB:
11393 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11394 case BFD_RELOC_IA64_DIR64LSB:
11395 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11396 default:
11397 type = "DTPMOD"; break;
13ae64f3
JJ		 11398 }
11399 break;
11400
11401 case FUNC_LT_DTP_MODULE:
11402 switch (r_type)
11403 {
11404 case BFD_RELOC_IA64_IMM22:
11405 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11406 default:
0ca3e455 11407 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11408 }
11409 break;
11410
11411 case FUNC_DTP_RELATIVE:
11412 switch (r_type)
11413 {
0ca3e455
JB		 11414 case BFD_RELOC_IA64_DIR32MSB:
11415 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11416 case BFD_RELOC_IA64_DIR32LSB:
11417 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11418 case BFD_RELOC_IA64_DIR64MSB:
11419 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11420 case BFD_RELOC_IA64_DIR64LSB:
11421 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11422 case BFD_RELOC_IA64_IMM14:
11423 new = BFD_RELOC_IA64_DTPREL14; break;
11424 case BFD_RELOC_IA64_IMM22:
11425 new = BFD_RELOC_IA64_DTPREL22; break;
11426 case BFD_RELOC_IA64_IMM64:
11427 new = BFD_RELOC_IA64_DTPREL64I; break;
11428 default:
0ca3e455 11429 type = "DTPREL"; break;
13ae64f3
JJ		 11430 }
11431 break;
11432
11433 case FUNC_LT_DTP_RELATIVE:
11434 switch (r_type)
11435 {
11436 case BFD_RELOC_IA64_IMM22:
11437 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11438 default:
0ca3e455 11439 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11440 }
11441 break;
11442
40449e9f 11443 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11444 switch (r_type)
11445 {
11446 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11447 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11448 default: type = "IPLT"; break;
11449 }
40449e9f 11450 break;
1cd8ff38 11451
800eeca4
JW		 11452 default:
11453 abort ();
11454 }
6174d9c8 11455
800eeca4
JW		 11456 if (new)
11457 return new;
11458 else
0ca3e455
JB		 11459 {
11460 int width;
11461
11462 if (!type)
11463 abort ();
11464 switch (r_type)
11465 {
11466 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11467 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11468 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11469 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
30ad6cb9 11470 case BFD_RELOC_UNUSED: width = 13; break;
0ca3e455
JB		 11471 case BFD_RELOC_IA64_IMM14: width = 14; break;
11472 case BFD_RELOC_IA64_IMM22: width = 22; break;
11473 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11474 default: abort ();
11475 }
11476
11477 /* This should be an error, but since previously there wasn't any
11478 diagnostic here, dont't make it fail because of this for now. */
11479 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11480 return r_type;
11481 }
800eeca4
JW		 11482}
11483
11484/* Here is where generate the appropriate reloc for pseudo relocation
11485 functions. */
11486void
11487ia64_validate_fix (fix)
11488 fixS *fix;
11489{
11490 switch (fix->fx_r_type)
11491 {
11492 case BFD_RELOC_IA64_FPTR64I:
11493 case BFD_RELOC_IA64_FPTR32MSB:
11494 case BFD_RELOC_IA64_FPTR64LSB:
11495 case BFD_RELOC_IA64_LTOFF_FPTR22:
11496 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11497 if (fix->fx_offset != 0)
11498 as_bad_where (fix->fx_file, fix->fx_line,
11499 "No addend allowed in @fptr() relocation");
11500 break;
11501 default:
11502 break;
11503 }
800eeca4
JW		 11504}
11505
11506static void
11507fix_insn (fix, odesc, value)
11508 fixS *fix;
11509 const struct ia64_operand *odesc;
11510 valueT value;
11511{
11512 bfd_vma insn[3], t0, t1, control_bits;
11513 const char *err;
11514 char *fixpos;
11515 long slot;
11516
11517 slot = fix->fx_where & 0x3;
11518 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11519
c67e42c9 11520 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11521 t0 = bfd_getl64 (fixpos);
11522 t1 = bfd_getl64 (fixpos + 8);
11523 control_bits = t0 & 0x1f;
11524 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11525 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11526 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11527
c67e42c9
RH		 11528 err = NULL;
11529 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11530 {
c67e42c9
RH		 11531 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11532 insn[2] |= (((value & 0x7f) << 13)
11533 | (((value >> 7) & 0x1ff) << 27)
11534 | (((value >> 16) & 0x1f) << 22)
11535 | (((value >> 21) & 0x1) << 21)
11536 | (((value >> 63) & 0x1) << 36));
800eeca4 11537 }
c67e42c9
RH		 11538 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11539 {
11540 if (value & ~0x3fffffffffffffffULL)
11541 err = "integer operand out of range";
11542 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11543 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11544 }
11545 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11546 {
11547 value >>= 4;
11548 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11549 insn[2] |= ((((value >> 59) & 0x1) << 36)
11550 | (((value >> 0) & 0xfffff) << 13));
11551 }
11552 else
11553 err = (*odesc->insert) (odesc, value, insn + slot);
11554
11555 if (err)
11556 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11557
11558 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11559 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11560 number_to_chars_littleendian (fixpos + 0, t0, 8);
11561 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11562}
11563
11564/* Attempt to simplify or even eliminate a fixup. The return value is
11565 ignored; perhaps it was once meaningful, but now it is historical.
11566 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11567
11568 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11569 (if possible). */
94f592af
NC		 11570
11571void
55cf6793 11572md_apply_fix (fix, valP, seg)
800eeca4 11573 fixS *fix;
40449e9f 11574 valueT *valP;
2434f565 11575 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11576{
11577 char *fixpos;
40449e9f 11578 valueT value = *valP;
800eeca4
JW		 11579
11580 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11581
11582 if (fix->fx_pcrel)
11583 {
7b347e43
JB		 11584 switch (fix->fx_r_type)
11585 {
11586 case BFD_RELOC_IA64_PCREL21B: break;
11587 case BFD_RELOC_IA64_PCREL21BI: break;
11588 case BFD_RELOC_IA64_PCREL21F: break;
11589 case BFD_RELOC_IA64_PCREL21M: break;
11590 case BFD_RELOC_IA64_PCREL60B: break;
11591 case BFD_RELOC_IA64_PCREL22: break;
11592 case BFD_RELOC_IA64_PCREL64I: break;
11593 case BFD_RELOC_IA64_PCREL32MSB: break;
11594 case BFD_RELOC_IA64_PCREL32LSB: break;
11595 case BFD_RELOC_IA64_PCREL64MSB: break;
11596 case BFD_RELOC_IA64_PCREL64LSB: break;
11597 default:
11598 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11599 fix->fx_r_type);
11600 break;
11601 }
800eeca4
JW		 11602 }
11603 if (fix->fx_addsy)
11604 {
00f7efb6 11605 switch (fix->fx_r_type)
800eeca4 11606 {
00f7efb6 11607 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11608 /* This must be a TAG13 or TAG13b operand. There are no external
11609 relocs defined for them, so we must give an error. */
800eeca4
JW		 11610 as_bad_where (fix->fx_file, fix->fx_line,
11611 "%s must have a constant value",
11612 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11613 fix->fx_done = 1;
94f592af 11614 return;
00f7efb6
JJ		 11615
11616 case BFD_RELOC_IA64_TPREL14:
11617 case BFD_RELOC_IA64_TPREL22:
11618 case BFD_RELOC_IA64_TPREL64I:
11619 case BFD_RELOC_IA64_LTOFF_TPREL22:
11620 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11621 case BFD_RELOC_IA64_DTPREL14:
11622 case BFD_RELOC_IA64_DTPREL22:
11623 case BFD_RELOC_IA64_DTPREL64I:
11624 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11625 S_SET_THREAD_LOCAL (fix->fx_addsy);
11626 break;
7925dd68
JJ		 11627
11628 default:
11629 break;
800eeca4 11630 }
800eeca4
JW		 11631 }
11632 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11633 {
11634 if (fix->tc_fix_data.bigendian)
11635 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11636 else
11637 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11638 fix->fx_done = 1;
800eeca4
JW		 11639 }
11640 else
11641 {
11642 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11643 fix->fx_done = 1;
800eeca4 11644 }
800eeca4
JW		 11645}
11646
11647/* Generate the BFD reloc to be stuck in the object file from the
11648 fixup used internally in the assembler. */
542d6675
KH		 11649
11650arelent *
800eeca4 11651tc_gen_reloc (sec, fixp)
2434f565 11652 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11653 fixS *fixp;
11654{
11655 arelent *reloc;
11656
11657 reloc = xmalloc (sizeof (*reloc));
11658 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11659 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11660 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11661 reloc->addend = fixp->fx_offset;
11662 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11663
11664 if (!reloc->howto)
11665 {
11666 as_bad_where (fixp->fx_file, fixp->fx_line,
11667 "Cannot represent %s relocation in object file",
11668 bfd_get_reloc_code_name (fixp->fx_r_type));
11669 }
11670 return reloc;
11671}
11672
11673/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11674 of type TYPE, and store the appropriate bytes in *LIT. The number
11675 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11676 returned, or NULL on OK. */
11677
11678#define MAX_LITTLENUMS 5
11679
542d6675 11680char *
800eeca4
JW		 11681md_atof (type, lit, size)
11682 int type;
11683 char *lit;
11684 int *size;
11685{
11686 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11687 char *t;
11688 int prec;
11689
11690 switch (type)
11691 {
11692 /* IEEE floats */
11693 case 'f':
11694 case 'F':
11695 case 's':
11696 case 'S':
11697 prec = 2;
11698 break;
11699
11700 case 'd':
11701 case 'D':
11702 case 'r':
11703 case 'R':
11704 prec = 4;
11705 break;
11706
11707 case 'x':
11708 case 'X':
11709 case 'p':
11710 case 'P':
11711 prec = 5;
11712 break;
11713
11714 default:
11715 *size = 0;
11716 return "Bad call to MD_ATOF()";
11717 }
11718 t = atof_ieee (input_line_pointer, type, words);
11719 if (t)
11720 input_line_pointer = t;
800eeca4 11721
10a98291
L		 11722 (*ia64_float_to_chars) (lit, words, prec);
11723
165a7f90
L		 11724 if (type == 'X')
11725 {
11726 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11727 memset (&lit [10], 0, 6);
165a7f90
L		 11728 *size = 8 * sizeof (LITTLENUM_TYPE);
11729 }
10a98291
L		 11730 else
11731 *size = prec * sizeof (LITTLENUM_TYPE);
11732
800eeca4
JW		 11733 return 0;
11734}
11735
800eeca4
JW		 11736/* Handle ia64 specific semantics of the align directive. */
11737
0a9ef439 11738void
800eeca4 11739ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11740 int n ATTRIBUTE_UNUSED;
11741 const char *fill ATTRIBUTE_UNUSED;
2434f565 11742 int len ATTRIBUTE_UNUSED;
91a2ae2a 11743 int max ATTRIBUTE_UNUSED;
800eeca4 11744{
0a9ef439 11745 if (subseg_text_p (now_seg))
800eeca4 11746 ia64_flush_insns ();
0a9ef439 11747}
800eeca4 11748
0a9ef439
RH		 11749/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11750 of an rs_align_code fragment. */
800eeca4 11751
0a9ef439
RH		 11752void
11753ia64_handle_align (fragp)
11754 fragS *fragp;
11755{
0a9ef439
RH		 11756 int bytes;
11757 char *p;
9545c4ce 11758 const unsigned char *nop;
0a9ef439
RH		 11759
11760 if (fragp->fr_type != rs_align_code)
11761 return;
11762
9545c4ce
L		 11763 /* Check if this frag has to end with a stop bit. */
11764 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11765
0a9ef439
RH		 11766 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11767 p = fragp->fr_literal + fragp->fr_fix;
11768
d9201763
L		 11769 /* If no paddings are needed, we check if we need a stop bit. */
11770 if (!bytes && fragp->tc_frag_data)
11771 {
11772 if (fragp->fr_fix < 16)
bae25f19
L		 11773#if 1
11774 /* FIXME: It won't work with
11775 .align 16
11776 alloc r32=ar.pfs,1,2,4,0
11777 */
11778 ;
11779#else
d9201763
L		 11780 as_bad_where (fragp->fr_file, fragp->fr_line,
11781 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11782#endif
d9201763
L		 11783 else
11784 /* Bundles are always in little-endian byte order. Make sure
11785 the previous bundle has the stop bit. */
11786 *(p - 16) |= 1;
11787 }
11788
0a9ef439
RH		 11789 /* Make sure we are on a 16-byte boundary, in case someone has been
11790 putting data into a text section. */
11791 if (bytes & 15)
11792 {
11793 int fix = bytes & 15;
11794 memset (p, 0, fix);
11795 p += fix;
11796 bytes -= fix;
11797 fragp->fr_fix += fix;
800eeca4
JW		 11798 }
11799
012a452b 11800 /* Instruction bundles are always little-endian. */
9545c4ce 11801 memcpy (p, nop, 16);
0a9ef439 11802 fragp->fr_var = 16;
800eeca4 11803}
10a98291
L		 11804
11805static void
11806ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11807 int prec)
11808{
11809 while (prec--)
11810 {
11811 number_to_chars_bigendian (lit, (long) (*words++),
11812 sizeof (LITTLENUM_TYPE));
11813 lit += sizeof (LITTLENUM_TYPE);
11814 }
11815}
11816
11817static void
11818ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11819 int prec)
11820{
11821 while (prec--)
11822 {
11823 number_to_chars_littleendian (lit, (long) (words[prec]),
11824 sizeof (LITTLENUM_TYPE));
11825 lit += sizeof (LITTLENUM_TYPE);
11826 }
11827}
11828
11829void
11830ia64_elf_section_change_hook (void)
11831{
38ce5b11
L		 11832 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11833 && elf_linked_to_section (now_seg) == NULL)
11834 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11835 dot_byteorder (-1);
11836}
a645d1eb
L		 11837
11838/* Check if a label should be made global. */
11839void
11840ia64_check_label (symbolS *label)
11841{
11842 if (*input_line_pointer == ':')
11843 {
11844 S_SET_EXTERNAL (label);
11845 input_line_pointer++;
11846 }
11847}
35f5df7f
L		 11848
11849/* Used to remember where .alias and .secalias directives are seen. We
11850 will rename symbol and section names when we are about to output
11851 the relocatable file. */
11852struct alias
11853{
11854 char *file; /* The file where the directive is seen. */
11855 unsigned int line; /* The line number the directive is at. */
11856 const char *name; /* The orignale name of the symbol. */
11857};
11858
11859/* Called for .alias and .secalias directives. If SECTION is 1, it is
11860 .secalias. Otherwise, it is .alias. */
11861static void
11862dot_alias (int section)
11863{
11864 char *name, *alias;
11865 char delim;
11866 char *end_name;
11867 int len;
11868 const char *error_string;
11869 struct alias *h;
11870 const char *a;
11871 struct hash_control *ahash, *nhash;
11872 const char *kind;
11873
11874 name = input_line_pointer;
11875 delim = get_symbol_end ();
11876 end_name = input_line_pointer;
11877 *end_name = delim;
11878
11879 if (name == end_name)
11880 {
11881 as_bad (_("expected symbol name"));
e4e8248d 11882 ignore_rest_of_line ();
35f5df7f
L		 11883 return;
11884 }
11885
11886 SKIP_WHITESPACE ();
11887
11888 if (*input_line_pointer != ',')
11889 {
11890 *end_name = 0;
11891 as_bad (_("expected comma after \"%s\""), name);
11892 *end_name = delim;
11893 ignore_rest_of_line ();
11894 return;
11895 }
11896
11897 input_line_pointer++;
11898 *end_name = 0;
20b36a95 11899 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11900
11901 /* We call demand_copy_C_string to check if alias string is valid.
11902 There should be a closing `"' and no `\0' in the string. */
11903 alias = demand_copy_C_string (&len);
11904 if (alias == NULL)
11905 {
11906 ignore_rest_of_line ();
11907 return;
11908 }
11909
11910 /* Make a copy of name string. */
11911 len = strlen (name) + 1;
11912 obstack_grow (&notes, name, len);
11913 name = obstack_finish (&notes);
11914
11915 if (section)
11916 {
11917 kind = "section";
11918 ahash = secalias_hash;
11919 nhash = secalias_name_hash;
11920 }
11921 else
11922 {
11923 kind = "symbol";
11924 ahash = alias_hash;
11925 nhash = alias_name_hash;
11926 }
11927
11928 /* Check if alias has been used before. */
11929 h = (struct alias *) hash_find (ahash, alias);
11930 if (h)
11931 {
11932 if (strcmp (h->name, name))
11933 as_bad (_("`%s' is already the alias of %s `%s'"),
11934 alias, kind, h->name);
11935 goto out;
11936 }
11937
11938 /* Check if name already has an alias. */
11939 a = (const char *) hash_find (nhash, name);
11940 if (a)
11941 {
11942 if (strcmp (a, alias))
11943 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11944 goto out;
11945 }
11946
11947 h = (struct alias *) xmalloc (sizeof (struct alias));
11948 as_where (&h->file, &h->line);
11949 h->name = name;
11950
11951 error_string = hash_jam (ahash, alias, (PTR) h);
11952 if (error_string)
11953 {
11954 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11955 alias, kind, error_string);
11956 goto out;
11957 }
11958
11959 error_string = hash_jam (nhash, name, (PTR) alias);
11960 if (error_string)
11961 {
11962 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11963 alias, kind, error_string);
11964out:
11965 obstack_free (&notes, name);
11966 obstack_free (&notes, alias);
11967 }
11968
11969 demand_empty_rest_of_line ();
11970}
11971
11972/* It renames the original symbol name to its alias. */
11973static void
11974do_alias (const char *alias, PTR value)
11975{
11976 struct alias *h = (struct alias *) value;
11977 symbolS *sym = symbol_find (h->name);
11978
11979 if (sym == NULL)
11980 as_warn_where (h->file, h->line,
11981 _("symbol `%s' aliased to `%s' is not used"),
11982 h->name, alias);
11983 else
11984 S_SET_NAME (sym, (char *) alias);
11985}
11986
11987/* Called from write_object_file. */
11988void
11989ia64_adjust_symtab (void)
11990{
11991 hash_traverse (alias_hash, do_alias);
11992}
11993
11994/* It renames the original section name to its alias. */
11995static void
11996do_secalias (const char *alias, PTR value)
11997{
11998 struct alias *h = (struct alias *) value;
11999 segT sec = bfd_get_section_by_name (stdoutput, h->name);
12000
12001 if (sec == NULL)
12002 as_warn_where (h->file, h->line,
12003 _("section `%s' aliased to `%s' is not used"),
12004 h->name, alias);
12005 else
12006 sec->name = alias;
12007}
12008
12009/* Called from write_object_file. */
12010void
12011ia64_frob_file (void)
12012{
12013 hash_traverse (secalias_hash, do_secalias);
12014}
GDB Binutils - Deliverables
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