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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
744b6414 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
d6afba4b 3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
a66d2bb7
JB		 54#ifdef HAVE_LIMITS_H
55#include <limits.h>
56#endif
57
800eeca4
JW		 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
59#define MIN(a,b) ((a) < (b) ? (a) : (b))
60
61#define NUM_SLOTS 4
62#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
63#define CURR_SLOT md.slot[md.curr_slot]
64
65#define O_pseudo_fixup (O_max + 1)
66
67enum special_section
68 {
557debba 69 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 70 SPECIAL_SECTION_BSS = 0,
71 SPECIAL_SECTION_SBSS,
72 SPECIAL_SECTION_SDATA,
73 SPECIAL_SECTION_RODATA,
74 SPECIAL_SECTION_COMMENT,
75 SPECIAL_SECTION_UNWIND,
557debba
JW		 76 SPECIAL_SECTION_UNWIND_INFO,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY,
79 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 80 };
81
82enum reloc_func
83 {
13ae64f3
JJ		 84 FUNC_DTP_MODULE,
85 FUNC_DTP_RELATIVE,
800eeca4
JW		 86 FUNC_FPTR_RELATIVE,
87 FUNC_GP_RELATIVE,
88 FUNC_LT_RELATIVE,
fa2c7eff 89 FUNC_LT_RELATIVE_X,
c67e42c9 90 FUNC_PC_RELATIVE,
800eeca4
JW		 91 FUNC_PLT_RELATIVE,
92 FUNC_SEC_RELATIVE,
93 FUNC_SEG_RELATIVE,
13ae64f3 94 FUNC_TP_RELATIVE,
800eeca4
JW		 95 FUNC_LTV_RELATIVE,
96 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 97 FUNC_LT_DTP_MODULE,
98 FUNC_LT_DTP_RELATIVE,
99 FUNC_LT_TP_RELATIVE,
3969b680 100 FUNC_IPLT_RELOC,
800eeca4
JW		 101 };
102
103enum reg_symbol
104 {
105 REG_GR = 0,
106 REG_FR = (REG_GR + 128),
107 REG_AR = (REG_FR + 128),
108 REG_CR = (REG_AR + 128),
109 REG_P = (REG_CR + 128),
110 REG_BR = (REG_P + 64),
111 REG_IP = (REG_BR + 8),
112 REG_CFM,
113 REG_PR,
114 REG_PR_ROT,
115 REG_PSR,
116 REG_PSR_L,
117 REG_PSR_UM,
118 /* The following are pseudo-registers for use by gas only. */
119 IND_CPUID,
120 IND_DBR,
121 IND_DTR,
122 IND_ITR,
123 IND_IBR,
124 IND_MEM,
125 IND_MSR,
126 IND_PKR,
127 IND_PMC,
128 IND_PMD,
129 IND_RR,
542d6675 130 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 131 REG_PSP,
132 REG_PRIUNAT,
800eeca4
JW		 133 REG_NUM
134 };
135
136enum dynreg_type
137 {
138 DYNREG_GR = 0, /* dynamic general purpose register */
139 DYNREG_FR, /* dynamic floating point register */
140 DYNREG_PR, /* dynamic predicate register */
141 DYNREG_NUM_TYPES
142 };
143
87f8eb97
JW		 144enum operand_match_result
145 {
146 OPERAND_MATCH,
147 OPERAND_OUT_OF_RANGE,
148 OPERAND_MISMATCH
149 };
150
800eeca4
JW		 151/* On the ia64, we can't know the address of a text label until the
152 instructions are packed into a bundle. To handle this, we keep
153 track of the list of labels that appear in front of each
154 instruction. */
155struct label_fix
542d6675
KH		 156{
157 struct label_fix *next;
158 struct symbol *sym;
159};
800eeca4 160
549f748d 161/* This is the endianness of the current section. */
800eeca4
JW		 162extern int target_big_endian;
163
549f748d
JW		 164/* This is the default endianness. */
165static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
166
10a98291
L		 167void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
168
169static void ia64_float_to_chars_bigendian
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
171static void ia64_float_to_chars_littleendian
172 PARAMS ((char *, LITTLENUM_TYPE *, int));
173static void (*ia64_float_to_chars)
174 PARAMS ((char *, LITTLENUM_TYPE *, int));
175
35f5df7f
L		 176static struct hash_control *alias_hash;
177static struct hash_control *alias_name_hash;
178static struct hash_control *secalias_hash;
179static struct hash_control *secalias_name_hash;
180
2fac3d48
JB		 181/* List of chars besides those in app.c:symbol_chars that can start an
182 operand. Used to prevent the scrubber eating vital white-space. */
183const char ia64_symbol_chars[] = "@?";
184
800eeca4
JW		 185/* Characters which always start a comment. */
186const char comment_chars[] = "";
187
188/* Characters which start a comment at the beginning of a line. */
189const char line_comment_chars[] = "#";
190
191/* Characters which may be used to separate multiple commands on a
192 single line. */
193const char line_separator_chars[] = ";";
194
195/* Characters which are used to indicate an exponent in a floating
196 point number. */
197const char EXP_CHARS[] = "eE";
198
199/* Characters which mean that a number is a floating point constant,
200 as in 0d1.0. */
201const char FLT_CHARS[] = "rRsSfFdDxXpP";
202
542d6675 203/* ia64-specific option processing: */
800eeca4 204
44f5c83a 205const char *md_shortopts = "m:N:x::";
800eeca4
JW		 206
207struct option md_longopts[] =
208 {
c43c2cc5
JW		 209#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
210 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
211#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
212 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 213 };
214
215size_t md_longopts_size = sizeof (md_longopts);
216
217static struct
218 {
219 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
220 struct hash_control *reg_hash; /* register name hash table */
221 struct hash_control *dynreg_hash; /* dynamic register hash table */
222 struct hash_control *const_hash; /* constant hash table */
223 struct hash_control *entry_hash; /* code entry hint hash table */
224
225 symbolS *regsym[REG_NUM];
226
227 /* If X_op is != O_absent, the registername for the instruction's
228 qualifying predicate. If NULL, p0 is assumed for instructions
229 that are predicatable. */
230 expressionS qp;
231
8c2fda1d
L		 232 /* Optimize for which CPU. */
233 enum
234 {
235 itanium1,
236 itanium2
237 } tune;
238
91d777ee
L		 239 /* What to do when hint.b is used. */
240 enum
241 {
242 hint_b_error,
243 hint_b_warning,
244 hint_b_ok
245 } hint_b;
246
800eeca4 247 unsigned int
197865e8 248 manual_bundling : 1,
800eeca4
JW		 249 debug_dv: 1,
250 detect_dv: 1,
251 explicit_mode : 1, /* which mode we're in */
252 default_explicit_mode : 1, /* which mode is the default */
253 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 254 auto_align : 1,
255 keep_pending_output : 1;
800eeca4 256
970d6792
L		 257 /* What to do when something is wrong with unwind directives. */
258 enum
259 {
260 unwind_check_warning,
261 unwind_check_error
262 } unwind_check;
263
800eeca4
JW		 264 /* Each bundle consists of up to three instructions. We keep
265 track of four most recent instructions so we can correctly set
197865e8 266 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 267 int curr_slot;
268 int num_slots_in_use;
269 struct slot
270 {
271 unsigned int
272 end_of_insn_group : 1,
273 manual_bundling_on : 1,
196e8040
JW		 274 manual_bundling_off : 1,
275 loc_directive_seen : 1;
800eeca4
JW		 276 signed char user_template; /* user-selected template, if any */
277 unsigned char qp_regno; /* qualifying predicate */
278 /* This duplicates a good fraction of "struct fix" but we
279 can't use a "struct fix" instead since we can't call
280 fix_new_exp() until we know the address of the instruction. */
281 int num_fixups;
282 struct insn_fix
283 {
284 bfd_reloc_code_real_type code;
285 enum ia64_opnd opnd; /* type of operand in need of fix */
286 unsigned int is_pcrel : 1; /* is operand pc-relative? */
287 expressionS expr; /* the value to be inserted */
288 }
289 fixup[2]; /* at most two fixups per insn */
290 struct ia64_opcode *idesc;
291 struct label_fix *label_fixups;
f1bcba5b 292 struct label_fix *tag_fixups;
800eeca4
JW		 293 struct unw_rec_list *unwind_record; /* Unwind directive. */
294 expressionS opnd[6];
295 char *src_file;
296 unsigned int src_line;
297 struct dwarf2_line_info debug_line;
298 }
299 slot[NUM_SLOTS];
300
301 segT last_text_seg;
302
303 struct dynreg
304 {
305 struct dynreg *next; /* next dynamic register */
306 const char *name;
307 unsigned short base; /* the base register number */
308 unsigned short num_regs; /* # of registers in this set */
309 }
310 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
311
312 flagword flags; /* ELF-header flags */
313
314 struct mem_offset {
315 unsigned hint:1; /* is this hint currently valid? */
316 bfd_vma offset; /* mem.offset offset */
317 bfd_vma base; /* mem.offset base */
318 } mem_offset;
319
320 int path; /* number of alt. entry points seen */
321 const char **entry_labels; /* labels of all alternate paths in
542d6675 322 the current DV-checking block. */
800eeca4 323 int maxpaths; /* size currently allocated for
542d6675 324 entry_labels */
557debba
JW		 325
326 int pointer_size; /* size in bytes of a pointer */
327 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 328 }
329md;
330
f6fe78d6
JW		 331/* These are not const, because they are modified to MMI for non-itanium1
332 targets below. */
333/* MFI bundle of nops. */
334static unsigned char le_nop[16] =
335{
336 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
337 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
338};
339/* MFI bundle of nops with stop-bit. */
340static unsigned char le_nop_stop[16] =
341{
342 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
343 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
344};
345
542d6675 346/* application registers: */
800eeca4 347
e0c9811a
JW		 348#define AR_K0 0
349#define AR_K7 7
350#define AR_RSC 16
351#define AR_BSP 17
352#define AR_BSPSTORE 18
353#define AR_RNAT 19
354#define AR_UNAT 36
355#define AR_FPSR 40
356#define AR_ITC 44
357#define AR_PFS 64
358#define AR_LC 65
800eeca4
JW		 359
360static const struct
361 {
362 const char *name;
363 int regnum;
364 }
365ar[] =
366 {
367 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
368 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
369 {"ar.rsc", 16}, {"ar.bsp", 17},
370 {"ar.bspstore", 18}, {"ar.rnat", 19},
371 {"ar.fcr", 21}, {"ar.eflag", 24},
372 {"ar.csd", 25}, {"ar.ssd", 26},
373 {"ar.cflg", 27}, {"ar.fsr", 28},
374 {"ar.fir", 29}, {"ar.fdr", 30},
375 {"ar.ccv", 32}, {"ar.unat", 36},
376 {"ar.fpsr", 40}, {"ar.itc", 44},
377 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 378 {"ar.ec", 66},
800eeca4
JW		 379 };
380
381#define CR_IPSR 16
382#define CR_ISR 17
383#define CR_IIP 19
384#define CR_IFA 20
385#define CR_ITIR 21
386#define CR_IIPA 22
387#define CR_IFS 23
388#define CR_IIM 24
389#define CR_IHA 25
390#define CR_IVR 65
391#define CR_TPR 66
392#define CR_EOI 67
393#define CR_IRR0 68
394#define CR_IRR3 71
395#define CR_LRR0 80
396#define CR_LRR1 81
397
542d6675 398/* control registers: */
800eeca4
JW		 399static const struct
400 {
401 const char *name;
402 int regnum;
403 }
404cr[] =
405 {
406 {"cr.dcr", 0},
407 {"cr.itm", 1},
408 {"cr.iva", 2},
409 {"cr.pta", 8},
410 {"cr.gpta", 9},
411 {"cr.ipsr", 16},
412 {"cr.isr", 17},
413 {"cr.iip", 19},
414 {"cr.ifa", 20},
415 {"cr.itir", 21},
416 {"cr.iipa", 22},
417 {"cr.ifs", 23},
418 {"cr.iim", 24},
419 {"cr.iha", 25},
420 {"cr.lid", 64},
421 {"cr.ivr", 65},
422 {"cr.tpr", 66},
423 {"cr.eoi", 67},
424 {"cr.irr0", 68},
425 {"cr.irr1", 69},
426 {"cr.irr2", 70},
427 {"cr.irr3", 71},
428 {"cr.itv", 72},
429 {"cr.pmv", 73},
430 {"cr.cmcv", 74},
431 {"cr.lrr0", 80},
432 {"cr.lrr1", 81}
433 };
434
435#define PSR_MFL 4
436#define PSR_IC 13
437#define PSR_DFL 18
438#define PSR_CPL 32
439
440static const struct const_desc
441 {
442 const char *name;
443 valueT value;
444 }
445const_bits[] =
446 {
542d6675 447 /* PSR constant masks: */
800eeca4
JW		 448
449 /* 0: reserved */
450 {"psr.be", ((valueT) 1) << 1},
451 {"psr.up", ((valueT) 1) << 2},
452 {"psr.ac", ((valueT) 1) << 3},
453 {"psr.mfl", ((valueT) 1) << 4},
454 {"psr.mfh", ((valueT) 1) << 5},
455 /* 6-12: reserved */
456 {"psr.ic", ((valueT) 1) << 13},
457 {"psr.i", ((valueT) 1) << 14},
458 {"psr.pk", ((valueT) 1) << 15},
459 /* 16: reserved */
460 {"psr.dt", ((valueT) 1) << 17},
461 {"psr.dfl", ((valueT) 1) << 18},
462 {"psr.dfh", ((valueT) 1) << 19},
463 {"psr.sp", ((valueT) 1) << 20},
464 {"psr.pp", ((valueT) 1) << 21},
465 {"psr.di", ((valueT) 1) << 22},
466 {"psr.si", ((valueT) 1) << 23},
467 {"psr.db", ((valueT) 1) << 24},
468 {"psr.lp", ((valueT) 1) << 25},
469 {"psr.tb", ((valueT) 1) << 26},
470 {"psr.rt", ((valueT) 1) << 27},
471 /* 28-31: reserved */
472 /* 32-33: cpl (current privilege level) */
473 {"psr.is", ((valueT) 1) << 34},
474 {"psr.mc", ((valueT) 1) << 35},
475 {"psr.it", ((valueT) 1) << 36},
476 {"psr.id", ((valueT) 1) << 37},
477 {"psr.da", ((valueT) 1) << 38},
478 {"psr.dd", ((valueT) 1) << 39},
479 {"psr.ss", ((valueT) 1) << 40},
480 /* 41-42: ri (restart instruction) */
481 {"psr.ed", ((valueT) 1) << 43},
482 {"psr.bn", ((valueT) 1) << 44},
483 };
484
542d6675 485/* indirect register-sets/memory: */
800eeca4
JW		 486
487static const struct
488 {
489 const char *name;
490 int regnum;
491 }
492indirect_reg[] =
493 {
494 { "CPUID", IND_CPUID },
495 { "cpuid", IND_CPUID },
496 { "dbr", IND_DBR },
497 { "dtr", IND_DTR },
498 { "itr", IND_ITR },
499 { "ibr", IND_IBR },
500 { "msr", IND_MSR },
501 { "pkr", IND_PKR },
502 { "pmc", IND_PMC },
503 { "pmd", IND_PMD },
504 { "rr", IND_RR },
505 };
506
507/* Pseudo functions used to indicate relocation types (these functions
508 start with an at sign (@). */
509static struct
510 {
511 const char *name;
512 enum pseudo_type
513 {
514 PSEUDO_FUNC_NONE,
515 PSEUDO_FUNC_RELOC,
516 PSEUDO_FUNC_CONST,
e0c9811a 517 PSEUDO_FUNC_REG,
800eeca4
JW		 518 PSEUDO_FUNC_FLOAT
519 }
520 type;
521 union
522 {
523 unsigned long ival;
524 symbolS *sym;
525 }
526 u;
527 }
528pseudo_func[] =
529 {
542d6675 530 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 531 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
532 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 533 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
534 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
535 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 536 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 537 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
538 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
539 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
540 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 541 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565 542 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
16a48f83
JB		 543 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
544 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
545 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
546 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 547 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 548
542d6675 549 /* mbtype4 constants: */
800eeca4
JW		 550 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
551 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
552 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
553 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
554 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
555
542d6675 556 /* fclass constants: */
bf3ca999 557 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 558 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
559 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
560 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
561 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
562 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
563 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
564 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
565 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 566
567 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 568
c10d9d8f
JW		 569 /* hint constants: */
570 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
571
542d6675 572 /* unwind-related constants: */
041340ad
JW		 573 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
574 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
575 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
576 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
577 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
578 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
579 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 580
542d6675 581 /* unwind-related registers: */
e0c9811a 582 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 583 };
584
542d6675 585/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 586static const bfd_vma nop[IA64_NUM_UNITS] =
587 {
588 0x0000000000LL, /* NIL => break 0 */
589 0x0008000000LL, /* I-unit nop */
590 0x0008000000LL, /* M-unit nop */
591 0x4000000000LL, /* B-unit nop */
592 0x0008000000LL, /* F-unit nop */
593 0x0008000000LL, /* L-"unit" nop */
594 0x0008000000LL, /* X-unit nop */
595 };
596
597/* Can't be `const' as it's passed to input routines (which have the
598 habit of setting temporary sentinels. */
599static char special_section_name[][20] =
600 {
601 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 602 {".IA_64.unwind"}, {".IA_64.unwind_info"},
603 {".init_array"}, {".fini_array"}
800eeca4
JW		 604 };
605
606/* The best template for a particular sequence of up to three
607 instructions: */
608#define N IA64_NUM_TYPES
609static unsigned char best_template[N][N][N];
610#undef N
611
612/* Resource dependencies currently in effect */
613static struct rsrc {
614 int depind; /* dependency index */
615 const struct ia64_dependency *dependency; /* actual dependency */
616 unsigned specific:1, /* is this a specific bit/regno? */
617 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
618 int index; /* specific regno/bit within dependency */
619 int note; /* optional qualifying note (0 if none) */
620#define STATE_NONE 0
621#define STATE_STOP 1
622#define STATE_SRLZ 2
623 int insn_srlz; /* current insn serialization state */
624 int data_srlz; /* current data serialization state */
625 int qp_regno; /* qualifying predicate for this usage */
626 char *file; /* what file marked this dependency */
2434f565 627 unsigned int line; /* what line marked this dependency */
800eeca4 628 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 629 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 630 int path; /* corresponding code entry index */
631} *regdeps = NULL;
632static int regdepslen = 0;
633static int regdepstotlen = 0;
634static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
635static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 636 "data", "instr", "specific", "stop", "other" };
7484b8e6 637static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 638
639/* Current state of PR mutexation */
640static struct qpmutex {
641 valueT prmask;
642 int path;
643} *qp_mutexes = NULL; /* QP mutex bitmasks */
644static int qp_mutexeslen = 0;
645static int qp_mutexestotlen = 0;
197865e8 646static valueT qp_safe_across_calls = 0;
800eeca4
JW		 647
648/* Current state of PR implications */
649static struct qp_imply {
650 unsigned p1:6;
651 unsigned p2:6;
652 unsigned p2_branched:1;
653 int path;
654} *qp_implies = NULL;
655static int qp_implieslen = 0;
656static int qp_impliestotlen = 0;
657
197865e8
KH		 658/* Keep track of static GR values so that indirect register usage can
659 sometimes be tracked. */
800eeca4
JW		 660static struct gr {
661 unsigned known:1;
662 int path;
663 valueT value;
a66d2bb7
JB		 664} gr_values[128] = {
665 {
666 1,
667#ifdef INT_MAX
668 INT_MAX,
669#else
670 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
671#endif
672 0
673 }
674};
800eeca4 675
9545c4ce
L		 676/* Remember the alignment frag. */
677static fragS *align_frag;
678
800eeca4
JW		 679/* These are the routines required to output the various types of
680 unwind records. */
681
f5a30c2e
JW		 682/* A slot_number is a frag address plus the slot index (0-2). We use the
683 frag address here so that if there is a section switch in the middle of
684 a function, then instructions emitted to a different section are not
685 counted. Since there may be more than one frag for a function, this
686 means we also need to keep track of which frag this address belongs to
687 so we can compute inter-frag distances. This also nicely solves the
688 problem with nops emitted for align directives, which can't easily be
689 counted, but can easily be derived from frag sizes. */
690
800eeca4
JW		 691typedef struct unw_rec_list {
692 unwind_record r;
e0c9811a 693 unsigned long slot_number;
f5a30c2e 694 fragS *slot_frag;
73f20958
L		 695 unsigned long next_slot_number;
696 fragS *next_slot_frag;
800eeca4
JW		 697 struct unw_rec_list *next;
698} unw_rec_list;
699
2434f565 700#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 701
6290819d
NC		 702/* Linked list of saved prologue counts. A very poor
703 implementation of a map from label numbers to prologue counts. */
704typedef struct label_prologue_count
705{
706 struct label_prologue_count *next;
707 unsigned long label_number;
708 unsigned int prologue_count;
709} label_prologue_count;
710
e0c9811a
JW		 711static struct
712{
e0c9811a
JW		 713 /* Maintain a list of unwind entries for the current function. */
714 unw_rec_list *list;
715 unw_rec_list *tail;
800eeca4 716
e0c9811a
JW		 717 /* Any unwind entires that should be attached to the current slot
718 that an insn is being constructed for. */
719 unw_rec_list *current_entry;
800eeca4 720
e0c9811a
JW		 721 /* These are used to create the unwind table entry for this function. */
722 symbolS *proc_start;
e0c9811a
JW		 723 symbolS *info; /* pointer to unwind info */
724 symbolS *personality_routine;
91a2ae2a
RH		 725 segT saved_text_seg;
726 subsegT saved_text_subseg;
727 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 728
e0c9811a 729 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 730 unsigned int prologue : 1;
731 unsigned int prologue_mask : 4;
732 unsigned int body : 1;
733 unsigned int insn : 1;
33d01f33 734 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 735 /* Prologue counts at previous .label_state directives. */
736 struct label_prologue_count * saved_prologue_counts;
e0c9811a 737} unwind;
800eeca4 738
9f9a069e
JW		 739/* The input value is a negated offset from psp, and specifies an address
740 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
741 must add 16 and divide by 4 to get the encoded value. */
742
743#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
744
800eeca4
JW		 745typedef void (*vbyte_func) PARAMS ((int, char *, char *));
746
0234cb7c 747/* Forward declarations: */
800eeca4
JW		 748static void set_section PARAMS ((char *name));
749static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
750 unsigned int, unsigned int));
d9201763 751static void dot_align (int);
800eeca4
JW		 752static void dot_radix PARAMS ((int));
753static void dot_special_section PARAMS ((int));
754static void dot_proc PARAMS ((int));
755static void dot_fframe PARAMS ((int));
756static void dot_vframe PARAMS ((int));
150f24a2
JW		 757static void dot_vframesp PARAMS ((int));
758static void dot_vframepsp PARAMS ((int));
800eeca4
JW		 759static void dot_save PARAMS ((int));
760static void dot_restore PARAMS ((int));
150f24a2
JW		 761static void dot_restorereg PARAMS ((int));
762static void dot_restorereg_p PARAMS ((int));
800eeca4
JW		 763static void dot_handlerdata PARAMS ((int));
764static void dot_unwentry PARAMS ((int));
765static void dot_altrp PARAMS ((int));
e0c9811a 766static void dot_savemem PARAMS ((int));
800eeca4
JW		 767static void dot_saveg PARAMS ((int));
768static void dot_savef PARAMS ((int));
769static void dot_saveb PARAMS ((int));
770static void dot_savegf PARAMS ((int));
771static void dot_spill PARAMS ((int));
150f24a2
JW		 772static void dot_spillreg PARAMS ((int));
773static void dot_spillmem PARAMS ((int));
774static void dot_spillreg_p PARAMS ((int));
775static void dot_spillmem_p PARAMS ((int));
776static void dot_label_state PARAMS ((int));
777static void dot_copy_state PARAMS ((int));
800eeca4
JW		 778static void dot_unwabi PARAMS ((int));
779static void dot_personality PARAMS ((int));
780static void dot_body PARAMS ((int));
781static void dot_prologue PARAMS ((int));
782static void dot_endp PARAMS ((int));
783static void dot_template PARAMS ((int));
784static void dot_regstk PARAMS ((int));
785static void dot_rot PARAMS ((int));
786static void dot_byteorder PARAMS ((int));
787static void dot_psr PARAMS ((int));
788static void dot_alias PARAMS ((int));
789static void dot_ln PARAMS ((int));
ef6a2b41 790static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
800eeca4
JW		 791static void dot_xdata PARAMS ((int));
792static void stmt_float_cons PARAMS ((int));
793static void stmt_cons_ua PARAMS ((int));
794static void dot_xfloat_cons PARAMS ((int));
795static void dot_xstringer PARAMS ((int));
796static void dot_xdata_ua PARAMS ((int));
797static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 798static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 799static void dot_pred_rel PARAMS ((int));
800static void dot_reg_val PARAMS ((int));
5e819f9c 801static void dot_serialize PARAMS ((int));
800eeca4
JW		 802static void dot_dv_mode PARAMS ((int));
803static void dot_entry PARAMS ((int));
804static void dot_mem_offset PARAMS ((int));
e0c9811a 805static void add_unwind_entry PARAMS((unw_rec_list *ptr));
542d6675 806static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 807static void declare_register_set PARAMS ((const char *, int, int));
808static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 809static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
810 int index,
811 expressionS *e));
800eeca4
JW		 812static int parse_operand PARAMS ((expressionS *e));
813static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
814static void build_insn PARAMS ((struct slot *, bfd_vma *));
815static void emit_one_bundle PARAMS ((void));
816static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 817static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 818 bfd_reloc_code_real_type r_type));
819static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 820static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
821 struct rsrc *, int depind, int path));
800eeca4
JW		 822static void add_qp_mutex PARAMS((valueT mask));
823static void add_qp_imply PARAMS((int p1, int p2));
824static void clear_qp_branch_flag PARAMS((valueT mask));
825static void clear_qp_mutex PARAMS((valueT mask));
826static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 827static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 828static void clear_register_values PARAMS ((void));
829static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 830static void instruction_serialization PARAMS ((void));
831static void data_serialization PARAMS ((void));
832static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 833static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 834static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 835static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 836static int depends_on PARAMS ((int, struct ia64_opcode *));
837static int specify_resource PARAMS ((const struct ia64_dependency *,
838 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 839static int check_dv PARAMS((struct ia64_opcode *idesc));
840static void check_dependencies PARAMS((struct ia64_opcode *));
841static void mark_resources PARAMS((struct ia64_opcode *));
842static void update_dependencies PARAMS((struct ia64_opcode *));
843static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 844static int qp_mutex PARAMS ((int, int, int));
845static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
846static void output_vbyte_mem PARAMS ((int, char *, char *));
847static void count_output PARAMS ((int, char *, char *));
848static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
849static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 850static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 851static void output_P1_format PARAMS ((vbyte_func, int));
852static void output_P2_format PARAMS ((vbyte_func, int, int));
853static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
854static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
855static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
856static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
857static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
858static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
859static void output_P9_format PARAMS ((vbyte_func, int, int));
860static void output_P10_format PARAMS ((vbyte_func, int, int));
861static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
862static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 863static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
864static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 865static char format_ab_reg PARAMS ((int, int));
866static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
867 unsigned long));
868static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
869static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
870 unsigned long));
871static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 872static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 873static unw_rec_list *output_prologue PARAMS ((void));
874static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
875static unw_rec_list *output_body PARAMS ((void));
876static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
877static unw_rec_list *output_mem_stack_v PARAMS ((void));
878static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
879static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
880static unw_rec_list *output_rp_when PARAMS ((void));
881static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
882static unw_rec_list *output_rp_br PARAMS ((unsigned int));
883static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
884static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
885static unw_rec_list *output_pfs_when PARAMS ((void));
886static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
887static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
888static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
889static unw_rec_list *output_preds_when PARAMS ((void));
890static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
891static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
892static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
893static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
894static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
895static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
896static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
897static unw_rec_list *output_br_mem PARAMS ((unsigned int));
898static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
899static unw_rec_list *output_spill_base PARAMS ((unsigned int));
900static unw_rec_list *output_unat_when PARAMS ((void));
901static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
902static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
903static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
904static unw_rec_list *output_lc_when PARAMS ((void));
905static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
906static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
907static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
908static unw_rec_list *output_fpsr_when PARAMS ((void));
909static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
910static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
911static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
912static unw_rec_list *output_priunat_when_gr PARAMS ((void));
913static unw_rec_list *output_priunat_when_mem PARAMS ((void));
914static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
915static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
916static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
917static unw_rec_list *output_bsp_when PARAMS ((void));
918static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
919static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
920static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
921static unw_rec_list *output_bspstore_when PARAMS ((void));
922static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
923static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
924static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
925static unw_rec_list *output_rnat_when PARAMS ((void));
926static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
927static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
928static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
929static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
930static unw_rec_list *output_epilogue PARAMS ((unsigned long));
931static unw_rec_list *output_label_state PARAMS ((unsigned long));
932static unw_rec_list *output_copy_state PARAMS ((unsigned long));
933static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
934static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
935static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
936 unsigned int));
937static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
938 unsigned int));
939static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
940 unsigned int));
941static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
942 unsigned int, unsigned int));
943static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
944static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
945static int calc_record_size PARAMS ((unw_rec_list *));
946static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 947static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 948 unsigned long, fragS *,
949 int));
91a2ae2a 950static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 951static void fixup_unw_records PARAMS ((unw_rec_list *, int));
150f24a2
JW		 952static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
953static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
6290819d
NC		 954static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
955static void save_prologue_count PARAMS ((unsigned long, unsigned int));
956static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 957
652ca075 958/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 959 unit (as opposed to the memory unit). */
960static int
652ca075 961ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 962{
963 reg -= REG_AR;
652ca075
L		 964 return reg >= 64 && reg <= 111;
965}
800eeca4 966
652ca075
L		 967/* Determine if application register REGNUM resides only in the memory
968 unit (as opposed to the integer unit). */
969static int
970ar_is_only_in_memory_unit (int reg)
971{
972 reg -= REG_AR;
973 return reg >= 0 && reg <= 47;
800eeca4
JW		 974}
975
976/* Switch to section NAME and create section if necessary. It's
977 rather ugly that we have to manipulate input_line_pointer but I
978 don't see any other way to accomplish the same thing without
979 changing obj-elf.c (which may be the Right Thing, in the end). */
980static void
981set_section (name)
982 char *name;
983{
984 char *saved_input_line_pointer;
985
986 saved_input_line_pointer = input_line_pointer;
987 input_line_pointer = name;
988 obj_elf_section (0);
989 input_line_pointer = saved_input_line_pointer;
990}
991
d61a78a7
RH		 992/* Map 's' to SHF_IA_64_SHORT. */
993
994int
995ia64_elf_section_letter (letter, ptr_msg)
996 int letter;
997 char **ptr_msg;
998{
999 if (letter == 's')
1000 return SHF_IA_64_SHORT;
711ef82f
L		 1001 else if (letter == 'o')
1002 return SHF_LINK_ORDER;
d61a78a7 1003
711ef82f
L		 1004 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1005 return -1;
d61a78a7
RH		 1006}
1007
800eeca4
JW		 1008/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1009
1010flagword
1011ia64_elf_section_flags (flags, attr, type)
1012 flagword flags;
2434f565 1013 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 1014{
1015 if (attr & SHF_IA_64_SHORT)
1016 flags |= SEC_SMALL_DATA;
1017 return flags;
1018}
1019
91a2ae2a
RH		 1020int
1021ia64_elf_section_type (str, len)
40449e9f
KH		 1022 const char *str;
1023 size_t len;
91a2ae2a 1024{
1cd8ff38 1025#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 1026
1cd8ff38 1027 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 1028 return SHT_PROGBITS;
1029
1cd8ff38 1030 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 1031 return SHT_PROGBITS;
1032
1cd8ff38 1033 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 1034 return SHT_IA_64_UNWIND;
1035
1cd8ff38 1036 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1037 return SHT_IA_64_UNWIND;
1038
711ef82f
L		 1039 if (STREQ ("unwind"))
1040 return SHT_IA_64_UNWIND;
1041
91a2ae2a 1042 return -1;
1cd8ff38 1043#undef STREQ
91a2ae2a
RH		 1044}
1045
800eeca4
JW		 1046static unsigned int
1047set_regstack (ins, locs, outs, rots)
1048 unsigned int ins, locs, outs, rots;
1049{
542d6675
KH		 1050 /* Size of frame. */
1051 unsigned int sof;
800eeca4
JW		 1052
1053 sof = ins + locs + outs;
1054 if (sof > 96)
1055 {
1056 as_bad ("Size of frame exceeds maximum of 96 registers");
1057 return 0;
1058 }
1059 if (rots > sof)
1060 {
1061 as_warn ("Size of rotating registers exceeds frame size");
1062 return 0;
1063 }
1064 md.in.base = REG_GR + 32;
1065 md.loc.base = md.in.base + ins;
1066 md.out.base = md.loc.base + locs;
1067
1068 md.in.num_regs = ins;
1069 md.loc.num_regs = locs;
1070 md.out.num_regs = outs;
1071 md.rot.num_regs = rots;
1072 return sof;
1073}
1074
1075void
1076ia64_flush_insns ()
1077{
1078 struct label_fix *lfix;
1079 segT saved_seg;
1080 subsegT saved_subseg;
b44b1b85 1081 unw_rec_list *ptr;
800eeca4
JW		 1082
1083 if (!md.last_text_seg)
1084 return;
1085
1086 saved_seg = now_seg;
1087 saved_subseg = now_subseg;
1088
1089 subseg_set (md.last_text_seg, 0);
1090
1091 while (md.num_slots_in_use > 0)
1092 emit_one_bundle (); /* force out queued instructions */
1093
1094 /* In case there are labels following the last instruction, resolve
542d6675 1095 those now: */
800eeca4
JW		 1096 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1097 {
1098 S_SET_VALUE (lfix->sym, frag_now_fix ());
1099 symbol_set_frag (lfix->sym, frag_now);
1100 }
1101 CURR_SLOT.label_fixups = 0;
f1bcba5b
JW		 1102 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1103 {
1104 S_SET_VALUE (lfix->sym, frag_now_fix ());
1105 symbol_set_frag (lfix->sym, frag_now);
1106 }
1107 CURR_SLOT.tag_fixups = 0;
800eeca4 1108
b44b1b85 1109 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1110 resolve those now. We only handle prologue, body, and endp directives
1111 here. Give an error for others. */
b44b1b85
JW		 1112 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1113 {
9c59842f 1114 switch (ptr->r.type)
b44b1b85 1115 {
9c59842f
JW		 1116 case prologue:
1117 case prologue_gr:
1118 case body:
1119 case endp:
b44b1b85
JW		 1120 ptr->slot_number = (unsigned long) frag_more (0);
1121 ptr->slot_frag = frag_now;
9c59842f
JW		 1122 break;
1123
1124 /* Allow any record which doesn't have a "t" field (i.e.,
1125 doesn't relate to a particular instruction). */
1126 case unwabi:
1127 case br_gr:
1128 case copy_state:
1129 case fr_mem:
1130 case frgr_mem:
1131 case gr_gr:
1132 case gr_mem:
1133 case label_state:
1134 case rp_br:
1135 case spill_base:
1136 case spill_mask:
1137 /* nothing */
1138 break;
1139
1140 default:
1141 as_bad (_("Unwind directive not followed by an instruction."));
1142 break;
b44b1b85 1143 }
b44b1b85
JW		 1144 }
1145 unwind.current_entry = NULL;
1146
800eeca4 1147 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1148
1149 if (md.qp.X_op == O_register)
1150 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1151}
1152
d9201763
L		 1153static void
1154ia64_do_align (int nbytes)
800eeca4
JW		 1155{
1156 char *saved_input_line_pointer = input_line_pointer;
1157
1158 input_line_pointer = "";
1159 s_align_bytes (nbytes);
1160 input_line_pointer = saved_input_line_pointer;
1161}
1162
1163void
1164ia64_cons_align (nbytes)
1165 int nbytes;
1166{
1167 if (md.auto_align)
1168 {
1169 char *saved_input_line_pointer = input_line_pointer;
1170 input_line_pointer = "";
1171 s_align_bytes (nbytes);
1172 input_line_pointer = saved_input_line_pointer;
1173 }
1174}
1175
1176/* Output COUNT bytes to a memory location. */
2132e3a3 1177static char *vbyte_mem_ptr = NULL;
800eeca4 1178
197865e8 1179void
800eeca4
JW		 1180output_vbyte_mem (count, ptr, comment)
1181 int count;
1182 char *ptr;
2434f565 1183 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1184{
1185 int x;
1186 if (vbyte_mem_ptr == NULL)
1187 abort ();
1188
1189 if (count == 0)
1190 return;
1191 for (x = 0; x < count; x++)
1192 *(vbyte_mem_ptr++) = ptr[x];
1193}
1194
1195/* Count the number of bytes required for records. */
1196static int vbyte_count = 0;
197865e8 1197void
800eeca4
JW		 1198count_output (count, ptr, comment)
1199 int count;
2434f565
JW		 1200 char *ptr ATTRIBUTE_UNUSED;
1201 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1202{
1203 vbyte_count += count;
1204}
1205
1206static void
1207output_R1_format (f, rtype, rlen)
1208 vbyte_func f;
1209 unw_record_type rtype;
1210 int rlen;
1211{
e0c9811a 1212 int r = 0;
800eeca4
JW		 1213 char byte;
1214 if (rlen > 0x1f)
1215 {
1216 output_R3_format (f, rtype, rlen);
1217 return;
1218 }
197865e8 1219
e0c9811a
JW		 1220 if (rtype == body)
1221 r = 1;
1222 else if (rtype != prologue)
1223 as_bad ("record type is not valid");
1224
800eeca4
JW		 1225 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1226 (*f) (1, &byte, NULL);
1227}
1228
1229static void
1230output_R2_format (f, mask, grsave, rlen)
1231 vbyte_func f;
1232 int mask, grsave;
1233 unsigned long rlen;
1234{
1235 char bytes[20];
1236 int count = 2;
1237 mask = (mask & 0x0f);
1238 grsave = (grsave & 0x7f);
1239
1240 bytes[0] = (UNW_R2 | (mask >> 1));
1241 bytes[1] = (((mask & 0x01) << 7) | grsave);
1242 count += output_leb128 (bytes + 2, rlen, 0);
1243 (*f) (count, bytes, NULL);
1244}
1245
1246static void
1247output_R3_format (f, rtype, rlen)
1248 vbyte_func f;
1249 unw_record_type rtype;
1250 unsigned long rlen;
1251{
e0c9811a 1252 int r = 0, count;
800eeca4
JW		 1253 char bytes[20];
1254 if (rlen <= 0x1f)
1255 {
1256 output_R1_format (f, rtype, rlen);
1257 return;
1258 }
197865e8 1259
e0c9811a
JW		 1260 if (rtype == body)
1261 r = 1;
1262 else if (rtype != prologue)
1263 as_bad ("record type is not valid");
800eeca4
JW		 1264 bytes[0] = (UNW_R3 | r);
1265 count = output_leb128 (bytes + 1, rlen, 0);
1266 (*f) (count + 1, bytes, NULL);
1267}
1268
1269static void
1270output_P1_format (f, brmask)
1271 vbyte_func f;
1272 int brmask;
1273{
1274 char byte;
1275 byte = UNW_P1 | (brmask & 0x1f);
1276 (*f) (1, &byte, NULL);
1277}
1278
1279static void
1280output_P2_format (f, brmask, gr)
1281 vbyte_func f;
1282 int brmask;
1283 int gr;
1284{
1285 char bytes[2];
1286 brmask = (brmask & 0x1f);
1287 bytes[0] = UNW_P2 | (brmask >> 1);
1288 bytes[1] = (((brmask & 1) << 7) | gr);
1289 (*f) (2, bytes, NULL);
1290}
1291
1292static void
1293output_P3_format (f, rtype, reg)
1294 vbyte_func f;
1295 unw_record_type rtype;
1296 int reg;
1297{
1298 char bytes[2];
e0c9811a 1299 int r = 0;
800eeca4
JW		 1300 reg = (reg & 0x7f);
1301 switch (rtype)
542d6675 1302 {
800eeca4
JW		 1303 case psp_gr:
1304 r = 0;
1305 break;
1306 case rp_gr:
1307 r = 1;
1308 break;
1309 case pfs_gr:
1310 r = 2;
1311 break;
1312 case preds_gr:
1313 r = 3;
1314 break;
1315 case unat_gr:
1316 r = 4;
1317 break;
1318 case lc_gr:
1319 r = 5;
1320 break;
1321 case rp_br:
1322 r = 6;
1323 break;
1324 case rnat_gr:
1325 r = 7;
1326 break;
1327 case bsp_gr:
1328 r = 8;
1329 break;
1330 case bspstore_gr:
1331 r = 9;
1332 break;
1333 case fpsr_gr:
1334 r = 10;
1335 break;
1336 case priunat_gr:
1337 r = 11;
1338 break;
1339 default:
1340 as_bad ("Invalid record type for P3 format.");
542d6675 1341 }
800eeca4
JW		 1342 bytes[0] = (UNW_P3 | (r >> 1));
1343 bytes[1] = (((r & 1) << 7) | reg);
1344 (*f) (2, bytes, NULL);
1345}
1346
800eeca4 1347static void
e0c9811a 1348output_P4_format (f, imask, imask_size)
800eeca4 1349 vbyte_func f;
e0c9811a
JW		 1350 unsigned char *imask;
1351 unsigned long imask_size;
800eeca4 1352{
e0c9811a 1353 imask[0] = UNW_P4;
2132e3a3 1354 (*f) (imask_size, (char *) imask, NULL);
800eeca4
JW		 1355}
1356
1357static void
1358output_P5_format (f, grmask, frmask)
1359 vbyte_func f;
1360 int grmask;
1361 unsigned long frmask;
1362{
1363 char bytes[4];
1364 grmask = (grmask & 0x0f);
1365
1366 bytes[0] = UNW_P5;
1367 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1368 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1369 bytes[3] = (frmask & 0x000000ff);
1370 (*f) (4, bytes, NULL);
1371}
1372
1373static void
1374output_P6_format (f, rtype, rmask)
1375 vbyte_func f;
1376 unw_record_type rtype;
1377 int rmask;
1378{
1379 char byte;
e0c9811a 1380 int r = 0;
197865e8 1381
e0c9811a
JW		 1382 if (rtype == gr_mem)
1383 r = 1;
1384 else if (rtype != fr_mem)
1385 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1386 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1387 (*f) (1, &byte, NULL);
1388}
1389
1390static void
1391output_P7_format (f, rtype, w1, w2)
1392 vbyte_func f;
1393 unw_record_type rtype;
1394 unsigned long w1;
1395 unsigned long w2;
1396{
1397 char bytes[20];
1398 int count = 1;
e0c9811a 1399 int r = 0;
800eeca4
JW		 1400 count += output_leb128 (bytes + 1, w1, 0);
1401 switch (rtype)
1402 {
542d6675
KH		 1403 case mem_stack_f:
1404 r = 0;
1405 count += output_leb128 (bytes + count, w2 >> 4, 0);
1406 break;
1407 case mem_stack_v:
1408 r = 1;
1409 break;
1410 case spill_base:
1411 r = 2;
1412 break;
1413 case psp_sprel:
1414 r = 3;
1415 break;
1416 case rp_when:
1417 r = 4;
1418 break;
1419 case rp_psprel:
1420 r = 5;
1421 break;
1422 case pfs_when:
1423 r = 6;
1424 break;
1425 case pfs_psprel:
1426 r = 7;
1427 break;
1428 case preds_when:
1429 r = 8;
1430 break;
1431 case preds_psprel:
1432 r = 9;
1433 break;
1434 case lc_when:
1435 r = 10;
1436 break;
1437 case lc_psprel:
1438 r = 11;
1439 break;
1440 case unat_when:
1441 r = 12;
1442 break;
1443 case unat_psprel:
1444 r = 13;
1445 break;
1446 case fpsr_when:
1447 r = 14;
1448 break;
1449 case fpsr_psprel:
1450 r = 15;
1451 break;
1452 default:
1453 break;
800eeca4
JW		 1454 }
1455 bytes[0] = (UNW_P7 | r);
1456 (*f) (count, bytes, NULL);
1457}
1458
1459static void
1460output_P8_format (f, rtype, t)
1461 vbyte_func f;
1462 unw_record_type rtype;
1463 unsigned long t;
1464{
1465 char bytes[20];
e0c9811a 1466 int r = 0;
800eeca4
JW		 1467 int count = 2;
1468 bytes[0] = UNW_P8;
1469 switch (rtype)
1470 {
542d6675
KH		 1471 case rp_sprel:
1472 r = 1;
1473 break;
1474 case pfs_sprel:
1475 r = 2;
1476 break;
1477 case preds_sprel:
1478 r = 3;
1479 break;
1480 case lc_sprel:
1481 r = 4;
1482 break;
1483 case unat_sprel:
1484 r = 5;
1485 break;
1486 case fpsr_sprel:
1487 r = 6;
1488 break;
1489 case bsp_when:
1490 r = 7;
1491 break;
1492 case bsp_psprel:
1493 r = 8;
1494 break;
1495 case bsp_sprel:
1496 r = 9;
1497 break;
1498 case bspstore_when:
1499 r = 10;
1500 break;
1501 case bspstore_psprel:
1502 r = 11;
1503 break;
1504 case bspstore_sprel:
1505 r = 12;
1506 break;
1507 case rnat_when:
1508 r = 13;
1509 break;
1510 case rnat_psprel:
1511 r = 14;
1512 break;
1513 case rnat_sprel:
1514 r = 15;
1515 break;
1516 case priunat_when_gr:
1517 r = 16;
1518 break;
1519 case priunat_psprel:
1520 r = 17;
1521 break;
1522 case priunat_sprel:
1523 r = 18;
1524 break;
1525 case priunat_when_mem:
1526 r = 19;
1527 break;
1528 default:
1529 break;
800eeca4
JW		 1530 }
1531 bytes[1] = r;
1532 count += output_leb128 (bytes + 2, t, 0);
1533 (*f) (count, bytes, NULL);
1534}
1535
1536static void
1537output_P9_format (f, grmask, gr)
1538 vbyte_func f;
1539 int grmask;
1540 int gr;
1541{
1542 char bytes[3];
1543 bytes[0] = UNW_P9;
1544 bytes[1] = (grmask & 0x0f);
1545 bytes[2] = (gr & 0x7f);
1546 (*f) (3, bytes, NULL);
1547}
1548
1549static void
1550output_P10_format (f, abi, context)
1551 vbyte_func f;
1552 int abi;
1553 int context;
1554{
1555 char bytes[3];
1556 bytes[0] = UNW_P10;
1557 bytes[1] = (abi & 0xff);
1558 bytes[2] = (context & 0xff);
1559 (*f) (3, bytes, NULL);
1560}
1561
1562static void
1563output_B1_format (f, rtype, label)
1564 vbyte_func f;
1565 unw_record_type rtype;
1566 unsigned long label;
1567{
1568 char byte;
e0c9811a 1569 int r = 0;
197865e8 1570 if (label > 0x1f)
800eeca4
JW		 1571 {
1572 output_B4_format (f, rtype, label);
1573 return;
1574 }
e0c9811a
JW		 1575 if (rtype == copy_state)
1576 r = 1;
1577 else if (rtype != label_state)
1578 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1579
1580 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1581 (*f) (1, &byte, NULL);
1582}
1583
1584static void
1585output_B2_format (f, ecount, t)
1586 vbyte_func f;
1587 unsigned long ecount;
1588 unsigned long t;
1589{
1590 char bytes[20];
1591 int count = 1;
1592 if (ecount > 0x1f)
1593 {
1594 output_B3_format (f, ecount, t);
1595 return;
1596 }
1597 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1598 count += output_leb128 (bytes + 1, t, 0);
1599 (*f) (count, bytes, NULL);
1600}
1601
1602static void
1603output_B3_format (f, ecount, t)
1604 vbyte_func f;
1605 unsigned long ecount;
1606 unsigned long t;
1607{
1608 char bytes[20];
1609 int count = 1;
1610 if (ecount <= 0x1f)
1611 {
1612 output_B2_format (f, ecount, t);
1613 return;
1614 }
1615 bytes[0] = UNW_B3;
1616 count += output_leb128 (bytes + 1, t, 0);
1617 count += output_leb128 (bytes + count, ecount, 0);
1618 (*f) (count, bytes, NULL);
1619}
1620
1621static void
1622output_B4_format (f, rtype, label)
1623 vbyte_func f;
1624 unw_record_type rtype;
1625 unsigned long label;
1626{
1627 char bytes[20];
e0c9811a 1628 int r = 0;
800eeca4 1629 int count = 1;
197865e8 1630 if (label <= 0x1f)
800eeca4
JW		 1631 {
1632 output_B1_format (f, rtype, label);
1633 return;
1634 }
197865e8 1635
e0c9811a
JW		 1636 if (rtype == copy_state)
1637 r = 1;
1638 else if (rtype != label_state)
1639 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1640
1641 bytes[0] = (UNW_B4 | (r << 3));
1642 count += output_leb128 (bytes + 1, label, 0);
1643 (*f) (count, bytes, NULL);
1644}
1645
1646static char
e0c9811a 1647format_ab_reg (ab, reg)
542d6675
KH		 1648 int ab;
1649 int reg;
800eeca4
JW		 1650{
1651 int ret;
e0c9811a 1652 ab = (ab & 3);
800eeca4 1653 reg = (reg & 0x1f);
e0c9811a 1654 ret = (ab << 5) | reg;
800eeca4
JW		 1655 return ret;
1656}
1657
1658static void
e0c9811a 1659output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1660 vbyte_func f;
1661 unw_record_type rtype;
e0c9811a 1662 int ab, reg;
800eeca4
JW		 1663 unsigned long t;
1664 unsigned long w1;
1665{
1666 char bytes[20];
e0c9811a 1667 int r = 0;
800eeca4
JW		 1668 int count = 2;
1669 bytes[0] = UNW_X1;
197865e8 1670
e0c9811a
JW		 1671 if (rtype == spill_sprel)
1672 r = 1;
1673 else if (rtype != spill_psprel)
1674 as_bad ("Invalid record type for format X1");
1675 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1676 count += output_leb128 (bytes + 2, t, 0);
1677 count += output_leb128 (bytes + count, w1, 0);
1678 (*f) (count, bytes, NULL);
1679}
1680
1681static void
e0c9811a 1682output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1683 vbyte_func f;
e0c9811a 1684 int ab, reg;
800eeca4
JW		 1685 int x, y, treg;
1686 unsigned long t;
1687{
1688 char bytes[20];
800eeca4
JW		 1689 int count = 3;
1690 bytes[0] = UNW_X2;
e0c9811a 1691 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1692 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1693 count += output_leb128 (bytes + 3, t, 0);
1694 (*f) (count, bytes, NULL);
1695}
1696
1697static void
e0c9811a 1698output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1699 vbyte_func f;
1700 unw_record_type rtype;
1701 int qp;
e0c9811a 1702 int ab, reg;
800eeca4
JW		 1703 unsigned long t;
1704 unsigned long w1;
1705{
1706 char bytes[20];
e0c9811a 1707 int r = 0;
800eeca4 1708 int count = 3;
e0c9811a
JW		 1709 bytes[0] = UNW_X3;
1710
1711 if (rtype == spill_sprel_p)
1712 r = 1;
1713 else if (rtype != spill_psprel_p)
1714 as_bad ("Invalid record type for format X3");
800eeca4 1715 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1716 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1717 count += output_leb128 (bytes + 3, t, 0);
1718 count += output_leb128 (bytes + count, w1, 0);
1719 (*f) (count, bytes, NULL);
1720}
1721
1722static void
e0c9811a 1723output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1724 vbyte_func f;
1725 int qp;
e0c9811a 1726 int ab, reg;
800eeca4
JW		 1727 int x, y, treg;
1728 unsigned long t;
1729{
1730 char bytes[20];
800eeca4 1731 int count = 4;
e0c9811a 1732 bytes[0] = UNW_X4;
800eeca4 1733 bytes[1] = (qp & 0x3f);
e0c9811a 1734 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1735 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1736 count += output_leb128 (bytes + 4, t, 0);
1737 (*f) (count, bytes, NULL);
1738}
1739
1740/* This function allocates a record list structure, and initializes fields. */
542d6675 1741
800eeca4 1742static unw_rec_list *
197865e8 1743alloc_record (unw_record_type t)
800eeca4
JW		 1744{
1745 unw_rec_list *ptr;
1746 ptr = xmalloc (sizeof (*ptr));
1747 ptr->next = NULL;
1748 ptr->slot_number = SLOT_NUM_NOT_SET;
1749 ptr->r.type = t;
73f20958
L		 1750 ptr->next_slot_number = 0;
1751 ptr->next_slot_frag = 0;
800eeca4
JW		 1752 return ptr;
1753}
1754
5738bc24
JW		 1755/* Dummy unwind record used for calculating the length of the last prologue or
1756 body region. */
1757
1758static unw_rec_list *
1759output_endp ()
1760{
1761 unw_rec_list *ptr = alloc_record (endp);
1762 return ptr;
1763}
1764
800eeca4
JW		 1765static unw_rec_list *
1766output_prologue ()
1767{
1768 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1769 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1770 return ptr;
1771}
1772
1773static unw_rec_list *
1774output_prologue_gr (saved_mask, reg)
1775 unsigned int saved_mask;
1776 unsigned int reg;
1777{
1778 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1779 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1780 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1781 ptr->r.record.r.grsave = reg;
1782 return ptr;
1783}
1784
1785static unw_rec_list *
1786output_body ()
1787{
1788 unw_rec_list *ptr = alloc_record (body);
1789 return ptr;
1790}
1791
1792static unw_rec_list *
1793output_mem_stack_f (size)
1794 unsigned int size;
1795{
1796 unw_rec_list *ptr = alloc_record (mem_stack_f);
1797 ptr->r.record.p.size = size;
1798 return ptr;
1799}
1800
1801static unw_rec_list *
1802output_mem_stack_v ()
1803{
1804 unw_rec_list *ptr = alloc_record (mem_stack_v);
1805 return ptr;
1806}
1807
1808static unw_rec_list *
1809output_psp_gr (gr)
1810 unsigned int gr;
1811{
1812 unw_rec_list *ptr = alloc_record (psp_gr);
1813 ptr->r.record.p.gr = gr;
1814 return ptr;
1815}
1816
1817static unw_rec_list *
1818output_psp_sprel (offset)
1819 unsigned int offset;
1820{
1821 unw_rec_list *ptr = alloc_record (psp_sprel);
542d6675 1822 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1823 return ptr;
1824}
1825
1826static unw_rec_list *
1827output_rp_when ()
1828{
1829 unw_rec_list *ptr = alloc_record (rp_when);
1830 return ptr;
1831}
1832
1833static unw_rec_list *
1834output_rp_gr (gr)
1835 unsigned int gr;
1836{
1837 unw_rec_list *ptr = alloc_record (rp_gr);
1838 ptr->r.record.p.gr = gr;
1839 return ptr;
1840}
1841
1842static unw_rec_list *
1843output_rp_br (br)
1844 unsigned int br;
1845{
1846 unw_rec_list *ptr = alloc_record (rp_br);
1847 ptr->r.record.p.br = br;
1848 return ptr;
1849}
1850
1851static unw_rec_list *
1852output_rp_psprel (offset)
1853 unsigned int offset;
1854{
1855 unw_rec_list *ptr = alloc_record (rp_psprel);
9f9a069e 1856 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1857 return ptr;
1858}
1859
1860static unw_rec_list *
1861output_rp_sprel (offset)
1862 unsigned int offset;
1863{
1864 unw_rec_list *ptr = alloc_record (rp_sprel);
542d6675 1865 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1866 return ptr;
1867}
1868
1869static unw_rec_list *
1870output_pfs_when ()
1871{
1872 unw_rec_list *ptr = alloc_record (pfs_when);
1873 return ptr;
1874}
1875
1876static unw_rec_list *
1877output_pfs_gr (gr)
1878 unsigned int gr;
1879{
1880 unw_rec_list *ptr = alloc_record (pfs_gr);
1881 ptr->r.record.p.gr = gr;
1882 return ptr;
1883}
1884
1885static unw_rec_list *
1886output_pfs_psprel (offset)
1887 unsigned int offset;
1888{
1889 unw_rec_list *ptr = alloc_record (pfs_psprel);
9f9a069e 1890 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1891 return ptr;
1892}
1893
1894static unw_rec_list *
1895output_pfs_sprel (offset)
1896 unsigned int offset;
1897{
1898 unw_rec_list *ptr = alloc_record (pfs_sprel);
542d6675 1899 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1900 return ptr;
1901}
1902
1903static unw_rec_list *
1904output_preds_when ()
1905{
1906 unw_rec_list *ptr = alloc_record (preds_when);
1907 return ptr;
1908}
1909
1910static unw_rec_list *
1911output_preds_gr (gr)
1912 unsigned int gr;
1913{
1914 unw_rec_list *ptr = alloc_record (preds_gr);
1915 ptr->r.record.p.gr = gr;
1916 return ptr;
1917}
1918
1919static unw_rec_list *
1920output_preds_psprel (offset)
1921 unsigned int offset;
1922{
1923 unw_rec_list *ptr = alloc_record (preds_psprel);
9f9a069e 1924 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1925 return ptr;
1926}
1927
1928static unw_rec_list *
1929output_preds_sprel (offset)
1930 unsigned int offset;
1931{
1932 unw_rec_list *ptr = alloc_record (preds_sprel);
542d6675 1933 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1934 return ptr;
1935}
1936
1937static unw_rec_list *
1938output_fr_mem (mask)
1939 unsigned int mask;
1940{
1941 unw_rec_list *ptr = alloc_record (fr_mem);
1942 ptr->r.record.p.rmask = mask;
1943 return ptr;
1944}
1945
1946static unw_rec_list *
1947output_frgr_mem (gr_mask, fr_mask)
1948 unsigned int gr_mask;
1949 unsigned int fr_mask;
1950{
1951 unw_rec_list *ptr = alloc_record (frgr_mem);
1952 ptr->r.record.p.grmask = gr_mask;
1953 ptr->r.record.p.frmask = fr_mask;
1954 return ptr;
1955}
1956
1957static unw_rec_list *
1958output_gr_gr (mask, reg)
1959 unsigned int mask;
1960 unsigned int reg;
1961{
1962 unw_rec_list *ptr = alloc_record (gr_gr);
1963 ptr->r.record.p.grmask = mask;
1964 ptr->r.record.p.gr = reg;
1965 return ptr;
1966}
1967
1968static unw_rec_list *
1969output_gr_mem (mask)
1970 unsigned int mask;
1971{
1972 unw_rec_list *ptr = alloc_record (gr_mem);
1973 ptr->r.record.p.rmask = mask;
1974 return ptr;
1975}
1976
1977static unw_rec_list *
1978output_br_mem (unsigned int mask)
1979{
1980 unw_rec_list *ptr = alloc_record (br_mem);
1981 ptr->r.record.p.brmask = mask;
1982 return ptr;
1983}
1984
1985static unw_rec_list *
1986output_br_gr (save_mask, reg)
1987 unsigned int save_mask;
1988 unsigned int reg;
1989{
1990 unw_rec_list *ptr = alloc_record (br_gr);
1991 ptr->r.record.p.brmask = save_mask;
1992 ptr->r.record.p.gr = reg;
1993 return ptr;
1994}
1995
1996static unw_rec_list *
1997output_spill_base (offset)
1998 unsigned int offset;
1999{
2000 unw_rec_list *ptr = alloc_record (spill_base);
9f9a069e 2001 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2002 return ptr;
2003}
2004
2005static unw_rec_list *
2006output_unat_when ()
2007{
2008 unw_rec_list *ptr = alloc_record (unat_when);
2009 return ptr;
2010}
2011
2012static unw_rec_list *
2013output_unat_gr (gr)
2014 unsigned int gr;
2015{
2016 unw_rec_list *ptr = alloc_record (unat_gr);
2017 ptr->r.record.p.gr = gr;
2018 return ptr;
2019}
2020
2021static unw_rec_list *
2022output_unat_psprel (offset)
2023 unsigned int offset;
2024{
2025 unw_rec_list *ptr = alloc_record (unat_psprel);
9f9a069e 2026 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2027 return ptr;
2028}
2029
2030static unw_rec_list *
2031output_unat_sprel (offset)
2032 unsigned int offset;
2033{
2034 unw_rec_list *ptr = alloc_record (unat_sprel);
542d6675 2035 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2036 return ptr;
2037}
2038
2039static unw_rec_list *
2040output_lc_when ()
2041{
2042 unw_rec_list *ptr = alloc_record (lc_when);
2043 return ptr;
2044}
2045
2046static unw_rec_list *
2047output_lc_gr (gr)
2048 unsigned int gr;
2049{
2050 unw_rec_list *ptr = alloc_record (lc_gr);
2051 ptr->r.record.p.gr = gr;
2052 return ptr;
2053}
2054
2055static unw_rec_list *
2056output_lc_psprel (offset)
2057 unsigned int offset;
2058{
2059 unw_rec_list *ptr = alloc_record (lc_psprel);
9f9a069e 2060 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2061 return ptr;
2062}
2063
2064static unw_rec_list *
2065output_lc_sprel (offset)
2066 unsigned int offset;
2067{
2068 unw_rec_list *ptr = alloc_record (lc_sprel);
542d6675 2069 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2070 return ptr;
2071}
2072
2073static unw_rec_list *
2074output_fpsr_when ()
2075{
2076 unw_rec_list *ptr = alloc_record (fpsr_when);
2077 return ptr;
2078}
2079
2080static unw_rec_list *
2081output_fpsr_gr (gr)
2082 unsigned int gr;
2083{
2084 unw_rec_list *ptr = alloc_record (fpsr_gr);
2085 ptr->r.record.p.gr = gr;
2086 return ptr;
2087}
2088
2089static unw_rec_list *
2090output_fpsr_psprel (offset)
2091 unsigned int offset;
2092{
2093 unw_rec_list *ptr = alloc_record (fpsr_psprel);
9f9a069e 2094 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2095 return ptr;
2096}
2097
2098static unw_rec_list *
2099output_fpsr_sprel (offset)
2100 unsigned int offset;
2101{
2102 unw_rec_list *ptr = alloc_record (fpsr_sprel);
542d6675 2103 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2104 return ptr;
2105}
2106
2107static unw_rec_list *
2108output_priunat_when_gr ()
2109{
2110 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2111 return ptr;
2112}
2113
2114static unw_rec_list *
2115output_priunat_when_mem ()
2116{
2117 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2118 return ptr;
2119}
2120
2121static unw_rec_list *
2122output_priunat_gr (gr)
2123 unsigned int gr;
2124{
2125 unw_rec_list *ptr = alloc_record (priunat_gr);
2126 ptr->r.record.p.gr = gr;
2127 return ptr;
2128}
2129
2130static unw_rec_list *
2131output_priunat_psprel (offset)
2132 unsigned int offset;
2133{
2134 unw_rec_list *ptr = alloc_record (priunat_psprel);
9f9a069e 2135 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2136 return ptr;
2137}
2138
2139static unw_rec_list *
2140output_priunat_sprel (offset)
2141 unsigned int offset;
2142{
2143 unw_rec_list *ptr = alloc_record (priunat_sprel);
542d6675 2144 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2145 return ptr;
2146}
2147
2148static unw_rec_list *
2149output_bsp_when ()
2150{
2151 unw_rec_list *ptr = alloc_record (bsp_when);
2152 return ptr;
2153}
2154
2155static unw_rec_list *
2156output_bsp_gr (gr)
2157 unsigned int gr;
2158{
2159 unw_rec_list *ptr = alloc_record (bsp_gr);
2160 ptr->r.record.p.gr = gr;
2161 return ptr;
2162}
2163
2164static unw_rec_list *
2165output_bsp_psprel (offset)
2166 unsigned int offset;
2167{
2168 unw_rec_list *ptr = alloc_record (bsp_psprel);
9f9a069e 2169 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2170 return ptr;
2171}
2172
2173static unw_rec_list *
2174output_bsp_sprel (offset)
2175 unsigned int offset;
2176{
2177 unw_rec_list *ptr = alloc_record (bsp_sprel);
542d6675 2178 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2179 return ptr;
2180}
2181
2182static unw_rec_list *
2183output_bspstore_when ()
2184{
2185 unw_rec_list *ptr = alloc_record (bspstore_when);
2186 return ptr;
2187}
2188
2189static unw_rec_list *
2190output_bspstore_gr (gr)
2191 unsigned int gr;
2192{
2193 unw_rec_list *ptr = alloc_record (bspstore_gr);
2194 ptr->r.record.p.gr = gr;
2195 return ptr;
2196}
2197
2198static unw_rec_list *
2199output_bspstore_psprel (offset)
2200 unsigned int offset;
2201{
2202 unw_rec_list *ptr = alloc_record (bspstore_psprel);
9f9a069e 2203 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2204 return ptr;
2205}
2206
2207static unw_rec_list *
2208output_bspstore_sprel (offset)
2209 unsigned int offset;
2210{
2211 unw_rec_list *ptr = alloc_record (bspstore_sprel);
542d6675 2212 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2213 return ptr;
2214}
2215
2216static unw_rec_list *
2217output_rnat_when ()
2218{
2219 unw_rec_list *ptr = alloc_record (rnat_when);
2220 return ptr;
2221}
2222
2223static unw_rec_list *
2224output_rnat_gr (gr)
2225 unsigned int gr;
2226{
2227 unw_rec_list *ptr = alloc_record (rnat_gr);
2228 ptr->r.record.p.gr = gr;
2229 return ptr;
2230}
2231
2232static unw_rec_list *
2233output_rnat_psprel (offset)
2234 unsigned int offset;
2235{
2236 unw_rec_list *ptr = alloc_record (rnat_psprel);
9f9a069e 2237 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2238 return ptr;
2239}
2240
2241static unw_rec_list *
2242output_rnat_sprel (offset)
2243 unsigned int offset;
2244{
2245 unw_rec_list *ptr = alloc_record (rnat_sprel);
542d6675 2246 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2247 return ptr;
2248}
2249
2250static unw_rec_list *
e0c9811a
JW		 2251output_unwabi (abi, context)
2252 unsigned long abi;
2253 unsigned long context;
800eeca4 2254{
e0c9811a
JW		 2255 unw_rec_list *ptr = alloc_record (unwabi);
2256 ptr->r.record.p.abi = abi;
2257 ptr->r.record.p.context = context;
800eeca4
JW		 2258 return ptr;
2259}
2260
2261static unw_rec_list *
e0c9811a 2262output_epilogue (unsigned long ecount)
800eeca4 2263{
e0c9811a
JW		 2264 unw_rec_list *ptr = alloc_record (epilogue);
2265 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2266 return ptr;
2267}
2268
2269static unw_rec_list *
e0c9811a 2270output_label_state (unsigned long label)
800eeca4 2271{
e0c9811a
JW		 2272 unw_rec_list *ptr = alloc_record (label_state);
2273 ptr->r.record.b.label = label;
800eeca4
JW		 2274 return ptr;
2275}
2276
2277static unw_rec_list *
e0c9811a
JW		 2278output_copy_state (unsigned long label)
2279{
2280 unw_rec_list *ptr = alloc_record (copy_state);
2281 ptr->r.record.b.label = label;
2282 return ptr;
2283}
2284
2285static unw_rec_list *
2286output_spill_psprel (ab, reg, offset)
2287 unsigned int ab;
800eeca4
JW		 2288 unsigned int reg;
2289 unsigned int offset;
2290{
2291 unw_rec_list *ptr = alloc_record (spill_psprel);
e0c9811a 2292 ptr->r.record.x.ab = ab;
800eeca4 2293 ptr->r.record.x.reg = reg;
9f9a069e 2294 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2295 return ptr;
2296}
2297
2298static unw_rec_list *
e0c9811a
JW		 2299output_spill_sprel (ab, reg, offset)
2300 unsigned int ab;
800eeca4
JW		 2301 unsigned int reg;
2302 unsigned int offset;
2303{
2304 unw_rec_list *ptr = alloc_record (spill_sprel);
e0c9811a 2305 ptr->r.record.x.ab = ab;
800eeca4 2306 ptr->r.record.x.reg = reg;
542d6675 2307 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2308 return ptr;
2309}
2310
2311static unw_rec_list *
e0c9811a
JW		 2312output_spill_psprel_p (ab, reg, offset, predicate)
2313 unsigned int ab;
800eeca4
JW		 2314 unsigned int reg;
2315 unsigned int offset;
2316 unsigned int predicate;
2317{
2318 unw_rec_list *ptr = alloc_record (spill_psprel_p);
e0c9811a 2319 ptr->r.record.x.ab = ab;
800eeca4 2320 ptr->r.record.x.reg = reg;
9f9a069e 2321 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2322 ptr->r.record.x.qp = predicate;
2323 return ptr;
2324}
2325
2326static unw_rec_list *
e0c9811a
JW		 2327output_spill_sprel_p (ab, reg, offset, predicate)
2328 unsigned int ab;
800eeca4
JW		 2329 unsigned int reg;
2330 unsigned int offset;
2331 unsigned int predicate;
2332{
2333 unw_rec_list *ptr = alloc_record (spill_sprel_p);
e0c9811a 2334 ptr->r.record.x.ab = ab;
800eeca4 2335 ptr->r.record.x.reg = reg;
542d6675 2336 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2337 ptr->r.record.x.qp = predicate;
2338 return ptr;
2339}
2340
2341static unw_rec_list *
e0c9811a
JW		 2342output_spill_reg (ab, reg, targ_reg, xy)
2343 unsigned int ab;
800eeca4
JW		 2344 unsigned int reg;
2345 unsigned int targ_reg;
2346 unsigned int xy;
2347{
2348 unw_rec_list *ptr = alloc_record (spill_reg);
e0c9811a 2349 ptr->r.record.x.ab = ab;
800eeca4
JW		 2350 ptr->r.record.x.reg = reg;
2351 ptr->r.record.x.treg = targ_reg;
2352 ptr->r.record.x.xy = xy;
2353 return ptr;
2354}
2355
2356static unw_rec_list *
e0c9811a
JW		 2357output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2358 unsigned int ab;
800eeca4
JW		 2359 unsigned int reg;
2360 unsigned int targ_reg;
2361 unsigned int xy;
2362 unsigned int predicate;
2363{
2364 unw_rec_list *ptr = alloc_record (spill_reg_p);
e0c9811a 2365 ptr->r.record.x.ab = ab;
800eeca4
JW		 2366 ptr->r.record.x.reg = reg;
2367 ptr->r.record.x.treg = targ_reg;
2368 ptr->r.record.x.xy = xy;
2369 ptr->r.record.x.qp = predicate;
2370 return ptr;
2371}
2372
197865e8 2373/* Given a unw_rec_list process the correct format with the
800eeca4 2374 specified function. */
542d6675 2375
800eeca4
JW		 2376static void
2377process_one_record (ptr, f)
2378 unw_rec_list *ptr;
2379 vbyte_func f;
2380{
e0c9811a
JW		 2381 unsigned long fr_mask, gr_mask;
2382
197865e8 2383 switch (ptr->r.type)
800eeca4 2384 {
5738bc24
JW		 2385 /* This is a dummy record that takes up no space in the output. */
2386 case endp:
2387 break;
2388
542d6675
KH		 2389 case gr_mem:
2390 case fr_mem:
2391 case br_mem:
2392 case frgr_mem:
2393 /* These are taken care of by prologue/prologue_gr. */
2394 break;
e0c9811a 2395
542d6675
KH		 2396 case prologue_gr:
2397 case prologue:
2398 if (ptr->r.type == prologue_gr)
2399 output_R2_format (f, ptr->r.record.r.grmask,
2400 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2401 else
800eeca4 2402 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2403
2404 /* Output descriptor(s) for union of register spills (if any). */
2405 gr_mask = ptr->r.record.r.mask.gr_mem;
2406 fr_mask = ptr->r.record.r.mask.fr_mem;
2407 if (fr_mask)
2408 {
2409 if ((fr_mask & ~0xfUL) == 0)
2410 output_P6_format (f, fr_mem, fr_mask);
2411 else
2412 {
2413 output_P5_format (f, gr_mask, fr_mask);
2414 gr_mask = 0;
2415 }
2416 }
2417 if (gr_mask)
2418 output_P6_format (f, gr_mem, gr_mask);
2419 if (ptr->r.record.r.mask.br_mem)
2420 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2421
2422 /* output imask descriptor if necessary: */
2423 if (ptr->r.record.r.mask.i)
2424 output_P4_format (f, ptr->r.record.r.mask.i,
2425 ptr->r.record.r.imask_size);
2426 break;
2427
2428 case body:
2429 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2430 break;
2431 case mem_stack_f:
2432 case mem_stack_v:
2433 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2434 ptr->r.record.p.size);
2435 break;
2436 case psp_gr:
2437 case rp_gr:
2438 case pfs_gr:
2439 case preds_gr:
2440 case unat_gr:
2441 case lc_gr:
2442 case fpsr_gr:
2443 case priunat_gr:
2444 case bsp_gr:
2445 case bspstore_gr:
2446 case rnat_gr:
2447 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2448 break;
2449 case rp_br:
2450 output_P3_format (f, rp_br, ptr->r.record.p.br);
2451 break;
2452 case psp_sprel:
2453 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2454 break;
2455 case rp_when:
2456 case pfs_when:
2457 case preds_when:
2458 case unat_when:
2459 case lc_when:
2460 case fpsr_when:
2461 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2462 break;
2463 case rp_psprel:
2464 case pfs_psprel:
2465 case preds_psprel:
2466 case unat_psprel:
2467 case lc_psprel:
2468 case fpsr_psprel:
2469 case spill_base:
2470 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2471 break;
2472 case rp_sprel:
2473 case pfs_sprel:
2474 case preds_sprel:
2475 case unat_sprel:
2476 case lc_sprel:
2477 case fpsr_sprel:
2478 case priunat_sprel:
2479 case bsp_sprel:
2480 case bspstore_sprel:
2481 case rnat_sprel:
2482 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2483 break;
2484 case gr_gr:
2485 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2486 break;
2487 case br_gr:
2488 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2489 break;
2490 case spill_mask:
2491 as_bad ("spill_mask record unimplemented.");
2492 break;
2493 case priunat_when_gr:
2494 case priunat_when_mem:
2495 case bsp_when:
2496 case bspstore_when:
2497 case rnat_when:
2498 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2499 break;
2500 case priunat_psprel:
2501 case bsp_psprel:
2502 case bspstore_psprel:
2503 case rnat_psprel:
2504 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2505 break;
2506 case unwabi:
2507 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2508 break;
2509 case epilogue:
2510 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2511 break;
2512 case label_state:
2513 case copy_state:
2514 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2515 break;
2516 case spill_psprel:
2517 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2518 ptr->r.record.x.reg, ptr->r.record.x.t,
2519 ptr->r.record.x.pspoff);
2520 break;
2521 case spill_sprel:
2522 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2523 ptr->r.record.x.reg, ptr->r.record.x.t,
2524 ptr->r.record.x.spoff);
2525 break;
2526 case spill_reg:
2527 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2528 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2529 ptr->r.record.x.treg, ptr->r.record.x.t);
2530 break;
2531 case spill_psprel_p:
2532 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2533 ptr->r.record.x.ab, ptr->r.record.x.reg,
2534 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2535 break;
2536 case spill_sprel_p:
2537 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2538 ptr->r.record.x.ab, ptr->r.record.x.reg,
2539 ptr->r.record.x.t, ptr->r.record.x.spoff);
2540 break;
2541 case spill_reg_p:
2542 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2543 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2544 ptr->r.record.x.xy, ptr->r.record.x.treg,
2545 ptr->r.record.x.t);
2546 break;
2547 default:
2548 as_bad ("record_type_not_valid");
2549 break;
800eeca4
JW		 2550 }
2551}
2552
197865e8 2553/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2554 the specified function. */
2555static void
2556process_unw_records (list, f)
2557 unw_rec_list *list;
2558 vbyte_func f;
2559{
2560 unw_rec_list *ptr;
2561 for (ptr = list; ptr; ptr = ptr->next)
2562 process_one_record (ptr, f);
2563}
2564
2565/* Determine the size of a record list in bytes. */
2566static int
2567calc_record_size (list)
2568 unw_rec_list *list;
2569{
2570 vbyte_count = 0;
2571 process_unw_records (list, count_output);
2572 return vbyte_count;
2573}
2574
e0c9811a
JW		 2575/* Update IMASK bitmask to reflect the fact that one or more registers
2576 of type TYPE are saved starting at instruction with index T. If N
2577 bits are set in REGMASK, it is assumed that instructions T through
2578 T+N-1 save these registers.
2579
2580 TYPE values:
2581 0: no save
2582 1: instruction saves next fp reg
2583 2: instruction saves next general reg
2584 3: instruction saves next branch reg */
2585static void
2586set_imask (region, regmask, t, type)
2587 unw_rec_list *region;
2588 unsigned long regmask;
2589 unsigned long t;
2590 unsigned int type;
2591{
2592 unsigned char *imask;
2593 unsigned long imask_size;
2594 unsigned int i;
2595 int pos;
2596
2597 imask = region->r.record.r.mask.i;
2598 imask_size = region->r.record.r.imask_size;
2599 if (!imask)
2600 {
542d6675 2601 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2602 imask = xmalloc (imask_size);
2603 memset (imask, 0, imask_size);
2604
2605 region->r.record.r.imask_size = imask_size;
2606 region->r.record.r.mask.i = imask;
2607 }
2608
542d6675
KH		 2609 i = (t / 4) + 1;
2610 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2611 while (regmask)
2612 {
2613 if (i >= imask_size)
2614 {
2615 as_bad ("Ignoring attempt to spill beyond end of region");
2616 return;
2617 }
2618
2619 imask[i] |= (type & 0x3) << pos;
197865e8 2620
e0c9811a
JW		 2621 regmask &= (regmask - 1);
2622 pos -= 2;
2623 if (pos < 0)
2624 {
2625 pos = 0;
2626 ++i;
2627 }
2628 }
2629}
2630
f5a30c2e
JW		 2631/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2632 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2633 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2634 for frag sizes. */
f5a30c2e 2635
e0c9811a 2636unsigned long
b5e0fabd 2637slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2638 unsigned long slot_addr;
2639 fragS *slot_frag;
2640 unsigned long first_addr;
2641 fragS *first_frag;
b5e0fabd 2642 int before_relax;
e0c9811a 2643{
f5a30c2e
JW		 2644 unsigned long index = 0;
2645
2646 /* First time we are called, the initial address and frag are invalid. */
2647 if (first_addr == 0)
2648 return 0;
2649
2650 /* If the two addresses are in different frags, then we need to add in
2651 the remaining size of this frag, and then the entire size of intermediate
2652 frags. */
2653 while (slot_frag != first_frag)
2654 {
2655 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2656
b5e0fabd 2657 if (! before_relax)
73f20958 2658 {
b5e0fabd
JW		 2659 /* We can get the final addresses only during and after
2660 relaxation. */
73f20958
L		 2661 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2662 index += 3 * ((first_frag->fr_next->fr_address
2663 - first_frag->fr_address
2664 - first_frag->fr_fix) >> 4);
2665 }
2666 else
2667 /* We don't know what the final addresses will be. We try our
2668 best to estimate. */
2669 switch (first_frag->fr_type)
2670 {
2671 default:
2672 break;
2673
2674 case rs_space:
2675 as_fatal ("only constant space allocation is supported");
2676 break;
2677
2678 case rs_align:
2679 case rs_align_code:
2680 case rs_align_test:
2681 /* Take alignment into account. Assume the worst case
2682 before relaxation. */
2683 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2684 break;
2685
2686 case rs_org:
2687 if (first_frag->fr_symbol)
2688 {
2689 as_fatal ("only constant offsets are supported");
2690 break;
2691 }
2692 case rs_fill:
2693 index += 3 * (first_frag->fr_offset >> 4);
2694 break;
2695 }
2696
f5a30c2e
JW		 2697 /* Add in the full size of the frag converted to instruction slots. */
2698 index += 3 * (first_frag->fr_fix >> 4);
2699 /* Subtract away the initial part before first_addr. */
2700 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2701 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2702
f5a30c2e
JW		 2703 /* Move to the beginning of the next frag. */
2704 first_frag = first_frag->fr_next;
2705 first_addr = (unsigned long) &first_frag->fr_literal;
2706 }
2707
2708 /* Add in the used part of the last frag. */
2709 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2710 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2711 return index;
2712}
4a1805b1 2713
91a2ae2a
RH		 2714/* Optimize unwind record directives. */
2715
2716static unw_rec_list *
2717optimize_unw_records (list)
2718 unw_rec_list *list;
2719{
2720 if (!list)
2721 return NULL;
2722
2723 /* If the only unwind record is ".prologue" or ".prologue" followed
2724 by ".body", then we can optimize the unwind directives away. */
2725 if (list->r.type == prologue
5738bc24
JW		 2726 && (list->next->r.type == endp
2727 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2728 return NULL;
2729
2730 return list;
2731}
2732
800eeca4
JW		 2733/* Given a complete record list, process any records which have
2734 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2735 this has been run, all necessary information should be available
800eeca4 2736 within each record to generate an image. */
542d6675 2737
800eeca4 2738static void
b5e0fabd 2739fixup_unw_records (list, before_relax)
800eeca4 2740 unw_rec_list *list;
b5e0fabd 2741 int before_relax;
800eeca4 2742{
e0c9811a
JW		 2743 unw_rec_list *ptr, *region = 0;
2744 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2745 fragS *first_frag = 0;
e0c9811a 2746
800eeca4
JW		 2747 for (ptr = list; ptr; ptr = ptr->next)
2748 {
2749 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2750 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2751 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2752 first_addr, first_frag, before_relax);
800eeca4
JW		 2753 switch (ptr->r.type)
2754 {
542d6675
KH		 2755 case prologue:
2756 case prologue_gr:
2757 case body:
2758 {
2759 unw_rec_list *last;
5738bc24
JW		 2760 int size;
2761 unsigned long last_addr = 0;
2762 fragS *last_frag = NULL;
542d6675
KH		 2763
2764 first_addr = ptr->slot_number;
f5a30c2e 2765 first_frag = ptr->slot_frag;
542d6675 2766 /* Find either the next body/prologue start, or the end of
5738bc24 2767 the function, and determine the size of the region. */
542d6675
KH		 2768 for (last = ptr->next; last != NULL; last = last->next)
2769 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2770 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2771 {
2772 last_addr = last->slot_number;
f5a30c2e 2773 last_frag = last->slot_frag;
542d6675
KH		 2774 break;
2775 }
b5e0fabd
JW		 2776 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2777 before_relax);
542d6675 2778 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2779 if (ptr->r.type == body)
2780 /* End of region. */
2781 region = 0;
2782 else
2783 region = ptr;
e0c9811a 2784 break;
542d6675
KH		 2785 }
2786 case epilogue:
ed7af9f9
L		 2787 if (t < rlen)
2788 ptr->r.record.b.t = rlen - 1 - t;
2789 else
2790 /* This happens when a memory-stack-less procedure uses a
2791 ".restore sp" directive at the end of a region to pop
2792 the frame state. */
2793 ptr->r.record.b.t = 0;
542d6675 2794 break;
e0c9811a 2795
542d6675
KH		 2796 case mem_stack_f:
2797 case mem_stack_v:
2798 case rp_when:
2799 case pfs_when:
2800 case preds_when:
2801 case unat_when:
2802 case lc_when:
2803 case fpsr_when:
2804 case priunat_when_gr:
2805 case priunat_when_mem:
2806 case bsp_when:
2807 case bspstore_when:
2808 case rnat_when:
2809 ptr->r.record.p.t = t;
2810 break;
e0c9811a 2811
542d6675
KH		 2812 case spill_reg:
2813 case spill_sprel:
2814 case spill_psprel:
2815 case spill_reg_p:
2816 case spill_sprel_p:
2817 case spill_psprel_p:
2818 ptr->r.record.x.t = t;
2819 break;
e0c9811a 2820
542d6675
KH		 2821 case frgr_mem:
2822 if (!region)
2823 {
75e09913 2824 as_bad ("frgr_mem record before region record!");
542d6675
KH		 2825 return;
2826 }
2827 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2828 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2829 set_imask (region, ptr->r.record.p.frmask, t, 1);
2830 set_imask (region, ptr->r.record.p.grmask, t, 2);
2831 break;
2832 case fr_mem:
2833 if (!region)
2834 {
75e09913 2835 as_bad ("fr_mem record before region record!");
542d6675
KH		 2836 return;
2837 }
2838 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2839 set_imask (region, ptr->r.record.p.rmask, t, 1);
2840 break;
2841 case gr_mem:
2842 if (!region)
2843 {
75e09913 2844 as_bad ("gr_mem record before region record!");
542d6675
KH		 2845 return;
2846 }
2847 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2848 set_imask (region, ptr->r.record.p.rmask, t, 2);
2849 break;
2850 case br_mem:
2851 if (!region)
2852 {
75e09913 2853 as_bad ("br_mem record before region record!");
542d6675
KH		 2854 return;
2855 }
2856 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2857 set_imask (region, ptr->r.record.p.brmask, t, 3);
2858 break;
e0c9811a 2859
542d6675
KH		 2860 case gr_gr:
2861 if (!region)
2862 {
75e09913 2863 as_bad ("gr_gr record before region record!");
542d6675
KH		 2864 return;
2865 }
2866 set_imask (region, ptr->r.record.p.grmask, t, 2);
2867 break;
2868 case br_gr:
2869 if (!region)
2870 {
75e09913 2871 as_bad ("br_gr record before region record!");
542d6675
KH		 2872 return;
2873 }
2874 set_imask (region, ptr->r.record.p.brmask, t, 3);
2875 break;
e0c9811a 2876
542d6675
KH		 2877 default:
2878 break;
800eeca4
JW		 2879 }
2880 }
2881}
2882
b5e0fabd
JW		 2883/* Estimate the size of a frag before relaxing. We only have one type of frag
2884 to handle here, which is the unwind info frag. */
2885
2886int
2887ia64_estimate_size_before_relax (fragS *frag,
2888 asection *segtype ATTRIBUTE_UNUSED)
2889{
2890 unw_rec_list *list;
2891 int len, size, pad;
2892
2893 /* ??? This code is identical to the first part of ia64_convert_frag. */
2894 list = (unw_rec_list *) frag->fr_opcode;
2895 fixup_unw_records (list, 0);
2896
2897 len = calc_record_size (list);
2898 /* pad to pointer-size boundary. */
2899 pad = len % md.pointer_size;
2900 if (pad != 0)
2901 len += md.pointer_size - pad;
f7e323d5
JB		 2902 /* Add 8 for the header. */
2903 size = len + 8;
2904 /* Add a pointer for the personality offset. */
2905 if (frag->fr_offset)
2906 size += md.pointer_size;
b5e0fabd
JW		 2907
2908 /* fr_var carries the max_chars that we created the fragment with.
2909 We must, of course, have allocated enough memory earlier. */
2910 assert (frag->fr_var >= size);
2911
2912 return frag->fr_fix + size;
2913}
2914
73f20958
L		 2915/* This function converts a rs_machine_dependent variant frag into a
2916 normal fill frag with the unwind image from the the record list. */
2917void
2918ia64_convert_frag (fragS *frag)
557debba 2919{
73f20958
L		 2920 unw_rec_list *list;
2921 int len, size, pad;
1cd8ff38 2922 valueT flag_value;
557debba 2923
b5e0fabd 2924 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 2925 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 2926 fixup_unw_records (list, 0);
1cd8ff38 2927
73f20958
L		 2928 len = calc_record_size (list);
2929 /* pad to pointer-size boundary. */
2930 pad = len % md.pointer_size;
2931 if (pad != 0)
2932 len += md.pointer_size - pad;
f7e323d5
JB		 2933 /* Add 8 for the header. */
2934 size = len + 8;
2935 /* Add a pointer for the personality offset. */
2936 if (frag->fr_offset)
2937 size += md.pointer_size;
73f20958
L		 2938
2939 /* fr_var carries the max_chars that we created the fragment with.
2940 We must, of course, have allocated enough memory earlier. */
2941 assert (frag->fr_var >= size);
2942
2943 /* Initialize the header area. fr_offset is initialized with
2944 unwind.personality_routine. */
2945 if (frag->fr_offset)
1cd8ff38
NC		 2946 {
2947 if (md.flags & EF_IA_64_ABI64)
2948 flag_value = (bfd_vma) 3 << 32;
2949 else
2950 /* 32-bit unwind info block. */
2951 flag_value = (bfd_vma) 0x1003 << 32;
2952 }
2953 else
2954 flag_value = 0;
557debba 2955
73f20958
L		 2956 md_number_to_chars (frag->fr_literal,
2957 (((bfd_vma) 1 << 48) /* Version. */
2958 | flag_value /* U & E handler flags. */
2959 | (len / md.pointer_size)), /* Length. */
2960 8);
557debba 2961
73f20958
L		 2962 /* Skip the header. */
2963 vbyte_mem_ptr = frag->fr_literal + 8;
2964 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 2965
2966 /* Fill the padding bytes with zeros. */
2967 if (pad != 0)
2968 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2969 md.pointer_size - pad);
2970
73f20958
L		 2971 frag->fr_fix += size;
2972 frag->fr_type = rs_fill;
2973 frag->fr_var = 0;
2974 frag->fr_offset = 0;
800eeca4
JW		 2975}
2976
e0c9811a
JW		 2977static int
2978convert_expr_to_ab_reg (e, ab, regp)
2979 expressionS *e;
2980 unsigned int *ab;
2981 unsigned int *regp;
2982{
2983 unsigned int reg;
2984
2985 if (e->X_op != O_register)
2986 return 0;
2987
2988 reg = e->X_add_number;
2434f565 2989 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 2990 {
2991 *ab = 0;
2992 *regp = reg - REG_GR;
2993 }
2434f565
JW		 2994 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2995 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 2996 {
2997 *ab = 1;
2998 *regp = reg - REG_FR;
2999 }
2434f565 3000 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 3001 {
3002 *ab = 2;
3003 *regp = reg - REG_BR;
3004 }
3005 else
3006 {
3007 *ab = 3;
3008 switch (reg)
3009 {
3010 case REG_PR: *regp = 0; break;
3011 case REG_PSP: *regp = 1; break;
3012 case REG_PRIUNAT: *regp = 2; break;
3013 case REG_BR + 0: *regp = 3; break;
3014 case REG_AR + AR_BSP: *regp = 4; break;
3015 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3016 case REG_AR + AR_RNAT: *regp = 6; break;
3017 case REG_AR + AR_UNAT: *regp = 7; break;
3018 case REG_AR + AR_FPSR: *regp = 8; break;
3019 case REG_AR + AR_PFS: *regp = 9; break;
3020 case REG_AR + AR_LC: *regp = 10; break;
3021
3022 default:
3023 return 0;
3024 }
3025 }
3026 return 1;
197865e8 3027}
e0c9811a
JW		 3028
3029static int
3030convert_expr_to_xy_reg (e, xy, regp)
3031 expressionS *e;
3032 unsigned int *xy;
3033 unsigned int *regp;
3034{
3035 unsigned int reg;
3036
3037 if (e->X_op != O_register)
3038 return 0;
3039
3040 reg = e->X_add_number;
3041
2434f565 3042 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
e0c9811a
JW		 3043 {
3044 *xy = 0;
3045 *regp = reg - REG_GR;
3046 }
2434f565 3047 else if (reg >= REG_FR && reg <= (REG_FR + 127))
e0c9811a
JW		 3048 {
3049 *xy = 1;
3050 *regp = reg - REG_FR;
3051 }
2434f565 3052 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3053 {
3054 *xy = 2;
3055 *regp = reg - REG_BR;
3056 }
3057 else
3058 return -1;
3059 return 1;
197865e8 3060}
e0c9811a 3061
d9201763
L		 3062static void
3063dot_align (int arg)
3064{
3065 /* The current frag is an alignment frag. */
3066 align_frag = frag_now;
3067 s_align_bytes (arg);
3068}
3069
800eeca4
JW		 3070static void
3071dot_radix (dummy)
2434f565 3072 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3073{
3074 int radix;
3075
3076 SKIP_WHITESPACE ();
3077 radix = *input_line_pointer++;
3078
3079 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3080 {
3081 as_bad ("Radix `%c' unsupported", *input_line_pointer);
542d6675 3082 ignore_rest_of_line ();
800eeca4
JW		 3083 return;
3084 }
3085}
3086
196e8040
JW		 3087/* Helper function for .loc directives. If the assembler is not generating
3088 line number info, then we need to remember which instructions have a .loc
3089 directive, and only call dwarf2_gen_line_info for those instructions. */
3090
3091static void
3092dot_loc (int x)
3093{
3094 CURR_SLOT.loc_directive_seen = 1;
3095 dwarf2_directive_loc (x);
3096}
3097
800eeca4
JW		 3098/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3099static void
3100dot_special_section (which)
3101 int which;
3102{
3103 set_section ((char *) special_section_name[which]);
3104}
3105
07450571
L		 3106/* Return -1 for warning and 0 for error. */
3107
3108static int
970d6792
L		 3109unwind_diagnostic (const char * region, const char *directive)
3110{
3111 if (md.unwind_check == unwind_check_warning)
07450571
L		 3112 {
3113 as_warn (".%s outside of %s", directive, region);
3114 return -1;
3115 }
970d6792
L		 3116 else
3117 {
3118 as_bad (".%s outside of %s", directive, region);
3119 ignore_rest_of_line ();
07450571 3120 return 0;
970d6792
L		 3121 }
3122}
3123
07450571
L		 3124/* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3125 a procedure but the unwind directive check is set to warning, 0 if
3126 a directive isn't in a procedure and the unwind directive check is set
3127 to error. */
3128
75e09913
JB		 3129static int
3130in_procedure (const char *directive)
3131{
3132 if (unwind.proc_start
3133 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3134 return 1;
07450571 3135 return unwind_diagnostic ("procedure", directive);
75e09913
JB		 3136}
3137
07450571
L		 3138/* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3139 a prologue but the unwind directive check is set to warning, 0 if
3140 a directive isn't in a prologue and the unwind directive check is set
3141 to error. */
3142
75e09913
JB		 3143static int
3144in_prologue (const char *directive)
3145{
07450571
L		 3146 int in = in_procedure (directive);
3147 if (in)
75e09913 3148 {
970d6792 3149 /* We are in a procedure. Check if we are in a prologue. */
75e09913
JB		 3150 if (unwind.prologue)
3151 return 1;
07450571
L		 3152 /* We only want to issue one message. */
3153 if (in == 1)
3154 return unwind_diagnostic ("prologue", directive);
3155 else
3156 return -1;
75e09913
JB		 3157 }
3158 return 0;
3159}
3160
07450571
L		 3161/* Return 1 if a directive is in a body, -1 if a directive isn't in
3162 a body but the unwind directive check is set to warning, 0 if
3163 a directive isn't in a body and the unwind directive check is set
3164 to error. */
3165
75e09913
JB		 3166static int
3167in_body (const char *directive)
3168{
07450571
L		 3169 int in = in_procedure (directive);
3170 if (in)
75e09913 3171 {
970d6792 3172 /* We are in a procedure. Check if we are in a body. */
75e09913
JB		 3173 if (unwind.body)
3174 return 1;
07450571
L		 3175 /* We only want to issue one message. */
3176 if (in == 1)
3177 return unwind_diagnostic ("body region", directive);
3178 else
3179 return -1;
75e09913
JB		 3180 }
3181 return 0;
3182}
3183
800eeca4
JW		 3184static void
3185add_unwind_entry (ptr)
3186 unw_rec_list *ptr;
3187{
e0c9811a
JW		 3188 if (unwind.tail)
3189 unwind.tail->next = ptr;
800eeca4 3190 else
e0c9811a
JW		 3191 unwind.list = ptr;
3192 unwind.tail = ptr;
800eeca4
JW		 3193
3194 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3195 if (unwind.current_entry == NULL)
3196 unwind.current_entry = ptr;
800eeca4
JW		 3197}
3198
197865e8 3199static void
800eeca4 3200dot_fframe (dummy)
2434f565 3201 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3202{
3203 expressionS e;
e0c9811a 3204
75e09913
JB		 3205 if (!in_prologue ("fframe"))
3206 return;
3207
800eeca4 3208 parse_operand (&e);
197865e8 3209
800eeca4
JW		 3210 if (e.X_op != O_constant)
3211 as_bad ("Operand to .fframe must be a constant");
3212 else
e0c9811a
JW		 3213 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3214}
3215
197865e8 3216static void
e0c9811a 3217dot_vframe (dummy)
2434f565 3218 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3219{
3220 expressionS e;
3221 unsigned reg;
3222
75e09913
JB		 3223 if (!in_prologue ("vframe"))
3224 return;
3225
e0c9811a
JW		 3226 parse_operand (&e);
3227 reg = e.X_add_number - REG_GR;
3228 if (e.X_op == O_register && reg < 128)
800eeca4 3229 {
e0c9811a 3230 add_unwind_entry (output_mem_stack_v ());
30d25259
RH		 3231 if (! (unwind.prologue_mask & 2))
3232 add_unwind_entry (output_psp_gr (reg));
800eeca4 3233 }
e0c9811a
JW		 3234 else
3235 as_bad ("First operand to .vframe must be a general register");
800eeca4
JW		 3236}
3237
197865e8 3238static void
e0c9811a 3239dot_vframesp (dummy)
2434f565 3240 int dummy ATTRIBUTE_UNUSED;
800eeca4 3241{
e0c9811a
JW		 3242 expressionS e;
3243
75e09913
JB		 3244 if (!in_prologue ("vframesp"))
3245 return;
3246
e0c9811a
JW		 3247 parse_operand (&e);
3248 if (e.X_op == O_constant)
3249 {
3250 add_unwind_entry (output_mem_stack_v ());
3251 add_unwind_entry (output_psp_sprel (e.X_add_number));
3252 }
3253 else
69906a9b 3254 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
e0c9811a
JW		 3255}
3256
197865e8 3257static void
e0c9811a 3258dot_vframepsp (dummy)
2434f565 3259 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3260{
3261 expressionS e;
3262
75e09913
JB		 3263 if (!in_prologue ("vframepsp"))
3264 return;
3265
e0c9811a
JW		 3266 parse_operand (&e);
3267 if (e.X_op == O_constant)
3268 {
3269 add_unwind_entry (output_mem_stack_v ());
3270 add_unwind_entry (output_psp_sprel (e.X_add_number));
3271 }
3272 else
69906a9b 3273 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
800eeca4
JW		 3274}
3275
197865e8 3276static void
800eeca4 3277dot_save (dummy)
2434f565 3278 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3279{
3280 expressionS e1, e2;
3281 int sep;
3282 int reg1, reg2;
3283
75e09913
JB		 3284 if (!in_prologue ("save"))
3285 return;
3286
800eeca4
JW		 3287 sep = parse_operand (&e1);
3288 if (sep != ',')
3289 as_bad ("No second operand to .save");
3290 sep = parse_operand (&e2);
3291
e0c9811a 3292 reg1 = e1.X_add_number;
800eeca4 3293 reg2 = e2.X_add_number - REG_GR;
197865e8 3294
800eeca4 3295 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3296 if (e1.X_op == O_register)
800eeca4 3297 {
542d6675 3298 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
800eeca4
JW		 3299 {
3300 switch (reg1)
3301 {
542d6675
KH		 3302 case REG_AR + AR_BSP:
3303 add_unwind_entry (output_bsp_when ());
3304 add_unwind_entry (output_bsp_gr (reg2));
3305 break;
3306 case REG_AR + AR_BSPSTORE:
3307 add_unwind_entry (output_bspstore_when ());
3308 add_unwind_entry (output_bspstore_gr (reg2));
3309 break;
3310 case REG_AR + AR_RNAT:
3311 add_unwind_entry (output_rnat_when ());
3312 add_unwind_entry (output_rnat_gr (reg2));
3313 break;
3314 case REG_AR + AR_UNAT:
3315 add_unwind_entry (output_unat_when ());
3316 add_unwind_entry (output_unat_gr (reg2));
3317 break;
3318 case REG_AR + AR_FPSR:
3319 add_unwind_entry (output_fpsr_when ());
3320 add_unwind_entry (output_fpsr_gr (reg2));
3321 break;
3322 case REG_AR + AR_PFS:
3323 add_unwind_entry (output_pfs_when ());
3324 if (! (unwind.prologue_mask & 4))
3325 add_unwind_entry (output_pfs_gr (reg2));
3326 break;
3327 case REG_AR + AR_LC:
3328 add_unwind_entry (output_lc_when ());
3329 add_unwind_entry (output_lc_gr (reg2));
3330 break;
3331 case REG_BR:
3332 add_unwind_entry (output_rp_when ());
3333 if (! (unwind.prologue_mask & 8))
3334 add_unwind_entry (output_rp_gr (reg2));
3335 break;
3336 case REG_PR:
3337 add_unwind_entry (output_preds_when ());
3338 if (! (unwind.prologue_mask & 1))
3339 add_unwind_entry (output_preds_gr (reg2));
3340 break;
3341 case REG_PRIUNAT:
3342 add_unwind_entry (output_priunat_when_gr ());
3343 add_unwind_entry (output_priunat_gr (reg2));
3344 break;
3345 default:
3346 as_bad ("First operand not a valid register");
800eeca4
JW		 3347 }
3348 }
3349 else
3350 as_bad (" Second operand not a valid register");
3351 }
3352 else
e0c9811a 3353 as_bad ("First operand not a register");
800eeca4
JW		 3354}
3355
197865e8 3356static void
800eeca4 3357dot_restore (dummy)
2434f565 3358 int dummy ATTRIBUTE_UNUSED;
800eeca4 3359{
e0c9811a 3360 expressionS e1, e2;
33d01f33 3361 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3362 int sep;
3363
75e09913
JB		 3364 if (!in_body ("restore"))
3365 return;
3366
e0c9811a
JW		 3367 sep = parse_operand (&e1);
3368 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3369 {
3370 as_bad ("First operand to .restore must be stack pointer (sp)");
3371 return;
3372 }
3373
3374 if (sep == ',')
3375 {
3376 parse_operand (&e2);
33d01f33 3377 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3378 {
33d01f33 3379 as_bad ("Second operand to .restore must be a constant >= 0");
e0c9811a
JW		 3380 return;
3381 }
33d01f33 3382 ecount = e2.X_add_number;
e0c9811a 3383 }
33d01f33
JW		 3384 else
3385 ecount = unwind.prologue_count - 1;
6290819d
NC		 3386
3387 if (ecount >= unwind.prologue_count)
3388 {
3389 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3390 ecount + 1, unwind.prologue_count);
3391 return;
3392 }
3393
e0c9811a 3394 add_unwind_entry (output_epilogue (ecount));
33d01f33
JW		 3395
3396 if (ecount < unwind.prologue_count)
3397 unwind.prologue_count -= ecount + 1;
3398 else
3399 unwind.prologue_count = 0;
e0c9811a
JW		 3400}
3401
197865e8 3402static void
e0c9811a 3403dot_restorereg (dummy)
2434f565 3404 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3405{
3406 unsigned int ab, reg;
3407 expressionS e;
3408
75e09913
JB		 3409 if (!in_procedure ("restorereg"))
3410 return;
3411
e0c9811a
JW		 3412 parse_operand (&e);
3413
3414 if (!convert_expr_to_ab_reg (&e, &ab, &reg))
3415 {
3416 as_bad ("First operand to .restorereg must be a preserved register");
3417 return;
3418 }
3419 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3420}
3421
197865e8 3422static void
e0c9811a 3423dot_restorereg_p (dummy)
2434f565 3424 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3425{
3426 unsigned int qp, ab, reg;
3427 expressionS e1, e2;
3428 int sep;
3429
75e09913
JB		 3430 if (!in_procedure ("restorereg.p"))
3431 return;
3432
e0c9811a
JW		 3433 sep = parse_operand (&e1);
3434 if (sep != ',')
3435 {
3436 as_bad ("No second operand to .restorereg.p");
3437 return;
3438 }
3439
3440 parse_operand (&e2);
3441
3442 qp = e1.X_add_number - REG_P;
3443 if (e1.X_op != O_register || qp > 63)
3444 {
3445 as_bad ("First operand to .restorereg.p must be a predicate");
3446 return;
3447 }
3448
3449 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3450 {
3451 as_bad ("Second operand to .restorereg.p must be a preserved register");
3452 return;
3453 }
3454 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
800eeca4
JW		 3455}
3456
2d6ed997
L		 3457static char *special_linkonce_name[] =
3458 {
3459 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3460 };
3461
3462static void
da9f89d4 3463start_unwind_section (const segT text_seg, int sec_index)
2d6ed997
L		 3464{
3465 /*
3466 Use a slightly ugly scheme to derive the unwind section names from
3467 the text section name:
3468
3469 text sect. unwind table sect.
3470 name: name: comments:
3471 ---------- ----------------- --------------------------------
3472 .text .IA_64.unwind
3473 .text.foo .IA_64.unwind.text.foo
3474 .foo .IA_64.unwind.foo
3475 .gnu.linkonce.t.foo
3476 .gnu.linkonce.ia64unw.foo
3477 _info .IA_64.unwind_info gas issues error message (ditto)
3478 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3479
3480 This mapping is done so that:
3481
3482 (a) An object file with unwind info only in .text will use
3483 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3484 This follows the letter of the ABI and also ensures backwards
3485 compatibility with older toolchains.
3486
3487 (b) An object file with unwind info in multiple text sections
3488 will use separate unwind sections for each text section.
3489 This allows us to properly set the "sh_info" and "sh_link"
3490 fields in SHT_IA_64_UNWIND as required by the ABI and also
3491 lets GNU ld support programs with multiple segments
3492 containing unwind info (as might be the case for certain
3493 embedded applications).
3494
3495 (c) An error is issued if there would be a name clash.
3496 */
3497
3498 const char *text_name, *sec_text_name;
3499 char *sec_name;
3500 const char *prefix = special_section_name [sec_index];
3501 const char *suffix;
3502 size_t prefix_len, suffix_len, sec_name_len;
3503
3504 sec_text_name = segment_name (text_seg);
3505 text_name = sec_text_name;
3506 if (strncmp (text_name, "_info", 5) == 0)
3507 {
3508 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3509 text_name);
3510 ignore_rest_of_line ();
3511 return;
3512 }
3513 if (strcmp (text_name, ".text") == 0)
3514 text_name = "";
3515
3516 /* Build the unwind section name by appending the (possibly stripped)
3517 text section name to the unwind prefix. */
3518 suffix = text_name;
3519 if (strncmp (text_name, ".gnu.linkonce.t.",
3520 sizeof (".gnu.linkonce.t.") - 1) == 0)
3521 {
3522 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3523 suffix += sizeof (".gnu.linkonce.t.") - 1;
3524 }
3525
3526 prefix_len = strlen (prefix);
3527 suffix_len = strlen (suffix);
3528 sec_name_len = prefix_len + suffix_len;
3529 sec_name = alloca (sec_name_len + 1);
3530 memcpy (sec_name, prefix, prefix_len);
3531 memcpy (sec_name + prefix_len, suffix, suffix_len);
3532 sec_name [sec_name_len] = '\0';
3533
3534 /* Handle COMDAT group. */
3535 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3536 {
3537 char *section;
3538 size_t len, group_name_len;
3539 const char *group_name = elf_group_name (text_seg);
3540
3541 if (group_name == NULL)
3542 {
3543 as_bad ("Group section `%s' has no group signature",
3544 sec_text_name);
3545 ignore_rest_of_line ();
3546 return;
3547 }
3548 /* We have to construct a fake section directive. */
3549 group_name_len = strlen (group_name);
3550 len = (sec_name_len
3551 + 16 /* ,"aG",@progbits, */
3552 + group_name_len /* ,group_name */
3553 + 7); /* ,comdat */
3554
3555 section = alloca (len + 1);
3556 memcpy (section, sec_name, sec_name_len);
3557 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3558 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3559 memcpy (section + len - 7, ",comdat", 7);
3560 section [len] = '\0';
3561 set_section (section);
3562 }
3563 else
3564 {
3565 set_section (sec_name);
3566 bfd_set_section_flags (stdoutput, now_seg,
3567 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3568 }
38ce5b11
L		 3569
3570 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3571}
3572
73f20958 3573static void
2d6ed997 3574generate_unwind_image (const segT text_seg)
800eeca4 3575{
73f20958
L		 3576 int size, pad;
3577 unw_rec_list *list;
800eeca4 3578
c97b7ef6
JW		 3579 /* Mark the end of the unwind info, so that we can compute the size of the
3580 last unwind region. */
3581 add_unwind_entry (output_endp ());
3582
10850f29
JW		 3583 /* Force out pending instructions, to make sure all unwind records have
3584 a valid slot_number field. */
3585 ia64_flush_insns ();
3586
800eeca4 3587 /* Generate the unwind record. */
73f20958 3588 list = optimize_unw_records (unwind.list);
b5e0fabd 3589 fixup_unw_records (list, 1);
73f20958
L		 3590 size = calc_record_size (list);
3591
3592 if (size > 0 || unwind.force_unwind_entry)
3593 {
3594 unwind.force_unwind_entry = 0;
3595 /* pad to pointer-size boundary. */
3596 pad = size % md.pointer_size;
3597 if (pad != 0)
3598 size += md.pointer_size - pad;
f7e323d5
JB		 3599 /* Add 8 for the header. */
3600 size += 8;
3601 /* Add a pointer for the personality offset. */
3602 if (unwind.personality_routine)
3603 size += md.pointer_size;
73f20958 3604 }
6290819d 3605
800eeca4
JW		 3606 /* If there are unwind records, switch sections, and output the info. */
3607 if (size != 0)
3608 {
800eeca4 3609 expressionS exp;
1cd8ff38 3610 bfd_reloc_code_real_type reloc;
91a2ae2a 3611
da9f89d4 3612 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
800eeca4 3613
557debba
JW		 3614 /* Make sure the section has 4 byte alignment for ILP32 and
3615 8 byte alignment for LP64. */
3616 frag_align (md.pointer_size_shift, 0, 0);
3617 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3618
800eeca4 3619 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3620 unwind.info = expr_build_dot ();
73f20958
L		 3621
3622 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3623 (offsetT) (long) unwind.personality_routine,
3624 (char *) list);
91a2ae2a 3625
800eeca4 3626 /* Add the personality address to the image. */
e0c9811a 3627 if (unwind.personality_routine != 0)
542d6675 3628 {
40449e9f 3629 exp.X_op = O_symbol;
e0c9811a 3630 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3631 exp.X_add_number = 0;
1cd8ff38
NC		 3632
3633 if (md.flags & EF_IA_64_BE)
3634 {
3635 if (md.flags & EF_IA_64_ABI64)
3636 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3637 else
3638 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3639 }
40449e9f 3640 else
1cd8ff38
NC		 3641 {
3642 if (md.flags & EF_IA_64_ABI64)
3643 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3644 else
3645 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3646 }
3647
3648 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3649 md.pointer_size, &exp, 0, reloc);
e0c9811a 3650 unwind.personality_routine = 0;
542d6675 3651 }
800eeca4
JW		 3652 }
3653
6290819d 3654 free_saved_prologue_counts ();
e0c9811a 3655 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3656}
3657
197865e8 3658static void
542d6675 3659dot_handlerdata (dummy)
2434f565 3660 int dummy ATTRIBUTE_UNUSED;
800eeca4 3661{
75e09913
JB		 3662 if (!in_procedure ("handlerdata"))
3663 return;
91a2ae2a
RH		 3664 unwind.force_unwind_entry = 1;
3665
3666 /* Remember which segment we're in so we can switch back after .endp */
3667 unwind.saved_text_seg = now_seg;
3668 unwind.saved_text_subseg = now_subseg;
3669
3670 /* Generate unwind info into unwind-info section and then leave that
3671 section as the currently active one so dataXX directives go into
3672 the language specific data area of the unwind info block. */
2d6ed997 3673 generate_unwind_image (now_seg);
e0c9811a 3674 demand_empty_rest_of_line ();
800eeca4
JW		 3675}
3676
197865e8 3677static void
800eeca4 3678dot_unwentry (dummy)
2434f565 3679 int dummy ATTRIBUTE_UNUSED;
800eeca4 3680{
75e09913
JB		 3681 if (!in_procedure ("unwentry"))
3682 return;
91a2ae2a 3683 unwind.force_unwind_entry = 1;
e0c9811a 3684 demand_empty_rest_of_line ();
800eeca4
JW		 3685}
3686
197865e8 3687static void
800eeca4 3688dot_altrp (dummy)
2434f565 3689 int dummy ATTRIBUTE_UNUSED;
800eeca4 3690{
e0c9811a
JW		 3691 expressionS e;
3692 unsigned reg;
3693
75e09913
JB		 3694 if (!in_prologue ("altrp"))
3695 return;
3696
e0c9811a
JW		 3697 parse_operand (&e);
3698 reg = e.X_add_number - REG_BR;
3699 if (e.X_op == O_register && reg < 8)
3700 add_unwind_entry (output_rp_br (reg));
3701 else
3702 as_bad ("First operand not a valid branch register");
800eeca4
JW		 3703}
3704
197865e8 3705static void
e0c9811a
JW		 3706dot_savemem (psprel)
3707 int psprel;
800eeca4
JW		 3708{
3709 expressionS e1, e2;
3710 int sep;
3711 int reg1, val;
3712
75e09913
JB		 3713 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3714 return;
3715
800eeca4
JW		 3716 sep = parse_operand (&e1);
3717 if (sep != ',')
e0c9811a 3718 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
800eeca4
JW		 3719 sep = parse_operand (&e2);
3720
e0c9811a 3721 reg1 = e1.X_add_number;
800eeca4 3722 val = e2.X_add_number;
197865e8 3723
800eeca4 3724 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3725 if (e1.X_op == O_register)
800eeca4
JW		 3726 {
3727 if (e2.X_op == O_constant)
3728 {
3729 switch (reg1)
3730 {
542d6675
KH		 3731 case REG_AR + AR_BSP:
3732 add_unwind_entry (output_bsp_when ());
3733 add_unwind_entry ((psprel
3734 ? output_bsp_psprel
3735 : output_bsp_sprel) (val));
3736 break;
3737 case REG_AR + AR_BSPSTORE:
3738 add_unwind_entry (output_bspstore_when ());
3739 add_unwind_entry ((psprel
3740 ? output_bspstore_psprel
3741 : output_bspstore_sprel) (val));
3742 break;
3743 case REG_AR + AR_RNAT:
3744 add_unwind_entry (output_rnat_when ());
3745 add_unwind_entry ((psprel
3746 ? output_rnat_psprel
3747 : output_rnat_sprel) (val));
3748 break;
3749 case REG_AR + AR_UNAT:
3750 add_unwind_entry (output_unat_when ());
3751 add_unwind_entry ((psprel
3752 ? output_unat_psprel
3753 : output_unat_sprel) (val));
3754 break;
3755 case REG_AR + AR_FPSR:
3756 add_unwind_entry (output_fpsr_when ());
3757 add_unwind_entry ((psprel
3758 ? output_fpsr_psprel
3759 : output_fpsr_sprel) (val));
3760 break;
3761 case REG_AR + AR_PFS:
3762 add_unwind_entry (output_pfs_when ());
3763 add_unwind_entry ((psprel
3764 ? output_pfs_psprel
3765 : output_pfs_sprel) (val));
3766 break;
3767 case REG_AR + AR_LC:
3768 add_unwind_entry (output_lc_when ());
3769 add_unwind_entry ((psprel
3770 ? output_lc_psprel
3771 : output_lc_sprel) (val));
3772 break;
3773 case REG_BR:
3774 add_unwind_entry (output_rp_when ());
3775 add_unwind_entry ((psprel
3776 ? output_rp_psprel
3777 : output_rp_sprel) (val));
3778 break;
3779 case REG_PR:
3780 add_unwind_entry (output_preds_when ());
3781 add_unwind_entry ((psprel
3782 ? output_preds_psprel
3783 : output_preds_sprel) (val));
3784 break;
3785 case REG_PRIUNAT:
3786 add_unwind_entry (output_priunat_when_mem ());
3787 add_unwind_entry ((psprel
3788 ? output_priunat_psprel
3789 : output_priunat_sprel) (val));
3790 break;
3791 default:
3792 as_bad ("First operand not a valid register");
800eeca4
JW		 3793 }
3794 }
3795 else
3796 as_bad (" Second operand not a valid constant");
3797 }
3798 else
e0c9811a 3799 as_bad ("First operand not a register");
800eeca4
JW		 3800}
3801
197865e8 3802static void
800eeca4 3803dot_saveg (dummy)
2434f565 3804 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3805{
3806 expressionS e1, e2;
3807 int sep;
75e09913
JB		 3808
3809 if (!in_prologue ("save.g"))
3810 return;
3811
800eeca4
JW		 3812 sep = parse_operand (&e1);
3813 if (sep == ',')
3814 parse_operand (&e2);
197865e8 3815
800eeca4
JW		 3816 if (e1.X_op != O_constant)
3817 as_bad ("First operand to .save.g must be a constant.");
3818 else
3819 {
3820 int grmask = e1.X_add_number;
3821 if (sep != ',')
3822 add_unwind_entry (output_gr_mem (grmask));
3823 else
542d6675 3824 {
800eeca4 3825 int reg = e2.X_add_number - REG_GR;
542d6675 3826 if (e2.X_op == O_register && reg >= 0 && reg < 128)
800eeca4
JW		 3827 add_unwind_entry (output_gr_gr (grmask, reg));
3828 else
3829 as_bad ("Second operand is an invalid register.");
3830 }
3831 }
3832}
3833
197865e8 3834static void
800eeca4 3835dot_savef (dummy)
2434f565 3836 int dummy ATTRIBUTE_UNUSED;
800eeca4 3837{
e0c9811a 3838 expressionS e1;
800eeca4 3839 int sep;
75e09913
JB		 3840
3841 if (!in_prologue ("save.f"))
3842 return;
3843
800eeca4 3844 sep = parse_operand (&e1);
197865e8 3845
800eeca4
JW		 3846 if (e1.X_op != O_constant)
3847 as_bad ("Operand to .save.f must be a constant.");
3848 else
e0c9811a 3849 add_unwind_entry (output_fr_mem (e1.X_add_number));
800eeca4
JW		 3850}
3851
197865e8 3852static void
800eeca4 3853dot_saveb (dummy)
2434f565 3854 int dummy ATTRIBUTE_UNUSED;
800eeca4 3855{
e0c9811a
JW		 3856 expressionS e1, e2;
3857 unsigned int reg;
3858 unsigned char sep;
3859 int brmask;
3860
75e09913
JB		 3861 if (!in_prologue ("save.b"))
3862 return;
3863
800eeca4 3864 sep = parse_operand (&e1);
800eeca4 3865 if (e1.X_op != O_constant)
800eeca4 3866 {
e0c9811a
JW		 3867 as_bad ("First operand to .save.b must be a constant.");
3868 return;
800eeca4 3869 }
e0c9811a
JW		 3870 brmask = e1.X_add_number;
3871
3872 if (sep == ',')
3873 {
3874 sep = parse_operand (&e2);
3875 reg = e2.X_add_number - REG_GR;
3876 if (e2.X_op != O_register || reg > 127)
3877 {
3878 as_bad ("Second operand to .save.b must be a general register.");
3879 return;
3880 }
3881 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3882 }
3883 else
3884 add_unwind_entry (output_br_mem (brmask));
3885
3886 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3887 demand_empty_rest_of_line ();
800eeca4
JW		 3888}
3889
197865e8 3890static void
800eeca4 3891dot_savegf (dummy)
2434f565 3892 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3893{
3894 expressionS e1, e2;
3895 int sep;
75e09913
JB		 3896
3897 if (!in_prologue ("save.gf"))
3898 return;
3899
800eeca4
JW		 3900 sep = parse_operand (&e1);
3901 if (sep == ',')
3902 parse_operand (&e2);
197865e8 3903
800eeca4
JW		 3904 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3905 as_bad ("Both operands of .save.gf must be constants.");
3906 else
3907 {
3908 int grmask = e1.X_add_number;
3909 int frmask = e2.X_add_number;
3910 add_unwind_entry (output_frgr_mem (grmask, frmask));
3911 }
3912}
3913
197865e8 3914static void
800eeca4 3915dot_spill (dummy)
2434f565 3916 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3917{
3918 expressionS e;
e0c9811a
JW		 3919 unsigned char sep;
3920
75e09913
JB		 3921 if (!in_prologue ("spill"))
3922 return;
3923
e0c9811a
JW		 3924 sep = parse_operand (&e);
3925 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3926 demand_empty_rest_of_line ();
197865e8 3927
800eeca4
JW		 3928 if (e.X_op != O_constant)
3929 as_bad ("Operand to .spill must be a constant");
3930 else
e0c9811a
JW		 3931 add_unwind_entry (output_spill_base (e.X_add_number));
3932}
3933
3934static void
3935dot_spillreg (dummy)
2434f565 3936 int dummy ATTRIBUTE_UNUSED;
e0c9811a 3937{
2132e3a3
AM		 3938 int sep;
3939 unsigned int ab, xy, reg, treg;
e0c9811a
JW		 3940 expressionS e1, e2;
3941
75e09913
JB		 3942 if (!in_procedure ("spillreg"))
3943 return;
3944
e0c9811a
JW		 3945 sep = parse_operand (&e1);
3946 if (sep != ',')
3947 {
3948 as_bad ("No second operand to .spillreg");
3949 return;
3950 }
3951
3952 parse_operand (&e2);
3953
3954 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
800eeca4 3955 {
e0c9811a
JW		 3956 as_bad ("First operand to .spillreg must be a preserved register");
3957 return;
800eeca4 3958 }
e0c9811a
JW		 3959
3960 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3961 {
3962 as_bad ("Second operand to .spillreg must be a register");
3963 return;
3964 }
3965
3966 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3967}
3968
3969static void
3970dot_spillmem (psprel)
3971 int psprel;
3972{
3973 expressionS e1, e2;
2132e3a3
AM		 3974 int sep;
3975 unsigned int ab, reg;
e0c9811a 3976
75e09913
JB		 3977 if (!in_procedure ("spillmem"))
3978 return;
3979
e0c9811a
JW		 3980 sep = parse_operand (&e1);
3981 if (sep != ',')
3982 {
3983 as_bad ("Second operand missing");
3984 return;
3985 }
3986
3987 parse_operand (&e2);
3988
3989 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
3990 {
3991 as_bad ("First operand to .spill%s must be a preserved register",
3992 psprel ? "psp" : "sp");
3993 return;
3994 }
3995
3996 if (e2.X_op != O_constant)
3997 {
3998 as_bad ("Second operand to .spill%s must be a constant",
3999 psprel ? "psp" : "sp");
4000 return;
4001 }
4002
4003 if (psprel)
4004 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
4005 else
4006 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
4007}
4008
4009static void
4010dot_spillreg_p (dummy)
2434f565 4011 int dummy ATTRIBUTE_UNUSED;
e0c9811a 4012{
2132e3a3
AM		 4013 int sep;
4014 unsigned int ab, xy, reg, treg;
e0c9811a
JW		 4015 expressionS e1, e2, e3;
4016 unsigned int qp;
4017
75e09913
JB		 4018 if (!in_procedure ("spillreg.p"))
4019 return;
4020
e0c9811a
JW		 4021 sep = parse_operand (&e1);
4022 if (sep != ',')
4023 {
4024 as_bad ("No second and third operand to .spillreg.p");
4025 return;
4026 }
4027
4028 sep = parse_operand (&e2);
4029 if (sep != ',')
4030 {
4031 as_bad ("No third operand to .spillreg.p");
4032 return;
4033 }
4034
4035 parse_operand (&e3);
4036
4037 qp = e1.X_add_number - REG_P;
4038
4039 if (e1.X_op != O_register || qp > 63)
4040 {
4041 as_bad ("First operand to .spillreg.p must be a predicate");
4042 return;
4043 }
4044
4045 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4046 {
4047 as_bad ("Second operand to .spillreg.p must be a preserved register");
4048 return;
4049 }
4050
4051 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4052 {
4053 as_bad ("Third operand to .spillreg.p must be a register");
4054 return;
4055 }
4056
4057 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4058}
4059
4060static void
4061dot_spillmem_p (psprel)
4062 int psprel;
4063{
4064 expressionS e1, e2, e3;
2132e3a3
AM		 4065 int sep;
4066 unsigned int ab, reg;
e0c9811a
JW		 4067 unsigned int qp;
4068
75e09913
JB		 4069 if (!in_procedure ("spillmem.p"))
4070 return;
4071
e0c9811a
JW		 4072 sep = parse_operand (&e1);
4073 if (sep != ',')
4074 {
4075 as_bad ("Second operand missing");
4076 return;
4077 }
4078
4079 parse_operand (&e2);
4080 if (sep != ',')
4081 {
4082 as_bad ("Second operand missing");
4083 return;
4084 }
4085
4086 parse_operand (&e3);
4087
4088 qp = e1.X_add_number - REG_P;
4089 if (e1.X_op != O_register || qp > 63)
4090 {
4091 as_bad ("First operand to .spill%s_p must be a predicate",
4092 psprel ? "psp" : "sp");
4093 return;
4094 }
4095
4096 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4097 {
4098 as_bad ("Second operand to .spill%s_p must be a preserved register",
4099 psprel ? "psp" : "sp");
4100 return;
4101 }
4102
4103 if (e3.X_op != O_constant)
4104 {
4105 as_bad ("Third operand to .spill%s_p must be a constant",
4106 psprel ? "psp" : "sp");
4107 return;
4108 }
4109
4110 if (psprel)
fa7fda74 4111 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a 4112 else
fa7fda74 4113 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a
JW		 4114}
4115
6290819d
NC		 4116static unsigned int
4117get_saved_prologue_count (lbl)
4118 unsigned long lbl;
4119{
4120 label_prologue_count *lpc = unwind.saved_prologue_counts;
4121
4122 while (lpc != NULL && lpc->label_number != lbl)
4123 lpc = lpc->next;
4124
4125 if (lpc != NULL)
4126 return lpc->prologue_count;
4127
4128 as_bad ("Missing .label_state %ld", lbl);
4129 return 1;
4130}
4131
4132static void
4133save_prologue_count (lbl, count)
4134 unsigned long lbl;
4135 unsigned int count;
4136{
4137 label_prologue_count *lpc = unwind.saved_prologue_counts;
4138
4139 while (lpc != NULL && lpc->label_number != lbl)
4140 lpc = lpc->next;
4141
4142 if (lpc != NULL)
4143 lpc->prologue_count = count;
4144 else
4145 {
40449e9f 4146 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4147
4148 new_lpc->next = unwind.saved_prologue_counts;
4149 new_lpc->label_number = lbl;
4150 new_lpc->prologue_count = count;
4151 unwind.saved_prologue_counts = new_lpc;
4152 }
4153}
4154
4155static void
4156free_saved_prologue_counts ()
4157{
40449e9f
KH		 4158 label_prologue_count *lpc = unwind.saved_prologue_counts;
4159 label_prologue_count *next;
6290819d
NC		 4160
4161 while (lpc != NULL)
4162 {
4163 next = lpc->next;
4164 free (lpc);
4165 lpc = next;
4166 }
4167
4168 unwind.saved_prologue_counts = NULL;
4169}
4170
e0c9811a
JW		 4171static void
4172dot_label_state (dummy)
2434f565 4173 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4174{
4175 expressionS e;
4176
75e09913
JB		 4177 if (!in_body ("label_state"))
4178 return;
4179
e0c9811a
JW		 4180 parse_operand (&e);
4181 if (e.X_op != O_constant)
4182 {
4183 as_bad ("Operand to .label_state must be a constant");
4184 return;
4185 }
4186 add_unwind_entry (output_label_state (e.X_add_number));
6290819d 4187 save_prologue_count (e.X_add_number, unwind.prologue_count);
e0c9811a
JW		 4188}
4189
4190static void
4191dot_copy_state (dummy)
2434f565 4192 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4193{
4194 expressionS e;
4195
75e09913
JB		 4196 if (!in_body ("copy_state"))
4197 return;
4198
e0c9811a
JW		 4199 parse_operand (&e);
4200 if (e.X_op != O_constant)
4201 {
4202 as_bad ("Operand to .copy_state must be a constant");
4203 return;
4204 }
4205 add_unwind_entry (output_copy_state (e.X_add_number));
6290819d 4206 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
800eeca4
JW		 4207}
4208
197865e8 4209static void
800eeca4 4210dot_unwabi (dummy)
2434f565 4211 int dummy ATTRIBUTE_UNUSED;
800eeca4 4212{
e0c9811a
JW		 4213 expressionS e1, e2;
4214 unsigned char sep;
4215
75e09913
JB		 4216 if (!in_procedure ("unwabi"))
4217 return;
4218
e0c9811a
JW		 4219 sep = parse_operand (&e1);
4220 if (sep != ',')
4221 {
4222 as_bad ("Second operand to .unwabi missing");
4223 return;
4224 }
4225 sep = parse_operand (&e2);
4226 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4227 demand_empty_rest_of_line ();
e0c9811a
JW		 4228
4229 if (e1.X_op != O_constant)
4230 {
4231 as_bad ("First operand to .unwabi must be a constant");
4232 return;
4233 }
4234
4235 if (e2.X_op != O_constant)
4236 {
4237 as_bad ("Second operand to .unwabi must be a constant");
4238 return;
4239 }
4240
4241 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
800eeca4
JW		 4242}
4243
197865e8 4244static void
800eeca4 4245dot_personality (dummy)
2434f565 4246 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4247{
4248 char *name, *p, c;
75e09913
JB		 4249 if (!in_procedure ("personality"))
4250 return;
800eeca4
JW		 4251 SKIP_WHITESPACE ();
4252 name = input_line_pointer;
4253 c = get_symbol_end ();
4254 p = input_line_pointer;
e0c9811a 4255 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4256 unwind.force_unwind_entry = 1;
800eeca4
JW		 4257 *p = c;
4258 SKIP_WHITESPACE ();
4259 demand_empty_rest_of_line ();
4260}
4261
4262static void
4263dot_proc (dummy)
2434f565 4264 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4265{
4266 char *name, *p, c;
4267 symbolS *sym;
4268
75e09913 4269 unwind.proc_start = 0;
e0c9811a 4270 /* Parse names of main and alternate entry points and mark them as
542d6675 4271 function symbols: */
800eeca4
JW		 4272 while (1)
4273 {
4274 SKIP_WHITESPACE ();
4275 name = input_line_pointer;
4276 c = get_symbol_end ();
4277 p = input_line_pointer;
75e09913
JB		 4278 if (!*name)
4279 as_bad ("Empty argument of .proc");
4280 else
542d6675 4281 {
75e09913
JB		 4282 sym = symbol_find_or_make (name);
4283 if (S_IS_DEFINED (sym))
4284 as_bad ("`%s' was already defined", name);
4285 else if (unwind.proc_start == 0)
4286 {
4287 unwind.proc_start = sym;
4288 }
4289 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4290 }
800eeca4
JW		 4291 *p = c;
4292 SKIP_WHITESPACE ();
4293 if (*input_line_pointer != ',')
4294 break;
4295 ++input_line_pointer;
4296 }
75e09913
JB		 4297 if (unwind.proc_start == 0)
4298 unwind.proc_start = expr_build_dot ();
800eeca4
JW		 4299 demand_empty_rest_of_line ();
4300 ia64_do_align (16);
4301
75e09913 4302 unwind.prologue = 0;
33d01f33 4303 unwind.prologue_count = 0;
75e09913
JB		 4304 unwind.body = 0;
4305 unwind.insn = 0;
e0c9811a
JW		 4306 unwind.list = unwind.tail = unwind.current_entry = NULL;
4307 unwind.personality_routine = 0;
800eeca4
JW		 4308}
4309
4310static void
4311dot_body (dummy)
2434f565 4312 int dummy ATTRIBUTE_UNUSED;
800eeca4 4313{
75e09913
JB		 4314 if (!in_procedure ("body"))
4315 return;
4316 if (!unwind.prologue && !unwind.body && unwind.insn)
4317 as_warn ("Initial .body should precede any instructions");
4318
e0c9811a 4319 unwind.prologue = 0;
30d25259 4320 unwind.prologue_mask = 0;
75e09913 4321 unwind.body = 1;
30d25259 4322
800eeca4 4323 add_unwind_entry (output_body ());
e0c9811a 4324 demand_empty_rest_of_line ();
800eeca4
JW		 4325}
4326
4327static void
4328dot_prologue (dummy)
2434f565 4329 int dummy ATTRIBUTE_UNUSED;
800eeca4 4330{
e0c9811a 4331 unsigned char sep;
2434f565 4332 int mask = 0, grsave = 0;
e0c9811a 4333
75e09913
JB		 4334 if (!in_procedure ("prologue"))
4335 return;
4336 if (unwind.prologue)
4337 {
4338 as_bad (".prologue within prologue");
4339 ignore_rest_of_line ();
4340 return;
4341 }
4342 if (!unwind.body && unwind.insn)
4343 as_warn ("Initial .prologue should precede any instructions");
4344
e0c9811a 4345 if (!is_it_end_of_statement ())
800eeca4
JW		 4346 {
4347 expressionS e1, e2;
800eeca4
JW		 4348 sep = parse_operand (&e1);
4349 if (sep != ',')
4350 as_bad ("No second operand to .prologue");
4351 sep = parse_operand (&e2);
e0c9811a 4352 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4353 demand_empty_rest_of_line ();
800eeca4
JW		 4354
4355 if (e1.X_op == O_constant)
542d6675 4356 {
30d25259
RH		 4357 mask = e1.X_add_number;
4358
800eeca4 4359 if (e2.X_op == O_constant)
30d25259
RH		 4360 grsave = e2.X_add_number;
4361 else if (e2.X_op == O_register
4362 && (grsave = e2.X_add_number - REG_GR) < 128)
4363 ;
800eeca4 4364 else
30d25259
RH		 4365 as_bad ("Second operand not a constant or general register");
4366
4367 add_unwind_entry (output_prologue_gr (mask, grsave));
800eeca4
JW		 4368 }
4369 else
4370 as_bad ("First operand not a constant");
4371 }
4372 else
4373 add_unwind_entry (output_prologue ());
30d25259
RH		 4374
4375 unwind.prologue = 1;
4376 unwind.prologue_mask = mask;
75e09913 4377 unwind.body = 0;
33d01f33 4378 ++unwind.prologue_count;
800eeca4
JW		 4379}
4380
4381static void
4382dot_endp (dummy)
2434f565 4383 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4384{
4385 expressionS e;
2132e3a3 4386 char *ptr;
44f5c83a 4387 int bytes_per_address;
800eeca4
JW		 4388 long where;
4389 segT saved_seg;
4390 subsegT saved_subseg;
970d6792 4391 char *name, *default_name, *p, c;
c538998c 4392 symbolS *sym;
970d6792 4393 int unwind_check = md.unwind_check;
800eeca4 4394
970d6792 4395 md.unwind_check = unwind_check_error;
75e09913
JB		 4396 if (!in_procedure ("endp"))
4397 return;
970d6792 4398 md.unwind_check = unwind_check;
75e09913 4399
91a2ae2a
RH		 4400 if (unwind.saved_text_seg)
4401 {
4402 saved_seg = unwind.saved_text_seg;
4403 saved_subseg = unwind.saved_text_subseg;
4404 unwind.saved_text_seg = NULL;
4405 }
4406 else
4407 {
4408 saved_seg = now_seg;
4409 saved_subseg = now_subseg;
4410 }
4411
800eeca4 4412 insn_group_break (1, 0, 0);
800eeca4 4413
91a2ae2a
RH		 4414 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4415 if (!unwind.info)
2d6ed997 4416 generate_unwind_image (saved_seg);
800eeca4 4417
91a2ae2a
RH		 4418 if (unwind.info || unwind.force_unwind_entry)
4419 {
75e09913
JB		 4420 symbolS *proc_end;
4421
91a2ae2a 4422 subseg_set (md.last_text_seg, 0);
75e09913 4423 proc_end = expr_build_dot ();
5e7474a7 4424
da9f89d4 4425 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
5e7474a7 4426
557debba
JW		 4427 /* Make sure that section has 4 byte alignment for ILP32 and
4428 8 byte alignment for LP64. */
4429 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4430
557debba
JW		 4431 /* Need space for 3 pointers for procedure start, procedure end,
4432 and unwind info. */
4433 ptr = frag_more (3 * md.pointer_size);
4434 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4435 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4436
40449e9f 4437 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4438 e.X_op = O_pseudo_fixup;
4439 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4440 e.X_add_number = 0;
4441 e.X_add_symbol = unwind.proc_start;
4442 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4443
800eeca4
JW		 4444 e.X_op = O_pseudo_fixup;
4445 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4446 e.X_add_number = 0;
75e09913 4447 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4448 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4449 bytes_per_address, &e);
4450
4451 if (unwind.info)
4452 {
4453 e.X_op = O_pseudo_fixup;
4454 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4455 e.X_add_number = 0;
4456 e.X_add_symbol = unwind.info;
4457 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4458 bytes_per_address, &e);
4459 }
4460 else
4461 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4462 bytes_per_address);
800eeca4 4463
91a2ae2a 4464 }
800eeca4 4465 subseg_set (saved_seg, saved_subseg);
c538998c 4466
970d6792
L		 4467 if (unwind.proc_start)
4468 default_name = (char *) S_GET_NAME (unwind.proc_start);
4469 else
4470 default_name = NULL;
4471
c538998c
JJ		 4472 /* Parse names of main and alternate entry points and set symbol sizes. */
4473 while (1)
4474 {
4475 SKIP_WHITESPACE ();
4476 name = input_line_pointer;
4477 c = get_symbol_end ();
4478 p = input_line_pointer;
75e09913 4479 if (!*name)
970d6792
L		 4480 {
4481 if (md.unwind_check == unwind_check_warning)
4482 {
4483 if (default_name)
4484 {
4485 as_warn ("Empty argument of .endp. Use the default name `%s'",
4486 default_name);
4487 name = default_name;
4488 }
4489 else
4490 as_warn ("Empty argument of .endp");
4491 }
4492 else
4493 as_bad ("Empty argument of .endp");
4494 }
4495 if (*name)
75e09913
JB		 4496 {
4497 sym = symbol_find (name);
970d6792
L		 4498 if (!sym
4499 && md.unwind_check == unwind_check_warning
4500 && default_name
4501 && default_name != name)
4502 {
4503 /* We have a bad name. Try the default one if needed. */
4504 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4505 name, default_name);
4506 name = default_name;
4507 sym = symbol_find (name);
4508 }
75e09913
JB		 4509 if (!sym || !S_IS_DEFINED (sym))
4510 as_bad ("`%s' was not defined within procedure", name);
4511 else if (unwind.proc_start
4512 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4513 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4514 {
4515 fragS *fr = symbol_get_frag (unwind.proc_start);
4516 fragS *frag = symbol_get_frag (sym);
4517
4518 /* Check whether the function label is at or beyond last
4519 .proc directive. */
4520 while (fr && fr != frag)
4521 fr = fr->fr_next;
4522 if (fr)
c538998c 4523 {
75e09913
JB		 4524 if (frag == frag_now && SEG_NORMAL (now_seg))
4525 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4526 else
4527 {
4528 symbol_get_obj (sym)->size =
4529 (expressionS *) xmalloc (sizeof (expressionS));
4530 symbol_get_obj (sym)->size->X_op = O_subtract;
4531 symbol_get_obj (sym)->size->X_add_symbol
4532 = symbol_new (FAKE_LABEL_NAME, now_seg,
4533 frag_now_fix (), frag_now);
4534 symbol_get_obj (sym)->size->X_op_symbol = sym;
4535 symbol_get_obj (sym)->size->X_add_number = 0;
4536 }
c538998c
JJ		 4537 }
4538 }
4539 }
4540 *p = c;
4541 SKIP_WHITESPACE ();
4542 if (*input_line_pointer != ',')
4543 break;
4544 ++input_line_pointer;
4545 }
4546 demand_empty_rest_of_line ();
75e09913 4547 unwind.proc_start = unwind.info = 0;
800eeca4
JW		 4548}
4549
4550static void
4551dot_template (template)
4552 int template;
4553{
4554 CURR_SLOT.user_template = template;
4555}
4556
4557static void
4558dot_regstk (dummy)
2434f565 4559 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4560{
4561 int ins, locs, outs, rots;
4562
4563 if (is_it_end_of_statement ())
4564 ins = locs = outs = rots = 0;
4565 else
4566 {
4567 ins = get_absolute_expression ();
4568 if (*input_line_pointer++ != ',')
4569 goto err;
4570 locs = get_absolute_expression ();
4571 if (*input_line_pointer++ != ',')
4572 goto err;
4573 outs = get_absolute_expression ();
4574 if (*input_line_pointer++ != ',')
4575 goto err;
4576 rots = get_absolute_expression ();
4577 }
4578 set_regstack (ins, locs, outs, rots);
4579 return;
4580
4581 err:
4582 as_bad ("Comma expected");
4583 ignore_rest_of_line ();
4584}
4585
4586static void
4587dot_rot (type)
4588 int type;
4589{
4590 unsigned num_regs, num_alloced = 0;
4591 struct dynreg **drpp, *dr;
4592 int ch, base_reg = 0;
4593 char *name, *start;
4594 size_t len;
4595
4596 switch (type)
4597 {
4598 case DYNREG_GR: base_reg = REG_GR + 32; break;
4599 case DYNREG_FR: base_reg = REG_FR + 32; break;
4600 case DYNREG_PR: base_reg = REG_P + 16; break;
4601 default: break;
4602 }
4603
542d6675 4604 /* First, remove existing names from hash table. */
800eeca4
JW		 4605 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4606 {
4607 hash_delete (md.dynreg_hash, dr->name);
20b36a95 4608 /* FIXME: Free dr->name. */
800eeca4
JW		 4609 dr->num_regs = 0;
4610 }
4611
4612 drpp = &md.dynreg[type];
4613 while (1)
4614 {
4615 start = input_line_pointer;
4616 ch = get_symbol_end ();
20b36a95 4617 len = strlen (ia64_canonicalize_symbol_name (start));
800eeca4 4618 *input_line_pointer = ch;
800eeca4
JW		 4619
4620 SKIP_WHITESPACE ();
4621 if (*input_line_pointer != '[')
4622 {
4623 as_bad ("Expected '['");
4624 goto err;
4625 }
4626 ++input_line_pointer; /* skip '[' */
4627
4628 num_regs = get_absolute_expression ();
4629
4630 if (*input_line_pointer++ != ']')
4631 {
4632 as_bad ("Expected ']'");
4633 goto err;
4634 }
4635 SKIP_WHITESPACE ();
4636
4637 num_alloced += num_regs;
4638 switch (type)
4639 {
4640 case DYNREG_GR:
4641 if (num_alloced > md.rot.num_regs)
4642 {
4643 as_bad ("Used more than the declared %d rotating registers",
4644 md.rot.num_regs);
4645 goto err;
4646 }
4647 break;
4648 case DYNREG_FR:
4649 if (num_alloced > 96)
4650 {
4651 as_bad ("Used more than the available 96 rotating registers");
4652 goto err;
4653 }
4654 break;
4655 case DYNREG_PR:
4656 if (num_alloced > 48)
4657 {
4658 as_bad ("Used more than the available 48 rotating registers");
4659 goto err;
4660 }
4661 break;
4662
4663 default:
4664 break;
4665 }
4666
800eeca4
JW		 4667 if (!*drpp)
4668 {
4669 *drpp = obstack_alloc (&notes, sizeof (*dr));
4670 memset (*drpp, 0, sizeof (*dr));
4671 }
4672
20b36a95
JB		 4673 name = obstack_alloc (&notes, len + 1);
4674 memcpy (name, start, len);
4675 name[len] = '\0';
4676
800eeca4
JW		 4677 dr = *drpp;
4678 dr->name = name;
4679 dr->num_regs = num_regs;
4680 dr->base = base_reg;
4681 drpp = &dr->next;
4682 base_reg += num_regs;
4683
4684 if (hash_insert (md.dynreg_hash, name, dr))
4685 {
4686 as_bad ("Attempt to redefine register set `%s'", name);
20b36a95 4687 obstack_free (&notes, name);
800eeca4
JW		 4688 goto err;
4689 }
4690
4691 if (*input_line_pointer != ',')
4692 break;
4693 ++input_line_pointer; /* skip comma */
4694 SKIP_WHITESPACE ();
4695 }
4696 demand_empty_rest_of_line ();
4697 return;
4698
4699 err:
4700 ignore_rest_of_line ();
4701}
4702
4703static void
4704dot_byteorder (byteorder)
4705 int byteorder;
4706{
10a98291
L		 4707 segment_info_type *seginfo = seg_info (now_seg);
4708
4709 if (byteorder == -1)
4710 {
4711 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4712 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4713 byteorder = seginfo->tc_segment_info_data.endian == 1;
4714 }
4715 else
4716 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4717
4718 if (target_big_endian != byteorder)
4719 {
4720 target_big_endian = byteorder;
4721 if (target_big_endian)
4722 {
4723 ia64_number_to_chars = number_to_chars_bigendian;
4724 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4725 }
4726 else
4727 {
4728 ia64_number_to_chars = number_to_chars_littleendian;
4729 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4730 }
4731 }
800eeca4
JW		 4732}
4733
4734static void
4735dot_psr (dummy)
2434f565 4736 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4737{
4738 char *option;
4739 int ch;
4740
4741 while (1)
4742 {
4743 option = input_line_pointer;
4744 ch = get_symbol_end ();
4745 if (strcmp (option, "lsb") == 0)
4746 md.flags &= ~EF_IA_64_BE;
4747 else if (strcmp (option, "msb") == 0)
4748 md.flags |= EF_IA_64_BE;
4749 else if (strcmp (option, "abi32") == 0)
4750 md.flags &= ~EF_IA_64_ABI64;
4751 else if (strcmp (option, "abi64") == 0)
4752 md.flags |= EF_IA_64_ABI64;
4753 else
4754 as_bad ("Unknown psr option `%s'", option);
4755 *input_line_pointer = ch;
4756
4757 SKIP_WHITESPACE ();
4758 if (*input_line_pointer != ',')
4759 break;
4760
4761 ++input_line_pointer;
4762 SKIP_WHITESPACE ();
4763 }
4764 demand_empty_rest_of_line ();
4765}
4766
800eeca4
JW		 4767static void
4768dot_ln (dummy)
2434f565 4769 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4770{
4771 new_logical_line (0, get_absolute_expression ());
4772 demand_empty_rest_of_line ();
4773}
4774
ef6a2b41
JB		 4775static void
4776cross_section (ref, cons, ua)
4777 int ref;
4778 void (*cons) PARAMS((int));
4779 int ua;
800eeca4 4780{
ef6a2b41
JB		 4781 char *start, *end;
4782 int saved_auto_align;
4783 unsigned int section_count;
800eeca4
JW		 4784
4785 SKIP_WHITESPACE ();
ef6a2b41
JB		 4786 start = input_line_pointer;
4787 if (*start == '"')
4788 {
4789 int len;
4790 char *name;
4791
b3f19c14 4792 name = demand_copy_C_string (&len);
ef6a2b41
JB		 4793 obstack_free(&notes, name);
4794 if (!name)
4795 {
4796 ignore_rest_of_line ();
4797 return;
4798 }
4799 }
b3f19c14 4800 else
800eeca4 4801 {
b3f19c14
JB		 4802 char c = get_symbol_end ();
4803
4804 if (input_line_pointer == start)
4805 {
4806 as_bad ("Missing section name");
4807 ignore_rest_of_line ();
ef6a2b41 4808 return;
b3f19c14 4809 }
b3f19c14 4810 *input_line_pointer = c;
800eeca4 4811 }
ef6a2b41 4812 end = input_line_pointer;
800eeca4
JW		 4813 SKIP_WHITESPACE ();
4814 if (*input_line_pointer != ',')
4815 {
4816 as_bad ("Comma expected after section name");
4817 ignore_rest_of_line ();
ef6a2b41 4818 return;
800eeca4 4819 }
ef6a2b41
JB		 4820 *end = '\0';
4821 end = input_line_pointer + 1; /* skip comma */
4822 input_line_pointer = start;
4823 md.keep_pending_output = 1;
4824 section_count = bfd_count_sections(stdoutput);
4825 obj_elf_section (0);
4826 if (section_count != bfd_count_sections(stdoutput))
4827 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4828 input_line_pointer = end;
4829 saved_auto_align = md.auto_align;
4830 if (ua)
4831 md.auto_align = 0;
4832 (*cons) (ref);
4833 if (ua)
4834 md.auto_align = saved_auto_align;
4835 obj_elf_previous (0);
4836 md.keep_pending_output = 0;
800eeca4
JW		 4837}
4838
4839static void
4840dot_xdata (size)
4841 int size;
4842{
ef6a2b41 4843 cross_section (size, cons, 0);
800eeca4
JW		 4844}
4845
4846/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 4847
800eeca4
JW		 4848static void
4849stmt_float_cons (kind)
4850 int kind;
4851{
165a7f90 4852 size_t alignment;
800eeca4
JW		 4853
4854 switch (kind)
4855 {
165a7f90
L		 4856 case 'd':
4857 alignment = 8;
4858 break;
4859
4860 case 'x':
4861 case 'X':
4862 alignment = 16;
4863 break;
800eeca4
JW		 4864
4865 case 'f':
4866 default:
165a7f90 4867 alignment = 4;
800eeca4
JW		 4868 break;
4869 }
165a7f90 4870 ia64_do_align (alignment);
800eeca4
JW		 4871 float_cons (kind);
4872}
4873
4874static void
4875stmt_cons_ua (size)
4876 int size;
4877{
4878 int saved_auto_align = md.auto_align;
4879
4880 md.auto_align = 0;
4881 cons (size);
4882 md.auto_align = saved_auto_align;
4883}
4884
4885static void
4886dot_xfloat_cons (kind)
4887 int kind;
4888{
ef6a2b41 4889 cross_section (kind, stmt_float_cons, 0);
800eeca4
JW		 4890}
4891
4892static void
4893dot_xstringer (zero)
4894 int zero;
4895{
ef6a2b41 4896 cross_section (zero, stringer, 0);
800eeca4
JW		 4897}
4898
4899static void
4900dot_xdata_ua (size)
4901 int size;
4902{
ef6a2b41 4903 cross_section (size, cons, 1);
800eeca4
JW		 4904}
4905
4906static void
4907dot_xfloat_cons_ua (kind)
4908 int kind;
4909{
ef6a2b41 4910 cross_section (kind, float_cons, 1);
800eeca4
JW		 4911}
4912
4913/* .reg.val <regname>,value */
542d6675 4914
800eeca4
JW		 4915static void
4916dot_reg_val (dummy)
2434f565 4917 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4918{
4919 expressionS reg;
4920
4921 expression (&reg);
4922 if (reg.X_op != O_register)
4923 {
4924 as_bad (_("Register name expected"));
4925 ignore_rest_of_line ();
4926 }
4927 else if (*input_line_pointer++ != ',')
4928 {
4929 as_bad (_("Comma expected"));
4930 ignore_rest_of_line ();
4931 }
197865e8 4932 else
800eeca4
JW		 4933 {
4934 valueT value = get_absolute_expression ();
4935 int regno = reg.X_add_number;
a66d2bb7 4936 if (regno <= REG_GR || regno > REG_GR + 127)
542d6675 4937 as_warn (_("Register value annotation ignored"));
800eeca4 4938 else
542d6675
KH		 4939 {
4940 gr_values[regno - REG_GR].known = 1;
4941 gr_values[regno - REG_GR].value = value;
4942 gr_values[regno - REG_GR].path = md.path;
4943 }
800eeca4
JW		 4944 }
4945 demand_empty_rest_of_line ();
4946}
4947
5e819f9c
JW		 4948/*
4949 .serialize.data
4950 .serialize.instruction
4951 */
4952static void
4953dot_serialize (type)
4954 int type;
4955{
4956 insn_group_break (0, 0, 0);
4957 if (type)
4958 instruction_serialization ();
4959 else
4960 data_serialization ();
4961 insn_group_break (0, 0, 0);
4962 demand_empty_rest_of_line ();
4963}
4964
197865e8 4965/* select dv checking mode
800eeca4
JW		 4966 .auto
4967 .explicit
4968 .default
4969
197865e8 4970 A stop is inserted when changing modes
800eeca4 4971 */
542d6675 4972
800eeca4
JW		 4973static void
4974dot_dv_mode (type)
542d6675 4975 int type;
800eeca4
JW		 4976{
4977 if (md.manual_bundling)
4978 as_warn (_("Directive invalid within a bundle"));
4979
4980 if (type == 'E' || type == 'A')
4981 md.mode_explicitly_set = 0;
4982 else
4983 md.mode_explicitly_set = 1;
4984
4985 md.detect_dv = 1;
4986 switch (type)
4987 {
4988 case 'A':
4989 case 'a':
4990 if (md.explicit_mode)
542d6675 4991 insn_group_break (1, 0, 0);
800eeca4
JW		 4992 md.explicit_mode = 0;
4993 break;
4994 case 'E':
4995 case 'e':
4996 if (!md.explicit_mode)
542d6675 4997 insn_group_break (1, 0, 0);
800eeca4
JW		 4998 md.explicit_mode = 1;
4999 break;
5000 default:
5001 case 'd':
5002 if (md.explicit_mode != md.default_explicit_mode)
542d6675 5003 insn_group_break (1, 0, 0);
800eeca4
JW		 5004 md.explicit_mode = md.default_explicit_mode;
5005 md.mode_explicitly_set = 0;
5006 break;
5007 }
5008}
5009
5010static void
5011print_prmask (mask)
542d6675 5012 valueT mask;
800eeca4
JW		 5013{
5014 int regno;
5015 char *comma = "";
542d6675 5016 for (regno = 0; regno < 64; regno++)
800eeca4 5017 {
542d6675
KH		 5018 if (mask & ((valueT) 1 << regno))
5019 {
5020 fprintf (stderr, "%s p%d", comma, regno);
5021 comma = ",";
5022 }
800eeca4
JW		 5023 }
5024}
5025
5026/*
05ee4b0f
JB		 5027 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5028 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5029 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 5030 .pred.safe_across_calls p1 [, p2 [,...]]
5031 */
542d6675 5032
800eeca4
JW		 5033static void
5034dot_pred_rel (type)
542d6675 5035 int type;
800eeca4
JW		 5036{
5037 valueT mask = 0;
5038 int count = 0;
5039 int p1 = -1, p2 = -1;
5040
5041 if (type == 0)
5042 {
05ee4b0f 5043 if (*input_line_pointer == '"')
542d6675
KH		 5044 {
5045 int len;
5046 char *form = demand_copy_C_string (&len);
05ee4b0f 5047
542d6675
KH		 5048 if (strcmp (form, "mutex") == 0)
5049 type = 'm';
5050 else if (strcmp (form, "clear") == 0)
5051 type = 'c';
5052 else if (strcmp (form, "imply") == 0)
5053 type = 'i';
05ee4b0f
JB		 5054 obstack_free (&notes, form);
5055 }
5056 else if (*input_line_pointer == '@')
5057 {
5058 char *form = ++input_line_pointer;
5059 char c = get_symbol_end();
5060
5061 if (strcmp (form, "mutex") == 0)
5062 type = 'm';
5063 else if (strcmp (form, "clear") == 0)
5064 type = 'c';
5065 else if (strcmp (form, "imply") == 0)
5066 type = 'i';
5067 *input_line_pointer = c;
5068 }
5069 else
5070 {
5071 as_bad (_("Missing predicate relation type"));
5072 ignore_rest_of_line ();
5073 return;
5074 }
5075 if (type == 0)
5076 {
5077 as_bad (_("Unrecognized predicate relation type"));
5078 ignore_rest_of_line ();
5079 return;
542d6675 5080 }
800eeca4 5081 if (*input_line_pointer == ',')
542d6675 5082 ++input_line_pointer;
800eeca4
JW		 5083 SKIP_WHITESPACE ();
5084 }
5085
5086 SKIP_WHITESPACE ();
5087 while (1)
5088 {
20b36a95 5089 valueT bits = 1;
800eeca4 5090 int regno;
20b36a95
JB		 5091 expressionS pr, *pr1, *pr2;
5092
5093 expression (&pr);
5094 if (pr.X_op == O_register
5095 && pr.X_add_number >= REG_P
5096 && pr.X_add_number <= REG_P + 63)
5097 {
5098 regno = pr.X_add_number - REG_P;
5099 bits <<= regno;
5100 count++;
5101 if (p1 == -1)
5102 p1 = regno;
5103 else if (p2 == -1)
5104 p2 = regno;
5105 }
5106 else if (type != 'i'
5107 && pr.X_op == O_subtract
5108 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5109 && pr1->X_op == O_register
5110 && pr1->X_add_number >= REG_P
5111 && pr1->X_add_number <= REG_P + 63
5112 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5113 && pr2->X_op == O_register
5114 && pr2->X_add_number >= REG_P
5115 && pr2->X_add_number <= REG_P + 63)
5116 {
5117 /* It's a range. */
5118 int stop;
5119
5120 regno = pr1->X_add_number - REG_P;
5121 stop = pr2->X_add_number - REG_P;
5122 if (regno >= stop)
542d6675
KH		 5123 {
5124 as_bad (_("Bad register range"));
5125 ignore_rest_of_line ();
5126 return;
5127 }
20b36a95
JB		 5128 bits = ((bits << stop) << 1) - (bits << regno);
5129 count += stop - regno + 1;
5130 }
5131 else
5132 {
5133 as_bad (_("Predicate register expected"));
5134 ignore_rest_of_line ();
5135 return;
542d6675 5136 }
20b36a95
JB		 5137 if (mask & bits)
5138 as_warn (_("Duplicate predicate register ignored"));
5139 mask |= bits;
800eeca4 5140 if (*input_line_pointer != ',')
542d6675 5141 break;
800eeca4
JW		 5142 ++input_line_pointer;
5143 SKIP_WHITESPACE ();
5144 }
5145
5146 switch (type)
5147 {
5148 case 'c':
5149 if (count == 0)
542d6675 5150 mask = ~(valueT) 0;
800eeca4 5151 clear_qp_mutex (mask);
197865e8 5152 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5153 break;
5154 case 'i':
5155 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5156 as_bad (_("Predicate source and target required"));
800eeca4 5157 else if (p1 == 0 || p2 == 0)
542d6675 5158 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5159 else
542d6675 5160 add_qp_imply (p1, p2);
800eeca4
JW		 5161 break;
5162 case 'm':
5163 if (count < 2)
542d6675
KH		 5164 {
5165 as_bad (_("At least two PR arguments expected"));
5166 break;
5167 }
800eeca4 5168 else if (mask & 1)
542d6675
KH		 5169 {
5170 as_bad (_("Use of p0 is not valid in this context"));
5171 break;
5172 }
800eeca4
JW		 5173 add_qp_mutex (mask);
5174 break;
5175 case 's':
5176 /* note that we don't override any existing relations */
5177 if (count == 0)
542d6675
KH		 5178 {
5179 as_bad (_("At least one PR argument expected"));
5180 break;
5181 }
800eeca4 5182 if (md.debug_dv)
542d6675
KH		 5183 {
5184 fprintf (stderr, "Safe across calls: ");
5185 print_prmask (mask);
5186 fprintf (stderr, "\n");
5187 }
800eeca4
JW		 5188 qp_safe_across_calls = mask;
5189 break;
5190 }
5191 demand_empty_rest_of_line ();
5192}
5193
5194/* .entry label [, label [, ...]]
5195 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5196 Otherwise, only global labels are considered entry points. */
5197
800eeca4
JW		 5198static void
5199dot_entry (dummy)
2434f565 5200 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5201{
5202 const char *err;
5203 char *name;
5204 int c;
5205 symbolS *symbolP;
5206
5207 do
5208 {
5209 name = input_line_pointer;
5210 c = get_symbol_end ();
5211 symbolP = symbol_find_or_make (name);
5212
5213 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5214 if (err)
542d6675
KH		 5215 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5216 name, err);
800eeca4
JW		 5217
5218 *input_line_pointer = c;
5219 SKIP_WHITESPACE ();
5220 c = *input_line_pointer;
5221 if (c == ',')
5222 {
5223 input_line_pointer++;
5224 SKIP_WHITESPACE ();
5225 if (*input_line_pointer == '\n')
5226 c = '\n';
5227 }
5228 }
5229 while (c == ',');
5230
5231 demand_empty_rest_of_line ();
5232}
5233
197865e8 5234/* .mem.offset offset, base
542d6675
KH		 5235 "base" is used to distinguish between offsets from a different base. */
5236
800eeca4
JW		 5237static void
5238dot_mem_offset (dummy)
2434f565 5239 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5240{
5241 md.mem_offset.hint = 1;
5242 md.mem_offset.offset = get_absolute_expression ();
5243 if (*input_line_pointer != ',')
5244 {
5245 as_bad (_("Comma expected"));
5246 ignore_rest_of_line ();
5247 return;
5248 }
5249 ++input_line_pointer;
5250 md.mem_offset.base = get_absolute_expression ();
5251 demand_empty_rest_of_line ();
5252}
5253
542d6675 5254/* ia64-specific pseudo-ops: */
800eeca4
JW		 5255const pseudo_typeS md_pseudo_table[] =
5256 {
5257 { "radix", dot_radix, 0 },
5258 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5259 { "loc", dot_loc, 0 },
800eeca4
JW		 5260 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5261 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5262 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5263 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5264 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5265 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5266 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5267 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5268 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5269 { "proc", dot_proc, 0 },
5270 { "body", dot_body, 0 },
5271 { "prologue", dot_prologue, 0 },
2434f565 5272 { "endp", dot_endp, 0 },
2434f565
JW		 5273
5274 { "fframe", dot_fframe, 0 },
5275 { "vframe", dot_vframe, 0 },
5276 { "vframesp", dot_vframesp, 0 },
5277 { "vframepsp", dot_vframepsp, 0 },
5278 { "save", dot_save, 0 },
5279 { "restore", dot_restore, 0 },
5280 { "restorereg", dot_restorereg, 0 },
5281 { "restorereg.p", dot_restorereg_p, 0 },
5282 { "handlerdata", dot_handlerdata, 0 },
5283 { "unwentry", dot_unwentry, 0 },
5284 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5285 { "savesp", dot_savemem, 0 },
5286 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5287 { "save.g", dot_saveg, 0 },
5288 { "save.f", dot_savef, 0 },
5289 { "save.b", dot_saveb, 0 },
5290 { "save.gf", dot_savegf, 0 },
5291 { "spill", dot_spill, 0 },
5292 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5293 { "spillsp", dot_spillmem, 0 },
5294 { "spillpsp", dot_spillmem, 1 },
2434f565 5295 { "spillreg.p", dot_spillreg_p, 0 },
e0c9811a
JW		 5296 { "spillsp.p", dot_spillmem_p, 0 },
5297 { "spillpsp.p", dot_spillmem_p, 1 },
2434f565
JW		 5298 { "label_state", dot_label_state, 0 },
5299 { "copy_state", dot_copy_state, 0 },
5300 { "unwabi", dot_unwabi, 0 },
5301 { "personality", dot_personality, 0 },
800eeca4
JW		 5302 { "mii", dot_template, 0x0 },
5303 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5304 { "mlx", dot_template, 0x2 },
5305 { "mmi", dot_template, 0x4 },
5306 { "mfi", dot_template, 0x6 },
5307 { "mmf", dot_template, 0x7 },
5308 { "mib", dot_template, 0x8 },
5309 { "mbb", dot_template, 0x9 },
5310 { "bbb", dot_template, 0xb },
5311 { "mmb", dot_template, 0xc },
5312 { "mfb", dot_template, 0xe },
d9201763 5313 { "align", dot_align, 0 },
800eeca4
JW		 5314 { "regstk", dot_regstk, 0 },
5315 { "rotr", dot_rot, DYNREG_GR },
5316 { "rotf", dot_rot, DYNREG_FR },
5317 { "rotp", dot_rot, DYNREG_PR },
5318 { "lsb", dot_byteorder, 0 },
5319 { "msb", dot_byteorder, 1 },
5320 { "psr", dot_psr, 0 },
5321 { "alias", dot_alias, 0 },
35f5df7f 5322 { "secalias", dot_alias, 1 },
800eeca4
JW		 5323 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5324
5325 { "xdata1", dot_xdata, 1 },
5326 { "xdata2", dot_xdata, 2 },
5327 { "xdata4", dot_xdata, 4 },
5328 { "xdata8", dot_xdata, 8 },
b3f19c14 5329 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5330 { "xreal4", dot_xfloat_cons, 'f' },
5331 { "xreal8", dot_xfloat_cons, 'd' },
5332 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5333 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5334 { "xstring", dot_xstringer, 0 },
5335 { "xstringz", dot_xstringer, 1 },
5336
542d6675 5337 /* unaligned versions: */
800eeca4
JW		 5338 { "xdata2.ua", dot_xdata_ua, 2 },
5339 { "xdata4.ua", dot_xdata_ua, 4 },
5340 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5341 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5342 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5343 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5344 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5345 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5346
5347 /* annotations/DV checking support */
5348 { "entry", dot_entry, 0 },
2434f565 5349 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5350 { "pred.rel", dot_pred_rel, 0 },
5351 { "pred.rel.clear", dot_pred_rel, 'c' },
5352 { "pred.rel.imply", dot_pred_rel, 'i' },
5353 { "pred.rel.mutex", dot_pred_rel, 'm' },
5354 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5355 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5356 { "serialize.data", dot_serialize, 0 },
5357 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5358 { "auto", dot_dv_mode, 'a' },
5359 { "explicit", dot_dv_mode, 'e' },
5360 { "default", dot_dv_mode, 'd' },
5361
87885043
JW		 5362 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5363 IA-64 aligns data allocation pseudo-ops by default, so we have to
5364 tell it that these ones are supposed to be unaligned. Long term,
5365 should rewrite so that only IA-64 specific data allocation pseudo-ops
5366 are aligned by default. */
5367 {"2byte", stmt_cons_ua, 2},
5368 {"4byte", stmt_cons_ua, 4},
5369 {"8byte", stmt_cons_ua, 8},
5370
800eeca4
JW		 5371 { NULL, 0, 0 }
5372 };
5373
5374static const struct pseudo_opcode
5375 {
5376 const char *name;
5377 void (*handler) (int);
5378 int arg;
5379 }
5380pseudo_opcode[] =
5381 {
5382 /* these are more like pseudo-ops, but don't start with a dot */
5383 { "data1", cons, 1 },
5384 { "data2", cons, 2 },
5385 { "data4", cons, 4 },
5386 { "data8", cons, 8 },
3969b680 5387 { "data16", cons, 16 },
800eeca4
JW		 5388 { "real4", stmt_float_cons, 'f' },
5389 { "real8", stmt_float_cons, 'd' },
5390 { "real10", stmt_float_cons, 'x' },
165a7f90 5391 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5392 { "string", stringer, 0 },
5393 { "stringz", stringer, 1 },
5394
542d6675 5395 /* unaligned versions: */
800eeca4
JW		 5396 { "data2.ua", stmt_cons_ua, 2 },
5397 { "data4.ua", stmt_cons_ua, 4 },
5398 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5399 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5400 { "real4.ua", float_cons, 'f' },
5401 { "real8.ua", float_cons, 'd' },
5402 { "real10.ua", float_cons, 'x' },
165a7f90 5403 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5404 };
5405
5406/* Declare a register by creating a symbol for it and entering it in
5407 the symbol table. */
542d6675
KH		 5408
5409static symbolS *
800eeca4
JW		 5410declare_register (name, regnum)
5411 const char *name;
5412 int regnum;
5413{
5414 const char *err;
5415 symbolS *sym;
5416
5417 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5418
5419 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5420 if (err)
5421 as_fatal ("Inserting \"%s\" into register table failed: %s",
5422 name, err);
5423
5424 return sym;
5425}
5426
5427static void
5428declare_register_set (prefix, num_regs, base_regnum)
5429 const char *prefix;
5430 int num_regs;
5431 int base_regnum;
5432{
5433 char name[8];
5434 int i;
5435
5436 for (i = 0; i < num_regs; ++i)
5437 {
5438 sprintf (name, "%s%u", prefix, i);
5439 declare_register (name, base_regnum + i);
5440 }
5441}
5442
5443static unsigned int
5444operand_width (opnd)
5445 enum ia64_opnd opnd;
5446{
5447 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5448 unsigned int bits = 0;
5449 int i;
5450
5451 bits = 0;
5452 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5453 bits += odesc->field[i].bits;
5454
5455 return bits;
5456}
5457
87f8eb97 5458static enum operand_match_result
800eeca4
JW		 5459operand_match (idesc, index, e)
5460 const struct ia64_opcode *idesc;
5461 int index;
5462 expressionS *e;
5463{
5464 enum ia64_opnd opnd = idesc->operands[index];
5465 int bits, relocatable = 0;
5466 struct insn_fix *fix;
5467 bfd_signed_vma val;
5468
5469 switch (opnd)
5470 {
542d6675 5471 /* constants: */
800eeca4
JW		 5472
5473 case IA64_OPND_AR_CCV:
5474 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5475 return OPERAND_MATCH;
800eeca4
JW		 5476 break;
5477
c10d9d8f
JW		 5478 case IA64_OPND_AR_CSD:
5479 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5480 return OPERAND_MATCH;
5481 break;
5482
800eeca4
JW		 5483 case IA64_OPND_AR_PFS:
5484 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5485 return OPERAND_MATCH;
800eeca4
JW		 5486 break;
5487
5488 case IA64_OPND_GR0:
5489 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5490 return OPERAND_MATCH;
800eeca4
JW		 5491 break;
5492
5493 case IA64_OPND_IP:
5494 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5495 return OPERAND_MATCH;
800eeca4
JW		 5496 break;
5497
5498 case IA64_OPND_PR:
5499 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5500 return OPERAND_MATCH;
800eeca4
JW		 5501 break;
5502
5503 case IA64_OPND_PR_ROT:
5504 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5505 return OPERAND_MATCH;
800eeca4
JW		 5506 break;
5507
5508 case IA64_OPND_PSR:
5509 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5510 return OPERAND_MATCH;
800eeca4
JW		 5511 break;
5512
5513 case IA64_OPND_PSR_L:
5514 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5515 return OPERAND_MATCH;
800eeca4
JW		 5516 break;
5517
5518 case IA64_OPND_PSR_UM:
5519 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5520 return OPERAND_MATCH;
800eeca4
JW		 5521 break;
5522
5523 case IA64_OPND_C1:
87f8eb97
JW		 5524 if (e->X_op == O_constant)
5525 {
5526 if (e->X_add_number == 1)
5527 return OPERAND_MATCH;
5528 else
5529 return OPERAND_OUT_OF_RANGE;
5530 }
800eeca4
JW		 5531 break;
5532
5533 case IA64_OPND_C8:
87f8eb97
JW		 5534 if (e->X_op == O_constant)
5535 {
5536 if (e->X_add_number == 8)
5537 return OPERAND_MATCH;
5538 else
5539 return OPERAND_OUT_OF_RANGE;
5540 }
800eeca4
JW		 5541 break;
5542
5543 case IA64_OPND_C16:
87f8eb97
JW		 5544 if (e->X_op == O_constant)
5545 {
5546 if (e->X_add_number == 16)
5547 return OPERAND_MATCH;
5548 else
5549 return OPERAND_OUT_OF_RANGE;
5550 }
800eeca4
JW		 5551 break;
5552
542d6675 5553 /* register operands: */
800eeca4
JW		 5554
5555 case IA64_OPND_AR3:
5556 if (e->X_op == O_register && e->X_add_number >= REG_AR
5557 && e->X_add_number < REG_AR + 128)
87f8eb97 5558 return OPERAND_MATCH;
800eeca4
JW		 5559 break;
5560
5561 case IA64_OPND_B1:
5562 case IA64_OPND_B2:
5563 if (e->X_op == O_register && e->X_add_number >= REG_BR
5564 && e->X_add_number < REG_BR + 8)
87f8eb97 5565 return OPERAND_MATCH;
800eeca4
JW		 5566 break;
5567
5568 case IA64_OPND_CR3:
5569 if (e->X_op == O_register && e->X_add_number >= REG_CR
5570 && e->X_add_number < REG_CR + 128)
87f8eb97 5571 return OPERAND_MATCH;
800eeca4
JW		 5572 break;
5573
5574 case IA64_OPND_F1:
5575 case IA64_OPND_F2:
5576 case IA64_OPND_F3:
5577 case IA64_OPND_F4:
5578 if (e->X_op == O_register && e->X_add_number >= REG_FR
5579 && e->X_add_number < REG_FR + 128)
87f8eb97 5580 return OPERAND_MATCH;
800eeca4
JW		 5581 break;
5582
5583 case IA64_OPND_P1:
5584 case IA64_OPND_P2:
5585 if (e->X_op == O_register && e->X_add_number >= REG_P
5586 && e->X_add_number < REG_P + 64)
87f8eb97 5587 return OPERAND_MATCH;
800eeca4
JW		 5588 break;
5589
5590 case IA64_OPND_R1:
5591 case IA64_OPND_R2:
5592 case IA64_OPND_R3:
5593 if (e->X_op == O_register && e->X_add_number >= REG_GR
5594 && e->X_add_number < REG_GR + 128)
87f8eb97 5595 return OPERAND_MATCH;
800eeca4
JW		 5596 break;
5597
5598 case IA64_OPND_R3_2:
87f8eb97 5599 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5600 {
87f8eb97
JW		 5601 if (e->X_add_number < REG_GR + 4)
5602 return OPERAND_MATCH;
5603 else if (e->X_add_number < REG_GR + 128)
5604 return OPERAND_OUT_OF_RANGE;
5605 }
800eeca4
JW		 5606 break;
5607
542d6675 5608 /* indirect operands: */
800eeca4
JW		 5609 case IA64_OPND_CPUID_R3:
5610 case IA64_OPND_DBR_R3:
5611 case IA64_OPND_DTR_R3:
5612 case IA64_OPND_ITR_R3:
5613 case IA64_OPND_IBR_R3:
5614 case IA64_OPND_MSR_R3:
5615 case IA64_OPND_PKR_R3:
5616 case IA64_OPND_PMC_R3:
5617 case IA64_OPND_PMD_R3:
5618 case IA64_OPND_RR_R3:
5619 if (e->X_op == O_index && e->X_op_symbol
5620 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5621 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5622 return OPERAND_MATCH;
800eeca4
JW		 5623 break;
5624
5625 case IA64_OPND_MR3:
5626 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5627 return OPERAND_MATCH;
800eeca4
JW		 5628 break;
5629
542d6675 5630 /* immediate operands: */
800eeca4
JW		 5631 case IA64_OPND_CNT2a:
5632 case IA64_OPND_LEN4:
5633 case IA64_OPND_LEN6:
5634 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5635 if (e->X_op == O_constant)
5636 {
5637 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5638 return OPERAND_MATCH;
5639 else
5640 return OPERAND_OUT_OF_RANGE;
5641 }
800eeca4
JW		 5642 break;
5643
5644 case IA64_OPND_CNT2b:
87f8eb97
JW		 5645 if (e->X_op == O_constant)
5646 {
5647 if ((bfd_vma) (e->X_add_number - 1) < 3)
5648 return OPERAND_MATCH;
5649 else
5650 return OPERAND_OUT_OF_RANGE;
5651 }
800eeca4
JW		 5652 break;
5653
5654 case IA64_OPND_CNT2c:
5655 val = e->X_add_number;
87f8eb97
JW		 5656 if (e->X_op == O_constant)
5657 {
5658 if ((val == 0 || val == 7 || val == 15 || val == 16))
5659 return OPERAND_MATCH;
5660 else
5661 return OPERAND_OUT_OF_RANGE;
5662 }
800eeca4
JW		 5663 break;
5664
5665 case IA64_OPND_SOR:
5666 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5667 if (e->X_op == O_constant && e->X_add_number & 0x7)
5668 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5669 case IA64_OPND_SOF:
5670 case IA64_OPND_SOL:
87f8eb97
JW		 5671 if (e->X_op == O_constant)
5672 {
5673 if ((bfd_vma) e->X_add_number <= 96)
5674 return OPERAND_MATCH;
5675 else
5676 return OPERAND_OUT_OF_RANGE;
5677 }
800eeca4
JW		 5678 break;
5679
5680 case IA64_OPND_IMMU62:
5681 if (e->X_op == O_constant)
542d6675 5682 {
800eeca4 5683 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5684 return OPERAND_MATCH;
5685 else
5686 return OPERAND_OUT_OF_RANGE;
542d6675 5687 }
197865e8 5688 else
542d6675
KH		 5689 {
5690 /* FIXME -- need 62-bit relocation type */
5691 as_bad (_("62-bit relocation not yet implemented"));
5692 }
800eeca4
JW		 5693 break;
5694
5695 case IA64_OPND_IMMU64:
5696 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5697 || e->X_op == O_subtract)
5698 {
5699 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5700 fix->code = BFD_RELOC_IA64_IMM64;
5701 if (e->X_op != O_subtract)
5702 {
5703 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5704 if (e->X_op == O_pseudo_fixup)
5705 e->X_op = O_symbol;
5706 }
5707
5708 fix->opnd = idesc->operands[index];
5709 fix->expr = *e;
5710 fix->is_pcrel = 0;
5711 ++CURR_SLOT.num_fixups;
87f8eb97 5712 return OPERAND_MATCH;
800eeca4
JW		 5713 }
5714 else if (e->X_op == O_constant)
87f8eb97 5715 return OPERAND_MATCH;
800eeca4
JW		 5716 break;
5717
5718 case IA64_OPND_CCNT5:
5719 case IA64_OPND_CNT5:
5720 case IA64_OPND_CNT6:
5721 case IA64_OPND_CPOS6a:
5722 case IA64_OPND_CPOS6b:
5723 case IA64_OPND_CPOS6c:
5724 case IA64_OPND_IMMU2:
5725 case IA64_OPND_IMMU7a:
5726 case IA64_OPND_IMMU7b:
800eeca4
JW		 5727 case IA64_OPND_IMMU21:
5728 case IA64_OPND_IMMU24:
5729 case IA64_OPND_MBTYPE4:
5730 case IA64_OPND_MHTYPE8:
5731 case IA64_OPND_POS6:
5732 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5733 if (e->X_op == O_constant)
5734 {
5735 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5736 return OPERAND_MATCH;
5737 else
5738 return OPERAND_OUT_OF_RANGE;
5739 }
800eeca4
JW		 5740 break;
5741
bf3ca999
TW		 5742 case IA64_OPND_IMMU9:
5743 bits = operand_width (idesc->operands[index]);
87f8eb97 5744 if (e->X_op == O_constant)
542d6675 5745 {
87f8eb97
JW		 5746 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5747 {
5748 int lobits = e->X_add_number & 0x3;
5749 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5750 e->X_add_number |= (bfd_vma) 0x3;
5751 return OPERAND_MATCH;
5752 }
5753 else
5754 return OPERAND_OUT_OF_RANGE;
542d6675 5755 }
bf3ca999
TW		 5756 break;
5757
800eeca4
JW		 5758 case IA64_OPND_IMM44:
5759 /* least 16 bits must be zero */
5760 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5761 /* XXX technically, this is wrong: we should not be issuing warning
5762 messages until we're sure this instruction pattern is going to
5763 be used! */
542d6675 5764 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5765
87f8eb97 5766 if (e->X_op == O_constant)
542d6675 5767 {
87f8eb97
JW		 5768 if (((e->X_add_number >= 0
5769 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5770 || (e->X_add_number < 0
5771 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5772 {
87f8eb97
JW		 5773 /* sign-extend */
5774 if (e->X_add_number >= 0
5775 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5776 {
5777 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5778 }
5779 return OPERAND_MATCH;
542d6675 5780 }
87f8eb97
JW		 5781 else
5782 return OPERAND_OUT_OF_RANGE;
542d6675 5783 }
800eeca4
JW		 5784 break;
5785
5786 case IA64_OPND_IMM17:
5787 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5788 if (e->X_op == O_constant)
542d6675 5789 {
87f8eb97
JW		 5790 if (((e->X_add_number >= 0
5791 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5792 || (e->X_add_number < 0
5793 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5794 {
87f8eb97
JW		 5795 /* sign-extend */
5796 if (e->X_add_number >= 0
5797 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5798 {
5799 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5800 }
5801 return OPERAND_MATCH;
542d6675 5802 }
87f8eb97
JW		 5803 else
5804 return OPERAND_OUT_OF_RANGE;
542d6675 5805 }
800eeca4
JW		 5806 break;
5807
5808 case IA64_OPND_IMM14:
5809 case IA64_OPND_IMM22:
5810 relocatable = 1;
5811 case IA64_OPND_IMM1:
5812 case IA64_OPND_IMM8:
5813 case IA64_OPND_IMM8U4:
5814 case IA64_OPND_IMM8M1:
5815 case IA64_OPND_IMM8M1U4:
5816 case IA64_OPND_IMM8M1U8:
5817 case IA64_OPND_IMM9a:
5818 case IA64_OPND_IMM9b:
5819 bits = operand_width (idesc->operands[index]);
5820 if (relocatable && (e->X_op == O_symbol
5821 || e->X_op == O_subtract
5822 || e->X_op == O_pseudo_fixup))
5823 {
5824 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5825
5826 if (idesc->operands[index] == IA64_OPND_IMM14)
5827 fix->code = BFD_RELOC_IA64_IMM14;
5828 else
5829 fix->code = BFD_RELOC_IA64_IMM22;
5830
5831 if (e->X_op != O_subtract)
5832 {
5833 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5834 if (e->X_op == O_pseudo_fixup)
5835 e->X_op = O_symbol;
5836 }
5837
5838 fix->opnd = idesc->operands[index];
5839 fix->expr = *e;
5840 fix->is_pcrel = 0;
5841 ++CURR_SLOT.num_fixups;
87f8eb97 5842 return OPERAND_MATCH;
800eeca4
JW		 5843 }
5844 else if (e->X_op != O_constant
5845 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 5846 return OPERAND_MISMATCH;
800eeca4
JW		 5847
5848 if (opnd == IA64_OPND_IMM8M1U4)
5849 {
5850 /* Zero is not valid for unsigned compares that take an adjusted
5851 constant immediate range. */
5852 if (e->X_add_number == 0)
87f8eb97 5853 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5854
5855 /* Sign-extend 32-bit unsigned numbers, so that the following range
5856 checks will work. */
5857 val = e->X_add_number;
197865e8
KH		 5858 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5859 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5860 val = ((val << 32) >> 32);
5861
5862 /* Check for 0x100000000. This is valid because
5863 0x100000000-1 is the same as ((uint32_t) -1). */
5864 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 5865 return OPERAND_MATCH;
800eeca4
JW		 5866
5867 val = val - 1;
5868 }
5869 else if (opnd == IA64_OPND_IMM8M1U8)
5870 {
5871 /* Zero is not valid for unsigned compares that take an adjusted
5872 constant immediate range. */
5873 if (e->X_add_number == 0)
87f8eb97 5874 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5875
5876 /* Check for 0x10000000000000000. */
5877 if (e->X_op == O_big)
5878 {
5879 if (generic_bignum[0] == 0
5880 && generic_bignum[1] == 0
5881 && generic_bignum[2] == 0
5882 && generic_bignum[3] == 0
5883 && generic_bignum[4] == 1)
87f8eb97 5884 return OPERAND_MATCH;
800eeca4 5885 else
87f8eb97 5886 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5887 }
5888 else
5889 val = e->X_add_number - 1;
5890 }
5891 else if (opnd == IA64_OPND_IMM8M1)
5892 val = e->X_add_number - 1;
5893 else if (opnd == IA64_OPND_IMM8U4)
5894 {
5895 /* Sign-extend 32-bit unsigned numbers, so that the following range
5896 checks will work. */
5897 val = e->X_add_number;
197865e8
KH		 5898 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5899 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5900 val = ((val << 32) >> 32);
5901 }
5902 else
5903 val = e->X_add_number;
5904
2434f565
JW		 5905 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5906 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 5907 return OPERAND_MATCH;
5908 else
5909 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5910
5911 case IA64_OPND_INC3:
5912 /* +/- 1, 4, 8, 16 */
5913 val = e->X_add_number;
5914 if (val < 0)
5915 val = -val;
87f8eb97
JW		 5916 if (e->X_op == O_constant)
5917 {
5918 if ((val == 1 || val == 4 || val == 8 || val == 16))
5919 return OPERAND_MATCH;
5920 else
5921 return OPERAND_OUT_OF_RANGE;
5922 }
800eeca4
JW		 5923 break;
5924
5925 case IA64_OPND_TGT25:
5926 case IA64_OPND_TGT25b:
5927 case IA64_OPND_TGT25c:
5928 case IA64_OPND_TGT64:
5929 if (e->X_op == O_symbol)
5930 {
5931 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5932 if (opnd == IA64_OPND_TGT25)
5933 fix->code = BFD_RELOC_IA64_PCREL21F;
5934 else if (opnd == IA64_OPND_TGT25b)
5935 fix->code = BFD_RELOC_IA64_PCREL21M;
5936 else if (opnd == IA64_OPND_TGT25c)
5937 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 5938 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 5939 fix->code = BFD_RELOC_IA64_PCREL60B;
5940 else
5941 abort ();
5942
800eeca4
JW		 5943 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5944 fix->opnd = idesc->operands[index];
5945 fix->expr = *e;
5946 fix->is_pcrel = 1;
5947 ++CURR_SLOT.num_fixups;
87f8eb97 5948 return OPERAND_MATCH;
800eeca4
JW		 5949 }
5950 case IA64_OPND_TAG13:
5951 case IA64_OPND_TAG13b:
5952 switch (e->X_op)
5953 {
5954 case O_constant:
87f8eb97 5955 return OPERAND_MATCH;
800eeca4
JW		 5956
5957 case O_symbol:
5958 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c
JW		 5959 /* There are no external relocs for TAG13/TAG13b fields, so we
5960 create a dummy reloc. This will not live past md_apply_fix3. */
5961 fix->code = BFD_RELOC_UNUSED;
5962 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 5963 fix->opnd = idesc->operands[index];
5964 fix->expr = *e;
5965 fix->is_pcrel = 1;
5966 ++CURR_SLOT.num_fixups;
87f8eb97 5967 return OPERAND_MATCH;
800eeca4
JW		 5968
5969 default:
5970 break;
5971 }
5972 break;
5973
a823923b
RH		 5974 case IA64_OPND_LDXMOV:
5975 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5976 fix->code = BFD_RELOC_IA64_LDXMOV;
5977 fix->opnd = idesc->operands[index];
5978 fix->expr = *e;
5979 fix->is_pcrel = 0;
5980 ++CURR_SLOT.num_fixups;
5981 return OPERAND_MATCH;
5982
800eeca4
JW		 5983 default:
5984 break;
5985 }
87f8eb97 5986 return OPERAND_MISMATCH;
800eeca4
JW		 5987}
5988
5989static int
5990parse_operand (e)
5991 expressionS *e;
5992{
5993 int sep = '\0';
5994
5995 memset (e, 0, sizeof (*e));
5996 e->X_op = O_absent;
5997 SKIP_WHITESPACE ();
5998 if (*input_line_pointer != '}')
5999 expression (e);
6000 sep = *input_line_pointer++;
6001
6002 if (sep == '}')
6003 {
6004 if (!md.manual_bundling)
6005 as_warn ("Found '}' when manual bundling is off");
6006 else
6007 CURR_SLOT.manual_bundling_off = 1;
6008 md.manual_bundling = 0;
6009 sep = '\0';
6010 }
6011 return sep;
6012}
6013
6014/* Returns the next entry in the opcode table that matches the one in
6015 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 6016 found, NULL is returned instead. */
800eeca4
JW		 6017
6018static struct ia64_opcode *
6019get_next_opcode (struct ia64_opcode *idesc)
6020{
6021 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6022 ia64_free_opcode (idesc);
6023 return next;
6024}
6025
6026/* Parse the operands for the opcode and find the opcode variant that
6027 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 6028
6029static struct ia64_opcode *
800eeca4
JW		 6030parse_operands (idesc)
6031 struct ia64_opcode *idesc;
6032{
6033 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 6034 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
4b09e828
JB		 6035 int reg1, reg2;
6036 char reg_class;
800eeca4 6037 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 6038 enum operand_match_result result;
800eeca4
JW		 6039 char mnemonic[129];
6040 char *first_arg = 0, *end, *saved_input_pointer;
6041 unsigned int sof;
6042
6043 assert (strlen (idesc->name) <= 128);
6044
6045 strcpy (mnemonic, idesc->name);
60b9a617
JB		 6046 if (idesc->operands[2] == IA64_OPND_SOF
6047 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6048 {
6049 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6050 can't parse the first operand until we have parsed the
6051 remaining operands of the "alloc" instruction. */
6052 SKIP_WHITESPACE ();
6053 first_arg = input_line_pointer;
6054 end = strchr (input_line_pointer, '=');
6055 if (!end)
6056 {
6057 as_bad ("Expected separator `='");
6058 return 0;
6059 }
6060 input_line_pointer = end + 1;
6061 ++i;
6062 ++num_outputs;
6063 }
6064
d3156ecc 6065 for (; ; ++i)
800eeca4 6066 {
d3156ecc
JB		 6067 if (i < NELEMS (CURR_SLOT.opnd))
6068 {
6069 sep = parse_operand (CURR_SLOT.opnd + i);
6070 if (CURR_SLOT.opnd[i].X_op == O_absent)
6071 break;
6072 }
6073 else
6074 {
6075 expressionS dummy;
6076
6077 sep = parse_operand (&dummy);
6078 if (dummy.X_op == O_absent)
6079 break;
6080 }
800eeca4
JW		 6081
6082 ++num_operands;
6083
6084 if (sep != '=' && sep != ',')
6085 break;
6086
6087 if (sep == '=')
6088 {
6089 if (num_outputs > 0)
6090 as_bad ("Duplicate equal sign (=) in instruction");
6091 else
6092 num_outputs = i + 1;
6093 }
6094 }
6095 if (sep != '\0')
6096 {
6097 as_bad ("Illegal operand separator `%c'", sep);
6098 return 0;
6099 }
197865e8 6100
60b9a617
JB		 6101 if (idesc->operands[2] == IA64_OPND_SOF
6102 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6103 {
6104 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6105 know (strcmp (idesc->name, "alloc") == 0);
60b9a617
JB		 6106 i = (CURR_SLOT.opnd[1].X_op == O_register
6107 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6108 if (num_operands == i + 3 /* first_arg not included in this count! */
6109 && CURR_SLOT.opnd[i].X_op == O_constant
6110 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6111 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6112 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
800eeca4 6113 {
60b9a617
JB		 6114 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6115 CURR_SLOT.opnd[i + 1].X_add_number,
6116 CURR_SLOT.opnd[i + 2].X_add_number,
6117 CURR_SLOT.opnd[i + 3].X_add_number);
800eeca4 6118
542d6675 6119 /* now we can parse the first arg: */
800eeca4
JW		 6120 saved_input_pointer = input_line_pointer;
6121 input_line_pointer = first_arg;
6122 sep = parse_operand (CURR_SLOT.opnd + 0);
6123 if (sep != '=')
6124 --num_outputs; /* force error */
6125 input_line_pointer = saved_input_pointer;
6126
60b9a617
JB		 6127 CURR_SLOT.opnd[i].X_add_number = sof;
6128 CURR_SLOT.opnd[i + 1].X_add_number
6129 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6130 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6131 }
6132 }
6133
d3156ecc 6134 highest_unmatched_operand = -4;
87f8eb97
JW		 6135 curr_out_of_range_pos = -1;
6136 error_pos = 0;
800eeca4
JW		 6137 for (; idesc; idesc = get_next_opcode (idesc))
6138 {
6139 if (num_outputs != idesc->num_outputs)
6140 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6141 if (highest_unmatched_operand < 0)
6142 highest_unmatched_operand |= 1;
6143 if (num_operands > NELEMS (idesc->operands)
6144 || (num_operands < NELEMS (idesc->operands)
6145 && idesc->operands[num_operands])
6146 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6147 continue; /* mismatch in number of arguments */
6148 if (highest_unmatched_operand < 0)
6149 highest_unmatched_operand |= 2;
800eeca4
JW		 6150
6151 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6152
6153 /* Try to match all operands. If we see an out-of-range operand,
6154 then continue trying to match the rest of the operands, since if
6155 the rest match, then this idesc will give the best error message. */
6156
6157 out_of_range_pos = -1;
800eeca4 6158 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6159 {
6160 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6161 if (result != OPERAND_MATCH)
6162 {
6163 if (result != OPERAND_OUT_OF_RANGE)
6164 break;
6165 if (out_of_range_pos < 0)
6166 /* remember position of the first out-of-range operand: */
6167 out_of_range_pos = i;
6168 }
6169 }
800eeca4 6170
87f8eb97
JW		 6171 /* If we did not match all operands, or if at least one operand was
6172 out-of-range, then this idesc does not match. Keep track of which
6173 idesc matched the most operands before failing. If we have two
6174 idescs that failed at the same position, and one had an out-of-range
6175 operand, then prefer the out-of-range operand. Thus if we have
6176 "add r0=0x1000000,r1" we get an error saying the constant is out
6177 of range instead of an error saying that the constant should have been
6178 a register. */
6179
6180 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6181 {
87f8eb97
JW		 6182 if (i > highest_unmatched_operand
6183 || (i == highest_unmatched_operand
6184 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6185 {
6186 highest_unmatched_operand = i;
87f8eb97
JW		 6187 if (out_of_range_pos >= 0)
6188 {
6189 expected_operand = idesc->operands[out_of_range_pos];
6190 error_pos = out_of_range_pos;
6191 }
6192 else
6193 {
6194 expected_operand = idesc->operands[i];
6195 error_pos = i;
6196 }
6197 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6198 }
6199 continue;
6200 }
6201
800eeca4
JW		 6202 break;
6203 }
6204 if (!idesc)
6205 {
6206 if (expected_operand)
6207 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6208 error_pos + 1, mnemonic,
800eeca4 6209 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6210 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6211 as_bad ("Wrong number of output operands");
6212 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6213 as_bad ("Wrong number of input operands");
800eeca4
JW		 6214 else
6215 as_bad ("Operand mismatch");
6216 return 0;
6217 }
4b09e828
JB		 6218
6219 /* Check that the instruction doesn't use
6220 - r0, f0, or f1 as output operands
6221 - the same predicate twice as output operands
6222 - r0 as address of a base update load or store
6223 - the same GR as output and address of a base update load
6224 - two even- or two odd-numbered FRs as output operands of a floating
6225 point parallel load.
6226 At most two (conflicting) output (or output-like) operands can exist,
6227 (floating point parallel loads have three outputs, but the base register,
6228 if updated, cannot conflict with the actual outputs). */
6229 reg2 = reg1 = -1;
6230 for (i = 0; i < num_operands; ++i)
6231 {
6232 int regno = 0;
6233
6234 reg_class = 0;
6235 switch (idesc->operands[i])
6236 {
6237 case IA64_OPND_R1:
6238 case IA64_OPND_R2:
6239 case IA64_OPND_R3:
6240 if (i < num_outputs)
6241 {
6242 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6243 reg_class = 'r';
6244 else if (reg1 < 0)
6245 reg1 = CURR_SLOT.opnd[i].X_add_number;
6246 else if (reg2 < 0)
6247 reg2 = CURR_SLOT.opnd[i].X_add_number;
6248 }
6249 break;
6250 case IA64_OPND_P1:
6251 case IA64_OPND_P2:
6252 if (i < num_outputs)
6253 {
6254 if (reg1 < 0)
6255 reg1 = CURR_SLOT.opnd[i].X_add_number;
6256 else if (reg2 < 0)
6257 reg2 = CURR_SLOT.opnd[i].X_add_number;
6258 }
6259 break;
6260 case IA64_OPND_F1:
6261 case IA64_OPND_F2:
6262 case IA64_OPND_F3:
6263 case IA64_OPND_F4:
6264 if (i < num_outputs)
6265 {
6266 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6267 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6268 {
6269 reg_class = 'f';
6270 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6271 }
6272 else if (reg1 < 0)
6273 reg1 = CURR_SLOT.opnd[i].X_add_number;
6274 else if (reg2 < 0)
6275 reg2 = CURR_SLOT.opnd[i].X_add_number;
6276 }
6277 break;
6278 case IA64_OPND_MR3:
6279 if (idesc->flags & IA64_OPCODE_POSTINC)
6280 {
6281 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6282 reg_class = 'm';
6283 else if (reg1 < 0)
6284 reg1 = CURR_SLOT.opnd[i].X_add_number;
6285 else if (reg2 < 0)
6286 reg2 = CURR_SLOT.opnd[i].X_add_number;
6287 }
6288 break;
6289 default:
6290 break;
6291 }
6292 switch (reg_class)
6293 {
6294 case 0:
6295 break;
6296 default:
6297 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6298 break;
6299 case 'm':
6300 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6301 break;
6302 }
6303 }
6304 if (reg1 == reg2)
6305 {
6306 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6307 {
6308 reg1 -= REG_GR;
6309 reg_class = 'r';
6310 }
6311 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6312 {
6313 reg1 -= REG_P;
6314 reg_class = 'p';
6315 }
6316 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6317 {
6318 reg1 -= REG_FR;
6319 reg_class = 'f';
6320 }
6321 else
6322 reg_class = 0;
6323 if (reg_class)
6324 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6325 }
6326 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6327 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6328 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6329 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6330 && ! ((reg1 ^ reg2) & 1))
6331 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6332 reg1 - REG_FR, reg2 - REG_FR);
6333 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6334 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6335 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6336 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6337 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6338 reg1 - REG_FR, reg2 - REG_FR);
800eeca4
JW		 6339 return idesc;
6340}
6341
6342static void
6343build_insn (slot, insnp)
6344 struct slot *slot;
6345 bfd_vma *insnp;
6346{
6347 const struct ia64_operand *odesc, *o2desc;
6348 struct ia64_opcode *idesc = slot->idesc;
2132e3a3
AM		 6349 bfd_vma insn;
6350 bfd_signed_vma val;
800eeca4
JW		 6351 const char *err;
6352 int i;
6353
6354 insn = idesc->opcode | slot->qp_regno;
6355
6356 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6357 {
c67e42c9
RH		 6358 if (slot->opnd[i].X_op == O_register
6359 || slot->opnd[i].X_op == O_constant
6360 || slot->opnd[i].X_op == O_index)
6361 val = slot->opnd[i].X_add_number;
6362 else if (slot->opnd[i].X_op == O_big)
800eeca4 6363 {
c67e42c9
RH		 6364 /* This must be the value 0x10000000000000000. */
6365 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6366 val = 0;
6367 }
6368 else
6369 val = 0;
6370
6371 switch (idesc->operands[i])
6372 {
6373 case IA64_OPND_IMMU64:
800eeca4
JW		 6374 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6375 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6376 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6377 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6378 continue;
6379
6380 case IA64_OPND_IMMU62:
542d6675
KH		 6381 val &= 0x3fffffffffffffffULL;
6382 if (val != slot->opnd[i].X_add_number)
6383 as_warn (_("Value truncated to 62 bits"));
6384 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6385 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6386 continue;
800eeca4 6387
c67e42c9
RH		 6388 case IA64_OPND_TGT64:
6389 val >>= 4;
6390 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6391 insn |= ((((val >> 59) & 0x1) << 36)
6392 | (((val >> 0) & 0xfffff) << 13));
6393 continue;
800eeca4 6394
c67e42c9
RH		 6395 case IA64_OPND_AR3:
6396 val -= REG_AR;
6397 break;
6398
6399 case IA64_OPND_B1:
6400 case IA64_OPND_B2:
6401 val -= REG_BR;
6402 break;
6403
6404 case IA64_OPND_CR3:
6405 val -= REG_CR;
6406 break;
6407
6408 case IA64_OPND_F1:
6409 case IA64_OPND_F2:
6410 case IA64_OPND_F3:
6411 case IA64_OPND_F4:
6412 val -= REG_FR;
6413 break;
6414
6415 case IA64_OPND_P1:
6416 case IA64_OPND_P2:
6417 val -= REG_P;
6418 break;
6419
6420 case IA64_OPND_R1:
6421 case IA64_OPND_R2:
6422 case IA64_OPND_R3:
6423 case IA64_OPND_R3_2:
6424 case IA64_OPND_CPUID_R3:
6425 case IA64_OPND_DBR_R3:
6426 case IA64_OPND_DTR_R3:
6427 case IA64_OPND_ITR_R3:
6428 case IA64_OPND_IBR_R3:
6429 case IA64_OPND_MR3:
6430 case IA64_OPND_MSR_R3:
6431 case IA64_OPND_PKR_R3:
6432 case IA64_OPND_PMC_R3:
6433 case IA64_OPND_PMD_R3:
197865e8 6434 case IA64_OPND_RR_R3:
c67e42c9
RH		 6435 val -= REG_GR;
6436 break;
6437
6438 default:
6439 break;
6440 }
6441
6442 odesc = elf64_ia64_operands + idesc->operands[i];
6443 err = (*odesc->insert) (odesc, val, &insn);
6444 if (err)
6445 as_bad_where (slot->src_file, slot->src_line,
6446 "Bad operand value: %s", err);
6447 if (idesc->flags & IA64_OPCODE_PSEUDO)
6448 {
6449 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6450 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6451 {
6452 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6453 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6454 }
c67e42c9
RH		 6455 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6456 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6457 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6458 {
c67e42c9
RH		 6459 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6460 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6461 }
6462 }
6463 }
6464 *insnp = insn;
6465}
6466
6467static void
6468emit_one_bundle ()
6469{
f4660e2c 6470 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6471 enum ia64_unit required_unit, insn_unit = 0;
6472 enum ia64_insn_type type[3], insn_type;
6473 unsigned int template, orig_template;
542d6675 6474 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6475 struct ia64_opcode *idesc;
6476 int end_of_insn_group = 0, user_template = -1;
9b505842 6477 int n, i, j, first, curr, last_slot;
d6e78c11 6478 unw_rec_list *ptr, *last_ptr, *end_ptr;
800eeca4
JW		 6479 bfd_vma t0 = 0, t1 = 0;
6480 struct label_fix *lfix;
6481 struct insn_fix *ifix;
6482 char mnemonic[16];
6483 fixS *fix;
6484 char *f;
5a9ff93d 6485 int addr_mod;
800eeca4
JW		 6486
6487 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6488 know (first >= 0 & first < NUM_SLOTS);
6489 n = MIN (3, md.num_slots_in_use);
6490
6491 /* Determine template: user user_template if specified, best match
542d6675 6492 otherwise: */
800eeca4
JW		 6493
6494 if (md.slot[first].user_template >= 0)
6495 user_template = template = md.slot[first].user_template;
6496 else
6497 {
032efc85 6498 /* Auto select appropriate template. */
800eeca4
JW		 6499 memset (type, 0, sizeof (type));
6500 curr = first;
6501 for (i = 0; i < n; ++i)
6502 {
032efc85
RH		 6503 if (md.slot[curr].label_fixups && i != 0)
6504 break;
800eeca4
JW		 6505 type[i] = md.slot[curr].idesc->type;
6506 curr = (curr + 1) % NUM_SLOTS;
6507 }
6508 template = best_template[type[0]][type[1]][type[2]];
6509 }
6510
542d6675 6511 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6512 for (i = 0; i < 3; ++i)
6513 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6514
6515 f = frag_more (16);
6516
5a9ff93d
JW		 6517 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6518 from the start of the frag. */
6519 addr_mod = frag_now_fix () & 15;
6520 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6521 as_bad (_("instruction address is not a multiple of 16"));
6522 frag_now->insn_addr = addr_mod;
6523 frag_now->has_code = 1;
6524
542d6675 6525 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6526 curr = first;
6527 idesc = md.slot[curr].idesc;
6528 end_of_insn_group = 0;
9b505842 6529 last_slot = -1;
800eeca4
JW		 6530 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6531 {
d6e78c11
JW		 6532 /* If we have unwind records, we may need to update some now. */
6533 ptr = md.slot[curr].unwind_record;
6534 if (ptr)
6535 {
6536 /* Find the last prologue/body record in the list for the current
6537 insn, and set the slot number for all records up to that point.
6538 This needs to be done now, because prologue/body records refer to
6539 the current point, not the point after the instruction has been
6540 issued. This matters because there may have been nops emitted
6541 meanwhile. Any non-prologue non-body record followed by a
6542 prologue/body record must also refer to the current point. */
6543 last_ptr = NULL;
6544 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6545 for (; ptr != end_ptr; ptr = ptr->next)
6546 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6547 || ptr->r.type == body)
6548 last_ptr = ptr;
6549 if (last_ptr)
6550 {
6551 /* Make last_ptr point one after the last prologue/body
6552 record. */
6553 last_ptr = last_ptr->next;
6554 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6555 ptr = ptr->next)
6556 {
6557 ptr->slot_number = (unsigned long) f + i;
6558 ptr->slot_frag = frag_now;
6559 }
6560 /* Remove the initialized records, so that we won't accidentally
6561 update them again if we insert a nop and continue. */
6562 md.slot[curr].unwind_record = last_ptr;
6563 }
6564 }
e0c9811a 6565
f4660e2c
JB		 6566 manual_bundling_off = md.slot[curr].manual_bundling_off;
6567 if (md.slot[curr].manual_bundling_on)
800eeca4 6568 {
f4660e2c
JB		 6569 if (curr == first)
6570 manual_bundling = 1;
800eeca4 6571 else
f4660e2c
JB		 6572 break; /* Need to start a new bundle. */
6573 }
6574
744b6414
JW		 6575 /* If this instruction specifies a template, then it must be the first
6576 instruction of a bundle. */
6577 if (curr != first && md.slot[curr].user_template >= 0)
6578 break;
6579
f4660e2c
JB		 6580 if (idesc->flags & IA64_OPCODE_SLOT2)
6581 {
6582 if (manual_bundling && !manual_bundling_off)
6583 {
6584 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6585 "`%s' must be last in bundle", idesc->name);
6586 if (i < 2)
6587 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6588 }
6589 i = 2;
800eeca4
JW		 6590 }
6591 if (idesc->flags & IA64_OPCODE_LAST)
6592 {
2434f565
JW		 6593 int required_slot;
6594 unsigned int required_template;
800eeca4
JW		 6595
6596 /* If we need a stop bit after an M slot, our only choice is
6597 template 5 (M;;MI). If we need a stop bit after a B
6598 slot, our only choice is to place it at the end of the
6599 bundle, because the only available templates are MIB,
6600 MBB, BBB, MMB, and MFB. We don't handle anything other
6601 than M and B slots because these are the only kind of
6602 instructions that can have the IA64_OPCODE_LAST bit set. */
6603 required_template = template;
6604 switch (idesc->type)
6605 {
6606 case IA64_TYPE_M:
6607 required_slot = 0;
6608 required_template = 5;
6609 break;
6610
6611 case IA64_TYPE_B:
6612 required_slot = 2;
6613 break;
6614
6615 default:
6616 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6617 "Internal error: don't know how to force %s to end"
6618 "of instruction group", idesc->name);
6619 required_slot = i;
6620 break;
6621 }
f4660e2c
JB		 6622 if (manual_bundling
6623 && (i > required_slot
6624 || (required_slot == 2 && !manual_bundling_off)
6625 || (user_template >= 0
6626 /* Changing from MMI to M;MI is OK. */
6627 && (template ^ required_template) > 1)))
6628 {
6629 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6630 "`%s' must be last in instruction group",
6631 idesc->name);
6632 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6633 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6634 }
800eeca4
JW		 6635 if (required_slot < i)
6636 /* Can't fit this instruction. */
6637 break;
6638
6639 i = required_slot;
6640 if (required_template != template)
6641 {
6642 /* If we switch the template, we need to reset the NOPs
6643 after slot i. The slot-types of the instructions ahead
6644 of i never change, so we don't need to worry about
6645 changing NOPs in front of this slot. */
6646 for (j = i; j < 3; ++j)
6647 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6648 }
6649 template = required_template;
6650 }
6651 if (curr != first && md.slot[curr].label_fixups)
6652 {
f4660e2c
JB		 6653 if (manual_bundling)
6654 {
6655 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6656 "Label must be first in a bundle");
f4660e2c
JB		 6657 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6658 }
800eeca4
JW		 6659 /* This insn must go into the first slot of a bundle. */
6660 break;
6661 }
6662
800eeca4
JW		 6663 if (end_of_insn_group && md.num_slots_in_use >= 1)
6664 {
6665 /* We need an instruction group boundary in the middle of a
6666 bundle. See if we can switch to an other template with
6667 an appropriate boundary. */
6668
6669 orig_template = template;
6670 if (i == 1 && (user_template == 4
6671 || (user_template < 0
6672 && (ia64_templ_desc[template].exec_unit[0]
6673 == IA64_UNIT_M))))
6674 {
6675 template = 5;
6676 end_of_insn_group = 0;
6677 }
6678 else if (i == 2 && (user_template == 0
6679 || (user_template < 0
6680 && (ia64_templ_desc[template].exec_unit[1]
6681 == IA64_UNIT_I)))
6682 /* This test makes sure we don't switch the template if
6683 the next instruction is one that needs to be first in
6684 an instruction group. Since all those instructions are
6685 in the M group, there is no way such an instruction can
6686 fit in this bundle even if we switch the template. The
6687 reason we have to check for this is that otherwise we
6688 may end up generating "MI;;I M.." which has the deadly
6689 effect that the second M instruction is no longer the
f4660e2c 6690 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6691 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6692 {
6693 template = 1;
6694 end_of_insn_group = 0;
6695 }
f4660e2c
JB		 6696 else if (i == 1
6697 && user_template == 0
6698 && !(idesc->flags & IA64_OPCODE_FIRST))
6699 /* Use the next slot. */
6700 continue;
800eeca4
JW		 6701 else if (curr != first)
6702 /* can't fit this insn */
6703 break;
6704
6705 if (template != orig_template)
6706 /* if we switch the template, we need to reset the NOPs
6707 after slot i. The slot-types of the instructions ahead
6708 of i never change, so we don't need to worry about
6709 changing NOPs in front of this slot. */
6710 for (j = i; j < 3; ++j)
6711 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6712 }
6713 required_unit = ia64_templ_desc[template].exec_unit[i];
6714
c10d9d8f 6715 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6716 if (idesc->type == IA64_TYPE_DYN)
6717 {
97762d08
JB		 6718 enum ia64_opnd opnd1, opnd2;
6719
800eeca4
JW		 6720 if ((strcmp (idesc->name, "nop") == 0)
6721 || (strcmp (idesc->name, "break") == 0))
6722 insn_unit = required_unit;
91d777ee
L		 6723 else if (strcmp (idesc->name, "hint") == 0)
6724 {
6725 insn_unit = required_unit;
6726 if (required_unit == IA64_UNIT_B)
6727 {
6728 switch (md.hint_b)
6729 {
6730 case hint_b_ok:
6731 break;
6732 case hint_b_warning:
6733 as_warn ("hint in B unit may be treated as nop");
6734 break;
6735 case hint_b_error:
6736 /* When manual bundling is off and there is no
6737 user template, we choose a different unit so
6738 that hint won't go into the current slot. We
6739 will fill the current bundle with nops and
6740 try to put hint into the next bundle. */
6741 if (!manual_bundling && user_template < 0)
6742 insn_unit = IA64_UNIT_I;
6743 else
6744 as_bad ("hint in B unit can't be used");
6745 break;
6746 }
6747 }
6748 }
97762d08
JB		 6749 else if (strcmp (idesc->name, "chk.s") == 0
6750 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6751 {
6752 insn_unit = IA64_UNIT_M;
97762d08
JB		 6753 if (required_unit == IA64_UNIT_I
6754 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6755 insn_unit = IA64_UNIT_I;
6756 }
6757 else
6758 as_fatal ("emit_one_bundle: unexpected dynamic op");
6759
09124b3f 6760 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6761 opnd1 = idesc->operands[0];
6762 opnd2 = idesc->operands[1];
3d56ab85 6763 ia64_free_opcode (idesc);
97762d08
JB		 6764 idesc = ia64_find_opcode (mnemonic);
6765 /* moves to/from ARs have collisions */
6766 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6767 {
6768 while (idesc != NULL
6769 && (idesc->operands[0] != opnd1
6770 || idesc->operands[1] != opnd2))
6771 idesc = get_next_opcode (idesc);
6772 }
97762d08 6773 md.slot[curr].idesc = idesc;
800eeca4
JW		 6774 }
6775 else
6776 {
6777 insn_type = idesc->type;
6778 insn_unit = IA64_UNIT_NIL;
6779 switch (insn_type)
6780 {
6781 case IA64_TYPE_A:
6782 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6783 insn_unit = required_unit;
6784 break;
542d6675 6785 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6786 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6787 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6788 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6789 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6790 default: break;
6791 }
6792 }
6793
6794 if (insn_unit != required_unit)
9b505842 6795 continue; /* Try next slot. */
800eeca4 6796
196e8040
JW		 6797 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6798 {
6799 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 6800
196e8040
JW		 6801 md.slot[curr].loc_directive_seen = 0;
6802 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6803 }
800eeca4
JW		 6804
6805 build_insn (md.slot + curr, insn + i);
6806
d6e78c11
JW		 6807 ptr = md.slot[curr].unwind_record;
6808 if (ptr)
6809 {
6810 /* Set slot numbers for all remaining unwind records belonging to the
6811 current insn. There can not be any prologue/body unwind records
6812 here. */
6813 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6814 for (; ptr != end_ptr; ptr = ptr->next)
6815 {
6816 ptr->slot_number = (unsigned long) f + i;
6817 ptr->slot_frag = frag_now;
6818 }
6819 md.slot[curr].unwind_record = NULL;
6820 }
10850f29 6821
800eeca4
JW		 6822 if (required_unit == IA64_UNIT_L)
6823 {
6824 know (i == 1);
6825 /* skip one slot for long/X-unit instructions */
6826 ++i;
6827 }
6828 --md.num_slots_in_use;
9b505842 6829 last_slot = i;
800eeca4 6830
542d6675 6831 /* now is a good time to fix up the labels for this insn: */
800eeca4
JW		 6832 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6833 {
6834 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6835 symbol_set_frag (lfix->sym, frag_now);
6836 }
f1bcba5b
JW		 6837 /* and fix up the tags also. */
6838 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6839 {
6840 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6841 symbol_set_frag (lfix->sym, frag_now);
6842 }
800eeca4
JW		 6843
6844 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6845 {
6846 ifix = md.slot[curr].fixup + j;
5a080f89 6847 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 6848 &ifix->expr, ifix->is_pcrel, ifix->code);
6849 fix->tc_fix_data.opnd = ifix->opnd;
6850 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6851 fix->fx_file = md.slot[curr].src_file;
6852 fix->fx_line = md.slot[curr].src_line;
6853 }
6854
6855 end_of_insn_group = md.slot[curr].end_of_insn_group;
6856
542d6675 6857 /* clear slot: */
800eeca4
JW		 6858 ia64_free_opcode (md.slot[curr].idesc);
6859 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6860 md.slot[curr].user_template = -1;
6861
6862 if (manual_bundling_off)
6863 {
6864 manual_bundling = 0;
6865 break;
6866 }
6867 curr = (curr + 1) % NUM_SLOTS;
6868 idesc = md.slot[curr].idesc;
6869 }
f4660e2c 6870 if (manual_bundling > 0)
800eeca4
JW		 6871 {
6872 if (md.num_slots_in_use > 0)
ac025970 6873 {
9b505842
JB		 6874 if (last_slot >= 2)
6875 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6876 "`%s' does not fit into bundle", idesc->name);
6877 else if (last_slot < 0)
6878 {
6879 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6880 "`%s' does not fit into %s template",
6881 idesc->name, ia64_templ_desc[template].name);
6882 /* Drop first insn so we don't livelock. */
6883 --md.num_slots_in_use;
6884 know (curr == first);
6885 ia64_free_opcode (md.slot[curr].idesc);
6886 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6887 md.slot[curr].user_template = -1;
6888 }
6889 else
6890 {
6891 const char *where;
6892
6893 if (template == 2)
6894 where = "X slot";
6895 else if (last_slot == 0)
6896 where = "slots 2 or 3";
6897 else
6898 where = "slot 3";
6899 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6900 "`%s' can't go in %s of %s template",
6901 idesc->name, where, ia64_templ_desc[template].name);
6902 }
ac025970 6903 }
800eeca4
JW		 6904 else
6905 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6906 "Missing '}' at end of file");
6907 }
6908 know (md.num_slots_in_use < NUM_SLOTS);
6909
6910 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6911 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6912
44f5c83a
JW		 6913 number_to_chars_littleendian (f + 0, t0, 8);
6914 number_to_chars_littleendian (f + 8, t1, 8);
f5a30c2e 6915
73f20958
L		 6916 if (unwind.list)
6917 {
127cab00
L		 6918 unwind.list->next_slot_number = (unsigned long) f + 16;
6919 unwind.list->next_slot_frag = frag_now;
73f20958 6920 }
800eeca4
JW		 6921}
6922
6923int
6924md_parse_option (c, arg)
6925 int c;
6926 char *arg;
6927{
7463c317 6928
800eeca4
JW		 6929 switch (c)
6930 {
c43c2cc5 6931 /* Switches from the Intel assembler. */
44f5c83a 6932 case 'm':
800eeca4
JW		 6933 if (strcmp (arg, "ilp64") == 0
6934 || strcmp (arg, "lp64") == 0
6935 || strcmp (arg, "p64") == 0)
6936 {
6937 md.flags |= EF_IA_64_ABI64;
6938 }
6939 else if (strcmp (arg, "ilp32") == 0)
6940 {
6941 md.flags &= ~EF_IA_64_ABI64;
6942 }
6943 else if (strcmp (arg, "le") == 0)
6944 {
6945 md.flags &= ~EF_IA_64_BE;
549f748d 6946 default_big_endian = 0;
800eeca4
JW		 6947 }
6948 else if (strcmp (arg, "be") == 0)
6949 {
6950 md.flags |= EF_IA_64_BE;
549f748d 6951 default_big_endian = 1;
800eeca4 6952 }
970d6792
L		 6953 else if (strncmp (arg, "unwind-check=", 13) == 0)
6954 {
6955 arg += 13;
6956 if (strcmp (arg, "warning") == 0)
6957 md.unwind_check = unwind_check_warning;
6958 else if (strcmp (arg, "error") == 0)
6959 md.unwind_check = unwind_check_error;
6960 else
6961 return 0;
6962 }
91d777ee
L		 6963 else if (strncmp (arg, "hint.b=", 7) == 0)
6964 {
6965 arg += 7;
6966 if (strcmp (arg, "ok") == 0)
6967 md.hint_b = hint_b_ok;
6968 else if (strcmp (arg, "warning") == 0)
6969 md.hint_b = hint_b_warning;
6970 else if (strcmp (arg, "error") == 0)
6971 md.hint_b = hint_b_error;
6972 else
6973 return 0;
6974 }
8c2fda1d
L		 6975 else if (strncmp (arg, "tune=", 5) == 0)
6976 {
6977 arg += 5;
6978 if (strcmp (arg, "itanium1") == 0)
6979 md.tune = itanium1;
6980 else if (strcmp (arg, "itanium2") == 0)
6981 md.tune = itanium2;
6982 else
6983 return 0;
6984 }
800eeca4
JW		 6985 else
6986 return 0;
6987 break;
6988
6989 case 'N':
6990 if (strcmp (arg, "so") == 0)
6991 {
542d6675 6992 /* Suppress signon message. */
800eeca4
JW		 6993 }
6994 else if (strcmp (arg, "pi") == 0)
6995 {
6996 /* Reject privileged instructions. FIXME */
6997 }
6998 else if (strcmp (arg, "us") == 0)
6999 {
7000 /* Allow union of signed and unsigned range. FIXME */
7001 }
7002 else if (strcmp (arg, "close_fcalls") == 0)
7003 {
7004 /* Do not resolve global function calls. */
7005 }
7006 else
7007 return 0;
7008 break;
7009
7010 case 'C':
7011 /* temp[="prefix"] Insert temporary labels into the object file
7012 symbol table prefixed by "prefix".
7013 Default prefix is ":temp:".
7014 */
7015 break;
7016
7017 case 'a':
800eeca4
JW		 7018 /* indirect=<tgt> Assume unannotated indirect branches behavior
7019 according to <tgt> --
7020 exit: branch out from the current context (default)
7021 labels: all labels in context may be branch targets
7022 */
85b40035
L		 7023 if (strncmp (arg, "indirect=", 9) != 0)
7024 return 0;
800eeca4
JW		 7025 break;
7026
7027 case 'x':
7028 /* -X conflicts with an ignored option, use -x instead */
7029 md.detect_dv = 1;
7030 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 7031 {
7032 /* set default mode to explicit */
7033 md.default_explicit_mode = 1;
7034 break;
7035 }
800eeca4 7036 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 7037 {
7038 md.default_explicit_mode = 0;
7039 }
f1dab70d
JB		 7040 else if (strcmp (arg, "none") == 0)
7041 {
7042 md.detect_dv = 0;
7043 }
800eeca4 7044 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 7045 {
7046 md.debug_dv = 1;
7047 }
800eeca4 7048 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 7049 {
7050 md.default_explicit_mode = 1;
7051 md.debug_dv = 1;
7052 }
f1dab70d
JB		 7053 else if (strcmp (arg, "debugn") == 0)
7054 {
7055 md.debug_dv = 1;
7056 md.detect_dv = 0;
7057 }
800eeca4 7058 else
542d6675
KH		 7059 {
7060 as_bad (_("Unrecognized option '-x%s'"), arg);
7061 }
800eeca4
JW		 7062 break;
7063
7064 case 'S':
7065 /* nops Print nops statistics. */
7066 break;
7067
c43c2cc5
JW		 7068 /* GNU specific switches for gcc. */
7069 case OPTION_MCONSTANT_GP:
7070 md.flags |= EF_IA_64_CONS_GP;
7071 break;
7072
7073 case OPTION_MAUTO_PIC:
7074 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7075 break;
7076
800eeca4
JW		 7077 default:
7078 return 0;
7079 }
7080
7081 return 1;
7082}
7083
7084void
7085md_show_usage (stream)
7086 FILE *stream;
7087{
542d6675 7088 fputs (_("\
800eeca4 7089IA-64 options:\n\
6290819d
NC		 7090 --mconstant-gp mark output file as using the constant-GP model\n\
7091 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7092 --mauto-pic mark output file as using the constant-GP model\n\
7093 without function descriptors (sets ELF header flag\n\
7094 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 7095 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7096 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
8c2fda1d
L		 7097 -mtune=[itanium1|itanium2]\n\
7098 tune for a specific CPU (default -mtune=itanium2)\n\
970d6792
L		 7099 -munwind-check=[warning|error]\n\
7100 unwind directive check (default -munwind-check=warning)\n\
91d777ee
L		 7101 -mhint.b=[ok|warning|error]\n\
7102 hint.b check (default -mhint.b=error)\n\
f1dab70d
JB		 7103 -x | -xexplicit turn on dependency violation checking\n\
7104 -xauto automagically remove dependency violations (default)\n\
7105 -xnone turn off dependency violation checking\n\
7106 -xdebug debug dependency violation checker\n\
7107 -xdebugn debug dependency violation checker but turn off\n\
7108 dependency violation checking\n\
7109 -xdebugx debug dependency violation checker and turn on\n\
7110 dependency violation checking\n"),
800eeca4
JW		 7111 stream);
7112}
7113
acebd4ce
AS		 7114void
7115ia64_after_parse_args ()
7116{
7117 if (debug_type == DEBUG_STABS)
7118 as_fatal (_("--gstabs is not supported for ia64"));
7119}
7120
44576e1f
RH		 7121/* Return true if TYPE fits in TEMPL at SLOT. */
7122
7123static int
800eeca4
JW		 7124match (int templ, int type, int slot)
7125{
7126 enum ia64_unit unit;
7127 int result;
7128
7129 unit = ia64_templ_desc[templ].exec_unit[slot];
7130 switch (type)
7131 {
7132 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7133 case IA64_TYPE_A:
7134 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7135 break;
7136 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7137 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7138 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7139 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7140 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7141 default: result = 0; break;
7142 }
7143 return result;
7144}
7145
44576e1f
RH		 7146/* Add a bit of extra goodness if a nop of type F or B would fit
7147 in TEMPL at SLOT. */
7148
7149static inline int
7150extra_goodness (int templ, int slot)
7151{
8c2fda1d
L		 7152 switch (md.tune)
7153 {
7154 case itanium1:
7155 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7156 return 2;
7157 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7158 return 1;
7159 else
7160 return 0;
7161 break;
7162 case itanium2:
7163 if (match (templ, IA64_TYPE_M, slot)
7164 || match (templ, IA64_TYPE_I, slot))
7165 /* Favor M- and I-unit NOPs. We definitely want to avoid
7166 F-unit and B-unit may cause split-issue or less-than-optimal
7167 branch-prediction. */
7168 return 2;
7169 else
7170 return 0;
7171 break;
7172 default:
7173 abort ();
7174 return 0;
7175 }
44576e1f
RH		 7176}
7177
800eeca4
JW		 7178/* This function is called once, at assembler startup time. It sets
7179 up all the tables, etc. that the MD part of the assembler will need
7180 that can be determined before arguments are parsed. */
7181void
7182md_begin ()
7183{
44f5c83a 7184 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
800eeca4
JW		 7185 const char *err;
7186 char name[8];
7187
7188 md.auto_align = 1;
7189 md.explicit_mode = md.default_explicit_mode;
7190
7191 bfd_set_section_alignment (stdoutput, text_section, 4);
7192
0234cb7c 7193 /* Make sure function pointers get initialized. */
10a98291 7194 target_big_endian = -1;
549f748d 7195 dot_byteorder (default_big_endian);
10a98291 7196
35f5df7f
L		 7197 alias_hash = hash_new ();
7198 alias_name_hash = hash_new ();
7199 secalias_hash = hash_new ();
7200 secalias_name_hash = hash_new ();
7201
13ae64f3
JJ		 7202 pseudo_func[FUNC_DTP_MODULE].u.sym =
7203 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7204 &zero_address_frag);
7205
7206 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7207 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7208 &zero_address_frag);
7209
800eeca4 7210 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 7211 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7212 &zero_address_frag);
800eeca4
JW		 7213
7214 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 7215 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7216 &zero_address_frag);
800eeca4
JW		 7217
7218 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 7219 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7220 &zero_address_frag);
800eeca4 7221
fa2c7eff
RH		 7222 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7223 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7224 &zero_address_frag);
7225
c67e42c9 7226 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 7227 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7228 &zero_address_frag);
c67e42c9 7229
800eeca4 7230 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 7231 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7232 &zero_address_frag);
800eeca4
JW		 7233
7234 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 7235 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7236 &zero_address_frag);
800eeca4
JW		 7237
7238 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 7239 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7240 &zero_address_frag);
800eeca4 7241
13ae64f3
JJ		 7242 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7243 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7244 &zero_address_frag);
7245
800eeca4 7246 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 7247 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7248 &zero_address_frag);
800eeca4
JW		 7249
7250 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 7251 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7252 &zero_address_frag);
800eeca4 7253
13ae64f3
JJ		 7254 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7255 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7256 &zero_address_frag);
7257
7258 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7259 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7260 &zero_address_frag);
7261
7262 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7263 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7264 &zero_address_frag);
7265
3969b680
RH		 7266 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7267 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7268 &zero_address_frag);
7269
f6fe78d6
JW		 7270 if (md.tune != itanium1)
7271 {
7272 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7273 le_nop[0] = 0x8;
7274 le_nop_stop[0] = 0x9;
7275 }
7276
197865e8 7277 /* Compute the table of best templates. We compute goodness as a
8c2fda1d
L		 7278 base 4 value, in which each match counts for 3. Match-failures
7279 result in NOPs and we use extra_goodness() to pick the execution
7280 units that are best suited for issuing the NOP. */
800eeca4
JW		 7281 for (i = 0; i < IA64_NUM_TYPES; ++i)
7282 for (j = 0; j < IA64_NUM_TYPES; ++j)
7283 for (k = 0; k < IA64_NUM_TYPES; ++k)
7284 {
7285 best = 0;
7286 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7287 {
7288 goodness = 0;
7289 if (match (t, i, 0))
7290 {
7291 if (match (t, j, 1))
7292 {
7293 if (match (t, k, 2))
44576e1f 7294 goodness = 3 + 3 + 3;
800eeca4 7295 else
44576e1f 7296 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 7297 }
7298 else if (match (t, j, 2))
44576e1f 7299 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 7300 else
44576e1f
RH		 7301 {
7302 goodness = 3;
7303 goodness += extra_goodness (t, 1);
7304 goodness += extra_goodness (t, 2);
7305 }
800eeca4
JW		 7306 }
7307 else if (match (t, i, 1))
7308 {
7309 if (match (t, j, 2))
44576e1f 7310 goodness = 3 + 3;
800eeca4 7311 else
44576e1f 7312 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 7313 }
7314 else if (match (t, i, 2))
44576e1f 7315 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 7316
7317 if (goodness > best)
7318 {
7319 best = goodness;
7320 best_template[i][j][k] = t;
7321 }
7322 }
7323 }
7324
7325 for (i = 0; i < NUM_SLOTS; ++i)
7326 md.slot[i].user_template = -1;
7327
7328 md.pseudo_hash = hash_new ();
7329 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7330 {
7331 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7332 (void *) (pseudo_opcode + i));
7333 if (err)
7334 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7335 pseudo_opcode[i].name, err);
7336 }
7337
7338 md.reg_hash = hash_new ();
7339 md.dynreg_hash = hash_new ();
7340 md.const_hash = hash_new ();
7341 md.entry_hash = hash_new ();
7342
542d6675 7343 /* general registers: */
800eeca4
JW		 7344
7345 total = 128;
7346 for (i = 0; i < total; ++i)
7347 {
7348 sprintf (name, "r%d", i - REG_GR);
7349 md.regsym[i] = declare_register (name, i);
7350 }
7351
542d6675 7352 /* floating point registers: */
800eeca4
JW		 7353 total += 128;
7354 for (; i < total; ++i)
7355 {
7356 sprintf (name, "f%d", i - REG_FR);
7357 md.regsym[i] = declare_register (name, i);
7358 }
7359
542d6675 7360 /* application registers: */
800eeca4
JW		 7361 total += 128;
7362 ar_base = i;
7363 for (; i < total; ++i)
7364 {
7365 sprintf (name, "ar%d", i - REG_AR);
7366 md.regsym[i] = declare_register (name, i);
7367 }
7368
542d6675 7369 /* control registers: */
800eeca4
JW		 7370 total += 128;
7371 cr_base = i;
7372 for (; i < total; ++i)
7373 {
7374 sprintf (name, "cr%d", i - REG_CR);
7375 md.regsym[i] = declare_register (name, i);
7376 }
7377
542d6675 7378 /* predicate registers: */
800eeca4
JW		 7379 total += 64;
7380 for (; i < total; ++i)
7381 {
7382 sprintf (name, "p%d", i - REG_P);
7383 md.regsym[i] = declare_register (name, i);
7384 }
7385
542d6675 7386 /* branch registers: */
800eeca4
JW		 7387 total += 8;
7388 for (; i < total; ++i)
7389 {
7390 sprintf (name, "b%d", i - REG_BR);
7391 md.regsym[i] = declare_register (name, i);
7392 }
7393
7394 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7395 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7396 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7397 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7398 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7399 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7400 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7401
7402 for (i = 0; i < NELEMS (indirect_reg); ++i)
7403 {
7404 regnum = indirect_reg[i].regnum;
7405 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7406 }
7407
542d6675 7408 /* define synonyms for application registers: */
800eeca4
JW		 7409 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7410 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7411 REG_AR + ar[i - REG_AR].regnum);
7412
542d6675 7413 /* define synonyms for control registers: */
800eeca4
JW		 7414 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7415 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7416 REG_CR + cr[i - REG_CR].regnum);
7417
7418 declare_register ("gp", REG_GR + 1);
7419 declare_register ("sp", REG_GR + 12);
7420 declare_register ("rp", REG_BR + 0);
7421
542d6675 7422 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7423 declare_register ("psp", REG_PSP);
7424
800eeca4
JW		 7425 declare_register_set ("ret", 4, REG_GR + 8);
7426 declare_register_set ("farg", 8, REG_FR + 8);
7427 declare_register_set ("fret", 8, REG_FR + 8);
7428
7429 for (i = 0; i < NELEMS (const_bits); ++i)
7430 {
7431 err = hash_insert (md.const_hash, const_bits[i].name,
7432 (PTR) (const_bits + i));
7433 if (err)
7434 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7435 name, err);
7436 }
7437
44f5c83a
JW		 7438 /* Set the architecture and machine depending on defaults and command line
7439 options. */
7440 if (md.flags & EF_IA_64_ABI64)
7441 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7442 else
7443 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7444
7445 if (! ok)
7446 as_warn (_("Could not set architecture and machine"));
800eeca4 7447
557debba
JW		 7448 /* Set the pointer size and pointer shift size depending on md.flags */
7449
7450 if (md.flags & EF_IA_64_ABI64)
7451 {
7452 md.pointer_size = 8; /* pointers are 8 bytes */
7453 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7454 }
7455 else
7456 {
7457 md.pointer_size = 4; /* pointers are 4 bytes */
7458 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7459 }
7460
800eeca4
JW		 7461 md.mem_offset.hint = 0;
7462 md.path = 0;
7463 md.maxpaths = 0;
7464 md.entry_labels = NULL;
7465}
7466
970d6792
L		 7467/* Set the default options in md. Cannot do this in md_begin because
7468 that is called after md_parse_option which is where we set the
7469 options in md based on command line options. */
44f5c83a
JW		 7470
7471void
7472ia64_init (argc, argv)
2434f565
JW		 7473 int argc ATTRIBUTE_UNUSED;
7474 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7475{
1cd8ff38 7476 md.flags = MD_FLAGS_DEFAULT;
f1dab70d 7477 md.detect_dv = 1;
970d6792
L		 7478 /* FIXME: We should change it to unwind_check_error someday. */
7479 md.unwind_check = unwind_check_warning;
91d777ee 7480 md.hint_b = hint_b_error;
8c2fda1d 7481 md.tune = itanium2;
44f5c83a
JW		 7482}
7483
7484/* Return a string for the target object file format. */
7485
7486const char *
7487ia64_target_format ()
7488{
7489 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7490 {
72a76794
JW		 7491 if (md.flags & EF_IA_64_BE)
7492 {
7493 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7494#if defined(TE_AIX50)
7463c317 7495 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7496#elif defined(TE_HPUX)
7497 return "elf64-ia64-hpux-big";
7463c317 7498#else
72a76794 7499 return "elf64-ia64-big";
7463c317 7500#endif
72a76794 7501 else
1cd8ff38 7502#if defined(TE_AIX50)
7463c317 7503 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7504#elif defined(TE_HPUX)
7505 return "elf32-ia64-hpux-big";
7463c317 7506#else
72a76794 7507 return "elf32-ia64-big";
7463c317 7508#endif
72a76794 7509 }
44f5c83a 7510 else
72a76794
JW		 7511 {
7512 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7513#ifdef TE_AIX50
7514 return "elf64-ia64-aix-little";
7515#else
72a76794 7516 return "elf64-ia64-little";
7463c317 7517#endif
72a76794 7518 else
7463c317
TW		 7519#ifdef TE_AIX50
7520 return "elf32-ia64-aix-little";
7521#else
72a76794 7522 return "elf32-ia64-little";
7463c317 7523#endif
72a76794 7524 }
44f5c83a
JW		 7525 }
7526 else
7527 return "unknown-format";
7528}
7529
800eeca4
JW		 7530void
7531ia64_end_of_source ()
7532{
542d6675 7533 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7534 insn_group_break (1, 0, 0);
7535
542d6675 7536 /* emits slots we haven't written yet: */
800eeca4
JW		 7537 ia64_flush_insns ();
7538
7539 bfd_set_private_flags (stdoutput, md.flags);
7540
800eeca4
JW		 7541 md.mem_offset.hint = 0;
7542}
7543
7544void
7545ia64_start_line ()
7546{
f1bcba5b
JW		 7547 if (md.qp.X_op == O_register)
7548 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7549 md.qp.X_op = O_absent;
7550
7551 if (ignore_input ())
7552 return;
7553
7554 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7555 {
7556 if (md.detect_dv && !md.explicit_mode)
f1dab70d
JB		 7557 {
7558 static int warned;
7559
7560 if (!warned)
7561 {
7562 warned = 1;
7563 as_warn (_("Explicit stops are ignored in auto mode"));
7564 }
7565 }
800eeca4 7566 else
542d6675 7567 insn_group_break (1, 0, 0);
800eeca4
JW		 7568 }
7569}
7570
f1bcba5b
JW		 7571/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7572 labels. */
7573static int defining_tag = 0;
7574
800eeca4
JW		 7575int
7576ia64_unrecognized_line (ch)
7577 int ch;
7578{
7579 switch (ch)
7580 {
7581 case '(':
7582 expression (&md.qp);
7583 if (*input_line_pointer++ != ')')
7584 {
7585 as_bad ("Expected ')'");
7586 return 0;
7587 }
7588 if (md.qp.X_op != O_register)
7589 {
7590 as_bad ("Qualifying predicate expected");
7591 return 0;
7592 }
7593 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7594 {
7595 as_bad ("Predicate register expected");
7596 return 0;
7597 }
7598 return 1;
7599
7600 case '{':
7601 if (md.manual_bundling)
7602 as_warn ("Found '{' when manual bundling is already turned on");
7603 else
7604 CURR_SLOT.manual_bundling_on = 1;
7605 md.manual_bundling = 1;
7606
542d6675
KH		 7607 /* Bundling is only acceptable in explicit mode
7608 or when in default automatic mode. */
800eeca4 7609 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7610 {
7611 if (!md.mode_explicitly_set
7612 && !md.default_explicit_mode)
7613 dot_dv_mode ('E');
7614 else
7615 as_warn (_("Found '{' after explicit switch to automatic mode"));
7616 }
800eeca4
JW		 7617 return 1;
7618
7619 case '}':
7620 if (!md.manual_bundling)
7621 as_warn ("Found '}' when manual bundling is off");
7622 else
7623 PREV_SLOT.manual_bundling_off = 1;
7624 md.manual_bundling = 0;
7625
7626 /* switch back to automatic mode, if applicable */
197865e8 7627 if (md.detect_dv
542d6675
KH		 7628 && md.explicit_mode
7629 && !md.mode_explicitly_set
7630 && !md.default_explicit_mode)
7631 dot_dv_mode ('A');
800eeca4
JW		 7632
7633 /* Allow '{' to follow on the same line. We also allow ";;", but that
7634 happens automatically because ';' is an end of line marker. */
7635 SKIP_WHITESPACE ();
7636 if (input_line_pointer[0] == '{')
7637 {
7638 input_line_pointer++;
7639 return ia64_unrecognized_line ('{');
7640 }
7641
7642 demand_empty_rest_of_line ();
7643 return 1;
7644
f1bcba5b
JW		 7645 case '[':
7646 {
7647 char *s;
7648 char c;
7649 symbolS *tag;
4d5a53ff 7650 int temp;
f1bcba5b
JW		 7651
7652 if (md.qp.X_op == O_register)
7653 {
7654 as_bad ("Tag must come before qualifying predicate.");
7655 return 0;
7656 }
4d5a53ff
JW		 7657
7658 /* This implements just enough of read_a_source_file in read.c to
7659 recognize labels. */
7660 if (is_name_beginner (*input_line_pointer))
7661 {
7662 s = input_line_pointer;
7663 c = get_symbol_end ();
7664 }
7665 else if (LOCAL_LABELS_FB
3882b010 7666 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7667 {
7668 temp = 0;
3882b010 7669 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7670 temp = (temp * 10) + *input_line_pointer++ - '0';
7671 fb_label_instance_inc (temp);
7672 s = fb_label_name (temp, 0);
7673 c = *input_line_pointer;
7674 }
7675 else
7676 {
7677 s = NULL;
7678 c = '\0';
7679 }
f1bcba5b
JW		 7680 if (c != ':')
7681 {
7682 /* Put ':' back for error messages' sake. */
7683 *input_line_pointer++ = ':';
7684 as_bad ("Expected ':'");
7685 return 0;
7686 }
4d5a53ff 7687
f1bcba5b
JW		 7688 defining_tag = 1;
7689 tag = colon (s);
7690 defining_tag = 0;
7691 /* Put ':' back for error messages' sake. */
7692 *input_line_pointer++ = ':';
7693 if (*input_line_pointer++ != ']')
7694 {
7695 as_bad ("Expected ']'");
7696 return 0;
7697 }
7698 if (! tag)
7699 {
7700 as_bad ("Tag name expected");
7701 return 0;
7702 }
7703 return 1;
7704 }
7705
800eeca4
JW		 7706 default:
7707 break;
7708 }
542d6675
KH		 7709
7710 /* Not a valid line. */
7711 return 0;
800eeca4
JW		 7712}
7713
7714void
7715ia64_frob_label (sym)
7716 struct symbol *sym;
7717{
7718 struct label_fix *fix;
7719
f1bcba5b
JW		 7720 /* Tags need special handling since they are not bundle breaks like
7721 labels. */
7722 if (defining_tag)
7723 {
7724 fix = obstack_alloc (&notes, sizeof (*fix));
7725 fix->sym = sym;
7726 fix->next = CURR_SLOT.tag_fixups;
7727 CURR_SLOT.tag_fixups = fix;
7728
7729 return;
7730 }
7731
800eeca4
JW		 7732 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7733 {
7734 md.last_text_seg = now_seg;
7735 fix = obstack_alloc (&notes, sizeof (*fix));
7736 fix->sym = sym;
7737 fix->next = CURR_SLOT.label_fixups;
7738 CURR_SLOT.label_fixups = fix;
7739
542d6675 7740 /* Keep track of how many code entry points we've seen. */
800eeca4 7741 if (md.path == md.maxpaths)
542d6675
KH		 7742 {
7743 md.maxpaths += 20;
7744 md.entry_labels = (const char **)
7745 xrealloc ((void *) md.entry_labels,
7746 md.maxpaths * sizeof (char *));
7747 }
800eeca4
JW		 7748 md.entry_labels[md.path++] = S_GET_NAME (sym);
7749 }
7750}
7751
936cf02e
JW		 7752#ifdef TE_HPUX
7753/* The HP-UX linker will give unresolved symbol errors for symbols
7754 that are declared but unused. This routine removes declared,
7755 unused symbols from an object. */
7756int
7757ia64_frob_symbol (sym)
7758 struct symbol *sym;
7759{
7760 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7761 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7762 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7763 && ! S_IS_EXTERNAL (sym)))
7764 return 1;
7765 return 0;
7766}
7767#endif
7768
800eeca4
JW		 7769void
7770ia64_flush_pending_output ()
7771{
4d5a53ff
JW		 7772 if (!md.keep_pending_output
7773 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7774 {
7775 /* ??? This causes many unnecessary stop bits to be emitted.
7776 Unfortunately, it isn't clear if it is safe to remove this. */
7777 insn_group_break (1, 0, 0);
7778 ia64_flush_insns ();
7779 }
7780}
7781
7782/* Do ia64-specific expression optimization. All that's done here is
7783 to transform index expressions that are either due to the indexing
7784 of rotating registers or due to the indexing of indirect register
7785 sets. */
7786int
7787ia64_optimize_expr (l, op, r)
7788 expressionS *l;
7789 operatorT op;
7790 expressionS *r;
7791{
7792 unsigned num_regs;
7793
7794 if (op == O_index)
7795 {
7796 if (l->X_op == O_register && r->X_op == O_constant)
7797 {
7798 num_regs = (l->X_add_number >> 16);
7799 if ((unsigned) r->X_add_number >= num_regs)
7800 {
7801 if (!num_regs)
7802 as_bad ("No current frame");
7803 else
7804 as_bad ("Index out of range 0..%u", num_regs - 1);
7805 r->X_add_number = 0;
7806 }
7807 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7808 return 1;
7809 }
7810 else if (l->X_op == O_register && r->X_op == O_register)
7811 {
7812 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7813 || l->X_add_number == IND_MEM)
7814 {
7815 as_bad ("Indirect register set name expected");
7816 l->X_add_number = IND_CPUID;
7817 }
7818 l->X_op = O_index;
7819 l->X_op_symbol = md.regsym[l->X_add_number];
7820 l->X_add_number = r->X_add_number;
7821 return 1;
7822 }
7823 }
7824 return 0;
7825}
7826
7827int
16a48f83 7828ia64_parse_name (name, e, nextcharP)
800eeca4
JW		 7829 char *name;
7830 expressionS *e;
16a48f83 7831 char *nextcharP;
800eeca4
JW		 7832{
7833 struct const_desc *cdesc;
7834 struct dynreg *dr = 0;
16a48f83 7835 unsigned int idx;
800eeca4
JW		 7836 struct symbol *sym;
7837 char *end;
7838
16a48f83
JB		 7839 if (*name == '@')
7840 {
7841 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7842
7843 /* Find what relocation pseudo-function we're dealing with. */
7844 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7845 if (pseudo_func[idx].name
7846 && pseudo_func[idx].name[0] == name[1]
7847 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7848 {
7849 pseudo_type = pseudo_func[idx].type;
7850 break;
7851 }
7852 switch (pseudo_type)
7853 {
7854 case PSEUDO_FUNC_RELOC:
7855 end = input_line_pointer;
7856 if (*nextcharP != '(')
7857 {
7858 as_bad ("Expected '('");
2f6d622e 7859 break;
16a48f83
JB		 7860 }
7861 /* Skip '('. */
7862 ++input_line_pointer;
7863 expression (e);
7864 if (*input_line_pointer != ')')
7865 {
7866 as_bad ("Missing ')'");
7867 goto done;
7868 }
7869 /* Skip ')'. */
7870 ++input_line_pointer;
7871 if (e->X_op != O_symbol)
7872 {
7873 if (e->X_op != O_pseudo_fixup)
7874 {
7875 as_bad ("Not a symbolic expression");
7876 goto done;
7877 }
7878 if (idx != FUNC_LT_RELATIVE)
7879 {
7880 as_bad ("Illegal combination of relocation functions");
7881 goto done;
7882 }
7883 switch (S_GET_VALUE (e->X_op_symbol))
7884 {
7885 case FUNC_FPTR_RELATIVE:
7886 idx = FUNC_LT_FPTR_RELATIVE; break;
7887 case FUNC_DTP_MODULE:
7888 idx = FUNC_LT_DTP_MODULE; break;
7889 case FUNC_DTP_RELATIVE:
7890 idx = FUNC_LT_DTP_RELATIVE; break;
7891 case FUNC_TP_RELATIVE:
7892 idx = FUNC_LT_TP_RELATIVE; break;
7893 default:
7894 as_bad ("Illegal combination of relocation functions");
7895 goto done;
7896 }
7897 }
7898 /* Make sure gas doesn't get rid of local symbols that are used
7899 in relocs. */
7900 e->X_op = O_pseudo_fixup;
7901 e->X_op_symbol = pseudo_func[idx].u.sym;
2f6d622e
JB		 7902 done:
7903 *nextcharP = *input_line_pointer;
16a48f83
JB		 7904 break;
7905
7906 case PSEUDO_FUNC_CONST:
7907 e->X_op = O_constant;
7908 e->X_add_number = pseudo_func[idx].u.ival;
7909 break;
7910
7911 case PSEUDO_FUNC_REG:
7912 e->X_op = O_register;
7913 e->X_add_number = pseudo_func[idx].u.ival;
7914 break;
7915
7916 default:
7917 return 0;
7918 }
16a48f83
JB		 7919 return 1;
7920 }
7921
542d6675 7922 /* first see if NAME is a known register name: */
800eeca4
JW		 7923 sym = hash_find (md.reg_hash, name);
7924 if (sym)
7925 {
7926 e->X_op = O_register;
7927 e->X_add_number = S_GET_VALUE (sym);
7928 return 1;
7929 }
7930
7931 cdesc = hash_find (md.const_hash, name);
7932 if (cdesc)
7933 {
7934 e->X_op = O_constant;
7935 e->X_add_number = cdesc->value;
7936 return 1;
7937 }
7938
542d6675 7939 /* check for inN, locN, or outN: */
26b810ce 7940 idx = 0;
800eeca4
JW		 7941 switch (name[0])
7942 {
7943 case 'i':
3882b010 7944 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 7945 {
7946 dr = &md.in;
26b810ce 7947 idx = 2;
800eeca4
JW		 7948 }
7949 break;
7950
7951 case 'l':
3882b010 7952 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 7953 {
7954 dr = &md.loc;
26b810ce 7955 idx = 3;
800eeca4
JW		 7956 }
7957 break;
7958
7959 case 'o':
3882b010 7960 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 7961 {
7962 dr = &md.out;
26b810ce 7963 idx = 3;
800eeca4
JW		 7964 }
7965 break;
7966
7967 default:
7968 break;
7969 }
7970
26b810ce
JB		 7971 /* Ignore register numbers with leading zeroes, except zero itself. */
7972 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
800eeca4 7973 {
26b810ce
JB		 7974 unsigned long regnum;
7975
542d6675 7976 /* The name is inN, locN, or outN; parse the register number. */
26b810ce
JB		 7977 regnum = strtoul (name + idx, &end, 10);
7978 if (end > name + idx && *end == '\0' && regnum < 96)
800eeca4 7979 {
26b810ce 7980 if (regnum >= dr->num_regs)
800eeca4
JW		 7981 {
7982 if (!dr->num_regs)
7983 as_bad ("No current frame");
7984 else
542d6675
KH		 7985 as_bad ("Register number out of range 0..%u",
7986 dr->num_regs - 1);
800eeca4
JW		 7987 regnum = 0;
7988 }
7989 e->X_op = O_register;
7990 e->X_add_number = dr->base + regnum;
7991 return 1;
7992 }
7993 }
7994
20b36a95
JB		 7995 end = alloca (strlen (name) + 1);
7996 strcpy (end, name);
7997 name = ia64_canonicalize_symbol_name (end);
800eeca4
JW		 7998 if ((dr = hash_find (md.dynreg_hash, name)))
7999 {
8000 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 8001 Store the base register number in the low 16 bits of
8002 X_add_number and the size of the register set in the top 16
8003 bits. */
800eeca4
JW		 8004 e->X_op = O_register;
8005 e->X_add_number = dr->base | (dr->num_regs << 16);
8006 return 1;
8007 }
8008 return 0;
8009}
8010
8011/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8012
8013char *
8014ia64_canonicalize_symbol_name (name)
8015 char *name;
8016{
20b36a95
JB		 8017 size_t len = strlen (name), full = len;
8018
8019 while (len > 0 && name[len - 1] == '#')
8020 --len;
8021 if (len <= 0)
8022 {
8023 if (full > 0)
8024 as_bad ("Standalone `#' is illegal");
8025 else
8026 as_bad ("Zero-length symbol is illegal");
8027 }
8028 else if (len < full - 1)
8029 as_warn ("Redundant `#' suffix operators");
8030 name[len] = '\0';
800eeca4
JW		 8031 return name;
8032}
8033
3e37788f
JW		 8034/* Return true if idesc is a conditional branch instruction. This excludes
8035 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8036 because they always read/write resources regardless of the value of the
8037 qualifying predicate. br.ia must always use p0, and hence is always
8038 taken. Thus this function returns true for branches which can fall
8039 through, and which use no resources if they do fall through. */
1deb8127 8040
800eeca4
JW		 8041static int
8042is_conditional_branch (idesc)
542d6675 8043 struct ia64_opcode *idesc;
800eeca4 8044{
1deb8127 8045 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 8046 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8047 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 8048 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8049 && (idesc->name[2] == '\0'
3e37788f
JW		 8050 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8051 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8052 || idesc->name[2] == 'l'
8053 /* br.cond, br.call, br.clr */
8054 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8055 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8056 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 8057}
8058
8059/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 8060 returns zero. */
8061
800eeca4
JW		 8062static int
8063is_taken_branch (idesc)
542d6675 8064 struct ia64_opcode *idesc;
800eeca4
JW		 8065{
8066 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 8067 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 8068}
8069
8070/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 8071 doubt, returns zero. */
8072
800eeca4
JW		 8073static int
8074is_interruption_or_rfi (idesc)
542d6675 8075 struct ia64_opcode *idesc;
800eeca4
JW		 8076{
8077 if (strcmp (idesc->name, "rfi") == 0)
8078 return 1;
8079 return 0;
8080}
8081
8082/* Returns the index of the given dependency in the opcode's list of chks, or
8083 -1 if there is no dependency. */
542d6675 8084
800eeca4
JW		 8085static int
8086depends_on (depind, idesc)
542d6675
KH		 8087 int depind;
8088 struct ia64_opcode *idesc;
800eeca4
JW		 8089{
8090 int i;
8091 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 8092 for (i = 0; i < dep->nchks; i++)
800eeca4 8093 {
542d6675
KH		 8094 if (depind == DEP (dep->chks[i]))
8095 return i;
800eeca4
JW		 8096 }
8097 return -1;
8098}
8099
8100/* Determine a set of specific resources used for a particular resource
8101 class. Returns the number of specific resources identified For those
8102 cases which are not determinable statically, the resource returned is
197865e8 8103 marked nonspecific.
800eeca4
JW		 8104
8105 Meanings of value in 'NOTE':
8106 1) only read/write when the register number is explicitly encoded in the
8107 insn.
8108 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 8109 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 8110 3) general register value is used to specify an indirect register; not
8111 determinable statically.
8112 4) only read the given resource when bits 7:0 of the indirect index
8113 register value does not match the register number of the resource; not
8114 determinable statically.
8115 5) all rules are implementation specific.
8116 6) only when both the index specified by the reader and the index specified
8117 by the writer have the same value in bits 63:61; not determinable
197865e8 8118 statically.
800eeca4 8119 7) only access the specified resource when the corresponding mask bit is
197865e8 8120 set
800eeca4
JW		 8121 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8122 only read when these insns reference FR2-31
8123 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8124 written when these insns write FR32-127
8125 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8126 instruction
8127 11) The target predicates are written independently of PR[qp], but source
8128 registers are only read if PR[qp] is true. Since the state of PR[qp]
8129 cannot statically be determined, all source registers are marked used.
8130 12) This insn only reads the specified predicate register when that
8131 register is the PR[qp].
8132 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 8133 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 8134 14) The RSE resource includes the implementation-specific RSE internal
8135 state resources. At least one (and possibly more) of these resources are
8136 read by each instruction listed in IC:rse-readers. At least one (and
8137 possibly more) of these resources are written by each insn listed in
197865e8 8138 IC:rse-writers.
800eeca4 8139 15+16) Represents reserved instructions, which the assembler does not
197865e8 8140 generate.
800eeca4
JW		 8141
8142 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8143 this code; there are no dependency violations based on memory access.
800eeca4
JW		 8144*/
8145
8146#define MAX_SPECS 256
8147#define DV_CHK 1
8148#define DV_REG 0
8149
8150static int
8151specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 8152 const struct ia64_dependency *dep;
8153 struct ia64_opcode *idesc;
8154 int type; /* is this a DV chk or a DV reg? */
8155 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8156 int note; /* resource note for this insn's usage */
8157 int path; /* which execution path to examine */
800eeca4
JW		 8158{
8159 int count = 0;
8160 int i;
8161 int rsrc_write = 0;
8162 struct rsrc tmpl;
197865e8 8163
800eeca4
JW		 8164 if (dep->mode == IA64_DV_WAW
8165 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8166 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8167 rsrc_write = 1;
8168
8169 /* template for any resources we identify */
8170 tmpl.dependency = dep;
8171 tmpl.note = note;
8172 tmpl.insn_srlz = tmpl.data_srlz = 0;
8173 tmpl.qp_regno = CURR_SLOT.qp_regno;
8174 tmpl.link_to_qp_branch = 1;
8175 tmpl.mem_offset.hint = 0;
8176 tmpl.specific = 1;
a66d2bb7 8177 tmpl.index = -1;
7484b8e6 8178 tmpl.cmp_type = CMP_NONE;
800eeca4
JW		 8179
8180#define UNHANDLED \
8181as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8182dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8183#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8184
8185 /* we don't need to track these */
8186 if (dep->semantics == IA64_DVS_NONE)
8187 return 0;
8188
8189 switch (dep->specifier)
8190 {
8191 case IA64_RS_AR_K:
8192 if (note == 1)
542d6675
KH		 8193 {
8194 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8195 {
8196 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8197 if (regno >= 0 && regno <= 7)
8198 {
8199 specs[count] = tmpl;
8200 specs[count++].index = regno;
8201 }
8202 }
8203 }
800eeca4 8204 else if (note == 0)
542d6675
KH		 8205 {
8206 for (i = 0; i < 8; i++)
8207 {
8208 specs[count] = tmpl;
8209 specs[count++].index = i;
8210 }
8211 }
800eeca4 8212 else
542d6675
KH		 8213 {
8214 UNHANDLED;
8215 }
800eeca4
JW		 8216 break;
8217
8218 case IA64_RS_AR_UNAT:
8219 /* This is a mov =AR or mov AR= instruction. */
8220 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8221 {
8222 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8223 if (regno == AR_UNAT)
8224 {
8225 specs[count++] = tmpl;
8226 }
8227 }
8228 else
8229 {
8230 /* This is a spill/fill, or other instruction that modifies the
8231 unat register. */
8232
8233 /* Unless we can determine the specific bits used, mark the whole
8234 thing; bits 8:3 of the memory address indicate the bit used in
8235 UNAT. The .mem.offset hint may be used to eliminate a small
8236 subset of conflicts. */
8237 specs[count] = tmpl;
8238 if (md.mem_offset.hint)
8239 {
542d6675
KH		 8240 if (md.debug_dv)
8241 fprintf (stderr, " Using hint for spill/fill\n");
8242 /* The index isn't actually used, just set it to something
8243 approximating the bit index. */
800eeca4
JW		 8244 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8245 specs[count].mem_offset.hint = 1;
8246 specs[count].mem_offset.offset = md.mem_offset.offset;
8247 specs[count++].mem_offset.base = md.mem_offset.base;
8248 }
8249 else
8250 {
8251 specs[count++].specific = 0;
8252 }
8253 }
8254 break;
8255
8256 case IA64_RS_AR:
8257 if (note == 1)
542d6675
KH		 8258 {
8259 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8260 {
8261 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8262 if ((regno >= 8 && regno <= 15)
8263 || (regno >= 20 && regno <= 23)
8264 || (regno >= 31 && regno <= 39)
8265 || (regno >= 41 && regno <= 47)
8266 || (regno >= 67 && regno <= 111))
8267 {
8268 specs[count] = tmpl;
8269 specs[count++].index = regno;
8270 }
8271 }
8272 }
800eeca4 8273 else
542d6675
KH		 8274 {
8275 UNHANDLED;
8276 }
800eeca4
JW		 8277 break;
8278
8279 case IA64_RS_ARb:
8280 if (note == 1)
542d6675
KH		 8281 {
8282 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8283 {
8284 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8285 if ((regno >= 48 && regno <= 63)
8286 || (regno >= 112 && regno <= 127))
8287 {
8288 specs[count] = tmpl;
8289 specs[count++].index = regno;
8290 }
8291 }
8292 }
800eeca4 8293 else if (note == 0)
542d6675
KH		 8294 {
8295 for (i = 48; i < 64; i++)
8296 {
8297 specs[count] = tmpl;
8298 specs[count++].index = i;
8299 }
8300 for (i = 112; i < 128; i++)
8301 {
8302 specs[count] = tmpl;
8303 specs[count++].index = i;
8304 }
8305 }
197865e8 8306 else
542d6675
KH		 8307 {
8308 UNHANDLED;
8309 }
800eeca4
JW		 8310 break;
8311
8312 case IA64_RS_BR:
8313 if (note != 1)
542d6675
KH		 8314 {
8315 UNHANDLED;
8316 }
800eeca4 8317 else
542d6675
KH		 8318 {
8319 if (rsrc_write)
8320 {
8321 for (i = 0; i < idesc->num_outputs; i++)
8322 if (idesc->operands[i] == IA64_OPND_B1
8323 || idesc->operands[i] == IA64_OPND_B2)
8324 {
8325 specs[count] = tmpl;
8326 specs[count++].index =
8327 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8328 }
8329 }
8330 else
8331 {
40449e9f 8332 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 8333 if (idesc->operands[i] == IA64_OPND_B1
8334 || idesc->operands[i] == IA64_OPND_B2)
8335 {
8336 specs[count] = tmpl;
8337 specs[count++].index =
8338 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8339 }
8340 }
8341 }
800eeca4
JW		 8342 break;
8343
8344 case IA64_RS_CPUID: /* four or more registers */
8345 if (note == 3)
542d6675
KH		 8346 {
8347 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8348 {
8349 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8350 if (regno >= 0 && regno < NELEMS (gr_values)
8351 && KNOWN (regno))
8352 {
8353 specs[count] = tmpl;
8354 specs[count++].index = gr_values[regno].value & 0xFF;
8355 }
8356 else
8357 {
8358 specs[count] = tmpl;
8359 specs[count++].specific = 0;
8360 }
8361 }
8362 }
800eeca4 8363 else
542d6675
KH		 8364 {
8365 UNHANDLED;
8366 }
800eeca4
JW		 8367 break;
8368
8369 case IA64_RS_DBR: /* four or more registers */
8370 if (note == 3)
542d6675
KH		 8371 {
8372 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8373 {
8374 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8375 if (regno >= 0 && regno < NELEMS (gr_values)
8376 && KNOWN (regno))
8377 {
8378 specs[count] = tmpl;
8379 specs[count++].index = gr_values[regno].value & 0xFF;
8380 }
8381 else
8382 {
8383 specs[count] = tmpl;
8384 specs[count++].specific = 0;
8385 }
8386 }
8387 }
800eeca4 8388 else if (note == 0 && !rsrc_write)
542d6675
KH		 8389 {
8390 specs[count] = tmpl;
8391 specs[count++].specific = 0;
8392 }
800eeca4 8393 else
542d6675
KH		 8394 {
8395 UNHANDLED;
8396 }
800eeca4
JW		 8397 break;
8398
8399 case IA64_RS_IBR: /* four or more registers */
8400 if (note == 3)
542d6675
KH		 8401 {
8402 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8403 {
8404 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8405 if (regno >= 0 && regno < NELEMS (gr_values)
8406 && KNOWN (regno))
8407 {
8408 specs[count] = tmpl;
8409 specs[count++].index = gr_values[regno].value & 0xFF;
8410 }
8411 else
8412 {
8413 specs[count] = tmpl;
8414 specs[count++].specific = 0;
8415 }
8416 }
8417 }
800eeca4 8418 else
542d6675
KH		 8419 {
8420 UNHANDLED;
8421 }
800eeca4
JW		 8422 break;
8423
8424 case IA64_RS_MSR:
8425 if (note == 5)
8426 {
8427 /* These are implementation specific. Force all references to
8428 conflict with all other references. */
8429 specs[count] = tmpl;
8430 specs[count++].specific = 0;
8431 }
8432 else
8433 {
8434 UNHANDLED;
8435 }
8436 break;
8437
8438 case IA64_RS_PKR: /* 16 or more registers */
8439 if (note == 3 || note == 4)
542d6675
KH		 8440 {
8441 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8442 {
8443 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8444 if (regno >= 0 && regno < NELEMS (gr_values)
8445 && KNOWN (regno))
8446 {
8447 if (note == 3)
8448 {
8449 specs[count] = tmpl;
8450 specs[count++].index = gr_values[regno].value & 0xFF;
8451 }
8452 else
8453 for (i = 0; i < NELEMS (gr_values); i++)
8454 {
8455 /* Uses all registers *except* the one in R3. */
2434f565 8456 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8457 {
8458 specs[count] = tmpl;
8459 specs[count++].index = i;
8460 }
8461 }
8462 }
8463 else
8464 {
8465 specs[count] = tmpl;
8466 specs[count++].specific = 0;
8467 }
8468 }
8469 }
8470 else if (note == 0)
8471 {
8472 /* probe et al. */
8473 specs[count] = tmpl;
8474 specs[count++].specific = 0;
8475 }
8476 break;
8477
8478 case IA64_RS_PMC: /* four or more registers */
8479 if (note == 3)
8480 {
8481 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8482 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8483
8484 {
8485 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8486 ? 1 : !rsrc_write);
8487 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8488 if (regno >= 0 && regno < NELEMS (gr_values)
8489 && KNOWN (regno))
8490 {
8491 specs[count] = tmpl;
8492 specs[count++].index = gr_values[regno].value & 0xFF;
8493 }
8494 else
8495 {
8496 specs[count] = tmpl;
8497 specs[count++].specific = 0;
8498 }
8499 }
8500 }
8501 else
8502 {
8503 UNHANDLED;
8504 }
800eeca4
JW		 8505 break;
8506
8507 case IA64_RS_PMD: /* four or more registers */
8508 if (note == 3)
542d6675
KH		 8509 {
8510 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8511 {
8512 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8513 if (regno >= 0 && regno < NELEMS (gr_values)
8514 && KNOWN (regno))
8515 {
8516 specs[count] = tmpl;
8517 specs[count++].index = gr_values[regno].value & 0xFF;
8518 }
8519 else
8520 {
8521 specs[count] = tmpl;
8522 specs[count++].specific = 0;
8523 }
8524 }
8525 }
800eeca4 8526 else
542d6675
KH		 8527 {
8528 UNHANDLED;
8529 }
800eeca4
JW		 8530 break;
8531
8532 case IA64_RS_RR: /* eight registers */
8533 if (note == 6)
542d6675
KH		 8534 {
8535 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8536 {
8537 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8538 if (regno >= 0 && regno < NELEMS (gr_values)
8539 && KNOWN (regno))
8540 {
8541 specs[count] = tmpl;
8542 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8543 }
8544 else
8545 {
8546 specs[count] = tmpl;
8547 specs[count++].specific = 0;
8548 }
8549 }
8550 }
800eeca4 8551 else if (note == 0 && !rsrc_write)
542d6675
KH		 8552 {
8553 specs[count] = tmpl;
8554 specs[count++].specific = 0;
8555 }
197865e8 8556 else
542d6675
KH		 8557 {
8558 UNHANDLED;
8559 }
800eeca4
JW		 8560 break;
8561
8562 case IA64_RS_CR_IRR:
197865e8 8563 if (note == 0)
542d6675
KH		 8564 {
8565 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8566 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8567 if (rsrc_write
8568 && idesc->operands[1] == IA64_OPND_CR3
8569 && regno == CR_IVR)
8570 {
8571 for (i = 0; i < 4; i++)
8572 {
8573 specs[count] = tmpl;
8574 specs[count++].index = CR_IRR0 + i;
8575 }
8576 }
8577 }
800eeca4 8578 else if (note == 1)
542d6675
KH		 8579 {
8580 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8581 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8582 && regno >= CR_IRR0
8583 && regno <= CR_IRR3)
8584 {
8585 specs[count] = tmpl;
8586 specs[count++].index = regno;
8587 }
8588 }
800eeca4 8589 else
542d6675
KH		 8590 {
8591 UNHANDLED;
8592 }
800eeca4
JW		 8593 break;
8594
8595 case IA64_RS_CR_LRR:
8596 if (note != 1)
542d6675
KH		 8597 {
8598 UNHANDLED;
8599 }
197865e8 8600 else
542d6675
KH		 8601 {
8602 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8603 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8604 && (regno == CR_LRR0 || regno == CR_LRR1))
8605 {
8606 specs[count] = tmpl;
8607 specs[count++].index = regno;
8608 }
8609 }
800eeca4
JW		 8610 break;
8611
8612 case IA64_RS_CR:
8613 if (note == 1)
542d6675
KH		 8614 {
8615 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8616 {
8617 specs[count] = tmpl;
8618 specs[count++].index =
8619 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8620 }
8621 }
800eeca4 8622 else
542d6675
KH		 8623 {
8624 UNHANDLED;
8625 }
800eeca4
JW		 8626 break;
8627
8628 case IA64_RS_FR:
8629 case IA64_RS_FRb:
8630 if (note != 1)
542d6675
KH		 8631 {
8632 UNHANDLED;
8633 }
800eeca4 8634 else if (rsrc_write)
542d6675
KH		 8635 {
8636 if (dep->specifier == IA64_RS_FRb
8637 && idesc->operands[0] == IA64_OPND_F1)
8638 {
8639 specs[count] = tmpl;
8640 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8641 }
8642 }
800eeca4 8643 else
542d6675
KH		 8644 {
8645 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8646 {
8647 if (idesc->operands[i] == IA64_OPND_F2
8648 || idesc->operands[i] == IA64_OPND_F3
8649 || idesc->operands[i] == IA64_OPND_F4)
8650 {
8651 specs[count] = tmpl;
8652 specs[count++].index =
8653 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8654 }
8655 }
8656 }
800eeca4
JW		 8657 break;
8658
8659 case IA64_RS_GR:
8660 if (note == 13)
542d6675
KH		 8661 {
8662 /* This reference applies only to the GR whose value is loaded with
8663 data returned from memory. */
8664 specs[count] = tmpl;
8665 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8666 }
800eeca4 8667 else if (note == 1)
542d6675
KH		 8668 {
8669 if (rsrc_write)
8670 {
8671 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8672 if (idesc->operands[i] == IA64_OPND_R1
8673 || idesc->operands[i] == IA64_OPND_R2
8674 || idesc->operands[i] == IA64_OPND_R3)
8675 {
8676 specs[count] = tmpl;
197865e8 8677 specs[count++].index =
50b81f19
JW		 8678 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8679 }
8680 if (idesc->flags & IA64_OPCODE_POSTINC)
8681 for (i = 0; i < NELEMS (idesc->operands); i++)
8682 if (idesc->operands[i] == IA64_OPND_MR3)
8683 {
8684 specs[count] = tmpl;
8685 specs[count++].index =
8686 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8687 }
542d6675
KH		 8688 }
8689 else
8690 {
8691 /* Look for anything that reads a GR. */
8692 for (i = 0; i < NELEMS (idesc->operands); i++)
8693 {
8694 if (idesc->operands[i] == IA64_OPND_MR3
8695 || idesc->operands[i] == IA64_OPND_CPUID_R3
8696 || idesc->operands[i] == IA64_OPND_DBR_R3
8697 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8698 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8699 || idesc->operands[i] == IA64_OPND_PKR_R3
8700 || idesc->operands[i] == IA64_OPND_PMC_R3
8701 || idesc->operands[i] == IA64_OPND_PMD_R3
8702 || idesc->operands[i] == IA64_OPND_RR_R3
8703 || ((i >= idesc->num_outputs)
8704 && (idesc->operands[i] == IA64_OPND_R1
8705 || idesc->operands[i] == IA64_OPND_R2
8706 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8707 /* addl source register. */
8708 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8709 {
8710 specs[count] = tmpl;
8711 specs[count++].index =
8712 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8713 }
8714 }
8715 }
8716 }
197865e8 8717 else
542d6675
KH		 8718 {
8719 UNHANDLED;
8720 }
800eeca4
JW		 8721 break;
8722
139368c9
JW		 8723 /* This is the same as IA64_RS_PRr, except that the register range is
8724 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8725 case IA64_RS_PR:
8726 if (note == 0)
542d6675 8727 {
139368c9 8728 for (i = 1; i < 16; i++)
542d6675 8729 {
139368c9
JW		 8730 specs[count] = tmpl;
8731 specs[count++].index = i;
8732 }
8733 }
8734 else if (note == 7)
8735 {
8736 valueT mask = 0;
8737 /* Mark only those registers indicated by the mask. */
8738 if (rsrc_write)
8739 {
8740 mask = CURR_SLOT.opnd[2].X_add_number;
8741 for (i = 1; i < 16; i++)
8742 if (mask & ((valueT) 1 << i))
8743 {
8744 specs[count] = tmpl;
8745 specs[count++].index = i;
8746 }
8747 }
8748 else
8749 {
8750 UNHANDLED;
8751 }
8752 }
8753 else if (note == 11) /* note 11 implies note 1 as well */
8754 {
8755 if (rsrc_write)
8756 {
8757 for (i = 0; i < idesc->num_outputs; i++)
8758 {
8759 if (idesc->operands[i] == IA64_OPND_P1
8760 || idesc->operands[i] == IA64_OPND_P2)
8761 {
8762 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8763 if (regno >= 1 && regno < 16)
8764 {
8765 specs[count] = tmpl;
8766 specs[count++].index = regno;
8767 }
8768 }
8769 }
8770 }
8771 else
8772 {
8773 UNHANDLED;
8774 }
8775 }
8776 else if (note == 12)
8777 {
8778 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8779 {
8780 specs[count] = tmpl;
8781 specs[count++].index = CURR_SLOT.qp_regno;
8782 }
8783 }
8784 else if (note == 1)
8785 {
8786 if (rsrc_write)
8787 {
8788 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8789 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8790 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8791 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8792
8793 if ((idesc->operands[0] == IA64_OPND_P1
8794 || idesc->operands[0] == IA64_OPND_P2)
8795 && p1 >= 1 && p1 < 16)
542d6675
KH		 8796 {
8797 specs[count] = tmpl;
139368c9
JW		 8798 specs[count].cmp_type =
8799 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8800 specs[count++].index = p1;
8801 }
8802 if ((idesc->operands[1] == IA64_OPND_P1
8803 || idesc->operands[1] == IA64_OPND_P2)
8804 && p2 >= 1 && p2 < 16)
8805 {
8806 specs[count] = tmpl;
8807 specs[count].cmp_type =
8808 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8809 specs[count++].index = p2;
542d6675
KH		 8810 }
8811 }
8812 else
8813 {
139368c9 8814 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8815 {
8816 specs[count] = tmpl;
139368c9
JW		 8817 specs[count++].index = CURR_SLOT.qp_regno;
8818 }
8819 if (idesc->operands[1] == IA64_OPND_PR)
8820 {
8821 for (i = 1; i < 16; i++)
8822 {
8823 specs[count] = tmpl;
8824 specs[count++].index = i;
8825 }
542d6675
KH		 8826 }
8827 }
8828 }
139368c9
JW		 8829 else
8830 {
8831 UNHANDLED;
8832 }
8833 break;
8834
8835 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8836 simplified cases of this. */
8837 case IA64_RS_PRr:
8838 if (note == 0)
8839 {
8840 for (i = 16; i < 63; i++)
8841 {
8842 specs[count] = tmpl;
8843 specs[count++].index = i;
8844 }
8845 }
800eeca4 8846 else if (note == 7)
542d6675
KH		 8847 {
8848 valueT mask = 0;
8849 /* Mark only those registers indicated by the mask. */
8850 if (rsrc_write
8851 && idesc->operands[0] == IA64_OPND_PR)
8852 {
8853 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 8854 if (mask & ((valueT) 1 << 16))
139368c9
JW		 8855 for (i = 16; i < 63; i++)
8856 {
8857 specs[count] = tmpl;
8858 specs[count++].index = i;
8859 }
542d6675
KH		 8860 }
8861 else if (rsrc_write
8862 && idesc->operands[0] == IA64_OPND_PR_ROT)
8863 {
8864 for (i = 16; i < 63; i++)
8865 {
8866 specs[count] = tmpl;
8867 specs[count++].index = i;
8868 }
8869 }
8870 else
8871 {
8872 UNHANDLED;
8873 }
8874 }
800eeca4 8875 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 8876 {
8877 if (rsrc_write)
8878 {
8879 for (i = 0; i < idesc->num_outputs; i++)
8880 {
8881 if (idesc->operands[i] == IA64_OPND_P1
8882 || idesc->operands[i] == IA64_OPND_P2)
8883 {
8884 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 8885 if (regno >= 16 && regno < 63)
542d6675
KH		 8886 {
8887 specs[count] = tmpl;
8888 specs[count++].index = regno;
8889 }
8890 }
8891 }
8892 }
8893 else
8894 {
8895 UNHANDLED;
8896 }
8897 }
800eeca4 8898 else if (note == 12)
542d6675 8899 {
139368c9 8900 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8901 {
8902 specs[count] = tmpl;
8903 specs[count++].index = CURR_SLOT.qp_regno;
8904 }
8905 }
800eeca4 8906 else if (note == 1)
542d6675
KH		 8907 {
8908 if (rsrc_write)
8909 {
8910 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8911 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8912 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8913 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8914
542d6675
KH		 8915 if ((idesc->operands[0] == IA64_OPND_P1
8916 || idesc->operands[0] == IA64_OPND_P2)
139368c9 8917 && p1 >= 16 && p1 < 63)
542d6675
KH		 8918 {
8919 specs[count] = tmpl;
4a4f25cf 8920 specs[count].cmp_type =
7484b8e6 8921 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 8922 specs[count++].index = p1;
8923 }
8924 if ((idesc->operands[1] == IA64_OPND_P1
8925 || idesc->operands[1] == IA64_OPND_P2)
139368c9 8926 && p2 >= 16 && p2 < 63)
542d6675
KH		 8927 {
8928 specs[count] = tmpl;
4a4f25cf 8929 specs[count].cmp_type =
7484b8e6 8930 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 8931 specs[count++].index = p2;
8932 }
8933 }
8934 else
8935 {
139368c9 8936 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8937 {
8938 specs[count] = tmpl;
8939 specs[count++].index = CURR_SLOT.qp_regno;
8940 }
8941 if (idesc->operands[1] == IA64_OPND_PR)
8942 {
139368c9 8943 for (i = 16; i < 63; i++)
542d6675
KH		 8944 {
8945 specs[count] = tmpl;
8946 specs[count++].index = i;
8947 }
8948 }
8949 }
8950 }
197865e8 8951 else
542d6675
KH		 8952 {
8953 UNHANDLED;
8954 }
800eeca4
JW		 8955 break;
8956
8957 case IA64_RS_PSR:
197865e8 8958 /* Verify that the instruction is using the PSR bit indicated in
542d6675 8959 dep->regindex. */
800eeca4 8960 if (note == 0)
542d6675
KH		 8961 {
8962 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8963 {
8964 if (dep->regindex < 6)
8965 {
8966 specs[count++] = tmpl;
8967 }
8968 }
8969 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8970 {
8971 if (dep->regindex < 32
8972 || dep->regindex == 35
8973 || dep->regindex == 36
8974 || (!rsrc_write && dep->regindex == PSR_CPL))
8975 {
8976 specs[count++] = tmpl;
8977 }
8978 }
8979 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8980 {
8981 if (dep->regindex < 32
8982 || dep->regindex == 35
8983 || dep->regindex == 36
8984 || (rsrc_write && dep->regindex == PSR_CPL))
8985 {
8986 specs[count++] = tmpl;
8987 }
8988 }
8989 else
8990 {
8991 /* Several PSR bits have very specific dependencies. */
8992 switch (dep->regindex)
8993 {
8994 default:
8995 specs[count++] = tmpl;
8996 break;
8997 case PSR_IC:
8998 if (rsrc_write)
8999 {
9000 specs[count++] = tmpl;
9001 }
9002 else
9003 {
9004 /* Only certain CR accesses use PSR.ic */
9005 if (idesc->operands[0] == IA64_OPND_CR3
9006 || idesc->operands[1] == IA64_OPND_CR3)
9007 {
9008 int index =
9009 ((idesc->operands[0] == IA64_OPND_CR3)
9010 ? 0 : 1);
9011 int regno =
9012 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9013
9014 switch (regno)
9015 {
9016 default:
9017 break;
9018 case CR_ITIR:
9019 case CR_IFS:
9020 case CR_IIM:
9021 case CR_IIP:
9022 case CR_IPSR:
9023 case CR_ISR:
9024 case CR_IFA:
9025 case CR_IHA:
9026 case CR_IIPA:
9027 specs[count++] = tmpl;
9028 break;
9029 }
9030 }
9031 }
9032 break;
9033 case PSR_CPL:
9034 if (rsrc_write)
9035 {
9036 specs[count++] = tmpl;
9037 }
9038 else
9039 {
9040 /* Only some AR accesses use cpl */
9041 if (idesc->operands[0] == IA64_OPND_AR3
9042 || idesc->operands[1] == IA64_OPND_AR3)
9043 {
9044 int index =
9045 ((idesc->operands[0] == IA64_OPND_AR3)
9046 ? 0 : 1);
9047 int regno =
9048 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9049
9050 if (regno == AR_ITC
9051 || (index == 0
9052 && (regno == AR_ITC
9053 || regno == AR_RSC
9054 || (regno >= AR_K0
9055 && regno <= AR_K7))))
9056 {
9057 specs[count++] = tmpl;
9058 }
9059 }
9060 else
9061 {
9062 specs[count++] = tmpl;
9063 }
9064 break;
9065 }
9066 }
9067 }
9068 }
800eeca4 9069 else if (note == 7)
542d6675
KH		 9070 {
9071 valueT mask = 0;
9072 if (idesc->operands[0] == IA64_OPND_IMMU24)
9073 {
9074 mask = CURR_SLOT.opnd[0].X_add_number;
9075 }
9076 else
9077 {
9078 UNHANDLED;
9079 }
9080 if (mask & ((valueT) 1 << dep->regindex))
9081 {
9082 specs[count++] = tmpl;
9083 }
9084 }
800eeca4 9085 else if (note == 8)
542d6675
KH		 9086 {
9087 int min = dep->regindex == PSR_DFL ? 2 : 32;
9088 int max = dep->regindex == PSR_DFL ? 31 : 127;
9089 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9090 for (i = 0; i < NELEMS (idesc->operands); i++)
9091 {
9092 if (idesc->operands[i] == IA64_OPND_F1
9093 || idesc->operands[i] == IA64_OPND_F2
9094 || idesc->operands[i] == IA64_OPND_F3
9095 || idesc->operands[i] == IA64_OPND_F4)
9096 {
9097 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9098 if (reg >= min && reg <= max)
9099 {
9100 specs[count++] = tmpl;
9101 }
9102 }
9103 }
9104 }
800eeca4 9105 else if (note == 9)
542d6675
KH		 9106 {
9107 int min = dep->regindex == PSR_MFL ? 2 : 32;
9108 int max = dep->regindex == PSR_MFL ? 31 : 127;
9109 /* mfh is read on writes to FR32-127; mfl is read on writes to
9110 FR2-31 */
9111 for (i = 0; i < idesc->num_outputs; i++)
9112 {
9113 if (idesc->operands[i] == IA64_OPND_F1)
9114 {
9115 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9116 if (reg >= min && reg <= max)
9117 {
9118 specs[count++] = tmpl;
9119 }
9120 }
9121 }
9122 }
800eeca4 9123 else if (note == 10)
542d6675
KH		 9124 {
9125 for (i = 0; i < NELEMS (idesc->operands); i++)
9126 {
9127 if (idesc->operands[i] == IA64_OPND_R1
9128 || idesc->operands[i] == IA64_OPND_R2
9129 || idesc->operands[i] == IA64_OPND_R3)
9130 {
9131 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9132 if (regno >= 16 && regno <= 31)
9133 {
9134 specs[count++] = tmpl;
9135 }
9136 }
9137 }
9138 }
800eeca4 9139 else
542d6675
KH		 9140 {
9141 UNHANDLED;
9142 }
800eeca4
JW		 9143 break;
9144
9145 case IA64_RS_AR_FPSR:
9146 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 9147 {
9148 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9149 if (regno == AR_FPSR)
9150 {
9151 specs[count++] = tmpl;
9152 }
9153 }
800eeca4 9154 else
542d6675
KH		 9155 {
9156 specs[count++] = tmpl;
9157 }
800eeca4
JW		 9158 break;
9159
197865e8 9160 case IA64_RS_ARX:
800eeca4
JW		 9161 /* Handle all AR[REG] resources */
9162 if (note == 0 || note == 1)
542d6675
KH		 9163 {
9164 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9165 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9166 && regno == dep->regindex)
9167 {
9168 specs[count++] = tmpl;
9169 }
9170 /* other AR[REG] resources may be affected by AR accesses */
9171 else if (idesc->operands[0] == IA64_OPND_AR3)
9172 {
9173 /* AR[] writes */
9174 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9175 switch (dep->regindex)
9176 {
9177 default:
9178 break;
9179 case AR_BSP:
9180 case AR_RNAT:
9181 if (regno == AR_BSPSTORE)
9182 {
9183 specs[count++] = tmpl;
9184 }
9185 case AR_RSC:
9186 if (!rsrc_write &&
9187 (regno == AR_BSPSTORE
9188 || regno == AR_RNAT))
9189 {
9190 specs[count++] = tmpl;
9191 }
9192 break;
9193 }
9194 }
9195 else if (idesc->operands[1] == IA64_OPND_AR3)
9196 {
9197 /* AR[] reads */
9198 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9199 switch (dep->regindex)
9200 {
9201 default:
9202 break;
9203 case AR_RSC:
9204 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9205 {
9206 specs[count++] = tmpl;
9207 }
9208 break;
9209 }
9210 }
9211 else
9212 {
9213 specs[count++] = tmpl;
9214 }
9215 }
800eeca4 9216 else
542d6675
KH		 9217 {
9218 UNHANDLED;
9219 }
800eeca4
JW		 9220 break;
9221
9222 case IA64_RS_CRX:
9223 /* Handle all CR[REG] resources */
9224 if (note == 0 || note == 1)
542d6675
KH		 9225 {
9226 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9227 {
9228 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9229 if (regno == dep->regindex)
9230 {
9231 specs[count++] = tmpl;
9232 }
9233 else if (!rsrc_write)
9234 {
9235 /* Reads from CR[IVR] affect other resources. */
9236 if (regno == CR_IVR)
9237 {
9238 if ((dep->regindex >= CR_IRR0
9239 && dep->regindex <= CR_IRR3)
9240 || dep->regindex == CR_TPR)
9241 {
9242 specs[count++] = tmpl;
9243 }
9244 }
9245 }
9246 }
9247 else
9248 {
9249 specs[count++] = tmpl;
9250 }
9251 }
800eeca4 9252 else
542d6675
KH		 9253 {
9254 UNHANDLED;
9255 }
800eeca4
JW		 9256 break;
9257
9258 case IA64_RS_INSERVICE:
9259 /* look for write of EOI (67) or read of IVR (65) */
9260 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 9261 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9262 || (idesc->operands[1] == IA64_OPND_CR3
9263 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9264 {
9265 specs[count++] = tmpl;
9266 }
800eeca4
JW		 9267 break;
9268
9269 case IA64_RS_GR0:
9270 if (note == 1)
542d6675
KH		 9271 {
9272 specs[count++] = tmpl;
9273 }
800eeca4 9274 else
542d6675
KH		 9275 {
9276 UNHANDLED;
9277 }
800eeca4
JW		 9278 break;
9279
9280 case IA64_RS_CFM:
9281 if (note != 2)
542d6675
KH		 9282 {
9283 specs[count++] = tmpl;
9284 }
800eeca4 9285 else
542d6675
KH		 9286 {
9287 /* Check if any of the registers accessed are in the rotating region.
9288 mov to/from pr accesses CFM only when qp_regno is in the rotating
9289 region */
9290 for (i = 0; i < NELEMS (idesc->operands); i++)
9291 {
9292 if (idesc->operands[i] == IA64_OPND_R1
9293 || idesc->operands[i] == IA64_OPND_R2
9294 || idesc->operands[i] == IA64_OPND_R3)
9295 {
9296 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9297 /* Assumes that md.rot.num_regs is always valid */
9298 if (md.rot.num_regs > 0
9299 && num > 31
9300 && num < 31 + md.rot.num_regs)
9301 {
9302 specs[count] = tmpl;
9303 specs[count++].specific = 0;
9304 }
9305 }
9306 else if (idesc->operands[i] == IA64_OPND_F1
9307 || idesc->operands[i] == IA64_OPND_F2
9308 || idesc->operands[i] == IA64_OPND_F3
9309 || idesc->operands[i] == IA64_OPND_F4)
9310 {
9311 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9312 if (num > 31)
9313 {
9314 specs[count] = tmpl;
9315 specs[count++].specific = 0;
9316 }
9317 }
9318 else if (idesc->operands[i] == IA64_OPND_P1
9319 || idesc->operands[i] == IA64_OPND_P2)
9320 {
9321 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9322 if (num > 15)
9323 {
9324 specs[count] = tmpl;
9325 specs[count++].specific = 0;
9326 }
9327 }
9328 }
9329 if (CURR_SLOT.qp_regno > 15)
9330 {
9331 specs[count] = tmpl;
9332 specs[count++].specific = 0;
9333 }
9334 }
800eeca4
JW		 9335 break;
9336
139368c9
JW		 9337 /* This is the same as IA64_RS_PRr, except simplified to account for
9338 the fact that there is only one register. */
800eeca4
JW		 9339 case IA64_RS_PR63:
9340 if (note == 0)
542d6675
KH		 9341 {
9342 specs[count++] = tmpl;
9343 }
139368c9 9344 else if (note == 7)
40449e9f
KH		 9345 {
9346 valueT mask = 0;
9347 if (idesc->operands[2] == IA64_OPND_IMM17)
9348 mask = CURR_SLOT.opnd[2].X_add_number;
9349 if (mask & ((valueT) 1 << 63))
139368c9 9350 specs[count++] = tmpl;
40449e9f 9351 }
800eeca4 9352 else if (note == 11)
542d6675
KH		 9353 {
9354 if ((idesc->operands[0] == IA64_OPND_P1
9355 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9356 || (idesc->operands[1] == IA64_OPND_P2
9357 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9358 {
9359 specs[count++] = tmpl;
9360 }
9361 }
800eeca4 9362 else if (note == 12)
542d6675
KH		 9363 {
9364 if (CURR_SLOT.qp_regno == 63)
9365 {
9366 specs[count++] = tmpl;
9367 }
9368 }
800eeca4 9369 else if (note == 1)
542d6675
KH		 9370 {
9371 if (rsrc_write)
9372 {
40449e9f
KH		 9373 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9374 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 9375 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9376 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 9377
4a4f25cf 9378 if (p1 == 63
7484b8e6
TW		 9379 && (idesc->operands[0] == IA64_OPND_P1
9380 || idesc->operands[0] == IA64_OPND_P2))
9381 {
40449e9f 9382 specs[count] = tmpl;
4a4f25cf 9383 specs[count++].cmp_type =
7484b8e6
TW		 9384 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9385 }
9386 if (p2 == 63
9387 && (idesc->operands[1] == IA64_OPND_P1
9388 || idesc->operands[1] == IA64_OPND_P2))
9389 {
40449e9f 9390 specs[count] = tmpl;
4a4f25cf 9391 specs[count++].cmp_type =
7484b8e6
TW		 9392 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9393 }
542d6675
KH		 9394 }
9395 else
9396 {
9397 if (CURR_SLOT.qp_regno == 63)
9398 {
9399 specs[count++] = tmpl;
9400 }
9401 }
9402 }
800eeca4 9403 else
542d6675
KH		 9404 {
9405 UNHANDLED;
9406 }
800eeca4
JW		 9407 break;
9408
9409 case IA64_RS_RSE:
9410 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 9411 read resources have not yet been completely identified, so for now
9412 treat RSE as a single resource */
800eeca4 9413 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 9414 {
9415 if (rsrc_write)
9416 {
9417 if (idesc->operands[0] == IA64_OPND_AR3
9418 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9419 {
a66d2bb7 9420 specs[count++] = tmpl;
542d6675
KH		 9421 }
9422 }
9423 else
9424 {
9425 if (idesc->operands[0] == IA64_OPND_AR3)
9426 {
9427 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9428 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9429 {
9430 specs[count++] = tmpl;
9431 }
9432 }
9433 else if (idesc->operands[1] == IA64_OPND_AR3)
9434 {
9435 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9436 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9437 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9438 {
9439 specs[count++] = tmpl;
9440 }
9441 }
9442 }
9443 }
197865e8 9444 else
542d6675
KH		 9445 {
9446 specs[count++] = tmpl;
9447 }
800eeca4
JW		 9448 break;
9449
9450 case IA64_RS_ANY:
9451 /* FIXME -- do any of these need to be non-specific? */
9452 specs[count++] = tmpl;
9453 break;
9454
9455 default:
9456 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9457 break;
9458 }
9459
9460 return count;
9461}
9462
9463/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9464 QP of the marking instruction and a subsequent branch on the same QP. */
9465
800eeca4
JW		 9466static void
9467clear_qp_branch_flag (mask)
542d6675 9468 valueT mask;
800eeca4
JW		 9469{
9470 int i;
542d6675 9471 for (i = 0; i < regdepslen; i++)
800eeca4 9472 {
197865e8 9473 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9474 if ((bit & mask) != 0)
542d6675
KH		 9475 {
9476 regdeps[i].link_to_qp_branch = 0;
9477 }
800eeca4
JW		 9478 }
9479}
9480
5e2f6673
L		 9481/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9482 any mutexes which contain one of the PRs and create new ones when
9483 needed. */
9484
9485static int
9486update_qp_mutex (valueT mask)
9487{
9488 int i;
9489 int add = 0;
9490
9491 i = 0;
9492 while (i < qp_mutexeslen)
9493 {
9494 if ((qp_mutexes[i].prmask & mask) != 0)
9495 {
9496 /* If it destroys and creates the same mutex, do nothing. */
9497 if (qp_mutexes[i].prmask == mask
9498 && qp_mutexes[i].path == md.path)
9499 {
9500 i++;
9501 add = -1;
9502 }
9503 else
9504 {
9505 int keep = 0;
9506
9507 if (md.debug_dv)
9508 {
9509 fprintf (stderr, " Clearing mutex relation");
9510 print_prmask (qp_mutexes[i].prmask);
9511 fprintf (stderr, "\n");
9512 }
9513
9514 /* Deal with the old mutex with more than 3+ PRs only if
9515 the new mutex on the same execution path with it.
9516
9517 FIXME: The 3+ mutex support is incomplete.
9518 dot_pred_rel () may be a better place to fix it. */
9519 if (qp_mutexes[i].path == md.path)
9520 {
9521 /* If it is a proper subset of the mutex, create a
9522 new mutex. */
9523 if (add == 0
9524 && (qp_mutexes[i].prmask & mask) == mask)
9525 add = 1;
9526
9527 qp_mutexes[i].prmask &= ~mask;
9528 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9529 {
9530 /* Modify the mutex if there are more than one
9531 PR left. */
9532 keep = 1;
9533 i++;
9534 }
9535 }
9536
9537 if (keep == 0)
9538 /* Remove the mutex. */
9539 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9540 }
9541 }
9542 else
9543 ++i;
9544 }
9545
9546 if (add == 1)
9547 add_qp_mutex (mask);
9548
9549 return add;
9550}
9551
197865e8 9552/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9553
542d6675
KH		 9554 Any changes to a PR clears the mutex relations which include that PR. */
9555
800eeca4
JW		 9556static void
9557clear_qp_mutex (mask)
542d6675 9558 valueT mask;
800eeca4
JW		 9559{
9560 int i;
9561
9562 i = 0;
9563 while (i < qp_mutexeslen)
9564 {
9565 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9566 {
9567 if (md.debug_dv)
9568 {
9569 fprintf (stderr, " Clearing mutex relation");
9570 print_prmask (qp_mutexes[i].prmask);
9571 fprintf (stderr, "\n");
9572 }
9573 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9574 }
800eeca4 9575 else
542d6675 9576 ++i;
800eeca4
JW		 9577 }
9578}
9579
9580/* Clear implies relations which contain PRs in the given masks.
9581 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9582 indicates the implied PR. */
9583
800eeca4
JW		 9584static void
9585clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9586 valueT p1_mask;
9587 valueT p2_mask;
800eeca4
JW		 9588{
9589 int i;
9590
9591 i = 0;
9592 while (i < qp_implieslen)
9593 {
197865e8 9594 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9595 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9596 {
9597 if (md.debug_dv)
9598 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9599 qp_implies[i].p1, qp_implies[i].p2);
9600 qp_implies[i] = qp_implies[--qp_implieslen];
9601 }
197865e8 9602 else
542d6675 9603 ++i;
800eeca4
JW		 9604 }
9605}
9606
542d6675
KH		 9607/* Add the PRs specified to the list of implied relations. */
9608
800eeca4
JW		 9609static void
9610add_qp_imply (p1, p2)
542d6675 9611 int p1, p2;
800eeca4
JW		 9612{
9613 valueT mask;
9614 valueT bit;
9615 int i;
9616
542d6675 9617 /* p0 is not meaningful here. */
800eeca4
JW		 9618 if (p1 == 0 || p2 == 0)
9619 abort ();
9620
9621 if (p1 == p2)
9622 return;
9623
542d6675
KH		 9624 /* If it exists already, ignore it. */
9625 for (i = 0; i < qp_implieslen; i++)
800eeca4 9626 {
197865e8 9627 if (qp_implies[i].p1 == p1
542d6675
KH		 9628 && qp_implies[i].p2 == p2
9629 && qp_implies[i].path == md.path
9630 && !qp_implies[i].p2_branched)
9631 return;
800eeca4
JW		 9632 }
9633
9634 if (qp_implieslen == qp_impliestotlen)
9635 {
9636 qp_impliestotlen += 20;
9637 qp_implies = (struct qp_imply *)
542d6675
KH		 9638 xrealloc ((void *) qp_implies,
9639 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9640 }
9641 if (md.debug_dv)
9642 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9643 qp_implies[qp_implieslen].p1 = p1;
9644 qp_implies[qp_implieslen].p2 = p2;
9645 qp_implies[qp_implieslen].path = md.path;
9646 qp_implies[qp_implieslen++].p2_branched = 0;
9647
9648 /* Add in the implied transitive relations; for everything that p2 implies,
9649 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9650 as well. */
542d6675 9651 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9652 {
9653 if (qp_implies[i].p1 == p2)
542d6675 9654 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9655 if (qp_implies[i].p2 == p1)
542d6675 9656 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9657 }
9658 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9659 relation containing p2, duplicate it and replace p2 with p1. */
9660 bit = (valueT) 1 << p1;
9661 mask = (valueT) 1 << p2;
542d6675 9662 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9663 {
9664 if (qp_mutexes[i].prmask & mask)
542d6675 9665 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9666 }
9667}
9668
800eeca4
JW		 9669/* Add the PRs specified in the mask to the mutex list; this means that only
9670 one of the PRs can be true at any time. PR0 should never be included in
9671 the mask. */
542d6675 9672
800eeca4
JW		 9673static void
9674add_qp_mutex (mask)
542d6675 9675 valueT mask;
800eeca4
JW		 9676{
9677 if (mask & 0x1)
9678 abort ();
9679
9680 if (qp_mutexeslen == qp_mutexestotlen)
9681 {
9682 qp_mutexestotlen += 20;
9683 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9684 xrealloc ((void *) qp_mutexes,
9685 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9686 }
9687 if (md.debug_dv)
9688 {
9689 fprintf (stderr, " Registering mutex on");
9690 print_prmask (mask);
9691 fprintf (stderr, "\n");
9692 }
9693 qp_mutexes[qp_mutexeslen].path = md.path;
9694 qp_mutexes[qp_mutexeslen++].prmask = mask;
9695}
9696
cb5301b6
RH		 9697static int
9698has_suffix_p (name, suffix)
40449e9f
KH		 9699 const char *name;
9700 const char *suffix;
cb5301b6
RH		 9701{
9702 size_t namelen = strlen (name);
9703 size_t sufflen = strlen (suffix);
9704
9705 if (namelen <= sufflen)
9706 return 0;
9707 return strcmp (name + namelen - sufflen, suffix) == 0;
9708}
9709
800eeca4
JW		 9710static void
9711clear_register_values ()
9712{
9713 int i;
9714 if (md.debug_dv)
9715 fprintf (stderr, " Clearing register values\n");
542d6675 9716 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9717 gr_values[i].known = 0;
9718}
9719
9720/* Keep track of register values/changes which affect DV tracking.
9721
9722 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9723 have to examine a group of strings to identify them. */
800eeca4 9724
800eeca4
JW		 9725static void
9726note_register_values (idesc)
542d6675 9727 struct ia64_opcode *idesc;
800eeca4
JW		 9728{
9729 valueT qp_changemask = 0;
9730 int i;
9731
542d6675
KH		 9732 /* Invalidate values for registers being written to. */
9733 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9734 {
197865e8 9735 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9736 || idesc->operands[i] == IA64_OPND_R2
9737 || idesc->operands[i] == IA64_OPND_R3)
9738 {
9739 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9740 if (regno > 0 && regno < NELEMS (gr_values))
9741 gr_values[regno].known = 0;
9742 }
50b81f19
JW		 9743 else if (idesc->operands[i] == IA64_OPND_R3_2)
9744 {
9745 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9746 if (regno > 0 && regno < 4)
9747 gr_values[regno].known = 0;
9748 }
197865e8 9749 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9750 || idesc->operands[i] == IA64_OPND_P2)
9751 {
9752 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9753 qp_changemask |= (valueT) 1 << regno;
9754 }
800eeca4 9755 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9756 {
9757 if (idesc->operands[2] & (valueT) 0x10000)
9758 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9759 else
9760 qp_changemask = idesc->operands[2];
9761 break;
9762 }
800eeca4 9763 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9764 {
9765 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9766 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9767 else
9768 qp_changemask = idesc->operands[1];
9769 qp_changemask &= ~(valueT) 0xFFFF;
9770 break;
9771 }
9772 }
9773
9774 /* Always clear qp branch flags on any PR change. */
9775 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9776 clear_qp_branch_flag (qp_changemask);
9777
542d6675 9778 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9779 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9780 {
197865e8 9781 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9782 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9783 {
9784 for (i = 32; i < 32 + md.rot.num_regs; i++)
9785 gr_values[i].known = 0;
9786 }
800eeca4
JW		 9787 clear_qp_mutex (qp_changemask);
9788 clear_qp_implies (qp_changemask, qp_changemask);
9789 }
542d6675
KH		 9790 /* After a call, all register values are undefined, except those marked
9791 as "safe". */
800eeca4 9792 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9793 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9794 {
56d27c17 9795 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9796 clear_register_values ();
9797 clear_qp_mutex (~qp_safe_across_calls);
9798 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9799 clear_qp_branch_flag (~qp_safe_across_calls);
9800 }
e9718fe1 9801 else if (is_interruption_or_rfi (idesc)
542d6675 9802 || is_taken_branch (idesc))
e9718fe1
TW		 9803 {
9804 clear_register_values ();
197865e8
KH		 9805 clear_qp_mutex (~(valueT) 0);
9806 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9807 }
542d6675 9808 /* Look for mutex and implies relations. */
197865e8 9809 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9810 || idesc->operands[0] == IA64_OPND_P2)
9811 && (idesc->operands[1] == IA64_OPND_P1
9812 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9813 {
9814 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9815 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9816 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9817 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 9818
5e2f6673
L		 9819 /* If both PRs are PR0, we can't really do anything. */
9820 if (p1 == 0 && p2 == 0)
542d6675
KH		 9821 {
9822 if (md.debug_dv)
9823 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9824 }
800eeca4 9825 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 9826 with the following exceptions. */
cb5301b6
RH		 9827 else if (has_suffix_p (idesc->name, ".or.andcm")
9828 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 9829 {
542d6675
KH		 9830 clear_qp_implies (p2mask, p1mask);
9831 }
cb5301b6
RH		 9832 else if (has_suffix_p (idesc->name, ".andcm")
9833 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 9834 {
9835 clear_qp_implies (0, p1mask | p2mask);
9836 }
cb5301b6
RH		 9837 else if (has_suffix_p (idesc->name, ".orcm")
9838 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 9839 {
9840 clear_qp_mutex (p1mask | p2mask);
9841 clear_qp_implies (p1mask | p2mask, 0);
9842 }
800eeca4 9843 else
542d6675 9844 {
5e2f6673
L		 9845 int added = 0;
9846
542d6675 9847 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 9848
9849 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9850 if (p1 == 0 || p2 == 0)
9851 clear_qp_mutex (p1mask | p2mask);
9852 else
9853 added = update_qp_mutex (p1mask | p2mask);
9854
9855 if (CURR_SLOT.qp_regno == 0
9856 || has_suffix_p (idesc->name, ".unc"))
542d6675 9857 {
5e2f6673
L		 9858 if (added == 0 && p1 && p2)
9859 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 9860 if (CURR_SLOT.qp_regno != 0)
9861 {
5e2f6673
L		 9862 if (p1)
9863 add_qp_imply (p1, CURR_SLOT.qp_regno);
9864 if (p2)
9865 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 9866 }
9867 }
542d6675
KH		 9868 }
9869 }
9870 /* Look for mov imm insns into GRs. */
800eeca4 9871 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 9872 && (idesc->operands[1] == IA64_OPND_IMM22
9873 || idesc->operands[1] == IA64_OPND_IMMU64)
a66d2bb7 9874 && CURR_SLOT.opnd[1].X_op == O_constant
542d6675
KH		 9875 && (strcmp (idesc->name, "mov") == 0
9876 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 9877 {
9878 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 9879 if (regno > 0 && regno < NELEMS (gr_values))
9880 {
9881 gr_values[regno].known = 1;
9882 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9883 gr_values[regno].path = md.path;
9884 if (md.debug_dv)
2434f565
JW		 9885 {
9886 fprintf (stderr, " Know gr%d = ", regno);
9887 fprintf_vma (stderr, gr_values[regno].value);
9888 fputs ("\n", stderr);
9889 }
542d6675 9890 }
800eeca4 9891 }
a66d2bb7
JB		 9892 /* Look for dep.z imm insns. */
9893 else if (idesc->operands[0] == IA64_OPND_R1
9894 && idesc->operands[1] == IA64_OPND_IMM8
9895 && strcmp (idesc->name, "dep.z") == 0)
9896 {
9897 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9898 if (regno > 0 && regno < NELEMS (gr_values))
9899 {
9900 valueT value = CURR_SLOT.opnd[1].X_add_number;
9901
9902 if (CURR_SLOT.opnd[3].X_add_number < 64)
9903 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
9904 value <<= CURR_SLOT.opnd[2].X_add_number;
9905 gr_values[regno].known = 1;
9906 gr_values[regno].value = value;
9907 gr_values[regno].path = md.path;
9908 if (md.debug_dv)
9909 {
9910 fprintf (stderr, " Know gr%d = ", regno);
9911 fprintf_vma (stderr, gr_values[regno].value);
9912 fputs ("\n", stderr);
9913 }
9914 }
9915 }
197865e8 9916 else
800eeca4
JW		 9917 {
9918 clear_qp_mutex (qp_changemask);
9919 clear_qp_implies (qp_changemask, qp_changemask);
9920 }
9921}
9922
542d6675
KH		 9923/* Return whether the given predicate registers are currently mutex. */
9924
800eeca4
JW		 9925static int
9926qp_mutex (p1, p2, path)
542d6675
KH		 9927 int p1;
9928 int p2;
9929 int path;
800eeca4
JW		 9930{
9931 int i;
9932 valueT mask;
9933
9934 if (p1 != p2)
9935 {
542d6675
KH		 9936 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9937 for (i = 0; i < qp_mutexeslen; i++)
9938 {
9939 if (qp_mutexes[i].path >= path
9940 && (qp_mutexes[i].prmask & mask) == mask)
9941 return 1;
9942 }
800eeca4
JW		 9943 }
9944 return 0;
9945}
9946
9947/* Return whether the given resource is in the given insn's list of chks
9948 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 9949 conflict. */
9950
800eeca4
JW		 9951static int
9952resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 9953 struct rsrc *rs;
9954 struct ia64_opcode *idesc;
9955 int note;
9956 int qp_regno;
9957 int path;
800eeca4
JW		 9958{
9959 struct rsrc specs[MAX_SPECS];
9960 int count;
9961
9962 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9963 we don't need to check. One exception is note 11, which indicates that
9964 target predicates are written regardless of PR[qp]. */
197865e8 9965 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 9966 && note != 11)
9967 return 0;
9968
9969 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9970 while (count-- > 0)
9971 {
9972 /* UNAT checking is a bit more specific than other resources */
9973 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 9974 && specs[count].mem_offset.hint
9975 && rs->mem_offset.hint)
9976 {
9977 if (rs->mem_offset.base == specs[count].mem_offset.base)
9978 {
9979 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9980 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9981 return 1;
9982 else
9983 continue;
9984 }
9985 }
800eeca4 9986
7484b8e6 9987 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 9988 writes are an OR. */
7484b8e6 9989 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 9990 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 9991 || rs->dependency->specifier == IA64_RS_PR63)
9992 {
9993 if (specs[count].cmp_type != CMP_NONE
9994 && specs[count].cmp_type == rs->cmp_type)
9995 {
9996 if (md.debug_dv)
9997 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9998 dv_mode[rs->dependency->mode],
afa680f8 9999 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 10000 specs[count].index : 63);
10001 continue;
10002 }
10003 if (md.debug_dv)
4a4f25cf 10004 fprintf (stderr,
7484b8e6
TW		 10005 " %s on parallel compare conflict %s vs %s on PR%d\n",
10006 dv_mode[rs->dependency->mode],
4a4f25cf 10007 dv_cmp_type[rs->cmp_type],
7484b8e6 10008 dv_cmp_type[specs[count].cmp_type],
afa680f8 10009 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 10010 specs[count].index : 63);
4a4f25cf 10011
7484b8e6
TW		 10012 }
10013
800eeca4 10014 /* If either resource is not specific, conservatively assume a conflict
197865e8 10015 */
800eeca4 10016 if (!specs[count].specific || !rs->specific)
542d6675 10017 return 2;
800eeca4 10018 else if (specs[count].index == rs->index)
542d6675 10019 return 1;
800eeca4 10020 }
800eeca4
JW		 10021
10022 return 0;
10023}
10024
10025/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10026 insert a stop to create the break. Update all resource dependencies
10027 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10028 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10029 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 10030 instruction. */
800eeca4
JW		 10031
10032static void
10033insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 10034 int insert_stop;
10035 int qp_regno;
10036 int save_current;
800eeca4
JW		 10037{
10038 int i;
10039
10040 if (insert_stop && md.num_slots_in_use > 0)
10041 PREV_SLOT.end_of_insn_group = 1;
10042
10043 if (md.debug_dv)
10044 {
197865e8 10045 fprintf (stderr, " Insn group break%s",
542d6675 10046 (insert_stop ? " (w/stop)" : ""));
800eeca4 10047 if (qp_regno != 0)
542d6675 10048 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 10049 fprintf (stderr, "\n");
10050 }
10051
10052 i = 0;
10053 while (i < regdepslen)
10054 {
10055 const struct ia64_dependency *dep = regdeps[i].dependency;
10056
10057 if (qp_regno != 0
542d6675
KH		 10058 && regdeps[i].qp_regno != qp_regno)
10059 {
10060 ++i;
10061 continue;
10062 }
800eeca4
JW		 10063
10064 if (save_current
542d6675
KH		 10065 && CURR_SLOT.src_file == regdeps[i].file
10066 && CURR_SLOT.src_line == regdeps[i].line)
10067 {
10068 ++i;
10069 continue;
10070 }
800eeca4
JW		 10071
10072 /* clear dependencies which are automatically cleared by a stop, or
542d6675 10073 those that have reached the appropriate state of insn serialization */
800eeca4 10074 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 10075 || dep->semantics == IA64_DVS_IMPLIEDF
10076 || regdeps[i].insn_srlz == STATE_SRLZ)
10077 {
10078 print_dependency ("Removing", i);
10079 regdeps[i] = regdeps[--regdepslen];
10080 }
800eeca4 10081 else
542d6675
KH		 10082 {
10083 if (dep->semantics == IA64_DVS_DATA
10084 || dep->semantics == IA64_DVS_INSTR
800eeca4 10085 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 10086 {
10087 if (regdeps[i].insn_srlz == STATE_NONE)
10088 regdeps[i].insn_srlz = STATE_STOP;
10089 if (regdeps[i].data_srlz == STATE_NONE)
10090 regdeps[i].data_srlz = STATE_STOP;
10091 }
10092 ++i;
10093 }
800eeca4
JW		 10094 }
10095}
10096
542d6675
KH		 10097/* Add the given resource usage spec to the list of active dependencies. */
10098
197865e8 10099static void
800eeca4 10100mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 10101 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10102 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 10103 struct rsrc *spec;
10104 int depind;
10105 int path;
800eeca4
JW		 10106{
10107 if (regdepslen == regdepstotlen)
10108 {
10109 regdepstotlen += 20;
10110 regdeps = (struct rsrc *)
542d6675 10111 xrealloc ((void *) regdeps,
bc805888 10112 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 10113 }
10114
10115 regdeps[regdepslen] = *spec;
10116 regdeps[regdepslen].depind = depind;
10117 regdeps[regdepslen].path = path;
10118 regdeps[regdepslen].file = CURR_SLOT.src_file;
10119 regdeps[regdepslen].line = CURR_SLOT.src_line;
10120
10121 print_dependency ("Adding", regdepslen);
10122
10123 ++regdepslen;
10124}
10125
10126static void
10127print_dependency (action, depind)
542d6675
KH		 10128 const char *action;
10129 int depind;
800eeca4
JW		 10130{
10131 if (md.debug_dv)
10132 {
197865e8 10133 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 10134 action, dv_mode[(regdeps[depind].dependency)->mode],
10135 (regdeps[depind].dependency)->name);
a66d2bb7 10136 if (regdeps[depind].specific && regdeps[depind].index >= 0)
542d6675 10137 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 10138 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 10139 {
10140 fputs (" ", stderr);
10141 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10142 fputs ("+", stderr);
10143 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10144 }
800eeca4
JW		 10145 fprintf (stderr, "\n");
10146 }
10147}
10148
10149static void
10150instruction_serialization ()
10151{
10152 int i;
10153 if (md.debug_dv)
10154 fprintf (stderr, " Instruction serialization\n");
542d6675 10155 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 10156 if (regdeps[i].insn_srlz == STATE_STOP)
10157 regdeps[i].insn_srlz = STATE_SRLZ;
10158}
10159
10160static void
10161data_serialization ()
10162{
10163 int i = 0;
10164 if (md.debug_dv)
10165 fprintf (stderr, " Data serialization\n");
10166 while (i < regdepslen)
10167 {
10168 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 10169 /* Note: as of 991210, all "other" dependencies are cleared by a
10170 data serialization. This might change with new tables */
10171 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10172 {
10173 print_dependency ("Removing", i);
10174 regdeps[i] = regdeps[--regdepslen];
10175 }
800eeca4 10176 else
542d6675 10177 ++i;
800eeca4
JW		 10178 }
10179}
10180
542d6675
KH		 10181/* Insert stops and serializations as needed to avoid DVs. */
10182
800eeca4
JW		 10183static void
10184remove_marked_resource (rs)
542d6675 10185 struct rsrc *rs;
800eeca4
JW		 10186{
10187 switch (rs->dependency->semantics)
10188 {
10189 case IA64_DVS_SPECIFIC:
10190 if (md.debug_dv)
10191 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 10192 /* ...fall through... */
800eeca4
JW		 10193 case IA64_DVS_INSTR:
10194 if (md.debug_dv)
542d6675 10195 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 10196 if (rs->insn_srlz < STATE_STOP)
542d6675 10197 insn_group_break (1, 0, 0);
800eeca4 10198 if (rs->insn_srlz < STATE_SRLZ)
542d6675 10199 {
888a75be 10200 struct slot oldslot = CURR_SLOT;
542d6675 10201 /* Manually jam a srlz.i insn into the stream */
888a75be 10202 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10203 CURR_SLOT.user_template = -1;
542d6675
KH		 10204 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10205 instruction_serialization ();
10206 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10207 if (++md.num_slots_in_use >= NUM_SLOTS)
10208 emit_one_bundle ();
888a75be 10209 CURR_SLOT = oldslot;
542d6675 10210 }
800eeca4
JW		 10211 insn_group_break (1, 0, 0);
10212 break;
10213 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 10214 "other" types of DV are eliminated
10215 by a data serialization */
800eeca4
JW		 10216 case IA64_DVS_DATA:
10217 if (md.debug_dv)
542d6675 10218 fprintf (stderr, "Inserting data serialization\n");
800eeca4 10219 if (rs->data_srlz < STATE_STOP)
542d6675 10220 insn_group_break (1, 0, 0);
800eeca4 10221 {
888a75be 10222 struct slot oldslot = CURR_SLOT;
542d6675 10223 /* Manually jam a srlz.d insn into the stream */
888a75be 10224 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
744b6414 10225 CURR_SLOT.user_template = -1;
542d6675
KH		 10226 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10227 data_serialization ();
10228 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10229 if (++md.num_slots_in_use >= NUM_SLOTS)
10230 emit_one_bundle ();
888a75be 10231 CURR_SLOT = oldslot;
800eeca4
JW		 10232 }
10233 break;
10234 case IA64_DVS_IMPLIED:
10235 case IA64_DVS_IMPLIEDF:
10236 if (md.debug_dv)
542d6675 10237 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 10238 insn_group_break (1, 0, 0);
10239 break;
10240 default:
10241 break;
10242 }
10243}
10244
10245/* Check the resources used by the given opcode against the current dependency
197865e8 10246 list.
800eeca4
JW		 10247
10248 The check is run once for each execution path encountered. In this case,
10249 a unique execution path is the sequence of instructions following a code
10250 entry point, e.g. the following has three execution paths, one starting
10251 at L0, one at L1, and one at L2.
197865e8 10252
800eeca4
JW		 10253 L0: nop
10254 L1: add
10255 L2: add
197865e8 10256 br.ret
800eeca4 10257*/
542d6675 10258
800eeca4
JW		 10259static void
10260check_dependencies (idesc)
542d6675 10261 struct ia64_opcode *idesc;
800eeca4
JW		 10262{
10263 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10264 int path;
10265 int i;
10266
10267 /* Note that the number of marked resources may change within the
197865e8 10268 loop if in auto mode. */
800eeca4
JW		 10269 i = 0;
10270 while (i < regdepslen)
10271 {
10272 struct rsrc *rs = &regdeps[i];
10273 const struct ia64_dependency *dep = rs->dependency;
10274 int chkind;
10275 int note;
10276 int start_over = 0;
10277
10278 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 10279 || (chkind = depends_on (rs->depind, idesc)) == -1)
10280 {
10281 ++i;
10282 continue;
10283 }
10284
10285 note = NOTE (opdeps->chks[chkind]);
10286
10287 /* Check this resource against each execution path seen thus far. */
10288 for (path = 0; path <= md.path; path++)
10289 {
10290 int matchtype;
10291
10292 /* If the dependency wasn't on the path being checked, ignore it. */
10293 if (rs->path < path)
10294 continue;
10295
10296 /* If the QP for this insn implies a QP which has branched, don't
10297 bother checking. Ed. NOTE: I don't think this check is terribly
10298 useful; what's the point of generating code which will only be
10299 reached if its QP is zero?
10300 This code was specifically inserted to handle the following code,
10301 based on notes from Intel's DV checking code, where p1 implies p2.
10302
10303 mov r4 = 2
10304 (p2) br.cond L
10305 (p1) mov r4 = 7
10306 */
10307 if (CURR_SLOT.qp_regno != 0)
10308 {
10309 int skip = 0;
10310 int implies;
10311 for (implies = 0; implies < qp_implieslen; implies++)
10312 {
10313 if (qp_implies[implies].path >= path
10314 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10315 && qp_implies[implies].p2_branched)
10316 {
10317 skip = 1;
10318 break;
10319 }
10320 }
10321 if (skip)
10322 continue;
10323 }
10324
10325 if ((matchtype = resources_match (rs, idesc, note,
10326 CURR_SLOT.qp_regno, path)) != 0)
10327 {
10328 char msg[1024];
10329 char pathmsg[256] = "";
10330 char indexmsg[256] = "";
10331 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10332
10333 if (path != 0)
10334 sprintf (pathmsg, " when entry is at label '%s'",
10335 md.entry_labels[path - 1]);
a66d2bb7 10336 if (matchtype == 1 && rs->index >= 0)
542d6675
KH		 10337 sprintf (indexmsg, ", specific resource number is %d",
10338 rs->index);
10339 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10340 idesc->name,
10341 (certain ? "violates" : "may violate"),
10342 dv_mode[dep->mode], dep->name,
10343 dv_sem[dep->semantics],
10344 pathmsg, indexmsg);
10345
10346 if (md.explicit_mode)
10347 {
10348 as_warn ("%s", msg);
10349 if (path < md.path)
10350 as_warn (_("Only the first path encountering the conflict "
10351 "is reported"));
10352 as_warn_where (rs->file, rs->line,
10353 _("This is the location of the "
10354 "conflicting usage"));
10355 /* Don't bother checking other paths, to avoid duplicating
10356 the same warning */
10357 break;
10358 }
10359 else
10360 {
10361 if (md.debug_dv)
10362 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10363
10364 remove_marked_resource (rs);
10365
10366 /* since the set of dependencies has changed, start over */
10367 /* FIXME -- since we're removing dvs as we go, we
10368 probably don't really need to start over... */
10369 start_over = 1;
10370 break;
10371 }
10372 }
10373 }
800eeca4 10374 if (start_over)
542d6675 10375 i = 0;
800eeca4 10376 else
542d6675 10377 ++i;
800eeca4
JW		 10378 }
10379}
10380
542d6675
KH		 10381/* Register new dependencies based on the given opcode. */
10382
800eeca4
JW		 10383static void
10384mark_resources (idesc)
542d6675 10385 struct ia64_opcode *idesc;
800eeca4
JW		 10386{
10387 int i;
10388 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10389 int add_only_qp_reads = 0;
10390
10391 /* A conditional branch only uses its resources if it is taken; if it is
10392 taken, we stop following that path. The other branch types effectively
10393 *always* write their resources. If it's not taken, register only QP
197865e8 10394 reads. */
800eeca4
JW		 10395 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10396 {
10397 add_only_qp_reads = 1;
10398 }
10399
10400 if (md.debug_dv)
10401 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10402
542d6675 10403 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 10404 {
10405 const struct ia64_dependency *dep;
10406 struct rsrc specs[MAX_SPECS];
10407 int note;
10408 int path;
10409 int count;
197865e8 10410
800eeca4 10411 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 10412 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 10413
10414 if (add_only_qp_reads
542d6675
KH		 10415 && !(dep->mode == IA64_DV_WAR
10416 && (dep->specifier == IA64_RS_PR
139368c9 10417 || dep->specifier == IA64_RS_PRr
542d6675
KH		 10418 || dep->specifier == IA64_RS_PR63)))
10419 continue;
800eeca4
JW		 10420
10421 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10422
800eeca4 10423 while (count-- > 0)
542d6675
KH		 10424 {
10425 mark_resource (idesc, dep, &specs[count],
10426 DEP (opdeps->regs[i]), md.path);
10427 }
800eeca4
JW		 10428
10429 /* The execution path may affect register values, which may in turn
542d6675 10430 affect which indirect-access resources are accessed. */
800eeca4 10431 switch (dep->specifier)
542d6675
KH		 10432 {
10433 default:
10434 break;
10435 case IA64_RS_CPUID:
10436 case IA64_RS_DBR:
10437 case IA64_RS_IBR:
800eeca4 10438 case IA64_RS_MSR:
542d6675
KH		 10439 case IA64_RS_PKR:
10440 case IA64_RS_PMC:
10441 case IA64_RS_PMD:
10442 case IA64_RS_RR:
10443 for (path = 0; path < md.path; path++)
10444 {
10445 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10446 while (count-- > 0)
10447 mark_resource (idesc, dep, &specs[count],
10448 DEP (opdeps->regs[i]), path);
10449 }
10450 break;
10451 }
10452 }
10453}
10454
10455/* Remove dependencies when they no longer apply. */
10456
800eeca4
JW		 10457static void
10458update_dependencies (idesc)
542d6675 10459 struct ia64_opcode *idesc;
800eeca4
JW		 10460{
10461 int i;
10462
10463 if (strcmp (idesc->name, "srlz.i") == 0)
10464 {
10465 instruction_serialization ();
10466 }
10467 else if (strcmp (idesc->name, "srlz.d") == 0)
10468 {
10469 data_serialization ();
10470 }
10471 else if (is_interruption_or_rfi (idesc)
542d6675 10472 || is_taken_branch (idesc))
800eeca4 10473 {
542d6675
KH		 10474 /* Although technically the taken branch doesn't clear dependencies
10475 which require a srlz.[id], we don't follow the branch; the next
10476 instruction is assumed to start with a clean slate. */
800eeca4 10477 regdepslen = 0;
800eeca4
JW		 10478 md.path = 0;
10479 }
10480 else if (is_conditional_branch (idesc)
542d6675 10481 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10482 {
10483 int is_call = strstr (idesc->name, ".call") != NULL;
10484
542d6675
KH		 10485 for (i = 0; i < qp_implieslen; i++)
10486 {
10487 /* If the conditional branch's predicate is implied by the predicate
10488 in an existing dependency, remove that dependency. */
10489 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10490 {
10491 int depind = 0;
10492 /* Note that this implied predicate takes a branch so that if
10493 a later insn generates a DV but its predicate implies this
10494 one, we can avoid the false DV warning. */
10495 qp_implies[i].p2_branched = 1;
10496 while (depind < regdepslen)
10497 {
10498 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10499 {
10500 print_dependency ("Removing", depind);
10501 regdeps[depind] = regdeps[--regdepslen];
10502 }
10503 else
10504 ++depind;
10505 }
10506 }
10507 }
800eeca4 10508 /* Any marked resources which have this same predicate should be
542d6675
KH		 10509 cleared, provided that the QP hasn't been modified between the
10510 marking instruction and the branch. */
800eeca4 10511 if (is_call)
542d6675
KH		 10512 {
10513 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10514 }
800eeca4 10515 else
542d6675
KH		 10516 {
10517 i = 0;
10518 while (i < regdepslen)
10519 {
10520 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10521 && regdeps[i].link_to_qp_branch
10522 && (regdeps[i].file != CURR_SLOT.src_file
10523 || regdeps[i].line != CURR_SLOT.src_line))
10524 {
10525 /* Treat like a taken branch */
10526 print_dependency ("Removing", i);
10527 regdeps[i] = regdeps[--regdepslen];
10528 }
10529 else
10530 ++i;
10531 }
10532 }
800eeca4
JW		 10533 }
10534}
10535
10536/* Examine the current instruction for dependency violations. */
542d6675 10537
800eeca4
JW		 10538static int
10539check_dv (idesc)
542d6675 10540 struct ia64_opcode *idesc;
800eeca4
JW		 10541{
10542 if (md.debug_dv)
10543 {
197865e8 10544 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10545 idesc->name, CURR_SLOT.src_line,
10546 idesc->dependencies->nchks,
10547 idesc->dependencies->nregs);
800eeca4
JW		 10548 }
10549
197865e8 10550 /* Look through the list of currently marked resources; if the current
800eeca4 10551 instruction has the dependency in its chks list which uses that resource,
542d6675 10552 check against the specific resources used. */
800eeca4
JW		 10553 check_dependencies (idesc);
10554
542d6675
KH		 10555 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10556 then add them to the list of marked resources. */
800eeca4
JW		 10557 mark_resources (idesc);
10558
10559 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10560 requirements for being cleared
10561
800eeca4
JW		 10562 Instruction serialization (insns separated by interruption, rfi, or
10563 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10564
10565 Data serialization (instruction serialization, or writer + srlz.d +
10566 reader, where writer and srlz.d are in separate groups) clears
10567 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10568 always be the case).
10569
10570 Instruction group break (groups separated by stop, taken branch,
10571 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10572 */
10573 update_dependencies (idesc);
10574
10575 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10576 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10577 note_register_values (idesc);
10578
197865e8 10579 /* We don't need or want this anymore. */
800eeca4
JW		 10580 md.mem_offset.hint = 0;
10581
10582 return 0;
10583}
10584
10585/* Translate one line of assembly. Pseudo ops and labels do not show
10586 here. */
10587void
10588md_assemble (str)
10589 char *str;
10590{
10591 char *saved_input_line_pointer, *mnemonic;
10592 const struct pseudo_opcode *pdesc;
10593 struct ia64_opcode *idesc;
10594 unsigned char qp_regno;
10595 unsigned int flags;
10596 int ch;
10597
10598 saved_input_line_pointer = input_line_pointer;
10599 input_line_pointer = str;
10600
542d6675 10601 /* extract the opcode (mnemonic): */
800eeca4
JW		 10602
10603 mnemonic = input_line_pointer;
10604 ch = get_symbol_end ();
10605 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10606 if (pdesc)
10607 {
10608 *input_line_pointer = ch;
10609 (*pdesc->handler) (pdesc->arg);
10610 goto done;
10611 }
10612
542d6675 10613 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10614
10615 idesc = ia64_find_opcode (mnemonic);
10616 *input_line_pointer = ch;
10617 if (!idesc)
10618 {
10619 as_bad ("Unknown opcode `%s'", mnemonic);
10620 goto done;
10621 }
10622
10623 idesc = parse_operands (idesc);
10624 if (!idesc)
10625 goto done;
10626
542d6675 10627 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10628 if (idesc->type == IA64_TYPE_DYN)
10629 {
10630 if (strcmp (idesc->name, "add") == 0)
10631 {
10632 if (CURR_SLOT.opnd[2].X_op == O_register
10633 && CURR_SLOT.opnd[2].X_add_number < 4)
10634 mnemonic = "addl";
10635 else
10636 mnemonic = "adds";
3d56ab85 10637 ia64_free_opcode (idesc);
800eeca4 10638 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10639 }
10640 else if (strcmp (idesc->name, "mov") == 0)
10641 {
10642 enum ia64_opnd opnd1, opnd2;
10643 int rop;
10644
10645 opnd1 = idesc->operands[0];
10646 opnd2 = idesc->operands[1];
10647 if (opnd1 == IA64_OPND_AR3)
10648 rop = 0;
10649 else if (opnd2 == IA64_OPND_AR3)
10650 rop = 1;
10651 else
10652 abort ();
652ca075
L		 10653 if (CURR_SLOT.opnd[rop].X_op == O_register)
10654 {
10655 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10656 mnemonic = "mov.i";
97762d08 10657 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10658 mnemonic = "mov.m";
97762d08
JB		 10659 else
10660 rop = -1;
652ca075 10661 }
800eeca4 10662 else
652ca075 10663 abort ();
97762d08
JB		 10664 if (rop >= 0)
10665 {
10666 ia64_free_opcode (idesc);
10667 idesc = ia64_find_opcode (mnemonic);
10668 while (idesc != NULL
10669 && (idesc->operands[0] != opnd1
10670 || idesc->operands[1] != opnd2))
10671 idesc = get_next_opcode (idesc);
10672 }
800eeca4
JW		 10673 }
10674 }
652ca075
L		 10675 else if (strcmp (idesc->name, "mov.i") == 0
10676 || strcmp (idesc->name, "mov.m") == 0)
10677 {
10678 enum ia64_opnd opnd1, opnd2;
10679 int rop;
10680
10681 opnd1 = idesc->operands[0];
10682 opnd2 = idesc->operands[1];
10683 if (opnd1 == IA64_OPND_AR3)
10684 rop = 0;
10685 else if (opnd2 == IA64_OPND_AR3)
10686 rop = 1;
10687 else
10688 abort ();
10689 if (CURR_SLOT.opnd[rop].X_op == O_register)
10690 {
10691 char unit = 'a';
10692 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10693 unit = 'i';
10694 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10695 unit = 'm';
10696 if (unit != 'a' && unit != idesc->name [4])
10697 as_bad ("AR %d cannot be accessed by %c-unit",
10698 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10699 TOUPPER (unit));
10700 }
10701 }
91d777ee
L		 10702 else if (strcmp (idesc->name, "hint.b") == 0)
10703 {
10704 switch (md.hint_b)
10705 {
10706 case hint_b_ok:
10707 break;
10708 case hint_b_warning:
10709 as_warn ("hint.b may be treated as nop");
10710 break;
10711 case hint_b_error:
10712 as_bad ("hint.b shouldn't be used");
10713 break;
10714 }
10715 }
800eeca4
JW		 10716
10717 qp_regno = 0;
10718 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10719 {
10720 qp_regno = md.qp.X_add_number - REG_P;
10721 md.qp.X_op = O_absent;
10722 }
800eeca4
JW		 10723
10724 flags = idesc->flags;
10725
10726 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10727 {
10728 /* The alignment frag has to end with a stop bit only if the
10729 next instruction after the alignment directive has to be
10730 the first instruction in an instruction group. */
10731 if (align_frag)
10732 {
10733 while (align_frag->fr_type != rs_align_code)
10734 {
10735 align_frag = align_frag->fr_next;
bae25f19
L		 10736 if (!align_frag)
10737 break;
9545c4ce 10738 }
bae25f19
L		 10739 /* align_frag can be NULL if there are directives in
10740 between. */
10741 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10742 align_frag->tc_frag_data = 1;
10743 }
10744
10745 insn_group_break (1, 0, 0);
10746 }
10747 align_frag = NULL;
800eeca4
JW		 10748
10749 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10750 {
10751 as_bad ("`%s' cannot be predicated", idesc->name);
10752 goto done;
10753 }
10754
542d6675 10755 /* Build the instruction. */
800eeca4
JW		 10756 CURR_SLOT.qp_regno = qp_regno;
10757 CURR_SLOT.idesc = idesc;
10758 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10759 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4
JW		 10760
10761 /* Add unwind entry, if there is one. */
e0c9811a 10762 if (unwind.current_entry)
800eeca4 10763 {
e0c9811a
JW		 10764 CURR_SLOT.unwind_record = unwind.current_entry;
10765 unwind.current_entry = NULL;
800eeca4 10766 }
75e09913
JB		 10767 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10768 unwind.insn = 1;
800eeca4 10769
542d6675 10770 /* Check for dependency violations. */
800eeca4 10771 if (md.detect_dv)
542d6675 10772 check_dv (idesc);
800eeca4
JW		 10773
10774 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10775 if (++md.num_slots_in_use >= NUM_SLOTS)
10776 emit_one_bundle ();
10777
10778 if ((flags & IA64_OPCODE_LAST) != 0)
10779 insn_group_break (1, 0, 0);
10780
10781 md.last_text_seg = now_seg;
10782
10783 done:
10784 input_line_pointer = saved_input_line_pointer;
10785}
10786
10787/* Called when symbol NAME cannot be found in the symbol table.
10788 Should be used for dynamic valued symbols only. */
542d6675
KH		 10789
10790symbolS *
800eeca4 10791md_undefined_symbol (name)
2434f565 10792 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10793{
10794 return 0;
10795}
10796
10797/* Called for any expression that can not be recognized. When the
10798 function is called, `input_line_pointer' will point to the start of
10799 the expression. */
542d6675 10800
800eeca4
JW		 10801void
10802md_operand (e)
10803 expressionS *e;
10804{
800eeca4
JW		 10805 switch (*input_line_pointer)
10806 {
800eeca4
JW		 10807 case '[':
10808 ++input_line_pointer;
10809 expression (e);
10810 if (*input_line_pointer != ']')
10811 {
16a48f83 10812 as_bad ("Closing bracket missing");
800eeca4
JW		 10813 goto err;
10814 }
10815 else
10816 {
10817 if (e->X_op != O_register)
10818 as_bad ("Register expected as index");
10819
10820 ++input_line_pointer;
10821 e->X_op = O_index;
10822 }
10823 break;
10824
10825 default:
10826 break;
10827 }
10828 return;
10829
10830 err:
10831 ignore_rest_of_line ();
10832}
10833
10834/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10835 a section symbol plus some offset. For relocs involving @fptr(),
10836 directives we don't want such adjustments since we need to have the
10837 original symbol's name in the reloc. */
10838int
10839ia64_fix_adjustable (fix)
10840 fixS *fix;
10841{
10842 /* Prevent all adjustments to global symbols */
10843 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10844 return 0;
10845
10846 switch (fix->fx_r_type)
10847 {
10848 case BFD_RELOC_IA64_FPTR64I:
10849 case BFD_RELOC_IA64_FPTR32MSB:
10850 case BFD_RELOC_IA64_FPTR32LSB:
10851 case BFD_RELOC_IA64_FPTR64MSB:
10852 case BFD_RELOC_IA64_FPTR64LSB:
10853 case BFD_RELOC_IA64_LTOFF_FPTR22:
10854 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10855 return 0;
10856 default:
10857 break;
10858 }
10859
10860 return 1;
10861}
10862
10863int
10864ia64_force_relocation (fix)
10865 fixS *fix;
10866{
10867 switch (fix->fx_r_type)
10868 {
10869 case BFD_RELOC_IA64_FPTR64I:
10870 case BFD_RELOC_IA64_FPTR32MSB:
10871 case BFD_RELOC_IA64_FPTR32LSB:
10872 case BFD_RELOC_IA64_FPTR64MSB:
10873 case BFD_RELOC_IA64_FPTR64LSB:
10874
10875 case BFD_RELOC_IA64_LTOFF22:
10876 case BFD_RELOC_IA64_LTOFF64I:
10877 case BFD_RELOC_IA64_LTOFF_FPTR22:
10878 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10879 case BFD_RELOC_IA64_PLTOFF22:
10880 case BFD_RELOC_IA64_PLTOFF64I:
10881 case BFD_RELOC_IA64_PLTOFF64MSB:
10882 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 10883
10884 case BFD_RELOC_IA64_LTOFF22X:
10885 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 10886 return 1;
10887
10888 default:
a161fe53 10889 break;
800eeca4 10890 }
a161fe53 10891
ae6063d4 10892 return generic_force_reloc (fix);
800eeca4
JW		 10893}
10894
10895/* Decide from what point a pc-relative relocation is relative to,
10896 relative to the pc-relative fixup. Er, relatively speaking. */
10897long
10898ia64_pcrel_from_section (fix, sec)
10899 fixS *fix;
10900 segT sec;
10901{
10902 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 10903
800eeca4
JW		 10904 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10905 off &= ~0xfUL;
10906
10907 return off;
10908}
10909
6174d9c8
RH		 10910
10911/* Used to emit section-relative relocs for the dwarf2 debug data. */
10912void
10913ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10914{
10915 expressionS expr;
10916
10917 expr.X_op = O_pseudo_fixup;
10918 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10919 expr.X_add_number = 0;
10920 expr.X_add_symbol = symbol;
10921 emit_expr (&expr, size);
10922}
10923
800eeca4
JW		 10924/* This is called whenever some data item (not an instruction) needs a
10925 fixup. We pick the right reloc code depending on the byteorder
10926 currently in effect. */
10927void
10928ia64_cons_fix_new (f, where, nbytes, exp)
10929 fragS *f;
10930 int where;
10931 int nbytes;
10932 expressionS *exp;
10933{
10934 bfd_reloc_code_real_type code;
10935 fixS *fix;
10936
10937 switch (nbytes)
10938 {
10939 /* There are no reloc for 8 and 16 bit quantities, but we allow
10940 them here since they will work fine as long as the expression
10941 is fully defined at the end of the pass over the source file. */
10942 case 1: code = BFD_RELOC_8; break;
10943 case 2: code = BFD_RELOC_16; break;
10944 case 4:
10945 if (target_big_endian)
10946 code = BFD_RELOC_IA64_DIR32MSB;
10947 else
10948 code = BFD_RELOC_IA64_DIR32LSB;
10949 break;
10950
10951 case 8:
40449e9f 10952 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 10953 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 10954 && exp->X_op_symbol
10955 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10956 && !(md.flags & EF_IA_64_ABI64))
10957 {
10958 if (target_big_endian)
10959 code = BFD_RELOC_IA64_IPLTMSB;
10960 else
10961 code = BFD_RELOC_IA64_IPLTLSB;
10962 exp->X_op = O_symbol;
10963 break;
10964 }
10965 else
10966 {
10967 if (target_big_endian)
10968 code = BFD_RELOC_IA64_DIR64MSB;
10969 else
10970 code = BFD_RELOC_IA64_DIR64LSB;
10971 break;
10972 }
800eeca4 10973
3969b680
RH		 10974 case 16:
10975 if (exp->X_op == O_pseudo_fixup
10976 && exp->X_op_symbol
10977 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10978 {
10979 if (target_big_endian)
10980 code = BFD_RELOC_IA64_IPLTMSB;
10981 else
10982 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 10983 exp->X_op = O_symbol;
10984 break;
10985 }
10986 /* FALLTHRU */
10987
800eeca4
JW		 10988 default:
10989 as_bad ("Unsupported fixup size %d", nbytes);
10990 ignore_rest_of_line ();
10991 return;
10992 }
6174d9c8 10993
800eeca4
JW		 10994 if (exp->X_op == O_pseudo_fixup)
10995 {
800eeca4
JW		 10996 exp->X_op = O_symbol;
10997 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 10998 /* ??? If code unchanged, unsupported. */
800eeca4 10999 }
3969b680 11000
800eeca4
JW		 11001 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11002 /* We need to store the byte order in effect in case we're going
11003 to fix an 8 or 16 bit relocation (for which there no real
94f592af 11004 relocs available). See md_apply_fix3(). */
800eeca4
JW		 11005 fix->tc_fix_data.bigendian = target_big_endian;
11006}
11007
11008/* Return the actual relocation we wish to associate with the pseudo
11009 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 11010 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 11011
11012static bfd_reloc_code_real_type
11013ia64_gen_real_reloc_type (sym, r_type)
11014 struct symbol *sym;
11015 bfd_reloc_code_real_type r_type;
11016{
11017 bfd_reloc_code_real_type new = 0;
0ca3e455 11018 const char *type = NULL, *suffix = "";
800eeca4
JW		 11019
11020 if (sym == NULL)
11021 {
11022 return r_type;
11023 }
11024
11025 switch (S_GET_VALUE (sym))
11026 {
11027 case FUNC_FPTR_RELATIVE:
11028 switch (r_type)
11029 {
11030 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11031 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11032 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11033 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11034 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
0ca3e455 11035 default: type = "FPTR"; break;
800eeca4
JW		 11036 }
11037 break;
11038
11039 case FUNC_GP_RELATIVE:
11040 switch (r_type)
11041 {
11042 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11043 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11044 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11045 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11046 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11047 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
0ca3e455 11048 default: type = "GPREL"; break;
800eeca4
JW		 11049 }
11050 break;
11051
11052 case FUNC_LT_RELATIVE:
11053 switch (r_type)
11054 {
11055 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11056 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
0ca3e455 11057 default: type = "LTOFF"; break;
800eeca4
JW		 11058 }
11059 break;
11060
fa2c7eff
RH		 11061 case FUNC_LT_RELATIVE_X:
11062 switch (r_type)
11063 {
11064 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
0ca3e455 11065 default: type = "LTOFF"; suffix = "X"; break;
fa2c7eff
RH		 11066 }
11067 break;
11068
c67e42c9
RH		 11069 case FUNC_PC_RELATIVE:
11070 switch (r_type)
11071 {
11072 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11073 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11074 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11075 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11076 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11077 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
0ca3e455 11078 default: type = "PCREL"; break;
c67e42c9
RH		 11079 }
11080 break;
11081
800eeca4
JW		 11082 case FUNC_PLT_RELATIVE:
11083 switch (r_type)
11084 {
11085 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11086 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11087 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11088 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
0ca3e455 11089 default: type = "PLTOFF"; break;
800eeca4
JW		 11090 }
11091 break;
11092
11093 case FUNC_SEC_RELATIVE:
11094 switch (r_type)
11095 {
11096 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11097 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11098 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11099 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
0ca3e455 11100 default: type = "SECREL"; break;
800eeca4
JW		 11101 }
11102 break;
11103
11104 case FUNC_SEG_RELATIVE:
11105 switch (r_type)
11106 {
11107 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11108 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11109 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11110 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
0ca3e455 11111 default: type = "SEGREL"; break;
800eeca4
JW		 11112 }
11113 break;
11114
11115 case FUNC_LTV_RELATIVE:
11116 switch (r_type)
11117 {
11118 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11119 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11120 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11121 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
0ca3e455 11122 default: type = "LTV"; break;
800eeca4
JW		 11123 }
11124 break;
11125
11126 case FUNC_LT_FPTR_RELATIVE:
11127 switch (r_type)
11128 {
11129 case BFD_RELOC_IA64_IMM22:
11130 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11131 case BFD_RELOC_IA64_IMM64:
11132 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
0ca3e455
JB		 11133 case BFD_RELOC_IA64_DIR32MSB:
11134 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11135 case BFD_RELOC_IA64_DIR32LSB:
11136 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11137 case BFD_RELOC_IA64_DIR64MSB:
11138 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11139 case BFD_RELOC_IA64_DIR64LSB:
11140 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
800eeca4 11141 default:
0ca3e455 11142 type = "LTOFF_FPTR"; break;
800eeca4
JW		 11143 }
11144 break;
3969b680 11145
13ae64f3
JJ		 11146 case FUNC_TP_RELATIVE:
11147 switch (r_type)
11148 {
0ca3e455
JB		 11149 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11150 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11151 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11152 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11153 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11154 default: type = "TPREL"; break;
13ae64f3
JJ		 11155 }
11156 break;
11157
11158 case FUNC_LT_TP_RELATIVE:
11159 switch (r_type)
11160 {
11161 case BFD_RELOC_IA64_IMM22:
11162 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11163 default:
0ca3e455
JB		 11164 type = "LTOFF_TPREL"; break;
11165 }
11166 break;
11167
11168 case FUNC_DTP_MODULE:
11169 switch (r_type)
11170 {
11171 case BFD_RELOC_IA64_DIR64MSB:
11172 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11173 case BFD_RELOC_IA64_DIR64LSB:
11174 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11175 default:
11176 type = "DTPMOD"; break;
13ae64f3
JJ		 11177 }
11178 break;
11179
11180 case FUNC_LT_DTP_MODULE:
11181 switch (r_type)
11182 {
11183 case BFD_RELOC_IA64_IMM22:
11184 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11185 default:
0ca3e455 11186 type = "LTOFF_DTPMOD"; break;
13ae64f3
JJ		 11187 }
11188 break;
11189
11190 case FUNC_DTP_RELATIVE:
11191 switch (r_type)
11192 {
0ca3e455
JB		 11193 case BFD_RELOC_IA64_DIR32MSB:
11194 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11195 case BFD_RELOC_IA64_DIR32LSB:
11196 new = BFD_RELOC_IA64_DTPREL32LSB; break;
6174d9c8
RH		 11197 case BFD_RELOC_IA64_DIR64MSB:
11198 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11199 case BFD_RELOC_IA64_DIR64LSB:
11200 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 11201 case BFD_RELOC_IA64_IMM14:
11202 new = BFD_RELOC_IA64_DTPREL14; break;
11203 case BFD_RELOC_IA64_IMM22:
11204 new = BFD_RELOC_IA64_DTPREL22; break;
11205 case BFD_RELOC_IA64_IMM64:
11206 new = BFD_RELOC_IA64_DTPREL64I; break;
11207 default:
0ca3e455 11208 type = "DTPREL"; break;
13ae64f3
JJ		 11209 }
11210 break;
11211
11212 case FUNC_LT_DTP_RELATIVE:
11213 switch (r_type)
11214 {
11215 case BFD_RELOC_IA64_IMM22:
11216 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11217 default:
0ca3e455 11218 type = "LTOFF_DTPREL"; break;
13ae64f3
JJ		 11219 }
11220 break;
11221
40449e9f 11222 case FUNC_IPLT_RELOC:
0ca3e455
JB		 11223 switch (r_type)
11224 {
11225 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11226 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11227 default: type = "IPLT"; break;
11228 }
40449e9f 11229 break;
1cd8ff38 11230
800eeca4
JW		 11231 default:
11232 abort ();
11233 }
6174d9c8 11234
800eeca4
JW		 11235 if (new)
11236 return new;
11237 else
0ca3e455
JB		 11238 {
11239 int width;
11240
11241 if (!type)
11242 abort ();
11243 switch (r_type)
11244 {
11245 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11246 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11247 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11248 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
11249 case BFD_RELOC_IA64_IMM14: width = 14; break;
11250 case BFD_RELOC_IA64_IMM22: width = 22; break;
11251 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11252 default: abort ();
11253 }
11254
11255 /* This should be an error, but since previously there wasn't any
11256 diagnostic here, dont't make it fail because of this for now. */
11257 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11258 return r_type;
11259 }
800eeca4
JW		 11260}
11261
11262/* Here is where generate the appropriate reloc for pseudo relocation
11263 functions. */
11264void
11265ia64_validate_fix (fix)
11266 fixS *fix;
11267{
11268 switch (fix->fx_r_type)
11269 {
11270 case BFD_RELOC_IA64_FPTR64I:
11271 case BFD_RELOC_IA64_FPTR32MSB:
11272 case BFD_RELOC_IA64_FPTR64LSB:
11273 case BFD_RELOC_IA64_LTOFF_FPTR22:
11274 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11275 if (fix->fx_offset != 0)
11276 as_bad_where (fix->fx_file, fix->fx_line,
11277 "No addend allowed in @fptr() relocation");
11278 break;
11279 default:
11280 break;
11281 }
800eeca4
JW		 11282}
11283
11284static void
11285fix_insn (fix, odesc, value)
11286 fixS *fix;
11287 const struct ia64_operand *odesc;
11288 valueT value;
11289{
11290 bfd_vma insn[3], t0, t1, control_bits;
11291 const char *err;
11292 char *fixpos;
11293 long slot;
11294
11295 slot = fix->fx_where & 0x3;
11296 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11297
c67e42c9 11298 /* Bundles are always in little-endian byte order */
800eeca4
JW		 11299 t0 = bfd_getl64 (fixpos);
11300 t1 = bfd_getl64 (fixpos + 8);
11301 control_bits = t0 & 0x1f;
11302 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11303 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11304 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11305
c67e42c9
RH		 11306 err = NULL;
11307 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 11308 {
c67e42c9
RH		 11309 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11310 insn[2] |= (((value & 0x7f) << 13)
11311 | (((value >> 7) & 0x1ff) << 27)
11312 | (((value >> 16) & 0x1f) << 22)
11313 | (((value >> 21) & 0x1) << 21)
11314 | (((value >> 63) & 0x1) << 36));
800eeca4 11315 }
c67e42c9
RH		 11316 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11317 {
11318 if (value & ~0x3fffffffffffffffULL)
11319 err = "integer operand out of range";
11320 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11321 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11322 }
11323 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11324 {
11325 value >>= 4;
11326 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11327 insn[2] |= ((((value >> 59) & 0x1) << 36)
11328 | (((value >> 0) & 0xfffff) << 13));
11329 }
11330 else
11331 err = (*odesc->insert) (odesc, value, insn + slot);
11332
11333 if (err)
11334 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 11335
11336 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11337 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 11338 number_to_chars_littleendian (fixpos + 0, t0, 8);
11339 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 11340}
11341
11342/* Attempt to simplify or even eliminate a fixup. The return value is
11343 ignored; perhaps it was once meaningful, but now it is historical.
11344 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11345
11346 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 11347 (if possible). */
94f592af
NC		 11348
11349void
11350md_apply_fix3 (fix, valP, seg)
800eeca4 11351 fixS *fix;
40449e9f 11352 valueT *valP;
2434f565 11353 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 11354{
11355 char *fixpos;
40449e9f 11356 valueT value = *valP;
800eeca4
JW		 11357
11358 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11359
11360 if (fix->fx_pcrel)
11361 {
7b347e43
JB		 11362 switch (fix->fx_r_type)
11363 {
11364 case BFD_RELOC_IA64_PCREL21B: break;
11365 case BFD_RELOC_IA64_PCREL21BI: break;
11366 case BFD_RELOC_IA64_PCREL21F: break;
11367 case BFD_RELOC_IA64_PCREL21M: break;
11368 case BFD_RELOC_IA64_PCREL60B: break;
11369 case BFD_RELOC_IA64_PCREL22: break;
11370 case BFD_RELOC_IA64_PCREL64I: break;
11371 case BFD_RELOC_IA64_PCREL32MSB: break;
11372 case BFD_RELOC_IA64_PCREL32LSB: break;
11373 case BFD_RELOC_IA64_PCREL64MSB: break;
11374 case BFD_RELOC_IA64_PCREL64LSB: break;
11375 default:
11376 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11377 fix->fx_r_type);
11378 break;
11379 }
800eeca4
JW		 11380 }
11381 if (fix->fx_addsy)
11382 {
00f7efb6 11383 switch (fix->fx_r_type)
800eeca4 11384 {
00f7efb6 11385 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 11386 /* This must be a TAG13 or TAG13b operand. There are no external
11387 relocs defined for them, so we must give an error. */
800eeca4
JW		 11388 as_bad_where (fix->fx_file, fix->fx_line,
11389 "%s must have a constant value",
11390 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 11391 fix->fx_done = 1;
94f592af 11392 return;
00f7efb6
JJ		 11393
11394 case BFD_RELOC_IA64_TPREL14:
11395 case BFD_RELOC_IA64_TPREL22:
11396 case BFD_RELOC_IA64_TPREL64I:
11397 case BFD_RELOC_IA64_LTOFF_TPREL22:
11398 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11399 case BFD_RELOC_IA64_DTPREL14:
11400 case BFD_RELOC_IA64_DTPREL22:
11401 case BFD_RELOC_IA64_DTPREL64I:
11402 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11403 S_SET_THREAD_LOCAL (fix->fx_addsy);
11404 break;
7925dd68
JJ		 11405
11406 default:
11407 break;
800eeca4 11408 }
800eeca4
JW		 11409 }
11410 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11411 {
11412 if (fix->tc_fix_data.bigendian)
11413 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11414 else
11415 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11416 fix->fx_done = 1;
800eeca4
JW		 11417 }
11418 else
11419 {
11420 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11421 fix->fx_done = 1;
800eeca4 11422 }
800eeca4
JW		 11423}
11424
11425/* Generate the BFD reloc to be stuck in the object file from the
11426 fixup used internally in the assembler. */
542d6675
KH		 11427
11428arelent *
800eeca4 11429tc_gen_reloc (sec, fixp)
2434f565 11430 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 11431 fixS *fixp;
11432{
11433 arelent *reloc;
11434
11435 reloc = xmalloc (sizeof (*reloc));
11436 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11437 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11438 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11439 reloc->addend = fixp->fx_offset;
11440 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11441
11442 if (!reloc->howto)
11443 {
11444 as_bad_where (fixp->fx_file, fixp->fx_line,
11445 "Cannot represent %s relocation in object file",
11446 bfd_get_reloc_code_name (fixp->fx_r_type));
11447 }
11448 return reloc;
11449}
11450
11451/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11452 of type TYPE, and store the appropriate bytes in *LIT. The number
11453 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11454 returned, or NULL on OK. */
11455
11456#define MAX_LITTLENUMS 5
11457
542d6675 11458char *
800eeca4
JW		 11459md_atof (type, lit, size)
11460 int type;
11461 char *lit;
11462 int *size;
11463{
11464 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11465 char *t;
11466 int prec;
11467
11468 switch (type)
11469 {
11470 /* IEEE floats */
11471 case 'f':
11472 case 'F':
11473 case 's':
11474 case 'S':
11475 prec = 2;
11476 break;
11477
11478 case 'd':
11479 case 'D':
11480 case 'r':
11481 case 'R':
11482 prec = 4;
11483 break;
11484
11485 case 'x':
11486 case 'X':
11487 case 'p':
11488 case 'P':
11489 prec = 5;
11490 break;
11491
11492 default:
11493 *size = 0;
11494 return "Bad call to MD_ATOF()";
11495 }
11496 t = atof_ieee (input_line_pointer, type, words);
11497 if (t)
11498 input_line_pointer = t;
800eeca4 11499
10a98291
L		 11500 (*ia64_float_to_chars) (lit, words, prec);
11501
165a7f90
L		 11502 if (type == 'X')
11503 {
11504 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11505 memset (&lit [10], 0, 6);
165a7f90
L		 11506 *size = 8 * sizeof (LITTLENUM_TYPE);
11507 }
10a98291
L		 11508 else
11509 *size = prec * sizeof (LITTLENUM_TYPE);
11510
800eeca4
JW		 11511 return 0;
11512}
11513
800eeca4
JW		 11514/* Handle ia64 specific semantics of the align directive. */
11515
0a9ef439 11516void
800eeca4 11517ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11518 int n ATTRIBUTE_UNUSED;
11519 const char *fill ATTRIBUTE_UNUSED;
2434f565 11520 int len ATTRIBUTE_UNUSED;
91a2ae2a 11521 int max ATTRIBUTE_UNUSED;
800eeca4 11522{
0a9ef439 11523 if (subseg_text_p (now_seg))
800eeca4 11524 ia64_flush_insns ();
0a9ef439 11525}
800eeca4 11526
0a9ef439
RH		 11527/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11528 of an rs_align_code fragment. */
800eeca4 11529
0a9ef439
RH		 11530void
11531ia64_handle_align (fragp)
11532 fragS *fragp;
11533{
0a9ef439
RH		 11534 int bytes;
11535 char *p;
9545c4ce 11536 const unsigned char *nop;
0a9ef439
RH		 11537
11538 if (fragp->fr_type != rs_align_code)
11539 return;
11540
9545c4ce
L		 11541 /* Check if this frag has to end with a stop bit. */
11542 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11543
0a9ef439
RH		 11544 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11545 p = fragp->fr_literal + fragp->fr_fix;
11546
d9201763
L		 11547 /* If no paddings are needed, we check if we need a stop bit. */
11548 if (!bytes && fragp->tc_frag_data)
11549 {
11550 if (fragp->fr_fix < 16)
bae25f19
L		 11551#if 1
11552 /* FIXME: It won't work with
11553 .align 16
11554 alloc r32=ar.pfs,1,2,4,0
11555 */
11556 ;
11557#else
d9201763
L		 11558 as_bad_where (fragp->fr_file, fragp->fr_line,
11559 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11560#endif
d9201763
L		 11561 else
11562 /* Bundles are always in little-endian byte order. Make sure
11563 the previous bundle has the stop bit. */
11564 *(p - 16) |= 1;
11565 }
11566
0a9ef439
RH		 11567 /* Make sure we are on a 16-byte boundary, in case someone has been
11568 putting data into a text section. */
11569 if (bytes & 15)
11570 {
11571 int fix = bytes & 15;
11572 memset (p, 0, fix);
11573 p += fix;
11574 bytes -= fix;
11575 fragp->fr_fix += fix;
800eeca4
JW		 11576 }
11577
012a452b 11578 /* Instruction bundles are always little-endian. */
9545c4ce 11579 memcpy (p, nop, 16);
0a9ef439 11580 fragp->fr_var = 16;
800eeca4 11581}
10a98291
L		 11582
11583static void
11584ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11585 int prec)
11586{
11587 while (prec--)
11588 {
11589 number_to_chars_bigendian (lit, (long) (*words++),
11590 sizeof (LITTLENUM_TYPE));
11591 lit += sizeof (LITTLENUM_TYPE);
11592 }
11593}
11594
11595static void
11596ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11597 int prec)
11598{
11599 while (prec--)
11600 {
11601 number_to_chars_littleendian (lit, (long) (words[prec]),
11602 sizeof (LITTLENUM_TYPE));
11603 lit += sizeof (LITTLENUM_TYPE);
11604 }
11605}
11606
11607void
11608ia64_elf_section_change_hook (void)
11609{
38ce5b11
L		 11610 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11611 && elf_linked_to_section (now_seg) == NULL)
11612 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11613 dot_byteorder (-1);
11614}
a645d1eb
L		 11615
11616/* Check if a label should be made global. */
11617void
11618ia64_check_label (symbolS *label)
11619{
11620 if (*input_line_pointer == ':')
11621 {
11622 S_SET_EXTERNAL (label);
11623 input_line_pointer++;
11624 }
11625}
35f5df7f
L		 11626
11627/* Used to remember where .alias and .secalias directives are seen. We
11628 will rename symbol and section names when we are about to output
11629 the relocatable file. */
11630struct alias
11631{
11632 char *file; /* The file where the directive is seen. */
11633 unsigned int line; /* The line number the directive is at. */
11634 const char *name; /* The orignale name of the symbol. */
11635};
11636
11637/* Called for .alias and .secalias directives. If SECTION is 1, it is
11638 .secalias. Otherwise, it is .alias. */
11639static void
11640dot_alias (int section)
11641{
11642 char *name, *alias;
11643 char delim;
11644 char *end_name;
11645 int len;
11646 const char *error_string;
11647 struct alias *h;
11648 const char *a;
11649 struct hash_control *ahash, *nhash;
11650 const char *kind;
11651
11652 name = input_line_pointer;
11653 delim = get_symbol_end ();
11654 end_name = input_line_pointer;
11655 *end_name = delim;
11656
11657 if (name == end_name)
11658 {
11659 as_bad (_("expected symbol name"));
11660 discard_rest_of_line ();
11661 return;
11662 }
11663
11664 SKIP_WHITESPACE ();
11665
11666 if (*input_line_pointer != ',')
11667 {
11668 *end_name = 0;
11669 as_bad (_("expected comma after \"%s\""), name);
11670 *end_name = delim;
11671 ignore_rest_of_line ();
11672 return;
11673 }
11674
11675 input_line_pointer++;
11676 *end_name = 0;
20b36a95 11677 ia64_canonicalize_symbol_name (name);
35f5df7f
L		 11678
11679 /* We call demand_copy_C_string to check if alias string is valid.
11680 There should be a closing `"' and no `\0' in the string. */
11681 alias = demand_copy_C_string (&len);
11682 if (alias == NULL)
11683 {
11684 ignore_rest_of_line ();
11685 return;
11686 }
11687
11688 /* Make a copy of name string. */
11689 len = strlen (name) + 1;
11690 obstack_grow (&notes, name, len);
11691 name = obstack_finish (&notes);
11692
11693 if (section)
11694 {
11695 kind = "section";
11696 ahash = secalias_hash;
11697 nhash = secalias_name_hash;
11698 }
11699 else
11700 {
11701 kind = "symbol";
11702 ahash = alias_hash;
11703 nhash = alias_name_hash;
11704 }
11705
11706 /* Check if alias has been used before. */
11707 h = (struct alias *) hash_find (ahash, alias);
11708 if (h)
11709 {
11710 if (strcmp (h->name, name))
11711 as_bad (_("`%s' is already the alias of %s `%s'"),
11712 alias, kind, h->name);
11713 goto out;
11714 }
11715
11716 /* Check if name already has an alias. */
11717 a = (const char *) hash_find (nhash, name);
11718 if (a)
11719 {
11720 if (strcmp (a, alias))
11721 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11722 goto out;
11723 }
11724
11725 h = (struct alias *) xmalloc (sizeof (struct alias));
11726 as_where (&h->file, &h->line);
11727 h->name = name;
11728
11729 error_string = hash_jam (ahash, alias, (PTR) h);
11730 if (error_string)
11731 {
11732 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11733 alias, kind, error_string);
11734 goto out;
11735 }
11736
11737 error_string = hash_jam (nhash, name, (PTR) alias);
11738 if (error_string)
11739 {
11740 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11741 alias, kind, error_string);
11742out:
11743 obstack_free (&notes, name);
11744 obstack_free (&notes, alias);
11745 }
11746
11747 demand_empty_rest_of_line ();
11748}
11749
11750/* It renames the original symbol name to its alias. */
11751static void
11752do_alias (const char *alias, PTR value)
11753{
11754 struct alias *h = (struct alias *) value;
11755 symbolS *sym = symbol_find (h->name);
11756
11757 if (sym == NULL)
11758 as_warn_where (h->file, h->line,
11759 _("symbol `%s' aliased to `%s' is not used"),
11760 h->name, alias);
11761 else
11762 S_SET_NAME (sym, (char *) alias);
11763}
11764
11765/* Called from write_object_file. */
11766void
11767ia64_adjust_symtab (void)
11768{
11769 hash_traverse (alias_hash, do_alias);
11770}
11771
11772/* It renames the original section name to its alias. */
11773static void
11774do_secalias (const char *alias, PTR value)
11775{
11776 struct alias *h = (struct alias *) value;
11777 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11778
11779 if (sec == NULL)
11780 as_warn_where (h->file, h->line,
11781 _("section `%s' aliased to `%s' is not used"),
11782 h->name, alias);
11783 else
11784 sec->name = alias;
11785}
11786
11787/* Called from write_object_file. */
11788void
11789ia64_frob_file (void)
11790{
11791 hash_traverse (secalias_hash, do_secalias);
11792}
GDB Binutils - Deliverables
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