Cleanup of pseudo-ops for constants and new def24,def32 pseudo-ops on z80
[deliverable/binutils-gdb.git] / gas / config / tc-m32r.h
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252b5132 1/* tc-m32r.h -- Header file for tc-m32r.c.
aef6203b 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
f7e42eb4 3 Free Software Foundation, Inc.
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4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
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19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
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21
22#define TC_M32R
23
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24#define LISTING_HEADER \
25 (target_big_endian ? "M32R GAS" : "M32R GAS Little Endian")
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26
27/* The target BFD architecture. */
28#define TARGET_ARCH bfd_arch_m32r
29
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30/* The endianness of the target format may change based on command
31 line arguments. */
32#define TARGET_FORMAT m32r_target_format()
ea1562b3 33extern const char *m32r_target_format (void);
252b5132 34
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35/* Default to big endian. */
36#ifndef TARGET_BYTES_BIG_ENDIAN
252b5132 37#define TARGET_BYTES_BIG_ENDIAN 1
88845958 38#endif
252b5132 39
88845958 40/* Call md_pcrel_from_section, not md_pcrel_from. */
ea1562b3 41long md_pcrel_from_section (struct fix *, segT);
a161fe53 42#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section(FIX, SEC)
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43
44/* Permit temporary numeric labels. */
45#define LOCAL_LABELS_FB 1
46
ea1562b3 47#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs. */
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48
49/* We don't need to handle .word strangely. */
50#define WORKING_DOT_WORD
51
52/* For 8 vs 16 vs 32 bit branch selection. */
53extern const struct relax_type md_relax_table[];
54#define TC_GENERIC_RELAX_TABLE md_relax_table
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55
56extern long m32r_relax_frag (segT, fragS *, long);
c842b53a 57#define md_relax_frag(segment, fragP, stretch) \
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58 m32r_relax_frag (segment, fragP, stretch)
59
252b5132 60/* Account for nop if 32 bit insn falls on odd halfword boundary. */
ea1562b3 61#define TC_CGEN_MAX_RELAX(insn, len) 6
252b5132 62
0a9ef439 63/* Fill in rs_align_code fragments. */
ea1562b3 64extern void m32r_handle_align (fragS *);
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65#define HANDLE_ALIGN(f) m32r_handle_align (f)
66
67#define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2 + 4)
252b5132 68
55cf6793 69/* Values passed to md_apply_fix don't include the symbol value. */
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70#define MD_APPLY_SYM_VALUE(FIX) 0
71
55cf6793 72#define md_apply_fix gas_cgen_md_apply_fix
252b5132 73
a161fe53 74#define tc_fix_adjustable(FIX) m32r_fix_adjustable (FIX)
ea1562b3 75bfd_boolean m32r_fix_adjustable (struct fix *);
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76
77/* After creating a fixup for an instruction operand, we need to check for
78 HI16 relocs and queue them up for later sorting. */
79#define md_cgen_record_fixup_exp m32r_cgen_record_fixup_exp
80
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81#define TC_HANDLES_FX_DONE
82
83extern int pic_code;
84
ea1562b3 85extern bfd_boolean m32r_fix_adjustable (struct fix *);
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86
87/* This arranges for gas/write.c to not apply a relocation if
88 obj_fix_adjustable() says it is not adjustable. */
89#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP)
90
91#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
92 ((FIX)->fx_addsy == NULL \
93 || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
94 && ! S_IS_WEAK ((FIX)->fx_addsy) \
95 && S_IS_DEFINED ((FIX)->fx_addsy) \
96 && ! S_IS_COMMON ((FIX)->fx_addsy)))
252b5132 97
a161fe53 98#define tc_frob_file_before_fix() m32r_frob_file ()
ea1562b3 99extern void m32r_frob_file (void);
252b5132 100
a161fe53 101/* No shared lib support, so we don't need to ensure externally
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102 visible symbols can be overridden.
103#define EXTERN_FORCE_RELOC 0 */
a161fe53 104
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105/* When relaxing, we need to emit various relocs we otherwise wouldn't. */
106#define TC_FORCE_RELOCATION(fix) m32r_force_relocation (fix)
ea1562b3 107extern int m32r_force_relocation (struct fix *);
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108
109/* Ensure insns at labels are aligned to 32 bit boundaries. */
ea1562b3 110int m32r_fill_insn (int);
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111#define md_after_pass_hook() m32r_fill_insn (1)
112#define TC_START_LABEL(ch, ptr) (ch == ':' && m32r_fill_insn (0))
113
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114#define md_cleanup m32r_elf_section_change_hook
115#define md_elf_section_change_hook m32r_elf_section_change_hook
ea1562b3 116extern void m32r_elf_section_change_hook (void);
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117
118#define md_flush_pending_output() m32r_flush_pending_output ()
ea1562b3 119extern void m32r_flush_pending_output (void);
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120
121#define elf_tc_final_processing m32r_elf_final_processing
ea1562b3 122extern void m32r_elf_final_processing (void);
097f809a 123
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124#define md_parse_name(name, exprP, mode, nextcharP) \
125 m32r_parse_name ((name), (exprP), (mode), (nextcharP))
126extern int m32r_parse_name (char const *, expressionS *, enum expr_mode, char *);
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127
128/* This is used to construct expressions out of @GOTOFF, @PLT and @GOT
129 symbols. The relocation type is stored in X_md. */
130#define O_PIC_reloc O_md1
131
132#define TC_CGEN_PARSE_FIX_EXP(opinfo, exp) \
133 m32r_cgen_parse_fix_exp(opinfo, exp)
ea1562b3 134extern int m32r_cgen_parse_fix_exp (int, expressionS *);
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