Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-mcore.c -- Assemble code for M*Core |
f17c130b AM |
2 | Copyright 1999, 2000, 2001, 2002, 2003, 2005 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
d7f1f2b0 | 18 | along with GAS; see the file COPYING. If not, write to the Free |
4b4da160 NC |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
252b5132 RH |
21 | |
22 | #include <stdio.h> | |
23 | #include "as.h" | |
24 | #include "bfd.h" | |
25 | #include "subsegs.h" | |
26 | #define DEFINE_TABLE | |
27 | #include "../opcodes/mcore-opc.h" | |
3882b010 | 28 | #include "safe-ctype.h" |
252b5132 RH |
29 | #include <string.h> |
30 | ||
31 | #ifdef OBJ_ELF | |
32 | #include "elf/mcore.h" | |
33 | #endif | |
34 | ||
35 | #ifndef streq | |
36 | #define streq(a,b) (strcmp (a, b) == 0) | |
37 | #endif | |
38 | ||
39 | /* Forward declarations for dumb compilers. */ | |
252b5132 RH |
40 | |
41 | /* Several places in this file insert raw instructions into the | |
42 | object. They should use MCORE_INST_XXX macros to get the opcodes | |
43 | and then use these two macros to crack the MCORE_INST value into | |
44 | the appropriate byte values. */ | |
bec50466 NC |
45 | #define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) |
46 | #define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) | |
252b5132 RH |
47 | |
48 | const char comment_chars[] = "#/"; | |
49 | const char line_separator_chars[] = ";"; | |
50 | const char line_comment_chars[] = "#/"; | |
51 | ||
52 | const int md_reloc_size = 8; | |
53 | ||
eaa15ab8 | 54 | static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ |
252b5132 RH |
55 | static int sifilter_mode = 0; |
56 | ||
57 | const char EXP_CHARS[] = "eE"; | |
58 | ||
eaa15ab8 NC |
59 | /* Chars that mean this number is a floating point constant |
60 | As in 0f12.456 | |
61 | or 0d1.2345e12 */ | |
252b5132 RH |
62 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
63 | ||
64 | #define C(what,length) (((what) << 2) + (length)) | |
65 | #define GET_WHAT(x) ((x >> 2)) | |
66 | ||
ea1562b3 | 67 | /* These are the two types of relaxable instruction. */ |
252b5132 RH |
68 | #define COND_JUMP 1 |
69 | #define UNCD_JUMP 2 | |
70 | ||
71 | #define UNDEF_DISP 0 | |
93c2a809 AM |
72 | #define DISP12 1 |
73 | #define DISP32 2 | |
74 | #define UNDEF_WORD_DISP 3 | |
252b5132 RH |
75 | |
76 | #define C12_LEN 2 | |
ea1562b3 | 77 | #define C32_LEN 10 /* Allow for align. */ |
252b5132 | 78 | #define U12_LEN 2 |
ea1562b3 | 79 | #define U32_LEN 8 /* Allow for align. */ |
252b5132 | 80 | |
bec50466 NC |
81 | typedef enum |
82 | { | |
83 | M210, | |
84 | M340 | |
85 | } | |
86 | cpu_type; | |
87 | ||
88 | cpu_type cpu = M340; | |
252b5132 | 89 | |
eaa15ab8 | 90 | /* Initialize the relax table. */ |
ea1562b3 NC |
91 | const relax_typeS md_relax_table[] = |
92 | { | |
e66457fb AM |
93 | { 0, 0, 0, 0 }, |
94 | { 0, 0, 0, 0 }, | |
95 | { 0, 0, 0, 0 }, | |
96 | { 0, 0, 0, 0 }, | |
97 | ||
98 | /* COND_JUMP */ | |
99 | { 0, 0, 0, 0 }, /* UNDEF_DISP */ | |
100 | { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ | |
101 | { 0, 0, C32_LEN, 0 }, /* DISP32 */ | |
102 | { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ | |
103 | ||
104 | /* UNCD_JUMP */ | |
5d6255fe KH |
105 | { 0, 0, 0, 0 }, /* UNDEF_DISP */ |
106 | { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ | |
107 | { 0, 0, U32_LEN, 0 }, /* DISP32 */ | |
e66457fb AM |
108 | { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ |
109 | ||
252b5132 RH |
110 | }; |
111 | ||
eaa15ab8 | 112 | /* Literal pool data structures. */ |
252b5132 RH |
113 | struct literal |
114 | { | |
115 | unsigned short refcnt; | |
116 | unsigned char ispcrel; | |
117 | unsigned char unused; | |
118 | expressionS e; | |
119 | }; | |
120 | ||
121 | #define MAX_POOL_SIZE (1024/4) | |
122 | static struct literal litpool [MAX_POOL_SIZE]; | |
123 | static unsigned poolsize; | |
124 | static unsigned poolnumber; | |
125 | static unsigned long poolspan; | |
126 | ||
127 | /* SPANPANIC: the point at which we get too scared and force a dump | |
128 | of the literal pool, and perhaps put a branch in place. | |
129 | Calculated as: | |
130 | 1024 span of lrw/jmpi/jsri insn (actually span+1) | |
131 | -2 possible alignment at the insn. | |
132 | -2 possible alignment to get the table aligned. | |
133 | -2 an inserted branch around the table. | |
134 | == 1018 | |
135 | at 1018, we might be in trouble. | |
136 | -- so we have to be smaller than 1018 and since we deal with 2-byte | |
137 | instructions, the next good choice is 1016. | |
138 | -- Note we have a test case that fails when we've got 1018 here. */ | |
eaa15ab8 | 139 | #define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ |
252b5132 RH |
140 | #define SPANCLOSE (900) |
141 | #define SPANEXIT (600) | |
ea1562b3 | 142 | static symbolS * poolsym; /* Label for current pool. */ |
252b5132 | 143 | static char poolname[8]; |
eaa15ab8 | 144 | static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ |
252b5132 | 145 | |
ea1562b3 NC |
146 | #define POOL_END_LABEL ".LE" |
147 | #define POOL_START_LABEL ".LS" | |
148 | ||
149 | static void | |
150 | make_name (char * s, char * p, int n) | |
252b5132 | 151 | { |
ea1562b3 | 152 | static const char hex[] = "0123456789ABCDEF"; |
252b5132 | 153 | |
ea1562b3 NC |
154 | s[0] = p[0]; |
155 | s[1] = p[1]; | |
156 | s[2] = p[2]; | |
157 | s[3] = hex[(n >> 12) & 0xF]; | |
158 | s[4] = hex[(n >> 8) & 0xF]; | |
159 | s[5] = hex[(n >> 4) & 0xF]; | |
160 | s[6] = hex[(n) & 0xF]; | |
161 | s[7] = 0; | |
162 | } | |
252b5132 | 163 | |
ea1562b3 NC |
164 | static void |
165 | dump_literals (int isforce) | |
166 | { | |
167 | unsigned int i; | |
168 | struct literal * p; | |
169 | symbolS * brarsym = NULL; | |
a75214e5 | 170 | |
ea1562b3 NC |
171 | if (poolsize == 0) |
172 | return; | |
173 | ||
174 | /* Must we branch around the literal table? */ | |
175 | if (isforce) | |
176 | { | |
177 | char * output; | |
178 | char brarname[8]; | |
179 | ||
180 | make_name (brarname, POOL_END_LABEL, poolnumber); | |
181 | ||
182 | brarsym = symbol_make (brarname); | |
183 | ||
184 | symbol_table_insert (brarsym); | |
185 | ||
186 | output = frag_var (rs_machine_dependent, | |
187 | md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, | |
188 | md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, | |
189 | C (UNCD_JUMP, 0), brarsym, 0, 0); | |
190 | output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ | |
191 | output[1] = INST_BYTE1 (MCORE_INST_BR); | |
192 | } | |
193 | ||
194 | /* Make sure that the section is sufficiently aligned and that | |
195 | the literal table is aligned within it. */ | |
196 | record_alignment (now_seg, 2); | |
197 | frag_align (2, 0, 0); | |
198 | ||
199 | colon (S_GET_NAME (poolsym)); | |
200 | ||
201 | for (i = 0, p = litpool; i < poolsize; i++, p++) | |
202 | emit_expr (& p->e, 4); | |
203 | ||
204 | if (brarsym != NULL) | |
205 | colon (S_GET_NAME (brarsym)); | |
206 | ||
207 | poolsize = 0; | |
208 | } | |
252b5132 RH |
209 | |
210 | static void | |
ea1562b3 | 211 | mcore_s_literals (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
212 | { |
213 | dump_literals (0); | |
214 | demand_empty_rest_of_line (); | |
215 | } | |
216 | ||
5f8075fa AM |
217 | /* Perform FUNC (ARG), and track number of bytes added to frag. */ |
218 | ||
252b5132 | 219 | static void |
ea1562b3 | 220 | mcore_pool_count (void (*func) (int), int arg) |
252b5132 | 221 | { |
5f8075fa AM |
222 | const fragS *curr_frag = frag_now; |
223 | offsetT added = -frag_now_fix_octets (); | |
a75214e5 | 224 | |
5f8075fa | 225 | (*func) (arg); |
a75214e5 | 226 | |
5f8075fa AM |
227 | while (curr_frag != frag_now) |
228 | { | |
229 | added += curr_frag->fr_fix; | |
230 | curr_frag = curr_frag->fr_next; | |
252b5132 | 231 | } |
a75214e5 | 232 | |
5f8075fa AM |
233 | added += frag_now_fix_octets (); |
234 | poolspan += added; | |
235 | } | |
236 | ||
237 | static void | |
ea1562b3 NC |
238 | check_literals (int kind, int offset) |
239 | { | |
240 | poolspan += offset; | |
241 | ||
242 | /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. | |
243 | SPANPANIC means that we must dump now. | |
244 | kind == 0 is any old instruction. | |
245 | kind > 0 means we just had a control transfer instruction. | |
246 | kind == 1 means within a function | |
247 | kind == 2 means we just left a function | |
248 | ||
249 | The dump_literals (1) call inserts a branch around the table, so | |
250 | we first look to see if its a situation where we won't have to | |
251 | insert a branch (e.g., the previous instruction was an unconditional | |
252 | branch). | |
253 | ||
254 | SPANPANIC is the point where we must dump a single-entry pool. | |
255 | it accounts for alignments and an inserted branch. | |
256 | the 'poolsize*2' accounts for the scenario where we do: | |
257 | lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 | |
258 | Note that the 'lit2' reference is 2 bytes further along | |
259 | but the literal it references will be 4 bytes further along, | |
260 | so we must consider the poolsize into this equation. | |
261 | This is slightly over-cautious, but guarantees that we won't | |
262 | panic because a relocation is too distant. */ | |
263 | ||
264 | if (poolspan > SPANCLOSE && kind > 0) | |
265 | dump_literals (0); | |
266 | else if (poolspan > SPANEXIT && kind > 1) | |
267 | dump_literals (0); | |
268 | else if (poolspan >= (SPANPANIC - poolsize * 2)) | |
269 | dump_literals (1); | |
270 | } | |
271 | ||
272 | static void | |
273 | mcore_cons (int nbytes) | |
5f8075fa AM |
274 | { |
275 | if (now_seg == text_section) | |
276 | mcore_pool_count (cons, nbytes); | |
277 | else | |
278 | cons (nbytes); | |
252b5132 RH |
279 | |
280 | /* In theory we ought to call check_literals (2,0) here in case | |
281 | we need to dump the literal table. We cannot do this however, | |
282 | as the directives that we are intercepting may be being used | |
283 | to build a switch table, and we must not interfere with its | |
a75214e5 | 284 | contents. Instead we cross our fingers and pray... */ |
252b5132 RH |
285 | } |
286 | ||
287 | static void | |
ea1562b3 | 288 | mcore_float_cons (int float_type) |
252b5132 RH |
289 | { |
290 | if (now_seg == text_section) | |
5f8075fa AM |
291 | mcore_pool_count (float_cons, float_type); |
292 | else | |
293 | float_cons (float_type); | |
a75214e5 | 294 | |
252b5132 RH |
295 | /* See the comment in mcore_cons () about calling check_literals. |
296 | It is unlikely that a switch table will be constructed using | |
297 | floating point values, but it is still likely that an indexed | |
298 | table of floating point constants is being created by these | |
299 | directives, so again we must not interfere with their placement. */ | |
300 | } | |
301 | ||
302 | static void | |
ea1562b3 | 303 | mcore_stringer (int append_zero) |
252b5132 RH |
304 | { |
305 | if (now_seg == text_section) | |
5f8075fa AM |
306 | mcore_pool_count (stringer, append_zero); |
307 | else | |
308 | stringer (append_zero); | |
252b5132 RH |
309 | |
310 | /* We call check_literals here in case a large number of strings are | |
311 | being placed into the text section with a sequence of stringer | |
312 | directives. In theory we could be upsetting something if these | |
313 | strings are actually in an indexed table instead of referenced by | |
314 | individual labels. Let us hope that that never happens. */ | |
315 | check_literals (2, 0); | |
316 | } | |
317 | ||
bcef92fa | 318 | static void |
ea1562b3 | 319 | mcore_fill (int unused) |
bcef92fa NC |
320 | { |
321 | if (now_seg == text_section) | |
5f8075fa AM |
322 | mcore_pool_count (s_fill, unused); |
323 | else | |
324 | s_fill (unused); | |
bcef92fa | 325 | |
4c1102fd | 326 | check_literals (2, 0); |
bcef92fa NC |
327 | } |
328 | ||
16b93d88 NC |
329 | /* Handle the section changing pseudo-ops. These call through to the |
330 | normal implementations, but they dump the literal pool first. */ | |
ea1562b3 | 331 | |
252b5132 | 332 | static void |
ea1562b3 | 333 | mcore_s_text (int ignore) |
252b5132 RH |
334 | { |
335 | dump_literals (0); | |
a75214e5 | 336 | |
16b93d88 NC |
337 | #ifdef OBJ_ELF |
338 | obj_elf_text (ignore); | |
339 | #else | |
252b5132 | 340 | s_text (ignore); |
16b93d88 | 341 | #endif |
252b5132 RH |
342 | } |
343 | ||
344 | static void | |
ea1562b3 | 345 | mcore_s_data (int ignore) |
252b5132 RH |
346 | { |
347 | dump_literals (0); | |
a75214e5 | 348 | |
16b93d88 NC |
349 | #ifdef OBJ_ELF |
350 | obj_elf_data (ignore); | |
351 | #else | |
252b5132 | 352 | s_data (ignore); |
16b93d88 NC |
353 | #endif |
354 | } | |
355 | ||
356 | static void | |
ea1562b3 | 357 | mcore_s_section (int ignore) |
16b93d88 | 358 | { |
bcef92fa NC |
359 | /* Scan forwards to find the name of the section. If the section |
360 | being switched to is ".line" then this is a DWARF1 debug section | |
67c1ffbe | 361 | which is arbitrarily placed inside generated code. In this case |
bcef92fa NC |
362 | do not dump the literal pool because it is a) inefficient and |
363 | b) would require the generation of extra code to jump around the | |
364 | pool. */ | |
365 | char * ilp = input_line_pointer; | |
366 | ||
3882b010 | 367 | while (*ilp != 0 && ISSPACE (*ilp)) |
bcef92fa NC |
368 | ++ ilp; |
369 | ||
370 | if (strncmp (ilp, ".line", 5) == 0 | |
3882b010 | 371 | && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) |
bcef92fa NC |
372 | ; |
373 | else | |
374 | dump_literals (0); | |
16b93d88 NC |
375 | |
376 | #ifdef OBJ_ELF | |
377 | obj_elf_section (ignore); | |
378 | #endif | |
379 | #ifdef OBJ_COFF | |
380 | obj_coff_section (ignore); | |
381 | #endif | |
252b5132 RH |
382 | } |
383 | ||
16b93d88 | 384 | static void |
ea1562b3 | 385 | mcore_s_bss (int needs_align) |
16b93d88 NC |
386 | { |
387 | dump_literals (0); | |
a75214e5 | 388 | |
16b93d88 NC |
389 | s_lcomm_bytes (needs_align); |
390 | } | |
391 | ||
392 | #ifdef OBJ_ELF | |
393 | static void | |
ea1562b3 | 394 | mcore_s_comm (int needs_align) |
16b93d88 NC |
395 | { |
396 | dump_literals (0); | |
a75214e5 | 397 | |
16b93d88 NC |
398 | obj_elf_common (needs_align); |
399 | } | |
400 | #endif | |
401 | ||
ea1562b3 NC |
402 | /* This table describes all the machine specific pseudo-ops the assembler |
403 | has to support. The fields are: | |
404 | Pseudo-op name without dot | |
405 | Function to call to execute this pseudo-op | |
406 | Integer arg to pass to the function. */ | |
407 | const pseudo_typeS md_pseudo_table[] = | |
408 | { | |
409 | { "export", s_globl, 0 }, | |
410 | { "import", s_ignore, 0 }, | |
411 | { "literals", mcore_s_literals, 0 }, | |
412 | { "page", listing_eject, 0 }, | |
413 | ||
414 | /* The following are to intercept the placement of data into the text | |
415 | section (eg addresses for a switch table), so that the space they | |
416 | occupy can be taken into account when deciding whether or not to | |
417 | dump the current literal pool. | |
418 | XXX - currently we do not cope with the .space and .dcb.d directives. */ | |
419 | { "ascii", mcore_stringer, 0 }, | |
420 | { "asciz", mcore_stringer, 1 }, | |
421 | { "byte", mcore_cons, 1 }, | |
422 | { "dc", mcore_cons, 2 }, | |
423 | { "dc.b", mcore_cons, 1 }, | |
424 | { "dc.d", mcore_float_cons, 'd'}, | |
425 | { "dc.l", mcore_cons, 4 }, | |
426 | { "dc.s", mcore_float_cons, 'f'}, | |
427 | { "dc.w", mcore_cons, 2 }, | |
428 | { "dc.x", mcore_float_cons, 'x'}, | |
429 | { "double", mcore_float_cons, 'd'}, | |
430 | { "float", mcore_float_cons, 'f'}, | |
431 | { "hword", mcore_cons, 2 }, | |
432 | { "int", mcore_cons, 4 }, | |
433 | { "long", mcore_cons, 4 }, | |
434 | { "octa", mcore_cons, 16 }, | |
435 | { "quad", mcore_cons, 8 }, | |
436 | { "short", mcore_cons, 2 }, | |
437 | { "single", mcore_float_cons, 'f'}, | |
438 | { "string", mcore_stringer, 1 }, | |
439 | { "word", mcore_cons, 2 }, | |
440 | { "fill", mcore_fill, 0 }, | |
441 | ||
442 | /* Allow for the effect of section changes. */ | |
443 | { "text", mcore_s_text, 0 }, | |
444 | { "data", mcore_s_data, 0 }, | |
445 | { "bss", mcore_s_bss, 1 }, | |
446 | #ifdef OBJ_ELF | |
447 | { "comm", mcore_s_comm, 0 }, | |
448 | #endif | |
449 | { "section", mcore_s_section, 0 }, | |
450 | { "section.s", mcore_s_section, 0 }, | |
451 | { "sect", mcore_s_section, 0 }, | |
452 | { "sect.s", mcore_s_section, 0 }, | |
453 | ||
454 | { 0, 0, 0 } | |
455 | }; | |
456 | ||
252b5132 | 457 | /* This function is called once, at assembler startup time. This should |
bcef92fa | 458 | set up all the tables, etc that the MD part of the assembler needs. */ |
ea1562b3 | 459 | |
252b5132 | 460 | void |
ea1562b3 | 461 | md_begin (void) |
252b5132 | 462 | { |
5ff37431 | 463 | const mcore_opcode_info * opcode; |
252b5132 RH |
464 | char * prev_name = ""; |
465 | ||
466 | opcode_hash_control = hash_new (); | |
467 | ||
ea1562b3 | 468 | /* Insert unique names into hash table. */ |
252b5132 RH |
469 | for (opcode = mcore_table; opcode->name; opcode ++) |
470 | { | |
5ff37431 | 471 | if (! streq (prev_name, opcode->name)) |
252b5132 RH |
472 | { |
473 | prev_name = opcode->name; | |
474 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
475 | } | |
476 | } | |
477 | } | |
478 | ||
252b5132 | 479 | /* Get a log2(val). */ |
ea1562b3 | 480 | |
252b5132 | 481 | static int |
ea1562b3 | 482 | mylog2 (unsigned int val) |
252b5132 | 483 | { |
ea1562b3 NC |
484 | int log = -1; |
485 | ||
486 | while (val != 0) | |
252b5132 | 487 | { |
5f8075fa AM |
488 | log ++; |
489 | val >>= 1; | |
252b5132 | 490 | } |
a75214e5 | 491 | |
ea1562b3 | 492 | return log; |
252b5132 RH |
493 | } |
494 | ||
495 | /* Try to parse a reg name. */ | |
ea1562b3 | 496 | |
252b5132 | 497 | static char * |
ea1562b3 | 498 | parse_reg (char * s, unsigned * reg) |
252b5132 RH |
499 | { |
500 | /* Strip leading whitespace. */ | |
3882b010 | 501 | while (ISSPACE (* s)) |
252b5132 | 502 | ++ s; |
a75214e5 | 503 | |
3882b010 | 504 | if (TOLOWER (s[0]) == 'r') |
252b5132 RH |
505 | { |
506 | if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') | |
507 | { | |
508 | *reg = 10 + s[2] - '0'; | |
509 | return s + 3; | |
510 | } | |
a75214e5 | 511 | |
252b5132 RH |
512 | if (s[1] >= '0' && s[1] <= '9') |
513 | { | |
514 | *reg = s[1] - '0'; | |
515 | return s + 2; | |
516 | } | |
517 | } | |
3882b010 L |
518 | else if ( TOLOWER (s[0]) == 's' |
519 | && TOLOWER (s[1]) == 'p' | |
520 | && ! ISALNUM (s[2])) | |
252b5132 RH |
521 | { |
522 | * reg = 0; | |
523 | return s + 2; | |
524 | } | |
a75214e5 | 525 | |
252b5132 RH |
526 | as_bad (_("register expected, but saw '%.6s'"), s); |
527 | return s; | |
528 | } | |
529 | ||
530 | static struct Cregs | |
531 | { | |
532 | char * name; | |
533 | unsigned int crnum; | |
534 | } | |
535 | cregs[] = | |
536 | { | |
537 | { "psr", 0}, | |
538 | { "vbr", 1}, | |
539 | { "epsr", 2}, | |
540 | { "fpsr", 3}, | |
541 | { "epc", 4}, | |
542 | { "fpc", 5}, | |
543 | { "ss0", 6}, | |
544 | { "ss1", 7}, | |
545 | { "ss2", 8}, | |
546 | { "ss3", 9}, | |
547 | { "ss4", 10}, | |
548 | { "gcr", 11}, | |
549 | { "gsr", 12}, | |
550 | { "", 0} | |
551 | }; | |
552 | ||
553 | static char * | |
ea1562b3 | 554 | parse_creg (char * s, unsigned * reg) |
252b5132 RH |
555 | { |
556 | int i; | |
557 | ||
558 | /* Strip leading whitespace. */ | |
3882b010 | 559 | while (ISSPACE (* s)) |
252b5132 | 560 | ++s; |
a75214e5 | 561 | |
3882b010 | 562 | if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) |
252b5132 RH |
563 | { |
564 | if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') | |
565 | { | |
566 | *reg = 30 + s[3] - '0'; | |
567 | return s + 4; | |
568 | } | |
a75214e5 | 569 | |
252b5132 RH |
570 | if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') |
571 | { | |
572 | *reg = 20 + s[3] - '0'; | |
573 | return s + 4; | |
574 | } | |
a75214e5 | 575 | |
252b5132 RH |
576 | if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') |
577 | { | |
578 | *reg = 10 + s[3] - '0'; | |
579 | return s + 4; | |
580 | } | |
a75214e5 | 581 | |
252b5132 RH |
582 | if (s[2] >= '0' && s[2] <= '9') |
583 | { | |
584 | *reg = s[2] - '0'; | |
585 | return s + 3; | |
586 | } | |
587 | } | |
a75214e5 | 588 | |
252b5132 RH |
589 | /* Look at alternate creg names before giving error. */ |
590 | for (i = 0; cregs[i].name[0] != '\0'; i++) | |
591 | { | |
592 | char buf [10]; | |
593 | int length; | |
594 | int j; | |
a75214e5 | 595 | |
252b5132 | 596 | length = strlen (cregs[i].name); |
a75214e5 | 597 | |
252b5132 | 598 | for (j = 0; j < length; j++) |
3882b010 | 599 | buf[j] = TOLOWER (s[j]); |
a75214e5 | 600 | |
252b5132 RH |
601 | if (strncmp (cregs[i].name, buf, length) == 0) |
602 | { | |
603 | *reg = cregs[i].crnum; | |
604 | return s + length; | |
605 | } | |
606 | } | |
a75214e5 | 607 | |
252b5132 | 608 | as_bad (_("control register expected, but saw '%.6s'"), s); |
a75214e5 | 609 | |
252b5132 RH |
610 | return s; |
611 | } | |
612 | ||
bec50466 | 613 | static char * |
ea1562b3 | 614 | parse_psrmod (char * s, unsigned * reg) |
bec50466 NC |
615 | { |
616 | int i; | |
617 | char buf[10]; | |
618 | static struct psrmods | |
619 | { | |
620 | char * name; | |
621 | unsigned int value; | |
622 | } | |
623 | psrmods[] = | |
624 | { | |
625 | { "ie", 1 }, | |
626 | { "fe", 2 }, | |
627 | { "ee", 4 }, | |
628 | { "af", 8 } /* Really 0 and non-combinable. */ | |
629 | }; | |
a75214e5 | 630 | |
bec50466 | 631 | for (i = 0; i < 2; i++) |
3882b010 | 632 | buf[i] = TOLOWER (s[i]); |
a75214e5 | 633 | |
bec50466 NC |
634 | for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) |
635 | { | |
636 | if (! strncmp (psrmods[i].name, buf, 2)) | |
637 | { | |
5f8075fa | 638 | * reg = psrmods[i].value; |
a75214e5 | 639 | |
5f8075fa | 640 | return s + 2; |
bec50466 NC |
641 | } |
642 | } | |
a75214e5 | 643 | |
bec50466 | 644 | as_bad (_("bad/missing psr specifier")); |
a75214e5 | 645 | |
bec50466 | 646 | * reg = 0; |
a75214e5 | 647 | |
bec50466 NC |
648 | return s; |
649 | } | |
650 | ||
252b5132 | 651 | static char * |
ea1562b3 | 652 | parse_exp (char * s, expressionS * e) |
252b5132 RH |
653 | { |
654 | char * save; | |
655 | char * new; | |
656 | ||
657 | /* Skip whitespace. */ | |
3882b010 | 658 | while (ISSPACE (* s)) |
252b5132 | 659 | ++ s; |
a75214e5 | 660 | |
252b5132 RH |
661 | save = input_line_pointer; |
662 | input_line_pointer = s; | |
663 | ||
664 | expression (e); | |
a75214e5 | 665 | |
252b5132 RH |
666 | if (e->X_op == O_absent) |
667 | as_bad (_("missing operand")); | |
a75214e5 | 668 | |
252b5132 RH |
669 | new = input_line_pointer; |
670 | input_line_pointer = save; | |
a75214e5 | 671 | |
252b5132 RH |
672 | return new; |
673 | } | |
674 | ||
252b5132 | 675 | static int |
ea1562b3 | 676 | enter_literal (expressionS * e, int ispcrel) |
252b5132 | 677 | { |
aa699a2c | 678 | unsigned int i; |
252b5132 RH |
679 | struct literal * p; |
680 | ||
681 | if (poolsize >= MAX_POOL_SIZE - 2) | |
ea1562b3 NC |
682 | /* The literal pool is as full as we can handle. We have |
683 | to be 2 entries shy of the 1024/4=256 entries because we | |
684 | have to allow for the branch (2 bytes) and the alignment | |
685 | (2 bytes before the first insn referencing the pool and | |
686 | 2 bytes before the pool itself) == 6 bytes, rounds up | |
687 | to 2 entries. */ | |
688 | dump_literals (1); | |
252b5132 RH |
689 | |
690 | if (poolsize == 0) | |
691 | { | |
692 | /* Create new literal pool. */ | |
693 | if (++ poolnumber > 0xFFFF) | |
694 | as_fatal (_("more than 65K literal pools")); | |
a75214e5 | 695 | |
b8a40f53 | 696 | make_name (poolname, POOL_START_LABEL, poolnumber); |
252b5132 RH |
697 | poolsym = symbol_make (poolname); |
698 | symbol_table_insert (poolsym); | |
699 | poolspan = 0; | |
700 | } | |
a75214e5 | 701 | |
252b5132 RH |
702 | /* Search pool for value so we don't have duplicates. */ |
703 | for (p = litpool, i = 0; i < poolsize; i++, p++) | |
704 | { | |
705 | if (e->X_op == p->e.X_op | |
706 | && e->X_add_symbol == p->e.X_add_symbol | |
707 | && e->X_add_number == p->e.X_add_number | |
708 | && ispcrel == p->ispcrel) | |
709 | { | |
710 | p->refcnt ++; | |
711 | return i; | |
712 | } | |
713 | } | |
714 | ||
715 | p->refcnt = 1; | |
716 | p->ispcrel = ispcrel; | |
717 | p->e = * e; | |
a75214e5 | 718 | |
252b5132 RH |
719 | poolsize ++; |
720 | ||
a75214e5 | 721 | return i; |
252b5132 RH |
722 | } |
723 | ||
724 | /* Parse a literal specification. -- either new or old syntax. | |
725 | old syntax: the user supplies the label and places the literal. | |
726 | new syntax: we put it into the literal pool. */ | |
ea1562b3 | 727 | |
252b5132 | 728 | static char * |
ea1562b3 NC |
729 | parse_rt (char * s, |
730 | char ** outputp, | |
731 | int ispcrel, | |
732 | expressionS * ep) | |
252b5132 RH |
733 | { |
734 | expressionS e; | |
735 | int n; | |
a75214e5 | 736 | |
252b5132 RH |
737 | if (ep) |
738 | /* Indicate nothing there. */ | |
739 | ep->X_op = O_absent; | |
a75214e5 | 740 | |
252b5132 RH |
741 | if (*s == '[') |
742 | { | |
743 | s = parse_exp (s + 1, & e); | |
a75214e5 | 744 | |
252b5132 RH |
745 | if (*s == ']') |
746 | s++; | |
747 | else | |
748 | as_bad (_("missing ']'")); | |
749 | } | |
750 | else | |
751 | { | |
752 | s = parse_exp (s, & e); | |
a75214e5 | 753 | |
252b5132 | 754 | n = enter_literal (& e, ispcrel); |
a75214e5 | 755 | |
252b5132 RH |
756 | if (ep) |
757 | *ep = e; | |
758 | ||
759 | /* Create a reference to pool entry. */ | |
760 | e.X_op = O_symbol; | |
761 | e.X_add_symbol = poolsym; | |
762 | e.X_add_number = n << 2; | |
763 | } | |
a75214e5 | 764 | |
252b5132 RH |
765 | * outputp = frag_more (2); |
766 | ||
767 | fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, | |
768 | BFD_RELOC_MCORE_PCREL_IMM8BY4); | |
769 | ||
770 | return s; | |
771 | } | |
772 | ||
773 | static char * | |
ea1562b3 NC |
774 | parse_imm (char * s, |
775 | unsigned * val, | |
776 | unsigned min, | |
777 | unsigned max) | |
252b5132 RH |
778 | { |
779 | char * new; | |
780 | expressionS e; | |
a75214e5 | 781 | |
252b5132 | 782 | new = parse_exp (s, & e); |
a75214e5 | 783 | |
252b5132 RH |
784 | if (e.X_op == O_absent) |
785 | ; /* An error message has already been emitted. */ | |
786 | else if (e.X_op != O_constant) | |
787 | as_bad (_("operand must be a constant")); | |
aa699a2c AM |
788 | else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) |
789 | as_bad (_("operand must be absolute in range %u..%u, not %ld"), | |
790 | min, max, (long) e.X_add_number); | |
252b5132 RH |
791 | |
792 | * val = e.X_add_number; | |
a75214e5 | 793 | |
252b5132 RH |
794 | return new; |
795 | } | |
796 | ||
797 | static char * | |
ea1562b3 NC |
798 | parse_mem (char * s, |
799 | unsigned * reg, | |
800 | unsigned * off, | |
801 | unsigned siz) | |
252b5132 | 802 | { |
252b5132 | 803 | * off = 0; |
a75214e5 | 804 | |
3882b010 | 805 | while (ISSPACE (* s)) |
252b5132 | 806 | ++ s; |
a75214e5 | 807 | |
252b5132 RH |
808 | if (* s == '(') |
809 | { | |
810 | s = parse_reg (s + 1, reg); | |
811 | ||
3882b010 | 812 | while (ISSPACE (* s)) |
252b5132 | 813 | ++ s; |
a75214e5 | 814 | |
252b5132 RH |
815 | if (* s == ',') |
816 | { | |
817 | s = parse_imm (s + 1, off, 0, 63); | |
a75214e5 | 818 | |
252b5132 RH |
819 | if (siz > 1) |
820 | { | |
821 | if (siz > 2) | |
822 | { | |
823 | if (* off & 0x3) | |
824 | as_bad (_("operand must be a multiple of 4")); | |
a75214e5 | 825 | |
252b5132 RH |
826 | * off >>= 2; |
827 | } | |
828 | else | |
829 | { | |
830 | if (* off & 0x1) | |
831 | as_bad (_("operand must be a multiple of 2")); | |
a75214e5 | 832 | |
252b5132 RH |
833 | * off >>= 1; |
834 | } | |
835 | } | |
836 | } | |
a75214e5 | 837 | |
3882b010 | 838 | while (ISSPACE (* s)) |
252b5132 | 839 | ++ s; |
a75214e5 | 840 | |
252b5132 RH |
841 | if (* s == ')') |
842 | s ++; | |
843 | } | |
844 | else | |
845 | as_bad (_("base register expected")); | |
a75214e5 | 846 | |
252b5132 RH |
847 | return s; |
848 | } | |
849 | ||
850 | /* This is the guts of the machine-dependent assembler. STR points to a | |
851 | machine dependent instruction. This function is supposed to emit | |
852 | the frags/bytes it assembles to. */ | |
853 | ||
854 | void | |
ea1562b3 | 855 | md_assemble (char * str) |
252b5132 RH |
856 | { |
857 | char * op_start; | |
858 | char * op_end; | |
859 | mcore_opcode_info * opcode; | |
860 | char * output; | |
861 | int nlen = 0; | |
862 | unsigned short inst; | |
863 | unsigned reg; | |
864 | unsigned off; | |
865 | unsigned isize; | |
866 | expressionS e; | |
867 | char name[20]; | |
868 | ||
869 | /* Drop leading whitespace. */ | |
3882b010 | 870 | while (ISSPACE (* str)) |
252b5132 RH |
871 | str ++; |
872 | ||
873 | /* Find the op code end. */ | |
874 | for (op_start = op_end = str; | |
b75c0c92 | 875 | nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; |
252b5132 RH |
876 | op_end++) |
877 | { | |
878 | name[nlen] = op_start[nlen]; | |
879 | nlen++; | |
880 | } | |
a75214e5 | 881 | |
252b5132 | 882 | name [nlen] = 0; |
a75214e5 | 883 | |
252b5132 RH |
884 | if (nlen == 0) |
885 | { | |
886 | as_bad (_("can't find opcode ")); | |
887 | return; | |
888 | } | |
889 | ||
890 | opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name); | |
891 | if (opcode == NULL) | |
892 | { | |
893 | as_bad (_("unknown opcode \"%s\""), name); | |
894 | return; | |
895 | } | |
a75214e5 | 896 | |
252b5132 RH |
897 | inst = opcode->inst; |
898 | isize = 2; | |
a75214e5 | 899 | |
252b5132 RH |
900 | switch (opcode->opclass) |
901 | { | |
902 | case O0: | |
903 | output = frag_more (2); | |
904 | break; | |
a75214e5 | 905 | |
252b5132 RH |
906 | case OT: |
907 | op_end = parse_imm (op_end + 1, & reg, 0, 3); | |
908 | inst |= reg; | |
909 | output = frag_more (2); | |
910 | break; | |
a75214e5 | 911 | |
252b5132 RH |
912 | case O1: |
913 | op_end = parse_reg (op_end + 1, & reg); | |
914 | inst |= reg; | |
915 | output = frag_more (2); | |
916 | break; | |
a75214e5 | 917 | |
252b5132 RH |
918 | case JMP: |
919 | op_end = parse_reg (op_end + 1, & reg); | |
920 | inst |= reg; | |
921 | output = frag_more (2); | |
922 | /* In a sifilter mode, we emit this insn 2 times, | |
5f8075fa | 923 | fixes problem of an interrupt during a jmp.. */ |
252b5132 RH |
924 | if (sifilter_mode) |
925 | { | |
b8a40f53 NC |
926 | output[0] = INST_BYTE0 (inst); |
927 | output[1] = INST_BYTE1 (inst); | |
252b5132 RH |
928 | output = frag_more (2); |
929 | } | |
930 | break; | |
a75214e5 | 931 | |
252b5132 RH |
932 | case JSR: |
933 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 934 | |
252b5132 RH |
935 | if (reg == 15) |
936 | as_bad (_("invalid register: r15 illegal")); | |
a75214e5 | 937 | |
252b5132 RH |
938 | inst |= reg; |
939 | output = frag_more (2); | |
a75214e5 | 940 | |
252b5132 RH |
941 | if (sifilter_mode) |
942 | { | |
ea1562b3 NC |
943 | /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */ |
944 | inst = MCORE_INST_BSR; /* With 0 displacement. */ | |
b8a40f53 NC |
945 | output[0] = INST_BYTE0 (inst); |
946 | output[1] = INST_BYTE1 (inst); | |
252b5132 RH |
947 | |
948 | output = frag_more (2); | |
949 | inst = MCORE_INST_ADDI; | |
ea1562b3 NC |
950 | inst |= 15; /* addi r15,6 */ |
951 | inst |= (6 - 1) << 4; /* Over the jmp's. */ | |
b8a40f53 NC |
952 | output[0] = INST_BYTE0 (inst); |
953 | output[1] = INST_BYTE1 (inst); | |
252b5132 RH |
954 | |
955 | output = frag_more (2); | |
956 | inst = MCORE_INST_JMP | reg; | |
b8a40f53 NC |
957 | output[0] = INST_BYTE0 (inst); |
958 | output[1] = INST_BYTE1 (inst); | |
252b5132 | 959 | |
ea1562b3 NC |
960 | /* 2nd emitted in fallthrough. */ |
961 | output = frag_more (2); | |
252b5132 RH |
962 | } |
963 | break; | |
a75214e5 | 964 | |
252b5132 RH |
965 | case OC: |
966 | op_end = parse_reg (op_end + 1, & reg); | |
967 | inst |= reg; | |
a75214e5 | 968 | |
252b5132 | 969 | /* Skip whitespace. */ |
3882b010 | 970 | while (ISSPACE (* op_end)) |
252b5132 | 971 | ++ op_end; |
a75214e5 | 972 | |
252b5132 RH |
973 | if (*op_end == ',') |
974 | { | |
975 | op_end = parse_creg (op_end + 1, & reg); | |
976 | inst |= reg << 4; | |
977 | } | |
a75214e5 | 978 | |
252b5132 RH |
979 | output = frag_more (2); |
980 | break; | |
981 | ||
bec50466 NC |
982 | case MULSH: |
983 | if (cpu == M210) | |
984 | { | |
985 | as_bad (_("M340 specific opcode used when assembling for M210")); | |
986 | break; | |
987 | } | |
a75214e5 | 988 | /* drop through... */ |
252b5132 RH |
989 | case O2: |
990 | op_end = parse_reg (op_end + 1, & reg); | |
991 | inst |= reg; | |
a75214e5 | 992 | |
252b5132 | 993 | /* Skip whitespace. */ |
3882b010 | 994 | while (ISSPACE (* op_end)) |
252b5132 | 995 | ++ op_end; |
a75214e5 | 996 | |
252b5132 RH |
997 | if (* op_end == ',') |
998 | { | |
999 | op_end = parse_reg (op_end + 1, & reg); | |
1000 | inst |= reg << 4; | |
1001 | } | |
1002 | else | |
1003 | as_bad (_("second operand missing")); | |
a75214e5 | 1004 | |
252b5132 RH |
1005 | output = frag_more (2); |
1006 | break; | |
a75214e5 | 1007 | |
ea1562b3 NC |
1008 | case X1: |
1009 | /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */ | |
252b5132 | 1010 | op_end = parse_reg (op_end + 1, & reg); |
a75214e5 | 1011 | |
252b5132 | 1012 | /* Skip whitespace. */ |
3882b010 | 1013 | while (ISSPACE (* op_end)) |
252b5132 | 1014 | ++ op_end; |
a75214e5 | 1015 | |
ea1562b3 | 1016 | if (* op_end == ',') /* xtrb- r1,rx. */ |
252b5132 RH |
1017 | { |
1018 | if (reg != 1) | |
1019 | as_bad (_("destination register must be r1")); | |
a75214e5 | 1020 | |
252b5132 RH |
1021 | op_end = parse_reg (op_end + 1, & reg); |
1022 | } | |
a75214e5 | 1023 | |
252b5132 RH |
1024 | inst |= reg; |
1025 | output = frag_more (2); | |
1026 | break; | |
a75214e5 | 1027 | |
ea1562b3 | 1028 | case O1R1: /* div- rx,r1. */ |
252b5132 RH |
1029 | op_end = parse_reg (op_end + 1, & reg); |
1030 | inst |= reg; | |
a75214e5 | 1031 | |
252b5132 | 1032 | /* Skip whitespace. */ |
3882b010 | 1033 | while (ISSPACE (* op_end)) |
252b5132 | 1034 | ++ op_end; |
a75214e5 | 1035 | |
252b5132 RH |
1036 | if (* op_end == ',') |
1037 | { | |
1038 | op_end = parse_reg (op_end + 1, & reg); | |
1039 | if (reg != 1) | |
1040 | as_bad (_("source register must be r1")); | |
1041 | } | |
1042 | else | |
1043 | as_bad (_("second operand missing")); | |
a75214e5 | 1044 | |
252b5132 RH |
1045 | output = frag_more (2); |
1046 | break; | |
a75214e5 | 1047 | |
252b5132 RH |
1048 | case OI: |
1049 | op_end = parse_reg (op_end + 1, & reg); | |
1050 | inst |= reg; | |
a75214e5 | 1051 | |
252b5132 | 1052 | /* Skip whitespace. */ |
3882b010 | 1053 | while (ISSPACE (* op_end)) |
252b5132 | 1054 | ++ op_end; |
a75214e5 | 1055 | |
252b5132 RH |
1056 | if (* op_end == ',') |
1057 | { | |
1058 | op_end = parse_imm (op_end + 1, & reg, 1, 32); | |
1059 | inst |= (reg - 1) << 4; | |
1060 | } | |
1061 | else | |
1062 | as_bad (_("second operand missing")); | |
a75214e5 | 1063 | |
252b5132 RH |
1064 | output = frag_more (2); |
1065 | break; | |
a75214e5 | 1066 | |
252b5132 RH |
1067 | case OB: |
1068 | op_end = parse_reg (op_end + 1, & reg); | |
1069 | inst |= reg; | |
a75214e5 | 1070 | |
252b5132 | 1071 | /* Skip whitespace. */ |
3882b010 | 1072 | while (ISSPACE (* op_end)) |
252b5132 | 1073 | ++ op_end; |
a75214e5 | 1074 | |
252b5132 RH |
1075 | if (* op_end == ',') |
1076 | { | |
1077 | op_end = parse_imm (op_end + 1, & reg, 0, 31); | |
1078 | inst |= reg << 4; | |
1079 | } | |
1080 | else | |
1081 | as_bad (_("second operand missing")); | |
a75214e5 | 1082 | |
252b5132 RH |
1083 | output = frag_more (2); |
1084 | break; | |
a75214e5 | 1085 | |
ea1562b3 NC |
1086 | case OB2: |
1087 | /* Like OB, but arg is 2^n instead of n. */ | |
252b5132 RH |
1088 | op_end = parse_reg (op_end + 1, & reg); |
1089 | inst |= reg; | |
a75214e5 | 1090 | |
252b5132 | 1091 | /* Skip whitespace. */ |
3882b010 | 1092 | while (ISSPACE (* op_end)) |
252b5132 | 1093 | ++ op_end; |
a75214e5 | 1094 | |
252b5132 RH |
1095 | if (* op_end == ',') |
1096 | { | |
1097 | op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); | |
a75214e5 | 1098 | /* Further restrict the immediate to a power of two. */ |
252b5132 | 1099 | if ((reg & (reg - 1)) == 0) |
f17c130b | 1100 | reg = mylog2 (reg); |
252b5132 RH |
1101 | else |
1102 | { | |
1103 | reg = 0; | |
1104 | as_bad (_("immediate is not a power of two")); | |
1105 | } | |
1106 | inst |= (reg) << 4; | |
1107 | } | |
1108 | else | |
1109 | as_bad (_("second operand missing")); | |
a75214e5 | 1110 | |
252b5132 RH |
1111 | output = frag_more (2); |
1112 | break; | |
a75214e5 KH |
1113 | |
1114 | case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ | |
252b5132 RH |
1115 | case OBRb: |
1116 | case OBRc: | |
1117 | op_end = parse_reg (op_end + 1, & reg); | |
1118 | inst |= reg; | |
a75214e5 | 1119 | |
252b5132 | 1120 | /* Skip whitespace. */ |
3882b010 | 1121 | while (ISSPACE (* op_end)) |
252b5132 | 1122 | ++ op_end; |
a75214e5 | 1123 | |
252b5132 RH |
1124 | if (* op_end == ',') |
1125 | { | |
1126 | op_end = parse_imm (op_end + 1, & reg, 0, 31); | |
ea1562b3 | 1127 | /* Immediate values of 0 -> 6 translate to movi. */ |
252b5132 RH |
1128 | if (reg <= 6) |
1129 | { | |
1130 | inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; | |
1131 | reg = 0x1 << reg; | |
1132 | as_warn (_("translating bgeni to movi")); | |
1133 | } | |
1134 | inst &= ~ 0x01f0; | |
1135 | inst |= reg << 4; | |
1136 | } | |
1137 | else | |
1138 | as_bad (_("second operand missing")); | |
a75214e5 | 1139 | |
252b5132 RH |
1140 | output = frag_more (2); |
1141 | break; | |
a75214e5 | 1142 | |
ea1562b3 | 1143 | case OBR2: /* Like OBR, but arg is 2^n instead of n. */ |
252b5132 RH |
1144 | op_end = parse_reg (op_end + 1, & reg); |
1145 | inst |= reg; | |
a75214e5 | 1146 | |
252b5132 | 1147 | /* Skip whitespace. */ |
3882b010 | 1148 | while (ISSPACE (* op_end)) |
252b5132 | 1149 | ++ op_end; |
a75214e5 | 1150 | |
252b5132 RH |
1151 | if (* op_end == ',') |
1152 | { | |
1153 | op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); | |
a75214e5 | 1154 | |
252b5132 RH |
1155 | /* Further restrict the immediate to a power of two. */ |
1156 | if ((reg & (reg - 1)) == 0) | |
f17c130b | 1157 | reg = mylog2 (reg); |
252b5132 RH |
1158 | else |
1159 | { | |
1160 | reg = 0; | |
1161 | as_bad (_("immediate is not a power of two")); | |
1162 | } | |
a75214e5 KH |
1163 | |
1164 | /* Immediate values of 0 -> 6 translate to movi. */ | |
252b5132 RH |
1165 | if (reg <= 6) |
1166 | { | |
1167 | inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; | |
1168 | reg = 0x1 << reg; | |
1169 | as_warn (_("translating mgeni to movi")); | |
1170 | } | |
a75214e5 | 1171 | |
252b5132 RH |
1172 | inst |= reg << 4; |
1173 | } | |
1174 | else | |
1175 | as_bad (_("second operand missing")); | |
a75214e5 | 1176 | |
252b5132 RH |
1177 | output = frag_more (2); |
1178 | break; | |
a75214e5 | 1179 | |
252b5132 RH |
1180 | case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ |
1181 | case OMb: | |
1182 | case OMc: | |
1183 | op_end = parse_reg (op_end + 1, & reg); | |
1184 | inst |= reg; | |
a75214e5 | 1185 | |
252b5132 | 1186 | /* Skip whitespace. */ |
3882b010 | 1187 | while (ISSPACE (* op_end)) |
252b5132 | 1188 | ++ op_end; |
a75214e5 | 1189 | |
252b5132 RH |
1190 | if (* op_end == ',') |
1191 | { | |
1192 | op_end = parse_imm (op_end + 1, & reg, 1, 32); | |
a75214e5 KH |
1193 | |
1194 | /* Immediate values of 1 -> 7 translate to movi. */ | |
252b5132 RH |
1195 | if (reg <= 7) |
1196 | { | |
1197 | inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; | |
1198 | reg = (0x1 << reg) - 1; | |
1199 | inst |= reg << 4; | |
a75214e5 | 1200 | |
252b5132 RH |
1201 | as_warn (_("translating bmaski to movi")); |
1202 | } | |
1203 | else | |
1204 | { | |
1205 | inst &= ~ 0x01F0; | |
1206 | inst |= (reg & 0x1F) << 4; | |
1207 | } | |
1208 | } | |
1209 | else | |
1210 | as_bad (_("second operand missing")); | |
a75214e5 | 1211 | |
252b5132 RH |
1212 | output = frag_more (2); |
1213 | break; | |
a75214e5 | 1214 | |
252b5132 RH |
1215 | case SI: |
1216 | op_end = parse_reg (op_end + 1, & reg); | |
1217 | inst |= reg; | |
a75214e5 | 1218 | |
252b5132 | 1219 | /* Skip whitespace. */ |
3882b010 | 1220 | while (ISSPACE (* op_end)) |
252b5132 | 1221 | ++ op_end; |
a75214e5 | 1222 | |
252b5132 RH |
1223 | if (* op_end == ',') |
1224 | { | |
1225 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
1226 | inst |= reg << 4; | |
1227 | } | |
1228 | else | |
1229 | as_bad (_("second operand missing")); | |
a75214e5 | 1230 | |
252b5132 RH |
1231 | output = frag_more (2); |
1232 | break; | |
1233 | ||
1234 | case I7: | |
1235 | op_end = parse_reg (op_end + 1, & reg); | |
1236 | inst |= reg; | |
a75214e5 | 1237 | |
252b5132 | 1238 | /* Skip whitespace. */ |
3882b010 | 1239 | while (ISSPACE (* op_end)) |
252b5132 | 1240 | ++ op_end; |
a75214e5 | 1241 | |
252b5132 RH |
1242 | if (* op_end == ',') |
1243 | { | |
1244 | op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); | |
1245 | inst |= reg << 4; | |
1246 | } | |
1247 | else | |
1248 | as_bad (_("second operand missing")); | |
a75214e5 | 1249 | |
252b5132 RH |
1250 | output = frag_more (2); |
1251 | break; | |
a75214e5 | 1252 | |
252b5132 RH |
1253 | case LS: |
1254 | op_end = parse_reg (op_end + 1, & reg); | |
1255 | inst |= reg << 8; | |
a75214e5 | 1256 | |
252b5132 | 1257 | /* Skip whitespace. */ |
3882b010 | 1258 | while (ISSPACE (* op_end)) |
252b5132 | 1259 | ++ op_end; |
a75214e5 | 1260 | |
252b5132 RH |
1261 | if (* op_end == ',') |
1262 | { | |
1263 | int size; | |
a75214e5 | 1264 | |
252b5132 RH |
1265 | if ((inst & 0x6000) == 0) |
1266 | size = 4; | |
1267 | else if ((inst & 0x6000) == 0x4000) | |
1268 | size = 2; | |
1269 | else if ((inst & 0x6000) == 0x2000) | |
1270 | size = 1; | |
aa699a2c AM |
1271 | else |
1272 | abort (); | |
a75214e5 | 1273 | |
252b5132 | 1274 | op_end = parse_mem (op_end + 1, & reg, & off, size); |
a75214e5 | 1275 | |
252b5132 RH |
1276 | if (off > 16) |
1277 | as_bad (_("displacement too large (%d)"), off); | |
1278 | else | |
1279 | inst |= (reg) | (off << 4); | |
1280 | } | |
1281 | else | |
1282 | as_bad (_("second operand missing")); | |
a75214e5 | 1283 | |
252b5132 RH |
1284 | output = frag_more (2); |
1285 | break; | |
a75214e5 | 1286 | |
252b5132 RH |
1287 | case LR: |
1288 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1289 | |
252b5132 RH |
1290 | if (reg == 0 || reg == 15) |
1291 | as_bad (_("Invalid register: r0 and r15 illegal")); | |
a75214e5 | 1292 | |
252b5132 | 1293 | inst |= (reg << 8); |
a75214e5 | 1294 | |
252b5132 | 1295 | /* Skip whitespace. */ |
3882b010 | 1296 | while (ISSPACE (* op_end)) |
252b5132 | 1297 | ++ op_end; |
a75214e5 | 1298 | |
252b5132 | 1299 | if (* op_end == ',') |
2d473ce9 NC |
1300 | { |
1301 | /* parse_rt calls frag_more() for us. */ | |
1302 | input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); | |
5f8075fa | 1303 | op_end = input_line_pointer; |
2d473ce9 | 1304 | } |
252b5132 RH |
1305 | else |
1306 | { | |
1307 | as_bad (_("second operand missing")); | |
1308 | output = frag_more (2); /* save its space */ | |
1309 | } | |
1310 | break; | |
a75214e5 | 1311 | |
252b5132 RH |
1312 | case LJ: |
1313 | input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); | |
1314 | /* parse_rt() calls frag_more() for us. */ | |
2d473ce9 | 1315 | op_end = input_line_pointer; |
252b5132 | 1316 | break; |
a75214e5 | 1317 | |
252b5132 RH |
1318 | case RM: |
1319 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1320 | |
252b5132 RH |
1321 | if (reg == 0 || reg == 15) |
1322 | as_bad (_("bad starting register: r0 and r15 invalid")); | |
a75214e5 | 1323 | |
252b5132 | 1324 | inst |= reg; |
a75214e5 | 1325 | |
252b5132 | 1326 | /* Skip whitespace. */ |
3882b010 | 1327 | while (ISSPACE (* op_end)) |
252b5132 | 1328 | ++ op_end; |
a75214e5 | 1329 | |
252b5132 RH |
1330 | if (* op_end == '-') |
1331 | { | |
1332 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1333 | |
252b5132 RH |
1334 | if (reg != 15) |
1335 | as_bad (_("ending register must be r15")); | |
a75214e5 | 1336 | |
252b5132 | 1337 | /* Skip whitespace. */ |
3882b010 | 1338 | while (ISSPACE (* op_end)) |
252b5132 RH |
1339 | ++ op_end; |
1340 | } | |
a75214e5 | 1341 | |
252b5132 RH |
1342 | if (* op_end == ',') |
1343 | { | |
1344 | op_end ++; | |
a75214e5 | 1345 | |
252b5132 | 1346 | /* Skip whitespace. */ |
3882b010 | 1347 | while (ISSPACE (* op_end)) |
252b5132 | 1348 | ++ op_end; |
a75214e5 | 1349 | |
252b5132 RH |
1350 | if (* op_end == '(') |
1351 | { | |
1352 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1353 | |
252b5132 RH |
1354 | if (reg != 0) |
1355 | as_bad (_("bad base register: must be r0")); | |
a75214e5 | 1356 | |
252b5132 RH |
1357 | if (* op_end == ')') |
1358 | op_end ++; | |
1359 | } | |
1360 | else | |
1361 | as_bad (_("base register expected")); | |
1362 | } | |
1363 | else | |
1364 | as_bad (_("second operand missing")); | |
a75214e5 | 1365 | |
252b5132 RH |
1366 | output = frag_more (2); |
1367 | break; | |
a75214e5 | 1368 | |
252b5132 RH |
1369 | case RQ: |
1370 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1371 | |
252b5132 RH |
1372 | if (reg != 4) |
1373 | as_fatal (_("first register must be r4")); | |
a75214e5 | 1374 | |
252b5132 | 1375 | /* Skip whitespace. */ |
3882b010 | 1376 | while (ISSPACE (* op_end)) |
252b5132 | 1377 | ++ op_end; |
a75214e5 | 1378 | |
252b5132 RH |
1379 | if (* op_end == '-') |
1380 | { | |
1381 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1382 | |
252b5132 RH |
1383 | if (reg != 7) |
1384 | as_fatal (_("last register must be r7")); | |
a75214e5 | 1385 | |
252b5132 | 1386 | /* Skip whitespace. */ |
3882b010 | 1387 | while (ISSPACE (* op_end)) |
252b5132 | 1388 | ++ op_end; |
a75214e5 | 1389 | |
252b5132 RH |
1390 | if (* op_end == ',') |
1391 | { | |
1392 | op_end ++; | |
a75214e5 | 1393 | |
252b5132 | 1394 | /* Skip whitespace. */ |
3882b010 | 1395 | while (ISSPACE (* op_end)) |
252b5132 | 1396 | ++ op_end; |
a75214e5 | 1397 | |
252b5132 RH |
1398 | if (* op_end == '(') |
1399 | { | |
1400 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1401 | |
252b5132 RH |
1402 | if (reg >= 4 && reg <= 7) |
1403 | as_fatal ("base register cannot be r4, r5, r6, or r7"); | |
a75214e5 | 1404 | |
252b5132 | 1405 | inst |= reg; |
a75214e5 | 1406 | |
252b5132 | 1407 | /* Skip whitespace. */ |
3882b010 | 1408 | while (ISSPACE (* op_end)) |
252b5132 | 1409 | ++ op_end; |
a75214e5 | 1410 | |
252b5132 RH |
1411 | if (* op_end == ')') |
1412 | op_end ++; | |
1413 | } | |
1414 | else | |
1415 | as_bad (_("base register expected")); | |
1416 | } | |
1417 | else | |
1418 | as_bad (_("second operand missing")); | |
1419 | } | |
1420 | else | |
1421 | as_bad (_("reg-reg expected")); | |
a75214e5 | 1422 | |
252b5132 RH |
1423 | output = frag_more (2); |
1424 | break; | |
a75214e5 | 1425 | |
252b5132 RH |
1426 | case BR: |
1427 | input_line_pointer = parse_exp (op_end + 1, & e); | |
2d473ce9 | 1428 | op_end = input_line_pointer; |
a75214e5 | 1429 | |
252b5132 | 1430 | output = frag_more (2); |
a75214e5 KH |
1431 | |
1432 | fix_new_exp (frag_now, output-frag_now->fr_literal, | |
252b5132 RH |
1433 | 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); |
1434 | break; | |
a75214e5 | 1435 | |
252b5132 RH |
1436 | case BL: |
1437 | op_end = parse_reg (op_end + 1, & reg); | |
1438 | inst |= reg << 4; | |
a75214e5 | 1439 | |
252b5132 | 1440 | /* Skip whitespace. */ |
3882b010 | 1441 | while (ISSPACE (* op_end)) |
252b5132 | 1442 | ++ op_end; |
a75214e5 | 1443 | |
252b5132 RH |
1444 | if (* op_end == ',') |
1445 | { | |
1446 | op_end = parse_exp (op_end + 1, & e); | |
1447 | output = frag_more (2); | |
a75214e5 KH |
1448 | |
1449 | fix_new_exp (frag_now, output-frag_now->fr_literal, | |
252b5132 RH |
1450 | 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); |
1451 | } | |
1452 | else | |
1453 | { | |
1454 | as_bad (_("second operand missing")); | |
1455 | output = frag_more (2); | |
1456 | } | |
1457 | break; | |
a75214e5 | 1458 | |
252b5132 RH |
1459 | case JC: |
1460 | input_line_pointer = parse_exp (op_end + 1, & e); | |
2d473ce9 | 1461 | op_end = input_line_pointer; |
a75214e5 | 1462 | |
252b5132 | 1463 | output = frag_var (rs_machine_dependent, |
93c2a809 AM |
1464 | md_relax_table[C (COND_JUMP, DISP32)].rlx_length, |
1465 | md_relax_table[C (COND_JUMP, DISP12)].rlx_length, | |
252b5132 RH |
1466 | C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); |
1467 | isize = C32_LEN; | |
1468 | break; | |
a75214e5 | 1469 | |
252b5132 RH |
1470 | case JU: |
1471 | input_line_pointer = parse_exp (op_end + 1, & e); | |
2d473ce9 NC |
1472 | op_end = input_line_pointer; |
1473 | ||
252b5132 | 1474 | output = frag_var (rs_machine_dependent, |
93c2a809 AM |
1475 | md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, |
1476 | md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, | |
252b5132 RH |
1477 | C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); |
1478 | isize = U32_LEN; | |
1479 | break; | |
a75214e5 | 1480 | |
252b5132 RH |
1481 | case JL: |
1482 | inst = MCORE_INST_JSRI; /* jsri */ | |
1483 | input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); | |
bcef92fa | 1484 | /* parse_rt() calls frag_more for us. */ |
2d473ce9 | 1485 | op_end = input_line_pointer; |
a75214e5 KH |
1486 | |
1487 | /* Only do this if we know how to do it ... */ | |
252b5132 RH |
1488 | if (e.X_op != O_absent && do_jsri2bsr) |
1489 | { | |
1490 | /* Look at adding the R_PCREL_JSRIMM11BY2. */ | |
a75214e5 | 1491 | fix_new_exp (frag_now, output-frag_now->fr_literal, |
252b5132 RH |
1492 | 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); |
1493 | } | |
1494 | break; | |
1495 | ||
ea1562b3 NC |
1496 | case RSI: |
1497 | /* SI, but imm becomes 32-imm. */ | |
252b5132 RH |
1498 | op_end = parse_reg (op_end + 1, & reg); |
1499 | inst |= reg; | |
a75214e5 | 1500 | |
252b5132 | 1501 | /* Skip whitespace. */ |
3882b010 | 1502 | while (ISSPACE (* op_end)) |
252b5132 | 1503 | ++ op_end; |
a75214e5 | 1504 | |
252b5132 RH |
1505 | if (* op_end == ',') |
1506 | { | |
1507 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
a75214e5 | 1508 | |
252b5132 RH |
1509 | reg = 32 - reg; |
1510 | inst |= reg << 4; | |
1511 | } | |
1512 | else | |
1513 | as_bad (_("second operand missing")); | |
a75214e5 | 1514 | |
252b5132 RH |
1515 | output = frag_more (2); |
1516 | break; | |
a75214e5 | 1517 | |
252b5132 RH |
1518 | case DO21: /* O2, dup rd, lit must be 1 */ |
1519 | op_end = parse_reg (op_end + 1, & reg); | |
1520 | inst |= reg; | |
1521 | inst |= reg << 4; | |
a75214e5 | 1522 | |
252b5132 | 1523 | /* Skip whitespace. */ |
3882b010 | 1524 | while (ISSPACE (* op_end)) |
252b5132 | 1525 | ++ op_end; |
a75214e5 | 1526 | |
252b5132 RH |
1527 | if (* op_end == ',') |
1528 | { | |
1529 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
a75214e5 | 1530 | |
252b5132 RH |
1531 | if (reg != 1) |
1532 | as_bad (_("second operand must be 1")); | |
1533 | } | |
1534 | else | |
1535 | as_bad (_("second operand missing")); | |
a75214e5 | 1536 | |
252b5132 RH |
1537 | output = frag_more (2); |
1538 | break; | |
a75214e5 | 1539 | |
252b5132 RH |
1540 | case SIa: |
1541 | op_end = parse_reg (op_end + 1, & reg); | |
1542 | inst |= reg; | |
a75214e5 | 1543 | |
252b5132 | 1544 | /* Skip whitespace. */ |
3882b010 | 1545 | while (ISSPACE (* op_end)) |
252b5132 | 1546 | ++ op_end; |
a75214e5 | 1547 | |
252b5132 RH |
1548 | if (* op_end == ',') |
1549 | { | |
1550 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
1551 | ||
1552 | if (reg == 0) | |
1553 | as_bad (_("zero used as immediate value")); | |
a75214e5 | 1554 | |
252b5132 RH |
1555 | inst |= reg << 4; |
1556 | } | |
1557 | else | |
1558 | as_bad (_("second operand missing")); | |
a75214e5 | 1559 | |
252b5132 RH |
1560 | output = frag_more (2); |
1561 | break; | |
1562 | ||
bec50466 NC |
1563 | case OPSR: |
1564 | if (cpu == M210) | |
1565 | { | |
1566 | as_bad (_("M340 specific opcode used when assembling for M210")); | |
1567 | break; | |
1568 | } | |
a75214e5 | 1569 | |
bec50466 | 1570 | op_end = parse_psrmod (op_end + 1, & reg); |
a75214e5 | 1571 | |
bec50466 NC |
1572 | /* Look for further selectors. */ |
1573 | while (* op_end == ',') | |
1574 | { | |
1575 | unsigned value; | |
a75214e5 | 1576 | |
bec50466 | 1577 | op_end = parse_psrmod (op_end + 1, & value); |
a75214e5 | 1578 | |
bec50466 NC |
1579 | if (value & reg) |
1580 | as_bad (_("duplicated psr bit specifier")); | |
a75214e5 | 1581 | |
bec50466 NC |
1582 | reg |= value; |
1583 | } | |
a75214e5 | 1584 | |
bec50466 NC |
1585 | if (reg > 8) |
1586 | as_bad (_("`af' must appear alone")); | |
a75214e5 | 1587 | |
bec50466 NC |
1588 | inst |= (reg & 0x7); |
1589 | output = frag_more (2); | |
1590 | break; | |
a75214e5 | 1591 | |
252b5132 RH |
1592 | default: |
1593 | as_bad (_("unimplemented opcode \"%s\""), name); | |
1594 | } | |
2d473ce9 NC |
1595 | |
1596 | /* Drop whitespace after all the operands have been parsed. */ | |
3882b010 | 1597 | while (ISSPACE (* op_end)) |
2d473ce9 NC |
1598 | op_end ++; |
1599 | ||
a75214e5 | 1600 | /* Give warning message if the insn has more operands than required. */ |
2d473ce9 NC |
1601 | if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) |
1602 | as_warn (_("ignoring operands: %s "), op_end); | |
a75214e5 | 1603 | |
b8a40f53 NC |
1604 | output[0] = INST_BYTE0 (inst); |
1605 | output[1] = INST_BYTE1 (inst); | |
a75214e5 | 1606 | |
252b5132 RH |
1607 | check_literals (opcode->transfer, isize); |
1608 | } | |
1609 | ||
1610 | symbolS * | |
ea1562b3 | 1611 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
1612 | { |
1613 | return 0; | |
1614 | } | |
1615 | ||
1616 | void | |
ea1562b3 | 1617 | md_mcore_end (void) |
252b5132 RH |
1618 | { |
1619 | dump_literals (0); | |
1620 | subseg_set (text_section, 0); | |
1621 | } | |
1622 | ||
1623 | /* Various routines to kill one day. */ | |
ea1562b3 | 1624 | /* Equal to MAX_PRECISION in atof-ieee.c. */ |
252b5132 RH |
1625 | #define MAX_LITTLENUMS 6 |
1626 | ||
1627 | /* Turn a string in input_line_pointer into a floating point constant of type | |
1628 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
ea1562b3 NC |
1629 | emitted is stored in *sizeP. An error message is returned, or NULL on OK. */ |
1630 | ||
252b5132 | 1631 | char * |
ea1562b3 | 1632 | md_atof (int type, char * litP, int * sizeP) |
252b5132 RH |
1633 | { |
1634 | int prec; | |
1635 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
b8a40f53 | 1636 | int i; |
252b5132 | 1637 | char * t; |
252b5132 RH |
1638 | |
1639 | switch (type) | |
1640 | { | |
1641 | case 'f': | |
1642 | case 'F': | |
1643 | case 's': | |
1644 | case 'S': | |
1645 | prec = 2; | |
1646 | break; | |
1647 | ||
1648 | case 'd': | |
1649 | case 'D': | |
1650 | case 'r': | |
1651 | case 'R': | |
1652 | prec = 4; | |
1653 | break; | |
1654 | ||
1655 | case 'x': | |
1656 | case 'X': | |
1657 | prec = 6; | |
1658 | break; | |
1659 | ||
1660 | case 'p': | |
1661 | case 'P': | |
1662 | prec = 6; | |
1663 | break; | |
1664 | ||
1665 | default: | |
1666 | *sizeP = 0; | |
1667 | return _("Bad call to MD_NTOF()"); | |
1668 | } | |
a75214e5 | 1669 | |
252b5132 | 1670 | t = atof_ieee (input_line_pointer, type, words); |
a75214e5 | 1671 | |
252b5132 RH |
1672 | if (t) |
1673 | input_line_pointer = t; | |
1674 | ||
1675 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
a75214e5 | 1676 | |
bec50466 NC |
1677 | if (! target_big_endian) |
1678 | { | |
1679 | for (i = prec - 1; i >= 0; i--) | |
1680 | { | |
1681 | md_number_to_chars (litP, (valueT) words[i], | |
1682 | sizeof (LITTLENUM_TYPE)); | |
1683 | litP += sizeof (LITTLENUM_TYPE); | |
1684 | } | |
1685 | } | |
1686 | else | |
b8a40f53 NC |
1687 | for (i = 0; i < prec; i++) |
1688 | { | |
1689 | md_number_to_chars (litP, (valueT) words[i], | |
1690 | sizeof (LITTLENUM_TYPE)); | |
1691 | litP += sizeof (LITTLENUM_TYPE); | |
1692 | } | |
a75214e5 | 1693 | |
252b5132 RH |
1694 | return 0; |
1695 | } | |
1696 | \f | |
5a38dc70 | 1697 | const char * md_shortopts = ""; |
252b5132 | 1698 | |
ea1562b3 NC |
1699 | enum options |
1700 | { | |
1701 | OPTION_JSRI2BSR_ON = OPTION_MD_BASE, | |
1702 | OPTION_JSRI2BSR_OFF, | |
1703 | OPTION_SIFILTER_ON, | |
1704 | OPTION_SIFILTER_OFF, | |
1705 | OPTION_CPU, | |
1706 | OPTION_EB, | |
1707 | OPTION_EL, | |
1708 | }; | |
252b5132 RH |
1709 | |
1710 | struct option md_longopts[] = | |
1711 | { | |
252b5132 RH |
1712 | { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, |
1713 | { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, | |
1714 | { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, | |
1715 | { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, | |
bec50466 NC |
1716 | { "cpu", required_argument, NULL, OPTION_CPU}, |
1717 | { "EB", no_argument, NULL, OPTION_EB}, | |
1718 | { "EL", no_argument, NULL, OPTION_EL}, | |
252b5132 RH |
1719 | { NULL, no_argument, NULL, 0} |
1720 | }; | |
1721 | ||
1722 | size_t md_longopts_size = sizeof (md_longopts); | |
1723 | ||
1724 | int | |
ea1562b3 | 1725 | md_parse_option (int c, char * arg) |
252b5132 | 1726 | { |
252b5132 RH |
1727 | switch (c) |
1728 | { | |
bec50466 NC |
1729 | case OPTION_CPU: |
1730 | if (streq (arg, "210")) | |
1731 | { | |
1732 | cpu = M210; | |
1733 | target_big_endian = 1; | |
1734 | } | |
1735 | else if (streq (arg, "340")) | |
1736 | cpu = M340; | |
1737 | else | |
5f8075fa | 1738 | as_warn (_("unrecognised cpu type '%s'"), arg); |
bec50466 | 1739 | break; |
a75214e5 | 1740 | |
bec50466 NC |
1741 | case OPTION_EB: target_big_endian = 1; break; |
1742 | case OPTION_EL: target_big_endian = 0; cpu = M340; break; | |
252b5132 RH |
1743 | case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; |
1744 | case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; | |
1745 | case OPTION_SIFILTER_ON: sifilter_mode = 1; break; | |
1746 | case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; | |
1747 | default: return 0; | |
1748 | } | |
1749 | ||
1750 | return 1; | |
1751 | } | |
1752 | ||
1753 | void | |
ea1562b3 | 1754 | md_show_usage (FILE * stream) |
252b5132 RH |
1755 | { |
1756 | fprintf (stream, _("\ | |
1757 | MCORE specific options:\n\ | |
b8a40f53 | 1758 | -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ |
bec50466 NC |
1759 | -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ |
1760 | -cpu=[210|340] select CPU type\n\ | |
1761 | -EB assemble for a big endian system (default)\n\ | |
1762 | -EL assemble for a little endian system\n")); | |
252b5132 RH |
1763 | } |
1764 | \f | |
1765 | int md_short_jump_size; | |
1766 | ||
1767 | void | |
ea1562b3 NC |
1768 | md_create_short_jump (char * ptr ATTRIBUTE_UNUSED, |
1769 | addressT from_Nddr ATTRIBUTE_UNUSED, | |
1770 | addressT to_Nddr ATTRIBUTE_UNUSED, | |
1771 | fragS * frag ATTRIBUTE_UNUSED, | |
1772 | symbolS * to_symbol ATTRIBUTE_UNUSED) | |
252b5132 RH |
1773 | { |
1774 | as_fatal (_("failed sanity check: short_jump")); | |
1775 | } | |
1776 | ||
1777 | void | |
ea1562b3 NC |
1778 | md_create_long_jump (char * ptr ATTRIBUTE_UNUSED, |
1779 | addressT from_Nddr ATTRIBUTE_UNUSED, | |
1780 | addressT to_Nddr ATTRIBUTE_UNUSED, | |
1781 | fragS * frag ATTRIBUTE_UNUSED, | |
1782 | symbolS * to_symbol ATTRIBUTE_UNUSED) | |
252b5132 RH |
1783 | { |
1784 | as_fatal (_("failed sanity check: long_jump")); | |
1785 | } | |
1786 | ||
1787 | /* Called after relaxing, change the frags so they know how big they are. */ | |
ea1562b3 | 1788 | |
252b5132 | 1789 | void |
ea1562b3 NC |
1790 | md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, |
1791 | segT sec ATTRIBUTE_UNUSED, | |
1792 | fragS * fragP) | |
252b5132 | 1793 | { |
2132e3a3 | 1794 | char *buffer; |
252b5132 | 1795 | int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; |
a75214e5 | 1796 | |
2132e3a3 | 1797 | buffer = fragP->fr_fix + fragP->fr_literal; |
252b5132 RH |
1798 | |
1799 | switch (fragP->fr_subtype) | |
1800 | { | |
93c2a809 AM |
1801 | case C (COND_JUMP, DISP12): |
1802 | case C (UNCD_JUMP, DISP12): | |
252b5132 | 1803 | { |
bcef92fa | 1804 | /* Get the address of the end of the instruction. */ |
252b5132 RH |
1805 | int next_inst = fragP->fr_fix + fragP->fr_address + 2; |
1806 | unsigned char t0; | |
1807 | int disp = targ_addr - next_inst; | |
a75214e5 | 1808 | |
252b5132 | 1809 | if (disp & 1) |
b8a40f53 | 1810 | as_bad (_("odd displacement at %x"), next_inst - 2); |
a75214e5 | 1811 | |
252b5132 | 1812 | disp >>= 1; |
a75214e5 | 1813 | |
bec50466 NC |
1814 | if (! target_big_endian) |
1815 | { | |
1816 | t0 = buffer[1] & 0xF8; | |
a75214e5 | 1817 | |
bec50466 | 1818 | md_number_to_chars (buffer, disp, 2); |
a75214e5 | 1819 | |
bec50466 NC |
1820 | buffer[1] = (buffer[1] & 0x07) | t0; |
1821 | } | |
1822 | else | |
b8a40f53 NC |
1823 | { |
1824 | t0 = buffer[0] & 0xF8; | |
a75214e5 | 1825 | |
b8a40f53 | 1826 | md_number_to_chars (buffer, disp, 2); |
a75214e5 | 1827 | |
b8a40f53 NC |
1828 | buffer[0] = (buffer[0] & 0x07) | t0; |
1829 | } | |
a75214e5 | 1830 | |
252b5132 | 1831 | fragP->fr_fix += 2; |
252b5132 RH |
1832 | } |
1833 | break; | |
1834 | ||
93c2a809 | 1835 | case C (COND_JUMP, DISP32): |
252b5132 RH |
1836 | case C (COND_JUMP, UNDEF_WORD_DISP): |
1837 | { | |
1838 | /* A conditional branch wont fit into 12 bits so: | |
ea1562b3 NC |
1839 | b!cond 1f |
1840 | jmpi 0f | |
1841 | .align 2 | |
1842 | 0: .long disp | |
1843 | 1: | |
1844 | ||
1845 | If the b!cond is 4 byte aligned, the literal which would | |
1846 | go at x+4 will also be aligned. */ | |
252b5132 RH |
1847 | int first_inst = fragP->fr_fix + fragP->fr_address; |
1848 | int needpad = (first_inst & 3); | |
1849 | ||
bec50466 NC |
1850 | if (! target_big_endian) |
1851 | buffer[1] ^= 0x08; | |
1852 | else | |
ea1562b3 | 1853 | buffer[0] ^= 0x08; /* Toggle T/F bit. */ |
252b5132 | 1854 | |
ea1562b3 | 1855 | buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ |
252b5132 | 1856 | buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); |
a75214e5 | 1857 | |
252b5132 RH |
1858 | if (needpad) |
1859 | { | |
bec50466 NC |
1860 | if (! target_big_endian) |
1861 | { | |
ea1562b3 NC |
1862 | buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */ |
1863 | buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */ | |
bec50466 NC |
1864 | } |
1865 | else | |
b8a40f53 | 1866 | { |
ea1562b3 NC |
1867 | buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */ |
1868 | buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */ | |
b8a40f53 | 1869 | } |
a75214e5 | 1870 | |
ea1562b3 | 1871 | buffer[4] = 0; /* Alignment/pad. */ |
252b5132 | 1872 | buffer[5] = 0; |
ea1562b3 | 1873 | buffer[6] = 0; /* Space for 32 bit address. */ |
252b5132 RH |
1874 | buffer[7] = 0; |
1875 | buffer[8] = 0; | |
1876 | buffer[9] = 0; | |
a75214e5 | 1877 | |
ea1562b3 | 1878 | /* Make reloc for the long disp. */ |
252b5132 RH |
1879 | fix_new (fragP, fragP->fr_fix + 6, 4, |
1880 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
a75214e5 | 1881 | |
252b5132 RH |
1882 | fragP->fr_fix += C32_LEN; |
1883 | } | |
1884 | else | |
1885 | { | |
1886 | /* See comment below about this given gas' limitations for | |
1887 | shrinking the fragment. '3' is the amount of code that | |
1888 | we inserted here, but '4' is right for the space we reserved | |
a75214e5 | 1889 | for this fragment. */ |
bec50466 NC |
1890 | if (! target_big_endian) |
1891 | { | |
ea1562b3 NC |
1892 | buffer[0] = 3; /* Branch over jmpi, and ptr. */ |
1893 | buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */ | |
bec50466 NC |
1894 | } |
1895 | else | |
b8a40f53 | 1896 | { |
ea1562b3 NC |
1897 | buffer[1] = 3; /* Branch over jmpi, and ptr. */ |
1898 | buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */ | |
b8a40f53 | 1899 | } |
a75214e5 | 1900 | |
ea1562b3 | 1901 | buffer[4] = 0; /* Space for 32 bit address. */ |
252b5132 RH |
1902 | buffer[5] = 0; |
1903 | buffer[6] = 0; | |
1904 | buffer[7] = 0; | |
a75214e5 | 1905 | |
252b5132 RH |
1906 | /* Make reloc for the long disp. */ |
1907 | fix_new (fragP, fragP->fr_fix + 4, 4, | |
1908 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
1909 | fragP->fr_fix += C32_LEN; | |
1910 | ||
b8a40f53 NC |
1911 | /* Frag is actually shorter (see the other side of this ifdef) |
1912 | but gas isn't prepared for that. We have to re-adjust | |
a75214e5 | 1913 | the branch displacement so that it goes beyond the |
252b5132 RH |
1914 | full length of the fragment, not just what we actually |
1915 | filled in. */ | |
bec50466 | 1916 | if (! target_big_endian) |
ea1562b3 | 1917 | buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */ |
bec50466 | 1918 | else |
ea1562b3 | 1919 | buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */ |
252b5132 | 1920 | } |
252b5132 RH |
1921 | } |
1922 | break; | |
1923 | ||
93c2a809 | 1924 | case C (UNCD_JUMP, DISP32): |
252b5132 RH |
1925 | case C (UNCD_JUMP, UNDEF_WORD_DISP): |
1926 | { | |
1927 | /* An unconditional branch will not fit in 12 bits, make code which | |
1928 | looks like: | |
1929 | jmpi 0f | |
1930 | .align 2 | |
1931 | 0: .long disp | |
1932 | we need a pad if "first_inst" is 4 byte aligned. | |
ea1562b3 | 1933 | [because the natural literal place is x + 2]. */ |
252b5132 RH |
1934 | int first_inst = fragP->fr_fix + fragP->fr_address; |
1935 | int needpad = !(first_inst & 3); | |
1936 | ||
ea1562b3 | 1937 | buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ |
252b5132 RH |
1938 | buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); |
1939 | ||
1940 | if (needpad) | |
1941 | { | |
bec50466 | 1942 | if (! target_big_endian) |
ea1562b3 | 1943 | buffer[0] = 1; /* Jmpi offset of 1 since padded. */ |
bec50466 | 1944 | else |
ea1562b3 NC |
1945 | buffer[1] = 1; /* Jmpi offset of 1 since padded. */ |
1946 | buffer[2] = 0; /* Alignment. */ | |
252b5132 | 1947 | buffer[3] = 0; |
ea1562b3 | 1948 | buffer[4] = 0; /* Space for 32 bit address. */ |
252b5132 RH |
1949 | buffer[5] = 0; |
1950 | buffer[6] = 0; | |
1951 | buffer[7] = 0; | |
a75214e5 | 1952 | |
bcef92fa | 1953 | /* Make reloc for the long disp. */ |
252b5132 RH |
1954 | fix_new (fragP, fragP->fr_fix + 4, 4, |
1955 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
a75214e5 | 1956 | |
252b5132 RH |
1957 | fragP->fr_fix += U32_LEN; |
1958 | } | |
1959 | else | |
1960 | { | |
bec50466 | 1961 | if (! target_big_endian) |
ea1562b3 | 1962 | buffer[0] = 0; /* Jmpi offset of 0 if no pad. */ |
bec50466 | 1963 | else |
ea1562b3 NC |
1964 | buffer[1] = 0; /* Jmpi offset of 0 if no pad. */ |
1965 | buffer[2] = 0; /* Space for 32 bit address. */ | |
252b5132 RH |
1966 | buffer[3] = 0; |
1967 | buffer[4] = 0; | |
1968 | buffer[5] = 0; | |
a75214e5 | 1969 | |
bcef92fa | 1970 | /* Make reloc for the long disp. */ |
252b5132 RH |
1971 | fix_new (fragP, fragP->fr_fix + 2, 4, |
1972 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
1973 | fragP->fr_fix += U32_LEN; | |
1974 | } | |
252b5132 RH |
1975 | } |
1976 | break; | |
1977 | ||
1978 | default: | |
1979 | abort (); | |
1980 | } | |
1981 | } | |
1982 | ||
1983 | /* Applies the desired value to the specified location. | |
1984 | Also sets up addends for 'rela' type relocations. */ | |
94f592af NC |
1985 | |
1986 | void | |
ea1562b3 NC |
1987 | md_apply_fix3 (fixS * fixP, |
1988 | valueT * valP, | |
1989 | segT segment ATTRIBUTE_UNUSED) | |
252b5132 RH |
1990 | { |
1991 | char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
1992 | char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); | |
1993 | const char * symname; | |
1994 | /* Note: use offsetT because it is signed, valueT is unsigned. */ | |
a161fe53 | 1995 | offsetT val = *valP; |
a75214e5 | 1996 | |
252b5132 RH |
1997 | symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); |
1998 | /* Save this for the addend in the relocation record. */ | |
1999 | fixP->fx_addnumber = val; | |
2000 | ||
a161fe53 | 2001 | if (fixP->fx_addsy != NULL) |
252b5132 | 2002 | { |
252b5132 RH |
2003 | #ifdef OBJ_ELF |
2004 | /* For ELF we can just return and let the reloc that will be generated | |
2005 | take care of everything. For COFF we still have to insert 'val' | |
2006 | into the insn since the addend field will be ignored. */ | |
94f592af | 2007 | return; |
252b5132 RH |
2008 | #endif |
2009 | } | |
2010 | else | |
2011 | fixP->fx_done = 1; | |
a75214e5 | 2012 | |
252b5132 RH |
2013 | switch (fixP->fx_r_type) |
2014 | { | |
ea1562b3 NC |
2015 | /* Second byte of 2 byte opcode. */ |
2016 | case BFD_RELOC_MCORE_PCREL_IMM11BY2: | |
252b5132 RH |
2017 | if ((val & 1) != 0) |
2018 | as_bad_where (file, fixP->fx_line, | |
aa699a2c | 2019 | _("odd distance branch (0x%lx bytes)"), (long) val); |
252b5132 RH |
2020 | val /= 2; |
2021 | if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) | |
2022 | as_bad_where (file, fixP->fx_line, | |
aa699a2c AM |
2023 | _("pcrel for branch to %s too far (0x%lx)"), |
2024 | symname, (long) val); | |
bec50466 NC |
2025 | if (target_big_endian) |
2026 | { | |
2027 | buf[0] |= ((val >> 8) & 0x7); | |
2028 | buf[1] |= (val & 0xff); | |
2029 | } | |
2030 | else | |
2031 | { | |
eaa15ab8 NC |
2032 | buf[1] |= ((val >> 8) & 0x7); |
2033 | buf[0] |= (val & 0xff); | |
bec50466 | 2034 | } |
b8a40f53 | 2035 | break; |
252b5132 | 2036 | |
ea1562b3 NC |
2037 | /* Lower 8 bits of 2 byte opcode. */ |
2038 | case BFD_RELOC_MCORE_PCREL_IMM8BY4: | |
252b5132 RH |
2039 | val += 3; |
2040 | val /= 4; | |
2041 | if (val & ~0xff) | |
2042 | as_bad_where (file, fixP->fx_line, | |
aa699a2c AM |
2043 | _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), |
2044 | symname, (long) val); | |
bec50466 NC |
2045 | else if (! target_big_endian) |
2046 | buf[0] |= (val & 0xff); | |
252b5132 RH |
2047 | else |
2048 | buf[1] |= (val & 0xff); | |
b8a40f53 | 2049 | break; |
252b5132 | 2050 | |
ea1562b3 NC |
2051 | /* Loopt instruction. */ |
2052 | case BFD_RELOC_MCORE_PCREL_IMM4BY2: | |
252b5132 RH |
2053 | if ((val < -32) || (val > -2)) |
2054 | as_bad_where (file, fixP->fx_line, | |
aa699a2c | 2055 | _("pcrel for loopt too far (0x%lx)"), (long) val); |
252b5132 | 2056 | val /= 2; |
bec50466 NC |
2057 | if (! target_big_endian) |
2058 | buf[0] |= (val & 0xf); | |
2059 | else | |
2d473ce9 | 2060 | buf[1] |= (val & 0xf); |
252b5132 RH |
2061 | break; |
2062 | ||
2063 | case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: | |
2064 | /* Conditional linker map jsri to bsr. */ | |
a75214e5 | 2065 | /* If its a local target and close enough, fix it. |
5f8075fa | 2066 | NB: >= -2k for backwards bsr; < 2k for forwards... */ |
252b5132 RH |
2067 | if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) |
2068 | { | |
2069 | long nval = (val / 2) & 0x7ff; | |
2070 | nval |= MCORE_INST_BSR; | |
a75214e5 | 2071 | |
252b5132 | 2072 | /* REPLACE the instruction, don't just modify it. */ |
b8a40f53 NC |
2073 | buf[0] = INST_BYTE0 (nval); |
2074 | buf[1] = INST_BYTE1 (nval); | |
252b5132 RH |
2075 | } |
2076 | else | |
2077 | fixP->fx_done = 0; | |
2078 | break; | |
2079 | ||
2080 | case BFD_RELOC_MCORE_PCREL_32: | |
2081 | case BFD_RELOC_VTABLE_INHERIT: | |
2082 | case BFD_RELOC_VTABLE_ENTRY: | |
2083 | fixP->fx_done = 0; | |
2084 | break; | |
a75214e5 | 2085 | |
252b5132 RH |
2086 | default: |
2087 | if (fixP->fx_addsy != NULL) | |
2088 | { | |
2089 | /* If the fix is an absolute reloc based on a symbol's | |
2090 | address, then it cannot be resolved until the final link. */ | |
2091 | fixP->fx_done = 0; | |
2092 | } | |
a75214e5 | 2093 | #ifdef OBJ_ELF |
252b5132 RH |
2094 | else |
2095 | #endif | |
2096 | { | |
2097 | if (fixP->fx_size == 4) | |
b8a40f53 | 2098 | ; |
252b5132 | 2099 | else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) |
b8a40f53 | 2100 | ; |
252b5132 | 2101 | else if (fixP->fx_size == 1 && val >= -256 && val <= 255) |
b8a40f53 | 2102 | ; |
252b5132 RH |
2103 | else |
2104 | abort (); | |
b8a40f53 | 2105 | md_number_to_chars (buf, val, fixP->fx_size); |
252b5132 RH |
2106 | } |
2107 | break; | |
2108 | } | |
252b5132 RH |
2109 | } |
2110 | ||
2111 | void | |
ea1562b3 | 2112 | md_operand (expressionS * expressionP) |
252b5132 RH |
2113 | { |
2114 | /* Ignore leading hash symbol, if poresent. */ | |
2115 | if (* input_line_pointer == '#') | |
2116 | { | |
2117 | input_line_pointer ++; | |
2118 | expression (expressionP); | |
2119 | } | |
2120 | } | |
2121 | ||
2122 | int md_long_jump_size; | |
2123 | ||
2124 | /* Called just before address relaxation, return the length | |
2125 | by which a fragment must grow to reach it's destination. */ | |
2126 | int | |
ea1562b3 | 2127 | md_estimate_size_before_relax (fragS * fragP, segT segment_type) |
252b5132 RH |
2128 | { |
2129 | switch (fragP->fr_subtype) | |
2130 | { | |
93c2a809 AM |
2131 | default: |
2132 | abort (); | |
2133 | ||
252b5132 RH |
2134 | case C (UNCD_JUMP, UNDEF_DISP): |
2135 | /* Used to be a branch to somewhere which was unknown. */ | |
2136 | if (!fragP->fr_symbol) | |
ea1562b3 | 2137 | fragP->fr_subtype = C (UNCD_JUMP, DISP12); |
252b5132 | 2138 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) |
ea1562b3 | 2139 | fragP->fr_subtype = C (UNCD_JUMP, DISP12); |
252b5132 | 2140 | else |
ea1562b3 | 2141 | fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); |
252b5132 RH |
2142 | break; |
2143 | ||
252b5132 | 2144 | case C (COND_JUMP, UNDEF_DISP): |
a75214e5 | 2145 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
2146 | if (fragP->fr_symbol |
2147 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
ea1562b3 NC |
2148 | /* Got a symbol and it's defined in this segment, become byte |
2149 | sized - maybe it will fix up */ | |
2150 | fragP->fr_subtype = C (COND_JUMP, DISP12); | |
252b5132 | 2151 | else if (fragP->fr_symbol) |
ea1562b3 NC |
2152 | /* Its got a segment, but its not ours, so it will always be long. */ |
2153 | fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); | |
252b5132 | 2154 | else |
ea1562b3 NC |
2155 | /* We know the abs value. */ |
2156 | fragP->fr_subtype = C (COND_JUMP, DISP12); | |
93c2a809 | 2157 | break; |
252b5132 | 2158 | |
93c2a809 | 2159 | case C (UNCD_JUMP, DISP12): |
e66457fb | 2160 | case C (UNCD_JUMP, DISP32): |
93c2a809 AM |
2161 | case C (UNCD_JUMP, UNDEF_WORD_DISP): |
2162 | case C (COND_JUMP, DISP12): | |
e66457fb | 2163 | case C (COND_JUMP, DISP32): |
93c2a809 AM |
2164 | case C (COND_JUMP, UNDEF_WORD_DISP): |
2165 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 2166 | do anything besides return the current size. */ |
252b5132 RH |
2167 | break; |
2168 | } | |
a75214e5 | 2169 | |
606ab118 | 2170 | return md_relax_table[fragP->fr_subtype].rlx_length; |
252b5132 RH |
2171 | } |
2172 | ||
bcef92fa | 2173 | /* Put number into target byte order. */ |
ea1562b3 | 2174 | |
252b5132 | 2175 | void |
ea1562b3 | 2176 | md_number_to_chars (char * ptr, valueT use, int nbytes) |
252b5132 | 2177 | { |
bec50466 NC |
2178 | if (! target_big_endian) |
2179 | switch (nbytes) | |
2180 | { | |
ea1562b3 NC |
2181 | case 4: ptr[3] = (use >> 24) & 0xff; /* Fall through. */ |
2182 | case 3: ptr[2] = (use >> 16) & 0xff; /* Fall through. */ | |
2183 | case 2: ptr[1] = (use >> 8) & 0xff; /* Fall through. */ | |
bec50466 NC |
2184 | case 1: ptr[0] = (use >> 0) & 0xff; break; |
2185 | default: abort (); | |
2186 | } | |
2187 | else | |
b8a40f53 NC |
2188 | switch (nbytes) |
2189 | { | |
ea1562b3 NC |
2190 | case 4: *ptr++ = (use >> 24) & 0xff; /* Fall through. */ |
2191 | case 3: *ptr++ = (use >> 16) & 0xff; /* Fall through. */ | |
2192 | case 2: *ptr++ = (use >> 8) & 0xff; /* Fall through. */ | |
b8a40f53 NC |
2193 | case 1: *ptr++ = (use >> 0) & 0xff; break; |
2194 | default: abort (); | |
2195 | } | |
252b5132 RH |
2196 | } |
2197 | ||
2198 | /* Round up a section size to the appropriate boundary. */ | |
ea1562b3 | 2199 | |
252b5132 | 2200 | valueT |
ea1562b3 NC |
2201 | md_section_align (segT segment ATTRIBUTE_UNUSED, |
2202 | valueT size) | |
252b5132 | 2203 | { |
ea1562b3 NC |
2204 | /* Byte alignment is fine. */ |
2205 | return size; | |
252b5132 RH |
2206 | } |
2207 | ||
252b5132 RH |
2208 | /* The location from which a PC relative jump should be calculated, |
2209 | given a PC relative reloc. */ | |
ea1562b3 | 2210 | |
252b5132 | 2211 | long |
ea1562b3 | 2212 | md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
2213 | { |
2214 | #ifdef OBJ_ELF | |
2215 | /* If the symbol is undefined or defined in another section | |
2216 | we leave the add number alone for the linker to fix it later. | |
a75214e5 | 2217 | Only account for the PC pre-bump (which is 2 bytes on the MCore). */ |
252b5132 RH |
2218 | if (fixp->fx_addsy != (symbolS *) NULL |
2219 | && (! S_IS_DEFINED (fixp->fx_addsy) | |
2220 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
a75214e5 | 2221 | |
252b5132 RH |
2222 | { |
2223 | assert (fixp->fx_size == 2); /* must be an insn */ | |
2224 | return fixp->fx_size; | |
2225 | } | |
2226 | #endif | |
2227 | ||
a75214e5 | 2228 | /* The case where we are going to resolve things... */ |
252b5132 RH |
2229 | return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; |
2230 | } | |
2231 | ||
2232 | #define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) | |
2233 | #define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break | |
2234 | ||
2235 | arelent * | |
ea1562b3 | 2236 | tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
252b5132 RH |
2237 | { |
2238 | arelent * rel; | |
2239 | bfd_reloc_code_real_type code; | |
252b5132 RH |
2240 | |
2241 | switch (fixp->fx_r_type) | |
2242 | { | |
a75214e5 | 2243 | /* These confuse the size/pcrel macro approach. */ |
252b5132 RH |
2244 | case BFD_RELOC_VTABLE_INHERIT: |
2245 | case BFD_RELOC_VTABLE_ENTRY: | |
2246 | case BFD_RELOC_MCORE_PCREL_IMM4BY2: | |
2247 | case BFD_RELOC_MCORE_PCREL_IMM8BY4: | |
2248 | case BFD_RELOC_MCORE_PCREL_IMM11BY2: | |
2249 | case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: | |
a75214e5 | 2250 | case BFD_RELOC_RVA: |
252b5132 RH |
2251 | code = fixp->fx_r_type; |
2252 | break; | |
a75214e5 | 2253 | |
252b5132 RH |
2254 | default: |
2255 | switch (F (fixp->fx_size, fixp->fx_pcrel)) | |
5f8075fa AM |
2256 | { |
2257 | MAP (1, 0, BFD_RELOC_8); | |
2258 | MAP (2, 0, BFD_RELOC_16); | |
2259 | MAP (4, 0, BFD_RELOC_32); | |
2260 | MAP (1, 1, BFD_RELOC_8_PCREL); | |
2261 | MAP (2, 1, BFD_RELOC_16_PCREL); | |
2262 | MAP (4, 1, BFD_RELOC_32_PCREL); | |
2263 | default: | |
252b5132 | 2264 | code = fixp->fx_r_type; |
5f8075fa | 2265 | as_bad (_("Can not do %d byte %srelocation"), |
252b5132 | 2266 | fixp->fx_size, |
5f8075fa AM |
2267 | fixp->fx_pcrel ? _("pc-relative") : ""); |
2268 | } | |
252b5132 RH |
2269 | break; |
2270 | } | |
2271 | ||
ea1562b3 NC |
2272 | rel = xmalloc (sizeof (arelent)); |
2273 | rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
310b5aa2 | 2274 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
2275 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
2276 | /* Always pass the addend along! */ | |
2277 | rel->addend = fixp->fx_addnumber; | |
2278 | ||
2279 | rel->howto = bfd_reloc_type_lookup (stdoutput, code); | |
a75214e5 | 2280 | |
252b5132 RH |
2281 | if (rel->howto == NULL) |
2282 | { | |
2283 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
5f8075fa AM |
2284 | _("Cannot represent relocation type %s"), |
2285 | bfd_get_reloc_code_name (code)); | |
a75214e5 | 2286 | |
252b5132 RH |
2287 | /* Set howto to a garbage value so that we can keep going. */ |
2288 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
2289 | assert (rel->howto != NULL); | |
2290 | } | |
2291 | ||
2292 | return rel; | |
2293 | } | |
2294 | ||
2295 | #ifdef OBJ_ELF | |
2296 | /* See whether we need to force a relocation into the output file. | |
2297 | This is used to force out switch and PC relative relocations when | |
2298 | relaxing. */ | |
2299 | int | |
ea1562b3 | 2300 | mcore_force_relocation (fixS * fix) |
252b5132 | 2301 | { |
ae6063d4 | 2302 | if (fix->fx_r_type == BFD_RELOC_RVA) |
252b5132 RH |
2303 | return 1; |
2304 | ||
ae6063d4 | 2305 | return generic_force_reloc (fix); |
252b5132 RH |
2306 | } |
2307 | ||
2308 | /* Return true if the fix can be handled by GAS, false if it must | |
2309 | be passed through to the linker. */ | |
ea1562b3 | 2310 | |
b34976b6 | 2311 | bfd_boolean |
ea1562b3 | 2312 | mcore_fix_adjustable (fixS * fixP) |
252b5132 | 2313 | { |
252b5132 RH |
2314 | /* We need the symbol name for the VTABLE entries. */ |
2315 | if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2316 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2317 | return 0; | |
2318 | ||
2319 | return 1; | |
2320 | } | |
252b5132 | 2321 | #endif /* OBJ_ELF */ |