Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-mn10300.c -- Assembler code for the Matsushita 10300 |
8ad7c533 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
87975d2a | 3 | 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
10 | any later version. |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
19 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
20 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "as.h" |
3882b010 | 23 | #include "safe-ctype.h" |
87271fa6 | 24 | #include "subsegs.h" |
252b5132 | 25 | #include "opcode/mn10300.h" |
e8b1cae5 | 26 | #include "dwarf2dbg.h" |
603b7257 | 27 | #include "libiberty.h" |
252b5132 RH |
28 | \f |
29 | /* Structure to hold information about predefined registers. */ | |
30 | struct reg_name | |
31 | { | |
32 | const char *name; | |
33 | int value; | |
34 | }; | |
35 | ||
87271fa6 NC |
36 | /* Generic assembler global variables which must be defined by all |
37 | targets. */ | |
252b5132 | 38 | |
87271fa6 | 39 | /* Characters which always start a comment. */ |
252b5132 RH |
40 | const char comment_chars[] = "#"; |
41 | ||
42 | /* Characters which start a comment at the beginning of a line. */ | |
43 | const char line_comment_chars[] = ";#"; | |
44 | ||
87271fa6 | 45 | /* Characters which may be used to separate multiple commands on a |
252b5132 RH |
46 | single line. */ |
47 | const char line_separator_chars[] = ";"; | |
48 | ||
87271fa6 | 49 | /* Characters which are used to indicate an exponent in a floating |
252b5132 RH |
50 | point number. */ |
51 | const char EXP_CHARS[] = "eE"; | |
52 | ||
87271fa6 | 53 | /* Characters which mean that a number is a floating point constant, |
252b5132 RH |
54 | as in 0d1.0. */ |
55 | const char FLT_CHARS[] = "dD"; | |
56 | \f | |
dae1b34e NC |
57 | const relax_typeS md_relax_table[] = |
58 | { | |
59 | /* The plus values for the bCC and fBCC instructions in the table below | |
60 | are because the branch instruction is translated into a jump | |
61 | instruction that is now +2 or +3 bytes further on in memory, and the | |
62 | correct size of jump instruction must be selected. */ | |
603b7257 | 63 | /* bCC relaxing. */ |
252b5132 | 64 | {0x7f, -0x80, 2, 1}, |
dae1b34e | 65 | {0x7fff + 2, -0x8000 + 2, 5, 2}, |
252b5132 RH |
66 | {0x7fffffff, -0x80000000, 7, 0}, |
67 | ||
dae1b34e | 68 | /* bCC relaxing (uncommon cases for 3byte length instructions) */ |
252b5132 | 69 | {0x7f, -0x80, 3, 4}, |
dae1b34e | 70 | {0x7fff + 3, -0x8000 + 3, 6, 5}, |
252b5132 RH |
71 | {0x7fffffff, -0x80000000, 8, 0}, |
72 | ||
603b7257 | 73 | /* call relaxing. */ |
252b5132 RH |
74 | {0x7fff, -0x8000, 5, 7}, |
75 | {0x7fffffff, -0x80000000, 7, 0}, | |
76 | ||
603b7257 | 77 | /* calls relaxing. */ |
252b5132 RH |
78 | {0x7fff, -0x8000, 4, 9}, |
79 | {0x7fffffff, -0x80000000, 6, 0}, | |
80 | ||
603b7257 | 81 | /* jmp relaxing. */ |
252b5132 RH |
82 | {0x7f, -0x80, 2, 11}, |
83 | {0x7fff, -0x8000, 3, 12}, | |
84 | {0x7fffffff, -0x80000000, 5, 0}, | |
85 | ||
603b7257 | 86 | /* fbCC relaxing. */ |
e7b71525 | 87 | {0x7f, -0x80, 3, 14}, |
dae1b34e | 88 | {0x7fff + 3, -0x8000 + 3, 6, 15}, |
e7b71525 AO |
89 | {0x7fffffff, -0x80000000, 8, 0}, |
90 | ||
252b5132 RH |
91 | }; |
92 | ||
1485d400 EC |
93 | /* Set linkrelax here to avoid fixups in most sections. */ |
94 | int linkrelax = 1; | |
95 | ||
252b5132 RH |
96 | static int current_machine; |
97 | ||
87271fa6 | 98 | /* Fixups. */ |
603b7257 NC |
99 | #define MAX_INSN_FIXUPS 5 |
100 | ||
252b5132 RH |
101 | struct mn10300_fixup |
102 | { | |
103 | expressionS exp; | |
104 | int opindex; | |
105 | bfd_reloc_code_real_type reloc; | |
106 | }; | |
107 | struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; | |
108 | static int fc; | |
109 | ||
110 | /* We must store the value of each register operand so that we can | |
111 | verify that certain registers do not match. */ | |
112 | int mn10300_reg_operands[MN10300_MAX_OPERANDS]; | |
113 | \f | |
114 | const char *md_shortopts = ""; | |
252b5132 | 115 | |
603b7257 | 116 | struct option md_longopts[] = |
252b5132 | 117 | { |
603b7257 | 118 | {NULL, no_argument, NULL, 0} |
252b5132 RH |
119 | }; |
120 | ||
603b7257 NC |
121 | size_t md_longopts_size = sizeof (md_longopts); |
122 | ||
e7b71525 | 123 | #define HAVE_AM33_2 (current_machine == AM33_2) |
603b7257 NC |
124 | #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2) |
125 | #define HAVE_AM30 (current_machine == AM30) | |
0a727238 | 126 | |
252b5132 RH |
127 | /* Opcode hash table. */ |
128 | static struct hash_control *mn10300_hash; | |
129 | ||
87271fa6 | 130 | /* This table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
131 | static const struct reg_name data_registers[] = |
132 | { | |
133 | { "d0", 0 }, | |
134 | { "d1", 1 }, | |
135 | { "d2", 2 }, | |
136 | { "d3", 3 }, | |
137 | }; | |
252b5132 RH |
138 | |
139 | static const struct reg_name address_registers[] = | |
140 | { | |
141 | { "a0", 0 }, | |
142 | { "a1", 1 }, | |
143 | { "a2", 2 }, | |
144 | { "a3", 3 }, | |
145 | }; | |
87271fa6 | 146 | |
85cb2cf9 JL |
147 | static const struct reg_name r_registers[] = |
148 | { | |
149 | { "a0", 8 }, | |
150 | { "a1", 9 }, | |
151 | { "a2", 10 }, | |
152 | { "a3", 11 }, | |
153 | { "d0", 12 }, | |
154 | { "d1", 13 }, | |
155 | { "d2", 14 }, | |
156 | { "d3", 15 }, | |
157 | { "e0", 0 }, | |
158 | { "e1", 1 }, | |
159 | { "e10", 10 }, | |
160 | { "e11", 11 }, | |
161 | { "e12", 12 }, | |
162 | { "e13", 13 }, | |
163 | { "e14", 14 }, | |
164 | { "e15", 15 }, | |
165 | { "e2", 2 }, | |
166 | { "e3", 3 }, | |
167 | { "e4", 4 }, | |
168 | { "e5", 5 }, | |
169 | { "e6", 6 }, | |
170 | { "e7", 7 }, | |
171 | { "e8", 8 }, | |
172 | { "e9", 9 }, | |
173 | { "r0", 0 }, | |
174 | { "r1", 1 }, | |
175 | { "r10", 10 }, | |
176 | { "r11", 11 }, | |
177 | { "r12", 12 }, | |
178 | { "r13", 13 }, | |
179 | { "r14", 14 }, | |
180 | { "r15", 15 }, | |
181 | { "r2", 2 }, | |
182 | { "r3", 3 }, | |
183 | { "r4", 4 }, | |
184 | { "r5", 5 }, | |
185 | { "r6", 6 }, | |
186 | { "r7", 7 }, | |
187 | { "r8", 8 }, | |
188 | { "r9", 9 }, | |
189 | }; | |
87271fa6 | 190 | |
85cb2cf9 JL |
191 | static const struct reg_name xr_registers[] = |
192 | { | |
193 | { "mcrh", 2 }, | |
194 | { "mcrl", 3 }, | |
195 | { "mcvf", 4 }, | |
196 | { "mdrq", 1 }, | |
197 | { "sp", 0 }, | |
198 | { "xr0", 0 }, | |
199 | { "xr1", 1 }, | |
200 | { "xr10", 10 }, | |
201 | { "xr11", 11 }, | |
202 | { "xr12", 12 }, | |
203 | { "xr13", 13 }, | |
204 | { "xr14", 14 }, | |
205 | { "xr15", 15 }, | |
206 | { "xr2", 2 }, | |
207 | { "xr3", 3 }, | |
208 | { "xr4", 4 }, | |
209 | { "xr5", 5 }, | |
210 | { "xr6", 6 }, | |
211 | { "xr7", 7 }, | |
212 | { "xr8", 8 }, | |
213 | { "xr9", 9 }, | |
214 | }; | |
85cb2cf9 | 215 | |
e7b71525 AO |
216 | static const struct reg_name float_registers[] = |
217 | { | |
218 | { "fs0", 0 }, | |
219 | { "fs1", 1 }, | |
220 | { "fs10", 10 }, | |
221 | { "fs11", 11 }, | |
222 | { "fs12", 12 }, | |
223 | { "fs13", 13 }, | |
224 | { "fs14", 14 }, | |
225 | { "fs15", 15 }, | |
226 | { "fs16", 16 }, | |
227 | { "fs17", 17 }, | |
228 | { "fs18", 18 }, | |
229 | { "fs19", 19 }, | |
230 | { "fs2", 2 }, | |
231 | { "fs20", 20 }, | |
232 | { "fs21", 21 }, | |
233 | { "fs22", 22 }, | |
234 | { "fs23", 23 }, | |
235 | { "fs24", 24 }, | |
236 | { "fs25", 25 }, | |
237 | { "fs26", 26 }, | |
238 | { "fs27", 27 }, | |
239 | { "fs28", 28 }, | |
240 | { "fs29", 29 }, | |
241 | { "fs3", 3 }, | |
242 | { "fs30", 30 }, | |
243 | { "fs31", 31 }, | |
244 | { "fs4", 4 }, | |
245 | { "fs5", 5 }, | |
246 | { "fs6", 6 }, | |
247 | { "fs7", 7 }, | |
248 | { "fs8", 8 }, | |
249 | { "fs9", 9 }, | |
250 | }; | |
251 | ||
e7b71525 AO |
252 | static const struct reg_name double_registers[] = |
253 | { | |
254 | { "fd0", 0 }, | |
255 | { "fd10", 10 }, | |
256 | { "fd12", 12 }, | |
257 | { "fd14", 14 }, | |
258 | { "fd16", 16 }, | |
259 | { "fd18", 18 }, | |
260 | { "fd2", 2 }, | |
261 | { "fd20", 20 }, | |
262 | { "fd22", 22 }, | |
263 | { "fd24", 24 }, | |
264 | { "fd26", 26 }, | |
265 | { "fd28", 28 }, | |
266 | { "fd30", 30 }, | |
267 | { "fd4", 4 }, | |
268 | { "fd6", 6 }, | |
269 | { "fd8", 8 }, | |
270 | }; | |
271 | ||
603b7257 NC |
272 | /* We abuse the `value' field, that would be otherwise unused, to |
273 | encode the architecture on which (access to) the register was | |
274 | introduced. FIXME: we should probably warn when we encounter a | |
275 | register name when assembling for an architecture that doesn't | |
276 | support it, before parsing it as a symbol name. */ | |
277 | static const struct reg_name other_registers[] = | |
278 | { | |
279 | { "epsw", AM33 }, | |
280 | { "mdr", 0 }, | |
281 | { "pc", AM33 }, | |
282 | { "psw", 0 }, | |
283 | { "sp", 0 }, | |
284 | }; | |
e7b71525 | 285 | |
603b7257 | 286 | #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers) |
e7b71525 | 287 | |
603b7257 NC |
288 | /* Perform a binary search of the given register table REGS to see |
289 | if NAME is a valid regiter name. Returns the register number from | |
290 | the array on success, or -1 on failure. */ | |
252b5132 RH |
291 | |
292 | static int | |
603b7257 NC |
293 | reg_name_search (const struct reg_name *regs, |
294 | int regcount, | |
295 | const char *name) | |
252b5132 | 296 | { |
603b7257 | 297 | int low, high; |
252b5132 RH |
298 | |
299 | low = 0; | |
300 | high = regcount - 1; | |
301 | ||
302 | do | |
303 | { | |
603b7257 NC |
304 | int cmp, middle; |
305 | ||
252b5132 RH |
306 | middle = (low + high) / 2; |
307 | cmp = strcasecmp (name, regs[middle].name); | |
308 | if (cmp < 0) | |
309 | high = middle - 1; | |
310 | else if (cmp > 0) | |
311 | low = middle + 1; | |
87271fa6 NC |
312 | else |
313 | return regs[middle].value; | |
252b5132 RH |
314 | } |
315 | while (low <= high); | |
603b7257 | 316 | |
252b5132 RH |
317 | return -1; |
318 | } | |
319 | ||
603b7257 NC |
320 | /* Looks at the current position in the input line to see if it is |
321 | the name of a register in TABLE. If it is, then the name is | |
322 | converted into an expression returned in EXPRESSIONP (with X_op | |
323 | set to O_register and X_add_number set to the register number), the | |
324 | input pointer is left pointing at the first non-blank character after | |
325 | the name and the function returns TRUE. Otherwise the input pointer | |
326 | is left alone and the function returns FALSE. */ | |
87271fa6 | 327 | |
b34976b6 | 328 | static bfd_boolean |
603b7257 NC |
329 | get_register_name (expressionS * expressionP, |
330 | const struct reg_name * table, | |
331 | size_t table_length) | |
85cb2cf9 JL |
332 | { |
333 | int reg_number; | |
334 | char *name; | |
335 | char *start; | |
336 | char c; | |
337 | ||
87271fa6 | 338 | /* Find the spelling of the operand. */ |
85cb2cf9 JL |
339 | start = name = input_line_pointer; |
340 | ||
341 | c = get_symbol_end (); | |
603b7257 | 342 | reg_number = reg_name_search (table, table_length, name); |
85cb2cf9 | 343 | |
468cced8 AM |
344 | /* Put back the delimiting char. */ |
345 | *input_line_pointer = c; | |
346 | ||
87271fa6 NC |
347 | /* Look to see if it's in the register table. */ |
348 | if (reg_number >= 0) | |
85cb2cf9 JL |
349 | { |
350 | expressionP->X_op = O_register; | |
351 | expressionP->X_add_number = reg_number; | |
352 | ||
87271fa6 | 353 | /* Make the rest nice. */ |
85cb2cf9 JL |
354 | expressionP->X_add_symbol = NULL; |
355 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 356 | |
b34976b6 | 357 | return TRUE; |
85cb2cf9 | 358 | } |
87271fa6 | 359 | |
468cced8 AM |
360 | /* Reset the line as if we had not done anything. */ |
361 | input_line_pointer = start; | |
b34976b6 | 362 | return FALSE; |
85cb2cf9 JL |
363 | } |
364 | ||
b34976b6 | 365 | static bfd_boolean |
603b7257 | 366 | r_register_name (expressionS *expressionP) |
85cb2cf9 | 367 | { |
603b7257 | 368 | return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers)); |
85cb2cf9 | 369 | } |
252b5132 | 370 | |
87271fa6 | 371 | |
b34976b6 | 372 | static bfd_boolean |
603b7257 | 373 | xr_register_name (expressionS *expressionP) |
252b5132 | 374 | { |
603b7257 | 375 | return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers)); |
252b5132 RH |
376 | } |
377 | ||
b34976b6 | 378 | static bfd_boolean |
603b7257 | 379 | data_register_name (expressionS *expressionP) |
252b5132 | 380 | { |
603b7257 | 381 | return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers)); |
252b5132 RH |
382 | } |
383 | ||
b34976b6 | 384 | static bfd_boolean |
603b7257 | 385 | address_register_name (expressionS *expressionP) |
252b5132 | 386 | { |
603b7257 | 387 | return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers)); |
252b5132 RH |
388 | } |
389 | ||
e7b71525 | 390 | static bfd_boolean |
603b7257 | 391 | float_register_name (expressionS *expressionP) |
e7b71525 | 392 | { |
603b7257 | 393 | return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers)); |
e7b71525 AO |
394 | } |
395 | ||
603b7257 NC |
396 | static bfd_boolean |
397 | double_register_name (expressionS *expressionP) | |
398 | { | |
399 | return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers)); | |
400 | } | |
e7b71525 AO |
401 | |
402 | static bfd_boolean | |
603b7257 | 403 | other_register_name (expressionS *expressionP) |
e7b71525 AO |
404 | { |
405 | int reg_number; | |
406 | char *name; | |
407 | char *start; | |
408 | char c; | |
409 | ||
410 | /* Find the spelling of the operand. */ | |
411 | start = name = input_line_pointer; | |
412 | ||
413 | c = get_symbol_end (); | |
603b7257 | 414 | reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name); |
e7b71525 AO |
415 | |
416 | /* Put back the delimiting char. */ | |
603b7257 | 417 | *input_line_pointer = c; |
e7b71525 AO |
418 | |
419 | /* Look to see if it's in the register table. */ | |
603b7257 NC |
420 | if (reg_number == 0 |
421 | || (reg_number == AM33 && HAVE_AM33)) | |
e7b71525 AO |
422 | { |
423 | expressionP->X_op = O_register; | |
603b7257 | 424 | expressionP->X_add_number = 0; |
e7b71525 AO |
425 | |
426 | /* Make the rest nice. */ | |
427 | expressionP->X_add_symbol = NULL; | |
428 | expressionP->X_op_symbol = NULL; | |
429 | ||
430 | return TRUE; | |
431 | } | |
432 | ||
433 | /* Reset the line as if we had not done anything. */ | |
434 | input_line_pointer = start; | |
435 | return FALSE; | |
436 | } | |
437 | ||
252b5132 | 438 | void |
603b7257 | 439 | md_show_usage (FILE *stream) |
252b5132 | 440 | { |
b3549761 | 441 | fprintf (stream, _("MN10300 assembler options:\n\ |
252b5132 | 442 | none yet\n")); |
87271fa6 | 443 | } |
252b5132 RH |
444 | |
445 | int | |
603b7257 | 446 | md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
447 | { |
448 | return 0; | |
449 | } | |
450 | ||
451 | symbolS * | |
603b7257 | 452 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
453 | { |
454 | return 0; | |
455 | } | |
456 | ||
457 | char * | |
499ac353 | 458 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 459 | { |
499ac353 | 460 | return ieee_md_atof (type, litp, sizep, FALSE); |
252b5132 RH |
461 | } |
462 | ||
252b5132 | 463 | void |
603b7257 NC |
464 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
465 | asection *sec, | |
466 | fragS *fragP) | |
252b5132 RH |
467 | { |
468 | static unsigned long label_count = 0; | |
469 | char buf[40]; | |
470 | ||
471 | subseg_change (sec, 0); | |
472 | if (fragP->fr_subtype == 0) | |
473 | { | |
474 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
475 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
476 | fragP->fr_var = 0; | |
477 | fragP->fr_fix += 2; | |
478 | } | |
479 | else if (fragP->fr_subtype == 1) | |
480 | { | |
481 | /* Reverse the condition of the first branch. */ | |
482 | int offset = fragP->fr_fix; | |
483 | int opcode = fragP->fr_literal[offset] & 0xff; | |
484 | ||
485 | switch (opcode) | |
486 | { | |
487 | case 0xc8: | |
488 | opcode = 0xc9; | |
489 | break; | |
490 | case 0xc9: | |
491 | opcode = 0xc8; | |
492 | break; | |
493 | case 0xc0: | |
494 | opcode = 0xc2; | |
495 | break; | |
496 | case 0xc2: | |
497 | opcode = 0xc0; | |
498 | break; | |
499 | case 0xc3: | |
500 | opcode = 0xc1; | |
501 | break; | |
502 | case 0xc1: | |
503 | opcode = 0xc3; | |
504 | break; | |
505 | case 0xc4: | |
506 | opcode = 0xc6; | |
507 | break; | |
508 | case 0xc6: | |
509 | opcode = 0xc4; | |
510 | break; | |
511 | case 0xc7: | |
512 | opcode = 0xc5; | |
513 | break; | |
514 | case 0xc5: | |
515 | opcode = 0xc7; | |
516 | break; | |
517 | default: | |
518 | abort (); | |
519 | } | |
520 | fragP->fr_literal[offset] = opcode; | |
521 | ||
522 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 523 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
524 | fix_new (fragP, fragP->fr_fix + 1, 1, |
525 | symbol_new (buf, sec, 0, fragP->fr_next), | |
526 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
527 | ||
528 | /* Now create the unconditional branch + fixup to the | |
529 | final target. */ | |
530 | fragP->fr_literal[offset + 2] = 0xcc; | |
531 | fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, | |
532 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
533 | fragP->fr_var = 0; | |
534 | fragP->fr_fix += 5; | |
535 | } | |
536 | else if (fragP->fr_subtype == 2) | |
537 | { | |
538 | /* Reverse the condition of the first branch. */ | |
539 | int offset = fragP->fr_fix; | |
540 | int opcode = fragP->fr_literal[offset] & 0xff; | |
541 | ||
542 | switch (opcode) | |
543 | { | |
544 | case 0xc8: | |
545 | opcode = 0xc9; | |
546 | break; | |
547 | case 0xc9: | |
548 | opcode = 0xc8; | |
549 | break; | |
550 | case 0xc0: | |
551 | opcode = 0xc2; | |
552 | break; | |
553 | case 0xc2: | |
554 | opcode = 0xc0; | |
555 | break; | |
556 | case 0xc3: | |
557 | opcode = 0xc1; | |
558 | break; | |
559 | case 0xc1: | |
560 | opcode = 0xc3; | |
561 | break; | |
562 | case 0xc4: | |
563 | opcode = 0xc6; | |
564 | break; | |
565 | case 0xc6: | |
566 | opcode = 0xc4; | |
567 | break; | |
568 | case 0xc7: | |
569 | opcode = 0xc5; | |
570 | break; | |
571 | case 0xc5: | |
572 | opcode = 0xc7; | |
573 | break; | |
574 | default: | |
575 | abort (); | |
576 | } | |
577 | fragP->fr_literal[offset] = opcode; | |
578 | ||
579 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 580 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
581 | fix_new (fragP, fragP->fr_fix + 1, 1, |
582 | symbol_new (buf, sec, 0, fragP->fr_next), | |
583 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
584 | ||
585 | /* Now create the unconditional branch + fixup to the | |
586 | final target. */ | |
587 | fragP->fr_literal[offset + 2] = 0xdc; | |
588 | fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, | |
589 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
590 | fragP->fr_var = 0; | |
591 | fragP->fr_fix += 7; | |
592 | } | |
593 | else if (fragP->fr_subtype == 3) | |
594 | { | |
595 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
596 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
597 | fragP->fr_var = 0; | |
598 | fragP->fr_fix += 3; | |
599 | } | |
600 | else if (fragP->fr_subtype == 4) | |
601 | { | |
602 | /* Reverse the condition of the first branch. */ | |
603 | int offset = fragP->fr_fix; | |
604 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
605 | ||
606 | switch (opcode) | |
607 | { | |
608 | case 0xe8: | |
609 | opcode = 0xe9; | |
610 | break; | |
611 | case 0xe9: | |
612 | opcode = 0xe8; | |
613 | break; | |
614 | case 0xea: | |
615 | opcode = 0xeb; | |
616 | break; | |
617 | case 0xeb: | |
618 | opcode = 0xea; | |
619 | break; | |
620 | default: | |
621 | abort (); | |
622 | } | |
623 | fragP->fr_literal[offset + 1] = opcode; | |
624 | ||
625 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 626 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
627 | fix_new (fragP, fragP->fr_fix + 2, 1, |
628 | symbol_new (buf, sec, 0, fragP->fr_next), | |
629 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
630 | ||
631 | /* Now create the unconditional branch + fixup to the | |
632 | final target. */ | |
633 | fragP->fr_literal[offset + 3] = 0xcc; | |
634 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
635 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
636 | fragP->fr_var = 0; | |
637 | fragP->fr_fix += 6; | |
638 | } | |
639 | else if (fragP->fr_subtype == 5) | |
640 | { | |
641 | /* Reverse the condition of the first branch. */ | |
642 | int offset = fragP->fr_fix; | |
643 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
644 | ||
645 | switch (opcode) | |
646 | { | |
647 | case 0xe8: | |
648 | opcode = 0xe9; | |
649 | break; | |
650 | case 0xea: | |
651 | opcode = 0xeb; | |
652 | break; | |
653 | case 0xeb: | |
654 | opcode = 0xea; | |
655 | break; | |
656 | default: | |
657 | abort (); | |
658 | } | |
659 | fragP->fr_literal[offset + 1] = opcode; | |
660 | ||
661 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 662 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
663 | fix_new (fragP, fragP->fr_fix + 2, 1, |
664 | symbol_new (buf, sec, 0, fragP->fr_next), | |
665 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
666 | ||
667 | /* Now create the unconditional branch + fixup to the | |
668 | final target. */ | |
669 | fragP->fr_literal[offset + 3] = 0xdc; | |
670 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
671 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
672 | fragP->fr_var = 0; | |
673 | fragP->fr_fix += 8; | |
674 | } | |
675 | else if (fragP->fr_subtype == 6) | |
676 | { | |
677 | int offset = fragP->fr_fix; | |
ca75ed2d | 678 | |
252b5132 RH |
679 | fragP->fr_literal[offset] = 0xcd; |
680 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, | |
681 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
682 | fragP->fr_var = 0; | |
683 | fragP->fr_fix += 5; | |
684 | } | |
685 | else if (fragP->fr_subtype == 7) | |
686 | { | |
687 | int offset = fragP->fr_fix; | |
ca75ed2d | 688 | |
252b5132 RH |
689 | fragP->fr_literal[offset] = 0xdd; |
690 | fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; | |
691 | fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; | |
ab3e2b4a NC |
692 | fragP->fr_literal[offset + 3] = 0; |
693 | fragP->fr_literal[offset + 4] = 0; | |
252b5132 RH |
694 | |
695 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
696 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
697 | fragP->fr_var = 0; | |
698 | fragP->fr_fix += 7; | |
699 | } | |
700 | else if (fragP->fr_subtype == 8) | |
701 | { | |
702 | int offset = fragP->fr_fix; | |
ca75ed2d | 703 | |
252b5132 RH |
704 | fragP->fr_literal[offset] = 0xfa; |
705 | fragP->fr_literal[offset + 1] = 0xff; | |
706 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
707 | fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); | |
708 | fragP->fr_var = 0; | |
709 | fragP->fr_fix += 4; | |
710 | } | |
711 | else if (fragP->fr_subtype == 9) | |
712 | { | |
713 | int offset = fragP->fr_fix; | |
ca75ed2d | 714 | |
252b5132 RH |
715 | fragP->fr_literal[offset] = 0xfc; |
716 | fragP->fr_literal[offset + 1] = 0xff; | |
717 | ||
718 | fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, | |
719 | fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); | |
720 | fragP->fr_var = 0; | |
721 | fragP->fr_fix += 6; | |
722 | } | |
723 | else if (fragP->fr_subtype == 10) | |
724 | { | |
725 | fragP->fr_literal[fragP->fr_fix] = 0xca; | |
726 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
727 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
728 | fragP->fr_var = 0; | |
729 | fragP->fr_fix += 2; | |
730 | } | |
731 | else if (fragP->fr_subtype == 11) | |
732 | { | |
733 | int offset = fragP->fr_fix; | |
ca75ed2d | 734 | |
252b5132 RH |
735 | fragP->fr_literal[offset] = 0xcc; |
736 | ||
acb02403 | 737 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, |
252b5132 RH |
738 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); |
739 | fragP->fr_var = 0; | |
740 | fragP->fr_fix += 3; | |
741 | } | |
742 | else if (fragP->fr_subtype == 12) | |
743 | { | |
744 | int offset = fragP->fr_fix; | |
ca75ed2d | 745 | |
252b5132 RH |
746 | fragP->fr_literal[offset] = 0xdc; |
747 | ||
748 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
749 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
750 | fragP->fr_var = 0; | |
751 | fragP->fr_fix += 5; | |
752 | } | |
e7b71525 AO |
753 | else if (fragP->fr_subtype == 13) |
754 | { | |
755 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
756 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
757 | fragP->fr_var = 0; | |
758 | fragP->fr_fix += 3; | |
759 | } | |
760 | else if (fragP->fr_subtype == 14) | |
761 | { | |
762 | /* Reverse the condition of the first branch. */ | |
763 | int offset = fragP->fr_fix; | |
764 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
765 | ||
766 | switch (opcode) | |
767 | { | |
768 | case 0xd0: | |
769 | opcode = 0xd1; | |
770 | break; | |
771 | case 0xd1: | |
772 | opcode = 0xd0; | |
773 | break; | |
774 | case 0xd2: | |
775 | opcode = 0xdc; | |
776 | break; | |
777 | case 0xd3: | |
778 | opcode = 0xdb; | |
779 | break; | |
780 | case 0xd4: | |
781 | opcode = 0xda; | |
782 | break; | |
783 | case 0xd5: | |
784 | opcode = 0xd9; | |
785 | break; | |
786 | case 0xd6: | |
787 | opcode = 0xd8; | |
788 | break; | |
789 | case 0xd7: | |
790 | opcode = 0xdd; | |
791 | break; | |
792 | case 0xd8: | |
793 | opcode = 0xd6; | |
794 | break; | |
795 | case 0xd9: | |
796 | opcode = 0xd5; | |
797 | break; | |
798 | case 0xda: | |
799 | opcode = 0xd4; | |
800 | break; | |
801 | case 0xdb: | |
802 | opcode = 0xd3; | |
803 | break; | |
804 | case 0xdc: | |
805 | opcode = 0xd2; | |
806 | break; | |
807 | case 0xdd: | |
808 | opcode = 0xd7; | |
809 | break; | |
810 | default: | |
811 | abort (); | |
812 | } | |
813 | fragP->fr_literal[offset + 1] = opcode; | |
814 | ||
815 | /* Create a fixup for the reversed conditional branch. */ | |
816 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); | |
817 | fix_new (fragP, fragP->fr_fix + 2, 1, | |
818 | symbol_new (buf, sec, 0, fragP->fr_next), | |
819 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
820 | ||
821 | /* Now create the unconditional branch + fixup to the | |
822 | final target. */ | |
823 | fragP->fr_literal[offset + 3] = 0xcc; | |
824 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
825 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
826 | fragP->fr_var = 0; | |
827 | fragP->fr_fix += 6; | |
828 | } | |
829 | else if (fragP->fr_subtype == 15) | |
830 | { | |
831 | /* Reverse the condition of the first branch. */ | |
832 | int offset = fragP->fr_fix; | |
833 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
834 | ||
835 | switch (opcode) | |
836 | { | |
837 | case 0xd0: | |
838 | opcode = 0xd1; | |
839 | break; | |
840 | case 0xd1: | |
841 | opcode = 0xd0; | |
842 | break; | |
843 | case 0xd2: | |
844 | opcode = 0xdc; | |
845 | break; | |
846 | case 0xd3: | |
847 | opcode = 0xdb; | |
848 | break; | |
849 | case 0xd4: | |
850 | opcode = 0xda; | |
851 | break; | |
852 | case 0xd5: | |
853 | opcode = 0xd9; | |
854 | break; | |
855 | case 0xd6: | |
856 | opcode = 0xd8; | |
857 | break; | |
858 | case 0xd7: | |
859 | opcode = 0xdd; | |
860 | break; | |
861 | case 0xd8: | |
862 | opcode = 0xd6; | |
863 | break; | |
864 | case 0xd9: | |
865 | opcode = 0xd5; | |
866 | break; | |
867 | case 0xda: | |
868 | opcode = 0xd4; | |
869 | break; | |
870 | case 0xdb: | |
871 | opcode = 0xd3; | |
872 | break; | |
873 | case 0xdc: | |
874 | opcode = 0xd2; | |
875 | break; | |
876 | case 0xdd: | |
877 | opcode = 0xd7; | |
878 | break; | |
879 | default: | |
880 | abort (); | |
881 | } | |
882 | fragP->fr_literal[offset + 1] = opcode; | |
883 | ||
884 | /* Create a fixup for the reversed conditional branch. */ | |
885 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); | |
886 | fix_new (fragP, fragP->fr_fix + 2, 1, | |
887 | symbol_new (buf, sec, 0, fragP->fr_next), | |
888 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
889 | ||
890 | /* Now create the unconditional branch + fixup to the | |
891 | final target. */ | |
892 | fragP->fr_literal[offset + 3] = 0xdc; | |
893 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
894 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
895 | fragP->fr_var = 0; | |
896 | fragP->fr_fix += 8; | |
897 | } | |
252b5132 RH |
898 | else |
899 | abort (); | |
900 | } | |
901 | ||
902 | valueT | |
603b7257 | 903 | md_section_align (asection *seg, valueT addr) |
252b5132 RH |
904 | { |
905 | int align = bfd_get_section_alignment (stdoutput, seg); | |
603b7257 | 906 | |
252b5132 RH |
907 | return ((addr + (1 << align) - 1) & (-1 << align)); |
908 | } | |
909 | ||
910 | void | |
603b7257 | 911 | md_begin (void) |
252b5132 RH |
912 | { |
913 | char *prev_name = ""; | |
603b7257 | 914 | const struct mn10300_opcode *op; |
252b5132 | 915 | |
87271fa6 | 916 | mn10300_hash = hash_new (); |
252b5132 RH |
917 | |
918 | /* Insert unique names into hash table. The MN10300 instruction set | |
919 | has many identical opcode names that have different opcodes based | |
920 | on the operands. This hash table then provides a quick index to | |
921 | the first opcode with a particular name in the opcode table. */ | |
922 | ||
923 | op = mn10300_opcodes; | |
924 | while (op->name) | |
925 | { | |
87271fa6 | 926 | if (strcmp (prev_name, op->name)) |
252b5132 RH |
927 | { |
928 | prev_name = (char *) op->name; | |
929 | hash_insert (mn10300_hash, op->name, (char *) op); | |
930 | } | |
931 | op++; | |
932 | } | |
933 | ||
252b5132 | 934 | /* Set the default machine type. */ |
2ce28d43 AO |
935 | #ifdef TE_LINUX |
936 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2)) | |
937 | as_warn (_("could not set architecture and machine")); | |
938 | ||
939 | current_machine = AM33_2; | |
940 | #else | |
0a727238 | 941 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103)) |
252b5132 RH |
942 | as_warn (_("could not set architecture and machine")); |
943 | ||
0a727238 | 944 | current_machine = MN103; |
2ce28d43 | 945 | #endif |
252b5132 RH |
946 | } |
947 | ||
bf6f0d0c AO |
948 | static symbolS *GOT_symbol; |
949 | ||
bf6f0d0c | 950 | static inline int |
603b7257 | 951 | mn10300_PIC_related_p (symbolS *sym) |
bf6f0d0c AO |
952 | { |
953 | expressionS *exp; | |
954 | ||
955 | if (! sym) | |
956 | return 0; | |
957 | ||
958 | if (sym == GOT_symbol) | |
959 | return 1; | |
960 | ||
961 | exp = symbol_get_value_expression (sym); | |
962 | ||
963 | return (exp->X_op == O_PIC_reloc | |
964 | || mn10300_PIC_related_p (exp->X_add_symbol) | |
965 | || mn10300_PIC_related_p (exp->X_op_symbol)); | |
966 | } | |
967 | ||
968 | static inline int | |
603b7257 | 969 | mn10300_check_fixup (struct mn10300_fixup *fixup) |
bf6f0d0c AO |
970 | { |
971 | expressionS *exp = &fixup->exp; | |
972 | ||
973 | repeat: | |
974 | switch (exp->X_op) | |
975 | { | |
976 | case O_add: | |
977 | case O_subtract: /* If we're sufficiently unlucky that the label | |
978 | and the expression that references it happen | |
979 | to end up in different frags, the subtract | |
980 | won't be simplified within expression(). */ | |
981 | /* The PIC-related operand must be the first operand of a sum. */ | |
982 | if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol)) | |
983 | return 1; | |
984 | ||
985 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) | |
986 | fixup->reloc = BFD_RELOC_32_GOT_PCREL; | |
987 | ||
988 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
989 | goto repeat; | |
990 | ||
991 | case O_symbol: | |
992 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) | |
993 | fixup->reloc = BFD_RELOC_32_GOT_PCREL; | |
994 | break; | |
995 | ||
996 | case O_PIC_reloc: | |
997 | fixup->reloc = exp->X_md; | |
998 | exp->X_op = O_symbol; | |
999 | if (fixup->reloc == BFD_RELOC_32_PLT_PCREL | |
1000 | && fixup->opindex >= 0 | |
1001 | && (mn10300_operands[fixup->opindex].flags | |
1002 | & MN10300_OPERAND_RELAX)) | |
1003 | return 1; | |
1004 | break; | |
1005 | ||
1006 | default: | |
1007 | return (mn10300_PIC_related_p (exp->X_add_symbol) | |
1008 | || mn10300_PIC_related_p (exp->X_op_symbol)); | |
1009 | } | |
1010 | ||
1011 | return 0; | |
1012 | } | |
1013 | ||
1014 | void | |
603b7257 | 1015 | mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
bf6f0d0c AO |
1016 | { |
1017 | struct mn10300_fixup fixup; | |
1018 | ||
1019 | fixup.opindex = -1; | |
1020 | fixup.exp = *exp; | |
1021 | fixup.reloc = BFD_RELOC_UNUSED; | |
1022 | ||
1023 | mn10300_check_fixup (&fixup); | |
1024 | ||
1025 | if (fixup.reloc == BFD_RELOC_MN10300_GOT32) | |
1026 | switch (size) | |
1027 | { | |
1028 | case 2: | |
1029 | fixup.reloc = BFD_RELOC_MN10300_GOT16; | |
1030 | break; | |
1031 | ||
1032 | case 3: | |
1033 | fixup.reloc = BFD_RELOC_MN10300_GOT24; | |
1034 | break; | |
1035 | ||
1036 | case 4: | |
1037 | break; | |
1038 | ||
1039 | default: | |
1040 | goto error; | |
1041 | } | |
1042 | else if (fixup.reloc == BFD_RELOC_UNUSED) | |
1043 | switch (size) | |
1044 | { | |
1045 | case 1: | |
1046 | fixup.reloc = BFD_RELOC_8; | |
1047 | break; | |
1048 | ||
1049 | case 2: | |
1050 | fixup.reloc = BFD_RELOC_16; | |
1051 | break; | |
1052 | ||
1053 | case 3: | |
1054 | fixup.reloc = BFD_RELOC_24; | |
1055 | break; | |
1056 | ||
1057 | case 4: | |
1058 | fixup.reloc = BFD_RELOC_32; | |
1059 | break; | |
1060 | ||
1061 | default: | |
1062 | goto error; | |
1063 | } | |
1064 | else if (size != 4) | |
1065 | { | |
1066 | error: | |
1067 | as_bad (_("unsupported BFD relocation size %u"), size); | |
1068 | fixup.reloc = BFD_RELOC_UNUSED; | |
1069 | } | |
1070 | ||
1071 | fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc); | |
1072 | } | |
1073 | ||
603b7257 NC |
1074 | static bfd_boolean |
1075 | check_operand (const struct mn10300_operand *operand, | |
1076 | offsetT val) | |
1077 | { | |
1078 | /* No need to check 32bit operands for a bit. Note that | |
1079 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
1080 | if (operand->bits != 32 | |
1081 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
1082 | { | |
1083 | long min, max; | |
1084 | offsetT test; | |
1085 | int bits; | |
1086 | ||
1087 | bits = operand->bits; | |
1088 | if (operand->flags & MN10300_OPERAND_24BIT) | |
1089 | bits = 24; | |
1090 | ||
1091 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
1092 | { | |
1093 | max = (1 << (bits - 1)) - 1; | |
1094 | min = - (1 << (bits - 1)); | |
1095 | } | |
1096 | else | |
1097 | { | |
1098 | max = (1 << bits) - 1; | |
1099 | min = 0; | |
1100 | } | |
1101 | ||
1102 | test = val; | |
1103 | ||
1104 | if (test < (offsetT) min || test > (offsetT) max) | |
1105 | return FALSE; | |
1106 | } | |
1107 | return TRUE; | |
1108 | } | |
1109 | ||
1110 | /* Insert an operand value into an instruction. */ | |
1111 | ||
1112 | static void | |
1113 | mn10300_insert_operand (unsigned long *insnp, | |
1114 | unsigned long *extensionp, | |
1115 | const struct mn10300_operand *operand, | |
1116 | offsetT val, | |
1117 | char *file, | |
1118 | unsigned int line, | |
1119 | unsigned int shift) | |
1120 | { | |
1121 | /* No need to check 32bit operands for a bit. Note that | |
1122 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
1123 | if (operand->bits != 32 | |
1124 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
1125 | { | |
1126 | long min, max; | |
1127 | offsetT test; | |
1128 | int bits; | |
1129 | ||
1130 | bits = operand->bits; | |
1131 | if (operand->flags & MN10300_OPERAND_24BIT) | |
1132 | bits = 24; | |
1133 | ||
1134 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
1135 | { | |
1136 | max = (1 << (bits - 1)) - 1; | |
1137 | min = - (1 << (bits - 1)); | |
1138 | } | |
1139 | else | |
1140 | { | |
1141 | max = (1 << bits) - 1; | |
1142 | min = 0; | |
1143 | } | |
1144 | ||
1145 | test = val; | |
1146 | ||
1147 | if (test < (offsetT) min || test > (offsetT) max) | |
1148 | as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line); | |
1149 | } | |
1150 | ||
1151 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
1152 | { | |
1153 | *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); | |
1154 | *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) | |
1155 | << operand->shift); | |
1156 | } | |
1157 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) | |
1158 | { | |
1159 | *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1); | |
1160 | *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1)) | |
1161 | << operand->shift); | |
1162 | } | |
1163 | else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG))) | |
1164 | { | |
1165 | /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an | |
1166 | explanation of these variables. Note that FMT-implied shifts | |
1167 | are not taken into account for FP registers. */ | |
1168 | unsigned long mask_low, mask_high; | |
1169 | int shl_low, shr_high, shl_high; | |
1170 | ||
1171 | switch (operand->bits) | |
1172 | { | |
1173 | case 5: | |
1174 | /* Handle regular FP registers. */ | |
1175 | if (operand->shift >= 0) | |
1176 | { | |
1177 | /* This is an `m' register. */ | |
1178 | shl_low = operand->shift; | |
1179 | shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4; | |
1180 | } | |
1181 | else | |
1182 | { | |
1183 | /* This is an `n' register. */ | |
1184 | shl_low = -operand->shift; | |
1185 | shl_high = shl_low / 4; | |
1186 | } | |
1187 | ||
1188 | mask_low = 0x0f; | |
1189 | mask_high = 0x10; | |
1190 | shr_high = 4; | |
1191 | break; | |
1192 | ||
1193 | case 3: | |
1194 | /* Handle accumulators. */ | |
1195 | shl_low = -operand->shift; | |
1196 | shl_high = 0; | |
1197 | mask_low = 0x03; | |
1198 | mask_high = 0x04; | |
1199 | shr_high = 2; | |
1200 | break; | |
1201 | ||
1202 | default: | |
1203 | abort (); | |
1204 | } | |
1205 | *insnp |= ((((val & mask_high) >> shr_high) << shl_high) | |
1206 | | ((val & mask_low) << shl_low)); | |
1207 | } | |
1208 | else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) | |
1209 | { | |
1210 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
1211 | << (operand->shift + shift)); | |
1212 | ||
1213 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
1214 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
1215 | << (operand->shift + shift + operand->bits)); | |
1216 | } | |
1217 | else | |
1218 | { | |
1219 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
1220 | << (operand->shift + shift)); | |
1221 | ||
1222 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
1223 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
1224 | << (operand->shift + shift + operand->bits)); | |
1225 | } | |
1226 | } | |
1227 | ||
252b5132 | 1228 | void |
603b7257 | 1229 | md_assemble (char *str) |
252b5132 RH |
1230 | { |
1231 | char *s; | |
1232 | struct mn10300_opcode *opcode; | |
1233 | struct mn10300_opcode *next_opcode; | |
1234 | const unsigned char *opindex_ptr; | |
1235 | int next_opindex, relaxable; | |
eb0dfd58 | 1236 | unsigned long insn, extension, size = 0; |
252b5132 RH |
1237 | char *f; |
1238 | int i; | |
1239 | int match; | |
1240 | ||
1241 | /* Get the opcode. */ | |
3882b010 | 1242 | for (s = str; *s != '\0' && !ISSPACE (*s); s++) |
252b5132 RH |
1243 | ; |
1244 | if (*s != '\0') | |
1245 | *s++ = '\0'; | |
1246 | ||
87271fa6 NC |
1247 | /* Find the first opcode with the proper name. */ |
1248 | opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str); | |
252b5132 RH |
1249 | if (opcode == NULL) |
1250 | { | |
1251 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
1252 | return; | |
1253 | } | |
1254 | ||
1255 | str = s; | |
3882b010 | 1256 | while (ISSPACE (*str)) |
252b5132 RH |
1257 | ++str; |
1258 | ||
1259 | input_line_pointer = str; | |
1260 | ||
87271fa6 | 1261 | for (;;) |
252b5132 RH |
1262 | { |
1263 | const char *errmsg; | |
1264 | int op_idx; | |
1265 | char *hold; | |
1266 | int extra_shift = 0; | |
1267 | ||
252b5132 RH |
1268 | errmsg = _("Invalid opcode/operands"); |
1269 | ||
1270 | /* Reset the array of register operands. */ | |
1271 | memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); | |
1272 | ||
1273 | relaxable = 0; | |
1274 | fc = 0; | |
1275 | match = 0; | |
1276 | next_opindex = 0; | |
1277 | insn = opcode->opcode; | |
1278 | extension = 0; | |
1279 | ||
1280 | /* If the instruction is not available on the current machine | |
1281 | then it can not possibly match. */ | |
1282 | if (opcode->machine | |
e7b71525 | 1283 | && !(opcode->machine == AM33_2 && HAVE_AM33_2) |
aa15f6f7 AO |
1284 | && !(opcode->machine == AM33 && HAVE_AM33) |
1285 | && !(opcode->machine == AM30 && HAVE_AM30)) | |
252b5132 RH |
1286 | goto error; |
1287 | ||
1288 | for (op_idx = 1, opindex_ptr = opcode->operands; | |
1289 | *opindex_ptr != 0; | |
1290 | opindex_ptr++, op_idx++) | |
1291 | { | |
1292 | const struct mn10300_operand *operand; | |
1293 | expressionS ex; | |
1294 | ||
1295 | if (next_opindex == 0) | |
1296 | { | |
1297 | operand = &mn10300_operands[*opindex_ptr]; | |
1298 | } | |
1299 | else | |
1300 | { | |
1301 | operand = &mn10300_operands[next_opindex]; | |
1302 | next_opindex = 0; | |
1303 | } | |
1304 | ||
1305 | while (*str == ' ' || *str == ',') | |
1306 | ++str; | |
1307 | ||
1308 | if (operand->flags & MN10300_OPERAND_RELAX) | |
1309 | relaxable = 1; | |
1310 | ||
87271fa6 | 1311 | /* Gather the operand. */ |
252b5132 RH |
1312 | hold = input_line_pointer; |
1313 | input_line_pointer = str; | |
1314 | ||
1315 | if (operand->flags & MN10300_OPERAND_PAREN) | |
1316 | { | |
1317 | if (*input_line_pointer != ')' && *input_line_pointer != '(') | |
1318 | { | |
1319 | input_line_pointer = hold; | |
1320 | str = hold; | |
1321 | goto error; | |
1322 | } | |
1323 | input_line_pointer++; | |
1324 | goto keep_going; | |
1325 | } | |
1326 | /* See if we can match the operands. */ | |
1327 | else if (operand->flags & MN10300_OPERAND_DREG) | |
1328 | { | |
1329 | if (!data_register_name (&ex)) | |
1330 | { | |
1331 | input_line_pointer = hold; | |
1332 | str = hold; | |
1333 | goto error; | |
1334 | } | |
1335 | } | |
1336 | else if (operand->flags & MN10300_OPERAND_AREG) | |
1337 | { | |
1338 | if (!address_register_name (&ex)) | |
1339 | { | |
1340 | input_line_pointer = hold; | |
1341 | str = hold; | |
1342 | goto error; | |
1343 | } | |
1344 | } | |
1345 | else if (operand->flags & MN10300_OPERAND_SP) | |
1346 | { | |
1347 | char *start = input_line_pointer; | |
1348 | char c = get_symbol_end (); | |
1349 | ||
1350 | if (strcasecmp (start, "sp") != 0) | |
1351 | { | |
1352 | *input_line_pointer = c; | |
1353 | input_line_pointer = hold; | |
1354 | str = hold; | |
1355 | goto error; | |
1356 | } | |
1357 | *input_line_pointer = c; | |
1358 | goto keep_going; | |
1359 | } | |
85cb2cf9 JL |
1360 | else if (operand->flags & MN10300_OPERAND_RREG) |
1361 | { | |
1362 | if (!r_register_name (&ex)) | |
1363 | { | |
1364 | input_line_pointer = hold; | |
1365 | str = hold; | |
1366 | goto error; | |
1367 | } | |
1368 | } | |
1369 | else if (operand->flags & MN10300_OPERAND_XRREG) | |
1370 | { | |
1371 | if (!xr_register_name (&ex)) | |
1372 | { | |
1373 | input_line_pointer = hold; | |
1374 | str = hold; | |
1375 | goto error; | |
1376 | } | |
1377 | } | |
e7b71525 AO |
1378 | else if (operand->flags & MN10300_OPERAND_FSREG) |
1379 | { | |
1380 | if (!float_register_name (&ex)) | |
1381 | { | |
1382 | input_line_pointer = hold; | |
1383 | str = hold; | |
1384 | goto error; | |
1385 | } | |
1386 | } | |
1387 | else if (operand->flags & MN10300_OPERAND_FDREG) | |
1388 | { | |
1389 | if (!double_register_name (&ex)) | |
1390 | { | |
1391 | input_line_pointer = hold; | |
1392 | str = hold; | |
1393 | goto error; | |
1394 | } | |
1395 | } | |
1396 | else if (operand->flags & MN10300_OPERAND_FPCR) | |
1397 | { | |
1398 | char *start = input_line_pointer; | |
1399 | char c = get_symbol_end (); | |
1400 | ||
1401 | if (strcasecmp (start, "fpcr") != 0) | |
1402 | { | |
1403 | *input_line_pointer = c; | |
1404 | input_line_pointer = hold; | |
1405 | str = hold; | |
1406 | goto error; | |
1407 | } | |
1408 | *input_line_pointer = c; | |
1409 | goto keep_going; | |
1410 | } | |
85cb2cf9 JL |
1411 | else if (operand->flags & MN10300_OPERAND_USP) |
1412 | { | |
1413 | char *start = input_line_pointer; | |
1414 | char c = get_symbol_end (); | |
1415 | ||
1416 | if (strcasecmp (start, "usp") != 0) | |
1417 | { | |
1418 | *input_line_pointer = c; | |
1419 | input_line_pointer = hold; | |
1420 | str = hold; | |
1421 | goto error; | |
1422 | } | |
1423 | *input_line_pointer = c; | |
1424 | goto keep_going; | |
1425 | } | |
1426 | else if (operand->flags & MN10300_OPERAND_SSP) | |
1427 | { | |
1428 | char *start = input_line_pointer; | |
1429 | char c = get_symbol_end (); | |
1430 | ||
1431 | if (strcasecmp (start, "ssp") != 0) | |
1432 | { | |
1433 | *input_line_pointer = c; | |
1434 | input_line_pointer = hold; | |
1435 | str = hold; | |
1436 | goto error; | |
1437 | } | |
1438 | *input_line_pointer = c; | |
1439 | goto keep_going; | |
1440 | } | |
1441 | else if (operand->flags & MN10300_OPERAND_MSP) | |
1442 | { | |
1443 | char *start = input_line_pointer; | |
1444 | char c = get_symbol_end (); | |
1445 | ||
1446 | if (strcasecmp (start, "msp") != 0) | |
1447 | { | |
1448 | *input_line_pointer = c; | |
1449 | input_line_pointer = hold; | |
1450 | str = hold; | |
1451 | goto error; | |
1452 | } | |
1453 | *input_line_pointer = c; | |
1454 | goto keep_going; | |
1455 | } | |
1456 | else if (operand->flags & MN10300_OPERAND_PC) | |
1457 | { | |
1458 | char *start = input_line_pointer; | |
1459 | char c = get_symbol_end (); | |
1460 | ||
1461 | if (strcasecmp (start, "pc") != 0) | |
1462 | { | |
1463 | *input_line_pointer = c; | |
1464 | input_line_pointer = hold; | |
1465 | str = hold; | |
1466 | goto error; | |
1467 | } | |
1468 | *input_line_pointer = c; | |
1469 | goto keep_going; | |
1470 | } | |
1471 | else if (operand->flags & MN10300_OPERAND_EPSW) | |
1472 | { | |
1473 | char *start = input_line_pointer; | |
1474 | char c = get_symbol_end (); | |
1475 | ||
1476 | if (strcasecmp (start, "epsw") != 0) | |
1477 | { | |
1478 | *input_line_pointer = c; | |
1479 | input_line_pointer = hold; | |
1480 | str = hold; | |
1481 | goto error; | |
1482 | } | |
1483 | *input_line_pointer = c; | |
1484 | goto keep_going; | |
1485 | } | |
1486 | else if (operand->flags & MN10300_OPERAND_PLUS) | |
1487 | { | |
1488 | if (*input_line_pointer != '+') | |
1489 | { | |
1490 | input_line_pointer = hold; | |
1491 | str = hold; | |
1492 | goto error; | |
1493 | } | |
1494 | input_line_pointer++; | |
1495 | goto keep_going; | |
1496 | } | |
252b5132 RH |
1497 | else if (operand->flags & MN10300_OPERAND_PSW) |
1498 | { | |
1499 | char *start = input_line_pointer; | |
1500 | char c = get_symbol_end (); | |
1501 | ||
1502 | if (strcasecmp (start, "psw") != 0) | |
1503 | { | |
1504 | *input_line_pointer = c; | |
1505 | input_line_pointer = hold; | |
1506 | str = hold; | |
1507 | goto error; | |
1508 | } | |
1509 | *input_line_pointer = c; | |
1510 | goto keep_going; | |
1511 | } | |
1512 | else if (operand->flags & MN10300_OPERAND_MDR) | |
1513 | { | |
1514 | char *start = input_line_pointer; | |
1515 | char c = get_symbol_end (); | |
1516 | ||
1517 | if (strcasecmp (start, "mdr") != 0) | |
1518 | { | |
1519 | *input_line_pointer = c; | |
1520 | input_line_pointer = hold; | |
1521 | str = hold; | |
1522 | goto error; | |
1523 | } | |
1524 | *input_line_pointer = c; | |
1525 | goto keep_going; | |
1526 | } | |
1527 | else if (operand->flags & MN10300_OPERAND_REG_LIST) | |
1528 | { | |
1529 | unsigned int value = 0; | |
1530 | if (*input_line_pointer != '[') | |
1531 | { | |
1532 | input_line_pointer = hold; | |
1533 | str = hold; | |
1534 | goto error; | |
1535 | } | |
1536 | ||
1537 | /* Eat the '['. */ | |
1538 | input_line_pointer++; | |
87271fa6 | 1539 | |
252b5132 | 1540 | /* We used to reject a null register list here; however, |
87271fa6 NC |
1541 | we accept it now so the compiler can emit "call" |
1542 | instructions for all calls to named functions. | |
252b5132 RH |
1543 | |
1544 | The linker can then fill in the appropriate bits for the | |
1545 | register list and stack size or change the instruction | |
1546 | into a "calls" if using "call" is not profitable. */ | |
1547 | while (*input_line_pointer != ']') | |
1548 | { | |
1549 | char *start; | |
1550 | char c; | |
1551 | ||
1552 | if (*input_line_pointer == ',') | |
1553 | input_line_pointer++; | |
1554 | ||
1555 | start = input_line_pointer; | |
1556 | c = get_symbol_end (); | |
1557 | ||
1558 | if (strcasecmp (start, "d2") == 0) | |
1559 | { | |
1560 | value |= 0x80; | |
1561 | *input_line_pointer = c; | |
1562 | } | |
1563 | else if (strcasecmp (start, "d3") == 0) | |
1564 | { | |
1565 | value |= 0x40; | |
1566 | *input_line_pointer = c; | |
1567 | } | |
1568 | else if (strcasecmp (start, "a2") == 0) | |
1569 | { | |
1570 | value |= 0x20; | |
1571 | *input_line_pointer = c; | |
1572 | } | |
1573 | else if (strcasecmp (start, "a3") == 0) | |
1574 | { | |
1575 | value |= 0x10; | |
1576 | *input_line_pointer = c; | |
1577 | } | |
1578 | else if (strcasecmp (start, "other") == 0) | |
1579 | { | |
1580 | value |= 0x08; | |
1581 | *input_line_pointer = c; | |
1582 | } | |
0a727238 | 1583 | else if (HAVE_AM33 |
85cb2cf9 JL |
1584 | && strcasecmp (start, "exreg0") == 0) |
1585 | { | |
1586 | value |= 0x04; | |
1587 | *input_line_pointer = c; | |
1588 | } | |
0a727238 | 1589 | else if (HAVE_AM33 |
85cb2cf9 JL |
1590 | && strcasecmp (start, "exreg1") == 0) |
1591 | { | |
1592 | value |= 0x02; | |
1593 | *input_line_pointer = c; | |
1594 | } | |
0a727238 | 1595 | else if (HAVE_AM33 |
85cb2cf9 JL |
1596 | && strcasecmp (start, "exother") == 0) |
1597 | { | |
1598 | value |= 0x01; | |
1599 | *input_line_pointer = c; | |
1600 | } | |
0a727238 | 1601 | else if (HAVE_AM33 |
85cb2cf9 JL |
1602 | && strcasecmp (start, "all") == 0) |
1603 | { | |
1604 | value |= 0xff; | |
1605 | *input_line_pointer = c; | |
1606 | } | |
252b5132 RH |
1607 | else |
1608 | { | |
1609 | input_line_pointer = hold; | |
1610 | str = hold; | |
1611 | goto error; | |
1612 | } | |
1613 | } | |
1614 | input_line_pointer++; | |
603b7257 NC |
1615 | mn10300_insert_operand (& insn, & extension, operand, |
1616 | value, NULL, 0, 0); | |
252b5132 RH |
1617 | goto keep_going; |
1618 | ||
1619 | } | |
1620 | else if (data_register_name (&ex)) | |
1621 | { | |
1622 | input_line_pointer = hold; | |
1623 | str = hold; | |
1624 | goto error; | |
1625 | } | |
1626 | else if (address_register_name (&ex)) | |
1627 | { | |
1628 | input_line_pointer = hold; | |
1629 | str = hold; | |
1630 | goto error; | |
1631 | } | |
1632 | else if (other_register_name (&ex)) | |
1633 | { | |
1634 | input_line_pointer = hold; | |
1635 | str = hold; | |
1636 | goto error; | |
1637 | } | |
0a727238 | 1638 | else if (HAVE_AM33 && r_register_name (&ex)) |
85cb2cf9 JL |
1639 | { |
1640 | input_line_pointer = hold; | |
1641 | str = hold; | |
1642 | goto error; | |
1643 | } | |
0a727238 | 1644 | else if (HAVE_AM33 && xr_register_name (&ex)) |
85cb2cf9 JL |
1645 | { |
1646 | input_line_pointer = hold; | |
1647 | str = hold; | |
1648 | goto error; | |
1649 | } | |
e7b71525 AO |
1650 | else if (HAVE_AM33_2 && float_register_name (&ex)) |
1651 | { | |
1652 | input_line_pointer = hold; | |
1653 | str = hold; | |
1654 | goto error; | |
1655 | } | |
1656 | else if (HAVE_AM33_2 && double_register_name (&ex)) | |
1657 | { | |
1658 | input_line_pointer = hold; | |
1659 | str = hold; | |
1660 | goto error; | |
1661 | } | |
252b5132 RH |
1662 | else if (*str == ')' || *str == '(') |
1663 | { | |
1664 | input_line_pointer = hold; | |
1665 | str = hold; | |
1666 | goto error; | |
1667 | } | |
1668 | else | |
1669 | { | |
1670 | expression (&ex); | |
1671 | } | |
1672 | ||
87271fa6 | 1673 | switch (ex.X_op) |
252b5132 RH |
1674 | { |
1675 | case O_illegal: | |
1676 | errmsg = _("illegal operand"); | |
1677 | goto error; | |
1678 | case O_absent: | |
1679 | errmsg = _("missing operand"); | |
1680 | goto error; | |
1681 | case O_register: | |
1682 | { | |
1683 | int mask; | |
1684 | ||
1685 | mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; | |
0a727238 AO |
1686 | if (HAVE_AM33) |
1687 | mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG; | |
e7b71525 AO |
1688 | if (HAVE_AM33_2) |
1689 | mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG; | |
252b5132 RH |
1690 | if ((operand->flags & mask) == 0) |
1691 | { | |
1692 | input_line_pointer = hold; | |
1693 | str = hold; | |
1694 | goto error; | |
1695 | } | |
87271fa6 | 1696 | |
252b5132 RH |
1697 | if (opcode->format == FMT_D1 || opcode->format == FMT_S1) |
1698 | extra_shift = 8; | |
1699 | else if (opcode->format == FMT_D2 | |
1700 | || opcode->format == FMT_D4 | |
1701 | || opcode->format == FMT_S2 | |
1702 | || opcode->format == FMT_S4 | |
1703 | || opcode->format == FMT_S6 | |
1704 | || opcode->format == FMT_D5) | |
1705 | extra_shift = 16; | |
85cb2cf9 JL |
1706 | else if (opcode->format == FMT_D7) |
1707 | extra_shift = 8; | |
1708 | else if (opcode->format == FMT_D8 || opcode->format == FMT_D9) | |
1709 | extra_shift = 8; | |
252b5132 RH |
1710 | else |
1711 | extra_shift = 0; | |
87271fa6 | 1712 | |
603b7257 NC |
1713 | mn10300_insert_operand (& insn, & extension, operand, |
1714 | ex.X_add_number, NULL, | |
252b5132 RH |
1715 | 0, extra_shift); |
1716 | ||
252b5132 RH |
1717 | /* And note the register number in the register array. */ |
1718 | mn10300_reg_operands[op_idx - 1] = ex.X_add_number; | |
1719 | break; | |
1720 | } | |
1721 | ||
1722 | case O_constant: | |
1723 | /* If this operand can be promoted, and it doesn't | |
1724 | fit into the allocated bitfield for this insn, | |
1725 | then promote it (ie this opcode does not match). */ | |
1726 | if (operand->flags | |
1727 | & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) | |
603b7257 | 1728 | && !check_operand (operand, ex.X_add_number)) |
252b5132 RH |
1729 | { |
1730 | input_line_pointer = hold; | |
1731 | str = hold; | |
1732 | goto error; | |
1733 | } | |
1734 | ||
603b7257 NC |
1735 | mn10300_insert_operand (& insn, & extension, operand, |
1736 | ex.X_add_number, NULL, 0, 0); | |
252b5132 RH |
1737 | break; |
1738 | ||
1739 | default: | |
1740 | /* If this operand can be promoted, then this opcode didn't | |
1741 | match since we can't know if it needed promotion! */ | |
1742 | if (operand->flags & MN10300_OPERAND_PROMOTE) | |
1743 | { | |
1744 | input_line_pointer = hold; | |
1745 | str = hold; | |
1746 | goto error; | |
1747 | } | |
1748 | ||
1749 | /* We need to generate a fixup for this expression. */ | |
1750 | if (fc >= MAX_INSN_FIXUPS) | |
1751 | as_fatal (_("too many fixups")); | |
1752 | fixups[fc].exp = ex; | |
1753 | fixups[fc].opindex = *opindex_ptr; | |
1754 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
bf6f0d0c AO |
1755 | if (mn10300_check_fixup (& fixups[fc])) |
1756 | goto error; | |
252b5132 RH |
1757 | ++fc; |
1758 | break; | |
1759 | } | |
1760 | ||
1761 | keep_going: | |
1762 | str = input_line_pointer; | |
1763 | input_line_pointer = hold; | |
1764 | ||
1765 | while (*str == ' ' || *str == ',') | |
1766 | ++str; | |
252b5132 RH |
1767 | } |
1768 | ||
1769 | /* Make sure we used all the operands! */ | |
1770 | if (*str != ',') | |
1771 | match = 1; | |
1772 | ||
1773 | /* If this instruction has registers that must not match, verify | |
1774 | that they do indeed not match. */ | |
1775 | if (opcode->no_match_operands) | |
1776 | { | |
252b5132 RH |
1777 | /* Look at each operand to see if it's marked. */ |
1778 | for (i = 0; i < MN10300_MAX_OPERANDS; i++) | |
1779 | { | |
1780 | if ((1 << i) & opcode->no_match_operands) | |
1781 | { | |
1782 | int j; | |
1783 | ||
1784 | /* operand I is marked. Check that it does not match any | |
1785 | operands > I which are marked. */ | |
1786 | for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) | |
1787 | { | |
1788 | if (((1 << j) & opcode->no_match_operands) | |
1789 | && mn10300_reg_operands[i] == mn10300_reg_operands[j]) | |
1790 | { | |
1791 | errmsg = _("Invalid register specification."); | |
1792 | match = 0; | |
1793 | goto error; | |
1794 | } | |
1795 | } | |
1796 | } | |
1797 | } | |
1798 | } | |
1799 | ||
1800 | error: | |
1801 | if (match == 0) | |
87271fa6 | 1802 | { |
252b5132 | 1803 | next_opcode = opcode + 1; |
87271fa6 | 1804 | if (!strcmp (next_opcode->name, opcode->name)) |
252b5132 RH |
1805 | { |
1806 | opcode = next_opcode; | |
1807 | continue; | |
1808 | } | |
87271fa6 | 1809 | |
252b5132 RH |
1810 | as_bad ("%s", errmsg); |
1811 | return; | |
87271fa6 | 1812 | } |
252b5132 RH |
1813 | break; |
1814 | } | |
87271fa6 | 1815 | |
3882b010 | 1816 | while (ISSPACE (*str)) |
252b5132 RH |
1817 | ++str; |
1818 | ||
1819 | if (*str != '\0') | |
1820 | as_bad (_("junk at end of line: `%s'"), str); | |
1821 | ||
1822 | input_line_pointer = str; | |
1823 | ||
1824 | /* Determine the size of the instruction. */ | |
1825 | if (opcode->format == FMT_S0) | |
1826 | size = 1; | |
1827 | ||
1828 | if (opcode->format == FMT_S1 || opcode->format == FMT_D0) | |
1829 | size = 2; | |
1830 | ||
1831 | if (opcode->format == FMT_S2 || opcode->format == FMT_D1) | |
1832 | size = 3; | |
1833 | ||
85cb2cf9 JL |
1834 | if (opcode->format == FMT_D6) |
1835 | size = 3; | |
1836 | ||
1837 | if (opcode->format == FMT_D7 || opcode->format == FMT_D10) | |
1838 | size = 4; | |
1839 | ||
1840 | if (opcode->format == FMT_D8) | |
1841 | size = 6; | |
1842 | ||
1843 | if (opcode->format == FMT_D9) | |
1844 | size = 7; | |
252b5132 RH |
1845 | |
1846 | if (opcode->format == FMT_S4) | |
1847 | size = 5; | |
1848 | ||
1849 | if (opcode->format == FMT_S6 || opcode->format == FMT_D5) | |
1850 | size = 7; | |
1851 | ||
1852 | if (opcode->format == FMT_D2) | |
1853 | size = 4; | |
1854 | ||
e7b71525 AO |
1855 | if (opcode->format == FMT_D3) |
1856 | size = 5; | |
1857 | ||
252b5132 RH |
1858 | if (opcode->format == FMT_D4) |
1859 | size = 6; | |
1860 | ||
1861 | if (relaxable && fc > 0) | |
1862 | { | |
8ad7c533 NC |
1863 | /* On a 64-bit host the size of an 'int' is not the same |
1864 | as the size of a pointer, so we need a union to convert | |
1865 | the opindex field of the fr_cgen structure into a char * | |
1866 | so that it can be stored in the frag. We do not have | |
1867 | to worry about loosing accuracy as we are not going to | |
1868 | be even close to the 32bit limit of the int. */ | |
1869 | union | |
1870 | { | |
1871 | int opindex; | |
1872 | char * ptr; | |
1873 | } | |
1874 | opindex_converter; | |
252b5132 RH |
1875 | int type; |
1876 | ||
076dc439 AO |
1877 | /* We want to anchor the line info to the previous frag (if |
1878 | there isn't one, create it), so that, when the insn is | |
1879 | resized, we still get the right address for the beginning of | |
1880 | the region. */ | |
1881 | f = frag_more (0); | |
1882 | dwarf2_emit_insn (0); | |
1883 | ||
87271fa6 | 1884 | /* bCC */ |
252b5132 RH |
1885 | if (size == 2) |
1886 | { | |
1887 | /* Handle bra specially. Basically treat it like jmp so | |
1888 | that we automatically handle 8, 16 and 32 bit offsets | |
1889 | correctly as well as jumps to an undefined address. | |
1890 | ||
1891 | It is also important to not treat it like other bCC | |
1892 | instructions since the long forms of bra is different | |
1893 | from other bCC instructions. */ | |
1894 | if (opcode->opcode == 0xca00) | |
1895 | type = 10; | |
1896 | else | |
1897 | type = 0; | |
1898 | } | |
87271fa6 | 1899 | /* call */ |
252b5132 | 1900 | else if (size == 5) |
87271fa6 NC |
1901 | type = 6; |
1902 | /* calls */ | |
252b5132 RH |
1903 | else if (size == 4) |
1904 | type = 8; | |
87271fa6 | 1905 | /* jmp */ |
252b5132 RH |
1906 | else if (size == 3 && opcode->opcode == 0xcc0000) |
1907 | type = 10; | |
e7b71525 AO |
1908 | else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000) |
1909 | type = 13; | |
87271fa6 | 1910 | /* bCC (uncommon cases) */ |
252b5132 RH |
1911 | else |
1912 | type = 3; | |
1913 | ||
8ad7c533 | 1914 | opindex_converter.opindex = fixups[0].opindex; |
252b5132 RH |
1915 | f = frag_var (rs_machine_dependent, 8, 8 - size, type, |
1916 | fixups[0].exp.X_add_symbol, | |
1917 | fixups[0].exp.X_add_number, | |
8ad7c533 | 1918 | opindex_converter.ptr); |
87271fa6 | 1919 | |
252b5132 RH |
1920 | /* This is pretty hokey. We basically just care about the |
1921 | opcode, so we have to write out the first word big endian. | |
1922 | ||
1923 | The exception is "call", which has two operands that we | |
1924 | care about. | |
1925 | ||
1926 | The first operand (the register list) happens to be in the | |
1927 | first instruction word, and will be in the right place if | |
1928 | we output the first word in big endian mode. | |
1929 | ||
1930 | The second operand (stack size) is in the extension word, | |
1931 | and we want it to appear as the first character in the extension | |
1932 | word (as it appears in memory). Luckily, writing the extension | |
1933 | word in big endian format will do what we want. */ | |
1934 | number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); | |
1935 | if (size > 8) | |
1936 | { | |
1937 | number_to_chars_bigendian (f + 4, extension, 4); | |
1938 | number_to_chars_bigendian (f + 8, 0, size - 8); | |
1939 | } | |
1940 | else if (size > 4) | |
1941 | number_to_chars_bigendian (f + 4, extension, size - 4); | |
1942 | } | |
1943 | else | |
1944 | { | |
1945 | /* Allocate space for the instruction. */ | |
1946 | f = frag_more (size); | |
1947 | ||
1948 | /* Fill in bytes for the instruction. Note that opcode fields | |
1949 | are written big-endian, 16 & 32bit immediates are written | |
1950 | little endian. Egad. */ | |
1951 | if (opcode->format == FMT_S0 | |
1952 | || opcode->format == FMT_S1 | |
1953 | || opcode->format == FMT_D0 | |
85cb2cf9 JL |
1954 | || opcode->format == FMT_D6 |
1955 | || opcode->format == FMT_D7 | |
1956 | || opcode->format == FMT_D10 | |
252b5132 RH |
1957 | || opcode->format == FMT_D1) |
1958 | { | |
1959 | number_to_chars_bigendian (f, insn, size); | |
1960 | } | |
1961 | else if (opcode->format == FMT_S2 | |
1962 | && opcode->opcode != 0xdf0000 | |
1963 | && opcode->opcode != 0xde0000) | |
1964 | { | |
1965 | /* A format S2 instruction that is _not_ "ret" and "retf". */ | |
1966 | number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); | |
1967 | number_to_chars_littleendian (f + 1, insn & 0xffff, 2); | |
1968 | } | |
1969 | else if (opcode->format == FMT_S2) | |
1970 | { | |
1971 | /* This must be a ret or retf, which is written entirely in | |
1972 | big-endian format. */ | |
1973 | number_to_chars_bigendian (f, insn, 3); | |
1974 | } | |
1975 | else if (opcode->format == FMT_S4 | |
1976 | && opcode->opcode != 0xdc000000) | |
1977 | { | |
1978 | /* This must be a format S4 "call" instruction. What a pain. */ | |
1979 | unsigned long temp = (insn >> 8) & 0xffff; | |
1980 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1981 | number_to_chars_littleendian (f + 1, temp, 2); | |
1982 | number_to_chars_bigendian (f + 3, insn & 0xff, 1); | |
1983 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
1984 | } | |
1985 | else if (opcode->format == FMT_S4) | |
1986 | { | |
1987 | /* This must be a format S4 "jmp" instruction. */ | |
1988 | unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); | |
1989 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1990 | number_to_chars_littleendian (f + 1, temp, 4); | |
1991 | } | |
1992 | else if (opcode->format == FMT_S6) | |
1993 | { | |
1994 | unsigned long temp = ((insn & 0xffffff) << 8) | |
1995 | | ((extension >> 16) & 0xff); | |
1996 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1997 | number_to_chars_littleendian (f + 1, temp, 4); | |
1998 | number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); | |
1999 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
2000 | } | |
2001 | else if (opcode->format == FMT_D2 | |
2002 | && opcode->opcode != 0xfaf80000 | |
2003 | && opcode->opcode != 0xfaf00000 | |
2004 | && opcode->opcode != 0xfaf40000) | |
2005 | { | |
2006 | /* A format D2 instruction where the 16bit immediate is | |
2007 | really a single 16bit value, not two 8bit values. */ | |
2008 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
2009 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
2010 | } | |
2011 | else if (opcode->format == FMT_D2) | |
2012 | { | |
2013 | /* A format D2 instruction where the 16bit immediate | |
2014 | is really two 8bit immediates. */ | |
2015 | number_to_chars_bigendian (f, insn, 4); | |
2016 | } | |
e7b71525 AO |
2017 | else if (opcode->format == FMT_D3) |
2018 | { | |
2019 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
2020 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
2021 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
2022 | } | |
252b5132 RH |
2023 | else if (opcode->format == FMT_D4) |
2024 | { | |
2025 | unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); | |
87271fa6 | 2026 | |
252b5132 RH |
2027 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
2028 | number_to_chars_littleendian (f + 2, temp, 4); | |
2029 | } | |
2030 | else if (opcode->format == FMT_D5) | |
2031 | { | |
87271fa6 NC |
2032 | unsigned long temp = (((insn & 0xffff) << 16) |
2033 | | ((extension >> 8) & 0xffff)); | |
2034 | ||
252b5132 RH |
2035 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
2036 | number_to_chars_littleendian (f + 2, temp, 4); | |
2037 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
2038 | } | |
85cb2cf9 JL |
2039 | else if (opcode->format == FMT_D8) |
2040 | { | |
87271fa6 NC |
2041 | unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff); |
2042 | ||
2043 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
2044 | number_to_chars_bigendian (f + 3, (temp & 0xff), 1); | |
2045 | number_to_chars_littleendian (f + 4, temp >> 8, 2); | |
85cb2cf9 JL |
2046 | } |
2047 | else if (opcode->format == FMT_D9) | |
2048 | { | |
87271fa6 NC |
2049 | unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff); |
2050 | ||
2051 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
2052 | number_to_chars_littleendian (f + 3, temp, 4); | |
85cb2cf9 | 2053 | } |
252b5132 RH |
2054 | |
2055 | /* Create any fixups. */ | |
2056 | for (i = 0; i < fc; i++) | |
2057 | { | |
2058 | const struct mn10300_operand *operand; | |
91d6fa6a | 2059 | int reloc_size; |
252b5132 RH |
2060 | |
2061 | operand = &mn10300_operands[fixups[i].opindex]; | |
bf6f0d0c AO |
2062 | if (fixups[i].reloc != BFD_RELOC_UNUSED |
2063 | && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL | |
2064 | && fixups[i].reloc != BFD_RELOC_32_GOTOFF | |
2065 | && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL | |
2066 | && fixups[i].reloc != BFD_RELOC_MN10300_GOT32) | |
252b5132 RH |
2067 | { |
2068 | reloc_howto_type *reloc_howto; | |
252b5132 | 2069 | int offset; |
252b5132 | 2070 | |
87271fa6 NC |
2071 | reloc_howto = bfd_reloc_type_lookup (stdoutput, |
2072 | fixups[i].reloc); | |
252b5132 RH |
2073 | |
2074 | if (!reloc_howto) | |
87271fa6 NC |
2075 | abort (); |
2076 | ||
91d6fa6a | 2077 | reloc_size = bfd_get_reloc_size (reloc_howto); |
252b5132 | 2078 | |
91d6fa6a | 2079 | if (reloc_size < 1 || reloc_size > 4) |
87271fa6 | 2080 | abort (); |
252b5132 RH |
2081 | |
2082 | offset = 4 - size; | |
87975d2a AM |
2083 | fix_new_exp (frag_now, f - frag_now->fr_literal + offset, |
2084 | reloc_size, &fixups[i].exp, | |
2085 | reloc_howto->pc_relative, | |
2086 | fixups[i].reloc); | |
252b5132 RH |
2087 | } |
2088 | else | |
2089 | { | |
91d6fa6a | 2090 | int reloc, pcrel, offset; |
252b5132 RH |
2091 | fixS *fixP; |
2092 | ||
2093 | reloc = BFD_RELOC_NONE; | |
bf6f0d0c AO |
2094 | if (fixups[i].reloc != BFD_RELOC_UNUSED) |
2095 | reloc = fixups[i].reloc; | |
252b5132 RH |
2096 | /* How big is the reloc? Remember SPLIT relocs are |
2097 | implicitly 32bits. */ | |
2098 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
2099 | reloc_size = 32; | |
85cb2cf9 JL |
2100 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) |
2101 | reloc_size = 24; | |
252b5132 RH |
2102 | else |
2103 | reloc_size = operand->bits; | |
2104 | ||
2105 | /* Is the reloc pc-relative? */ | |
2106 | pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; | |
bf6f0d0c AO |
2107 | if (reloc != BFD_RELOC_NONE) |
2108 | pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative; | |
252b5132 | 2109 | |
a7c92dae | 2110 | offset = size - (reloc_size + operand->shift) / 8; |
eb0dfd58 | 2111 | |
252b5132 | 2112 | /* Choose a proper BFD relocation type. */ |
bf6f0d0c AO |
2113 | if (reloc != BFD_RELOC_NONE) |
2114 | ; | |
2115 | else if (pcrel) | |
252b5132 RH |
2116 | { |
2117 | if (reloc_size == 32) | |
2118 | reloc = BFD_RELOC_32_PCREL; | |
2119 | else if (reloc_size == 16) | |
2120 | reloc = BFD_RELOC_16_PCREL; | |
2121 | else if (reloc_size == 8) | |
2122 | reloc = BFD_RELOC_8_PCREL; | |
2123 | else | |
2124 | abort (); | |
2125 | } | |
2126 | else | |
2127 | { | |
2128 | if (reloc_size == 32) | |
2129 | reloc = BFD_RELOC_32; | |
2130 | else if (reloc_size == 16) | |
2131 | reloc = BFD_RELOC_16; | |
2132 | else if (reloc_size == 8) | |
2133 | reloc = BFD_RELOC_8; | |
2134 | else | |
2135 | abort (); | |
2136 | } | |
2137 | ||
252b5132 | 2138 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, |
acb02403 | 2139 | reloc_size / 8, &fixups[i].exp, pcrel, |
252b5132 RH |
2140 | ((bfd_reloc_code_real_type) reloc)); |
2141 | ||
2142 | if (pcrel) | |
2143 | fixP->fx_offset += offset; | |
2144 | } | |
2145 | } | |
e8b1cae5 | 2146 | |
076dc439 AO |
2147 | dwarf2_emit_insn (size); |
2148 | } | |
bfff1642 NC |
2149 | |
2150 | /* Label this frag as one that contains instructions. */ | |
2151 | frag_now->tc_frag_data = TRUE; | |
252b5132 RH |
2152 | } |
2153 | ||
87271fa6 NC |
2154 | /* If while processing a fixup, a reloc really needs to be created |
2155 | then it is done here. */ | |
252b5132 | 2156 | |
bfff1642 | 2157 | arelent ** |
603b7257 | 2158 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 | 2159 | { |
bfff1642 NC |
2160 | static arelent * no_relocs = NULL; |
2161 | static arelent * relocs[MAX_RELOC_EXPANSION + 1]; | |
252b5132 | 2162 | arelent *reloc; |
bfff1642 | 2163 | |
603b7257 | 2164 | reloc = xmalloc (sizeof (arelent)); |
252b5132 RH |
2165 | |
2166 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
603b7257 | 2167 | if (reloc->howto == NULL) |
252b5132 RH |
2168 | { |
2169 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
87271fa6 NC |
2170 | _("reloc %d not supported by object file format"), |
2171 | (int) fixp->fx_r_type); | |
bfff1642 NC |
2172 | free (reloc); |
2173 | return & no_relocs; | |
252b5132 | 2174 | } |
bfff1642 | 2175 | |
252b5132 | 2176 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
bfff1642 NC |
2177 | relocs[0] = reloc; |
2178 | relocs[1] = NULL; | |
252b5132 | 2179 | |
bf6f0d0c AO |
2180 | if (fixp->fx_subsy |
2181 | && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) | |
2182 | { | |
2183 | fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy); | |
603b7257 | 2184 | fixp->fx_subsy = NULL; |
bf6f0d0c AO |
2185 | } |
2186 | ||
252b5132 RH |
2187 | if (fixp->fx_addsy && fixp->fx_subsy) |
2188 | { | |
569006e5 NC |
2189 | asection *asec, *ssec; |
2190 | ||
2191 | asec = S_GET_SEGMENT (fixp->fx_addsy); | |
2192 | ssec = S_GET_SEGMENT (fixp->fx_subsy); | |
2193 | ||
bfff1642 NC |
2194 | /* If we have a difference between two (non-absolute) symbols we must |
2195 | generate two relocs (one for each symbol) and allow the linker to | |
2196 | resolve them - relaxation may change the distances between symbols, | |
569006e5 NC |
2197 | even local symbols defined in the same section. */ |
2198 | if (ssec != absolute_section || asec != absolute_section) | |
4e75439a | 2199 | { |
bfff1642 | 2200 | arelent * reloc2 = xmalloc (sizeof * reloc); |
4e75439a | 2201 | |
bfff1642 NC |
2202 | relocs[0] = reloc2; |
2203 | relocs[1] = reloc; | |
5d6255fe | 2204 | |
bfff1642 NC |
2205 | reloc2->address = reloc->address; |
2206 | reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF); | |
2207 | reloc2->addend = - S_GET_VALUE (fixp->fx_subsy); | |
2208 | reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
2209 | *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); | |
4e75439a | 2210 | |
bfff1642 | 2211 | reloc->addend = fixp->fx_offset; |
569006e5 | 2212 | if (asec == absolute_section) |
57b3551e AM |
2213 | { |
2214 | reloc->addend += S_GET_VALUE (fixp->fx_addsy); | |
2215 | reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; | |
2216 | } | |
2217 | else | |
2218 | { | |
2219 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
2220 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
2221 | } | |
4e75439a | 2222 | |
bfff1642 NC |
2223 | fixp->fx_pcrel = 0; |
2224 | fixp->fx_done = 1; | |
2225 | return relocs; | |
4e75439a | 2226 | } |
6e22e505 AO |
2227 | else |
2228 | { | |
2229 | char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal; | |
2230 | ||
2231 | reloc->addend = (S_GET_VALUE (fixp->fx_addsy) | |
2232 | - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); | |
2233 | ||
2234 | switch (fixp->fx_r_type) | |
2235 | { | |
2236 | case BFD_RELOC_8: | |
2237 | md_number_to_chars (fixpos, reloc->addend, 1); | |
2238 | break; | |
5d6255fe | 2239 | |
6e22e505 AO |
2240 | case BFD_RELOC_16: |
2241 | md_number_to_chars (fixpos, reloc->addend, 2); | |
2242 | break; | |
252b5132 | 2243 | |
6e22e505 AO |
2244 | case BFD_RELOC_24: |
2245 | md_number_to_chars (fixpos, reloc->addend, 3); | |
2246 | break; | |
2247 | ||
2248 | case BFD_RELOC_32: | |
2249 | md_number_to_chars (fixpos, reloc->addend, 4); | |
2250 | break; | |
2251 | ||
2252 | default: | |
f592407e AM |
2253 | reloc->sym_ptr_ptr |
2254 | = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr; | |
bfff1642 | 2255 | return relocs; |
6e22e505 | 2256 | } |
6e22e505 | 2257 | |
569006e5 NC |
2258 | free (reloc); |
2259 | return & no_relocs; | |
2260 | } | |
252b5132 | 2261 | } |
87271fa6 | 2262 | else |
252b5132 | 2263 | { |
603b7257 | 2264 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
310b5aa2 | 2265 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
2266 | reloc->addend = fixp->fx_offset; |
2267 | } | |
bfff1642 | 2268 | return relocs; |
252b5132 RH |
2269 | } |
2270 | ||
ca75ed2d NC |
2271 | /* Returns true iff the symbol attached to the frag is at a known location |
2272 | in the given section, (and hence the relocation to it can be relaxed by | |
2273 | the assembler). */ | |
2274 | static inline bfd_boolean | |
2275 | has_known_symbol_location (fragS * fragp, asection * sec) | |
2276 | { | |
2277 | symbolS * sym = fragp->fr_symbol; | |
2278 | ||
2279 | return sym != NULL | |
2280 | && S_IS_DEFINED (sym) | |
2281 | && ! S_IS_WEAK (sym) | |
2282 | && S_GET_SEGMENT (sym) == sec; | |
2283 | } | |
2284 | ||
252b5132 | 2285 | int |
603b7257 | 2286 | md_estimate_size_before_relax (fragS *fragp, asection *seg) |
252b5132 | 2287 | { |
93c2a809 | 2288 | if (fragp->fr_subtype == 6 |
ca75ed2d | 2289 | && ! has_known_symbol_location (fragp, seg)) |
93c2a809 AM |
2290 | fragp->fr_subtype = 7; |
2291 | else if (fragp->fr_subtype == 8 | |
ca75ed2d | 2292 | && ! has_known_symbol_location (fragp, seg)) |
93c2a809 AM |
2293 | fragp->fr_subtype = 9; |
2294 | else if (fragp->fr_subtype == 10 | |
ca75ed2d | 2295 | && ! has_known_symbol_location (fragp, seg)) |
93c2a809 AM |
2296 | fragp->fr_subtype = 12; |
2297 | ||
e7b71525 AO |
2298 | if (fragp->fr_subtype == 13) |
2299 | return 3; | |
ca75ed2d | 2300 | |
93c2a809 AM |
2301 | if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) |
2302 | abort (); | |
2303 | ||
2304 | return md_relax_table[fragp->fr_subtype].rlx_length; | |
87271fa6 | 2305 | } |
252b5132 RH |
2306 | |
2307 | long | |
603b7257 | 2308 | md_pcrel_from (fixS *fixp) |
252b5132 | 2309 | { |
ca75ed2d NC |
2310 | if (fixp->fx_addsy != (symbolS *) NULL |
2311 | && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))) | |
2312 | /* The symbol is undefined or weak. Let the linker figure it out. */ | |
2313 | return 0; | |
2314 | ||
252b5132 | 2315 | return fixp->fx_frag->fr_address + fixp->fx_where; |
252b5132 RH |
2316 | } |
2317 | ||
94f592af | 2318 | void |
603b7257 | 2319 | md_apply_fix (fixS * fixP, valueT * valP, segT seg) |
252b5132 | 2320 | { |
94f592af | 2321 | char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal; |
58a77e41 | 2322 | int size = 0; |
94f592af | 2323 | int value = (int) * valP; |
58a77e41 | 2324 | |
9c2799c2 | 2325 | gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED); |
58a77e41 EC |
2326 | |
2327 | /* This should never happen. */ | |
2328 | if (seg->flags & SEC_ALLOC) | |
94f592af | 2329 | abort (); |
58a77e41 | 2330 | |
c51ce5f0 | 2331 | /* The value we are passed in *valuep includes the symbol values. |
7be1c489 AM |
2332 | If we are doing this relocation the code in write.c is going to |
2333 | call bfd_install_relocation, which is also going to use the symbol | |
2334 | value. That means that if the reloc is fully resolved we want to | |
2335 | use *valuep since bfd_install_relocation is not being used. | |
c51ce5f0 EC |
2336 | |
2337 | However, if the reloc is not fully resolved we do not want to use | |
2338 | *valuep, and must use fx_offset instead. However, if the reloc | |
2339 | is PC relative, we do want to use *valuep since it includes the | |
2340 | result of md_pcrel_from. */ | |
603b7257 | 2341 | if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel) |
94f592af | 2342 | value = fixP->fx_offset; |
c51ce5f0 | 2343 | |
58a77e41 EC |
2344 | /* If the fix is relative to a symbol which is not defined, or not |
2345 | in the same segment as the fix, we cannot resolve it here. */ | |
94f592af NC |
2346 | if (fixP->fx_addsy != NULL |
2347 | && (! S_IS_DEFINED (fixP->fx_addsy) | |
2348 | || (S_GET_SEGMENT (fixP->fx_addsy) != seg))) | |
58a77e41 | 2349 | { |
94f592af NC |
2350 | fixP->fx_done = 0; |
2351 | return; | |
58a77e41 EC |
2352 | } |
2353 | ||
94f592af | 2354 | switch (fixP->fx_r_type) |
58a77e41 EC |
2355 | { |
2356 | case BFD_RELOC_8: | |
96f37af6 | 2357 | case BFD_RELOC_8_PCREL: |
58a77e41 EC |
2358 | size = 1; |
2359 | break; | |
2360 | ||
2361 | case BFD_RELOC_16: | |
96f37af6 | 2362 | case BFD_RELOC_16_PCREL: |
58a77e41 EC |
2363 | size = 2; |
2364 | break; | |
2365 | ||
2366 | case BFD_RELOC_32: | |
96f37af6 | 2367 | case BFD_RELOC_32_PCREL: |
58a77e41 EC |
2368 | size = 4; |
2369 | break; | |
2370 | ||
2371 | case BFD_RELOC_VTABLE_INHERIT: | |
2372 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af NC |
2373 | fixP->fx_done = 0; |
2374 | return; | |
58a77e41 | 2375 | |
569006e5 NC |
2376 | case BFD_RELOC_MN10300_ALIGN: |
2377 | fixP->fx_done = 1; | |
2378 | return; | |
2379 | ||
58a77e41 EC |
2380 | case BFD_RELOC_NONE: |
2381 | default: | |
94f592af NC |
2382 | as_bad_where (fixP->fx_file, fixP->fx_line, |
2383 | _("Bad relocation fixup type (%d)"), fixP->fx_r_type); | |
58a77e41 EC |
2384 | } |
2385 | ||
c51ce5f0 | 2386 | md_number_to_chars (fixpos, value, size); |
58a77e41 | 2387 | |
b653e7f9 | 2388 | /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */ |
94f592af NC |
2389 | if (fixP->fx_addsy == NULL) |
2390 | fixP->fx_done = 1; | |
58a77e41 EC |
2391 | } |
2392 | ||
58a77e41 EC |
2393 | /* Return zero if the fixup in fixp should be left alone and not |
2394 | adjusted. */ | |
2395 | ||
b34976b6 | 2396 | bfd_boolean |
603b7257 | 2397 | mn10300_fix_adjustable (struct fix *fixp) |
58a77e41 | 2398 | { |
bfff1642 NC |
2399 | if (fixp->fx_pcrel) |
2400 | { | |
2401 | if (TC_FORCE_RELOCATION_LOCAL (fixp)) | |
2402 | return FALSE; | |
2403 | } | |
2404 | /* Non-relative relocs can (and must) be adjusted if they do | |
2405 | not meet the criteria below, or the generic criteria. */ | |
2406 | else if (TC_FORCE_RELOCATION (fixp)) | |
603b7257 | 2407 | return FALSE; |
58a77e41 | 2408 | |
7e8f4100 AO |
2409 | /* Do not adjust relocations involving symbols in code sections, |
2410 | because it breaks linker relaxations. This could be fixed in the | |
2411 | linker, but this fix is simpler, and it pretty much only affects | |
2412 | object size a little bit. */ | |
2413 | if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) | |
603b7257 | 2414 | return FALSE; |
7e8f4100 | 2415 | |
53cb0362 DD |
2416 | /* Likewise, do not adjust symbols that won't be merged, or debug |
2417 | symbols, because they too break relaxation. We do want to adjust | |
2418 | other mergable symbols, like .rodata, because code relaxations | |
2419 | need section-relative symbols to properly relax them. */ | |
bfff1642 | 2420 | if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)) |
603b7257 | 2421 | return FALSE; |
bfff1642 | 2422 | |
53cb0362 | 2423 | if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0) |
603b7257 | 2424 | return FALSE; |
252b5132 | 2425 | |
603b7257 | 2426 | return TRUE; |
252b5132 RH |
2427 | } |
2428 | ||
2429 | static void | |
603b7257 | 2430 | set_arch_mach (int mach) |
252b5132 RH |
2431 | { |
2432 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) | |
2433 | as_warn (_("could not set architecture and machine")); | |
2434 | ||
2435 | current_machine = mach; | |
2436 | } | |
bf6f0d0c | 2437 | |
bf6f0d0c | 2438 | static inline char * |
603b7257 | 2439 | mn10300_end_of_match (char *cont, char *what) |
bf6f0d0c AO |
2440 | { |
2441 | int len = strlen (what); | |
2442 | ||
2443 | if (strncmp (cont, what, strlen (what)) == 0 | |
2444 | && ! is_part_of_name (cont[len])) | |
2445 | return cont + len; | |
2446 | ||
2447 | return NULL; | |
2448 | } | |
2449 | ||
2450 | int | |
603b7257 NC |
2451 | mn10300_parse_name (char const *name, |
2452 | expressionS *exprP, | |
2453 | enum expr_mode mode, | |
2454 | char *nextcharP) | |
bf6f0d0c AO |
2455 | { |
2456 | char *next = input_line_pointer; | |
2457 | char *next_end; | |
2458 | int reloc_type; | |
2459 | segT segment; | |
2460 | ||
2461 | exprP->X_op_symbol = NULL; | |
2462 | ||
2463 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
2464 | { | |
2465 | if (! GOT_symbol) | |
2466 | GOT_symbol = symbol_find_or_make (name); | |
2467 | ||
2468 | exprP->X_add_symbol = GOT_symbol; | |
2469 | no_suffix: | |
2470 | /* If we have an absolute symbol or a reg, | |
2471 | then we know its value now. */ | |
2472 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
9497f5ac | 2473 | if (mode != expr_defer && segment == absolute_section) |
bf6f0d0c AO |
2474 | { |
2475 | exprP->X_op = O_constant; | |
2476 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
2477 | exprP->X_add_symbol = NULL; | |
2478 | } | |
9497f5ac | 2479 | else if (mode != expr_defer && segment == reg_section) |
bf6f0d0c AO |
2480 | { |
2481 | exprP->X_op = O_register; | |
2482 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
2483 | exprP->X_add_symbol = NULL; | |
2484 | } | |
2485 | else | |
2486 | { | |
2487 | exprP->X_op = O_symbol; | |
2488 | exprP->X_add_number = 0; | |
2489 | } | |
2490 | ||
2491 | return 1; | |
2492 | } | |
2493 | ||
2494 | exprP->X_add_symbol = symbol_find_or_make (name); | |
2495 | ||
2496 | if (*nextcharP != '@') | |
2497 | goto no_suffix; | |
2498 | else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF"))) | |
2499 | reloc_type = BFD_RELOC_32_GOTOFF; | |
2500 | else if ((next_end = mn10300_end_of_match (next + 1, "GOT"))) | |
2501 | reloc_type = BFD_RELOC_MN10300_GOT32; | |
2502 | else if ((next_end = mn10300_end_of_match (next + 1, "PLT"))) | |
2503 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
2504 | else | |
2505 | goto no_suffix; | |
2506 | ||
2507 | *input_line_pointer = *nextcharP; | |
2508 | input_line_pointer = next_end; | |
2509 | *nextcharP = *input_line_pointer; | |
2510 | *input_line_pointer = '\0'; | |
2511 | ||
2512 | exprP->X_op = O_PIC_reloc; | |
2513 | exprP->X_add_number = 0; | |
2514 | exprP->X_md = reloc_type; | |
2515 | ||
2516 | return 1; | |
2517 | } | |
603b7257 NC |
2518 | |
2519 | /* The target specific pseudo-ops which we support. */ | |
2520 | const pseudo_typeS md_pseudo_table[] = | |
2521 | { | |
2522 | { "am30", set_arch_mach, AM30 }, | |
2523 | { "am33", set_arch_mach, AM33 }, | |
2524 | { "am33_2", set_arch_mach, AM33_2 }, | |
2525 | { "mn10300", set_arch_mach, MN103 }, | |
2526 | {NULL, 0, 0} | |
2527 | }; | |
bfff1642 NC |
2528 | |
2529 | /* Returns FALSE if there is some mn10300 specific reason why the | |
2530 | subtraction of two same-section symbols cannot be computed by | |
2531 | the assembler. */ | |
2532 | ||
2533 | bfd_boolean | |
2534 | mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section) | |
2535 | { | |
2536 | bfd_boolean result; | |
2537 | fragS * left_frag; | |
2538 | fragS * right_frag; | |
2539 | fragS * frag; | |
2540 | ||
2541 | /* If we are not performing linker relaxation then we have nothing | |
2542 | to worry about. */ | |
2543 | if (linkrelax == 0) | |
2544 | return TRUE; | |
2545 | ||
2546 | /* If the symbols are not in a code section then they are OK. */ | |
2547 | if ((section->flags & SEC_CODE) == 0) | |
2548 | return TRUE; | |
2549 | ||
2550 | /* Otherwise we have to scan the fragments between the two symbols. | |
2551 | If any instructions are found then we have to assume that linker | |
2552 | relaxation may change their size and so we must delay resolving | |
2553 | the subtraction until the final link. */ | |
2554 | left_frag = symbol_get_frag (left->X_add_symbol); | |
2555 | right_frag = symbol_get_frag (right->X_add_symbol); | |
2556 | ||
2557 | if (left_frag == right_frag) | |
2558 | return ! left_frag->tc_frag_data; | |
2559 | ||
2560 | result = TRUE; | |
2561 | for (frag = left_frag; frag != NULL; frag = frag->fr_next) | |
2562 | { | |
2563 | if (frag->tc_frag_data) | |
2564 | result = FALSE; | |
2565 | if (frag == right_frag) | |
2566 | break; | |
2567 | } | |
2568 | ||
2569 | if (frag == NULL) | |
2570 | for (frag = right_frag; frag != NULL; frag = frag->fr_next) | |
2571 | { | |
2572 | if (frag->tc_frag_data) | |
2573 | result = FALSE; | |
2574 | if (frag == left_frag) | |
2575 | break; | |
2576 | } | |
2577 | ||
2578 | if (frag == NULL) | |
2579 | /* The two symbols are on disjoint fragment chains | |
2580 | - we cannot possibly compute their difference. */ | |
2581 | return FALSE; | |
2582 | ||
2583 | return result; | |
2584 | } | |
569006e5 NC |
2585 | |
2586 | /* When relaxing, we need to output a reloc for any .align directive | |
2587 | that requests alignment to a two byte boundary or larger. */ | |
2588 | ||
2589 | void | |
2590 | mn10300_handle_align (fragS *frag) | |
2591 | { | |
b5f5fd96 NC |
2592 | if (linkrelax |
2593 | && (frag->fr_type == rs_align | |
2594 | || frag->fr_type == rs_align_code) | |
569006e5 NC |
2595 | && frag->fr_address + frag->fr_fix > 0 |
2596 | && frag->fr_offset > 1 | |
2597 | && now_seg != bss_section | |
2598 | /* Do not create relocs for the merging sections - such | |
2599 | relocs will prevent the contents from being merged. */ | |
2600 | && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0) | |
2601 | /* Create a new fixup to record the alignment request. The symbol is | |
2602 | irrelevent but must be present so we use the absolute section symbol. | |
2603 | The offset from the symbol is used to record the power-of-two alignment | |
2604 | value. The size is set to 0 because the frag may already be aligned, | |
2605 | thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */ | |
2606 | fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE, | |
2607 | BFD_RELOC_MN10300_ALIGN); | |
2608 | } | |
b5f5fd96 NC |
2609 | |
2610 | bfd_boolean | |
2611 | mn10300_force_relocation (struct fix * fixp) | |
2612 | { | |
2613 | if (linkrelax | |
2614 | && (fixp->fx_pcrel | |
2615 | || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN)) | |
2616 | return TRUE; | |
2617 | ||
2618 | return generic_force_reloc (fixp); | |
2619 | } |