Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-mn10300.c -- Assembler code for the Matsushita 10300 |
8ad7c533 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
87975d2a | 3 | 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
10 | any later version. |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
19 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
20 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "as.h" |
3882b010 | 23 | #include "safe-ctype.h" |
87271fa6 | 24 | #include "subsegs.h" |
252b5132 | 25 | #include "opcode/mn10300.h" |
e8b1cae5 | 26 | #include "dwarf2dbg.h" |
603b7257 | 27 | #include "libiberty.h" |
252b5132 RH |
28 | \f |
29 | /* Structure to hold information about predefined registers. */ | |
30 | struct reg_name | |
31 | { | |
32 | const char *name; | |
33 | int value; | |
34 | }; | |
35 | ||
87271fa6 NC |
36 | /* Generic assembler global variables which must be defined by all |
37 | targets. */ | |
252b5132 | 38 | |
87271fa6 | 39 | /* Characters which always start a comment. */ |
252b5132 RH |
40 | const char comment_chars[] = "#"; |
41 | ||
42 | /* Characters which start a comment at the beginning of a line. */ | |
43 | const char line_comment_chars[] = ";#"; | |
44 | ||
87271fa6 | 45 | /* Characters which may be used to separate multiple commands on a |
252b5132 RH |
46 | single line. */ |
47 | const char line_separator_chars[] = ";"; | |
48 | ||
87271fa6 | 49 | /* Characters which are used to indicate an exponent in a floating |
252b5132 RH |
50 | point number. */ |
51 | const char EXP_CHARS[] = "eE"; | |
52 | ||
87271fa6 | 53 | /* Characters which mean that a number is a floating point constant, |
252b5132 RH |
54 | as in 0d1.0. */ |
55 | const char FLT_CHARS[] = "dD"; | |
56 | \f | |
dae1b34e NC |
57 | const relax_typeS md_relax_table[] = |
58 | { | |
59 | /* The plus values for the bCC and fBCC instructions in the table below | |
60 | are because the branch instruction is translated into a jump | |
61 | instruction that is now +2 or +3 bytes further on in memory, and the | |
62 | correct size of jump instruction must be selected. */ | |
603b7257 | 63 | /* bCC relaxing. */ |
252b5132 | 64 | {0x7f, -0x80, 2, 1}, |
dae1b34e | 65 | {0x7fff + 2, -0x8000 + 2, 5, 2}, |
252b5132 RH |
66 | {0x7fffffff, -0x80000000, 7, 0}, |
67 | ||
dae1b34e | 68 | /* bCC relaxing (uncommon cases for 3byte length instructions) */ |
252b5132 | 69 | {0x7f, -0x80, 3, 4}, |
dae1b34e | 70 | {0x7fff + 3, -0x8000 + 3, 6, 5}, |
252b5132 RH |
71 | {0x7fffffff, -0x80000000, 8, 0}, |
72 | ||
603b7257 | 73 | /* call relaxing. */ |
252b5132 RH |
74 | {0x7fff, -0x8000, 5, 7}, |
75 | {0x7fffffff, -0x80000000, 7, 0}, | |
76 | ||
603b7257 | 77 | /* calls relaxing. */ |
252b5132 RH |
78 | {0x7fff, -0x8000, 4, 9}, |
79 | {0x7fffffff, -0x80000000, 6, 0}, | |
80 | ||
603b7257 | 81 | /* jmp relaxing. */ |
252b5132 RH |
82 | {0x7f, -0x80, 2, 11}, |
83 | {0x7fff, -0x8000, 3, 12}, | |
84 | {0x7fffffff, -0x80000000, 5, 0}, | |
85 | ||
603b7257 | 86 | /* fbCC relaxing. */ |
e7b71525 | 87 | {0x7f, -0x80, 3, 14}, |
dae1b34e | 88 | {0x7fff + 3, -0x8000 + 3, 6, 15}, |
e7b71525 AO |
89 | {0x7fffffff, -0x80000000, 8, 0}, |
90 | ||
252b5132 RH |
91 | }; |
92 | ||
1485d400 EC |
93 | /* Set linkrelax here to avoid fixups in most sections. */ |
94 | int linkrelax = 1; | |
95 | ||
252b5132 RH |
96 | static int current_machine; |
97 | ||
87271fa6 | 98 | /* Fixups. */ |
603b7257 NC |
99 | #define MAX_INSN_FIXUPS 5 |
100 | ||
252b5132 RH |
101 | struct mn10300_fixup |
102 | { | |
103 | expressionS exp; | |
104 | int opindex; | |
105 | bfd_reloc_code_real_type reloc; | |
106 | }; | |
107 | struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; | |
108 | static int fc; | |
109 | ||
110 | /* We must store the value of each register operand so that we can | |
111 | verify that certain registers do not match. */ | |
112 | int mn10300_reg_operands[MN10300_MAX_OPERANDS]; | |
113 | \f | |
114 | const char *md_shortopts = ""; | |
252b5132 | 115 | |
603b7257 | 116 | struct option md_longopts[] = |
252b5132 | 117 | { |
603b7257 | 118 | {NULL, no_argument, NULL, 0} |
252b5132 RH |
119 | }; |
120 | ||
603b7257 NC |
121 | size_t md_longopts_size = sizeof (md_longopts); |
122 | ||
e7b71525 | 123 | #define HAVE_AM33_2 (current_machine == AM33_2) |
603b7257 NC |
124 | #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2) |
125 | #define HAVE_AM30 (current_machine == AM30) | |
0a727238 | 126 | |
252b5132 RH |
127 | /* Opcode hash table. */ |
128 | static struct hash_control *mn10300_hash; | |
129 | ||
87271fa6 | 130 | /* This table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
131 | static const struct reg_name data_registers[] = |
132 | { | |
133 | { "d0", 0 }, | |
134 | { "d1", 1 }, | |
135 | { "d2", 2 }, | |
136 | { "d3", 3 }, | |
137 | }; | |
252b5132 RH |
138 | |
139 | static const struct reg_name address_registers[] = | |
140 | { | |
141 | { "a0", 0 }, | |
142 | { "a1", 1 }, | |
143 | { "a2", 2 }, | |
144 | { "a3", 3 }, | |
145 | }; | |
87271fa6 | 146 | |
85cb2cf9 JL |
147 | static const struct reg_name r_registers[] = |
148 | { | |
149 | { "a0", 8 }, | |
150 | { "a1", 9 }, | |
151 | { "a2", 10 }, | |
152 | { "a3", 11 }, | |
153 | { "d0", 12 }, | |
154 | { "d1", 13 }, | |
155 | { "d2", 14 }, | |
156 | { "d3", 15 }, | |
157 | { "e0", 0 }, | |
158 | { "e1", 1 }, | |
159 | { "e10", 10 }, | |
160 | { "e11", 11 }, | |
161 | { "e12", 12 }, | |
162 | { "e13", 13 }, | |
163 | { "e14", 14 }, | |
164 | { "e15", 15 }, | |
165 | { "e2", 2 }, | |
166 | { "e3", 3 }, | |
167 | { "e4", 4 }, | |
168 | { "e5", 5 }, | |
169 | { "e6", 6 }, | |
170 | { "e7", 7 }, | |
171 | { "e8", 8 }, | |
172 | { "e9", 9 }, | |
173 | { "r0", 0 }, | |
174 | { "r1", 1 }, | |
175 | { "r10", 10 }, | |
176 | { "r11", 11 }, | |
177 | { "r12", 12 }, | |
178 | { "r13", 13 }, | |
179 | { "r14", 14 }, | |
180 | { "r15", 15 }, | |
181 | { "r2", 2 }, | |
182 | { "r3", 3 }, | |
183 | { "r4", 4 }, | |
184 | { "r5", 5 }, | |
185 | { "r6", 6 }, | |
186 | { "r7", 7 }, | |
187 | { "r8", 8 }, | |
188 | { "r9", 9 }, | |
189 | }; | |
87271fa6 | 190 | |
85cb2cf9 JL |
191 | static const struct reg_name xr_registers[] = |
192 | { | |
193 | { "mcrh", 2 }, | |
194 | { "mcrl", 3 }, | |
195 | { "mcvf", 4 }, | |
196 | { "mdrq", 1 }, | |
197 | { "sp", 0 }, | |
198 | { "xr0", 0 }, | |
199 | { "xr1", 1 }, | |
200 | { "xr10", 10 }, | |
201 | { "xr11", 11 }, | |
202 | { "xr12", 12 }, | |
203 | { "xr13", 13 }, | |
204 | { "xr14", 14 }, | |
205 | { "xr15", 15 }, | |
206 | { "xr2", 2 }, | |
207 | { "xr3", 3 }, | |
208 | { "xr4", 4 }, | |
209 | { "xr5", 5 }, | |
210 | { "xr6", 6 }, | |
211 | { "xr7", 7 }, | |
212 | { "xr8", 8 }, | |
213 | { "xr9", 9 }, | |
214 | }; | |
85cb2cf9 | 215 | |
e7b71525 AO |
216 | static const struct reg_name float_registers[] = |
217 | { | |
218 | { "fs0", 0 }, | |
219 | { "fs1", 1 }, | |
220 | { "fs10", 10 }, | |
221 | { "fs11", 11 }, | |
222 | { "fs12", 12 }, | |
223 | { "fs13", 13 }, | |
224 | { "fs14", 14 }, | |
225 | { "fs15", 15 }, | |
226 | { "fs16", 16 }, | |
227 | { "fs17", 17 }, | |
228 | { "fs18", 18 }, | |
229 | { "fs19", 19 }, | |
230 | { "fs2", 2 }, | |
231 | { "fs20", 20 }, | |
232 | { "fs21", 21 }, | |
233 | { "fs22", 22 }, | |
234 | { "fs23", 23 }, | |
235 | { "fs24", 24 }, | |
236 | { "fs25", 25 }, | |
237 | { "fs26", 26 }, | |
238 | { "fs27", 27 }, | |
239 | { "fs28", 28 }, | |
240 | { "fs29", 29 }, | |
241 | { "fs3", 3 }, | |
242 | { "fs30", 30 }, | |
243 | { "fs31", 31 }, | |
244 | { "fs4", 4 }, | |
245 | { "fs5", 5 }, | |
246 | { "fs6", 6 }, | |
247 | { "fs7", 7 }, | |
248 | { "fs8", 8 }, | |
249 | { "fs9", 9 }, | |
250 | }; | |
251 | ||
e7b71525 AO |
252 | static const struct reg_name double_registers[] = |
253 | { | |
254 | { "fd0", 0 }, | |
255 | { "fd10", 10 }, | |
256 | { "fd12", 12 }, | |
257 | { "fd14", 14 }, | |
258 | { "fd16", 16 }, | |
259 | { "fd18", 18 }, | |
260 | { "fd2", 2 }, | |
261 | { "fd20", 20 }, | |
262 | { "fd22", 22 }, | |
263 | { "fd24", 24 }, | |
264 | { "fd26", 26 }, | |
265 | { "fd28", 28 }, | |
266 | { "fd30", 30 }, | |
267 | { "fd4", 4 }, | |
268 | { "fd6", 6 }, | |
269 | { "fd8", 8 }, | |
270 | }; | |
271 | ||
603b7257 NC |
272 | /* We abuse the `value' field, that would be otherwise unused, to |
273 | encode the architecture on which (access to) the register was | |
274 | introduced. FIXME: we should probably warn when we encounter a | |
275 | register name when assembling for an architecture that doesn't | |
276 | support it, before parsing it as a symbol name. */ | |
277 | static const struct reg_name other_registers[] = | |
278 | { | |
279 | { "epsw", AM33 }, | |
280 | { "mdr", 0 }, | |
281 | { "pc", AM33 }, | |
282 | { "psw", 0 }, | |
283 | { "sp", 0 }, | |
0a22ae8e NC |
284 | { "ssp", 0 }, |
285 | { "usp", 0 }, | |
603b7257 | 286 | }; |
e7b71525 | 287 | |
603b7257 | 288 | #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers) |
e7b71525 | 289 | |
603b7257 NC |
290 | /* Perform a binary search of the given register table REGS to see |
291 | if NAME is a valid regiter name. Returns the register number from | |
292 | the array on success, or -1 on failure. */ | |
252b5132 RH |
293 | |
294 | static int | |
603b7257 NC |
295 | reg_name_search (const struct reg_name *regs, |
296 | int regcount, | |
297 | const char *name) | |
252b5132 | 298 | { |
603b7257 | 299 | int low, high; |
252b5132 RH |
300 | |
301 | low = 0; | |
302 | high = regcount - 1; | |
303 | ||
304 | do | |
305 | { | |
603b7257 NC |
306 | int cmp, middle; |
307 | ||
252b5132 RH |
308 | middle = (low + high) / 2; |
309 | cmp = strcasecmp (name, regs[middle].name); | |
310 | if (cmp < 0) | |
311 | high = middle - 1; | |
312 | else if (cmp > 0) | |
313 | low = middle + 1; | |
87271fa6 NC |
314 | else |
315 | return regs[middle].value; | |
252b5132 RH |
316 | } |
317 | while (low <= high); | |
603b7257 | 318 | |
252b5132 RH |
319 | return -1; |
320 | } | |
321 | ||
603b7257 NC |
322 | /* Looks at the current position in the input line to see if it is |
323 | the name of a register in TABLE. If it is, then the name is | |
324 | converted into an expression returned in EXPRESSIONP (with X_op | |
325 | set to O_register and X_add_number set to the register number), the | |
326 | input pointer is left pointing at the first non-blank character after | |
327 | the name and the function returns TRUE. Otherwise the input pointer | |
328 | is left alone and the function returns FALSE. */ | |
87271fa6 | 329 | |
b34976b6 | 330 | static bfd_boolean |
603b7257 NC |
331 | get_register_name (expressionS * expressionP, |
332 | const struct reg_name * table, | |
333 | size_t table_length) | |
85cb2cf9 JL |
334 | { |
335 | int reg_number; | |
336 | char *name; | |
337 | char *start; | |
338 | char c; | |
339 | ||
87271fa6 | 340 | /* Find the spelling of the operand. */ |
85cb2cf9 JL |
341 | start = name = input_line_pointer; |
342 | ||
343 | c = get_symbol_end (); | |
603b7257 | 344 | reg_number = reg_name_search (table, table_length, name); |
85cb2cf9 | 345 | |
468cced8 AM |
346 | /* Put back the delimiting char. */ |
347 | *input_line_pointer = c; | |
348 | ||
87271fa6 NC |
349 | /* Look to see if it's in the register table. */ |
350 | if (reg_number >= 0) | |
85cb2cf9 JL |
351 | { |
352 | expressionP->X_op = O_register; | |
353 | expressionP->X_add_number = reg_number; | |
354 | ||
87271fa6 | 355 | /* Make the rest nice. */ |
85cb2cf9 JL |
356 | expressionP->X_add_symbol = NULL; |
357 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 358 | |
b34976b6 | 359 | return TRUE; |
85cb2cf9 | 360 | } |
87271fa6 | 361 | |
468cced8 AM |
362 | /* Reset the line as if we had not done anything. */ |
363 | input_line_pointer = start; | |
b34976b6 | 364 | return FALSE; |
85cb2cf9 JL |
365 | } |
366 | ||
b34976b6 | 367 | static bfd_boolean |
603b7257 | 368 | r_register_name (expressionS *expressionP) |
85cb2cf9 | 369 | { |
603b7257 | 370 | return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers)); |
85cb2cf9 | 371 | } |
252b5132 | 372 | |
87271fa6 | 373 | |
b34976b6 | 374 | static bfd_boolean |
603b7257 | 375 | xr_register_name (expressionS *expressionP) |
252b5132 | 376 | { |
603b7257 | 377 | return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers)); |
252b5132 RH |
378 | } |
379 | ||
b34976b6 | 380 | static bfd_boolean |
603b7257 | 381 | data_register_name (expressionS *expressionP) |
252b5132 | 382 | { |
603b7257 | 383 | return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers)); |
252b5132 RH |
384 | } |
385 | ||
b34976b6 | 386 | static bfd_boolean |
603b7257 | 387 | address_register_name (expressionS *expressionP) |
252b5132 | 388 | { |
603b7257 | 389 | return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers)); |
252b5132 RH |
390 | } |
391 | ||
e7b71525 | 392 | static bfd_boolean |
603b7257 | 393 | float_register_name (expressionS *expressionP) |
e7b71525 | 394 | { |
603b7257 | 395 | return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers)); |
e7b71525 AO |
396 | } |
397 | ||
603b7257 NC |
398 | static bfd_boolean |
399 | double_register_name (expressionS *expressionP) | |
400 | { | |
401 | return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers)); | |
402 | } | |
e7b71525 AO |
403 | |
404 | static bfd_boolean | |
603b7257 | 405 | other_register_name (expressionS *expressionP) |
e7b71525 AO |
406 | { |
407 | int reg_number; | |
408 | char *name; | |
409 | char *start; | |
410 | char c; | |
411 | ||
412 | /* Find the spelling of the operand. */ | |
413 | start = name = input_line_pointer; | |
414 | ||
415 | c = get_symbol_end (); | |
603b7257 | 416 | reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name); |
e7b71525 AO |
417 | |
418 | /* Put back the delimiting char. */ | |
603b7257 | 419 | *input_line_pointer = c; |
e7b71525 AO |
420 | |
421 | /* Look to see if it's in the register table. */ | |
603b7257 NC |
422 | if (reg_number == 0 |
423 | || (reg_number == AM33 && HAVE_AM33)) | |
e7b71525 AO |
424 | { |
425 | expressionP->X_op = O_register; | |
603b7257 | 426 | expressionP->X_add_number = 0; |
e7b71525 AO |
427 | |
428 | /* Make the rest nice. */ | |
429 | expressionP->X_add_symbol = NULL; | |
430 | expressionP->X_op_symbol = NULL; | |
431 | ||
432 | return TRUE; | |
433 | } | |
434 | ||
435 | /* Reset the line as if we had not done anything. */ | |
436 | input_line_pointer = start; | |
437 | return FALSE; | |
438 | } | |
439 | ||
252b5132 | 440 | void |
603b7257 | 441 | md_show_usage (FILE *stream) |
252b5132 | 442 | { |
b3549761 | 443 | fprintf (stream, _("MN10300 assembler options:\n\ |
252b5132 | 444 | none yet\n")); |
87271fa6 | 445 | } |
252b5132 RH |
446 | |
447 | int | |
603b7257 | 448 | md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
449 | { |
450 | return 0; | |
451 | } | |
452 | ||
453 | symbolS * | |
603b7257 | 454 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
455 | { |
456 | return 0; | |
457 | } | |
458 | ||
459 | char * | |
499ac353 | 460 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 461 | { |
499ac353 | 462 | return ieee_md_atof (type, litp, sizep, FALSE); |
252b5132 RH |
463 | } |
464 | ||
252b5132 | 465 | void |
603b7257 NC |
466 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
467 | asection *sec, | |
468 | fragS *fragP) | |
252b5132 RH |
469 | { |
470 | static unsigned long label_count = 0; | |
471 | char buf[40]; | |
472 | ||
473 | subseg_change (sec, 0); | |
474 | if (fragP->fr_subtype == 0) | |
475 | { | |
476 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
477 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
478 | fragP->fr_var = 0; | |
479 | fragP->fr_fix += 2; | |
480 | } | |
481 | else if (fragP->fr_subtype == 1) | |
482 | { | |
483 | /* Reverse the condition of the first branch. */ | |
484 | int offset = fragP->fr_fix; | |
485 | int opcode = fragP->fr_literal[offset] & 0xff; | |
486 | ||
487 | switch (opcode) | |
488 | { | |
489 | case 0xc8: | |
490 | opcode = 0xc9; | |
491 | break; | |
492 | case 0xc9: | |
493 | opcode = 0xc8; | |
494 | break; | |
495 | case 0xc0: | |
496 | opcode = 0xc2; | |
497 | break; | |
498 | case 0xc2: | |
499 | opcode = 0xc0; | |
500 | break; | |
501 | case 0xc3: | |
502 | opcode = 0xc1; | |
503 | break; | |
504 | case 0xc1: | |
505 | opcode = 0xc3; | |
506 | break; | |
507 | case 0xc4: | |
508 | opcode = 0xc6; | |
509 | break; | |
510 | case 0xc6: | |
511 | opcode = 0xc4; | |
512 | break; | |
513 | case 0xc7: | |
514 | opcode = 0xc5; | |
515 | break; | |
516 | case 0xc5: | |
517 | opcode = 0xc7; | |
518 | break; | |
519 | default: | |
520 | abort (); | |
521 | } | |
522 | fragP->fr_literal[offset] = opcode; | |
523 | ||
524 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 525 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
526 | fix_new (fragP, fragP->fr_fix + 1, 1, |
527 | symbol_new (buf, sec, 0, fragP->fr_next), | |
528 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
529 | ||
530 | /* Now create the unconditional branch + fixup to the | |
531 | final target. */ | |
532 | fragP->fr_literal[offset + 2] = 0xcc; | |
533 | fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, | |
534 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
535 | fragP->fr_var = 0; | |
536 | fragP->fr_fix += 5; | |
537 | } | |
538 | else if (fragP->fr_subtype == 2) | |
539 | { | |
540 | /* Reverse the condition of the first branch. */ | |
541 | int offset = fragP->fr_fix; | |
542 | int opcode = fragP->fr_literal[offset] & 0xff; | |
543 | ||
544 | switch (opcode) | |
545 | { | |
546 | case 0xc8: | |
547 | opcode = 0xc9; | |
548 | break; | |
549 | case 0xc9: | |
550 | opcode = 0xc8; | |
551 | break; | |
552 | case 0xc0: | |
553 | opcode = 0xc2; | |
554 | break; | |
555 | case 0xc2: | |
556 | opcode = 0xc0; | |
557 | break; | |
558 | case 0xc3: | |
559 | opcode = 0xc1; | |
560 | break; | |
561 | case 0xc1: | |
562 | opcode = 0xc3; | |
563 | break; | |
564 | case 0xc4: | |
565 | opcode = 0xc6; | |
566 | break; | |
567 | case 0xc6: | |
568 | opcode = 0xc4; | |
569 | break; | |
570 | case 0xc7: | |
571 | opcode = 0xc5; | |
572 | break; | |
573 | case 0xc5: | |
574 | opcode = 0xc7; | |
575 | break; | |
576 | default: | |
577 | abort (); | |
578 | } | |
579 | fragP->fr_literal[offset] = opcode; | |
580 | ||
581 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 582 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
583 | fix_new (fragP, fragP->fr_fix + 1, 1, |
584 | symbol_new (buf, sec, 0, fragP->fr_next), | |
585 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
586 | ||
587 | /* Now create the unconditional branch + fixup to the | |
588 | final target. */ | |
589 | fragP->fr_literal[offset + 2] = 0xdc; | |
590 | fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, | |
591 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
592 | fragP->fr_var = 0; | |
593 | fragP->fr_fix += 7; | |
594 | } | |
595 | else if (fragP->fr_subtype == 3) | |
596 | { | |
597 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
598 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
599 | fragP->fr_var = 0; | |
600 | fragP->fr_fix += 3; | |
601 | } | |
602 | else if (fragP->fr_subtype == 4) | |
603 | { | |
604 | /* Reverse the condition of the first branch. */ | |
605 | int offset = fragP->fr_fix; | |
606 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
607 | ||
608 | switch (opcode) | |
609 | { | |
610 | case 0xe8: | |
611 | opcode = 0xe9; | |
612 | break; | |
613 | case 0xe9: | |
614 | opcode = 0xe8; | |
615 | break; | |
616 | case 0xea: | |
617 | opcode = 0xeb; | |
618 | break; | |
619 | case 0xeb: | |
620 | opcode = 0xea; | |
621 | break; | |
622 | default: | |
623 | abort (); | |
624 | } | |
625 | fragP->fr_literal[offset + 1] = opcode; | |
626 | ||
627 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 628 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
629 | fix_new (fragP, fragP->fr_fix + 2, 1, |
630 | symbol_new (buf, sec, 0, fragP->fr_next), | |
631 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
632 | ||
633 | /* Now create the unconditional branch + fixup to the | |
634 | final target. */ | |
635 | fragP->fr_literal[offset + 3] = 0xcc; | |
636 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
637 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
638 | fragP->fr_var = 0; | |
639 | fragP->fr_fix += 6; | |
640 | } | |
641 | else if (fragP->fr_subtype == 5) | |
642 | { | |
643 | /* Reverse the condition of the first branch. */ | |
644 | int offset = fragP->fr_fix; | |
645 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
646 | ||
647 | switch (opcode) | |
648 | { | |
649 | case 0xe8: | |
650 | opcode = 0xe9; | |
651 | break; | |
652 | case 0xea: | |
653 | opcode = 0xeb; | |
654 | break; | |
655 | case 0xeb: | |
656 | opcode = 0xea; | |
657 | break; | |
658 | default: | |
659 | abort (); | |
660 | } | |
661 | fragP->fr_literal[offset + 1] = opcode; | |
662 | ||
663 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 664 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
665 | fix_new (fragP, fragP->fr_fix + 2, 1, |
666 | symbol_new (buf, sec, 0, fragP->fr_next), | |
667 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
668 | ||
669 | /* Now create the unconditional branch + fixup to the | |
670 | final target. */ | |
671 | fragP->fr_literal[offset + 3] = 0xdc; | |
672 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
673 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
674 | fragP->fr_var = 0; | |
675 | fragP->fr_fix += 8; | |
676 | } | |
677 | else if (fragP->fr_subtype == 6) | |
678 | { | |
679 | int offset = fragP->fr_fix; | |
ca75ed2d | 680 | |
252b5132 RH |
681 | fragP->fr_literal[offset] = 0xcd; |
682 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, | |
683 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
684 | fragP->fr_var = 0; | |
685 | fragP->fr_fix += 5; | |
686 | } | |
687 | else if (fragP->fr_subtype == 7) | |
688 | { | |
689 | int offset = fragP->fr_fix; | |
ca75ed2d | 690 | |
252b5132 RH |
691 | fragP->fr_literal[offset] = 0xdd; |
692 | fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; | |
693 | fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; | |
ab3e2b4a NC |
694 | fragP->fr_literal[offset + 3] = 0; |
695 | fragP->fr_literal[offset + 4] = 0; | |
252b5132 RH |
696 | |
697 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
698 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
699 | fragP->fr_var = 0; | |
700 | fragP->fr_fix += 7; | |
701 | } | |
702 | else if (fragP->fr_subtype == 8) | |
703 | { | |
704 | int offset = fragP->fr_fix; | |
ca75ed2d | 705 | |
252b5132 RH |
706 | fragP->fr_literal[offset] = 0xfa; |
707 | fragP->fr_literal[offset + 1] = 0xff; | |
708 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
709 | fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); | |
710 | fragP->fr_var = 0; | |
711 | fragP->fr_fix += 4; | |
712 | } | |
713 | else if (fragP->fr_subtype == 9) | |
714 | { | |
715 | int offset = fragP->fr_fix; | |
ca75ed2d | 716 | |
252b5132 RH |
717 | fragP->fr_literal[offset] = 0xfc; |
718 | fragP->fr_literal[offset + 1] = 0xff; | |
719 | ||
720 | fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, | |
721 | fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); | |
722 | fragP->fr_var = 0; | |
723 | fragP->fr_fix += 6; | |
724 | } | |
725 | else if (fragP->fr_subtype == 10) | |
726 | { | |
727 | fragP->fr_literal[fragP->fr_fix] = 0xca; | |
728 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
729 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
730 | fragP->fr_var = 0; | |
731 | fragP->fr_fix += 2; | |
732 | } | |
733 | else if (fragP->fr_subtype == 11) | |
734 | { | |
735 | int offset = fragP->fr_fix; | |
ca75ed2d | 736 | |
252b5132 RH |
737 | fragP->fr_literal[offset] = 0xcc; |
738 | ||
acb02403 | 739 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, |
252b5132 RH |
740 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); |
741 | fragP->fr_var = 0; | |
742 | fragP->fr_fix += 3; | |
743 | } | |
744 | else if (fragP->fr_subtype == 12) | |
745 | { | |
746 | int offset = fragP->fr_fix; | |
ca75ed2d | 747 | |
252b5132 RH |
748 | fragP->fr_literal[offset] = 0xdc; |
749 | ||
750 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
751 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
752 | fragP->fr_var = 0; | |
753 | fragP->fr_fix += 5; | |
754 | } | |
e7b71525 AO |
755 | else if (fragP->fr_subtype == 13) |
756 | { | |
757 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
758 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
759 | fragP->fr_var = 0; | |
760 | fragP->fr_fix += 3; | |
761 | } | |
762 | else if (fragP->fr_subtype == 14) | |
763 | { | |
764 | /* Reverse the condition of the first branch. */ | |
765 | int offset = fragP->fr_fix; | |
766 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
767 | ||
768 | switch (opcode) | |
769 | { | |
770 | case 0xd0: | |
771 | opcode = 0xd1; | |
772 | break; | |
773 | case 0xd1: | |
774 | opcode = 0xd0; | |
775 | break; | |
776 | case 0xd2: | |
777 | opcode = 0xdc; | |
778 | break; | |
779 | case 0xd3: | |
780 | opcode = 0xdb; | |
781 | break; | |
782 | case 0xd4: | |
783 | opcode = 0xda; | |
784 | break; | |
785 | case 0xd5: | |
786 | opcode = 0xd9; | |
787 | break; | |
788 | case 0xd6: | |
789 | opcode = 0xd8; | |
790 | break; | |
791 | case 0xd7: | |
792 | opcode = 0xdd; | |
793 | break; | |
794 | case 0xd8: | |
795 | opcode = 0xd6; | |
796 | break; | |
797 | case 0xd9: | |
798 | opcode = 0xd5; | |
799 | break; | |
800 | case 0xda: | |
801 | opcode = 0xd4; | |
802 | break; | |
803 | case 0xdb: | |
804 | opcode = 0xd3; | |
805 | break; | |
806 | case 0xdc: | |
807 | opcode = 0xd2; | |
808 | break; | |
809 | case 0xdd: | |
810 | opcode = 0xd7; | |
811 | break; | |
812 | default: | |
813 | abort (); | |
814 | } | |
815 | fragP->fr_literal[offset + 1] = opcode; | |
816 | ||
817 | /* Create a fixup for the reversed conditional branch. */ | |
818 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); | |
819 | fix_new (fragP, fragP->fr_fix + 2, 1, | |
820 | symbol_new (buf, sec, 0, fragP->fr_next), | |
821 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
822 | ||
823 | /* Now create the unconditional branch + fixup to the | |
824 | final target. */ | |
825 | fragP->fr_literal[offset + 3] = 0xcc; | |
826 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
827 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
828 | fragP->fr_var = 0; | |
829 | fragP->fr_fix += 6; | |
830 | } | |
831 | else if (fragP->fr_subtype == 15) | |
832 | { | |
833 | /* Reverse the condition of the first branch. */ | |
834 | int offset = fragP->fr_fix; | |
835 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
836 | ||
837 | switch (opcode) | |
838 | { | |
839 | case 0xd0: | |
840 | opcode = 0xd1; | |
841 | break; | |
842 | case 0xd1: | |
843 | opcode = 0xd0; | |
844 | break; | |
845 | case 0xd2: | |
846 | opcode = 0xdc; | |
847 | break; | |
848 | case 0xd3: | |
849 | opcode = 0xdb; | |
850 | break; | |
851 | case 0xd4: | |
852 | opcode = 0xda; | |
853 | break; | |
854 | case 0xd5: | |
855 | opcode = 0xd9; | |
856 | break; | |
857 | case 0xd6: | |
858 | opcode = 0xd8; | |
859 | break; | |
860 | case 0xd7: | |
861 | opcode = 0xdd; | |
862 | break; | |
863 | case 0xd8: | |
864 | opcode = 0xd6; | |
865 | break; | |
866 | case 0xd9: | |
867 | opcode = 0xd5; | |
868 | break; | |
869 | case 0xda: | |
870 | opcode = 0xd4; | |
871 | break; | |
872 | case 0xdb: | |
873 | opcode = 0xd3; | |
874 | break; | |
875 | case 0xdc: | |
876 | opcode = 0xd2; | |
877 | break; | |
878 | case 0xdd: | |
879 | opcode = 0xd7; | |
880 | break; | |
881 | default: | |
882 | abort (); | |
883 | } | |
884 | fragP->fr_literal[offset + 1] = opcode; | |
885 | ||
886 | /* Create a fixup for the reversed conditional branch. */ | |
887 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); | |
888 | fix_new (fragP, fragP->fr_fix + 2, 1, | |
889 | symbol_new (buf, sec, 0, fragP->fr_next), | |
890 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
891 | ||
892 | /* Now create the unconditional branch + fixup to the | |
893 | final target. */ | |
894 | fragP->fr_literal[offset + 3] = 0xdc; | |
895 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
896 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
897 | fragP->fr_var = 0; | |
898 | fragP->fr_fix += 8; | |
899 | } | |
252b5132 RH |
900 | else |
901 | abort (); | |
902 | } | |
903 | ||
904 | valueT | |
603b7257 | 905 | md_section_align (asection *seg, valueT addr) |
252b5132 RH |
906 | { |
907 | int align = bfd_get_section_alignment (stdoutput, seg); | |
603b7257 | 908 | |
252b5132 RH |
909 | return ((addr + (1 << align) - 1) & (-1 << align)); |
910 | } | |
911 | ||
912 | void | |
603b7257 | 913 | md_begin (void) |
252b5132 RH |
914 | { |
915 | char *prev_name = ""; | |
603b7257 | 916 | const struct mn10300_opcode *op; |
252b5132 | 917 | |
87271fa6 | 918 | mn10300_hash = hash_new (); |
252b5132 RH |
919 | |
920 | /* Insert unique names into hash table. The MN10300 instruction set | |
921 | has many identical opcode names that have different opcodes based | |
922 | on the operands. This hash table then provides a quick index to | |
923 | the first opcode with a particular name in the opcode table. */ | |
924 | ||
925 | op = mn10300_opcodes; | |
926 | while (op->name) | |
927 | { | |
87271fa6 | 928 | if (strcmp (prev_name, op->name)) |
252b5132 RH |
929 | { |
930 | prev_name = (char *) op->name; | |
931 | hash_insert (mn10300_hash, op->name, (char *) op); | |
932 | } | |
933 | op++; | |
934 | } | |
935 | ||
252b5132 | 936 | /* Set the default machine type. */ |
2ce28d43 AO |
937 | #ifdef TE_LINUX |
938 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2)) | |
939 | as_warn (_("could not set architecture and machine")); | |
940 | ||
941 | current_machine = AM33_2; | |
942 | #else | |
0a727238 | 943 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103)) |
252b5132 RH |
944 | as_warn (_("could not set architecture and machine")); |
945 | ||
0a727238 | 946 | current_machine = MN103; |
2ce28d43 | 947 | #endif |
252b5132 RH |
948 | } |
949 | ||
bf6f0d0c AO |
950 | static symbolS *GOT_symbol; |
951 | ||
bf6f0d0c | 952 | static inline int |
603b7257 | 953 | mn10300_PIC_related_p (symbolS *sym) |
bf6f0d0c AO |
954 | { |
955 | expressionS *exp; | |
956 | ||
957 | if (! sym) | |
958 | return 0; | |
959 | ||
960 | if (sym == GOT_symbol) | |
961 | return 1; | |
962 | ||
963 | exp = symbol_get_value_expression (sym); | |
964 | ||
965 | return (exp->X_op == O_PIC_reloc | |
966 | || mn10300_PIC_related_p (exp->X_add_symbol) | |
967 | || mn10300_PIC_related_p (exp->X_op_symbol)); | |
968 | } | |
969 | ||
970 | static inline int | |
603b7257 | 971 | mn10300_check_fixup (struct mn10300_fixup *fixup) |
bf6f0d0c AO |
972 | { |
973 | expressionS *exp = &fixup->exp; | |
974 | ||
975 | repeat: | |
976 | switch (exp->X_op) | |
977 | { | |
978 | case O_add: | |
979 | case O_subtract: /* If we're sufficiently unlucky that the label | |
980 | and the expression that references it happen | |
981 | to end up in different frags, the subtract | |
982 | won't be simplified within expression(). */ | |
983 | /* The PIC-related operand must be the first operand of a sum. */ | |
984 | if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol)) | |
985 | return 1; | |
986 | ||
987 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) | |
988 | fixup->reloc = BFD_RELOC_32_GOT_PCREL; | |
989 | ||
990 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
991 | goto repeat; | |
992 | ||
993 | case O_symbol: | |
994 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) | |
995 | fixup->reloc = BFD_RELOC_32_GOT_PCREL; | |
996 | break; | |
997 | ||
998 | case O_PIC_reloc: | |
999 | fixup->reloc = exp->X_md; | |
1000 | exp->X_op = O_symbol; | |
1001 | if (fixup->reloc == BFD_RELOC_32_PLT_PCREL | |
1002 | && fixup->opindex >= 0 | |
1003 | && (mn10300_operands[fixup->opindex].flags | |
1004 | & MN10300_OPERAND_RELAX)) | |
1005 | return 1; | |
1006 | break; | |
1007 | ||
1008 | default: | |
1009 | return (mn10300_PIC_related_p (exp->X_add_symbol) | |
1010 | || mn10300_PIC_related_p (exp->X_op_symbol)); | |
1011 | } | |
1012 | ||
1013 | return 0; | |
1014 | } | |
1015 | ||
1016 | void | |
603b7257 | 1017 | mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
bf6f0d0c AO |
1018 | { |
1019 | struct mn10300_fixup fixup; | |
1020 | ||
1021 | fixup.opindex = -1; | |
1022 | fixup.exp = *exp; | |
1023 | fixup.reloc = BFD_RELOC_UNUSED; | |
1024 | ||
1025 | mn10300_check_fixup (&fixup); | |
1026 | ||
1027 | if (fixup.reloc == BFD_RELOC_MN10300_GOT32) | |
1028 | switch (size) | |
1029 | { | |
1030 | case 2: | |
1031 | fixup.reloc = BFD_RELOC_MN10300_GOT16; | |
1032 | break; | |
1033 | ||
1034 | case 3: | |
1035 | fixup.reloc = BFD_RELOC_MN10300_GOT24; | |
1036 | break; | |
1037 | ||
1038 | case 4: | |
1039 | break; | |
1040 | ||
1041 | default: | |
1042 | goto error; | |
1043 | } | |
1044 | else if (fixup.reloc == BFD_RELOC_UNUSED) | |
1045 | switch (size) | |
1046 | { | |
1047 | case 1: | |
1048 | fixup.reloc = BFD_RELOC_8; | |
1049 | break; | |
1050 | ||
1051 | case 2: | |
1052 | fixup.reloc = BFD_RELOC_16; | |
1053 | break; | |
1054 | ||
1055 | case 3: | |
1056 | fixup.reloc = BFD_RELOC_24; | |
1057 | break; | |
1058 | ||
1059 | case 4: | |
1060 | fixup.reloc = BFD_RELOC_32; | |
1061 | break; | |
1062 | ||
1063 | default: | |
1064 | goto error; | |
1065 | } | |
1066 | else if (size != 4) | |
1067 | { | |
1068 | error: | |
1069 | as_bad (_("unsupported BFD relocation size %u"), size); | |
1070 | fixup.reloc = BFD_RELOC_UNUSED; | |
1071 | } | |
1072 | ||
1073 | fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc); | |
1074 | } | |
1075 | ||
603b7257 NC |
1076 | static bfd_boolean |
1077 | check_operand (const struct mn10300_operand *operand, | |
1078 | offsetT val) | |
1079 | { | |
1080 | /* No need to check 32bit operands for a bit. Note that | |
1081 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
1082 | if (operand->bits != 32 | |
1083 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
1084 | { | |
1085 | long min, max; | |
1086 | offsetT test; | |
1087 | int bits; | |
1088 | ||
1089 | bits = operand->bits; | |
1090 | if (operand->flags & MN10300_OPERAND_24BIT) | |
1091 | bits = 24; | |
1092 | ||
1093 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
1094 | { | |
1095 | max = (1 << (bits - 1)) - 1; | |
1096 | min = - (1 << (bits - 1)); | |
1097 | } | |
1098 | else | |
1099 | { | |
1100 | max = (1 << bits) - 1; | |
1101 | min = 0; | |
1102 | } | |
1103 | ||
1104 | test = val; | |
1105 | ||
1106 | if (test < (offsetT) min || test > (offsetT) max) | |
1107 | return FALSE; | |
1108 | } | |
1109 | return TRUE; | |
1110 | } | |
1111 | ||
1112 | /* Insert an operand value into an instruction. */ | |
1113 | ||
1114 | static void | |
1115 | mn10300_insert_operand (unsigned long *insnp, | |
1116 | unsigned long *extensionp, | |
1117 | const struct mn10300_operand *operand, | |
1118 | offsetT val, | |
1119 | char *file, | |
1120 | unsigned int line, | |
1121 | unsigned int shift) | |
1122 | { | |
1123 | /* No need to check 32bit operands for a bit. Note that | |
1124 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
1125 | if (operand->bits != 32 | |
1126 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
1127 | { | |
1128 | long min, max; | |
1129 | offsetT test; | |
1130 | int bits; | |
1131 | ||
1132 | bits = operand->bits; | |
1133 | if (operand->flags & MN10300_OPERAND_24BIT) | |
1134 | bits = 24; | |
1135 | ||
1136 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
1137 | { | |
1138 | max = (1 << (bits - 1)) - 1; | |
1139 | min = - (1 << (bits - 1)); | |
1140 | } | |
1141 | else | |
1142 | { | |
1143 | max = (1 << bits) - 1; | |
1144 | min = 0; | |
1145 | } | |
1146 | ||
1147 | test = val; | |
1148 | ||
1149 | if (test < (offsetT) min || test > (offsetT) max) | |
1150 | as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line); | |
1151 | } | |
1152 | ||
1153 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
1154 | { | |
1155 | *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); | |
1156 | *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) | |
1157 | << operand->shift); | |
1158 | } | |
1159 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) | |
1160 | { | |
1161 | *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1); | |
1162 | *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1)) | |
1163 | << operand->shift); | |
1164 | } | |
1165 | else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG))) | |
1166 | { | |
1167 | /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an | |
1168 | explanation of these variables. Note that FMT-implied shifts | |
1169 | are not taken into account for FP registers. */ | |
1170 | unsigned long mask_low, mask_high; | |
1171 | int shl_low, shr_high, shl_high; | |
1172 | ||
1173 | switch (operand->bits) | |
1174 | { | |
1175 | case 5: | |
1176 | /* Handle regular FP registers. */ | |
1177 | if (operand->shift >= 0) | |
1178 | { | |
1179 | /* This is an `m' register. */ | |
1180 | shl_low = operand->shift; | |
1181 | shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4; | |
1182 | } | |
1183 | else | |
1184 | { | |
1185 | /* This is an `n' register. */ | |
1186 | shl_low = -operand->shift; | |
1187 | shl_high = shl_low / 4; | |
1188 | } | |
1189 | ||
1190 | mask_low = 0x0f; | |
1191 | mask_high = 0x10; | |
1192 | shr_high = 4; | |
1193 | break; | |
1194 | ||
1195 | case 3: | |
1196 | /* Handle accumulators. */ | |
1197 | shl_low = -operand->shift; | |
1198 | shl_high = 0; | |
1199 | mask_low = 0x03; | |
1200 | mask_high = 0x04; | |
1201 | shr_high = 2; | |
1202 | break; | |
1203 | ||
1204 | default: | |
1205 | abort (); | |
1206 | } | |
1207 | *insnp |= ((((val & mask_high) >> shr_high) << shl_high) | |
1208 | | ((val & mask_low) << shl_low)); | |
1209 | } | |
1210 | else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) | |
1211 | { | |
1212 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
1213 | << (operand->shift + shift)); | |
1214 | ||
1215 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
1216 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
1217 | << (operand->shift + shift + operand->bits)); | |
1218 | } | |
1219 | else | |
1220 | { | |
1221 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
1222 | << (operand->shift + shift)); | |
1223 | ||
1224 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
1225 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
1226 | << (operand->shift + shift + operand->bits)); | |
1227 | } | |
1228 | } | |
1229 | ||
252b5132 | 1230 | void |
603b7257 | 1231 | md_assemble (char *str) |
252b5132 RH |
1232 | { |
1233 | char *s; | |
1234 | struct mn10300_opcode *opcode; | |
1235 | struct mn10300_opcode *next_opcode; | |
1236 | const unsigned char *opindex_ptr; | |
1237 | int next_opindex, relaxable; | |
eb0dfd58 | 1238 | unsigned long insn, extension, size = 0; |
252b5132 RH |
1239 | char *f; |
1240 | int i; | |
1241 | int match; | |
1242 | ||
1243 | /* Get the opcode. */ | |
3882b010 | 1244 | for (s = str; *s != '\0' && !ISSPACE (*s); s++) |
252b5132 RH |
1245 | ; |
1246 | if (*s != '\0') | |
1247 | *s++ = '\0'; | |
1248 | ||
87271fa6 NC |
1249 | /* Find the first opcode with the proper name. */ |
1250 | opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str); | |
252b5132 RH |
1251 | if (opcode == NULL) |
1252 | { | |
1253 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
1254 | return; | |
1255 | } | |
1256 | ||
1257 | str = s; | |
3882b010 | 1258 | while (ISSPACE (*str)) |
252b5132 RH |
1259 | ++str; |
1260 | ||
1261 | input_line_pointer = str; | |
1262 | ||
87271fa6 | 1263 | for (;;) |
252b5132 RH |
1264 | { |
1265 | const char *errmsg; | |
1266 | int op_idx; | |
1267 | char *hold; | |
1268 | int extra_shift = 0; | |
1269 | ||
252b5132 RH |
1270 | errmsg = _("Invalid opcode/operands"); |
1271 | ||
1272 | /* Reset the array of register operands. */ | |
1273 | memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); | |
1274 | ||
1275 | relaxable = 0; | |
1276 | fc = 0; | |
1277 | match = 0; | |
1278 | next_opindex = 0; | |
1279 | insn = opcode->opcode; | |
1280 | extension = 0; | |
1281 | ||
1282 | /* If the instruction is not available on the current machine | |
1283 | then it can not possibly match. */ | |
1284 | if (opcode->machine | |
e7b71525 | 1285 | && !(opcode->machine == AM33_2 && HAVE_AM33_2) |
aa15f6f7 AO |
1286 | && !(opcode->machine == AM33 && HAVE_AM33) |
1287 | && !(opcode->machine == AM30 && HAVE_AM30)) | |
252b5132 RH |
1288 | goto error; |
1289 | ||
1290 | for (op_idx = 1, opindex_ptr = opcode->operands; | |
1291 | *opindex_ptr != 0; | |
1292 | opindex_ptr++, op_idx++) | |
1293 | { | |
1294 | const struct mn10300_operand *operand; | |
1295 | expressionS ex; | |
1296 | ||
1297 | if (next_opindex == 0) | |
1298 | { | |
1299 | operand = &mn10300_operands[*opindex_ptr]; | |
1300 | } | |
1301 | else | |
1302 | { | |
1303 | operand = &mn10300_operands[next_opindex]; | |
1304 | next_opindex = 0; | |
1305 | } | |
1306 | ||
1307 | while (*str == ' ' || *str == ',') | |
1308 | ++str; | |
1309 | ||
1310 | if (operand->flags & MN10300_OPERAND_RELAX) | |
1311 | relaxable = 1; | |
1312 | ||
87271fa6 | 1313 | /* Gather the operand. */ |
252b5132 RH |
1314 | hold = input_line_pointer; |
1315 | input_line_pointer = str; | |
1316 | ||
1317 | if (operand->flags & MN10300_OPERAND_PAREN) | |
1318 | { | |
1319 | if (*input_line_pointer != ')' && *input_line_pointer != '(') | |
1320 | { | |
1321 | input_line_pointer = hold; | |
1322 | str = hold; | |
1323 | goto error; | |
1324 | } | |
1325 | input_line_pointer++; | |
1326 | goto keep_going; | |
1327 | } | |
1328 | /* See if we can match the operands. */ | |
1329 | else if (operand->flags & MN10300_OPERAND_DREG) | |
1330 | { | |
1331 | if (!data_register_name (&ex)) | |
1332 | { | |
1333 | input_line_pointer = hold; | |
1334 | str = hold; | |
1335 | goto error; | |
1336 | } | |
1337 | } | |
1338 | else if (operand->flags & MN10300_OPERAND_AREG) | |
1339 | { | |
1340 | if (!address_register_name (&ex)) | |
1341 | { | |
1342 | input_line_pointer = hold; | |
1343 | str = hold; | |
1344 | goto error; | |
1345 | } | |
1346 | } | |
1347 | else if (operand->flags & MN10300_OPERAND_SP) | |
1348 | { | |
1349 | char *start = input_line_pointer; | |
1350 | char c = get_symbol_end (); | |
1351 | ||
1352 | if (strcasecmp (start, "sp") != 0) | |
1353 | { | |
1354 | *input_line_pointer = c; | |
1355 | input_line_pointer = hold; | |
1356 | str = hold; | |
1357 | goto error; | |
1358 | } | |
1359 | *input_line_pointer = c; | |
1360 | goto keep_going; | |
1361 | } | |
85cb2cf9 JL |
1362 | else if (operand->flags & MN10300_OPERAND_RREG) |
1363 | { | |
1364 | if (!r_register_name (&ex)) | |
1365 | { | |
1366 | input_line_pointer = hold; | |
1367 | str = hold; | |
1368 | goto error; | |
1369 | } | |
1370 | } | |
1371 | else if (operand->flags & MN10300_OPERAND_XRREG) | |
1372 | { | |
1373 | if (!xr_register_name (&ex)) | |
1374 | { | |
1375 | input_line_pointer = hold; | |
1376 | str = hold; | |
1377 | goto error; | |
1378 | } | |
1379 | } | |
e7b71525 AO |
1380 | else if (operand->flags & MN10300_OPERAND_FSREG) |
1381 | { | |
1382 | if (!float_register_name (&ex)) | |
1383 | { | |
1384 | input_line_pointer = hold; | |
1385 | str = hold; | |
1386 | goto error; | |
1387 | } | |
1388 | } | |
1389 | else if (operand->flags & MN10300_OPERAND_FDREG) | |
1390 | { | |
1391 | if (!double_register_name (&ex)) | |
1392 | { | |
1393 | input_line_pointer = hold; | |
1394 | str = hold; | |
1395 | goto error; | |
1396 | } | |
1397 | } | |
1398 | else if (operand->flags & MN10300_OPERAND_FPCR) | |
1399 | { | |
1400 | char *start = input_line_pointer; | |
1401 | char c = get_symbol_end (); | |
1402 | ||
1403 | if (strcasecmp (start, "fpcr") != 0) | |
1404 | { | |
1405 | *input_line_pointer = c; | |
1406 | input_line_pointer = hold; | |
1407 | str = hold; | |
1408 | goto error; | |
1409 | } | |
1410 | *input_line_pointer = c; | |
1411 | goto keep_going; | |
1412 | } | |
85cb2cf9 JL |
1413 | else if (operand->flags & MN10300_OPERAND_USP) |
1414 | { | |
1415 | char *start = input_line_pointer; | |
1416 | char c = get_symbol_end (); | |
1417 | ||
1418 | if (strcasecmp (start, "usp") != 0) | |
1419 | { | |
1420 | *input_line_pointer = c; | |
1421 | input_line_pointer = hold; | |
1422 | str = hold; | |
1423 | goto error; | |
1424 | } | |
1425 | *input_line_pointer = c; | |
1426 | goto keep_going; | |
1427 | } | |
1428 | else if (operand->flags & MN10300_OPERAND_SSP) | |
1429 | { | |
1430 | char *start = input_line_pointer; | |
1431 | char c = get_symbol_end (); | |
1432 | ||
1433 | if (strcasecmp (start, "ssp") != 0) | |
1434 | { | |
1435 | *input_line_pointer = c; | |
1436 | input_line_pointer = hold; | |
1437 | str = hold; | |
1438 | goto error; | |
1439 | } | |
1440 | *input_line_pointer = c; | |
1441 | goto keep_going; | |
1442 | } | |
1443 | else if (operand->flags & MN10300_OPERAND_MSP) | |
1444 | { | |
1445 | char *start = input_line_pointer; | |
1446 | char c = get_symbol_end (); | |
1447 | ||
1448 | if (strcasecmp (start, "msp") != 0) | |
1449 | { | |
1450 | *input_line_pointer = c; | |
1451 | input_line_pointer = hold; | |
1452 | str = hold; | |
1453 | goto error; | |
1454 | } | |
1455 | *input_line_pointer = c; | |
1456 | goto keep_going; | |
1457 | } | |
1458 | else if (operand->flags & MN10300_OPERAND_PC) | |
1459 | { | |
1460 | char *start = input_line_pointer; | |
1461 | char c = get_symbol_end (); | |
1462 | ||
1463 | if (strcasecmp (start, "pc") != 0) | |
1464 | { | |
1465 | *input_line_pointer = c; | |
1466 | input_line_pointer = hold; | |
1467 | str = hold; | |
1468 | goto error; | |
1469 | } | |
1470 | *input_line_pointer = c; | |
1471 | goto keep_going; | |
1472 | } | |
1473 | else if (operand->flags & MN10300_OPERAND_EPSW) | |
1474 | { | |
1475 | char *start = input_line_pointer; | |
1476 | char c = get_symbol_end (); | |
1477 | ||
1478 | if (strcasecmp (start, "epsw") != 0) | |
1479 | { | |
1480 | *input_line_pointer = c; | |
1481 | input_line_pointer = hold; | |
1482 | str = hold; | |
1483 | goto error; | |
1484 | } | |
1485 | *input_line_pointer = c; | |
1486 | goto keep_going; | |
1487 | } | |
1488 | else if (operand->flags & MN10300_OPERAND_PLUS) | |
1489 | { | |
1490 | if (*input_line_pointer != '+') | |
1491 | { | |
1492 | input_line_pointer = hold; | |
1493 | str = hold; | |
1494 | goto error; | |
1495 | } | |
1496 | input_line_pointer++; | |
1497 | goto keep_going; | |
1498 | } | |
252b5132 RH |
1499 | else if (operand->flags & MN10300_OPERAND_PSW) |
1500 | { | |
1501 | char *start = input_line_pointer; | |
1502 | char c = get_symbol_end (); | |
1503 | ||
1504 | if (strcasecmp (start, "psw") != 0) | |
1505 | { | |
1506 | *input_line_pointer = c; | |
1507 | input_line_pointer = hold; | |
1508 | str = hold; | |
1509 | goto error; | |
1510 | } | |
1511 | *input_line_pointer = c; | |
1512 | goto keep_going; | |
1513 | } | |
1514 | else if (operand->flags & MN10300_OPERAND_MDR) | |
1515 | { | |
1516 | char *start = input_line_pointer; | |
1517 | char c = get_symbol_end (); | |
1518 | ||
1519 | if (strcasecmp (start, "mdr") != 0) | |
1520 | { | |
1521 | *input_line_pointer = c; | |
1522 | input_line_pointer = hold; | |
1523 | str = hold; | |
1524 | goto error; | |
1525 | } | |
1526 | *input_line_pointer = c; | |
1527 | goto keep_going; | |
1528 | } | |
1529 | else if (operand->flags & MN10300_OPERAND_REG_LIST) | |
1530 | { | |
1531 | unsigned int value = 0; | |
1532 | if (*input_line_pointer != '[') | |
1533 | { | |
1534 | input_line_pointer = hold; | |
1535 | str = hold; | |
1536 | goto error; | |
1537 | } | |
1538 | ||
1539 | /* Eat the '['. */ | |
1540 | input_line_pointer++; | |
87271fa6 | 1541 | |
252b5132 | 1542 | /* We used to reject a null register list here; however, |
87271fa6 NC |
1543 | we accept it now so the compiler can emit "call" |
1544 | instructions for all calls to named functions. | |
252b5132 RH |
1545 | |
1546 | The linker can then fill in the appropriate bits for the | |
1547 | register list and stack size or change the instruction | |
1548 | into a "calls" if using "call" is not profitable. */ | |
1549 | while (*input_line_pointer != ']') | |
1550 | { | |
1551 | char *start; | |
1552 | char c; | |
1553 | ||
1554 | if (*input_line_pointer == ',') | |
1555 | input_line_pointer++; | |
1556 | ||
1557 | start = input_line_pointer; | |
1558 | c = get_symbol_end (); | |
1559 | ||
1560 | if (strcasecmp (start, "d2") == 0) | |
1561 | { | |
1562 | value |= 0x80; | |
1563 | *input_line_pointer = c; | |
1564 | } | |
1565 | else if (strcasecmp (start, "d3") == 0) | |
1566 | { | |
1567 | value |= 0x40; | |
1568 | *input_line_pointer = c; | |
1569 | } | |
1570 | else if (strcasecmp (start, "a2") == 0) | |
1571 | { | |
1572 | value |= 0x20; | |
1573 | *input_line_pointer = c; | |
1574 | } | |
1575 | else if (strcasecmp (start, "a3") == 0) | |
1576 | { | |
1577 | value |= 0x10; | |
1578 | *input_line_pointer = c; | |
1579 | } | |
1580 | else if (strcasecmp (start, "other") == 0) | |
1581 | { | |
1582 | value |= 0x08; | |
1583 | *input_line_pointer = c; | |
1584 | } | |
0a727238 | 1585 | else if (HAVE_AM33 |
85cb2cf9 JL |
1586 | && strcasecmp (start, "exreg0") == 0) |
1587 | { | |
1588 | value |= 0x04; | |
1589 | *input_line_pointer = c; | |
1590 | } | |
0a727238 | 1591 | else if (HAVE_AM33 |
85cb2cf9 JL |
1592 | && strcasecmp (start, "exreg1") == 0) |
1593 | { | |
1594 | value |= 0x02; | |
1595 | *input_line_pointer = c; | |
1596 | } | |
0a727238 | 1597 | else if (HAVE_AM33 |
85cb2cf9 JL |
1598 | && strcasecmp (start, "exother") == 0) |
1599 | { | |
1600 | value |= 0x01; | |
1601 | *input_line_pointer = c; | |
1602 | } | |
0a727238 | 1603 | else if (HAVE_AM33 |
85cb2cf9 JL |
1604 | && strcasecmp (start, "all") == 0) |
1605 | { | |
1606 | value |= 0xff; | |
1607 | *input_line_pointer = c; | |
1608 | } | |
252b5132 RH |
1609 | else |
1610 | { | |
1611 | input_line_pointer = hold; | |
1612 | str = hold; | |
1613 | goto error; | |
1614 | } | |
1615 | } | |
1616 | input_line_pointer++; | |
603b7257 NC |
1617 | mn10300_insert_operand (& insn, & extension, operand, |
1618 | value, NULL, 0, 0); | |
252b5132 RH |
1619 | goto keep_going; |
1620 | ||
1621 | } | |
1622 | else if (data_register_name (&ex)) | |
1623 | { | |
1624 | input_line_pointer = hold; | |
1625 | str = hold; | |
1626 | goto error; | |
1627 | } | |
1628 | else if (address_register_name (&ex)) | |
1629 | { | |
1630 | input_line_pointer = hold; | |
1631 | str = hold; | |
1632 | goto error; | |
1633 | } | |
1634 | else if (other_register_name (&ex)) | |
1635 | { | |
1636 | input_line_pointer = hold; | |
1637 | str = hold; | |
1638 | goto error; | |
1639 | } | |
0a727238 | 1640 | else if (HAVE_AM33 && r_register_name (&ex)) |
85cb2cf9 JL |
1641 | { |
1642 | input_line_pointer = hold; | |
1643 | str = hold; | |
1644 | goto error; | |
1645 | } | |
0a727238 | 1646 | else if (HAVE_AM33 && xr_register_name (&ex)) |
85cb2cf9 JL |
1647 | { |
1648 | input_line_pointer = hold; | |
1649 | str = hold; | |
1650 | goto error; | |
1651 | } | |
e7b71525 AO |
1652 | else if (HAVE_AM33_2 && float_register_name (&ex)) |
1653 | { | |
1654 | input_line_pointer = hold; | |
1655 | str = hold; | |
1656 | goto error; | |
1657 | } | |
1658 | else if (HAVE_AM33_2 && double_register_name (&ex)) | |
1659 | { | |
1660 | input_line_pointer = hold; | |
1661 | str = hold; | |
1662 | goto error; | |
1663 | } | |
252b5132 RH |
1664 | else if (*str == ')' || *str == '(') |
1665 | { | |
1666 | input_line_pointer = hold; | |
1667 | str = hold; | |
1668 | goto error; | |
1669 | } | |
1670 | else | |
1671 | { | |
1672 | expression (&ex); | |
1673 | } | |
1674 | ||
87271fa6 | 1675 | switch (ex.X_op) |
252b5132 RH |
1676 | { |
1677 | case O_illegal: | |
1678 | errmsg = _("illegal operand"); | |
1679 | goto error; | |
1680 | case O_absent: | |
1681 | errmsg = _("missing operand"); | |
1682 | goto error; | |
1683 | case O_register: | |
1684 | { | |
1685 | int mask; | |
1686 | ||
1687 | mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; | |
0a727238 AO |
1688 | if (HAVE_AM33) |
1689 | mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG; | |
e7b71525 AO |
1690 | if (HAVE_AM33_2) |
1691 | mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG; | |
252b5132 RH |
1692 | if ((operand->flags & mask) == 0) |
1693 | { | |
1694 | input_line_pointer = hold; | |
1695 | str = hold; | |
1696 | goto error; | |
1697 | } | |
87271fa6 | 1698 | |
252b5132 RH |
1699 | if (opcode->format == FMT_D1 || opcode->format == FMT_S1) |
1700 | extra_shift = 8; | |
1701 | else if (opcode->format == FMT_D2 | |
1702 | || opcode->format == FMT_D4 | |
1703 | || opcode->format == FMT_S2 | |
1704 | || opcode->format == FMT_S4 | |
1705 | || opcode->format == FMT_S6 | |
1706 | || opcode->format == FMT_D5) | |
1707 | extra_shift = 16; | |
85cb2cf9 JL |
1708 | else if (opcode->format == FMT_D7) |
1709 | extra_shift = 8; | |
1710 | else if (opcode->format == FMT_D8 || opcode->format == FMT_D9) | |
1711 | extra_shift = 8; | |
252b5132 RH |
1712 | else |
1713 | extra_shift = 0; | |
87271fa6 | 1714 | |
603b7257 NC |
1715 | mn10300_insert_operand (& insn, & extension, operand, |
1716 | ex.X_add_number, NULL, | |
252b5132 RH |
1717 | 0, extra_shift); |
1718 | ||
252b5132 RH |
1719 | /* And note the register number in the register array. */ |
1720 | mn10300_reg_operands[op_idx - 1] = ex.X_add_number; | |
1721 | break; | |
1722 | } | |
1723 | ||
1724 | case O_constant: | |
1725 | /* If this operand can be promoted, and it doesn't | |
1726 | fit into the allocated bitfield for this insn, | |
1727 | then promote it (ie this opcode does not match). */ | |
1728 | if (operand->flags | |
1729 | & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) | |
603b7257 | 1730 | && !check_operand (operand, ex.X_add_number)) |
252b5132 RH |
1731 | { |
1732 | input_line_pointer = hold; | |
1733 | str = hold; | |
1734 | goto error; | |
1735 | } | |
1736 | ||
603b7257 NC |
1737 | mn10300_insert_operand (& insn, & extension, operand, |
1738 | ex.X_add_number, NULL, 0, 0); | |
252b5132 RH |
1739 | break; |
1740 | ||
1741 | default: | |
1742 | /* If this operand can be promoted, then this opcode didn't | |
1743 | match since we can't know if it needed promotion! */ | |
1744 | if (operand->flags & MN10300_OPERAND_PROMOTE) | |
1745 | { | |
1746 | input_line_pointer = hold; | |
1747 | str = hold; | |
1748 | goto error; | |
1749 | } | |
1750 | ||
1751 | /* We need to generate a fixup for this expression. */ | |
1752 | if (fc >= MAX_INSN_FIXUPS) | |
1753 | as_fatal (_("too many fixups")); | |
1754 | fixups[fc].exp = ex; | |
1755 | fixups[fc].opindex = *opindex_ptr; | |
1756 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
bf6f0d0c AO |
1757 | if (mn10300_check_fixup (& fixups[fc])) |
1758 | goto error; | |
252b5132 RH |
1759 | ++fc; |
1760 | break; | |
1761 | } | |
1762 | ||
1763 | keep_going: | |
1764 | str = input_line_pointer; | |
1765 | input_line_pointer = hold; | |
1766 | ||
1767 | while (*str == ' ' || *str == ',') | |
1768 | ++str; | |
252b5132 RH |
1769 | } |
1770 | ||
1771 | /* Make sure we used all the operands! */ | |
1772 | if (*str != ',') | |
1773 | match = 1; | |
1774 | ||
1775 | /* If this instruction has registers that must not match, verify | |
1776 | that they do indeed not match. */ | |
1777 | if (opcode->no_match_operands) | |
1778 | { | |
252b5132 RH |
1779 | /* Look at each operand to see if it's marked. */ |
1780 | for (i = 0; i < MN10300_MAX_OPERANDS; i++) | |
1781 | { | |
1782 | if ((1 << i) & opcode->no_match_operands) | |
1783 | { | |
1784 | int j; | |
1785 | ||
1786 | /* operand I is marked. Check that it does not match any | |
1787 | operands > I which are marked. */ | |
1788 | for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) | |
1789 | { | |
1790 | if (((1 << j) & opcode->no_match_operands) | |
1791 | && mn10300_reg_operands[i] == mn10300_reg_operands[j]) | |
1792 | { | |
1793 | errmsg = _("Invalid register specification."); | |
1794 | match = 0; | |
1795 | goto error; | |
1796 | } | |
1797 | } | |
1798 | } | |
1799 | } | |
1800 | } | |
1801 | ||
1802 | error: | |
1803 | if (match == 0) | |
87271fa6 | 1804 | { |
252b5132 | 1805 | next_opcode = opcode + 1; |
87271fa6 | 1806 | if (!strcmp (next_opcode->name, opcode->name)) |
252b5132 RH |
1807 | { |
1808 | opcode = next_opcode; | |
1809 | continue; | |
1810 | } | |
87271fa6 | 1811 | |
252b5132 RH |
1812 | as_bad ("%s", errmsg); |
1813 | return; | |
87271fa6 | 1814 | } |
252b5132 RH |
1815 | break; |
1816 | } | |
87271fa6 | 1817 | |
3882b010 | 1818 | while (ISSPACE (*str)) |
252b5132 RH |
1819 | ++str; |
1820 | ||
1821 | if (*str != '\0') | |
1822 | as_bad (_("junk at end of line: `%s'"), str); | |
1823 | ||
1824 | input_line_pointer = str; | |
1825 | ||
1826 | /* Determine the size of the instruction. */ | |
1827 | if (opcode->format == FMT_S0) | |
1828 | size = 1; | |
1829 | ||
1830 | if (opcode->format == FMT_S1 || opcode->format == FMT_D0) | |
1831 | size = 2; | |
1832 | ||
1833 | if (opcode->format == FMT_S2 || opcode->format == FMT_D1) | |
1834 | size = 3; | |
1835 | ||
85cb2cf9 JL |
1836 | if (opcode->format == FMT_D6) |
1837 | size = 3; | |
1838 | ||
1839 | if (opcode->format == FMT_D7 || opcode->format == FMT_D10) | |
1840 | size = 4; | |
1841 | ||
1842 | if (opcode->format == FMT_D8) | |
1843 | size = 6; | |
1844 | ||
1845 | if (opcode->format == FMT_D9) | |
1846 | size = 7; | |
252b5132 RH |
1847 | |
1848 | if (opcode->format == FMT_S4) | |
1849 | size = 5; | |
1850 | ||
1851 | if (opcode->format == FMT_S6 || opcode->format == FMT_D5) | |
1852 | size = 7; | |
1853 | ||
1854 | if (opcode->format == FMT_D2) | |
1855 | size = 4; | |
1856 | ||
e7b71525 AO |
1857 | if (opcode->format == FMT_D3) |
1858 | size = 5; | |
1859 | ||
252b5132 RH |
1860 | if (opcode->format == FMT_D4) |
1861 | size = 6; | |
1862 | ||
1863 | if (relaxable && fc > 0) | |
1864 | { | |
8ad7c533 NC |
1865 | /* On a 64-bit host the size of an 'int' is not the same |
1866 | as the size of a pointer, so we need a union to convert | |
1867 | the opindex field of the fr_cgen structure into a char * | |
1868 | so that it can be stored in the frag. We do not have | |
1869 | to worry about loosing accuracy as we are not going to | |
1870 | be even close to the 32bit limit of the int. */ | |
1871 | union | |
1872 | { | |
1873 | int opindex; | |
1874 | char * ptr; | |
1875 | } | |
1876 | opindex_converter; | |
252b5132 RH |
1877 | int type; |
1878 | ||
076dc439 AO |
1879 | /* We want to anchor the line info to the previous frag (if |
1880 | there isn't one, create it), so that, when the insn is | |
1881 | resized, we still get the right address for the beginning of | |
1882 | the region. */ | |
1883 | f = frag_more (0); | |
1884 | dwarf2_emit_insn (0); | |
1885 | ||
87271fa6 | 1886 | /* bCC */ |
252b5132 RH |
1887 | if (size == 2) |
1888 | { | |
1889 | /* Handle bra specially. Basically treat it like jmp so | |
1890 | that we automatically handle 8, 16 and 32 bit offsets | |
1891 | correctly as well as jumps to an undefined address. | |
1892 | ||
1893 | It is also important to not treat it like other bCC | |
1894 | instructions since the long forms of bra is different | |
1895 | from other bCC instructions. */ | |
1896 | if (opcode->opcode == 0xca00) | |
1897 | type = 10; | |
1898 | else | |
1899 | type = 0; | |
1900 | } | |
87271fa6 | 1901 | /* call */ |
252b5132 | 1902 | else if (size == 5) |
87271fa6 NC |
1903 | type = 6; |
1904 | /* calls */ | |
252b5132 RH |
1905 | else if (size == 4) |
1906 | type = 8; | |
87271fa6 | 1907 | /* jmp */ |
252b5132 RH |
1908 | else if (size == 3 && opcode->opcode == 0xcc0000) |
1909 | type = 10; | |
e7b71525 AO |
1910 | else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000) |
1911 | type = 13; | |
87271fa6 | 1912 | /* bCC (uncommon cases) */ |
252b5132 RH |
1913 | else |
1914 | type = 3; | |
1915 | ||
8ad7c533 | 1916 | opindex_converter.opindex = fixups[0].opindex; |
252b5132 RH |
1917 | f = frag_var (rs_machine_dependent, 8, 8 - size, type, |
1918 | fixups[0].exp.X_add_symbol, | |
1919 | fixups[0].exp.X_add_number, | |
8ad7c533 | 1920 | opindex_converter.ptr); |
87271fa6 | 1921 | |
252b5132 RH |
1922 | /* This is pretty hokey. We basically just care about the |
1923 | opcode, so we have to write out the first word big endian. | |
1924 | ||
1925 | The exception is "call", which has two operands that we | |
1926 | care about. | |
1927 | ||
1928 | The first operand (the register list) happens to be in the | |
1929 | first instruction word, and will be in the right place if | |
1930 | we output the first word in big endian mode. | |
1931 | ||
1932 | The second operand (stack size) is in the extension word, | |
1933 | and we want it to appear as the first character in the extension | |
1934 | word (as it appears in memory). Luckily, writing the extension | |
1935 | word in big endian format will do what we want. */ | |
1936 | number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); | |
1937 | if (size > 8) | |
1938 | { | |
1939 | number_to_chars_bigendian (f + 4, extension, 4); | |
1940 | number_to_chars_bigendian (f + 8, 0, size - 8); | |
1941 | } | |
1942 | else if (size > 4) | |
1943 | number_to_chars_bigendian (f + 4, extension, size - 4); | |
1944 | } | |
1945 | else | |
1946 | { | |
1947 | /* Allocate space for the instruction. */ | |
1948 | f = frag_more (size); | |
1949 | ||
1950 | /* Fill in bytes for the instruction. Note that opcode fields | |
1951 | are written big-endian, 16 & 32bit immediates are written | |
1952 | little endian. Egad. */ | |
1953 | if (opcode->format == FMT_S0 | |
1954 | || opcode->format == FMT_S1 | |
1955 | || opcode->format == FMT_D0 | |
85cb2cf9 JL |
1956 | || opcode->format == FMT_D6 |
1957 | || opcode->format == FMT_D7 | |
1958 | || opcode->format == FMT_D10 | |
252b5132 RH |
1959 | || opcode->format == FMT_D1) |
1960 | { | |
1961 | number_to_chars_bigendian (f, insn, size); | |
1962 | } | |
1963 | else if (opcode->format == FMT_S2 | |
1964 | && opcode->opcode != 0xdf0000 | |
1965 | && opcode->opcode != 0xde0000) | |
1966 | { | |
1967 | /* A format S2 instruction that is _not_ "ret" and "retf". */ | |
1968 | number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); | |
1969 | number_to_chars_littleendian (f + 1, insn & 0xffff, 2); | |
1970 | } | |
1971 | else if (opcode->format == FMT_S2) | |
1972 | { | |
1973 | /* This must be a ret or retf, which is written entirely in | |
1974 | big-endian format. */ | |
1975 | number_to_chars_bigendian (f, insn, 3); | |
1976 | } | |
1977 | else if (opcode->format == FMT_S4 | |
1978 | && opcode->opcode != 0xdc000000) | |
1979 | { | |
1980 | /* This must be a format S4 "call" instruction. What a pain. */ | |
1981 | unsigned long temp = (insn >> 8) & 0xffff; | |
1982 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1983 | number_to_chars_littleendian (f + 1, temp, 2); | |
1984 | number_to_chars_bigendian (f + 3, insn & 0xff, 1); | |
1985 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
1986 | } | |
1987 | else if (opcode->format == FMT_S4) | |
1988 | { | |
1989 | /* This must be a format S4 "jmp" instruction. */ | |
1990 | unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); | |
1991 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1992 | number_to_chars_littleendian (f + 1, temp, 4); | |
1993 | } | |
1994 | else if (opcode->format == FMT_S6) | |
1995 | { | |
1996 | unsigned long temp = ((insn & 0xffffff) << 8) | |
1997 | | ((extension >> 16) & 0xff); | |
1998 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1999 | number_to_chars_littleendian (f + 1, temp, 4); | |
2000 | number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); | |
2001 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
2002 | } | |
2003 | else if (opcode->format == FMT_D2 | |
2004 | && opcode->opcode != 0xfaf80000 | |
2005 | && opcode->opcode != 0xfaf00000 | |
2006 | && opcode->opcode != 0xfaf40000) | |
2007 | { | |
2008 | /* A format D2 instruction where the 16bit immediate is | |
2009 | really a single 16bit value, not two 8bit values. */ | |
2010 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
2011 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
2012 | } | |
2013 | else if (opcode->format == FMT_D2) | |
2014 | { | |
2015 | /* A format D2 instruction where the 16bit immediate | |
2016 | is really two 8bit immediates. */ | |
2017 | number_to_chars_bigendian (f, insn, 4); | |
2018 | } | |
e7b71525 AO |
2019 | else if (opcode->format == FMT_D3) |
2020 | { | |
2021 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
2022 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
2023 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
2024 | } | |
252b5132 RH |
2025 | else if (opcode->format == FMT_D4) |
2026 | { | |
2027 | unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); | |
87271fa6 | 2028 | |
252b5132 RH |
2029 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
2030 | number_to_chars_littleendian (f + 2, temp, 4); | |
2031 | } | |
2032 | else if (opcode->format == FMT_D5) | |
2033 | { | |
87271fa6 NC |
2034 | unsigned long temp = (((insn & 0xffff) << 16) |
2035 | | ((extension >> 8) & 0xffff)); | |
2036 | ||
252b5132 RH |
2037 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
2038 | number_to_chars_littleendian (f + 2, temp, 4); | |
2039 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
2040 | } | |
85cb2cf9 JL |
2041 | else if (opcode->format == FMT_D8) |
2042 | { | |
87271fa6 NC |
2043 | unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff); |
2044 | ||
2045 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
2046 | number_to_chars_bigendian (f + 3, (temp & 0xff), 1); | |
2047 | number_to_chars_littleendian (f + 4, temp >> 8, 2); | |
85cb2cf9 JL |
2048 | } |
2049 | else if (opcode->format == FMT_D9) | |
2050 | { | |
87271fa6 NC |
2051 | unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff); |
2052 | ||
2053 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
2054 | number_to_chars_littleendian (f + 3, temp, 4); | |
85cb2cf9 | 2055 | } |
252b5132 RH |
2056 | |
2057 | /* Create any fixups. */ | |
2058 | for (i = 0; i < fc; i++) | |
2059 | { | |
2060 | const struct mn10300_operand *operand; | |
91d6fa6a | 2061 | int reloc_size; |
252b5132 RH |
2062 | |
2063 | operand = &mn10300_operands[fixups[i].opindex]; | |
bf6f0d0c AO |
2064 | if (fixups[i].reloc != BFD_RELOC_UNUSED |
2065 | && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL | |
2066 | && fixups[i].reloc != BFD_RELOC_32_GOTOFF | |
2067 | && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL | |
0a22ae8e NC |
2068 | && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD |
2069 | && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD | |
2070 | && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO | |
2071 | && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE | |
2072 | && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE | |
2073 | && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE | |
bf6f0d0c | 2074 | && fixups[i].reloc != BFD_RELOC_MN10300_GOT32) |
252b5132 RH |
2075 | { |
2076 | reloc_howto_type *reloc_howto; | |
252b5132 | 2077 | int offset; |
252b5132 | 2078 | |
87271fa6 NC |
2079 | reloc_howto = bfd_reloc_type_lookup (stdoutput, |
2080 | fixups[i].reloc); | |
252b5132 RH |
2081 | |
2082 | if (!reloc_howto) | |
87271fa6 NC |
2083 | abort (); |
2084 | ||
91d6fa6a | 2085 | reloc_size = bfd_get_reloc_size (reloc_howto); |
252b5132 | 2086 | |
91d6fa6a | 2087 | if (reloc_size < 1 || reloc_size > 4) |
87271fa6 | 2088 | abort (); |
252b5132 RH |
2089 | |
2090 | offset = 4 - size; | |
87975d2a AM |
2091 | fix_new_exp (frag_now, f - frag_now->fr_literal + offset, |
2092 | reloc_size, &fixups[i].exp, | |
2093 | reloc_howto->pc_relative, | |
2094 | fixups[i].reloc); | |
252b5132 RH |
2095 | } |
2096 | else | |
2097 | { | |
91d6fa6a | 2098 | int reloc, pcrel, offset; |
252b5132 RH |
2099 | fixS *fixP; |
2100 | ||
2101 | reloc = BFD_RELOC_NONE; | |
bf6f0d0c AO |
2102 | if (fixups[i].reloc != BFD_RELOC_UNUSED) |
2103 | reloc = fixups[i].reloc; | |
252b5132 RH |
2104 | /* How big is the reloc? Remember SPLIT relocs are |
2105 | implicitly 32bits. */ | |
2106 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
2107 | reloc_size = 32; | |
85cb2cf9 JL |
2108 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) |
2109 | reloc_size = 24; | |
252b5132 RH |
2110 | else |
2111 | reloc_size = operand->bits; | |
2112 | ||
2113 | /* Is the reloc pc-relative? */ | |
2114 | pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; | |
bf6f0d0c AO |
2115 | if (reloc != BFD_RELOC_NONE) |
2116 | pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative; | |
252b5132 | 2117 | |
a7c92dae | 2118 | offset = size - (reloc_size + operand->shift) / 8; |
eb0dfd58 | 2119 | |
252b5132 | 2120 | /* Choose a proper BFD relocation type. */ |
bf6f0d0c AO |
2121 | if (reloc != BFD_RELOC_NONE) |
2122 | ; | |
2123 | else if (pcrel) | |
252b5132 RH |
2124 | { |
2125 | if (reloc_size == 32) | |
2126 | reloc = BFD_RELOC_32_PCREL; | |
2127 | else if (reloc_size == 16) | |
2128 | reloc = BFD_RELOC_16_PCREL; | |
2129 | else if (reloc_size == 8) | |
2130 | reloc = BFD_RELOC_8_PCREL; | |
2131 | else | |
2132 | abort (); | |
2133 | } | |
2134 | else | |
2135 | { | |
2136 | if (reloc_size == 32) | |
2137 | reloc = BFD_RELOC_32; | |
2138 | else if (reloc_size == 16) | |
2139 | reloc = BFD_RELOC_16; | |
2140 | else if (reloc_size == 8) | |
2141 | reloc = BFD_RELOC_8; | |
2142 | else | |
2143 | abort (); | |
2144 | } | |
2145 | ||
252b5132 | 2146 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, |
acb02403 | 2147 | reloc_size / 8, &fixups[i].exp, pcrel, |
252b5132 RH |
2148 | ((bfd_reloc_code_real_type) reloc)); |
2149 | ||
2150 | if (pcrel) | |
2151 | fixP->fx_offset += offset; | |
2152 | } | |
2153 | } | |
e8b1cae5 | 2154 | |
076dc439 AO |
2155 | dwarf2_emit_insn (size); |
2156 | } | |
bfff1642 NC |
2157 | |
2158 | /* Label this frag as one that contains instructions. */ | |
2159 | frag_now->tc_frag_data = TRUE; | |
252b5132 RH |
2160 | } |
2161 | ||
87271fa6 NC |
2162 | /* If while processing a fixup, a reloc really needs to be created |
2163 | then it is done here. */ | |
252b5132 | 2164 | |
bfff1642 | 2165 | arelent ** |
603b7257 | 2166 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 | 2167 | { |
bfff1642 NC |
2168 | static arelent * no_relocs = NULL; |
2169 | static arelent * relocs[MAX_RELOC_EXPANSION + 1]; | |
252b5132 | 2170 | arelent *reloc; |
bfff1642 | 2171 | |
603b7257 | 2172 | reloc = xmalloc (sizeof (arelent)); |
252b5132 RH |
2173 | |
2174 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
603b7257 | 2175 | if (reloc->howto == NULL) |
252b5132 RH |
2176 | { |
2177 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
87271fa6 NC |
2178 | _("reloc %d not supported by object file format"), |
2179 | (int) fixp->fx_r_type); | |
bfff1642 NC |
2180 | free (reloc); |
2181 | return & no_relocs; | |
252b5132 | 2182 | } |
bfff1642 | 2183 | |
252b5132 | 2184 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
bfff1642 NC |
2185 | relocs[0] = reloc; |
2186 | relocs[1] = NULL; | |
252b5132 | 2187 | |
bf6f0d0c AO |
2188 | if (fixp->fx_subsy |
2189 | && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) | |
2190 | { | |
2191 | fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy); | |
603b7257 | 2192 | fixp->fx_subsy = NULL; |
bf6f0d0c AO |
2193 | } |
2194 | ||
252b5132 RH |
2195 | if (fixp->fx_addsy && fixp->fx_subsy) |
2196 | { | |
569006e5 NC |
2197 | asection *asec, *ssec; |
2198 | ||
2199 | asec = S_GET_SEGMENT (fixp->fx_addsy); | |
2200 | ssec = S_GET_SEGMENT (fixp->fx_subsy); | |
2201 | ||
bfff1642 NC |
2202 | /* If we have a difference between two (non-absolute) symbols we must |
2203 | generate two relocs (one for each symbol) and allow the linker to | |
2204 | resolve them - relaxation may change the distances between symbols, | |
569006e5 NC |
2205 | even local symbols defined in the same section. */ |
2206 | if (ssec != absolute_section || asec != absolute_section) | |
4e75439a | 2207 | { |
bfff1642 | 2208 | arelent * reloc2 = xmalloc (sizeof * reloc); |
4e75439a | 2209 | |
bfff1642 NC |
2210 | relocs[0] = reloc2; |
2211 | relocs[1] = reloc; | |
5d6255fe | 2212 | |
bfff1642 NC |
2213 | reloc2->address = reloc->address; |
2214 | reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF); | |
2215 | reloc2->addend = - S_GET_VALUE (fixp->fx_subsy); | |
2216 | reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
2217 | *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); | |
4e75439a | 2218 | |
bfff1642 | 2219 | reloc->addend = fixp->fx_offset; |
569006e5 | 2220 | if (asec == absolute_section) |
57b3551e AM |
2221 | { |
2222 | reloc->addend += S_GET_VALUE (fixp->fx_addsy); | |
2223 | reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; | |
2224 | } | |
2225 | else | |
2226 | { | |
2227 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
2228 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
2229 | } | |
4e75439a | 2230 | |
bfff1642 NC |
2231 | fixp->fx_pcrel = 0; |
2232 | fixp->fx_done = 1; | |
2233 | return relocs; | |
4e75439a | 2234 | } |
6e22e505 AO |
2235 | else |
2236 | { | |
2237 | char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal; | |
2238 | ||
2239 | reloc->addend = (S_GET_VALUE (fixp->fx_addsy) | |
2240 | - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); | |
2241 | ||
2242 | switch (fixp->fx_r_type) | |
2243 | { | |
2244 | case BFD_RELOC_8: | |
2245 | md_number_to_chars (fixpos, reloc->addend, 1); | |
2246 | break; | |
5d6255fe | 2247 | |
6e22e505 AO |
2248 | case BFD_RELOC_16: |
2249 | md_number_to_chars (fixpos, reloc->addend, 2); | |
2250 | break; | |
252b5132 | 2251 | |
6e22e505 AO |
2252 | case BFD_RELOC_24: |
2253 | md_number_to_chars (fixpos, reloc->addend, 3); | |
2254 | break; | |
2255 | ||
2256 | case BFD_RELOC_32: | |
2257 | md_number_to_chars (fixpos, reloc->addend, 4); | |
2258 | break; | |
2259 | ||
2260 | default: | |
f592407e AM |
2261 | reloc->sym_ptr_ptr |
2262 | = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr; | |
bfff1642 | 2263 | return relocs; |
6e22e505 | 2264 | } |
6e22e505 | 2265 | |
569006e5 NC |
2266 | free (reloc); |
2267 | return & no_relocs; | |
2268 | } | |
252b5132 | 2269 | } |
87271fa6 | 2270 | else |
252b5132 | 2271 | { |
603b7257 | 2272 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
310b5aa2 | 2273 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
2274 | reloc->addend = fixp->fx_offset; |
2275 | } | |
bfff1642 | 2276 | return relocs; |
252b5132 RH |
2277 | } |
2278 | ||
ca75ed2d NC |
2279 | /* Returns true iff the symbol attached to the frag is at a known location |
2280 | in the given section, (and hence the relocation to it can be relaxed by | |
2281 | the assembler). */ | |
2282 | static inline bfd_boolean | |
2283 | has_known_symbol_location (fragS * fragp, asection * sec) | |
2284 | { | |
2285 | symbolS * sym = fragp->fr_symbol; | |
2286 | ||
2287 | return sym != NULL | |
2288 | && S_IS_DEFINED (sym) | |
2289 | && ! S_IS_WEAK (sym) | |
2290 | && S_GET_SEGMENT (sym) == sec; | |
2291 | } | |
2292 | ||
252b5132 | 2293 | int |
603b7257 | 2294 | md_estimate_size_before_relax (fragS *fragp, asection *seg) |
252b5132 | 2295 | { |
93c2a809 | 2296 | if (fragp->fr_subtype == 6 |
ca75ed2d | 2297 | && ! has_known_symbol_location (fragp, seg)) |
93c2a809 AM |
2298 | fragp->fr_subtype = 7; |
2299 | else if (fragp->fr_subtype == 8 | |
ca75ed2d | 2300 | && ! has_known_symbol_location (fragp, seg)) |
93c2a809 AM |
2301 | fragp->fr_subtype = 9; |
2302 | else if (fragp->fr_subtype == 10 | |
ca75ed2d | 2303 | && ! has_known_symbol_location (fragp, seg)) |
93c2a809 AM |
2304 | fragp->fr_subtype = 12; |
2305 | ||
e7b71525 AO |
2306 | if (fragp->fr_subtype == 13) |
2307 | return 3; | |
ca75ed2d | 2308 | |
93c2a809 AM |
2309 | if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) |
2310 | abort (); | |
2311 | ||
2312 | return md_relax_table[fragp->fr_subtype].rlx_length; | |
87271fa6 | 2313 | } |
252b5132 RH |
2314 | |
2315 | long | |
603b7257 | 2316 | md_pcrel_from (fixS *fixp) |
252b5132 | 2317 | { |
ca75ed2d NC |
2318 | if (fixp->fx_addsy != (symbolS *) NULL |
2319 | && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))) | |
2320 | /* The symbol is undefined or weak. Let the linker figure it out. */ | |
2321 | return 0; | |
2322 | ||
252b5132 | 2323 | return fixp->fx_frag->fr_address + fixp->fx_where; |
252b5132 RH |
2324 | } |
2325 | ||
94f592af | 2326 | void |
603b7257 | 2327 | md_apply_fix (fixS * fixP, valueT * valP, segT seg) |
252b5132 | 2328 | { |
94f592af | 2329 | char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal; |
58a77e41 | 2330 | int size = 0; |
94f592af | 2331 | int value = (int) * valP; |
58a77e41 | 2332 | |
9c2799c2 | 2333 | gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED); |
58a77e41 EC |
2334 | |
2335 | /* This should never happen. */ | |
2336 | if (seg->flags & SEC_ALLOC) | |
94f592af | 2337 | abort (); |
58a77e41 | 2338 | |
c51ce5f0 | 2339 | /* The value we are passed in *valuep includes the symbol values. |
7be1c489 AM |
2340 | If we are doing this relocation the code in write.c is going to |
2341 | call bfd_install_relocation, which is also going to use the symbol | |
2342 | value. That means that if the reloc is fully resolved we want to | |
2343 | use *valuep since bfd_install_relocation is not being used. | |
c51ce5f0 EC |
2344 | |
2345 | However, if the reloc is not fully resolved we do not want to use | |
2346 | *valuep, and must use fx_offset instead. However, if the reloc | |
2347 | is PC relative, we do want to use *valuep since it includes the | |
2348 | result of md_pcrel_from. */ | |
603b7257 | 2349 | if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel) |
94f592af | 2350 | value = fixP->fx_offset; |
c51ce5f0 | 2351 | |
58a77e41 EC |
2352 | /* If the fix is relative to a symbol which is not defined, or not |
2353 | in the same segment as the fix, we cannot resolve it here. */ | |
94f592af NC |
2354 | if (fixP->fx_addsy != NULL |
2355 | && (! S_IS_DEFINED (fixP->fx_addsy) | |
2356 | || (S_GET_SEGMENT (fixP->fx_addsy) != seg))) | |
58a77e41 | 2357 | { |
94f592af NC |
2358 | fixP->fx_done = 0; |
2359 | return; | |
58a77e41 EC |
2360 | } |
2361 | ||
94f592af | 2362 | switch (fixP->fx_r_type) |
58a77e41 EC |
2363 | { |
2364 | case BFD_RELOC_8: | |
96f37af6 | 2365 | case BFD_RELOC_8_PCREL: |
58a77e41 EC |
2366 | size = 1; |
2367 | break; | |
2368 | ||
2369 | case BFD_RELOC_16: | |
96f37af6 | 2370 | case BFD_RELOC_16_PCREL: |
58a77e41 EC |
2371 | size = 2; |
2372 | break; | |
2373 | ||
2374 | case BFD_RELOC_32: | |
96f37af6 | 2375 | case BFD_RELOC_32_PCREL: |
58a77e41 EC |
2376 | size = 4; |
2377 | break; | |
2378 | ||
2379 | case BFD_RELOC_VTABLE_INHERIT: | |
2380 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af NC |
2381 | fixP->fx_done = 0; |
2382 | return; | |
58a77e41 | 2383 | |
569006e5 NC |
2384 | case BFD_RELOC_MN10300_ALIGN: |
2385 | fixP->fx_done = 1; | |
2386 | return; | |
2387 | ||
58a77e41 EC |
2388 | case BFD_RELOC_NONE: |
2389 | default: | |
94f592af NC |
2390 | as_bad_where (fixP->fx_file, fixP->fx_line, |
2391 | _("Bad relocation fixup type (%d)"), fixP->fx_r_type); | |
58a77e41 EC |
2392 | } |
2393 | ||
c51ce5f0 | 2394 | md_number_to_chars (fixpos, value, size); |
58a77e41 | 2395 | |
b653e7f9 | 2396 | /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */ |
94f592af NC |
2397 | if (fixP->fx_addsy == NULL) |
2398 | fixP->fx_done = 1; | |
58a77e41 EC |
2399 | } |
2400 | ||
58a77e41 EC |
2401 | /* Return zero if the fixup in fixp should be left alone and not |
2402 | adjusted. */ | |
2403 | ||
b34976b6 | 2404 | bfd_boolean |
603b7257 | 2405 | mn10300_fix_adjustable (struct fix *fixp) |
58a77e41 | 2406 | { |
bfff1642 NC |
2407 | if (fixp->fx_pcrel) |
2408 | { | |
2409 | if (TC_FORCE_RELOCATION_LOCAL (fixp)) | |
2410 | return FALSE; | |
2411 | } | |
2412 | /* Non-relative relocs can (and must) be adjusted if they do | |
2413 | not meet the criteria below, or the generic criteria. */ | |
2414 | else if (TC_FORCE_RELOCATION (fixp)) | |
603b7257 | 2415 | return FALSE; |
58a77e41 | 2416 | |
7e8f4100 AO |
2417 | /* Do not adjust relocations involving symbols in code sections, |
2418 | because it breaks linker relaxations. This could be fixed in the | |
2419 | linker, but this fix is simpler, and it pretty much only affects | |
2420 | object size a little bit. */ | |
2421 | if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) | |
603b7257 | 2422 | return FALSE; |
7e8f4100 | 2423 | |
53cb0362 DD |
2424 | /* Likewise, do not adjust symbols that won't be merged, or debug |
2425 | symbols, because they too break relaxation. We do want to adjust | |
2426 | other mergable symbols, like .rodata, because code relaxations | |
2427 | need section-relative symbols to properly relax them. */ | |
bfff1642 | 2428 | if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)) |
603b7257 | 2429 | return FALSE; |
bfff1642 | 2430 | |
53cb0362 | 2431 | if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0) |
603b7257 | 2432 | return FALSE; |
252b5132 | 2433 | |
603b7257 | 2434 | return TRUE; |
252b5132 RH |
2435 | } |
2436 | ||
2437 | static void | |
603b7257 | 2438 | set_arch_mach (int mach) |
252b5132 RH |
2439 | { |
2440 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) | |
2441 | as_warn (_("could not set architecture and machine")); | |
2442 | ||
2443 | current_machine = mach; | |
2444 | } | |
bf6f0d0c | 2445 | |
bf6f0d0c | 2446 | static inline char * |
603b7257 | 2447 | mn10300_end_of_match (char *cont, char *what) |
bf6f0d0c AO |
2448 | { |
2449 | int len = strlen (what); | |
2450 | ||
2451 | if (strncmp (cont, what, strlen (what)) == 0 | |
2452 | && ! is_part_of_name (cont[len])) | |
2453 | return cont + len; | |
2454 | ||
2455 | return NULL; | |
2456 | } | |
2457 | ||
2458 | int | |
603b7257 NC |
2459 | mn10300_parse_name (char const *name, |
2460 | expressionS *exprP, | |
2461 | enum expr_mode mode, | |
2462 | char *nextcharP) | |
bf6f0d0c AO |
2463 | { |
2464 | char *next = input_line_pointer; | |
2465 | char *next_end; | |
2466 | int reloc_type; | |
2467 | segT segment; | |
2468 | ||
2469 | exprP->X_op_symbol = NULL; | |
2470 | ||
2471 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
2472 | { | |
2473 | if (! GOT_symbol) | |
2474 | GOT_symbol = symbol_find_or_make (name); | |
2475 | ||
2476 | exprP->X_add_symbol = GOT_symbol; | |
2477 | no_suffix: | |
2478 | /* If we have an absolute symbol or a reg, | |
2479 | then we know its value now. */ | |
2480 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
9497f5ac | 2481 | if (mode != expr_defer && segment == absolute_section) |
bf6f0d0c AO |
2482 | { |
2483 | exprP->X_op = O_constant; | |
2484 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
2485 | exprP->X_add_symbol = NULL; | |
2486 | } | |
9497f5ac | 2487 | else if (mode != expr_defer && segment == reg_section) |
bf6f0d0c AO |
2488 | { |
2489 | exprP->X_op = O_register; | |
2490 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
2491 | exprP->X_add_symbol = NULL; | |
2492 | } | |
2493 | else | |
2494 | { | |
2495 | exprP->X_op = O_symbol; | |
2496 | exprP->X_add_number = 0; | |
2497 | } | |
2498 | ||
2499 | return 1; | |
2500 | } | |
2501 | ||
2502 | exprP->X_add_symbol = symbol_find_or_make (name); | |
2503 | ||
2504 | if (*nextcharP != '@') | |
2505 | goto no_suffix; | |
2506 | else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF"))) | |
2507 | reloc_type = BFD_RELOC_32_GOTOFF; | |
2508 | else if ((next_end = mn10300_end_of_match (next + 1, "GOT"))) | |
2509 | reloc_type = BFD_RELOC_MN10300_GOT32; | |
2510 | else if ((next_end = mn10300_end_of_match (next + 1, "PLT"))) | |
2511 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
0a22ae8e NC |
2512 | else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd"))) |
2513 | reloc_type = BFD_RELOC_MN10300_TLS_GD; | |
2514 | else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm"))) | |
2515 | reloc_type = BFD_RELOC_MN10300_TLS_LD; | |
2516 | else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff"))) | |
2517 | reloc_type = BFD_RELOC_MN10300_TLS_LDO; | |
2518 | else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff"))) | |
2519 | reloc_type = BFD_RELOC_MN10300_TLS_GOTIE; | |
2520 | else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff"))) | |
2521 | reloc_type = BFD_RELOC_MN10300_TLS_IE; | |
2522 | else if ((next_end = mn10300_end_of_match (next + 1, "tpoff"))) | |
2523 | reloc_type = BFD_RELOC_MN10300_TLS_LE; | |
bf6f0d0c AO |
2524 | else |
2525 | goto no_suffix; | |
2526 | ||
2527 | *input_line_pointer = *nextcharP; | |
2528 | input_line_pointer = next_end; | |
2529 | *nextcharP = *input_line_pointer; | |
2530 | *input_line_pointer = '\0'; | |
2531 | ||
2532 | exprP->X_op = O_PIC_reloc; | |
2533 | exprP->X_add_number = 0; | |
2534 | exprP->X_md = reloc_type; | |
2535 | ||
2536 | return 1; | |
2537 | } | |
603b7257 NC |
2538 | |
2539 | /* The target specific pseudo-ops which we support. */ | |
2540 | const pseudo_typeS md_pseudo_table[] = | |
2541 | { | |
2542 | { "am30", set_arch_mach, AM30 }, | |
2543 | { "am33", set_arch_mach, AM33 }, | |
2544 | { "am33_2", set_arch_mach, AM33_2 }, | |
2545 | { "mn10300", set_arch_mach, MN103 }, | |
2546 | {NULL, 0, 0} | |
2547 | }; | |
bfff1642 NC |
2548 | |
2549 | /* Returns FALSE if there is some mn10300 specific reason why the | |
2550 | subtraction of two same-section symbols cannot be computed by | |
2551 | the assembler. */ | |
2552 | ||
2553 | bfd_boolean | |
2554 | mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section) | |
2555 | { | |
2556 | bfd_boolean result; | |
2557 | fragS * left_frag; | |
2558 | fragS * right_frag; | |
2559 | fragS * frag; | |
2560 | ||
2561 | /* If we are not performing linker relaxation then we have nothing | |
2562 | to worry about. */ | |
2563 | if (linkrelax == 0) | |
2564 | return TRUE; | |
2565 | ||
2566 | /* If the symbols are not in a code section then they are OK. */ | |
2567 | if ((section->flags & SEC_CODE) == 0) | |
2568 | return TRUE; | |
2569 | ||
2570 | /* Otherwise we have to scan the fragments between the two symbols. | |
2571 | If any instructions are found then we have to assume that linker | |
2572 | relaxation may change their size and so we must delay resolving | |
2573 | the subtraction until the final link. */ | |
2574 | left_frag = symbol_get_frag (left->X_add_symbol); | |
2575 | right_frag = symbol_get_frag (right->X_add_symbol); | |
2576 | ||
2577 | if (left_frag == right_frag) | |
2578 | return ! left_frag->tc_frag_data; | |
2579 | ||
2580 | result = TRUE; | |
2581 | for (frag = left_frag; frag != NULL; frag = frag->fr_next) | |
2582 | { | |
2583 | if (frag->tc_frag_data) | |
2584 | result = FALSE; | |
2585 | if (frag == right_frag) | |
2586 | break; | |
2587 | } | |
2588 | ||
2589 | if (frag == NULL) | |
2590 | for (frag = right_frag; frag != NULL; frag = frag->fr_next) | |
2591 | { | |
2592 | if (frag->tc_frag_data) | |
2593 | result = FALSE; | |
2594 | if (frag == left_frag) | |
2595 | break; | |
2596 | } | |
2597 | ||
2598 | if (frag == NULL) | |
2599 | /* The two symbols are on disjoint fragment chains | |
2600 | - we cannot possibly compute their difference. */ | |
2601 | return FALSE; | |
2602 | ||
2603 | return result; | |
2604 | } | |
569006e5 NC |
2605 | |
2606 | /* When relaxing, we need to output a reloc for any .align directive | |
2607 | that requests alignment to a two byte boundary or larger. */ | |
2608 | ||
2609 | void | |
2610 | mn10300_handle_align (fragS *frag) | |
2611 | { | |
b5f5fd96 NC |
2612 | if (linkrelax |
2613 | && (frag->fr_type == rs_align | |
2614 | || frag->fr_type == rs_align_code) | |
569006e5 NC |
2615 | && frag->fr_address + frag->fr_fix > 0 |
2616 | && frag->fr_offset > 1 | |
2617 | && now_seg != bss_section | |
2618 | /* Do not create relocs for the merging sections - such | |
2619 | relocs will prevent the contents from being merged. */ | |
2620 | && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0) | |
2621 | /* Create a new fixup to record the alignment request. The symbol is | |
2622 | irrelevent but must be present so we use the absolute section symbol. | |
2623 | The offset from the symbol is used to record the power-of-two alignment | |
2624 | value. The size is set to 0 because the frag may already be aligned, | |
2625 | thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */ | |
2626 | fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE, | |
2627 | BFD_RELOC_MN10300_ALIGN); | |
2628 | } | |
b5f5fd96 NC |
2629 | |
2630 | bfd_boolean | |
2631 | mn10300_force_relocation (struct fix * fixp) | |
2632 | { | |
2633 | if (linkrelax | |
2634 | && (fixp->fx_pcrel | |
2635 | || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN)) | |
2636 | return TRUE; | |
2637 | ||
2638 | return generic_force_reloc (fixp); | |
2639 | } |