* config/tc-m68k.c: Convert to C90. Remove redundant
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
ae6063d4 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
87271fa6 25#include "subsegs.h"
252b5132 26#include "opcode/mn10300.h"
e8b1cae5 27#include "dwarf2dbg.h"
252b5132
RH
28\f
29/* Structure to hold information about predefined registers. */
30struct reg_name
31{
32 const char *name;
33 int value;
34};
35
87271fa6
NC
36/* Generic assembler global variables which must be defined by all
37 targets. */
252b5132 38
87271fa6 39/* Characters which always start a comment. */
252b5132
RH
40const char comment_chars[] = "#";
41
42/* Characters which start a comment at the beginning of a line. */
43const char line_comment_chars[] = ";#";
44
87271fa6 45/* Characters which may be used to separate multiple commands on a
252b5132
RH
46 single line. */
47const char line_separator_chars[] = ";";
48
87271fa6 49/* Characters which are used to indicate an exponent in a floating
252b5132
RH
50 point number. */
51const char EXP_CHARS[] = "eE";
52
87271fa6 53/* Characters which mean that a number is a floating point constant,
252b5132
RH
54 as in 0d1.0. */
55const char FLT_CHARS[] = "dD";
56\f
252b5132 57const relax_typeS md_relax_table[] = {
87271fa6 58 /* bCC relaxing */
252b5132
RH
59 {0x7f, -0x80, 2, 1},
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
62
87271fa6 63 /* bCC relaxing (uncommon cases) */
252b5132
RH
64 {0x7f, -0x80, 3, 4},
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
67
87271fa6 68 /* call relaxing */
252b5132
RH
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
71
87271fa6 72 /* calls relaxing */
252b5132
RH
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
75
87271fa6 76 /* jmp relaxing */
252b5132
RH
77 {0x7f, -0x80, 2, 11},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
80
e7b71525
AO
81 /* fbCC relaxing */
82 {0x7f, -0x80, 3, 14},
83 {0x7fff, -0x8000, 6, 15},
84 {0x7fffffff, -0x80000000, 8, 0},
85
252b5132
RH
86};
87
87271fa6 88/* Local functions. */
252b5132
RH
89static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
90 const struct mn10300_operand *,
91 offsetT, char *, unsigned,
92 unsigned));
93static unsigned long check_operand PARAMS ((unsigned long,
94 const struct mn10300_operand *,
95 offsetT));
96static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
b34976b6
AM
97static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
98static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
99static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
497f322d
AO
100static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
101static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
102static void set_arch_mach PARAMS ((int));
252b5132 103
1485d400
EC
104/* Set linkrelax here to avoid fixups in most sections. */
105int linkrelax = 1;
106
252b5132
RH
107static int current_machine;
108
87271fa6 109/* Fixups. */
252b5132
RH
110#define MAX_INSN_FIXUPS (5)
111struct mn10300_fixup
112{
113 expressionS exp;
114 int opindex;
115 bfd_reloc_code_real_type reloc;
116};
117struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
118static int fc;
119
120/* We must store the value of each register operand so that we can
121 verify that certain registers do not match. */
122int mn10300_reg_operands[MN10300_MAX_OPERANDS];
123\f
124const char *md_shortopts = "";
125struct option md_longopts[] = {
126 {NULL, no_argument, NULL, 0}
127};
87271fa6 128size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
129
130/* The target specific pseudo-ops which we support. */
131const pseudo_typeS md_pseudo_table[] =
132{
0a727238
AO
133 { "am30", set_arch_mach, AM30 },
134 { "am33", set_arch_mach, AM33 },
e7b71525 135 { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
0a727238 136 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
137 {NULL, 0, 0}
138};
139
e7b71525
AO
140#define HAVE_AM33_2 (current_machine == AM33_2)
141#define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
aa15f6f7 142#define HAVE_AM30 (current_machine == AM30)
0a727238 143
252b5132
RH
144/* Opcode hash table. */
145static struct hash_control *mn10300_hash;
146
87271fa6 147/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
148static const struct reg_name data_registers[] =
149{
150 { "d0", 0 },
151 { "d1", 1 },
152 { "d2", 2 },
153 { "d3", 3 },
154};
87271fa6
NC
155#define DATA_REG_NAME_CNT \
156 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
157
158static const struct reg_name address_registers[] =
159{
160 { "a0", 0 },
161 { "a1", 1 },
162 { "a2", 2 },
163 { "a3", 3 },
164};
87271fa6
NC
165
166#define ADDRESS_REG_NAME_CNT \
167 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 168
85cb2cf9
JL
169static const struct reg_name r_registers[] =
170{
171 { "a0", 8 },
172 { "a1", 9 },
173 { "a2", 10 },
174 { "a3", 11 },
175 { "d0", 12 },
176 { "d1", 13 },
177 { "d2", 14 },
178 { "d3", 15 },
179 { "e0", 0 },
180 { "e1", 1 },
181 { "e10", 10 },
182 { "e11", 11 },
183 { "e12", 12 },
184 { "e13", 13 },
185 { "e14", 14 },
186 { "e15", 15 },
187 { "e2", 2 },
188 { "e3", 3 },
189 { "e4", 4 },
190 { "e5", 5 },
191 { "e6", 6 },
192 { "e7", 7 },
193 { "e8", 8 },
194 { "e9", 9 },
195 { "r0", 0 },
196 { "r1", 1 },
197 { "r10", 10 },
198 { "r11", 11 },
199 { "r12", 12 },
200 { "r13", 13 },
201 { "r14", 14 },
202 { "r15", 15 },
203 { "r2", 2 },
204 { "r3", 3 },
205 { "r4", 4 },
206 { "r5", 5 },
207 { "r6", 6 },
208 { "r7", 7 },
209 { "r8", 8 },
210 { "r9", 9 },
211};
87271fa6
NC
212
213#define R_REG_NAME_CNT \
214 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
215
216static const struct reg_name xr_registers[] =
217{
218 { "mcrh", 2 },
219 { "mcrl", 3 },
220 { "mcvf", 4 },
221 { "mdrq", 1 },
222 { "sp", 0 },
223 { "xr0", 0 },
224 { "xr1", 1 },
225 { "xr10", 10 },
226 { "xr11", 11 },
227 { "xr12", 12 },
228 { "xr13", 13 },
229 { "xr14", 14 },
230 { "xr15", 15 },
231 { "xr2", 2 },
232 { "xr3", 3 },
233 { "xr4", 4 },
234 { "xr5", 5 },
235 { "xr6", 6 },
236 { "xr7", 7 },
237 { "xr8", 8 },
238 { "xr9", 9 },
239};
85cb2cf9 240
87271fa6
NC
241#define XR_REG_NAME_CNT \
242 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132 243
913572ec
AO
244/* We abuse the `value' field, that would be otherwise unused, to
245 encode the architecture on which (access to) the register was
246 introduced. FIXME: we should probably warn when we encounter a
247 register name when assembling for an architecture that doesn't
248 support it, before parsing it as a symbol name. */
252b5132
RH
249static const struct reg_name other_registers[] =
250{
913572ec 251 { "epsw", AM33 },
252b5132 252 { "mdr", 0 },
913572ec 253 { "pc", AM33 },
252b5132
RH
254 { "psw", 0 },
255 { "sp", 0 },
256};
87271fa6
NC
257
258#define OTHER_REG_NAME_CNT \
259 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132 260
e7b71525
AO
261static const struct reg_name float_registers[] =
262{
263 { "fs0", 0 },
264 { "fs1", 1 },
265 { "fs10", 10 },
266 { "fs11", 11 },
267 { "fs12", 12 },
268 { "fs13", 13 },
269 { "fs14", 14 },
270 { "fs15", 15 },
271 { "fs16", 16 },
272 { "fs17", 17 },
273 { "fs18", 18 },
274 { "fs19", 19 },
275 { "fs2", 2 },
276 { "fs20", 20 },
277 { "fs21", 21 },
278 { "fs22", 22 },
279 { "fs23", 23 },
280 { "fs24", 24 },
281 { "fs25", 25 },
282 { "fs26", 26 },
283 { "fs27", 27 },
284 { "fs28", 28 },
285 { "fs29", 29 },
286 { "fs3", 3 },
287 { "fs30", 30 },
288 { "fs31", 31 },
289 { "fs4", 4 },
290 { "fs5", 5 },
291 { "fs6", 6 },
292 { "fs7", 7 },
293 { "fs8", 8 },
294 { "fs9", 9 },
295};
296
297#define FLOAT_REG_NAME_CNT \
298 (sizeof (float_registers) / sizeof (struct reg_name))
299
300static const struct reg_name double_registers[] =
301{
302 { "fd0", 0 },
303 { "fd10", 10 },
304 { "fd12", 12 },
305 { "fd14", 14 },
306 { "fd16", 16 },
307 { "fd18", 18 },
308 { "fd2", 2 },
309 { "fd20", 20 },
310 { "fd22", 22 },
311 { "fd24", 24 },
312 { "fd26", 26 },
313 { "fd28", 28 },
314 { "fd30", 30 },
315 { "fd4", 4 },
316 { "fd6", 6 },
317 { "fd8", 8 },
318};
319
320#define DOUBLE_REG_NAME_CNT \
321 (sizeof (double_registers) / sizeof (struct reg_name))
322
323
252b5132
RH
324/* reg_name_search does a binary search of the given register table
325 to see if "name" is a valid regiter name. Returns the register
87271fa6 326 number from the array on success, or -1 on failure. */
252b5132
RH
327
328static int
329reg_name_search (regs, regcount, name)
330 const struct reg_name *regs;
331 int regcount;
332 const char *name;
333{
334 int middle, low, high;
335 int cmp;
336
337 low = 0;
338 high = regcount - 1;
339
340 do
341 {
342 middle = (low + high) / 2;
343 cmp = strcasecmp (name, regs[middle].name);
344 if (cmp < 0)
345 high = middle - 1;
346 else if (cmp > 0)
347 low = middle + 1;
87271fa6
NC
348 else
349 return regs[middle].value;
252b5132
RH
350 }
351 while (low <= high);
352 return -1;
353}
354
85cb2cf9
JL
355/* Summary of register_name().
356 *
357 * in: Input_line_pointer points to 1st char of operand.
358 *
b6ff326e 359 * out: An expressionS.
85cb2cf9
JL
360 * The operand may have been a register: in this case, X_op == O_register,
361 * X_add_number is set to the register number, and truth is returned.
362 * Input_line_pointer->(next non-blank) char after operand, or is in
363 * its original state.
364 */
87271fa6 365
b34976b6 366static bfd_boolean
85cb2cf9
JL
367r_register_name (expressionP)
368 expressionS *expressionP;
369{
370 int reg_number;
371 char *name;
372 char *start;
373 char c;
374
87271fa6 375 /* Find the spelling of the operand. */
85cb2cf9
JL
376 start = name = input_line_pointer;
377
378 c = get_symbol_end ();
379 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
380
468cced8
AM
381 /* Put back the delimiting char. */
382 *input_line_pointer = c;
383
87271fa6
NC
384 /* Look to see if it's in the register table. */
385 if (reg_number >= 0)
85cb2cf9
JL
386 {
387 expressionP->X_op = O_register;
388 expressionP->X_add_number = reg_number;
389
87271fa6 390 /* Make the rest nice. */
85cb2cf9
JL
391 expressionP->X_add_symbol = NULL;
392 expressionP->X_op_symbol = NULL;
87271fa6 393
b34976b6 394 return TRUE;
85cb2cf9 395 }
87271fa6 396
468cced8
AM
397 /* Reset the line as if we had not done anything. */
398 input_line_pointer = start;
b34976b6 399 return FALSE;
85cb2cf9
JL
400}
401
402/* Summary of register_name().
403 *
404 * in: Input_line_pointer points to 1st char of operand.
405 *
b6ff326e 406 * out: An expressionS.
85cb2cf9
JL
407 * The operand may have been a register: in this case, X_op == O_register,
408 * X_add_number is set to the register number, and truth is returned.
409 * Input_line_pointer->(next non-blank) char after operand, or is in
410 * its original state.
411 */
87271fa6 412
b34976b6 413static bfd_boolean
85cb2cf9
JL
414xr_register_name (expressionP)
415 expressionS *expressionP;
416{
417 int reg_number;
418 char *name;
419 char *start;
420 char c;
421
87271fa6 422 /* Find the spelling of the operand. */
85cb2cf9
JL
423 start = name = input_line_pointer;
424
425 c = get_symbol_end ();
426 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
427
468cced8
AM
428 /* Put back the delimiting char. */
429 *input_line_pointer = c;
430
87271fa6
NC
431 /* Look to see if it's in the register table. */
432 if (reg_number >= 0)
85cb2cf9
JL
433 {
434 expressionP->X_op = O_register;
435 expressionP->X_add_number = reg_number;
436
87271fa6 437 /* Make the rest nice. */
85cb2cf9
JL
438 expressionP->X_add_symbol = NULL;
439 expressionP->X_op_symbol = NULL;
87271fa6 440
b34976b6 441 return TRUE;
85cb2cf9 442 }
87271fa6 443
468cced8
AM
444 /* Reset the line as if we had not done anything. */
445 input_line_pointer = start;
b34976b6 446 return FALSE;
85cb2cf9 447}
252b5132
RH
448
449/* Summary of register_name().
450 *
451 * in: Input_line_pointer points to 1st char of operand.
452 *
b6ff326e 453 * out: An expressionS.
252b5132
RH
454 * The operand may have been a register: in this case, X_op == O_register,
455 * X_add_number is set to the register number, and truth is returned.
456 * Input_line_pointer->(next non-blank) char after operand, or is in
457 * its original state.
458 */
87271fa6 459
b34976b6 460static bfd_boolean
252b5132
RH
461data_register_name (expressionP)
462 expressionS *expressionP;
463{
464 int reg_number;
465 char *name;
466 char *start;
467 char c;
468
87271fa6 469 /* Find the spelling of the operand. */
252b5132
RH
470 start = name = input_line_pointer;
471
472 c = get_symbol_end ();
473 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
474
468cced8
AM
475 /* Put back the delimiting char. */
476 *input_line_pointer = c;
477
87271fa6
NC
478 /* Look to see if it's in the register table. */
479 if (reg_number >= 0)
252b5132
RH
480 {
481 expressionP->X_op = O_register;
482 expressionP->X_add_number = reg_number;
483
87271fa6 484 /* Make the rest nice. */
252b5132
RH
485 expressionP->X_add_symbol = NULL;
486 expressionP->X_op_symbol = NULL;
87271fa6 487
b34976b6 488 return TRUE;
252b5132 489 }
87271fa6 490
468cced8
AM
491 /* Reset the line as if we had not done anything. */
492 input_line_pointer = start;
b34976b6 493 return FALSE;
252b5132
RH
494}
495
496/* Summary of register_name().
497 *
498 * in: Input_line_pointer points to 1st char of operand.
499 *
b6ff326e 500 * out: An expressionS.
252b5132
RH
501 * The operand may have been a register: in this case, X_op == O_register,
502 * X_add_number is set to the register number, and truth is returned.
503 * Input_line_pointer->(next non-blank) char after operand, or is in
504 * its original state.
505 */
87271fa6 506
b34976b6 507static bfd_boolean
252b5132
RH
508address_register_name (expressionP)
509 expressionS *expressionP;
510{
511 int reg_number;
512 char *name;
513 char *start;
514 char c;
515
87271fa6 516 /* Find the spelling of the operand. */
252b5132
RH
517 start = name = input_line_pointer;
518
519 c = get_symbol_end ();
520 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
521
468cced8
AM
522 /* Put back the delimiting char. */
523 *input_line_pointer = c;
524
87271fa6
NC
525 /* Look to see if it's in the register table. */
526 if (reg_number >= 0)
252b5132
RH
527 {
528 expressionP->X_op = O_register;
529 expressionP->X_add_number = reg_number;
530
87271fa6 531 /* Make the rest nice. */
252b5132
RH
532 expressionP->X_add_symbol = NULL;
533 expressionP->X_op_symbol = NULL;
87271fa6 534
b34976b6 535 return TRUE;
252b5132 536 }
87271fa6 537
468cced8
AM
538 /* Reset the line as if we had not done anything. */
539 input_line_pointer = start;
b34976b6 540 return FALSE;
252b5132
RH
541}
542
543/* Summary of register_name().
544 *
545 * in: Input_line_pointer points to 1st char of operand.
546 *
b6ff326e 547 * out: An expressionS.
252b5132
RH
548 * The operand may have been a register: in this case, X_op == O_register,
549 * X_add_number is set to the register number, and truth is returned.
550 * Input_line_pointer->(next non-blank) char after operand, or is in
551 * its original state.
552 */
87271fa6 553
b34976b6 554static bfd_boolean
252b5132
RH
555other_register_name (expressionP)
556 expressionS *expressionP;
557{
558 int reg_number;
559 char *name;
560 char *start;
561 char c;
562
87271fa6 563 /* Find the spelling of the operand. */
252b5132
RH
564 start = name = input_line_pointer;
565
566 c = get_symbol_end ();
567 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
568
468cced8
AM
569 /* Put back the delimiting char. */
570 *input_line_pointer = c;
571
87271fa6 572 /* Look to see if it's in the register table. */
913572ec
AO
573 if (reg_number == 0
574 || (reg_number == AM33 && HAVE_AM33))
252b5132
RH
575 {
576 expressionP->X_op = O_register;
913572ec 577 expressionP->X_add_number = 0;
252b5132 578
87271fa6 579 /* Make the rest nice. */
252b5132
RH
580 expressionP->X_add_symbol = NULL;
581 expressionP->X_op_symbol = NULL;
87271fa6 582
b34976b6 583 return TRUE;
252b5132 584 }
87271fa6 585
468cced8
AM
586 /* Reset the line as if we had not done anything. */
587 input_line_pointer = start;
b34976b6 588 return FALSE;
252b5132
RH
589}
590
e7b71525
AO
591static bfd_boolean double_register_name PARAMS ((expressionS *));
592static bfd_boolean float_register_name PARAMS ((expressionS *));
593
594/* Summary of float_register_name:
595
596 in: Input_line_pointer points to 1st char of operand.
597
598 out: A expressionS.
599 The operand may have been a register: in this case, X_op == O_register,
600 X_add_number is set to the register number, and truth is returned.
601 Input_line_pointer->(next non-blank) char after operand, or is in
602 its original state. */
603
604static bfd_boolean
605float_register_name (expressionP)
606 expressionS *expressionP;
607{
608 int reg_number;
609 char *name;
610 char *start;
611 char c;
612
613 /* Find the spelling of the operand. */
614 start = name = input_line_pointer;
615
616 c = get_symbol_end ();
617 reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
618
619 /* Put back the delimiting char. */
620 * input_line_pointer = c;
621
622 /* Look to see if it's in the register table. */
623 if (reg_number >= 0)
624 {
625 expressionP->X_op = O_register;
626 expressionP->X_add_number = reg_number;
627
628 /* Make the rest nice. */
629 expressionP->X_add_symbol = NULL;
630 expressionP->X_op_symbol = NULL;
631
632 return TRUE;
633 }
634
635 /* Reset the line as if we had not done anything. */
636 input_line_pointer = start;
637 return FALSE;
638}
639
640/* Summary of double_register_name:
641
642 in: Input_line_pointer points to 1st char of operand.
643
644 out: A expressionS.
645 The operand may have been a register: in this case, X_op == O_register,
646 X_add_number is set to the register number, and truth is returned.
647 Input_line_pointer->(next non-blank) char after operand, or is in
648 its original state. */
649
650static bfd_boolean
651double_register_name (expressionP)
652 expressionS *expressionP;
653{
654 int reg_number;
655 char *name;
656 char *start;
657 char c;
658
659 /* Find the spelling of the operand. */
660 start = name = input_line_pointer;
661
662 c = get_symbol_end ();
663 reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
664
665 /* Put back the delimiting char. */
666 * input_line_pointer = c;
667
668 /* Look to see if it's in the register table. */
669 if (reg_number >= 0)
670 {
671 expressionP->X_op = O_register;
672 expressionP->X_add_number = reg_number;
673
674 /* Make the rest nice. */
675 expressionP->X_add_symbol = NULL;
676 expressionP->X_op_symbol = NULL;
677
678 return TRUE;
679 }
680
681 /* Reset the line as if we had not done anything. */
682 input_line_pointer = start;
683 return FALSE;
684}
685
252b5132
RH
686void
687md_show_usage (stream)
87271fa6 688 FILE *stream;
252b5132 689{
87271fa6 690 fprintf (stream, _("MN10300 options:\n\
252b5132 691none yet\n"));
87271fa6 692}
252b5132
RH
693
694int
695md_parse_option (c, arg)
b4c1ea07
EC
696 int c ATTRIBUTE_UNUSED;
697 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
698{
699 return 0;
700}
701
702symbolS *
703md_undefined_symbol (name)
b4c1ea07 704 char *name ATTRIBUTE_UNUSED;
252b5132
RH
705{
706 return 0;
707}
708
709char *
710md_atof (type, litp, sizep)
87271fa6
NC
711 int type;
712 char *litp;
713 int *sizep;
252b5132
RH
714{
715 int prec;
716 LITTLENUM_TYPE words[4];
717 char *t;
718 int i;
719
720 switch (type)
721 {
722 case 'f':
723 prec = 2;
724 break;
725
726 case 'd':
727 prec = 4;
728 break;
729
730 default:
731 *sizep = 0;
732 return "bad call to md_atof";
733 }
87271fa6 734
252b5132
RH
735 t = atof_ieee (input_line_pointer, type, words);
736 if (t)
737 input_line_pointer = t;
738
739 *sizep = prec * 2;
740
741 for (i = prec - 1; i >= 0; i--)
742 {
743 md_number_to_chars (litp, (valueT) words[i], 2);
744 litp += 2;
745 }
746
747 return NULL;
748}
749
252b5132
RH
750void
751md_convert_frag (abfd, sec, fragP)
b4c1ea07 752 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
753 asection *sec;
754 fragS *fragP;
252b5132
RH
755{
756 static unsigned long label_count = 0;
757 char buf[40];
758
759 subseg_change (sec, 0);
760 if (fragP->fr_subtype == 0)
761 {
762 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
763 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
764 fragP->fr_var = 0;
765 fragP->fr_fix += 2;
766 }
767 else if (fragP->fr_subtype == 1)
768 {
769 /* Reverse the condition of the first branch. */
770 int offset = fragP->fr_fix;
771 int opcode = fragP->fr_literal[offset] & 0xff;
772
773 switch (opcode)
774 {
775 case 0xc8:
776 opcode = 0xc9;
777 break;
778 case 0xc9:
779 opcode = 0xc8;
780 break;
781 case 0xc0:
782 opcode = 0xc2;
783 break;
784 case 0xc2:
785 opcode = 0xc0;
786 break;
787 case 0xc3:
788 opcode = 0xc1;
789 break;
790 case 0xc1:
791 opcode = 0xc3;
792 break;
793 case 0xc4:
794 opcode = 0xc6;
795 break;
796 case 0xc6:
797 opcode = 0xc4;
798 break;
799 case 0xc7:
800 opcode = 0xc5;
801 break;
802 case 0xc5:
803 opcode = 0xc7;
804 break;
805 default:
806 abort ();
807 }
808 fragP->fr_literal[offset] = opcode;
809
810 /* Create a fixup for the reversed conditional branch. */
0aa529cb 811 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
812 fix_new (fragP, fragP->fr_fix + 1, 1,
813 symbol_new (buf, sec, 0, fragP->fr_next),
814 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
815
816 /* Now create the unconditional branch + fixup to the
817 final target. */
818 fragP->fr_literal[offset + 2] = 0xcc;
819 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
820 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
821 fragP->fr_var = 0;
822 fragP->fr_fix += 5;
823 }
824 else if (fragP->fr_subtype == 2)
825 {
826 /* Reverse the condition of the first branch. */
827 int offset = fragP->fr_fix;
828 int opcode = fragP->fr_literal[offset] & 0xff;
829
830 switch (opcode)
831 {
832 case 0xc8:
833 opcode = 0xc9;
834 break;
835 case 0xc9:
836 opcode = 0xc8;
837 break;
838 case 0xc0:
839 opcode = 0xc2;
840 break;
841 case 0xc2:
842 opcode = 0xc0;
843 break;
844 case 0xc3:
845 opcode = 0xc1;
846 break;
847 case 0xc1:
848 opcode = 0xc3;
849 break;
850 case 0xc4:
851 opcode = 0xc6;
852 break;
853 case 0xc6:
854 opcode = 0xc4;
855 break;
856 case 0xc7:
857 opcode = 0xc5;
858 break;
859 case 0xc5:
860 opcode = 0xc7;
861 break;
862 default:
863 abort ();
864 }
865 fragP->fr_literal[offset] = opcode;
866
867 /* Create a fixup for the reversed conditional branch. */
0aa529cb 868 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
869 fix_new (fragP, fragP->fr_fix + 1, 1,
870 symbol_new (buf, sec, 0, fragP->fr_next),
871 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
872
873 /* Now create the unconditional branch + fixup to the
874 final target. */
875 fragP->fr_literal[offset + 2] = 0xdc;
876 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
877 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
878 fragP->fr_var = 0;
879 fragP->fr_fix += 7;
880 }
881 else if (fragP->fr_subtype == 3)
882 {
883 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
884 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
885 fragP->fr_var = 0;
886 fragP->fr_fix += 3;
887 }
888 else if (fragP->fr_subtype == 4)
889 {
890 /* Reverse the condition of the first branch. */
891 int offset = fragP->fr_fix;
892 int opcode = fragP->fr_literal[offset + 1] & 0xff;
893
894 switch (opcode)
895 {
896 case 0xe8:
897 opcode = 0xe9;
898 break;
899 case 0xe9:
900 opcode = 0xe8;
901 break;
902 case 0xea:
903 opcode = 0xeb;
904 break;
905 case 0xeb:
906 opcode = 0xea;
907 break;
908 default:
909 abort ();
910 }
911 fragP->fr_literal[offset + 1] = opcode;
912
913 /* Create a fixup for the reversed conditional branch. */
0aa529cb 914 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
915 fix_new (fragP, fragP->fr_fix + 2, 1,
916 symbol_new (buf, sec, 0, fragP->fr_next),
917 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
918
919 /* Now create the unconditional branch + fixup to the
920 final target. */
921 fragP->fr_literal[offset + 3] = 0xcc;
922 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
923 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
924 fragP->fr_var = 0;
925 fragP->fr_fix += 6;
926 }
927 else if (fragP->fr_subtype == 5)
928 {
929 /* Reverse the condition of the first branch. */
930 int offset = fragP->fr_fix;
931 int opcode = fragP->fr_literal[offset + 1] & 0xff;
932
933 switch (opcode)
934 {
935 case 0xe8:
936 opcode = 0xe9;
937 break;
938 case 0xea:
939 opcode = 0xeb;
940 break;
941 case 0xeb:
942 opcode = 0xea;
943 break;
944 default:
945 abort ();
946 }
947 fragP->fr_literal[offset + 1] = opcode;
948
949 /* Create a fixup for the reversed conditional branch. */
0aa529cb 950 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
951 fix_new (fragP, fragP->fr_fix + 2, 1,
952 symbol_new (buf, sec, 0, fragP->fr_next),
953 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
954
955 /* Now create the unconditional branch + fixup to the
956 final target. */
957 fragP->fr_literal[offset + 3] = 0xdc;
958 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
959 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
960 fragP->fr_var = 0;
961 fragP->fr_fix += 8;
962 }
963 else if (fragP->fr_subtype == 6)
964 {
965 int offset = fragP->fr_fix;
966 fragP->fr_literal[offset] = 0xcd;
967 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
968 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
969 fragP->fr_var = 0;
970 fragP->fr_fix += 5;
971 }
972 else if (fragP->fr_subtype == 7)
973 {
974 int offset = fragP->fr_fix;
975 fragP->fr_literal[offset] = 0xdd;
976 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
977 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
978
979 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
980 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
981 fragP->fr_var = 0;
982 fragP->fr_fix += 7;
983 }
984 else if (fragP->fr_subtype == 8)
985 {
986 int offset = fragP->fr_fix;
987 fragP->fr_literal[offset] = 0xfa;
988 fragP->fr_literal[offset + 1] = 0xff;
989 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
990 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
991 fragP->fr_var = 0;
992 fragP->fr_fix += 4;
993 }
994 else if (fragP->fr_subtype == 9)
995 {
996 int offset = fragP->fr_fix;
997 fragP->fr_literal[offset] = 0xfc;
998 fragP->fr_literal[offset + 1] = 0xff;
999
1000 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1001 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
1002 fragP->fr_var = 0;
1003 fragP->fr_fix += 6;
1004 }
1005 else if (fragP->fr_subtype == 10)
1006 {
1007 fragP->fr_literal[fragP->fr_fix] = 0xca;
1008 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
1009 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
1010 fragP->fr_var = 0;
1011 fragP->fr_fix += 2;
1012 }
1013 else if (fragP->fr_subtype == 11)
1014 {
1015 int offset = fragP->fr_fix;
1016 fragP->fr_literal[offset] = 0xcc;
1017
1018 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1019 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1020 fragP->fr_var = 0;
1021 fragP->fr_fix += 3;
1022 }
1023 else if (fragP->fr_subtype == 12)
1024 {
1025 int offset = fragP->fr_fix;
1026 fragP->fr_literal[offset] = 0xdc;
1027
1028 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1029 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1030 fragP->fr_var = 0;
1031 fragP->fr_fix += 5;
1032 }
e7b71525
AO
1033 else if (fragP->fr_subtype == 13)
1034 {
1035 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
1036 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1037 fragP->fr_var = 0;
1038 fragP->fr_fix += 3;
1039 }
1040 else if (fragP->fr_subtype == 14)
1041 {
1042 /* Reverse the condition of the first branch. */
1043 int offset = fragP->fr_fix;
1044 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1045
1046 switch (opcode)
1047 {
1048 case 0xd0:
1049 opcode = 0xd1;
1050 break;
1051 case 0xd1:
1052 opcode = 0xd0;
1053 break;
1054 case 0xd2:
1055 opcode = 0xdc;
1056 break;
1057 case 0xd3:
1058 opcode = 0xdb;
1059 break;
1060 case 0xd4:
1061 opcode = 0xda;
1062 break;
1063 case 0xd5:
1064 opcode = 0xd9;
1065 break;
1066 case 0xd6:
1067 opcode = 0xd8;
1068 break;
1069 case 0xd7:
1070 opcode = 0xdd;
1071 break;
1072 case 0xd8:
1073 opcode = 0xd6;
1074 break;
1075 case 0xd9:
1076 opcode = 0xd5;
1077 break;
1078 case 0xda:
1079 opcode = 0xd4;
1080 break;
1081 case 0xdb:
1082 opcode = 0xd3;
1083 break;
1084 case 0xdc:
1085 opcode = 0xd2;
1086 break;
1087 case 0xdd:
1088 opcode = 0xd7;
1089 break;
1090 default:
1091 abort ();
1092 }
1093 fragP->fr_literal[offset + 1] = opcode;
1094
1095 /* Create a fixup for the reversed conditional branch. */
1096 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1097 fix_new (fragP, fragP->fr_fix + 2, 1,
1098 symbol_new (buf, sec, 0, fragP->fr_next),
1099 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1100
1101 /* Now create the unconditional branch + fixup to the
1102 final target. */
1103 fragP->fr_literal[offset + 3] = 0xcc;
1104 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
1105 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1106 fragP->fr_var = 0;
1107 fragP->fr_fix += 6;
1108 }
1109 else if (fragP->fr_subtype == 15)
1110 {
1111 /* Reverse the condition of the first branch. */
1112 int offset = fragP->fr_fix;
1113 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1114
1115 switch (opcode)
1116 {
1117 case 0xd0:
1118 opcode = 0xd1;
1119 break;
1120 case 0xd1:
1121 opcode = 0xd0;
1122 break;
1123 case 0xd2:
1124 opcode = 0xdc;
1125 break;
1126 case 0xd3:
1127 opcode = 0xdb;
1128 break;
1129 case 0xd4:
1130 opcode = 0xda;
1131 break;
1132 case 0xd5:
1133 opcode = 0xd9;
1134 break;
1135 case 0xd6:
1136 opcode = 0xd8;
1137 break;
1138 case 0xd7:
1139 opcode = 0xdd;
1140 break;
1141 case 0xd8:
1142 opcode = 0xd6;
1143 break;
1144 case 0xd9:
1145 opcode = 0xd5;
1146 break;
1147 case 0xda:
1148 opcode = 0xd4;
1149 break;
1150 case 0xdb:
1151 opcode = 0xd3;
1152 break;
1153 case 0xdc:
1154 opcode = 0xd2;
1155 break;
1156 case 0xdd:
1157 opcode = 0xd7;
1158 break;
1159 default:
1160 abort ();
1161 }
1162 fragP->fr_literal[offset + 1] = opcode;
1163
1164 /* Create a fixup for the reversed conditional branch. */
1165 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1166 fix_new (fragP, fragP->fr_fix + 2, 1,
1167 symbol_new (buf, sec, 0, fragP->fr_next),
1168 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1169
1170 /* Now create the unconditional branch + fixup to the
1171 final target. */
1172 fragP->fr_literal[offset + 3] = 0xdc;
1173 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
1174 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1175 fragP->fr_var = 0;
1176 fragP->fr_fix += 8;
1177 }
252b5132
RH
1178 else
1179 abort ();
1180}
1181
1182valueT
1183md_section_align (seg, addr)
1184 asection *seg;
1185 valueT addr;
1186{
1187 int align = bfd_get_section_alignment (stdoutput, seg);
1188 return ((addr + (1 << align) - 1) & (-1 << align));
1189}
1190
1191void
1192md_begin ()
1193{
1194 char *prev_name = "";
1195 register const struct mn10300_opcode *op;
1196
87271fa6 1197 mn10300_hash = hash_new ();
252b5132
RH
1198
1199 /* Insert unique names into hash table. The MN10300 instruction set
1200 has many identical opcode names that have different opcodes based
1201 on the operands. This hash table then provides a quick index to
1202 the first opcode with a particular name in the opcode table. */
1203
1204 op = mn10300_opcodes;
1205 while (op->name)
1206 {
87271fa6 1207 if (strcmp (prev_name, op->name))
252b5132
RH
1208 {
1209 prev_name = (char *) op->name;
1210 hash_insert (mn10300_hash, op->name, (char *) op);
1211 }
1212 op++;
1213 }
1214
252b5132 1215 /* Set the default machine type. */
2ce28d43
AO
1216#ifdef TE_LINUX
1217 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
1218 as_warn (_("could not set architecture and machine"));
1219
1220 current_machine = AM33_2;
1221#else
0a727238 1222 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
1223 as_warn (_("could not set architecture and machine"));
1224
0a727238 1225 current_machine = MN103;
2ce28d43 1226#endif
252b5132
RH
1227}
1228
bf6f0d0c
AO
1229static symbolS *GOT_symbol;
1230
1231static inline int mn10300_check_fixup PARAMS ((struct mn10300_fixup *));
1232static inline int mn10300_PIC_related_p PARAMS ((symbolS *));
1233
1234static inline int
1235mn10300_PIC_related_p (sym)
1236 symbolS *sym;
1237{
1238 expressionS *exp;
1239
1240 if (! sym)
1241 return 0;
1242
1243 if (sym == GOT_symbol)
1244 return 1;
1245
1246 exp = symbol_get_value_expression (sym);
1247
1248 return (exp->X_op == O_PIC_reloc
1249 || mn10300_PIC_related_p (exp->X_add_symbol)
1250 || mn10300_PIC_related_p (exp->X_op_symbol));
1251}
1252
1253static inline int
1254mn10300_check_fixup (fixup)
1255 struct mn10300_fixup *fixup;
1256{
1257 expressionS *exp = &fixup->exp;
1258
1259 repeat:
1260 switch (exp->X_op)
1261 {
1262 case O_add:
1263 case O_subtract: /* If we're sufficiently unlucky that the label
1264 and the expression that references it happen
1265 to end up in different frags, the subtract
1266 won't be simplified within expression(). */
1267 /* The PIC-related operand must be the first operand of a sum. */
1268 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
1269 return 1;
1270
1271 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1272 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1273
1274 exp = symbol_get_value_expression (exp->X_add_symbol);
1275 goto repeat;
1276
1277 case O_symbol:
1278 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1279 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1280 break;
1281
1282 case O_PIC_reloc:
1283 fixup->reloc = exp->X_md;
1284 exp->X_op = O_symbol;
1285 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1286 && fixup->opindex >= 0
1287 && (mn10300_operands[fixup->opindex].flags
1288 & MN10300_OPERAND_RELAX))
1289 return 1;
1290 break;
1291
1292 default:
1293 return (mn10300_PIC_related_p (exp->X_add_symbol)
1294 || mn10300_PIC_related_p (exp->X_op_symbol));
1295 }
1296
1297 return 0;
1298}
1299
1300void
1301mn10300_cons_fix_new (frag, off, size, exp)
1302 fragS *frag;
1303 int off, size;
1304 expressionS *exp;
1305{
1306 struct mn10300_fixup fixup;
1307
1308 fixup.opindex = -1;
1309 fixup.exp = *exp;
1310 fixup.reloc = BFD_RELOC_UNUSED;
1311
1312 mn10300_check_fixup (&fixup);
1313
1314 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1315 switch (size)
1316 {
1317 case 2:
1318 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1319 break;
1320
1321 case 3:
1322 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1323 break;
1324
1325 case 4:
1326 break;
1327
1328 default:
1329 goto error;
1330 }
1331 else if (fixup.reloc == BFD_RELOC_UNUSED)
1332 switch (size)
1333 {
1334 case 1:
1335 fixup.reloc = BFD_RELOC_8;
1336 break;
1337
1338 case 2:
1339 fixup.reloc = BFD_RELOC_16;
1340 break;
1341
1342 case 3:
1343 fixup.reloc = BFD_RELOC_24;
1344 break;
1345
1346 case 4:
1347 fixup.reloc = BFD_RELOC_32;
1348 break;
1349
1350 default:
1351 goto error;
1352 }
1353 else if (size != 4)
1354 {
1355 error:
1356 as_bad (_("unsupported BFD relocation size %u"), size);
1357 fixup.reloc = BFD_RELOC_UNUSED;
1358 }
1359
1360 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1361}
1362
252b5132 1363void
87271fa6 1364md_assemble (str)
252b5132
RH
1365 char *str;
1366{
1367 char *s;
1368 struct mn10300_opcode *opcode;
1369 struct mn10300_opcode *next_opcode;
1370 const unsigned char *opindex_ptr;
1371 int next_opindex, relaxable;
eb0dfd58 1372 unsigned long insn, extension, size = 0;
252b5132
RH
1373 char *f;
1374 int i;
1375 int match;
1376
1377 /* Get the opcode. */
3882b010 1378 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
252b5132
RH
1379 ;
1380 if (*s != '\0')
1381 *s++ = '\0';
1382
87271fa6
NC
1383 /* Find the first opcode with the proper name. */
1384 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
1385 if (opcode == NULL)
1386 {
1387 as_bad (_("Unrecognized opcode: `%s'"), str);
1388 return;
1389 }
1390
1391 str = s;
3882b010 1392 while (ISSPACE (*str))
252b5132
RH
1393 ++str;
1394
1395 input_line_pointer = str;
1396
87271fa6 1397 for (;;)
252b5132
RH
1398 {
1399 const char *errmsg;
1400 int op_idx;
1401 char *hold;
1402 int extra_shift = 0;
1403
252b5132
RH
1404 errmsg = _("Invalid opcode/operands");
1405
1406 /* Reset the array of register operands. */
1407 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1408
1409 relaxable = 0;
1410 fc = 0;
1411 match = 0;
1412 next_opindex = 0;
1413 insn = opcode->opcode;
1414 extension = 0;
1415
1416 /* If the instruction is not available on the current machine
1417 then it can not possibly match. */
1418 if (opcode->machine
e7b71525 1419 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
aa15f6f7
AO
1420 && !(opcode->machine == AM33 && HAVE_AM33)
1421 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
1422 goto error;
1423
1424 for (op_idx = 1, opindex_ptr = opcode->operands;
1425 *opindex_ptr != 0;
1426 opindex_ptr++, op_idx++)
1427 {
1428 const struct mn10300_operand *operand;
1429 expressionS ex;
1430
1431 if (next_opindex == 0)
1432 {
1433 operand = &mn10300_operands[*opindex_ptr];
1434 }
1435 else
1436 {
1437 operand = &mn10300_operands[next_opindex];
1438 next_opindex = 0;
1439 }
1440
1441 while (*str == ' ' || *str == ',')
1442 ++str;
1443
1444 if (operand->flags & MN10300_OPERAND_RELAX)
1445 relaxable = 1;
1446
87271fa6 1447 /* Gather the operand. */
252b5132
RH
1448 hold = input_line_pointer;
1449 input_line_pointer = str;
1450
1451 if (operand->flags & MN10300_OPERAND_PAREN)
1452 {
1453 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1454 {
1455 input_line_pointer = hold;
1456 str = hold;
1457 goto error;
1458 }
1459 input_line_pointer++;
1460 goto keep_going;
1461 }
1462 /* See if we can match the operands. */
1463 else if (operand->flags & MN10300_OPERAND_DREG)
1464 {
1465 if (!data_register_name (&ex))
1466 {
1467 input_line_pointer = hold;
1468 str = hold;
1469 goto error;
1470 }
1471 }
1472 else if (operand->flags & MN10300_OPERAND_AREG)
1473 {
1474 if (!address_register_name (&ex))
1475 {
1476 input_line_pointer = hold;
1477 str = hold;
1478 goto error;
1479 }
1480 }
1481 else if (operand->flags & MN10300_OPERAND_SP)
1482 {
1483 char *start = input_line_pointer;
1484 char c = get_symbol_end ();
1485
1486 if (strcasecmp (start, "sp") != 0)
1487 {
1488 *input_line_pointer = c;
1489 input_line_pointer = hold;
1490 str = hold;
1491 goto error;
1492 }
1493 *input_line_pointer = c;
1494 goto keep_going;
1495 }
85cb2cf9
JL
1496 else if (operand->flags & MN10300_OPERAND_RREG)
1497 {
1498 if (!r_register_name (&ex))
1499 {
1500 input_line_pointer = hold;
1501 str = hold;
1502 goto error;
1503 }
1504 }
1505 else if (operand->flags & MN10300_OPERAND_XRREG)
1506 {
1507 if (!xr_register_name (&ex))
1508 {
1509 input_line_pointer = hold;
1510 str = hold;
1511 goto error;
1512 }
1513 }
e7b71525
AO
1514 else if (operand->flags & MN10300_OPERAND_FSREG)
1515 {
1516 if (!float_register_name (&ex))
1517 {
1518 input_line_pointer = hold;
1519 str = hold;
1520 goto error;
1521 }
1522 }
1523 else if (operand->flags & MN10300_OPERAND_FDREG)
1524 {
1525 if (!double_register_name (&ex))
1526 {
1527 input_line_pointer = hold;
1528 str = hold;
1529 goto error;
1530 }
1531 }
1532 else if (operand->flags & MN10300_OPERAND_FPCR)
1533 {
1534 char *start = input_line_pointer;
1535 char c = get_symbol_end ();
1536
1537 if (strcasecmp (start, "fpcr") != 0)
1538 {
1539 *input_line_pointer = c;
1540 input_line_pointer = hold;
1541 str = hold;
1542 goto error;
1543 }
1544 *input_line_pointer = c;
1545 goto keep_going;
1546 }
85cb2cf9
JL
1547 else if (operand->flags & MN10300_OPERAND_USP)
1548 {
1549 char *start = input_line_pointer;
1550 char c = get_symbol_end ();
1551
1552 if (strcasecmp (start, "usp") != 0)
1553 {
1554 *input_line_pointer = c;
1555 input_line_pointer = hold;
1556 str = hold;
1557 goto error;
1558 }
1559 *input_line_pointer = c;
1560 goto keep_going;
1561 }
1562 else if (operand->flags & MN10300_OPERAND_SSP)
1563 {
1564 char *start = input_line_pointer;
1565 char c = get_symbol_end ();
1566
1567 if (strcasecmp (start, "ssp") != 0)
1568 {
1569 *input_line_pointer = c;
1570 input_line_pointer = hold;
1571 str = hold;
1572 goto error;
1573 }
1574 *input_line_pointer = c;
1575 goto keep_going;
1576 }
1577 else if (operand->flags & MN10300_OPERAND_MSP)
1578 {
1579 char *start = input_line_pointer;
1580 char c = get_symbol_end ();
1581
1582 if (strcasecmp (start, "msp") != 0)
1583 {
1584 *input_line_pointer = c;
1585 input_line_pointer = hold;
1586 str = hold;
1587 goto error;
1588 }
1589 *input_line_pointer = c;
1590 goto keep_going;
1591 }
1592 else if (operand->flags & MN10300_OPERAND_PC)
1593 {
1594 char *start = input_line_pointer;
1595 char c = get_symbol_end ();
1596
1597 if (strcasecmp (start, "pc") != 0)
1598 {
1599 *input_line_pointer = c;
1600 input_line_pointer = hold;
1601 str = hold;
1602 goto error;
1603 }
1604 *input_line_pointer = c;
1605 goto keep_going;
1606 }
1607 else if (operand->flags & MN10300_OPERAND_EPSW)
1608 {
1609 char *start = input_line_pointer;
1610 char c = get_symbol_end ();
1611
1612 if (strcasecmp (start, "epsw") != 0)
1613 {
1614 *input_line_pointer = c;
1615 input_line_pointer = hold;
1616 str = hold;
1617 goto error;
1618 }
1619 *input_line_pointer = c;
1620 goto keep_going;
1621 }
1622 else if (operand->flags & MN10300_OPERAND_PLUS)
1623 {
1624 if (*input_line_pointer != '+')
1625 {
1626 input_line_pointer = hold;
1627 str = hold;
1628 goto error;
1629 }
1630 input_line_pointer++;
1631 goto keep_going;
1632 }
252b5132
RH
1633 else if (operand->flags & MN10300_OPERAND_PSW)
1634 {
1635 char *start = input_line_pointer;
1636 char c = get_symbol_end ();
1637
1638 if (strcasecmp (start, "psw") != 0)
1639 {
1640 *input_line_pointer = c;
1641 input_line_pointer = hold;
1642 str = hold;
1643 goto error;
1644 }
1645 *input_line_pointer = c;
1646 goto keep_going;
1647 }
1648 else if (operand->flags & MN10300_OPERAND_MDR)
1649 {
1650 char *start = input_line_pointer;
1651 char c = get_symbol_end ();
1652
1653 if (strcasecmp (start, "mdr") != 0)
1654 {
1655 *input_line_pointer = c;
1656 input_line_pointer = hold;
1657 str = hold;
1658 goto error;
1659 }
1660 *input_line_pointer = c;
1661 goto keep_going;
1662 }
1663 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1664 {
1665 unsigned int value = 0;
1666 if (*input_line_pointer != '[')
1667 {
1668 input_line_pointer = hold;
1669 str = hold;
1670 goto error;
1671 }
1672
1673 /* Eat the '['. */
1674 input_line_pointer++;
87271fa6 1675
252b5132 1676 /* We used to reject a null register list here; however,
87271fa6
NC
1677 we accept it now so the compiler can emit "call"
1678 instructions for all calls to named functions.
252b5132
RH
1679
1680 The linker can then fill in the appropriate bits for the
1681 register list and stack size or change the instruction
1682 into a "calls" if using "call" is not profitable. */
1683 while (*input_line_pointer != ']')
1684 {
1685 char *start;
1686 char c;
1687
1688 if (*input_line_pointer == ',')
1689 input_line_pointer++;
1690
1691 start = input_line_pointer;
1692 c = get_symbol_end ();
1693
1694 if (strcasecmp (start, "d2") == 0)
1695 {
1696 value |= 0x80;
1697 *input_line_pointer = c;
1698 }
1699 else if (strcasecmp (start, "d3") == 0)
1700 {
1701 value |= 0x40;
1702 *input_line_pointer = c;
1703 }
1704 else if (strcasecmp (start, "a2") == 0)
1705 {
1706 value |= 0x20;
1707 *input_line_pointer = c;
1708 }
1709 else if (strcasecmp (start, "a3") == 0)
1710 {
1711 value |= 0x10;
1712 *input_line_pointer = c;
1713 }
1714 else if (strcasecmp (start, "other") == 0)
1715 {
1716 value |= 0x08;
1717 *input_line_pointer = c;
1718 }
0a727238 1719 else if (HAVE_AM33
85cb2cf9
JL
1720 && strcasecmp (start, "exreg0") == 0)
1721 {
1722 value |= 0x04;
1723 *input_line_pointer = c;
1724 }
0a727238 1725 else if (HAVE_AM33
85cb2cf9
JL
1726 && strcasecmp (start, "exreg1") == 0)
1727 {
1728 value |= 0x02;
1729 *input_line_pointer = c;
1730 }
0a727238 1731 else if (HAVE_AM33
85cb2cf9
JL
1732 && strcasecmp (start, "exother") == 0)
1733 {
1734 value |= 0x01;
1735 *input_line_pointer = c;
1736 }
0a727238 1737 else if (HAVE_AM33
85cb2cf9
JL
1738 && strcasecmp (start, "all") == 0)
1739 {
1740 value |= 0xff;
1741 *input_line_pointer = c;
1742 }
252b5132
RH
1743 else
1744 {
1745 input_line_pointer = hold;
1746 str = hold;
1747 goto error;
1748 }
1749 }
1750 input_line_pointer++;
1751 mn10300_insert_operand (&insn, &extension, operand,
1752 value, (char *) NULL, 0, 0);
1753 goto keep_going;
1754
1755 }
1756 else if (data_register_name (&ex))
1757 {
1758 input_line_pointer = hold;
1759 str = hold;
1760 goto error;
1761 }
1762 else if (address_register_name (&ex))
1763 {
1764 input_line_pointer = hold;
1765 str = hold;
1766 goto error;
1767 }
1768 else if (other_register_name (&ex))
1769 {
1770 input_line_pointer = hold;
1771 str = hold;
1772 goto error;
1773 }
0a727238 1774 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1775 {
1776 input_line_pointer = hold;
1777 str = hold;
1778 goto error;
1779 }
0a727238 1780 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1781 {
1782 input_line_pointer = hold;
1783 str = hold;
1784 goto error;
1785 }
e7b71525
AO
1786 else if (HAVE_AM33_2 && float_register_name (&ex))
1787 {
1788 input_line_pointer = hold;
1789 str = hold;
1790 goto error;
1791 }
1792 else if (HAVE_AM33_2 && double_register_name (&ex))
1793 {
1794 input_line_pointer = hold;
1795 str = hold;
1796 goto error;
1797 }
252b5132
RH
1798 else if (*str == ')' || *str == '(')
1799 {
1800 input_line_pointer = hold;
1801 str = hold;
1802 goto error;
1803 }
1804 else
1805 {
1806 expression (&ex);
1807 }
1808
87271fa6 1809 switch (ex.X_op)
252b5132
RH
1810 {
1811 case O_illegal:
1812 errmsg = _("illegal operand");
1813 goto error;
1814 case O_absent:
1815 errmsg = _("missing operand");
1816 goto error;
1817 case O_register:
1818 {
1819 int mask;
1820
1821 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1822 if (HAVE_AM33)
1823 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
e7b71525
AO
1824 if (HAVE_AM33_2)
1825 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
252b5132
RH
1826 if ((operand->flags & mask) == 0)
1827 {
1828 input_line_pointer = hold;
1829 str = hold;
1830 goto error;
1831 }
87271fa6 1832
252b5132
RH
1833 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1834 extra_shift = 8;
1835 else if (opcode->format == FMT_D2
1836 || opcode->format == FMT_D4
1837 || opcode->format == FMT_S2
1838 || opcode->format == FMT_S4
1839 || opcode->format == FMT_S6
1840 || opcode->format == FMT_D5)
1841 extra_shift = 16;
85cb2cf9
JL
1842 else if (opcode->format == FMT_D7)
1843 extra_shift = 8;
1844 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1845 extra_shift = 8;
252b5132
RH
1846 else
1847 extra_shift = 0;
87271fa6 1848
252b5132
RH
1849 mn10300_insert_operand (&insn, &extension, operand,
1850 ex.X_add_number, (char *) NULL,
1851 0, extra_shift);
1852
252b5132
RH
1853 /* And note the register number in the register array. */
1854 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1855 break;
1856 }
1857
1858 case O_constant:
1859 /* If this operand can be promoted, and it doesn't
1860 fit into the allocated bitfield for this insn,
1861 then promote it (ie this opcode does not match). */
1862 if (operand->flags
1863 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1864 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1865 {
1866 input_line_pointer = hold;
1867 str = hold;
1868 goto error;
1869 }
1870
1871 mn10300_insert_operand (&insn, &extension, operand,
1872 ex.X_add_number, (char *) NULL,
1873 0, 0);
1874 break;
1875
1876 default:
1877 /* If this operand can be promoted, then this opcode didn't
1878 match since we can't know if it needed promotion! */
1879 if (operand->flags & MN10300_OPERAND_PROMOTE)
1880 {
1881 input_line_pointer = hold;
1882 str = hold;
1883 goto error;
1884 }
1885
1886 /* We need to generate a fixup for this expression. */
1887 if (fc >= MAX_INSN_FIXUPS)
1888 as_fatal (_("too many fixups"));
1889 fixups[fc].exp = ex;
1890 fixups[fc].opindex = *opindex_ptr;
1891 fixups[fc].reloc = BFD_RELOC_UNUSED;
bf6f0d0c
AO
1892 if (mn10300_check_fixup (& fixups[fc]))
1893 goto error;
252b5132
RH
1894 ++fc;
1895 break;
1896 }
1897
1898keep_going:
1899 str = input_line_pointer;
1900 input_line_pointer = hold;
1901
1902 while (*str == ' ' || *str == ',')
1903 ++str;
1904
1905 }
1906
1907 /* Make sure we used all the operands! */
1908 if (*str != ',')
1909 match = 1;
1910
1911 /* If this instruction has registers that must not match, verify
1912 that they do indeed not match. */
1913 if (opcode->no_match_operands)
1914 {
1915 int i;
1916
1917 /* Look at each operand to see if it's marked. */
1918 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1919 {
1920 if ((1 << i) & opcode->no_match_operands)
1921 {
1922 int j;
1923
1924 /* operand I is marked. Check that it does not match any
1925 operands > I which are marked. */
1926 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1927 {
1928 if (((1 << j) & opcode->no_match_operands)
1929 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1930 {
1931 errmsg = _("Invalid register specification.");
1932 match = 0;
1933 goto error;
1934 }
1935 }
1936 }
1937 }
1938 }
1939
1940 error:
1941 if (match == 0)
87271fa6 1942 {
252b5132 1943 next_opcode = opcode + 1;
87271fa6 1944 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1945 {
1946 opcode = next_opcode;
1947 continue;
1948 }
87271fa6 1949
252b5132
RH
1950 as_bad ("%s", errmsg);
1951 return;
87271fa6 1952 }
252b5132
RH
1953 break;
1954 }
87271fa6 1955
3882b010 1956 while (ISSPACE (*str))
252b5132
RH
1957 ++str;
1958
1959 if (*str != '\0')
1960 as_bad (_("junk at end of line: `%s'"), str);
1961
1962 input_line_pointer = str;
1963
1964 /* Determine the size of the instruction. */
1965 if (opcode->format == FMT_S0)
1966 size = 1;
1967
1968 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1969 size = 2;
1970
1971 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1972 size = 3;
1973
85cb2cf9
JL
1974 if (opcode->format == FMT_D6)
1975 size = 3;
1976
1977 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1978 size = 4;
1979
1980 if (opcode->format == FMT_D8)
1981 size = 6;
1982
1983 if (opcode->format == FMT_D9)
1984 size = 7;
252b5132
RH
1985
1986 if (opcode->format == FMT_S4)
1987 size = 5;
1988
1989 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1990 size = 7;
1991
1992 if (opcode->format == FMT_D2)
1993 size = 4;
1994
e7b71525
AO
1995 if (opcode->format == FMT_D3)
1996 size = 5;
1997
252b5132
RH
1998 if (opcode->format == FMT_D4)
1999 size = 6;
2000
2001 if (relaxable && fc > 0)
2002 {
2003 int type;
2004
076dc439
AO
2005 /* We want to anchor the line info to the previous frag (if
2006 there isn't one, create it), so that, when the insn is
2007 resized, we still get the right address for the beginning of
2008 the region. */
2009 f = frag_more (0);
2010 dwarf2_emit_insn (0);
2011
87271fa6 2012 /* bCC */
252b5132
RH
2013 if (size == 2)
2014 {
2015 /* Handle bra specially. Basically treat it like jmp so
2016 that we automatically handle 8, 16 and 32 bit offsets
2017 correctly as well as jumps to an undefined address.
2018
2019 It is also important to not treat it like other bCC
2020 instructions since the long forms of bra is different
2021 from other bCC instructions. */
2022 if (opcode->opcode == 0xca00)
2023 type = 10;
2024 else
2025 type = 0;
2026 }
87271fa6 2027 /* call */
252b5132 2028 else if (size == 5)
87271fa6
NC
2029 type = 6;
2030 /* calls */
252b5132
RH
2031 else if (size == 4)
2032 type = 8;
87271fa6 2033 /* jmp */
252b5132
RH
2034 else if (size == 3 && opcode->opcode == 0xcc0000)
2035 type = 10;
e7b71525
AO
2036 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
2037 type = 13;
87271fa6 2038 /* bCC (uncommon cases) */
252b5132
RH
2039 else
2040 type = 3;
2041
2042 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
2043 fixups[0].exp.X_add_symbol,
2044 fixups[0].exp.X_add_number,
2045 (char *)fixups[0].opindex);
87271fa6 2046
252b5132
RH
2047 /* This is pretty hokey. We basically just care about the
2048 opcode, so we have to write out the first word big endian.
2049
2050 The exception is "call", which has two operands that we
2051 care about.
2052
2053 The first operand (the register list) happens to be in the
2054 first instruction word, and will be in the right place if
2055 we output the first word in big endian mode.
2056
2057 The second operand (stack size) is in the extension word,
2058 and we want it to appear as the first character in the extension
2059 word (as it appears in memory). Luckily, writing the extension
2060 word in big endian format will do what we want. */
2061 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
2062 if (size > 8)
2063 {
2064 number_to_chars_bigendian (f + 4, extension, 4);
2065 number_to_chars_bigendian (f + 8, 0, size - 8);
2066 }
2067 else if (size > 4)
2068 number_to_chars_bigendian (f + 4, extension, size - 4);
2069 }
2070 else
2071 {
2072 /* Allocate space for the instruction. */
2073 f = frag_more (size);
2074
2075 /* Fill in bytes for the instruction. Note that opcode fields
2076 are written big-endian, 16 & 32bit immediates are written
2077 little endian. Egad. */
2078 if (opcode->format == FMT_S0
2079 || opcode->format == FMT_S1
2080 || opcode->format == FMT_D0
85cb2cf9
JL
2081 || opcode->format == FMT_D6
2082 || opcode->format == FMT_D7
2083 || opcode->format == FMT_D10
252b5132
RH
2084 || opcode->format == FMT_D1)
2085 {
2086 number_to_chars_bigendian (f, insn, size);
2087 }
2088 else if (opcode->format == FMT_S2
2089 && opcode->opcode != 0xdf0000
2090 && opcode->opcode != 0xde0000)
2091 {
2092 /* A format S2 instruction that is _not_ "ret" and "retf". */
2093 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
2094 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
2095 }
2096 else if (opcode->format == FMT_S2)
2097 {
2098 /* This must be a ret or retf, which is written entirely in
2099 big-endian format. */
2100 number_to_chars_bigendian (f, insn, 3);
2101 }
2102 else if (opcode->format == FMT_S4
2103 && opcode->opcode != 0xdc000000)
2104 {
2105 /* This must be a format S4 "call" instruction. What a pain. */
2106 unsigned long temp = (insn >> 8) & 0xffff;
2107 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2108 number_to_chars_littleendian (f + 1, temp, 2);
2109 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
2110 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2111 }
2112 else if (opcode->format == FMT_S4)
2113 {
2114 /* This must be a format S4 "jmp" instruction. */
2115 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
2116 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2117 number_to_chars_littleendian (f + 1, temp, 4);
2118 }
2119 else if (opcode->format == FMT_S6)
2120 {
2121 unsigned long temp = ((insn & 0xffffff) << 8)
2122 | ((extension >> 16) & 0xff);
2123 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2124 number_to_chars_littleendian (f + 1, temp, 4);
2125 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2126 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2127 }
2128 else if (opcode->format == FMT_D2
2129 && opcode->opcode != 0xfaf80000
2130 && opcode->opcode != 0xfaf00000
2131 && opcode->opcode != 0xfaf40000)
2132 {
2133 /* A format D2 instruction where the 16bit immediate is
2134 really a single 16bit value, not two 8bit values. */
2135 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2136 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2137 }
2138 else if (opcode->format == FMT_D2)
2139 {
2140 /* A format D2 instruction where the 16bit immediate
2141 is really two 8bit immediates. */
2142 number_to_chars_bigendian (f, insn, 4);
2143 }
e7b71525
AO
2144 else if (opcode->format == FMT_D3)
2145 {
2146 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2147 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2148 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2149 }
252b5132
RH
2150 else if (opcode->format == FMT_D4)
2151 {
2152 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 2153
252b5132
RH
2154 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2155 number_to_chars_littleendian (f + 2, temp, 4);
2156 }
2157 else if (opcode->format == FMT_D5)
2158 {
87271fa6
NC
2159 unsigned long temp = (((insn & 0xffff) << 16)
2160 | ((extension >> 8) & 0xffff));
2161
252b5132
RH
2162 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2163 number_to_chars_littleendian (f + 2, temp, 4);
2164 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2165 }
85cb2cf9
JL
2166 else if (opcode->format == FMT_D8)
2167 {
87271fa6
NC
2168 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2169
2170 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2171 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2172 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
2173 }
2174 else if (opcode->format == FMT_D9)
2175 {
87271fa6
NC
2176 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2177
2178 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2179 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 2180 }
252b5132
RH
2181
2182 /* Create any fixups. */
2183 for (i = 0; i < fc; i++)
2184 {
2185 const struct mn10300_operand *operand;
2186
2187 operand = &mn10300_operands[fixups[i].opindex];
bf6f0d0c
AO
2188 if (fixups[i].reloc != BFD_RELOC_UNUSED
2189 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2190 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2191 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2192 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
252b5132
RH
2193 {
2194 reloc_howto_type *reloc_howto;
2195 int size;
2196 int offset;
2197 fixS *fixP;
2198
87271fa6
NC
2199 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2200 fixups[i].reloc);
252b5132
RH
2201
2202 if (!reloc_howto)
87271fa6
NC
2203 abort ();
2204
252b5132
RH
2205 size = bfd_get_reloc_size (reloc_howto);
2206
2207 if (size < 1 || size > 4)
87271fa6 2208 abort ();
252b5132
RH
2209
2210 offset = 4 - size;
2211 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2212 size, &fixups[i].exp,
2213 reloc_howto->pc_relative,
2214 fixups[i].reloc);
2215 }
2216 else
2217 {
2218 int reloc, pcrel, reloc_size, offset;
2219 fixS *fixP;
2220
2221 reloc = BFD_RELOC_NONE;
bf6f0d0c
AO
2222 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2223 reloc = fixups[i].reloc;
252b5132
RH
2224 /* How big is the reloc? Remember SPLIT relocs are
2225 implicitly 32bits. */
2226 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2227 reloc_size = 32;
85cb2cf9
JL
2228 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2229 reloc_size = 24;
252b5132
RH
2230 else
2231 reloc_size = operand->bits;
2232
2233 /* Is the reloc pc-relative? */
2234 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
bf6f0d0c
AO
2235 if (reloc != BFD_RELOC_NONE)
2236 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
252b5132 2237
a7c92dae 2238 offset = size - (reloc_size + operand->shift) / 8;
eb0dfd58 2239
252b5132 2240 /* Choose a proper BFD relocation type. */
bf6f0d0c
AO
2241 if (reloc != BFD_RELOC_NONE)
2242 ;
2243 else if (pcrel)
252b5132
RH
2244 {
2245 if (reloc_size == 32)
2246 reloc = BFD_RELOC_32_PCREL;
2247 else if (reloc_size == 16)
2248 reloc = BFD_RELOC_16_PCREL;
2249 else if (reloc_size == 8)
2250 reloc = BFD_RELOC_8_PCREL;
2251 else
2252 abort ();
2253 }
2254 else
2255 {
2256 if (reloc_size == 32)
2257 reloc = BFD_RELOC_32;
2258 else if (reloc_size == 16)
2259 reloc = BFD_RELOC_16;
2260 else if (reloc_size == 8)
2261 reloc = BFD_RELOC_8;
2262 else
2263 abort ();
2264 }
2265
2266 /* Convert the size of the reloc into what fix_new_exp wants. */
2267 reloc_size = reloc_size / 8;
2268 if (reloc_size == 8)
2269 reloc_size = 0;
2270 else if (reloc_size == 16)
2271 reloc_size = 1;
2272 else if (reloc_size == 32)
2273 reloc_size = 2;
2274
2275 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2276 reloc_size, &fixups[i].exp, pcrel,
2277 ((bfd_reloc_code_real_type) reloc));
2278
2279 if (pcrel)
2280 fixP->fx_offset += offset;
2281 }
2282 }
e8b1cae5 2283
076dc439
AO
2284 dwarf2_emit_insn (size);
2285 }
252b5132
RH
2286}
2287
87271fa6
NC
2288/* If while processing a fixup, a reloc really needs to be created
2289 then it is done here. */
252b5132 2290
252b5132
RH
2291arelent *
2292tc_gen_reloc (seg, fixp)
b4c1ea07 2293 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
2294 fixS *fixp;
2295{
2296 arelent *reloc;
2297 reloc = (arelent *) xmalloc (sizeof (arelent));
2298
2299 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2300 if (reloc->howto == (reloc_howto_type *) NULL)
2301 {
2302 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
2303 _("reloc %d not supported by object file format"),
2304 (int) fixp->fx_r_type);
252b5132
RH
2305 return NULL;
2306 }
2307 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2308
bf6f0d0c
AO
2309 if (fixp->fx_subsy
2310 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2311 {
2312 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2313 fixp->fx_subsy = 0;
2314 }
2315
252b5132
RH
2316 if (fixp->fx_addsy && fixp->fx_subsy)
2317 {
7dc8f5ce
AO
2318 reloc->sym_ptr_ptr = NULL;
2319
4e75439a
AO
2320 /* If we got a difference between two symbols, and the
2321 subtracted symbol is in the current section, use a
2322 PC-relative relocation. If both symbols are in the same
2323 section, the difference would have already been simplified
2324 to a constant. */
2325 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
2326 {
2327 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2328 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2329 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
2330 + fixp->fx_offset);
2331
2332 switch (fixp->fx_r_type)
2333 {
2334 case BFD_RELOC_8:
2335 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2336 BFD_RELOC_8_PCREL);
2337 return reloc;
5d6255fe 2338
4e75439a
AO
2339 case BFD_RELOC_16:
2340 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2341 BFD_RELOC_16_PCREL);
2342 return reloc;
2343
2344 case BFD_RELOC_24:
2345 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2346 BFD_RELOC_24_PCREL);
2347 return reloc;
2348
2349 case BFD_RELOC_32:
2350 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2351 BFD_RELOC_32_PCREL);
2352 return reloc;
2353
2354 default:
2355 /* Try to compute the absolute value below. */
2356 break;
2357 }
2358 }
87271fa6 2359
252b5132
RH
2360 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2361 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2362 {
2363 as_bad_where (fixp->fx_file, fixp->fx_line,
2364 "Difference of symbols in different sections is not supported");
252b5132 2365 }
6e22e505
AO
2366 else
2367 {
2368 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2369
2370 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2371 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2372
2373 switch (fixp->fx_r_type)
2374 {
2375 case BFD_RELOC_8:
2376 md_number_to_chars (fixpos, reloc->addend, 1);
2377 break;
5d6255fe 2378
6e22e505
AO
2379 case BFD_RELOC_16:
2380 md_number_to_chars (fixpos, reloc->addend, 2);
2381 break;
252b5132 2382
6e22e505
AO
2383 case BFD_RELOC_24:
2384 md_number_to_chars (fixpos, reloc->addend, 3);
2385 break;
2386
2387 case BFD_RELOC_32:
2388 md_number_to_chars (fixpos, reloc->addend, 4);
2389 break;
2390
2391 default:
2392 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
2393 return reloc;
2394 }
2395 }
2396
7dc8f5ce
AO
2397 if (reloc->sym_ptr_ptr)
2398 free (reloc->sym_ptr_ptr);
6e22e505
AO
2399 free (reloc);
2400 return NULL;
252b5132 2401 }
87271fa6 2402 else
252b5132 2403 {
87271fa6 2404 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 2405 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2406 reloc->addend = fixp->fx_offset;
2407 }
2408 return reloc;
2409}
2410
2411int
2412md_estimate_size_before_relax (fragp, seg)
2413 fragS *fragp;
2414 asection *seg;
2415{
93c2a809
AM
2416 if (fragp->fr_subtype == 6
2417 && (!S_IS_DEFINED (fragp->fr_symbol)
2418 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2419 fragp->fr_subtype = 7;
2420 else if (fragp->fr_subtype == 8
2421 && (!S_IS_DEFINED (fragp->fr_symbol)
2422 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2423 fragp->fr_subtype = 9;
2424 else if (fragp->fr_subtype == 10
2425 && (!S_IS_DEFINED (fragp->fr_symbol)
2426 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2427 fragp->fr_subtype = 12;
2428
e7b71525
AO
2429 if (fragp->fr_subtype == 13)
2430 return 3;
93c2a809
AM
2431 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2432 abort ();
2433
2434 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 2435}
252b5132
RH
2436
2437long
2438md_pcrel_from (fixp)
2439 fixS *fixp;
2440{
87271fa6 2441 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
2442 {
2443 /* The symbol is undefined. Let the linker figure it out. */
2444 return 0;
2445 }
2446 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
2447}
2448
94f592af
NC
2449void
2450md_apply_fix3 (fixP, valP, seg)
2451 fixS * fixP;
2452 valueT * valP;
252b5132
RH
2453 segT seg;
2454{
94f592af 2455 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
58a77e41 2456 int size = 0;
94f592af 2457 int value = (int) * valP;
58a77e41 2458
94f592af 2459 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
58a77e41
EC
2460
2461 /* This should never happen. */
2462 if (seg->flags & SEC_ALLOC)
94f592af 2463 abort ();
58a77e41 2464
c51ce5f0
EC
2465 /* The value we are passed in *valuep includes the symbol values.
2466 Since we are using BFD_ASSEMBLER, if we are doing this relocation
2467 the code in write.c is going to call bfd_install_relocation, which
2468 is also going to use the symbol value. That means that if the
2469 reloc is fully resolved we want to use *valuep since
2470 bfd_install_relocation is not being used.
2471
2472 However, if the reloc is not fully resolved we do not want to use
2473 *valuep, and must use fx_offset instead. However, if the reloc
2474 is PC relative, we do want to use *valuep since it includes the
2475 result of md_pcrel_from. */
94f592af
NC
2476 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
2477 value = fixP->fx_offset;
c51ce5f0 2478
58a77e41
EC
2479 /* If the fix is relative to a symbol which is not defined, or not
2480 in the same segment as the fix, we cannot resolve it here. */
94f592af
NC
2481 if (fixP->fx_addsy != NULL
2482 && (! S_IS_DEFINED (fixP->fx_addsy)
2483 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
58a77e41 2484 {
94f592af
NC
2485 fixP->fx_done = 0;
2486 return;
58a77e41
EC
2487 }
2488
94f592af 2489 switch (fixP->fx_r_type)
58a77e41
EC
2490 {
2491 case BFD_RELOC_8:
96f37af6 2492 case BFD_RELOC_8_PCREL:
58a77e41
EC
2493 size = 1;
2494 break;
2495
2496 case BFD_RELOC_16:
96f37af6 2497 case BFD_RELOC_16_PCREL:
58a77e41
EC
2498 size = 2;
2499 break;
2500
2501 case BFD_RELOC_32:
96f37af6 2502 case BFD_RELOC_32_PCREL:
58a77e41
EC
2503 size = 4;
2504 break;
2505
2506 case BFD_RELOC_VTABLE_INHERIT:
2507 case BFD_RELOC_VTABLE_ENTRY:
94f592af
NC
2508 fixP->fx_done = 0;
2509 return;
58a77e41
EC
2510
2511 case BFD_RELOC_NONE:
2512 default:
94f592af
NC
2513 as_bad_where (fixP->fx_file, fixP->fx_line,
2514 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
58a77e41
EC
2515 }
2516
c51ce5f0 2517 md_number_to_chars (fixpos, value, size);
58a77e41 2518
b653e7f9 2519 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
94f592af
NC
2520 if (fixP->fx_addsy == NULL)
2521 fixP->fx_done = 1;
58a77e41
EC
2522}
2523
58a77e41
EC
2524/* Return zero if the fixup in fixp should be left alone and not
2525 adjusted. */
2526
b34976b6 2527bfd_boolean
58a77e41
EC
2528mn10300_fix_adjustable (fixp)
2529 struct fix *fixp;
2530{
bf6f0d0c
AO
2531 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixp))
2532 return 0;
2533
58a77e41
EC
2534 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2535 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2536 return 0;
2537
7e8f4100
AO
2538 /* Do not adjust relocations involving symbols in code sections,
2539 because it breaks linker relaxations. This could be fixed in the
2540 linker, but this fix is simpler, and it pretty much only affects
2541 object size a little bit. */
2542 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2543 return 0;
2544
53cb0362
DD
2545 /* Likewise, do not adjust symbols that won't be merged, or debug
2546 symbols, because they too break relaxation. We do want to adjust
2547 other mergable symbols, like .rodata, because code relaxations
2548 need section-relative symbols to properly relax them. */
2549 if (! (S_GET_SEGMENT(fixp->fx_addsy)->flags & SEC_MERGE))
2550 return 0;
2551 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2552 return 0;
2553
58a77e41 2554 return 1;
252b5132
RH
2555}
2556
2557/* Insert an operand value into an instruction. */
2558
2559static void
2560mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2561 unsigned long *insnp;
2562 unsigned long *extensionp;
2563 const struct mn10300_operand *operand;
2564 offsetT val;
2565 char *file;
2566 unsigned int line;
2567 unsigned int shift;
2568{
2569 /* No need to check 32bit operands for a bit. Note that
2570 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2571 if (operand->bits != 32
2572 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2573 {
2574 long min, max;
2575 offsetT test;
2576 int bits;
2577
2578 bits = operand->bits;
85cb2cf9
JL
2579 if (operand->flags & MN10300_OPERAND_24BIT)
2580 bits = 24;
252b5132
RH
2581
2582 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2583 {
2584 max = (1 << (bits - 1)) - 1;
2585 min = - (1 << (bits - 1));
2586 }
2587 else
87271fa6
NC
2588 {
2589 max = (1 << bits) - 1;
2590 min = 0;
2591 }
252b5132
RH
2592
2593 test = val;
2594
252b5132 2595 if (test < (offsetT) min || test > (offsetT) max)
e5976317 2596 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH
2597 }
2598
2599 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2600 {
2601 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2602 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2603 << operand->shift);
2604 }
85cb2cf9
JL
2605 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2606 {
2607 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2608 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2609 << operand->shift);
2610 }
e7b71525
AO
2611 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
2612 {
2613 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
2614 explanation of these variables. Note that FMT-implied shifts
2615 are not taken into account for FP registers. */
2616 unsigned long mask_low, mask_high;
2617 int shl_low, shr_high, shl_high;
2618
2619 switch (operand->bits)
2620 {
2621 case 5:
2622 /* Handle regular FP registers. */
2623 if (operand->shift >= 0)
2624 {
2625 /* This is an `m' register. */
2626 shl_low = operand->shift;
2627 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
2628 }
2629 else
2630 {
2631 /* This is an `n' register. */
2632 shl_low = -operand->shift;
2633 shl_high = shl_low / 4;
2634 }
2635
2636 mask_low = 0x0f;
2637 mask_high = 0x10;
2638 shr_high = 4;
2639 break;
2640
2641 case 3:
2642 /* Handle accumulators. */
2643 shl_low = -operand->shift;
2644 shl_high = 0;
2645 mask_low = 0x03;
2646 mask_high = 0x04;
2647 shr_high = 2;
2648 break;
2649
2650 default:
2651 abort ();
2652 }
2653 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
2654 | ((val & mask_low) << shl_low));
2655 }
252b5132
RH
2656 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2657 {
2658 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2659 << (operand->shift + shift));
2660
2661 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2662 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2663 << (operand->shift + shift + operand->bits));
2664 }
2665 else
2666 {
2667 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2668 << (operand->shift + shift));
2669
2670 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2671 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2672 << (operand->shift + shift + operand->bits));
2673 }
2674}
2675
2676static unsigned long
2677check_operand (insn, operand, val)
b4c1ea07 2678 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2679 const struct mn10300_operand *operand;
2680 offsetT val;
2681{
2682 /* No need to check 32bit operands for a bit. Note that
2683 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2684 if (operand->bits != 32
2685 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2686 {
2687 long min, max;
2688 offsetT test;
2689 int bits;
2690
2691 bits = operand->bits;
85cb2cf9
JL
2692 if (operand->flags & MN10300_OPERAND_24BIT)
2693 bits = 24;
252b5132
RH
2694
2695 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2696 {
2697 max = (1 << (bits - 1)) - 1;
2698 min = - (1 << (bits - 1));
2699 }
2700 else
87271fa6
NC
2701 {
2702 max = (1 << bits) - 1;
2703 min = 0;
2704 }
252b5132
RH
2705
2706 test = val;
2707
252b5132
RH
2708 if (test < (offsetT) min || test > (offsetT) max)
2709 return 0;
2710 else
2711 return 1;
2712 }
2713 return 1;
2714}
2715
2716static void
2717set_arch_mach (mach)
497f322d 2718 int mach;
252b5132
RH
2719{
2720 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2721 as_warn (_("could not set architecture and machine"));
2722
2723 current_machine = mach;
2724}
bf6f0d0c
AO
2725
2726static inline char * mn10300_end_of_match PARAMS ((char *, char *));
2727
2728static inline char *
2729mn10300_end_of_match (cont, what)
2730 char *cont, *what;
2731{
2732 int len = strlen (what);
2733
2734 if (strncmp (cont, what, strlen (what)) == 0
2735 && ! is_part_of_name (cont[len]))
2736 return cont + len;
2737
2738 return NULL;
2739}
2740
2741int
2742mn10300_parse_name (name, exprP, nextcharP)
2743 char const *name;
2744 expressionS *exprP;
2745 char *nextcharP;
2746{
2747 char *next = input_line_pointer;
2748 char *next_end;
2749 int reloc_type;
2750 segT segment;
2751
2752 exprP->X_op_symbol = NULL;
2753
2754 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2755 {
2756 if (! GOT_symbol)
2757 GOT_symbol = symbol_find_or_make (name);
2758
2759 exprP->X_add_symbol = GOT_symbol;
2760 no_suffix:
2761 /* If we have an absolute symbol or a reg,
2762 then we know its value now. */
2763 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2764 if (segment == absolute_section)
2765 {
2766 exprP->X_op = O_constant;
2767 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2768 exprP->X_add_symbol = NULL;
2769 }
2770 else if (segment == reg_section)
2771 {
2772 exprP->X_op = O_register;
2773 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2774 exprP->X_add_symbol = NULL;
2775 }
2776 else
2777 {
2778 exprP->X_op = O_symbol;
2779 exprP->X_add_number = 0;
2780 }
2781
2782 return 1;
2783 }
2784
2785 exprP->X_add_symbol = symbol_find_or_make (name);
2786
2787 if (*nextcharP != '@')
2788 goto no_suffix;
2789 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2790 reloc_type = BFD_RELOC_32_GOTOFF;
2791 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2792 reloc_type = BFD_RELOC_MN10300_GOT32;
2793 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2794 reloc_type = BFD_RELOC_32_PLT_PCREL;
2795 else
2796 goto no_suffix;
2797
2798 *input_line_pointer = *nextcharP;
2799 input_line_pointer = next_end;
2800 *nextcharP = *input_line_pointer;
2801 *input_line_pointer = '\0';
2802
2803 exprP->X_op = O_PIC_reloc;
2804 exprP->X_add_number = 0;
2805 exprP->X_md = reloc_type;
2806
2807 return 1;
2808}
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