* readelf.c (display_debug_lines): Fix section length check
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
0a727238 2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include <stdio.h>
22#include <ctype.h>
23#include "as.h"
87271fa6 24#include "subsegs.h"
252b5132 25#include "opcode/mn10300.h"
e8b1cae5 26#include "dwarf2dbg.h"
252b5132
RH
27\f
28/* Structure to hold information about predefined registers. */
29struct reg_name
30{
31 const char *name;
32 int value;
33};
34
87271fa6
NC
35/* Generic assembler global variables which must be defined by all
36 targets. */
252b5132 37
87271fa6 38/* Characters which always start a comment. */
252b5132
RH
39const char comment_chars[] = "#";
40
41/* Characters which start a comment at the beginning of a line. */
42const char line_comment_chars[] = ";#";
43
87271fa6 44/* Characters which may be used to separate multiple commands on a
252b5132
RH
45 single line. */
46const char line_separator_chars[] = ";";
47
87271fa6 48/* Characters which are used to indicate an exponent in a floating
252b5132
RH
49 point number. */
50const char EXP_CHARS[] = "eE";
51
87271fa6 52/* Characters which mean that a number is a floating point constant,
252b5132
RH
53 as in 0d1.0. */
54const char FLT_CHARS[] = "dD";
55\f
252b5132 56const relax_typeS md_relax_table[] = {
87271fa6 57 /* bCC relaxing */
252b5132
RH
58 {0x7f, -0x80, 2, 1},
59 {0x7fff, -0x8000, 5, 2},
60 {0x7fffffff, -0x80000000, 7, 0},
61
87271fa6 62 /* bCC relaxing (uncommon cases) */
252b5132
RH
63 {0x7f, -0x80, 3, 4},
64 {0x7fff, -0x8000, 6, 5},
65 {0x7fffffff, -0x80000000, 8, 0},
66
87271fa6 67 /* call relaxing */
252b5132
RH
68 {0x7fff, -0x8000, 5, 7},
69 {0x7fffffff, -0x80000000, 7, 0},
70
87271fa6 71 /* calls relaxing */
252b5132
RH
72 {0x7fff, -0x8000, 4, 9},
73 {0x7fffffff, -0x80000000, 6, 0},
74
87271fa6 75 /* jmp relaxing */
252b5132
RH
76 {0x7f, -0x80, 2, 11},
77 {0x7fff, -0x8000, 3, 12},
78 {0x7fffffff, -0x80000000, 5, 0},
79
80};
81
87271fa6 82/* Local functions. */
252b5132
RH
83static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
84 const struct mn10300_operand *,
85 offsetT, char *, unsigned,
86 unsigned));
87static unsigned long check_operand PARAMS ((unsigned long,
88 const struct mn10300_operand *,
89 offsetT));
90static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
91static boolean data_register_name PARAMS ((expressionS *expressionP));
92static boolean address_register_name PARAMS ((expressionS *expressionP));
93static boolean other_register_name PARAMS ((expressionS *expressionP));
94static void set_arch_mach PARAMS ((int));
95
1485d400
EC
96/* Set linkrelax here to avoid fixups in most sections. */
97int linkrelax = 1;
98
252b5132
RH
99static int current_machine;
100
87271fa6 101/* Fixups. */
252b5132
RH
102#define MAX_INSN_FIXUPS (5)
103struct mn10300_fixup
104{
105 expressionS exp;
106 int opindex;
107 bfd_reloc_code_real_type reloc;
108};
109struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
110static int fc;
111
112/* We must store the value of each register operand so that we can
113 verify that certain registers do not match. */
114int mn10300_reg_operands[MN10300_MAX_OPERANDS];
115\f
116const char *md_shortopts = "";
117struct option md_longopts[] = {
118 {NULL, no_argument, NULL, 0}
119};
87271fa6 120size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
121
122/* The target specific pseudo-ops which we support. */
123const pseudo_typeS md_pseudo_table[] =
124{
b4c1ea07
EC
125 { "file", dwarf2_directive_file, 0 },
126 { "loc", dwarf2_directive_loc, 0 },
0a727238
AO
127 { "am30", set_arch_mach, AM30 },
128 { "am33", set_arch_mach, AM33 },
129 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
130 {NULL, 0, 0}
131};
132
0a727238 133#define HAVE_AM33 (current_machine == AM33)
aa15f6f7 134#define HAVE_AM30 (current_machine == AM30)
0a727238 135
252b5132
RH
136/* Opcode hash table. */
137static struct hash_control *mn10300_hash;
138
87271fa6 139/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
140static const struct reg_name data_registers[] =
141{
142 { "d0", 0 },
143 { "d1", 1 },
144 { "d2", 2 },
145 { "d3", 3 },
146};
87271fa6
NC
147#define DATA_REG_NAME_CNT \
148 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
149
150static const struct reg_name address_registers[] =
151{
152 { "a0", 0 },
153 { "a1", 1 },
154 { "a2", 2 },
155 { "a3", 3 },
156};
87271fa6
NC
157
158#define ADDRESS_REG_NAME_CNT \
159 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 160
85cb2cf9
JL
161static const struct reg_name r_registers[] =
162{
163 { "a0", 8 },
164 { "a1", 9 },
165 { "a2", 10 },
166 { "a3", 11 },
167 { "d0", 12 },
168 { "d1", 13 },
169 { "d2", 14 },
170 { "d3", 15 },
171 { "e0", 0 },
172 { "e1", 1 },
173 { "e10", 10 },
174 { "e11", 11 },
175 { "e12", 12 },
176 { "e13", 13 },
177 { "e14", 14 },
178 { "e15", 15 },
179 { "e2", 2 },
180 { "e3", 3 },
181 { "e4", 4 },
182 { "e5", 5 },
183 { "e6", 6 },
184 { "e7", 7 },
185 { "e8", 8 },
186 { "e9", 9 },
187 { "r0", 0 },
188 { "r1", 1 },
189 { "r10", 10 },
190 { "r11", 11 },
191 { "r12", 12 },
192 { "r13", 13 },
193 { "r14", 14 },
194 { "r15", 15 },
195 { "r2", 2 },
196 { "r3", 3 },
197 { "r4", 4 },
198 { "r5", 5 },
199 { "r6", 6 },
200 { "r7", 7 },
201 { "r8", 8 },
202 { "r9", 9 },
203};
87271fa6
NC
204
205#define R_REG_NAME_CNT \
206 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
207
208static const struct reg_name xr_registers[] =
209{
210 { "mcrh", 2 },
211 { "mcrl", 3 },
212 { "mcvf", 4 },
213 { "mdrq", 1 },
214 { "sp", 0 },
215 { "xr0", 0 },
216 { "xr1", 1 },
217 { "xr10", 10 },
218 { "xr11", 11 },
219 { "xr12", 12 },
220 { "xr13", 13 },
221 { "xr14", 14 },
222 { "xr15", 15 },
223 { "xr2", 2 },
224 { "xr3", 3 },
225 { "xr4", 4 },
226 { "xr5", 5 },
227 { "xr6", 6 },
228 { "xr7", 7 },
229 { "xr8", 8 },
230 { "xr9", 9 },
231};
85cb2cf9 232
87271fa6
NC
233#define XR_REG_NAME_CNT \
234 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132
RH
235
236static const struct reg_name other_registers[] =
237{
238 { "mdr", 0 },
239 { "psw", 0 },
240 { "sp", 0 },
241};
87271fa6
NC
242
243#define OTHER_REG_NAME_CNT \
244 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132
RH
245
246/* reg_name_search does a binary search of the given register table
247 to see if "name" is a valid regiter name. Returns the register
87271fa6 248 number from the array on success, or -1 on failure. */
252b5132
RH
249
250static int
251reg_name_search (regs, regcount, name)
252 const struct reg_name *regs;
253 int regcount;
254 const char *name;
255{
256 int middle, low, high;
257 int cmp;
258
259 low = 0;
260 high = regcount - 1;
261
262 do
263 {
264 middle = (low + high) / 2;
265 cmp = strcasecmp (name, regs[middle].name);
266 if (cmp < 0)
267 high = middle - 1;
268 else if (cmp > 0)
269 low = middle + 1;
87271fa6
NC
270 else
271 return regs[middle].value;
252b5132
RH
272 }
273 while (low <= high);
274 return -1;
275}
276
85cb2cf9
JL
277/* Summary of register_name().
278 *
279 * in: Input_line_pointer points to 1st char of operand.
280 *
281 * out: A expressionS.
282 * The operand may have been a register: in this case, X_op == O_register,
283 * X_add_number is set to the register number, and truth is returned.
284 * Input_line_pointer->(next non-blank) char after operand, or is in
285 * its original state.
286 */
87271fa6 287
85cb2cf9
JL
288static boolean
289r_register_name (expressionP)
290 expressionS *expressionP;
291{
292 int reg_number;
293 char *name;
294 char *start;
295 char c;
296
87271fa6 297 /* Find the spelling of the operand. */
85cb2cf9
JL
298 start = name = input_line_pointer;
299
300 c = get_symbol_end ();
301 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
302
87271fa6
NC
303 /* Look to see if it's in the register table. */
304 if (reg_number >= 0)
85cb2cf9
JL
305 {
306 expressionP->X_op = O_register;
307 expressionP->X_add_number = reg_number;
308
87271fa6 309 /* Make the rest nice. */
85cb2cf9
JL
310 expressionP->X_add_symbol = NULL;
311 expressionP->X_op_symbol = NULL;
87271fa6
NC
312
313 /* Put back the delimiting char. */
314 *input_line_pointer = c;
85cb2cf9
JL
315 return true;
316 }
317 else
318 {
87271fa6
NC
319 /* Reset the line as if we had not done anything. */
320 /* Put back the delimiting char. */
321 *input_line_pointer = c;
322
323 /* Reset input_line pointer. */
324 input_line_pointer = start;
85cb2cf9
JL
325 return false;
326 }
327}
328
329/* Summary of register_name().
330 *
331 * in: Input_line_pointer points to 1st char of operand.
332 *
333 * out: A expressionS.
334 * The operand may have been a register: in this case, X_op == O_register,
335 * X_add_number is set to the register number, and truth is returned.
336 * Input_line_pointer->(next non-blank) char after operand, or is in
337 * its original state.
338 */
87271fa6 339
85cb2cf9
JL
340static boolean
341xr_register_name (expressionP)
342 expressionS *expressionP;
343{
344 int reg_number;
345 char *name;
346 char *start;
347 char c;
348
87271fa6 349 /* Find the spelling of the operand. */
85cb2cf9
JL
350 start = name = input_line_pointer;
351
352 c = get_symbol_end ();
353 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
354
87271fa6
NC
355 /* Look to see if it's in the register table. */
356 if (reg_number >= 0)
85cb2cf9
JL
357 {
358 expressionP->X_op = O_register;
359 expressionP->X_add_number = reg_number;
360
87271fa6 361 /* Make the rest nice. */
85cb2cf9
JL
362 expressionP->X_add_symbol = NULL;
363 expressionP->X_op_symbol = NULL;
87271fa6
NC
364
365 /* Put back the delimiting char. */
366 *input_line_pointer = c;
85cb2cf9
JL
367 return true;
368 }
369 else
370 {
87271fa6
NC
371 /* Reset the line as if we had not done anything. */
372 /* Put back the delimiting char. */
373 *input_line_pointer = c;
374
375 /* Reset input_line pointer. */
376 input_line_pointer = start;
85cb2cf9
JL
377 return false;
378 }
379}
252b5132
RH
380
381/* Summary of register_name().
382 *
383 * in: Input_line_pointer points to 1st char of operand.
384 *
385 * out: A expressionS.
386 * The operand may have been a register: in this case, X_op == O_register,
387 * X_add_number is set to the register number, and truth is returned.
388 * Input_line_pointer->(next non-blank) char after operand, or is in
389 * its original state.
390 */
87271fa6 391
252b5132
RH
392static boolean
393data_register_name (expressionP)
394 expressionS *expressionP;
395{
396 int reg_number;
397 char *name;
398 char *start;
399 char c;
400
87271fa6 401 /* Find the spelling of the operand. */
252b5132
RH
402 start = name = input_line_pointer;
403
404 c = get_symbol_end ();
405 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
406
87271fa6
NC
407 /* Look to see if it's in the register table. */
408 if (reg_number >= 0)
252b5132
RH
409 {
410 expressionP->X_op = O_register;
411 expressionP->X_add_number = reg_number;
412
87271fa6 413 /* Make the rest nice. */
252b5132
RH
414 expressionP->X_add_symbol = NULL;
415 expressionP->X_op_symbol = NULL;
87271fa6
NC
416
417 /* Put back the delimiting char. */
418 *input_line_pointer = c;
252b5132
RH
419 return true;
420 }
421 else
422 {
87271fa6
NC
423 /* Reset the line as if we had not done anything. */
424 /* Put back the delimiting char. */
425 *input_line_pointer = c;
426
427 /* Reset input_line pointer. */
428 input_line_pointer = start;
252b5132
RH
429 return false;
430 }
431}
432
433/* Summary of register_name().
434 *
435 * in: Input_line_pointer points to 1st char of operand.
436 *
437 * out: A expressionS.
438 * The operand may have been a register: in this case, X_op == O_register,
439 * X_add_number is set to the register number, and truth is returned.
440 * Input_line_pointer->(next non-blank) char after operand, or is in
441 * its original state.
442 */
87271fa6 443
252b5132
RH
444static boolean
445address_register_name (expressionP)
446 expressionS *expressionP;
447{
448 int reg_number;
449 char *name;
450 char *start;
451 char c;
452
87271fa6 453 /* Find the spelling of the operand. */
252b5132
RH
454 start = name = input_line_pointer;
455
456 c = get_symbol_end ();
457 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
458
87271fa6
NC
459 /* Look to see if it's in the register table. */
460 if (reg_number >= 0)
252b5132
RH
461 {
462 expressionP->X_op = O_register;
463 expressionP->X_add_number = reg_number;
464
87271fa6 465 /* Make the rest nice. */
252b5132
RH
466 expressionP->X_add_symbol = NULL;
467 expressionP->X_op_symbol = NULL;
87271fa6
NC
468
469 /* Put back the delimiting char. */
470 *input_line_pointer = c;
252b5132
RH
471 return true;
472 }
473 else
474 {
87271fa6
NC
475 /* Reset the line as if we had not done anything. */
476 /* Put back the delimiting char. */
477 *input_line_pointer = c;
478
479 /* Reset input_line pointer. */
480 input_line_pointer = start;
481
252b5132
RH
482 return false;
483 }
484}
485
486/* Summary of register_name().
487 *
488 * in: Input_line_pointer points to 1st char of operand.
489 *
490 * out: A expressionS.
491 * The operand may have been a register: in this case, X_op == O_register,
492 * X_add_number is set to the register number, and truth is returned.
493 * Input_line_pointer->(next non-blank) char after operand, or is in
494 * its original state.
495 */
87271fa6 496
252b5132
RH
497static boolean
498other_register_name (expressionP)
499 expressionS *expressionP;
500{
501 int reg_number;
502 char *name;
503 char *start;
504 char c;
505
87271fa6 506 /* Find the spelling of the operand. */
252b5132
RH
507 start = name = input_line_pointer;
508
509 c = get_symbol_end ();
510 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
511
87271fa6
NC
512 /* Look to see if it's in the register table. */
513 if (reg_number >= 0)
252b5132
RH
514 {
515 expressionP->X_op = O_register;
516 expressionP->X_add_number = reg_number;
517
87271fa6 518 /* Make the rest nice. */
252b5132
RH
519 expressionP->X_add_symbol = NULL;
520 expressionP->X_op_symbol = NULL;
87271fa6
NC
521
522 /* Put back the delimiting char. */
523 *input_line_pointer = c;
252b5132
RH
524 return true;
525 }
526 else
527 {
87271fa6
NC
528 /* Reset the line as if we had not done anything. */
529 /* Put back the delimiting char. */
530 *input_line_pointer = c;
531
532 /* Reset input_line pointer. */
533 input_line_pointer = start;
252b5132
RH
534 return false;
535 }
536}
537
538void
539md_show_usage (stream)
87271fa6 540 FILE *stream;
252b5132 541{
87271fa6 542 fprintf (stream, _("MN10300 options:\n\
252b5132 543none yet\n"));
87271fa6 544}
252b5132
RH
545
546int
547md_parse_option (c, arg)
b4c1ea07
EC
548 int c ATTRIBUTE_UNUSED;
549 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
550{
551 return 0;
552}
553
554symbolS *
555md_undefined_symbol (name)
b4c1ea07 556 char *name ATTRIBUTE_UNUSED;
252b5132
RH
557{
558 return 0;
559}
560
561char *
562md_atof (type, litp, sizep)
87271fa6
NC
563 int type;
564 char *litp;
565 int *sizep;
252b5132
RH
566{
567 int prec;
568 LITTLENUM_TYPE words[4];
569 char *t;
570 int i;
571
572 switch (type)
573 {
574 case 'f':
575 prec = 2;
576 break;
577
578 case 'd':
579 prec = 4;
580 break;
581
582 default:
583 *sizep = 0;
584 return "bad call to md_atof";
585 }
87271fa6 586
252b5132
RH
587 t = atof_ieee (input_line_pointer, type, words);
588 if (t)
589 input_line_pointer = t;
590
591 *sizep = prec * 2;
592
593 for (i = prec - 1; i >= 0; i--)
594 {
595 md_number_to_chars (litp, (valueT) words[i], 2);
596 litp += 2;
597 }
598
599 return NULL;
600}
601
252b5132
RH
602void
603md_convert_frag (abfd, sec, fragP)
b4c1ea07 604 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
605 asection *sec;
606 fragS *fragP;
252b5132
RH
607{
608 static unsigned long label_count = 0;
609 char buf[40];
610
611 subseg_change (sec, 0);
612 if (fragP->fr_subtype == 0)
613 {
614 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
615 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
616 fragP->fr_var = 0;
617 fragP->fr_fix += 2;
618 }
619 else if (fragP->fr_subtype == 1)
620 {
621 /* Reverse the condition of the first branch. */
622 int offset = fragP->fr_fix;
623 int opcode = fragP->fr_literal[offset] & 0xff;
624
625 switch (opcode)
626 {
627 case 0xc8:
628 opcode = 0xc9;
629 break;
630 case 0xc9:
631 opcode = 0xc8;
632 break;
633 case 0xc0:
634 opcode = 0xc2;
635 break;
636 case 0xc2:
637 opcode = 0xc0;
638 break;
639 case 0xc3:
640 opcode = 0xc1;
641 break;
642 case 0xc1:
643 opcode = 0xc3;
644 break;
645 case 0xc4:
646 opcode = 0xc6;
647 break;
648 case 0xc6:
649 opcode = 0xc4;
650 break;
651 case 0xc7:
652 opcode = 0xc5;
653 break;
654 case 0xc5:
655 opcode = 0xc7;
656 break;
657 default:
658 abort ();
659 }
660 fragP->fr_literal[offset] = opcode;
661
662 /* Create a fixup for the reversed conditional branch. */
0aa529cb 663 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
664 fix_new (fragP, fragP->fr_fix + 1, 1,
665 symbol_new (buf, sec, 0, fragP->fr_next),
666 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
667
668 /* Now create the unconditional branch + fixup to the
669 final target. */
670 fragP->fr_literal[offset + 2] = 0xcc;
671 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
672 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
673 fragP->fr_var = 0;
674 fragP->fr_fix += 5;
675 }
676 else if (fragP->fr_subtype == 2)
677 {
678 /* Reverse the condition of the first branch. */
679 int offset = fragP->fr_fix;
680 int opcode = fragP->fr_literal[offset] & 0xff;
681
682 switch (opcode)
683 {
684 case 0xc8:
685 opcode = 0xc9;
686 break;
687 case 0xc9:
688 opcode = 0xc8;
689 break;
690 case 0xc0:
691 opcode = 0xc2;
692 break;
693 case 0xc2:
694 opcode = 0xc0;
695 break;
696 case 0xc3:
697 opcode = 0xc1;
698 break;
699 case 0xc1:
700 opcode = 0xc3;
701 break;
702 case 0xc4:
703 opcode = 0xc6;
704 break;
705 case 0xc6:
706 opcode = 0xc4;
707 break;
708 case 0xc7:
709 opcode = 0xc5;
710 break;
711 case 0xc5:
712 opcode = 0xc7;
713 break;
714 default:
715 abort ();
716 }
717 fragP->fr_literal[offset] = opcode;
718
719 /* Create a fixup for the reversed conditional branch. */
0aa529cb 720 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
721 fix_new (fragP, fragP->fr_fix + 1, 1,
722 symbol_new (buf, sec, 0, fragP->fr_next),
723 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
724
725 /* Now create the unconditional branch + fixup to the
726 final target. */
727 fragP->fr_literal[offset + 2] = 0xdc;
728 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
729 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
730 fragP->fr_var = 0;
731 fragP->fr_fix += 7;
732 }
733 else if (fragP->fr_subtype == 3)
734 {
735 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
736 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
737 fragP->fr_var = 0;
738 fragP->fr_fix += 3;
739 }
740 else if (fragP->fr_subtype == 4)
741 {
742 /* Reverse the condition of the first branch. */
743 int offset = fragP->fr_fix;
744 int opcode = fragP->fr_literal[offset + 1] & 0xff;
745
746 switch (opcode)
747 {
748 case 0xe8:
749 opcode = 0xe9;
750 break;
751 case 0xe9:
752 opcode = 0xe8;
753 break;
754 case 0xea:
755 opcode = 0xeb;
756 break;
757 case 0xeb:
758 opcode = 0xea;
759 break;
760 default:
761 abort ();
762 }
763 fragP->fr_literal[offset + 1] = opcode;
764
765 /* Create a fixup for the reversed conditional branch. */
0aa529cb 766 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
767 fix_new (fragP, fragP->fr_fix + 2, 1,
768 symbol_new (buf, sec, 0, fragP->fr_next),
769 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
770
771 /* Now create the unconditional branch + fixup to the
772 final target. */
773 fragP->fr_literal[offset + 3] = 0xcc;
774 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
775 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
776 fragP->fr_var = 0;
777 fragP->fr_fix += 6;
778 }
779 else if (fragP->fr_subtype == 5)
780 {
781 /* Reverse the condition of the first branch. */
782 int offset = fragP->fr_fix;
783 int opcode = fragP->fr_literal[offset + 1] & 0xff;
784
785 switch (opcode)
786 {
787 case 0xe8:
788 opcode = 0xe9;
789 break;
790 case 0xea:
791 opcode = 0xeb;
792 break;
793 case 0xeb:
794 opcode = 0xea;
795 break;
796 default:
797 abort ();
798 }
799 fragP->fr_literal[offset + 1] = opcode;
800
801 /* Create a fixup for the reversed conditional branch. */
0aa529cb 802 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
803 fix_new (fragP, fragP->fr_fix + 2, 1,
804 symbol_new (buf, sec, 0, fragP->fr_next),
805 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
806
807 /* Now create the unconditional branch + fixup to the
808 final target. */
809 fragP->fr_literal[offset + 3] = 0xdc;
810 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
811 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
812 fragP->fr_var = 0;
813 fragP->fr_fix += 8;
814 }
815 else if (fragP->fr_subtype == 6)
816 {
817 int offset = fragP->fr_fix;
818 fragP->fr_literal[offset] = 0xcd;
819 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
820 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
821 fragP->fr_var = 0;
822 fragP->fr_fix += 5;
823 }
824 else if (fragP->fr_subtype == 7)
825 {
826 int offset = fragP->fr_fix;
827 fragP->fr_literal[offset] = 0xdd;
828 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
829 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
830
831 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
832 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
833 fragP->fr_var = 0;
834 fragP->fr_fix += 7;
835 }
836 else if (fragP->fr_subtype == 8)
837 {
838 int offset = fragP->fr_fix;
839 fragP->fr_literal[offset] = 0xfa;
840 fragP->fr_literal[offset + 1] = 0xff;
841 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
842 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
843 fragP->fr_var = 0;
844 fragP->fr_fix += 4;
845 }
846 else if (fragP->fr_subtype == 9)
847 {
848 int offset = fragP->fr_fix;
849 fragP->fr_literal[offset] = 0xfc;
850 fragP->fr_literal[offset + 1] = 0xff;
851
852 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
853 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
854 fragP->fr_var = 0;
855 fragP->fr_fix += 6;
856 }
857 else if (fragP->fr_subtype == 10)
858 {
859 fragP->fr_literal[fragP->fr_fix] = 0xca;
860 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
861 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
862 fragP->fr_var = 0;
863 fragP->fr_fix += 2;
864 }
865 else if (fragP->fr_subtype == 11)
866 {
867 int offset = fragP->fr_fix;
868 fragP->fr_literal[offset] = 0xcc;
869
870 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
871 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
872 fragP->fr_var = 0;
873 fragP->fr_fix += 3;
874 }
875 else if (fragP->fr_subtype == 12)
876 {
877 int offset = fragP->fr_fix;
878 fragP->fr_literal[offset] = 0xdc;
879
880 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
881 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
882 fragP->fr_var = 0;
883 fragP->fr_fix += 5;
884 }
885 else
886 abort ();
887}
888
889valueT
890md_section_align (seg, addr)
891 asection *seg;
892 valueT addr;
893{
894 int align = bfd_get_section_alignment (stdoutput, seg);
895 return ((addr + (1 << align) - 1) & (-1 << align));
896}
897
898void
899md_begin ()
900{
901 char *prev_name = "";
902 register const struct mn10300_opcode *op;
903
87271fa6 904 mn10300_hash = hash_new ();
252b5132
RH
905
906 /* Insert unique names into hash table. The MN10300 instruction set
907 has many identical opcode names that have different opcodes based
908 on the operands. This hash table then provides a quick index to
909 the first opcode with a particular name in the opcode table. */
910
911 op = mn10300_opcodes;
912 while (op->name)
913 {
87271fa6 914 if (strcmp (prev_name, op->name))
252b5132
RH
915 {
916 prev_name = (char *) op->name;
917 hash_insert (mn10300_hash, op->name, (char *) op);
918 }
919 op++;
920 }
921
252b5132 922 /* Set the default machine type. */
0a727238 923 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
924 as_warn (_("could not set architecture and machine"));
925
0a727238 926 current_machine = MN103;
252b5132
RH
927}
928
929void
87271fa6 930md_assemble (str)
252b5132
RH
931 char *str;
932{
933 char *s;
934 struct mn10300_opcode *opcode;
935 struct mn10300_opcode *next_opcode;
936 const unsigned char *opindex_ptr;
937 int next_opindex, relaxable;
3c07fb76 938 unsigned long insn, extension, size = 0, real_size;
252b5132
RH
939 char *f;
940 int i;
941 int match;
942
943 /* Get the opcode. */
87271fa6 944 for (s = str; *s != '\0' && !isspace (*s); s++)
252b5132
RH
945 ;
946 if (*s != '\0')
947 *s++ = '\0';
948
87271fa6
NC
949 /* Find the first opcode with the proper name. */
950 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
951 if (opcode == NULL)
952 {
953 as_bad (_("Unrecognized opcode: `%s'"), str);
954 return;
955 }
956
957 str = s;
958 while (isspace (*str))
959 ++str;
960
961 input_line_pointer = str;
962
87271fa6 963 for (;;)
252b5132
RH
964 {
965 const char *errmsg;
966 int op_idx;
967 char *hold;
968 int extra_shift = 0;
969
252b5132
RH
970 errmsg = _("Invalid opcode/operands");
971
972 /* Reset the array of register operands. */
973 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
974
975 relaxable = 0;
976 fc = 0;
977 match = 0;
978 next_opindex = 0;
979 insn = opcode->opcode;
980 extension = 0;
981
982 /* If the instruction is not available on the current machine
983 then it can not possibly match. */
984 if (opcode->machine
aa15f6f7
AO
985 && !(opcode->machine == AM33 && HAVE_AM33)
986 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
987 goto error;
988
989 for (op_idx = 1, opindex_ptr = opcode->operands;
990 *opindex_ptr != 0;
991 opindex_ptr++, op_idx++)
992 {
993 const struct mn10300_operand *operand;
994 expressionS ex;
995
996 if (next_opindex == 0)
997 {
998 operand = &mn10300_operands[*opindex_ptr];
999 }
1000 else
1001 {
1002 operand = &mn10300_operands[next_opindex];
1003 next_opindex = 0;
1004 }
1005
1006 while (*str == ' ' || *str == ',')
1007 ++str;
1008
1009 if (operand->flags & MN10300_OPERAND_RELAX)
1010 relaxable = 1;
1011
87271fa6 1012 /* Gather the operand. */
252b5132
RH
1013 hold = input_line_pointer;
1014 input_line_pointer = str;
1015
1016 if (operand->flags & MN10300_OPERAND_PAREN)
1017 {
1018 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1019 {
1020 input_line_pointer = hold;
1021 str = hold;
1022 goto error;
1023 }
1024 input_line_pointer++;
1025 goto keep_going;
1026 }
1027 /* See if we can match the operands. */
1028 else if (operand->flags & MN10300_OPERAND_DREG)
1029 {
1030 if (!data_register_name (&ex))
1031 {
1032 input_line_pointer = hold;
1033 str = hold;
1034 goto error;
1035 }
1036 }
1037 else if (operand->flags & MN10300_OPERAND_AREG)
1038 {
1039 if (!address_register_name (&ex))
1040 {
1041 input_line_pointer = hold;
1042 str = hold;
1043 goto error;
1044 }
1045 }
1046 else if (operand->flags & MN10300_OPERAND_SP)
1047 {
1048 char *start = input_line_pointer;
1049 char c = get_symbol_end ();
1050
1051 if (strcasecmp (start, "sp") != 0)
1052 {
1053 *input_line_pointer = c;
1054 input_line_pointer = hold;
1055 str = hold;
1056 goto error;
1057 }
1058 *input_line_pointer = c;
1059 goto keep_going;
1060 }
85cb2cf9
JL
1061 else if (operand->flags & MN10300_OPERAND_RREG)
1062 {
1063 if (!r_register_name (&ex))
1064 {
1065 input_line_pointer = hold;
1066 str = hold;
1067 goto error;
1068 }
1069 }
1070 else if (operand->flags & MN10300_OPERAND_XRREG)
1071 {
1072 if (!xr_register_name (&ex))
1073 {
1074 input_line_pointer = hold;
1075 str = hold;
1076 goto error;
1077 }
1078 }
1079 else if (operand->flags & MN10300_OPERAND_USP)
1080 {
1081 char *start = input_line_pointer;
1082 char c = get_symbol_end ();
1083
1084 if (strcasecmp (start, "usp") != 0)
1085 {
1086 *input_line_pointer = c;
1087 input_line_pointer = hold;
1088 str = hold;
1089 goto error;
1090 }
1091 *input_line_pointer = c;
1092 goto keep_going;
1093 }
1094 else if (operand->flags & MN10300_OPERAND_SSP)
1095 {
1096 char *start = input_line_pointer;
1097 char c = get_symbol_end ();
1098
1099 if (strcasecmp (start, "ssp") != 0)
1100 {
1101 *input_line_pointer = c;
1102 input_line_pointer = hold;
1103 str = hold;
1104 goto error;
1105 }
1106 *input_line_pointer = c;
1107 goto keep_going;
1108 }
1109 else if (operand->flags & MN10300_OPERAND_MSP)
1110 {
1111 char *start = input_line_pointer;
1112 char c = get_symbol_end ();
1113
1114 if (strcasecmp (start, "msp") != 0)
1115 {
1116 *input_line_pointer = c;
1117 input_line_pointer = hold;
1118 str = hold;
1119 goto error;
1120 }
1121 *input_line_pointer = c;
1122 goto keep_going;
1123 }
1124 else if (operand->flags & MN10300_OPERAND_PC)
1125 {
1126 char *start = input_line_pointer;
1127 char c = get_symbol_end ();
1128
1129 if (strcasecmp (start, "pc") != 0)
1130 {
1131 *input_line_pointer = c;
1132 input_line_pointer = hold;
1133 str = hold;
1134 goto error;
1135 }
1136 *input_line_pointer = c;
1137 goto keep_going;
1138 }
1139 else if (operand->flags & MN10300_OPERAND_EPSW)
1140 {
1141 char *start = input_line_pointer;
1142 char c = get_symbol_end ();
1143
1144 if (strcasecmp (start, "epsw") != 0)
1145 {
1146 *input_line_pointer = c;
1147 input_line_pointer = hold;
1148 str = hold;
1149 goto error;
1150 }
1151 *input_line_pointer = c;
1152 goto keep_going;
1153 }
1154 else if (operand->flags & MN10300_OPERAND_PLUS)
1155 {
1156 if (*input_line_pointer != '+')
1157 {
1158 input_line_pointer = hold;
1159 str = hold;
1160 goto error;
1161 }
1162 input_line_pointer++;
1163 goto keep_going;
1164 }
252b5132
RH
1165 else if (operand->flags & MN10300_OPERAND_PSW)
1166 {
1167 char *start = input_line_pointer;
1168 char c = get_symbol_end ();
1169
1170 if (strcasecmp (start, "psw") != 0)
1171 {
1172 *input_line_pointer = c;
1173 input_line_pointer = hold;
1174 str = hold;
1175 goto error;
1176 }
1177 *input_line_pointer = c;
1178 goto keep_going;
1179 }
1180 else if (operand->flags & MN10300_OPERAND_MDR)
1181 {
1182 char *start = input_line_pointer;
1183 char c = get_symbol_end ();
1184
1185 if (strcasecmp (start, "mdr") != 0)
1186 {
1187 *input_line_pointer = c;
1188 input_line_pointer = hold;
1189 str = hold;
1190 goto error;
1191 }
1192 *input_line_pointer = c;
1193 goto keep_going;
1194 }
1195 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1196 {
1197 unsigned int value = 0;
1198 if (*input_line_pointer != '[')
1199 {
1200 input_line_pointer = hold;
1201 str = hold;
1202 goto error;
1203 }
1204
1205 /* Eat the '['. */
1206 input_line_pointer++;
87271fa6 1207
252b5132 1208 /* We used to reject a null register list here; however,
87271fa6
NC
1209 we accept it now so the compiler can emit "call"
1210 instructions for all calls to named functions.
252b5132
RH
1211
1212 The linker can then fill in the appropriate bits for the
1213 register list and stack size or change the instruction
1214 into a "calls" if using "call" is not profitable. */
1215 while (*input_line_pointer != ']')
1216 {
1217 char *start;
1218 char c;
1219
1220 if (*input_line_pointer == ',')
1221 input_line_pointer++;
1222
1223 start = input_line_pointer;
1224 c = get_symbol_end ();
1225
1226 if (strcasecmp (start, "d2") == 0)
1227 {
1228 value |= 0x80;
1229 *input_line_pointer = c;
1230 }
1231 else if (strcasecmp (start, "d3") == 0)
1232 {
1233 value |= 0x40;
1234 *input_line_pointer = c;
1235 }
1236 else if (strcasecmp (start, "a2") == 0)
1237 {
1238 value |= 0x20;
1239 *input_line_pointer = c;
1240 }
1241 else if (strcasecmp (start, "a3") == 0)
1242 {
1243 value |= 0x10;
1244 *input_line_pointer = c;
1245 }
1246 else if (strcasecmp (start, "other") == 0)
1247 {
1248 value |= 0x08;
1249 *input_line_pointer = c;
1250 }
0a727238 1251 else if (HAVE_AM33
85cb2cf9
JL
1252 && strcasecmp (start, "exreg0") == 0)
1253 {
1254 value |= 0x04;
1255 *input_line_pointer = c;
1256 }
0a727238 1257 else if (HAVE_AM33
85cb2cf9
JL
1258 && strcasecmp (start, "exreg1") == 0)
1259 {
1260 value |= 0x02;
1261 *input_line_pointer = c;
1262 }
0a727238 1263 else if (HAVE_AM33
85cb2cf9
JL
1264 && strcasecmp (start, "exother") == 0)
1265 {
1266 value |= 0x01;
1267 *input_line_pointer = c;
1268 }
0a727238 1269 else if (HAVE_AM33
85cb2cf9
JL
1270 && strcasecmp (start, "all") == 0)
1271 {
1272 value |= 0xff;
1273 *input_line_pointer = c;
1274 }
252b5132
RH
1275 else
1276 {
1277 input_line_pointer = hold;
1278 str = hold;
1279 goto error;
1280 }
1281 }
1282 input_line_pointer++;
1283 mn10300_insert_operand (&insn, &extension, operand,
1284 value, (char *) NULL, 0, 0);
1285 goto keep_going;
1286
1287 }
1288 else if (data_register_name (&ex))
1289 {
1290 input_line_pointer = hold;
1291 str = hold;
1292 goto error;
1293 }
1294 else if (address_register_name (&ex))
1295 {
1296 input_line_pointer = hold;
1297 str = hold;
1298 goto error;
1299 }
1300 else if (other_register_name (&ex))
1301 {
1302 input_line_pointer = hold;
1303 str = hold;
1304 goto error;
1305 }
0a727238 1306 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1307 {
1308 input_line_pointer = hold;
1309 str = hold;
1310 goto error;
1311 }
0a727238 1312 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1313 {
1314 input_line_pointer = hold;
1315 str = hold;
1316 goto error;
1317 }
252b5132
RH
1318 else if (*str == ')' || *str == '(')
1319 {
1320 input_line_pointer = hold;
1321 str = hold;
1322 goto error;
1323 }
1324 else
1325 {
1326 expression (&ex);
1327 }
1328
87271fa6 1329 switch (ex.X_op)
252b5132
RH
1330 {
1331 case O_illegal:
1332 errmsg = _("illegal operand");
1333 goto error;
1334 case O_absent:
1335 errmsg = _("missing operand");
1336 goto error;
1337 case O_register:
1338 {
1339 int mask;
1340
1341 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1342 if (HAVE_AM33)
1343 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
252b5132
RH
1344 if ((operand->flags & mask) == 0)
1345 {
1346 input_line_pointer = hold;
1347 str = hold;
1348 goto error;
1349 }
87271fa6 1350
252b5132
RH
1351 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1352 extra_shift = 8;
1353 else if (opcode->format == FMT_D2
1354 || opcode->format == FMT_D4
1355 || opcode->format == FMT_S2
1356 || opcode->format == FMT_S4
1357 || opcode->format == FMT_S6
1358 || opcode->format == FMT_D5)
1359 extra_shift = 16;
85cb2cf9
JL
1360 else if (opcode->format == FMT_D7)
1361 extra_shift = 8;
1362 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1363 extra_shift = 8;
252b5132
RH
1364 else
1365 extra_shift = 0;
87271fa6 1366
252b5132
RH
1367 mn10300_insert_operand (&insn, &extension, operand,
1368 ex.X_add_number, (char *) NULL,
1369 0, extra_shift);
1370
252b5132
RH
1371 /* And note the register number in the register array. */
1372 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1373 break;
1374 }
1375
1376 case O_constant:
1377 /* If this operand can be promoted, and it doesn't
1378 fit into the allocated bitfield for this insn,
1379 then promote it (ie this opcode does not match). */
1380 if (operand->flags
1381 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1382 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1383 {
1384 input_line_pointer = hold;
1385 str = hold;
1386 goto error;
1387 }
1388
1389 mn10300_insert_operand (&insn, &extension, operand,
1390 ex.X_add_number, (char *) NULL,
1391 0, 0);
1392 break;
1393
1394 default:
1395 /* If this operand can be promoted, then this opcode didn't
1396 match since we can't know if it needed promotion! */
1397 if (operand->flags & MN10300_OPERAND_PROMOTE)
1398 {
1399 input_line_pointer = hold;
1400 str = hold;
1401 goto error;
1402 }
1403
1404 /* We need to generate a fixup for this expression. */
1405 if (fc >= MAX_INSN_FIXUPS)
1406 as_fatal (_("too many fixups"));
1407 fixups[fc].exp = ex;
1408 fixups[fc].opindex = *opindex_ptr;
1409 fixups[fc].reloc = BFD_RELOC_UNUSED;
1410 ++fc;
1411 break;
1412 }
1413
1414keep_going:
1415 str = input_line_pointer;
1416 input_line_pointer = hold;
1417
1418 while (*str == ' ' || *str == ',')
1419 ++str;
1420
1421 }
1422
1423 /* Make sure we used all the operands! */
1424 if (*str != ',')
1425 match = 1;
1426
1427 /* If this instruction has registers that must not match, verify
1428 that they do indeed not match. */
1429 if (opcode->no_match_operands)
1430 {
1431 int i;
1432
1433 /* Look at each operand to see if it's marked. */
1434 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1435 {
1436 if ((1 << i) & opcode->no_match_operands)
1437 {
1438 int j;
1439
1440 /* operand I is marked. Check that it does not match any
1441 operands > I which are marked. */
1442 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1443 {
1444 if (((1 << j) & opcode->no_match_operands)
1445 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1446 {
1447 errmsg = _("Invalid register specification.");
1448 match = 0;
1449 goto error;
1450 }
1451 }
1452 }
1453 }
1454 }
1455
1456 error:
1457 if (match == 0)
87271fa6 1458 {
252b5132 1459 next_opcode = opcode + 1;
87271fa6 1460 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1461 {
1462 opcode = next_opcode;
1463 continue;
1464 }
87271fa6 1465
252b5132
RH
1466 as_bad ("%s", errmsg);
1467 return;
87271fa6 1468 }
252b5132
RH
1469 break;
1470 }
87271fa6 1471
252b5132
RH
1472 while (isspace (*str))
1473 ++str;
1474
1475 if (*str != '\0')
1476 as_bad (_("junk at end of line: `%s'"), str);
1477
1478 input_line_pointer = str;
1479
1480 /* Determine the size of the instruction. */
1481 if (opcode->format == FMT_S0)
1482 size = 1;
1483
1484 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1485 size = 2;
1486
1487 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1488 size = 3;
1489
85cb2cf9
JL
1490 if (opcode->format == FMT_D6)
1491 size = 3;
1492
1493 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1494 size = 4;
1495
1496 if (opcode->format == FMT_D8)
1497 size = 6;
1498
1499 if (opcode->format == FMT_D9)
1500 size = 7;
252b5132
RH
1501
1502 if (opcode->format == FMT_S4)
1503 size = 5;
1504
1505 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1506 size = 7;
1507
1508 if (opcode->format == FMT_D2)
1509 size = 4;
1510
1511 if (opcode->format == FMT_D4)
1512 size = 6;
1513
3c07fb76
AO
1514 real_size = size;
1515
252b5132
RH
1516 if (relaxable && fc > 0)
1517 {
1518 int type;
1519
87271fa6 1520 /* bCC */
252b5132
RH
1521 if (size == 2)
1522 {
1523 /* Handle bra specially. Basically treat it like jmp so
1524 that we automatically handle 8, 16 and 32 bit offsets
1525 correctly as well as jumps to an undefined address.
1526
1527 It is also important to not treat it like other bCC
1528 instructions since the long forms of bra is different
1529 from other bCC instructions. */
1530 if (opcode->opcode == 0xca00)
1531 type = 10;
1532 else
1533 type = 0;
1534 }
87271fa6 1535 /* call */
252b5132 1536 else if (size == 5)
87271fa6
NC
1537 type = 6;
1538 /* calls */
252b5132
RH
1539 else if (size == 4)
1540 type = 8;
87271fa6 1541 /* jmp */
252b5132
RH
1542 else if (size == 3 && opcode->opcode == 0xcc0000)
1543 type = 10;
87271fa6 1544 /* bCC (uncommon cases) */
252b5132
RH
1545 else
1546 type = 3;
1547
1548 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1549 fixups[0].exp.X_add_symbol,
1550 fixups[0].exp.X_add_number,
1551 (char *)fixups[0].opindex);
87271fa6 1552
252b5132
RH
1553 /* This is pretty hokey. We basically just care about the
1554 opcode, so we have to write out the first word big endian.
1555
1556 The exception is "call", which has two operands that we
1557 care about.
1558
1559 The first operand (the register list) happens to be in the
1560 first instruction word, and will be in the right place if
1561 we output the first word in big endian mode.
1562
1563 The second operand (stack size) is in the extension word,
1564 and we want it to appear as the first character in the extension
1565 word (as it appears in memory). Luckily, writing the extension
1566 word in big endian format will do what we want. */
1567 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1568 if (size > 8)
1569 {
1570 number_to_chars_bigendian (f + 4, extension, 4);
1571 number_to_chars_bigendian (f + 8, 0, size - 8);
1572 }
1573 else if (size > 4)
1574 number_to_chars_bigendian (f + 4, extension, size - 4);
1575 }
1576 else
1577 {
1578 /* Allocate space for the instruction. */
1579 f = frag_more (size);
1580
1581 /* Fill in bytes for the instruction. Note that opcode fields
1582 are written big-endian, 16 & 32bit immediates are written
1583 little endian. Egad. */
1584 if (opcode->format == FMT_S0
1585 || opcode->format == FMT_S1
1586 || opcode->format == FMT_D0
85cb2cf9
JL
1587 || opcode->format == FMT_D6
1588 || opcode->format == FMT_D7
1589 || opcode->format == FMT_D10
252b5132
RH
1590 || opcode->format == FMT_D1)
1591 {
1592 number_to_chars_bigendian (f, insn, size);
1593 }
1594 else if (opcode->format == FMT_S2
1595 && opcode->opcode != 0xdf0000
1596 && opcode->opcode != 0xde0000)
1597 {
1598 /* A format S2 instruction that is _not_ "ret" and "retf". */
1599 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1600 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1601 }
1602 else if (opcode->format == FMT_S2)
1603 {
1604 /* This must be a ret or retf, which is written entirely in
1605 big-endian format. */
1606 number_to_chars_bigendian (f, insn, 3);
1607 }
1608 else if (opcode->format == FMT_S4
1609 && opcode->opcode != 0xdc000000)
1610 {
1611 /* This must be a format S4 "call" instruction. What a pain. */
1612 unsigned long temp = (insn >> 8) & 0xffff;
1613 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1614 number_to_chars_littleendian (f + 1, temp, 2);
1615 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1616 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1617 }
1618 else if (opcode->format == FMT_S4)
1619 {
1620 /* This must be a format S4 "jmp" instruction. */
1621 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1622 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1623 number_to_chars_littleendian (f + 1, temp, 4);
1624 }
1625 else if (opcode->format == FMT_S6)
1626 {
1627 unsigned long temp = ((insn & 0xffffff) << 8)
1628 | ((extension >> 16) & 0xff);
1629 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1630 number_to_chars_littleendian (f + 1, temp, 4);
1631 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1632 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1633 }
1634 else if (opcode->format == FMT_D2
1635 && opcode->opcode != 0xfaf80000
1636 && opcode->opcode != 0xfaf00000
1637 && opcode->opcode != 0xfaf40000)
1638 {
1639 /* A format D2 instruction where the 16bit immediate is
1640 really a single 16bit value, not two 8bit values. */
1641 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1642 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1643 }
1644 else if (opcode->format == FMT_D2)
1645 {
1646 /* A format D2 instruction where the 16bit immediate
1647 is really two 8bit immediates. */
1648 number_to_chars_bigendian (f, insn, 4);
1649 }
1650 else if (opcode->format == FMT_D4)
1651 {
1652 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 1653
252b5132
RH
1654 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1655 number_to_chars_littleendian (f + 2, temp, 4);
1656 }
1657 else if (opcode->format == FMT_D5)
1658 {
87271fa6
NC
1659 unsigned long temp = (((insn & 0xffff) << 16)
1660 | ((extension >> 8) & 0xffff));
1661
252b5132
RH
1662 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1663 number_to_chars_littleendian (f + 2, temp, 4);
1664 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1665 }
85cb2cf9
JL
1666 else if (opcode->format == FMT_D8)
1667 {
87271fa6
NC
1668 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1669
1670 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1671 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1672 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
1673 }
1674 else if (opcode->format == FMT_D9)
1675 {
87271fa6
NC
1676 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1677
1678 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1679 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 1680 }
252b5132
RH
1681
1682 /* Create any fixups. */
1683 for (i = 0; i < fc; i++)
1684 {
1685 const struct mn10300_operand *operand;
1686
1687 operand = &mn10300_operands[fixups[i].opindex];
1688 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1689 {
1690 reloc_howto_type *reloc_howto;
1691 int size;
1692 int offset;
1693 fixS *fixP;
1694
87271fa6
NC
1695 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1696 fixups[i].reloc);
252b5132
RH
1697
1698 if (!reloc_howto)
87271fa6
NC
1699 abort ();
1700
252b5132
RH
1701 size = bfd_get_reloc_size (reloc_howto);
1702
1703 if (size < 1 || size > 4)
87271fa6 1704 abort ();
252b5132
RH
1705
1706 offset = 4 - size;
1707 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1708 size, &fixups[i].exp,
1709 reloc_howto->pc_relative,
1710 fixups[i].reloc);
1711 }
1712 else
1713 {
1714 int reloc, pcrel, reloc_size, offset;
1715 fixS *fixP;
1716
1717 reloc = BFD_RELOC_NONE;
1718 /* How big is the reloc? Remember SPLIT relocs are
1719 implicitly 32bits. */
1720 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1721 reloc_size = 32;
85cb2cf9
JL
1722 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1723 reloc_size = 24;
252b5132
RH
1724 else
1725 reloc_size = operand->bits;
1726
1727 /* Is the reloc pc-relative? */
1728 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1729
1730 /* Gross. This disgusting hack is to make sure we
87271fa6 1731 get the right offset for the 16/32 bit reloc in
252b5132
RH
1732 "call" instructions. Basically they're a pain
1733 because the reloc isn't at the end of the instruction. */
1734 if ((size == 5 || size == 7)
1735 && (((insn >> 24) & 0xff) == 0xcd
1736 || ((insn >> 24) & 0xff) == 0xdd))
1737 size -= 2;
1738
1739 /* Similarly for certain bit instructions which don't
1740 hav their 32bit reloc at the tail of the instruction. */
1741 if (size == 7
1742 && (((insn >> 16) & 0xffff) == 0xfe00
1743 || ((insn >> 16) & 0xffff) == 0xfe01
1744 || ((insn >> 16) & 0xffff) == 0xfe02))
1745 size -= 1;
87271fa6 1746
252b5132
RH
1747 offset = size - reloc_size / 8;
1748
1749 /* Choose a proper BFD relocation type. */
1750 if (pcrel)
1751 {
1752 if (reloc_size == 32)
1753 reloc = BFD_RELOC_32_PCREL;
1754 else if (reloc_size == 16)
1755 reloc = BFD_RELOC_16_PCREL;
1756 else if (reloc_size == 8)
1757 reloc = BFD_RELOC_8_PCREL;
1758 else
1759 abort ();
1760 }
1761 else
1762 {
1763 if (reloc_size == 32)
1764 reloc = BFD_RELOC_32;
1765 else if (reloc_size == 16)
1766 reloc = BFD_RELOC_16;
1767 else if (reloc_size == 8)
1768 reloc = BFD_RELOC_8;
1769 else
1770 abort ();
1771 }
1772
1773 /* Convert the size of the reloc into what fix_new_exp wants. */
1774 reloc_size = reloc_size / 8;
1775 if (reloc_size == 8)
1776 reloc_size = 0;
1777 else if (reloc_size == 16)
1778 reloc_size = 1;
1779 else if (reloc_size == 32)
1780 reloc_size = 2;
1781
1782 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1783 reloc_size, &fixups[i].exp, pcrel,
1784 ((bfd_reloc_code_real_type) reloc));
1785
1786 if (pcrel)
1787 fixP->fx_offset += offset;
1788 }
1789 }
1790 }
e8b1cae5
AO
1791
1792 if (debug_type == DEBUG_DWARF2)
d75bb8cf 1793 dwarf2_generate_asm_lineno (real_size);
252b5132
RH
1794}
1795
87271fa6
NC
1796/* If while processing a fixup, a reloc really needs to be created
1797 then it is done here. */
252b5132 1798
252b5132
RH
1799arelent *
1800tc_gen_reloc (seg, fixp)
b4c1ea07 1801 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
1802 fixS *fixp;
1803{
1804 arelent *reloc;
1805 reloc = (arelent *) xmalloc (sizeof (arelent));
1806
1807 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1808 if (reloc->howto == (reloc_howto_type *) NULL)
1809 {
1810 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
1811 _("reloc %d not supported by object file format"),
1812 (int) fixp->fx_r_type);
252b5132
RH
1813 return NULL;
1814 }
1815 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1816
1817 if (fixp->fx_addsy && fixp->fx_subsy)
1818 {
87271fa6 1819
252b5132
RH
1820 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1821 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1822 {
1823 as_bad_where (fixp->fx_file, fixp->fx_line,
1824 "Difference of symbols in different sections is not supported");
1825 return NULL;
1826 }
1827
0aa529cb 1828 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
252b5132
RH
1829 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1830 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1831 }
87271fa6 1832 else
252b5132 1833 {
87271fa6 1834 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 1835 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
1836 reloc->addend = fixp->fx_offset;
1837 }
1838 return reloc;
1839}
1840
1841int
1842md_estimate_size_before_relax (fragp, seg)
1843 fragS *fragp;
1844 asection *seg;
1845{
1846 if (fragp->fr_subtype == 0)
1847 return 2;
1848 if (fragp->fr_subtype == 3)
1849 return 3;
1850 if (fragp->fr_subtype == 6)
1851 {
1852 if (!S_IS_DEFINED (fragp->fr_symbol)
1853 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1854 {
1855 fragp->fr_subtype = 7;
1856 return 7;
1857 }
1858 else
1859 return 5;
1860 }
1861 if (fragp->fr_subtype == 8)
1862 {
1863 if (!S_IS_DEFINED (fragp->fr_symbol)
1864 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1865 {
1866 fragp->fr_subtype = 9;
1867 return 6;
1868 }
1869 else
1870 return 4;
1871 }
1872 if (fragp->fr_subtype == 10)
1873 {
1874 if (!S_IS_DEFINED (fragp->fr_symbol)
1875 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1876 {
1877 fragp->fr_subtype = 12;
1878 return 5;
1879 }
1880 else
1881 return 2;
1882 }
0aa529cb 1883 abort ();
87271fa6 1884}
252b5132
RH
1885
1886long
1887md_pcrel_from (fixp)
1888 fixS *fixp;
1889{
87271fa6 1890 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
1891 {
1892 /* The symbol is undefined. Let the linker figure it out. */
1893 return 0;
1894 }
1895 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
1896}
1897
1898int
1899md_apply_fix3 (fixp, valuep, seg)
1900 fixS *fixp;
c51ce5f0 1901 valueT *valuep;
252b5132
RH
1902 segT seg;
1903{
58a77e41
EC
1904 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
1905 int size = 0;
c51ce5f0 1906 int value;
58a77e41
EC
1907
1908 assert (fixp->fx_r_type < BFD_RELOC_UNUSED);
1909
1910 /* This should never happen. */
1911 if (seg->flags & SEC_ALLOC)
1912 abort ();
1913
c51ce5f0
EC
1914 /* The value we are passed in *valuep includes the symbol values.
1915 Since we are using BFD_ASSEMBLER, if we are doing this relocation
1916 the code in write.c is going to call bfd_install_relocation, which
1917 is also going to use the symbol value. That means that if the
1918 reloc is fully resolved we want to use *valuep since
1919 bfd_install_relocation is not being used.
1920
1921 However, if the reloc is not fully resolved we do not want to use
1922 *valuep, and must use fx_offset instead. However, if the reloc
1923 is PC relative, we do want to use *valuep since it includes the
1924 result of md_pcrel_from. */
1925 if (fixp->fx_addsy == (symbolS *) NULL || fixp->fx_pcrel)
1926 value = *valuep;
1927 else
1928 value = fixp->fx_offset;
1929
58a77e41
EC
1930 /* If the fix is relative to a symbol which is not defined, or not
1931 in the same segment as the fix, we cannot resolve it here. */
1932 if (fixp->fx_addsy != NULL
1933 && (! S_IS_DEFINED (fixp->fx_addsy)
1934 || (S_GET_SEGMENT (fixp->fx_addsy) != seg)))
1935 {
1936 fixp->fx_done = 0;
1937 return 0;
1938 }
1939
1940 switch (fixp->fx_r_type)
1941 {
1942 case BFD_RELOC_8:
1943 size = 1;
1944 break;
1945
1946 case BFD_RELOC_16:
1947 size = 2;
1948 break;
1949
1950 case BFD_RELOC_32:
1951 size = 4;
1952 break;
1953
1954 case BFD_RELOC_VTABLE_INHERIT:
1955 case BFD_RELOC_VTABLE_ENTRY:
1956 fixp->fx_done = 0;
1957 return 1;
1958
1959 case BFD_RELOC_NONE:
1960 default:
1961 as_bad_where (fixp->fx_file, fixp->fx_line,
1962 _("Bad relocation fixup type (%d)"), fixp->fx_r_type);
1963 }
1964
c51ce5f0 1965 md_number_to_chars (fixpos, value, size);
58a77e41 1966
252b5132
RH
1967 fixp->fx_done = 1;
1968 return 0;
58a77e41
EC
1969
1970}
1971
1972/* Return nonzero if the fixup in FIXP will require a relocation,
1973 even it if appears that the fixup could be completely handled
1974 within GAS. */
1975
1976int
1977mn10300_force_relocation (fixp)
1978 struct fix *fixp;
1979{
1980 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1981 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1982 return 1;
1983
1984 return 0;
1985}
1986
1987/* Return zero if the fixup in fixp should be left alone and not
1988 adjusted. */
1989
1990boolean
1991mn10300_fix_adjustable (fixp)
1992 struct fix *fixp;
1993{
1994 /* Prevent all adjustments to global symbols. */
1995 if (S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
1996 return 0;
1997
1998 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1999 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2000 return 0;
2001
2002 return 1;
252b5132
RH
2003}
2004
2005/* Insert an operand value into an instruction. */
2006
2007static void
2008mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2009 unsigned long *insnp;
2010 unsigned long *extensionp;
2011 const struct mn10300_operand *operand;
2012 offsetT val;
2013 char *file;
2014 unsigned int line;
2015 unsigned int shift;
2016{
2017 /* No need to check 32bit operands for a bit. Note that
2018 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2019 if (operand->bits != 32
2020 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2021 {
2022 long min, max;
2023 offsetT test;
2024 int bits;
2025
2026 bits = operand->bits;
85cb2cf9
JL
2027 if (operand->flags & MN10300_OPERAND_24BIT)
2028 bits = 24;
252b5132
RH
2029
2030 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2031 {
2032 max = (1 << (bits - 1)) - 1;
2033 min = - (1 << (bits - 1));
2034 }
2035 else
87271fa6
NC
2036 {
2037 max = (1 << bits) - 1;
2038 min = 0;
2039 }
252b5132
RH
2040
2041 test = val;
2042
252b5132 2043 if (test < (offsetT) min || test > (offsetT) max)
87271fa6
NC
2044 {
2045 const char *err =
2046 _("operand out of range (%s not between %ld and %ld)");
2047 char buf[100];
2048
2049 sprint_value (buf, test);
2050 if (file == (char *) NULL)
2051 as_warn (err, buf, min, max);
2052 else
2053 as_warn_where (file, line, err, buf, min, max);
2054 }
252b5132
RH
2055 }
2056
2057 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2058 {
2059 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2060 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2061 << operand->shift);
2062 }
85cb2cf9
JL
2063 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2064 {
2065 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2066 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2067 << operand->shift);
2068 }
252b5132
RH
2069 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2070 {
2071 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2072 << (operand->shift + shift));
2073
2074 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2075 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2076 << (operand->shift + shift + operand->bits));
2077 }
2078 else
2079 {
2080 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2081 << (operand->shift + shift));
2082
2083 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2084 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2085 << (operand->shift + shift + operand->bits));
2086 }
2087}
2088
2089static unsigned long
2090check_operand (insn, operand, val)
b4c1ea07 2091 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2092 const struct mn10300_operand *operand;
2093 offsetT val;
2094{
2095 /* No need to check 32bit operands for a bit. Note that
2096 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2097 if (operand->bits != 32
2098 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2099 {
2100 long min, max;
2101 offsetT test;
2102 int bits;
2103
2104 bits = operand->bits;
85cb2cf9
JL
2105 if (operand->flags & MN10300_OPERAND_24BIT)
2106 bits = 24;
252b5132
RH
2107
2108 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2109 {
2110 max = (1 << (bits - 1)) - 1;
2111 min = - (1 << (bits - 1));
2112 }
2113 else
87271fa6
NC
2114 {
2115 max = (1 << bits) - 1;
2116 min = 0;
2117 }
252b5132
RH
2118
2119 test = val;
2120
252b5132
RH
2121 if (test < (offsetT) min || test > (offsetT) max)
2122 return 0;
2123 else
2124 return 1;
2125 }
2126 return 1;
2127}
2128
2129static void
2130set_arch_mach (mach)
2131 int mach;
2132{
2133 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2134 as_warn (_("could not set architecture and machine"));
2135
2136 current_machine = mach;
2137}
e8b1cae5
AO
2138
2139void
2140mn10300_finalize ()
2141{
2142 if (debug_type == DEBUG_DWARF2)
2143 dwarf2_finish ();
2144}
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