2003-02-25 Alexandre Oliva <aoliva@redhat.com>
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
ae6063d4 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
87271fa6 25#include "subsegs.h"
252b5132 26#include "opcode/mn10300.h"
e8b1cae5 27#include "dwarf2dbg.h"
252b5132
RH
28\f
29/* Structure to hold information about predefined registers. */
30struct reg_name
31{
32 const char *name;
33 int value;
34};
35
87271fa6
NC
36/* Generic assembler global variables which must be defined by all
37 targets. */
252b5132 38
87271fa6 39/* Characters which always start a comment. */
252b5132
RH
40const char comment_chars[] = "#";
41
42/* Characters which start a comment at the beginning of a line. */
43const char line_comment_chars[] = ";#";
44
87271fa6 45/* Characters which may be used to separate multiple commands on a
252b5132
RH
46 single line. */
47const char line_separator_chars[] = ";";
48
87271fa6 49/* Characters which are used to indicate an exponent in a floating
252b5132
RH
50 point number. */
51const char EXP_CHARS[] = "eE";
52
87271fa6 53/* Characters which mean that a number is a floating point constant,
252b5132
RH
54 as in 0d1.0. */
55const char FLT_CHARS[] = "dD";
56\f
252b5132 57const relax_typeS md_relax_table[] = {
87271fa6 58 /* bCC relaxing */
252b5132
RH
59 {0x7f, -0x80, 2, 1},
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
62
87271fa6 63 /* bCC relaxing (uncommon cases) */
252b5132
RH
64 {0x7f, -0x80, 3, 4},
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
67
87271fa6 68 /* call relaxing */
252b5132
RH
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
71
87271fa6 72 /* calls relaxing */
252b5132
RH
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
75
87271fa6 76 /* jmp relaxing */
252b5132
RH
77 {0x7f, -0x80, 2, 11},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
80
e7b71525
AO
81 /* fbCC relaxing */
82 {0x7f, -0x80, 3, 14},
83 {0x7fff, -0x8000, 6, 15},
84 {0x7fffffff, -0x80000000, 8, 0},
85
252b5132
RH
86};
87
87271fa6 88/* Local functions. */
252b5132
RH
89static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
90 const struct mn10300_operand *,
91 offsetT, char *, unsigned,
92 unsigned));
93static unsigned long check_operand PARAMS ((unsigned long,
94 const struct mn10300_operand *,
95 offsetT));
96static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
b34976b6
AM
97static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
98static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
99static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
497f322d
AO
100static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
101static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
102static void set_arch_mach PARAMS ((int));
252b5132 103
1485d400
EC
104/* Set linkrelax here to avoid fixups in most sections. */
105int linkrelax = 1;
106
252b5132
RH
107static int current_machine;
108
87271fa6 109/* Fixups. */
252b5132
RH
110#define MAX_INSN_FIXUPS (5)
111struct mn10300_fixup
112{
113 expressionS exp;
114 int opindex;
115 bfd_reloc_code_real_type reloc;
116};
117struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
118static int fc;
119
120/* We must store the value of each register operand so that we can
121 verify that certain registers do not match. */
122int mn10300_reg_operands[MN10300_MAX_OPERANDS];
123\f
124const char *md_shortopts = "";
125struct option md_longopts[] = {
126 {NULL, no_argument, NULL, 0}
127};
87271fa6 128size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
129
130/* The target specific pseudo-ops which we support. */
131const pseudo_typeS md_pseudo_table[] =
132{
0a727238
AO
133 { "am30", set_arch_mach, AM30 },
134 { "am33", set_arch_mach, AM33 },
e7b71525 135 { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
0a727238 136 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
137 {NULL, 0, 0}
138};
139
e7b71525
AO
140#define HAVE_AM33_2 (current_machine == AM33_2)
141#define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
aa15f6f7 142#define HAVE_AM30 (current_machine == AM30)
0a727238 143
252b5132
RH
144/* Opcode hash table. */
145static struct hash_control *mn10300_hash;
146
87271fa6 147/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
148static const struct reg_name data_registers[] =
149{
150 { "d0", 0 },
151 { "d1", 1 },
152 { "d2", 2 },
153 { "d3", 3 },
154};
87271fa6
NC
155#define DATA_REG_NAME_CNT \
156 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
157
158static const struct reg_name address_registers[] =
159{
160 { "a0", 0 },
161 { "a1", 1 },
162 { "a2", 2 },
163 { "a3", 3 },
164};
87271fa6
NC
165
166#define ADDRESS_REG_NAME_CNT \
167 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 168
85cb2cf9
JL
169static const struct reg_name r_registers[] =
170{
171 { "a0", 8 },
172 { "a1", 9 },
173 { "a2", 10 },
174 { "a3", 11 },
175 { "d0", 12 },
176 { "d1", 13 },
177 { "d2", 14 },
178 { "d3", 15 },
179 { "e0", 0 },
180 { "e1", 1 },
181 { "e10", 10 },
182 { "e11", 11 },
183 { "e12", 12 },
184 { "e13", 13 },
185 { "e14", 14 },
186 { "e15", 15 },
187 { "e2", 2 },
188 { "e3", 3 },
189 { "e4", 4 },
190 { "e5", 5 },
191 { "e6", 6 },
192 { "e7", 7 },
193 { "e8", 8 },
194 { "e9", 9 },
195 { "r0", 0 },
196 { "r1", 1 },
197 { "r10", 10 },
198 { "r11", 11 },
199 { "r12", 12 },
200 { "r13", 13 },
201 { "r14", 14 },
202 { "r15", 15 },
203 { "r2", 2 },
204 { "r3", 3 },
205 { "r4", 4 },
206 { "r5", 5 },
207 { "r6", 6 },
208 { "r7", 7 },
209 { "r8", 8 },
210 { "r9", 9 },
211};
87271fa6
NC
212
213#define R_REG_NAME_CNT \
214 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
215
216static const struct reg_name xr_registers[] =
217{
218 { "mcrh", 2 },
219 { "mcrl", 3 },
220 { "mcvf", 4 },
221 { "mdrq", 1 },
222 { "sp", 0 },
223 { "xr0", 0 },
224 { "xr1", 1 },
225 { "xr10", 10 },
226 { "xr11", 11 },
227 { "xr12", 12 },
228 { "xr13", 13 },
229 { "xr14", 14 },
230 { "xr15", 15 },
231 { "xr2", 2 },
232 { "xr3", 3 },
233 { "xr4", 4 },
234 { "xr5", 5 },
235 { "xr6", 6 },
236 { "xr7", 7 },
237 { "xr8", 8 },
238 { "xr9", 9 },
239};
85cb2cf9 240
87271fa6
NC
241#define XR_REG_NAME_CNT \
242 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132 243
913572ec
AO
244/* We abuse the `value' field, that would be otherwise unused, to
245 encode the architecture on which (access to) the register was
246 introduced. FIXME: we should probably warn when we encounter a
247 register name when assembling for an architecture that doesn't
248 support it, before parsing it as a symbol name. */
252b5132
RH
249static const struct reg_name other_registers[] =
250{
913572ec 251 { "epsw", AM33 },
252b5132 252 { "mdr", 0 },
913572ec 253 { "pc", AM33 },
252b5132
RH
254 { "psw", 0 },
255 { "sp", 0 },
256};
87271fa6
NC
257
258#define OTHER_REG_NAME_CNT \
259 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132 260
e7b71525
AO
261static const struct reg_name float_registers[] =
262{
263 { "fs0", 0 },
264 { "fs1", 1 },
265 { "fs10", 10 },
266 { "fs11", 11 },
267 { "fs12", 12 },
268 { "fs13", 13 },
269 { "fs14", 14 },
270 { "fs15", 15 },
271 { "fs16", 16 },
272 { "fs17", 17 },
273 { "fs18", 18 },
274 { "fs19", 19 },
275 { "fs2", 2 },
276 { "fs20", 20 },
277 { "fs21", 21 },
278 { "fs22", 22 },
279 { "fs23", 23 },
280 { "fs24", 24 },
281 { "fs25", 25 },
282 { "fs26", 26 },
283 { "fs27", 27 },
284 { "fs28", 28 },
285 { "fs29", 29 },
286 { "fs3", 3 },
287 { "fs30", 30 },
288 { "fs31", 31 },
289 { "fs4", 4 },
290 { "fs5", 5 },
291 { "fs6", 6 },
292 { "fs7", 7 },
293 { "fs8", 8 },
294 { "fs9", 9 },
295};
296
297#define FLOAT_REG_NAME_CNT \
298 (sizeof (float_registers) / sizeof (struct reg_name))
299
300static const struct reg_name double_registers[] =
301{
302 { "fd0", 0 },
303 { "fd10", 10 },
304 { "fd12", 12 },
305 { "fd14", 14 },
306 { "fd16", 16 },
307 { "fd18", 18 },
308 { "fd2", 2 },
309 { "fd20", 20 },
310 { "fd22", 22 },
311 { "fd24", 24 },
312 { "fd26", 26 },
313 { "fd28", 28 },
314 { "fd30", 30 },
315 { "fd4", 4 },
316 { "fd6", 6 },
317 { "fd8", 8 },
318};
319
320#define DOUBLE_REG_NAME_CNT \
321 (sizeof (double_registers) / sizeof (struct reg_name))
322
323
252b5132
RH
324/* reg_name_search does a binary search of the given register table
325 to see if "name" is a valid regiter name. Returns the register
87271fa6 326 number from the array on success, or -1 on failure. */
252b5132
RH
327
328static int
329reg_name_search (regs, regcount, name)
330 const struct reg_name *regs;
331 int regcount;
332 const char *name;
333{
334 int middle, low, high;
335 int cmp;
336
337 low = 0;
338 high = regcount - 1;
339
340 do
341 {
342 middle = (low + high) / 2;
343 cmp = strcasecmp (name, regs[middle].name);
344 if (cmp < 0)
345 high = middle - 1;
346 else if (cmp > 0)
347 low = middle + 1;
87271fa6
NC
348 else
349 return regs[middle].value;
252b5132
RH
350 }
351 while (low <= high);
352 return -1;
353}
354
85cb2cf9
JL
355/* Summary of register_name().
356 *
357 * in: Input_line_pointer points to 1st char of operand.
358 *
b6ff326e 359 * out: An expressionS.
85cb2cf9
JL
360 * The operand may have been a register: in this case, X_op == O_register,
361 * X_add_number is set to the register number, and truth is returned.
362 * Input_line_pointer->(next non-blank) char after operand, or is in
363 * its original state.
364 */
87271fa6 365
b34976b6 366static bfd_boolean
85cb2cf9
JL
367r_register_name (expressionP)
368 expressionS *expressionP;
369{
370 int reg_number;
371 char *name;
372 char *start;
373 char c;
374
87271fa6 375 /* Find the spelling of the operand. */
85cb2cf9
JL
376 start = name = input_line_pointer;
377
378 c = get_symbol_end ();
379 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
380
468cced8
AM
381 /* Put back the delimiting char. */
382 *input_line_pointer = c;
383
87271fa6
NC
384 /* Look to see if it's in the register table. */
385 if (reg_number >= 0)
85cb2cf9
JL
386 {
387 expressionP->X_op = O_register;
388 expressionP->X_add_number = reg_number;
389
87271fa6 390 /* Make the rest nice. */
85cb2cf9
JL
391 expressionP->X_add_symbol = NULL;
392 expressionP->X_op_symbol = NULL;
87271fa6 393
b34976b6 394 return TRUE;
85cb2cf9 395 }
87271fa6 396
468cced8
AM
397 /* Reset the line as if we had not done anything. */
398 input_line_pointer = start;
b34976b6 399 return FALSE;
85cb2cf9
JL
400}
401
402/* Summary of register_name().
403 *
404 * in: Input_line_pointer points to 1st char of operand.
405 *
b6ff326e 406 * out: An expressionS.
85cb2cf9
JL
407 * The operand may have been a register: in this case, X_op == O_register,
408 * X_add_number is set to the register number, and truth is returned.
409 * Input_line_pointer->(next non-blank) char after operand, or is in
410 * its original state.
411 */
87271fa6 412
b34976b6 413static bfd_boolean
85cb2cf9
JL
414xr_register_name (expressionP)
415 expressionS *expressionP;
416{
417 int reg_number;
418 char *name;
419 char *start;
420 char c;
421
87271fa6 422 /* Find the spelling of the operand. */
85cb2cf9
JL
423 start = name = input_line_pointer;
424
425 c = get_symbol_end ();
426 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
427
468cced8
AM
428 /* Put back the delimiting char. */
429 *input_line_pointer = c;
430
87271fa6
NC
431 /* Look to see if it's in the register table. */
432 if (reg_number >= 0)
85cb2cf9
JL
433 {
434 expressionP->X_op = O_register;
435 expressionP->X_add_number = reg_number;
436
87271fa6 437 /* Make the rest nice. */
85cb2cf9
JL
438 expressionP->X_add_symbol = NULL;
439 expressionP->X_op_symbol = NULL;
87271fa6 440
b34976b6 441 return TRUE;
85cb2cf9 442 }
87271fa6 443
468cced8
AM
444 /* Reset the line as if we had not done anything. */
445 input_line_pointer = start;
b34976b6 446 return FALSE;
85cb2cf9 447}
252b5132
RH
448
449/* Summary of register_name().
450 *
451 * in: Input_line_pointer points to 1st char of operand.
452 *
b6ff326e 453 * out: An expressionS.
252b5132
RH
454 * The operand may have been a register: in this case, X_op == O_register,
455 * X_add_number is set to the register number, and truth is returned.
456 * Input_line_pointer->(next non-blank) char after operand, or is in
457 * its original state.
458 */
87271fa6 459
b34976b6 460static bfd_boolean
252b5132
RH
461data_register_name (expressionP)
462 expressionS *expressionP;
463{
464 int reg_number;
465 char *name;
466 char *start;
467 char c;
468
87271fa6 469 /* Find the spelling of the operand. */
252b5132
RH
470 start = name = input_line_pointer;
471
472 c = get_symbol_end ();
473 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
474
468cced8
AM
475 /* Put back the delimiting char. */
476 *input_line_pointer = c;
477
87271fa6
NC
478 /* Look to see if it's in the register table. */
479 if (reg_number >= 0)
252b5132
RH
480 {
481 expressionP->X_op = O_register;
482 expressionP->X_add_number = reg_number;
483
87271fa6 484 /* Make the rest nice. */
252b5132
RH
485 expressionP->X_add_symbol = NULL;
486 expressionP->X_op_symbol = NULL;
87271fa6 487
b34976b6 488 return TRUE;
252b5132 489 }
87271fa6 490
468cced8
AM
491 /* Reset the line as if we had not done anything. */
492 input_line_pointer = start;
b34976b6 493 return FALSE;
252b5132
RH
494}
495
496/* Summary of register_name().
497 *
498 * in: Input_line_pointer points to 1st char of operand.
499 *
b6ff326e 500 * out: An expressionS.
252b5132
RH
501 * The operand may have been a register: in this case, X_op == O_register,
502 * X_add_number is set to the register number, and truth is returned.
503 * Input_line_pointer->(next non-blank) char after operand, or is in
504 * its original state.
505 */
87271fa6 506
b34976b6 507static bfd_boolean
252b5132
RH
508address_register_name (expressionP)
509 expressionS *expressionP;
510{
511 int reg_number;
512 char *name;
513 char *start;
514 char c;
515
87271fa6 516 /* Find the spelling of the operand. */
252b5132
RH
517 start = name = input_line_pointer;
518
519 c = get_symbol_end ();
520 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
521
468cced8
AM
522 /* Put back the delimiting char. */
523 *input_line_pointer = c;
524
87271fa6
NC
525 /* Look to see if it's in the register table. */
526 if (reg_number >= 0)
252b5132
RH
527 {
528 expressionP->X_op = O_register;
529 expressionP->X_add_number = reg_number;
530
87271fa6 531 /* Make the rest nice. */
252b5132
RH
532 expressionP->X_add_symbol = NULL;
533 expressionP->X_op_symbol = NULL;
87271fa6 534
b34976b6 535 return TRUE;
252b5132 536 }
87271fa6 537
468cced8
AM
538 /* Reset the line as if we had not done anything. */
539 input_line_pointer = start;
b34976b6 540 return FALSE;
252b5132
RH
541}
542
543/* Summary of register_name().
544 *
545 * in: Input_line_pointer points to 1st char of operand.
546 *
b6ff326e 547 * out: An expressionS.
252b5132
RH
548 * The operand may have been a register: in this case, X_op == O_register,
549 * X_add_number is set to the register number, and truth is returned.
550 * Input_line_pointer->(next non-blank) char after operand, or is in
551 * its original state.
552 */
87271fa6 553
b34976b6 554static bfd_boolean
252b5132
RH
555other_register_name (expressionP)
556 expressionS *expressionP;
557{
558 int reg_number;
559 char *name;
560 char *start;
561 char c;
562
87271fa6 563 /* Find the spelling of the operand. */
252b5132
RH
564 start = name = input_line_pointer;
565
566 c = get_symbol_end ();
567 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
568
468cced8
AM
569 /* Put back the delimiting char. */
570 *input_line_pointer = c;
571
87271fa6 572 /* Look to see if it's in the register table. */
913572ec
AO
573 if (reg_number == 0
574 || (reg_number == AM33 && HAVE_AM33))
252b5132
RH
575 {
576 expressionP->X_op = O_register;
913572ec 577 expressionP->X_add_number = 0;
252b5132 578
87271fa6 579 /* Make the rest nice. */
252b5132
RH
580 expressionP->X_add_symbol = NULL;
581 expressionP->X_op_symbol = NULL;
87271fa6 582
b34976b6 583 return TRUE;
252b5132 584 }
87271fa6 585
468cced8
AM
586 /* Reset the line as if we had not done anything. */
587 input_line_pointer = start;
b34976b6 588 return FALSE;
252b5132
RH
589}
590
e7b71525
AO
591static bfd_boolean double_register_name PARAMS ((expressionS *));
592static bfd_boolean float_register_name PARAMS ((expressionS *));
593
594/* Summary of float_register_name:
595
596 in: Input_line_pointer points to 1st char of operand.
597
598 out: A expressionS.
599 The operand may have been a register: in this case, X_op == O_register,
600 X_add_number is set to the register number, and truth is returned.
601 Input_line_pointer->(next non-blank) char after operand, or is in
602 its original state. */
603
604static bfd_boolean
605float_register_name (expressionP)
606 expressionS *expressionP;
607{
608 int reg_number;
609 char *name;
610 char *start;
611 char c;
612
613 /* Find the spelling of the operand. */
614 start = name = input_line_pointer;
615
616 c = get_symbol_end ();
617 reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
618
619 /* Put back the delimiting char. */
620 * input_line_pointer = c;
621
622 /* Look to see if it's in the register table. */
623 if (reg_number >= 0)
624 {
625 expressionP->X_op = O_register;
626 expressionP->X_add_number = reg_number;
627
628 /* Make the rest nice. */
629 expressionP->X_add_symbol = NULL;
630 expressionP->X_op_symbol = NULL;
631
632 return TRUE;
633 }
634
635 /* Reset the line as if we had not done anything. */
636 input_line_pointer = start;
637 return FALSE;
638}
639
640/* Summary of double_register_name:
641
642 in: Input_line_pointer points to 1st char of operand.
643
644 out: A expressionS.
645 The operand may have been a register: in this case, X_op == O_register,
646 X_add_number is set to the register number, and truth is returned.
647 Input_line_pointer->(next non-blank) char after operand, or is in
648 its original state. */
649
650static bfd_boolean
651double_register_name (expressionP)
652 expressionS *expressionP;
653{
654 int reg_number;
655 char *name;
656 char *start;
657 char c;
658
659 /* Find the spelling of the operand. */
660 start = name = input_line_pointer;
661
662 c = get_symbol_end ();
663 reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
664
665 /* Put back the delimiting char. */
666 * input_line_pointer = c;
667
668 /* Look to see if it's in the register table. */
669 if (reg_number >= 0)
670 {
671 expressionP->X_op = O_register;
672 expressionP->X_add_number = reg_number;
673
674 /* Make the rest nice. */
675 expressionP->X_add_symbol = NULL;
676 expressionP->X_op_symbol = NULL;
677
678 return TRUE;
679 }
680
681 /* Reset the line as if we had not done anything. */
682 input_line_pointer = start;
683 return FALSE;
684}
685
252b5132
RH
686void
687md_show_usage (stream)
87271fa6 688 FILE *stream;
252b5132 689{
87271fa6 690 fprintf (stream, _("MN10300 options:\n\
252b5132 691none yet\n"));
87271fa6 692}
252b5132
RH
693
694int
695md_parse_option (c, arg)
b4c1ea07
EC
696 int c ATTRIBUTE_UNUSED;
697 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
698{
699 return 0;
700}
701
702symbolS *
703md_undefined_symbol (name)
b4c1ea07 704 char *name ATTRIBUTE_UNUSED;
252b5132
RH
705{
706 return 0;
707}
708
709char *
710md_atof (type, litp, sizep)
87271fa6
NC
711 int type;
712 char *litp;
713 int *sizep;
252b5132
RH
714{
715 int prec;
716 LITTLENUM_TYPE words[4];
717 char *t;
718 int i;
719
720 switch (type)
721 {
722 case 'f':
723 prec = 2;
724 break;
725
726 case 'd':
727 prec = 4;
728 break;
729
730 default:
731 *sizep = 0;
732 return "bad call to md_atof";
733 }
87271fa6 734
252b5132
RH
735 t = atof_ieee (input_line_pointer, type, words);
736 if (t)
737 input_line_pointer = t;
738
739 *sizep = prec * 2;
740
741 for (i = prec - 1; i >= 0; i--)
742 {
743 md_number_to_chars (litp, (valueT) words[i], 2);
744 litp += 2;
745 }
746
747 return NULL;
748}
749
252b5132
RH
750void
751md_convert_frag (abfd, sec, fragP)
b4c1ea07 752 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
753 asection *sec;
754 fragS *fragP;
252b5132
RH
755{
756 static unsigned long label_count = 0;
757 char buf[40];
758
759 subseg_change (sec, 0);
760 if (fragP->fr_subtype == 0)
761 {
762 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
763 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
764 fragP->fr_var = 0;
765 fragP->fr_fix += 2;
766 }
767 else if (fragP->fr_subtype == 1)
768 {
769 /* Reverse the condition of the first branch. */
770 int offset = fragP->fr_fix;
771 int opcode = fragP->fr_literal[offset] & 0xff;
772
773 switch (opcode)
774 {
775 case 0xc8:
776 opcode = 0xc9;
777 break;
778 case 0xc9:
779 opcode = 0xc8;
780 break;
781 case 0xc0:
782 opcode = 0xc2;
783 break;
784 case 0xc2:
785 opcode = 0xc0;
786 break;
787 case 0xc3:
788 opcode = 0xc1;
789 break;
790 case 0xc1:
791 opcode = 0xc3;
792 break;
793 case 0xc4:
794 opcode = 0xc6;
795 break;
796 case 0xc6:
797 opcode = 0xc4;
798 break;
799 case 0xc7:
800 opcode = 0xc5;
801 break;
802 case 0xc5:
803 opcode = 0xc7;
804 break;
805 default:
806 abort ();
807 }
808 fragP->fr_literal[offset] = opcode;
809
810 /* Create a fixup for the reversed conditional branch. */
0aa529cb 811 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
812 fix_new (fragP, fragP->fr_fix + 1, 1,
813 symbol_new (buf, sec, 0, fragP->fr_next),
814 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
815
816 /* Now create the unconditional branch + fixup to the
817 final target. */
818 fragP->fr_literal[offset + 2] = 0xcc;
819 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
820 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
821 fragP->fr_var = 0;
822 fragP->fr_fix += 5;
823 }
824 else if (fragP->fr_subtype == 2)
825 {
826 /* Reverse the condition of the first branch. */
827 int offset = fragP->fr_fix;
828 int opcode = fragP->fr_literal[offset] & 0xff;
829
830 switch (opcode)
831 {
832 case 0xc8:
833 opcode = 0xc9;
834 break;
835 case 0xc9:
836 opcode = 0xc8;
837 break;
838 case 0xc0:
839 opcode = 0xc2;
840 break;
841 case 0xc2:
842 opcode = 0xc0;
843 break;
844 case 0xc3:
845 opcode = 0xc1;
846 break;
847 case 0xc1:
848 opcode = 0xc3;
849 break;
850 case 0xc4:
851 opcode = 0xc6;
852 break;
853 case 0xc6:
854 opcode = 0xc4;
855 break;
856 case 0xc7:
857 opcode = 0xc5;
858 break;
859 case 0xc5:
860 opcode = 0xc7;
861 break;
862 default:
863 abort ();
864 }
865 fragP->fr_literal[offset] = opcode;
866
867 /* Create a fixup for the reversed conditional branch. */
0aa529cb 868 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
869 fix_new (fragP, fragP->fr_fix + 1, 1,
870 symbol_new (buf, sec, 0, fragP->fr_next),
871 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
872
873 /* Now create the unconditional branch + fixup to the
874 final target. */
875 fragP->fr_literal[offset + 2] = 0xdc;
876 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
877 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
878 fragP->fr_var = 0;
879 fragP->fr_fix += 7;
880 }
881 else if (fragP->fr_subtype == 3)
882 {
883 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
884 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
885 fragP->fr_var = 0;
886 fragP->fr_fix += 3;
887 }
888 else if (fragP->fr_subtype == 4)
889 {
890 /* Reverse the condition of the first branch. */
891 int offset = fragP->fr_fix;
892 int opcode = fragP->fr_literal[offset + 1] & 0xff;
893
894 switch (opcode)
895 {
896 case 0xe8:
897 opcode = 0xe9;
898 break;
899 case 0xe9:
900 opcode = 0xe8;
901 break;
902 case 0xea:
903 opcode = 0xeb;
904 break;
905 case 0xeb:
906 opcode = 0xea;
907 break;
908 default:
909 abort ();
910 }
911 fragP->fr_literal[offset + 1] = opcode;
912
913 /* Create a fixup for the reversed conditional branch. */
0aa529cb 914 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
915 fix_new (fragP, fragP->fr_fix + 2, 1,
916 symbol_new (buf, sec, 0, fragP->fr_next),
917 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
918
919 /* Now create the unconditional branch + fixup to the
920 final target. */
921 fragP->fr_literal[offset + 3] = 0xcc;
922 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
923 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
924 fragP->fr_var = 0;
925 fragP->fr_fix += 6;
926 }
927 else if (fragP->fr_subtype == 5)
928 {
929 /* Reverse the condition of the first branch. */
930 int offset = fragP->fr_fix;
931 int opcode = fragP->fr_literal[offset + 1] & 0xff;
932
933 switch (opcode)
934 {
935 case 0xe8:
936 opcode = 0xe9;
937 break;
938 case 0xea:
939 opcode = 0xeb;
940 break;
941 case 0xeb:
942 opcode = 0xea;
943 break;
944 default:
945 abort ();
946 }
947 fragP->fr_literal[offset + 1] = opcode;
948
949 /* Create a fixup for the reversed conditional branch. */
0aa529cb 950 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
951 fix_new (fragP, fragP->fr_fix + 2, 1,
952 symbol_new (buf, sec, 0, fragP->fr_next),
953 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
954
955 /* Now create the unconditional branch + fixup to the
956 final target. */
957 fragP->fr_literal[offset + 3] = 0xdc;
958 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
959 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
960 fragP->fr_var = 0;
961 fragP->fr_fix += 8;
962 }
963 else if (fragP->fr_subtype == 6)
964 {
965 int offset = fragP->fr_fix;
966 fragP->fr_literal[offset] = 0xcd;
967 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
968 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
969 fragP->fr_var = 0;
970 fragP->fr_fix += 5;
971 }
972 else if (fragP->fr_subtype == 7)
973 {
974 int offset = fragP->fr_fix;
975 fragP->fr_literal[offset] = 0xdd;
976 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
977 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
978
979 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
980 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
981 fragP->fr_var = 0;
982 fragP->fr_fix += 7;
983 }
984 else if (fragP->fr_subtype == 8)
985 {
986 int offset = fragP->fr_fix;
987 fragP->fr_literal[offset] = 0xfa;
988 fragP->fr_literal[offset + 1] = 0xff;
989 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
990 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
991 fragP->fr_var = 0;
992 fragP->fr_fix += 4;
993 }
994 else if (fragP->fr_subtype == 9)
995 {
996 int offset = fragP->fr_fix;
997 fragP->fr_literal[offset] = 0xfc;
998 fragP->fr_literal[offset + 1] = 0xff;
999
1000 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1001 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
1002 fragP->fr_var = 0;
1003 fragP->fr_fix += 6;
1004 }
1005 else if (fragP->fr_subtype == 10)
1006 {
1007 fragP->fr_literal[fragP->fr_fix] = 0xca;
1008 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
1009 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
1010 fragP->fr_var = 0;
1011 fragP->fr_fix += 2;
1012 }
1013 else if (fragP->fr_subtype == 11)
1014 {
1015 int offset = fragP->fr_fix;
1016 fragP->fr_literal[offset] = 0xcc;
1017
1018 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1019 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1020 fragP->fr_var = 0;
1021 fragP->fr_fix += 3;
1022 }
1023 else if (fragP->fr_subtype == 12)
1024 {
1025 int offset = fragP->fr_fix;
1026 fragP->fr_literal[offset] = 0xdc;
1027
1028 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1029 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1030 fragP->fr_var = 0;
1031 fragP->fr_fix += 5;
1032 }
e7b71525
AO
1033 else if (fragP->fr_subtype == 13)
1034 {
1035 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
1036 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1037 fragP->fr_var = 0;
1038 fragP->fr_fix += 3;
1039 }
1040 else if (fragP->fr_subtype == 14)
1041 {
1042 /* Reverse the condition of the first branch. */
1043 int offset = fragP->fr_fix;
1044 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1045
1046 switch (opcode)
1047 {
1048 case 0xd0:
1049 opcode = 0xd1;
1050 break;
1051 case 0xd1:
1052 opcode = 0xd0;
1053 break;
1054 case 0xd2:
1055 opcode = 0xdc;
1056 break;
1057 case 0xd3:
1058 opcode = 0xdb;
1059 break;
1060 case 0xd4:
1061 opcode = 0xda;
1062 break;
1063 case 0xd5:
1064 opcode = 0xd9;
1065 break;
1066 case 0xd6:
1067 opcode = 0xd8;
1068 break;
1069 case 0xd7:
1070 opcode = 0xdd;
1071 break;
1072 case 0xd8:
1073 opcode = 0xd6;
1074 break;
1075 case 0xd9:
1076 opcode = 0xd5;
1077 break;
1078 case 0xda:
1079 opcode = 0xd4;
1080 break;
1081 case 0xdb:
1082 opcode = 0xd3;
1083 break;
1084 case 0xdc:
1085 opcode = 0xd2;
1086 break;
1087 case 0xdd:
1088 opcode = 0xd7;
1089 break;
1090 default:
1091 abort ();
1092 }
1093 fragP->fr_literal[offset + 1] = opcode;
1094
1095 /* Create a fixup for the reversed conditional branch. */
1096 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1097 fix_new (fragP, fragP->fr_fix + 2, 1,
1098 symbol_new (buf, sec, 0, fragP->fr_next),
1099 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1100
1101 /* Now create the unconditional branch + fixup to the
1102 final target. */
1103 fragP->fr_literal[offset + 3] = 0xcc;
1104 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
1105 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1106 fragP->fr_var = 0;
1107 fragP->fr_fix += 6;
1108 }
1109 else if (fragP->fr_subtype == 15)
1110 {
1111 /* Reverse the condition of the first branch. */
1112 int offset = fragP->fr_fix;
1113 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1114
1115 switch (opcode)
1116 {
1117 case 0xd0:
1118 opcode = 0xd1;
1119 break;
1120 case 0xd1:
1121 opcode = 0xd0;
1122 break;
1123 case 0xd2:
1124 opcode = 0xdc;
1125 break;
1126 case 0xd3:
1127 opcode = 0xdb;
1128 break;
1129 case 0xd4:
1130 opcode = 0xda;
1131 break;
1132 case 0xd5:
1133 opcode = 0xd9;
1134 break;
1135 case 0xd6:
1136 opcode = 0xd8;
1137 break;
1138 case 0xd7:
1139 opcode = 0xdd;
1140 break;
1141 case 0xd8:
1142 opcode = 0xd6;
1143 break;
1144 case 0xd9:
1145 opcode = 0xd5;
1146 break;
1147 case 0xda:
1148 opcode = 0xd4;
1149 break;
1150 case 0xdb:
1151 opcode = 0xd3;
1152 break;
1153 case 0xdc:
1154 opcode = 0xd2;
1155 break;
1156 case 0xdd:
1157 opcode = 0xd7;
1158 break;
1159 default:
1160 abort ();
1161 }
1162 fragP->fr_literal[offset + 1] = opcode;
1163
1164 /* Create a fixup for the reversed conditional branch. */
1165 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1166 fix_new (fragP, fragP->fr_fix + 2, 1,
1167 symbol_new (buf, sec, 0, fragP->fr_next),
1168 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1169
1170 /* Now create the unconditional branch + fixup to the
1171 final target. */
1172 fragP->fr_literal[offset + 3] = 0xdc;
1173 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
1174 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1175 fragP->fr_var = 0;
1176 fragP->fr_fix += 8;
1177 }
252b5132
RH
1178 else
1179 abort ();
1180}
1181
1182valueT
1183md_section_align (seg, addr)
1184 asection *seg;
1185 valueT addr;
1186{
1187 int align = bfd_get_section_alignment (stdoutput, seg);
1188 return ((addr + (1 << align) - 1) & (-1 << align));
1189}
1190
1191void
1192md_begin ()
1193{
1194 char *prev_name = "";
1195 register const struct mn10300_opcode *op;
1196
87271fa6 1197 mn10300_hash = hash_new ();
252b5132
RH
1198
1199 /* Insert unique names into hash table. The MN10300 instruction set
1200 has many identical opcode names that have different opcodes based
1201 on the operands. This hash table then provides a quick index to
1202 the first opcode with a particular name in the opcode table. */
1203
1204 op = mn10300_opcodes;
1205 while (op->name)
1206 {
87271fa6 1207 if (strcmp (prev_name, op->name))
252b5132
RH
1208 {
1209 prev_name = (char *) op->name;
1210 hash_insert (mn10300_hash, op->name, (char *) op);
1211 }
1212 op++;
1213 }
1214
252b5132 1215 /* Set the default machine type. */
0a727238 1216 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
1217 as_warn (_("could not set architecture and machine"));
1218
0a727238 1219 current_machine = MN103;
252b5132
RH
1220}
1221
bf6f0d0c
AO
1222static symbolS *GOT_symbol;
1223
1224static inline int mn10300_check_fixup PARAMS ((struct mn10300_fixup *));
1225static inline int mn10300_PIC_related_p PARAMS ((symbolS *));
1226
1227static inline int
1228mn10300_PIC_related_p (sym)
1229 symbolS *sym;
1230{
1231 expressionS *exp;
1232
1233 if (! sym)
1234 return 0;
1235
1236 if (sym == GOT_symbol)
1237 return 1;
1238
1239 exp = symbol_get_value_expression (sym);
1240
1241 return (exp->X_op == O_PIC_reloc
1242 || mn10300_PIC_related_p (exp->X_add_symbol)
1243 || mn10300_PIC_related_p (exp->X_op_symbol));
1244}
1245
1246static inline int
1247mn10300_check_fixup (fixup)
1248 struct mn10300_fixup *fixup;
1249{
1250 expressionS *exp = &fixup->exp;
1251
1252 repeat:
1253 switch (exp->X_op)
1254 {
1255 case O_add:
1256 case O_subtract: /* If we're sufficiently unlucky that the label
1257 and the expression that references it happen
1258 to end up in different frags, the subtract
1259 won't be simplified within expression(). */
1260 /* The PIC-related operand must be the first operand of a sum. */
1261 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
1262 return 1;
1263
1264 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1265 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1266
1267 exp = symbol_get_value_expression (exp->X_add_symbol);
1268 goto repeat;
1269
1270 case O_symbol:
1271 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1272 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1273 break;
1274
1275 case O_PIC_reloc:
1276 fixup->reloc = exp->X_md;
1277 exp->X_op = O_symbol;
1278 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1279 && fixup->opindex >= 0
1280 && (mn10300_operands[fixup->opindex].flags
1281 & MN10300_OPERAND_RELAX))
1282 return 1;
1283 break;
1284
1285 default:
1286 return (mn10300_PIC_related_p (exp->X_add_symbol)
1287 || mn10300_PIC_related_p (exp->X_op_symbol));
1288 }
1289
1290 return 0;
1291}
1292
1293void
1294mn10300_cons_fix_new (frag, off, size, exp)
1295 fragS *frag;
1296 int off, size;
1297 expressionS *exp;
1298{
1299 struct mn10300_fixup fixup;
1300
1301 fixup.opindex = -1;
1302 fixup.exp = *exp;
1303 fixup.reloc = BFD_RELOC_UNUSED;
1304
1305 mn10300_check_fixup (&fixup);
1306
1307 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1308 switch (size)
1309 {
1310 case 2:
1311 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1312 break;
1313
1314 case 3:
1315 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1316 break;
1317
1318 case 4:
1319 break;
1320
1321 default:
1322 goto error;
1323 }
1324 else if (fixup.reloc == BFD_RELOC_UNUSED)
1325 switch (size)
1326 {
1327 case 1:
1328 fixup.reloc = BFD_RELOC_8;
1329 break;
1330
1331 case 2:
1332 fixup.reloc = BFD_RELOC_16;
1333 break;
1334
1335 case 3:
1336 fixup.reloc = BFD_RELOC_24;
1337 break;
1338
1339 case 4:
1340 fixup.reloc = BFD_RELOC_32;
1341 break;
1342
1343 default:
1344 goto error;
1345 }
1346 else if (size != 4)
1347 {
1348 error:
1349 as_bad (_("unsupported BFD relocation size %u"), size);
1350 fixup.reloc = BFD_RELOC_UNUSED;
1351 }
1352
1353 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1354}
1355
252b5132 1356void
87271fa6 1357md_assemble (str)
252b5132
RH
1358 char *str;
1359{
1360 char *s;
1361 struct mn10300_opcode *opcode;
1362 struct mn10300_opcode *next_opcode;
1363 const unsigned char *opindex_ptr;
1364 int next_opindex, relaxable;
eb0dfd58 1365 unsigned long insn, extension, size = 0;
252b5132
RH
1366 char *f;
1367 int i;
1368 int match;
1369
1370 /* Get the opcode. */
3882b010 1371 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
252b5132
RH
1372 ;
1373 if (*s != '\0')
1374 *s++ = '\0';
1375
87271fa6
NC
1376 /* Find the first opcode with the proper name. */
1377 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
1378 if (opcode == NULL)
1379 {
1380 as_bad (_("Unrecognized opcode: `%s'"), str);
1381 return;
1382 }
1383
1384 str = s;
3882b010 1385 while (ISSPACE (*str))
252b5132
RH
1386 ++str;
1387
1388 input_line_pointer = str;
1389
87271fa6 1390 for (;;)
252b5132
RH
1391 {
1392 const char *errmsg;
1393 int op_idx;
1394 char *hold;
1395 int extra_shift = 0;
1396
252b5132
RH
1397 errmsg = _("Invalid opcode/operands");
1398
1399 /* Reset the array of register operands. */
1400 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1401
1402 relaxable = 0;
1403 fc = 0;
1404 match = 0;
1405 next_opindex = 0;
1406 insn = opcode->opcode;
1407 extension = 0;
1408
1409 /* If the instruction is not available on the current machine
1410 then it can not possibly match. */
1411 if (opcode->machine
e7b71525 1412 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
aa15f6f7
AO
1413 && !(opcode->machine == AM33 && HAVE_AM33)
1414 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
1415 goto error;
1416
1417 for (op_idx = 1, opindex_ptr = opcode->operands;
1418 *opindex_ptr != 0;
1419 opindex_ptr++, op_idx++)
1420 {
1421 const struct mn10300_operand *operand;
1422 expressionS ex;
1423
1424 if (next_opindex == 0)
1425 {
1426 operand = &mn10300_operands[*opindex_ptr];
1427 }
1428 else
1429 {
1430 operand = &mn10300_operands[next_opindex];
1431 next_opindex = 0;
1432 }
1433
1434 while (*str == ' ' || *str == ',')
1435 ++str;
1436
1437 if (operand->flags & MN10300_OPERAND_RELAX)
1438 relaxable = 1;
1439
87271fa6 1440 /* Gather the operand. */
252b5132
RH
1441 hold = input_line_pointer;
1442 input_line_pointer = str;
1443
1444 if (operand->flags & MN10300_OPERAND_PAREN)
1445 {
1446 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1447 {
1448 input_line_pointer = hold;
1449 str = hold;
1450 goto error;
1451 }
1452 input_line_pointer++;
1453 goto keep_going;
1454 }
1455 /* See if we can match the operands. */
1456 else if (operand->flags & MN10300_OPERAND_DREG)
1457 {
1458 if (!data_register_name (&ex))
1459 {
1460 input_line_pointer = hold;
1461 str = hold;
1462 goto error;
1463 }
1464 }
1465 else if (operand->flags & MN10300_OPERAND_AREG)
1466 {
1467 if (!address_register_name (&ex))
1468 {
1469 input_line_pointer = hold;
1470 str = hold;
1471 goto error;
1472 }
1473 }
1474 else if (operand->flags & MN10300_OPERAND_SP)
1475 {
1476 char *start = input_line_pointer;
1477 char c = get_symbol_end ();
1478
1479 if (strcasecmp (start, "sp") != 0)
1480 {
1481 *input_line_pointer = c;
1482 input_line_pointer = hold;
1483 str = hold;
1484 goto error;
1485 }
1486 *input_line_pointer = c;
1487 goto keep_going;
1488 }
85cb2cf9
JL
1489 else if (operand->flags & MN10300_OPERAND_RREG)
1490 {
1491 if (!r_register_name (&ex))
1492 {
1493 input_line_pointer = hold;
1494 str = hold;
1495 goto error;
1496 }
1497 }
1498 else if (operand->flags & MN10300_OPERAND_XRREG)
1499 {
1500 if (!xr_register_name (&ex))
1501 {
1502 input_line_pointer = hold;
1503 str = hold;
1504 goto error;
1505 }
1506 }
e7b71525
AO
1507 else if (operand->flags & MN10300_OPERAND_FSREG)
1508 {
1509 if (!float_register_name (&ex))
1510 {
1511 input_line_pointer = hold;
1512 str = hold;
1513 goto error;
1514 }
1515 }
1516 else if (operand->flags & MN10300_OPERAND_FDREG)
1517 {
1518 if (!double_register_name (&ex))
1519 {
1520 input_line_pointer = hold;
1521 str = hold;
1522 goto error;
1523 }
1524 }
1525 else if (operand->flags & MN10300_OPERAND_FPCR)
1526 {
1527 char *start = input_line_pointer;
1528 char c = get_symbol_end ();
1529
1530 if (strcasecmp (start, "fpcr") != 0)
1531 {
1532 *input_line_pointer = c;
1533 input_line_pointer = hold;
1534 str = hold;
1535 goto error;
1536 }
1537 *input_line_pointer = c;
1538 goto keep_going;
1539 }
85cb2cf9
JL
1540 else if (operand->flags & MN10300_OPERAND_USP)
1541 {
1542 char *start = input_line_pointer;
1543 char c = get_symbol_end ();
1544
1545 if (strcasecmp (start, "usp") != 0)
1546 {
1547 *input_line_pointer = c;
1548 input_line_pointer = hold;
1549 str = hold;
1550 goto error;
1551 }
1552 *input_line_pointer = c;
1553 goto keep_going;
1554 }
1555 else if (operand->flags & MN10300_OPERAND_SSP)
1556 {
1557 char *start = input_line_pointer;
1558 char c = get_symbol_end ();
1559
1560 if (strcasecmp (start, "ssp") != 0)
1561 {
1562 *input_line_pointer = c;
1563 input_line_pointer = hold;
1564 str = hold;
1565 goto error;
1566 }
1567 *input_line_pointer = c;
1568 goto keep_going;
1569 }
1570 else if (operand->flags & MN10300_OPERAND_MSP)
1571 {
1572 char *start = input_line_pointer;
1573 char c = get_symbol_end ();
1574
1575 if (strcasecmp (start, "msp") != 0)
1576 {
1577 *input_line_pointer = c;
1578 input_line_pointer = hold;
1579 str = hold;
1580 goto error;
1581 }
1582 *input_line_pointer = c;
1583 goto keep_going;
1584 }
1585 else if (operand->flags & MN10300_OPERAND_PC)
1586 {
1587 char *start = input_line_pointer;
1588 char c = get_symbol_end ();
1589
1590 if (strcasecmp (start, "pc") != 0)
1591 {
1592 *input_line_pointer = c;
1593 input_line_pointer = hold;
1594 str = hold;
1595 goto error;
1596 }
1597 *input_line_pointer = c;
1598 goto keep_going;
1599 }
1600 else if (operand->flags & MN10300_OPERAND_EPSW)
1601 {
1602 char *start = input_line_pointer;
1603 char c = get_symbol_end ();
1604
1605 if (strcasecmp (start, "epsw") != 0)
1606 {
1607 *input_line_pointer = c;
1608 input_line_pointer = hold;
1609 str = hold;
1610 goto error;
1611 }
1612 *input_line_pointer = c;
1613 goto keep_going;
1614 }
1615 else if (operand->flags & MN10300_OPERAND_PLUS)
1616 {
1617 if (*input_line_pointer != '+')
1618 {
1619 input_line_pointer = hold;
1620 str = hold;
1621 goto error;
1622 }
1623 input_line_pointer++;
1624 goto keep_going;
1625 }
252b5132
RH
1626 else if (operand->flags & MN10300_OPERAND_PSW)
1627 {
1628 char *start = input_line_pointer;
1629 char c = get_symbol_end ();
1630
1631 if (strcasecmp (start, "psw") != 0)
1632 {
1633 *input_line_pointer = c;
1634 input_line_pointer = hold;
1635 str = hold;
1636 goto error;
1637 }
1638 *input_line_pointer = c;
1639 goto keep_going;
1640 }
1641 else if (operand->flags & MN10300_OPERAND_MDR)
1642 {
1643 char *start = input_line_pointer;
1644 char c = get_symbol_end ();
1645
1646 if (strcasecmp (start, "mdr") != 0)
1647 {
1648 *input_line_pointer = c;
1649 input_line_pointer = hold;
1650 str = hold;
1651 goto error;
1652 }
1653 *input_line_pointer = c;
1654 goto keep_going;
1655 }
1656 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1657 {
1658 unsigned int value = 0;
1659 if (*input_line_pointer != '[')
1660 {
1661 input_line_pointer = hold;
1662 str = hold;
1663 goto error;
1664 }
1665
1666 /* Eat the '['. */
1667 input_line_pointer++;
87271fa6 1668
252b5132 1669 /* We used to reject a null register list here; however,
87271fa6
NC
1670 we accept it now so the compiler can emit "call"
1671 instructions for all calls to named functions.
252b5132
RH
1672
1673 The linker can then fill in the appropriate bits for the
1674 register list and stack size or change the instruction
1675 into a "calls" if using "call" is not profitable. */
1676 while (*input_line_pointer != ']')
1677 {
1678 char *start;
1679 char c;
1680
1681 if (*input_line_pointer == ',')
1682 input_line_pointer++;
1683
1684 start = input_line_pointer;
1685 c = get_symbol_end ();
1686
1687 if (strcasecmp (start, "d2") == 0)
1688 {
1689 value |= 0x80;
1690 *input_line_pointer = c;
1691 }
1692 else if (strcasecmp (start, "d3") == 0)
1693 {
1694 value |= 0x40;
1695 *input_line_pointer = c;
1696 }
1697 else if (strcasecmp (start, "a2") == 0)
1698 {
1699 value |= 0x20;
1700 *input_line_pointer = c;
1701 }
1702 else if (strcasecmp (start, "a3") == 0)
1703 {
1704 value |= 0x10;
1705 *input_line_pointer = c;
1706 }
1707 else if (strcasecmp (start, "other") == 0)
1708 {
1709 value |= 0x08;
1710 *input_line_pointer = c;
1711 }
0a727238 1712 else if (HAVE_AM33
85cb2cf9
JL
1713 && strcasecmp (start, "exreg0") == 0)
1714 {
1715 value |= 0x04;
1716 *input_line_pointer = c;
1717 }
0a727238 1718 else if (HAVE_AM33
85cb2cf9
JL
1719 && strcasecmp (start, "exreg1") == 0)
1720 {
1721 value |= 0x02;
1722 *input_line_pointer = c;
1723 }
0a727238 1724 else if (HAVE_AM33
85cb2cf9
JL
1725 && strcasecmp (start, "exother") == 0)
1726 {
1727 value |= 0x01;
1728 *input_line_pointer = c;
1729 }
0a727238 1730 else if (HAVE_AM33
85cb2cf9
JL
1731 && strcasecmp (start, "all") == 0)
1732 {
1733 value |= 0xff;
1734 *input_line_pointer = c;
1735 }
252b5132
RH
1736 else
1737 {
1738 input_line_pointer = hold;
1739 str = hold;
1740 goto error;
1741 }
1742 }
1743 input_line_pointer++;
1744 mn10300_insert_operand (&insn, &extension, operand,
1745 value, (char *) NULL, 0, 0);
1746 goto keep_going;
1747
1748 }
1749 else if (data_register_name (&ex))
1750 {
1751 input_line_pointer = hold;
1752 str = hold;
1753 goto error;
1754 }
1755 else if (address_register_name (&ex))
1756 {
1757 input_line_pointer = hold;
1758 str = hold;
1759 goto error;
1760 }
1761 else if (other_register_name (&ex))
1762 {
1763 input_line_pointer = hold;
1764 str = hold;
1765 goto error;
1766 }
0a727238 1767 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1768 {
1769 input_line_pointer = hold;
1770 str = hold;
1771 goto error;
1772 }
0a727238 1773 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1774 {
1775 input_line_pointer = hold;
1776 str = hold;
1777 goto error;
1778 }
e7b71525
AO
1779 else if (HAVE_AM33_2 && float_register_name (&ex))
1780 {
1781 input_line_pointer = hold;
1782 str = hold;
1783 goto error;
1784 }
1785 else if (HAVE_AM33_2 && double_register_name (&ex))
1786 {
1787 input_line_pointer = hold;
1788 str = hold;
1789 goto error;
1790 }
252b5132
RH
1791 else if (*str == ')' || *str == '(')
1792 {
1793 input_line_pointer = hold;
1794 str = hold;
1795 goto error;
1796 }
1797 else
1798 {
1799 expression (&ex);
1800 }
1801
87271fa6 1802 switch (ex.X_op)
252b5132
RH
1803 {
1804 case O_illegal:
1805 errmsg = _("illegal operand");
1806 goto error;
1807 case O_absent:
1808 errmsg = _("missing operand");
1809 goto error;
1810 case O_register:
1811 {
1812 int mask;
1813
1814 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1815 if (HAVE_AM33)
1816 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
e7b71525
AO
1817 if (HAVE_AM33_2)
1818 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
252b5132
RH
1819 if ((operand->flags & mask) == 0)
1820 {
1821 input_line_pointer = hold;
1822 str = hold;
1823 goto error;
1824 }
87271fa6 1825
252b5132
RH
1826 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1827 extra_shift = 8;
1828 else if (opcode->format == FMT_D2
1829 || opcode->format == FMT_D4
1830 || opcode->format == FMT_S2
1831 || opcode->format == FMT_S4
1832 || opcode->format == FMT_S6
1833 || opcode->format == FMT_D5)
1834 extra_shift = 16;
85cb2cf9
JL
1835 else if (opcode->format == FMT_D7)
1836 extra_shift = 8;
1837 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1838 extra_shift = 8;
252b5132
RH
1839 else
1840 extra_shift = 0;
87271fa6 1841
252b5132
RH
1842 mn10300_insert_operand (&insn, &extension, operand,
1843 ex.X_add_number, (char *) NULL,
1844 0, extra_shift);
1845
252b5132
RH
1846 /* And note the register number in the register array. */
1847 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1848 break;
1849 }
1850
1851 case O_constant:
1852 /* If this operand can be promoted, and it doesn't
1853 fit into the allocated bitfield for this insn,
1854 then promote it (ie this opcode does not match). */
1855 if (operand->flags
1856 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1857 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1858 {
1859 input_line_pointer = hold;
1860 str = hold;
1861 goto error;
1862 }
1863
1864 mn10300_insert_operand (&insn, &extension, operand,
1865 ex.X_add_number, (char *) NULL,
1866 0, 0);
1867 break;
1868
1869 default:
1870 /* If this operand can be promoted, then this opcode didn't
1871 match since we can't know if it needed promotion! */
1872 if (operand->flags & MN10300_OPERAND_PROMOTE)
1873 {
1874 input_line_pointer = hold;
1875 str = hold;
1876 goto error;
1877 }
1878
1879 /* We need to generate a fixup for this expression. */
1880 if (fc >= MAX_INSN_FIXUPS)
1881 as_fatal (_("too many fixups"));
1882 fixups[fc].exp = ex;
1883 fixups[fc].opindex = *opindex_ptr;
1884 fixups[fc].reloc = BFD_RELOC_UNUSED;
bf6f0d0c
AO
1885 if (mn10300_check_fixup (& fixups[fc]))
1886 goto error;
252b5132
RH
1887 ++fc;
1888 break;
1889 }
1890
1891keep_going:
1892 str = input_line_pointer;
1893 input_line_pointer = hold;
1894
1895 while (*str == ' ' || *str == ',')
1896 ++str;
1897
1898 }
1899
1900 /* Make sure we used all the operands! */
1901 if (*str != ',')
1902 match = 1;
1903
1904 /* If this instruction has registers that must not match, verify
1905 that they do indeed not match. */
1906 if (opcode->no_match_operands)
1907 {
1908 int i;
1909
1910 /* Look at each operand to see if it's marked. */
1911 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1912 {
1913 if ((1 << i) & opcode->no_match_operands)
1914 {
1915 int j;
1916
1917 /* operand I is marked. Check that it does not match any
1918 operands > I which are marked. */
1919 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1920 {
1921 if (((1 << j) & opcode->no_match_operands)
1922 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1923 {
1924 errmsg = _("Invalid register specification.");
1925 match = 0;
1926 goto error;
1927 }
1928 }
1929 }
1930 }
1931 }
1932
1933 error:
1934 if (match == 0)
87271fa6 1935 {
252b5132 1936 next_opcode = opcode + 1;
87271fa6 1937 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1938 {
1939 opcode = next_opcode;
1940 continue;
1941 }
87271fa6 1942
252b5132
RH
1943 as_bad ("%s", errmsg);
1944 return;
87271fa6 1945 }
252b5132
RH
1946 break;
1947 }
87271fa6 1948
3882b010 1949 while (ISSPACE (*str))
252b5132
RH
1950 ++str;
1951
1952 if (*str != '\0')
1953 as_bad (_("junk at end of line: `%s'"), str);
1954
1955 input_line_pointer = str;
1956
1957 /* Determine the size of the instruction. */
1958 if (opcode->format == FMT_S0)
1959 size = 1;
1960
1961 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1962 size = 2;
1963
1964 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1965 size = 3;
1966
85cb2cf9
JL
1967 if (opcode->format == FMT_D6)
1968 size = 3;
1969
1970 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1971 size = 4;
1972
1973 if (opcode->format == FMT_D8)
1974 size = 6;
1975
1976 if (opcode->format == FMT_D9)
1977 size = 7;
252b5132
RH
1978
1979 if (opcode->format == FMT_S4)
1980 size = 5;
1981
1982 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1983 size = 7;
1984
1985 if (opcode->format == FMT_D2)
1986 size = 4;
1987
e7b71525
AO
1988 if (opcode->format == FMT_D3)
1989 size = 5;
1990
252b5132
RH
1991 if (opcode->format == FMT_D4)
1992 size = 6;
1993
1994 if (relaxable && fc > 0)
1995 {
1996 int type;
1997
076dc439
AO
1998 /* We want to anchor the line info to the previous frag (if
1999 there isn't one, create it), so that, when the insn is
2000 resized, we still get the right address for the beginning of
2001 the region. */
2002 f = frag_more (0);
2003 dwarf2_emit_insn (0);
2004
87271fa6 2005 /* bCC */
252b5132
RH
2006 if (size == 2)
2007 {
2008 /* Handle bra specially. Basically treat it like jmp so
2009 that we automatically handle 8, 16 and 32 bit offsets
2010 correctly as well as jumps to an undefined address.
2011
2012 It is also important to not treat it like other bCC
2013 instructions since the long forms of bra is different
2014 from other bCC instructions. */
2015 if (opcode->opcode == 0xca00)
2016 type = 10;
2017 else
2018 type = 0;
2019 }
87271fa6 2020 /* call */
252b5132 2021 else if (size == 5)
87271fa6
NC
2022 type = 6;
2023 /* calls */
252b5132
RH
2024 else if (size == 4)
2025 type = 8;
87271fa6 2026 /* jmp */
252b5132
RH
2027 else if (size == 3 && opcode->opcode == 0xcc0000)
2028 type = 10;
e7b71525
AO
2029 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
2030 type = 13;
87271fa6 2031 /* bCC (uncommon cases) */
252b5132
RH
2032 else
2033 type = 3;
2034
2035 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
2036 fixups[0].exp.X_add_symbol,
2037 fixups[0].exp.X_add_number,
2038 (char *)fixups[0].opindex);
87271fa6 2039
252b5132
RH
2040 /* This is pretty hokey. We basically just care about the
2041 opcode, so we have to write out the first word big endian.
2042
2043 The exception is "call", which has two operands that we
2044 care about.
2045
2046 The first operand (the register list) happens to be in the
2047 first instruction word, and will be in the right place if
2048 we output the first word in big endian mode.
2049
2050 The second operand (stack size) is in the extension word,
2051 and we want it to appear as the first character in the extension
2052 word (as it appears in memory). Luckily, writing the extension
2053 word in big endian format will do what we want. */
2054 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
2055 if (size > 8)
2056 {
2057 number_to_chars_bigendian (f + 4, extension, 4);
2058 number_to_chars_bigendian (f + 8, 0, size - 8);
2059 }
2060 else if (size > 4)
2061 number_to_chars_bigendian (f + 4, extension, size - 4);
2062 }
2063 else
2064 {
2065 /* Allocate space for the instruction. */
2066 f = frag_more (size);
2067
2068 /* Fill in bytes for the instruction. Note that opcode fields
2069 are written big-endian, 16 & 32bit immediates are written
2070 little endian. Egad. */
2071 if (opcode->format == FMT_S0
2072 || opcode->format == FMT_S1
2073 || opcode->format == FMT_D0
85cb2cf9
JL
2074 || opcode->format == FMT_D6
2075 || opcode->format == FMT_D7
2076 || opcode->format == FMT_D10
252b5132
RH
2077 || opcode->format == FMT_D1)
2078 {
2079 number_to_chars_bigendian (f, insn, size);
2080 }
2081 else if (opcode->format == FMT_S2
2082 && opcode->opcode != 0xdf0000
2083 && opcode->opcode != 0xde0000)
2084 {
2085 /* A format S2 instruction that is _not_ "ret" and "retf". */
2086 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
2087 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
2088 }
2089 else if (opcode->format == FMT_S2)
2090 {
2091 /* This must be a ret or retf, which is written entirely in
2092 big-endian format. */
2093 number_to_chars_bigendian (f, insn, 3);
2094 }
2095 else if (opcode->format == FMT_S4
2096 && opcode->opcode != 0xdc000000)
2097 {
2098 /* This must be a format S4 "call" instruction. What a pain. */
2099 unsigned long temp = (insn >> 8) & 0xffff;
2100 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2101 number_to_chars_littleendian (f + 1, temp, 2);
2102 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
2103 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2104 }
2105 else if (opcode->format == FMT_S4)
2106 {
2107 /* This must be a format S4 "jmp" instruction. */
2108 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
2109 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2110 number_to_chars_littleendian (f + 1, temp, 4);
2111 }
2112 else if (opcode->format == FMT_S6)
2113 {
2114 unsigned long temp = ((insn & 0xffffff) << 8)
2115 | ((extension >> 16) & 0xff);
2116 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2117 number_to_chars_littleendian (f + 1, temp, 4);
2118 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2119 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2120 }
2121 else if (opcode->format == FMT_D2
2122 && opcode->opcode != 0xfaf80000
2123 && opcode->opcode != 0xfaf00000
2124 && opcode->opcode != 0xfaf40000)
2125 {
2126 /* A format D2 instruction where the 16bit immediate is
2127 really a single 16bit value, not two 8bit values. */
2128 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2129 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2130 }
2131 else if (opcode->format == FMT_D2)
2132 {
2133 /* A format D2 instruction where the 16bit immediate
2134 is really two 8bit immediates. */
2135 number_to_chars_bigendian (f, insn, 4);
2136 }
e7b71525
AO
2137 else if (opcode->format == FMT_D3)
2138 {
2139 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2140 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2141 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2142 }
252b5132
RH
2143 else if (opcode->format == FMT_D4)
2144 {
2145 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 2146
252b5132
RH
2147 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2148 number_to_chars_littleendian (f + 2, temp, 4);
2149 }
2150 else if (opcode->format == FMT_D5)
2151 {
87271fa6
NC
2152 unsigned long temp = (((insn & 0xffff) << 16)
2153 | ((extension >> 8) & 0xffff));
2154
252b5132
RH
2155 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2156 number_to_chars_littleendian (f + 2, temp, 4);
2157 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2158 }
85cb2cf9
JL
2159 else if (opcode->format == FMT_D8)
2160 {
87271fa6
NC
2161 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2162
2163 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2164 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2165 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
2166 }
2167 else if (opcode->format == FMT_D9)
2168 {
87271fa6
NC
2169 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2170
2171 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2172 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 2173 }
252b5132
RH
2174
2175 /* Create any fixups. */
2176 for (i = 0; i < fc; i++)
2177 {
2178 const struct mn10300_operand *operand;
2179
2180 operand = &mn10300_operands[fixups[i].opindex];
bf6f0d0c
AO
2181 if (fixups[i].reloc != BFD_RELOC_UNUSED
2182 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2183 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2184 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2185 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
252b5132
RH
2186 {
2187 reloc_howto_type *reloc_howto;
2188 int size;
2189 int offset;
2190 fixS *fixP;
2191
87271fa6
NC
2192 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2193 fixups[i].reloc);
252b5132
RH
2194
2195 if (!reloc_howto)
87271fa6
NC
2196 abort ();
2197
252b5132
RH
2198 size = bfd_get_reloc_size (reloc_howto);
2199
2200 if (size < 1 || size > 4)
87271fa6 2201 abort ();
252b5132
RH
2202
2203 offset = 4 - size;
2204 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2205 size, &fixups[i].exp,
2206 reloc_howto->pc_relative,
2207 fixups[i].reloc);
2208 }
2209 else
2210 {
2211 int reloc, pcrel, reloc_size, offset;
2212 fixS *fixP;
2213
2214 reloc = BFD_RELOC_NONE;
bf6f0d0c
AO
2215 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2216 reloc = fixups[i].reloc;
252b5132
RH
2217 /* How big is the reloc? Remember SPLIT relocs are
2218 implicitly 32bits. */
2219 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2220 reloc_size = 32;
85cb2cf9
JL
2221 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2222 reloc_size = 24;
252b5132
RH
2223 else
2224 reloc_size = operand->bits;
2225
2226 /* Is the reloc pc-relative? */
2227 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
bf6f0d0c
AO
2228 if (reloc != BFD_RELOC_NONE)
2229 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
252b5132 2230
a7c92dae 2231 offset = size - (reloc_size + operand->shift) / 8;
eb0dfd58 2232
252b5132 2233 /* Choose a proper BFD relocation type. */
bf6f0d0c
AO
2234 if (reloc != BFD_RELOC_NONE)
2235 ;
2236 else if (pcrel)
252b5132
RH
2237 {
2238 if (reloc_size == 32)
2239 reloc = BFD_RELOC_32_PCREL;
2240 else if (reloc_size == 16)
2241 reloc = BFD_RELOC_16_PCREL;
2242 else if (reloc_size == 8)
2243 reloc = BFD_RELOC_8_PCREL;
2244 else
2245 abort ();
2246 }
2247 else
2248 {
2249 if (reloc_size == 32)
2250 reloc = BFD_RELOC_32;
2251 else if (reloc_size == 16)
2252 reloc = BFD_RELOC_16;
2253 else if (reloc_size == 8)
2254 reloc = BFD_RELOC_8;
2255 else
2256 abort ();
2257 }
2258
2259 /* Convert the size of the reloc into what fix_new_exp wants. */
2260 reloc_size = reloc_size / 8;
2261 if (reloc_size == 8)
2262 reloc_size = 0;
2263 else if (reloc_size == 16)
2264 reloc_size = 1;
2265 else if (reloc_size == 32)
2266 reloc_size = 2;
2267
2268 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2269 reloc_size, &fixups[i].exp, pcrel,
2270 ((bfd_reloc_code_real_type) reloc));
2271
2272 if (pcrel)
2273 fixP->fx_offset += offset;
2274 }
2275 }
e8b1cae5 2276
076dc439
AO
2277 dwarf2_emit_insn (size);
2278 }
252b5132
RH
2279}
2280
87271fa6
NC
2281/* If while processing a fixup, a reloc really needs to be created
2282 then it is done here. */
252b5132 2283
252b5132
RH
2284arelent *
2285tc_gen_reloc (seg, fixp)
b4c1ea07 2286 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
2287 fixS *fixp;
2288{
2289 arelent *reloc;
2290 reloc = (arelent *) xmalloc (sizeof (arelent));
2291
2292 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2293 if (reloc->howto == (reloc_howto_type *) NULL)
2294 {
2295 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
2296 _("reloc %d not supported by object file format"),
2297 (int) fixp->fx_r_type);
252b5132
RH
2298 return NULL;
2299 }
2300 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2301
bf6f0d0c
AO
2302 if (fixp->fx_subsy
2303 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2304 {
2305 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2306 fixp->fx_subsy = 0;
2307 }
2308
252b5132
RH
2309 if (fixp->fx_addsy && fixp->fx_subsy)
2310 {
7dc8f5ce
AO
2311 reloc->sym_ptr_ptr = NULL;
2312
4e75439a
AO
2313 /* If we got a difference between two symbols, and the
2314 subtracted symbol is in the current section, use a
2315 PC-relative relocation. If both symbols are in the same
2316 section, the difference would have already been simplified
2317 to a constant. */
2318 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
2319 {
2320 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2321 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2322 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
2323 + fixp->fx_offset);
2324
2325 switch (fixp->fx_r_type)
2326 {
2327 case BFD_RELOC_8:
2328 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2329 BFD_RELOC_8_PCREL);
2330 return reloc;
5d6255fe 2331
4e75439a
AO
2332 case BFD_RELOC_16:
2333 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2334 BFD_RELOC_16_PCREL);
2335 return reloc;
2336
2337 case BFD_RELOC_24:
2338 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2339 BFD_RELOC_24_PCREL);
2340 return reloc;
2341
2342 case BFD_RELOC_32:
2343 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2344 BFD_RELOC_32_PCREL);
2345 return reloc;
2346
2347 default:
2348 /* Try to compute the absolute value below. */
2349 break;
2350 }
2351 }
87271fa6 2352
252b5132
RH
2353 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2354 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2355 {
2356 as_bad_where (fixp->fx_file, fixp->fx_line,
2357 "Difference of symbols in different sections is not supported");
252b5132 2358 }
6e22e505
AO
2359 else
2360 {
2361 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2362
2363 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2364 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2365
2366 switch (fixp->fx_r_type)
2367 {
2368 case BFD_RELOC_8:
2369 md_number_to_chars (fixpos, reloc->addend, 1);
2370 break;
5d6255fe 2371
6e22e505
AO
2372 case BFD_RELOC_16:
2373 md_number_to_chars (fixpos, reloc->addend, 2);
2374 break;
252b5132 2375
6e22e505
AO
2376 case BFD_RELOC_24:
2377 md_number_to_chars (fixpos, reloc->addend, 3);
2378 break;
2379
2380 case BFD_RELOC_32:
2381 md_number_to_chars (fixpos, reloc->addend, 4);
2382 break;
2383
2384 default:
2385 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
2386 return reloc;
2387 }
2388 }
2389
7dc8f5ce
AO
2390 if (reloc->sym_ptr_ptr)
2391 free (reloc->sym_ptr_ptr);
6e22e505
AO
2392 free (reloc);
2393 return NULL;
252b5132 2394 }
87271fa6 2395 else
252b5132 2396 {
87271fa6 2397 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 2398 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2399 reloc->addend = fixp->fx_offset;
2400 }
2401 return reloc;
2402}
2403
2404int
2405md_estimate_size_before_relax (fragp, seg)
2406 fragS *fragp;
2407 asection *seg;
2408{
93c2a809
AM
2409 if (fragp->fr_subtype == 6
2410 && (!S_IS_DEFINED (fragp->fr_symbol)
2411 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2412 fragp->fr_subtype = 7;
2413 else if (fragp->fr_subtype == 8
2414 && (!S_IS_DEFINED (fragp->fr_symbol)
2415 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2416 fragp->fr_subtype = 9;
2417 else if (fragp->fr_subtype == 10
2418 && (!S_IS_DEFINED (fragp->fr_symbol)
2419 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2420 fragp->fr_subtype = 12;
2421
e7b71525
AO
2422 if (fragp->fr_subtype == 13)
2423 return 3;
93c2a809
AM
2424 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2425 abort ();
2426
2427 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 2428}
252b5132
RH
2429
2430long
2431md_pcrel_from (fixp)
2432 fixS *fixp;
2433{
87271fa6 2434 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
2435 {
2436 /* The symbol is undefined. Let the linker figure it out. */
2437 return 0;
2438 }
2439 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
2440}
2441
94f592af
NC
2442void
2443md_apply_fix3 (fixP, valP, seg)
2444 fixS * fixP;
2445 valueT * valP;
252b5132
RH
2446 segT seg;
2447{
94f592af 2448 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
58a77e41 2449 int size = 0;
94f592af 2450 int value = (int) * valP;
58a77e41 2451
94f592af 2452 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
58a77e41
EC
2453
2454 /* This should never happen. */
2455 if (seg->flags & SEC_ALLOC)
94f592af 2456 abort ();
58a77e41 2457
c51ce5f0
EC
2458 /* The value we are passed in *valuep includes the symbol values.
2459 Since we are using BFD_ASSEMBLER, if we are doing this relocation
2460 the code in write.c is going to call bfd_install_relocation, which
2461 is also going to use the symbol value. That means that if the
2462 reloc is fully resolved we want to use *valuep since
2463 bfd_install_relocation is not being used.
2464
2465 However, if the reloc is not fully resolved we do not want to use
2466 *valuep, and must use fx_offset instead. However, if the reloc
2467 is PC relative, we do want to use *valuep since it includes the
2468 result of md_pcrel_from. */
94f592af
NC
2469 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
2470 value = fixP->fx_offset;
c51ce5f0 2471
58a77e41
EC
2472 /* If the fix is relative to a symbol which is not defined, or not
2473 in the same segment as the fix, we cannot resolve it here. */
94f592af
NC
2474 if (fixP->fx_addsy != NULL
2475 && (! S_IS_DEFINED (fixP->fx_addsy)
2476 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
58a77e41 2477 {
94f592af
NC
2478 fixP->fx_done = 0;
2479 return;
58a77e41
EC
2480 }
2481
94f592af 2482 switch (fixP->fx_r_type)
58a77e41
EC
2483 {
2484 case BFD_RELOC_8:
96f37af6 2485 case BFD_RELOC_8_PCREL:
58a77e41
EC
2486 size = 1;
2487 break;
2488
2489 case BFD_RELOC_16:
96f37af6 2490 case BFD_RELOC_16_PCREL:
58a77e41
EC
2491 size = 2;
2492 break;
2493
2494 case BFD_RELOC_32:
96f37af6 2495 case BFD_RELOC_32_PCREL:
58a77e41
EC
2496 size = 4;
2497 break;
2498
2499 case BFD_RELOC_VTABLE_INHERIT:
2500 case BFD_RELOC_VTABLE_ENTRY:
94f592af
NC
2501 fixP->fx_done = 0;
2502 return;
58a77e41
EC
2503
2504 case BFD_RELOC_NONE:
2505 default:
94f592af
NC
2506 as_bad_where (fixP->fx_file, fixP->fx_line,
2507 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
58a77e41
EC
2508 }
2509
c51ce5f0 2510 md_number_to_chars (fixpos, value, size);
58a77e41 2511
b653e7f9 2512 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
94f592af
NC
2513 if (fixP->fx_addsy == NULL)
2514 fixP->fx_done = 1;
58a77e41
EC
2515}
2516
58a77e41
EC
2517/* Return zero if the fixup in fixp should be left alone and not
2518 adjusted. */
2519
b34976b6 2520bfd_boolean
58a77e41
EC
2521mn10300_fix_adjustable (fixp)
2522 struct fix *fixp;
2523{
bf6f0d0c
AO
2524 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixp))
2525 return 0;
2526
58a77e41
EC
2527 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2528 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2529 return 0;
2530
7e8f4100
AO
2531 /* Do not adjust relocations involving symbols in code sections,
2532 because it breaks linker relaxations. This could be fixed in the
2533 linker, but this fix is simpler, and it pretty much only affects
2534 object size a little bit. */
2535 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2536 return 0;
2537
58a77e41 2538 return 1;
252b5132
RH
2539}
2540
2541/* Insert an operand value into an instruction. */
2542
2543static void
2544mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2545 unsigned long *insnp;
2546 unsigned long *extensionp;
2547 const struct mn10300_operand *operand;
2548 offsetT val;
2549 char *file;
2550 unsigned int line;
2551 unsigned int shift;
2552{
2553 /* No need to check 32bit operands for a bit. Note that
2554 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2555 if (operand->bits != 32
2556 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2557 {
2558 long min, max;
2559 offsetT test;
2560 int bits;
2561
2562 bits = operand->bits;
85cb2cf9
JL
2563 if (operand->flags & MN10300_OPERAND_24BIT)
2564 bits = 24;
252b5132
RH
2565
2566 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2567 {
2568 max = (1 << (bits - 1)) - 1;
2569 min = - (1 << (bits - 1));
2570 }
2571 else
87271fa6
NC
2572 {
2573 max = (1 << bits) - 1;
2574 min = 0;
2575 }
252b5132
RH
2576
2577 test = val;
2578
252b5132 2579 if (test < (offsetT) min || test > (offsetT) max)
87271fa6
NC
2580 {
2581 const char *err =
2582 _("operand out of range (%s not between %ld and %ld)");
2583 char buf[100];
2584
2585 sprint_value (buf, test);
2586 if (file == (char *) NULL)
2587 as_warn (err, buf, min, max);
2588 else
2589 as_warn_where (file, line, err, buf, min, max);
2590 }
252b5132
RH
2591 }
2592
2593 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2594 {
2595 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2596 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2597 << operand->shift);
2598 }
85cb2cf9
JL
2599 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2600 {
2601 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2602 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2603 << operand->shift);
2604 }
e7b71525
AO
2605 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
2606 {
2607 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
2608 explanation of these variables. Note that FMT-implied shifts
2609 are not taken into account for FP registers. */
2610 unsigned long mask_low, mask_high;
2611 int shl_low, shr_high, shl_high;
2612
2613 switch (operand->bits)
2614 {
2615 case 5:
2616 /* Handle regular FP registers. */
2617 if (operand->shift >= 0)
2618 {
2619 /* This is an `m' register. */
2620 shl_low = operand->shift;
2621 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
2622 }
2623 else
2624 {
2625 /* This is an `n' register. */
2626 shl_low = -operand->shift;
2627 shl_high = shl_low / 4;
2628 }
2629
2630 mask_low = 0x0f;
2631 mask_high = 0x10;
2632 shr_high = 4;
2633 break;
2634
2635 case 3:
2636 /* Handle accumulators. */
2637 shl_low = -operand->shift;
2638 shl_high = 0;
2639 mask_low = 0x03;
2640 mask_high = 0x04;
2641 shr_high = 2;
2642 break;
2643
2644 default:
2645 abort ();
2646 }
2647 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
2648 | ((val & mask_low) << shl_low));
2649 }
252b5132
RH
2650 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2651 {
2652 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2653 << (operand->shift + shift));
2654
2655 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2656 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2657 << (operand->shift + shift + operand->bits));
2658 }
2659 else
2660 {
2661 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2662 << (operand->shift + shift));
2663
2664 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2665 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2666 << (operand->shift + shift + operand->bits));
2667 }
2668}
2669
2670static unsigned long
2671check_operand (insn, operand, val)
b4c1ea07 2672 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2673 const struct mn10300_operand *operand;
2674 offsetT val;
2675{
2676 /* No need to check 32bit operands for a bit. Note that
2677 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2678 if (operand->bits != 32
2679 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2680 {
2681 long min, max;
2682 offsetT test;
2683 int bits;
2684
2685 bits = operand->bits;
85cb2cf9
JL
2686 if (operand->flags & MN10300_OPERAND_24BIT)
2687 bits = 24;
252b5132
RH
2688
2689 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2690 {
2691 max = (1 << (bits - 1)) - 1;
2692 min = - (1 << (bits - 1));
2693 }
2694 else
87271fa6
NC
2695 {
2696 max = (1 << bits) - 1;
2697 min = 0;
2698 }
252b5132
RH
2699
2700 test = val;
2701
252b5132
RH
2702 if (test < (offsetT) min || test > (offsetT) max)
2703 return 0;
2704 else
2705 return 1;
2706 }
2707 return 1;
2708}
2709
2710static void
2711set_arch_mach (mach)
497f322d 2712 int mach;
252b5132
RH
2713{
2714 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2715 as_warn (_("could not set architecture and machine"));
2716
2717 current_machine = mach;
2718}
bf6f0d0c
AO
2719
2720static inline char * mn10300_end_of_match PARAMS ((char *, char *));
2721
2722static inline char *
2723mn10300_end_of_match (cont, what)
2724 char *cont, *what;
2725{
2726 int len = strlen (what);
2727
2728 if (strncmp (cont, what, strlen (what)) == 0
2729 && ! is_part_of_name (cont[len]))
2730 return cont + len;
2731
2732 return NULL;
2733}
2734
2735int
2736mn10300_parse_name (name, exprP, nextcharP)
2737 char const *name;
2738 expressionS *exprP;
2739 char *nextcharP;
2740{
2741 char *next = input_line_pointer;
2742 char *next_end;
2743 int reloc_type;
2744 segT segment;
2745
2746 exprP->X_op_symbol = NULL;
2747
2748 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2749 {
2750 if (! GOT_symbol)
2751 GOT_symbol = symbol_find_or_make (name);
2752
2753 exprP->X_add_symbol = GOT_symbol;
2754 no_suffix:
2755 /* If we have an absolute symbol or a reg,
2756 then we know its value now. */
2757 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2758 if (segment == absolute_section)
2759 {
2760 exprP->X_op = O_constant;
2761 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2762 exprP->X_add_symbol = NULL;
2763 }
2764 else if (segment == reg_section)
2765 {
2766 exprP->X_op = O_register;
2767 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2768 exprP->X_add_symbol = NULL;
2769 }
2770 else
2771 {
2772 exprP->X_op = O_symbol;
2773 exprP->X_add_number = 0;
2774 }
2775
2776 return 1;
2777 }
2778
2779 exprP->X_add_symbol = symbol_find_or_make (name);
2780
2781 if (*nextcharP != '@')
2782 goto no_suffix;
2783 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2784 reloc_type = BFD_RELOC_32_GOTOFF;
2785 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2786 reloc_type = BFD_RELOC_MN10300_GOT32;
2787 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2788 reloc_type = BFD_RELOC_32_PLT_PCREL;
2789 else
2790 goto no_suffix;
2791
2792 *input_line_pointer = *nextcharP;
2793 input_line_pointer = next_end;
2794 *nextcharP = *input_line_pointer;
2795 *input_line_pointer = '\0';
2796
2797 exprP->X_op = O_PIC_reloc;
2798 exprP->X_add_number = 0;
2799 exprP->X_md = reloc_type;
2800
2801 return 1;
2802}
This page took 0.379643 seconds and 4 git commands to generate.