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[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
f7e42eb4
NC
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
87271fa6 25#include "subsegs.h"
252b5132 26#include "opcode/mn10300.h"
e8b1cae5 27#include "dwarf2dbg.h"
252b5132
RH
28\f
29/* Structure to hold information about predefined registers. */
30struct reg_name
31{
32 const char *name;
33 int value;
34};
35
87271fa6
NC
36/* Generic assembler global variables which must be defined by all
37 targets. */
252b5132 38
87271fa6 39/* Characters which always start a comment. */
252b5132
RH
40const char comment_chars[] = "#";
41
42/* Characters which start a comment at the beginning of a line. */
43const char line_comment_chars[] = ";#";
44
87271fa6 45/* Characters which may be used to separate multiple commands on a
252b5132
RH
46 single line. */
47const char line_separator_chars[] = ";";
48
87271fa6 49/* Characters which are used to indicate an exponent in a floating
252b5132
RH
50 point number. */
51const char EXP_CHARS[] = "eE";
52
87271fa6 53/* Characters which mean that a number is a floating point constant,
252b5132
RH
54 as in 0d1.0. */
55const char FLT_CHARS[] = "dD";
56\f
252b5132 57const relax_typeS md_relax_table[] = {
87271fa6 58 /* bCC relaxing */
252b5132
RH
59 {0x7f, -0x80, 2, 1},
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
62
87271fa6 63 /* bCC relaxing (uncommon cases) */
252b5132
RH
64 {0x7f, -0x80, 3, 4},
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
67
87271fa6 68 /* call relaxing */
252b5132
RH
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
71
87271fa6 72 /* calls relaxing */
252b5132
RH
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
75
87271fa6 76 /* jmp relaxing */
252b5132
RH
77 {0x7f, -0x80, 2, 11},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
80
81};
82
87271fa6 83/* Local functions. */
252b5132
RH
84static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
85 const struct mn10300_operand *,
86 offsetT, char *, unsigned,
87 unsigned));
88static unsigned long check_operand PARAMS ((unsigned long,
89 const struct mn10300_operand *,
90 offsetT));
91static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
92static boolean data_register_name PARAMS ((expressionS *expressionP));
93static boolean address_register_name PARAMS ((expressionS *expressionP));
94static boolean other_register_name PARAMS ((expressionS *expressionP));
0e1a166b 95static void set_arch_mach PARAMS ((unsigned int));
252b5132 96
1485d400
EC
97/* Set linkrelax here to avoid fixups in most sections. */
98int linkrelax = 1;
99
252b5132
RH
100static int current_machine;
101
87271fa6 102/* Fixups. */
252b5132
RH
103#define MAX_INSN_FIXUPS (5)
104struct mn10300_fixup
105{
106 expressionS exp;
107 int opindex;
108 bfd_reloc_code_real_type reloc;
109};
110struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
111static int fc;
112
113/* We must store the value of each register operand so that we can
114 verify that certain registers do not match. */
115int mn10300_reg_operands[MN10300_MAX_OPERANDS];
116\f
117const char *md_shortopts = "";
118struct option md_longopts[] = {
119 {NULL, no_argument, NULL, 0}
120};
87271fa6 121size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
122
123/* The target specific pseudo-ops which we support. */
124const pseudo_typeS md_pseudo_table[] =
125{
b4c1ea07
EC
126 { "file", dwarf2_directive_file, 0 },
127 { "loc", dwarf2_directive_loc, 0 },
0a727238
AO
128 { "am30", set_arch_mach, AM30 },
129 { "am33", set_arch_mach, AM33 },
130 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
131 {NULL, 0, 0}
132};
133
0a727238 134#define HAVE_AM33 (current_machine == AM33)
aa15f6f7 135#define HAVE_AM30 (current_machine == AM30)
0a727238 136
252b5132
RH
137/* Opcode hash table. */
138static struct hash_control *mn10300_hash;
139
87271fa6 140/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
141static const struct reg_name data_registers[] =
142{
143 { "d0", 0 },
144 { "d1", 1 },
145 { "d2", 2 },
146 { "d3", 3 },
147};
87271fa6
NC
148#define DATA_REG_NAME_CNT \
149 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
150
151static const struct reg_name address_registers[] =
152{
153 { "a0", 0 },
154 { "a1", 1 },
155 { "a2", 2 },
156 { "a3", 3 },
157};
87271fa6
NC
158
159#define ADDRESS_REG_NAME_CNT \
160 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 161
85cb2cf9
JL
162static const struct reg_name r_registers[] =
163{
164 { "a0", 8 },
165 { "a1", 9 },
166 { "a2", 10 },
167 { "a3", 11 },
168 { "d0", 12 },
169 { "d1", 13 },
170 { "d2", 14 },
171 { "d3", 15 },
172 { "e0", 0 },
173 { "e1", 1 },
174 { "e10", 10 },
175 { "e11", 11 },
176 { "e12", 12 },
177 { "e13", 13 },
178 { "e14", 14 },
179 { "e15", 15 },
180 { "e2", 2 },
181 { "e3", 3 },
182 { "e4", 4 },
183 { "e5", 5 },
184 { "e6", 6 },
185 { "e7", 7 },
186 { "e8", 8 },
187 { "e9", 9 },
188 { "r0", 0 },
189 { "r1", 1 },
190 { "r10", 10 },
191 { "r11", 11 },
192 { "r12", 12 },
193 { "r13", 13 },
194 { "r14", 14 },
195 { "r15", 15 },
196 { "r2", 2 },
197 { "r3", 3 },
198 { "r4", 4 },
199 { "r5", 5 },
200 { "r6", 6 },
201 { "r7", 7 },
202 { "r8", 8 },
203 { "r9", 9 },
204};
87271fa6
NC
205
206#define R_REG_NAME_CNT \
207 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
208
209static const struct reg_name xr_registers[] =
210{
211 { "mcrh", 2 },
212 { "mcrl", 3 },
213 { "mcvf", 4 },
214 { "mdrq", 1 },
4dfea105 215 { "pc", 0 },
85cb2cf9
JL
216 { "sp", 0 },
217 { "xr0", 0 },
218 { "xr1", 1 },
219 { "xr10", 10 },
220 { "xr11", 11 },
221 { "xr12", 12 },
222 { "xr13", 13 },
223 { "xr14", 14 },
224 { "xr15", 15 },
225 { "xr2", 2 },
226 { "xr3", 3 },
227 { "xr4", 4 },
228 { "xr5", 5 },
229 { "xr6", 6 },
230 { "xr7", 7 },
231 { "xr8", 8 },
232 { "xr9", 9 },
233};
85cb2cf9 234
87271fa6
NC
235#define XR_REG_NAME_CNT \
236 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132
RH
237
238static const struct reg_name other_registers[] =
239{
240 { "mdr", 0 },
241 { "psw", 0 },
242 { "sp", 0 },
243};
87271fa6
NC
244
245#define OTHER_REG_NAME_CNT \
246 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132
RH
247
248/* reg_name_search does a binary search of the given register table
249 to see if "name" is a valid regiter name. Returns the register
87271fa6 250 number from the array on success, or -1 on failure. */
252b5132
RH
251
252static int
253reg_name_search (regs, regcount, name)
254 const struct reg_name *regs;
255 int regcount;
256 const char *name;
257{
258 int middle, low, high;
259 int cmp;
260
261 low = 0;
262 high = regcount - 1;
263
264 do
265 {
266 middle = (low + high) / 2;
267 cmp = strcasecmp (name, regs[middle].name);
268 if (cmp < 0)
269 high = middle - 1;
270 else if (cmp > 0)
271 low = middle + 1;
87271fa6
NC
272 else
273 return regs[middle].value;
252b5132
RH
274 }
275 while (low <= high);
276 return -1;
277}
278
85cb2cf9
JL
279/* Summary of register_name().
280 *
281 * in: Input_line_pointer points to 1st char of operand.
282 *
283 * out: A expressionS.
284 * The operand may have been a register: in this case, X_op == O_register,
285 * X_add_number is set to the register number, and truth is returned.
286 * Input_line_pointer->(next non-blank) char after operand, or is in
287 * its original state.
288 */
87271fa6 289
85cb2cf9
JL
290static boolean
291r_register_name (expressionP)
292 expressionS *expressionP;
293{
294 int reg_number;
295 char *name;
296 char *start;
297 char c;
298
87271fa6 299 /* Find the spelling of the operand. */
85cb2cf9
JL
300 start = name = input_line_pointer;
301
302 c = get_symbol_end ();
303 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
304
468cced8
AM
305 /* Put back the delimiting char. */
306 *input_line_pointer = c;
307
87271fa6
NC
308 /* Look to see if it's in the register table. */
309 if (reg_number >= 0)
85cb2cf9
JL
310 {
311 expressionP->X_op = O_register;
312 expressionP->X_add_number = reg_number;
313
87271fa6 314 /* Make the rest nice. */
85cb2cf9
JL
315 expressionP->X_add_symbol = NULL;
316 expressionP->X_op_symbol = NULL;
87271fa6 317
85cb2cf9
JL
318 return true;
319 }
87271fa6 320
468cced8
AM
321 /* Reset the line as if we had not done anything. */
322 input_line_pointer = start;
323 return false;
85cb2cf9
JL
324}
325
326/* Summary of register_name().
327 *
328 * in: Input_line_pointer points to 1st char of operand.
329 *
330 * out: A expressionS.
331 * The operand may have been a register: in this case, X_op == O_register,
332 * X_add_number is set to the register number, and truth is returned.
333 * Input_line_pointer->(next non-blank) char after operand, or is in
334 * its original state.
335 */
87271fa6 336
85cb2cf9
JL
337static boolean
338xr_register_name (expressionP)
339 expressionS *expressionP;
340{
341 int reg_number;
342 char *name;
343 char *start;
344 char c;
345
87271fa6 346 /* Find the spelling of the operand. */
85cb2cf9
JL
347 start = name = input_line_pointer;
348
349 c = get_symbol_end ();
350 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
351
468cced8
AM
352 /* Put back the delimiting char. */
353 *input_line_pointer = c;
354
87271fa6
NC
355 /* Look to see if it's in the register table. */
356 if (reg_number >= 0)
85cb2cf9
JL
357 {
358 expressionP->X_op = O_register;
359 expressionP->X_add_number = reg_number;
360
87271fa6 361 /* Make the rest nice. */
85cb2cf9
JL
362 expressionP->X_add_symbol = NULL;
363 expressionP->X_op_symbol = NULL;
87271fa6 364
85cb2cf9
JL
365 return true;
366 }
87271fa6 367
468cced8
AM
368 /* Reset the line as if we had not done anything. */
369 input_line_pointer = start;
370 return false;
85cb2cf9 371}
252b5132
RH
372
373/* Summary of register_name().
374 *
375 * in: Input_line_pointer points to 1st char of operand.
376 *
377 * out: A expressionS.
378 * The operand may have been a register: in this case, X_op == O_register,
379 * X_add_number is set to the register number, and truth is returned.
380 * Input_line_pointer->(next non-blank) char after operand, or is in
381 * its original state.
382 */
87271fa6 383
252b5132
RH
384static boolean
385data_register_name (expressionP)
386 expressionS *expressionP;
387{
388 int reg_number;
389 char *name;
390 char *start;
391 char c;
392
87271fa6 393 /* Find the spelling of the operand. */
252b5132
RH
394 start = name = input_line_pointer;
395
396 c = get_symbol_end ();
397 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
398
468cced8
AM
399 /* Put back the delimiting char. */
400 *input_line_pointer = c;
401
87271fa6
NC
402 /* Look to see if it's in the register table. */
403 if (reg_number >= 0)
252b5132
RH
404 {
405 expressionP->X_op = O_register;
406 expressionP->X_add_number = reg_number;
407
87271fa6 408 /* Make the rest nice. */
252b5132
RH
409 expressionP->X_add_symbol = NULL;
410 expressionP->X_op_symbol = NULL;
87271fa6 411
252b5132
RH
412 return true;
413 }
87271fa6 414
468cced8
AM
415 /* Reset the line as if we had not done anything. */
416 input_line_pointer = start;
417 return false;
252b5132
RH
418}
419
420/* Summary of register_name().
421 *
422 * in: Input_line_pointer points to 1st char of operand.
423 *
424 * out: A expressionS.
425 * The operand may have been a register: in this case, X_op == O_register,
426 * X_add_number is set to the register number, and truth is returned.
427 * Input_line_pointer->(next non-blank) char after operand, or is in
428 * its original state.
429 */
87271fa6 430
252b5132
RH
431static boolean
432address_register_name (expressionP)
433 expressionS *expressionP;
434{
435 int reg_number;
436 char *name;
437 char *start;
438 char c;
439
87271fa6 440 /* Find the spelling of the operand. */
252b5132
RH
441 start = name = input_line_pointer;
442
443 c = get_symbol_end ();
444 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
445
468cced8
AM
446 /* Put back the delimiting char. */
447 *input_line_pointer = c;
448
87271fa6
NC
449 /* Look to see if it's in the register table. */
450 if (reg_number >= 0)
252b5132
RH
451 {
452 expressionP->X_op = O_register;
453 expressionP->X_add_number = reg_number;
454
87271fa6 455 /* Make the rest nice. */
252b5132
RH
456 expressionP->X_add_symbol = NULL;
457 expressionP->X_op_symbol = NULL;
87271fa6 458
252b5132
RH
459 return true;
460 }
87271fa6 461
468cced8
AM
462 /* Reset the line as if we had not done anything. */
463 input_line_pointer = start;
464 return false;
252b5132
RH
465}
466
467/* Summary of register_name().
468 *
469 * in: Input_line_pointer points to 1st char of operand.
470 *
471 * out: A expressionS.
472 * The operand may have been a register: in this case, X_op == O_register,
473 * X_add_number is set to the register number, and truth is returned.
474 * Input_line_pointer->(next non-blank) char after operand, or is in
475 * its original state.
476 */
87271fa6 477
252b5132
RH
478static boolean
479other_register_name (expressionP)
480 expressionS *expressionP;
481{
482 int reg_number;
483 char *name;
484 char *start;
485 char c;
486
87271fa6 487 /* Find the spelling of the operand. */
252b5132
RH
488 start = name = input_line_pointer;
489
490 c = get_symbol_end ();
491 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
492
468cced8
AM
493 /* Put back the delimiting char. */
494 *input_line_pointer = c;
495
87271fa6
NC
496 /* Look to see if it's in the register table. */
497 if (reg_number >= 0)
252b5132
RH
498 {
499 expressionP->X_op = O_register;
500 expressionP->X_add_number = reg_number;
501
87271fa6 502 /* Make the rest nice. */
252b5132
RH
503 expressionP->X_add_symbol = NULL;
504 expressionP->X_op_symbol = NULL;
87271fa6 505
252b5132
RH
506 return true;
507 }
87271fa6 508
468cced8
AM
509 /* Reset the line as if we had not done anything. */
510 input_line_pointer = start;
511 return false;
252b5132
RH
512}
513
514void
515md_show_usage (stream)
87271fa6 516 FILE *stream;
252b5132 517{
87271fa6 518 fprintf (stream, _("MN10300 options:\n\
252b5132 519none yet\n"));
87271fa6 520}
252b5132
RH
521
522int
523md_parse_option (c, arg)
b4c1ea07
EC
524 int c ATTRIBUTE_UNUSED;
525 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
526{
527 return 0;
528}
529
530symbolS *
531md_undefined_symbol (name)
b4c1ea07 532 char *name ATTRIBUTE_UNUSED;
252b5132
RH
533{
534 return 0;
535}
536
537char *
538md_atof (type, litp, sizep)
87271fa6
NC
539 int type;
540 char *litp;
541 int *sizep;
252b5132
RH
542{
543 int prec;
544 LITTLENUM_TYPE words[4];
545 char *t;
546 int i;
547
548 switch (type)
549 {
550 case 'f':
551 prec = 2;
552 break;
553
554 case 'd':
555 prec = 4;
556 break;
557
558 default:
559 *sizep = 0;
560 return "bad call to md_atof";
561 }
87271fa6 562
252b5132
RH
563 t = atof_ieee (input_line_pointer, type, words);
564 if (t)
565 input_line_pointer = t;
566
567 *sizep = prec * 2;
568
569 for (i = prec - 1; i >= 0; i--)
570 {
571 md_number_to_chars (litp, (valueT) words[i], 2);
572 litp += 2;
573 }
574
575 return NULL;
576}
577
252b5132
RH
578void
579md_convert_frag (abfd, sec, fragP)
b4c1ea07 580 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
581 asection *sec;
582 fragS *fragP;
252b5132
RH
583{
584 static unsigned long label_count = 0;
585 char buf[40];
586
587 subseg_change (sec, 0);
588 if (fragP->fr_subtype == 0)
589 {
590 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
591 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
592 fragP->fr_var = 0;
593 fragP->fr_fix += 2;
594 }
595 else if (fragP->fr_subtype == 1)
596 {
597 /* Reverse the condition of the first branch. */
598 int offset = fragP->fr_fix;
599 int opcode = fragP->fr_literal[offset] & 0xff;
600
601 switch (opcode)
602 {
603 case 0xc8:
604 opcode = 0xc9;
605 break;
606 case 0xc9:
607 opcode = 0xc8;
608 break;
609 case 0xc0:
610 opcode = 0xc2;
611 break;
612 case 0xc2:
613 opcode = 0xc0;
614 break;
615 case 0xc3:
616 opcode = 0xc1;
617 break;
618 case 0xc1:
619 opcode = 0xc3;
620 break;
621 case 0xc4:
622 opcode = 0xc6;
623 break;
624 case 0xc6:
625 opcode = 0xc4;
626 break;
627 case 0xc7:
628 opcode = 0xc5;
629 break;
630 case 0xc5:
631 opcode = 0xc7;
632 break;
633 default:
634 abort ();
635 }
636 fragP->fr_literal[offset] = opcode;
637
638 /* Create a fixup for the reversed conditional branch. */
0aa529cb 639 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
640 fix_new (fragP, fragP->fr_fix + 1, 1,
641 symbol_new (buf, sec, 0, fragP->fr_next),
642 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
643
644 /* Now create the unconditional branch + fixup to the
645 final target. */
646 fragP->fr_literal[offset + 2] = 0xcc;
647 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
648 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
649 fragP->fr_var = 0;
650 fragP->fr_fix += 5;
651 }
652 else if (fragP->fr_subtype == 2)
653 {
654 /* Reverse the condition of the first branch. */
655 int offset = fragP->fr_fix;
656 int opcode = fragP->fr_literal[offset] & 0xff;
657
658 switch (opcode)
659 {
660 case 0xc8:
661 opcode = 0xc9;
662 break;
663 case 0xc9:
664 opcode = 0xc8;
665 break;
666 case 0xc0:
667 opcode = 0xc2;
668 break;
669 case 0xc2:
670 opcode = 0xc0;
671 break;
672 case 0xc3:
673 opcode = 0xc1;
674 break;
675 case 0xc1:
676 opcode = 0xc3;
677 break;
678 case 0xc4:
679 opcode = 0xc6;
680 break;
681 case 0xc6:
682 opcode = 0xc4;
683 break;
684 case 0xc7:
685 opcode = 0xc5;
686 break;
687 case 0xc5:
688 opcode = 0xc7;
689 break;
690 default:
691 abort ();
692 }
693 fragP->fr_literal[offset] = opcode;
694
695 /* Create a fixup for the reversed conditional branch. */
0aa529cb 696 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
697 fix_new (fragP, fragP->fr_fix + 1, 1,
698 symbol_new (buf, sec, 0, fragP->fr_next),
699 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
700
701 /* Now create the unconditional branch + fixup to the
702 final target. */
703 fragP->fr_literal[offset + 2] = 0xdc;
704 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
705 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
706 fragP->fr_var = 0;
707 fragP->fr_fix += 7;
708 }
709 else if (fragP->fr_subtype == 3)
710 {
711 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
712 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
713 fragP->fr_var = 0;
714 fragP->fr_fix += 3;
715 }
716 else if (fragP->fr_subtype == 4)
717 {
718 /* Reverse the condition of the first branch. */
719 int offset = fragP->fr_fix;
720 int opcode = fragP->fr_literal[offset + 1] & 0xff;
721
722 switch (opcode)
723 {
724 case 0xe8:
725 opcode = 0xe9;
726 break;
727 case 0xe9:
728 opcode = 0xe8;
729 break;
730 case 0xea:
731 opcode = 0xeb;
732 break;
733 case 0xeb:
734 opcode = 0xea;
735 break;
736 default:
737 abort ();
738 }
739 fragP->fr_literal[offset + 1] = opcode;
740
741 /* Create a fixup for the reversed conditional branch. */
0aa529cb 742 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
743 fix_new (fragP, fragP->fr_fix + 2, 1,
744 symbol_new (buf, sec, 0, fragP->fr_next),
745 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
746
747 /* Now create the unconditional branch + fixup to the
748 final target. */
749 fragP->fr_literal[offset + 3] = 0xcc;
750 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
751 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
752 fragP->fr_var = 0;
753 fragP->fr_fix += 6;
754 }
755 else if (fragP->fr_subtype == 5)
756 {
757 /* Reverse the condition of the first branch. */
758 int offset = fragP->fr_fix;
759 int opcode = fragP->fr_literal[offset + 1] & 0xff;
760
761 switch (opcode)
762 {
763 case 0xe8:
764 opcode = 0xe9;
765 break;
766 case 0xea:
767 opcode = 0xeb;
768 break;
769 case 0xeb:
770 opcode = 0xea;
771 break;
772 default:
773 abort ();
774 }
775 fragP->fr_literal[offset + 1] = opcode;
776
777 /* Create a fixup for the reversed conditional branch. */
0aa529cb 778 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
779 fix_new (fragP, fragP->fr_fix + 2, 1,
780 symbol_new (buf, sec, 0, fragP->fr_next),
781 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
782
783 /* Now create the unconditional branch + fixup to the
784 final target. */
785 fragP->fr_literal[offset + 3] = 0xdc;
786 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
787 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
788 fragP->fr_var = 0;
789 fragP->fr_fix += 8;
790 }
791 else if (fragP->fr_subtype == 6)
792 {
793 int offset = fragP->fr_fix;
794 fragP->fr_literal[offset] = 0xcd;
795 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
796 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
797 fragP->fr_var = 0;
798 fragP->fr_fix += 5;
799 }
800 else if (fragP->fr_subtype == 7)
801 {
802 int offset = fragP->fr_fix;
803 fragP->fr_literal[offset] = 0xdd;
804 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
805 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
806
807 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
808 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
809 fragP->fr_var = 0;
810 fragP->fr_fix += 7;
811 }
812 else if (fragP->fr_subtype == 8)
813 {
814 int offset = fragP->fr_fix;
815 fragP->fr_literal[offset] = 0xfa;
816 fragP->fr_literal[offset + 1] = 0xff;
817 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
818 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
819 fragP->fr_var = 0;
820 fragP->fr_fix += 4;
821 }
822 else if (fragP->fr_subtype == 9)
823 {
824 int offset = fragP->fr_fix;
825 fragP->fr_literal[offset] = 0xfc;
826 fragP->fr_literal[offset + 1] = 0xff;
827
828 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
829 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
830 fragP->fr_var = 0;
831 fragP->fr_fix += 6;
832 }
833 else if (fragP->fr_subtype == 10)
834 {
835 fragP->fr_literal[fragP->fr_fix] = 0xca;
836 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
837 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
838 fragP->fr_var = 0;
839 fragP->fr_fix += 2;
840 }
841 else if (fragP->fr_subtype == 11)
842 {
843 int offset = fragP->fr_fix;
844 fragP->fr_literal[offset] = 0xcc;
845
846 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
847 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
848 fragP->fr_var = 0;
849 fragP->fr_fix += 3;
850 }
851 else if (fragP->fr_subtype == 12)
852 {
853 int offset = fragP->fr_fix;
854 fragP->fr_literal[offset] = 0xdc;
855
856 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
857 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
858 fragP->fr_var = 0;
859 fragP->fr_fix += 5;
860 }
861 else
862 abort ();
863}
864
865valueT
866md_section_align (seg, addr)
867 asection *seg;
868 valueT addr;
869{
870 int align = bfd_get_section_alignment (stdoutput, seg);
871 return ((addr + (1 << align) - 1) & (-1 << align));
872}
873
874void
875md_begin ()
876{
877 char *prev_name = "";
878 register const struct mn10300_opcode *op;
879
87271fa6 880 mn10300_hash = hash_new ();
252b5132
RH
881
882 /* Insert unique names into hash table. The MN10300 instruction set
883 has many identical opcode names that have different opcodes based
884 on the operands. This hash table then provides a quick index to
885 the first opcode with a particular name in the opcode table. */
886
887 op = mn10300_opcodes;
888 while (op->name)
889 {
87271fa6 890 if (strcmp (prev_name, op->name))
252b5132
RH
891 {
892 prev_name = (char *) op->name;
893 hash_insert (mn10300_hash, op->name, (char *) op);
894 }
895 op++;
896 }
897
252b5132 898 /* Set the default machine type. */
0a727238 899 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
900 as_warn (_("could not set architecture and machine"));
901
0a727238 902 current_machine = MN103;
252b5132
RH
903}
904
905void
87271fa6 906md_assemble (str)
252b5132
RH
907 char *str;
908{
909 char *s;
910 struct mn10300_opcode *opcode;
911 struct mn10300_opcode *next_opcode;
912 const unsigned char *opindex_ptr;
913 int next_opindex, relaxable;
eb0dfd58 914 unsigned long insn, extension, size = 0;
252b5132
RH
915 char *f;
916 int i;
917 int match;
918
919 /* Get the opcode. */
3882b010 920 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
252b5132
RH
921 ;
922 if (*s != '\0')
923 *s++ = '\0';
924
87271fa6
NC
925 /* Find the first opcode with the proper name. */
926 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
927 if (opcode == NULL)
928 {
929 as_bad (_("Unrecognized opcode: `%s'"), str);
930 return;
931 }
932
933 str = s;
3882b010 934 while (ISSPACE (*str))
252b5132
RH
935 ++str;
936
937 input_line_pointer = str;
938
87271fa6 939 for (;;)
252b5132
RH
940 {
941 const char *errmsg;
942 int op_idx;
943 char *hold;
944 int extra_shift = 0;
945
252b5132
RH
946 errmsg = _("Invalid opcode/operands");
947
948 /* Reset the array of register operands. */
949 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
950
951 relaxable = 0;
952 fc = 0;
953 match = 0;
954 next_opindex = 0;
955 insn = opcode->opcode;
956 extension = 0;
957
958 /* If the instruction is not available on the current machine
959 then it can not possibly match. */
960 if (opcode->machine
aa15f6f7
AO
961 && !(opcode->machine == AM33 && HAVE_AM33)
962 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
963 goto error;
964
965 for (op_idx = 1, opindex_ptr = opcode->operands;
966 *opindex_ptr != 0;
967 opindex_ptr++, op_idx++)
968 {
969 const struct mn10300_operand *operand;
970 expressionS ex;
971
972 if (next_opindex == 0)
973 {
974 operand = &mn10300_operands[*opindex_ptr];
975 }
976 else
977 {
978 operand = &mn10300_operands[next_opindex];
979 next_opindex = 0;
980 }
981
982 while (*str == ' ' || *str == ',')
983 ++str;
984
985 if (operand->flags & MN10300_OPERAND_RELAX)
986 relaxable = 1;
987
87271fa6 988 /* Gather the operand. */
252b5132
RH
989 hold = input_line_pointer;
990 input_line_pointer = str;
991
992 if (operand->flags & MN10300_OPERAND_PAREN)
993 {
994 if (*input_line_pointer != ')' && *input_line_pointer != '(')
995 {
996 input_line_pointer = hold;
997 str = hold;
998 goto error;
999 }
1000 input_line_pointer++;
1001 goto keep_going;
1002 }
1003 /* See if we can match the operands. */
1004 else if (operand->flags & MN10300_OPERAND_DREG)
1005 {
1006 if (!data_register_name (&ex))
1007 {
1008 input_line_pointer = hold;
1009 str = hold;
1010 goto error;
1011 }
1012 }
1013 else if (operand->flags & MN10300_OPERAND_AREG)
1014 {
1015 if (!address_register_name (&ex))
1016 {
1017 input_line_pointer = hold;
1018 str = hold;
1019 goto error;
1020 }
1021 }
1022 else if (operand->flags & MN10300_OPERAND_SP)
1023 {
1024 char *start = input_line_pointer;
1025 char c = get_symbol_end ();
1026
1027 if (strcasecmp (start, "sp") != 0)
1028 {
1029 *input_line_pointer = c;
1030 input_line_pointer = hold;
1031 str = hold;
1032 goto error;
1033 }
1034 *input_line_pointer = c;
1035 goto keep_going;
1036 }
85cb2cf9
JL
1037 else if (operand->flags & MN10300_OPERAND_RREG)
1038 {
1039 if (!r_register_name (&ex))
1040 {
1041 input_line_pointer = hold;
1042 str = hold;
1043 goto error;
1044 }
1045 }
1046 else if (operand->flags & MN10300_OPERAND_XRREG)
1047 {
1048 if (!xr_register_name (&ex))
1049 {
1050 input_line_pointer = hold;
1051 str = hold;
1052 goto error;
1053 }
1054 }
1055 else if (operand->flags & MN10300_OPERAND_USP)
1056 {
1057 char *start = input_line_pointer;
1058 char c = get_symbol_end ();
1059
1060 if (strcasecmp (start, "usp") != 0)
1061 {
1062 *input_line_pointer = c;
1063 input_line_pointer = hold;
1064 str = hold;
1065 goto error;
1066 }
1067 *input_line_pointer = c;
1068 goto keep_going;
1069 }
1070 else if (operand->flags & MN10300_OPERAND_SSP)
1071 {
1072 char *start = input_line_pointer;
1073 char c = get_symbol_end ();
1074
1075 if (strcasecmp (start, "ssp") != 0)
1076 {
1077 *input_line_pointer = c;
1078 input_line_pointer = hold;
1079 str = hold;
1080 goto error;
1081 }
1082 *input_line_pointer = c;
1083 goto keep_going;
1084 }
1085 else if (operand->flags & MN10300_OPERAND_MSP)
1086 {
1087 char *start = input_line_pointer;
1088 char c = get_symbol_end ();
1089
1090 if (strcasecmp (start, "msp") != 0)
1091 {
1092 *input_line_pointer = c;
1093 input_line_pointer = hold;
1094 str = hold;
1095 goto error;
1096 }
1097 *input_line_pointer = c;
1098 goto keep_going;
1099 }
1100 else if (operand->flags & MN10300_OPERAND_PC)
1101 {
1102 char *start = input_line_pointer;
1103 char c = get_symbol_end ();
1104
1105 if (strcasecmp (start, "pc") != 0)
1106 {
1107 *input_line_pointer = c;
1108 input_line_pointer = hold;
1109 str = hold;
1110 goto error;
1111 }
1112 *input_line_pointer = c;
1113 goto keep_going;
1114 }
1115 else if (operand->flags & MN10300_OPERAND_EPSW)
1116 {
1117 char *start = input_line_pointer;
1118 char c = get_symbol_end ();
1119
1120 if (strcasecmp (start, "epsw") != 0)
1121 {
1122 *input_line_pointer = c;
1123 input_line_pointer = hold;
1124 str = hold;
1125 goto error;
1126 }
1127 *input_line_pointer = c;
1128 goto keep_going;
1129 }
1130 else if (operand->flags & MN10300_OPERAND_PLUS)
1131 {
1132 if (*input_line_pointer != '+')
1133 {
1134 input_line_pointer = hold;
1135 str = hold;
1136 goto error;
1137 }
1138 input_line_pointer++;
1139 goto keep_going;
1140 }
252b5132
RH
1141 else if (operand->flags & MN10300_OPERAND_PSW)
1142 {
1143 char *start = input_line_pointer;
1144 char c = get_symbol_end ();
1145
1146 if (strcasecmp (start, "psw") != 0)
1147 {
1148 *input_line_pointer = c;
1149 input_line_pointer = hold;
1150 str = hold;
1151 goto error;
1152 }
1153 *input_line_pointer = c;
1154 goto keep_going;
1155 }
1156 else if (operand->flags & MN10300_OPERAND_MDR)
1157 {
1158 char *start = input_line_pointer;
1159 char c = get_symbol_end ();
1160
1161 if (strcasecmp (start, "mdr") != 0)
1162 {
1163 *input_line_pointer = c;
1164 input_line_pointer = hold;
1165 str = hold;
1166 goto error;
1167 }
1168 *input_line_pointer = c;
1169 goto keep_going;
1170 }
1171 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1172 {
1173 unsigned int value = 0;
1174 if (*input_line_pointer != '[')
1175 {
1176 input_line_pointer = hold;
1177 str = hold;
1178 goto error;
1179 }
1180
1181 /* Eat the '['. */
1182 input_line_pointer++;
87271fa6 1183
252b5132 1184 /* We used to reject a null register list here; however,
87271fa6
NC
1185 we accept it now so the compiler can emit "call"
1186 instructions for all calls to named functions.
252b5132
RH
1187
1188 The linker can then fill in the appropriate bits for the
1189 register list and stack size or change the instruction
1190 into a "calls" if using "call" is not profitable. */
1191 while (*input_line_pointer != ']')
1192 {
1193 char *start;
1194 char c;
1195
1196 if (*input_line_pointer == ',')
1197 input_line_pointer++;
1198
1199 start = input_line_pointer;
1200 c = get_symbol_end ();
1201
1202 if (strcasecmp (start, "d2") == 0)
1203 {
1204 value |= 0x80;
1205 *input_line_pointer = c;
1206 }
1207 else if (strcasecmp (start, "d3") == 0)
1208 {
1209 value |= 0x40;
1210 *input_line_pointer = c;
1211 }
1212 else if (strcasecmp (start, "a2") == 0)
1213 {
1214 value |= 0x20;
1215 *input_line_pointer = c;
1216 }
1217 else if (strcasecmp (start, "a3") == 0)
1218 {
1219 value |= 0x10;
1220 *input_line_pointer = c;
1221 }
1222 else if (strcasecmp (start, "other") == 0)
1223 {
1224 value |= 0x08;
1225 *input_line_pointer = c;
1226 }
0a727238 1227 else if (HAVE_AM33
85cb2cf9
JL
1228 && strcasecmp (start, "exreg0") == 0)
1229 {
1230 value |= 0x04;
1231 *input_line_pointer = c;
1232 }
0a727238 1233 else if (HAVE_AM33
85cb2cf9
JL
1234 && strcasecmp (start, "exreg1") == 0)
1235 {
1236 value |= 0x02;
1237 *input_line_pointer = c;
1238 }
0a727238 1239 else if (HAVE_AM33
85cb2cf9
JL
1240 && strcasecmp (start, "exother") == 0)
1241 {
1242 value |= 0x01;
1243 *input_line_pointer = c;
1244 }
0a727238 1245 else if (HAVE_AM33
85cb2cf9
JL
1246 && strcasecmp (start, "all") == 0)
1247 {
1248 value |= 0xff;
1249 *input_line_pointer = c;
1250 }
252b5132
RH
1251 else
1252 {
1253 input_line_pointer = hold;
1254 str = hold;
1255 goto error;
1256 }
1257 }
1258 input_line_pointer++;
1259 mn10300_insert_operand (&insn, &extension, operand,
1260 value, (char *) NULL, 0, 0);
1261 goto keep_going;
1262
1263 }
1264 else if (data_register_name (&ex))
1265 {
1266 input_line_pointer = hold;
1267 str = hold;
1268 goto error;
1269 }
1270 else if (address_register_name (&ex))
1271 {
1272 input_line_pointer = hold;
1273 str = hold;
1274 goto error;
1275 }
1276 else if (other_register_name (&ex))
1277 {
1278 input_line_pointer = hold;
1279 str = hold;
1280 goto error;
1281 }
0a727238 1282 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1283 {
1284 input_line_pointer = hold;
1285 str = hold;
1286 goto error;
1287 }
0a727238 1288 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1289 {
1290 input_line_pointer = hold;
1291 str = hold;
1292 goto error;
1293 }
252b5132
RH
1294 else if (*str == ')' || *str == '(')
1295 {
1296 input_line_pointer = hold;
1297 str = hold;
1298 goto error;
1299 }
1300 else
1301 {
1302 expression (&ex);
1303 }
1304
87271fa6 1305 switch (ex.X_op)
252b5132
RH
1306 {
1307 case O_illegal:
1308 errmsg = _("illegal operand");
1309 goto error;
1310 case O_absent:
1311 errmsg = _("missing operand");
1312 goto error;
1313 case O_register:
1314 {
1315 int mask;
1316
1317 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1318 if (HAVE_AM33)
1319 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
252b5132
RH
1320 if ((operand->flags & mask) == 0)
1321 {
1322 input_line_pointer = hold;
1323 str = hold;
1324 goto error;
1325 }
87271fa6 1326
252b5132
RH
1327 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1328 extra_shift = 8;
1329 else if (opcode->format == FMT_D2
1330 || opcode->format == FMT_D4
1331 || opcode->format == FMT_S2
1332 || opcode->format == FMT_S4
1333 || opcode->format == FMT_S6
1334 || opcode->format == FMT_D5)
1335 extra_shift = 16;
85cb2cf9
JL
1336 else if (opcode->format == FMT_D7)
1337 extra_shift = 8;
1338 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1339 extra_shift = 8;
252b5132
RH
1340 else
1341 extra_shift = 0;
87271fa6 1342
252b5132
RH
1343 mn10300_insert_operand (&insn, &extension, operand,
1344 ex.X_add_number, (char *) NULL,
1345 0, extra_shift);
1346
252b5132
RH
1347 /* And note the register number in the register array. */
1348 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1349 break;
1350 }
1351
1352 case O_constant:
1353 /* If this operand can be promoted, and it doesn't
1354 fit into the allocated bitfield for this insn,
1355 then promote it (ie this opcode does not match). */
1356 if (operand->flags
1357 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1358 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1359 {
1360 input_line_pointer = hold;
1361 str = hold;
1362 goto error;
1363 }
1364
1365 mn10300_insert_operand (&insn, &extension, operand,
1366 ex.X_add_number, (char *) NULL,
1367 0, 0);
1368 break;
1369
1370 default:
1371 /* If this operand can be promoted, then this opcode didn't
1372 match since we can't know if it needed promotion! */
1373 if (operand->flags & MN10300_OPERAND_PROMOTE)
1374 {
1375 input_line_pointer = hold;
1376 str = hold;
1377 goto error;
1378 }
1379
1380 /* We need to generate a fixup for this expression. */
1381 if (fc >= MAX_INSN_FIXUPS)
1382 as_fatal (_("too many fixups"));
1383 fixups[fc].exp = ex;
1384 fixups[fc].opindex = *opindex_ptr;
1385 fixups[fc].reloc = BFD_RELOC_UNUSED;
1386 ++fc;
1387 break;
1388 }
1389
1390keep_going:
1391 str = input_line_pointer;
1392 input_line_pointer = hold;
1393
1394 while (*str == ' ' || *str == ',')
1395 ++str;
1396
1397 }
1398
1399 /* Make sure we used all the operands! */
1400 if (*str != ',')
1401 match = 1;
1402
1403 /* If this instruction has registers that must not match, verify
1404 that they do indeed not match. */
1405 if (opcode->no_match_operands)
1406 {
1407 int i;
1408
1409 /* Look at each operand to see if it's marked. */
1410 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1411 {
1412 if ((1 << i) & opcode->no_match_operands)
1413 {
1414 int j;
1415
1416 /* operand I is marked. Check that it does not match any
1417 operands > I which are marked. */
1418 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1419 {
1420 if (((1 << j) & opcode->no_match_operands)
1421 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1422 {
1423 errmsg = _("Invalid register specification.");
1424 match = 0;
1425 goto error;
1426 }
1427 }
1428 }
1429 }
1430 }
1431
1432 error:
1433 if (match == 0)
87271fa6 1434 {
252b5132 1435 next_opcode = opcode + 1;
87271fa6 1436 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1437 {
1438 opcode = next_opcode;
1439 continue;
1440 }
87271fa6 1441
252b5132
RH
1442 as_bad ("%s", errmsg);
1443 return;
87271fa6 1444 }
252b5132
RH
1445 break;
1446 }
87271fa6 1447
3882b010 1448 while (ISSPACE (*str))
252b5132
RH
1449 ++str;
1450
1451 if (*str != '\0')
1452 as_bad (_("junk at end of line: `%s'"), str);
1453
1454 input_line_pointer = str;
1455
1456 /* Determine the size of the instruction. */
1457 if (opcode->format == FMT_S0)
1458 size = 1;
1459
1460 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1461 size = 2;
1462
1463 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1464 size = 3;
1465
85cb2cf9
JL
1466 if (opcode->format == FMT_D6)
1467 size = 3;
1468
1469 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1470 size = 4;
1471
1472 if (opcode->format == FMT_D8)
1473 size = 6;
1474
1475 if (opcode->format == FMT_D9)
1476 size = 7;
252b5132
RH
1477
1478 if (opcode->format == FMT_S4)
1479 size = 5;
1480
1481 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1482 size = 7;
1483
1484 if (opcode->format == FMT_D2)
1485 size = 4;
1486
1487 if (opcode->format == FMT_D4)
1488 size = 6;
1489
1490 if (relaxable && fc > 0)
1491 {
1492 int type;
1493
076dc439
AO
1494 /* We want to anchor the line info to the previous frag (if
1495 there isn't one, create it), so that, when the insn is
1496 resized, we still get the right address for the beginning of
1497 the region. */
1498 f = frag_more (0);
1499 dwarf2_emit_insn (0);
1500
87271fa6 1501 /* bCC */
252b5132
RH
1502 if (size == 2)
1503 {
1504 /* Handle bra specially. Basically treat it like jmp so
1505 that we automatically handle 8, 16 and 32 bit offsets
1506 correctly as well as jumps to an undefined address.
1507
1508 It is also important to not treat it like other bCC
1509 instructions since the long forms of bra is different
1510 from other bCC instructions. */
1511 if (opcode->opcode == 0xca00)
1512 type = 10;
1513 else
1514 type = 0;
1515 }
87271fa6 1516 /* call */
252b5132 1517 else if (size == 5)
87271fa6
NC
1518 type = 6;
1519 /* calls */
252b5132
RH
1520 else if (size == 4)
1521 type = 8;
87271fa6 1522 /* jmp */
252b5132
RH
1523 else if (size == 3 && opcode->opcode == 0xcc0000)
1524 type = 10;
87271fa6 1525 /* bCC (uncommon cases) */
252b5132
RH
1526 else
1527 type = 3;
1528
1529 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1530 fixups[0].exp.X_add_symbol,
1531 fixups[0].exp.X_add_number,
1532 (char *)fixups[0].opindex);
87271fa6 1533
252b5132
RH
1534 /* This is pretty hokey. We basically just care about the
1535 opcode, so we have to write out the first word big endian.
1536
1537 The exception is "call", which has two operands that we
1538 care about.
1539
1540 The first operand (the register list) happens to be in the
1541 first instruction word, and will be in the right place if
1542 we output the first word in big endian mode.
1543
1544 The second operand (stack size) is in the extension word,
1545 and we want it to appear as the first character in the extension
1546 word (as it appears in memory). Luckily, writing the extension
1547 word in big endian format will do what we want. */
1548 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1549 if (size > 8)
1550 {
1551 number_to_chars_bigendian (f + 4, extension, 4);
1552 number_to_chars_bigendian (f + 8, 0, size - 8);
1553 }
1554 else if (size > 4)
1555 number_to_chars_bigendian (f + 4, extension, size - 4);
1556 }
1557 else
1558 {
1559 /* Allocate space for the instruction. */
1560 f = frag_more (size);
1561
1562 /* Fill in bytes for the instruction. Note that opcode fields
1563 are written big-endian, 16 & 32bit immediates are written
1564 little endian. Egad. */
1565 if (opcode->format == FMT_S0
1566 || opcode->format == FMT_S1
1567 || opcode->format == FMT_D0
85cb2cf9
JL
1568 || opcode->format == FMT_D6
1569 || opcode->format == FMT_D7
1570 || opcode->format == FMT_D10
252b5132
RH
1571 || opcode->format == FMT_D1)
1572 {
1573 number_to_chars_bigendian (f, insn, size);
1574 }
1575 else if (opcode->format == FMT_S2
1576 && opcode->opcode != 0xdf0000
1577 && opcode->opcode != 0xde0000)
1578 {
1579 /* A format S2 instruction that is _not_ "ret" and "retf". */
1580 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1581 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1582 }
1583 else if (opcode->format == FMT_S2)
1584 {
1585 /* This must be a ret or retf, which is written entirely in
1586 big-endian format. */
1587 number_to_chars_bigendian (f, insn, 3);
1588 }
1589 else if (opcode->format == FMT_S4
1590 && opcode->opcode != 0xdc000000)
1591 {
1592 /* This must be a format S4 "call" instruction. What a pain. */
1593 unsigned long temp = (insn >> 8) & 0xffff;
1594 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1595 number_to_chars_littleendian (f + 1, temp, 2);
1596 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1597 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1598 }
1599 else if (opcode->format == FMT_S4)
1600 {
1601 /* This must be a format S4 "jmp" instruction. */
1602 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1603 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1604 number_to_chars_littleendian (f + 1, temp, 4);
1605 }
1606 else if (opcode->format == FMT_S6)
1607 {
1608 unsigned long temp = ((insn & 0xffffff) << 8)
1609 | ((extension >> 16) & 0xff);
1610 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1611 number_to_chars_littleendian (f + 1, temp, 4);
1612 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1613 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1614 }
1615 else if (opcode->format == FMT_D2
1616 && opcode->opcode != 0xfaf80000
1617 && opcode->opcode != 0xfaf00000
1618 && opcode->opcode != 0xfaf40000)
1619 {
1620 /* A format D2 instruction where the 16bit immediate is
1621 really a single 16bit value, not two 8bit values. */
1622 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1623 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1624 }
1625 else if (opcode->format == FMT_D2)
1626 {
1627 /* A format D2 instruction where the 16bit immediate
1628 is really two 8bit immediates. */
1629 number_to_chars_bigendian (f, insn, 4);
1630 }
1631 else if (opcode->format == FMT_D4)
1632 {
1633 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 1634
252b5132
RH
1635 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1636 number_to_chars_littleendian (f + 2, temp, 4);
1637 }
1638 else if (opcode->format == FMT_D5)
1639 {
87271fa6
NC
1640 unsigned long temp = (((insn & 0xffff) << 16)
1641 | ((extension >> 8) & 0xffff));
1642
252b5132
RH
1643 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1644 number_to_chars_littleendian (f + 2, temp, 4);
1645 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1646 }
85cb2cf9
JL
1647 else if (opcode->format == FMT_D8)
1648 {
87271fa6
NC
1649 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1650
1651 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1652 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1653 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
1654 }
1655 else if (opcode->format == FMT_D9)
1656 {
87271fa6
NC
1657 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1658
1659 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1660 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 1661 }
252b5132
RH
1662
1663 /* Create any fixups. */
1664 for (i = 0; i < fc; i++)
1665 {
1666 const struct mn10300_operand *operand;
1667
1668 operand = &mn10300_operands[fixups[i].opindex];
1669 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1670 {
1671 reloc_howto_type *reloc_howto;
1672 int size;
1673 int offset;
1674 fixS *fixP;
1675
87271fa6
NC
1676 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1677 fixups[i].reloc);
252b5132
RH
1678
1679 if (!reloc_howto)
87271fa6
NC
1680 abort ();
1681
252b5132
RH
1682 size = bfd_get_reloc_size (reloc_howto);
1683
1684 if (size < 1 || size > 4)
87271fa6 1685 abort ();
252b5132
RH
1686
1687 offset = 4 - size;
1688 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1689 size, &fixups[i].exp,
1690 reloc_howto->pc_relative,
1691 fixups[i].reloc);
1692 }
1693 else
1694 {
1695 int reloc, pcrel, reloc_size, offset;
1696 fixS *fixP;
1697
1698 reloc = BFD_RELOC_NONE;
1699 /* How big is the reloc? Remember SPLIT relocs are
1700 implicitly 32bits. */
1701 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1702 reloc_size = 32;
85cb2cf9
JL
1703 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1704 reloc_size = 24;
252b5132
RH
1705 else
1706 reloc_size = operand->bits;
1707
1708 /* Is the reloc pc-relative? */
1709 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1710
a7c92dae 1711 offset = size - (reloc_size + operand->shift) / 8;
eb0dfd58 1712
252b5132
RH
1713 /* Choose a proper BFD relocation type. */
1714 if (pcrel)
1715 {
1716 if (reloc_size == 32)
1717 reloc = BFD_RELOC_32_PCREL;
1718 else if (reloc_size == 16)
1719 reloc = BFD_RELOC_16_PCREL;
1720 else if (reloc_size == 8)
1721 reloc = BFD_RELOC_8_PCREL;
1722 else
1723 abort ();
1724 }
1725 else
1726 {
1727 if (reloc_size == 32)
1728 reloc = BFD_RELOC_32;
1729 else if (reloc_size == 16)
1730 reloc = BFD_RELOC_16;
1731 else if (reloc_size == 8)
1732 reloc = BFD_RELOC_8;
1733 else
1734 abort ();
1735 }
1736
1737 /* Convert the size of the reloc into what fix_new_exp wants. */
1738 reloc_size = reloc_size / 8;
1739 if (reloc_size == 8)
1740 reloc_size = 0;
1741 else if (reloc_size == 16)
1742 reloc_size = 1;
1743 else if (reloc_size == 32)
1744 reloc_size = 2;
1745
1746 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1747 reloc_size, &fixups[i].exp, pcrel,
1748 ((bfd_reloc_code_real_type) reloc));
1749
1750 if (pcrel)
1751 fixP->fx_offset += offset;
1752 }
1753 }
e8b1cae5 1754
076dc439
AO
1755 dwarf2_emit_insn (size);
1756 }
252b5132
RH
1757}
1758
87271fa6
NC
1759/* If while processing a fixup, a reloc really needs to be created
1760 then it is done here. */
252b5132 1761
252b5132
RH
1762arelent *
1763tc_gen_reloc (seg, fixp)
b4c1ea07 1764 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
1765 fixS *fixp;
1766{
1767 arelent *reloc;
1768 reloc = (arelent *) xmalloc (sizeof (arelent));
1769
1770 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1771 if (reloc->howto == (reloc_howto_type *) NULL)
1772 {
1773 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
1774 _("reloc %d not supported by object file format"),
1775 (int) fixp->fx_r_type);
252b5132
RH
1776 return NULL;
1777 }
1778 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1779
1780 if (fixp->fx_addsy && fixp->fx_subsy)
1781 {
7dc8f5ce
AO
1782 reloc->sym_ptr_ptr = NULL;
1783
4e75439a
AO
1784 /* If we got a difference between two symbols, and the
1785 subtracted symbol is in the current section, use a
1786 PC-relative relocation. If both symbols are in the same
1787 section, the difference would have already been simplified
1788 to a constant. */
1789 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
1790 {
1791 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1792 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1793 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
1794 + fixp->fx_offset);
1795
1796 switch (fixp->fx_r_type)
1797 {
1798 case BFD_RELOC_8:
1799 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1800 BFD_RELOC_8_PCREL);
1801 return reloc;
1802
1803 case BFD_RELOC_16:
1804 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1805 BFD_RELOC_16_PCREL);
1806 return reloc;
1807
1808 case BFD_RELOC_24:
1809 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1810 BFD_RELOC_24_PCREL);
1811 return reloc;
1812
1813 case BFD_RELOC_32:
1814 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1815 BFD_RELOC_32_PCREL);
1816 return reloc;
1817
1818 default:
1819 /* Try to compute the absolute value below. */
1820 break;
1821 }
1822 }
87271fa6 1823
252b5132
RH
1824 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1825 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1826 {
1827 as_bad_where (fixp->fx_file, fixp->fx_line,
1828 "Difference of symbols in different sections is not supported");
252b5132 1829 }
6e22e505
AO
1830 else
1831 {
1832 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
1833
1834 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1835 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1836
1837 switch (fixp->fx_r_type)
1838 {
1839 case BFD_RELOC_8:
1840 md_number_to_chars (fixpos, reloc->addend, 1);
1841 break;
1842
1843 case BFD_RELOC_16:
1844 md_number_to_chars (fixpos, reloc->addend, 2);
1845 break;
252b5132 1846
6e22e505
AO
1847 case BFD_RELOC_24:
1848 md_number_to_chars (fixpos, reloc->addend, 3);
1849 break;
1850
1851 case BFD_RELOC_32:
1852 md_number_to_chars (fixpos, reloc->addend, 4);
1853 break;
1854
1855 default:
1856 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
1857 return reloc;
1858 }
1859 }
1860
7dc8f5ce
AO
1861 if (reloc->sym_ptr_ptr)
1862 free (reloc->sym_ptr_ptr);
6e22e505
AO
1863 free (reloc);
1864 return NULL;
252b5132 1865 }
87271fa6 1866 else
252b5132 1867 {
87271fa6 1868 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 1869 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
1870 reloc->addend = fixp->fx_offset;
1871 }
1872 return reloc;
1873}
1874
1875int
1876md_estimate_size_before_relax (fragp, seg)
1877 fragS *fragp;
1878 asection *seg;
1879{
93c2a809
AM
1880 if (fragp->fr_subtype == 6
1881 && (!S_IS_DEFINED (fragp->fr_symbol)
1882 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1883 fragp->fr_subtype = 7;
1884 else if (fragp->fr_subtype == 8
1885 && (!S_IS_DEFINED (fragp->fr_symbol)
1886 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1887 fragp->fr_subtype = 9;
1888 else if (fragp->fr_subtype == 10
1889 && (!S_IS_DEFINED (fragp->fr_symbol)
1890 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1891 fragp->fr_subtype = 12;
1892
1893 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
1894 abort ();
1895
1896 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 1897}
252b5132
RH
1898
1899long
1900md_pcrel_from (fixp)
1901 fixS *fixp;
1902{
87271fa6 1903 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
1904 {
1905 /* The symbol is undefined. Let the linker figure it out. */
1906 return 0;
1907 }
1908 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
1909}
1910
1911int
1912md_apply_fix3 (fixp, valuep, seg)
1913 fixS *fixp;
c51ce5f0 1914 valueT *valuep;
252b5132
RH
1915 segT seg;
1916{
58a77e41
EC
1917 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
1918 int size = 0;
c51ce5f0 1919 int value;
58a77e41
EC
1920
1921 assert (fixp->fx_r_type < BFD_RELOC_UNUSED);
1922
1923 /* This should never happen. */
1924 if (seg->flags & SEC_ALLOC)
1925 abort ();
1926
c51ce5f0
EC
1927 /* The value we are passed in *valuep includes the symbol values.
1928 Since we are using BFD_ASSEMBLER, if we are doing this relocation
1929 the code in write.c is going to call bfd_install_relocation, which
1930 is also going to use the symbol value. That means that if the
1931 reloc is fully resolved we want to use *valuep since
1932 bfd_install_relocation is not being used.
1933
1934 However, if the reloc is not fully resolved we do not want to use
1935 *valuep, and must use fx_offset instead. However, if the reloc
1936 is PC relative, we do want to use *valuep since it includes the
1937 result of md_pcrel_from. */
1938 if (fixp->fx_addsy == (symbolS *) NULL || fixp->fx_pcrel)
1939 value = *valuep;
1940 else
1941 value = fixp->fx_offset;
1942
58a77e41
EC
1943 /* If the fix is relative to a symbol which is not defined, or not
1944 in the same segment as the fix, we cannot resolve it here. */
1945 if (fixp->fx_addsy != NULL
1946 && (! S_IS_DEFINED (fixp->fx_addsy)
1947 || (S_GET_SEGMENT (fixp->fx_addsy) != seg)))
1948 {
1949 fixp->fx_done = 0;
1950 return 0;
1951 }
1952
1953 switch (fixp->fx_r_type)
1954 {
1955 case BFD_RELOC_8:
96f37af6 1956 case BFD_RELOC_8_PCREL:
58a77e41
EC
1957 size = 1;
1958 break;
1959
1960 case BFD_RELOC_16:
96f37af6 1961 case BFD_RELOC_16_PCREL:
58a77e41
EC
1962 size = 2;
1963 break;
1964
1965 case BFD_RELOC_32:
96f37af6 1966 case BFD_RELOC_32_PCREL:
58a77e41
EC
1967 size = 4;
1968 break;
1969
1970 case BFD_RELOC_VTABLE_INHERIT:
1971 case BFD_RELOC_VTABLE_ENTRY:
1972 fixp->fx_done = 0;
1973 return 1;
1974
1975 case BFD_RELOC_NONE:
1976 default:
1977 as_bad_where (fixp->fx_file, fixp->fx_line,
1978 _("Bad relocation fixup type (%d)"), fixp->fx_r_type);
1979 }
1980
c51ce5f0 1981 md_number_to_chars (fixpos, value, size);
58a77e41 1982
b653e7f9
NC
1983 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
1984 if (fixp->fx_addsy == NULL)
1985 fixp->fx_done = 1;
58a77e41 1986
b653e7f9 1987 return 0;
58a77e41
EC
1988}
1989
1990/* Return nonzero if the fixup in FIXP will require a relocation,
1991 even it if appears that the fixup could be completely handled
1992 within GAS. */
1993
1994int
1995mn10300_force_relocation (fixp)
1996 struct fix *fixp;
1997{
1998 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1999 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2000 return 1;
2001
7e8f4100
AO
2002 /* Do not adjust relocations involving symbols in code sections,
2003 because it breaks linker relaxations. This could be fixed in the
2004 linker, but this fix is simpler, and it pretty much only affects
2005 object size a little bit. */
2006 if ((S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2007 && fixp->fx_subsy
2008 && S_GET_SEGMENT (fixp->fx_addsy) == S_GET_SEGMENT (fixp->fx_subsy))
2009 return 1;
2010
58a77e41
EC
2011 return 0;
2012}
2013
2014/* Return zero if the fixup in fixp should be left alone and not
2015 adjusted. */
2016
2017boolean
2018mn10300_fix_adjustable (fixp)
2019 struct fix *fixp;
2020{
2021 /* Prevent all adjustments to global symbols. */
2022 if (S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
2023 return 0;
2024
2025 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2026 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2027 return 0;
2028
7e8f4100
AO
2029 /* Do not adjust relocations involving symbols in code sections,
2030 because it breaks linker relaxations. This could be fixed in the
2031 linker, but this fix is simpler, and it pretty much only affects
2032 object size a little bit. */
2033 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2034 return 0;
2035
58a77e41 2036 return 1;
252b5132
RH
2037}
2038
2039/* Insert an operand value into an instruction. */
2040
2041static void
2042mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2043 unsigned long *insnp;
2044 unsigned long *extensionp;
2045 const struct mn10300_operand *operand;
2046 offsetT val;
2047 char *file;
2048 unsigned int line;
2049 unsigned int shift;
2050{
2051 /* No need to check 32bit operands for a bit. Note that
2052 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2053 if (operand->bits != 32
2054 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2055 {
2056 long min, max;
2057 offsetT test;
2058 int bits;
2059
2060 bits = operand->bits;
85cb2cf9
JL
2061 if (operand->flags & MN10300_OPERAND_24BIT)
2062 bits = 24;
252b5132
RH
2063
2064 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2065 {
2066 max = (1 << (bits - 1)) - 1;
2067 min = - (1 << (bits - 1));
2068 }
2069 else
87271fa6
NC
2070 {
2071 max = (1 << bits) - 1;
2072 min = 0;
2073 }
252b5132
RH
2074
2075 test = val;
2076
252b5132 2077 if (test < (offsetT) min || test > (offsetT) max)
87271fa6
NC
2078 {
2079 const char *err =
2080 _("operand out of range (%s not between %ld and %ld)");
2081 char buf[100];
2082
2083 sprint_value (buf, test);
2084 if (file == (char *) NULL)
2085 as_warn (err, buf, min, max);
2086 else
2087 as_warn_where (file, line, err, buf, min, max);
2088 }
252b5132
RH
2089 }
2090
2091 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2092 {
2093 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2094 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2095 << operand->shift);
2096 }
85cb2cf9
JL
2097 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2098 {
2099 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2100 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2101 << operand->shift);
2102 }
252b5132
RH
2103 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2104 {
2105 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2106 << (operand->shift + shift));
2107
2108 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2109 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2110 << (operand->shift + shift + operand->bits));
2111 }
2112 else
2113 {
2114 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2115 << (operand->shift + shift));
2116
2117 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2118 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2119 << (operand->shift + shift + operand->bits));
2120 }
2121}
2122
2123static unsigned long
2124check_operand (insn, operand, val)
b4c1ea07 2125 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2126 const struct mn10300_operand *operand;
2127 offsetT val;
2128{
2129 /* No need to check 32bit operands for a bit. Note that
2130 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2131 if (operand->bits != 32
2132 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2133 {
2134 long min, max;
2135 offsetT test;
2136 int bits;
2137
2138 bits = operand->bits;
85cb2cf9
JL
2139 if (operand->flags & MN10300_OPERAND_24BIT)
2140 bits = 24;
252b5132
RH
2141
2142 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2143 {
2144 max = (1 << (bits - 1)) - 1;
2145 min = - (1 << (bits - 1));
2146 }
2147 else
87271fa6
NC
2148 {
2149 max = (1 << bits) - 1;
2150 min = 0;
2151 }
252b5132
RH
2152
2153 test = val;
2154
252b5132
RH
2155 if (test < (offsetT) min || test > (offsetT) max)
2156 return 0;
2157 else
2158 return 1;
2159 }
2160 return 1;
2161}
2162
2163static void
2164set_arch_mach (mach)
0e1a166b 2165 unsigned int mach;
252b5132
RH
2166{
2167 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2168 as_warn (_("could not set architecture and machine"));
2169
2170 current_machine = mach;
2171}
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