MIPS/GAS: Don't convert RELA JALR relocations on R6
[deliverable/binutils-gdb.git] / gas / config / tc-ns32k.c
CommitLineData
252b5132 1/* ns32k.c -- Assemble on the National Semiconductor 32k series
6f2750fe 2 Copyright (C) 1987-2016 Free Software Foundation, Inc.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
252b5132 20
c6a7ab1f 21/*#define SHOW_NUM 1*//* Uncomment for debugging. */
252b5132 22
252b5132
RH
23#include "as.h"
24#include "opcode/ns32k.h"
25
26#include "obstack.h"
27
c6a7ab1f
NC
28/* Macros. */
29#define IIF_ENTRIES 13 /* Number of entries in iif. */
30#define PRIVATE_SIZE 256 /* Size of my garbage memory. */
252b5132
RH
31#define MAX_ARGS 4
32#define DEFAULT -1 /* addr_mode returns this value when
33 plain constant or label is
c6a7ab1f 34 encountered. */
252b5132
RH
35
36#define IIF(ptr,a1,c1,e1,g1,i1,k1,m1,o1,q1,s1,u1) \
ea1562b3
NC
37 iif.iifP[ptr].type = a1; \
38 iif.iifP[ptr].size = c1; \
39 iif.iifP[ptr].object = e1; \
40 iif.iifP[ptr].object_adjust = g1; \
41 iif.iifP[ptr].pcrel = i1; \
42 iif.iifP[ptr].pcrel_adjust = k1; \
43 iif.iifP[ptr].im_disp = m1; \
44 iif.iifP[ptr].relax_substate = o1; \
45 iif.iifP[ptr].bit_fixP = q1; \
46 iif.iifP[ptr].addr_mode = s1; \
47 iif.iifP[ptr].bsr = u1;
252b5132
RH
48
49#ifdef SEQUENT_COMPATABILITY
50#define LINE_COMMENT_CHARS "|"
51#define ABSOLUTE_PREFIX '@'
52#define IMMEDIATE_PREFIX '#'
53#endif
54
55#ifndef LINE_COMMENT_CHARS
56#define LINE_COMMENT_CHARS "#"
57#endif
58
59const char comment_chars[] = "#";
60const char line_comment_chars[] = LINE_COMMENT_CHARS;
63a0b638 61const char line_separator_chars[] = ";";
4eb6b71c 62static int default_disp_size = 4; /* Displacement size for external refs. */
c6a7ab1f 63
252b5132 64#if !defined(ABSOLUTE_PREFIX) && !defined(IMMEDIATE_PREFIX)
4eb6b71c 65#define ABSOLUTE_PREFIX '@' /* One or the other MUST be defined. */
252b5132
RH
66#endif
67
68struct addr_mode
ea1562b3
NC
69{
70 signed char mode; /* Addressing mode of operand (0-31). */
71 signed char scaled_mode; /* Mode combined with scaled mode. */
72 char scaled_reg; /* Register used in scaled+1 (1-8). */
73 char float_flag; /* Set if R0..R7 was F0..F7 ie a
4eb6b71c 74 floating-point-register. */
ea1562b3 75 char am_size; /* Estimated max size of general addr-mode
4eb6b71c 76 parts. */
ea1562b3
NC
77 char im_disp; /* If im_disp==1 we have a displacement. */
78 char pcrel; /* 1 if pcrel, this is really redundant info. */
79 char disp_suffix[2]; /* Length of displacement(s), 0=undefined. */
80 char *disp[2]; /* Pointer(s) at displacement(s)
4eb6b71c 81 or immediates(s) (ascii). */
ea1562b3
NC
82 char index_byte; /* Index byte. */
83};
252b5132
RH
84typedef struct addr_mode addr_modeS;
85
c6a7ab1f 86char *freeptr, *freeptr_static; /* Points at some number of free bytes. */
252b5132
RH
87struct hash_control *inst_hash_handle;
88
c6a7ab1f 89struct ns32k_opcode *desc; /* Pointer at description of instruction. */
252b5132
RH
90addr_modeS addr_modeP;
91const char EXP_CHARS[] = "eE";
c6a7ab1f
NC
92const char FLT_CHARS[] = "fd"; /* We don't want to support lowercase,
93 do we? */
252b5132
RH
94
95/* UPPERCASE denotes live names when an instruction is built, IIF is
4eb6b71c
NC
96 used as an intermediate form to store the actual parts of the
97 instruction. A ns32k machine instruction can be divided into a
98 couple of sub PARTs. When an instruction is assembled the
99 appropriate PART get an assignment. When an IIF has been completed
100 it is converted to a FRAGment as specified in AS.H. */
252b5132 101
c6a7ab1f 102/* Internal structs. */
252b5132 103struct ns32k_option
c6a7ab1f 104{
e0471c16 105 const char *pattern;
c6a7ab1f
NC
106 unsigned long or;
107 unsigned long and;
108};
252b5132
RH
109
110typedef struct
ea1562b3
NC
111{
112 int type; /* How to interpret object. */
113 int size; /* Estimated max size of object. */
114 unsigned long object; /* Binary data. */
115 int object_adjust; /* Number added to object. */
116 int pcrel; /* True if object is pcrel. */
117 int pcrel_adjust; /* Length in bytes from the instruction
4eb6b71c 118 start to the displacement. */
ea1562b3
NC
119 int im_disp; /* True if the object is a displacement. */
120 relax_substateT relax_substate;/*Initial relaxsubstate. */
121 bit_fixS *bit_fixP; /* Pointer at bit_fix struct. */
122 int addr_mode; /* What addrmode do we associate with this
4eb6b71c 123 iif-entry. */
ea1562b3
NC
124 char bsr; /* Sequent hack. */
125} iif_entryT; /* Internal Instruction Format. */
252b5132
RH
126
127struct int_ins_form
ea1562b3
NC
128{
129 int instr_size; /* Max size of instruction in bytes. */
130 iif_entryT iifP[IIF_ENTRIES + 1];
131};
c6a7ab1f 132
252b5132
RH
133struct int_ins_form iif;
134expressionS exprP;
c6a7ab1f
NC
135
136/* Description of the PARTs in IIF
137 object[n]:
138 0 total length in bytes of entries in iif
139 1 opcode
140 2 index_byte_a
141 3 index_byte_b
142 4 disp_a_1
143 5 disp_a_2
144 6 disp_b_1
145 7 disp_b_2
146 8 imm_a
147 9 imm_b
148 10 implied1
149 11 implied2
0b7410c4 150
c6a7ab1f
NC
151 For every entry there is a datalength in bytes. This is stored in size[n].
152 0, the objectlength is not explicitly given by the instruction
153 and the operand is undefined. This is a case for relaxation.
154 Reserve 4 bytes for the final object.
0b7410c4 155
c6a7ab1f
NC
156 1, the entry contains one byte
157 2, the entry contains two bytes
158 3, the entry contains three bytes
159 4, the entry contains four bytes
160 etc
0b7410c4 161
c6a7ab1f 162 Furthermore, every entry has a data type identifier in type[n].
0b7410c4 163
c6a7ab1f
NC
164 0, the entry is void, ignore it.
165 1, the entry is a binary number.
166 2, the entry is a pointer at an expression.
167 Where expression may be as simple as a single '1',
168 and as complicated as foo-bar+12,
169 foo and bar may be undefined but suffixed by :{b|w|d} to
170 control the length of the object.
0b7410c4 171
c6a7ab1f 172 3, the entry is a pointer at a bignum struct
0b7410c4 173
67c1ffbe 174 The low-order-byte corresponds to low physical memory.
c6a7ab1f
NC
175 Obviously a FRAGment must be created for each valid disp in PART whose
176 datalength is undefined (to bad) .
177 The case where just the expression is undefined is less severe and is
178 handled by fix. Here the number of bytes in the objectfile is known.
179 With this representation we simplify the assembly and separates the
180 machine dependent/independent parts in a more clean way (said OE). */
252b5132 181\f
4eb6b71c 182struct ns32k_option opt1[] = /* restore, exit. */
252b5132
RH
183{
184 {"r0", 0x80, 0xff},
185 {"r1", 0x40, 0xff},
186 {"r2", 0x20, 0xff},
187 {"r3", 0x10, 0xff},
188 {"r4", 0x08, 0xff},
189 {"r5", 0x04, 0xff},
190 {"r6", 0x02, 0xff},
191 {"r7", 0x01, 0xff},
192 {0, 0x00, 0xff}
193};
4eb6b71c 194struct ns32k_option opt2[] = /* save, enter. */
252b5132
RH
195{
196 {"r0", 0x01, 0xff},
197 {"r1", 0x02, 0xff},
198 {"r2", 0x04, 0xff},
199 {"r3", 0x08, 0xff},
200 {"r4", 0x10, 0xff},
201 {"r5", 0x20, 0xff},
202 {"r6", 0x40, 0xff},
203 {"r7", 0x80, 0xff},
204 {0, 0x00, 0xff}
205};
4eb6b71c 206struct ns32k_option opt3[] = /* setcfg. */
252b5132
RH
207{
208 {"c", 0x8, 0xff},
209 {"m", 0x4, 0xff},
210 {"f", 0x2, 0xff},
211 {"i", 0x1, 0xff},
212 {0, 0x0, 0xff}
213};
4eb6b71c 214struct ns32k_option opt4[] = /* cinv. */
252b5132
RH
215{
216 {"a", 0x4, 0xff},
217 {"i", 0x2, 0xff},
218 {"d", 0x1, 0xff},
219 {0, 0x0, 0xff}
220};
4eb6b71c 221struct ns32k_option opt5[] = /* String inst. */
252b5132
RH
222{
223 {"b", 0x2, 0xff},
224 {"u", 0xc, 0xff},
225 {"w", 0x4, 0xff},
226 {0, 0x0, 0xff}
227};
4eb6b71c 228struct ns32k_option opt6[] = /* Plain reg ext,cvtp etc. */
252b5132
RH
229{
230 {"r0", 0x00, 0xff},
231 {"r1", 0x01, 0xff},
232 {"r2", 0x02, 0xff},
233 {"r3", 0x03, 0xff},
234 {"r4", 0x04, 0xff},
235 {"r5", 0x05, 0xff},
236 {"r6", 0x06, 0xff},
237 {"r7", 0x07, 0xff},
238 {0, 0x00, 0xff}
239};
240
241#if !defined(NS32032) && !defined(NS32532)
242#define NS32532
243#endif
244
4eb6b71c 245struct ns32k_option cpureg_532[] = /* lpr spr. */
252b5132
RH
246{
247 {"us", 0x0, 0xff},
248 {"dcr", 0x1, 0xff},
249 {"bpc", 0x2, 0xff},
250 {"dsr", 0x3, 0xff},
251 {"car", 0x4, 0xff},
252 {"fp", 0x8, 0xff},
253 {"sp", 0x9, 0xff},
254 {"sb", 0xa, 0xff},
255 {"usp", 0xb, 0xff},
256 {"cfg", 0xc, 0xff},
257 {"psr", 0xd, 0xff},
258 {"intbase", 0xe, 0xff},
259 {"mod", 0xf, 0xff},
260 {0, 0x00, 0xff}
261};
4eb6b71c 262struct ns32k_option mmureg_532[] = /* lmr smr. */
252b5132
RH
263{
264 {"mcr", 0x9, 0xff},
265 {"msr", 0xa, 0xff},
266 {"tear", 0xb, 0xff},
267 {"ptb0", 0xc, 0xff},
268 {"ptb1", 0xd, 0xff},
269 {"ivar0", 0xe, 0xff},
270 {"ivar1", 0xf, 0xff},
271 {0, 0x0, 0xff}
272};
273
4eb6b71c 274struct ns32k_option cpureg_032[] = /* lpr spr. */
252b5132
RH
275{
276 {"upsr", 0x0, 0xff},
277 {"fp", 0x8, 0xff},
278 {"sp", 0x9, 0xff},
279 {"sb", 0xa, 0xff},
280 {"psr", 0xd, 0xff},
281 {"intbase", 0xe, 0xff},
282 {"mod", 0xf, 0xff},
283 {0, 0x0, 0xff}
284};
4eb6b71c 285struct ns32k_option mmureg_032[] = /* lmr smr. */
252b5132
RH
286{
287 {"bpr0", 0x0, 0xff},
288 {"bpr1", 0x1, 0xff},
289 {"pf0", 0x4, 0xff},
290 {"pf1", 0x5, 0xff},
291 {"sc", 0x8, 0xff},
292 {"msr", 0xa, 0xff},
293 {"bcnt", 0xb, 0xff},
294 {"ptb0", 0xc, 0xff},
295 {"ptb1", 0xd, 0xff},
296 {"eia", 0xf, 0xff},
297 {0, 0x0, 0xff}
298};
299
300#if defined(NS32532)
301struct ns32k_option *cpureg = cpureg_532;
302struct ns32k_option *mmureg = mmureg_532;
303#else
304struct ns32k_option *cpureg = cpureg_032;
305struct ns32k_option *mmureg = mmureg_032;
306#endif
307\f
308
309const pseudo_typeS md_pseudo_table[] =
c6a7ab1f 310{ /* So far empty. */
252b5132
RH
311 {0, 0, 0}
312};
313
314#define IND(x,y) (((x)<<2)+(y))
315
c6a7ab1f 316/* Those are index's to relax groups in md_relax_table ie it must be
252b5132 317 multiplied by 4 to point at a group start. Viz IND(x,y) Se function
c6a7ab1f 318 relax_segment in write.c for more info. */
252b5132
RH
319
320#define BRANCH 1
321#define PCREL 2
322
c6a7ab1f 323/* Those are index's to entries in a relax group. */
252b5132
RH
324
325#define BYTE 0
326#define WORD 1
327#define DOUBLE 2
328#define UNDEF 3
329/* Those limits are calculated from the displacement start in memory.
67c1ffbe 330 The ns32k uses the beginning of the instruction as displacement
252b5132
RH
331 base. This type of displacements could be handled here by moving
332 the limit window up or down. I choose to use an internal
333 displacement base-adjust as there are other routines that must
334 consider this. Also, as we have two various offset-adjusts in the
335 ns32k (acb versus br/brs/jsr/bcond), two set of limits would have
c6a7ab1f 336 had to be used. Now we dont have to think about that. */
252b5132
RH
337
338const relax_typeS md_relax_table[] =
339{
340 {1, 1, 0, 0},
341 {1, 1, 0, 0},
342 {1, 1, 0, 0},
343 {1, 1, 0, 0},
344
345 {(63), (-64), 1, IND (BRANCH, WORD)},
346 {(8192), (-8192), 2, IND (BRANCH, DOUBLE)},
347 {0, 0, 4, 0},
348 {1, 1, 0, 0}
349};
350
351/* Array used to test if mode contains displacements.
c6a7ab1f 352 Value is true if mode contains displacement. */
252b5132
RH
353
354char disp_test[] =
355{0, 0, 0, 0, 0, 0, 0, 0,
356 1, 1, 1, 1, 1, 1, 1, 1,
357 1, 1, 1, 0, 0, 1, 1, 0,
358 1, 1, 1, 1, 1, 1, 1, 1};
359
c6a7ab1f 360/* Array used to calculate max size of displacements. */
252b5132
RH
361
362char disp_size[] =
363{4, 1, 2, 0, 4};
364\f
c6a7ab1f
NC
365/* Parse a general operand into an addressingmode struct
366
367 In: pointer at operand in ascii form
368 pointer at addr_mode struct for result
369 the level of recursion. (always 0 or 1)
252b5132 370
c6a7ab1f 371 Out: data in addr_mode struct. */
252b5132 372
4eb6b71c 373static int
ea1562b3 374addr_mode (char *operand,
91d6fa6a 375 addr_modeS *addrmodeP,
ea1562b3 376 int recursive_level)
252b5132 377{
4eb6b71c
NC
378 char *str;
379 int i;
380 int strl;
381 int mode;
252b5132 382 int j;
0b7410c4 383
4eb6b71c 384 mode = DEFAULT; /* Default. */
91d6fa6a
NC
385 addrmodeP->scaled_mode = 0; /* Why not. */
386 addrmodeP->scaled_reg = 0; /* If 0, not scaled index. */
387 addrmodeP->float_flag = 0;
388 addrmodeP->am_size = 0;
389 addrmodeP->im_disp = 0;
390 addrmodeP->pcrel = 0; /* Not set in this function. */
391 addrmodeP->disp_suffix[0] = 0;
392 addrmodeP->disp_suffix[1] = 0;
393 addrmodeP->disp[0] = NULL;
394 addrmodeP->disp[1] = NULL;
252b5132 395 str = operand;
0b7410c4 396
252b5132 397 if (str[0] == 0)
c6a7ab1f
NC
398 return 0;
399
252b5132 400 strl = strlen (str);
0b7410c4 401
252b5132
RH
402 switch (str[0])
403 {
c6a7ab1f
NC
404 /* The following three case statements controls the mode-chars
405 this is the place to ed if you want to change them. */
252b5132
RH
406#ifdef ABSOLUTE_PREFIX
407 case ABSOLUTE_PREFIX:
408 if (str[strl - 1] == ']')
409 break;
91d6fa6a
NC
410 addrmodeP->mode = 21; /* absolute */
411 addrmodeP->disp[0] = str + 1;
c6a7ab1f 412 return -1;
252b5132
RH
413#endif
414#ifdef IMMEDIATE_PREFIX
415 case IMMEDIATE_PREFIX:
416 if (str[strl - 1] == ']')
417 break;
91d6fa6a
NC
418 addrmodeP->mode = 20; /* immediate */
419 addrmodeP->disp[0] = str + 1;
c6a7ab1f 420 return -1;
252b5132
RH
421#endif
422 case '.':
423 if (str[strl - 1] != ']')
424 {
425 switch (str[1])
426 {
427 case '-':
428 case '+':
429 if (str[2] != '\000')
430 {
91d6fa6a
NC
431 addrmodeP->mode = 27; /* pc-relative */
432 addrmodeP->disp[0] = str + 2;
c6a7ab1f 433 return -1;
252b5132
RH
434 }
435 default:
4eb6b71c 436 as_bad (_("Invalid syntax in PC-relative addressing mode"));
c6a7ab1f 437 return 0;
252b5132
RH
438 }
439 }
440 break;
441 case 'e':
442 if (str[strl - 1] != ']')
443 {
444 if ((!strncmp (str, "ext(", 4)) && strl > 7)
445 { /* external */
91d6fa6a 446 addrmodeP->disp[0] = str + 4;
252b5132
RH
447 i = 0;
448 j = 2;
449 do
4eb6b71c 450 { /* disp[0]'s termination point. */
252b5132
RH
451 j += 1;
452 if (str[j] == '(')
453 i++;
454 if (str[j] == ')')
455 i--;
456 }
457 while (j < strl && i != 0);
458 if (i != 0 || !(str[j + 1] == '-' || str[j + 1] == '+'))
459 {
4eb6b71c 460 as_bad (_("Invalid syntax in External addressing mode"));
252b5132
RH
461 return (0);
462 }
463 str[j] = '\000'; /* null terminate disp[0] */
91d6fa6a
NC
464 addrmodeP->disp[1] = str + j + 2;
465 addrmodeP->mode = 22;
c6a7ab1f 466 return -1;
252b5132
RH
467 }
468 }
469 break;
0b7410c4 470
c6a7ab1f
NC
471 default:
472 ;
252b5132 473 }
0b7410c4 474
252b5132 475 strl = strlen (str);
0b7410c4 476
252b5132
RH
477 switch (strl)
478 {
479 case 2:
480 switch (str[0])
481 {
482 case 'f':
91d6fa6a 483 addrmodeP->float_flag = 1;
c6a7ab1f 484 /* Drop through. */
252b5132
RH
485 case 'r':
486 if (str[1] >= '0' && str[1] < '8')
487 {
91d6fa6a 488 addrmodeP->mode = str[1] - '0';
c6a7ab1f 489 return -1;
252b5132 490 }
c6a7ab1f
NC
491 break;
492 default:
493 break;
252b5132 494 }
c6a7ab1f 495 /* Drop through. */
0b7410c4 496
252b5132
RH
497 case 3:
498 if (!strncmp (str, "tos", 3))
499 {
91d6fa6a 500 addrmodeP->mode = 23; /* TopOfStack */
c6a7ab1f 501 return -1;
252b5132 502 }
c6a7ab1f 503 break;
0b7410c4 504
c6a7ab1f
NC
505 default:
506 break;
252b5132 507 }
0b7410c4 508
252b5132
RH
509 if (strl > 4)
510 {
511 if (str[strl - 1] == ')')
512 {
513 if (str[strl - 2] == ')')
514 {
515 if (!strncmp (&str[strl - 5], "(fp", 3))
c6a7ab1f
NC
516 mode = 16; /* Memory Relative. */
517 else if (!strncmp (&str[strl - 5], "(sp", 3))
518 mode = 17;
519 else if (!strncmp (&str[strl - 5], "(sb", 3))
520 mode = 18;
521
252b5132 522 if (mode != DEFAULT)
4eb6b71c
NC
523 {
524 /* Memory relative. */
91d6fa6a 525 addrmodeP->mode = mode;
c6a7ab1f 526 j = strl - 5; /* Temp for end of disp[0]. */
252b5132 527 i = 0;
0b7410c4 528
252b5132
RH
529 do
530 {
531 strl -= 1;
532 if (str[strl] == ')')
533 i++;
534 if (str[strl] == '(')
535 i--;
536 }
537 while (strl > -1 && i != 0);
0b7410c4 538
252b5132
RH
539 if (i != 0)
540 {
4eb6b71c 541 as_bad (_("Invalid syntax in Memory Relative addressing mode"));
252b5132
RH
542 return (0);
543 }
0b7410c4 544
91d6fa6a
NC
545 addrmodeP->disp[1] = str;
546 addrmodeP->disp[0] = str + strl + 1;
0b7410c4 547 str[j] = '\000'; /* Null terminate disp[0] . */
c6a7ab1f 548 str[strl] = '\000'; /* Null terminate disp[1]. */
0b7410c4 549
c6a7ab1f 550 return -1;
252b5132
RH
551 }
552 }
0b7410c4 553
252b5132
RH
554 switch (str[strl - 3])
555 {
556 case 'r':
557 case 'R':
558 if (str[strl - 2] >= '0'
559 && str[strl - 2] < '8'
560 && str[strl - 4] == '(')
561 {
91d6fa6a
NC
562 addrmodeP->mode = str[strl - 2] - '0' + 8;
563 addrmodeP->disp[0] = str;
252b5132 564 str[strl - 4] = 0;
c6a7ab1f 565 return -1; /* reg rel */
252b5132 566 }
c6a7ab1f 567 /* Drop through. */
0b7410c4 568
252b5132
RH
569 default:
570 if (!strncmp (&str[strl - 4], "(fp", 3))
c6a7ab1f
NC
571 mode = 24;
572 else if (!strncmp (&str[strl - 4], "(sp", 3))
573 mode = 25;
574 else if (!strncmp (&str[strl - 4], "(sb", 3))
575 mode = 26;
576 else if (!strncmp (&str[strl - 4], "(pc", 3))
577 mode = 27;
0b7410c4 578
252b5132
RH
579 if (mode != DEFAULT)
580 {
91d6fa6a
NC
581 addrmodeP->mode = mode;
582 addrmodeP->disp[0] = str;
252b5132 583 str[strl - 4] = '\0';
0b7410c4 584
c6a7ab1f 585 return -1; /* Memory space. */
252b5132
RH
586 }
587 }
588 }
0b7410c4 589
c6a7ab1f 590 /* No trailing ')' do we have a ']' ? */
252b5132
RH
591 if (str[strl - 1] == ']')
592 {
593 switch (str[strl - 2])
594 {
595 case 'b':
596 mode = 28;
597 break;
598 case 'w':
599 mode = 29;
600 break;
601 case 'd':
602 mode = 30;
603 break;
604 case 'q':
605 mode = 31;
606 break;
c6a7ab1f 607 default:
4eb6b71c 608 as_bad (_("Invalid scaled-indexed mode, use (b,w,d,q)"));
0b7410c4 609
252b5132
RH
610 if (str[strl - 3] != ':' || str[strl - 6] != '['
611 || str[strl - 5] == 'r' || str[strl - 4] < '0'
612 || str[strl - 4] > '7')
4eb6b71c 613 as_bad (_("Syntax in scaled-indexed mode, use [Rn:m] where n=[0..7] m={b,w,d,q}"));
c6a7ab1f
NC
614 } /* Scaled index. */
615
616 if (recursive_level > 0)
617 {
4eb6b71c 618 as_bad (_("Scaled-indexed addressing mode combined with scaled-index"));
c6a7ab1f
NC
619 return 0;
620 }
0b7410c4 621
91d6fa6a 622 addrmodeP->am_size += 1; /* scaled index byte. */
4eb6b71c
NC
623 j = str[strl - 4] - '0'; /* store temporary. */
624 str[strl - 6] = '\000'; /* nullterminate for recursive call. */
91d6fa6a 625 i = addr_mode (str, addrmodeP, 1);
0b7410c4 626
91d6fa6a 627 if (!i || addrmodeP->mode == 20)
c6a7ab1f 628 {
4eb6b71c 629 as_bad (_("Invalid or illegal addressing mode combined with scaled-index"));
c6a7ab1f
NC
630 return 0;
631 }
0b7410c4 632
91d6fa6a
NC
633 addrmodeP->scaled_mode = addrmodeP->mode; /* Store the inferior mode. */
634 addrmodeP->mode = mode;
635 addrmodeP->scaled_reg = j + 1;
0b7410c4 636
c6a7ab1f 637 return -1;
252b5132
RH
638 }
639 }
0b7410c4 640
91d6fa6a
NC
641 addrmodeP->mode = DEFAULT; /* Default to whatever. */
642 addrmodeP->disp[0] = str;
0b7410c4 643
c6a7ab1f 644 return -1;
252b5132
RH
645}
646\f
ea1562b3
NC
647static void
648evaluate_expr (expressionS *resultP, char *ptr)
649{
650 char *tmp_line;
651
652 tmp_line = input_line_pointer;
653 input_line_pointer = ptr;
654 expression (resultP);
655 input_line_pointer = tmp_line;
656}
657
252b5132
RH
658/* ptr points at string addr_modeP points at struct with result This
659 routine calls addr_mode to determine the general addr.mode of the
660 operand. When this is ready it parses the displacements for size
661 specifying suffixes and determines size of immediate mode via
662 ns32k-opcode. Also builds index bytes if needed. */
c6a7ab1f 663
4eb6b71c 664static int
91d6fa6a 665get_addr_mode (char *ptr, addr_modeS *addrmodeP)
252b5132
RH
666{
667 int tmp;
0b7410c4 668
91d6fa6a 669 addr_mode (ptr, addrmodeP, 0);
0b7410c4 670
91d6fa6a 671 if (addrmodeP->mode == DEFAULT || addrmodeP->scaled_mode == -1)
252b5132 672 {
67c1ffbe 673 /* Resolve ambiguous operands, this shouldn't be necessary if
252b5132 674 one uses standard NSC operand syntax. But the sequent
67c1ffbe 675 compiler doesn't!!! This finds a proper addressing mode
c6a7ab1f
NC
676 if it is implicitly stated. See ns32k-opcode.h. */
677 (void) evaluate_expr (&exprP, ptr); /* This call takes time Sigh! */
0b7410c4 678
91d6fa6a 679 if (addrmodeP->mode == DEFAULT)
252b5132
RH
680 {
681 if (exprP.X_add_symbol || exprP.X_op_symbol)
91d6fa6a 682 addrmodeP->mode = desc->default_model; /* We have a label. */
252b5132 683 else
91d6fa6a 684 addrmodeP->mode = desc->default_modec; /* We have a constant. */
252b5132
RH
685 }
686 else
687 {
688 if (exprP.X_add_symbol || exprP.X_op_symbol)
91d6fa6a 689 addrmodeP->scaled_mode = desc->default_model;
252b5132 690 else
91d6fa6a 691 addrmodeP->scaled_mode = desc->default_modec;
252b5132 692 }
0b7410c4 693
c6a7ab1f
NC
694 /* Must put this mess down in addr_mode to handle the scaled
695 case better. */
252b5132 696 }
0b7410c4 697
252b5132
RH
698 /* It appears as the sequent compiler wants an absolute when we have
699 a label without @. Constants becomes immediates besides the addr
700 case. Think it does so with local labels too, not optimum, pcrel
701 is better. When I have time I will make gas check this and
702 select pcrel when possible Actually that is trivial. */
91d6fa6a 703 if ((tmp = addrmodeP->scaled_reg))
c6a7ab1f
NC
704 { /* Build indexbyte. */
705 tmp--; /* Remember regnumber comes incremented for
706 flagpurpose. */
91d6fa6a
NC
707 tmp |= addrmodeP->scaled_mode << 3;
708 addrmodeP->index_byte = (char) tmp;
709 addrmodeP->am_size += 1;
252b5132 710 }
0b7410c4 711
3739860c 712 gas_assert (addrmodeP->mode >= 0);
91d6fa6a 713 if (disp_test[(unsigned int) addrmodeP->mode])
c6a7ab1f 714 {
4eb6b71c
NC
715 char c;
716 char suffix;
717 char suffix_sub;
718 int i;
719 char *toP;
720 char *fromP;
c6a7ab1f
NC
721
722 /* There was a displacement, probe for length specifying suffix. */
91d6fa6a 723 addrmodeP->pcrel = 0;
0b7410c4 724
91d6fa6a
NC
725 gas_assert (addrmodeP->mode >= 0);
726 if (disp_test[(unsigned int) addrmodeP->mode])
c6a7ab1f
NC
727 {
728 /* There is a displacement. */
91d6fa6a 729 if (addrmodeP->mode == 27 || addrmodeP->scaled_mode == 27)
c6a7ab1f 730 /* Do we have pcrel. mode. */
91d6fa6a 731 addrmodeP->pcrel = 1;
0b7410c4 732
91d6fa6a 733 addrmodeP->im_disp = 1;
0b7410c4 734
c6a7ab1f
NC
735 for (i = 0; i < 2; i++)
736 {
737 suffix_sub = suffix = 0;
0b7410c4 738
91d6fa6a 739 if ((toP = addrmodeP->disp[i]))
c6a7ab1f
NC
740 {
741 /* Suffix of expression, the largest size rules. */
742 fromP = toP;
0b7410c4 743
4eb6b71c 744 while ((c = *fromP++))
c6a7ab1f
NC
745 {
746 *toP++ = c;
747 if (c == ':')
748 {
749 switch (*fromP)
750 {
751 case '\0':
752 as_warn (_("Premature end of suffix -- Defaulting to d"));
753 suffix = 4;
754 continue;
755 case 'b':
756 suffix_sub = 1;
757 break;
758 case 'w':
759 suffix_sub = 2;
760 break;
761 case 'd':
762 suffix_sub = 4;
763 break;
764 default:
765 as_warn (_("Bad suffix after ':' use {b|w|d} Defaulting to d"));
766 suffix = 4;
767 }
0b7410c4 768
c6a7ab1f
NC
769 fromP ++;
770 toP --; /* So we write over the ':' */
0b7410c4 771
c6a7ab1f
NC
772 if (suffix < suffix_sub)
773 suffix = suffix_sub;
774 }
775 }
0b7410c4 776
c6a7ab1f 777 *toP = '\0'; /* Terminate properly. */
91d6fa6a
NC
778 addrmodeP->disp_suffix[i] = suffix;
779 addrmodeP->am_size += suffix ? suffix : 4;
c6a7ab1f
NC
780 }
781 }
782 }
252b5132
RH
783 }
784 else
785 {
91d6fa6a 786 if (addrmodeP->mode == 20)
c6a7ab1f
NC
787 {
788 /* Look in ns32k_opcode for size. */
91d6fa6a
NC
789 addrmodeP->disp_suffix[0] = addrmodeP->am_size = desc->im_size;
790 addrmodeP->im_disp = 0;
252b5132
RH
791 }
792 }
0b7410c4 793
91d6fa6a 794 return addrmodeP->mode;
252b5132
RH
795}
796
c6a7ab1f 797/* Read an optionlist. */
252b5132 798
4eb6b71c 799static void
ea1562b3
NC
800optlist (char *str, /* The string to extract options from. */
801 struct ns32k_option *optionP, /* How to search the string. */
802 unsigned long *default_map) /* Default pattern and output. */
252b5132 803{
4eb6b71c 804 int i, j, k, strlen1, strlen2;
e0471c16 805 const char *patternP, *strP;
0b7410c4 806
252b5132 807 strlen1 = strlen (str);
0b7410c4 808
252b5132 809 if (strlen1 < 1)
c6a7ab1f 810 as_fatal (_("Very short instr to option, ie you can't do it on a NULLstr"));
0b7410c4 811
252b5132
RH
812 for (i = 0; optionP[i].pattern != 0; i++)
813 {
814 strlen2 = strlen (optionP[i].pattern);
0b7410c4 815
252b5132
RH
816 for (j = 0; j < strlen1; j++)
817 {
818 patternP = optionP[i].pattern;
819 strP = &str[j];
0b7410c4 820
252b5132
RH
821 for (k = 0; k < strlen2; k++)
822 {
823 if (*(strP++) != *(patternP++))
824 break;
825 }
0b7410c4 826
252b5132
RH
827 if (k == strlen2)
828 { /* match */
829 *default_map |= optionP[i].or;
830 *default_map &= optionP[i].and;
831 }
832 }
833 }
834}
835
c6a7ab1f 836/* Search struct for symbols.
252b5132
RH
837 This function is used to get the short integer form of reg names in
838 the instructions lmr, smr, lpr, spr return true if str is found in
c6a7ab1f 839 list. */
252b5132 840
4eb6b71c 841static int
ea1562b3
NC
842list_search (char *str, /* The string to match. */
843 struct ns32k_option *optionP, /* List to search. */
844 unsigned long *default_map) /* Default pattern and output. */
252b5132 845{
4eb6b71c 846 int i;
0b7410c4 847
252b5132
RH
848 for (i = 0; optionP[i].pattern != 0; i++)
849 {
850 if (!strncmp (optionP[i].pattern, str, 20))
c6a7ab1f
NC
851 {
852 /* Use strncmp to be safe. */
252b5132
RH
853 *default_map |= optionP[i].or;
854 *default_map &= optionP[i].and;
0b7410c4 855
252b5132
RH
856 return -1;
857 }
858 }
0b7410c4 859
4eb6b71c 860 as_bad (_("No such entry in list. (cpu/mmu register)"));
252b5132
RH
861 return 0;
862}
ea1562b3
NC
863\f
864/* Create a bit_fixS in obstack 'notes'.
865 This struct is used to profile the normal fix. If the bit_fixP is a
866 valid pointer (not NULL) the bit_fix data will be used to format
867 the fix. */
252b5132 868
ea1562b3
NC
869static bit_fixS *
870bit_fix_new (int size, /* Length of bitfield. */
871 int offset, /* Bit offset to bitfield. */
872 long min, /* Signextended min for bitfield. */
873 long max, /* Signextended max for bitfield. */
874 long add, /* Add mask, used for huffman prefix. */
875 long base_type, /* 0 or 1, if 1 it's exploded to opcode ptr. */
876 long base_adj)
252b5132 877{
ea1562b3 878 bit_fixS *bit_fixP;
252b5132 879
5e429f4c 880 bit_fixP = XOBNEW (&notes, bit_fixS);
ea1562b3
NC
881
882 bit_fixP->fx_bit_size = size;
883 bit_fixP->fx_bit_offset = offset;
884 bit_fixP->fx_bit_base = base_type;
885 bit_fixP->fx_bit_base_adj = base_adj;
886 bit_fixP->fx_bit_max = max;
887 bit_fixP->fx_bit_min = min;
888 bit_fixP->fx_bit_add = add;
889
890 return bit_fixP;
252b5132 891}
ea1562b3 892
252b5132
RH
893/* Convert operands to iif-format and adds bitfields to the opcode.
894 Operands are parsed in such an order that the opcode is updated from
895 its most significant bit, that is when the operand need to alter the
896 opcode.
67c1ffbe 897 Be careful not to put to objects in the same iif-slot. */
252b5132 898
4eb6b71c 899static void
ea1562b3
NC
900encode_operand (int argc,
901 char **argv,
902 const char *operandsP,
903 const char *suffixP,
904 char im_size ATTRIBUTE_UNUSED,
905 char opcode_bit_ptr)
252b5132 906{
4eb6b71c 907 int i, j;
252b5132 908 char d;
4eb6b71c
NC
909 int pcrel, b, loop, pcrel_adjust;
910 unsigned long tmp;
0b7410c4 911
252b5132
RH
912 for (loop = 0; loop < argc; loop++)
913 {
c6a7ab1f
NC
914 /* What operand are we supposed to work on. */
915 i = operandsP[loop << 1] - '1';
252b5132
RH
916 if (i > 3)
917 as_fatal (_("Internal consistency error. check ns32k-opcode.h"));
0b7410c4 918
252b5132
RH
919 pcrel = 0;
920 pcrel_adjust = 0;
921 tmp = 0;
0b7410c4 922
252b5132
RH
923 switch ((d = operandsP[(loop << 1) + 1]))
924 {
4eb6b71c
NC
925 case 'f': /* Operand of sfsr turns out to be a nasty
926 specialcase. */
252b5132 927 opcode_bit_ptr -= 5;
4eb6b71c
NC
928 case 'Z': /* Float not immediate. */
929 case 'F': /* 32 bit float general form. */
930 case 'L': /* 64 bit float. */
931 case 'I': /* Integer not immediate. */
932 case 'B': /* Byte */
933 case 'W': /* Word */
934 case 'D': /* Double-word. */
935 case 'A': /* Double-word gen-address-form ie no regs
936 allowed. */
252b5132 937 get_addr_mode (argv[i], &addr_modeP);
0b7410c4 938
c6a7ab1f
NC
939 if ((addr_modeP.mode == 20) &&
940 (d == 'I' || d == 'Z' || d == 'A'))
941 as_fatal (d == 'A'? _("Address of immediate operand"):
942 _("Invalid immediate write operand."));
252b5132
RH
943
944 if (opcode_bit_ptr == desc->opcode_size)
945 b = 4;
946 else
947 b = 6;
0b7410c4 948
252b5132
RH
949 for (j = b; j < (b + 2); j++)
950 {
951 if (addr_modeP.disp[j - b])
952 {
953 IIF (j,
954 2,
955 addr_modeP.disp_suffix[j - b],
956 (unsigned long) addr_modeP.disp[j - b],
957 0,
958 addr_modeP.pcrel,
959 iif.instr_size,
960 addr_modeP.im_disp,
961 IND (BRANCH, BYTE),
962 NULL,
963 (addr_modeP.scaled_reg ? addr_modeP.scaled_mode
964 : addr_modeP.mode),
965 0);
966 }
967 }
0b7410c4 968
252b5132
RH
969 opcode_bit_ptr -= 5;
970 iif.iifP[1].object |= ((long) addr_modeP.mode) << opcode_bit_ptr;
0b7410c4 971
252b5132
RH
972 if (addr_modeP.scaled_reg)
973 {
974 j = b / 2;
975 IIF (j, 1, 1, (unsigned long) addr_modeP.index_byte,
976 0, 0, 0, 0, 0, NULL, -1, 0);
977 }
978 break;
0b7410c4 979
4eb6b71c
NC
980 case 'b': /* Multiple instruction disp. */
981 freeptr++; /* OVE:this is an useful hack. */
982 sprintf (freeptr, "((%s-1)*%d)", argv[i], desc->im_size);
252b5132 983 argv[i] = freeptr;
67c1ffbe 984 pcrel -= 1; /* Make pcrel 0 in spite of what case 'p':
4eb6b71c 985 wants. */
252b5132 986 /* fall thru */
4eb6b71c 987 case 'p': /* Displacement - pc relative addressing. */
252b5132
RH
988 pcrel += 1;
989 /* fall thru */
4eb6b71c 990 case 'd': /* Displacement. */
252b5132
RH
991 iif.instr_size += suffixP[i] ? suffixP[i] : 4;
992 IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
993 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 0);
994 break;
4eb6b71c
NC
995 case 'H': /* Sequent-hack: the linker wants a bit set
996 when bsr. */
252b5132
RH
997 pcrel = 1;
998 iif.instr_size += suffixP[i] ? suffixP[i] : 4;
999 IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
1000 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 1);
1001 break;
1002 case 'q': /* quick */
1003 opcode_bit_ptr -= 4;
1004 IIF (11, 2, 42, (unsigned long) argv[i], 0, 0, 0, 0, 0,
1005 bit_fix_new (4, opcode_bit_ptr, -8, 7, 0, 1, 0), -1, 0);
1006 break;
4eb6b71c 1007 case 'r': /* Register number (3 bits). */
252b5132
RH
1008 list_search (argv[i], opt6, &tmp);
1009 opcode_bit_ptr -= 3;
1010 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1011 break;
4eb6b71c 1012 case 'O': /* Setcfg instruction optionslist. */
252b5132
RH
1013 optlist (argv[i], opt3, &tmp);
1014 opcode_bit_ptr -= 4;
1015 iif.iifP[1].object |= tmp << 15;
1016 break;
4eb6b71c 1017 case 'C': /* Cinv instruction optionslist. */
252b5132
RH
1018 optlist (argv[i], opt4, &tmp);
1019 opcode_bit_ptr -= 4;
4eb6b71c 1020 iif.iifP[1].object |= tmp << 15; /* Insert the regtype in opcode. */
252b5132 1021 break;
4eb6b71c 1022 case 'S': /* String instruction options list. */
252b5132
RH
1023 optlist (argv[i], opt5, &tmp);
1024 opcode_bit_ptr -= 4;
1025 iif.iifP[1].object |= tmp << 15;
1026 break;
1027 case 'u':
4eb6b71c 1028 case 'U': /* Register list. */
252b5132
RH
1029 IIF (10, 1, 1, 0, 0, 0, 0, 0, 0, NULL, -1, 0);
1030 switch (operandsP[(i << 1) + 1])
1031 {
4eb6b71c 1032 case 'u': /* Restore, exit. */
252b5132
RH
1033 optlist (argv[i], opt1, &iif.iifP[10].object);
1034 break;
4eb6b71c 1035 case 'U': /* Save, enter. */
252b5132
RH
1036 optlist (argv[i], opt2, &iif.iifP[10].object);
1037 break;
1038 }
1039 iif.instr_size += 1;
1040 break;
4eb6b71c 1041 case 'M': /* MMU register. */
252b5132
RH
1042 list_search (argv[i], mmureg, &tmp);
1043 opcode_bit_ptr -= 4;
1044 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1045 break;
4eb6b71c 1046 case 'P': /* CPU register. */
252b5132
RH
1047 list_search (argv[i], cpureg, &tmp);
1048 opcode_bit_ptr -= 4;
1049 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1050 break;
4eb6b71c
NC
1051 case 'g': /* Inss exts. */
1052 iif.instr_size += 1; /* 1 byte is allocated after the opcode. */
252b5132 1053 IIF (10, 2, 1,
4eb6b71c 1054 (unsigned long) argv[i], /* i always 2 here. */
252b5132 1055 0, 0, 0, 0, 0,
4eb6b71c
NC
1056 bit_fix_new (3, 5, 0, 7, 0, 0, 0), /* A bit_fix is targeted to
1057 the byte. */
252b5132
RH
1058 -1, 0);
1059 break;
1060 case 'G':
1061 IIF (11, 2, 42,
4eb6b71c 1062 (unsigned long) argv[i], /* i always 3 here. */
252b5132
RH
1063 0, 0, 0, 0, 0,
1064 bit_fix_new (5, 0, 1, 32, -1, 0, -1), -1, 0);
1065 break;
1066 case 'i':
1067 iif.instr_size += 1;
4eb6b71c 1068 b = 2 + i; /* Put the extension byte after opcode. */
252b5132
RH
1069 IIF (b, 2, 1, 0, 0, 0, 0, 0, 0, 0, -1, 0);
1070 break;
1071 default:
1072 as_fatal (_("Bad opcode-table-option, check in file ns32k-opcode.h"));
1073 }
1074 }
1075}
1076\f
1077/* in: instruction line
1078 out: internal structure of instruction
1079 that has been prepared for direct conversion to fragment(s) and
1080 fixes in a systematical fashion
4eb6b71c 1081 Return-value = recursive_level. */
c6a7ab1f
NC
1082/* Build iif of one assembly text line. */
1083
4eb6b71c 1084static int
ea1562b3 1085parse (const char *line, int recursive_level)
252b5132 1086{
4cd62c96
AM
1087 const char *lineptr;
1088 char c, suffix_separator;
4eb6b71c
NC
1089 int i;
1090 unsigned int argc;
1091 int arg_type;
252b5132 1092 char sqr, sep;
c6a7ab1f 1093 char suffix[MAX_ARGS], *argv[MAX_ARGS]; /* No more than 4 operands. */
0b7410c4 1094
252b5132 1095 if (recursive_level <= 0)
c6a7ab1f
NC
1096 {
1097 /* Called from md_assemble. */
1098 for (lineptr = line; (*lineptr) != '\0' && (*lineptr) != ' '; lineptr++)
1099 continue;
0b7410c4 1100
252b5132 1101 c = *lineptr;
4cd62c96 1102 *(char *) lineptr = '\0';
0b7410c4 1103
252b5132 1104 if (!(desc = (struct ns32k_opcode *) hash_find (inst_hash_handle, line)))
c6a7ab1f
NC
1105 as_fatal (_("No such opcode"));
1106
4cd62c96 1107 *(char *) lineptr = c;
252b5132
RH
1108 }
1109 else
ea1562b3 1110 lineptr = line;
0b7410c4 1111
252b5132 1112 argc = 0;
0b7410c4 1113
252b5132
RH
1114 if (*desc->operands)
1115 {
1116 if (*lineptr++ != '\0')
1117 {
1118 sqr = '[';
1119 sep = ',';
0b7410c4 1120
252b5132
RH
1121 while (*lineptr != '\0')
1122 {
1123 if (desc->operands[argc << 1])
1124 {
1125 suffix[argc] = 0;
1126 arg_type = desc->operands[(argc << 1) + 1];
0b7410c4 1127
252b5132
RH
1128 switch (arg_type)
1129 {
1130 case 'd':
1131 case 'b':
1132 case 'p':
c6a7ab1f
NC
1133 case 'H':
1134 /* The operand is supposed to be a displacement. */
252b5132 1135 /* Hackwarning: do not forget to update the 4
c6a7ab1f 1136 cases above when editing ns32k-opcode.h. */
252b5132
RH
1137 suffix_separator = ':';
1138 break;
1139 default:
c6a7ab1f
NC
1140 /* If this char occurs we loose. */
1141 suffix_separator = '\255';
1142 break;
252b5132 1143 }
0b7410c4 1144
4eb6b71c 1145 suffix[argc] = 0; /* 0 when no ':' is encountered. */
252b5132
RH
1146 argv[argc] = freeptr;
1147 *freeptr = '\0';
0b7410c4 1148
252b5132
RH
1149 while ((c = *lineptr) != '\0' && c != sep)
1150 {
1151 if (c == sqr)
1152 {
1153 if (sqr == '[')
1154 {
1155 sqr = ']';
1156 sep = '\0';
1157 }
1158 else
1159 {
1160 sqr = '[';
1161 sep = ',';
1162 }
1163 }
0b7410c4 1164
252b5132 1165 if (c == suffix_separator)
c6a7ab1f
NC
1166 {
1167 /* ':' - label/suffix separator. */
252b5132
RH
1168 switch (lineptr[1])
1169 {
1170 case 'b':
1171 suffix[argc] = 1;
1172 break;
1173 case 'w':
1174 suffix[argc] = 2;
1175 break;
1176 case 'd':
1177 suffix[argc] = 4;
1178 break;
1179 default:
1180 as_warn (_("Bad suffix, defaulting to d"));
1181 suffix[argc] = 4;
1182 if (lineptr[1] == '\0' || lineptr[1] == sep)
1183 {
1184 lineptr += 1;
1185 continue;
1186 }
c6a7ab1f 1187 break;
252b5132 1188 }
0b7410c4 1189
252b5132
RH
1190 lineptr += 2;
1191 continue;
1192 }
0b7410c4 1193
252b5132
RH
1194 *freeptr++ = c;
1195 lineptr++;
1196 }
0b7410c4 1197
252b5132
RH
1198 *freeptr++ = '\0';
1199 argc += 1;
0b7410c4 1200
252b5132
RH
1201 if (*lineptr == '\0')
1202 continue;
0b7410c4 1203
252b5132
RH
1204 lineptr += 1;
1205 }
1206 else
ea1562b3 1207 as_fatal (_("Too many operands passed to instruction"));
252b5132
RH
1208 }
1209 }
1210 }
0b7410c4 1211
252b5132
RH
1212 if (argc != strlen (desc->operands) / 2)
1213 {
1214 if (strlen (desc->default_args))
c6a7ab1f
NC
1215 {
1216 /* We can apply default, don't goof. */
252b5132 1217 if (parse (desc->default_args, 1) != 1)
c6a7ab1f
NC
1218 /* Check error in default. */
1219 as_fatal (_("Wrong numbers of operands in default, check ns32k-opcodes.h"));
252b5132
RH
1220 }
1221 else
ea1562b3 1222 as_fatal (_("Wrong number of operands"));
252b5132 1223 }
0b7410c4 1224
252b5132 1225 for (i = 0; i < IIF_ENTRIES; i++)
c6a7ab1f
NC
1226 /* Mark all entries as void. */
1227 iif.iifP[i].type = 0;
252b5132 1228
c6a7ab1f 1229 /* Build opcode iif-entry. */
252b5132
RH
1230 iif.instr_size = desc->opcode_size / 8;
1231 IIF (1, 1, iif.instr_size, desc->opcode_seed, 0, 0, 0, 0, 0, 0, -1, 0);
1232
c6a7ab1f 1233 /* This call encodes operands to iif format. */
252b5132 1234 if (argc)
ea1562b3
NC
1235 encode_operand (argc, argv, &desc->operands[0],
1236 &suffix[0], desc->im_size, desc->opcode_size);
1237
252b5132
RH
1238 return recursive_level;
1239}
1240\f
ea1562b3 1241/* This functionality should really be in the bfd library. */
252b5132 1242
ea1562b3
NC
1243static bfd_reloc_code_real_type
1244reloc (int size, int pcrel, int type)
252b5132 1245{
91d6fa6a 1246 int length, rel_index;
ea1562b3
NC
1247 bfd_reloc_code_real_type relocs[] =
1248 {
1249 BFD_RELOC_NS32K_IMM_8,
1250 BFD_RELOC_NS32K_IMM_16,
1251 BFD_RELOC_NS32K_IMM_32,
1252 BFD_RELOC_NS32K_IMM_8_PCREL,
1253 BFD_RELOC_NS32K_IMM_16_PCREL,
1254 BFD_RELOC_NS32K_IMM_32_PCREL,
252b5132 1255
ea1562b3
NC
1256 /* ns32k displacements. */
1257 BFD_RELOC_NS32K_DISP_8,
1258 BFD_RELOC_NS32K_DISP_16,
1259 BFD_RELOC_NS32K_DISP_32,
1260 BFD_RELOC_NS32K_DISP_8_PCREL,
1261 BFD_RELOC_NS32K_DISP_16_PCREL,
1262 BFD_RELOC_NS32K_DISP_32_PCREL,
252b5132 1263
ea1562b3
NC
1264 /* Normal 2's complement. */
1265 BFD_RELOC_8,
1266 BFD_RELOC_16,
1267 BFD_RELOC_32,
1268 BFD_RELOC_8_PCREL,
1269 BFD_RELOC_16_PCREL,
1270 BFD_RELOC_32_PCREL
1271 };
1272
1273 switch (size)
252b5132 1274 {
ea1562b3
NC
1275 case 1:
1276 length = 0;
1277 break;
1278 case 2:
1279 length = 1;
1280 break;
1281 case 4:
1282 length = 2;
1283 break;
1284 default:
1285 length = -1;
1286 break;
1287 }
0b7410c4 1288
91d6fa6a 1289 rel_index = length + 3 * pcrel + 6 * type;
0b7410c4 1290
91d6fa6a
NC
1291 if (rel_index >= 0 && (unsigned int) rel_index < sizeof (relocs) / sizeof (relocs[0]))
1292 return relocs[rel_index];
0b7410c4 1293
ea1562b3
NC
1294 if (pcrel)
1295 as_bad (_("Can not do %d byte pc-relative relocation for storage type %d"),
1296 size, type);
1297 else
1298 as_bad (_("Can not do %d byte relocation for storage type %d"),
1299 size, type);
0b7410c4 1300
ea1562b3 1301 return BFD_RELOC_NONE;
0b7410c4 1302
ea1562b3 1303}
252b5132 1304
ea1562b3
NC
1305static void
1306fix_new_ns32k (fragS *frag, /* Which frag? */
1307 int where, /* Where in that frag? */
1308 int size, /* 1, 2 or 4 usually. */
1309 symbolS *add_symbol, /* X_add_symbol. */
1310 long offset, /* X_add_number. */
1311 int pcrel, /* True if PC-relative relocation. */
1312 char im_disp, /* True if the value to write is a
1313 displacement. */
1314 bit_fixS *bit_fixP, /* Pointer at struct of bit_fix's, ignored if
1315 NULL. */
1316 char bsr, /* Sequent-linker-hack: 1 when relocobject is
1317 a bsr. */
1318 fragS *opcode_frag,
1319 unsigned int opcode_offset)
1320{
1321 fixS *fixP = fix_new (frag, where, size, add_symbol,
1322 offset, pcrel,
ea1562b3 1323 bit_fixP ? NO_RELOC : reloc (size, pcrel, im_disp)
ea1562b3
NC
1324 );
1325
1326 fix_opcode_frag (fixP) = opcode_frag;
1327 fix_opcode_offset (fixP) = opcode_offset;
1328 fix_im_disp (fixP) = im_disp;
1329 fix_bsr (fixP) = bsr;
1330 fix_bit_fixP (fixP) = bit_fixP;
1331 /* We have a MD overflow check for displacements. */
1332 fixP->fx_no_overflow = (im_disp != 0);
1333}
1334
1335static void
1336fix_new_ns32k_exp (fragS *frag, /* Which frag? */
1337 int where, /* Where in that frag? */
1338 int size, /* 1, 2 or 4 usually. */
1339 expressionS *exp, /* Expression. */
1340 int pcrel, /* True if PC-relative relocation. */
1341 char im_disp, /* True if the value to write is a
1342 displacement. */
1343 bit_fixS *bit_fixP, /* Pointer at struct of bit_fix's, ignored if
1344 NULL. */
1345 char bsr, /* Sequent-linker-hack: 1 when relocobject is
1346 a bsr. */
1347 fragS *opcode_frag,
1348 unsigned int opcode_offset)
1349{
1350 fixS *fixP = fix_new_exp (frag, where, size, exp, pcrel,
ea1562b3 1351 bit_fixP ? NO_RELOC : reloc (size, pcrel, im_disp)
ea1562b3
NC
1352 );
1353
1354 fix_opcode_frag (fixP) = opcode_frag;
1355 fix_opcode_offset (fixP) = opcode_offset;
1356 fix_im_disp (fixP) = im_disp;
1357 fix_bsr (fixP) = bsr;
1358 fix_bit_fixP (fixP) = bit_fixP;
1359 /* We have a MD overflow check for displacements. */
1360 fixP->fx_no_overflow = (im_disp != 0);
1361}
1362
1363/* Convert number to chars in correct order. */
1364
1365void
1366md_number_to_chars (char *buf, valueT value, int nbytes)
1367{
1368 number_to_chars_littleendian (buf, value, nbytes);
1369}
1370
1371/* This is a variant of md_numbers_to_chars. The reason for its'
1372 existence is the fact that ns32k uses Huffman coded
1373 displacements. This implies that the bit order is reversed in
1374 displacements and that they are prefixed with a size-tag.
1375
1376 binary: msb -> lsb
1377 0xxxxxxx byte
1378 10xxxxxx xxxxxxxx word
1379 11xxxxxx xxxxxxxx xxxxxxxx xxxxxxxx double word
1380
1381 This must be taken care of and we do it here! */
1382
1383static void
1384md_number_to_disp (char *buf, long val, int n)
1385{
1386 switch (n)
1387 {
1388 case 1:
1389 if (val < -64 || val > 63)
1390 as_bad (_("value of %ld out of byte displacement range."), val);
1391 val &= 0x7f;
1392#ifdef SHOW_NUM
1393 printf ("%x ", val & 0xff);
1394#endif
1395 *buf++ = val;
1396 break;
1397
1398 case 2:
1399 if (val < -8192 || val > 8191)
1400 as_bad (_("value of %ld out of word displacement range."), val);
1401 val &= 0x3fff;
1402 val |= 0x8000;
1403#ifdef SHOW_NUM
1404 printf ("%x ", val >> 8 & 0xff);
1405#endif
1406 *buf++ = (val >> 8);
1407#ifdef SHOW_NUM
1408 printf ("%x ", val & 0xff);
1409#endif
1410 *buf++ = val;
1411 break;
1412
1413 case 4:
1414 if (val < -0x20000000 || val >= 0x20000000)
1415 as_bad (_("value of %ld out of double word displacement range."), val);
1416 val |= 0xc0000000;
1417#ifdef SHOW_NUM
1418 printf ("%x ", val >> 24 & 0xff);
1419#endif
1420 *buf++ = (val >> 24);
1421#ifdef SHOW_NUM
1422 printf ("%x ", val >> 16 & 0xff);
1423#endif
1424 *buf++ = (val >> 16);
1425#ifdef SHOW_NUM
1426 printf ("%x ", val >> 8 & 0xff);
1427#endif
1428 *buf++ = (val >> 8);
1429#ifdef SHOW_NUM
1430 printf ("%x ", val & 0xff);
1431#endif
1432 *buf++ = val;
1433 break;
1434
1435 default:
1436 as_fatal (_("Internal logic error. line %d, file \"%s\""),
1437 __LINE__, __FILE__);
1438 }
1439}
1440
1441static void
1442md_number_to_imm (char *buf, long val, int n)
1443{
1444 switch (n)
1445 {
1446 case 1:
1447#ifdef SHOW_NUM
1448 printf ("%x ", val & 0xff);
1449#endif
1450 *buf++ = val;
1451 break;
1452
1453 case 2:
1454#ifdef SHOW_NUM
1455 printf ("%x ", val >> 8 & 0xff);
1456#endif
1457 *buf++ = (val >> 8);
1458#ifdef SHOW_NUM
1459 printf ("%x ", val & 0xff);
1460#endif
1461 *buf++ = val;
1462 break;
1463
1464 case 4:
1465#ifdef SHOW_NUM
1466 printf ("%x ", val >> 24 & 0xff);
1467#endif
1468 *buf++ = (val >> 24);
1469#ifdef SHOW_NUM
1470 printf ("%x ", val >> 16 & 0xff);
1471#endif
1472 *buf++ = (val >> 16);
1473#ifdef SHOW_NUM
1474 printf ("%x ", val >> 8 & 0xff);
1475#endif
1476 *buf++ = (val >> 8);
1477#ifdef SHOW_NUM
1478 printf ("%x ", val & 0xff);
1479#endif
1480 *buf++ = val;
1481 break;
1482
1483 default:
1484 as_fatal (_("Internal logic error. line %d, file \"%s\""),
1485 __LINE__, __FILE__);
1486 }
1487}
1488
1489/* Fast bitfiddling support. */
1490/* Mask used to zero bitfield before oring in the true field. */
1491
1492static unsigned long l_mask[] =
1493{
1494 0xffffffff, 0xfffffffe, 0xfffffffc, 0xfffffff8,
1495 0xfffffff0, 0xffffffe0, 0xffffffc0, 0xffffff80,
1496 0xffffff00, 0xfffffe00, 0xfffffc00, 0xfffff800,
1497 0xfffff000, 0xffffe000, 0xffffc000, 0xffff8000,
1498 0xffff0000, 0xfffe0000, 0xfffc0000, 0xfff80000,
1499 0xfff00000, 0xffe00000, 0xffc00000, 0xff800000,
1500 0xff000000, 0xfe000000, 0xfc000000, 0xf8000000,
1501 0xf0000000, 0xe0000000, 0xc0000000, 0x80000000,
1502};
1503static unsigned long r_mask[] =
1504{
1505 0x00000000, 0x00000001, 0x00000003, 0x00000007,
1506 0x0000000f, 0x0000001f, 0x0000003f, 0x0000007f,
1507 0x000000ff, 0x000001ff, 0x000003ff, 0x000007ff,
1508 0x00000fff, 0x00001fff, 0x00003fff, 0x00007fff,
1509 0x0000ffff, 0x0001ffff, 0x0003ffff, 0x0007ffff,
1510 0x000fffff, 0x001fffff, 0x003fffff, 0x007fffff,
1511 0x00ffffff, 0x01ffffff, 0x03ffffff, 0x07ffffff,
1512 0x0fffffff, 0x1fffffff, 0x3fffffff, 0x7fffffff,
1513};
1514#define MASK_BITS 31
1515/* Insert bitfield described by field_ptr and val at buf
1516 This routine is written for modification of the first 4 bytes pointed
1517 to by buf, to yield speed.
1518 The ifdef stuff is for selection between a ns32k-dependent routine
1519 and a general version. (My advice: use the general version!). */
1520
1521static void
1522md_number_to_field (char *buf, long val, bit_fixS *field_ptr)
1523{
1524 unsigned long object;
1525 unsigned long mask;
1526 /* Define ENDIAN on a ns32k machine. */
1527#ifdef ENDIAN
1528 unsigned long *mem_ptr;
1529#else
1530 char *mem_ptr;
1531#endif
1532
1533 if (field_ptr->fx_bit_min <= val && val <= field_ptr->fx_bit_max)
1534 {
1535#ifdef ENDIAN
1536 if (field_ptr->fx_bit_base)
1537 /* Override buf. */
1538 mem_ptr = (unsigned long *) field_ptr->fx_bit_base;
1539 else
1540 mem_ptr = (unsigned long *) buf;
1541
1542 mem_ptr = ((unsigned long *)
1543 ((char *) mem_ptr + field_ptr->fx_bit_base_adj));
1544#else
1545 if (field_ptr->fx_bit_base)
1546 mem_ptr = (char *) field_ptr->fx_bit_base;
1547 else
1548 mem_ptr = buf;
1549
1550 mem_ptr += field_ptr->fx_bit_base_adj;
1551#endif
1552#ifdef ENDIAN
1553 /* We have a nice ns32k machine with lowbyte at low-physical mem. */
1554 object = *mem_ptr; /* get some bytes */
1555#else /* OVE Goof! the machine is a m68k or dito. */
1556 /* That takes more byte fiddling. */
1557 object = 0;
1558 object |= mem_ptr[3] & 0xff;
1559 object <<= 8;
1560 object |= mem_ptr[2] & 0xff;
1561 object <<= 8;
1562 object |= mem_ptr[1] & 0xff;
1563 object <<= 8;
1564 object |= mem_ptr[0] & 0xff;
1565#endif
1566 mask = 0;
1567 mask |= (r_mask[field_ptr->fx_bit_offset]);
1568 mask |= (l_mask[field_ptr->fx_bit_offset + field_ptr->fx_bit_size]);
1569 object &= mask;
1570 val += field_ptr->fx_bit_add;
1571 object |= ((val << field_ptr->fx_bit_offset) & (mask ^ 0xffffffff));
1572#ifdef ENDIAN
1573 *mem_ptr = object;
1574#else
1575 mem_ptr[0] = (char) object;
1576 object >>= 8;
1577 mem_ptr[1] = (char) object;
1578 object >>= 8;
1579 mem_ptr[2] = (char) object;
1580 object >>= 8;
1581 mem_ptr[3] = (char) object;
1582#endif
1583 }
1584 else
1585 as_bad (_("Bit field out of range"));
1586}
1587
1588/* Convert iif to fragments. From this point we start to dribble with
1589 functions in other files than this one.(Except hash.c) So, if it's
1590 possible to make an iif for an other CPU, you don't need to know
1591 what frags, relax, obstacks, etc is in order to port this
1592 assembler. You only need to know if it's possible to reduce your
1593 cpu-instruction to iif-format (takes some work) and adopt the other
1594 md_? parts according to given instructions Note that iif was
1595 invented for the clean ns32k`s architecture. */
1596
1597/* GAS for the ns32k has a problem. PC relative displacements are
1598 relative to the address of the opcode, not the address of the
1599 operand. We used to keep track of the offset between the operand
1600 and the opcode in pcrel_adjust for each frag and each fix. However,
1601 we get into trouble where there are two or more pc-relative
1602 operands and the size of the first one can't be determined. Then in
1603 the relax phase, the size of the first operand will change and
1604 pcrel_adjust will no longer be correct. The current solution is
1605 keep a pointer to the frag with the opcode in it and the offset in
1606 that frag for each frag and each fix. Then, when needed, we can
1607 always figure out how far it is between the opcode and the pcrel
1608 object. See also md_pcrel_adjust and md_fix_pcrel_adjust. For
1609 objects not part of an instruction, the pointer to the opcode frag
1610 is always zero. */
1611
1612static void
1613convert_iif (void)
1614{
1615 int i;
1616 bit_fixS *j;
1617 fragS *inst_frag;
1618 unsigned int inst_offset;
1619 char *inst_opcode;
1620 char *memP;
1621 int l;
1622 int k;
1623 char type;
1624 char size = 0;
1625
1626 frag_grow (iif.instr_size); /* This is important. */
1627 memP = frag_more (0);
1628 inst_opcode = memP;
1629 inst_offset = (memP - frag_now->fr_literal);
1630 inst_frag = frag_now;
1631
1632 for (i = 0; i < IIF_ENTRIES; i++)
1633 {
1634 if ((type = iif.iifP[i].type))
1635 {
1636 /* The object exist, so handle it. */
1637 switch (size = iif.iifP[i].size)
1638 {
1639 case 42:
1640 size = 0;
1641 /* It's a bitfix that operates on an existing object. */
1642 if (iif.iifP[i].bit_fixP->fx_bit_base)
1643 /* Expand fx_bit_base to point at opcode. */
1644 iif.iifP[i].bit_fixP->fx_bit_base = (long) inst_opcode;
1645 /* Fall through. */
1646
1647 case 8: /* bignum or doublefloat. */
1648 case 1:
1649 case 2:
1650 case 3:
1651 case 4:
1652 /* The final size in objectmemory is known. */
1653 memP = frag_more (size);
1654 j = iif.iifP[i].bit_fixP;
1655
1656 switch (type)
1657 {
1658 case 1: /* The object is pure binary. */
1659 if (j)
1660 md_number_to_field (memP, exprP.X_add_number, j);
1661
1662 else if (iif.iifP[i].pcrel)
1663 fix_new_ns32k (frag_now,
1664 (long) (memP - frag_now->fr_literal),
1665 size,
1666 0,
1667 iif.iifP[i].object,
1668 iif.iifP[i].pcrel,
1669 iif.iifP[i].im_disp,
1670 0,
1671 iif.iifP[i].bsr, /* Sequent hack. */
1672 inst_frag, inst_offset);
1673 else
1674 {
1675 /* Good, just put them bytes out. */
1676 switch (iif.iifP[i].im_disp)
1677 {
1678 case 0:
1679 md_number_to_chars (memP, iif.iifP[i].object, size);
1680 break;
1681 case 1:
1682 md_number_to_disp (memP, iif.iifP[i].object, size);
1683 break;
1684 default:
1685 as_fatal (_("iif convert internal pcrel/binary"));
1686 }
1687 }
1688 break;
1689
1690 case 2:
1691 /* The object is a pointer at an expression, so
1692 unpack it, note that bignums may result from the
1693 expression. */
1694 evaluate_expr (&exprP, (char *) iif.iifP[i].object);
1695 if (exprP.X_op == O_big || size == 8)
1696 {
1697 if ((k = exprP.X_add_number) > 0)
1698 {
1699 /* We have a bignum ie a quad. This can only
1700 happens in a long suffixed instruction. */
1701 if (k * 2 > size)
1702 as_bad (_("Bignum too big for long"));
1703
1704 if (k == 3)
1705 memP += 2;
1706
1707 for (l = 0; k > 0; k--, l += 2)
1708 md_number_to_chars (memP + l,
1709 generic_bignum[l >> 1],
1710 sizeof (LITTLENUM_TYPE));
1711 }
1712 else
1713 {
1714 /* flonum. */
1715 LITTLENUM_TYPE words[4];
1716
1717 switch (size)
1718 {
1719 case 4:
1720 gen_to_words (words, 2, 8);
1721 md_number_to_imm (memP, (long) words[0],
1722 sizeof (LITTLENUM_TYPE));
1723 md_number_to_imm (memP + sizeof (LITTLENUM_TYPE),
1724 (long) words[1],
1725 sizeof (LITTLENUM_TYPE));
1726 break;
1727 case 8:
1728 gen_to_words (words, 4, 11);
1729 md_number_to_imm (memP, (long) words[0],
1730 sizeof (LITTLENUM_TYPE));
1731 md_number_to_imm (memP + sizeof (LITTLENUM_TYPE),
1732 (long) words[1],
1733 sizeof (LITTLENUM_TYPE));
1734 md_number_to_imm ((memP + 2
1735 * sizeof (LITTLENUM_TYPE)),
1736 (long) words[2],
1737 sizeof (LITTLENUM_TYPE));
1738 md_number_to_imm ((memP + 3
1739 * sizeof (LITTLENUM_TYPE)),
1740 (long) words[3],
1741 sizeof (LITTLENUM_TYPE));
1742 break;
1743 }
1744 }
1745 break;
1746 }
1747 if (exprP.X_add_symbol ||
1748 exprP.X_op_symbol ||
1749 iif.iifP[i].pcrel)
252b5132
RH
1750 {
1751 /* The expression was undefined due to an
1752 undefined label. Create a fix so we can fix
c6a7ab1f 1753 the object later. */
252b5132
RH
1754 exprP.X_add_number += iif.iifP[i].object_adjust;
1755 fix_new_ns32k_exp (frag_now,
1756 (long) (memP - frag_now->fr_literal),
1757 size,
1758 &exprP,
1759 iif.iifP[i].pcrel,
1760 iif.iifP[i].im_disp,
1761 j,
1762 iif.iifP[i].bsr,
1763 inst_frag, inst_offset);
1764 }
4eb6b71c 1765 else if (j)
ea1562b3 1766 md_number_to_field (memP, exprP.X_add_number, j);
252b5132
RH
1767 else
1768 {
c6a7ab1f 1769 /* Good, just put them bytes out. */
252b5132
RH
1770 switch (iif.iifP[i].im_disp)
1771 {
1772 case 0:
1773 md_number_to_imm (memP, exprP.X_add_number, size);
1774 break;
1775 case 1:
1776 md_number_to_disp (memP, exprP.X_add_number, size);
1777 break;
1778 default:
1779 as_fatal (_("iif convert internal pcrel/pointer"));
1780 }
1781 }
1782 break;
1783 default:
1784 as_fatal (_("Internal logic error in iif.iifP[n].type"));
1785 }
1786 break;
0b7410c4 1787
252b5132 1788 case 0:
c6a7ab1f 1789 /* Too bad, the object may be undefined as far as its
252b5132
RH
1790 final nsize in object memory is concerned. The size
1791 of the object in objectmemory is not explicitly
1792 given. If the object is defined its length can be
c6a7ab1f 1793 determined and a fix can replace the frag. */
252b5132
RH
1794 {
1795 evaluate_expr (&exprP, (char *) iif.iifP[i].object);
0b7410c4 1796
252b5132
RH
1797 if ((exprP.X_add_symbol || exprP.X_op_symbol) &&
1798 !iif.iifP[i].pcrel)
1799 {
4eb6b71c
NC
1800 /* Size is unknown until link time so have to default. */
1801 size = default_disp_size; /* Normally 4 bytes. */
07726851 1802 memP = frag_more (size);
252b5132
RH
1803 fix_new_ns32k_exp (frag_now,
1804 (long) (memP - frag_now->fr_literal),
1805 size,
1806 &exprP,
1807 0, /* never iif.iifP[i].pcrel, */
1808 1, /* always iif.iifP[i].im_disp */
1809 (bit_fixS *) 0, 0,
1810 inst_frag,
1811 inst_offset);
4eb6b71c 1812 break; /* Exit this absolute hack. */
252b5132
RH
1813 }
1814
1815 if (exprP.X_add_symbol || exprP.X_op_symbol)
c6a7ab1f
NC
1816 {
1817 /* Frag it. */
252b5132 1818 if (exprP.X_op_symbol)
ea1562b3
NC
1819 /* We cant relax this case. */
1820 as_fatal (_("Can't relax difference"));
252b5132
RH
1821 else
1822 {
c6a7ab1f
NC
1823 /* Size is not important. This gets fixed by
1824 relax, but we assume 0 in what follows. */
07726851 1825 memP = frag_more (4); /* Max size. */
252b5132
RH
1826 size = 0;
1827
1828 {
1829 fragS *old_frag = frag_now;
1830 frag_variant (rs_machine_dependent,
c6a7ab1f
NC
1831 4, /* Max size. */
1832 0, /* Size. */
1833 IND (BRANCH, UNDEF), /* Expecting
1834 the worst. */
252b5132
RH
1835 exprP.X_add_symbol,
1836 exprP.X_add_number,
1837 inst_opcode);
c6a7ab1f
NC
1838 frag_opcode_frag (old_frag) = inst_frag;
1839 frag_opcode_offset (old_frag) = inst_offset;
1840 frag_bsr (old_frag) = iif.iifP[i].bsr;
252b5132
RH
1841 }
1842 }
1843 }
1844 else
1845 {
c6a7ab1f 1846 /* This duplicates code in md_number_to_disp. */
252b5132 1847 if (-64 <= exprP.X_add_number && exprP.X_add_number <= 63)
ea1562b3 1848 size = 1;
252b5132
RH
1849 else
1850 {
1851 if (-8192 <= exprP.X_add_number
1852 && exprP.X_add_number <= 8191)
ea1562b3 1853 size = 2;
252b5132
RH
1854 else
1855 {
c6a7ab1f
NC
1856 if (-0x20000000 <= exprP.X_add_number
1857 && exprP.X_add_number<=0x1fffffff)
ea1562b3 1858 size = 4;
252b5132
RH
1859 else
1860 {
5091343a 1861 as_bad (_("Displacement too large for :d"));
252b5132
RH
1862 size = 4;
1863 }
1864 }
1865 }
0b7410c4 1866
c6a7ab1f 1867 memP = frag_more (size);
252b5132
RH
1868 md_number_to_disp (memP, exprP.X_add_number, size);
1869 }
1870 }
1871 break;
0b7410c4 1872
252b5132
RH
1873 default:
1874 as_fatal (_("Internal logic error in iif.iifP[].type"));
1875 }
1876 }
ea1562b3
NC
1877 }
1878}
1879\f
1880void
1881md_assemble (char *line)
1882{
1883 freeptr = freeptr_static;
1884 parse (line, 0); /* Explode line to more fix form in iif. */
1885 convert_iif (); /* Convert iif to frags, fix's etc. */
252b5132 1886#ifdef SHOW_NUM
ea1562b3 1887 printf (" \t\t\t%s\n", line);
252b5132 1888#endif
252b5132
RH
1889}
1890
ea1562b3
NC
1891void
1892md_begin (void)
252b5132 1893{
ea1562b3
NC
1894 /* Build a hashtable of the instructions. */
1895 const struct ns32k_opcode *ptr;
dfc4b250 1896 const char *status;
ea1562b3
NC
1897 const struct ns32k_opcode *endop;
1898
1899 inst_hash_handle = hash_new ();
1900
1901 endop = ns32k_opcodes + sizeof (ns32k_opcodes) / sizeof (ns32k_opcodes[0]);
1902 for (ptr = ns32k_opcodes; ptr < endop; ptr++)
252b5132 1903 {
dfc4b250 1904 if ((status = hash_insert (inst_hash_handle, ptr->name, (char *) ptr)))
ea1562b3 1905 /* Fatal. */
dfc4b250 1906 as_fatal (_("Can't hash %s: %s"), ptr->name, status);
252b5132 1907 }
ea1562b3
NC
1908
1909 /* Some private space please! */
325801bd 1910 freeptr_static = XNEWVEC (char, PRIVATE_SIZE);
252b5132
RH
1911}
1912
ea1562b3
NC
1913/* Turn the string pointed to by litP into a floating point constant
1914 of type TYPE, and emit the appropriate bytes. The number of
1915 LITTLENUMS emitted is stored in *SIZEP. An error message is
1916 returned, or NULL on OK. */
252b5132 1917
6d4af3c2 1918const char *
ea1562b3 1919md_atof (int type, char *litP, int *sizeP)
252b5132 1920{
499ac353 1921 return ieee_md_atof (type, litP, sizeP, FALSE);
ea1562b3
NC
1922}
1923\f
c6a7ab1f 1924int
ea1562b3 1925md_pcrel_adjust (fragS *fragP)
252b5132
RH
1926{
1927 fragS *opcode_frag;
1928 addressT opcode_address;
1929 unsigned int offset;
0b7410c4 1930
c6a7ab1f 1931 opcode_frag = frag_opcode_frag (fragP);
252b5132
RH
1932 if (opcode_frag == 0)
1933 return 0;
0b7410c4 1934
c6a7ab1f 1935 offset = frag_opcode_offset (fragP);
252b5132 1936 opcode_address = offset + opcode_frag->fr_address;
0b7410c4 1937
252b5132
RH
1938 return fragP->fr_address + fragP->fr_fix - opcode_address;
1939}
1940
4eb6b71c 1941static int
ea1562b3 1942md_fix_pcrel_adjust (fixS *fixP)
252b5132 1943{
252b5132
RH
1944 fragS *opcode_frag;
1945 addressT opcode_address;
1946 unsigned int offset;
0b7410c4 1947
c6a7ab1f 1948 opcode_frag = fix_opcode_frag (fixP);
252b5132
RH
1949 if (opcode_frag == 0)
1950 return 0;
0b7410c4 1951
c6a7ab1f 1952 offset = fix_opcode_offset (fixP);
252b5132 1953 opcode_address = offset + opcode_frag->fr_address;
0b7410c4 1954
252b5132
RH
1955 return fixP->fx_where + fixP->fx_frag->fr_address - opcode_address;
1956}
1957
1958/* Apply a fixS (fixup of an instruction or data that we didn't have
1959 enough info to complete immediately) to the data in a frag.
1960
1961 On the ns32k, everything is in a different format, so we have broken
1962 out separate functions for each kind of thing we could be fixing.
1963 They all get called from here. */
1964
252b5132 1965void
55cf6793 1966md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
252b5132 1967{
94f592af 1968 long val = * (long *) valP;
252b5132
RH
1969 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1970
c6a7ab1f 1971 if (fix_bit_fixP (fixP))
ea1562b3
NC
1972 /* Bitfields to fix, sigh. */
1973 md_number_to_field (buf, val, fix_bit_fixP (fixP));
94f592af
NC
1974 else switch (fix_im_disp (fixP))
1975 {
1976 case 0:
1977 /* Immediate field. */
1978 md_number_to_imm (buf, val, fixP->fx_size);
1979 break;
252b5132 1980
94f592af
NC
1981 case 1:
1982 /* Displacement field. */
4eb6b71c 1983 /* Calculate offset. */
94f592af
NC
1984 md_number_to_disp (buf,
1985 (fixP->fx_pcrel ? val + md_fix_pcrel_adjust (fixP)
1986 : val), fixP->fx_size);
1987 break;
1988
1989 case 2:
1990 /* Pointer in a data object. */
1991 md_number_to_chars (buf, val, fixP->fx_size);
1992 break;
1993 }
1994
1995 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1996 fixP->fx_done = 1;
252b5132
RH
1997}
1998\f
4eb6b71c 1999/* Convert a relaxed displacement to ditto in final output. */
252b5132 2000
252b5132 2001void
ea1562b3
NC
2002md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
2003 segT sec ATTRIBUTE_UNUSED,
2004 fragS *fragP)
252b5132
RH
2005{
2006 long disp;
2007 long ext = 0;
252b5132 2008 /* Address in gas core of the place to store the displacement. */
4eb6b71c 2009 char *buffer_address = fragP->fr_fix + fragP->fr_literal;
252b5132
RH
2010 /* Address in object code of the displacement. */
2011 int object_address;
2012
252b5132
RH
2013 switch (fragP->fr_subtype)
2014 {
2015 case IND (BRANCH, BYTE):
2016 ext = 1;
2017 break;
2018 case IND (BRANCH, WORD):
2019 ext = 2;
2020 break;
2021 case IND (BRANCH, DOUBLE):
2022 ext = 4;
2023 break;
2024 }
2025
c6a7ab1f 2026 if (ext == 0)
252b5132
RH
2027 return;
2028
2029 know (fragP->fr_symbol);
2030
2031 object_address = fragP->fr_fix + fragP->fr_address;
0b7410c4 2032
252b5132
RH
2033 /* The displacement of the address, from current location. */
2034 disp = (S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset) - object_address;
c6a7ab1f 2035 disp += md_pcrel_adjust (fragP);
252b5132
RH
2036
2037 md_number_to_disp (buffer_address, (long) disp, (int) ext);
2038 fragP->fr_fix += ext;
2039}
2040
2041/* This function returns the estimated size a variable object will occupy,
2042 one can say that we tries to guess the size of the objects before we
c6a7ab1f 2043 actually know it. */
252b5132
RH
2044
2045int
ea1562b3 2046md_estimate_size_before_relax (fragS *fragP, segT segment)
252b5132 2047{
606ab118 2048 if (fragP->fr_subtype == IND (BRANCH, UNDEF))
252b5132 2049 {
606ab118 2050 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
252b5132 2051 {
606ab118 2052 /* We don't relax symbols defined in another segment. The
c6a7ab1f 2053 thing to do is to assume the object will occupy 4 bytes. */
252b5132
RH
2054 fix_new_ns32k (fragP,
2055 (int) (fragP->fr_fix),
2056 4,
2057 fragP->fr_symbol,
2058 fragP->fr_offset,
2059 1,
2060 1,
2061 0,
4eb6b71c 2062 frag_bsr(fragP), /* Sequent hack. */
c6a7ab1f
NC
2063 frag_opcode_frag (fragP),
2064 frag_opcode_offset (fragP));
252b5132 2065 fragP->fr_fix += 4;
252b5132 2066 frag_wane (fragP);
606ab118 2067 return 4;
252b5132 2068 }
93c2a809 2069
606ab118
AM
2070 /* Relaxable case. Set up the initial guess for the variable
2071 part of the frag. */
2072 fragP->fr_subtype = IND (BRANCH, BYTE);
252b5132 2073 }
0b7410c4 2074
606ab118
AM
2075 if (fragP->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2076 abort ();
2077
2078 /* Return the size of the variable part of the frag. */
2079 return md_relax_table[fragP->fr_subtype].rlx_length;
252b5132
RH
2080}
2081
2082int md_short_jump_size = 3;
2083int md_long_jump_size = 5;
252b5132
RH
2084
2085void
ea1562b3
NC
2086md_create_short_jump (char *ptr,
2087 addressT from_addr,
2088 addressT to_addr,
2089 fragS *frag ATTRIBUTE_UNUSED,
2090 symbolS *to_symbol ATTRIBUTE_UNUSED)
252b5132
RH
2091{
2092 valueT offset;
2093
2094 offset = to_addr - from_addr;
2095 md_number_to_chars (ptr, (valueT) 0xEA, 1);
2096 md_number_to_disp (ptr + 1, (valueT) offset, 2);
2097}
2098
2099void
ea1562b3
NC
2100md_create_long_jump (char *ptr,
2101 addressT from_addr,
2102 addressT to_addr,
2103 fragS *frag ATTRIBUTE_UNUSED,
2104 symbolS *to_symbol ATTRIBUTE_UNUSED)
252b5132
RH
2105{
2106 valueT offset;
2107
2108 offset = to_addr - from_addr;
2109 md_number_to_chars (ptr, (valueT) 0xEA, 1);
2110 md_number_to_disp (ptr + 1, (valueT) offset, 4);
2111}
2112\f
5a38dc70 2113const char *md_shortopts = "m:";
c6a7ab1f
NC
2114
2115struct option md_longopts[] =
2116{
4eb6b71c
NC
2117#define OPTION_DISP_SIZE (OPTION_MD_BASE)
2118 {"disp-size-default", required_argument , NULL, OPTION_DISP_SIZE},
252b5132
RH
2119 {NULL, no_argument, NULL, 0}
2120};
c6a7ab1f
NC
2121
2122size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
2123
2124int
17b9d67d 2125md_parse_option (int c, const char *arg)
252b5132
RH
2126{
2127 switch (c)
2128 {
2129 case 'm':
2130 if (!strcmp (arg, "32032"))
2131 {
2132 cpureg = cpureg_032;
2133 mmureg = mmureg_032;
2134 }
2135 else if (!strcmp (arg, "32532"))
2136 {
2137 cpureg = cpureg_532;
2138 mmureg = mmureg_532;
2139 }
2140 else
2141 {
4eb6b71c 2142 as_warn (_("invalid architecture option -m%s, ignored"), arg);
252b5132
RH
2143 return 0;
2144 }
2145 break;
4eb6b71c
NC
2146 case OPTION_DISP_SIZE:
2147 {
2148 int size = atoi(arg);
2149 switch (size)
2150 {
2151 case 1: case 2: case 4:
2152 default_disp_size = size;
2153 break;
2154 default:
2155 as_warn (_("invalid default displacement size \"%s\". Defaulting to %d."),
2156 arg, default_disp_size);
2157 }
2158 break;
2159 }
252b5132
RH
2160
2161 default:
2162 return 0;
2163 }
2164
2165 return 1;
2166}
2167
2168void
ea1562b3 2169md_show_usage (FILE *stream)
252b5132 2170{
c6a7ab1f 2171 fprintf (stream, _("\
252b5132 2172NS32K options:\n\
4eb6b71c
NC
2173-m32032 | -m32532 select variant of NS32K architecture\n\
2174--disp-size-default=<1|2|4>\n"));
252b5132 2175}
252b5132 2176\f
252b5132
RH
2177/* This is TC_CONS_FIX_NEW, called by emit_expr in read.c. */
2178
2179void
ea1562b3
NC
2180cons_fix_new_ns32k (fragS *frag, /* Which frag? */
2181 int where, /* Where in that frag? */
2182 int size, /* 1, 2 or 4 usually. */
62ebcb5c
AM
2183 expressionS *exp, /* Expression. */
2184 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
252b5132
RH
2185{
2186 fix_new_ns32k_exp (frag, where, size, exp,
2187 0, 2, 0, 0, 0, 0);
2188}
2189
2190/* We have no need to default values of symbols. */
2191
2192symbolS *
ea1562b3 2193md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH
2194{
2195 return 0;
2196}
2197
2198/* Round up a section size to the appropriate boundary. */
c6a7ab1f 2199
252b5132 2200valueT
ea1562b3 2201md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size)
252b5132 2202{
c6a7ab1f 2203 return size; /* Byte alignment is fine. */
252b5132
RH
2204}
2205
2206/* Exactly what point is a PC-relative offset relative TO? On the
c6a7ab1f
NC
2207 ns32k, they're relative to the start of the instruction. */
2208
252b5132 2209long
ea1562b3 2210md_pcrel_from (fixS *fixP)
252b5132
RH
2211{
2212 long res;
4eb6b71c 2213
252b5132
RH
2214 res = fixP->fx_where + fixP->fx_frag->fr_address;
2215#ifdef SEQUENT_COMPATABILITY
c6a7ab1f
NC
2216 if (frag_bsr (fixP->fx_frag))
2217 res += 0x12 /* FOO Kludge alert! */
252b5132
RH
2218#endif
2219 return res;
2220}
2221
252b5132 2222arelent *
ea1562b3 2223tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH
2224{
2225 arelent *rel;
2226 bfd_reloc_code_real_type code;
2227
c6a7ab1f 2228 code = reloc (fixp->fx_size, fixp->fx_pcrel, fix_im_disp (fixp));
252b5132 2229
325801bd
TS
2230 rel = XNEW (arelent);
2231 rel->sym_ptr_ptr = XNEW (asymbol *);
310b5aa2 2232 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2233 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2234 if (fixp->fx_pcrel)
2235 rel->addend = fixp->fx_addnumber;
2236 else
2237 rel->addend = 0;
2238
2239 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
2240 if (!rel->howto)
2241 {
2242 const char *name;
2243
2244 name = S_GET_NAME (fixp->fx_addsy);
2245 if (name == NULL)
2246 name = _("<unknown>");
2247 as_fatal (_("Cannot find relocation type for symbol %s, code %d"),
2248 name, (int) code);
2249 }
2250
2251 return rel;
2252}
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