sim: h8300 special case test
[deliverable/binutils-gdb.git] / gas / config / tc-pdp11.c
CommitLineData
e135f41b 1/* tc-pdp11.c - pdp11-specific -
250d07de 2 Copyright (C) 2001-2021 Free Software Foundation, Inc.
e135f41b
NC
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
e135f41b
NC
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
bb0a86e1
NC
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
e135f41b 20
e135f41b 21#include "as.h"
3882b010 22#include "safe-ctype.h"
e135f41b
NC
23#include "opcode/pdp11.h"
24
4d5f9b2a 25extern int flonum_gen2vax (int, FLONUM_TYPE * f, LITTLENUM_TYPE *);
cd3cde86 26
4d5f9b2a 27/* A representation for PDP-11 machine code. */
e135f41b
NC
28struct pdp11_code
29{
6d4af3c2 30 const char *error;
e135f41b 31 int code;
4d5f9b2a
NC
32 int additional; /* Is there an additional word? */
33 int word; /* Additional word, if any. */
e135f41b
NC
34 struct
35 {
36 bfd_reloc_code_real_type type;
37 expressionS exp;
38 int pc_rel;
39 } reloc;
40};
41
4d5f9b2a
NC
42/* Instruction set extensions.
43
44 If you change this from an array to something else, please update
45 the "PDP-11 instruction set extensions" comment in pdp11.h. */
e135f41b
NC
46int pdp11_extension[PDP11_EXT_NUM];
47
4d5f9b2a 48/* Assembly options. */
e135f41b
NC
49
50#define ASM_OPT_PIC 1
51#define ASM_OPT_NUM 2
52
53int asm_option[ASM_OPT_NUM];
54
55/* These chars start a comment anywhere in a source file (except inside
4d5f9b2a 56 another comment. */
5a38dc70 57const char comment_chars[] = "#/";
e135f41b 58
5cd4edbe 59/* These chars only start a comment at the beginning of a line. */
5a38dc70 60const char line_comment_chars[] = "#/";
e135f41b 61
5a38dc70 62const char line_separator_chars[] = ";";
e135f41b 63
4d5f9b2a 64/* Chars that can be used to separate mant from exp in floating point nums. */
5a38dc70 65const char EXP_CHARS[] = "eE";
e135f41b 66
4d5f9b2a
NC
67/* Chars that mean this number is a floating point constant. */
68/* as in 0f123.456. */
69/* or 0H1.234E-12 (see exp chars above). */
5a38dc70 70const char FLT_CHARS[] = "dDfF";
e135f41b
NC
71
72void pseudo_even (int);
73void pseudo_bss (int);
74
5a38dc70 75const pseudo_typeS md_pseudo_table[] =
e135f41b
NC
76{
77 { "bss", pseudo_bss, 0 },
78 { "even", pseudo_even, 0 },
79 { 0, 0, 0 },
80};
81
629310ab 82static htab_t insn_hash = NULL;
4d5f9b2a
NC
83\f
84static int
17b9d67d 85set_option (const char *arg)
4d5f9b2a
NC
86{
87 int yes = 1;
88
89 if (strcmp (arg, "all-extensions") == 0
90 || strcmp (arg, "all") == 0)
91 {
92 memset (pdp11_extension, ~0, sizeof pdp11_extension);
93 pdp11_extension[PDP11_NONE] = 0;
94 return 1;
95 }
96 else if (strcmp (arg, "no-extensions") == 0)
97 {
98 memset (pdp11_extension, 0, sizeof pdp11_extension);
99 pdp11_extension[PDP11_BASIC] = 1;
100 return 1;
101 }
102
d34049e8 103 if (startswith (arg, "no-"))
4d5f9b2a
NC
104 {
105 yes = 0;
106 arg += 3;
107 }
108
33eaf5de 109 /* Commercial instructions. */
4d5f9b2a
NC
110 if (strcmp (arg, "cis") == 0)
111 pdp11_extension[PDP11_CIS] = yes;
112 /* Call supervisor mode. */
113 else if (strcmp (arg, "csm") == 0)
114 pdp11_extension[PDP11_CSM] = yes;
115 /* Extended instruction set. */
116 else if (strcmp (arg, "eis") == 0)
117 pdp11_extension[PDP11_EIS] = pdp11_extension[PDP11_LEIS] = yes;
118 /* KEV11 floating-point. */
119 else if (strcmp (arg, "fis") == 0
120 || strcmp (arg, "kev11") == 0
121 || strcmp (arg, "kev-11") == 0)
122 pdp11_extension[PDP11_FIS] = yes;
123 /* FP-11 floating-point. */
124 else if (strcmp (arg, "fpp") == 0
125 || strcmp (arg, "fpu") == 0
126 || strcmp (arg, "fp11") == 0
127 || strcmp (arg, "fp-11") == 0
128 || strcmp (arg, "fpj11") == 0
129 || strcmp (arg, "fp-j11") == 0
130 || strcmp (arg, "fpj-11") == 0)
131 pdp11_extension[PDP11_FPP] = yes;
132 /* Limited extended insns. */
133 else if (strcmp (arg, "limited-eis") == 0)
134 {
135 pdp11_extension[PDP11_LEIS] = yes;
136 if (!pdp11_extension[PDP11_LEIS])
137 pdp11_extension[PDP11_EIS] = 0;
138 }
139 /* Move from processor type. */
140 else if (strcmp (arg, "mfpt") == 0)
141 pdp11_extension[PDP11_MFPT] = yes;
142 /* Multiprocessor insns: */
d34049e8 143 else if (startswith (arg, "mproc")
4d5f9b2a 144 /* TSTSET, WRTLCK */
d34049e8 145 || startswith (arg, "multiproc"))
4d5f9b2a
NC
146 pdp11_extension[PDP11_MPROC] = yes;
147 /* Move from/to proc status. */
148 else if (strcmp (arg, "mxps") == 0)
149 pdp11_extension[PDP11_MXPS] = yes;
150 /* Position-independent code. */
151 else if (strcmp (arg, "pic") == 0)
152 asm_option[ASM_OPT_PIC] = yes;
153 /* Set priority level. */
154 else if (strcmp (arg, "spl") == 0)
155 pdp11_extension[PDP11_SPL] = yes;
156 /* Microcode instructions: */
157 else if (strcmp (arg, "ucode") == 0
158 /* LDUB, MED, XFC */
159 || strcmp (arg, "microcode") == 0)
160 pdp11_extension[PDP11_UCODE] = yes;
161 else
162 return 0;
163
164 return 1;
165}
166
167
e135f41b 168static void
4d5f9b2a 169init_defaults (void)
e135f41b
NC
170{
171 static int first = 1;
172
173 if (first)
174 {
175 set_option ("all-extensions");
176 set_option ("pic");
177 first = 0;
178 }
179}
180
e135f41b 181void
4d5f9b2a 182md_begin (void)
e135f41b
NC
183{
184 int i;
185
186 init_defaults ();
187
629310ab 188 insn_hash = str_htab_create ();
5cd4edbe 189
e135f41b 190 for (i = 0; i < pdp11_num_opcodes; i++)
fe0e921f 191 str_hash_insert (insn_hash, pdp11_opcodes[i].name, pdp11_opcodes + i, 0);
e135f41b 192 for (i = 0; i < pdp11_num_aliases; i++)
fe0e921f 193 str_hash_insert (insn_hash, pdp11_aliases[i].name, pdp11_aliases + i, 0);
e135f41b
NC
194}
195
196void
4d5f9b2a 197md_number_to_chars (char con[], valueT value, int nbytes)
e135f41b
NC
198{
199 /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
4d5f9b2a 200 0x12345678 is stored as "\x56\x78\x12\x34". It's
33eaf5de 201 anyone's guess what 0x123456 would be stored like. */
e135f41b
NC
202
203 switch (nbytes)
204 {
205 case 0:
206 break;
207 case 1:
208 con[0] = value & 0xff;
209 break;
210 case 2:
4d5f9b2a 211 con[0] = value & 0xff;
e135f41b
NC
212 con[1] = (value >> 8) & 0xff;
213 break;
214 case 4:
215 con[0] = (value >> 16) & 0xff;
216 con[1] = (value >> 24) & 0xff;
4d5f9b2a 217 con[2] = value & 0xff;
e135f41b
NC
218 con[3] = (value >> 8) & 0xff;
219 break;
f6e6b052 220#ifdef BFD64
66e3eb08
SC
221 case 8:
222 con[0] = (value >> 48) & 0xff;
223 con[1] = (value >> 56) & 0xff;
224 con[2] = (value >> 32) & 0xff;
225 con[3] = (value >> 40) & 0xff;
226 con[4] = (value >> 16) & 0xff;
227 con[5] = (value >> 24) & 0xff;
228 con[6] = value & 0xff;
229 con[7] = (value >> 8) & 0xff;
230 break;
f6e6b052 231#endif
e135f41b
NC
232 default:
233 BAD_CASE (nbytes);
5cd4edbe 234 }
e135f41b
NC
235}
236
237/* Fix up some data or instructions after we find out the value of a symbol
94f592af 238 that they reference. Knows about order of bytes in address. */
e135f41b 239
94f592af 240void
55cf6793 241md_apply_fix (fixS *fixP,
4d5f9b2a
NC
242 valueT * valP,
243 segT seg ATTRIBUTE_UNUSED)
e135f41b
NC
244{
245 valueT code;
246 valueT mask;
94f592af 247 valueT val = * valP;
e135f41b
NC
248 char *buf;
249 int shift;
250 int size;
251
252 buf = fixP->fx_where + fixP->fx_frag->fr_literal;
253 size = fixP->fx_size;
3ec2b351 254 code = md_chars_to_number ((unsigned char *) buf, size);
e135f41b
NC
255
256 switch (fixP->fx_r_type)
257 {
7553c869
AM
258 case BFD_RELOC_8:
259 mask = 0xff;
260 shift = 0;
261 break;
e135f41b
NC
262 case BFD_RELOC_16:
263 case BFD_RELOC_16_PCREL:
264 mask = 0xffff;
265 shift = 0;
266 break;
10a95fcc
AM
267 case BFD_RELOC_32:
268 mask = 0xffffffff;
269 shift = 0;
270 break;
e135f41b
NC
271 case BFD_RELOC_PDP11_DISP_8_PCREL:
272 mask = 0x00ff;
273 shift = 1;
274 break;
275 case BFD_RELOC_PDP11_DISP_6_PCREL:
276 mask = 0x003f;
277 shift = 1;
14127cc4 278 val = -val;
e135f41b
NC
279 break;
280 default:
281 BAD_CASE (fixP->fx_r_type);
282 }
283
284 if (fixP->fx_addsy != NULL)
94f592af 285 val += symbol_get_bfdsym (fixP->fx_addsy)->section->vma;
e135f41b
NC
286 /* *value += fixP->fx_addsy->bsym->section->vma; */
287
288 code &= ~mask;
94f592af 289 code |= (val >> shift) & mask;
e135f41b 290 number_to_chars_littleendian (buf, code, size);
94f592af
NC
291
292 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
293 fixP->fx_done = 1;
e135f41b
NC
294}
295
296long
e046cf80 297md_chars_to_number (unsigned char *con, int nbytes)
e135f41b
NC
298{
299 /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
4d5f9b2a 300 0x12345678 is stored as "\x56\x78\x12\x34". It's
33eaf5de 301 anyone's guess what 0x123456 would be stored like. */
e135f41b
NC
302 switch (nbytes)
303 {
304 case 0:
305 return 0;
306 case 1:
307 return con[0];
308 case 2:
309 return (con[1] << BITS_PER_CHAR) | con[0];
310 case 4:
311 return
4d5f9b2a
NC
312 (((con[1] << BITS_PER_CHAR) | con[0]) << (2 * BITS_PER_CHAR))
313 |((con[3] << BITS_PER_CHAR) | con[2]);
e135f41b
NC
314 default:
315 BAD_CASE (nbytes);
316 return 0;
5cd4edbe 317 }
e135f41b
NC
318}
319\f
320static char *
321skip_whitespace (char *str)
322{
323 while (*str == ' ' || *str == '\t')
324 str++;
325 return str;
326}
327
328static char *
329find_whitespace (char *str)
330{
331 while (*str != ' ' && *str != '\t' && *str != 0)
332 str++;
333 return str;
334}
335
e135f41b
NC
336static char *
337parse_reg (char *str, struct pdp11_code *operand)
338{
339 str = skip_whitespace (str);
3882b010 340 if (TOLOWER (*str) == 'r')
e135f41b
NC
341 {
342 str++;
343 switch (*str)
344 {
345 case '0': case '1': case '2': case '3':
346 case '4': case '5': case '6': case '7':
347 operand->code = *str - '0';
348 str++;
349 break;
350 default:
20203fb9 351 operand->error = _("Bad register name");
e135f41b
NC
352 return str - 1;
353 }
354 }
d34049e8
ML
355 else if (startswith (str, "sp")
356 || startswith (str, "SP"))
e135f41b
NC
357 {
358 operand->code = 6;
359 str += 2;
360 }
d34049e8
ML
361 else if (startswith (str, "pc")
362 || startswith (str, "PC"))
e135f41b
NC
363 {
364 operand->code = 7;
365 str += 2;
366 }
367 else
1c912705
SC
368 {
369 operand->error = _("Bad register name");
370 return str;
371 }
e135f41b 372
1c912705
SC
373 if (ISALNUM (*str) || *str == '_' || *str == '.')
374 {
375 operand->error = _("Bad register name");
376 str -= 2;
377 }
378
e135f41b
NC
379 return str;
380}
381
382static char *
cd3cde86 383parse_ac5 (char *str, struct pdp11_code *operand)
e135f41b
NC
384{
385 str = skip_whitespace (str);
d34049e8
ML
386 if (startswith (str, "fr")
387 || startswith (str, "FR")
388 || startswith (str, "ac")
389 || startswith (str, "AC"))
e135f41b
NC
390 {
391 str += 2;
392 switch (*str)
393 {
394 case '0': case '1': case '2': case '3':
cd3cde86 395 case '4': case '5':
e135f41b
NC
396 operand->code = *str - '0';
397 str++;
398 break;
399 default:
20203fb9 400 operand->error = _("Bad register name");
e135f41b
NC
401 return str - 2;
402 }
403 }
404 else
405 {
20203fb9 406 operand->error = _("Bad register name");
e135f41b
NC
407 return str;
408 }
409
410 return str;
411}
412
cd3cde86
AM
413static char *
414parse_ac (char *str, struct pdp11_code *operand)
415{
416 str = parse_ac5 (str, operand);
417 if (!operand->error && operand->code > 3)
418 {
20203fb9 419 operand->error = _("Bad register name");
cd3cde86
AM
420 return str - 3;
421 }
422
423 return str;
424}
425
e135f41b
NC
426static char *
427parse_expression (char *str, struct pdp11_code *operand)
428{
429 char *save_input_line_pointer;
430 segT seg;
431
432 save_input_line_pointer = input_line_pointer;
433 input_line_pointer = str;
434 seg = expression (&operand->reloc.exp);
435 if (seg == NULL)
436 {
437 input_line_pointer = save_input_line_pointer;
20203fb9 438 operand->error = _("Error in expression");
e135f41b
NC
439 return str;
440 }
441
442 str = input_line_pointer;
443 input_line_pointer = save_input_line_pointer;
444
445 operand->reloc.pc_rel = 0;
446
e135f41b
NC
447 return str;
448}
449
450static char *
451parse_op_no_deferred (char *str, struct pdp11_code *operand)
452{
cd3cde86
AM
453 LITTLENUM_TYPE literal_float[2];
454
e135f41b
NC
455 str = skip_whitespace (str);
456
457 switch (*str)
458 {
459 case '(': /* (rn) and (rn)+ */
460 str = parse_reg (str + 1, operand);
461 if (operand->error)
462 return str;
463 str = skip_whitespace (str);
464 if (*str != ')')
465 {
20203fb9 466 operand->error = _("Missing ')'");
e135f41b
NC
467 return str;
468 }
469 str++;
470 if (*str == '+')
471 {
472 operand->code |= 020;
473 str++;
474 }
475 else
476 {
477 operand->code |= 010;
478 }
479 break;
480
4d5f9b2a
NC
481 /* Immediate. */
482 case '#':
5cd4edbe 483 case '$':
e135f41b
NC
484 str = parse_expression (str + 1, operand);
485 if (operand->error)
486 return str;
5b7c81bd 487 operand->additional = true;
e135f41b
NC
488 operand->word = operand->reloc.exp.X_add_number;
489 switch (operand->reloc.exp.X_op)
490 {
491 case O_constant:
492 break;
493 case O_symbol:
494 case O_add:
495 case O_subtract:
496 operand->reloc.type = BFD_RELOC_16;
497 operand->reloc.pc_rel = 0;
498 break;
cd3cde86
AM
499 case O_big:
500 if (operand->reloc.exp.X_add_number > 0)
501 {
20203fb9 502 operand->error = _("Error in expression");
cd3cde86
AM
503 break;
504 }
4d5f9b2a 505 /* It's a floating literal... */
cd3cde86
AM
506 know (operand->reloc.exp.X_add_number < 0);
507 flonum_gen2vax ('f', &generic_floating_point_number, literal_float);
508 operand->word = literal_float[0];
509 if (literal_float[1] != 0)
510 as_warn (_("Low order bits truncated in immediate float operand"));
511 break;
e135f41b 512 default:
20203fb9 513 operand->error = _("Error in expression");
e135f41b
NC
514 break;
515 }
516 operand->code = 027;
517 break;
518
4d5f9b2a
NC
519 /* label, d(rn), -(rn) */
520 default:
e135f41b 521 {
d34049e8 522 if (startswith (str, "-(")) /* -(rn) */
e135f41b
NC
523 {
524 str = parse_reg (str + 2, operand);
525 if (operand->error)
526 return str;
527 str = skip_whitespace (str);
528 if (*str != ')')
529 {
20203fb9 530 operand->error = _("Missing ')'");
e135f41b
NC
531 return str;
532 }
533 operand->code |= 040;
534 str++;
535 break;
536 }
537
538 str = parse_expression (str, operand);
539 if (operand->error)
540 return str;
541
542 str = skip_whitespace (str);
543
4d5f9b2a 544 if (*str != '(')
e135f41b 545 {
e135f41b
NC
546 operand->code = 067;
547 operand->additional = 1;
548 operand->word = 0;
549 operand->reloc.type = BFD_RELOC_16_PCREL;
550 operand->reloc.pc_rel = 1;
551 break;
552 }
553
4d5f9b2a
NC
554 /* d(rn) */
555 str++;
e135f41b
NC
556 str = parse_reg (str, operand);
557 if (operand->error)
558 return str;
559
560 str = skip_whitespace (str);
561
562 if (*str != ')')
563 {
20203fb9 564 operand->error = _("Missing ')'");
e135f41b
NC
565 return str;
566 }
567
568 str++;
5b7c81bd 569 operand->additional = true;
e135f41b
NC
570 operand->code |= 060;
571 switch (operand->reloc.exp.X_op)
572 {
573 case O_symbol:
bb0a86e1
NC
574 operand->reloc.type = BFD_RELOC_16;
575 operand->reloc.pc_rel = 0;
e135f41b
NC
576 break;
577 case O_constant:
578 if ((operand->code & 7) == 7)
579 {
580 operand->reloc.pc_rel = 1;
581 operand->word = operand->reloc.exp.X_add_number;
582 }
583 else
4d5f9b2a
NC
584 operand->word = operand->reloc.exp.X_add_number;
585
e135f41b
NC
586 break;
587 default:
588 BAD_CASE (operand->reloc.exp.X_op);
589 }
590 break;
591 }
592 }
593
594 return str;
595}
596
597static char *
cd3cde86 598parse_op_noreg (char *str, struct pdp11_code *operand)
e135f41b
NC
599{
600 str = skip_whitespace (str);
e135f41b
NC
601 operand->error = NULL;
602
603 if (*str == '@' || *str == '*')
604 {
3cf2b669
JPC
605 /* @(Rn) == @0(Rn): Mode 7, Indexed deferred.
606 Check for auto-increment deferred. */
607 if (str[1] == '('
608 && str[2] != 0
609 && str[3] != 0
610 && str[4] != 0
611 && str[5] != '+')
612 {
613 /* Change implied to explicit index deferred. */
614 *str = '0';
615 str = parse_op_no_deferred (str, operand);
616 }
617 else
8f9ea98b
JPC
618 {
619 /* @Rn == (Rn): Register deferred. */
620 str = parse_reg (str + 1, operand);
621
622 /* Not @Rn */
623 if (operand->error)
624 {
625 operand->error = NULL;
626 str = parse_op_no_deferred (str, operand);
627 }
628 }
3cf2b669 629
e135f41b
NC
630 if (operand->error)
631 return str;
8f9ea98b 632
e135f41b
NC
633 operand->code |= 010;
634 }
635 else
636 str = parse_op_no_deferred (str, operand);
637
638 return str;
639}
640
cd3cde86
AM
641static char *
642parse_op (char *str, struct pdp11_code *operand)
643{
644 str = skip_whitespace (str);
645
646 str = parse_reg (str, operand);
647 if (!operand->error)
648 return str;
649
650 operand->error = NULL;
651 parse_ac5 (str, operand);
652 if (!operand->error)
653 {
20203fb9 654 operand->error = _("Float AC not legal as integer operand");
cd3cde86
AM
655 return str;
656 }
5d6255fe 657
cd3cde86
AM
658 return parse_op_noreg (str, operand);
659}
660
661static char *
662parse_fop (char *str, struct pdp11_code *operand)
663{
664 str = skip_whitespace (str);
665
666 str = parse_ac5 (str, operand);
667 if (!operand->error)
668 return str;
669
670 operand->error = NULL;
671 parse_reg (str, operand);
672 if (!operand->error)
673 {
20203fb9 674 operand->error = _("General register not legal as float operand");
cd3cde86
AM
675 return str;
676 }
677
678 return parse_op_noreg (str, operand);
679}
680
e135f41b
NC
681static char *
682parse_separator (char *str, int *error)
683{
684 str = skip_whitespace (str);
685 *error = (*str != ',');
686 if (!*error)
687 str++;
688 return str;
689}
690
691void
4d5f9b2a 692md_assemble (char *instruction_string)
e135f41b 693{
5a38dc70 694 const struct pdp11_opcode *op;
e135f41b
NC
695 struct pdp11_code insn, op1, op2;
696 int error;
697 int size;
6d4af3c2 698 const char *err = NULL;
e135f41b
NC
699 char *str;
700 char *p;
701 char c;
702
703 str = skip_whitespace (instruction_string);
704 p = find_whitespace (str);
705 if (p - str == 0)
706 {
20203fb9 707 as_bad (_("No instruction found"));
e135f41b
NC
708 return;
709 }
710
711 c = *p;
712 *p = '\0';
629310ab 713 op = (struct pdp11_opcode *)str_hash_find (insn_hash, str);
e135f41b
NC
714 *p = c;
715 if (op == 0)
716 {
cd3cde86 717 as_bad (_("Unknown instruction '%s'"), str);
e135f41b
NC
718 return;
719 }
720
721 if (!pdp11_extension[op->extension])
722 {
20203fb9 723 as_warn (_("Unsupported instruction set extension: %s"), op->name);
e135f41b
NC
724 return;
725 }
726
727 insn.error = NULL;
728 insn.code = op->opcode;
729 insn.reloc.type = BFD_RELOC_NONE;
730 op1.error = NULL;
5b7c81bd 731 op1.additional = false;
e135f41b
NC
732 op1.reloc.type = BFD_RELOC_NONE;
733 op2.error = NULL;
5b7c81bd 734 op2.additional = false;
e135f41b
NC
735 op2.reloc.type = BFD_RELOC_NONE;
736
737 str = p;
738 size = 2;
739
740 switch (op->type)
741 {
742 case PDP11_OPCODE_NO_OPS:
743 str = skip_whitespace (str);
e135f41b
NC
744 break;
745
746 case PDP11_OPCODE_IMM3:
747 case PDP11_OPCODE_IMM6:
748 case PDP11_OPCODE_IMM8:
749 str = skip_whitespace (str);
750 if (*str == '#' || *str == '$')
751 str++;
752 str = parse_expression (str, &op1);
753 if (op1.error)
754 break;
cd3cde86
AM
755 if (op1.reloc.exp.X_op != O_constant || op1.reloc.type != BFD_RELOC_NONE)
756 {
20203fb9 757 op1.error = _("operand is not an absolute constant");
cd3cde86
AM
758 break;
759 }
e135f41b
NC
760 switch (op->type)
761 {
762 case PDP11_OPCODE_IMM3:
cd3cde86 763 if (op1.reloc.exp.X_add_number & ~7)
e135f41b 764 {
20203fb9 765 op1.error = _("3-bit immediate out of range");
e135f41b
NC
766 break;
767 }
768 break;
769 case PDP11_OPCODE_IMM6:
cd3cde86 770 if (op1.reloc.exp.X_add_number & ~0x3f)
e135f41b 771 {
20203fb9 772 op1.error = _("6-bit immediate out of range");
e135f41b
NC
773 break;
774 }
775 break;
776 case PDP11_OPCODE_IMM8:
cd3cde86 777 if (op1.reloc.exp.X_add_number & ~0xff)
e135f41b 778 {
20203fb9 779 op1.error = _("8-bit immediate out of range");
e135f41b
NC
780 break;
781 }
782 break;
783 }
cd3cde86 784 insn.code |= op1.reloc.exp.X_add_number;
e135f41b
NC
785 break;
786
787 case PDP11_OPCODE_DISPL:
788 {
d3ce72d0
NC
789 char *new_pointer;
790 new_pointer = parse_expression (str, &op1);
e135f41b
NC
791 op1.code = 0;
792 op1.reloc.pc_rel = 1;
793 op1.reloc.type = BFD_RELOC_PDP11_DISP_8_PCREL;
794 if (op1.reloc.exp.X_op != O_symbol)
795 {
20203fb9 796 op1.error = _("Symbol expected");
e135f41b
NC
797 break;
798 }
799 if (op1.code & ~0xff)
800 {
20203fb9 801 err = _("8-bit displacement out of range");
e135f41b
NC
802 break;
803 }
d3ce72d0 804 str = new_pointer;
e135f41b
NC
805 insn.code |= op1.code;
806 insn.reloc = op1.reloc;
807 }
808 break;
809
810 case PDP11_OPCODE_REG:
811 str = parse_reg (str, &op1);
812 if (op1.error)
813 break;
814 insn.code |= op1.code;
815 break;
816
817 case PDP11_OPCODE_OP:
818 str = parse_op (str, &op1);
819 if (op1.error)
820 break;
821 insn.code |= op1.code;
822 if (op1.additional)
823 size += 2;
824 break;
825
cd3cde86
AM
826 case PDP11_OPCODE_FOP:
827 str = parse_fop (str, &op1);
828 if (op1.error)
829 break;
830 insn.code |= op1.code;
831 if (op1.additional)
832 size += 2;
833 break;
834
e135f41b
NC
835 case PDP11_OPCODE_REG_OP:
836 str = parse_reg (str, &op2);
837 if (op2.error)
838 break;
839 insn.code |= op2.code << 6;
840 str = parse_separator (str, &error);
841 if (error)
842 {
20203fb9 843 op2.error = _("Missing ','");
e135f41b
NC
844 break;
845 }
846 str = parse_op (str, &op1);
847 if (op1.error)
848 break;
849 insn.code |= op1.code;
850 if (op1.additional)
851 size += 2;
852 break;
853
854 case PDP11_OPCODE_REG_OP_REV:
855 str = parse_op (str, &op1);
856 if (op1.error)
857 break;
858 insn.code |= op1.code;
859 if (op1.additional)
860 size += 2;
861 str = parse_separator (str, &error);
862 if (error)
863 {
20203fb9 864 op2.error = _("Missing ','");
e135f41b
NC
865 break;
866 }
867 str = parse_reg (str, &op2);
868 if (op2.error)
869 break;
870 insn.code |= op2.code << 6;
871 break;
872
cd3cde86
AM
873 case PDP11_OPCODE_AC_FOP:
874 str = parse_ac (str, &op2);
875 if (op2.error)
876 break;
877 insn.code |= op2.code << 6;
878 str = parse_separator (str, &error);
879 if (error)
880 {
20203fb9 881 op1.error = _("Missing ','");
cd3cde86
AM
882 break;
883 }
884 str = parse_fop (str, &op1);
885 if (op1.error)
886 break;
887 insn.code |= op1.code;
888 if (op1.additional)
889 size += 2;
890 break;
891
892 case PDP11_OPCODE_FOP_AC:
893 str = parse_fop (str, &op1);
894 if (op1.error)
895 break;
896 insn.code |= op1.code;
897 if (op1.additional)
898 size += 2;
899 str = parse_separator (str, &error);
900 if (error)
901 {
20203fb9 902 op1.error = _("Missing ','");
cd3cde86
AM
903 break;
904 }
905 str = parse_ac (str, &op2);
906 if (op2.error)
907 break;
908 insn.code |= op2.code << 6;
909 break;
910
e135f41b
NC
911 case PDP11_OPCODE_AC_OP:
912 str = parse_ac (str, &op2);
913 if (op2.error)
914 break;
915 insn.code |= op2.code << 6;
916 str = parse_separator (str, &error);
917 if (error)
918 {
20203fb9 919 op1.error = _("Missing ','");
e135f41b
NC
920 break;
921 }
922 str = parse_op (str, &op1);
923 if (op1.error)
924 break;
925 insn.code |= op1.code;
926 if (op1.additional)
927 size += 2;
928 break;
929
cd3cde86
AM
930 case PDP11_OPCODE_OP_AC:
931 str = parse_op (str, &op1);
932 if (op1.error)
933 break;
934 insn.code |= op1.code;
935 if (op1.additional)
936 size += 2;
937 str = parse_separator (str, &error);
938 if (error)
939 {
20203fb9 940 op1.error = _("Missing ','");
cd3cde86
AM
941 break;
942 }
943 str = parse_ac (str, &op2);
944 if (op2.error)
945 break;
946 insn.code |= op2.code << 6;
947 break;
948
e135f41b
NC
949 case PDP11_OPCODE_OP_OP:
950 str = parse_op (str, &op1);
951 if (op1.error)
952 break;
953 insn.code |= op1.code << 6;
954 if (op1.additional)
955 size += 2;
956 str = parse_separator (str, &error);
957 if (error)
958 {
20203fb9 959 op2.error = _("Missing ','");
e135f41b
NC
960 break;
961 }
962 str = parse_op (str, &op2);
963 if (op2.error)
964 break;
965 insn.code |= op2.code;
966 if (op2.additional)
967 size += 2;
968 break;
969
970 case PDP11_OPCODE_REG_DISPL:
971 {
d3ce72d0 972 char *new_pointer;
e135f41b
NC
973 str = parse_reg (str, &op2);
974 if (op2.error)
975 break;
976 insn.code |= op2.code << 6;
977 str = parse_separator (str, &error);
978 if (error)
979 {
20203fb9 980 op1.error = _("Missing ','");
e135f41b
NC
981 break;
982 }
d3ce72d0 983 new_pointer = parse_expression (str, &op1);
e135f41b
NC
984 op1.code = 0;
985 op1.reloc.pc_rel = 1;
986 op1.reloc.type = BFD_RELOC_PDP11_DISP_6_PCREL;
987 if (op1.reloc.exp.X_op != O_symbol)
988 {
20203fb9 989 op1.error = _("Symbol expected");
e135f41b
NC
990 break;
991 }
992 if (op1.code & ~0x3f)
993 {
20203fb9 994 err = _("6-bit displacement out of range");
e135f41b
NC
995 break;
996 }
d3ce72d0 997 str = new_pointer;
e135f41b
NC
998 insn.code |= op1.code;
999 insn.reloc = op1.reloc;
1000 }
1001 break;
5cd4edbe 1002
e135f41b
NC
1003 default:
1004 BAD_CASE (op->type);
1005 }
1006
1007 if (op1.error)
1008 err = op1.error;
1009 else if (op2.error)
1010 err = op2.error;
1011 else
1012 {
1013 str = skip_whitespace (str);
1014 if (*str)
20203fb9 1015 err = _("Too many operands");
e135f41b
NC
1016 }
1017
1018 {
1019 char *to = NULL;
5cd4edbe 1020
e135f41b
NC
1021 if (err)
1022 {
20203fb9 1023 as_bad ("%s", err);
e135f41b
NC
1024 return;
1025 }
1026
1027 to = frag_more (size);
1028
1029 md_number_to_chars (to, insn.code, 2);
1030 if (insn.reloc.type != BFD_RELOC_NONE)
1031 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1032 &insn.reloc.exp, insn.reloc.pc_rel, insn.reloc.type);
1033 to += 2;
1034
1035 if (op1.additional)
1036 {
1037 md_number_to_chars (to, op1.word, 2);
1038 if (op1.reloc.type != BFD_RELOC_NONE)
1039 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1040 &op1.reloc.exp, op1.reloc.pc_rel, op1.reloc.type);
1041 to += 2;
1042 }
1043
1044 if (op2.additional)
1045 {
1046 md_number_to_chars (to, op2.word, 2);
1047 if (op2.reloc.type != BFD_RELOC_NONE)
1048 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1049 &op2.reloc.exp, op2.reloc.pc_rel, op2.reloc.type);
1050 }
1051 }
1052}
1053
1054int
4d5f9b2a
NC
1055md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
1056 segT segment ATTRIBUTE_UNUSED)
e135f41b
NC
1057{
1058 return 0;
1059}
1060
1061void
4d5f9b2a
NC
1062md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
1063 segT seg ATTRIBUTE_UNUSED,
1064 fragS *fragP ATTRIBUTE_UNUSED)
e135f41b
NC
1065{
1066}
1067
2b4f075a
HPN
1068int md_short_jump_size = 2;
1069int md_long_jump_size = 4;
e135f41b
NC
1070
1071void
4d5f9b2a
NC
1072md_create_short_jump (char *ptr ATTRIBUTE_UNUSED,
1073 addressT from_addr ATTRIBUTE_UNUSED,
1074 addressT to_addr ATTRIBUTE_UNUSED,
1075 fragS *frag ATTRIBUTE_UNUSED,
1076 symbolS *to_symbol ATTRIBUTE_UNUSED)
e135f41b
NC
1077{
1078}
1079
1080void
4d5f9b2a
NC
1081md_create_long_jump (char *ptr ATTRIBUTE_UNUSED,
1082 addressT from_addr ATTRIBUTE_UNUSED,
1083 addressT to_addr ATTRIBUTE_UNUSED,
1084 fragS *frag ATTRIBUTE_UNUSED,
1085 symbolS *to_symbol ATTRIBUTE_UNUSED)
e135f41b
NC
1086{
1087}
1088
1089static int
17b9d67d 1090set_cpu_model (const char *arg)
e135f41b
NC
1091{
1092 char buf[4];
1093 char *model = buf;
1094
1095 if (arg[0] == 'k')
1096 arg++;
1097
1098 *model++ = *arg++;
1099
1100 if (strchr ("abdx", model[-1]) == NULL)
1101 return 0;
1102
1103 if (model[-1] == 'd')
1104 {
4d5f9b2a 1105 if (arg[0] == 'f' || arg[0] == 'j')
e135f41b
NC
1106 model[-1] = *arg++;
1107 }
1108 else if (model[-1] == 'x')
1109 {
1110 if (arg[0] == 't')
1111 model[-1] = *arg++;
1112 }
1113
1114 if (arg[0] == '-')
1115 arg++;
1116
d34049e8 1117 if (!startswith (arg, "11"))
e135f41b
NC
1118 return 0;
1119 arg += 2;
1120
1121 if (arg[0] == '-')
1122 {
1123 if (*++arg == 0)
1124 return 0;
1125 }
1126
4d5f9b2a 1127 /* Allow up to two revision letters. */
e135f41b
NC
1128 if (arg[0] != 0)
1129 *model++ = *arg++;
1130 if (arg[0] != 0)
1131 *model++ = *arg++;
1132
1133 *model++ = 0;
1134
1135 set_option ("no-extensions");
1136
4d5f9b2a 1137 /* KA11 (11/15/20). */
d34049e8 1138 if (startswith (buf, "a"))
4d5f9b2a 1139 return 1; /* No extensions. */
e135f41b 1140
4d5f9b2a 1141 /* KB11 (11/45/50/55/70). */
d34049e8 1142 else if (startswith (buf, "b"))
4d5f9b2a 1143 return set_option ("eis") && set_option ("spl");
e135f41b 1144
4d5f9b2a 1145 /* KD11-A (11/35/40). */
d34049e8 1146 else if (startswith (buf, "da"))
e135f41b
NC
1147 return set_option ("limited-eis");
1148
4d5f9b2a 1149 /* KD11-B (11/05/10). */
d34049e8 1150 else if (startswith (buf, "db")
4d5f9b2a 1151 /* KD11-D (11/04). */
d34049e8 1152 || startswith (buf, "dd"))
e135f41b
NC
1153 return 1; /* no extensions */
1154
4d5f9b2a 1155 /* KD11-E (11/34). */
d34049e8 1156 else if (startswith (buf, "de"))
4d5f9b2a
NC
1157 return set_option ("eis") && set_option ("mxps");
1158
1159 /* KD11-F (11/03). */
d34049e8 1160 else if (startswith (buf, "df")
4d5f9b2a 1161 /* KD11-H (11/03). */
d34049e8 1162 || startswith (buf, "dh")
4d5f9b2a 1163 /* KD11-Q (11/03). */
d34049e8 1164 || startswith (buf, "dq"))
4d5f9b2a
NC
1165 return set_option ("limited-eis") && set_option ("mxps");
1166
1167 /* KD11-K (11/60). */
d34049e8 1168 else if (startswith (buf, "dk"))
4d5f9b2a
NC
1169 return set_option ("eis")
1170 && set_option ("mxps")
1171 && set_option ("ucode");
1172
1173 /* KD11-Z (11/44). */
d34049e8 1174 else if (startswith (buf, "dz"))
4d5f9b2a
NC
1175 return set_option ("csm")
1176 && set_option ("eis")
1177 && set_option ("mfpt")
1178 && set_option ("mxps")
1179 && set_option ("spl");
1180
1181 /* F11 (11/23/24). */
d34049e8 1182 else if (startswith (buf, "f"))
4d5f9b2a
NC
1183 return set_option ("eis")
1184 && set_option ("mfpt")
1185 && set_option ("mxps");
1186
1187 /* J11 (11/53/73/83/84/93/94). */
d34049e8 1188 else if (startswith (buf, "j"))
4d5f9b2a
NC
1189 return set_option ("csm")
1190 && set_option ("eis")
1191 && set_option ("mfpt")
1192 && set_option ("multiproc")
1193 && set_option ("mxps")
1194 && set_option ("spl");
1195
1196 /* T11 (11/21). */
d34049e8 1197 else if (startswith (buf, "t"))
4d5f9b2a
NC
1198 return set_option ("limited-eis")
1199 && set_option ("mxps");
e135f41b
NC
1200
1201 else
1202 return 0;
1203}
1204
1205static int
17b9d67d 1206set_machine_model (const char *arg)
e135f41b 1207{
d34049e8
ML
1208 if (!startswith (arg, "pdp-11/")
1209 && !startswith (arg, "pdp11/")
1210 && !startswith (arg, "11/"))
e135f41b
NC
1211 return 0;
1212
d34049e8 1213 if (startswith (arg, "pdp"))
e135f41b
NC
1214 arg += 3;
1215 if (arg[0] == '-')
1216 arg++;
d34049e8 1217 if (startswith (arg, "11/"))
e135f41b
NC
1218 arg += 3;
1219
4d5f9b2a
NC
1220 if (strcmp (arg, "03") == 0)
1221 return set_cpu_model ("kd11f");
1222
1223 else if (strcmp (arg, "04") == 0)
1224 return set_cpu_model ("kd11d");
e135f41b 1225
4d5f9b2a
NC
1226 else if (strcmp (arg, "05") == 0
1227 || strcmp (arg, "10") == 0)
1228 return set_cpu_model ("kd11b");
e135f41b 1229
4d5f9b2a
NC
1230 else if (strcmp (arg, "15") == 0
1231 || strcmp (arg, "20") == 0)
1232 return set_cpu_model ("ka11");
e135f41b 1233
4d5f9b2a
NC
1234 else if (strcmp (arg, "21") == 0)
1235 return set_cpu_model ("t11");
e135f41b 1236
4d5f9b2a
NC
1237 else if (strcmp (arg, "23") == 0
1238 || strcmp (arg, "24") == 0)
1239 return set_cpu_model ("f11");
e135f41b 1240
4d5f9b2a
NC
1241 else if (strcmp (arg, "34") == 0
1242 || strcmp (arg, "34a") == 0)
1243 return set_cpu_model ("kd11e");
e135f41b 1244
4d5f9b2a
NC
1245 else if (strcmp (arg, "35") == 0
1246 || strcmp (arg, "40") == 0)
1247 return set_cpu_model ("kd11da");
e135f41b 1248
4d5f9b2a
NC
1249 else if (strcmp (arg, "44") == 0)
1250 return set_cpu_model ("kd11dz");
e135f41b 1251
4d5f9b2a
NC
1252 else if (strcmp (arg, "45") == 0
1253 || strcmp (arg, "50") == 0
1254 || strcmp (arg, "55") == 0
1255 || strcmp (arg, "70") == 0)
1256 return set_cpu_model ("kb11");
e135f41b 1257
4d5f9b2a
NC
1258 else if (strcmp (arg, "60") == 0)
1259 return set_cpu_model ("kd11k");
e135f41b 1260
4d5f9b2a
NC
1261 else if (strcmp (arg, "53") == 0
1262 || strcmp (arg, "73") == 0
1263 || strcmp (arg, "83") == 0
1264 || strcmp (arg, "84") == 0
1265 || strcmp (arg, "93") == 0
1266 || strcmp (arg, "94") == 0)
1267 return set_cpu_model ("j11")
1268 && set_option ("fpp");
e135f41b 1269
e135f41b
NC
1270 else
1271 return 0;
1272}
1273
5a38dc70 1274const char *md_shortopts = "m:";
e135f41b
NC
1275
1276struct option md_longopts[] =
1277{
1278#define OPTION_CPU 257
1279 { "cpu", required_argument, NULL, OPTION_CPU },
1280#define OPTION_MACHINE 258
1281 { "machine", required_argument, NULL, OPTION_MACHINE },
1282#define OPTION_PIC 259
1283 { "pic", no_argument, NULL, OPTION_PIC },
1284 { NULL, no_argument, NULL, 0 }
1285};
1286
07726851 1287size_t md_longopts_size = sizeof (md_longopts);
e135f41b 1288
4d5f9b2a
NC
1289/* Invocation line includes a switch not recognized by the base assembler.
1290 See if it's a processor-specific option. */
e135f41b
NC
1291
1292int
17b9d67d 1293md_parse_option (int c, const char *arg)
e135f41b
NC
1294{
1295 init_defaults ();
1296
1297 switch (c)
1298 {
1299 case 'm':
1300 if (set_option (arg))
1301 return 1;
1302 if (set_cpu_model (arg))
1303 return 1;
1304 if (set_machine_model (arg))
1305 return 1;
1306 break;
1307
1308 case OPTION_CPU:
1309 if (set_cpu_model (arg))
1310 return 1;
1311 break;
1312
1313 case OPTION_MACHINE:
1314 if (set_machine_model (arg))
1315 return 1;
1316 break;
1317
1318 case OPTION_PIC:
1319 if (set_option ("pic"))
1320 return 1;
1321 break;
1322
1323 default:
1324 break;
1325 }
1326
e135f41b
NC
1327 return 0;
1328}
1329
e135f41b 1330void
4d5f9b2a 1331md_show_usage (FILE *stream)
e135f41b
NC
1332{
1333 fprintf (stream, "\
1334\n\
2b0f3761 1335PDP-11 instruction set extensions:\n\
e135f41b 1336\n\
33eaf5de 1337-m(no-)cis allow (disallow) commercial instruction set\n\
e135f41b
NC
1338-m(no-)csm allow (disallow) CSM instruction\n\
1339-m(no-)eis allow (disallow) full extended instruction set\n\
1340-m(no-)fis allow (disallow) KEV11 floating-point instructions\n\
1341-m(no-)fpp allow (disallow) FP-11 floating-point instructions\n\
1342-m(no-)fpu allow (disallow) FP-11 floating-point instructions\n\
1343-m(no-)limited-eis allow (disallow) limited extended instruction set\n\
1344-m(no-)mfpt allow (disallow) processor type instruction\n\
1345-m(no-)multiproc allow (disallow) multiprocessor instructions\n\
1346-m(no-)mxps allow (disallow) processor status instructions\n\
1347-m(no-)spl allow (disallow) SPL instruction\n\
1348-m(no-)ucode allow (disallow) microcode instructions\n\
1349-mall-extensions allow all instruction set extensions\n\
1350 (this is the default)\n\
33eaf5de
NC
1351-mno-extensions disallow all instruction set extensions\n\
1352-pic generate position-independent code\n\
e135f41b
NC
1353\n\
1354PDP-11 CPU model options:\n\
1355\n\
1356-mka11* KA11 CPU. base line instruction set only\n\
1357-mkb11* KB11 CPU. enable full EIS and SPL\n\
1358-mkd11a* KD11-A CPU. enable limited EIS\n\
1359-mkd11b* KD11-B CPU. base line instruction set only\n\
1360-mkd11d* KD11-D CPU. base line instruction set only\n\
1361-mkd11e* KD11-E CPU. enable full EIS, MTPS, and MFPS\n\
1362-mkd11f* KD11-F CPU. enable limited EIS, MTPS, and MFPS\n\
1363-mkd11h* KD11-H CPU. enable limited EIS, MTPS, and MFPS\n\
1364-mkd11q* KD11-Q CPU. enable limited EIS, MTPS, and MFPS\n\
1365-mkd11k* KD11-K CPU. enable full EIS, MTPS, MFPS, LDUB, MED,\n\
1366 XFC, and MFPT\n\
1367-mkd11z* KD11-Z CPU. enable full EIS, MTPS, MFPS, MFPT, SPL,\n\
1368 and CSM\n\
1369-mf11* F11 CPU. enable full EIS, MFPS, MTPS, and MFPT\n\
1370-mj11* J11 CPU. enable full EIS, MTPS, MFPS, MFPT, SPL,\n\
1371 CSM, TSTSET, and WRTLCK\n\
1372-mt11* T11 CPU. enable limited EIS, MTPS, and MFPS\n\
1373\n\
1374PDP-11 machine model options:\n\
1375\n\
1376-m11/03 same as -mkd11f\n\
1377-m11/04 same as -mkd11d\n\
1378-m11/05 same as -mkd11b\n\
1379-m11/10 same as -mkd11b\n\
1380-m11/15 same as -mka11\n\
1381-m11/20 same as -mka11\n\
1382-m11/21 same as -mt11\n\
1383-m11/23 same as -mf11\n\
1384-m11/24 same as -mf11\n\
1385-m11/34 same as -mkd11e\n\
1386-m11/34a same as -mkd11e -mfpp\n\
1387-m11/35 same as -mkd11a\n\
1388-m11/40 same as -mkd11a\n\
1389-m11/44 same as -mkd11z\n\
1390-m11/45 same as -mkb11\n\
1391-m11/50 same as -mkb11\n\
1392-m11/53 same as -mj11\n\
1393-m11/55 same as -mkb11\n\
1394-m11/60 same as -mkd11k\n\
1395-m11/70 same as -mkb11\n\
1396-m11/73 same as -mj11\n\
1397-m11/83 same as -mj11\n\
1398-m11/84 same as -mj11\n\
1399-m11/93 same as -mj11\n\
1400-m11/94 same as -mj11\n\
1401");
1402}
1403
1404symbolS *
4d5f9b2a 1405md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
e135f41b
NC
1406{
1407 return 0;
1408}
1409
1410valueT
4d5f9b2a
NC
1411md_section_align (segT segment ATTRIBUTE_UNUSED,
1412 valueT size)
e135f41b
NC
1413{
1414 return (size + 1) & ~1;
1415}
1416
1417long
4d5f9b2a 1418md_pcrel_from (fixS *fixP)
e135f41b
NC
1419{
1420 return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size;
1421}
1422
1423/* Translate internal representation of relocation info to BFD target
1424 format. */
4d5f9b2a 1425
e135f41b 1426arelent *
4d5f9b2a
NC
1427tc_gen_reloc (asection *section ATTRIBUTE_UNUSED,
1428 fixS *fixp)
e135f41b
NC
1429{
1430 arelent *reloc;
1431 bfd_reloc_code_real_type code;
1432
325801bd 1433 reloc = XNEW (arelent);
e135f41b 1434
325801bd 1435 reloc->sym_ptr_ptr = XNEW (asymbol *);
e135f41b
NC
1436 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1437 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1438
55cf6793 1439 /* This is taken account for in md_apply_fix(). */
e135f41b
NC
1440 reloc->addend = -symbol_get_bfdsym (fixp->fx_addsy)->section->vma;
1441
10a95fcc
AM
1442 code = fixp->fx_r_type;
1443 if (fixp->fx_pcrel)
e135f41b 1444 {
10a95fcc
AM
1445 switch (code)
1446 {
1447 case BFD_RELOC_16:
1448 code = BFD_RELOC_16_PCREL;
1449 break;
e135f41b 1450
10a95fcc
AM
1451 case BFD_RELOC_16_PCREL:
1452 break;
e135f41b 1453
10a95fcc
AM
1454 default:
1455 BAD_CASE (code);
1456 return NULL;
1457 }
e135f41b
NC
1458 }
1459
1460 reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
1461
1462 if (reloc->howto == NULL)
1463 {
1464 as_bad_where (fixp->fx_file, fixp->fx_line,
20203fb9 1465 _("Can not represent %s relocation in this object file format"),
e135f41b
NC
1466 bfd_get_reloc_code_name (code));
1467 return NULL;
1468 }
1469
1470 return reloc;
1471}
1472
1473void
4d5f9b2a 1474pseudo_bss (int c ATTRIBUTE_UNUSED)
e135f41b
NC
1475{
1476 int temp;
1477
1478 temp = get_absolute_expression ();
1479 subseg_set (bss_section, temp);
1480 demand_empty_rest_of_line ();
1481}
1482
1483void
4d5f9b2a 1484pseudo_even (int c ATTRIBUTE_UNUSED)
e135f41b
NC
1485{
1486 int alignment = 1; /* 2^1 */
1487 frag_align (alignment, 0, 1);
1488 record_alignment (now_seg, alignment);
1489}
499ac353 1490
6d4af3c2 1491const char *
499ac353
NC
1492md_atof (int type, char * litP, int * sizeP)
1493{
1494 return vax_md_atof (type, litP, sizeP);
1495}
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