Fix some dlx fails
[deliverable/binutils-gdb.git] / gas / config / tc-pdp11.c
CommitLineData
e135f41b 1/* tc-pdp11.c - pdp11-specific -
82704155 2 Copyright (C) 2001-2019 Free Software Foundation, Inc.
e135f41b
NC
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
e135f41b
NC
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
bb0a86e1
NC
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
e135f41b 20
e135f41b 21#include "as.h"
3882b010 22#include "safe-ctype.h"
e135f41b
NC
23#include "opcode/pdp11.h"
24
4d5f9b2a 25extern int flonum_gen2vax (int, FLONUM_TYPE * f, LITTLENUM_TYPE *);
cd3cde86 26
4d5f9b2a 27#define TRUE 1
e135f41b
NC
28#define FALSE 0
29
4d5f9b2a 30/* A representation for PDP-11 machine code. */
e135f41b
NC
31struct pdp11_code
32{
6d4af3c2 33 const char *error;
e135f41b 34 int code;
4d5f9b2a
NC
35 int additional; /* Is there an additional word? */
36 int word; /* Additional word, if any. */
e135f41b
NC
37 struct
38 {
39 bfd_reloc_code_real_type type;
40 expressionS exp;
41 int pc_rel;
42 } reloc;
43};
44
4d5f9b2a
NC
45/* Instruction set extensions.
46
47 If you change this from an array to something else, please update
48 the "PDP-11 instruction set extensions" comment in pdp11.h. */
e135f41b
NC
49int pdp11_extension[PDP11_EXT_NUM];
50
4d5f9b2a 51/* Assembly options. */
e135f41b
NC
52
53#define ASM_OPT_PIC 1
54#define ASM_OPT_NUM 2
55
56int asm_option[ASM_OPT_NUM];
57
58/* These chars start a comment anywhere in a source file (except inside
4d5f9b2a 59 another comment. */
5a38dc70 60const char comment_chars[] = "#/";
e135f41b 61
5cd4edbe 62/* These chars only start a comment at the beginning of a line. */
5a38dc70 63const char line_comment_chars[] = "#/";
e135f41b 64
5a38dc70 65const char line_separator_chars[] = ";";
e135f41b 66
4d5f9b2a 67/* Chars that can be used to separate mant from exp in floating point nums. */
5a38dc70 68const char EXP_CHARS[] = "eE";
e135f41b 69
4d5f9b2a
NC
70/* Chars that mean this number is a floating point constant. */
71/* as in 0f123.456. */
72/* or 0H1.234E-12 (see exp chars above). */
5a38dc70 73const char FLT_CHARS[] = "dDfF";
e135f41b
NC
74
75void pseudo_even (int);
76void pseudo_bss (int);
77
5a38dc70 78const pseudo_typeS md_pseudo_table[] =
e135f41b
NC
79{
80 { "bss", pseudo_bss, 0 },
81 { "even", pseudo_even, 0 },
82 { 0, 0, 0 },
83};
84
4d5f9b2a
NC
85static struct hash_control *insn_hash = NULL;
86\f
87static int
17b9d67d 88set_option (const char *arg)
4d5f9b2a
NC
89{
90 int yes = 1;
91
92 if (strcmp (arg, "all-extensions") == 0
93 || strcmp (arg, "all") == 0)
94 {
95 memset (pdp11_extension, ~0, sizeof pdp11_extension);
96 pdp11_extension[PDP11_NONE] = 0;
97 return 1;
98 }
99 else if (strcmp (arg, "no-extensions") == 0)
100 {
101 memset (pdp11_extension, 0, sizeof pdp11_extension);
102 pdp11_extension[PDP11_BASIC] = 1;
103 return 1;
104 }
105
106 if (strncmp (arg, "no-", 3) == 0)
107 {
108 yes = 0;
109 arg += 3;
110 }
111
33eaf5de 112 /* Commercial instructions. */
4d5f9b2a
NC
113 if (strcmp (arg, "cis") == 0)
114 pdp11_extension[PDP11_CIS] = yes;
115 /* Call supervisor mode. */
116 else if (strcmp (arg, "csm") == 0)
117 pdp11_extension[PDP11_CSM] = yes;
118 /* Extended instruction set. */
119 else if (strcmp (arg, "eis") == 0)
120 pdp11_extension[PDP11_EIS] = pdp11_extension[PDP11_LEIS] = yes;
121 /* KEV11 floating-point. */
122 else if (strcmp (arg, "fis") == 0
123 || strcmp (arg, "kev11") == 0
124 || strcmp (arg, "kev-11") == 0)
125 pdp11_extension[PDP11_FIS] = yes;
126 /* FP-11 floating-point. */
127 else if (strcmp (arg, "fpp") == 0
128 || strcmp (arg, "fpu") == 0
129 || strcmp (arg, "fp11") == 0
130 || strcmp (arg, "fp-11") == 0
131 || strcmp (arg, "fpj11") == 0
132 || strcmp (arg, "fp-j11") == 0
133 || strcmp (arg, "fpj-11") == 0)
134 pdp11_extension[PDP11_FPP] = yes;
135 /* Limited extended insns. */
136 else if (strcmp (arg, "limited-eis") == 0)
137 {
138 pdp11_extension[PDP11_LEIS] = yes;
139 if (!pdp11_extension[PDP11_LEIS])
140 pdp11_extension[PDP11_EIS] = 0;
141 }
142 /* Move from processor type. */
143 else if (strcmp (arg, "mfpt") == 0)
144 pdp11_extension[PDP11_MFPT] = yes;
145 /* Multiprocessor insns: */
146 else if (strncmp (arg, "mproc", 5) == 0
147 /* TSTSET, WRTLCK */
148 || strncmp (arg, "multiproc", 9) == 0)
149 pdp11_extension[PDP11_MPROC] = yes;
150 /* Move from/to proc status. */
151 else if (strcmp (arg, "mxps") == 0)
152 pdp11_extension[PDP11_MXPS] = yes;
153 /* Position-independent code. */
154 else if (strcmp (arg, "pic") == 0)
155 asm_option[ASM_OPT_PIC] = yes;
156 /* Set priority level. */
157 else if (strcmp (arg, "spl") == 0)
158 pdp11_extension[PDP11_SPL] = yes;
159 /* Microcode instructions: */
160 else if (strcmp (arg, "ucode") == 0
161 /* LDUB, MED, XFC */
162 || strcmp (arg, "microcode") == 0)
163 pdp11_extension[PDP11_UCODE] = yes;
164 else
165 return 0;
166
167 return 1;
168}
169
170
e135f41b 171static void
4d5f9b2a 172init_defaults (void)
e135f41b
NC
173{
174 static int first = 1;
175
176 if (first)
177 {
178 set_option ("all-extensions");
179 set_option ("pic");
180 first = 0;
181 }
182}
183
e135f41b 184void
4d5f9b2a 185md_begin (void)
e135f41b
NC
186{
187 int i;
188
189 init_defaults ();
190
191 insn_hash = hash_new ();
192 if (insn_hash == NULL)
20203fb9 193 as_fatal (_("Virtual memory exhausted"));
5cd4edbe 194
e135f41b 195 for (i = 0; i < pdp11_num_opcodes; i++)
4d5f9b2a 196 hash_insert (insn_hash, pdp11_opcodes[i].name, (void *) (pdp11_opcodes + i));
e135f41b 197 for (i = 0; i < pdp11_num_aliases; i++)
4d5f9b2a 198 hash_insert (insn_hash, pdp11_aliases[i].name, (void *) (pdp11_aliases + i));
e135f41b
NC
199}
200
201void
4d5f9b2a 202md_number_to_chars (char con[], valueT value, int nbytes)
e135f41b
NC
203{
204 /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
4d5f9b2a 205 0x12345678 is stored as "\x56\x78\x12\x34". It's
33eaf5de 206 anyone's guess what 0x123456 would be stored like. */
e135f41b
NC
207
208 switch (nbytes)
209 {
210 case 0:
211 break;
212 case 1:
213 con[0] = value & 0xff;
214 break;
215 case 2:
4d5f9b2a 216 con[0] = value & 0xff;
e135f41b
NC
217 con[1] = (value >> 8) & 0xff;
218 break;
219 case 4:
220 con[0] = (value >> 16) & 0xff;
221 con[1] = (value >> 24) & 0xff;
4d5f9b2a 222 con[2] = value & 0xff;
e135f41b
NC
223 con[3] = (value >> 8) & 0xff;
224 break;
225 default:
226 BAD_CASE (nbytes);
5cd4edbe 227 }
e135f41b
NC
228}
229
230/* Fix up some data or instructions after we find out the value of a symbol
94f592af 231 that they reference. Knows about order of bytes in address. */
e135f41b 232
94f592af 233void
55cf6793 234md_apply_fix (fixS *fixP,
4d5f9b2a
NC
235 valueT * valP,
236 segT seg ATTRIBUTE_UNUSED)
e135f41b
NC
237{
238 valueT code;
239 valueT mask;
94f592af 240 valueT val = * valP;
e135f41b
NC
241 char *buf;
242 int shift;
243 int size;
244
245 buf = fixP->fx_where + fixP->fx_frag->fr_literal;
246 size = fixP->fx_size;
3ec2b351 247 code = md_chars_to_number ((unsigned char *) buf, size);
e135f41b
NC
248
249 switch (fixP->fx_r_type)
250 {
251 case BFD_RELOC_16:
252 case BFD_RELOC_16_PCREL:
253 mask = 0xffff;
254 shift = 0;
255 break;
256 case BFD_RELOC_PDP11_DISP_8_PCREL:
257 mask = 0x00ff;
258 shift = 1;
259 break;
260 case BFD_RELOC_PDP11_DISP_6_PCREL:
261 mask = 0x003f;
262 shift = 1;
14127cc4 263 val = -val;
e135f41b
NC
264 break;
265 default:
266 BAD_CASE (fixP->fx_r_type);
267 }
268
269 if (fixP->fx_addsy != NULL)
94f592af 270 val += symbol_get_bfdsym (fixP->fx_addsy)->section->vma;
e135f41b
NC
271 /* *value += fixP->fx_addsy->bsym->section->vma; */
272
273 code &= ~mask;
94f592af 274 code |= (val >> shift) & mask;
e135f41b 275 number_to_chars_littleendian (buf, code, size);
94f592af
NC
276
277 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
278 fixP->fx_done = 1;
e135f41b
NC
279}
280
281long
e046cf80 282md_chars_to_number (unsigned char *con, int nbytes)
e135f41b
NC
283{
284 /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
4d5f9b2a 285 0x12345678 is stored as "\x56\x78\x12\x34". It's
33eaf5de 286 anyone's guess what 0x123456 would be stored like. */
e135f41b
NC
287 switch (nbytes)
288 {
289 case 0:
290 return 0;
291 case 1:
292 return con[0];
293 case 2:
294 return (con[1] << BITS_PER_CHAR) | con[0];
295 case 4:
296 return
4d5f9b2a
NC
297 (((con[1] << BITS_PER_CHAR) | con[0]) << (2 * BITS_PER_CHAR))
298 |((con[3] << BITS_PER_CHAR) | con[2]);
e135f41b
NC
299 default:
300 BAD_CASE (nbytes);
301 return 0;
5cd4edbe 302 }
e135f41b
NC
303}
304\f
305static char *
306skip_whitespace (char *str)
307{
308 while (*str == ' ' || *str == '\t')
309 str++;
310 return str;
311}
312
313static char *
314find_whitespace (char *str)
315{
316 while (*str != ' ' && *str != '\t' && *str != 0)
317 str++;
318 return str;
319}
320
e135f41b
NC
321static char *
322parse_reg (char *str, struct pdp11_code *operand)
323{
324 str = skip_whitespace (str);
3882b010 325 if (TOLOWER (*str) == 'r')
e135f41b
NC
326 {
327 str++;
328 switch (*str)
329 {
330 case '0': case '1': case '2': case '3':
331 case '4': case '5': case '6': case '7':
332 operand->code = *str - '0';
333 str++;
334 break;
335 default:
20203fb9 336 operand->error = _("Bad register name");
e135f41b
NC
337 return str - 1;
338 }
339 }
4d5f9b2a
NC
340 else if (strncmp (str, "sp", 2) == 0
341 || strncmp (str, "SP", 2) == 0)
e135f41b
NC
342 {
343 operand->code = 6;
344 str += 2;
345 }
4d5f9b2a
NC
346 else if (strncmp (str, "pc", 2) == 0
347 || strncmp (str, "PC", 2) == 0)
e135f41b
NC
348 {
349 operand->code = 7;
350 str += 2;
351 }
352 else
8f9ea98b 353 operand->error = _("Bad register name");
e135f41b
NC
354
355 return str;
356}
357
358static char *
cd3cde86 359parse_ac5 (char *str, struct pdp11_code *operand)
e135f41b
NC
360{
361 str = skip_whitespace (str);
4d5f9b2a
NC
362 if (strncmp (str, "fr", 2) == 0
363 || strncmp (str, "FR", 2) == 0
364 || strncmp (str, "ac", 2) == 0
365 || strncmp (str, "AC", 2) == 0)
e135f41b
NC
366 {
367 str += 2;
368 switch (*str)
369 {
370 case '0': case '1': case '2': case '3':
cd3cde86 371 case '4': case '5':
e135f41b
NC
372 operand->code = *str - '0';
373 str++;
374 break;
375 default:
20203fb9 376 operand->error = _("Bad register name");
e135f41b
NC
377 return str - 2;
378 }
379 }
380 else
381 {
20203fb9 382 operand->error = _("Bad register name");
e135f41b
NC
383 return str;
384 }
385
386 return str;
387}
388
cd3cde86
AM
389static char *
390parse_ac (char *str, struct pdp11_code *operand)
391{
392 str = parse_ac5 (str, operand);
393 if (!operand->error && operand->code > 3)
394 {
20203fb9 395 operand->error = _("Bad register name");
cd3cde86
AM
396 return str - 3;
397 }
398
399 return str;
400}
401
e135f41b
NC
402static char *
403parse_expression (char *str, struct pdp11_code *operand)
404{
405 char *save_input_line_pointer;
406 segT seg;
407
408 save_input_line_pointer = input_line_pointer;
409 input_line_pointer = str;
410 seg = expression (&operand->reloc.exp);
411 if (seg == NULL)
412 {
413 input_line_pointer = save_input_line_pointer;
20203fb9 414 operand->error = _("Error in expression");
e135f41b
NC
415 return str;
416 }
417
418 str = input_line_pointer;
419 input_line_pointer = save_input_line_pointer;
420
421 operand->reloc.pc_rel = 0;
422
e135f41b
NC
423 return str;
424}
425
426static char *
427parse_op_no_deferred (char *str, struct pdp11_code *operand)
428{
cd3cde86
AM
429 LITTLENUM_TYPE literal_float[2];
430
e135f41b
NC
431 str = skip_whitespace (str);
432
433 switch (*str)
434 {
435 case '(': /* (rn) and (rn)+ */
436 str = parse_reg (str + 1, operand);
437 if (operand->error)
438 return str;
439 str = skip_whitespace (str);
440 if (*str != ')')
441 {
20203fb9 442 operand->error = _("Missing ')'");
e135f41b
NC
443 return str;
444 }
445 str++;
446 if (*str == '+')
447 {
448 operand->code |= 020;
449 str++;
450 }
451 else
452 {
453 operand->code |= 010;
454 }
455 break;
456
4d5f9b2a
NC
457 /* Immediate. */
458 case '#':
5cd4edbe 459 case '$':
e135f41b
NC
460 str = parse_expression (str + 1, operand);
461 if (operand->error)
462 return str;
463 operand->additional = TRUE;
464 operand->word = operand->reloc.exp.X_add_number;
465 switch (operand->reloc.exp.X_op)
466 {
467 case O_constant:
468 break;
469 case O_symbol:
470 case O_add:
471 case O_subtract:
472 operand->reloc.type = BFD_RELOC_16;
473 operand->reloc.pc_rel = 0;
474 break;
cd3cde86
AM
475 case O_big:
476 if (operand->reloc.exp.X_add_number > 0)
477 {
20203fb9 478 operand->error = _("Error in expression");
cd3cde86
AM
479 break;
480 }
4d5f9b2a 481 /* It's a floating literal... */
cd3cde86
AM
482 know (operand->reloc.exp.X_add_number < 0);
483 flonum_gen2vax ('f', &generic_floating_point_number, literal_float);
484 operand->word = literal_float[0];
485 if (literal_float[1] != 0)
486 as_warn (_("Low order bits truncated in immediate float operand"));
487 break;
e135f41b 488 default:
20203fb9 489 operand->error = _("Error in expression");
e135f41b
NC
490 break;
491 }
492 operand->code = 027;
493 break;
494
4d5f9b2a
NC
495 /* label, d(rn), -(rn) */
496 default:
e135f41b 497 {
e135f41b
NC
498 if (strncmp (str, "-(", 2) == 0) /* -(rn) */
499 {
500 str = parse_reg (str + 2, operand);
501 if (operand->error)
502 return str;
503 str = skip_whitespace (str);
504 if (*str != ')')
505 {
20203fb9 506 operand->error = _("Missing ')'");
e135f41b
NC
507 return str;
508 }
509 operand->code |= 040;
510 str++;
511 break;
512 }
513
514 str = parse_expression (str, operand);
515 if (operand->error)
516 return str;
517
518 str = skip_whitespace (str);
519
4d5f9b2a 520 if (*str != '(')
e135f41b 521 {
e135f41b
NC
522 operand->code = 067;
523 operand->additional = 1;
524 operand->word = 0;
525 operand->reloc.type = BFD_RELOC_16_PCREL;
526 operand->reloc.pc_rel = 1;
527 break;
528 }
529
4d5f9b2a
NC
530 /* d(rn) */
531 str++;
e135f41b
NC
532 str = parse_reg (str, operand);
533 if (operand->error)
534 return str;
535
536 str = skip_whitespace (str);
537
538 if (*str != ')')
539 {
20203fb9 540 operand->error = _("Missing ')'");
e135f41b
NC
541 return str;
542 }
543
544 str++;
545 operand->additional = TRUE;
546 operand->code |= 060;
547 switch (operand->reloc.exp.X_op)
548 {
549 case O_symbol:
bb0a86e1
NC
550 operand->reloc.type = BFD_RELOC_16;
551 operand->reloc.pc_rel = 0;
e135f41b
NC
552 break;
553 case O_constant:
554 if ((operand->code & 7) == 7)
555 {
556 operand->reloc.pc_rel = 1;
557 operand->word = operand->reloc.exp.X_add_number;
558 }
559 else
4d5f9b2a
NC
560 operand->word = operand->reloc.exp.X_add_number;
561
e135f41b
NC
562 break;
563 default:
564 BAD_CASE (operand->reloc.exp.X_op);
565 }
566 break;
567 }
568 }
569
570 return str;
571}
572
573static char *
cd3cde86 574parse_op_noreg (char *str, struct pdp11_code *operand)
e135f41b
NC
575{
576 str = skip_whitespace (str);
e135f41b
NC
577 operand->error = NULL;
578
579 if (*str == '@' || *str == '*')
580 {
3cf2b669
JPC
581 /* @(Rn) == @0(Rn): Mode 7, Indexed deferred.
582 Check for auto-increment deferred. */
583 if (str[1] == '('
584 && str[2] != 0
585 && str[3] != 0
586 && str[4] != 0
587 && str[5] != '+')
588 {
589 /* Change implied to explicit index deferred. */
590 *str = '0';
591 str = parse_op_no_deferred (str, operand);
592 }
593 else
8f9ea98b
JPC
594 {
595 /* @Rn == (Rn): Register deferred. */
596 str = parse_reg (str + 1, operand);
597
598 /* Not @Rn */
599 if (operand->error)
600 {
601 operand->error = NULL;
602 str = parse_op_no_deferred (str, operand);
603 }
604 }
3cf2b669 605
e135f41b
NC
606 if (operand->error)
607 return str;
8f9ea98b 608
e135f41b
NC
609 operand->code |= 010;
610 }
611 else
612 str = parse_op_no_deferred (str, operand);
613
614 return str;
615}
616
cd3cde86
AM
617static char *
618parse_op (char *str, struct pdp11_code *operand)
619{
620 str = skip_whitespace (str);
621
622 str = parse_reg (str, operand);
623 if (!operand->error)
624 return str;
625
626 operand->error = NULL;
627 parse_ac5 (str, operand);
628 if (!operand->error)
629 {
20203fb9 630 operand->error = _("Float AC not legal as integer operand");
cd3cde86
AM
631 return str;
632 }
5d6255fe 633
cd3cde86
AM
634 return parse_op_noreg (str, operand);
635}
636
637static char *
638parse_fop (char *str, struct pdp11_code *operand)
639{
640 str = skip_whitespace (str);
641
642 str = parse_ac5 (str, operand);
643 if (!operand->error)
644 return str;
645
646 operand->error = NULL;
647 parse_reg (str, operand);
648 if (!operand->error)
649 {
20203fb9 650 operand->error = _("General register not legal as float operand");
cd3cde86
AM
651 return str;
652 }
653
654 return parse_op_noreg (str, operand);
655}
656
e135f41b
NC
657static char *
658parse_separator (char *str, int *error)
659{
660 str = skip_whitespace (str);
661 *error = (*str != ',');
662 if (!*error)
663 str++;
664 return str;
665}
666
667void
4d5f9b2a 668md_assemble (char *instruction_string)
e135f41b 669{
5a38dc70 670 const struct pdp11_opcode *op;
e135f41b
NC
671 struct pdp11_code insn, op1, op2;
672 int error;
673 int size;
6d4af3c2 674 const char *err = NULL;
e135f41b
NC
675 char *str;
676 char *p;
677 char c;
678
679 str = skip_whitespace (instruction_string);
680 p = find_whitespace (str);
681 if (p - str == 0)
682 {
20203fb9 683 as_bad (_("No instruction found"));
e135f41b
NC
684 return;
685 }
686
687 c = *p;
688 *p = '\0';
689 op = (struct pdp11_opcode *)hash_find (insn_hash, str);
690 *p = c;
691 if (op == 0)
692 {
cd3cde86 693 as_bad (_("Unknown instruction '%s'"), str);
e135f41b
NC
694 return;
695 }
696
697 if (!pdp11_extension[op->extension])
698 {
20203fb9 699 as_warn (_("Unsupported instruction set extension: %s"), op->name);
e135f41b
NC
700 return;
701 }
702
703 insn.error = NULL;
704 insn.code = op->opcode;
705 insn.reloc.type = BFD_RELOC_NONE;
706 op1.error = NULL;
707 op1.additional = FALSE;
708 op1.reloc.type = BFD_RELOC_NONE;
709 op2.error = NULL;
710 op2.additional = FALSE;
711 op2.reloc.type = BFD_RELOC_NONE;
712
713 str = p;
714 size = 2;
715
716 switch (op->type)
717 {
718 case PDP11_OPCODE_NO_OPS:
719 str = skip_whitespace (str);
e135f41b
NC
720 break;
721
722 case PDP11_OPCODE_IMM3:
723 case PDP11_OPCODE_IMM6:
724 case PDP11_OPCODE_IMM8:
725 str = skip_whitespace (str);
726 if (*str == '#' || *str == '$')
727 str++;
728 str = parse_expression (str, &op1);
729 if (op1.error)
730 break;
cd3cde86
AM
731 if (op1.reloc.exp.X_op != O_constant || op1.reloc.type != BFD_RELOC_NONE)
732 {
20203fb9 733 op1.error = _("operand is not an absolute constant");
cd3cde86
AM
734 break;
735 }
e135f41b
NC
736 switch (op->type)
737 {
738 case PDP11_OPCODE_IMM3:
cd3cde86 739 if (op1.reloc.exp.X_add_number & ~7)
e135f41b 740 {
20203fb9 741 op1.error = _("3-bit immediate out of range");
e135f41b
NC
742 break;
743 }
744 break;
745 case PDP11_OPCODE_IMM6:
cd3cde86 746 if (op1.reloc.exp.X_add_number & ~0x3f)
e135f41b 747 {
20203fb9 748 op1.error = _("6-bit immediate out of range");
e135f41b
NC
749 break;
750 }
751 break;
752 case PDP11_OPCODE_IMM8:
cd3cde86 753 if (op1.reloc.exp.X_add_number & ~0xff)
e135f41b 754 {
20203fb9 755 op1.error = _("8-bit immediate out of range");
e135f41b
NC
756 break;
757 }
758 break;
759 }
cd3cde86 760 insn.code |= op1.reloc.exp.X_add_number;
e135f41b
NC
761 break;
762
763 case PDP11_OPCODE_DISPL:
764 {
d3ce72d0
NC
765 char *new_pointer;
766 new_pointer = parse_expression (str, &op1);
e135f41b
NC
767 op1.code = 0;
768 op1.reloc.pc_rel = 1;
769 op1.reloc.type = BFD_RELOC_PDP11_DISP_8_PCREL;
770 if (op1.reloc.exp.X_op != O_symbol)
771 {
20203fb9 772 op1.error = _("Symbol expected");
e135f41b
NC
773 break;
774 }
775 if (op1.code & ~0xff)
776 {
20203fb9 777 err = _("8-bit displacement out of range");
e135f41b
NC
778 break;
779 }
d3ce72d0 780 str = new_pointer;
e135f41b
NC
781 insn.code |= op1.code;
782 insn.reloc = op1.reloc;
783 }
784 break;
785
786 case PDP11_OPCODE_REG:
787 str = parse_reg (str, &op1);
788 if (op1.error)
789 break;
790 insn.code |= op1.code;
791 break;
792
793 case PDP11_OPCODE_OP:
794 str = parse_op (str, &op1);
795 if (op1.error)
796 break;
797 insn.code |= op1.code;
798 if (op1.additional)
799 size += 2;
800 break;
801
cd3cde86
AM
802 case PDP11_OPCODE_FOP:
803 str = parse_fop (str, &op1);
804 if (op1.error)
805 break;
806 insn.code |= op1.code;
807 if (op1.additional)
808 size += 2;
809 break;
810
e135f41b
NC
811 case PDP11_OPCODE_REG_OP:
812 str = parse_reg (str, &op2);
813 if (op2.error)
814 break;
815 insn.code |= op2.code << 6;
816 str = parse_separator (str, &error);
817 if (error)
818 {
20203fb9 819 op2.error = _("Missing ','");
e135f41b
NC
820 break;
821 }
822 str = parse_op (str, &op1);
823 if (op1.error)
824 break;
825 insn.code |= op1.code;
826 if (op1.additional)
827 size += 2;
828 break;
829
830 case PDP11_OPCODE_REG_OP_REV:
831 str = parse_op (str, &op1);
832 if (op1.error)
833 break;
834 insn.code |= op1.code;
835 if (op1.additional)
836 size += 2;
837 str = parse_separator (str, &error);
838 if (error)
839 {
20203fb9 840 op2.error = _("Missing ','");
e135f41b
NC
841 break;
842 }
843 str = parse_reg (str, &op2);
844 if (op2.error)
845 break;
846 insn.code |= op2.code << 6;
847 break;
848
cd3cde86
AM
849 case PDP11_OPCODE_AC_FOP:
850 str = parse_ac (str, &op2);
851 if (op2.error)
852 break;
853 insn.code |= op2.code << 6;
854 str = parse_separator (str, &error);
855 if (error)
856 {
20203fb9 857 op1.error = _("Missing ','");
cd3cde86
AM
858 break;
859 }
860 str = parse_fop (str, &op1);
861 if (op1.error)
862 break;
863 insn.code |= op1.code;
864 if (op1.additional)
865 size += 2;
866 break;
867
868 case PDP11_OPCODE_FOP_AC:
869 str = parse_fop (str, &op1);
870 if (op1.error)
871 break;
872 insn.code |= op1.code;
873 if (op1.additional)
874 size += 2;
875 str = parse_separator (str, &error);
876 if (error)
877 {
20203fb9 878 op1.error = _("Missing ','");
cd3cde86
AM
879 break;
880 }
881 str = parse_ac (str, &op2);
882 if (op2.error)
883 break;
884 insn.code |= op2.code << 6;
885 break;
886
e135f41b
NC
887 case PDP11_OPCODE_AC_OP:
888 str = parse_ac (str, &op2);
889 if (op2.error)
890 break;
891 insn.code |= op2.code << 6;
892 str = parse_separator (str, &error);
893 if (error)
894 {
20203fb9 895 op1.error = _("Missing ','");
e135f41b
NC
896 break;
897 }
898 str = parse_op (str, &op1);
899 if (op1.error)
900 break;
901 insn.code |= op1.code;
902 if (op1.additional)
903 size += 2;
904 break;
905
cd3cde86
AM
906 case PDP11_OPCODE_OP_AC:
907 str = parse_op (str, &op1);
908 if (op1.error)
909 break;
910 insn.code |= op1.code;
911 if (op1.additional)
912 size += 2;
913 str = parse_separator (str, &error);
914 if (error)
915 {
20203fb9 916 op1.error = _("Missing ','");
cd3cde86
AM
917 break;
918 }
919 str = parse_ac (str, &op2);
920 if (op2.error)
921 break;
922 insn.code |= op2.code << 6;
923 break;
924
e135f41b
NC
925 case PDP11_OPCODE_OP_OP:
926 str = parse_op (str, &op1);
927 if (op1.error)
928 break;
929 insn.code |= op1.code << 6;
930 if (op1.additional)
931 size += 2;
932 str = parse_separator (str, &error);
933 if (error)
934 {
20203fb9 935 op2.error = _("Missing ','");
e135f41b
NC
936 break;
937 }
938 str = parse_op (str, &op2);
939 if (op2.error)
940 break;
941 insn.code |= op2.code;
942 if (op2.additional)
943 size += 2;
944 break;
945
946 case PDP11_OPCODE_REG_DISPL:
947 {
d3ce72d0 948 char *new_pointer;
e135f41b
NC
949 str = parse_reg (str, &op2);
950 if (op2.error)
951 break;
952 insn.code |= op2.code << 6;
953 str = parse_separator (str, &error);
954 if (error)
955 {
20203fb9 956 op1.error = _("Missing ','");
e135f41b
NC
957 break;
958 }
d3ce72d0 959 new_pointer = parse_expression (str, &op1);
e135f41b
NC
960 op1.code = 0;
961 op1.reloc.pc_rel = 1;
962 op1.reloc.type = BFD_RELOC_PDP11_DISP_6_PCREL;
963 if (op1.reloc.exp.X_op != O_symbol)
964 {
20203fb9 965 op1.error = _("Symbol expected");
e135f41b
NC
966 break;
967 }
968 if (op1.code & ~0x3f)
969 {
20203fb9 970 err = _("6-bit displacement out of range");
e135f41b
NC
971 break;
972 }
d3ce72d0 973 str = new_pointer;
e135f41b
NC
974 insn.code |= op1.code;
975 insn.reloc = op1.reloc;
976 }
977 break;
5cd4edbe 978
e135f41b
NC
979 default:
980 BAD_CASE (op->type);
981 }
982
983 if (op1.error)
984 err = op1.error;
985 else if (op2.error)
986 err = op2.error;
987 else
988 {
989 str = skip_whitespace (str);
990 if (*str)
20203fb9 991 err = _("Too many operands");
e135f41b
NC
992 }
993
994 {
995 char *to = NULL;
5cd4edbe 996
e135f41b
NC
997 if (err)
998 {
20203fb9 999 as_bad ("%s", err);
e135f41b
NC
1000 return;
1001 }
1002
1003 to = frag_more (size);
1004
1005 md_number_to_chars (to, insn.code, 2);
1006 if (insn.reloc.type != BFD_RELOC_NONE)
1007 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1008 &insn.reloc.exp, insn.reloc.pc_rel, insn.reloc.type);
1009 to += 2;
1010
1011 if (op1.additional)
1012 {
1013 md_number_to_chars (to, op1.word, 2);
1014 if (op1.reloc.type != BFD_RELOC_NONE)
1015 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1016 &op1.reloc.exp, op1.reloc.pc_rel, op1.reloc.type);
1017 to += 2;
1018 }
1019
1020 if (op2.additional)
1021 {
1022 md_number_to_chars (to, op2.word, 2);
1023 if (op2.reloc.type != BFD_RELOC_NONE)
1024 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1025 &op2.reloc.exp, op2.reloc.pc_rel, op2.reloc.type);
1026 }
1027 }
1028}
1029
1030int
4d5f9b2a
NC
1031md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
1032 segT segment ATTRIBUTE_UNUSED)
e135f41b
NC
1033{
1034 return 0;
1035}
1036
1037void
4d5f9b2a
NC
1038md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
1039 segT seg ATTRIBUTE_UNUSED,
1040 fragS *fragP ATTRIBUTE_UNUSED)
e135f41b
NC
1041{
1042}
1043
2b4f075a
HPN
1044int md_short_jump_size = 2;
1045int md_long_jump_size = 4;
e135f41b
NC
1046
1047void
4d5f9b2a
NC
1048md_create_short_jump (char *ptr ATTRIBUTE_UNUSED,
1049 addressT from_addr ATTRIBUTE_UNUSED,
1050 addressT to_addr ATTRIBUTE_UNUSED,
1051 fragS *frag ATTRIBUTE_UNUSED,
1052 symbolS *to_symbol ATTRIBUTE_UNUSED)
e135f41b
NC
1053{
1054}
1055
1056void
4d5f9b2a
NC
1057md_create_long_jump (char *ptr ATTRIBUTE_UNUSED,
1058 addressT from_addr ATTRIBUTE_UNUSED,
1059 addressT to_addr ATTRIBUTE_UNUSED,
1060 fragS *frag ATTRIBUTE_UNUSED,
1061 symbolS *to_symbol ATTRIBUTE_UNUSED)
e135f41b
NC
1062{
1063}
1064
1065static int
17b9d67d 1066set_cpu_model (const char *arg)
e135f41b
NC
1067{
1068 char buf[4];
1069 char *model = buf;
1070
1071 if (arg[0] == 'k')
1072 arg++;
1073
1074 *model++ = *arg++;
1075
1076 if (strchr ("abdx", model[-1]) == NULL)
1077 return 0;
1078
1079 if (model[-1] == 'd')
1080 {
4d5f9b2a 1081 if (arg[0] == 'f' || arg[0] == 'j')
e135f41b
NC
1082 model[-1] = *arg++;
1083 }
1084 else if (model[-1] == 'x')
1085 {
1086 if (arg[0] == 't')
1087 model[-1] = *arg++;
1088 }
1089
1090 if (arg[0] == '-')
1091 arg++;
1092
1093 if (strncmp (arg, "11", 2) != 0)
1094 return 0;
1095 arg += 2;
1096
1097 if (arg[0] == '-')
1098 {
1099 if (*++arg == 0)
1100 return 0;
1101 }
1102
4d5f9b2a 1103 /* Allow up to two revision letters. */
e135f41b
NC
1104 if (arg[0] != 0)
1105 *model++ = *arg++;
1106 if (arg[0] != 0)
1107 *model++ = *arg++;
1108
1109 *model++ = 0;
1110
1111 set_option ("no-extensions");
1112
4d5f9b2a
NC
1113 /* KA11 (11/15/20). */
1114 if (strncmp (buf, "a", 1) == 0)
1115 return 1; /* No extensions. */
e135f41b 1116
4d5f9b2a
NC
1117 /* KB11 (11/45/50/55/70). */
1118 else if (strncmp (buf, "b", 1) == 0)
1119 return set_option ("eis") && set_option ("spl");
e135f41b 1120
4d5f9b2a
NC
1121 /* KD11-A (11/35/40). */
1122 else if (strncmp (buf, "da", 2) == 0)
e135f41b
NC
1123 return set_option ("limited-eis");
1124
4d5f9b2a
NC
1125 /* KD11-B (11/05/10). */
1126 else if (strncmp (buf, "db", 2) == 0
1127 /* KD11-D (11/04). */
1128 || strncmp (buf, "dd", 2) == 0)
e135f41b
NC
1129 return 1; /* no extensions */
1130
4d5f9b2a
NC
1131 /* KD11-E (11/34). */
1132 else if (strncmp (buf, "de", 2) == 0)
1133 return set_option ("eis") && set_option ("mxps");
1134
1135 /* KD11-F (11/03). */
1136 else if (strncmp (buf, "df", 2) == 0
1137 /* KD11-H (11/03). */
1138 || strncmp (buf, "dh", 2) == 0
1139 /* KD11-Q (11/03). */
1140 || strncmp (buf, "dq", 2) == 0)
1141 return set_option ("limited-eis") && set_option ("mxps");
1142
1143 /* KD11-K (11/60). */
1144 else if (strncmp (buf, "dk", 2) == 0)
1145 return set_option ("eis")
1146 && set_option ("mxps")
1147 && set_option ("ucode");
1148
1149 /* KD11-Z (11/44). */
1150 else if (strncmp (buf, "dz", 2) == 0)
1151 return set_option ("csm")
1152 && set_option ("eis")
1153 && set_option ("mfpt")
1154 && set_option ("mxps")
1155 && set_option ("spl");
1156
1157 /* F11 (11/23/24). */
1158 else if (strncmp (buf, "f", 1) == 0)
1159 return set_option ("eis")
1160 && set_option ("mfpt")
1161 && set_option ("mxps");
1162
1163 /* J11 (11/53/73/83/84/93/94). */
1164 else if (strncmp (buf, "j", 1) == 0)
1165 return set_option ("csm")
1166 && set_option ("eis")
1167 && set_option ("mfpt")
1168 && set_option ("multiproc")
1169 && set_option ("mxps")
1170 && set_option ("spl");
1171
1172 /* T11 (11/21). */
1173 else if (strncmp (buf, "t", 1) == 0)
1174 return set_option ("limited-eis")
1175 && set_option ("mxps");
e135f41b
NC
1176
1177 else
1178 return 0;
1179}
1180
1181static int
17b9d67d 1182set_machine_model (const char *arg)
e135f41b 1183{
4d5f9b2a
NC
1184 if (strncmp (arg, "pdp-11/", 7) != 0
1185 && strncmp (arg, "pdp11/", 6) != 0
1186 && strncmp (arg, "11/", 3) != 0)
e135f41b
NC
1187 return 0;
1188
1189 if (strncmp (arg, "pdp", 3) == 0)
1190 arg += 3;
1191 if (arg[0] == '-')
1192 arg++;
1193 if (strncmp (arg, "11/", 3) == 0)
1194 arg += 3;
1195
4d5f9b2a
NC
1196 if (strcmp (arg, "03") == 0)
1197 return set_cpu_model ("kd11f");
1198
1199 else if (strcmp (arg, "04") == 0)
1200 return set_cpu_model ("kd11d");
e135f41b 1201
4d5f9b2a
NC
1202 else if (strcmp (arg, "05") == 0
1203 || strcmp (arg, "10") == 0)
1204 return set_cpu_model ("kd11b");
e135f41b 1205
4d5f9b2a
NC
1206 else if (strcmp (arg, "15") == 0
1207 || strcmp (arg, "20") == 0)
1208 return set_cpu_model ("ka11");
e135f41b 1209
4d5f9b2a
NC
1210 else if (strcmp (arg, "21") == 0)
1211 return set_cpu_model ("t11");
e135f41b 1212
4d5f9b2a
NC
1213 else if (strcmp (arg, "23") == 0
1214 || strcmp (arg, "24") == 0)
1215 return set_cpu_model ("f11");
e135f41b 1216
4d5f9b2a
NC
1217 else if (strcmp (arg, "34") == 0
1218 || strcmp (arg, "34a") == 0)
1219 return set_cpu_model ("kd11e");
e135f41b 1220
4d5f9b2a
NC
1221 else if (strcmp (arg, "35") == 0
1222 || strcmp (arg, "40") == 0)
1223 return set_cpu_model ("kd11da");
e135f41b 1224
4d5f9b2a
NC
1225 else if (strcmp (arg, "44") == 0)
1226 return set_cpu_model ("kd11dz");
e135f41b 1227
4d5f9b2a
NC
1228 else if (strcmp (arg, "45") == 0
1229 || strcmp (arg, "50") == 0
1230 || strcmp (arg, "55") == 0
1231 || strcmp (arg, "70") == 0)
1232 return set_cpu_model ("kb11");
e135f41b 1233
4d5f9b2a
NC
1234 else if (strcmp (arg, "60") == 0)
1235 return set_cpu_model ("kd11k");
e135f41b 1236
4d5f9b2a
NC
1237 else if (strcmp (arg, "53") == 0
1238 || strcmp (arg, "73") == 0
1239 || strcmp (arg, "83") == 0
1240 || strcmp (arg, "84") == 0
1241 || strcmp (arg, "93") == 0
1242 || strcmp (arg, "94") == 0)
1243 return set_cpu_model ("j11")
1244 && set_option ("fpp");
e135f41b 1245
e135f41b
NC
1246 else
1247 return 0;
1248}
1249
5a38dc70 1250const char *md_shortopts = "m:";
e135f41b
NC
1251
1252struct option md_longopts[] =
1253{
1254#define OPTION_CPU 257
1255 { "cpu", required_argument, NULL, OPTION_CPU },
1256#define OPTION_MACHINE 258
1257 { "machine", required_argument, NULL, OPTION_MACHINE },
1258#define OPTION_PIC 259
1259 { "pic", no_argument, NULL, OPTION_PIC },
1260 { NULL, no_argument, NULL, 0 }
1261};
1262
07726851 1263size_t md_longopts_size = sizeof (md_longopts);
e135f41b 1264
4d5f9b2a
NC
1265/* Invocation line includes a switch not recognized by the base assembler.
1266 See if it's a processor-specific option. */
e135f41b
NC
1267
1268int
17b9d67d 1269md_parse_option (int c, const char *arg)
e135f41b
NC
1270{
1271 init_defaults ();
1272
1273 switch (c)
1274 {
1275 case 'm':
1276 if (set_option (arg))
1277 return 1;
1278 if (set_cpu_model (arg))
1279 return 1;
1280 if (set_machine_model (arg))
1281 return 1;
1282 break;
1283
1284 case OPTION_CPU:
1285 if (set_cpu_model (arg))
1286 return 1;
1287 break;
1288
1289 case OPTION_MACHINE:
1290 if (set_machine_model (arg))
1291 return 1;
1292 break;
1293
1294 case OPTION_PIC:
1295 if (set_option ("pic"))
1296 return 1;
1297 break;
1298
1299 default:
1300 break;
1301 }
1302
e135f41b
NC
1303 return 0;
1304}
1305
e135f41b 1306void
4d5f9b2a 1307md_show_usage (FILE *stream)
e135f41b
NC
1308{
1309 fprintf (stream, "\
1310\n\
2b0f3761 1311PDP-11 instruction set extensions:\n\
e135f41b 1312\n\
33eaf5de 1313-m(no-)cis allow (disallow) commercial instruction set\n\
e135f41b
NC
1314-m(no-)csm allow (disallow) CSM instruction\n\
1315-m(no-)eis allow (disallow) full extended instruction set\n\
1316-m(no-)fis allow (disallow) KEV11 floating-point instructions\n\
1317-m(no-)fpp allow (disallow) FP-11 floating-point instructions\n\
1318-m(no-)fpu allow (disallow) FP-11 floating-point instructions\n\
1319-m(no-)limited-eis allow (disallow) limited extended instruction set\n\
1320-m(no-)mfpt allow (disallow) processor type instruction\n\
1321-m(no-)multiproc allow (disallow) multiprocessor instructions\n\
1322-m(no-)mxps allow (disallow) processor status instructions\n\
1323-m(no-)spl allow (disallow) SPL instruction\n\
1324-m(no-)ucode allow (disallow) microcode instructions\n\
1325-mall-extensions allow all instruction set extensions\n\
1326 (this is the default)\n\
33eaf5de
NC
1327-mno-extensions disallow all instruction set extensions\n\
1328-pic generate position-independent code\n\
e135f41b
NC
1329\n\
1330PDP-11 CPU model options:\n\
1331\n\
1332-mka11* KA11 CPU. base line instruction set only\n\
1333-mkb11* KB11 CPU. enable full EIS and SPL\n\
1334-mkd11a* KD11-A CPU. enable limited EIS\n\
1335-mkd11b* KD11-B CPU. base line instruction set only\n\
1336-mkd11d* KD11-D CPU. base line instruction set only\n\
1337-mkd11e* KD11-E CPU. enable full EIS, MTPS, and MFPS\n\
1338-mkd11f* KD11-F CPU. enable limited EIS, MTPS, and MFPS\n\
1339-mkd11h* KD11-H CPU. enable limited EIS, MTPS, and MFPS\n\
1340-mkd11q* KD11-Q CPU. enable limited EIS, MTPS, and MFPS\n\
1341-mkd11k* KD11-K CPU. enable full EIS, MTPS, MFPS, LDUB, MED,\n\
1342 XFC, and MFPT\n\
1343-mkd11z* KD11-Z CPU. enable full EIS, MTPS, MFPS, MFPT, SPL,\n\
1344 and CSM\n\
1345-mf11* F11 CPU. enable full EIS, MFPS, MTPS, and MFPT\n\
1346-mj11* J11 CPU. enable full EIS, MTPS, MFPS, MFPT, SPL,\n\
1347 CSM, TSTSET, and WRTLCK\n\
1348-mt11* T11 CPU. enable limited EIS, MTPS, and MFPS\n\
1349\n\
1350PDP-11 machine model options:\n\
1351\n\
1352-m11/03 same as -mkd11f\n\
1353-m11/04 same as -mkd11d\n\
1354-m11/05 same as -mkd11b\n\
1355-m11/10 same as -mkd11b\n\
1356-m11/15 same as -mka11\n\
1357-m11/20 same as -mka11\n\
1358-m11/21 same as -mt11\n\
1359-m11/23 same as -mf11\n\
1360-m11/24 same as -mf11\n\
1361-m11/34 same as -mkd11e\n\
1362-m11/34a same as -mkd11e -mfpp\n\
1363-m11/35 same as -mkd11a\n\
1364-m11/40 same as -mkd11a\n\
1365-m11/44 same as -mkd11z\n\
1366-m11/45 same as -mkb11\n\
1367-m11/50 same as -mkb11\n\
1368-m11/53 same as -mj11\n\
1369-m11/55 same as -mkb11\n\
1370-m11/60 same as -mkd11k\n\
1371-m11/70 same as -mkb11\n\
1372-m11/73 same as -mj11\n\
1373-m11/83 same as -mj11\n\
1374-m11/84 same as -mj11\n\
1375-m11/93 same as -mj11\n\
1376-m11/94 same as -mj11\n\
1377");
1378}
1379
1380symbolS *
4d5f9b2a 1381md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
e135f41b
NC
1382{
1383 return 0;
1384}
1385
1386valueT
4d5f9b2a
NC
1387md_section_align (segT segment ATTRIBUTE_UNUSED,
1388 valueT size)
e135f41b
NC
1389{
1390 return (size + 1) & ~1;
1391}
1392
1393long
4d5f9b2a 1394md_pcrel_from (fixS *fixP)
e135f41b
NC
1395{
1396 return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size;
1397}
1398
1399/* Translate internal representation of relocation info to BFD target
1400 format. */
4d5f9b2a 1401
e135f41b 1402arelent *
4d5f9b2a
NC
1403tc_gen_reloc (asection *section ATTRIBUTE_UNUSED,
1404 fixS *fixp)
e135f41b
NC
1405{
1406 arelent *reloc;
1407 bfd_reloc_code_real_type code;
1408
325801bd 1409 reloc = XNEW (arelent);
e135f41b 1410
325801bd 1411 reloc->sym_ptr_ptr = XNEW (asymbol *);
e135f41b
NC
1412 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1413 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1414
55cf6793 1415 /* This is taken account for in md_apply_fix(). */
e135f41b
NC
1416 reloc->addend = -symbol_get_bfdsym (fixp->fx_addsy)->section->vma;
1417
1418 switch (fixp->fx_r_type)
1419 {
1420 case BFD_RELOC_16:
1421 if (fixp->fx_pcrel)
1422 code = BFD_RELOC_16_PCREL;
1423 else
1424 code = BFD_RELOC_16;
1425 break;
1426
1427 case BFD_RELOC_16_PCREL:
1428 code = BFD_RELOC_16_PCREL;
1429 break;
1430
1431 default:
1432 BAD_CASE (fixp->fx_r_type);
1433 return NULL;
1434 }
1435
1436 reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
1437
1438 if (reloc->howto == NULL)
1439 {
1440 as_bad_where (fixp->fx_file, fixp->fx_line,
20203fb9 1441 _("Can not represent %s relocation in this object file format"),
e135f41b
NC
1442 bfd_get_reloc_code_name (code));
1443 return NULL;
1444 }
1445
1446 return reloc;
1447}
1448
1449void
4d5f9b2a 1450pseudo_bss (int c ATTRIBUTE_UNUSED)
e135f41b
NC
1451{
1452 int temp;
1453
1454 temp = get_absolute_expression ();
1455 subseg_set (bss_section, temp);
1456 demand_empty_rest_of_line ();
1457}
1458
1459void
4d5f9b2a 1460pseudo_even (int c ATTRIBUTE_UNUSED)
e135f41b
NC
1461{
1462 int alignment = 1; /* 2^1 */
1463 frag_align (alignment, 0, 1);
1464 record_alignment (now_seg, alignment);
1465}
499ac353 1466
6d4af3c2 1467const char *
499ac353
NC
1468md_atof (int type, char * litP, int * sizeP)
1469{
1470 return vax_md_atof (type, litP, sizeP);
1471}
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