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Add Nios II arch flags and compatibility tests
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b90efa5b 2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132
RH		 862
863 c = get_symbol_end ();
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
98027b10 1081md_parse_option (int c, char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1283 generate code for PowerPC 7400/7410/7450/7455\n\
1284-m750cl generate code for PowerPC 750cl\n"));
df12615d 1285 fprintf (stream, _("\
ce3d2015
AM		 1286-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1287-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1288-mbooke generate code for 32-bit PowerPC BookE\n\
1289-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1290-mpower4, -mpwr4 generate code for Power4 architecture\n\
1291-mpower5, -mpwr5, -mpwr5x\n\
1292 generate code for Power5 architecture\n\
1293-mpower6, -mpwr6 generate code for Power6 architecture\n\
1294-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1295-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1296-mcell generate code for Cell Broadband Engine architecture\n\
1297-mcom generate code Power/PowerPC common instructions\n\
1298-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1299 fprintf (stream, _("\
ce3d2015
AM		 1300-maltivec generate code for AltiVec\n\
1301-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1302-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1303-me300 generate code for PowerPC e300 family\n\
1304-me500, -me500x2 generate code for Motorola e500 core complex\n\
1305-me500mc, generate code for Freescale e500mc core complex\n\
1306-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1307-me5500, generate code for Freescale e5500 core complex\n\
1308-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1309-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1310-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1311-mtitan generate code for AppliedMicro Titan core complex\n\
1312-mregnames Allow symbolic names for registers\n\
1313-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1314#ifdef OBJ_ELF
bc805888 1315 fprintf (stream, _("\
ce3d2015
AM		 1316-mrelocatable support for GCC's -mrelocatble option\n\
1317-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1318-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1319-mlittle, -mlittle-endian, -le\n\
ce3d2015 1320 generate code for a little endian machine\n\
b8b738ac 1321-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1322 generate code for a big endian machine\n\
1323-msolaris generate code for Solaris\n\
1324-mno-solaris do not generate code for Solaris\n\
b8b738ac 1325-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1326-V print assembler version number\n\
1327-Qy, -Qn ignored\n"));
252b5132 1328#endif
cef4f754 1329 fprintf (stream, _("\
bf7279d5
AM		 1330-nops=count when aligning, more than COUNT nops uses a branch\n\
1331-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1332}
1333\f
1334/* Set ppc_cpu if it is not already set. */
1335
1336static void
98027b10 1337ppc_set_cpu (void)
252b5132
RH		 1338{
1339 const char *default_os = TARGET_OS;
1340 const char *default_cpu = TARGET_CPU;
1341
7102e95e 1342 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1343 {
2a98c3a6 1344 if (ppc_obj64)
bdc70b4a 1345 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1346 else if (strncmp (default_os, "aix", 3) == 0
1347 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1348 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1349 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1350 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1351 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1352 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1353 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1354 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1355 else
d6ed37ed 1356 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1357 default_cpu, default_os);
252b5132
RH		 1358 }
1359}
1360
9232bbb0
AM		 1361/* Figure out the BFD architecture to use. This function and ppc_mach
1362 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1363
1364enum bfd_architecture
98027b10 1365ppc_arch (void)
252b5132
RH		 1366{
1367 const char *default_cpu = TARGET_CPU;
1368 ppc_set_cpu ();
1369
1370 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1371 return bfd_arch_powerpc;
b9c361e0
JL		 1372 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1373 return bfd_arch_powerpc;
1374 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1375 return bfd_arch_rs6000;
b9c361e0 1376 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1377 {
1378 if (strcmp (default_cpu, "rs6000") == 0)
1379 return bfd_arch_rs6000;
0baf16f2 1380 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1381 return bfd_arch_powerpc;
1382 }
1383
d6ed37ed 1384 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1385 return bfd_arch_unknown;
1386}
1387
7f6d05e8 1388unsigned long
98027b10 1389ppc_mach (void)
7f6d05e8 1390{
2a98c3a6
AM		 1391 if (ppc_obj64)
1392 return bfd_mach_ppc64;
1393 else if (ppc_arch () == bfd_arch_rs6000)
1394 return bfd_mach_rs6k;
ce3d2015
AM		 1395 else if (ppc_cpu & PPC_OPCODE_TITAN)
1396 return bfd_mach_ppc_titan;
b9c361e0
JL		 1397 else if (ppc_cpu & PPC_OPCODE_VLE)
1398 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1399 else
1400 return bfd_mach_ppc;
7f6d05e8
CP		 1401}
1402
81d4177b 1403extern char*
98027b10 1404ppc_target_format (void)
7f6d05e8
CP		 1405{
1406#ifdef OBJ_COFF
1407#ifdef TE_PE
99a814a1 1408 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1409#elif TE_POWERMAC
0baf16f2 1410 return "xcoff-powermac";
7f6d05e8 1411#else
eb1e0e80 1412# ifdef TE_AIX5
edc1d652 1413 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1414# else
edc1d652 1415 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1416# endif
7f6d05e8 1417#endif
7f6d05e8
CP		 1418#endif
1419#ifdef OBJ_ELF
edc1d652
AM		 1420# ifdef TE_FreeBSD
1421 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1422# elif defined (TE_VXWORKS)
9d8504b1
PB		 1423 return "elf32-powerpc-vxworks";
1424# else
0baf16f2 1425 return (target_big_endian
2b3c4602
AM		 1426 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1427 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1428# endif
7f6d05e8
CP		 1429#endif
1430}
1431
b9c361e0
JL		 1432/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1433 Return TRUE if there's a problem, otherwise FALSE. */
1434
1435static bfd_boolean
1436insn_validate (const struct powerpc_opcode *op)
1437{
1438 const unsigned char *o;
1439 unsigned long omask = op->mask;
1440
1441 /* The mask had better not trim off opcode bits. */
1442 if ((op->opcode & omask) != op->opcode)
1443 {
1444 as_bad (_("mask trims opcode bits for %s"), op->name);
1445 return TRUE;
1446 }
1447
1448 /* The operands must not overlap the opcode or each other. */
1449 for (o = op->operands; *o; ++o)
1450 {
1451 if (*o >= num_powerpc_operands)
1452 {
1453 as_bad (_("operand index error for %s"), op->name);
1454 return TRUE;
1455 }
1456 else
1457 {
1458 const struct powerpc_operand *operand = &powerpc_operands[*o];
1459 if (operand->shift != PPC_OPSHIFT_INV)
1460 {
1461 unsigned long mask;
1462
1463 if (operand->shift >= 0)
1464 mask = operand->bitm << operand->shift;
1465 else
1466 mask = operand->bitm >> -operand->shift;
1467 if (omask & mask)
1468 {
1469 as_bad (_("operand %d overlap in %s"),
1470 (int) (o - op->operands), op->name);
1471 return TRUE;
1472 }
1473 omask |= mask;
1474 }
1475 }
1476 }
1477 return FALSE;
1478}
1479
69c040df 1480/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1481 for .machine pseudo. */
252b5132 1482
69c040df
AM		 1483static void
1484ppc_setup_opcodes (void)
252b5132 1485{
98027b10 1486 const struct powerpc_opcode *op;
252b5132
RH		 1487 const struct powerpc_opcode *op_end;
1488 const struct powerpc_macro *macro;
1489 const struct powerpc_macro *macro_end;
b84bf58a 1490 bfd_boolean bad_insn = FALSE;
252b5132 1491
69c040df
AM		 1492 if (ppc_hash != NULL)
1493 hash_die (ppc_hash);
1494 if (ppc_macro_hash != NULL)
1495 hash_die (ppc_macro_hash);
252b5132
RH		 1496
1497 /* Insert the opcodes into a hash table. */
1498 ppc_hash = hash_new ();
1499
c43a438d 1500 if (ENABLE_CHECKING)
b84bf58a 1501 {
c43a438d 1502 unsigned int i;
b84bf58a 1503
3b8b57a9
AM		 1504 /* An index into powerpc_operands is stored in struct fix
1505 fx_pcrel_adjust which is 8 bits wide. */
1506 gas_assert (num_powerpc_operands < 256);
1507
c43a438d
AM		 1508 /* Check operand masks. Code here and in the disassembler assumes
1509 all the 1's in the mask are contiguous. */
1510 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1511 {
c43a438d
AM		 1512 unsigned long mask = powerpc_operands[i].bitm;
1513 unsigned long right_bit;
1514 unsigned int j;
1515
1516 right_bit = mask & -mask;
1517 mask += right_bit;
1518 right_bit = mask & -mask;
1519 if (mask != right_bit)
1520 {
1521 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1522 bad_insn = TRUE;
1523 }
1524 for (j = i + 1; j < num_powerpc_operands; ++j)
1525 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1526 sizeof (powerpc_operands[0])) == 0)
1527 {
1528 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1529 j, i);
1530 bad_insn = TRUE;
1531 }
b84bf58a
AM		 1532 }
1533 }
1534
252b5132
RH		 1535 op_end = powerpc_opcodes + powerpc_num_opcodes;
1536 for (op = powerpc_opcodes; op < op_end; op++)
1537 {
c43a438d 1538 if (ENABLE_CHECKING)
b84bf58a 1539 {
d815f1a9 1540 if (op != powerpc_opcodes)
8dbcd839 1541 {
b9c361e0
JL		 1542 int old_opcode = PPC_OP (op[-1].opcode);
1543 int new_opcode = PPC_OP (op[0].opcode);
1544
1545#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1546 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1547 op->name, (unsigned int) (op - powerpc_opcodes),
1548 (unsigned int) new_opcode, (unsigned int) op->opcode,
1549 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1550#endif
1551
d815f1a9
AM		 1552 /* The major opcodes had better be sorted. Code in the
1553 disassembler assumes the insns are sorted according to
1554 major opcode. */
b9c361e0 1555 if (new_opcode < old_opcode)
d815f1a9
AM		 1556 {
1557 as_bad (_("major opcode is not sorted for %s"),
1558 op->name);
1559 bad_insn = TRUE;
1560 }
8dbcd839 1561 }
b9c361e0
JL		 1562 bad_insn |= insn_validate (op);
1563 }
c43a438d 1564
b9c361e0
JL		 1565 if ((ppc_cpu & op->flags) != 0
1566 && !(ppc_cpu & op->deprecated))
1567 {
1568 const char *retval;
1569
1570 retval = hash_insert (ppc_hash, op->name, (void *) op);
1571 if (retval != NULL)
c43a438d 1572 {
b9c361e0 1573 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1574 op->name);
1575 bad_insn = TRUE;
1576 }
b9c361e0
JL		 1577 }
1578 }
c43a438d 1579
b9c361e0
JL		 1580 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1581 for (op = powerpc_opcodes; op < op_end; op++)
1582 hash_insert (ppc_hash, op->name, (void *) op);
1583
1584 op_end = vle_opcodes + vle_num_opcodes;
1585 for (op = vle_opcodes; op < op_end; op++)
1586 {
1587 if (ENABLE_CHECKING)
1588 {
1589 if (op != vle_opcodes)
1590 {
1591 unsigned old_seg, new_seg;
1592
1593 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1594 old_seg = VLE_OP_TO_SEG (old_seg);
1595 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1596 new_seg = VLE_OP_TO_SEG (new_seg);
1597
1598#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1599 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1600 op->name, (unsigned int) (op - powerpc_opcodes),
1601 (unsigned int) new_seg, (unsigned int) op->opcode,
1602 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1603#endif
1604 /* The major opcodes had better be sorted. Code in the
1605 disassembler assumes the insns are sorted according to
1606 major opcode. */
1607 if (new_seg < old_seg)
1608 {
1609 as_bad (_("major opcode is not sorted for %s"),
1610 op->name);
1611 bad_insn = TRUE;
1612 }
1613 }
1614
1615 bad_insn |= insn_validate (op);
c43a438d 1616 }
252b5132 1617
bdc70b4a 1618 if ((ppc_cpu & op->flags) != 0
1cb0a767 1619 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1620 {
1621 const char *retval;
1622
98027b10 1623 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1624 if (retval != NULL)
252b5132 1625 {
b84bf58a 1626 as_bad (_("duplicate instruction %s"),
99a814a1 1627 op->name);
b84bf58a 1628 bad_insn = TRUE;
252b5132
RH		 1629 }
1630 }
1631 }
1632
b9c361e0
JL		 1633 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1634 for (op = vle_opcodes; op < op_end; op++)
98027b10 1635 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1636
252b5132
RH		 1637 /* Insert the macros into a hash table. */
1638 ppc_macro_hash = hash_new ();
1639
1640 macro_end = powerpc_macros + powerpc_num_macros;
1641 for (macro = powerpc_macros; macro < macro_end; macro++)
1642 {
33740db9 1643 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1644 {
1645 const char *retval;
1646
98027b10 1647 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1648 if (retval != (const char *) NULL)
1649 {
b84bf58a
AM		 1650 as_bad (_("duplicate macro %s"), macro->name);
1651 bad_insn = TRUE;
252b5132
RH		 1652 }
1653 }
1654 }
1655
b84bf58a 1656 if (bad_insn)
252b5132 1657 abort ();
69c040df
AM		 1658}
1659
1660/* This function is called when the assembler starts up. It is called
1661 after the options have been parsed and the output file has been
1662 opened. */
1663
1664void
98027b10 1665md_begin (void)
69c040df
AM		 1666{
1667 ppc_set_cpu ();
1668
1669 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1670 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1671
1672#ifdef OBJ_ELF
1673 /* Set the ELF flags if desired. */
1674 if (ppc_flags && !msolaris)
1675 bfd_set_private_flags (stdoutput, ppc_flags);
1676#endif
1677
1678 ppc_setup_opcodes ();
252b5132 1679
67c1ffbe 1680 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1681 by the user. */
252b5132
RH		 1682 if (!set_target_endian)
1683 {
1684 set_target_endian = 1;
1685 target_big_endian = PPC_BIG_ENDIAN;
1686 }
1687
1688#ifdef OBJ_XCOFF
1689 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1690
1691 /* Create dummy symbols to serve as initial csects. This forces the
1692 text csects to precede the data csects. These symbols will not
1693 be output. */
1694 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1695 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1696 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1697 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1698#endif
1699
1700#ifdef TE_PE
1701
1702 ppc_current_section = text_section;
81d4177b 1703 ppc_previous_section = 0;
252b5132
RH		 1704
1705#endif
1706}
1707
6a0c61b7 1708void
98027b10 1709ppc_cleanup (void)
6a0c61b7 1710{
dc1d03fc 1711#ifdef OBJ_ELF
6a0c61b7
EZ		 1712 if (ppc_apuinfo_list == NULL)
1713 return;
1714
1715 /* Ok, so write the section info out. We have this layout:
1716
1717 byte data what
1718 ---- ---- ----
1719 0 8 length of "APUinfo\0"
1720 4 (n*4) number of APU's (4 bytes each)
1721 8 2 note type 2
1722 12 "APUinfo\0" name
1723 20 APU#1 first APU's info
1724 24 APU#2 second APU's info
1725 ... ...
1726 */
1727 {
1728 char *p;
1729 asection *seg = now_seg;
1730 subsegT subseg = now_subseg;
1731 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1732 unsigned int i;
6a0c61b7
EZ		 1733
1734 /* Create the .PPC.EMB.apuinfo section. */
1735 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1736 bfd_set_section_flags (stdoutput,
1737 apuinfo_secp,
e1a9cb8e 1738 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1739
1740 p = frag_more (4);
1741 md_number_to_chars (p, (valueT) 8, 4);
1742
1743 p = frag_more (4);
e98d298c 1744 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1745
1746 p = frag_more (4);
1747 md_number_to_chars (p, (valueT) 2, 4);
1748
1749 p = frag_more (8);
1750 strcpy (p, "APUinfo");
1751
1752 for (i = 0; i < ppc_apuinfo_num; i++)
1753 {
b34976b6
AM		 1754 p = frag_more (4);
1755 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1756 }
1757
1758 frag_align (2, 0, 0);
1759
1760 /* We probably can't restore the current segment, for there likely
1761 isn't one yet... */
1762 if (seg && subseg)
1763 subseg_set (seg, subseg);
1764 }
dc1d03fc 1765#endif
6a0c61b7
EZ		 1766}
1767
252b5132
RH		 1768/* Insert an operand value into an instruction. */
1769
1770static unsigned long
a1867a27
AM		 1771ppc_insert_operand (unsigned long insn,
1772 const struct powerpc_operand *operand,
1773 offsetT val,
91d6fa6a 1774 ppc_cpu_t cpu,
a1867a27
AM		 1775 char *file,
1776 unsigned int line)
252b5132 1777{
b84bf58a 1778 long min, max, right;
eb42fac1 1779
b84bf58a
AM		 1780 max = operand->bitm;
1781 right = max & -max;
1782 min = 0;
1783
a47622ac 1784 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1785 {
a47622ac
AM		 1786 /* Extend the allowed range for addis to [-65536, 65535].
1787 Similarly for some VLE high part insns. For 64-bit it
1788 would be good to disable this for signed fields since the
1789 value is sign extended into the high 32 bits of the register.
1790 If the value is, say, an address, then we might care about
1791 the high bits. However, gcc as of 2014-06 uses unsigned
1792 values when loading the high part of 64-bit constants using
1793 lis.
1794 Use the same extended range for cmpli, to allow at least
1795 [-32768, 65535]. */
1796 min = ~max & -right;
1797 }
1798 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1799 {
1800 max = (max >> 1) & -right;
931774a9 1801 min = ~max & -right;
b84bf58a 1802 }
252b5132 1803
b84bf58a 1804 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1805 max++;
252b5132 1806
b84bf58a 1807 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1808 {
1809 long tmp = min;
1810 min = -max;
1811 max = -tmp;
1812 }
b84bf58a 1813
a1867a27
AM		 1814 if (min <= max)
1815 {
1816 /* Some people write constants with the sign extension done by
1817 hand but only up to 32 bits. This shouldn't really be valid,
1818 but, to permit this code to assemble on a 64-bit host, we
1819 sign extend the 32-bit value to 64 bits if so doing makes the
1820 value valid. */
1821 if (val > max
1822 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1823 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1824 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1825 val = val - 0x80000000 - 0x80000000;
1826
1827 /* Similarly, people write expressions like ~(1<<15), and expect
1828 this to be OK for a 32-bit unsigned value. */
1829 else if (val < min
1830 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1832 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1833 val = val + 0x80000000 + 0x80000000;
1834
1835 else if (val < min
1836 || val > max
1837 || (val & (right - 1)) != 0)
1838 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1839 }
b84bf58a 1840
252b5132
RH		 1841 if (operand->insert)
1842 {
1843 const char *errmsg;
1844
1845 errmsg = NULL;
91d6fa6a 1846 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1847 if (errmsg != (const char *) NULL)
ee2c9aa9 1848 as_bad_where (file, line, "%s", errmsg);
252b5132 1849 }
b9c361e0 1850 else if (operand->shift >= 0)
b84bf58a 1851 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1852 else
1853 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1854
1855 return insn;
1856}
1857
1858\f
1859#ifdef OBJ_ELF
1860/* Parse @got, etc. and return the desired relocation. */
1861static bfd_reloc_code_real_type
98027b10 1862ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1863{
1864 struct map_bfd {
1865 char *string;
b7d7dc63
AM		 1866 unsigned int length : 8;
1867 unsigned int valid32 : 1;
1868 unsigned int valid64 : 1;
1869 unsigned int reloc;
252b5132
RH		 1870 };
1871
1872 char ident[20];
1873 char *str = *str_p;
1874 char *str2;
1875 int ch;
1876 int len;
15c1449b 1877 const struct map_bfd *ptr;
252b5132 1878
b7d7dc63
AM		 1879#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1880#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1881#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1882
15c1449b 1883 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1884 MAP ("l", BFD_RELOC_LO16),
1885 MAP ("h", BFD_RELOC_HI16),
1886 MAP ("ha", BFD_RELOC_HI16_S),
1887 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1888 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1889 MAP ("got", BFD_RELOC_16_GOTOFF),
1890 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1891 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1892 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1893 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1894 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1895 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1896 MAP ("copy", BFD_RELOC_PPC_COPY),
1897 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1898 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1899 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1900 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1901 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1902 MAP ("tls", BFD_RELOC_PPC_TLS),
1903 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1904 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1905 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1906 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1907 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1908 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1909 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1910 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1911 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1912 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1913 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1914 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1915 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1916 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1917 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1918 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1919 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1920 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1921 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1922 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1923 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1924 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1925 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1926 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1927 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1928 MAP32 ("fixup", BFD_RELOC_CTOR),
1929 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1930 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1932 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1934 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1935 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1936 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1937 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1938 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1939 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1940 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1941 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1942 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1943 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1944 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1945 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1946 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1947 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1948 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1949 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1950 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1951 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1952 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1953 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1954 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1955 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1956 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1957 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1958 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1959 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1960 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1961 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1962 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1963 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1964 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1965 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1966 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1967 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1968 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1969 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1970 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1971 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1972 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1973 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1974 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1975 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1976 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1977 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1978 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1979 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1980 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1981 };
1982
1983 if (*str++ != '@')
62ebcb5c 1984 return BFD_RELOC_NONE;
252b5132
RH		 1985
1986 for (ch = *str, str2 = ident;
1987 (str2 < ident + sizeof (ident) - 1
3882b010 1988 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1989 ch = *++str)
1990 {
3882b010 1991 *str2++ = TOLOWER (ch);
252b5132
RH		 1992 }
1993
1994 *str2 = '\0';
1995 len = str2 - ident;
1996
1997 ch = ident[0];
1998 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1999 if (ch == ptr->string[0]
2000 && len == ptr->length
b7d7dc63
AM		 2001 && memcmp (ident, ptr->string, ptr->length) == 0
2002 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2003 {
15c1449b
AM		 2004 int reloc = ptr->reloc;
2005
727fc41e
AM		 2006 if (!ppc_obj64 && exp_p->X_add_number != 0)
2007 {
2008 switch (reloc)
2009 {
2010 case BFD_RELOC_16_GOTOFF:
2011 case BFD_RELOC_LO16_GOTOFF:
2012 case BFD_RELOC_HI16_GOTOFF:
2013 case BFD_RELOC_HI16_S_GOTOFF:
2014 as_warn (_("identifier+constant@got means "
2015 "identifier@got+constant"));
2016 break;
2017
2018 case BFD_RELOC_PPC_GOT_TLSGD16:
2019 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2022 case BFD_RELOC_PPC_GOT_TLSLD16:
2023 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2026 case BFD_RELOC_PPC_GOT_DTPREL16:
2027 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2030 case BFD_RELOC_PPC_GOT_TPREL16:
2031 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2032 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2034 as_bad (_("symbol+offset not supported for got tls"));
2035 break;
2036 }
2037 }
5f6db75a
AM		 2038
2039 /* Now check for identifier@suffix+constant. */
2040 if (*str == '-' || *str == '+')
252b5132 2041 {
5f6db75a
AM		 2042 char *orig_line = input_line_pointer;
2043 expressionS new_exp;
2044
2045 input_line_pointer = str;
2046 expression (&new_exp);
2047 if (new_exp.X_op == O_constant)
252b5132 2048 {
5f6db75a
AM		 2049 exp_p->X_add_number += new_exp.X_add_number;
2050 str = input_line_pointer;
252b5132 2051 }
5f6db75a
AM		 2052
2053 if (&input_line_pointer != str_p)
2054 input_line_pointer = orig_line;
252b5132 2055 }
252b5132 2056 *str_p = str;
0baf16f2 2057
2b3c4602 2058 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2059 && exp_p->X_op == O_symbol
2060 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2061 {
9f2b53d7
AM		 2062 /* Change the symbol so that the dummy .TOC. symbol can be
2063 omitted from the object file. */
0baf16f2
AM		 2064 exp_p->X_add_symbol = &abs_symbol;
2065 }
2066
15c1449b 2067 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2068 }
2069
62ebcb5c 2070 return BFD_RELOC_NONE;
252b5132
RH		 2071}
2072
62ebcb5c 2073/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2074
62ebcb5c
AM		 2075bfd_reloc_code_real_type
2076ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2077{
2078 expression (exp);
2079 if (nbytes >= 2 && *input_line_pointer == '@')
2080 return ppc_elf_suffix (&input_line_pointer, exp);
2081 return BFD_RELOC_NONE;
252b5132
RH		 2082}
2083
bf7279d5
AM		 2084/* Warn when emitting data to code sections, unless we are emitting
2085 a relocation that ld --ppc476-workaround uses to recognise data
2086 *and* there was an unconditional branch prior to the data. */
2087
2088void
2089ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2090 unsigned int nbytes, fixS *fix)
2091{
2092 if (warn_476
2093 && (now_seg->flags & SEC_CODE) != 0
2094 && (nbytes != 4
2095 || fix == NULL
2096 || !(fix->fx_r_type == BFD_RELOC_32
2097 || fix->fx_r_type == BFD_RELOC_CTOR
2098 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2099 || !(last_seg == now_seg && last_subseg == now_subseg)
2100 || !((last_insn & (0x3f << 26)) == (18u << 26)
2101 || ((last_insn & (0x3f << 26)) == (16u << 26)
2102 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2103 || ((last_insn & (0x3f << 26)) == (19u << 26)
2104 && (last_insn & (0x3ff << 1)) == (16u << 1)
2105 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2106 {
2107 /* Flag that we've warned. */
2108 if (fix != NULL)
2109 fix->fx_tcbit = 1;
2110
2111 as_warn (_("data in executable section"));
2112 }
2113}
2114
252b5132
RH		 2115/* Solaris pseduo op to change to the .rodata section. */
2116static void
98027b10 2117ppc_elf_rdata (int xxx)
252b5132
RH		 2118{
2119 char *save_line = input_line_pointer;
2120 static char section[] = ".rodata\n";
2121
99a814a1 2122 /* Just pretend this is .section .rodata */
252b5132
RH		 2123 input_line_pointer = section;
2124 obj_elf_section (xxx);
2125
2126 input_line_pointer = save_line;
2127}
2128
99a814a1 2129/* Pseudo op to make file scope bss items. */
252b5132 2130static void
98027b10 2131ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2132{
98027b10
AM		 2133 char *name;
2134 char c;
2135 char *p;
252b5132 2136 offsetT size;
98027b10 2137 symbolS *symbolP;
252b5132
RH		 2138 offsetT align;
2139 segT old_sec;
2140 int old_subsec;
2141 char *pfrag;
2142 int align2;
2143
2144 name = input_line_pointer;
2145 c = get_symbol_end ();
2146
99a814a1 2147 /* just after name is now '\0'. */
252b5132
RH		 2148 p = input_line_pointer;
2149 *p = c;
2150 SKIP_WHITESPACE ();
2151 if (*input_line_pointer != ',')
2152 {
d6ed37ed 2153 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2154 ignore_rest_of_line ();
2155 return;
2156 }
2157
2158 input_line_pointer++; /* skip ',' */
2159 if ((size = get_absolute_expression ()) < 0)
2160 {
2161 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2162 ignore_rest_of_line ();
2163 return;
2164 }
2165
2166 /* The third argument to .lcomm is the alignment. */
2167 if (*input_line_pointer != ',')
2168 align = 8;
2169 else
2170 {
2171 ++input_line_pointer;
2172 align = get_absolute_expression ();
2173 if (align <= 0)
2174 {
2175 as_warn (_("ignoring bad alignment"));
2176 align = 8;
2177 }
2178 }
2179
2180 *p = 0;
2181 symbolP = symbol_find_or_make (name);
2182 *p = c;
2183
2184 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2185 {
d6ed37ed 2186 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2187 S_GET_NAME (symbolP));
2188 ignore_rest_of_line ();
2189 return;
2190 }
2191
2192 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2193 {
d6ed37ed 2194 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2195 S_GET_NAME (symbolP),
2196 (long) S_GET_VALUE (symbolP),
2197 (long) size);
2198
2199 ignore_rest_of_line ();
2200 return;
2201 }
2202
99a814a1 2203 /* Allocate_bss. */
252b5132
RH		 2204 old_sec = now_seg;
2205 old_subsec = now_subseg;
2206 if (align)
2207 {
99a814a1 2208 /* Convert to a power of 2 alignment. */
252b5132
RH		 2209 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2210 if (align != 1)
2211 {
d6ed37ed 2212 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2213 ignore_rest_of_line ();
2214 return;
2215 }
2216 }
2217 else
2218 align2 = 0;
2219
2220 record_alignment (bss_section, align2);
cbe02d4f 2221 subseg_set (bss_section, 1);
252b5132
RH		 2222 if (align2)
2223 frag_align (align2, 0, 0);
2224 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2225 symbol_get_frag (symbolP)->fr_symbol = 0;
2226 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2227 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2228 (char *) 0);
2229 *pfrag = 0;
2230 S_SET_SIZE (symbolP, size);
2231 S_SET_SEGMENT (symbolP, bss_section);
2232 subseg_set (old_sec, old_subsec);
2233 demand_empty_rest_of_line ();
2234}
2235
6911b7dc
AM		 2236/* Pseudo op to set symbol local entry point. */
2237static void
2238ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2239{
2240 char *name = input_line_pointer;
2241 char c = get_symbol_end ();
2242 char *p;
2243 expressionS exp;
2244 symbolS *sym;
2245 asymbol *bfdsym;
2246 elf_symbol_type *elfsym;
2247
2248 p = input_line_pointer;
2249 *p = c;
2250 SKIP_WHITESPACE ();
2251 if (*input_line_pointer != ',')
2252 {
2253 *p = 0;
2254 as_bad (_("expected comma after name `%s' in .localentry directive"),
2255 name);
2256 *p = c;
2257 ignore_rest_of_line ();
2258 return;
2259 }
2260 input_line_pointer++;
2261 expression (&exp);
2262 if (exp.X_op == O_absent)
2263 {
2264 as_bad (_("missing expression in .localentry directive"));
2265 exp.X_op = O_constant;
2266 exp.X_add_number = 0;
2267 }
2268 *p = 0;
2269 sym = symbol_find_or_make (name);
2270 *p = c;
2271
2272 if (resolve_expression (&exp)
2273 && exp.X_op == O_constant)
2274 {
2275 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2276
e2b5892e 2277 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2278 as_bad (_(".localentry expression for `%s' "
2279 "is not a valid power of 2"), S_GET_NAME (sym));
2280 else
2281 {
2282 bfdsym = symbol_get_bfdsym (sym);
2283 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2284 gas_assert (elfsym);
2285 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2286 elfsym->internal_elf_sym.st_other |= encoded;
2287 if (ppc_abiversion == 0)
2288 ppc_abiversion = 2;
2289 }
2290 }
2291 else
2292 as_bad (_(".localentry expression for `%s' "
2293 "does not evaluate to a constant"), S_GET_NAME (sym));
2294
2295 demand_empty_rest_of_line ();
2296}
2297
ee67d69a
AM		 2298/* Pseudo op to set ABI version. */
2299static void
2300ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2301{
2302 expressionS exp;
2303
2304 expression (&exp);
2305 if (exp.X_op == O_absent)
2306 {
2307 as_bad (_("missing expression in .abiversion directive"));
2308 exp.X_op = O_constant;
2309 exp.X_add_number = 0;
2310 }
2311
2312 if (resolve_expression (&exp)
2313 && exp.X_op == O_constant)
2314 ppc_abiversion = exp.X_add_number;
2315 else
2316 as_bad (_(".abiversion expression does not evaluate to a constant"));
2317 demand_empty_rest_of_line ();
2318}
2319
2320/* Set ABI version in output file. */
2321void
2322ppc_elf_end (void)
2323{
2324 if (ppc_obj64 && ppc_abiversion != 0)
2325 {
2326 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2327 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2328 }
2329}
2330
252b5132
RH		 2331/* Validate any relocations emitted for -mrelocatable, possibly adding
2332 fixups for word relocations in writable segments, so we can adjust
2333 them at runtime. */
2334static void
98027b10 2335ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2336{
2337 if (fixp->fx_done || fixp->fx_pcrel)
2338 return;
2339
2340 switch (shlib)
2341 {
2342 case SHLIB_NONE:
2343 case SHLIB_PIC:
2344 return;
2345
5d6f4f16 2346 case SHLIB_MRELOCATABLE:
62ebcb5c 2347 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2348 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2349 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2351 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2352 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2353 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2355 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2356 && strcmp (segment_name (seg), ".got2") != 0
2357 && strcmp (segment_name (seg), ".dtors") != 0
2358 && strcmp (segment_name (seg), ".ctors") != 0
2359 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2360 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2361 && strcmp (segment_name (seg), ".eh_frame") != 0
2362 && strcmp (segment_name (seg), ".ex_shared") != 0)
2363 {
2364 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2365 || fixp->fx_r_type != BFD_RELOC_CTOR)
2366 {
2367 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2368 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2369 }
2370 }
2371 return;
2372 }
2373}
0baf16f2 2374
7e8d4ab4
AM		 2375/* Prevent elf_frob_file_before_adjust removing a weak undefined
2376 function descriptor sym if the corresponding code sym is used. */
2377
2378void
98027b10 2379ppc_frob_file_before_adjust (void)
0baf16f2 2380{
7e8d4ab4 2381 symbolS *symp;
9232bbb0 2382 asection *toc;
0baf16f2 2383
7e8d4ab4
AM		 2384 if (!ppc_obj64)
2385 return;
2386
2387 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2388 {
7e8d4ab4
AM		 2389 const char *name;
2390 char *dotname;
2391 symbolS *dotsym;
2392 size_t len;
2393
2394 name = S_GET_NAME (symp);
2395 if (name[0] == '.')
2396 continue;
2397
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2400 continue;
2401
2402 len = strlen (name) + 1;
2403 dotname = xmalloc (len + 1);
2404 dotname[0] = '.';
2405 memcpy (dotname + 1, name, len);
461b725f 2406 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2407 free (dotname);
2408 if (dotsym != NULL && (symbol_used_p (dotsym)
2409 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2410 symbol_mark_used (symp);
2411
0baf16f2
AM		 2412 }
2413
9232bbb0
AM		 2414 toc = bfd_get_section_by_name (stdoutput, ".toc");
2415 if (toc != NULL
01efc3af 2416 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2417 && bfd_section_size (stdoutput, toc) > 0x10000)
2418 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2419}
2420
2421/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2422 emitted. Other uses of .TOC. will cause the symbol to be marked
2423 with BSF_KEEP in md_apply_fix. */
9232bbb0 2424
a38a07e0
AM		 2425void
2426ppc_elf_adjust_symtab (void)
2427{
2428 if (ppc_obj64)
2429 {
2430 symbolS *symp;
2431 symp = symbol_find (".TOC.");
2432 if (symp != NULL)
2433 {
2434 asymbol *bsym = symbol_get_bfdsym (symp);
2435 if ((bsym->flags & BSF_KEEP) == 0)
2436 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2437 }
2438 }
0baf16f2 2439}
252b5132
RH		 2440#endif /* OBJ_ELF */
2441\f
2442#ifdef TE_PE
2443
2444/*
99a814a1 2445 * Summary of parse_toc_entry.
252b5132
RH		 2446 *
2447 * in: Input_line_pointer points to the '[' in one of:
2448 *
2449 * [toc] [tocv] [toc32] [toc64]
2450 *
2451 * Anything else is an error of one kind or another.
2452 *
81d4177b 2453 * out:
252b5132
RH		 2454 * return value: success or failure
2455 * toc_kind: kind of toc reference
2456 * input_line_pointer:
2457 * success: first char after the ']'
2458 * failure: unchanged
2459 *
2460 * settings:
2461 *
2462 * [toc] - rv == success, toc_kind = default_toc
2463 * [tocv] - rv == success, toc_kind = data_in_toc
2464 * [toc32] - rv == success, toc_kind = must_be_32
2465 * [toc64] - rv == success, toc_kind = must_be_64
2466 *
2467 */
2468
81d4177b
KH		 2469enum toc_size_qualifier
2470{
252b5132
RH		 2471 default_toc, /* The toc cell constructed should be the system default size */
2472 data_in_toc, /* This is a direct reference to a toc cell */
2473 must_be_32, /* The toc cell constructed must be 32 bits wide */
2474 must_be_64 /* The toc cell constructed must be 64 bits wide */
2475};
2476
2477static int
98027b10 2478parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2479{
2480 char *start;
2481 char *toc_spec;
2482 char c;
2483 enum toc_size_qualifier t;
2484
99a814a1 2485 /* Save the input_line_pointer. */
252b5132
RH		 2486 start = input_line_pointer;
2487
99a814a1 2488 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2489 ++input_line_pointer;
2490 SKIP_WHITESPACE ();
81d4177b 2491
99a814a1 2492 /* Find the spelling of the operand. */
252b5132
RH		 2493 toc_spec = input_line_pointer;
2494 c = get_symbol_end ();
2495
99a814a1 2496 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2497 {
2498 t = default_toc;
2499 }
99a814a1 2500 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2501 {
2502 t = data_in_toc;
2503 }
99a814a1 2504 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2505 {
2506 t = must_be_32;
2507 }
99a814a1 2508 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2509 {
2510 t = must_be_64;
2511 }
2512 else
2513 {
2514 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2515 *input_line_pointer = c;
2516 input_line_pointer = start;
252b5132
RH		 2517 return 0;
2518 }
2519
99a814a1
AM		 2520 /* Now find the ']'. */
2521 *input_line_pointer = c;
252b5132 2522
81d4177b
KH		 2523 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2524 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2525
2526 if (c != ']')
2527 {
2528 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2529 input_line_pointer = start;
252b5132
RH		 2530 return 0;
2531 }
2532
99a814a1 2533 *toc_kind = t;
252b5132
RH		 2534 return 1;
2535}
2536#endif
3b8b57a9 2537
3e60bf4d 2538#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2539/* See whether a symbol is in the TOC section. */
2540
2541static int
2542ppc_is_toc_sym (symbolS *sym)
2543{
3e60bf4d 2544#ifdef OBJ_XCOFF
9f6e76f4
TG		 2545 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2546 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2547#endif
3e60bf4d
AM		 2548#ifdef OBJ_ELF
2549 const char *sname = segment_name (S_GET_SEGMENT (sym));
2550 if (ppc_obj64)
2551 return strcmp (sname, ".toc") == 0;
2552 else
2553 return strcmp (sname, ".got") == 0;
2554#endif
2555}
2556#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2557\f
2558
dc1d03fc 2559#ifdef OBJ_ELF
6a0c61b7
EZ		 2560#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2561static void
98027b10 2562ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2563{
2564 unsigned int i;
2565
2566 /* Check we don't already exist. */
2567 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2568 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2569 return;
b34976b6 2570
6a0c61b7
EZ		 2571 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2572 {
2573 if (ppc_apuinfo_num_alloc == 0)
2574 {
2575 ppc_apuinfo_num_alloc = 4;
2576 ppc_apuinfo_list = (unsigned long *)
2577 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2578 }
2579 else
2580 {
2581 ppc_apuinfo_num_alloc += 4;
2582 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2583 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2584 }
2585 }
dc1d03fc 2586 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2587}
2588#undef APUID
dc1d03fc 2589#endif
6a0c61b7
EZ		 2590\f
2591
252b5132
RH		 2592/* We need to keep a list of fixups. We can't simply generate them as
2593 we go, because that would require us to first create the frag, and
2594 that would screw up references to ``.''. */
2595
2596struct ppc_fixup
2597{
2598 expressionS exp;
2599 int opindex;
2600 bfd_reloc_code_real_type reloc;
2601};
2602
2603#define MAX_INSN_FIXUPS (5)
2604
b9c361e0
JL		 2605/* Form I16L. */
2606#define E_OR2I_INSN 0x7000C000
2607#define E_AND2I_DOT_INSN 0x7000C800
2608#define E_OR2IS_INSN 0x7000D000
2609#define E_LIS_INSN 0x7000E000
2610#define E_AND2IS_DOT_INSN 0x7000E800
2611
2612/* Form I16A. */
2613#define E_ADD2I_DOT_INSN 0x70008800
2614#define E_ADD2IS_INSN 0x70009000
2615#define E_CMP16I_INSN 0x70009800
2616#define E_MULL2I_INSN 0x7000A000
2617#define E_CMPL16I_INSN 0x7000A800
2618#define E_CMPH16I_INSN 0x7000B000
2619#define E_CMPHL16I_INSN 0x7000B800
2620
252b5132
RH		 2621/* This routine is called for each instruction to be assembled. */
2622
2623void
98027b10 2624md_assemble (char *str)
252b5132
RH		 2625{
2626 char *s;
2627 const struct powerpc_opcode *opcode;
2628 unsigned long insn;
2629 const unsigned char *opindex_ptr;
2630 int skip_optional;
2631 int need_paren;
2632 int next_opindex;
2633 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2634 int fc;
2635 char *f;
09b935ac 2636 int addr_mod;
252b5132 2637 int i;
b9c361e0 2638 unsigned int insn_length;
252b5132
RH		 2639
2640 /* Get the opcode. */
3882b010 2641 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2642 ;
2643 if (*s != '\0')
2644 *s++ = '\0';
2645
2646 /* Look up the opcode in the hash table. */
2647 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2648 if (opcode == (const struct powerpc_opcode *) NULL)
2649 {
2650 const struct powerpc_macro *macro;
2651
2652 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2653 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2654 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2655 else
2656 ppc_macro (s, macro);
2657
2658 return;
2659 }
2660
2661 insn = opcode->opcode;
2662
2663 str = s;
3882b010 2664 while (ISSPACE (*str))
252b5132
RH		 2665 ++str;
2666
2667 /* PowerPC operands are just expressions. The only real issue is
2668 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2669 an optional operand separate the operands only with commas (in some
2670 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2671 have optional operands). Most instructions with optional operands
2672 have only one. Those that have more than one optional operand can
2673 take either all their operands or none. So, before we start seriously
2674 parsing the operands, we check to see if we have optional operands,
2675 and if we do, we count the number of commas to see which operands
2676 have been omitted. */
252b5132
RH		 2677 skip_optional = 0;
2678 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2679 {
2680 const struct powerpc_operand *operand;
2681
2682 operand = &powerpc_operands[*opindex_ptr];
2683 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2684 {
2685 unsigned int opcount;
7fe9cf6b 2686 unsigned int num_operands_expected;
252b5132
RH		 2687
2688 /* There is an optional operand. Count the number of
2689 commas in the input line. */
2690 if (*str == '\0')
2691 opcount = 0;
2692 else
2693 {
2694 opcount = 1;
2695 s = str;
2696 while ((s = strchr (s, ',')) != (char *) NULL)
2697 {
2698 ++opcount;
2699 ++s;
2700 }
2701 }
2702
7fe9cf6b
NC		 2703 /* Compute the number of expected operands.
2704 Do not count fake operands. */
2705 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2706 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2707 ++ num_operands_expected;
2708
252b5132
RH		 2709 /* If there are fewer operands in the line then are called
2710 for by the instruction, we want to skip the optional
1f6c9eb0 2711 operands. */
7fe9cf6b 2712 if (opcount < num_operands_expected)
252b5132
RH		 2713 skip_optional = 1;
2714
2715 break;
2716 }
2717 }
2718
2719 /* Gather the operands. */
2720 need_paren = 0;
2721 next_opindex = 0;
2722 fc = 0;
2723 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2724 {
2725 const struct powerpc_operand *operand;
2726 const char *errmsg;
2727 char *hold;
2728 expressionS ex;
2729 char endc;
2730
2731 if (next_opindex == 0)
2732 operand = &powerpc_operands[*opindex_ptr];
2733 else
2734 {
2735 operand = &powerpc_operands[next_opindex];
2736 next_opindex = 0;
2737 }
252b5132
RH		 2738 errmsg = NULL;
2739
2740 /* If this is a fake operand, then we do not expect anything
2741 from the input. */
2742 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2743 {
2b3c4602 2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2745 if (errmsg != (const char *) NULL)
ee2c9aa9 2746 as_bad ("%s", errmsg);
252b5132
RH		 2747 continue;
2748 }
2749
2750 /* If this is an optional operand, and we are skipping it, just
2751 insert a zero. */
2752 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2753 && skip_optional)
2754 {
11a0cf2e 2755 long val = ppc_optional_operand_value (operand);
252b5132
RH		 2756 if (operand->insert)
2757 {
11a0cf2e 2758 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
252b5132 2759 if (errmsg != (const char *) NULL)
ee2c9aa9 2760 as_bad ("%s", errmsg);
252b5132 2761 }
11a0cf2e
PB		 2762 else if (operand->shift >= 0)
2763 insn |= ((long) val & operand->bitm) << operand->shift;
2764 else
2765 insn |= ((long) val & operand->bitm) >> -operand->shift;
2766
252b5132
RH		 2767 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2768 next_opindex = *opindex_ptr + 1;
2769 continue;
2770 }
2771
2772 /* Gather the operand. */
2773 hold = input_line_pointer;
2774 input_line_pointer = str;
2775
2776#ifdef TE_PE
81d4177b 2777 if (*input_line_pointer == '[')
252b5132
RH		 2778 {
2779 /* We are expecting something like the second argument here:
99a814a1
AM		 2780 *
2781 * lwz r4,[toc].GS.0.static_int(rtoc)
2782 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2783 * The argument following the `]' must be a symbol name, and the
2784 * register must be the toc register: 'rtoc' or '2'
2785 *
2786 * The effect is to 0 as the displacement field
2787 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2788 * the appropriate variation) reloc against it based on the symbol.
2789 * The linker will build the toc, and insert the resolved toc offset.
2790 *
2791 * Note:
2792 * o The size of the toc entry is currently assumed to be
2793 * 32 bits. This should not be assumed to be a hard coded
2794 * number.
2795 * o In an effort to cope with a change from 32 to 64 bits,
2796 * there are also toc entries that are specified to be
2797 * either 32 or 64 bits:
2798 * lwz r4,[toc32].GS.0.static_int(rtoc)
2799 * lwz r4,[toc64].GS.0.static_int(rtoc)
2800 * These demand toc entries of the specified size, and the
2801 * instruction probably requires it.
2802 */
252b5132
RH		 2803
2804 int valid_toc;
2805 enum toc_size_qualifier toc_kind;
2806 bfd_reloc_code_real_type toc_reloc;
2807
99a814a1
AM		 2808 /* Go parse off the [tocXX] part. */
2809 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2810
81d4177b 2811 if (!valid_toc)
252b5132 2812 {
a5840dce
AM		 2813 ignore_rest_of_line ();
2814 break;
252b5132
RH		 2815 }
2816
99a814a1
AM		 2817 /* Now get the symbol following the ']'. */
2818 expression (&ex);
252b5132
RH		 2819
2820 switch (toc_kind)
2821 {
2822 case default_toc:
99a814a1
AM		 2823 /* In this case, we may not have seen the symbol yet,
2824 since it is allowed to appear on a .extern or .globl
2825 or just be a label in the .data section. */
252b5132
RH		 2826 toc_reloc = BFD_RELOC_PPC_TOC16;
2827 break;
2828 case data_in_toc:
99a814a1
AM		 2829 /* 1. The symbol must be defined and either in the toc
2830 section, or a global.
2831 2. The reloc generated must have the TOCDEFN flag set
2832 in upper bit mess of the reloc type.
2833 FIXME: It's a little confusing what the tocv
2834 qualifier can be used for. At the very least, I've
2835 seen three uses, only one of which I'm sure I can
2836 explain. */
81d4177b
KH		 2837 if (ex.X_op == O_symbol)
2838 {
9c2799c2 2839 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2840 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2841 != tocdata_section)
252b5132 2842 {
99a814a1 2843 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2844 }
2845 }
2846
2847 toc_reloc = BFD_RELOC_PPC_TOC16;
2848 break;
2849 case must_be_32:
99a814a1
AM		 2850 /* FIXME: these next two specifically specify 32/64 bit
2851 toc entries. We don't support them today. Is this
2852 the right way to say that? */
62ebcb5c 2853 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2854 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2855 break;
2856 case must_be_64:
99a814a1 2857 /* FIXME: see above. */
62ebcb5c 2858 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2859 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2860 break;
2861 default:
bc805888 2862 fprintf (stderr,
99a814a1
AM		 2863 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2864 toc_kind);
bc805888 2865 abort ();
252b5132
RH		 2866 break;
2867 }
2868
2869 /* We need to generate a fixup for this expression. */
2870 if (fc >= MAX_INSN_FIXUPS)
2871 as_fatal (_("too many fixups"));
2872
2873 fixups[fc].reloc = toc_reloc;
2874 fixups[fc].exp = ex;
2875 fixups[fc].opindex = *opindex_ptr;
2876 ++fc;
2877
99a814a1
AM		 2878 /* Ok. We've set up the fixup for the instruction. Now make it
2879 look like the constant 0 was found here. */
252b5132
RH		 2880 ex.X_unsigned = 1;
2881 ex.X_op = O_constant;
2882 ex.X_add_number = 0;
2883 ex.X_add_symbol = NULL;
2884 ex.X_op_symbol = NULL;
2885 }
2886
2887 else
2888#endif /* TE_PE */
2889 {
b9c361e0
JL		 2890 if ((reg_names_p
2891 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2892 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2893 || !register_name (&ex))
252b5132 2894 {
13abbae3
AM		 2895 char save_lex = lex_type['%'];
2896
b9c361e0
JL		 2897 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2898 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2899 {
2900 cr_operand = TRUE;
2901 lex_type['%'] |= LEX_BEGIN_NAME;
2902 }
252b5132 2903 expression (&ex);
b34976b6 2904 cr_operand = FALSE;
13abbae3 2905 lex_type['%'] = save_lex;
252b5132
RH		 2906 }
2907 }
2908
2909 str = input_line_pointer;
2910 input_line_pointer = hold;
2911
2912 if (ex.X_op == O_illegal)
2913 as_bad (_("illegal operand"));
2914 else if (ex.X_op == O_absent)
2915 as_bad (_("missing operand"));
2916 else if (ex.X_op == O_register)
2917 {
2918 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2919 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2920 }
2921 else if (ex.X_op == O_constant)
2922 {
2923#ifdef OBJ_ELF
81d4177b 2924 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2925 bfd_reloc_code_real_type reloc;
252b5132
RH		 2926 char *orig_str = str;
2927
62ebcb5c 2928 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2929 switch (reloc)
2930 {
2931 default:
2932 str = orig_str;
2933 break;
2934
2935 case BFD_RELOC_LO16:
f9c6b907
AM		 2936 ex.X_add_number &= 0xffff;
2937 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2938 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2939 break;
2940
2941 case BFD_RELOC_HI16:
f9c6b907
AM		 2942 if (REPORT_OVERFLOW_HI && ppc_obj64)
2943 {
2944 /* PowerPC64 @h is tested for overflow. */
2945 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2946 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2947 {
2948 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2949 ex.X_add_number
2950 = ((addressT) ex.X_add_number ^ sign) - sign;
2951 }
2952 break;
2953 }
2954 /* Fall thru */
2955
2956 case BFD_RELOC_PPC64_ADDR16_HIGH:
2957 ex.X_add_number = PPC_HI (ex.X_add_number);
2958 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2959 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2960 break;
2961
2962 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2963 if (REPORT_OVERFLOW_HI && ppc_obj64)
2964 {
2965 /* PowerPC64 @ha is tested for overflow. */
2966 ex.X_add_number
2967 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2968 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2969 {
2970 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2971 ex.X_add_number
2972 = ((addressT) ex.X_add_number ^ sign) - sign;
2973 }
2974 break;
2975 }
2976 /* Fall thru */
2977
2978 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2979 ex.X_add_number = PPC_HA (ex.X_add_number);
2980 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2981 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2982 break;
2983
0baf16f2 2984 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2985 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2986 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2987 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2988 break;
2989
2990 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2991 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2992 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2993 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2994 break;
0baf16f2
AM		 2995
2996 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2997 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2998 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2999 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 3000 break;
3001
3002 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 3003 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3004 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3005 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3006 break;
252b5132 3007 }
0baf16f2 3008#endif /* OBJ_ELF */
252b5132 3009 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3010 ppc_cpu, (char *) NULL, 0);
252b5132 3011 }
727fc41e 3012 else
252b5132 3013 {
62ebcb5c 3014 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3015#ifdef OBJ_ELF
727fc41e 3016 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3017 {
727fc41e
AM		 3018 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3019 if (sym_name[0] == '.')
3020 ++sym_name;
cdba85ec 3021
727fc41e 3022 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3023 {
727fc41e
AM		 3024 expressionS tls_exp;
3025
3026 hold = input_line_pointer;
3027 input_line_pointer = str + 1;
3028 expression (&tls_exp);
3029 if (tls_exp.X_op == O_symbol)
3030 {
62ebcb5c 3031 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3032 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3033 {
3034 reloc = BFD_RELOC_PPC_TLSGD;
3035 input_line_pointer += 7;
3036 }
3037 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3038 {
3039 reloc = BFD_RELOC_PPC_TLSLD;
3040 input_line_pointer += 7;
3041 }
62ebcb5c 3042 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3043 {
3044 SKIP_WHITESPACE ();
3045 str = input_line_pointer;
3046
3047 if (fc >= MAX_INSN_FIXUPS)
3048 as_fatal (_("too many fixups"));
3049 fixups[fc].exp = tls_exp;
3050 fixups[fc].opindex = *opindex_ptr;
3051 fixups[fc].reloc = reloc;
3052 ++fc;
3053 }
3054 }
3055 input_line_pointer = hold;
252b5132
RH		 3056 }
3057 }
3058
62ebcb5c 3059 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3060 {
727fc41e 3061 /* Some TLS tweaks. */
0baf16f2
AM		 3062 switch (reloc)
3063 {
727fc41e 3064 default:
cdba85ec 3065 break;
727fc41e
AM		 3066
3067 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3068 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3069 as_bad (_("@tls may not be used with \"%s\" operands"),
3070 opcode->name);
3071 else if (operand->shift != 11)
3072 as_bad (_("@tls may only be used in last operand"));
3073 else
3074 insn = ppc_insert_operand (insn, operand,
3075 ppc_obj64 ? 13 : 2,
3076 ppc_cpu, (char *) NULL, 0);
cdba85ec 3077 break;
727fc41e
AM		 3078
3079 /* We'll only use the 32 (or 64) bit form of these relocations
3080 in constants. Instructions get the 16 bit form. */
3081 case BFD_RELOC_PPC_DTPREL:
3082 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3083 break;
727fc41e
AM		 3084 case BFD_RELOC_PPC_TPREL:
3085 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3086 break;
3087 }
727fc41e 3088
b9c361e0
JL		 3089 /* If VLE-mode convert LO/HI/HA relocations. */
3090 if (opcode->flags & PPC_OPCODE_VLE)
3091 {
3092 int tmp_insn = insn & opcode->mask;
3093
3094 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3095 || tmp_insn == E_AND2I_DOT_INSN
3096 || tmp_insn == E_OR2IS_INSN
3097 || tmp_insn == E_LIS_INSN
3098 || tmp_insn == E_AND2IS_DOT_INSN);
3099
3100
3101 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3102 || tmp_insn == E_ADD2IS_INSN
3103 || tmp_insn == E_CMP16I_INSN
3104 || tmp_insn == E_MULL2I_INSN
3105 || tmp_insn == E_CMPL16I_INSN
3106 || tmp_insn == E_CMPH16I_INSN
3107 || tmp_insn == E_CMPHL16I_INSN);
3108
3109 switch (reloc)
3110 {
3111 default:
3112 break;
3113
3114 case BFD_RELOC_PPC_EMB_SDA21:
3115 reloc = BFD_RELOC_PPC_VLE_SDA21;
3116 break;
3117
3118 case BFD_RELOC_LO16:
3119 if (use_d_reloc)
3120 reloc = BFD_RELOC_PPC_VLE_LO16D;
3121 else if (use_a_reloc)
3122 reloc = BFD_RELOC_PPC_VLE_LO16A;
3123 break;
3124
3125 case BFD_RELOC_HI16:
3126 if (use_d_reloc)
3127 reloc = BFD_RELOC_PPC_VLE_HI16D;
3128 else if (use_a_reloc)
3129 reloc = BFD_RELOC_PPC_VLE_HI16A;
3130 break;
3131
3132 case BFD_RELOC_HI16_S:
3133 if (use_d_reloc)
3134 reloc = BFD_RELOC_PPC_VLE_HA16D;
3135 else if (use_a_reloc)
3136 reloc = BFD_RELOC_PPC_VLE_HA16A;
3137 break;
3138
3139 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3140 if (use_d_reloc)
3141 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3142 break;
3143
3144 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3145 if (use_d_reloc)
3146 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3147 break;
3148
3149 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3150 if (use_d_reloc)
3151 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3152 break;
3153 }
3154 }
0baf16f2 3155 }
3b8b57a9
AM		 3156#endif /* OBJ_ELF */
3157
62ebcb5c 3158 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3159 ;
3160 /* Determine a BFD reloc value based on the operand information.
3161 We are only prepared to turn a few of the operands into
3162 relocs. */
a0593ad9
AM		 3163 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3164 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3165 && operand->bitm == 0x3fffffc
3166 && operand->shift == 0)
3167 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3168 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3169 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3170 && operand->bitm == 0xfffc
3171 && operand->shift == 0)
3172 reloc = BFD_RELOC_PPC_B16;
3173 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3174 && operand->bitm == 0x1fe
3175 && operand->shift == -1)
3176 reloc = BFD_RELOC_PPC_VLE_REL8;
3177 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3178 && operand->bitm == 0xfffe
3179 && operand->shift == 0)
3180 reloc = BFD_RELOC_PPC_VLE_REL15;
3181 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3182 && operand->bitm == 0x1fffffe
3183 && operand->shift == 0)
3184 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3185 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3186 && (operand->bitm & 0xfff0) == 0xfff0
3187 && operand->shift == 0)
3188 {
f50c47f1 3189 reloc = BFD_RELOC_16;
3e60bf4d 3190#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3191 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3192 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3193 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3194 {
3195 reloc = BFD_RELOC_PPC_TOC16;
3196#ifdef OBJ_ELF
3197 as_warn (_("assuming %s on symbol"),
3198 ppc_obj64 ? "@toc" : "@xgot");
3199#endif
3200 }
3b8b57a9 3201#endif
3b8b57a9 3202 }
a0593ad9
AM		 3203
3204 /* For the absolute forms of branches, convert the PC
3205 relative form back into the absolute. */
3206 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3207 {
3208 switch (reloc)
3209 {
3210 case BFD_RELOC_PPC_B26:
3211 reloc = BFD_RELOC_PPC_BA26;
3212 break;
3213 case BFD_RELOC_PPC_B16:
3214 reloc = BFD_RELOC_PPC_BA16;
3215 break;
3216#ifdef OBJ_ELF
3217 case BFD_RELOC_PPC_B16_BRTAKEN:
3218 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3219 break;
3220 case BFD_RELOC_PPC_B16_BRNTAKEN:
3221 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3222 break;
3223#endif
3224 default:
3225 break;
3226 }
3227 }
3228
3229#ifdef OBJ_ELF
3230 switch (reloc)
3231 {
3232 case BFD_RELOC_PPC_TOC16:
3233 toc_reloc_types |= has_small_toc_reloc;
3234 break;
3235 case BFD_RELOC_PPC64_TOC16_LO:
3236 case BFD_RELOC_PPC64_TOC16_HI:
3237 case BFD_RELOC_PPC64_TOC16_HA:
3238 toc_reloc_types |= has_large_toc_reloc;
3239 break;
3240 default:
3241 break;
3242 }
3243
3244 if (ppc_obj64
3245 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3246 {
3247 switch (reloc)
3248 {
3249 case BFD_RELOC_16:
3250 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3251 break;
3252 case BFD_RELOC_LO16:
3253 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3254 break;
3255 case BFD_RELOC_16_GOTOFF:
3256 reloc = BFD_RELOC_PPC64_GOT16_DS;
3257 break;
3258 case BFD_RELOC_LO16_GOTOFF:
3259 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3260 break;
3261 case BFD_RELOC_LO16_PLTOFF:
3262 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3263 break;
3264 case BFD_RELOC_16_BASEREL:
3265 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3266 break;
3267 case BFD_RELOC_LO16_BASEREL:
3268 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3269 break;
3270 case BFD_RELOC_PPC_TOC16:
3271 reloc = BFD_RELOC_PPC64_TOC16_DS;
3272 break;
3273 case BFD_RELOC_PPC64_TOC16_LO:
3274 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3275 break;
3276 case BFD_RELOC_PPC64_PLTGOT16:
3277 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3278 break;
3279 case BFD_RELOC_PPC64_PLTGOT16_LO:
3280 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3281 break;
3282 case BFD_RELOC_PPC_DTPREL16:
3283 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3284 break;
3285 case BFD_RELOC_PPC_DTPREL16_LO:
3286 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3287 break;
3288 case BFD_RELOC_PPC_TPREL16:
3289 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3290 break;
3291 case BFD_RELOC_PPC_TPREL16_LO:
3292 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3293 break;
3294 case BFD_RELOC_PPC_GOT_DTPREL16:
3295 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3296 case BFD_RELOC_PPC_GOT_TPREL16:
3297 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3298 break;
3299 default:
3300 as_bad (_("unsupported relocation for DS offset field"));
3301 break;
3302 }
3303 }
3304#endif
0baf16f2 3305
252b5132
RH		 3306 /* We need to generate a fixup for this expression. */
3307 if (fc >= MAX_INSN_FIXUPS)
3308 as_fatal (_("too many fixups"));
3309 fixups[fc].exp = ex;
727fc41e 3310 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3311 fixups[fc].reloc = reloc;
3312 ++fc;
3313 }
252b5132
RH		 3314
3315 if (need_paren)
3316 {
3317 endc = ')';
3318 need_paren = 0;
c3d65c1c
BE		 3319 /* If expecting more operands, then we want to see "),". */
3320 if (*str == endc && opindex_ptr[1] != 0)
3321 {
3322 do
3323 ++str;
3324 while (ISSPACE (*str));
3325 endc = ',';
3326 }
252b5132
RH		 3327 }
3328 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3329 {
3330 endc = '(';
3331 need_paren = 1;
3332 }
3333 else
3334 endc = ',';
3335
3336 /* The call to expression should have advanced str past any
3337 whitespace. */
3338 if (*str != endc
3339 && (endc != ',' || *str != '\0'))
3340 {
5a938047
AM		 3341 if (*str == '\0')
3342 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3343 else
3344 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3345 break;
3346 }
3347
3348 if (*str != '\0')
3349 ++str;
3350 }
3351
3882b010 3352 while (ISSPACE (*str))
252b5132
RH		 3353 ++str;
3354
3355 if (*str != '\0')
3356 as_bad (_("junk at end of line: `%s'"), str);
3357
dc1d03fc 3358#ifdef OBJ_ELF
b9c361e0 3359 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3360 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3361 && !ppc_obj64)
6a0c61b7
EZ		 3362 {
3363 /* These are all version "1". */
3364 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3365 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3366 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3367 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3368 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3369 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3370 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3371 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3372 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3373 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3374 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3375 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3376 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3377 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
fbd94057
MR		 3378 /* Only set the VLE flag if the instruction has been pulled via
3379 the VLE instruction set. This way the flag is guaranteed to
3380 be set for VLE-only instructions or for VLE-only processors,
3381 however it'll remain clear for dual-mode instructions on
3382 dual-mode and, more importantly, standard-mode processors. */
3383 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
b9c361e0 3384 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3385 }
dc1d03fc 3386#endif
6a0c61b7 3387
252b5132 3388 /* Write out the instruction. */
b9c361e0
JL		 3389 /* Differentiate between two and four byte insns. */
3390 if (ppc_mach () == bfd_mach_ppc_vle)
3391 {
3392 if (PPC_OP_SE_VLE (insn))
3393 insn_length = 2;
3394 else
3395 insn_length = 4;
3396 addr_mod = frag_now_fix () & 1;
3397 }
3398 else
3399 {
3400 insn_length = 4;
3401 addr_mod = frag_now_fix () & 3;
3402 }
3403 /* All instructions can start on a 2 byte boundary for VLE. */
3404 f = frag_more (insn_length);
09b935ac 3405 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3406 {
3407 if (ppc_mach() == bfd_mach_ppc_vle)
3408 as_bad (_("instruction address is not a multiple of 2"));
3409 else
3410 as_bad (_("instruction address is not a multiple of 4"));
3411 }
09b935ac
AM		 3412 frag_now->insn_addr = addr_mod;
3413 frag_now->has_code = 1;
b9c361e0 3414 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3415 last_insn = insn;
3416 last_seg = now_seg;
3417 last_subseg = now_subseg;
252b5132 3418
5d6f4f16 3419#ifdef OBJ_ELF
b9c361e0 3420 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3421#endif
3422
3b8b57a9 3423 /* Create any fixups. */
252b5132
RH		 3424 for (i = 0; i < fc; i++)
3425 {
3b8b57a9 3426 fixS *fixP;
62ebcb5c 3427 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3428 {
99a814a1 3429 reloc_howto_type *reloc_howto;
252b5132
RH		 3430 int size;
3431 int offset;
252b5132 3432
99a814a1 3433 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3434 if (!reloc_howto)
3435 abort ();
3436
3437 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3438 offset = target_big_endian ? (insn_length - size) : 0;
252b5132 3439
99a814a1
AM		 3440 fixP = fix_new_exp (frag_now,
3441 f - frag_now->fr_literal + offset,
3442 size,
3443 &fixups[i].exp,
3444 reloc_howto->pc_relative,
252b5132 3445 fixups[i].reloc);
252b5132
RH		 3446 }
3447 else
727fc41e
AM		 3448 {
3449 const struct powerpc_operand *operand;
3450
3451 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3452 fixP = fix_new_exp (frag_now,
3453 f - frag_now->fr_literal,
3454 insn_length,
3455 &fixups[i].exp,
3456 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3457 BFD_RELOC_NONE);
727fc41e 3458 }
3b8b57a9 3459 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3460 }
3461}
3462
3463/* Handle a macro. Gather all the operands, transform them as
3464 described by the macro, and call md_assemble recursively. All the
3465 operands are separated by commas; we don't accept parentheses
3466 around operands here. */
3467
3468static void
98027b10 3469ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3470{
3471 char *operands[10];
3472 unsigned int count;
3473 char *s;
3474 unsigned int len;
3475 const char *format;
db557034 3476 unsigned int arg;
252b5132
RH		 3477 char *send;
3478 char *complete;
3479
3480 /* Gather the users operands into the operands array. */
3481 count = 0;
3482 s = str;
3483 while (1)
3484 {
3485 if (count >= sizeof operands / sizeof operands[0])
3486 break;
3487 operands[count++] = s;
3488 s = strchr (s, ',');
3489 if (s == (char *) NULL)
3490 break;
3491 *s++ = '\0';
81d4177b 3492 }
252b5132
RH		 3493
3494 if (count != macro->operands)
3495 {
3496 as_bad (_("wrong number of operands"));
3497 return;
3498 }
3499
3500 /* Work out how large the string must be (the size is unbounded
3501 because it includes user input). */
3502 len = 0;
3503 format = macro->format;
3504 while (*format != '\0')
3505 {
3506 if (*format != '%')
3507 {
3508 ++len;
3509 ++format;
3510 }
3511 else
3512 {
3513 arg = strtol (format + 1, &send, 10);
db557034 3514 know (send != format && arg < count);
252b5132
RH		 3515 len += strlen (operands[arg]);
3516 format = send;
3517 }
3518 }
3519
3520 /* Put the string together. */
3521 complete = s = (char *) alloca (len + 1);
3522 format = macro->format;
3523 while (*format != '\0')
3524 {
3525 if (*format != '%')
3526 *s++ = *format++;
3527 else
3528 {
3529 arg = strtol (format + 1, &send, 10);
3530 strcpy (s, operands[arg]);
3531 s += strlen (s);
3532 format = send;
3533 }
3534 }
3535 *s = '\0';
3536
3537 /* Assemble the constructed instruction. */
3538 md_assemble (complete);
81d4177b 3539}
252b5132
RH		 3540\f
3541#ifdef OBJ_ELF
18ae9cc1 3542/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3543
3544int
98027b10 3545ppc_section_type (char *str, size_t len)
252b5132 3546{
9de8d8f1
RH		 3547 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3548 return SHT_ORDERED;
252b5132 3549
9de8d8f1 3550 return -1;
252b5132
RH		 3551}
3552
3553int
1239de13 3554ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3555{
3556 if (type == SHT_ORDERED)
3557 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3558
252b5132
RH		 3559 return flags;
3560}
3561#endif /* OBJ_ELF */
3562
3563\f
3564/* Pseudo-op handling. */
3565
3566/* The .byte pseudo-op. This is similar to the normal .byte
3567 pseudo-op, but it can also take a single ASCII string. */
3568
3569static void
98027b10 3570ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3571{
bf7279d5
AM		 3572 int count = 0;
3573
252b5132
RH		 3574 if (*input_line_pointer != '\"')
3575 {
3576 cons (1);
3577 return;
3578 }
3579
3580 /* Gather characters. A real double quote is doubled. Unusual
3581 characters are not permitted. */
3582 ++input_line_pointer;
3583 while (1)
3584 {
3585 char c;
3586
3587 c = *input_line_pointer++;
3588
3589 if (c == '\"')
3590 {
3591 if (*input_line_pointer != '\"')
3592 break;
3593 ++input_line_pointer;
3594 }
3595
3596 FRAG_APPEND_1_CHAR (c);
bf7279d5 3597 ++count;
252b5132
RH		 3598 }
3599
bf7279d5
AM		 3600 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3601 as_warn (_("data in executable section"));
252b5132
RH		 3602 demand_empty_rest_of_line ();
3603}
3604\f
3605#ifdef OBJ_XCOFF
3606
3607/* XCOFF specific pseudo-op handling. */
3608
3609/* This is set if we are creating a .stabx symbol, since we don't want
3610 to handle symbol suffixes for such symbols. */
b34976b6 3611static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3612
3613/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3614 symbols in the .bss segment as though they were local common
67c1ffbe 3615 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3616 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3617
3618static void
98027b10 3619ppc_comm (int lcomm)
252b5132
RH		 3620{
3621 asection *current_seg = now_seg;
3622 subsegT current_subseg = now_subseg;
3623 char *name;
3624 char endc;
3625 char *end_name;
3626 offsetT size;
3627 offsetT align;
3628 symbolS *lcomm_sym = NULL;
3629 symbolS *sym;
3630 char *pfrag;
3631
3632 name = input_line_pointer;
3633 endc = get_symbol_end ();
3634 end_name = input_line_pointer;
3635 *end_name = endc;
3636
3637 if (*input_line_pointer != ',')
3638 {
3639 as_bad (_("missing size"));
3640 ignore_rest_of_line ();
3641 return;
3642 }
3643 ++input_line_pointer;
3644
3645 size = get_absolute_expression ();
3646 if (size < 0)
3647 {
3648 as_bad (_("negative size"));
3649 ignore_rest_of_line ();
3650 return;
3651 }
3652
3653 if (! lcomm)
3654 {
3655 /* The third argument to .comm is the alignment. */
3656 if (*input_line_pointer != ',')
1ad63b2f 3657 align = 2;
252b5132
RH		 3658 else
3659 {
3660 ++input_line_pointer;
3661 align = get_absolute_expression ();
3662 if (align <= 0)
3663 {
3664 as_warn (_("ignoring bad alignment"));
1ad63b2f 3665 align = 2;
252b5132
RH		 3666 }
3667 }
3668 }
3669 else
3670 {
3671 char *lcomm_name;
3672 char lcomm_endc;
3673
252b5132
RH		 3674 /* The third argument to .lcomm appears to be the real local
3675 common symbol to create. References to the symbol named in
3676 the first argument are turned into references to the third
3677 argument. */
3678 if (*input_line_pointer != ',')
3679 {
3680 as_bad (_("missing real symbol name"));
3681 ignore_rest_of_line ();
3682 return;
3683 }
3684 ++input_line_pointer;
3685
3686 lcomm_name = input_line_pointer;
3687 lcomm_endc = get_symbol_end ();
81d4177b 3688
252b5132
RH		 3689 lcomm_sym = symbol_find_or_make (lcomm_name);
3690
3691 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3692
3693 /* The fourth argument to .lcomm is the alignment. */
3694 if (*input_line_pointer != ',')
3695 {
3696 if (size <= 4)
3697 align = 2;
3698 else
3699 align = 3;
3700 }
3701 else
3702 {
3703 ++input_line_pointer;
3704 align = get_absolute_expression ();
3705 if (align <= 0)
3706 {
3707 as_warn (_("ignoring bad alignment"));
3708 align = 2;
3709 }
3710 }
252b5132
RH		 3711 }
3712
3713 *end_name = '\0';
3714 sym = symbol_find_or_make (name);
3715 *end_name = endc;
3716
3717 if (S_IS_DEFINED (sym)
3718 || S_GET_VALUE (sym) != 0)
3719 {
3720 as_bad (_("attempt to redefine symbol"));
3721 ignore_rest_of_line ();
3722 return;
3723 }
81d4177b 3724
252b5132 3725 record_alignment (bss_section, align);
81d4177b 3726
252b5132
RH		 3727 if (! lcomm
3728 || ! S_IS_DEFINED (lcomm_sym))
3729 {
3730 symbolS *def_sym;
3731 offsetT def_size;
3732
3733 if (! lcomm)
3734 {
3735 def_sym = sym;
3736 def_size = size;
3737 S_SET_EXTERNAL (sym);
3738 }
3739 else
3740 {
809ffe0d 3741 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3742 def_sym = lcomm_sym;
3743 def_size = 0;
3744 }
3745
3746 subseg_set (bss_section, 1);
3747 frag_align (align, 0, 0);
81d4177b 3748
809ffe0d 3749 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3750 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3751 def_size, (char *) NULL);
3752 *pfrag = 0;
3753 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3754 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3755 }
3756 else if (lcomm)
3757 {
3758 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3759 symbol_get_frag (lcomm_sym)->fr_offset =
3760 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3761 &~ ((1 << align) - 1));
809ffe0d
ILT		 3762 if (align > symbol_get_tc (lcomm_sym)->align)
3763 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3764 }
3765
3766 if (lcomm)
3767 {
3768 /* Make sym an offset from lcomm_sym. */
3769 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3770 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3771 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3772 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3773 }
3774
3775 subseg_set (current_seg, current_subseg);
3776
3777 demand_empty_rest_of_line ();
3778}
3779
3780/* The .csect pseudo-op. This switches us into a different
3781 subsegment. The first argument is a symbol whose value is the
3782 start of the .csect. In COFF, csect symbols get special aux
3783 entries defined by the x_csect field of union internal_auxent. The
3784 optional second argument is the alignment (the default is 2). */
3785
3786static void
98027b10 3787ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3788{
3789 char *name;
3790 char endc;
3791 symbolS *sym;
931e13a6 3792 offsetT align;
252b5132
RH		 3793
3794 name = input_line_pointer;
3795 endc = get_symbol_end ();
81d4177b 3796
252b5132
RH		 3797 sym = symbol_find_or_make (name);
3798
3799 *input_line_pointer = endc;
3800
3801 if (S_GET_NAME (sym)[0] == '\0')
3802 {
3803 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3804 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3805 }
3806
931e13a6 3807 align = 2;
252b5132
RH		 3808 if (*input_line_pointer == ',')
3809 {
3810 ++input_line_pointer;
931e13a6 3811 align = get_absolute_expression ();
252b5132
RH		 3812 }
3813
931e13a6
AM		 3814 ppc_change_csect (sym, align);
3815
252b5132
RH		 3816 demand_empty_rest_of_line ();
3817}
3818
3819/* Change to a different csect. */
3820
3821static void
98027b10 3822ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3823{
3824 if (S_IS_DEFINED (sym))
809ffe0d 3825 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3826 else
3827 {
3828 symbolS **list_ptr;
3829 int after_toc;
3830 int hold_chunksize;
3831 symbolS *list;
931e13a6
AM		 3832 int is_code;
3833 segT sec;
252b5132
RH		 3834
3835 /* This is a new csect. We need to look at the symbol class to
3836 figure out whether it should go in the text section or the
3837 data section. */
3838 after_toc = 0;
931e13a6 3839 is_code = 0;
96d56e9f 3840 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3841 {
3842 case XMC_PR:
3843 case XMC_RO:
3844 case XMC_DB:
3845 case XMC_GL:
3846 case XMC_XO:
3847 case XMC_SV:
3848 case XMC_TI:
3849 case XMC_TB:
3850 S_SET_SEGMENT (sym, text_section);
809ffe0d 3851 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3852 ++ppc_text_subsegment;
3853 list_ptr = &ppc_text_csects;
931e13a6 3854 is_code = 1;
252b5132
RH		 3855 break;
3856 case XMC_RW:
3857 case XMC_TC0:
3858 case XMC_TC:
3859 case XMC_DS:
3860 case XMC_UA:
3861 case XMC_BS:
3862 case XMC_UC:
3863 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3864 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3865 == ppc_data_subsegment))
252b5132
RH		 3866 after_toc = 1;
3867 S_SET_SEGMENT (sym, data_section);
809ffe0d 3868 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3869 ++ppc_data_subsegment;
3870 list_ptr = &ppc_data_csects;
3871 break;
3872 default:
3873 abort ();
3874 }
3875
3876 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3877 changing subsegments, so that we don't use a lot of memory
3878 space for what may be a small section. */
252b5132
RH		 3879 hold_chunksize = chunksize;
3880 chunksize = 64;
3881
931e13a6
AM		 3882 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3883 symbol_get_tc (sym)->subseg);
252b5132
RH		 3884
3885 chunksize = hold_chunksize;
3886
3887 if (after_toc)
3888 ppc_after_toc_frag = frag_now;
3889
931e13a6
AM		 3890 record_alignment (sec, align);
3891 if (is_code)
3892 frag_align_code (align, 0);
3893 else
3894 frag_align (align, 0, 0);
3895
809ffe0d 3896 symbol_set_frag (sym, frag_now);
252b5132
RH		 3897 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3898
931e13a6 3899 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3900 symbol_get_tc (sym)->output = 1;
3901 symbol_get_tc (sym)->within = sym;
81d4177b 3902
252b5132 3903 for (list = *list_ptr;
809ffe0d
ILT		 3904 symbol_get_tc (list)->next != (symbolS *) NULL;
3905 list = symbol_get_tc (list)->next)
252b5132 3906 ;
809ffe0d 3907 symbol_get_tc (list)->next = sym;
81d4177b 3908
252b5132 3909 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3910 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3911 &symbol_lastP);
252b5132
RH		 3912 }
3913
3914 ppc_current_csect = sym;
3915}
3916
85645aed
TG		 3917static void
3918ppc_change_debug_section (unsigned int idx, subsegT subseg)
3919{
3920 segT sec;
3921 flagword oldflags;
3922 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3923
3924 sec = subseg_new (dw->name, subseg);
3925 oldflags = bfd_get_section_flags (stdoutput, sec);
3926 if (oldflags == SEC_NO_FLAGS)
3927 {
3928 /* Just created section. */
3929 gas_assert (dw_sections[idx].sect == NULL);
3930
3931 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3932 bfd_set_section_alignment (stdoutput, sec, 0);
3933 dw_sections[idx].sect = sec;
3934 }
3935
3936 /* Not anymore in a csect. */
3937 ppc_current_csect = NULL;
3938}
3939
3940/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3941 .dwsect flag [, opt-label ]
3942*/
3943
3944static void
3945ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3946{
3947 offsetT flag;
3948 symbolS *opt_label;
3949 const struct xcoff_dwsect_name *dw;
3950 struct dw_subsection *subseg;
3951 struct dw_section *dws;
3952 int i;
3953
3954 /* Find section. */
3955 flag = get_absolute_expression ();
3956 dw = NULL;
3957 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3958 if (xcoff_dwsect_names[i].flag == flag)
3959 {
3960 dw = &xcoff_dwsect_names[i];
3961 break;
3962 }
3963
3964 /* Parse opt-label. */
3965 if (*input_line_pointer == ',')
3966 {
3967 const char *label;
3968 char c;
3969
3970 ++input_line_pointer;
3971
3972 label = input_line_pointer;
3973 c = get_symbol_end ();
3974 opt_label = symbol_find_or_make (label);
3975 *input_line_pointer = c;
3976 }
3977 else
3978 opt_label = NULL;
3979
3980 demand_empty_rest_of_line ();
3981
3982 /* Return now in case of unknown subsection. */
3983 if (dw == NULL)
3984 {
d6ed37ed 3985 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3986 (unsigned)flag);
3987 return;
3988 }
3989
3990 /* Find the subsection. */
3991 dws = &dw_sections[i];
3992 subseg = NULL;
3993 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3994 {
3995 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3996 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3997 {
3998 as_bad (_("label %s was not defined in this dwarf section"),
3999 S_GET_NAME (opt_label));
4000 subseg = dws->anon_subseg;
4001 opt_label = NULL;
4002 }
4003 else
4004 subseg = symbol_get_tc (opt_label)->u.dw;
4005 }
4006
4007 if (subseg != NULL)
4008 {
4009 /* Switch to the subsection. */
4010 ppc_change_debug_section (i, subseg->subseg);
4011 }
4012 else
4013 {
4014 /* Create a new dw subsection. */
4015 subseg = (struct dw_subsection *)
4016 xmalloc (sizeof (struct dw_subsection));
4017
4018 if (opt_label == NULL)
4019 {
4020 /* The anonymous one. */
4021 subseg->subseg = 0;
4022 subseg->link = NULL;
4023 dws->anon_subseg = subseg;
4024 }
4025 else
4026 {
4027 /* A named one. */
4028 if (dws->list_subseg != NULL)
4029 subseg->subseg = dws->list_subseg->subseg + 1;
4030 else
4031 subseg->subseg = 1;
4032
4033 subseg->link = dws->list_subseg;
4034 dws->list_subseg = subseg;
4035 symbol_get_tc (opt_label)->u.dw = subseg;
4036 }
4037
4038 ppc_change_debug_section (i, subseg->subseg);
4039
4040 if (dw->def_size)
4041 {
4042 /* Add the length field. */
4043 expressionS *exp = &subseg->end_exp;
4044 int sz;
4045
4046 if (opt_label != NULL)
4047 symbol_set_value_now (opt_label);
4048
4049 /* Add the length field. Note that according to the AIX assembler
4050 manual, the size of the length field is 4 for powerpc32 but
4051 12 for powerpc64. */
4052 if (ppc_obj64)
4053 {
4054 /* Write the 64bit marker. */
4055 md_number_to_chars (frag_more (4), -1, 4);
4056 }
4057
4058 exp->X_op = O_subtract;
4059 exp->X_op_symbol = symbol_temp_new_now ();
4060 exp->X_add_symbol = symbol_temp_make ();
4061
4062 sz = ppc_obj64 ? 8 : 4;
4063 exp->X_add_number = -sz;
4064 emit_expr (exp, sz);
4065 }
4066 }
4067}
4068
252b5132
RH		 4069/* This function handles the .text and .data pseudo-ops. These
4070 pseudo-ops aren't really used by XCOFF; we implement them for the
4071 convenience of people who aren't used to XCOFF. */
4072
4073static void
98027b10 4074ppc_section (int type)
252b5132
RH		 4075{
4076 const char *name;
4077 symbolS *sym;
4078
4079 if (type == 't')
4080 name = ".text[PR]";
4081 else if (type == 'd')
4082 name = ".data[RW]";
4083 else
4084 abort ();
4085
4086 sym = symbol_find_or_make (name);
4087
931e13a6 4088 ppc_change_csect (sym, 2);
252b5132
RH		 4089
4090 demand_empty_rest_of_line ();
4091}
4092
4093/* This function handles the .section pseudo-op. This is mostly to
4094 give an error, since XCOFF only supports .text, .data and .bss, but
4095 we do permit the user to name the text or data section. */
4096
4097static void
98027b10 4098ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4099{
4100 char *user_name;
4101 const char *real_name;
4102 char c;
4103 symbolS *sym;
4104
4105 user_name = input_line_pointer;
4106 c = get_symbol_end ();
4107
4108 if (strcmp (user_name, ".text") == 0)
4109 real_name = ".text[PR]";
4110 else if (strcmp (user_name, ".data") == 0)
4111 real_name = ".data[RW]";
4112 else
4113 {
d6ed37ed 4114 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4115 *input_line_pointer = c;
4116 ignore_rest_of_line ();
4117 return;
4118 }
4119
4120 *input_line_pointer = c;
4121
4122 sym = symbol_find_or_make (real_name);
4123
931e13a6 4124 ppc_change_csect (sym, 2);
252b5132
RH		 4125
4126 demand_empty_rest_of_line ();
4127}
4128
4129/* The .extern pseudo-op. We create an undefined symbol. */
4130
4131static void
98027b10 4132ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4133{
4134 char *name;
4135 char endc;
4136
4137 name = input_line_pointer;
4138 endc = get_symbol_end ();
4139
4140 (void) symbol_find_or_make (name);
4141
4142 *input_line_pointer = endc;
4143
4144 demand_empty_rest_of_line ();
4145}
4146
4147/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4148
4149static void
98027b10 4150ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4151{
4152 char *name;
4153 char endc;
4154 symbolS *sym;
4155
4156 name = input_line_pointer;
4157 endc = get_symbol_end ();
4158
4159 sym = symbol_find_or_make (name);
4160
4161 *input_line_pointer = endc;
4162
809ffe0d 4163 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4164
4165 demand_empty_rest_of_line ();
4166}
4167
c865e45b
RS		 4168/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4169 relocations at the beginning of the current csect.
4170
4171 (In principle, there's no reason why the relocations _have_ to be at
4172 the beginning. Anywhere in the csect would do. However, inserting
4173 at the beginning is what the native assmebler does, and it helps to
4174 deal with cases where the .ref statements follow the section contents.)
4175
4176 ??? .refs don't work for empty .csects. However, the native assembler
4177 doesn't report an error in this case, and neither yet do we. */
4178
4179static void
4180ppc_ref (int ignore ATTRIBUTE_UNUSED)
4181{
4182 char *name;
4183 char c;
4184
4185 if (ppc_current_csect == NULL)
4186 {
4187 as_bad (_(".ref outside .csect"));
4188 ignore_rest_of_line ();
4189 return;
4190 }
4191
4192 do
4193 {
4194 name = input_line_pointer;
4195 c = get_symbol_end ();
4196
4197 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4198 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4199
4200 *input_line_pointer = c;
4201 SKIP_WHITESPACE ();
4202 c = *input_line_pointer;
4203 if (c == ',')
4204 {
4205 input_line_pointer++;
4206 SKIP_WHITESPACE ();
4207 if (is_end_of_line[(unsigned char) *input_line_pointer])
4208 {
4209 as_bad (_("missing symbol name"));
4210 ignore_rest_of_line ();
4211 return;
4212 }
4213 }
4214 }
4215 while (c == ',');
4216
4217 demand_empty_rest_of_line ();
4218}
4219
252b5132
RH		 4220/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4221 although I don't know why it bothers. */
4222
4223static void
98027b10 4224ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4225{
4226 char *name;
4227 char endc;
4228 symbolS *sym;
4229 int len;
4230
4231 name = input_line_pointer;
4232 endc = get_symbol_end ();
4233
4234 sym = symbol_find_or_make (name);
4235
4236 *input_line_pointer = endc;
4237
4238 if (*input_line_pointer != ',')
4239 {
4240 as_bad (_("missing rename string"));
4241 ignore_rest_of_line ();
4242 return;
4243 }
4244 ++input_line_pointer;
4245
809ffe0d 4246 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4247
4248 demand_empty_rest_of_line ();
4249}
4250
4251/* The .stabx pseudo-op. This is similar to a normal .stabs
4252 pseudo-op, but slightly different. A sample is
4253 .stabx "main:F-1",.main,142,0
4254 The first argument is the symbol name to create. The second is the
4255 value, and the third is the storage class. The fourth seems to be
4256 always zero, and I am assuming it is the type. */
4257
4258static void
98027b10 4259ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4260{
4261 char *name;
4262 int len;
4263 symbolS *sym;
4264 expressionS exp;
4265
4266 name = demand_copy_C_string (&len);
4267
4268 if (*input_line_pointer != ',')
4269 {
4270 as_bad (_("missing value"));
4271 return;
4272 }
4273 ++input_line_pointer;
4274
b34976b6 4275 ppc_stab_symbol = TRUE;
252b5132 4276 sym = symbol_make (name);
b34976b6 4277 ppc_stab_symbol = FALSE;
252b5132 4278
809ffe0d 4279 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4280
4281 (void) expression (&exp);
4282
4283 switch (exp.X_op)
4284 {
4285 case O_illegal:
4286 case O_absent:
4287 case O_big:
4288 as_bad (_("illegal .stabx expression; zero assumed"));
4289 exp.X_add_number = 0;
4290 /* Fall through. */
4291 case O_constant:
4292 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4293 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4294 break;
4295
4296 case O_symbol:
4297 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4298 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4299 else
4300 {
4301 S_SET_VALUE (sym,
4302 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4303 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4304 }
4305 break;
4306
4307 default:
4308 /* The value is some complex expression. This will probably
99a814a1
AM		 4309 fail at some later point, but this is probably the right
4310 thing to do here. */
809ffe0d 4311 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4312 break;
4313 }
4314
4315 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4316 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4317
4318 if (*input_line_pointer != ',')
4319 {
4320 as_bad (_("missing class"));
4321 return;
4322 }
4323 ++input_line_pointer;
4324
4325 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4326
4327 if (*input_line_pointer != ',')
4328 {
4329 as_bad (_("missing type"));
4330 return;
4331 }
4332 ++input_line_pointer;
4333
4334 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4335
809ffe0d 4336 symbol_get_tc (sym)->output = 1;
252b5132 4337
c734e7e3
TG		 4338 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4339 {
4340 /* In this case :
252b5132 4341
c734e7e3
TG		 4342 .bs name
4343 .stabx "z",arrays_,133,0
4344 .es
99a814a1 4345
c734e7e3 4346 .comm arrays_,13768,3
99a814a1 4347
c734e7e3
TG		 4348 resolve_symbol_value will copy the exp's "within" into sym's when the
4349 offset is 0. Since this seems to be corner case problem,
4350 only do the correction for storage class C_STSYM. A better solution
4351 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4352
c734e7e3
TG		 4353 if (exp.X_op == O_symbol)
4354 {
4355 if (ppc_current_block == NULL)
4356 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4357
c734e7e3
TG		 4358 symbol_get_tc (sym)->within = ppc_current_block;
4359 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4360 }
4361 }
99a814a1 4362
252b5132
RH		 4363 if (exp.X_op != O_symbol
4364 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4365 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4366 ppc_frob_label (sym);
4367 else
4368 {
4369 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4370 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4371 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4372 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4373 }
4374
4375 demand_empty_rest_of_line ();
4376}
4377
4378/* The .function pseudo-op. This takes several arguments. The first
4379 argument seems to be the external name of the symbol. The second
67c1ffbe 4380 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4381 uses the same name for both. I have no idea what the third and
4382 fourth arguments are meant to be. The optional fifth argument is
4383 an expression for the size of the function. In COFF this symbol
4384 gets an aux entry like that used for a csect. */
4385
4386static void
98027b10 4387ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4388{
4389 char *name;
4390 char endc;
4391 char *s;
4392 symbolS *ext_sym;
4393 symbolS *lab_sym;
4394
4395 name = input_line_pointer;
4396 endc = get_symbol_end ();
4397
4398 /* Ignore any [PR] suffix. */
4399 name = ppc_canonicalize_symbol_name (name);
4400 s = strchr (name, '[');
4401 if (s != (char *) NULL
4402 && strcmp (s + 1, "PR]") == 0)
4403 *s = '\0';
4404
4405 ext_sym = symbol_find_or_make (name);
4406
4407 *input_line_pointer = endc;
4408
4409 if (*input_line_pointer != ',')
4410 {
4411 as_bad (_("missing symbol name"));
4412 ignore_rest_of_line ();
4413 return;
4414 }
4415 ++input_line_pointer;
4416
4417 name = input_line_pointer;
4418 endc = get_symbol_end ();
4419
4420 lab_sym = symbol_find_or_make (name);
4421
4422 *input_line_pointer = endc;
4423
4424 if (ext_sym != lab_sym)
4425 {
809ffe0d
ILT		 4426 expressionS exp;
4427
4428 exp.X_op = O_symbol;
4429 exp.X_add_symbol = lab_sym;
4430 exp.X_op_symbol = NULL;
4431 exp.X_add_number = 0;
4432 exp.X_unsigned = 0;
4433 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4434 }
4435
96d56e9f
NC		 4436 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4437 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4438 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4439
4440 if (*input_line_pointer == ',')
4441 {
91d6fa6a 4442 expressionS exp;
252b5132
RH		 4443
4444 /* Ignore the third argument. */
4445 ++input_line_pointer;
91d6fa6a 4446 expression (& exp);
252b5132
RH		 4447 if (*input_line_pointer == ',')
4448 {
4449 /* Ignore the fourth argument. */
4450 ++input_line_pointer;
91d6fa6a 4451 expression (& exp);
252b5132
RH		 4452 if (*input_line_pointer == ',')
4453 {
4454 /* The fifth argument is the function size. */
4455 ++input_line_pointer;
85645aed
TG		 4456 symbol_get_tc (ext_sym)->u.size = symbol_new
4457 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4458 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4459 }
4460 }
4461 }
4462
4463 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4464 SF_SET_FUNCTION (ext_sym);
4465 SF_SET_PROCESS (ext_sym);
4466 coff_add_linesym (ext_sym);
4467
4468 demand_empty_rest_of_line ();
4469}
4470
4471/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4472 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4473 with the correct line number */
5d6255fe 4474
8642cce8 4475static symbolS *saved_bi_sym = 0;
252b5132
RH		 4476
4477static void
98027b10 4478ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4479{
4480 symbolS *sym;
4481
4482 sym = symbol_make (".bf");
4483 S_SET_SEGMENT (sym, text_section);
809ffe0d 4484 symbol_set_frag (sym, frag_now);
252b5132
RH		 4485 S_SET_VALUE (sym, frag_now_fix ());
4486 S_SET_STORAGE_CLASS (sym, C_FCN);
4487
4488 coff_line_base = get_absolute_expression ();
4489
4490 S_SET_NUMBER_AUXILIARY (sym, 1);
4491 SA_SET_SYM_LNNO (sym, coff_line_base);
4492
8642cce8 4493 /* Line number for bi. */
5d6255fe 4494 if (saved_bi_sym)
8642cce8
TR		 4495 {
4496 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4497 saved_bi_sym = 0;
4498 }
5d6255fe 4499
8642cce8 4500
809ffe0d 4501 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4502
4503 ppc_frob_label (sym);
4504
4505 demand_empty_rest_of_line ();
4506}
4507
4508/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4509 ".ef", except that the line number is absolute, not relative to the
4510 most recent ".bf" symbol. */
4511
4512static void
98027b10 4513ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4514{
4515 symbolS *sym;
4516
4517 sym = symbol_make (".ef");
4518 S_SET_SEGMENT (sym, text_section);
809ffe0d 4519 symbol_set_frag (sym, frag_now);
252b5132
RH		 4520 S_SET_VALUE (sym, frag_now_fix ());
4521 S_SET_STORAGE_CLASS (sym, C_FCN);
4522 S_SET_NUMBER_AUXILIARY (sym, 1);
4523 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4524 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4525
4526 ppc_frob_label (sym);
4527
4528 demand_empty_rest_of_line ();
4529}
4530
4531/* The .bi and .ei pseudo-ops. These take a string argument and
4532 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4533 the symbol list. The value of .bi will be know when the next .bf
4534 is encountered. */
252b5132
RH		 4535
4536static void
98027b10 4537ppc_biei (int ei)
252b5132
RH		 4538{
4539 static symbolS *last_biei;
4540
4541 char *name;
4542 int len;
4543 symbolS *sym;
4544 symbolS *look;
4545
4546 name = demand_copy_C_string (&len);
4547
4548 /* The value of these symbols is actually file offset. Here we set
4549 the value to the index into the line number entries. In
4550 ppc_frob_symbols we set the fix_line field, which will cause BFD
4551 to do the right thing. */
4552
4553 sym = symbol_make (name);
4554 /* obj-coff.c currently only handles line numbers correctly in the
4555 .text section. */
4556 S_SET_SEGMENT (sym, text_section);
4557 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4558 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4559
4560 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4561 symbol_get_tc (sym)->output = 1;
81d4177b 4562
8642cce8 4563 /* Save bi. */
5d6255fe 4564 if (ei)
8642cce8
TR		 4565 saved_bi_sym = 0;
4566 else
4567 saved_bi_sym = sym;
4568
252b5132
RH		 4569 for (look = last_biei ? last_biei : symbol_rootP;
4570 (look != (symbolS *) NULL
4571 && (S_GET_STORAGE_CLASS (look) == C_FILE
4572 || S_GET_STORAGE_CLASS (look) == C_BINCL
4573 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4574 look = symbol_next (look))
4575 ;
4576 if (look != (symbolS *) NULL)
4577 {
4578 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4579 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4580 last_biei = sym;
4581 }
4582
4583 demand_empty_rest_of_line ();
4584}
4585
4586/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4587 There is one argument, which is a csect symbol. The value of the
4588 .bs symbol is the index of this csect symbol. */
4589
4590static void
98027b10 4591ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4592{
4593 char *name;
4594 char endc;
4595 symbolS *csect;
4596 symbolS *sym;
4597
4598 if (ppc_current_block != NULL)
4599 as_bad (_("nested .bs blocks"));
4600
4601 name = input_line_pointer;
4602 endc = get_symbol_end ();
4603
4604 csect = symbol_find_or_make (name);
4605
4606 *input_line_pointer = endc;
4607
4608 sym = symbol_make (".bs");
4609 S_SET_SEGMENT (sym, now_seg);
4610 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4611 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4612 symbol_get_tc (sym)->output = 1;
252b5132 4613
809ffe0d 4614 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4615
4616 ppc_frob_label (sym);
4617
4618 ppc_current_block = sym;
4619
4620 demand_empty_rest_of_line ();
4621}
4622
4623/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4624
4625static void
98027b10 4626ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4627{
4628 symbolS *sym;
4629
4630 if (ppc_current_block == NULL)
4631 as_bad (_(".es without preceding .bs"));
4632
4633 sym = symbol_make (".es");
4634 S_SET_SEGMENT (sym, now_seg);
4635 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4636 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4637 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4638
4639 ppc_frob_label (sym);
4640
4641 ppc_current_block = NULL;
4642
4643 demand_empty_rest_of_line ();
4644}
4645
4646/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4647 line number. */
4648
4649static void
98027b10 4650ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4651{
4652 symbolS *sym;
4653
4654 sym = symbol_make (".bb");
4655 S_SET_SEGMENT (sym, text_section);
809ffe0d 4656 symbol_set_frag (sym, frag_now);
252b5132
RH		 4657 S_SET_VALUE (sym, frag_now_fix ());
4658 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4659
4660 S_SET_NUMBER_AUXILIARY (sym, 1);
4661 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4662
809ffe0d 4663 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4664
4665 SF_SET_PROCESS (sym);
4666
4667 ppc_frob_label (sym);
4668
4669 demand_empty_rest_of_line ();
4670}
4671
4672/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4673 line number. */
4674
4675static void
98027b10 4676ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4677{
4678 symbolS *sym;
4679
4680 sym = symbol_make (".eb");
4681 S_SET_SEGMENT (sym, text_section);
809ffe0d 4682 symbol_set_frag (sym, frag_now);
252b5132
RH		 4683 S_SET_VALUE (sym, frag_now_fix ());
4684 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4685 S_SET_NUMBER_AUXILIARY (sym, 1);
4686 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4687 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4688
4689 SF_SET_PROCESS (sym);
4690
4691 ppc_frob_label (sym);
4692
4693 demand_empty_rest_of_line ();
4694}
4695
4696/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4697 specified name. */
4698
4699static void
98027b10 4700ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4701{
4702 char *name;
4703 int len;
4704 symbolS *sym;
4705
4706 name = demand_copy_C_string (&len);
4707 sym = symbol_make (name);
4708 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4709 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4710 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4711 S_SET_VALUE (sym, 0);
809ffe0d 4712 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4713
4714 ppc_frob_label (sym);
4715
4716 demand_empty_rest_of_line ();
4717}
4718
4719/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4720
4721static void
98027b10 4722ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4723{
4724 symbolS *sym;
4725
4726 sym = symbol_make (".ec");
4727 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4728 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4729 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4730 S_SET_VALUE (sym, 0);
809ffe0d 4731 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4732
4733 ppc_frob_label (sym);
4734
4735 demand_empty_rest_of_line ();
4736}
4737
4738/* The .toc pseudo-op. Switch to the .toc subsegment. */
4739
4740static void
98027b10 4741ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4742{
4743 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4744 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4745 else
4746 {
4747 subsegT subseg;
4748 symbolS *sym;
4749 symbolS *list;
81d4177b 4750
252b5132
RH		 4751 subseg = ppc_data_subsegment;
4752 ++ppc_data_subsegment;
4753
4754 subseg_new (segment_name (data_section), subseg);
4755 ppc_toc_frag = frag_now;
4756
4757 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4758 symbol_set_frag (sym, frag_now);
252b5132
RH		 4759 S_SET_SEGMENT (sym, data_section);
4760 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4761 symbol_get_tc (sym)->subseg = subseg;
4762 symbol_get_tc (sym)->output = 1;
4763 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4764
4765 ppc_toc_csect = sym;
81d4177b 4766
252b5132 4767 for (list = ppc_data_csects;
809ffe0d
ILT		 4768 symbol_get_tc (list)->next != (symbolS *) NULL;
4769 list = symbol_get_tc (list)->next)
252b5132 4770 ;
809ffe0d 4771 symbol_get_tc (list)->next = sym;
252b5132
RH		 4772
4773 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4774 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4775 &symbol_lastP);
252b5132
RH		 4776 }
4777
4778 ppc_current_csect = ppc_toc_csect;
4779
4780 demand_empty_rest_of_line ();
4781}
4782
4783/* The AIX assembler automatically aligns the operands of a .long or
4784 .short pseudo-op, and we want to be compatible. */
4785
4786static void
98027b10 4787ppc_xcoff_cons (int log_size)
252b5132
RH		 4788{
4789 frag_align (log_size, 0, 0);
4790 record_alignment (now_seg, log_size);
4791 cons (1 << log_size);
4792}
4793
4794static void
98027b10 4795ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4796{
4797 expressionS exp;
4798 int byte_count;
4799
4800 (void) expression (&exp);
4801
4802 if (exp.X_op != O_constant)
4803 {
4804 as_bad (_("non-constant byte count"));
4805 return;
4806 }
4807
4808 byte_count = exp.X_add_number;
4809
4810 if (*input_line_pointer != ',')
4811 {
4812 as_bad (_("missing value"));
4813 return;
4814 }
4815
4816 ++input_line_pointer;
4817 cons (byte_count);
4818}
4819
85645aed
TG		 4820void
4821ppc_xcoff_end (void)
4822{
4823 int i;
4824
4825 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4826 {
4827 struct dw_section *dws = &dw_sections[i];
4828 struct dw_subsection *dwss;
4829
4830 if (dws->anon_subseg)
4831 {
4832 dwss = dws->anon_subseg;
4833 dwss->link = dws->list_subseg;
4834 }
4835 else
4836 dwss = dws->list_subseg;
4837
4838 for (; dwss != NULL; dwss = dwss->link)
4839 if (dwss->end_exp.X_add_symbol != NULL)
4840 {
4841 subseg_set (dws->sect, dwss->subseg);
4842 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4843 }
4844 }
4845}
4846
252b5132 4847#endif /* OBJ_XCOFF */
0baf16f2 4848#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4849\f
4850/* The .tc pseudo-op. This is used when generating either XCOFF or
4851 ELF. This takes two or more arguments.
4852
4853 When generating XCOFF output, the first argument is the name to
4854 give to this location in the toc; this will be a symbol with class
0baf16f2 4855 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4856 this location in the TOC; often there is just one more argument, a
1049f94e 4857 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4858 depends on target word size. A 32-bit target uses 4-byte values, a
4859 64-bit target uses 8-byte values.
252b5132
RH		 4860
4861 When not generating XCOFF output, the arguments are the same, but
4862 the first argument is simply ignored. */
4863
4864static void
98027b10 4865ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4866{
4867#ifdef OBJ_XCOFF
4868
4869 /* Define the TOC symbol name. */
4870 {
4871 char *name;
4872 char endc;
4873 symbolS *sym;
4874
4875 if (ppc_toc_csect == (symbolS *) NULL
4876 || ppc_toc_csect != ppc_current_csect)
4877 {
4878 as_bad (_(".tc not in .toc section"));
4879 ignore_rest_of_line ();
4880 return;
4881 }
4882
4883 name = input_line_pointer;
4884 endc = get_symbol_end ();
4885
4886 sym = symbol_find_or_make (name);
4887
4888 *input_line_pointer = endc;
4889
4890 if (S_IS_DEFINED (sym))
4891 {
4892 symbolS *label;
4893
809ffe0d 4894 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4895 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4896 {
4897 as_bad (_(".tc with no label"));
4898 ignore_rest_of_line ();
4899 return;
4900 }
4901
4902 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4903 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4904 S_SET_VALUE (label, S_GET_VALUE (sym));
4905
4906 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4907 ++input_line_pointer;
4908
4909 return;
4910 }
4911
4912 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4913 symbol_set_frag (sym, frag_now);
252b5132 4914 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4915 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4916 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4917
4918 ppc_frob_label (sym);
4919 }
4920
0baf16f2
AM		 4921#endif /* OBJ_XCOFF */
4922#ifdef OBJ_ELF
9c7977b3 4923 int align;
252b5132
RH		 4924
4925 /* Skip the TOC symbol name. */
4926 while (is_part_of_name (*input_line_pointer)
d13d4015 4927 || *input_line_pointer == ' '
252b5132
RH		 4928 || *input_line_pointer == '['
4929 || *input_line_pointer == ']'
4930 || *input_line_pointer == '{'
4931 || *input_line_pointer == '}')
4932 ++input_line_pointer;
4933
0baf16f2 4934 /* Align to a four/eight byte boundary. */
2b3c4602 4935 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4936 frag_align (align, 0, 0);
4937 record_alignment (now_seg, align);
0baf16f2 4938#endif /* OBJ_ELF */
252b5132
RH		 4939
4940 if (*input_line_pointer != ',')
4941 demand_empty_rest_of_line ();
4942 else
4943 {
4944 ++input_line_pointer;
2b3c4602 4945 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4946 }
4947}
0baf16f2
AM		 4948
4949/* Pseudo-op .machine. */
0baf16f2
AM		 4950
4951static void
98027b10 4952ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4953{
69c040df
AM		 4954 char *cpu_string;
4955#define MAX_HISTORY 100
fa452fa6 4956 static ppc_cpu_t *cpu_history;
69c040df
AM		 4957 static int curr_hist;
4958
4959 SKIP_WHITESPACE ();
4960
4961 if (*input_line_pointer == '"')
4962 {
4963 int len;
4964 cpu_string = demand_copy_C_string (&len);
4965 }
4966 else
4967 {
4968 char c;
4969 cpu_string = input_line_pointer;
4970 c = get_symbol_end ();
4971 cpu_string = xstrdup (cpu_string);
4972 *input_line_pointer = c;
4973 }
4974
4975 if (cpu_string != NULL)
4976 {
fa452fa6 4977 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4978 ppc_cpu_t new_cpu;
69c040df
AM		 4979 char *p;
4980
4981 for (p = cpu_string; *p != 0; p++)
4982 *p = TOLOWER (*p);
4983
4984 if (strcmp (cpu_string, "push") == 0)
4985 {
4986 if (cpu_history == NULL)
4987 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4988
4989 if (curr_hist >= MAX_HISTORY)
4990 as_bad (_(".machine stack overflow"));
4991 else
4992 cpu_history[curr_hist++] = ppc_cpu;
4993 }
4994 else if (strcmp (cpu_string, "pop") == 0)
4995 {
4996 if (curr_hist <= 0)
4997 as_bad (_(".machine stack underflow"));
4998 else
4999 ppc_cpu = cpu_history[--curr_hist];
5000 }
776fc418 5001 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 5002 ppc_cpu = new_cpu;
69c040df
AM		 5003 else
5004 as_bad (_("invalid machine `%s'"), cpu_string);
5005
5006 if (ppc_cpu != old_cpu)
5007 ppc_setup_opcodes ();
5008 }
5009
5010 demand_empty_rest_of_line ();
0baf16f2 5011}
0baf16f2 5012#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 5013\f
5014#ifdef TE_PE
5015
99a814a1 5016/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 5017
5018/* Set the current section. */
5019static void
98027b10 5020ppc_set_current_section (segT new)
252b5132
RH		 5021{
5022 ppc_previous_section = ppc_current_section;
5023 ppc_current_section = new;
5024}
5025
5026/* pseudo-op: .previous
5027 behaviour: toggles the current section with the previous section.
5028 errors: None
99a814a1
AM		 5029 warnings: "No previous section" */
5030
252b5132 5031static void
98027b10 5032ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5033{
81d4177b 5034 if (ppc_previous_section == NULL)
252b5132 5035 {
d6ed37ed 5036 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5037 return;
5038 }
5039
99a814a1 5040 subseg_set (ppc_previous_section, 0);
252b5132 5041
99a814a1 5042 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5043}
5044
5045/* pseudo-op: .pdata
5046 behaviour: predefined read only data section
b34976b6 5047 double word aligned
252b5132
RH		 5048 errors: None
5049 warnings: None
5050 initial: .section .pdata "adr3"
b34976b6 5051 a - don't know -- maybe a misprint
252b5132
RH		 5052 d - initialized data
5053 r - readable
5054 3 - double word aligned (that would be 4 byte boundary)
5055
5056 commentary:
5057 Tag index tables (also known as the function table) for exception
99a814a1 5058 handling, debugging, etc. */
252b5132 5059
252b5132 5060static void
98027b10 5061ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5062{
81d4177b 5063 if (pdata_section == 0)
252b5132
RH		 5064 {
5065 pdata_section = subseg_new (".pdata", 0);
81d4177b 5066
252b5132
RH		 5067 bfd_set_section_flags (stdoutput, pdata_section,
5068 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5069 | SEC_READONLY | SEC_DATA ));
81d4177b 5070
252b5132
RH		 5071 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5072 }
5073 else
5074 {
99a814a1 5075 pdata_section = subseg_new (".pdata", 0);
252b5132 5076 }
99a814a1 5077 ppc_set_current_section (pdata_section);
252b5132
RH		 5078}
5079
5080/* pseudo-op: .ydata
5081 behaviour: predefined read only data section
b34976b6 5082 double word aligned
252b5132
RH		 5083 errors: None
5084 warnings: None
5085 initial: .section .ydata "drw3"
b34976b6 5086 a - don't know -- maybe a misprint
252b5132
RH		 5087 d - initialized data
5088 r - readable
5089 3 - double word aligned (that would be 4 byte boundary)
5090 commentary:
5091 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5092 debugging, etc. */
5093
252b5132 5094static void
98027b10 5095ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5096{
81d4177b 5097 if (ydata_section == 0)
252b5132
RH		 5098 {
5099 ydata_section = subseg_new (".ydata", 0);
5100 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5101 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5102 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5103
5104 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5105 }
5106 else
5107 {
5108 ydata_section = subseg_new (".ydata", 0);
5109 }
99a814a1 5110 ppc_set_current_section (ydata_section);
252b5132
RH		 5111}
5112
5113/* pseudo-op: .reldata
5114 behaviour: predefined read write data section
b34976b6 5115 double word aligned (4-byte)
252b5132
RH		 5116 FIXME: relocation is applied to it
5117 FIXME: what's the difference between this and .data?
5118 errors: None
5119 warnings: None
5120 initial: .section .reldata "drw3"
5121 d - initialized data
5122 r - readable
5123 w - writeable
5124 3 - double word aligned (that would be 8 byte boundary)
5125
5126 commentary:
5127 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5128 function descriptors, etc. */
5129
252b5132 5130static void
98027b10 5131ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5132{
5133 if (reldata_section == 0)
5134 {
5135 reldata_section = subseg_new (".reldata", 0);
5136
5137 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5138 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5139 | SEC_DATA));
252b5132
RH		 5140
5141 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5142 }
5143 else
5144 {
5145 reldata_section = subseg_new (".reldata", 0);
5146 }
99a814a1 5147 ppc_set_current_section (reldata_section);
252b5132
RH		 5148}
5149
5150/* pseudo-op: .rdata
5151 behaviour: predefined read only data section
b34976b6 5152 double word aligned
252b5132
RH		 5153 errors: None
5154 warnings: None
5155 initial: .section .rdata "dr3"
5156 d - initialized data
5157 r - readable
99a814a1
AM		 5158 3 - double word aligned (that would be 4 byte boundary) */
5159
252b5132 5160static void
98027b10 5161ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5162{
5163 if (rdata_section == 0)
5164 {
5165 rdata_section = subseg_new (".rdata", 0);
5166 bfd_set_section_flags (stdoutput, rdata_section,
5167 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5168 | SEC_READONLY | SEC_DATA ));
5169
5170 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5171 }
5172 else
5173 {
5174 rdata_section = subseg_new (".rdata", 0);
5175 }
99a814a1 5176 ppc_set_current_section (rdata_section);
252b5132
RH		 5177}
5178
5179/* pseudo-op: .ualong
81d4177b 5180 behaviour: much like .int, with the exception that no alignment is
b34976b6 5181 performed.
252b5132
RH		 5182 FIXME: test the alignment statement
5183 errors: None
99a814a1
AM		 5184 warnings: None */
5185
252b5132 5186static void
98027b10 5187ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5188{
99a814a1
AM		 5189 /* Try for long. */
5190 cons (4);
252b5132
RH		 5191}
5192
5193/* pseudo-op: .znop <symbol name>
5194 behaviour: Issue a nop instruction
b34976b6 5195 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5196 the supplied symbol name.
5197 errors: None
99a814a1
AM		 5198 warnings: Missing symbol name */
5199
252b5132 5200static void
98027b10 5201ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5202{
5203 unsigned long insn;
5204 const struct powerpc_opcode *opcode;
252b5132 5205 char *f;
252b5132 5206 symbolS *sym;
252b5132
RH		 5207 char *symbol_name;
5208 char c;
5209 char *name;
252b5132 5210
99a814a1 5211 /* Strip out the symbol name. */
252b5132
RH		 5212 symbol_name = input_line_pointer;
5213 c = get_symbol_end ();
5214
5215 name = xmalloc (input_line_pointer - symbol_name + 1);
5216 strcpy (name, symbol_name);
5217
5218 sym = symbol_find_or_make (name);
5219
5220 *input_line_pointer = c;
5221
5222 SKIP_WHITESPACE ();
5223
5224 /* Look up the opcode in the hash table. */
5225 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5226
99a814a1 5227 /* Stick in the nop. */
252b5132
RH		 5228 insn = opcode->opcode;
5229
5230 /* Write out the instruction. */
5231 f = frag_more (4);
5232 md_number_to_chars (f, insn, 4);
5233 fix_new (frag_now,
5234 f - frag_now->fr_literal,
5235 4,
5236 sym,
5237 0,
5238 0,
5239 BFD_RELOC_16_GOT_PCREL);
5240
5241}
5242
81d4177b
KH		 5243/* pseudo-op:
5244 behaviour:
5245 errors:
99a814a1
AM		 5246 warnings: */
5247
252b5132 5248static void
98027b10 5249ppc_pe_comm (int lcomm)
252b5132 5250{
98027b10
AM		 5251 char *name;
5252 char c;
5253 char *p;
252b5132 5254 offsetT temp;
98027b10 5255 symbolS *symbolP;
252b5132
RH		 5256 offsetT align;
5257
5258 name = input_line_pointer;
5259 c = get_symbol_end ();
5260
99a814a1 5261 /* just after name is now '\0'. */
252b5132
RH		 5262 p = input_line_pointer;
5263 *p = c;
5264 SKIP_WHITESPACE ();
5265 if (*input_line_pointer != ',')
5266 {
d6ed37ed 5267 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5268 ignore_rest_of_line ();
5269 return;
5270 }
5271
5272 input_line_pointer++; /* skip ',' */
5273 if ((temp = get_absolute_expression ()) < 0)
5274 {
5275 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5276 ignore_rest_of_line ();
5277 return;
5278 }
5279
5280 if (! lcomm)
5281 {
5282 /* The third argument to .comm is the alignment. */
5283 if (*input_line_pointer != ',')
5284 align = 3;
5285 else
5286 {
5287 ++input_line_pointer;
5288 align = get_absolute_expression ();
5289 if (align <= 0)
5290 {
5291 as_warn (_("ignoring bad alignment"));
5292 align = 3;
5293 }
5294 }
5295 }
5296
5297 *p = 0;
5298 symbolP = symbol_find_or_make (name);
5299
5300 *p = c;
5301 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5302 {
d6ed37ed 5303 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5304 S_GET_NAME (symbolP));
5305 ignore_rest_of_line ();
5306 return;
5307 }
5308
5309 if (S_GET_VALUE (symbolP))
5310 {
5311 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5312 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5313 S_GET_NAME (symbolP),
5314 (long) S_GET_VALUE (symbolP),
5315 (long) temp);
5316 }
5317 else
5318 {
5319 S_SET_VALUE (symbolP, (valueT) temp);
5320 S_SET_EXTERNAL (symbolP);
86ebace2 5321 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5322 }
5323
5324 demand_empty_rest_of_line ();
5325}
5326
5327/*
5328 * implement the .section pseudo op:
5329 * .section name {, "flags"}
5330 * ^ ^
5331 * | +--- optional flags: 'b' for bss
5332 * | 'i' for info
5333 * +-- section name 'l' for lib
5334 * 'n' for noload
5335 * 'o' for over
5336 * 'w' for data
5337 * 'd' (apparently m88k for data)
5338 * 'x' for text
5339 * But if the argument is not a quoted string, treat it as a
5340 * subsegment number.
5341 *
5342 * FIXME: this is a copy of the section processing from obj-coff.c, with
5343 * additions/changes for the moto-pas assembler support. There are three
5344 * categories:
5345 *
81d4177b 5346 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5347 * setting bits that bfd probably neither understands or uses. The
5348 * correct approach (?) will have to incorporate extra fields attached
5349 * to the section to hold the system specific stuff. (krk)
5350 *
5351 * Section Contents:
5352 * 'a' - unknown - referred to in documentation, but no definition supplied
5353 * 'c' - section has code
5354 * 'd' - section has initialized data
5355 * 'u' - section has uninitialized data
5356 * 'i' - section contains directives (info)
5357 * 'n' - section can be discarded
5358 * 'R' - remove section at link time
5359 *
5360 * Section Protection:
5361 * 'r' - section is readable
5362 * 'w' - section is writeable
5363 * 'x' - section is executable
5364 * 's' - section is sharable
5365 *
5366 * Section Alignment:
5367 * '0' - align to byte boundary
5368 * '1' - align to halfword undary
5369 * '2' - align to word boundary
5370 * '3' - align to doubleword boundary
5371 * '4' - align to quadword boundary
5372 * '5' - align to 32 byte boundary
5373 * '6' - align to 64 byte boundary
5374 *
5375 */
5376
5377void
98027b10 5378ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5379{
99a814a1 5380 /* Strip out the section name. */
252b5132
RH		 5381 char *section_name;
5382 char c;
5383 char *name;
5384 unsigned int exp;
5385 flagword flags;
5386 segT sec;
5387 int align;
5388
5389 section_name = input_line_pointer;
5390 c = get_symbol_end ();
5391
5392 name = xmalloc (input_line_pointer - section_name + 1);
5393 strcpy (name, section_name);
5394
5395 *input_line_pointer = c;
5396
5397 SKIP_WHITESPACE ();
5398
5399 exp = 0;
5400 flags = SEC_NO_FLAGS;
5401
5402 if (strcmp (name, ".idata$2") == 0)
5403 {
5404 align = 0;
5405 }
5406 else if (strcmp (name, ".idata$3") == 0)
5407 {
5408 align = 0;
5409 }
5410 else if (strcmp (name, ".idata$4") == 0)
5411 {
5412 align = 2;
5413 }
5414 else if (strcmp (name, ".idata$5") == 0)
5415 {
5416 align = 2;
5417 }
5418 else if (strcmp (name, ".idata$6") == 0)
5419 {
5420 align = 1;
5421 }
5422 else
99a814a1
AM		 5423 /* Default alignment to 16 byte boundary. */
5424 align = 4;
252b5132
RH		 5425
5426 if (*input_line_pointer == ',')
5427 {
5428 ++input_line_pointer;
5429 SKIP_WHITESPACE ();
5430 if (*input_line_pointer != '"')
5431 exp = get_absolute_expression ();
5432 else
5433 {
5434 ++input_line_pointer;
5435 while (*input_line_pointer != '"'
5436 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5437 {
5438 switch (*input_line_pointer)
5439 {
5440 /* Section Contents */
5441 case 'a': /* unknown */
d6ed37ed 5442 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5443 break;
5444 case 'c': /* code section */
81d4177b 5445 flags |= SEC_CODE;
252b5132
RH		 5446 break;
5447 case 'd': /* section has initialized data */
5448 flags |= SEC_DATA;
5449 break;
5450 case 'u': /* section has uninitialized data */
5451 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5452 in winnt.h */
5453 flags |= SEC_ROM;
5454 break;
5455 case 'i': /* section contains directives (info) */
5456 /* FIXME: This is IMAGE_SCN_LNK_INFO
5457 in winnt.h */
5458 flags |= SEC_HAS_CONTENTS;
5459 break;
5460 case 'n': /* section can be discarded */
81d4177b 5461 flags &=~ SEC_LOAD;
252b5132
RH		 5462 break;
5463 case 'R': /* Remove section at link time */
5464 flags |= SEC_NEVER_LOAD;
5465 break;
8d452c78 5466#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5467 /* Section Protection */
5468 case 'r': /* section is readable */
5469 flags |= IMAGE_SCN_MEM_READ;
5470 break;
5471 case 'w': /* section is writeable */
5472 flags |= IMAGE_SCN_MEM_WRITE;
5473 break;
5474 case 'x': /* section is executable */
5475 flags |= IMAGE_SCN_MEM_EXECUTE;
5476 break;
5477 case 's': /* section is sharable */
5478 flags |= IMAGE_SCN_MEM_SHARED;
5479 break;
5480
5481 /* Section Alignment */
5482 case '0': /* align to byte boundary */
5483 flags |= IMAGE_SCN_ALIGN_1BYTES;
5484 align = 0;
5485 break;
5486 case '1': /* align to halfword boundary */
5487 flags |= IMAGE_SCN_ALIGN_2BYTES;
5488 align = 1;
5489 break;
5490 case '2': /* align to word boundary */
5491 flags |= IMAGE_SCN_ALIGN_4BYTES;
5492 align = 2;
5493 break;
5494 case '3': /* align to doubleword boundary */
5495 flags |= IMAGE_SCN_ALIGN_8BYTES;
5496 align = 3;
5497 break;
5498 case '4': /* align to quadword boundary */
5499 flags |= IMAGE_SCN_ALIGN_16BYTES;
5500 align = 4;
5501 break;
5502 case '5': /* align to 32 byte boundary */
5503 flags |= IMAGE_SCN_ALIGN_32BYTES;
5504 align = 5;
5505 break;
5506 case '6': /* align to 64 byte boundary */
5507 flags |= IMAGE_SCN_ALIGN_64BYTES;
5508 align = 6;
5509 break;
8d452c78 5510#endif
252b5132 5511 default:
99a814a1
AM		 5512 as_bad (_("unknown section attribute '%c'"),
5513 *input_line_pointer);
252b5132
RH		 5514 break;
5515 }
5516 ++input_line_pointer;
5517 }
5518 if (*input_line_pointer == '"')
5519 ++input_line_pointer;
5520 }
5521 }
5522
5523 sec = subseg_new (name, (subsegT) exp);
5524
99a814a1 5525 ppc_set_current_section (sec);
252b5132
RH		 5526
5527 if (flags != SEC_NO_FLAGS)
5528 {
5529 if (! bfd_set_section_flags (stdoutput, sec, flags))
5530 as_bad (_("error setting flags for \"%s\": %s"),
5531 bfd_section_name (stdoutput, sec),
5532 bfd_errmsg (bfd_get_error ()));
5533 }
5534
99a814a1 5535 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5536}
5537
5538static void
98027b10 5539ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5540{
5541 char *name;
5542 char endc;
5543 symbolS *ext_sym;
5544
5545 name = input_line_pointer;
5546 endc = get_symbol_end ();
5547
5548 ext_sym = symbol_find_or_make (name);
5549
5550 *input_line_pointer = endc;
5551
5552 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5553 SF_SET_FUNCTION (ext_sym);
5554 SF_SET_PROCESS (ext_sym);
5555 coff_add_linesym (ext_sym);
5556
5557 demand_empty_rest_of_line ();
5558}
5559
5560static void
98027b10 5561ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5562{
5563 if (tocdata_section == 0)
5564 {
5565 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5566 /* FIXME: section flags won't work. */
252b5132
RH		 5567 bfd_set_section_flags (stdoutput, tocdata_section,
5568 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5569 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5570
5571 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5572 }
5573 else
5574 {
5575 rdata_section = subseg_new (".tocd", 0);
5576 }
5577
99a814a1 5578 ppc_set_current_section (tocdata_section);
252b5132
RH		 5579
5580 demand_empty_rest_of_line ();
5581}
5582
5583/* Don't adjust TOC relocs to use the section symbol. */
5584
5585int
98027b10 5586ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5587{
5588 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5589}
5590
5591#endif
5592\f
5593#ifdef OBJ_XCOFF
5594
5595/* XCOFF specific symbol and file handling. */
5596
5597/* Canonicalize the symbol name. We use the to force the suffix, if
5598 any, to use square brackets, and to be in upper case. */
5599
5600char *
98027b10 5601ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5602{
5603 char *s;
5604
5605 if (ppc_stab_symbol)
5606 return name;
5607
5608 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5609 ;
5610 if (*s != '\0')
5611 {
5612 char brac;
5613
5614 if (*s == '[')
5615 brac = ']';
5616 else
5617 {
5618 *s = '[';
5619 brac = '}';
5620 }
5621
5622 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5623 *s = TOUPPER (*s);
252b5132
RH		 5624
5625 if (*s == '\0' || s[1] != '\0')
5626 as_bad (_("bad symbol suffix"));
5627
5628 *s = ']';
5629 }
5630
5631 return name;
5632}
5633
5634/* Set the class of a symbol based on the suffix, if any. This is
5635 called whenever a new symbol is created. */
5636
5637void
98027b10 5638ppc_symbol_new_hook (symbolS *sym)
252b5132 5639{
809ffe0d 5640 struct ppc_tc_sy *tc;
252b5132
RH		 5641 const char *s;
5642
809ffe0d
ILT		 5643 tc = symbol_get_tc (sym);
5644 tc->next = NULL;
5645 tc->output = 0;
96d56e9f 5646 tc->symbol_class = -1;
809ffe0d
ILT		 5647 tc->real_name = NULL;
5648 tc->subseg = 0;
5649 tc->align = 0;
85645aed
TG		 5650 tc->u.size = NULL;
5651 tc->u.dw = NULL;
809ffe0d 5652 tc->within = NULL;
252b5132
RH		 5653
5654 if (ppc_stab_symbol)
5655 return;
5656
5657 s = strchr (S_GET_NAME (sym), '[');
5658 if (s == (const char *) NULL)
5659 {
5660 /* There is no suffix. */
5661 return;
5662 }
5663
5664 ++s;
5665
5666 switch (s[0])
5667 {
5668 case 'B':
5669 if (strcmp (s, "BS]") == 0)
96d56e9f 5670 tc->symbol_class = XMC_BS;
252b5132
RH		 5671 break;
5672 case 'D':
5673 if (strcmp (s, "DB]") == 0)
96d56e9f 5674 tc->symbol_class = XMC_DB;
252b5132 5675 else if (strcmp (s, "DS]") == 0)
96d56e9f 5676 tc->symbol_class = XMC_DS;
252b5132
RH		 5677 break;
5678 case 'G':
5679 if (strcmp (s, "GL]") == 0)
96d56e9f 5680 tc->symbol_class = XMC_GL;
252b5132
RH		 5681 break;
5682 case 'P':
5683 if (strcmp (s, "PR]") == 0)
96d56e9f 5684 tc->symbol_class = XMC_PR;
252b5132
RH		 5685 break;
5686 case 'R':
5687 if (strcmp (s, "RO]") == 0)
96d56e9f 5688 tc->symbol_class = XMC_RO;
252b5132 5689 else if (strcmp (s, "RW]") == 0)
96d56e9f 5690 tc->symbol_class = XMC_RW;
252b5132
RH		 5691 break;
5692 case 'S':
5693 if (strcmp (s, "SV]") == 0)
96d56e9f 5694 tc->symbol_class = XMC_SV;
252b5132
RH		 5695 break;
5696 case 'T':
5697 if (strcmp (s, "TC]") == 0)
96d56e9f 5698 tc->symbol_class = XMC_TC;
252b5132 5699 else if (strcmp (s, "TI]") == 0)
96d56e9f 5700 tc->symbol_class = XMC_TI;
252b5132 5701 else if (strcmp (s, "TB]") == 0)
96d56e9f 5702 tc->symbol_class = XMC_TB;
252b5132 5703 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5704 tc->symbol_class = XMC_TC0;
252b5132
RH		 5705 break;
5706 case 'U':
5707 if (strcmp (s, "UA]") == 0)
96d56e9f 5708 tc->symbol_class = XMC_UA;
252b5132 5709 else if (strcmp (s, "UC]") == 0)
96d56e9f 5710 tc->symbol_class = XMC_UC;
252b5132
RH		 5711 break;
5712 case 'X':
5713 if (strcmp (s, "XO]") == 0)
96d56e9f 5714 tc->symbol_class = XMC_XO;
252b5132
RH		 5715 break;
5716 }
5717
96d56e9f 5718 if (tc->symbol_class == -1)
d6ed37ed 5719 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5720}
5721
5722/* Set the class of a label based on where it is defined. This
5723 handles symbols without suffixes. Also, move the symbol so that it
5724 follows the csect symbol. */
5725
5726void
98027b10 5727ppc_frob_label (symbolS *sym)
252b5132
RH		 5728{
5729 if (ppc_current_csect != (symbolS *) NULL)
5730 {
96d56e9f
NC		 5731 if (symbol_get_tc (sym)->symbol_class == -1)
5732 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5733
5734 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5735 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5736 &symbol_rootP, &symbol_lastP);
5737 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5738 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5739 }
07a53e5c
RH		 5740
5741#ifdef OBJ_ELF
5742 dwarf2_emit_label (sym);
5743#endif
252b5132
RH		 5744}
5745
5746/* This variable is set by ppc_frob_symbol if any absolute symbols are
5747 seen. It tells ppc_adjust_symtab whether it needs to look through
5748 the symbols. */
5749
b34976b6 5750static bfd_boolean ppc_saw_abs;
252b5132
RH		 5751
5752/* Change the name of a symbol just before writing it out. Set the
5753 real name if the .rename pseudo-op was used. Otherwise, remove any
5754 class suffix. Return 1 if the symbol should not be included in the
5755 symbol table. */
5756
5757int
98027b10 5758ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5759{
5760 static symbolS *ppc_last_function;
5761 static symbolS *set_end;
5762
5763 /* Discard symbols that should not be included in the output symbol
5764 table. */
809ffe0d
ILT		 5765 if (! symbol_used_in_reloc_p (sym)
5766 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5767 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5768 && ! symbol_get_tc (sym)->output
252b5132
RH		 5769 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5770 return 1;
5771
a161fe53
AM		 5772 /* This one will disappear anyway. Don't make a csect sym for it. */
5773 if (sym == abs_section_sym)
5774 return 1;
5775
809ffe0d
ILT		 5776 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5777 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5778 else
5779 {
5780 const char *name;
5781 const char *s;
5782
5783 name = S_GET_NAME (sym);
5784 s = strchr (name, '[');
5785 if (s != (char *) NULL)
5786 {
5787 unsigned int len;
5788 char *snew;
5789
5790 len = s - name;
5791 snew = xmalloc (len + 1);
5792 memcpy (snew, name, len);
5793 snew[len] = '\0';
5794
5795 S_SET_NAME (sym, snew);
5796 }
5797 }
5798
5799 if (set_end != (symbolS *) NULL)
5800 {
5801 SA_SET_SYM_ENDNDX (set_end, sym);
5802 set_end = NULL;
5803 }
5804
5805 if (SF_GET_FUNCTION (sym))
5806 {
5807 if (ppc_last_function != (symbolS *) NULL)
5808 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5809 ppc_last_function = sym;
85645aed 5810 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5811 {
85645aed 5812 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5813 SA_SET_SYM_FSIZE (sym,
85645aed 5814 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5815 }
5816 }
5817 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5818 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5819 {
5820 if (ppc_last_function == (symbolS *) NULL)
5821 as_bad (_(".ef with no preceding .function"));
5822 else
5823 {
5824 set_end = ppc_last_function;
5825 ppc_last_function = NULL;
5826
5827 /* We don't have a C_EFCN symbol, but we need to force the
5828 COFF backend to believe that it has seen one. */
5829 coff_last_function = NULL;
5830 }
5831 }
5832
670ec21d 5833 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5834 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5835 && S_GET_STORAGE_CLASS (sym) != C_FILE
5836 && S_GET_STORAGE_CLASS (sym) != C_FCN
5837 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5838 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5839 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5840 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5841 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5842 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5843 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5844
5845 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5846 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5847 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5848 {
5849 int i;
5850 union internal_auxent *a;
5851
5852 /* Create a csect aux. */
5853 i = S_GET_NUMBER_AUXILIARY (sym);
5854 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5855 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5856 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5857 {
5858 /* This is the TOC table. */
5859 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5860 a->x_csect.x_scnlen.l = 0;
5861 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5862 }
809ffe0d 5863 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5864 {
5865 /* This is a csect symbol. x_scnlen is the size of the
5866 csect. */
809ffe0d 5867 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5868 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5869 S_GET_SEGMENT (sym))
5870 - S_GET_VALUE (sym));
5871 else
5872 {
6386f3a7 5873 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5874 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5875 - S_GET_VALUE (sym));
5876 }
809ffe0d 5877 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5878 }
5879 else if (S_GET_SEGMENT (sym) == bss_section)
5880 {
5881 /* This is a common symbol. */
809ffe0d
ILT		 5882 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5883 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5884 if (S_IS_EXTERNAL (sym))
96d56e9f 5885 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5886 else
96d56e9f 5887 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5888 }
5889 else if (S_GET_SEGMENT (sym) == absolute_section)
5890 {
5891 /* This is an absolute symbol. The csect will be created by
99a814a1 5892 ppc_adjust_symtab. */
b34976b6 5893 ppc_saw_abs = TRUE;
252b5132 5894 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5895 if (symbol_get_tc (sym)->symbol_class == -1)
5896 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5897 }
5898 else if (! S_IS_DEFINED (sym))
5899 {
5900 /* This is an external symbol. */
5901 a->x_csect.x_scnlen.l = 0;
5902 a->x_csect.x_smtyp = XTY_ER;
5903 }
96d56e9f 5904 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5905 {
5906 symbolS *next;
5907
5908 /* This is a TOC definition. x_scnlen is the size of the
5909 TOC entry. */
5910 next = symbol_next (sym);
96d56e9f 5911 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5912 next = symbol_next (next);
5913 if (next == (symbolS *) NULL
96d56e9f 5914 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5915 {
5916 if (ppc_after_toc_frag == (fragS *) NULL)
5917 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5918 data_section)
5919 - S_GET_VALUE (sym));
5920 else
5921 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5922 - S_GET_VALUE (sym));
5923 }
5924 else
5925 {
6386f3a7 5926 resolve_symbol_value (next);
252b5132
RH		 5927 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5928 - S_GET_VALUE (sym));
5929 }
5930 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5931 }
5932 else
5933 {
5934 symbolS *csect;
5935
5936 /* This is a normal symbol definition. x_scnlen is the
5937 symbol index of the containing csect. */
5938 if (S_GET_SEGMENT (sym) == text_section)
5939 csect = ppc_text_csects;
5940 else if (S_GET_SEGMENT (sym) == data_section)
5941 csect = ppc_data_csects;
5942 else
5943 abort ();
5944
5945 /* Skip the initial dummy symbol. */
809ffe0d 5946 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5947
5948 if (csect == (symbolS *) NULL)
5949 {
5950 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5951 a->x_csect.x_scnlen.l = 0;
5952 }
5953 else
5954 {
809ffe0d 5955 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5956 {
6386f3a7 5957 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5958 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5959 > S_GET_VALUE (sym))
252b5132 5960 break;
809ffe0d 5961 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5962 }
5963
809ffe0d
ILT		 5964 a->x_csect.x_scnlen.p =
5965 coffsymbol (symbol_get_bfdsym (csect))->native;
5966 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5967 1;
252b5132
RH		 5968 }
5969 a->x_csect.x_smtyp = XTY_LD;
5970 }
81d4177b 5971
252b5132
RH		 5972 a->x_csect.x_parmhash = 0;
5973 a->x_csect.x_snhash = 0;
96d56e9f 5974 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5975 a->x_csect.x_smclas = XMC_PR;
5976 else
96d56e9f 5977 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5978 a->x_csect.x_stab = 0;
5979 a->x_csect.x_snstab = 0;
5980
5981 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5982 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5983 }
5984 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5985 {
5986 /* We want the value to be the symbol index of the referenced
5987 csect symbol. BFD will do that for us if we set the right
5988 flags. */
b782de16
AM		 5989 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5990 combined_entry_type *c = coffsymbol (bsym)->native;
5991
5992 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5993 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5994 }
5995 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5996 {
5997 symbolS *block;
c734e7e3 5998 valueT base;
252b5132 5999
809ffe0d 6000 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 6001 if (block)
6002 {
6003 /* The value is the offset from the enclosing csect. */
6004 symbolS *csect;
6005
6006 csect = symbol_get_tc (block)->within;
6007 resolve_symbol_value (csect);
6008 base = S_GET_VALUE (csect);
6009 }
6010 else
6011 base = 0;
6012
6013 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 6014 }
6015 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6016 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6017 {
6018 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 6019 BFD will do that for us if we set the right flags. We have
6020 already set the value correctly. */
809ffe0d 6021 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6022 }
6023
6024 return 0;
6025}
6026
6027/* Adjust the symbol table. This creates csect symbols for all
6028 absolute symbols. */
6029
6030void
98027b10 6031ppc_adjust_symtab (void)
252b5132
RH		 6032{
6033 symbolS *sym;
6034
6035 if (! ppc_saw_abs)
6036 return;
6037
6038 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6039 {
6040 symbolS *csect;
6041 int i;
6042 union internal_auxent *a;
6043
6044 if (S_GET_SEGMENT (sym) != absolute_section)
6045 continue;
6046
6047 csect = symbol_create (".abs[XO]", absolute_section,
6048 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6049 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6050 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6051 i = S_GET_NUMBER_AUXILIARY (csect);
6052 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6053 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6054 a->x_csect.x_scnlen.l = 0;
6055 a->x_csect.x_smtyp = XTY_SD;
6056 a->x_csect.x_parmhash = 0;
6057 a->x_csect.x_snhash = 0;
6058 a->x_csect.x_smclas = XMC_XO;
6059 a->x_csect.x_stab = 0;
6060 a->x_csect.x_snstab = 0;
6061
6062 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6063
6064 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6065 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6066 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6067 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6068 }
6069
b34976b6 6070 ppc_saw_abs = FALSE;
252b5132
RH		 6071}
6072
6073/* Set the VMA for a section. This is called on all the sections in
6074 turn. */
6075
6076void
98027b10 6077ppc_frob_section (asection *sec)
252b5132 6078{
931e13a6 6079 static bfd_vma vma = 0;
252b5132 6080
85645aed
TG		 6081 /* Dwarf sections start at 0. */
6082 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6083 return;
6084
931e13a6 6085 vma = md_section_align (sec, vma);
252b5132
RH		 6086 bfd_set_section_vma (stdoutput, sec, vma);
6087 vma += bfd_section_size (stdoutput, sec);
6088}
6089
6090#endif /* OBJ_XCOFF */
6091\f
252b5132 6092char *
98027b10 6093md_atof (int type, char *litp, int *sizep)
252b5132 6094{
499ac353 6095 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6096}
6097
6098/* Write a value out to the object file, using the appropriate
6099 endianness. */
6100
6101void
98027b10 6102md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6103{
6104 if (target_big_endian)
6105 number_to_chars_bigendian (buf, val, n);
6106 else
6107 number_to_chars_littleendian (buf, val, n);
6108}
6109
6110/* Align a section (I don't know why this is machine dependent). */
6111
6112valueT
3aeeedbb 6113md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6114{
3aeeedbb
AM		 6115#ifdef OBJ_ELF
6116 return addr;
6117#else
252b5132
RH		 6118 int align = bfd_get_section_alignment (stdoutput, seg);
6119
6120 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6121#endif
252b5132
RH		 6122}
6123
6124/* We don't have any form of relaxing. */
6125
6126int
98027b10
AM		 6127md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6128 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6129{
6130 abort ();
6131 return 0;
6132}
6133
6134/* Convert a machine dependent frag. We never generate these. */
6135
6136void
98027b10
AM		 6137md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6138 asection *sec ATTRIBUTE_UNUSED,
6139 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6140{
6141 abort ();
6142}
6143
6144/* We have no need to default values of symbols. */
6145
252b5132 6146symbolS *
98027b10 6147md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6148{
6149 return 0;
6150}
6151\f
6152/* Functions concerning relocs. */
6153
6154/* The location from which a PC relative jump should be calculated,
6155 given a PC relative reloc. */
6156
6157long
98027b10 6158md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6159{
6160 return fixp->fx_frag->fr_address + fixp->fx_where;
6161}
6162
6163#ifdef OBJ_XCOFF
6164
6165/* This is called to see whether a fixup should be adjusted to use a
6166 section symbol. We take the opportunity to change a fixup against
6167 a symbol in the TOC subsegment into a reloc against the
6168 corresponding .tc symbol. */
6169
6170int
98027b10 6171ppc_fix_adjustable (fixS *fix)
252b5132 6172{
b782de16
AM		 6173 valueT val = resolve_symbol_value (fix->fx_addsy);
6174 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6175 TC_SYMFIELD_TYPE *tc;
6176
6177 if (symseg == absolute_section)
6178 return 0;
252b5132 6179
85645aed
TG		 6180 /* Always adjust symbols in debugging sections. */
6181 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6182 return 1;
6183
252b5132 6184 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6185 && fix->fx_addsy != ppc_toc_csect
b782de16 6186 && symseg == data_section
252b5132
RH		 6187 && val >= ppc_toc_frag->fr_address
6188 && (ppc_after_toc_frag == (fragS *) NULL
6189 || val < ppc_after_toc_frag->fr_address))
6190 {
6191 symbolS *sy;
6192
6193 for (sy = symbol_next (ppc_toc_csect);
6194 sy != (symbolS *) NULL;
6195 sy = symbol_next (sy))
6196 {
b782de16
AM		 6197 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6198
96d56e9f 6199 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6200 continue;
96d56e9f 6201 if (sy_tc->symbol_class != XMC_TC)
252b5132 6202 break;
b782de16 6203 if (val == resolve_symbol_value (sy))
252b5132
RH		 6204 {
6205 fix->fx_addsy = sy;
6206 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6207 return 0;
6208 }
6209 }
6210
6211 as_bad_where (fix->fx_file, fix->fx_line,
6212 _("symbol in .toc does not match any .tc"));
6213 }
6214
6215 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6216 tc = symbol_get_tc (fix->fx_addsy);
6217 if (tc->subseg == 0
96d56e9f
NC		 6218 && tc->symbol_class != XMC_TC0
6219 && tc->symbol_class != XMC_TC
b782de16 6220 && symseg != bss_section
252b5132 6221 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6222 && (symseg != data_section
252b5132
RH		 6223 || ppc_toc_csect == NULL
6224 || val < ppc_toc_frag->fr_address
6225 || (ppc_after_toc_frag != NULL
6226 && val >= ppc_after_toc_frag->fr_address)))
6227 {
2fb4b302 6228 symbolS *csect = tc->within;
252b5132 6229
2fb4b302
TG		 6230 /* If the symbol was not declared by a label (eg: a section symbol),
6231 use the section instead of the csect. This doesn't happen in
6232 normal AIX assembly code. */
6233 if (csect == NULL)
6234 csect = seg_info (symseg)->sym;
252b5132 6235
2fb4b302
TG		 6236 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6237 fix->fx_addsy = csect;
252b5132 6238
b782de16 6239 return 0;
252b5132
RH		 6240 }
6241
6242 /* Adjust a reloc against a .lcomm symbol to be against the base
6243 .lcomm. */
b782de16 6244 if (symseg == bss_section
252b5132
RH		 6245 && ! S_IS_EXTERNAL (fix->fx_addsy))
6246 {
b782de16
AM		 6247 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6248
6249 fix->fx_offset += val - resolve_symbol_value (sy);
6250 fix->fx_addsy = sy;
252b5132
RH		 6251 }
6252
6253 return 0;
6254}
6255
6256/* A reloc from one csect to another must be kept. The assembler
6257 will, of course, keep relocs between sections, and it will keep
6258 absolute relocs, but we need to force it to keep PC relative relocs
6259 between two csects in the same section. */
6260
6261int
98027b10 6262ppc_force_relocation (fixS *fix)
252b5132
RH		 6263{
6264 /* At this point fix->fx_addsy should already have been converted to
6265 a csect symbol. If the csect does not include the fragment, then
6266 we need to force the relocation. */
6267 if (fix->fx_pcrel
6268 && fix->fx_addsy != NULL
809ffe0d
ILT		 6269 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6270 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6271 > fix->fx_frag->fr_address)
6272 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6273 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6274 <= fix->fx_frag->fr_address))))
6275 return 1;
6276
ae6063d4 6277 return generic_force_reloc (fix);
252b5132
RH		 6278}
6279
2fb4b302
TG		 6280void
6281ppc_new_dot_label (symbolS *sym)
6282{
6283 /* Anchor this label to the current csect for relocations. */
6284 symbol_get_tc (sym)->within = ppc_current_csect;
6285}
6286
252b5132
RH		 6287#endif /* OBJ_XCOFF */
6288
0baf16f2 6289#ifdef OBJ_ELF
a161fe53
AM		 6290/* If this function returns non-zero, it guarantees that a relocation
6291 will be emitted for a fixup. */
6292
6293int
98027b10 6294ppc_force_relocation (fixS *fix)
a161fe53
AM		 6295{
6296 /* Branch prediction relocations must force a relocation, as must
6297 the vtable description relocs. */
6298 switch (fix->fx_r_type)
6299 {
6300 case BFD_RELOC_PPC_B16_BRTAKEN:
6301 case BFD_RELOC_PPC_B16_BRNTAKEN:
6302 case BFD_RELOC_PPC_BA16_BRTAKEN:
6303 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6304 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6305 case BFD_RELOC_PPC64_TOC:
a161fe53 6306 return 1;
6911b7dc
AM		 6307 case BFD_RELOC_PPC_B26:
6308 case BFD_RELOC_PPC_BA26:
6309 case BFD_RELOC_PPC_B16:
6310 case BFD_RELOC_PPC_BA16:
6311 /* All branch fixups targeting a localentry symbol must
6312 force a relocation. */
6313 if (fix->fx_addsy)
6314 {
6315 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6316 elf_symbol_type *elfsym
6317 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6318 gas_assert (elfsym);
6319 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6320 return 1;
6321 }
6322 break;
a161fe53
AM		 6323 default:
6324 break;
6325 }
6326
cdba85ec
AM		 6327 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6328 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6329 return 1;
6330
ae6063d4 6331 return generic_force_reloc (fix);
a161fe53
AM		 6332}
6333
0baf16f2 6334int
98027b10 6335ppc_fix_adjustable (fixS *fix)
252b5132 6336{
6911b7dc
AM		 6337 switch (fix->fx_r_type)
6338 {
6339 /* All branch fixups targeting a localentry symbol must
6340 continue using the symbol. */
6341 case BFD_RELOC_PPC_B26:
6342 case BFD_RELOC_PPC_BA26:
6343 case BFD_RELOC_PPC_B16:
6344 case BFD_RELOC_PPC_BA16:
6345 case BFD_RELOC_PPC_B16_BRTAKEN:
6346 case BFD_RELOC_PPC_B16_BRNTAKEN:
6347 case BFD_RELOC_PPC_BA16_BRTAKEN:
6348 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6349 if (fix->fx_addsy)
6350 {
6351 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6352 elf_symbol_type *elfsym
6353 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6354 gas_assert (elfsym);
6355 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6356 return 0;
6357 }
6358 break;
6359 default:
6360 break;
6361 }
6362
0baf16f2
AM		 6363 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6364 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6365 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6366 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6367 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6368 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6369 && fix->fx_r_type != BFD_RELOC_GPREL16
6370 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6371 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6372 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6373 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6374}
0baf16f2 6375#endif
252b5132 6376
b9c361e0
JL		 6377void
6378ppc_frag_check (struct frag *fragP)
6379{
6380 if (!fragP->has_code)
6381 return;
6382
6383 if (ppc_mach() == bfd_mach_ppc_vle)
6384 {
6385 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6386 as_bad (_("instruction address is not a multiple of 2"));
6387 }
6388 else
6389 {
6390 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6391 as_bad (_("instruction address is not a multiple of 4"));
6392 }
6393}
6394
3aeeedbb
AM		 6395/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6396 rs_align_code frag. */
6397
6398void
6399ppc_handle_align (struct frag *fragP)
6400{
6401 valueT count = (fragP->fr_next->fr_address
6402 - (fragP->fr_address + fragP->fr_fix));
6403
b9c361e0
JL		 6404 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6405 {
6406 char *dest = fragP->fr_literal + fragP->fr_fix;
6407
6408 fragP->fr_var = 2;
6409 md_number_to_chars (dest, 0x4400, 2);
6410 }
6411 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6412 {
6413 char *dest = fragP->fr_literal + fragP->fr_fix;
6414
6415 fragP->fr_var = 4;
cef4f754
AM		 6416
6417 if (count > 4 * nop_limit && count < 0x2000000)
6418 {
6419 struct frag *rest;
6420
6421 /* Make a branch, then follow with nops. Insert another
6422 frag to handle the nops. */
6423 md_number_to_chars (dest, 0x48000000 + count, 4);
6424 count -= 4;
6425 if (count == 0)
6426 return;
6427
6428 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6429 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6430 fragP->fr_next = rest;
6431 fragP = rest;
6432 rest->fr_address += rest->fr_fix + 4;
6433 rest->fr_fix = 0;
6434 /* If we leave the next frag as rs_align_code we'll come here
6435 again, resulting in a bunch of branches rather than a
6436 branch followed by nops. */
6437 rest->fr_type = rs_align;
6438 dest = rest->fr_literal;
6439 }
6440
3aeeedbb
AM		 6441 md_number_to_chars (dest, 0x60000000, 4);
6442
42240548 6443 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6444 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6445 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6446 {
5817ffd1 6447 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6448 terminating one. Do this by inserting an rs_fill frag immediately
6449 after this one, with its address set to the last nop location.
6450 This will automatically reduce the number of nops in the current
6451 frag by one. */
3aeeedbb
AM		 6452 if (count > 4)
6453 {
6454 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6455
6456 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6457 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6458 group_nop->fr_fix = 0;
6459 group_nop->fr_offset = 1;
6460 group_nop->fr_type = rs_fill;
6461 fragP->fr_next = group_nop;
6462 dest = group_nop->fr_literal;
6463 }
6464
5817ffd1
PB		 6465 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6466 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6467 {
6468 if (ppc_cpu & PPC_OPCODE_E500MC)
6469 /* e500mc group terminating nop: "ori 0,0,0". */
6470 md_number_to_chars (dest, 0x60000000, 4);
6471 else
5817ffd1 6472 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6473 md_number_to_chars (dest, 0x60420000, 4);
6474 }
42240548
PB		 6475 else
6476 /* power6 group terminating nop: "ori 1,1,0". */
6477 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6478 }
6479 }
6480}
6481
252b5132 6482/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6483 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6484
94f592af 6485void
62ebcb5c 6486md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6487{
94f592af 6488 valueT value = * valP;
5656a981
AM		 6489 offsetT fieldval;
6490 const struct powerpc_operand *operand;
252b5132
RH		 6491
6492#ifdef OBJ_ELF
94f592af 6493 if (fixP->fx_addsy != NULL)
252b5132 6494 {
a161fe53 6495 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6496 if (fixP->fx_pcrel)
6497 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6498 }
6499 else
94f592af 6500 fixP->fx_done = 1;
252b5132 6501#else
a161fe53 6502 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6503 the symbol values. If we are doing this relocation the code in
6504 write.c is going to call bfd_install_relocation, which is also
6505 going to use the symbol value. That means that if the reloc is
6506 fully resolved we want to use *valP since bfd_install_relocation is
6507 not being used.
9f0eb232
RS		 6508 However, if the reloc is not fully resolved we do not want to
6509 use *valP, and must use fx_offset instead. If the relocation
6510 is PC-relative, we then need to re-apply md_pcrel_from_section
6511 to this new relocation value. */
94f592af
NC		 6512 if (fixP->fx_addsy == (symbolS *) NULL)
6513 fixP->fx_done = 1;
6514
252b5132 6515 else
9f0eb232
RS		 6516 {
6517 value = fixP->fx_offset;
6518 if (fixP->fx_pcrel)
6519 value -= md_pcrel_from_section (fixP, seg);
6520 }
a161fe53
AM		 6521#endif
6522
6523 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6524 {
a161fe53
AM		 6525 /* We can't actually support subtracting a symbol. */
6526 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6527 }
252b5132 6528
5656a981 6529 operand = NULL;
3b8b57a9 6530 if (fixP->fx_pcrel_adjust != 0)
252b5132 6531 {
5656a981 6532 /* This is a fixup on an instruction. */
3b8b57a9 6533 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6534
5656a981 6535 operand = &powerpc_operands[opindex];
252b5132 6536#ifdef OBJ_XCOFF
0baf16f2
AM		 6537 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6538 does not generate a reloc. It uses the offset of `sym' within its
6539 csect. Other usages, such as `.long sym', generate relocs. This
6540 is the documented behaviour of non-TOC symbols. */
252b5132 6541 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6542 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6543 && operand->shift == 0
2b3c4602 6544 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6545 && fixP->fx_addsy != NULL
6546 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6547 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6548 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6549 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6550 {
94f592af
NC		 6551 value = fixP->fx_offset;
6552 fixP->fx_done = 1;
252b5132 6553 }
ac21e7da
TG		 6554
6555 /* During parsing of instructions, a TOC16 reloc is generated for
6556 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6557 in the toc. But at parse time, SYM may be not yet defined, so
6558 check again here. */
6559 if (fixP->fx_r_type == BFD_RELOC_16
6560 && fixP->fx_addsy != NULL
6561 && ppc_is_toc_sym (fixP->fx_addsy))
6562 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6563#endif
5656a981
AM		 6564 }
6565
6566 /* Calculate value to be stored in field. */
6567 fieldval = value;
6568 switch (fixP->fx_r_type)
6569 {
1ec2d25e 6570#ifdef OBJ_ELF
5656a981
AM		 6571 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6572 case BFD_RELOC_PPC_VLE_LO16A:
6573 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6574#endif
5656a981
AM		 6575 case BFD_RELOC_LO16:
6576 case BFD_RELOC_LO16_PCREL:
6577 fieldval = value & 0xffff;
6578 sign_extend_16:
6579 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6580 fieldval = SEX16 (fieldval);
5656a981
AM		 6581 fixP->fx_no_overflow = 1;
6582 break;
3c9d25f4 6583
f9c6b907
AM		 6584 case BFD_RELOC_HI16:
6585 case BFD_RELOC_HI16_PCREL:
5656a981 6586#ifdef OBJ_ELF
f9c6b907
AM		 6587 if (REPORT_OVERFLOW_HI && ppc_obj64)
6588 {
6589 fieldval = value >> 16;
6590 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6591 {
6592 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6593 fieldval = ((valueT) fieldval ^ sign) - sign;
6594 }
6595 break;
6596 }
6597 /* Fall thru */
6598
5656a981
AM		 6599 case BFD_RELOC_PPC_VLE_HI16A:
6600 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6601 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6602#endif
5656a981
AM		 6603 fieldval = PPC_HI (value);
6604 goto sign_extend_16;
0baf16f2 6605
f9c6b907
AM		 6606 case BFD_RELOC_HI16_S:
6607 case BFD_RELOC_HI16_S_PCREL:
5656a981 6608#ifdef OBJ_ELF
f9c6b907
AM		 6609 if (REPORT_OVERFLOW_HI && ppc_obj64)
6610 {
6611 fieldval = (value + 0x8000) >> 16;
6612 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6613 {
6614 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6615 fieldval = ((valueT) fieldval ^ sign) - sign;
6616 }
6617 break;
6618 }
6619 /* Fall thru */
6620
5656a981
AM		 6621 case BFD_RELOC_PPC_VLE_HA16A:
6622 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6623 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6624#endif
5656a981
AM		 6625 fieldval = PPC_HA (value);
6626 goto sign_extend_16;
0baf16f2 6627
3b8b57a9 6628#ifdef OBJ_ELF
5656a981
AM		 6629 case BFD_RELOC_PPC64_HIGHER:
6630 fieldval = PPC_HIGHER (value);
6631 goto sign_extend_16;
252b5132 6632
5656a981
AM		 6633 case BFD_RELOC_PPC64_HIGHER_S:
6634 fieldval = PPC_HIGHERA (value);
6635 goto sign_extend_16;
0baf16f2 6636
5656a981
AM		 6637 case BFD_RELOC_PPC64_HIGHEST:
6638 fieldval = PPC_HIGHEST (value);
6639 goto sign_extend_16;
0baf16f2 6640
5656a981
AM		 6641 case BFD_RELOC_PPC64_HIGHEST_S:
6642 fieldval = PPC_HIGHESTA (value);
6643 goto sign_extend_16;
6644#endif
6645
6646 default:
6647 break;
6648 }
6649
6650 if (operand != NULL)
6651 {
6652 /* Handle relocs in an insn. */
6653 char *where;
6654 unsigned long insn;
0baf16f2 6655
5656a981
AM		 6656 switch (fixP->fx_r_type)
6657 {
7fa9fcb6 6658#ifdef OBJ_ELF
3b8b57a9
AM		 6659 /* The following relocs can't be calculated by the assembler.
6660 Leave the field zero. */
cdba85ec
AM		 6661 case BFD_RELOC_PPC_TPREL16:
6662 case BFD_RELOC_PPC_TPREL16_LO:
6663 case BFD_RELOC_PPC_TPREL16_HI:
6664 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6665 case BFD_RELOC_PPC_DTPREL16:
6666 case BFD_RELOC_PPC_DTPREL16_LO:
6667 case BFD_RELOC_PPC_DTPREL16_HI:
6668 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6669 case BFD_RELOC_PPC_GOT_TLSGD16:
6670 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6671 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6672 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6673 case BFD_RELOC_PPC_GOT_TLSLD16:
6674 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6675 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6676 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6677 case BFD_RELOC_PPC_GOT_TPREL16:
6678 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6679 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6680 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6681 case BFD_RELOC_PPC_GOT_DTPREL16:
6682 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6683 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6684 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6685 case BFD_RELOC_PPC64_TPREL16_DS:
6686 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6687 case BFD_RELOC_PPC64_TPREL16_HIGH:
6688 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6689 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6690 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6691 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6692 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6693 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6694 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6695 case BFD_RELOC_PPC64_DTPREL16_DS:
6696 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6697 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6698 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6699 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6700 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6701 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6702 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6703 fieldval = 0;
cdba85ec 6704 break;
3b8b57a9
AM		 6705
6706 /* These also should leave the field zero for the same
6707 reason. Note that older versions of gas wrote values
6708 here. If we want to go back to the old behaviour, then
6709 all _LO and _LO_DS cases will need to be treated like
6710 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6711 case BFD_RELOC_16_GOTOFF:
6712 case BFD_RELOC_LO16_GOTOFF:
6713 case BFD_RELOC_HI16_GOTOFF:
6714 case BFD_RELOC_HI16_S_GOTOFF:
6715 case BFD_RELOC_LO16_PLTOFF:
6716 case BFD_RELOC_HI16_PLTOFF:
6717 case BFD_RELOC_HI16_S_PLTOFF:
6718 case BFD_RELOC_GPREL16:
6719 case BFD_RELOC_16_BASEREL:
6720 case BFD_RELOC_LO16_BASEREL:
6721 case BFD_RELOC_HI16_BASEREL:
6722 case BFD_RELOC_HI16_S_BASEREL:
6723 case BFD_RELOC_PPC_TOC16:
6724 case BFD_RELOC_PPC64_TOC16_LO:
6725 case BFD_RELOC_PPC64_TOC16_HI:
6726 case BFD_RELOC_PPC64_TOC16_HA:
6727 case BFD_RELOC_PPC64_PLTGOT16:
6728 case BFD_RELOC_PPC64_PLTGOT16_LO:
6729 case BFD_RELOC_PPC64_PLTGOT16_HI:
6730 case BFD_RELOC_PPC64_PLTGOT16_HA:
6731 case BFD_RELOC_PPC64_GOT16_DS:
6732 case BFD_RELOC_PPC64_GOT16_LO_DS:
6733 case BFD_RELOC_PPC64_PLT16_LO_DS:
6734 case BFD_RELOC_PPC64_SECTOFF_DS:
6735 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6736 case BFD_RELOC_PPC64_TOC16_DS:
6737 case BFD_RELOC_PPC64_TOC16_LO_DS:
6738 case BFD_RELOC_PPC64_PLTGOT16_DS:
6739 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6740 case BFD_RELOC_PPC_EMB_NADDR16:
6741 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6742 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6743 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6744 case BFD_RELOC_PPC_EMB_SDAI16:
6745 case BFD_RELOC_PPC_EMB_SDA2I16:
6746 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6747 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6748 case BFD_RELOC_PPC_EMB_MRKREF:
6749 case BFD_RELOC_PPC_EMB_RELSEC16:
6750 case BFD_RELOC_PPC_EMB_RELST_LO:
6751 case BFD_RELOC_PPC_EMB_RELST_HI:
6752 case BFD_RELOC_PPC_EMB_RELST_HA:
6753 case BFD_RELOC_PPC_EMB_BIT_FLD:
6754 case BFD_RELOC_PPC_EMB_RELSDA:
6755 case BFD_RELOC_PPC_VLE_SDA21:
6756 case BFD_RELOC_PPC_VLE_SDA21_LO:
6757 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6758 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6759 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6760 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6761 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6762 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6763 gas_assert (fixP->fx_addsy != NULL);
6764 /* Fall thru */
6765
6766 case BFD_RELOC_PPC_TLS:
6767 case BFD_RELOC_PPC_TLSGD:
6768 case BFD_RELOC_PPC_TLSLD:
6769 fieldval = 0;
3b8b57a9 6770 break;
7fa9fcb6
TG		 6771#endif
6772
6773#ifdef OBJ_XCOFF
6774 case BFD_RELOC_PPC_B16:
6775 /* Adjust the offset to the instruction boundary. */
6776 fieldval += 2;
6777 break;
6778#endif
252b5132 6779
f728387b
AM		 6780 case BFD_RELOC_VTABLE_INHERIT:
6781 case BFD_RELOC_VTABLE_ENTRY:
6782 case BFD_RELOC_PPC_DTPMOD:
6783 case BFD_RELOC_PPC_TPREL:
6784 case BFD_RELOC_PPC_DTPREL:
6785 case BFD_RELOC_PPC_COPY:
6786 case BFD_RELOC_PPC_GLOB_DAT:
6787 case BFD_RELOC_32_PLT_PCREL:
6788 case BFD_RELOC_PPC_EMB_NADDR32:
6789 case BFD_RELOC_PPC64_TOC:
6790 case BFD_RELOC_CTOR:
6791 case BFD_RELOC_32:
6792 case BFD_RELOC_32_PCREL:
6793 case BFD_RELOC_RVA:
6794 case BFD_RELOC_64:
6795 case BFD_RELOC_64_PCREL:
6796 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6797 as_bad_where (fixP->fx_file, fixP->fx_line,
6798 _("%s unsupported as instruction fixup"),
6799 bfd_get_reloc_code_name (fixP->fx_r_type));
6800 fixP->fx_done = 1;
6801 return;
6802
3b8b57a9 6803 default:
252b5132 6804 break;
3b8b57a9 6805 }
252b5132 6806
3b8b57a9
AM		 6807#ifdef OBJ_ELF
6808/* powerpc uses RELA style relocs, so if emitting a reloc the field
6809 contents can stay at zero. */
6810#define APPLY_RELOC fixP->fx_done
6811#else
6812#define APPLY_RELOC 1
6813#endif
6814 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6815 {
6816 /* Fetch the instruction, insert the fully resolved operand
6817 value, and stuff the instruction back again. */
6818 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6819 if (target_big_endian)
31a91399 6820 {
3b8b57a9
AM		 6821 if (fixP->fx_size == 4)
6822 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6823 else
3b8b57a9 6824 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6825 }
6826 else
3b8b57a9
AM		 6827 {
6828 if (fixP->fx_size == 4)
6829 insn = bfd_getl32 ((unsigned char *) where);
6830 else
6831 insn = bfd_getl16 ((unsigned char *) where);
6832 }
6833 insn = ppc_insert_operand (insn, operand, fieldval,
6834 fixP->tc_fix_data.ppc_cpu,
6835 fixP->fx_file, fixP->fx_line);
6836 if (target_big_endian)
6837 {
6838 if (fixP->fx_size == 4)
6839 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6840 else
6841 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6842 }
6843 else
6844 {
6845 if (fixP->fx_size == 4)
6846 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6847 else
6848 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6849 }
6850 }
6851
6852 if (fixP->fx_done)
6853 /* Nothing else to do here. */
6854 return;
6855
6856 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6857 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9
AM		 6858 {
6859 char *sfile;
6860 unsigned int sline;
6861
6862 /* Use expr_symbol_where to see if this is an expression
6863 symbol. */
6864 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6865 as_bad_where (fixP->fx_file, fixP->fx_line,
6866 _("unresolved expression that must be resolved"));
6867 else
6868 as_bad_where (fixP->fx_file, fixP->fx_line,
6869 _("unsupported relocation against %s"),
6870 S_GET_NAME (fixP->fx_addsy));
6871 fixP->fx_done = 1;
6872 return;
6873 }
6874 }
6875 else
6876 {
6877 /* Handle relocs in data. */
6878 switch (fixP->fx_r_type)
6879 {
252b5132 6880 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6881 if (fixP->fx_addsy
6882 && !S_IS_DEFINED (fixP->fx_addsy)
6883 && !S_IS_WEAK (fixP->fx_addsy))
6884 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6885 /* Fall thru */
252b5132
RH		 6886
6887 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6888 fixP->fx_done = 0;
252b5132
RH		 6889 break;
6890
0baf16f2 6891#ifdef OBJ_ELF
3b8b57a9
AM		 6892 /* These can appear with @l etc. in data. */
6893 case BFD_RELOC_LO16:
3b8b57a9 6894 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6895 case BFD_RELOC_HI16:
3b8b57a9 6896 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6897 case BFD_RELOC_HI16_S:
3b8b57a9 6898 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6899 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6900 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6901 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6902 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6903 case BFD_RELOC_PPC64_ADDR16_HIGH:
6904 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6905 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6906 break;
6907
6908 case BFD_RELOC_PPC_DTPMOD:
6909 case BFD_RELOC_PPC_TPREL:
6910 case BFD_RELOC_PPC_DTPREL:
6911 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6912 break;
6913
6914 /* Just punt all of these to the linker. */
6915 case BFD_RELOC_PPC_B16_BRTAKEN:
6916 case BFD_RELOC_PPC_B16_BRNTAKEN:
6917 case BFD_RELOC_16_GOTOFF:
6918 case BFD_RELOC_LO16_GOTOFF:
6919 case BFD_RELOC_HI16_GOTOFF:
6920 case BFD_RELOC_HI16_S_GOTOFF:
6921 case BFD_RELOC_LO16_PLTOFF:
6922 case BFD_RELOC_HI16_PLTOFF:
6923 case BFD_RELOC_HI16_S_PLTOFF:
6924 case BFD_RELOC_PPC_COPY:
6925 case BFD_RELOC_PPC_GLOB_DAT:
6926 case BFD_RELOC_16_BASEREL:
6927 case BFD_RELOC_LO16_BASEREL:
6928 case BFD_RELOC_HI16_BASEREL:
6929 case BFD_RELOC_HI16_S_BASEREL:
6930 case BFD_RELOC_PPC_TLS:
6931 case BFD_RELOC_PPC_DTPREL16_LO:
6932 case BFD_RELOC_PPC_DTPREL16_HI:
6933 case BFD_RELOC_PPC_DTPREL16_HA:
6934 case BFD_RELOC_PPC_TPREL16_LO:
6935 case BFD_RELOC_PPC_TPREL16_HI:
6936 case BFD_RELOC_PPC_TPREL16_HA:
6937 case BFD_RELOC_PPC_GOT_TLSGD16:
6938 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6939 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6940 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6941 case BFD_RELOC_PPC_GOT_TLSLD16:
6942 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6943 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6944 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6945 case BFD_RELOC_PPC_GOT_DTPREL16:
6946 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6947 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6948 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6949 case BFD_RELOC_PPC_GOT_TPREL16:
6950 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6951 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6952 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6953 case BFD_RELOC_24_PLT_PCREL:
6954 case BFD_RELOC_PPC_LOCAL24PC:
6955 case BFD_RELOC_32_PLT_PCREL:
6956 case BFD_RELOC_GPREL16:
6957 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6958 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6959 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6960 case BFD_RELOC_PPC_EMB_NADDR32:
6961 case BFD_RELOC_PPC_EMB_NADDR16:
6962 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6963 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6964 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6965 case BFD_RELOC_PPC_EMB_SDAI16:
6966 case BFD_RELOC_PPC_EMB_SDA2REL:
6967 case BFD_RELOC_PPC_EMB_SDA2I16:
6968 case BFD_RELOC_PPC_EMB_SDA21:
6969 case BFD_RELOC_PPC_VLE_SDA21_LO:
6970 case BFD_RELOC_PPC_EMB_MRKREF:
6971 case BFD_RELOC_PPC_EMB_RELSEC16:
6972 case BFD_RELOC_PPC_EMB_RELST_LO:
6973 case BFD_RELOC_PPC_EMB_RELST_HI:
6974 case BFD_RELOC_PPC_EMB_RELST_HA:
6975 case BFD_RELOC_PPC_EMB_BIT_FLD:
6976 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6977 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6978 case BFD_RELOC_PPC_TOC16:
6979 case BFD_RELOC_PPC64_TOC16_LO:
6980 case BFD_RELOC_PPC64_TOC16_HI:
6981 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6982 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6983 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6984 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6985 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6986 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6987 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6988 case BFD_RELOC_PPC64_TPREL16_HIGH:
6989 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6990 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6991 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6992 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6993 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6994 fixP->fx_done = 0;
0baf16f2 6995 break;
0baf16f2 6996#endif
3b8b57a9
AM		 6997
6998#ifdef OBJ_XCOFF
6999 case BFD_RELOC_NONE:
3b8b57a9 7000#endif
5656a981
AM		 7001 case BFD_RELOC_CTOR:
7002 case BFD_RELOC_32:
7003 case BFD_RELOC_32_PCREL:
7004 case BFD_RELOC_RVA:
7005 case BFD_RELOC_64:
7006 case BFD_RELOC_64_PCREL:
7007 case BFD_RELOC_16:
7008 case BFD_RELOC_16_PCREL:
7009 case BFD_RELOC_8:
7010 break;
3b8b57a9 7011
252b5132 7012 default:
bc805888 7013 fprintf (stderr,
94f592af 7014 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 7015 fflush (stderr);
252b5132
RH		 7016 abort ();
7017 }
46b596ff 7018
5656a981 7019 if (fixP->fx_size && APPLY_RELOC)
46b596ff 7020 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 7021 fieldval, fixP->fx_size);
bf7279d5
AM		 7022 if (warn_476
7023 && (seg->flags & SEC_CODE) != 0
7024 && fixP->fx_size == 4
7025 && fixP->fx_done
7026 && !fixP->fx_tcbit
7027 && (fixP->fx_r_type == BFD_RELOC_32
7028 || fixP->fx_r_type == BFD_RELOC_CTOR
7029 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7030 as_warn_where (fixP->fx_file, fixP->fx_line,
7031 _("data in executable section"));
5656a981
AM		 7032 }
7033
7034 /* We are only able to convert some relocs to pc-relative. */
7035 if (!fixP->fx_done && fixP->fx_pcrel)
7036 {
7037 switch (fixP->fx_r_type)
7038 {
7039 case BFD_RELOC_LO16:
7040 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7041 break;
7042
7043 case BFD_RELOC_HI16:
7044 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7045 break;
7046
7047 case BFD_RELOC_HI16_S:
7048 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7049 break;
7050
7051 case BFD_RELOC_64:
7052 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7053 break;
7054
7055 case BFD_RELOC_32:
7056 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7057 break;
7058
7059 case BFD_RELOC_16:
7060 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7061 break;
7062
7063 /* Some of course are already pc-relative. */
7064 case BFD_RELOC_LO16_PCREL:
7065 case BFD_RELOC_HI16_PCREL:
7066 case BFD_RELOC_HI16_S_PCREL:
7067 case BFD_RELOC_64_PCREL:
7068 case BFD_RELOC_32_PCREL:
7069 case BFD_RELOC_16_PCREL:
7070 case BFD_RELOC_PPC_B16:
7071 case BFD_RELOC_PPC_B16_BRTAKEN:
7072 case BFD_RELOC_PPC_B16_BRNTAKEN:
7073 case BFD_RELOC_PPC_B26:
7074 case BFD_RELOC_PPC_LOCAL24PC:
7075 case BFD_RELOC_24_PLT_PCREL:
7076 case BFD_RELOC_32_PLT_PCREL:
7077 case BFD_RELOC_64_PLT_PCREL:
7078 case BFD_RELOC_PPC_VLE_REL8:
7079 case BFD_RELOC_PPC_VLE_REL15:
7080 case BFD_RELOC_PPC_VLE_REL24:
7081 break;
7082
7083 default:
7084 if (fixP->fx_addsy)
7085 {
7086 char *sfile;
7087 unsigned int sline;
7088
7089 /* Use expr_symbol_where to see if this is an
7090 expression symbol. */
7091 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7092 as_bad_where (fixP->fx_file, fixP->fx_line,
7093 _("unresolved expression that must"
7094 " be resolved"));
7095 else
7096 as_bad_where (fixP->fx_file, fixP->fx_line,
7097 _("cannot emit PC relative %s relocation"
7098 " against %s"),
7099 bfd_get_reloc_code_name (fixP->fx_r_type),
7100 S_GET_NAME (fixP->fx_addsy));
7101 }
7102 else
7103 as_bad_where (fixP->fx_file, fixP->fx_line,
7104 _("unable to resolve expression"));
7105 fixP->fx_done = 1;
7106 break;
7107 }
252b5132
RH		 7108 }
7109
7110#ifdef OBJ_ELF
3b8b57a9 7111 ppc_elf_validate_fix (fixP, seg);
94f592af 7112 fixP->fx_addnumber = value;
4e6935a6
AM		 7113
7114 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7115 from the section contents. If we are going to be emitting a reloc
7116 then the section contents are immaterial, so don't warn if they
7117 happen to overflow. Leave such warnings to ld. */
7118 if (!fixP->fx_done)
a38a07e0
AM		 7119 {
7120 fixP->fx_no_overflow = 1;
7121
7122 /* Arrange to emit .TOC. as a normal symbol if used in anything
7123 but .TOC.@tocbase. */
7124 if (ppc_obj64
7125 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7126 && fixP->fx_addsy != NULL
7127 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7128 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7129 }
252b5132 7130#else
94f592af
NC		 7131 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7132 fixP->fx_addnumber = 0;
252b5132
RH		 7133 else
7134 {
7135#ifdef TE_PE
94f592af 7136 fixP->fx_addnumber = 0;
252b5132 7137#else
8edcbfcd
TG		 7138 /* We want to use the offset within the toc, not the actual VMA
7139 of the symbol. */
94f592af 7140 fixP->fx_addnumber =
8edcbfcd
TG		 7141 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7142 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7143 /* Set *valP to avoid errors. */
7144 *valP = value;
252b5132
RH		 7145#endif
7146 }
7147#endif
252b5132
RH		 7148}
7149
7150/* Generate a reloc for a fixup. */
7151
7152arelent *
98027b10 7153tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7154{
7155 arelent *reloc;
7156
7157 reloc = (arelent *) xmalloc (sizeof (arelent));
7158
49309057
ILT		 7159 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7160 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7161 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7162 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7163 if (reloc->howto == (reloc_howto_type *) NULL)
7164 {
7165 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7166 _("reloc %d not supported by object file format"),
7167 (int) fixp->fx_r_type);
252b5132
RH		 7168 return NULL;
7169 }
7170 reloc->addend = fixp->fx_addnumber;
7171
7172 return reloc;
7173}
75e21f08
JJ		 7174
7175void
98027b10 7176ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7177{
7178 cfi_add_CFA_def_cfa (1, 0);
7179}
7180
7181int
1df69f4f 7182tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7183{
7184 unsigned int regnum = -1;
7185 unsigned int i;
7186 const char *p;
7187 char *q;
7188 static struct { char *name; int dw2regnum; } regnames[] =
7189 {
7190 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7191 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7192 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7193 { "spe_acc", 111 }, { "spefscr", 112 }
7194 };
7195
7196 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7197 if (strcmp (regnames[i].name, regname) == 0)
7198 return regnames[i].dw2regnum;
7199
7200 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7201 {
7202 p = regname + 1 + (regname[1] == '.');
7203 regnum = strtoul (p, &q, 10);
7204 if (p == q || *q || regnum >= 32)
7205 return -1;
7206 if (regname[0] == 'f')
b7d7dc63 7207 regnum += 32;
75e21f08 7208 else if (regname[0] == 'v')
b7d7dc63 7209 regnum += 77;
75e21f08
JJ		 7210 }
7211 else if (regname[0] == 'c' && regname[1] == 'r')
7212 {
7213 p = regname + 2 + (regname[2] == '.');
7214 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7215 return -1;
75e21f08
JJ		 7216 regnum = p[0] - '0' + 68;
7217 }
7218 return regnum;
7219}
GDB Binutils - Deliverables
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