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* config/tc-cr16.h (GLOBAL_OFFSET_TABLE_NAME): Defined
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
783de163 3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
81d4177b
KH		 361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
252b5132
RH		 392 { "f30", 30 },
393 { "f31", 31 },
81d4177b
KH		 394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
252b5132
RH		 400
401 { "fpscr", 0 },
402
c3d65c1c
BE		 403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
252b5132
RH		 421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 503
7a899fff 504 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
7a899fff
C		 528 { "v.30", 30 },
529 { "v.31", 31 },
81d4177b
KH		 530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
7a899fff
C		 536
537 { "v0", 0 },
81d4177b
KH		 538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
7a899fff
C		 561 { "v30", 30 },
562 { "v31", 31 },
81d4177b
KH		 563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
7a899fff 568 { "v9", 9 },
252b5132
RH		 569
570 { "xer", 1 },
571
572};
573
bc805888 574#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 575
576/* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
252b5132 579static int
98027b10 580reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 581{
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602}
603
604/*
99a814a1 605 * Summary of register_name.
252b5132
RH		 606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
b34976b6 616static bfd_boolean
98027b10 617register_name (expressionS *expressionP)
252b5132
RH		 618{
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
99a814a1 624 /* Find the spelling of the operand. */
252b5132 625 start = name = input_line_pointer;
3882b010 626 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 627 name = ++input_line_pointer;
628
3882b010 629 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 630 return FALSE;
252b5132
RH		 631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
468cced8
AM		 635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
99a814a1 638 /* Look to see if it's in the register table. */
81d4177b 639 if (reg_number >= 0)
252b5132
RH		 640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
81d4177b 643
99a814a1 644 /* Make the rest nice. */
252b5132
RH		 645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
b34976b6 647 return TRUE;
252b5132 648 }
468cced8
AM		 649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
b34976b6 652 return FALSE;
252b5132
RH		 653}
654\f
655/* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659/* Whether to do the special parsing. */
b34976b6 660static bfd_boolean cr_operand;
252b5132
RH		 661
662/* Names to recognize in a condition code. This table is sorted. */
663static const struct pd_reg cr_names[] =
664{
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678};
679
680/* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683int
98027b10 684ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
13abbae3
AM		 691 if (*name == '%')
692 ++name;
252b5132
RH		 693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702}
703\f
704/* Local variables. */
705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
9b4e5766
PB		 828 ppc_cpu_t retain_flags =
829 ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SPE);
b0e34bfe 830
69c040df
AM		 831 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
832 (RIOS2). */
833 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
835 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
836 else if (strcmp (arg, "pwr") == 0)
837 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
838 /* -m601 means to assemble for the PowerPC 601, which includes
839 instructions that are holdovers from the Power. */
840 else if (strcmp (arg, "601") == 0)
841 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
842 | PPC_OPCODE_601 | PPC_OPCODE_32);
843 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
844 PowerPC 603/604. */
845 else if (strcmp (arg, "ppc") == 0
846 || strcmp (arg, "ppc32") == 0
847 || strcmp (arg, "603") == 0
848 || strcmp (arg, "604") == 0)
849 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 850 /* Do all PPC750s have paired single ops? */
851 else if (strcmp (arg, "750cl") == 0)
852 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
081ba1b3 853 else if (strcmp (arg, "403") == 0)
69c040df
AM		 854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
855 | PPC_OPCODE_403 | PPC_OPCODE_32);
081ba1b3
AM		 856 else if (strcmp (arg, "405") == 0)
857 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
858 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
c8187e15
PB		 859 else if (strcmp (arg, "440") == 0
860 || strcmp (arg, "464") == 0)
69c040df
AM		 861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
862 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
863 else if (strcmp (arg, "7400") == 0
864 || strcmp (arg, "7410") == 0
865 || strcmp (arg, "7450") == 0
866 || strcmp (arg, "7455") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
868 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 869 else if (strcmp (arg, "e300") == 0)
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
871 | PPC_OPCODE_E300);
69c040df
AM		 872 else if (strcmp (arg, "altivec") == 0)
873 {
874 if (ppc_cpu == 0)
b0e34bfe
NC		 875 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
876
9b4e5766
PB		 877 retain_flags |= PPC_OPCODE_ALTIVEC;
878 }
879 else if (strcmp (arg, "vsx") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
883
884 retain_flags |= PPC_OPCODE_VSX;
69c040df
AM		 885 }
886 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
887 {
888 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
889 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
890 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
19a6653c
AM		 891 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
892 }
893 else if (strcmp (arg, "e500mc") == 0)
894 {
895 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
896 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
897 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
69c040df
AM		 898 }
899 else if (strcmp (arg, "spe") == 0)
900 {
901 if (ppc_cpu == 0)
b0e34bfe
NC		 902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
903
9b4e5766 904 retain_flags |= PPC_OPCODE_SPE;
69c040df
AM		 905 }
906 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
907 620. */
908 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
909 {
910 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
911 }
912 else if (strcmp (arg, "ppc64bridge") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
916 }
917 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
918 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
919 {
920 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
921 }
922 /* -mbooke64 means enable 64-bit BookE support. */
923 else if (strcmp (arg, "booke64") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
926 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
927 }
928 else if (strcmp (arg, "power4") == 0)
929 {
930 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
931 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
932 }
b0648eec
AM		 933 else if (strcmp (arg, "power5") == 0)
934 {
935 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
936 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
937 | PPC_OPCODE_POWER5);
938 }
9622b051
AM		 939 else if (strcmp (arg, "power6") == 0)
940 {
941 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
942 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209
PB		 943 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
944 | PPC_OPCODE_ALTIVEC);
9622b051 945 }
9b4e5766
PB		 946 else if (strcmp (arg, "power7") == 0)
947 {
948 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
949 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
950 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
951 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
952 }
ede602d7
AM		 953 else if (strcmp (arg, "cell") == 0)
954 {
955 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
956 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209 957 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
ede602d7 958 }
69c040df
AM		 959 /* -mcom means assemble for the common intersection between Power
960 and PowerPC. At present, we just allow the union, rather
961 than the intersection. */
962 else if (strcmp (arg, "com") == 0)
963 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
964 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
965 else if (strcmp (arg, "any") == 0)
966 ppc_cpu |= PPC_OPCODE_ANY;
967 else
968 return 0;
969
9b4e5766
PB		 970 /* Make sure the the Altivec, VSX and SPE bits are not lost. */
971 ppc_cpu |= retain_flags;
69c040df
AM		 972 return 1;
973}
974
252b5132 975int
98027b10 976md_parse_option (int c, char *arg)
252b5132
RH		 977{
978 switch (c)
979 {
980 case 'u':
981 /* -u means that any undefined symbols should be treated as
982 external, which is the default for gas anyhow. */
983 break;
984
985#ifdef OBJ_ELF
986 case 'l':
987 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 988 sake, recognize -be also. */
252b5132
RH		 989 if (strcmp (arg, "e") == 0)
990 {
991 target_big_endian = 0;
992 set_target_endian = 1;
993 }
994 else
995 return 0;
996
997 break;
998
999 case 'b':
1000 if (strcmp (arg, "e") == 0)
1001 {
1002 target_big_endian = 1;
1003 set_target_endian = 1;
1004 }
1005 else
1006 return 0;
1007
1008 break;
1009
1010 case 'K':
99a814a1 1011 /* Recognize -K PIC. */
252b5132
RH		 1012 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1013 {
1014 shlib = SHLIB_PIC;
1015 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1016 }
1017 else
1018 return 0;
1019
1020 break;
1021#endif
1022
7f6d05e8
CP		 1023 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1024 case 'a':
1025 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1026 {
1027#ifdef BFD64
1028 ppc_obj64 = 1;
1029#else
1030 as_fatal (_("%s unsupported"), "-a64");
1031#endif
1032 }
7f6d05e8 1033 else if (strcmp (arg, "32") == 0)
2b3c4602 1034 ppc_obj64 = 0;
7f6d05e8
CP		 1035 else
1036 return 0;
1037 break;
81d4177b 1038
252b5132 1039 case 'm':
69c040df
AM		 1040 if (parse_cpu (arg))
1041 ;
252b5132
RH		 1042
1043 else if (strcmp (arg, "regnames") == 0)
b34976b6 1044 reg_names_p = TRUE;
252b5132
RH		 1045
1046 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1047 reg_names_p = FALSE;
252b5132
RH		 1048
1049#ifdef OBJ_ELF
99a814a1
AM		 1050 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1051 that require relocation. */
252b5132
RH		 1052 else if (strcmp (arg, "relocatable") == 0)
1053 {
5d6f4f16 1054 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1055 ppc_flags |= EF_PPC_RELOCATABLE;
1056 }
1057
1058 else if (strcmp (arg, "relocatable-lib") == 0)
1059 {
5d6f4f16 1060 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1061 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1062 }
1063
99a814a1 1064 /* -memb, set embedded bit. */
252b5132
RH		 1065 else if (strcmp (arg, "emb") == 0)
1066 ppc_flags |= EF_PPC_EMB;
1067
99a814a1
AM		 1068 /* -mlittle/-mbig set the endianess. */
1069 else if (strcmp (arg, "little") == 0
1070 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1071 {
1072 target_big_endian = 0;
1073 set_target_endian = 1;
1074 }
1075
1076 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1077 {
1078 target_big_endian = 1;
1079 set_target_endian = 1;
1080 }
1081
1082 else if (strcmp (arg, "solaris") == 0)
1083 {
b34976b6 1084 msolaris = TRUE;
252b5132
RH		 1085 ppc_comment_chars = ppc_solaris_comment_chars;
1086 }
1087
1088 else if (strcmp (arg, "no-solaris") == 0)
1089 {
b34976b6 1090 msolaris = FALSE;
252b5132
RH		 1091 ppc_comment_chars = ppc_eabi_comment_chars;
1092 }
1093#endif
1094 else
1095 {
1096 as_bad (_("invalid switch -m%s"), arg);
1097 return 0;
1098 }
1099 break;
1100
1101#ifdef OBJ_ELF
1102 /* -V: SVR4 argument to print version ID. */
1103 case 'V':
1104 print_version_id ();
1105 break;
1106
1107 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1108 should be emitted or not. FIXME: Not implemented. */
1109 case 'Q':
1110 break;
1111
1112 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1113 rather than .stabs.excl, which is ignored by the linker.
1114 FIXME: Not implemented. */
1115 case 's':
1116 if (arg)
1117 return 0;
1118
1119 break;
1120#endif
1121
1122 default:
1123 return 0;
1124 }
1125
1126 return 1;
1127}
1128
1129void
98027b10 1130md_show_usage (FILE *stream)
252b5132 1131{
bc805888 1132 fprintf (stream, _("\
252b5132 1133PowerPC options:\n\
df12615d
AM		 1134-a32 generate ELF32/XCOFF32\n\
1135-a64 generate ELF64/XCOFF64\n\
252b5132 1136-u ignored\n\
23e1d84c
AM		 1137-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1138-mpwr generate code for POWER (RIOS1)\n\
1139-m601 generate code for PowerPC 601\n\
418c1742 1140-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1141 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1142-m403 generate code for PowerPC 403\n\
1143-m405 generate code for PowerPC 405\n\
3d8aea2f 1144-m440 generate code for PowerPC 440\n\
c8187e15 1145-m464 generate code for PowerPC 464\n\
f5c120c5 1146-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1147 generate code for PowerPC 7400/7410/7450/7455\n\
1148-m750cl generate code for PowerPC 750cl\n"));
df12615d 1149 fprintf (stream, _("\
23e1d84c 1150-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1151-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1152-mbooke64 generate code for 64-bit PowerPC BookE\n\
1153-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1154-mpower4 generate code for Power4 architecture\n\
b0648eec 1155-mpower5 generate code for Power5 architecture\n\
9622b051 1156-mpower6 generate code for Power6 architecture\n\
9b4e5766 1157-mpower7 generate code for Power7 architecture\n\
ede602d7 1158-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1159-mcom generate code Power/PowerPC common instructions\n\
df12615d 1160-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1161 fprintf (stream, _("\
df12615d 1162-maltivec generate code for AltiVec\n\
9b4e5766 1163-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1164-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1165-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1166-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1167-mspe generate code for Motorola SPE instructions\n\
1168-mregnames Allow symbolic names for registers\n\
1169-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1170#ifdef OBJ_ELF
bc805888 1171 fprintf (stream, _("\
252b5132
RH		 1172-mrelocatable support for GCC's -mrelocatble option\n\
1173-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1174-memb set PPC_EMB bit in ELF flags\n\
df12615d 1175-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1176 generate code for a little endian machine\n\
df12615d
AM		 1177-mbig, -mbig-endian, -b, -be\n\
1178 generate code for a big endian machine\n\
252b5132
RH		 1179-msolaris generate code for Solaris\n\
1180-mno-solaris do not generate code for Solaris\n\
1181-V print assembler version number\n\
1182-Qy, -Qn ignored\n"));
1183#endif
1184}
1185\f
1186/* Set ppc_cpu if it is not already set. */
1187
1188static void
98027b10 1189ppc_set_cpu (void)
252b5132
RH		 1190{
1191 const char *default_os = TARGET_OS;
1192 const char *default_cpu = TARGET_CPU;
1193
3c9030c1 1194 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1195 {
2a98c3a6 1196 if (ppc_obj64)
3c9030c1 1197 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1198 else if (strncmp (default_os, "aix", 3) == 0
1199 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1200 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1201 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1202 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1203 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1204 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1205 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1206 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1207 else
99a814a1
AM		 1208 as_fatal (_("Unknown default cpu = %s, os = %s"),
1209 default_cpu, default_os);
252b5132
RH		 1210 }
1211}
1212
9232bbb0
AM		 1213/* Figure out the BFD architecture to use. This function and ppc_mach
1214 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1215
1216enum bfd_architecture
98027b10 1217ppc_arch (void)
252b5132
RH		 1218{
1219 const char *default_cpu = TARGET_CPU;
1220 ppc_set_cpu ();
1221
1222 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1223 return bfd_arch_powerpc;
1224 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1225 return bfd_arch_rs6000;
1226 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1227 {
1228 if (strcmp (default_cpu, "rs6000") == 0)
1229 return bfd_arch_rs6000;
0baf16f2 1230 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1231 return bfd_arch_powerpc;
1232 }
1233
1234 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1235 return bfd_arch_unknown;
1236}
1237
7f6d05e8 1238unsigned long
98027b10 1239ppc_mach (void)
7f6d05e8 1240{
2a98c3a6
AM		 1241 if (ppc_obj64)
1242 return bfd_mach_ppc64;
1243 else if (ppc_arch () == bfd_arch_rs6000)
1244 return bfd_mach_rs6k;
1245 else
1246 return bfd_mach_ppc;
7f6d05e8
CP		 1247}
1248
81d4177b 1249extern char*
98027b10 1250ppc_target_format (void)
7f6d05e8
CP		 1251{
1252#ifdef OBJ_COFF
1253#ifdef TE_PE
99a814a1 1254 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1255#elif TE_POWERMAC
0baf16f2 1256 return "xcoff-powermac";
7f6d05e8 1257#else
eb1e0e80 1258# ifdef TE_AIX5
2b3c4602 1259 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1260# else
2b3c4602 1261 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1262# endif
7f6d05e8 1263#endif
7f6d05e8
CP		 1264#endif
1265#ifdef OBJ_ELF
9d8504b1
PB		 1266# ifdef TE_VXWORKS
1267 return "elf32-powerpc-vxworks";
1268# else
0baf16f2 1269 return (target_big_endian
2b3c4602
AM		 1270 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1271 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1272# endif
7f6d05e8
CP		 1273#endif
1274}
1275
69c040df
AM		 1276/* Insert opcodes and macros into hash tables. Called at startup and
1277 for .cpu pseudo. */
252b5132 1278
69c040df
AM		 1279static void
1280ppc_setup_opcodes (void)
252b5132 1281{
98027b10 1282 const struct powerpc_opcode *op;
252b5132
RH		 1283 const struct powerpc_opcode *op_end;
1284 const struct powerpc_macro *macro;
1285 const struct powerpc_macro *macro_end;
b84bf58a 1286 bfd_boolean bad_insn = FALSE;
252b5132 1287
69c040df
AM		 1288 if (ppc_hash != NULL)
1289 hash_die (ppc_hash);
1290 if (ppc_macro_hash != NULL)
1291 hash_die (ppc_macro_hash);
252b5132
RH		 1292
1293 /* Insert the opcodes into a hash table. */
1294 ppc_hash = hash_new ();
1295
c43a438d 1296 if (ENABLE_CHECKING)
b84bf58a 1297 {
c43a438d 1298 unsigned int i;
b84bf58a 1299
c43a438d
AM		 1300 /* Check operand masks. Code here and in the disassembler assumes
1301 all the 1's in the mask are contiguous. */
1302 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1303 {
c43a438d
AM		 1304 unsigned long mask = powerpc_operands[i].bitm;
1305 unsigned long right_bit;
1306 unsigned int j;
1307
1308 right_bit = mask & -mask;
1309 mask += right_bit;
1310 right_bit = mask & -mask;
1311 if (mask != right_bit)
1312 {
1313 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1314 bad_insn = TRUE;
1315 }
1316 for (j = i + 1; j < num_powerpc_operands; ++j)
1317 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1318 sizeof (powerpc_operands[0])) == 0)
1319 {
1320 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1321 j, i);
1322 bad_insn = TRUE;
1323 }
b84bf58a
AM		 1324 }
1325 }
1326
252b5132
RH		 1327 op_end = powerpc_opcodes + powerpc_num_opcodes;
1328 for (op = powerpc_opcodes; op < op_end; op++)
1329 {
c43a438d 1330 if (ENABLE_CHECKING)
b84bf58a 1331 {
c43a438d
AM		 1332 const unsigned char *o;
1333 unsigned long omask = op->mask;
8dbcd839 1334
d815f1a9 1335 if (op != powerpc_opcodes)
8dbcd839 1336 {
d815f1a9
AM		 1337 /* The major opcodes had better be sorted. Code in the
1338 disassembler assumes the insns are sorted according to
1339 major opcode. */
1340 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1341 {
1342 as_bad (_("major opcode is not sorted for %s"),
1343 op->name);
1344 bad_insn = TRUE;
1345 }
1346
1347 /* Warn if the table isn't more strictly ordered.
1348 Unfortunately it doesn't seem possible to order the
1349 table on much more than the major opcode, which makes
1350 it difficult to implement a binary search in the
1351 disassembler. The problem is that we have multiple
1352 ways to disassemble instructions, and we usually want
1353 to choose a more specific form (with more bits set in
1354 the opcode) than a more general form. eg. all of the
1355 following are equivalent:
1356 bne label # opcode = 0x40820000, mask = 0xff830003
1357 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1358 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1359
1360 There are also cases where the table needs to be out
1361 of order to disassemble the correct instruction for
1362 processor variants. eg. "lhae" booke64 insn must be
1363 found before "ld" ppc64 insn. */
1364 else if (0)
1365 {
1366 unsigned long t1 = op[0].opcode;
1367 unsigned long t2 = op[-1].opcode;
1368
1369 if (((t1 ^ t2) & 0xfc0007ff) == 0
1370 && (t1 & 0xfc0006df) == 0x7c000286)
1371 {
1372 /* spr field is split. */
1373 t1 = ((t1 & ~0x1ff800)
1374 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1375 t2 = ((t2 & ~0x1ff800)
1376 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1377 }
1378 if (t1 < t2)
1379 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1380 op[0].name, op[0].opcode, op[0].mask,
1381 op[-1].name, op[-1].opcode, op[-1].mask);
1382 }
8dbcd839 1383 }
c43a438d
AM		 1384
1385 /* The mask had better not trim off opcode bits. */
1386 if ((op->opcode & omask) != op->opcode)
1387 {
1388 as_bad (_("mask trims opcode bits for %s"),
1389 op->name);
1390 bad_insn = TRUE;
1391 }
1392
1393 /* The operands must not overlap the opcode or each other. */
1394 for (o = op->operands; *o; ++o)
1395 if (*o >= num_powerpc_operands)
1396 {
1397 as_bad (_("operand index error for %s"),
1398 op->name);
1399 bad_insn = TRUE;
1400 }
1401 else
b84bf58a 1402 {
c43a438d
AM		 1403 const struct powerpc_operand *operand = &powerpc_operands[*o];
1404 if (operand->shift >= 0)
b84bf58a 1405 {
c43a438d
AM		 1406 unsigned long mask = operand->bitm << operand->shift;
1407 if (omask & mask)
1408 {
1409 as_bad (_("operand %d overlap in %s"),
1410 (int) (o - op->operands), op->name);
1411 bad_insn = TRUE;
1412 }
1413 omask |= mask;
b84bf58a 1414 }
b84bf58a 1415 }
c43a438d 1416 }
252b5132 1417
2b3c4602 1418 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1419 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1420 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1421 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1422 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1423 /* Certain instructions (eg: extsw) do not exist in the
1424 32-bit BookE instruction set, but they do exist in the
1425 64-bit BookE instruction set, and other PPC instruction
1426 sets. Check to see if the opcode has the BOOKE64 flag set.
1427 If it does make sure that the target CPU is not the BookE32. */
1428 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1429 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1430 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
a08f0c75
PB		 1431 && ((ppc_cpu & PPC_OPCODE_POWER4) == 0
1432 || (op->flags & PPC_OPCODE_NOPOWER4) == 0))
252b5132
RH		 1433 {
1434 const char *retval;
1435
98027b10 1436 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1437 if (retval != NULL)
252b5132 1438 {
99a814a1 1439 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1440 if ((ppc_cpu & PPC_OPCODE_601) != 0
1441 && (op->flags & PPC_OPCODE_POWER) != 0)
1442 continue;
1443
b84bf58a 1444 as_bad (_("duplicate instruction %s"),
99a814a1 1445 op->name);
b84bf58a 1446 bad_insn = TRUE;
252b5132
RH		 1447 }
1448 }
1449 }
1450
3c9030c1
AM		 1451 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1452 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1453 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1454
252b5132
RH		 1455 /* Insert the macros into a hash table. */
1456 ppc_macro_hash = hash_new ();
1457
1458 macro_end = powerpc_macros + powerpc_num_macros;
1459 for (macro = powerpc_macros; macro < macro_end; macro++)
1460 {
1461 if ((macro->flags & ppc_cpu) != 0)
1462 {
1463 const char *retval;
1464
98027b10 1465 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1466 if (retval != (const char *) NULL)
1467 {
b84bf58a
AM		 1468 as_bad (_("duplicate macro %s"), macro->name);
1469 bad_insn = TRUE;
252b5132
RH		 1470 }
1471 }
1472 }
1473
b84bf58a 1474 if (bad_insn)
252b5132 1475 abort ();
69c040df
AM		 1476}
1477
1478/* This function is called when the assembler starts up. It is called
1479 after the options have been parsed and the output file has been
1480 opened. */
1481
1482void
98027b10 1483md_begin (void)
69c040df
AM		 1484{
1485 ppc_set_cpu ();
1486
1487 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1488
1489#ifdef OBJ_ELF
1490 /* Set the ELF flags if desired. */
1491 if (ppc_flags && !msolaris)
1492 bfd_set_private_flags (stdoutput, ppc_flags);
1493#endif
1494
1495 ppc_setup_opcodes ();
252b5132 1496
67c1ffbe 1497 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1498 by the user. */
252b5132
RH		 1499 if (!set_target_endian)
1500 {
1501 set_target_endian = 1;
1502 target_big_endian = PPC_BIG_ENDIAN;
1503 }
1504
1505#ifdef OBJ_XCOFF
1506 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1507
1508 /* Create dummy symbols to serve as initial csects. This forces the
1509 text csects to precede the data csects. These symbols will not
1510 be output. */
1511 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1512 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1513 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1514 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1515#endif
1516
1517#ifdef TE_PE
1518
1519 ppc_current_section = text_section;
81d4177b 1520 ppc_previous_section = 0;
252b5132
RH		 1521
1522#endif
1523}
1524
6a0c61b7 1525void
98027b10 1526ppc_cleanup (void)
6a0c61b7 1527{
dc1d03fc 1528#ifdef OBJ_ELF
6a0c61b7
EZ		 1529 if (ppc_apuinfo_list == NULL)
1530 return;
1531
1532 /* Ok, so write the section info out. We have this layout:
1533
1534 byte data what
1535 ---- ---- ----
1536 0 8 length of "APUinfo\0"
1537 4 (n*4) number of APU's (4 bytes each)
1538 8 2 note type 2
1539 12 "APUinfo\0" name
1540 20 APU#1 first APU's info
1541 24 APU#2 second APU's info
1542 ... ...
1543 */
1544 {
1545 char *p;
1546 asection *seg = now_seg;
1547 subsegT subseg = now_subseg;
1548 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1549 unsigned int i;
6a0c61b7
EZ		 1550
1551 /* Create the .PPC.EMB.apuinfo section. */
1552 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1553 bfd_set_section_flags (stdoutput,
1554 apuinfo_secp,
e1a9cb8e 1555 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1556
1557 p = frag_more (4);
1558 md_number_to_chars (p, (valueT) 8, 4);
1559
1560 p = frag_more (4);
e98d298c 1561 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1562
1563 p = frag_more (4);
1564 md_number_to_chars (p, (valueT) 2, 4);
1565
1566 p = frag_more (8);
1567 strcpy (p, "APUinfo");
1568
1569 for (i = 0; i < ppc_apuinfo_num; i++)
1570 {
b34976b6
AM		 1571 p = frag_more (4);
1572 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1573 }
1574
1575 frag_align (2, 0, 0);
1576
1577 /* We probably can't restore the current segment, for there likely
1578 isn't one yet... */
1579 if (seg && subseg)
1580 subseg_set (seg, subseg);
1581 }
dc1d03fc 1582#endif
6a0c61b7
EZ		 1583}
1584
252b5132
RH		 1585/* Insert an operand value into an instruction. */
1586
1587static unsigned long
a1867a27
AM		 1588ppc_insert_operand (unsigned long insn,
1589 const struct powerpc_operand *operand,
1590 offsetT val,
fa452fa6 1591 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1592 char *file,
1593 unsigned int line)
252b5132 1594{
b84bf58a 1595 long min, max, right;
eb42fac1 1596
b84bf58a
AM		 1597 max = operand->bitm;
1598 right = max & -max;
1599 min = 0;
1600
1601 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1602 {
b84bf58a 1603 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1604 max = (max >> 1) & -right;
1605 min = ~max & -right;
b84bf58a 1606 }
252b5132 1607
b84bf58a 1608 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1609 max++;
252b5132 1610
b84bf58a 1611 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1612 {
1613 long tmp = min;
1614 min = -max;
1615 max = -tmp;
1616 }
b84bf58a 1617
a1867a27
AM		 1618 if (min <= max)
1619 {
1620 /* Some people write constants with the sign extension done by
1621 hand but only up to 32 bits. This shouldn't really be valid,
1622 but, to permit this code to assemble on a 64-bit host, we
1623 sign extend the 32-bit value to 64 bits if so doing makes the
1624 value valid. */
1625 if (val > max
1626 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1627 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1628 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1629 val = val - 0x80000000 - 0x80000000;
1630
1631 /* Similarly, people write expressions like ~(1<<15), and expect
1632 this to be OK for a 32-bit unsigned value. */
1633 else if (val < min
1634 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1635 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1636 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1637 val = val + 0x80000000 + 0x80000000;
1638
1639 else if (val < min
1640 || val > max
1641 || (val & (right - 1)) != 0)
1642 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1643 }
b84bf58a 1644
252b5132
RH		 1645 if (operand->insert)
1646 {
1647 const char *errmsg;
1648
1649 errmsg = NULL;
2b3c4602 1650 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1651 if (errmsg != (const char *) NULL)
0baf16f2 1652 as_bad_where (file, line, errmsg);
252b5132
RH		 1653 }
1654 else
b84bf58a 1655 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1656
1657 return insn;
1658}
1659
1660\f
1661#ifdef OBJ_ELF
1662/* Parse @got, etc. and return the desired relocation. */
1663static bfd_reloc_code_real_type
98027b10 1664ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1665{
1666 struct map_bfd {
1667 char *string;
b7d7dc63
AM		 1668 unsigned int length : 8;
1669 unsigned int valid32 : 1;
1670 unsigned int valid64 : 1;
1671 unsigned int reloc;
252b5132
RH		 1672 };
1673
1674 char ident[20];
1675 char *str = *str_p;
1676 char *str2;
1677 int ch;
1678 int len;
15c1449b 1679 const struct map_bfd *ptr;
252b5132 1680
b7d7dc63
AM		 1681#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1682#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1683#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1684
15c1449b 1685 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1686 MAP ("l", BFD_RELOC_LO16),
1687 MAP ("h", BFD_RELOC_HI16),
1688 MAP ("ha", BFD_RELOC_HI16_S),
1689 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1690 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1691 MAP ("got", BFD_RELOC_16_GOTOFF),
1692 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1693 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1694 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1695 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1696 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1697 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1698 MAP ("copy", BFD_RELOC_PPC_COPY),
1699 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1700 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1701 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1702 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1703 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1704 MAP ("tls", BFD_RELOC_PPC_TLS),
1705 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1706 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1707 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1708 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1709 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1710 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1711 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1712 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1713 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1714 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1715 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1716 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1717 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1718 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1719 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1720 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1721 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1722 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1723 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1724 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1725 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1726 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1727 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1728 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1729 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1730 MAP32 ("fixup", BFD_RELOC_CTOR),
1731 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1732 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1733 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1734 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1735 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1736 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1737 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1738 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1739 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1740 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1741 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1742 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1743 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1744 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1745 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1746 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1747 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1748 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1749 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1750 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1751 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1752 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1753 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1754 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1755 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1756 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1757 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1758 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1759 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1760 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1761 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1762 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1763 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1764 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1765 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1766 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1767 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1768 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1769 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1770 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1771 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1772 };
1773
1774 if (*str++ != '@')
1775 return BFD_RELOC_UNUSED;
1776
1777 for (ch = *str, str2 = ident;
1778 (str2 < ident + sizeof (ident) - 1
3882b010 1779 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1780 ch = *++str)
1781 {
3882b010 1782 *str2++ = TOLOWER (ch);
252b5132
RH		 1783 }
1784
1785 *str2 = '\0';
1786 len = str2 - ident;
1787
1788 ch = ident[0];
1789 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1790 if (ch == ptr->string[0]
1791 && len == ptr->length
b7d7dc63
AM		 1792 && memcmp (ident, ptr->string, ptr->length) == 0
1793 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1794 {
15c1449b
AM		 1795 int reloc = ptr->reloc;
1796
cdba85ec 1797 if (!ppc_obj64)
5f6db75a
AM		 1798 if (exp_p->X_add_number != 0
1799 && (reloc == (int) BFD_RELOC_16_GOTOFF
1800 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1801 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1802 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1803 as_warn (_("identifier+constant@got means identifier@got+constant"));
1804
1805 /* Now check for identifier@suffix+constant. */
1806 if (*str == '-' || *str == '+')
252b5132 1807 {
5f6db75a
AM		 1808 char *orig_line = input_line_pointer;
1809 expressionS new_exp;
1810
1811 input_line_pointer = str;
1812 expression (&new_exp);
1813 if (new_exp.X_op == O_constant)
252b5132 1814 {
5f6db75a
AM		 1815 exp_p->X_add_number += new_exp.X_add_number;
1816 str = input_line_pointer;
252b5132 1817 }
5f6db75a
AM		 1818
1819 if (&input_line_pointer != str_p)
1820 input_line_pointer = orig_line;
252b5132 1821 }
252b5132 1822 *str_p = str;
0baf16f2 1823
2b3c4602 1824 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1825 && exp_p->X_op == O_symbol
1826 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1827 {
9f2b53d7
AM		 1828 /* Change the symbol so that the dummy .TOC. symbol can be
1829 omitted from the object file. */
0baf16f2
AM		 1830 exp_p->X_add_symbol = &abs_symbol;
1831 }
1832
15c1449b 1833 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1834 }
1835
1836 return BFD_RELOC_UNUSED;
1837}
1838
99a814a1
AM		 1839/* Like normal .long/.short/.word, except support @got, etc.
1840 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1841static void
98027b10 1842ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1843{
1844 expressionS exp;
1845 bfd_reloc_code_real_type reloc;
1846
1847 if (is_it_end_of_statement ())
1848 {
1849 demand_empty_rest_of_line ();
1850 return;
1851 }
1852
1853 do
1854 {
1855 expression (&exp);
1856 if (exp.X_op == O_symbol
1857 && *input_line_pointer == '@'
99a814a1
AM		 1858 && (reloc = ppc_elf_suffix (&input_line_pointer,
1859 &exp)) != BFD_RELOC_UNUSED)
252b5132 1860 {
99a814a1
AM		 1861 reloc_howto_type *reloc_howto;
1862 int size;
1863
1864 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1865 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1866
1867 if (size > nbytes)
0baf16f2
AM		 1868 {
1869 as_bad (_("%s relocations do not fit in %d bytes\n"),
1870 reloc_howto->name, nbytes);
1871 }
252b5132
RH		 1872 else
1873 {
0baf16f2
AM		 1874 char *p;
1875 int offset;
252b5132 1876
0baf16f2
AM		 1877 p = frag_more (nbytes);
1878 offset = 0;
1879 if (target_big_endian)
1880 offset = nbytes - size;
99a814a1
AM		 1881 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1882 &exp, 0, reloc);
252b5132
RH		 1883 }
1884 }
1885 else
1886 emit_expr (&exp, (unsigned int) nbytes);
1887 }
1888 while (*input_line_pointer++ == ',');
1889
99a814a1
AM		 1890 /* Put terminator back into stream. */
1891 input_line_pointer--;
252b5132
RH		 1892 demand_empty_rest_of_line ();
1893}
1894
1895/* Solaris pseduo op to change to the .rodata section. */
1896static void
98027b10 1897ppc_elf_rdata (int xxx)
252b5132
RH		 1898{
1899 char *save_line = input_line_pointer;
1900 static char section[] = ".rodata\n";
1901
99a814a1 1902 /* Just pretend this is .section .rodata */
252b5132
RH		 1903 input_line_pointer = section;
1904 obj_elf_section (xxx);
1905
1906 input_line_pointer = save_line;
1907}
1908
99a814a1 1909/* Pseudo op to make file scope bss items. */
252b5132 1910static void
98027b10 1911ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1912{
98027b10
AM		 1913 char *name;
1914 char c;
1915 char *p;
252b5132 1916 offsetT size;
98027b10 1917 symbolS *symbolP;
252b5132
RH		 1918 offsetT align;
1919 segT old_sec;
1920 int old_subsec;
1921 char *pfrag;
1922 int align2;
1923
1924 name = input_line_pointer;
1925 c = get_symbol_end ();
1926
99a814a1 1927 /* just after name is now '\0'. */
252b5132
RH		 1928 p = input_line_pointer;
1929 *p = c;
1930 SKIP_WHITESPACE ();
1931 if (*input_line_pointer != ',')
1932 {
1933 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1934 ignore_rest_of_line ();
1935 return;
1936 }
1937
1938 input_line_pointer++; /* skip ',' */
1939 if ((size = get_absolute_expression ()) < 0)
1940 {
1941 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1942 ignore_rest_of_line ();
1943 return;
1944 }
1945
1946 /* The third argument to .lcomm is the alignment. */
1947 if (*input_line_pointer != ',')
1948 align = 8;
1949 else
1950 {
1951 ++input_line_pointer;
1952 align = get_absolute_expression ();
1953 if (align <= 0)
1954 {
1955 as_warn (_("ignoring bad alignment"));
1956 align = 8;
1957 }
1958 }
1959
1960 *p = 0;
1961 symbolP = symbol_find_or_make (name);
1962 *p = c;
1963
1964 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1965 {
1966 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1967 S_GET_NAME (symbolP));
1968 ignore_rest_of_line ();
1969 return;
1970 }
1971
1972 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1973 {
1974 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1975 S_GET_NAME (symbolP),
1976 (long) S_GET_VALUE (symbolP),
1977 (long) size);
1978
1979 ignore_rest_of_line ();
1980 return;
1981 }
1982
99a814a1 1983 /* Allocate_bss. */
252b5132
RH		 1984 old_sec = now_seg;
1985 old_subsec = now_subseg;
1986 if (align)
1987 {
99a814a1 1988 /* Convert to a power of 2 alignment. */
252b5132
RH		 1989 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1990 if (align != 1)
1991 {
1992 as_bad (_("Common alignment not a power of 2"));
1993 ignore_rest_of_line ();
1994 return;
1995 }
1996 }
1997 else
1998 align2 = 0;
1999
2000 record_alignment (bss_section, align2);
2001 subseg_set (bss_section, 0);
2002 if (align2)
2003 frag_align (align2, 0, 0);
2004 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2005 symbol_get_frag (symbolP)->fr_symbol = 0;
2006 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2007 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2008 (char *) 0);
2009 *pfrag = 0;
2010 S_SET_SIZE (symbolP, size);
2011 S_SET_SEGMENT (symbolP, bss_section);
2012 subseg_set (old_sec, old_subsec);
2013 demand_empty_rest_of_line ();
2014}
2015
2016/* Validate any relocations emitted for -mrelocatable, possibly adding
2017 fixups for word relocations in writable segments, so we can adjust
2018 them at runtime. */
2019static void
98027b10 2020ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2021{
2022 if (fixp->fx_done || fixp->fx_pcrel)
2023 return;
2024
2025 switch (shlib)
2026 {
2027 case SHLIB_NONE:
2028 case SHLIB_PIC:
2029 return;
2030
5d6f4f16 2031 case SHLIB_MRELOCATABLE:
252b5132
RH		 2032 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2033 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2034 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2035 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2036 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2037 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2038 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2039 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2040 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2041 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2042 && strcmp (segment_name (seg), ".got2") != 0
2043 && strcmp (segment_name (seg), ".dtors") != 0
2044 && strcmp (segment_name (seg), ".ctors") != 0
2045 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2046 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2047 && strcmp (segment_name (seg), ".eh_frame") != 0
2048 && strcmp (segment_name (seg), ".ex_shared") != 0)
2049 {
2050 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2051 || fixp->fx_r_type != BFD_RELOC_CTOR)
2052 {
2053 as_bad_where (fixp->fx_file, fixp->fx_line,
2054 _("Relocation cannot be done when using -mrelocatable"));
2055 }
2056 }
2057 return;
2058 }
2059}
0baf16f2 2060
7e8d4ab4
AM		 2061/* Prevent elf_frob_file_before_adjust removing a weak undefined
2062 function descriptor sym if the corresponding code sym is used. */
2063
2064void
98027b10 2065ppc_frob_file_before_adjust (void)
0baf16f2 2066{
7e8d4ab4 2067 symbolS *symp;
9232bbb0 2068 asection *toc;
0baf16f2 2069
7e8d4ab4
AM		 2070 if (!ppc_obj64)
2071 return;
2072
2073 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2074 {
7e8d4ab4
AM		 2075 const char *name;
2076 char *dotname;
2077 symbolS *dotsym;
2078 size_t len;
2079
2080 name = S_GET_NAME (symp);
2081 if (name[0] == '.')
2082 continue;
2083
2084 if (! S_IS_WEAK (symp)
2085 || S_IS_DEFINED (symp))
2086 continue;
2087
2088 len = strlen (name) + 1;
2089 dotname = xmalloc (len + 1);
2090 dotname[0] = '.';
2091 memcpy (dotname + 1, name, len);
461b725f 2092 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2093 free (dotname);
2094 if (dotsym != NULL && (symbol_used_p (dotsym)
2095 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2096 symbol_mark_used (symp);
2097
0baf16f2
AM		 2098 }
2099
9232bbb0
AM		 2100 toc = bfd_get_section_by_name (stdoutput, ".toc");
2101 if (toc != NULL
2102 && bfd_section_size (stdoutput, toc) > 0x10000)
2103 as_warn (_("TOC section size exceeds 64k"));
2104
7e8d4ab4
AM		 2105 /* Don't emit .TOC. symbol. */
2106 symp = symbol_find (".TOC.");
2107 if (symp != NULL)
2108 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2109}
252b5132
RH		 2110#endif /* OBJ_ELF */
2111\f
2112#ifdef TE_PE
2113
2114/*
99a814a1 2115 * Summary of parse_toc_entry.
252b5132
RH		 2116 *
2117 * in: Input_line_pointer points to the '[' in one of:
2118 *
2119 * [toc] [tocv] [toc32] [toc64]
2120 *
2121 * Anything else is an error of one kind or another.
2122 *
81d4177b 2123 * out:
252b5132
RH		 2124 * return value: success or failure
2125 * toc_kind: kind of toc reference
2126 * input_line_pointer:
2127 * success: first char after the ']'
2128 * failure: unchanged
2129 *
2130 * settings:
2131 *
2132 * [toc] - rv == success, toc_kind = default_toc
2133 * [tocv] - rv == success, toc_kind = data_in_toc
2134 * [toc32] - rv == success, toc_kind = must_be_32
2135 * [toc64] - rv == success, toc_kind = must_be_64
2136 *
2137 */
2138
81d4177b
KH		 2139enum toc_size_qualifier
2140{
252b5132
RH		 2141 default_toc, /* The toc cell constructed should be the system default size */
2142 data_in_toc, /* This is a direct reference to a toc cell */
2143 must_be_32, /* The toc cell constructed must be 32 bits wide */
2144 must_be_64 /* The toc cell constructed must be 64 bits wide */
2145};
2146
2147static int
98027b10 2148parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2149{
2150 char *start;
2151 char *toc_spec;
2152 char c;
2153 enum toc_size_qualifier t;
2154
99a814a1 2155 /* Save the input_line_pointer. */
252b5132
RH		 2156 start = input_line_pointer;
2157
99a814a1 2158 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2159 ++input_line_pointer;
2160 SKIP_WHITESPACE ();
81d4177b 2161
99a814a1 2162 /* Find the spelling of the operand. */
252b5132
RH		 2163 toc_spec = input_line_pointer;
2164 c = get_symbol_end ();
2165
99a814a1 2166 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2167 {
2168 t = default_toc;
2169 }
99a814a1 2170 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2171 {
2172 t = data_in_toc;
2173 }
99a814a1 2174 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2175 {
2176 t = must_be_32;
2177 }
99a814a1 2178 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2179 {
2180 t = must_be_64;
2181 }
2182 else
2183 {
2184 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2185 *input_line_pointer = c;
2186 input_line_pointer = start;
252b5132
RH		 2187 return 0;
2188 }
2189
99a814a1
AM		 2190 /* Now find the ']'. */
2191 *input_line_pointer = c;
252b5132 2192
81d4177b
KH		 2193 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2194 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2195
2196 if (c != ']')
2197 {
2198 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2199 input_line_pointer = start;
252b5132
RH		 2200 return 0;
2201 }
2202
99a814a1 2203 *toc_kind = t;
252b5132
RH		 2204 return 1;
2205}
2206#endif
2207\f
2208
dc1d03fc 2209#ifdef OBJ_ELF
6a0c61b7
EZ		 2210#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2211static void
98027b10 2212ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2213{
2214 unsigned int i;
2215
2216 /* Check we don't already exist. */
2217 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2218 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2219 return;
b34976b6 2220
6a0c61b7
EZ		 2221 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2222 {
2223 if (ppc_apuinfo_num_alloc == 0)
2224 {
2225 ppc_apuinfo_num_alloc = 4;
2226 ppc_apuinfo_list = (unsigned long *)
2227 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2228 }
2229 else
2230 {
2231 ppc_apuinfo_num_alloc += 4;
2232 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2233 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2234 }
2235 }
dc1d03fc 2236 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2237}
2238#undef APUID
dc1d03fc 2239#endif
6a0c61b7
EZ		 2240\f
2241
252b5132
RH		 2242/* We need to keep a list of fixups. We can't simply generate them as
2243 we go, because that would require us to first create the frag, and
2244 that would screw up references to ``.''. */
2245
2246struct ppc_fixup
2247{
2248 expressionS exp;
2249 int opindex;
2250 bfd_reloc_code_real_type reloc;
2251};
2252
2253#define MAX_INSN_FIXUPS (5)
2254
2255/* This routine is called for each instruction to be assembled. */
2256
2257void
98027b10 2258md_assemble (char *str)
252b5132
RH		 2259{
2260 char *s;
2261 const struct powerpc_opcode *opcode;
2262 unsigned long insn;
2263 const unsigned char *opindex_ptr;
2264 int skip_optional;
2265 int need_paren;
2266 int next_opindex;
2267 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2268 int fc;
2269 char *f;
09b935ac 2270 int addr_mod;
252b5132
RH		 2271 int i;
2272#ifdef OBJ_ELF
2273 bfd_reloc_code_real_type reloc;
2274#endif
2275
2276 /* Get the opcode. */
3882b010 2277 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2278 ;
2279 if (*s != '\0')
2280 *s++ = '\0';
2281
2282 /* Look up the opcode in the hash table. */
2283 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2284 if (opcode == (const struct powerpc_opcode *) NULL)
2285 {
2286 const struct powerpc_macro *macro;
2287
2288 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2289 if (macro == (const struct powerpc_macro *) NULL)
2290 as_bad (_("Unrecognized opcode: `%s'"), str);
2291 else
2292 ppc_macro (s, macro);
2293
2294 return;
2295 }
2296
2297 insn = opcode->opcode;
2298
2299 str = s;
3882b010 2300 while (ISSPACE (*str))
252b5132
RH		 2301 ++str;
2302
2303 /* PowerPC operands are just expressions. The only real issue is
2304 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2305 an optional operand separate the operands only with commas (in some
2306 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2307 have optional operands). Most instructions with optional operands
2308 have only one. Those that have more than one optional operand can
2309 take either all their operands or none. So, before we start seriously
2310 parsing the operands, we check to see if we have optional operands,
2311 and if we do, we count the number of commas to see which operands
2312 have been omitted. */
252b5132
RH		 2313 skip_optional = 0;
2314 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2315 {
2316 const struct powerpc_operand *operand;
2317
2318 operand = &powerpc_operands[*opindex_ptr];
2319 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2320 {
2321 unsigned int opcount;
7fe9cf6b
NC		 2322 unsigned int num_operands_expected;
2323 unsigned int i;
252b5132
RH		 2324
2325 /* There is an optional operand. Count the number of
2326 commas in the input line. */
2327 if (*str == '\0')
2328 opcount = 0;
2329 else
2330 {
2331 opcount = 1;
2332 s = str;
2333 while ((s = strchr (s, ',')) != (char *) NULL)
2334 {
2335 ++opcount;
2336 ++s;
2337 }
2338 }
2339
7fe9cf6b
NC		 2340 /* Compute the number of expected operands.
2341 Do not count fake operands. */
2342 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2343 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2344 ++ num_operands_expected;
2345
252b5132
RH		 2346 /* If there are fewer operands in the line then are called
2347 for by the instruction, we want to skip the optional
1f6c9eb0 2348 operands. */
7fe9cf6b 2349 if (opcount < num_operands_expected)
252b5132
RH		 2350 skip_optional = 1;
2351
2352 break;
2353 }
2354 }
2355
2356 /* Gather the operands. */
2357 need_paren = 0;
2358 next_opindex = 0;
2359 fc = 0;
2360 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2361 {
2362 const struct powerpc_operand *operand;
2363 const char *errmsg;
2364 char *hold;
2365 expressionS ex;
2366 char endc;
2367
2368 if (next_opindex == 0)
2369 operand = &powerpc_operands[*opindex_ptr];
2370 else
2371 {
2372 operand = &powerpc_operands[next_opindex];
2373 next_opindex = 0;
2374 }
252b5132
RH		 2375 errmsg = NULL;
2376
2377 /* If this is a fake operand, then we do not expect anything
2378 from the input. */
2379 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2380 {
2b3c4602 2381 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2382 if (errmsg != (const char *) NULL)
2383 as_bad (errmsg);
2384 continue;
2385 }
2386
2387 /* If this is an optional operand, and we are skipping it, just
2388 insert a zero. */
2389 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2390 && skip_optional)
2391 {
2392 if (operand->insert)
2393 {
2b3c4602 2394 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2395 if (errmsg != (const char *) NULL)
2396 as_bad (errmsg);
2397 }
2398 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2399 next_opindex = *opindex_ptr + 1;
2400 continue;
2401 }
2402
2403 /* Gather the operand. */
2404 hold = input_line_pointer;
2405 input_line_pointer = str;
2406
2407#ifdef TE_PE
81d4177b 2408 if (*input_line_pointer == '[')
252b5132
RH		 2409 {
2410 /* We are expecting something like the second argument here:
99a814a1
AM		 2411 *
2412 * lwz r4,[toc].GS.0.static_int(rtoc)
2413 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2414 * The argument following the `]' must be a symbol name, and the
2415 * register must be the toc register: 'rtoc' or '2'
2416 *
2417 * The effect is to 0 as the displacement field
2418 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2419 * the appropriate variation) reloc against it based on the symbol.
2420 * The linker will build the toc, and insert the resolved toc offset.
2421 *
2422 * Note:
2423 * o The size of the toc entry is currently assumed to be
2424 * 32 bits. This should not be assumed to be a hard coded
2425 * number.
2426 * o In an effort to cope with a change from 32 to 64 bits,
2427 * there are also toc entries that are specified to be
2428 * either 32 or 64 bits:
2429 * lwz r4,[toc32].GS.0.static_int(rtoc)
2430 * lwz r4,[toc64].GS.0.static_int(rtoc)
2431 * These demand toc entries of the specified size, and the
2432 * instruction probably requires it.
2433 */
252b5132
RH		 2434
2435 int valid_toc;
2436 enum toc_size_qualifier toc_kind;
2437 bfd_reloc_code_real_type toc_reloc;
2438
99a814a1
AM		 2439 /* Go parse off the [tocXX] part. */
2440 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2441
81d4177b 2442 if (!valid_toc)
252b5132 2443 {
99a814a1
AM		 2444 /* Note: message has already been issued.
2445 FIXME: what sort of recovery should we do?
2446 demand_rest_of_line (); return; ? */
252b5132
RH		 2447 }
2448
99a814a1
AM		 2449 /* Now get the symbol following the ']'. */
2450 expression (&ex);
252b5132
RH		 2451
2452 switch (toc_kind)
2453 {
2454 case default_toc:
99a814a1
AM		 2455 /* In this case, we may not have seen the symbol yet,
2456 since it is allowed to appear on a .extern or .globl
2457 or just be a label in the .data section. */
252b5132
RH		 2458 toc_reloc = BFD_RELOC_PPC_TOC16;
2459 break;
2460 case data_in_toc:
99a814a1
AM		 2461 /* 1. The symbol must be defined and either in the toc
2462 section, or a global.
2463 2. The reloc generated must have the TOCDEFN flag set
2464 in upper bit mess of the reloc type.
2465 FIXME: It's a little confusing what the tocv
2466 qualifier can be used for. At the very least, I've
2467 seen three uses, only one of which I'm sure I can
2468 explain. */
81d4177b
KH		 2469 if (ex.X_op == O_symbol)
2470 {
252b5132 2471 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2472 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2473 != tocdata_section)
252b5132 2474 {
99a814a1 2475 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2476 }
2477 }
2478
2479 toc_reloc = BFD_RELOC_PPC_TOC16;
2480 break;
2481 case must_be_32:
99a814a1
AM		 2482 /* FIXME: these next two specifically specify 32/64 bit
2483 toc entries. We don't support them today. Is this
2484 the right way to say that? */
252b5132
RH		 2485 toc_reloc = BFD_RELOC_UNUSED;
2486 as_bad (_("Unimplemented toc32 expression modifier"));
2487 break;
2488 case must_be_64:
99a814a1 2489 /* FIXME: see above. */
252b5132
RH		 2490 toc_reloc = BFD_RELOC_UNUSED;
2491 as_bad (_("Unimplemented toc64 expression modifier"));
2492 break;
2493 default:
bc805888 2494 fprintf (stderr,
99a814a1
AM		 2495 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2496 toc_kind);
bc805888 2497 abort ();
252b5132
RH		 2498 break;
2499 }
2500
2501 /* We need to generate a fixup for this expression. */
2502 if (fc >= MAX_INSN_FIXUPS)
2503 as_fatal (_("too many fixups"));
2504
2505 fixups[fc].reloc = toc_reloc;
2506 fixups[fc].exp = ex;
2507 fixups[fc].opindex = *opindex_ptr;
2508 ++fc;
2509
99a814a1
AM		 2510 /* Ok. We've set up the fixup for the instruction. Now make it
2511 look like the constant 0 was found here. */
252b5132
RH		 2512 ex.X_unsigned = 1;
2513 ex.X_op = O_constant;
2514 ex.X_add_number = 0;
2515 ex.X_add_symbol = NULL;
2516 ex.X_op_symbol = NULL;
2517 }
2518
2519 else
2520#endif /* TE_PE */
2521 {
2ad068be
AM		 2522 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2523 || !register_name (&ex))
252b5132 2524 {
13abbae3
AM		 2525 char save_lex = lex_type['%'];
2526
252b5132 2527 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2528 {
2529 cr_operand = TRUE;
2530 lex_type['%'] |= LEX_BEGIN_NAME;
2531 }
252b5132 2532 expression (&ex);
b34976b6 2533 cr_operand = FALSE;
13abbae3 2534 lex_type['%'] = save_lex;
252b5132
RH		 2535 }
2536 }
2537
2538 str = input_line_pointer;
2539 input_line_pointer = hold;
2540
2541 if (ex.X_op == O_illegal)
2542 as_bad (_("illegal operand"));
2543 else if (ex.X_op == O_absent)
2544 as_bad (_("missing operand"));
2545 else if (ex.X_op == O_register)
2546 {
2547 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2548 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2549 }
2550 else if (ex.X_op == O_constant)
2551 {
2552#ifdef OBJ_ELF
81d4177b 2553 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2554 char *orig_str = str;
2555
2556 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2557 switch (reloc)
2558 {
2559 default:
2560 str = orig_str;
2561 break;
2562
2563 case BFD_RELOC_LO16:
2564 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2565 something which cleared it, we always produce a
2566 signed value. */
2567 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2568 ex.X_add_number &= 0xffff;
2569 else
0baf16f2 2570 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2571 break;
2572
2573 case BFD_RELOC_HI16:
0baf16f2
AM		 2574 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2575 ex.X_add_number = PPC_HI (ex.X_add_number);
2576 else
2577 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2578 break;
2579
2580 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2581 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2582 ex.X_add_number = PPC_HA (ex.X_add_number);
2583 else
2584 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2585 break;
2586
0baf16f2
AM		 2587 case BFD_RELOC_PPC64_HIGHER:
2588 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2589 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2590 else
2591 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2592 break;
2593
2594 case BFD_RELOC_PPC64_HIGHER_S:
2595 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2596 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2597 else
2598 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2599 break;
0baf16f2
AM		 2600
2601 case BFD_RELOC_PPC64_HIGHEST:
2602 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2603 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2604 else
2605 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2606 break;
2607
2608 case BFD_RELOC_PPC64_HIGHEST_S:
2609 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2610 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2611 else
2612 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2613 break;
252b5132 2614 }
0baf16f2 2615#endif /* OBJ_ELF */
252b5132 2616 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2617 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2618 }
2619#ifdef OBJ_ELF
2620 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2621 {
cdba85ec
AM		 2622 /* Some TLS tweaks. */
2623 switch (reloc)
2624 {
2625 default:
2626 break;
2627 case BFD_RELOC_PPC_TLS:
2628 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
783de163 2629 ppc_cpu, (char *) NULL, 0);
cdba85ec
AM		 2630 break;
2631 /* We'll only use the 32 (or 64) bit form of these relocations
2632 in constants. Instructions get the 16 bit form. */
2633 case BFD_RELOC_PPC_DTPREL:
2634 reloc = BFD_RELOC_PPC_DTPREL16;
2635 break;
2636 case BFD_RELOC_PPC_TPREL:
2637 reloc = BFD_RELOC_PPC_TPREL16;
2638 break;
2639 }
2640
99a814a1
AM		 2641 /* For the absolute forms of branches, convert the PC
2642 relative form back into the absolute. */
252b5132
RH		 2643 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2644 {
2645 switch (reloc)
2646 {
2647 case BFD_RELOC_PPC_B26:
2648 reloc = BFD_RELOC_PPC_BA26;
2649 break;
2650 case BFD_RELOC_PPC_B16:
2651 reloc = BFD_RELOC_PPC_BA16;
2652 break;
2653 case BFD_RELOC_PPC_B16_BRTAKEN:
2654 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2655 break;
2656 case BFD_RELOC_PPC_B16_BRNTAKEN:
2657 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2658 break;
2659 default:
2660 break;
2661 }
2662 }
2663
2b3c4602 2664 if (ppc_obj64
adadcc0c 2665 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2666 {
2667 switch (reloc)
2668 {
2669 case BFD_RELOC_16:
2670 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2671 break;
2672 case BFD_RELOC_LO16:
2673 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2674 break;
2675 case BFD_RELOC_16_GOTOFF:
2676 reloc = BFD_RELOC_PPC64_GOT16_DS;
2677 break;
2678 case BFD_RELOC_LO16_GOTOFF:
2679 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2680 break;
2681 case BFD_RELOC_LO16_PLTOFF:
2682 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2683 break;
1cfc59d5 2684 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2685 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2686 break;
2687 case BFD_RELOC_LO16_BASEREL:
2688 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2689 break;
2690 case BFD_RELOC_PPC_TOC16:
2691 reloc = BFD_RELOC_PPC64_TOC16_DS;
2692 break;
2693 case BFD_RELOC_PPC64_TOC16_LO:
2694 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2695 break;
2696 case BFD_RELOC_PPC64_PLTGOT16:
2697 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2698 break;
2699 case BFD_RELOC_PPC64_PLTGOT16_LO:
2700 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2701 break;
cdba85ec
AM		 2702 case BFD_RELOC_PPC_DTPREL16:
2703 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2704 break;
2705 case BFD_RELOC_PPC_DTPREL16_LO:
2706 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2707 break;
2708 case BFD_RELOC_PPC_TPREL16:
2709 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2710 break;
2711 case BFD_RELOC_PPC_TPREL16_LO:
2712 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2713 break;
2714 case BFD_RELOC_PPC_GOT_DTPREL16:
2715 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2716 case BFD_RELOC_PPC_GOT_TPREL16:
2717 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2718 break;
0baf16f2
AM		 2719 default:
2720 as_bad (_("unsupported relocation for DS offset field"));
2721 break;
2722 }
2723 }
2724
252b5132
RH		 2725 /* We need to generate a fixup for this expression. */
2726 if (fc >= MAX_INSN_FIXUPS)
2727 as_fatal (_("too many fixups"));
2728 fixups[fc].exp = ex;
2729 fixups[fc].opindex = 0;
2730 fixups[fc].reloc = reloc;
2731 ++fc;
2732 }
2733#endif /* OBJ_ELF */
2734
2735 else
2736 {
2737 /* We need to generate a fixup for this expression. */
2738 if (fc >= MAX_INSN_FIXUPS)
2739 as_fatal (_("too many fixups"));
2740 fixups[fc].exp = ex;
2741 fixups[fc].opindex = *opindex_ptr;
2742 fixups[fc].reloc = BFD_RELOC_UNUSED;
2743 ++fc;
2744 }
2745
2746 if (need_paren)
2747 {
2748 endc = ')';
2749 need_paren = 0;
c3d65c1c
BE		 2750 /* If expecting more operands, then we want to see "),". */
2751 if (*str == endc && opindex_ptr[1] != 0)
2752 {
2753 do
2754 ++str;
2755 while (ISSPACE (*str));
2756 endc = ',';
2757 }
252b5132
RH		 2758 }
2759 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2760 {
2761 endc = '(';
2762 need_paren = 1;
2763 }
2764 else
2765 endc = ',';
2766
2767 /* The call to expression should have advanced str past any
2768 whitespace. */
2769 if (*str != endc
2770 && (endc != ',' || *str != '\0'))
2771 {
2772 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2773 break;
2774 }
2775
2776 if (*str != '\0')
2777 ++str;
2778 }
2779
3882b010 2780 while (ISSPACE (*str))
252b5132
RH		 2781 ++str;
2782
2783 if (*str != '\0')
2784 as_bad (_("junk at end of line: `%s'"), str);
2785
dc1d03fc 2786#ifdef OBJ_ELF
6a0c61b7
EZ		 2787 /* Do we need/want a APUinfo section? */
2788 if (ppc_cpu & (PPC_OPCODE_SPE
2789 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2790 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2791 | PPC_OPCODE_RFMCI))
2792 {
2793 /* These are all version "1". */
2794 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2795 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2796 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2797 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2798 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2799 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2800 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2801 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2802 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2803 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2804 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2805 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2806 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2807 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2808 }
dc1d03fc 2809#endif
6a0c61b7 2810
252b5132
RH		 2811 /* Write out the instruction. */
2812 f = frag_more (4);
09b935ac
AM		 2813 addr_mod = frag_now_fix () & 3;
2814 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2815 as_bad (_("instruction address is not a multiple of 4"));
2816 frag_now->insn_addr = addr_mod;
2817 frag_now->has_code = 1;
252b5132
RH		 2818 md_number_to_chars (f, insn, 4);
2819
5d6f4f16
GK		 2820#ifdef OBJ_ELF
2821 dwarf2_emit_insn (4);
2822#endif
2823
252b5132
RH		 2824 /* Create any fixups. At this point we do not use a
2825 bfd_reloc_code_real_type, but instead just use the
2826 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2827 handle fixups for any operand type, although that is admittedly
2828 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2829 md_apply_fix. */
252b5132
RH		 2830 for (i = 0; i < fc; i++)
2831 {
2832 const struct powerpc_operand *operand;
2833
2834 operand = &powerpc_operands[fixups[i].opindex];
2835 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2836 {
99a814a1 2837 reloc_howto_type *reloc_howto;
252b5132
RH		 2838 int size;
2839 int offset;
2840 fixS *fixP;
2841
99a814a1 2842 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2843 if (!reloc_howto)
2844 abort ();
2845
2846 size = bfd_get_reloc_size (reloc_howto);
2847 offset = target_big_endian ? (4 - size) : 0;
2848
2849 if (size < 1 || size > 4)
bc805888 2850 abort ();
252b5132 2851
99a814a1
AM		 2852 fixP = fix_new_exp (frag_now,
2853 f - frag_now->fr_literal + offset,
2854 size,
2855 &fixups[i].exp,
2856 reloc_howto->pc_relative,
252b5132
RH		 2857 fixups[i].reloc);
2858
2859 /* Turn off complaints that the addend is too large for things like
2860 foo+100000@ha. */
2861 switch (fixups[i].reloc)
2862 {
2863 case BFD_RELOC_16_GOTOFF:
2864 case BFD_RELOC_PPC_TOC16:
2865 case BFD_RELOC_LO16:
2866 case BFD_RELOC_HI16:
2867 case BFD_RELOC_HI16_S:
0baf16f2 2868#ifdef OBJ_ELF
0baf16f2
AM		 2869 case BFD_RELOC_PPC64_HIGHER:
2870 case BFD_RELOC_PPC64_HIGHER_S:
2871 case BFD_RELOC_PPC64_HIGHEST:
2872 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2873#endif
252b5132
RH		 2874 fixP->fx_no_overflow = 1;
2875 break;
2876 default:
2877 break;
2878 }
2879 }
2880 else
99a814a1
AM		 2881 fix_new_exp (frag_now,
2882 f - frag_now->fr_literal,
2883 4,
252b5132
RH		 2884 &fixups[i].exp,
2885 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2886 ((bfd_reloc_code_real_type)
99a814a1 2887 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2888 }
2889}
2890
2891/* Handle a macro. Gather all the operands, transform them as
2892 described by the macro, and call md_assemble recursively. All the
2893 operands are separated by commas; we don't accept parentheses
2894 around operands here. */
2895
2896static void
98027b10 2897ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2898{
2899 char *operands[10];
2900 unsigned int count;
2901 char *s;
2902 unsigned int len;
2903 const char *format;
db557034 2904 unsigned int arg;
252b5132
RH		 2905 char *send;
2906 char *complete;
2907
2908 /* Gather the users operands into the operands array. */
2909 count = 0;
2910 s = str;
2911 while (1)
2912 {
2913 if (count >= sizeof operands / sizeof operands[0])
2914 break;
2915 operands[count++] = s;
2916 s = strchr (s, ',');
2917 if (s == (char *) NULL)
2918 break;
2919 *s++ = '\0';
81d4177b 2920 }
252b5132
RH		 2921
2922 if (count != macro->operands)
2923 {
2924 as_bad (_("wrong number of operands"));
2925 return;
2926 }
2927
2928 /* Work out how large the string must be (the size is unbounded
2929 because it includes user input). */
2930 len = 0;
2931 format = macro->format;
2932 while (*format != '\0')
2933 {
2934 if (*format != '%')
2935 {
2936 ++len;
2937 ++format;
2938 }
2939 else
2940 {
2941 arg = strtol (format + 1, &send, 10);
db557034 2942 know (send != format && arg < count);
252b5132
RH		 2943 len += strlen (operands[arg]);
2944 format = send;
2945 }
2946 }
2947
2948 /* Put the string together. */
2949 complete = s = (char *) alloca (len + 1);
2950 format = macro->format;
2951 while (*format != '\0')
2952 {
2953 if (*format != '%')
2954 *s++ = *format++;
2955 else
2956 {
2957 arg = strtol (format + 1, &send, 10);
2958 strcpy (s, operands[arg]);
2959 s += strlen (s);
2960 format = send;
2961 }
2962 }
2963 *s = '\0';
2964
2965 /* Assemble the constructed instruction. */
2966 md_assemble (complete);
81d4177b 2967}
252b5132
RH		 2968\f
2969#ifdef OBJ_ELF
99a814a1 2970/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2971
2972int
98027b10 2973ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2974{
2975 if (letter == 'e')
2976 return SHF_EXCLUDE;
2977
13ae64f3 2978 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2979 return -1;
252b5132
RH		 2980}
2981
2982int
98027b10 2983ppc_section_word (char *str, size_t len)
252b5132 2984{
9de8d8f1
RH		 2985 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2986 return SHF_EXCLUDE;
252b5132 2987
9de8d8f1 2988 return -1;
252b5132
RH		 2989}
2990
2991int
98027b10 2992ppc_section_type (char *str, size_t len)
252b5132 2993{
9de8d8f1
RH		 2994 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2995 return SHT_ORDERED;
252b5132 2996
9de8d8f1 2997 return -1;
252b5132
RH		 2998}
2999
3000int
98027b10 3001ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 3002{
3003 if (type == SHT_ORDERED)
3004 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3005
3006 if (attr & SHF_EXCLUDE)
3007 flags |= SEC_EXCLUDE;
3008
3009 return flags;
3010}
3011#endif /* OBJ_ELF */
3012
3013\f
3014/* Pseudo-op handling. */
3015
3016/* The .byte pseudo-op. This is similar to the normal .byte
3017 pseudo-op, but it can also take a single ASCII string. */
3018
3019static void
98027b10 3020ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3021{
3022 if (*input_line_pointer != '\"')
3023 {
3024 cons (1);
3025 return;
3026 }
3027
3028 /* Gather characters. A real double quote is doubled. Unusual
3029 characters are not permitted. */
3030 ++input_line_pointer;
3031 while (1)
3032 {
3033 char c;
3034
3035 c = *input_line_pointer++;
3036
3037 if (c == '\"')
3038 {
3039 if (*input_line_pointer != '\"')
3040 break;
3041 ++input_line_pointer;
3042 }
3043
3044 FRAG_APPEND_1_CHAR (c);
3045 }
3046
3047 demand_empty_rest_of_line ();
3048}
3049\f
3050#ifdef OBJ_XCOFF
3051
3052/* XCOFF specific pseudo-op handling. */
3053
3054/* This is set if we are creating a .stabx symbol, since we don't want
3055 to handle symbol suffixes for such symbols. */
b34976b6 3056static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3057
3058/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3059 symbols in the .bss segment as though they were local common
67c1ffbe 3060 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3061 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3062
3063static void
98027b10 3064ppc_comm (int lcomm)
252b5132
RH		 3065{
3066 asection *current_seg = now_seg;
3067 subsegT current_subseg = now_subseg;
3068 char *name;
3069 char endc;
3070 char *end_name;
3071 offsetT size;
3072 offsetT align;
3073 symbolS *lcomm_sym = NULL;
3074 symbolS *sym;
3075 char *pfrag;
3076
3077 name = input_line_pointer;
3078 endc = get_symbol_end ();
3079 end_name = input_line_pointer;
3080 *end_name = endc;
3081
3082 if (*input_line_pointer != ',')
3083 {
3084 as_bad (_("missing size"));
3085 ignore_rest_of_line ();
3086 return;
3087 }
3088 ++input_line_pointer;
3089
3090 size = get_absolute_expression ();
3091 if (size < 0)
3092 {
3093 as_bad (_("negative size"));
3094 ignore_rest_of_line ();
3095 return;
3096 }
3097
3098 if (! lcomm)
3099 {
3100 /* The third argument to .comm is the alignment. */
3101 if (*input_line_pointer != ',')
1ad63b2f 3102 align = 2;
252b5132
RH		 3103 else
3104 {
3105 ++input_line_pointer;
3106 align = get_absolute_expression ();
3107 if (align <= 0)
3108 {
3109 as_warn (_("ignoring bad alignment"));
1ad63b2f 3110 align = 2;
252b5132
RH		 3111 }
3112 }
3113 }
3114 else
3115 {
3116 char *lcomm_name;
3117 char lcomm_endc;
3118
1ad63b2f 3119 if (size <= 4)
252b5132
RH		 3120 align = 2;
3121 else
3122 align = 3;
3123
3124 /* The third argument to .lcomm appears to be the real local
3125 common symbol to create. References to the symbol named in
3126 the first argument are turned into references to the third
3127 argument. */
3128 if (*input_line_pointer != ',')
3129 {
3130 as_bad (_("missing real symbol name"));
3131 ignore_rest_of_line ();
3132 return;
3133 }
3134 ++input_line_pointer;
3135
3136 lcomm_name = input_line_pointer;
3137 lcomm_endc = get_symbol_end ();
81d4177b 3138
252b5132
RH		 3139 lcomm_sym = symbol_find_or_make (lcomm_name);
3140
3141 *input_line_pointer = lcomm_endc;
3142 }
3143
3144 *end_name = '\0';
3145 sym = symbol_find_or_make (name);
3146 *end_name = endc;
3147
3148 if (S_IS_DEFINED (sym)
3149 || S_GET_VALUE (sym) != 0)
3150 {
3151 as_bad (_("attempt to redefine symbol"));
3152 ignore_rest_of_line ();
3153 return;
3154 }
81d4177b 3155
252b5132 3156 record_alignment (bss_section, align);
81d4177b 3157
252b5132
RH		 3158 if (! lcomm
3159 || ! S_IS_DEFINED (lcomm_sym))
3160 {
3161 symbolS *def_sym;
3162 offsetT def_size;
3163
3164 if (! lcomm)
3165 {
3166 def_sym = sym;
3167 def_size = size;
3168 S_SET_EXTERNAL (sym);
3169 }
3170 else
3171 {
809ffe0d 3172 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3173 def_sym = lcomm_sym;
3174 def_size = 0;
3175 }
3176
3177 subseg_set (bss_section, 1);
3178 frag_align (align, 0, 0);
81d4177b 3179
809ffe0d 3180 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3181 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3182 def_size, (char *) NULL);
3183 *pfrag = 0;
3184 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3185 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3186 }
3187 else if (lcomm)
3188 {
3189 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3190 symbol_get_frag (lcomm_sym)->fr_offset =
3191 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3192 &~ ((1 << align) - 1));
809ffe0d
ILT		 3193 if (align > symbol_get_tc (lcomm_sym)->align)
3194 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3195 }
3196
3197 if (lcomm)
3198 {
3199 /* Make sym an offset from lcomm_sym. */
3200 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3201 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3202 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3203 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3204 }
3205
3206 subseg_set (current_seg, current_subseg);
3207
3208 demand_empty_rest_of_line ();
3209}
3210
3211/* The .csect pseudo-op. This switches us into a different
3212 subsegment. The first argument is a symbol whose value is the
3213 start of the .csect. In COFF, csect symbols get special aux
3214 entries defined by the x_csect field of union internal_auxent. The
3215 optional second argument is the alignment (the default is 2). */
3216
3217static void
98027b10 3218ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3219{
3220 char *name;
3221 char endc;
3222 symbolS *sym;
931e13a6 3223 offsetT align;
252b5132
RH		 3224
3225 name = input_line_pointer;
3226 endc = get_symbol_end ();
81d4177b 3227
252b5132
RH		 3228 sym = symbol_find_or_make (name);
3229
3230 *input_line_pointer = endc;
3231
3232 if (S_GET_NAME (sym)[0] == '\0')
3233 {
3234 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3235 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3236 }
3237
931e13a6 3238 align = 2;
252b5132
RH		 3239 if (*input_line_pointer == ',')
3240 {
3241 ++input_line_pointer;
931e13a6 3242 align = get_absolute_expression ();
252b5132
RH		 3243 }
3244
931e13a6
AM		 3245 ppc_change_csect (sym, align);
3246
252b5132
RH		 3247 demand_empty_rest_of_line ();
3248}
3249
3250/* Change to a different csect. */
3251
3252static void
98027b10 3253ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3254{
3255 if (S_IS_DEFINED (sym))
809ffe0d 3256 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3257 else
3258 {
3259 symbolS **list_ptr;
3260 int after_toc;
3261 int hold_chunksize;
3262 symbolS *list;
931e13a6
AM		 3263 int is_code;
3264 segT sec;
252b5132
RH		 3265
3266 /* This is a new csect. We need to look at the symbol class to
3267 figure out whether it should go in the text section or the
3268 data section. */
3269 after_toc = 0;
931e13a6 3270 is_code = 0;
809ffe0d 3271 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3272 {
3273 case XMC_PR:
3274 case XMC_RO:
3275 case XMC_DB:
3276 case XMC_GL:
3277 case XMC_XO:
3278 case XMC_SV:
3279 case XMC_TI:
3280 case XMC_TB:
3281 S_SET_SEGMENT (sym, text_section);
809ffe0d 3282 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3283 ++ppc_text_subsegment;
3284 list_ptr = &ppc_text_csects;
931e13a6 3285 is_code = 1;
252b5132
RH		 3286 break;
3287 case XMC_RW:
3288 case XMC_TC0:
3289 case XMC_TC:
3290 case XMC_DS:
3291 case XMC_UA:
3292 case XMC_BS:
3293 case XMC_UC:
3294 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3295 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3296 == ppc_data_subsegment))
252b5132
RH		 3297 after_toc = 1;
3298 S_SET_SEGMENT (sym, data_section);
809ffe0d 3299 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3300 ++ppc_data_subsegment;
3301 list_ptr = &ppc_data_csects;
3302 break;
3303 default:
3304 abort ();
3305 }
3306
3307 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3308 changing subsegments, so that we don't use a lot of memory
3309 space for what may be a small section. */
252b5132
RH		 3310 hold_chunksize = chunksize;
3311 chunksize = 64;
3312
931e13a6
AM		 3313 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3314 symbol_get_tc (sym)->subseg);
252b5132
RH		 3315
3316 chunksize = hold_chunksize;
3317
3318 if (after_toc)
3319 ppc_after_toc_frag = frag_now;
3320
931e13a6
AM		 3321 record_alignment (sec, align);
3322 if (is_code)
3323 frag_align_code (align, 0);
3324 else
3325 frag_align (align, 0, 0);
3326
809ffe0d 3327 symbol_set_frag (sym, frag_now);
252b5132
RH		 3328 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3329
931e13a6 3330 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3331 symbol_get_tc (sym)->output = 1;
3332 symbol_get_tc (sym)->within = sym;
81d4177b 3333
252b5132 3334 for (list = *list_ptr;
809ffe0d
ILT		 3335 symbol_get_tc (list)->next != (symbolS *) NULL;
3336 list = symbol_get_tc (list)->next)
252b5132 3337 ;
809ffe0d 3338 symbol_get_tc (list)->next = sym;
81d4177b 3339
252b5132 3340 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3341 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3342 &symbol_lastP);
252b5132
RH		 3343 }
3344
3345 ppc_current_csect = sym;
3346}
3347
3348/* This function handles the .text and .data pseudo-ops. These
3349 pseudo-ops aren't really used by XCOFF; we implement them for the
3350 convenience of people who aren't used to XCOFF. */
3351
3352static void
98027b10 3353ppc_section (int type)
252b5132
RH		 3354{
3355 const char *name;
3356 symbolS *sym;
3357
3358 if (type == 't')
3359 name = ".text[PR]";
3360 else if (type == 'd')
3361 name = ".data[RW]";
3362 else
3363 abort ();
3364
3365 sym = symbol_find_or_make (name);
3366
931e13a6 3367 ppc_change_csect (sym, 2);
252b5132
RH		 3368
3369 demand_empty_rest_of_line ();
3370}
3371
3372/* This function handles the .section pseudo-op. This is mostly to
3373 give an error, since XCOFF only supports .text, .data and .bss, but
3374 we do permit the user to name the text or data section. */
3375
3376static void
98027b10 3377ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3378{
3379 char *user_name;
3380 const char *real_name;
3381 char c;
3382 symbolS *sym;
3383
3384 user_name = input_line_pointer;
3385 c = get_symbol_end ();
3386
3387 if (strcmp (user_name, ".text") == 0)
3388 real_name = ".text[PR]";
3389 else if (strcmp (user_name, ".data") == 0)
3390 real_name = ".data[RW]";
3391 else
3392 {
3393 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3394 *input_line_pointer = c;
3395 ignore_rest_of_line ();
3396 return;
3397 }
3398
3399 *input_line_pointer = c;
3400
3401 sym = symbol_find_or_make (real_name);
3402
931e13a6 3403 ppc_change_csect (sym, 2);
252b5132
RH		 3404
3405 demand_empty_rest_of_line ();
3406}
3407
3408/* The .extern pseudo-op. We create an undefined symbol. */
3409
3410static void
98027b10 3411ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3412{
3413 char *name;
3414 char endc;
3415
3416 name = input_line_pointer;
3417 endc = get_symbol_end ();
3418
3419 (void) symbol_find_or_make (name);
3420
3421 *input_line_pointer = endc;
3422
3423 demand_empty_rest_of_line ();
3424}
3425
3426/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3427
3428static void
98027b10 3429ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3430{
3431 char *name;
3432 char endc;
3433 symbolS *sym;
3434
3435 name = input_line_pointer;
3436 endc = get_symbol_end ();
3437
3438 sym = symbol_find_or_make (name);
3439
3440 *input_line_pointer = endc;
3441
809ffe0d 3442 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3443
3444 demand_empty_rest_of_line ();
3445}
3446
3447/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3448 although I don't know why it bothers. */
3449
3450static void
98027b10 3451ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3452{
3453 char *name;
3454 char endc;
3455 symbolS *sym;
3456 int len;
3457
3458 name = input_line_pointer;
3459 endc = get_symbol_end ();
3460
3461 sym = symbol_find_or_make (name);
3462
3463 *input_line_pointer = endc;
3464
3465 if (*input_line_pointer != ',')
3466 {
3467 as_bad (_("missing rename string"));
3468 ignore_rest_of_line ();
3469 return;
3470 }
3471 ++input_line_pointer;
3472
809ffe0d 3473 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3474
3475 demand_empty_rest_of_line ();
3476}
3477
3478/* The .stabx pseudo-op. This is similar to a normal .stabs
3479 pseudo-op, but slightly different. A sample is
3480 .stabx "main:F-1",.main,142,0
3481 The first argument is the symbol name to create. The second is the
3482 value, and the third is the storage class. The fourth seems to be
3483 always zero, and I am assuming it is the type. */
3484
3485static void
98027b10 3486ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3487{
3488 char *name;
3489 int len;
3490 symbolS *sym;
3491 expressionS exp;
3492
3493 name = demand_copy_C_string (&len);
3494
3495 if (*input_line_pointer != ',')
3496 {
3497 as_bad (_("missing value"));
3498 return;
3499 }
3500 ++input_line_pointer;
3501
b34976b6 3502 ppc_stab_symbol = TRUE;
252b5132 3503 sym = symbol_make (name);
b34976b6 3504 ppc_stab_symbol = FALSE;
252b5132 3505
809ffe0d 3506 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3507
3508 (void) expression (&exp);
3509
3510 switch (exp.X_op)
3511 {
3512 case O_illegal:
3513 case O_absent:
3514 case O_big:
3515 as_bad (_("illegal .stabx expression; zero assumed"));
3516 exp.X_add_number = 0;
3517 /* Fall through. */
3518 case O_constant:
3519 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3520 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3521 break;
3522
3523 case O_symbol:
3524 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3525 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3526 else
3527 {
3528 S_SET_VALUE (sym,
3529 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3530 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3531 }
3532 break;
3533
3534 default:
3535 /* The value is some complex expression. This will probably
99a814a1
AM		 3536 fail at some later point, but this is probably the right
3537 thing to do here. */
809ffe0d 3538 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3539 break;
3540 }
3541
3542 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3543 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3544
3545 if (*input_line_pointer != ',')
3546 {
3547 as_bad (_("missing class"));
3548 return;
3549 }
3550 ++input_line_pointer;
3551
3552 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3553
3554 if (*input_line_pointer != ',')
3555 {
3556 as_bad (_("missing type"));
3557 return;
3558 }
3559 ++input_line_pointer;
3560
3561 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3562
809ffe0d 3563 symbol_get_tc (sym)->output = 1;
252b5132 3564
6877bb43 3565 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3566
809ffe0d 3567 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3568
41ea10b1 3569 /* In this case :
99a814a1 3570
41ea10b1
TR		 3571 .bs name
3572 .stabx "z",arrays_,133,0
3573 .es
99a814a1 3574
41ea10b1 3575 .comm arrays_,13768,3
99a814a1 3576
41ea10b1
TR		 3577 resolve_symbol_value will copy the exp's "within" into sym's when the
3578 offset is 0. Since this seems to be corner case problem,
3579 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3580 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3581
3582 if (exp.X_op == O_symbol)
41ea10b1
TR		 3583 {
3584 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3585 }
6877bb43 3586 }
99a814a1 3587
252b5132
RH		 3588 if (exp.X_op != O_symbol
3589 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3590 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3591 ppc_frob_label (sym);
3592 else
3593 {
3594 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3595 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3596 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3597 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3598 }
3599
3600 demand_empty_rest_of_line ();
3601}
3602
3603/* The .function pseudo-op. This takes several arguments. The first
3604 argument seems to be the external name of the symbol. The second
67c1ffbe 3605 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3606 uses the same name for both. I have no idea what the third and
3607 fourth arguments are meant to be. The optional fifth argument is
3608 an expression for the size of the function. In COFF this symbol
3609 gets an aux entry like that used for a csect. */
3610
3611static void
98027b10 3612ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3613{
3614 char *name;
3615 char endc;
3616 char *s;
3617 symbolS *ext_sym;
3618 symbolS *lab_sym;
3619
3620 name = input_line_pointer;
3621 endc = get_symbol_end ();
3622
3623 /* Ignore any [PR] suffix. */
3624 name = ppc_canonicalize_symbol_name (name);
3625 s = strchr (name, '[');
3626 if (s != (char *) NULL
3627 && strcmp (s + 1, "PR]") == 0)
3628 *s = '\0';
3629
3630 ext_sym = symbol_find_or_make (name);
3631
3632 *input_line_pointer = endc;
3633
3634 if (*input_line_pointer != ',')
3635 {
3636 as_bad (_("missing symbol name"));
3637 ignore_rest_of_line ();
3638 return;
3639 }
3640 ++input_line_pointer;
3641
3642 name = input_line_pointer;
3643 endc = get_symbol_end ();
3644
3645 lab_sym = symbol_find_or_make (name);
3646
3647 *input_line_pointer = endc;
3648
3649 if (ext_sym != lab_sym)
3650 {
809ffe0d
ILT		 3651 expressionS exp;
3652
3653 exp.X_op = O_symbol;
3654 exp.X_add_symbol = lab_sym;
3655 exp.X_op_symbol = NULL;
3656 exp.X_add_number = 0;
3657 exp.X_unsigned = 0;
3658 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3659 }
3660
809ffe0d
ILT		 3661 if (symbol_get_tc (ext_sym)->class == -1)
3662 symbol_get_tc (ext_sym)->class = XMC_PR;
3663 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3664
3665 if (*input_line_pointer == ',')
3666 {
3667 expressionS ignore;
3668
3669 /* Ignore the third argument. */
3670 ++input_line_pointer;
3671 expression (&ignore);
3672 if (*input_line_pointer == ',')
3673 {
3674 /* Ignore the fourth argument. */
3675 ++input_line_pointer;
3676 expression (&ignore);
3677 if (*input_line_pointer == ',')
3678 {
3679 /* The fifth argument is the function size. */
3680 ++input_line_pointer;
809ffe0d
ILT		 3681 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3682 absolute_section,
3683 (valueT) 0,
3684 &zero_address_frag);
3685 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3686 }
3687 }
3688 }
3689
3690 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3691 SF_SET_FUNCTION (ext_sym);
3692 SF_SET_PROCESS (ext_sym);
3693 coff_add_linesym (ext_sym);
3694
3695 demand_empty_rest_of_line ();
3696}
3697
3698/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3699 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3700 with the correct line number */
5d6255fe 3701
8642cce8 3702static symbolS *saved_bi_sym = 0;
252b5132
RH		 3703
3704static void
98027b10 3705ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3706{
3707 symbolS *sym;
3708
3709 sym = symbol_make (".bf");
3710 S_SET_SEGMENT (sym, text_section);
809ffe0d 3711 symbol_set_frag (sym, frag_now);
252b5132
RH		 3712 S_SET_VALUE (sym, frag_now_fix ());
3713 S_SET_STORAGE_CLASS (sym, C_FCN);
3714
3715 coff_line_base = get_absolute_expression ();
3716
3717 S_SET_NUMBER_AUXILIARY (sym, 1);
3718 SA_SET_SYM_LNNO (sym, coff_line_base);
3719
8642cce8 3720 /* Line number for bi. */
5d6255fe 3721 if (saved_bi_sym)
8642cce8
TR		 3722 {
3723 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3724 saved_bi_sym = 0;
3725 }
5d6255fe 3726
8642cce8 3727
809ffe0d 3728 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3729
3730 ppc_frob_label (sym);
3731
3732 demand_empty_rest_of_line ();
3733}
3734
3735/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3736 ".ef", except that the line number is absolute, not relative to the
3737 most recent ".bf" symbol. */
3738
3739static void
98027b10 3740ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3741{
3742 symbolS *sym;
3743
3744 sym = symbol_make (".ef");
3745 S_SET_SEGMENT (sym, text_section);
809ffe0d 3746 symbol_set_frag (sym, frag_now);
252b5132
RH		 3747 S_SET_VALUE (sym, frag_now_fix ());
3748 S_SET_STORAGE_CLASS (sym, C_FCN);
3749 S_SET_NUMBER_AUXILIARY (sym, 1);
3750 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3751 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3752
3753 ppc_frob_label (sym);
3754
3755 demand_empty_rest_of_line ();
3756}
3757
3758/* The .bi and .ei pseudo-ops. These take a string argument and
3759 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3760 the symbol list. The value of .bi will be know when the next .bf
3761 is encountered. */
252b5132
RH		 3762
3763static void
98027b10 3764ppc_biei (int ei)
252b5132
RH		 3765{
3766 static symbolS *last_biei;
3767
3768 char *name;
3769 int len;
3770 symbolS *sym;
3771 symbolS *look;
3772
3773 name = demand_copy_C_string (&len);
3774
3775 /* The value of these symbols is actually file offset. Here we set
3776 the value to the index into the line number entries. In
3777 ppc_frob_symbols we set the fix_line field, which will cause BFD
3778 to do the right thing. */
3779
3780 sym = symbol_make (name);
3781 /* obj-coff.c currently only handles line numbers correctly in the
3782 .text section. */
3783 S_SET_SEGMENT (sym, text_section);
3784 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3785 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3786
3787 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3788 symbol_get_tc (sym)->output = 1;
81d4177b 3789
8642cce8 3790 /* Save bi. */
5d6255fe 3791 if (ei)
8642cce8
TR		 3792 saved_bi_sym = 0;
3793 else
3794 saved_bi_sym = sym;
3795
252b5132
RH		 3796 for (look = last_biei ? last_biei : symbol_rootP;
3797 (look != (symbolS *) NULL
3798 && (S_GET_STORAGE_CLASS (look) == C_FILE
3799 || S_GET_STORAGE_CLASS (look) == C_BINCL
3800 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3801 look = symbol_next (look))
3802 ;
3803 if (look != (symbolS *) NULL)
3804 {
3805 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3806 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3807 last_biei = sym;
3808 }
3809
3810 demand_empty_rest_of_line ();
3811}
3812
3813/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3814 There is one argument, which is a csect symbol. The value of the
3815 .bs symbol is the index of this csect symbol. */
3816
3817static void
98027b10 3818ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3819{
3820 char *name;
3821 char endc;
3822 symbolS *csect;
3823 symbolS *sym;
3824
3825 if (ppc_current_block != NULL)
3826 as_bad (_("nested .bs blocks"));
3827
3828 name = input_line_pointer;
3829 endc = get_symbol_end ();
3830
3831 csect = symbol_find_or_make (name);
3832
3833 *input_line_pointer = endc;
3834
3835 sym = symbol_make (".bs");
3836 S_SET_SEGMENT (sym, now_seg);
3837 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3838 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3839 symbol_get_tc (sym)->output = 1;
252b5132 3840
809ffe0d 3841 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3842
3843 ppc_frob_label (sym);
3844
3845 ppc_current_block = sym;
3846
3847 demand_empty_rest_of_line ();
3848}
3849
3850/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3851
3852static void
98027b10 3853ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3854{
3855 symbolS *sym;
3856
3857 if (ppc_current_block == NULL)
3858 as_bad (_(".es without preceding .bs"));
3859
3860 sym = symbol_make (".es");
3861 S_SET_SEGMENT (sym, now_seg);
3862 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3863 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3864 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3865
3866 ppc_frob_label (sym);
3867
3868 ppc_current_block = NULL;
3869
3870 demand_empty_rest_of_line ();
3871}
3872
3873/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3874 line number. */
3875
3876static void
98027b10 3877ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3878{
3879 symbolS *sym;
3880
3881 sym = symbol_make (".bb");
3882 S_SET_SEGMENT (sym, text_section);
809ffe0d 3883 symbol_set_frag (sym, frag_now);
252b5132
RH		 3884 S_SET_VALUE (sym, frag_now_fix ());
3885 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3886
3887 S_SET_NUMBER_AUXILIARY (sym, 1);
3888 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3889
809ffe0d 3890 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3891
3892 SF_SET_PROCESS (sym);
3893
3894 ppc_frob_label (sym);
3895
3896 demand_empty_rest_of_line ();
3897}
3898
3899/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3900 line number. */
3901
3902static void
98027b10 3903ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3904{
3905 symbolS *sym;
3906
3907 sym = symbol_make (".eb");
3908 S_SET_SEGMENT (sym, text_section);
809ffe0d 3909 symbol_set_frag (sym, frag_now);
252b5132
RH		 3910 S_SET_VALUE (sym, frag_now_fix ());
3911 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3912 S_SET_NUMBER_AUXILIARY (sym, 1);
3913 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3914 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3915
3916 SF_SET_PROCESS (sym);
3917
3918 ppc_frob_label (sym);
3919
3920 demand_empty_rest_of_line ();
3921}
3922
3923/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3924 specified name. */
3925
3926static void
98027b10 3927ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3928{
3929 char *name;
3930 int len;
3931 symbolS *sym;
3932
3933 name = demand_copy_C_string (&len);
3934 sym = symbol_make (name);
3935 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3936 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3937 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3938 S_SET_VALUE (sym, 0);
809ffe0d 3939 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3940
3941 ppc_frob_label (sym);
3942
3943 demand_empty_rest_of_line ();
3944}
3945
3946/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3947
3948static void
98027b10 3949ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3950{
3951 symbolS *sym;
3952
3953 sym = symbol_make (".ec");
3954 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3955 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3956 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3957 S_SET_VALUE (sym, 0);
809ffe0d 3958 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3959
3960 ppc_frob_label (sym);
3961
3962 demand_empty_rest_of_line ();
3963}
3964
3965/* The .toc pseudo-op. Switch to the .toc subsegment. */
3966
3967static void
98027b10 3968ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3969{
3970 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3971 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3972 else
3973 {
3974 subsegT subseg;
3975 symbolS *sym;
3976 symbolS *list;
81d4177b 3977
252b5132
RH		 3978 subseg = ppc_data_subsegment;
3979 ++ppc_data_subsegment;
3980
3981 subseg_new (segment_name (data_section), subseg);
3982 ppc_toc_frag = frag_now;
3983
3984 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3985 symbol_set_frag (sym, frag_now);
252b5132
RH		 3986 S_SET_SEGMENT (sym, data_section);
3987 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3988 symbol_get_tc (sym)->subseg = subseg;
3989 symbol_get_tc (sym)->output = 1;
3990 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3991
3992 ppc_toc_csect = sym;
81d4177b 3993
252b5132 3994 for (list = ppc_data_csects;
809ffe0d
ILT		 3995 symbol_get_tc (list)->next != (symbolS *) NULL;
3996 list = symbol_get_tc (list)->next)
252b5132 3997 ;
809ffe0d 3998 symbol_get_tc (list)->next = sym;
252b5132
RH		 3999
4000 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4001 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4002 &symbol_lastP);
252b5132
RH		 4003 }
4004
4005 ppc_current_csect = ppc_toc_csect;
4006
4007 demand_empty_rest_of_line ();
4008}
4009
4010/* The AIX assembler automatically aligns the operands of a .long or
4011 .short pseudo-op, and we want to be compatible. */
4012
4013static void
98027b10 4014ppc_xcoff_cons (int log_size)
252b5132
RH		 4015{
4016 frag_align (log_size, 0, 0);
4017 record_alignment (now_seg, log_size);
4018 cons (1 << log_size);
4019}
4020
4021static void
98027b10 4022ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4023{
4024 expressionS exp;
4025 int byte_count;
4026
4027 (void) expression (&exp);
4028
4029 if (exp.X_op != O_constant)
4030 {
4031 as_bad (_("non-constant byte count"));
4032 return;
4033 }
4034
4035 byte_count = exp.X_add_number;
4036
4037 if (*input_line_pointer != ',')
4038 {
4039 as_bad (_("missing value"));
4040 return;
4041 }
4042
4043 ++input_line_pointer;
4044 cons (byte_count);
4045}
4046
4047#endif /* OBJ_XCOFF */
0baf16f2 4048#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4049\f
4050/* The .tc pseudo-op. This is used when generating either XCOFF or
4051 ELF. This takes two or more arguments.
4052
4053 When generating XCOFF output, the first argument is the name to
4054 give to this location in the toc; this will be a symbol with class
0baf16f2 4055 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4056 this location in the TOC; often there is just one more argument, a
1049f94e 4057 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4058 depends on target word size. A 32-bit target uses 4-byte values, a
4059 64-bit target uses 8-byte values.
252b5132
RH		 4060
4061 When not generating XCOFF output, the arguments are the same, but
4062 the first argument is simply ignored. */
4063
4064static void
98027b10 4065ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4066{
4067#ifdef OBJ_XCOFF
4068
4069 /* Define the TOC symbol name. */
4070 {
4071 char *name;
4072 char endc;
4073 symbolS *sym;
4074
4075 if (ppc_toc_csect == (symbolS *) NULL
4076 || ppc_toc_csect != ppc_current_csect)
4077 {
4078 as_bad (_(".tc not in .toc section"));
4079 ignore_rest_of_line ();
4080 return;
4081 }
4082
4083 name = input_line_pointer;
4084 endc = get_symbol_end ();
4085
4086 sym = symbol_find_or_make (name);
4087
4088 *input_line_pointer = endc;
4089
4090 if (S_IS_DEFINED (sym))
4091 {
4092 symbolS *label;
4093
809ffe0d
ILT		 4094 label = symbol_get_tc (ppc_current_csect)->within;
4095 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4096 {
4097 as_bad (_(".tc with no label"));
4098 ignore_rest_of_line ();
4099 return;
4100 }
4101
4102 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4103 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4104 S_SET_VALUE (label, S_GET_VALUE (sym));
4105
4106 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4107 ++input_line_pointer;
4108
4109 return;
4110 }
4111
4112 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4113 symbol_set_frag (sym, frag_now);
252b5132 4114 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4115 symbol_get_tc (sym)->class = XMC_TC;
4116 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4117
4118 ppc_frob_label (sym);
4119 }
4120
0baf16f2
AM		 4121#endif /* OBJ_XCOFF */
4122#ifdef OBJ_ELF
9c7977b3 4123 int align;
252b5132
RH		 4124
4125 /* Skip the TOC symbol name. */
4126 while (is_part_of_name (*input_line_pointer)
d13d4015 4127 || *input_line_pointer == ' '
252b5132
RH		 4128 || *input_line_pointer == '['
4129 || *input_line_pointer == ']'
4130 || *input_line_pointer == '{'
4131 || *input_line_pointer == '}')
4132 ++input_line_pointer;
4133
0baf16f2 4134 /* Align to a four/eight byte boundary. */
2b3c4602 4135 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4136 frag_align (align, 0, 0);
4137 record_alignment (now_seg, align);
0baf16f2 4138#endif /* OBJ_ELF */
252b5132
RH		 4139
4140 if (*input_line_pointer != ',')
4141 demand_empty_rest_of_line ();
4142 else
4143 {
4144 ++input_line_pointer;
2b3c4602 4145 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4146 }
4147}
0baf16f2
AM		 4148
4149/* Pseudo-op .machine. */
0baf16f2
AM		 4150
4151static void
98027b10 4152ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4153{
69c040df
AM		 4154 char *cpu_string;
4155#define MAX_HISTORY 100
fa452fa6 4156 static ppc_cpu_t *cpu_history;
69c040df
AM		 4157 static int curr_hist;
4158
4159 SKIP_WHITESPACE ();
4160
4161 if (*input_line_pointer == '"')
4162 {
4163 int len;
4164 cpu_string = demand_copy_C_string (&len);
4165 }
4166 else
4167 {
4168 char c;
4169 cpu_string = input_line_pointer;
4170 c = get_symbol_end ();
4171 cpu_string = xstrdup (cpu_string);
4172 *input_line_pointer = c;
4173 }
4174
4175 if (cpu_string != NULL)
4176 {
fa452fa6 4177 ppc_cpu_t old_cpu = ppc_cpu;
69c040df
AM		 4178 char *p;
4179
4180 for (p = cpu_string; *p != 0; p++)
4181 *p = TOLOWER (*p);
4182
4183 if (strcmp (cpu_string, "push") == 0)
4184 {
4185 if (cpu_history == NULL)
4186 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4187
4188 if (curr_hist >= MAX_HISTORY)
4189 as_bad (_(".machine stack overflow"));
4190 else
4191 cpu_history[curr_hist++] = ppc_cpu;
4192 }
4193 else if (strcmp (cpu_string, "pop") == 0)
4194 {
4195 if (curr_hist <= 0)
4196 as_bad (_(".machine stack underflow"));
4197 else
4198 ppc_cpu = cpu_history[--curr_hist];
4199 }
4200 else if (parse_cpu (cpu_string))
4201 ;
4202 else
4203 as_bad (_("invalid machine `%s'"), cpu_string);
4204
4205 if (ppc_cpu != old_cpu)
4206 ppc_setup_opcodes ();
4207 }
4208
4209 demand_empty_rest_of_line ();
0baf16f2
AM		 4210}
4211
4212/* See whether a symbol is in the TOC section. */
4213
4214static int
98027b10 4215ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4216{
4217#ifdef OBJ_XCOFF
4218 return symbol_get_tc (sym)->class == XMC_TC;
4219#endif
4220#ifdef OBJ_ELF
4221 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4222 if (ppc_obj64)
0baf16f2
AM		 4223 return strcmp (sname, ".toc") == 0;
4224 else
4225 return strcmp (sname, ".got") == 0;
4226#endif
4227}
4228#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4229\f
4230#ifdef TE_PE
4231
99a814a1 4232/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4233
4234/* Set the current section. */
4235static void
98027b10 4236ppc_set_current_section (segT new)
252b5132
RH		 4237{
4238 ppc_previous_section = ppc_current_section;
4239 ppc_current_section = new;
4240}
4241
4242/* pseudo-op: .previous
4243 behaviour: toggles the current section with the previous section.
4244 errors: None
99a814a1
AM		 4245 warnings: "No previous section" */
4246
252b5132 4247static void
98027b10 4248ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4249{
4250 symbolS *tmp;
4251
81d4177b 4252 if (ppc_previous_section == NULL)
252b5132 4253 {
99a814a1 4254 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4255 return;
4256 }
4257
99a814a1 4258 subseg_set (ppc_previous_section, 0);
252b5132 4259
99a814a1 4260 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4261}
4262
4263/* pseudo-op: .pdata
4264 behaviour: predefined read only data section
b34976b6 4265 double word aligned
252b5132
RH		 4266 errors: None
4267 warnings: None
4268 initial: .section .pdata "adr3"
b34976b6 4269 a - don't know -- maybe a misprint
252b5132
RH		 4270 d - initialized data
4271 r - readable
4272 3 - double word aligned (that would be 4 byte boundary)
4273
4274 commentary:
4275 Tag index tables (also known as the function table) for exception
99a814a1 4276 handling, debugging, etc. */
252b5132 4277
252b5132 4278static void
98027b10 4279ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4280{
81d4177b 4281 if (pdata_section == 0)
252b5132
RH		 4282 {
4283 pdata_section = subseg_new (".pdata", 0);
81d4177b 4284
252b5132
RH		 4285 bfd_set_section_flags (stdoutput, pdata_section,
4286 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4287 | SEC_READONLY | SEC_DATA ));
81d4177b 4288
252b5132
RH		 4289 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4290 }
4291 else
4292 {
99a814a1 4293 pdata_section = subseg_new (".pdata", 0);
252b5132 4294 }
99a814a1 4295 ppc_set_current_section (pdata_section);
252b5132
RH		 4296}
4297
4298/* pseudo-op: .ydata
4299 behaviour: predefined read only data section
b34976b6 4300 double word aligned
252b5132
RH		 4301 errors: None
4302 warnings: None
4303 initial: .section .ydata "drw3"
b34976b6 4304 a - don't know -- maybe a misprint
252b5132
RH		 4305 d - initialized data
4306 r - readable
4307 3 - double word aligned (that would be 4 byte boundary)
4308 commentary:
4309 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4310 debugging, etc. */
4311
252b5132 4312static void
98027b10 4313ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4314{
81d4177b 4315 if (ydata_section == 0)
252b5132
RH		 4316 {
4317 ydata_section = subseg_new (".ydata", 0);
4318 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4319 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4320 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4321
4322 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4323 }
4324 else
4325 {
4326 ydata_section = subseg_new (".ydata", 0);
4327 }
99a814a1 4328 ppc_set_current_section (ydata_section);
252b5132
RH		 4329}
4330
4331/* pseudo-op: .reldata
4332 behaviour: predefined read write data section
b34976b6 4333 double word aligned (4-byte)
252b5132
RH		 4334 FIXME: relocation is applied to it
4335 FIXME: what's the difference between this and .data?
4336 errors: None
4337 warnings: None
4338 initial: .section .reldata "drw3"
4339 d - initialized data
4340 r - readable
4341 w - writeable
4342 3 - double word aligned (that would be 8 byte boundary)
4343
4344 commentary:
4345 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4346 function descriptors, etc. */
4347
252b5132 4348static void
98027b10 4349ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4350{
4351 if (reldata_section == 0)
4352 {
4353 reldata_section = subseg_new (".reldata", 0);
4354
4355 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4356 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4357 | SEC_DATA));
252b5132
RH		 4358
4359 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4360 }
4361 else
4362 {
4363 reldata_section = subseg_new (".reldata", 0);
4364 }
99a814a1 4365 ppc_set_current_section (reldata_section);
252b5132
RH		 4366}
4367
4368/* pseudo-op: .rdata
4369 behaviour: predefined read only data section
b34976b6 4370 double word aligned
252b5132
RH		 4371 errors: None
4372 warnings: None
4373 initial: .section .rdata "dr3"
4374 d - initialized data
4375 r - readable
99a814a1
AM		 4376 3 - double word aligned (that would be 4 byte boundary) */
4377
252b5132 4378static void
98027b10 4379ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4380{
4381 if (rdata_section == 0)
4382 {
4383 rdata_section = subseg_new (".rdata", 0);
4384 bfd_set_section_flags (stdoutput, rdata_section,
4385 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4386 | SEC_READONLY | SEC_DATA ));
4387
4388 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4389 }
4390 else
4391 {
4392 rdata_section = subseg_new (".rdata", 0);
4393 }
99a814a1 4394 ppc_set_current_section (rdata_section);
252b5132
RH		 4395}
4396
4397/* pseudo-op: .ualong
81d4177b 4398 behaviour: much like .int, with the exception that no alignment is
b34976b6 4399 performed.
252b5132
RH		 4400 FIXME: test the alignment statement
4401 errors: None
99a814a1
AM		 4402 warnings: None */
4403
252b5132 4404static void
98027b10 4405ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4406{
99a814a1
AM		 4407 /* Try for long. */
4408 cons (4);
252b5132
RH		 4409}
4410
4411/* pseudo-op: .znop <symbol name>
4412 behaviour: Issue a nop instruction
b34976b6 4413 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4414 the supplied symbol name.
4415 errors: None
99a814a1
AM		 4416 warnings: Missing symbol name */
4417
252b5132 4418static void
98027b10 4419ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4420{
4421 unsigned long insn;
4422 const struct powerpc_opcode *opcode;
4423 expressionS ex;
4424 char *f;
252b5132 4425 symbolS *sym;
252b5132
RH		 4426 char *symbol_name;
4427 char c;
4428 char *name;
4429 unsigned int exp;
4430 flagword flags;
4431 asection *sec;
4432
99a814a1 4433 /* Strip out the symbol name. */
252b5132
RH		 4434 symbol_name = input_line_pointer;
4435 c = get_symbol_end ();
4436
4437 name = xmalloc (input_line_pointer - symbol_name + 1);
4438 strcpy (name, symbol_name);
4439
4440 sym = symbol_find_or_make (name);
4441
4442 *input_line_pointer = c;
4443
4444 SKIP_WHITESPACE ();
4445
4446 /* Look up the opcode in the hash table. */
4447 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4448
99a814a1 4449 /* Stick in the nop. */
252b5132
RH		 4450 insn = opcode->opcode;
4451
4452 /* Write out the instruction. */
4453 f = frag_more (4);
4454 md_number_to_chars (f, insn, 4);
4455 fix_new (frag_now,
4456 f - frag_now->fr_literal,
4457 4,
4458 sym,
4459 0,
4460 0,
4461 BFD_RELOC_16_GOT_PCREL);
4462
4463}
4464
81d4177b
KH		 4465/* pseudo-op:
4466 behaviour:
4467 errors:
99a814a1
AM		 4468 warnings: */
4469
252b5132 4470static void
98027b10 4471ppc_pe_comm (int lcomm)
252b5132 4472{
98027b10
AM		 4473 char *name;
4474 char c;
4475 char *p;
252b5132 4476 offsetT temp;
98027b10 4477 symbolS *symbolP;
252b5132
RH		 4478 offsetT align;
4479
4480 name = input_line_pointer;
4481 c = get_symbol_end ();
4482
99a814a1 4483 /* just after name is now '\0'. */
252b5132
RH		 4484 p = input_line_pointer;
4485 *p = c;
4486 SKIP_WHITESPACE ();
4487 if (*input_line_pointer != ',')
4488 {
4489 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4490 ignore_rest_of_line ();
4491 return;
4492 }
4493
4494 input_line_pointer++; /* skip ',' */
4495 if ((temp = get_absolute_expression ()) < 0)
4496 {
4497 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4498 ignore_rest_of_line ();
4499 return;
4500 }
4501
4502 if (! lcomm)
4503 {
4504 /* The third argument to .comm is the alignment. */
4505 if (*input_line_pointer != ',')
4506 align = 3;
4507 else
4508 {
4509 ++input_line_pointer;
4510 align = get_absolute_expression ();
4511 if (align <= 0)
4512 {
4513 as_warn (_("ignoring bad alignment"));
4514 align = 3;
4515 }
4516 }
4517 }
4518
4519 *p = 0;
4520 symbolP = symbol_find_or_make (name);
4521
4522 *p = c;
4523 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4524 {
4525 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4526 S_GET_NAME (symbolP));
4527 ignore_rest_of_line ();
4528 return;
4529 }
4530
4531 if (S_GET_VALUE (symbolP))
4532 {
4533 if (S_GET_VALUE (symbolP) != (valueT) temp)
4534 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4535 S_GET_NAME (symbolP),
4536 (long) S_GET_VALUE (symbolP),
4537 (long) temp);
4538 }
4539 else
4540 {
4541 S_SET_VALUE (symbolP, (valueT) temp);
4542 S_SET_EXTERNAL (symbolP);
86ebace2 4543 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4544 }
4545
4546 demand_empty_rest_of_line ();
4547}
4548
4549/*
4550 * implement the .section pseudo op:
4551 * .section name {, "flags"}
4552 * ^ ^
4553 * | +--- optional flags: 'b' for bss
4554 * | 'i' for info
4555 * +-- section name 'l' for lib
4556 * 'n' for noload
4557 * 'o' for over
4558 * 'w' for data
4559 * 'd' (apparently m88k for data)
4560 * 'x' for text
4561 * But if the argument is not a quoted string, treat it as a
4562 * subsegment number.
4563 *
4564 * FIXME: this is a copy of the section processing from obj-coff.c, with
4565 * additions/changes for the moto-pas assembler support. There are three
4566 * categories:
4567 *
81d4177b 4568 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4569 * setting bits that bfd probably neither understands or uses. The
4570 * correct approach (?) will have to incorporate extra fields attached
4571 * to the section to hold the system specific stuff. (krk)
4572 *
4573 * Section Contents:
4574 * 'a' - unknown - referred to in documentation, but no definition supplied
4575 * 'c' - section has code
4576 * 'd' - section has initialized data
4577 * 'u' - section has uninitialized data
4578 * 'i' - section contains directives (info)
4579 * 'n' - section can be discarded
4580 * 'R' - remove section at link time
4581 *
4582 * Section Protection:
4583 * 'r' - section is readable
4584 * 'w' - section is writeable
4585 * 'x' - section is executable
4586 * 's' - section is sharable
4587 *
4588 * Section Alignment:
4589 * '0' - align to byte boundary
4590 * '1' - align to halfword undary
4591 * '2' - align to word boundary
4592 * '3' - align to doubleword boundary
4593 * '4' - align to quadword boundary
4594 * '5' - align to 32 byte boundary
4595 * '6' - align to 64 byte boundary
4596 *
4597 */
4598
4599void
98027b10 4600ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4601{
99a814a1 4602 /* Strip out the section name. */
252b5132
RH		 4603 char *section_name;
4604 char c;
4605 char *name;
4606 unsigned int exp;
4607 flagword flags;
4608 segT sec;
4609 int align;
4610
4611 section_name = input_line_pointer;
4612 c = get_symbol_end ();
4613
4614 name = xmalloc (input_line_pointer - section_name + 1);
4615 strcpy (name, section_name);
4616
4617 *input_line_pointer = c;
4618
4619 SKIP_WHITESPACE ();
4620
4621 exp = 0;
4622 flags = SEC_NO_FLAGS;
4623
4624 if (strcmp (name, ".idata$2") == 0)
4625 {
4626 align = 0;
4627 }
4628 else if (strcmp (name, ".idata$3") == 0)
4629 {
4630 align = 0;
4631 }
4632 else if (strcmp (name, ".idata$4") == 0)
4633 {
4634 align = 2;
4635 }
4636 else if (strcmp (name, ".idata$5") == 0)
4637 {
4638 align = 2;
4639 }
4640 else if (strcmp (name, ".idata$6") == 0)
4641 {
4642 align = 1;
4643 }
4644 else
99a814a1
AM		 4645 /* Default alignment to 16 byte boundary. */
4646 align = 4;
252b5132
RH		 4647
4648 if (*input_line_pointer == ',')
4649 {
4650 ++input_line_pointer;
4651 SKIP_WHITESPACE ();
4652 if (*input_line_pointer != '"')
4653 exp = get_absolute_expression ();
4654 else
4655 {
4656 ++input_line_pointer;
4657 while (*input_line_pointer != '"'
4658 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4659 {
4660 switch (*input_line_pointer)
4661 {
4662 /* Section Contents */
4663 case 'a': /* unknown */
4664 as_bad (_("Unsupported section attribute -- 'a'"));
4665 break;
4666 case 'c': /* code section */
81d4177b 4667 flags |= SEC_CODE;
252b5132
RH		 4668 break;
4669 case 'd': /* section has initialized data */
4670 flags |= SEC_DATA;
4671 break;
4672 case 'u': /* section has uninitialized data */
4673 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4674 in winnt.h */
4675 flags |= SEC_ROM;
4676 break;
4677 case 'i': /* section contains directives (info) */
4678 /* FIXME: This is IMAGE_SCN_LNK_INFO
4679 in winnt.h */
4680 flags |= SEC_HAS_CONTENTS;
4681 break;
4682 case 'n': /* section can be discarded */
81d4177b 4683 flags &=~ SEC_LOAD;
252b5132
RH		 4684 break;
4685 case 'R': /* Remove section at link time */
4686 flags |= SEC_NEVER_LOAD;
4687 break;
8d452c78 4688#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4689 /* Section Protection */
4690 case 'r': /* section is readable */
4691 flags |= IMAGE_SCN_MEM_READ;
4692 break;
4693 case 'w': /* section is writeable */
4694 flags |= IMAGE_SCN_MEM_WRITE;
4695 break;
4696 case 'x': /* section is executable */
4697 flags |= IMAGE_SCN_MEM_EXECUTE;
4698 break;
4699 case 's': /* section is sharable */
4700 flags |= IMAGE_SCN_MEM_SHARED;
4701 break;
4702
4703 /* Section Alignment */
4704 case '0': /* align to byte boundary */
4705 flags |= IMAGE_SCN_ALIGN_1BYTES;
4706 align = 0;
4707 break;
4708 case '1': /* align to halfword boundary */
4709 flags |= IMAGE_SCN_ALIGN_2BYTES;
4710 align = 1;
4711 break;
4712 case '2': /* align to word boundary */
4713 flags |= IMAGE_SCN_ALIGN_4BYTES;
4714 align = 2;
4715 break;
4716 case '3': /* align to doubleword boundary */
4717 flags |= IMAGE_SCN_ALIGN_8BYTES;
4718 align = 3;
4719 break;
4720 case '4': /* align to quadword boundary */
4721 flags |= IMAGE_SCN_ALIGN_16BYTES;
4722 align = 4;
4723 break;
4724 case '5': /* align to 32 byte boundary */
4725 flags |= IMAGE_SCN_ALIGN_32BYTES;
4726 align = 5;
4727 break;
4728 case '6': /* align to 64 byte boundary */
4729 flags |= IMAGE_SCN_ALIGN_64BYTES;
4730 align = 6;
4731 break;
8d452c78 4732#endif
252b5132 4733 default:
99a814a1
AM		 4734 as_bad (_("unknown section attribute '%c'"),
4735 *input_line_pointer);
252b5132
RH		 4736 break;
4737 }
4738 ++input_line_pointer;
4739 }
4740 if (*input_line_pointer == '"')
4741 ++input_line_pointer;
4742 }
4743 }
4744
4745 sec = subseg_new (name, (subsegT) exp);
4746
99a814a1 4747 ppc_set_current_section (sec);
252b5132
RH		 4748
4749 if (flags != SEC_NO_FLAGS)
4750 {
4751 if (! bfd_set_section_flags (stdoutput, sec, flags))
4752 as_bad (_("error setting flags for \"%s\": %s"),
4753 bfd_section_name (stdoutput, sec),
4754 bfd_errmsg (bfd_get_error ()));
4755 }
4756
99a814a1 4757 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4758}
4759
4760static void
98027b10 4761ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4762{
4763 char *name;
4764 char endc;
4765 symbolS *ext_sym;
4766
4767 name = input_line_pointer;
4768 endc = get_symbol_end ();
4769
4770 ext_sym = symbol_find_or_make (name);
4771
4772 *input_line_pointer = endc;
4773
4774 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4775 SF_SET_FUNCTION (ext_sym);
4776 SF_SET_PROCESS (ext_sym);
4777 coff_add_linesym (ext_sym);
4778
4779 demand_empty_rest_of_line ();
4780}
4781
4782static void
98027b10 4783ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4784{
4785 if (tocdata_section == 0)
4786 {
4787 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4788 /* FIXME: section flags won't work. */
252b5132
RH		 4789 bfd_set_section_flags (stdoutput, tocdata_section,
4790 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4791 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4792
4793 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4794 }
4795 else
4796 {
4797 rdata_section = subseg_new (".tocd", 0);
4798 }
4799
99a814a1 4800 ppc_set_current_section (tocdata_section);
252b5132
RH		 4801
4802 demand_empty_rest_of_line ();
4803}
4804
4805/* Don't adjust TOC relocs to use the section symbol. */
4806
4807int
98027b10 4808ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4809{
4810 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4811}
4812
4813#endif
4814\f
4815#ifdef OBJ_XCOFF
4816
4817/* XCOFF specific symbol and file handling. */
4818
4819/* Canonicalize the symbol name. We use the to force the suffix, if
4820 any, to use square brackets, and to be in upper case. */
4821
4822char *
98027b10 4823ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4824{
4825 char *s;
4826
4827 if (ppc_stab_symbol)
4828 return name;
4829
4830 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4831 ;
4832 if (*s != '\0')
4833 {
4834 char brac;
4835
4836 if (*s == '[')
4837 brac = ']';
4838 else
4839 {
4840 *s = '[';
4841 brac = '}';
4842 }
4843
4844 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4845 *s = TOUPPER (*s);
252b5132
RH		 4846
4847 if (*s == '\0' || s[1] != '\0')
4848 as_bad (_("bad symbol suffix"));
4849
4850 *s = ']';
4851 }
4852
4853 return name;
4854}
4855
4856/* Set the class of a symbol based on the suffix, if any. This is
4857 called whenever a new symbol is created. */
4858
4859void
98027b10 4860ppc_symbol_new_hook (symbolS *sym)
252b5132 4861{
809ffe0d 4862 struct ppc_tc_sy *tc;
252b5132
RH		 4863 const char *s;
4864
809ffe0d
ILT		 4865 tc = symbol_get_tc (sym);
4866 tc->next = NULL;
4867 tc->output = 0;
4868 tc->class = -1;
4869 tc->real_name = NULL;
4870 tc->subseg = 0;
4871 tc->align = 0;
4872 tc->size = NULL;
4873 tc->within = NULL;
252b5132
RH		 4874
4875 if (ppc_stab_symbol)
4876 return;
4877
4878 s = strchr (S_GET_NAME (sym), '[');
4879 if (s == (const char *) NULL)
4880 {
4881 /* There is no suffix. */
4882 return;
4883 }
4884
4885 ++s;
4886
4887 switch (s[0])
4888 {
4889 case 'B':
4890 if (strcmp (s, "BS]") == 0)
809ffe0d 4891 tc->class = XMC_BS;
252b5132
RH		 4892 break;
4893 case 'D':
4894 if (strcmp (s, "DB]") == 0)
809ffe0d 4895 tc->class = XMC_DB;
252b5132 4896 else if (strcmp (s, "DS]") == 0)
809ffe0d 4897 tc->class = XMC_DS;
252b5132
RH		 4898 break;
4899 case 'G':
4900 if (strcmp (s, "GL]") == 0)
809ffe0d 4901 tc->class = XMC_GL;
252b5132
RH		 4902 break;
4903 case 'P':
4904 if (strcmp (s, "PR]") == 0)
809ffe0d 4905 tc->class = XMC_PR;
252b5132
RH		 4906 break;
4907 case 'R':
4908 if (strcmp (s, "RO]") == 0)
809ffe0d 4909 tc->class = XMC_RO;
252b5132 4910 else if (strcmp (s, "RW]") == 0)
809ffe0d 4911 tc->class = XMC_RW;
252b5132
RH		 4912 break;
4913 case 'S':
4914 if (strcmp (s, "SV]") == 0)
809ffe0d 4915 tc->class = XMC_SV;
252b5132
RH		 4916 break;
4917 case 'T':
4918 if (strcmp (s, "TC]") == 0)
809ffe0d 4919 tc->class = XMC_TC;
252b5132 4920 else if (strcmp (s, "TI]") == 0)
809ffe0d 4921 tc->class = XMC_TI;
252b5132 4922 else if (strcmp (s, "TB]") == 0)
809ffe0d 4923 tc->class = XMC_TB;
252b5132 4924 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4925 tc->class = XMC_TC0;
252b5132
RH		 4926 break;
4927 case 'U':
4928 if (strcmp (s, "UA]") == 0)
809ffe0d 4929 tc->class = XMC_UA;
252b5132 4930 else if (strcmp (s, "UC]") == 0)
809ffe0d 4931 tc->class = XMC_UC;
252b5132
RH		 4932 break;
4933 case 'X':
4934 if (strcmp (s, "XO]") == 0)
809ffe0d 4935 tc->class = XMC_XO;
252b5132
RH		 4936 break;
4937 }
4938
809ffe0d 4939 if (tc->class == -1)
252b5132
RH		 4940 as_bad (_("Unrecognized symbol suffix"));
4941}
4942
4943/* Set the class of a label based on where it is defined. This
4944 handles symbols without suffixes. Also, move the symbol so that it
4945 follows the csect symbol. */
4946
4947void
98027b10 4948ppc_frob_label (symbolS *sym)
252b5132
RH		 4949{
4950 if (ppc_current_csect != (symbolS *) NULL)
4951 {
809ffe0d
ILT		 4952 if (symbol_get_tc (sym)->class == -1)
4953 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4954
4955 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4956 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4957 &symbol_rootP, &symbol_lastP);
4958 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4959 }
07a53e5c
RH		 4960
4961#ifdef OBJ_ELF
4962 dwarf2_emit_label (sym);
4963#endif
252b5132
RH		 4964}
4965
4966/* This variable is set by ppc_frob_symbol if any absolute symbols are
4967 seen. It tells ppc_adjust_symtab whether it needs to look through
4968 the symbols. */
4969
b34976b6 4970static bfd_boolean ppc_saw_abs;
252b5132
RH		 4971
4972/* Change the name of a symbol just before writing it out. Set the
4973 real name if the .rename pseudo-op was used. Otherwise, remove any
4974 class suffix. Return 1 if the symbol should not be included in the
4975 symbol table. */
4976
4977int
98027b10 4978ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4979{
4980 static symbolS *ppc_last_function;
4981 static symbolS *set_end;
4982
4983 /* Discard symbols that should not be included in the output symbol
4984 table. */
809ffe0d
ILT		 4985 if (! symbol_used_in_reloc_p (sym)
4986 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4987 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4988 && ! symbol_get_tc (sym)->output
252b5132
RH		 4989 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4990 return 1;
4991
a161fe53
AM		 4992 /* This one will disappear anyway. Don't make a csect sym for it. */
4993 if (sym == abs_section_sym)
4994 return 1;
4995
809ffe0d
ILT		 4996 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4997 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4998 else
4999 {
5000 const char *name;
5001 const char *s;
5002
5003 name = S_GET_NAME (sym);
5004 s = strchr (name, '[');
5005 if (s != (char *) NULL)
5006 {
5007 unsigned int len;
5008 char *snew;
5009
5010 len = s - name;
5011 snew = xmalloc (len + 1);
5012 memcpy (snew, name, len);
5013 snew[len] = '\0';
5014
5015 S_SET_NAME (sym, snew);
5016 }
5017 }
5018
5019 if (set_end != (symbolS *) NULL)
5020 {
5021 SA_SET_SYM_ENDNDX (set_end, sym);
5022 set_end = NULL;
5023 }
5024
5025 if (SF_GET_FUNCTION (sym))
5026 {
5027 if (ppc_last_function != (symbolS *) NULL)
5028 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5029 ppc_last_function = sym;
809ffe0d 5030 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5031 {
6386f3a7 5032 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5033 SA_SET_SYM_FSIZE (sym,
5034 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5035 }
5036 }
5037 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5038 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5039 {
5040 if (ppc_last_function == (symbolS *) NULL)
5041 as_bad (_(".ef with no preceding .function"));
5042 else
5043 {
5044 set_end = ppc_last_function;
5045 ppc_last_function = NULL;
5046
5047 /* We don't have a C_EFCN symbol, but we need to force the
5048 COFF backend to believe that it has seen one. */
5049 coff_last_function = NULL;
5050 }
5051 }
5052
670ec21d 5053 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5054 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5055 && S_GET_STORAGE_CLASS (sym) != C_FILE
5056 && S_GET_STORAGE_CLASS (sym) != C_FCN
5057 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5058 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5059 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5060 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5061 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5062 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5063 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5064
5065 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5066 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5067 {
5068 int i;
5069 union internal_auxent *a;
5070
5071 /* Create a csect aux. */
5072 i = S_GET_NUMBER_AUXILIARY (sym);
5073 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5074 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5075 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5076 {
5077 /* This is the TOC table. */
5078 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5079 a->x_csect.x_scnlen.l = 0;
5080 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5081 }
809ffe0d 5082 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5083 {
5084 /* This is a csect symbol. x_scnlen is the size of the
5085 csect. */
809ffe0d 5086 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5087 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5088 S_GET_SEGMENT (sym))
5089 - S_GET_VALUE (sym));
5090 else
5091 {
6386f3a7 5092 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5093 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5094 - S_GET_VALUE (sym));
5095 }
809ffe0d 5096 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5097 }
5098 else if (S_GET_SEGMENT (sym) == bss_section)
5099 {
5100 /* This is a common symbol. */
809ffe0d
ILT		 5101 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5102 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5103 if (S_IS_EXTERNAL (sym))
809ffe0d 5104 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5105 else
809ffe0d 5106 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5107 }
5108 else if (S_GET_SEGMENT (sym) == absolute_section)
5109 {
5110 /* This is an absolute symbol. The csect will be created by
99a814a1 5111 ppc_adjust_symtab. */
b34976b6 5112 ppc_saw_abs = TRUE;
252b5132 5113 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5114 if (symbol_get_tc (sym)->class == -1)
5115 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5116 }
5117 else if (! S_IS_DEFINED (sym))
5118 {
5119 /* This is an external symbol. */
5120 a->x_csect.x_scnlen.l = 0;
5121 a->x_csect.x_smtyp = XTY_ER;
5122 }
809ffe0d 5123 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5124 {
5125 symbolS *next;
5126
5127 /* This is a TOC definition. x_scnlen is the size of the
5128 TOC entry. */
5129 next = symbol_next (sym);
809ffe0d 5130 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5131 next = symbol_next (next);
5132 if (next == (symbolS *) NULL
809ffe0d 5133 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5134 {
5135 if (ppc_after_toc_frag == (fragS *) NULL)
5136 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5137 data_section)
5138 - S_GET_VALUE (sym));
5139 else
5140 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5141 - S_GET_VALUE (sym));
5142 }
5143 else
5144 {
6386f3a7 5145 resolve_symbol_value (next);
252b5132
RH		 5146 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5147 - S_GET_VALUE (sym));
5148 }
5149 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5150 }
5151 else
5152 {
5153 symbolS *csect;
5154
5155 /* This is a normal symbol definition. x_scnlen is the
5156 symbol index of the containing csect. */
5157 if (S_GET_SEGMENT (sym) == text_section)
5158 csect = ppc_text_csects;
5159 else if (S_GET_SEGMENT (sym) == data_section)
5160 csect = ppc_data_csects;
5161 else
5162 abort ();
5163
5164 /* Skip the initial dummy symbol. */
809ffe0d 5165 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5166
5167 if (csect == (symbolS *) NULL)
5168 {
5169 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5170 a->x_csect.x_scnlen.l = 0;
5171 }
5172 else
5173 {
809ffe0d 5174 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5175 {
6386f3a7 5176 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5177 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5178 > S_GET_VALUE (sym))
252b5132 5179 break;
809ffe0d 5180 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5181 }
5182
809ffe0d
ILT		 5183 a->x_csect.x_scnlen.p =
5184 coffsymbol (symbol_get_bfdsym (csect))->native;
5185 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5186 1;
252b5132
RH		 5187 }
5188 a->x_csect.x_smtyp = XTY_LD;
5189 }
81d4177b 5190
252b5132
RH		 5191 a->x_csect.x_parmhash = 0;
5192 a->x_csect.x_snhash = 0;
809ffe0d 5193 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5194 a->x_csect.x_smclas = XMC_PR;
5195 else
809ffe0d 5196 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5197 a->x_csect.x_stab = 0;
5198 a->x_csect.x_snstab = 0;
5199
5200 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5201 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5202 }
5203 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5204 {
5205 /* We want the value to be the symbol index of the referenced
5206 csect symbol. BFD will do that for us if we set the right
5207 flags. */
b782de16
AM		 5208 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5209 combined_entry_type *c = coffsymbol (bsym)->native;
5210
5211 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5212 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5213 }
5214 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5215 {
5216 symbolS *block;
5217 symbolS *csect;
5218
5219 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5220 block = symbol_get_tc (sym)->within;
5221 csect = symbol_get_tc (block)->within;
6386f3a7 5222 resolve_symbol_value (csect);
252b5132
RH		 5223 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5224 }
5225 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5226 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5227 {
5228 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5229 BFD will do that for us if we set the right flags. We have
5230 already set the value correctly. */
809ffe0d 5231 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5232 }
5233
5234 return 0;
5235}
5236
5237/* Adjust the symbol table. This creates csect symbols for all
5238 absolute symbols. */
5239
5240void
98027b10 5241ppc_adjust_symtab (void)
252b5132
RH		 5242{
5243 symbolS *sym;
5244
5245 if (! ppc_saw_abs)
5246 return;
5247
5248 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5249 {
5250 symbolS *csect;
5251 int i;
5252 union internal_auxent *a;
5253
5254 if (S_GET_SEGMENT (sym) != absolute_section)
5255 continue;
5256
5257 csect = symbol_create (".abs[XO]", absolute_section,
5258 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5259 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5260 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5261 i = S_GET_NUMBER_AUXILIARY (csect);
5262 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5263 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5264 a->x_csect.x_scnlen.l = 0;
5265 a->x_csect.x_smtyp = XTY_SD;
5266 a->x_csect.x_parmhash = 0;
5267 a->x_csect.x_snhash = 0;
5268 a->x_csect.x_smclas = XMC_XO;
5269 a->x_csect.x_stab = 0;
5270 a->x_csect.x_snstab = 0;
5271
5272 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5273
5274 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5275 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5276 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5277 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5278 }
5279
b34976b6 5280 ppc_saw_abs = FALSE;
252b5132
RH		 5281}
5282
5283/* Set the VMA for a section. This is called on all the sections in
5284 turn. */
5285
5286void
98027b10 5287ppc_frob_section (asection *sec)
252b5132 5288{
931e13a6 5289 static bfd_vma vma = 0;
252b5132 5290
931e13a6 5291 vma = md_section_align (sec, vma);
252b5132
RH		 5292 bfd_set_section_vma (stdoutput, sec, vma);
5293 vma += bfd_section_size (stdoutput, sec);
5294}
5295
5296#endif /* OBJ_XCOFF */
5297\f
252b5132 5298char *
98027b10 5299md_atof (int type, char *litp, int *sizep)
252b5132 5300{
499ac353 5301 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5302}
5303
5304/* Write a value out to the object file, using the appropriate
5305 endianness. */
5306
5307void
98027b10 5308md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5309{
5310 if (target_big_endian)
5311 number_to_chars_bigendian (buf, val, n);
5312 else
5313 number_to_chars_littleendian (buf, val, n);
5314}
5315
5316/* Align a section (I don't know why this is machine dependent). */
5317
5318valueT
3aeeedbb 5319md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5320{
3aeeedbb
AM		 5321#ifdef OBJ_ELF
5322 return addr;
5323#else
252b5132
RH		 5324 int align = bfd_get_section_alignment (stdoutput, seg);
5325
5326 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5327#endif
252b5132
RH		 5328}
5329
5330/* We don't have any form of relaxing. */
5331
5332int
98027b10
AM		 5333md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5334 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5335{
5336 abort ();
5337 return 0;
5338}
5339
5340/* Convert a machine dependent frag. We never generate these. */
5341
5342void
98027b10
AM		 5343md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5344 asection *sec ATTRIBUTE_UNUSED,
5345 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5346{
5347 abort ();
5348}
5349
5350/* We have no need to default values of symbols. */
5351
252b5132 5352symbolS *
98027b10 5353md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5354{
5355 return 0;
5356}
5357\f
5358/* Functions concerning relocs. */
5359
5360/* The location from which a PC relative jump should be calculated,
5361 given a PC relative reloc. */
5362
5363long
98027b10 5364md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5365{
5366 return fixp->fx_frag->fr_address + fixp->fx_where;
5367}
5368
5369#ifdef OBJ_XCOFF
5370
5371/* This is called to see whether a fixup should be adjusted to use a
5372 section symbol. We take the opportunity to change a fixup against
5373 a symbol in the TOC subsegment into a reloc against the
5374 corresponding .tc symbol. */
5375
5376int
98027b10 5377ppc_fix_adjustable (fixS *fix)
252b5132 5378{
b782de16
AM		 5379 valueT val = resolve_symbol_value (fix->fx_addsy);
5380 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5381 TC_SYMFIELD_TYPE *tc;
5382
5383 if (symseg == absolute_section)
5384 return 0;
252b5132 5385
252b5132 5386 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5387 && fix->fx_addsy != ppc_toc_csect
b782de16 5388 && symseg == data_section
252b5132
RH		 5389 && val >= ppc_toc_frag->fr_address
5390 && (ppc_after_toc_frag == (fragS *) NULL
5391 || val < ppc_after_toc_frag->fr_address))
5392 {
5393 symbolS *sy;
5394
5395 for (sy = symbol_next (ppc_toc_csect);
5396 sy != (symbolS *) NULL;
5397 sy = symbol_next (sy))
5398 {
b782de16
AM		 5399 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5400
5401 if (sy_tc->class == XMC_TC0)
252b5132 5402 continue;
b782de16 5403 if (sy_tc->class != XMC_TC)
252b5132 5404 break;
b782de16 5405 if (val == resolve_symbol_value (sy))
252b5132
RH		 5406 {
5407 fix->fx_addsy = sy;
5408 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5409 return 0;
5410 }
5411 }
5412
5413 as_bad_where (fix->fx_file, fix->fx_line,
5414 _("symbol in .toc does not match any .tc"));
5415 }
5416
5417 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5418 tc = symbol_get_tc (fix->fx_addsy);
5419 if (tc->subseg == 0
5420 && tc->class != XMC_TC0
5421 && tc->class != XMC_TC
5422 && symseg != bss_section
252b5132 5423 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5424 && (symseg != data_section
252b5132
RH		 5425 || ppc_toc_csect == NULL
5426 || val < ppc_toc_frag->fr_address
5427 || (ppc_after_toc_frag != NULL
5428 && val >= ppc_after_toc_frag->fr_address)))
5429 {
5430 symbolS *csect;
b782de16 5431 symbolS *next_csect;
252b5132 5432
b782de16 5433 if (symseg == text_section)
252b5132 5434 csect = ppc_text_csects;
b782de16 5435 else if (symseg == data_section)
252b5132
RH		 5436 csect = ppc_data_csects;
5437 else
5438 abort ();
5439
5440 /* Skip the initial dummy symbol. */
809ffe0d 5441 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5442
5443 if (csect != (symbolS *) NULL)
5444 {
b782de16
AM		 5445 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5446 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5447 {
5448 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5449 have to look through the full symbol table to see
5450 whether this is the csect we want. Note that we will
5451 only get here if the csect has zero length. */
b782de16
AM		 5452 if (symbol_get_frag (csect)->fr_address == val
5453 && S_GET_VALUE (csect) == val)
252b5132
RH		 5454 {
5455 symbolS *scan;
5456
809ffe0d 5457 for (scan = symbol_next (csect);
252b5132 5458 scan != NULL;
809ffe0d 5459 scan = symbol_next (scan))
252b5132 5460 {
809ffe0d 5461 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5462 break;
5463 if (scan == fix->fx_addsy)
5464 break;
5465 }
5466
5467 /* If we found the symbol before the next csect
99a814a1 5468 symbol, then this is the csect we want. */
252b5132
RH		 5469 if (scan == fix->fx_addsy)
5470 break;
5471 }
5472
b782de16 5473 csect = next_csect;
252b5132
RH		 5474 }
5475
b782de16 5476 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5477 fix->fx_addsy = csect;
5478 }
b782de16 5479 return 0;
252b5132
RH		 5480 }
5481
5482 /* Adjust a reloc against a .lcomm symbol to be against the base
5483 .lcomm. */
b782de16 5484 if (symseg == bss_section
252b5132
RH		 5485 && ! S_IS_EXTERNAL (fix->fx_addsy))
5486 {
b782de16
AM		 5487 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5488
5489 fix->fx_offset += val - resolve_symbol_value (sy);
5490 fix->fx_addsy = sy;
252b5132
RH		 5491 }
5492
5493 return 0;
5494}
5495
5496/* A reloc from one csect to another must be kept. The assembler
5497 will, of course, keep relocs between sections, and it will keep
5498 absolute relocs, but we need to force it to keep PC relative relocs
5499 between two csects in the same section. */
5500
5501int
98027b10 5502ppc_force_relocation (fixS *fix)
252b5132
RH		 5503{
5504 /* At this point fix->fx_addsy should already have been converted to
5505 a csect symbol. If the csect does not include the fragment, then
5506 we need to force the relocation. */
5507 if (fix->fx_pcrel
5508 && fix->fx_addsy != NULL
809ffe0d
ILT		 5509 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5510 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5511 > fix->fx_frag->fr_address)
5512 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5513 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5514 <= fix->fx_frag->fr_address))))
5515 return 1;
5516
ae6063d4 5517 return generic_force_reloc (fix);
252b5132
RH		 5518}
5519
5520#endif /* OBJ_XCOFF */
5521
0baf16f2 5522#ifdef OBJ_ELF
a161fe53
AM		 5523/* If this function returns non-zero, it guarantees that a relocation
5524 will be emitted for a fixup. */
5525
5526int
98027b10 5527ppc_force_relocation (fixS *fix)
a161fe53
AM		 5528{
5529 /* Branch prediction relocations must force a relocation, as must
5530 the vtable description relocs. */
5531 switch (fix->fx_r_type)
5532 {
5533 case BFD_RELOC_PPC_B16_BRTAKEN:
5534 case BFD_RELOC_PPC_B16_BRNTAKEN:
5535 case BFD_RELOC_PPC_BA16_BRTAKEN:
5536 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5537 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5538 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5539 return 1;
5540 default:
5541 break;
5542 }
5543
cdba85ec
AM		 5544 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5545 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5546 return 1;
5547
ae6063d4 5548 return generic_force_reloc (fix);
a161fe53
AM		 5549}
5550
0baf16f2 5551int
98027b10 5552ppc_fix_adjustable (fixS *fix)
252b5132 5553{
0baf16f2
AM		 5554 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5555 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5556 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5557 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5558 && fix->fx_r_type != BFD_RELOC_GPREL16
5559 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5560 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5561 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5562 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5563}
0baf16f2 5564#endif
252b5132 5565
3aeeedbb
AM		 5566/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5567 rs_align_code frag. */
5568
5569void
5570ppc_handle_align (struct frag *fragP)
5571{
5572 valueT count = (fragP->fr_next->fr_address
5573 - (fragP->fr_address + fragP->fr_fix));
5574
5575 if (count != 0 && (count & 3) == 0)
5576 {
5577 char *dest = fragP->fr_literal + fragP->fr_fix;
5578
5579 fragP->fr_var = 4;
5580 md_number_to_chars (dest, 0x60000000, 4);
5581
5582 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5583 {
5584 /* For power6, we want the last nop to be a group terminating
5585 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5586 immediately after this one, with its address set to the last
5587 nop location. This will automatically reduce the number of
5588 nops in the current frag by one. */
5589 if (count > 4)
5590 {
5591 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5592
5593 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5594 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5595 group_nop->fr_fix = 0;
5596 group_nop->fr_offset = 1;
5597 group_nop->fr_type = rs_fill;
5598 fragP->fr_next = group_nop;
5599 dest = group_nop->fr_literal;
5600 }
5601
5602 md_number_to_chars (dest, 0x60210000, 4);
5603 }
5604 }
5605}
5606
252b5132
RH		 5607/* Apply a fixup to the object code. This is called for all the
5608 fixups we generated by the call to fix_new_exp, above. In the call
5609 above we used a reloc code which was the largest legal reloc code
5610 plus the operand index. Here we undo that to recover the operand
5611 index. At this point all symbol values should be fully resolved,
5612 and we attempt to completely resolve the reloc. If we can not do
5613 that, we determine the correct reloc code and put it back in the
5614 fixup. */
5615
94f592af 5616void
98027b10 5617md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5618{
94f592af 5619 valueT value = * valP;
252b5132
RH		 5620
5621#ifdef OBJ_ELF
94f592af 5622 if (fixP->fx_addsy != NULL)
252b5132 5623 {
a161fe53 5624 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5625 if (fixP->fx_pcrel)
5626 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5627 }
5628 else
94f592af 5629 fixP->fx_done = 1;
252b5132 5630#else
a161fe53 5631 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5632 the symbol values. If we are doing this relocation the code in
5633 write.c is going to call bfd_install_relocation, which is also
5634 going to use the symbol value. That means that if the reloc is
5635 fully resolved we want to use *valP since bfd_install_relocation is
5636 not being used.
252b5132 5637 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5638 *valP, and must use fx_offset instead. However, if the reloc
5639 is PC relative, we do want to use *valP since it includes the
252b5132 5640 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5641 if (fixP->fx_addsy == (symbolS *) NULL)
5642 fixP->fx_done = 1;
5643
5644 else if (fixP->fx_pcrel)
5645 ;
5646
252b5132 5647 else
a161fe53
AM		 5648 value = fixP->fx_offset;
5649#endif
5650
5651 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5652 {
a161fe53
AM		 5653 /* We can't actually support subtracting a symbol. */
5654 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5655 }
252b5132 5656
94f592af 5657 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5658 {
5659 int opindex;
5660 const struct powerpc_operand *operand;
5661 char *where;
5662 unsigned long insn;
5663
94f592af 5664 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5665
5666 operand = &powerpc_operands[opindex];
5667
5668#ifdef OBJ_XCOFF
0baf16f2
AM		 5669 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5670 does not generate a reloc. It uses the offset of `sym' within its
5671 csect. Other usages, such as `.long sym', generate relocs. This
5672 is the documented behaviour of non-TOC symbols. */
252b5132 5673 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5674 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5675 && operand->shift == 0
2b3c4602 5676 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5677 && fixP->fx_addsy != NULL
5678 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5679 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5680 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5681 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5682 {
94f592af
NC		 5683 value = fixP->fx_offset;
5684 fixP->fx_done = 1;
252b5132
RH		 5685 }
5686#endif
5687
5688 /* Fetch the instruction, insert the fully resolved operand
5689 value, and stuff the instruction back again. */
94f592af 5690 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5691 if (target_big_endian)
5692 insn = bfd_getb32 ((unsigned char *) where);
5693 else
5694 insn = bfd_getl32 ((unsigned char *) where);
5695 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5696 fixP->tc_fix_data.ppc_cpu,
94f592af 5697 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5698 if (target_big_endian)
5699 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5700 else
5701 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5702
94f592af
NC		 5703 if (fixP->fx_done)
5704 /* Nothing else to do here. */
5705 return;
252b5132 5706
94f592af 5707 assert (fixP->fx_addsy != NULL);
0baf16f2 5708
252b5132
RH		 5709 /* Determine a BFD reloc value based on the operand information.
5710 We are only prepared to turn a few of the operands into
0baf16f2 5711 relocs. */
11b37b7b 5712 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5713 && operand->bitm == 0x3fffffc
11b37b7b 5714 && operand->shift == 0)
94f592af 5715 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5716 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5717 && operand->bitm == 0xfffc
11b37b7b 5718 && operand->shift == 0)
95210096
AM		 5719 {
5720 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5721#ifdef OBJ_XCOFF
5722 fixP->fx_size = 2;
5723 if (target_big_endian)
5724 fixP->fx_where += 2;
5725#endif
5726 }
11b37b7b 5727 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5728 && operand->bitm == 0x3fffffc
11b37b7b 5729 && operand->shift == 0)
94f592af 5730 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5731 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5732 && operand->bitm == 0xfffc
11b37b7b 5733 && operand->shift == 0)
95210096
AM		 5734 {
5735 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5736#ifdef OBJ_XCOFF
5737 fixP->fx_size = 2;
5738 if (target_big_endian)
5739 fixP->fx_where += 2;
5740#endif
5741 }
0baf16f2 5742#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5743 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5744 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5745 && operand->shift == 0)
11b37b7b 5746 {
a7fc733f
AM		 5747 if (ppc_is_toc_sym (fixP->fx_addsy))
5748 {
5749 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5750#ifdef OBJ_ELF
a7fc733f
AM		 5751 if (ppc_obj64
5752 && (operand->flags & PPC_OPERAND_DS) != 0)
5753 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5754#endif
5755 }
5756 else
5757 {
5758 fixP->fx_r_type = BFD_RELOC_16;
5759#ifdef OBJ_ELF
5760 if (ppc_obj64
5761 && (operand->flags & PPC_OPERAND_DS) != 0)
5762 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5763#endif
a7fc733f 5764 }
94f592af 5765 fixP->fx_size = 2;
11b37b7b 5766 if (target_big_endian)
94f592af 5767 fixP->fx_where += 2;
11b37b7b 5768 }
0baf16f2 5769#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5770 else
252b5132
RH		 5771 {
5772 char *sfile;
5773 unsigned int sline;
5774
5775 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5776 symbol. */
94f592af
NC		 5777 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5778 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5779 _("unresolved expression that must be resolved"));
5780 else
94f592af 5781 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5782 _("unsupported relocation against %s"),
94f592af
NC		 5783 S_GET_NAME (fixP->fx_addsy));
5784 fixP->fx_done = 1;
5785 return;
252b5132
RH		 5786 }
5787 }
5788 else
5789 {
5790#ifdef OBJ_ELF
94f592af 5791 ppc_elf_validate_fix (fixP, seg);
252b5132 5792#endif
94f592af 5793 switch (fixP->fx_r_type)
252b5132 5794 {
252b5132 5795 case BFD_RELOC_CTOR:
2b3c4602 5796 if (ppc_obj64)
9c7977b3
AM		 5797 goto ctor64;
5798 /* fall through */
5799
0baf16f2 5800 case BFD_RELOC_32:
94f592af
NC		 5801 if (fixP->fx_pcrel)
5802 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5803 /* fall through */
252b5132
RH		 5804
5805 case BFD_RELOC_RVA:
5806 case BFD_RELOC_32_PCREL:
252b5132 5807 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5808 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5809 value, 4);
5810 break;
5811
7f6d05e8 5812 case BFD_RELOC_64:
9c7977b3 5813 ctor64:
94f592af
NC		 5814 if (fixP->fx_pcrel)
5815 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5816 /* fall through */
0baf16f2 5817
7f6d05e8 5818 case BFD_RELOC_64_PCREL:
94f592af 5819 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5820 value, 8);
81d4177b 5821 break;
0baf16f2 5822
252b5132
RH		 5823 case BFD_RELOC_GPREL16:
5824 case BFD_RELOC_16_GOT_PCREL:
5825 case BFD_RELOC_16_GOTOFF:
5826 case BFD_RELOC_LO16_GOTOFF:
5827 case BFD_RELOC_HI16_GOTOFF:
5828 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5829 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5830 case BFD_RELOC_LO16_BASEREL:
5831 case BFD_RELOC_HI16_BASEREL:
5832 case BFD_RELOC_HI16_S_BASEREL:
5833 case BFD_RELOC_PPC_EMB_NADDR16:
5834 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5835 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5836 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5837 case BFD_RELOC_PPC_EMB_SDAI16:
5838 case BFD_RELOC_PPC_EMB_SDA2REL:
5839 case BFD_RELOC_PPC_EMB_SDA2I16:
5840 case BFD_RELOC_PPC_EMB_RELSEC16:
5841 case BFD_RELOC_PPC_EMB_RELST_LO:
5842 case BFD_RELOC_PPC_EMB_RELST_HI:
5843 case BFD_RELOC_PPC_EMB_RELST_HA:
5844 case BFD_RELOC_PPC_EMB_RELSDA:
5845 case BFD_RELOC_PPC_TOC16:
0baf16f2 5846#ifdef OBJ_ELF
0baf16f2
AM		 5847 case BFD_RELOC_PPC64_TOC16_LO:
5848 case BFD_RELOC_PPC64_TOC16_HI:
5849 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5850#endif
94f592af 5851 if (fixP->fx_pcrel)
252b5132 5852 {
94f592af
NC		 5853 if (fixP->fx_addsy != NULL)
5854 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5855 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5856 bfd_get_reloc_code_name (fixP->fx_r_type),
5857 S_GET_NAME (fixP->fx_addsy));
252b5132 5858 else
94f592af 5859 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5860 _("cannot emit PC relative %s relocation"),
94f592af 5861 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5862 }
5863
94f592af 5864 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5865 value, 2);
5866 break;
5867
3c9d25f4
AM		 5868 case BFD_RELOC_16:
5869 if (fixP->fx_pcrel)
5870 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5871 /* fall through */
5872
5873 case BFD_RELOC_16_PCREL:
5874 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5875 value, 2);
5876 break;
5877
5878 case BFD_RELOC_LO16:
5879 if (fixP->fx_pcrel)
5880 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5881 /* fall through */
5882
5883 case BFD_RELOC_LO16_PCREL:
5884 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5885 value, 2);
5886 break;
5887
252b5132
RH		 5888 /* This case happens when you write, for example,
5889 lis %r3,(L1-L2)@ha
5890 where L1 and L2 are defined later. */
5891 case BFD_RELOC_HI16:
94f592af 5892 if (fixP->fx_pcrel)
3c9d25f4
AM		 5893 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5894 /* fall through */
5895
5896 case BFD_RELOC_HI16_PCREL:
94f592af 5897 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5898 PPC_HI (value), 2);
252b5132 5899 break;
0baf16f2 5900
252b5132 5901 case BFD_RELOC_HI16_S:
94f592af 5902 if (fixP->fx_pcrel)
3c9d25f4
AM		 5903 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5904 /* fall through */
5905
5906 case BFD_RELOC_HI16_S_PCREL:
94f592af 5907 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5908 PPC_HA (value), 2);
5909 break;
5910
5911#ifdef OBJ_ELF
0baf16f2 5912 case BFD_RELOC_PPC64_HIGHER:
94f592af 5913 if (fixP->fx_pcrel)
0baf16f2 5914 abort ();
94f592af 5915 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5916 PPC_HIGHER (value), 2);
252b5132
RH		 5917 break;
5918
0baf16f2 5919 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5920 if (fixP->fx_pcrel)
0baf16f2 5921 abort ();
94f592af 5922 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5923 PPC_HIGHERA (value), 2);
5924 break;
5925
5926 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5927 if (fixP->fx_pcrel)
0baf16f2 5928 abort ();
94f592af 5929 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5930 PPC_HIGHEST (value), 2);
5931 break;
5932
5933 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5934 if (fixP->fx_pcrel)
0baf16f2 5935 abort ();
94f592af 5936 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5937 PPC_HIGHESTA (value), 2);
5938 break;
5939
5940 case BFD_RELOC_PPC64_ADDR16_DS:
5941 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5942 case BFD_RELOC_PPC64_GOT16_DS:
5943 case BFD_RELOC_PPC64_GOT16_LO_DS:
5944 case BFD_RELOC_PPC64_PLT16_LO_DS:
5945 case BFD_RELOC_PPC64_SECTOFF_DS:
5946 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5947 case BFD_RELOC_PPC64_TOC16_DS:
5948 case BFD_RELOC_PPC64_TOC16_LO_DS:
5949 case BFD_RELOC_PPC64_PLTGOT16_DS:
5950 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5951 if (fixP->fx_pcrel)
0baf16f2
AM		 5952 abort ();
5953 {
2132e3a3 5954 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5955 unsigned long val, mask;
0baf16f2
AM		 5956
5957 if (target_big_endian)
adadcc0c 5958 val = bfd_getb32 (where - 2);
0baf16f2 5959 else
adadcc0c
AM		 5960 val = bfd_getl32 (where);
5961 mask = 0xfffc;
5962 /* lq insns reserve the four lsbs. */
5963 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5964 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5965 mask = 0xfff0;
5966 val |= value & mask;
0baf16f2
AM		 5967 if (target_big_endian)
5968 bfd_putb16 ((bfd_vma) val, where);
5969 else
5970 bfd_putl16 ((bfd_vma) val, where);
5971 }
5972 break;
cdba85ec 5973
ba0b2174
AM		 5974 case BFD_RELOC_PPC_B16_BRTAKEN:
5975 case BFD_RELOC_PPC_B16_BRNTAKEN:
5976 case BFD_RELOC_PPC_BA16_BRTAKEN:
5977 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5978 break;
5979
cdba85ec 5980 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5981 break;
5982
cdba85ec
AM		 5983 case BFD_RELOC_PPC_DTPMOD:
5984 case BFD_RELOC_PPC_TPREL16:
5985 case BFD_RELOC_PPC_TPREL16_LO:
5986 case BFD_RELOC_PPC_TPREL16_HI:
5987 case BFD_RELOC_PPC_TPREL16_HA:
5988 case BFD_RELOC_PPC_TPREL:
5989 case BFD_RELOC_PPC_DTPREL16:
5990 case BFD_RELOC_PPC_DTPREL16_LO:
5991 case BFD_RELOC_PPC_DTPREL16_HI:
5992 case BFD_RELOC_PPC_DTPREL16_HA:
5993 case BFD_RELOC_PPC_DTPREL:
5994 case BFD_RELOC_PPC_GOT_TLSGD16:
5995 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5996 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5997 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5998 case BFD_RELOC_PPC_GOT_TLSLD16:
5999 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6000 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6001 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6002 case BFD_RELOC_PPC_GOT_TPREL16:
6003 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6004 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6005 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6006 case BFD_RELOC_PPC_GOT_DTPREL16:
6007 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6008 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6009 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6010 case BFD_RELOC_PPC64_TPREL16_DS:
6011 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6012 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6013 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6014 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6015 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6016 case BFD_RELOC_PPC64_DTPREL16_DS:
6017 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6018 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6019 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6020 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6021 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6022 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6023 break;
0baf16f2 6024#endif
252b5132 6025 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6026 bytes, rather than 2, so offset it here appropriately. */
252b5132 6027 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6028 if (fixP->fx_pcrel)
252b5132
RH		 6029 abort ();
6030
94f592af 6031 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6032 + ((target_big_endian) ? 2 : 0),
6033 value, 2);
6034 break;
6035
6036 case BFD_RELOC_8:
94f592af 6037 if (fixP->fx_pcrel)
31a91399
NC		 6038 {
6039 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6040 ".byte <undefined_symbol> - ." */
31a91399
NC		 6041 if (fixP->fx_addsy)
6042 as_bad (_("Unable to handle reference to symbol %s"),
6043 S_GET_NAME (fixP->fx_addsy));
6044 else
6045 as_bad (_("Unable to resolve expression"));
6046 fixP->fx_done = 1;
6047 }
6048 else
6049 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6050 value, 1);
252b5132
RH		 6051 break;
6052
6053 case BFD_RELOC_24_PLT_PCREL:
6054 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6055 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6056 abort ();
6057
94f592af 6058 if (fixP->fx_done)
99a814a1
AM		 6059 {
6060 char *where;
6061 unsigned long insn;
6062
6063 /* Fetch the instruction, insert the fully resolved operand
6064 value, and stuff the instruction back again. */
94f592af 6065 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6066 if (target_big_endian)
6067 insn = bfd_getb32 ((unsigned char *) where);
6068 else
6069 insn = bfd_getl32 ((unsigned char *) where);
6070 if ((value & 3) != 0)
94f592af 6071 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6072 _("must branch to an address a multiple of 4"));
6073 if ((offsetT) value < -0x40000000
6074 || (offsetT) value >= 0x40000000)
94f592af 6075 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6076 _("@local or @plt branch destination is too far away, %ld bytes"),
6077 (long) value);
6078 insn = insn | (value & 0x03fffffc);
6079 if (target_big_endian)
6080 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6081 else
6082 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6083 }
252b5132
RH		 6084 break;
6085
6086 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6087 fixP->fx_done = 0;
6088 if (fixP->fx_addsy
6089 && !S_IS_DEFINED (fixP->fx_addsy)
6090 && !S_IS_WEAK (fixP->fx_addsy))
6091 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6092 break;
6093
6094 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6095 fixP->fx_done = 0;
252b5132
RH		 6096 break;
6097
0baf16f2 6098#ifdef OBJ_ELF
0baf16f2
AM		 6099 /* Generated by reference to `sym@tocbase'. The sym is
6100 ignored by the linker. */
6101 case BFD_RELOC_PPC64_TOC:
94f592af 6102 fixP->fx_done = 0;
0baf16f2 6103 break;
0baf16f2 6104#endif
252b5132 6105 default:
bc805888 6106 fprintf (stderr,
94f592af 6107 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6108 fflush (stderr);
252b5132
RH		 6109 abort ();
6110 }
6111 }
6112
6113#ifdef OBJ_ELF
94f592af 6114 fixP->fx_addnumber = value;
4e6935a6
AM		 6115
6116 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6117 from the section contents. If we are going to be emitting a reloc
6118 then the section contents are immaterial, so don't warn if they
6119 happen to overflow. Leave such warnings to ld. */
6120 if (!fixP->fx_done)
6121 fixP->fx_no_overflow = 1;
252b5132 6122#else
94f592af
NC		 6123 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6124 fixP->fx_addnumber = 0;
252b5132
RH		 6125 else
6126 {
6127#ifdef TE_PE
94f592af 6128 fixP->fx_addnumber = 0;
252b5132 6129#else
8edcbfcd
TG		 6130 /* We want to use the offset within the toc, not the actual VMA
6131 of the symbol. */
94f592af 6132 fixP->fx_addnumber =
8edcbfcd
TG		 6133 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6134 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6135#endif
6136 }
6137#endif
252b5132
RH		 6138}
6139
6140/* Generate a reloc for a fixup. */
6141
6142arelent *
98027b10 6143tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6144{
6145 arelent *reloc;
6146
6147 reloc = (arelent *) xmalloc (sizeof (arelent));
6148
49309057
ILT		 6149 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6150 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6151 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6152 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6153 if (reloc->howto == (reloc_howto_type *) NULL)
6154 {
6155 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6156 _("reloc %d not supported by object file format"),
6157 (int) fixp->fx_r_type);
252b5132
RH		 6158 return NULL;
6159 }
6160 reloc->addend = fixp->fx_addnumber;
6161
6162 return reloc;
6163}
75e21f08
JJ		 6164
6165void
98027b10 6166ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6167{
6168 cfi_add_CFA_def_cfa (1, 0);
6169}
6170
6171int
1df69f4f 6172tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6173{
6174 unsigned int regnum = -1;
6175 unsigned int i;
6176 const char *p;
6177 char *q;
6178 static struct { char *name; int dw2regnum; } regnames[] =
6179 {
6180 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6181 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6182 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6183 { "spe_acc", 111 }, { "spefscr", 112 }
6184 };
6185
6186 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6187 if (strcmp (regnames[i].name, regname) == 0)
6188 return regnames[i].dw2regnum;
6189
6190 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6191 {
6192 p = regname + 1 + (regname[1] == '.');
6193 regnum = strtoul (p, &q, 10);
6194 if (p == q || *q || regnum >= 32)
6195 return -1;
6196 if (regname[0] == 'f')
b7d7dc63 6197 regnum += 32;
75e21f08 6198 else if (regname[0] == 'v')
b7d7dc63 6199 regnum += 77;
75e21f08
JJ		 6200 }
6201 else if (regname[0] == 'c' && regname[1] == 'r')
6202 {
6203 p = regname + 2 + (regname[2] == '.');
6204 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6205 return -1;
75e21f08
JJ		 6206 regnum = p[0] - '0' + 68;
6207 }
6208 return regnum;
6209}
GDB Binutils - Deliverables
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