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Remove redundant returns in void functions.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f
NC		 185
186/* '+' and '-' can be used as postfix predicate predictors for conditional
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
909 /* -mcom means assemble for the common intersection between Power
910 and PowerPC. At present, we just allow the union, rather
911 than the intersection. */
912 else if (strcmp (arg, "com") == 0)
913 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
914 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
915 else if (strcmp (arg, "any") == 0)
916 ppc_cpu |= PPC_OPCODE_ANY;
917 else
918 return 0;
919
920 return 1;
921}
922
252b5132
RH		 923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'u':
931 /* -u means that any undefined symbols should be treated as
932 external, which is the default for gas anyhow. */
933 break;
934
935#ifdef OBJ_ELF
936 case 'l':
937 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 938 sake, recognize -be also. */
252b5132
RH		 939 if (strcmp (arg, "e") == 0)
940 {
941 target_big_endian = 0;
942 set_target_endian = 1;
943 }
944 else
945 return 0;
946
947 break;
948
949 case 'b':
950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 1;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'K':
99a814a1 961 /* Recognize -K PIC. */
252b5132
RH		 962 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
963 {
964 shlib = SHLIB_PIC;
965 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
966 }
967 else
968 return 0;
969
970 break;
971#endif
972
7f6d05e8
CP		 973 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
974 case 'a':
975 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 976 {
977#ifdef BFD64
978 ppc_obj64 = 1;
979#else
980 as_fatal (_("%s unsupported"), "-a64");
981#endif
982 }
7f6d05e8 983 else if (strcmp (arg, "32") == 0)
2b3c4602 984 ppc_obj64 = 0;
7f6d05e8
CP		 985 else
986 return 0;
987 break;
81d4177b 988
252b5132 989 case 'm':
69c040df
AM		 990 if (parse_cpu (arg))
991 ;
252b5132
RH		 992
993 else if (strcmp (arg, "regnames") == 0)
b34976b6 994 reg_names_p = TRUE;
252b5132
RH		 995
996 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 997 reg_names_p = FALSE;
252b5132
RH		 998
999#ifdef OBJ_ELF
99a814a1
AM		 1000 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1001 that require relocation. */
252b5132
RH		 1002 else if (strcmp (arg, "relocatable") == 0)
1003 {
5d6f4f16 1004 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1005 ppc_flags |= EF_PPC_RELOCATABLE;
1006 }
1007
1008 else if (strcmp (arg, "relocatable-lib") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1011 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1012 }
1013
99a814a1 1014 /* -memb, set embedded bit. */
252b5132
RH		 1015 else if (strcmp (arg, "emb") == 0)
1016 ppc_flags |= EF_PPC_EMB;
1017
99a814a1
AM		 1018 /* -mlittle/-mbig set the endianess. */
1019 else if (strcmp (arg, "little") == 0
1020 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1021 {
1022 target_big_endian = 0;
1023 set_target_endian = 1;
1024 }
1025
1026 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1027 {
1028 target_big_endian = 1;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "solaris") == 0)
1033 {
b34976b6 1034 msolaris = TRUE;
252b5132
RH		 1035 ppc_comment_chars = ppc_solaris_comment_chars;
1036 }
1037
1038 else if (strcmp (arg, "no-solaris") == 0)
1039 {
b34976b6 1040 msolaris = FALSE;
252b5132
RH		 1041 ppc_comment_chars = ppc_eabi_comment_chars;
1042 }
1043#endif
1044 else
1045 {
1046 as_bad (_("invalid switch -m%s"), arg);
1047 return 0;
1048 }
1049 break;
1050
1051#ifdef OBJ_ELF
1052 /* -V: SVR4 argument to print version ID. */
1053 case 'V':
1054 print_version_id ();
1055 break;
1056
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 case 'Q':
1060 break;
1061
1062 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1063 rather than .stabs.excl, which is ignored by the linker.
1064 FIXME: Not implemented. */
1065 case 's':
1066 if (arg)
1067 return 0;
1068
1069 break;
1070#endif
1071
1072 default:
1073 return 0;
1074 }
1075
1076 return 1;
1077}
1078
1079void
1080md_show_usage (stream)
1081 FILE *stream;
1082{
bc805888 1083 fprintf (stream, _("\
252b5132 1084PowerPC options:\n\
df12615d
AM		 1085-a32 generate ELF32/XCOFF32\n\
1086-a64 generate ELF64/XCOFF64\n\
252b5132 1087-u ignored\n\
23e1d84c
AM		 1088-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1089-mpwr generate code for POWER (RIOS1)\n\
1090-m601 generate code for PowerPC 601\n\
418c1742 1091-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1092 generate code for PowerPC 603/604\n\
df12615d 1093-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1094-m440 generate code for PowerPC 440\n\
f5c120c5 1095-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1096 generate code For PowerPC 7400/7410/7450/7455\n"));
1097 fprintf (stream, _("\
23e1d84c 1098-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1099-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1100-mbooke64 generate code for 64-bit PowerPC BookE\n\
1101-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1102-mpower4 generate code for Power4 architecture\n\
252b5132 1103-mcom generate code Power/PowerPC common instructions\n\
df12615d 1104-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1105 fprintf (stream, _("\
df12615d 1106-maltivec generate code for AltiVec\n\
6a0c61b7 1107-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1108-mspe generate code for Motorola SPE instructions\n\
1109-mregnames Allow symbolic names for registers\n\
1110-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1111#ifdef OBJ_ELF
bc805888 1112 fprintf (stream, _("\
252b5132
RH		 1113-mrelocatable support for GCC's -mrelocatble option\n\
1114-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1115-memb set PPC_EMB bit in ELF flags\n\
df12615d 1116-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1117 generate code for a little endian machine\n\
df12615d
AM		 1118-mbig, -mbig-endian, -b, -be\n\
1119 generate code for a big endian machine\n\
252b5132
RH		 1120-msolaris generate code for Solaris\n\
1121-mno-solaris do not generate code for Solaris\n\
1122-V print assembler version number\n\
1123-Qy, -Qn ignored\n"));
1124#endif
1125}
1126\f
1127/* Set ppc_cpu if it is not already set. */
1128
1129static void
1130ppc_set_cpu ()
1131{
1132 const char *default_os = TARGET_OS;
1133 const char *default_cpu = TARGET_CPU;
1134
3c9030c1 1135 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1136 {
2a98c3a6 1137 if (ppc_obj64)
3c9030c1 1138 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1139 else if (strncmp (default_os, "aix", 3) == 0
1140 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1141 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1142 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1144 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1146 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1147 {
1148 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1150 else
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1152 }
252b5132 1153 else
99a814a1
AM		 1154 as_fatal (_("Unknown default cpu = %s, os = %s"),
1155 default_cpu, default_os);
252b5132
RH		 1156 }
1157}
1158
1159/* Figure out the BFD architecture to use. */
1160
1161enum bfd_architecture
1162ppc_arch ()
1163{
1164 const char *default_cpu = TARGET_CPU;
1165 ppc_set_cpu ();
1166
1167 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1168 return bfd_arch_powerpc;
1169 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1170 return bfd_arch_rs6000;
1171 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1172 {
1173 if (strcmp (default_cpu, "rs6000") == 0)
1174 return bfd_arch_rs6000;
0baf16f2 1175 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1176 return bfd_arch_powerpc;
1177 }
1178
1179 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1180 return bfd_arch_unknown;
1181}
1182
7f6d05e8
CP		 1183unsigned long
1184ppc_mach ()
1185{
2a98c3a6
AM		 1186 if (ppc_obj64)
1187 return bfd_mach_ppc64;
1188 else if (ppc_arch () == bfd_arch_rs6000)
1189 return bfd_mach_rs6k;
1190 else
1191 return bfd_mach_ppc;
7f6d05e8
CP		 1192}
1193
81d4177b 1194extern char*
99a814a1 1195ppc_target_format ()
7f6d05e8
CP		 1196{
1197#ifdef OBJ_COFF
1198#ifdef TE_PE
99a814a1 1199 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1200#elif TE_POWERMAC
0baf16f2 1201 return "xcoff-powermac";
7f6d05e8 1202#else
eb1e0e80 1203# ifdef TE_AIX5
2b3c4602 1204 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1205# else
2b3c4602 1206 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1207# endif
7f6d05e8 1208#endif
7f6d05e8
CP		 1209#endif
1210#ifdef OBJ_ELF
0baf16f2 1211 return (target_big_endian
2b3c4602
AM		 1212 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1213 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1214#endif
1215}
1216
69c040df
AM		 1217/* Insert opcodes and macros into hash tables. Called at startup and
1218 for .cpu pseudo. */
252b5132 1219
69c040df
AM		 1220static void
1221ppc_setup_opcodes (void)
252b5132
RH		 1222{
1223 register const struct powerpc_opcode *op;
1224 const struct powerpc_opcode *op_end;
1225 const struct powerpc_macro *macro;
1226 const struct powerpc_macro *macro_end;
b34976b6 1227 bfd_boolean dup_insn = FALSE;
252b5132 1228
69c040df
AM		 1229 if (ppc_hash != NULL)
1230 hash_die (ppc_hash);
1231 if (ppc_macro_hash != NULL)
1232 hash_die (ppc_macro_hash);
252b5132
RH		 1233
1234 /* Insert the opcodes into a hash table. */
1235 ppc_hash = hash_new ();
1236
1237 op_end = powerpc_opcodes + powerpc_num_opcodes;
1238 for (op = powerpc_opcodes; op < op_end; op++)
1239 {
1240 know ((op->opcode & op->mask) == op->opcode);
1241
2b3c4602 1242 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1243 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1244 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1245 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1246 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1247 /* Certain instructions (eg: extsw) do not exist in the
1248 32-bit BookE instruction set, but they do exist in the
1249 64-bit BookE instruction set, and other PPC instruction
1250 sets. Check to see if the opcode has the BOOKE64 flag set.
1251 If it does make sure that the target CPU is not the BookE32. */
1252 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1253 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1254 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1255 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1256 || ((op->flags & PPC_OPCODE_POWER4)
1257 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1258 {
1259 const char *retval;
1260
1261 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1262 if (retval != NULL)
252b5132 1263 {
99a814a1 1264 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1265 if ((ppc_cpu & PPC_OPCODE_601) != 0
1266 && (op->flags & PPC_OPCODE_POWER) != 0)
1267 continue;
1268
99a814a1
AM		 1269 as_bad (_("Internal assembler error for instruction %s"),
1270 op->name);
b34976b6 1271 dup_insn = TRUE;
252b5132
RH		 1272 }
1273 }
1274 }
1275
3c9030c1
AM		 1276 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1277 for (op = powerpc_opcodes; op < op_end; op++)
1278 hash_insert (ppc_hash, op->name, (PTR) op);
1279
252b5132
RH		 1280 /* Insert the macros into a hash table. */
1281 ppc_macro_hash = hash_new ();
1282
1283 macro_end = powerpc_macros + powerpc_num_macros;
1284 for (macro = powerpc_macros; macro < macro_end; macro++)
1285 {
1286 if ((macro->flags & ppc_cpu) != 0)
1287 {
1288 const char *retval;
1289
1290 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1291 if (retval != (const char *) NULL)
1292 {
1293 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1294 dup_insn = TRUE;
252b5132
RH		 1295 }
1296 }
1297 }
1298
1299 if (dup_insn)
1300 abort ();
69c040df
AM		 1301}
1302
1303/* This function is called when the assembler starts up. It is called
1304 after the options have been parsed and the output file has been
1305 opened. */
1306
1307void
1308md_begin ()
1309{
1310 ppc_set_cpu ();
1311
1312 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1313
1314#ifdef OBJ_ELF
1315 /* Set the ELF flags if desired. */
1316 if (ppc_flags && !msolaris)
1317 bfd_set_private_flags (stdoutput, ppc_flags);
1318#endif
1319
1320 ppc_setup_opcodes ();
252b5132 1321
67c1ffbe 1322 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1323 by the user. */
252b5132
RH		 1324 if (!set_target_endian)
1325 {
1326 set_target_endian = 1;
1327 target_big_endian = PPC_BIG_ENDIAN;
1328 }
1329
1330#ifdef OBJ_XCOFF
1331 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1332
1333 /* Create dummy symbols to serve as initial csects. This forces the
1334 text csects to precede the data csects. These symbols will not
1335 be output. */
1336 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1337 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1338 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1339 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1340#endif
1341
1342#ifdef TE_PE
1343
1344 ppc_current_section = text_section;
81d4177b 1345 ppc_previous_section = 0;
252b5132
RH		 1346
1347#endif
1348}
1349
6a0c61b7
EZ		 1350void
1351ppc_cleanup ()
1352{
dc1d03fc 1353#ifdef OBJ_ELF
6a0c61b7
EZ		 1354 if (ppc_apuinfo_list == NULL)
1355 return;
1356
1357 /* Ok, so write the section info out. We have this layout:
1358
1359 byte data what
1360 ---- ---- ----
1361 0 8 length of "APUinfo\0"
1362 4 (n*4) number of APU's (4 bytes each)
1363 8 2 note type 2
1364 12 "APUinfo\0" name
1365 20 APU#1 first APU's info
1366 24 APU#2 second APU's info
1367 ... ...
1368 */
1369 {
1370 char *p;
1371 asection *seg = now_seg;
1372 subsegT subseg = now_subseg;
1373 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1374 unsigned int i;
6a0c61b7
EZ		 1375
1376 /* Create the .PPC.EMB.apuinfo section. */
1377 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1378 bfd_set_section_flags (stdoutput,
1379 apuinfo_secp,
e1a9cb8e 1380 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1381
1382 p = frag_more (4);
1383 md_number_to_chars (p, (valueT) 8, 4);
1384
1385 p = frag_more (4);
e98d298c 1386 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1387
1388 p = frag_more (4);
1389 md_number_to_chars (p, (valueT) 2, 4);
1390
1391 p = frag_more (8);
1392 strcpy (p, "APUinfo");
1393
1394 for (i = 0; i < ppc_apuinfo_num; i++)
1395 {
b34976b6
AM		 1396 p = frag_more (4);
1397 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1398 }
1399
1400 frag_align (2, 0, 0);
1401
1402 /* We probably can't restore the current segment, for there likely
1403 isn't one yet... */
1404 if (seg && subseg)
1405 subseg_set (seg, subseg);
1406 }
dc1d03fc 1407#endif
6a0c61b7
EZ		 1408}
1409
252b5132
RH		 1410/* Insert an operand value into an instruction. */
1411
1412static unsigned long
1413ppc_insert_operand (insn, operand, val, file, line)
1414 unsigned long insn;
1415 const struct powerpc_operand *operand;
1416 offsetT val;
1417 char *file;
1418 unsigned int line;
1419{
1420 if (operand->bits != 32)
1421 {
1422 long min, max;
1423 offsetT test;
1424
1425 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1426 {
d0e9a01c 1427 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1428 max = (1 << operand->bits) - 1;
1429 else
1430 max = (1 << (operand->bits - 1)) - 1;
1431 min = - (1 << (operand->bits - 1));
1432
2b3c4602 1433 if (!ppc_obj64)
252b5132
RH		 1434 {
1435 /* Some people write 32 bit hex constants with the sign
1436 extension done by hand. This shouldn't really be
1437 valid, but, to permit this code to assemble on a 64
1438 bit host, we sign extend the 32 bit value. */
1439 if (val > 0
92161534
ILT		 1440 && (val & (offsetT) 0x80000000) != 0
1441 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1442 {
1443 val -= 0x80000000;
1444 val -= 0x80000000;
1445 }
1446 }
1447 }
1448 else
1449 {
1450 max = (1 << operand->bits) - 1;
1451 min = 0;
1452 }
1453
1454 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1455 test = - val;
1456 else
1457 test = val;
1458
1459 if (test < (offsetT) min || test > (offsetT) max)
1460 {
1461 const char *err =
1462 _("operand out of range (%s not between %ld and %ld)");
1463 char buf[100];
1464
1465 sprint_value (buf, test);
0baf16f2 1466 as_bad_where (file, line, err, buf, min, max);
252b5132
RH		 1467 }
1468 }
1469
1470 if (operand->insert)
1471 {
1472 const char *errmsg;
1473
1474 errmsg = NULL;
2b3c4602 1475 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1476 if (errmsg != (const char *) NULL)
0baf16f2 1477 as_bad_where (file, line, errmsg);
252b5132
RH		 1478 }
1479 else
1480 insn |= (((long) val & ((1 << operand->bits) - 1))
1481 << operand->shift);
1482
1483 return insn;
1484}
1485
1486\f
1487#ifdef OBJ_ELF
1488/* Parse @got, etc. and return the desired relocation. */
1489static bfd_reloc_code_real_type
1490ppc_elf_suffix (str_p, exp_p)
1491 char **str_p;
1492 expressionS *exp_p;
1493{
1494 struct map_bfd {
1495 char *string;
1496 int length;
15c1449b 1497 int reloc;
252b5132
RH		 1498 };
1499
1500 char ident[20];
1501 char *str = *str_p;
1502 char *str2;
1503 int ch;
1504 int len;
15c1449b 1505 const struct map_bfd *ptr;
252b5132 1506
bc805888 1507#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1508
15c1449b 1509 static const struct map_bfd mapping[] = {
cdba85ec
AM		 1510 MAP ("l", (int) BFD_RELOC_LO16),
1511 MAP ("h", (int) BFD_RELOC_HI16),
1512 MAP ("ha", (int) BFD_RELOC_HI16_S),
1513 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1514 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1515 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1516 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1517 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1518 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1519 MAP ("fixup", (int) BFD_RELOC_CTOR),
1520 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1521 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1522 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1523 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1524 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1525 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1526 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1527 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1528 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1529 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1530 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1531 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1532 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1533 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1534 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1535 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1536 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1537 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1538 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1539 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1540 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1541 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1542 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1543 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1544 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1545 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1546 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1547 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1548 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1549 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1550 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1551 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1552 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1553 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1554 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1555 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1556 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1557 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1558 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1559 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1560 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1561 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1562 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1563 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1564 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1565 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1566 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1567 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1568 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1569 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1570 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1571 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1572 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1573 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1574 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1575 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1576 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1577 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM		 1578 /* The following are only valid for ppc64. Negative values are
1579 used instead of a flag. */
cdba85ec
AM		 1580 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1581 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1582 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1583 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1584 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1585 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1586 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1587 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1588 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1589 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1590 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1591 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1592 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1593 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1594 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1595 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1596 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1597 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH		 1598 };
1599
1600 if (*str++ != '@')
1601 return BFD_RELOC_UNUSED;
1602
1603 for (ch = *str, str2 = ident;
1604 (str2 < ident + sizeof (ident) - 1
3882b010 1605 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1606 ch = *++str)
1607 {
3882b010 1608 *str2++ = TOLOWER (ch);
252b5132
RH		 1609 }
1610
1611 *str2 = '\0';
1612 len = str2 - ident;
1613
1614 ch = ident[0];
1615 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1616 if (ch == ptr->string[0]
1617 && len == ptr->length
1618 && memcmp (ident, ptr->string, ptr->length) == 0)
1619 {
15c1449b
AM		 1620 int reloc = ptr->reloc;
1621
2b3c4602 1622 if (reloc < 0)
15c1449b 1623 {
2b3c4602 1624 if (!ppc_obj64)
15c1449b
AM		 1625 return BFD_RELOC_UNUSED;
1626 reloc = -reloc;
1627 }
1628
cdba85ec 1629 if (!ppc_obj64)
5f6db75a
AM		 1630 if (exp_p->X_add_number != 0
1631 && (reloc == (int) BFD_RELOC_16_GOTOFF
1632 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1633 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1634 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1635 as_warn (_("identifier+constant@got means identifier@got+constant"));
1636
1637 /* Now check for identifier@suffix+constant. */
1638 if (*str == '-' || *str == '+')
252b5132 1639 {
5f6db75a
AM		 1640 char *orig_line = input_line_pointer;
1641 expressionS new_exp;
1642
1643 input_line_pointer = str;
1644 expression (&new_exp);
1645 if (new_exp.X_op == O_constant)
252b5132 1646 {
5f6db75a
AM		 1647 exp_p->X_add_number += new_exp.X_add_number;
1648 str = input_line_pointer;
252b5132 1649 }
5f6db75a
AM		 1650
1651 if (&input_line_pointer != str_p)
1652 input_line_pointer = orig_line;
252b5132 1653 }
252b5132 1654 *str_p = str;
0baf16f2 1655
2b3c4602 1656 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1657 && exp_p->X_op == O_symbol
1658 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1659 {
9f2b53d7
AM		 1660 /* Change the symbol so that the dummy .TOC. symbol can be
1661 omitted from the object file. */
0baf16f2
AM		 1662 exp_p->X_add_symbol = &abs_symbol;
1663 }
1664
15c1449b 1665 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1666 }
1667
1668 return BFD_RELOC_UNUSED;
1669}
1670
99a814a1
AM		 1671/* Like normal .long/.short/.word, except support @got, etc.
1672 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1673static void
1674ppc_elf_cons (nbytes)
0baf16f2 1675 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1676{
1677 expressionS exp;
1678 bfd_reloc_code_real_type reloc;
1679
1680 if (is_it_end_of_statement ())
1681 {
1682 demand_empty_rest_of_line ();
1683 return;
1684 }
1685
1686 do
1687 {
1688 expression (&exp);
1689 if (exp.X_op == O_symbol
1690 && *input_line_pointer == '@'
99a814a1
AM		 1691 && (reloc = ppc_elf_suffix (&input_line_pointer,
1692 &exp)) != BFD_RELOC_UNUSED)
252b5132 1693 {
99a814a1
AM		 1694 reloc_howto_type *reloc_howto;
1695 int size;
1696
1697 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1698 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1699
1700 if (size > nbytes)
0baf16f2
AM		 1701 {
1702 as_bad (_("%s relocations do not fit in %d bytes\n"),
1703 reloc_howto->name, nbytes);
1704 }
252b5132
RH		 1705 else
1706 {
0baf16f2
AM		 1707 char *p;
1708 int offset;
252b5132 1709
0baf16f2
AM		 1710 p = frag_more (nbytes);
1711 offset = 0;
1712 if (target_big_endian)
1713 offset = nbytes - size;
99a814a1
AM		 1714 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1715 &exp, 0, reloc);
252b5132
RH		 1716 }
1717 }
1718 else
1719 emit_expr (&exp, (unsigned int) nbytes);
1720 }
1721 while (*input_line_pointer++ == ',');
1722
99a814a1
AM		 1723 /* Put terminator back into stream. */
1724 input_line_pointer--;
252b5132
RH		 1725 demand_empty_rest_of_line ();
1726}
1727
1728/* Solaris pseduo op to change to the .rodata section. */
1729static void
1730ppc_elf_rdata (xxx)
1731 int xxx;
1732{
1733 char *save_line = input_line_pointer;
1734 static char section[] = ".rodata\n";
1735
99a814a1 1736 /* Just pretend this is .section .rodata */
252b5132
RH		 1737 input_line_pointer = section;
1738 obj_elf_section (xxx);
1739
1740 input_line_pointer = save_line;
1741}
1742
99a814a1 1743/* Pseudo op to make file scope bss items. */
252b5132 1744static void
99a814a1 1745ppc_elf_lcomm (xxx)
92161534 1746 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1747{
1748 register char *name;
1749 register char c;
1750 register char *p;
1751 offsetT size;
1752 register symbolS *symbolP;
1753 offsetT align;
1754 segT old_sec;
1755 int old_subsec;
1756 char *pfrag;
1757 int align2;
1758
1759 name = input_line_pointer;
1760 c = get_symbol_end ();
1761
99a814a1 1762 /* just after name is now '\0'. */
252b5132
RH		 1763 p = input_line_pointer;
1764 *p = c;
1765 SKIP_WHITESPACE ();
1766 if (*input_line_pointer != ',')
1767 {
1768 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1769 ignore_rest_of_line ();
1770 return;
1771 }
1772
1773 input_line_pointer++; /* skip ',' */
1774 if ((size = get_absolute_expression ()) < 0)
1775 {
1776 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1777 ignore_rest_of_line ();
1778 return;
1779 }
1780
1781 /* The third argument to .lcomm is the alignment. */
1782 if (*input_line_pointer != ',')
1783 align = 8;
1784 else
1785 {
1786 ++input_line_pointer;
1787 align = get_absolute_expression ();
1788 if (align <= 0)
1789 {
1790 as_warn (_("ignoring bad alignment"));
1791 align = 8;
1792 }
1793 }
1794
1795 *p = 0;
1796 symbolP = symbol_find_or_make (name);
1797 *p = c;
1798
1799 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1800 {
1801 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1802 S_GET_NAME (symbolP));
1803 ignore_rest_of_line ();
1804 return;
1805 }
1806
1807 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1808 {
1809 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1810 S_GET_NAME (symbolP),
1811 (long) S_GET_VALUE (symbolP),
1812 (long) size);
1813
1814 ignore_rest_of_line ();
1815 return;
1816 }
1817
99a814a1 1818 /* Allocate_bss. */
252b5132
RH		 1819 old_sec = now_seg;
1820 old_subsec = now_subseg;
1821 if (align)
1822 {
99a814a1 1823 /* Convert to a power of 2 alignment. */
252b5132
RH		 1824 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1825 if (align != 1)
1826 {
1827 as_bad (_("Common alignment not a power of 2"));
1828 ignore_rest_of_line ();
1829 return;
1830 }
1831 }
1832 else
1833 align2 = 0;
1834
1835 record_alignment (bss_section, align2);
1836 subseg_set (bss_section, 0);
1837 if (align2)
1838 frag_align (align2, 0, 0);
1839 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1840 symbol_get_frag (symbolP)->fr_symbol = 0;
1841 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1842 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1843 (char *) 0);
1844 *pfrag = 0;
1845 S_SET_SIZE (symbolP, size);
1846 S_SET_SEGMENT (symbolP, bss_section);
1847 subseg_set (old_sec, old_subsec);
1848 demand_empty_rest_of_line ();
1849}
1850
1851/* Validate any relocations emitted for -mrelocatable, possibly adding
1852 fixups for word relocations in writable segments, so we can adjust
1853 them at runtime. */
1854static void
1855ppc_elf_validate_fix (fixp, seg)
1856 fixS *fixp;
1857 segT seg;
1858{
1859 if (fixp->fx_done || fixp->fx_pcrel)
1860 return;
1861
1862 switch (shlib)
1863 {
1864 case SHLIB_NONE:
1865 case SHLIB_PIC:
1866 return;
1867
5d6f4f16 1868 case SHLIB_MRELOCATABLE:
252b5132
RH		 1869 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1870 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1871 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1872 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1873 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1874 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1875 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1876 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1877 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1878 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1879 && strcmp (segment_name (seg), ".got2") != 0
1880 && strcmp (segment_name (seg), ".dtors") != 0
1881 && strcmp (segment_name (seg), ".ctors") != 0
1882 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1883 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1884 && strcmp (segment_name (seg), ".eh_frame") != 0
1885 && strcmp (segment_name (seg), ".ex_shared") != 0)
1886 {
1887 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1888 || fixp->fx_r_type != BFD_RELOC_CTOR)
1889 {
1890 as_bad_where (fixp->fx_file, fixp->fx_line,
1891 _("Relocation cannot be done when using -mrelocatable"));
1892 }
1893 }
1894 return;
1895 }
1896}
0baf16f2 1897
7e8d4ab4
AM		 1898/* Prevent elf_frob_file_before_adjust removing a weak undefined
1899 function descriptor sym if the corresponding code sym is used. */
1900
1901void
1902ppc_frob_file_before_adjust ()
0baf16f2 1903{
7e8d4ab4 1904 symbolS *symp;
0baf16f2 1905
7e8d4ab4
AM		 1906 if (!ppc_obj64)
1907 return;
1908
1909 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1910 {
7e8d4ab4
AM		 1911 const char *name;
1912 char *dotname;
1913 symbolS *dotsym;
1914 size_t len;
1915
1916 name = S_GET_NAME (symp);
1917 if (name[0] == '.')
1918 continue;
1919
1920 if (! S_IS_WEAK (symp)
1921 || S_IS_DEFINED (symp))
1922 continue;
1923
1924 len = strlen (name) + 1;
1925 dotname = xmalloc (len + 1);
1926 dotname[0] = '.';
1927 memcpy (dotname + 1, name, len);
1928 dotsym = symbol_find (dotname);
1929 free (dotname);
1930 if (dotsym != NULL && (symbol_used_p (dotsym)
1931 || symbol_used_in_reloc_p (dotsym)))
1932 {
1933 symbol_mark_used (symp);
1934 }
0baf16f2
AM		 1935 }
1936
7e8d4ab4
AM		 1937 /* Don't emit .TOC. symbol. */
1938 symp = symbol_find (".TOC.");
1939 if (symp != NULL)
1940 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1941}
252b5132
RH		 1942#endif /* OBJ_ELF */
1943\f
1944#ifdef TE_PE
1945
1946/*
99a814a1 1947 * Summary of parse_toc_entry.
252b5132
RH		 1948 *
1949 * in: Input_line_pointer points to the '[' in one of:
1950 *
1951 * [toc] [tocv] [toc32] [toc64]
1952 *
1953 * Anything else is an error of one kind or another.
1954 *
81d4177b 1955 * out:
252b5132
RH		 1956 * return value: success or failure
1957 * toc_kind: kind of toc reference
1958 * input_line_pointer:
1959 * success: first char after the ']'
1960 * failure: unchanged
1961 *
1962 * settings:
1963 *
1964 * [toc] - rv == success, toc_kind = default_toc
1965 * [tocv] - rv == success, toc_kind = data_in_toc
1966 * [toc32] - rv == success, toc_kind = must_be_32
1967 * [toc64] - rv == success, toc_kind = must_be_64
1968 *
1969 */
1970
81d4177b
KH		 1971enum toc_size_qualifier
1972{
252b5132
RH		 1973 default_toc, /* The toc cell constructed should be the system default size */
1974 data_in_toc, /* This is a direct reference to a toc cell */
1975 must_be_32, /* The toc cell constructed must be 32 bits wide */
1976 must_be_64 /* The toc cell constructed must be 64 bits wide */
1977};
1978
1979static int
99a814a1 1980parse_toc_entry (toc_kind)
252b5132
RH		 1981 enum toc_size_qualifier *toc_kind;
1982{
1983 char *start;
1984 char *toc_spec;
1985 char c;
1986 enum toc_size_qualifier t;
1987
99a814a1 1988 /* Save the input_line_pointer. */
252b5132
RH		 1989 start = input_line_pointer;
1990
99a814a1 1991 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1992 ++input_line_pointer;
1993 SKIP_WHITESPACE ();
81d4177b 1994
99a814a1 1995 /* Find the spelling of the operand. */
252b5132
RH		 1996 toc_spec = input_line_pointer;
1997 c = get_symbol_end ();
1998
99a814a1 1999 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2000 {
2001 t = default_toc;
2002 }
99a814a1 2003 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2004 {
2005 t = data_in_toc;
2006 }
99a814a1 2007 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2008 {
2009 t = must_be_32;
2010 }
99a814a1 2011 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2012 {
2013 t = must_be_64;
2014 }
2015 else
2016 {
2017 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2018 *input_line_pointer = c;
2019 input_line_pointer = start;
252b5132
RH		 2020 return 0;
2021 }
2022
99a814a1
AM		 2023 /* Now find the ']'. */
2024 *input_line_pointer = c;
252b5132 2025
81d4177b
KH		 2026 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2027 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2028
2029 if (c != ']')
2030 {
2031 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2032 input_line_pointer = start;
252b5132
RH		 2033 return 0;
2034 }
2035
99a814a1 2036 *toc_kind = t;
252b5132
RH		 2037 return 1;
2038}
2039#endif
2040\f
2041
dc1d03fc 2042#ifdef OBJ_ELF
6a0c61b7
EZ		 2043#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2044static void
dc1d03fc 2045ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2046 unsigned int apu, version;
2047{
2048 unsigned int i;
2049
2050 /* Check we don't already exist. */
2051 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2052 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2053 return;
b34976b6 2054
6a0c61b7
EZ		 2055 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2056 {
2057 if (ppc_apuinfo_num_alloc == 0)
2058 {
2059 ppc_apuinfo_num_alloc = 4;
2060 ppc_apuinfo_list = (unsigned long *)
2061 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2062 }
2063 else
2064 {
2065 ppc_apuinfo_num_alloc += 4;
2066 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2067 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2068 }
2069 }
dc1d03fc 2070 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2071}
2072#undef APUID
dc1d03fc 2073#endif
6a0c61b7
EZ		 2074\f
2075
252b5132
RH		 2076/* We need to keep a list of fixups. We can't simply generate them as
2077 we go, because that would require us to first create the frag, and
2078 that would screw up references to ``.''. */
2079
2080struct ppc_fixup
2081{
2082 expressionS exp;
2083 int opindex;
2084 bfd_reloc_code_real_type reloc;
2085};
2086
2087#define MAX_INSN_FIXUPS (5)
2088
2089/* This routine is called for each instruction to be assembled. */
2090
2091void
2092md_assemble (str)
2093 char *str;
2094{
2095 char *s;
2096 const struct powerpc_opcode *opcode;
2097 unsigned long insn;
2098 const unsigned char *opindex_ptr;
2099 int skip_optional;
2100 int need_paren;
2101 int next_opindex;
2102 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2103 int fc;
2104 char *f;
2105 int i;
2106#ifdef OBJ_ELF
2107 bfd_reloc_code_real_type reloc;
2108#endif
2109
2110 /* Get the opcode. */
3882b010 2111 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2112 ;
2113 if (*s != '\0')
2114 *s++ = '\0';
2115
2116 /* Look up the opcode in the hash table. */
2117 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2118 if (opcode == (const struct powerpc_opcode *) NULL)
2119 {
2120 const struct powerpc_macro *macro;
2121
2122 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2123 if (macro == (const struct powerpc_macro *) NULL)
2124 as_bad (_("Unrecognized opcode: `%s'"), str);
2125 else
2126 ppc_macro (s, macro);
2127
2128 return;
2129 }
2130
2131 insn = opcode->opcode;
2132
2133 str = s;
3882b010 2134 while (ISSPACE (*str))
252b5132
RH		 2135 ++str;
2136
2137 /* PowerPC operands are just expressions. The only real issue is
2138 that a few operand types are optional. All cases which might use
2139 an optional operand separate the operands only with commas (in
2140 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2141 cases never have optional operands). There is never more than
2142 one optional operand for an instruction. So, before we start
2143 seriously parsing the operands, we check to see if we have an
2144 optional operand, and, if we do, we count the number of commas to
2145 see whether the operand should be omitted. */
2146 skip_optional = 0;
2147 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2148 {
2149 const struct powerpc_operand *operand;
2150
2151 operand = &powerpc_operands[*opindex_ptr];
2152 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2153 {
2154 unsigned int opcount;
7fe9cf6b
NC		 2155 unsigned int num_operands_expected;
2156 unsigned int i;
252b5132
RH		 2157
2158 /* There is an optional operand. Count the number of
2159 commas in the input line. */
2160 if (*str == '\0')
2161 opcount = 0;
2162 else
2163 {
2164 opcount = 1;
2165 s = str;
2166 while ((s = strchr (s, ',')) != (char *) NULL)
2167 {
2168 ++opcount;
2169 ++s;
2170 }
2171 }
2172
7fe9cf6b
NC		 2173 /* Compute the number of expected operands.
2174 Do not count fake operands. */
2175 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2176 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2177 ++ num_operands_expected;
2178
252b5132
RH		 2179 /* If there are fewer operands in the line then are called
2180 for by the instruction, we want to skip the optional
2181 operand. */
7fe9cf6b 2182 if (opcount < num_operands_expected)
252b5132
RH		 2183 skip_optional = 1;
2184
2185 break;
2186 }
2187 }
2188
2189 /* Gather the operands. */
2190 need_paren = 0;
2191 next_opindex = 0;
2192 fc = 0;
2193 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2194 {
2195 const struct powerpc_operand *operand;
2196 const char *errmsg;
2197 char *hold;
2198 expressionS ex;
2199 char endc;
2200
2201 if (next_opindex == 0)
2202 operand = &powerpc_operands[*opindex_ptr];
2203 else
2204 {
2205 operand = &powerpc_operands[next_opindex];
2206 next_opindex = 0;
2207 }
252b5132
RH		 2208 errmsg = NULL;
2209
2210 /* If this is a fake operand, then we do not expect anything
2211 from the input. */
2212 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2213 {
2b3c4602 2214 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2215 if (errmsg != (const char *) NULL)
2216 as_bad (errmsg);
2217 continue;
2218 }
2219
2220 /* If this is an optional operand, and we are skipping it, just
2221 insert a zero. */
2222 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2223 && skip_optional)
2224 {
2225 if (operand->insert)
2226 {
2b3c4602 2227 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2228 if (errmsg != (const char *) NULL)
2229 as_bad (errmsg);
2230 }
2231 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2232 next_opindex = *opindex_ptr + 1;
2233 continue;
2234 }
2235
2236 /* Gather the operand. */
2237 hold = input_line_pointer;
2238 input_line_pointer = str;
2239
2240#ifdef TE_PE
81d4177b 2241 if (*input_line_pointer == '[')
252b5132
RH		 2242 {
2243 /* We are expecting something like the second argument here:
99a814a1
AM		 2244 *
2245 * lwz r4,[toc].GS.0.static_int(rtoc)
2246 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2247 * The argument following the `]' must be a symbol name, and the
2248 * register must be the toc register: 'rtoc' or '2'
2249 *
2250 * The effect is to 0 as the displacement field
2251 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2252 * the appropriate variation) reloc against it based on the symbol.
2253 * The linker will build the toc, and insert the resolved toc offset.
2254 *
2255 * Note:
2256 * o The size of the toc entry is currently assumed to be
2257 * 32 bits. This should not be assumed to be a hard coded
2258 * number.
2259 * o In an effort to cope with a change from 32 to 64 bits,
2260 * there are also toc entries that are specified to be
2261 * either 32 or 64 bits:
2262 * lwz r4,[toc32].GS.0.static_int(rtoc)
2263 * lwz r4,[toc64].GS.0.static_int(rtoc)
2264 * These demand toc entries of the specified size, and the
2265 * instruction probably requires it.
2266 */
252b5132
RH		 2267
2268 int valid_toc;
2269 enum toc_size_qualifier toc_kind;
2270 bfd_reloc_code_real_type toc_reloc;
2271
99a814a1
AM		 2272 /* Go parse off the [tocXX] part. */
2273 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2274
81d4177b 2275 if (!valid_toc)
252b5132 2276 {
99a814a1
AM		 2277 /* Note: message has already been issued.
2278 FIXME: what sort of recovery should we do?
2279 demand_rest_of_line (); return; ? */
252b5132
RH		 2280 }
2281
99a814a1
AM		 2282 /* Now get the symbol following the ']'. */
2283 expression (&ex);
252b5132
RH		 2284
2285 switch (toc_kind)
2286 {
2287 case default_toc:
99a814a1
AM		 2288 /* In this case, we may not have seen the symbol yet,
2289 since it is allowed to appear on a .extern or .globl
2290 or just be a label in the .data section. */
252b5132
RH		 2291 toc_reloc = BFD_RELOC_PPC_TOC16;
2292 break;
2293 case data_in_toc:
99a814a1
AM		 2294 /* 1. The symbol must be defined and either in the toc
2295 section, or a global.
2296 2. The reloc generated must have the TOCDEFN flag set
2297 in upper bit mess of the reloc type.
2298 FIXME: It's a little confusing what the tocv
2299 qualifier can be used for. At the very least, I've
2300 seen three uses, only one of which I'm sure I can
2301 explain. */
81d4177b
KH		 2302 if (ex.X_op == O_symbol)
2303 {
252b5132 2304 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2305 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2306 != tocdata_section)
252b5132 2307 {
99a814a1 2308 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2309 }
2310 }
2311
2312 toc_reloc = BFD_RELOC_PPC_TOC16;
2313 break;
2314 case must_be_32:
99a814a1
AM		 2315 /* FIXME: these next two specifically specify 32/64 bit
2316 toc entries. We don't support them today. Is this
2317 the right way to say that? */
252b5132
RH		 2318 toc_reloc = BFD_RELOC_UNUSED;
2319 as_bad (_("Unimplemented toc32 expression modifier"));
2320 break;
2321 case must_be_64:
99a814a1 2322 /* FIXME: see above. */
252b5132
RH		 2323 toc_reloc = BFD_RELOC_UNUSED;
2324 as_bad (_("Unimplemented toc64 expression modifier"));
2325 break;
2326 default:
bc805888 2327 fprintf (stderr,
99a814a1
AM		 2328 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2329 toc_kind);
bc805888 2330 abort ();
252b5132
RH		 2331 break;
2332 }
2333
2334 /* We need to generate a fixup for this expression. */
2335 if (fc >= MAX_INSN_FIXUPS)
2336 as_fatal (_("too many fixups"));
2337
2338 fixups[fc].reloc = toc_reloc;
2339 fixups[fc].exp = ex;
2340 fixups[fc].opindex = *opindex_ptr;
2341 ++fc;
2342
99a814a1
AM		 2343 /* Ok. We've set up the fixup for the instruction. Now make it
2344 look like the constant 0 was found here. */
252b5132
RH		 2345 ex.X_unsigned = 1;
2346 ex.X_op = O_constant;
2347 ex.X_add_number = 0;
2348 ex.X_add_symbol = NULL;
2349 ex.X_op_symbol = NULL;
2350 }
2351
2352 else
2353#endif /* TE_PE */
2354 {
2355 if (! register_name (&ex))
2356 {
2357 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2358 cr_operand = TRUE;
252b5132 2359 expression (&ex);
b34976b6 2360 cr_operand = FALSE;
252b5132
RH		 2361 }
2362 }
2363
2364 str = input_line_pointer;
2365 input_line_pointer = hold;
2366
2367 if (ex.X_op == O_illegal)
2368 as_bad (_("illegal operand"));
2369 else if (ex.X_op == O_absent)
2370 as_bad (_("missing operand"));
2371 else if (ex.X_op == O_register)
2372 {
2373 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2374 (char *) NULL, 0);
2375 }
2376 else if (ex.X_op == O_constant)
2377 {
2378#ifdef OBJ_ELF
81d4177b 2379 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2380 char *orig_str = str;
2381
2382 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2383 switch (reloc)
2384 {
2385 default:
2386 str = orig_str;
2387 break;
2388
2389 case BFD_RELOC_LO16:
2390 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2391 something which cleared it, we always produce a
2392 signed value. */
2393 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2394 ex.X_add_number &= 0xffff;
2395 else
0baf16f2 2396 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2397 break;
2398
2399 case BFD_RELOC_HI16:
0baf16f2
AM		 2400 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2401 ex.X_add_number = PPC_HI (ex.X_add_number);
2402 else
2403 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2404 break;
2405
2406 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2407 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2408 ex.X_add_number = PPC_HA (ex.X_add_number);
2409 else
2410 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2411 break;
2412
0baf16f2
AM		 2413 case BFD_RELOC_PPC64_HIGHER:
2414 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2415 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2416 else
2417 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2418 break;
2419
2420 case BFD_RELOC_PPC64_HIGHER_S:
2421 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2422 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2423 else
2424 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2425 break;
0baf16f2
AM		 2426
2427 case BFD_RELOC_PPC64_HIGHEST:
2428 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2429 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2430 else
2431 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2432 break;
2433
2434 case BFD_RELOC_PPC64_HIGHEST_S:
2435 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2436 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2437 else
2438 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2439 break;
252b5132 2440 }
0baf16f2 2441#endif /* OBJ_ELF */
252b5132
RH		 2442 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2443 (char *) NULL, 0);
2444 }
2445#ifdef OBJ_ELF
2446 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2447 {
cdba85ec
AM		 2448 /* Some TLS tweaks. */
2449 switch (reloc)
2450 {
2451 default:
2452 break;
2453 case BFD_RELOC_PPC_TLS:
2454 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2455 (char *) NULL, 0);
2456 break;
2457 /* We'll only use the 32 (or 64) bit form of these relocations
2458 in constants. Instructions get the 16 bit form. */
2459 case BFD_RELOC_PPC_DTPREL:
2460 reloc = BFD_RELOC_PPC_DTPREL16;
2461 break;
2462 case BFD_RELOC_PPC_TPREL:
2463 reloc = BFD_RELOC_PPC_TPREL16;
2464 break;
2465 }
2466
99a814a1
AM		 2467 /* For the absolute forms of branches, convert the PC
2468 relative form back into the absolute. */
252b5132
RH		 2469 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2470 {
2471 switch (reloc)
2472 {
2473 case BFD_RELOC_PPC_B26:
2474 reloc = BFD_RELOC_PPC_BA26;
2475 break;
2476 case BFD_RELOC_PPC_B16:
2477 reloc = BFD_RELOC_PPC_BA16;
2478 break;
2479 case BFD_RELOC_PPC_B16_BRTAKEN:
2480 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2481 break;
2482 case BFD_RELOC_PPC_B16_BRNTAKEN:
2483 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2484 break;
2485 default:
2486 break;
2487 }
2488 }
2489
2b3c4602 2490 if (ppc_obj64
adadcc0c 2491 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2492 {
2493 switch (reloc)
2494 {
2495 case BFD_RELOC_16:
2496 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2497 break;
2498 case BFD_RELOC_LO16:
2499 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2500 break;
2501 case BFD_RELOC_16_GOTOFF:
2502 reloc = BFD_RELOC_PPC64_GOT16_DS;
2503 break;
2504 case BFD_RELOC_LO16_GOTOFF:
2505 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2506 break;
2507 case BFD_RELOC_LO16_PLTOFF:
2508 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2509 break;
1cfc59d5 2510 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2511 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2512 break;
2513 case BFD_RELOC_LO16_BASEREL:
2514 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2515 break;
2516 case BFD_RELOC_PPC_TOC16:
2517 reloc = BFD_RELOC_PPC64_TOC16_DS;
2518 break;
2519 case BFD_RELOC_PPC64_TOC16_LO:
2520 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2521 break;
2522 case BFD_RELOC_PPC64_PLTGOT16:
2523 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2524 break;
2525 case BFD_RELOC_PPC64_PLTGOT16_LO:
2526 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2527 break;
cdba85ec
AM		 2528 case BFD_RELOC_PPC_DTPREL16:
2529 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2530 break;
2531 case BFD_RELOC_PPC_DTPREL16_LO:
2532 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2533 break;
2534 case BFD_RELOC_PPC_TPREL16:
2535 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2536 break;
2537 case BFD_RELOC_PPC_TPREL16_LO:
2538 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2539 break;
2540 case BFD_RELOC_PPC_GOT_DTPREL16:
2541 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2542 case BFD_RELOC_PPC_GOT_TPREL16:
2543 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2544 break;
0baf16f2
AM		 2545 default:
2546 as_bad (_("unsupported relocation for DS offset field"));
2547 break;
2548 }
2549 }
2550
252b5132
RH		 2551 /* We need to generate a fixup for this expression. */
2552 if (fc >= MAX_INSN_FIXUPS)
2553 as_fatal (_("too many fixups"));
2554 fixups[fc].exp = ex;
2555 fixups[fc].opindex = 0;
2556 fixups[fc].reloc = reloc;
2557 ++fc;
2558 }
2559#endif /* OBJ_ELF */
2560
2561 else
2562 {
2563 /* We need to generate a fixup for this expression. */
2564 if (fc >= MAX_INSN_FIXUPS)
2565 as_fatal (_("too many fixups"));
2566 fixups[fc].exp = ex;
2567 fixups[fc].opindex = *opindex_ptr;
2568 fixups[fc].reloc = BFD_RELOC_UNUSED;
2569 ++fc;
2570 }
2571
2572 if (need_paren)
2573 {
2574 endc = ')';
2575 need_paren = 0;
2576 }
2577 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2578 {
2579 endc = '(';
2580 need_paren = 1;
2581 }
2582 else
2583 endc = ',';
2584
2585 /* The call to expression should have advanced str past any
2586 whitespace. */
2587 if (*str != endc
2588 && (endc != ',' || *str != '\0'))
2589 {
2590 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2591 break;
2592 }
2593
2594 if (*str != '\0')
2595 ++str;
2596 }
2597
3882b010 2598 while (ISSPACE (*str))
252b5132
RH		 2599 ++str;
2600
2601 if (*str != '\0')
2602 as_bad (_("junk at end of line: `%s'"), str);
2603
dc1d03fc 2604#ifdef OBJ_ELF
6a0c61b7
EZ		 2605 /* Do we need/want a APUinfo section? */
2606 if (ppc_cpu & (PPC_OPCODE_SPE
2607 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2608 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2609 | PPC_OPCODE_RFMCI))
2610 {
2611 /* These are all version "1". */
2612 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2613 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2614 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2615 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2616 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2617 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2618 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2619 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2620 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2621 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2622 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2623 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2624 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2625 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2626 }
dc1d03fc 2627#endif
6a0c61b7 2628
252b5132
RH		 2629 /* Write out the instruction. */
2630 f = frag_more (4);
2631 md_number_to_chars (f, insn, 4);
2632
5d6f4f16
GK		 2633#ifdef OBJ_ELF
2634 dwarf2_emit_insn (4);
2635#endif
2636
252b5132
RH		 2637 /* Create any fixups. At this point we do not use a
2638 bfd_reloc_code_real_type, but instead just use the
2639 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2640 handle fixups for any operand type, although that is admittedly
2641 not a very exciting feature. We pick a BFD reloc type in
94f592af 2642 md_apply_fix3. */
252b5132
RH		 2643 for (i = 0; i < fc; i++)
2644 {
2645 const struct powerpc_operand *operand;
2646
2647 operand = &powerpc_operands[fixups[i].opindex];
2648 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2649 {
99a814a1 2650 reloc_howto_type *reloc_howto;
252b5132
RH		 2651 int size;
2652 int offset;
2653 fixS *fixP;
2654
99a814a1 2655 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2656 if (!reloc_howto)
2657 abort ();
2658
2659 size = bfd_get_reloc_size (reloc_howto);
2660 offset = target_big_endian ? (4 - size) : 0;
2661
2662 if (size < 1 || size > 4)
bc805888 2663 abort ();
252b5132 2664
99a814a1
AM		 2665 fixP = fix_new_exp (frag_now,
2666 f - frag_now->fr_literal + offset,
2667 size,
2668 &fixups[i].exp,
2669 reloc_howto->pc_relative,
252b5132
RH		 2670 fixups[i].reloc);
2671
2672 /* Turn off complaints that the addend is too large for things like
2673 foo+100000@ha. */
2674 switch (fixups[i].reloc)
2675 {
2676 case BFD_RELOC_16_GOTOFF:
2677 case BFD_RELOC_PPC_TOC16:
2678 case BFD_RELOC_LO16:
2679 case BFD_RELOC_HI16:
2680 case BFD_RELOC_HI16_S:
0baf16f2 2681#ifdef OBJ_ELF
0baf16f2
AM		 2682 case BFD_RELOC_PPC64_HIGHER:
2683 case BFD_RELOC_PPC64_HIGHER_S:
2684 case BFD_RELOC_PPC64_HIGHEST:
2685 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2686#endif
252b5132
RH		 2687 fixP->fx_no_overflow = 1;
2688 break;
2689 default:
2690 break;
2691 }
2692 }
2693 else
99a814a1
AM		 2694 fix_new_exp (frag_now,
2695 f - frag_now->fr_literal,
2696 4,
252b5132
RH		 2697 &fixups[i].exp,
2698 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2699 ((bfd_reloc_code_real_type)
99a814a1 2700 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2701 }
2702}
2703
2704/* Handle a macro. Gather all the operands, transform them as
2705 described by the macro, and call md_assemble recursively. All the
2706 operands are separated by commas; we don't accept parentheses
2707 around operands here. */
2708
2709static void
2710ppc_macro (str, macro)
2711 char *str;
2712 const struct powerpc_macro *macro;
2713{
2714 char *operands[10];
2715 unsigned int count;
2716 char *s;
2717 unsigned int len;
2718 const char *format;
2719 int arg;
2720 char *send;
2721 char *complete;
2722
2723 /* Gather the users operands into the operands array. */
2724 count = 0;
2725 s = str;
2726 while (1)
2727 {
2728 if (count >= sizeof operands / sizeof operands[0])
2729 break;
2730 operands[count++] = s;
2731 s = strchr (s, ',');
2732 if (s == (char *) NULL)
2733 break;
2734 *s++ = '\0';
81d4177b 2735 }
252b5132
RH		 2736
2737 if (count != macro->operands)
2738 {
2739 as_bad (_("wrong number of operands"));
2740 return;
2741 }
2742
2743 /* Work out how large the string must be (the size is unbounded
2744 because it includes user input). */
2745 len = 0;
2746 format = macro->format;
2747 while (*format != '\0')
2748 {
2749 if (*format != '%')
2750 {
2751 ++len;
2752 ++format;
2753 }
2754 else
2755 {
2756 arg = strtol (format + 1, &send, 10);
2757 know (send != format && arg >= 0 && arg < count);
2758 len += strlen (operands[arg]);
2759 format = send;
2760 }
2761 }
2762
2763 /* Put the string together. */
2764 complete = s = (char *) alloca (len + 1);
2765 format = macro->format;
2766 while (*format != '\0')
2767 {
2768 if (*format != '%')
2769 *s++ = *format++;
2770 else
2771 {
2772 arg = strtol (format + 1, &send, 10);
2773 strcpy (s, operands[arg]);
2774 s += strlen (s);
2775 format = send;
2776 }
2777 }
2778 *s = '\0';
2779
2780 /* Assemble the constructed instruction. */
2781 md_assemble (complete);
81d4177b 2782}
252b5132
RH		 2783\f
2784#ifdef OBJ_ELF
99a814a1 2785/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2786
2787int
2788ppc_section_letter (letter, ptr_msg)
2789 int letter;
2790 char **ptr_msg;
2791{
2792 if (letter == 'e')
2793 return SHF_EXCLUDE;
2794
13ae64f3 2795 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2796 return -1;
252b5132
RH		 2797}
2798
2799int
9de8d8f1
RH		 2800ppc_section_word (str, len)
2801 char *str;
2802 size_t len;
252b5132 2803{
9de8d8f1
RH		 2804 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2805 return SHF_EXCLUDE;
252b5132 2806
9de8d8f1 2807 return -1;
252b5132
RH		 2808}
2809
2810int
9de8d8f1
RH		 2811ppc_section_type (str, len)
2812 char *str;
2813 size_t len;
252b5132 2814{
9de8d8f1
RH		 2815 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2816 return SHT_ORDERED;
252b5132 2817
9de8d8f1 2818 return -1;
252b5132
RH		 2819}
2820
2821int
2822ppc_section_flags (flags, attr, type)
2823 int flags;
2824 int attr;
2825 int type;
2826{
2827 if (type == SHT_ORDERED)
2828 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2829
2830 if (attr & SHF_EXCLUDE)
2831 flags |= SEC_EXCLUDE;
2832
2833 return flags;
2834}
2835#endif /* OBJ_ELF */
2836
2837\f
2838/* Pseudo-op handling. */
2839
2840/* The .byte pseudo-op. This is similar to the normal .byte
2841 pseudo-op, but it can also take a single ASCII string. */
2842
2843static void
2844ppc_byte (ignore)
92161534 2845 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2846{
2847 if (*input_line_pointer != '\"')
2848 {
2849 cons (1);
2850 return;
2851 }
2852
2853 /* Gather characters. A real double quote is doubled. Unusual
2854 characters are not permitted. */
2855 ++input_line_pointer;
2856 while (1)
2857 {
2858 char c;
2859
2860 c = *input_line_pointer++;
2861
2862 if (c == '\"')
2863 {
2864 if (*input_line_pointer != '\"')
2865 break;
2866 ++input_line_pointer;
2867 }
2868
2869 FRAG_APPEND_1_CHAR (c);
2870 }
2871
2872 demand_empty_rest_of_line ();
2873}
2874\f
2875#ifdef OBJ_XCOFF
2876
2877/* XCOFF specific pseudo-op handling. */
2878
2879/* This is set if we are creating a .stabx symbol, since we don't want
2880 to handle symbol suffixes for such symbols. */
b34976b6 2881static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2882
2883/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2884 symbols in the .bss segment as though they were local common
67c1ffbe 2885 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2886 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2887
2888static void
2889ppc_comm (lcomm)
2890 int lcomm;
2891{
2892 asection *current_seg = now_seg;
2893 subsegT current_subseg = now_subseg;
2894 char *name;
2895 char endc;
2896 char *end_name;
2897 offsetT size;
2898 offsetT align;
2899 symbolS *lcomm_sym = NULL;
2900 symbolS *sym;
2901 char *pfrag;
2902
2903 name = input_line_pointer;
2904 endc = get_symbol_end ();
2905 end_name = input_line_pointer;
2906 *end_name = endc;
2907
2908 if (*input_line_pointer != ',')
2909 {
2910 as_bad (_("missing size"));
2911 ignore_rest_of_line ();
2912 return;
2913 }
2914 ++input_line_pointer;
2915
2916 size = get_absolute_expression ();
2917 if (size < 0)
2918 {
2919 as_bad (_("negative size"));
2920 ignore_rest_of_line ();
2921 return;
2922 }
2923
2924 if (! lcomm)
2925 {
2926 /* The third argument to .comm is the alignment. */
2927 if (*input_line_pointer != ',')
1ad63b2f 2928 align = 2;
252b5132
RH		 2929 else
2930 {
2931 ++input_line_pointer;
2932 align = get_absolute_expression ();
2933 if (align <= 0)
2934 {
2935 as_warn (_("ignoring bad alignment"));
1ad63b2f 2936 align = 2;
252b5132
RH		 2937 }
2938 }
2939 }
2940 else
2941 {
2942 char *lcomm_name;
2943 char lcomm_endc;
2944
1ad63b2f 2945 if (size <= 4)
252b5132
RH		 2946 align = 2;
2947 else
2948 align = 3;
2949
2950 /* The third argument to .lcomm appears to be the real local
2951 common symbol to create. References to the symbol named in
2952 the first argument are turned into references to the third
2953 argument. */
2954 if (*input_line_pointer != ',')
2955 {
2956 as_bad (_("missing real symbol name"));
2957 ignore_rest_of_line ();
2958 return;
2959 }
2960 ++input_line_pointer;
2961
2962 lcomm_name = input_line_pointer;
2963 lcomm_endc = get_symbol_end ();
81d4177b 2964
252b5132
RH		 2965 lcomm_sym = symbol_find_or_make (lcomm_name);
2966
2967 *input_line_pointer = lcomm_endc;
2968 }
2969
2970 *end_name = '\0';
2971 sym = symbol_find_or_make (name);
2972 *end_name = endc;
2973
2974 if (S_IS_DEFINED (sym)
2975 || S_GET_VALUE (sym) != 0)
2976 {
2977 as_bad (_("attempt to redefine symbol"));
2978 ignore_rest_of_line ();
2979 return;
2980 }
81d4177b 2981
252b5132 2982 record_alignment (bss_section, align);
81d4177b 2983
252b5132
RH		 2984 if (! lcomm
2985 || ! S_IS_DEFINED (lcomm_sym))
2986 {
2987 symbolS *def_sym;
2988 offsetT def_size;
2989
2990 if (! lcomm)
2991 {
2992 def_sym = sym;
2993 def_size = size;
2994 S_SET_EXTERNAL (sym);
2995 }
2996 else
2997 {
809ffe0d 2998 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2999 def_sym = lcomm_sym;
3000 def_size = 0;
3001 }
3002
3003 subseg_set (bss_section, 1);
3004 frag_align (align, 0, 0);
81d4177b 3005
809ffe0d 3006 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3007 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3008 def_size, (char *) NULL);
3009 *pfrag = 0;
3010 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3011 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3012 }
3013 else if (lcomm)
3014 {
3015 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3016 symbol_get_frag (lcomm_sym)->fr_offset =
3017 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3018 &~ ((1 << align) - 1));
809ffe0d
ILT		 3019 if (align > symbol_get_tc (lcomm_sym)->align)
3020 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3021 }
3022
3023 if (lcomm)
3024 {
3025 /* Make sym an offset from lcomm_sym. */
3026 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3027 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3028 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3029 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3030 }
3031
3032 subseg_set (current_seg, current_subseg);
3033
3034 demand_empty_rest_of_line ();
3035}
3036
3037/* The .csect pseudo-op. This switches us into a different
3038 subsegment. The first argument is a symbol whose value is the
3039 start of the .csect. In COFF, csect symbols get special aux
3040 entries defined by the x_csect field of union internal_auxent. The
3041 optional second argument is the alignment (the default is 2). */
3042
3043static void
3044ppc_csect (ignore)
5480ccf3 3045 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3046{
3047 char *name;
3048 char endc;
3049 symbolS *sym;
931e13a6 3050 offsetT align;
252b5132
RH		 3051
3052 name = input_line_pointer;
3053 endc = get_symbol_end ();
81d4177b 3054
252b5132
RH		 3055 sym = symbol_find_or_make (name);
3056
3057 *input_line_pointer = endc;
3058
3059 if (S_GET_NAME (sym)[0] == '\0')
3060 {
3061 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3062 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3063 }
3064
931e13a6 3065 align = 2;
252b5132
RH		 3066 if (*input_line_pointer == ',')
3067 {
3068 ++input_line_pointer;
931e13a6 3069 align = get_absolute_expression ();
252b5132
RH		 3070 }
3071
931e13a6
AM		 3072 ppc_change_csect (sym, align);
3073
252b5132
RH		 3074 demand_empty_rest_of_line ();
3075}
3076
3077/* Change to a different csect. */
3078
3079static void
931e13a6 3080ppc_change_csect (sym, align)
252b5132 3081 symbolS *sym;
931e13a6 3082 offsetT align;
252b5132
RH		 3083{
3084 if (S_IS_DEFINED (sym))
809ffe0d 3085 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3086 else
3087 {
3088 symbolS **list_ptr;
3089 int after_toc;
3090 int hold_chunksize;
3091 symbolS *list;
931e13a6
AM		 3092 int is_code;
3093 segT sec;
252b5132
RH		 3094
3095 /* This is a new csect. We need to look at the symbol class to
3096 figure out whether it should go in the text section or the
3097 data section. */
3098 after_toc = 0;
931e13a6 3099 is_code = 0;
809ffe0d 3100 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3101 {
3102 case XMC_PR:
3103 case XMC_RO:
3104 case XMC_DB:
3105 case XMC_GL:
3106 case XMC_XO:
3107 case XMC_SV:
3108 case XMC_TI:
3109 case XMC_TB:
3110 S_SET_SEGMENT (sym, text_section);
809ffe0d 3111 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3112 ++ppc_text_subsegment;
3113 list_ptr = &ppc_text_csects;
931e13a6 3114 is_code = 1;
252b5132
RH		 3115 break;
3116 case XMC_RW:
3117 case XMC_TC0:
3118 case XMC_TC:
3119 case XMC_DS:
3120 case XMC_UA:
3121 case XMC_BS:
3122 case XMC_UC:
3123 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3124 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3125 == ppc_data_subsegment))
252b5132
RH		 3126 after_toc = 1;
3127 S_SET_SEGMENT (sym, data_section);
809ffe0d 3128 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3129 ++ppc_data_subsegment;
3130 list_ptr = &ppc_data_csects;
3131 break;
3132 default:
3133 abort ();
3134 }
3135
3136 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3137 changing subsegments, so that we don't use a lot of memory
3138 space for what may be a small section. */
252b5132
RH		 3139 hold_chunksize = chunksize;
3140 chunksize = 64;
3141
931e13a6
AM		 3142 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3143 symbol_get_tc (sym)->subseg);
252b5132
RH		 3144
3145 chunksize = hold_chunksize;
3146
3147 if (after_toc)
3148 ppc_after_toc_frag = frag_now;
3149
931e13a6
AM		 3150 record_alignment (sec, align);
3151 if (is_code)
3152 frag_align_code (align, 0);
3153 else
3154 frag_align (align, 0, 0);
3155
809ffe0d 3156 symbol_set_frag (sym, frag_now);
252b5132
RH		 3157 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3158
931e13a6 3159 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3160 symbol_get_tc (sym)->output = 1;
3161 symbol_get_tc (sym)->within = sym;
81d4177b 3162
252b5132 3163 for (list = *list_ptr;
809ffe0d
ILT		 3164 symbol_get_tc (list)->next != (symbolS *) NULL;
3165 list = symbol_get_tc (list)->next)
252b5132 3166 ;
809ffe0d 3167 symbol_get_tc (list)->next = sym;
81d4177b 3168
252b5132 3169 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3170 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3171 &symbol_lastP);
252b5132
RH		 3172 }
3173
3174 ppc_current_csect = sym;
3175}
3176
3177/* This function handles the .text and .data pseudo-ops. These
3178 pseudo-ops aren't really used by XCOFF; we implement them for the
3179 convenience of people who aren't used to XCOFF. */
3180
3181static void
3182ppc_section (type)
3183 int type;
3184{
3185 const char *name;
3186 symbolS *sym;
3187
3188 if (type == 't')
3189 name = ".text[PR]";
3190 else if (type == 'd')
3191 name = ".data[RW]";
3192 else
3193 abort ();
3194
3195 sym = symbol_find_or_make (name);
3196
931e13a6 3197 ppc_change_csect (sym, 2);
252b5132
RH		 3198
3199 demand_empty_rest_of_line ();
3200}
3201
3202/* This function handles the .section pseudo-op. This is mostly to
3203 give an error, since XCOFF only supports .text, .data and .bss, but
3204 we do permit the user to name the text or data section. */
3205
3206static void
3207ppc_named_section (ignore)
5480ccf3 3208 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3209{
3210 char *user_name;
3211 const char *real_name;
3212 char c;
3213 symbolS *sym;
3214
3215 user_name = input_line_pointer;
3216 c = get_symbol_end ();
3217
3218 if (strcmp (user_name, ".text") == 0)
3219 real_name = ".text[PR]";
3220 else if (strcmp (user_name, ".data") == 0)
3221 real_name = ".data[RW]";
3222 else
3223 {
3224 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3225 *input_line_pointer = c;
3226 ignore_rest_of_line ();
3227 return;
3228 }
3229
3230 *input_line_pointer = c;
3231
3232 sym = symbol_find_or_make (real_name);
3233
931e13a6 3234 ppc_change_csect (sym, 2);
252b5132
RH		 3235
3236 demand_empty_rest_of_line ();
3237}
3238
3239/* The .extern pseudo-op. We create an undefined symbol. */
3240
3241static void
3242ppc_extern (ignore)
5480ccf3 3243 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3244{
3245 char *name;
3246 char endc;
3247
3248 name = input_line_pointer;
3249 endc = get_symbol_end ();
3250
3251 (void) symbol_find_or_make (name);
3252
3253 *input_line_pointer = endc;
3254
3255 demand_empty_rest_of_line ();
3256}
3257
3258/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3259
3260static void
3261ppc_lglobl (ignore)
5480ccf3 3262 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3263{
3264 char *name;
3265 char endc;
3266 symbolS *sym;
3267
3268 name = input_line_pointer;
3269 endc = get_symbol_end ();
3270
3271 sym = symbol_find_or_make (name);
3272
3273 *input_line_pointer = endc;
3274
809ffe0d 3275 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3276
3277 demand_empty_rest_of_line ();
3278}
3279
3280/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3281 although I don't know why it bothers. */
3282
3283static void
3284ppc_rename (ignore)
5480ccf3 3285 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3286{
3287 char *name;
3288 char endc;
3289 symbolS *sym;
3290 int len;
3291
3292 name = input_line_pointer;
3293 endc = get_symbol_end ();
3294
3295 sym = symbol_find_or_make (name);
3296
3297 *input_line_pointer = endc;
3298
3299 if (*input_line_pointer != ',')
3300 {
3301 as_bad (_("missing rename string"));
3302 ignore_rest_of_line ();
3303 return;
3304 }
3305 ++input_line_pointer;
3306
809ffe0d 3307 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3308
3309 demand_empty_rest_of_line ();
3310}
3311
3312/* The .stabx pseudo-op. This is similar to a normal .stabs
3313 pseudo-op, but slightly different. A sample is
3314 .stabx "main:F-1",.main,142,0
3315 The first argument is the symbol name to create. The second is the
3316 value, and the third is the storage class. The fourth seems to be
3317 always zero, and I am assuming it is the type. */
3318
3319static void
3320ppc_stabx (ignore)
5480ccf3 3321 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3322{
3323 char *name;
3324 int len;
3325 symbolS *sym;
3326 expressionS exp;
3327
3328 name = demand_copy_C_string (&len);
3329
3330 if (*input_line_pointer != ',')
3331 {
3332 as_bad (_("missing value"));
3333 return;
3334 }
3335 ++input_line_pointer;
3336
b34976b6 3337 ppc_stab_symbol = TRUE;
252b5132 3338 sym = symbol_make (name);
b34976b6 3339 ppc_stab_symbol = FALSE;
252b5132 3340
809ffe0d 3341 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3342
3343 (void) expression (&exp);
3344
3345 switch (exp.X_op)
3346 {
3347 case O_illegal:
3348 case O_absent:
3349 case O_big:
3350 as_bad (_("illegal .stabx expression; zero assumed"));
3351 exp.X_add_number = 0;
3352 /* Fall through. */
3353 case O_constant:
3354 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3355 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3356 break;
3357
3358 case O_symbol:
3359 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3360 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3361 else
3362 {
3363 S_SET_VALUE (sym,
3364 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3365 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3366 }
3367 break;
3368
3369 default:
3370 /* The value is some complex expression. This will probably
99a814a1
AM		 3371 fail at some later point, but this is probably the right
3372 thing to do here. */
809ffe0d 3373 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3374 break;
3375 }
3376
3377 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3378 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3379
3380 if (*input_line_pointer != ',')
3381 {
3382 as_bad (_("missing class"));
3383 return;
3384 }
3385 ++input_line_pointer;
3386
3387 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3388
3389 if (*input_line_pointer != ',')
3390 {
3391 as_bad (_("missing type"));
3392 return;
3393 }
3394 ++input_line_pointer;
3395
3396 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3397
809ffe0d 3398 symbol_get_tc (sym)->output = 1;
252b5132 3399
6877bb43 3400 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3401
809ffe0d 3402 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3403
41ea10b1 3404 /* In this case :
99a814a1 3405
41ea10b1
TR		 3406 .bs name
3407 .stabx "z",arrays_,133,0
3408 .es
99a814a1 3409
41ea10b1 3410 .comm arrays_,13768,3
99a814a1 3411
41ea10b1
TR		 3412 resolve_symbol_value will copy the exp's "within" into sym's when the
3413 offset is 0. Since this seems to be corner case problem,
3414 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3415 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3416
3417 if (exp.X_op == O_symbol)
41ea10b1
TR		 3418 {
3419 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3420 }
6877bb43 3421 }
99a814a1 3422
252b5132
RH		 3423 if (exp.X_op != O_symbol
3424 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3425 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3426 ppc_frob_label (sym);
3427 else
3428 {
3429 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3430 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3431 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3432 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3433 }
3434
3435 demand_empty_rest_of_line ();
3436}
3437
3438/* The .function pseudo-op. This takes several arguments. The first
3439 argument seems to be the external name of the symbol. The second
67c1ffbe 3440 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3441 uses the same name for both. I have no idea what the third and
3442 fourth arguments are meant to be. The optional fifth argument is
3443 an expression for the size of the function. In COFF this symbol
3444 gets an aux entry like that used for a csect. */
3445
3446static void
3447ppc_function (ignore)
5480ccf3 3448 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3449{
3450 char *name;
3451 char endc;
3452 char *s;
3453 symbolS *ext_sym;
3454 symbolS *lab_sym;
3455
3456 name = input_line_pointer;
3457 endc = get_symbol_end ();
3458
3459 /* Ignore any [PR] suffix. */
3460 name = ppc_canonicalize_symbol_name (name);
3461 s = strchr (name, '[');
3462 if (s != (char *) NULL
3463 && strcmp (s + 1, "PR]") == 0)
3464 *s = '\0';
3465
3466 ext_sym = symbol_find_or_make (name);
3467
3468 *input_line_pointer = endc;
3469
3470 if (*input_line_pointer != ',')
3471 {
3472 as_bad (_("missing symbol name"));
3473 ignore_rest_of_line ();
3474 return;
3475 }
3476 ++input_line_pointer;
3477
3478 name = input_line_pointer;
3479 endc = get_symbol_end ();
3480
3481 lab_sym = symbol_find_or_make (name);
3482
3483 *input_line_pointer = endc;
3484
3485 if (ext_sym != lab_sym)
3486 {
809ffe0d
ILT		 3487 expressionS exp;
3488
3489 exp.X_op = O_symbol;
3490 exp.X_add_symbol = lab_sym;
3491 exp.X_op_symbol = NULL;
3492 exp.X_add_number = 0;
3493 exp.X_unsigned = 0;
3494 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3495 }
3496
809ffe0d
ILT		 3497 if (symbol_get_tc (ext_sym)->class == -1)
3498 symbol_get_tc (ext_sym)->class = XMC_PR;
3499 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3500
3501 if (*input_line_pointer == ',')
3502 {
3503 expressionS ignore;
3504
3505 /* Ignore the third argument. */
3506 ++input_line_pointer;
3507 expression (&ignore);
3508 if (*input_line_pointer == ',')
3509 {
3510 /* Ignore the fourth argument. */
3511 ++input_line_pointer;
3512 expression (&ignore);
3513 if (*input_line_pointer == ',')
3514 {
3515 /* The fifth argument is the function size. */
3516 ++input_line_pointer;
809ffe0d
ILT		 3517 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3518 absolute_section,
3519 (valueT) 0,
3520 &zero_address_frag);
3521 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3522 }
3523 }
3524 }
3525
3526 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3527 SF_SET_FUNCTION (ext_sym);
3528 SF_SET_PROCESS (ext_sym);
3529 coff_add_linesym (ext_sym);
3530
3531 demand_empty_rest_of_line ();
3532}
3533
3534/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3535 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3536 with the correct line number */
5d6255fe 3537
8642cce8 3538static symbolS *saved_bi_sym = 0;
252b5132
RH		 3539
3540static void
3541ppc_bf (ignore)
5480ccf3 3542 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3543{
3544 symbolS *sym;
3545
3546 sym = symbol_make (".bf");
3547 S_SET_SEGMENT (sym, text_section);
809ffe0d 3548 symbol_set_frag (sym, frag_now);
252b5132
RH		 3549 S_SET_VALUE (sym, frag_now_fix ());
3550 S_SET_STORAGE_CLASS (sym, C_FCN);
3551
3552 coff_line_base = get_absolute_expression ();
3553
3554 S_SET_NUMBER_AUXILIARY (sym, 1);
3555 SA_SET_SYM_LNNO (sym, coff_line_base);
3556
8642cce8 3557 /* Line number for bi. */
5d6255fe 3558 if (saved_bi_sym)
8642cce8
TR		 3559 {
3560 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3561 saved_bi_sym = 0;
3562 }
5d6255fe 3563
8642cce8 3564
809ffe0d 3565 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3566
3567 ppc_frob_label (sym);
3568
3569 demand_empty_rest_of_line ();
3570}
3571
3572/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3573 ".ef", except that the line number is absolute, not relative to the
3574 most recent ".bf" symbol. */
3575
3576static void
3577ppc_ef (ignore)
5480ccf3 3578 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3579{
3580 symbolS *sym;
3581
3582 sym = symbol_make (".ef");
3583 S_SET_SEGMENT (sym, text_section);
809ffe0d 3584 symbol_set_frag (sym, frag_now);
252b5132
RH		 3585 S_SET_VALUE (sym, frag_now_fix ());
3586 S_SET_STORAGE_CLASS (sym, C_FCN);
3587 S_SET_NUMBER_AUXILIARY (sym, 1);
3588 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3589 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3590
3591 ppc_frob_label (sym);
3592
3593 demand_empty_rest_of_line ();
3594}
3595
3596/* The .bi and .ei pseudo-ops. These take a string argument and
3597 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3598 the symbol list. The value of .bi will be know when the next .bf
3599 is encountered. */
252b5132
RH		 3600
3601static void
3602ppc_biei (ei)
3603 int ei;
3604{
3605 static symbolS *last_biei;
3606
3607 char *name;
3608 int len;
3609 symbolS *sym;
3610 symbolS *look;
3611
3612 name = demand_copy_C_string (&len);
3613
3614 /* The value of these symbols is actually file offset. Here we set
3615 the value to the index into the line number entries. In
3616 ppc_frob_symbols we set the fix_line field, which will cause BFD
3617 to do the right thing. */
3618
3619 sym = symbol_make (name);
3620 /* obj-coff.c currently only handles line numbers correctly in the
3621 .text section. */
3622 S_SET_SEGMENT (sym, text_section);
3623 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3624 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3625
3626 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3627 symbol_get_tc (sym)->output = 1;
81d4177b 3628
8642cce8 3629 /* Save bi. */
5d6255fe 3630 if (ei)
8642cce8
TR		 3631 saved_bi_sym = 0;
3632 else
3633 saved_bi_sym = sym;
3634
252b5132
RH		 3635 for (look = last_biei ? last_biei : symbol_rootP;
3636 (look != (symbolS *) NULL
3637 && (S_GET_STORAGE_CLASS (look) == C_FILE
3638 || S_GET_STORAGE_CLASS (look) == C_BINCL
3639 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3640 look = symbol_next (look))
3641 ;
3642 if (look != (symbolS *) NULL)
3643 {
3644 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3645 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3646 last_biei = sym;
3647 }
3648
3649 demand_empty_rest_of_line ();
3650}
3651
3652/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3653 There is one argument, which is a csect symbol. The value of the
3654 .bs symbol is the index of this csect symbol. */
3655
3656static void
3657ppc_bs (ignore)
5480ccf3 3658 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3659{
3660 char *name;
3661 char endc;
3662 symbolS *csect;
3663 symbolS *sym;
3664
3665 if (ppc_current_block != NULL)
3666 as_bad (_("nested .bs blocks"));
3667
3668 name = input_line_pointer;
3669 endc = get_symbol_end ();
3670
3671 csect = symbol_find_or_make (name);
3672
3673 *input_line_pointer = endc;
3674
3675 sym = symbol_make (".bs");
3676 S_SET_SEGMENT (sym, now_seg);
3677 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3678 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3679 symbol_get_tc (sym)->output = 1;
252b5132 3680
809ffe0d 3681 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3682
3683 ppc_frob_label (sym);
3684
3685 ppc_current_block = sym;
3686
3687 demand_empty_rest_of_line ();
3688}
3689
3690/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3691
3692static void
3693ppc_es (ignore)
5480ccf3 3694 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3695{
3696 symbolS *sym;
3697
3698 if (ppc_current_block == NULL)
3699 as_bad (_(".es without preceding .bs"));
3700
3701 sym = symbol_make (".es");
3702 S_SET_SEGMENT (sym, now_seg);
3703 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3704 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3705 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3706
3707 ppc_frob_label (sym);
3708
3709 ppc_current_block = NULL;
3710
3711 demand_empty_rest_of_line ();
3712}
3713
3714/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3715 line number. */
3716
3717static void
3718ppc_bb (ignore)
5480ccf3 3719 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3720{
3721 symbolS *sym;
3722
3723 sym = symbol_make (".bb");
3724 S_SET_SEGMENT (sym, text_section);
809ffe0d 3725 symbol_set_frag (sym, frag_now);
252b5132
RH		 3726 S_SET_VALUE (sym, frag_now_fix ());
3727 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3728
3729 S_SET_NUMBER_AUXILIARY (sym, 1);
3730 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3731
809ffe0d 3732 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3733
3734 SF_SET_PROCESS (sym);
3735
3736 ppc_frob_label (sym);
3737
3738 demand_empty_rest_of_line ();
3739}
3740
3741/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3742 line number. */
3743
3744static void
3745ppc_eb (ignore)
5480ccf3 3746 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3747{
3748 symbolS *sym;
3749
3750 sym = symbol_make (".eb");
3751 S_SET_SEGMENT (sym, text_section);
809ffe0d 3752 symbol_set_frag (sym, frag_now);
252b5132
RH		 3753 S_SET_VALUE (sym, frag_now_fix ());
3754 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3755 S_SET_NUMBER_AUXILIARY (sym, 1);
3756 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3757 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3758
3759 SF_SET_PROCESS (sym);
3760
3761 ppc_frob_label (sym);
3762
3763 demand_empty_rest_of_line ();
3764}
3765
3766/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3767 specified name. */
3768
3769static void
3770ppc_bc (ignore)
5480ccf3 3771 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3772{
3773 char *name;
3774 int len;
3775 symbolS *sym;
3776
3777 name = demand_copy_C_string (&len);
3778 sym = symbol_make (name);
3779 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3780 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3781 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3782 S_SET_VALUE (sym, 0);
809ffe0d 3783 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3784
3785 ppc_frob_label (sym);
3786
3787 demand_empty_rest_of_line ();
3788}
3789
3790/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3791
3792static void
3793ppc_ec (ignore)
5480ccf3 3794 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3795{
3796 symbolS *sym;
3797
3798 sym = symbol_make (".ec");
3799 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3800 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3801 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3802 S_SET_VALUE (sym, 0);
809ffe0d 3803 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3804
3805 ppc_frob_label (sym);
3806
3807 demand_empty_rest_of_line ();
3808}
3809
3810/* The .toc pseudo-op. Switch to the .toc subsegment. */
3811
3812static void
3813ppc_toc (ignore)
5480ccf3 3814 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3815{
3816 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3817 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3818 else
3819 {
3820 subsegT subseg;
3821 symbolS *sym;
3822 symbolS *list;
81d4177b 3823
252b5132
RH		 3824 subseg = ppc_data_subsegment;
3825 ++ppc_data_subsegment;
3826
3827 subseg_new (segment_name (data_section), subseg);
3828 ppc_toc_frag = frag_now;
3829
3830 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3831 symbol_set_frag (sym, frag_now);
252b5132
RH		 3832 S_SET_SEGMENT (sym, data_section);
3833 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3834 symbol_get_tc (sym)->subseg = subseg;
3835 symbol_get_tc (sym)->output = 1;
3836 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3837
3838 ppc_toc_csect = sym;
81d4177b 3839
252b5132 3840 for (list = ppc_data_csects;
809ffe0d
ILT		 3841 symbol_get_tc (list)->next != (symbolS *) NULL;
3842 list = symbol_get_tc (list)->next)
252b5132 3843 ;
809ffe0d 3844 symbol_get_tc (list)->next = sym;
252b5132
RH		 3845
3846 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3847 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3848 &symbol_lastP);
252b5132
RH		 3849 }
3850
3851 ppc_current_csect = ppc_toc_csect;
3852
3853 demand_empty_rest_of_line ();
3854}
3855
3856/* The AIX assembler automatically aligns the operands of a .long or
3857 .short pseudo-op, and we want to be compatible. */
3858
3859static void
3860ppc_xcoff_cons (log_size)
3861 int log_size;
3862{
3863 frag_align (log_size, 0, 0);
3864 record_alignment (now_seg, log_size);
3865 cons (1 << log_size);
3866}
3867
3868static void
3869ppc_vbyte (dummy)
5480ccf3 3870 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3871{
3872 expressionS exp;
3873 int byte_count;
3874
3875 (void) expression (&exp);
3876
3877 if (exp.X_op != O_constant)
3878 {
3879 as_bad (_("non-constant byte count"));
3880 return;
3881 }
3882
3883 byte_count = exp.X_add_number;
3884
3885 if (*input_line_pointer != ',')
3886 {
3887 as_bad (_("missing value"));
3888 return;
3889 }
3890
3891 ++input_line_pointer;
3892 cons (byte_count);
3893}
3894
3895#endif /* OBJ_XCOFF */
0baf16f2 3896#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3897\f
3898/* The .tc pseudo-op. This is used when generating either XCOFF or
3899 ELF. This takes two or more arguments.
3900
3901 When generating XCOFF output, the first argument is the name to
3902 give to this location in the toc; this will be a symbol with class
0baf16f2 3903 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3904 this location in the TOC; often there is just one more argument, a
1049f94e 3905 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3906 depends on target word size. A 32-bit target uses 4-byte values, a
3907 64-bit target uses 8-byte values.
252b5132
RH		 3908
3909 When not generating XCOFF output, the arguments are the same, but
3910 the first argument is simply ignored. */
3911
3912static void
3913ppc_tc (ignore)
92161534 3914 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3915{
3916#ifdef OBJ_XCOFF
3917
3918 /* Define the TOC symbol name. */
3919 {
3920 char *name;
3921 char endc;
3922 symbolS *sym;
3923
3924 if (ppc_toc_csect == (symbolS *) NULL
3925 || ppc_toc_csect != ppc_current_csect)
3926 {
3927 as_bad (_(".tc not in .toc section"));
3928 ignore_rest_of_line ();
3929 return;
3930 }
3931
3932 name = input_line_pointer;
3933 endc = get_symbol_end ();
3934
3935 sym = symbol_find_or_make (name);
3936
3937 *input_line_pointer = endc;
3938
3939 if (S_IS_DEFINED (sym))
3940 {
3941 symbolS *label;
3942
809ffe0d
ILT		 3943 label = symbol_get_tc (ppc_current_csect)->within;
3944 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3945 {
3946 as_bad (_(".tc with no label"));
3947 ignore_rest_of_line ();
3948 return;
3949 }
3950
3951 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3952 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3953 S_SET_VALUE (label, S_GET_VALUE (sym));
3954
3955 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3956 ++input_line_pointer;
3957
3958 return;
3959 }
3960
3961 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3962 symbol_set_frag (sym, frag_now);
252b5132 3963 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3964 symbol_get_tc (sym)->class = XMC_TC;
3965 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3966
3967 ppc_frob_label (sym);
3968 }
3969
0baf16f2
AM		 3970#endif /* OBJ_XCOFF */
3971#ifdef OBJ_ELF
9c7977b3 3972 int align;
252b5132
RH		 3973
3974 /* Skip the TOC symbol name. */
3975 while (is_part_of_name (*input_line_pointer)
3976 || *input_line_pointer == '['
3977 || *input_line_pointer == ']'
3978 || *input_line_pointer == '{'
3979 || *input_line_pointer == '}')
3980 ++input_line_pointer;
3981
0baf16f2 3982 /* Align to a four/eight byte boundary. */
2b3c4602 3983 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3984 frag_align (align, 0, 0);
3985 record_alignment (now_seg, align);
0baf16f2 3986#endif /* OBJ_ELF */
252b5132
RH		 3987
3988 if (*input_line_pointer != ',')
3989 demand_empty_rest_of_line ();
3990 else
3991 {
3992 ++input_line_pointer;
2b3c4602 3993 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3994 }
3995}
0baf16f2
AM		 3996
3997/* Pseudo-op .machine. */
0baf16f2
AM		 3998
3999static void
4000ppc_machine (ignore)
4001 int ignore ATTRIBUTE_UNUSED;
4002{
69c040df
AM		 4003 char *cpu_string;
4004#define MAX_HISTORY 100
4005 static unsigned long *cpu_history;
4006 static int curr_hist;
4007
4008 SKIP_WHITESPACE ();
4009
4010 if (*input_line_pointer == '"')
4011 {
4012 int len;
4013 cpu_string = demand_copy_C_string (&len);
4014 }
4015 else
4016 {
4017 char c;
4018 cpu_string = input_line_pointer;
4019 c = get_symbol_end ();
4020 cpu_string = xstrdup (cpu_string);
4021 *input_line_pointer = c;
4022 }
4023
4024 if (cpu_string != NULL)
4025 {
4026 unsigned long old_cpu = ppc_cpu;
4027 char *p;
4028
4029 for (p = cpu_string; *p != 0; p++)
4030 *p = TOLOWER (*p);
4031
4032 if (strcmp (cpu_string, "push") == 0)
4033 {
4034 if (cpu_history == NULL)
4035 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4036
4037 if (curr_hist >= MAX_HISTORY)
4038 as_bad (_(".machine stack overflow"));
4039 else
4040 cpu_history[curr_hist++] = ppc_cpu;
4041 }
4042 else if (strcmp (cpu_string, "pop") == 0)
4043 {
4044 if (curr_hist <= 0)
4045 as_bad (_(".machine stack underflow"));
4046 else
4047 ppc_cpu = cpu_history[--curr_hist];
4048 }
4049 else if (parse_cpu (cpu_string))
4050 ;
4051 else
4052 as_bad (_("invalid machine `%s'"), cpu_string);
4053
4054 if (ppc_cpu != old_cpu)
4055 ppc_setup_opcodes ();
4056 }
4057
4058 demand_empty_rest_of_line ();
0baf16f2
AM		 4059}
4060
4061/* See whether a symbol is in the TOC section. */
4062
4063static int
4064ppc_is_toc_sym (sym)
4065 symbolS *sym;
4066{
4067#ifdef OBJ_XCOFF
4068 return symbol_get_tc (sym)->class == XMC_TC;
4069#endif
4070#ifdef OBJ_ELF
4071 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4072 if (ppc_obj64)
0baf16f2
AM		 4073 return strcmp (sname, ".toc") == 0;
4074 else
4075 return strcmp (sname, ".got") == 0;
4076#endif
4077}
4078#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4079\f
4080#ifdef TE_PE
4081
99a814a1 4082/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4083
4084/* Set the current section. */
4085static void
4086ppc_set_current_section (new)
4087 segT new;
4088{
4089 ppc_previous_section = ppc_current_section;
4090 ppc_current_section = new;
4091}
4092
4093/* pseudo-op: .previous
4094 behaviour: toggles the current section with the previous section.
4095 errors: None
99a814a1
AM		 4096 warnings: "No previous section" */
4097
252b5132 4098static void
99a814a1 4099ppc_previous (ignore)
5480ccf3 4100 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4101{
4102 symbolS *tmp;
4103
81d4177b 4104 if (ppc_previous_section == NULL)
252b5132 4105 {
99a814a1 4106 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4107 return;
4108 }
4109
99a814a1 4110 subseg_set (ppc_previous_section, 0);
252b5132 4111
99a814a1 4112 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4113}
4114
4115/* pseudo-op: .pdata
4116 behaviour: predefined read only data section
b34976b6 4117 double word aligned
252b5132
RH		 4118 errors: None
4119 warnings: None
4120 initial: .section .pdata "adr3"
b34976b6 4121 a - don't know -- maybe a misprint
252b5132
RH		 4122 d - initialized data
4123 r - readable
4124 3 - double word aligned (that would be 4 byte boundary)
4125
4126 commentary:
4127 Tag index tables (also known as the function table) for exception
99a814a1 4128 handling, debugging, etc. */
252b5132 4129
252b5132 4130static void
99a814a1 4131ppc_pdata (ignore)
5480ccf3 4132 int ignore ATTRIBUTE_UNUSED;
252b5132 4133{
81d4177b 4134 if (pdata_section == 0)
252b5132
RH		 4135 {
4136 pdata_section = subseg_new (".pdata", 0);
81d4177b 4137
252b5132
RH		 4138 bfd_set_section_flags (stdoutput, pdata_section,
4139 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4140 | SEC_READONLY | SEC_DATA ));
81d4177b 4141
252b5132
RH		 4142 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4143 }
4144 else
4145 {
99a814a1 4146 pdata_section = subseg_new (".pdata", 0);
252b5132 4147 }
99a814a1 4148 ppc_set_current_section (pdata_section);
252b5132
RH		 4149}
4150
4151/* pseudo-op: .ydata
4152 behaviour: predefined read only data section
b34976b6 4153 double word aligned
252b5132
RH		 4154 errors: None
4155 warnings: None
4156 initial: .section .ydata "drw3"
b34976b6 4157 a - don't know -- maybe a misprint
252b5132
RH		 4158 d - initialized data
4159 r - readable
4160 3 - double word aligned (that would be 4 byte boundary)
4161 commentary:
4162 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4163 debugging, etc. */
4164
252b5132 4165static void
99a814a1 4166ppc_ydata (ignore)
5480ccf3 4167 int ignore ATTRIBUTE_UNUSED;
252b5132 4168{
81d4177b 4169 if (ydata_section == 0)
252b5132
RH		 4170 {
4171 ydata_section = subseg_new (".ydata", 0);
4172 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4173 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4174 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4175
4176 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4177 }
4178 else
4179 {
4180 ydata_section = subseg_new (".ydata", 0);
4181 }
99a814a1 4182 ppc_set_current_section (ydata_section);
252b5132
RH		 4183}
4184
4185/* pseudo-op: .reldata
4186 behaviour: predefined read write data section
b34976b6 4187 double word aligned (4-byte)
252b5132
RH		 4188 FIXME: relocation is applied to it
4189 FIXME: what's the difference between this and .data?
4190 errors: None
4191 warnings: None
4192 initial: .section .reldata "drw3"
4193 d - initialized data
4194 r - readable
4195 w - writeable
4196 3 - double word aligned (that would be 8 byte boundary)
4197
4198 commentary:
4199 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4200 function descriptors, etc. */
4201
252b5132 4202static void
99a814a1 4203ppc_reldata (ignore)
5480ccf3 4204 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4205{
4206 if (reldata_section == 0)
4207 {
4208 reldata_section = subseg_new (".reldata", 0);
4209
4210 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4211 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4212 | SEC_DATA));
252b5132
RH		 4213
4214 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4215 }
4216 else
4217 {
4218 reldata_section = subseg_new (".reldata", 0);
4219 }
99a814a1 4220 ppc_set_current_section (reldata_section);
252b5132
RH		 4221}
4222
4223/* pseudo-op: .rdata
4224 behaviour: predefined read only data section
b34976b6 4225 double word aligned
252b5132
RH		 4226 errors: None
4227 warnings: None
4228 initial: .section .rdata "dr3"
4229 d - initialized data
4230 r - readable
99a814a1
AM		 4231 3 - double word aligned (that would be 4 byte boundary) */
4232
252b5132 4233static void
99a814a1 4234ppc_rdata (ignore)
5480ccf3 4235 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4236{
4237 if (rdata_section == 0)
4238 {
4239 rdata_section = subseg_new (".rdata", 0);
4240 bfd_set_section_flags (stdoutput, rdata_section,
4241 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4242 | SEC_READONLY | SEC_DATA ));
4243
4244 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4245 }
4246 else
4247 {
4248 rdata_section = subseg_new (".rdata", 0);
4249 }
99a814a1 4250 ppc_set_current_section (rdata_section);
252b5132
RH		 4251}
4252
4253/* pseudo-op: .ualong
81d4177b 4254 behaviour: much like .int, with the exception that no alignment is
b34976b6 4255 performed.
252b5132
RH		 4256 FIXME: test the alignment statement
4257 errors: None
99a814a1
AM		 4258 warnings: None */
4259
252b5132 4260static void
99a814a1 4261ppc_ualong (ignore)
5480ccf3 4262 int ignore ATTRIBUTE_UNUSED;
252b5132 4263{
99a814a1
AM		 4264 /* Try for long. */
4265 cons (4);
252b5132
RH		 4266}
4267
4268/* pseudo-op: .znop <symbol name>
4269 behaviour: Issue a nop instruction
b34976b6 4270 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4271 the supplied symbol name.
4272 errors: None
99a814a1
AM		 4273 warnings: Missing symbol name */
4274
252b5132 4275static void
99a814a1 4276ppc_znop (ignore)
5480ccf3 4277 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4278{
4279 unsigned long insn;
4280 const struct powerpc_opcode *opcode;
4281 expressionS ex;
4282 char *f;
252b5132 4283 symbolS *sym;
252b5132
RH		 4284 char *symbol_name;
4285 char c;
4286 char *name;
4287 unsigned int exp;
4288 flagword flags;
4289 asection *sec;
4290
99a814a1 4291 /* Strip out the symbol name. */
252b5132
RH		 4292 symbol_name = input_line_pointer;
4293 c = get_symbol_end ();
4294
4295 name = xmalloc (input_line_pointer - symbol_name + 1);
4296 strcpy (name, symbol_name);
4297
4298 sym = symbol_find_or_make (name);
4299
4300 *input_line_pointer = c;
4301
4302 SKIP_WHITESPACE ();
4303
4304 /* Look up the opcode in the hash table. */
4305 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4306
99a814a1 4307 /* Stick in the nop. */
252b5132
RH		 4308 insn = opcode->opcode;
4309
4310 /* Write out the instruction. */
4311 f = frag_more (4);
4312 md_number_to_chars (f, insn, 4);
4313 fix_new (frag_now,
4314 f - frag_now->fr_literal,
4315 4,
4316 sym,
4317 0,
4318 0,
4319 BFD_RELOC_16_GOT_PCREL);
4320
4321}
4322
81d4177b
KH		 4323/* pseudo-op:
4324 behaviour:
4325 errors:
99a814a1
AM		 4326 warnings: */
4327
252b5132 4328static void
99a814a1 4329ppc_pe_comm (lcomm)
252b5132
RH		 4330 int lcomm;
4331{
4332 register char *name;
4333 register char c;
4334 register char *p;
4335 offsetT temp;
4336 register symbolS *symbolP;
4337 offsetT align;
4338
4339 name = input_line_pointer;
4340 c = get_symbol_end ();
4341
99a814a1 4342 /* just after name is now '\0'. */
252b5132
RH		 4343 p = input_line_pointer;
4344 *p = c;
4345 SKIP_WHITESPACE ();
4346 if (*input_line_pointer != ',')
4347 {
4348 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4349 ignore_rest_of_line ();
4350 return;
4351 }
4352
4353 input_line_pointer++; /* skip ',' */
4354 if ((temp = get_absolute_expression ()) < 0)
4355 {
4356 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4357 ignore_rest_of_line ();
4358 return;
4359 }
4360
4361 if (! lcomm)
4362 {
4363 /* The third argument to .comm is the alignment. */
4364 if (*input_line_pointer != ',')
4365 align = 3;
4366 else
4367 {
4368 ++input_line_pointer;
4369 align = get_absolute_expression ();
4370 if (align <= 0)
4371 {
4372 as_warn (_("ignoring bad alignment"));
4373 align = 3;
4374 }
4375 }
4376 }
4377
4378 *p = 0;
4379 symbolP = symbol_find_or_make (name);
4380
4381 *p = c;
4382 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4383 {
4384 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4385 S_GET_NAME (symbolP));
4386 ignore_rest_of_line ();
4387 return;
4388 }
4389
4390 if (S_GET_VALUE (symbolP))
4391 {
4392 if (S_GET_VALUE (symbolP) != (valueT) temp)
4393 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4394 S_GET_NAME (symbolP),
4395 (long) S_GET_VALUE (symbolP),
4396 (long) temp);
4397 }
4398 else
4399 {
4400 S_SET_VALUE (symbolP, (valueT) temp);
4401 S_SET_EXTERNAL (symbolP);
4402 }
4403
4404 demand_empty_rest_of_line ();
4405}
4406
4407/*
4408 * implement the .section pseudo op:
4409 * .section name {, "flags"}
4410 * ^ ^
4411 * | +--- optional flags: 'b' for bss
4412 * | 'i' for info
4413 * +-- section name 'l' for lib
4414 * 'n' for noload
4415 * 'o' for over
4416 * 'w' for data
4417 * 'd' (apparently m88k for data)
4418 * 'x' for text
4419 * But if the argument is not a quoted string, treat it as a
4420 * subsegment number.
4421 *
4422 * FIXME: this is a copy of the section processing from obj-coff.c, with
4423 * additions/changes for the moto-pas assembler support. There are three
4424 * categories:
4425 *
81d4177b 4426 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4427 * setting bits that bfd probably neither understands or uses. The
4428 * correct approach (?) will have to incorporate extra fields attached
4429 * to the section to hold the system specific stuff. (krk)
4430 *
4431 * Section Contents:
4432 * 'a' - unknown - referred to in documentation, but no definition supplied
4433 * 'c' - section has code
4434 * 'd' - section has initialized data
4435 * 'u' - section has uninitialized data
4436 * 'i' - section contains directives (info)
4437 * 'n' - section can be discarded
4438 * 'R' - remove section at link time
4439 *
4440 * Section Protection:
4441 * 'r' - section is readable
4442 * 'w' - section is writeable
4443 * 'x' - section is executable
4444 * 's' - section is sharable
4445 *
4446 * Section Alignment:
4447 * '0' - align to byte boundary
4448 * '1' - align to halfword undary
4449 * '2' - align to word boundary
4450 * '3' - align to doubleword boundary
4451 * '4' - align to quadword boundary
4452 * '5' - align to 32 byte boundary
4453 * '6' - align to 64 byte boundary
4454 *
4455 */
4456
4457void
4458ppc_pe_section (ignore)
5480ccf3 4459 int ignore ATTRIBUTE_UNUSED;
252b5132 4460{
99a814a1 4461 /* Strip out the section name. */
252b5132
RH		 4462 char *section_name;
4463 char c;
4464 char *name;
4465 unsigned int exp;
4466 flagword flags;
4467 segT sec;
4468 int align;
4469
4470 section_name = input_line_pointer;
4471 c = get_symbol_end ();
4472
4473 name = xmalloc (input_line_pointer - section_name + 1);
4474 strcpy (name, section_name);
4475
4476 *input_line_pointer = c;
4477
4478 SKIP_WHITESPACE ();
4479
4480 exp = 0;
4481 flags = SEC_NO_FLAGS;
4482
4483 if (strcmp (name, ".idata$2") == 0)
4484 {
4485 align = 0;
4486 }
4487 else if (strcmp (name, ".idata$3") == 0)
4488 {
4489 align = 0;
4490 }
4491 else if (strcmp (name, ".idata$4") == 0)
4492 {
4493 align = 2;
4494 }
4495 else if (strcmp (name, ".idata$5") == 0)
4496 {
4497 align = 2;
4498 }
4499 else if (strcmp (name, ".idata$6") == 0)
4500 {
4501 align = 1;
4502 }
4503 else
99a814a1
AM		 4504 /* Default alignment to 16 byte boundary. */
4505 align = 4;
252b5132
RH		 4506
4507 if (*input_line_pointer == ',')
4508 {
4509 ++input_line_pointer;
4510 SKIP_WHITESPACE ();
4511 if (*input_line_pointer != '"')
4512 exp = get_absolute_expression ();
4513 else
4514 {
4515 ++input_line_pointer;
4516 while (*input_line_pointer != '"'
4517 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4518 {
4519 switch (*input_line_pointer)
4520 {
4521 /* Section Contents */
4522 case 'a': /* unknown */
4523 as_bad (_("Unsupported section attribute -- 'a'"));
4524 break;
4525 case 'c': /* code section */
81d4177b 4526 flags |= SEC_CODE;
252b5132
RH		 4527 break;
4528 case 'd': /* section has initialized data */
4529 flags |= SEC_DATA;
4530 break;
4531 case 'u': /* section has uninitialized data */
4532 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4533 in winnt.h */
4534 flags |= SEC_ROM;
4535 break;
4536 case 'i': /* section contains directives (info) */
4537 /* FIXME: This is IMAGE_SCN_LNK_INFO
4538 in winnt.h */
4539 flags |= SEC_HAS_CONTENTS;
4540 break;
4541 case 'n': /* section can be discarded */
81d4177b 4542 flags &=~ SEC_LOAD;
252b5132
RH		 4543 break;
4544 case 'R': /* Remove section at link time */
4545 flags |= SEC_NEVER_LOAD;
4546 break;
4547
4548 /* Section Protection */
4549 case 'r': /* section is readable */
4550 flags |= IMAGE_SCN_MEM_READ;
4551 break;
4552 case 'w': /* section is writeable */
4553 flags |= IMAGE_SCN_MEM_WRITE;
4554 break;
4555 case 'x': /* section is executable */
4556 flags |= IMAGE_SCN_MEM_EXECUTE;
4557 break;
4558 case 's': /* section is sharable */
4559 flags |= IMAGE_SCN_MEM_SHARED;
4560 break;
4561
4562 /* Section Alignment */
4563 case '0': /* align to byte boundary */
4564 flags |= IMAGE_SCN_ALIGN_1BYTES;
4565 align = 0;
4566 break;
4567 case '1': /* align to halfword boundary */
4568 flags |= IMAGE_SCN_ALIGN_2BYTES;
4569 align = 1;
4570 break;
4571 case '2': /* align to word boundary */
4572 flags |= IMAGE_SCN_ALIGN_4BYTES;
4573 align = 2;
4574 break;
4575 case '3': /* align to doubleword boundary */
4576 flags |= IMAGE_SCN_ALIGN_8BYTES;
4577 align = 3;
4578 break;
4579 case '4': /* align to quadword boundary */
4580 flags |= IMAGE_SCN_ALIGN_16BYTES;
4581 align = 4;
4582 break;
4583 case '5': /* align to 32 byte boundary */
4584 flags |= IMAGE_SCN_ALIGN_32BYTES;
4585 align = 5;
4586 break;
4587 case '6': /* align to 64 byte boundary */
4588 flags |= IMAGE_SCN_ALIGN_64BYTES;
4589 align = 6;
4590 break;
4591
4592 default:
99a814a1
AM		 4593 as_bad (_("unknown section attribute '%c'"),
4594 *input_line_pointer);
252b5132
RH		 4595 break;
4596 }
4597 ++input_line_pointer;
4598 }
4599 if (*input_line_pointer == '"')
4600 ++input_line_pointer;
4601 }
4602 }
4603
4604 sec = subseg_new (name, (subsegT) exp);
4605
99a814a1 4606 ppc_set_current_section (sec);
252b5132
RH		 4607
4608 if (flags != SEC_NO_FLAGS)
4609 {
4610 if (! bfd_set_section_flags (stdoutput, sec, flags))
4611 as_bad (_("error setting flags for \"%s\": %s"),
4612 bfd_section_name (stdoutput, sec),
4613 bfd_errmsg (bfd_get_error ()));
4614 }
4615
99a814a1 4616 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4617
4618}
4619
4620static void
4621ppc_pe_function (ignore)
5480ccf3 4622 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4623{
4624 char *name;
4625 char endc;
4626 symbolS *ext_sym;
4627
4628 name = input_line_pointer;
4629 endc = get_symbol_end ();
4630
4631 ext_sym = symbol_find_or_make (name);
4632
4633 *input_line_pointer = endc;
4634
4635 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4636 SF_SET_FUNCTION (ext_sym);
4637 SF_SET_PROCESS (ext_sym);
4638 coff_add_linesym (ext_sym);
4639
4640 demand_empty_rest_of_line ();
4641}
4642
4643static void
4644ppc_pe_tocd (ignore)
5480ccf3 4645 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4646{
4647 if (tocdata_section == 0)
4648 {
4649 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4650 /* FIXME: section flags won't work. */
252b5132
RH		 4651 bfd_set_section_flags (stdoutput, tocdata_section,
4652 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4653 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4654
4655 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4656 }
4657 else
4658 {
4659 rdata_section = subseg_new (".tocd", 0);
4660 }
4661
99a814a1 4662 ppc_set_current_section (tocdata_section);
252b5132
RH		 4663
4664 demand_empty_rest_of_line ();
4665}
4666
4667/* Don't adjust TOC relocs to use the section symbol. */
4668
4669int
4670ppc_pe_fix_adjustable (fix)
4671 fixS *fix;
4672{
4673 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4674}
4675
4676#endif
4677\f
4678#ifdef OBJ_XCOFF
4679
4680/* XCOFF specific symbol and file handling. */
4681
4682/* Canonicalize the symbol name. We use the to force the suffix, if
4683 any, to use square brackets, and to be in upper case. */
4684
4685char *
4686ppc_canonicalize_symbol_name (name)
4687 char *name;
4688{
4689 char *s;
4690
4691 if (ppc_stab_symbol)
4692 return name;
4693
4694 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4695 ;
4696 if (*s != '\0')
4697 {
4698 char brac;
4699
4700 if (*s == '[')
4701 brac = ']';
4702 else
4703 {
4704 *s = '[';
4705 brac = '}';
4706 }
4707
4708 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4709 *s = TOUPPER (*s);
252b5132
RH		 4710
4711 if (*s == '\0' || s[1] != '\0')
4712 as_bad (_("bad symbol suffix"));
4713
4714 *s = ']';
4715 }
4716
4717 return name;
4718}
4719
4720/* Set the class of a symbol based on the suffix, if any. This is
4721 called whenever a new symbol is created. */
4722
4723void
4724ppc_symbol_new_hook (sym)
4725 symbolS *sym;
4726{
809ffe0d 4727 struct ppc_tc_sy *tc;
252b5132
RH		 4728 const char *s;
4729
809ffe0d
ILT		 4730 tc = symbol_get_tc (sym);
4731 tc->next = NULL;
4732 tc->output = 0;
4733 tc->class = -1;
4734 tc->real_name = NULL;
4735 tc->subseg = 0;
4736 tc->align = 0;
4737 tc->size = NULL;
4738 tc->within = NULL;
252b5132
RH		 4739
4740 if (ppc_stab_symbol)
4741 return;
4742
4743 s = strchr (S_GET_NAME (sym), '[');
4744 if (s == (const char *) NULL)
4745 {
4746 /* There is no suffix. */
4747 return;
4748 }
4749
4750 ++s;
4751
4752 switch (s[0])
4753 {
4754 case 'B':
4755 if (strcmp (s, "BS]") == 0)
809ffe0d 4756 tc->class = XMC_BS;
252b5132
RH		 4757 break;
4758 case 'D':
4759 if (strcmp (s, "DB]") == 0)
809ffe0d 4760 tc->class = XMC_DB;
252b5132 4761 else if (strcmp (s, "DS]") == 0)
809ffe0d 4762 tc->class = XMC_DS;
252b5132
RH		 4763 break;
4764 case 'G':
4765 if (strcmp (s, "GL]") == 0)
809ffe0d 4766 tc->class = XMC_GL;
252b5132
RH		 4767 break;
4768 case 'P':
4769 if (strcmp (s, "PR]") == 0)
809ffe0d 4770 tc->class = XMC_PR;
252b5132
RH		 4771 break;
4772 case 'R':
4773 if (strcmp (s, "RO]") == 0)
809ffe0d 4774 tc->class = XMC_RO;
252b5132 4775 else if (strcmp (s, "RW]") == 0)
809ffe0d 4776 tc->class = XMC_RW;
252b5132
RH		 4777 break;
4778 case 'S':
4779 if (strcmp (s, "SV]") == 0)
809ffe0d 4780 tc->class = XMC_SV;
252b5132
RH		 4781 break;
4782 case 'T':
4783 if (strcmp (s, "TC]") == 0)
809ffe0d 4784 tc->class = XMC_TC;
252b5132 4785 else if (strcmp (s, "TI]") == 0)
809ffe0d 4786 tc->class = XMC_TI;
252b5132 4787 else if (strcmp (s, "TB]") == 0)
809ffe0d 4788 tc->class = XMC_TB;
252b5132 4789 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4790 tc->class = XMC_TC0;
252b5132
RH		 4791 break;
4792 case 'U':
4793 if (strcmp (s, "UA]") == 0)
809ffe0d 4794 tc->class = XMC_UA;
252b5132 4795 else if (strcmp (s, "UC]") == 0)
809ffe0d 4796 tc->class = XMC_UC;
252b5132
RH		 4797 break;
4798 case 'X':
4799 if (strcmp (s, "XO]") == 0)
809ffe0d 4800 tc->class = XMC_XO;
252b5132
RH		 4801 break;
4802 }
4803
809ffe0d 4804 if (tc->class == -1)
252b5132
RH		 4805 as_bad (_("Unrecognized symbol suffix"));
4806}
4807
4808/* Set the class of a label based on where it is defined. This
4809 handles symbols without suffixes. Also, move the symbol so that it
4810 follows the csect symbol. */
4811
4812void
4813ppc_frob_label (sym)
4814 symbolS *sym;
4815{
4816 if (ppc_current_csect != (symbolS *) NULL)
4817 {
809ffe0d
ILT		 4818 if (symbol_get_tc (sym)->class == -1)
4819 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4820
4821 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4822 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4823 &symbol_rootP, &symbol_lastP);
4824 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4825 }
4826}
4827
4828/* This variable is set by ppc_frob_symbol if any absolute symbols are
4829 seen. It tells ppc_adjust_symtab whether it needs to look through
4830 the symbols. */
4831
b34976b6 4832static bfd_boolean ppc_saw_abs;
252b5132
RH		 4833
4834/* Change the name of a symbol just before writing it out. Set the
4835 real name if the .rename pseudo-op was used. Otherwise, remove any
4836 class suffix. Return 1 if the symbol should not be included in the
4837 symbol table. */
4838
4839int
4840ppc_frob_symbol (sym)
4841 symbolS *sym;
4842{
4843 static symbolS *ppc_last_function;
4844 static symbolS *set_end;
4845
4846 /* Discard symbols that should not be included in the output symbol
4847 table. */
809ffe0d
ILT		 4848 if (! symbol_used_in_reloc_p (sym)
4849 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4850 || (! S_IS_EXTERNAL (sym)
809ffe0d 4851 && ! symbol_get_tc (sym)->output
252b5132
RH		 4852 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4853 return 1;
4854
a161fe53
AM		 4855 /* This one will disappear anyway. Don't make a csect sym for it. */
4856 if (sym == abs_section_sym)
4857 return 1;
4858
809ffe0d
ILT		 4859 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4860 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4861 else
4862 {
4863 const char *name;
4864 const char *s;
4865
4866 name = S_GET_NAME (sym);
4867 s = strchr (name, '[');
4868 if (s != (char *) NULL)
4869 {
4870 unsigned int len;
4871 char *snew;
4872
4873 len = s - name;
4874 snew = xmalloc (len + 1);
4875 memcpy (snew, name, len);
4876 snew[len] = '\0';
4877
4878 S_SET_NAME (sym, snew);
4879 }
4880 }
4881
4882 if (set_end != (symbolS *) NULL)
4883 {
4884 SA_SET_SYM_ENDNDX (set_end, sym);
4885 set_end = NULL;
4886 }
4887
4888 if (SF_GET_FUNCTION (sym))
4889 {
4890 if (ppc_last_function != (symbolS *) NULL)
4891 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4892 ppc_last_function = sym;
809ffe0d 4893 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4894 {
6386f3a7 4895 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4896 SA_SET_SYM_FSIZE (sym,
4897 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4898 }
4899 }
4900 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4901 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4902 {
4903 if (ppc_last_function == (symbolS *) NULL)
4904 as_bad (_(".ef with no preceding .function"));
4905 else
4906 {
4907 set_end = ppc_last_function;
4908 ppc_last_function = NULL;
4909
4910 /* We don't have a C_EFCN symbol, but we need to force the
4911 COFF backend to believe that it has seen one. */
4912 coff_last_function = NULL;
4913 }
4914 }
4915
4916 if (! S_IS_EXTERNAL (sym)
809ffe0d 4917 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4918 && S_GET_STORAGE_CLASS (sym) != C_FILE
4919 && S_GET_STORAGE_CLASS (sym) != C_FCN
4920 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4921 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4922 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4923 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4924 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4925 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4926 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4927
4928 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4929 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4930 {
4931 int i;
4932 union internal_auxent *a;
4933
4934 /* Create a csect aux. */
4935 i = S_GET_NUMBER_AUXILIARY (sym);
4936 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4937 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4938 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4939 {
4940 /* This is the TOC table. */
4941 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4942 a->x_csect.x_scnlen.l = 0;
4943 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4944 }
809ffe0d 4945 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4946 {
4947 /* This is a csect symbol. x_scnlen is the size of the
4948 csect. */
809ffe0d 4949 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4950 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4951 S_GET_SEGMENT (sym))
4952 - S_GET_VALUE (sym));
4953 else
4954 {
6386f3a7 4955 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4956 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4957 - S_GET_VALUE (sym));
4958 }
809ffe0d 4959 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4960 }
4961 else if (S_GET_SEGMENT (sym) == bss_section)
4962 {
4963 /* This is a common symbol. */
809ffe0d
ILT		 4964 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4965 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4966 if (S_IS_EXTERNAL (sym))
809ffe0d 4967 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4968 else
809ffe0d 4969 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4970 }
4971 else if (S_GET_SEGMENT (sym) == absolute_section)
4972 {
4973 /* This is an absolute symbol. The csect will be created by
99a814a1 4974 ppc_adjust_symtab. */
b34976b6 4975 ppc_saw_abs = TRUE;
252b5132 4976 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4977 if (symbol_get_tc (sym)->class == -1)
4978 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4979 }
4980 else if (! S_IS_DEFINED (sym))
4981 {
4982 /* This is an external symbol. */
4983 a->x_csect.x_scnlen.l = 0;
4984 a->x_csect.x_smtyp = XTY_ER;
4985 }
809ffe0d 4986 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4987 {
4988 symbolS *next;
4989
4990 /* This is a TOC definition. x_scnlen is the size of the
4991 TOC entry. */
4992 next = symbol_next (sym);
809ffe0d 4993 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4994 next = symbol_next (next);
4995 if (next == (symbolS *) NULL
809ffe0d 4996 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4997 {
4998 if (ppc_after_toc_frag == (fragS *) NULL)
4999 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5000 data_section)
5001 - S_GET_VALUE (sym));
5002 else
5003 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5004 - S_GET_VALUE (sym));
5005 }
5006 else
5007 {
6386f3a7 5008 resolve_symbol_value (next);
252b5132
RH		 5009 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5010 - S_GET_VALUE (sym));
5011 }
5012 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5013 }
5014 else
5015 {
5016 symbolS *csect;
5017
5018 /* This is a normal symbol definition. x_scnlen is the
5019 symbol index of the containing csect. */
5020 if (S_GET_SEGMENT (sym) == text_section)
5021 csect = ppc_text_csects;
5022 else if (S_GET_SEGMENT (sym) == data_section)
5023 csect = ppc_data_csects;
5024 else
5025 abort ();
5026
5027 /* Skip the initial dummy symbol. */
809ffe0d 5028 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5029
5030 if (csect == (symbolS *) NULL)
5031 {
5032 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5033 a->x_csect.x_scnlen.l = 0;
5034 }
5035 else
5036 {
809ffe0d 5037 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5038 {
6386f3a7 5039 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5040 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5041 > S_GET_VALUE (sym))
252b5132 5042 break;
809ffe0d 5043 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5044 }
5045
809ffe0d
ILT		 5046 a->x_csect.x_scnlen.p =
5047 coffsymbol (symbol_get_bfdsym (csect))->native;
5048 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5049 1;
252b5132
RH		 5050 }
5051 a->x_csect.x_smtyp = XTY_LD;
5052 }
81d4177b 5053
252b5132
RH		 5054 a->x_csect.x_parmhash = 0;
5055 a->x_csect.x_snhash = 0;
809ffe0d 5056 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5057 a->x_csect.x_smclas = XMC_PR;
5058 else
809ffe0d 5059 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5060 a->x_csect.x_stab = 0;
5061 a->x_csect.x_snstab = 0;
5062
5063 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5064 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5065 }
5066 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5067 {
5068 /* We want the value to be the symbol index of the referenced
5069 csect symbol. BFD will do that for us if we set the right
5070 flags. */
b782de16
AM		 5071 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5072 combined_entry_type *c = coffsymbol (bsym)->native;
5073
5074 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5075 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5076 }
5077 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5078 {
5079 symbolS *block;
5080 symbolS *csect;
5081
5082 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5083 block = symbol_get_tc (sym)->within;
5084 csect = symbol_get_tc (block)->within;
6386f3a7 5085 resolve_symbol_value (csect);
252b5132
RH		 5086 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5087 }
5088 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5089 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5090 {
5091 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5092 BFD will do that for us if we set the right flags. We have
5093 already set the value correctly. */
809ffe0d 5094 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5095 }
5096
5097 return 0;
5098}
5099
5100/* Adjust the symbol table. This creates csect symbols for all
5101 absolute symbols. */
5102
5103void
5104ppc_adjust_symtab ()
5105{
5106 symbolS *sym;
5107
5108 if (! ppc_saw_abs)
5109 return;
5110
5111 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5112 {
5113 symbolS *csect;
5114 int i;
5115 union internal_auxent *a;
5116
5117 if (S_GET_SEGMENT (sym) != absolute_section)
5118 continue;
5119
5120 csect = symbol_create (".abs[XO]", absolute_section,
5121 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5122 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5123 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5124 i = S_GET_NUMBER_AUXILIARY (csect);
5125 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5126 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5127 a->x_csect.x_scnlen.l = 0;
5128 a->x_csect.x_smtyp = XTY_SD;
5129 a->x_csect.x_parmhash = 0;
5130 a->x_csect.x_snhash = 0;
5131 a->x_csect.x_smclas = XMC_XO;
5132 a->x_csect.x_stab = 0;
5133 a->x_csect.x_snstab = 0;
5134
5135 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5136
5137 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5138 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5139 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5140 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5141 }
5142
b34976b6 5143 ppc_saw_abs = FALSE;
252b5132
RH		 5144}
5145
5146/* Set the VMA for a section. This is called on all the sections in
5147 turn. */
5148
5149void
5150ppc_frob_section (sec)
5151 asection *sec;
5152{
931e13a6 5153 static bfd_vma vma = 0;
252b5132 5154
931e13a6 5155 vma = md_section_align (sec, vma);
252b5132
RH		 5156 bfd_set_section_vma (stdoutput, sec, vma);
5157 vma += bfd_section_size (stdoutput, sec);
5158}
5159
5160#endif /* OBJ_XCOFF */
5161\f
5162/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5163 of type TYPE, and store the appropriate bytes in *LITP. The number
5164 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5165 returned, or NULL on OK. */
5166
5167char *
5168md_atof (type, litp, sizep)
5169 int type;
5170 char *litp;
5171 int *sizep;
5172{
5173 int prec;
5174 LITTLENUM_TYPE words[4];
5175 char *t;
5176 int i;
5177
5178 switch (type)
5179 {
5180 case 'f':
5181 prec = 2;
5182 break;
5183
5184 case 'd':
5185 prec = 4;
5186 break;
5187
5188 default:
5189 *sizep = 0;
5190 return _("bad call to md_atof");
5191 }
5192
5193 t = atof_ieee (input_line_pointer, type, words);
5194 if (t)
5195 input_line_pointer = t;
5196
5197 *sizep = prec * 2;
5198
5199 if (target_big_endian)
5200 {
5201 for (i = 0; i < prec; i++)
5202 {
5203 md_number_to_chars (litp, (valueT) words[i], 2);
5204 litp += 2;
5205 }
5206 }
5207 else
5208 {
5209 for (i = prec - 1; i >= 0; i--)
5210 {
5211 md_number_to_chars (litp, (valueT) words[i], 2);
5212 litp += 2;
5213 }
5214 }
81d4177b 5215
252b5132
RH		 5216 return NULL;
5217}
5218
5219/* Write a value out to the object file, using the appropriate
5220 endianness. */
5221
5222void
5223md_number_to_chars (buf, val, n)
5224 char *buf;
5225 valueT val;
5226 int n;
5227{
5228 if (target_big_endian)
5229 number_to_chars_bigendian (buf, val, n);
5230 else
5231 number_to_chars_littleendian (buf, val, n);
5232}
5233
5234/* Align a section (I don't know why this is machine dependent). */
5235
5236valueT
5237md_section_align (seg, addr)
5238 asection *seg;
5239 valueT addr;
5240{
5241 int align = bfd_get_section_alignment (stdoutput, seg);
5242
5243 return ((addr + (1 << align) - 1) & (-1 << align));
5244}
5245
5246/* We don't have any form of relaxing. */
5247
5248int
5249md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5250 fragS *fragp ATTRIBUTE_UNUSED;
5251 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5252{
5253 abort ();
5254 return 0;
5255}
5256
5257/* Convert a machine dependent frag. We never generate these. */
5258
5259void
5260md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5261 bfd *abfd ATTRIBUTE_UNUSED;
5262 asection *sec ATTRIBUTE_UNUSED;
5263 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5264{
5265 abort ();
5266}
5267
5268/* We have no need to default values of symbols. */
5269
252b5132
RH		 5270symbolS *
5271md_undefined_symbol (name)
92161534 5272 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5273{
5274 return 0;
5275}
5276\f
5277/* Functions concerning relocs. */
5278
5279/* The location from which a PC relative jump should be calculated,
5280 given a PC relative reloc. */
5281
5282long
5283md_pcrel_from_section (fixp, sec)
5284 fixS *fixp;
92161534 5285 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5286{
5287 return fixp->fx_frag->fr_address + fixp->fx_where;
5288}
5289
5290#ifdef OBJ_XCOFF
5291
5292/* This is called to see whether a fixup should be adjusted to use a
5293 section symbol. We take the opportunity to change a fixup against
5294 a symbol in the TOC subsegment into a reloc against the
5295 corresponding .tc symbol. */
5296
5297int
5298ppc_fix_adjustable (fix)
5299 fixS *fix;
5300{
b782de16
AM		 5301 valueT val = resolve_symbol_value (fix->fx_addsy);
5302 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5303 TC_SYMFIELD_TYPE *tc;
5304
5305 if (symseg == absolute_section)
5306 return 0;
252b5132 5307
252b5132 5308 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5309 && fix->fx_addsy != ppc_toc_csect
b782de16 5310 && symseg == data_section
252b5132
RH		 5311 && val >= ppc_toc_frag->fr_address
5312 && (ppc_after_toc_frag == (fragS *) NULL
5313 || val < ppc_after_toc_frag->fr_address))
5314 {
5315 symbolS *sy;
5316
5317 for (sy = symbol_next (ppc_toc_csect);
5318 sy != (symbolS *) NULL;
5319 sy = symbol_next (sy))
5320 {
b782de16
AM		 5321 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5322
5323 if (sy_tc->class == XMC_TC0)
252b5132 5324 continue;
b782de16 5325 if (sy_tc->class != XMC_TC)
252b5132 5326 break;
b782de16 5327 if (val == resolve_symbol_value (sy))
252b5132
RH		 5328 {
5329 fix->fx_addsy = sy;
5330 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5331 return 0;
5332 }
5333 }
5334
5335 as_bad_where (fix->fx_file, fix->fx_line,
5336 _("symbol in .toc does not match any .tc"));
5337 }
5338
5339 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5340 tc = symbol_get_tc (fix->fx_addsy);
5341 if (tc->subseg == 0
5342 && tc->class != XMC_TC0
5343 && tc->class != XMC_TC
5344 && symseg != bss_section
252b5132 5345 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5346 && (symseg != data_section
252b5132
RH		 5347 || ppc_toc_csect == NULL
5348 || val < ppc_toc_frag->fr_address
5349 || (ppc_after_toc_frag != NULL
5350 && val >= ppc_after_toc_frag->fr_address)))
5351 {
5352 symbolS *csect;
b782de16 5353 symbolS *next_csect;
252b5132 5354
b782de16 5355 if (symseg == text_section)
252b5132 5356 csect = ppc_text_csects;
b782de16 5357 else if (symseg == data_section)
252b5132
RH		 5358 csect = ppc_data_csects;
5359 else
5360 abort ();
5361
5362 /* Skip the initial dummy symbol. */
809ffe0d 5363 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5364
5365 if (csect != (symbolS *) NULL)
5366 {
b782de16
AM		 5367 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5368 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5369 {
5370 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5371 have to look through the full symbol table to see
5372 whether this is the csect we want. Note that we will
5373 only get here if the csect has zero length. */
b782de16
AM		 5374 if (symbol_get_frag (csect)->fr_address == val
5375 && S_GET_VALUE (csect) == val)
252b5132
RH		 5376 {
5377 symbolS *scan;
5378
809ffe0d 5379 for (scan = symbol_next (csect);
252b5132 5380 scan != NULL;
809ffe0d 5381 scan = symbol_next (scan))
252b5132 5382 {
809ffe0d 5383 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5384 break;
5385 if (scan == fix->fx_addsy)
5386 break;
5387 }
5388
5389 /* If we found the symbol before the next csect
99a814a1 5390 symbol, then this is the csect we want. */
252b5132
RH		 5391 if (scan == fix->fx_addsy)
5392 break;
5393 }
5394
b782de16 5395 csect = next_csect;
252b5132
RH		 5396 }
5397
b782de16 5398 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5399 fix->fx_addsy = csect;
5400 }
b782de16 5401 return 0;
252b5132
RH		 5402 }
5403
5404 /* Adjust a reloc against a .lcomm symbol to be against the base
5405 .lcomm. */
b782de16 5406 if (symseg == bss_section
252b5132
RH		 5407 && ! S_IS_EXTERNAL (fix->fx_addsy))
5408 {
b782de16
AM		 5409 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5410
5411 fix->fx_offset += val - resolve_symbol_value (sy);
5412 fix->fx_addsy = sy;
252b5132
RH		 5413 }
5414
5415 return 0;
5416}
5417
5418/* A reloc from one csect to another must be kept. The assembler
5419 will, of course, keep relocs between sections, and it will keep
5420 absolute relocs, but we need to force it to keep PC relative relocs
5421 between two csects in the same section. */
5422
5423int
5424ppc_force_relocation (fix)
5425 fixS *fix;
5426{
5427 /* At this point fix->fx_addsy should already have been converted to
5428 a csect symbol. If the csect does not include the fragment, then
5429 we need to force the relocation. */
5430 if (fix->fx_pcrel
5431 && fix->fx_addsy != NULL
809ffe0d
ILT		 5432 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5433 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5434 > fix->fx_frag->fr_address)
5435 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5436 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5437 <= fix->fx_frag->fr_address))))
5438 return 1;
5439
ae6063d4 5440 return generic_force_reloc (fix);
252b5132
RH		 5441}
5442
5443#endif /* OBJ_XCOFF */
5444
0baf16f2 5445#ifdef OBJ_ELF
a161fe53
AM		 5446/* If this function returns non-zero, it guarantees that a relocation
5447 will be emitted for a fixup. */
5448
5449int
5450ppc_force_relocation (fix)
5451 fixS *fix;
5452{
5453 /* Branch prediction relocations must force a relocation, as must
5454 the vtable description relocs. */
5455 switch (fix->fx_r_type)
5456 {
5457 case BFD_RELOC_PPC_B16_BRTAKEN:
5458 case BFD_RELOC_PPC_B16_BRNTAKEN:
5459 case BFD_RELOC_PPC_BA16_BRTAKEN:
5460 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5461 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5462 return 1;
5463 default:
5464 break;
5465 }
5466
cdba85ec
AM		 5467 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5468 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5469 return 1;
5470
ae6063d4 5471 return generic_force_reloc (fix);
a161fe53
AM		 5472}
5473
0baf16f2
AM		 5474int
5475ppc_fix_adjustable (fix)
5476 fixS *fix;
252b5132 5477{
0baf16f2
AM		 5478 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5479 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5480 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5481 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5482 && fix->fx_r_type != BFD_RELOC_GPREL16
5483 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5484 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5485 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5486 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5487 && (fix->fx_pcrel
5488 || (fix->fx_subsy != NULL
5489 && (S_GET_SEGMENT (fix->fx_subsy)
5490 == S_GET_SEGMENT (fix->fx_addsy)))
5491 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5492}
0baf16f2 5493#endif
252b5132
RH		 5494
5495/* Apply a fixup to the object code. This is called for all the
5496 fixups we generated by the call to fix_new_exp, above. In the call
5497 above we used a reloc code which was the largest legal reloc code
5498 plus the operand index. Here we undo that to recover the operand
5499 index. At this point all symbol values should be fully resolved,
5500 and we attempt to completely resolve the reloc. If we can not do
5501 that, we determine the correct reloc code and put it back in the
5502 fixup. */
5503
94f592af
NC		 5504void
5505md_apply_fix3 (fixP, valP, seg)
5506 fixS *fixP;
5507 valueT * valP;
0baf16f2 5508 segT seg ATTRIBUTE_UNUSED;
252b5132 5509{
94f592af 5510 valueT value = * valP;
252b5132
RH		 5511
5512#ifdef OBJ_ELF
94f592af 5513 if (fixP->fx_addsy != NULL)
252b5132 5514 {
a161fe53 5515 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5516 if (fixP->fx_pcrel)
5517 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5518 }
5519 else
94f592af 5520 fixP->fx_done = 1;
252b5132 5521#else
a161fe53 5522 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5523 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5524 doing this relocation the code in write.c is going to call
5525 bfd_install_relocation, which is also going to use the symbol
5526 value. That means that if the reloc is fully resolved we want to
a161fe53 5527 use *valP since bfd_install_relocation is not being used.
252b5132 5528 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5529 *valP, and must use fx_offset instead. However, if the reloc
5530 is PC relative, we do want to use *valP since it includes the
252b5132 5531 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5532 if (fixP->fx_addsy == (symbolS *) NULL)
5533 fixP->fx_done = 1;
5534
5535 else if (fixP->fx_pcrel)
5536 ;
5537
252b5132 5538 else
a161fe53
AM		 5539 value = fixP->fx_offset;
5540#endif
5541
5542 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5543 {
a161fe53
AM		 5544 /* We can't actually support subtracting a symbol. */
5545 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5546 }
252b5132 5547
94f592af 5548 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5549 {
5550 int opindex;
5551 const struct powerpc_operand *operand;
5552 char *where;
5553 unsigned long insn;
5554
94f592af 5555 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5556
5557 operand = &powerpc_operands[opindex];
5558
5559#ifdef OBJ_XCOFF
0baf16f2
AM		 5560 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5561 does not generate a reloc. It uses the offset of `sym' within its
5562 csect. Other usages, such as `.long sym', generate relocs. This
5563 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5564 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5565 && operand->bits == 16
5566 && operand->shift == 0
2b3c4602 5567 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5568 && fixP->fx_addsy != NULL
5569 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5570 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5571 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5572 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5573 {
94f592af
NC		 5574 value = fixP->fx_offset;
5575 fixP->fx_done = 1;
252b5132
RH		 5576 }
5577#endif
5578
5579 /* Fetch the instruction, insert the fully resolved operand
5580 value, and stuff the instruction back again. */
94f592af 5581 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5582 if (target_big_endian)
5583 insn = bfd_getb32 ((unsigned char *) where);
5584 else
5585 insn = bfd_getl32 ((unsigned char *) where);
5586 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5587 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5588 if (target_big_endian)
5589 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5590 else
5591 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5592
94f592af
NC		 5593 if (fixP->fx_done)
5594 /* Nothing else to do here. */
5595 return;
252b5132 5596
94f592af 5597 assert (fixP->fx_addsy != NULL);
0baf16f2 5598
252b5132
RH		 5599 /* Determine a BFD reloc value based on the operand information.
5600 We are only prepared to turn a few of the operands into
0baf16f2 5601 relocs. */
11b37b7b
AM		 5602 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5603 && operand->bits == 26
5604 && operand->shift == 0)
94f592af 5605 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5606 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5607 && operand->bits == 16
5608 && operand->shift == 0)
95210096
AM		 5609 {
5610 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5611#ifdef OBJ_XCOFF
5612 fixP->fx_size = 2;
5613 if (target_big_endian)
5614 fixP->fx_where += 2;
5615#endif
5616 }
11b37b7b
AM		 5617 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5618 && operand->bits == 26
5619 && operand->shift == 0)
94f592af 5620 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5621 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5622 && operand->bits == 16
5623 && operand->shift == 0)
95210096
AM		 5624 {
5625 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5626#ifdef OBJ_XCOFF
5627 fixP->fx_size = 2;
5628 if (target_big_endian)
5629 fixP->fx_where += 2;
5630#endif
5631 }
0baf16f2 5632#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5633 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5634 && operand->bits == 16
a7fc733f 5635 && operand->shift == 0)
11b37b7b 5636 {
a7fc733f
AM		 5637 if (ppc_is_toc_sym (fixP->fx_addsy))
5638 {
5639 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5640#ifdef OBJ_ELF
a7fc733f
AM		 5641 if (ppc_obj64
5642 && (operand->flags & PPC_OPERAND_DS) != 0)
5643 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5644#endif
5645 }
5646 else
5647 {
5648 fixP->fx_r_type = BFD_RELOC_16;
5649#ifdef OBJ_ELF
5650 if (ppc_obj64
5651 && (operand->flags & PPC_OPERAND_DS) != 0)
5652 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5653#endif
a7fc733f 5654 }
94f592af 5655 fixP->fx_size = 2;
11b37b7b 5656 if (target_big_endian)
94f592af 5657 fixP->fx_where += 2;
11b37b7b 5658 }
0baf16f2 5659#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5660 else
252b5132
RH		 5661 {
5662 char *sfile;
5663 unsigned int sline;
5664
5665 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5666 symbol. */
94f592af
NC		 5667 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5668 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5669 _("unresolved expression that must be resolved"));
5670 else
94f592af 5671 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5672 _("unsupported relocation against %s"),
94f592af
NC		 5673 S_GET_NAME (fixP->fx_addsy));
5674 fixP->fx_done = 1;
5675 return;
252b5132
RH		 5676 }
5677 }
5678 else
5679 {
5680#ifdef OBJ_ELF
94f592af 5681 ppc_elf_validate_fix (fixP, seg);
252b5132 5682#endif
94f592af 5683 switch (fixP->fx_r_type)
252b5132 5684 {
252b5132 5685 case BFD_RELOC_CTOR:
2b3c4602 5686 if (ppc_obj64)
9c7977b3
AM		 5687 goto ctor64;
5688 /* fall through */
5689
0baf16f2 5690 case BFD_RELOC_32:
94f592af
NC		 5691 if (fixP->fx_pcrel)
5692 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5693 /* fall through */
252b5132
RH		 5694
5695 case BFD_RELOC_RVA:
5696 case BFD_RELOC_32_PCREL:
252b5132 5697 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5698 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5699 value, 4);
5700 break;
5701
7f6d05e8 5702 case BFD_RELOC_64:
9c7977b3 5703 ctor64:
94f592af
NC		 5704 if (fixP->fx_pcrel)
5705 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5706 /* fall through */
0baf16f2 5707
7f6d05e8 5708 case BFD_RELOC_64_PCREL:
94f592af 5709 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5710 value, 8);
81d4177b 5711 break;
0baf16f2 5712
252b5132
RH		 5713 case BFD_RELOC_LO16:
5714 case BFD_RELOC_16:
5715 case BFD_RELOC_GPREL16:
5716 case BFD_RELOC_16_GOT_PCREL:
5717 case BFD_RELOC_16_GOTOFF:
5718 case BFD_RELOC_LO16_GOTOFF:
5719 case BFD_RELOC_HI16_GOTOFF:
5720 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5721 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5722 case BFD_RELOC_LO16_BASEREL:
5723 case BFD_RELOC_HI16_BASEREL:
5724 case BFD_RELOC_HI16_S_BASEREL:
5725 case BFD_RELOC_PPC_EMB_NADDR16:
5726 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5727 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5728 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5729 case BFD_RELOC_PPC_EMB_SDAI16:
5730 case BFD_RELOC_PPC_EMB_SDA2REL:
5731 case BFD_RELOC_PPC_EMB_SDA2I16:
5732 case BFD_RELOC_PPC_EMB_RELSEC16:
5733 case BFD_RELOC_PPC_EMB_RELST_LO:
5734 case BFD_RELOC_PPC_EMB_RELST_HI:
5735 case BFD_RELOC_PPC_EMB_RELST_HA:
5736 case BFD_RELOC_PPC_EMB_RELSDA:
5737 case BFD_RELOC_PPC_TOC16:
0baf16f2 5738#ifdef OBJ_ELF
0baf16f2
AM		 5739 case BFD_RELOC_PPC64_TOC16_LO:
5740 case BFD_RELOC_PPC64_TOC16_HI:
5741 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5742#endif
94f592af 5743 if (fixP->fx_pcrel)
252b5132 5744 {
94f592af
NC		 5745 if (fixP->fx_addsy != NULL)
5746 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5747 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5748 bfd_get_reloc_code_name (fixP->fx_r_type),
5749 S_GET_NAME (fixP->fx_addsy));
252b5132 5750 else
94f592af 5751 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5752 _("cannot emit PC relative %s relocation"),
94f592af 5753 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5754 }
5755
94f592af 5756 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5757 value, 2);
5758 break;
5759
5760 /* This case happens when you write, for example,
5761 lis %r3,(L1-L2)@ha
5762 where L1 and L2 are defined later. */
5763 case BFD_RELOC_HI16:
94f592af 5764 if (fixP->fx_pcrel)
252b5132 5765 abort ();
94f592af 5766 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5767 PPC_HI (value), 2);
252b5132 5768 break;
0baf16f2 5769
252b5132 5770 case BFD_RELOC_HI16_S:
94f592af 5771 if (fixP->fx_pcrel)
252b5132 5772 abort ();
94f592af 5773 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5774 PPC_HA (value), 2);
5775 break;
5776
5777#ifdef OBJ_ELF
0baf16f2 5778 case BFD_RELOC_PPC64_HIGHER:
94f592af 5779 if (fixP->fx_pcrel)
0baf16f2 5780 abort ();
94f592af 5781 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5782 PPC_HIGHER (value), 2);
252b5132
RH		 5783 break;
5784
0baf16f2 5785 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5786 if (fixP->fx_pcrel)
0baf16f2 5787 abort ();
94f592af 5788 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5789 PPC_HIGHERA (value), 2);
5790 break;
5791
5792 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5793 if (fixP->fx_pcrel)
0baf16f2 5794 abort ();
94f592af 5795 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5796 PPC_HIGHEST (value), 2);
5797 break;
5798
5799 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5800 if (fixP->fx_pcrel)
0baf16f2 5801 abort ();
94f592af 5802 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5803 PPC_HIGHESTA (value), 2);
5804 break;
5805
5806 case BFD_RELOC_PPC64_ADDR16_DS:
5807 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5808 case BFD_RELOC_PPC64_GOT16_DS:
5809 case BFD_RELOC_PPC64_GOT16_LO_DS:
5810 case BFD_RELOC_PPC64_PLT16_LO_DS:
5811 case BFD_RELOC_PPC64_SECTOFF_DS:
5812 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5813 case BFD_RELOC_PPC64_TOC16_DS:
5814 case BFD_RELOC_PPC64_TOC16_LO_DS:
5815 case BFD_RELOC_PPC64_PLTGOT16_DS:
5816 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5817 if (fixP->fx_pcrel)
0baf16f2
AM		 5818 abort ();
5819 {
94f592af 5820 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5821 unsigned long val, mask;
0baf16f2
AM		 5822
5823 if (target_big_endian)
adadcc0c 5824 val = bfd_getb32 (where - 2);
0baf16f2 5825 else
adadcc0c
AM		 5826 val = bfd_getl32 (where);
5827 mask = 0xfffc;
5828 /* lq insns reserve the four lsbs. */
5829 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5830 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5831 mask = 0xfff0;
5832 val |= value & mask;
0baf16f2
AM		 5833 if (target_big_endian)
5834 bfd_putb16 ((bfd_vma) val, where);
5835 else
5836 bfd_putl16 ((bfd_vma) val, where);
5837 }
5838 break;
cdba85ec 5839
ba0b2174
AM		 5840 case BFD_RELOC_PPC_B16_BRTAKEN:
5841 case BFD_RELOC_PPC_B16_BRNTAKEN:
5842 case BFD_RELOC_PPC_BA16_BRTAKEN:
5843 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5844 break;
5845
cdba85ec
AM		 5846 case BFD_RELOC_PPC_TLS:
5847 case BFD_RELOC_PPC_DTPMOD:
5848 case BFD_RELOC_PPC_TPREL16:
5849 case BFD_RELOC_PPC_TPREL16_LO:
5850 case BFD_RELOC_PPC_TPREL16_HI:
5851 case BFD_RELOC_PPC_TPREL16_HA:
5852 case BFD_RELOC_PPC_TPREL:
5853 case BFD_RELOC_PPC_DTPREL16:
5854 case BFD_RELOC_PPC_DTPREL16_LO:
5855 case BFD_RELOC_PPC_DTPREL16_HI:
5856 case BFD_RELOC_PPC_DTPREL16_HA:
5857 case BFD_RELOC_PPC_DTPREL:
5858 case BFD_RELOC_PPC_GOT_TLSGD16:
5859 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5860 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5861 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5862 case BFD_RELOC_PPC_GOT_TLSLD16:
5863 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5864 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5865 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5866 case BFD_RELOC_PPC_GOT_TPREL16:
5867 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5868 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5869 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5870 case BFD_RELOC_PPC_GOT_DTPREL16:
5871 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5872 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5873 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5874 case BFD_RELOC_PPC64_TPREL16_DS:
5875 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5876 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5877 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5878 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5879 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5880 case BFD_RELOC_PPC64_DTPREL16_DS:
5881 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5882 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5883 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5884 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5885 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5886 break;
0baf16f2 5887#endif
252b5132 5888 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5889 bytes, rather than 2, so offset it here appropriately. */
252b5132 5890 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5891 if (fixP->fx_pcrel)
252b5132
RH		 5892 abort ();
5893
94f592af 5894 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5895 + ((target_big_endian) ? 2 : 0),
5896 value, 2);
5897 break;
5898
5899 case BFD_RELOC_8:
94f592af 5900 if (fixP->fx_pcrel)
252b5132
RH		 5901 abort ();
5902
94f592af 5903 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5904 value, 1);
5905 break;
5906
5907 case BFD_RELOC_24_PLT_PCREL:
5908 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5909 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5910 abort ();
5911
94f592af 5912 if (fixP->fx_done)
99a814a1
AM		 5913 {
5914 char *where;
5915 unsigned long insn;
5916
5917 /* Fetch the instruction, insert the fully resolved operand
5918 value, and stuff the instruction back again. */
94f592af 5919 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5920 if (target_big_endian)
5921 insn = bfd_getb32 ((unsigned char *) where);
5922 else
5923 insn = bfd_getl32 ((unsigned char *) where);
5924 if ((value & 3) != 0)
94f592af 5925 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5926 _("must branch to an address a multiple of 4"));
5927 if ((offsetT) value < -0x40000000
5928 || (offsetT) value >= 0x40000000)
94f592af 5929 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5930 _("@local or @plt branch destination is too far away, %ld bytes"),
5931 (long) value);
5932 insn = insn | (value & 0x03fffffc);
5933 if (target_big_endian)
5934 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5935 else
5936 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5937 }
252b5132
RH		 5938 break;
5939
5940 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5941 fixP->fx_done = 0;
5942 if (fixP->fx_addsy
5943 && !S_IS_DEFINED (fixP->fx_addsy)
5944 && !S_IS_WEAK (fixP->fx_addsy))
5945 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5946 break;
5947
5948 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5949 fixP->fx_done = 0;
252b5132
RH		 5950 break;
5951
0baf16f2 5952#ifdef OBJ_ELF
0baf16f2
AM		 5953 /* Generated by reference to `sym@tocbase'. The sym is
5954 ignored by the linker. */
5955 case BFD_RELOC_PPC64_TOC:
94f592af 5956 fixP->fx_done = 0;
0baf16f2 5957 break;
0baf16f2 5958#endif
252b5132 5959 default:
bc805888 5960 fprintf (stderr,
94f592af 5961 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5962 fflush (stderr);
252b5132
RH		 5963 abort ();
5964 }
5965 }
5966
5967#ifdef OBJ_ELF
94f592af 5968 fixP->fx_addnumber = value;
252b5132 5969#else
94f592af
NC		 5970 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5971 fixP->fx_addnumber = 0;
252b5132
RH		 5972 else
5973 {
5974#ifdef TE_PE
94f592af 5975 fixP->fx_addnumber = 0;
252b5132
RH		 5976#else
5977 /* We want to use the offset within the data segment of the
5978 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5979 fixP->fx_addnumber =
5980 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5981#endif
5982 }
5983#endif
252b5132
RH		 5984}
5985
5986/* Generate a reloc for a fixup. */
5987
5988arelent *
5989tc_gen_reloc (seg, fixp)
92161534 5990 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5991 fixS *fixp;
5992{
5993 arelent *reloc;
5994
5995 reloc = (arelent *) xmalloc (sizeof (arelent));
5996
49309057
ILT		 5997 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5998 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 5999 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6000 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6001 if (reloc->howto == (reloc_howto_type *) NULL)
6002 {
6003 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6004 _("reloc %d not supported by object file format"),
6005 (int) fixp->fx_r_type);
252b5132
RH		 6006 return NULL;
6007 }
6008 reloc->addend = fixp->fx_addnumber;
6009
6010 return reloc;
6011}
75e21f08
JJ		 6012
6013void
6014ppc_cfi_frame_initial_instructions ()
6015{
6016 cfi_add_CFA_def_cfa (1, 0);
6017}
6018
6019int
6020tc_ppc_regname_to_dw2regnum (const char *regname)
6021{
6022 unsigned int regnum = -1;
6023 unsigned int i;
6024 const char *p;
6025 char *q;
6026 static struct { char *name; int dw2regnum; } regnames[] =
6027 {
6028 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6029 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6030 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6031 { "spe_acc", 111 }, { "spefscr", 112 }
6032 };
6033
6034 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6035 if (strcmp (regnames[i].name, regname) == 0)
6036 return regnames[i].dw2regnum;
6037
6038 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6039 {
6040 p = regname + 1 + (regname[1] == '.');
6041 regnum = strtoul (p, &q, 10);
6042 if (p == q || *q || regnum >= 32)
6043 return -1;
6044 if (regname[0] == 'f')
6045 regnum += 32;
6046 else if (regname[0] == 'v')
6047 regnum += 77;
6048 }
6049 else if (regname[0] == 'c' && regname[1] == 'r')
6050 {
6051 p = regname + 2 + (regname[2] == '.');
6052 if (p[0] < '0' || p[0] > '7' || p[1])
6053 return -1;
6054 regnum = p[0] - '0' + 68;
6055 }
6056 return regnum;
6057}
GDB Binutils - Deliverables
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