Commit | Line | Data |
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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
b7d7dc63 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
b84bf58a | 3 | 2004, 2005, 2006, 2007 Free Software Foundation, Inc. |
252b5132 RH |
4 | Written by Ian Lance Taylor, Cygnus Support. |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
20 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
21 | 02110-1301, USA. */ | |
252b5132 | 22 | |
252b5132 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
252b5132 | 25 | #include "subsegs.h" |
75e21f08 | 26 | #include "dw2gencfi.h" |
252b5132 RH |
27 | #include "opcode/ppc.h" |
28 | ||
29 | #ifdef OBJ_ELF | |
30 | #include "elf/ppc.h" | |
5d6f4f16 | 31 | #include "dwarf2dbg.h" |
252b5132 RH |
32 | #endif |
33 | ||
34 | #ifdef TE_PE | |
35 | #include "coff/pe.h" | |
36 | #endif | |
37 | ||
38 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ | |
39 | ||
40 | /* Tell the main code what the endianness is. */ | |
41 | extern int target_big_endian; | |
42 | ||
43 | /* Whether or not, we've set target_big_endian. */ | |
44 | static int set_target_endian = 0; | |
45 | ||
46 | /* Whether to use user friendly register names. */ | |
47 | #ifndef TARGET_REG_NAMES_P | |
48 | #ifdef TE_PE | |
b34976b6 | 49 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 50 | #else |
b34976b6 | 51 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
52 | #endif |
53 | #endif | |
54 | ||
0baf16f2 AM |
55 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
56 | HIGHESTA. */ | |
57 | ||
58 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
59 | #define PPC_LO(v) ((v) & 0xffff) | |
60 | ||
61 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ | |
62 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
63 | ||
64 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of | |
65 | the indicated value, compensating for #lo() being treated as a | |
66 | signed number. */ | |
15c1449b | 67 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 AM |
68 | |
69 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ | |
2a98c3a6 | 70 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
71 | |
72 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
73 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 74 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
75 | |
76 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 77 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
78 | |
79 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
80 | compensating for #lo being treated as a signed number. */ |
81 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 AM |
82 | |
83 | #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) | |
84 | ||
b34976b6 | 85 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 86 | |
b34976b6 | 87 | static bfd_boolean register_name PARAMS ((expressionS *)); |
252b5132 RH |
88 | static void ppc_set_cpu PARAMS ((void)); |
89 | static unsigned long ppc_insert_operand | |
90 | PARAMS ((unsigned long insn, const struct powerpc_operand *operand, | |
91 | offsetT val, char *file, unsigned int line)); | |
92 | static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro)); | |
93 | static void ppc_byte PARAMS ((int)); | |
0baf16f2 AM |
94 | |
95 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
252b5132 RH |
96 | static int ppc_is_toc_sym PARAMS ((symbolS *sym)); |
97 | static void ppc_tc PARAMS ((int)); | |
0baf16f2 AM |
98 | static void ppc_machine PARAMS ((int)); |
99 | #endif | |
252b5132 RH |
100 | |
101 | #ifdef OBJ_XCOFF | |
102 | static void ppc_comm PARAMS ((int)); | |
103 | static void ppc_bb PARAMS ((int)); | |
104 | static void ppc_bc PARAMS ((int)); | |
105 | static void ppc_bf PARAMS ((int)); | |
106 | static void ppc_biei PARAMS ((int)); | |
107 | static void ppc_bs PARAMS ((int)); | |
108 | static void ppc_eb PARAMS ((int)); | |
109 | static void ppc_ec PARAMS ((int)); | |
110 | static void ppc_ef PARAMS ((int)); | |
111 | static void ppc_es PARAMS ((int)); | |
112 | static void ppc_csect PARAMS ((int)); | |
931e13a6 | 113 | static void ppc_change_csect PARAMS ((symbolS *, offsetT)); |
252b5132 RH |
114 | static void ppc_function PARAMS ((int)); |
115 | static void ppc_extern PARAMS ((int)); | |
116 | static void ppc_lglobl PARAMS ((int)); | |
117 | static void ppc_section PARAMS ((int)); | |
118 | static void ppc_named_section PARAMS ((int)); | |
119 | static void ppc_stabx PARAMS ((int)); | |
120 | static void ppc_rename PARAMS ((int)); | |
121 | static void ppc_toc PARAMS ((int)); | |
122 | static void ppc_xcoff_cons PARAMS ((int)); | |
123 | static void ppc_vbyte PARAMS ((int)); | |
124 | #endif | |
125 | ||
126 | #ifdef OBJ_ELF | |
127 | static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *)); | |
128 | static void ppc_elf_cons PARAMS ((int)); | |
129 | static void ppc_elf_rdata PARAMS ((int)); | |
130 | static void ppc_elf_lcomm PARAMS ((int)); | |
131 | static void ppc_elf_validate_fix PARAMS ((fixS *, segT)); | |
dc1d03fc | 132 | static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version)); |
252b5132 RH |
133 | #endif |
134 | ||
135 | #ifdef TE_PE | |
136 | static void ppc_set_current_section PARAMS ((segT)); | |
137 | static void ppc_previous PARAMS ((int)); | |
138 | static void ppc_pdata PARAMS ((int)); | |
139 | static void ppc_ydata PARAMS ((int)); | |
140 | static void ppc_reldata PARAMS ((int)); | |
141 | static void ppc_rdata PARAMS ((int)); | |
142 | static void ppc_ualong PARAMS ((int)); | |
143 | static void ppc_znop PARAMS ((int)); | |
144 | static void ppc_pe_comm PARAMS ((int)); | |
145 | static void ppc_pe_section PARAMS ((int)); | |
146 | static void ppc_pe_function PARAMS ((int)); | |
147 | static void ppc_pe_tocd PARAMS ((int)); | |
148 | #endif | |
149 | \f | |
150 | /* Generic assembler global variables which must be defined by all | |
151 | targets. */ | |
152 | ||
153 | #ifdef OBJ_ELF | |
154 | /* This string holds the chars that always start a comment. If the | |
155 | pre-processor is disabled, these aren't very useful. The macro | |
156 | tc_comment_chars points to this. We use this, rather than the | |
157 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
158 | static const char ppc_solaris_comment_chars[] = "#!"; | |
159 | static const char ppc_eabi_comment_chars[] = "#"; | |
160 | ||
161 | #ifdef TARGET_SOLARIS_COMMENT | |
162 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
163 | #else | |
164 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
165 | #endif | |
166 | #else | |
167 | const char comment_chars[] = "#"; | |
168 | #endif | |
169 | ||
170 | /* Characters which start a comment at the beginning of a line. */ | |
171 | const char line_comment_chars[] = "#"; | |
172 | ||
173 | /* Characters which may be used to separate multiple commands on a | |
174 | single line. */ | |
175 | const char line_separator_chars[] = ";"; | |
176 | ||
177 | /* Characters which are used to indicate an exponent in a floating | |
178 | point number. */ | |
179 | const char EXP_CHARS[] = "eE"; | |
180 | ||
181 | /* Characters which mean that a number is a floating point constant, | |
182 | as in 0d1.0. */ | |
183 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 184 | |
5e02f92e | 185 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 186 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 187 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
188 | |
189 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
190 | int ppc_cie_data_alignment; | |
252b5132 RH |
191 | \f |
192 | /* The target specific pseudo-ops which we support. */ | |
193 | ||
194 | const pseudo_typeS md_pseudo_table[] = | |
195 | { | |
196 | /* Pseudo-ops which must be overridden. */ | |
197 | { "byte", ppc_byte, 0 }, | |
198 | ||
199 | #ifdef OBJ_XCOFF | |
200 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
201 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
202 | on COFF, and is only implemented for the RS/6000. We just use | |
203 | obj-coff.c, and add what we need here. */ | |
204 | { "comm", ppc_comm, 0 }, | |
205 | { "lcomm", ppc_comm, 1 }, | |
206 | { "bb", ppc_bb, 0 }, | |
207 | { "bc", ppc_bc, 0 }, | |
208 | { "bf", ppc_bf, 0 }, | |
209 | { "bi", ppc_biei, 0 }, | |
210 | { "bs", ppc_bs, 0 }, | |
211 | { "csect", ppc_csect, 0 }, | |
212 | { "data", ppc_section, 'd' }, | |
213 | { "eb", ppc_eb, 0 }, | |
214 | { "ec", ppc_ec, 0 }, | |
215 | { "ef", ppc_ef, 0 }, | |
216 | { "ei", ppc_biei, 1 }, | |
217 | { "es", ppc_es, 0 }, | |
218 | { "extern", ppc_extern, 0 }, | |
219 | { "function", ppc_function, 0 }, | |
220 | { "lglobl", ppc_lglobl, 0 }, | |
221 | { "rename", ppc_rename, 0 }, | |
222 | { "section", ppc_named_section, 0 }, | |
223 | { "stabx", ppc_stabx, 0 }, | |
224 | { "text", ppc_section, 't' }, | |
225 | { "toc", ppc_toc, 0 }, | |
226 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 227 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
228 | { "word", ppc_xcoff_cons, 1 }, |
229 | { "short", ppc_xcoff_cons, 1 }, | |
230 | { "vbyte", ppc_vbyte, 0 }, | |
231 | #endif | |
232 | ||
233 | #ifdef OBJ_ELF | |
0baf16f2 AM |
234 | { "llong", ppc_elf_cons, 8 }, |
235 | { "quad", ppc_elf_cons, 8 }, | |
252b5132 RH |
236 | { "long", ppc_elf_cons, 4 }, |
237 | { "word", ppc_elf_cons, 2 }, | |
238 | { "short", ppc_elf_cons, 2 }, | |
239 | { "rdata", ppc_elf_rdata, 0 }, | |
240 | { "rodata", ppc_elf_rdata, 0 }, | |
241 | { "lcomm", ppc_elf_lcomm, 0 }, | |
242 | #endif | |
243 | ||
244 | #ifdef TE_PE | |
99a814a1 | 245 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
246 | { "previous", ppc_previous, 0 }, |
247 | { "pdata", ppc_pdata, 0 }, | |
248 | { "ydata", ppc_ydata, 0 }, | |
249 | { "reldata", ppc_reldata, 0 }, | |
250 | { "rdata", ppc_rdata, 0 }, | |
251 | { "ualong", ppc_ualong, 0 }, | |
252 | { "znop", ppc_znop, 0 }, | |
253 | { "comm", ppc_pe_comm, 0 }, | |
254 | { "lcomm", ppc_pe_comm, 1 }, | |
255 | { "section", ppc_pe_section, 0 }, | |
256 | { "function", ppc_pe_function,0 }, | |
257 | { "tocd", ppc_pe_tocd, 0 }, | |
258 | #endif | |
259 | ||
0baf16f2 | 260 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 261 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
262 | { "machine", ppc_machine, 0 }, |
263 | #endif | |
252b5132 RH |
264 | |
265 | { NULL, NULL, 0 } | |
266 | }; | |
267 | ||
268 | \f | |
99a814a1 AM |
269 | /* Predefined register names if -mregnames (or default for Windows NT). |
270 | In general, there are lots of them, in an attempt to be compatible | |
271 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
272 | |
273 | /* Structure to hold information about predefined registers. */ | |
274 | struct pd_reg | |
275 | { | |
276 | char *name; | |
277 | int value; | |
278 | }; | |
279 | ||
280 | /* List of registers that are pre-defined: | |
281 | ||
282 | Each general register has predefined names of the form: | |
283 | 1. r<reg_num> which has the value <reg_num>. | |
284 | 2. r.<reg_num> which has the value <reg_num>. | |
285 | ||
252b5132 RH |
286 | Each floating point register has predefined names of the form: |
287 | 1. f<reg_num> which has the value <reg_num>. | |
288 | 2. f.<reg_num> which has the value <reg_num>. | |
289 | ||
7a899fff C |
290 | Each vector unit register has predefined names of the form: |
291 | 1. v<reg_num> which has the value <reg_num>. | |
292 | 2. v.<reg_num> which has the value <reg_num>. | |
293 | ||
252b5132 RH |
294 | Each condition register has predefined names of the form: |
295 | 1. cr<reg_num> which has the value <reg_num>. | |
296 | 2. cr.<reg_num> which has the value <reg_num>. | |
297 | ||
298 | There are individual registers as well: | |
299 | sp or r.sp has the value 1 | |
300 | rtoc or r.toc has the value 2 | |
301 | fpscr has the value 0 | |
302 | xer has the value 1 | |
303 | lr has the value 8 | |
304 | ctr has the value 9 | |
305 | pmr has the value 0 | |
306 | dar has the value 19 | |
307 | dsisr has the value 18 | |
308 | dec has the value 22 | |
309 | sdr1 has the value 25 | |
310 | srr0 has the value 26 | |
311 | srr1 has the value 27 | |
312 | ||
81d4177b | 313 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
314 | |
315 | static const struct pd_reg pre_defined_registers[] = | |
316 | { | |
317 | { "cr.0", 0 }, /* Condition Registers */ | |
318 | { "cr.1", 1 }, | |
319 | { "cr.2", 2 }, | |
320 | { "cr.3", 3 }, | |
321 | { "cr.4", 4 }, | |
322 | { "cr.5", 5 }, | |
323 | { "cr.6", 6 }, | |
324 | { "cr.7", 7 }, | |
325 | ||
326 | { "cr0", 0 }, | |
327 | { "cr1", 1 }, | |
328 | { "cr2", 2 }, | |
329 | { "cr3", 3 }, | |
330 | { "cr4", 4 }, | |
331 | { "cr5", 5 }, | |
332 | { "cr6", 6 }, | |
333 | { "cr7", 7 }, | |
334 | ||
335 | { "ctr", 9 }, | |
336 | ||
337 | { "dar", 19 }, /* Data Access Register */ | |
338 | { "dec", 22 }, /* Decrementer */ | |
339 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
340 | ||
341 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
342 | { "f.1", 1 }, |
343 | { "f.10", 10 }, | |
344 | { "f.11", 11 }, | |
345 | { "f.12", 12 }, | |
346 | { "f.13", 13 }, | |
347 | { "f.14", 14 }, | |
348 | { "f.15", 15 }, | |
349 | { "f.16", 16 }, | |
350 | { "f.17", 17 }, | |
351 | { "f.18", 18 }, | |
352 | { "f.19", 19 }, | |
353 | { "f.2", 2 }, | |
354 | { "f.20", 20 }, | |
355 | { "f.21", 21 }, | |
356 | { "f.22", 22 }, | |
357 | { "f.23", 23 }, | |
358 | { "f.24", 24 }, | |
359 | { "f.25", 25 }, | |
360 | { "f.26", 26 }, | |
361 | { "f.27", 27 }, | |
362 | { "f.28", 28 }, | |
363 | { "f.29", 29 }, | |
364 | { "f.3", 3 }, | |
252b5132 RH |
365 | { "f.30", 30 }, |
366 | { "f.31", 31 }, | |
81d4177b KH |
367 | { "f.4", 4 }, |
368 | { "f.5", 5 }, | |
369 | { "f.6", 6 }, | |
370 | { "f.7", 7 }, | |
371 | { "f.8", 8 }, | |
372 | { "f.9", 9 }, | |
373 | ||
374 | { "f0", 0 }, | |
375 | { "f1", 1 }, | |
376 | { "f10", 10 }, | |
377 | { "f11", 11 }, | |
378 | { "f12", 12 }, | |
379 | { "f13", 13 }, | |
380 | { "f14", 14 }, | |
381 | { "f15", 15 }, | |
382 | { "f16", 16 }, | |
383 | { "f17", 17 }, | |
384 | { "f18", 18 }, | |
385 | { "f19", 19 }, | |
386 | { "f2", 2 }, | |
387 | { "f20", 20 }, | |
388 | { "f21", 21 }, | |
389 | { "f22", 22 }, | |
390 | { "f23", 23 }, | |
391 | { "f24", 24 }, | |
392 | { "f25", 25 }, | |
393 | { "f26", 26 }, | |
394 | { "f27", 27 }, | |
395 | { "f28", 28 }, | |
396 | { "f29", 29 }, | |
397 | { "f3", 3 }, | |
252b5132 RH |
398 | { "f30", 30 }, |
399 | { "f31", 31 }, | |
81d4177b KH |
400 | { "f4", 4 }, |
401 | { "f5", 5 }, | |
402 | { "f6", 6 }, | |
403 | { "f7", 7 }, | |
404 | { "f8", 8 }, | |
405 | { "f9", 9 }, | |
252b5132 RH |
406 | |
407 | { "fpscr", 0 }, | |
408 | ||
409 | { "lr", 8 }, /* Link Register */ | |
410 | ||
411 | { "pmr", 0 }, | |
412 | ||
413 | { "r.0", 0 }, /* General Purpose Registers */ | |
414 | { "r.1", 1 }, | |
415 | { "r.10", 10 }, | |
416 | { "r.11", 11 }, | |
417 | { "r.12", 12 }, | |
418 | { "r.13", 13 }, | |
419 | { "r.14", 14 }, | |
420 | { "r.15", 15 }, | |
421 | { "r.16", 16 }, | |
422 | { "r.17", 17 }, | |
423 | { "r.18", 18 }, | |
424 | { "r.19", 19 }, | |
425 | { "r.2", 2 }, | |
426 | { "r.20", 20 }, | |
427 | { "r.21", 21 }, | |
428 | { "r.22", 22 }, | |
429 | { "r.23", 23 }, | |
430 | { "r.24", 24 }, | |
431 | { "r.25", 25 }, | |
432 | { "r.26", 26 }, | |
433 | { "r.27", 27 }, | |
434 | { "r.28", 28 }, | |
435 | { "r.29", 29 }, | |
436 | { "r.3", 3 }, | |
437 | { "r.30", 30 }, | |
438 | { "r.31", 31 }, | |
439 | { "r.4", 4 }, | |
440 | { "r.5", 5 }, | |
441 | { "r.6", 6 }, | |
442 | { "r.7", 7 }, | |
443 | { "r.8", 8 }, | |
444 | { "r.9", 9 }, | |
445 | ||
446 | { "r.sp", 1 }, /* Stack Pointer */ | |
447 | ||
448 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
449 | ||
450 | { "r0", 0 }, /* More general purpose registers */ | |
451 | { "r1", 1 }, | |
452 | { "r10", 10 }, | |
453 | { "r11", 11 }, | |
454 | { "r12", 12 }, | |
455 | { "r13", 13 }, | |
456 | { "r14", 14 }, | |
457 | { "r15", 15 }, | |
458 | { "r16", 16 }, | |
459 | { "r17", 17 }, | |
460 | { "r18", 18 }, | |
461 | { "r19", 19 }, | |
462 | { "r2", 2 }, | |
463 | { "r20", 20 }, | |
464 | { "r21", 21 }, | |
465 | { "r22", 22 }, | |
466 | { "r23", 23 }, | |
467 | { "r24", 24 }, | |
468 | { "r25", 25 }, | |
469 | { "r26", 26 }, | |
470 | { "r27", 27 }, | |
471 | { "r28", 28 }, | |
472 | { "r29", 29 }, | |
473 | { "r3", 3 }, | |
474 | { "r30", 30 }, | |
475 | { "r31", 31 }, | |
476 | { "r4", 4 }, | |
477 | { "r5", 5 }, | |
478 | { "r6", 6 }, | |
479 | { "r7", 7 }, | |
480 | { "r8", 8 }, | |
481 | { "r9", 9 }, | |
482 | ||
483 | { "rtoc", 2 }, /* Table of contents */ | |
484 | ||
485 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
486 | ||
487 | { "sp", 1 }, | |
488 | ||
489 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
490 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 491 | |
7a899fff | 492 | { "v.0", 0 }, /* Vector registers */ |
81d4177b KH |
493 | { "v.1", 1 }, |
494 | { "v.10", 10 }, | |
495 | { "v.11", 11 }, | |
496 | { "v.12", 12 }, | |
497 | { "v.13", 13 }, | |
498 | { "v.14", 14 }, | |
499 | { "v.15", 15 }, | |
500 | { "v.16", 16 }, | |
501 | { "v.17", 17 }, | |
502 | { "v.18", 18 }, | |
503 | { "v.19", 19 }, | |
504 | { "v.2", 2 }, | |
505 | { "v.20", 20 }, | |
506 | { "v.21", 21 }, | |
507 | { "v.22", 22 }, | |
508 | { "v.23", 23 }, | |
509 | { "v.24", 24 }, | |
510 | { "v.25", 25 }, | |
511 | { "v.26", 26 }, | |
512 | { "v.27", 27 }, | |
513 | { "v.28", 28 }, | |
514 | { "v.29", 29 }, | |
515 | { "v.3", 3 }, | |
7a899fff C |
516 | { "v.30", 30 }, |
517 | { "v.31", 31 }, | |
81d4177b KH |
518 | { "v.4", 4 }, |
519 | { "v.5", 5 }, | |
520 | { "v.6", 6 }, | |
521 | { "v.7", 7 }, | |
522 | { "v.8", 8 }, | |
523 | { "v.9", 9 }, | |
7a899fff C |
524 | |
525 | { "v0", 0 }, | |
81d4177b KH |
526 | { "v1", 1 }, |
527 | { "v10", 10 }, | |
528 | { "v11", 11 }, | |
529 | { "v12", 12 }, | |
530 | { "v13", 13 }, | |
531 | { "v14", 14 }, | |
532 | { "v15", 15 }, | |
533 | { "v16", 16 }, | |
534 | { "v17", 17 }, | |
535 | { "v18", 18 }, | |
536 | { "v19", 19 }, | |
537 | { "v2", 2 }, | |
538 | { "v20", 20 }, | |
539 | { "v21", 21 }, | |
540 | { "v22", 22 }, | |
541 | { "v23", 23 }, | |
542 | { "v24", 24 }, | |
543 | { "v25", 25 }, | |
544 | { "v26", 26 }, | |
545 | { "v27", 27 }, | |
546 | { "v28", 28 }, | |
547 | { "v29", 29 }, | |
548 | { "v3", 3 }, | |
7a899fff C |
549 | { "v30", 30 }, |
550 | { "v31", 31 }, | |
81d4177b KH |
551 | { "v4", 4 }, |
552 | { "v5", 5 }, | |
553 | { "v6", 6 }, | |
554 | { "v7", 7 }, | |
555 | { "v8", 8 }, | |
7a899fff | 556 | { "v9", 9 }, |
252b5132 RH |
557 | |
558 | { "xer", 1 }, | |
559 | ||
560 | }; | |
561 | ||
bc805888 | 562 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
563 | |
564 | /* Given NAME, find the register number associated with that name, return | |
565 | the integer value associated with the given name or -1 on failure. */ | |
566 | ||
567 | static int reg_name_search | |
568 | PARAMS ((const struct pd_reg *, int, const char * name)); | |
569 | ||
570 | static int | |
571 | reg_name_search (regs, regcount, name) | |
572 | const struct pd_reg *regs; | |
573 | int regcount; | |
574 | const char *name; | |
575 | { | |
576 | int middle, low, high; | |
577 | int cmp; | |
578 | ||
579 | low = 0; | |
580 | high = regcount - 1; | |
581 | ||
582 | do | |
583 | { | |
584 | middle = (low + high) / 2; | |
585 | cmp = strcasecmp (name, regs[middle].name); | |
586 | if (cmp < 0) | |
587 | high = middle - 1; | |
588 | else if (cmp > 0) | |
589 | low = middle + 1; | |
590 | else | |
591 | return regs[middle].value; | |
592 | } | |
593 | while (low <= high); | |
594 | ||
595 | return -1; | |
596 | } | |
597 | ||
598 | /* | |
99a814a1 | 599 | * Summary of register_name. |
252b5132 RH |
600 | * |
601 | * in: Input_line_pointer points to 1st char of operand. | |
602 | * | |
603 | * out: A expressionS. | |
604 | * The operand may have been a register: in this case, X_op == O_register, | |
605 | * X_add_number is set to the register number, and truth is returned. | |
606 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
607 | * original state. | |
608 | */ | |
609 | ||
b34976b6 | 610 | static bfd_boolean |
252b5132 RH |
611 | register_name (expressionP) |
612 | expressionS *expressionP; | |
613 | { | |
614 | int reg_number; | |
615 | char *name; | |
616 | char *start; | |
617 | char c; | |
618 | ||
99a814a1 | 619 | /* Find the spelling of the operand. */ |
252b5132 | 620 | start = name = input_line_pointer; |
3882b010 | 621 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
622 | name = ++input_line_pointer; |
623 | ||
3882b010 | 624 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 625 | return FALSE; |
252b5132 RH |
626 | |
627 | c = get_symbol_end (); | |
628 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
629 | ||
468cced8 AM |
630 | /* Put back the delimiting char. */ |
631 | *input_line_pointer = c; | |
632 | ||
99a814a1 | 633 | /* Look to see if it's in the register table. */ |
81d4177b | 634 | if (reg_number >= 0) |
252b5132 RH |
635 | { |
636 | expressionP->X_op = O_register; | |
637 | expressionP->X_add_number = reg_number; | |
81d4177b | 638 | |
99a814a1 | 639 | /* Make the rest nice. */ |
252b5132 RH |
640 | expressionP->X_add_symbol = NULL; |
641 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 642 | return TRUE; |
252b5132 | 643 | } |
468cced8 AM |
644 | |
645 | /* Reset the line as if we had not done anything. */ | |
646 | input_line_pointer = start; | |
b34976b6 | 647 | return FALSE; |
252b5132 RH |
648 | } |
649 | \f | |
650 | /* This function is called for each symbol seen in an expression. It | |
651 | handles the special parsing which PowerPC assemblers are supposed | |
652 | to use for condition codes. */ | |
653 | ||
654 | /* Whether to do the special parsing. */ | |
b34976b6 | 655 | static bfd_boolean cr_operand; |
252b5132 RH |
656 | |
657 | /* Names to recognize in a condition code. This table is sorted. */ | |
658 | static const struct pd_reg cr_names[] = | |
659 | { | |
660 | { "cr0", 0 }, | |
661 | { "cr1", 1 }, | |
662 | { "cr2", 2 }, | |
663 | { "cr3", 3 }, | |
664 | { "cr4", 4 }, | |
665 | { "cr5", 5 }, | |
666 | { "cr6", 6 }, | |
667 | { "cr7", 7 }, | |
668 | { "eq", 2 }, | |
669 | { "gt", 1 }, | |
670 | { "lt", 0 }, | |
671 | { "so", 3 }, | |
672 | { "un", 3 } | |
673 | }; | |
674 | ||
675 | /* Parsing function. This returns non-zero if it recognized an | |
676 | expression. */ | |
677 | ||
678 | int | |
679 | ppc_parse_name (name, expr) | |
680 | const char *name; | |
681 | expressionS *expr; | |
682 | { | |
683 | int val; | |
684 | ||
685 | if (! cr_operand) | |
686 | return 0; | |
687 | ||
688 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], | |
689 | name); | |
690 | if (val < 0) | |
691 | return 0; | |
692 | ||
693 | expr->X_op = O_constant; | |
694 | expr->X_add_number = val; | |
695 | ||
696 | return 1; | |
697 | } | |
698 | \f | |
699 | /* Local variables. */ | |
700 | ||
701 | /* The type of processor we are assembling for. This is one or more | |
702 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
2b3c4602 | 703 | static unsigned long ppc_cpu = 0; |
252b5132 | 704 | |
2b3c4602 AM |
705 | /* Whether to target xcoff64/elf64. */ |
706 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 707 | |
252b5132 RH |
708 | /* Opcode hash table. */ |
709 | static struct hash_control *ppc_hash; | |
710 | ||
711 | /* Macro hash table. */ | |
712 | static struct hash_control *ppc_macro_hash; | |
713 | ||
714 | #ifdef OBJ_ELF | |
99a814a1 | 715 | /* What type of shared library support to use. */ |
5d6f4f16 | 716 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 717 | |
99a814a1 | 718 | /* Flags to set in the elf header. */ |
252b5132 RH |
719 | static flagword ppc_flags = 0; |
720 | ||
721 | /* Whether this is Solaris or not. */ | |
722 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 723 | #define SOLARIS_P TRUE |
252b5132 | 724 | #else |
b34976b6 | 725 | #define SOLARIS_P FALSE |
252b5132 RH |
726 | #endif |
727 | ||
b34976b6 | 728 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
729 | #endif |
730 | ||
731 | #ifdef OBJ_XCOFF | |
732 | ||
733 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
734 | using a bunch of different sections. These assembler sections, | |
735 | however, are all encompassed within the .text or .data sections of | |
736 | the final output file. We handle this by using different | |
737 | subsegments within these main segments. */ | |
738 | ||
739 | /* Next subsegment to allocate within the .text segment. */ | |
740 | static subsegT ppc_text_subsegment = 2; | |
741 | ||
742 | /* Linked list of csects in the text section. */ | |
743 | static symbolS *ppc_text_csects; | |
744 | ||
745 | /* Next subsegment to allocate within the .data segment. */ | |
746 | static subsegT ppc_data_subsegment = 2; | |
747 | ||
748 | /* Linked list of csects in the data section. */ | |
749 | static symbolS *ppc_data_csects; | |
750 | ||
751 | /* The current csect. */ | |
752 | static symbolS *ppc_current_csect; | |
753 | ||
754 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
755 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
756 | A special relocation is used when accessing TOC entries. We handle | |
757 | the TOC as a subsegment within the .data segment. We set it up if | |
758 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
759 | static symbolS *ppc_toc_csect; | |
760 | ||
761 | /* The first frag in the TOC subsegment. */ | |
762 | static fragS *ppc_toc_frag; | |
763 | ||
764 | /* The first frag in the first subsegment after the TOC in the .data | |
765 | segment. NULL if there are no subsegments after the TOC. */ | |
766 | static fragS *ppc_after_toc_frag; | |
767 | ||
768 | /* The current static block. */ | |
769 | static symbolS *ppc_current_block; | |
770 | ||
771 | /* The COFF debugging section; set by md_begin. This is not the | |
772 | .debug section, but is instead the secret BFD section which will | |
773 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
774 | static asection *ppc_coff_debug_section; | |
775 | ||
776 | #endif /* OBJ_XCOFF */ | |
777 | ||
778 | #ifdef TE_PE | |
779 | ||
780 | /* Various sections that we need for PE coff support. */ | |
781 | static segT ydata_section; | |
782 | static segT pdata_section; | |
783 | static segT reldata_section; | |
784 | static segT rdata_section; | |
785 | static segT tocdata_section; | |
786 | ||
81d4177b | 787 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
788 | static segT ppc_previous_section; |
789 | static segT ppc_current_section; | |
790 | ||
791 | #endif /* TE_PE */ | |
792 | ||
793 | #ifdef OBJ_ELF | |
794 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
795 | #define PPC_APUINFO_ISEL 0x40 |
796 | #define PPC_APUINFO_PMR 0x41 | |
797 | #define PPC_APUINFO_RFMCI 0x42 | |
798 | #define PPC_APUINFO_CACHELCK 0x43 | |
799 | #define PPC_APUINFO_SPE 0x100 | |
800 | #define PPC_APUINFO_EFS 0x101 | |
801 | #define PPC_APUINFO_BRLOCK 0x102 | |
802 | ||
b34976b6 AM |
803 | /* |
804 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
805 | */ |
806 | unsigned long *ppc_apuinfo_list; | |
807 | unsigned int ppc_apuinfo_num; | |
808 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
809 | #endif /* OBJ_ELF */ |
810 | \f | |
811 | #ifdef OBJ_ELF | |
15c1449b | 812 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 813 | #else |
15c1449b | 814 | const char *const md_shortopts = "um:"; |
252b5132 | 815 | #endif |
15c1449b | 816 | const struct option md_longopts[] = { |
252b5132 RH |
817 | {NULL, no_argument, NULL, 0} |
818 | }; | |
15c1449b | 819 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 | 820 | |
69c040df AM |
821 | |
822 | /* Handle -m options that set cpu type, and .machine arg. */ | |
823 | ||
824 | static int | |
825 | parse_cpu (const char *arg) | |
826 | { | |
827 | /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2 | |
828 | (RIOS2). */ | |
829 | if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0) | |
830 | ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32; | |
831 | /* -mpwr means to assemble for the IBM POWER (RIOS1). */ | |
832 | else if (strcmp (arg, "pwr") == 0) | |
833 | ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32; | |
834 | /* -m601 means to assemble for the PowerPC 601, which includes | |
835 | instructions that are holdovers from the Power. */ | |
836 | else if (strcmp (arg, "601") == 0) | |
837 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
838 | | PPC_OPCODE_601 | PPC_OPCODE_32); | |
839 | /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the | |
840 | PowerPC 603/604. */ | |
841 | else if (strcmp (arg, "ppc") == 0 | |
842 | || strcmp (arg, "ppc32") == 0 | |
843 | || strcmp (arg, "603") == 0 | |
844 | || strcmp (arg, "604") == 0) | |
845 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; | |
846 | /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */ | |
847 | else if (strcmp (arg, "403") == 0 | |
848 | || strcmp (arg, "405") == 0) | |
849 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
850 | | PPC_OPCODE_403 | PPC_OPCODE_32); | |
851 | else if (strcmp (arg, "440") == 0) | |
852 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32 | |
853 | | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI); | |
854 | else if (strcmp (arg, "7400") == 0 | |
855 | || strcmp (arg, "7410") == 0 | |
856 | || strcmp (arg, "7450") == 0 | |
857 | || strcmp (arg, "7455") == 0) | |
858 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
859 | | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32); | |
36ae0db3 DJ |
860 | else if (strcmp (arg, "e300") == 0) |
861 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32 | |
862 | | PPC_OPCODE_E300); | |
69c040df AM |
863 | else if (strcmp (arg, "altivec") == 0) |
864 | { | |
865 | if (ppc_cpu == 0) | |
866 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC; | |
867 | else | |
868 | ppc_cpu |= PPC_OPCODE_ALTIVEC; | |
869 | } | |
870 | else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0) | |
871 | { | |
872 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE | |
873 | | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK | |
874 | | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | |
875 | | PPC_OPCODE_RFMCI); | |
876 | } | |
877 | else if (strcmp (arg, "spe") == 0) | |
878 | { | |
879 | if (ppc_cpu == 0) | |
880 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS; | |
881 | else | |
882 | ppc_cpu |= PPC_OPCODE_SPE; | |
883 | } | |
884 | /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC | |
885 | 620. */ | |
886 | else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0) | |
887 | { | |
888 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64; | |
889 | } | |
890 | else if (strcmp (arg, "ppc64bridge") == 0) | |
891 | { | |
892 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
893 | | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64); | |
894 | } | |
895 | /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */ | |
896 | else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0) | |
897 | { | |
898 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32; | |
899 | } | |
900 | /* -mbooke64 means enable 64-bit BookE support. */ | |
901 | else if (strcmp (arg, "booke64") == 0) | |
902 | { | |
903 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | |
904 | | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64); | |
905 | } | |
906 | else if (strcmp (arg, "power4") == 0) | |
907 | { | |
908 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
909 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4); | |
910 | } | |
b0648eec AM |
911 | else if (strcmp (arg, "power5") == 0) |
912 | { | |
913 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
914 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | |
915 | | PPC_OPCODE_POWER5); | |
916 | } | |
9622b051 AM |
917 | else if (strcmp (arg, "power6") == 0) |
918 | { | |
919 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
920 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | |
921 | | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6); | |
922 | } | |
ede602d7 AM |
923 | else if (strcmp (arg, "cell") == 0) |
924 | { | |
925 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
926 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | |
927 | | PPC_OPCODE_CELL); | |
928 | } | |
69c040df AM |
929 | /* -mcom means assemble for the common intersection between Power |
930 | and PowerPC. At present, we just allow the union, rather | |
931 | than the intersection. */ | |
932 | else if (strcmp (arg, "com") == 0) | |
933 | ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32; | |
934 | /* -many means to assemble for any architecture (PWR/PWRX/PPC). */ | |
935 | else if (strcmp (arg, "any") == 0) | |
936 | ppc_cpu |= PPC_OPCODE_ANY; | |
937 | else | |
938 | return 0; | |
939 | ||
940 | return 1; | |
941 | } | |
942 | ||
252b5132 RH |
943 | int |
944 | md_parse_option (c, arg) | |
945 | int c; | |
946 | char *arg; | |
947 | { | |
948 | switch (c) | |
949 | { | |
950 | case 'u': | |
951 | /* -u means that any undefined symbols should be treated as | |
952 | external, which is the default for gas anyhow. */ | |
953 | break; | |
954 | ||
955 | #ifdef OBJ_ELF | |
956 | case 'l': | |
957 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 958 | sake, recognize -be also. */ |
252b5132 RH |
959 | if (strcmp (arg, "e") == 0) |
960 | { | |
961 | target_big_endian = 0; | |
962 | set_target_endian = 1; | |
963 | } | |
964 | else | |
965 | return 0; | |
966 | ||
967 | break; | |
968 | ||
969 | case 'b': | |
970 | if (strcmp (arg, "e") == 0) | |
971 | { | |
972 | target_big_endian = 1; | |
973 | set_target_endian = 1; | |
974 | } | |
975 | else | |
976 | return 0; | |
977 | ||
978 | break; | |
979 | ||
980 | case 'K': | |
99a814a1 | 981 | /* Recognize -K PIC. */ |
252b5132 RH |
982 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
983 | { | |
984 | shlib = SHLIB_PIC; | |
985 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
986 | } | |
987 | else | |
988 | return 0; | |
989 | ||
990 | break; | |
991 | #endif | |
992 | ||
7f6d05e8 CP |
993 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
994 | case 'a': | |
995 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
996 | { |
997 | #ifdef BFD64 | |
998 | ppc_obj64 = 1; | |
999 | #else | |
1000 | as_fatal (_("%s unsupported"), "-a64"); | |
1001 | #endif | |
1002 | } | |
7f6d05e8 | 1003 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1004 | ppc_obj64 = 0; |
7f6d05e8 CP |
1005 | else |
1006 | return 0; | |
1007 | break; | |
81d4177b | 1008 | |
252b5132 | 1009 | case 'm': |
69c040df AM |
1010 | if (parse_cpu (arg)) |
1011 | ; | |
252b5132 RH |
1012 | |
1013 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1014 | reg_names_p = TRUE; |
252b5132 RH |
1015 | |
1016 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1017 | reg_names_p = FALSE; |
252b5132 RH |
1018 | |
1019 | #ifdef OBJ_ELF | |
99a814a1 AM |
1020 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1021 | that require relocation. */ | |
252b5132 RH |
1022 | else if (strcmp (arg, "relocatable") == 0) |
1023 | { | |
5d6f4f16 | 1024 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1025 | ppc_flags |= EF_PPC_RELOCATABLE; |
1026 | } | |
1027 | ||
1028 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1029 | { | |
5d6f4f16 | 1030 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1031 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1032 | } | |
1033 | ||
99a814a1 | 1034 | /* -memb, set embedded bit. */ |
252b5132 RH |
1035 | else if (strcmp (arg, "emb") == 0) |
1036 | ppc_flags |= EF_PPC_EMB; | |
1037 | ||
99a814a1 AM |
1038 | /* -mlittle/-mbig set the endianess. */ |
1039 | else if (strcmp (arg, "little") == 0 | |
1040 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1041 | { |
1042 | target_big_endian = 0; | |
1043 | set_target_endian = 1; | |
1044 | } | |
1045 | ||
1046 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1047 | { | |
1048 | target_big_endian = 1; | |
1049 | set_target_endian = 1; | |
1050 | } | |
1051 | ||
1052 | else if (strcmp (arg, "solaris") == 0) | |
1053 | { | |
b34976b6 | 1054 | msolaris = TRUE; |
252b5132 RH |
1055 | ppc_comment_chars = ppc_solaris_comment_chars; |
1056 | } | |
1057 | ||
1058 | else if (strcmp (arg, "no-solaris") == 0) | |
1059 | { | |
b34976b6 | 1060 | msolaris = FALSE; |
252b5132 RH |
1061 | ppc_comment_chars = ppc_eabi_comment_chars; |
1062 | } | |
1063 | #endif | |
1064 | else | |
1065 | { | |
1066 | as_bad (_("invalid switch -m%s"), arg); | |
1067 | return 0; | |
1068 | } | |
1069 | break; | |
1070 | ||
1071 | #ifdef OBJ_ELF | |
1072 | /* -V: SVR4 argument to print version ID. */ | |
1073 | case 'V': | |
1074 | print_version_id (); | |
1075 | break; | |
1076 | ||
1077 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1078 | should be emitted or not. FIXME: Not implemented. */ | |
1079 | case 'Q': | |
1080 | break; | |
1081 | ||
1082 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1083 | rather than .stabs.excl, which is ignored by the linker. | |
1084 | FIXME: Not implemented. */ | |
1085 | case 's': | |
1086 | if (arg) | |
1087 | return 0; | |
1088 | ||
1089 | break; | |
1090 | #endif | |
1091 | ||
1092 | default: | |
1093 | return 0; | |
1094 | } | |
1095 | ||
1096 | return 1; | |
1097 | } | |
1098 | ||
1099 | void | |
1100 | md_show_usage (stream) | |
1101 | FILE *stream; | |
1102 | { | |
bc805888 | 1103 | fprintf (stream, _("\ |
252b5132 | 1104 | PowerPC options:\n\ |
df12615d AM |
1105 | -a32 generate ELF32/XCOFF32\n\ |
1106 | -a64 generate ELF64/XCOFF64\n\ | |
252b5132 | 1107 | -u ignored\n\ |
23e1d84c AM |
1108 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ |
1109 | -mpwr generate code for POWER (RIOS1)\n\ | |
1110 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1111 | -mppc, -mppc32, -m603, -m604\n\ |
23e1d84c | 1112 | generate code for PowerPC 603/604\n\ |
df12615d | 1113 | -m403, -m405 generate code for PowerPC 403/405\n\ |
3d8aea2f | 1114 | -m440 generate code for PowerPC 440\n\ |
f5c120c5 | 1115 | -m7400, -m7410, -m7450, -m7455\n\ |
df12615d AM |
1116 | generate code For PowerPC 7400/7410/7450/7455\n")); |
1117 | fprintf (stream, _("\ | |
23e1d84c | 1118 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
d0e9a01c | 1119 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ |
a09cf9bd MG |
1120 | -mbooke64 generate code for 64-bit PowerPC BookE\n\ |
1121 | -mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\ | |
23e1d84c | 1122 | -mpower4 generate code for Power4 architecture\n\ |
b0648eec | 1123 | -mpower5 generate code for Power5 architecture\n\ |
9622b051 | 1124 | -mpower6 generate code for Power6 architecture\n\ |
ede602d7 | 1125 | -mcell generate code for Cell Broadband Engine architecture\n\ |
252b5132 | 1126 | -mcom generate code Power/PowerPC common instructions\n\ |
df12615d | 1127 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); |
6a0c61b7 | 1128 | fprintf (stream, _("\ |
df12615d | 1129 | -maltivec generate code for AltiVec\n\ |
36ae0db3 | 1130 | -me300 generate code for PowerPC e300 family\n\ |
6a0c61b7 | 1131 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ |
df12615d AM |
1132 | -mspe generate code for Motorola SPE instructions\n\ |
1133 | -mregnames Allow symbolic names for registers\n\ | |
1134 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1135 | #ifdef OBJ_ELF |
bc805888 | 1136 | fprintf (stream, _("\ |
252b5132 RH |
1137 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1138 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1139 | -memb set PPC_EMB bit in ELF flags\n\ | |
df12615d | 1140 | -mlittle, -mlittle-endian, -l, -le\n\ |
252b5132 | 1141 | generate code for a little endian machine\n\ |
df12615d AM |
1142 | -mbig, -mbig-endian, -b, -be\n\ |
1143 | generate code for a big endian machine\n\ | |
252b5132 RH |
1144 | -msolaris generate code for Solaris\n\ |
1145 | -mno-solaris do not generate code for Solaris\n\ | |
1146 | -V print assembler version number\n\ | |
1147 | -Qy, -Qn ignored\n")); | |
1148 | #endif | |
1149 | } | |
1150 | \f | |
1151 | /* Set ppc_cpu if it is not already set. */ | |
1152 | ||
1153 | static void | |
1154 | ppc_set_cpu () | |
1155 | { | |
1156 | const char *default_os = TARGET_OS; | |
1157 | const char *default_cpu = TARGET_CPU; | |
1158 | ||
3c9030c1 | 1159 | if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0) |
252b5132 | 1160 | { |
2a98c3a6 | 1161 | if (ppc_obj64) |
3c9030c1 | 1162 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64; |
2a98c3a6 AM |
1163 | else if (strncmp (default_os, "aix", 3) == 0 |
1164 | && default_os[3] >= '4' && default_os[3] <= '9') | |
3c9030c1 | 1165 | ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32; |
252b5132 | 1166 | else if (strncmp (default_os, "aix3", 4) == 0) |
3c9030c1 | 1167 | ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32; |
252b5132 | 1168 | else if (strcmp (default_cpu, "rs6000") == 0) |
3c9030c1 | 1169 | ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32; |
0baf16f2 | 1170 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
23d36e92 | 1171 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; |
252b5132 | 1172 | else |
99a814a1 AM |
1173 | as_fatal (_("Unknown default cpu = %s, os = %s"), |
1174 | default_cpu, default_os); | |
252b5132 RH |
1175 | } |
1176 | } | |
1177 | ||
9232bbb0 AM |
1178 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1179 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1180 | |
1181 | enum bfd_architecture | |
1182 | ppc_arch () | |
1183 | { | |
1184 | const char *default_cpu = TARGET_CPU; | |
1185 | ppc_set_cpu (); | |
1186 | ||
1187 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1188 | return bfd_arch_powerpc; | |
1189 | else if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
1190 | return bfd_arch_rs6000; | |
1191 | else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) | |
1192 | { | |
1193 | if (strcmp (default_cpu, "rs6000") == 0) | |
1194 | return bfd_arch_rs6000; | |
0baf16f2 | 1195 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1196 | return bfd_arch_powerpc; |
1197 | } | |
1198 | ||
1199 | as_fatal (_("Neither Power nor PowerPC opcodes were selected.")); | |
1200 | return bfd_arch_unknown; | |
1201 | } | |
1202 | ||
7f6d05e8 CP |
1203 | unsigned long |
1204 | ppc_mach () | |
1205 | { | |
2a98c3a6 AM |
1206 | if (ppc_obj64) |
1207 | return bfd_mach_ppc64; | |
1208 | else if (ppc_arch () == bfd_arch_rs6000) | |
1209 | return bfd_mach_rs6k; | |
1210 | else | |
1211 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1212 | } |
1213 | ||
81d4177b | 1214 | extern char* |
99a814a1 | 1215 | ppc_target_format () |
7f6d05e8 CP |
1216 | { |
1217 | #ifdef OBJ_COFF | |
1218 | #ifdef TE_PE | |
99a814a1 | 1219 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1220 | #elif TE_POWERMAC |
0baf16f2 | 1221 | return "xcoff-powermac"; |
7f6d05e8 | 1222 | #else |
eb1e0e80 | 1223 | # ifdef TE_AIX5 |
2b3c4602 | 1224 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1225 | # else |
2b3c4602 | 1226 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1227 | # endif |
7f6d05e8 | 1228 | #endif |
7f6d05e8 CP |
1229 | #endif |
1230 | #ifdef OBJ_ELF | |
9d8504b1 PB |
1231 | # ifdef TE_VXWORKS |
1232 | return "elf32-powerpc-vxworks"; | |
1233 | # else | |
0baf16f2 | 1234 | return (target_big_endian |
2b3c4602 AM |
1235 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1236 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1237 | # endif |
7f6d05e8 CP |
1238 | #endif |
1239 | } | |
1240 | ||
69c040df AM |
1241 | /* Insert opcodes and macros into hash tables. Called at startup and |
1242 | for .cpu pseudo. */ | |
252b5132 | 1243 | |
69c040df AM |
1244 | static void |
1245 | ppc_setup_opcodes (void) | |
252b5132 RH |
1246 | { |
1247 | register const struct powerpc_opcode *op; | |
1248 | const struct powerpc_opcode *op_end; | |
1249 | const struct powerpc_macro *macro; | |
1250 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1251 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1252 | |
69c040df AM |
1253 | if (ppc_hash != NULL) |
1254 | hash_die (ppc_hash); | |
1255 | if (ppc_macro_hash != NULL) | |
1256 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1257 | |
1258 | /* Insert the opcodes into a hash table. */ | |
1259 | ppc_hash = hash_new (); | |
1260 | ||
c43a438d | 1261 | if (ENABLE_CHECKING) |
b84bf58a | 1262 | { |
c43a438d | 1263 | unsigned int i; |
b84bf58a | 1264 | |
c43a438d AM |
1265 | /* Check operand masks. Code here and in the disassembler assumes |
1266 | all the 1's in the mask are contiguous. */ | |
1267 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1268 | { |
c43a438d AM |
1269 | unsigned long mask = powerpc_operands[i].bitm; |
1270 | unsigned long right_bit; | |
1271 | unsigned int j; | |
1272 | ||
1273 | right_bit = mask & -mask; | |
1274 | mask += right_bit; | |
1275 | right_bit = mask & -mask; | |
1276 | if (mask != right_bit) | |
1277 | { | |
1278 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1279 | bad_insn = TRUE; | |
1280 | } | |
1281 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1282 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1283 | sizeof (powerpc_operands[0])) == 0) | |
1284 | { | |
1285 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1286 | j, i); | |
1287 | bad_insn = TRUE; | |
1288 | } | |
b84bf58a AM |
1289 | } |
1290 | } | |
1291 | ||
252b5132 RH |
1292 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1293 | for (op = powerpc_opcodes; op < op_end; op++) | |
1294 | { | |
c43a438d | 1295 | if (ENABLE_CHECKING) |
b84bf58a | 1296 | { |
c43a438d AM |
1297 | const unsigned char *o; |
1298 | unsigned long omask = op->mask; | |
1299 | ||
1300 | /* The mask had better not trim off opcode bits. */ | |
1301 | if ((op->opcode & omask) != op->opcode) | |
1302 | { | |
1303 | as_bad (_("mask trims opcode bits for %s"), | |
1304 | op->name); | |
1305 | bad_insn = TRUE; | |
1306 | } | |
1307 | ||
1308 | /* The operands must not overlap the opcode or each other. */ | |
1309 | for (o = op->operands; *o; ++o) | |
1310 | if (*o >= num_powerpc_operands) | |
1311 | { | |
1312 | as_bad (_("operand index error for %s"), | |
1313 | op->name); | |
1314 | bad_insn = TRUE; | |
1315 | } | |
1316 | else | |
b84bf58a | 1317 | { |
c43a438d AM |
1318 | const struct powerpc_operand *operand = &powerpc_operands[*o]; |
1319 | if (operand->shift >= 0) | |
b84bf58a | 1320 | { |
c43a438d AM |
1321 | unsigned long mask = operand->bitm << operand->shift; |
1322 | if (omask & mask) | |
1323 | { | |
1324 | as_bad (_("operand %d overlap in %s"), | |
1325 | (int) (o - op->operands), op->name); | |
1326 | bad_insn = TRUE; | |
1327 | } | |
1328 | omask |= mask; | |
b84bf58a | 1329 | } |
b84bf58a | 1330 | } |
c43a438d | 1331 | } |
252b5132 | 1332 | |
2b3c4602 | 1333 | if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0 |
252b5132 | 1334 | && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0 |
2b3c4602 AM |
1335 | || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) |
1336 | == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64))) | |
23e1d84c | 1337 | || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0) |
341026c1 NC |
1338 | /* Certain instructions (eg: extsw) do not exist in the |
1339 | 32-bit BookE instruction set, but they do exist in the | |
1340 | 64-bit BookE instruction set, and other PPC instruction | |
1341 | sets. Check to see if the opcode has the BOOKE64 flag set. | |
1342 | If it does make sure that the target CPU is not the BookE32. */ | |
1343 | && ((op->flags & PPC_OPCODE_BOOKE64) == 0 | |
1344 | || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64 | |
1345 | || (ppc_cpu & PPC_OPCODE_BOOKE) == 0) | |
23e1d84c AM |
1346 | && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0 |
1347 | || ((op->flags & PPC_OPCODE_POWER4) | |
b0648eec AM |
1348 | == (ppc_cpu & PPC_OPCODE_POWER4))) |
1349 | && ((op->flags & PPC_OPCODE_POWER5) == 0 | |
1350 | || ((op->flags & PPC_OPCODE_POWER5) | |
9622b051 AM |
1351 | == (ppc_cpu & PPC_OPCODE_POWER5))) |
1352 | && ((op->flags & PPC_OPCODE_POWER6) == 0 | |
1353 | || ((op->flags & PPC_OPCODE_POWER6) | |
1354 | == (ppc_cpu & PPC_OPCODE_POWER6)))) | |
252b5132 RH |
1355 | { |
1356 | const char *retval; | |
1357 | ||
1358 | retval = hash_insert (ppc_hash, op->name, (PTR) op); | |
69c040df | 1359 | if (retval != NULL) |
252b5132 | 1360 | { |
99a814a1 | 1361 | /* Ignore Power duplicates for -m601. */ |
252b5132 RH |
1362 | if ((ppc_cpu & PPC_OPCODE_601) != 0 |
1363 | && (op->flags & PPC_OPCODE_POWER) != 0) | |
1364 | continue; | |
1365 | ||
b84bf58a | 1366 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1367 | op->name); |
b84bf58a | 1368 | bad_insn = TRUE; |
252b5132 RH |
1369 | } |
1370 | } | |
1371 | } | |
1372 | ||
3c9030c1 AM |
1373 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1374 | for (op = powerpc_opcodes; op < op_end; op++) | |
1375 | hash_insert (ppc_hash, op->name, (PTR) op); | |
1376 | ||
252b5132 RH |
1377 | /* Insert the macros into a hash table. */ |
1378 | ppc_macro_hash = hash_new (); | |
1379 | ||
1380 | macro_end = powerpc_macros + powerpc_num_macros; | |
1381 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1382 | { | |
1383 | if ((macro->flags & ppc_cpu) != 0) | |
1384 | { | |
1385 | const char *retval; | |
1386 | ||
1387 | retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro); | |
1388 | if (retval != (const char *) NULL) | |
1389 | { | |
b84bf58a AM |
1390 | as_bad (_("duplicate macro %s"), macro->name); |
1391 | bad_insn = TRUE; | |
252b5132 RH |
1392 | } |
1393 | } | |
1394 | } | |
1395 | ||
b84bf58a | 1396 | if (bad_insn) |
252b5132 | 1397 | abort (); |
69c040df AM |
1398 | } |
1399 | ||
1400 | /* This function is called when the assembler starts up. It is called | |
1401 | after the options have been parsed and the output file has been | |
1402 | opened. */ | |
1403 | ||
1404 | void | |
1405 | md_begin () | |
1406 | { | |
1407 | ppc_set_cpu (); | |
1408 | ||
1409 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
1410 | ||
1411 | #ifdef OBJ_ELF | |
1412 | /* Set the ELF flags if desired. */ | |
1413 | if (ppc_flags && !msolaris) | |
1414 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1415 | #endif | |
1416 | ||
1417 | ppc_setup_opcodes (); | |
252b5132 | 1418 | |
67c1ffbe | 1419 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1420 | by the user. */ |
252b5132 RH |
1421 | if (!set_target_endian) |
1422 | { | |
1423 | set_target_endian = 1; | |
1424 | target_big_endian = PPC_BIG_ENDIAN; | |
1425 | } | |
1426 | ||
1427 | #ifdef OBJ_XCOFF | |
1428 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1429 | ||
1430 | /* Create dummy symbols to serve as initial csects. This forces the | |
1431 | text csects to precede the data csects. These symbols will not | |
1432 | be output. */ | |
1433 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1434 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1435 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1436 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1437 | #endif |
1438 | ||
1439 | #ifdef TE_PE | |
1440 | ||
1441 | ppc_current_section = text_section; | |
81d4177b | 1442 | ppc_previous_section = 0; |
252b5132 RH |
1443 | |
1444 | #endif | |
1445 | } | |
1446 | ||
6a0c61b7 EZ |
1447 | void |
1448 | ppc_cleanup () | |
1449 | { | |
dc1d03fc | 1450 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1451 | if (ppc_apuinfo_list == NULL) |
1452 | return; | |
1453 | ||
1454 | /* Ok, so write the section info out. We have this layout: | |
1455 | ||
1456 | byte data what | |
1457 | ---- ---- ---- | |
1458 | 0 8 length of "APUinfo\0" | |
1459 | 4 (n*4) number of APU's (4 bytes each) | |
1460 | 8 2 note type 2 | |
1461 | 12 "APUinfo\0" name | |
1462 | 20 APU#1 first APU's info | |
1463 | 24 APU#2 second APU's info | |
1464 | ... ... | |
1465 | */ | |
1466 | { | |
1467 | char *p; | |
1468 | asection *seg = now_seg; | |
1469 | subsegT subseg = now_subseg; | |
1470 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1471 | unsigned int i; |
6a0c61b7 EZ |
1472 | |
1473 | /* Create the .PPC.EMB.apuinfo section. */ | |
1474 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1475 | bfd_set_section_flags (stdoutput, | |
1476 | apuinfo_secp, | |
e1a9cb8e | 1477 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1478 | |
1479 | p = frag_more (4); | |
1480 | md_number_to_chars (p, (valueT) 8, 4); | |
1481 | ||
1482 | p = frag_more (4); | |
e98d298c | 1483 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1484 | |
1485 | p = frag_more (4); | |
1486 | md_number_to_chars (p, (valueT) 2, 4); | |
1487 | ||
1488 | p = frag_more (8); | |
1489 | strcpy (p, "APUinfo"); | |
1490 | ||
1491 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1492 | { | |
b34976b6 AM |
1493 | p = frag_more (4); |
1494 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1495 | } |
1496 | ||
1497 | frag_align (2, 0, 0); | |
1498 | ||
1499 | /* We probably can't restore the current segment, for there likely | |
1500 | isn't one yet... */ | |
1501 | if (seg && subseg) | |
1502 | subseg_set (seg, subseg); | |
1503 | } | |
dc1d03fc | 1504 | #endif |
6a0c61b7 EZ |
1505 | } |
1506 | ||
252b5132 RH |
1507 | /* Insert an operand value into an instruction. */ |
1508 | ||
1509 | static unsigned long | |
1510 | ppc_insert_operand (insn, operand, val, file, line) | |
1511 | unsigned long insn; | |
1512 | const struct powerpc_operand *operand; | |
1513 | offsetT val; | |
1514 | char *file; | |
1515 | unsigned int line; | |
1516 | { | |
b84bf58a AM |
1517 | long min, max, right; |
1518 | offsetT test; | |
eb42fac1 | 1519 | |
b84bf58a AM |
1520 | max = operand->bitm; |
1521 | right = max & -max; | |
1522 | min = 0; | |
1523 | ||
1524 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1525 | { |
b84bf58a | 1526 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1527 | max = (max >> 1) & -right; |
1528 | min = ~max & -right; | |
252b5132 | 1529 | |
b84bf58a | 1530 | if (!ppc_obj64) |
252b5132 | 1531 | { |
b84bf58a AM |
1532 | /* Some people write 32 bit hex constants with the sign |
1533 | extension done by hand. This shouldn't really be | |
1534 | valid, but, to permit this code to assemble on a 64 | |
1535 | bit host, we sign extend the 32 bit value. */ | |
1536 | if (val > 0 | |
1537 | && (val & (offsetT) 0x80000000) != 0 | |
1538 | && (val & (offsetT) 0xffffffff) == val) | |
252b5132 | 1539 | { |
b84bf58a AM |
1540 | val -= 0x80000000; |
1541 | val -= 0x80000000; | |
252b5132 RH |
1542 | } |
1543 | } | |
b84bf58a | 1544 | } |
252b5132 | 1545 | |
b84bf58a | 1546 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1547 | max++; |
252b5132 | 1548 | |
b84bf58a AM |
1549 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
1550 | test = - val; | |
1551 | else | |
1552 | test = val; | |
1553 | ||
eb42fac1 | 1554 | if ((min <= max && (test < (offsetT) min || test > (offsetT) max)) |
b84bf58a AM |
1555 | || (test & (right - 1)) != 0) |
1556 | as_bad_value_out_of_range (_("operand"), | |
1557 | test, (offsetT) min, (offsetT) max, file, line); | |
1558 | ||
252b5132 RH |
1559 | if (operand->insert) |
1560 | { | |
1561 | const char *errmsg; | |
1562 | ||
1563 | errmsg = NULL; | |
2b3c4602 | 1564 | insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg); |
252b5132 | 1565 | if (errmsg != (const char *) NULL) |
0baf16f2 | 1566 | as_bad_where (file, line, errmsg); |
252b5132 RH |
1567 | } |
1568 | else | |
b84bf58a | 1569 | insn |= ((long) val & operand->bitm) << operand->shift; |
252b5132 RH |
1570 | |
1571 | return insn; | |
1572 | } | |
1573 | ||
1574 | \f | |
1575 | #ifdef OBJ_ELF | |
1576 | /* Parse @got, etc. and return the desired relocation. */ | |
1577 | static bfd_reloc_code_real_type | |
1578 | ppc_elf_suffix (str_p, exp_p) | |
1579 | char **str_p; | |
1580 | expressionS *exp_p; | |
1581 | { | |
1582 | struct map_bfd { | |
1583 | char *string; | |
b7d7dc63 AM |
1584 | unsigned int length : 8; |
1585 | unsigned int valid32 : 1; | |
1586 | unsigned int valid64 : 1; | |
1587 | unsigned int reloc; | |
252b5132 RH |
1588 | }; |
1589 | ||
1590 | char ident[20]; | |
1591 | char *str = *str_p; | |
1592 | char *str2; | |
1593 | int ch; | |
1594 | int len; | |
15c1449b | 1595 | const struct map_bfd *ptr; |
252b5132 | 1596 | |
b7d7dc63 AM |
1597 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1598 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1599 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1600 | |
15c1449b | 1601 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1602 | MAP ("l", BFD_RELOC_LO16), |
1603 | MAP ("h", BFD_RELOC_HI16), | |
1604 | MAP ("ha", BFD_RELOC_HI16_S), | |
1605 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1606 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1607 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1608 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1609 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1610 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1611 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1612 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1613 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1614 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1615 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1616 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1617 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1618 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1619 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1620 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1621 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1622 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1623 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1624 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1625 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1626 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1627 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1628 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1629 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1630 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1631 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1632 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1633 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1634 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1635 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1636 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1637 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1638 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1639 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1640 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1641 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1642 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1643 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1644 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1645 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1646 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1647 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1648 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1649 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1650 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1651 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1652 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
1653 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), | |
1654 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1655 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1656 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1657 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1658 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1659 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1660 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1661 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
1662 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), | |
1663 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1664 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1665 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1666 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1667 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1668 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1669 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
1670 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), | |
1671 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1672 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1673 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1674 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1675 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1676 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1677 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1678 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
1679 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), | |
1680 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1681 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1682 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
1683 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), | |
1684 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1685 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1686 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
1687 | { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } | |
252b5132 RH |
1688 | }; |
1689 | ||
1690 | if (*str++ != '@') | |
1691 | return BFD_RELOC_UNUSED; | |
1692 | ||
1693 | for (ch = *str, str2 = ident; | |
1694 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1695 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
1696 | ch = *++str) |
1697 | { | |
3882b010 | 1698 | *str2++ = TOLOWER (ch); |
252b5132 RH |
1699 | } |
1700 | ||
1701 | *str2 = '\0'; | |
1702 | len = str2 - ident; | |
1703 | ||
1704 | ch = ident[0]; | |
1705 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
1706 | if (ch == ptr->string[0] | |
1707 | && len == ptr->length | |
b7d7dc63 AM |
1708 | && memcmp (ident, ptr->string, ptr->length) == 0 |
1709 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 1710 | { |
15c1449b AM |
1711 | int reloc = ptr->reloc; |
1712 | ||
cdba85ec | 1713 | if (!ppc_obj64) |
5f6db75a AM |
1714 | if (exp_p->X_add_number != 0 |
1715 | && (reloc == (int) BFD_RELOC_16_GOTOFF | |
1716 | || reloc == (int) BFD_RELOC_LO16_GOTOFF | |
1717 | || reloc == (int) BFD_RELOC_HI16_GOTOFF | |
1718 | || reloc == (int) BFD_RELOC_HI16_S_GOTOFF)) | |
1719 | as_warn (_("identifier+constant@got means identifier@got+constant")); | |
1720 | ||
1721 | /* Now check for identifier@suffix+constant. */ | |
1722 | if (*str == '-' || *str == '+') | |
252b5132 | 1723 | { |
5f6db75a AM |
1724 | char *orig_line = input_line_pointer; |
1725 | expressionS new_exp; | |
1726 | ||
1727 | input_line_pointer = str; | |
1728 | expression (&new_exp); | |
1729 | if (new_exp.X_op == O_constant) | |
252b5132 | 1730 | { |
5f6db75a AM |
1731 | exp_p->X_add_number += new_exp.X_add_number; |
1732 | str = input_line_pointer; | |
252b5132 | 1733 | } |
5f6db75a AM |
1734 | |
1735 | if (&input_line_pointer != str_p) | |
1736 | input_line_pointer = orig_line; | |
252b5132 | 1737 | } |
252b5132 | 1738 | *str_p = str; |
0baf16f2 | 1739 | |
2b3c4602 | 1740 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
1741 | && exp_p->X_op == O_symbol |
1742 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 1743 | { |
9f2b53d7 AM |
1744 | /* Change the symbol so that the dummy .TOC. symbol can be |
1745 | omitted from the object file. */ | |
0baf16f2 AM |
1746 | exp_p->X_add_symbol = &abs_symbol; |
1747 | } | |
1748 | ||
15c1449b | 1749 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
1750 | } |
1751 | ||
1752 | return BFD_RELOC_UNUSED; | |
1753 | } | |
1754 | ||
99a814a1 AM |
1755 | /* Like normal .long/.short/.word, except support @got, etc. |
1756 | Clobbers input_line_pointer, checks end-of-line. */ | |
252b5132 RH |
1757 | static void |
1758 | ppc_elf_cons (nbytes) | |
0baf16f2 | 1759 | register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */ |
252b5132 RH |
1760 | { |
1761 | expressionS exp; | |
1762 | bfd_reloc_code_real_type reloc; | |
1763 | ||
1764 | if (is_it_end_of_statement ()) | |
1765 | { | |
1766 | demand_empty_rest_of_line (); | |
1767 | return; | |
1768 | } | |
1769 | ||
1770 | do | |
1771 | { | |
1772 | expression (&exp); | |
1773 | if (exp.X_op == O_symbol | |
1774 | && *input_line_pointer == '@' | |
99a814a1 AM |
1775 | && (reloc = ppc_elf_suffix (&input_line_pointer, |
1776 | &exp)) != BFD_RELOC_UNUSED) | |
252b5132 | 1777 | { |
99a814a1 AM |
1778 | reloc_howto_type *reloc_howto; |
1779 | int size; | |
1780 | ||
1781 | reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
1782 | size = bfd_get_reloc_size (reloc_howto); | |
252b5132 RH |
1783 | |
1784 | if (size > nbytes) | |
0baf16f2 AM |
1785 | { |
1786 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
1787 | reloc_howto->name, nbytes); | |
1788 | } | |
252b5132 RH |
1789 | else |
1790 | { | |
0baf16f2 AM |
1791 | char *p; |
1792 | int offset; | |
252b5132 | 1793 | |
0baf16f2 AM |
1794 | p = frag_more (nbytes); |
1795 | offset = 0; | |
1796 | if (target_big_endian) | |
1797 | offset = nbytes - size; | |
99a814a1 AM |
1798 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
1799 | &exp, 0, reloc); | |
252b5132 RH |
1800 | } |
1801 | } | |
1802 | else | |
1803 | emit_expr (&exp, (unsigned int) nbytes); | |
1804 | } | |
1805 | while (*input_line_pointer++ == ','); | |
1806 | ||
99a814a1 AM |
1807 | /* Put terminator back into stream. */ |
1808 | input_line_pointer--; | |
252b5132 RH |
1809 | demand_empty_rest_of_line (); |
1810 | } | |
1811 | ||
1812 | /* Solaris pseduo op to change to the .rodata section. */ | |
1813 | static void | |
1814 | ppc_elf_rdata (xxx) | |
1815 | int xxx; | |
1816 | { | |
1817 | char *save_line = input_line_pointer; | |
1818 | static char section[] = ".rodata\n"; | |
1819 | ||
99a814a1 | 1820 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
1821 | input_line_pointer = section; |
1822 | obj_elf_section (xxx); | |
1823 | ||
1824 | input_line_pointer = save_line; | |
1825 | } | |
1826 | ||
99a814a1 | 1827 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 1828 | static void |
99a814a1 | 1829 | ppc_elf_lcomm (xxx) |
92161534 | 1830 | int xxx ATTRIBUTE_UNUSED; |
252b5132 RH |
1831 | { |
1832 | register char *name; | |
1833 | register char c; | |
1834 | register char *p; | |
1835 | offsetT size; | |
1836 | register symbolS *symbolP; | |
1837 | offsetT align; | |
1838 | segT old_sec; | |
1839 | int old_subsec; | |
1840 | char *pfrag; | |
1841 | int align2; | |
1842 | ||
1843 | name = input_line_pointer; | |
1844 | c = get_symbol_end (); | |
1845 | ||
99a814a1 | 1846 | /* just after name is now '\0'. */ |
252b5132 RH |
1847 | p = input_line_pointer; |
1848 | *p = c; | |
1849 | SKIP_WHITESPACE (); | |
1850 | if (*input_line_pointer != ',') | |
1851 | { | |
1852 | as_bad (_("Expected comma after symbol-name: rest of line ignored.")); | |
1853 | ignore_rest_of_line (); | |
1854 | return; | |
1855 | } | |
1856 | ||
1857 | input_line_pointer++; /* skip ',' */ | |
1858 | if ((size = get_absolute_expression ()) < 0) | |
1859 | { | |
1860 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
1861 | ignore_rest_of_line (); | |
1862 | return; | |
1863 | } | |
1864 | ||
1865 | /* The third argument to .lcomm is the alignment. */ | |
1866 | if (*input_line_pointer != ',') | |
1867 | align = 8; | |
1868 | else | |
1869 | { | |
1870 | ++input_line_pointer; | |
1871 | align = get_absolute_expression (); | |
1872 | if (align <= 0) | |
1873 | { | |
1874 | as_warn (_("ignoring bad alignment")); | |
1875 | align = 8; | |
1876 | } | |
1877 | } | |
1878 | ||
1879 | *p = 0; | |
1880 | symbolP = symbol_find_or_make (name); | |
1881 | *p = c; | |
1882 | ||
1883 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
1884 | { | |
1885 | as_bad (_("Ignoring attempt to re-define symbol `%s'."), | |
1886 | S_GET_NAME (symbolP)); | |
1887 | ignore_rest_of_line (); | |
1888 | return; | |
1889 | } | |
1890 | ||
1891 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
1892 | { | |
1893 | as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."), | |
1894 | S_GET_NAME (symbolP), | |
1895 | (long) S_GET_VALUE (symbolP), | |
1896 | (long) size); | |
1897 | ||
1898 | ignore_rest_of_line (); | |
1899 | return; | |
1900 | } | |
1901 | ||
99a814a1 | 1902 | /* Allocate_bss. */ |
252b5132 RH |
1903 | old_sec = now_seg; |
1904 | old_subsec = now_subseg; | |
1905 | if (align) | |
1906 | { | |
99a814a1 | 1907 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
1908 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
1909 | if (align != 1) | |
1910 | { | |
1911 | as_bad (_("Common alignment not a power of 2")); | |
1912 | ignore_rest_of_line (); | |
1913 | return; | |
1914 | } | |
1915 | } | |
1916 | else | |
1917 | align2 = 0; | |
1918 | ||
1919 | record_alignment (bss_section, align2); | |
1920 | subseg_set (bss_section, 0); | |
1921 | if (align2) | |
1922 | frag_align (align2, 0, 0); | |
1923 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
1924 | symbol_get_frag (symbolP)->fr_symbol = 0; |
1925 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
1926 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
1927 | (char *) 0); | |
1928 | *pfrag = 0; | |
1929 | S_SET_SIZE (symbolP, size); | |
1930 | S_SET_SEGMENT (symbolP, bss_section); | |
1931 | subseg_set (old_sec, old_subsec); | |
1932 | demand_empty_rest_of_line (); | |
1933 | } | |
1934 | ||
1935 | /* Validate any relocations emitted for -mrelocatable, possibly adding | |
1936 | fixups for word relocations in writable segments, so we can adjust | |
1937 | them at runtime. */ | |
1938 | static void | |
1939 | ppc_elf_validate_fix (fixp, seg) | |
1940 | fixS *fixp; | |
1941 | segT seg; | |
1942 | { | |
1943 | if (fixp->fx_done || fixp->fx_pcrel) | |
1944 | return; | |
1945 | ||
1946 | switch (shlib) | |
1947 | { | |
1948 | case SHLIB_NONE: | |
1949 | case SHLIB_PIC: | |
1950 | return; | |
1951 | ||
5d6f4f16 | 1952 | case SHLIB_MRELOCATABLE: |
252b5132 RH |
1953 | if (fixp->fx_r_type <= BFD_RELOC_UNUSED |
1954 | && fixp->fx_r_type != BFD_RELOC_16_GOTOFF | |
1955 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
1956 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
1957 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 1958 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
1959 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
1960 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
1961 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 1962 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
1963 | && strcmp (segment_name (seg), ".got2") != 0 |
1964 | && strcmp (segment_name (seg), ".dtors") != 0 | |
1965 | && strcmp (segment_name (seg), ".ctors") != 0 | |
1966 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
1967 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
1968 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
1969 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
1970 | { | |
1971 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
1972 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
1973 | { | |
1974 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1975 | _("Relocation cannot be done when using -mrelocatable")); | |
1976 | } | |
1977 | } | |
1978 | return; | |
1979 | } | |
1980 | } | |
0baf16f2 | 1981 | |
7e8d4ab4 AM |
1982 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
1983 | function descriptor sym if the corresponding code sym is used. */ | |
1984 | ||
1985 | void | |
1986 | ppc_frob_file_before_adjust () | |
0baf16f2 | 1987 | { |
7e8d4ab4 | 1988 | symbolS *symp; |
9232bbb0 | 1989 | asection *toc; |
0baf16f2 | 1990 | |
7e8d4ab4 AM |
1991 | if (!ppc_obj64) |
1992 | return; | |
1993 | ||
1994 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 1995 | { |
7e8d4ab4 AM |
1996 | const char *name; |
1997 | char *dotname; | |
1998 | symbolS *dotsym; | |
1999 | size_t len; | |
2000 | ||
2001 | name = S_GET_NAME (symp); | |
2002 | if (name[0] == '.') | |
2003 | continue; | |
2004 | ||
2005 | if (! S_IS_WEAK (symp) | |
2006 | || S_IS_DEFINED (symp)) | |
2007 | continue; | |
2008 | ||
2009 | len = strlen (name) + 1; | |
2010 | dotname = xmalloc (len + 1); | |
2011 | dotname[0] = '.'; | |
2012 | memcpy (dotname + 1, name, len); | |
461b725f | 2013 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2014 | free (dotname); |
2015 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2016 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2017 | symbol_mark_used (symp); |
2018 | ||
0baf16f2 AM |
2019 | } |
2020 | ||
9232bbb0 AM |
2021 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2022 | if (toc != NULL | |
2023 | && bfd_section_size (stdoutput, toc) > 0x10000) | |
2024 | as_warn (_("TOC section size exceeds 64k")); | |
2025 | ||
7e8d4ab4 AM |
2026 | /* Don't emit .TOC. symbol. */ |
2027 | symp = symbol_find (".TOC."); | |
2028 | if (symp != NULL) | |
2029 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
0baf16f2 | 2030 | } |
252b5132 RH |
2031 | #endif /* OBJ_ELF */ |
2032 | \f | |
2033 | #ifdef TE_PE | |
2034 | ||
2035 | /* | |
99a814a1 | 2036 | * Summary of parse_toc_entry. |
252b5132 RH |
2037 | * |
2038 | * in: Input_line_pointer points to the '[' in one of: | |
2039 | * | |
2040 | * [toc] [tocv] [toc32] [toc64] | |
2041 | * | |
2042 | * Anything else is an error of one kind or another. | |
2043 | * | |
81d4177b | 2044 | * out: |
252b5132 RH |
2045 | * return value: success or failure |
2046 | * toc_kind: kind of toc reference | |
2047 | * input_line_pointer: | |
2048 | * success: first char after the ']' | |
2049 | * failure: unchanged | |
2050 | * | |
2051 | * settings: | |
2052 | * | |
2053 | * [toc] - rv == success, toc_kind = default_toc | |
2054 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2055 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2056 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2057 | * | |
2058 | */ | |
2059 | ||
81d4177b KH |
2060 | enum toc_size_qualifier |
2061 | { | |
252b5132 RH |
2062 | default_toc, /* The toc cell constructed should be the system default size */ |
2063 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2064 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2065 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2066 | }; | |
2067 | ||
2068 | static int | |
99a814a1 | 2069 | parse_toc_entry (toc_kind) |
252b5132 RH |
2070 | enum toc_size_qualifier *toc_kind; |
2071 | { | |
2072 | char *start; | |
2073 | char *toc_spec; | |
2074 | char c; | |
2075 | enum toc_size_qualifier t; | |
2076 | ||
99a814a1 | 2077 | /* Save the input_line_pointer. */ |
252b5132 RH |
2078 | start = input_line_pointer; |
2079 | ||
99a814a1 | 2080 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2081 | ++input_line_pointer; |
2082 | SKIP_WHITESPACE (); | |
81d4177b | 2083 | |
99a814a1 | 2084 | /* Find the spelling of the operand. */ |
252b5132 RH |
2085 | toc_spec = input_line_pointer; |
2086 | c = get_symbol_end (); | |
2087 | ||
99a814a1 | 2088 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2089 | { |
2090 | t = default_toc; | |
2091 | } | |
99a814a1 | 2092 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2093 | { |
2094 | t = data_in_toc; | |
2095 | } | |
99a814a1 | 2096 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2097 | { |
2098 | t = must_be_32; | |
2099 | } | |
99a814a1 | 2100 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2101 | { |
2102 | t = must_be_64; | |
2103 | } | |
2104 | else | |
2105 | { | |
2106 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2107 | *input_line_pointer = c; |
2108 | input_line_pointer = start; | |
252b5132 RH |
2109 | return 0; |
2110 | } | |
2111 | ||
99a814a1 AM |
2112 | /* Now find the ']'. */ |
2113 | *input_line_pointer = c; | |
252b5132 | 2114 | |
81d4177b KH |
2115 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2116 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2117 | |
2118 | if (c != ']') | |
2119 | { | |
2120 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2121 | input_line_pointer = start; |
252b5132 RH |
2122 | return 0; |
2123 | } | |
2124 | ||
99a814a1 | 2125 | *toc_kind = t; |
252b5132 RH |
2126 | return 1; |
2127 | } | |
2128 | #endif | |
2129 | \f | |
2130 | ||
dc1d03fc | 2131 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2132 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2133 | static void | |
dc1d03fc | 2134 | ppc_apuinfo_section_add (apu, version) |
6a0c61b7 EZ |
2135 | unsigned int apu, version; |
2136 | { | |
2137 | unsigned int i; | |
2138 | ||
2139 | /* Check we don't already exist. */ | |
2140 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2141 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2142 | return; |
b34976b6 | 2143 | |
6a0c61b7 EZ |
2144 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2145 | { | |
2146 | if (ppc_apuinfo_num_alloc == 0) | |
2147 | { | |
2148 | ppc_apuinfo_num_alloc = 4; | |
2149 | ppc_apuinfo_list = (unsigned long *) | |
2150 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2151 | } | |
2152 | else | |
2153 | { | |
2154 | ppc_apuinfo_num_alloc += 4; | |
2155 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2156 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2157 | } | |
2158 | } | |
dc1d03fc | 2159 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2160 | } |
2161 | #undef APUID | |
dc1d03fc | 2162 | #endif |
6a0c61b7 EZ |
2163 | \f |
2164 | ||
252b5132 RH |
2165 | /* We need to keep a list of fixups. We can't simply generate them as |
2166 | we go, because that would require us to first create the frag, and | |
2167 | that would screw up references to ``.''. */ | |
2168 | ||
2169 | struct ppc_fixup | |
2170 | { | |
2171 | expressionS exp; | |
2172 | int opindex; | |
2173 | bfd_reloc_code_real_type reloc; | |
2174 | }; | |
2175 | ||
2176 | #define MAX_INSN_FIXUPS (5) | |
2177 | ||
2178 | /* This routine is called for each instruction to be assembled. */ | |
2179 | ||
2180 | void | |
2181 | md_assemble (str) | |
2182 | char *str; | |
2183 | { | |
2184 | char *s; | |
2185 | const struct powerpc_opcode *opcode; | |
2186 | unsigned long insn; | |
2187 | const unsigned char *opindex_ptr; | |
2188 | int skip_optional; | |
2189 | int need_paren; | |
2190 | int next_opindex; | |
2191 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2192 | int fc; | |
2193 | char *f; | |
09b935ac | 2194 | int addr_mod; |
252b5132 RH |
2195 | int i; |
2196 | #ifdef OBJ_ELF | |
2197 | bfd_reloc_code_real_type reloc; | |
2198 | #endif | |
2199 | ||
2200 | /* Get the opcode. */ | |
3882b010 | 2201 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2202 | ; |
2203 | if (*s != '\0') | |
2204 | *s++ = '\0'; | |
2205 | ||
2206 | /* Look up the opcode in the hash table. */ | |
2207 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2208 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2209 | { | |
2210 | const struct powerpc_macro *macro; | |
2211 | ||
2212 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2213 | if (macro == (const struct powerpc_macro *) NULL) | |
2214 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
2215 | else | |
2216 | ppc_macro (s, macro); | |
2217 | ||
2218 | return; | |
2219 | } | |
2220 | ||
2221 | insn = opcode->opcode; | |
2222 | ||
2223 | str = s; | |
3882b010 | 2224 | while (ISSPACE (*str)) |
252b5132 RH |
2225 | ++str; |
2226 | ||
2227 | /* PowerPC operands are just expressions. The only real issue is | |
2228 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2229 | an optional operand separate the operands only with commas (in some |
2230 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2231 | have optional operands). Most instructions with optional operands | |
2232 | have only one. Those that have more than one optional operand can | |
2233 | take either all their operands or none. So, before we start seriously | |
2234 | parsing the operands, we check to see if we have optional operands, | |
2235 | and if we do, we count the number of commas to see which operands | |
2236 | have been omitted. */ | |
252b5132 RH |
2237 | skip_optional = 0; |
2238 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2239 | { | |
2240 | const struct powerpc_operand *operand; | |
2241 | ||
2242 | operand = &powerpc_operands[*opindex_ptr]; | |
2243 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2244 | { | |
2245 | unsigned int opcount; | |
7fe9cf6b NC |
2246 | unsigned int num_operands_expected; |
2247 | unsigned int i; | |
252b5132 RH |
2248 | |
2249 | /* There is an optional operand. Count the number of | |
2250 | commas in the input line. */ | |
2251 | if (*str == '\0') | |
2252 | opcount = 0; | |
2253 | else | |
2254 | { | |
2255 | opcount = 1; | |
2256 | s = str; | |
2257 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2258 | { | |
2259 | ++opcount; | |
2260 | ++s; | |
2261 | } | |
2262 | } | |
2263 | ||
7fe9cf6b NC |
2264 | /* Compute the number of expected operands. |
2265 | Do not count fake operands. */ | |
2266 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2267 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2268 | ++ num_operands_expected; | |
2269 | ||
252b5132 RH |
2270 | /* If there are fewer operands in the line then are called |
2271 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2272 | operands. */ |
7fe9cf6b | 2273 | if (opcount < num_operands_expected) |
252b5132 RH |
2274 | skip_optional = 1; |
2275 | ||
2276 | break; | |
2277 | } | |
2278 | } | |
2279 | ||
2280 | /* Gather the operands. */ | |
2281 | need_paren = 0; | |
2282 | next_opindex = 0; | |
2283 | fc = 0; | |
2284 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2285 | { | |
2286 | const struct powerpc_operand *operand; | |
2287 | const char *errmsg; | |
2288 | char *hold; | |
2289 | expressionS ex; | |
2290 | char endc; | |
2291 | ||
2292 | if (next_opindex == 0) | |
2293 | operand = &powerpc_operands[*opindex_ptr]; | |
2294 | else | |
2295 | { | |
2296 | operand = &powerpc_operands[next_opindex]; | |
2297 | next_opindex = 0; | |
2298 | } | |
252b5132 RH |
2299 | errmsg = NULL; |
2300 | ||
2301 | /* If this is a fake operand, then we do not expect anything | |
2302 | from the input. */ | |
2303 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2304 | { | |
2b3c4602 | 2305 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 RH |
2306 | if (errmsg != (const char *) NULL) |
2307 | as_bad (errmsg); | |
2308 | continue; | |
2309 | } | |
2310 | ||
2311 | /* If this is an optional operand, and we are skipping it, just | |
2312 | insert a zero. */ | |
2313 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2314 | && skip_optional) | |
2315 | { | |
2316 | if (operand->insert) | |
2317 | { | |
2b3c4602 | 2318 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 RH |
2319 | if (errmsg != (const char *) NULL) |
2320 | as_bad (errmsg); | |
2321 | } | |
2322 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2323 | next_opindex = *opindex_ptr + 1; | |
2324 | continue; | |
2325 | } | |
2326 | ||
2327 | /* Gather the operand. */ | |
2328 | hold = input_line_pointer; | |
2329 | input_line_pointer = str; | |
2330 | ||
2331 | #ifdef TE_PE | |
81d4177b | 2332 | if (*input_line_pointer == '[') |
252b5132 RH |
2333 | { |
2334 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2335 | * |
2336 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2337 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2338 | * The argument following the `]' must be a symbol name, and the | |
2339 | * register must be the toc register: 'rtoc' or '2' | |
2340 | * | |
2341 | * The effect is to 0 as the displacement field | |
2342 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2343 | * the appropriate variation) reloc against it based on the symbol. | |
2344 | * The linker will build the toc, and insert the resolved toc offset. | |
2345 | * | |
2346 | * Note: | |
2347 | * o The size of the toc entry is currently assumed to be | |
2348 | * 32 bits. This should not be assumed to be a hard coded | |
2349 | * number. | |
2350 | * o In an effort to cope with a change from 32 to 64 bits, | |
2351 | * there are also toc entries that are specified to be | |
2352 | * either 32 or 64 bits: | |
2353 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2354 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2355 | * These demand toc entries of the specified size, and the | |
2356 | * instruction probably requires it. | |
2357 | */ | |
252b5132 RH |
2358 | |
2359 | int valid_toc; | |
2360 | enum toc_size_qualifier toc_kind; | |
2361 | bfd_reloc_code_real_type toc_reloc; | |
2362 | ||
99a814a1 AM |
2363 | /* Go parse off the [tocXX] part. */ |
2364 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2365 | |
81d4177b | 2366 | if (!valid_toc) |
252b5132 | 2367 | { |
99a814a1 AM |
2368 | /* Note: message has already been issued. |
2369 | FIXME: what sort of recovery should we do? | |
2370 | demand_rest_of_line (); return; ? */ | |
252b5132 RH |
2371 | } |
2372 | ||
99a814a1 AM |
2373 | /* Now get the symbol following the ']'. */ |
2374 | expression (&ex); | |
252b5132 RH |
2375 | |
2376 | switch (toc_kind) | |
2377 | { | |
2378 | case default_toc: | |
99a814a1 AM |
2379 | /* In this case, we may not have seen the symbol yet, |
2380 | since it is allowed to appear on a .extern or .globl | |
2381 | or just be a label in the .data section. */ | |
252b5132 RH |
2382 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2383 | break; | |
2384 | case data_in_toc: | |
99a814a1 AM |
2385 | /* 1. The symbol must be defined and either in the toc |
2386 | section, or a global. | |
2387 | 2. The reloc generated must have the TOCDEFN flag set | |
2388 | in upper bit mess of the reloc type. | |
2389 | FIXME: It's a little confusing what the tocv | |
2390 | qualifier can be used for. At the very least, I've | |
2391 | seen three uses, only one of which I'm sure I can | |
2392 | explain. */ | |
81d4177b KH |
2393 | if (ex.X_op == O_symbol) |
2394 | { | |
252b5132 | 2395 | assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2396 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2397 | != tocdata_section) | |
252b5132 | 2398 | { |
99a814a1 | 2399 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2400 | } |
2401 | } | |
2402 | ||
2403 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2404 | break; | |
2405 | case must_be_32: | |
99a814a1 AM |
2406 | /* FIXME: these next two specifically specify 32/64 bit |
2407 | toc entries. We don't support them today. Is this | |
2408 | the right way to say that? */ | |
252b5132 RH |
2409 | toc_reloc = BFD_RELOC_UNUSED; |
2410 | as_bad (_("Unimplemented toc32 expression modifier")); | |
2411 | break; | |
2412 | case must_be_64: | |
99a814a1 | 2413 | /* FIXME: see above. */ |
252b5132 RH |
2414 | toc_reloc = BFD_RELOC_UNUSED; |
2415 | as_bad (_("Unimplemented toc64 expression modifier")); | |
2416 | break; | |
2417 | default: | |
bc805888 | 2418 | fprintf (stderr, |
99a814a1 AM |
2419 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2420 | toc_kind); | |
bc805888 | 2421 | abort (); |
252b5132 RH |
2422 | break; |
2423 | } | |
2424 | ||
2425 | /* We need to generate a fixup for this expression. */ | |
2426 | if (fc >= MAX_INSN_FIXUPS) | |
2427 | as_fatal (_("too many fixups")); | |
2428 | ||
2429 | fixups[fc].reloc = toc_reloc; | |
2430 | fixups[fc].exp = ex; | |
2431 | fixups[fc].opindex = *opindex_ptr; | |
2432 | ++fc; | |
2433 | ||
99a814a1 AM |
2434 | /* Ok. We've set up the fixup for the instruction. Now make it |
2435 | look like the constant 0 was found here. */ | |
252b5132 RH |
2436 | ex.X_unsigned = 1; |
2437 | ex.X_op = O_constant; | |
2438 | ex.X_add_number = 0; | |
2439 | ex.X_add_symbol = NULL; | |
2440 | ex.X_op_symbol = NULL; | |
2441 | } | |
2442 | ||
2443 | else | |
2444 | #endif /* TE_PE */ | |
2445 | { | |
2446 | if (! register_name (&ex)) | |
2447 | { | |
2448 | if ((operand->flags & PPC_OPERAND_CR) != 0) | |
b34976b6 | 2449 | cr_operand = TRUE; |
252b5132 | 2450 | expression (&ex); |
b34976b6 | 2451 | cr_operand = FALSE; |
252b5132 RH |
2452 | } |
2453 | } | |
2454 | ||
2455 | str = input_line_pointer; | |
2456 | input_line_pointer = hold; | |
2457 | ||
2458 | if (ex.X_op == O_illegal) | |
2459 | as_bad (_("illegal operand")); | |
2460 | else if (ex.X_op == O_absent) | |
2461 | as_bad (_("missing operand")); | |
2462 | else if (ex.X_op == O_register) | |
2463 | { | |
2464 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
2465 | (char *) NULL, 0); | |
2466 | } | |
2467 | else if (ex.X_op == O_constant) | |
2468 | { | |
2469 | #ifdef OBJ_ELF | |
81d4177b | 2470 | /* Allow @HA, @L, @H on constants. */ |
252b5132 RH |
2471 | char *orig_str = str; |
2472 | ||
2473 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2474 | switch (reloc) | |
2475 | { | |
2476 | default: | |
2477 | str = orig_str; | |
2478 | break; | |
2479 | ||
2480 | case BFD_RELOC_LO16: | |
2481 | /* X_unsigned is the default, so if the user has done | |
0baf16f2 AM |
2482 | something which cleared it, we always produce a |
2483 | signed value. */ | |
2484 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
252b5132 RH |
2485 | ex.X_add_number &= 0xffff; |
2486 | else | |
0baf16f2 | 2487 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2488 | break; |
2489 | ||
2490 | case BFD_RELOC_HI16: | |
0baf16f2 AM |
2491 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2492 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2493 | else | |
2494 | ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); | |
252b5132 RH |
2495 | break; |
2496 | ||
2497 | case BFD_RELOC_HI16_S: | |
0baf16f2 AM |
2498 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2499 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2500 | else | |
2501 | ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); | |
2502 | break; | |
2503 | ||
0baf16f2 AM |
2504 | case BFD_RELOC_PPC64_HIGHER: |
2505 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2506 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); | |
2507 | else | |
2508 | ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); | |
2509 | break; | |
2510 | ||
2511 | case BFD_RELOC_PPC64_HIGHER_S: | |
2512 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2513 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); | |
2514 | else | |
2515 | ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); | |
252b5132 | 2516 | break; |
0baf16f2 AM |
2517 | |
2518 | case BFD_RELOC_PPC64_HIGHEST: | |
2519 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2520 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); | |
2521 | else | |
2522 | ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); | |
2523 | break; | |
2524 | ||
2525 | case BFD_RELOC_PPC64_HIGHEST_S: | |
2526 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2527 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); | |
2528 | else | |
2529 | ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); | |
2530 | break; | |
252b5132 | 2531 | } |
0baf16f2 | 2532 | #endif /* OBJ_ELF */ |
252b5132 RH |
2533 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
2534 | (char *) NULL, 0); | |
2535 | } | |
2536 | #ifdef OBJ_ELF | |
2537 | else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2538 | { | |
cdba85ec AM |
2539 | /* Some TLS tweaks. */ |
2540 | switch (reloc) | |
2541 | { | |
2542 | default: | |
2543 | break; | |
2544 | case BFD_RELOC_PPC_TLS: | |
2545 | insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2, | |
2546 | (char *) NULL, 0); | |
2547 | break; | |
2548 | /* We'll only use the 32 (or 64) bit form of these relocations | |
2549 | in constants. Instructions get the 16 bit form. */ | |
2550 | case BFD_RELOC_PPC_DTPREL: | |
2551 | reloc = BFD_RELOC_PPC_DTPREL16; | |
2552 | break; | |
2553 | case BFD_RELOC_PPC_TPREL: | |
2554 | reloc = BFD_RELOC_PPC_TPREL16; | |
2555 | break; | |
2556 | } | |
2557 | ||
99a814a1 AM |
2558 | /* For the absolute forms of branches, convert the PC |
2559 | relative form back into the absolute. */ | |
252b5132 RH |
2560 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) |
2561 | { | |
2562 | switch (reloc) | |
2563 | { | |
2564 | case BFD_RELOC_PPC_B26: | |
2565 | reloc = BFD_RELOC_PPC_BA26; | |
2566 | break; | |
2567 | case BFD_RELOC_PPC_B16: | |
2568 | reloc = BFD_RELOC_PPC_BA16; | |
2569 | break; | |
2570 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
2571 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
2572 | break; | |
2573 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
2574 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
2575 | break; | |
2576 | default: | |
2577 | break; | |
2578 | } | |
2579 | } | |
2580 | ||
2b3c4602 | 2581 | if (ppc_obj64 |
adadcc0c | 2582 | && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) |
0baf16f2 AM |
2583 | { |
2584 | switch (reloc) | |
2585 | { | |
2586 | case BFD_RELOC_16: | |
2587 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
2588 | break; | |
2589 | case BFD_RELOC_LO16: | |
2590 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
2591 | break; | |
2592 | case BFD_RELOC_16_GOTOFF: | |
2593 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
2594 | break; | |
2595 | case BFD_RELOC_LO16_GOTOFF: | |
2596 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
2597 | break; | |
2598 | case BFD_RELOC_LO16_PLTOFF: | |
2599 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
2600 | break; | |
1cfc59d5 | 2601 | case BFD_RELOC_16_BASEREL: |
0baf16f2 AM |
2602 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; |
2603 | break; | |
2604 | case BFD_RELOC_LO16_BASEREL: | |
2605 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
2606 | break; | |
2607 | case BFD_RELOC_PPC_TOC16: | |
2608 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
2609 | break; | |
2610 | case BFD_RELOC_PPC64_TOC16_LO: | |
2611 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
2612 | break; | |
2613 | case BFD_RELOC_PPC64_PLTGOT16: | |
2614 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
2615 | break; | |
2616 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
2617 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
2618 | break; | |
cdba85ec AM |
2619 | case BFD_RELOC_PPC_DTPREL16: |
2620 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
2621 | break; | |
2622 | case BFD_RELOC_PPC_DTPREL16_LO: | |
2623 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
2624 | break; | |
2625 | case BFD_RELOC_PPC_TPREL16: | |
2626 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
2627 | break; | |
2628 | case BFD_RELOC_PPC_TPREL16_LO: | |
2629 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
2630 | break; | |
2631 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
2632 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
2633 | case BFD_RELOC_PPC_GOT_TPREL16: | |
2634 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
2635 | break; | |
0baf16f2 AM |
2636 | default: |
2637 | as_bad (_("unsupported relocation for DS offset field")); | |
2638 | break; | |
2639 | } | |
2640 | } | |
2641 | ||
252b5132 RH |
2642 | /* We need to generate a fixup for this expression. */ |
2643 | if (fc >= MAX_INSN_FIXUPS) | |
2644 | as_fatal (_("too many fixups")); | |
2645 | fixups[fc].exp = ex; | |
2646 | fixups[fc].opindex = 0; | |
2647 | fixups[fc].reloc = reloc; | |
2648 | ++fc; | |
2649 | } | |
2650 | #endif /* OBJ_ELF */ | |
2651 | ||
2652 | else | |
2653 | { | |
2654 | /* We need to generate a fixup for this expression. */ | |
2655 | if (fc >= MAX_INSN_FIXUPS) | |
2656 | as_fatal (_("too many fixups")); | |
2657 | fixups[fc].exp = ex; | |
2658 | fixups[fc].opindex = *opindex_ptr; | |
2659 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
2660 | ++fc; | |
2661 | } | |
2662 | ||
2663 | if (need_paren) | |
2664 | { | |
2665 | endc = ')'; | |
2666 | need_paren = 0; | |
2667 | } | |
2668 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
2669 | { | |
2670 | endc = '('; | |
2671 | need_paren = 1; | |
2672 | } | |
2673 | else | |
2674 | endc = ','; | |
2675 | ||
2676 | /* The call to expression should have advanced str past any | |
2677 | whitespace. */ | |
2678 | if (*str != endc | |
2679 | && (endc != ',' || *str != '\0')) | |
2680 | { | |
2681 | as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc); | |
2682 | break; | |
2683 | } | |
2684 | ||
2685 | if (*str != '\0') | |
2686 | ++str; | |
2687 | } | |
2688 | ||
3882b010 | 2689 | while (ISSPACE (*str)) |
252b5132 RH |
2690 | ++str; |
2691 | ||
2692 | if (*str != '\0') | |
2693 | as_bad (_("junk at end of line: `%s'"), str); | |
2694 | ||
dc1d03fc | 2695 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2696 | /* Do we need/want a APUinfo section? */ |
2697 | if (ppc_cpu & (PPC_OPCODE_SPE | |
2698 | | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | |
2699 | | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | |
2700 | | PPC_OPCODE_RFMCI)) | |
2701 | { | |
2702 | /* These are all version "1". */ | |
2703 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 2704 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 2705 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 2706 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 2707 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 2708 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 2709 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 2710 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 2711 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 2712 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 2713 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 2714 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 2715 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 2716 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
6a0c61b7 | 2717 | } |
dc1d03fc | 2718 | #endif |
6a0c61b7 | 2719 | |
252b5132 RH |
2720 | /* Write out the instruction. */ |
2721 | f = frag_more (4); | |
09b935ac AM |
2722 | addr_mod = frag_now_fix () & 3; |
2723 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
2724 | as_bad (_("instruction address is not a multiple of 4")); | |
2725 | frag_now->insn_addr = addr_mod; | |
2726 | frag_now->has_code = 1; | |
252b5132 RH |
2727 | md_number_to_chars (f, insn, 4); |
2728 | ||
5d6f4f16 GK |
2729 | #ifdef OBJ_ELF |
2730 | dwarf2_emit_insn (4); | |
2731 | #endif | |
2732 | ||
252b5132 RH |
2733 | /* Create any fixups. At this point we do not use a |
2734 | bfd_reloc_code_real_type, but instead just use the | |
2735 | BFD_RELOC_UNUSED plus the operand index. This lets us easily | |
2736 | handle fixups for any operand type, although that is admittedly | |
2737 | not a very exciting feature. We pick a BFD reloc type in | |
55cf6793 | 2738 | md_apply_fix. */ |
252b5132 RH |
2739 | for (i = 0; i < fc; i++) |
2740 | { | |
2741 | const struct powerpc_operand *operand; | |
2742 | ||
2743 | operand = &powerpc_operands[fixups[i].opindex]; | |
2744 | if (fixups[i].reloc != BFD_RELOC_UNUSED) | |
2745 | { | |
99a814a1 | 2746 | reloc_howto_type *reloc_howto; |
252b5132 RH |
2747 | int size; |
2748 | int offset; | |
2749 | fixS *fixP; | |
2750 | ||
99a814a1 | 2751 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
2752 | if (!reloc_howto) |
2753 | abort (); | |
2754 | ||
2755 | size = bfd_get_reloc_size (reloc_howto); | |
2756 | offset = target_big_endian ? (4 - size) : 0; | |
2757 | ||
2758 | if (size < 1 || size > 4) | |
bc805888 | 2759 | abort (); |
252b5132 | 2760 | |
99a814a1 AM |
2761 | fixP = fix_new_exp (frag_now, |
2762 | f - frag_now->fr_literal + offset, | |
2763 | size, | |
2764 | &fixups[i].exp, | |
2765 | reloc_howto->pc_relative, | |
252b5132 RH |
2766 | fixups[i].reloc); |
2767 | ||
2768 | /* Turn off complaints that the addend is too large for things like | |
2769 | foo+100000@ha. */ | |
2770 | switch (fixups[i].reloc) | |
2771 | { | |
2772 | case BFD_RELOC_16_GOTOFF: | |
2773 | case BFD_RELOC_PPC_TOC16: | |
2774 | case BFD_RELOC_LO16: | |
2775 | case BFD_RELOC_HI16: | |
2776 | case BFD_RELOC_HI16_S: | |
0baf16f2 | 2777 | #ifdef OBJ_ELF |
0baf16f2 AM |
2778 | case BFD_RELOC_PPC64_HIGHER: |
2779 | case BFD_RELOC_PPC64_HIGHER_S: | |
2780 | case BFD_RELOC_PPC64_HIGHEST: | |
2781 | case BFD_RELOC_PPC64_HIGHEST_S: | |
0baf16f2 | 2782 | #endif |
252b5132 RH |
2783 | fixP->fx_no_overflow = 1; |
2784 | break; | |
2785 | default: | |
2786 | break; | |
2787 | } | |
2788 | } | |
2789 | else | |
99a814a1 AM |
2790 | fix_new_exp (frag_now, |
2791 | f - frag_now->fr_literal, | |
2792 | 4, | |
252b5132 RH |
2793 | &fixups[i].exp, |
2794 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
2795 | ((bfd_reloc_code_real_type) | |
99a814a1 | 2796 | (fixups[i].opindex + (int) BFD_RELOC_UNUSED))); |
252b5132 RH |
2797 | } |
2798 | } | |
2799 | ||
2800 | /* Handle a macro. Gather all the operands, transform them as | |
2801 | described by the macro, and call md_assemble recursively. All the | |
2802 | operands are separated by commas; we don't accept parentheses | |
2803 | around operands here. */ | |
2804 | ||
2805 | static void | |
2806 | ppc_macro (str, macro) | |
2807 | char *str; | |
2808 | const struct powerpc_macro *macro; | |
2809 | { | |
2810 | char *operands[10]; | |
2811 | unsigned int count; | |
2812 | char *s; | |
2813 | unsigned int len; | |
2814 | const char *format; | |
db557034 | 2815 | unsigned int arg; |
252b5132 RH |
2816 | char *send; |
2817 | char *complete; | |
2818 | ||
2819 | /* Gather the users operands into the operands array. */ | |
2820 | count = 0; | |
2821 | s = str; | |
2822 | while (1) | |
2823 | { | |
2824 | if (count >= sizeof operands / sizeof operands[0]) | |
2825 | break; | |
2826 | operands[count++] = s; | |
2827 | s = strchr (s, ','); | |
2828 | if (s == (char *) NULL) | |
2829 | break; | |
2830 | *s++ = '\0'; | |
81d4177b | 2831 | } |
252b5132 RH |
2832 | |
2833 | if (count != macro->operands) | |
2834 | { | |
2835 | as_bad (_("wrong number of operands")); | |
2836 | return; | |
2837 | } | |
2838 | ||
2839 | /* Work out how large the string must be (the size is unbounded | |
2840 | because it includes user input). */ | |
2841 | len = 0; | |
2842 | format = macro->format; | |
2843 | while (*format != '\0') | |
2844 | { | |
2845 | if (*format != '%') | |
2846 | { | |
2847 | ++len; | |
2848 | ++format; | |
2849 | } | |
2850 | else | |
2851 | { | |
2852 | arg = strtol (format + 1, &send, 10); | |
db557034 | 2853 | know (send != format && arg < count); |
252b5132 RH |
2854 | len += strlen (operands[arg]); |
2855 | format = send; | |
2856 | } | |
2857 | } | |
2858 | ||
2859 | /* Put the string together. */ | |
2860 | complete = s = (char *) alloca (len + 1); | |
2861 | format = macro->format; | |
2862 | while (*format != '\0') | |
2863 | { | |
2864 | if (*format != '%') | |
2865 | *s++ = *format++; | |
2866 | else | |
2867 | { | |
2868 | arg = strtol (format + 1, &send, 10); | |
2869 | strcpy (s, operands[arg]); | |
2870 | s += strlen (s); | |
2871 | format = send; | |
2872 | } | |
2873 | } | |
2874 | *s = '\0'; | |
2875 | ||
2876 | /* Assemble the constructed instruction. */ | |
2877 | md_assemble (complete); | |
81d4177b | 2878 | } |
252b5132 RH |
2879 | \f |
2880 | #ifdef OBJ_ELF | |
99a814a1 | 2881 | /* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */ |
252b5132 RH |
2882 | |
2883 | int | |
2884 | ppc_section_letter (letter, ptr_msg) | |
2885 | int letter; | |
2886 | char **ptr_msg; | |
2887 | { | |
2888 | if (letter == 'e') | |
2889 | return SHF_EXCLUDE; | |
2890 | ||
13ae64f3 | 2891 | *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string"); |
711ef82f | 2892 | return -1; |
252b5132 RH |
2893 | } |
2894 | ||
2895 | int | |
9de8d8f1 RH |
2896 | ppc_section_word (str, len) |
2897 | char *str; | |
2898 | size_t len; | |
252b5132 | 2899 | { |
9de8d8f1 RH |
2900 | if (len == 7 && strncmp (str, "exclude", 7) == 0) |
2901 | return SHF_EXCLUDE; | |
252b5132 | 2902 | |
9de8d8f1 | 2903 | return -1; |
252b5132 RH |
2904 | } |
2905 | ||
2906 | int | |
9de8d8f1 RH |
2907 | ppc_section_type (str, len) |
2908 | char *str; | |
2909 | size_t len; | |
252b5132 | 2910 | { |
9de8d8f1 RH |
2911 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
2912 | return SHT_ORDERED; | |
252b5132 | 2913 | |
9de8d8f1 | 2914 | return -1; |
252b5132 RH |
2915 | } |
2916 | ||
2917 | int | |
2918 | ppc_section_flags (flags, attr, type) | |
2919 | int flags; | |
2920 | int attr; | |
2921 | int type; | |
2922 | { | |
2923 | if (type == SHT_ORDERED) | |
2924 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
2925 | ||
2926 | if (attr & SHF_EXCLUDE) | |
2927 | flags |= SEC_EXCLUDE; | |
2928 | ||
2929 | return flags; | |
2930 | } | |
2931 | #endif /* OBJ_ELF */ | |
2932 | ||
2933 | \f | |
2934 | /* Pseudo-op handling. */ | |
2935 | ||
2936 | /* The .byte pseudo-op. This is similar to the normal .byte | |
2937 | pseudo-op, but it can also take a single ASCII string. */ | |
2938 | ||
2939 | static void | |
2940 | ppc_byte (ignore) | |
92161534 | 2941 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2942 | { |
2943 | if (*input_line_pointer != '\"') | |
2944 | { | |
2945 | cons (1); | |
2946 | return; | |
2947 | } | |
2948 | ||
2949 | /* Gather characters. A real double quote is doubled. Unusual | |
2950 | characters are not permitted. */ | |
2951 | ++input_line_pointer; | |
2952 | while (1) | |
2953 | { | |
2954 | char c; | |
2955 | ||
2956 | c = *input_line_pointer++; | |
2957 | ||
2958 | if (c == '\"') | |
2959 | { | |
2960 | if (*input_line_pointer != '\"') | |
2961 | break; | |
2962 | ++input_line_pointer; | |
2963 | } | |
2964 | ||
2965 | FRAG_APPEND_1_CHAR (c); | |
2966 | } | |
2967 | ||
2968 | demand_empty_rest_of_line (); | |
2969 | } | |
2970 | \f | |
2971 | #ifdef OBJ_XCOFF | |
2972 | ||
2973 | /* XCOFF specific pseudo-op handling. */ | |
2974 | ||
2975 | /* This is set if we are creating a .stabx symbol, since we don't want | |
2976 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 2977 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
2978 | |
2979 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
2980 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 2981 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 2982 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
2983 | |
2984 | static void | |
2985 | ppc_comm (lcomm) | |
2986 | int lcomm; | |
2987 | { | |
2988 | asection *current_seg = now_seg; | |
2989 | subsegT current_subseg = now_subseg; | |
2990 | char *name; | |
2991 | char endc; | |
2992 | char *end_name; | |
2993 | offsetT size; | |
2994 | offsetT align; | |
2995 | symbolS *lcomm_sym = NULL; | |
2996 | symbolS *sym; | |
2997 | char *pfrag; | |
2998 | ||
2999 | name = input_line_pointer; | |
3000 | endc = get_symbol_end (); | |
3001 | end_name = input_line_pointer; | |
3002 | *end_name = endc; | |
3003 | ||
3004 | if (*input_line_pointer != ',') | |
3005 | { | |
3006 | as_bad (_("missing size")); | |
3007 | ignore_rest_of_line (); | |
3008 | return; | |
3009 | } | |
3010 | ++input_line_pointer; | |
3011 | ||
3012 | size = get_absolute_expression (); | |
3013 | if (size < 0) | |
3014 | { | |
3015 | as_bad (_("negative size")); | |
3016 | ignore_rest_of_line (); | |
3017 | return; | |
3018 | } | |
3019 | ||
3020 | if (! lcomm) | |
3021 | { | |
3022 | /* The third argument to .comm is the alignment. */ | |
3023 | if (*input_line_pointer != ',') | |
1ad63b2f | 3024 | align = 2; |
252b5132 RH |
3025 | else |
3026 | { | |
3027 | ++input_line_pointer; | |
3028 | align = get_absolute_expression (); | |
3029 | if (align <= 0) | |
3030 | { | |
3031 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3032 | align = 2; |
252b5132 RH |
3033 | } |
3034 | } | |
3035 | } | |
3036 | else | |
3037 | { | |
3038 | char *lcomm_name; | |
3039 | char lcomm_endc; | |
3040 | ||
1ad63b2f | 3041 | if (size <= 4) |
252b5132 RH |
3042 | align = 2; |
3043 | else | |
3044 | align = 3; | |
3045 | ||
3046 | /* The third argument to .lcomm appears to be the real local | |
3047 | common symbol to create. References to the symbol named in | |
3048 | the first argument are turned into references to the third | |
3049 | argument. */ | |
3050 | if (*input_line_pointer != ',') | |
3051 | { | |
3052 | as_bad (_("missing real symbol name")); | |
3053 | ignore_rest_of_line (); | |
3054 | return; | |
3055 | } | |
3056 | ++input_line_pointer; | |
3057 | ||
3058 | lcomm_name = input_line_pointer; | |
3059 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3060 | |
252b5132 RH |
3061 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3062 | ||
3063 | *input_line_pointer = lcomm_endc; | |
3064 | } | |
3065 | ||
3066 | *end_name = '\0'; | |
3067 | sym = symbol_find_or_make (name); | |
3068 | *end_name = endc; | |
3069 | ||
3070 | if (S_IS_DEFINED (sym) | |
3071 | || S_GET_VALUE (sym) != 0) | |
3072 | { | |
3073 | as_bad (_("attempt to redefine symbol")); | |
3074 | ignore_rest_of_line (); | |
3075 | return; | |
3076 | } | |
81d4177b | 3077 | |
252b5132 | 3078 | record_alignment (bss_section, align); |
81d4177b | 3079 | |
252b5132 RH |
3080 | if (! lcomm |
3081 | || ! S_IS_DEFINED (lcomm_sym)) | |
3082 | { | |
3083 | symbolS *def_sym; | |
3084 | offsetT def_size; | |
3085 | ||
3086 | if (! lcomm) | |
3087 | { | |
3088 | def_sym = sym; | |
3089 | def_size = size; | |
3090 | S_SET_EXTERNAL (sym); | |
3091 | } | |
3092 | else | |
3093 | { | |
809ffe0d | 3094 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3095 | def_sym = lcomm_sym; |
3096 | def_size = 0; | |
3097 | } | |
3098 | ||
3099 | subseg_set (bss_section, 1); | |
3100 | frag_align (align, 0, 0); | |
81d4177b | 3101 | |
809ffe0d | 3102 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3103 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3104 | def_size, (char *) NULL); | |
3105 | *pfrag = 0; | |
3106 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3107 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3108 | } |
3109 | else if (lcomm) | |
3110 | { | |
3111 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3112 | symbol_get_frag (lcomm_sym)->fr_offset = |
3113 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3114 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3115 | if (align > symbol_get_tc (lcomm_sym)->align) |
3116 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3117 | } |
3118 | ||
3119 | if (lcomm) | |
3120 | { | |
3121 | /* Make sym an offset from lcomm_sym. */ | |
3122 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3123 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3124 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3125 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3126 | } |
3127 | ||
3128 | subseg_set (current_seg, current_subseg); | |
3129 | ||
3130 | demand_empty_rest_of_line (); | |
3131 | } | |
3132 | ||
3133 | /* The .csect pseudo-op. This switches us into a different | |
3134 | subsegment. The first argument is a symbol whose value is the | |
3135 | start of the .csect. In COFF, csect symbols get special aux | |
3136 | entries defined by the x_csect field of union internal_auxent. The | |
3137 | optional second argument is the alignment (the default is 2). */ | |
3138 | ||
3139 | static void | |
3140 | ppc_csect (ignore) | |
5480ccf3 | 3141 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3142 | { |
3143 | char *name; | |
3144 | char endc; | |
3145 | symbolS *sym; | |
931e13a6 | 3146 | offsetT align; |
252b5132 RH |
3147 | |
3148 | name = input_line_pointer; | |
3149 | endc = get_symbol_end (); | |
81d4177b | 3150 | |
252b5132 RH |
3151 | sym = symbol_find_or_make (name); |
3152 | ||
3153 | *input_line_pointer = endc; | |
3154 | ||
3155 | if (S_GET_NAME (sym)[0] == '\0') | |
3156 | { | |
3157 | /* An unnamed csect is assumed to be [PR]. */ | |
809ffe0d | 3158 | symbol_get_tc (sym)->class = XMC_PR; |
252b5132 RH |
3159 | } |
3160 | ||
931e13a6 | 3161 | align = 2; |
252b5132 RH |
3162 | if (*input_line_pointer == ',') |
3163 | { | |
3164 | ++input_line_pointer; | |
931e13a6 | 3165 | align = get_absolute_expression (); |
252b5132 RH |
3166 | } |
3167 | ||
931e13a6 AM |
3168 | ppc_change_csect (sym, align); |
3169 | ||
252b5132 RH |
3170 | demand_empty_rest_of_line (); |
3171 | } | |
3172 | ||
3173 | /* Change to a different csect. */ | |
3174 | ||
3175 | static void | |
931e13a6 | 3176 | ppc_change_csect (sym, align) |
252b5132 | 3177 | symbolS *sym; |
931e13a6 | 3178 | offsetT align; |
252b5132 RH |
3179 | { |
3180 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3181 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3182 | else |
3183 | { | |
3184 | symbolS **list_ptr; | |
3185 | int after_toc; | |
3186 | int hold_chunksize; | |
3187 | symbolS *list; | |
931e13a6 AM |
3188 | int is_code; |
3189 | segT sec; | |
252b5132 RH |
3190 | |
3191 | /* This is a new csect. We need to look at the symbol class to | |
3192 | figure out whether it should go in the text section or the | |
3193 | data section. */ | |
3194 | after_toc = 0; | |
931e13a6 | 3195 | is_code = 0; |
809ffe0d | 3196 | switch (symbol_get_tc (sym)->class) |
252b5132 RH |
3197 | { |
3198 | case XMC_PR: | |
3199 | case XMC_RO: | |
3200 | case XMC_DB: | |
3201 | case XMC_GL: | |
3202 | case XMC_XO: | |
3203 | case XMC_SV: | |
3204 | case XMC_TI: | |
3205 | case XMC_TB: | |
3206 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3207 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3208 | ++ppc_text_subsegment; |
3209 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3210 | is_code = 1; |
252b5132 RH |
3211 | break; |
3212 | case XMC_RW: | |
3213 | case XMC_TC0: | |
3214 | case XMC_TC: | |
3215 | case XMC_DS: | |
3216 | case XMC_UA: | |
3217 | case XMC_BS: | |
3218 | case XMC_UC: | |
3219 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3220 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3221 | == ppc_data_subsegment)) | |
252b5132 RH |
3222 | after_toc = 1; |
3223 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3224 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3225 | ++ppc_data_subsegment; |
3226 | list_ptr = &ppc_data_csects; | |
3227 | break; | |
3228 | default: | |
3229 | abort (); | |
3230 | } | |
3231 | ||
3232 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3233 | changing subsegments, so that we don't use a lot of memory |
3234 | space for what may be a small section. */ | |
252b5132 RH |
3235 | hold_chunksize = chunksize; |
3236 | chunksize = 64; | |
3237 | ||
931e13a6 AM |
3238 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3239 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3240 | |
3241 | chunksize = hold_chunksize; | |
3242 | ||
3243 | if (after_toc) | |
3244 | ppc_after_toc_frag = frag_now; | |
3245 | ||
931e13a6 AM |
3246 | record_alignment (sec, align); |
3247 | if (is_code) | |
3248 | frag_align_code (align, 0); | |
3249 | else | |
3250 | frag_align (align, 0, 0); | |
3251 | ||
809ffe0d | 3252 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3253 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3254 | ||
931e13a6 | 3255 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3256 | symbol_get_tc (sym)->output = 1; |
3257 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3258 | |
252b5132 | 3259 | for (list = *list_ptr; |
809ffe0d ILT |
3260 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3261 | list = symbol_get_tc (list)->next) | |
252b5132 | 3262 | ; |
809ffe0d | 3263 | symbol_get_tc (list)->next = sym; |
81d4177b | 3264 | |
252b5132 | 3265 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3266 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3267 | &symbol_lastP); | |
252b5132 RH |
3268 | } |
3269 | ||
3270 | ppc_current_csect = sym; | |
3271 | } | |
3272 | ||
3273 | /* This function handles the .text and .data pseudo-ops. These | |
3274 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3275 | convenience of people who aren't used to XCOFF. */ | |
3276 | ||
3277 | static void | |
3278 | ppc_section (type) | |
3279 | int type; | |
3280 | { | |
3281 | const char *name; | |
3282 | symbolS *sym; | |
3283 | ||
3284 | if (type == 't') | |
3285 | name = ".text[PR]"; | |
3286 | else if (type == 'd') | |
3287 | name = ".data[RW]"; | |
3288 | else | |
3289 | abort (); | |
3290 | ||
3291 | sym = symbol_find_or_make (name); | |
3292 | ||
931e13a6 | 3293 | ppc_change_csect (sym, 2); |
252b5132 RH |
3294 | |
3295 | demand_empty_rest_of_line (); | |
3296 | } | |
3297 | ||
3298 | /* This function handles the .section pseudo-op. This is mostly to | |
3299 | give an error, since XCOFF only supports .text, .data and .bss, but | |
3300 | we do permit the user to name the text or data section. */ | |
3301 | ||
3302 | static void | |
3303 | ppc_named_section (ignore) | |
5480ccf3 | 3304 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3305 | { |
3306 | char *user_name; | |
3307 | const char *real_name; | |
3308 | char c; | |
3309 | symbolS *sym; | |
3310 | ||
3311 | user_name = input_line_pointer; | |
3312 | c = get_symbol_end (); | |
3313 | ||
3314 | if (strcmp (user_name, ".text") == 0) | |
3315 | real_name = ".text[PR]"; | |
3316 | else if (strcmp (user_name, ".data") == 0) | |
3317 | real_name = ".data[RW]"; | |
3318 | else | |
3319 | { | |
3320 | as_bad (_("The XCOFF file format does not support arbitrary sections")); | |
3321 | *input_line_pointer = c; | |
3322 | ignore_rest_of_line (); | |
3323 | return; | |
3324 | } | |
3325 | ||
3326 | *input_line_pointer = c; | |
3327 | ||
3328 | sym = symbol_find_or_make (real_name); | |
3329 | ||
931e13a6 | 3330 | ppc_change_csect (sym, 2); |
252b5132 RH |
3331 | |
3332 | demand_empty_rest_of_line (); | |
3333 | } | |
3334 | ||
3335 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
3336 | ||
3337 | static void | |
3338 | ppc_extern (ignore) | |
5480ccf3 | 3339 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3340 | { |
3341 | char *name; | |
3342 | char endc; | |
3343 | ||
3344 | name = input_line_pointer; | |
3345 | endc = get_symbol_end (); | |
3346 | ||
3347 | (void) symbol_find_or_make (name); | |
3348 | ||
3349 | *input_line_pointer = endc; | |
3350 | ||
3351 | demand_empty_rest_of_line (); | |
3352 | } | |
3353 | ||
3354 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
3355 | ||
3356 | static void | |
3357 | ppc_lglobl (ignore) | |
5480ccf3 | 3358 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3359 | { |
3360 | char *name; | |
3361 | char endc; | |
3362 | symbolS *sym; | |
3363 | ||
3364 | name = input_line_pointer; | |
3365 | endc = get_symbol_end (); | |
3366 | ||
3367 | sym = symbol_find_or_make (name); | |
3368 | ||
3369 | *input_line_pointer = endc; | |
3370 | ||
809ffe0d | 3371 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3372 | |
3373 | demand_empty_rest_of_line (); | |
3374 | } | |
3375 | ||
3376 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, | |
3377 | although I don't know why it bothers. */ | |
3378 | ||
3379 | static void | |
3380 | ppc_rename (ignore) | |
5480ccf3 | 3381 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3382 | { |
3383 | char *name; | |
3384 | char endc; | |
3385 | symbolS *sym; | |
3386 | int len; | |
3387 | ||
3388 | name = input_line_pointer; | |
3389 | endc = get_symbol_end (); | |
3390 | ||
3391 | sym = symbol_find_or_make (name); | |
3392 | ||
3393 | *input_line_pointer = endc; | |
3394 | ||
3395 | if (*input_line_pointer != ',') | |
3396 | { | |
3397 | as_bad (_("missing rename string")); | |
3398 | ignore_rest_of_line (); | |
3399 | return; | |
3400 | } | |
3401 | ++input_line_pointer; | |
3402 | ||
809ffe0d | 3403 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
3404 | |
3405 | demand_empty_rest_of_line (); | |
3406 | } | |
3407 | ||
3408 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
3409 | pseudo-op, but slightly different. A sample is | |
3410 | .stabx "main:F-1",.main,142,0 | |
3411 | The first argument is the symbol name to create. The second is the | |
3412 | value, and the third is the storage class. The fourth seems to be | |
3413 | always zero, and I am assuming it is the type. */ | |
3414 | ||
3415 | static void | |
3416 | ppc_stabx (ignore) | |
5480ccf3 | 3417 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3418 | { |
3419 | char *name; | |
3420 | int len; | |
3421 | symbolS *sym; | |
3422 | expressionS exp; | |
3423 | ||
3424 | name = demand_copy_C_string (&len); | |
3425 | ||
3426 | if (*input_line_pointer != ',') | |
3427 | { | |
3428 | as_bad (_("missing value")); | |
3429 | return; | |
3430 | } | |
3431 | ++input_line_pointer; | |
3432 | ||
b34976b6 | 3433 | ppc_stab_symbol = TRUE; |
252b5132 | 3434 | sym = symbol_make (name); |
b34976b6 | 3435 | ppc_stab_symbol = FALSE; |
252b5132 | 3436 | |
809ffe0d | 3437 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
3438 | |
3439 | (void) expression (&exp); | |
3440 | ||
3441 | switch (exp.X_op) | |
3442 | { | |
3443 | case O_illegal: | |
3444 | case O_absent: | |
3445 | case O_big: | |
3446 | as_bad (_("illegal .stabx expression; zero assumed")); | |
3447 | exp.X_add_number = 0; | |
3448 | /* Fall through. */ | |
3449 | case O_constant: | |
3450 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 3451 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
3452 | break; |
3453 | ||
3454 | case O_symbol: | |
3455 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 3456 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
3457 | else |
3458 | { | |
3459 | S_SET_VALUE (sym, | |
3460 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 3461 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
3462 | } |
3463 | break; | |
3464 | ||
3465 | default: | |
3466 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
3467 | fail at some later point, but this is probably the right |
3468 | thing to do here. */ | |
809ffe0d | 3469 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
3470 | break; |
3471 | } | |
3472 | ||
3473 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 3474 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
3475 | |
3476 | if (*input_line_pointer != ',') | |
3477 | { | |
3478 | as_bad (_("missing class")); | |
3479 | return; | |
3480 | } | |
3481 | ++input_line_pointer; | |
3482 | ||
3483 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
3484 | ||
3485 | if (*input_line_pointer != ',') | |
3486 | { | |
3487 | as_bad (_("missing type")); | |
3488 | return; | |
3489 | } | |
3490 | ++input_line_pointer; | |
3491 | ||
3492 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
3493 | ||
809ffe0d | 3494 | symbol_get_tc (sym)->output = 1; |
252b5132 | 3495 | |
6877bb43 | 3496 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) { |
99a814a1 | 3497 | |
809ffe0d | 3498 | symbol_get_tc (sym)->within = ppc_current_block; |
252b5132 | 3499 | |
41ea10b1 | 3500 | /* In this case : |
99a814a1 | 3501 | |
41ea10b1 TR |
3502 | .bs name |
3503 | .stabx "z",arrays_,133,0 | |
3504 | .es | |
99a814a1 | 3505 | |
41ea10b1 | 3506 | .comm arrays_,13768,3 |
99a814a1 | 3507 | |
41ea10b1 TR |
3508 | resolve_symbol_value will copy the exp's "within" into sym's when the |
3509 | offset is 0. Since this seems to be corner case problem, | |
3510 | only do the correction for storage class C_STSYM. A better solution | |
0baf16f2 | 3511 | would be to have the tc field updated in ppc_symbol_new_hook. */ |
99a814a1 AM |
3512 | |
3513 | if (exp.X_op == O_symbol) | |
41ea10b1 TR |
3514 | { |
3515 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
3516 | } | |
6877bb43 | 3517 | } |
99a814a1 | 3518 | |
252b5132 RH |
3519 | if (exp.X_op != O_symbol |
3520 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
3521 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
3522 | ppc_frob_label (sym); | |
3523 | else | |
3524 | { | |
3525 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
3526 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
3527 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
3528 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
3529 | } |
3530 | ||
3531 | demand_empty_rest_of_line (); | |
3532 | } | |
3533 | ||
3534 | /* The .function pseudo-op. This takes several arguments. The first | |
3535 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 3536 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
3537 | uses the same name for both. I have no idea what the third and |
3538 | fourth arguments are meant to be. The optional fifth argument is | |
3539 | an expression for the size of the function. In COFF this symbol | |
3540 | gets an aux entry like that used for a csect. */ | |
3541 | ||
3542 | static void | |
3543 | ppc_function (ignore) | |
5480ccf3 | 3544 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3545 | { |
3546 | char *name; | |
3547 | char endc; | |
3548 | char *s; | |
3549 | symbolS *ext_sym; | |
3550 | symbolS *lab_sym; | |
3551 | ||
3552 | name = input_line_pointer; | |
3553 | endc = get_symbol_end (); | |
3554 | ||
3555 | /* Ignore any [PR] suffix. */ | |
3556 | name = ppc_canonicalize_symbol_name (name); | |
3557 | s = strchr (name, '['); | |
3558 | if (s != (char *) NULL | |
3559 | && strcmp (s + 1, "PR]") == 0) | |
3560 | *s = '\0'; | |
3561 | ||
3562 | ext_sym = symbol_find_or_make (name); | |
3563 | ||
3564 | *input_line_pointer = endc; | |
3565 | ||
3566 | if (*input_line_pointer != ',') | |
3567 | { | |
3568 | as_bad (_("missing symbol name")); | |
3569 | ignore_rest_of_line (); | |
3570 | return; | |
3571 | } | |
3572 | ++input_line_pointer; | |
3573 | ||
3574 | name = input_line_pointer; | |
3575 | endc = get_symbol_end (); | |
3576 | ||
3577 | lab_sym = symbol_find_or_make (name); | |
3578 | ||
3579 | *input_line_pointer = endc; | |
3580 | ||
3581 | if (ext_sym != lab_sym) | |
3582 | { | |
809ffe0d ILT |
3583 | expressionS exp; |
3584 | ||
3585 | exp.X_op = O_symbol; | |
3586 | exp.X_add_symbol = lab_sym; | |
3587 | exp.X_op_symbol = NULL; | |
3588 | exp.X_add_number = 0; | |
3589 | exp.X_unsigned = 0; | |
3590 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
3591 | } |
3592 | ||
809ffe0d ILT |
3593 | if (symbol_get_tc (ext_sym)->class == -1) |
3594 | symbol_get_tc (ext_sym)->class = XMC_PR; | |
3595 | symbol_get_tc (ext_sym)->output = 1; | |
252b5132 RH |
3596 | |
3597 | if (*input_line_pointer == ',') | |
3598 | { | |
3599 | expressionS ignore; | |
3600 | ||
3601 | /* Ignore the third argument. */ | |
3602 | ++input_line_pointer; | |
3603 | expression (&ignore); | |
3604 | if (*input_line_pointer == ',') | |
3605 | { | |
3606 | /* Ignore the fourth argument. */ | |
3607 | ++input_line_pointer; | |
3608 | expression (&ignore); | |
3609 | if (*input_line_pointer == ',') | |
3610 | { | |
3611 | /* The fifth argument is the function size. */ | |
3612 | ++input_line_pointer; | |
809ffe0d ILT |
3613 | symbol_get_tc (ext_sym)->size = symbol_new ("L0\001", |
3614 | absolute_section, | |
3615 | (valueT) 0, | |
3616 | &zero_address_frag); | |
3617 | pseudo_set (symbol_get_tc (ext_sym)->size); | |
252b5132 RH |
3618 | } |
3619 | } | |
3620 | } | |
3621 | ||
3622 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
3623 | SF_SET_FUNCTION (ext_sym); | |
3624 | SF_SET_PROCESS (ext_sym); | |
3625 | coff_add_linesym (ext_sym); | |
3626 | ||
3627 | demand_empty_rest_of_line (); | |
3628 | } | |
3629 | ||
3630 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
3631 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
3632 | with the correct line number */ | |
5d6255fe | 3633 | |
8642cce8 | 3634 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
3635 | |
3636 | static void | |
3637 | ppc_bf (ignore) | |
5480ccf3 | 3638 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3639 | { |
3640 | symbolS *sym; | |
3641 | ||
3642 | sym = symbol_make (".bf"); | |
3643 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3644 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3645 | S_SET_VALUE (sym, frag_now_fix ()); |
3646 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
3647 | ||
3648 | coff_line_base = get_absolute_expression (); | |
3649 | ||
3650 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
3651 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
3652 | ||
8642cce8 | 3653 | /* Line number for bi. */ |
5d6255fe | 3654 | if (saved_bi_sym) |
8642cce8 TR |
3655 | { |
3656 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
3657 | saved_bi_sym = 0; | |
3658 | } | |
5d6255fe | 3659 | |
8642cce8 | 3660 | |
809ffe0d | 3661 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3662 | |
3663 | ppc_frob_label (sym); | |
3664 | ||
3665 | demand_empty_rest_of_line (); | |
3666 | } | |
3667 | ||
3668 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
3669 | ".ef", except that the line number is absolute, not relative to the | |
3670 | most recent ".bf" symbol. */ | |
3671 | ||
3672 | static void | |
3673 | ppc_ef (ignore) | |
5480ccf3 | 3674 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3675 | { |
3676 | symbolS *sym; | |
3677 | ||
3678 | sym = symbol_make (".ef"); | |
3679 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3680 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3681 | S_SET_VALUE (sym, frag_now_fix ()); |
3682 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
3683 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
3684 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 3685 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3686 | |
3687 | ppc_frob_label (sym); | |
3688 | ||
3689 | demand_empty_rest_of_line (); | |
3690 | } | |
3691 | ||
3692 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
3693 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
3694 | the symbol list. The value of .bi will be know when the next .bf |
3695 | is encountered. */ | |
252b5132 RH |
3696 | |
3697 | static void | |
3698 | ppc_biei (ei) | |
3699 | int ei; | |
3700 | { | |
3701 | static symbolS *last_biei; | |
3702 | ||
3703 | char *name; | |
3704 | int len; | |
3705 | symbolS *sym; | |
3706 | symbolS *look; | |
3707 | ||
3708 | name = demand_copy_C_string (&len); | |
3709 | ||
3710 | /* The value of these symbols is actually file offset. Here we set | |
3711 | the value to the index into the line number entries. In | |
3712 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
3713 | to do the right thing. */ | |
3714 | ||
3715 | sym = symbol_make (name); | |
3716 | /* obj-coff.c currently only handles line numbers correctly in the | |
3717 | .text section. */ | |
3718 | S_SET_SEGMENT (sym, text_section); | |
3719 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 3720 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
3721 | |
3722 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 3723 | symbol_get_tc (sym)->output = 1; |
81d4177b | 3724 | |
8642cce8 | 3725 | /* Save bi. */ |
5d6255fe | 3726 | if (ei) |
8642cce8 TR |
3727 | saved_bi_sym = 0; |
3728 | else | |
3729 | saved_bi_sym = sym; | |
3730 | ||
252b5132 RH |
3731 | for (look = last_biei ? last_biei : symbol_rootP; |
3732 | (look != (symbolS *) NULL | |
3733 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
3734 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
3735 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
3736 | look = symbol_next (look)) | |
3737 | ; | |
3738 | if (look != (symbolS *) NULL) | |
3739 | { | |
3740 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
3741 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
3742 | last_biei = sym; | |
3743 | } | |
3744 | ||
3745 | demand_empty_rest_of_line (); | |
3746 | } | |
3747 | ||
3748 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
3749 | There is one argument, which is a csect symbol. The value of the | |
3750 | .bs symbol is the index of this csect symbol. */ | |
3751 | ||
3752 | static void | |
3753 | ppc_bs (ignore) | |
5480ccf3 | 3754 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3755 | { |
3756 | char *name; | |
3757 | char endc; | |
3758 | symbolS *csect; | |
3759 | symbolS *sym; | |
3760 | ||
3761 | if (ppc_current_block != NULL) | |
3762 | as_bad (_("nested .bs blocks")); | |
3763 | ||
3764 | name = input_line_pointer; | |
3765 | endc = get_symbol_end (); | |
3766 | ||
3767 | csect = symbol_find_or_make (name); | |
3768 | ||
3769 | *input_line_pointer = endc; | |
3770 | ||
3771 | sym = symbol_make (".bs"); | |
3772 | S_SET_SEGMENT (sym, now_seg); | |
3773 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
3774 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
3775 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 3776 | |
809ffe0d | 3777 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
3778 | |
3779 | ppc_frob_label (sym); | |
3780 | ||
3781 | ppc_current_block = sym; | |
3782 | ||
3783 | demand_empty_rest_of_line (); | |
3784 | } | |
3785 | ||
3786 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
3787 | ||
3788 | static void | |
3789 | ppc_es (ignore) | |
5480ccf3 | 3790 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3791 | { |
3792 | symbolS *sym; | |
3793 | ||
3794 | if (ppc_current_block == NULL) | |
3795 | as_bad (_(".es without preceding .bs")); | |
3796 | ||
3797 | sym = symbol_make (".es"); | |
3798 | S_SET_SEGMENT (sym, now_seg); | |
3799 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
3800 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
3801 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
3802 | |
3803 | ppc_frob_label (sym); | |
3804 | ||
3805 | ppc_current_block = NULL; | |
3806 | ||
3807 | demand_empty_rest_of_line (); | |
3808 | } | |
3809 | ||
3810 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
3811 | line number. */ | |
3812 | ||
3813 | static void | |
3814 | ppc_bb (ignore) | |
5480ccf3 | 3815 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3816 | { |
3817 | symbolS *sym; | |
3818 | ||
3819 | sym = symbol_make (".bb"); | |
3820 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3821 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3822 | S_SET_VALUE (sym, frag_now_fix ()); |
3823 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
3824 | ||
3825 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
3826 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
3827 | ||
809ffe0d | 3828 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3829 | |
3830 | SF_SET_PROCESS (sym); | |
3831 | ||
3832 | ppc_frob_label (sym); | |
3833 | ||
3834 | demand_empty_rest_of_line (); | |
3835 | } | |
3836 | ||
3837 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
3838 | line number. */ | |
3839 | ||
3840 | static void | |
3841 | ppc_eb (ignore) | |
5480ccf3 | 3842 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3843 | { |
3844 | symbolS *sym; | |
3845 | ||
3846 | sym = symbol_make (".eb"); | |
3847 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3848 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3849 | S_SET_VALUE (sym, frag_now_fix ()); |
3850 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
3851 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
3852 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 3853 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3854 | |
3855 | SF_SET_PROCESS (sym); | |
3856 | ||
3857 | ppc_frob_label (sym); | |
3858 | ||
3859 | demand_empty_rest_of_line (); | |
3860 | } | |
3861 | ||
3862 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
3863 | specified name. */ | |
3864 | ||
3865 | static void | |
3866 | ppc_bc (ignore) | |
5480ccf3 | 3867 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3868 | { |
3869 | char *name; | |
3870 | int len; | |
3871 | symbolS *sym; | |
3872 | ||
3873 | name = demand_copy_C_string (&len); | |
3874 | sym = symbol_make (name); | |
3875 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 3876 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
3877 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
3878 | S_SET_VALUE (sym, 0); | |
809ffe0d | 3879 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3880 | |
3881 | ppc_frob_label (sym); | |
3882 | ||
3883 | demand_empty_rest_of_line (); | |
3884 | } | |
3885 | ||
3886 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
3887 | ||
3888 | static void | |
3889 | ppc_ec (ignore) | |
5480ccf3 | 3890 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3891 | { |
3892 | symbolS *sym; | |
3893 | ||
3894 | sym = symbol_make (".ec"); | |
3895 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 3896 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
3897 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
3898 | S_SET_VALUE (sym, 0); | |
809ffe0d | 3899 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3900 | |
3901 | ppc_frob_label (sym); | |
3902 | ||
3903 | demand_empty_rest_of_line (); | |
3904 | } | |
3905 | ||
3906 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
3907 | ||
3908 | static void | |
3909 | ppc_toc (ignore) | |
5480ccf3 | 3910 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
3911 | { |
3912 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 3913 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
3914 | else |
3915 | { | |
3916 | subsegT subseg; | |
3917 | symbolS *sym; | |
3918 | symbolS *list; | |
81d4177b | 3919 | |
252b5132 RH |
3920 | subseg = ppc_data_subsegment; |
3921 | ++ppc_data_subsegment; | |
3922 | ||
3923 | subseg_new (segment_name (data_section), subseg); | |
3924 | ppc_toc_frag = frag_now; | |
3925 | ||
3926 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 3927 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3928 | S_SET_SEGMENT (sym, data_section); |
3929 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
3930 | symbol_get_tc (sym)->subseg = subseg; |
3931 | symbol_get_tc (sym)->output = 1; | |
3932 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
3933 | |
3934 | ppc_toc_csect = sym; | |
81d4177b | 3935 | |
252b5132 | 3936 | for (list = ppc_data_csects; |
809ffe0d ILT |
3937 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3938 | list = symbol_get_tc (list)->next) | |
252b5132 | 3939 | ; |
809ffe0d | 3940 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
3941 | |
3942 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
3943 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3944 | &symbol_lastP); | |
252b5132 RH |
3945 | } |
3946 | ||
3947 | ppc_current_csect = ppc_toc_csect; | |
3948 | ||
3949 | demand_empty_rest_of_line (); | |
3950 | } | |
3951 | ||
3952 | /* The AIX assembler automatically aligns the operands of a .long or | |
3953 | .short pseudo-op, and we want to be compatible. */ | |
3954 | ||
3955 | static void | |
3956 | ppc_xcoff_cons (log_size) | |
3957 | int log_size; | |
3958 | { | |
3959 | frag_align (log_size, 0, 0); | |
3960 | record_alignment (now_seg, log_size); | |
3961 | cons (1 << log_size); | |
3962 | } | |
3963 | ||
3964 | static void | |
3965 | ppc_vbyte (dummy) | |
5480ccf3 | 3966 | int dummy ATTRIBUTE_UNUSED; |
252b5132 RH |
3967 | { |
3968 | expressionS exp; | |
3969 | int byte_count; | |
3970 | ||
3971 | (void) expression (&exp); | |
3972 | ||
3973 | if (exp.X_op != O_constant) | |
3974 | { | |
3975 | as_bad (_("non-constant byte count")); | |
3976 | return; | |
3977 | } | |
3978 | ||
3979 | byte_count = exp.X_add_number; | |
3980 | ||
3981 | if (*input_line_pointer != ',') | |
3982 | { | |
3983 | as_bad (_("missing value")); | |
3984 | return; | |
3985 | } | |
3986 | ||
3987 | ++input_line_pointer; | |
3988 | cons (byte_count); | |
3989 | } | |
3990 | ||
3991 | #endif /* OBJ_XCOFF */ | |
0baf16f2 | 3992 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
3993 | \f |
3994 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
3995 | ELF. This takes two or more arguments. | |
3996 | ||
3997 | When generating XCOFF output, the first argument is the name to | |
3998 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 3999 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4000 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4001 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4002 | depends on target word size. A 32-bit target uses 4-byte values, a |
4003 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4004 | |
4005 | When not generating XCOFF output, the arguments are the same, but | |
4006 | the first argument is simply ignored. */ | |
4007 | ||
4008 | static void | |
4009 | ppc_tc (ignore) | |
92161534 | 4010 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4011 | { |
4012 | #ifdef OBJ_XCOFF | |
4013 | ||
4014 | /* Define the TOC symbol name. */ | |
4015 | { | |
4016 | char *name; | |
4017 | char endc; | |
4018 | symbolS *sym; | |
4019 | ||
4020 | if (ppc_toc_csect == (symbolS *) NULL | |
4021 | || ppc_toc_csect != ppc_current_csect) | |
4022 | { | |
4023 | as_bad (_(".tc not in .toc section")); | |
4024 | ignore_rest_of_line (); | |
4025 | return; | |
4026 | } | |
4027 | ||
4028 | name = input_line_pointer; | |
4029 | endc = get_symbol_end (); | |
4030 | ||
4031 | sym = symbol_find_or_make (name); | |
4032 | ||
4033 | *input_line_pointer = endc; | |
4034 | ||
4035 | if (S_IS_DEFINED (sym)) | |
4036 | { | |
4037 | symbolS *label; | |
4038 | ||
809ffe0d ILT |
4039 | label = symbol_get_tc (ppc_current_csect)->within; |
4040 | if (symbol_get_tc (label)->class != XMC_TC0) | |
252b5132 RH |
4041 | { |
4042 | as_bad (_(".tc with no label")); | |
4043 | ignore_rest_of_line (); | |
4044 | return; | |
4045 | } | |
4046 | ||
4047 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4048 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4049 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4050 | ||
4051 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4052 | ++input_line_pointer; | |
4053 | ||
4054 | return; | |
4055 | } | |
4056 | ||
4057 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4058 | symbol_set_frag (sym, frag_now); |
252b5132 | 4059 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
809ffe0d ILT |
4060 | symbol_get_tc (sym)->class = XMC_TC; |
4061 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4062 | |
4063 | ppc_frob_label (sym); | |
4064 | } | |
4065 | ||
0baf16f2 AM |
4066 | #endif /* OBJ_XCOFF */ |
4067 | #ifdef OBJ_ELF | |
9c7977b3 | 4068 | int align; |
252b5132 RH |
4069 | |
4070 | /* Skip the TOC symbol name. */ | |
4071 | while (is_part_of_name (*input_line_pointer) | |
4072 | || *input_line_pointer == '[' | |
4073 | || *input_line_pointer == ']' | |
4074 | || *input_line_pointer == '{' | |
4075 | || *input_line_pointer == '}') | |
4076 | ++input_line_pointer; | |
4077 | ||
0baf16f2 | 4078 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4079 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4080 | frag_align (align, 0, 0); |
4081 | record_alignment (now_seg, align); | |
0baf16f2 | 4082 | #endif /* OBJ_ELF */ |
252b5132 RH |
4083 | |
4084 | if (*input_line_pointer != ',') | |
4085 | demand_empty_rest_of_line (); | |
4086 | else | |
4087 | { | |
4088 | ++input_line_pointer; | |
2b3c4602 | 4089 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4090 | } |
4091 | } | |
0baf16f2 AM |
4092 | |
4093 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4094 | |
4095 | static void | |
4096 | ppc_machine (ignore) | |
4097 | int ignore ATTRIBUTE_UNUSED; | |
4098 | { | |
69c040df AM |
4099 | char *cpu_string; |
4100 | #define MAX_HISTORY 100 | |
4101 | static unsigned long *cpu_history; | |
4102 | static int curr_hist; | |
4103 | ||
4104 | SKIP_WHITESPACE (); | |
4105 | ||
4106 | if (*input_line_pointer == '"') | |
4107 | { | |
4108 | int len; | |
4109 | cpu_string = demand_copy_C_string (&len); | |
4110 | } | |
4111 | else | |
4112 | { | |
4113 | char c; | |
4114 | cpu_string = input_line_pointer; | |
4115 | c = get_symbol_end (); | |
4116 | cpu_string = xstrdup (cpu_string); | |
4117 | *input_line_pointer = c; | |
4118 | } | |
4119 | ||
4120 | if (cpu_string != NULL) | |
4121 | { | |
4122 | unsigned long old_cpu = ppc_cpu; | |
4123 | char *p; | |
4124 | ||
4125 | for (p = cpu_string; *p != 0; p++) | |
4126 | *p = TOLOWER (*p); | |
4127 | ||
4128 | if (strcmp (cpu_string, "push") == 0) | |
4129 | { | |
4130 | if (cpu_history == NULL) | |
4131 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4132 | ||
4133 | if (curr_hist >= MAX_HISTORY) | |
4134 | as_bad (_(".machine stack overflow")); | |
4135 | else | |
4136 | cpu_history[curr_hist++] = ppc_cpu; | |
4137 | } | |
4138 | else if (strcmp (cpu_string, "pop") == 0) | |
4139 | { | |
4140 | if (curr_hist <= 0) | |
4141 | as_bad (_(".machine stack underflow")); | |
4142 | else | |
4143 | ppc_cpu = cpu_history[--curr_hist]; | |
4144 | } | |
4145 | else if (parse_cpu (cpu_string)) | |
4146 | ; | |
4147 | else | |
4148 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4149 | ||
4150 | if (ppc_cpu != old_cpu) | |
4151 | ppc_setup_opcodes (); | |
4152 | } | |
4153 | ||
4154 | demand_empty_rest_of_line (); | |
0baf16f2 AM |
4155 | } |
4156 | ||
4157 | /* See whether a symbol is in the TOC section. */ | |
4158 | ||
4159 | static int | |
4160 | ppc_is_toc_sym (sym) | |
4161 | symbolS *sym; | |
4162 | { | |
4163 | #ifdef OBJ_XCOFF | |
4164 | return symbol_get_tc (sym)->class == XMC_TC; | |
4165 | #endif | |
4166 | #ifdef OBJ_ELF | |
4167 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2b3c4602 | 4168 | if (ppc_obj64) |
0baf16f2 AM |
4169 | return strcmp (sname, ".toc") == 0; |
4170 | else | |
4171 | return strcmp (sname, ".got") == 0; | |
4172 | #endif | |
4173 | } | |
4174 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
4175 | \f |
4176 | #ifdef TE_PE | |
4177 | ||
99a814a1 | 4178 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4179 | |
4180 | /* Set the current section. */ | |
4181 | static void | |
4182 | ppc_set_current_section (new) | |
4183 | segT new; | |
4184 | { | |
4185 | ppc_previous_section = ppc_current_section; | |
4186 | ppc_current_section = new; | |
4187 | } | |
4188 | ||
4189 | /* pseudo-op: .previous | |
4190 | behaviour: toggles the current section with the previous section. | |
4191 | errors: None | |
99a814a1 AM |
4192 | warnings: "No previous section" */ |
4193 | ||
252b5132 | 4194 | static void |
99a814a1 | 4195 | ppc_previous (ignore) |
5480ccf3 | 4196 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4197 | { |
4198 | symbolS *tmp; | |
4199 | ||
81d4177b | 4200 | if (ppc_previous_section == NULL) |
252b5132 | 4201 | { |
99a814a1 | 4202 | as_warn (_("No previous section to return to. Directive ignored.")); |
252b5132 RH |
4203 | return; |
4204 | } | |
4205 | ||
99a814a1 | 4206 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4207 | |
99a814a1 | 4208 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4209 | } |
4210 | ||
4211 | /* pseudo-op: .pdata | |
4212 | behaviour: predefined read only data section | |
b34976b6 | 4213 | double word aligned |
252b5132 RH |
4214 | errors: None |
4215 | warnings: None | |
4216 | initial: .section .pdata "adr3" | |
b34976b6 | 4217 | a - don't know -- maybe a misprint |
252b5132 RH |
4218 | d - initialized data |
4219 | r - readable | |
4220 | 3 - double word aligned (that would be 4 byte boundary) | |
4221 | ||
4222 | commentary: | |
4223 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4224 | handling, debugging, etc. */ |
252b5132 | 4225 | |
252b5132 | 4226 | static void |
99a814a1 | 4227 | ppc_pdata (ignore) |
5480ccf3 | 4228 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 4229 | { |
81d4177b | 4230 | if (pdata_section == 0) |
252b5132 RH |
4231 | { |
4232 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4233 | |
252b5132 RH |
4234 | bfd_set_section_flags (stdoutput, pdata_section, |
4235 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4236 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4237 | |
252b5132 RH |
4238 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
4239 | } | |
4240 | else | |
4241 | { | |
99a814a1 | 4242 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 4243 | } |
99a814a1 | 4244 | ppc_set_current_section (pdata_section); |
252b5132 RH |
4245 | } |
4246 | ||
4247 | /* pseudo-op: .ydata | |
4248 | behaviour: predefined read only data section | |
b34976b6 | 4249 | double word aligned |
252b5132 RH |
4250 | errors: None |
4251 | warnings: None | |
4252 | initial: .section .ydata "drw3" | |
b34976b6 | 4253 | a - don't know -- maybe a misprint |
252b5132 RH |
4254 | d - initialized data |
4255 | r - readable | |
4256 | 3 - double word aligned (that would be 4 byte boundary) | |
4257 | commentary: | |
4258 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
4259 | debugging, etc. */ |
4260 | ||
252b5132 | 4261 | static void |
99a814a1 | 4262 | ppc_ydata (ignore) |
5480ccf3 | 4263 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 4264 | { |
81d4177b | 4265 | if (ydata_section == 0) |
252b5132 RH |
4266 | { |
4267 | ydata_section = subseg_new (".ydata", 0); | |
4268 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
4269 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4270 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
4271 | |
4272 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
4273 | } | |
4274 | else | |
4275 | { | |
4276 | ydata_section = subseg_new (".ydata", 0); | |
4277 | } | |
99a814a1 | 4278 | ppc_set_current_section (ydata_section); |
252b5132 RH |
4279 | } |
4280 | ||
4281 | /* pseudo-op: .reldata | |
4282 | behaviour: predefined read write data section | |
b34976b6 | 4283 | double word aligned (4-byte) |
252b5132 RH |
4284 | FIXME: relocation is applied to it |
4285 | FIXME: what's the difference between this and .data? | |
4286 | errors: None | |
4287 | warnings: None | |
4288 | initial: .section .reldata "drw3" | |
4289 | d - initialized data | |
4290 | r - readable | |
4291 | w - writeable | |
4292 | 3 - double word aligned (that would be 8 byte boundary) | |
4293 | ||
4294 | commentary: | |
4295 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
4296 | function descriptors, etc. */ |
4297 | ||
252b5132 | 4298 | static void |
99a814a1 | 4299 | ppc_reldata (ignore) |
5480ccf3 | 4300 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4301 | { |
4302 | if (reldata_section == 0) | |
4303 | { | |
4304 | reldata_section = subseg_new (".reldata", 0); | |
4305 | ||
4306 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
4307 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4308 | | SEC_DATA)); | |
252b5132 RH |
4309 | |
4310 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
4311 | } | |
4312 | else | |
4313 | { | |
4314 | reldata_section = subseg_new (".reldata", 0); | |
4315 | } | |
99a814a1 | 4316 | ppc_set_current_section (reldata_section); |
252b5132 RH |
4317 | } |
4318 | ||
4319 | /* pseudo-op: .rdata | |
4320 | behaviour: predefined read only data section | |
b34976b6 | 4321 | double word aligned |
252b5132 RH |
4322 | errors: None |
4323 | warnings: None | |
4324 | initial: .section .rdata "dr3" | |
4325 | d - initialized data | |
4326 | r - readable | |
99a814a1 AM |
4327 | 3 - double word aligned (that would be 4 byte boundary) */ |
4328 | ||
252b5132 | 4329 | static void |
99a814a1 | 4330 | ppc_rdata (ignore) |
5480ccf3 | 4331 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4332 | { |
4333 | if (rdata_section == 0) | |
4334 | { | |
4335 | rdata_section = subseg_new (".rdata", 0); | |
4336 | bfd_set_section_flags (stdoutput, rdata_section, | |
4337 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4338 | | SEC_READONLY | SEC_DATA )); | |
4339 | ||
4340 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
4341 | } | |
4342 | else | |
4343 | { | |
4344 | rdata_section = subseg_new (".rdata", 0); | |
4345 | } | |
99a814a1 | 4346 | ppc_set_current_section (rdata_section); |
252b5132 RH |
4347 | } |
4348 | ||
4349 | /* pseudo-op: .ualong | |
81d4177b | 4350 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 4351 | performed. |
252b5132 RH |
4352 | FIXME: test the alignment statement |
4353 | errors: None | |
99a814a1 AM |
4354 | warnings: None */ |
4355 | ||
252b5132 | 4356 | static void |
99a814a1 | 4357 | ppc_ualong (ignore) |
5480ccf3 | 4358 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 4359 | { |
99a814a1 AM |
4360 | /* Try for long. */ |
4361 | cons (4); | |
252b5132 RH |
4362 | } |
4363 | ||
4364 | /* pseudo-op: .znop <symbol name> | |
4365 | behaviour: Issue a nop instruction | |
b34976b6 | 4366 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
4367 | the supplied symbol name. |
4368 | errors: None | |
99a814a1 AM |
4369 | warnings: Missing symbol name */ |
4370 | ||
252b5132 | 4371 | static void |
99a814a1 | 4372 | ppc_znop (ignore) |
5480ccf3 | 4373 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4374 | { |
4375 | unsigned long insn; | |
4376 | const struct powerpc_opcode *opcode; | |
4377 | expressionS ex; | |
4378 | char *f; | |
252b5132 | 4379 | symbolS *sym; |
252b5132 RH |
4380 | char *symbol_name; |
4381 | char c; | |
4382 | char *name; | |
4383 | unsigned int exp; | |
4384 | flagword flags; | |
4385 | asection *sec; | |
4386 | ||
99a814a1 | 4387 | /* Strip out the symbol name. */ |
252b5132 RH |
4388 | symbol_name = input_line_pointer; |
4389 | c = get_symbol_end (); | |
4390 | ||
4391 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
4392 | strcpy (name, symbol_name); | |
4393 | ||
4394 | sym = symbol_find_or_make (name); | |
4395 | ||
4396 | *input_line_pointer = c; | |
4397 | ||
4398 | SKIP_WHITESPACE (); | |
4399 | ||
4400 | /* Look up the opcode in the hash table. */ | |
4401 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
4402 | ||
99a814a1 | 4403 | /* Stick in the nop. */ |
252b5132 RH |
4404 | insn = opcode->opcode; |
4405 | ||
4406 | /* Write out the instruction. */ | |
4407 | f = frag_more (4); | |
4408 | md_number_to_chars (f, insn, 4); | |
4409 | fix_new (frag_now, | |
4410 | f - frag_now->fr_literal, | |
4411 | 4, | |
4412 | sym, | |
4413 | 0, | |
4414 | 0, | |
4415 | BFD_RELOC_16_GOT_PCREL); | |
4416 | ||
4417 | } | |
4418 | ||
81d4177b KH |
4419 | /* pseudo-op: |
4420 | behaviour: | |
4421 | errors: | |
99a814a1 AM |
4422 | warnings: */ |
4423 | ||
252b5132 | 4424 | static void |
99a814a1 | 4425 | ppc_pe_comm (lcomm) |
252b5132 RH |
4426 | int lcomm; |
4427 | { | |
4428 | register char *name; | |
4429 | register char c; | |
4430 | register char *p; | |
4431 | offsetT temp; | |
4432 | register symbolS *symbolP; | |
4433 | offsetT align; | |
4434 | ||
4435 | name = input_line_pointer; | |
4436 | c = get_symbol_end (); | |
4437 | ||
99a814a1 | 4438 | /* just after name is now '\0'. */ |
252b5132 RH |
4439 | p = input_line_pointer; |
4440 | *p = c; | |
4441 | SKIP_WHITESPACE (); | |
4442 | if (*input_line_pointer != ',') | |
4443 | { | |
4444 | as_bad (_("Expected comma after symbol-name: rest of line ignored.")); | |
4445 | ignore_rest_of_line (); | |
4446 | return; | |
4447 | } | |
4448 | ||
4449 | input_line_pointer++; /* skip ',' */ | |
4450 | if ((temp = get_absolute_expression ()) < 0) | |
4451 | { | |
4452 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
4453 | ignore_rest_of_line (); | |
4454 | return; | |
4455 | } | |
4456 | ||
4457 | if (! lcomm) | |
4458 | { | |
4459 | /* The third argument to .comm is the alignment. */ | |
4460 | if (*input_line_pointer != ',') | |
4461 | align = 3; | |
4462 | else | |
4463 | { | |
4464 | ++input_line_pointer; | |
4465 | align = get_absolute_expression (); | |
4466 | if (align <= 0) | |
4467 | { | |
4468 | as_warn (_("ignoring bad alignment")); | |
4469 | align = 3; | |
4470 | } | |
4471 | } | |
4472 | } | |
4473 | ||
4474 | *p = 0; | |
4475 | symbolP = symbol_find_or_make (name); | |
4476 | ||
4477 | *p = c; | |
4478 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
4479 | { | |
4480 | as_bad (_("Ignoring attempt to re-define symbol `%s'."), | |
4481 | S_GET_NAME (symbolP)); | |
4482 | ignore_rest_of_line (); | |
4483 | return; | |
4484 | } | |
4485 | ||
4486 | if (S_GET_VALUE (symbolP)) | |
4487 | { | |
4488 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
4489 | as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), | |
4490 | S_GET_NAME (symbolP), | |
4491 | (long) S_GET_VALUE (symbolP), | |
4492 | (long) temp); | |
4493 | } | |
4494 | else | |
4495 | { | |
4496 | S_SET_VALUE (symbolP, (valueT) temp); | |
4497 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 4498 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
4499 | } |
4500 | ||
4501 | demand_empty_rest_of_line (); | |
4502 | } | |
4503 | ||
4504 | /* | |
4505 | * implement the .section pseudo op: | |
4506 | * .section name {, "flags"} | |
4507 | * ^ ^ | |
4508 | * | +--- optional flags: 'b' for bss | |
4509 | * | 'i' for info | |
4510 | * +-- section name 'l' for lib | |
4511 | * 'n' for noload | |
4512 | * 'o' for over | |
4513 | * 'w' for data | |
4514 | * 'd' (apparently m88k for data) | |
4515 | * 'x' for text | |
4516 | * But if the argument is not a quoted string, treat it as a | |
4517 | * subsegment number. | |
4518 | * | |
4519 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
4520 | * additions/changes for the moto-pas assembler support. There are three | |
4521 | * categories: | |
4522 | * | |
81d4177b | 4523 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
4524 | * setting bits that bfd probably neither understands or uses. The |
4525 | * correct approach (?) will have to incorporate extra fields attached | |
4526 | * to the section to hold the system specific stuff. (krk) | |
4527 | * | |
4528 | * Section Contents: | |
4529 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
4530 | * 'c' - section has code | |
4531 | * 'd' - section has initialized data | |
4532 | * 'u' - section has uninitialized data | |
4533 | * 'i' - section contains directives (info) | |
4534 | * 'n' - section can be discarded | |
4535 | * 'R' - remove section at link time | |
4536 | * | |
4537 | * Section Protection: | |
4538 | * 'r' - section is readable | |
4539 | * 'w' - section is writeable | |
4540 | * 'x' - section is executable | |
4541 | * 's' - section is sharable | |
4542 | * | |
4543 | * Section Alignment: | |
4544 | * '0' - align to byte boundary | |
4545 | * '1' - align to halfword undary | |
4546 | * '2' - align to word boundary | |
4547 | * '3' - align to doubleword boundary | |
4548 | * '4' - align to quadword boundary | |
4549 | * '5' - align to 32 byte boundary | |
4550 | * '6' - align to 64 byte boundary | |
4551 | * | |
4552 | */ | |
4553 | ||
4554 | void | |
4555 | ppc_pe_section (ignore) | |
5480ccf3 | 4556 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 4557 | { |
99a814a1 | 4558 | /* Strip out the section name. */ |
252b5132 RH |
4559 | char *section_name; |
4560 | char c; | |
4561 | char *name; | |
4562 | unsigned int exp; | |
4563 | flagword flags; | |
4564 | segT sec; | |
4565 | int align; | |
4566 | ||
4567 | section_name = input_line_pointer; | |
4568 | c = get_symbol_end (); | |
4569 | ||
4570 | name = xmalloc (input_line_pointer - section_name + 1); | |
4571 | strcpy (name, section_name); | |
4572 | ||
4573 | *input_line_pointer = c; | |
4574 | ||
4575 | SKIP_WHITESPACE (); | |
4576 | ||
4577 | exp = 0; | |
4578 | flags = SEC_NO_FLAGS; | |
4579 | ||
4580 | if (strcmp (name, ".idata$2") == 0) | |
4581 | { | |
4582 | align = 0; | |
4583 | } | |
4584 | else if (strcmp (name, ".idata$3") == 0) | |
4585 | { | |
4586 | align = 0; | |
4587 | } | |
4588 | else if (strcmp (name, ".idata$4") == 0) | |
4589 | { | |
4590 | align = 2; | |
4591 | } | |
4592 | else if (strcmp (name, ".idata$5") == 0) | |
4593 | { | |
4594 | align = 2; | |
4595 | } | |
4596 | else if (strcmp (name, ".idata$6") == 0) | |
4597 | { | |
4598 | align = 1; | |
4599 | } | |
4600 | else | |
99a814a1 AM |
4601 | /* Default alignment to 16 byte boundary. */ |
4602 | align = 4; | |
252b5132 RH |
4603 | |
4604 | if (*input_line_pointer == ',') | |
4605 | { | |
4606 | ++input_line_pointer; | |
4607 | SKIP_WHITESPACE (); | |
4608 | if (*input_line_pointer != '"') | |
4609 | exp = get_absolute_expression (); | |
4610 | else | |
4611 | { | |
4612 | ++input_line_pointer; | |
4613 | while (*input_line_pointer != '"' | |
4614 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4615 | { | |
4616 | switch (*input_line_pointer) | |
4617 | { | |
4618 | /* Section Contents */ | |
4619 | case 'a': /* unknown */ | |
4620 | as_bad (_("Unsupported section attribute -- 'a'")); | |
4621 | break; | |
4622 | case 'c': /* code section */ | |
81d4177b | 4623 | flags |= SEC_CODE; |
252b5132 RH |
4624 | break; |
4625 | case 'd': /* section has initialized data */ | |
4626 | flags |= SEC_DATA; | |
4627 | break; | |
4628 | case 'u': /* section has uninitialized data */ | |
4629 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
4630 | in winnt.h */ | |
4631 | flags |= SEC_ROM; | |
4632 | break; | |
4633 | case 'i': /* section contains directives (info) */ | |
4634 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
4635 | in winnt.h */ | |
4636 | flags |= SEC_HAS_CONTENTS; | |
4637 | break; | |
4638 | case 'n': /* section can be discarded */ | |
81d4177b | 4639 | flags &=~ SEC_LOAD; |
252b5132 RH |
4640 | break; |
4641 | case 'R': /* Remove section at link time */ | |
4642 | flags |= SEC_NEVER_LOAD; | |
4643 | break; | |
4644 | ||
4645 | /* Section Protection */ | |
4646 | case 'r': /* section is readable */ | |
4647 | flags |= IMAGE_SCN_MEM_READ; | |
4648 | break; | |
4649 | case 'w': /* section is writeable */ | |
4650 | flags |= IMAGE_SCN_MEM_WRITE; | |
4651 | break; | |
4652 | case 'x': /* section is executable */ | |
4653 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
4654 | break; | |
4655 | case 's': /* section is sharable */ | |
4656 | flags |= IMAGE_SCN_MEM_SHARED; | |
4657 | break; | |
4658 | ||
4659 | /* Section Alignment */ | |
4660 | case '0': /* align to byte boundary */ | |
4661 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
4662 | align = 0; | |
4663 | break; | |
4664 | case '1': /* align to halfword boundary */ | |
4665 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
4666 | align = 1; | |
4667 | break; | |
4668 | case '2': /* align to word boundary */ | |
4669 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
4670 | align = 2; | |
4671 | break; | |
4672 | case '3': /* align to doubleword boundary */ | |
4673 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
4674 | align = 3; | |
4675 | break; | |
4676 | case '4': /* align to quadword boundary */ | |
4677 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
4678 | align = 4; | |
4679 | break; | |
4680 | case '5': /* align to 32 byte boundary */ | |
4681 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
4682 | align = 5; | |
4683 | break; | |
4684 | case '6': /* align to 64 byte boundary */ | |
4685 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
4686 | align = 6; | |
4687 | break; | |
4688 | ||
4689 | default: | |
99a814a1 AM |
4690 | as_bad (_("unknown section attribute '%c'"), |
4691 | *input_line_pointer); | |
252b5132 RH |
4692 | break; |
4693 | } | |
4694 | ++input_line_pointer; | |
4695 | } | |
4696 | if (*input_line_pointer == '"') | |
4697 | ++input_line_pointer; | |
4698 | } | |
4699 | } | |
4700 | ||
4701 | sec = subseg_new (name, (subsegT) exp); | |
4702 | ||
99a814a1 | 4703 | ppc_set_current_section (sec); |
252b5132 RH |
4704 | |
4705 | if (flags != SEC_NO_FLAGS) | |
4706 | { | |
4707 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
4708 | as_bad (_("error setting flags for \"%s\": %s"), | |
4709 | bfd_section_name (stdoutput, sec), | |
4710 | bfd_errmsg (bfd_get_error ())); | |
4711 | } | |
4712 | ||
99a814a1 | 4713 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
4714 | |
4715 | } | |
4716 | ||
4717 | static void | |
4718 | ppc_pe_function (ignore) | |
5480ccf3 | 4719 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4720 | { |
4721 | char *name; | |
4722 | char endc; | |
4723 | symbolS *ext_sym; | |
4724 | ||
4725 | name = input_line_pointer; | |
4726 | endc = get_symbol_end (); | |
4727 | ||
4728 | ext_sym = symbol_find_or_make (name); | |
4729 | ||
4730 | *input_line_pointer = endc; | |
4731 | ||
4732 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4733 | SF_SET_FUNCTION (ext_sym); | |
4734 | SF_SET_PROCESS (ext_sym); | |
4735 | coff_add_linesym (ext_sym); | |
4736 | ||
4737 | demand_empty_rest_of_line (); | |
4738 | } | |
4739 | ||
4740 | static void | |
4741 | ppc_pe_tocd (ignore) | |
5480ccf3 | 4742 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
4743 | { |
4744 | if (tocdata_section == 0) | |
4745 | { | |
4746 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 4747 | /* FIXME: section flags won't work. */ |
252b5132 RH |
4748 | bfd_set_section_flags (stdoutput, tocdata_section, |
4749 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 4750 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
4751 | |
4752 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
4753 | } | |
4754 | else | |
4755 | { | |
4756 | rdata_section = subseg_new (".tocd", 0); | |
4757 | } | |
4758 | ||
99a814a1 | 4759 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
4760 | |
4761 | demand_empty_rest_of_line (); | |
4762 | } | |
4763 | ||
4764 | /* Don't adjust TOC relocs to use the section symbol. */ | |
4765 | ||
4766 | int | |
4767 | ppc_pe_fix_adjustable (fix) | |
4768 | fixS *fix; | |
4769 | { | |
4770 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
4771 | } | |
4772 | ||
4773 | #endif | |
4774 | \f | |
4775 | #ifdef OBJ_XCOFF | |
4776 | ||
4777 | /* XCOFF specific symbol and file handling. */ | |
4778 | ||
4779 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
4780 | any, to use square brackets, and to be in upper case. */ | |
4781 | ||
4782 | char * | |
4783 | ppc_canonicalize_symbol_name (name) | |
4784 | char *name; | |
4785 | { | |
4786 | char *s; | |
4787 | ||
4788 | if (ppc_stab_symbol) | |
4789 | return name; | |
4790 | ||
4791 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
4792 | ; | |
4793 | if (*s != '\0') | |
4794 | { | |
4795 | char brac; | |
4796 | ||
4797 | if (*s == '[') | |
4798 | brac = ']'; | |
4799 | else | |
4800 | { | |
4801 | *s = '['; | |
4802 | brac = '}'; | |
4803 | } | |
4804 | ||
4805 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 4806 | *s = TOUPPER (*s); |
252b5132 RH |
4807 | |
4808 | if (*s == '\0' || s[1] != '\0') | |
4809 | as_bad (_("bad symbol suffix")); | |
4810 | ||
4811 | *s = ']'; | |
4812 | } | |
4813 | ||
4814 | return name; | |
4815 | } | |
4816 | ||
4817 | /* Set the class of a symbol based on the suffix, if any. This is | |
4818 | called whenever a new symbol is created. */ | |
4819 | ||
4820 | void | |
4821 | ppc_symbol_new_hook (sym) | |
4822 | symbolS *sym; | |
4823 | { | |
809ffe0d | 4824 | struct ppc_tc_sy *tc; |
252b5132 RH |
4825 | const char *s; |
4826 | ||
809ffe0d ILT |
4827 | tc = symbol_get_tc (sym); |
4828 | tc->next = NULL; | |
4829 | tc->output = 0; | |
4830 | tc->class = -1; | |
4831 | tc->real_name = NULL; | |
4832 | tc->subseg = 0; | |
4833 | tc->align = 0; | |
4834 | tc->size = NULL; | |
4835 | tc->within = NULL; | |
252b5132 RH |
4836 | |
4837 | if (ppc_stab_symbol) | |
4838 | return; | |
4839 | ||
4840 | s = strchr (S_GET_NAME (sym), '['); | |
4841 | if (s == (const char *) NULL) | |
4842 | { | |
4843 | /* There is no suffix. */ | |
4844 | return; | |
4845 | } | |
4846 | ||
4847 | ++s; | |
4848 | ||
4849 | switch (s[0]) | |
4850 | { | |
4851 | case 'B': | |
4852 | if (strcmp (s, "BS]") == 0) | |
809ffe0d | 4853 | tc->class = XMC_BS; |
252b5132 RH |
4854 | break; |
4855 | case 'D': | |
4856 | if (strcmp (s, "DB]") == 0) | |
809ffe0d | 4857 | tc->class = XMC_DB; |
252b5132 | 4858 | else if (strcmp (s, "DS]") == 0) |
809ffe0d | 4859 | tc->class = XMC_DS; |
252b5132 RH |
4860 | break; |
4861 | case 'G': | |
4862 | if (strcmp (s, "GL]") == 0) | |
809ffe0d | 4863 | tc->class = XMC_GL; |
252b5132 RH |
4864 | break; |
4865 | case 'P': | |
4866 | if (strcmp (s, "PR]") == 0) | |
809ffe0d | 4867 | tc->class = XMC_PR; |
252b5132 RH |
4868 | break; |
4869 | case 'R': | |
4870 | if (strcmp (s, "RO]") == 0) | |
809ffe0d | 4871 | tc->class = XMC_RO; |
252b5132 | 4872 | else if (strcmp (s, "RW]") == 0) |
809ffe0d | 4873 | tc->class = XMC_RW; |
252b5132 RH |
4874 | break; |
4875 | case 'S': | |
4876 | if (strcmp (s, "SV]") == 0) | |
809ffe0d | 4877 | tc->class = XMC_SV; |
252b5132 RH |
4878 | break; |
4879 | case 'T': | |
4880 | if (strcmp (s, "TC]") == 0) | |
809ffe0d | 4881 | tc->class = XMC_TC; |
252b5132 | 4882 | else if (strcmp (s, "TI]") == 0) |
809ffe0d | 4883 | tc->class = XMC_TI; |
252b5132 | 4884 | else if (strcmp (s, "TB]") == 0) |
809ffe0d | 4885 | tc->class = XMC_TB; |
252b5132 | 4886 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
809ffe0d | 4887 | tc->class = XMC_TC0; |
252b5132 RH |
4888 | break; |
4889 | case 'U': | |
4890 | if (strcmp (s, "UA]") == 0) | |
809ffe0d | 4891 | tc->class = XMC_UA; |
252b5132 | 4892 | else if (strcmp (s, "UC]") == 0) |
809ffe0d | 4893 | tc->class = XMC_UC; |
252b5132 RH |
4894 | break; |
4895 | case 'X': | |
4896 | if (strcmp (s, "XO]") == 0) | |
809ffe0d | 4897 | tc->class = XMC_XO; |
252b5132 RH |
4898 | break; |
4899 | } | |
4900 | ||
809ffe0d | 4901 | if (tc->class == -1) |
252b5132 RH |
4902 | as_bad (_("Unrecognized symbol suffix")); |
4903 | } | |
4904 | ||
4905 | /* Set the class of a label based on where it is defined. This | |
4906 | handles symbols without suffixes. Also, move the symbol so that it | |
4907 | follows the csect symbol. */ | |
4908 | ||
4909 | void | |
4910 | ppc_frob_label (sym) | |
4911 | symbolS *sym; | |
4912 | { | |
4913 | if (ppc_current_csect != (symbolS *) NULL) | |
4914 | { | |
809ffe0d ILT |
4915 | if (symbol_get_tc (sym)->class == -1) |
4916 | symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class; | |
252b5132 RH |
4917 | |
4918 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4919 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
4920 | &symbol_rootP, &symbol_lastP); | |
4921 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 | 4922 | } |
07a53e5c RH |
4923 | |
4924 | #ifdef OBJ_ELF | |
4925 | dwarf2_emit_label (sym); | |
4926 | #endif | |
252b5132 RH |
4927 | } |
4928 | ||
4929 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
4930 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
4931 | the symbols. */ | |
4932 | ||
b34976b6 | 4933 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
4934 | |
4935 | /* Change the name of a symbol just before writing it out. Set the | |
4936 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
4937 | class suffix. Return 1 if the symbol should not be included in the | |
4938 | symbol table. */ | |
4939 | ||
4940 | int | |
4941 | ppc_frob_symbol (sym) | |
4942 | symbolS *sym; | |
4943 | { | |
4944 | static symbolS *ppc_last_function; | |
4945 | static symbolS *set_end; | |
4946 | ||
4947 | /* Discard symbols that should not be included in the output symbol | |
4948 | table. */ | |
809ffe0d ILT |
4949 | if (! symbol_used_in_reloc_p (sym) |
4950 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 4951 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 4952 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
4953 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
4954 | return 1; | |
4955 | ||
a161fe53 AM |
4956 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
4957 | if (sym == abs_section_sym) | |
4958 | return 1; | |
4959 | ||
809ffe0d ILT |
4960 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
4961 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
4962 | else |
4963 | { | |
4964 | const char *name; | |
4965 | const char *s; | |
4966 | ||
4967 | name = S_GET_NAME (sym); | |
4968 | s = strchr (name, '['); | |
4969 | if (s != (char *) NULL) | |
4970 | { | |
4971 | unsigned int len; | |
4972 | char *snew; | |
4973 | ||
4974 | len = s - name; | |
4975 | snew = xmalloc (len + 1); | |
4976 | memcpy (snew, name, len); | |
4977 | snew[len] = '\0'; | |
4978 | ||
4979 | S_SET_NAME (sym, snew); | |
4980 | } | |
4981 | } | |
4982 | ||
4983 | if (set_end != (symbolS *) NULL) | |
4984 | { | |
4985 | SA_SET_SYM_ENDNDX (set_end, sym); | |
4986 | set_end = NULL; | |
4987 | } | |
4988 | ||
4989 | if (SF_GET_FUNCTION (sym)) | |
4990 | { | |
4991 | if (ppc_last_function != (symbolS *) NULL) | |
4992 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
4993 | ppc_last_function = sym; | |
809ffe0d | 4994 | if (symbol_get_tc (sym)->size != (symbolS *) NULL) |
252b5132 | 4995 | { |
6386f3a7 | 4996 | resolve_symbol_value (symbol_get_tc (sym)->size); |
809ffe0d ILT |
4997 | SA_SET_SYM_FSIZE (sym, |
4998 | (long) S_GET_VALUE (symbol_get_tc (sym)->size)); | |
252b5132 RH |
4999 | } |
5000 | } | |
5001 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5002 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5003 | { | |
5004 | if (ppc_last_function == (symbolS *) NULL) | |
5005 | as_bad (_(".ef with no preceding .function")); | |
5006 | else | |
5007 | { | |
5008 | set_end = ppc_last_function; | |
5009 | ppc_last_function = NULL; | |
5010 | ||
5011 | /* We don't have a C_EFCN symbol, but we need to force the | |
5012 | COFF backend to believe that it has seen one. */ | |
5013 | coff_last_function = NULL; | |
5014 | } | |
5015 | } | |
5016 | ||
670ec21d | 5017 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5018 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5019 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5020 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5021 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5022 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5023 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5024 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5025 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5026 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5027 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5028 | ||
5029 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
5030 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) | |
5031 | { | |
5032 | int i; | |
5033 | union internal_auxent *a; | |
5034 | ||
5035 | /* Create a csect aux. */ | |
5036 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5037 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d ILT |
5038 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
5039 | if (symbol_get_tc (sym)->class == XMC_TC0) | |
252b5132 RH |
5040 | { |
5041 | /* This is the TOC table. */ | |
5042 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5043 | a->x_csect.x_scnlen.l = 0; | |
5044 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5045 | } | |
809ffe0d | 5046 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5047 | { |
5048 | /* This is a csect symbol. x_scnlen is the size of the | |
5049 | csect. */ | |
809ffe0d | 5050 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5051 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5052 | S_GET_SEGMENT (sym)) | |
5053 | - S_GET_VALUE (sym)); | |
5054 | else | |
5055 | { | |
6386f3a7 | 5056 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5057 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5058 | - S_GET_VALUE (sym)); |
5059 | } | |
809ffe0d | 5060 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5061 | } |
5062 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5063 | { | |
5064 | /* This is a common symbol. */ | |
809ffe0d ILT |
5065 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5066 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5067 | if (S_IS_EXTERNAL (sym)) |
809ffe0d | 5068 | symbol_get_tc (sym)->class = XMC_RW; |
252b5132 | 5069 | else |
809ffe0d | 5070 | symbol_get_tc (sym)->class = XMC_BS; |
252b5132 RH |
5071 | } |
5072 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5073 | { | |
5074 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5075 | ppc_adjust_symtab. */ |
b34976b6 | 5076 | ppc_saw_abs = TRUE; |
252b5132 | 5077 | a->x_csect.x_smtyp = XTY_LD; |
809ffe0d ILT |
5078 | if (symbol_get_tc (sym)->class == -1) |
5079 | symbol_get_tc (sym)->class = XMC_XO; | |
252b5132 RH |
5080 | } |
5081 | else if (! S_IS_DEFINED (sym)) | |
5082 | { | |
5083 | /* This is an external symbol. */ | |
5084 | a->x_csect.x_scnlen.l = 0; | |
5085 | a->x_csect.x_smtyp = XTY_ER; | |
5086 | } | |
809ffe0d | 5087 | else if (symbol_get_tc (sym)->class == XMC_TC) |
252b5132 RH |
5088 | { |
5089 | symbolS *next; | |
5090 | ||
5091 | /* This is a TOC definition. x_scnlen is the size of the | |
5092 | TOC entry. */ | |
5093 | next = symbol_next (sym); | |
809ffe0d | 5094 | while (symbol_get_tc (next)->class == XMC_TC0) |
252b5132 RH |
5095 | next = symbol_next (next); |
5096 | if (next == (symbolS *) NULL | |
809ffe0d | 5097 | || symbol_get_tc (next)->class != XMC_TC) |
252b5132 RH |
5098 | { |
5099 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5100 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5101 | data_section) | |
5102 | - S_GET_VALUE (sym)); | |
5103 | else | |
5104 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5105 | - S_GET_VALUE (sym)); | |
5106 | } | |
5107 | else | |
5108 | { | |
6386f3a7 | 5109 | resolve_symbol_value (next); |
252b5132 RH |
5110 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5111 | - S_GET_VALUE (sym)); | |
5112 | } | |
5113 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5114 | } | |
5115 | else | |
5116 | { | |
5117 | symbolS *csect; | |
5118 | ||
5119 | /* This is a normal symbol definition. x_scnlen is the | |
5120 | symbol index of the containing csect. */ | |
5121 | if (S_GET_SEGMENT (sym) == text_section) | |
5122 | csect = ppc_text_csects; | |
5123 | else if (S_GET_SEGMENT (sym) == data_section) | |
5124 | csect = ppc_data_csects; | |
5125 | else | |
5126 | abort (); | |
5127 | ||
5128 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5129 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5130 | |
5131 | if (csect == (symbolS *) NULL) | |
5132 | { | |
5133 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5134 | a->x_csect.x_scnlen.l = 0; | |
5135 | } | |
5136 | else | |
5137 | { | |
809ffe0d | 5138 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5139 | { |
6386f3a7 | 5140 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5141 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5142 | > S_GET_VALUE (sym)) | |
252b5132 | 5143 | break; |
809ffe0d | 5144 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5145 | } |
5146 | ||
809ffe0d ILT |
5147 | a->x_csect.x_scnlen.p = |
5148 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5149 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5150 | 1; | |
252b5132 RH |
5151 | } |
5152 | a->x_csect.x_smtyp = XTY_LD; | |
5153 | } | |
81d4177b | 5154 | |
252b5132 RH |
5155 | a->x_csect.x_parmhash = 0; |
5156 | a->x_csect.x_snhash = 0; | |
809ffe0d | 5157 | if (symbol_get_tc (sym)->class == -1) |
252b5132 RH |
5158 | a->x_csect.x_smclas = XMC_PR; |
5159 | else | |
809ffe0d | 5160 | a->x_csect.x_smclas = symbol_get_tc (sym)->class; |
252b5132 RH |
5161 | a->x_csect.x_stab = 0; |
5162 | a->x_csect.x_snstab = 0; | |
5163 | ||
5164 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5165 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5166 | } |
5167 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5168 | { | |
5169 | /* We want the value to be the symbol index of the referenced | |
5170 | csect symbol. BFD will do that for us if we set the right | |
5171 | flags. */ | |
b782de16 AM |
5172 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5173 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5174 | ||
5175 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5176 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5177 | } |
5178 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5179 | { | |
5180 | symbolS *block; | |
5181 | symbolS *csect; | |
5182 | ||
5183 | /* The value is the offset from the enclosing csect. */ | |
809ffe0d ILT |
5184 | block = symbol_get_tc (sym)->within; |
5185 | csect = symbol_get_tc (block)->within; | |
6386f3a7 | 5186 | resolve_symbol_value (csect); |
252b5132 RH |
5187 | S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect)); |
5188 | } | |
5189 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5190 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5191 | { | |
5192 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5193 | BFD will do that for us if we set the right flags. We have |
5194 | already set the value correctly. */ | |
809ffe0d | 5195 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5196 | } |
5197 | ||
5198 | return 0; | |
5199 | } | |
5200 | ||
5201 | /* Adjust the symbol table. This creates csect symbols for all | |
5202 | absolute symbols. */ | |
5203 | ||
5204 | void | |
5205 | ppc_adjust_symtab () | |
5206 | { | |
5207 | symbolS *sym; | |
5208 | ||
5209 | if (! ppc_saw_abs) | |
5210 | return; | |
5211 | ||
5212 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5213 | { | |
5214 | symbolS *csect; | |
5215 | int i; | |
5216 | union internal_auxent *a; | |
5217 | ||
5218 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5219 | continue; | |
5220 | ||
5221 | csect = symbol_create (".abs[XO]", absolute_section, | |
5222 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5223 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5224 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5225 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5226 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5227 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5228 | a->x_csect.x_scnlen.l = 0; |
5229 | a->x_csect.x_smtyp = XTY_SD; | |
5230 | a->x_csect.x_parmhash = 0; | |
5231 | a->x_csect.x_snhash = 0; | |
5232 | a->x_csect.x_smclas = XMC_XO; | |
5233 | a->x_csect.x_stab = 0; | |
5234 | a->x_csect.x_snstab = 0; | |
5235 | ||
5236 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5237 | ||
5238 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5239 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5240 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5241 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5242 | } |
5243 | ||
b34976b6 | 5244 | ppc_saw_abs = FALSE; |
252b5132 RH |
5245 | } |
5246 | ||
5247 | /* Set the VMA for a section. This is called on all the sections in | |
5248 | turn. */ | |
5249 | ||
5250 | void | |
5251 | ppc_frob_section (sec) | |
5252 | asection *sec; | |
5253 | { | |
931e13a6 | 5254 | static bfd_vma vma = 0; |
252b5132 | 5255 | |
931e13a6 | 5256 | vma = md_section_align (sec, vma); |
252b5132 RH |
5257 | bfd_set_section_vma (stdoutput, sec, vma); |
5258 | vma += bfd_section_size (stdoutput, sec); | |
5259 | } | |
5260 | ||
5261 | #endif /* OBJ_XCOFF */ | |
5262 | \f | |
5263 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
5264 | of type TYPE, and store the appropriate bytes in *LITP. The number |
5265 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
252b5132 RH |
5266 | returned, or NULL on OK. */ |
5267 | ||
5268 | char * | |
5269 | md_atof (type, litp, sizep) | |
5270 | int type; | |
5271 | char *litp; | |
5272 | int *sizep; | |
5273 | { | |
5274 | int prec; | |
5275 | LITTLENUM_TYPE words[4]; | |
5276 | char *t; | |
5277 | int i; | |
5278 | ||
5279 | switch (type) | |
5280 | { | |
5281 | case 'f': | |
5282 | prec = 2; | |
5283 | break; | |
5284 | ||
5285 | case 'd': | |
5286 | prec = 4; | |
5287 | break; | |
5288 | ||
5289 | default: | |
5290 | *sizep = 0; | |
5291 | return _("bad call to md_atof"); | |
5292 | } | |
5293 | ||
5294 | t = atof_ieee (input_line_pointer, type, words); | |
5295 | if (t) | |
5296 | input_line_pointer = t; | |
5297 | ||
5298 | *sizep = prec * 2; | |
5299 | ||
5300 | if (target_big_endian) | |
5301 | { | |
5302 | for (i = 0; i < prec; i++) | |
5303 | { | |
5304 | md_number_to_chars (litp, (valueT) words[i], 2); | |
5305 | litp += 2; | |
5306 | } | |
5307 | } | |
5308 | else | |
5309 | { | |
5310 | for (i = prec - 1; i >= 0; i--) | |
5311 | { | |
5312 | md_number_to_chars (litp, (valueT) words[i], 2); | |
5313 | litp += 2; | |
5314 | } | |
5315 | } | |
81d4177b | 5316 | |
252b5132 RH |
5317 | return NULL; |
5318 | } | |
5319 | ||
5320 | /* Write a value out to the object file, using the appropriate | |
5321 | endianness. */ | |
5322 | ||
5323 | void | |
5324 | md_number_to_chars (buf, val, n) | |
5325 | char *buf; | |
5326 | valueT val; | |
5327 | int n; | |
5328 | { | |
5329 | if (target_big_endian) | |
5330 | number_to_chars_bigendian (buf, val, n); | |
5331 | else | |
5332 | number_to_chars_littleendian (buf, val, n); | |
5333 | } | |
5334 | ||
5335 | /* Align a section (I don't know why this is machine dependent). */ | |
5336 | ||
5337 | valueT | |
3aeeedbb | 5338 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 5339 | { |
3aeeedbb AM |
5340 | #ifdef OBJ_ELF |
5341 | return addr; | |
5342 | #else | |
252b5132 RH |
5343 | int align = bfd_get_section_alignment (stdoutput, seg); |
5344 | ||
5345 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 5346 | #endif |
252b5132 RH |
5347 | } |
5348 | ||
5349 | /* We don't have any form of relaxing. */ | |
5350 | ||
5351 | int | |
5352 | md_estimate_size_before_relax (fragp, seg) | |
92161534 ILT |
5353 | fragS *fragp ATTRIBUTE_UNUSED; |
5354 | asection *seg ATTRIBUTE_UNUSED; | |
252b5132 RH |
5355 | { |
5356 | abort (); | |
5357 | return 0; | |
5358 | } | |
5359 | ||
5360 | /* Convert a machine dependent frag. We never generate these. */ | |
5361 | ||
5362 | void | |
5363 | md_convert_frag (abfd, sec, fragp) | |
92161534 ILT |
5364 | bfd *abfd ATTRIBUTE_UNUSED; |
5365 | asection *sec ATTRIBUTE_UNUSED; | |
5366 | fragS *fragp ATTRIBUTE_UNUSED; | |
252b5132 RH |
5367 | { |
5368 | abort (); | |
5369 | } | |
5370 | ||
5371 | /* We have no need to default values of symbols. */ | |
5372 | ||
252b5132 RH |
5373 | symbolS * |
5374 | md_undefined_symbol (name) | |
92161534 | 5375 | char *name ATTRIBUTE_UNUSED; |
252b5132 RH |
5376 | { |
5377 | return 0; | |
5378 | } | |
5379 | \f | |
5380 | /* Functions concerning relocs. */ | |
5381 | ||
5382 | /* The location from which a PC relative jump should be calculated, | |
5383 | given a PC relative reloc. */ | |
5384 | ||
5385 | long | |
5386 | md_pcrel_from_section (fixp, sec) | |
5387 | fixS *fixp; | |
92161534 | 5388 | segT sec ATTRIBUTE_UNUSED; |
252b5132 RH |
5389 | { |
5390 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
5391 | } | |
5392 | ||
5393 | #ifdef OBJ_XCOFF | |
5394 | ||
5395 | /* This is called to see whether a fixup should be adjusted to use a | |
5396 | section symbol. We take the opportunity to change a fixup against | |
5397 | a symbol in the TOC subsegment into a reloc against the | |
5398 | corresponding .tc symbol. */ | |
5399 | ||
5400 | int | |
5401 | ppc_fix_adjustable (fix) | |
5402 | fixS *fix; | |
5403 | { | |
b782de16 AM |
5404 | valueT val = resolve_symbol_value (fix->fx_addsy); |
5405 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
5406 | TC_SYMFIELD_TYPE *tc; | |
5407 | ||
5408 | if (symseg == absolute_section) | |
5409 | return 0; | |
252b5132 | 5410 | |
252b5132 | 5411 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 5412 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 5413 | && symseg == data_section |
252b5132 RH |
5414 | && val >= ppc_toc_frag->fr_address |
5415 | && (ppc_after_toc_frag == (fragS *) NULL | |
5416 | || val < ppc_after_toc_frag->fr_address)) | |
5417 | { | |
5418 | symbolS *sy; | |
5419 | ||
5420 | for (sy = symbol_next (ppc_toc_csect); | |
5421 | sy != (symbolS *) NULL; | |
5422 | sy = symbol_next (sy)) | |
5423 | { | |
b782de16 AM |
5424 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
5425 | ||
5426 | if (sy_tc->class == XMC_TC0) | |
252b5132 | 5427 | continue; |
b782de16 | 5428 | if (sy_tc->class != XMC_TC) |
252b5132 | 5429 | break; |
b782de16 | 5430 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
5431 | { |
5432 | fix->fx_addsy = sy; | |
5433 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
5434 | return 0; | |
5435 | } | |
5436 | } | |
5437 | ||
5438 | as_bad_where (fix->fx_file, fix->fx_line, | |
5439 | _("symbol in .toc does not match any .tc")); | |
5440 | } | |
5441 | ||
5442 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
5443 | tc = symbol_get_tc (fix->fx_addsy); |
5444 | if (tc->subseg == 0 | |
5445 | && tc->class != XMC_TC0 | |
5446 | && tc->class != XMC_TC | |
5447 | && symseg != bss_section | |
252b5132 | 5448 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 5449 | && (symseg != data_section |
252b5132 RH |
5450 | || ppc_toc_csect == NULL |
5451 | || val < ppc_toc_frag->fr_address | |
5452 | || (ppc_after_toc_frag != NULL | |
5453 | && val >= ppc_after_toc_frag->fr_address))) | |
5454 | { | |
5455 | symbolS *csect; | |
b782de16 | 5456 | symbolS *next_csect; |
252b5132 | 5457 | |
b782de16 | 5458 | if (symseg == text_section) |
252b5132 | 5459 | csect = ppc_text_csects; |
b782de16 | 5460 | else if (symseg == data_section) |
252b5132 RH |
5461 | csect = ppc_data_csects; |
5462 | else | |
5463 | abort (); | |
5464 | ||
5465 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5466 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5467 | |
5468 | if (csect != (symbolS *) NULL) | |
5469 | { | |
b782de16 AM |
5470 | while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL |
5471 | && (symbol_get_frag (next_csect)->fr_address <= val)) | |
252b5132 RH |
5472 | { |
5473 | /* If the csect address equals the symbol value, then we | |
99a814a1 AM |
5474 | have to look through the full symbol table to see |
5475 | whether this is the csect we want. Note that we will | |
5476 | only get here if the csect has zero length. */ | |
b782de16 AM |
5477 | if (symbol_get_frag (csect)->fr_address == val |
5478 | && S_GET_VALUE (csect) == val) | |
252b5132 RH |
5479 | { |
5480 | symbolS *scan; | |
5481 | ||
809ffe0d | 5482 | for (scan = symbol_next (csect); |
252b5132 | 5483 | scan != NULL; |
809ffe0d | 5484 | scan = symbol_next (scan)) |
252b5132 | 5485 | { |
809ffe0d | 5486 | if (symbol_get_tc (scan)->subseg != 0) |
252b5132 RH |
5487 | break; |
5488 | if (scan == fix->fx_addsy) | |
5489 | break; | |
5490 | } | |
5491 | ||
5492 | /* If we found the symbol before the next csect | |
99a814a1 | 5493 | symbol, then this is the csect we want. */ |
252b5132 RH |
5494 | if (scan == fix->fx_addsy) |
5495 | break; | |
5496 | } | |
5497 | ||
b782de16 | 5498 | csect = next_csect; |
252b5132 RH |
5499 | } |
5500 | ||
b782de16 | 5501 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
252b5132 RH |
5502 | fix->fx_addsy = csect; |
5503 | } | |
b782de16 | 5504 | return 0; |
252b5132 RH |
5505 | } |
5506 | ||
5507 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
5508 | .lcomm. */ | |
b782de16 | 5509 | if (symseg == bss_section |
252b5132 RH |
5510 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
5511 | { | |
b782de16 AM |
5512 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
5513 | ||
5514 | fix->fx_offset += val - resolve_symbol_value (sy); | |
5515 | fix->fx_addsy = sy; | |
252b5132 RH |
5516 | } |
5517 | ||
5518 | return 0; | |
5519 | } | |
5520 | ||
5521 | /* A reloc from one csect to another must be kept. The assembler | |
5522 | will, of course, keep relocs between sections, and it will keep | |
5523 | absolute relocs, but we need to force it to keep PC relative relocs | |
5524 | between two csects in the same section. */ | |
5525 | ||
5526 | int | |
5527 | ppc_force_relocation (fix) | |
5528 | fixS *fix; | |
5529 | { | |
5530 | /* At this point fix->fx_addsy should already have been converted to | |
5531 | a csect symbol. If the csect does not include the fragment, then | |
5532 | we need to force the relocation. */ | |
5533 | if (fix->fx_pcrel | |
5534 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
5535 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
5536 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
5537 | > fix->fx_frag->fr_address) | |
5538 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
5539 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
5540 | <= fix->fx_frag->fr_address)))) |
5541 | return 1; | |
5542 | ||
ae6063d4 | 5543 | return generic_force_reloc (fix); |
252b5132 RH |
5544 | } |
5545 | ||
5546 | #endif /* OBJ_XCOFF */ | |
5547 | ||
0baf16f2 | 5548 | #ifdef OBJ_ELF |
a161fe53 AM |
5549 | /* If this function returns non-zero, it guarantees that a relocation |
5550 | will be emitted for a fixup. */ | |
5551 | ||
5552 | int | |
5553 | ppc_force_relocation (fix) | |
5554 | fixS *fix; | |
5555 | { | |
5556 | /* Branch prediction relocations must force a relocation, as must | |
5557 | the vtable description relocs. */ | |
5558 | switch (fix->fx_r_type) | |
5559 | { | |
5560 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
5561 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
5562 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
5563 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 5564 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 5565 | case BFD_RELOC_PPC64_TOC: |
a161fe53 AM |
5566 | return 1; |
5567 | default: | |
5568 | break; | |
5569 | } | |
5570 | ||
cdba85ec AM |
5571 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
5572 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
5573 | return 1; | |
5574 | ||
ae6063d4 | 5575 | return generic_force_reloc (fix); |
a161fe53 AM |
5576 | } |
5577 | ||
0baf16f2 AM |
5578 | int |
5579 | ppc_fix_adjustable (fix) | |
5580 | fixS *fix; | |
252b5132 | 5581 | { |
0baf16f2 AM |
5582 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
5583 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
5584 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
5585 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
5586 | && fix->fx_r_type != BFD_RELOC_GPREL16 | |
5587 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
5588 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 5589 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 5590 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 5591 | } |
0baf16f2 | 5592 | #endif |
252b5132 | 5593 | |
3aeeedbb AM |
5594 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
5595 | rs_align_code frag. */ | |
5596 | ||
5597 | void | |
5598 | ppc_handle_align (struct frag *fragP) | |
5599 | { | |
5600 | valueT count = (fragP->fr_next->fr_address | |
5601 | - (fragP->fr_address + fragP->fr_fix)); | |
5602 | ||
5603 | if (count != 0 && (count & 3) == 0) | |
5604 | { | |
5605 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
5606 | ||
5607 | fragP->fr_var = 4; | |
5608 | md_number_to_chars (dest, 0x60000000, 4); | |
5609 | ||
5610 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0) | |
5611 | { | |
5612 | /* For power6, we want the last nop to be a group terminating | |
5613 | one, "ori 1,1,0". Do this by inserting an rs_fill frag | |
5614 | immediately after this one, with its address set to the last | |
5615 | nop location. This will automatically reduce the number of | |
5616 | nops in the current frag by one. */ | |
5617 | if (count > 4) | |
5618 | { | |
5619 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
5620 | ||
5621 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
5622 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
5623 | group_nop->fr_fix = 0; | |
5624 | group_nop->fr_offset = 1; | |
5625 | group_nop->fr_type = rs_fill; | |
5626 | fragP->fr_next = group_nop; | |
5627 | dest = group_nop->fr_literal; | |
5628 | } | |
5629 | ||
5630 | md_number_to_chars (dest, 0x60210000, 4); | |
5631 | } | |
5632 | } | |
5633 | } | |
5634 | ||
252b5132 RH |
5635 | /* Apply a fixup to the object code. This is called for all the |
5636 | fixups we generated by the call to fix_new_exp, above. In the call | |
5637 | above we used a reloc code which was the largest legal reloc code | |
5638 | plus the operand index. Here we undo that to recover the operand | |
5639 | index. At this point all symbol values should be fully resolved, | |
5640 | and we attempt to completely resolve the reloc. If we can not do | |
5641 | that, we determine the correct reloc code and put it back in the | |
5642 | fixup. */ | |
5643 | ||
94f592af | 5644 | void |
55cf6793 | 5645 | md_apply_fix (fixP, valP, seg) |
94f592af NC |
5646 | fixS *fixP; |
5647 | valueT * valP; | |
0baf16f2 | 5648 | segT seg ATTRIBUTE_UNUSED; |
252b5132 | 5649 | { |
94f592af | 5650 | valueT value = * valP; |
252b5132 RH |
5651 | |
5652 | #ifdef OBJ_ELF | |
94f592af | 5653 | if (fixP->fx_addsy != NULL) |
252b5132 | 5654 | { |
a161fe53 | 5655 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
5656 | if (fixP->fx_pcrel) |
5657 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
5658 | } |
5659 | else | |
94f592af | 5660 | fixP->fx_done = 1; |
252b5132 | 5661 | #else |
a161fe53 | 5662 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
5663 | the symbol values. If we are doing this relocation the code in |
5664 | write.c is going to call bfd_install_relocation, which is also | |
5665 | going to use the symbol value. That means that if the reloc is | |
5666 | fully resolved we want to use *valP since bfd_install_relocation is | |
5667 | not being used. | |
252b5132 | 5668 | However, if the reloc is not fully resolved we do not want to use |
a161fe53 AM |
5669 | *valP, and must use fx_offset instead. However, if the reloc |
5670 | is PC relative, we do want to use *valP since it includes the | |
252b5132 | 5671 | result of md_pcrel_from. This is confusing. */ |
94f592af NC |
5672 | if (fixP->fx_addsy == (symbolS *) NULL) |
5673 | fixP->fx_done = 1; | |
5674 | ||
5675 | else if (fixP->fx_pcrel) | |
5676 | ; | |
5677 | ||
252b5132 | 5678 | else |
a161fe53 AM |
5679 | value = fixP->fx_offset; |
5680 | #endif | |
5681 | ||
5682 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 5683 | { |
a161fe53 AM |
5684 | /* We can't actually support subtracting a symbol. */ |
5685 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 5686 | } |
252b5132 | 5687 | |
94f592af | 5688 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) |
252b5132 RH |
5689 | { |
5690 | int opindex; | |
5691 | const struct powerpc_operand *operand; | |
5692 | char *where; | |
5693 | unsigned long insn; | |
5694 | ||
94f592af | 5695 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
252b5132 RH |
5696 | |
5697 | operand = &powerpc_operands[opindex]; | |
5698 | ||
5699 | #ifdef OBJ_XCOFF | |
0baf16f2 AM |
5700 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
5701 | does not generate a reloc. It uses the offset of `sym' within its | |
5702 | csect. Other usages, such as `.long sym', generate relocs. This | |
5703 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 5704 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 5705 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 5706 | && operand->shift == 0 |
2b3c4602 | 5707 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
5708 | && fixP->fx_addsy != NULL |
5709 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
5710 | && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC | |
5711 | && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0 | |
5712 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) | |
252b5132 | 5713 | { |
94f592af NC |
5714 | value = fixP->fx_offset; |
5715 | fixP->fx_done = 1; | |
252b5132 RH |
5716 | } |
5717 | #endif | |
5718 | ||
5719 | /* Fetch the instruction, insert the fully resolved operand | |
5720 | value, and stuff the instruction back again. */ | |
94f592af | 5721 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 RH |
5722 | if (target_big_endian) |
5723 | insn = bfd_getb32 ((unsigned char *) where); | |
5724 | else | |
5725 | insn = bfd_getl32 ((unsigned char *) where); | |
5726 | insn = ppc_insert_operand (insn, operand, (offsetT) value, | |
94f592af | 5727 | fixP->fx_file, fixP->fx_line); |
252b5132 RH |
5728 | if (target_big_endian) |
5729 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
5730 | else | |
5731 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
5732 | ||
94f592af NC |
5733 | if (fixP->fx_done) |
5734 | /* Nothing else to do here. */ | |
5735 | return; | |
252b5132 | 5736 | |
94f592af | 5737 | assert (fixP->fx_addsy != NULL); |
0baf16f2 | 5738 | |
252b5132 RH |
5739 | /* Determine a BFD reloc value based on the operand information. |
5740 | We are only prepared to turn a few of the operands into | |
0baf16f2 | 5741 | relocs. */ |
11b37b7b | 5742 | if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 5743 | && operand->bitm == 0x3fffffc |
11b37b7b | 5744 | && operand->shift == 0) |
94f592af | 5745 | fixP->fx_r_type = BFD_RELOC_PPC_B26; |
11b37b7b | 5746 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 5747 | && operand->bitm == 0xfffc |
11b37b7b | 5748 | && operand->shift == 0) |
95210096 AM |
5749 | { |
5750 | fixP->fx_r_type = BFD_RELOC_PPC_B16; | |
5751 | #ifdef OBJ_XCOFF | |
5752 | fixP->fx_size = 2; | |
5753 | if (target_big_endian) | |
5754 | fixP->fx_where += 2; | |
5755 | #endif | |
5756 | } | |
11b37b7b | 5757 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 5758 | && operand->bitm == 0x3fffffc |
11b37b7b | 5759 | && operand->shift == 0) |
94f592af | 5760 | fixP->fx_r_type = BFD_RELOC_PPC_BA26; |
11b37b7b | 5761 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 5762 | && operand->bitm == 0xfffc |
11b37b7b | 5763 | && operand->shift == 0) |
95210096 AM |
5764 | { |
5765 | fixP->fx_r_type = BFD_RELOC_PPC_BA16; | |
5766 | #ifdef OBJ_XCOFF | |
5767 | fixP->fx_size = 2; | |
5768 | if (target_big_endian) | |
5769 | fixP->fx_where += 2; | |
5770 | #endif | |
5771 | } | |
0baf16f2 | 5772 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
11b37b7b | 5773 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 5774 | && (operand->bitm & 0xfff0) == 0xfff0 |
a7fc733f | 5775 | && operand->shift == 0) |
11b37b7b | 5776 | { |
a7fc733f AM |
5777 | if (ppc_is_toc_sym (fixP->fx_addsy)) |
5778 | { | |
5779 | fixP->fx_r_type = BFD_RELOC_PPC_TOC16; | |
0baf16f2 | 5780 | #ifdef OBJ_ELF |
a7fc733f AM |
5781 | if (ppc_obj64 |
5782 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
5783 | fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS; | |
5784 | #endif | |
5785 | } | |
5786 | else | |
5787 | { | |
5788 | fixP->fx_r_type = BFD_RELOC_16; | |
5789 | #ifdef OBJ_ELF | |
5790 | if (ppc_obj64 | |
5791 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
5792 | fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS; | |
0baf16f2 | 5793 | #endif |
a7fc733f | 5794 | } |
94f592af | 5795 | fixP->fx_size = 2; |
11b37b7b | 5796 | if (target_big_endian) |
94f592af | 5797 | fixP->fx_where += 2; |
11b37b7b | 5798 | } |
0baf16f2 | 5799 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
11b37b7b | 5800 | else |
252b5132 RH |
5801 | { |
5802 | char *sfile; | |
5803 | unsigned int sline; | |
5804 | ||
5805 | /* Use expr_symbol_where to see if this is an expression | |
0baf16f2 | 5806 | symbol. */ |
94f592af NC |
5807 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) |
5808 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 RH |
5809 | _("unresolved expression that must be resolved")); |
5810 | else | |
94f592af | 5811 | as_bad_where (fixP->fx_file, fixP->fx_line, |
0baf16f2 | 5812 | _("unsupported relocation against %s"), |
94f592af NC |
5813 | S_GET_NAME (fixP->fx_addsy)); |
5814 | fixP->fx_done = 1; | |
5815 | return; | |
252b5132 RH |
5816 | } |
5817 | } | |
5818 | else | |
5819 | { | |
5820 | #ifdef OBJ_ELF | |
94f592af | 5821 | ppc_elf_validate_fix (fixP, seg); |
252b5132 | 5822 | #endif |
94f592af | 5823 | switch (fixP->fx_r_type) |
252b5132 | 5824 | { |
252b5132 | 5825 | case BFD_RELOC_CTOR: |
2b3c4602 | 5826 | if (ppc_obj64) |
9c7977b3 AM |
5827 | goto ctor64; |
5828 | /* fall through */ | |
5829 | ||
0baf16f2 | 5830 | case BFD_RELOC_32: |
94f592af NC |
5831 | if (fixP->fx_pcrel) |
5832 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
99a814a1 | 5833 | /* fall through */ |
252b5132 RH |
5834 | |
5835 | case BFD_RELOC_RVA: | |
5836 | case BFD_RELOC_32_PCREL: | |
252b5132 | 5837 | case BFD_RELOC_PPC_EMB_NADDR32: |
94f592af | 5838 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
5839 | value, 4); |
5840 | break; | |
5841 | ||
7f6d05e8 | 5842 | case BFD_RELOC_64: |
9c7977b3 | 5843 | ctor64: |
94f592af NC |
5844 | if (fixP->fx_pcrel) |
5845 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
99a814a1 | 5846 | /* fall through */ |
0baf16f2 | 5847 | |
7f6d05e8 | 5848 | case BFD_RELOC_64_PCREL: |
94f592af | 5849 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
7f6d05e8 | 5850 | value, 8); |
81d4177b | 5851 | break; |
0baf16f2 | 5852 | |
252b5132 RH |
5853 | case BFD_RELOC_GPREL16: |
5854 | case BFD_RELOC_16_GOT_PCREL: | |
5855 | case BFD_RELOC_16_GOTOFF: | |
5856 | case BFD_RELOC_LO16_GOTOFF: | |
5857 | case BFD_RELOC_HI16_GOTOFF: | |
5858 | case BFD_RELOC_HI16_S_GOTOFF: | |
1cfc59d5 | 5859 | case BFD_RELOC_16_BASEREL: |
252b5132 RH |
5860 | case BFD_RELOC_LO16_BASEREL: |
5861 | case BFD_RELOC_HI16_BASEREL: | |
5862 | case BFD_RELOC_HI16_S_BASEREL: | |
5863 | case BFD_RELOC_PPC_EMB_NADDR16: | |
5864 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
5865 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
5866 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
5867 | case BFD_RELOC_PPC_EMB_SDAI16: | |
5868 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
5869 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
5870 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
5871 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
5872 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
5873 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
5874 | case BFD_RELOC_PPC_EMB_RELSDA: | |
5875 | case BFD_RELOC_PPC_TOC16: | |
0baf16f2 | 5876 | #ifdef OBJ_ELF |
0baf16f2 AM |
5877 | case BFD_RELOC_PPC64_TOC16_LO: |
5878 | case BFD_RELOC_PPC64_TOC16_HI: | |
5879 | case BFD_RELOC_PPC64_TOC16_HA: | |
0baf16f2 | 5880 | #endif |
94f592af | 5881 | if (fixP->fx_pcrel) |
252b5132 | 5882 | { |
94f592af NC |
5883 | if (fixP->fx_addsy != NULL) |
5884 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 | 5885 | _("cannot emit PC relative %s relocation against %s"), |
94f592af NC |
5886 | bfd_get_reloc_code_name (fixP->fx_r_type), |
5887 | S_GET_NAME (fixP->fx_addsy)); | |
252b5132 | 5888 | else |
94f592af | 5889 | as_bad_where (fixP->fx_file, fixP->fx_line, |
252b5132 | 5890 | _("cannot emit PC relative %s relocation"), |
94f592af | 5891 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
252b5132 RH |
5892 | } |
5893 | ||
94f592af | 5894 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
5895 | value, 2); |
5896 | break; | |
5897 | ||
3c9d25f4 AM |
5898 | case BFD_RELOC_16: |
5899 | if (fixP->fx_pcrel) | |
5900 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
5901 | /* fall through */ | |
5902 | ||
5903 | case BFD_RELOC_16_PCREL: | |
5904 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
5905 | value, 2); | |
5906 | break; | |
5907 | ||
5908 | case BFD_RELOC_LO16: | |
5909 | if (fixP->fx_pcrel) | |
5910 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
5911 | /* fall through */ | |
5912 | ||
5913 | case BFD_RELOC_LO16_PCREL: | |
5914 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
5915 | value, 2); | |
5916 | break; | |
5917 | ||
252b5132 RH |
5918 | /* This case happens when you write, for example, |
5919 | lis %r3,(L1-L2)@ha | |
5920 | where L1 and L2 are defined later. */ | |
5921 | case BFD_RELOC_HI16: | |
94f592af | 5922 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
5923 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; |
5924 | /* fall through */ | |
5925 | ||
5926 | case BFD_RELOC_HI16_PCREL: | |
94f592af | 5927 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 5928 | PPC_HI (value), 2); |
252b5132 | 5929 | break; |
0baf16f2 | 5930 | |
252b5132 | 5931 | case BFD_RELOC_HI16_S: |
94f592af | 5932 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
5933 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; |
5934 | /* fall through */ | |
5935 | ||
5936 | case BFD_RELOC_HI16_S_PCREL: | |
94f592af | 5937 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
5938 | PPC_HA (value), 2); |
5939 | break; | |
5940 | ||
5941 | #ifdef OBJ_ELF | |
0baf16f2 | 5942 | case BFD_RELOC_PPC64_HIGHER: |
94f592af | 5943 | if (fixP->fx_pcrel) |
0baf16f2 | 5944 | abort (); |
94f592af | 5945 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 5946 | PPC_HIGHER (value), 2); |
252b5132 RH |
5947 | break; |
5948 | ||
0baf16f2 | 5949 | case BFD_RELOC_PPC64_HIGHER_S: |
94f592af | 5950 | if (fixP->fx_pcrel) |
0baf16f2 | 5951 | abort (); |
94f592af | 5952 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
5953 | PPC_HIGHERA (value), 2); |
5954 | break; | |
5955 | ||
5956 | case BFD_RELOC_PPC64_HIGHEST: | |
94f592af | 5957 | if (fixP->fx_pcrel) |
0baf16f2 | 5958 | abort (); |
94f592af | 5959 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
5960 | PPC_HIGHEST (value), 2); |
5961 | break; | |
5962 | ||
5963 | case BFD_RELOC_PPC64_HIGHEST_S: | |
94f592af | 5964 | if (fixP->fx_pcrel) |
0baf16f2 | 5965 | abort (); |
94f592af | 5966 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
5967 | PPC_HIGHESTA (value), 2); |
5968 | break; | |
5969 | ||
5970 | case BFD_RELOC_PPC64_ADDR16_DS: | |
5971 | case BFD_RELOC_PPC64_ADDR16_LO_DS: | |
5972 | case BFD_RELOC_PPC64_GOT16_DS: | |
5973 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
5974 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
5975 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
5976 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
5977 | case BFD_RELOC_PPC64_TOC16_DS: | |
5978 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
5979 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
5980 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
94f592af | 5981 | if (fixP->fx_pcrel) |
0baf16f2 AM |
5982 | abort (); |
5983 | { | |
2132e3a3 | 5984 | char *where = fixP->fx_frag->fr_literal + fixP->fx_where; |
3d8aea2f | 5985 | unsigned long val, mask; |
0baf16f2 AM |
5986 | |
5987 | if (target_big_endian) | |
adadcc0c | 5988 | val = bfd_getb32 (where - 2); |
0baf16f2 | 5989 | else |
adadcc0c AM |
5990 | val = bfd_getl32 (where); |
5991 | mask = 0xfffc; | |
5992 | /* lq insns reserve the four lsbs. */ | |
5993 | if ((ppc_cpu & PPC_OPCODE_POWER4) != 0 | |
77a6138a | 5994 | && (val & (0x3f << 26)) == (56u << 26)) |
adadcc0c AM |
5995 | mask = 0xfff0; |
5996 | val |= value & mask; | |
0baf16f2 AM |
5997 | if (target_big_endian) |
5998 | bfd_putb16 ((bfd_vma) val, where); | |
5999 | else | |
6000 | bfd_putl16 ((bfd_vma) val, where); | |
6001 | } | |
6002 | break; | |
cdba85ec | 6003 | |
ba0b2174 AM |
6004 | case BFD_RELOC_PPC_B16_BRTAKEN: |
6005 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6006 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6007 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
6008 | break; | |
6009 | ||
cdba85ec | 6010 | case BFD_RELOC_PPC_TLS: |
7c1d0959 L |
6011 | break; |
6012 | ||
cdba85ec AM |
6013 | case BFD_RELOC_PPC_DTPMOD: |
6014 | case BFD_RELOC_PPC_TPREL16: | |
6015 | case BFD_RELOC_PPC_TPREL16_LO: | |
6016 | case BFD_RELOC_PPC_TPREL16_HI: | |
6017 | case BFD_RELOC_PPC_TPREL16_HA: | |
6018 | case BFD_RELOC_PPC_TPREL: | |
6019 | case BFD_RELOC_PPC_DTPREL16: | |
6020 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6021 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6022 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6023 | case BFD_RELOC_PPC_DTPREL: | |
6024 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6025 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6026 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6027 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6028 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6029 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6030 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6031 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6032 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6033 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6034 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6035 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6036 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6037 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6038 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6039 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6040 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6041 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
6042 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6043 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6044 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6045 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
6046 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
6047 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6048 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6049 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6050 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6051 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
7c1d0959 | 6052 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
cdba85ec | 6053 | break; |
0baf16f2 | 6054 | #endif |
252b5132 | 6055 | /* Because SDA21 modifies the register field, the size is set to 4 |
99a814a1 | 6056 | bytes, rather than 2, so offset it here appropriately. */ |
252b5132 | 6057 | case BFD_RELOC_PPC_EMB_SDA21: |
94f592af | 6058 | if (fixP->fx_pcrel) |
252b5132 RH |
6059 | abort (); |
6060 | ||
94f592af | 6061 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where |
252b5132 RH |
6062 | + ((target_big_endian) ? 2 : 0), |
6063 | value, 2); | |
6064 | break; | |
6065 | ||
6066 | case BFD_RELOC_8: | |
94f592af | 6067 | if (fixP->fx_pcrel) |
31a91399 NC |
6068 | { |
6069 | /* This can occur if there is a bug in the input assembler, eg: | |
b7d7dc63 | 6070 | ".byte <undefined_symbol> - ." */ |
31a91399 NC |
6071 | if (fixP->fx_addsy) |
6072 | as_bad (_("Unable to handle reference to symbol %s"), | |
6073 | S_GET_NAME (fixP->fx_addsy)); | |
6074 | else | |
6075 | as_bad (_("Unable to resolve expression")); | |
6076 | fixP->fx_done = 1; | |
6077 | } | |
6078 | else | |
6079 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6080 | value, 1); | |
252b5132 RH |
6081 | break; |
6082 | ||
6083 | case BFD_RELOC_24_PLT_PCREL: | |
6084 | case BFD_RELOC_PPC_LOCAL24PC: | |
94f592af | 6085 | if (!fixP->fx_pcrel && !fixP->fx_done) |
252b5132 RH |
6086 | abort (); |
6087 | ||
94f592af | 6088 | if (fixP->fx_done) |
99a814a1 AM |
6089 | { |
6090 | char *where; | |
6091 | unsigned long insn; | |
6092 | ||
6093 | /* Fetch the instruction, insert the fully resolved operand | |
6094 | value, and stuff the instruction back again. */ | |
94f592af | 6095 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
99a814a1 AM |
6096 | if (target_big_endian) |
6097 | insn = bfd_getb32 ((unsigned char *) where); | |
6098 | else | |
6099 | insn = bfd_getl32 ((unsigned char *) where); | |
6100 | if ((value & 3) != 0) | |
94f592af | 6101 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6102 | _("must branch to an address a multiple of 4")); |
6103 | if ((offsetT) value < -0x40000000 | |
6104 | || (offsetT) value >= 0x40000000) | |
94f592af | 6105 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6106 | _("@local or @plt branch destination is too far away, %ld bytes"), |
6107 | (long) value); | |
6108 | insn = insn | (value & 0x03fffffc); | |
6109 | if (target_big_endian) | |
6110 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6111 | else | |
6112 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6113 | } | |
252b5132 RH |
6114 | break; |
6115 | ||
6116 | case BFD_RELOC_VTABLE_INHERIT: | |
94f592af NC |
6117 | fixP->fx_done = 0; |
6118 | if (fixP->fx_addsy | |
6119 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6120 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6121 | S_SET_WEAK (fixP->fx_addsy); | |
252b5132 RH |
6122 | break; |
6123 | ||
6124 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6125 | fixP->fx_done = 0; |
252b5132 RH |
6126 | break; |
6127 | ||
0baf16f2 | 6128 | #ifdef OBJ_ELF |
0baf16f2 AM |
6129 | /* Generated by reference to `sym@tocbase'. The sym is |
6130 | ignored by the linker. */ | |
6131 | case BFD_RELOC_PPC64_TOC: | |
94f592af | 6132 | fixP->fx_done = 0; |
0baf16f2 | 6133 | break; |
0baf16f2 | 6134 | #endif |
252b5132 | 6135 | default: |
bc805888 | 6136 | fprintf (stderr, |
94f592af | 6137 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6138 | fflush (stderr); |
252b5132 RH |
6139 | abort (); |
6140 | } | |
6141 | } | |
6142 | ||
6143 | #ifdef OBJ_ELF | |
94f592af | 6144 | fixP->fx_addnumber = value; |
4e6935a6 AM |
6145 | |
6146 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
6147 | from the section contents. If we are going to be emitting a reloc | |
6148 | then the section contents are immaterial, so don't warn if they | |
6149 | happen to overflow. Leave such warnings to ld. */ | |
6150 | if (!fixP->fx_done) | |
6151 | fixP->fx_no_overflow = 1; | |
252b5132 | 6152 | #else |
94f592af NC |
6153 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
6154 | fixP->fx_addnumber = 0; | |
252b5132 RH |
6155 | else |
6156 | { | |
6157 | #ifdef TE_PE | |
94f592af | 6158 | fixP->fx_addnumber = 0; |
252b5132 RH |
6159 | #else |
6160 | /* We want to use the offset within the data segment of the | |
6161 | symbol, not the actual VMA of the symbol. */ | |
94f592af NC |
6162 | fixP->fx_addnumber = |
6163 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)); | |
252b5132 RH |
6164 | #endif |
6165 | } | |
6166 | #endif | |
252b5132 RH |
6167 | } |
6168 | ||
6169 | /* Generate a reloc for a fixup. */ | |
6170 | ||
6171 | arelent * | |
6172 | tc_gen_reloc (seg, fixp) | |
92161534 | 6173 | asection *seg ATTRIBUTE_UNUSED; |
252b5132 RH |
6174 | fixS *fixp; |
6175 | { | |
6176 | arelent *reloc; | |
6177 | ||
6178 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
6179 | ||
49309057 ILT |
6180 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
6181 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
6182 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
6183 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
6184 | if (reloc->howto == (reloc_howto_type *) NULL) | |
6185 | { | |
6186 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
6187 | _("reloc %d not supported by object file format"), |
6188 | (int) fixp->fx_r_type); | |
252b5132 RH |
6189 | return NULL; |
6190 | } | |
6191 | reloc->addend = fixp->fx_addnumber; | |
6192 | ||
6193 | return reloc; | |
6194 | } | |
75e21f08 JJ |
6195 | |
6196 | void | |
6197 | ppc_cfi_frame_initial_instructions () | |
6198 | { | |
6199 | cfi_add_CFA_def_cfa (1, 0); | |
6200 | } | |
6201 | ||
6202 | int | |
1df69f4f | 6203 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
6204 | { |
6205 | unsigned int regnum = -1; | |
6206 | unsigned int i; | |
6207 | const char *p; | |
6208 | char *q; | |
6209 | static struct { char *name; int dw2regnum; } regnames[] = | |
6210 | { | |
6211 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
6212 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 6213 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
6214 | { "spe_acc", 111 }, { "spefscr", 112 } |
6215 | }; | |
6216 | ||
6217 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
6218 | if (strcmp (regnames[i].name, regname) == 0) | |
6219 | return regnames[i].dw2regnum; | |
6220 | ||
6221 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
6222 | { | |
6223 | p = regname + 1 + (regname[1] == '.'); | |
6224 | regnum = strtoul (p, &q, 10); | |
6225 | if (p == q || *q || regnum >= 32) | |
6226 | return -1; | |
6227 | if (regname[0] == 'f') | |
b7d7dc63 | 6228 | regnum += 32; |
75e21f08 | 6229 | else if (regname[0] == 'v') |
b7d7dc63 | 6230 | regnum += 77; |
75e21f08 JJ |
6231 | } |
6232 | else if (regname[0] == 'c' && regname[1] == 'r') | |
6233 | { | |
6234 | p = regname + 2 + (regname[2] == '.'); | |
6235 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 6236 | return -1; |
75e21f08 JJ |
6237 | regnum = p[0] - '0' + 68; |
6238 | } | |
6239 | return regnum; | |
6240 | } |