Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
b7d7dc63 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
aea77599 | 3 | 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
cc643b88 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Written by Ian Lance Taylor, Cygnus Support. |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
21 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
22 | 02110-1301, USA. */ | |
252b5132 | 23 | |
252b5132 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
252b5132 | 26 | #include "subsegs.h" |
75e21f08 | 27 | #include "dw2gencfi.h" |
252b5132 RH |
28 | #include "opcode/ppc.h" |
29 | ||
30 | #ifdef OBJ_ELF | |
31 | #include "elf/ppc.h" | |
5d6f4f16 | 32 | #include "dwarf2dbg.h" |
252b5132 RH |
33 | #endif |
34 | ||
35 | #ifdef TE_PE | |
36 | #include "coff/pe.h" | |
37 | #endif | |
38 | ||
85645aed TG |
39 | #ifdef OBJ_XCOFF |
40 | #include "coff/xcoff.h" | |
41 | #include "libxcoff.h" | |
42 | #endif | |
43 | ||
252b5132 RH |
44 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ |
45 | ||
46 | /* Tell the main code what the endianness is. */ | |
47 | extern int target_big_endian; | |
48 | ||
49 | /* Whether or not, we've set target_big_endian. */ | |
50 | static int set_target_endian = 0; | |
51 | ||
52 | /* Whether to use user friendly register names. */ | |
53 | #ifndef TARGET_REG_NAMES_P | |
54 | #ifdef TE_PE | |
b34976b6 | 55 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 56 | #else |
b34976b6 | 57 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
58 | #endif |
59 | #endif | |
60 | ||
0baf16f2 AM |
61 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
62 | HIGHESTA. */ | |
63 | ||
64 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
65 | #define PPC_LO(v) ((v) & 0xffff) | |
66 | ||
b9c361e0 JL |
67 | /* Split the indicated value with the msbs in bits 11-15 |
68 | and the lsbs in bits 21-31. */ | |
69 | #define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff) | |
70 | ||
71 | /* Split the indicated value with the msbs in bits 6-10 | |
72 | and the lsbs in bits 21-31. */ | |
73 | #define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff) | |
74 | ||
75 | /* #lo(value) denotes the lsb 16 bits in split16a format. */ | |
76 | #define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v)) | |
77 | ||
78 | /* #lo(value) denotes the lsb 16 bits in split16d format. */ | |
79 | #define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v)) | |
80 | ||
0baf16f2 AM |
81 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ |
82 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
83 | ||
b9c361e0 JL |
84 | /* #lo(value) denotes the msb 16 bits in split16a format. */ |
85 | #define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v)) | |
86 | ||
87 | /* #lo(value) denotes the msb 16 bits in split16d format. */ | |
88 | #define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v)) | |
89 | ||
0baf16f2 AM |
90 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of |
91 | the indicated value, compensating for #lo() being treated as a | |
92 | signed number. */ | |
15c1449b | 93 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 | 94 | |
b9c361e0 JL |
95 | /* #ha(value) denotes the high adjusted value in split16a format. */ |
96 | #define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v)) | |
97 | ||
98 | /* #ha(value) denotes the high adjusted value in split16d format. */ | |
99 | #define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v)) | |
100 | ||
0baf16f2 | 101 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ |
2a98c3a6 | 102 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
103 | |
104 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
105 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 106 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
107 | |
108 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 109 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
110 | |
111 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
112 | compensating for #lo being treated as a signed number. */ |
113 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 AM |
114 | |
115 | #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) | |
116 | ||
b34976b6 | 117 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 118 | |
98027b10 AM |
119 | static void ppc_macro (char *, const struct powerpc_macro *); |
120 | static void ppc_byte (int); | |
0baf16f2 AM |
121 | |
122 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
123 | static void ppc_tc (int); |
124 | static void ppc_machine (int); | |
0baf16f2 | 125 | #endif |
252b5132 RH |
126 | |
127 | #ifdef OBJ_XCOFF | |
98027b10 AM |
128 | static void ppc_comm (int); |
129 | static void ppc_bb (int); | |
130 | static void ppc_bc (int); | |
131 | static void ppc_bf (int); | |
132 | static void ppc_biei (int); | |
133 | static void ppc_bs (int); | |
134 | static void ppc_eb (int); | |
135 | static void ppc_ec (int); | |
136 | static void ppc_ef (int); | |
137 | static void ppc_es (int); | |
138 | static void ppc_csect (int); | |
85645aed | 139 | static void ppc_dwsect (int); |
98027b10 AM |
140 | static void ppc_change_csect (symbolS *, offsetT); |
141 | static void ppc_function (int); | |
142 | static void ppc_extern (int); | |
143 | static void ppc_lglobl (int); | |
c865e45b | 144 | static void ppc_ref (int); |
98027b10 AM |
145 | static void ppc_section (int); |
146 | static void ppc_named_section (int); | |
147 | static void ppc_stabx (int); | |
148 | static void ppc_rename (int); | |
149 | static void ppc_toc (int); | |
150 | static void ppc_xcoff_cons (int); | |
151 | static void ppc_vbyte (int); | |
252b5132 RH |
152 | #endif |
153 | ||
154 | #ifdef OBJ_ELF | |
98027b10 AM |
155 | static void ppc_elf_cons (int); |
156 | static void ppc_elf_rdata (int); | |
157 | static void ppc_elf_lcomm (int); | |
252b5132 RH |
158 | #endif |
159 | ||
160 | #ifdef TE_PE | |
98027b10 AM |
161 | static void ppc_previous (int); |
162 | static void ppc_pdata (int); | |
163 | static void ppc_ydata (int); | |
164 | static void ppc_reldata (int); | |
165 | static void ppc_rdata (int); | |
166 | static void ppc_ualong (int); | |
167 | static void ppc_znop (int); | |
168 | static void ppc_pe_comm (int); | |
169 | static void ppc_pe_section (int); | |
170 | static void ppc_pe_function (int); | |
171 | static void ppc_pe_tocd (int); | |
252b5132 RH |
172 | #endif |
173 | \f | |
174 | /* Generic assembler global variables which must be defined by all | |
175 | targets. */ | |
176 | ||
177 | #ifdef OBJ_ELF | |
178 | /* This string holds the chars that always start a comment. If the | |
179 | pre-processor is disabled, these aren't very useful. The macro | |
180 | tc_comment_chars points to this. We use this, rather than the | |
181 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
182 | static const char ppc_solaris_comment_chars[] = "#!"; | |
183 | static const char ppc_eabi_comment_chars[] = "#"; | |
184 | ||
185 | #ifdef TARGET_SOLARIS_COMMENT | |
186 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
187 | #else | |
188 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
189 | #endif | |
190 | #else | |
191 | const char comment_chars[] = "#"; | |
192 | #endif | |
193 | ||
194 | /* Characters which start a comment at the beginning of a line. */ | |
195 | const char line_comment_chars[] = "#"; | |
196 | ||
197 | /* Characters which may be used to separate multiple commands on a | |
198 | single line. */ | |
199 | const char line_separator_chars[] = ";"; | |
200 | ||
201 | /* Characters which are used to indicate an exponent in a floating | |
202 | point number. */ | |
203 | const char EXP_CHARS[] = "eE"; | |
204 | ||
205 | /* Characters which mean that a number is a floating point constant, | |
206 | as in 0d1.0. */ | |
207 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 208 | |
5e02f92e | 209 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 210 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 211 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
212 | |
213 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
214 | int ppc_cie_data_alignment; | |
783de163 | 215 | |
cef4f754 AM |
216 | /* More than this number of nops in an alignment op gets a branch |
217 | instead. */ | |
218 | unsigned long nop_limit = 4; | |
219 | ||
783de163 AM |
220 | /* The type of processor we are assembling for. This is one or more |
221 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 222 | ppc_cpu_t ppc_cpu = 0; |
01efc3af AM |
223 | |
224 | /* Flags set on encountering toc relocs. */ | |
225 | enum { | |
226 | has_large_toc_reloc = 1, | |
227 | has_small_toc_reloc = 2 | |
228 | } toc_reloc_types; | |
252b5132 RH |
229 | \f |
230 | /* The target specific pseudo-ops which we support. */ | |
231 | ||
232 | const pseudo_typeS md_pseudo_table[] = | |
233 | { | |
234 | /* Pseudo-ops which must be overridden. */ | |
235 | { "byte", ppc_byte, 0 }, | |
236 | ||
237 | #ifdef OBJ_XCOFF | |
238 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
239 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
240 | on COFF, and is only implemented for the RS/6000. We just use | |
241 | obj-coff.c, and add what we need here. */ | |
242 | { "comm", ppc_comm, 0 }, | |
243 | { "lcomm", ppc_comm, 1 }, | |
244 | { "bb", ppc_bb, 0 }, | |
245 | { "bc", ppc_bc, 0 }, | |
246 | { "bf", ppc_bf, 0 }, | |
247 | { "bi", ppc_biei, 0 }, | |
248 | { "bs", ppc_bs, 0 }, | |
249 | { "csect", ppc_csect, 0 }, | |
85645aed | 250 | { "dwsect", ppc_dwsect, 0 }, |
252b5132 RH |
251 | { "data", ppc_section, 'd' }, |
252 | { "eb", ppc_eb, 0 }, | |
253 | { "ec", ppc_ec, 0 }, | |
254 | { "ef", ppc_ef, 0 }, | |
255 | { "ei", ppc_biei, 1 }, | |
256 | { "es", ppc_es, 0 }, | |
257 | { "extern", ppc_extern, 0 }, | |
258 | { "function", ppc_function, 0 }, | |
259 | { "lglobl", ppc_lglobl, 0 }, | |
c865e45b | 260 | { "ref", ppc_ref, 0 }, |
252b5132 RH |
261 | { "rename", ppc_rename, 0 }, |
262 | { "section", ppc_named_section, 0 }, | |
263 | { "stabx", ppc_stabx, 0 }, | |
264 | { "text", ppc_section, 't' }, | |
265 | { "toc", ppc_toc, 0 }, | |
266 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 267 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
268 | { "word", ppc_xcoff_cons, 1 }, |
269 | { "short", ppc_xcoff_cons, 1 }, | |
270 | { "vbyte", ppc_vbyte, 0 }, | |
271 | #endif | |
272 | ||
273 | #ifdef OBJ_ELF | |
0baf16f2 AM |
274 | { "llong", ppc_elf_cons, 8 }, |
275 | { "quad", ppc_elf_cons, 8 }, | |
252b5132 RH |
276 | { "long", ppc_elf_cons, 4 }, |
277 | { "word", ppc_elf_cons, 2 }, | |
278 | { "short", ppc_elf_cons, 2 }, | |
279 | { "rdata", ppc_elf_rdata, 0 }, | |
280 | { "rodata", ppc_elf_rdata, 0 }, | |
281 | { "lcomm", ppc_elf_lcomm, 0 }, | |
282 | #endif | |
283 | ||
284 | #ifdef TE_PE | |
99a814a1 | 285 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
286 | { "previous", ppc_previous, 0 }, |
287 | { "pdata", ppc_pdata, 0 }, | |
288 | { "ydata", ppc_ydata, 0 }, | |
289 | { "reldata", ppc_reldata, 0 }, | |
290 | { "rdata", ppc_rdata, 0 }, | |
291 | { "ualong", ppc_ualong, 0 }, | |
292 | { "znop", ppc_znop, 0 }, | |
293 | { "comm", ppc_pe_comm, 0 }, | |
294 | { "lcomm", ppc_pe_comm, 1 }, | |
295 | { "section", ppc_pe_section, 0 }, | |
296 | { "function", ppc_pe_function,0 }, | |
297 | { "tocd", ppc_pe_tocd, 0 }, | |
298 | #endif | |
299 | ||
0baf16f2 | 300 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 301 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
302 | { "machine", ppc_machine, 0 }, |
303 | #endif | |
252b5132 RH |
304 | |
305 | { NULL, NULL, 0 } | |
306 | }; | |
307 | ||
308 | \f | |
99a814a1 AM |
309 | /* Predefined register names if -mregnames (or default for Windows NT). |
310 | In general, there are lots of them, in an attempt to be compatible | |
311 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
312 | |
313 | /* Structure to hold information about predefined registers. */ | |
314 | struct pd_reg | |
315 | { | |
316 | char *name; | |
317 | int value; | |
318 | }; | |
319 | ||
320 | /* List of registers that are pre-defined: | |
321 | ||
322 | Each general register has predefined names of the form: | |
323 | 1. r<reg_num> which has the value <reg_num>. | |
324 | 2. r.<reg_num> which has the value <reg_num>. | |
325 | ||
252b5132 RH |
326 | Each floating point register has predefined names of the form: |
327 | 1. f<reg_num> which has the value <reg_num>. | |
328 | 2. f.<reg_num> which has the value <reg_num>. | |
329 | ||
7a899fff C |
330 | Each vector unit register has predefined names of the form: |
331 | 1. v<reg_num> which has the value <reg_num>. | |
332 | 2. v.<reg_num> which has the value <reg_num>. | |
333 | ||
252b5132 RH |
334 | Each condition register has predefined names of the form: |
335 | 1. cr<reg_num> which has the value <reg_num>. | |
336 | 2. cr.<reg_num> which has the value <reg_num>. | |
337 | ||
338 | There are individual registers as well: | |
339 | sp or r.sp has the value 1 | |
340 | rtoc or r.toc has the value 2 | |
341 | fpscr has the value 0 | |
342 | xer has the value 1 | |
343 | lr has the value 8 | |
344 | ctr has the value 9 | |
345 | pmr has the value 0 | |
346 | dar has the value 19 | |
347 | dsisr has the value 18 | |
348 | dec has the value 22 | |
349 | sdr1 has the value 25 | |
350 | srr0 has the value 26 | |
351 | srr1 has the value 27 | |
352 | ||
81d4177b | 353 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
354 | |
355 | static const struct pd_reg pre_defined_registers[] = | |
356 | { | |
357 | { "cr.0", 0 }, /* Condition Registers */ | |
358 | { "cr.1", 1 }, | |
359 | { "cr.2", 2 }, | |
360 | { "cr.3", 3 }, | |
361 | { "cr.4", 4 }, | |
362 | { "cr.5", 5 }, | |
363 | { "cr.6", 6 }, | |
364 | { "cr.7", 7 }, | |
365 | ||
366 | { "cr0", 0 }, | |
367 | { "cr1", 1 }, | |
368 | { "cr2", 2 }, | |
369 | { "cr3", 3 }, | |
370 | { "cr4", 4 }, | |
371 | { "cr5", 5 }, | |
372 | { "cr6", 6 }, | |
373 | { "cr7", 7 }, | |
374 | ||
375 | { "ctr", 9 }, | |
376 | ||
377 | { "dar", 19 }, /* Data Access Register */ | |
378 | { "dec", 22 }, /* Decrementer */ | |
379 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
380 | ||
381 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
382 | { "f.1", 1 }, |
383 | { "f.10", 10 }, | |
384 | { "f.11", 11 }, | |
385 | { "f.12", 12 }, | |
386 | { "f.13", 13 }, | |
387 | { "f.14", 14 }, | |
388 | { "f.15", 15 }, | |
389 | { "f.16", 16 }, | |
390 | { "f.17", 17 }, | |
391 | { "f.18", 18 }, | |
392 | { "f.19", 19 }, | |
393 | { "f.2", 2 }, | |
394 | { "f.20", 20 }, | |
395 | { "f.21", 21 }, | |
396 | { "f.22", 22 }, | |
397 | { "f.23", 23 }, | |
398 | { "f.24", 24 }, | |
399 | { "f.25", 25 }, | |
400 | { "f.26", 26 }, | |
401 | { "f.27", 27 }, | |
402 | { "f.28", 28 }, | |
403 | { "f.29", 29 }, | |
404 | { "f.3", 3 }, | |
252b5132 RH |
405 | { "f.30", 30 }, |
406 | { "f.31", 31 }, | |
066be9f7 PB |
407 | |
408 | { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
409 | { "f.33", 33 }, | |
410 | { "f.34", 34 }, | |
411 | { "f.35", 35 }, | |
412 | { "f.36", 36 }, | |
413 | { "f.37", 37 }, | |
414 | { "f.38", 38 }, | |
415 | { "f.39", 39 }, | |
81d4177b | 416 | { "f.4", 4 }, |
066be9f7 PB |
417 | { "f.40", 40 }, |
418 | { "f.41", 41 }, | |
419 | { "f.42", 42 }, | |
420 | { "f.43", 43 }, | |
421 | { "f.44", 44 }, | |
422 | { "f.45", 45 }, | |
423 | { "f.46", 46 }, | |
424 | { "f.47", 47 }, | |
425 | { "f.48", 48 }, | |
426 | { "f.49", 49 }, | |
81d4177b | 427 | { "f.5", 5 }, |
066be9f7 PB |
428 | { "f.50", 50 }, |
429 | { "f.51", 51 }, | |
430 | { "f.52", 52 }, | |
431 | { "f.53", 53 }, | |
432 | { "f.54", 54 }, | |
433 | { "f.55", 55 }, | |
434 | { "f.56", 56 }, | |
435 | { "f.57", 57 }, | |
436 | { "f.58", 58 }, | |
437 | { "f.59", 59 }, | |
81d4177b | 438 | { "f.6", 6 }, |
066be9f7 PB |
439 | { "f.60", 60 }, |
440 | { "f.61", 61 }, | |
441 | { "f.62", 62 }, | |
442 | { "f.63", 63 }, | |
81d4177b KH |
443 | { "f.7", 7 }, |
444 | { "f.8", 8 }, | |
445 | { "f.9", 9 }, | |
446 | ||
447 | { "f0", 0 }, | |
448 | { "f1", 1 }, | |
449 | { "f10", 10 }, | |
450 | { "f11", 11 }, | |
451 | { "f12", 12 }, | |
452 | { "f13", 13 }, | |
453 | { "f14", 14 }, | |
454 | { "f15", 15 }, | |
455 | { "f16", 16 }, | |
456 | { "f17", 17 }, | |
457 | { "f18", 18 }, | |
458 | { "f19", 19 }, | |
459 | { "f2", 2 }, | |
460 | { "f20", 20 }, | |
461 | { "f21", 21 }, | |
462 | { "f22", 22 }, | |
463 | { "f23", 23 }, | |
464 | { "f24", 24 }, | |
465 | { "f25", 25 }, | |
466 | { "f26", 26 }, | |
467 | { "f27", 27 }, | |
468 | { "f28", 28 }, | |
469 | { "f29", 29 }, | |
470 | { "f3", 3 }, | |
252b5132 RH |
471 | { "f30", 30 }, |
472 | { "f31", 31 }, | |
066be9f7 PB |
473 | |
474 | { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
475 | { "f33", 33 }, | |
476 | { "f34", 34 }, | |
477 | { "f35", 35 }, | |
478 | { "f36", 36 }, | |
479 | { "f37", 37 }, | |
480 | { "f38", 38 }, | |
481 | { "f39", 39 }, | |
81d4177b | 482 | { "f4", 4 }, |
066be9f7 PB |
483 | { "f40", 40 }, |
484 | { "f41", 41 }, | |
485 | { "f42", 42 }, | |
486 | { "f43", 43 }, | |
487 | { "f44", 44 }, | |
488 | { "f45", 45 }, | |
489 | { "f46", 46 }, | |
490 | { "f47", 47 }, | |
491 | { "f48", 48 }, | |
492 | { "f49", 49 }, | |
81d4177b | 493 | { "f5", 5 }, |
066be9f7 PB |
494 | { "f50", 50 }, |
495 | { "f51", 51 }, | |
496 | { "f52", 52 }, | |
497 | { "f53", 53 }, | |
498 | { "f54", 54 }, | |
499 | { "f55", 55 }, | |
500 | { "f56", 56 }, | |
501 | { "f57", 57 }, | |
502 | { "f58", 58 }, | |
503 | { "f59", 59 }, | |
81d4177b | 504 | { "f6", 6 }, |
066be9f7 PB |
505 | { "f60", 60 }, |
506 | { "f61", 61 }, | |
507 | { "f62", 62 }, | |
508 | { "f63", 63 }, | |
81d4177b KH |
509 | { "f7", 7 }, |
510 | { "f8", 8 }, | |
511 | { "f9", 9 }, | |
252b5132 RH |
512 | |
513 | { "fpscr", 0 }, | |
514 | ||
c3d65c1c BE |
515 | /* Quantization registers used with pair single instructions. */ |
516 | { "gqr.0", 0 }, | |
517 | { "gqr.1", 1 }, | |
518 | { "gqr.2", 2 }, | |
519 | { "gqr.3", 3 }, | |
520 | { "gqr.4", 4 }, | |
521 | { "gqr.5", 5 }, | |
522 | { "gqr.6", 6 }, | |
523 | { "gqr.7", 7 }, | |
524 | { "gqr0", 0 }, | |
525 | { "gqr1", 1 }, | |
526 | { "gqr2", 2 }, | |
527 | { "gqr3", 3 }, | |
528 | { "gqr4", 4 }, | |
529 | { "gqr5", 5 }, | |
530 | { "gqr6", 6 }, | |
531 | { "gqr7", 7 }, | |
532 | ||
252b5132 RH |
533 | { "lr", 8 }, /* Link Register */ |
534 | ||
535 | { "pmr", 0 }, | |
536 | ||
537 | { "r.0", 0 }, /* General Purpose Registers */ | |
538 | { "r.1", 1 }, | |
539 | { "r.10", 10 }, | |
540 | { "r.11", 11 }, | |
541 | { "r.12", 12 }, | |
542 | { "r.13", 13 }, | |
543 | { "r.14", 14 }, | |
544 | { "r.15", 15 }, | |
545 | { "r.16", 16 }, | |
546 | { "r.17", 17 }, | |
547 | { "r.18", 18 }, | |
548 | { "r.19", 19 }, | |
549 | { "r.2", 2 }, | |
550 | { "r.20", 20 }, | |
551 | { "r.21", 21 }, | |
552 | { "r.22", 22 }, | |
553 | { "r.23", 23 }, | |
554 | { "r.24", 24 }, | |
555 | { "r.25", 25 }, | |
556 | { "r.26", 26 }, | |
557 | { "r.27", 27 }, | |
558 | { "r.28", 28 }, | |
559 | { "r.29", 29 }, | |
560 | { "r.3", 3 }, | |
561 | { "r.30", 30 }, | |
562 | { "r.31", 31 }, | |
563 | { "r.4", 4 }, | |
564 | { "r.5", 5 }, | |
565 | { "r.6", 6 }, | |
566 | { "r.7", 7 }, | |
567 | { "r.8", 8 }, | |
568 | { "r.9", 9 }, | |
569 | ||
570 | { "r.sp", 1 }, /* Stack Pointer */ | |
571 | ||
572 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
573 | ||
574 | { "r0", 0 }, /* More general purpose registers */ | |
575 | { "r1", 1 }, | |
576 | { "r10", 10 }, | |
577 | { "r11", 11 }, | |
578 | { "r12", 12 }, | |
579 | { "r13", 13 }, | |
580 | { "r14", 14 }, | |
581 | { "r15", 15 }, | |
582 | { "r16", 16 }, | |
583 | { "r17", 17 }, | |
584 | { "r18", 18 }, | |
585 | { "r19", 19 }, | |
586 | { "r2", 2 }, | |
587 | { "r20", 20 }, | |
588 | { "r21", 21 }, | |
589 | { "r22", 22 }, | |
590 | { "r23", 23 }, | |
591 | { "r24", 24 }, | |
592 | { "r25", 25 }, | |
593 | { "r26", 26 }, | |
594 | { "r27", 27 }, | |
595 | { "r28", 28 }, | |
596 | { "r29", 29 }, | |
597 | { "r3", 3 }, | |
598 | { "r30", 30 }, | |
599 | { "r31", 31 }, | |
600 | { "r4", 4 }, | |
601 | { "r5", 5 }, | |
602 | { "r6", 6 }, | |
603 | { "r7", 7 }, | |
604 | { "r8", 8 }, | |
605 | { "r9", 9 }, | |
606 | ||
607 | { "rtoc", 2 }, /* Table of contents */ | |
608 | ||
609 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
610 | ||
611 | { "sp", 1 }, | |
612 | ||
613 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
614 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 615 | |
066be9f7 | 616 | { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ |
81d4177b KH |
617 | { "v.1", 1 }, |
618 | { "v.10", 10 }, | |
619 | { "v.11", 11 }, | |
620 | { "v.12", 12 }, | |
621 | { "v.13", 13 }, | |
622 | { "v.14", 14 }, | |
623 | { "v.15", 15 }, | |
624 | { "v.16", 16 }, | |
625 | { "v.17", 17 }, | |
626 | { "v.18", 18 }, | |
627 | { "v.19", 19 }, | |
628 | { "v.2", 2 }, | |
629 | { "v.20", 20 }, | |
630 | { "v.21", 21 }, | |
631 | { "v.22", 22 }, | |
632 | { "v.23", 23 }, | |
633 | { "v.24", 24 }, | |
634 | { "v.25", 25 }, | |
635 | { "v.26", 26 }, | |
636 | { "v.27", 27 }, | |
637 | { "v.28", 28 }, | |
638 | { "v.29", 29 }, | |
639 | { "v.3", 3 }, | |
7a899fff C |
640 | { "v.30", 30 }, |
641 | { "v.31", 31 }, | |
81d4177b KH |
642 | { "v.4", 4 }, |
643 | { "v.5", 5 }, | |
644 | { "v.6", 6 }, | |
645 | { "v.7", 7 }, | |
646 | { "v.8", 8 }, | |
647 | { "v.9", 9 }, | |
7a899fff C |
648 | |
649 | { "v0", 0 }, | |
81d4177b KH |
650 | { "v1", 1 }, |
651 | { "v10", 10 }, | |
652 | { "v11", 11 }, | |
653 | { "v12", 12 }, | |
654 | { "v13", 13 }, | |
655 | { "v14", 14 }, | |
656 | { "v15", 15 }, | |
657 | { "v16", 16 }, | |
658 | { "v17", 17 }, | |
659 | { "v18", 18 }, | |
660 | { "v19", 19 }, | |
661 | { "v2", 2 }, | |
662 | { "v20", 20 }, | |
663 | { "v21", 21 }, | |
664 | { "v22", 22 }, | |
665 | { "v23", 23 }, | |
666 | { "v24", 24 }, | |
667 | { "v25", 25 }, | |
668 | { "v26", 26 }, | |
669 | { "v27", 27 }, | |
670 | { "v28", 28 }, | |
671 | { "v29", 29 }, | |
672 | { "v3", 3 }, | |
7a899fff C |
673 | { "v30", 30 }, |
674 | { "v31", 31 }, | |
81d4177b KH |
675 | { "v4", 4 }, |
676 | { "v5", 5 }, | |
677 | { "v6", 6 }, | |
678 | { "v7", 7 }, | |
679 | { "v8", 8 }, | |
7a899fff | 680 | { "v9", 9 }, |
252b5132 | 681 | |
066be9f7 PB |
682 | { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ |
683 | { "vs.1", 1 }, | |
684 | { "vs.10", 10 }, | |
685 | { "vs.11", 11 }, | |
686 | { "vs.12", 12 }, | |
687 | { "vs.13", 13 }, | |
688 | { "vs.14", 14 }, | |
689 | { "vs.15", 15 }, | |
690 | { "vs.16", 16 }, | |
691 | { "vs.17", 17 }, | |
692 | { "vs.18", 18 }, | |
693 | { "vs.19", 19 }, | |
694 | { "vs.2", 2 }, | |
695 | { "vs.20", 20 }, | |
696 | { "vs.21", 21 }, | |
697 | { "vs.22", 22 }, | |
698 | { "vs.23", 23 }, | |
699 | { "vs.24", 24 }, | |
700 | { "vs.25", 25 }, | |
701 | { "vs.26", 26 }, | |
702 | { "vs.27", 27 }, | |
703 | { "vs.28", 28 }, | |
704 | { "vs.29", 29 }, | |
705 | { "vs.3", 3 }, | |
706 | { "vs.30", 30 }, | |
707 | { "vs.31", 31 }, | |
708 | { "vs.32", 32 }, | |
709 | { "vs.33", 33 }, | |
710 | { "vs.34", 34 }, | |
711 | { "vs.35", 35 }, | |
712 | { "vs.36", 36 }, | |
713 | { "vs.37", 37 }, | |
714 | { "vs.38", 38 }, | |
715 | { "vs.39", 39 }, | |
716 | { "vs.4", 4 }, | |
717 | { "vs.40", 40 }, | |
718 | { "vs.41", 41 }, | |
719 | { "vs.42", 42 }, | |
720 | { "vs.43", 43 }, | |
721 | { "vs.44", 44 }, | |
722 | { "vs.45", 45 }, | |
723 | { "vs.46", 46 }, | |
724 | { "vs.47", 47 }, | |
725 | { "vs.48", 48 }, | |
726 | { "vs.49", 49 }, | |
727 | { "vs.5", 5 }, | |
728 | { "vs.50", 50 }, | |
729 | { "vs.51", 51 }, | |
730 | { "vs.52", 52 }, | |
731 | { "vs.53", 53 }, | |
732 | { "vs.54", 54 }, | |
733 | { "vs.55", 55 }, | |
734 | { "vs.56", 56 }, | |
735 | { "vs.57", 57 }, | |
736 | { "vs.58", 58 }, | |
737 | { "vs.59", 59 }, | |
738 | { "vs.6", 6 }, | |
739 | { "vs.60", 60 }, | |
740 | { "vs.61", 61 }, | |
741 | { "vs.62", 62 }, | |
742 | { "vs.63", 63 }, | |
743 | { "vs.7", 7 }, | |
744 | { "vs.8", 8 }, | |
745 | { "vs.9", 9 }, | |
746 | ||
747 | { "vs0", 0 }, | |
748 | { "vs1", 1 }, | |
749 | { "vs10", 10 }, | |
750 | { "vs11", 11 }, | |
751 | { "vs12", 12 }, | |
752 | { "vs13", 13 }, | |
753 | { "vs14", 14 }, | |
754 | { "vs15", 15 }, | |
755 | { "vs16", 16 }, | |
756 | { "vs17", 17 }, | |
757 | { "vs18", 18 }, | |
758 | { "vs19", 19 }, | |
759 | { "vs2", 2 }, | |
760 | { "vs20", 20 }, | |
761 | { "vs21", 21 }, | |
762 | { "vs22", 22 }, | |
763 | { "vs23", 23 }, | |
764 | { "vs24", 24 }, | |
765 | { "vs25", 25 }, | |
766 | { "vs26", 26 }, | |
767 | { "vs27", 27 }, | |
768 | { "vs28", 28 }, | |
769 | { "vs29", 29 }, | |
770 | { "vs3", 3 }, | |
771 | { "vs30", 30 }, | |
772 | { "vs31", 31 }, | |
773 | { "vs32", 32 }, | |
774 | { "vs33", 33 }, | |
775 | { "vs34", 34 }, | |
776 | { "vs35", 35 }, | |
777 | { "vs36", 36 }, | |
778 | { "vs37", 37 }, | |
779 | { "vs38", 38 }, | |
780 | { "vs39", 39 }, | |
781 | { "vs4", 4 }, | |
782 | { "vs40", 40 }, | |
783 | { "vs41", 41 }, | |
784 | { "vs42", 42 }, | |
785 | { "vs43", 43 }, | |
786 | { "vs44", 44 }, | |
787 | { "vs45", 45 }, | |
788 | { "vs46", 46 }, | |
789 | { "vs47", 47 }, | |
790 | { "vs48", 48 }, | |
791 | { "vs49", 49 }, | |
792 | { "vs5", 5 }, | |
793 | { "vs50", 50 }, | |
794 | { "vs51", 51 }, | |
795 | { "vs52", 52 }, | |
796 | { "vs53", 53 }, | |
797 | { "vs54", 54 }, | |
798 | { "vs55", 55 }, | |
799 | { "vs56", 56 }, | |
800 | { "vs57", 57 }, | |
801 | { "vs58", 58 }, | |
802 | { "vs59", 59 }, | |
803 | { "vs6", 6 }, | |
804 | { "vs60", 60 }, | |
805 | { "vs61", 61 }, | |
806 | { "vs62", 62 }, | |
807 | { "vs63", 63 }, | |
808 | { "vs7", 7 }, | |
809 | { "vs8", 8 }, | |
810 | { "vs9", 9 }, | |
811 | ||
252b5132 RH |
812 | { "xer", 1 }, |
813 | ||
814 | }; | |
815 | ||
bc805888 | 816 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
817 | |
818 | /* Given NAME, find the register number associated with that name, return | |
819 | the integer value associated with the given name or -1 on failure. */ | |
820 | ||
252b5132 | 821 | static int |
98027b10 | 822 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
823 | { |
824 | int middle, low, high; | |
825 | int cmp; | |
826 | ||
827 | low = 0; | |
828 | high = regcount - 1; | |
829 | ||
830 | do | |
831 | { | |
832 | middle = (low + high) / 2; | |
833 | cmp = strcasecmp (name, regs[middle].name); | |
834 | if (cmp < 0) | |
835 | high = middle - 1; | |
836 | else if (cmp > 0) | |
837 | low = middle + 1; | |
838 | else | |
839 | return regs[middle].value; | |
840 | } | |
841 | while (low <= high); | |
842 | ||
843 | return -1; | |
844 | } | |
845 | ||
846 | /* | |
99a814a1 | 847 | * Summary of register_name. |
252b5132 RH |
848 | * |
849 | * in: Input_line_pointer points to 1st char of operand. | |
850 | * | |
851 | * out: A expressionS. | |
852 | * The operand may have been a register: in this case, X_op == O_register, | |
853 | * X_add_number is set to the register number, and truth is returned. | |
854 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
855 | * original state. | |
856 | */ | |
857 | ||
b34976b6 | 858 | static bfd_boolean |
98027b10 | 859 | register_name (expressionS *expressionP) |
252b5132 RH |
860 | { |
861 | int reg_number; | |
862 | char *name; | |
863 | char *start; | |
864 | char c; | |
865 | ||
99a814a1 | 866 | /* Find the spelling of the operand. */ |
252b5132 | 867 | start = name = input_line_pointer; |
3882b010 | 868 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
869 | name = ++input_line_pointer; |
870 | ||
3882b010 | 871 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 872 | return FALSE; |
252b5132 RH |
873 | |
874 | c = get_symbol_end (); | |
875 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
876 | ||
468cced8 AM |
877 | /* Put back the delimiting char. */ |
878 | *input_line_pointer = c; | |
879 | ||
99a814a1 | 880 | /* Look to see if it's in the register table. */ |
81d4177b | 881 | if (reg_number >= 0) |
252b5132 RH |
882 | { |
883 | expressionP->X_op = O_register; | |
884 | expressionP->X_add_number = reg_number; | |
81d4177b | 885 | |
99a814a1 | 886 | /* Make the rest nice. */ |
252b5132 RH |
887 | expressionP->X_add_symbol = NULL; |
888 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 889 | return TRUE; |
252b5132 | 890 | } |
468cced8 AM |
891 | |
892 | /* Reset the line as if we had not done anything. */ | |
893 | input_line_pointer = start; | |
b34976b6 | 894 | return FALSE; |
252b5132 RH |
895 | } |
896 | \f | |
897 | /* This function is called for each symbol seen in an expression. It | |
898 | handles the special parsing which PowerPC assemblers are supposed | |
899 | to use for condition codes. */ | |
900 | ||
901 | /* Whether to do the special parsing. */ | |
b34976b6 | 902 | static bfd_boolean cr_operand; |
252b5132 RH |
903 | |
904 | /* Names to recognize in a condition code. This table is sorted. */ | |
905 | static const struct pd_reg cr_names[] = | |
906 | { | |
907 | { "cr0", 0 }, | |
908 | { "cr1", 1 }, | |
909 | { "cr2", 2 }, | |
910 | { "cr3", 3 }, | |
911 | { "cr4", 4 }, | |
912 | { "cr5", 5 }, | |
913 | { "cr6", 6 }, | |
914 | { "cr7", 7 }, | |
915 | { "eq", 2 }, | |
916 | { "gt", 1 }, | |
917 | { "lt", 0 }, | |
918 | { "so", 3 }, | |
919 | { "un", 3 } | |
920 | }; | |
921 | ||
922 | /* Parsing function. This returns non-zero if it recognized an | |
923 | expression. */ | |
924 | ||
925 | int | |
91d6fa6a | 926 | ppc_parse_name (const char *name, expressionS *exp) |
252b5132 RH |
927 | { |
928 | int val; | |
929 | ||
930 | if (! cr_operand) | |
931 | return 0; | |
932 | ||
13abbae3 AM |
933 | if (*name == '%') |
934 | ++name; | |
252b5132 RH |
935 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], |
936 | name); | |
937 | if (val < 0) | |
938 | return 0; | |
939 | ||
91d6fa6a NC |
940 | exp->X_op = O_constant; |
941 | exp->X_add_number = val; | |
252b5132 RH |
942 | |
943 | return 1; | |
944 | } | |
945 | \f | |
946 | /* Local variables. */ | |
947 | ||
2b3c4602 AM |
948 | /* Whether to target xcoff64/elf64. */ |
949 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 950 | |
252b5132 RH |
951 | /* Opcode hash table. */ |
952 | static struct hash_control *ppc_hash; | |
953 | ||
954 | /* Macro hash table. */ | |
955 | static struct hash_control *ppc_macro_hash; | |
956 | ||
957 | #ifdef OBJ_ELF | |
99a814a1 | 958 | /* What type of shared library support to use. */ |
5d6f4f16 | 959 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 960 | |
99a814a1 | 961 | /* Flags to set in the elf header. */ |
252b5132 RH |
962 | static flagword ppc_flags = 0; |
963 | ||
964 | /* Whether this is Solaris or not. */ | |
965 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 966 | #define SOLARIS_P TRUE |
252b5132 | 967 | #else |
b34976b6 | 968 | #define SOLARIS_P FALSE |
252b5132 RH |
969 | #endif |
970 | ||
b34976b6 | 971 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
972 | #endif |
973 | ||
974 | #ifdef OBJ_XCOFF | |
975 | ||
976 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
977 | using a bunch of different sections. These assembler sections, | |
978 | however, are all encompassed within the .text or .data sections of | |
979 | the final output file. We handle this by using different | |
980 | subsegments within these main segments. */ | |
981 | ||
982 | /* Next subsegment to allocate within the .text segment. */ | |
983 | static subsegT ppc_text_subsegment = 2; | |
984 | ||
985 | /* Linked list of csects in the text section. */ | |
986 | static symbolS *ppc_text_csects; | |
987 | ||
988 | /* Next subsegment to allocate within the .data segment. */ | |
989 | static subsegT ppc_data_subsegment = 2; | |
990 | ||
991 | /* Linked list of csects in the data section. */ | |
992 | static symbolS *ppc_data_csects; | |
993 | ||
994 | /* The current csect. */ | |
995 | static symbolS *ppc_current_csect; | |
996 | ||
997 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
998 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
999 | A special relocation is used when accessing TOC entries. We handle | |
1000 | the TOC as a subsegment within the .data segment. We set it up if | |
1001 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
1002 | static symbolS *ppc_toc_csect; | |
1003 | ||
1004 | /* The first frag in the TOC subsegment. */ | |
1005 | static fragS *ppc_toc_frag; | |
1006 | ||
1007 | /* The first frag in the first subsegment after the TOC in the .data | |
1008 | segment. NULL if there are no subsegments after the TOC. */ | |
1009 | static fragS *ppc_after_toc_frag; | |
1010 | ||
1011 | /* The current static block. */ | |
1012 | static symbolS *ppc_current_block; | |
1013 | ||
1014 | /* The COFF debugging section; set by md_begin. This is not the | |
1015 | .debug section, but is instead the secret BFD section which will | |
1016 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
1017 | static asection *ppc_coff_debug_section; | |
1018 | ||
85645aed TG |
1019 | /* Structure to set the length field of the dwarf sections. */ |
1020 | struct dw_subsection { | |
1021 | /* Subsections are simply linked. */ | |
1022 | struct dw_subsection *link; | |
1023 | ||
1024 | /* The subsection number. */ | |
1025 | subsegT subseg; | |
1026 | ||
1027 | /* Expression to compute the length of the section. */ | |
1028 | expressionS end_exp; | |
1029 | }; | |
1030 | ||
1031 | static struct dw_section { | |
1032 | /* Corresponding section. */ | |
1033 | segT sect; | |
1034 | ||
1035 | /* Simply linked list of subsections with a label. */ | |
1036 | struct dw_subsection *list_subseg; | |
1037 | ||
1038 | /* The anonymous subsection. */ | |
1039 | struct dw_subsection *anon_subseg; | |
1040 | } dw_sections[XCOFF_DWSECT_NBR_NAMES]; | |
252b5132 RH |
1041 | #endif /* OBJ_XCOFF */ |
1042 | ||
1043 | #ifdef TE_PE | |
1044 | ||
1045 | /* Various sections that we need for PE coff support. */ | |
1046 | static segT ydata_section; | |
1047 | static segT pdata_section; | |
1048 | static segT reldata_section; | |
1049 | static segT rdata_section; | |
1050 | static segT tocdata_section; | |
1051 | ||
81d4177b | 1052 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
1053 | static segT ppc_previous_section; |
1054 | static segT ppc_current_section; | |
1055 | ||
1056 | #endif /* TE_PE */ | |
1057 | ||
1058 | #ifdef OBJ_ELF | |
1059 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
1060 | #define PPC_APUINFO_ISEL 0x40 |
1061 | #define PPC_APUINFO_PMR 0x41 | |
1062 | #define PPC_APUINFO_RFMCI 0x42 | |
1063 | #define PPC_APUINFO_CACHELCK 0x43 | |
1064 | #define PPC_APUINFO_SPE 0x100 | |
1065 | #define PPC_APUINFO_EFS 0x101 | |
1066 | #define PPC_APUINFO_BRLOCK 0x102 | |
b9c361e0 | 1067 | #define PPC_APUINFO_VLE 0x104 |
6a0c61b7 | 1068 | |
b34976b6 AM |
1069 | /* |
1070 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
1071 | */ |
1072 | unsigned long *ppc_apuinfo_list; | |
1073 | unsigned int ppc_apuinfo_num; | |
1074 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1075 | #endif /* OBJ_ELF */ |
1076 | \f | |
1077 | #ifdef OBJ_ELF | |
15c1449b | 1078 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1079 | #else |
15c1449b | 1080 | const char *const md_shortopts = "um:"; |
252b5132 | 1081 | #endif |
cef4f754 | 1082 | #define OPTION_NOPS (OPTION_MD_BASE + 0) |
15c1449b | 1083 | const struct option md_longopts[] = { |
cef4f754 | 1084 | {"nops", required_argument, NULL, OPTION_NOPS}, |
252b5132 RH |
1085 | {NULL, no_argument, NULL, 0} |
1086 | }; | |
15c1449b | 1087 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 | 1088 | |
b9c361e0 JL |
1089 | /* Convert the target integer stored in N bytes in BUF to a host |
1090 | integer, returning that value. */ | |
1091 | ||
1092 | static valueT | |
1093 | md_chars_to_number (char *buf, int n) | |
1094 | { | |
1095 | valueT result = 0; | |
1096 | unsigned char *p = (unsigned char *) buf; | |
1097 | ||
1098 | if (target_big_endian) | |
1099 | { | |
1100 | while (n--) | |
1101 | { | |
1102 | result <<= 8; | |
1103 | result |= (*p++ & 0xff); | |
1104 | } | |
1105 | } | |
1106 | else | |
1107 | { | |
1108 | while (n--) | |
1109 | { | |
1110 | result <<= 8; | |
1111 | result |= (p[n] & 0xff); | |
1112 | } | |
1113 | } | |
1114 | ||
1115 | return result; | |
1116 | } | |
1117 | ||
252b5132 | 1118 | int |
98027b10 | 1119 | md_parse_option (int c, char *arg) |
252b5132 | 1120 | { |
69fe9ce5 AM |
1121 | ppc_cpu_t new_cpu; |
1122 | ||
252b5132 RH |
1123 | switch (c) |
1124 | { | |
1125 | case 'u': | |
1126 | /* -u means that any undefined symbols should be treated as | |
1127 | external, which is the default for gas anyhow. */ | |
1128 | break; | |
1129 | ||
1130 | #ifdef OBJ_ELF | |
1131 | case 'l': | |
1132 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1133 | sake, recognize -be also. */ |
252b5132 RH |
1134 | if (strcmp (arg, "e") == 0) |
1135 | { | |
1136 | target_big_endian = 0; | |
1137 | set_target_endian = 1; | |
b9c361e0 | 1138 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1139 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1140 | } |
1141 | else | |
1142 | return 0; | |
1143 | ||
1144 | break; | |
1145 | ||
1146 | case 'b': | |
1147 | if (strcmp (arg, "e") == 0) | |
1148 | { | |
1149 | target_big_endian = 1; | |
1150 | set_target_endian = 1; | |
1151 | } | |
1152 | else | |
1153 | return 0; | |
1154 | ||
1155 | break; | |
1156 | ||
1157 | case 'K': | |
99a814a1 | 1158 | /* Recognize -K PIC. */ |
252b5132 RH |
1159 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1160 | { | |
1161 | shlib = SHLIB_PIC; | |
1162 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1163 | } | |
1164 | else | |
1165 | return 0; | |
1166 | ||
1167 | break; | |
1168 | #endif | |
1169 | ||
7f6d05e8 CP |
1170 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1171 | case 'a': | |
1172 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1173 | { |
1174 | #ifdef BFD64 | |
1175 | ppc_obj64 = 1; | |
d6ed37ed AM |
1176 | if (ppc_cpu & PPC_OPCODE_VLE) |
1177 | as_bad (_("the use of -mvle requires -a32.")); | |
2a98c3a6 AM |
1178 | #else |
1179 | as_fatal (_("%s unsupported"), "-a64"); | |
1180 | #endif | |
1181 | } | |
7f6d05e8 | 1182 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1183 | ppc_obj64 = 0; |
7f6d05e8 CP |
1184 | else |
1185 | return 0; | |
1186 | break; | |
81d4177b | 1187 | |
252b5132 | 1188 | case 'm': |
b9c361e0 JL |
1189 | new_cpu = ppc_parse_cpu (ppc_cpu, arg); |
1190 | if (new_cpu != 0) | |
1191 | { | |
1192 | ppc_cpu = new_cpu; | |
d6ed37ed AM |
1193 | if (strcmp (arg, "vle") == 0) |
1194 | { | |
1195 | if (set_target_endian && target_big_endian == 0) | |
1196 | as_bad (_("the use of -mvle requires big endian.")); | |
1197 | if (ppc_obj64) | |
1198 | as_bad (_("the use of -mvle requires -a32.")); | |
1199 | } | |
b9c361e0 | 1200 | } |
252b5132 RH |
1201 | |
1202 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1203 | reg_names_p = TRUE; |
252b5132 RH |
1204 | |
1205 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1206 | reg_names_p = FALSE; |
252b5132 RH |
1207 | |
1208 | #ifdef OBJ_ELF | |
99a814a1 AM |
1209 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1210 | that require relocation. */ | |
252b5132 RH |
1211 | else if (strcmp (arg, "relocatable") == 0) |
1212 | { | |
5d6f4f16 | 1213 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1214 | ppc_flags |= EF_PPC_RELOCATABLE; |
1215 | } | |
1216 | ||
1217 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1218 | { | |
5d6f4f16 | 1219 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1220 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1221 | } | |
1222 | ||
99a814a1 | 1223 | /* -memb, set embedded bit. */ |
252b5132 RH |
1224 | else if (strcmp (arg, "emb") == 0) |
1225 | ppc_flags |= EF_PPC_EMB; | |
1226 | ||
cc643b88 | 1227 | /* -mlittle/-mbig set the endianness. */ |
99a814a1 AM |
1228 | else if (strcmp (arg, "little") == 0 |
1229 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1230 | { |
1231 | target_big_endian = 0; | |
1232 | set_target_endian = 1; | |
b9c361e0 | 1233 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1234 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1235 | } |
1236 | ||
1237 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1238 | { | |
1239 | target_big_endian = 1; | |
1240 | set_target_endian = 1; | |
1241 | } | |
1242 | ||
1243 | else if (strcmp (arg, "solaris") == 0) | |
1244 | { | |
b34976b6 | 1245 | msolaris = TRUE; |
252b5132 RH |
1246 | ppc_comment_chars = ppc_solaris_comment_chars; |
1247 | } | |
1248 | ||
1249 | else if (strcmp (arg, "no-solaris") == 0) | |
1250 | { | |
b34976b6 | 1251 | msolaris = FALSE; |
252b5132 RH |
1252 | ppc_comment_chars = ppc_eabi_comment_chars; |
1253 | } | |
1254 | #endif | |
1255 | else | |
1256 | { | |
1257 | as_bad (_("invalid switch -m%s"), arg); | |
1258 | return 0; | |
1259 | } | |
1260 | break; | |
1261 | ||
1262 | #ifdef OBJ_ELF | |
1263 | /* -V: SVR4 argument to print version ID. */ | |
1264 | case 'V': | |
1265 | print_version_id (); | |
1266 | break; | |
1267 | ||
1268 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1269 | should be emitted or not. FIXME: Not implemented. */ | |
1270 | case 'Q': | |
1271 | break; | |
1272 | ||
1273 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1274 | rather than .stabs.excl, which is ignored by the linker. | |
1275 | FIXME: Not implemented. */ | |
1276 | case 's': | |
1277 | if (arg) | |
1278 | return 0; | |
1279 | ||
1280 | break; | |
1281 | #endif | |
1282 | ||
cef4f754 AM |
1283 | case OPTION_NOPS: |
1284 | { | |
1285 | char *end; | |
1286 | nop_limit = strtoul (optarg, &end, 0); | |
1287 | if (*end) | |
1288 | as_bad (_("--nops needs a numeric argument")); | |
1289 | } | |
1290 | break; | |
85645aed | 1291 | |
252b5132 RH |
1292 | default: |
1293 | return 0; | |
1294 | } | |
1295 | ||
1296 | return 1; | |
1297 | } | |
1298 | ||
1299 | void | |
98027b10 | 1300 | md_show_usage (FILE *stream) |
252b5132 | 1301 | { |
bc805888 | 1302 | fprintf (stream, _("\ |
252b5132 | 1303 | PowerPC options:\n\ |
ce3d2015 AM |
1304 | -a32 generate ELF32/XCOFF32\n\ |
1305 | -a64 generate ELF64/XCOFF64\n\ | |
1306 | -u ignored\n\ | |
1307 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ | |
1308 | -mpwr generate code for POWER (RIOS1)\n\ | |
1309 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1310 | -mppc, -mppc32, -m603, -m604\n\ |
ce3d2015 AM |
1311 | generate code for PowerPC 603/604\n\ |
1312 | -m403 generate code for PowerPC 403\n\ | |
1313 | -m405 generate code for PowerPC 405\n\ | |
1314 | -m440 generate code for PowerPC 440\n\ | |
1315 | -m464 generate code for PowerPC 464\n\ | |
1316 | -m476 generate code for PowerPC 476\n\ | |
f5c120c5 | 1317 | -m7400, -m7410, -m7450, -m7455\n\ |
ce3d2015 AM |
1318 | generate code for PowerPC 7400/7410/7450/7455\n\ |
1319 | -m750cl generate code for PowerPC 750cl\n")); | |
df12615d | 1320 | fprintf (stream, _("\ |
ce3d2015 AM |
1321 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
1322 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ | |
1323 | -mbooke generate code for 32-bit PowerPC BookE\n\ | |
1324 | -ma2 generate code for A2 architecture\n\ | |
cdc51b07 RS |
1325 | -mpower4, -mpwr4 generate code for Power4 architecture\n\ |
1326 | -mpower5, -mpwr5, -mpwr5x\n\ | |
1327 | generate code for Power5 architecture\n\ | |
1328 | -mpower6, -mpwr6 generate code for Power6 architecture\n\ | |
1329 | -mpower7, -mpwr7 generate code for Power7 architecture\n\ | |
ce3d2015 AM |
1330 | -mcell generate code for Cell Broadband Engine architecture\n\ |
1331 | -mcom generate code Power/PowerPC common instructions\n\ | |
1332 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); | |
6a0c61b7 | 1333 | fprintf (stream, _("\ |
ce3d2015 AM |
1334 | -maltivec generate code for AltiVec\n\ |
1335 | -mvsx generate code for Vector-Scalar (VSX) instructions\n\ | |
1336 | -me300 generate code for PowerPC e300 family\n\ | |
1337 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ | |
1338 | -me500mc, generate code for Freescale e500mc core complex\n\ | |
1339 | -me500mc64, generate code for Freescale e500mc64 core complex\n\ | |
aea77599 AM |
1340 | -me5500, generate code for Freescale e5500 core complex\n\ |
1341 | -me6500, generate code for Freescale e6500 core complex\n\ | |
ce3d2015 | 1342 | -mspe generate code for Motorola SPE instructions\n\ |
b9c361e0 | 1343 | -mvle generate code for Freescale VLE instructions\n\ |
ce3d2015 AM |
1344 | -mtitan generate code for AppliedMicro Titan core complex\n\ |
1345 | -mregnames Allow symbolic names for registers\n\ | |
1346 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1347 | #ifdef OBJ_ELF |
bc805888 | 1348 | fprintf (stream, _("\ |
ce3d2015 AM |
1349 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1350 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1351 | -memb set PPC_EMB bit in ELF flags\n\ | |
b8b738ac | 1352 | -mlittle, -mlittle-endian, -le\n\ |
ce3d2015 | 1353 | generate code for a little endian machine\n\ |
b8b738ac | 1354 | -mbig, -mbig-endian, -be\n\ |
ce3d2015 AM |
1355 | generate code for a big endian machine\n\ |
1356 | -msolaris generate code for Solaris\n\ | |
1357 | -mno-solaris do not generate code for Solaris\n\ | |
b8b738ac | 1358 | -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ |
ce3d2015 AM |
1359 | -V print assembler version number\n\ |
1360 | -Qy, -Qn ignored\n")); | |
252b5132 | 1361 | #endif |
cef4f754 AM |
1362 | fprintf (stream, _("\ |
1363 | -nops=count when aligning, more than COUNT nops uses a branch\n")); | |
252b5132 RH |
1364 | } |
1365 | \f | |
1366 | /* Set ppc_cpu if it is not already set. */ | |
1367 | ||
1368 | static void | |
98027b10 | 1369 | ppc_set_cpu (void) |
252b5132 RH |
1370 | { |
1371 | const char *default_os = TARGET_OS; | |
1372 | const char *default_cpu = TARGET_CPU; | |
1373 | ||
7102e95e | 1374 | if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) |
252b5132 | 1375 | { |
2a98c3a6 | 1376 | if (ppc_obj64) |
bdc70b4a | 1377 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; |
2a98c3a6 AM |
1378 | else if (strncmp (default_os, "aix", 3) == 0 |
1379 | && default_os[3] >= '4' && default_os[3] <= '9') | |
bdc70b4a | 1380 | ppc_cpu |= PPC_OPCODE_COMMON; |
252b5132 | 1381 | else if (strncmp (default_os, "aix3", 4) == 0) |
bdc70b4a | 1382 | ppc_cpu |= PPC_OPCODE_POWER; |
252b5132 | 1383 | else if (strcmp (default_cpu, "rs6000") == 0) |
bdc70b4a | 1384 | ppc_cpu |= PPC_OPCODE_POWER; |
0baf16f2 | 1385 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
bdc70b4a | 1386 | ppc_cpu |= PPC_OPCODE_PPC; |
252b5132 | 1387 | else |
d6ed37ed | 1388 | as_fatal (_("unknown default cpu = %s, os = %s"), |
99a814a1 | 1389 | default_cpu, default_os); |
252b5132 RH |
1390 | } |
1391 | } | |
1392 | ||
9232bbb0 AM |
1393 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1394 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1395 | |
1396 | enum bfd_architecture | |
98027b10 | 1397 | ppc_arch (void) |
252b5132 RH |
1398 | { |
1399 | const char *default_cpu = TARGET_CPU; | |
1400 | ppc_set_cpu (); | |
1401 | ||
1402 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1403 | return bfd_arch_powerpc; | |
b9c361e0 JL |
1404 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1405 | return bfd_arch_powerpc; | |
1406 | if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
252b5132 | 1407 | return bfd_arch_rs6000; |
b9c361e0 | 1408 | if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) |
252b5132 RH |
1409 | { |
1410 | if (strcmp (default_cpu, "rs6000") == 0) | |
1411 | return bfd_arch_rs6000; | |
0baf16f2 | 1412 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1413 | return bfd_arch_powerpc; |
1414 | } | |
1415 | ||
d6ed37ed | 1416 | as_fatal (_("neither Power nor PowerPC opcodes were selected.")); |
252b5132 RH |
1417 | return bfd_arch_unknown; |
1418 | } | |
1419 | ||
7f6d05e8 | 1420 | unsigned long |
98027b10 | 1421 | ppc_mach (void) |
7f6d05e8 | 1422 | { |
2a98c3a6 AM |
1423 | if (ppc_obj64) |
1424 | return bfd_mach_ppc64; | |
1425 | else if (ppc_arch () == bfd_arch_rs6000) | |
1426 | return bfd_mach_rs6k; | |
ce3d2015 AM |
1427 | else if (ppc_cpu & PPC_OPCODE_TITAN) |
1428 | return bfd_mach_ppc_titan; | |
b9c361e0 JL |
1429 | else if (ppc_cpu & PPC_OPCODE_VLE) |
1430 | return bfd_mach_ppc_vle; | |
2a98c3a6 AM |
1431 | else |
1432 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1433 | } |
1434 | ||
81d4177b | 1435 | extern char* |
98027b10 | 1436 | ppc_target_format (void) |
7f6d05e8 CP |
1437 | { |
1438 | #ifdef OBJ_COFF | |
1439 | #ifdef TE_PE | |
99a814a1 | 1440 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1441 | #elif TE_POWERMAC |
0baf16f2 | 1442 | return "xcoff-powermac"; |
7f6d05e8 | 1443 | #else |
eb1e0e80 | 1444 | # ifdef TE_AIX5 |
edc1d652 | 1445 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1446 | # else |
edc1d652 | 1447 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1448 | # endif |
7f6d05e8 | 1449 | #endif |
7f6d05e8 CP |
1450 | #endif |
1451 | #ifdef OBJ_ELF | |
edc1d652 AM |
1452 | # ifdef TE_FreeBSD |
1453 | return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); | |
1454 | # elif defined (TE_VXWORKS) | |
9d8504b1 PB |
1455 | return "elf32-powerpc-vxworks"; |
1456 | # else | |
0baf16f2 | 1457 | return (target_big_endian |
2b3c4602 AM |
1458 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1459 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1460 | # endif |
7f6d05e8 CP |
1461 | #endif |
1462 | } | |
1463 | ||
b9c361e0 JL |
1464 | /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. |
1465 | Return TRUE if there's a problem, otherwise FALSE. */ | |
1466 | ||
1467 | static bfd_boolean | |
1468 | insn_validate (const struct powerpc_opcode *op) | |
1469 | { | |
1470 | const unsigned char *o; | |
1471 | unsigned long omask = op->mask; | |
1472 | ||
1473 | /* The mask had better not trim off opcode bits. */ | |
1474 | if ((op->opcode & omask) != op->opcode) | |
1475 | { | |
1476 | as_bad (_("mask trims opcode bits for %s"), op->name); | |
1477 | return TRUE; | |
1478 | } | |
1479 | ||
1480 | /* The operands must not overlap the opcode or each other. */ | |
1481 | for (o = op->operands; *o; ++o) | |
1482 | { | |
1483 | if (*o >= num_powerpc_operands) | |
1484 | { | |
1485 | as_bad (_("operand index error for %s"), op->name); | |
1486 | return TRUE; | |
1487 | } | |
1488 | else | |
1489 | { | |
1490 | const struct powerpc_operand *operand = &powerpc_operands[*o]; | |
1491 | if (operand->shift != PPC_OPSHIFT_INV) | |
1492 | { | |
1493 | unsigned long mask; | |
1494 | ||
1495 | if (operand->shift >= 0) | |
1496 | mask = operand->bitm << operand->shift; | |
1497 | else | |
1498 | mask = operand->bitm >> -operand->shift; | |
1499 | if (omask & mask) | |
1500 | { | |
1501 | as_bad (_("operand %d overlap in %s"), | |
1502 | (int) (o - op->operands), op->name); | |
1503 | return TRUE; | |
1504 | } | |
1505 | omask |= mask; | |
1506 | } | |
1507 | } | |
1508 | } | |
1509 | return FALSE; | |
1510 | } | |
1511 | ||
69c040df AM |
1512 | /* Insert opcodes and macros into hash tables. Called at startup and |
1513 | for .cpu pseudo. */ | |
252b5132 | 1514 | |
69c040df AM |
1515 | static void |
1516 | ppc_setup_opcodes (void) | |
252b5132 | 1517 | { |
98027b10 | 1518 | const struct powerpc_opcode *op; |
252b5132 RH |
1519 | const struct powerpc_opcode *op_end; |
1520 | const struct powerpc_macro *macro; | |
1521 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1522 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1523 | |
69c040df AM |
1524 | if (ppc_hash != NULL) |
1525 | hash_die (ppc_hash); | |
1526 | if (ppc_macro_hash != NULL) | |
1527 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1528 | |
1529 | /* Insert the opcodes into a hash table. */ | |
1530 | ppc_hash = hash_new (); | |
1531 | ||
c43a438d | 1532 | if (ENABLE_CHECKING) |
b84bf58a | 1533 | { |
c43a438d | 1534 | unsigned int i; |
b84bf58a | 1535 | |
c43a438d AM |
1536 | /* Check operand masks. Code here and in the disassembler assumes |
1537 | all the 1's in the mask are contiguous. */ | |
1538 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1539 | { |
c43a438d AM |
1540 | unsigned long mask = powerpc_operands[i].bitm; |
1541 | unsigned long right_bit; | |
1542 | unsigned int j; | |
1543 | ||
1544 | right_bit = mask & -mask; | |
1545 | mask += right_bit; | |
1546 | right_bit = mask & -mask; | |
1547 | if (mask != right_bit) | |
1548 | { | |
1549 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1550 | bad_insn = TRUE; | |
1551 | } | |
1552 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1553 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1554 | sizeof (powerpc_operands[0])) == 0) | |
1555 | { | |
1556 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1557 | j, i); | |
1558 | bad_insn = TRUE; | |
1559 | } | |
b84bf58a AM |
1560 | } |
1561 | } | |
1562 | ||
252b5132 RH |
1563 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1564 | for (op = powerpc_opcodes; op < op_end; op++) | |
1565 | { | |
c43a438d | 1566 | if (ENABLE_CHECKING) |
b84bf58a | 1567 | { |
d815f1a9 | 1568 | if (op != powerpc_opcodes) |
8dbcd839 | 1569 | { |
b9c361e0 JL |
1570 | int old_opcode = PPC_OP (op[-1].opcode); |
1571 | int new_opcode = PPC_OP (op[0].opcode); | |
1572 | ||
1573 | #ifdef PRINT_OPCODE_TABLE | |
1574 | printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", | |
1575 | op->name, op - powerpc_opcodes, (unsigned int) new_opcode, | |
1576 | (unsigned int) op->opcode, (unsigned int) op->mask, | |
1577 | (unsigned long long) op->flags); | |
1578 | #endif | |
1579 | ||
d815f1a9 AM |
1580 | /* The major opcodes had better be sorted. Code in the |
1581 | disassembler assumes the insns are sorted according to | |
1582 | major opcode. */ | |
b9c361e0 | 1583 | if (new_opcode < old_opcode) |
d815f1a9 AM |
1584 | { |
1585 | as_bad (_("major opcode is not sorted for %s"), | |
1586 | op->name); | |
1587 | bad_insn = TRUE; | |
1588 | } | |
8dbcd839 | 1589 | } |
b9c361e0 JL |
1590 | bad_insn |= insn_validate (op); |
1591 | } | |
c43a438d | 1592 | |
b9c361e0 JL |
1593 | if ((ppc_cpu & op->flags) != 0 |
1594 | && !(ppc_cpu & op->deprecated)) | |
1595 | { | |
1596 | const char *retval; | |
1597 | ||
1598 | retval = hash_insert (ppc_hash, op->name, (void *) op); | |
1599 | if (retval != NULL) | |
c43a438d | 1600 | { |
b9c361e0 | 1601 | as_bad (_("duplicate instruction %s"), |
c43a438d AM |
1602 | op->name); |
1603 | bad_insn = TRUE; | |
1604 | } | |
b9c361e0 JL |
1605 | } |
1606 | } | |
c43a438d | 1607 | |
b9c361e0 JL |
1608 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1609 | for (op = powerpc_opcodes; op < op_end; op++) | |
1610 | hash_insert (ppc_hash, op->name, (void *) op); | |
1611 | ||
1612 | op_end = vle_opcodes + vle_num_opcodes; | |
1613 | for (op = vle_opcodes; op < op_end; op++) | |
1614 | { | |
1615 | if (ENABLE_CHECKING) | |
1616 | { | |
1617 | if (op != vle_opcodes) | |
1618 | { | |
1619 | unsigned old_seg, new_seg; | |
1620 | ||
1621 | old_seg = VLE_OP (op[-1].opcode, op[-1].mask); | |
1622 | old_seg = VLE_OP_TO_SEG (old_seg); | |
1623 | new_seg = VLE_OP (op[0].opcode, op[0].mask); | |
1624 | new_seg = VLE_OP_TO_SEG (new_seg); | |
1625 | ||
1626 | #ifdef PRINT_OPCODE_TABLE | |
1627 | printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", | |
1628 | op->name, op - powerpc_opcodes, (unsigned int) new_opcode, | |
1629 | (unsigned int) op->opcode, (unsigned int) op->mask, | |
1630 | (unsigned long long) op->flags); | |
1631 | #endif | |
1632 | /* The major opcodes had better be sorted. Code in the | |
1633 | disassembler assumes the insns are sorted according to | |
1634 | major opcode. */ | |
1635 | if (new_seg < old_seg) | |
1636 | { | |
1637 | as_bad (_("major opcode is not sorted for %s"), | |
1638 | op->name); | |
1639 | bad_insn = TRUE; | |
1640 | } | |
1641 | } | |
1642 | ||
1643 | bad_insn |= insn_validate (op); | |
c43a438d | 1644 | } |
252b5132 | 1645 | |
bdc70b4a | 1646 | if ((ppc_cpu & op->flags) != 0 |
1cb0a767 | 1647 | && !(ppc_cpu & op->deprecated)) |
252b5132 RH |
1648 | { |
1649 | const char *retval; | |
1650 | ||
98027b10 | 1651 | retval = hash_insert (ppc_hash, op->name, (void *) op); |
69c040df | 1652 | if (retval != NULL) |
252b5132 | 1653 | { |
b84bf58a | 1654 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1655 | op->name); |
b84bf58a | 1656 | bad_insn = TRUE; |
252b5132 RH |
1657 | } |
1658 | } | |
1659 | } | |
1660 | ||
b9c361e0 JL |
1661 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1662 | for (op = vle_opcodes; op < op_end; op++) | |
98027b10 | 1663 | hash_insert (ppc_hash, op->name, (void *) op); |
3c9030c1 | 1664 | |
252b5132 RH |
1665 | /* Insert the macros into a hash table. */ |
1666 | ppc_macro_hash = hash_new (); | |
1667 | ||
1668 | macro_end = powerpc_macros + powerpc_num_macros; | |
1669 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1670 | { | |
33740db9 | 1671 | if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) |
252b5132 RH |
1672 | { |
1673 | const char *retval; | |
1674 | ||
98027b10 | 1675 | retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); |
252b5132 RH |
1676 | if (retval != (const char *) NULL) |
1677 | { | |
b84bf58a AM |
1678 | as_bad (_("duplicate macro %s"), macro->name); |
1679 | bad_insn = TRUE; | |
252b5132 RH |
1680 | } |
1681 | } | |
1682 | } | |
1683 | ||
b84bf58a | 1684 | if (bad_insn) |
252b5132 | 1685 | abort (); |
69c040df AM |
1686 | } |
1687 | ||
1688 | /* This function is called when the assembler starts up. It is called | |
1689 | after the options have been parsed and the output file has been | |
1690 | opened. */ | |
1691 | ||
1692 | void | |
98027b10 | 1693 | md_begin (void) |
69c040df AM |
1694 | { |
1695 | ppc_set_cpu (); | |
1696 | ||
1697 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
1698 | ||
1699 | #ifdef OBJ_ELF | |
1700 | /* Set the ELF flags if desired. */ | |
1701 | if (ppc_flags && !msolaris) | |
1702 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1703 | #endif | |
1704 | ||
1705 | ppc_setup_opcodes (); | |
252b5132 | 1706 | |
67c1ffbe | 1707 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1708 | by the user. */ |
252b5132 RH |
1709 | if (!set_target_endian) |
1710 | { | |
1711 | set_target_endian = 1; | |
1712 | target_big_endian = PPC_BIG_ENDIAN; | |
1713 | } | |
1714 | ||
1715 | #ifdef OBJ_XCOFF | |
1716 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1717 | ||
1718 | /* Create dummy symbols to serve as initial csects. This forces the | |
1719 | text csects to precede the data csects. These symbols will not | |
1720 | be output. */ | |
1721 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1722 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1723 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1724 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1725 | #endif |
1726 | ||
1727 | #ifdef TE_PE | |
1728 | ||
1729 | ppc_current_section = text_section; | |
81d4177b | 1730 | ppc_previous_section = 0; |
252b5132 RH |
1731 | |
1732 | #endif | |
1733 | } | |
1734 | ||
6a0c61b7 | 1735 | void |
98027b10 | 1736 | ppc_cleanup (void) |
6a0c61b7 | 1737 | { |
dc1d03fc | 1738 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1739 | if (ppc_apuinfo_list == NULL) |
1740 | return; | |
1741 | ||
1742 | /* Ok, so write the section info out. We have this layout: | |
1743 | ||
1744 | byte data what | |
1745 | ---- ---- ---- | |
1746 | 0 8 length of "APUinfo\0" | |
1747 | 4 (n*4) number of APU's (4 bytes each) | |
1748 | 8 2 note type 2 | |
1749 | 12 "APUinfo\0" name | |
1750 | 20 APU#1 first APU's info | |
1751 | 24 APU#2 second APU's info | |
1752 | ... ... | |
1753 | */ | |
1754 | { | |
1755 | char *p; | |
1756 | asection *seg = now_seg; | |
1757 | subsegT subseg = now_subseg; | |
1758 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1759 | unsigned int i; |
6a0c61b7 EZ |
1760 | |
1761 | /* Create the .PPC.EMB.apuinfo section. */ | |
1762 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1763 | bfd_set_section_flags (stdoutput, | |
1764 | apuinfo_secp, | |
e1a9cb8e | 1765 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1766 | |
1767 | p = frag_more (4); | |
1768 | md_number_to_chars (p, (valueT) 8, 4); | |
1769 | ||
1770 | p = frag_more (4); | |
e98d298c | 1771 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1772 | |
1773 | p = frag_more (4); | |
1774 | md_number_to_chars (p, (valueT) 2, 4); | |
1775 | ||
1776 | p = frag_more (8); | |
1777 | strcpy (p, "APUinfo"); | |
1778 | ||
1779 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1780 | { | |
b34976b6 AM |
1781 | p = frag_more (4); |
1782 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1783 | } |
1784 | ||
1785 | frag_align (2, 0, 0); | |
1786 | ||
1787 | /* We probably can't restore the current segment, for there likely | |
1788 | isn't one yet... */ | |
1789 | if (seg && subseg) | |
1790 | subseg_set (seg, subseg); | |
1791 | } | |
dc1d03fc | 1792 | #endif |
6a0c61b7 EZ |
1793 | } |
1794 | ||
252b5132 RH |
1795 | /* Insert an operand value into an instruction. */ |
1796 | ||
1797 | static unsigned long | |
a1867a27 AM |
1798 | ppc_insert_operand (unsigned long insn, |
1799 | const struct powerpc_operand *operand, | |
1800 | offsetT val, | |
91d6fa6a | 1801 | ppc_cpu_t cpu, |
a1867a27 AM |
1802 | char *file, |
1803 | unsigned int line) | |
252b5132 | 1804 | { |
b84bf58a | 1805 | long min, max, right; |
eb42fac1 | 1806 | |
b84bf58a AM |
1807 | max = operand->bitm; |
1808 | right = max & -max; | |
1809 | min = 0; | |
1810 | ||
1811 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1812 | { |
b84bf58a | 1813 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1814 | max = (max >> 1) & -right; |
1815 | min = ~max & -right; | |
b84bf58a | 1816 | } |
252b5132 | 1817 | |
b84bf58a | 1818 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1819 | max++; |
252b5132 | 1820 | |
b84bf58a | 1821 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 AM |
1822 | { |
1823 | long tmp = min; | |
1824 | min = -max; | |
1825 | max = -tmp; | |
1826 | } | |
b84bf58a | 1827 | |
a1867a27 AM |
1828 | if (min <= max) |
1829 | { | |
1830 | /* Some people write constants with the sign extension done by | |
1831 | hand but only up to 32 bits. This shouldn't really be valid, | |
1832 | but, to permit this code to assemble on a 64-bit host, we | |
1833 | sign extend the 32-bit value to 64 bits if so doing makes the | |
1834 | value valid. */ | |
1835 | if (val > max | |
1836 | && (offsetT) (val - 0x80000000 - 0x80000000) >= min | |
1837 | && (offsetT) (val - 0x80000000 - 0x80000000) <= max | |
1838 | && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) | |
1839 | val = val - 0x80000000 - 0x80000000; | |
1840 | ||
1841 | /* Similarly, people write expressions like ~(1<<15), and expect | |
1842 | this to be OK for a 32-bit unsigned value. */ | |
1843 | else if (val < min | |
1844 | && (offsetT) (val + 0x80000000 + 0x80000000) >= min | |
1845 | && (offsetT) (val + 0x80000000 + 0x80000000) <= max | |
1846 | && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) | |
1847 | val = val + 0x80000000 + 0x80000000; | |
1848 | ||
1849 | else if (val < min | |
1850 | || val > max | |
1851 | || (val & (right - 1)) != 0) | |
1852 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
1853 | } | |
b84bf58a | 1854 | |
252b5132 RH |
1855 | if (operand->insert) |
1856 | { | |
1857 | const char *errmsg; | |
1858 | ||
1859 | errmsg = NULL; | |
91d6fa6a | 1860 | insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); |
252b5132 | 1861 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 1862 | as_bad_where (file, line, "%s", errmsg); |
252b5132 | 1863 | } |
b9c361e0 | 1864 | else if (operand->shift >= 0) |
b84bf58a | 1865 | insn |= ((long) val & operand->bitm) << operand->shift; |
b9c361e0 JL |
1866 | else |
1867 | insn |= ((long) val & operand->bitm) >> -operand->shift; | |
252b5132 RH |
1868 | |
1869 | return insn; | |
1870 | } | |
1871 | ||
1872 | \f | |
1873 | #ifdef OBJ_ELF | |
1874 | /* Parse @got, etc. and return the desired relocation. */ | |
1875 | static bfd_reloc_code_real_type | |
98027b10 | 1876 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
1877 | { |
1878 | struct map_bfd { | |
1879 | char *string; | |
b7d7dc63 AM |
1880 | unsigned int length : 8; |
1881 | unsigned int valid32 : 1; | |
1882 | unsigned int valid64 : 1; | |
1883 | unsigned int reloc; | |
252b5132 RH |
1884 | }; |
1885 | ||
1886 | char ident[20]; | |
1887 | char *str = *str_p; | |
1888 | char *str2; | |
1889 | int ch; | |
1890 | int len; | |
15c1449b | 1891 | const struct map_bfd *ptr; |
252b5132 | 1892 | |
b7d7dc63 AM |
1893 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1894 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1895 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1896 | |
15c1449b | 1897 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1898 | MAP ("l", BFD_RELOC_LO16), |
1899 | MAP ("h", BFD_RELOC_HI16), | |
1900 | MAP ("ha", BFD_RELOC_HI16_S), | |
1901 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1902 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1903 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1904 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1905 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1906 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1907 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1908 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1909 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1910 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1911 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1912 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1913 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1914 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1915 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1916 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1917 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1918 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1919 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1920 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1921 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1922 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1923 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1924 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1925 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1926 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1927 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1928 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1929 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1930 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1931 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1932 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1933 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1934 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1935 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1936 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1937 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1938 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1939 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1940 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1941 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1942 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1943 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1944 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1945 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1946 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1947 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1948 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
b9c361e0 JL |
1949 | MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), |
1950 | MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), | |
1951 | MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), | |
b7d7dc63 AM |
1952 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), |
1953 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1954 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1955 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1956 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1957 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1958 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1959 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1960 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
b9c361e0 | 1961 | MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), |
b7d7dc63 AM |
1962 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), |
1963 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1964 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1965 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1966 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1967 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1968 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1969 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
1970 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), | |
1971 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1972 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1973 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1974 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1975 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1976 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1977 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1978 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
1979 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), | |
1980 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1981 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1982 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
1983 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), | |
1984 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1985 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1986 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
1987 | { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } | |
252b5132 RH |
1988 | }; |
1989 | ||
1990 | if (*str++ != '@') | |
1991 | return BFD_RELOC_UNUSED; | |
1992 | ||
1993 | for (ch = *str, str2 = ident; | |
1994 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1995 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
1996 | ch = *++str) |
1997 | { | |
3882b010 | 1998 | *str2++ = TOLOWER (ch); |
252b5132 RH |
1999 | } |
2000 | ||
2001 | *str2 = '\0'; | |
2002 | len = str2 - ident; | |
2003 | ||
2004 | ch = ident[0]; | |
2005 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
2006 | if (ch == ptr->string[0] | |
2007 | && len == ptr->length | |
b7d7dc63 AM |
2008 | && memcmp (ident, ptr->string, ptr->length) == 0 |
2009 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 2010 | { |
15c1449b AM |
2011 | int reloc = ptr->reloc; |
2012 | ||
727fc41e AM |
2013 | if (!ppc_obj64 && exp_p->X_add_number != 0) |
2014 | { | |
2015 | switch (reloc) | |
2016 | { | |
2017 | case BFD_RELOC_16_GOTOFF: | |
2018 | case BFD_RELOC_LO16_GOTOFF: | |
2019 | case BFD_RELOC_HI16_GOTOFF: | |
2020 | case BFD_RELOC_HI16_S_GOTOFF: | |
2021 | as_warn (_("identifier+constant@got means " | |
2022 | "identifier@got+constant")); | |
2023 | break; | |
2024 | ||
2025 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
2026 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
2027 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
2028 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
2029 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
2030 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
2031 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
2032 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
2033 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
2034 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
2035 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
2036 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
2037 | case BFD_RELOC_PPC_GOT_TPREL16: | |
2038 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
2039 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
2040 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
2041 | as_bad (_("symbol+offset not supported for got tls")); | |
2042 | break; | |
2043 | } | |
2044 | } | |
5f6db75a AM |
2045 | |
2046 | /* Now check for identifier@suffix+constant. */ | |
2047 | if (*str == '-' || *str == '+') | |
252b5132 | 2048 | { |
5f6db75a AM |
2049 | char *orig_line = input_line_pointer; |
2050 | expressionS new_exp; | |
2051 | ||
2052 | input_line_pointer = str; | |
2053 | expression (&new_exp); | |
2054 | if (new_exp.X_op == O_constant) | |
252b5132 | 2055 | { |
5f6db75a AM |
2056 | exp_p->X_add_number += new_exp.X_add_number; |
2057 | str = input_line_pointer; | |
252b5132 | 2058 | } |
5f6db75a AM |
2059 | |
2060 | if (&input_line_pointer != str_p) | |
2061 | input_line_pointer = orig_line; | |
252b5132 | 2062 | } |
252b5132 | 2063 | *str_p = str; |
0baf16f2 | 2064 | |
2b3c4602 | 2065 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2066 | && exp_p->X_op == O_symbol |
2067 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2068 | { |
9f2b53d7 AM |
2069 | /* Change the symbol so that the dummy .TOC. symbol can be |
2070 | omitted from the object file. */ | |
0baf16f2 AM |
2071 | exp_p->X_add_symbol = &abs_symbol; |
2072 | } | |
2073 | ||
15c1449b | 2074 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2075 | } |
2076 | ||
2077 | return BFD_RELOC_UNUSED; | |
2078 | } | |
2079 | ||
99a814a1 AM |
2080 | /* Like normal .long/.short/.word, except support @got, etc. |
2081 | Clobbers input_line_pointer, checks end-of-line. */ | |
252b5132 | 2082 | static void |
98027b10 | 2083 | ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */) |
252b5132 RH |
2084 | { |
2085 | expressionS exp; | |
2086 | bfd_reloc_code_real_type reloc; | |
2087 | ||
2088 | if (is_it_end_of_statement ()) | |
2089 | { | |
2090 | demand_empty_rest_of_line (); | |
2091 | return; | |
2092 | } | |
2093 | ||
2094 | do | |
2095 | { | |
2096 | expression (&exp); | |
2097 | if (exp.X_op == O_symbol | |
2098 | && *input_line_pointer == '@' | |
99a814a1 AM |
2099 | && (reloc = ppc_elf_suffix (&input_line_pointer, |
2100 | &exp)) != BFD_RELOC_UNUSED) | |
252b5132 | 2101 | { |
99a814a1 AM |
2102 | reloc_howto_type *reloc_howto; |
2103 | int size; | |
2104 | ||
2105 | reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
2106 | size = bfd_get_reloc_size (reloc_howto); | |
252b5132 RH |
2107 | |
2108 | if (size > nbytes) | |
0baf16f2 AM |
2109 | { |
2110 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
2111 | reloc_howto->name, nbytes); | |
2112 | } | |
252b5132 RH |
2113 | else |
2114 | { | |
0baf16f2 AM |
2115 | char *p; |
2116 | int offset; | |
252b5132 | 2117 | |
0baf16f2 | 2118 | p = frag_more (nbytes); |
aa0c8c1a | 2119 | memset (p, 0, nbytes); |
0baf16f2 AM |
2120 | offset = 0; |
2121 | if (target_big_endian) | |
2122 | offset = nbytes - size; | |
99a814a1 AM |
2123 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
2124 | &exp, 0, reloc); | |
252b5132 RH |
2125 | } |
2126 | } | |
2127 | else | |
2128 | emit_expr (&exp, (unsigned int) nbytes); | |
2129 | } | |
2130 | while (*input_line_pointer++ == ','); | |
2131 | ||
99a814a1 AM |
2132 | /* Put terminator back into stream. */ |
2133 | input_line_pointer--; | |
252b5132 RH |
2134 | demand_empty_rest_of_line (); |
2135 | } | |
2136 | ||
2137 | /* Solaris pseduo op to change to the .rodata section. */ | |
2138 | static void | |
98027b10 | 2139 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2140 | { |
2141 | char *save_line = input_line_pointer; | |
2142 | static char section[] = ".rodata\n"; | |
2143 | ||
99a814a1 | 2144 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2145 | input_line_pointer = section; |
2146 | obj_elf_section (xxx); | |
2147 | ||
2148 | input_line_pointer = save_line; | |
2149 | } | |
2150 | ||
99a814a1 | 2151 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2152 | static void |
98027b10 | 2153 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2154 | { |
98027b10 AM |
2155 | char *name; |
2156 | char c; | |
2157 | char *p; | |
252b5132 | 2158 | offsetT size; |
98027b10 | 2159 | symbolS *symbolP; |
252b5132 RH |
2160 | offsetT align; |
2161 | segT old_sec; | |
2162 | int old_subsec; | |
2163 | char *pfrag; | |
2164 | int align2; | |
2165 | ||
2166 | name = input_line_pointer; | |
2167 | c = get_symbol_end (); | |
2168 | ||
99a814a1 | 2169 | /* just after name is now '\0'. */ |
252b5132 RH |
2170 | p = input_line_pointer; |
2171 | *p = c; | |
2172 | SKIP_WHITESPACE (); | |
2173 | if (*input_line_pointer != ',') | |
2174 | { | |
d6ed37ed | 2175 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
2176 | ignore_rest_of_line (); |
2177 | return; | |
2178 | } | |
2179 | ||
2180 | input_line_pointer++; /* skip ',' */ | |
2181 | if ((size = get_absolute_expression ()) < 0) | |
2182 | { | |
2183 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2184 | ignore_rest_of_line (); | |
2185 | return; | |
2186 | } | |
2187 | ||
2188 | /* The third argument to .lcomm is the alignment. */ | |
2189 | if (*input_line_pointer != ',') | |
2190 | align = 8; | |
2191 | else | |
2192 | { | |
2193 | ++input_line_pointer; | |
2194 | align = get_absolute_expression (); | |
2195 | if (align <= 0) | |
2196 | { | |
2197 | as_warn (_("ignoring bad alignment")); | |
2198 | align = 8; | |
2199 | } | |
2200 | } | |
2201 | ||
2202 | *p = 0; | |
2203 | symbolP = symbol_find_or_make (name); | |
2204 | *p = c; | |
2205 | ||
2206 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2207 | { | |
d6ed37ed | 2208 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
2209 | S_GET_NAME (symbolP)); |
2210 | ignore_rest_of_line (); | |
2211 | return; | |
2212 | } | |
2213 | ||
2214 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2215 | { | |
d6ed37ed | 2216 | as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
2217 | S_GET_NAME (symbolP), |
2218 | (long) S_GET_VALUE (symbolP), | |
2219 | (long) size); | |
2220 | ||
2221 | ignore_rest_of_line (); | |
2222 | return; | |
2223 | } | |
2224 | ||
99a814a1 | 2225 | /* Allocate_bss. */ |
252b5132 RH |
2226 | old_sec = now_seg; |
2227 | old_subsec = now_subseg; | |
2228 | if (align) | |
2229 | { | |
99a814a1 | 2230 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2231 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2232 | if (align != 1) | |
2233 | { | |
d6ed37ed | 2234 | as_bad (_("common alignment not a power of 2")); |
252b5132 RH |
2235 | ignore_rest_of_line (); |
2236 | return; | |
2237 | } | |
2238 | } | |
2239 | else | |
2240 | align2 = 0; | |
2241 | ||
2242 | record_alignment (bss_section, align2); | |
2243 | subseg_set (bss_section, 0); | |
2244 | if (align2) | |
2245 | frag_align (align2, 0, 0); | |
2246 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2247 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2248 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2249 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2250 | (char *) 0); | |
2251 | *pfrag = 0; | |
2252 | S_SET_SIZE (symbolP, size); | |
2253 | S_SET_SEGMENT (symbolP, bss_section); | |
2254 | subseg_set (old_sec, old_subsec); | |
2255 | demand_empty_rest_of_line (); | |
2256 | } | |
2257 | ||
2258 | /* Validate any relocations emitted for -mrelocatable, possibly adding | |
2259 | fixups for word relocations in writable segments, so we can adjust | |
2260 | them at runtime. */ | |
2261 | static void | |
98027b10 | 2262 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2263 | { |
2264 | if (fixp->fx_done || fixp->fx_pcrel) | |
2265 | return; | |
2266 | ||
2267 | switch (shlib) | |
2268 | { | |
2269 | case SHLIB_NONE: | |
2270 | case SHLIB_PIC: | |
2271 | return; | |
2272 | ||
5d6f4f16 | 2273 | case SHLIB_MRELOCATABLE: |
252b5132 RH |
2274 | if (fixp->fx_r_type <= BFD_RELOC_UNUSED |
2275 | && fixp->fx_r_type != BFD_RELOC_16_GOTOFF | |
2276 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
2277 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2278 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2279 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2280 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2281 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2282 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2283 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2284 | && strcmp (segment_name (seg), ".got2") != 0 |
2285 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2286 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2287 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2288 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2289 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2290 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2291 | { | |
2292 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2293 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2294 | { | |
2295 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
d6ed37ed | 2296 | _("relocation cannot be done when using -mrelocatable")); |
252b5132 RH |
2297 | } |
2298 | } | |
2299 | return; | |
2300 | } | |
2301 | } | |
0baf16f2 | 2302 | |
7e8d4ab4 AM |
2303 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2304 | function descriptor sym if the corresponding code sym is used. */ | |
2305 | ||
2306 | void | |
98027b10 | 2307 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2308 | { |
7e8d4ab4 | 2309 | symbolS *symp; |
9232bbb0 | 2310 | asection *toc; |
0baf16f2 | 2311 | |
7e8d4ab4 AM |
2312 | if (!ppc_obj64) |
2313 | return; | |
2314 | ||
2315 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2316 | { |
7e8d4ab4 AM |
2317 | const char *name; |
2318 | char *dotname; | |
2319 | symbolS *dotsym; | |
2320 | size_t len; | |
2321 | ||
2322 | name = S_GET_NAME (symp); | |
2323 | if (name[0] == '.') | |
2324 | continue; | |
2325 | ||
2326 | if (! S_IS_WEAK (symp) | |
2327 | || S_IS_DEFINED (symp)) | |
2328 | continue; | |
2329 | ||
2330 | len = strlen (name) + 1; | |
2331 | dotname = xmalloc (len + 1); | |
2332 | dotname[0] = '.'; | |
2333 | memcpy (dotname + 1, name, len); | |
461b725f | 2334 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2335 | free (dotname); |
2336 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2337 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2338 | symbol_mark_used (symp); |
2339 | ||
0baf16f2 AM |
2340 | } |
2341 | ||
9232bbb0 AM |
2342 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2343 | if (toc != NULL | |
01efc3af | 2344 | && toc_reloc_types != has_large_toc_reloc |
9232bbb0 AM |
2345 | && bfd_section_size (stdoutput, toc) > 0x10000) |
2346 | as_warn (_("TOC section size exceeds 64k")); | |
2347 | ||
7e8d4ab4 AM |
2348 | /* Don't emit .TOC. symbol. */ |
2349 | symp = symbol_find (".TOC."); | |
2350 | if (symp != NULL) | |
2351 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
0baf16f2 | 2352 | } |
252b5132 RH |
2353 | #endif /* OBJ_ELF */ |
2354 | \f | |
2355 | #ifdef TE_PE | |
2356 | ||
2357 | /* | |
99a814a1 | 2358 | * Summary of parse_toc_entry. |
252b5132 RH |
2359 | * |
2360 | * in: Input_line_pointer points to the '[' in one of: | |
2361 | * | |
2362 | * [toc] [tocv] [toc32] [toc64] | |
2363 | * | |
2364 | * Anything else is an error of one kind or another. | |
2365 | * | |
81d4177b | 2366 | * out: |
252b5132 RH |
2367 | * return value: success or failure |
2368 | * toc_kind: kind of toc reference | |
2369 | * input_line_pointer: | |
2370 | * success: first char after the ']' | |
2371 | * failure: unchanged | |
2372 | * | |
2373 | * settings: | |
2374 | * | |
2375 | * [toc] - rv == success, toc_kind = default_toc | |
2376 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2377 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2378 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2379 | * | |
2380 | */ | |
2381 | ||
81d4177b KH |
2382 | enum toc_size_qualifier |
2383 | { | |
252b5132 RH |
2384 | default_toc, /* The toc cell constructed should be the system default size */ |
2385 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2386 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2387 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2388 | }; | |
2389 | ||
2390 | static int | |
98027b10 | 2391 | parse_toc_entry (enum toc_size_qualifier *toc_kind) |
252b5132 RH |
2392 | { |
2393 | char *start; | |
2394 | char *toc_spec; | |
2395 | char c; | |
2396 | enum toc_size_qualifier t; | |
2397 | ||
99a814a1 | 2398 | /* Save the input_line_pointer. */ |
252b5132 RH |
2399 | start = input_line_pointer; |
2400 | ||
99a814a1 | 2401 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2402 | ++input_line_pointer; |
2403 | SKIP_WHITESPACE (); | |
81d4177b | 2404 | |
99a814a1 | 2405 | /* Find the spelling of the operand. */ |
252b5132 RH |
2406 | toc_spec = input_line_pointer; |
2407 | c = get_symbol_end (); | |
2408 | ||
99a814a1 | 2409 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2410 | { |
2411 | t = default_toc; | |
2412 | } | |
99a814a1 | 2413 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2414 | { |
2415 | t = data_in_toc; | |
2416 | } | |
99a814a1 | 2417 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2418 | { |
2419 | t = must_be_32; | |
2420 | } | |
99a814a1 | 2421 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2422 | { |
2423 | t = must_be_64; | |
2424 | } | |
2425 | else | |
2426 | { | |
2427 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2428 | *input_line_pointer = c; |
2429 | input_line_pointer = start; | |
252b5132 RH |
2430 | return 0; |
2431 | } | |
2432 | ||
99a814a1 AM |
2433 | /* Now find the ']'. */ |
2434 | *input_line_pointer = c; | |
252b5132 | 2435 | |
81d4177b KH |
2436 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2437 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2438 | |
2439 | if (c != ']') | |
2440 | { | |
2441 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2442 | input_line_pointer = start; |
252b5132 RH |
2443 | return 0; |
2444 | } | |
2445 | ||
99a814a1 | 2446 | *toc_kind = t; |
252b5132 RH |
2447 | return 1; |
2448 | } | |
2449 | #endif | |
2450 | \f | |
2451 | ||
dc1d03fc | 2452 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2453 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2454 | static void | |
98027b10 | 2455 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2456 | { |
2457 | unsigned int i; | |
2458 | ||
2459 | /* Check we don't already exist. */ | |
2460 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2461 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2462 | return; |
b34976b6 | 2463 | |
6a0c61b7 EZ |
2464 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2465 | { | |
2466 | if (ppc_apuinfo_num_alloc == 0) | |
2467 | { | |
2468 | ppc_apuinfo_num_alloc = 4; | |
2469 | ppc_apuinfo_list = (unsigned long *) | |
2470 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2471 | } | |
2472 | else | |
2473 | { | |
2474 | ppc_apuinfo_num_alloc += 4; | |
2475 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2476 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2477 | } | |
2478 | } | |
dc1d03fc | 2479 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2480 | } |
2481 | #undef APUID | |
dc1d03fc | 2482 | #endif |
6a0c61b7 EZ |
2483 | \f |
2484 | ||
252b5132 RH |
2485 | /* We need to keep a list of fixups. We can't simply generate them as |
2486 | we go, because that would require us to first create the frag, and | |
2487 | that would screw up references to ``.''. */ | |
2488 | ||
2489 | struct ppc_fixup | |
2490 | { | |
2491 | expressionS exp; | |
2492 | int opindex; | |
2493 | bfd_reloc_code_real_type reloc; | |
2494 | }; | |
2495 | ||
2496 | #define MAX_INSN_FIXUPS (5) | |
2497 | ||
b9c361e0 JL |
2498 | /* Form I16L. */ |
2499 | #define E_OR2I_INSN 0x7000C000 | |
2500 | #define E_AND2I_DOT_INSN 0x7000C800 | |
2501 | #define E_OR2IS_INSN 0x7000D000 | |
2502 | #define E_LIS_INSN 0x7000E000 | |
2503 | #define E_AND2IS_DOT_INSN 0x7000E800 | |
2504 | ||
2505 | /* Form I16A. */ | |
2506 | #define E_ADD2I_DOT_INSN 0x70008800 | |
2507 | #define E_ADD2IS_INSN 0x70009000 | |
2508 | #define E_CMP16I_INSN 0x70009800 | |
2509 | #define E_MULL2I_INSN 0x7000A000 | |
2510 | #define E_CMPL16I_INSN 0x7000A800 | |
2511 | #define E_CMPH16I_INSN 0x7000B000 | |
2512 | #define E_CMPHL16I_INSN 0x7000B800 | |
2513 | ||
252b5132 RH |
2514 | /* This routine is called for each instruction to be assembled. */ |
2515 | ||
2516 | void | |
98027b10 | 2517 | md_assemble (char *str) |
252b5132 RH |
2518 | { |
2519 | char *s; | |
2520 | const struct powerpc_opcode *opcode; | |
2521 | unsigned long insn; | |
2522 | const unsigned char *opindex_ptr; | |
2523 | int skip_optional; | |
2524 | int need_paren; | |
2525 | int next_opindex; | |
2526 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2527 | int fc; | |
2528 | char *f; | |
09b935ac | 2529 | int addr_mod; |
252b5132 | 2530 | int i; |
b9c361e0 | 2531 | unsigned int insn_length; |
252b5132 RH |
2532 | #ifdef OBJ_ELF |
2533 | bfd_reloc_code_real_type reloc; | |
2534 | #endif | |
2535 | ||
2536 | /* Get the opcode. */ | |
3882b010 | 2537 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2538 | ; |
2539 | if (*s != '\0') | |
2540 | *s++ = '\0'; | |
2541 | ||
2542 | /* Look up the opcode in the hash table. */ | |
2543 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2544 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2545 | { | |
2546 | const struct powerpc_macro *macro; | |
2547 | ||
2548 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2549 | if (macro == (const struct powerpc_macro *) NULL) | |
d6ed37ed | 2550 | as_bad (_("unrecognized opcode: `%s'"), str); |
252b5132 RH |
2551 | else |
2552 | ppc_macro (s, macro); | |
2553 | ||
2554 | return; | |
2555 | } | |
2556 | ||
2557 | insn = opcode->opcode; | |
2558 | ||
2559 | str = s; | |
3882b010 | 2560 | while (ISSPACE (*str)) |
252b5132 RH |
2561 | ++str; |
2562 | ||
2563 | /* PowerPC operands are just expressions. The only real issue is | |
2564 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2565 | an optional operand separate the operands only with commas (in some |
2566 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2567 | have optional operands). Most instructions with optional operands | |
2568 | have only one. Those that have more than one optional operand can | |
2569 | take either all their operands or none. So, before we start seriously | |
2570 | parsing the operands, we check to see if we have optional operands, | |
2571 | and if we do, we count the number of commas to see which operands | |
2572 | have been omitted. */ | |
252b5132 RH |
2573 | skip_optional = 0; |
2574 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2575 | { | |
2576 | const struct powerpc_operand *operand; | |
2577 | ||
2578 | operand = &powerpc_operands[*opindex_ptr]; | |
2579 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2580 | { | |
2581 | unsigned int opcount; | |
7fe9cf6b | 2582 | unsigned int num_operands_expected; |
252b5132 RH |
2583 | |
2584 | /* There is an optional operand. Count the number of | |
2585 | commas in the input line. */ | |
2586 | if (*str == '\0') | |
2587 | opcount = 0; | |
2588 | else | |
2589 | { | |
2590 | opcount = 1; | |
2591 | s = str; | |
2592 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2593 | { | |
2594 | ++opcount; | |
2595 | ++s; | |
2596 | } | |
2597 | } | |
2598 | ||
7fe9cf6b NC |
2599 | /* Compute the number of expected operands. |
2600 | Do not count fake operands. */ | |
2601 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2602 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2603 | ++ num_operands_expected; | |
2604 | ||
252b5132 RH |
2605 | /* If there are fewer operands in the line then are called |
2606 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2607 | operands. */ |
7fe9cf6b | 2608 | if (opcount < num_operands_expected) |
252b5132 RH |
2609 | skip_optional = 1; |
2610 | ||
2611 | break; | |
2612 | } | |
2613 | } | |
2614 | ||
2615 | /* Gather the operands. */ | |
2616 | need_paren = 0; | |
2617 | next_opindex = 0; | |
2618 | fc = 0; | |
2619 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2620 | { | |
2621 | const struct powerpc_operand *operand; | |
2622 | const char *errmsg; | |
2623 | char *hold; | |
2624 | expressionS ex; | |
2625 | char endc; | |
2626 | ||
2627 | if (next_opindex == 0) | |
2628 | operand = &powerpc_operands[*opindex_ptr]; | |
2629 | else | |
2630 | { | |
2631 | operand = &powerpc_operands[next_opindex]; | |
2632 | next_opindex = 0; | |
2633 | } | |
252b5132 RH |
2634 | errmsg = NULL; |
2635 | ||
2636 | /* If this is a fake operand, then we do not expect anything | |
2637 | from the input. */ | |
2638 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2639 | { | |
2b3c4602 | 2640 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2641 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2642 | as_bad ("%s", errmsg); |
252b5132 RH |
2643 | continue; |
2644 | } | |
2645 | ||
2646 | /* If this is an optional operand, and we are skipping it, just | |
2647 | insert a zero. */ | |
2648 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2649 | && skip_optional) | |
2650 | { | |
2651 | if (operand->insert) | |
2652 | { | |
2b3c4602 | 2653 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2654 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2655 | as_bad ("%s", errmsg); |
252b5132 RH |
2656 | } |
2657 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2658 | next_opindex = *opindex_ptr + 1; | |
2659 | continue; | |
2660 | } | |
2661 | ||
2662 | /* Gather the operand. */ | |
2663 | hold = input_line_pointer; | |
2664 | input_line_pointer = str; | |
2665 | ||
2666 | #ifdef TE_PE | |
81d4177b | 2667 | if (*input_line_pointer == '[') |
252b5132 RH |
2668 | { |
2669 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2670 | * |
2671 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2672 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2673 | * The argument following the `]' must be a symbol name, and the | |
2674 | * register must be the toc register: 'rtoc' or '2' | |
2675 | * | |
2676 | * The effect is to 0 as the displacement field | |
2677 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2678 | * the appropriate variation) reloc against it based on the symbol. | |
2679 | * The linker will build the toc, and insert the resolved toc offset. | |
2680 | * | |
2681 | * Note: | |
2682 | * o The size of the toc entry is currently assumed to be | |
2683 | * 32 bits. This should not be assumed to be a hard coded | |
2684 | * number. | |
2685 | * o In an effort to cope with a change from 32 to 64 bits, | |
2686 | * there are also toc entries that are specified to be | |
2687 | * either 32 or 64 bits: | |
2688 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2689 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2690 | * These demand toc entries of the specified size, and the | |
2691 | * instruction probably requires it. | |
2692 | */ | |
252b5132 RH |
2693 | |
2694 | int valid_toc; | |
2695 | enum toc_size_qualifier toc_kind; | |
2696 | bfd_reloc_code_real_type toc_reloc; | |
2697 | ||
99a814a1 AM |
2698 | /* Go parse off the [tocXX] part. */ |
2699 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2700 | |
81d4177b | 2701 | if (!valid_toc) |
252b5132 | 2702 | { |
99a814a1 AM |
2703 | /* Note: message has already been issued. |
2704 | FIXME: what sort of recovery should we do? | |
2705 | demand_rest_of_line (); return; ? */ | |
252b5132 RH |
2706 | } |
2707 | ||
99a814a1 AM |
2708 | /* Now get the symbol following the ']'. */ |
2709 | expression (&ex); | |
252b5132 RH |
2710 | |
2711 | switch (toc_kind) | |
2712 | { | |
2713 | case default_toc: | |
99a814a1 AM |
2714 | /* In this case, we may not have seen the symbol yet, |
2715 | since it is allowed to appear on a .extern or .globl | |
2716 | or just be a label in the .data section. */ | |
252b5132 RH |
2717 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2718 | break; | |
2719 | case data_in_toc: | |
99a814a1 AM |
2720 | /* 1. The symbol must be defined and either in the toc |
2721 | section, or a global. | |
2722 | 2. The reloc generated must have the TOCDEFN flag set | |
2723 | in upper bit mess of the reloc type. | |
2724 | FIXME: It's a little confusing what the tocv | |
2725 | qualifier can be used for. At the very least, I've | |
2726 | seen three uses, only one of which I'm sure I can | |
2727 | explain. */ | |
81d4177b KH |
2728 | if (ex.X_op == O_symbol) |
2729 | { | |
9c2799c2 | 2730 | gas_assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2731 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2732 | != tocdata_section) | |
252b5132 | 2733 | { |
99a814a1 | 2734 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2735 | } |
2736 | } | |
2737 | ||
2738 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2739 | break; | |
2740 | case must_be_32: | |
99a814a1 AM |
2741 | /* FIXME: these next two specifically specify 32/64 bit |
2742 | toc entries. We don't support them today. Is this | |
2743 | the right way to say that? */ | |
252b5132 | 2744 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2745 | as_bad (_("unimplemented toc32 expression modifier")); |
252b5132 RH |
2746 | break; |
2747 | case must_be_64: | |
99a814a1 | 2748 | /* FIXME: see above. */ |
252b5132 | 2749 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2750 | as_bad (_("unimplemented toc64 expression modifier")); |
252b5132 RH |
2751 | break; |
2752 | default: | |
bc805888 | 2753 | fprintf (stderr, |
99a814a1 AM |
2754 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2755 | toc_kind); | |
bc805888 | 2756 | abort (); |
252b5132 RH |
2757 | break; |
2758 | } | |
2759 | ||
2760 | /* We need to generate a fixup for this expression. */ | |
2761 | if (fc >= MAX_INSN_FIXUPS) | |
2762 | as_fatal (_("too many fixups")); | |
2763 | ||
2764 | fixups[fc].reloc = toc_reloc; | |
2765 | fixups[fc].exp = ex; | |
2766 | fixups[fc].opindex = *opindex_ptr; | |
2767 | ++fc; | |
2768 | ||
99a814a1 AM |
2769 | /* Ok. We've set up the fixup for the instruction. Now make it |
2770 | look like the constant 0 was found here. */ | |
252b5132 RH |
2771 | ex.X_unsigned = 1; |
2772 | ex.X_op = O_constant; | |
2773 | ex.X_add_number = 0; | |
2774 | ex.X_add_symbol = NULL; | |
2775 | ex.X_op_symbol = NULL; | |
2776 | } | |
2777 | ||
2778 | else | |
2779 | #endif /* TE_PE */ | |
2780 | { | |
b9c361e0 JL |
2781 | if ((reg_names_p |
2782 | && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
2783 | || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) | |
2ad068be | 2784 | || !register_name (&ex)) |
252b5132 | 2785 | { |
13abbae3 AM |
2786 | char save_lex = lex_type['%']; |
2787 | ||
b9c361e0 JL |
2788 | if (((operand->flags & PPC_OPERAND_CR_REG) != 0) |
2789 | || (operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
13abbae3 AM |
2790 | { |
2791 | cr_operand = TRUE; | |
2792 | lex_type['%'] |= LEX_BEGIN_NAME; | |
2793 | } | |
252b5132 | 2794 | expression (&ex); |
b34976b6 | 2795 | cr_operand = FALSE; |
13abbae3 | 2796 | lex_type['%'] = save_lex; |
252b5132 RH |
2797 | } |
2798 | } | |
2799 | ||
2800 | str = input_line_pointer; | |
2801 | input_line_pointer = hold; | |
2802 | ||
2803 | if (ex.X_op == O_illegal) | |
2804 | as_bad (_("illegal operand")); | |
2805 | else if (ex.X_op == O_absent) | |
2806 | as_bad (_("missing operand")); | |
2807 | else if (ex.X_op == O_register) | |
2808 | { | |
2809 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
783de163 | 2810 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2811 | } |
2812 | else if (ex.X_op == O_constant) | |
2813 | { | |
2814 | #ifdef OBJ_ELF | |
81d4177b | 2815 | /* Allow @HA, @L, @H on constants. */ |
252b5132 RH |
2816 | char *orig_str = str; |
2817 | ||
2818 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2819 | switch (reloc) | |
2820 | { | |
2821 | default: | |
2822 | str = orig_str; | |
2823 | break; | |
2824 | ||
2825 | case BFD_RELOC_LO16: | |
2826 | /* X_unsigned is the default, so if the user has done | |
0baf16f2 AM |
2827 | something which cleared it, we always produce a |
2828 | signed value. */ | |
2829 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
252b5132 RH |
2830 | ex.X_add_number &= 0xffff; |
2831 | else | |
0baf16f2 | 2832 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2833 | break; |
2834 | ||
2835 | case BFD_RELOC_HI16: | |
0baf16f2 AM |
2836 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2837 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2838 | else | |
2839 | ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); | |
252b5132 RH |
2840 | break; |
2841 | ||
2842 | case BFD_RELOC_HI16_S: | |
0baf16f2 AM |
2843 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2844 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2845 | else | |
2846 | ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); | |
2847 | break; | |
2848 | ||
0baf16f2 AM |
2849 | case BFD_RELOC_PPC64_HIGHER: |
2850 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2851 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); | |
2852 | else | |
2853 | ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); | |
2854 | break; | |
2855 | ||
2856 | case BFD_RELOC_PPC64_HIGHER_S: | |
2857 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2858 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); | |
2859 | else | |
2860 | ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); | |
252b5132 | 2861 | break; |
0baf16f2 AM |
2862 | |
2863 | case BFD_RELOC_PPC64_HIGHEST: | |
2864 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2865 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); | |
2866 | else | |
2867 | ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); | |
2868 | break; | |
2869 | ||
2870 | case BFD_RELOC_PPC64_HIGHEST_S: | |
2871 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2872 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); | |
2873 | else | |
2874 | ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); | |
2875 | break; | |
252b5132 | 2876 | } |
0baf16f2 | 2877 | #endif /* OBJ_ELF */ |
252b5132 | 2878 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 2879 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2880 | } |
2881 | #ifdef OBJ_ELF | |
727fc41e | 2882 | else |
252b5132 | 2883 | { |
727fc41e | 2884 | if (ex.X_op == O_symbol && str[0] == '(') |
cdba85ec | 2885 | { |
727fc41e AM |
2886 | const char *sym_name = S_GET_NAME (ex.X_add_symbol); |
2887 | if (sym_name[0] == '.') | |
2888 | ++sym_name; | |
cdba85ec | 2889 | |
727fc41e | 2890 | if (strcasecmp (sym_name, "__tls_get_addr") == 0) |
252b5132 | 2891 | { |
727fc41e AM |
2892 | expressionS tls_exp; |
2893 | ||
2894 | hold = input_line_pointer; | |
2895 | input_line_pointer = str + 1; | |
2896 | expression (&tls_exp); | |
2897 | if (tls_exp.X_op == O_symbol) | |
2898 | { | |
2899 | reloc = BFD_RELOC_UNUSED; | |
2900 | if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) | |
2901 | { | |
2902 | reloc = BFD_RELOC_PPC_TLSGD; | |
2903 | input_line_pointer += 7; | |
2904 | } | |
2905 | else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) | |
2906 | { | |
2907 | reloc = BFD_RELOC_PPC_TLSLD; | |
2908 | input_line_pointer += 7; | |
2909 | } | |
2910 | if (reloc != BFD_RELOC_UNUSED) | |
2911 | { | |
2912 | SKIP_WHITESPACE (); | |
2913 | str = input_line_pointer; | |
2914 | ||
2915 | if (fc >= MAX_INSN_FIXUPS) | |
2916 | as_fatal (_("too many fixups")); | |
2917 | fixups[fc].exp = tls_exp; | |
2918 | fixups[fc].opindex = *opindex_ptr; | |
2919 | fixups[fc].reloc = reloc; | |
2920 | ++fc; | |
2921 | } | |
2922 | } | |
2923 | input_line_pointer = hold; | |
252b5132 RH |
2924 | } |
2925 | } | |
2926 | ||
727fc41e | 2927 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) |
0baf16f2 | 2928 | { |
727fc41e | 2929 | /* Some TLS tweaks. */ |
0baf16f2 AM |
2930 | switch (reloc) |
2931 | { | |
727fc41e | 2932 | default: |
cdba85ec | 2933 | break; |
727fc41e AM |
2934 | |
2935 | case BFD_RELOC_PPC_TLS: | |
2d0f3896 AM |
2936 | if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) |
2937 | as_bad (_("@tls may not be used with \"%s\" operands"), | |
2938 | opcode->name); | |
2939 | else if (operand->shift != 11) | |
2940 | as_bad (_("@tls may only be used in last operand")); | |
2941 | else | |
2942 | insn = ppc_insert_operand (insn, operand, | |
2943 | ppc_obj64 ? 13 : 2, | |
2944 | ppc_cpu, (char *) NULL, 0); | |
cdba85ec | 2945 | break; |
727fc41e AM |
2946 | |
2947 | /* We'll only use the 32 (or 64) bit form of these relocations | |
2948 | in constants. Instructions get the 16 bit form. */ | |
2949 | case BFD_RELOC_PPC_DTPREL: | |
2950 | reloc = BFD_RELOC_PPC_DTPREL16; | |
cdba85ec | 2951 | break; |
727fc41e AM |
2952 | case BFD_RELOC_PPC_TPREL: |
2953 | reloc = BFD_RELOC_PPC_TPREL16; | |
0baf16f2 AM |
2954 | break; |
2955 | } | |
727fc41e | 2956 | |
b9c361e0 JL |
2957 | /* If VLE-mode convert LO/HI/HA relocations. */ |
2958 | if (opcode->flags & PPC_OPCODE_VLE) | |
2959 | { | |
2960 | int tmp_insn = insn & opcode->mask; | |
2961 | ||
2962 | int use_d_reloc = (tmp_insn == E_OR2I_INSN | |
2963 | || tmp_insn == E_AND2I_DOT_INSN | |
2964 | || tmp_insn == E_OR2IS_INSN | |
2965 | || tmp_insn == E_LIS_INSN | |
2966 | || tmp_insn == E_AND2IS_DOT_INSN); | |
2967 | ||
2968 | ||
2969 | int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN | |
2970 | || tmp_insn == E_ADD2IS_INSN | |
2971 | || tmp_insn == E_CMP16I_INSN | |
2972 | || tmp_insn == E_MULL2I_INSN | |
2973 | || tmp_insn == E_CMPL16I_INSN | |
2974 | || tmp_insn == E_CMPH16I_INSN | |
2975 | || tmp_insn == E_CMPHL16I_INSN); | |
2976 | ||
2977 | switch (reloc) | |
2978 | { | |
2979 | default: | |
2980 | break; | |
2981 | ||
2982 | case BFD_RELOC_PPC_EMB_SDA21: | |
2983 | reloc = BFD_RELOC_PPC_VLE_SDA21; | |
2984 | break; | |
2985 | ||
2986 | case BFD_RELOC_LO16: | |
2987 | if (use_d_reloc) | |
2988 | reloc = BFD_RELOC_PPC_VLE_LO16D; | |
2989 | else if (use_a_reloc) | |
2990 | reloc = BFD_RELOC_PPC_VLE_LO16A; | |
2991 | break; | |
2992 | ||
2993 | case BFD_RELOC_HI16: | |
2994 | if (use_d_reloc) | |
2995 | reloc = BFD_RELOC_PPC_VLE_HI16D; | |
2996 | else if (use_a_reloc) | |
2997 | reloc = BFD_RELOC_PPC_VLE_HI16A; | |
2998 | break; | |
2999 | ||
3000 | case BFD_RELOC_HI16_S: | |
3001 | if (use_d_reloc) | |
3002 | reloc = BFD_RELOC_PPC_VLE_HA16D; | |
3003 | else if (use_a_reloc) | |
3004 | reloc = BFD_RELOC_PPC_VLE_HA16A; | |
3005 | break; | |
3006 | ||
3007 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
3008 | if (use_d_reloc) | |
3009 | reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; | |
3010 | break; | |
3011 | ||
3012 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3013 | if (use_d_reloc) | |
3014 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; | |
3015 | break; | |
3016 | ||
3017 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3018 | if (use_d_reloc) | |
3019 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; | |
3020 | break; | |
3021 | } | |
3022 | } | |
3023 | ||
727fc41e AM |
3024 | /* For the absolute forms of branches, convert the PC |
3025 | relative form back into the absolute. */ | |
3026 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) | |
3027 | { | |
3028 | switch (reloc) | |
3029 | { | |
3030 | case BFD_RELOC_PPC_B26: | |
3031 | reloc = BFD_RELOC_PPC_BA26; | |
3032 | break; | |
3033 | case BFD_RELOC_PPC_B16: | |
3034 | reloc = BFD_RELOC_PPC_BA16; | |
3035 | break; | |
3036 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3037 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
3038 | break; | |
3039 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3040 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
3041 | break; | |
3042 | default: | |
3043 | break; | |
3044 | } | |
3045 | } | |
3046 | ||
01efc3af AM |
3047 | switch (reloc) |
3048 | { | |
3049 | case BFD_RELOC_PPC_TOC16: | |
3050 | toc_reloc_types |= has_small_toc_reloc; | |
3051 | break; | |
3052 | case BFD_RELOC_PPC64_TOC16_LO: | |
3053 | case BFD_RELOC_PPC64_TOC16_HI: | |
3054 | case BFD_RELOC_PPC64_TOC16_HA: | |
3055 | toc_reloc_types |= has_large_toc_reloc; | |
3056 | break; | |
3057 | default: | |
3058 | break; | |
3059 | } | |
3060 | ||
727fc41e AM |
3061 | if (ppc_obj64 |
3062 | && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) | |
3063 | { | |
3064 | switch (reloc) | |
3065 | { | |
3066 | case BFD_RELOC_16: | |
3067 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3068 | break; | |
3069 | case BFD_RELOC_LO16: | |
3070 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
3071 | break; | |
3072 | case BFD_RELOC_16_GOTOFF: | |
3073 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
3074 | break; | |
3075 | case BFD_RELOC_LO16_GOTOFF: | |
3076 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
3077 | break; | |
3078 | case BFD_RELOC_LO16_PLTOFF: | |
3079 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
3080 | break; | |
3081 | case BFD_RELOC_16_BASEREL: | |
3082 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; | |
3083 | break; | |
3084 | case BFD_RELOC_LO16_BASEREL: | |
3085 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
3086 | break; | |
3087 | case BFD_RELOC_PPC_TOC16: | |
3088 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3089 | break; | |
3090 | case BFD_RELOC_PPC64_TOC16_LO: | |
3091 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
3092 | break; | |
3093 | case BFD_RELOC_PPC64_PLTGOT16: | |
3094 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
3095 | break; | |
3096 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
3097 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
3098 | break; | |
3099 | case BFD_RELOC_PPC_DTPREL16: | |
3100 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
3101 | break; | |
3102 | case BFD_RELOC_PPC_DTPREL16_LO: | |
3103 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
3104 | break; | |
3105 | case BFD_RELOC_PPC_TPREL16: | |
3106 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
3107 | break; | |
3108 | case BFD_RELOC_PPC_TPREL16_LO: | |
3109 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
3110 | break; | |
3111 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
3112 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3113 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3114 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3115 | break; | |
3116 | default: | |
3117 | as_bad (_("unsupported relocation for DS offset field")); | |
3118 | break; | |
3119 | } | |
3120 | } | |
0baf16f2 AM |
3121 | } |
3122 | ||
252b5132 RH |
3123 | /* We need to generate a fixup for this expression. */ |
3124 | if (fc >= MAX_INSN_FIXUPS) | |
3125 | as_fatal (_("too many fixups")); | |
3126 | fixups[fc].exp = ex; | |
727fc41e | 3127 | fixups[fc].opindex = *opindex_ptr; |
252b5132 RH |
3128 | fixups[fc].reloc = reloc; |
3129 | ++fc; | |
3130 | } | |
727fc41e | 3131 | #else /* OBJ_ELF */ |
252b5132 RH |
3132 | else |
3133 | { | |
3134 | /* We need to generate a fixup for this expression. */ | |
3135 | if (fc >= MAX_INSN_FIXUPS) | |
3136 | as_fatal (_("too many fixups")); | |
3137 | fixups[fc].exp = ex; | |
3138 | fixups[fc].opindex = *opindex_ptr; | |
3139 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
3140 | ++fc; | |
3141 | } | |
727fc41e | 3142 | #endif /* OBJ_ELF */ |
252b5132 RH |
3143 | |
3144 | if (need_paren) | |
3145 | { | |
3146 | endc = ')'; | |
3147 | need_paren = 0; | |
c3d65c1c BE |
3148 | /* If expecting more operands, then we want to see "),". */ |
3149 | if (*str == endc && opindex_ptr[1] != 0) | |
3150 | { | |
3151 | do | |
3152 | ++str; | |
3153 | while (ISSPACE (*str)); | |
3154 | endc = ','; | |
3155 | } | |
252b5132 RH |
3156 | } |
3157 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
3158 | { | |
3159 | endc = '('; | |
3160 | need_paren = 1; | |
3161 | } | |
3162 | else | |
3163 | endc = ','; | |
3164 | ||
3165 | /* The call to expression should have advanced str past any | |
3166 | whitespace. */ | |
3167 | if (*str != endc | |
3168 | && (endc != ',' || *str != '\0')) | |
3169 | { | |
5a938047 AM |
3170 | if (*str == '\0') |
3171 | as_bad (_("syntax error; end of line, expected `%c'"), endc); | |
3172 | else | |
3173 | as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); | |
252b5132 RH |
3174 | break; |
3175 | } | |
3176 | ||
3177 | if (*str != '\0') | |
3178 | ++str; | |
3179 | } | |
3180 | ||
3882b010 | 3181 | while (ISSPACE (*str)) |
252b5132 RH |
3182 | ++str; |
3183 | ||
3184 | if (*str != '\0') | |
3185 | as_bad (_("junk at end of line: `%s'"), str); | |
3186 | ||
dc1d03fc | 3187 | #ifdef OBJ_ELF |
b9c361e0 JL |
3188 | /* Do we need/want an APUinfo section? */ |
3189 | if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0) | |
6a0c61b7 EZ |
3190 | { |
3191 | /* These are all version "1". */ | |
3192 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 3193 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 3194 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 3195 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 3196 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 3197 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 3198 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 3199 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 3200 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 3201 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 3202 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 3203 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 3204 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 3205 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
b9c361e0 JL |
3206 | if (opcode->flags & PPC_OPCODE_VLE) |
3207 | ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); | |
6a0c61b7 | 3208 | } |
dc1d03fc | 3209 | #endif |
6a0c61b7 | 3210 | |
252b5132 | 3211 | /* Write out the instruction. */ |
b9c361e0 JL |
3212 | /* Differentiate between two and four byte insns. */ |
3213 | if (ppc_mach () == bfd_mach_ppc_vle) | |
3214 | { | |
3215 | if (PPC_OP_SE_VLE (insn)) | |
3216 | insn_length = 2; | |
3217 | else | |
3218 | insn_length = 4; | |
3219 | addr_mod = frag_now_fix () & 1; | |
3220 | } | |
3221 | else | |
3222 | { | |
3223 | insn_length = 4; | |
3224 | addr_mod = frag_now_fix () & 3; | |
3225 | } | |
3226 | /* All instructions can start on a 2 byte boundary for VLE. */ | |
3227 | f = frag_more (insn_length); | |
09b935ac | 3228 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) |
b9c361e0 JL |
3229 | { |
3230 | if (ppc_mach() == bfd_mach_ppc_vle) | |
3231 | as_bad (_("instruction address is not a multiple of 2")); | |
3232 | else | |
3233 | as_bad (_("instruction address is not a multiple of 4")); | |
3234 | } | |
09b935ac AM |
3235 | frag_now->insn_addr = addr_mod; |
3236 | frag_now->has_code = 1; | |
b9c361e0 | 3237 | md_number_to_chars (f, insn, insn_length); |
252b5132 | 3238 | |
5d6f4f16 | 3239 | #ifdef OBJ_ELF |
b9c361e0 | 3240 | dwarf2_emit_insn (insn_length); |
5d6f4f16 GK |
3241 | #endif |
3242 | ||
252b5132 RH |
3243 | /* Create any fixups. At this point we do not use a |
3244 | bfd_reloc_code_real_type, but instead just use the | |
3245 | BFD_RELOC_UNUSED plus the operand index. This lets us easily | |
3246 | handle fixups for any operand type, although that is admittedly | |
3247 | not a very exciting feature. We pick a BFD reloc type in | |
55cf6793 | 3248 | md_apply_fix. */ |
252b5132 RH |
3249 | for (i = 0; i < fc; i++) |
3250 | { | |
252b5132 RH |
3251 | if (fixups[i].reloc != BFD_RELOC_UNUSED) |
3252 | { | |
99a814a1 | 3253 | reloc_howto_type *reloc_howto; |
252b5132 RH |
3254 | int size; |
3255 | int offset; | |
3256 | fixS *fixP; | |
3257 | ||
99a814a1 | 3258 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
3259 | if (!reloc_howto) |
3260 | abort (); | |
3261 | ||
3262 | size = bfd_get_reloc_size (reloc_howto); | |
3263 | offset = target_big_endian ? (4 - size) : 0; | |
3264 | ||
3265 | if (size < 1 || size > 4) | |
bc805888 | 3266 | abort (); |
252b5132 | 3267 | |
99a814a1 AM |
3268 | fixP = fix_new_exp (frag_now, |
3269 | f - frag_now->fr_literal + offset, | |
3270 | size, | |
3271 | &fixups[i].exp, | |
3272 | reloc_howto->pc_relative, | |
252b5132 RH |
3273 | fixups[i].reloc); |
3274 | ||
3275 | /* Turn off complaints that the addend is too large for things like | |
3276 | foo+100000@ha. */ | |
3277 | switch (fixups[i].reloc) | |
3278 | { | |
3279 | case BFD_RELOC_16_GOTOFF: | |
3280 | case BFD_RELOC_PPC_TOC16: | |
3281 | case BFD_RELOC_LO16: | |
3282 | case BFD_RELOC_HI16: | |
3283 | case BFD_RELOC_HI16_S: | |
b9c361e0 JL |
3284 | case BFD_RELOC_PPC_VLE_LO16A: |
3285 | case BFD_RELOC_PPC_VLE_LO16D: | |
3286 | case BFD_RELOC_PPC_VLE_HI16A: | |
3287 | case BFD_RELOC_PPC_VLE_HI16D: | |
3288 | case BFD_RELOC_PPC_VLE_HA16A: | |
3289 | case BFD_RELOC_PPC_VLE_HA16D: | |
0baf16f2 | 3290 | #ifdef OBJ_ELF |
0baf16f2 AM |
3291 | case BFD_RELOC_PPC64_HIGHER: |
3292 | case BFD_RELOC_PPC64_HIGHER_S: | |
3293 | case BFD_RELOC_PPC64_HIGHEST: | |
3294 | case BFD_RELOC_PPC64_HIGHEST_S: | |
0baf16f2 | 3295 | #endif |
252b5132 RH |
3296 | fixP->fx_no_overflow = 1; |
3297 | break; | |
3298 | default: | |
3299 | break; | |
3300 | } | |
3301 | } | |
3302 | else | |
727fc41e AM |
3303 | { |
3304 | const struct powerpc_operand *operand; | |
3305 | ||
3306 | operand = &powerpc_operands[fixups[i].opindex]; | |
3307 | fix_new_exp (frag_now, | |
3308 | f - frag_now->fr_literal, | |
b9c361e0 | 3309 | insn_length, |
727fc41e AM |
3310 | &fixups[i].exp, |
3311 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
3312 | ((bfd_reloc_code_real_type) | |
3313 | (fixups[i].opindex + (int) BFD_RELOC_UNUSED))); | |
3314 | } | |
252b5132 RH |
3315 | } |
3316 | } | |
3317 | ||
3318 | /* Handle a macro. Gather all the operands, transform them as | |
3319 | described by the macro, and call md_assemble recursively. All the | |
3320 | operands are separated by commas; we don't accept parentheses | |
3321 | around operands here. */ | |
3322 | ||
3323 | static void | |
98027b10 | 3324 | ppc_macro (char *str, const struct powerpc_macro *macro) |
252b5132 RH |
3325 | { |
3326 | char *operands[10]; | |
3327 | unsigned int count; | |
3328 | char *s; | |
3329 | unsigned int len; | |
3330 | const char *format; | |
db557034 | 3331 | unsigned int arg; |
252b5132 RH |
3332 | char *send; |
3333 | char *complete; | |
3334 | ||
3335 | /* Gather the users operands into the operands array. */ | |
3336 | count = 0; | |
3337 | s = str; | |
3338 | while (1) | |
3339 | { | |
3340 | if (count >= sizeof operands / sizeof operands[0]) | |
3341 | break; | |
3342 | operands[count++] = s; | |
3343 | s = strchr (s, ','); | |
3344 | if (s == (char *) NULL) | |
3345 | break; | |
3346 | *s++ = '\0'; | |
81d4177b | 3347 | } |
252b5132 RH |
3348 | |
3349 | if (count != macro->operands) | |
3350 | { | |
3351 | as_bad (_("wrong number of operands")); | |
3352 | return; | |
3353 | } | |
3354 | ||
3355 | /* Work out how large the string must be (the size is unbounded | |
3356 | because it includes user input). */ | |
3357 | len = 0; | |
3358 | format = macro->format; | |
3359 | while (*format != '\0') | |
3360 | { | |
3361 | if (*format != '%') | |
3362 | { | |
3363 | ++len; | |
3364 | ++format; | |
3365 | } | |
3366 | else | |
3367 | { | |
3368 | arg = strtol (format + 1, &send, 10); | |
db557034 | 3369 | know (send != format && arg < count); |
252b5132 RH |
3370 | len += strlen (operands[arg]); |
3371 | format = send; | |
3372 | } | |
3373 | } | |
3374 | ||
3375 | /* Put the string together. */ | |
3376 | complete = s = (char *) alloca (len + 1); | |
3377 | format = macro->format; | |
3378 | while (*format != '\0') | |
3379 | { | |
3380 | if (*format != '%') | |
3381 | *s++ = *format++; | |
3382 | else | |
3383 | { | |
3384 | arg = strtol (format + 1, &send, 10); | |
3385 | strcpy (s, operands[arg]); | |
3386 | s += strlen (s); | |
3387 | format = send; | |
3388 | } | |
3389 | } | |
3390 | *s = '\0'; | |
3391 | ||
3392 | /* Assemble the constructed instruction. */ | |
3393 | md_assemble (complete); | |
81d4177b | 3394 | } |
252b5132 RH |
3395 | \f |
3396 | #ifdef OBJ_ELF | |
18ae9cc1 | 3397 | /* For ELF, add support for SHT_ORDERED. */ |
252b5132 RH |
3398 | |
3399 | int | |
98027b10 | 3400 | ppc_section_type (char *str, size_t len) |
252b5132 | 3401 | { |
9de8d8f1 RH |
3402 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
3403 | return SHT_ORDERED; | |
252b5132 | 3404 | |
9de8d8f1 | 3405 | return -1; |
252b5132 RH |
3406 | } |
3407 | ||
3408 | int | |
1239de13 | 3409 | ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) |
252b5132 RH |
3410 | { |
3411 | if (type == SHT_ORDERED) | |
3412 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
3413 | ||
252b5132 RH |
3414 | return flags; |
3415 | } | |
3416 | #endif /* OBJ_ELF */ | |
3417 | ||
3418 | \f | |
3419 | /* Pseudo-op handling. */ | |
3420 | ||
3421 | /* The .byte pseudo-op. This is similar to the normal .byte | |
3422 | pseudo-op, but it can also take a single ASCII string. */ | |
3423 | ||
3424 | static void | |
98027b10 | 3425 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3426 | { |
3427 | if (*input_line_pointer != '\"') | |
3428 | { | |
3429 | cons (1); | |
3430 | return; | |
3431 | } | |
3432 | ||
3433 | /* Gather characters. A real double quote is doubled. Unusual | |
3434 | characters are not permitted. */ | |
3435 | ++input_line_pointer; | |
3436 | while (1) | |
3437 | { | |
3438 | char c; | |
3439 | ||
3440 | c = *input_line_pointer++; | |
3441 | ||
3442 | if (c == '\"') | |
3443 | { | |
3444 | if (*input_line_pointer != '\"') | |
3445 | break; | |
3446 | ++input_line_pointer; | |
3447 | } | |
3448 | ||
3449 | FRAG_APPEND_1_CHAR (c); | |
3450 | } | |
3451 | ||
3452 | demand_empty_rest_of_line (); | |
3453 | } | |
3454 | \f | |
3455 | #ifdef OBJ_XCOFF | |
3456 | ||
3457 | /* XCOFF specific pseudo-op handling. */ | |
3458 | ||
3459 | /* This is set if we are creating a .stabx symbol, since we don't want | |
3460 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 3461 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
3462 | |
3463 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
3464 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 3465 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 3466 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
3467 | |
3468 | static void | |
98027b10 | 3469 | ppc_comm (int lcomm) |
252b5132 RH |
3470 | { |
3471 | asection *current_seg = now_seg; | |
3472 | subsegT current_subseg = now_subseg; | |
3473 | char *name; | |
3474 | char endc; | |
3475 | char *end_name; | |
3476 | offsetT size; | |
3477 | offsetT align; | |
3478 | symbolS *lcomm_sym = NULL; | |
3479 | symbolS *sym; | |
3480 | char *pfrag; | |
3481 | ||
3482 | name = input_line_pointer; | |
3483 | endc = get_symbol_end (); | |
3484 | end_name = input_line_pointer; | |
3485 | *end_name = endc; | |
3486 | ||
3487 | if (*input_line_pointer != ',') | |
3488 | { | |
3489 | as_bad (_("missing size")); | |
3490 | ignore_rest_of_line (); | |
3491 | return; | |
3492 | } | |
3493 | ++input_line_pointer; | |
3494 | ||
3495 | size = get_absolute_expression (); | |
3496 | if (size < 0) | |
3497 | { | |
3498 | as_bad (_("negative size")); | |
3499 | ignore_rest_of_line (); | |
3500 | return; | |
3501 | } | |
3502 | ||
3503 | if (! lcomm) | |
3504 | { | |
3505 | /* The third argument to .comm is the alignment. */ | |
3506 | if (*input_line_pointer != ',') | |
1ad63b2f | 3507 | align = 2; |
252b5132 RH |
3508 | else |
3509 | { | |
3510 | ++input_line_pointer; | |
3511 | align = get_absolute_expression (); | |
3512 | if (align <= 0) | |
3513 | { | |
3514 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3515 | align = 2; |
252b5132 RH |
3516 | } |
3517 | } | |
3518 | } | |
3519 | else | |
3520 | { | |
3521 | char *lcomm_name; | |
3522 | char lcomm_endc; | |
3523 | ||
1ad63b2f | 3524 | if (size <= 4) |
252b5132 RH |
3525 | align = 2; |
3526 | else | |
3527 | align = 3; | |
3528 | ||
3529 | /* The third argument to .lcomm appears to be the real local | |
3530 | common symbol to create. References to the symbol named in | |
3531 | the first argument are turned into references to the third | |
3532 | argument. */ | |
3533 | if (*input_line_pointer != ',') | |
3534 | { | |
3535 | as_bad (_("missing real symbol name")); | |
3536 | ignore_rest_of_line (); | |
3537 | return; | |
3538 | } | |
3539 | ++input_line_pointer; | |
3540 | ||
3541 | lcomm_name = input_line_pointer; | |
3542 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3543 | |
252b5132 RH |
3544 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3545 | ||
3546 | *input_line_pointer = lcomm_endc; | |
3547 | } | |
3548 | ||
3549 | *end_name = '\0'; | |
3550 | sym = symbol_find_or_make (name); | |
3551 | *end_name = endc; | |
3552 | ||
3553 | if (S_IS_DEFINED (sym) | |
3554 | || S_GET_VALUE (sym) != 0) | |
3555 | { | |
3556 | as_bad (_("attempt to redefine symbol")); | |
3557 | ignore_rest_of_line (); | |
3558 | return; | |
3559 | } | |
81d4177b | 3560 | |
252b5132 | 3561 | record_alignment (bss_section, align); |
81d4177b | 3562 | |
252b5132 RH |
3563 | if (! lcomm |
3564 | || ! S_IS_DEFINED (lcomm_sym)) | |
3565 | { | |
3566 | symbolS *def_sym; | |
3567 | offsetT def_size; | |
3568 | ||
3569 | if (! lcomm) | |
3570 | { | |
3571 | def_sym = sym; | |
3572 | def_size = size; | |
3573 | S_SET_EXTERNAL (sym); | |
3574 | } | |
3575 | else | |
3576 | { | |
809ffe0d | 3577 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3578 | def_sym = lcomm_sym; |
3579 | def_size = 0; | |
3580 | } | |
3581 | ||
3582 | subseg_set (bss_section, 1); | |
3583 | frag_align (align, 0, 0); | |
81d4177b | 3584 | |
809ffe0d | 3585 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3586 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3587 | def_size, (char *) NULL); | |
3588 | *pfrag = 0; | |
3589 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3590 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3591 | } |
3592 | else if (lcomm) | |
3593 | { | |
3594 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3595 | symbol_get_frag (lcomm_sym)->fr_offset = |
3596 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3597 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3598 | if (align > symbol_get_tc (lcomm_sym)->align) |
3599 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3600 | } |
3601 | ||
3602 | if (lcomm) | |
3603 | { | |
3604 | /* Make sym an offset from lcomm_sym. */ | |
3605 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3606 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3607 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3608 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3609 | } |
3610 | ||
3611 | subseg_set (current_seg, current_subseg); | |
3612 | ||
3613 | demand_empty_rest_of_line (); | |
3614 | } | |
3615 | ||
3616 | /* The .csect pseudo-op. This switches us into a different | |
3617 | subsegment. The first argument is a symbol whose value is the | |
3618 | start of the .csect. In COFF, csect symbols get special aux | |
3619 | entries defined by the x_csect field of union internal_auxent. The | |
3620 | optional second argument is the alignment (the default is 2). */ | |
3621 | ||
3622 | static void | |
98027b10 | 3623 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3624 | { |
3625 | char *name; | |
3626 | char endc; | |
3627 | symbolS *sym; | |
931e13a6 | 3628 | offsetT align; |
252b5132 RH |
3629 | |
3630 | name = input_line_pointer; | |
3631 | endc = get_symbol_end (); | |
81d4177b | 3632 | |
252b5132 RH |
3633 | sym = symbol_find_or_make (name); |
3634 | ||
3635 | *input_line_pointer = endc; | |
3636 | ||
3637 | if (S_GET_NAME (sym)[0] == '\0') | |
3638 | { | |
3639 | /* An unnamed csect is assumed to be [PR]. */ | |
96d56e9f | 3640 | symbol_get_tc (sym)->symbol_class = XMC_PR; |
252b5132 RH |
3641 | } |
3642 | ||
931e13a6 | 3643 | align = 2; |
252b5132 RH |
3644 | if (*input_line_pointer == ',') |
3645 | { | |
3646 | ++input_line_pointer; | |
931e13a6 | 3647 | align = get_absolute_expression (); |
252b5132 RH |
3648 | } |
3649 | ||
931e13a6 AM |
3650 | ppc_change_csect (sym, align); |
3651 | ||
252b5132 RH |
3652 | demand_empty_rest_of_line (); |
3653 | } | |
3654 | ||
3655 | /* Change to a different csect. */ | |
3656 | ||
3657 | static void | |
98027b10 | 3658 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
3659 | { |
3660 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3661 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3662 | else |
3663 | { | |
3664 | symbolS **list_ptr; | |
3665 | int after_toc; | |
3666 | int hold_chunksize; | |
3667 | symbolS *list; | |
931e13a6 AM |
3668 | int is_code; |
3669 | segT sec; | |
252b5132 RH |
3670 | |
3671 | /* This is a new csect. We need to look at the symbol class to | |
3672 | figure out whether it should go in the text section or the | |
3673 | data section. */ | |
3674 | after_toc = 0; | |
931e13a6 | 3675 | is_code = 0; |
96d56e9f | 3676 | switch (symbol_get_tc (sym)->symbol_class) |
252b5132 RH |
3677 | { |
3678 | case XMC_PR: | |
3679 | case XMC_RO: | |
3680 | case XMC_DB: | |
3681 | case XMC_GL: | |
3682 | case XMC_XO: | |
3683 | case XMC_SV: | |
3684 | case XMC_TI: | |
3685 | case XMC_TB: | |
3686 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3687 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3688 | ++ppc_text_subsegment; |
3689 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3690 | is_code = 1; |
252b5132 RH |
3691 | break; |
3692 | case XMC_RW: | |
3693 | case XMC_TC0: | |
3694 | case XMC_TC: | |
3695 | case XMC_DS: | |
3696 | case XMC_UA: | |
3697 | case XMC_BS: | |
3698 | case XMC_UC: | |
3699 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3700 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3701 | == ppc_data_subsegment)) | |
252b5132 RH |
3702 | after_toc = 1; |
3703 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3704 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3705 | ++ppc_data_subsegment; |
3706 | list_ptr = &ppc_data_csects; | |
3707 | break; | |
3708 | default: | |
3709 | abort (); | |
3710 | } | |
3711 | ||
3712 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3713 | changing subsegments, so that we don't use a lot of memory |
3714 | space for what may be a small section. */ | |
252b5132 RH |
3715 | hold_chunksize = chunksize; |
3716 | chunksize = 64; | |
3717 | ||
931e13a6 AM |
3718 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3719 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3720 | |
3721 | chunksize = hold_chunksize; | |
3722 | ||
3723 | if (after_toc) | |
3724 | ppc_after_toc_frag = frag_now; | |
3725 | ||
931e13a6 AM |
3726 | record_alignment (sec, align); |
3727 | if (is_code) | |
3728 | frag_align_code (align, 0); | |
3729 | else | |
3730 | frag_align (align, 0, 0); | |
3731 | ||
809ffe0d | 3732 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3733 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3734 | ||
931e13a6 | 3735 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3736 | symbol_get_tc (sym)->output = 1; |
3737 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3738 | |
252b5132 | 3739 | for (list = *list_ptr; |
809ffe0d ILT |
3740 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3741 | list = symbol_get_tc (list)->next) | |
252b5132 | 3742 | ; |
809ffe0d | 3743 | symbol_get_tc (list)->next = sym; |
81d4177b | 3744 | |
252b5132 | 3745 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3746 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3747 | &symbol_lastP); | |
252b5132 RH |
3748 | } |
3749 | ||
3750 | ppc_current_csect = sym; | |
3751 | } | |
3752 | ||
85645aed TG |
3753 | static void |
3754 | ppc_change_debug_section (unsigned int idx, subsegT subseg) | |
3755 | { | |
3756 | segT sec; | |
3757 | flagword oldflags; | |
3758 | const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; | |
3759 | ||
3760 | sec = subseg_new (dw->name, subseg); | |
3761 | oldflags = bfd_get_section_flags (stdoutput, sec); | |
3762 | if (oldflags == SEC_NO_FLAGS) | |
3763 | { | |
3764 | /* Just created section. */ | |
3765 | gas_assert (dw_sections[idx].sect == NULL); | |
3766 | ||
3767 | bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); | |
3768 | bfd_set_section_alignment (stdoutput, sec, 0); | |
3769 | dw_sections[idx].sect = sec; | |
3770 | } | |
3771 | ||
3772 | /* Not anymore in a csect. */ | |
3773 | ppc_current_csect = NULL; | |
3774 | } | |
3775 | ||
3776 | /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: | |
3777 | .dwsect flag [, opt-label ] | |
3778 | */ | |
3779 | ||
3780 | static void | |
3781 | ppc_dwsect (int ignore ATTRIBUTE_UNUSED) | |
3782 | { | |
3783 | offsetT flag; | |
3784 | symbolS *opt_label; | |
3785 | const struct xcoff_dwsect_name *dw; | |
3786 | struct dw_subsection *subseg; | |
3787 | struct dw_section *dws; | |
3788 | int i; | |
3789 | ||
3790 | /* Find section. */ | |
3791 | flag = get_absolute_expression (); | |
3792 | dw = NULL; | |
3793 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
3794 | if (xcoff_dwsect_names[i].flag == flag) | |
3795 | { | |
3796 | dw = &xcoff_dwsect_names[i]; | |
3797 | break; | |
3798 | } | |
3799 | ||
3800 | /* Parse opt-label. */ | |
3801 | if (*input_line_pointer == ',') | |
3802 | { | |
3803 | const char *label; | |
3804 | char c; | |
3805 | ||
3806 | ++input_line_pointer; | |
3807 | ||
3808 | label = input_line_pointer; | |
3809 | c = get_symbol_end (); | |
3810 | opt_label = symbol_find_or_make (label); | |
3811 | *input_line_pointer = c; | |
3812 | } | |
3813 | else | |
3814 | opt_label = NULL; | |
3815 | ||
3816 | demand_empty_rest_of_line (); | |
3817 | ||
3818 | /* Return now in case of unknown subsection. */ | |
3819 | if (dw == NULL) | |
3820 | { | |
d6ed37ed | 3821 | as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), |
85645aed TG |
3822 | (unsigned)flag); |
3823 | return; | |
3824 | } | |
3825 | ||
3826 | /* Find the subsection. */ | |
3827 | dws = &dw_sections[i]; | |
3828 | subseg = NULL; | |
3829 | if (opt_label != NULL && S_IS_DEFINED (opt_label)) | |
3830 | { | |
3831 | /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ | |
3832 | if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) | |
3833 | { | |
3834 | as_bad (_("label %s was not defined in this dwarf section"), | |
3835 | S_GET_NAME (opt_label)); | |
3836 | subseg = dws->anon_subseg; | |
3837 | opt_label = NULL; | |
3838 | } | |
3839 | else | |
3840 | subseg = symbol_get_tc (opt_label)->u.dw; | |
3841 | } | |
3842 | ||
3843 | if (subseg != NULL) | |
3844 | { | |
3845 | /* Switch to the subsection. */ | |
3846 | ppc_change_debug_section (i, subseg->subseg); | |
3847 | } | |
3848 | else | |
3849 | { | |
3850 | /* Create a new dw subsection. */ | |
3851 | subseg = (struct dw_subsection *) | |
3852 | xmalloc (sizeof (struct dw_subsection)); | |
3853 | ||
3854 | if (opt_label == NULL) | |
3855 | { | |
3856 | /* The anonymous one. */ | |
3857 | subseg->subseg = 0; | |
3858 | subseg->link = NULL; | |
3859 | dws->anon_subseg = subseg; | |
3860 | } | |
3861 | else | |
3862 | { | |
3863 | /* A named one. */ | |
3864 | if (dws->list_subseg != NULL) | |
3865 | subseg->subseg = dws->list_subseg->subseg + 1; | |
3866 | else | |
3867 | subseg->subseg = 1; | |
3868 | ||
3869 | subseg->link = dws->list_subseg; | |
3870 | dws->list_subseg = subseg; | |
3871 | symbol_get_tc (opt_label)->u.dw = subseg; | |
3872 | } | |
3873 | ||
3874 | ppc_change_debug_section (i, subseg->subseg); | |
3875 | ||
3876 | if (dw->def_size) | |
3877 | { | |
3878 | /* Add the length field. */ | |
3879 | expressionS *exp = &subseg->end_exp; | |
3880 | int sz; | |
3881 | ||
3882 | if (opt_label != NULL) | |
3883 | symbol_set_value_now (opt_label); | |
3884 | ||
3885 | /* Add the length field. Note that according to the AIX assembler | |
3886 | manual, the size of the length field is 4 for powerpc32 but | |
3887 | 12 for powerpc64. */ | |
3888 | if (ppc_obj64) | |
3889 | { | |
3890 | /* Write the 64bit marker. */ | |
3891 | md_number_to_chars (frag_more (4), -1, 4); | |
3892 | } | |
3893 | ||
3894 | exp->X_op = O_subtract; | |
3895 | exp->X_op_symbol = symbol_temp_new_now (); | |
3896 | exp->X_add_symbol = symbol_temp_make (); | |
3897 | ||
3898 | sz = ppc_obj64 ? 8 : 4; | |
3899 | exp->X_add_number = -sz; | |
3900 | emit_expr (exp, sz); | |
3901 | } | |
3902 | } | |
3903 | } | |
3904 | ||
252b5132 RH |
3905 | /* This function handles the .text and .data pseudo-ops. These |
3906 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3907 | convenience of people who aren't used to XCOFF. */ | |
3908 | ||
3909 | static void | |
98027b10 | 3910 | ppc_section (int type) |
252b5132 RH |
3911 | { |
3912 | const char *name; | |
3913 | symbolS *sym; | |
3914 | ||
3915 | if (type == 't') | |
3916 | name = ".text[PR]"; | |
3917 | else if (type == 'd') | |
3918 | name = ".data[RW]"; | |
3919 | else | |
3920 | abort (); | |
3921 | ||
3922 | sym = symbol_find_or_make (name); | |
3923 | ||
931e13a6 | 3924 | ppc_change_csect (sym, 2); |
252b5132 RH |
3925 | |
3926 | demand_empty_rest_of_line (); | |
3927 | } | |
3928 | ||
3929 | /* This function handles the .section pseudo-op. This is mostly to | |
3930 | give an error, since XCOFF only supports .text, .data and .bss, but | |
3931 | we do permit the user to name the text or data section. */ | |
3932 | ||
3933 | static void | |
98027b10 | 3934 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3935 | { |
3936 | char *user_name; | |
3937 | const char *real_name; | |
3938 | char c; | |
3939 | symbolS *sym; | |
3940 | ||
3941 | user_name = input_line_pointer; | |
3942 | c = get_symbol_end (); | |
3943 | ||
3944 | if (strcmp (user_name, ".text") == 0) | |
3945 | real_name = ".text[PR]"; | |
3946 | else if (strcmp (user_name, ".data") == 0) | |
3947 | real_name = ".data[RW]"; | |
3948 | else | |
3949 | { | |
d6ed37ed | 3950 | as_bad (_("the XCOFF file format does not support arbitrary sections")); |
252b5132 RH |
3951 | *input_line_pointer = c; |
3952 | ignore_rest_of_line (); | |
3953 | return; | |
3954 | } | |
3955 | ||
3956 | *input_line_pointer = c; | |
3957 | ||
3958 | sym = symbol_find_or_make (real_name); | |
3959 | ||
931e13a6 | 3960 | ppc_change_csect (sym, 2); |
252b5132 RH |
3961 | |
3962 | demand_empty_rest_of_line (); | |
3963 | } | |
3964 | ||
3965 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
3966 | ||
3967 | static void | |
98027b10 | 3968 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3969 | { |
3970 | char *name; | |
3971 | char endc; | |
3972 | ||
3973 | name = input_line_pointer; | |
3974 | endc = get_symbol_end (); | |
3975 | ||
3976 | (void) symbol_find_or_make (name); | |
3977 | ||
3978 | *input_line_pointer = endc; | |
3979 | ||
3980 | demand_empty_rest_of_line (); | |
3981 | } | |
3982 | ||
3983 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
3984 | ||
3985 | static void | |
98027b10 | 3986 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3987 | { |
3988 | char *name; | |
3989 | char endc; | |
3990 | symbolS *sym; | |
3991 | ||
3992 | name = input_line_pointer; | |
3993 | endc = get_symbol_end (); | |
3994 | ||
3995 | sym = symbol_find_or_make (name); | |
3996 | ||
3997 | *input_line_pointer = endc; | |
3998 | ||
809ffe0d | 3999 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4000 | |
4001 | demand_empty_rest_of_line (); | |
4002 | } | |
4003 | ||
c865e45b RS |
4004 | /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF |
4005 | relocations at the beginning of the current csect. | |
4006 | ||
4007 | (In principle, there's no reason why the relocations _have_ to be at | |
4008 | the beginning. Anywhere in the csect would do. However, inserting | |
4009 | at the beginning is what the native assmebler does, and it helps to | |
4010 | deal with cases where the .ref statements follow the section contents.) | |
4011 | ||
4012 | ??? .refs don't work for empty .csects. However, the native assembler | |
4013 | doesn't report an error in this case, and neither yet do we. */ | |
4014 | ||
4015 | static void | |
4016 | ppc_ref (int ignore ATTRIBUTE_UNUSED) | |
4017 | { | |
4018 | char *name; | |
4019 | char c; | |
4020 | ||
4021 | if (ppc_current_csect == NULL) | |
4022 | { | |
4023 | as_bad (_(".ref outside .csect")); | |
4024 | ignore_rest_of_line (); | |
4025 | return; | |
4026 | } | |
4027 | ||
4028 | do | |
4029 | { | |
4030 | name = input_line_pointer; | |
4031 | c = get_symbol_end (); | |
4032 | ||
4033 | fix_at_start (symbol_get_frag (ppc_current_csect), 0, | |
4034 | symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); | |
4035 | ||
4036 | *input_line_pointer = c; | |
4037 | SKIP_WHITESPACE (); | |
4038 | c = *input_line_pointer; | |
4039 | if (c == ',') | |
4040 | { | |
4041 | input_line_pointer++; | |
4042 | SKIP_WHITESPACE (); | |
4043 | if (is_end_of_line[(unsigned char) *input_line_pointer]) | |
4044 | { | |
4045 | as_bad (_("missing symbol name")); | |
4046 | ignore_rest_of_line (); | |
4047 | return; | |
4048 | } | |
4049 | } | |
4050 | } | |
4051 | while (c == ','); | |
4052 | ||
4053 | demand_empty_rest_of_line (); | |
4054 | } | |
4055 | ||
252b5132 RH |
4056 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, |
4057 | although I don't know why it bothers. */ | |
4058 | ||
4059 | static void | |
98027b10 | 4060 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4061 | { |
4062 | char *name; | |
4063 | char endc; | |
4064 | symbolS *sym; | |
4065 | int len; | |
4066 | ||
4067 | name = input_line_pointer; | |
4068 | endc = get_symbol_end (); | |
4069 | ||
4070 | sym = symbol_find_or_make (name); | |
4071 | ||
4072 | *input_line_pointer = endc; | |
4073 | ||
4074 | if (*input_line_pointer != ',') | |
4075 | { | |
4076 | as_bad (_("missing rename string")); | |
4077 | ignore_rest_of_line (); | |
4078 | return; | |
4079 | } | |
4080 | ++input_line_pointer; | |
4081 | ||
809ffe0d | 4082 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
4083 | |
4084 | demand_empty_rest_of_line (); | |
4085 | } | |
4086 | ||
4087 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
4088 | pseudo-op, but slightly different. A sample is | |
4089 | .stabx "main:F-1",.main,142,0 | |
4090 | The first argument is the symbol name to create. The second is the | |
4091 | value, and the third is the storage class. The fourth seems to be | |
4092 | always zero, and I am assuming it is the type. */ | |
4093 | ||
4094 | static void | |
98027b10 | 4095 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4096 | { |
4097 | char *name; | |
4098 | int len; | |
4099 | symbolS *sym; | |
4100 | expressionS exp; | |
4101 | ||
4102 | name = demand_copy_C_string (&len); | |
4103 | ||
4104 | if (*input_line_pointer != ',') | |
4105 | { | |
4106 | as_bad (_("missing value")); | |
4107 | return; | |
4108 | } | |
4109 | ++input_line_pointer; | |
4110 | ||
b34976b6 | 4111 | ppc_stab_symbol = TRUE; |
252b5132 | 4112 | sym = symbol_make (name); |
b34976b6 | 4113 | ppc_stab_symbol = FALSE; |
252b5132 | 4114 | |
809ffe0d | 4115 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
4116 | |
4117 | (void) expression (&exp); | |
4118 | ||
4119 | switch (exp.X_op) | |
4120 | { | |
4121 | case O_illegal: | |
4122 | case O_absent: | |
4123 | case O_big: | |
4124 | as_bad (_("illegal .stabx expression; zero assumed")); | |
4125 | exp.X_add_number = 0; | |
4126 | /* Fall through. */ | |
4127 | case O_constant: | |
4128 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 4129 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
4130 | break; |
4131 | ||
4132 | case O_symbol: | |
4133 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 4134 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4135 | else |
4136 | { | |
4137 | S_SET_VALUE (sym, | |
4138 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 4139 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
4140 | } |
4141 | break; | |
4142 | ||
4143 | default: | |
4144 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
4145 | fail at some later point, but this is probably the right |
4146 | thing to do here. */ | |
809ffe0d | 4147 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4148 | break; |
4149 | } | |
4150 | ||
4151 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4152 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4153 | |
4154 | if (*input_line_pointer != ',') | |
4155 | { | |
4156 | as_bad (_("missing class")); | |
4157 | return; | |
4158 | } | |
4159 | ++input_line_pointer; | |
4160 | ||
4161 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
4162 | ||
4163 | if (*input_line_pointer != ',') | |
4164 | { | |
4165 | as_bad (_("missing type")); | |
4166 | return; | |
4167 | } | |
4168 | ++input_line_pointer; | |
4169 | ||
4170 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
4171 | ||
809ffe0d | 4172 | symbol_get_tc (sym)->output = 1; |
252b5132 | 4173 | |
c734e7e3 TG |
4174 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) |
4175 | { | |
4176 | /* In this case : | |
252b5132 | 4177 | |
c734e7e3 TG |
4178 | .bs name |
4179 | .stabx "z",arrays_,133,0 | |
4180 | .es | |
99a814a1 | 4181 | |
c734e7e3 | 4182 | .comm arrays_,13768,3 |
99a814a1 | 4183 | |
c734e7e3 TG |
4184 | resolve_symbol_value will copy the exp's "within" into sym's when the |
4185 | offset is 0. Since this seems to be corner case problem, | |
4186 | only do the correction for storage class C_STSYM. A better solution | |
4187 | would be to have the tc field updated in ppc_symbol_new_hook. */ | |
99a814a1 | 4188 | |
c734e7e3 TG |
4189 | if (exp.X_op == O_symbol) |
4190 | { | |
4191 | if (ppc_current_block == NULL) | |
4192 | as_bad (_(".stabx of storage class stsym must be within .bs/.es")); | |
99a814a1 | 4193 | |
c734e7e3 TG |
4194 | symbol_get_tc (sym)->within = ppc_current_block; |
4195 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
4196 | } | |
4197 | } | |
99a814a1 | 4198 | |
252b5132 RH |
4199 | if (exp.X_op != O_symbol |
4200 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
4201 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
4202 | ppc_frob_label (sym); | |
4203 | else | |
4204 | { | |
4205 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4206 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4207 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
4208 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
4209 | } |
4210 | ||
4211 | demand_empty_rest_of_line (); | |
4212 | } | |
4213 | ||
4214 | /* The .function pseudo-op. This takes several arguments. The first | |
4215 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 4216 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
4217 | uses the same name for both. I have no idea what the third and |
4218 | fourth arguments are meant to be. The optional fifth argument is | |
4219 | an expression for the size of the function. In COFF this symbol | |
4220 | gets an aux entry like that used for a csect. */ | |
4221 | ||
4222 | static void | |
98027b10 | 4223 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4224 | { |
4225 | char *name; | |
4226 | char endc; | |
4227 | char *s; | |
4228 | symbolS *ext_sym; | |
4229 | symbolS *lab_sym; | |
4230 | ||
4231 | name = input_line_pointer; | |
4232 | endc = get_symbol_end (); | |
4233 | ||
4234 | /* Ignore any [PR] suffix. */ | |
4235 | name = ppc_canonicalize_symbol_name (name); | |
4236 | s = strchr (name, '['); | |
4237 | if (s != (char *) NULL | |
4238 | && strcmp (s + 1, "PR]") == 0) | |
4239 | *s = '\0'; | |
4240 | ||
4241 | ext_sym = symbol_find_or_make (name); | |
4242 | ||
4243 | *input_line_pointer = endc; | |
4244 | ||
4245 | if (*input_line_pointer != ',') | |
4246 | { | |
4247 | as_bad (_("missing symbol name")); | |
4248 | ignore_rest_of_line (); | |
4249 | return; | |
4250 | } | |
4251 | ++input_line_pointer; | |
4252 | ||
4253 | name = input_line_pointer; | |
4254 | endc = get_symbol_end (); | |
4255 | ||
4256 | lab_sym = symbol_find_or_make (name); | |
4257 | ||
4258 | *input_line_pointer = endc; | |
4259 | ||
4260 | if (ext_sym != lab_sym) | |
4261 | { | |
809ffe0d ILT |
4262 | expressionS exp; |
4263 | ||
4264 | exp.X_op = O_symbol; | |
4265 | exp.X_add_symbol = lab_sym; | |
4266 | exp.X_op_symbol = NULL; | |
4267 | exp.X_add_number = 0; | |
4268 | exp.X_unsigned = 0; | |
4269 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
4270 | } |
4271 | ||
96d56e9f NC |
4272 | if (symbol_get_tc (ext_sym)->symbol_class == -1) |
4273 | symbol_get_tc (ext_sym)->symbol_class = XMC_PR; | |
809ffe0d | 4274 | symbol_get_tc (ext_sym)->output = 1; |
252b5132 RH |
4275 | |
4276 | if (*input_line_pointer == ',') | |
4277 | { | |
91d6fa6a | 4278 | expressionS exp; |
252b5132 RH |
4279 | |
4280 | /* Ignore the third argument. */ | |
4281 | ++input_line_pointer; | |
91d6fa6a | 4282 | expression (& exp); |
252b5132 RH |
4283 | if (*input_line_pointer == ',') |
4284 | { | |
4285 | /* Ignore the fourth argument. */ | |
4286 | ++input_line_pointer; | |
91d6fa6a | 4287 | expression (& exp); |
252b5132 RH |
4288 | if (*input_line_pointer == ',') |
4289 | { | |
4290 | /* The fifth argument is the function size. */ | |
4291 | ++input_line_pointer; | |
85645aed TG |
4292 | symbol_get_tc (ext_sym)->u.size = symbol_new |
4293 | ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); | |
4294 | pseudo_set (symbol_get_tc (ext_sym)->u.size); | |
252b5132 RH |
4295 | } |
4296 | } | |
4297 | } | |
4298 | ||
4299 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4300 | SF_SET_FUNCTION (ext_sym); | |
4301 | SF_SET_PROCESS (ext_sym); | |
4302 | coff_add_linesym (ext_sym); | |
4303 | ||
4304 | demand_empty_rest_of_line (); | |
4305 | } | |
4306 | ||
4307 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
4308 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
4309 | with the correct line number */ | |
5d6255fe | 4310 | |
8642cce8 | 4311 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
4312 | |
4313 | static void | |
98027b10 | 4314 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4315 | { |
4316 | symbolS *sym; | |
4317 | ||
4318 | sym = symbol_make (".bf"); | |
4319 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4320 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4321 | S_SET_VALUE (sym, frag_now_fix ()); |
4322 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4323 | ||
4324 | coff_line_base = get_absolute_expression (); | |
4325 | ||
4326 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4327 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
4328 | ||
8642cce8 | 4329 | /* Line number for bi. */ |
5d6255fe | 4330 | if (saved_bi_sym) |
8642cce8 TR |
4331 | { |
4332 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
4333 | saved_bi_sym = 0; | |
4334 | } | |
5d6255fe | 4335 | |
8642cce8 | 4336 | |
809ffe0d | 4337 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4338 | |
4339 | ppc_frob_label (sym); | |
4340 | ||
4341 | demand_empty_rest_of_line (); | |
4342 | } | |
4343 | ||
4344 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
4345 | ".ef", except that the line number is absolute, not relative to the | |
4346 | most recent ".bf" symbol. */ | |
4347 | ||
4348 | static void | |
98027b10 | 4349 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4350 | { |
4351 | symbolS *sym; | |
4352 | ||
4353 | sym = symbol_make (".ef"); | |
4354 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4355 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4356 | S_SET_VALUE (sym, frag_now_fix ()); |
4357 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4358 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4359 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4360 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4361 | |
4362 | ppc_frob_label (sym); | |
4363 | ||
4364 | demand_empty_rest_of_line (); | |
4365 | } | |
4366 | ||
4367 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
4368 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
4369 | the symbol list. The value of .bi will be know when the next .bf |
4370 | is encountered. */ | |
252b5132 RH |
4371 | |
4372 | static void | |
98027b10 | 4373 | ppc_biei (int ei) |
252b5132 RH |
4374 | { |
4375 | static symbolS *last_biei; | |
4376 | ||
4377 | char *name; | |
4378 | int len; | |
4379 | symbolS *sym; | |
4380 | symbolS *look; | |
4381 | ||
4382 | name = demand_copy_C_string (&len); | |
4383 | ||
4384 | /* The value of these symbols is actually file offset. Here we set | |
4385 | the value to the index into the line number entries. In | |
4386 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
4387 | to do the right thing. */ | |
4388 | ||
4389 | sym = symbol_make (name); | |
4390 | /* obj-coff.c currently only handles line numbers correctly in the | |
4391 | .text section. */ | |
4392 | S_SET_SEGMENT (sym, text_section); | |
4393 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 4394 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4395 | |
4396 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 4397 | symbol_get_tc (sym)->output = 1; |
81d4177b | 4398 | |
8642cce8 | 4399 | /* Save bi. */ |
5d6255fe | 4400 | if (ei) |
8642cce8 TR |
4401 | saved_bi_sym = 0; |
4402 | else | |
4403 | saved_bi_sym = sym; | |
4404 | ||
252b5132 RH |
4405 | for (look = last_biei ? last_biei : symbol_rootP; |
4406 | (look != (symbolS *) NULL | |
4407 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
4408 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
4409 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
4410 | look = symbol_next (look)) | |
4411 | ; | |
4412 | if (look != (symbolS *) NULL) | |
4413 | { | |
4414 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4415 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
4416 | last_biei = sym; | |
4417 | } | |
4418 | ||
4419 | demand_empty_rest_of_line (); | |
4420 | } | |
4421 | ||
4422 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
4423 | There is one argument, which is a csect symbol. The value of the | |
4424 | .bs symbol is the index of this csect symbol. */ | |
4425 | ||
4426 | static void | |
98027b10 | 4427 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4428 | { |
4429 | char *name; | |
4430 | char endc; | |
4431 | symbolS *csect; | |
4432 | symbolS *sym; | |
4433 | ||
4434 | if (ppc_current_block != NULL) | |
4435 | as_bad (_("nested .bs blocks")); | |
4436 | ||
4437 | name = input_line_pointer; | |
4438 | endc = get_symbol_end (); | |
4439 | ||
4440 | csect = symbol_find_or_make (name); | |
4441 | ||
4442 | *input_line_pointer = endc; | |
4443 | ||
4444 | sym = symbol_make (".bs"); | |
4445 | S_SET_SEGMENT (sym, now_seg); | |
4446 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
4447 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4448 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 4449 | |
809ffe0d | 4450 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
4451 | |
4452 | ppc_frob_label (sym); | |
4453 | ||
4454 | ppc_current_block = sym; | |
4455 | ||
4456 | demand_empty_rest_of_line (); | |
4457 | } | |
4458 | ||
4459 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
4460 | ||
4461 | static void | |
98027b10 | 4462 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4463 | { |
4464 | symbolS *sym; | |
4465 | ||
4466 | if (ppc_current_block == NULL) | |
4467 | as_bad (_(".es without preceding .bs")); | |
4468 | ||
4469 | sym = symbol_make (".es"); | |
4470 | S_SET_SEGMENT (sym, now_seg); | |
4471 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
4472 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4473 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4474 | |
4475 | ppc_frob_label (sym); | |
4476 | ||
4477 | ppc_current_block = NULL; | |
4478 | ||
4479 | demand_empty_rest_of_line (); | |
4480 | } | |
4481 | ||
4482 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
4483 | line number. */ | |
4484 | ||
4485 | static void | |
98027b10 | 4486 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4487 | { |
4488 | symbolS *sym; | |
4489 | ||
4490 | sym = symbol_make (".bb"); | |
4491 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4492 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4493 | S_SET_VALUE (sym, frag_now_fix ()); |
4494 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4495 | ||
4496 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4497 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
4498 | ||
809ffe0d | 4499 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4500 | |
4501 | SF_SET_PROCESS (sym); | |
4502 | ||
4503 | ppc_frob_label (sym); | |
4504 | ||
4505 | demand_empty_rest_of_line (); | |
4506 | } | |
4507 | ||
4508 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
4509 | line number. */ | |
4510 | ||
4511 | static void | |
98027b10 | 4512 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4513 | { |
4514 | symbolS *sym; | |
4515 | ||
4516 | sym = symbol_make (".eb"); | |
4517 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4518 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4519 | S_SET_VALUE (sym, frag_now_fix ()); |
4520 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4521 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4522 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4523 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4524 | |
4525 | SF_SET_PROCESS (sym); | |
4526 | ||
4527 | ppc_frob_label (sym); | |
4528 | ||
4529 | demand_empty_rest_of_line (); | |
4530 | } | |
4531 | ||
4532 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
4533 | specified name. */ | |
4534 | ||
4535 | static void | |
98027b10 | 4536 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4537 | { |
4538 | char *name; | |
4539 | int len; | |
4540 | symbolS *sym; | |
4541 | ||
4542 | name = demand_copy_C_string (&len); | |
4543 | sym = symbol_make (name); | |
4544 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4545 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4546 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
4547 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4548 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4549 | |
4550 | ppc_frob_label (sym); | |
4551 | ||
4552 | demand_empty_rest_of_line (); | |
4553 | } | |
4554 | ||
4555 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
4556 | ||
4557 | static void | |
98027b10 | 4558 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4559 | { |
4560 | symbolS *sym; | |
4561 | ||
4562 | sym = symbol_make (".ec"); | |
4563 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4564 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4565 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
4566 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4567 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4568 | |
4569 | ppc_frob_label (sym); | |
4570 | ||
4571 | demand_empty_rest_of_line (); | |
4572 | } | |
4573 | ||
4574 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
4575 | ||
4576 | static void | |
98027b10 | 4577 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4578 | { |
4579 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 4580 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
4581 | else |
4582 | { | |
4583 | subsegT subseg; | |
4584 | symbolS *sym; | |
4585 | symbolS *list; | |
81d4177b | 4586 | |
252b5132 RH |
4587 | subseg = ppc_data_subsegment; |
4588 | ++ppc_data_subsegment; | |
4589 | ||
4590 | subseg_new (segment_name (data_section), subseg); | |
4591 | ppc_toc_frag = frag_now; | |
4592 | ||
4593 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 4594 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4595 | S_SET_SEGMENT (sym, data_section); |
4596 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
4597 | symbol_get_tc (sym)->subseg = subseg; |
4598 | symbol_get_tc (sym)->output = 1; | |
4599 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
4600 | |
4601 | ppc_toc_csect = sym; | |
81d4177b | 4602 | |
252b5132 | 4603 | for (list = ppc_data_csects; |
809ffe0d ILT |
4604 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4605 | list = symbol_get_tc (list)->next) | |
252b5132 | 4606 | ; |
809ffe0d | 4607 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
4608 | |
4609 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4610 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4611 | &symbol_lastP); | |
252b5132 RH |
4612 | } |
4613 | ||
4614 | ppc_current_csect = ppc_toc_csect; | |
4615 | ||
4616 | demand_empty_rest_of_line (); | |
4617 | } | |
4618 | ||
4619 | /* The AIX assembler automatically aligns the operands of a .long or | |
4620 | .short pseudo-op, and we want to be compatible. */ | |
4621 | ||
4622 | static void | |
98027b10 | 4623 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
4624 | { |
4625 | frag_align (log_size, 0, 0); | |
4626 | record_alignment (now_seg, log_size); | |
4627 | cons (1 << log_size); | |
4628 | } | |
4629 | ||
4630 | static void | |
98027b10 | 4631 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
4632 | { |
4633 | expressionS exp; | |
4634 | int byte_count; | |
4635 | ||
4636 | (void) expression (&exp); | |
4637 | ||
4638 | if (exp.X_op != O_constant) | |
4639 | { | |
4640 | as_bad (_("non-constant byte count")); | |
4641 | return; | |
4642 | } | |
4643 | ||
4644 | byte_count = exp.X_add_number; | |
4645 | ||
4646 | if (*input_line_pointer != ',') | |
4647 | { | |
4648 | as_bad (_("missing value")); | |
4649 | return; | |
4650 | } | |
4651 | ||
4652 | ++input_line_pointer; | |
4653 | cons (byte_count); | |
4654 | } | |
4655 | ||
85645aed TG |
4656 | void |
4657 | ppc_xcoff_end (void) | |
4658 | { | |
4659 | int i; | |
4660 | ||
4661 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
4662 | { | |
4663 | struct dw_section *dws = &dw_sections[i]; | |
4664 | struct dw_subsection *dwss; | |
4665 | ||
4666 | if (dws->anon_subseg) | |
4667 | { | |
4668 | dwss = dws->anon_subseg; | |
4669 | dwss->link = dws->list_subseg; | |
4670 | } | |
4671 | else | |
4672 | dwss = dws->list_subseg; | |
4673 | ||
4674 | for (; dwss != NULL; dwss = dwss->link) | |
4675 | if (dwss->end_exp.X_add_symbol != NULL) | |
4676 | { | |
4677 | subseg_set (dws->sect, dwss->subseg); | |
4678 | symbol_set_value_now (dwss->end_exp.X_add_symbol); | |
4679 | } | |
4680 | } | |
4681 | } | |
4682 | ||
252b5132 | 4683 | #endif /* OBJ_XCOFF */ |
0baf16f2 | 4684 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
4685 | \f |
4686 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
4687 | ELF. This takes two or more arguments. | |
4688 | ||
4689 | When generating XCOFF output, the first argument is the name to | |
4690 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 4691 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4692 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4693 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4694 | depends on target word size. A 32-bit target uses 4-byte values, a |
4695 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4696 | |
4697 | When not generating XCOFF output, the arguments are the same, but | |
4698 | the first argument is simply ignored. */ | |
4699 | ||
4700 | static void | |
98027b10 | 4701 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4702 | { |
4703 | #ifdef OBJ_XCOFF | |
4704 | ||
4705 | /* Define the TOC symbol name. */ | |
4706 | { | |
4707 | char *name; | |
4708 | char endc; | |
4709 | symbolS *sym; | |
4710 | ||
4711 | if (ppc_toc_csect == (symbolS *) NULL | |
4712 | || ppc_toc_csect != ppc_current_csect) | |
4713 | { | |
4714 | as_bad (_(".tc not in .toc section")); | |
4715 | ignore_rest_of_line (); | |
4716 | return; | |
4717 | } | |
4718 | ||
4719 | name = input_line_pointer; | |
4720 | endc = get_symbol_end (); | |
4721 | ||
4722 | sym = symbol_find_or_make (name); | |
4723 | ||
4724 | *input_line_pointer = endc; | |
4725 | ||
4726 | if (S_IS_DEFINED (sym)) | |
4727 | { | |
4728 | symbolS *label; | |
4729 | ||
809ffe0d | 4730 | label = symbol_get_tc (ppc_current_csect)->within; |
96d56e9f | 4731 | if (symbol_get_tc (label)->symbol_class != XMC_TC0) |
252b5132 RH |
4732 | { |
4733 | as_bad (_(".tc with no label")); | |
4734 | ignore_rest_of_line (); | |
4735 | return; | |
4736 | } | |
4737 | ||
4738 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4739 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4740 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4741 | ||
4742 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4743 | ++input_line_pointer; | |
4744 | ||
4745 | return; | |
4746 | } | |
4747 | ||
4748 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4749 | symbol_set_frag (sym, frag_now); |
252b5132 | 4750 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
96d56e9f | 4751 | symbol_get_tc (sym)->symbol_class = XMC_TC; |
809ffe0d | 4752 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4753 | |
4754 | ppc_frob_label (sym); | |
4755 | } | |
4756 | ||
0baf16f2 AM |
4757 | #endif /* OBJ_XCOFF */ |
4758 | #ifdef OBJ_ELF | |
9c7977b3 | 4759 | int align; |
252b5132 RH |
4760 | |
4761 | /* Skip the TOC symbol name. */ | |
4762 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 4763 | || *input_line_pointer == ' ' |
252b5132 RH |
4764 | || *input_line_pointer == '[' |
4765 | || *input_line_pointer == ']' | |
4766 | || *input_line_pointer == '{' | |
4767 | || *input_line_pointer == '}') | |
4768 | ++input_line_pointer; | |
4769 | ||
0baf16f2 | 4770 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4771 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4772 | frag_align (align, 0, 0); |
4773 | record_alignment (now_seg, align); | |
0baf16f2 | 4774 | #endif /* OBJ_ELF */ |
252b5132 RH |
4775 | |
4776 | if (*input_line_pointer != ',') | |
4777 | demand_empty_rest_of_line (); | |
4778 | else | |
4779 | { | |
4780 | ++input_line_pointer; | |
2b3c4602 | 4781 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4782 | } |
4783 | } | |
0baf16f2 AM |
4784 | |
4785 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4786 | |
4787 | static void | |
98027b10 | 4788 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 4789 | { |
69c040df AM |
4790 | char *cpu_string; |
4791 | #define MAX_HISTORY 100 | |
fa452fa6 | 4792 | static ppc_cpu_t *cpu_history; |
69c040df AM |
4793 | static int curr_hist; |
4794 | ||
4795 | SKIP_WHITESPACE (); | |
4796 | ||
4797 | if (*input_line_pointer == '"') | |
4798 | { | |
4799 | int len; | |
4800 | cpu_string = demand_copy_C_string (&len); | |
4801 | } | |
4802 | else | |
4803 | { | |
4804 | char c; | |
4805 | cpu_string = input_line_pointer; | |
4806 | c = get_symbol_end (); | |
4807 | cpu_string = xstrdup (cpu_string); | |
4808 | *input_line_pointer = c; | |
4809 | } | |
4810 | ||
4811 | if (cpu_string != NULL) | |
4812 | { | |
fa452fa6 | 4813 | ppc_cpu_t old_cpu = ppc_cpu; |
69fe9ce5 | 4814 | ppc_cpu_t new_cpu; |
69c040df AM |
4815 | char *p; |
4816 | ||
4817 | for (p = cpu_string; *p != 0; p++) | |
4818 | *p = TOLOWER (*p); | |
4819 | ||
4820 | if (strcmp (cpu_string, "push") == 0) | |
4821 | { | |
4822 | if (cpu_history == NULL) | |
4823 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4824 | ||
4825 | if (curr_hist >= MAX_HISTORY) | |
4826 | as_bad (_(".machine stack overflow")); | |
4827 | else | |
4828 | cpu_history[curr_hist++] = ppc_cpu; | |
4829 | } | |
4830 | else if (strcmp (cpu_string, "pop") == 0) | |
4831 | { | |
4832 | if (curr_hist <= 0) | |
4833 | as_bad (_(".machine stack underflow")); | |
4834 | else | |
4835 | ppc_cpu = cpu_history[--curr_hist]; | |
4836 | } | |
69fe9ce5 AM |
4837 | else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0) |
4838 | ppc_cpu = new_cpu; | |
69c040df AM |
4839 | else |
4840 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4841 | ||
4842 | if (ppc_cpu != old_cpu) | |
4843 | ppc_setup_opcodes (); | |
4844 | } | |
4845 | ||
4846 | demand_empty_rest_of_line (); | |
0baf16f2 AM |
4847 | } |
4848 | ||
4849 | /* See whether a symbol is in the TOC section. */ | |
4850 | ||
4851 | static int | |
98027b10 | 4852 | ppc_is_toc_sym (symbolS *sym) |
0baf16f2 AM |
4853 | { |
4854 | #ifdef OBJ_XCOFF | |
96d56e9f | 4855 | return symbol_get_tc (sym)->symbol_class == XMC_TC; |
0baf16f2 AM |
4856 | #endif |
4857 | #ifdef OBJ_ELF | |
4858 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2b3c4602 | 4859 | if (ppc_obj64) |
0baf16f2 AM |
4860 | return strcmp (sname, ".toc") == 0; |
4861 | else | |
4862 | return strcmp (sname, ".got") == 0; | |
4863 | #endif | |
4864 | } | |
4865 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
4866 | \f |
4867 | #ifdef TE_PE | |
4868 | ||
99a814a1 | 4869 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4870 | |
4871 | /* Set the current section. */ | |
4872 | static void | |
98027b10 | 4873 | ppc_set_current_section (segT new) |
252b5132 RH |
4874 | { |
4875 | ppc_previous_section = ppc_current_section; | |
4876 | ppc_current_section = new; | |
4877 | } | |
4878 | ||
4879 | /* pseudo-op: .previous | |
4880 | behaviour: toggles the current section with the previous section. | |
4881 | errors: None | |
99a814a1 AM |
4882 | warnings: "No previous section" */ |
4883 | ||
252b5132 | 4884 | static void |
98027b10 | 4885 | ppc_previous (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4886 | { |
4887 | symbolS *tmp; | |
4888 | ||
81d4177b | 4889 | if (ppc_previous_section == NULL) |
252b5132 | 4890 | { |
d6ed37ed | 4891 | as_warn (_("no previous section to return to, ignored.")); |
252b5132 RH |
4892 | return; |
4893 | } | |
4894 | ||
99a814a1 | 4895 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4896 | |
99a814a1 | 4897 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4898 | } |
4899 | ||
4900 | /* pseudo-op: .pdata | |
4901 | behaviour: predefined read only data section | |
b34976b6 | 4902 | double word aligned |
252b5132 RH |
4903 | errors: None |
4904 | warnings: None | |
4905 | initial: .section .pdata "adr3" | |
b34976b6 | 4906 | a - don't know -- maybe a misprint |
252b5132 RH |
4907 | d - initialized data |
4908 | r - readable | |
4909 | 3 - double word aligned (that would be 4 byte boundary) | |
4910 | ||
4911 | commentary: | |
4912 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4913 | handling, debugging, etc. */ |
252b5132 | 4914 | |
252b5132 | 4915 | static void |
98027b10 | 4916 | ppc_pdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4917 | { |
81d4177b | 4918 | if (pdata_section == 0) |
252b5132 RH |
4919 | { |
4920 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4921 | |
252b5132 RH |
4922 | bfd_set_section_flags (stdoutput, pdata_section, |
4923 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4924 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4925 | |
252b5132 RH |
4926 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
4927 | } | |
4928 | else | |
4929 | { | |
99a814a1 | 4930 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 4931 | } |
99a814a1 | 4932 | ppc_set_current_section (pdata_section); |
252b5132 RH |
4933 | } |
4934 | ||
4935 | /* pseudo-op: .ydata | |
4936 | behaviour: predefined read only data section | |
b34976b6 | 4937 | double word aligned |
252b5132 RH |
4938 | errors: None |
4939 | warnings: None | |
4940 | initial: .section .ydata "drw3" | |
b34976b6 | 4941 | a - don't know -- maybe a misprint |
252b5132 RH |
4942 | d - initialized data |
4943 | r - readable | |
4944 | 3 - double word aligned (that would be 4 byte boundary) | |
4945 | commentary: | |
4946 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
4947 | debugging, etc. */ |
4948 | ||
252b5132 | 4949 | static void |
98027b10 | 4950 | ppc_ydata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4951 | { |
81d4177b | 4952 | if (ydata_section == 0) |
252b5132 RH |
4953 | { |
4954 | ydata_section = subseg_new (".ydata", 0); | |
4955 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
4956 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4957 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
4958 | |
4959 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
4960 | } | |
4961 | else | |
4962 | { | |
4963 | ydata_section = subseg_new (".ydata", 0); | |
4964 | } | |
99a814a1 | 4965 | ppc_set_current_section (ydata_section); |
252b5132 RH |
4966 | } |
4967 | ||
4968 | /* pseudo-op: .reldata | |
4969 | behaviour: predefined read write data section | |
b34976b6 | 4970 | double word aligned (4-byte) |
252b5132 RH |
4971 | FIXME: relocation is applied to it |
4972 | FIXME: what's the difference between this and .data? | |
4973 | errors: None | |
4974 | warnings: None | |
4975 | initial: .section .reldata "drw3" | |
4976 | d - initialized data | |
4977 | r - readable | |
4978 | w - writeable | |
4979 | 3 - double word aligned (that would be 8 byte boundary) | |
4980 | ||
4981 | commentary: | |
4982 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
4983 | function descriptors, etc. */ |
4984 | ||
252b5132 | 4985 | static void |
98027b10 | 4986 | ppc_reldata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4987 | { |
4988 | if (reldata_section == 0) | |
4989 | { | |
4990 | reldata_section = subseg_new (".reldata", 0); | |
4991 | ||
4992 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
4993 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4994 | | SEC_DATA)); | |
252b5132 RH |
4995 | |
4996 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
4997 | } | |
4998 | else | |
4999 | { | |
5000 | reldata_section = subseg_new (".reldata", 0); | |
5001 | } | |
99a814a1 | 5002 | ppc_set_current_section (reldata_section); |
252b5132 RH |
5003 | } |
5004 | ||
5005 | /* pseudo-op: .rdata | |
5006 | behaviour: predefined read only data section | |
b34976b6 | 5007 | double word aligned |
252b5132 RH |
5008 | errors: None |
5009 | warnings: None | |
5010 | initial: .section .rdata "dr3" | |
5011 | d - initialized data | |
5012 | r - readable | |
99a814a1 AM |
5013 | 3 - double word aligned (that would be 4 byte boundary) */ |
5014 | ||
252b5132 | 5015 | static void |
98027b10 | 5016 | ppc_rdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5017 | { |
5018 | if (rdata_section == 0) | |
5019 | { | |
5020 | rdata_section = subseg_new (".rdata", 0); | |
5021 | bfd_set_section_flags (stdoutput, rdata_section, | |
5022 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
5023 | | SEC_READONLY | SEC_DATA )); | |
5024 | ||
5025 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
5026 | } | |
5027 | else | |
5028 | { | |
5029 | rdata_section = subseg_new (".rdata", 0); | |
5030 | } | |
99a814a1 | 5031 | ppc_set_current_section (rdata_section); |
252b5132 RH |
5032 | } |
5033 | ||
5034 | /* pseudo-op: .ualong | |
81d4177b | 5035 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 5036 | performed. |
252b5132 RH |
5037 | FIXME: test the alignment statement |
5038 | errors: None | |
99a814a1 AM |
5039 | warnings: None */ |
5040 | ||
252b5132 | 5041 | static void |
98027b10 | 5042 | ppc_ualong (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5043 | { |
99a814a1 AM |
5044 | /* Try for long. */ |
5045 | cons (4); | |
252b5132 RH |
5046 | } |
5047 | ||
5048 | /* pseudo-op: .znop <symbol name> | |
5049 | behaviour: Issue a nop instruction | |
b34976b6 | 5050 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
5051 | the supplied symbol name. |
5052 | errors: None | |
99a814a1 AM |
5053 | warnings: Missing symbol name */ |
5054 | ||
252b5132 | 5055 | static void |
98027b10 | 5056 | ppc_znop (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5057 | { |
5058 | unsigned long insn; | |
5059 | const struct powerpc_opcode *opcode; | |
5060 | expressionS ex; | |
5061 | char *f; | |
252b5132 | 5062 | symbolS *sym; |
252b5132 RH |
5063 | char *symbol_name; |
5064 | char c; | |
5065 | char *name; | |
5066 | unsigned int exp; | |
5067 | flagword flags; | |
5068 | asection *sec; | |
5069 | ||
99a814a1 | 5070 | /* Strip out the symbol name. */ |
252b5132 RH |
5071 | symbol_name = input_line_pointer; |
5072 | c = get_symbol_end (); | |
5073 | ||
5074 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
5075 | strcpy (name, symbol_name); | |
5076 | ||
5077 | sym = symbol_find_or_make (name); | |
5078 | ||
5079 | *input_line_pointer = c; | |
5080 | ||
5081 | SKIP_WHITESPACE (); | |
5082 | ||
5083 | /* Look up the opcode in the hash table. */ | |
5084 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
5085 | ||
99a814a1 | 5086 | /* Stick in the nop. */ |
252b5132 RH |
5087 | insn = opcode->opcode; |
5088 | ||
5089 | /* Write out the instruction. */ | |
5090 | f = frag_more (4); | |
5091 | md_number_to_chars (f, insn, 4); | |
5092 | fix_new (frag_now, | |
5093 | f - frag_now->fr_literal, | |
5094 | 4, | |
5095 | sym, | |
5096 | 0, | |
5097 | 0, | |
5098 | BFD_RELOC_16_GOT_PCREL); | |
5099 | ||
5100 | } | |
5101 | ||
81d4177b KH |
5102 | /* pseudo-op: |
5103 | behaviour: | |
5104 | errors: | |
99a814a1 AM |
5105 | warnings: */ |
5106 | ||
252b5132 | 5107 | static void |
98027b10 | 5108 | ppc_pe_comm (int lcomm) |
252b5132 | 5109 | { |
98027b10 AM |
5110 | char *name; |
5111 | char c; | |
5112 | char *p; | |
252b5132 | 5113 | offsetT temp; |
98027b10 | 5114 | symbolS *symbolP; |
252b5132 RH |
5115 | offsetT align; |
5116 | ||
5117 | name = input_line_pointer; | |
5118 | c = get_symbol_end (); | |
5119 | ||
99a814a1 | 5120 | /* just after name is now '\0'. */ |
252b5132 RH |
5121 | p = input_line_pointer; |
5122 | *p = c; | |
5123 | SKIP_WHITESPACE (); | |
5124 | if (*input_line_pointer != ',') | |
5125 | { | |
d6ed37ed | 5126 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
5127 | ignore_rest_of_line (); |
5128 | return; | |
5129 | } | |
5130 | ||
5131 | input_line_pointer++; /* skip ',' */ | |
5132 | if ((temp = get_absolute_expression ()) < 0) | |
5133 | { | |
5134 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
5135 | ignore_rest_of_line (); | |
5136 | return; | |
5137 | } | |
5138 | ||
5139 | if (! lcomm) | |
5140 | { | |
5141 | /* The third argument to .comm is the alignment. */ | |
5142 | if (*input_line_pointer != ',') | |
5143 | align = 3; | |
5144 | else | |
5145 | { | |
5146 | ++input_line_pointer; | |
5147 | align = get_absolute_expression (); | |
5148 | if (align <= 0) | |
5149 | { | |
5150 | as_warn (_("ignoring bad alignment")); | |
5151 | align = 3; | |
5152 | } | |
5153 | } | |
5154 | } | |
5155 | ||
5156 | *p = 0; | |
5157 | symbolP = symbol_find_or_make (name); | |
5158 | ||
5159 | *p = c; | |
5160 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
5161 | { | |
d6ed37ed | 5162 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
5163 | S_GET_NAME (symbolP)); |
5164 | ignore_rest_of_line (); | |
5165 | return; | |
5166 | } | |
5167 | ||
5168 | if (S_GET_VALUE (symbolP)) | |
5169 | { | |
5170 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
d6ed37ed | 5171 | as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
5172 | S_GET_NAME (symbolP), |
5173 | (long) S_GET_VALUE (symbolP), | |
5174 | (long) temp); | |
5175 | } | |
5176 | else | |
5177 | { | |
5178 | S_SET_VALUE (symbolP, (valueT) temp); | |
5179 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 5180 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
5181 | } |
5182 | ||
5183 | demand_empty_rest_of_line (); | |
5184 | } | |
5185 | ||
5186 | /* | |
5187 | * implement the .section pseudo op: | |
5188 | * .section name {, "flags"} | |
5189 | * ^ ^ | |
5190 | * | +--- optional flags: 'b' for bss | |
5191 | * | 'i' for info | |
5192 | * +-- section name 'l' for lib | |
5193 | * 'n' for noload | |
5194 | * 'o' for over | |
5195 | * 'w' for data | |
5196 | * 'd' (apparently m88k for data) | |
5197 | * 'x' for text | |
5198 | * But if the argument is not a quoted string, treat it as a | |
5199 | * subsegment number. | |
5200 | * | |
5201 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
5202 | * additions/changes for the moto-pas assembler support. There are three | |
5203 | * categories: | |
5204 | * | |
81d4177b | 5205 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
5206 | * setting bits that bfd probably neither understands or uses. The |
5207 | * correct approach (?) will have to incorporate extra fields attached | |
5208 | * to the section to hold the system specific stuff. (krk) | |
5209 | * | |
5210 | * Section Contents: | |
5211 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
5212 | * 'c' - section has code | |
5213 | * 'd' - section has initialized data | |
5214 | * 'u' - section has uninitialized data | |
5215 | * 'i' - section contains directives (info) | |
5216 | * 'n' - section can be discarded | |
5217 | * 'R' - remove section at link time | |
5218 | * | |
5219 | * Section Protection: | |
5220 | * 'r' - section is readable | |
5221 | * 'w' - section is writeable | |
5222 | * 'x' - section is executable | |
5223 | * 's' - section is sharable | |
5224 | * | |
5225 | * Section Alignment: | |
5226 | * '0' - align to byte boundary | |
5227 | * '1' - align to halfword undary | |
5228 | * '2' - align to word boundary | |
5229 | * '3' - align to doubleword boundary | |
5230 | * '4' - align to quadword boundary | |
5231 | * '5' - align to 32 byte boundary | |
5232 | * '6' - align to 64 byte boundary | |
5233 | * | |
5234 | */ | |
5235 | ||
5236 | void | |
98027b10 | 5237 | ppc_pe_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5238 | { |
99a814a1 | 5239 | /* Strip out the section name. */ |
252b5132 RH |
5240 | char *section_name; |
5241 | char c; | |
5242 | char *name; | |
5243 | unsigned int exp; | |
5244 | flagword flags; | |
5245 | segT sec; | |
5246 | int align; | |
5247 | ||
5248 | section_name = input_line_pointer; | |
5249 | c = get_symbol_end (); | |
5250 | ||
5251 | name = xmalloc (input_line_pointer - section_name + 1); | |
5252 | strcpy (name, section_name); | |
5253 | ||
5254 | *input_line_pointer = c; | |
5255 | ||
5256 | SKIP_WHITESPACE (); | |
5257 | ||
5258 | exp = 0; | |
5259 | flags = SEC_NO_FLAGS; | |
5260 | ||
5261 | if (strcmp (name, ".idata$2") == 0) | |
5262 | { | |
5263 | align = 0; | |
5264 | } | |
5265 | else if (strcmp (name, ".idata$3") == 0) | |
5266 | { | |
5267 | align = 0; | |
5268 | } | |
5269 | else if (strcmp (name, ".idata$4") == 0) | |
5270 | { | |
5271 | align = 2; | |
5272 | } | |
5273 | else if (strcmp (name, ".idata$5") == 0) | |
5274 | { | |
5275 | align = 2; | |
5276 | } | |
5277 | else if (strcmp (name, ".idata$6") == 0) | |
5278 | { | |
5279 | align = 1; | |
5280 | } | |
5281 | else | |
99a814a1 AM |
5282 | /* Default alignment to 16 byte boundary. */ |
5283 | align = 4; | |
252b5132 RH |
5284 | |
5285 | if (*input_line_pointer == ',') | |
5286 | { | |
5287 | ++input_line_pointer; | |
5288 | SKIP_WHITESPACE (); | |
5289 | if (*input_line_pointer != '"') | |
5290 | exp = get_absolute_expression (); | |
5291 | else | |
5292 | { | |
5293 | ++input_line_pointer; | |
5294 | while (*input_line_pointer != '"' | |
5295 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
5296 | { | |
5297 | switch (*input_line_pointer) | |
5298 | { | |
5299 | /* Section Contents */ | |
5300 | case 'a': /* unknown */ | |
d6ed37ed | 5301 | as_bad (_("unsupported section attribute -- 'a'")); |
252b5132 RH |
5302 | break; |
5303 | case 'c': /* code section */ | |
81d4177b | 5304 | flags |= SEC_CODE; |
252b5132 RH |
5305 | break; |
5306 | case 'd': /* section has initialized data */ | |
5307 | flags |= SEC_DATA; | |
5308 | break; | |
5309 | case 'u': /* section has uninitialized data */ | |
5310 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
5311 | in winnt.h */ | |
5312 | flags |= SEC_ROM; | |
5313 | break; | |
5314 | case 'i': /* section contains directives (info) */ | |
5315 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
5316 | in winnt.h */ | |
5317 | flags |= SEC_HAS_CONTENTS; | |
5318 | break; | |
5319 | case 'n': /* section can be discarded */ | |
81d4177b | 5320 | flags &=~ SEC_LOAD; |
252b5132 RH |
5321 | break; |
5322 | case 'R': /* Remove section at link time */ | |
5323 | flags |= SEC_NEVER_LOAD; | |
5324 | break; | |
8d452c78 | 5325 | #if IFLICT_BRAIN_DAMAGE |
252b5132 RH |
5326 | /* Section Protection */ |
5327 | case 'r': /* section is readable */ | |
5328 | flags |= IMAGE_SCN_MEM_READ; | |
5329 | break; | |
5330 | case 'w': /* section is writeable */ | |
5331 | flags |= IMAGE_SCN_MEM_WRITE; | |
5332 | break; | |
5333 | case 'x': /* section is executable */ | |
5334 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
5335 | break; | |
5336 | case 's': /* section is sharable */ | |
5337 | flags |= IMAGE_SCN_MEM_SHARED; | |
5338 | break; | |
5339 | ||
5340 | /* Section Alignment */ | |
5341 | case '0': /* align to byte boundary */ | |
5342 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
5343 | align = 0; | |
5344 | break; | |
5345 | case '1': /* align to halfword boundary */ | |
5346 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
5347 | align = 1; | |
5348 | break; | |
5349 | case '2': /* align to word boundary */ | |
5350 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
5351 | align = 2; | |
5352 | break; | |
5353 | case '3': /* align to doubleword boundary */ | |
5354 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
5355 | align = 3; | |
5356 | break; | |
5357 | case '4': /* align to quadword boundary */ | |
5358 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
5359 | align = 4; | |
5360 | break; | |
5361 | case '5': /* align to 32 byte boundary */ | |
5362 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
5363 | align = 5; | |
5364 | break; | |
5365 | case '6': /* align to 64 byte boundary */ | |
5366 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
5367 | align = 6; | |
5368 | break; | |
8d452c78 | 5369 | #endif |
252b5132 | 5370 | default: |
99a814a1 AM |
5371 | as_bad (_("unknown section attribute '%c'"), |
5372 | *input_line_pointer); | |
252b5132 RH |
5373 | break; |
5374 | } | |
5375 | ++input_line_pointer; | |
5376 | } | |
5377 | if (*input_line_pointer == '"') | |
5378 | ++input_line_pointer; | |
5379 | } | |
5380 | } | |
5381 | ||
5382 | sec = subseg_new (name, (subsegT) exp); | |
5383 | ||
99a814a1 | 5384 | ppc_set_current_section (sec); |
252b5132 RH |
5385 | |
5386 | if (flags != SEC_NO_FLAGS) | |
5387 | { | |
5388 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
5389 | as_bad (_("error setting flags for \"%s\": %s"), | |
5390 | bfd_section_name (stdoutput, sec), | |
5391 | bfd_errmsg (bfd_get_error ())); | |
5392 | } | |
5393 | ||
99a814a1 | 5394 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
5395 | } |
5396 | ||
5397 | static void | |
98027b10 | 5398 | ppc_pe_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5399 | { |
5400 | char *name; | |
5401 | char endc; | |
5402 | symbolS *ext_sym; | |
5403 | ||
5404 | name = input_line_pointer; | |
5405 | endc = get_symbol_end (); | |
5406 | ||
5407 | ext_sym = symbol_find_or_make (name); | |
5408 | ||
5409 | *input_line_pointer = endc; | |
5410 | ||
5411 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
5412 | SF_SET_FUNCTION (ext_sym); | |
5413 | SF_SET_PROCESS (ext_sym); | |
5414 | coff_add_linesym (ext_sym); | |
5415 | ||
5416 | demand_empty_rest_of_line (); | |
5417 | } | |
5418 | ||
5419 | static void | |
98027b10 | 5420 | ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5421 | { |
5422 | if (tocdata_section == 0) | |
5423 | { | |
5424 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 5425 | /* FIXME: section flags won't work. */ |
252b5132 RH |
5426 | bfd_set_section_flags (stdoutput, tocdata_section, |
5427 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 5428 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
5429 | |
5430 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
5431 | } | |
5432 | else | |
5433 | { | |
5434 | rdata_section = subseg_new (".tocd", 0); | |
5435 | } | |
5436 | ||
99a814a1 | 5437 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
5438 | |
5439 | demand_empty_rest_of_line (); | |
5440 | } | |
5441 | ||
5442 | /* Don't adjust TOC relocs to use the section symbol. */ | |
5443 | ||
5444 | int | |
98027b10 | 5445 | ppc_pe_fix_adjustable (fixS *fix) |
252b5132 RH |
5446 | { |
5447 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
5448 | } | |
5449 | ||
5450 | #endif | |
5451 | \f | |
5452 | #ifdef OBJ_XCOFF | |
5453 | ||
5454 | /* XCOFF specific symbol and file handling. */ | |
5455 | ||
5456 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
5457 | any, to use square brackets, and to be in upper case. */ | |
5458 | ||
5459 | char * | |
98027b10 | 5460 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5461 | { |
5462 | char *s; | |
5463 | ||
5464 | if (ppc_stab_symbol) | |
5465 | return name; | |
5466 | ||
5467 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5468 | ; | |
5469 | if (*s != '\0') | |
5470 | { | |
5471 | char brac; | |
5472 | ||
5473 | if (*s == '[') | |
5474 | brac = ']'; | |
5475 | else | |
5476 | { | |
5477 | *s = '['; | |
5478 | brac = '}'; | |
5479 | } | |
5480 | ||
5481 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5482 | *s = TOUPPER (*s); |
252b5132 RH |
5483 | |
5484 | if (*s == '\0' || s[1] != '\0') | |
5485 | as_bad (_("bad symbol suffix")); | |
5486 | ||
5487 | *s = ']'; | |
5488 | } | |
5489 | ||
5490 | return name; | |
5491 | } | |
5492 | ||
5493 | /* Set the class of a symbol based on the suffix, if any. This is | |
5494 | called whenever a new symbol is created. */ | |
5495 | ||
5496 | void | |
98027b10 | 5497 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5498 | { |
809ffe0d | 5499 | struct ppc_tc_sy *tc; |
252b5132 RH |
5500 | const char *s; |
5501 | ||
809ffe0d ILT |
5502 | tc = symbol_get_tc (sym); |
5503 | tc->next = NULL; | |
5504 | tc->output = 0; | |
96d56e9f | 5505 | tc->symbol_class = -1; |
809ffe0d ILT |
5506 | tc->real_name = NULL; |
5507 | tc->subseg = 0; | |
5508 | tc->align = 0; | |
85645aed TG |
5509 | tc->u.size = NULL; |
5510 | tc->u.dw = NULL; | |
809ffe0d | 5511 | tc->within = NULL; |
252b5132 RH |
5512 | |
5513 | if (ppc_stab_symbol) | |
5514 | return; | |
5515 | ||
5516 | s = strchr (S_GET_NAME (sym), '['); | |
5517 | if (s == (const char *) NULL) | |
5518 | { | |
5519 | /* There is no suffix. */ | |
5520 | return; | |
5521 | } | |
5522 | ||
5523 | ++s; | |
5524 | ||
5525 | switch (s[0]) | |
5526 | { | |
5527 | case 'B': | |
5528 | if (strcmp (s, "BS]") == 0) | |
96d56e9f | 5529 | tc->symbol_class = XMC_BS; |
252b5132 RH |
5530 | break; |
5531 | case 'D': | |
5532 | if (strcmp (s, "DB]") == 0) | |
96d56e9f | 5533 | tc->symbol_class = XMC_DB; |
252b5132 | 5534 | else if (strcmp (s, "DS]") == 0) |
96d56e9f | 5535 | tc->symbol_class = XMC_DS; |
252b5132 RH |
5536 | break; |
5537 | case 'G': | |
5538 | if (strcmp (s, "GL]") == 0) | |
96d56e9f | 5539 | tc->symbol_class = XMC_GL; |
252b5132 RH |
5540 | break; |
5541 | case 'P': | |
5542 | if (strcmp (s, "PR]") == 0) | |
96d56e9f | 5543 | tc->symbol_class = XMC_PR; |
252b5132 RH |
5544 | break; |
5545 | case 'R': | |
5546 | if (strcmp (s, "RO]") == 0) | |
96d56e9f | 5547 | tc->symbol_class = XMC_RO; |
252b5132 | 5548 | else if (strcmp (s, "RW]") == 0) |
96d56e9f | 5549 | tc->symbol_class = XMC_RW; |
252b5132 RH |
5550 | break; |
5551 | case 'S': | |
5552 | if (strcmp (s, "SV]") == 0) | |
96d56e9f | 5553 | tc->symbol_class = XMC_SV; |
252b5132 RH |
5554 | break; |
5555 | case 'T': | |
5556 | if (strcmp (s, "TC]") == 0) | |
96d56e9f | 5557 | tc->symbol_class = XMC_TC; |
252b5132 | 5558 | else if (strcmp (s, "TI]") == 0) |
96d56e9f | 5559 | tc->symbol_class = XMC_TI; |
252b5132 | 5560 | else if (strcmp (s, "TB]") == 0) |
96d56e9f | 5561 | tc->symbol_class = XMC_TB; |
252b5132 | 5562 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
96d56e9f | 5563 | tc->symbol_class = XMC_TC0; |
252b5132 RH |
5564 | break; |
5565 | case 'U': | |
5566 | if (strcmp (s, "UA]") == 0) | |
96d56e9f | 5567 | tc->symbol_class = XMC_UA; |
252b5132 | 5568 | else if (strcmp (s, "UC]") == 0) |
96d56e9f | 5569 | tc->symbol_class = XMC_UC; |
252b5132 RH |
5570 | break; |
5571 | case 'X': | |
5572 | if (strcmp (s, "XO]") == 0) | |
96d56e9f | 5573 | tc->symbol_class = XMC_XO; |
252b5132 RH |
5574 | break; |
5575 | } | |
5576 | ||
96d56e9f | 5577 | if (tc->symbol_class == -1) |
d6ed37ed | 5578 | as_bad (_("unrecognized symbol suffix")); |
252b5132 RH |
5579 | } |
5580 | ||
5581 | /* Set the class of a label based on where it is defined. This | |
5582 | handles symbols without suffixes. Also, move the symbol so that it | |
5583 | follows the csect symbol. */ | |
5584 | ||
5585 | void | |
98027b10 | 5586 | ppc_frob_label (symbolS *sym) |
252b5132 RH |
5587 | { |
5588 | if (ppc_current_csect != (symbolS *) NULL) | |
5589 | { | |
96d56e9f NC |
5590 | if (symbol_get_tc (sym)->symbol_class == -1) |
5591 | symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; | |
252b5132 RH |
5592 | |
5593 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5594 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
5595 | &symbol_rootP, &symbol_lastP); | |
5596 | symbol_get_tc (ppc_current_csect)->within = sym; | |
2fb4b302 | 5597 | symbol_get_tc (sym)->within = ppc_current_csect; |
252b5132 | 5598 | } |
07a53e5c RH |
5599 | |
5600 | #ifdef OBJ_ELF | |
5601 | dwarf2_emit_label (sym); | |
5602 | #endif | |
252b5132 RH |
5603 | } |
5604 | ||
5605 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
5606 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
5607 | the symbols. */ | |
5608 | ||
b34976b6 | 5609 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
5610 | |
5611 | /* Change the name of a symbol just before writing it out. Set the | |
5612 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
5613 | class suffix. Return 1 if the symbol should not be included in the | |
5614 | symbol table. */ | |
5615 | ||
5616 | int | |
98027b10 | 5617 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
5618 | { |
5619 | static symbolS *ppc_last_function; | |
5620 | static symbolS *set_end; | |
5621 | ||
5622 | /* Discard symbols that should not be included in the output symbol | |
5623 | table. */ | |
809ffe0d ILT |
5624 | if (! symbol_used_in_reloc_p (sym) |
5625 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 5626 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5627 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
5628 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
5629 | return 1; | |
5630 | ||
a161fe53 AM |
5631 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
5632 | if (sym == abs_section_sym) | |
5633 | return 1; | |
5634 | ||
809ffe0d ILT |
5635 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
5636 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
5637 | else |
5638 | { | |
5639 | const char *name; | |
5640 | const char *s; | |
5641 | ||
5642 | name = S_GET_NAME (sym); | |
5643 | s = strchr (name, '['); | |
5644 | if (s != (char *) NULL) | |
5645 | { | |
5646 | unsigned int len; | |
5647 | char *snew; | |
5648 | ||
5649 | len = s - name; | |
5650 | snew = xmalloc (len + 1); | |
5651 | memcpy (snew, name, len); | |
5652 | snew[len] = '\0'; | |
5653 | ||
5654 | S_SET_NAME (sym, snew); | |
5655 | } | |
5656 | } | |
5657 | ||
5658 | if (set_end != (symbolS *) NULL) | |
5659 | { | |
5660 | SA_SET_SYM_ENDNDX (set_end, sym); | |
5661 | set_end = NULL; | |
5662 | } | |
5663 | ||
5664 | if (SF_GET_FUNCTION (sym)) | |
5665 | { | |
5666 | if (ppc_last_function != (symbolS *) NULL) | |
5667 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
5668 | ppc_last_function = sym; | |
85645aed | 5669 | if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) |
252b5132 | 5670 | { |
85645aed | 5671 | resolve_symbol_value (symbol_get_tc (sym)->u.size); |
809ffe0d | 5672 | SA_SET_SYM_FSIZE (sym, |
85645aed | 5673 | (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); |
252b5132 RH |
5674 | } |
5675 | } | |
5676 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5677 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5678 | { | |
5679 | if (ppc_last_function == (symbolS *) NULL) | |
5680 | as_bad (_(".ef with no preceding .function")); | |
5681 | else | |
5682 | { | |
5683 | set_end = ppc_last_function; | |
5684 | ppc_last_function = NULL; | |
5685 | ||
5686 | /* We don't have a C_EFCN symbol, but we need to force the | |
5687 | COFF backend to believe that it has seen one. */ | |
5688 | coff_last_function = NULL; | |
5689 | } | |
5690 | } | |
5691 | ||
670ec21d | 5692 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5693 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5694 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5695 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5696 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5697 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5698 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5699 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5700 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5701 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5702 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5703 | ||
5704 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
8602d4fe | 5705 | || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT |
252b5132 RH |
5706 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) |
5707 | { | |
5708 | int i; | |
5709 | union internal_auxent *a; | |
5710 | ||
5711 | /* Create a csect aux. */ | |
5712 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5713 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d | 5714 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
96d56e9f | 5715 | if (symbol_get_tc (sym)->symbol_class == XMC_TC0) |
252b5132 RH |
5716 | { |
5717 | /* This is the TOC table. */ | |
5718 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5719 | a->x_csect.x_scnlen.l = 0; | |
5720 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5721 | } | |
809ffe0d | 5722 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5723 | { |
5724 | /* This is a csect symbol. x_scnlen is the size of the | |
5725 | csect. */ | |
809ffe0d | 5726 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5727 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5728 | S_GET_SEGMENT (sym)) | |
5729 | - S_GET_VALUE (sym)); | |
5730 | else | |
5731 | { | |
6386f3a7 | 5732 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5733 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5734 | - S_GET_VALUE (sym)); |
5735 | } | |
809ffe0d | 5736 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5737 | } |
5738 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5739 | { | |
5740 | /* This is a common symbol. */ | |
809ffe0d ILT |
5741 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5742 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5743 | if (S_IS_EXTERNAL (sym)) |
96d56e9f | 5744 | symbol_get_tc (sym)->symbol_class = XMC_RW; |
252b5132 | 5745 | else |
96d56e9f | 5746 | symbol_get_tc (sym)->symbol_class = XMC_BS; |
252b5132 RH |
5747 | } |
5748 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5749 | { | |
5750 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5751 | ppc_adjust_symtab. */ |
b34976b6 | 5752 | ppc_saw_abs = TRUE; |
252b5132 | 5753 | a->x_csect.x_smtyp = XTY_LD; |
96d56e9f NC |
5754 | if (symbol_get_tc (sym)->symbol_class == -1) |
5755 | symbol_get_tc (sym)->symbol_class = XMC_XO; | |
252b5132 RH |
5756 | } |
5757 | else if (! S_IS_DEFINED (sym)) | |
5758 | { | |
5759 | /* This is an external symbol. */ | |
5760 | a->x_csect.x_scnlen.l = 0; | |
5761 | a->x_csect.x_smtyp = XTY_ER; | |
5762 | } | |
96d56e9f | 5763 | else if (symbol_get_tc (sym)->symbol_class == XMC_TC) |
252b5132 RH |
5764 | { |
5765 | symbolS *next; | |
5766 | ||
5767 | /* This is a TOC definition. x_scnlen is the size of the | |
5768 | TOC entry. */ | |
5769 | next = symbol_next (sym); | |
96d56e9f | 5770 | while (symbol_get_tc (next)->symbol_class == XMC_TC0) |
252b5132 RH |
5771 | next = symbol_next (next); |
5772 | if (next == (symbolS *) NULL | |
96d56e9f | 5773 | || symbol_get_tc (next)->symbol_class != XMC_TC) |
252b5132 RH |
5774 | { |
5775 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5776 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5777 | data_section) | |
5778 | - S_GET_VALUE (sym)); | |
5779 | else | |
5780 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5781 | - S_GET_VALUE (sym)); | |
5782 | } | |
5783 | else | |
5784 | { | |
6386f3a7 | 5785 | resolve_symbol_value (next); |
252b5132 RH |
5786 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5787 | - S_GET_VALUE (sym)); | |
5788 | } | |
5789 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5790 | } | |
5791 | else | |
5792 | { | |
5793 | symbolS *csect; | |
5794 | ||
5795 | /* This is a normal symbol definition. x_scnlen is the | |
5796 | symbol index of the containing csect. */ | |
5797 | if (S_GET_SEGMENT (sym) == text_section) | |
5798 | csect = ppc_text_csects; | |
5799 | else if (S_GET_SEGMENT (sym) == data_section) | |
5800 | csect = ppc_data_csects; | |
5801 | else | |
5802 | abort (); | |
5803 | ||
5804 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5805 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5806 | |
5807 | if (csect == (symbolS *) NULL) | |
5808 | { | |
5809 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5810 | a->x_csect.x_scnlen.l = 0; | |
5811 | } | |
5812 | else | |
5813 | { | |
809ffe0d | 5814 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5815 | { |
6386f3a7 | 5816 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5817 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5818 | > S_GET_VALUE (sym)) | |
252b5132 | 5819 | break; |
809ffe0d | 5820 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5821 | } |
5822 | ||
809ffe0d ILT |
5823 | a->x_csect.x_scnlen.p = |
5824 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5825 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5826 | 1; | |
252b5132 RH |
5827 | } |
5828 | a->x_csect.x_smtyp = XTY_LD; | |
5829 | } | |
81d4177b | 5830 | |
252b5132 RH |
5831 | a->x_csect.x_parmhash = 0; |
5832 | a->x_csect.x_snhash = 0; | |
96d56e9f | 5833 | if (symbol_get_tc (sym)->symbol_class == -1) |
252b5132 RH |
5834 | a->x_csect.x_smclas = XMC_PR; |
5835 | else | |
96d56e9f | 5836 | a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; |
252b5132 RH |
5837 | a->x_csect.x_stab = 0; |
5838 | a->x_csect.x_snstab = 0; | |
5839 | ||
5840 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5841 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5842 | } |
5843 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5844 | { | |
5845 | /* We want the value to be the symbol index of the referenced | |
5846 | csect symbol. BFD will do that for us if we set the right | |
5847 | flags. */ | |
b782de16 AM |
5848 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5849 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5850 | ||
5851 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5852 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5853 | } |
5854 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5855 | { | |
5856 | symbolS *block; | |
c734e7e3 | 5857 | valueT base; |
252b5132 | 5858 | |
809ffe0d | 5859 | block = symbol_get_tc (sym)->within; |
c734e7e3 TG |
5860 | if (block) |
5861 | { | |
5862 | /* The value is the offset from the enclosing csect. */ | |
5863 | symbolS *csect; | |
5864 | ||
5865 | csect = symbol_get_tc (block)->within; | |
5866 | resolve_symbol_value (csect); | |
5867 | base = S_GET_VALUE (csect); | |
5868 | } | |
5869 | else | |
5870 | base = 0; | |
5871 | ||
5872 | S_SET_VALUE (sym, S_GET_VALUE (sym) - base); | |
252b5132 RH |
5873 | } |
5874 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5875 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5876 | { | |
5877 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5878 | BFD will do that for us if we set the right flags. We have |
5879 | already set the value correctly. */ | |
809ffe0d | 5880 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5881 | } |
5882 | ||
5883 | return 0; | |
5884 | } | |
5885 | ||
5886 | /* Adjust the symbol table. This creates csect symbols for all | |
5887 | absolute symbols. */ | |
5888 | ||
5889 | void | |
98027b10 | 5890 | ppc_adjust_symtab (void) |
252b5132 RH |
5891 | { |
5892 | symbolS *sym; | |
5893 | ||
5894 | if (! ppc_saw_abs) | |
5895 | return; | |
5896 | ||
5897 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5898 | { | |
5899 | symbolS *csect; | |
5900 | int i; | |
5901 | union internal_auxent *a; | |
5902 | ||
5903 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5904 | continue; | |
5905 | ||
5906 | csect = symbol_create (".abs[XO]", absolute_section, | |
5907 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5908 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5909 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5910 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5911 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5912 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5913 | a->x_csect.x_scnlen.l = 0; |
5914 | a->x_csect.x_smtyp = XTY_SD; | |
5915 | a->x_csect.x_parmhash = 0; | |
5916 | a->x_csect.x_snhash = 0; | |
5917 | a->x_csect.x_smclas = XMC_XO; | |
5918 | a->x_csect.x_stab = 0; | |
5919 | a->x_csect.x_snstab = 0; | |
5920 | ||
5921 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5922 | ||
5923 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5924 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5925 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5926 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5927 | } |
5928 | ||
b34976b6 | 5929 | ppc_saw_abs = FALSE; |
252b5132 RH |
5930 | } |
5931 | ||
5932 | /* Set the VMA for a section. This is called on all the sections in | |
5933 | turn. */ | |
5934 | ||
5935 | void | |
98027b10 | 5936 | ppc_frob_section (asection *sec) |
252b5132 | 5937 | { |
931e13a6 | 5938 | static bfd_vma vma = 0; |
252b5132 | 5939 | |
85645aed TG |
5940 | /* Dwarf sections start at 0. */ |
5941 | if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) | |
5942 | return; | |
5943 | ||
931e13a6 | 5944 | vma = md_section_align (sec, vma); |
252b5132 RH |
5945 | bfd_set_section_vma (stdoutput, sec, vma); |
5946 | vma += bfd_section_size (stdoutput, sec); | |
5947 | } | |
5948 | ||
5949 | #endif /* OBJ_XCOFF */ | |
5950 | \f | |
252b5132 | 5951 | char * |
98027b10 | 5952 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 5953 | { |
499ac353 | 5954 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
5955 | } |
5956 | ||
5957 | /* Write a value out to the object file, using the appropriate | |
5958 | endianness. */ | |
5959 | ||
5960 | void | |
98027b10 | 5961 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
5962 | { |
5963 | if (target_big_endian) | |
5964 | number_to_chars_bigendian (buf, val, n); | |
5965 | else | |
5966 | number_to_chars_littleendian (buf, val, n); | |
5967 | } | |
5968 | ||
5969 | /* Align a section (I don't know why this is machine dependent). */ | |
5970 | ||
5971 | valueT | |
3aeeedbb | 5972 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 5973 | { |
3aeeedbb AM |
5974 | #ifdef OBJ_ELF |
5975 | return addr; | |
5976 | #else | |
252b5132 RH |
5977 | int align = bfd_get_section_alignment (stdoutput, seg); |
5978 | ||
5979 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 5980 | #endif |
252b5132 RH |
5981 | } |
5982 | ||
5983 | /* We don't have any form of relaxing. */ | |
5984 | ||
5985 | int | |
98027b10 AM |
5986 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
5987 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
5988 | { |
5989 | abort (); | |
5990 | return 0; | |
5991 | } | |
5992 | ||
5993 | /* Convert a machine dependent frag. We never generate these. */ | |
5994 | ||
5995 | void | |
98027b10 AM |
5996 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
5997 | asection *sec ATTRIBUTE_UNUSED, | |
5998 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
5999 | { |
6000 | abort (); | |
6001 | } | |
6002 | ||
6003 | /* We have no need to default values of symbols. */ | |
6004 | ||
252b5132 | 6005 | symbolS * |
98027b10 | 6006 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
6007 | { |
6008 | return 0; | |
6009 | } | |
6010 | \f | |
6011 | /* Functions concerning relocs. */ | |
6012 | ||
6013 | /* The location from which a PC relative jump should be calculated, | |
6014 | given a PC relative reloc. */ | |
6015 | ||
6016 | long | |
98027b10 | 6017 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
6018 | { |
6019 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
6020 | } | |
6021 | ||
6022 | #ifdef OBJ_XCOFF | |
6023 | ||
6024 | /* This is called to see whether a fixup should be adjusted to use a | |
6025 | section symbol. We take the opportunity to change a fixup against | |
6026 | a symbol in the TOC subsegment into a reloc against the | |
6027 | corresponding .tc symbol. */ | |
6028 | ||
6029 | int | |
98027b10 | 6030 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6031 | { |
b782de16 AM |
6032 | valueT val = resolve_symbol_value (fix->fx_addsy); |
6033 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
6034 | TC_SYMFIELD_TYPE *tc; | |
6035 | ||
6036 | if (symseg == absolute_section) | |
6037 | return 0; | |
252b5132 | 6038 | |
85645aed TG |
6039 | /* Always adjust symbols in debugging sections. */ |
6040 | if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) | |
6041 | return 1; | |
6042 | ||
252b5132 | 6043 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 6044 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 6045 | && symseg == data_section |
252b5132 RH |
6046 | && val >= ppc_toc_frag->fr_address |
6047 | && (ppc_after_toc_frag == (fragS *) NULL | |
6048 | || val < ppc_after_toc_frag->fr_address)) | |
6049 | { | |
6050 | symbolS *sy; | |
6051 | ||
6052 | for (sy = symbol_next (ppc_toc_csect); | |
6053 | sy != (symbolS *) NULL; | |
6054 | sy = symbol_next (sy)) | |
6055 | { | |
b782de16 AM |
6056 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
6057 | ||
96d56e9f | 6058 | if (sy_tc->symbol_class == XMC_TC0) |
252b5132 | 6059 | continue; |
96d56e9f | 6060 | if (sy_tc->symbol_class != XMC_TC) |
252b5132 | 6061 | break; |
b782de16 | 6062 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
6063 | { |
6064 | fix->fx_addsy = sy; | |
6065 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
6066 | return 0; | |
6067 | } | |
6068 | } | |
6069 | ||
6070 | as_bad_where (fix->fx_file, fix->fx_line, | |
6071 | _("symbol in .toc does not match any .tc")); | |
6072 | } | |
6073 | ||
6074 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
6075 | tc = symbol_get_tc (fix->fx_addsy); |
6076 | if (tc->subseg == 0 | |
96d56e9f NC |
6077 | && tc->symbol_class != XMC_TC0 |
6078 | && tc->symbol_class != XMC_TC | |
b782de16 | 6079 | && symseg != bss_section |
252b5132 | 6080 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 6081 | && (symseg != data_section |
252b5132 RH |
6082 | || ppc_toc_csect == NULL |
6083 | || val < ppc_toc_frag->fr_address | |
6084 | || (ppc_after_toc_frag != NULL | |
6085 | && val >= ppc_after_toc_frag->fr_address))) | |
6086 | { | |
2fb4b302 | 6087 | symbolS *csect = tc->within; |
252b5132 | 6088 | |
2fb4b302 TG |
6089 | /* If the symbol was not declared by a label (eg: a section symbol), |
6090 | use the section instead of the csect. This doesn't happen in | |
6091 | normal AIX assembly code. */ | |
6092 | if (csect == NULL) | |
6093 | csect = seg_info (symseg)->sym; | |
252b5132 | 6094 | |
2fb4b302 TG |
6095 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
6096 | fix->fx_addsy = csect; | |
252b5132 | 6097 | |
b782de16 | 6098 | return 0; |
252b5132 RH |
6099 | } |
6100 | ||
6101 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
6102 | .lcomm. */ | |
b782de16 | 6103 | if (symseg == bss_section |
252b5132 RH |
6104 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
6105 | { | |
b782de16 AM |
6106 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
6107 | ||
6108 | fix->fx_offset += val - resolve_symbol_value (sy); | |
6109 | fix->fx_addsy = sy; | |
252b5132 RH |
6110 | } |
6111 | ||
6112 | return 0; | |
6113 | } | |
6114 | ||
6115 | /* A reloc from one csect to another must be kept. The assembler | |
6116 | will, of course, keep relocs between sections, and it will keep | |
6117 | absolute relocs, but we need to force it to keep PC relative relocs | |
6118 | between two csects in the same section. */ | |
6119 | ||
6120 | int | |
98027b10 | 6121 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
6122 | { |
6123 | /* At this point fix->fx_addsy should already have been converted to | |
6124 | a csect symbol. If the csect does not include the fragment, then | |
6125 | we need to force the relocation. */ | |
6126 | if (fix->fx_pcrel | |
6127 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
6128 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
6129 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
6130 | > fix->fx_frag->fr_address) | |
6131 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
6132 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
6133 | <= fix->fx_frag->fr_address)))) |
6134 | return 1; | |
6135 | ||
ae6063d4 | 6136 | return generic_force_reloc (fix); |
252b5132 RH |
6137 | } |
6138 | ||
2fb4b302 TG |
6139 | void |
6140 | ppc_new_dot_label (symbolS *sym) | |
6141 | { | |
6142 | /* Anchor this label to the current csect for relocations. */ | |
6143 | symbol_get_tc (sym)->within = ppc_current_csect; | |
6144 | } | |
6145 | ||
252b5132 RH |
6146 | #endif /* OBJ_XCOFF */ |
6147 | ||
0baf16f2 | 6148 | #ifdef OBJ_ELF |
a161fe53 AM |
6149 | /* If this function returns non-zero, it guarantees that a relocation |
6150 | will be emitted for a fixup. */ | |
6151 | ||
6152 | int | |
98027b10 | 6153 | ppc_force_relocation (fixS *fix) |
a161fe53 AM |
6154 | { |
6155 | /* Branch prediction relocations must force a relocation, as must | |
6156 | the vtable description relocs. */ | |
6157 | switch (fix->fx_r_type) | |
6158 | { | |
6159 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6160 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6161 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6162 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 6163 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 6164 | case BFD_RELOC_PPC64_TOC: |
a161fe53 AM |
6165 | return 1; |
6166 | default: | |
6167 | break; | |
6168 | } | |
6169 | ||
cdba85ec AM |
6170 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
6171 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
6172 | return 1; | |
6173 | ||
ae6063d4 | 6174 | return generic_force_reloc (fix); |
a161fe53 AM |
6175 | } |
6176 | ||
0baf16f2 | 6177 | int |
98027b10 | 6178 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6179 | { |
0baf16f2 AM |
6180 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
6181 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
6182 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
6183 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
cc9edbf3 AM |
6184 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS |
6185 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS | |
0baf16f2 AM |
6186 | && fix->fx_r_type != BFD_RELOC_GPREL16 |
6187 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
6188 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 6189 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 6190 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 6191 | } |
0baf16f2 | 6192 | #endif |
252b5132 | 6193 | |
b9c361e0 JL |
6194 | void |
6195 | ppc_frag_check (struct frag *fragP) | |
6196 | { | |
6197 | if (!fragP->has_code) | |
6198 | return; | |
6199 | ||
6200 | if (ppc_mach() == bfd_mach_ppc_vle) | |
6201 | { | |
6202 | if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) | |
6203 | as_bad (_("instruction address is not a multiple of 2")); | |
6204 | } | |
6205 | else | |
6206 | { | |
6207 | if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) | |
6208 | as_bad (_("instruction address is not a multiple of 4")); | |
6209 | } | |
6210 | } | |
6211 | ||
3aeeedbb AM |
6212 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
6213 | rs_align_code frag. */ | |
6214 | ||
6215 | void | |
6216 | ppc_handle_align (struct frag *fragP) | |
6217 | { | |
6218 | valueT count = (fragP->fr_next->fr_address | |
6219 | - (fragP->fr_address + fragP->fr_fix)); | |
6220 | ||
b9c361e0 JL |
6221 | if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) |
6222 | { | |
6223 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6224 | ||
6225 | fragP->fr_var = 2; | |
6226 | md_number_to_chars (dest, 0x4400, 2); | |
6227 | } | |
6228 | else if (count != 0 && (count & 3) == 0) | |
3aeeedbb AM |
6229 | { |
6230 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6231 | ||
6232 | fragP->fr_var = 4; | |
cef4f754 AM |
6233 | |
6234 | if (count > 4 * nop_limit && count < 0x2000000) | |
6235 | { | |
6236 | struct frag *rest; | |
6237 | ||
6238 | /* Make a branch, then follow with nops. Insert another | |
6239 | frag to handle the nops. */ | |
6240 | md_number_to_chars (dest, 0x48000000 + count, 4); | |
6241 | count -= 4; | |
6242 | if (count == 0) | |
6243 | return; | |
6244 | ||
6245 | rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6246 | memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); | |
6247 | fragP->fr_next = rest; | |
6248 | fragP = rest; | |
6249 | rest->fr_address += rest->fr_fix + 4; | |
6250 | rest->fr_fix = 0; | |
6251 | /* If we leave the next frag as rs_align_code we'll come here | |
6252 | again, resulting in a bunch of branches rather than a | |
6253 | branch followed by nops. */ | |
6254 | rest->fr_type = rs_align; | |
6255 | dest = rest->fr_literal; | |
6256 | } | |
6257 | ||
3aeeedbb AM |
6258 | md_number_to_chars (dest, 0x60000000, 4); |
6259 | ||
42240548 PB |
6260 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 |
6261 | || (ppc_cpu & PPC_OPCODE_POWER7) != 0) | |
3aeeedbb | 6262 | { |
42240548 PB |
6263 | /* For power6 and power7, we want the last nop to be a group |
6264 | terminating one. Do this by inserting an rs_fill frag immediately | |
6265 | after this one, with its address set to the last nop location. | |
6266 | This will automatically reduce the number of nops in the current | |
6267 | frag by one. */ | |
3aeeedbb AM |
6268 | if (count > 4) |
6269 | { | |
6270 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6271 | ||
6272 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
6273 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
6274 | group_nop->fr_fix = 0; | |
6275 | group_nop->fr_offset = 1; | |
6276 | group_nop->fr_type = rs_fill; | |
6277 | fragP->fr_next = group_nop; | |
6278 | dest = group_nop->fr_literal; | |
6279 | } | |
6280 | ||
42240548 | 6281 | if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) |
aea77599 AM |
6282 | { |
6283 | if (ppc_cpu & PPC_OPCODE_E500MC) | |
6284 | /* e500mc group terminating nop: "ori 0,0,0". */ | |
6285 | md_number_to_chars (dest, 0x60000000, 4); | |
6286 | else | |
6287 | /* power7 group terminating nop: "ori 2,2,0". */ | |
6288 | md_number_to_chars (dest, 0x60420000, 4); | |
6289 | } | |
42240548 PB |
6290 | else |
6291 | /* power6 group terminating nop: "ori 1,1,0". */ | |
6292 | md_number_to_chars (dest, 0x60210000, 4); | |
3aeeedbb AM |
6293 | } |
6294 | } | |
6295 | } | |
6296 | ||
252b5132 RH |
6297 | /* Apply a fixup to the object code. This is called for all the |
6298 | fixups we generated by the call to fix_new_exp, above. In the call | |
6299 | above we used a reloc code which was the largest legal reloc code | |
6300 | plus the operand index. Here we undo that to recover the operand | |
6301 | index. At this point all symbol values should be fully resolved, | |
6302 | and we attempt to completely resolve the reloc. If we can not do | |
6303 | that, we determine the correct reloc code and put it back in the | |
6304 | fixup. */ | |
6305 | ||
94f592af | 6306 | void |
98027b10 | 6307 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 6308 | { |
94f592af | 6309 | valueT value = * valP; |
252b5132 RH |
6310 | |
6311 | #ifdef OBJ_ELF | |
94f592af | 6312 | if (fixP->fx_addsy != NULL) |
252b5132 | 6313 | { |
a161fe53 | 6314 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
6315 | if (fixP->fx_pcrel) |
6316 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
6317 | } |
6318 | else | |
94f592af | 6319 | fixP->fx_done = 1; |
252b5132 | 6320 | #else |
a161fe53 | 6321 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
6322 | the symbol values. If we are doing this relocation the code in |
6323 | write.c is going to call bfd_install_relocation, which is also | |
6324 | going to use the symbol value. That means that if the reloc is | |
6325 | fully resolved we want to use *valP since bfd_install_relocation is | |
6326 | not being used. | |
9f0eb232 RS |
6327 | However, if the reloc is not fully resolved we do not want to |
6328 | use *valP, and must use fx_offset instead. If the relocation | |
6329 | is PC-relative, we then need to re-apply md_pcrel_from_section | |
6330 | to this new relocation value. */ | |
94f592af NC |
6331 | if (fixP->fx_addsy == (symbolS *) NULL) |
6332 | fixP->fx_done = 1; | |
6333 | ||
252b5132 | 6334 | else |
9f0eb232 RS |
6335 | { |
6336 | value = fixP->fx_offset; | |
6337 | if (fixP->fx_pcrel) | |
6338 | value -= md_pcrel_from_section (fixP, seg); | |
6339 | } | |
a161fe53 AM |
6340 | #endif |
6341 | ||
6342 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 6343 | { |
a161fe53 AM |
6344 | /* We can't actually support subtracting a symbol. */ |
6345 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 6346 | } |
252b5132 | 6347 | |
94f592af | 6348 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) |
252b5132 RH |
6349 | { |
6350 | int opindex; | |
6351 | const struct powerpc_operand *operand; | |
6352 | char *where; | |
6353 | unsigned long insn; | |
6354 | ||
94f592af | 6355 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
252b5132 RH |
6356 | |
6357 | operand = &powerpc_operands[opindex]; | |
6358 | ||
6359 | #ifdef OBJ_XCOFF | |
0baf16f2 AM |
6360 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
6361 | does not generate a reloc. It uses the offset of `sym' within its | |
6362 | csect. Other usages, such as `.long sym', generate relocs. This | |
6363 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 6364 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6365 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 6366 | && operand->shift == 0 |
2b3c4602 | 6367 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
6368 | && fixP->fx_addsy != NULL |
6369 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
96d56e9f NC |
6370 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC |
6371 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 | |
94f592af | 6372 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) |
252b5132 | 6373 | { |
94f592af NC |
6374 | value = fixP->fx_offset; |
6375 | fixP->fx_done = 1; | |
252b5132 RH |
6376 | } |
6377 | #endif | |
6378 | ||
6379 | /* Fetch the instruction, insert the fully resolved operand | |
6380 | value, and stuff the instruction back again. */ | |
94f592af | 6381 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 | 6382 | if (target_big_endian) |
b9c361e0 JL |
6383 | { |
6384 | if (fixP->fx_size == 4) | |
6385 | insn = bfd_getb32 ((unsigned char *) where); | |
6386 | else | |
6387 | insn = bfd_getb16 ((unsigned char *) where); | |
6388 | } | |
252b5132 | 6389 | else |
b9c361e0 JL |
6390 | { |
6391 | if (fixP->fx_size == 4) | |
6392 | insn = bfd_getl32 ((unsigned char *) where); | |
6393 | else | |
6394 | insn = bfd_getl16 ((unsigned char *) where); | |
6395 | } | |
252b5132 | 6396 | insn = ppc_insert_operand (insn, operand, (offsetT) value, |
783de163 | 6397 | fixP->tc_fix_data.ppc_cpu, |
94f592af | 6398 | fixP->fx_file, fixP->fx_line); |
252b5132 | 6399 | if (target_big_endian) |
b9c361e0 JL |
6400 | { |
6401 | if (fixP->fx_size == 4) | |
6402 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6403 | else | |
6404 | bfd_putb16 ((bfd_vma) insn, (unsigned char *) where); | |
6405 | } | |
252b5132 | 6406 | else |
b9c361e0 JL |
6407 | { |
6408 | if (fixP->fx_size == 4) | |
6409 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6410 | else | |
6411 | bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); | |
6412 | } | |
252b5132 | 6413 | |
94f592af NC |
6414 | if (fixP->fx_done) |
6415 | /* Nothing else to do here. */ | |
6416 | return; | |
252b5132 | 6417 | |
9c2799c2 | 6418 | gas_assert (fixP->fx_addsy != NULL); |
0baf16f2 | 6419 | |
252b5132 RH |
6420 | /* Determine a BFD reloc value based on the operand information. |
6421 | We are only prepared to turn a few of the operands into | |
0baf16f2 | 6422 | relocs. */ |
11b37b7b | 6423 | if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 6424 | && operand->bitm == 0x3fffffc |
11b37b7b | 6425 | && operand->shift == 0) |
94f592af | 6426 | fixP->fx_r_type = BFD_RELOC_PPC_B26; |
11b37b7b | 6427 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 6428 | && operand->bitm == 0xfffc |
11b37b7b | 6429 | && operand->shift == 0) |
95210096 AM |
6430 | { |
6431 | fixP->fx_r_type = BFD_RELOC_PPC_B16; | |
6432 | #ifdef OBJ_XCOFF | |
6433 | fixP->fx_size = 2; | |
6434 | if (target_big_endian) | |
6435 | fixP->fx_where += 2; | |
6436 | #endif | |
6437 | } | |
b9c361e0 JL |
6438 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
6439 | && operand->bitm == 0x1fe | |
6440 | && operand->shift == -1) | |
6441 | fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL8; | |
6442 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
6443 | && operand->bitm == 0xfffe | |
6444 | && operand->shift == 0) | |
6445 | fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL15; | |
6446 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
6447 | && operand->bitm == 0x1fffffe | |
6448 | && operand->shift == 0) | |
6449 | fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL24; | |
11b37b7b | 6450 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 6451 | && operand->bitm == 0x3fffffc |
11b37b7b | 6452 | && operand->shift == 0) |
94f592af | 6453 | fixP->fx_r_type = BFD_RELOC_PPC_BA26; |
11b37b7b | 6454 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 6455 | && operand->bitm == 0xfffc |
11b37b7b | 6456 | && operand->shift == 0) |
95210096 AM |
6457 | { |
6458 | fixP->fx_r_type = BFD_RELOC_PPC_BA16; | |
6459 | #ifdef OBJ_XCOFF | |
6460 | fixP->fx_size = 2; | |
6461 | if (target_big_endian) | |
6462 | fixP->fx_where += 2; | |
6463 | #endif | |
6464 | } | |
0baf16f2 | 6465 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
11b37b7b | 6466 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6467 | && (operand->bitm & 0xfff0) == 0xfff0 |
a7fc733f | 6468 | && operand->shift == 0) |
11b37b7b | 6469 | { |
a7fc733f AM |
6470 | if (ppc_is_toc_sym (fixP->fx_addsy)) |
6471 | { | |
6472 | fixP->fx_r_type = BFD_RELOC_PPC_TOC16; | |
0baf16f2 | 6473 | #ifdef OBJ_ELF |
a7fc733f AM |
6474 | if (ppc_obj64 |
6475 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
6476 | fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS; | |
6477 | #endif | |
6478 | } | |
6479 | else | |
6480 | { | |
6481 | fixP->fx_r_type = BFD_RELOC_16; | |
6482 | #ifdef OBJ_ELF | |
6483 | if (ppc_obj64 | |
6484 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
6485 | fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS; | |
0baf16f2 | 6486 | #endif |
a7fc733f | 6487 | } |
94f592af | 6488 | fixP->fx_size = 2; |
11b37b7b | 6489 | if (target_big_endian) |
94f592af | 6490 | fixP->fx_where += 2; |
11b37b7b | 6491 | } |
0baf16f2 | 6492 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
11b37b7b | 6493 | else |
252b5132 RH |
6494 | { |
6495 | char *sfile; | |
6496 | unsigned int sline; | |
6497 | ||
6498 | /* Use expr_symbol_where to see if this is an expression | |
0baf16f2 | 6499 | symbol. */ |
94f592af NC |
6500 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) |
6501 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 RH |
6502 | _("unresolved expression that must be resolved")); |
6503 | else | |
94f592af | 6504 | as_bad_where (fixP->fx_file, fixP->fx_line, |
0baf16f2 | 6505 | _("unsupported relocation against %s"), |
94f592af NC |
6506 | S_GET_NAME (fixP->fx_addsy)); |
6507 | fixP->fx_done = 1; | |
6508 | return; | |
252b5132 RH |
6509 | } |
6510 | } | |
6511 | else | |
6512 | { | |
6513 | #ifdef OBJ_ELF | |
94f592af | 6514 | ppc_elf_validate_fix (fixP, seg); |
252b5132 | 6515 | #endif |
94f592af | 6516 | switch (fixP->fx_r_type) |
252b5132 | 6517 | { |
252b5132 | 6518 | case BFD_RELOC_CTOR: |
2b3c4602 | 6519 | if (ppc_obj64) |
9c7977b3 AM |
6520 | goto ctor64; |
6521 | /* fall through */ | |
6522 | ||
0baf16f2 | 6523 | case BFD_RELOC_32: |
94f592af NC |
6524 | if (fixP->fx_pcrel) |
6525 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
99a814a1 | 6526 | /* fall through */ |
252b5132 RH |
6527 | |
6528 | case BFD_RELOC_RVA: | |
6529 | case BFD_RELOC_32_PCREL: | |
252b5132 | 6530 | case BFD_RELOC_PPC_EMB_NADDR32: |
94f592af | 6531 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
6532 | value, 4); |
6533 | break; | |
6534 | ||
7f6d05e8 | 6535 | case BFD_RELOC_64: |
9c7977b3 | 6536 | ctor64: |
94f592af NC |
6537 | if (fixP->fx_pcrel) |
6538 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
99a814a1 | 6539 | /* fall through */ |
0baf16f2 | 6540 | |
7f6d05e8 | 6541 | case BFD_RELOC_64_PCREL: |
94f592af | 6542 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
7f6d05e8 | 6543 | value, 8); |
81d4177b | 6544 | break; |
0baf16f2 | 6545 | |
252b5132 RH |
6546 | case BFD_RELOC_GPREL16: |
6547 | case BFD_RELOC_16_GOT_PCREL: | |
6548 | case BFD_RELOC_16_GOTOFF: | |
6549 | case BFD_RELOC_LO16_GOTOFF: | |
6550 | case BFD_RELOC_HI16_GOTOFF: | |
6551 | case BFD_RELOC_HI16_S_GOTOFF: | |
1cfc59d5 | 6552 | case BFD_RELOC_16_BASEREL: |
252b5132 RH |
6553 | case BFD_RELOC_LO16_BASEREL: |
6554 | case BFD_RELOC_HI16_BASEREL: | |
6555 | case BFD_RELOC_HI16_S_BASEREL: | |
6556 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6557 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6558 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6559 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6560 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6561 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6562 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6563 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6564 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6565 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6566 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6567 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6568 | case BFD_RELOC_PPC_TOC16: | |
0baf16f2 | 6569 | #ifdef OBJ_ELF |
0baf16f2 AM |
6570 | case BFD_RELOC_PPC64_TOC16_LO: |
6571 | case BFD_RELOC_PPC64_TOC16_HI: | |
6572 | case BFD_RELOC_PPC64_TOC16_HA: | |
0baf16f2 | 6573 | #endif |
94f592af | 6574 | if (fixP->fx_pcrel) |
252b5132 | 6575 | { |
94f592af NC |
6576 | if (fixP->fx_addsy != NULL) |
6577 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 | 6578 | _("cannot emit PC relative %s relocation against %s"), |
94f592af NC |
6579 | bfd_get_reloc_code_name (fixP->fx_r_type), |
6580 | S_GET_NAME (fixP->fx_addsy)); | |
252b5132 | 6581 | else |
94f592af | 6582 | as_bad_where (fixP->fx_file, fixP->fx_line, |
252b5132 | 6583 | _("cannot emit PC relative %s relocation"), |
94f592af | 6584 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
252b5132 RH |
6585 | } |
6586 | ||
94f592af | 6587 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
6588 | value, 2); |
6589 | break; | |
6590 | ||
3c9d25f4 AM |
6591 | case BFD_RELOC_16: |
6592 | if (fixP->fx_pcrel) | |
6593 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
6594 | /* fall through */ | |
6595 | ||
6596 | case BFD_RELOC_16_PCREL: | |
6597 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6598 | value, 2); | |
6599 | break; | |
6600 | ||
6601 | case BFD_RELOC_LO16: | |
6602 | if (fixP->fx_pcrel) | |
6603 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
6604 | /* fall through */ | |
6605 | ||
6606 | case BFD_RELOC_LO16_PCREL: | |
6607 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6608 | value, 2); | |
6609 | break; | |
6610 | ||
252b5132 RH |
6611 | /* This case happens when you write, for example, |
6612 | lis %r3,(L1-L2)@ha | |
6613 | where L1 and L2 are defined later. */ | |
6614 | case BFD_RELOC_HI16: | |
94f592af | 6615 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
6616 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; |
6617 | /* fall through */ | |
6618 | ||
6619 | case BFD_RELOC_HI16_PCREL: | |
94f592af | 6620 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 6621 | PPC_HI (value), 2); |
252b5132 | 6622 | break; |
0baf16f2 | 6623 | |
252b5132 | 6624 | case BFD_RELOC_HI16_S: |
94f592af | 6625 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
6626 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; |
6627 | /* fall through */ | |
6628 | ||
6629 | case BFD_RELOC_HI16_S_PCREL: | |
94f592af | 6630 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6631 | PPC_HA (value), 2); |
6632 | break; | |
6633 | ||
b9c361e0 JL |
6634 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: |
6635 | case BFD_RELOC_PPC_VLE_LO16A: | |
6636 | { | |
6637 | int tval = PPC_VLE_LO16A (value); | |
6638 | valueT oldval = md_chars_to_number ( | |
6639 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6640 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6641 | (oldval | tval), 4); | |
6642 | } | |
6643 | break; | |
6644 | ||
6645 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
6646 | case BFD_RELOC_PPC_VLE_LO16D: | |
6647 | { | |
6648 | int tval = PPC_VLE_LO16D (value); | |
6649 | valueT oldval = md_chars_to_number ( | |
6650 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6651 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6652 | (oldval | tval), 4); | |
6653 | } | |
6654 | break; | |
6655 | ||
6656 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6657 | case BFD_RELOC_PPC_VLE_HI16A: | |
6658 | { | |
6659 | int tval = PPC_VLE_HI16A (value); | |
6660 | valueT oldval = md_chars_to_number ( | |
6661 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6662 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6663 | (oldval | tval), 4); | |
6664 | } | |
6665 | break; | |
6666 | ||
6667 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
6668 | case BFD_RELOC_PPC_VLE_HI16D: | |
6669 | { | |
6670 | int tval = PPC_VLE_HI16D (value); | |
6671 | valueT oldval = md_chars_to_number ( | |
6672 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6673 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6674 | (oldval | tval), 4); | |
6675 | } | |
6676 | break; | |
6677 | ||
6678 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6679 | case BFD_RELOC_PPC_VLE_HA16A: | |
6680 | { | |
6681 | int tval = PPC_VLE_HA16A (value); | |
6682 | valueT oldval = md_chars_to_number ( | |
6683 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6684 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6685 | (oldval | tval), 4); | |
6686 | } | |
6687 | break; | |
6688 | ||
6689 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
6690 | case BFD_RELOC_PPC_VLE_HA16D: | |
6691 | { | |
6692 | int tval = PPC_VLE_HA16D (value); | |
6693 | valueT oldval = md_chars_to_number ( | |
6694 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6695 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6696 | (oldval | tval), 4); | |
6697 | } | |
6698 | break; | |
6699 | ||
6700 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6701 | { | |
6702 | int tval = PPC_LO (value); | |
6703 | valueT oldval = md_chars_to_number ( | |
6704 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6705 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6706 | (oldval | tval), 4); | |
6707 | } | |
6708 | break; | |
6709 | ||
6710 | case BFD_RELOC_PPC_VLE_SDA21: | |
6711 | { | |
6712 | valueT oldval = md_chars_to_number ( | |
6713 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6714 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6715 | (oldval | value), 4); | |
6716 | } | |
6717 | break; | |
6718 | ||
c865e45b RS |
6719 | #ifdef OBJ_XCOFF |
6720 | case BFD_RELOC_NONE: | |
6721 | break; | |
6722 | #endif | |
6723 | ||
0baf16f2 | 6724 | #ifdef OBJ_ELF |
0baf16f2 | 6725 | case BFD_RELOC_PPC64_HIGHER: |
94f592af | 6726 | if (fixP->fx_pcrel) |
0baf16f2 | 6727 | abort (); |
94f592af | 6728 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 6729 | PPC_HIGHER (value), 2); |
252b5132 RH |
6730 | break; |
6731 | ||
0baf16f2 | 6732 | case BFD_RELOC_PPC64_HIGHER_S: |
94f592af | 6733 | if (fixP->fx_pcrel) |
0baf16f2 | 6734 | abort (); |
94f592af | 6735 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6736 | PPC_HIGHERA (value), 2); |
6737 | break; | |
6738 | ||
6739 | case BFD_RELOC_PPC64_HIGHEST: | |
94f592af | 6740 | if (fixP->fx_pcrel) |
0baf16f2 | 6741 | abort (); |
94f592af | 6742 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6743 | PPC_HIGHEST (value), 2); |
6744 | break; | |
6745 | ||
6746 | case BFD_RELOC_PPC64_HIGHEST_S: | |
94f592af | 6747 | if (fixP->fx_pcrel) |
0baf16f2 | 6748 | abort (); |
94f592af | 6749 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6750 | PPC_HIGHESTA (value), 2); |
6751 | break; | |
6752 | ||
6753 | case BFD_RELOC_PPC64_ADDR16_DS: | |
6754 | case BFD_RELOC_PPC64_ADDR16_LO_DS: | |
6755 | case BFD_RELOC_PPC64_GOT16_DS: | |
6756 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6757 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6758 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6759 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6760 | case BFD_RELOC_PPC64_TOC16_DS: | |
6761 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6762 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6763 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
94f592af | 6764 | if (fixP->fx_pcrel) |
0baf16f2 AM |
6765 | abort (); |
6766 | { | |
2132e3a3 | 6767 | char *where = fixP->fx_frag->fr_literal + fixP->fx_where; |
3d8aea2f | 6768 | unsigned long val, mask; |
0baf16f2 AM |
6769 | |
6770 | if (target_big_endian) | |
adadcc0c | 6771 | val = bfd_getb32 (where - 2); |
0baf16f2 | 6772 | else |
adadcc0c AM |
6773 | val = bfd_getl32 (where); |
6774 | mask = 0xfffc; | |
6775 | /* lq insns reserve the four lsbs. */ | |
6776 | if ((ppc_cpu & PPC_OPCODE_POWER4) != 0 | |
77a6138a | 6777 | && (val & (0x3f << 26)) == (56u << 26)) |
adadcc0c AM |
6778 | mask = 0xfff0; |
6779 | val |= value & mask; | |
0baf16f2 AM |
6780 | if (target_big_endian) |
6781 | bfd_putb16 ((bfd_vma) val, where); | |
6782 | else | |
6783 | bfd_putl16 ((bfd_vma) val, where); | |
6784 | } | |
6785 | break; | |
cdba85ec | 6786 | |
ba0b2174 AM |
6787 | case BFD_RELOC_PPC_B16_BRTAKEN: |
6788 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6789 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6790 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
6791 | break; | |
6792 | ||
cdba85ec | 6793 | case BFD_RELOC_PPC_TLS: |
727fc41e AM |
6794 | case BFD_RELOC_PPC_TLSGD: |
6795 | case BFD_RELOC_PPC_TLSLD: | |
7c1d0959 L |
6796 | break; |
6797 | ||
cdba85ec AM |
6798 | case BFD_RELOC_PPC_DTPMOD: |
6799 | case BFD_RELOC_PPC_TPREL16: | |
6800 | case BFD_RELOC_PPC_TPREL16_LO: | |
6801 | case BFD_RELOC_PPC_TPREL16_HI: | |
6802 | case BFD_RELOC_PPC_TPREL16_HA: | |
6803 | case BFD_RELOC_PPC_TPREL: | |
6804 | case BFD_RELOC_PPC_DTPREL16: | |
6805 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6806 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6807 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6808 | case BFD_RELOC_PPC_DTPREL: | |
6809 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6810 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6811 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6812 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6813 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6814 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6815 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6816 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6817 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6818 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6819 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6820 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6821 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6822 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6823 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6824 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6825 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6826 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
6827 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6828 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6829 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6830 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
6831 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
6832 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6833 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6834 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6835 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6836 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
7c1d0959 | 6837 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
cdba85ec | 6838 | break; |
0baf16f2 | 6839 | #endif |
252b5132 | 6840 | /* Because SDA21 modifies the register field, the size is set to 4 |
99a814a1 | 6841 | bytes, rather than 2, so offset it here appropriately. */ |
252b5132 | 6842 | case BFD_RELOC_PPC_EMB_SDA21: |
94f592af | 6843 | if (fixP->fx_pcrel) |
252b5132 RH |
6844 | abort (); |
6845 | ||
94f592af | 6846 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where |
252b5132 RH |
6847 | + ((target_big_endian) ? 2 : 0), |
6848 | value, 2); | |
6849 | break; | |
6850 | ||
6851 | case BFD_RELOC_8: | |
94f592af | 6852 | if (fixP->fx_pcrel) |
31a91399 NC |
6853 | { |
6854 | /* This can occur if there is a bug in the input assembler, eg: | |
b7d7dc63 | 6855 | ".byte <undefined_symbol> - ." */ |
31a91399 | 6856 | if (fixP->fx_addsy) |
d6ed37ed | 6857 | as_bad (_("unable to handle reference to symbol %s"), |
31a91399 NC |
6858 | S_GET_NAME (fixP->fx_addsy)); |
6859 | else | |
d6ed37ed | 6860 | as_bad (_("unable to resolve expression")); |
31a91399 NC |
6861 | fixP->fx_done = 1; |
6862 | } | |
6863 | else | |
6864 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6865 | value, 1); | |
252b5132 RH |
6866 | break; |
6867 | ||
6868 | case BFD_RELOC_24_PLT_PCREL: | |
6869 | case BFD_RELOC_PPC_LOCAL24PC: | |
94f592af | 6870 | if (!fixP->fx_pcrel && !fixP->fx_done) |
252b5132 RH |
6871 | abort (); |
6872 | ||
94f592af | 6873 | if (fixP->fx_done) |
99a814a1 AM |
6874 | { |
6875 | char *where; | |
6876 | unsigned long insn; | |
6877 | ||
6878 | /* Fetch the instruction, insert the fully resolved operand | |
6879 | value, and stuff the instruction back again. */ | |
94f592af | 6880 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
99a814a1 AM |
6881 | if (target_big_endian) |
6882 | insn = bfd_getb32 ((unsigned char *) where); | |
6883 | else | |
6884 | insn = bfd_getl32 ((unsigned char *) where); | |
6885 | if ((value & 3) != 0) | |
94f592af | 6886 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6887 | _("must branch to an address a multiple of 4")); |
6888 | if ((offsetT) value < -0x40000000 | |
6889 | || (offsetT) value >= 0x40000000) | |
94f592af | 6890 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6891 | _("@local or @plt branch destination is too far away, %ld bytes"), |
6892 | (long) value); | |
6893 | insn = insn | (value & 0x03fffffc); | |
6894 | if (target_big_endian) | |
6895 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6896 | else | |
6897 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6898 | } | |
252b5132 RH |
6899 | break; |
6900 | ||
6901 | case BFD_RELOC_VTABLE_INHERIT: | |
94f592af NC |
6902 | fixP->fx_done = 0; |
6903 | if (fixP->fx_addsy | |
6904 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6905 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6906 | S_SET_WEAK (fixP->fx_addsy); | |
252b5132 RH |
6907 | break; |
6908 | ||
6909 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6910 | fixP->fx_done = 0; |
252b5132 RH |
6911 | break; |
6912 | ||
0baf16f2 | 6913 | #ifdef OBJ_ELF |
0baf16f2 AM |
6914 | /* Generated by reference to `sym@tocbase'. The sym is |
6915 | ignored by the linker. */ | |
6916 | case BFD_RELOC_PPC64_TOC: | |
94f592af | 6917 | fixP->fx_done = 0; |
0baf16f2 | 6918 | break; |
0baf16f2 | 6919 | #endif |
252b5132 | 6920 | default: |
bc805888 | 6921 | fprintf (stderr, |
94f592af | 6922 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6923 | fflush (stderr); |
252b5132 RH |
6924 | abort (); |
6925 | } | |
6926 | } | |
6927 | ||
6928 | #ifdef OBJ_ELF | |
94f592af | 6929 | fixP->fx_addnumber = value; |
4e6935a6 AM |
6930 | |
6931 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
6932 | from the section contents. If we are going to be emitting a reloc | |
6933 | then the section contents are immaterial, so don't warn if they | |
6934 | happen to overflow. Leave such warnings to ld. */ | |
6935 | if (!fixP->fx_done) | |
6936 | fixP->fx_no_overflow = 1; | |
252b5132 | 6937 | #else |
94f592af NC |
6938 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
6939 | fixP->fx_addnumber = 0; | |
252b5132 RH |
6940 | else |
6941 | { | |
6942 | #ifdef TE_PE | |
94f592af | 6943 | fixP->fx_addnumber = 0; |
252b5132 | 6944 | #else |
8edcbfcd TG |
6945 | /* We want to use the offset within the toc, not the actual VMA |
6946 | of the symbol. */ | |
94f592af | 6947 | fixP->fx_addnumber = |
8edcbfcd TG |
6948 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) |
6949 | - S_GET_VALUE (ppc_toc_csect); | |
252b5132 RH |
6950 | #endif |
6951 | } | |
6952 | #endif | |
252b5132 RH |
6953 | } |
6954 | ||
6955 | /* Generate a reloc for a fixup. */ | |
6956 | ||
6957 | arelent * | |
98027b10 | 6958 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
6959 | { |
6960 | arelent *reloc; | |
6961 | ||
6962 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
6963 | ||
49309057 ILT |
6964 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
6965 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
6966 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
6967 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
6968 | if (reloc->howto == (reloc_howto_type *) NULL) | |
6969 | { | |
6970 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
6971 | _("reloc %d not supported by object file format"), |
6972 | (int) fixp->fx_r_type); | |
252b5132 RH |
6973 | return NULL; |
6974 | } | |
6975 | reloc->addend = fixp->fx_addnumber; | |
6976 | ||
6977 | return reloc; | |
6978 | } | |
75e21f08 JJ |
6979 | |
6980 | void | |
98027b10 | 6981 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
6982 | { |
6983 | cfi_add_CFA_def_cfa (1, 0); | |
6984 | } | |
6985 | ||
6986 | int | |
1df69f4f | 6987 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
6988 | { |
6989 | unsigned int regnum = -1; | |
6990 | unsigned int i; | |
6991 | const char *p; | |
6992 | char *q; | |
6993 | static struct { char *name; int dw2regnum; } regnames[] = | |
6994 | { | |
6995 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
6996 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 6997 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
6998 | { "spe_acc", 111 }, { "spefscr", 112 } |
6999 | }; | |
7000 | ||
7001 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
7002 | if (strcmp (regnames[i].name, regname) == 0) | |
7003 | return regnames[i].dw2regnum; | |
7004 | ||
7005 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
7006 | { | |
7007 | p = regname + 1 + (regname[1] == '.'); | |
7008 | regnum = strtoul (p, &q, 10); | |
7009 | if (p == q || *q || regnum >= 32) | |
7010 | return -1; | |
7011 | if (regname[0] == 'f') | |
b7d7dc63 | 7012 | regnum += 32; |
75e21f08 | 7013 | else if (regname[0] == 'v') |
b7d7dc63 | 7014 | regnum += 77; |
75e21f08 JJ |
7015 | } |
7016 | else if (regname[0] == 'c' && regname[1] == 'r') | |
7017 | { | |
7018 | p = regname + 2 + (regname[2] == '.'); | |
7019 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 7020 | return -1; |
75e21f08 JJ |
7021 | regnum = p[0] - '0' + 68; |
7022 | } | |
7023 | return regnum; | |
7024 | } |