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* config/tc-arm.c (do_vfp_nsyn_pop): Use fldmias/fldmiad.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
9622b051 3 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
b34976b6 87static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 88static void ppc_set_cpu PARAMS ((void));
89static unsigned long ppc_insert_operand
90 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
91 offsetT val, char *file, unsigned int line));
92static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
93static void ppc_byte PARAMS ((int));
0baf16f2
AM		 94
95#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 96static int ppc_is_toc_sym PARAMS ((symbolS *sym));
97static void ppc_tc PARAMS ((int));
0baf16f2
AM		 98static void ppc_machine PARAMS ((int));
99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
102static void ppc_comm PARAMS ((int));
103static void ppc_bb PARAMS ((int));
104static void ppc_bc PARAMS ((int));
105static void ppc_bf PARAMS ((int));
106static void ppc_biei PARAMS ((int));
107static void ppc_bs PARAMS ((int));
108static void ppc_eb PARAMS ((int));
109static void ppc_ec PARAMS ((int));
110static void ppc_ef PARAMS ((int));
111static void ppc_es PARAMS ((int));
112static void ppc_csect PARAMS ((int));
931e13a6 113static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 114static void ppc_function PARAMS ((int));
115static void ppc_extern PARAMS ((int));
116static void ppc_lglobl PARAMS ((int));
117static void ppc_section PARAMS ((int));
118static void ppc_named_section PARAMS ((int));
119static void ppc_stabx PARAMS ((int));
120static void ppc_rename PARAMS ((int));
121static void ppc_toc PARAMS ((int));
122static void ppc_xcoff_cons PARAMS ((int));
123static void ppc_vbyte PARAMS ((int));
124#endif
125
126#ifdef OBJ_ELF
127static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
128static void ppc_elf_cons PARAMS ((int));
129static void ppc_elf_rdata PARAMS ((int));
130static void ppc_elf_lcomm PARAMS ((int));
131static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 132static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 133#endif
134
135#ifdef TE_PE
136static void ppc_set_current_section PARAMS ((segT));
137static void ppc_previous PARAMS ((int));
138static void ppc_pdata PARAMS ((int));
139static void ppc_ydata PARAMS ((int));
140static void ppc_reldata PARAMS ((int));
141static void ppc_rdata PARAMS ((int));
142static void ppc_ualong PARAMS ((int));
143static void ppc_znop PARAMS ((int));
144static void ppc_pe_comm PARAMS ((int));
145static void ppc_pe_section PARAMS ((int));
146static void ppc_pe_function PARAMS ((int));
147static void ppc_pe_tocd PARAMS ((int));
148#endif
149\f
150/* Generic assembler global variables which must be defined by all
151 targets. */
152
153#ifdef OBJ_ELF
154/* This string holds the chars that always start a comment. If the
155 pre-processor is disabled, these aren't very useful. The macro
156 tc_comment_chars points to this. We use this, rather than the
157 usual comment_chars, so that we can switch for Solaris conventions. */
158static const char ppc_solaris_comment_chars[] = "#!";
159static const char ppc_eabi_comment_chars[] = "#";
160
161#ifdef TARGET_SOLARIS_COMMENT
162const char *ppc_comment_chars = ppc_solaris_comment_chars;
163#else
164const char *ppc_comment_chars = ppc_eabi_comment_chars;
165#endif
166#else
167const char comment_chars[] = "#";
168#endif
169
170/* Characters which start a comment at the beginning of a line. */
171const char line_comment_chars[] = "#";
172
173/* Characters which may be used to separate multiple commands on a
174 single line. */
175const char line_separator_chars[] = ";";
176
177/* Characters which are used to indicate an exponent in a floating
178 point number. */
179const char EXP_CHARS[] = "eE";
180
181/* Characters which mean that a number is a floating point constant,
182 as in 0d1.0. */
183const char FLT_CHARS[] = "dD";
5ce8663f 184
5e02f92e 185/* Anything that can start an operand needs to be mentioned here,
ac805826 186 to stop the input scrubber eating whitespace. */
5e02f92e 187const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 188
189/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
190int ppc_cie_data_alignment;
252b5132
RH		 191\f
192/* The target specific pseudo-ops which we support. */
193
194const pseudo_typeS md_pseudo_table[] =
195{
196 /* Pseudo-ops which must be overridden. */
197 { "byte", ppc_byte, 0 },
198
199#ifdef OBJ_XCOFF
200 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
201 legitimately belong in the obj-*.c file. However, XCOFF is based
202 on COFF, and is only implemented for the RS/6000. We just use
203 obj-coff.c, and add what we need here. */
204 { "comm", ppc_comm, 0 },
205 { "lcomm", ppc_comm, 1 },
206 { "bb", ppc_bb, 0 },
207 { "bc", ppc_bc, 0 },
208 { "bf", ppc_bf, 0 },
209 { "bi", ppc_biei, 0 },
210 { "bs", ppc_bs, 0 },
211 { "csect", ppc_csect, 0 },
212 { "data", ppc_section, 'd' },
213 { "eb", ppc_eb, 0 },
214 { "ec", ppc_ec, 0 },
215 { "ef", ppc_ef, 0 },
216 { "ei", ppc_biei, 1 },
217 { "es", ppc_es, 0 },
218 { "extern", ppc_extern, 0 },
219 { "function", ppc_function, 0 },
220 { "lglobl", ppc_lglobl, 0 },
221 { "rename", ppc_rename, 0 },
222 { "section", ppc_named_section, 0 },
223 { "stabx", ppc_stabx, 0 },
224 { "text", ppc_section, 't' },
225 { "toc", ppc_toc, 0 },
226 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 227 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 228 { "word", ppc_xcoff_cons, 1 },
229 { "short", ppc_xcoff_cons, 1 },
230 { "vbyte", ppc_vbyte, 0 },
231#endif
232
233#ifdef OBJ_ELF
0baf16f2
AM		 234 { "llong", ppc_elf_cons, 8 },
235 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 236 { "long", ppc_elf_cons, 4 },
237 { "word", ppc_elf_cons, 2 },
238 { "short", ppc_elf_cons, 2 },
239 { "rdata", ppc_elf_rdata, 0 },
240 { "rodata", ppc_elf_rdata, 0 },
241 { "lcomm", ppc_elf_lcomm, 0 },
242#endif
243
244#ifdef TE_PE
99a814a1 245 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 246 { "previous", ppc_previous, 0 },
247 { "pdata", ppc_pdata, 0 },
248 { "ydata", ppc_ydata, 0 },
249 { "reldata", ppc_reldata, 0 },
250 { "rdata", ppc_rdata, 0 },
251 { "ualong", ppc_ualong, 0 },
252 { "znop", ppc_znop, 0 },
253 { "comm", ppc_pe_comm, 0 },
254 { "lcomm", ppc_pe_comm, 1 },
255 { "section", ppc_pe_section, 0 },
256 { "function", ppc_pe_function,0 },
257 { "tocd", ppc_pe_tocd, 0 },
258#endif
259
0baf16f2 260#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 261 { "tc", ppc_tc, 0 },
0baf16f2
AM		 262 { "machine", ppc_machine, 0 },
263#endif
252b5132
RH		 264
265 { NULL, NULL, 0 }
266};
267
268\f
99a814a1
AM		 269/* Predefined register names if -mregnames (or default for Windows NT).
270 In general, there are lots of them, in an attempt to be compatible
271 with a number of other Windows NT assemblers. */
252b5132
RH		 272
273/* Structure to hold information about predefined registers. */
274struct pd_reg
275 {
276 char *name;
277 int value;
278 };
279
280/* List of registers that are pre-defined:
281
282 Each general register has predefined names of the form:
283 1. r<reg_num> which has the value <reg_num>.
284 2. r.<reg_num> which has the value <reg_num>.
285
252b5132
RH		 286 Each floating point register has predefined names of the form:
287 1. f<reg_num> which has the value <reg_num>.
288 2. f.<reg_num> which has the value <reg_num>.
289
7a899fff
C		 290 Each vector unit register has predefined names of the form:
291 1. v<reg_num> which has the value <reg_num>.
292 2. v.<reg_num> which has the value <reg_num>.
293
252b5132
RH		 294 Each condition register has predefined names of the form:
295 1. cr<reg_num> which has the value <reg_num>.
296 2. cr.<reg_num> which has the value <reg_num>.
297
298 There are individual registers as well:
299 sp or r.sp has the value 1
300 rtoc or r.toc has the value 2
301 fpscr has the value 0
302 xer has the value 1
303 lr has the value 8
304 ctr has the value 9
305 pmr has the value 0
306 dar has the value 19
307 dsisr has the value 18
308 dec has the value 22
309 sdr1 has the value 25
310 srr0 has the value 26
311 srr1 has the value 27
312
81d4177b 313 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 314
315static const struct pd_reg pre_defined_registers[] =
316{
317 { "cr.0", 0 }, /* Condition Registers */
318 { "cr.1", 1 },
319 { "cr.2", 2 },
320 { "cr.3", 3 },
321 { "cr.4", 4 },
322 { "cr.5", 5 },
323 { "cr.6", 6 },
324 { "cr.7", 7 },
325
326 { "cr0", 0 },
327 { "cr1", 1 },
328 { "cr2", 2 },
329 { "cr3", 3 },
330 { "cr4", 4 },
331 { "cr5", 5 },
332 { "cr6", 6 },
333 { "cr7", 7 },
334
335 { "ctr", 9 },
336
337 { "dar", 19 }, /* Data Access Register */
338 { "dec", 22 }, /* Decrementer */
339 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
340
341 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 342 { "f.1", 1 },
343 { "f.10", 10 },
344 { "f.11", 11 },
345 { "f.12", 12 },
346 { "f.13", 13 },
347 { "f.14", 14 },
348 { "f.15", 15 },
349 { "f.16", 16 },
350 { "f.17", 17 },
351 { "f.18", 18 },
352 { "f.19", 19 },
353 { "f.2", 2 },
354 { "f.20", 20 },
355 { "f.21", 21 },
356 { "f.22", 22 },
357 { "f.23", 23 },
358 { "f.24", 24 },
359 { "f.25", 25 },
360 { "f.26", 26 },
361 { "f.27", 27 },
362 { "f.28", 28 },
363 { "f.29", 29 },
364 { "f.3", 3 },
252b5132
RH		 365 { "f.30", 30 },
366 { "f.31", 31 },
81d4177b
KH		 367 { "f.4", 4 },
368 { "f.5", 5 },
369 { "f.6", 6 },
370 { "f.7", 7 },
371 { "f.8", 8 },
372 { "f.9", 9 },
373
374 { "f0", 0 },
375 { "f1", 1 },
376 { "f10", 10 },
377 { "f11", 11 },
378 { "f12", 12 },
379 { "f13", 13 },
380 { "f14", 14 },
381 { "f15", 15 },
382 { "f16", 16 },
383 { "f17", 17 },
384 { "f18", 18 },
385 { "f19", 19 },
386 { "f2", 2 },
387 { "f20", 20 },
388 { "f21", 21 },
389 { "f22", 22 },
390 { "f23", 23 },
391 { "f24", 24 },
392 { "f25", 25 },
393 { "f26", 26 },
394 { "f27", 27 },
395 { "f28", 28 },
396 { "f29", 29 },
397 { "f3", 3 },
252b5132
RH		 398 { "f30", 30 },
399 { "f31", 31 },
81d4177b
KH		 400 { "f4", 4 },
401 { "f5", 5 },
402 { "f6", 6 },
403 { "f7", 7 },
404 { "f8", 8 },
405 { "f9", 9 },
252b5132
RH		 406
407 { "fpscr", 0 },
408
409 { "lr", 8 }, /* Link Register */
410
411 { "pmr", 0 },
412
413 { "r.0", 0 }, /* General Purpose Registers */
414 { "r.1", 1 },
415 { "r.10", 10 },
416 { "r.11", 11 },
417 { "r.12", 12 },
418 { "r.13", 13 },
419 { "r.14", 14 },
420 { "r.15", 15 },
421 { "r.16", 16 },
422 { "r.17", 17 },
423 { "r.18", 18 },
424 { "r.19", 19 },
425 { "r.2", 2 },
426 { "r.20", 20 },
427 { "r.21", 21 },
428 { "r.22", 22 },
429 { "r.23", 23 },
430 { "r.24", 24 },
431 { "r.25", 25 },
432 { "r.26", 26 },
433 { "r.27", 27 },
434 { "r.28", 28 },
435 { "r.29", 29 },
436 { "r.3", 3 },
437 { "r.30", 30 },
438 { "r.31", 31 },
439 { "r.4", 4 },
440 { "r.5", 5 },
441 { "r.6", 6 },
442 { "r.7", 7 },
443 { "r.8", 8 },
444 { "r.9", 9 },
445
446 { "r.sp", 1 }, /* Stack Pointer */
447
448 { "r.toc", 2 }, /* Pointer to the table of contents */
449
450 { "r0", 0 }, /* More general purpose registers */
451 { "r1", 1 },
452 { "r10", 10 },
453 { "r11", 11 },
454 { "r12", 12 },
455 { "r13", 13 },
456 { "r14", 14 },
457 { "r15", 15 },
458 { "r16", 16 },
459 { "r17", 17 },
460 { "r18", 18 },
461 { "r19", 19 },
462 { "r2", 2 },
463 { "r20", 20 },
464 { "r21", 21 },
465 { "r22", 22 },
466 { "r23", 23 },
467 { "r24", 24 },
468 { "r25", 25 },
469 { "r26", 26 },
470 { "r27", 27 },
471 { "r28", 28 },
472 { "r29", 29 },
473 { "r3", 3 },
474 { "r30", 30 },
475 { "r31", 31 },
476 { "r4", 4 },
477 { "r5", 5 },
478 { "r6", 6 },
479 { "r7", 7 },
480 { "r8", 8 },
481 { "r9", 9 },
482
483 { "rtoc", 2 }, /* Table of contents */
484
485 { "sdr1", 25 }, /* Storage Description Register 1 */
486
487 { "sp", 1 },
488
489 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
490 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 491
7a899fff 492 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 493 { "v.1", 1 },
494 { "v.10", 10 },
495 { "v.11", 11 },
496 { "v.12", 12 },
497 { "v.13", 13 },
498 { "v.14", 14 },
499 { "v.15", 15 },
500 { "v.16", 16 },
501 { "v.17", 17 },
502 { "v.18", 18 },
503 { "v.19", 19 },
504 { "v.2", 2 },
505 { "v.20", 20 },
506 { "v.21", 21 },
507 { "v.22", 22 },
508 { "v.23", 23 },
509 { "v.24", 24 },
510 { "v.25", 25 },
511 { "v.26", 26 },
512 { "v.27", 27 },
513 { "v.28", 28 },
514 { "v.29", 29 },
515 { "v.3", 3 },
7a899fff
C		 516 { "v.30", 30 },
517 { "v.31", 31 },
81d4177b
KH		 518 { "v.4", 4 },
519 { "v.5", 5 },
520 { "v.6", 6 },
521 { "v.7", 7 },
522 { "v.8", 8 },
523 { "v.9", 9 },
7a899fff
C		 524
525 { "v0", 0 },
81d4177b
KH		 526 { "v1", 1 },
527 { "v10", 10 },
528 { "v11", 11 },
529 { "v12", 12 },
530 { "v13", 13 },
531 { "v14", 14 },
532 { "v15", 15 },
533 { "v16", 16 },
534 { "v17", 17 },
535 { "v18", 18 },
536 { "v19", 19 },
537 { "v2", 2 },
538 { "v20", 20 },
539 { "v21", 21 },
540 { "v22", 22 },
541 { "v23", 23 },
542 { "v24", 24 },
543 { "v25", 25 },
544 { "v26", 26 },
545 { "v27", 27 },
546 { "v28", 28 },
547 { "v29", 29 },
548 { "v3", 3 },
7a899fff
C		 549 { "v30", 30 },
550 { "v31", 31 },
81d4177b
KH		 551 { "v4", 4 },
552 { "v5", 5 },
553 { "v6", 6 },
554 { "v7", 7 },
555 { "v8", 8 },
7a899fff 556 { "v9", 9 },
252b5132
RH		 557
558 { "xer", 1 },
559
560};
561
bc805888 562#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 563
564/* Given NAME, find the register number associated with that name, return
565 the integer value associated with the given name or -1 on failure. */
566
567static int reg_name_search
568 PARAMS ((const struct pd_reg *, int, const char * name));
569
570static int
571reg_name_search (regs, regcount, name)
572 const struct pd_reg *regs;
573 int regcount;
574 const char *name;
575{
576 int middle, low, high;
577 int cmp;
578
579 low = 0;
580 high = regcount - 1;
581
582 do
583 {
584 middle = (low + high) / 2;
585 cmp = strcasecmp (name, regs[middle].name);
586 if (cmp < 0)
587 high = middle - 1;
588 else if (cmp > 0)
589 low = middle + 1;
590 else
591 return regs[middle].value;
592 }
593 while (low <= high);
594
595 return -1;
596}
597
598/*
99a814a1 599 * Summary of register_name.
252b5132
RH		 600 *
601 * in: Input_line_pointer points to 1st char of operand.
602 *
603 * out: A expressionS.
604 * The operand may have been a register: in this case, X_op == O_register,
605 * X_add_number is set to the register number, and truth is returned.
606 * Input_line_pointer->(next non-blank) char after operand, or is in its
607 * original state.
608 */
609
b34976b6 610static bfd_boolean
252b5132
RH		 611register_name (expressionP)
612 expressionS *expressionP;
613{
614 int reg_number;
615 char *name;
616 char *start;
617 char c;
618
99a814a1 619 /* Find the spelling of the operand. */
252b5132 620 start = name = input_line_pointer;
3882b010 621 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 622 name = ++input_line_pointer;
623
3882b010 624 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 625 return FALSE;
252b5132
RH		 626
627 c = get_symbol_end ();
628 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
629
468cced8
AM		 630 /* Put back the delimiting char. */
631 *input_line_pointer = c;
632
99a814a1 633 /* Look to see if it's in the register table. */
81d4177b 634 if (reg_number >= 0)
252b5132
RH		 635 {
636 expressionP->X_op = O_register;
637 expressionP->X_add_number = reg_number;
81d4177b 638
99a814a1 639 /* Make the rest nice. */
252b5132
RH		 640 expressionP->X_add_symbol = NULL;
641 expressionP->X_op_symbol = NULL;
b34976b6 642 return TRUE;
252b5132 643 }
468cced8
AM		 644
645 /* Reset the line as if we had not done anything. */
646 input_line_pointer = start;
b34976b6 647 return FALSE;
252b5132
RH		 648}
649\f
650/* This function is called for each symbol seen in an expression. It
651 handles the special parsing which PowerPC assemblers are supposed
652 to use for condition codes. */
653
654/* Whether to do the special parsing. */
b34976b6 655static bfd_boolean cr_operand;
252b5132
RH		 656
657/* Names to recognize in a condition code. This table is sorted. */
658static const struct pd_reg cr_names[] =
659{
660 { "cr0", 0 },
661 { "cr1", 1 },
662 { "cr2", 2 },
663 { "cr3", 3 },
664 { "cr4", 4 },
665 { "cr5", 5 },
666 { "cr6", 6 },
667 { "cr7", 7 },
668 { "eq", 2 },
669 { "gt", 1 },
670 { "lt", 0 },
671 { "so", 3 },
672 { "un", 3 }
673};
674
675/* Parsing function. This returns non-zero if it recognized an
676 expression. */
677
678int
679ppc_parse_name (name, expr)
680 const char *name;
681 expressionS *expr;
682{
683 int val;
684
685 if (! cr_operand)
686 return 0;
687
688 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
689 name);
690 if (val < 0)
691 return 0;
692
693 expr->X_op = O_constant;
694 expr->X_add_number = val;
695
696 return 1;
697}
698\f
699/* Local variables. */
700
701/* The type of processor we are assembling for. This is one or more
702 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 703static unsigned long ppc_cpu = 0;
252b5132 704
2b3c4602
AM		 705/* Whether to target xcoff64/elf64. */
706static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 707
252b5132
RH		 708/* Opcode hash table. */
709static struct hash_control *ppc_hash;
710
711/* Macro hash table. */
712static struct hash_control *ppc_macro_hash;
713
714#ifdef OBJ_ELF
99a814a1 715/* What type of shared library support to use. */
5d6f4f16 716static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 717
99a814a1 718/* Flags to set in the elf header. */
252b5132
RH		 719static flagword ppc_flags = 0;
720
721/* Whether this is Solaris or not. */
722#ifdef TARGET_SOLARIS_COMMENT
b34976b6 723#define SOLARIS_P TRUE
252b5132 724#else
b34976b6 725#define SOLARIS_P FALSE
252b5132
RH		 726#endif
727
b34976b6 728static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 729#endif
730
731#ifdef OBJ_XCOFF
732
733/* The RS/6000 assembler uses the .csect pseudo-op to generate code
734 using a bunch of different sections. These assembler sections,
735 however, are all encompassed within the .text or .data sections of
736 the final output file. We handle this by using different
737 subsegments within these main segments. */
738
739/* Next subsegment to allocate within the .text segment. */
740static subsegT ppc_text_subsegment = 2;
741
742/* Linked list of csects in the text section. */
743static symbolS *ppc_text_csects;
744
745/* Next subsegment to allocate within the .data segment. */
746static subsegT ppc_data_subsegment = 2;
747
748/* Linked list of csects in the data section. */
749static symbolS *ppc_data_csects;
750
751/* The current csect. */
752static symbolS *ppc_current_csect;
753
754/* The RS/6000 assembler uses a TOC which holds addresses of functions
755 and variables. Symbols are put in the TOC with the .tc pseudo-op.
756 A special relocation is used when accessing TOC entries. We handle
757 the TOC as a subsegment within the .data segment. We set it up if
758 we see a .toc pseudo-op, and save the csect symbol here. */
759static symbolS *ppc_toc_csect;
760
761/* The first frag in the TOC subsegment. */
762static fragS *ppc_toc_frag;
763
764/* The first frag in the first subsegment after the TOC in the .data
765 segment. NULL if there are no subsegments after the TOC. */
766static fragS *ppc_after_toc_frag;
767
768/* The current static block. */
769static symbolS *ppc_current_block;
770
771/* The COFF debugging section; set by md_begin. This is not the
772 .debug section, but is instead the secret BFD section which will
773 cause BFD to set the section number of a symbol to N_DEBUG. */
774static asection *ppc_coff_debug_section;
775
776#endif /* OBJ_XCOFF */
777
778#ifdef TE_PE
779
780/* Various sections that we need for PE coff support. */
781static segT ydata_section;
782static segT pdata_section;
783static segT reldata_section;
784static segT rdata_section;
785static segT tocdata_section;
786
81d4177b 787/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 788static segT ppc_previous_section;
789static segT ppc_current_section;
790
791#endif /* TE_PE */
792
793#ifdef OBJ_ELF
794symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 795#define PPC_APUINFO_ISEL 0x40
796#define PPC_APUINFO_PMR 0x41
797#define PPC_APUINFO_RFMCI 0x42
798#define PPC_APUINFO_CACHELCK 0x43
799#define PPC_APUINFO_SPE 0x100
800#define PPC_APUINFO_EFS 0x101
801#define PPC_APUINFO_BRLOCK 0x102
802
b34976b6
AM		 803/*
804 * We keep a list of APUinfo
6a0c61b7
EZ		 805 */
806unsigned long *ppc_apuinfo_list;
807unsigned int ppc_apuinfo_num;
808unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 809#endif /* OBJ_ELF */
810\f
811#ifdef OBJ_ELF
15c1449b 812const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 813#else
15c1449b 814const char *const md_shortopts = "um:";
252b5132 815#endif
15c1449b 816const struct option md_longopts[] = {
252b5132
RH		 817 {NULL, no_argument, NULL, 0}
818};
15c1449b 819const size_t md_longopts_size = sizeof (md_longopts);
252b5132 820
69c040df
AM		 821
822/* Handle -m options that set cpu type, and .machine arg. */
823
824static int
825parse_cpu (const char *arg)
826{
827 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
828 (RIOS2). */
829 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
830 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
831 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
832 else if (strcmp (arg, "pwr") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
834 /* -m601 means to assemble for the PowerPC 601, which includes
835 instructions that are holdovers from the Power. */
836 else if (strcmp (arg, "601") == 0)
837 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
838 | PPC_OPCODE_601 | PPC_OPCODE_32);
839 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
840 PowerPC 603/604. */
841 else if (strcmp (arg, "ppc") == 0
842 || strcmp (arg, "ppc32") == 0
843 || strcmp (arg, "603") == 0
844 || strcmp (arg, "604") == 0)
845 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
846 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
847 else if (strcmp (arg, "403") == 0
848 || strcmp (arg, "405") == 0)
849 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
850 | PPC_OPCODE_403 | PPC_OPCODE_32);
851 else if (strcmp (arg, "440") == 0)
852 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
853 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
854 else if (strcmp (arg, "7400") == 0
855 || strcmp (arg, "7410") == 0
856 || strcmp (arg, "7450") == 0
857 || strcmp (arg, "7455") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
859 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 860 else if (strcmp (arg, "e300") == 0)
861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
862 | PPC_OPCODE_E300);
69c040df
AM		 863 else if (strcmp (arg, "altivec") == 0)
864 {
865 if (ppc_cpu == 0)
866 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
867 else
868 ppc_cpu |= PPC_OPCODE_ALTIVEC;
869 }
870 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
871 {
872 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
873 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
874 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
875 | PPC_OPCODE_RFMCI);
876 }
877 else if (strcmp (arg, "spe") == 0)
878 {
879 if (ppc_cpu == 0)
880 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
881 else
882 ppc_cpu |= PPC_OPCODE_SPE;
883 }
884 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
885 620. */
886 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
887 {
888 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
889 }
890 else if (strcmp (arg, "ppc64bridge") == 0)
891 {
892 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
893 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
894 }
895 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
896 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
897 {
898 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
899 }
900 /* -mbooke64 means enable 64-bit BookE support. */
901 else if (strcmp (arg, "booke64") == 0)
902 {
903 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
904 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
905 }
906 else if (strcmp (arg, "power4") == 0)
907 {
908 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
909 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
910 }
b0648eec
AM		 911 else if (strcmp (arg, "power5") == 0)
912 {
913 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
914 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
915 | PPC_OPCODE_POWER5);
916 }
9622b051
AM		 917 else if (strcmp (arg, "power6") == 0)
918 {
919 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
920 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
921 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
922 }
ede602d7
AM		 923 else if (strcmp (arg, "cell") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
926 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
927 | PPC_OPCODE_CELL);
928 }
69c040df
AM		 929 /* -mcom means assemble for the common intersection between Power
930 and PowerPC. At present, we just allow the union, rather
931 than the intersection. */
932 else if (strcmp (arg, "com") == 0)
933 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
934 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
935 else if (strcmp (arg, "any") == 0)
936 ppc_cpu |= PPC_OPCODE_ANY;
937 else
938 return 0;
939
940 return 1;
941}
942
252b5132
RH		 943int
944md_parse_option (c, arg)
945 int c;
946 char *arg;
947{
948 switch (c)
949 {
950 case 'u':
951 /* -u means that any undefined symbols should be treated as
952 external, which is the default for gas anyhow. */
953 break;
954
955#ifdef OBJ_ELF
956 case 'l':
957 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 958 sake, recognize -be also. */
252b5132
RH		 959 if (strcmp (arg, "e") == 0)
960 {
961 target_big_endian = 0;
962 set_target_endian = 1;
963 }
964 else
965 return 0;
966
967 break;
968
969 case 'b':
970 if (strcmp (arg, "e") == 0)
971 {
972 target_big_endian = 1;
973 set_target_endian = 1;
974 }
975 else
976 return 0;
977
978 break;
979
980 case 'K':
99a814a1 981 /* Recognize -K PIC. */
252b5132
RH		 982 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
983 {
984 shlib = SHLIB_PIC;
985 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
986 }
987 else
988 return 0;
989
990 break;
991#endif
992
7f6d05e8
CP		 993 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
994 case 'a':
995 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 996 {
997#ifdef BFD64
998 ppc_obj64 = 1;
999#else
1000 as_fatal (_("%s unsupported"), "-a64");
1001#endif
1002 }
7f6d05e8 1003 else if (strcmp (arg, "32") == 0)
2b3c4602 1004 ppc_obj64 = 0;
7f6d05e8
CP		 1005 else
1006 return 0;
1007 break;
81d4177b 1008
252b5132 1009 case 'm':
69c040df
AM		 1010 if (parse_cpu (arg))
1011 ;
252b5132
RH		 1012
1013 else if (strcmp (arg, "regnames") == 0)
b34976b6 1014 reg_names_p = TRUE;
252b5132
RH		 1015
1016 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1017 reg_names_p = FALSE;
252b5132
RH		 1018
1019#ifdef OBJ_ELF
99a814a1
AM		 1020 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1021 that require relocation. */
252b5132
RH		 1022 else if (strcmp (arg, "relocatable") == 0)
1023 {
5d6f4f16 1024 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1025 ppc_flags |= EF_PPC_RELOCATABLE;
1026 }
1027
1028 else if (strcmp (arg, "relocatable-lib") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1032 }
1033
99a814a1 1034 /* -memb, set embedded bit. */
252b5132
RH		 1035 else if (strcmp (arg, "emb") == 0)
1036 ppc_flags |= EF_PPC_EMB;
1037
99a814a1
AM		 1038 /* -mlittle/-mbig set the endianess. */
1039 else if (strcmp (arg, "little") == 0
1040 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1041 {
1042 target_big_endian = 0;
1043 set_target_endian = 1;
1044 }
1045
1046 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1047 {
1048 target_big_endian = 1;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "solaris") == 0)
1053 {
b34976b6 1054 msolaris = TRUE;
252b5132
RH		 1055 ppc_comment_chars = ppc_solaris_comment_chars;
1056 }
1057
1058 else if (strcmp (arg, "no-solaris") == 0)
1059 {
b34976b6 1060 msolaris = FALSE;
252b5132
RH		 1061 ppc_comment_chars = ppc_eabi_comment_chars;
1062 }
1063#endif
1064 else
1065 {
1066 as_bad (_("invalid switch -m%s"), arg);
1067 return 0;
1068 }
1069 break;
1070
1071#ifdef OBJ_ELF
1072 /* -V: SVR4 argument to print version ID. */
1073 case 'V':
1074 print_version_id ();
1075 break;
1076
1077 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1078 should be emitted or not. FIXME: Not implemented. */
1079 case 'Q':
1080 break;
1081
1082 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1083 rather than .stabs.excl, which is ignored by the linker.
1084 FIXME: Not implemented. */
1085 case 's':
1086 if (arg)
1087 return 0;
1088
1089 break;
1090#endif
1091
1092 default:
1093 return 0;
1094 }
1095
1096 return 1;
1097}
1098
1099void
1100md_show_usage (stream)
1101 FILE *stream;
1102{
bc805888 1103 fprintf (stream, _("\
252b5132 1104PowerPC options:\n\
df12615d
AM		 1105-a32 generate ELF32/XCOFF32\n\
1106-a64 generate ELF64/XCOFF64\n\
252b5132 1107-u ignored\n\
23e1d84c
AM		 1108-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1109-mpwr generate code for POWER (RIOS1)\n\
1110-m601 generate code for PowerPC 601\n\
418c1742 1111-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1112 generate code for PowerPC 603/604\n\
df12615d 1113-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1114-m440 generate code for PowerPC 440\n\
f5c120c5 1115-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1116 generate code For PowerPC 7400/7410/7450/7455\n"));
1117 fprintf (stream, _("\
23e1d84c 1118-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1119-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1120-mbooke64 generate code for 64-bit PowerPC BookE\n\
1121-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1122-mpower4 generate code for Power4 architecture\n\
b0648eec 1123-mpower5 generate code for Power5 architecture\n\
9622b051 1124-mpower6 generate code for Power6 architecture\n\
ede602d7 1125-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1126-mcom generate code Power/PowerPC common instructions\n\
df12615d 1127-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1128 fprintf (stream, _("\
df12615d 1129-maltivec generate code for AltiVec\n\
36ae0db3 1130-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1131-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1132-mspe generate code for Motorola SPE instructions\n\
1133-mregnames Allow symbolic names for registers\n\
1134-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1135#ifdef OBJ_ELF
bc805888 1136 fprintf (stream, _("\
252b5132
RH		 1137-mrelocatable support for GCC's -mrelocatble option\n\
1138-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1139-memb set PPC_EMB bit in ELF flags\n\
df12615d 1140-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1141 generate code for a little endian machine\n\
df12615d
AM		 1142-mbig, -mbig-endian, -b, -be\n\
1143 generate code for a big endian machine\n\
252b5132
RH		 1144-msolaris generate code for Solaris\n\
1145-mno-solaris do not generate code for Solaris\n\
1146-V print assembler version number\n\
1147-Qy, -Qn ignored\n"));
1148#endif
1149}
1150\f
1151/* Set ppc_cpu if it is not already set. */
1152
1153static void
1154ppc_set_cpu ()
1155{
1156 const char *default_os = TARGET_OS;
1157 const char *default_cpu = TARGET_CPU;
1158
3c9030c1 1159 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1160 {
2a98c3a6 1161 if (ppc_obj64)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1163 else if (strncmp (default_os, "aix", 3) == 0
1164 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1165 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1166 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1168 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1170 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1171 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1172 else
99a814a1
AM		 1173 as_fatal (_("Unknown default cpu = %s, os = %s"),
1174 default_cpu, default_os);
252b5132
RH		 1175 }
1176}
1177
9232bbb0
AM		 1178/* Figure out the BFD architecture to use. This function and ppc_mach
1179 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1180
1181enum bfd_architecture
1182ppc_arch ()
1183{
1184 const char *default_cpu = TARGET_CPU;
1185 ppc_set_cpu ();
1186
1187 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1188 return bfd_arch_powerpc;
1189 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1190 return bfd_arch_rs6000;
1191 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1192 {
1193 if (strcmp (default_cpu, "rs6000") == 0)
1194 return bfd_arch_rs6000;
0baf16f2 1195 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1196 return bfd_arch_powerpc;
1197 }
1198
1199 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1200 return bfd_arch_unknown;
1201}
1202
7f6d05e8
CP		 1203unsigned long
1204ppc_mach ()
1205{
2a98c3a6
AM		 1206 if (ppc_obj64)
1207 return bfd_mach_ppc64;
1208 else if (ppc_arch () == bfd_arch_rs6000)
1209 return bfd_mach_rs6k;
1210 else
1211 return bfd_mach_ppc;
7f6d05e8
CP		 1212}
1213
81d4177b 1214extern char*
99a814a1 1215ppc_target_format ()
7f6d05e8
CP		 1216{
1217#ifdef OBJ_COFF
1218#ifdef TE_PE
99a814a1 1219 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1220#elif TE_POWERMAC
0baf16f2 1221 return "xcoff-powermac";
7f6d05e8 1222#else
eb1e0e80 1223# ifdef TE_AIX5
2b3c4602 1224 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1225# else
2b3c4602 1226 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# endif
7f6d05e8 1228#endif
7f6d05e8
CP		 1229#endif
1230#ifdef OBJ_ELF
9d8504b1
PB		 1231# ifdef TE_VXWORKS
1232 return "elf32-powerpc-vxworks";
1233# else
0baf16f2 1234 return (target_big_endian
2b3c4602
AM		 1235 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1236 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1237# endif
7f6d05e8
CP		 1238#endif
1239}
1240
69c040df
AM		 1241/* Insert opcodes and macros into hash tables. Called at startup and
1242 for .cpu pseudo. */
252b5132 1243
69c040df
AM		 1244static void
1245ppc_setup_opcodes (void)
252b5132
RH		 1246{
1247 register const struct powerpc_opcode *op;
1248 const struct powerpc_opcode *op_end;
1249 const struct powerpc_macro *macro;
1250 const struct powerpc_macro *macro_end;
b34976b6 1251 bfd_boolean dup_insn = FALSE;
252b5132 1252
69c040df
AM		 1253 if (ppc_hash != NULL)
1254 hash_die (ppc_hash);
1255 if (ppc_macro_hash != NULL)
1256 hash_die (ppc_macro_hash);
252b5132
RH		 1257
1258 /* Insert the opcodes into a hash table. */
1259 ppc_hash = hash_new ();
1260
1261 op_end = powerpc_opcodes + powerpc_num_opcodes;
1262 for (op = powerpc_opcodes; op < op_end; op++)
1263 {
1264 know ((op->opcode & op->mask) == op->opcode);
1265
2b3c4602 1266 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1267 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1268 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1269 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1270 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1271 /* Certain instructions (eg: extsw) do not exist in the
1272 32-bit BookE instruction set, but they do exist in the
1273 64-bit BookE instruction set, and other PPC instruction
1274 sets. Check to see if the opcode has the BOOKE64 flag set.
1275 If it does make sure that the target CPU is not the BookE32. */
1276 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1277 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1278 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1279 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1280 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1281 == (ppc_cpu & PPC_OPCODE_POWER4)))
1282 && ((op->flags & PPC_OPCODE_POWER5) == 0
1283 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1284 == (ppc_cpu & PPC_OPCODE_POWER5)))
1285 && ((op->flags & PPC_OPCODE_POWER6) == 0
1286 || ((op->flags & PPC_OPCODE_POWER6)
1287 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1288 {
1289 const char *retval;
1290
1291 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1292 if (retval != NULL)
252b5132 1293 {
99a814a1 1294 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1295 if ((ppc_cpu & PPC_OPCODE_601) != 0
1296 && (op->flags & PPC_OPCODE_POWER) != 0)
1297 continue;
1298
99a814a1
AM		 1299 as_bad (_("Internal assembler error for instruction %s"),
1300 op->name);
b34976b6 1301 dup_insn = TRUE;
252b5132
RH		 1302 }
1303 }
1304 }
1305
3c9030c1
AM		 1306 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1307 for (op = powerpc_opcodes; op < op_end; op++)
1308 hash_insert (ppc_hash, op->name, (PTR) op);
1309
252b5132
RH		 1310 /* Insert the macros into a hash table. */
1311 ppc_macro_hash = hash_new ();
1312
1313 macro_end = powerpc_macros + powerpc_num_macros;
1314 for (macro = powerpc_macros; macro < macro_end; macro++)
1315 {
1316 if ((macro->flags & ppc_cpu) != 0)
1317 {
1318 const char *retval;
1319
1320 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1321 if (retval != (const char *) NULL)
1322 {
1323 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1324 dup_insn = TRUE;
252b5132
RH		 1325 }
1326 }
1327 }
1328
1329 if (dup_insn)
1330 abort ();
69c040df
AM		 1331}
1332
1333/* This function is called when the assembler starts up. It is called
1334 after the options have been parsed and the output file has been
1335 opened. */
1336
1337void
1338md_begin ()
1339{
1340 ppc_set_cpu ();
1341
1342 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1343
1344#ifdef OBJ_ELF
1345 /* Set the ELF flags if desired. */
1346 if (ppc_flags && !msolaris)
1347 bfd_set_private_flags (stdoutput, ppc_flags);
1348#endif
1349
1350 ppc_setup_opcodes ();
252b5132 1351
67c1ffbe 1352 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1353 by the user. */
252b5132
RH		 1354 if (!set_target_endian)
1355 {
1356 set_target_endian = 1;
1357 target_big_endian = PPC_BIG_ENDIAN;
1358 }
1359
1360#ifdef OBJ_XCOFF
1361 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1362
1363 /* Create dummy symbols to serve as initial csects. This forces the
1364 text csects to precede the data csects. These symbols will not
1365 be output. */
1366 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1367 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1368 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1369 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1370#endif
1371
1372#ifdef TE_PE
1373
1374 ppc_current_section = text_section;
81d4177b 1375 ppc_previous_section = 0;
252b5132
RH		 1376
1377#endif
1378}
1379
6a0c61b7
EZ		 1380void
1381ppc_cleanup ()
1382{
dc1d03fc 1383#ifdef OBJ_ELF
6a0c61b7
EZ		 1384 if (ppc_apuinfo_list == NULL)
1385 return;
1386
1387 /* Ok, so write the section info out. We have this layout:
1388
1389 byte data what
1390 ---- ---- ----
1391 0 8 length of "APUinfo\0"
1392 4 (n*4) number of APU's (4 bytes each)
1393 8 2 note type 2
1394 12 "APUinfo\0" name
1395 20 APU#1 first APU's info
1396 24 APU#2 second APU's info
1397 ... ...
1398 */
1399 {
1400 char *p;
1401 asection *seg = now_seg;
1402 subsegT subseg = now_subseg;
1403 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1404 unsigned int i;
6a0c61b7
EZ		 1405
1406 /* Create the .PPC.EMB.apuinfo section. */
1407 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1408 bfd_set_section_flags (stdoutput,
1409 apuinfo_secp,
e1a9cb8e 1410 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1411
1412 p = frag_more (4);
1413 md_number_to_chars (p, (valueT) 8, 4);
1414
1415 p = frag_more (4);
e98d298c 1416 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1417
1418 p = frag_more (4);
1419 md_number_to_chars (p, (valueT) 2, 4);
1420
1421 p = frag_more (8);
1422 strcpy (p, "APUinfo");
1423
1424 for (i = 0; i < ppc_apuinfo_num; i++)
1425 {
b34976b6
AM		 1426 p = frag_more (4);
1427 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1428 }
1429
1430 frag_align (2, 0, 0);
1431
1432 /* We probably can't restore the current segment, for there likely
1433 isn't one yet... */
1434 if (seg && subseg)
1435 subseg_set (seg, subseg);
1436 }
dc1d03fc 1437#endif
6a0c61b7
EZ		 1438}
1439
252b5132
RH		 1440/* Insert an operand value into an instruction. */
1441
1442static unsigned long
1443ppc_insert_operand (insn, operand, val, file, line)
1444 unsigned long insn;
1445 const struct powerpc_operand *operand;
1446 offsetT val;
1447 char *file;
1448 unsigned int line;
1449{
1450 if (operand->bits != 32)
1451 {
1452 long min, max;
1453 offsetT test;
1454
1455 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1456 {
d0e9a01c 1457 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1458 max = (1 << operand->bits) - 1;
1459 else
1460 max = (1 << (operand->bits - 1)) - 1;
1461 min = - (1 << (operand->bits - 1));
1462
2b3c4602 1463 if (!ppc_obj64)
252b5132
RH		 1464 {
1465 /* Some people write 32 bit hex constants with the sign
1466 extension done by hand. This shouldn't really be
1467 valid, but, to permit this code to assemble on a 64
1468 bit host, we sign extend the 32 bit value. */
1469 if (val > 0
92161534
ILT		 1470 && (val & (offsetT) 0x80000000) != 0
1471 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1472 {
1473 val -= 0x80000000;
1474 val -= 0x80000000;
1475 }
1476 }
1477 }
1478 else
1479 {
1480 max = (1 << operand->bits) - 1;
1481 min = 0;
1482 }
1483
1484 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1485 test = - val;
1486 else
1487 test = val;
1488
1489 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1490 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1491 }
1492
1493 if (operand->insert)
1494 {
1495 const char *errmsg;
1496
1497 errmsg = NULL;
2b3c4602 1498 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1499 if (errmsg != (const char *) NULL)
0baf16f2 1500 as_bad_where (file, line, errmsg);
252b5132
RH		 1501 }
1502 else
1503 insn |= (((long) val & ((1 << operand->bits) - 1))
1504 << operand->shift);
1505
1506 return insn;
1507}
1508
1509\f
1510#ifdef OBJ_ELF
1511/* Parse @got, etc. and return the desired relocation. */
1512static bfd_reloc_code_real_type
1513ppc_elf_suffix (str_p, exp_p)
1514 char **str_p;
1515 expressionS *exp_p;
1516{
1517 struct map_bfd {
1518 char *string;
b7d7dc63
AM		 1519 unsigned int length : 8;
1520 unsigned int valid32 : 1;
1521 unsigned int valid64 : 1;
1522 unsigned int reloc;
252b5132
RH		 1523 };
1524
1525 char ident[20];
1526 char *str = *str_p;
1527 char *str2;
1528 int ch;
1529 int len;
15c1449b 1530 const struct map_bfd *ptr;
252b5132 1531
b7d7dc63
AM		 1532#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1533#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1534#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1535
15c1449b 1536 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1537 MAP ("l", BFD_RELOC_LO16),
1538 MAP ("h", BFD_RELOC_HI16),
1539 MAP ("ha", BFD_RELOC_HI16_S),
1540 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1541 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1542 MAP ("got", BFD_RELOC_16_GOTOFF),
1543 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1544 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1545 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1546 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1547 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1548 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1549 MAP ("copy", BFD_RELOC_PPC_COPY),
1550 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1551 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1552 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1553 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1554 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1555 MAP ("tls", BFD_RELOC_PPC_TLS),
1556 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1557 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1558 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1559 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1560 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1561 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1562 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1563 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1564 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1565 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1566 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1567 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1568 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1569 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1570 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1571 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1572 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1573 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1574 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1575 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1576 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1577 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1578 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1579 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1580 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1581 MAP32 ("fixup", BFD_RELOC_CTOR),
1582 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1583 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1584 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1585 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1586 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1587 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1588 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1589 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1590 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1591 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1592 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1593 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1594 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1595 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1596 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1597 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1598 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1599 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1600 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1601 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1602 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1603 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1604 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1605 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1606 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1607 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1608 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1609 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1610 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1611 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1612 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1613 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1614 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1615 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1616 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1617 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1618 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1619 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1620 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1621 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1622 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1623 };
1624
1625 if (*str++ != '@')
1626 return BFD_RELOC_UNUSED;
1627
1628 for (ch = *str, str2 = ident;
1629 (str2 < ident + sizeof (ident) - 1
3882b010 1630 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1631 ch = *++str)
1632 {
3882b010 1633 *str2++ = TOLOWER (ch);
252b5132
RH		 1634 }
1635
1636 *str2 = '\0';
1637 len = str2 - ident;
1638
1639 ch = ident[0];
1640 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1641 if (ch == ptr->string[0]
1642 && len == ptr->length
b7d7dc63
AM		 1643 && memcmp (ident, ptr->string, ptr->length) == 0
1644 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1645 {
15c1449b
AM		 1646 int reloc = ptr->reloc;
1647
cdba85ec 1648 if (!ppc_obj64)
5f6db75a
AM		 1649 if (exp_p->X_add_number != 0
1650 && (reloc == (int) BFD_RELOC_16_GOTOFF
1651 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1652 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1653 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1654 as_warn (_("identifier+constant@got means identifier@got+constant"));
1655
1656 /* Now check for identifier@suffix+constant. */
1657 if (*str == '-' || *str == '+')
252b5132 1658 {
5f6db75a
AM		 1659 char *orig_line = input_line_pointer;
1660 expressionS new_exp;
1661
1662 input_line_pointer = str;
1663 expression (&new_exp);
1664 if (new_exp.X_op == O_constant)
252b5132 1665 {
5f6db75a
AM		 1666 exp_p->X_add_number += new_exp.X_add_number;
1667 str = input_line_pointer;
252b5132 1668 }
5f6db75a
AM		 1669
1670 if (&input_line_pointer != str_p)
1671 input_line_pointer = orig_line;
252b5132 1672 }
252b5132 1673 *str_p = str;
0baf16f2 1674
2b3c4602 1675 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1676 && exp_p->X_op == O_symbol
1677 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1678 {
9f2b53d7
AM		 1679 /* Change the symbol so that the dummy .TOC. symbol can be
1680 omitted from the object file. */
0baf16f2
AM		 1681 exp_p->X_add_symbol = &abs_symbol;
1682 }
1683
15c1449b 1684 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1685 }
1686
1687 return BFD_RELOC_UNUSED;
1688}
1689
99a814a1
AM		 1690/* Like normal .long/.short/.word, except support @got, etc.
1691 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1692static void
1693ppc_elf_cons (nbytes)
0baf16f2 1694 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1695{
1696 expressionS exp;
1697 bfd_reloc_code_real_type reloc;
1698
1699 if (is_it_end_of_statement ())
1700 {
1701 demand_empty_rest_of_line ();
1702 return;
1703 }
1704
1705 do
1706 {
1707 expression (&exp);
1708 if (exp.X_op == O_symbol
1709 && *input_line_pointer == '@'
99a814a1
AM		 1710 && (reloc = ppc_elf_suffix (&input_line_pointer,
1711 &exp)) != BFD_RELOC_UNUSED)
252b5132 1712 {
99a814a1
AM		 1713 reloc_howto_type *reloc_howto;
1714 int size;
1715
1716 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1717 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1718
1719 if (size > nbytes)
0baf16f2
AM		 1720 {
1721 as_bad (_("%s relocations do not fit in %d bytes\n"),
1722 reloc_howto->name, nbytes);
1723 }
252b5132
RH		 1724 else
1725 {
0baf16f2
AM		 1726 char *p;
1727 int offset;
252b5132 1728
0baf16f2
AM		 1729 p = frag_more (nbytes);
1730 offset = 0;
1731 if (target_big_endian)
1732 offset = nbytes - size;
99a814a1
AM		 1733 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1734 &exp, 0, reloc);
252b5132
RH		 1735 }
1736 }
1737 else
1738 emit_expr (&exp, (unsigned int) nbytes);
1739 }
1740 while (*input_line_pointer++ == ',');
1741
99a814a1
AM		 1742 /* Put terminator back into stream. */
1743 input_line_pointer--;
252b5132
RH		 1744 demand_empty_rest_of_line ();
1745}
1746
1747/* Solaris pseduo op to change to the .rodata section. */
1748static void
1749ppc_elf_rdata (xxx)
1750 int xxx;
1751{
1752 char *save_line = input_line_pointer;
1753 static char section[] = ".rodata\n";
1754
99a814a1 1755 /* Just pretend this is .section .rodata */
252b5132
RH		 1756 input_line_pointer = section;
1757 obj_elf_section (xxx);
1758
1759 input_line_pointer = save_line;
1760}
1761
99a814a1 1762/* Pseudo op to make file scope bss items. */
252b5132 1763static void
99a814a1 1764ppc_elf_lcomm (xxx)
92161534 1765 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1766{
1767 register char *name;
1768 register char c;
1769 register char *p;
1770 offsetT size;
1771 register symbolS *symbolP;
1772 offsetT align;
1773 segT old_sec;
1774 int old_subsec;
1775 char *pfrag;
1776 int align2;
1777
1778 name = input_line_pointer;
1779 c = get_symbol_end ();
1780
99a814a1 1781 /* just after name is now '\0'. */
252b5132
RH		 1782 p = input_line_pointer;
1783 *p = c;
1784 SKIP_WHITESPACE ();
1785 if (*input_line_pointer != ',')
1786 {
1787 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1788 ignore_rest_of_line ();
1789 return;
1790 }
1791
1792 input_line_pointer++; /* skip ',' */
1793 if ((size = get_absolute_expression ()) < 0)
1794 {
1795 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1796 ignore_rest_of_line ();
1797 return;
1798 }
1799
1800 /* The third argument to .lcomm is the alignment. */
1801 if (*input_line_pointer != ',')
1802 align = 8;
1803 else
1804 {
1805 ++input_line_pointer;
1806 align = get_absolute_expression ();
1807 if (align <= 0)
1808 {
1809 as_warn (_("ignoring bad alignment"));
1810 align = 8;
1811 }
1812 }
1813
1814 *p = 0;
1815 symbolP = symbol_find_or_make (name);
1816 *p = c;
1817
1818 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1819 {
1820 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1821 S_GET_NAME (symbolP));
1822 ignore_rest_of_line ();
1823 return;
1824 }
1825
1826 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1827 {
1828 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1829 S_GET_NAME (symbolP),
1830 (long) S_GET_VALUE (symbolP),
1831 (long) size);
1832
1833 ignore_rest_of_line ();
1834 return;
1835 }
1836
99a814a1 1837 /* Allocate_bss. */
252b5132
RH		 1838 old_sec = now_seg;
1839 old_subsec = now_subseg;
1840 if (align)
1841 {
99a814a1 1842 /* Convert to a power of 2 alignment. */
252b5132
RH		 1843 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1844 if (align != 1)
1845 {
1846 as_bad (_("Common alignment not a power of 2"));
1847 ignore_rest_of_line ();
1848 return;
1849 }
1850 }
1851 else
1852 align2 = 0;
1853
1854 record_alignment (bss_section, align2);
1855 subseg_set (bss_section, 0);
1856 if (align2)
1857 frag_align (align2, 0, 0);
1858 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1859 symbol_get_frag (symbolP)->fr_symbol = 0;
1860 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1861 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1862 (char *) 0);
1863 *pfrag = 0;
1864 S_SET_SIZE (symbolP, size);
1865 S_SET_SEGMENT (symbolP, bss_section);
1866 subseg_set (old_sec, old_subsec);
1867 demand_empty_rest_of_line ();
1868}
1869
1870/* Validate any relocations emitted for -mrelocatable, possibly adding
1871 fixups for word relocations in writable segments, so we can adjust
1872 them at runtime. */
1873static void
1874ppc_elf_validate_fix (fixp, seg)
1875 fixS *fixp;
1876 segT seg;
1877{
1878 if (fixp->fx_done || fixp->fx_pcrel)
1879 return;
1880
1881 switch (shlib)
1882 {
1883 case SHLIB_NONE:
1884 case SHLIB_PIC:
1885 return;
1886
5d6f4f16 1887 case SHLIB_MRELOCATABLE:
252b5132
RH		 1888 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1889 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1890 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1891 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1892 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1893 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1894 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1895 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1896 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1897 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1898 && strcmp (segment_name (seg), ".got2") != 0
1899 && strcmp (segment_name (seg), ".dtors") != 0
1900 && strcmp (segment_name (seg), ".ctors") != 0
1901 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1902 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1903 && strcmp (segment_name (seg), ".eh_frame") != 0
1904 && strcmp (segment_name (seg), ".ex_shared") != 0)
1905 {
1906 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1907 || fixp->fx_r_type != BFD_RELOC_CTOR)
1908 {
1909 as_bad_where (fixp->fx_file, fixp->fx_line,
1910 _("Relocation cannot be done when using -mrelocatable"));
1911 }
1912 }
1913 return;
1914 }
1915}
0baf16f2 1916
7e8d4ab4
AM		 1917/* Prevent elf_frob_file_before_adjust removing a weak undefined
1918 function descriptor sym if the corresponding code sym is used. */
1919
1920void
1921ppc_frob_file_before_adjust ()
0baf16f2 1922{
7e8d4ab4 1923 symbolS *symp;
9232bbb0 1924 asection *toc;
0baf16f2 1925
7e8d4ab4
AM		 1926 if (!ppc_obj64)
1927 return;
1928
1929 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1930 {
7e8d4ab4
AM		 1931 const char *name;
1932 char *dotname;
1933 symbolS *dotsym;
1934 size_t len;
1935
1936 name = S_GET_NAME (symp);
1937 if (name[0] == '.')
1938 continue;
1939
1940 if (! S_IS_WEAK (symp)
1941 || S_IS_DEFINED (symp))
1942 continue;
1943
1944 len = strlen (name) + 1;
1945 dotname = xmalloc (len + 1);
1946 dotname[0] = '.';
1947 memcpy (dotname + 1, name, len);
461b725f 1948 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 1949 free (dotname);
1950 if (dotsym != NULL && (symbol_used_p (dotsym)
1951 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1952 symbol_mark_used (symp);
1953
0baf16f2
AM		 1954 }
1955
9232bbb0
AM		 1956 toc = bfd_get_section_by_name (stdoutput, ".toc");
1957 if (toc != NULL
1958 && bfd_section_size (stdoutput, toc) > 0x10000)
1959 as_warn (_("TOC section size exceeds 64k"));
1960
7e8d4ab4
AM		 1961 /* Don't emit .TOC. symbol. */
1962 symp = symbol_find (".TOC.");
1963 if (symp != NULL)
1964 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1965}
252b5132
RH		 1966#endif /* OBJ_ELF */
1967\f
1968#ifdef TE_PE
1969
1970/*
99a814a1 1971 * Summary of parse_toc_entry.
252b5132
RH		 1972 *
1973 * in: Input_line_pointer points to the '[' in one of:
1974 *
1975 * [toc] [tocv] [toc32] [toc64]
1976 *
1977 * Anything else is an error of one kind or another.
1978 *
81d4177b 1979 * out:
252b5132
RH		 1980 * return value: success or failure
1981 * toc_kind: kind of toc reference
1982 * input_line_pointer:
1983 * success: first char after the ']'
1984 * failure: unchanged
1985 *
1986 * settings:
1987 *
1988 * [toc] - rv == success, toc_kind = default_toc
1989 * [tocv] - rv == success, toc_kind = data_in_toc
1990 * [toc32] - rv == success, toc_kind = must_be_32
1991 * [toc64] - rv == success, toc_kind = must_be_64
1992 *
1993 */
1994
81d4177b
KH		 1995enum toc_size_qualifier
1996{
252b5132
RH		 1997 default_toc, /* The toc cell constructed should be the system default size */
1998 data_in_toc, /* This is a direct reference to a toc cell */
1999 must_be_32, /* The toc cell constructed must be 32 bits wide */
2000 must_be_64 /* The toc cell constructed must be 64 bits wide */
2001};
2002
2003static int
99a814a1 2004parse_toc_entry (toc_kind)
252b5132
RH		 2005 enum toc_size_qualifier *toc_kind;
2006{
2007 char *start;
2008 char *toc_spec;
2009 char c;
2010 enum toc_size_qualifier t;
2011
99a814a1 2012 /* Save the input_line_pointer. */
252b5132
RH		 2013 start = input_line_pointer;
2014
99a814a1 2015 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2016 ++input_line_pointer;
2017 SKIP_WHITESPACE ();
81d4177b 2018
99a814a1 2019 /* Find the spelling of the operand. */
252b5132
RH		 2020 toc_spec = input_line_pointer;
2021 c = get_symbol_end ();
2022
99a814a1 2023 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2024 {
2025 t = default_toc;
2026 }
99a814a1 2027 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2028 {
2029 t = data_in_toc;
2030 }
99a814a1 2031 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2032 {
2033 t = must_be_32;
2034 }
99a814a1 2035 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2036 {
2037 t = must_be_64;
2038 }
2039 else
2040 {
2041 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2042 *input_line_pointer = c;
2043 input_line_pointer = start;
252b5132
RH		 2044 return 0;
2045 }
2046
99a814a1
AM		 2047 /* Now find the ']'. */
2048 *input_line_pointer = c;
252b5132 2049
81d4177b
KH		 2050 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2051 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2052
2053 if (c != ']')
2054 {
2055 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2056 input_line_pointer = start;
252b5132
RH		 2057 return 0;
2058 }
2059
99a814a1 2060 *toc_kind = t;
252b5132
RH		 2061 return 1;
2062}
2063#endif
2064\f
2065
dc1d03fc 2066#ifdef OBJ_ELF
6a0c61b7
EZ		 2067#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2068static void
dc1d03fc 2069ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2070 unsigned int apu, version;
2071{
2072 unsigned int i;
2073
2074 /* Check we don't already exist. */
2075 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2076 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2077 return;
b34976b6 2078
6a0c61b7
EZ		 2079 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2080 {
2081 if (ppc_apuinfo_num_alloc == 0)
2082 {
2083 ppc_apuinfo_num_alloc = 4;
2084 ppc_apuinfo_list = (unsigned long *)
2085 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2086 }
2087 else
2088 {
2089 ppc_apuinfo_num_alloc += 4;
2090 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2091 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2092 }
2093 }
dc1d03fc 2094 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2095}
2096#undef APUID
dc1d03fc 2097#endif
6a0c61b7
EZ		 2098\f
2099
252b5132
RH		 2100/* We need to keep a list of fixups. We can't simply generate them as
2101 we go, because that would require us to first create the frag, and
2102 that would screw up references to ``.''. */
2103
2104struct ppc_fixup
2105{
2106 expressionS exp;
2107 int opindex;
2108 bfd_reloc_code_real_type reloc;
2109};
2110
2111#define MAX_INSN_FIXUPS (5)
2112
2113/* This routine is called for each instruction to be assembled. */
2114
2115void
2116md_assemble (str)
2117 char *str;
2118{
2119 char *s;
2120 const struct powerpc_opcode *opcode;
2121 unsigned long insn;
2122 const unsigned char *opindex_ptr;
2123 int skip_optional;
2124 int need_paren;
2125 int next_opindex;
2126 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2127 int fc;
2128 char *f;
09b935ac 2129 int addr_mod;
252b5132
RH		 2130 int i;
2131#ifdef OBJ_ELF
2132 bfd_reloc_code_real_type reloc;
2133#endif
2134
2135 /* Get the opcode. */
3882b010 2136 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2137 ;
2138 if (*s != '\0')
2139 *s++ = '\0';
2140
2141 /* Look up the opcode in the hash table. */
2142 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2143 if (opcode == (const struct powerpc_opcode *) NULL)
2144 {
2145 const struct powerpc_macro *macro;
2146
2147 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2148 if (macro == (const struct powerpc_macro *) NULL)
2149 as_bad (_("Unrecognized opcode: `%s'"), str);
2150 else
2151 ppc_macro (s, macro);
2152
2153 return;
2154 }
2155
2156 insn = opcode->opcode;
2157
2158 str = s;
3882b010 2159 while (ISSPACE (*str))
252b5132
RH		 2160 ++str;
2161
2162 /* PowerPC operands are just expressions. The only real issue is
2163 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2164 an optional operand separate the operands only with commas (in some
2165 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2166 have optional operands). Most instructions with optional operands
2167 have only one. Those that have more than one optional operand can
2168 take either all their operands or none. So, before we start seriously
2169 parsing the operands, we check to see if we have optional operands,
2170 and if we do, we count the number of commas to see which operands
2171 have been omitted. */
252b5132
RH		 2172 skip_optional = 0;
2173 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2174 {
2175 const struct powerpc_operand *operand;
2176
2177 operand = &powerpc_operands[*opindex_ptr];
2178 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2179 {
2180 unsigned int opcount;
7fe9cf6b
NC		 2181 unsigned int num_operands_expected;
2182 unsigned int i;
252b5132
RH		 2183
2184 /* There is an optional operand. Count the number of
2185 commas in the input line. */
2186 if (*str == '\0')
2187 opcount = 0;
2188 else
2189 {
2190 opcount = 1;
2191 s = str;
2192 while ((s = strchr (s, ',')) != (char *) NULL)
2193 {
2194 ++opcount;
2195 ++s;
2196 }
2197 }
2198
7fe9cf6b
NC		 2199 /* Compute the number of expected operands.
2200 Do not count fake operands. */
2201 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2202 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2203 ++ num_operands_expected;
2204
252b5132
RH		 2205 /* If there are fewer operands in the line then are called
2206 for by the instruction, we want to skip the optional
1f6c9eb0 2207 operands. */
7fe9cf6b 2208 if (opcount < num_operands_expected)
252b5132
RH		 2209 skip_optional = 1;
2210
2211 break;
2212 }
2213 }
2214
2215 /* Gather the operands. */
2216 need_paren = 0;
2217 next_opindex = 0;
2218 fc = 0;
2219 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2220 {
2221 const struct powerpc_operand *operand;
2222 const char *errmsg;
2223 char *hold;
2224 expressionS ex;
2225 char endc;
2226
2227 if (next_opindex == 0)
2228 operand = &powerpc_operands[*opindex_ptr];
2229 else
2230 {
2231 operand = &powerpc_operands[next_opindex];
2232 next_opindex = 0;
2233 }
252b5132
RH		 2234 errmsg = NULL;
2235
2236 /* If this is a fake operand, then we do not expect anything
2237 from the input. */
2238 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2239 {
2b3c4602 2240 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2241 if (errmsg != (const char *) NULL)
2242 as_bad (errmsg);
2243 continue;
2244 }
2245
2246 /* If this is an optional operand, and we are skipping it, just
2247 insert a zero. */
2248 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2249 && skip_optional)
2250 {
2251 if (operand->insert)
2252 {
2b3c4602 2253 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2254 if (errmsg != (const char *) NULL)
2255 as_bad (errmsg);
2256 }
2257 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2258 next_opindex = *opindex_ptr + 1;
2259 continue;
2260 }
2261
2262 /* Gather the operand. */
2263 hold = input_line_pointer;
2264 input_line_pointer = str;
2265
2266#ifdef TE_PE
81d4177b 2267 if (*input_line_pointer == '[')
252b5132
RH		 2268 {
2269 /* We are expecting something like the second argument here:
99a814a1
AM		 2270 *
2271 * lwz r4,[toc].GS.0.static_int(rtoc)
2272 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2273 * The argument following the `]' must be a symbol name, and the
2274 * register must be the toc register: 'rtoc' or '2'
2275 *
2276 * The effect is to 0 as the displacement field
2277 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2278 * the appropriate variation) reloc against it based on the symbol.
2279 * The linker will build the toc, and insert the resolved toc offset.
2280 *
2281 * Note:
2282 * o The size of the toc entry is currently assumed to be
2283 * 32 bits. This should not be assumed to be a hard coded
2284 * number.
2285 * o In an effort to cope with a change from 32 to 64 bits,
2286 * there are also toc entries that are specified to be
2287 * either 32 or 64 bits:
2288 * lwz r4,[toc32].GS.0.static_int(rtoc)
2289 * lwz r4,[toc64].GS.0.static_int(rtoc)
2290 * These demand toc entries of the specified size, and the
2291 * instruction probably requires it.
2292 */
252b5132
RH		 2293
2294 int valid_toc;
2295 enum toc_size_qualifier toc_kind;
2296 bfd_reloc_code_real_type toc_reloc;
2297
99a814a1
AM		 2298 /* Go parse off the [tocXX] part. */
2299 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2300
81d4177b 2301 if (!valid_toc)
252b5132 2302 {
99a814a1
AM		 2303 /* Note: message has already been issued.
2304 FIXME: what sort of recovery should we do?
2305 demand_rest_of_line (); return; ? */
252b5132
RH		 2306 }
2307
99a814a1
AM		 2308 /* Now get the symbol following the ']'. */
2309 expression (&ex);
252b5132
RH		 2310
2311 switch (toc_kind)
2312 {
2313 case default_toc:
99a814a1
AM		 2314 /* In this case, we may not have seen the symbol yet,
2315 since it is allowed to appear on a .extern or .globl
2316 or just be a label in the .data section. */
252b5132
RH		 2317 toc_reloc = BFD_RELOC_PPC_TOC16;
2318 break;
2319 case data_in_toc:
99a814a1
AM		 2320 /* 1. The symbol must be defined and either in the toc
2321 section, or a global.
2322 2. The reloc generated must have the TOCDEFN flag set
2323 in upper bit mess of the reloc type.
2324 FIXME: It's a little confusing what the tocv
2325 qualifier can be used for. At the very least, I've
2326 seen three uses, only one of which I'm sure I can
2327 explain. */
81d4177b
KH		 2328 if (ex.X_op == O_symbol)
2329 {
252b5132 2330 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2331 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2332 != tocdata_section)
252b5132 2333 {
99a814a1 2334 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2335 }
2336 }
2337
2338 toc_reloc = BFD_RELOC_PPC_TOC16;
2339 break;
2340 case must_be_32:
99a814a1
AM		 2341 /* FIXME: these next two specifically specify 32/64 bit
2342 toc entries. We don't support them today. Is this
2343 the right way to say that? */
252b5132
RH		 2344 toc_reloc = BFD_RELOC_UNUSED;
2345 as_bad (_("Unimplemented toc32 expression modifier"));
2346 break;
2347 case must_be_64:
99a814a1 2348 /* FIXME: see above. */
252b5132
RH		 2349 toc_reloc = BFD_RELOC_UNUSED;
2350 as_bad (_("Unimplemented toc64 expression modifier"));
2351 break;
2352 default:
bc805888 2353 fprintf (stderr,
99a814a1
AM		 2354 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2355 toc_kind);
bc805888 2356 abort ();
252b5132
RH		 2357 break;
2358 }
2359
2360 /* We need to generate a fixup for this expression. */
2361 if (fc >= MAX_INSN_FIXUPS)
2362 as_fatal (_("too many fixups"));
2363
2364 fixups[fc].reloc = toc_reloc;
2365 fixups[fc].exp = ex;
2366 fixups[fc].opindex = *opindex_ptr;
2367 ++fc;
2368
99a814a1
AM		 2369 /* Ok. We've set up the fixup for the instruction. Now make it
2370 look like the constant 0 was found here. */
252b5132
RH		 2371 ex.X_unsigned = 1;
2372 ex.X_op = O_constant;
2373 ex.X_add_number = 0;
2374 ex.X_add_symbol = NULL;
2375 ex.X_op_symbol = NULL;
2376 }
2377
2378 else
2379#endif /* TE_PE */
2380 {
2381 if (! register_name (&ex))
2382 {
2383 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2384 cr_operand = TRUE;
252b5132 2385 expression (&ex);
b34976b6 2386 cr_operand = FALSE;
252b5132
RH		 2387 }
2388 }
2389
2390 str = input_line_pointer;
2391 input_line_pointer = hold;
2392
2393 if (ex.X_op == O_illegal)
2394 as_bad (_("illegal operand"));
2395 else if (ex.X_op == O_absent)
2396 as_bad (_("missing operand"));
2397 else if (ex.X_op == O_register)
2398 {
2399 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2400 (char *) NULL, 0);
2401 }
2402 else if (ex.X_op == O_constant)
2403 {
2404#ifdef OBJ_ELF
81d4177b 2405 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2406 char *orig_str = str;
2407
2408 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2409 switch (reloc)
2410 {
2411 default:
2412 str = orig_str;
2413 break;
2414
2415 case BFD_RELOC_LO16:
2416 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2417 something which cleared it, we always produce a
2418 signed value. */
2419 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2420 ex.X_add_number &= 0xffff;
2421 else
0baf16f2 2422 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2423 break;
2424
2425 case BFD_RELOC_HI16:
0baf16f2
AM		 2426 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2427 ex.X_add_number = PPC_HI (ex.X_add_number);
2428 else
2429 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2430 break;
2431
2432 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2433 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2434 ex.X_add_number = PPC_HA (ex.X_add_number);
2435 else
2436 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2437 break;
2438
0baf16f2
AM		 2439 case BFD_RELOC_PPC64_HIGHER:
2440 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2441 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2442 else
2443 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2444 break;
2445
2446 case BFD_RELOC_PPC64_HIGHER_S:
2447 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2448 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2449 else
2450 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2451 break;
0baf16f2
AM		 2452
2453 case BFD_RELOC_PPC64_HIGHEST:
2454 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2455 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2456 else
2457 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2458 break;
2459
2460 case BFD_RELOC_PPC64_HIGHEST_S:
2461 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2462 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2463 else
2464 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2465 break;
252b5132 2466 }
0baf16f2 2467#endif /* OBJ_ELF */
252b5132
RH		 2468 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2469 (char *) NULL, 0);
2470 }
2471#ifdef OBJ_ELF
2472 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2473 {
cdba85ec
AM		 2474 /* Some TLS tweaks. */
2475 switch (reloc)
2476 {
2477 default:
2478 break;
2479 case BFD_RELOC_PPC_TLS:
2480 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2481 (char *) NULL, 0);
2482 break;
2483 /* We'll only use the 32 (or 64) bit form of these relocations
2484 in constants. Instructions get the 16 bit form. */
2485 case BFD_RELOC_PPC_DTPREL:
2486 reloc = BFD_RELOC_PPC_DTPREL16;
2487 break;
2488 case BFD_RELOC_PPC_TPREL:
2489 reloc = BFD_RELOC_PPC_TPREL16;
2490 break;
2491 }
2492
99a814a1
AM		 2493 /* For the absolute forms of branches, convert the PC
2494 relative form back into the absolute. */
252b5132
RH		 2495 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2496 {
2497 switch (reloc)
2498 {
2499 case BFD_RELOC_PPC_B26:
2500 reloc = BFD_RELOC_PPC_BA26;
2501 break;
2502 case BFD_RELOC_PPC_B16:
2503 reloc = BFD_RELOC_PPC_BA16;
2504 break;
2505 case BFD_RELOC_PPC_B16_BRTAKEN:
2506 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2507 break;
2508 case BFD_RELOC_PPC_B16_BRNTAKEN:
2509 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2510 break;
2511 default:
2512 break;
2513 }
2514 }
2515
2b3c4602 2516 if (ppc_obj64
adadcc0c 2517 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2518 {
2519 switch (reloc)
2520 {
2521 case BFD_RELOC_16:
2522 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2523 break;
2524 case BFD_RELOC_LO16:
2525 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2526 break;
2527 case BFD_RELOC_16_GOTOFF:
2528 reloc = BFD_RELOC_PPC64_GOT16_DS;
2529 break;
2530 case BFD_RELOC_LO16_GOTOFF:
2531 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2532 break;
2533 case BFD_RELOC_LO16_PLTOFF:
2534 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2535 break;
1cfc59d5 2536 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2537 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2538 break;
2539 case BFD_RELOC_LO16_BASEREL:
2540 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2541 break;
2542 case BFD_RELOC_PPC_TOC16:
2543 reloc = BFD_RELOC_PPC64_TOC16_DS;
2544 break;
2545 case BFD_RELOC_PPC64_TOC16_LO:
2546 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2547 break;
2548 case BFD_RELOC_PPC64_PLTGOT16:
2549 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2550 break;
2551 case BFD_RELOC_PPC64_PLTGOT16_LO:
2552 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2553 break;
cdba85ec
AM		 2554 case BFD_RELOC_PPC_DTPREL16:
2555 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2556 break;
2557 case BFD_RELOC_PPC_DTPREL16_LO:
2558 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2559 break;
2560 case BFD_RELOC_PPC_TPREL16:
2561 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2562 break;
2563 case BFD_RELOC_PPC_TPREL16_LO:
2564 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2565 break;
2566 case BFD_RELOC_PPC_GOT_DTPREL16:
2567 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2568 case BFD_RELOC_PPC_GOT_TPREL16:
2569 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2570 break;
0baf16f2
AM		 2571 default:
2572 as_bad (_("unsupported relocation for DS offset field"));
2573 break;
2574 }
2575 }
2576
252b5132
RH		 2577 /* We need to generate a fixup for this expression. */
2578 if (fc >= MAX_INSN_FIXUPS)
2579 as_fatal (_("too many fixups"));
2580 fixups[fc].exp = ex;
2581 fixups[fc].opindex = 0;
2582 fixups[fc].reloc = reloc;
2583 ++fc;
2584 }
2585#endif /* OBJ_ELF */
2586
2587 else
2588 {
2589 /* We need to generate a fixup for this expression. */
2590 if (fc >= MAX_INSN_FIXUPS)
2591 as_fatal (_("too many fixups"));
2592 fixups[fc].exp = ex;
2593 fixups[fc].opindex = *opindex_ptr;
2594 fixups[fc].reloc = BFD_RELOC_UNUSED;
2595 ++fc;
2596 }
2597
2598 if (need_paren)
2599 {
2600 endc = ')';
2601 need_paren = 0;
2602 }
2603 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2604 {
2605 endc = '(';
2606 need_paren = 1;
2607 }
2608 else
2609 endc = ',';
2610
2611 /* The call to expression should have advanced str past any
2612 whitespace. */
2613 if (*str != endc
2614 && (endc != ',' || *str != '\0'))
2615 {
2616 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2617 break;
2618 }
2619
2620 if (*str != '\0')
2621 ++str;
2622 }
2623
3882b010 2624 while (ISSPACE (*str))
252b5132
RH		 2625 ++str;
2626
2627 if (*str != '\0')
2628 as_bad (_("junk at end of line: `%s'"), str);
2629
dc1d03fc 2630#ifdef OBJ_ELF
6a0c61b7
EZ		 2631 /* Do we need/want a APUinfo section? */
2632 if (ppc_cpu & (PPC_OPCODE_SPE
2633 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2634 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2635 | PPC_OPCODE_RFMCI))
2636 {
2637 /* These are all version "1". */
2638 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2639 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2640 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2641 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2642 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2643 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2644 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2645 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2646 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2647 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2648 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2649 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2650 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2651 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2652 }
dc1d03fc 2653#endif
6a0c61b7 2654
252b5132
RH		 2655 /* Write out the instruction. */
2656 f = frag_more (4);
09b935ac
AM		 2657 addr_mod = frag_now_fix () & 3;
2658 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2659 as_bad (_("instruction address is not a multiple of 4"));
2660 frag_now->insn_addr = addr_mod;
2661 frag_now->has_code = 1;
252b5132
RH		 2662 md_number_to_chars (f, insn, 4);
2663
5d6f4f16
GK		 2664#ifdef OBJ_ELF
2665 dwarf2_emit_insn (4);
2666#endif
2667
252b5132
RH		 2668 /* Create any fixups. At this point we do not use a
2669 bfd_reloc_code_real_type, but instead just use the
2670 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2671 handle fixups for any operand type, although that is admittedly
2672 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2673 md_apply_fix. */
252b5132
RH		 2674 for (i = 0; i < fc; i++)
2675 {
2676 const struct powerpc_operand *operand;
2677
2678 operand = &powerpc_operands[fixups[i].opindex];
2679 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2680 {
99a814a1 2681 reloc_howto_type *reloc_howto;
252b5132
RH		 2682 int size;
2683 int offset;
2684 fixS *fixP;
2685
99a814a1 2686 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2687 if (!reloc_howto)
2688 abort ();
2689
2690 size = bfd_get_reloc_size (reloc_howto);
2691 offset = target_big_endian ? (4 - size) : 0;
2692
2693 if (size < 1 || size > 4)
bc805888 2694 abort ();
252b5132 2695
99a814a1
AM		 2696 fixP = fix_new_exp (frag_now,
2697 f - frag_now->fr_literal + offset,
2698 size,
2699 &fixups[i].exp,
2700 reloc_howto->pc_relative,
252b5132
RH		 2701 fixups[i].reloc);
2702
2703 /* Turn off complaints that the addend is too large for things like
2704 foo+100000@ha. */
2705 switch (fixups[i].reloc)
2706 {
2707 case BFD_RELOC_16_GOTOFF:
2708 case BFD_RELOC_PPC_TOC16:
2709 case BFD_RELOC_LO16:
2710 case BFD_RELOC_HI16:
2711 case BFD_RELOC_HI16_S:
0baf16f2 2712#ifdef OBJ_ELF
0baf16f2
AM		 2713 case BFD_RELOC_PPC64_HIGHER:
2714 case BFD_RELOC_PPC64_HIGHER_S:
2715 case BFD_RELOC_PPC64_HIGHEST:
2716 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2717#endif
252b5132
RH		 2718 fixP->fx_no_overflow = 1;
2719 break;
2720 default:
2721 break;
2722 }
2723 }
2724 else
99a814a1
AM		 2725 fix_new_exp (frag_now,
2726 f - frag_now->fr_literal,
2727 4,
252b5132
RH		 2728 &fixups[i].exp,
2729 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2730 ((bfd_reloc_code_real_type)
99a814a1 2731 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2732 }
2733}
2734
2735/* Handle a macro. Gather all the operands, transform them as
2736 described by the macro, and call md_assemble recursively. All the
2737 operands are separated by commas; we don't accept parentheses
2738 around operands here. */
2739
2740static void
2741ppc_macro (str, macro)
2742 char *str;
2743 const struct powerpc_macro *macro;
2744{
2745 char *operands[10];
2746 unsigned int count;
2747 char *s;
2748 unsigned int len;
2749 const char *format;
2750 int arg;
2751 char *send;
2752 char *complete;
2753
2754 /* Gather the users operands into the operands array. */
2755 count = 0;
2756 s = str;
2757 while (1)
2758 {
2759 if (count >= sizeof operands / sizeof operands[0])
2760 break;
2761 operands[count++] = s;
2762 s = strchr (s, ',');
2763 if (s == (char *) NULL)
2764 break;
2765 *s++ = '\0';
81d4177b 2766 }
252b5132
RH		 2767
2768 if (count != macro->operands)
2769 {
2770 as_bad (_("wrong number of operands"));
2771 return;
2772 }
2773
2774 /* Work out how large the string must be (the size is unbounded
2775 because it includes user input). */
2776 len = 0;
2777 format = macro->format;
2778 while (*format != '\0')
2779 {
2780 if (*format != '%')
2781 {
2782 ++len;
2783 ++format;
2784 }
2785 else
2786 {
2787 arg = strtol (format + 1, &send, 10);
2788 know (send != format && arg >= 0 && arg < count);
2789 len += strlen (operands[arg]);
2790 format = send;
2791 }
2792 }
2793
2794 /* Put the string together. */
2795 complete = s = (char *) alloca (len + 1);
2796 format = macro->format;
2797 while (*format != '\0')
2798 {
2799 if (*format != '%')
2800 *s++ = *format++;
2801 else
2802 {
2803 arg = strtol (format + 1, &send, 10);
2804 strcpy (s, operands[arg]);
2805 s += strlen (s);
2806 format = send;
2807 }
2808 }
2809 *s = '\0';
2810
2811 /* Assemble the constructed instruction. */
2812 md_assemble (complete);
81d4177b 2813}
252b5132
RH		 2814\f
2815#ifdef OBJ_ELF
99a814a1 2816/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2817
2818int
2819ppc_section_letter (letter, ptr_msg)
2820 int letter;
2821 char **ptr_msg;
2822{
2823 if (letter == 'e')
2824 return SHF_EXCLUDE;
2825
13ae64f3 2826 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2827 return -1;
252b5132
RH		 2828}
2829
2830int
9de8d8f1
RH		 2831ppc_section_word (str, len)
2832 char *str;
2833 size_t len;
252b5132 2834{
9de8d8f1
RH		 2835 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2836 return SHF_EXCLUDE;
252b5132 2837
9de8d8f1 2838 return -1;
252b5132
RH		 2839}
2840
2841int
9de8d8f1
RH		 2842ppc_section_type (str, len)
2843 char *str;
2844 size_t len;
252b5132 2845{
9de8d8f1
RH		 2846 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2847 return SHT_ORDERED;
252b5132 2848
9de8d8f1 2849 return -1;
252b5132
RH		 2850}
2851
2852int
2853ppc_section_flags (flags, attr, type)
2854 int flags;
2855 int attr;
2856 int type;
2857{
2858 if (type == SHT_ORDERED)
2859 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2860
2861 if (attr & SHF_EXCLUDE)
2862 flags |= SEC_EXCLUDE;
2863
2864 return flags;
2865}
2866#endif /* OBJ_ELF */
2867
2868\f
2869/* Pseudo-op handling. */
2870
2871/* The .byte pseudo-op. This is similar to the normal .byte
2872 pseudo-op, but it can also take a single ASCII string. */
2873
2874static void
2875ppc_byte (ignore)
92161534 2876 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2877{
2878 if (*input_line_pointer != '\"')
2879 {
2880 cons (1);
2881 return;
2882 }
2883
2884 /* Gather characters. A real double quote is doubled. Unusual
2885 characters are not permitted. */
2886 ++input_line_pointer;
2887 while (1)
2888 {
2889 char c;
2890
2891 c = *input_line_pointer++;
2892
2893 if (c == '\"')
2894 {
2895 if (*input_line_pointer != '\"')
2896 break;
2897 ++input_line_pointer;
2898 }
2899
2900 FRAG_APPEND_1_CHAR (c);
2901 }
2902
2903 demand_empty_rest_of_line ();
2904}
2905\f
2906#ifdef OBJ_XCOFF
2907
2908/* XCOFF specific pseudo-op handling. */
2909
2910/* This is set if we are creating a .stabx symbol, since we don't want
2911 to handle symbol suffixes for such symbols. */
b34976b6 2912static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2913
2914/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2915 symbols in the .bss segment as though they were local common
67c1ffbe 2916 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2917 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2918
2919static void
2920ppc_comm (lcomm)
2921 int lcomm;
2922{
2923 asection *current_seg = now_seg;
2924 subsegT current_subseg = now_subseg;
2925 char *name;
2926 char endc;
2927 char *end_name;
2928 offsetT size;
2929 offsetT align;
2930 symbolS *lcomm_sym = NULL;
2931 symbolS *sym;
2932 char *pfrag;
2933
2934 name = input_line_pointer;
2935 endc = get_symbol_end ();
2936 end_name = input_line_pointer;
2937 *end_name = endc;
2938
2939 if (*input_line_pointer != ',')
2940 {
2941 as_bad (_("missing size"));
2942 ignore_rest_of_line ();
2943 return;
2944 }
2945 ++input_line_pointer;
2946
2947 size = get_absolute_expression ();
2948 if (size < 0)
2949 {
2950 as_bad (_("negative size"));
2951 ignore_rest_of_line ();
2952 return;
2953 }
2954
2955 if (! lcomm)
2956 {
2957 /* The third argument to .comm is the alignment. */
2958 if (*input_line_pointer != ',')
1ad63b2f 2959 align = 2;
252b5132
RH		 2960 else
2961 {
2962 ++input_line_pointer;
2963 align = get_absolute_expression ();
2964 if (align <= 0)
2965 {
2966 as_warn (_("ignoring bad alignment"));
1ad63b2f 2967 align = 2;
252b5132
RH		 2968 }
2969 }
2970 }
2971 else
2972 {
2973 char *lcomm_name;
2974 char lcomm_endc;
2975
1ad63b2f 2976 if (size <= 4)
252b5132
RH		 2977 align = 2;
2978 else
2979 align = 3;
2980
2981 /* The third argument to .lcomm appears to be the real local
2982 common symbol to create. References to the symbol named in
2983 the first argument are turned into references to the third
2984 argument. */
2985 if (*input_line_pointer != ',')
2986 {
2987 as_bad (_("missing real symbol name"));
2988 ignore_rest_of_line ();
2989 return;
2990 }
2991 ++input_line_pointer;
2992
2993 lcomm_name = input_line_pointer;
2994 lcomm_endc = get_symbol_end ();
81d4177b 2995
252b5132
RH		 2996 lcomm_sym = symbol_find_or_make (lcomm_name);
2997
2998 *input_line_pointer = lcomm_endc;
2999 }
3000
3001 *end_name = '\0';
3002 sym = symbol_find_or_make (name);
3003 *end_name = endc;
3004
3005 if (S_IS_DEFINED (sym)
3006 || S_GET_VALUE (sym) != 0)
3007 {
3008 as_bad (_("attempt to redefine symbol"));
3009 ignore_rest_of_line ();
3010 return;
3011 }
81d4177b 3012
252b5132 3013 record_alignment (bss_section, align);
81d4177b 3014
252b5132
RH		 3015 if (! lcomm
3016 || ! S_IS_DEFINED (lcomm_sym))
3017 {
3018 symbolS *def_sym;
3019 offsetT def_size;
3020
3021 if (! lcomm)
3022 {
3023 def_sym = sym;
3024 def_size = size;
3025 S_SET_EXTERNAL (sym);
3026 }
3027 else
3028 {
809ffe0d 3029 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3030 def_sym = lcomm_sym;
3031 def_size = 0;
3032 }
3033
3034 subseg_set (bss_section, 1);
3035 frag_align (align, 0, 0);
81d4177b 3036
809ffe0d 3037 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3038 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3039 def_size, (char *) NULL);
3040 *pfrag = 0;
3041 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3042 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3043 }
3044 else if (lcomm)
3045 {
3046 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3047 symbol_get_frag (lcomm_sym)->fr_offset =
3048 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3049 &~ ((1 << align) - 1));
809ffe0d
ILT		 3050 if (align > symbol_get_tc (lcomm_sym)->align)
3051 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3052 }
3053
3054 if (lcomm)
3055 {
3056 /* Make sym an offset from lcomm_sym. */
3057 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3058 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3059 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3060 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3061 }
3062
3063 subseg_set (current_seg, current_subseg);
3064
3065 demand_empty_rest_of_line ();
3066}
3067
3068/* The .csect pseudo-op. This switches us into a different
3069 subsegment. The first argument is a symbol whose value is the
3070 start of the .csect. In COFF, csect symbols get special aux
3071 entries defined by the x_csect field of union internal_auxent. The
3072 optional second argument is the alignment (the default is 2). */
3073
3074static void
3075ppc_csect (ignore)
5480ccf3 3076 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3077{
3078 char *name;
3079 char endc;
3080 symbolS *sym;
931e13a6 3081 offsetT align;
252b5132
RH		 3082
3083 name = input_line_pointer;
3084 endc = get_symbol_end ();
81d4177b 3085
252b5132
RH		 3086 sym = symbol_find_or_make (name);
3087
3088 *input_line_pointer = endc;
3089
3090 if (S_GET_NAME (sym)[0] == '\0')
3091 {
3092 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3093 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3094 }
3095
931e13a6 3096 align = 2;
252b5132
RH		 3097 if (*input_line_pointer == ',')
3098 {
3099 ++input_line_pointer;
931e13a6 3100 align = get_absolute_expression ();
252b5132
RH		 3101 }
3102
931e13a6
AM		 3103 ppc_change_csect (sym, align);
3104
252b5132
RH		 3105 demand_empty_rest_of_line ();
3106}
3107
3108/* Change to a different csect. */
3109
3110static void
931e13a6 3111ppc_change_csect (sym, align)
252b5132 3112 symbolS *sym;
931e13a6 3113 offsetT align;
252b5132
RH		 3114{
3115 if (S_IS_DEFINED (sym))
809ffe0d 3116 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3117 else
3118 {
3119 symbolS **list_ptr;
3120 int after_toc;
3121 int hold_chunksize;
3122 symbolS *list;
931e13a6
AM		 3123 int is_code;
3124 segT sec;
252b5132
RH		 3125
3126 /* This is a new csect. We need to look at the symbol class to
3127 figure out whether it should go in the text section or the
3128 data section. */
3129 after_toc = 0;
931e13a6 3130 is_code = 0;
809ffe0d 3131 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3132 {
3133 case XMC_PR:
3134 case XMC_RO:
3135 case XMC_DB:
3136 case XMC_GL:
3137 case XMC_XO:
3138 case XMC_SV:
3139 case XMC_TI:
3140 case XMC_TB:
3141 S_SET_SEGMENT (sym, text_section);
809ffe0d 3142 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3143 ++ppc_text_subsegment;
3144 list_ptr = &ppc_text_csects;
931e13a6 3145 is_code = 1;
252b5132
RH		 3146 break;
3147 case XMC_RW:
3148 case XMC_TC0:
3149 case XMC_TC:
3150 case XMC_DS:
3151 case XMC_UA:
3152 case XMC_BS:
3153 case XMC_UC:
3154 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3155 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3156 == ppc_data_subsegment))
252b5132
RH		 3157 after_toc = 1;
3158 S_SET_SEGMENT (sym, data_section);
809ffe0d 3159 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3160 ++ppc_data_subsegment;
3161 list_ptr = &ppc_data_csects;
3162 break;
3163 default:
3164 abort ();
3165 }
3166
3167 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3168 changing subsegments, so that we don't use a lot of memory
3169 space for what may be a small section. */
252b5132
RH		 3170 hold_chunksize = chunksize;
3171 chunksize = 64;
3172
931e13a6
AM		 3173 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3174 symbol_get_tc (sym)->subseg);
252b5132
RH		 3175
3176 chunksize = hold_chunksize;
3177
3178 if (after_toc)
3179 ppc_after_toc_frag = frag_now;
3180
931e13a6
AM		 3181 record_alignment (sec, align);
3182 if (is_code)
3183 frag_align_code (align, 0);
3184 else
3185 frag_align (align, 0, 0);
3186
809ffe0d 3187 symbol_set_frag (sym, frag_now);
252b5132
RH		 3188 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3189
931e13a6 3190 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3191 symbol_get_tc (sym)->output = 1;
3192 symbol_get_tc (sym)->within = sym;
81d4177b 3193
252b5132 3194 for (list = *list_ptr;
809ffe0d
ILT		 3195 symbol_get_tc (list)->next != (symbolS *) NULL;
3196 list = symbol_get_tc (list)->next)
252b5132 3197 ;
809ffe0d 3198 symbol_get_tc (list)->next = sym;
81d4177b 3199
252b5132 3200 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3201 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3202 &symbol_lastP);
252b5132
RH		 3203 }
3204
3205 ppc_current_csect = sym;
3206}
3207
3208/* This function handles the .text and .data pseudo-ops. These
3209 pseudo-ops aren't really used by XCOFF; we implement them for the
3210 convenience of people who aren't used to XCOFF. */
3211
3212static void
3213ppc_section (type)
3214 int type;
3215{
3216 const char *name;
3217 symbolS *sym;
3218
3219 if (type == 't')
3220 name = ".text[PR]";
3221 else if (type == 'd')
3222 name = ".data[RW]";
3223 else
3224 abort ();
3225
3226 sym = symbol_find_or_make (name);
3227
931e13a6 3228 ppc_change_csect (sym, 2);
252b5132
RH		 3229
3230 demand_empty_rest_of_line ();
3231}
3232
3233/* This function handles the .section pseudo-op. This is mostly to
3234 give an error, since XCOFF only supports .text, .data and .bss, but
3235 we do permit the user to name the text or data section. */
3236
3237static void
3238ppc_named_section (ignore)
5480ccf3 3239 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3240{
3241 char *user_name;
3242 const char *real_name;
3243 char c;
3244 symbolS *sym;
3245
3246 user_name = input_line_pointer;
3247 c = get_symbol_end ();
3248
3249 if (strcmp (user_name, ".text") == 0)
3250 real_name = ".text[PR]";
3251 else if (strcmp (user_name, ".data") == 0)
3252 real_name = ".data[RW]";
3253 else
3254 {
3255 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3256 *input_line_pointer = c;
3257 ignore_rest_of_line ();
3258 return;
3259 }
3260
3261 *input_line_pointer = c;
3262
3263 sym = symbol_find_or_make (real_name);
3264
931e13a6 3265 ppc_change_csect (sym, 2);
252b5132
RH		 3266
3267 demand_empty_rest_of_line ();
3268}
3269
3270/* The .extern pseudo-op. We create an undefined symbol. */
3271
3272static void
3273ppc_extern (ignore)
5480ccf3 3274 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3275{
3276 char *name;
3277 char endc;
3278
3279 name = input_line_pointer;
3280 endc = get_symbol_end ();
3281
3282 (void) symbol_find_or_make (name);
3283
3284 *input_line_pointer = endc;
3285
3286 demand_empty_rest_of_line ();
3287}
3288
3289/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3290
3291static void
3292ppc_lglobl (ignore)
5480ccf3 3293 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3294{
3295 char *name;
3296 char endc;
3297 symbolS *sym;
3298
3299 name = input_line_pointer;
3300 endc = get_symbol_end ();
3301
3302 sym = symbol_find_or_make (name);
3303
3304 *input_line_pointer = endc;
3305
809ffe0d 3306 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3307
3308 demand_empty_rest_of_line ();
3309}
3310
3311/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3312 although I don't know why it bothers. */
3313
3314static void
3315ppc_rename (ignore)
5480ccf3 3316 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3317{
3318 char *name;
3319 char endc;
3320 symbolS *sym;
3321 int len;
3322
3323 name = input_line_pointer;
3324 endc = get_symbol_end ();
3325
3326 sym = symbol_find_or_make (name);
3327
3328 *input_line_pointer = endc;
3329
3330 if (*input_line_pointer != ',')
3331 {
3332 as_bad (_("missing rename string"));
3333 ignore_rest_of_line ();
3334 return;
3335 }
3336 ++input_line_pointer;
3337
809ffe0d 3338 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3339
3340 demand_empty_rest_of_line ();
3341}
3342
3343/* The .stabx pseudo-op. This is similar to a normal .stabs
3344 pseudo-op, but slightly different. A sample is
3345 .stabx "main:F-1",.main,142,0
3346 The first argument is the symbol name to create. The second is the
3347 value, and the third is the storage class. The fourth seems to be
3348 always zero, and I am assuming it is the type. */
3349
3350static void
3351ppc_stabx (ignore)
5480ccf3 3352 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3353{
3354 char *name;
3355 int len;
3356 symbolS *sym;
3357 expressionS exp;
3358
3359 name = demand_copy_C_string (&len);
3360
3361 if (*input_line_pointer != ',')
3362 {
3363 as_bad (_("missing value"));
3364 return;
3365 }
3366 ++input_line_pointer;
3367
b34976b6 3368 ppc_stab_symbol = TRUE;
252b5132 3369 sym = symbol_make (name);
b34976b6 3370 ppc_stab_symbol = FALSE;
252b5132 3371
809ffe0d 3372 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3373
3374 (void) expression (&exp);
3375
3376 switch (exp.X_op)
3377 {
3378 case O_illegal:
3379 case O_absent:
3380 case O_big:
3381 as_bad (_("illegal .stabx expression; zero assumed"));
3382 exp.X_add_number = 0;
3383 /* Fall through. */
3384 case O_constant:
3385 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3386 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3387 break;
3388
3389 case O_symbol:
3390 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3391 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3392 else
3393 {
3394 S_SET_VALUE (sym,
3395 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3396 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3397 }
3398 break;
3399
3400 default:
3401 /* The value is some complex expression. This will probably
99a814a1
AM		 3402 fail at some later point, but this is probably the right
3403 thing to do here. */
809ffe0d 3404 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3405 break;
3406 }
3407
3408 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3409 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3410
3411 if (*input_line_pointer != ',')
3412 {
3413 as_bad (_("missing class"));
3414 return;
3415 }
3416 ++input_line_pointer;
3417
3418 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3419
3420 if (*input_line_pointer != ',')
3421 {
3422 as_bad (_("missing type"));
3423 return;
3424 }
3425 ++input_line_pointer;
3426
3427 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3428
809ffe0d 3429 symbol_get_tc (sym)->output = 1;
252b5132 3430
6877bb43 3431 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3432
809ffe0d 3433 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3434
41ea10b1 3435 /* In this case :
99a814a1 3436
41ea10b1
TR		 3437 .bs name
3438 .stabx "z",arrays_,133,0
3439 .es
99a814a1 3440
41ea10b1 3441 .comm arrays_,13768,3
99a814a1 3442
41ea10b1
TR		 3443 resolve_symbol_value will copy the exp's "within" into sym's when the
3444 offset is 0. Since this seems to be corner case problem,
3445 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3446 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3447
3448 if (exp.X_op == O_symbol)
41ea10b1
TR		 3449 {
3450 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3451 }
6877bb43 3452 }
99a814a1 3453
252b5132
RH		 3454 if (exp.X_op != O_symbol
3455 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3456 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3457 ppc_frob_label (sym);
3458 else
3459 {
3460 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3461 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3462 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3463 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3464 }
3465
3466 demand_empty_rest_of_line ();
3467}
3468
3469/* The .function pseudo-op. This takes several arguments. The first
3470 argument seems to be the external name of the symbol. The second
67c1ffbe 3471 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3472 uses the same name for both. I have no idea what the third and
3473 fourth arguments are meant to be. The optional fifth argument is
3474 an expression for the size of the function. In COFF this symbol
3475 gets an aux entry like that used for a csect. */
3476
3477static void
3478ppc_function (ignore)
5480ccf3 3479 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3480{
3481 char *name;
3482 char endc;
3483 char *s;
3484 symbolS *ext_sym;
3485 symbolS *lab_sym;
3486
3487 name = input_line_pointer;
3488 endc = get_symbol_end ();
3489
3490 /* Ignore any [PR] suffix. */
3491 name = ppc_canonicalize_symbol_name (name);
3492 s = strchr (name, '[');
3493 if (s != (char *) NULL
3494 && strcmp (s + 1, "PR]") == 0)
3495 *s = '\0';
3496
3497 ext_sym = symbol_find_or_make (name);
3498
3499 *input_line_pointer = endc;
3500
3501 if (*input_line_pointer != ',')
3502 {
3503 as_bad (_("missing symbol name"));
3504 ignore_rest_of_line ();
3505 return;
3506 }
3507 ++input_line_pointer;
3508
3509 name = input_line_pointer;
3510 endc = get_symbol_end ();
3511
3512 lab_sym = symbol_find_or_make (name);
3513
3514 *input_line_pointer = endc;
3515
3516 if (ext_sym != lab_sym)
3517 {
809ffe0d
ILT		 3518 expressionS exp;
3519
3520 exp.X_op = O_symbol;
3521 exp.X_add_symbol = lab_sym;
3522 exp.X_op_symbol = NULL;
3523 exp.X_add_number = 0;
3524 exp.X_unsigned = 0;
3525 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3526 }
3527
809ffe0d
ILT		 3528 if (symbol_get_tc (ext_sym)->class == -1)
3529 symbol_get_tc (ext_sym)->class = XMC_PR;
3530 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3531
3532 if (*input_line_pointer == ',')
3533 {
3534 expressionS ignore;
3535
3536 /* Ignore the third argument. */
3537 ++input_line_pointer;
3538 expression (&ignore);
3539 if (*input_line_pointer == ',')
3540 {
3541 /* Ignore the fourth argument. */
3542 ++input_line_pointer;
3543 expression (&ignore);
3544 if (*input_line_pointer == ',')
3545 {
3546 /* The fifth argument is the function size. */
3547 ++input_line_pointer;
809ffe0d
ILT		 3548 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3549 absolute_section,
3550 (valueT) 0,
3551 &zero_address_frag);
3552 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3553 }
3554 }
3555 }
3556
3557 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3558 SF_SET_FUNCTION (ext_sym);
3559 SF_SET_PROCESS (ext_sym);
3560 coff_add_linesym (ext_sym);
3561
3562 demand_empty_rest_of_line ();
3563}
3564
3565/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3566 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3567 with the correct line number */
5d6255fe 3568
8642cce8 3569static symbolS *saved_bi_sym = 0;
252b5132
RH		 3570
3571static void
3572ppc_bf (ignore)
5480ccf3 3573 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3574{
3575 symbolS *sym;
3576
3577 sym = symbol_make (".bf");
3578 S_SET_SEGMENT (sym, text_section);
809ffe0d 3579 symbol_set_frag (sym, frag_now);
252b5132
RH		 3580 S_SET_VALUE (sym, frag_now_fix ());
3581 S_SET_STORAGE_CLASS (sym, C_FCN);
3582
3583 coff_line_base = get_absolute_expression ();
3584
3585 S_SET_NUMBER_AUXILIARY (sym, 1);
3586 SA_SET_SYM_LNNO (sym, coff_line_base);
3587
8642cce8 3588 /* Line number for bi. */
5d6255fe 3589 if (saved_bi_sym)
8642cce8
TR		 3590 {
3591 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3592 saved_bi_sym = 0;
3593 }
5d6255fe 3594
8642cce8 3595
809ffe0d 3596 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3597
3598 ppc_frob_label (sym);
3599
3600 demand_empty_rest_of_line ();
3601}
3602
3603/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3604 ".ef", except that the line number is absolute, not relative to the
3605 most recent ".bf" symbol. */
3606
3607static void
3608ppc_ef (ignore)
5480ccf3 3609 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3610{
3611 symbolS *sym;
3612
3613 sym = symbol_make (".ef");
3614 S_SET_SEGMENT (sym, text_section);
809ffe0d 3615 symbol_set_frag (sym, frag_now);
252b5132
RH		 3616 S_SET_VALUE (sym, frag_now_fix ());
3617 S_SET_STORAGE_CLASS (sym, C_FCN);
3618 S_SET_NUMBER_AUXILIARY (sym, 1);
3619 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3620 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3621
3622 ppc_frob_label (sym);
3623
3624 demand_empty_rest_of_line ();
3625}
3626
3627/* The .bi and .ei pseudo-ops. These take a string argument and
3628 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3629 the symbol list. The value of .bi will be know when the next .bf
3630 is encountered. */
252b5132
RH		 3631
3632static void
3633ppc_biei (ei)
3634 int ei;
3635{
3636 static symbolS *last_biei;
3637
3638 char *name;
3639 int len;
3640 symbolS *sym;
3641 symbolS *look;
3642
3643 name = demand_copy_C_string (&len);
3644
3645 /* The value of these symbols is actually file offset. Here we set
3646 the value to the index into the line number entries. In
3647 ppc_frob_symbols we set the fix_line field, which will cause BFD
3648 to do the right thing. */
3649
3650 sym = symbol_make (name);
3651 /* obj-coff.c currently only handles line numbers correctly in the
3652 .text section. */
3653 S_SET_SEGMENT (sym, text_section);
3654 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3655 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3656
3657 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3658 symbol_get_tc (sym)->output = 1;
81d4177b 3659
8642cce8 3660 /* Save bi. */
5d6255fe 3661 if (ei)
8642cce8
TR		 3662 saved_bi_sym = 0;
3663 else
3664 saved_bi_sym = sym;
3665
252b5132
RH		 3666 for (look = last_biei ? last_biei : symbol_rootP;
3667 (look != (symbolS *) NULL
3668 && (S_GET_STORAGE_CLASS (look) == C_FILE
3669 || S_GET_STORAGE_CLASS (look) == C_BINCL
3670 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3671 look = symbol_next (look))
3672 ;
3673 if (look != (symbolS *) NULL)
3674 {
3675 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3676 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3677 last_biei = sym;
3678 }
3679
3680 demand_empty_rest_of_line ();
3681}
3682
3683/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3684 There is one argument, which is a csect symbol. The value of the
3685 .bs symbol is the index of this csect symbol. */
3686
3687static void
3688ppc_bs (ignore)
5480ccf3 3689 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3690{
3691 char *name;
3692 char endc;
3693 symbolS *csect;
3694 symbolS *sym;
3695
3696 if (ppc_current_block != NULL)
3697 as_bad (_("nested .bs blocks"));
3698
3699 name = input_line_pointer;
3700 endc = get_symbol_end ();
3701
3702 csect = symbol_find_or_make (name);
3703
3704 *input_line_pointer = endc;
3705
3706 sym = symbol_make (".bs");
3707 S_SET_SEGMENT (sym, now_seg);
3708 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3709 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3710 symbol_get_tc (sym)->output = 1;
252b5132 3711
809ffe0d 3712 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3713
3714 ppc_frob_label (sym);
3715
3716 ppc_current_block = sym;
3717
3718 demand_empty_rest_of_line ();
3719}
3720
3721/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3722
3723static void
3724ppc_es (ignore)
5480ccf3 3725 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3726{
3727 symbolS *sym;
3728
3729 if (ppc_current_block == NULL)
3730 as_bad (_(".es without preceding .bs"));
3731
3732 sym = symbol_make (".es");
3733 S_SET_SEGMENT (sym, now_seg);
3734 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3735 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3736 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3737
3738 ppc_frob_label (sym);
3739
3740 ppc_current_block = NULL;
3741
3742 demand_empty_rest_of_line ();
3743}
3744
3745/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3746 line number. */
3747
3748static void
3749ppc_bb (ignore)
5480ccf3 3750 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3751{
3752 symbolS *sym;
3753
3754 sym = symbol_make (".bb");
3755 S_SET_SEGMENT (sym, text_section);
809ffe0d 3756 symbol_set_frag (sym, frag_now);
252b5132
RH		 3757 S_SET_VALUE (sym, frag_now_fix ());
3758 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3759
3760 S_SET_NUMBER_AUXILIARY (sym, 1);
3761 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3762
809ffe0d 3763 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3764
3765 SF_SET_PROCESS (sym);
3766
3767 ppc_frob_label (sym);
3768
3769 demand_empty_rest_of_line ();
3770}
3771
3772/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3773 line number. */
3774
3775static void
3776ppc_eb (ignore)
5480ccf3 3777 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3778{
3779 symbolS *sym;
3780
3781 sym = symbol_make (".eb");
3782 S_SET_SEGMENT (sym, text_section);
809ffe0d 3783 symbol_set_frag (sym, frag_now);
252b5132
RH		 3784 S_SET_VALUE (sym, frag_now_fix ());
3785 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3786 S_SET_NUMBER_AUXILIARY (sym, 1);
3787 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3788 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3789
3790 SF_SET_PROCESS (sym);
3791
3792 ppc_frob_label (sym);
3793
3794 demand_empty_rest_of_line ();
3795}
3796
3797/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3798 specified name. */
3799
3800static void
3801ppc_bc (ignore)
5480ccf3 3802 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3803{
3804 char *name;
3805 int len;
3806 symbolS *sym;
3807
3808 name = demand_copy_C_string (&len);
3809 sym = symbol_make (name);
3810 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3811 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3812 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3813 S_SET_VALUE (sym, 0);
809ffe0d 3814 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3815
3816 ppc_frob_label (sym);
3817
3818 demand_empty_rest_of_line ();
3819}
3820
3821/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3822
3823static void
3824ppc_ec (ignore)
5480ccf3 3825 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3826{
3827 symbolS *sym;
3828
3829 sym = symbol_make (".ec");
3830 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3831 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3832 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3833 S_SET_VALUE (sym, 0);
809ffe0d 3834 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3835
3836 ppc_frob_label (sym);
3837
3838 demand_empty_rest_of_line ();
3839}
3840
3841/* The .toc pseudo-op. Switch to the .toc subsegment. */
3842
3843static void
3844ppc_toc (ignore)
5480ccf3 3845 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3846{
3847 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3848 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3849 else
3850 {
3851 subsegT subseg;
3852 symbolS *sym;
3853 symbolS *list;
81d4177b 3854
252b5132
RH		 3855 subseg = ppc_data_subsegment;
3856 ++ppc_data_subsegment;
3857
3858 subseg_new (segment_name (data_section), subseg);
3859 ppc_toc_frag = frag_now;
3860
3861 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3862 symbol_set_frag (sym, frag_now);
252b5132
RH		 3863 S_SET_SEGMENT (sym, data_section);
3864 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3865 symbol_get_tc (sym)->subseg = subseg;
3866 symbol_get_tc (sym)->output = 1;
3867 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3868
3869 ppc_toc_csect = sym;
81d4177b 3870
252b5132 3871 for (list = ppc_data_csects;
809ffe0d
ILT		 3872 symbol_get_tc (list)->next != (symbolS *) NULL;
3873 list = symbol_get_tc (list)->next)
252b5132 3874 ;
809ffe0d 3875 symbol_get_tc (list)->next = sym;
252b5132
RH		 3876
3877 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3878 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3879 &symbol_lastP);
252b5132
RH		 3880 }
3881
3882 ppc_current_csect = ppc_toc_csect;
3883
3884 demand_empty_rest_of_line ();
3885}
3886
3887/* The AIX assembler automatically aligns the operands of a .long or
3888 .short pseudo-op, and we want to be compatible. */
3889
3890static void
3891ppc_xcoff_cons (log_size)
3892 int log_size;
3893{
3894 frag_align (log_size, 0, 0);
3895 record_alignment (now_seg, log_size);
3896 cons (1 << log_size);
3897}
3898
3899static void
3900ppc_vbyte (dummy)
5480ccf3 3901 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3902{
3903 expressionS exp;
3904 int byte_count;
3905
3906 (void) expression (&exp);
3907
3908 if (exp.X_op != O_constant)
3909 {
3910 as_bad (_("non-constant byte count"));
3911 return;
3912 }
3913
3914 byte_count = exp.X_add_number;
3915
3916 if (*input_line_pointer != ',')
3917 {
3918 as_bad (_("missing value"));
3919 return;
3920 }
3921
3922 ++input_line_pointer;
3923 cons (byte_count);
3924}
3925
3926#endif /* OBJ_XCOFF */
0baf16f2 3927#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3928\f
3929/* The .tc pseudo-op. This is used when generating either XCOFF or
3930 ELF. This takes two or more arguments.
3931
3932 When generating XCOFF output, the first argument is the name to
3933 give to this location in the toc; this will be a symbol with class
0baf16f2 3934 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3935 this location in the TOC; often there is just one more argument, a
1049f94e 3936 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3937 depends on target word size. A 32-bit target uses 4-byte values, a
3938 64-bit target uses 8-byte values.
252b5132
RH		 3939
3940 When not generating XCOFF output, the arguments are the same, but
3941 the first argument is simply ignored. */
3942
3943static void
3944ppc_tc (ignore)
92161534 3945 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3946{
3947#ifdef OBJ_XCOFF
3948
3949 /* Define the TOC symbol name. */
3950 {
3951 char *name;
3952 char endc;
3953 symbolS *sym;
3954
3955 if (ppc_toc_csect == (symbolS *) NULL
3956 || ppc_toc_csect != ppc_current_csect)
3957 {
3958 as_bad (_(".tc not in .toc section"));
3959 ignore_rest_of_line ();
3960 return;
3961 }
3962
3963 name = input_line_pointer;
3964 endc = get_symbol_end ();
3965
3966 sym = symbol_find_or_make (name);
3967
3968 *input_line_pointer = endc;
3969
3970 if (S_IS_DEFINED (sym))
3971 {
3972 symbolS *label;
3973
809ffe0d
ILT		 3974 label = symbol_get_tc (ppc_current_csect)->within;
3975 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3976 {
3977 as_bad (_(".tc with no label"));
3978 ignore_rest_of_line ();
3979 return;
3980 }
3981
3982 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3983 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3984 S_SET_VALUE (label, S_GET_VALUE (sym));
3985
3986 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3987 ++input_line_pointer;
3988
3989 return;
3990 }
3991
3992 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3993 symbol_set_frag (sym, frag_now);
252b5132 3994 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3995 symbol_get_tc (sym)->class = XMC_TC;
3996 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3997
3998 ppc_frob_label (sym);
3999 }
4000
0baf16f2
AM		 4001#endif /* OBJ_XCOFF */
4002#ifdef OBJ_ELF
9c7977b3 4003 int align;
252b5132
RH		 4004
4005 /* Skip the TOC symbol name. */
4006 while (is_part_of_name (*input_line_pointer)
4007 || *input_line_pointer == '['
4008 || *input_line_pointer == ']'
4009 || *input_line_pointer == '{'
4010 || *input_line_pointer == '}')
4011 ++input_line_pointer;
4012
0baf16f2 4013 /* Align to a four/eight byte boundary. */
2b3c4602 4014 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4015 frag_align (align, 0, 0);
4016 record_alignment (now_seg, align);
0baf16f2 4017#endif /* OBJ_ELF */
252b5132
RH		 4018
4019 if (*input_line_pointer != ',')
4020 demand_empty_rest_of_line ();
4021 else
4022 {
4023 ++input_line_pointer;
2b3c4602 4024 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4025 }
4026}
0baf16f2
AM		 4027
4028/* Pseudo-op .machine. */
0baf16f2
AM		 4029
4030static void
4031ppc_machine (ignore)
4032 int ignore ATTRIBUTE_UNUSED;
4033{
69c040df
AM		 4034 char *cpu_string;
4035#define MAX_HISTORY 100
4036 static unsigned long *cpu_history;
4037 static int curr_hist;
4038
4039 SKIP_WHITESPACE ();
4040
4041 if (*input_line_pointer == '"')
4042 {
4043 int len;
4044 cpu_string = demand_copy_C_string (&len);
4045 }
4046 else
4047 {
4048 char c;
4049 cpu_string = input_line_pointer;
4050 c = get_symbol_end ();
4051 cpu_string = xstrdup (cpu_string);
4052 *input_line_pointer = c;
4053 }
4054
4055 if (cpu_string != NULL)
4056 {
4057 unsigned long old_cpu = ppc_cpu;
4058 char *p;
4059
4060 for (p = cpu_string; *p != 0; p++)
4061 *p = TOLOWER (*p);
4062
4063 if (strcmp (cpu_string, "push") == 0)
4064 {
4065 if (cpu_history == NULL)
4066 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4067
4068 if (curr_hist >= MAX_HISTORY)
4069 as_bad (_(".machine stack overflow"));
4070 else
4071 cpu_history[curr_hist++] = ppc_cpu;
4072 }
4073 else if (strcmp (cpu_string, "pop") == 0)
4074 {
4075 if (curr_hist <= 0)
4076 as_bad (_(".machine stack underflow"));
4077 else
4078 ppc_cpu = cpu_history[--curr_hist];
4079 }
4080 else if (parse_cpu (cpu_string))
4081 ;
4082 else
4083 as_bad (_("invalid machine `%s'"), cpu_string);
4084
4085 if (ppc_cpu != old_cpu)
4086 ppc_setup_opcodes ();
4087 }
4088
4089 demand_empty_rest_of_line ();
0baf16f2
AM		 4090}
4091
4092/* See whether a symbol is in the TOC section. */
4093
4094static int
4095ppc_is_toc_sym (sym)
4096 symbolS *sym;
4097{
4098#ifdef OBJ_XCOFF
4099 return symbol_get_tc (sym)->class == XMC_TC;
4100#endif
4101#ifdef OBJ_ELF
4102 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4103 if (ppc_obj64)
0baf16f2
AM		 4104 return strcmp (sname, ".toc") == 0;
4105 else
4106 return strcmp (sname, ".got") == 0;
4107#endif
4108}
4109#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4110\f
4111#ifdef TE_PE
4112
99a814a1 4113/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4114
4115/* Set the current section. */
4116static void
4117ppc_set_current_section (new)
4118 segT new;
4119{
4120 ppc_previous_section = ppc_current_section;
4121 ppc_current_section = new;
4122}
4123
4124/* pseudo-op: .previous
4125 behaviour: toggles the current section with the previous section.
4126 errors: None
99a814a1
AM		 4127 warnings: "No previous section" */
4128
252b5132 4129static void
99a814a1 4130ppc_previous (ignore)
5480ccf3 4131 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4132{
4133 symbolS *tmp;
4134
81d4177b 4135 if (ppc_previous_section == NULL)
252b5132 4136 {
99a814a1 4137 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4138 return;
4139 }
4140
99a814a1 4141 subseg_set (ppc_previous_section, 0);
252b5132 4142
99a814a1 4143 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4144}
4145
4146/* pseudo-op: .pdata
4147 behaviour: predefined read only data section
b34976b6 4148 double word aligned
252b5132
RH		 4149 errors: None
4150 warnings: None
4151 initial: .section .pdata "adr3"
b34976b6 4152 a - don't know -- maybe a misprint
252b5132
RH		 4153 d - initialized data
4154 r - readable
4155 3 - double word aligned (that would be 4 byte boundary)
4156
4157 commentary:
4158 Tag index tables (also known as the function table) for exception
99a814a1 4159 handling, debugging, etc. */
252b5132 4160
252b5132 4161static void
99a814a1 4162ppc_pdata (ignore)
5480ccf3 4163 int ignore ATTRIBUTE_UNUSED;
252b5132 4164{
81d4177b 4165 if (pdata_section == 0)
252b5132
RH		 4166 {
4167 pdata_section = subseg_new (".pdata", 0);
81d4177b 4168
252b5132
RH		 4169 bfd_set_section_flags (stdoutput, pdata_section,
4170 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4171 | SEC_READONLY | SEC_DATA ));
81d4177b 4172
252b5132
RH		 4173 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4174 }
4175 else
4176 {
99a814a1 4177 pdata_section = subseg_new (".pdata", 0);
252b5132 4178 }
99a814a1 4179 ppc_set_current_section (pdata_section);
252b5132
RH		 4180}
4181
4182/* pseudo-op: .ydata
4183 behaviour: predefined read only data section
b34976b6 4184 double word aligned
252b5132
RH		 4185 errors: None
4186 warnings: None
4187 initial: .section .ydata "drw3"
b34976b6 4188 a - don't know -- maybe a misprint
252b5132
RH		 4189 d - initialized data
4190 r - readable
4191 3 - double word aligned (that would be 4 byte boundary)
4192 commentary:
4193 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4194 debugging, etc. */
4195
252b5132 4196static void
99a814a1 4197ppc_ydata (ignore)
5480ccf3 4198 int ignore ATTRIBUTE_UNUSED;
252b5132 4199{
81d4177b 4200 if (ydata_section == 0)
252b5132
RH		 4201 {
4202 ydata_section = subseg_new (".ydata", 0);
4203 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4204 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4205 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4206
4207 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4208 }
4209 else
4210 {
4211 ydata_section = subseg_new (".ydata", 0);
4212 }
99a814a1 4213 ppc_set_current_section (ydata_section);
252b5132
RH		 4214}
4215
4216/* pseudo-op: .reldata
4217 behaviour: predefined read write data section
b34976b6 4218 double word aligned (4-byte)
252b5132
RH		 4219 FIXME: relocation is applied to it
4220 FIXME: what's the difference between this and .data?
4221 errors: None
4222 warnings: None
4223 initial: .section .reldata "drw3"
4224 d - initialized data
4225 r - readable
4226 w - writeable
4227 3 - double word aligned (that would be 8 byte boundary)
4228
4229 commentary:
4230 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4231 function descriptors, etc. */
4232
252b5132 4233static void
99a814a1 4234ppc_reldata (ignore)
5480ccf3 4235 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4236{
4237 if (reldata_section == 0)
4238 {
4239 reldata_section = subseg_new (".reldata", 0);
4240
4241 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4242 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4243 | SEC_DATA));
252b5132
RH		 4244
4245 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4246 }
4247 else
4248 {
4249 reldata_section = subseg_new (".reldata", 0);
4250 }
99a814a1 4251 ppc_set_current_section (reldata_section);
252b5132
RH		 4252}
4253
4254/* pseudo-op: .rdata
4255 behaviour: predefined read only data section
b34976b6 4256 double word aligned
252b5132
RH		 4257 errors: None
4258 warnings: None
4259 initial: .section .rdata "dr3"
4260 d - initialized data
4261 r - readable
99a814a1
AM		 4262 3 - double word aligned (that would be 4 byte boundary) */
4263
252b5132 4264static void
99a814a1 4265ppc_rdata (ignore)
5480ccf3 4266 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4267{
4268 if (rdata_section == 0)
4269 {
4270 rdata_section = subseg_new (".rdata", 0);
4271 bfd_set_section_flags (stdoutput, rdata_section,
4272 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4273 | SEC_READONLY | SEC_DATA ));
4274
4275 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4276 }
4277 else
4278 {
4279 rdata_section = subseg_new (".rdata", 0);
4280 }
99a814a1 4281 ppc_set_current_section (rdata_section);
252b5132
RH		 4282}
4283
4284/* pseudo-op: .ualong
81d4177b 4285 behaviour: much like .int, with the exception that no alignment is
b34976b6 4286 performed.
252b5132
RH		 4287 FIXME: test the alignment statement
4288 errors: None
99a814a1
AM		 4289 warnings: None */
4290
252b5132 4291static void
99a814a1 4292ppc_ualong (ignore)
5480ccf3 4293 int ignore ATTRIBUTE_UNUSED;
252b5132 4294{
99a814a1
AM		 4295 /* Try for long. */
4296 cons (4);
252b5132
RH		 4297}
4298
4299/* pseudo-op: .znop <symbol name>
4300 behaviour: Issue a nop instruction
b34976b6 4301 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4302 the supplied symbol name.
4303 errors: None
99a814a1
AM		 4304 warnings: Missing symbol name */
4305
252b5132 4306static void
99a814a1 4307ppc_znop (ignore)
5480ccf3 4308 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4309{
4310 unsigned long insn;
4311 const struct powerpc_opcode *opcode;
4312 expressionS ex;
4313 char *f;
252b5132 4314 symbolS *sym;
252b5132
RH		 4315 char *symbol_name;
4316 char c;
4317 char *name;
4318 unsigned int exp;
4319 flagword flags;
4320 asection *sec;
4321
99a814a1 4322 /* Strip out the symbol name. */
252b5132
RH		 4323 symbol_name = input_line_pointer;
4324 c = get_symbol_end ();
4325
4326 name = xmalloc (input_line_pointer - symbol_name + 1);
4327 strcpy (name, symbol_name);
4328
4329 sym = symbol_find_or_make (name);
4330
4331 *input_line_pointer = c;
4332
4333 SKIP_WHITESPACE ();
4334
4335 /* Look up the opcode in the hash table. */
4336 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4337
99a814a1 4338 /* Stick in the nop. */
252b5132
RH		 4339 insn = opcode->opcode;
4340
4341 /* Write out the instruction. */
4342 f = frag_more (4);
4343 md_number_to_chars (f, insn, 4);
4344 fix_new (frag_now,
4345 f - frag_now->fr_literal,
4346 4,
4347 sym,
4348 0,
4349 0,
4350 BFD_RELOC_16_GOT_PCREL);
4351
4352}
4353
81d4177b
KH		 4354/* pseudo-op:
4355 behaviour:
4356 errors:
99a814a1
AM		 4357 warnings: */
4358
252b5132 4359static void
99a814a1 4360ppc_pe_comm (lcomm)
252b5132
RH		 4361 int lcomm;
4362{
4363 register char *name;
4364 register char c;
4365 register char *p;
4366 offsetT temp;
4367 register symbolS *symbolP;
4368 offsetT align;
4369
4370 name = input_line_pointer;
4371 c = get_symbol_end ();
4372
99a814a1 4373 /* just after name is now '\0'. */
252b5132
RH		 4374 p = input_line_pointer;
4375 *p = c;
4376 SKIP_WHITESPACE ();
4377 if (*input_line_pointer != ',')
4378 {
4379 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4380 ignore_rest_of_line ();
4381 return;
4382 }
4383
4384 input_line_pointer++; /* skip ',' */
4385 if ((temp = get_absolute_expression ()) < 0)
4386 {
4387 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4388 ignore_rest_of_line ();
4389 return;
4390 }
4391
4392 if (! lcomm)
4393 {
4394 /* The third argument to .comm is the alignment. */
4395 if (*input_line_pointer != ',')
4396 align = 3;
4397 else
4398 {
4399 ++input_line_pointer;
4400 align = get_absolute_expression ();
4401 if (align <= 0)
4402 {
4403 as_warn (_("ignoring bad alignment"));
4404 align = 3;
4405 }
4406 }
4407 }
4408
4409 *p = 0;
4410 symbolP = symbol_find_or_make (name);
4411
4412 *p = c;
4413 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4414 {
4415 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4416 S_GET_NAME (symbolP));
4417 ignore_rest_of_line ();
4418 return;
4419 }
4420
4421 if (S_GET_VALUE (symbolP))
4422 {
4423 if (S_GET_VALUE (symbolP) != (valueT) temp)
4424 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4425 S_GET_NAME (symbolP),
4426 (long) S_GET_VALUE (symbolP),
4427 (long) temp);
4428 }
4429 else
4430 {
4431 S_SET_VALUE (symbolP, (valueT) temp);
4432 S_SET_EXTERNAL (symbolP);
86ebace2 4433 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4434 }
4435
4436 demand_empty_rest_of_line ();
4437}
4438
4439/*
4440 * implement the .section pseudo op:
4441 * .section name {, "flags"}
4442 * ^ ^
4443 * | +--- optional flags: 'b' for bss
4444 * | 'i' for info
4445 * +-- section name 'l' for lib
4446 * 'n' for noload
4447 * 'o' for over
4448 * 'w' for data
4449 * 'd' (apparently m88k for data)
4450 * 'x' for text
4451 * But if the argument is not a quoted string, treat it as a
4452 * subsegment number.
4453 *
4454 * FIXME: this is a copy of the section processing from obj-coff.c, with
4455 * additions/changes for the moto-pas assembler support. There are three
4456 * categories:
4457 *
81d4177b 4458 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4459 * setting bits that bfd probably neither understands or uses. The
4460 * correct approach (?) will have to incorporate extra fields attached
4461 * to the section to hold the system specific stuff. (krk)
4462 *
4463 * Section Contents:
4464 * 'a' - unknown - referred to in documentation, but no definition supplied
4465 * 'c' - section has code
4466 * 'd' - section has initialized data
4467 * 'u' - section has uninitialized data
4468 * 'i' - section contains directives (info)
4469 * 'n' - section can be discarded
4470 * 'R' - remove section at link time
4471 *
4472 * Section Protection:
4473 * 'r' - section is readable
4474 * 'w' - section is writeable
4475 * 'x' - section is executable
4476 * 's' - section is sharable
4477 *
4478 * Section Alignment:
4479 * '0' - align to byte boundary
4480 * '1' - align to halfword undary
4481 * '2' - align to word boundary
4482 * '3' - align to doubleword boundary
4483 * '4' - align to quadword boundary
4484 * '5' - align to 32 byte boundary
4485 * '6' - align to 64 byte boundary
4486 *
4487 */
4488
4489void
4490ppc_pe_section (ignore)
5480ccf3 4491 int ignore ATTRIBUTE_UNUSED;
252b5132 4492{
99a814a1 4493 /* Strip out the section name. */
252b5132
RH		 4494 char *section_name;
4495 char c;
4496 char *name;
4497 unsigned int exp;
4498 flagword flags;
4499 segT sec;
4500 int align;
4501
4502 section_name = input_line_pointer;
4503 c = get_symbol_end ();
4504
4505 name = xmalloc (input_line_pointer - section_name + 1);
4506 strcpy (name, section_name);
4507
4508 *input_line_pointer = c;
4509
4510 SKIP_WHITESPACE ();
4511
4512 exp = 0;
4513 flags = SEC_NO_FLAGS;
4514
4515 if (strcmp (name, ".idata$2") == 0)
4516 {
4517 align = 0;
4518 }
4519 else if (strcmp (name, ".idata$3") == 0)
4520 {
4521 align = 0;
4522 }
4523 else if (strcmp (name, ".idata$4") == 0)
4524 {
4525 align = 2;
4526 }
4527 else if (strcmp (name, ".idata$5") == 0)
4528 {
4529 align = 2;
4530 }
4531 else if (strcmp (name, ".idata$6") == 0)
4532 {
4533 align = 1;
4534 }
4535 else
99a814a1
AM		 4536 /* Default alignment to 16 byte boundary. */
4537 align = 4;
252b5132
RH		 4538
4539 if (*input_line_pointer == ',')
4540 {
4541 ++input_line_pointer;
4542 SKIP_WHITESPACE ();
4543 if (*input_line_pointer != '"')
4544 exp = get_absolute_expression ();
4545 else
4546 {
4547 ++input_line_pointer;
4548 while (*input_line_pointer != '"'
4549 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4550 {
4551 switch (*input_line_pointer)
4552 {
4553 /* Section Contents */
4554 case 'a': /* unknown */
4555 as_bad (_("Unsupported section attribute -- 'a'"));
4556 break;
4557 case 'c': /* code section */
81d4177b 4558 flags |= SEC_CODE;
252b5132
RH		 4559 break;
4560 case 'd': /* section has initialized data */
4561 flags |= SEC_DATA;
4562 break;
4563 case 'u': /* section has uninitialized data */
4564 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4565 in winnt.h */
4566 flags |= SEC_ROM;
4567 break;
4568 case 'i': /* section contains directives (info) */
4569 /* FIXME: This is IMAGE_SCN_LNK_INFO
4570 in winnt.h */
4571 flags |= SEC_HAS_CONTENTS;
4572 break;
4573 case 'n': /* section can be discarded */
81d4177b 4574 flags &=~ SEC_LOAD;
252b5132
RH		 4575 break;
4576 case 'R': /* Remove section at link time */
4577 flags |= SEC_NEVER_LOAD;
4578 break;
4579
4580 /* Section Protection */
4581 case 'r': /* section is readable */
4582 flags |= IMAGE_SCN_MEM_READ;
4583 break;
4584 case 'w': /* section is writeable */
4585 flags |= IMAGE_SCN_MEM_WRITE;
4586 break;
4587 case 'x': /* section is executable */
4588 flags |= IMAGE_SCN_MEM_EXECUTE;
4589 break;
4590 case 's': /* section is sharable */
4591 flags |= IMAGE_SCN_MEM_SHARED;
4592 break;
4593
4594 /* Section Alignment */
4595 case '0': /* align to byte boundary */
4596 flags |= IMAGE_SCN_ALIGN_1BYTES;
4597 align = 0;
4598 break;
4599 case '1': /* align to halfword boundary */
4600 flags |= IMAGE_SCN_ALIGN_2BYTES;
4601 align = 1;
4602 break;
4603 case '2': /* align to word boundary */
4604 flags |= IMAGE_SCN_ALIGN_4BYTES;
4605 align = 2;
4606 break;
4607 case '3': /* align to doubleword boundary */
4608 flags |= IMAGE_SCN_ALIGN_8BYTES;
4609 align = 3;
4610 break;
4611 case '4': /* align to quadword boundary */
4612 flags |= IMAGE_SCN_ALIGN_16BYTES;
4613 align = 4;
4614 break;
4615 case '5': /* align to 32 byte boundary */
4616 flags |= IMAGE_SCN_ALIGN_32BYTES;
4617 align = 5;
4618 break;
4619 case '6': /* align to 64 byte boundary */
4620 flags |= IMAGE_SCN_ALIGN_64BYTES;
4621 align = 6;
4622 break;
4623
4624 default:
99a814a1
AM		 4625 as_bad (_("unknown section attribute '%c'"),
4626 *input_line_pointer);
252b5132
RH		 4627 break;
4628 }
4629 ++input_line_pointer;
4630 }
4631 if (*input_line_pointer == '"')
4632 ++input_line_pointer;
4633 }
4634 }
4635
4636 sec = subseg_new (name, (subsegT) exp);
4637
99a814a1 4638 ppc_set_current_section (sec);
252b5132
RH		 4639
4640 if (flags != SEC_NO_FLAGS)
4641 {
4642 if (! bfd_set_section_flags (stdoutput, sec, flags))
4643 as_bad (_("error setting flags for \"%s\": %s"),
4644 bfd_section_name (stdoutput, sec),
4645 bfd_errmsg (bfd_get_error ()));
4646 }
4647
99a814a1 4648 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4649
4650}
4651
4652static void
4653ppc_pe_function (ignore)
5480ccf3 4654 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4655{
4656 char *name;
4657 char endc;
4658 symbolS *ext_sym;
4659
4660 name = input_line_pointer;
4661 endc = get_symbol_end ();
4662
4663 ext_sym = symbol_find_or_make (name);
4664
4665 *input_line_pointer = endc;
4666
4667 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4668 SF_SET_FUNCTION (ext_sym);
4669 SF_SET_PROCESS (ext_sym);
4670 coff_add_linesym (ext_sym);
4671
4672 demand_empty_rest_of_line ();
4673}
4674
4675static void
4676ppc_pe_tocd (ignore)
5480ccf3 4677 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4678{
4679 if (tocdata_section == 0)
4680 {
4681 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4682 /* FIXME: section flags won't work. */
252b5132
RH		 4683 bfd_set_section_flags (stdoutput, tocdata_section,
4684 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4685 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4686
4687 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4688 }
4689 else
4690 {
4691 rdata_section = subseg_new (".tocd", 0);
4692 }
4693
99a814a1 4694 ppc_set_current_section (tocdata_section);
252b5132
RH		 4695
4696 demand_empty_rest_of_line ();
4697}
4698
4699/* Don't adjust TOC relocs to use the section symbol. */
4700
4701int
4702ppc_pe_fix_adjustable (fix)
4703 fixS *fix;
4704{
4705 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4706}
4707
4708#endif
4709\f
4710#ifdef OBJ_XCOFF
4711
4712/* XCOFF specific symbol and file handling. */
4713
4714/* Canonicalize the symbol name. We use the to force the suffix, if
4715 any, to use square brackets, and to be in upper case. */
4716
4717char *
4718ppc_canonicalize_symbol_name (name)
4719 char *name;
4720{
4721 char *s;
4722
4723 if (ppc_stab_symbol)
4724 return name;
4725
4726 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4727 ;
4728 if (*s != '\0')
4729 {
4730 char brac;
4731
4732 if (*s == '[')
4733 brac = ']';
4734 else
4735 {
4736 *s = '[';
4737 brac = '}';
4738 }
4739
4740 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4741 *s = TOUPPER (*s);
252b5132
RH		 4742
4743 if (*s == '\0' || s[1] != '\0')
4744 as_bad (_("bad symbol suffix"));
4745
4746 *s = ']';
4747 }
4748
4749 return name;
4750}
4751
4752/* Set the class of a symbol based on the suffix, if any. This is
4753 called whenever a new symbol is created. */
4754
4755void
4756ppc_symbol_new_hook (sym)
4757 symbolS *sym;
4758{
809ffe0d 4759 struct ppc_tc_sy *tc;
252b5132
RH		 4760 const char *s;
4761
809ffe0d
ILT		 4762 tc = symbol_get_tc (sym);
4763 tc->next = NULL;
4764 tc->output = 0;
4765 tc->class = -1;
4766 tc->real_name = NULL;
4767 tc->subseg = 0;
4768 tc->align = 0;
4769 tc->size = NULL;
4770 tc->within = NULL;
252b5132
RH		 4771
4772 if (ppc_stab_symbol)
4773 return;
4774
4775 s = strchr (S_GET_NAME (sym), '[');
4776 if (s == (const char *) NULL)
4777 {
4778 /* There is no suffix. */
4779 return;
4780 }
4781
4782 ++s;
4783
4784 switch (s[0])
4785 {
4786 case 'B':
4787 if (strcmp (s, "BS]") == 0)
809ffe0d 4788 tc->class = XMC_BS;
252b5132
RH		 4789 break;
4790 case 'D':
4791 if (strcmp (s, "DB]") == 0)
809ffe0d 4792 tc->class = XMC_DB;
252b5132 4793 else if (strcmp (s, "DS]") == 0)
809ffe0d 4794 tc->class = XMC_DS;
252b5132
RH		 4795 break;
4796 case 'G':
4797 if (strcmp (s, "GL]") == 0)
809ffe0d 4798 tc->class = XMC_GL;
252b5132
RH		 4799 break;
4800 case 'P':
4801 if (strcmp (s, "PR]") == 0)
809ffe0d 4802 tc->class = XMC_PR;
252b5132
RH		 4803 break;
4804 case 'R':
4805 if (strcmp (s, "RO]") == 0)
809ffe0d 4806 tc->class = XMC_RO;
252b5132 4807 else if (strcmp (s, "RW]") == 0)
809ffe0d 4808 tc->class = XMC_RW;
252b5132
RH		 4809 break;
4810 case 'S':
4811 if (strcmp (s, "SV]") == 0)
809ffe0d 4812 tc->class = XMC_SV;
252b5132
RH		 4813 break;
4814 case 'T':
4815 if (strcmp (s, "TC]") == 0)
809ffe0d 4816 tc->class = XMC_TC;
252b5132 4817 else if (strcmp (s, "TI]") == 0)
809ffe0d 4818 tc->class = XMC_TI;
252b5132 4819 else if (strcmp (s, "TB]") == 0)
809ffe0d 4820 tc->class = XMC_TB;
252b5132 4821 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4822 tc->class = XMC_TC0;
252b5132
RH		 4823 break;
4824 case 'U':
4825 if (strcmp (s, "UA]") == 0)
809ffe0d 4826 tc->class = XMC_UA;
252b5132 4827 else if (strcmp (s, "UC]") == 0)
809ffe0d 4828 tc->class = XMC_UC;
252b5132
RH		 4829 break;
4830 case 'X':
4831 if (strcmp (s, "XO]") == 0)
809ffe0d 4832 tc->class = XMC_XO;
252b5132
RH		 4833 break;
4834 }
4835
809ffe0d 4836 if (tc->class == -1)
252b5132
RH		 4837 as_bad (_("Unrecognized symbol suffix"));
4838}
4839
4840/* Set the class of a label based on where it is defined. This
4841 handles symbols without suffixes. Also, move the symbol so that it
4842 follows the csect symbol. */
4843
4844void
4845ppc_frob_label (sym)
4846 symbolS *sym;
4847{
4848 if (ppc_current_csect != (symbolS *) NULL)
4849 {
809ffe0d
ILT		 4850 if (symbol_get_tc (sym)->class == -1)
4851 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4852
4853 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4854 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4855 &symbol_rootP, &symbol_lastP);
4856 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4857 }
07a53e5c
RH		 4858
4859#ifdef OBJ_ELF
4860 dwarf2_emit_label (sym);
4861#endif
252b5132
RH		 4862}
4863
4864/* This variable is set by ppc_frob_symbol if any absolute symbols are
4865 seen. It tells ppc_adjust_symtab whether it needs to look through
4866 the symbols. */
4867
b34976b6 4868static bfd_boolean ppc_saw_abs;
252b5132
RH		 4869
4870/* Change the name of a symbol just before writing it out. Set the
4871 real name if the .rename pseudo-op was used. Otherwise, remove any
4872 class suffix. Return 1 if the symbol should not be included in the
4873 symbol table. */
4874
4875int
4876ppc_frob_symbol (sym)
4877 symbolS *sym;
4878{
4879 static symbolS *ppc_last_function;
4880 static symbolS *set_end;
4881
4882 /* Discard symbols that should not be included in the output symbol
4883 table. */
809ffe0d
ILT		 4884 if (! symbol_used_in_reloc_p (sym)
4885 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4886 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4887 && ! symbol_get_tc (sym)->output
252b5132
RH		 4888 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4889 return 1;
4890
a161fe53
AM		 4891 /* This one will disappear anyway. Don't make a csect sym for it. */
4892 if (sym == abs_section_sym)
4893 return 1;
4894
809ffe0d
ILT		 4895 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4896 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4897 else
4898 {
4899 const char *name;
4900 const char *s;
4901
4902 name = S_GET_NAME (sym);
4903 s = strchr (name, '[');
4904 if (s != (char *) NULL)
4905 {
4906 unsigned int len;
4907 char *snew;
4908
4909 len = s - name;
4910 snew = xmalloc (len + 1);
4911 memcpy (snew, name, len);
4912 snew[len] = '\0';
4913
4914 S_SET_NAME (sym, snew);
4915 }
4916 }
4917
4918 if (set_end != (symbolS *) NULL)
4919 {
4920 SA_SET_SYM_ENDNDX (set_end, sym);
4921 set_end = NULL;
4922 }
4923
4924 if (SF_GET_FUNCTION (sym))
4925 {
4926 if (ppc_last_function != (symbolS *) NULL)
4927 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4928 ppc_last_function = sym;
809ffe0d 4929 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4930 {
6386f3a7 4931 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4932 SA_SET_SYM_FSIZE (sym,
4933 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4934 }
4935 }
4936 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4937 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4938 {
4939 if (ppc_last_function == (symbolS *) NULL)
4940 as_bad (_(".ef with no preceding .function"));
4941 else
4942 {
4943 set_end = ppc_last_function;
4944 ppc_last_function = NULL;
4945
4946 /* We don't have a C_EFCN symbol, but we need to force the
4947 COFF backend to believe that it has seen one. */
4948 coff_last_function = NULL;
4949 }
4950 }
4951
670ec21d 4952 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4953 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4954 && S_GET_STORAGE_CLASS (sym) != C_FILE
4955 && S_GET_STORAGE_CLASS (sym) != C_FCN
4956 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4957 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4958 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4959 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4960 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4961 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4962 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4963
4964 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4965 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4966 {
4967 int i;
4968 union internal_auxent *a;
4969
4970 /* Create a csect aux. */
4971 i = S_GET_NUMBER_AUXILIARY (sym);
4972 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4973 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4974 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4975 {
4976 /* This is the TOC table. */
4977 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4978 a->x_csect.x_scnlen.l = 0;
4979 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4980 }
809ffe0d 4981 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4982 {
4983 /* This is a csect symbol. x_scnlen is the size of the
4984 csect. */
809ffe0d 4985 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4986 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4987 S_GET_SEGMENT (sym))
4988 - S_GET_VALUE (sym));
4989 else
4990 {
6386f3a7 4991 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4992 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4993 - S_GET_VALUE (sym));
4994 }
809ffe0d 4995 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4996 }
4997 else if (S_GET_SEGMENT (sym) == bss_section)
4998 {
4999 /* This is a common symbol. */
809ffe0d
ILT		 5000 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5001 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5002 if (S_IS_EXTERNAL (sym))
809ffe0d 5003 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5004 else
809ffe0d 5005 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5006 }
5007 else if (S_GET_SEGMENT (sym) == absolute_section)
5008 {
5009 /* This is an absolute symbol. The csect will be created by
99a814a1 5010 ppc_adjust_symtab. */
b34976b6 5011 ppc_saw_abs = TRUE;
252b5132 5012 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5013 if (symbol_get_tc (sym)->class == -1)
5014 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5015 }
5016 else if (! S_IS_DEFINED (sym))
5017 {
5018 /* This is an external symbol. */
5019 a->x_csect.x_scnlen.l = 0;
5020 a->x_csect.x_smtyp = XTY_ER;
5021 }
809ffe0d 5022 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5023 {
5024 symbolS *next;
5025
5026 /* This is a TOC definition. x_scnlen is the size of the
5027 TOC entry. */
5028 next = symbol_next (sym);
809ffe0d 5029 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5030 next = symbol_next (next);
5031 if (next == (symbolS *) NULL
809ffe0d 5032 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5033 {
5034 if (ppc_after_toc_frag == (fragS *) NULL)
5035 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5036 data_section)
5037 - S_GET_VALUE (sym));
5038 else
5039 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5040 - S_GET_VALUE (sym));
5041 }
5042 else
5043 {
6386f3a7 5044 resolve_symbol_value (next);
252b5132
RH		 5045 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5046 - S_GET_VALUE (sym));
5047 }
5048 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5049 }
5050 else
5051 {
5052 symbolS *csect;
5053
5054 /* This is a normal symbol definition. x_scnlen is the
5055 symbol index of the containing csect. */
5056 if (S_GET_SEGMENT (sym) == text_section)
5057 csect = ppc_text_csects;
5058 else if (S_GET_SEGMENT (sym) == data_section)
5059 csect = ppc_data_csects;
5060 else
5061 abort ();
5062
5063 /* Skip the initial dummy symbol. */
809ffe0d 5064 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5065
5066 if (csect == (symbolS *) NULL)
5067 {
5068 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5069 a->x_csect.x_scnlen.l = 0;
5070 }
5071 else
5072 {
809ffe0d 5073 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5074 {
6386f3a7 5075 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5076 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5077 > S_GET_VALUE (sym))
252b5132 5078 break;
809ffe0d 5079 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5080 }
5081
809ffe0d
ILT		 5082 a->x_csect.x_scnlen.p =
5083 coffsymbol (symbol_get_bfdsym (csect))->native;
5084 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5085 1;
252b5132
RH		 5086 }
5087 a->x_csect.x_smtyp = XTY_LD;
5088 }
81d4177b 5089
252b5132
RH		 5090 a->x_csect.x_parmhash = 0;
5091 a->x_csect.x_snhash = 0;
809ffe0d 5092 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5093 a->x_csect.x_smclas = XMC_PR;
5094 else
809ffe0d 5095 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5096 a->x_csect.x_stab = 0;
5097 a->x_csect.x_snstab = 0;
5098
5099 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5100 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5101 }
5102 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5103 {
5104 /* We want the value to be the symbol index of the referenced
5105 csect symbol. BFD will do that for us if we set the right
5106 flags. */
b782de16
AM		 5107 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5108 combined_entry_type *c = coffsymbol (bsym)->native;
5109
5110 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5111 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5112 }
5113 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5114 {
5115 symbolS *block;
5116 symbolS *csect;
5117
5118 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5119 block = symbol_get_tc (sym)->within;
5120 csect = symbol_get_tc (block)->within;
6386f3a7 5121 resolve_symbol_value (csect);
252b5132
RH		 5122 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5123 }
5124 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5125 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5126 {
5127 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5128 BFD will do that for us if we set the right flags. We have
5129 already set the value correctly. */
809ffe0d 5130 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5131 }
5132
5133 return 0;
5134}
5135
5136/* Adjust the symbol table. This creates csect symbols for all
5137 absolute symbols. */
5138
5139void
5140ppc_adjust_symtab ()
5141{
5142 symbolS *sym;
5143
5144 if (! ppc_saw_abs)
5145 return;
5146
5147 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5148 {
5149 symbolS *csect;
5150 int i;
5151 union internal_auxent *a;
5152
5153 if (S_GET_SEGMENT (sym) != absolute_section)
5154 continue;
5155
5156 csect = symbol_create (".abs[XO]", absolute_section,
5157 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5158 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5159 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5160 i = S_GET_NUMBER_AUXILIARY (csect);
5161 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5162 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5163 a->x_csect.x_scnlen.l = 0;
5164 a->x_csect.x_smtyp = XTY_SD;
5165 a->x_csect.x_parmhash = 0;
5166 a->x_csect.x_snhash = 0;
5167 a->x_csect.x_smclas = XMC_XO;
5168 a->x_csect.x_stab = 0;
5169 a->x_csect.x_snstab = 0;
5170
5171 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5172
5173 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5174 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5175 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5176 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5177 }
5178
b34976b6 5179 ppc_saw_abs = FALSE;
252b5132
RH		 5180}
5181
5182/* Set the VMA for a section. This is called on all the sections in
5183 turn. */
5184
5185void
5186ppc_frob_section (sec)
5187 asection *sec;
5188{
931e13a6 5189 static bfd_vma vma = 0;
252b5132 5190
931e13a6 5191 vma = md_section_align (sec, vma);
252b5132
RH		 5192 bfd_set_section_vma (stdoutput, sec, vma);
5193 vma += bfd_section_size (stdoutput, sec);
5194}
5195
5196#endif /* OBJ_XCOFF */
5197\f
5198/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5199 of type TYPE, and store the appropriate bytes in *LITP. The number
5200 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5201 returned, or NULL on OK. */
5202
5203char *
5204md_atof (type, litp, sizep)
5205 int type;
5206 char *litp;
5207 int *sizep;
5208{
5209 int prec;
5210 LITTLENUM_TYPE words[4];
5211 char *t;
5212 int i;
5213
5214 switch (type)
5215 {
5216 case 'f':
5217 prec = 2;
5218 break;
5219
5220 case 'd':
5221 prec = 4;
5222 break;
5223
5224 default:
5225 *sizep = 0;
5226 return _("bad call to md_atof");
5227 }
5228
5229 t = atof_ieee (input_line_pointer, type, words);
5230 if (t)
5231 input_line_pointer = t;
5232
5233 *sizep = prec * 2;
5234
5235 if (target_big_endian)
5236 {
5237 for (i = 0; i < prec; i++)
5238 {
5239 md_number_to_chars (litp, (valueT) words[i], 2);
5240 litp += 2;
5241 }
5242 }
5243 else
5244 {
5245 for (i = prec - 1; i >= 0; i--)
5246 {
5247 md_number_to_chars (litp, (valueT) words[i], 2);
5248 litp += 2;
5249 }
5250 }
81d4177b 5251
252b5132
RH		 5252 return NULL;
5253}
5254
5255/* Write a value out to the object file, using the appropriate
5256 endianness. */
5257
5258void
5259md_number_to_chars (buf, val, n)
5260 char *buf;
5261 valueT val;
5262 int n;
5263{
5264 if (target_big_endian)
5265 number_to_chars_bigendian (buf, val, n);
5266 else
5267 number_to_chars_littleendian (buf, val, n);
5268}
5269
5270/* Align a section (I don't know why this is machine dependent). */
5271
5272valueT
3aeeedbb 5273md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5274{
3aeeedbb
AM		 5275#ifdef OBJ_ELF
5276 return addr;
5277#else
252b5132
RH		 5278 int align = bfd_get_section_alignment (stdoutput, seg);
5279
5280 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5281#endif
252b5132
RH		 5282}
5283
5284/* We don't have any form of relaxing. */
5285
5286int
5287md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5288 fragS *fragp ATTRIBUTE_UNUSED;
5289 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5290{
5291 abort ();
5292 return 0;
5293}
5294
5295/* Convert a machine dependent frag. We never generate these. */
5296
5297void
5298md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5299 bfd *abfd ATTRIBUTE_UNUSED;
5300 asection *sec ATTRIBUTE_UNUSED;
5301 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5302{
5303 abort ();
5304}
5305
5306/* We have no need to default values of symbols. */
5307
252b5132
RH		 5308symbolS *
5309md_undefined_symbol (name)
92161534 5310 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5311{
5312 return 0;
5313}
5314\f
5315/* Functions concerning relocs. */
5316
5317/* The location from which a PC relative jump should be calculated,
5318 given a PC relative reloc. */
5319
5320long
5321md_pcrel_from_section (fixp, sec)
5322 fixS *fixp;
92161534 5323 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5324{
5325 return fixp->fx_frag->fr_address + fixp->fx_where;
5326}
5327
5328#ifdef OBJ_XCOFF
5329
5330/* This is called to see whether a fixup should be adjusted to use a
5331 section symbol. We take the opportunity to change a fixup against
5332 a symbol in the TOC subsegment into a reloc against the
5333 corresponding .tc symbol. */
5334
5335int
5336ppc_fix_adjustable (fix)
5337 fixS *fix;
5338{
b782de16
AM		 5339 valueT val = resolve_symbol_value (fix->fx_addsy);
5340 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5341 TC_SYMFIELD_TYPE *tc;
5342
5343 if (symseg == absolute_section)
5344 return 0;
252b5132 5345
252b5132 5346 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5347 && fix->fx_addsy != ppc_toc_csect
b782de16 5348 && symseg == data_section
252b5132
RH		 5349 && val >= ppc_toc_frag->fr_address
5350 && (ppc_after_toc_frag == (fragS *) NULL
5351 || val < ppc_after_toc_frag->fr_address))
5352 {
5353 symbolS *sy;
5354
5355 for (sy = symbol_next (ppc_toc_csect);
5356 sy != (symbolS *) NULL;
5357 sy = symbol_next (sy))
5358 {
b782de16
AM		 5359 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5360
5361 if (sy_tc->class == XMC_TC0)
252b5132 5362 continue;
b782de16 5363 if (sy_tc->class != XMC_TC)
252b5132 5364 break;
b782de16 5365 if (val == resolve_symbol_value (sy))
252b5132
RH		 5366 {
5367 fix->fx_addsy = sy;
5368 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5369 return 0;
5370 }
5371 }
5372
5373 as_bad_where (fix->fx_file, fix->fx_line,
5374 _("symbol in .toc does not match any .tc"));
5375 }
5376
5377 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5378 tc = symbol_get_tc (fix->fx_addsy);
5379 if (tc->subseg == 0
5380 && tc->class != XMC_TC0
5381 && tc->class != XMC_TC
5382 && symseg != bss_section
252b5132 5383 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5384 && (symseg != data_section
252b5132
RH		 5385 || ppc_toc_csect == NULL
5386 || val < ppc_toc_frag->fr_address
5387 || (ppc_after_toc_frag != NULL
5388 && val >= ppc_after_toc_frag->fr_address)))
5389 {
5390 symbolS *csect;
b782de16 5391 symbolS *next_csect;
252b5132 5392
b782de16 5393 if (symseg == text_section)
252b5132 5394 csect = ppc_text_csects;
b782de16 5395 else if (symseg == data_section)
252b5132
RH		 5396 csect = ppc_data_csects;
5397 else
5398 abort ();
5399
5400 /* Skip the initial dummy symbol. */
809ffe0d 5401 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5402
5403 if (csect != (symbolS *) NULL)
5404 {
b782de16
AM		 5405 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5406 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5407 {
5408 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5409 have to look through the full symbol table to see
5410 whether this is the csect we want. Note that we will
5411 only get here if the csect has zero length. */
b782de16
AM		 5412 if (symbol_get_frag (csect)->fr_address == val
5413 && S_GET_VALUE (csect) == val)
252b5132
RH		 5414 {
5415 symbolS *scan;
5416
809ffe0d 5417 for (scan = symbol_next (csect);
252b5132 5418 scan != NULL;
809ffe0d 5419 scan = symbol_next (scan))
252b5132 5420 {
809ffe0d 5421 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5422 break;
5423 if (scan == fix->fx_addsy)
5424 break;
5425 }
5426
5427 /* If we found the symbol before the next csect
99a814a1 5428 symbol, then this is the csect we want. */
252b5132
RH		 5429 if (scan == fix->fx_addsy)
5430 break;
5431 }
5432
b782de16 5433 csect = next_csect;
252b5132
RH		 5434 }
5435
b782de16 5436 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5437 fix->fx_addsy = csect;
5438 }
b782de16 5439 return 0;
252b5132
RH		 5440 }
5441
5442 /* Adjust a reloc against a .lcomm symbol to be against the base
5443 .lcomm. */
b782de16 5444 if (symseg == bss_section
252b5132
RH		 5445 && ! S_IS_EXTERNAL (fix->fx_addsy))
5446 {
b782de16
AM		 5447 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5448
5449 fix->fx_offset += val - resolve_symbol_value (sy);
5450 fix->fx_addsy = sy;
252b5132
RH		 5451 }
5452
5453 return 0;
5454}
5455
5456/* A reloc from one csect to another must be kept. The assembler
5457 will, of course, keep relocs between sections, and it will keep
5458 absolute relocs, but we need to force it to keep PC relative relocs
5459 between two csects in the same section. */
5460
5461int
5462ppc_force_relocation (fix)
5463 fixS *fix;
5464{
5465 /* At this point fix->fx_addsy should already have been converted to
5466 a csect symbol. If the csect does not include the fragment, then
5467 we need to force the relocation. */
5468 if (fix->fx_pcrel
5469 && fix->fx_addsy != NULL
809ffe0d
ILT		 5470 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5471 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5472 > fix->fx_frag->fr_address)
5473 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5474 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5475 <= fix->fx_frag->fr_address))))
5476 return 1;
5477
ae6063d4 5478 return generic_force_reloc (fix);
252b5132
RH		 5479}
5480
5481#endif /* OBJ_XCOFF */
5482
0baf16f2 5483#ifdef OBJ_ELF
a161fe53
AM		 5484/* If this function returns non-zero, it guarantees that a relocation
5485 will be emitted for a fixup. */
5486
5487int
5488ppc_force_relocation (fix)
5489 fixS *fix;
5490{
5491 /* Branch prediction relocations must force a relocation, as must
5492 the vtable description relocs. */
5493 switch (fix->fx_r_type)
5494 {
5495 case BFD_RELOC_PPC_B16_BRTAKEN:
5496 case BFD_RELOC_PPC_B16_BRNTAKEN:
5497 case BFD_RELOC_PPC_BA16_BRTAKEN:
5498 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5499 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5500 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5501 return 1;
5502 default:
5503 break;
5504 }
5505
cdba85ec
AM		 5506 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5507 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5508 return 1;
5509
ae6063d4 5510 return generic_force_reloc (fix);
a161fe53
AM		 5511}
5512
0baf16f2
AM		 5513int
5514ppc_fix_adjustable (fix)
5515 fixS *fix;
252b5132 5516{
0baf16f2
AM		 5517 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5518 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5519 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5520 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5521 && fix->fx_r_type != BFD_RELOC_GPREL16
5522 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5523 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5524 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5525 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5526}
0baf16f2 5527#endif
252b5132 5528
3aeeedbb
AM		 5529/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5530 rs_align_code frag. */
5531
5532void
5533ppc_handle_align (struct frag *fragP)
5534{
5535 valueT count = (fragP->fr_next->fr_address
5536 - (fragP->fr_address + fragP->fr_fix));
5537
5538 if (count != 0 && (count & 3) == 0)
5539 {
5540 char *dest = fragP->fr_literal + fragP->fr_fix;
5541
5542 fragP->fr_var = 4;
5543 md_number_to_chars (dest, 0x60000000, 4);
5544
5545 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5546 {
5547 /* For power6, we want the last nop to be a group terminating
5548 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5549 immediately after this one, with its address set to the last
5550 nop location. This will automatically reduce the number of
5551 nops in the current frag by one. */
5552 if (count > 4)
5553 {
5554 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5555
5556 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5557 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5558 group_nop->fr_fix = 0;
5559 group_nop->fr_offset = 1;
5560 group_nop->fr_type = rs_fill;
5561 fragP->fr_next = group_nop;
5562 dest = group_nop->fr_literal;
5563 }
5564
5565 md_number_to_chars (dest, 0x60210000, 4);
5566 }
5567 }
5568}
5569
252b5132
RH		 5570/* Apply a fixup to the object code. This is called for all the
5571 fixups we generated by the call to fix_new_exp, above. In the call
5572 above we used a reloc code which was the largest legal reloc code
5573 plus the operand index. Here we undo that to recover the operand
5574 index. At this point all symbol values should be fully resolved,
5575 and we attempt to completely resolve the reloc. If we can not do
5576 that, we determine the correct reloc code and put it back in the
5577 fixup. */
5578
94f592af 5579void
55cf6793 5580md_apply_fix (fixP, valP, seg)
94f592af
NC		 5581 fixS *fixP;
5582 valueT * valP;
0baf16f2 5583 segT seg ATTRIBUTE_UNUSED;
252b5132 5584{
94f592af 5585 valueT value = * valP;
252b5132
RH		 5586
5587#ifdef OBJ_ELF
94f592af 5588 if (fixP->fx_addsy != NULL)
252b5132 5589 {
a161fe53 5590 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5591 if (fixP->fx_pcrel)
5592 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5593 }
5594 else
94f592af 5595 fixP->fx_done = 1;
252b5132 5596#else
a161fe53 5597 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5598 the symbol values. If we are doing this relocation the code in
5599 write.c is going to call bfd_install_relocation, which is also
5600 going to use the symbol value. That means that if the reloc is
5601 fully resolved we want to use *valP since bfd_install_relocation is
5602 not being used.
252b5132 5603 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5604 *valP, and must use fx_offset instead. However, if the reloc
5605 is PC relative, we do want to use *valP since it includes the
252b5132 5606 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5607 if (fixP->fx_addsy == (symbolS *) NULL)
5608 fixP->fx_done = 1;
5609
5610 else if (fixP->fx_pcrel)
5611 ;
5612
252b5132 5613 else
a161fe53
AM		 5614 value = fixP->fx_offset;
5615#endif
5616
5617 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5618 {
a161fe53
AM		 5619 /* We can't actually support subtracting a symbol. */
5620 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5621 }
252b5132 5622
94f592af 5623 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5624 {
5625 int opindex;
5626 const struct powerpc_operand *operand;
5627 char *where;
5628 unsigned long insn;
5629
94f592af 5630 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5631
5632 operand = &powerpc_operands[opindex];
5633
5634#ifdef OBJ_XCOFF
0baf16f2
AM		 5635 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5636 does not generate a reloc. It uses the offset of `sym' within its
5637 csect. Other usages, such as `.long sym', generate relocs. This
5638 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5639 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5640 && operand->bits == 16
5641 && operand->shift == 0
2b3c4602 5642 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5643 && fixP->fx_addsy != NULL
5644 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5645 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5646 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5647 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5648 {
94f592af
NC		 5649 value = fixP->fx_offset;
5650 fixP->fx_done = 1;
252b5132
RH		 5651 }
5652#endif
5653
5654 /* Fetch the instruction, insert the fully resolved operand
5655 value, and stuff the instruction back again. */
94f592af 5656 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5657 if (target_big_endian)
5658 insn = bfd_getb32 ((unsigned char *) where);
5659 else
5660 insn = bfd_getl32 ((unsigned char *) where);
5661 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5662 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5663 if (target_big_endian)
5664 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5665 else
5666 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5667
94f592af
NC		 5668 if (fixP->fx_done)
5669 /* Nothing else to do here. */
5670 return;
252b5132 5671
94f592af 5672 assert (fixP->fx_addsy != NULL);
0baf16f2 5673
252b5132
RH		 5674 /* Determine a BFD reloc value based on the operand information.
5675 We are only prepared to turn a few of the operands into
0baf16f2 5676 relocs. */
11b37b7b
AM		 5677 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5678 && operand->bits == 26
5679 && operand->shift == 0)
94f592af 5680 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5681 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5682 && operand->bits == 16
5683 && operand->shift == 0)
95210096
AM		 5684 {
5685 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5686#ifdef OBJ_XCOFF
5687 fixP->fx_size = 2;
5688 if (target_big_endian)
5689 fixP->fx_where += 2;
5690#endif
5691 }
11b37b7b
AM		 5692 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5693 && operand->bits == 26
5694 && operand->shift == 0)
94f592af 5695 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5696 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5697 && operand->bits == 16
5698 && operand->shift == 0)
95210096
AM		 5699 {
5700 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5701#ifdef OBJ_XCOFF
5702 fixP->fx_size = 2;
5703 if (target_big_endian)
5704 fixP->fx_where += 2;
5705#endif
5706 }
0baf16f2 5707#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5708 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5709 && operand->bits == 16
a7fc733f 5710 && operand->shift == 0)
11b37b7b 5711 {
a7fc733f
AM		 5712 if (ppc_is_toc_sym (fixP->fx_addsy))
5713 {
5714 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5715#ifdef OBJ_ELF
a7fc733f
AM		 5716 if (ppc_obj64
5717 && (operand->flags & PPC_OPERAND_DS) != 0)
5718 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5719#endif
5720 }
5721 else
5722 {
5723 fixP->fx_r_type = BFD_RELOC_16;
5724#ifdef OBJ_ELF
5725 if (ppc_obj64
5726 && (operand->flags & PPC_OPERAND_DS) != 0)
5727 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5728#endif
a7fc733f 5729 }
94f592af 5730 fixP->fx_size = 2;
11b37b7b 5731 if (target_big_endian)
94f592af 5732 fixP->fx_where += 2;
11b37b7b 5733 }
0baf16f2 5734#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5735 else
252b5132
RH		 5736 {
5737 char *sfile;
5738 unsigned int sline;
5739
5740 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5741 symbol. */
94f592af
NC		 5742 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5743 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5744 _("unresolved expression that must be resolved"));
5745 else
94f592af 5746 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5747 _("unsupported relocation against %s"),
94f592af
NC		 5748 S_GET_NAME (fixP->fx_addsy));
5749 fixP->fx_done = 1;
5750 return;
252b5132
RH		 5751 }
5752 }
5753 else
5754 {
5755#ifdef OBJ_ELF
94f592af 5756 ppc_elf_validate_fix (fixP, seg);
252b5132 5757#endif
94f592af 5758 switch (fixP->fx_r_type)
252b5132 5759 {
252b5132 5760 case BFD_RELOC_CTOR:
2b3c4602 5761 if (ppc_obj64)
9c7977b3
AM		 5762 goto ctor64;
5763 /* fall through */
5764
0baf16f2 5765 case BFD_RELOC_32:
94f592af
NC		 5766 if (fixP->fx_pcrel)
5767 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5768 /* fall through */
252b5132
RH		 5769
5770 case BFD_RELOC_RVA:
5771 case BFD_RELOC_32_PCREL:
252b5132 5772 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5773 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5774 value, 4);
5775 break;
5776
7f6d05e8 5777 case BFD_RELOC_64:
9c7977b3 5778 ctor64:
94f592af
NC		 5779 if (fixP->fx_pcrel)
5780 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5781 /* fall through */
0baf16f2 5782
7f6d05e8 5783 case BFD_RELOC_64_PCREL:
94f592af 5784 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5785 value, 8);
81d4177b 5786 break;
0baf16f2 5787
252b5132
RH		 5788 case BFD_RELOC_GPREL16:
5789 case BFD_RELOC_16_GOT_PCREL:
5790 case BFD_RELOC_16_GOTOFF:
5791 case BFD_RELOC_LO16_GOTOFF:
5792 case BFD_RELOC_HI16_GOTOFF:
5793 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5794 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5795 case BFD_RELOC_LO16_BASEREL:
5796 case BFD_RELOC_HI16_BASEREL:
5797 case BFD_RELOC_HI16_S_BASEREL:
5798 case BFD_RELOC_PPC_EMB_NADDR16:
5799 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5800 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5801 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5802 case BFD_RELOC_PPC_EMB_SDAI16:
5803 case BFD_RELOC_PPC_EMB_SDA2REL:
5804 case BFD_RELOC_PPC_EMB_SDA2I16:
5805 case BFD_RELOC_PPC_EMB_RELSEC16:
5806 case BFD_RELOC_PPC_EMB_RELST_LO:
5807 case BFD_RELOC_PPC_EMB_RELST_HI:
5808 case BFD_RELOC_PPC_EMB_RELST_HA:
5809 case BFD_RELOC_PPC_EMB_RELSDA:
5810 case BFD_RELOC_PPC_TOC16:
0baf16f2 5811#ifdef OBJ_ELF
0baf16f2
AM		 5812 case BFD_RELOC_PPC64_TOC16_LO:
5813 case BFD_RELOC_PPC64_TOC16_HI:
5814 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5815#endif
94f592af 5816 if (fixP->fx_pcrel)
252b5132 5817 {
94f592af
NC		 5818 if (fixP->fx_addsy != NULL)
5819 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5820 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5821 bfd_get_reloc_code_name (fixP->fx_r_type),
5822 S_GET_NAME (fixP->fx_addsy));
252b5132 5823 else
94f592af 5824 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5825 _("cannot emit PC relative %s relocation"),
94f592af 5826 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5827 }
5828
94f592af 5829 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5830 value, 2);
5831 break;
5832
3c9d25f4
AM		 5833 case BFD_RELOC_16:
5834 if (fixP->fx_pcrel)
5835 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5836 /* fall through */
5837
5838 case BFD_RELOC_16_PCREL:
5839 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5840 value, 2);
5841 break;
5842
5843 case BFD_RELOC_LO16:
5844 if (fixP->fx_pcrel)
5845 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5846 /* fall through */
5847
5848 case BFD_RELOC_LO16_PCREL:
5849 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5850 value, 2);
5851 break;
5852
252b5132
RH		 5853 /* This case happens when you write, for example,
5854 lis %r3,(L1-L2)@ha
5855 where L1 and L2 are defined later. */
5856 case BFD_RELOC_HI16:
94f592af 5857 if (fixP->fx_pcrel)
3c9d25f4
AM		 5858 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5859 /* fall through */
5860
5861 case BFD_RELOC_HI16_PCREL:
94f592af 5862 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5863 PPC_HI (value), 2);
252b5132 5864 break;
0baf16f2 5865
252b5132 5866 case BFD_RELOC_HI16_S:
94f592af 5867 if (fixP->fx_pcrel)
3c9d25f4
AM		 5868 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5869 /* fall through */
5870
5871 case BFD_RELOC_HI16_S_PCREL:
94f592af 5872 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5873 PPC_HA (value), 2);
5874 break;
5875
5876#ifdef OBJ_ELF
0baf16f2 5877 case BFD_RELOC_PPC64_HIGHER:
94f592af 5878 if (fixP->fx_pcrel)
0baf16f2 5879 abort ();
94f592af 5880 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5881 PPC_HIGHER (value), 2);
252b5132
RH		 5882 break;
5883
0baf16f2 5884 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5885 if (fixP->fx_pcrel)
0baf16f2 5886 abort ();
94f592af 5887 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5888 PPC_HIGHERA (value), 2);
5889 break;
5890
5891 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5892 if (fixP->fx_pcrel)
0baf16f2 5893 abort ();
94f592af 5894 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5895 PPC_HIGHEST (value), 2);
5896 break;
5897
5898 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5899 if (fixP->fx_pcrel)
0baf16f2 5900 abort ();
94f592af 5901 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5902 PPC_HIGHESTA (value), 2);
5903 break;
5904
5905 case BFD_RELOC_PPC64_ADDR16_DS:
5906 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5907 case BFD_RELOC_PPC64_GOT16_DS:
5908 case BFD_RELOC_PPC64_GOT16_LO_DS:
5909 case BFD_RELOC_PPC64_PLT16_LO_DS:
5910 case BFD_RELOC_PPC64_SECTOFF_DS:
5911 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5912 case BFD_RELOC_PPC64_TOC16_DS:
5913 case BFD_RELOC_PPC64_TOC16_LO_DS:
5914 case BFD_RELOC_PPC64_PLTGOT16_DS:
5915 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5916 if (fixP->fx_pcrel)
0baf16f2
AM		 5917 abort ();
5918 {
2132e3a3 5919 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5920 unsigned long val, mask;
0baf16f2
AM		 5921
5922 if (target_big_endian)
adadcc0c 5923 val = bfd_getb32 (where - 2);
0baf16f2 5924 else
adadcc0c
AM		 5925 val = bfd_getl32 (where);
5926 mask = 0xfffc;
5927 /* lq insns reserve the four lsbs. */
5928 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5929 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5930 mask = 0xfff0;
5931 val |= value & mask;
0baf16f2
AM		 5932 if (target_big_endian)
5933 bfd_putb16 ((bfd_vma) val, where);
5934 else
5935 bfd_putl16 ((bfd_vma) val, where);
5936 }
5937 break;
cdba85ec 5938
ba0b2174
AM		 5939 case BFD_RELOC_PPC_B16_BRTAKEN:
5940 case BFD_RELOC_PPC_B16_BRNTAKEN:
5941 case BFD_RELOC_PPC_BA16_BRTAKEN:
5942 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5943 break;
5944
cdba85ec 5945 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5946 break;
5947
cdba85ec
AM		 5948 case BFD_RELOC_PPC_DTPMOD:
5949 case BFD_RELOC_PPC_TPREL16:
5950 case BFD_RELOC_PPC_TPREL16_LO:
5951 case BFD_RELOC_PPC_TPREL16_HI:
5952 case BFD_RELOC_PPC_TPREL16_HA:
5953 case BFD_RELOC_PPC_TPREL:
5954 case BFD_RELOC_PPC_DTPREL16:
5955 case BFD_RELOC_PPC_DTPREL16_LO:
5956 case BFD_RELOC_PPC_DTPREL16_HI:
5957 case BFD_RELOC_PPC_DTPREL16_HA:
5958 case BFD_RELOC_PPC_DTPREL:
5959 case BFD_RELOC_PPC_GOT_TLSGD16:
5960 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5961 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5962 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5963 case BFD_RELOC_PPC_GOT_TLSLD16:
5964 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5965 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5966 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5967 case BFD_RELOC_PPC_GOT_TPREL16:
5968 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5969 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5970 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5971 case BFD_RELOC_PPC_GOT_DTPREL16:
5972 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5973 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5974 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5975 case BFD_RELOC_PPC64_TPREL16_DS:
5976 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5977 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5978 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5979 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5980 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5981 case BFD_RELOC_PPC64_DTPREL16_DS:
5982 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5983 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5984 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5985 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5986 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5987 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5988 break;
0baf16f2 5989#endif
252b5132 5990 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5991 bytes, rather than 2, so offset it here appropriately. */
252b5132 5992 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5993 if (fixP->fx_pcrel)
252b5132
RH		 5994 abort ();
5995
94f592af 5996 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5997 + ((target_big_endian) ? 2 : 0),
5998 value, 2);
5999 break;
6000
6001 case BFD_RELOC_8:
94f592af 6002 if (fixP->fx_pcrel)
31a91399
NC		 6003 {
6004 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6005 ".byte <undefined_symbol> - ." */
31a91399
NC		 6006 if (fixP->fx_addsy)
6007 as_bad (_("Unable to handle reference to symbol %s"),
6008 S_GET_NAME (fixP->fx_addsy));
6009 else
6010 as_bad (_("Unable to resolve expression"));
6011 fixP->fx_done = 1;
6012 }
6013 else
6014 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6015 value, 1);
252b5132
RH		 6016 break;
6017
6018 case BFD_RELOC_24_PLT_PCREL:
6019 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6020 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6021 abort ();
6022
94f592af 6023 if (fixP->fx_done)
99a814a1
AM		 6024 {
6025 char *where;
6026 unsigned long insn;
6027
6028 /* Fetch the instruction, insert the fully resolved operand
6029 value, and stuff the instruction back again. */
94f592af 6030 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6031 if (target_big_endian)
6032 insn = bfd_getb32 ((unsigned char *) where);
6033 else
6034 insn = bfd_getl32 ((unsigned char *) where);
6035 if ((value & 3) != 0)
94f592af 6036 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6037 _("must branch to an address a multiple of 4"));
6038 if ((offsetT) value < -0x40000000
6039 || (offsetT) value >= 0x40000000)
94f592af 6040 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6041 _("@local or @plt branch destination is too far away, %ld bytes"),
6042 (long) value);
6043 insn = insn | (value & 0x03fffffc);
6044 if (target_big_endian)
6045 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6046 else
6047 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6048 }
252b5132
RH		 6049 break;
6050
6051 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6052 fixP->fx_done = 0;
6053 if (fixP->fx_addsy
6054 && !S_IS_DEFINED (fixP->fx_addsy)
6055 && !S_IS_WEAK (fixP->fx_addsy))
6056 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6057 break;
6058
6059 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6060 fixP->fx_done = 0;
252b5132
RH		 6061 break;
6062
0baf16f2 6063#ifdef OBJ_ELF
0baf16f2
AM		 6064 /* Generated by reference to `sym@tocbase'. The sym is
6065 ignored by the linker. */
6066 case BFD_RELOC_PPC64_TOC:
94f592af 6067 fixP->fx_done = 0;
0baf16f2 6068 break;
0baf16f2 6069#endif
252b5132 6070 default:
bc805888 6071 fprintf (stderr,
94f592af 6072 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6073 fflush (stderr);
252b5132
RH		 6074 abort ();
6075 }
6076 }
6077
6078#ifdef OBJ_ELF
94f592af 6079 fixP->fx_addnumber = value;
4e6935a6
AM		 6080
6081 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6082 from the section contents. If we are going to be emitting a reloc
6083 then the section contents are immaterial, so don't warn if they
6084 happen to overflow. Leave such warnings to ld. */
6085 if (!fixP->fx_done)
6086 fixP->fx_no_overflow = 1;
252b5132 6087#else
94f592af
NC		 6088 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6089 fixP->fx_addnumber = 0;
252b5132
RH		 6090 else
6091 {
6092#ifdef TE_PE
94f592af 6093 fixP->fx_addnumber = 0;
252b5132
RH		 6094#else
6095 /* We want to use the offset within the data segment of the
6096 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6097 fixP->fx_addnumber =
6098 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6099#endif
6100 }
6101#endif
252b5132
RH		 6102}
6103
6104/* Generate a reloc for a fixup. */
6105
6106arelent *
6107tc_gen_reloc (seg, fixp)
92161534 6108 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6109 fixS *fixp;
6110{
6111 arelent *reloc;
6112
6113 reloc = (arelent *) xmalloc (sizeof (arelent));
6114
49309057
ILT		 6115 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6116 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6117 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6118 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6119 if (reloc->howto == (reloc_howto_type *) NULL)
6120 {
6121 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6122 _("reloc %d not supported by object file format"),
6123 (int) fixp->fx_r_type);
252b5132
RH		 6124 return NULL;
6125 }
6126 reloc->addend = fixp->fx_addnumber;
6127
6128 return reloc;
6129}
75e21f08
JJ		 6130
6131void
6132ppc_cfi_frame_initial_instructions ()
6133{
6134 cfi_add_CFA_def_cfa (1, 0);
6135}
6136
6137int
1df69f4f 6138tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6139{
6140 unsigned int regnum = -1;
6141 unsigned int i;
6142 const char *p;
6143 char *q;
6144 static struct { char *name; int dw2regnum; } regnames[] =
6145 {
6146 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6147 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6148 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6149 { "spe_acc", 111 }, { "spefscr", 112 }
6150 };
6151
6152 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6153 if (strcmp (regnames[i].name, regname) == 0)
6154 return regnames[i].dw2regnum;
6155
6156 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6157 {
6158 p = regname + 1 + (regname[1] == '.');
6159 regnum = strtoul (p, &q, 10);
6160 if (p == q || *q || regnum >= 32)
6161 return -1;
6162 if (regname[0] == 'f')
b7d7dc63 6163 regnum += 32;
75e21f08 6164 else if (regname[0] == 'v')
b7d7dc63 6165 regnum += 77;
75e21f08
JJ		 6166 }
6167 else if (regname[0] == 'c' && regname[1] == 'r')
6168 {
6169 p = regname + 2 + (regname[2] == '.');
6170 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6171 return -1;
75e21f08
JJ		 6172 regnum = p[0] - '0' + 68;
6173 }
6174 return regnum;
6175}
GDB Binutils - Deliverables
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