Commit | Line | Data |
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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
b7d7dc63 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
aea77599 | 3 | 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
cc643b88 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Written by Ian Lance Taylor, Cygnus Support. |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
21 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
22 | 02110-1301, USA. */ | |
252b5132 | 23 | |
252b5132 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
252b5132 | 26 | #include "subsegs.h" |
75e21f08 | 27 | #include "dw2gencfi.h" |
252b5132 RH |
28 | #include "opcode/ppc.h" |
29 | ||
30 | #ifdef OBJ_ELF | |
31 | #include "elf/ppc.h" | |
5d6f4f16 | 32 | #include "dwarf2dbg.h" |
252b5132 RH |
33 | #endif |
34 | ||
35 | #ifdef TE_PE | |
36 | #include "coff/pe.h" | |
37 | #endif | |
38 | ||
85645aed TG |
39 | #ifdef OBJ_XCOFF |
40 | #include "coff/xcoff.h" | |
41 | #include "libxcoff.h" | |
42 | #endif | |
43 | ||
252b5132 RH |
44 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ |
45 | ||
46 | /* Tell the main code what the endianness is. */ | |
47 | extern int target_big_endian; | |
48 | ||
49 | /* Whether or not, we've set target_big_endian. */ | |
50 | static int set_target_endian = 0; | |
51 | ||
52 | /* Whether to use user friendly register names. */ | |
53 | #ifndef TARGET_REG_NAMES_P | |
54 | #ifdef TE_PE | |
b34976b6 | 55 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 56 | #else |
b34976b6 | 57 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
58 | #endif |
59 | #endif | |
60 | ||
0baf16f2 AM |
61 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
62 | HIGHESTA. */ | |
63 | ||
64 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
65 | #define PPC_LO(v) ((v) & 0xffff) | |
66 | ||
67 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ | |
68 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
69 | ||
70 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of | |
71 | the indicated value, compensating for #lo() being treated as a | |
72 | signed number. */ | |
15c1449b | 73 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 AM |
74 | |
75 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ | |
2a98c3a6 | 76 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
77 | |
78 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
79 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 80 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
81 | |
82 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 83 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
84 | |
85 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
86 | compensating for #lo being treated as a signed number. */ |
87 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 AM |
88 | |
89 | #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) | |
90 | ||
b34976b6 | 91 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 92 | |
98027b10 AM |
93 | static void ppc_macro (char *, const struct powerpc_macro *); |
94 | static void ppc_byte (int); | |
0baf16f2 AM |
95 | |
96 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
97 | static void ppc_tc (int); |
98 | static void ppc_machine (int); | |
0baf16f2 | 99 | #endif |
252b5132 RH |
100 | |
101 | #ifdef OBJ_XCOFF | |
98027b10 AM |
102 | static void ppc_comm (int); |
103 | static void ppc_bb (int); | |
104 | static void ppc_bc (int); | |
105 | static void ppc_bf (int); | |
106 | static void ppc_biei (int); | |
107 | static void ppc_bs (int); | |
108 | static void ppc_eb (int); | |
109 | static void ppc_ec (int); | |
110 | static void ppc_ef (int); | |
111 | static void ppc_es (int); | |
112 | static void ppc_csect (int); | |
85645aed | 113 | static void ppc_dwsect (int); |
98027b10 AM |
114 | static void ppc_change_csect (symbolS *, offsetT); |
115 | static void ppc_function (int); | |
116 | static void ppc_extern (int); | |
117 | static void ppc_lglobl (int); | |
c865e45b | 118 | static void ppc_ref (int); |
98027b10 AM |
119 | static void ppc_section (int); |
120 | static void ppc_named_section (int); | |
121 | static void ppc_stabx (int); | |
122 | static void ppc_rename (int); | |
123 | static void ppc_toc (int); | |
124 | static void ppc_xcoff_cons (int); | |
125 | static void ppc_vbyte (int); | |
252b5132 RH |
126 | #endif |
127 | ||
128 | #ifdef OBJ_ELF | |
98027b10 AM |
129 | static void ppc_elf_cons (int); |
130 | static void ppc_elf_rdata (int); | |
131 | static void ppc_elf_lcomm (int); | |
252b5132 RH |
132 | #endif |
133 | ||
134 | #ifdef TE_PE | |
98027b10 AM |
135 | static void ppc_previous (int); |
136 | static void ppc_pdata (int); | |
137 | static void ppc_ydata (int); | |
138 | static void ppc_reldata (int); | |
139 | static void ppc_rdata (int); | |
140 | static void ppc_ualong (int); | |
141 | static void ppc_znop (int); | |
142 | static void ppc_pe_comm (int); | |
143 | static void ppc_pe_section (int); | |
144 | static void ppc_pe_function (int); | |
145 | static void ppc_pe_tocd (int); | |
252b5132 RH |
146 | #endif |
147 | \f | |
148 | /* Generic assembler global variables which must be defined by all | |
149 | targets. */ | |
150 | ||
151 | #ifdef OBJ_ELF | |
152 | /* This string holds the chars that always start a comment. If the | |
153 | pre-processor is disabled, these aren't very useful. The macro | |
154 | tc_comment_chars points to this. We use this, rather than the | |
155 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
156 | static const char ppc_solaris_comment_chars[] = "#!"; | |
157 | static const char ppc_eabi_comment_chars[] = "#"; | |
158 | ||
159 | #ifdef TARGET_SOLARIS_COMMENT | |
160 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
161 | #else | |
162 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
163 | #endif | |
164 | #else | |
165 | const char comment_chars[] = "#"; | |
166 | #endif | |
167 | ||
168 | /* Characters which start a comment at the beginning of a line. */ | |
169 | const char line_comment_chars[] = "#"; | |
170 | ||
171 | /* Characters which may be used to separate multiple commands on a | |
172 | single line. */ | |
173 | const char line_separator_chars[] = ";"; | |
174 | ||
175 | /* Characters which are used to indicate an exponent in a floating | |
176 | point number. */ | |
177 | const char EXP_CHARS[] = "eE"; | |
178 | ||
179 | /* Characters which mean that a number is a floating point constant, | |
180 | as in 0d1.0. */ | |
181 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 182 | |
5e02f92e | 183 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 184 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 185 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
186 | |
187 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
188 | int ppc_cie_data_alignment; | |
783de163 | 189 | |
8fbf7334 JL |
190 | /* The dwarf2 minimum instruction length. */ |
191 | int ppc_dwarf2_line_min_insn_length; | |
192 | ||
cef4f754 AM |
193 | /* More than this number of nops in an alignment op gets a branch |
194 | instead. */ | |
195 | unsigned long nop_limit = 4; | |
196 | ||
783de163 AM |
197 | /* The type of processor we are assembling for. This is one or more |
198 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 199 | ppc_cpu_t ppc_cpu = 0; |
776fc418 | 200 | ppc_cpu_t sticky = 0; |
01efc3af AM |
201 | |
202 | /* Flags set on encountering toc relocs. */ | |
203 | enum { | |
204 | has_large_toc_reloc = 1, | |
205 | has_small_toc_reloc = 2 | |
206 | } toc_reloc_types; | |
252b5132 RH |
207 | \f |
208 | /* The target specific pseudo-ops which we support. */ | |
209 | ||
210 | const pseudo_typeS md_pseudo_table[] = | |
211 | { | |
212 | /* Pseudo-ops which must be overridden. */ | |
213 | { "byte", ppc_byte, 0 }, | |
214 | ||
215 | #ifdef OBJ_XCOFF | |
216 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
217 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
218 | on COFF, and is only implemented for the RS/6000. We just use | |
219 | obj-coff.c, and add what we need here. */ | |
220 | { "comm", ppc_comm, 0 }, | |
221 | { "lcomm", ppc_comm, 1 }, | |
222 | { "bb", ppc_bb, 0 }, | |
223 | { "bc", ppc_bc, 0 }, | |
224 | { "bf", ppc_bf, 0 }, | |
225 | { "bi", ppc_biei, 0 }, | |
226 | { "bs", ppc_bs, 0 }, | |
227 | { "csect", ppc_csect, 0 }, | |
85645aed | 228 | { "dwsect", ppc_dwsect, 0 }, |
252b5132 RH |
229 | { "data", ppc_section, 'd' }, |
230 | { "eb", ppc_eb, 0 }, | |
231 | { "ec", ppc_ec, 0 }, | |
232 | { "ef", ppc_ef, 0 }, | |
233 | { "ei", ppc_biei, 1 }, | |
234 | { "es", ppc_es, 0 }, | |
235 | { "extern", ppc_extern, 0 }, | |
236 | { "function", ppc_function, 0 }, | |
237 | { "lglobl", ppc_lglobl, 0 }, | |
c865e45b | 238 | { "ref", ppc_ref, 0 }, |
252b5132 RH |
239 | { "rename", ppc_rename, 0 }, |
240 | { "section", ppc_named_section, 0 }, | |
241 | { "stabx", ppc_stabx, 0 }, | |
242 | { "text", ppc_section, 't' }, | |
243 | { "toc", ppc_toc, 0 }, | |
244 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 245 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
246 | { "word", ppc_xcoff_cons, 1 }, |
247 | { "short", ppc_xcoff_cons, 1 }, | |
248 | { "vbyte", ppc_vbyte, 0 }, | |
249 | #endif | |
250 | ||
251 | #ifdef OBJ_ELF | |
0baf16f2 AM |
252 | { "llong", ppc_elf_cons, 8 }, |
253 | { "quad", ppc_elf_cons, 8 }, | |
252b5132 RH |
254 | { "long", ppc_elf_cons, 4 }, |
255 | { "word", ppc_elf_cons, 2 }, | |
256 | { "short", ppc_elf_cons, 2 }, | |
257 | { "rdata", ppc_elf_rdata, 0 }, | |
258 | { "rodata", ppc_elf_rdata, 0 }, | |
259 | { "lcomm", ppc_elf_lcomm, 0 }, | |
260 | #endif | |
261 | ||
262 | #ifdef TE_PE | |
99a814a1 | 263 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
264 | { "previous", ppc_previous, 0 }, |
265 | { "pdata", ppc_pdata, 0 }, | |
266 | { "ydata", ppc_ydata, 0 }, | |
267 | { "reldata", ppc_reldata, 0 }, | |
268 | { "rdata", ppc_rdata, 0 }, | |
269 | { "ualong", ppc_ualong, 0 }, | |
270 | { "znop", ppc_znop, 0 }, | |
271 | { "comm", ppc_pe_comm, 0 }, | |
272 | { "lcomm", ppc_pe_comm, 1 }, | |
273 | { "section", ppc_pe_section, 0 }, | |
274 | { "function", ppc_pe_function,0 }, | |
275 | { "tocd", ppc_pe_tocd, 0 }, | |
276 | #endif | |
277 | ||
0baf16f2 | 278 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 279 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
280 | { "machine", ppc_machine, 0 }, |
281 | #endif | |
252b5132 RH |
282 | |
283 | { NULL, NULL, 0 } | |
284 | }; | |
285 | ||
286 | \f | |
99a814a1 AM |
287 | /* Predefined register names if -mregnames (or default for Windows NT). |
288 | In general, there are lots of them, in an attempt to be compatible | |
289 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
290 | |
291 | /* Structure to hold information about predefined registers. */ | |
292 | struct pd_reg | |
293 | { | |
294 | char *name; | |
295 | int value; | |
296 | }; | |
297 | ||
298 | /* List of registers that are pre-defined: | |
299 | ||
300 | Each general register has predefined names of the form: | |
301 | 1. r<reg_num> which has the value <reg_num>. | |
302 | 2. r.<reg_num> which has the value <reg_num>. | |
303 | ||
252b5132 RH |
304 | Each floating point register has predefined names of the form: |
305 | 1. f<reg_num> which has the value <reg_num>. | |
306 | 2. f.<reg_num> which has the value <reg_num>. | |
307 | ||
7a899fff C |
308 | Each vector unit register has predefined names of the form: |
309 | 1. v<reg_num> which has the value <reg_num>. | |
310 | 2. v.<reg_num> which has the value <reg_num>. | |
311 | ||
252b5132 RH |
312 | Each condition register has predefined names of the form: |
313 | 1. cr<reg_num> which has the value <reg_num>. | |
314 | 2. cr.<reg_num> which has the value <reg_num>. | |
315 | ||
316 | There are individual registers as well: | |
317 | sp or r.sp has the value 1 | |
318 | rtoc or r.toc has the value 2 | |
319 | fpscr has the value 0 | |
320 | xer has the value 1 | |
321 | lr has the value 8 | |
322 | ctr has the value 9 | |
323 | pmr has the value 0 | |
324 | dar has the value 19 | |
325 | dsisr has the value 18 | |
326 | dec has the value 22 | |
327 | sdr1 has the value 25 | |
328 | srr0 has the value 26 | |
329 | srr1 has the value 27 | |
330 | ||
81d4177b | 331 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
332 | |
333 | static const struct pd_reg pre_defined_registers[] = | |
334 | { | |
335 | { "cr.0", 0 }, /* Condition Registers */ | |
336 | { "cr.1", 1 }, | |
337 | { "cr.2", 2 }, | |
338 | { "cr.3", 3 }, | |
339 | { "cr.4", 4 }, | |
340 | { "cr.5", 5 }, | |
341 | { "cr.6", 6 }, | |
342 | { "cr.7", 7 }, | |
343 | ||
344 | { "cr0", 0 }, | |
345 | { "cr1", 1 }, | |
346 | { "cr2", 2 }, | |
347 | { "cr3", 3 }, | |
348 | { "cr4", 4 }, | |
349 | { "cr5", 5 }, | |
350 | { "cr6", 6 }, | |
351 | { "cr7", 7 }, | |
352 | ||
353 | { "ctr", 9 }, | |
354 | ||
355 | { "dar", 19 }, /* Data Access Register */ | |
356 | { "dec", 22 }, /* Decrementer */ | |
357 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
358 | ||
359 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
360 | { "f.1", 1 }, |
361 | { "f.10", 10 }, | |
362 | { "f.11", 11 }, | |
363 | { "f.12", 12 }, | |
364 | { "f.13", 13 }, | |
365 | { "f.14", 14 }, | |
366 | { "f.15", 15 }, | |
367 | { "f.16", 16 }, | |
368 | { "f.17", 17 }, | |
369 | { "f.18", 18 }, | |
370 | { "f.19", 19 }, | |
371 | { "f.2", 2 }, | |
372 | { "f.20", 20 }, | |
373 | { "f.21", 21 }, | |
374 | { "f.22", 22 }, | |
375 | { "f.23", 23 }, | |
376 | { "f.24", 24 }, | |
377 | { "f.25", 25 }, | |
378 | { "f.26", 26 }, | |
379 | { "f.27", 27 }, | |
380 | { "f.28", 28 }, | |
381 | { "f.29", 29 }, | |
382 | { "f.3", 3 }, | |
252b5132 RH |
383 | { "f.30", 30 }, |
384 | { "f.31", 31 }, | |
066be9f7 PB |
385 | |
386 | { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
387 | { "f.33", 33 }, | |
388 | { "f.34", 34 }, | |
389 | { "f.35", 35 }, | |
390 | { "f.36", 36 }, | |
391 | { "f.37", 37 }, | |
392 | { "f.38", 38 }, | |
393 | { "f.39", 39 }, | |
81d4177b | 394 | { "f.4", 4 }, |
066be9f7 PB |
395 | { "f.40", 40 }, |
396 | { "f.41", 41 }, | |
397 | { "f.42", 42 }, | |
398 | { "f.43", 43 }, | |
399 | { "f.44", 44 }, | |
400 | { "f.45", 45 }, | |
401 | { "f.46", 46 }, | |
402 | { "f.47", 47 }, | |
403 | { "f.48", 48 }, | |
404 | { "f.49", 49 }, | |
81d4177b | 405 | { "f.5", 5 }, |
066be9f7 PB |
406 | { "f.50", 50 }, |
407 | { "f.51", 51 }, | |
408 | { "f.52", 52 }, | |
409 | { "f.53", 53 }, | |
410 | { "f.54", 54 }, | |
411 | { "f.55", 55 }, | |
412 | { "f.56", 56 }, | |
413 | { "f.57", 57 }, | |
414 | { "f.58", 58 }, | |
415 | { "f.59", 59 }, | |
81d4177b | 416 | { "f.6", 6 }, |
066be9f7 PB |
417 | { "f.60", 60 }, |
418 | { "f.61", 61 }, | |
419 | { "f.62", 62 }, | |
420 | { "f.63", 63 }, | |
81d4177b KH |
421 | { "f.7", 7 }, |
422 | { "f.8", 8 }, | |
423 | { "f.9", 9 }, | |
424 | ||
425 | { "f0", 0 }, | |
426 | { "f1", 1 }, | |
427 | { "f10", 10 }, | |
428 | { "f11", 11 }, | |
429 | { "f12", 12 }, | |
430 | { "f13", 13 }, | |
431 | { "f14", 14 }, | |
432 | { "f15", 15 }, | |
433 | { "f16", 16 }, | |
434 | { "f17", 17 }, | |
435 | { "f18", 18 }, | |
436 | { "f19", 19 }, | |
437 | { "f2", 2 }, | |
438 | { "f20", 20 }, | |
439 | { "f21", 21 }, | |
440 | { "f22", 22 }, | |
441 | { "f23", 23 }, | |
442 | { "f24", 24 }, | |
443 | { "f25", 25 }, | |
444 | { "f26", 26 }, | |
445 | { "f27", 27 }, | |
446 | { "f28", 28 }, | |
447 | { "f29", 29 }, | |
448 | { "f3", 3 }, | |
252b5132 RH |
449 | { "f30", 30 }, |
450 | { "f31", 31 }, | |
066be9f7 PB |
451 | |
452 | { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
453 | { "f33", 33 }, | |
454 | { "f34", 34 }, | |
455 | { "f35", 35 }, | |
456 | { "f36", 36 }, | |
457 | { "f37", 37 }, | |
458 | { "f38", 38 }, | |
459 | { "f39", 39 }, | |
81d4177b | 460 | { "f4", 4 }, |
066be9f7 PB |
461 | { "f40", 40 }, |
462 | { "f41", 41 }, | |
463 | { "f42", 42 }, | |
464 | { "f43", 43 }, | |
465 | { "f44", 44 }, | |
466 | { "f45", 45 }, | |
467 | { "f46", 46 }, | |
468 | { "f47", 47 }, | |
469 | { "f48", 48 }, | |
470 | { "f49", 49 }, | |
81d4177b | 471 | { "f5", 5 }, |
066be9f7 PB |
472 | { "f50", 50 }, |
473 | { "f51", 51 }, | |
474 | { "f52", 52 }, | |
475 | { "f53", 53 }, | |
476 | { "f54", 54 }, | |
477 | { "f55", 55 }, | |
478 | { "f56", 56 }, | |
479 | { "f57", 57 }, | |
480 | { "f58", 58 }, | |
481 | { "f59", 59 }, | |
81d4177b | 482 | { "f6", 6 }, |
066be9f7 PB |
483 | { "f60", 60 }, |
484 | { "f61", 61 }, | |
485 | { "f62", 62 }, | |
486 | { "f63", 63 }, | |
81d4177b KH |
487 | { "f7", 7 }, |
488 | { "f8", 8 }, | |
489 | { "f9", 9 }, | |
252b5132 RH |
490 | |
491 | { "fpscr", 0 }, | |
492 | ||
c3d65c1c BE |
493 | /* Quantization registers used with pair single instructions. */ |
494 | { "gqr.0", 0 }, | |
495 | { "gqr.1", 1 }, | |
496 | { "gqr.2", 2 }, | |
497 | { "gqr.3", 3 }, | |
498 | { "gqr.4", 4 }, | |
499 | { "gqr.5", 5 }, | |
500 | { "gqr.6", 6 }, | |
501 | { "gqr.7", 7 }, | |
502 | { "gqr0", 0 }, | |
503 | { "gqr1", 1 }, | |
504 | { "gqr2", 2 }, | |
505 | { "gqr3", 3 }, | |
506 | { "gqr4", 4 }, | |
507 | { "gqr5", 5 }, | |
508 | { "gqr6", 6 }, | |
509 | { "gqr7", 7 }, | |
510 | ||
252b5132 RH |
511 | { "lr", 8 }, /* Link Register */ |
512 | ||
513 | { "pmr", 0 }, | |
514 | ||
515 | { "r.0", 0 }, /* General Purpose Registers */ | |
516 | { "r.1", 1 }, | |
517 | { "r.10", 10 }, | |
518 | { "r.11", 11 }, | |
519 | { "r.12", 12 }, | |
520 | { "r.13", 13 }, | |
521 | { "r.14", 14 }, | |
522 | { "r.15", 15 }, | |
523 | { "r.16", 16 }, | |
524 | { "r.17", 17 }, | |
525 | { "r.18", 18 }, | |
526 | { "r.19", 19 }, | |
527 | { "r.2", 2 }, | |
528 | { "r.20", 20 }, | |
529 | { "r.21", 21 }, | |
530 | { "r.22", 22 }, | |
531 | { "r.23", 23 }, | |
532 | { "r.24", 24 }, | |
533 | { "r.25", 25 }, | |
534 | { "r.26", 26 }, | |
535 | { "r.27", 27 }, | |
536 | { "r.28", 28 }, | |
537 | { "r.29", 29 }, | |
538 | { "r.3", 3 }, | |
539 | { "r.30", 30 }, | |
540 | { "r.31", 31 }, | |
541 | { "r.4", 4 }, | |
542 | { "r.5", 5 }, | |
543 | { "r.6", 6 }, | |
544 | { "r.7", 7 }, | |
545 | { "r.8", 8 }, | |
546 | { "r.9", 9 }, | |
547 | ||
548 | { "r.sp", 1 }, /* Stack Pointer */ | |
549 | ||
550 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
551 | ||
552 | { "r0", 0 }, /* More general purpose registers */ | |
553 | { "r1", 1 }, | |
554 | { "r10", 10 }, | |
555 | { "r11", 11 }, | |
556 | { "r12", 12 }, | |
557 | { "r13", 13 }, | |
558 | { "r14", 14 }, | |
559 | { "r15", 15 }, | |
560 | { "r16", 16 }, | |
561 | { "r17", 17 }, | |
562 | { "r18", 18 }, | |
563 | { "r19", 19 }, | |
564 | { "r2", 2 }, | |
565 | { "r20", 20 }, | |
566 | { "r21", 21 }, | |
567 | { "r22", 22 }, | |
568 | { "r23", 23 }, | |
569 | { "r24", 24 }, | |
570 | { "r25", 25 }, | |
571 | { "r26", 26 }, | |
572 | { "r27", 27 }, | |
573 | { "r28", 28 }, | |
574 | { "r29", 29 }, | |
575 | { "r3", 3 }, | |
576 | { "r30", 30 }, | |
577 | { "r31", 31 }, | |
578 | { "r4", 4 }, | |
579 | { "r5", 5 }, | |
580 | { "r6", 6 }, | |
581 | { "r7", 7 }, | |
582 | { "r8", 8 }, | |
583 | { "r9", 9 }, | |
584 | ||
585 | { "rtoc", 2 }, /* Table of contents */ | |
586 | ||
587 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
588 | ||
589 | { "sp", 1 }, | |
590 | ||
591 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
592 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 593 | |
066be9f7 | 594 | { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ |
81d4177b KH |
595 | { "v.1", 1 }, |
596 | { "v.10", 10 }, | |
597 | { "v.11", 11 }, | |
598 | { "v.12", 12 }, | |
599 | { "v.13", 13 }, | |
600 | { "v.14", 14 }, | |
601 | { "v.15", 15 }, | |
602 | { "v.16", 16 }, | |
603 | { "v.17", 17 }, | |
604 | { "v.18", 18 }, | |
605 | { "v.19", 19 }, | |
606 | { "v.2", 2 }, | |
607 | { "v.20", 20 }, | |
608 | { "v.21", 21 }, | |
609 | { "v.22", 22 }, | |
610 | { "v.23", 23 }, | |
611 | { "v.24", 24 }, | |
612 | { "v.25", 25 }, | |
613 | { "v.26", 26 }, | |
614 | { "v.27", 27 }, | |
615 | { "v.28", 28 }, | |
616 | { "v.29", 29 }, | |
617 | { "v.3", 3 }, | |
7a899fff C |
618 | { "v.30", 30 }, |
619 | { "v.31", 31 }, | |
81d4177b KH |
620 | { "v.4", 4 }, |
621 | { "v.5", 5 }, | |
622 | { "v.6", 6 }, | |
623 | { "v.7", 7 }, | |
624 | { "v.8", 8 }, | |
625 | { "v.9", 9 }, | |
7a899fff C |
626 | |
627 | { "v0", 0 }, | |
81d4177b KH |
628 | { "v1", 1 }, |
629 | { "v10", 10 }, | |
630 | { "v11", 11 }, | |
631 | { "v12", 12 }, | |
632 | { "v13", 13 }, | |
633 | { "v14", 14 }, | |
634 | { "v15", 15 }, | |
635 | { "v16", 16 }, | |
636 | { "v17", 17 }, | |
637 | { "v18", 18 }, | |
638 | { "v19", 19 }, | |
639 | { "v2", 2 }, | |
640 | { "v20", 20 }, | |
641 | { "v21", 21 }, | |
642 | { "v22", 22 }, | |
643 | { "v23", 23 }, | |
644 | { "v24", 24 }, | |
645 | { "v25", 25 }, | |
646 | { "v26", 26 }, | |
647 | { "v27", 27 }, | |
648 | { "v28", 28 }, | |
649 | { "v29", 29 }, | |
650 | { "v3", 3 }, | |
7a899fff C |
651 | { "v30", 30 }, |
652 | { "v31", 31 }, | |
81d4177b KH |
653 | { "v4", 4 }, |
654 | { "v5", 5 }, | |
655 | { "v6", 6 }, | |
656 | { "v7", 7 }, | |
657 | { "v8", 8 }, | |
7a899fff | 658 | { "v9", 9 }, |
252b5132 | 659 | |
066be9f7 PB |
660 | { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ |
661 | { "vs.1", 1 }, | |
662 | { "vs.10", 10 }, | |
663 | { "vs.11", 11 }, | |
664 | { "vs.12", 12 }, | |
665 | { "vs.13", 13 }, | |
666 | { "vs.14", 14 }, | |
667 | { "vs.15", 15 }, | |
668 | { "vs.16", 16 }, | |
669 | { "vs.17", 17 }, | |
670 | { "vs.18", 18 }, | |
671 | { "vs.19", 19 }, | |
672 | { "vs.2", 2 }, | |
673 | { "vs.20", 20 }, | |
674 | { "vs.21", 21 }, | |
675 | { "vs.22", 22 }, | |
676 | { "vs.23", 23 }, | |
677 | { "vs.24", 24 }, | |
678 | { "vs.25", 25 }, | |
679 | { "vs.26", 26 }, | |
680 | { "vs.27", 27 }, | |
681 | { "vs.28", 28 }, | |
682 | { "vs.29", 29 }, | |
683 | { "vs.3", 3 }, | |
684 | { "vs.30", 30 }, | |
685 | { "vs.31", 31 }, | |
686 | { "vs.32", 32 }, | |
687 | { "vs.33", 33 }, | |
688 | { "vs.34", 34 }, | |
689 | { "vs.35", 35 }, | |
690 | { "vs.36", 36 }, | |
691 | { "vs.37", 37 }, | |
692 | { "vs.38", 38 }, | |
693 | { "vs.39", 39 }, | |
694 | { "vs.4", 4 }, | |
695 | { "vs.40", 40 }, | |
696 | { "vs.41", 41 }, | |
697 | { "vs.42", 42 }, | |
698 | { "vs.43", 43 }, | |
699 | { "vs.44", 44 }, | |
700 | { "vs.45", 45 }, | |
701 | { "vs.46", 46 }, | |
702 | { "vs.47", 47 }, | |
703 | { "vs.48", 48 }, | |
704 | { "vs.49", 49 }, | |
705 | { "vs.5", 5 }, | |
706 | { "vs.50", 50 }, | |
707 | { "vs.51", 51 }, | |
708 | { "vs.52", 52 }, | |
709 | { "vs.53", 53 }, | |
710 | { "vs.54", 54 }, | |
711 | { "vs.55", 55 }, | |
712 | { "vs.56", 56 }, | |
713 | { "vs.57", 57 }, | |
714 | { "vs.58", 58 }, | |
715 | { "vs.59", 59 }, | |
716 | { "vs.6", 6 }, | |
717 | { "vs.60", 60 }, | |
718 | { "vs.61", 61 }, | |
719 | { "vs.62", 62 }, | |
720 | { "vs.63", 63 }, | |
721 | { "vs.7", 7 }, | |
722 | { "vs.8", 8 }, | |
723 | { "vs.9", 9 }, | |
724 | ||
725 | { "vs0", 0 }, | |
726 | { "vs1", 1 }, | |
727 | { "vs10", 10 }, | |
728 | { "vs11", 11 }, | |
729 | { "vs12", 12 }, | |
730 | { "vs13", 13 }, | |
731 | { "vs14", 14 }, | |
732 | { "vs15", 15 }, | |
733 | { "vs16", 16 }, | |
734 | { "vs17", 17 }, | |
735 | { "vs18", 18 }, | |
736 | { "vs19", 19 }, | |
737 | { "vs2", 2 }, | |
738 | { "vs20", 20 }, | |
739 | { "vs21", 21 }, | |
740 | { "vs22", 22 }, | |
741 | { "vs23", 23 }, | |
742 | { "vs24", 24 }, | |
743 | { "vs25", 25 }, | |
744 | { "vs26", 26 }, | |
745 | { "vs27", 27 }, | |
746 | { "vs28", 28 }, | |
747 | { "vs29", 29 }, | |
748 | { "vs3", 3 }, | |
749 | { "vs30", 30 }, | |
750 | { "vs31", 31 }, | |
751 | { "vs32", 32 }, | |
752 | { "vs33", 33 }, | |
753 | { "vs34", 34 }, | |
754 | { "vs35", 35 }, | |
755 | { "vs36", 36 }, | |
756 | { "vs37", 37 }, | |
757 | { "vs38", 38 }, | |
758 | { "vs39", 39 }, | |
759 | { "vs4", 4 }, | |
760 | { "vs40", 40 }, | |
761 | { "vs41", 41 }, | |
762 | { "vs42", 42 }, | |
763 | { "vs43", 43 }, | |
764 | { "vs44", 44 }, | |
765 | { "vs45", 45 }, | |
766 | { "vs46", 46 }, | |
767 | { "vs47", 47 }, | |
768 | { "vs48", 48 }, | |
769 | { "vs49", 49 }, | |
770 | { "vs5", 5 }, | |
771 | { "vs50", 50 }, | |
772 | { "vs51", 51 }, | |
773 | { "vs52", 52 }, | |
774 | { "vs53", 53 }, | |
775 | { "vs54", 54 }, | |
776 | { "vs55", 55 }, | |
777 | { "vs56", 56 }, | |
778 | { "vs57", 57 }, | |
779 | { "vs58", 58 }, | |
780 | { "vs59", 59 }, | |
781 | { "vs6", 6 }, | |
782 | { "vs60", 60 }, | |
783 | { "vs61", 61 }, | |
784 | { "vs62", 62 }, | |
785 | { "vs63", 63 }, | |
786 | { "vs7", 7 }, | |
787 | { "vs8", 8 }, | |
788 | { "vs9", 9 }, | |
789 | ||
252b5132 RH |
790 | { "xer", 1 }, |
791 | ||
792 | }; | |
793 | ||
bc805888 | 794 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
795 | |
796 | /* Given NAME, find the register number associated with that name, return | |
797 | the integer value associated with the given name or -1 on failure. */ | |
798 | ||
252b5132 | 799 | static int |
98027b10 | 800 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
801 | { |
802 | int middle, low, high; | |
803 | int cmp; | |
804 | ||
805 | low = 0; | |
806 | high = regcount - 1; | |
807 | ||
808 | do | |
809 | { | |
810 | middle = (low + high) / 2; | |
811 | cmp = strcasecmp (name, regs[middle].name); | |
812 | if (cmp < 0) | |
813 | high = middle - 1; | |
814 | else if (cmp > 0) | |
815 | low = middle + 1; | |
816 | else | |
817 | return regs[middle].value; | |
818 | } | |
819 | while (low <= high); | |
820 | ||
821 | return -1; | |
822 | } | |
823 | ||
824 | /* | |
99a814a1 | 825 | * Summary of register_name. |
252b5132 RH |
826 | * |
827 | * in: Input_line_pointer points to 1st char of operand. | |
828 | * | |
829 | * out: A expressionS. | |
830 | * The operand may have been a register: in this case, X_op == O_register, | |
831 | * X_add_number is set to the register number, and truth is returned. | |
832 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
833 | * original state. | |
834 | */ | |
835 | ||
b34976b6 | 836 | static bfd_boolean |
98027b10 | 837 | register_name (expressionS *expressionP) |
252b5132 RH |
838 | { |
839 | int reg_number; | |
840 | char *name; | |
841 | char *start; | |
842 | char c; | |
843 | ||
99a814a1 | 844 | /* Find the spelling of the operand. */ |
252b5132 | 845 | start = name = input_line_pointer; |
3882b010 | 846 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
847 | name = ++input_line_pointer; |
848 | ||
3882b010 | 849 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 850 | return FALSE; |
252b5132 RH |
851 | |
852 | c = get_symbol_end (); | |
853 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
854 | ||
468cced8 AM |
855 | /* Put back the delimiting char. */ |
856 | *input_line_pointer = c; | |
857 | ||
99a814a1 | 858 | /* Look to see if it's in the register table. */ |
81d4177b | 859 | if (reg_number >= 0) |
252b5132 RH |
860 | { |
861 | expressionP->X_op = O_register; | |
862 | expressionP->X_add_number = reg_number; | |
81d4177b | 863 | |
99a814a1 | 864 | /* Make the rest nice. */ |
252b5132 RH |
865 | expressionP->X_add_symbol = NULL; |
866 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 867 | return TRUE; |
252b5132 | 868 | } |
468cced8 AM |
869 | |
870 | /* Reset the line as if we had not done anything. */ | |
871 | input_line_pointer = start; | |
b34976b6 | 872 | return FALSE; |
252b5132 RH |
873 | } |
874 | \f | |
875 | /* This function is called for each symbol seen in an expression. It | |
876 | handles the special parsing which PowerPC assemblers are supposed | |
877 | to use for condition codes. */ | |
878 | ||
879 | /* Whether to do the special parsing. */ | |
b34976b6 | 880 | static bfd_boolean cr_operand; |
252b5132 RH |
881 | |
882 | /* Names to recognize in a condition code. This table is sorted. */ | |
883 | static const struct pd_reg cr_names[] = | |
884 | { | |
885 | { "cr0", 0 }, | |
886 | { "cr1", 1 }, | |
887 | { "cr2", 2 }, | |
888 | { "cr3", 3 }, | |
889 | { "cr4", 4 }, | |
890 | { "cr5", 5 }, | |
891 | { "cr6", 6 }, | |
892 | { "cr7", 7 }, | |
893 | { "eq", 2 }, | |
894 | { "gt", 1 }, | |
895 | { "lt", 0 }, | |
896 | { "so", 3 }, | |
897 | { "un", 3 } | |
898 | }; | |
899 | ||
900 | /* Parsing function. This returns non-zero if it recognized an | |
901 | expression. */ | |
902 | ||
903 | int | |
91d6fa6a | 904 | ppc_parse_name (const char *name, expressionS *exp) |
252b5132 RH |
905 | { |
906 | int val; | |
907 | ||
908 | if (! cr_operand) | |
909 | return 0; | |
910 | ||
13abbae3 AM |
911 | if (*name == '%') |
912 | ++name; | |
252b5132 RH |
913 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], |
914 | name); | |
915 | if (val < 0) | |
916 | return 0; | |
917 | ||
91d6fa6a NC |
918 | exp->X_op = O_constant; |
919 | exp->X_add_number = val; | |
252b5132 RH |
920 | |
921 | return 1; | |
922 | } | |
923 | \f | |
924 | /* Local variables. */ | |
925 | ||
2b3c4602 AM |
926 | /* Whether to target xcoff64/elf64. */ |
927 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 928 | |
252b5132 RH |
929 | /* Opcode hash table. */ |
930 | static struct hash_control *ppc_hash; | |
931 | ||
932 | /* Macro hash table. */ | |
933 | static struct hash_control *ppc_macro_hash; | |
934 | ||
935 | #ifdef OBJ_ELF | |
99a814a1 | 936 | /* What type of shared library support to use. */ |
5d6f4f16 | 937 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 938 | |
99a814a1 | 939 | /* Flags to set in the elf header. */ |
252b5132 RH |
940 | static flagword ppc_flags = 0; |
941 | ||
942 | /* Whether this is Solaris or not. */ | |
943 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 944 | #define SOLARIS_P TRUE |
252b5132 | 945 | #else |
b34976b6 | 946 | #define SOLARIS_P FALSE |
252b5132 RH |
947 | #endif |
948 | ||
b34976b6 | 949 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
950 | #endif |
951 | ||
952 | #ifdef OBJ_XCOFF | |
953 | ||
954 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
955 | using a bunch of different sections. These assembler sections, | |
956 | however, are all encompassed within the .text or .data sections of | |
957 | the final output file. We handle this by using different | |
958 | subsegments within these main segments. */ | |
959 | ||
960 | /* Next subsegment to allocate within the .text segment. */ | |
961 | static subsegT ppc_text_subsegment = 2; | |
962 | ||
963 | /* Linked list of csects in the text section. */ | |
964 | static symbolS *ppc_text_csects; | |
965 | ||
966 | /* Next subsegment to allocate within the .data segment. */ | |
967 | static subsegT ppc_data_subsegment = 2; | |
968 | ||
969 | /* Linked list of csects in the data section. */ | |
970 | static symbolS *ppc_data_csects; | |
971 | ||
972 | /* The current csect. */ | |
973 | static symbolS *ppc_current_csect; | |
974 | ||
975 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
976 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
977 | A special relocation is used when accessing TOC entries. We handle | |
978 | the TOC as a subsegment within the .data segment. We set it up if | |
979 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
980 | static symbolS *ppc_toc_csect; | |
981 | ||
982 | /* The first frag in the TOC subsegment. */ | |
983 | static fragS *ppc_toc_frag; | |
984 | ||
985 | /* The first frag in the first subsegment after the TOC in the .data | |
986 | segment. NULL if there are no subsegments after the TOC. */ | |
987 | static fragS *ppc_after_toc_frag; | |
988 | ||
989 | /* The current static block. */ | |
990 | static symbolS *ppc_current_block; | |
991 | ||
992 | /* The COFF debugging section; set by md_begin. This is not the | |
993 | .debug section, but is instead the secret BFD section which will | |
994 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
995 | static asection *ppc_coff_debug_section; | |
996 | ||
85645aed TG |
997 | /* Structure to set the length field of the dwarf sections. */ |
998 | struct dw_subsection { | |
999 | /* Subsections are simply linked. */ | |
1000 | struct dw_subsection *link; | |
1001 | ||
1002 | /* The subsection number. */ | |
1003 | subsegT subseg; | |
1004 | ||
1005 | /* Expression to compute the length of the section. */ | |
1006 | expressionS end_exp; | |
1007 | }; | |
1008 | ||
1009 | static struct dw_section { | |
1010 | /* Corresponding section. */ | |
1011 | segT sect; | |
1012 | ||
1013 | /* Simply linked list of subsections with a label. */ | |
1014 | struct dw_subsection *list_subseg; | |
1015 | ||
1016 | /* The anonymous subsection. */ | |
1017 | struct dw_subsection *anon_subseg; | |
1018 | } dw_sections[XCOFF_DWSECT_NBR_NAMES]; | |
252b5132 RH |
1019 | #endif /* OBJ_XCOFF */ |
1020 | ||
1021 | #ifdef TE_PE | |
1022 | ||
1023 | /* Various sections that we need for PE coff support. */ | |
1024 | static segT ydata_section; | |
1025 | static segT pdata_section; | |
1026 | static segT reldata_section; | |
1027 | static segT rdata_section; | |
1028 | static segT tocdata_section; | |
1029 | ||
81d4177b | 1030 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
1031 | static segT ppc_previous_section; |
1032 | static segT ppc_current_section; | |
1033 | ||
1034 | #endif /* TE_PE */ | |
1035 | ||
1036 | #ifdef OBJ_ELF | |
1037 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
1038 | #define PPC_APUINFO_ISEL 0x40 |
1039 | #define PPC_APUINFO_PMR 0x41 | |
1040 | #define PPC_APUINFO_RFMCI 0x42 | |
1041 | #define PPC_APUINFO_CACHELCK 0x43 | |
1042 | #define PPC_APUINFO_SPE 0x100 | |
1043 | #define PPC_APUINFO_EFS 0x101 | |
1044 | #define PPC_APUINFO_BRLOCK 0x102 | |
b9c361e0 | 1045 | #define PPC_APUINFO_VLE 0x104 |
6a0c61b7 | 1046 | |
b34976b6 AM |
1047 | /* |
1048 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
1049 | */ |
1050 | unsigned long *ppc_apuinfo_list; | |
1051 | unsigned int ppc_apuinfo_num; | |
1052 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1053 | #endif /* OBJ_ELF */ |
1054 | \f | |
1055 | #ifdef OBJ_ELF | |
15c1449b | 1056 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1057 | #else |
15c1449b | 1058 | const char *const md_shortopts = "um:"; |
252b5132 | 1059 | #endif |
cef4f754 | 1060 | #define OPTION_NOPS (OPTION_MD_BASE + 0) |
15c1449b | 1061 | const struct option md_longopts[] = { |
cef4f754 | 1062 | {"nops", required_argument, NULL, OPTION_NOPS}, |
252b5132 RH |
1063 | {NULL, no_argument, NULL, 0} |
1064 | }; | |
15c1449b | 1065 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
1066 | |
1067 | int | |
98027b10 | 1068 | md_parse_option (int c, char *arg) |
252b5132 | 1069 | { |
69fe9ce5 AM |
1070 | ppc_cpu_t new_cpu; |
1071 | ||
252b5132 RH |
1072 | switch (c) |
1073 | { | |
1074 | case 'u': | |
1075 | /* -u means that any undefined symbols should be treated as | |
1076 | external, which is the default for gas anyhow. */ | |
1077 | break; | |
1078 | ||
1079 | #ifdef OBJ_ELF | |
1080 | case 'l': | |
1081 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1082 | sake, recognize -be also. */ |
252b5132 RH |
1083 | if (strcmp (arg, "e") == 0) |
1084 | { | |
1085 | target_big_endian = 0; | |
1086 | set_target_endian = 1; | |
b9c361e0 | 1087 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1088 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1089 | } |
1090 | else | |
1091 | return 0; | |
1092 | ||
1093 | break; | |
1094 | ||
1095 | case 'b': | |
1096 | if (strcmp (arg, "e") == 0) | |
1097 | { | |
1098 | target_big_endian = 1; | |
1099 | set_target_endian = 1; | |
1100 | } | |
1101 | else | |
1102 | return 0; | |
1103 | ||
1104 | break; | |
1105 | ||
1106 | case 'K': | |
99a814a1 | 1107 | /* Recognize -K PIC. */ |
252b5132 RH |
1108 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1109 | { | |
1110 | shlib = SHLIB_PIC; | |
1111 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1112 | } | |
1113 | else | |
1114 | return 0; | |
1115 | ||
1116 | break; | |
1117 | #endif | |
1118 | ||
7f6d05e8 CP |
1119 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1120 | case 'a': | |
1121 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1122 | { |
1123 | #ifdef BFD64 | |
1124 | ppc_obj64 = 1; | |
d6ed37ed AM |
1125 | if (ppc_cpu & PPC_OPCODE_VLE) |
1126 | as_bad (_("the use of -mvle requires -a32.")); | |
2a98c3a6 AM |
1127 | #else |
1128 | as_fatal (_("%s unsupported"), "-a64"); | |
1129 | #endif | |
1130 | } | |
7f6d05e8 | 1131 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1132 | ppc_obj64 = 0; |
7f6d05e8 CP |
1133 | else |
1134 | return 0; | |
1135 | break; | |
81d4177b | 1136 | |
252b5132 | 1137 | case 'm': |
776fc418 | 1138 | new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); |
b9c361e0 JL |
1139 | if (new_cpu != 0) |
1140 | { | |
1141 | ppc_cpu = new_cpu; | |
d6ed37ed AM |
1142 | if (strcmp (arg, "vle") == 0) |
1143 | { | |
1144 | if (set_target_endian && target_big_endian == 0) | |
1145 | as_bad (_("the use of -mvle requires big endian.")); | |
1146 | if (ppc_obj64) | |
1147 | as_bad (_("the use of -mvle requires -a32.")); | |
1148 | } | |
b9c361e0 | 1149 | } |
252b5132 RH |
1150 | |
1151 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1152 | reg_names_p = TRUE; |
252b5132 RH |
1153 | |
1154 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1155 | reg_names_p = FALSE; |
252b5132 RH |
1156 | |
1157 | #ifdef OBJ_ELF | |
99a814a1 AM |
1158 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1159 | that require relocation. */ | |
252b5132 RH |
1160 | else if (strcmp (arg, "relocatable") == 0) |
1161 | { | |
5d6f4f16 | 1162 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1163 | ppc_flags |= EF_PPC_RELOCATABLE; |
1164 | } | |
1165 | ||
1166 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1167 | { | |
5d6f4f16 | 1168 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1169 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1170 | } | |
1171 | ||
99a814a1 | 1172 | /* -memb, set embedded bit. */ |
252b5132 RH |
1173 | else if (strcmp (arg, "emb") == 0) |
1174 | ppc_flags |= EF_PPC_EMB; | |
1175 | ||
cc643b88 | 1176 | /* -mlittle/-mbig set the endianness. */ |
99a814a1 AM |
1177 | else if (strcmp (arg, "little") == 0 |
1178 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1179 | { |
1180 | target_big_endian = 0; | |
1181 | set_target_endian = 1; | |
b9c361e0 | 1182 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1183 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1184 | } |
1185 | ||
1186 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1187 | { | |
1188 | target_big_endian = 1; | |
1189 | set_target_endian = 1; | |
1190 | } | |
1191 | ||
1192 | else if (strcmp (arg, "solaris") == 0) | |
1193 | { | |
b34976b6 | 1194 | msolaris = TRUE; |
252b5132 RH |
1195 | ppc_comment_chars = ppc_solaris_comment_chars; |
1196 | } | |
1197 | ||
1198 | else if (strcmp (arg, "no-solaris") == 0) | |
1199 | { | |
b34976b6 | 1200 | msolaris = FALSE; |
252b5132 RH |
1201 | ppc_comment_chars = ppc_eabi_comment_chars; |
1202 | } | |
1203 | #endif | |
1204 | else | |
1205 | { | |
1206 | as_bad (_("invalid switch -m%s"), arg); | |
1207 | return 0; | |
1208 | } | |
1209 | break; | |
1210 | ||
1211 | #ifdef OBJ_ELF | |
1212 | /* -V: SVR4 argument to print version ID. */ | |
1213 | case 'V': | |
1214 | print_version_id (); | |
1215 | break; | |
1216 | ||
1217 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1218 | should be emitted or not. FIXME: Not implemented. */ | |
1219 | case 'Q': | |
1220 | break; | |
1221 | ||
1222 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1223 | rather than .stabs.excl, which is ignored by the linker. | |
1224 | FIXME: Not implemented. */ | |
1225 | case 's': | |
1226 | if (arg) | |
1227 | return 0; | |
1228 | ||
1229 | break; | |
1230 | #endif | |
1231 | ||
cef4f754 AM |
1232 | case OPTION_NOPS: |
1233 | { | |
1234 | char *end; | |
1235 | nop_limit = strtoul (optarg, &end, 0); | |
1236 | if (*end) | |
1237 | as_bad (_("--nops needs a numeric argument")); | |
1238 | } | |
1239 | break; | |
85645aed | 1240 | |
252b5132 RH |
1241 | default: |
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | return 1; | |
1246 | } | |
1247 | ||
1248 | void | |
98027b10 | 1249 | md_show_usage (FILE *stream) |
252b5132 | 1250 | { |
bc805888 | 1251 | fprintf (stream, _("\ |
252b5132 | 1252 | PowerPC options:\n\ |
ce3d2015 AM |
1253 | -a32 generate ELF32/XCOFF32\n\ |
1254 | -a64 generate ELF64/XCOFF64\n\ | |
1255 | -u ignored\n\ | |
1256 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ | |
1257 | -mpwr generate code for POWER (RIOS1)\n\ | |
1258 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1259 | -mppc, -mppc32, -m603, -m604\n\ |
ce3d2015 AM |
1260 | generate code for PowerPC 603/604\n\ |
1261 | -m403 generate code for PowerPC 403\n\ | |
1262 | -m405 generate code for PowerPC 405\n\ | |
1263 | -m440 generate code for PowerPC 440\n\ | |
1264 | -m464 generate code for PowerPC 464\n\ | |
1265 | -m476 generate code for PowerPC 476\n\ | |
f5c120c5 | 1266 | -m7400, -m7410, -m7450, -m7455\n\ |
ce3d2015 AM |
1267 | generate code for PowerPC 7400/7410/7450/7455\n\ |
1268 | -m750cl generate code for PowerPC 750cl\n")); | |
df12615d | 1269 | fprintf (stream, _("\ |
ce3d2015 AM |
1270 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
1271 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ | |
1272 | -mbooke generate code for 32-bit PowerPC BookE\n\ | |
1273 | -ma2 generate code for A2 architecture\n\ | |
cdc51b07 RS |
1274 | -mpower4, -mpwr4 generate code for Power4 architecture\n\ |
1275 | -mpower5, -mpwr5, -mpwr5x\n\ | |
1276 | generate code for Power5 architecture\n\ | |
1277 | -mpower6, -mpwr6 generate code for Power6 architecture\n\ | |
1278 | -mpower7, -mpwr7 generate code for Power7 architecture\n\ | |
5817ffd1 | 1279 | -mpower8, -mpwr8 generate code for Power8 architecture\n\ |
ce3d2015 AM |
1280 | -mcell generate code for Cell Broadband Engine architecture\n\ |
1281 | -mcom generate code Power/PowerPC common instructions\n\ | |
1282 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); | |
6a0c61b7 | 1283 | fprintf (stream, _("\ |
ce3d2015 AM |
1284 | -maltivec generate code for AltiVec\n\ |
1285 | -mvsx generate code for Vector-Scalar (VSX) instructions\n\ | |
5817ffd1 | 1286 | -mhtm generate code for Hardware Transactional Memory\n\ |
ce3d2015 AM |
1287 | -me300 generate code for PowerPC e300 family\n\ |
1288 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ | |
1289 | -me500mc, generate code for Freescale e500mc core complex\n\ | |
1290 | -me500mc64, generate code for Freescale e500mc64 core complex\n\ | |
aea77599 AM |
1291 | -me5500, generate code for Freescale e5500 core complex\n\ |
1292 | -me6500, generate code for Freescale e6500 core complex\n\ | |
ce3d2015 | 1293 | -mspe generate code for Motorola SPE instructions\n\ |
b9c361e0 | 1294 | -mvle generate code for Freescale VLE instructions\n\ |
ce3d2015 AM |
1295 | -mtitan generate code for AppliedMicro Titan core complex\n\ |
1296 | -mregnames Allow symbolic names for registers\n\ | |
1297 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1298 | #ifdef OBJ_ELF |
bc805888 | 1299 | fprintf (stream, _("\ |
ce3d2015 AM |
1300 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1301 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1302 | -memb set PPC_EMB bit in ELF flags\n\ | |
b8b738ac | 1303 | -mlittle, -mlittle-endian, -le\n\ |
ce3d2015 | 1304 | generate code for a little endian machine\n\ |
b8b738ac | 1305 | -mbig, -mbig-endian, -be\n\ |
ce3d2015 AM |
1306 | generate code for a big endian machine\n\ |
1307 | -msolaris generate code for Solaris\n\ | |
1308 | -mno-solaris do not generate code for Solaris\n\ | |
b8b738ac | 1309 | -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ |
ce3d2015 AM |
1310 | -V print assembler version number\n\ |
1311 | -Qy, -Qn ignored\n")); | |
252b5132 | 1312 | #endif |
cef4f754 AM |
1313 | fprintf (stream, _("\ |
1314 | -nops=count when aligning, more than COUNT nops uses a branch\n")); | |
252b5132 RH |
1315 | } |
1316 | \f | |
1317 | /* Set ppc_cpu if it is not already set. */ | |
1318 | ||
1319 | static void | |
98027b10 | 1320 | ppc_set_cpu (void) |
252b5132 RH |
1321 | { |
1322 | const char *default_os = TARGET_OS; | |
1323 | const char *default_cpu = TARGET_CPU; | |
1324 | ||
7102e95e | 1325 | if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) |
252b5132 | 1326 | { |
2a98c3a6 | 1327 | if (ppc_obj64) |
bdc70b4a | 1328 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; |
2a98c3a6 AM |
1329 | else if (strncmp (default_os, "aix", 3) == 0 |
1330 | && default_os[3] >= '4' && default_os[3] <= '9') | |
bdc70b4a | 1331 | ppc_cpu |= PPC_OPCODE_COMMON; |
252b5132 | 1332 | else if (strncmp (default_os, "aix3", 4) == 0) |
bdc70b4a | 1333 | ppc_cpu |= PPC_OPCODE_POWER; |
252b5132 | 1334 | else if (strcmp (default_cpu, "rs6000") == 0) |
bdc70b4a | 1335 | ppc_cpu |= PPC_OPCODE_POWER; |
0baf16f2 | 1336 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
bdc70b4a | 1337 | ppc_cpu |= PPC_OPCODE_PPC; |
252b5132 | 1338 | else |
d6ed37ed | 1339 | as_fatal (_("unknown default cpu = %s, os = %s"), |
99a814a1 | 1340 | default_cpu, default_os); |
252b5132 RH |
1341 | } |
1342 | } | |
1343 | ||
9232bbb0 AM |
1344 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1345 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1346 | |
1347 | enum bfd_architecture | |
98027b10 | 1348 | ppc_arch (void) |
252b5132 RH |
1349 | { |
1350 | const char *default_cpu = TARGET_CPU; | |
1351 | ppc_set_cpu (); | |
1352 | ||
1353 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1354 | return bfd_arch_powerpc; | |
b9c361e0 JL |
1355 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1356 | return bfd_arch_powerpc; | |
1357 | if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
252b5132 | 1358 | return bfd_arch_rs6000; |
b9c361e0 | 1359 | if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) |
252b5132 RH |
1360 | { |
1361 | if (strcmp (default_cpu, "rs6000") == 0) | |
1362 | return bfd_arch_rs6000; | |
0baf16f2 | 1363 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1364 | return bfd_arch_powerpc; |
1365 | } | |
1366 | ||
d6ed37ed | 1367 | as_fatal (_("neither Power nor PowerPC opcodes were selected.")); |
252b5132 RH |
1368 | return bfd_arch_unknown; |
1369 | } | |
1370 | ||
7f6d05e8 | 1371 | unsigned long |
98027b10 | 1372 | ppc_mach (void) |
7f6d05e8 | 1373 | { |
2a98c3a6 AM |
1374 | if (ppc_obj64) |
1375 | return bfd_mach_ppc64; | |
1376 | else if (ppc_arch () == bfd_arch_rs6000) | |
1377 | return bfd_mach_rs6k; | |
ce3d2015 AM |
1378 | else if (ppc_cpu & PPC_OPCODE_TITAN) |
1379 | return bfd_mach_ppc_titan; | |
b9c361e0 JL |
1380 | else if (ppc_cpu & PPC_OPCODE_VLE) |
1381 | return bfd_mach_ppc_vle; | |
2a98c3a6 AM |
1382 | else |
1383 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1384 | } |
1385 | ||
81d4177b | 1386 | extern char* |
98027b10 | 1387 | ppc_target_format (void) |
7f6d05e8 CP |
1388 | { |
1389 | #ifdef OBJ_COFF | |
1390 | #ifdef TE_PE | |
99a814a1 | 1391 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1392 | #elif TE_POWERMAC |
0baf16f2 | 1393 | return "xcoff-powermac"; |
7f6d05e8 | 1394 | #else |
eb1e0e80 | 1395 | # ifdef TE_AIX5 |
edc1d652 | 1396 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1397 | # else |
edc1d652 | 1398 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1399 | # endif |
7f6d05e8 | 1400 | #endif |
7f6d05e8 CP |
1401 | #endif |
1402 | #ifdef OBJ_ELF | |
edc1d652 AM |
1403 | # ifdef TE_FreeBSD |
1404 | return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); | |
1405 | # elif defined (TE_VXWORKS) | |
9d8504b1 PB |
1406 | return "elf32-powerpc-vxworks"; |
1407 | # else | |
0baf16f2 | 1408 | return (target_big_endian |
2b3c4602 AM |
1409 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1410 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1411 | # endif |
7f6d05e8 CP |
1412 | #endif |
1413 | } | |
1414 | ||
b9c361e0 JL |
1415 | /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. |
1416 | Return TRUE if there's a problem, otherwise FALSE. */ | |
1417 | ||
1418 | static bfd_boolean | |
1419 | insn_validate (const struct powerpc_opcode *op) | |
1420 | { | |
1421 | const unsigned char *o; | |
1422 | unsigned long omask = op->mask; | |
1423 | ||
1424 | /* The mask had better not trim off opcode bits. */ | |
1425 | if ((op->opcode & omask) != op->opcode) | |
1426 | { | |
1427 | as_bad (_("mask trims opcode bits for %s"), op->name); | |
1428 | return TRUE; | |
1429 | } | |
1430 | ||
1431 | /* The operands must not overlap the opcode or each other. */ | |
1432 | for (o = op->operands; *o; ++o) | |
1433 | { | |
1434 | if (*o >= num_powerpc_operands) | |
1435 | { | |
1436 | as_bad (_("operand index error for %s"), op->name); | |
1437 | return TRUE; | |
1438 | } | |
1439 | else | |
1440 | { | |
1441 | const struct powerpc_operand *operand = &powerpc_operands[*o]; | |
1442 | if (operand->shift != PPC_OPSHIFT_INV) | |
1443 | { | |
1444 | unsigned long mask; | |
1445 | ||
1446 | if (operand->shift >= 0) | |
1447 | mask = operand->bitm << operand->shift; | |
1448 | else | |
1449 | mask = operand->bitm >> -operand->shift; | |
1450 | if (omask & mask) | |
1451 | { | |
1452 | as_bad (_("operand %d overlap in %s"), | |
1453 | (int) (o - op->operands), op->name); | |
1454 | return TRUE; | |
1455 | } | |
1456 | omask |= mask; | |
1457 | } | |
1458 | } | |
1459 | } | |
1460 | return FALSE; | |
1461 | } | |
1462 | ||
69c040df | 1463 | /* Insert opcodes and macros into hash tables. Called at startup and |
1fe532cf | 1464 | for .machine pseudo. */ |
252b5132 | 1465 | |
69c040df AM |
1466 | static void |
1467 | ppc_setup_opcodes (void) | |
252b5132 | 1468 | { |
98027b10 | 1469 | const struct powerpc_opcode *op; |
252b5132 RH |
1470 | const struct powerpc_opcode *op_end; |
1471 | const struct powerpc_macro *macro; | |
1472 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1473 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1474 | |
69c040df AM |
1475 | if (ppc_hash != NULL) |
1476 | hash_die (ppc_hash); | |
1477 | if (ppc_macro_hash != NULL) | |
1478 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1479 | |
1480 | /* Insert the opcodes into a hash table. */ | |
1481 | ppc_hash = hash_new (); | |
1482 | ||
c43a438d | 1483 | if (ENABLE_CHECKING) |
b84bf58a | 1484 | { |
c43a438d | 1485 | unsigned int i; |
b84bf58a | 1486 | |
3b8b57a9 AM |
1487 | /* An index into powerpc_operands is stored in struct fix |
1488 | fx_pcrel_adjust which is 8 bits wide. */ | |
1489 | gas_assert (num_powerpc_operands < 256); | |
1490 | ||
c43a438d AM |
1491 | /* Check operand masks. Code here and in the disassembler assumes |
1492 | all the 1's in the mask are contiguous. */ | |
1493 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1494 | { |
c43a438d AM |
1495 | unsigned long mask = powerpc_operands[i].bitm; |
1496 | unsigned long right_bit; | |
1497 | unsigned int j; | |
1498 | ||
1499 | right_bit = mask & -mask; | |
1500 | mask += right_bit; | |
1501 | right_bit = mask & -mask; | |
1502 | if (mask != right_bit) | |
1503 | { | |
1504 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1505 | bad_insn = TRUE; | |
1506 | } | |
1507 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1508 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1509 | sizeof (powerpc_operands[0])) == 0) | |
1510 | { | |
1511 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1512 | j, i); | |
1513 | bad_insn = TRUE; | |
1514 | } | |
b84bf58a AM |
1515 | } |
1516 | } | |
1517 | ||
252b5132 RH |
1518 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1519 | for (op = powerpc_opcodes; op < op_end; op++) | |
1520 | { | |
c43a438d | 1521 | if (ENABLE_CHECKING) |
b84bf58a | 1522 | { |
d815f1a9 | 1523 | if (op != powerpc_opcodes) |
8dbcd839 | 1524 | { |
b9c361e0 JL |
1525 | int old_opcode = PPC_OP (op[-1].opcode); |
1526 | int new_opcode = PPC_OP (op[0].opcode); | |
1527 | ||
1528 | #ifdef PRINT_OPCODE_TABLE | |
c0637f3a PB |
1529 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", |
1530 | op->name, (unsigned int) (op - powerpc_opcodes), | |
1531 | (unsigned int) new_opcode, (unsigned int) op->opcode, | |
1532 | (unsigned int) op->mask, (unsigned long long) op->flags); | |
b9c361e0 JL |
1533 | #endif |
1534 | ||
d815f1a9 AM |
1535 | /* The major opcodes had better be sorted. Code in the |
1536 | disassembler assumes the insns are sorted according to | |
1537 | major opcode. */ | |
b9c361e0 | 1538 | if (new_opcode < old_opcode) |
d815f1a9 AM |
1539 | { |
1540 | as_bad (_("major opcode is not sorted for %s"), | |
1541 | op->name); | |
1542 | bad_insn = TRUE; | |
1543 | } | |
8dbcd839 | 1544 | } |
b9c361e0 JL |
1545 | bad_insn |= insn_validate (op); |
1546 | } | |
c43a438d | 1547 | |
b9c361e0 JL |
1548 | if ((ppc_cpu & op->flags) != 0 |
1549 | && !(ppc_cpu & op->deprecated)) | |
1550 | { | |
1551 | const char *retval; | |
1552 | ||
1553 | retval = hash_insert (ppc_hash, op->name, (void *) op); | |
1554 | if (retval != NULL) | |
c43a438d | 1555 | { |
b9c361e0 | 1556 | as_bad (_("duplicate instruction %s"), |
c43a438d AM |
1557 | op->name); |
1558 | bad_insn = TRUE; | |
1559 | } | |
b9c361e0 JL |
1560 | } |
1561 | } | |
c43a438d | 1562 | |
b9c361e0 JL |
1563 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1564 | for (op = powerpc_opcodes; op < op_end; op++) | |
1565 | hash_insert (ppc_hash, op->name, (void *) op); | |
1566 | ||
1567 | op_end = vle_opcodes + vle_num_opcodes; | |
1568 | for (op = vle_opcodes; op < op_end; op++) | |
1569 | { | |
1570 | if (ENABLE_CHECKING) | |
1571 | { | |
1572 | if (op != vle_opcodes) | |
1573 | { | |
1574 | unsigned old_seg, new_seg; | |
1575 | ||
1576 | old_seg = VLE_OP (op[-1].opcode, op[-1].mask); | |
1577 | old_seg = VLE_OP_TO_SEG (old_seg); | |
1578 | new_seg = VLE_OP (op[0].opcode, op[0].mask); | |
1579 | new_seg = VLE_OP_TO_SEG (new_seg); | |
1580 | ||
1581 | #ifdef PRINT_OPCODE_TABLE | |
c0637f3a PB |
1582 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", |
1583 | op->name, (unsigned int) (op - powerpc_opcodes), | |
1584 | (unsigned int) new_seg, (unsigned int) op->opcode, | |
1585 | (unsigned int) op->mask, (unsigned long long) op->flags); | |
b9c361e0 JL |
1586 | #endif |
1587 | /* The major opcodes had better be sorted. Code in the | |
1588 | disassembler assumes the insns are sorted according to | |
1589 | major opcode. */ | |
1590 | if (new_seg < old_seg) | |
1591 | { | |
1592 | as_bad (_("major opcode is not sorted for %s"), | |
1593 | op->name); | |
1594 | bad_insn = TRUE; | |
1595 | } | |
1596 | } | |
1597 | ||
1598 | bad_insn |= insn_validate (op); | |
c43a438d | 1599 | } |
252b5132 | 1600 | |
bdc70b4a | 1601 | if ((ppc_cpu & op->flags) != 0 |
1cb0a767 | 1602 | && !(ppc_cpu & op->deprecated)) |
252b5132 RH |
1603 | { |
1604 | const char *retval; | |
1605 | ||
98027b10 | 1606 | retval = hash_insert (ppc_hash, op->name, (void *) op); |
69c040df | 1607 | if (retval != NULL) |
252b5132 | 1608 | { |
b84bf58a | 1609 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1610 | op->name); |
b84bf58a | 1611 | bad_insn = TRUE; |
252b5132 RH |
1612 | } |
1613 | } | |
1614 | } | |
1615 | ||
b9c361e0 JL |
1616 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1617 | for (op = vle_opcodes; op < op_end; op++) | |
98027b10 | 1618 | hash_insert (ppc_hash, op->name, (void *) op); |
3c9030c1 | 1619 | |
252b5132 RH |
1620 | /* Insert the macros into a hash table. */ |
1621 | ppc_macro_hash = hash_new (); | |
1622 | ||
1623 | macro_end = powerpc_macros + powerpc_num_macros; | |
1624 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1625 | { | |
33740db9 | 1626 | if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) |
252b5132 RH |
1627 | { |
1628 | const char *retval; | |
1629 | ||
98027b10 | 1630 | retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); |
252b5132 RH |
1631 | if (retval != (const char *) NULL) |
1632 | { | |
b84bf58a AM |
1633 | as_bad (_("duplicate macro %s"), macro->name); |
1634 | bad_insn = TRUE; | |
252b5132 RH |
1635 | } |
1636 | } | |
1637 | } | |
1638 | ||
b84bf58a | 1639 | if (bad_insn) |
252b5132 | 1640 | abort (); |
69c040df AM |
1641 | } |
1642 | ||
1643 | /* This function is called when the assembler starts up. It is called | |
1644 | after the options have been parsed and the output file has been | |
1645 | opened. */ | |
1646 | ||
1647 | void | |
98027b10 | 1648 | md_begin (void) |
69c040df AM |
1649 | { |
1650 | ppc_set_cpu (); | |
1651 | ||
1652 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
8fbf7334 | 1653 | ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; |
69c040df AM |
1654 | |
1655 | #ifdef OBJ_ELF | |
1656 | /* Set the ELF flags if desired. */ | |
1657 | if (ppc_flags && !msolaris) | |
1658 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1659 | #endif | |
1660 | ||
1661 | ppc_setup_opcodes (); | |
252b5132 | 1662 | |
67c1ffbe | 1663 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1664 | by the user. */ |
252b5132 RH |
1665 | if (!set_target_endian) |
1666 | { | |
1667 | set_target_endian = 1; | |
1668 | target_big_endian = PPC_BIG_ENDIAN; | |
1669 | } | |
1670 | ||
1671 | #ifdef OBJ_XCOFF | |
1672 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1673 | ||
1674 | /* Create dummy symbols to serve as initial csects. This forces the | |
1675 | text csects to precede the data csects. These symbols will not | |
1676 | be output. */ | |
1677 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1678 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1679 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1680 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1681 | #endif |
1682 | ||
1683 | #ifdef TE_PE | |
1684 | ||
1685 | ppc_current_section = text_section; | |
81d4177b | 1686 | ppc_previous_section = 0; |
252b5132 RH |
1687 | |
1688 | #endif | |
1689 | } | |
1690 | ||
6a0c61b7 | 1691 | void |
98027b10 | 1692 | ppc_cleanup (void) |
6a0c61b7 | 1693 | { |
dc1d03fc | 1694 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1695 | if (ppc_apuinfo_list == NULL) |
1696 | return; | |
1697 | ||
1698 | /* Ok, so write the section info out. We have this layout: | |
1699 | ||
1700 | byte data what | |
1701 | ---- ---- ---- | |
1702 | 0 8 length of "APUinfo\0" | |
1703 | 4 (n*4) number of APU's (4 bytes each) | |
1704 | 8 2 note type 2 | |
1705 | 12 "APUinfo\0" name | |
1706 | 20 APU#1 first APU's info | |
1707 | 24 APU#2 second APU's info | |
1708 | ... ... | |
1709 | */ | |
1710 | { | |
1711 | char *p; | |
1712 | asection *seg = now_seg; | |
1713 | subsegT subseg = now_subseg; | |
1714 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1715 | unsigned int i; |
6a0c61b7 EZ |
1716 | |
1717 | /* Create the .PPC.EMB.apuinfo section. */ | |
1718 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1719 | bfd_set_section_flags (stdoutput, | |
1720 | apuinfo_secp, | |
e1a9cb8e | 1721 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1722 | |
1723 | p = frag_more (4); | |
1724 | md_number_to_chars (p, (valueT) 8, 4); | |
1725 | ||
1726 | p = frag_more (4); | |
e98d298c | 1727 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1728 | |
1729 | p = frag_more (4); | |
1730 | md_number_to_chars (p, (valueT) 2, 4); | |
1731 | ||
1732 | p = frag_more (8); | |
1733 | strcpy (p, "APUinfo"); | |
1734 | ||
1735 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1736 | { | |
b34976b6 AM |
1737 | p = frag_more (4); |
1738 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1739 | } |
1740 | ||
1741 | frag_align (2, 0, 0); | |
1742 | ||
1743 | /* We probably can't restore the current segment, for there likely | |
1744 | isn't one yet... */ | |
1745 | if (seg && subseg) | |
1746 | subseg_set (seg, subseg); | |
1747 | } | |
dc1d03fc | 1748 | #endif |
6a0c61b7 EZ |
1749 | } |
1750 | ||
252b5132 RH |
1751 | /* Insert an operand value into an instruction. */ |
1752 | ||
1753 | static unsigned long | |
a1867a27 AM |
1754 | ppc_insert_operand (unsigned long insn, |
1755 | const struct powerpc_operand *operand, | |
1756 | offsetT val, | |
91d6fa6a | 1757 | ppc_cpu_t cpu, |
a1867a27 AM |
1758 | char *file, |
1759 | unsigned int line) | |
252b5132 | 1760 | { |
b84bf58a | 1761 | long min, max, right; |
eb42fac1 | 1762 | |
b84bf58a AM |
1763 | max = operand->bitm; |
1764 | right = max & -max; | |
1765 | min = 0; | |
1766 | ||
1767 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1768 | { |
b84bf58a | 1769 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1770 | max = (max >> 1) & -right; |
1771 | min = ~max & -right; | |
b84bf58a | 1772 | } |
252b5132 | 1773 | |
b84bf58a | 1774 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1775 | max++; |
252b5132 | 1776 | |
b84bf58a | 1777 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 AM |
1778 | { |
1779 | long tmp = min; | |
1780 | min = -max; | |
1781 | max = -tmp; | |
1782 | } | |
b84bf58a | 1783 | |
a1867a27 AM |
1784 | if (min <= max) |
1785 | { | |
1786 | /* Some people write constants with the sign extension done by | |
1787 | hand but only up to 32 bits. This shouldn't really be valid, | |
1788 | but, to permit this code to assemble on a 64-bit host, we | |
1789 | sign extend the 32-bit value to 64 bits if so doing makes the | |
1790 | value valid. */ | |
1791 | if (val > max | |
1792 | && (offsetT) (val - 0x80000000 - 0x80000000) >= min | |
1793 | && (offsetT) (val - 0x80000000 - 0x80000000) <= max | |
1794 | && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) | |
1795 | val = val - 0x80000000 - 0x80000000; | |
1796 | ||
1797 | /* Similarly, people write expressions like ~(1<<15), and expect | |
1798 | this to be OK for a 32-bit unsigned value. */ | |
1799 | else if (val < min | |
1800 | && (offsetT) (val + 0x80000000 + 0x80000000) >= min | |
1801 | && (offsetT) (val + 0x80000000 + 0x80000000) <= max | |
1802 | && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) | |
1803 | val = val + 0x80000000 + 0x80000000; | |
1804 | ||
1805 | else if (val < min | |
1806 | || val > max | |
1807 | || (val & (right - 1)) != 0) | |
1808 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
1809 | } | |
b84bf58a | 1810 | |
252b5132 RH |
1811 | if (operand->insert) |
1812 | { | |
1813 | const char *errmsg; | |
1814 | ||
1815 | errmsg = NULL; | |
91d6fa6a | 1816 | insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); |
252b5132 | 1817 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 1818 | as_bad_where (file, line, "%s", errmsg); |
252b5132 | 1819 | } |
b9c361e0 | 1820 | else if (operand->shift >= 0) |
b84bf58a | 1821 | insn |= ((long) val & operand->bitm) << operand->shift; |
b9c361e0 JL |
1822 | else |
1823 | insn |= ((long) val & operand->bitm) >> -operand->shift; | |
252b5132 RH |
1824 | |
1825 | return insn; | |
1826 | } | |
1827 | ||
1828 | \f | |
1829 | #ifdef OBJ_ELF | |
1830 | /* Parse @got, etc. and return the desired relocation. */ | |
1831 | static bfd_reloc_code_real_type | |
98027b10 | 1832 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
1833 | { |
1834 | struct map_bfd { | |
1835 | char *string; | |
b7d7dc63 AM |
1836 | unsigned int length : 8; |
1837 | unsigned int valid32 : 1; | |
1838 | unsigned int valid64 : 1; | |
1839 | unsigned int reloc; | |
252b5132 RH |
1840 | }; |
1841 | ||
1842 | char ident[20]; | |
1843 | char *str = *str_p; | |
1844 | char *str2; | |
1845 | int ch; | |
1846 | int len; | |
15c1449b | 1847 | const struct map_bfd *ptr; |
252b5132 | 1848 | |
b7d7dc63 AM |
1849 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1850 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1851 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1852 | |
15c1449b | 1853 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1854 | MAP ("l", BFD_RELOC_LO16), |
1855 | MAP ("h", BFD_RELOC_HI16), | |
1856 | MAP ("ha", BFD_RELOC_HI16_S), | |
1857 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1858 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1859 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1860 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1861 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1862 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1863 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1864 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1865 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1866 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1867 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1868 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1869 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1870 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1871 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1872 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1873 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1874 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1875 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1876 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1877 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1878 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1879 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1880 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1881 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1882 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1883 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1884 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1885 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1886 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1887 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1888 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1889 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1890 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1891 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1892 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1893 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1894 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1895 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1896 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1897 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1898 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1899 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1900 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1901 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1902 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1903 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1904 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
b9c361e0 JL |
1905 | MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), |
1906 | MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), | |
1907 | MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), | |
b7d7dc63 AM |
1908 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), |
1909 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1910 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1911 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1912 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1913 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1914 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1915 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1916 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
b9c361e0 | 1917 | MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), |
b7d7dc63 AM |
1918 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), |
1919 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1920 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1921 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1922 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1923 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1924 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1925 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
1926 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), | |
1927 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1928 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1929 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1930 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1931 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1932 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1933 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1934 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
1935 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), | |
1936 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1937 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1938 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
1939 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), | |
1940 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1941 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1942 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
1943 | { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } | |
252b5132 RH |
1944 | }; |
1945 | ||
1946 | if (*str++ != '@') | |
1947 | return BFD_RELOC_UNUSED; | |
1948 | ||
1949 | for (ch = *str, str2 = ident; | |
1950 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1951 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
1952 | ch = *++str) |
1953 | { | |
3882b010 | 1954 | *str2++ = TOLOWER (ch); |
252b5132 RH |
1955 | } |
1956 | ||
1957 | *str2 = '\0'; | |
1958 | len = str2 - ident; | |
1959 | ||
1960 | ch = ident[0]; | |
1961 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
1962 | if (ch == ptr->string[0] | |
1963 | && len == ptr->length | |
b7d7dc63 AM |
1964 | && memcmp (ident, ptr->string, ptr->length) == 0 |
1965 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 1966 | { |
15c1449b AM |
1967 | int reloc = ptr->reloc; |
1968 | ||
727fc41e AM |
1969 | if (!ppc_obj64 && exp_p->X_add_number != 0) |
1970 | { | |
1971 | switch (reloc) | |
1972 | { | |
1973 | case BFD_RELOC_16_GOTOFF: | |
1974 | case BFD_RELOC_LO16_GOTOFF: | |
1975 | case BFD_RELOC_HI16_GOTOFF: | |
1976 | case BFD_RELOC_HI16_S_GOTOFF: | |
1977 | as_warn (_("identifier+constant@got means " | |
1978 | "identifier@got+constant")); | |
1979 | break; | |
1980 | ||
1981 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
1982 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
1983 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
1984 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
1985 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
1986 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
1987 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
1988 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
1989 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
1990 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
1991 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
1992 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
1993 | case BFD_RELOC_PPC_GOT_TPREL16: | |
1994 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
1995 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
1996 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
1997 | as_bad (_("symbol+offset not supported for got tls")); | |
1998 | break; | |
1999 | } | |
2000 | } | |
5f6db75a AM |
2001 | |
2002 | /* Now check for identifier@suffix+constant. */ | |
2003 | if (*str == '-' || *str == '+') | |
252b5132 | 2004 | { |
5f6db75a AM |
2005 | char *orig_line = input_line_pointer; |
2006 | expressionS new_exp; | |
2007 | ||
2008 | input_line_pointer = str; | |
2009 | expression (&new_exp); | |
2010 | if (new_exp.X_op == O_constant) | |
252b5132 | 2011 | { |
5f6db75a AM |
2012 | exp_p->X_add_number += new_exp.X_add_number; |
2013 | str = input_line_pointer; | |
252b5132 | 2014 | } |
5f6db75a AM |
2015 | |
2016 | if (&input_line_pointer != str_p) | |
2017 | input_line_pointer = orig_line; | |
252b5132 | 2018 | } |
252b5132 | 2019 | *str_p = str; |
0baf16f2 | 2020 | |
2b3c4602 | 2021 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2022 | && exp_p->X_op == O_symbol |
2023 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2024 | { |
9f2b53d7 AM |
2025 | /* Change the symbol so that the dummy .TOC. symbol can be |
2026 | omitted from the object file. */ | |
0baf16f2 AM |
2027 | exp_p->X_add_symbol = &abs_symbol; |
2028 | } | |
2029 | ||
15c1449b | 2030 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2031 | } |
2032 | ||
2033 | return BFD_RELOC_UNUSED; | |
2034 | } | |
2035 | ||
99a814a1 AM |
2036 | /* Like normal .long/.short/.word, except support @got, etc. |
2037 | Clobbers input_line_pointer, checks end-of-line. */ | |
252b5132 | 2038 | static void |
98027b10 | 2039 | ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */) |
252b5132 RH |
2040 | { |
2041 | expressionS exp; | |
2042 | bfd_reloc_code_real_type reloc; | |
2043 | ||
2044 | if (is_it_end_of_statement ()) | |
2045 | { | |
2046 | demand_empty_rest_of_line (); | |
2047 | return; | |
2048 | } | |
2049 | ||
2050 | do | |
2051 | { | |
2052 | expression (&exp); | |
2053 | if (exp.X_op == O_symbol | |
2054 | && *input_line_pointer == '@' | |
99a814a1 AM |
2055 | && (reloc = ppc_elf_suffix (&input_line_pointer, |
2056 | &exp)) != BFD_RELOC_UNUSED) | |
252b5132 | 2057 | { |
99a814a1 AM |
2058 | reloc_howto_type *reloc_howto; |
2059 | int size; | |
2060 | ||
2061 | reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
2062 | size = bfd_get_reloc_size (reloc_howto); | |
252b5132 RH |
2063 | |
2064 | if (size > nbytes) | |
0baf16f2 AM |
2065 | { |
2066 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
2067 | reloc_howto->name, nbytes); | |
2068 | } | |
252b5132 RH |
2069 | else |
2070 | { | |
0baf16f2 AM |
2071 | char *p; |
2072 | int offset; | |
252b5132 | 2073 | |
0baf16f2 | 2074 | p = frag_more (nbytes); |
aa0c8c1a | 2075 | memset (p, 0, nbytes); |
0baf16f2 AM |
2076 | offset = 0; |
2077 | if (target_big_endian) | |
2078 | offset = nbytes - size; | |
99a814a1 AM |
2079 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
2080 | &exp, 0, reloc); | |
252b5132 RH |
2081 | } |
2082 | } | |
2083 | else | |
2084 | emit_expr (&exp, (unsigned int) nbytes); | |
2085 | } | |
2086 | while (*input_line_pointer++ == ','); | |
2087 | ||
99a814a1 AM |
2088 | /* Put terminator back into stream. */ |
2089 | input_line_pointer--; | |
252b5132 RH |
2090 | demand_empty_rest_of_line (); |
2091 | } | |
2092 | ||
2093 | /* Solaris pseduo op to change to the .rodata section. */ | |
2094 | static void | |
98027b10 | 2095 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2096 | { |
2097 | char *save_line = input_line_pointer; | |
2098 | static char section[] = ".rodata\n"; | |
2099 | ||
99a814a1 | 2100 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2101 | input_line_pointer = section; |
2102 | obj_elf_section (xxx); | |
2103 | ||
2104 | input_line_pointer = save_line; | |
2105 | } | |
2106 | ||
99a814a1 | 2107 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2108 | static void |
98027b10 | 2109 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2110 | { |
98027b10 AM |
2111 | char *name; |
2112 | char c; | |
2113 | char *p; | |
252b5132 | 2114 | offsetT size; |
98027b10 | 2115 | symbolS *symbolP; |
252b5132 RH |
2116 | offsetT align; |
2117 | segT old_sec; | |
2118 | int old_subsec; | |
2119 | char *pfrag; | |
2120 | int align2; | |
2121 | ||
2122 | name = input_line_pointer; | |
2123 | c = get_symbol_end (); | |
2124 | ||
99a814a1 | 2125 | /* just after name is now '\0'. */ |
252b5132 RH |
2126 | p = input_line_pointer; |
2127 | *p = c; | |
2128 | SKIP_WHITESPACE (); | |
2129 | if (*input_line_pointer != ',') | |
2130 | { | |
d6ed37ed | 2131 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
2132 | ignore_rest_of_line (); |
2133 | return; | |
2134 | } | |
2135 | ||
2136 | input_line_pointer++; /* skip ',' */ | |
2137 | if ((size = get_absolute_expression ()) < 0) | |
2138 | { | |
2139 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2140 | ignore_rest_of_line (); | |
2141 | return; | |
2142 | } | |
2143 | ||
2144 | /* The third argument to .lcomm is the alignment. */ | |
2145 | if (*input_line_pointer != ',') | |
2146 | align = 8; | |
2147 | else | |
2148 | { | |
2149 | ++input_line_pointer; | |
2150 | align = get_absolute_expression (); | |
2151 | if (align <= 0) | |
2152 | { | |
2153 | as_warn (_("ignoring bad alignment")); | |
2154 | align = 8; | |
2155 | } | |
2156 | } | |
2157 | ||
2158 | *p = 0; | |
2159 | symbolP = symbol_find_or_make (name); | |
2160 | *p = c; | |
2161 | ||
2162 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2163 | { | |
d6ed37ed | 2164 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
2165 | S_GET_NAME (symbolP)); |
2166 | ignore_rest_of_line (); | |
2167 | return; | |
2168 | } | |
2169 | ||
2170 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2171 | { | |
d6ed37ed | 2172 | as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
2173 | S_GET_NAME (symbolP), |
2174 | (long) S_GET_VALUE (symbolP), | |
2175 | (long) size); | |
2176 | ||
2177 | ignore_rest_of_line (); | |
2178 | return; | |
2179 | } | |
2180 | ||
99a814a1 | 2181 | /* Allocate_bss. */ |
252b5132 RH |
2182 | old_sec = now_seg; |
2183 | old_subsec = now_subseg; | |
2184 | if (align) | |
2185 | { | |
99a814a1 | 2186 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2187 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2188 | if (align != 1) | |
2189 | { | |
d6ed37ed | 2190 | as_bad (_("common alignment not a power of 2")); |
252b5132 RH |
2191 | ignore_rest_of_line (); |
2192 | return; | |
2193 | } | |
2194 | } | |
2195 | else | |
2196 | align2 = 0; | |
2197 | ||
2198 | record_alignment (bss_section, align2); | |
2199 | subseg_set (bss_section, 0); | |
2200 | if (align2) | |
2201 | frag_align (align2, 0, 0); | |
2202 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2203 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2204 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2205 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2206 | (char *) 0); | |
2207 | *pfrag = 0; | |
2208 | S_SET_SIZE (symbolP, size); | |
2209 | S_SET_SEGMENT (symbolP, bss_section); | |
2210 | subseg_set (old_sec, old_subsec); | |
2211 | demand_empty_rest_of_line (); | |
2212 | } | |
2213 | ||
2214 | /* Validate any relocations emitted for -mrelocatable, possibly adding | |
2215 | fixups for word relocations in writable segments, so we can adjust | |
2216 | them at runtime. */ | |
2217 | static void | |
98027b10 | 2218 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2219 | { |
2220 | if (fixp->fx_done || fixp->fx_pcrel) | |
2221 | return; | |
2222 | ||
2223 | switch (shlib) | |
2224 | { | |
2225 | case SHLIB_NONE: | |
2226 | case SHLIB_PIC: | |
2227 | return; | |
2228 | ||
5d6f4f16 | 2229 | case SHLIB_MRELOCATABLE: |
252b5132 RH |
2230 | if (fixp->fx_r_type <= BFD_RELOC_UNUSED |
2231 | && fixp->fx_r_type != BFD_RELOC_16_GOTOFF | |
2232 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
2233 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2234 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2235 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2236 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2237 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2238 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2239 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2240 | && strcmp (segment_name (seg), ".got2") != 0 |
2241 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2242 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2243 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2244 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2245 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2246 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2247 | { | |
2248 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2249 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2250 | { | |
2251 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
d6ed37ed | 2252 | _("relocation cannot be done when using -mrelocatable")); |
252b5132 RH |
2253 | } |
2254 | } | |
2255 | return; | |
2256 | } | |
2257 | } | |
0baf16f2 | 2258 | |
7e8d4ab4 AM |
2259 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2260 | function descriptor sym if the corresponding code sym is used. */ | |
2261 | ||
2262 | void | |
98027b10 | 2263 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2264 | { |
7e8d4ab4 | 2265 | symbolS *symp; |
9232bbb0 | 2266 | asection *toc; |
0baf16f2 | 2267 | |
7e8d4ab4 AM |
2268 | if (!ppc_obj64) |
2269 | return; | |
2270 | ||
2271 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2272 | { |
7e8d4ab4 AM |
2273 | const char *name; |
2274 | char *dotname; | |
2275 | symbolS *dotsym; | |
2276 | size_t len; | |
2277 | ||
2278 | name = S_GET_NAME (symp); | |
2279 | if (name[0] == '.') | |
2280 | continue; | |
2281 | ||
2282 | if (! S_IS_WEAK (symp) | |
2283 | || S_IS_DEFINED (symp)) | |
2284 | continue; | |
2285 | ||
2286 | len = strlen (name) + 1; | |
2287 | dotname = xmalloc (len + 1); | |
2288 | dotname[0] = '.'; | |
2289 | memcpy (dotname + 1, name, len); | |
461b725f | 2290 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2291 | free (dotname); |
2292 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2293 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2294 | symbol_mark_used (symp); |
2295 | ||
0baf16f2 AM |
2296 | } |
2297 | ||
9232bbb0 AM |
2298 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2299 | if (toc != NULL | |
01efc3af | 2300 | && toc_reloc_types != has_large_toc_reloc |
9232bbb0 AM |
2301 | && bfd_section_size (stdoutput, toc) > 0x10000) |
2302 | as_warn (_("TOC section size exceeds 64k")); | |
a38a07e0 AM |
2303 | } |
2304 | ||
2305 | /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be | |
2306 | emitted. Other uses of .TOC. will cause the symbol to be marked | |
2307 | with BSF_KEEP in md_apply_fix. */ | |
9232bbb0 | 2308 | |
a38a07e0 AM |
2309 | void |
2310 | ppc_elf_adjust_symtab (void) | |
2311 | { | |
2312 | if (ppc_obj64) | |
2313 | { | |
2314 | symbolS *symp; | |
2315 | symp = symbol_find (".TOC."); | |
2316 | if (symp != NULL) | |
2317 | { | |
2318 | asymbol *bsym = symbol_get_bfdsym (symp); | |
2319 | if ((bsym->flags & BSF_KEEP) == 0) | |
2320 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
2321 | else | |
2322 | S_SET_WEAK (symp); | |
2323 | } | |
2324 | } | |
0baf16f2 | 2325 | } |
252b5132 RH |
2326 | #endif /* OBJ_ELF */ |
2327 | \f | |
2328 | #ifdef TE_PE | |
2329 | ||
2330 | /* | |
99a814a1 | 2331 | * Summary of parse_toc_entry. |
252b5132 RH |
2332 | * |
2333 | * in: Input_line_pointer points to the '[' in one of: | |
2334 | * | |
2335 | * [toc] [tocv] [toc32] [toc64] | |
2336 | * | |
2337 | * Anything else is an error of one kind or another. | |
2338 | * | |
81d4177b | 2339 | * out: |
252b5132 RH |
2340 | * return value: success or failure |
2341 | * toc_kind: kind of toc reference | |
2342 | * input_line_pointer: | |
2343 | * success: first char after the ']' | |
2344 | * failure: unchanged | |
2345 | * | |
2346 | * settings: | |
2347 | * | |
2348 | * [toc] - rv == success, toc_kind = default_toc | |
2349 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2350 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2351 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2352 | * | |
2353 | */ | |
2354 | ||
81d4177b KH |
2355 | enum toc_size_qualifier |
2356 | { | |
252b5132 RH |
2357 | default_toc, /* The toc cell constructed should be the system default size */ |
2358 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2359 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2360 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2361 | }; | |
2362 | ||
2363 | static int | |
98027b10 | 2364 | parse_toc_entry (enum toc_size_qualifier *toc_kind) |
252b5132 RH |
2365 | { |
2366 | char *start; | |
2367 | char *toc_spec; | |
2368 | char c; | |
2369 | enum toc_size_qualifier t; | |
2370 | ||
99a814a1 | 2371 | /* Save the input_line_pointer. */ |
252b5132 RH |
2372 | start = input_line_pointer; |
2373 | ||
99a814a1 | 2374 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2375 | ++input_line_pointer; |
2376 | SKIP_WHITESPACE (); | |
81d4177b | 2377 | |
99a814a1 | 2378 | /* Find the spelling of the operand. */ |
252b5132 RH |
2379 | toc_spec = input_line_pointer; |
2380 | c = get_symbol_end (); | |
2381 | ||
99a814a1 | 2382 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2383 | { |
2384 | t = default_toc; | |
2385 | } | |
99a814a1 | 2386 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2387 | { |
2388 | t = data_in_toc; | |
2389 | } | |
99a814a1 | 2390 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2391 | { |
2392 | t = must_be_32; | |
2393 | } | |
99a814a1 | 2394 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2395 | { |
2396 | t = must_be_64; | |
2397 | } | |
2398 | else | |
2399 | { | |
2400 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2401 | *input_line_pointer = c; |
2402 | input_line_pointer = start; | |
252b5132 RH |
2403 | return 0; |
2404 | } | |
2405 | ||
99a814a1 AM |
2406 | /* Now find the ']'. */ |
2407 | *input_line_pointer = c; | |
252b5132 | 2408 | |
81d4177b KH |
2409 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2410 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2411 | |
2412 | if (c != ']') | |
2413 | { | |
2414 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2415 | input_line_pointer = start; |
252b5132 RH |
2416 | return 0; |
2417 | } | |
2418 | ||
99a814a1 | 2419 | *toc_kind = t; |
252b5132 RH |
2420 | return 1; |
2421 | } | |
2422 | #endif | |
3b8b57a9 AM |
2423 | |
2424 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
2425 | /* See whether a symbol is in the TOC section. */ | |
2426 | ||
2427 | static int | |
2428 | ppc_is_toc_sym (symbolS *sym) | |
2429 | { | |
2430 | #ifdef OBJ_XCOFF | |
9f6e76f4 TG |
2431 | return (symbol_get_tc (sym)->symbol_class == XMC_TC |
2432 | || symbol_get_tc (sym)->symbol_class == XMC_TC0); | |
3b8b57a9 AM |
2433 | #endif |
2434 | #ifdef OBJ_ELF | |
2435 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2436 | if (ppc_obj64) | |
2437 | return strcmp (sname, ".toc") == 0; | |
2438 | else | |
2439 | return strcmp (sname, ".got") == 0; | |
2440 | #endif | |
2441 | } | |
2442 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
2443 | \f |
2444 | ||
dc1d03fc | 2445 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2446 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2447 | static void | |
98027b10 | 2448 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2449 | { |
2450 | unsigned int i; | |
2451 | ||
2452 | /* Check we don't already exist. */ | |
2453 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2454 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2455 | return; |
b34976b6 | 2456 | |
6a0c61b7 EZ |
2457 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2458 | { | |
2459 | if (ppc_apuinfo_num_alloc == 0) | |
2460 | { | |
2461 | ppc_apuinfo_num_alloc = 4; | |
2462 | ppc_apuinfo_list = (unsigned long *) | |
2463 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2464 | } | |
2465 | else | |
2466 | { | |
2467 | ppc_apuinfo_num_alloc += 4; | |
2468 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2469 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2470 | } | |
2471 | } | |
dc1d03fc | 2472 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2473 | } |
2474 | #undef APUID | |
dc1d03fc | 2475 | #endif |
6a0c61b7 EZ |
2476 | \f |
2477 | ||
252b5132 RH |
2478 | /* We need to keep a list of fixups. We can't simply generate them as |
2479 | we go, because that would require us to first create the frag, and | |
2480 | that would screw up references to ``.''. */ | |
2481 | ||
2482 | struct ppc_fixup | |
2483 | { | |
2484 | expressionS exp; | |
2485 | int opindex; | |
2486 | bfd_reloc_code_real_type reloc; | |
2487 | }; | |
2488 | ||
2489 | #define MAX_INSN_FIXUPS (5) | |
2490 | ||
b9c361e0 JL |
2491 | /* Form I16L. */ |
2492 | #define E_OR2I_INSN 0x7000C000 | |
2493 | #define E_AND2I_DOT_INSN 0x7000C800 | |
2494 | #define E_OR2IS_INSN 0x7000D000 | |
2495 | #define E_LIS_INSN 0x7000E000 | |
2496 | #define E_AND2IS_DOT_INSN 0x7000E800 | |
2497 | ||
2498 | /* Form I16A. */ | |
2499 | #define E_ADD2I_DOT_INSN 0x70008800 | |
2500 | #define E_ADD2IS_INSN 0x70009000 | |
2501 | #define E_CMP16I_INSN 0x70009800 | |
2502 | #define E_MULL2I_INSN 0x7000A000 | |
2503 | #define E_CMPL16I_INSN 0x7000A800 | |
2504 | #define E_CMPH16I_INSN 0x7000B000 | |
2505 | #define E_CMPHL16I_INSN 0x7000B800 | |
2506 | ||
252b5132 RH |
2507 | /* This routine is called for each instruction to be assembled. */ |
2508 | ||
2509 | void | |
98027b10 | 2510 | md_assemble (char *str) |
252b5132 RH |
2511 | { |
2512 | char *s; | |
2513 | const struct powerpc_opcode *opcode; | |
2514 | unsigned long insn; | |
2515 | const unsigned char *opindex_ptr; | |
2516 | int skip_optional; | |
2517 | int need_paren; | |
2518 | int next_opindex; | |
2519 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2520 | int fc; | |
2521 | char *f; | |
09b935ac | 2522 | int addr_mod; |
252b5132 | 2523 | int i; |
b9c361e0 | 2524 | unsigned int insn_length; |
252b5132 RH |
2525 | |
2526 | /* Get the opcode. */ | |
3882b010 | 2527 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2528 | ; |
2529 | if (*s != '\0') | |
2530 | *s++ = '\0'; | |
2531 | ||
2532 | /* Look up the opcode in the hash table. */ | |
2533 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2534 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2535 | { | |
2536 | const struct powerpc_macro *macro; | |
2537 | ||
2538 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2539 | if (macro == (const struct powerpc_macro *) NULL) | |
d6ed37ed | 2540 | as_bad (_("unrecognized opcode: `%s'"), str); |
252b5132 RH |
2541 | else |
2542 | ppc_macro (s, macro); | |
2543 | ||
2544 | return; | |
2545 | } | |
2546 | ||
2547 | insn = opcode->opcode; | |
2548 | ||
2549 | str = s; | |
3882b010 | 2550 | while (ISSPACE (*str)) |
252b5132 RH |
2551 | ++str; |
2552 | ||
2553 | /* PowerPC operands are just expressions. The only real issue is | |
2554 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2555 | an optional operand separate the operands only with commas (in some |
2556 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2557 | have optional operands). Most instructions with optional operands | |
2558 | have only one. Those that have more than one optional operand can | |
2559 | take either all their operands or none. So, before we start seriously | |
2560 | parsing the operands, we check to see if we have optional operands, | |
2561 | and if we do, we count the number of commas to see which operands | |
2562 | have been omitted. */ | |
252b5132 RH |
2563 | skip_optional = 0; |
2564 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2565 | { | |
2566 | const struct powerpc_operand *operand; | |
2567 | ||
2568 | operand = &powerpc_operands[*opindex_ptr]; | |
2569 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2570 | { | |
2571 | unsigned int opcount; | |
7fe9cf6b | 2572 | unsigned int num_operands_expected; |
252b5132 RH |
2573 | |
2574 | /* There is an optional operand. Count the number of | |
2575 | commas in the input line. */ | |
2576 | if (*str == '\0') | |
2577 | opcount = 0; | |
2578 | else | |
2579 | { | |
2580 | opcount = 1; | |
2581 | s = str; | |
2582 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2583 | { | |
2584 | ++opcount; | |
2585 | ++s; | |
2586 | } | |
2587 | } | |
2588 | ||
7fe9cf6b NC |
2589 | /* Compute the number of expected operands. |
2590 | Do not count fake operands. */ | |
2591 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2592 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2593 | ++ num_operands_expected; | |
2594 | ||
252b5132 RH |
2595 | /* If there are fewer operands in the line then are called |
2596 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2597 | operands. */ |
7fe9cf6b | 2598 | if (opcount < num_operands_expected) |
252b5132 RH |
2599 | skip_optional = 1; |
2600 | ||
2601 | break; | |
2602 | } | |
2603 | } | |
2604 | ||
2605 | /* Gather the operands. */ | |
2606 | need_paren = 0; | |
2607 | next_opindex = 0; | |
2608 | fc = 0; | |
2609 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2610 | { | |
2611 | const struct powerpc_operand *operand; | |
2612 | const char *errmsg; | |
2613 | char *hold; | |
2614 | expressionS ex; | |
2615 | char endc; | |
2616 | ||
2617 | if (next_opindex == 0) | |
2618 | operand = &powerpc_operands[*opindex_ptr]; | |
2619 | else | |
2620 | { | |
2621 | operand = &powerpc_operands[next_opindex]; | |
2622 | next_opindex = 0; | |
2623 | } | |
252b5132 RH |
2624 | errmsg = NULL; |
2625 | ||
2626 | /* If this is a fake operand, then we do not expect anything | |
2627 | from the input. */ | |
2628 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2629 | { | |
2b3c4602 | 2630 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2631 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2632 | as_bad ("%s", errmsg); |
252b5132 RH |
2633 | continue; |
2634 | } | |
2635 | ||
2636 | /* If this is an optional operand, and we are skipping it, just | |
2637 | insert a zero. */ | |
2638 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2639 | && skip_optional) | |
2640 | { | |
2641 | if (operand->insert) | |
2642 | { | |
2b3c4602 | 2643 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2644 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2645 | as_bad ("%s", errmsg); |
252b5132 RH |
2646 | } |
2647 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2648 | next_opindex = *opindex_ptr + 1; | |
2649 | continue; | |
2650 | } | |
2651 | ||
2652 | /* Gather the operand. */ | |
2653 | hold = input_line_pointer; | |
2654 | input_line_pointer = str; | |
2655 | ||
2656 | #ifdef TE_PE | |
81d4177b | 2657 | if (*input_line_pointer == '[') |
252b5132 RH |
2658 | { |
2659 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2660 | * |
2661 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2662 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2663 | * The argument following the `]' must be a symbol name, and the | |
2664 | * register must be the toc register: 'rtoc' or '2' | |
2665 | * | |
2666 | * The effect is to 0 as the displacement field | |
2667 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2668 | * the appropriate variation) reloc against it based on the symbol. | |
2669 | * The linker will build the toc, and insert the resolved toc offset. | |
2670 | * | |
2671 | * Note: | |
2672 | * o The size of the toc entry is currently assumed to be | |
2673 | * 32 bits. This should not be assumed to be a hard coded | |
2674 | * number. | |
2675 | * o In an effort to cope with a change from 32 to 64 bits, | |
2676 | * there are also toc entries that are specified to be | |
2677 | * either 32 or 64 bits: | |
2678 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2679 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2680 | * These demand toc entries of the specified size, and the | |
2681 | * instruction probably requires it. | |
2682 | */ | |
252b5132 RH |
2683 | |
2684 | int valid_toc; | |
2685 | enum toc_size_qualifier toc_kind; | |
2686 | bfd_reloc_code_real_type toc_reloc; | |
2687 | ||
99a814a1 AM |
2688 | /* Go parse off the [tocXX] part. */ |
2689 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2690 | |
81d4177b | 2691 | if (!valid_toc) |
252b5132 | 2692 | { |
a5840dce AM |
2693 | ignore_rest_of_line (); |
2694 | break; | |
252b5132 RH |
2695 | } |
2696 | ||
99a814a1 AM |
2697 | /* Now get the symbol following the ']'. */ |
2698 | expression (&ex); | |
252b5132 RH |
2699 | |
2700 | switch (toc_kind) | |
2701 | { | |
2702 | case default_toc: | |
99a814a1 AM |
2703 | /* In this case, we may not have seen the symbol yet, |
2704 | since it is allowed to appear on a .extern or .globl | |
2705 | or just be a label in the .data section. */ | |
252b5132 RH |
2706 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2707 | break; | |
2708 | case data_in_toc: | |
99a814a1 AM |
2709 | /* 1. The symbol must be defined and either in the toc |
2710 | section, or a global. | |
2711 | 2. The reloc generated must have the TOCDEFN flag set | |
2712 | in upper bit mess of the reloc type. | |
2713 | FIXME: It's a little confusing what the tocv | |
2714 | qualifier can be used for. At the very least, I've | |
2715 | seen three uses, only one of which I'm sure I can | |
2716 | explain. */ | |
81d4177b KH |
2717 | if (ex.X_op == O_symbol) |
2718 | { | |
9c2799c2 | 2719 | gas_assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2720 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2721 | != tocdata_section) | |
252b5132 | 2722 | { |
99a814a1 | 2723 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2724 | } |
2725 | } | |
2726 | ||
2727 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2728 | break; | |
2729 | case must_be_32: | |
99a814a1 AM |
2730 | /* FIXME: these next two specifically specify 32/64 bit |
2731 | toc entries. We don't support them today. Is this | |
2732 | the right way to say that? */ | |
252b5132 | 2733 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2734 | as_bad (_("unimplemented toc32 expression modifier")); |
252b5132 RH |
2735 | break; |
2736 | case must_be_64: | |
99a814a1 | 2737 | /* FIXME: see above. */ |
252b5132 | 2738 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2739 | as_bad (_("unimplemented toc64 expression modifier")); |
252b5132 RH |
2740 | break; |
2741 | default: | |
bc805888 | 2742 | fprintf (stderr, |
99a814a1 AM |
2743 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2744 | toc_kind); | |
bc805888 | 2745 | abort (); |
252b5132 RH |
2746 | break; |
2747 | } | |
2748 | ||
2749 | /* We need to generate a fixup for this expression. */ | |
2750 | if (fc >= MAX_INSN_FIXUPS) | |
2751 | as_fatal (_("too many fixups")); | |
2752 | ||
2753 | fixups[fc].reloc = toc_reloc; | |
2754 | fixups[fc].exp = ex; | |
2755 | fixups[fc].opindex = *opindex_ptr; | |
2756 | ++fc; | |
2757 | ||
99a814a1 AM |
2758 | /* Ok. We've set up the fixup for the instruction. Now make it |
2759 | look like the constant 0 was found here. */ | |
252b5132 RH |
2760 | ex.X_unsigned = 1; |
2761 | ex.X_op = O_constant; | |
2762 | ex.X_add_number = 0; | |
2763 | ex.X_add_symbol = NULL; | |
2764 | ex.X_op_symbol = NULL; | |
2765 | } | |
2766 | ||
2767 | else | |
2768 | #endif /* TE_PE */ | |
2769 | { | |
b9c361e0 JL |
2770 | if ((reg_names_p |
2771 | && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
2772 | || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) | |
2ad068be | 2773 | || !register_name (&ex)) |
252b5132 | 2774 | { |
13abbae3 AM |
2775 | char save_lex = lex_type['%']; |
2776 | ||
b9c361e0 JL |
2777 | if (((operand->flags & PPC_OPERAND_CR_REG) != 0) |
2778 | || (operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
13abbae3 AM |
2779 | { |
2780 | cr_operand = TRUE; | |
2781 | lex_type['%'] |= LEX_BEGIN_NAME; | |
2782 | } | |
252b5132 | 2783 | expression (&ex); |
b34976b6 | 2784 | cr_operand = FALSE; |
13abbae3 | 2785 | lex_type['%'] = save_lex; |
252b5132 RH |
2786 | } |
2787 | } | |
2788 | ||
2789 | str = input_line_pointer; | |
2790 | input_line_pointer = hold; | |
2791 | ||
2792 | if (ex.X_op == O_illegal) | |
2793 | as_bad (_("illegal operand")); | |
2794 | else if (ex.X_op == O_absent) | |
2795 | as_bad (_("missing operand")); | |
2796 | else if (ex.X_op == O_register) | |
2797 | { | |
2798 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
783de163 | 2799 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2800 | } |
2801 | else if (ex.X_op == O_constant) | |
2802 | { | |
2803 | #ifdef OBJ_ELF | |
81d4177b | 2804 | /* Allow @HA, @L, @H on constants. */ |
3b8b57a9 | 2805 | bfd_reloc_code_real_type reloc; |
252b5132 RH |
2806 | char *orig_str = str; |
2807 | ||
2808 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2809 | switch (reloc) | |
2810 | { | |
2811 | default: | |
2812 | str = orig_str; | |
2813 | break; | |
2814 | ||
2815 | case BFD_RELOC_LO16: | |
2816 | /* X_unsigned is the default, so if the user has done | |
0baf16f2 AM |
2817 | something which cleared it, we always produce a |
2818 | signed value. */ | |
2819 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
252b5132 RH |
2820 | ex.X_add_number &= 0xffff; |
2821 | else | |
0baf16f2 | 2822 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2823 | break; |
2824 | ||
2825 | case BFD_RELOC_HI16: | |
0baf16f2 AM |
2826 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2827 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2828 | else | |
2829 | ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); | |
252b5132 RH |
2830 | break; |
2831 | ||
2832 | case BFD_RELOC_HI16_S: | |
0baf16f2 AM |
2833 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2834 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2835 | else | |
2836 | ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); | |
2837 | break; | |
2838 | ||
0baf16f2 AM |
2839 | case BFD_RELOC_PPC64_HIGHER: |
2840 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2841 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); | |
2842 | else | |
2843 | ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); | |
2844 | break; | |
2845 | ||
2846 | case BFD_RELOC_PPC64_HIGHER_S: | |
2847 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2848 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); | |
2849 | else | |
2850 | ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); | |
252b5132 | 2851 | break; |
0baf16f2 AM |
2852 | |
2853 | case BFD_RELOC_PPC64_HIGHEST: | |
2854 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2855 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); | |
2856 | else | |
2857 | ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); | |
2858 | break; | |
2859 | ||
2860 | case BFD_RELOC_PPC64_HIGHEST_S: | |
2861 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2862 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); | |
2863 | else | |
2864 | ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); | |
2865 | break; | |
252b5132 | 2866 | } |
0baf16f2 | 2867 | #endif /* OBJ_ELF */ |
252b5132 | 2868 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 2869 | ppc_cpu, (char *) NULL, 0); |
252b5132 | 2870 | } |
727fc41e | 2871 | else |
252b5132 | 2872 | { |
3b8b57a9 AM |
2873 | bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; |
2874 | #ifdef OBJ_ELF | |
727fc41e | 2875 | if (ex.X_op == O_symbol && str[0] == '(') |
cdba85ec | 2876 | { |
727fc41e AM |
2877 | const char *sym_name = S_GET_NAME (ex.X_add_symbol); |
2878 | if (sym_name[0] == '.') | |
2879 | ++sym_name; | |
cdba85ec | 2880 | |
727fc41e | 2881 | if (strcasecmp (sym_name, "__tls_get_addr") == 0) |
252b5132 | 2882 | { |
727fc41e AM |
2883 | expressionS tls_exp; |
2884 | ||
2885 | hold = input_line_pointer; | |
2886 | input_line_pointer = str + 1; | |
2887 | expression (&tls_exp); | |
2888 | if (tls_exp.X_op == O_symbol) | |
2889 | { | |
2890 | reloc = BFD_RELOC_UNUSED; | |
2891 | if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) | |
2892 | { | |
2893 | reloc = BFD_RELOC_PPC_TLSGD; | |
2894 | input_line_pointer += 7; | |
2895 | } | |
2896 | else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) | |
2897 | { | |
2898 | reloc = BFD_RELOC_PPC_TLSLD; | |
2899 | input_line_pointer += 7; | |
2900 | } | |
2901 | if (reloc != BFD_RELOC_UNUSED) | |
2902 | { | |
2903 | SKIP_WHITESPACE (); | |
2904 | str = input_line_pointer; | |
2905 | ||
2906 | if (fc >= MAX_INSN_FIXUPS) | |
2907 | as_fatal (_("too many fixups")); | |
2908 | fixups[fc].exp = tls_exp; | |
2909 | fixups[fc].opindex = *opindex_ptr; | |
2910 | fixups[fc].reloc = reloc; | |
2911 | ++fc; | |
2912 | } | |
2913 | } | |
2914 | input_line_pointer = hold; | |
252b5132 RH |
2915 | } |
2916 | } | |
2917 | ||
727fc41e | 2918 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) |
0baf16f2 | 2919 | { |
727fc41e | 2920 | /* Some TLS tweaks. */ |
0baf16f2 AM |
2921 | switch (reloc) |
2922 | { | |
727fc41e | 2923 | default: |
cdba85ec | 2924 | break; |
727fc41e AM |
2925 | |
2926 | case BFD_RELOC_PPC_TLS: | |
2d0f3896 AM |
2927 | if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) |
2928 | as_bad (_("@tls may not be used with \"%s\" operands"), | |
2929 | opcode->name); | |
2930 | else if (operand->shift != 11) | |
2931 | as_bad (_("@tls may only be used in last operand")); | |
2932 | else | |
2933 | insn = ppc_insert_operand (insn, operand, | |
2934 | ppc_obj64 ? 13 : 2, | |
2935 | ppc_cpu, (char *) NULL, 0); | |
cdba85ec | 2936 | break; |
727fc41e AM |
2937 | |
2938 | /* We'll only use the 32 (or 64) bit form of these relocations | |
2939 | in constants. Instructions get the 16 bit form. */ | |
2940 | case BFD_RELOC_PPC_DTPREL: | |
2941 | reloc = BFD_RELOC_PPC_DTPREL16; | |
cdba85ec | 2942 | break; |
727fc41e AM |
2943 | case BFD_RELOC_PPC_TPREL: |
2944 | reloc = BFD_RELOC_PPC_TPREL16; | |
0baf16f2 AM |
2945 | break; |
2946 | } | |
727fc41e | 2947 | |
b9c361e0 JL |
2948 | /* If VLE-mode convert LO/HI/HA relocations. */ |
2949 | if (opcode->flags & PPC_OPCODE_VLE) | |
2950 | { | |
2951 | int tmp_insn = insn & opcode->mask; | |
2952 | ||
2953 | int use_d_reloc = (tmp_insn == E_OR2I_INSN | |
2954 | || tmp_insn == E_AND2I_DOT_INSN | |
2955 | || tmp_insn == E_OR2IS_INSN | |
2956 | || tmp_insn == E_LIS_INSN | |
2957 | || tmp_insn == E_AND2IS_DOT_INSN); | |
2958 | ||
2959 | ||
2960 | int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN | |
2961 | || tmp_insn == E_ADD2IS_INSN | |
2962 | || tmp_insn == E_CMP16I_INSN | |
2963 | || tmp_insn == E_MULL2I_INSN | |
2964 | || tmp_insn == E_CMPL16I_INSN | |
2965 | || tmp_insn == E_CMPH16I_INSN | |
2966 | || tmp_insn == E_CMPHL16I_INSN); | |
2967 | ||
2968 | switch (reloc) | |
2969 | { | |
2970 | default: | |
2971 | break; | |
2972 | ||
2973 | case BFD_RELOC_PPC_EMB_SDA21: | |
2974 | reloc = BFD_RELOC_PPC_VLE_SDA21; | |
2975 | break; | |
2976 | ||
2977 | case BFD_RELOC_LO16: | |
2978 | if (use_d_reloc) | |
2979 | reloc = BFD_RELOC_PPC_VLE_LO16D; | |
2980 | else if (use_a_reloc) | |
2981 | reloc = BFD_RELOC_PPC_VLE_LO16A; | |
2982 | break; | |
2983 | ||
2984 | case BFD_RELOC_HI16: | |
2985 | if (use_d_reloc) | |
2986 | reloc = BFD_RELOC_PPC_VLE_HI16D; | |
2987 | else if (use_a_reloc) | |
2988 | reloc = BFD_RELOC_PPC_VLE_HI16A; | |
2989 | break; | |
2990 | ||
2991 | case BFD_RELOC_HI16_S: | |
2992 | if (use_d_reloc) | |
2993 | reloc = BFD_RELOC_PPC_VLE_HA16D; | |
2994 | else if (use_a_reloc) | |
2995 | reloc = BFD_RELOC_PPC_VLE_HA16A; | |
2996 | break; | |
2997 | ||
2998 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
2999 | if (use_d_reloc) | |
3000 | reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; | |
3001 | break; | |
3002 | ||
3003 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3004 | if (use_d_reloc) | |
3005 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; | |
3006 | break; | |
3007 | ||
3008 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3009 | if (use_d_reloc) | |
3010 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; | |
3011 | break; | |
3012 | } | |
3013 | } | |
3014 | ||
727fc41e AM |
3015 | /* For the absolute forms of branches, convert the PC |
3016 | relative form back into the absolute. */ | |
3017 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) | |
3018 | { | |
3019 | switch (reloc) | |
3020 | { | |
3021 | case BFD_RELOC_PPC_B26: | |
3022 | reloc = BFD_RELOC_PPC_BA26; | |
3023 | break; | |
3024 | case BFD_RELOC_PPC_B16: | |
3025 | reloc = BFD_RELOC_PPC_BA16; | |
3026 | break; | |
3027 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3028 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
3029 | break; | |
3030 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3031 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
3032 | break; | |
3033 | default: | |
3034 | break; | |
3035 | } | |
3036 | } | |
3037 | ||
01efc3af AM |
3038 | switch (reloc) |
3039 | { | |
3040 | case BFD_RELOC_PPC_TOC16: | |
3041 | toc_reloc_types |= has_small_toc_reloc; | |
3042 | break; | |
3043 | case BFD_RELOC_PPC64_TOC16_LO: | |
3044 | case BFD_RELOC_PPC64_TOC16_HI: | |
3045 | case BFD_RELOC_PPC64_TOC16_HA: | |
3046 | toc_reloc_types |= has_large_toc_reloc; | |
3047 | break; | |
3048 | default: | |
3049 | break; | |
3050 | } | |
3051 | ||
1fe532cf | 3052 | if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) |
727fc41e AM |
3053 | { |
3054 | switch (reloc) | |
3055 | { | |
3056 | case BFD_RELOC_16: | |
3057 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3058 | break; | |
3059 | case BFD_RELOC_LO16: | |
3060 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
3061 | break; | |
3062 | case BFD_RELOC_16_GOTOFF: | |
3063 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
3064 | break; | |
3065 | case BFD_RELOC_LO16_GOTOFF: | |
3066 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
3067 | break; | |
3068 | case BFD_RELOC_LO16_PLTOFF: | |
3069 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
3070 | break; | |
3071 | case BFD_RELOC_16_BASEREL: | |
3072 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; | |
3073 | break; | |
3074 | case BFD_RELOC_LO16_BASEREL: | |
3075 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
3076 | break; | |
3077 | case BFD_RELOC_PPC_TOC16: | |
3078 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3079 | break; | |
3080 | case BFD_RELOC_PPC64_TOC16_LO: | |
3081 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
3082 | break; | |
3083 | case BFD_RELOC_PPC64_PLTGOT16: | |
3084 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
3085 | break; | |
3086 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
3087 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
3088 | break; | |
3089 | case BFD_RELOC_PPC_DTPREL16: | |
3090 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
3091 | break; | |
3092 | case BFD_RELOC_PPC_DTPREL16_LO: | |
3093 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
3094 | break; | |
3095 | case BFD_RELOC_PPC_TPREL16: | |
3096 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
3097 | break; | |
3098 | case BFD_RELOC_PPC_TPREL16_LO: | |
3099 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
3100 | break; | |
3101 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
3102 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3103 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3104 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3105 | break; | |
3106 | default: | |
3107 | as_bad (_("unsupported relocation for DS offset field")); | |
3108 | break; | |
3109 | } | |
3110 | } | |
0baf16f2 | 3111 | } |
3b8b57a9 AM |
3112 | #endif /* OBJ_ELF */ |
3113 | ||
3114 | if (reloc != BFD_RELOC_UNUSED) | |
3115 | ; | |
3116 | /* Determine a BFD reloc value based on the operand information. | |
3117 | We are only prepared to turn a few of the operands into | |
3118 | relocs. */ | |
3119 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3120 | && operand->bitm == 0x3fffffc | |
3121 | && operand->shift == 0) | |
3122 | reloc = BFD_RELOC_PPC_B26; | |
3123 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3124 | && operand->bitm == 0xfffc | |
3125 | && operand->shift == 0) | |
3126 | reloc = BFD_RELOC_PPC_B16; | |
3127 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3128 | && operand->bitm == 0x1fe | |
3129 | && operand->shift == -1) | |
3130 | reloc = BFD_RELOC_PPC_VLE_REL8; | |
3131 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3132 | && operand->bitm == 0xfffe | |
3133 | && operand->shift == 0) | |
3134 | reloc = BFD_RELOC_PPC_VLE_REL15; | |
3135 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3136 | && operand->bitm == 0x1fffffe | |
3137 | && operand->shift == 0) | |
3138 | reloc = BFD_RELOC_PPC_VLE_REL24; | |
3139 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 | |
3140 | && operand->bitm == 0x3fffffc | |
3141 | && operand->shift == 0) | |
3142 | reloc = BFD_RELOC_PPC_BA26; | |
3143 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 | |
3144 | && operand->bitm == 0xfffc | |
3145 | && operand->shift == 0) | |
3146 | reloc = BFD_RELOC_PPC_BA16; | |
3147 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
3148 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0 | |
3149 | && (operand->bitm & 0xfff0) == 0xfff0 | |
3150 | && operand->shift == 0) | |
3151 | { | |
3152 | if (ppc_is_toc_sym (ex.X_add_symbol)) | |
3153 | { | |
3154 | reloc = BFD_RELOC_PPC_TOC16; | |
3155 | #ifdef OBJ_ELF | |
3156 | if (ppc_obj64 | |
3157 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
3158 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3159 | #endif | |
3160 | } | |
3161 | else | |
3162 | { | |
3163 | reloc = BFD_RELOC_16; | |
3164 | #ifdef OBJ_ELF | |
3165 | if (ppc_obj64 | |
3166 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
3167 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3168 | #endif | |
3169 | } | |
3170 | } | |
3171 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
0baf16f2 | 3172 | |
252b5132 RH |
3173 | /* We need to generate a fixup for this expression. */ |
3174 | if (fc >= MAX_INSN_FIXUPS) | |
3175 | as_fatal (_("too many fixups")); | |
3176 | fixups[fc].exp = ex; | |
727fc41e | 3177 | fixups[fc].opindex = *opindex_ptr; |
252b5132 RH |
3178 | fixups[fc].reloc = reloc; |
3179 | ++fc; | |
3180 | } | |
252b5132 RH |
3181 | |
3182 | if (need_paren) | |
3183 | { | |
3184 | endc = ')'; | |
3185 | need_paren = 0; | |
c3d65c1c BE |
3186 | /* If expecting more operands, then we want to see "),". */ |
3187 | if (*str == endc && opindex_ptr[1] != 0) | |
3188 | { | |
3189 | do | |
3190 | ++str; | |
3191 | while (ISSPACE (*str)); | |
3192 | endc = ','; | |
3193 | } | |
252b5132 RH |
3194 | } |
3195 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
3196 | { | |
3197 | endc = '('; | |
3198 | need_paren = 1; | |
3199 | } | |
3200 | else | |
3201 | endc = ','; | |
3202 | ||
3203 | /* The call to expression should have advanced str past any | |
3204 | whitespace. */ | |
3205 | if (*str != endc | |
3206 | && (endc != ',' || *str != '\0')) | |
3207 | { | |
5a938047 AM |
3208 | if (*str == '\0') |
3209 | as_bad (_("syntax error; end of line, expected `%c'"), endc); | |
3210 | else | |
3211 | as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); | |
252b5132 RH |
3212 | break; |
3213 | } | |
3214 | ||
3215 | if (*str != '\0') | |
3216 | ++str; | |
3217 | } | |
3218 | ||
3882b010 | 3219 | while (ISSPACE (*str)) |
252b5132 RH |
3220 | ++str; |
3221 | ||
3222 | if (*str != '\0') | |
3223 | as_bad (_("junk at end of line: `%s'"), str); | |
3224 | ||
dc1d03fc | 3225 | #ifdef OBJ_ELF |
b9c361e0 | 3226 | /* Do we need/want an APUinfo section? */ |
4faf939a JM |
3227 | if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 |
3228 | && !ppc_obj64) | |
6a0c61b7 EZ |
3229 | { |
3230 | /* These are all version "1". */ | |
3231 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 3232 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 3233 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 3234 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 3235 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 3236 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 3237 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 3238 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 3239 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 3240 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 3241 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 3242 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 3243 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 3244 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
b9c361e0 JL |
3245 | if (opcode->flags & PPC_OPCODE_VLE) |
3246 | ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); | |
6a0c61b7 | 3247 | } |
dc1d03fc | 3248 | #endif |
6a0c61b7 | 3249 | |
252b5132 | 3250 | /* Write out the instruction. */ |
b9c361e0 JL |
3251 | /* Differentiate between two and four byte insns. */ |
3252 | if (ppc_mach () == bfd_mach_ppc_vle) | |
3253 | { | |
3254 | if (PPC_OP_SE_VLE (insn)) | |
3255 | insn_length = 2; | |
3256 | else | |
3257 | insn_length = 4; | |
3258 | addr_mod = frag_now_fix () & 1; | |
3259 | } | |
3260 | else | |
3261 | { | |
3262 | insn_length = 4; | |
3263 | addr_mod = frag_now_fix () & 3; | |
3264 | } | |
3265 | /* All instructions can start on a 2 byte boundary for VLE. */ | |
3266 | f = frag_more (insn_length); | |
09b935ac | 3267 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) |
b9c361e0 JL |
3268 | { |
3269 | if (ppc_mach() == bfd_mach_ppc_vle) | |
3270 | as_bad (_("instruction address is not a multiple of 2")); | |
3271 | else | |
3272 | as_bad (_("instruction address is not a multiple of 4")); | |
3273 | } | |
09b935ac AM |
3274 | frag_now->insn_addr = addr_mod; |
3275 | frag_now->has_code = 1; | |
b9c361e0 | 3276 | md_number_to_chars (f, insn, insn_length); |
252b5132 | 3277 | |
5d6f4f16 | 3278 | #ifdef OBJ_ELF |
b9c361e0 | 3279 | dwarf2_emit_insn (insn_length); |
5d6f4f16 GK |
3280 | #endif |
3281 | ||
3b8b57a9 | 3282 | /* Create any fixups. */ |
252b5132 RH |
3283 | for (i = 0; i < fc; i++) |
3284 | { | |
3b8b57a9 | 3285 | fixS *fixP; |
252b5132 RH |
3286 | if (fixups[i].reloc != BFD_RELOC_UNUSED) |
3287 | { | |
99a814a1 | 3288 | reloc_howto_type *reloc_howto; |
252b5132 RH |
3289 | int size; |
3290 | int offset; | |
252b5132 | 3291 | |
99a814a1 | 3292 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
3293 | if (!reloc_howto) |
3294 | abort (); | |
3295 | ||
3296 | size = bfd_get_reloc_size (reloc_howto); | |
3b8b57a9 | 3297 | offset = target_big_endian ? (insn_length - size) : 0; |
252b5132 RH |
3298 | |
3299 | if (size < 1 || size > 4) | |
bc805888 | 3300 | abort (); |
252b5132 | 3301 | |
99a814a1 AM |
3302 | fixP = fix_new_exp (frag_now, |
3303 | f - frag_now->fr_literal + offset, | |
3304 | size, | |
3305 | &fixups[i].exp, | |
3306 | reloc_howto->pc_relative, | |
252b5132 | 3307 | fixups[i].reloc); |
252b5132 RH |
3308 | } |
3309 | else | |
727fc41e AM |
3310 | { |
3311 | const struct powerpc_operand *operand; | |
3312 | ||
3313 | operand = &powerpc_operands[fixups[i].opindex]; | |
3b8b57a9 AM |
3314 | fixP = fix_new_exp (frag_now, |
3315 | f - frag_now->fr_literal, | |
3316 | insn_length, | |
3317 | &fixups[i].exp, | |
3318 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
3319 | BFD_RELOC_UNUSED); | |
727fc41e | 3320 | } |
3b8b57a9 | 3321 | fixP->fx_pcrel_adjust = fixups[i].opindex; |
252b5132 RH |
3322 | } |
3323 | } | |
3324 | ||
3325 | /* Handle a macro. Gather all the operands, transform them as | |
3326 | described by the macro, and call md_assemble recursively. All the | |
3327 | operands are separated by commas; we don't accept parentheses | |
3328 | around operands here. */ | |
3329 | ||
3330 | static void | |
98027b10 | 3331 | ppc_macro (char *str, const struct powerpc_macro *macro) |
252b5132 RH |
3332 | { |
3333 | char *operands[10]; | |
3334 | unsigned int count; | |
3335 | char *s; | |
3336 | unsigned int len; | |
3337 | const char *format; | |
db557034 | 3338 | unsigned int arg; |
252b5132 RH |
3339 | char *send; |
3340 | char *complete; | |
3341 | ||
3342 | /* Gather the users operands into the operands array. */ | |
3343 | count = 0; | |
3344 | s = str; | |
3345 | while (1) | |
3346 | { | |
3347 | if (count >= sizeof operands / sizeof operands[0]) | |
3348 | break; | |
3349 | operands[count++] = s; | |
3350 | s = strchr (s, ','); | |
3351 | if (s == (char *) NULL) | |
3352 | break; | |
3353 | *s++ = '\0'; | |
81d4177b | 3354 | } |
252b5132 RH |
3355 | |
3356 | if (count != macro->operands) | |
3357 | { | |
3358 | as_bad (_("wrong number of operands")); | |
3359 | return; | |
3360 | } | |
3361 | ||
3362 | /* Work out how large the string must be (the size is unbounded | |
3363 | because it includes user input). */ | |
3364 | len = 0; | |
3365 | format = macro->format; | |
3366 | while (*format != '\0') | |
3367 | { | |
3368 | if (*format != '%') | |
3369 | { | |
3370 | ++len; | |
3371 | ++format; | |
3372 | } | |
3373 | else | |
3374 | { | |
3375 | arg = strtol (format + 1, &send, 10); | |
db557034 | 3376 | know (send != format && arg < count); |
252b5132 RH |
3377 | len += strlen (operands[arg]); |
3378 | format = send; | |
3379 | } | |
3380 | } | |
3381 | ||
3382 | /* Put the string together. */ | |
3383 | complete = s = (char *) alloca (len + 1); | |
3384 | format = macro->format; | |
3385 | while (*format != '\0') | |
3386 | { | |
3387 | if (*format != '%') | |
3388 | *s++ = *format++; | |
3389 | else | |
3390 | { | |
3391 | arg = strtol (format + 1, &send, 10); | |
3392 | strcpy (s, operands[arg]); | |
3393 | s += strlen (s); | |
3394 | format = send; | |
3395 | } | |
3396 | } | |
3397 | *s = '\0'; | |
3398 | ||
3399 | /* Assemble the constructed instruction. */ | |
3400 | md_assemble (complete); | |
81d4177b | 3401 | } |
252b5132 RH |
3402 | \f |
3403 | #ifdef OBJ_ELF | |
18ae9cc1 | 3404 | /* For ELF, add support for SHT_ORDERED. */ |
252b5132 RH |
3405 | |
3406 | int | |
98027b10 | 3407 | ppc_section_type (char *str, size_t len) |
252b5132 | 3408 | { |
9de8d8f1 RH |
3409 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
3410 | return SHT_ORDERED; | |
252b5132 | 3411 | |
9de8d8f1 | 3412 | return -1; |
252b5132 RH |
3413 | } |
3414 | ||
3415 | int | |
1239de13 | 3416 | ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) |
252b5132 RH |
3417 | { |
3418 | if (type == SHT_ORDERED) | |
3419 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
3420 | ||
252b5132 RH |
3421 | return flags; |
3422 | } | |
3423 | #endif /* OBJ_ELF */ | |
3424 | ||
3425 | \f | |
3426 | /* Pseudo-op handling. */ | |
3427 | ||
3428 | /* The .byte pseudo-op. This is similar to the normal .byte | |
3429 | pseudo-op, but it can also take a single ASCII string. */ | |
3430 | ||
3431 | static void | |
98027b10 | 3432 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3433 | { |
3434 | if (*input_line_pointer != '\"') | |
3435 | { | |
3436 | cons (1); | |
3437 | return; | |
3438 | } | |
3439 | ||
3440 | /* Gather characters. A real double quote is doubled. Unusual | |
3441 | characters are not permitted. */ | |
3442 | ++input_line_pointer; | |
3443 | while (1) | |
3444 | { | |
3445 | char c; | |
3446 | ||
3447 | c = *input_line_pointer++; | |
3448 | ||
3449 | if (c == '\"') | |
3450 | { | |
3451 | if (*input_line_pointer != '\"') | |
3452 | break; | |
3453 | ++input_line_pointer; | |
3454 | } | |
3455 | ||
3456 | FRAG_APPEND_1_CHAR (c); | |
3457 | } | |
3458 | ||
3459 | demand_empty_rest_of_line (); | |
3460 | } | |
3461 | \f | |
3462 | #ifdef OBJ_XCOFF | |
3463 | ||
3464 | /* XCOFF specific pseudo-op handling. */ | |
3465 | ||
3466 | /* This is set if we are creating a .stabx symbol, since we don't want | |
3467 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 3468 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
3469 | |
3470 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
3471 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 3472 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 3473 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
3474 | |
3475 | static void | |
98027b10 | 3476 | ppc_comm (int lcomm) |
252b5132 RH |
3477 | { |
3478 | asection *current_seg = now_seg; | |
3479 | subsegT current_subseg = now_subseg; | |
3480 | char *name; | |
3481 | char endc; | |
3482 | char *end_name; | |
3483 | offsetT size; | |
3484 | offsetT align; | |
3485 | symbolS *lcomm_sym = NULL; | |
3486 | symbolS *sym; | |
3487 | char *pfrag; | |
3488 | ||
3489 | name = input_line_pointer; | |
3490 | endc = get_symbol_end (); | |
3491 | end_name = input_line_pointer; | |
3492 | *end_name = endc; | |
3493 | ||
3494 | if (*input_line_pointer != ',') | |
3495 | { | |
3496 | as_bad (_("missing size")); | |
3497 | ignore_rest_of_line (); | |
3498 | return; | |
3499 | } | |
3500 | ++input_line_pointer; | |
3501 | ||
3502 | size = get_absolute_expression (); | |
3503 | if (size < 0) | |
3504 | { | |
3505 | as_bad (_("negative size")); | |
3506 | ignore_rest_of_line (); | |
3507 | return; | |
3508 | } | |
3509 | ||
3510 | if (! lcomm) | |
3511 | { | |
3512 | /* The third argument to .comm is the alignment. */ | |
3513 | if (*input_line_pointer != ',') | |
1ad63b2f | 3514 | align = 2; |
252b5132 RH |
3515 | else |
3516 | { | |
3517 | ++input_line_pointer; | |
3518 | align = get_absolute_expression (); | |
3519 | if (align <= 0) | |
3520 | { | |
3521 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3522 | align = 2; |
252b5132 RH |
3523 | } |
3524 | } | |
3525 | } | |
3526 | else | |
3527 | { | |
3528 | char *lcomm_name; | |
3529 | char lcomm_endc; | |
3530 | ||
1ad63b2f | 3531 | if (size <= 4) |
252b5132 RH |
3532 | align = 2; |
3533 | else | |
3534 | align = 3; | |
3535 | ||
3536 | /* The third argument to .lcomm appears to be the real local | |
3537 | common symbol to create. References to the symbol named in | |
3538 | the first argument are turned into references to the third | |
3539 | argument. */ | |
3540 | if (*input_line_pointer != ',') | |
3541 | { | |
3542 | as_bad (_("missing real symbol name")); | |
3543 | ignore_rest_of_line (); | |
3544 | return; | |
3545 | } | |
3546 | ++input_line_pointer; | |
3547 | ||
3548 | lcomm_name = input_line_pointer; | |
3549 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3550 | |
252b5132 RH |
3551 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3552 | ||
3553 | *input_line_pointer = lcomm_endc; | |
3554 | } | |
3555 | ||
3556 | *end_name = '\0'; | |
3557 | sym = symbol_find_or_make (name); | |
3558 | *end_name = endc; | |
3559 | ||
3560 | if (S_IS_DEFINED (sym) | |
3561 | || S_GET_VALUE (sym) != 0) | |
3562 | { | |
3563 | as_bad (_("attempt to redefine symbol")); | |
3564 | ignore_rest_of_line (); | |
3565 | return; | |
3566 | } | |
81d4177b | 3567 | |
252b5132 | 3568 | record_alignment (bss_section, align); |
81d4177b | 3569 | |
252b5132 RH |
3570 | if (! lcomm |
3571 | || ! S_IS_DEFINED (lcomm_sym)) | |
3572 | { | |
3573 | symbolS *def_sym; | |
3574 | offsetT def_size; | |
3575 | ||
3576 | if (! lcomm) | |
3577 | { | |
3578 | def_sym = sym; | |
3579 | def_size = size; | |
3580 | S_SET_EXTERNAL (sym); | |
3581 | } | |
3582 | else | |
3583 | { | |
809ffe0d | 3584 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3585 | def_sym = lcomm_sym; |
3586 | def_size = 0; | |
3587 | } | |
3588 | ||
3589 | subseg_set (bss_section, 1); | |
3590 | frag_align (align, 0, 0); | |
81d4177b | 3591 | |
809ffe0d | 3592 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3593 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3594 | def_size, (char *) NULL); | |
3595 | *pfrag = 0; | |
3596 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3597 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3598 | } |
3599 | else if (lcomm) | |
3600 | { | |
3601 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3602 | symbol_get_frag (lcomm_sym)->fr_offset = |
3603 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3604 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3605 | if (align > symbol_get_tc (lcomm_sym)->align) |
3606 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3607 | } |
3608 | ||
3609 | if (lcomm) | |
3610 | { | |
3611 | /* Make sym an offset from lcomm_sym. */ | |
3612 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3613 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3614 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3615 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3616 | } |
3617 | ||
3618 | subseg_set (current_seg, current_subseg); | |
3619 | ||
3620 | demand_empty_rest_of_line (); | |
3621 | } | |
3622 | ||
3623 | /* The .csect pseudo-op. This switches us into a different | |
3624 | subsegment. The first argument is a symbol whose value is the | |
3625 | start of the .csect. In COFF, csect symbols get special aux | |
3626 | entries defined by the x_csect field of union internal_auxent. The | |
3627 | optional second argument is the alignment (the default is 2). */ | |
3628 | ||
3629 | static void | |
98027b10 | 3630 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3631 | { |
3632 | char *name; | |
3633 | char endc; | |
3634 | symbolS *sym; | |
931e13a6 | 3635 | offsetT align; |
252b5132 RH |
3636 | |
3637 | name = input_line_pointer; | |
3638 | endc = get_symbol_end (); | |
81d4177b | 3639 | |
252b5132 RH |
3640 | sym = symbol_find_or_make (name); |
3641 | ||
3642 | *input_line_pointer = endc; | |
3643 | ||
3644 | if (S_GET_NAME (sym)[0] == '\0') | |
3645 | { | |
3646 | /* An unnamed csect is assumed to be [PR]. */ | |
96d56e9f | 3647 | symbol_get_tc (sym)->symbol_class = XMC_PR; |
252b5132 RH |
3648 | } |
3649 | ||
931e13a6 | 3650 | align = 2; |
252b5132 RH |
3651 | if (*input_line_pointer == ',') |
3652 | { | |
3653 | ++input_line_pointer; | |
931e13a6 | 3654 | align = get_absolute_expression (); |
252b5132 RH |
3655 | } |
3656 | ||
931e13a6 AM |
3657 | ppc_change_csect (sym, align); |
3658 | ||
252b5132 RH |
3659 | demand_empty_rest_of_line (); |
3660 | } | |
3661 | ||
3662 | /* Change to a different csect. */ | |
3663 | ||
3664 | static void | |
98027b10 | 3665 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
3666 | { |
3667 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3668 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3669 | else |
3670 | { | |
3671 | symbolS **list_ptr; | |
3672 | int after_toc; | |
3673 | int hold_chunksize; | |
3674 | symbolS *list; | |
931e13a6 AM |
3675 | int is_code; |
3676 | segT sec; | |
252b5132 RH |
3677 | |
3678 | /* This is a new csect. We need to look at the symbol class to | |
3679 | figure out whether it should go in the text section or the | |
3680 | data section. */ | |
3681 | after_toc = 0; | |
931e13a6 | 3682 | is_code = 0; |
96d56e9f | 3683 | switch (symbol_get_tc (sym)->symbol_class) |
252b5132 RH |
3684 | { |
3685 | case XMC_PR: | |
3686 | case XMC_RO: | |
3687 | case XMC_DB: | |
3688 | case XMC_GL: | |
3689 | case XMC_XO: | |
3690 | case XMC_SV: | |
3691 | case XMC_TI: | |
3692 | case XMC_TB: | |
3693 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3694 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3695 | ++ppc_text_subsegment; |
3696 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3697 | is_code = 1; |
252b5132 RH |
3698 | break; |
3699 | case XMC_RW: | |
3700 | case XMC_TC0: | |
3701 | case XMC_TC: | |
3702 | case XMC_DS: | |
3703 | case XMC_UA: | |
3704 | case XMC_BS: | |
3705 | case XMC_UC: | |
3706 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3707 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3708 | == ppc_data_subsegment)) | |
252b5132 RH |
3709 | after_toc = 1; |
3710 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3711 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3712 | ++ppc_data_subsegment; |
3713 | list_ptr = &ppc_data_csects; | |
3714 | break; | |
3715 | default: | |
3716 | abort (); | |
3717 | } | |
3718 | ||
3719 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3720 | changing subsegments, so that we don't use a lot of memory |
3721 | space for what may be a small section. */ | |
252b5132 RH |
3722 | hold_chunksize = chunksize; |
3723 | chunksize = 64; | |
3724 | ||
931e13a6 AM |
3725 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3726 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3727 | |
3728 | chunksize = hold_chunksize; | |
3729 | ||
3730 | if (after_toc) | |
3731 | ppc_after_toc_frag = frag_now; | |
3732 | ||
931e13a6 AM |
3733 | record_alignment (sec, align); |
3734 | if (is_code) | |
3735 | frag_align_code (align, 0); | |
3736 | else | |
3737 | frag_align (align, 0, 0); | |
3738 | ||
809ffe0d | 3739 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3740 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3741 | ||
931e13a6 | 3742 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3743 | symbol_get_tc (sym)->output = 1; |
3744 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3745 | |
252b5132 | 3746 | for (list = *list_ptr; |
809ffe0d ILT |
3747 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3748 | list = symbol_get_tc (list)->next) | |
252b5132 | 3749 | ; |
809ffe0d | 3750 | symbol_get_tc (list)->next = sym; |
81d4177b | 3751 | |
252b5132 | 3752 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3753 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3754 | &symbol_lastP); | |
252b5132 RH |
3755 | } |
3756 | ||
3757 | ppc_current_csect = sym; | |
3758 | } | |
3759 | ||
85645aed TG |
3760 | static void |
3761 | ppc_change_debug_section (unsigned int idx, subsegT subseg) | |
3762 | { | |
3763 | segT sec; | |
3764 | flagword oldflags; | |
3765 | const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; | |
3766 | ||
3767 | sec = subseg_new (dw->name, subseg); | |
3768 | oldflags = bfd_get_section_flags (stdoutput, sec); | |
3769 | if (oldflags == SEC_NO_FLAGS) | |
3770 | { | |
3771 | /* Just created section. */ | |
3772 | gas_assert (dw_sections[idx].sect == NULL); | |
3773 | ||
3774 | bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); | |
3775 | bfd_set_section_alignment (stdoutput, sec, 0); | |
3776 | dw_sections[idx].sect = sec; | |
3777 | } | |
3778 | ||
3779 | /* Not anymore in a csect. */ | |
3780 | ppc_current_csect = NULL; | |
3781 | } | |
3782 | ||
3783 | /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: | |
3784 | .dwsect flag [, opt-label ] | |
3785 | */ | |
3786 | ||
3787 | static void | |
3788 | ppc_dwsect (int ignore ATTRIBUTE_UNUSED) | |
3789 | { | |
3790 | offsetT flag; | |
3791 | symbolS *opt_label; | |
3792 | const struct xcoff_dwsect_name *dw; | |
3793 | struct dw_subsection *subseg; | |
3794 | struct dw_section *dws; | |
3795 | int i; | |
3796 | ||
3797 | /* Find section. */ | |
3798 | flag = get_absolute_expression (); | |
3799 | dw = NULL; | |
3800 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
3801 | if (xcoff_dwsect_names[i].flag == flag) | |
3802 | { | |
3803 | dw = &xcoff_dwsect_names[i]; | |
3804 | break; | |
3805 | } | |
3806 | ||
3807 | /* Parse opt-label. */ | |
3808 | if (*input_line_pointer == ',') | |
3809 | { | |
3810 | const char *label; | |
3811 | char c; | |
3812 | ||
3813 | ++input_line_pointer; | |
3814 | ||
3815 | label = input_line_pointer; | |
3816 | c = get_symbol_end (); | |
3817 | opt_label = symbol_find_or_make (label); | |
3818 | *input_line_pointer = c; | |
3819 | } | |
3820 | else | |
3821 | opt_label = NULL; | |
3822 | ||
3823 | demand_empty_rest_of_line (); | |
3824 | ||
3825 | /* Return now in case of unknown subsection. */ | |
3826 | if (dw == NULL) | |
3827 | { | |
d6ed37ed | 3828 | as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), |
85645aed TG |
3829 | (unsigned)flag); |
3830 | return; | |
3831 | } | |
3832 | ||
3833 | /* Find the subsection. */ | |
3834 | dws = &dw_sections[i]; | |
3835 | subseg = NULL; | |
3836 | if (opt_label != NULL && S_IS_DEFINED (opt_label)) | |
3837 | { | |
3838 | /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ | |
3839 | if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) | |
3840 | { | |
3841 | as_bad (_("label %s was not defined in this dwarf section"), | |
3842 | S_GET_NAME (opt_label)); | |
3843 | subseg = dws->anon_subseg; | |
3844 | opt_label = NULL; | |
3845 | } | |
3846 | else | |
3847 | subseg = symbol_get_tc (opt_label)->u.dw; | |
3848 | } | |
3849 | ||
3850 | if (subseg != NULL) | |
3851 | { | |
3852 | /* Switch to the subsection. */ | |
3853 | ppc_change_debug_section (i, subseg->subseg); | |
3854 | } | |
3855 | else | |
3856 | { | |
3857 | /* Create a new dw subsection. */ | |
3858 | subseg = (struct dw_subsection *) | |
3859 | xmalloc (sizeof (struct dw_subsection)); | |
3860 | ||
3861 | if (opt_label == NULL) | |
3862 | { | |
3863 | /* The anonymous one. */ | |
3864 | subseg->subseg = 0; | |
3865 | subseg->link = NULL; | |
3866 | dws->anon_subseg = subseg; | |
3867 | } | |
3868 | else | |
3869 | { | |
3870 | /* A named one. */ | |
3871 | if (dws->list_subseg != NULL) | |
3872 | subseg->subseg = dws->list_subseg->subseg + 1; | |
3873 | else | |
3874 | subseg->subseg = 1; | |
3875 | ||
3876 | subseg->link = dws->list_subseg; | |
3877 | dws->list_subseg = subseg; | |
3878 | symbol_get_tc (opt_label)->u.dw = subseg; | |
3879 | } | |
3880 | ||
3881 | ppc_change_debug_section (i, subseg->subseg); | |
3882 | ||
3883 | if (dw->def_size) | |
3884 | { | |
3885 | /* Add the length field. */ | |
3886 | expressionS *exp = &subseg->end_exp; | |
3887 | int sz; | |
3888 | ||
3889 | if (opt_label != NULL) | |
3890 | symbol_set_value_now (opt_label); | |
3891 | ||
3892 | /* Add the length field. Note that according to the AIX assembler | |
3893 | manual, the size of the length field is 4 for powerpc32 but | |
3894 | 12 for powerpc64. */ | |
3895 | if (ppc_obj64) | |
3896 | { | |
3897 | /* Write the 64bit marker. */ | |
3898 | md_number_to_chars (frag_more (4), -1, 4); | |
3899 | } | |
3900 | ||
3901 | exp->X_op = O_subtract; | |
3902 | exp->X_op_symbol = symbol_temp_new_now (); | |
3903 | exp->X_add_symbol = symbol_temp_make (); | |
3904 | ||
3905 | sz = ppc_obj64 ? 8 : 4; | |
3906 | exp->X_add_number = -sz; | |
3907 | emit_expr (exp, sz); | |
3908 | } | |
3909 | } | |
3910 | } | |
3911 | ||
252b5132 RH |
3912 | /* This function handles the .text and .data pseudo-ops. These |
3913 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3914 | convenience of people who aren't used to XCOFF. */ | |
3915 | ||
3916 | static void | |
98027b10 | 3917 | ppc_section (int type) |
252b5132 RH |
3918 | { |
3919 | const char *name; | |
3920 | symbolS *sym; | |
3921 | ||
3922 | if (type == 't') | |
3923 | name = ".text[PR]"; | |
3924 | else if (type == 'd') | |
3925 | name = ".data[RW]"; | |
3926 | else | |
3927 | abort (); | |
3928 | ||
3929 | sym = symbol_find_or_make (name); | |
3930 | ||
931e13a6 | 3931 | ppc_change_csect (sym, 2); |
252b5132 RH |
3932 | |
3933 | demand_empty_rest_of_line (); | |
3934 | } | |
3935 | ||
3936 | /* This function handles the .section pseudo-op. This is mostly to | |
3937 | give an error, since XCOFF only supports .text, .data and .bss, but | |
3938 | we do permit the user to name the text or data section. */ | |
3939 | ||
3940 | static void | |
98027b10 | 3941 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3942 | { |
3943 | char *user_name; | |
3944 | const char *real_name; | |
3945 | char c; | |
3946 | symbolS *sym; | |
3947 | ||
3948 | user_name = input_line_pointer; | |
3949 | c = get_symbol_end (); | |
3950 | ||
3951 | if (strcmp (user_name, ".text") == 0) | |
3952 | real_name = ".text[PR]"; | |
3953 | else if (strcmp (user_name, ".data") == 0) | |
3954 | real_name = ".data[RW]"; | |
3955 | else | |
3956 | { | |
d6ed37ed | 3957 | as_bad (_("the XCOFF file format does not support arbitrary sections")); |
252b5132 RH |
3958 | *input_line_pointer = c; |
3959 | ignore_rest_of_line (); | |
3960 | return; | |
3961 | } | |
3962 | ||
3963 | *input_line_pointer = c; | |
3964 | ||
3965 | sym = symbol_find_or_make (real_name); | |
3966 | ||
931e13a6 | 3967 | ppc_change_csect (sym, 2); |
252b5132 RH |
3968 | |
3969 | demand_empty_rest_of_line (); | |
3970 | } | |
3971 | ||
3972 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
3973 | ||
3974 | static void | |
98027b10 | 3975 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3976 | { |
3977 | char *name; | |
3978 | char endc; | |
3979 | ||
3980 | name = input_line_pointer; | |
3981 | endc = get_symbol_end (); | |
3982 | ||
3983 | (void) symbol_find_or_make (name); | |
3984 | ||
3985 | *input_line_pointer = endc; | |
3986 | ||
3987 | demand_empty_rest_of_line (); | |
3988 | } | |
3989 | ||
3990 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
3991 | ||
3992 | static void | |
98027b10 | 3993 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3994 | { |
3995 | char *name; | |
3996 | char endc; | |
3997 | symbolS *sym; | |
3998 | ||
3999 | name = input_line_pointer; | |
4000 | endc = get_symbol_end (); | |
4001 | ||
4002 | sym = symbol_find_or_make (name); | |
4003 | ||
4004 | *input_line_pointer = endc; | |
4005 | ||
809ffe0d | 4006 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4007 | |
4008 | demand_empty_rest_of_line (); | |
4009 | } | |
4010 | ||
c865e45b RS |
4011 | /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF |
4012 | relocations at the beginning of the current csect. | |
4013 | ||
4014 | (In principle, there's no reason why the relocations _have_ to be at | |
4015 | the beginning. Anywhere in the csect would do. However, inserting | |
4016 | at the beginning is what the native assmebler does, and it helps to | |
4017 | deal with cases where the .ref statements follow the section contents.) | |
4018 | ||
4019 | ??? .refs don't work for empty .csects. However, the native assembler | |
4020 | doesn't report an error in this case, and neither yet do we. */ | |
4021 | ||
4022 | static void | |
4023 | ppc_ref (int ignore ATTRIBUTE_UNUSED) | |
4024 | { | |
4025 | char *name; | |
4026 | char c; | |
4027 | ||
4028 | if (ppc_current_csect == NULL) | |
4029 | { | |
4030 | as_bad (_(".ref outside .csect")); | |
4031 | ignore_rest_of_line (); | |
4032 | return; | |
4033 | } | |
4034 | ||
4035 | do | |
4036 | { | |
4037 | name = input_line_pointer; | |
4038 | c = get_symbol_end (); | |
4039 | ||
4040 | fix_at_start (symbol_get_frag (ppc_current_csect), 0, | |
4041 | symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); | |
4042 | ||
4043 | *input_line_pointer = c; | |
4044 | SKIP_WHITESPACE (); | |
4045 | c = *input_line_pointer; | |
4046 | if (c == ',') | |
4047 | { | |
4048 | input_line_pointer++; | |
4049 | SKIP_WHITESPACE (); | |
4050 | if (is_end_of_line[(unsigned char) *input_line_pointer]) | |
4051 | { | |
4052 | as_bad (_("missing symbol name")); | |
4053 | ignore_rest_of_line (); | |
4054 | return; | |
4055 | } | |
4056 | } | |
4057 | } | |
4058 | while (c == ','); | |
4059 | ||
4060 | demand_empty_rest_of_line (); | |
4061 | } | |
4062 | ||
252b5132 RH |
4063 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, |
4064 | although I don't know why it bothers. */ | |
4065 | ||
4066 | static void | |
98027b10 | 4067 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4068 | { |
4069 | char *name; | |
4070 | char endc; | |
4071 | symbolS *sym; | |
4072 | int len; | |
4073 | ||
4074 | name = input_line_pointer; | |
4075 | endc = get_symbol_end (); | |
4076 | ||
4077 | sym = symbol_find_or_make (name); | |
4078 | ||
4079 | *input_line_pointer = endc; | |
4080 | ||
4081 | if (*input_line_pointer != ',') | |
4082 | { | |
4083 | as_bad (_("missing rename string")); | |
4084 | ignore_rest_of_line (); | |
4085 | return; | |
4086 | } | |
4087 | ++input_line_pointer; | |
4088 | ||
809ffe0d | 4089 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
4090 | |
4091 | demand_empty_rest_of_line (); | |
4092 | } | |
4093 | ||
4094 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
4095 | pseudo-op, but slightly different. A sample is | |
4096 | .stabx "main:F-1",.main,142,0 | |
4097 | The first argument is the symbol name to create. The second is the | |
4098 | value, and the third is the storage class. The fourth seems to be | |
4099 | always zero, and I am assuming it is the type. */ | |
4100 | ||
4101 | static void | |
98027b10 | 4102 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4103 | { |
4104 | char *name; | |
4105 | int len; | |
4106 | symbolS *sym; | |
4107 | expressionS exp; | |
4108 | ||
4109 | name = demand_copy_C_string (&len); | |
4110 | ||
4111 | if (*input_line_pointer != ',') | |
4112 | { | |
4113 | as_bad (_("missing value")); | |
4114 | return; | |
4115 | } | |
4116 | ++input_line_pointer; | |
4117 | ||
b34976b6 | 4118 | ppc_stab_symbol = TRUE; |
252b5132 | 4119 | sym = symbol_make (name); |
b34976b6 | 4120 | ppc_stab_symbol = FALSE; |
252b5132 | 4121 | |
809ffe0d | 4122 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
4123 | |
4124 | (void) expression (&exp); | |
4125 | ||
4126 | switch (exp.X_op) | |
4127 | { | |
4128 | case O_illegal: | |
4129 | case O_absent: | |
4130 | case O_big: | |
4131 | as_bad (_("illegal .stabx expression; zero assumed")); | |
4132 | exp.X_add_number = 0; | |
4133 | /* Fall through. */ | |
4134 | case O_constant: | |
4135 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 4136 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
4137 | break; |
4138 | ||
4139 | case O_symbol: | |
4140 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 4141 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4142 | else |
4143 | { | |
4144 | S_SET_VALUE (sym, | |
4145 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 4146 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
4147 | } |
4148 | break; | |
4149 | ||
4150 | default: | |
4151 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
4152 | fail at some later point, but this is probably the right |
4153 | thing to do here. */ | |
809ffe0d | 4154 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4155 | break; |
4156 | } | |
4157 | ||
4158 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4159 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4160 | |
4161 | if (*input_line_pointer != ',') | |
4162 | { | |
4163 | as_bad (_("missing class")); | |
4164 | return; | |
4165 | } | |
4166 | ++input_line_pointer; | |
4167 | ||
4168 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
4169 | ||
4170 | if (*input_line_pointer != ',') | |
4171 | { | |
4172 | as_bad (_("missing type")); | |
4173 | return; | |
4174 | } | |
4175 | ++input_line_pointer; | |
4176 | ||
4177 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
4178 | ||
809ffe0d | 4179 | symbol_get_tc (sym)->output = 1; |
252b5132 | 4180 | |
c734e7e3 TG |
4181 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) |
4182 | { | |
4183 | /* In this case : | |
252b5132 | 4184 | |
c734e7e3 TG |
4185 | .bs name |
4186 | .stabx "z",arrays_,133,0 | |
4187 | .es | |
99a814a1 | 4188 | |
c734e7e3 | 4189 | .comm arrays_,13768,3 |
99a814a1 | 4190 | |
c734e7e3 TG |
4191 | resolve_symbol_value will copy the exp's "within" into sym's when the |
4192 | offset is 0. Since this seems to be corner case problem, | |
4193 | only do the correction for storage class C_STSYM. A better solution | |
4194 | would be to have the tc field updated in ppc_symbol_new_hook. */ | |
99a814a1 | 4195 | |
c734e7e3 TG |
4196 | if (exp.X_op == O_symbol) |
4197 | { | |
4198 | if (ppc_current_block == NULL) | |
4199 | as_bad (_(".stabx of storage class stsym must be within .bs/.es")); | |
99a814a1 | 4200 | |
c734e7e3 TG |
4201 | symbol_get_tc (sym)->within = ppc_current_block; |
4202 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
4203 | } | |
4204 | } | |
99a814a1 | 4205 | |
252b5132 RH |
4206 | if (exp.X_op != O_symbol |
4207 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
4208 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
4209 | ppc_frob_label (sym); | |
4210 | else | |
4211 | { | |
4212 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4213 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4214 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
4215 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
4216 | } |
4217 | ||
4218 | demand_empty_rest_of_line (); | |
4219 | } | |
4220 | ||
4221 | /* The .function pseudo-op. This takes several arguments. The first | |
4222 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 4223 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
4224 | uses the same name for both. I have no idea what the third and |
4225 | fourth arguments are meant to be. The optional fifth argument is | |
4226 | an expression for the size of the function. In COFF this symbol | |
4227 | gets an aux entry like that used for a csect. */ | |
4228 | ||
4229 | static void | |
98027b10 | 4230 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4231 | { |
4232 | char *name; | |
4233 | char endc; | |
4234 | char *s; | |
4235 | symbolS *ext_sym; | |
4236 | symbolS *lab_sym; | |
4237 | ||
4238 | name = input_line_pointer; | |
4239 | endc = get_symbol_end (); | |
4240 | ||
4241 | /* Ignore any [PR] suffix. */ | |
4242 | name = ppc_canonicalize_symbol_name (name); | |
4243 | s = strchr (name, '['); | |
4244 | if (s != (char *) NULL | |
4245 | && strcmp (s + 1, "PR]") == 0) | |
4246 | *s = '\0'; | |
4247 | ||
4248 | ext_sym = symbol_find_or_make (name); | |
4249 | ||
4250 | *input_line_pointer = endc; | |
4251 | ||
4252 | if (*input_line_pointer != ',') | |
4253 | { | |
4254 | as_bad (_("missing symbol name")); | |
4255 | ignore_rest_of_line (); | |
4256 | return; | |
4257 | } | |
4258 | ++input_line_pointer; | |
4259 | ||
4260 | name = input_line_pointer; | |
4261 | endc = get_symbol_end (); | |
4262 | ||
4263 | lab_sym = symbol_find_or_make (name); | |
4264 | ||
4265 | *input_line_pointer = endc; | |
4266 | ||
4267 | if (ext_sym != lab_sym) | |
4268 | { | |
809ffe0d ILT |
4269 | expressionS exp; |
4270 | ||
4271 | exp.X_op = O_symbol; | |
4272 | exp.X_add_symbol = lab_sym; | |
4273 | exp.X_op_symbol = NULL; | |
4274 | exp.X_add_number = 0; | |
4275 | exp.X_unsigned = 0; | |
4276 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
4277 | } |
4278 | ||
96d56e9f NC |
4279 | if (symbol_get_tc (ext_sym)->symbol_class == -1) |
4280 | symbol_get_tc (ext_sym)->symbol_class = XMC_PR; | |
809ffe0d | 4281 | symbol_get_tc (ext_sym)->output = 1; |
252b5132 RH |
4282 | |
4283 | if (*input_line_pointer == ',') | |
4284 | { | |
91d6fa6a | 4285 | expressionS exp; |
252b5132 RH |
4286 | |
4287 | /* Ignore the third argument. */ | |
4288 | ++input_line_pointer; | |
91d6fa6a | 4289 | expression (& exp); |
252b5132 RH |
4290 | if (*input_line_pointer == ',') |
4291 | { | |
4292 | /* Ignore the fourth argument. */ | |
4293 | ++input_line_pointer; | |
91d6fa6a | 4294 | expression (& exp); |
252b5132 RH |
4295 | if (*input_line_pointer == ',') |
4296 | { | |
4297 | /* The fifth argument is the function size. */ | |
4298 | ++input_line_pointer; | |
85645aed TG |
4299 | symbol_get_tc (ext_sym)->u.size = symbol_new |
4300 | ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); | |
4301 | pseudo_set (symbol_get_tc (ext_sym)->u.size); | |
252b5132 RH |
4302 | } |
4303 | } | |
4304 | } | |
4305 | ||
4306 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4307 | SF_SET_FUNCTION (ext_sym); | |
4308 | SF_SET_PROCESS (ext_sym); | |
4309 | coff_add_linesym (ext_sym); | |
4310 | ||
4311 | demand_empty_rest_of_line (); | |
4312 | } | |
4313 | ||
4314 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
4315 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
4316 | with the correct line number */ | |
5d6255fe | 4317 | |
8642cce8 | 4318 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
4319 | |
4320 | static void | |
98027b10 | 4321 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4322 | { |
4323 | symbolS *sym; | |
4324 | ||
4325 | sym = symbol_make (".bf"); | |
4326 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4327 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4328 | S_SET_VALUE (sym, frag_now_fix ()); |
4329 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4330 | ||
4331 | coff_line_base = get_absolute_expression (); | |
4332 | ||
4333 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4334 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
4335 | ||
8642cce8 | 4336 | /* Line number for bi. */ |
5d6255fe | 4337 | if (saved_bi_sym) |
8642cce8 TR |
4338 | { |
4339 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
4340 | saved_bi_sym = 0; | |
4341 | } | |
5d6255fe | 4342 | |
8642cce8 | 4343 | |
809ffe0d | 4344 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4345 | |
4346 | ppc_frob_label (sym); | |
4347 | ||
4348 | demand_empty_rest_of_line (); | |
4349 | } | |
4350 | ||
4351 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
4352 | ".ef", except that the line number is absolute, not relative to the | |
4353 | most recent ".bf" symbol. */ | |
4354 | ||
4355 | static void | |
98027b10 | 4356 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4357 | { |
4358 | symbolS *sym; | |
4359 | ||
4360 | sym = symbol_make (".ef"); | |
4361 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4362 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4363 | S_SET_VALUE (sym, frag_now_fix ()); |
4364 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4365 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4366 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4367 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4368 | |
4369 | ppc_frob_label (sym); | |
4370 | ||
4371 | demand_empty_rest_of_line (); | |
4372 | } | |
4373 | ||
4374 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
4375 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
4376 | the symbol list. The value of .bi will be know when the next .bf |
4377 | is encountered. */ | |
252b5132 RH |
4378 | |
4379 | static void | |
98027b10 | 4380 | ppc_biei (int ei) |
252b5132 RH |
4381 | { |
4382 | static symbolS *last_biei; | |
4383 | ||
4384 | char *name; | |
4385 | int len; | |
4386 | symbolS *sym; | |
4387 | symbolS *look; | |
4388 | ||
4389 | name = demand_copy_C_string (&len); | |
4390 | ||
4391 | /* The value of these symbols is actually file offset. Here we set | |
4392 | the value to the index into the line number entries. In | |
4393 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
4394 | to do the right thing. */ | |
4395 | ||
4396 | sym = symbol_make (name); | |
4397 | /* obj-coff.c currently only handles line numbers correctly in the | |
4398 | .text section. */ | |
4399 | S_SET_SEGMENT (sym, text_section); | |
4400 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 4401 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4402 | |
4403 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 4404 | symbol_get_tc (sym)->output = 1; |
81d4177b | 4405 | |
8642cce8 | 4406 | /* Save bi. */ |
5d6255fe | 4407 | if (ei) |
8642cce8 TR |
4408 | saved_bi_sym = 0; |
4409 | else | |
4410 | saved_bi_sym = sym; | |
4411 | ||
252b5132 RH |
4412 | for (look = last_biei ? last_biei : symbol_rootP; |
4413 | (look != (symbolS *) NULL | |
4414 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
4415 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
4416 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
4417 | look = symbol_next (look)) | |
4418 | ; | |
4419 | if (look != (symbolS *) NULL) | |
4420 | { | |
4421 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4422 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
4423 | last_biei = sym; | |
4424 | } | |
4425 | ||
4426 | demand_empty_rest_of_line (); | |
4427 | } | |
4428 | ||
4429 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
4430 | There is one argument, which is a csect symbol. The value of the | |
4431 | .bs symbol is the index of this csect symbol. */ | |
4432 | ||
4433 | static void | |
98027b10 | 4434 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4435 | { |
4436 | char *name; | |
4437 | char endc; | |
4438 | symbolS *csect; | |
4439 | symbolS *sym; | |
4440 | ||
4441 | if (ppc_current_block != NULL) | |
4442 | as_bad (_("nested .bs blocks")); | |
4443 | ||
4444 | name = input_line_pointer; | |
4445 | endc = get_symbol_end (); | |
4446 | ||
4447 | csect = symbol_find_or_make (name); | |
4448 | ||
4449 | *input_line_pointer = endc; | |
4450 | ||
4451 | sym = symbol_make (".bs"); | |
4452 | S_SET_SEGMENT (sym, now_seg); | |
4453 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
4454 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4455 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 4456 | |
809ffe0d | 4457 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
4458 | |
4459 | ppc_frob_label (sym); | |
4460 | ||
4461 | ppc_current_block = sym; | |
4462 | ||
4463 | demand_empty_rest_of_line (); | |
4464 | } | |
4465 | ||
4466 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
4467 | ||
4468 | static void | |
98027b10 | 4469 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4470 | { |
4471 | symbolS *sym; | |
4472 | ||
4473 | if (ppc_current_block == NULL) | |
4474 | as_bad (_(".es without preceding .bs")); | |
4475 | ||
4476 | sym = symbol_make (".es"); | |
4477 | S_SET_SEGMENT (sym, now_seg); | |
4478 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
4479 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4480 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4481 | |
4482 | ppc_frob_label (sym); | |
4483 | ||
4484 | ppc_current_block = NULL; | |
4485 | ||
4486 | demand_empty_rest_of_line (); | |
4487 | } | |
4488 | ||
4489 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
4490 | line number. */ | |
4491 | ||
4492 | static void | |
98027b10 | 4493 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4494 | { |
4495 | symbolS *sym; | |
4496 | ||
4497 | sym = symbol_make (".bb"); | |
4498 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4499 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4500 | S_SET_VALUE (sym, frag_now_fix ()); |
4501 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4502 | ||
4503 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4504 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
4505 | ||
809ffe0d | 4506 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4507 | |
4508 | SF_SET_PROCESS (sym); | |
4509 | ||
4510 | ppc_frob_label (sym); | |
4511 | ||
4512 | demand_empty_rest_of_line (); | |
4513 | } | |
4514 | ||
4515 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
4516 | line number. */ | |
4517 | ||
4518 | static void | |
98027b10 | 4519 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4520 | { |
4521 | symbolS *sym; | |
4522 | ||
4523 | sym = symbol_make (".eb"); | |
4524 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4525 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4526 | S_SET_VALUE (sym, frag_now_fix ()); |
4527 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4528 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4529 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4530 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4531 | |
4532 | SF_SET_PROCESS (sym); | |
4533 | ||
4534 | ppc_frob_label (sym); | |
4535 | ||
4536 | demand_empty_rest_of_line (); | |
4537 | } | |
4538 | ||
4539 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
4540 | specified name. */ | |
4541 | ||
4542 | static void | |
98027b10 | 4543 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4544 | { |
4545 | char *name; | |
4546 | int len; | |
4547 | symbolS *sym; | |
4548 | ||
4549 | name = demand_copy_C_string (&len); | |
4550 | sym = symbol_make (name); | |
4551 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4552 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4553 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
4554 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4555 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4556 | |
4557 | ppc_frob_label (sym); | |
4558 | ||
4559 | demand_empty_rest_of_line (); | |
4560 | } | |
4561 | ||
4562 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
4563 | ||
4564 | static void | |
98027b10 | 4565 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4566 | { |
4567 | symbolS *sym; | |
4568 | ||
4569 | sym = symbol_make (".ec"); | |
4570 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4571 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4572 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
4573 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4574 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4575 | |
4576 | ppc_frob_label (sym); | |
4577 | ||
4578 | demand_empty_rest_of_line (); | |
4579 | } | |
4580 | ||
4581 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
4582 | ||
4583 | static void | |
98027b10 | 4584 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4585 | { |
4586 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 4587 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
4588 | else |
4589 | { | |
4590 | subsegT subseg; | |
4591 | symbolS *sym; | |
4592 | symbolS *list; | |
81d4177b | 4593 | |
252b5132 RH |
4594 | subseg = ppc_data_subsegment; |
4595 | ++ppc_data_subsegment; | |
4596 | ||
4597 | subseg_new (segment_name (data_section), subseg); | |
4598 | ppc_toc_frag = frag_now; | |
4599 | ||
4600 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 4601 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4602 | S_SET_SEGMENT (sym, data_section); |
4603 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
4604 | symbol_get_tc (sym)->subseg = subseg; |
4605 | symbol_get_tc (sym)->output = 1; | |
4606 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
4607 | |
4608 | ppc_toc_csect = sym; | |
81d4177b | 4609 | |
252b5132 | 4610 | for (list = ppc_data_csects; |
809ffe0d ILT |
4611 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4612 | list = symbol_get_tc (list)->next) | |
252b5132 | 4613 | ; |
809ffe0d | 4614 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
4615 | |
4616 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4617 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4618 | &symbol_lastP); | |
252b5132 RH |
4619 | } |
4620 | ||
4621 | ppc_current_csect = ppc_toc_csect; | |
4622 | ||
4623 | demand_empty_rest_of_line (); | |
4624 | } | |
4625 | ||
4626 | /* The AIX assembler automatically aligns the operands of a .long or | |
4627 | .short pseudo-op, and we want to be compatible. */ | |
4628 | ||
4629 | static void | |
98027b10 | 4630 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
4631 | { |
4632 | frag_align (log_size, 0, 0); | |
4633 | record_alignment (now_seg, log_size); | |
4634 | cons (1 << log_size); | |
4635 | } | |
4636 | ||
4637 | static void | |
98027b10 | 4638 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
4639 | { |
4640 | expressionS exp; | |
4641 | int byte_count; | |
4642 | ||
4643 | (void) expression (&exp); | |
4644 | ||
4645 | if (exp.X_op != O_constant) | |
4646 | { | |
4647 | as_bad (_("non-constant byte count")); | |
4648 | return; | |
4649 | } | |
4650 | ||
4651 | byte_count = exp.X_add_number; | |
4652 | ||
4653 | if (*input_line_pointer != ',') | |
4654 | { | |
4655 | as_bad (_("missing value")); | |
4656 | return; | |
4657 | } | |
4658 | ||
4659 | ++input_line_pointer; | |
4660 | cons (byte_count); | |
4661 | } | |
4662 | ||
85645aed TG |
4663 | void |
4664 | ppc_xcoff_end (void) | |
4665 | { | |
4666 | int i; | |
4667 | ||
4668 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
4669 | { | |
4670 | struct dw_section *dws = &dw_sections[i]; | |
4671 | struct dw_subsection *dwss; | |
4672 | ||
4673 | if (dws->anon_subseg) | |
4674 | { | |
4675 | dwss = dws->anon_subseg; | |
4676 | dwss->link = dws->list_subseg; | |
4677 | } | |
4678 | else | |
4679 | dwss = dws->list_subseg; | |
4680 | ||
4681 | for (; dwss != NULL; dwss = dwss->link) | |
4682 | if (dwss->end_exp.X_add_symbol != NULL) | |
4683 | { | |
4684 | subseg_set (dws->sect, dwss->subseg); | |
4685 | symbol_set_value_now (dwss->end_exp.X_add_symbol); | |
4686 | } | |
4687 | } | |
4688 | } | |
4689 | ||
252b5132 | 4690 | #endif /* OBJ_XCOFF */ |
0baf16f2 | 4691 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
4692 | \f |
4693 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
4694 | ELF. This takes two or more arguments. | |
4695 | ||
4696 | When generating XCOFF output, the first argument is the name to | |
4697 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 4698 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4699 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4700 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4701 | depends on target word size. A 32-bit target uses 4-byte values, a |
4702 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4703 | |
4704 | When not generating XCOFF output, the arguments are the same, but | |
4705 | the first argument is simply ignored. */ | |
4706 | ||
4707 | static void | |
98027b10 | 4708 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4709 | { |
4710 | #ifdef OBJ_XCOFF | |
4711 | ||
4712 | /* Define the TOC symbol name. */ | |
4713 | { | |
4714 | char *name; | |
4715 | char endc; | |
4716 | symbolS *sym; | |
4717 | ||
4718 | if (ppc_toc_csect == (symbolS *) NULL | |
4719 | || ppc_toc_csect != ppc_current_csect) | |
4720 | { | |
4721 | as_bad (_(".tc not in .toc section")); | |
4722 | ignore_rest_of_line (); | |
4723 | return; | |
4724 | } | |
4725 | ||
4726 | name = input_line_pointer; | |
4727 | endc = get_symbol_end (); | |
4728 | ||
4729 | sym = symbol_find_or_make (name); | |
4730 | ||
4731 | *input_line_pointer = endc; | |
4732 | ||
4733 | if (S_IS_DEFINED (sym)) | |
4734 | { | |
4735 | symbolS *label; | |
4736 | ||
809ffe0d | 4737 | label = symbol_get_tc (ppc_current_csect)->within; |
96d56e9f | 4738 | if (symbol_get_tc (label)->symbol_class != XMC_TC0) |
252b5132 RH |
4739 | { |
4740 | as_bad (_(".tc with no label")); | |
4741 | ignore_rest_of_line (); | |
4742 | return; | |
4743 | } | |
4744 | ||
4745 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4746 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4747 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4748 | ||
4749 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4750 | ++input_line_pointer; | |
4751 | ||
4752 | return; | |
4753 | } | |
4754 | ||
4755 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4756 | symbol_set_frag (sym, frag_now); |
252b5132 | 4757 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
96d56e9f | 4758 | symbol_get_tc (sym)->symbol_class = XMC_TC; |
809ffe0d | 4759 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4760 | |
4761 | ppc_frob_label (sym); | |
4762 | } | |
4763 | ||
0baf16f2 AM |
4764 | #endif /* OBJ_XCOFF */ |
4765 | #ifdef OBJ_ELF | |
9c7977b3 | 4766 | int align; |
252b5132 RH |
4767 | |
4768 | /* Skip the TOC symbol name. */ | |
4769 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 4770 | || *input_line_pointer == ' ' |
252b5132 RH |
4771 | || *input_line_pointer == '[' |
4772 | || *input_line_pointer == ']' | |
4773 | || *input_line_pointer == '{' | |
4774 | || *input_line_pointer == '}') | |
4775 | ++input_line_pointer; | |
4776 | ||
0baf16f2 | 4777 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4778 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4779 | frag_align (align, 0, 0); |
4780 | record_alignment (now_seg, align); | |
0baf16f2 | 4781 | #endif /* OBJ_ELF */ |
252b5132 RH |
4782 | |
4783 | if (*input_line_pointer != ',') | |
4784 | demand_empty_rest_of_line (); | |
4785 | else | |
4786 | { | |
4787 | ++input_line_pointer; | |
2b3c4602 | 4788 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4789 | } |
4790 | } | |
0baf16f2 AM |
4791 | |
4792 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4793 | |
4794 | static void | |
98027b10 | 4795 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 4796 | { |
69c040df AM |
4797 | char *cpu_string; |
4798 | #define MAX_HISTORY 100 | |
fa452fa6 | 4799 | static ppc_cpu_t *cpu_history; |
69c040df AM |
4800 | static int curr_hist; |
4801 | ||
4802 | SKIP_WHITESPACE (); | |
4803 | ||
4804 | if (*input_line_pointer == '"') | |
4805 | { | |
4806 | int len; | |
4807 | cpu_string = demand_copy_C_string (&len); | |
4808 | } | |
4809 | else | |
4810 | { | |
4811 | char c; | |
4812 | cpu_string = input_line_pointer; | |
4813 | c = get_symbol_end (); | |
4814 | cpu_string = xstrdup (cpu_string); | |
4815 | *input_line_pointer = c; | |
4816 | } | |
4817 | ||
4818 | if (cpu_string != NULL) | |
4819 | { | |
fa452fa6 | 4820 | ppc_cpu_t old_cpu = ppc_cpu; |
69fe9ce5 | 4821 | ppc_cpu_t new_cpu; |
69c040df AM |
4822 | char *p; |
4823 | ||
4824 | for (p = cpu_string; *p != 0; p++) | |
4825 | *p = TOLOWER (*p); | |
4826 | ||
4827 | if (strcmp (cpu_string, "push") == 0) | |
4828 | { | |
4829 | if (cpu_history == NULL) | |
4830 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4831 | ||
4832 | if (curr_hist >= MAX_HISTORY) | |
4833 | as_bad (_(".machine stack overflow")); | |
4834 | else | |
4835 | cpu_history[curr_hist++] = ppc_cpu; | |
4836 | } | |
4837 | else if (strcmp (cpu_string, "pop") == 0) | |
4838 | { | |
4839 | if (curr_hist <= 0) | |
4840 | as_bad (_(".machine stack underflow")); | |
4841 | else | |
4842 | ppc_cpu = cpu_history[--curr_hist]; | |
4843 | } | |
776fc418 | 4844 | else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) |
69fe9ce5 | 4845 | ppc_cpu = new_cpu; |
69c040df AM |
4846 | else |
4847 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4848 | ||
4849 | if (ppc_cpu != old_cpu) | |
4850 | ppc_setup_opcodes (); | |
4851 | } | |
4852 | ||
4853 | demand_empty_rest_of_line (); | |
0baf16f2 | 4854 | } |
0baf16f2 | 4855 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
252b5132 RH |
4856 | \f |
4857 | #ifdef TE_PE | |
4858 | ||
99a814a1 | 4859 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4860 | |
4861 | /* Set the current section. */ | |
4862 | static void | |
98027b10 | 4863 | ppc_set_current_section (segT new) |
252b5132 RH |
4864 | { |
4865 | ppc_previous_section = ppc_current_section; | |
4866 | ppc_current_section = new; | |
4867 | } | |
4868 | ||
4869 | /* pseudo-op: .previous | |
4870 | behaviour: toggles the current section with the previous section. | |
4871 | errors: None | |
99a814a1 AM |
4872 | warnings: "No previous section" */ |
4873 | ||
252b5132 | 4874 | static void |
98027b10 | 4875 | ppc_previous (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4876 | { |
81d4177b | 4877 | if (ppc_previous_section == NULL) |
252b5132 | 4878 | { |
d6ed37ed | 4879 | as_warn (_("no previous section to return to, ignored.")); |
252b5132 RH |
4880 | return; |
4881 | } | |
4882 | ||
99a814a1 | 4883 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4884 | |
99a814a1 | 4885 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4886 | } |
4887 | ||
4888 | /* pseudo-op: .pdata | |
4889 | behaviour: predefined read only data section | |
b34976b6 | 4890 | double word aligned |
252b5132 RH |
4891 | errors: None |
4892 | warnings: None | |
4893 | initial: .section .pdata "adr3" | |
b34976b6 | 4894 | a - don't know -- maybe a misprint |
252b5132 RH |
4895 | d - initialized data |
4896 | r - readable | |
4897 | 3 - double word aligned (that would be 4 byte boundary) | |
4898 | ||
4899 | commentary: | |
4900 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4901 | handling, debugging, etc. */ |
252b5132 | 4902 | |
252b5132 | 4903 | static void |
98027b10 | 4904 | ppc_pdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4905 | { |
81d4177b | 4906 | if (pdata_section == 0) |
252b5132 RH |
4907 | { |
4908 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4909 | |
252b5132 RH |
4910 | bfd_set_section_flags (stdoutput, pdata_section, |
4911 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4912 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4913 | |
252b5132 RH |
4914 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
4915 | } | |
4916 | else | |
4917 | { | |
99a814a1 | 4918 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 4919 | } |
99a814a1 | 4920 | ppc_set_current_section (pdata_section); |
252b5132 RH |
4921 | } |
4922 | ||
4923 | /* pseudo-op: .ydata | |
4924 | behaviour: predefined read only data section | |
b34976b6 | 4925 | double word aligned |
252b5132 RH |
4926 | errors: None |
4927 | warnings: None | |
4928 | initial: .section .ydata "drw3" | |
b34976b6 | 4929 | a - don't know -- maybe a misprint |
252b5132 RH |
4930 | d - initialized data |
4931 | r - readable | |
4932 | 3 - double word aligned (that would be 4 byte boundary) | |
4933 | commentary: | |
4934 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
4935 | debugging, etc. */ |
4936 | ||
252b5132 | 4937 | static void |
98027b10 | 4938 | ppc_ydata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4939 | { |
81d4177b | 4940 | if (ydata_section == 0) |
252b5132 RH |
4941 | { |
4942 | ydata_section = subseg_new (".ydata", 0); | |
4943 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
4944 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4945 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
4946 | |
4947 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
4948 | } | |
4949 | else | |
4950 | { | |
4951 | ydata_section = subseg_new (".ydata", 0); | |
4952 | } | |
99a814a1 | 4953 | ppc_set_current_section (ydata_section); |
252b5132 RH |
4954 | } |
4955 | ||
4956 | /* pseudo-op: .reldata | |
4957 | behaviour: predefined read write data section | |
b34976b6 | 4958 | double word aligned (4-byte) |
252b5132 RH |
4959 | FIXME: relocation is applied to it |
4960 | FIXME: what's the difference between this and .data? | |
4961 | errors: None | |
4962 | warnings: None | |
4963 | initial: .section .reldata "drw3" | |
4964 | d - initialized data | |
4965 | r - readable | |
4966 | w - writeable | |
4967 | 3 - double word aligned (that would be 8 byte boundary) | |
4968 | ||
4969 | commentary: | |
4970 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
4971 | function descriptors, etc. */ |
4972 | ||
252b5132 | 4973 | static void |
98027b10 | 4974 | ppc_reldata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4975 | { |
4976 | if (reldata_section == 0) | |
4977 | { | |
4978 | reldata_section = subseg_new (".reldata", 0); | |
4979 | ||
4980 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
4981 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4982 | | SEC_DATA)); | |
252b5132 RH |
4983 | |
4984 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
4985 | } | |
4986 | else | |
4987 | { | |
4988 | reldata_section = subseg_new (".reldata", 0); | |
4989 | } | |
99a814a1 | 4990 | ppc_set_current_section (reldata_section); |
252b5132 RH |
4991 | } |
4992 | ||
4993 | /* pseudo-op: .rdata | |
4994 | behaviour: predefined read only data section | |
b34976b6 | 4995 | double word aligned |
252b5132 RH |
4996 | errors: None |
4997 | warnings: None | |
4998 | initial: .section .rdata "dr3" | |
4999 | d - initialized data | |
5000 | r - readable | |
99a814a1 AM |
5001 | 3 - double word aligned (that would be 4 byte boundary) */ |
5002 | ||
252b5132 | 5003 | static void |
98027b10 | 5004 | ppc_rdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5005 | { |
5006 | if (rdata_section == 0) | |
5007 | { | |
5008 | rdata_section = subseg_new (".rdata", 0); | |
5009 | bfd_set_section_flags (stdoutput, rdata_section, | |
5010 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
5011 | | SEC_READONLY | SEC_DATA )); | |
5012 | ||
5013 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
5014 | } | |
5015 | else | |
5016 | { | |
5017 | rdata_section = subseg_new (".rdata", 0); | |
5018 | } | |
99a814a1 | 5019 | ppc_set_current_section (rdata_section); |
252b5132 RH |
5020 | } |
5021 | ||
5022 | /* pseudo-op: .ualong | |
81d4177b | 5023 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 5024 | performed. |
252b5132 RH |
5025 | FIXME: test the alignment statement |
5026 | errors: None | |
99a814a1 AM |
5027 | warnings: None */ |
5028 | ||
252b5132 | 5029 | static void |
98027b10 | 5030 | ppc_ualong (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5031 | { |
99a814a1 AM |
5032 | /* Try for long. */ |
5033 | cons (4); | |
252b5132 RH |
5034 | } |
5035 | ||
5036 | /* pseudo-op: .znop <symbol name> | |
5037 | behaviour: Issue a nop instruction | |
b34976b6 | 5038 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
5039 | the supplied symbol name. |
5040 | errors: None | |
99a814a1 AM |
5041 | warnings: Missing symbol name */ |
5042 | ||
252b5132 | 5043 | static void |
98027b10 | 5044 | ppc_znop (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5045 | { |
5046 | unsigned long insn; | |
5047 | const struct powerpc_opcode *opcode; | |
252b5132 | 5048 | char *f; |
252b5132 | 5049 | symbolS *sym; |
252b5132 RH |
5050 | char *symbol_name; |
5051 | char c; | |
5052 | char *name; | |
252b5132 | 5053 | |
99a814a1 | 5054 | /* Strip out the symbol name. */ |
252b5132 RH |
5055 | symbol_name = input_line_pointer; |
5056 | c = get_symbol_end (); | |
5057 | ||
5058 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
5059 | strcpy (name, symbol_name); | |
5060 | ||
5061 | sym = symbol_find_or_make (name); | |
5062 | ||
5063 | *input_line_pointer = c; | |
5064 | ||
5065 | SKIP_WHITESPACE (); | |
5066 | ||
5067 | /* Look up the opcode in the hash table. */ | |
5068 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
5069 | ||
99a814a1 | 5070 | /* Stick in the nop. */ |
252b5132 RH |
5071 | insn = opcode->opcode; |
5072 | ||
5073 | /* Write out the instruction. */ | |
5074 | f = frag_more (4); | |
5075 | md_number_to_chars (f, insn, 4); | |
5076 | fix_new (frag_now, | |
5077 | f - frag_now->fr_literal, | |
5078 | 4, | |
5079 | sym, | |
5080 | 0, | |
5081 | 0, | |
5082 | BFD_RELOC_16_GOT_PCREL); | |
5083 | ||
5084 | } | |
5085 | ||
81d4177b KH |
5086 | /* pseudo-op: |
5087 | behaviour: | |
5088 | errors: | |
99a814a1 AM |
5089 | warnings: */ |
5090 | ||
252b5132 | 5091 | static void |
98027b10 | 5092 | ppc_pe_comm (int lcomm) |
252b5132 | 5093 | { |
98027b10 AM |
5094 | char *name; |
5095 | char c; | |
5096 | char *p; | |
252b5132 | 5097 | offsetT temp; |
98027b10 | 5098 | symbolS *symbolP; |
252b5132 RH |
5099 | offsetT align; |
5100 | ||
5101 | name = input_line_pointer; | |
5102 | c = get_symbol_end (); | |
5103 | ||
99a814a1 | 5104 | /* just after name is now '\0'. */ |
252b5132 RH |
5105 | p = input_line_pointer; |
5106 | *p = c; | |
5107 | SKIP_WHITESPACE (); | |
5108 | if (*input_line_pointer != ',') | |
5109 | { | |
d6ed37ed | 5110 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
5111 | ignore_rest_of_line (); |
5112 | return; | |
5113 | } | |
5114 | ||
5115 | input_line_pointer++; /* skip ',' */ | |
5116 | if ((temp = get_absolute_expression ()) < 0) | |
5117 | { | |
5118 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
5119 | ignore_rest_of_line (); | |
5120 | return; | |
5121 | } | |
5122 | ||
5123 | if (! lcomm) | |
5124 | { | |
5125 | /* The third argument to .comm is the alignment. */ | |
5126 | if (*input_line_pointer != ',') | |
5127 | align = 3; | |
5128 | else | |
5129 | { | |
5130 | ++input_line_pointer; | |
5131 | align = get_absolute_expression (); | |
5132 | if (align <= 0) | |
5133 | { | |
5134 | as_warn (_("ignoring bad alignment")); | |
5135 | align = 3; | |
5136 | } | |
5137 | } | |
5138 | } | |
5139 | ||
5140 | *p = 0; | |
5141 | symbolP = symbol_find_or_make (name); | |
5142 | ||
5143 | *p = c; | |
5144 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
5145 | { | |
d6ed37ed | 5146 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
5147 | S_GET_NAME (symbolP)); |
5148 | ignore_rest_of_line (); | |
5149 | return; | |
5150 | } | |
5151 | ||
5152 | if (S_GET_VALUE (symbolP)) | |
5153 | { | |
5154 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
d6ed37ed | 5155 | as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
5156 | S_GET_NAME (symbolP), |
5157 | (long) S_GET_VALUE (symbolP), | |
5158 | (long) temp); | |
5159 | } | |
5160 | else | |
5161 | { | |
5162 | S_SET_VALUE (symbolP, (valueT) temp); | |
5163 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 5164 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
5165 | } |
5166 | ||
5167 | demand_empty_rest_of_line (); | |
5168 | } | |
5169 | ||
5170 | /* | |
5171 | * implement the .section pseudo op: | |
5172 | * .section name {, "flags"} | |
5173 | * ^ ^ | |
5174 | * | +--- optional flags: 'b' for bss | |
5175 | * | 'i' for info | |
5176 | * +-- section name 'l' for lib | |
5177 | * 'n' for noload | |
5178 | * 'o' for over | |
5179 | * 'w' for data | |
5180 | * 'd' (apparently m88k for data) | |
5181 | * 'x' for text | |
5182 | * But if the argument is not a quoted string, treat it as a | |
5183 | * subsegment number. | |
5184 | * | |
5185 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
5186 | * additions/changes for the moto-pas assembler support. There are three | |
5187 | * categories: | |
5188 | * | |
81d4177b | 5189 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
5190 | * setting bits that bfd probably neither understands or uses. The |
5191 | * correct approach (?) will have to incorporate extra fields attached | |
5192 | * to the section to hold the system specific stuff. (krk) | |
5193 | * | |
5194 | * Section Contents: | |
5195 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
5196 | * 'c' - section has code | |
5197 | * 'd' - section has initialized data | |
5198 | * 'u' - section has uninitialized data | |
5199 | * 'i' - section contains directives (info) | |
5200 | * 'n' - section can be discarded | |
5201 | * 'R' - remove section at link time | |
5202 | * | |
5203 | * Section Protection: | |
5204 | * 'r' - section is readable | |
5205 | * 'w' - section is writeable | |
5206 | * 'x' - section is executable | |
5207 | * 's' - section is sharable | |
5208 | * | |
5209 | * Section Alignment: | |
5210 | * '0' - align to byte boundary | |
5211 | * '1' - align to halfword undary | |
5212 | * '2' - align to word boundary | |
5213 | * '3' - align to doubleword boundary | |
5214 | * '4' - align to quadword boundary | |
5215 | * '5' - align to 32 byte boundary | |
5216 | * '6' - align to 64 byte boundary | |
5217 | * | |
5218 | */ | |
5219 | ||
5220 | void | |
98027b10 | 5221 | ppc_pe_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5222 | { |
99a814a1 | 5223 | /* Strip out the section name. */ |
252b5132 RH |
5224 | char *section_name; |
5225 | char c; | |
5226 | char *name; | |
5227 | unsigned int exp; | |
5228 | flagword flags; | |
5229 | segT sec; | |
5230 | int align; | |
5231 | ||
5232 | section_name = input_line_pointer; | |
5233 | c = get_symbol_end (); | |
5234 | ||
5235 | name = xmalloc (input_line_pointer - section_name + 1); | |
5236 | strcpy (name, section_name); | |
5237 | ||
5238 | *input_line_pointer = c; | |
5239 | ||
5240 | SKIP_WHITESPACE (); | |
5241 | ||
5242 | exp = 0; | |
5243 | flags = SEC_NO_FLAGS; | |
5244 | ||
5245 | if (strcmp (name, ".idata$2") == 0) | |
5246 | { | |
5247 | align = 0; | |
5248 | } | |
5249 | else if (strcmp (name, ".idata$3") == 0) | |
5250 | { | |
5251 | align = 0; | |
5252 | } | |
5253 | else if (strcmp (name, ".idata$4") == 0) | |
5254 | { | |
5255 | align = 2; | |
5256 | } | |
5257 | else if (strcmp (name, ".idata$5") == 0) | |
5258 | { | |
5259 | align = 2; | |
5260 | } | |
5261 | else if (strcmp (name, ".idata$6") == 0) | |
5262 | { | |
5263 | align = 1; | |
5264 | } | |
5265 | else | |
99a814a1 AM |
5266 | /* Default alignment to 16 byte boundary. */ |
5267 | align = 4; | |
252b5132 RH |
5268 | |
5269 | if (*input_line_pointer == ',') | |
5270 | { | |
5271 | ++input_line_pointer; | |
5272 | SKIP_WHITESPACE (); | |
5273 | if (*input_line_pointer != '"') | |
5274 | exp = get_absolute_expression (); | |
5275 | else | |
5276 | { | |
5277 | ++input_line_pointer; | |
5278 | while (*input_line_pointer != '"' | |
5279 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
5280 | { | |
5281 | switch (*input_line_pointer) | |
5282 | { | |
5283 | /* Section Contents */ | |
5284 | case 'a': /* unknown */ | |
d6ed37ed | 5285 | as_bad (_("unsupported section attribute -- 'a'")); |
252b5132 RH |
5286 | break; |
5287 | case 'c': /* code section */ | |
81d4177b | 5288 | flags |= SEC_CODE; |
252b5132 RH |
5289 | break; |
5290 | case 'd': /* section has initialized data */ | |
5291 | flags |= SEC_DATA; | |
5292 | break; | |
5293 | case 'u': /* section has uninitialized data */ | |
5294 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
5295 | in winnt.h */ | |
5296 | flags |= SEC_ROM; | |
5297 | break; | |
5298 | case 'i': /* section contains directives (info) */ | |
5299 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
5300 | in winnt.h */ | |
5301 | flags |= SEC_HAS_CONTENTS; | |
5302 | break; | |
5303 | case 'n': /* section can be discarded */ | |
81d4177b | 5304 | flags &=~ SEC_LOAD; |
252b5132 RH |
5305 | break; |
5306 | case 'R': /* Remove section at link time */ | |
5307 | flags |= SEC_NEVER_LOAD; | |
5308 | break; | |
8d452c78 | 5309 | #if IFLICT_BRAIN_DAMAGE |
252b5132 RH |
5310 | /* Section Protection */ |
5311 | case 'r': /* section is readable */ | |
5312 | flags |= IMAGE_SCN_MEM_READ; | |
5313 | break; | |
5314 | case 'w': /* section is writeable */ | |
5315 | flags |= IMAGE_SCN_MEM_WRITE; | |
5316 | break; | |
5317 | case 'x': /* section is executable */ | |
5318 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
5319 | break; | |
5320 | case 's': /* section is sharable */ | |
5321 | flags |= IMAGE_SCN_MEM_SHARED; | |
5322 | break; | |
5323 | ||
5324 | /* Section Alignment */ | |
5325 | case '0': /* align to byte boundary */ | |
5326 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
5327 | align = 0; | |
5328 | break; | |
5329 | case '1': /* align to halfword boundary */ | |
5330 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
5331 | align = 1; | |
5332 | break; | |
5333 | case '2': /* align to word boundary */ | |
5334 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
5335 | align = 2; | |
5336 | break; | |
5337 | case '3': /* align to doubleword boundary */ | |
5338 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
5339 | align = 3; | |
5340 | break; | |
5341 | case '4': /* align to quadword boundary */ | |
5342 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
5343 | align = 4; | |
5344 | break; | |
5345 | case '5': /* align to 32 byte boundary */ | |
5346 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
5347 | align = 5; | |
5348 | break; | |
5349 | case '6': /* align to 64 byte boundary */ | |
5350 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
5351 | align = 6; | |
5352 | break; | |
8d452c78 | 5353 | #endif |
252b5132 | 5354 | default: |
99a814a1 AM |
5355 | as_bad (_("unknown section attribute '%c'"), |
5356 | *input_line_pointer); | |
252b5132 RH |
5357 | break; |
5358 | } | |
5359 | ++input_line_pointer; | |
5360 | } | |
5361 | if (*input_line_pointer == '"') | |
5362 | ++input_line_pointer; | |
5363 | } | |
5364 | } | |
5365 | ||
5366 | sec = subseg_new (name, (subsegT) exp); | |
5367 | ||
99a814a1 | 5368 | ppc_set_current_section (sec); |
252b5132 RH |
5369 | |
5370 | if (flags != SEC_NO_FLAGS) | |
5371 | { | |
5372 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
5373 | as_bad (_("error setting flags for \"%s\": %s"), | |
5374 | bfd_section_name (stdoutput, sec), | |
5375 | bfd_errmsg (bfd_get_error ())); | |
5376 | } | |
5377 | ||
99a814a1 | 5378 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
5379 | } |
5380 | ||
5381 | static void | |
98027b10 | 5382 | ppc_pe_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5383 | { |
5384 | char *name; | |
5385 | char endc; | |
5386 | symbolS *ext_sym; | |
5387 | ||
5388 | name = input_line_pointer; | |
5389 | endc = get_symbol_end (); | |
5390 | ||
5391 | ext_sym = symbol_find_or_make (name); | |
5392 | ||
5393 | *input_line_pointer = endc; | |
5394 | ||
5395 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
5396 | SF_SET_FUNCTION (ext_sym); | |
5397 | SF_SET_PROCESS (ext_sym); | |
5398 | coff_add_linesym (ext_sym); | |
5399 | ||
5400 | demand_empty_rest_of_line (); | |
5401 | } | |
5402 | ||
5403 | static void | |
98027b10 | 5404 | ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5405 | { |
5406 | if (tocdata_section == 0) | |
5407 | { | |
5408 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 5409 | /* FIXME: section flags won't work. */ |
252b5132 RH |
5410 | bfd_set_section_flags (stdoutput, tocdata_section, |
5411 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 5412 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
5413 | |
5414 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
5415 | } | |
5416 | else | |
5417 | { | |
5418 | rdata_section = subseg_new (".tocd", 0); | |
5419 | } | |
5420 | ||
99a814a1 | 5421 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
5422 | |
5423 | demand_empty_rest_of_line (); | |
5424 | } | |
5425 | ||
5426 | /* Don't adjust TOC relocs to use the section symbol. */ | |
5427 | ||
5428 | int | |
98027b10 | 5429 | ppc_pe_fix_adjustable (fixS *fix) |
252b5132 RH |
5430 | { |
5431 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
5432 | } | |
5433 | ||
5434 | #endif | |
5435 | \f | |
5436 | #ifdef OBJ_XCOFF | |
5437 | ||
5438 | /* XCOFF specific symbol and file handling. */ | |
5439 | ||
5440 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
5441 | any, to use square brackets, and to be in upper case. */ | |
5442 | ||
5443 | char * | |
98027b10 | 5444 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5445 | { |
5446 | char *s; | |
5447 | ||
5448 | if (ppc_stab_symbol) | |
5449 | return name; | |
5450 | ||
5451 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5452 | ; | |
5453 | if (*s != '\0') | |
5454 | { | |
5455 | char brac; | |
5456 | ||
5457 | if (*s == '[') | |
5458 | brac = ']'; | |
5459 | else | |
5460 | { | |
5461 | *s = '['; | |
5462 | brac = '}'; | |
5463 | } | |
5464 | ||
5465 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5466 | *s = TOUPPER (*s); |
252b5132 RH |
5467 | |
5468 | if (*s == '\0' || s[1] != '\0') | |
5469 | as_bad (_("bad symbol suffix")); | |
5470 | ||
5471 | *s = ']'; | |
5472 | } | |
5473 | ||
5474 | return name; | |
5475 | } | |
5476 | ||
5477 | /* Set the class of a symbol based on the suffix, if any. This is | |
5478 | called whenever a new symbol is created. */ | |
5479 | ||
5480 | void | |
98027b10 | 5481 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5482 | { |
809ffe0d | 5483 | struct ppc_tc_sy *tc; |
252b5132 RH |
5484 | const char *s; |
5485 | ||
809ffe0d ILT |
5486 | tc = symbol_get_tc (sym); |
5487 | tc->next = NULL; | |
5488 | tc->output = 0; | |
96d56e9f | 5489 | tc->symbol_class = -1; |
809ffe0d ILT |
5490 | tc->real_name = NULL; |
5491 | tc->subseg = 0; | |
5492 | tc->align = 0; | |
85645aed TG |
5493 | tc->u.size = NULL; |
5494 | tc->u.dw = NULL; | |
809ffe0d | 5495 | tc->within = NULL; |
252b5132 RH |
5496 | |
5497 | if (ppc_stab_symbol) | |
5498 | return; | |
5499 | ||
5500 | s = strchr (S_GET_NAME (sym), '['); | |
5501 | if (s == (const char *) NULL) | |
5502 | { | |
5503 | /* There is no suffix. */ | |
5504 | return; | |
5505 | } | |
5506 | ||
5507 | ++s; | |
5508 | ||
5509 | switch (s[0]) | |
5510 | { | |
5511 | case 'B': | |
5512 | if (strcmp (s, "BS]") == 0) | |
96d56e9f | 5513 | tc->symbol_class = XMC_BS; |
252b5132 RH |
5514 | break; |
5515 | case 'D': | |
5516 | if (strcmp (s, "DB]") == 0) | |
96d56e9f | 5517 | tc->symbol_class = XMC_DB; |
252b5132 | 5518 | else if (strcmp (s, "DS]") == 0) |
96d56e9f | 5519 | tc->symbol_class = XMC_DS; |
252b5132 RH |
5520 | break; |
5521 | case 'G': | |
5522 | if (strcmp (s, "GL]") == 0) | |
96d56e9f | 5523 | tc->symbol_class = XMC_GL; |
252b5132 RH |
5524 | break; |
5525 | case 'P': | |
5526 | if (strcmp (s, "PR]") == 0) | |
96d56e9f | 5527 | tc->symbol_class = XMC_PR; |
252b5132 RH |
5528 | break; |
5529 | case 'R': | |
5530 | if (strcmp (s, "RO]") == 0) | |
96d56e9f | 5531 | tc->symbol_class = XMC_RO; |
252b5132 | 5532 | else if (strcmp (s, "RW]") == 0) |
96d56e9f | 5533 | tc->symbol_class = XMC_RW; |
252b5132 RH |
5534 | break; |
5535 | case 'S': | |
5536 | if (strcmp (s, "SV]") == 0) | |
96d56e9f | 5537 | tc->symbol_class = XMC_SV; |
252b5132 RH |
5538 | break; |
5539 | case 'T': | |
5540 | if (strcmp (s, "TC]") == 0) | |
96d56e9f | 5541 | tc->symbol_class = XMC_TC; |
252b5132 | 5542 | else if (strcmp (s, "TI]") == 0) |
96d56e9f | 5543 | tc->symbol_class = XMC_TI; |
252b5132 | 5544 | else if (strcmp (s, "TB]") == 0) |
96d56e9f | 5545 | tc->symbol_class = XMC_TB; |
252b5132 | 5546 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
96d56e9f | 5547 | tc->symbol_class = XMC_TC0; |
252b5132 RH |
5548 | break; |
5549 | case 'U': | |
5550 | if (strcmp (s, "UA]") == 0) | |
96d56e9f | 5551 | tc->symbol_class = XMC_UA; |
252b5132 | 5552 | else if (strcmp (s, "UC]") == 0) |
96d56e9f | 5553 | tc->symbol_class = XMC_UC; |
252b5132 RH |
5554 | break; |
5555 | case 'X': | |
5556 | if (strcmp (s, "XO]") == 0) | |
96d56e9f | 5557 | tc->symbol_class = XMC_XO; |
252b5132 RH |
5558 | break; |
5559 | } | |
5560 | ||
96d56e9f | 5561 | if (tc->symbol_class == -1) |
d6ed37ed | 5562 | as_bad (_("unrecognized symbol suffix")); |
252b5132 RH |
5563 | } |
5564 | ||
5565 | /* Set the class of a label based on where it is defined. This | |
5566 | handles symbols without suffixes. Also, move the symbol so that it | |
5567 | follows the csect symbol. */ | |
5568 | ||
5569 | void | |
98027b10 | 5570 | ppc_frob_label (symbolS *sym) |
252b5132 RH |
5571 | { |
5572 | if (ppc_current_csect != (symbolS *) NULL) | |
5573 | { | |
96d56e9f NC |
5574 | if (symbol_get_tc (sym)->symbol_class == -1) |
5575 | symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; | |
252b5132 RH |
5576 | |
5577 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5578 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
5579 | &symbol_rootP, &symbol_lastP); | |
5580 | symbol_get_tc (ppc_current_csect)->within = sym; | |
2fb4b302 | 5581 | symbol_get_tc (sym)->within = ppc_current_csect; |
252b5132 | 5582 | } |
07a53e5c RH |
5583 | |
5584 | #ifdef OBJ_ELF | |
5585 | dwarf2_emit_label (sym); | |
5586 | #endif | |
252b5132 RH |
5587 | } |
5588 | ||
5589 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
5590 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
5591 | the symbols. */ | |
5592 | ||
b34976b6 | 5593 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
5594 | |
5595 | /* Change the name of a symbol just before writing it out. Set the | |
5596 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
5597 | class suffix. Return 1 if the symbol should not be included in the | |
5598 | symbol table. */ | |
5599 | ||
5600 | int | |
98027b10 | 5601 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
5602 | { |
5603 | static symbolS *ppc_last_function; | |
5604 | static symbolS *set_end; | |
5605 | ||
5606 | /* Discard symbols that should not be included in the output symbol | |
5607 | table. */ | |
809ffe0d ILT |
5608 | if (! symbol_used_in_reloc_p (sym) |
5609 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 5610 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5611 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
5612 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
5613 | return 1; | |
5614 | ||
a161fe53 AM |
5615 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
5616 | if (sym == abs_section_sym) | |
5617 | return 1; | |
5618 | ||
809ffe0d ILT |
5619 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
5620 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
5621 | else |
5622 | { | |
5623 | const char *name; | |
5624 | const char *s; | |
5625 | ||
5626 | name = S_GET_NAME (sym); | |
5627 | s = strchr (name, '['); | |
5628 | if (s != (char *) NULL) | |
5629 | { | |
5630 | unsigned int len; | |
5631 | char *snew; | |
5632 | ||
5633 | len = s - name; | |
5634 | snew = xmalloc (len + 1); | |
5635 | memcpy (snew, name, len); | |
5636 | snew[len] = '\0'; | |
5637 | ||
5638 | S_SET_NAME (sym, snew); | |
5639 | } | |
5640 | } | |
5641 | ||
5642 | if (set_end != (symbolS *) NULL) | |
5643 | { | |
5644 | SA_SET_SYM_ENDNDX (set_end, sym); | |
5645 | set_end = NULL; | |
5646 | } | |
5647 | ||
5648 | if (SF_GET_FUNCTION (sym)) | |
5649 | { | |
5650 | if (ppc_last_function != (symbolS *) NULL) | |
5651 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
5652 | ppc_last_function = sym; | |
85645aed | 5653 | if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) |
252b5132 | 5654 | { |
85645aed | 5655 | resolve_symbol_value (symbol_get_tc (sym)->u.size); |
809ffe0d | 5656 | SA_SET_SYM_FSIZE (sym, |
85645aed | 5657 | (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); |
252b5132 RH |
5658 | } |
5659 | } | |
5660 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5661 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5662 | { | |
5663 | if (ppc_last_function == (symbolS *) NULL) | |
5664 | as_bad (_(".ef with no preceding .function")); | |
5665 | else | |
5666 | { | |
5667 | set_end = ppc_last_function; | |
5668 | ppc_last_function = NULL; | |
5669 | ||
5670 | /* We don't have a C_EFCN symbol, but we need to force the | |
5671 | COFF backend to believe that it has seen one. */ | |
5672 | coff_last_function = NULL; | |
5673 | } | |
5674 | } | |
5675 | ||
670ec21d | 5676 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5677 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5678 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5679 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5680 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5681 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5682 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5683 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5684 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5685 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5686 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5687 | ||
5688 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
8602d4fe | 5689 | || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT |
252b5132 RH |
5690 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) |
5691 | { | |
5692 | int i; | |
5693 | union internal_auxent *a; | |
5694 | ||
5695 | /* Create a csect aux. */ | |
5696 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5697 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d | 5698 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
96d56e9f | 5699 | if (symbol_get_tc (sym)->symbol_class == XMC_TC0) |
252b5132 RH |
5700 | { |
5701 | /* This is the TOC table. */ | |
5702 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5703 | a->x_csect.x_scnlen.l = 0; | |
5704 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5705 | } | |
809ffe0d | 5706 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5707 | { |
5708 | /* This is a csect symbol. x_scnlen is the size of the | |
5709 | csect. */ | |
809ffe0d | 5710 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5711 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5712 | S_GET_SEGMENT (sym)) | |
5713 | - S_GET_VALUE (sym)); | |
5714 | else | |
5715 | { | |
6386f3a7 | 5716 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5717 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5718 | - S_GET_VALUE (sym)); |
5719 | } | |
809ffe0d | 5720 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5721 | } |
5722 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5723 | { | |
5724 | /* This is a common symbol. */ | |
809ffe0d ILT |
5725 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5726 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5727 | if (S_IS_EXTERNAL (sym)) |
96d56e9f | 5728 | symbol_get_tc (sym)->symbol_class = XMC_RW; |
252b5132 | 5729 | else |
96d56e9f | 5730 | symbol_get_tc (sym)->symbol_class = XMC_BS; |
252b5132 RH |
5731 | } |
5732 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5733 | { | |
5734 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5735 | ppc_adjust_symtab. */ |
b34976b6 | 5736 | ppc_saw_abs = TRUE; |
252b5132 | 5737 | a->x_csect.x_smtyp = XTY_LD; |
96d56e9f NC |
5738 | if (symbol_get_tc (sym)->symbol_class == -1) |
5739 | symbol_get_tc (sym)->symbol_class = XMC_XO; | |
252b5132 RH |
5740 | } |
5741 | else if (! S_IS_DEFINED (sym)) | |
5742 | { | |
5743 | /* This is an external symbol. */ | |
5744 | a->x_csect.x_scnlen.l = 0; | |
5745 | a->x_csect.x_smtyp = XTY_ER; | |
5746 | } | |
96d56e9f | 5747 | else if (symbol_get_tc (sym)->symbol_class == XMC_TC) |
252b5132 RH |
5748 | { |
5749 | symbolS *next; | |
5750 | ||
5751 | /* This is a TOC definition. x_scnlen is the size of the | |
5752 | TOC entry. */ | |
5753 | next = symbol_next (sym); | |
96d56e9f | 5754 | while (symbol_get_tc (next)->symbol_class == XMC_TC0) |
252b5132 RH |
5755 | next = symbol_next (next); |
5756 | if (next == (symbolS *) NULL | |
96d56e9f | 5757 | || symbol_get_tc (next)->symbol_class != XMC_TC) |
252b5132 RH |
5758 | { |
5759 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5760 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5761 | data_section) | |
5762 | - S_GET_VALUE (sym)); | |
5763 | else | |
5764 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5765 | - S_GET_VALUE (sym)); | |
5766 | } | |
5767 | else | |
5768 | { | |
6386f3a7 | 5769 | resolve_symbol_value (next); |
252b5132 RH |
5770 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5771 | - S_GET_VALUE (sym)); | |
5772 | } | |
5773 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5774 | } | |
5775 | else | |
5776 | { | |
5777 | symbolS *csect; | |
5778 | ||
5779 | /* This is a normal symbol definition. x_scnlen is the | |
5780 | symbol index of the containing csect. */ | |
5781 | if (S_GET_SEGMENT (sym) == text_section) | |
5782 | csect = ppc_text_csects; | |
5783 | else if (S_GET_SEGMENT (sym) == data_section) | |
5784 | csect = ppc_data_csects; | |
5785 | else | |
5786 | abort (); | |
5787 | ||
5788 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5789 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5790 | |
5791 | if (csect == (symbolS *) NULL) | |
5792 | { | |
5793 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5794 | a->x_csect.x_scnlen.l = 0; | |
5795 | } | |
5796 | else | |
5797 | { | |
809ffe0d | 5798 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5799 | { |
6386f3a7 | 5800 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5801 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5802 | > S_GET_VALUE (sym)) | |
252b5132 | 5803 | break; |
809ffe0d | 5804 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5805 | } |
5806 | ||
809ffe0d ILT |
5807 | a->x_csect.x_scnlen.p = |
5808 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5809 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5810 | 1; | |
252b5132 RH |
5811 | } |
5812 | a->x_csect.x_smtyp = XTY_LD; | |
5813 | } | |
81d4177b | 5814 | |
252b5132 RH |
5815 | a->x_csect.x_parmhash = 0; |
5816 | a->x_csect.x_snhash = 0; | |
96d56e9f | 5817 | if (symbol_get_tc (sym)->symbol_class == -1) |
252b5132 RH |
5818 | a->x_csect.x_smclas = XMC_PR; |
5819 | else | |
96d56e9f | 5820 | a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; |
252b5132 RH |
5821 | a->x_csect.x_stab = 0; |
5822 | a->x_csect.x_snstab = 0; | |
5823 | ||
5824 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5825 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5826 | } |
5827 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5828 | { | |
5829 | /* We want the value to be the symbol index of the referenced | |
5830 | csect symbol. BFD will do that for us if we set the right | |
5831 | flags. */ | |
b782de16 AM |
5832 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5833 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5834 | ||
5835 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5836 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5837 | } |
5838 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5839 | { | |
5840 | symbolS *block; | |
c734e7e3 | 5841 | valueT base; |
252b5132 | 5842 | |
809ffe0d | 5843 | block = symbol_get_tc (sym)->within; |
c734e7e3 TG |
5844 | if (block) |
5845 | { | |
5846 | /* The value is the offset from the enclosing csect. */ | |
5847 | symbolS *csect; | |
5848 | ||
5849 | csect = symbol_get_tc (block)->within; | |
5850 | resolve_symbol_value (csect); | |
5851 | base = S_GET_VALUE (csect); | |
5852 | } | |
5853 | else | |
5854 | base = 0; | |
5855 | ||
5856 | S_SET_VALUE (sym, S_GET_VALUE (sym) - base); | |
252b5132 RH |
5857 | } |
5858 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5859 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5860 | { | |
5861 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5862 | BFD will do that for us if we set the right flags. We have |
5863 | already set the value correctly. */ | |
809ffe0d | 5864 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5865 | } |
5866 | ||
5867 | return 0; | |
5868 | } | |
5869 | ||
5870 | /* Adjust the symbol table. This creates csect symbols for all | |
5871 | absolute symbols. */ | |
5872 | ||
5873 | void | |
98027b10 | 5874 | ppc_adjust_symtab (void) |
252b5132 RH |
5875 | { |
5876 | symbolS *sym; | |
5877 | ||
5878 | if (! ppc_saw_abs) | |
5879 | return; | |
5880 | ||
5881 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5882 | { | |
5883 | symbolS *csect; | |
5884 | int i; | |
5885 | union internal_auxent *a; | |
5886 | ||
5887 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5888 | continue; | |
5889 | ||
5890 | csect = symbol_create (".abs[XO]", absolute_section, | |
5891 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5892 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5893 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5894 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5895 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5896 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5897 | a->x_csect.x_scnlen.l = 0; |
5898 | a->x_csect.x_smtyp = XTY_SD; | |
5899 | a->x_csect.x_parmhash = 0; | |
5900 | a->x_csect.x_snhash = 0; | |
5901 | a->x_csect.x_smclas = XMC_XO; | |
5902 | a->x_csect.x_stab = 0; | |
5903 | a->x_csect.x_snstab = 0; | |
5904 | ||
5905 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5906 | ||
5907 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5908 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5909 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5910 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5911 | } |
5912 | ||
b34976b6 | 5913 | ppc_saw_abs = FALSE; |
252b5132 RH |
5914 | } |
5915 | ||
5916 | /* Set the VMA for a section. This is called on all the sections in | |
5917 | turn. */ | |
5918 | ||
5919 | void | |
98027b10 | 5920 | ppc_frob_section (asection *sec) |
252b5132 | 5921 | { |
931e13a6 | 5922 | static bfd_vma vma = 0; |
252b5132 | 5923 | |
85645aed TG |
5924 | /* Dwarf sections start at 0. */ |
5925 | if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) | |
5926 | return; | |
5927 | ||
931e13a6 | 5928 | vma = md_section_align (sec, vma); |
252b5132 RH |
5929 | bfd_set_section_vma (stdoutput, sec, vma); |
5930 | vma += bfd_section_size (stdoutput, sec); | |
5931 | } | |
5932 | ||
5933 | #endif /* OBJ_XCOFF */ | |
5934 | \f | |
252b5132 | 5935 | char * |
98027b10 | 5936 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 5937 | { |
499ac353 | 5938 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
5939 | } |
5940 | ||
5941 | /* Write a value out to the object file, using the appropriate | |
5942 | endianness. */ | |
5943 | ||
5944 | void | |
98027b10 | 5945 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
5946 | { |
5947 | if (target_big_endian) | |
5948 | number_to_chars_bigendian (buf, val, n); | |
5949 | else | |
5950 | number_to_chars_littleendian (buf, val, n); | |
5951 | } | |
5952 | ||
5953 | /* Align a section (I don't know why this is machine dependent). */ | |
5954 | ||
5955 | valueT | |
3aeeedbb | 5956 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 5957 | { |
3aeeedbb AM |
5958 | #ifdef OBJ_ELF |
5959 | return addr; | |
5960 | #else | |
252b5132 RH |
5961 | int align = bfd_get_section_alignment (stdoutput, seg); |
5962 | ||
5963 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 5964 | #endif |
252b5132 RH |
5965 | } |
5966 | ||
5967 | /* We don't have any form of relaxing. */ | |
5968 | ||
5969 | int | |
98027b10 AM |
5970 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
5971 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
5972 | { |
5973 | abort (); | |
5974 | return 0; | |
5975 | } | |
5976 | ||
5977 | /* Convert a machine dependent frag. We never generate these. */ | |
5978 | ||
5979 | void | |
98027b10 AM |
5980 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
5981 | asection *sec ATTRIBUTE_UNUSED, | |
5982 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
5983 | { |
5984 | abort (); | |
5985 | } | |
5986 | ||
5987 | /* We have no need to default values of symbols. */ | |
5988 | ||
252b5132 | 5989 | symbolS * |
98027b10 | 5990 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
5991 | { |
5992 | return 0; | |
5993 | } | |
5994 | \f | |
5995 | /* Functions concerning relocs. */ | |
5996 | ||
5997 | /* The location from which a PC relative jump should be calculated, | |
5998 | given a PC relative reloc. */ | |
5999 | ||
6000 | long | |
98027b10 | 6001 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
6002 | { |
6003 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
6004 | } | |
6005 | ||
6006 | #ifdef OBJ_XCOFF | |
6007 | ||
6008 | /* This is called to see whether a fixup should be adjusted to use a | |
6009 | section symbol. We take the opportunity to change a fixup against | |
6010 | a symbol in the TOC subsegment into a reloc against the | |
6011 | corresponding .tc symbol. */ | |
6012 | ||
6013 | int | |
98027b10 | 6014 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6015 | { |
b782de16 AM |
6016 | valueT val = resolve_symbol_value (fix->fx_addsy); |
6017 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
6018 | TC_SYMFIELD_TYPE *tc; | |
6019 | ||
6020 | if (symseg == absolute_section) | |
6021 | return 0; | |
252b5132 | 6022 | |
85645aed TG |
6023 | /* Always adjust symbols in debugging sections. */ |
6024 | if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) | |
6025 | return 1; | |
6026 | ||
252b5132 | 6027 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 6028 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 6029 | && symseg == data_section |
252b5132 RH |
6030 | && val >= ppc_toc_frag->fr_address |
6031 | && (ppc_after_toc_frag == (fragS *) NULL | |
6032 | || val < ppc_after_toc_frag->fr_address)) | |
6033 | { | |
6034 | symbolS *sy; | |
6035 | ||
6036 | for (sy = symbol_next (ppc_toc_csect); | |
6037 | sy != (symbolS *) NULL; | |
6038 | sy = symbol_next (sy)) | |
6039 | { | |
b782de16 AM |
6040 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
6041 | ||
96d56e9f | 6042 | if (sy_tc->symbol_class == XMC_TC0) |
252b5132 | 6043 | continue; |
96d56e9f | 6044 | if (sy_tc->symbol_class != XMC_TC) |
252b5132 | 6045 | break; |
b782de16 | 6046 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
6047 | { |
6048 | fix->fx_addsy = sy; | |
6049 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
6050 | return 0; | |
6051 | } | |
6052 | } | |
6053 | ||
6054 | as_bad_where (fix->fx_file, fix->fx_line, | |
6055 | _("symbol in .toc does not match any .tc")); | |
6056 | } | |
6057 | ||
6058 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
6059 | tc = symbol_get_tc (fix->fx_addsy); |
6060 | if (tc->subseg == 0 | |
96d56e9f NC |
6061 | && tc->symbol_class != XMC_TC0 |
6062 | && tc->symbol_class != XMC_TC | |
b782de16 | 6063 | && symseg != bss_section |
252b5132 | 6064 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 6065 | && (symseg != data_section |
252b5132 RH |
6066 | || ppc_toc_csect == NULL |
6067 | || val < ppc_toc_frag->fr_address | |
6068 | || (ppc_after_toc_frag != NULL | |
6069 | && val >= ppc_after_toc_frag->fr_address))) | |
6070 | { | |
2fb4b302 | 6071 | symbolS *csect = tc->within; |
252b5132 | 6072 | |
2fb4b302 TG |
6073 | /* If the symbol was not declared by a label (eg: a section symbol), |
6074 | use the section instead of the csect. This doesn't happen in | |
6075 | normal AIX assembly code. */ | |
6076 | if (csect == NULL) | |
6077 | csect = seg_info (symseg)->sym; | |
252b5132 | 6078 | |
2fb4b302 TG |
6079 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
6080 | fix->fx_addsy = csect; | |
252b5132 | 6081 | |
b782de16 | 6082 | return 0; |
252b5132 RH |
6083 | } |
6084 | ||
6085 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
6086 | .lcomm. */ | |
b782de16 | 6087 | if (symseg == bss_section |
252b5132 RH |
6088 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
6089 | { | |
b782de16 AM |
6090 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
6091 | ||
6092 | fix->fx_offset += val - resolve_symbol_value (sy); | |
6093 | fix->fx_addsy = sy; | |
252b5132 RH |
6094 | } |
6095 | ||
6096 | return 0; | |
6097 | } | |
6098 | ||
6099 | /* A reloc from one csect to another must be kept. The assembler | |
6100 | will, of course, keep relocs between sections, and it will keep | |
6101 | absolute relocs, but we need to force it to keep PC relative relocs | |
6102 | between two csects in the same section. */ | |
6103 | ||
6104 | int | |
98027b10 | 6105 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
6106 | { |
6107 | /* At this point fix->fx_addsy should already have been converted to | |
6108 | a csect symbol. If the csect does not include the fragment, then | |
6109 | we need to force the relocation. */ | |
6110 | if (fix->fx_pcrel | |
6111 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
6112 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
6113 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
6114 | > fix->fx_frag->fr_address) | |
6115 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
6116 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
6117 | <= fix->fx_frag->fr_address)))) |
6118 | return 1; | |
6119 | ||
ae6063d4 | 6120 | return generic_force_reloc (fix); |
252b5132 RH |
6121 | } |
6122 | ||
2fb4b302 TG |
6123 | void |
6124 | ppc_new_dot_label (symbolS *sym) | |
6125 | { | |
6126 | /* Anchor this label to the current csect for relocations. */ | |
6127 | symbol_get_tc (sym)->within = ppc_current_csect; | |
6128 | } | |
6129 | ||
252b5132 RH |
6130 | #endif /* OBJ_XCOFF */ |
6131 | ||
0baf16f2 | 6132 | #ifdef OBJ_ELF |
a161fe53 AM |
6133 | /* If this function returns non-zero, it guarantees that a relocation |
6134 | will be emitted for a fixup. */ | |
6135 | ||
6136 | int | |
98027b10 | 6137 | ppc_force_relocation (fixS *fix) |
a161fe53 AM |
6138 | { |
6139 | /* Branch prediction relocations must force a relocation, as must | |
6140 | the vtable description relocs. */ | |
6141 | switch (fix->fx_r_type) | |
6142 | { | |
6143 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6144 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6145 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6146 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 6147 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 6148 | case BFD_RELOC_PPC64_TOC: |
a161fe53 AM |
6149 | return 1; |
6150 | default: | |
6151 | break; | |
6152 | } | |
6153 | ||
cdba85ec AM |
6154 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
6155 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
6156 | return 1; | |
6157 | ||
ae6063d4 | 6158 | return generic_force_reloc (fix); |
a161fe53 AM |
6159 | } |
6160 | ||
0baf16f2 | 6161 | int |
98027b10 | 6162 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6163 | { |
0baf16f2 AM |
6164 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
6165 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
6166 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
6167 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
cc9edbf3 AM |
6168 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS |
6169 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS | |
0baf16f2 AM |
6170 | && fix->fx_r_type != BFD_RELOC_GPREL16 |
6171 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
6172 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 6173 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 6174 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 6175 | } |
0baf16f2 | 6176 | #endif |
252b5132 | 6177 | |
b9c361e0 JL |
6178 | void |
6179 | ppc_frag_check (struct frag *fragP) | |
6180 | { | |
6181 | if (!fragP->has_code) | |
6182 | return; | |
6183 | ||
6184 | if (ppc_mach() == bfd_mach_ppc_vle) | |
6185 | { | |
6186 | if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) | |
6187 | as_bad (_("instruction address is not a multiple of 2")); | |
6188 | } | |
6189 | else | |
6190 | { | |
6191 | if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) | |
6192 | as_bad (_("instruction address is not a multiple of 4")); | |
6193 | } | |
6194 | } | |
6195 | ||
3aeeedbb AM |
6196 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
6197 | rs_align_code frag. */ | |
6198 | ||
6199 | void | |
6200 | ppc_handle_align (struct frag *fragP) | |
6201 | { | |
6202 | valueT count = (fragP->fr_next->fr_address | |
6203 | - (fragP->fr_address + fragP->fr_fix)); | |
6204 | ||
b9c361e0 JL |
6205 | if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) |
6206 | { | |
6207 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6208 | ||
6209 | fragP->fr_var = 2; | |
6210 | md_number_to_chars (dest, 0x4400, 2); | |
6211 | } | |
6212 | else if (count != 0 && (count & 3) == 0) | |
3aeeedbb AM |
6213 | { |
6214 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6215 | ||
6216 | fragP->fr_var = 4; | |
cef4f754 AM |
6217 | |
6218 | if (count > 4 * nop_limit && count < 0x2000000) | |
6219 | { | |
6220 | struct frag *rest; | |
6221 | ||
6222 | /* Make a branch, then follow with nops. Insert another | |
6223 | frag to handle the nops. */ | |
6224 | md_number_to_chars (dest, 0x48000000 + count, 4); | |
6225 | count -= 4; | |
6226 | if (count == 0) | |
6227 | return; | |
6228 | ||
6229 | rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6230 | memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); | |
6231 | fragP->fr_next = rest; | |
6232 | fragP = rest; | |
6233 | rest->fr_address += rest->fr_fix + 4; | |
6234 | rest->fr_fix = 0; | |
6235 | /* If we leave the next frag as rs_align_code we'll come here | |
6236 | again, resulting in a bunch of branches rather than a | |
6237 | branch followed by nops. */ | |
6238 | rest->fr_type = rs_align; | |
6239 | dest = rest->fr_literal; | |
6240 | } | |
6241 | ||
3aeeedbb AM |
6242 | md_number_to_chars (dest, 0x60000000, 4); |
6243 | ||
42240548 | 6244 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 |
5817ffd1 PB |
6245 | || (ppc_cpu & PPC_OPCODE_POWER7) != 0 |
6246 | || (ppc_cpu & PPC_OPCODE_POWER8) != 0) | |
3aeeedbb | 6247 | { |
5817ffd1 | 6248 | /* For power6, power7 and power8, we want the last nop to be a group |
42240548 PB |
6249 | terminating one. Do this by inserting an rs_fill frag immediately |
6250 | after this one, with its address set to the last nop location. | |
6251 | This will automatically reduce the number of nops in the current | |
6252 | frag by one. */ | |
3aeeedbb AM |
6253 | if (count > 4) |
6254 | { | |
6255 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6256 | ||
6257 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
6258 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
6259 | group_nop->fr_fix = 0; | |
6260 | group_nop->fr_offset = 1; | |
6261 | group_nop->fr_type = rs_fill; | |
6262 | fragP->fr_next = group_nop; | |
6263 | dest = group_nop->fr_literal; | |
6264 | } | |
6265 | ||
5817ffd1 PB |
6266 | if ((ppc_cpu & PPC_OPCODE_POWER7) != 0 |
6267 | || (ppc_cpu & PPC_OPCODE_POWER8) != 0) | |
aea77599 AM |
6268 | { |
6269 | if (ppc_cpu & PPC_OPCODE_E500MC) | |
6270 | /* e500mc group terminating nop: "ori 0,0,0". */ | |
6271 | md_number_to_chars (dest, 0x60000000, 4); | |
6272 | else | |
5817ffd1 | 6273 | /* power7/power8 group terminating nop: "ori 2,2,0". */ |
aea77599 AM |
6274 | md_number_to_chars (dest, 0x60420000, 4); |
6275 | } | |
42240548 PB |
6276 | else |
6277 | /* power6 group terminating nop: "ori 1,1,0". */ | |
6278 | md_number_to_chars (dest, 0x60210000, 4); | |
3aeeedbb AM |
6279 | } |
6280 | } | |
6281 | } | |
6282 | ||
252b5132 | 6283 | /* Apply a fixup to the object code. This is called for all the |
3b8b57a9 | 6284 | fixups we generated by the calls to fix_new_exp, above. */ |
252b5132 | 6285 | |
94f592af | 6286 | void |
98027b10 | 6287 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 6288 | { |
94f592af | 6289 | valueT value = * valP; |
5656a981 AM |
6290 | offsetT fieldval; |
6291 | const struct powerpc_operand *operand; | |
252b5132 RH |
6292 | |
6293 | #ifdef OBJ_ELF | |
94f592af | 6294 | if (fixP->fx_addsy != NULL) |
252b5132 | 6295 | { |
a161fe53 | 6296 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
6297 | if (fixP->fx_pcrel) |
6298 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
6299 | } |
6300 | else | |
94f592af | 6301 | fixP->fx_done = 1; |
252b5132 | 6302 | #else |
a161fe53 | 6303 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
6304 | the symbol values. If we are doing this relocation the code in |
6305 | write.c is going to call bfd_install_relocation, which is also | |
6306 | going to use the symbol value. That means that if the reloc is | |
6307 | fully resolved we want to use *valP since bfd_install_relocation is | |
6308 | not being used. | |
9f0eb232 RS |
6309 | However, if the reloc is not fully resolved we do not want to |
6310 | use *valP, and must use fx_offset instead. If the relocation | |
6311 | is PC-relative, we then need to re-apply md_pcrel_from_section | |
6312 | to this new relocation value. */ | |
94f592af NC |
6313 | if (fixP->fx_addsy == (symbolS *) NULL) |
6314 | fixP->fx_done = 1; | |
6315 | ||
252b5132 | 6316 | else |
9f0eb232 RS |
6317 | { |
6318 | value = fixP->fx_offset; | |
6319 | if (fixP->fx_pcrel) | |
6320 | value -= md_pcrel_from_section (fixP, seg); | |
6321 | } | |
a161fe53 AM |
6322 | #endif |
6323 | ||
6324 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 6325 | { |
a161fe53 AM |
6326 | /* We can't actually support subtracting a symbol. */ |
6327 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 6328 | } |
252b5132 | 6329 | |
5656a981 | 6330 | operand = NULL; |
3b8b57a9 | 6331 | if (fixP->fx_pcrel_adjust != 0) |
252b5132 | 6332 | { |
5656a981 | 6333 | /* This is a fixup on an instruction. */ |
3b8b57a9 | 6334 | int opindex = fixP->fx_pcrel_adjust & 0xff; |
252b5132 | 6335 | |
5656a981 | 6336 | operand = &powerpc_operands[opindex]; |
252b5132 | 6337 | #ifdef OBJ_XCOFF |
0baf16f2 AM |
6338 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
6339 | does not generate a reloc. It uses the offset of `sym' within its | |
6340 | csect. Other usages, such as `.long sym', generate relocs. This | |
6341 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 6342 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6343 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 6344 | && operand->shift == 0 |
2b3c4602 | 6345 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
6346 | && fixP->fx_addsy != NULL |
6347 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
96d56e9f NC |
6348 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC |
6349 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 | |
94f592af | 6350 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) |
252b5132 | 6351 | { |
94f592af NC |
6352 | value = fixP->fx_offset; |
6353 | fixP->fx_done = 1; | |
252b5132 RH |
6354 | } |
6355 | #endif | |
5656a981 AM |
6356 | } |
6357 | ||
6358 | /* Calculate value to be stored in field. */ | |
6359 | fieldval = value; | |
6360 | switch (fixP->fx_r_type) | |
6361 | { | |
1ec2d25e | 6362 | #ifdef OBJ_ELF |
5656a981 AM |
6363 | case BFD_RELOC_PPC64_ADDR16_LO_DS: |
6364 | case BFD_RELOC_PPC_VLE_LO16A: | |
6365 | case BFD_RELOC_PPC_VLE_LO16D: | |
1ec2d25e | 6366 | #endif |
5656a981 AM |
6367 | case BFD_RELOC_LO16: |
6368 | case BFD_RELOC_LO16_PCREL: | |
6369 | fieldval = value & 0xffff; | |
6370 | sign_extend_16: | |
6371 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
6372 | fieldval = (fieldval ^ 0x8000) - 0x8000; | |
6373 | fixP->fx_no_overflow = 1; | |
6374 | break; | |
3c9d25f4 | 6375 | |
5656a981 AM |
6376 | #ifdef OBJ_ELF |
6377 | case BFD_RELOC_PPC_VLE_HI16A: | |
6378 | case BFD_RELOC_PPC_VLE_HI16D: | |
6379 | #endif | |
6380 | case BFD_RELOC_HI16: | |
6381 | case BFD_RELOC_HI16_PCREL: | |
6382 | fieldval = PPC_HI (value); | |
6383 | goto sign_extend_16; | |
0baf16f2 | 6384 | |
5656a981 AM |
6385 | #ifdef OBJ_ELF |
6386 | case BFD_RELOC_PPC_VLE_HA16A: | |
6387 | case BFD_RELOC_PPC_VLE_HA16D: | |
6388 | #endif | |
6389 | case BFD_RELOC_HI16_S: | |
6390 | case BFD_RELOC_HI16_S_PCREL: | |
6391 | fieldval = PPC_HA (value); | |
6392 | goto sign_extend_16; | |
0baf16f2 | 6393 | |
3b8b57a9 | 6394 | #ifdef OBJ_ELF |
5656a981 AM |
6395 | case BFD_RELOC_PPC64_HIGHER: |
6396 | fieldval = PPC_HIGHER (value); | |
6397 | goto sign_extend_16; | |
252b5132 | 6398 | |
5656a981 AM |
6399 | case BFD_RELOC_PPC64_HIGHER_S: |
6400 | fieldval = PPC_HIGHERA (value); | |
6401 | goto sign_extend_16; | |
0baf16f2 | 6402 | |
5656a981 AM |
6403 | case BFD_RELOC_PPC64_HIGHEST: |
6404 | fieldval = PPC_HIGHEST (value); | |
6405 | goto sign_extend_16; | |
0baf16f2 | 6406 | |
5656a981 AM |
6407 | case BFD_RELOC_PPC64_HIGHEST_S: |
6408 | fieldval = PPC_HIGHESTA (value); | |
6409 | goto sign_extend_16; | |
6410 | #endif | |
6411 | ||
6412 | default: | |
6413 | break; | |
6414 | } | |
6415 | ||
6416 | if (operand != NULL) | |
6417 | { | |
6418 | /* Handle relocs in an insn. */ | |
6419 | char *where; | |
6420 | unsigned long insn; | |
0baf16f2 | 6421 | |
5656a981 AM |
6422 | #ifdef OBJ_ELF |
6423 | switch (fixP->fx_r_type) | |
6424 | { | |
3b8b57a9 AM |
6425 | /* The following relocs can't be calculated by the assembler. |
6426 | Leave the field zero. */ | |
cdba85ec AM |
6427 | case BFD_RELOC_PPC_TPREL16: |
6428 | case BFD_RELOC_PPC_TPREL16_LO: | |
6429 | case BFD_RELOC_PPC_TPREL16_HI: | |
6430 | case BFD_RELOC_PPC_TPREL16_HA: | |
cdba85ec AM |
6431 | case BFD_RELOC_PPC_DTPREL16: |
6432 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6433 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6434 | case BFD_RELOC_PPC_DTPREL16_HA: | |
cdba85ec AM |
6435 | case BFD_RELOC_PPC_GOT_TLSGD16: |
6436 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6437 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6438 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6439 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6440 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6441 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6442 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6443 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6444 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6445 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6446 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6447 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6448 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6449 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6450 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6451 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6452 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
6453 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6454 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6455 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6456 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
6457 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
6458 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6459 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6460 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6461 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6462 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
3b8b57a9 | 6463 | gas_assert (fixP->fx_addsy != NULL); |
7c1d0959 | 6464 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3b8b57a9 | 6465 | fieldval = 0; |
cdba85ec | 6466 | break; |
3b8b57a9 AM |
6467 | |
6468 | /* These also should leave the field zero for the same | |
6469 | reason. Note that older versions of gas wrote values | |
6470 | here. If we want to go back to the old behaviour, then | |
6471 | all _LO and _LO_DS cases will need to be treated like | |
6472 | BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ | |
6473 | case BFD_RELOC_16_GOTOFF: | |
6474 | case BFD_RELOC_LO16_GOTOFF: | |
6475 | case BFD_RELOC_HI16_GOTOFF: | |
6476 | case BFD_RELOC_HI16_S_GOTOFF: | |
6477 | case BFD_RELOC_LO16_PLTOFF: | |
6478 | case BFD_RELOC_HI16_PLTOFF: | |
6479 | case BFD_RELOC_HI16_S_PLTOFF: | |
6480 | case BFD_RELOC_GPREL16: | |
6481 | case BFD_RELOC_16_BASEREL: | |
6482 | case BFD_RELOC_LO16_BASEREL: | |
6483 | case BFD_RELOC_HI16_BASEREL: | |
6484 | case BFD_RELOC_HI16_S_BASEREL: | |
6485 | case BFD_RELOC_PPC_TOC16: | |
6486 | case BFD_RELOC_PPC64_TOC16_LO: | |
6487 | case BFD_RELOC_PPC64_TOC16_HI: | |
6488 | case BFD_RELOC_PPC64_TOC16_HA: | |
6489 | case BFD_RELOC_PPC64_PLTGOT16: | |
6490 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
6491 | case BFD_RELOC_PPC64_PLTGOT16_HI: | |
6492 | case BFD_RELOC_PPC64_PLTGOT16_HA: | |
6493 | case BFD_RELOC_PPC64_GOT16_DS: | |
6494 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6495 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6496 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6497 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6498 | case BFD_RELOC_PPC64_TOC16_DS: | |
6499 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6500 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6501 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
6502 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6503 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6504 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6505 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6506 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6507 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6508 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
252b5132 | 6509 | case BFD_RELOC_PPC_EMB_SDA21: |
3b8b57a9 AM |
6510 | case BFD_RELOC_PPC_EMB_MRKREF: |
6511 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6512 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6513 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6514 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6515 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6516 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6517 | case BFD_RELOC_PPC_VLE_SDA21: | |
6518 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6519 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6520 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
6521 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6522 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
6523 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6524 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
6525 | gas_assert (fixP->fx_addsy != NULL); | |
6526 | /* Fall thru */ | |
6527 | ||
6528 | case BFD_RELOC_PPC_TLS: | |
6529 | case BFD_RELOC_PPC_TLSGD: | |
6530 | case BFD_RELOC_PPC_TLSLD: | |
6531 | fieldval = 0; | |
3b8b57a9 | 6532 | break; |
252b5132 | 6533 | |
3b8b57a9 | 6534 | default: |
252b5132 | 6535 | break; |
3b8b57a9 | 6536 | } |
5656a981 | 6537 | #endif |
252b5132 | 6538 | |
3b8b57a9 AM |
6539 | #ifdef OBJ_ELF |
6540 | /* powerpc uses RELA style relocs, so if emitting a reloc the field | |
6541 | contents can stay at zero. */ | |
6542 | #define APPLY_RELOC fixP->fx_done | |
6543 | #else | |
6544 | #define APPLY_RELOC 1 | |
6545 | #endif | |
6546 | if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) | |
6547 | { | |
6548 | /* Fetch the instruction, insert the fully resolved operand | |
6549 | value, and stuff the instruction back again. */ | |
6550 | where = fixP->fx_frag->fr_literal + fixP->fx_where; | |
6551 | if (target_big_endian) | |
31a91399 | 6552 | { |
3b8b57a9 AM |
6553 | if (fixP->fx_size == 4) |
6554 | insn = bfd_getb32 ((unsigned char *) where); | |
31a91399 | 6555 | else |
3b8b57a9 | 6556 | insn = bfd_getb16 ((unsigned char *) where); |
31a91399 NC |
6557 | } |
6558 | else | |
3b8b57a9 AM |
6559 | { |
6560 | if (fixP->fx_size == 4) | |
6561 | insn = bfd_getl32 ((unsigned char *) where); | |
6562 | else | |
6563 | insn = bfd_getl16 ((unsigned char *) where); | |
6564 | } | |
6565 | insn = ppc_insert_operand (insn, operand, fieldval, | |
6566 | fixP->tc_fix_data.ppc_cpu, | |
6567 | fixP->fx_file, fixP->fx_line); | |
6568 | if (target_big_endian) | |
6569 | { | |
6570 | if (fixP->fx_size == 4) | |
6571 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6572 | else | |
6573 | bfd_putb16 ((bfd_vma) insn, (unsigned char *) where); | |
6574 | } | |
6575 | else | |
6576 | { | |
6577 | if (fixP->fx_size == 4) | |
6578 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6579 | else | |
6580 | bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); | |
6581 | } | |
6582 | } | |
6583 | ||
6584 | if (fixP->fx_done) | |
6585 | /* Nothing else to do here. */ | |
6586 | return; | |
6587 | ||
6588 | gas_assert (fixP->fx_addsy != NULL); | |
6589 | if (fixP->fx_r_type == BFD_RELOC_UNUSED) | |
6590 | { | |
6591 | char *sfile; | |
6592 | unsigned int sline; | |
6593 | ||
6594 | /* Use expr_symbol_where to see if this is an expression | |
6595 | symbol. */ | |
6596 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
6597 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6598 | _("unresolved expression that must be resolved")); | |
6599 | else | |
6600 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6601 | _("unsupported relocation against %s"), | |
6602 | S_GET_NAME (fixP->fx_addsy)); | |
6603 | fixP->fx_done = 1; | |
6604 | return; | |
6605 | } | |
6606 | } | |
6607 | else | |
6608 | { | |
6609 | /* Handle relocs in data. */ | |
6610 | switch (fixP->fx_r_type) | |
6611 | { | |
252b5132 | 6612 | case BFD_RELOC_VTABLE_INHERIT: |
94f592af NC |
6613 | if (fixP->fx_addsy |
6614 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6615 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6616 | S_SET_WEAK (fixP->fx_addsy); | |
3b8b57a9 | 6617 | /* Fall thru */ |
252b5132 RH |
6618 | |
6619 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6620 | fixP->fx_done = 0; |
252b5132 RH |
6621 | break; |
6622 | ||
0baf16f2 | 6623 | #ifdef OBJ_ELF |
3b8b57a9 AM |
6624 | /* These can appear with @l etc. in data. */ |
6625 | case BFD_RELOC_LO16: | |
3b8b57a9 | 6626 | case BFD_RELOC_LO16_PCREL: |
3b8b57a9 | 6627 | case BFD_RELOC_HI16: |
3b8b57a9 | 6628 | case BFD_RELOC_HI16_PCREL: |
3b8b57a9 | 6629 | case BFD_RELOC_HI16_S: |
3b8b57a9 | 6630 | case BFD_RELOC_HI16_S_PCREL: |
3b8b57a9 | 6631 | case BFD_RELOC_PPC64_HIGHER: |
3b8b57a9 | 6632 | case BFD_RELOC_PPC64_HIGHER_S: |
3b8b57a9 | 6633 | case BFD_RELOC_PPC64_HIGHEST: |
3b8b57a9 | 6634 | case BFD_RELOC_PPC64_HIGHEST_S: |
3b8b57a9 AM |
6635 | break; |
6636 | ||
6637 | case BFD_RELOC_PPC_DTPMOD: | |
6638 | case BFD_RELOC_PPC_TPREL: | |
6639 | case BFD_RELOC_PPC_DTPREL: | |
6640 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
6641 | break; | |
6642 | ||
6643 | /* Just punt all of these to the linker. */ | |
6644 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6645 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6646 | case BFD_RELOC_16_GOTOFF: | |
6647 | case BFD_RELOC_LO16_GOTOFF: | |
6648 | case BFD_RELOC_HI16_GOTOFF: | |
6649 | case BFD_RELOC_HI16_S_GOTOFF: | |
6650 | case BFD_RELOC_LO16_PLTOFF: | |
6651 | case BFD_RELOC_HI16_PLTOFF: | |
6652 | case BFD_RELOC_HI16_S_PLTOFF: | |
6653 | case BFD_RELOC_PPC_COPY: | |
6654 | case BFD_RELOC_PPC_GLOB_DAT: | |
6655 | case BFD_RELOC_16_BASEREL: | |
6656 | case BFD_RELOC_LO16_BASEREL: | |
6657 | case BFD_RELOC_HI16_BASEREL: | |
6658 | case BFD_RELOC_HI16_S_BASEREL: | |
6659 | case BFD_RELOC_PPC_TLS: | |
6660 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6661 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6662 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6663 | case BFD_RELOC_PPC_TPREL16_LO: | |
6664 | case BFD_RELOC_PPC_TPREL16_HI: | |
6665 | case BFD_RELOC_PPC_TPREL16_HA: | |
6666 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6667 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6668 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6669 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6670 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6671 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6672 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6673 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6674 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6675 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6676 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6677 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6678 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6679 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6680 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6681 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6682 | case BFD_RELOC_24_PLT_PCREL: | |
6683 | case BFD_RELOC_PPC_LOCAL24PC: | |
6684 | case BFD_RELOC_32_PLT_PCREL: | |
6685 | case BFD_RELOC_GPREL16: | |
6686 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6687 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6688 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6689 | case BFD_RELOC_PPC_EMB_NADDR32: | |
6690 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6691 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6692 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6693 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6694 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6695 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6696 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6697 | case BFD_RELOC_PPC_EMB_SDA21: | |
6698 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6699 | case BFD_RELOC_PPC_EMB_MRKREF: | |
6700 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6701 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6702 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6703 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6704 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6705 | case BFD_RELOC_PPC_EMB_RELSDA: | |
0baf16f2 | 6706 | case BFD_RELOC_PPC64_TOC: |
3b8b57a9 AM |
6707 | case BFD_RELOC_PPC_TOC16: |
6708 | case BFD_RELOC_PPC64_TOC16_LO: | |
6709 | case BFD_RELOC_PPC64_TOC16_HI: | |
6710 | case BFD_RELOC_PPC64_TOC16_HA: | |
6711 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6712 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6713 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6714 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
6715 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6716 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6717 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6718 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
94f592af | 6719 | fixP->fx_done = 0; |
0baf16f2 | 6720 | break; |
0baf16f2 | 6721 | #endif |
3b8b57a9 AM |
6722 | |
6723 | #ifdef OBJ_XCOFF | |
6724 | case BFD_RELOC_NONE: | |
3b8b57a9 | 6725 | #endif |
5656a981 AM |
6726 | case BFD_RELOC_CTOR: |
6727 | case BFD_RELOC_32: | |
6728 | case BFD_RELOC_32_PCREL: | |
6729 | case BFD_RELOC_RVA: | |
6730 | case BFD_RELOC_64: | |
6731 | case BFD_RELOC_64_PCREL: | |
6732 | case BFD_RELOC_16: | |
6733 | case BFD_RELOC_16_PCREL: | |
6734 | case BFD_RELOC_8: | |
6735 | break; | |
3b8b57a9 | 6736 | |
252b5132 | 6737 | default: |
bc805888 | 6738 | fprintf (stderr, |
94f592af | 6739 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6740 | fflush (stderr); |
252b5132 RH |
6741 | abort (); |
6742 | } | |
46b596ff | 6743 | |
5656a981 | 6744 | if (fixP->fx_size && APPLY_RELOC) |
46b596ff | 6745 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
5656a981 AM |
6746 | fieldval, fixP->fx_size); |
6747 | } | |
6748 | ||
6749 | /* We are only able to convert some relocs to pc-relative. */ | |
6750 | if (!fixP->fx_done && fixP->fx_pcrel) | |
6751 | { | |
6752 | switch (fixP->fx_r_type) | |
6753 | { | |
6754 | case BFD_RELOC_LO16: | |
6755 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
6756 | break; | |
6757 | ||
6758 | case BFD_RELOC_HI16: | |
6759 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; | |
6760 | break; | |
6761 | ||
6762 | case BFD_RELOC_HI16_S: | |
6763 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; | |
6764 | break; | |
6765 | ||
6766 | case BFD_RELOC_64: | |
6767 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
6768 | break; | |
6769 | ||
6770 | case BFD_RELOC_32: | |
6771 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
6772 | break; | |
6773 | ||
6774 | case BFD_RELOC_16: | |
6775 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
6776 | break; | |
6777 | ||
6778 | /* Some of course are already pc-relative. */ | |
6779 | case BFD_RELOC_LO16_PCREL: | |
6780 | case BFD_RELOC_HI16_PCREL: | |
6781 | case BFD_RELOC_HI16_S_PCREL: | |
6782 | case BFD_RELOC_64_PCREL: | |
6783 | case BFD_RELOC_32_PCREL: | |
6784 | case BFD_RELOC_16_PCREL: | |
6785 | case BFD_RELOC_PPC_B16: | |
6786 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6787 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6788 | case BFD_RELOC_PPC_B26: | |
6789 | case BFD_RELOC_PPC_LOCAL24PC: | |
6790 | case BFD_RELOC_24_PLT_PCREL: | |
6791 | case BFD_RELOC_32_PLT_PCREL: | |
6792 | case BFD_RELOC_64_PLT_PCREL: | |
6793 | case BFD_RELOC_PPC_VLE_REL8: | |
6794 | case BFD_RELOC_PPC_VLE_REL15: | |
6795 | case BFD_RELOC_PPC_VLE_REL24: | |
6796 | break; | |
6797 | ||
6798 | default: | |
6799 | if (fixP->fx_addsy) | |
6800 | { | |
6801 | char *sfile; | |
6802 | unsigned int sline; | |
6803 | ||
6804 | /* Use expr_symbol_where to see if this is an | |
6805 | expression symbol. */ | |
6806 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
6807 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6808 | _("unresolved expression that must" | |
6809 | " be resolved")); | |
6810 | else | |
6811 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6812 | _("cannot emit PC relative %s relocation" | |
6813 | " against %s"), | |
6814 | bfd_get_reloc_code_name (fixP->fx_r_type), | |
6815 | S_GET_NAME (fixP->fx_addsy)); | |
6816 | } | |
6817 | else | |
6818 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6819 | _("unable to resolve expression")); | |
6820 | fixP->fx_done = 1; | |
6821 | break; | |
6822 | } | |
252b5132 RH |
6823 | } |
6824 | ||
6825 | #ifdef OBJ_ELF | |
3b8b57a9 | 6826 | ppc_elf_validate_fix (fixP, seg); |
94f592af | 6827 | fixP->fx_addnumber = value; |
4e6935a6 AM |
6828 | |
6829 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
6830 | from the section contents. If we are going to be emitting a reloc | |
6831 | then the section contents are immaterial, so don't warn if they | |
6832 | happen to overflow. Leave such warnings to ld. */ | |
6833 | if (!fixP->fx_done) | |
a38a07e0 AM |
6834 | { |
6835 | fixP->fx_no_overflow = 1; | |
6836 | ||
6837 | /* Arrange to emit .TOC. as a normal symbol if used in anything | |
6838 | but .TOC.@tocbase. */ | |
6839 | if (ppc_obj64 | |
6840 | && fixP->fx_r_type != BFD_RELOC_PPC64_TOC | |
6841 | && fixP->fx_addsy != NULL | |
6842 | && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) | |
6843 | symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; | |
6844 | } | |
252b5132 | 6845 | #else |
94f592af NC |
6846 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
6847 | fixP->fx_addnumber = 0; | |
252b5132 RH |
6848 | else |
6849 | { | |
6850 | #ifdef TE_PE | |
94f592af | 6851 | fixP->fx_addnumber = 0; |
252b5132 | 6852 | #else |
8edcbfcd TG |
6853 | /* We want to use the offset within the toc, not the actual VMA |
6854 | of the symbol. */ | |
94f592af | 6855 | fixP->fx_addnumber = |
8edcbfcd TG |
6856 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) |
6857 | - S_GET_VALUE (ppc_toc_csect); | |
252b5132 RH |
6858 | #endif |
6859 | } | |
6860 | #endif | |
252b5132 RH |
6861 | } |
6862 | ||
6863 | /* Generate a reloc for a fixup. */ | |
6864 | ||
6865 | arelent * | |
98027b10 | 6866 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
6867 | { |
6868 | arelent *reloc; | |
6869 | ||
6870 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
6871 | ||
49309057 ILT |
6872 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
6873 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
6874 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
6875 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
6876 | if (reloc->howto == (reloc_howto_type *) NULL) | |
6877 | { | |
6878 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
6879 | _("reloc %d not supported by object file format"), |
6880 | (int) fixp->fx_r_type); | |
252b5132 RH |
6881 | return NULL; |
6882 | } | |
6883 | reloc->addend = fixp->fx_addnumber; | |
6884 | ||
6885 | return reloc; | |
6886 | } | |
75e21f08 JJ |
6887 | |
6888 | void | |
98027b10 | 6889 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
6890 | { |
6891 | cfi_add_CFA_def_cfa (1, 0); | |
6892 | } | |
6893 | ||
6894 | int | |
1df69f4f | 6895 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
6896 | { |
6897 | unsigned int regnum = -1; | |
6898 | unsigned int i; | |
6899 | const char *p; | |
6900 | char *q; | |
6901 | static struct { char *name; int dw2regnum; } regnames[] = | |
6902 | { | |
6903 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
6904 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 6905 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
6906 | { "spe_acc", 111 }, { "spefscr", 112 } |
6907 | }; | |
6908 | ||
6909 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
6910 | if (strcmp (regnames[i].name, regname) == 0) | |
6911 | return regnames[i].dw2regnum; | |
6912 | ||
6913 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
6914 | { | |
6915 | p = regname + 1 + (regname[1] == '.'); | |
6916 | regnum = strtoul (p, &q, 10); | |
6917 | if (p == q || *q || regnum >= 32) | |
6918 | return -1; | |
6919 | if (regname[0] == 'f') | |
b7d7dc63 | 6920 | regnum += 32; |
75e21f08 | 6921 | else if (regname[0] == 'v') |
b7d7dc63 | 6922 | regnum += 77; |
75e21f08 JJ |
6923 | } |
6924 | else if (regname[0] == 'c' && regname[1] == 'r') | |
6925 | { | |
6926 | p = regname + 2 + (regname[2] == '.'); | |
6927 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 6928 | return -1; |
75e21f08 JJ |
6929 | regnum = p[0] - '0' + 68; |
6930 | } | |
6931 | return regnum; | |
6932 | } |