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ppc e500mc support
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
783de163 3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
184unsigned long ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
81d4177b
KH		 361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
252b5132
RH		 392 { "f30", 30 },
393 { "f31", 31 },
81d4177b
KH		 394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
252b5132
RH		 400
401 { "fpscr", 0 },
402
c3d65c1c
BE		 403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
252b5132
RH		 421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 503
7a899fff 504 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
7a899fff
C		 528 { "v.30", 30 },
529 { "v.31", 31 },
81d4177b
KH		 530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
7a899fff
C		 536
537 { "v0", 0 },
81d4177b
KH		 538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
7a899fff
C		 561 { "v30", 30 },
562 { "v31", 31 },
81d4177b
KH		 563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
7a899fff 568 { "v9", 9 },
252b5132
RH		 569
570 { "xer", 1 },
571
572};
573
bc805888 574#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 575
576/* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
252b5132 579static int
98027b10 580reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 581{
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602}
603
604/*
99a814a1 605 * Summary of register_name.
252b5132
RH		 606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
b34976b6 616static bfd_boolean
98027b10 617register_name (expressionS *expressionP)
252b5132
RH		 618{
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
99a814a1 624 /* Find the spelling of the operand. */
252b5132 625 start = name = input_line_pointer;
3882b010 626 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 627 name = ++input_line_pointer;
628
3882b010 629 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 630 return FALSE;
252b5132
RH		 631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
468cced8
AM		 635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
99a814a1 638 /* Look to see if it's in the register table. */
81d4177b 639 if (reg_number >= 0)
252b5132
RH		 640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
81d4177b 643
99a814a1 644 /* Make the rest nice. */
252b5132
RH		 645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
b34976b6 647 return TRUE;
252b5132 648 }
468cced8
AM		 649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
b34976b6 652 return FALSE;
252b5132
RH		 653}
654\f
655/* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659/* Whether to do the special parsing. */
b34976b6 660static bfd_boolean cr_operand;
252b5132
RH		 661
662/* Names to recognize in a condition code. This table is sorted. */
663static const struct pd_reg cr_names[] =
664{
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678};
679
680/* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683int
98027b10 684ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
13abbae3
AM		 691 if (*name == '%')
692 ++name;
252b5132
RH		 693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702}
703\f
704/* Local variables. */
705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
b0e34bfe
NC		 828 unsigned long altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
829
69c040df
AM		 830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 849 /* Do all PPC750s have paired single ops? */
850 else if (strcmp (arg, "750cl") == 0)
851 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM		 852 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
853 else if (strcmp (arg, "403") == 0
854 || strcmp (arg, "405") == 0)
855 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
856 | PPC_OPCODE_403 | PPC_OPCODE_32);
857 else if (strcmp (arg, "440") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
859 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
860 else if (strcmp (arg, "7400") == 0
861 || strcmp (arg, "7410") == 0
862 || strcmp (arg, "7450") == 0
863 || strcmp (arg, "7455") == 0)
864 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
865 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 866 else if (strcmp (arg, "e300") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
868 | PPC_OPCODE_E300);
69c040df
AM		 869 else if (strcmp (arg, "altivec") == 0)
870 {
871 if (ppc_cpu == 0)
b0e34bfe
NC		 872 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
873
874 altivec_or_spe |= PPC_OPCODE_ALTIVEC;
69c040df
AM		 875 }
876 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
877 {
878 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
879 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
880 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
19a6653c
AM		 881 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
882 }
883 else if (strcmp (arg, "e500mc") == 0)
884 {
885 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
886 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
887 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
69c040df
AM		 888 }
889 else if (strcmp (arg, "spe") == 0)
890 {
891 if (ppc_cpu == 0)
b0e34bfe
NC		 892 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
893
894 altivec_or_spe |= PPC_OPCODE_SPE;
69c040df
AM		 895 }
896 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
897 620. */
898 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
899 {
900 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
901 }
902 else if (strcmp (arg, "ppc64bridge") == 0)
903 {
904 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
905 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
906 }
907 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
908 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
909 {
910 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
911 }
912 /* -mbooke64 means enable 64-bit BookE support. */
913 else if (strcmp (arg, "booke64") == 0)
914 {
915 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
916 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
917 }
918 else if (strcmp (arg, "power4") == 0)
919 {
920 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
921 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
922 }
b0648eec
AM		 923 else if (strcmp (arg, "power5") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
926 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
927 | PPC_OPCODE_POWER5);
928 }
9622b051
AM		 929 else if (strcmp (arg, "power6") == 0)
930 {
931 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
932 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
933 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
934 }
ede602d7
AM		 935 else if (strcmp (arg, "cell") == 0)
936 {
937 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
938 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
939 | PPC_OPCODE_CELL);
940 }
69c040df
AM		 941 /* -mcom means assemble for the common intersection between Power
942 and PowerPC. At present, we just allow the union, rather
943 than the intersection. */
944 else if (strcmp (arg, "com") == 0)
945 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
946 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
947 else if (strcmp (arg, "any") == 0)
948 ppc_cpu |= PPC_OPCODE_ANY;
949 else
950 return 0;
951
b0e34bfe
NC		 952 /* Make sure the the Altivec and SPE bits are not lost. */
953 ppc_cpu |= altivec_or_spe;
69c040df
AM		 954 return 1;
955}
956
252b5132 957int
98027b10 958md_parse_option (int c, char *arg)
252b5132
RH		 959{
960 switch (c)
961 {
962 case 'u':
963 /* -u means that any undefined symbols should be treated as
964 external, which is the default for gas anyhow. */
965 break;
966
967#ifdef OBJ_ELF
968 case 'l':
969 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 970 sake, recognize -be also. */
252b5132
RH		 971 if (strcmp (arg, "e") == 0)
972 {
973 target_big_endian = 0;
974 set_target_endian = 1;
975 }
976 else
977 return 0;
978
979 break;
980
981 case 'b':
982 if (strcmp (arg, "e") == 0)
983 {
984 target_big_endian = 1;
985 set_target_endian = 1;
986 }
987 else
988 return 0;
989
990 break;
991
992 case 'K':
99a814a1 993 /* Recognize -K PIC. */
252b5132
RH		 994 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
995 {
996 shlib = SHLIB_PIC;
997 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
998 }
999 else
1000 return 0;
1001
1002 break;
1003#endif
1004
7f6d05e8
CP		 1005 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1006 case 'a':
1007 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1008 {
1009#ifdef BFD64
1010 ppc_obj64 = 1;
1011#else
1012 as_fatal (_("%s unsupported"), "-a64");
1013#endif
1014 }
7f6d05e8 1015 else if (strcmp (arg, "32") == 0)
2b3c4602 1016 ppc_obj64 = 0;
7f6d05e8
CP		 1017 else
1018 return 0;
1019 break;
81d4177b 1020
252b5132 1021 case 'm':
69c040df
AM		 1022 if (parse_cpu (arg))
1023 ;
252b5132
RH		 1024
1025 else if (strcmp (arg, "regnames") == 0)
b34976b6 1026 reg_names_p = TRUE;
252b5132
RH		 1027
1028 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1029 reg_names_p = FALSE;
252b5132
RH		 1030
1031#ifdef OBJ_ELF
99a814a1
AM		 1032 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1033 that require relocation. */
252b5132
RH		 1034 else if (strcmp (arg, "relocatable") == 0)
1035 {
5d6f4f16 1036 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1037 ppc_flags |= EF_PPC_RELOCATABLE;
1038 }
1039
1040 else if (strcmp (arg, "relocatable-lib") == 0)
1041 {
5d6f4f16 1042 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1043 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1044 }
1045
99a814a1 1046 /* -memb, set embedded bit. */
252b5132
RH		 1047 else if (strcmp (arg, "emb") == 0)
1048 ppc_flags |= EF_PPC_EMB;
1049
99a814a1
AM		 1050 /* -mlittle/-mbig set the endianess. */
1051 else if (strcmp (arg, "little") == 0
1052 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1053 {
1054 target_big_endian = 0;
1055 set_target_endian = 1;
1056 }
1057
1058 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1059 {
1060 target_big_endian = 1;
1061 set_target_endian = 1;
1062 }
1063
1064 else if (strcmp (arg, "solaris") == 0)
1065 {
b34976b6 1066 msolaris = TRUE;
252b5132
RH		 1067 ppc_comment_chars = ppc_solaris_comment_chars;
1068 }
1069
1070 else if (strcmp (arg, "no-solaris") == 0)
1071 {
b34976b6 1072 msolaris = FALSE;
252b5132
RH		 1073 ppc_comment_chars = ppc_eabi_comment_chars;
1074 }
1075#endif
1076 else
1077 {
1078 as_bad (_("invalid switch -m%s"), arg);
1079 return 0;
1080 }
1081 break;
1082
1083#ifdef OBJ_ELF
1084 /* -V: SVR4 argument to print version ID. */
1085 case 'V':
1086 print_version_id ();
1087 break;
1088
1089 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1090 should be emitted or not. FIXME: Not implemented. */
1091 case 'Q':
1092 break;
1093
1094 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1095 rather than .stabs.excl, which is ignored by the linker.
1096 FIXME: Not implemented. */
1097 case 's':
1098 if (arg)
1099 return 0;
1100
1101 break;
1102#endif
1103
1104 default:
1105 return 0;
1106 }
1107
1108 return 1;
1109}
1110
1111void
98027b10 1112md_show_usage (FILE *stream)
252b5132 1113{
bc805888 1114 fprintf (stream, _("\
252b5132 1115PowerPC options:\n\
df12615d
AM		 1116-a32 generate ELF32/XCOFF32\n\
1117-a64 generate ELF64/XCOFF64\n\
252b5132 1118-u ignored\n\
23e1d84c
AM		 1119-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1120-mpwr generate code for POWER (RIOS1)\n\
1121-m601 generate code for PowerPC 601\n\
418c1742 1122-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1123 generate code for PowerPC 603/604\n\
df12615d 1124-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1125-m440 generate code for PowerPC 440\n\
f5c120c5 1126-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1127 generate code for PowerPC 7400/7410/7450/7455\n\
1128-m750cl generate code for PowerPC 750cl\n"));
df12615d 1129 fprintf (stream, _("\
23e1d84c 1130-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1131-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1132-mbooke64 generate code for 64-bit PowerPC BookE\n\
1133-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1134-mpower4 generate code for Power4 architecture\n\
b0648eec 1135-mpower5 generate code for Power5 architecture\n\
9622b051 1136-mpower6 generate code for Power6 architecture\n\
ede602d7 1137-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1138-mcom generate code Power/PowerPC common instructions\n\
df12615d 1139-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1140 fprintf (stream, _("\
df12615d 1141-maltivec generate code for AltiVec\n\
36ae0db3 1142-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1143-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1144-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1145-mspe generate code for Motorola SPE instructions\n\
1146-mregnames Allow symbolic names for registers\n\
1147-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1148#ifdef OBJ_ELF
bc805888 1149 fprintf (stream, _("\
252b5132
RH		 1150-mrelocatable support for GCC's -mrelocatble option\n\
1151-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1152-memb set PPC_EMB bit in ELF flags\n\
df12615d 1153-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1154 generate code for a little endian machine\n\
df12615d
AM		 1155-mbig, -mbig-endian, -b, -be\n\
1156 generate code for a big endian machine\n\
252b5132
RH		 1157-msolaris generate code for Solaris\n\
1158-mno-solaris do not generate code for Solaris\n\
1159-V print assembler version number\n\
1160-Qy, -Qn ignored\n"));
1161#endif
1162}
1163\f
1164/* Set ppc_cpu if it is not already set. */
1165
1166static void
98027b10 1167ppc_set_cpu (void)
252b5132
RH		 1168{
1169 const char *default_os = TARGET_OS;
1170 const char *default_cpu = TARGET_CPU;
1171
3c9030c1 1172 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1173 {
2a98c3a6 1174 if (ppc_obj64)
3c9030c1 1175 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1176 else if (strncmp (default_os, "aix", 3) == 0
1177 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1178 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1179 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1180 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1181 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1182 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1183 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1184 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1185 else
99a814a1
AM		 1186 as_fatal (_("Unknown default cpu = %s, os = %s"),
1187 default_cpu, default_os);
252b5132
RH		 1188 }
1189}
1190
9232bbb0
AM		 1191/* Figure out the BFD architecture to use. This function and ppc_mach
1192 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1193
1194enum bfd_architecture
98027b10 1195ppc_arch (void)
252b5132
RH		 1196{
1197 const char *default_cpu = TARGET_CPU;
1198 ppc_set_cpu ();
1199
1200 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1201 return bfd_arch_powerpc;
1202 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1203 return bfd_arch_rs6000;
1204 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1205 {
1206 if (strcmp (default_cpu, "rs6000") == 0)
1207 return bfd_arch_rs6000;
0baf16f2 1208 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1209 return bfd_arch_powerpc;
1210 }
1211
1212 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1213 return bfd_arch_unknown;
1214}
1215
7f6d05e8 1216unsigned long
98027b10 1217ppc_mach (void)
7f6d05e8 1218{
2a98c3a6
AM		 1219 if (ppc_obj64)
1220 return bfd_mach_ppc64;
1221 else if (ppc_arch () == bfd_arch_rs6000)
1222 return bfd_mach_rs6k;
1223 else
1224 return bfd_mach_ppc;
7f6d05e8
CP		 1225}
1226
81d4177b 1227extern char*
98027b10 1228ppc_target_format (void)
7f6d05e8
CP		 1229{
1230#ifdef OBJ_COFF
1231#ifdef TE_PE
99a814a1 1232 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1233#elif TE_POWERMAC
0baf16f2 1234 return "xcoff-powermac";
7f6d05e8 1235#else
eb1e0e80 1236# ifdef TE_AIX5
2b3c4602 1237 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1238# else
2b3c4602 1239 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1240# endif
7f6d05e8 1241#endif
7f6d05e8
CP		 1242#endif
1243#ifdef OBJ_ELF
9d8504b1
PB		 1244# ifdef TE_VXWORKS
1245 return "elf32-powerpc-vxworks";
1246# else
0baf16f2 1247 return (target_big_endian
2b3c4602
AM		 1248 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1249 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1250# endif
7f6d05e8
CP		 1251#endif
1252}
1253
69c040df
AM		 1254/* Insert opcodes and macros into hash tables. Called at startup and
1255 for .cpu pseudo. */
252b5132 1256
69c040df
AM		 1257static void
1258ppc_setup_opcodes (void)
252b5132 1259{
98027b10 1260 const struct powerpc_opcode *op;
252b5132
RH		 1261 const struct powerpc_opcode *op_end;
1262 const struct powerpc_macro *macro;
1263 const struct powerpc_macro *macro_end;
b84bf58a 1264 bfd_boolean bad_insn = FALSE;
252b5132 1265
69c040df
AM		 1266 if (ppc_hash != NULL)
1267 hash_die (ppc_hash);
1268 if (ppc_macro_hash != NULL)
1269 hash_die (ppc_macro_hash);
252b5132
RH		 1270
1271 /* Insert the opcodes into a hash table. */
1272 ppc_hash = hash_new ();
1273
c43a438d 1274 if (ENABLE_CHECKING)
b84bf58a 1275 {
c43a438d 1276 unsigned int i;
b84bf58a 1277
c43a438d
AM		 1278 /* Check operand masks. Code here and in the disassembler assumes
1279 all the 1's in the mask are contiguous. */
1280 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1281 {
c43a438d
AM		 1282 unsigned long mask = powerpc_operands[i].bitm;
1283 unsigned long right_bit;
1284 unsigned int j;
1285
1286 right_bit = mask & -mask;
1287 mask += right_bit;
1288 right_bit = mask & -mask;
1289 if (mask != right_bit)
1290 {
1291 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1292 bad_insn = TRUE;
1293 }
1294 for (j = i + 1; j < num_powerpc_operands; ++j)
1295 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1296 sizeof (powerpc_operands[0])) == 0)
1297 {
1298 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1299 j, i);
1300 bad_insn = TRUE;
1301 }
b84bf58a
AM		 1302 }
1303 }
1304
252b5132
RH		 1305 op_end = powerpc_opcodes + powerpc_num_opcodes;
1306 for (op = powerpc_opcodes; op < op_end; op++)
1307 {
c43a438d 1308 if (ENABLE_CHECKING)
b84bf58a 1309 {
c43a438d
AM		 1310 const unsigned char *o;
1311 unsigned long omask = op->mask;
8dbcd839 1312
d815f1a9 1313 if (op != powerpc_opcodes)
8dbcd839 1314 {
d815f1a9
AM		 1315 /* The major opcodes had better be sorted. Code in the
1316 disassembler assumes the insns are sorted according to
1317 major opcode. */
1318 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1319 {
1320 as_bad (_("major opcode is not sorted for %s"),
1321 op->name);
1322 bad_insn = TRUE;
1323 }
1324
1325 /* Warn if the table isn't more strictly ordered.
1326 Unfortunately it doesn't seem possible to order the
1327 table on much more than the major opcode, which makes
1328 it difficult to implement a binary search in the
1329 disassembler. The problem is that we have multiple
1330 ways to disassemble instructions, and we usually want
1331 to choose a more specific form (with more bits set in
1332 the opcode) than a more general form. eg. all of the
1333 following are equivalent:
1334 bne label # opcode = 0x40820000, mask = 0xff830003
1335 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1336 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1337
1338 There are also cases where the table needs to be out
1339 of order to disassemble the correct instruction for
1340 processor variants. eg. "lhae" booke64 insn must be
1341 found before "ld" ppc64 insn. */
1342 else if (0)
1343 {
1344 unsigned long t1 = op[0].opcode;
1345 unsigned long t2 = op[-1].opcode;
1346
1347 if (((t1 ^ t2) & 0xfc0007ff) == 0
1348 && (t1 & 0xfc0006df) == 0x7c000286)
1349 {
1350 /* spr field is split. */
1351 t1 = ((t1 & ~0x1ff800)
1352 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1353 t2 = ((t2 & ~0x1ff800)
1354 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1355 }
1356 if (t1 < t2)
1357 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1358 op[0].name, op[0].opcode, op[0].mask,
1359 op[-1].name, op[-1].opcode, op[-1].mask);
1360 }
8dbcd839 1361 }
c43a438d
AM		 1362
1363 /* The mask had better not trim off opcode bits. */
1364 if ((op->opcode & omask) != op->opcode)
1365 {
1366 as_bad (_("mask trims opcode bits for %s"),
1367 op->name);
1368 bad_insn = TRUE;
1369 }
1370
1371 /* The operands must not overlap the opcode or each other. */
1372 for (o = op->operands; *o; ++o)
1373 if (*o >= num_powerpc_operands)
1374 {
1375 as_bad (_("operand index error for %s"),
1376 op->name);
1377 bad_insn = TRUE;
1378 }
1379 else
b84bf58a 1380 {
c43a438d
AM		 1381 const struct powerpc_operand *operand = &powerpc_operands[*o];
1382 if (operand->shift >= 0)
b84bf58a 1383 {
c43a438d
AM		 1384 unsigned long mask = operand->bitm << operand->shift;
1385 if (omask & mask)
1386 {
1387 as_bad (_("operand %d overlap in %s"),
1388 (int) (o - op->operands), op->name);
1389 bad_insn = TRUE;
1390 }
1391 omask |= mask;
b84bf58a 1392 }
b84bf58a 1393 }
c43a438d 1394 }
252b5132 1395
2b3c4602 1396 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1397 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1398 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1399 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1400 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1401 /* Certain instructions (eg: extsw) do not exist in the
1402 32-bit BookE instruction set, but they do exist in the
1403 64-bit BookE instruction set, and other PPC instruction
1404 sets. Check to see if the opcode has the BOOKE64 flag set.
1405 If it does make sure that the target CPU is not the BookE32. */
1406 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1407 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1408 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1409 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1410 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1411 == (ppc_cpu & PPC_OPCODE_POWER4)))
1412 && ((op->flags & PPC_OPCODE_POWER5) == 0
1413 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1414 == (ppc_cpu & PPC_OPCODE_POWER5)))
1415 && ((op->flags & PPC_OPCODE_POWER6) == 0
1416 || ((op->flags & PPC_OPCODE_POWER6)
1417 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1418 {
1419 const char *retval;
1420
98027b10 1421 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1422 if (retval != NULL)
252b5132 1423 {
99a814a1 1424 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1425 if ((ppc_cpu & PPC_OPCODE_601) != 0
1426 && (op->flags & PPC_OPCODE_POWER) != 0)
1427 continue;
1428
b84bf58a 1429 as_bad (_("duplicate instruction %s"),
99a814a1 1430 op->name);
b84bf58a 1431 bad_insn = TRUE;
252b5132
RH		 1432 }
1433 }
1434 }
1435
3c9030c1
AM		 1436 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1437 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1438 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1439
252b5132
RH		 1440 /* Insert the macros into a hash table. */
1441 ppc_macro_hash = hash_new ();
1442
1443 macro_end = powerpc_macros + powerpc_num_macros;
1444 for (macro = powerpc_macros; macro < macro_end; macro++)
1445 {
1446 if ((macro->flags & ppc_cpu) != 0)
1447 {
1448 const char *retval;
1449
98027b10 1450 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1451 if (retval != (const char *) NULL)
1452 {
b84bf58a
AM		 1453 as_bad (_("duplicate macro %s"), macro->name);
1454 bad_insn = TRUE;
252b5132
RH		 1455 }
1456 }
1457 }
1458
b84bf58a 1459 if (bad_insn)
252b5132 1460 abort ();
69c040df
AM		 1461}
1462
1463/* This function is called when the assembler starts up. It is called
1464 after the options have been parsed and the output file has been
1465 opened. */
1466
1467void
98027b10 1468md_begin (void)
69c040df
AM		 1469{
1470 ppc_set_cpu ();
1471
1472 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1473
1474#ifdef OBJ_ELF
1475 /* Set the ELF flags if desired. */
1476 if (ppc_flags && !msolaris)
1477 bfd_set_private_flags (stdoutput, ppc_flags);
1478#endif
1479
1480 ppc_setup_opcodes ();
252b5132 1481
67c1ffbe 1482 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1483 by the user. */
252b5132
RH		 1484 if (!set_target_endian)
1485 {
1486 set_target_endian = 1;
1487 target_big_endian = PPC_BIG_ENDIAN;
1488 }
1489
1490#ifdef OBJ_XCOFF
1491 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1492
1493 /* Create dummy symbols to serve as initial csects. This forces the
1494 text csects to precede the data csects. These symbols will not
1495 be output. */
1496 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1497 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1498 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1499 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1500#endif
1501
1502#ifdef TE_PE
1503
1504 ppc_current_section = text_section;
81d4177b 1505 ppc_previous_section = 0;
252b5132
RH		 1506
1507#endif
1508}
1509
6a0c61b7 1510void
98027b10 1511ppc_cleanup (void)
6a0c61b7 1512{
dc1d03fc 1513#ifdef OBJ_ELF
6a0c61b7
EZ		 1514 if (ppc_apuinfo_list == NULL)
1515 return;
1516
1517 /* Ok, so write the section info out. We have this layout:
1518
1519 byte data what
1520 ---- ---- ----
1521 0 8 length of "APUinfo\0"
1522 4 (n*4) number of APU's (4 bytes each)
1523 8 2 note type 2
1524 12 "APUinfo\0" name
1525 20 APU#1 first APU's info
1526 24 APU#2 second APU's info
1527 ... ...
1528 */
1529 {
1530 char *p;
1531 asection *seg = now_seg;
1532 subsegT subseg = now_subseg;
1533 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1534 unsigned int i;
6a0c61b7
EZ		 1535
1536 /* Create the .PPC.EMB.apuinfo section. */
1537 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1538 bfd_set_section_flags (stdoutput,
1539 apuinfo_secp,
e1a9cb8e 1540 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1541
1542 p = frag_more (4);
1543 md_number_to_chars (p, (valueT) 8, 4);
1544
1545 p = frag_more (4);
e98d298c 1546 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1547
1548 p = frag_more (4);
1549 md_number_to_chars (p, (valueT) 2, 4);
1550
1551 p = frag_more (8);
1552 strcpy (p, "APUinfo");
1553
1554 for (i = 0; i < ppc_apuinfo_num; i++)
1555 {
b34976b6
AM		 1556 p = frag_more (4);
1557 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1558 }
1559
1560 frag_align (2, 0, 0);
1561
1562 /* We probably can't restore the current segment, for there likely
1563 isn't one yet... */
1564 if (seg && subseg)
1565 subseg_set (seg, subseg);
1566 }
dc1d03fc 1567#endif
6a0c61b7
EZ		 1568}
1569
252b5132
RH		 1570/* Insert an operand value into an instruction. */
1571
1572static unsigned long
a1867a27
AM		 1573ppc_insert_operand (unsigned long insn,
1574 const struct powerpc_operand *operand,
1575 offsetT val,
783de163 1576 unsigned long ppc_cpu,
a1867a27
AM		 1577 char *file,
1578 unsigned int line)
252b5132 1579{
b84bf58a 1580 long min, max, right;
eb42fac1 1581
b84bf58a
AM		 1582 max = operand->bitm;
1583 right = max & -max;
1584 min = 0;
1585
1586 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1587 {
b84bf58a 1588 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1589 max = (max >> 1) & -right;
1590 min = ~max & -right;
b84bf58a 1591 }
252b5132 1592
b84bf58a 1593 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1594 max++;
252b5132 1595
b84bf58a 1596 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1597 {
1598 long tmp = min;
1599 min = -max;
1600 max = -tmp;
1601 }
b84bf58a 1602
a1867a27
AM		 1603 if (min <= max)
1604 {
1605 /* Some people write constants with the sign extension done by
1606 hand but only up to 32 bits. This shouldn't really be valid,
1607 but, to permit this code to assemble on a 64-bit host, we
1608 sign extend the 32-bit value to 64 bits if so doing makes the
1609 value valid. */
1610 if (val > max
1611 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1612 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1613 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1614 val = val - 0x80000000 - 0x80000000;
1615
1616 /* Similarly, people write expressions like ~(1<<15), and expect
1617 this to be OK for a 32-bit unsigned value. */
1618 else if (val < min
1619 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1620 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1621 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1622 val = val + 0x80000000 + 0x80000000;
1623
1624 else if (val < min
1625 || val > max
1626 || (val & (right - 1)) != 0)
1627 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1628 }
b84bf58a 1629
252b5132
RH		 1630 if (operand->insert)
1631 {
1632 const char *errmsg;
1633
1634 errmsg = NULL;
2b3c4602 1635 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1636 if (errmsg != (const char *) NULL)
0baf16f2 1637 as_bad_where (file, line, errmsg);
252b5132
RH		 1638 }
1639 else
b84bf58a 1640 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1641
1642 return insn;
1643}
1644
1645\f
1646#ifdef OBJ_ELF
1647/* Parse @got, etc. and return the desired relocation. */
1648static bfd_reloc_code_real_type
98027b10 1649ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1650{
1651 struct map_bfd {
1652 char *string;
b7d7dc63
AM		 1653 unsigned int length : 8;
1654 unsigned int valid32 : 1;
1655 unsigned int valid64 : 1;
1656 unsigned int reloc;
252b5132
RH		 1657 };
1658
1659 char ident[20];
1660 char *str = *str_p;
1661 char *str2;
1662 int ch;
1663 int len;
15c1449b 1664 const struct map_bfd *ptr;
252b5132 1665
b7d7dc63
AM		 1666#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1667#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1668#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1669
15c1449b 1670 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1671 MAP ("l", BFD_RELOC_LO16),
1672 MAP ("h", BFD_RELOC_HI16),
1673 MAP ("ha", BFD_RELOC_HI16_S),
1674 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1675 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1676 MAP ("got", BFD_RELOC_16_GOTOFF),
1677 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1678 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1679 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1680 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1681 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1682 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1683 MAP ("copy", BFD_RELOC_PPC_COPY),
1684 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1685 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1686 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1687 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1688 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1689 MAP ("tls", BFD_RELOC_PPC_TLS),
1690 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1691 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1692 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1693 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1694 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1695 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1696 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1697 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1698 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1699 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1700 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1701 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1702 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1703 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1704 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1705 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1706 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1707 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1708 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1709 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1710 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1711 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1712 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1713 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1714 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1715 MAP32 ("fixup", BFD_RELOC_CTOR),
1716 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1717 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1718 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1719 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1720 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1721 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1722 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1723 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1724 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1725 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1726 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1727 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1728 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1729 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1730 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1731 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1732 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1733 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1734 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1735 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1736 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1737 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1738 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1739 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1740 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1741 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1742 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1743 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1744 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1745 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1746 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1747 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1748 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1749 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1750 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1751 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1752 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1753 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1754 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1755 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1756 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1757 };
1758
1759 if (*str++ != '@')
1760 return BFD_RELOC_UNUSED;
1761
1762 for (ch = *str, str2 = ident;
1763 (str2 < ident + sizeof (ident) - 1
3882b010 1764 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1765 ch = *++str)
1766 {
3882b010 1767 *str2++ = TOLOWER (ch);
252b5132
RH		 1768 }
1769
1770 *str2 = '\0';
1771 len = str2 - ident;
1772
1773 ch = ident[0];
1774 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1775 if (ch == ptr->string[0]
1776 && len == ptr->length
b7d7dc63
AM		 1777 && memcmp (ident, ptr->string, ptr->length) == 0
1778 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1779 {
15c1449b
AM		 1780 int reloc = ptr->reloc;
1781
cdba85ec 1782 if (!ppc_obj64)
5f6db75a
AM		 1783 if (exp_p->X_add_number != 0
1784 && (reloc == (int) BFD_RELOC_16_GOTOFF
1785 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1786 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1787 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1788 as_warn (_("identifier+constant@got means identifier@got+constant"));
1789
1790 /* Now check for identifier@suffix+constant. */
1791 if (*str == '-' || *str == '+')
252b5132 1792 {
5f6db75a
AM		 1793 char *orig_line = input_line_pointer;
1794 expressionS new_exp;
1795
1796 input_line_pointer = str;
1797 expression (&new_exp);
1798 if (new_exp.X_op == O_constant)
252b5132 1799 {
5f6db75a
AM		 1800 exp_p->X_add_number += new_exp.X_add_number;
1801 str = input_line_pointer;
252b5132 1802 }
5f6db75a
AM		 1803
1804 if (&input_line_pointer != str_p)
1805 input_line_pointer = orig_line;
252b5132 1806 }
252b5132 1807 *str_p = str;
0baf16f2 1808
2b3c4602 1809 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1810 && exp_p->X_op == O_symbol
1811 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1812 {
9f2b53d7
AM		 1813 /* Change the symbol so that the dummy .TOC. symbol can be
1814 omitted from the object file. */
0baf16f2
AM		 1815 exp_p->X_add_symbol = &abs_symbol;
1816 }
1817
15c1449b 1818 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1819 }
1820
1821 return BFD_RELOC_UNUSED;
1822}
1823
99a814a1
AM		 1824/* Like normal .long/.short/.word, except support @got, etc.
1825 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1826static void
98027b10 1827ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1828{
1829 expressionS exp;
1830 bfd_reloc_code_real_type reloc;
1831
1832 if (is_it_end_of_statement ())
1833 {
1834 demand_empty_rest_of_line ();
1835 return;
1836 }
1837
1838 do
1839 {
1840 expression (&exp);
1841 if (exp.X_op == O_symbol
1842 && *input_line_pointer == '@'
99a814a1
AM		 1843 && (reloc = ppc_elf_suffix (&input_line_pointer,
1844 &exp)) != BFD_RELOC_UNUSED)
252b5132 1845 {
99a814a1
AM		 1846 reloc_howto_type *reloc_howto;
1847 int size;
1848
1849 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1850 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1851
1852 if (size > nbytes)
0baf16f2
AM		 1853 {
1854 as_bad (_("%s relocations do not fit in %d bytes\n"),
1855 reloc_howto->name, nbytes);
1856 }
252b5132
RH		 1857 else
1858 {
0baf16f2
AM		 1859 char *p;
1860 int offset;
252b5132 1861
0baf16f2
AM		 1862 p = frag_more (nbytes);
1863 offset = 0;
1864 if (target_big_endian)
1865 offset = nbytes - size;
99a814a1
AM		 1866 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1867 &exp, 0, reloc);
252b5132
RH		 1868 }
1869 }
1870 else
1871 emit_expr (&exp, (unsigned int) nbytes);
1872 }
1873 while (*input_line_pointer++ == ',');
1874
99a814a1
AM		 1875 /* Put terminator back into stream. */
1876 input_line_pointer--;
252b5132
RH		 1877 demand_empty_rest_of_line ();
1878}
1879
1880/* Solaris pseduo op to change to the .rodata section. */
1881static void
98027b10 1882ppc_elf_rdata (int xxx)
252b5132
RH		 1883{
1884 char *save_line = input_line_pointer;
1885 static char section[] = ".rodata\n";
1886
99a814a1 1887 /* Just pretend this is .section .rodata */
252b5132
RH		 1888 input_line_pointer = section;
1889 obj_elf_section (xxx);
1890
1891 input_line_pointer = save_line;
1892}
1893
99a814a1 1894/* Pseudo op to make file scope bss items. */
252b5132 1895static void
98027b10 1896ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1897{
98027b10
AM		 1898 char *name;
1899 char c;
1900 char *p;
252b5132 1901 offsetT size;
98027b10 1902 symbolS *symbolP;
252b5132
RH		 1903 offsetT align;
1904 segT old_sec;
1905 int old_subsec;
1906 char *pfrag;
1907 int align2;
1908
1909 name = input_line_pointer;
1910 c = get_symbol_end ();
1911
99a814a1 1912 /* just after name is now '\0'. */
252b5132
RH		 1913 p = input_line_pointer;
1914 *p = c;
1915 SKIP_WHITESPACE ();
1916 if (*input_line_pointer != ',')
1917 {
1918 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1919 ignore_rest_of_line ();
1920 return;
1921 }
1922
1923 input_line_pointer++; /* skip ',' */
1924 if ((size = get_absolute_expression ()) < 0)
1925 {
1926 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1927 ignore_rest_of_line ();
1928 return;
1929 }
1930
1931 /* The third argument to .lcomm is the alignment. */
1932 if (*input_line_pointer != ',')
1933 align = 8;
1934 else
1935 {
1936 ++input_line_pointer;
1937 align = get_absolute_expression ();
1938 if (align <= 0)
1939 {
1940 as_warn (_("ignoring bad alignment"));
1941 align = 8;
1942 }
1943 }
1944
1945 *p = 0;
1946 symbolP = symbol_find_or_make (name);
1947 *p = c;
1948
1949 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1950 {
1951 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1952 S_GET_NAME (symbolP));
1953 ignore_rest_of_line ();
1954 return;
1955 }
1956
1957 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1958 {
1959 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1960 S_GET_NAME (symbolP),
1961 (long) S_GET_VALUE (symbolP),
1962 (long) size);
1963
1964 ignore_rest_of_line ();
1965 return;
1966 }
1967
99a814a1 1968 /* Allocate_bss. */
252b5132
RH		 1969 old_sec = now_seg;
1970 old_subsec = now_subseg;
1971 if (align)
1972 {
99a814a1 1973 /* Convert to a power of 2 alignment. */
252b5132
RH		 1974 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1975 if (align != 1)
1976 {
1977 as_bad (_("Common alignment not a power of 2"));
1978 ignore_rest_of_line ();
1979 return;
1980 }
1981 }
1982 else
1983 align2 = 0;
1984
1985 record_alignment (bss_section, align2);
1986 subseg_set (bss_section, 0);
1987 if (align2)
1988 frag_align (align2, 0, 0);
1989 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1990 symbol_get_frag (symbolP)->fr_symbol = 0;
1991 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1992 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1993 (char *) 0);
1994 *pfrag = 0;
1995 S_SET_SIZE (symbolP, size);
1996 S_SET_SEGMENT (symbolP, bss_section);
1997 subseg_set (old_sec, old_subsec);
1998 demand_empty_rest_of_line ();
1999}
2000
2001/* Validate any relocations emitted for -mrelocatable, possibly adding
2002 fixups for word relocations in writable segments, so we can adjust
2003 them at runtime. */
2004static void
98027b10 2005ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2006{
2007 if (fixp->fx_done || fixp->fx_pcrel)
2008 return;
2009
2010 switch (shlib)
2011 {
2012 case SHLIB_NONE:
2013 case SHLIB_PIC:
2014 return;
2015
5d6f4f16 2016 case SHLIB_MRELOCATABLE:
252b5132
RH		 2017 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2018 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2019 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2020 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2021 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2022 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2023 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2024 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2025 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2026 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2027 && strcmp (segment_name (seg), ".got2") != 0
2028 && strcmp (segment_name (seg), ".dtors") != 0
2029 && strcmp (segment_name (seg), ".ctors") != 0
2030 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2031 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2032 && strcmp (segment_name (seg), ".eh_frame") != 0
2033 && strcmp (segment_name (seg), ".ex_shared") != 0)
2034 {
2035 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2036 || fixp->fx_r_type != BFD_RELOC_CTOR)
2037 {
2038 as_bad_where (fixp->fx_file, fixp->fx_line,
2039 _("Relocation cannot be done when using -mrelocatable"));
2040 }
2041 }
2042 return;
2043 }
2044}
0baf16f2 2045
7e8d4ab4
AM		 2046/* Prevent elf_frob_file_before_adjust removing a weak undefined
2047 function descriptor sym if the corresponding code sym is used. */
2048
2049void
98027b10 2050ppc_frob_file_before_adjust (void)
0baf16f2 2051{
7e8d4ab4 2052 symbolS *symp;
9232bbb0 2053 asection *toc;
0baf16f2 2054
7e8d4ab4
AM		 2055 if (!ppc_obj64)
2056 return;
2057
2058 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2059 {
7e8d4ab4
AM		 2060 const char *name;
2061 char *dotname;
2062 symbolS *dotsym;
2063 size_t len;
2064
2065 name = S_GET_NAME (symp);
2066 if (name[0] == '.')
2067 continue;
2068
2069 if (! S_IS_WEAK (symp)
2070 || S_IS_DEFINED (symp))
2071 continue;
2072
2073 len = strlen (name) + 1;
2074 dotname = xmalloc (len + 1);
2075 dotname[0] = '.';
2076 memcpy (dotname + 1, name, len);
461b725f 2077 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2078 free (dotname);
2079 if (dotsym != NULL && (symbol_used_p (dotsym)
2080 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2081 symbol_mark_used (symp);
2082
0baf16f2
AM		 2083 }
2084
9232bbb0
AM		 2085 toc = bfd_get_section_by_name (stdoutput, ".toc");
2086 if (toc != NULL
2087 && bfd_section_size (stdoutput, toc) > 0x10000)
2088 as_warn (_("TOC section size exceeds 64k"));
2089
7e8d4ab4
AM		 2090 /* Don't emit .TOC. symbol. */
2091 symp = symbol_find (".TOC.");
2092 if (symp != NULL)
2093 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2094}
252b5132
RH		 2095#endif /* OBJ_ELF */
2096\f
2097#ifdef TE_PE
2098
2099/*
99a814a1 2100 * Summary of parse_toc_entry.
252b5132
RH		 2101 *
2102 * in: Input_line_pointer points to the '[' in one of:
2103 *
2104 * [toc] [tocv] [toc32] [toc64]
2105 *
2106 * Anything else is an error of one kind or another.
2107 *
81d4177b 2108 * out:
252b5132
RH		 2109 * return value: success or failure
2110 * toc_kind: kind of toc reference
2111 * input_line_pointer:
2112 * success: first char after the ']'
2113 * failure: unchanged
2114 *
2115 * settings:
2116 *
2117 * [toc] - rv == success, toc_kind = default_toc
2118 * [tocv] - rv == success, toc_kind = data_in_toc
2119 * [toc32] - rv == success, toc_kind = must_be_32
2120 * [toc64] - rv == success, toc_kind = must_be_64
2121 *
2122 */
2123
81d4177b
KH		 2124enum toc_size_qualifier
2125{
252b5132
RH		 2126 default_toc, /* The toc cell constructed should be the system default size */
2127 data_in_toc, /* This is a direct reference to a toc cell */
2128 must_be_32, /* The toc cell constructed must be 32 bits wide */
2129 must_be_64 /* The toc cell constructed must be 64 bits wide */
2130};
2131
2132static int
98027b10 2133parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2134{
2135 char *start;
2136 char *toc_spec;
2137 char c;
2138 enum toc_size_qualifier t;
2139
99a814a1 2140 /* Save the input_line_pointer. */
252b5132
RH		 2141 start = input_line_pointer;
2142
99a814a1 2143 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2144 ++input_line_pointer;
2145 SKIP_WHITESPACE ();
81d4177b 2146
99a814a1 2147 /* Find the spelling of the operand. */
252b5132
RH		 2148 toc_spec = input_line_pointer;
2149 c = get_symbol_end ();
2150
99a814a1 2151 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2152 {
2153 t = default_toc;
2154 }
99a814a1 2155 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2156 {
2157 t = data_in_toc;
2158 }
99a814a1 2159 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2160 {
2161 t = must_be_32;
2162 }
99a814a1 2163 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2164 {
2165 t = must_be_64;
2166 }
2167 else
2168 {
2169 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2170 *input_line_pointer = c;
2171 input_line_pointer = start;
252b5132
RH		 2172 return 0;
2173 }
2174
99a814a1
AM		 2175 /* Now find the ']'. */
2176 *input_line_pointer = c;
252b5132 2177
81d4177b
KH		 2178 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2179 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2180
2181 if (c != ']')
2182 {
2183 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2184 input_line_pointer = start;
252b5132
RH		 2185 return 0;
2186 }
2187
99a814a1 2188 *toc_kind = t;
252b5132
RH		 2189 return 1;
2190}
2191#endif
2192\f
2193
dc1d03fc 2194#ifdef OBJ_ELF
6a0c61b7
EZ		 2195#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2196static void
98027b10 2197ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2198{
2199 unsigned int i;
2200
2201 /* Check we don't already exist. */
2202 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2203 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2204 return;
b34976b6 2205
6a0c61b7
EZ		 2206 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2207 {
2208 if (ppc_apuinfo_num_alloc == 0)
2209 {
2210 ppc_apuinfo_num_alloc = 4;
2211 ppc_apuinfo_list = (unsigned long *)
2212 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2213 }
2214 else
2215 {
2216 ppc_apuinfo_num_alloc += 4;
2217 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2218 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2219 }
2220 }
dc1d03fc 2221 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2222}
2223#undef APUID
dc1d03fc 2224#endif
6a0c61b7
EZ		 2225\f
2226
252b5132
RH		 2227/* We need to keep a list of fixups. We can't simply generate them as
2228 we go, because that would require us to first create the frag, and
2229 that would screw up references to ``.''. */
2230
2231struct ppc_fixup
2232{
2233 expressionS exp;
2234 int opindex;
2235 bfd_reloc_code_real_type reloc;
2236};
2237
2238#define MAX_INSN_FIXUPS (5)
2239
2240/* This routine is called for each instruction to be assembled. */
2241
2242void
98027b10 2243md_assemble (char *str)
252b5132
RH		 2244{
2245 char *s;
2246 const struct powerpc_opcode *opcode;
2247 unsigned long insn;
2248 const unsigned char *opindex_ptr;
2249 int skip_optional;
2250 int need_paren;
2251 int next_opindex;
2252 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2253 int fc;
2254 char *f;
09b935ac 2255 int addr_mod;
252b5132
RH		 2256 int i;
2257#ifdef OBJ_ELF
2258 bfd_reloc_code_real_type reloc;
2259#endif
2260
2261 /* Get the opcode. */
3882b010 2262 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2263 ;
2264 if (*s != '\0')
2265 *s++ = '\0';
2266
2267 /* Look up the opcode in the hash table. */
2268 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2269 if (opcode == (const struct powerpc_opcode *) NULL)
2270 {
2271 const struct powerpc_macro *macro;
2272
2273 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2274 if (macro == (const struct powerpc_macro *) NULL)
2275 as_bad (_("Unrecognized opcode: `%s'"), str);
2276 else
2277 ppc_macro (s, macro);
2278
2279 return;
2280 }
2281
2282 insn = opcode->opcode;
2283
2284 str = s;
3882b010 2285 while (ISSPACE (*str))
252b5132
RH		 2286 ++str;
2287
2288 /* PowerPC operands are just expressions. The only real issue is
2289 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2290 an optional operand separate the operands only with commas (in some
2291 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2292 have optional operands). Most instructions with optional operands
2293 have only one. Those that have more than one optional operand can
2294 take either all their operands or none. So, before we start seriously
2295 parsing the operands, we check to see if we have optional operands,
2296 and if we do, we count the number of commas to see which operands
2297 have been omitted. */
252b5132
RH		 2298 skip_optional = 0;
2299 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2300 {
2301 const struct powerpc_operand *operand;
2302
2303 operand = &powerpc_operands[*opindex_ptr];
2304 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2305 {
2306 unsigned int opcount;
7fe9cf6b
NC		 2307 unsigned int num_operands_expected;
2308 unsigned int i;
252b5132
RH		 2309
2310 /* There is an optional operand. Count the number of
2311 commas in the input line. */
2312 if (*str == '\0')
2313 opcount = 0;
2314 else
2315 {
2316 opcount = 1;
2317 s = str;
2318 while ((s = strchr (s, ',')) != (char *) NULL)
2319 {
2320 ++opcount;
2321 ++s;
2322 }
2323 }
2324
7fe9cf6b
NC		 2325 /* Compute the number of expected operands.
2326 Do not count fake operands. */
2327 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2328 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2329 ++ num_operands_expected;
2330
252b5132
RH		 2331 /* If there are fewer operands in the line then are called
2332 for by the instruction, we want to skip the optional
1f6c9eb0 2333 operands. */
7fe9cf6b 2334 if (opcount < num_operands_expected)
252b5132
RH		 2335 skip_optional = 1;
2336
2337 break;
2338 }
2339 }
2340
2341 /* Gather the operands. */
2342 need_paren = 0;
2343 next_opindex = 0;
2344 fc = 0;
2345 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2346 {
2347 const struct powerpc_operand *operand;
2348 const char *errmsg;
2349 char *hold;
2350 expressionS ex;
2351 char endc;
2352
2353 if (next_opindex == 0)
2354 operand = &powerpc_operands[*opindex_ptr];
2355 else
2356 {
2357 operand = &powerpc_operands[next_opindex];
2358 next_opindex = 0;
2359 }
252b5132
RH		 2360 errmsg = NULL;
2361
2362 /* If this is a fake operand, then we do not expect anything
2363 from the input. */
2364 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2365 {
2b3c4602 2366 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2367 if (errmsg != (const char *) NULL)
2368 as_bad (errmsg);
2369 continue;
2370 }
2371
2372 /* If this is an optional operand, and we are skipping it, just
2373 insert a zero. */
2374 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2375 && skip_optional)
2376 {
2377 if (operand->insert)
2378 {
2b3c4602 2379 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2380 if (errmsg != (const char *) NULL)
2381 as_bad (errmsg);
2382 }
2383 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2384 next_opindex = *opindex_ptr + 1;
2385 continue;
2386 }
2387
2388 /* Gather the operand. */
2389 hold = input_line_pointer;
2390 input_line_pointer = str;
2391
2392#ifdef TE_PE
81d4177b 2393 if (*input_line_pointer == '[')
252b5132
RH		 2394 {
2395 /* We are expecting something like the second argument here:
99a814a1
AM		 2396 *
2397 * lwz r4,[toc].GS.0.static_int(rtoc)
2398 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2399 * The argument following the `]' must be a symbol name, and the
2400 * register must be the toc register: 'rtoc' or '2'
2401 *
2402 * The effect is to 0 as the displacement field
2403 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2404 * the appropriate variation) reloc against it based on the symbol.
2405 * The linker will build the toc, and insert the resolved toc offset.
2406 *
2407 * Note:
2408 * o The size of the toc entry is currently assumed to be
2409 * 32 bits. This should not be assumed to be a hard coded
2410 * number.
2411 * o In an effort to cope with a change from 32 to 64 bits,
2412 * there are also toc entries that are specified to be
2413 * either 32 or 64 bits:
2414 * lwz r4,[toc32].GS.0.static_int(rtoc)
2415 * lwz r4,[toc64].GS.0.static_int(rtoc)
2416 * These demand toc entries of the specified size, and the
2417 * instruction probably requires it.
2418 */
252b5132
RH		 2419
2420 int valid_toc;
2421 enum toc_size_qualifier toc_kind;
2422 bfd_reloc_code_real_type toc_reloc;
2423
99a814a1
AM		 2424 /* Go parse off the [tocXX] part. */
2425 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2426
81d4177b 2427 if (!valid_toc)
252b5132 2428 {
99a814a1
AM		 2429 /* Note: message has already been issued.
2430 FIXME: what sort of recovery should we do?
2431 demand_rest_of_line (); return; ? */
252b5132
RH		 2432 }
2433
99a814a1
AM		 2434 /* Now get the symbol following the ']'. */
2435 expression (&ex);
252b5132
RH		 2436
2437 switch (toc_kind)
2438 {
2439 case default_toc:
99a814a1
AM		 2440 /* In this case, we may not have seen the symbol yet,
2441 since it is allowed to appear on a .extern or .globl
2442 or just be a label in the .data section. */
252b5132
RH		 2443 toc_reloc = BFD_RELOC_PPC_TOC16;
2444 break;
2445 case data_in_toc:
99a814a1
AM		 2446 /* 1. The symbol must be defined and either in the toc
2447 section, or a global.
2448 2. The reloc generated must have the TOCDEFN flag set
2449 in upper bit mess of the reloc type.
2450 FIXME: It's a little confusing what the tocv
2451 qualifier can be used for. At the very least, I've
2452 seen three uses, only one of which I'm sure I can
2453 explain. */
81d4177b
KH		 2454 if (ex.X_op == O_symbol)
2455 {
252b5132 2456 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2457 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2458 != tocdata_section)
252b5132 2459 {
99a814a1 2460 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2461 }
2462 }
2463
2464 toc_reloc = BFD_RELOC_PPC_TOC16;
2465 break;
2466 case must_be_32:
99a814a1
AM		 2467 /* FIXME: these next two specifically specify 32/64 bit
2468 toc entries. We don't support them today. Is this
2469 the right way to say that? */
252b5132
RH		 2470 toc_reloc = BFD_RELOC_UNUSED;
2471 as_bad (_("Unimplemented toc32 expression modifier"));
2472 break;
2473 case must_be_64:
99a814a1 2474 /* FIXME: see above. */
252b5132
RH		 2475 toc_reloc = BFD_RELOC_UNUSED;
2476 as_bad (_("Unimplemented toc64 expression modifier"));
2477 break;
2478 default:
bc805888 2479 fprintf (stderr,
99a814a1
AM		 2480 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2481 toc_kind);
bc805888 2482 abort ();
252b5132
RH		 2483 break;
2484 }
2485
2486 /* We need to generate a fixup for this expression. */
2487 if (fc >= MAX_INSN_FIXUPS)
2488 as_fatal (_("too many fixups"));
2489
2490 fixups[fc].reloc = toc_reloc;
2491 fixups[fc].exp = ex;
2492 fixups[fc].opindex = *opindex_ptr;
2493 ++fc;
2494
99a814a1
AM		 2495 /* Ok. We've set up the fixup for the instruction. Now make it
2496 look like the constant 0 was found here. */
252b5132
RH		 2497 ex.X_unsigned = 1;
2498 ex.X_op = O_constant;
2499 ex.X_add_number = 0;
2500 ex.X_add_symbol = NULL;
2501 ex.X_op_symbol = NULL;
2502 }
2503
2504 else
2505#endif /* TE_PE */
2506 {
2ad068be
AM		 2507 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2508 || !register_name (&ex))
252b5132 2509 {
13abbae3
AM		 2510 char save_lex = lex_type['%'];
2511
252b5132 2512 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2513 {
2514 cr_operand = TRUE;
2515 lex_type['%'] |= LEX_BEGIN_NAME;
2516 }
252b5132 2517 expression (&ex);
b34976b6 2518 cr_operand = FALSE;
13abbae3 2519 lex_type['%'] = save_lex;
252b5132
RH		 2520 }
2521 }
2522
2523 str = input_line_pointer;
2524 input_line_pointer = hold;
2525
2526 if (ex.X_op == O_illegal)
2527 as_bad (_("illegal operand"));
2528 else if (ex.X_op == O_absent)
2529 as_bad (_("missing operand"));
2530 else if (ex.X_op == O_register)
2531 {
2532 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2533 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2534 }
2535 else if (ex.X_op == O_constant)
2536 {
2537#ifdef OBJ_ELF
81d4177b 2538 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2539 char *orig_str = str;
2540
2541 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2542 switch (reloc)
2543 {
2544 default:
2545 str = orig_str;
2546 break;
2547
2548 case BFD_RELOC_LO16:
2549 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2550 something which cleared it, we always produce a
2551 signed value. */
2552 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2553 ex.X_add_number &= 0xffff;
2554 else
0baf16f2 2555 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2556 break;
2557
2558 case BFD_RELOC_HI16:
0baf16f2
AM		 2559 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2560 ex.X_add_number = PPC_HI (ex.X_add_number);
2561 else
2562 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2563 break;
2564
2565 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2566 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2567 ex.X_add_number = PPC_HA (ex.X_add_number);
2568 else
2569 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2570 break;
2571
0baf16f2
AM		 2572 case BFD_RELOC_PPC64_HIGHER:
2573 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2574 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2575 else
2576 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2577 break;
2578
2579 case BFD_RELOC_PPC64_HIGHER_S:
2580 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2581 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2582 else
2583 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2584 break;
0baf16f2
AM		 2585
2586 case BFD_RELOC_PPC64_HIGHEST:
2587 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2588 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2589 else
2590 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2591 break;
2592
2593 case BFD_RELOC_PPC64_HIGHEST_S:
2594 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2595 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2596 else
2597 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2598 break;
252b5132 2599 }
0baf16f2 2600#endif /* OBJ_ELF */
252b5132 2601 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2602 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2603 }
2604#ifdef OBJ_ELF
2605 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2606 {
cdba85ec
AM		 2607 /* Some TLS tweaks. */
2608 switch (reloc)
2609 {
2610 default:
2611 break;
2612 case BFD_RELOC_PPC_TLS:
2613 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
783de163 2614 ppc_cpu, (char *) NULL, 0);
cdba85ec
AM		 2615 break;
2616 /* We'll only use the 32 (or 64) bit form of these relocations
2617 in constants. Instructions get the 16 bit form. */
2618 case BFD_RELOC_PPC_DTPREL:
2619 reloc = BFD_RELOC_PPC_DTPREL16;
2620 break;
2621 case BFD_RELOC_PPC_TPREL:
2622 reloc = BFD_RELOC_PPC_TPREL16;
2623 break;
2624 }
2625
99a814a1
AM		 2626 /* For the absolute forms of branches, convert the PC
2627 relative form back into the absolute. */
252b5132
RH		 2628 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2629 {
2630 switch (reloc)
2631 {
2632 case BFD_RELOC_PPC_B26:
2633 reloc = BFD_RELOC_PPC_BA26;
2634 break;
2635 case BFD_RELOC_PPC_B16:
2636 reloc = BFD_RELOC_PPC_BA16;
2637 break;
2638 case BFD_RELOC_PPC_B16_BRTAKEN:
2639 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2640 break;
2641 case BFD_RELOC_PPC_B16_BRNTAKEN:
2642 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2643 break;
2644 default:
2645 break;
2646 }
2647 }
2648
2b3c4602 2649 if (ppc_obj64
adadcc0c 2650 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2651 {
2652 switch (reloc)
2653 {
2654 case BFD_RELOC_16:
2655 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2656 break;
2657 case BFD_RELOC_LO16:
2658 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2659 break;
2660 case BFD_RELOC_16_GOTOFF:
2661 reloc = BFD_RELOC_PPC64_GOT16_DS;
2662 break;
2663 case BFD_RELOC_LO16_GOTOFF:
2664 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2665 break;
2666 case BFD_RELOC_LO16_PLTOFF:
2667 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2668 break;
1cfc59d5 2669 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2670 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2671 break;
2672 case BFD_RELOC_LO16_BASEREL:
2673 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2674 break;
2675 case BFD_RELOC_PPC_TOC16:
2676 reloc = BFD_RELOC_PPC64_TOC16_DS;
2677 break;
2678 case BFD_RELOC_PPC64_TOC16_LO:
2679 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2680 break;
2681 case BFD_RELOC_PPC64_PLTGOT16:
2682 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2683 break;
2684 case BFD_RELOC_PPC64_PLTGOT16_LO:
2685 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2686 break;
cdba85ec
AM		 2687 case BFD_RELOC_PPC_DTPREL16:
2688 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2689 break;
2690 case BFD_RELOC_PPC_DTPREL16_LO:
2691 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2692 break;
2693 case BFD_RELOC_PPC_TPREL16:
2694 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2695 break;
2696 case BFD_RELOC_PPC_TPREL16_LO:
2697 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2698 break;
2699 case BFD_RELOC_PPC_GOT_DTPREL16:
2700 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2701 case BFD_RELOC_PPC_GOT_TPREL16:
2702 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2703 break;
0baf16f2
AM		 2704 default:
2705 as_bad (_("unsupported relocation for DS offset field"));
2706 break;
2707 }
2708 }
2709
252b5132
RH		 2710 /* We need to generate a fixup for this expression. */
2711 if (fc >= MAX_INSN_FIXUPS)
2712 as_fatal (_("too many fixups"));
2713 fixups[fc].exp = ex;
2714 fixups[fc].opindex = 0;
2715 fixups[fc].reloc = reloc;
2716 ++fc;
2717 }
2718#endif /* OBJ_ELF */
2719
2720 else
2721 {
2722 /* We need to generate a fixup for this expression. */
2723 if (fc >= MAX_INSN_FIXUPS)
2724 as_fatal (_("too many fixups"));
2725 fixups[fc].exp = ex;
2726 fixups[fc].opindex = *opindex_ptr;
2727 fixups[fc].reloc = BFD_RELOC_UNUSED;
2728 ++fc;
2729 }
2730
2731 if (need_paren)
2732 {
2733 endc = ')';
2734 need_paren = 0;
c3d65c1c
BE		 2735 /* If expecting more operands, then we want to see "),". */
2736 if (*str == endc && opindex_ptr[1] != 0)
2737 {
2738 do
2739 ++str;
2740 while (ISSPACE (*str));
2741 endc = ',';
2742 }
252b5132
RH		 2743 }
2744 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2745 {
2746 endc = '(';
2747 need_paren = 1;
2748 }
2749 else
2750 endc = ',';
2751
2752 /* The call to expression should have advanced str past any
2753 whitespace. */
2754 if (*str != endc
2755 && (endc != ',' || *str != '\0'))
2756 {
2757 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2758 break;
2759 }
2760
2761 if (*str != '\0')
2762 ++str;
2763 }
2764
3882b010 2765 while (ISSPACE (*str))
252b5132
RH		 2766 ++str;
2767
2768 if (*str != '\0')
2769 as_bad (_("junk at end of line: `%s'"), str);
2770
dc1d03fc 2771#ifdef OBJ_ELF
6a0c61b7
EZ		 2772 /* Do we need/want a APUinfo section? */
2773 if (ppc_cpu & (PPC_OPCODE_SPE
2774 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2775 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2776 | PPC_OPCODE_RFMCI))
2777 {
2778 /* These are all version "1". */
2779 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2780 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2781 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2782 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2783 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2784 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2785 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2786 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2787 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2788 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2789 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2790 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2791 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2792 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2793 }
dc1d03fc 2794#endif
6a0c61b7 2795
252b5132
RH		 2796 /* Write out the instruction. */
2797 f = frag_more (4);
09b935ac
AM		 2798 addr_mod = frag_now_fix () & 3;
2799 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2800 as_bad (_("instruction address is not a multiple of 4"));
2801 frag_now->insn_addr = addr_mod;
2802 frag_now->has_code = 1;
252b5132
RH		 2803 md_number_to_chars (f, insn, 4);
2804
5d6f4f16
GK		 2805#ifdef OBJ_ELF
2806 dwarf2_emit_insn (4);
2807#endif
2808
252b5132
RH		 2809 /* Create any fixups. At this point we do not use a
2810 bfd_reloc_code_real_type, but instead just use the
2811 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2812 handle fixups for any operand type, although that is admittedly
2813 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2814 md_apply_fix. */
252b5132
RH		 2815 for (i = 0; i < fc; i++)
2816 {
2817 const struct powerpc_operand *operand;
2818
2819 operand = &powerpc_operands[fixups[i].opindex];
2820 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2821 {
99a814a1 2822 reloc_howto_type *reloc_howto;
252b5132
RH		 2823 int size;
2824 int offset;
2825 fixS *fixP;
2826
99a814a1 2827 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2828 if (!reloc_howto)
2829 abort ();
2830
2831 size = bfd_get_reloc_size (reloc_howto);
2832 offset = target_big_endian ? (4 - size) : 0;
2833
2834 if (size < 1 || size > 4)
bc805888 2835 abort ();
252b5132 2836
99a814a1
AM		 2837 fixP = fix_new_exp (frag_now,
2838 f - frag_now->fr_literal + offset,
2839 size,
2840 &fixups[i].exp,
2841 reloc_howto->pc_relative,
252b5132
RH		 2842 fixups[i].reloc);
2843
2844 /* Turn off complaints that the addend is too large for things like
2845 foo+100000@ha. */
2846 switch (fixups[i].reloc)
2847 {
2848 case BFD_RELOC_16_GOTOFF:
2849 case BFD_RELOC_PPC_TOC16:
2850 case BFD_RELOC_LO16:
2851 case BFD_RELOC_HI16:
2852 case BFD_RELOC_HI16_S:
0baf16f2 2853#ifdef OBJ_ELF
0baf16f2
AM		 2854 case BFD_RELOC_PPC64_HIGHER:
2855 case BFD_RELOC_PPC64_HIGHER_S:
2856 case BFD_RELOC_PPC64_HIGHEST:
2857 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2858#endif
252b5132
RH		 2859 fixP->fx_no_overflow = 1;
2860 break;
2861 default:
2862 break;
2863 }
2864 }
2865 else
99a814a1
AM		 2866 fix_new_exp (frag_now,
2867 f - frag_now->fr_literal,
2868 4,
252b5132
RH		 2869 &fixups[i].exp,
2870 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2871 ((bfd_reloc_code_real_type)
99a814a1 2872 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2873 }
2874}
2875
2876/* Handle a macro. Gather all the operands, transform them as
2877 described by the macro, and call md_assemble recursively. All the
2878 operands are separated by commas; we don't accept parentheses
2879 around operands here. */
2880
2881static void
98027b10 2882ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2883{
2884 char *operands[10];
2885 unsigned int count;
2886 char *s;
2887 unsigned int len;
2888 const char *format;
db557034 2889 unsigned int arg;
252b5132
RH		 2890 char *send;
2891 char *complete;
2892
2893 /* Gather the users operands into the operands array. */
2894 count = 0;
2895 s = str;
2896 while (1)
2897 {
2898 if (count >= sizeof operands / sizeof operands[0])
2899 break;
2900 operands[count++] = s;
2901 s = strchr (s, ',');
2902 if (s == (char *) NULL)
2903 break;
2904 *s++ = '\0';
81d4177b 2905 }
252b5132
RH		 2906
2907 if (count != macro->operands)
2908 {
2909 as_bad (_("wrong number of operands"));
2910 return;
2911 }
2912
2913 /* Work out how large the string must be (the size is unbounded
2914 because it includes user input). */
2915 len = 0;
2916 format = macro->format;
2917 while (*format != '\0')
2918 {
2919 if (*format != '%')
2920 {
2921 ++len;
2922 ++format;
2923 }
2924 else
2925 {
2926 arg = strtol (format + 1, &send, 10);
db557034 2927 know (send != format && arg < count);
252b5132
RH		 2928 len += strlen (operands[arg]);
2929 format = send;
2930 }
2931 }
2932
2933 /* Put the string together. */
2934 complete = s = (char *) alloca (len + 1);
2935 format = macro->format;
2936 while (*format != '\0')
2937 {
2938 if (*format != '%')
2939 *s++ = *format++;
2940 else
2941 {
2942 arg = strtol (format + 1, &send, 10);
2943 strcpy (s, operands[arg]);
2944 s += strlen (s);
2945 format = send;
2946 }
2947 }
2948 *s = '\0';
2949
2950 /* Assemble the constructed instruction. */
2951 md_assemble (complete);
81d4177b 2952}
252b5132
RH		 2953\f
2954#ifdef OBJ_ELF
99a814a1 2955/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2956
2957int
98027b10 2958ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2959{
2960 if (letter == 'e')
2961 return SHF_EXCLUDE;
2962
13ae64f3 2963 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2964 return -1;
252b5132
RH		 2965}
2966
2967int
98027b10 2968ppc_section_word (char *str, size_t len)
252b5132 2969{
9de8d8f1
RH		 2970 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2971 return SHF_EXCLUDE;
252b5132 2972
9de8d8f1 2973 return -1;
252b5132
RH		 2974}
2975
2976int
98027b10 2977ppc_section_type (char *str, size_t len)
252b5132 2978{
9de8d8f1
RH		 2979 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2980 return SHT_ORDERED;
252b5132 2981
9de8d8f1 2982 return -1;
252b5132
RH		 2983}
2984
2985int
98027b10 2986ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2987{
2988 if (type == SHT_ORDERED)
2989 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2990
2991 if (attr & SHF_EXCLUDE)
2992 flags |= SEC_EXCLUDE;
2993
2994 return flags;
2995}
2996#endif /* OBJ_ELF */
2997
2998\f
2999/* Pseudo-op handling. */
3000
3001/* The .byte pseudo-op. This is similar to the normal .byte
3002 pseudo-op, but it can also take a single ASCII string. */
3003
3004static void
98027b10 3005ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3006{
3007 if (*input_line_pointer != '\"')
3008 {
3009 cons (1);
3010 return;
3011 }
3012
3013 /* Gather characters. A real double quote is doubled. Unusual
3014 characters are not permitted. */
3015 ++input_line_pointer;
3016 while (1)
3017 {
3018 char c;
3019
3020 c = *input_line_pointer++;
3021
3022 if (c == '\"')
3023 {
3024 if (*input_line_pointer != '\"')
3025 break;
3026 ++input_line_pointer;
3027 }
3028
3029 FRAG_APPEND_1_CHAR (c);
3030 }
3031
3032 demand_empty_rest_of_line ();
3033}
3034\f
3035#ifdef OBJ_XCOFF
3036
3037/* XCOFF specific pseudo-op handling. */
3038
3039/* This is set if we are creating a .stabx symbol, since we don't want
3040 to handle symbol suffixes for such symbols. */
b34976b6 3041static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3042
3043/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3044 symbols in the .bss segment as though they were local common
67c1ffbe 3045 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3046 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3047
3048static void
98027b10 3049ppc_comm (int lcomm)
252b5132
RH		 3050{
3051 asection *current_seg = now_seg;
3052 subsegT current_subseg = now_subseg;
3053 char *name;
3054 char endc;
3055 char *end_name;
3056 offsetT size;
3057 offsetT align;
3058 symbolS *lcomm_sym = NULL;
3059 symbolS *sym;
3060 char *pfrag;
3061
3062 name = input_line_pointer;
3063 endc = get_symbol_end ();
3064 end_name = input_line_pointer;
3065 *end_name = endc;
3066
3067 if (*input_line_pointer != ',')
3068 {
3069 as_bad (_("missing size"));
3070 ignore_rest_of_line ();
3071 return;
3072 }
3073 ++input_line_pointer;
3074
3075 size = get_absolute_expression ();
3076 if (size < 0)
3077 {
3078 as_bad (_("negative size"));
3079 ignore_rest_of_line ();
3080 return;
3081 }
3082
3083 if (! lcomm)
3084 {
3085 /* The third argument to .comm is the alignment. */
3086 if (*input_line_pointer != ',')
1ad63b2f 3087 align = 2;
252b5132
RH		 3088 else
3089 {
3090 ++input_line_pointer;
3091 align = get_absolute_expression ();
3092 if (align <= 0)
3093 {
3094 as_warn (_("ignoring bad alignment"));
1ad63b2f 3095 align = 2;
252b5132
RH		 3096 }
3097 }
3098 }
3099 else
3100 {
3101 char *lcomm_name;
3102 char lcomm_endc;
3103
1ad63b2f 3104 if (size <= 4)
252b5132
RH		 3105 align = 2;
3106 else
3107 align = 3;
3108
3109 /* The third argument to .lcomm appears to be the real local
3110 common symbol to create. References to the symbol named in
3111 the first argument are turned into references to the third
3112 argument. */
3113 if (*input_line_pointer != ',')
3114 {
3115 as_bad (_("missing real symbol name"));
3116 ignore_rest_of_line ();
3117 return;
3118 }
3119 ++input_line_pointer;
3120
3121 lcomm_name = input_line_pointer;
3122 lcomm_endc = get_symbol_end ();
81d4177b 3123
252b5132
RH		 3124 lcomm_sym = symbol_find_or_make (lcomm_name);
3125
3126 *input_line_pointer = lcomm_endc;
3127 }
3128
3129 *end_name = '\0';
3130 sym = symbol_find_or_make (name);
3131 *end_name = endc;
3132
3133 if (S_IS_DEFINED (sym)
3134 || S_GET_VALUE (sym) != 0)
3135 {
3136 as_bad (_("attempt to redefine symbol"));
3137 ignore_rest_of_line ();
3138 return;
3139 }
81d4177b 3140
252b5132 3141 record_alignment (bss_section, align);
81d4177b 3142
252b5132
RH		 3143 if (! lcomm
3144 || ! S_IS_DEFINED (lcomm_sym))
3145 {
3146 symbolS *def_sym;
3147 offsetT def_size;
3148
3149 if (! lcomm)
3150 {
3151 def_sym = sym;
3152 def_size = size;
3153 S_SET_EXTERNAL (sym);
3154 }
3155 else
3156 {
809ffe0d 3157 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3158 def_sym = lcomm_sym;
3159 def_size = 0;
3160 }
3161
3162 subseg_set (bss_section, 1);
3163 frag_align (align, 0, 0);
81d4177b 3164
809ffe0d 3165 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3166 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3167 def_size, (char *) NULL);
3168 *pfrag = 0;
3169 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3170 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3171 }
3172 else if (lcomm)
3173 {
3174 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3175 symbol_get_frag (lcomm_sym)->fr_offset =
3176 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3177 &~ ((1 << align) - 1));
809ffe0d
ILT		 3178 if (align > symbol_get_tc (lcomm_sym)->align)
3179 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3180 }
3181
3182 if (lcomm)
3183 {
3184 /* Make sym an offset from lcomm_sym. */
3185 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3186 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3187 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3188 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3189 }
3190
3191 subseg_set (current_seg, current_subseg);
3192
3193 demand_empty_rest_of_line ();
3194}
3195
3196/* The .csect pseudo-op. This switches us into a different
3197 subsegment. The first argument is a symbol whose value is the
3198 start of the .csect. In COFF, csect symbols get special aux
3199 entries defined by the x_csect field of union internal_auxent. The
3200 optional second argument is the alignment (the default is 2). */
3201
3202static void
98027b10 3203ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3204{
3205 char *name;
3206 char endc;
3207 symbolS *sym;
931e13a6 3208 offsetT align;
252b5132
RH		 3209
3210 name = input_line_pointer;
3211 endc = get_symbol_end ();
81d4177b 3212
252b5132
RH		 3213 sym = symbol_find_or_make (name);
3214
3215 *input_line_pointer = endc;
3216
3217 if (S_GET_NAME (sym)[0] == '\0')
3218 {
3219 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3220 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3221 }
3222
931e13a6 3223 align = 2;
252b5132
RH		 3224 if (*input_line_pointer == ',')
3225 {
3226 ++input_line_pointer;
931e13a6 3227 align = get_absolute_expression ();
252b5132
RH		 3228 }
3229
931e13a6
AM		 3230 ppc_change_csect (sym, align);
3231
252b5132
RH		 3232 demand_empty_rest_of_line ();
3233}
3234
3235/* Change to a different csect. */
3236
3237static void
98027b10 3238ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3239{
3240 if (S_IS_DEFINED (sym))
809ffe0d 3241 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3242 else
3243 {
3244 symbolS **list_ptr;
3245 int after_toc;
3246 int hold_chunksize;
3247 symbolS *list;
931e13a6
AM		 3248 int is_code;
3249 segT sec;
252b5132
RH		 3250
3251 /* This is a new csect. We need to look at the symbol class to
3252 figure out whether it should go in the text section or the
3253 data section. */
3254 after_toc = 0;
931e13a6 3255 is_code = 0;
809ffe0d 3256 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3257 {
3258 case XMC_PR:
3259 case XMC_RO:
3260 case XMC_DB:
3261 case XMC_GL:
3262 case XMC_XO:
3263 case XMC_SV:
3264 case XMC_TI:
3265 case XMC_TB:
3266 S_SET_SEGMENT (sym, text_section);
809ffe0d 3267 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3268 ++ppc_text_subsegment;
3269 list_ptr = &ppc_text_csects;
931e13a6 3270 is_code = 1;
252b5132
RH		 3271 break;
3272 case XMC_RW:
3273 case XMC_TC0:
3274 case XMC_TC:
3275 case XMC_DS:
3276 case XMC_UA:
3277 case XMC_BS:
3278 case XMC_UC:
3279 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3280 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3281 == ppc_data_subsegment))
252b5132
RH		 3282 after_toc = 1;
3283 S_SET_SEGMENT (sym, data_section);
809ffe0d 3284 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3285 ++ppc_data_subsegment;
3286 list_ptr = &ppc_data_csects;
3287 break;
3288 default:
3289 abort ();
3290 }
3291
3292 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3293 changing subsegments, so that we don't use a lot of memory
3294 space for what may be a small section. */
252b5132
RH		 3295 hold_chunksize = chunksize;
3296 chunksize = 64;
3297
931e13a6
AM		 3298 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3299 symbol_get_tc (sym)->subseg);
252b5132
RH		 3300
3301 chunksize = hold_chunksize;
3302
3303 if (after_toc)
3304 ppc_after_toc_frag = frag_now;
3305
931e13a6
AM		 3306 record_alignment (sec, align);
3307 if (is_code)
3308 frag_align_code (align, 0);
3309 else
3310 frag_align (align, 0, 0);
3311
809ffe0d 3312 symbol_set_frag (sym, frag_now);
252b5132
RH		 3313 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3314
931e13a6 3315 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3316 symbol_get_tc (sym)->output = 1;
3317 symbol_get_tc (sym)->within = sym;
81d4177b 3318
252b5132 3319 for (list = *list_ptr;
809ffe0d
ILT		 3320 symbol_get_tc (list)->next != (symbolS *) NULL;
3321 list = symbol_get_tc (list)->next)
252b5132 3322 ;
809ffe0d 3323 symbol_get_tc (list)->next = sym;
81d4177b 3324
252b5132 3325 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3326 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3327 &symbol_lastP);
252b5132
RH		 3328 }
3329
3330 ppc_current_csect = sym;
3331}
3332
3333/* This function handles the .text and .data pseudo-ops. These
3334 pseudo-ops aren't really used by XCOFF; we implement them for the
3335 convenience of people who aren't used to XCOFF. */
3336
3337static void
98027b10 3338ppc_section (int type)
252b5132
RH		 3339{
3340 const char *name;
3341 symbolS *sym;
3342
3343 if (type == 't')
3344 name = ".text[PR]";
3345 else if (type == 'd')
3346 name = ".data[RW]";
3347 else
3348 abort ();
3349
3350 sym = symbol_find_or_make (name);
3351
931e13a6 3352 ppc_change_csect (sym, 2);
252b5132
RH		 3353
3354 demand_empty_rest_of_line ();
3355}
3356
3357/* This function handles the .section pseudo-op. This is mostly to
3358 give an error, since XCOFF only supports .text, .data and .bss, but
3359 we do permit the user to name the text or data section. */
3360
3361static void
98027b10 3362ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3363{
3364 char *user_name;
3365 const char *real_name;
3366 char c;
3367 symbolS *sym;
3368
3369 user_name = input_line_pointer;
3370 c = get_symbol_end ();
3371
3372 if (strcmp (user_name, ".text") == 0)
3373 real_name = ".text[PR]";
3374 else if (strcmp (user_name, ".data") == 0)
3375 real_name = ".data[RW]";
3376 else
3377 {
3378 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3379 *input_line_pointer = c;
3380 ignore_rest_of_line ();
3381 return;
3382 }
3383
3384 *input_line_pointer = c;
3385
3386 sym = symbol_find_or_make (real_name);
3387
931e13a6 3388 ppc_change_csect (sym, 2);
252b5132
RH		 3389
3390 demand_empty_rest_of_line ();
3391}
3392
3393/* The .extern pseudo-op. We create an undefined symbol. */
3394
3395static void
98027b10 3396ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3397{
3398 char *name;
3399 char endc;
3400
3401 name = input_line_pointer;
3402 endc = get_symbol_end ();
3403
3404 (void) symbol_find_or_make (name);
3405
3406 *input_line_pointer = endc;
3407
3408 demand_empty_rest_of_line ();
3409}
3410
3411/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3412
3413static void
98027b10 3414ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3415{
3416 char *name;
3417 char endc;
3418 symbolS *sym;
3419
3420 name = input_line_pointer;
3421 endc = get_symbol_end ();
3422
3423 sym = symbol_find_or_make (name);
3424
3425 *input_line_pointer = endc;
3426
809ffe0d 3427 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3428
3429 demand_empty_rest_of_line ();
3430}
3431
3432/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3433 although I don't know why it bothers. */
3434
3435static void
98027b10 3436ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3437{
3438 char *name;
3439 char endc;
3440 symbolS *sym;
3441 int len;
3442
3443 name = input_line_pointer;
3444 endc = get_symbol_end ();
3445
3446 sym = symbol_find_or_make (name);
3447
3448 *input_line_pointer = endc;
3449
3450 if (*input_line_pointer != ',')
3451 {
3452 as_bad (_("missing rename string"));
3453 ignore_rest_of_line ();
3454 return;
3455 }
3456 ++input_line_pointer;
3457
809ffe0d 3458 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3459
3460 demand_empty_rest_of_line ();
3461}
3462
3463/* The .stabx pseudo-op. This is similar to a normal .stabs
3464 pseudo-op, but slightly different. A sample is
3465 .stabx "main:F-1",.main,142,0
3466 The first argument is the symbol name to create. The second is the
3467 value, and the third is the storage class. The fourth seems to be
3468 always zero, and I am assuming it is the type. */
3469
3470static void
98027b10 3471ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3472{
3473 char *name;
3474 int len;
3475 symbolS *sym;
3476 expressionS exp;
3477
3478 name = demand_copy_C_string (&len);
3479
3480 if (*input_line_pointer != ',')
3481 {
3482 as_bad (_("missing value"));
3483 return;
3484 }
3485 ++input_line_pointer;
3486
b34976b6 3487 ppc_stab_symbol = TRUE;
252b5132 3488 sym = symbol_make (name);
b34976b6 3489 ppc_stab_symbol = FALSE;
252b5132 3490
809ffe0d 3491 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3492
3493 (void) expression (&exp);
3494
3495 switch (exp.X_op)
3496 {
3497 case O_illegal:
3498 case O_absent:
3499 case O_big:
3500 as_bad (_("illegal .stabx expression; zero assumed"));
3501 exp.X_add_number = 0;
3502 /* Fall through. */
3503 case O_constant:
3504 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3505 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3506 break;
3507
3508 case O_symbol:
3509 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3510 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3511 else
3512 {
3513 S_SET_VALUE (sym,
3514 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3515 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3516 }
3517 break;
3518
3519 default:
3520 /* The value is some complex expression. This will probably
99a814a1
AM		 3521 fail at some later point, but this is probably the right
3522 thing to do here. */
809ffe0d 3523 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3524 break;
3525 }
3526
3527 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3528 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3529
3530 if (*input_line_pointer != ',')
3531 {
3532 as_bad (_("missing class"));
3533 return;
3534 }
3535 ++input_line_pointer;
3536
3537 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3538
3539 if (*input_line_pointer != ',')
3540 {
3541 as_bad (_("missing type"));
3542 return;
3543 }
3544 ++input_line_pointer;
3545
3546 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3547
809ffe0d 3548 symbol_get_tc (sym)->output = 1;
252b5132 3549
6877bb43 3550 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3551
809ffe0d 3552 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3553
41ea10b1 3554 /* In this case :
99a814a1 3555
41ea10b1
TR		 3556 .bs name
3557 .stabx "z",arrays_,133,0
3558 .es
99a814a1 3559
41ea10b1 3560 .comm arrays_,13768,3
99a814a1 3561
41ea10b1
TR		 3562 resolve_symbol_value will copy the exp's "within" into sym's when the
3563 offset is 0. Since this seems to be corner case problem,
3564 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3565 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3566
3567 if (exp.X_op == O_symbol)
41ea10b1
TR		 3568 {
3569 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3570 }
6877bb43 3571 }
99a814a1 3572
252b5132
RH		 3573 if (exp.X_op != O_symbol
3574 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3575 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3576 ppc_frob_label (sym);
3577 else
3578 {
3579 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3580 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3581 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3582 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3583 }
3584
3585 demand_empty_rest_of_line ();
3586}
3587
3588/* The .function pseudo-op. This takes several arguments. The first
3589 argument seems to be the external name of the symbol. The second
67c1ffbe 3590 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3591 uses the same name for both. I have no idea what the third and
3592 fourth arguments are meant to be. The optional fifth argument is
3593 an expression for the size of the function. In COFF this symbol
3594 gets an aux entry like that used for a csect. */
3595
3596static void
98027b10 3597ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3598{
3599 char *name;
3600 char endc;
3601 char *s;
3602 symbolS *ext_sym;
3603 symbolS *lab_sym;
3604
3605 name = input_line_pointer;
3606 endc = get_symbol_end ();
3607
3608 /* Ignore any [PR] suffix. */
3609 name = ppc_canonicalize_symbol_name (name);
3610 s = strchr (name, '[');
3611 if (s != (char *) NULL
3612 && strcmp (s + 1, "PR]") == 0)
3613 *s = '\0';
3614
3615 ext_sym = symbol_find_or_make (name);
3616
3617 *input_line_pointer = endc;
3618
3619 if (*input_line_pointer != ',')
3620 {
3621 as_bad (_("missing symbol name"));
3622 ignore_rest_of_line ();
3623 return;
3624 }
3625 ++input_line_pointer;
3626
3627 name = input_line_pointer;
3628 endc = get_symbol_end ();
3629
3630 lab_sym = symbol_find_or_make (name);
3631
3632 *input_line_pointer = endc;
3633
3634 if (ext_sym != lab_sym)
3635 {
809ffe0d
ILT		 3636 expressionS exp;
3637
3638 exp.X_op = O_symbol;
3639 exp.X_add_symbol = lab_sym;
3640 exp.X_op_symbol = NULL;
3641 exp.X_add_number = 0;
3642 exp.X_unsigned = 0;
3643 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3644 }
3645
809ffe0d
ILT		 3646 if (symbol_get_tc (ext_sym)->class == -1)
3647 symbol_get_tc (ext_sym)->class = XMC_PR;
3648 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3649
3650 if (*input_line_pointer == ',')
3651 {
3652 expressionS ignore;
3653
3654 /* Ignore the third argument. */
3655 ++input_line_pointer;
3656 expression (&ignore);
3657 if (*input_line_pointer == ',')
3658 {
3659 /* Ignore the fourth argument. */
3660 ++input_line_pointer;
3661 expression (&ignore);
3662 if (*input_line_pointer == ',')
3663 {
3664 /* The fifth argument is the function size. */
3665 ++input_line_pointer;
809ffe0d
ILT		 3666 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3667 absolute_section,
3668 (valueT) 0,
3669 &zero_address_frag);
3670 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3671 }
3672 }
3673 }
3674
3675 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3676 SF_SET_FUNCTION (ext_sym);
3677 SF_SET_PROCESS (ext_sym);
3678 coff_add_linesym (ext_sym);
3679
3680 demand_empty_rest_of_line ();
3681}
3682
3683/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3684 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3685 with the correct line number */
5d6255fe 3686
8642cce8 3687static symbolS *saved_bi_sym = 0;
252b5132
RH		 3688
3689static void
98027b10 3690ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3691{
3692 symbolS *sym;
3693
3694 sym = symbol_make (".bf");
3695 S_SET_SEGMENT (sym, text_section);
809ffe0d 3696 symbol_set_frag (sym, frag_now);
252b5132
RH		 3697 S_SET_VALUE (sym, frag_now_fix ());
3698 S_SET_STORAGE_CLASS (sym, C_FCN);
3699
3700 coff_line_base = get_absolute_expression ();
3701
3702 S_SET_NUMBER_AUXILIARY (sym, 1);
3703 SA_SET_SYM_LNNO (sym, coff_line_base);
3704
8642cce8 3705 /* Line number for bi. */
5d6255fe 3706 if (saved_bi_sym)
8642cce8
TR		 3707 {
3708 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3709 saved_bi_sym = 0;
3710 }
5d6255fe 3711
8642cce8 3712
809ffe0d 3713 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3714
3715 ppc_frob_label (sym);
3716
3717 demand_empty_rest_of_line ();
3718}
3719
3720/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3721 ".ef", except that the line number is absolute, not relative to the
3722 most recent ".bf" symbol. */
3723
3724static void
98027b10 3725ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3726{
3727 symbolS *sym;
3728
3729 sym = symbol_make (".ef");
3730 S_SET_SEGMENT (sym, text_section);
809ffe0d 3731 symbol_set_frag (sym, frag_now);
252b5132
RH		 3732 S_SET_VALUE (sym, frag_now_fix ());
3733 S_SET_STORAGE_CLASS (sym, C_FCN);
3734 S_SET_NUMBER_AUXILIARY (sym, 1);
3735 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3736 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3737
3738 ppc_frob_label (sym);
3739
3740 demand_empty_rest_of_line ();
3741}
3742
3743/* The .bi and .ei pseudo-ops. These take a string argument and
3744 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3745 the symbol list. The value of .bi will be know when the next .bf
3746 is encountered. */
252b5132
RH		 3747
3748static void
98027b10 3749ppc_biei (int ei)
252b5132
RH		 3750{
3751 static symbolS *last_biei;
3752
3753 char *name;
3754 int len;
3755 symbolS *sym;
3756 symbolS *look;
3757
3758 name = demand_copy_C_string (&len);
3759
3760 /* The value of these symbols is actually file offset. Here we set
3761 the value to the index into the line number entries. In
3762 ppc_frob_symbols we set the fix_line field, which will cause BFD
3763 to do the right thing. */
3764
3765 sym = symbol_make (name);
3766 /* obj-coff.c currently only handles line numbers correctly in the
3767 .text section. */
3768 S_SET_SEGMENT (sym, text_section);
3769 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3770 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3771
3772 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3773 symbol_get_tc (sym)->output = 1;
81d4177b 3774
8642cce8 3775 /* Save bi. */
5d6255fe 3776 if (ei)
8642cce8
TR		 3777 saved_bi_sym = 0;
3778 else
3779 saved_bi_sym = sym;
3780
252b5132
RH		 3781 for (look = last_biei ? last_biei : symbol_rootP;
3782 (look != (symbolS *) NULL
3783 && (S_GET_STORAGE_CLASS (look) == C_FILE
3784 || S_GET_STORAGE_CLASS (look) == C_BINCL
3785 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3786 look = symbol_next (look))
3787 ;
3788 if (look != (symbolS *) NULL)
3789 {
3790 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3791 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3792 last_biei = sym;
3793 }
3794
3795 demand_empty_rest_of_line ();
3796}
3797
3798/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3799 There is one argument, which is a csect symbol. The value of the
3800 .bs symbol is the index of this csect symbol. */
3801
3802static void
98027b10 3803ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3804{
3805 char *name;
3806 char endc;
3807 symbolS *csect;
3808 symbolS *sym;
3809
3810 if (ppc_current_block != NULL)
3811 as_bad (_("nested .bs blocks"));
3812
3813 name = input_line_pointer;
3814 endc = get_symbol_end ();
3815
3816 csect = symbol_find_or_make (name);
3817
3818 *input_line_pointer = endc;
3819
3820 sym = symbol_make (".bs");
3821 S_SET_SEGMENT (sym, now_seg);
3822 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3823 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3824 symbol_get_tc (sym)->output = 1;
252b5132 3825
809ffe0d 3826 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3827
3828 ppc_frob_label (sym);
3829
3830 ppc_current_block = sym;
3831
3832 demand_empty_rest_of_line ();
3833}
3834
3835/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3836
3837static void
98027b10 3838ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3839{
3840 symbolS *sym;
3841
3842 if (ppc_current_block == NULL)
3843 as_bad (_(".es without preceding .bs"));
3844
3845 sym = symbol_make (".es");
3846 S_SET_SEGMENT (sym, now_seg);
3847 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3848 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3849 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3850
3851 ppc_frob_label (sym);
3852
3853 ppc_current_block = NULL;
3854
3855 demand_empty_rest_of_line ();
3856}
3857
3858/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3859 line number. */
3860
3861static void
98027b10 3862ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3863{
3864 symbolS *sym;
3865
3866 sym = symbol_make (".bb");
3867 S_SET_SEGMENT (sym, text_section);
809ffe0d 3868 symbol_set_frag (sym, frag_now);
252b5132
RH		 3869 S_SET_VALUE (sym, frag_now_fix ());
3870 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3871
3872 S_SET_NUMBER_AUXILIARY (sym, 1);
3873 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3874
809ffe0d 3875 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3876
3877 SF_SET_PROCESS (sym);
3878
3879 ppc_frob_label (sym);
3880
3881 demand_empty_rest_of_line ();
3882}
3883
3884/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3885 line number. */
3886
3887static void
98027b10 3888ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3889{
3890 symbolS *sym;
3891
3892 sym = symbol_make (".eb");
3893 S_SET_SEGMENT (sym, text_section);
809ffe0d 3894 symbol_set_frag (sym, frag_now);
252b5132
RH		 3895 S_SET_VALUE (sym, frag_now_fix ());
3896 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3897 S_SET_NUMBER_AUXILIARY (sym, 1);
3898 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3899 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3900
3901 SF_SET_PROCESS (sym);
3902
3903 ppc_frob_label (sym);
3904
3905 demand_empty_rest_of_line ();
3906}
3907
3908/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3909 specified name. */
3910
3911static void
98027b10 3912ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3913{
3914 char *name;
3915 int len;
3916 symbolS *sym;
3917
3918 name = demand_copy_C_string (&len);
3919 sym = symbol_make (name);
3920 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3921 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3922 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3923 S_SET_VALUE (sym, 0);
809ffe0d 3924 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3925
3926 ppc_frob_label (sym);
3927
3928 demand_empty_rest_of_line ();
3929}
3930
3931/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3932
3933static void
98027b10 3934ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3935{
3936 symbolS *sym;
3937
3938 sym = symbol_make (".ec");
3939 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3940 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3941 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3942 S_SET_VALUE (sym, 0);
809ffe0d 3943 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3944
3945 ppc_frob_label (sym);
3946
3947 demand_empty_rest_of_line ();
3948}
3949
3950/* The .toc pseudo-op. Switch to the .toc subsegment. */
3951
3952static void
98027b10 3953ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3954{
3955 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3956 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3957 else
3958 {
3959 subsegT subseg;
3960 symbolS *sym;
3961 symbolS *list;
81d4177b 3962
252b5132
RH		 3963 subseg = ppc_data_subsegment;
3964 ++ppc_data_subsegment;
3965
3966 subseg_new (segment_name (data_section), subseg);
3967 ppc_toc_frag = frag_now;
3968
3969 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3970 symbol_set_frag (sym, frag_now);
252b5132
RH		 3971 S_SET_SEGMENT (sym, data_section);
3972 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3973 symbol_get_tc (sym)->subseg = subseg;
3974 symbol_get_tc (sym)->output = 1;
3975 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3976
3977 ppc_toc_csect = sym;
81d4177b 3978
252b5132 3979 for (list = ppc_data_csects;
809ffe0d
ILT		 3980 symbol_get_tc (list)->next != (symbolS *) NULL;
3981 list = symbol_get_tc (list)->next)
252b5132 3982 ;
809ffe0d 3983 symbol_get_tc (list)->next = sym;
252b5132
RH		 3984
3985 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3986 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3987 &symbol_lastP);
252b5132
RH		 3988 }
3989
3990 ppc_current_csect = ppc_toc_csect;
3991
3992 demand_empty_rest_of_line ();
3993}
3994
3995/* The AIX assembler automatically aligns the operands of a .long or
3996 .short pseudo-op, and we want to be compatible. */
3997
3998static void
98027b10 3999ppc_xcoff_cons (int log_size)
252b5132
RH		 4000{
4001 frag_align (log_size, 0, 0);
4002 record_alignment (now_seg, log_size);
4003 cons (1 << log_size);
4004}
4005
4006static void
98027b10 4007ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4008{
4009 expressionS exp;
4010 int byte_count;
4011
4012 (void) expression (&exp);
4013
4014 if (exp.X_op != O_constant)
4015 {
4016 as_bad (_("non-constant byte count"));
4017 return;
4018 }
4019
4020 byte_count = exp.X_add_number;
4021
4022 if (*input_line_pointer != ',')
4023 {
4024 as_bad (_("missing value"));
4025 return;
4026 }
4027
4028 ++input_line_pointer;
4029 cons (byte_count);
4030}
4031
4032#endif /* OBJ_XCOFF */
0baf16f2 4033#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4034\f
4035/* The .tc pseudo-op. This is used when generating either XCOFF or
4036 ELF. This takes two or more arguments.
4037
4038 When generating XCOFF output, the first argument is the name to
4039 give to this location in the toc; this will be a symbol with class
0baf16f2 4040 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4041 this location in the TOC; often there is just one more argument, a
1049f94e 4042 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4043 depends on target word size. A 32-bit target uses 4-byte values, a
4044 64-bit target uses 8-byte values.
252b5132
RH		 4045
4046 When not generating XCOFF output, the arguments are the same, but
4047 the first argument is simply ignored. */
4048
4049static void
98027b10 4050ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4051{
4052#ifdef OBJ_XCOFF
4053
4054 /* Define the TOC symbol name. */
4055 {
4056 char *name;
4057 char endc;
4058 symbolS *sym;
4059
4060 if (ppc_toc_csect == (symbolS *) NULL
4061 || ppc_toc_csect != ppc_current_csect)
4062 {
4063 as_bad (_(".tc not in .toc section"));
4064 ignore_rest_of_line ();
4065 return;
4066 }
4067
4068 name = input_line_pointer;
4069 endc = get_symbol_end ();
4070
4071 sym = symbol_find_or_make (name);
4072
4073 *input_line_pointer = endc;
4074
4075 if (S_IS_DEFINED (sym))
4076 {
4077 symbolS *label;
4078
809ffe0d
ILT		 4079 label = symbol_get_tc (ppc_current_csect)->within;
4080 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4081 {
4082 as_bad (_(".tc with no label"));
4083 ignore_rest_of_line ();
4084 return;
4085 }
4086
4087 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4088 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4089 S_SET_VALUE (label, S_GET_VALUE (sym));
4090
4091 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4092 ++input_line_pointer;
4093
4094 return;
4095 }
4096
4097 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4098 symbol_set_frag (sym, frag_now);
252b5132 4099 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4100 symbol_get_tc (sym)->class = XMC_TC;
4101 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4102
4103 ppc_frob_label (sym);
4104 }
4105
0baf16f2
AM		 4106#endif /* OBJ_XCOFF */
4107#ifdef OBJ_ELF
9c7977b3 4108 int align;
252b5132
RH		 4109
4110 /* Skip the TOC symbol name. */
4111 while (is_part_of_name (*input_line_pointer)
d13d4015 4112 || *input_line_pointer == ' '
252b5132
RH		 4113 || *input_line_pointer == '['
4114 || *input_line_pointer == ']'
4115 || *input_line_pointer == '{'
4116 || *input_line_pointer == '}')
4117 ++input_line_pointer;
4118
0baf16f2 4119 /* Align to a four/eight byte boundary. */
2b3c4602 4120 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4121 frag_align (align, 0, 0);
4122 record_alignment (now_seg, align);
0baf16f2 4123#endif /* OBJ_ELF */
252b5132
RH		 4124
4125 if (*input_line_pointer != ',')
4126 demand_empty_rest_of_line ();
4127 else
4128 {
4129 ++input_line_pointer;
2b3c4602 4130 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4131 }
4132}
0baf16f2
AM		 4133
4134/* Pseudo-op .machine. */
0baf16f2
AM		 4135
4136static void
98027b10 4137ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4138{
69c040df
AM		 4139 char *cpu_string;
4140#define MAX_HISTORY 100
4141 static unsigned long *cpu_history;
4142 static int curr_hist;
4143
4144 SKIP_WHITESPACE ();
4145
4146 if (*input_line_pointer == '"')
4147 {
4148 int len;
4149 cpu_string = demand_copy_C_string (&len);
4150 }
4151 else
4152 {
4153 char c;
4154 cpu_string = input_line_pointer;
4155 c = get_symbol_end ();
4156 cpu_string = xstrdup (cpu_string);
4157 *input_line_pointer = c;
4158 }
4159
4160 if (cpu_string != NULL)
4161 {
4162 unsigned long old_cpu = ppc_cpu;
4163 char *p;
4164
4165 for (p = cpu_string; *p != 0; p++)
4166 *p = TOLOWER (*p);
4167
4168 if (strcmp (cpu_string, "push") == 0)
4169 {
4170 if (cpu_history == NULL)
4171 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4172
4173 if (curr_hist >= MAX_HISTORY)
4174 as_bad (_(".machine stack overflow"));
4175 else
4176 cpu_history[curr_hist++] = ppc_cpu;
4177 }
4178 else if (strcmp (cpu_string, "pop") == 0)
4179 {
4180 if (curr_hist <= 0)
4181 as_bad (_(".machine stack underflow"));
4182 else
4183 ppc_cpu = cpu_history[--curr_hist];
4184 }
4185 else if (parse_cpu (cpu_string))
4186 ;
4187 else
4188 as_bad (_("invalid machine `%s'"), cpu_string);
4189
4190 if (ppc_cpu != old_cpu)
4191 ppc_setup_opcodes ();
4192 }
4193
4194 demand_empty_rest_of_line ();
0baf16f2
AM		 4195}
4196
4197/* See whether a symbol is in the TOC section. */
4198
4199static int
98027b10 4200ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4201{
4202#ifdef OBJ_XCOFF
4203 return symbol_get_tc (sym)->class == XMC_TC;
4204#endif
4205#ifdef OBJ_ELF
4206 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4207 if (ppc_obj64)
0baf16f2
AM		 4208 return strcmp (sname, ".toc") == 0;
4209 else
4210 return strcmp (sname, ".got") == 0;
4211#endif
4212}
4213#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4214\f
4215#ifdef TE_PE
4216
99a814a1 4217/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4218
4219/* Set the current section. */
4220static void
98027b10 4221ppc_set_current_section (segT new)
252b5132
RH		 4222{
4223 ppc_previous_section = ppc_current_section;
4224 ppc_current_section = new;
4225}
4226
4227/* pseudo-op: .previous
4228 behaviour: toggles the current section with the previous section.
4229 errors: None
99a814a1
AM		 4230 warnings: "No previous section" */
4231
252b5132 4232static void
98027b10 4233ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4234{
4235 symbolS *tmp;
4236
81d4177b 4237 if (ppc_previous_section == NULL)
252b5132 4238 {
99a814a1 4239 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4240 return;
4241 }
4242
99a814a1 4243 subseg_set (ppc_previous_section, 0);
252b5132 4244
99a814a1 4245 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4246}
4247
4248/* pseudo-op: .pdata
4249 behaviour: predefined read only data section
b34976b6 4250 double word aligned
252b5132
RH		 4251 errors: None
4252 warnings: None
4253 initial: .section .pdata "adr3"
b34976b6 4254 a - don't know -- maybe a misprint
252b5132
RH		 4255 d - initialized data
4256 r - readable
4257 3 - double word aligned (that would be 4 byte boundary)
4258
4259 commentary:
4260 Tag index tables (also known as the function table) for exception
99a814a1 4261 handling, debugging, etc. */
252b5132 4262
252b5132 4263static void
98027b10 4264ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4265{
81d4177b 4266 if (pdata_section == 0)
252b5132
RH		 4267 {
4268 pdata_section = subseg_new (".pdata", 0);
81d4177b 4269
252b5132
RH		 4270 bfd_set_section_flags (stdoutput, pdata_section,
4271 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4272 | SEC_READONLY | SEC_DATA ));
81d4177b 4273
252b5132
RH		 4274 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4275 }
4276 else
4277 {
99a814a1 4278 pdata_section = subseg_new (".pdata", 0);
252b5132 4279 }
99a814a1 4280 ppc_set_current_section (pdata_section);
252b5132
RH		 4281}
4282
4283/* pseudo-op: .ydata
4284 behaviour: predefined read only data section
b34976b6 4285 double word aligned
252b5132
RH		 4286 errors: None
4287 warnings: None
4288 initial: .section .ydata "drw3"
b34976b6 4289 a - don't know -- maybe a misprint
252b5132
RH		 4290 d - initialized data
4291 r - readable
4292 3 - double word aligned (that would be 4 byte boundary)
4293 commentary:
4294 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4295 debugging, etc. */
4296
252b5132 4297static void
98027b10 4298ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4299{
81d4177b 4300 if (ydata_section == 0)
252b5132
RH		 4301 {
4302 ydata_section = subseg_new (".ydata", 0);
4303 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4304 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4305 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4306
4307 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4308 }
4309 else
4310 {
4311 ydata_section = subseg_new (".ydata", 0);
4312 }
99a814a1 4313 ppc_set_current_section (ydata_section);
252b5132
RH		 4314}
4315
4316/* pseudo-op: .reldata
4317 behaviour: predefined read write data section
b34976b6 4318 double word aligned (4-byte)
252b5132
RH		 4319 FIXME: relocation is applied to it
4320 FIXME: what's the difference between this and .data?
4321 errors: None
4322 warnings: None
4323 initial: .section .reldata "drw3"
4324 d - initialized data
4325 r - readable
4326 w - writeable
4327 3 - double word aligned (that would be 8 byte boundary)
4328
4329 commentary:
4330 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4331 function descriptors, etc. */
4332
252b5132 4333static void
98027b10 4334ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4335{
4336 if (reldata_section == 0)
4337 {
4338 reldata_section = subseg_new (".reldata", 0);
4339
4340 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4341 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4342 | SEC_DATA));
252b5132
RH		 4343
4344 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4345 }
4346 else
4347 {
4348 reldata_section = subseg_new (".reldata", 0);
4349 }
99a814a1 4350 ppc_set_current_section (reldata_section);
252b5132
RH		 4351}
4352
4353/* pseudo-op: .rdata
4354 behaviour: predefined read only data section
b34976b6 4355 double word aligned
252b5132
RH		 4356 errors: None
4357 warnings: None
4358 initial: .section .rdata "dr3"
4359 d - initialized data
4360 r - readable
99a814a1
AM		 4361 3 - double word aligned (that would be 4 byte boundary) */
4362
252b5132 4363static void
98027b10 4364ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4365{
4366 if (rdata_section == 0)
4367 {
4368 rdata_section = subseg_new (".rdata", 0);
4369 bfd_set_section_flags (stdoutput, rdata_section,
4370 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4371 | SEC_READONLY | SEC_DATA ));
4372
4373 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4374 }
4375 else
4376 {
4377 rdata_section = subseg_new (".rdata", 0);
4378 }
99a814a1 4379 ppc_set_current_section (rdata_section);
252b5132
RH		 4380}
4381
4382/* pseudo-op: .ualong
81d4177b 4383 behaviour: much like .int, with the exception that no alignment is
b34976b6 4384 performed.
252b5132
RH		 4385 FIXME: test the alignment statement
4386 errors: None
99a814a1
AM		 4387 warnings: None */
4388
252b5132 4389static void
98027b10 4390ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4391{
99a814a1
AM		 4392 /* Try for long. */
4393 cons (4);
252b5132
RH		 4394}
4395
4396/* pseudo-op: .znop <symbol name>
4397 behaviour: Issue a nop instruction
b34976b6 4398 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4399 the supplied symbol name.
4400 errors: None
99a814a1
AM		 4401 warnings: Missing symbol name */
4402
252b5132 4403static void
98027b10 4404ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4405{
4406 unsigned long insn;
4407 const struct powerpc_opcode *opcode;
4408 expressionS ex;
4409 char *f;
252b5132 4410 symbolS *sym;
252b5132
RH		 4411 char *symbol_name;
4412 char c;
4413 char *name;
4414 unsigned int exp;
4415 flagword flags;
4416 asection *sec;
4417
99a814a1 4418 /* Strip out the symbol name. */
252b5132
RH		 4419 symbol_name = input_line_pointer;
4420 c = get_symbol_end ();
4421
4422 name = xmalloc (input_line_pointer - symbol_name + 1);
4423 strcpy (name, symbol_name);
4424
4425 sym = symbol_find_or_make (name);
4426
4427 *input_line_pointer = c;
4428
4429 SKIP_WHITESPACE ();
4430
4431 /* Look up the opcode in the hash table. */
4432 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4433
99a814a1 4434 /* Stick in the nop. */
252b5132
RH		 4435 insn = opcode->opcode;
4436
4437 /* Write out the instruction. */
4438 f = frag_more (4);
4439 md_number_to_chars (f, insn, 4);
4440 fix_new (frag_now,
4441 f - frag_now->fr_literal,
4442 4,
4443 sym,
4444 0,
4445 0,
4446 BFD_RELOC_16_GOT_PCREL);
4447
4448}
4449
81d4177b
KH		 4450/* pseudo-op:
4451 behaviour:
4452 errors:
99a814a1
AM		 4453 warnings: */
4454
252b5132 4455static void
98027b10 4456ppc_pe_comm (int lcomm)
252b5132 4457{
98027b10
AM		 4458 char *name;
4459 char c;
4460 char *p;
252b5132 4461 offsetT temp;
98027b10 4462 symbolS *symbolP;
252b5132
RH		 4463 offsetT align;
4464
4465 name = input_line_pointer;
4466 c = get_symbol_end ();
4467
99a814a1 4468 /* just after name is now '\0'. */
252b5132
RH		 4469 p = input_line_pointer;
4470 *p = c;
4471 SKIP_WHITESPACE ();
4472 if (*input_line_pointer != ',')
4473 {
4474 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4475 ignore_rest_of_line ();
4476 return;
4477 }
4478
4479 input_line_pointer++; /* skip ',' */
4480 if ((temp = get_absolute_expression ()) < 0)
4481 {
4482 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4483 ignore_rest_of_line ();
4484 return;
4485 }
4486
4487 if (! lcomm)
4488 {
4489 /* The third argument to .comm is the alignment. */
4490 if (*input_line_pointer != ',')
4491 align = 3;
4492 else
4493 {
4494 ++input_line_pointer;
4495 align = get_absolute_expression ();
4496 if (align <= 0)
4497 {
4498 as_warn (_("ignoring bad alignment"));
4499 align = 3;
4500 }
4501 }
4502 }
4503
4504 *p = 0;
4505 symbolP = symbol_find_or_make (name);
4506
4507 *p = c;
4508 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4509 {
4510 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4511 S_GET_NAME (symbolP));
4512 ignore_rest_of_line ();
4513 return;
4514 }
4515
4516 if (S_GET_VALUE (symbolP))
4517 {
4518 if (S_GET_VALUE (symbolP) != (valueT) temp)
4519 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4520 S_GET_NAME (symbolP),
4521 (long) S_GET_VALUE (symbolP),
4522 (long) temp);
4523 }
4524 else
4525 {
4526 S_SET_VALUE (symbolP, (valueT) temp);
4527 S_SET_EXTERNAL (symbolP);
86ebace2 4528 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4529 }
4530
4531 demand_empty_rest_of_line ();
4532}
4533
4534/*
4535 * implement the .section pseudo op:
4536 * .section name {, "flags"}
4537 * ^ ^
4538 * | +--- optional flags: 'b' for bss
4539 * | 'i' for info
4540 * +-- section name 'l' for lib
4541 * 'n' for noload
4542 * 'o' for over
4543 * 'w' for data
4544 * 'd' (apparently m88k for data)
4545 * 'x' for text
4546 * But if the argument is not a quoted string, treat it as a
4547 * subsegment number.
4548 *
4549 * FIXME: this is a copy of the section processing from obj-coff.c, with
4550 * additions/changes for the moto-pas assembler support. There are three
4551 * categories:
4552 *
81d4177b 4553 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4554 * setting bits that bfd probably neither understands or uses. The
4555 * correct approach (?) will have to incorporate extra fields attached
4556 * to the section to hold the system specific stuff. (krk)
4557 *
4558 * Section Contents:
4559 * 'a' - unknown - referred to in documentation, but no definition supplied
4560 * 'c' - section has code
4561 * 'd' - section has initialized data
4562 * 'u' - section has uninitialized data
4563 * 'i' - section contains directives (info)
4564 * 'n' - section can be discarded
4565 * 'R' - remove section at link time
4566 *
4567 * Section Protection:
4568 * 'r' - section is readable
4569 * 'w' - section is writeable
4570 * 'x' - section is executable
4571 * 's' - section is sharable
4572 *
4573 * Section Alignment:
4574 * '0' - align to byte boundary
4575 * '1' - align to halfword undary
4576 * '2' - align to word boundary
4577 * '3' - align to doubleword boundary
4578 * '4' - align to quadword boundary
4579 * '5' - align to 32 byte boundary
4580 * '6' - align to 64 byte boundary
4581 *
4582 */
4583
4584void
98027b10 4585ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4586{
99a814a1 4587 /* Strip out the section name. */
252b5132
RH		 4588 char *section_name;
4589 char c;
4590 char *name;
4591 unsigned int exp;
4592 flagword flags;
4593 segT sec;
4594 int align;
4595
4596 section_name = input_line_pointer;
4597 c = get_symbol_end ();
4598
4599 name = xmalloc (input_line_pointer - section_name + 1);
4600 strcpy (name, section_name);
4601
4602 *input_line_pointer = c;
4603
4604 SKIP_WHITESPACE ();
4605
4606 exp = 0;
4607 flags = SEC_NO_FLAGS;
4608
4609 if (strcmp (name, ".idata$2") == 0)
4610 {
4611 align = 0;
4612 }
4613 else if (strcmp (name, ".idata$3") == 0)
4614 {
4615 align = 0;
4616 }
4617 else if (strcmp (name, ".idata$4") == 0)
4618 {
4619 align = 2;
4620 }
4621 else if (strcmp (name, ".idata$5") == 0)
4622 {
4623 align = 2;
4624 }
4625 else if (strcmp (name, ".idata$6") == 0)
4626 {
4627 align = 1;
4628 }
4629 else
99a814a1
AM		 4630 /* Default alignment to 16 byte boundary. */
4631 align = 4;
252b5132
RH		 4632
4633 if (*input_line_pointer == ',')
4634 {
4635 ++input_line_pointer;
4636 SKIP_WHITESPACE ();
4637 if (*input_line_pointer != '"')
4638 exp = get_absolute_expression ();
4639 else
4640 {
4641 ++input_line_pointer;
4642 while (*input_line_pointer != '"'
4643 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4644 {
4645 switch (*input_line_pointer)
4646 {
4647 /* Section Contents */
4648 case 'a': /* unknown */
4649 as_bad (_("Unsupported section attribute -- 'a'"));
4650 break;
4651 case 'c': /* code section */
81d4177b 4652 flags |= SEC_CODE;
252b5132
RH		 4653 break;
4654 case 'd': /* section has initialized data */
4655 flags |= SEC_DATA;
4656 break;
4657 case 'u': /* section has uninitialized data */
4658 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4659 in winnt.h */
4660 flags |= SEC_ROM;
4661 break;
4662 case 'i': /* section contains directives (info) */
4663 /* FIXME: This is IMAGE_SCN_LNK_INFO
4664 in winnt.h */
4665 flags |= SEC_HAS_CONTENTS;
4666 break;
4667 case 'n': /* section can be discarded */
81d4177b 4668 flags &=~ SEC_LOAD;
252b5132
RH		 4669 break;
4670 case 'R': /* Remove section at link time */
4671 flags |= SEC_NEVER_LOAD;
4672 break;
8d452c78 4673#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4674 /* Section Protection */
4675 case 'r': /* section is readable */
4676 flags |= IMAGE_SCN_MEM_READ;
4677 break;
4678 case 'w': /* section is writeable */
4679 flags |= IMAGE_SCN_MEM_WRITE;
4680 break;
4681 case 'x': /* section is executable */
4682 flags |= IMAGE_SCN_MEM_EXECUTE;
4683 break;
4684 case 's': /* section is sharable */
4685 flags |= IMAGE_SCN_MEM_SHARED;
4686 break;
4687
4688 /* Section Alignment */
4689 case '0': /* align to byte boundary */
4690 flags |= IMAGE_SCN_ALIGN_1BYTES;
4691 align = 0;
4692 break;
4693 case '1': /* align to halfword boundary */
4694 flags |= IMAGE_SCN_ALIGN_2BYTES;
4695 align = 1;
4696 break;
4697 case '2': /* align to word boundary */
4698 flags |= IMAGE_SCN_ALIGN_4BYTES;
4699 align = 2;
4700 break;
4701 case '3': /* align to doubleword boundary */
4702 flags |= IMAGE_SCN_ALIGN_8BYTES;
4703 align = 3;
4704 break;
4705 case '4': /* align to quadword boundary */
4706 flags |= IMAGE_SCN_ALIGN_16BYTES;
4707 align = 4;
4708 break;
4709 case '5': /* align to 32 byte boundary */
4710 flags |= IMAGE_SCN_ALIGN_32BYTES;
4711 align = 5;
4712 break;
4713 case '6': /* align to 64 byte boundary */
4714 flags |= IMAGE_SCN_ALIGN_64BYTES;
4715 align = 6;
4716 break;
8d452c78 4717#endif
252b5132 4718 default:
99a814a1
AM		 4719 as_bad (_("unknown section attribute '%c'"),
4720 *input_line_pointer);
252b5132
RH		 4721 break;
4722 }
4723 ++input_line_pointer;
4724 }
4725 if (*input_line_pointer == '"')
4726 ++input_line_pointer;
4727 }
4728 }
4729
4730 sec = subseg_new (name, (subsegT) exp);
4731
99a814a1 4732 ppc_set_current_section (sec);
252b5132
RH		 4733
4734 if (flags != SEC_NO_FLAGS)
4735 {
4736 if (! bfd_set_section_flags (stdoutput, sec, flags))
4737 as_bad (_("error setting flags for \"%s\": %s"),
4738 bfd_section_name (stdoutput, sec),
4739 bfd_errmsg (bfd_get_error ()));
4740 }
4741
99a814a1 4742 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4743}
4744
4745static void
98027b10 4746ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4747{
4748 char *name;
4749 char endc;
4750 symbolS *ext_sym;
4751
4752 name = input_line_pointer;
4753 endc = get_symbol_end ();
4754
4755 ext_sym = symbol_find_or_make (name);
4756
4757 *input_line_pointer = endc;
4758
4759 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4760 SF_SET_FUNCTION (ext_sym);
4761 SF_SET_PROCESS (ext_sym);
4762 coff_add_linesym (ext_sym);
4763
4764 demand_empty_rest_of_line ();
4765}
4766
4767static void
98027b10 4768ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4769{
4770 if (tocdata_section == 0)
4771 {
4772 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4773 /* FIXME: section flags won't work. */
252b5132
RH		 4774 bfd_set_section_flags (stdoutput, tocdata_section,
4775 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4776 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4777
4778 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4779 }
4780 else
4781 {
4782 rdata_section = subseg_new (".tocd", 0);
4783 }
4784
99a814a1 4785 ppc_set_current_section (tocdata_section);
252b5132
RH		 4786
4787 demand_empty_rest_of_line ();
4788}
4789
4790/* Don't adjust TOC relocs to use the section symbol. */
4791
4792int
98027b10 4793ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4794{
4795 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4796}
4797
4798#endif
4799\f
4800#ifdef OBJ_XCOFF
4801
4802/* XCOFF specific symbol and file handling. */
4803
4804/* Canonicalize the symbol name. We use the to force the suffix, if
4805 any, to use square brackets, and to be in upper case. */
4806
4807char *
98027b10 4808ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4809{
4810 char *s;
4811
4812 if (ppc_stab_symbol)
4813 return name;
4814
4815 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4816 ;
4817 if (*s != '\0')
4818 {
4819 char brac;
4820
4821 if (*s == '[')
4822 brac = ']';
4823 else
4824 {
4825 *s = '[';
4826 brac = '}';
4827 }
4828
4829 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4830 *s = TOUPPER (*s);
252b5132
RH		 4831
4832 if (*s == '\0' || s[1] != '\0')
4833 as_bad (_("bad symbol suffix"));
4834
4835 *s = ']';
4836 }
4837
4838 return name;
4839}
4840
4841/* Set the class of a symbol based on the suffix, if any. This is
4842 called whenever a new symbol is created. */
4843
4844void
98027b10 4845ppc_symbol_new_hook (symbolS *sym)
252b5132 4846{
809ffe0d 4847 struct ppc_tc_sy *tc;
252b5132
RH		 4848 const char *s;
4849
809ffe0d
ILT		 4850 tc = symbol_get_tc (sym);
4851 tc->next = NULL;
4852 tc->output = 0;
4853 tc->class = -1;
4854 tc->real_name = NULL;
4855 tc->subseg = 0;
4856 tc->align = 0;
4857 tc->size = NULL;
4858 tc->within = NULL;
252b5132
RH		 4859
4860 if (ppc_stab_symbol)
4861 return;
4862
4863 s = strchr (S_GET_NAME (sym), '[');
4864 if (s == (const char *) NULL)
4865 {
4866 /* There is no suffix. */
4867 return;
4868 }
4869
4870 ++s;
4871
4872 switch (s[0])
4873 {
4874 case 'B':
4875 if (strcmp (s, "BS]") == 0)
809ffe0d 4876 tc->class = XMC_BS;
252b5132
RH		 4877 break;
4878 case 'D':
4879 if (strcmp (s, "DB]") == 0)
809ffe0d 4880 tc->class = XMC_DB;
252b5132 4881 else if (strcmp (s, "DS]") == 0)
809ffe0d 4882 tc->class = XMC_DS;
252b5132
RH		 4883 break;
4884 case 'G':
4885 if (strcmp (s, "GL]") == 0)
809ffe0d 4886 tc->class = XMC_GL;
252b5132
RH		 4887 break;
4888 case 'P':
4889 if (strcmp (s, "PR]") == 0)
809ffe0d 4890 tc->class = XMC_PR;
252b5132
RH		 4891 break;
4892 case 'R':
4893 if (strcmp (s, "RO]") == 0)
809ffe0d 4894 tc->class = XMC_RO;
252b5132 4895 else if (strcmp (s, "RW]") == 0)
809ffe0d 4896 tc->class = XMC_RW;
252b5132
RH		 4897 break;
4898 case 'S':
4899 if (strcmp (s, "SV]") == 0)
809ffe0d 4900 tc->class = XMC_SV;
252b5132
RH		 4901 break;
4902 case 'T':
4903 if (strcmp (s, "TC]") == 0)
809ffe0d 4904 tc->class = XMC_TC;
252b5132 4905 else if (strcmp (s, "TI]") == 0)
809ffe0d 4906 tc->class = XMC_TI;
252b5132 4907 else if (strcmp (s, "TB]") == 0)
809ffe0d 4908 tc->class = XMC_TB;
252b5132 4909 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4910 tc->class = XMC_TC0;
252b5132
RH		 4911 break;
4912 case 'U':
4913 if (strcmp (s, "UA]") == 0)
809ffe0d 4914 tc->class = XMC_UA;
252b5132 4915 else if (strcmp (s, "UC]") == 0)
809ffe0d 4916 tc->class = XMC_UC;
252b5132
RH		 4917 break;
4918 case 'X':
4919 if (strcmp (s, "XO]") == 0)
809ffe0d 4920 tc->class = XMC_XO;
252b5132
RH		 4921 break;
4922 }
4923
809ffe0d 4924 if (tc->class == -1)
252b5132
RH		 4925 as_bad (_("Unrecognized symbol suffix"));
4926}
4927
4928/* Set the class of a label based on where it is defined. This
4929 handles symbols without suffixes. Also, move the symbol so that it
4930 follows the csect symbol. */
4931
4932void
98027b10 4933ppc_frob_label (symbolS *sym)
252b5132
RH		 4934{
4935 if (ppc_current_csect != (symbolS *) NULL)
4936 {
809ffe0d
ILT		 4937 if (symbol_get_tc (sym)->class == -1)
4938 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4939
4940 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4941 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4942 &symbol_rootP, &symbol_lastP);
4943 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4944 }
07a53e5c
RH		 4945
4946#ifdef OBJ_ELF
4947 dwarf2_emit_label (sym);
4948#endif
252b5132
RH		 4949}
4950
4951/* This variable is set by ppc_frob_symbol if any absolute symbols are
4952 seen. It tells ppc_adjust_symtab whether it needs to look through
4953 the symbols. */
4954
b34976b6 4955static bfd_boolean ppc_saw_abs;
252b5132
RH		 4956
4957/* Change the name of a symbol just before writing it out. Set the
4958 real name if the .rename pseudo-op was used. Otherwise, remove any
4959 class suffix. Return 1 if the symbol should not be included in the
4960 symbol table. */
4961
4962int
98027b10 4963ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4964{
4965 static symbolS *ppc_last_function;
4966 static symbolS *set_end;
4967
4968 /* Discard symbols that should not be included in the output symbol
4969 table. */
809ffe0d
ILT		 4970 if (! symbol_used_in_reloc_p (sym)
4971 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4972 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4973 && ! symbol_get_tc (sym)->output
252b5132
RH		 4974 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4975 return 1;
4976
a161fe53
AM		 4977 /* This one will disappear anyway. Don't make a csect sym for it. */
4978 if (sym == abs_section_sym)
4979 return 1;
4980
809ffe0d
ILT		 4981 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4982 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4983 else
4984 {
4985 const char *name;
4986 const char *s;
4987
4988 name = S_GET_NAME (sym);
4989 s = strchr (name, '[');
4990 if (s != (char *) NULL)
4991 {
4992 unsigned int len;
4993 char *snew;
4994
4995 len = s - name;
4996 snew = xmalloc (len + 1);
4997 memcpy (snew, name, len);
4998 snew[len] = '\0';
4999
5000 S_SET_NAME (sym, snew);
5001 }
5002 }
5003
5004 if (set_end != (symbolS *) NULL)
5005 {
5006 SA_SET_SYM_ENDNDX (set_end, sym);
5007 set_end = NULL;
5008 }
5009
5010 if (SF_GET_FUNCTION (sym))
5011 {
5012 if (ppc_last_function != (symbolS *) NULL)
5013 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5014 ppc_last_function = sym;
809ffe0d 5015 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5016 {
6386f3a7 5017 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5018 SA_SET_SYM_FSIZE (sym,
5019 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5020 }
5021 }
5022 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5023 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5024 {
5025 if (ppc_last_function == (symbolS *) NULL)
5026 as_bad (_(".ef with no preceding .function"));
5027 else
5028 {
5029 set_end = ppc_last_function;
5030 ppc_last_function = NULL;
5031
5032 /* We don't have a C_EFCN symbol, but we need to force the
5033 COFF backend to believe that it has seen one. */
5034 coff_last_function = NULL;
5035 }
5036 }
5037
670ec21d 5038 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5039 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5040 && S_GET_STORAGE_CLASS (sym) != C_FILE
5041 && S_GET_STORAGE_CLASS (sym) != C_FCN
5042 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5043 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5044 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5045 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5046 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5047 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5048 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5049
5050 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5051 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5052 {
5053 int i;
5054 union internal_auxent *a;
5055
5056 /* Create a csect aux. */
5057 i = S_GET_NUMBER_AUXILIARY (sym);
5058 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5059 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5060 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5061 {
5062 /* This is the TOC table. */
5063 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5064 a->x_csect.x_scnlen.l = 0;
5065 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5066 }
809ffe0d 5067 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5068 {
5069 /* This is a csect symbol. x_scnlen is the size of the
5070 csect. */
809ffe0d 5071 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5072 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5073 S_GET_SEGMENT (sym))
5074 - S_GET_VALUE (sym));
5075 else
5076 {
6386f3a7 5077 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5078 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5079 - S_GET_VALUE (sym));
5080 }
809ffe0d 5081 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5082 }
5083 else if (S_GET_SEGMENT (sym) == bss_section)
5084 {
5085 /* This is a common symbol. */
809ffe0d
ILT		 5086 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5087 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5088 if (S_IS_EXTERNAL (sym))
809ffe0d 5089 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5090 else
809ffe0d 5091 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5092 }
5093 else if (S_GET_SEGMENT (sym) == absolute_section)
5094 {
5095 /* This is an absolute symbol. The csect will be created by
99a814a1 5096 ppc_adjust_symtab. */
b34976b6 5097 ppc_saw_abs = TRUE;
252b5132 5098 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5099 if (symbol_get_tc (sym)->class == -1)
5100 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5101 }
5102 else if (! S_IS_DEFINED (sym))
5103 {
5104 /* This is an external symbol. */
5105 a->x_csect.x_scnlen.l = 0;
5106 a->x_csect.x_smtyp = XTY_ER;
5107 }
809ffe0d 5108 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5109 {
5110 symbolS *next;
5111
5112 /* This is a TOC definition. x_scnlen is the size of the
5113 TOC entry. */
5114 next = symbol_next (sym);
809ffe0d 5115 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5116 next = symbol_next (next);
5117 if (next == (symbolS *) NULL
809ffe0d 5118 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5119 {
5120 if (ppc_after_toc_frag == (fragS *) NULL)
5121 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5122 data_section)
5123 - S_GET_VALUE (sym));
5124 else
5125 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5126 - S_GET_VALUE (sym));
5127 }
5128 else
5129 {
6386f3a7 5130 resolve_symbol_value (next);
252b5132
RH		 5131 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5132 - S_GET_VALUE (sym));
5133 }
5134 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5135 }
5136 else
5137 {
5138 symbolS *csect;
5139
5140 /* This is a normal symbol definition. x_scnlen is the
5141 symbol index of the containing csect. */
5142 if (S_GET_SEGMENT (sym) == text_section)
5143 csect = ppc_text_csects;
5144 else if (S_GET_SEGMENT (sym) == data_section)
5145 csect = ppc_data_csects;
5146 else
5147 abort ();
5148
5149 /* Skip the initial dummy symbol. */
809ffe0d 5150 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5151
5152 if (csect == (symbolS *) NULL)
5153 {
5154 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5155 a->x_csect.x_scnlen.l = 0;
5156 }
5157 else
5158 {
809ffe0d 5159 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5160 {
6386f3a7 5161 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5162 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5163 > S_GET_VALUE (sym))
252b5132 5164 break;
809ffe0d 5165 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5166 }
5167
809ffe0d
ILT		 5168 a->x_csect.x_scnlen.p =
5169 coffsymbol (symbol_get_bfdsym (csect))->native;
5170 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5171 1;
252b5132
RH		 5172 }
5173 a->x_csect.x_smtyp = XTY_LD;
5174 }
81d4177b 5175
252b5132
RH		 5176 a->x_csect.x_parmhash = 0;
5177 a->x_csect.x_snhash = 0;
809ffe0d 5178 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5179 a->x_csect.x_smclas = XMC_PR;
5180 else
809ffe0d 5181 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5182 a->x_csect.x_stab = 0;
5183 a->x_csect.x_snstab = 0;
5184
5185 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5186 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5187 }
5188 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5189 {
5190 /* We want the value to be the symbol index of the referenced
5191 csect symbol. BFD will do that for us if we set the right
5192 flags. */
b782de16
AM		 5193 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5194 combined_entry_type *c = coffsymbol (bsym)->native;
5195
5196 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5197 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5198 }
5199 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5200 {
5201 symbolS *block;
5202 symbolS *csect;
5203
5204 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5205 block = symbol_get_tc (sym)->within;
5206 csect = symbol_get_tc (block)->within;
6386f3a7 5207 resolve_symbol_value (csect);
252b5132
RH		 5208 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5209 }
5210 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5211 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5212 {
5213 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5214 BFD will do that for us if we set the right flags. We have
5215 already set the value correctly. */
809ffe0d 5216 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5217 }
5218
5219 return 0;
5220}
5221
5222/* Adjust the symbol table. This creates csect symbols for all
5223 absolute symbols. */
5224
5225void
98027b10 5226ppc_adjust_symtab (void)
252b5132
RH		 5227{
5228 symbolS *sym;
5229
5230 if (! ppc_saw_abs)
5231 return;
5232
5233 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5234 {
5235 symbolS *csect;
5236 int i;
5237 union internal_auxent *a;
5238
5239 if (S_GET_SEGMENT (sym) != absolute_section)
5240 continue;
5241
5242 csect = symbol_create (".abs[XO]", absolute_section,
5243 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5244 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5245 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5246 i = S_GET_NUMBER_AUXILIARY (csect);
5247 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5248 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5249 a->x_csect.x_scnlen.l = 0;
5250 a->x_csect.x_smtyp = XTY_SD;
5251 a->x_csect.x_parmhash = 0;
5252 a->x_csect.x_snhash = 0;
5253 a->x_csect.x_smclas = XMC_XO;
5254 a->x_csect.x_stab = 0;
5255 a->x_csect.x_snstab = 0;
5256
5257 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5258
5259 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5260 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5261 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5262 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5263 }
5264
b34976b6 5265 ppc_saw_abs = FALSE;
252b5132
RH		 5266}
5267
5268/* Set the VMA for a section. This is called on all the sections in
5269 turn. */
5270
5271void
98027b10 5272ppc_frob_section (asection *sec)
252b5132 5273{
931e13a6 5274 static bfd_vma vma = 0;
252b5132 5275
931e13a6 5276 vma = md_section_align (sec, vma);
252b5132
RH		 5277 bfd_set_section_vma (stdoutput, sec, vma);
5278 vma += bfd_section_size (stdoutput, sec);
5279}
5280
5281#endif /* OBJ_XCOFF */
5282\f
252b5132 5283char *
98027b10 5284md_atof (int type, char *litp, int *sizep)
252b5132 5285{
499ac353 5286 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5287}
5288
5289/* Write a value out to the object file, using the appropriate
5290 endianness. */
5291
5292void
98027b10 5293md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5294{
5295 if (target_big_endian)
5296 number_to_chars_bigendian (buf, val, n);
5297 else
5298 number_to_chars_littleendian (buf, val, n);
5299}
5300
5301/* Align a section (I don't know why this is machine dependent). */
5302
5303valueT
3aeeedbb 5304md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5305{
3aeeedbb
AM		 5306#ifdef OBJ_ELF
5307 return addr;
5308#else
252b5132
RH		 5309 int align = bfd_get_section_alignment (stdoutput, seg);
5310
5311 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5312#endif
252b5132
RH		 5313}
5314
5315/* We don't have any form of relaxing. */
5316
5317int
98027b10
AM		 5318md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5319 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5320{
5321 abort ();
5322 return 0;
5323}
5324
5325/* Convert a machine dependent frag. We never generate these. */
5326
5327void
98027b10
AM		 5328md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5329 asection *sec ATTRIBUTE_UNUSED,
5330 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5331{
5332 abort ();
5333}
5334
5335/* We have no need to default values of symbols. */
5336
252b5132 5337symbolS *
98027b10 5338md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5339{
5340 return 0;
5341}
5342\f
5343/* Functions concerning relocs. */
5344
5345/* The location from which a PC relative jump should be calculated,
5346 given a PC relative reloc. */
5347
5348long
98027b10 5349md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5350{
5351 return fixp->fx_frag->fr_address + fixp->fx_where;
5352}
5353
5354#ifdef OBJ_XCOFF
5355
5356/* This is called to see whether a fixup should be adjusted to use a
5357 section symbol. We take the opportunity to change a fixup against
5358 a symbol in the TOC subsegment into a reloc against the
5359 corresponding .tc symbol. */
5360
5361int
98027b10 5362ppc_fix_adjustable (fixS *fix)
252b5132 5363{
b782de16
AM		 5364 valueT val = resolve_symbol_value (fix->fx_addsy);
5365 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5366 TC_SYMFIELD_TYPE *tc;
5367
5368 if (symseg == absolute_section)
5369 return 0;
252b5132 5370
252b5132 5371 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5372 && fix->fx_addsy != ppc_toc_csect
b782de16 5373 && symseg == data_section
252b5132
RH		 5374 && val >= ppc_toc_frag->fr_address
5375 && (ppc_after_toc_frag == (fragS *) NULL
5376 || val < ppc_after_toc_frag->fr_address))
5377 {
5378 symbolS *sy;
5379
5380 for (sy = symbol_next (ppc_toc_csect);
5381 sy != (symbolS *) NULL;
5382 sy = symbol_next (sy))
5383 {
b782de16
AM		 5384 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5385
5386 if (sy_tc->class == XMC_TC0)
252b5132 5387 continue;
b782de16 5388 if (sy_tc->class != XMC_TC)
252b5132 5389 break;
b782de16 5390 if (val == resolve_symbol_value (sy))
252b5132
RH		 5391 {
5392 fix->fx_addsy = sy;
5393 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5394 return 0;
5395 }
5396 }
5397
5398 as_bad_where (fix->fx_file, fix->fx_line,
5399 _("symbol in .toc does not match any .tc"));
5400 }
5401
5402 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5403 tc = symbol_get_tc (fix->fx_addsy);
5404 if (tc->subseg == 0
5405 && tc->class != XMC_TC0
5406 && tc->class != XMC_TC
5407 && symseg != bss_section
252b5132 5408 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5409 && (symseg != data_section
252b5132
RH		 5410 || ppc_toc_csect == NULL
5411 || val < ppc_toc_frag->fr_address
5412 || (ppc_after_toc_frag != NULL
5413 && val >= ppc_after_toc_frag->fr_address)))
5414 {
5415 symbolS *csect;
b782de16 5416 symbolS *next_csect;
252b5132 5417
b782de16 5418 if (symseg == text_section)
252b5132 5419 csect = ppc_text_csects;
b782de16 5420 else if (symseg == data_section)
252b5132
RH		 5421 csect = ppc_data_csects;
5422 else
5423 abort ();
5424
5425 /* Skip the initial dummy symbol. */
809ffe0d 5426 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5427
5428 if (csect != (symbolS *) NULL)
5429 {
b782de16
AM		 5430 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5431 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5432 {
5433 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5434 have to look through the full symbol table to see
5435 whether this is the csect we want. Note that we will
5436 only get here if the csect has zero length. */
b782de16
AM		 5437 if (symbol_get_frag (csect)->fr_address == val
5438 && S_GET_VALUE (csect) == val)
252b5132
RH		 5439 {
5440 symbolS *scan;
5441
809ffe0d 5442 for (scan = symbol_next (csect);
252b5132 5443 scan != NULL;
809ffe0d 5444 scan = symbol_next (scan))
252b5132 5445 {
809ffe0d 5446 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5447 break;
5448 if (scan == fix->fx_addsy)
5449 break;
5450 }
5451
5452 /* If we found the symbol before the next csect
99a814a1 5453 symbol, then this is the csect we want. */
252b5132
RH		 5454 if (scan == fix->fx_addsy)
5455 break;
5456 }
5457
b782de16 5458 csect = next_csect;
252b5132
RH		 5459 }
5460
b782de16 5461 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5462 fix->fx_addsy = csect;
5463 }
b782de16 5464 return 0;
252b5132
RH		 5465 }
5466
5467 /* Adjust a reloc against a .lcomm symbol to be against the base
5468 .lcomm. */
b782de16 5469 if (symseg == bss_section
252b5132
RH		 5470 && ! S_IS_EXTERNAL (fix->fx_addsy))
5471 {
b782de16
AM		 5472 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5473
5474 fix->fx_offset += val - resolve_symbol_value (sy);
5475 fix->fx_addsy = sy;
252b5132
RH		 5476 }
5477
5478 return 0;
5479}
5480
5481/* A reloc from one csect to another must be kept. The assembler
5482 will, of course, keep relocs between sections, and it will keep
5483 absolute relocs, but we need to force it to keep PC relative relocs
5484 between two csects in the same section. */
5485
5486int
98027b10 5487ppc_force_relocation (fixS *fix)
252b5132
RH		 5488{
5489 /* At this point fix->fx_addsy should already have been converted to
5490 a csect symbol. If the csect does not include the fragment, then
5491 we need to force the relocation. */
5492 if (fix->fx_pcrel
5493 && fix->fx_addsy != NULL
809ffe0d
ILT		 5494 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5495 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5496 > fix->fx_frag->fr_address)
5497 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5498 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5499 <= fix->fx_frag->fr_address))))
5500 return 1;
5501
ae6063d4 5502 return generic_force_reloc (fix);
252b5132
RH		 5503}
5504
5505#endif /* OBJ_XCOFF */
5506
0baf16f2 5507#ifdef OBJ_ELF
a161fe53
AM		 5508/* If this function returns non-zero, it guarantees that a relocation
5509 will be emitted for a fixup. */
5510
5511int
98027b10 5512ppc_force_relocation (fixS *fix)
a161fe53
AM		 5513{
5514 /* Branch prediction relocations must force a relocation, as must
5515 the vtable description relocs. */
5516 switch (fix->fx_r_type)
5517 {
5518 case BFD_RELOC_PPC_B16_BRTAKEN:
5519 case BFD_RELOC_PPC_B16_BRNTAKEN:
5520 case BFD_RELOC_PPC_BA16_BRTAKEN:
5521 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5522 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5523 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5524 return 1;
5525 default:
5526 break;
5527 }
5528
cdba85ec
AM		 5529 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5530 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5531 return 1;
5532
ae6063d4 5533 return generic_force_reloc (fix);
a161fe53
AM		 5534}
5535
0baf16f2 5536int
98027b10 5537ppc_fix_adjustable (fixS *fix)
252b5132 5538{
0baf16f2
AM		 5539 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5540 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5541 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5542 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5543 && fix->fx_r_type != BFD_RELOC_GPREL16
5544 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5545 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5546 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5547 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5548}
0baf16f2 5549#endif
252b5132 5550
3aeeedbb
AM		 5551/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5552 rs_align_code frag. */
5553
5554void
5555ppc_handle_align (struct frag *fragP)
5556{
5557 valueT count = (fragP->fr_next->fr_address
5558 - (fragP->fr_address + fragP->fr_fix));
5559
5560 if (count != 0 && (count & 3) == 0)
5561 {
5562 char *dest = fragP->fr_literal + fragP->fr_fix;
5563
5564 fragP->fr_var = 4;
5565 md_number_to_chars (dest, 0x60000000, 4);
5566
5567 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5568 {
5569 /* For power6, we want the last nop to be a group terminating
5570 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5571 immediately after this one, with its address set to the last
5572 nop location. This will automatically reduce the number of
5573 nops in the current frag by one. */
5574 if (count > 4)
5575 {
5576 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5577
5578 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5579 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5580 group_nop->fr_fix = 0;
5581 group_nop->fr_offset = 1;
5582 group_nop->fr_type = rs_fill;
5583 fragP->fr_next = group_nop;
5584 dest = group_nop->fr_literal;
5585 }
5586
5587 md_number_to_chars (dest, 0x60210000, 4);
5588 }
5589 }
5590}
5591
252b5132
RH		 5592/* Apply a fixup to the object code. This is called for all the
5593 fixups we generated by the call to fix_new_exp, above. In the call
5594 above we used a reloc code which was the largest legal reloc code
5595 plus the operand index. Here we undo that to recover the operand
5596 index. At this point all symbol values should be fully resolved,
5597 and we attempt to completely resolve the reloc. If we can not do
5598 that, we determine the correct reloc code and put it back in the
5599 fixup. */
5600
94f592af 5601void
98027b10 5602md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5603{
94f592af 5604 valueT value = * valP;
252b5132
RH		 5605
5606#ifdef OBJ_ELF
94f592af 5607 if (fixP->fx_addsy != NULL)
252b5132 5608 {
a161fe53 5609 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5610 if (fixP->fx_pcrel)
5611 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5612 }
5613 else
94f592af 5614 fixP->fx_done = 1;
252b5132 5615#else
a161fe53 5616 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5617 the symbol values. If we are doing this relocation the code in
5618 write.c is going to call bfd_install_relocation, which is also
5619 going to use the symbol value. That means that if the reloc is
5620 fully resolved we want to use *valP since bfd_install_relocation is
5621 not being used.
252b5132 5622 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5623 *valP, and must use fx_offset instead. However, if the reloc
5624 is PC relative, we do want to use *valP since it includes the
252b5132 5625 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5626 if (fixP->fx_addsy == (symbolS *) NULL)
5627 fixP->fx_done = 1;
5628
5629 else if (fixP->fx_pcrel)
5630 ;
5631
252b5132 5632 else
a161fe53
AM		 5633 value = fixP->fx_offset;
5634#endif
5635
5636 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5637 {
a161fe53
AM		 5638 /* We can't actually support subtracting a symbol. */
5639 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5640 }
252b5132 5641
94f592af 5642 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5643 {
5644 int opindex;
5645 const struct powerpc_operand *operand;
5646 char *where;
5647 unsigned long insn;
5648
94f592af 5649 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5650
5651 operand = &powerpc_operands[opindex];
5652
5653#ifdef OBJ_XCOFF
0baf16f2
AM		 5654 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5655 does not generate a reloc. It uses the offset of `sym' within its
5656 csect. Other usages, such as `.long sym', generate relocs. This
5657 is the documented behaviour of non-TOC symbols. */
252b5132 5658 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5659 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5660 && operand->shift == 0
2b3c4602 5661 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5662 && fixP->fx_addsy != NULL
5663 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5664 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5665 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5666 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5667 {
94f592af
NC		 5668 value = fixP->fx_offset;
5669 fixP->fx_done = 1;
252b5132
RH		 5670 }
5671#endif
5672
5673 /* Fetch the instruction, insert the fully resolved operand
5674 value, and stuff the instruction back again. */
94f592af 5675 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5676 if (target_big_endian)
5677 insn = bfd_getb32 ((unsigned char *) where);
5678 else
5679 insn = bfd_getl32 ((unsigned char *) where);
5680 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5681 fixP->tc_fix_data.ppc_cpu,
94f592af 5682 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5683 if (target_big_endian)
5684 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5685 else
5686 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5687
94f592af
NC		 5688 if (fixP->fx_done)
5689 /* Nothing else to do here. */
5690 return;
252b5132 5691
94f592af 5692 assert (fixP->fx_addsy != NULL);
0baf16f2 5693
252b5132
RH		 5694 /* Determine a BFD reloc value based on the operand information.
5695 We are only prepared to turn a few of the operands into
0baf16f2 5696 relocs. */
11b37b7b 5697 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5698 && operand->bitm == 0x3fffffc
11b37b7b 5699 && operand->shift == 0)
94f592af 5700 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5701 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5702 && operand->bitm == 0xfffc
11b37b7b 5703 && operand->shift == 0)
95210096
AM		 5704 {
5705 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5706#ifdef OBJ_XCOFF
5707 fixP->fx_size = 2;
5708 if (target_big_endian)
5709 fixP->fx_where += 2;
5710#endif
5711 }
11b37b7b 5712 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5713 && operand->bitm == 0x3fffffc
11b37b7b 5714 && operand->shift == 0)
94f592af 5715 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5716 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5717 && operand->bitm == 0xfffc
11b37b7b 5718 && operand->shift == 0)
95210096
AM		 5719 {
5720 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5721#ifdef OBJ_XCOFF
5722 fixP->fx_size = 2;
5723 if (target_big_endian)
5724 fixP->fx_where += 2;
5725#endif
5726 }
0baf16f2 5727#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5728 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5729 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5730 && operand->shift == 0)
11b37b7b 5731 {
a7fc733f
AM		 5732 if (ppc_is_toc_sym (fixP->fx_addsy))
5733 {
5734 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5735#ifdef OBJ_ELF
a7fc733f
AM		 5736 if (ppc_obj64
5737 && (operand->flags & PPC_OPERAND_DS) != 0)
5738 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5739#endif
5740 }
5741 else
5742 {
5743 fixP->fx_r_type = BFD_RELOC_16;
5744#ifdef OBJ_ELF
5745 if (ppc_obj64
5746 && (operand->flags & PPC_OPERAND_DS) != 0)
5747 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5748#endif
a7fc733f 5749 }
94f592af 5750 fixP->fx_size = 2;
11b37b7b 5751 if (target_big_endian)
94f592af 5752 fixP->fx_where += 2;
11b37b7b 5753 }
0baf16f2 5754#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5755 else
252b5132
RH		 5756 {
5757 char *sfile;
5758 unsigned int sline;
5759
5760 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5761 symbol. */
94f592af
NC		 5762 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5763 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5764 _("unresolved expression that must be resolved"));
5765 else
94f592af 5766 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5767 _("unsupported relocation against %s"),
94f592af
NC		 5768 S_GET_NAME (fixP->fx_addsy));
5769 fixP->fx_done = 1;
5770 return;
252b5132
RH		 5771 }
5772 }
5773 else
5774 {
5775#ifdef OBJ_ELF
94f592af 5776 ppc_elf_validate_fix (fixP, seg);
252b5132 5777#endif
94f592af 5778 switch (fixP->fx_r_type)
252b5132 5779 {
252b5132 5780 case BFD_RELOC_CTOR:
2b3c4602 5781 if (ppc_obj64)
9c7977b3
AM		 5782 goto ctor64;
5783 /* fall through */
5784
0baf16f2 5785 case BFD_RELOC_32:
94f592af
NC		 5786 if (fixP->fx_pcrel)
5787 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5788 /* fall through */
252b5132
RH		 5789
5790 case BFD_RELOC_RVA:
5791 case BFD_RELOC_32_PCREL:
252b5132 5792 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5793 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5794 value, 4);
5795 break;
5796
7f6d05e8 5797 case BFD_RELOC_64:
9c7977b3 5798 ctor64:
94f592af
NC		 5799 if (fixP->fx_pcrel)
5800 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5801 /* fall through */
0baf16f2 5802
7f6d05e8 5803 case BFD_RELOC_64_PCREL:
94f592af 5804 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5805 value, 8);
81d4177b 5806 break;
0baf16f2 5807
252b5132
RH		 5808 case BFD_RELOC_GPREL16:
5809 case BFD_RELOC_16_GOT_PCREL:
5810 case BFD_RELOC_16_GOTOFF:
5811 case BFD_RELOC_LO16_GOTOFF:
5812 case BFD_RELOC_HI16_GOTOFF:
5813 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5814 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5815 case BFD_RELOC_LO16_BASEREL:
5816 case BFD_RELOC_HI16_BASEREL:
5817 case BFD_RELOC_HI16_S_BASEREL:
5818 case BFD_RELOC_PPC_EMB_NADDR16:
5819 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5820 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5821 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5822 case BFD_RELOC_PPC_EMB_SDAI16:
5823 case BFD_RELOC_PPC_EMB_SDA2REL:
5824 case BFD_RELOC_PPC_EMB_SDA2I16:
5825 case BFD_RELOC_PPC_EMB_RELSEC16:
5826 case BFD_RELOC_PPC_EMB_RELST_LO:
5827 case BFD_RELOC_PPC_EMB_RELST_HI:
5828 case BFD_RELOC_PPC_EMB_RELST_HA:
5829 case BFD_RELOC_PPC_EMB_RELSDA:
5830 case BFD_RELOC_PPC_TOC16:
0baf16f2 5831#ifdef OBJ_ELF
0baf16f2
AM		 5832 case BFD_RELOC_PPC64_TOC16_LO:
5833 case BFD_RELOC_PPC64_TOC16_HI:
5834 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5835#endif
94f592af 5836 if (fixP->fx_pcrel)
252b5132 5837 {
94f592af
NC		 5838 if (fixP->fx_addsy != NULL)
5839 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5840 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5841 bfd_get_reloc_code_name (fixP->fx_r_type),
5842 S_GET_NAME (fixP->fx_addsy));
252b5132 5843 else
94f592af 5844 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5845 _("cannot emit PC relative %s relocation"),
94f592af 5846 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5847 }
5848
94f592af 5849 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5850 value, 2);
5851 break;
5852
3c9d25f4
AM		 5853 case BFD_RELOC_16:
5854 if (fixP->fx_pcrel)
5855 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5856 /* fall through */
5857
5858 case BFD_RELOC_16_PCREL:
5859 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5860 value, 2);
5861 break;
5862
5863 case BFD_RELOC_LO16:
5864 if (fixP->fx_pcrel)
5865 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5866 /* fall through */
5867
5868 case BFD_RELOC_LO16_PCREL:
5869 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5870 value, 2);
5871 break;
5872
252b5132
RH		 5873 /* This case happens when you write, for example,
5874 lis %r3,(L1-L2)@ha
5875 where L1 and L2 are defined later. */
5876 case BFD_RELOC_HI16:
94f592af 5877 if (fixP->fx_pcrel)
3c9d25f4
AM		 5878 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5879 /* fall through */
5880
5881 case BFD_RELOC_HI16_PCREL:
94f592af 5882 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5883 PPC_HI (value), 2);
252b5132 5884 break;
0baf16f2 5885
252b5132 5886 case BFD_RELOC_HI16_S:
94f592af 5887 if (fixP->fx_pcrel)
3c9d25f4
AM		 5888 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5889 /* fall through */
5890
5891 case BFD_RELOC_HI16_S_PCREL:
94f592af 5892 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5893 PPC_HA (value), 2);
5894 break;
5895
5896#ifdef OBJ_ELF
0baf16f2 5897 case BFD_RELOC_PPC64_HIGHER:
94f592af 5898 if (fixP->fx_pcrel)
0baf16f2 5899 abort ();
94f592af 5900 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5901 PPC_HIGHER (value), 2);
252b5132
RH		 5902 break;
5903
0baf16f2 5904 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5905 if (fixP->fx_pcrel)
0baf16f2 5906 abort ();
94f592af 5907 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5908 PPC_HIGHERA (value), 2);
5909 break;
5910
5911 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5912 if (fixP->fx_pcrel)
0baf16f2 5913 abort ();
94f592af 5914 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5915 PPC_HIGHEST (value), 2);
5916 break;
5917
5918 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5919 if (fixP->fx_pcrel)
0baf16f2 5920 abort ();
94f592af 5921 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5922 PPC_HIGHESTA (value), 2);
5923 break;
5924
5925 case BFD_RELOC_PPC64_ADDR16_DS:
5926 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5927 case BFD_RELOC_PPC64_GOT16_DS:
5928 case BFD_RELOC_PPC64_GOT16_LO_DS:
5929 case BFD_RELOC_PPC64_PLT16_LO_DS:
5930 case BFD_RELOC_PPC64_SECTOFF_DS:
5931 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5932 case BFD_RELOC_PPC64_TOC16_DS:
5933 case BFD_RELOC_PPC64_TOC16_LO_DS:
5934 case BFD_RELOC_PPC64_PLTGOT16_DS:
5935 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5936 if (fixP->fx_pcrel)
0baf16f2
AM		 5937 abort ();
5938 {
2132e3a3 5939 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5940 unsigned long val, mask;
0baf16f2
AM		 5941
5942 if (target_big_endian)
adadcc0c 5943 val = bfd_getb32 (where - 2);
0baf16f2 5944 else
adadcc0c
AM		 5945 val = bfd_getl32 (where);
5946 mask = 0xfffc;
5947 /* lq insns reserve the four lsbs. */
5948 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5949 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5950 mask = 0xfff0;
5951 val |= value & mask;
0baf16f2
AM		 5952 if (target_big_endian)
5953 bfd_putb16 ((bfd_vma) val, where);
5954 else
5955 bfd_putl16 ((bfd_vma) val, where);
5956 }
5957 break;
cdba85ec 5958
ba0b2174
AM		 5959 case BFD_RELOC_PPC_B16_BRTAKEN:
5960 case BFD_RELOC_PPC_B16_BRNTAKEN:
5961 case BFD_RELOC_PPC_BA16_BRTAKEN:
5962 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5963 break;
5964
cdba85ec 5965 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5966 break;
5967
cdba85ec
AM		 5968 case BFD_RELOC_PPC_DTPMOD:
5969 case BFD_RELOC_PPC_TPREL16:
5970 case BFD_RELOC_PPC_TPREL16_LO:
5971 case BFD_RELOC_PPC_TPREL16_HI:
5972 case BFD_RELOC_PPC_TPREL16_HA:
5973 case BFD_RELOC_PPC_TPREL:
5974 case BFD_RELOC_PPC_DTPREL16:
5975 case BFD_RELOC_PPC_DTPREL16_LO:
5976 case BFD_RELOC_PPC_DTPREL16_HI:
5977 case BFD_RELOC_PPC_DTPREL16_HA:
5978 case BFD_RELOC_PPC_DTPREL:
5979 case BFD_RELOC_PPC_GOT_TLSGD16:
5980 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5981 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5982 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5983 case BFD_RELOC_PPC_GOT_TLSLD16:
5984 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5985 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5986 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5987 case BFD_RELOC_PPC_GOT_TPREL16:
5988 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5989 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5990 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5991 case BFD_RELOC_PPC_GOT_DTPREL16:
5992 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5993 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5994 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5995 case BFD_RELOC_PPC64_TPREL16_DS:
5996 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5997 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5998 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5999 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6000 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6001 case BFD_RELOC_PPC64_DTPREL16_DS:
6002 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6003 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6004 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6005 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6006 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6007 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6008 break;
0baf16f2 6009#endif
252b5132 6010 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6011 bytes, rather than 2, so offset it here appropriately. */
252b5132 6012 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6013 if (fixP->fx_pcrel)
252b5132
RH		 6014 abort ();
6015
94f592af 6016 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6017 + ((target_big_endian) ? 2 : 0),
6018 value, 2);
6019 break;
6020
6021 case BFD_RELOC_8:
94f592af 6022 if (fixP->fx_pcrel)
31a91399
NC		 6023 {
6024 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6025 ".byte <undefined_symbol> - ." */
31a91399
NC		 6026 if (fixP->fx_addsy)
6027 as_bad (_("Unable to handle reference to symbol %s"),
6028 S_GET_NAME (fixP->fx_addsy));
6029 else
6030 as_bad (_("Unable to resolve expression"));
6031 fixP->fx_done = 1;
6032 }
6033 else
6034 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6035 value, 1);
252b5132
RH		 6036 break;
6037
6038 case BFD_RELOC_24_PLT_PCREL:
6039 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6040 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6041 abort ();
6042
94f592af 6043 if (fixP->fx_done)
99a814a1
AM		 6044 {
6045 char *where;
6046 unsigned long insn;
6047
6048 /* Fetch the instruction, insert the fully resolved operand
6049 value, and stuff the instruction back again. */
94f592af 6050 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6051 if (target_big_endian)
6052 insn = bfd_getb32 ((unsigned char *) where);
6053 else
6054 insn = bfd_getl32 ((unsigned char *) where);
6055 if ((value & 3) != 0)
94f592af 6056 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6057 _("must branch to an address a multiple of 4"));
6058 if ((offsetT) value < -0x40000000
6059 || (offsetT) value >= 0x40000000)
94f592af 6060 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6061 _("@local or @plt branch destination is too far away, %ld bytes"),
6062 (long) value);
6063 insn = insn | (value & 0x03fffffc);
6064 if (target_big_endian)
6065 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6066 else
6067 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6068 }
252b5132
RH		 6069 break;
6070
6071 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6072 fixP->fx_done = 0;
6073 if (fixP->fx_addsy
6074 && !S_IS_DEFINED (fixP->fx_addsy)
6075 && !S_IS_WEAK (fixP->fx_addsy))
6076 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6077 break;
6078
6079 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6080 fixP->fx_done = 0;
252b5132
RH		 6081 break;
6082
0baf16f2 6083#ifdef OBJ_ELF
0baf16f2
AM		 6084 /* Generated by reference to `sym@tocbase'. The sym is
6085 ignored by the linker. */
6086 case BFD_RELOC_PPC64_TOC:
94f592af 6087 fixP->fx_done = 0;
0baf16f2 6088 break;
0baf16f2 6089#endif
252b5132 6090 default:
bc805888 6091 fprintf (stderr,
94f592af 6092 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6093 fflush (stderr);
252b5132
RH		 6094 abort ();
6095 }
6096 }
6097
6098#ifdef OBJ_ELF
94f592af 6099 fixP->fx_addnumber = value;
4e6935a6
AM		 6100
6101 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6102 from the section contents. If we are going to be emitting a reloc
6103 then the section contents are immaterial, so don't warn if they
6104 happen to overflow. Leave such warnings to ld. */
6105 if (!fixP->fx_done)
6106 fixP->fx_no_overflow = 1;
252b5132 6107#else
94f592af
NC		 6108 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6109 fixP->fx_addnumber = 0;
252b5132
RH		 6110 else
6111 {
6112#ifdef TE_PE
94f592af 6113 fixP->fx_addnumber = 0;
252b5132 6114#else
8edcbfcd
TG		 6115 /* We want to use the offset within the toc, not the actual VMA
6116 of the symbol. */
94f592af 6117 fixP->fx_addnumber =
8edcbfcd
TG		 6118 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6119 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6120#endif
6121 }
6122#endif
252b5132
RH		 6123}
6124
6125/* Generate a reloc for a fixup. */
6126
6127arelent *
98027b10 6128tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6129{
6130 arelent *reloc;
6131
6132 reloc = (arelent *) xmalloc (sizeof (arelent));
6133
49309057
ILT		 6134 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6135 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6136 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6137 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6138 if (reloc->howto == (reloc_howto_type *) NULL)
6139 {
6140 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6141 _("reloc %d not supported by object file format"),
6142 (int) fixp->fx_r_type);
252b5132
RH		 6143 return NULL;
6144 }
6145 reloc->addend = fixp->fx_addnumber;
6146
6147 return reloc;
6148}
75e21f08
JJ		 6149
6150void
98027b10 6151ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6152{
6153 cfi_add_CFA_def_cfa (1, 0);
6154}
6155
6156int
1df69f4f 6157tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6158{
6159 unsigned int regnum = -1;
6160 unsigned int i;
6161 const char *p;
6162 char *q;
6163 static struct { char *name; int dw2regnum; } regnames[] =
6164 {
6165 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6166 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6167 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6168 { "spe_acc", 111 }, { "spefscr", 112 }
6169 };
6170
6171 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6172 if (strcmp (regnames[i].name, regname) == 0)
6173 return regnames[i].dw2regnum;
6174
6175 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6176 {
6177 p = regname + 1 + (regname[1] == '.');
6178 regnum = strtoul (p, &q, 10);
6179 if (p == q || *q || regnum >= 32)
6180 return -1;
6181 if (regname[0] == 'f')
b7d7dc63 6182 regnum += 32;
75e21f08 6183 else if (regname[0] == 'v')
b7d7dc63 6184 regnum += 77;
75e21f08
JJ		 6185 }
6186 else if (regname[0] == 'c' && regname[1] == 'r')
6187 {
6188 p = regname + 2 + (regname[2] == '.');
6189 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6190 return -1;
75e21f08
JJ		 6191 regnum = p[0] - '0' + 68;
6192 }
6193 return regnum;
6194}
GDB Binutils - Deliverables
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