projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
PR target/14758
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
b9c361e0
JL		 67/* Split the indicated value with the msbs in bits 11-15
68 and the lsbs in bits 21-31. */
69#define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
70
71/* Split the indicated value with the msbs in bits 6-10
72 and the lsbs in bits 21-31. */
73#define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
74
75/* #lo(value) denotes the lsb 16 bits in split16a format. */
76#define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
77
78/* #lo(value) denotes the lsb 16 bits in split16d format. */
79#define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
80
0baf16f2
AM		 81/* #hi(value) denotes bits 16 through 31 of the indicated value. */
82#define PPC_HI(v) (((v) >> 16) & 0xffff)
83
b9c361e0
JL		 84/* #lo(value) denotes the msb 16 bits in split16a format. */
85#define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
86
87/* #lo(value) denotes the msb 16 bits in split16d format. */
88#define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
89
0baf16f2
AM		 90/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
91 the indicated value, compensating for #lo() being treated as a
92 signed number. */
15c1449b 93#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2 94
b9c361e0
JL		 95/* #ha(value) denotes the high adjusted value in split16a format. */
96#define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
97
98/* #ha(value) denotes the high adjusted value in split16d format. */
99#define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
100
0baf16f2 101/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 102#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 103
104/* #highera(value) denotes bits 32 through 47 of the indicated value,
105 compensating for #lo() being treated as a signed number. */
15c1449b 106#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 107
108/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 109#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 110
111/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 112 compensating for #lo being treated as a signed number. */
113#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 114
115#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
116
b34976b6 117static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 118
98027b10
AM		 119static void ppc_macro (char *, const struct powerpc_macro *);
120static void ppc_byte (int);
0baf16f2
AM		 121
122#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 123static void ppc_tc (int);
124static void ppc_machine (int);
0baf16f2 125#endif
252b5132
RH		 126
127#ifdef OBJ_XCOFF
98027b10
AM		 128static void ppc_comm (int);
129static void ppc_bb (int);
130static void ppc_bc (int);
131static void ppc_bf (int);
132static void ppc_biei (int);
133static void ppc_bs (int);
134static void ppc_eb (int);
135static void ppc_ec (int);
136static void ppc_ef (int);
137static void ppc_es (int);
138static void ppc_csect (int);
85645aed 139static void ppc_dwsect (int);
98027b10
AM		 140static void ppc_change_csect (symbolS *, offsetT);
141static void ppc_function (int);
142static void ppc_extern (int);
143static void ppc_lglobl (int);
c865e45b 144static void ppc_ref (int);
98027b10
AM		 145static void ppc_section (int);
146static void ppc_named_section (int);
147static void ppc_stabx (int);
148static void ppc_rename (int);
149static void ppc_toc (int);
150static void ppc_xcoff_cons (int);
151static void ppc_vbyte (int);
252b5132
RH		 152#endif
153
154#ifdef OBJ_ELF
98027b10
AM		 155static void ppc_elf_cons (int);
156static void ppc_elf_rdata (int);
157static void ppc_elf_lcomm (int);
252b5132
RH		 158#endif
159
160#ifdef TE_PE
98027b10
AM		 161static void ppc_previous (int);
162static void ppc_pdata (int);
163static void ppc_ydata (int);
164static void ppc_reldata (int);
165static void ppc_rdata (int);
166static void ppc_ualong (int);
167static void ppc_znop (int);
168static void ppc_pe_comm (int);
169static void ppc_pe_section (int);
170static void ppc_pe_function (int);
171static void ppc_pe_tocd (int);
252b5132
RH		 172#endif
173\f
174/* Generic assembler global variables which must be defined by all
175 targets. */
176
177#ifdef OBJ_ELF
178/* This string holds the chars that always start a comment. If the
179 pre-processor is disabled, these aren't very useful. The macro
180 tc_comment_chars points to this. We use this, rather than the
181 usual comment_chars, so that we can switch for Solaris conventions. */
182static const char ppc_solaris_comment_chars[] = "#!";
183static const char ppc_eabi_comment_chars[] = "#";
184
185#ifdef TARGET_SOLARIS_COMMENT
186const char *ppc_comment_chars = ppc_solaris_comment_chars;
187#else
188const char *ppc_comment_chars = ppc_eabi_comment_chars;
189#endif
190#else
191const char comment_chars[] = "#";
192#endif
193
194/* Characters which start a comment at the beginning of a line. */
195const char line_comment_chars[] = "#";
196
197/* Characters which may be used to separate multiple commands on a
198 single line. */
199const char line_separator_chars[] = ";";
200
201/* Characters which are used to indicate an exponent in a floating
202 point number. */
203const char EXP_CHARS[] = "eE";
204
205/* Characters which mean that a number is a floating point constant,
206 as in 0d1.0. */
207const char FLT_CHARS[] = "dD";
5ce8663f 208
5e02f92e 209/* Anything that can start an operand needs to be mentioned here,
ac805826 210 to stop the input scrubber eating whitespace. */
5e02f92e 211const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 212
213/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
214int ppc_cie_data_alignment;
783de163 215
8fbf7334
JL		 216/* The dwarf2 minimum instruction length. */
217int ppc_dwarf2_line_min_insn_length;
218
cef4f754
AM		 219/* More than this number of nops in an alignment op gets a branch
220 instead. */
221unsigned long nop_limit = 4;
222
783de163
AM		 223/* The type of processor we are assembling for. This is one or more
224 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 225ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 226
227/* Flags set on encountering toc relocs. */
228enum {
229 has_large_toc_reloc = 1,
230 has_small_toc_reloc = 2
231} toc_reloc_types;
252b5132
RH		 232\f
233/* The target specific pseudo-ops which we support. */
234
235const pseudo_typeS md_pseudo_table[] =
236{
237 /* Pseudo-ops which must be overridden. */
238 { "byte", ppc_byte, 0 },
239
240#ifdef OBJ_XCOFF
241 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
242 legitimately belong in the obj-*.c file. However, XCOFF is based
243 on COFF, and is only implemented for the RS/6000. We just use
244 obj-coff.c, and add what we need here. */
245 { "comm", ppc_comm, 0 },
246 { "lcomm", ppc_comm, 1 },
247 { "bb", ppc_bb, 0 },
248 { "bc", ppc_bc, 0 },
249 { "bf", ppc_bf, 0 },
250 { "bi", ppc_biei, 0 },
251 { "bs", ppc_bs, 0 },
252 { "csect", ppc_csect, 0 },
85645aed 253 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 254 { "data", ppc_section, 'd' },
255 { "eb", ppc_eb, 0 },
256 { "ec", ppc_ec, 0 },
257 { "ef", ppc_ef, 0 },
258 { "ei", ppc_biei, 1 },
259 { "es", ppc_es, 0 },
260 { "extern", ppc_extern, 0 },
261 { "function", ppc_function, 0 },
262 { "lglobl", ppc_lglobl, 0 },
c865e45b 263 { "ref", ppc_ref, 0 },
252b5132
RH		 264 { "rename", ppc_rename, 0 },
265 { "section", ppc_named_section, 0 },
266 { "stabx", ppc_stabx, 0 },
267 { "text", ppc_section, 't' },
268 { "toc", ppc_toc, 0 },
269 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 270 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 271 { "word", ppc_xcoff_cons, 1 },
272 { "short", ppc_xcoff_cons, 1 },
273 { "vbyte", ppc_vbyte, 0 },
274#endif
275
276#ifdef OBJ_ELF
0baf16f2
AM		 277 { "llong", ppc_elf_cons, 8 },
278 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 279 { "long", ppc_elf_cons, 4 },
280 { "word", ppc_elf_cons, 2 },
281 { "short", ppc_elf_cons, 2 },
282 { "rdata", ppc_elf_rdata, 0 },
283 { "rodata", ppc_elf_rdata, 0 },
284 { "lcomm", ppc_elf_lcomm, 0 },
285#endif
286
287#ifdef TE_PE
99a814a1 288 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 289 { "previous", ppc_previous, 0 },
290 { "pdata", ppc_pdata, 0 },
291 { "ydata", ppc_ydata, 0 },
292 { "reldata", ppc_reldata, 0 },
293 { "rdata", ppc_rdata, 0 },
294 { "ualong", ppc_ualong, 0 },
295 { "znop", ppc_znop, 0 },
296 { "comm", ppc_pe_comm, 0 },
297 { "lcomm", ppc_pe_comm, 1 },
298 { "section", ppc_pe_section, 0 },
299 { "function", ppc_pe_function,0 },
300 { "tocd", ppc_pe_tocd, 0 },
301#endif
302
0baf16f2 303#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 304 { "tc", ppc_tc, 0 },
0baf16f2
AM		 305 { "machine", ppc_machine, 0 },
306#endif
252b5132
RH		 307
308 { NULL, NULL, 0 }
309};
310
311\f
99a814a1
AM		 312/* Predefined register names if -mregnames (or default for Windows NT).
313 In general, there are lots of them, in an attempt to be compatible
314 with a number of other Windows NT assemblers. */
252b5132
RH		 315
316/* Structure to hold information about predefined registers. */
317struct pd_reg
318 {
319 char *name;
320 int value;
321 };
322
323/* List of registers that are pre-defined:
324
325 Each general register has predefined names of the form:
326 1. r<reg_num> which has the value <reg_num>.
327 2. r.<reg_num> which has the value <reg_num>.
328
252b5132
RH		 329 Each floating point register has predefined names of the form:
330 1. f<reg_num> which has the value <reg_num>.
331 2. f.<reg_num> which has the value <reg_num>.
332
7a899fff
C		 333 Each vector unit register has predefined names of the form:
334 1. v<reg_num> which has the value <reg_num>.
335 2. v.<reg_num> which has the value <reg_num>.
336
252b5132
RH		 337 Each condition register has predefined names of the form:
338 1. cr<reg_num> which has the value <reg_num>.
339 2. cr.<reg_num> which has the value <reg_num>.
340
341 There are individual registers as well:
342 sp or r.sp has the value 1
343 rtoc or r.toc has the value 2
344 fpscr has the value 0
345 xer has the value 1
346 lr has the value 8
347 ctr has the value 9
348 pmr has the value 0
349 dar has the value 19
350 dsisr has the value 18
351 dec has the value 22
352 sdr1 has the value 25
353 srr0 has the value 26
354 srr1 has the value 27
355
81d4177b 356 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 357
358static const struct pd_reg pre_defined_registers[] =
359{
360 { "cr.0", 0 }, /* Condition Registers */
361 { "cr.1", 1 },
362 { "cr.2", 2 },
363 { "cr.3", 3 },
364 { "cr.4", 4 },
365 { "cr.5", 5 },
366 { "cr.6", 6 },
367 { "cr.7", 7 },
368
369 { "cr0", 0 },
370 { "cr1", 1 },
371 { "cr2", 2 },
372 { "cr3", 3 },
373 { "cr4", 4 },
374 { "cr5", 5 },
375 { "cr6", 6 },
376 { "cr7", 7 },
377
378 { "ctr", 9 },
379
380 { "dar", 19 }, /* Data Access Register */
381 { "dec", 22 }, /* Decrementer */
382 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
383
384 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 385 { "f.1", 1 },
386 { "f.10", 10 },
387 { "f.11", 11 },
388 { "f.12", 12 },
389 { "f.13", 13 },
390 { "f.14", 14 },
391 { "f.15", 15 },
392 { "f.16", 16 },
393 { "f.17", 17 },
394 { "f.18", 18 },
395 { "f.19", 19 },
396 { "f.2", 2 },
397 { "f.20", 20 },
398 { "f.21", 21 },
399 { "f.22", 22 },
400 { "f.23", 23 },
401 { "f.24", 24 },
402 { "f.25", 25 },
403 { "f.26", 26 },
404 { "f.27", 27 },
405 { "f.28", 28 },
406 { "f.29", 29 },
407 { "f.3", 3 },
252b5132
RH		 408 { "f.30", 30 },
409 { "f.31", 31 },
066be9f7
PB		 410
411 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
412 { "f.33", 33 },
413 { "f.34", 34 },
414 { "f.35", 35 },
415 { "f.36", 36 },
416 { "f.37", 37 },
417 { "f.38", 38 },
418 { "f.39", 39 },
81d4177b 419 { "f.4", 4 },
066be9f7
PB		 420 { "f.40", 40 },
421 { "f.41", 41 },
422 { "f.42", 42 },
423 { "f.43", 43 },
424 { "f.44", 44 },
425 { "f.45", 45 },
426 { "f.46", 46 },
427 { "f.47", 47 },
428 { "f.48", 48 },
429 { "f.49", 49 },
81d4177b 430 { "f.5", 5 },
066be9f7
PB		 431 { "f.50", 50 },
432 { "f.51", 51 },
433 { "f.52", 52 },
434 { "f.53", 53 },
435 { "f.54", 54 },
436 { "f.55", 55 },
437 { "f.56", 56 },
438 { "f.57", 57 },
439 { "f.58", 58 },
440 { "f.59", 59 },
81d4177b 441 { "f.6", 6 },
066be9f7
PB		 442 { "f.60", 60 },
443 { "f.61", 61 },
444 { "f.62", 62 },
445 { "f.63", 63 },
81d4177b
KH		 446 { "f.7", 7 },
447 { "f.8", 8 },
448 { "f.9", 9 },
449
450 { "f0", 0 },
451 { "f1", 1 },
452 { "f10", 10 },
453 { "f11", 11 },
454 { "f12", 12 },
455 { "f13", 13 },
456 { "f14", 14 },
457 { "f15", 15 },
458 { "f16", 16 },
459 { "f17", 17 },
460 { "f18", 18 },
461 { "f19", 19 },
462 { "f2", 2 },
463 { "f20", 20 },
464 { "f21", 21 },
465 { "f22", 22 },
466 { "f23", 23 },
467 { "f24", 24 },
468 { "f25", 25 },
469 { "f26", 26 },
470 { "f27", 27 },
471 { "f28", 28 },
472 { "f29", 29 },
473 { "f3", 3 },
252b5132
RH		 474 { "f30", 30 },
475 { "f31", 31 },
066be9f7
PB		 476
477 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
478 { "f33", 33 },
479 { "f34", 34 },
480 { "f35", 35 },
481 { "f36", 36 },
482 { "f37", 37 },
483 { "f38", 38 },
484 { "f39", 39 },
81d4177b 485 { "f4", 4 },
066be9f7
PB		 486 { "f40", 40 },
487 { "f41", 41 },
488 { "f42", 42 },
489 { "f43", 43 },
490 { "f44", 44 },
491 { "f45", 45 },
492 { "f46", 46 },
493 { "f47", 47 },
494 { "f48", 48 },
495 { "f49", 49 },
81d4177b 496 { "f5", 5 },
066be9f7
PB		 497 { "f50", 50 },
498 { "f51", 51 },
499 { "f52", 52 },
500 { "f53", 53 },
501 { "f54", 54 },
502 { "f55", 55 },
503 { "f56", 56 },
504 { "f57", 57 },
505 { "f58", 58 },
506 { "f59", 59 },
81d4177b 507 { "f6", 6 },
066be9f7
PB		 508 { "f60", 60 },
509 { "f61", 61 },
510 { "f62", 62 },
511 { "f63", 63 },
81d4177b
KH		 512 { "f7", 7 },
513 { "f8", 8 },
514 { "f9", 9 },
252b5132
RH		 515
516 { "fpscr", 0 },
517
c3d65c1c
BE		 518 /* Quantization registers used with pair single instructions. */
519 { "gqr.0", 0 },
520 { "gqr.1", 1 },
521 { "gqr.2", 2 },
522 { "gqr.3", 3 },
523 { "gqr.4", 4 },
524 { "gqr.5", 5 },
525 { "gqr.6", 6 },
526 { "gqr.7", 7 },
527 { "gqr0", 0 },
528 { "gqr1", 1 },
529 { "gqr2", 2 },
530 { "gqr3", 3 },
531 { "gqr4", 4 },
532 { "gqr5", 5 },
533 { "gqr6", 6 },
534 { "gqr7", 7 },
535
252b5132
RH		 536 { "lr", 8 }, /* Link Register */
537
538 { "pmr", 0 },
539
540 { "r.0", 0 }, /* General Purpose Registers */
541 { "r.1", 1 },
542 { "r.10", 10 },
543 { "r.11", 11 },
544 { "r.12", 12 },
545 { "r.13", 13 },
546 { "r.14", 14 },
547 { "r.15", 15 },
548 { "r.16", 16 },
549 { "r.17", 17 },
550 { "r.18", 18 },
551 { "r.19", 19 },
552 { "r.2", 2 },
553 { "r.20", 20 },
554 { "r.21", 21 },
555 { "r.22", 22 },
556 { "r.23", 23 },
557 { "r.24", 24 },
558 { "r.25", 25 },
559 { "r.26", 26 },
560 { "r.27", 27 },
561 { "r.28", 28 },
562 { "r.29", 29 },
563 { "r.3", 3 },
564 { "r.30", 30 },
565 { "r.31", 31 },
566 { "r.4", 4 },
567 { "r.5", 5 },
568 { "r.6", 6 },
569 { "r.7", 7 },
570 { "r.8", 8 },
571 { "r.9", 9 },
572
573 { "r.sp", 1 }, /* Stack Pointer */
574
575 { "r.toc", 2 }, /* Pointer to the table of contents */
576
577 { "r0", 0 }, /* More general purpose registers */
578 { "r1", 1 },
579 { "r10", 10 },
580 { "r11", 11 },
581 { "r12", 12 },
582 { "r13", 13 },
583 { "r14", 14 },
584 { "r15", 15 },
585 { "r16", 16 },
586 { "r17", 17 },
587 { "r18", 18 },
588 { "r19", 19 },
589 { "r2", 2 },
590 { "r20", 20 },
591 { "r21", 21 },
592 { "r22", 22 },
593 { "r23", 23 },
594 { "r24", 24 },
595 { "r25", 25 },
596 { "r26", 26 },
597 { "r27", 27 },
598 { "r28", 28 },
599 { "r29", 29 },
600 { "r3", 3 },
601 { "r30", 30 },
602 { "r31", 31 },
603 { "r4", 4 },
604 { "r5", 5 },
605 { "r6", 6 },
606 { "r7", 7 },
607 { "r8", 8 },
608 { "r9", 9 },
609
610 { "rtoc", 2 }, /* Table of contents */
611
612 { "sdr1", 25 }, /* Storage Description Register 1 */
613
614 { "sp", 1 },
615
616 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
617 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 618
066be9f7 619 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 620 { "v.1", 1 },
621 { "v.10", 10 },
622 { "v.11", 11 },
623 { "v.12", 12 },
624 { "v.13", 13 },
625 { "v.14", 14 },
626 { "v.15", 15 },
627 { "v.16", 16 },
628 { "v.17", 17 },
629 { "v.18", 18 },
630 { "v.19", 19 },
631 { "v.2", 2 },
632 { "v.20", 20 },
633 { "v.21", 21 },
634 { "v.22", 22 },
635 { "v.23", 23 },
636 { "v.24", 24 },
637 { "v.25", 25 },
638 { "v.26", 26 },
639 { "v.27", 27 },
640 { "v.28", 28 },
641 { "v.29", 29 },
642 { "v.3", 3 },
7a899fff
C		 643 { "v.30", 30 },
644 { "v.31", 31 },
81d4177b
KH		 645 { "v.4", 4 },
646 { "v.5", 5 },
647 { "v.6", 6 },
648 { "v.7", 7 },
649 { "v.8", 8 },
650 { "v.9", 9 },
7a899fff
C		 651
652 { "v0", 0 },
81d4177b
KH		 653 { "v1", 1 },
654 { "v10", 10 },
655 { "v11", 11 },
656 { "v12", 12 },
657 { "v13", 13 },
658 { "v14", 14 },
659 { "v15", 15 },
660 { "v16", 16 },
661 { "v17", 17 },
662 { "v18", 18 },
663 { "v19", 19 },
664 { "v2", 2 },
665 { "v20", 20 },
666 { "v21", 21 },
667 { "v22", 22 },
668 { "v23", 23 },
669 { "v24", 24 },
670 { "v25", 25 },
671 { "v26", 26 },
672 { "v27", 27 },
673 { "v28", 28 },
674 { "v29", 29 },
675 { "v3", 3 },
7a899fff
C		 676 { "v30", 30 },
677 { "v31", 31 },
81d4177b
KH		 678 { "v4", 4 },
679 { "v5", 5 },
680 { "v6", 6 },
681 { "v7", 7 },
682 { "v8", 8 },
7a899fff 683 { "v9", 9 },
252b5132 684
066be9f7
PB		 685 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
686 { "vs.1", 1 },
687 { "vs.10", 10 },
688 { "vs.11", 11 },
689 { "vs.12", 12 },
690 { "vs.13", 13 },
691 { "vs.14", 14 },
692 { "vs.15", 15 },
693 { "vs.16", 16 },
694 { "vs.17", 17 },
695 { "vs.18", 18 },
696 { "vs.19", 19 },
697 { "vs.2", 2 },
698 { "vs.20", 20 },
699 { "vs.21", 21 },
700 { "vs.22", 22 },
701 { "vs.23", 23 },
702 { "vs.24", 24 },
703 { "vs.25", 25 },
704 { "vs.26", 26 },
705 { "vs.27", 27 },
706 { "vs.28", 28 },
707 { "vs.29", 29 },
708 { "vs.3", 3 },
709 { "vs.30", 30 },
710 { "vs.31", 31 },
711 { "vs.32", 32 },
712 { "vs.33", 33 },
713 { "vs.34", 34 },
714 { "vs.35", 35 },
715 { "vs.36", 36 },
716 { "vs.37", 37 },
717 { "vs.38", 38 },
718 { "vs.39", 39 },
719 { "vs.4", 4 },
720 { "vs.40", 40 },
721 { "vs.41", 41 },
722 { "vs.42", 42 },
723 { "vs.43", 43 },
724 { "vs.44", 44 },
725 { "vs.45", 45 },
726 { "vs.46", 46 },
727 { "vs.47", 47 },
728 { "vs.48", 48 },
729 { "vs.49", 49 },
730 { "vs.5", 5 },
731 { "vs.50", 50 },
732 { "vs.51", 51 },
733 { "vs.52", 52 },
734 { "vs.53", 53 },
735 { "vs.54", 54 },
736 { "vs.55", 55 },
737 { "vs.56", 56 },
738 { "vs.57", 57 },
739 { "vs.58", 58 },
740 { "vs.59", 59 },
741 { "vs.6", 6 },
742 { "vs.60", 60 },
743 { "vs.61", 61 },
744 { "vs.62", 62 },
745 { "vs.63", 63 },
746 { "vs.7", 7 },
747 { "vs.8", 8 },
748 { "vs.9", 9 },
749
750 { "vs0", 0 },
751 { "vs1", 1 },
752 { "vs10", 10 },
753 { "vs11", 11 },
754 { "vs12", 12 },
755 { "vs13", 13 },
756 { "vs14", 14 },
757 { "vs15", 15 },
758 { "vs16", 16 },
759 { "vs17", 17 },
760 { "vs18", 18 },
761 { "vs19", 19 },
762 { "vs2", 2 },
763 { "vs20", 20 },
764 { "vs21", 21 },
765 { "vs22", 22 },
766 { "vs23", 23 },
767 { "vs24", 24 },
768 { "vs25", 25 },
769 { "vs26", 26 },
770 { "vs27", 27 },
771 { "vs28", 28 },
772 { "vs29", 29 },
773 { "vs3", 3 },
774 { "vs30", 30 },
775 { "vs31", 31 },
776 { "vs32", 32 },
777 { "vs33", 33 },
778 { "vs34", 34 },
779 { "vs35", 35 },
780 { "vs36", 36 },
781 { "vs37", 37 },
782 { "vs38", 38 },
783 { "vs39", 39 },
784 { "vs4", 4 },
785 { "vs40", 40 },
786 { "vs41", 41 },
787 { "vs42", 42 },
788 { "vs43", 43 },
789 { "vs44", 44 },
790 { "vs45", 45 },
791 { "vs46", 46 },
792 { "vs47", 47 },
793 { "vs48", 48 },
794 { "vs49", 49 },
795 { "vs5", 5 },
796 { "vs50", 50 },
797 { "vs51", 51 },
798 { "vs52", 52 },
799 { "vs53", 53 },
800 { "vs54", 54 },
801 { "vs55", 55 },
802 { "vs56", 56 },
803 { "vs57", 57 },
804 { "vs58", 58 },
805 { "vs59", 59 },
806 { "vs6", 6 },
807 { "vs60", 60 },
808 { "vs61", 61 },
809 { "vs62", 62 },
810 { "vs63", 63 },
811 { "vs7", 7 },
812 { "vs8", 8 },
813 { "vs9", 9 },
814
252b5132
RH		 815 { "xer", 1 },
816
817};
818
bc805888 819#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 820
821/* Given NAME, find the register number associated with that name, return
822 the integer value associated with the given name or -1 on failure. */
823
252b5132 824static int
98027b10 825reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 826{
827 int middle, low, high;
828 int cmp;
829
830 low = 0;
831 high = regcount - 1;
832
833 do
834 {
835 middle = (low + high) / 2;
836 cmp = strcasecmp (name, regs[middle].name);
837 if (cmp < 0)
838 high = middle - 1;
839 else if (cmp > 0)
840 low = middle + 1;
841 else
842 return regs[middle].value;
843 }
844 while (low <= high);
845
846 return -1;
847}
848
849/*
99a814a1 850 * Summary of register_name.
252b5132
RH		 851 *
852 * in: Input_line_pointer points to 1st char of operand.
853 *
854 * out: A expressionS.
855 * The operand may have been a register: in this case, X_op == O_register,
856 * X_add_number is set to the register number, and truth is returned.
857 * Input_line_pointer->(next non-blank) char after operand, or is in its
858 * original state.
859 */
860
b34976b6 861static bfd_boolean
98027b10 862register_name (expressionS *expressionP)
252b5132
RH		 863{
864 int reg_number;
865 char *name;
866 char *start;
867 char c;
868
99a814a1 869 /* Find the spelling of the operand. */
252b5132 870 start = name = input_line_pointer;
3882b010 871 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 872 name = ++input_line_pointer;
873
3882b010 874 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 875 return FALSE;
252b5132
RH		 876
877 c = get_symbol_end ();
878 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
879
468cced8
AM		 880 /* Put back the delimiting char. */
881 *input_line_pointer = c;
882
99a814a1 883 /* Look to see if it's in the register table. */
81d4177b 884 if (reg_number >= 0)
252b5132
RH		 885 {
886 expressionP->X_op = O_register;
887 expressionP->X_add_number = reg_number;
81d4177b 888
99a814a1 889 /* Make the rest nice. */
252b5132
RH		 890 expressionP->X_add_symbol = NULL;
891 expressionP->X_op_symbol = NULL;
b34976b6 892 return TRUE;
252b5132 893 }
468cced8
AM		 894
895 /* Reset the line as if we had not done anything. */
896 input_line_pointer = start;
b34976b6 897 return FALSE;
252b5132
RH		 898}
899\f
900/* This function is called for each symbol seen in an expression. It
901 handles the special parsing which PowerPC assemblers are supposed
902 to use for condition codes. */
903
904/* Whether to do the special parsing. */
b34976b6 905static bfd_boolean cr_operand;
252b5132
RH		 906
907/* Names to recognize in a condition code. This table is sorted. */
908static const struct pd_reg cr_names[] =
909{
910 { "cr0", 0 },
911 { "cr1", 1 },
912 { "cr2", 2 },
913 { "cr3", 3 },
914 { "cr4", 4 },
915 { "cr5", 5 },
916 { "cr6", 6 },
917 { "cr7", 7 },
918 { "eq", 2 },
919 { "gt", 1 },
920 { "lt", 0 },
921 { "so", 3 },
922 { "un", 3 }
923};
924
925/* Parsing function. This returns non-zero if it recognized an
926 expression. */
927
928int
91d6fa6a 929ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 930{
931 int val;
932
933 if (! cr_operand)
934 return 0;
935
13abbae3
AM		 936 if (*name == '%')
937 ++name;
252b5132
RH		 938 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
939 name);
940 if (val < 0)
941 return 0;
942
91d6fa6a
NC		 943 exp->X_op = O_constant;
944 exp->X_add_number = val;
252b5132
RH		 945
946 return 1;
947}
948\f
949/* Local variables. */
950
2b3c4602
AM		 951/* Whether to target xcoff64/elf64. */
952static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 953
252b5132
RH		 954/* Opcode hash table. */
955static struct hash_control *ppc_hash;
956
957/* Macro hash table. */
958static struct hash_control *ppc_macro_hash;
959
960#ifdef OBJ_ELF
99a814a1 961/* What type of shared library support to use. */
5d6f4f16 962static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 963
99a814a1 964/* Flags to set in the elf header. */
252b5132
RH		 965static flagword ppc_flags = 0;
966
967/* Whether this is Solaris or not. */
968#ifdef TARGET_SOLARIS_COMMENT
b34976b6 969#define SOLARIS_P TRUE
252b5132 970#else
b34976b6 971#define SOLARIS_P FALSE
252b5132
RH		 972#endif
973
b34976b6 974static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 975#endif
976
977#ifdef OBJ_XCOFF
978
979/* The RS/6000 assembler uses the .csect pseudo-op to generate code
980 using a bunch of different sections. These assembler sections,
981 however, are all encompassed within the .text or .data sections of
982 the final output file. We handle this by using different
983 subsegments within these main segments. */
984
985/* Next subsegment to allocate within the .text segment. */
986static subsegT ppc_text_subsegment = 2;
987
988/* Linked list of csects in the text section. */
989static symbolS *ppc_text_csects;
990
991/* Next subsegment to allocate within the .data segment. */
992static subsegT ppc_data_subsegment = 2;
993
994/* Linked list of csects in the data section. */
995static symbolS *ppc_data_csects;
996
997/* The current csect. */
998static symbolS *ppc_current_csect;
999
1000/* The RS/6000 assembler uses a TOC which holds addresses of functions
1001 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1002 A special relocation is used when accessing TOC entries. We handle
1003 the TOC as a subsegment within the .data segment. We set it up if
1004 we see a .toc pseudo-op, and save the csect symbol here. */
1005static symbolS *ppc_toc_csect;
1006
1007/* The first frag in the TOC subsegment. */
1008static fragS *ppc_toc_frag;
1009
1010/* The first frag in the first subsegment after the TOC in the .data
1011 segment. NULL if there are no subsegments after the TOC. */
1012static fragS *ppc_after_toc_frag;
1013
1014/* The current static block. */
1015static symbolS *ppc_current_block;
1016
1017/* The COFF debugging section; set by md_begin. This is not the
1018 .debug section, but is instead the secret BFD section which will
1019 cause BFD to set the section number of a symbol to N_DEBUG. */
1020static asection *ppc_coff_debug_section;
1021
85645aed
TG		 1022/* Structure to set the length field of the dwarf sections. */
1023struct dw_subsection {
1024 /* Subsections are simply linked. */
1025 struct dw_subsection *link;
1026
1027 /* The subsection number. */
1028 subsegT subseg;
1029
1030 /* Expression to compute the length of the section. */
1031 expressionS end_exp;
1032};
1033
1034static struct dw_section {
1035 /* Corresponding section. */
1036 segT sect;
1037
1038 /* Simply linked list of subsections with a label. */
1039 struct dw_subsection *list_subseg;
1040
1041 /* The anonymous subsection. */
1042 struct dw_subsection *anon_subseg;
1043} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1044#endif /* OBJ_XCOFF */
1045
1046#ifdef TE_PE
1047
1048/* Various sections that we need for PE coff support. */
1049static segT ydata_section;
1050static segT pdata_section;
1051static segT reldata_section;
1052static segT rdata_section;
1053static segT tocdata_section;
1054
81d4177b 1055/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1056static segT ppc_previous_section;
1057static segT ppc_current_section;
1058
1059#endif /* TE_PE */
1060
1061#ifdef OBJ_ELF
1062symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1063#define PPC_APUINFO_ISEL 0x40
1064#define PPC_APUINFO_PMR 0x41
1065#define PPC_APUINFO_RFMCI 0x42
1066#define PPC_APUINFO_CACHELCK 0x43
1067#define PPC_APUINFO_SPE 0x100
1068#define PPC_APUINFO_EFS 0x101
1069#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1070#define PPC_APUINFO_VLE 0x104
6a0c61b7 1071
b34976b6
AM		 1072/*
1073 * We keep a list of APUinfo
6a0c61b7
EZ		 1074 */
1075unsigned long *ppc_apuinfo_list;
1076unsigned int ppc_apuinfo_num;
1077unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1078#endif /* OBJ_ELF */
1079\f
1080#ifdef OBJ_ELF
15c1449b 1081const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1082#else
15c1449b 1083const char *const md_shortopts = "um:";
252b5132 1084#endif
cef4f754 1085#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1086const struct option md_longopts[] = {
cef4f754 1087 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1088 {NULL, no_argument, NULL, 0}
1089};
15c1449b 1090const size_t md_longopts_size = sizeof (md_longopts);
252b5132 1091
b9c361e0
JL		 1092/* Convert the target integer stored in N bytes in BUF to a host
1093 integer, returning that value. */
1094
1095static valueT
1096md_chars_to_number (char *buf, int n)
1097{
1098 valueT result = 0;
1099 unsigned char *p = (unsigned char *) buf;
1100
1101 if (target_big_endian)
1102 {
1103 while (n--)
1104 {
1105 result <<= 8;
1106 result |= (*p++ & 0xff);
1107 }
1108 }
1109 else
1110 {
1111 while (n--)
1112 {
1113 result <<= 8;
1114 result |= (p[n] & 0xff);
1115 }
1116 }
1117
1118 return result;
1119}
1120
252b5132 1121int
98027b10 1122md_parse_option (int c, char *arg)
252b5132 1123{
69fe9ce5
AM		 1124 ppc_cpu_t new_cpu;
1125
252b5132
RH		 1126 switch (c)
1127 {
1128 case 'u':
1129 /* -u means that any undefined symbols should be treated as
1130 external, which is the default for gas anyhow. */
1131 break;
1132
1133#ifdef OBJ_ELF
1134 case 'l':
1135 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1136 sake, recognize -be also. */
252b5132
RH		 1137 if (strcmp (arg, "e") == 0)
1138 {
1139 target_big_endian = 0;
1140 set_target_endian = 1;
b9c361e0 1141 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1142 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1143 }
1144 else
1145 return 0;
1146
1147 break;
1148
1149 case 'b':
1150 if (strcmp (arg, "e") == 0)
1151 {
1152 target_big_endian = 1;
1153 set_target_endian = 1;
1154 }
1155 else
1156 return 0;
1157
1158 break;
1159
1160 case 'K':
99a814a1 1161 /* Recognize -K PIC. */
252b5132
RH		 1162 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1163 {
1164 shlib = SHLIB_PIC;
1165 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1166 }
1167 else
1168 return 0;
1169
1170 break;
1171#endif
1172
7f6d05e8
CP		 1173 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1174 case 'a':
1175 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1176 {
1177#ifdef BFD64
1178 ppc_obj64 = 1;
d6ed37ed
AM		 1179 if (ppc_cpu & PPC_OPCODE_VLE)
1180 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1181#else
1182 as_fatal (_("%s unsupported"), "-a64");
1183#endif
1184 }
7f6d05e8 1185 else if (strcmp (arg, "32") == 0)
2b3c4602 1186 ppc_obj64 = 0;
7f6d05e8
CP		 1187 else
1188 return 0;
1189 break;
81d4177b 1190
252b5132 1191 case 'm':
b9c361e0
JL		 1192 new_cpu = ppc_parse_cpu (ppc_cpu, arg);
1193 if (new_cpu != 0)
1194 {
1195 ppc_cpu = new_cpu;
d6ed37ed
AM		 1196 if (strcmp (arg, "vle") == 0)
1197 {
1198 if (set_target_endian && target_big_endian == 0)
1199 as_bad (_("the use of -mvle requires big endian."));
1200 if (ppc_obj64)
1201 as_bad (_("the use of -mvle requires -a32."));
1202 }
b9c361e0 1203 }
252b5132
RH		 1204
1205 else if (strcmp (arg, "regnames") == 0)
b34976b6 1206 reg_names_p = TRUE;
252b5132
RH		 1207
1208 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1209 reg_names_p = FALSE;
252b5132
RH		 1210
1211#ifdef OBJ_ELF
99a814a1
AM		 1212 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1213 that require relocation. */
252b5132
RH		 1214 else if (strcmp (arg, "relocatable") == 0)
1215 {
5d6f4f16 1216 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1217 ppc_flags |= EF_PPC_RELOCATABLE;
1218 }
1219
1220 else if (strcmp (arg, "relocatable-lib") == 0)
1221 {
5d6f4f16 1222 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1223 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1224 }
1225
99a814a1 1226 /* -memb, set embedded bit. */
252b5132
RH		 1227 else if (strcmp (arg, "emb") == 0)
1228 ppc_flags |= EF_PPC_EMB;
1229
cc643b88 1230 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1231 else if (strcmp (arg, "little") == 0
1232 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1233 {
1234 target_big_endian = 0;
1235 set_target_endian = 1;
b9c361e0 1236 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1237 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1238 }
1239
1240 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1241 {
1242 target_big_endian = 1;
1243 set_target_endian = 1;
1244 }
1245
1246 else if (strcmp (arg, "solaris") == 0)
1247 {
b34976b6 1248 msolaris = TRUE;
252b5132
RH		 1249 ppc_comment_chars = ppc_solaris_comment_chars;
1250 }
1251
1252 else if (strcmp (arg, "no-solaris") == 0)
1253 {
b34976b6 1254 msolaris = FALSE;
252b5132
RH		 1255 ppc_comment_chars = ppc_eabi_comment_chars;
1256 }
1257#endif
1258 else
1259 {
1260 as_bad (_("invalid switch -m%s"), arg);
1261 return 0;
1262 }
1263 break;
1264
1265#ifdef OBJ_ELF
1266 /* -V: SVR4 argument to print version ID. */
1267 case 'V':
1268 print_version_id ();
1269 break;
1270
1271 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1272 should be emitted or not. FIXME: Not implemented. */
1273 case 'Q':
1274 break;
1275
1276 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1277 rather than .stabs.excl, which is ignored by the linker.
1278 FIXME: Not implemented. */
1279 case 's':
1280 if (arg)
1281 return 0;
1282
1283 break;
1284#endif
1285
cef4f754
AM		 1286 case OPTION_NOPS:
1287 {
1288 char *end;
1289 nop_limit = strtoul (optarg, &end, 0);
1290 if (*end)
1291 as_bad (_("--nops needs a numeric argument"));
1292 }
1293 break;
85645aed 1294
252b5132
RH		 1295 default:
1296 return 0;
1297 }
1298
1299 return 1;
1300}
1301
1302void
98027b10 1303md_show_usage (FILE *stream)
252b5132 1304{
bc805888 1305 fprintf (stream, _("\
252b5132 1306PowerPC options:\n\
ce3d2015
AM		 1307-a32 generate ELF32/XCOFF32\n\
1308-a64 generate ELF64/XCOFF64\n\
1309-u ignored\n\
1310-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1311-mpwr generate code for POWER (RIOS1)\n\
1312-m601 generate code for PowerPC 601\n\
418c1742 1313-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1314 generate code for PowerPC 603/604\n\
1315-m403 generate code for PowerPC 403\n\
1316-m405 generate code for PowerPC 405\n\
1317-m440 generate code for PowerPC 440\n\
1318-m464 generate code for PowerPC 464\n\
1319-m476 generate code for PowerPC 476\n\
f5c120c5 1320-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1321 generate code for PowerPC 7400/7410/7450/7455\n\
1322-m750cl generate code for PowerPC 750cl\n"));
df12615d 1323 fprintf (stream, _("\
ce3d2015
AM		 1324-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1325-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1326-mbooke generate code for 32-bit PowerPC BookE\n\
1327-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1328-mpower4, -mpwr4 generate code for Power4 architecture\n\
1329-mpower5, -mpwr5, -mpwr5x\n\
1330 generate code for Power5 architecture\n\
1331-mpower6, -mpwr6 generate code for Power6 architecture\n\
1332-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1333-mcell generate code for Cell Broadband Engine architecture\n\
1334-mcom generate code Power/PowerPC common instructions\n\
1335-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1336 fprintf (stream, _("\
ce3d2015
AM		 1337-maltivec generate code for AltiVec\n\
1338-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1339-me300 generate code for PowerPC e300 family\n\
1340-me500, -me500x2 generate code for Motorola e500 core complex\n\
1341-me500mc, generate code for Freescale e500mc core complex\n\
1342-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1343-me5500, generate code for Freescale e5500 core complex\n\
1344-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1345-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1346-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1347-mtitan generate code for AppliedMicro Titan core complex\n\
1348-mregnames Allow symbolic names for registers\n\
1349-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1350#ifdef OBJ_ELF
bc805888 1351 fprintf (stream, _("\
ce3d2015
AM		 1352-mrelocatable support for GCC's -mrelocatble option\n\
1353-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1354-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1355-mlittle, -mlittle-endian, -le\n\
ce3d2015 1356 generate code for a little endian machine\n\
b8b738ac 1357-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1358 generate code for a big endian machine\n\
1359-msolaris generate code for Solaris\n\
1360-mno-solaris do not generate code for Solaris\n\
b8b738ac 1361-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1362-V print assembler version number\n\
1363-Qy, -Qn ignored\n"));
252b5132 1364#endif
cef4f754
AM		 1365 fprintf (stream, _("\
1366-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1367}
1368\f
1369/* Set ppc_cpu if it is not already set. */
1370
1371static void
98027b10 1372ppc_set_cpu (void)
252b5132
RH		 1373{
1374 const char *default_os = TARGET_OS;
1375 const char *default_cpu = TARGET_CPU;
1376
7102e95e 1377 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1378 {
2a98c3a6 1379 if (ppc_obj64)
bdc70b4a 1380 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1381 else if (strncmp (default_os, "aix", 3) == 0
1382 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1383 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1384 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1385 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1386 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1387 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1388 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1389 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1390 else
d6ed37ed 1391 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1392 default_cpu, default_os);
252b5132
RH		 1393 }
1394}
1395
9232bbb0
AM		 1396/* Figure out the BFD architecture to use. This function and ppc_mach
1397 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1398
1399enum bfd_architecture
98027b10 1400ppc_arch (void)
252b5132
RH		 1401{
1402 const char *default_cpu = TARGET_CPU;
1403 ppc_set_cpu ();
1404
1405 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1406 return bfd_arch_powerpc;
b9c361e0
JL		 1407 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1408 return bfd_arch_powerpc;
1409 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1410 return bfd_arch_rs6000;
b9c361e0 1411 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1412 {
1413 if (strcmp (default_cpu, "rs6000") == 0)
1414 return bfd_arch_rs6000;
0baf16f2 1415 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1416 return bfd_arch_powerpc;
1417 }
1418
d6ed37ed 1419 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1420 return bfd_arch_unknown;
1421}
1422
7f6d05e8 1423unsigned long
98027b10 1424ppc_mach (void)
7f6d05e8 1425{
2a98c3a6
AM		 1426 if (ppc_obj64)
1427 return bfd_mach_ppc64;
1428 else if (ppc_arch () == bfd_arch_rs6000)
1429 return bfd_mach_rs6k;
ce3d2015
AM		 1430 else if (ppc_cpu & PPC_OPCODE_TITAN)
1431 return bfd_mach_ppc_titan;
b9c361e0
JL		 1432 else if (ppc_cpu & PPC_OPCODE_VLE)
1433 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1434 else
1435 return bfd_mach_ppc;
7f6d05e8
CP		 1436}
1437
81d4177b 1438extern char*
98027b10 1439ppc_target_format (void)
7f6d05e8
CP		 1440{
1441#ifdef OBJ_COFF
1442#ifdef TE_PE
99a814a1 1443 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1444#elif TE_POWERMAC
0baf16f2 1445 return "xcoff-powermac";
7f6d05e8 1446#else
eb1e0e80 1447# ifdef TE_AIX5
edc1d652 1448 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1449# else
edc1d652 1450 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1451# endif
7f6d05e8 1452#endif
7f6d05e8
CP		 1453#endif
1454#ifdef OBJ_ELF
edc1d652
AM		 1455# ifdef TE_FreeBSD
1456 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1457# elif defined (TE_VXWORKS)
9d8504b1
PB		 1458 return "elf32-powerpc-vxworks";
1459# else
0baf16f2 1460 return (target_big_endian
2b3c4602
AM		 1461 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1462 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1463# endif
7f6d05e8
CP		 1464#endif
1465}
1466
b9c361e0
JL		 1467/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1468 Return TRUE if there's a problem, otherwise FALSE. */
1469
1470static bfd_boolean
1471insn_validate (const struct powerpc_opcode *op)
1472{
1473 const unsigned char *o;
1474 unsigned long omask = op->mask;
1475
1476 /* The mask had better not trim off opcode bits. */
1477 if ((op->opcode & omask) != op->opcode)
1478 {
1479 as_bad (_("mask trims opcode bits for %s"), op->name);
1480 return TRUE;
1481 }
1482
1483 /* The operands must not overlap the opcode or each other. */
1484 for (o = op->operands; *o; ++o)
1485 {
1486 if (*o >= num_powerpc_operands)
1487 {
1488 as_bad (_("operand index error for %s"), op->name);
1489 return TRUE;
1490 }
1491 else
1492 {
1493 const struct powerpc_operand *operand = &powerpc_operands[*o];
1494 if (operand->shift != PPC_OPSHIFT_INV)
1495 {
1496 unsigned long mask;
1497
1498 if (operand->shift >= 0)
1499 mask = operand->bitm << operand->shift;
1500 else
1501 mask = operand->bitm >> -operand->shift;
1502 if (omask & mask)
1503 {
1504 as_bad (_("operand %d overlap in %s"),
1505 (int) (o - op->operands), op->name);
1506 return TRUE;
1507 }
1508 omask |= mask;
1509 }
1510 }
1511 }
1512 return FALSE;
1513}
1514
69c040df 1515/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1516 for .machine pseudo. */
252b5132 1517
69c040df
AM		 1518static void
1519ppc_setup_opcodes (void)
252b5132 1520{
98027b10 1521 const struct powerpc_opcode *op;
252b5132
RH		 1522 const struct powerpc_opcode *op_end;
1523 const struct powerpc_macro *macro;
1524 const struct powerpc_macro *macro_end;
b84bf58a 1525 bfd_boolean bad_insn = FALSE;
252b5132 1526
69c040df
AM		 1527 if (ppc_hash != NULL)
1528 hash_die (ppc_hash);
1529 if (ppc_macro_hash != NULL)
1530 hash_die (ppc_macro_hash);
252b5132
RH		 1531
1532 /* Insert the opcodes into a hash table. */
1533 ppc_hash = hash_new ();
1534
c43a438d 1535 if (ENABLE_CHECKING)
b84bf58a 1536 {
c43a438d 1537 unsigned int i;
b84bf58a 1538
c43a438d
AM		 1539 /* Check operand masks. Code here and in the disassembler assumes
1540 all the 1's in the mask are contiguous. */
1541 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1542 {
c43a438d
AM		 1543 unsigned long mask = powerpc_operands[i].bitm;
1544 unsigned long right_bit;
1545 unsigned int j;
1546
1547 right_bit = mask & -mask;
1548 mask += right_bit;
1549 right_bit = mask & -mask;
1550 if (mask != right_bit)
1551 {
1552 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1553 bad_insn = TRUE;
1554 }
1555 for (j = i + 1; j < num_powerpc_operands; ++j)
1556 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1557 sizeof (powerpc_operands[0])) == 0)
1558 {
1559 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1560 j, i);
1561 bad_insn = TRUE;
1562 }
b84bf58a
AM		 1563 }
1564 }
1565
252b5132
RH		 1566 op_end = powerpc_opcodes + powerpc_num_opcodes;
1567 for (op = powerpc_opcodes; op < op_end; op++)
1568 {
c43a438d 1569 if (ENABLE_CHECKING)
b84bf58a 1570 {
d815f1a9 1571 if (op != powerpc_opcodes)
8dbcd839 1572 {
b9c361e0
JL		 1573 int old_opcode = PPC_OP (op[-1].opcode);
1574 int new_opcode = PPC_OP (op[0].opcode);
1575
1576#ifdef PRINT_OPCODE_TABLE
1577 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1578 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1579 (unsigned int) op->opcode, (unsigned int) op->mask,
1580 (unsigned long long) op->flags);
1581#endif
1582
d815f1a9
AM		 1583 /* The major opcodes had better be sorted. Code in the
1584 disassembler assumes the insns are sorted according to
1585 major opcode. */
b9c361e0 1586 if (new_opcode < old_opcode)
d815f1a9
AM		 1587 {
1588 as_bad (_("major opcode is not sorted for %s"),
1589 op->name);
1590 bad_insn = TRUE;
1591 }
8dbcd839 1592 }
b9c361e0
JL		 1593 bad_insn |= insn_validate (op);
1594 }
c43a438d 1595
b9c361e0
JL		 1596 if ((ppc_cpu & op->flags) != 0
1597 && !(ppc_cpu & op->deprecated))
1598 {
1599 const char *retval;
1600
1601 retval = hash_insert (ppc_hash, op->name, (void *) op);
1602 if (retval != NULL)
c43a438d 1603 {
b9c361e0 1604 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1605 op->name);
1606 bad_insn = TRUE;
1607 }
b9c361e0
JL		 1608 }
1609 }
c43a438d 1610
b9c361e0
JL		 1611 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1612 for (op = powerpc_opcodes; op < op_end; op++)
1613 hash_insert (ppc_hash, op->name, (void *) op);
1614
1615 op_end = vle_opcodes + vle_num_opcodes;
1616 for (op = vle_opcodes; op < op_end; op++)
1617 {
1618 if (ENABLE_CHECKING)
1619 {
1620 if (op != vle_opcodes)
1621 {
1622 unsigned old_seg, new_seg;
1623
1624 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1625 old_seg = VLE_OP_TO_SEG (old_seg);
1626 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1627 new_seg = VLE_OP_TO_SEG (new_seg);
1628
1629#ifdef PRINT_OPCODE_TABLE
1630 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1631 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1632 (unsigned int) op->opcode, (unsigned int) op->mask,
1633 (unsigned long long) op->flags);
1634#endif
1635 /* The major opcodes had better be sorted. Code in the
1636 disassembler assumes the insns are sorted according to
1637 major opcode. */
1638 if (new_seg < old_seg)
1639 {
1640 as_bad (_("major opcode is not sorted for %s"),
1641 op->name);
1642 bad_insn = TRUE;
1643 }
1644 }
1645
1646 bad_insn |= insn_validate (op);
c43a438d 1647 }
252b5132 1648
bdc70b4a 1649 if ((ppc_cpu & op->flags) != 0
1cb0a767 1650 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1651 {
1652 const char *retval;
1653
98027b10 1654 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1655 if (retval != NULL)
252b5132 1656 {
b84bf58a 1657 as_bad (_("duplicate instruction %s"),
99a814a1 1658 op->name);
b84bf58a 1659 bad_insn = TRUE;
252b5132
RH		 1660 }
1661 }
1662 }
1663
b9c361e0
JL		 1664 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1665 for (op = vle_opcodes; op < op_end; op++)
98027b10 1666 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1667
252b5132
RH		 1668 /* Insert the macros into a hash table. */
1669 ppc_macro_hash = hash_new ();
1670
1671 macro_end = powerpc_macros + powerpc_num_macros;
1672 for (macro = powerpc_macros; macro < macro_end; macro++)
1673 {
33740db9 1674 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1675 {
1676 const char *retval;
1677
98027b10 1678 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1679 if (retval != (const char *) NULL)
1680 {
b84bf58a
AM		 1681 as_bad (_("duplicate macro %s"), macro->name);
1682 bad_insn = TRUE;
252b5132
RH		 1683 }
1684 }
1685 }
1686
b84bf58a 1687 if (bad_insn)
252b5132 1688 abort ();
69c040df
AM		 1689}
1690
1691/* This function is called when the assembler starts up. It is called
1692 after the options have been parsed and the output file has been
1693 opened. */
1694
1695void
98027b10 1696md_begin (void)
69c040df
AM		 1697{
1698 ppc_set_cpu ();
1699
1700 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1701 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1702
1703#ifdef OBJ_ELF
1704 /* Set the ELF flags if desired. */
1705 if (ppc_flags && !msolaris)
1706 bfd_set_private_flags (stdoutput, ppc_flags);
1707#endif
1708
1709 ppc_setup_opcodes ();
252b5132 1710
67c1ffbe 1711 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1712 by the user. */
252b5132
RH		 1713 if (!set_target_endian)
1714 {
1715 set_target_endian = 1;
1716 target_big_endian = PPC_BIG_ENDIAN;
1717 }
1718
1719#ifdef OBJ_XCOFF
1720 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1721
1722 /* Create dummy symbols to serve as initial csects. This forces the
1723 text csects to precede the data csects. These symbols will not
1724 be output. */
1725 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1726 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1727 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1728 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1729#endif
1730
1731#ifdef TE_PE
1732
1733 ppc_current_section = text_section;
81d4177b 1734 ppc_previous_section = 0;
252b5132
RH		 1735
1736#endif
1737}
1738
6a0c61b7 1739void
98027b10 1740ppc_cleanup (void)
6a0c61b7 1741{
dc1d03fc 1742#ifdef OBJ_ELF
6a0c61b7
EZ		 1743 if (ppc_apuinfo_list == NULL)
1744 return;
1745
1746 /* Ok, so write the section info out. We have this layout:
1747
1748 byte data what
1749 ---- ---- ----
1750 0 8 length of "APUinfo\0"
1751 4 (n*4) number of APU's (4 bytes each)
1752 8 2 note type 2
1753 12 "APUinfo\0" name
1754 20 APU#1 first APU's info
1755 24 APU#2 second APU's info
1756 ... ...
1757 */
1758 {
1759 char *p;
1760 asection *seg = now_seg;
1761 subsegT subseg = now_subseg;
1762 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1763 unsigned int i;
6a0c61b7
EZ		 1764
1765 /* Create the .PPC.EMB.apuinfo section. */
1766 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1767 bfd_set_section_flags (stdoutput,
1768 apuinfo_secp,
e1a9cb8e 1769 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1770
1771 p = frag_more (4);
1772 md_number_to_chars (p, (valueT) 8, 4);
1773
1774 p = frag_more (4);
e98d298c 1775 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1776
1777 p = frag_more (4);
1778 md_number_to_chars (p, (valueT) 2, 4);
1779
1780 p = frag_more (8);
1781 strcpy (p, "APUinfo");
1782
1783 for (i = 0; i < ppc_apuinfo_num; i++)
1784 {
b34976b6
AM		 1785 p = frag_more (4);
1786 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1787 }
1788
1789 frag_align (2, 0, 0);
1790
1791 /* We probably can't restore the current segment, for there likely
1792 isn't one yet... */
1793 if (seg && subseg)
1794 subseg_set (seg, subseg);
1795 }
dc1d03fc 1796#endif
6a0c61b7
EZ		 1797}
1798
252b5132
RH		 1799/* Insert an operand value into an instruction. */
1800
1801static unsigned long
a1867a27
AM		 1802ppc_insert_operand (unsigned long insn,
1803 const struct powerpc_operand *operand,
1804 offsetT val,
91d6fa6a 1805 ppc_cpu_t cpu,
a1867a27
AM		 1806 char *file,
1807 unsigned int line)
252b5132 1808{
b84bf58a 1809 long min, max, right;
eb42fac1 1810
b84bf58a
AM		 1811 max = operand->bitm;
1812 right = max & -max;
1813 min = 0;
1814
1815 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1816 {
b84bf58a 1817 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1818 max = (max >> 1) & -right;
1819 min = ~max & -right;
b84bf58a 1820 }
252b5132 1821
b84bf58a 1822 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1823 max++;
252b5132 1824
b84bf58a 1825 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1826 {
1827 long tmp = min;
1828 min = -max;
1829 max = -tmp;
1830 }
b84bf58a 1831
a1867a27
AM		 1832 if (min <= max)
1833 {
1834 /* Some people write constants with the sign extension done by
1835 hand but only up to 32 bits. This shouldn't really be valid,
1836 but, to permit this code to assemble on a 64-bit host, we
1837 sign extend the 32-bit value to 64 bits if so doing makes the
1838 value valid. */
1839 if (val > max
1840 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1841 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1842 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1843 val = val - 0x80000000 - 0x80000000;
1844
1845 /* Similarly, people write expressions like ~(1<<15), and expect
1846 this to be OK for a 32-bit unsigned value. */
1847 else if (val < min
1848 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1849 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1850 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1851 val = val + 0x80000000 + 0x80000000;
1852
1853 else if (val < min
1854 || val > max
1855 || (val & (right - 1)) != 0)
1856 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1857 }
b84bf58a 1858
252b5132
RH		 1859 if (operand->insert)
1860 {
1861 const char *errmsg;
1862
1863 errmsg = NULL;
91d6fa6a 1864 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1865 if (errmsg != (const char *) NULL)
ee2c9aa9 1866 as_bad_where (file, line, "%s", errmsg);
252b5132 1867 }
b9c361e0 1868 else if (operand->shift >= 0)
b84bf58a 1869 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1870 else
1871 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1872
1873 return insn;
1874}
1875
1876\f
1877#ifdef OBJ_ELF
1878/* Parse @got, etc. and return the desired relocation. */
1879static bfd_reloc_code_real_type
98027b10 1880ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1881{
1882 struct map_bfd {
1883 char *string;
b7d7dc63
AM		 1884 unsigned int length : 8;
1885 unsigned int valid32 : 1;
1886 unsigned int valid64 : 1;
1887 unsigned int reloc;
252b5132
RH		 1888 };
1889
1890 char ident[20];
1891 char *str = *str_p;
1892 char *str2;
1893 int ch;
1894 int len;
15c1449b 1895 const struct map_bfd *ptr;
252b5132 1896
b7d7dc63
AM		 1897#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1898#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1899#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1900
15c1449b 1901 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1902 MAP ("l", BFD_RELOC_LO16),
1903 MAP ("h", BFD_RELOC_HI16),
1904 MAP ("ha", BFD_RELOC_HI16_S),
1905 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1906 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1907 MAP ("got", BFD_RELOC_16_GOTOFF),
1908 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1909 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1910 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1911 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1912 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1913 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1914 MAP ("copy", BFD_RELOC_PPC_COPY),
1915 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1916 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1917 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1918 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1919 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1920 MAP ("tls", BFD_RELOC_PPC_TLS),
1921 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1922 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1923 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1924 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1925 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1926 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1927 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1928 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1929 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1930 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1931 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1932 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1933 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1934 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1935 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1936 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1937 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1938 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1939 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1940 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1941 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1942 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1943 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1944 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1945 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1946 MAP32 ("fixup", BFD_RELOC_CTOR),
1947 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1948 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1949 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1950 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1951 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1952 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1953 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1954 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1955 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1956 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1957 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1958 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1959 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1960 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1961 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1962 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1963 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1964 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1965 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1966 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1967 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1968 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1969 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1970 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1971 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1972 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1973 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1974 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1975 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1976 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1977 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1978 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1979 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1980 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1981 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1982 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1983 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1984 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1985 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1986 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1987 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1988 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1989 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1990 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1991 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1992 };
1993
1994 if (*str++ != '@')
1995 return BFD_RELOC_UNUSED;
1996
1997 for (ch = *str, str2 = ident;
1998 (str2 < ident + sizeof (ident) - 1
3882b010 1999 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 2000 ch = *++str)
2001 {
3882b010 2002 *str2++ = TOLOWER (ch);
252b5132
RH		 2003 }
2004
2005 *str2 = '\0';
2006 len = str2 - ident;
2007
2008 ch = ident[0];
2009 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2010 if (ch == ptr->string[0]
2011 && len == ptr->length
b7d7dc63
AM		 2012 && memcmp (ident, ptr->string, ptr->length) == 0
2013 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2014 {
15c1449b
AM		 2015 int reloc = ptr->reloc;
2016
727fc41e
AM		 2017 if (!ppc_obj64 && exp_p->X_add_number != 0)
2018 {
2019 switch (reloc)
2020 {
2021 case BFD_RELOC_16_GOTOFF:
2022 case BFD_RELOC_LO16_GOTOFF:
2023 case BFD_RELOC_HI16_GOTOFF:
2024 case BFD_RELOC_HI16_S_GOTOFF:
2025 as_warn (_("identifier+constant@got means "
2026 "identifier@got+constant"));
2027 break;
2028
2029 case BFD_RELOC_PPC_GOT_TLSGD16:
2030 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2031 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2032 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2033 case BFD_RELOC_PPC_GOT_TLSLD16:
2034 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2035 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2036 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2037 case BFD_RELOC_PPC_GOT_DTPREL16:
2038 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2039 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2040 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2041 case BFD_RELOC_PPC_GOT_TPREL16:
2042 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2043 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2044 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2045 as_bad (_("symbol+offset not supported for got tls"));
2046 break;
2047 }
2048 }
5f6db75a
AM		 2049
2050 /* Now check for identifier@suffix+constant. */
2051 if (*str == '-' || *str == '+')
252b5132 2052 {
5f6db75a
AM		 2053 char *orig_line = input_line_pointer;
2054 expressionS new_exp;
2055
2056 input_line_pointer = str;
2057 expression (&new_exp);
2058 if (new_exp.X_op == O_constant)
252b5132 2059 {
5f6db75a
AM		 2060 exp_p->X_add_number += new_exp.X_add_number;
2061 str = input_line_pointer;
252b5132 2062 }
5f6db75a
AM		 2063
2064 if (&input_line_pointer != str_p)
2065 input_line_pointer = orig_line;
252b5132 2066 }
252b5132 2067 *str_p = str;
0baf16f2 2068
2b3c4602 2069 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2070 && exp_p->X_op == O_symbol
2071 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2072 {
9f2b53d7
AM		 2073 /* Change the symbol so that the dummy .TOC. symbol can be
2074 omitted from the object file. */
0baf16f2
AM		 2075 exp_p->X_add_symbol = &abs_symbol;
2076 }
2077
15c1449b 2078 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2079 }
2080
2081 return BFD_RELOC_UNUSED;
2082}
2083
99a814a1
AM		 2084/* Like normal .long/.short/.word, except support @got, etc.
2085 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2086static void
98027b10 2087ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2088{
2089 expressionS exp;
2090 bfd_reloc_code_real_type reloc;
2091
2092 if (is_it_end_of_statement ())
2093 {
2094 demand_empty_rest_of_line ();
2095 return;
2096 }
2097
2098 do
2099 {
2100 expression (&exp);
2101 if (exp.X_op == O_symbol
2102 && *input_line_pointer == '@'
99a814a1
AM		 2103 && (reloc = ppc_elf_suffix (&input_line_pointer,
2104 &exp)) != BFD_RELOC_UNUSED)
252b5132 2105 {
99a814a1
AM		 2106 reloc_howto_type *reloc_howto;
2107 int size;
2108
2109 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2110 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2111
2112 if (size > nbytes)
0baf16f2
AM		 2113 {
2114 as_bad (_("%s relocations do not fit in %d bytes\n"),
2115 reloc_howto->name, nbytes);
2116 }
252b5132
RH		 2117 else
2118 {
0baf16f2
AM		 2119 char *p;
2120 int offset;
252b5132 2121
0baf16f2 2122 p = frag_more (nbytes);
aa0c8c1a 2123 memset (p, 0, nbytes);
0baf16f2
AM		 2124 offset = 0;
2125 if (target_big_endian)
2126 offset = nbytes - size;
99a814a1
AM		 2127 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2128 &exp, 0, reloc);
252b5132
RH		 2129 }
2130 }
2131 else
2132 emit_expr (&exp, (unsigned int) nbytes);
2133 }
2134 while (*input_line_pointer++ == ',');
2135
99a814a1
AM		 2136 /* Put terminator back into stream. */
2137 input_line_pointer--;
252b5132
RH		 2138 demand_empty_rest_of_line ();
2139}
2140
2141/* Solaris pseduo op to change to the .rodata section. */
2142static void
98027b10 2143ppc_elf_rdata (int xxx)
252b5132
RH		 2144{
2145 char *save_line = input_line_pointer;
2146 static char section[] = ".rodata\n";
2147
99a814a1 2148 /* Just pretend this is .section .rodata */
252b5132
RH		 2149 input_line_pointer = section;
2150 obj_elf_section (xxx);
2151
2152 input_line_pointer = save_line;
2153}
2154
99a814a1 2155/* Pseudo op to make file scope bss items. */
252b5132 2156static void
98027b10 2157ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2158{
98027b10
AM		 2159 char *name;
2160 char c;
2161 char *p;
252b5132 2162 offsetT size;
98027b10 2163 symbolS *symbolP;
252b5132
RH		 2164 offsetT align;
2165 segT old_sec;
2166 int old_subsec;
2167 char *pfrag;
2168 int align2;
2169
2170 name = input_line_pointer;
2171 c = get_symbol_end ();
2172
99a814a1 2173 /* just after name is now '\0'. */
252b5132
RH		 2174 p = input_line_pointer;
2175 *p = c;
2176 SKIP_WHITESPACE ();
2177 if (*input_line_pointer != ',')
2178 {
d6ed37ed 2179 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2180 ignore_rest_of_line ();
2181 return;
2182 }
2183
2184 input_line_pointer++; /* skip ',' */
2185 if ((size = get_absolute_expression ()) < 0)
2186 {
2187 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2188 ignore_rest_of_line ();
2189 return;
2190 }
2191
2192 /* The third argument to .lcomm is the alignment. */
2193 if (*input_line_pointer != ',')
2194 align = 8;
2195 else
2196 {
2197 ++input_line_pointer;
2198 align = get_absolute_expression ();
2199 if (align <= 0)
2200 {
2201 as_warn (_("ignoring bad alignment"));
2202 align = 8;
2203 }
2204 }
2205
2206 *p = 0;
2207 symbolP = symbol_find_or_make (name);
2208 *p = c;
2209
2210 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2211 {
d6ed37ed 2212 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2213 S_GET_NAME (symbolP));
2214 ignore_rest_of_line ();
2215 return;
2216 }
2217
2218 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2219 {
d6ed37ed 2220 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2221 S_GET_NAME (symbolP),
2222 (long) S_GET_VALUE (symbolP),
2223 (long) size);
2224
2225 ignore_rest_of_line ();
2226 return;
2227 }
2228
99a814a1 2229 /* Allocate_bss. */
252b5132
RH		 2230 old_sec = now_seg;
2231 old_subsec = now_subseg;
2232 if (align)
2233 {
99a814a1 2234 /* Convert to a power of 2 alignment. */
252b5132
RH		 2235 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2236 if (align != 1)
2237 {
d6ed37ed 2238 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2239 ignore_rest_of_line ();
2240 return;
2241 }
2242 }
2243 else
2244 align2 = 0;
2245
2246 record_alignment (bss_section, align2);
2247 subseg_set (bss_section, 0);
2248 if (align2)
2249 frag_align (align2, 0, 0);
2250 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2251 symbol_get_frag (symbolP)->fr_symbol = 0;
2252 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2253 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2254 (char *) 0);
2255 *pfrag = 0;
2256 S_SET_SIZE (symbolP, size);
2257 S_SET_SEGMENT (symbolP, bss_section);
2258 subseg_set (old_sec, old_subsec);
2259 demand_empty_rest_of_line ();
2260}
2261
2262/* Validate any relocations emitted for -mrelocatable, possibly adding
2263 fixups for word relocations in writable segments, so we can adjust
2264 them at runtime. */
2265static void
98027b10 2266ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2267{
2268 if (fixp->fx_done || fixp->fx_pcrel)
2269 return;
2270
2271 switch (shlib)
2272 {
2273 case SHLIB_NONE:
2274 case SHLIB_PIC:
2275 return;
2276
5d6f4f16 2277 case SHLIB_MRELOCATABLE:
252b5132
RH		 2278 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2279 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2280 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2281 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2282 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2283 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2284 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2285 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2286 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2287 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2288 && strcmp (segment_name (seg), ".got2") != 0
2289 && strcmp (segment_name (seg), ".dtors") != 0
2290 && strcmp (segment_name (seg), ".ctors") != 0
2291 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2292 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2293 && strcmp (segment_name (seg), ".eh_frame") != 0
2294 && strcmp (segment_name (seg), ".ex_shared") != 0)
2295 {
2296 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2297 || fixp->fx_r_type != BFD_RELOC_CTOR)
2298 {
2299 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2300 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2301 }
2302 }
2303 return;
2304 }
2305}
0baf16f2 2306
7e8d4ab4
AM		 2307/* Prevent elf_frob_file_before_adjust removing a weak undefined
2308 function descriptor sym if the corresponding code sym is used. */
2309
2310void
98027b10 2311ppc_frob_file_before_adjust (void)
0baf16f2 2312{
7e8d4ab4 2313 symbolS *symp;
9232bbb0 2314 asection *toc;
0baf16f2 2315
7e8d4ab4
AM		 2316 if (!ppc_obj64)
2317 return;
2318
2319 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2320 {
7e8d4ab4
AM		 2321 const char *name;
2322 char *dotname;
2323 symbolS *dotsym;
2324 size_t len;
2325
2326 name = S_GET_NAME (symp);
2327 if (name[0] == '.')
2328 continue;
2329
2330 if (! S_IS_WEAK (symp)
2331 || S_IS_DEFINED (symp))
2332 continue;
2333
2334 len = strlen (name) + 1;
2335 dotname = xmalloc (len + 1);
2336 dotname[0] = '.';
2337 memcpy (dotname + 1, name, len);
461b725f 2338 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2339 free (dotname);
2340 if (dotsym != NULL && (symbol_used_p (dotsym)
2341 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2342 symbol_mark_used (symp);
2343
0baf16f2
AM		 2344 }
2345
9232bbb0
AM		 2346 toc = bfd_get_section_by_name (stdoutput, ".toc");
2347 if (toc != NULL
01efc3af 2348 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2349 && bfd_section_size (stdoutput, toc) > 0x10000)
2350 as_warn (_("TOC section size exceeds 64k"));
2351
7e8d4ab4
AM		 2352 /* Don't emit .TOC. symbol. */
2353 symp = symbol_find (".TOC.");
2354 if (symp != NULL)
2355 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2356}
252b5132
RH		 2357#endif /* OBJ_ELF */
2358\f
2359#ifdef TE_PE
2360
2361/*
99a814a1 2362 * Summary of parse_toc_entry.
252b5132
RH		 2363 *
2364 * in: Input_line_pointer points to the '[' in one of:
2365 *
2366 * [toc] [tocv] [toc32] [toc64]
2367 *
2368 * Anything else is an error of one kind or another.
2369 *
81d4177b 2370 * out:
252b5132
RH		 2371 * return value: success or failure
2372 * toc_kind: kind of toc reference
2373 * input_line_pointer:
2374 * success: first char after the ']'
2375 * failure: unchanged
2376 *
2377 * settings:
2378 *
2379 * [toc] - rv == success, toc_kind = default_toc
2380 * [tocv] - rv == success, toc_kind = data_in_toc
2381 * [toc32] - rv == success, toc_kind = must_be_32
2382 * [toc64] - rv == success, toc_kind = must_be_64
2383 *
2384 */
2385
81d4177b
KH		 2386enum toc_size_qualifier
2387{
252b5132
RH		 2388 default_toc, /* The toc cell constructed should be the system default size */
2389 data_in_toc, /* This is a direct reference to a toc cell */
2390 must_be_32, /* The toc cell constructed must be 32 bits wide */
2391 must_be_64 /* The toc cell constructed must be 64 bits wide */
2392};
2393
2394static int
98027b10 2395parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2396{
2397 char *start;
2398 char *toc_spec;
2399 char c;
2400 enum toc_size_qualifier t;
2401
99a814a1 2402 /* Save the input_line_pointer. */
252b5132
RH		 2403 start = input_line_pointer;
2404
99a814a1 2405 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2406 ++input_line_pointer;
2407 SKIP_WHITESPACE ();
81d4177b 2408
99a814a1 2409 /* Find the spelling of the operand. */
252b5132
RH		 2410 toc_spec = input_line_pointer;
2411 c = get_symbol_end ();
2412
99a814a1 2413 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2414 {
2415 t = default_toc;
2416 }
99a814a1 2417 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2418 {
2419 t = data_in_toc;
2420 }
99a814a1 2421 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2422 {
2423 t = must_be_32;
2424 }
99a814a1 2425 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2426 {
2427 t = must_be_64;
2428 }
2429 else
2430 {
2431 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2432 *input_line_pointer = c;
2433 input_line_pointer = start;
252b5132
RH		 2434 return 0;
2435 }
2436
99a814a1
AM		 2437 /* Now find the ']'. */
2438 *input_line_pointer = c;
252b5132 2439
81d4177b
KH		 2440 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2441 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2442
2443 if (c != ']')
2444 {
2445 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2446 input_line_pointer = start;
252b5132
RH		 2447 return 0;
2448 }
2449
99a814a1 2450 *toc_kind = t;
252b5132
RH		 2451 return 1;
2452}
2453#endif
2454\f
2455
dc1d03fc 2456#ifdef OBJ_ELF
6a0c61b7
EZ		 2457#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2458static void
98027b10 2459ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2460{
2461 unsigned int i;
2462
2463 /* Check we don't already exist. */
2464 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2465 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2466 return;
b34976b6 2467
6a0c61b7
EZ		 2468 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2469 {
2470 if (ppc_apuinfo_num_alloc == 0)
2471 {
2472 ppc_apuinfo_num_alloc = 4;
2473 ppc_apuinfo_list = (unsigned long *)
2474 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2475 }
2476 else
2477 {
2478 ppc_apuinfo_num_alloc += 4;
2479 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2480 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2481 }
2482 }
dc1d03fc 2483 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2484}
2485#undef APUID
dc1d03fc 2486#endif
6a0c61b7
EZ		 2487\f
2488
252b5132
RH		 2489/* We need to keep a list of fixups. We can't simply generate them as
2490 we go, because that would require us to first create the frag, and
2491 that would screw up references to ``.''. */
2492
2493struct ppc_fixup
2494{
2495 expressionS exp;
2496 int opindex;
2497 bfd_reloc_code_real_type reloc;
2498};
2499
2500#define MAX_INSN_FIXUPS (5)
2501
b9c361e0
JL		 2502/* Form I16L. */
2503#define E_OR2I_INSN 0x7000C000
2504#define E_AND2I_DOT_INSN 0x7000C800
2505#define E_OR2IS_INSN 0x7000D000
2506#define E_LIS_INSN 0x7000E000
2507#define E_AND2IS_DOT_INSN 0x7000E800
2508
2509/* Form I16A. */
2510#define E_ADD2I_DOT_INSN 0x70008800
2511#define E_ADD2IS_INSN 0x70009000
2512#define E_CMP16I_INSN 0x70009800
2513#define E_MULL2I_INSN 0x7000A000
2514#define E_CMPL16I_INSN 0x7000A800
2515#define E_CMPH16I_INSN 0x7000B000
2516#define E_CMPHL16I_INSN 0x7000B800
2517
252b5132
RH		 2518/* This routine is called for each instruction to be assembled. */
2519
2520void
98027b10 2521md_assemble (char *str)
252b5132
RH		 2522{
2523 char *s;
2524 const struct powerpc_opcode *opcode;
2525 unsigned long insn;
2526 const unsigned char *opindex_ptr;
2527 int skip_optional;
2528 int need_paren;
2529 int next_opindex;
2530 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2531 int fc;
2532 char *f;
09b935ac 2533 int addr_mod;
252b5132 2534 int i;
b9c361e0 2535 unsigned int insn_length;
252b5132
RH		 2536#ifdef OBJ_ELF
2537 bfd_reloc_code_real_type reloc;
2538#endif
2539
2540 /* Get the opcode. */
3882b010 2541 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2542 ;
2543 if (*s != '\0')
2544 *s++ = '\0';
2545
2546 /* Look up the opcode in the hash table. */
2547 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2548 if (opcode == (const struct powerpc_opcode *) NULL)
2549 {
2550 const struct powerpc_macro *macro;
2551
2552 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2553 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2554 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2555 else
2556 ppc_macro (s, macro);
2557
2558 return;
2559 }
2560
2561 insn = opcode->opcode;
2562
2563 str = s;
3882b010 2564 while (ISSPACE (*str))
252b5132
RH		 2565 ++str;
2566
2567 /* PowerPC operands are just expressions. The only real issue is
2568 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2569 an optional operand separate the operands only with commas (in some
2570 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2571 have optional operands). Most instructions with optional operands
2572 have only one. Those that have more than one optional operand can
2573 take either all their operands or none. So, before we start seriously
2574 parsing the operands, we check to see if we have optional operands,
2575 and if we do, we count the number of commas to see which operands
2576 have been omitted. */
252b5132
RH		 2577 skip_optional = 0;
2578 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2579 {
2580 const struct powerpc_operand *operand;
2581
2582 operand = &powerpc_operands[*opindex_ptr];
2583 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2584 {
2585 unsigned int opcount;
7fe9cf6b 2586 unsigned int num_operands_expected;
252b5132
RH		 2587
2588 /* There is an optional operand. Count the number of
2589 commas in the input line. */
2590 if (*str == '\0')
2591 opcount = 0;
2592 else
2593 {
2594 opcount = 1;
2595 s = str;
2596 while ((s = strchr (s, ',')) != (char *) NULL)
2597 {
2598 ++opcount;
2599 ++s;
2600 }
2601 }
2602
7fe9cf6b
NC		 2603 /* Compute the number of expected operands.
2604 Do not count fake operands. */
2605 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2606 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2607 ++ num_operands_expected;
2608
252b5132
RH		 2609 /* If there are fewer operands in the line then are called
2610 for by the instruction, we want to skip the optional
1f6c9eb0 2611 operands. */
7fe9cf6b 2612 if (opcount < num_operands_expected)
252b5132
RH		 2613 skip_optional = 1;
2614
2615 break;
2616 }
2617 }
2618
2619 /* Gather the operands. */
2620 need_paren = 0;
2621 next_opindex = 0;
2622 fc = 0;
2623 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2624 {
2625 const struct powerpc_operand *operand;
2626 const char *errmsg;
2627 char *hold;
2628 expressionS ex;
2629 char endc;
2630
2631 if (next_opindex == 0)
2632 operand = &powerpc_operands[*opindex_ptr];
2633 else
2634 {
2635 operand = &powerpc_operands[next_opindex];
2636 next_opindex = 0;
2637 }
252b5132
RH		 2638 errmsg = NULL;
2639
2640 /* If this is a fake operand, then we do not expect anything
2641 from the input. */
2642 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2643 {
2b3c4602 2644 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2645 if (errmsg != (const char *) NULL)
ee2c9aa9 2646 as_bad ("%s", errmsg);
252b5132
RH		 2647 continue;
2648 }
2649
2650 /* If this is an optional operand, and we are skipping it, just
2651 insert a zero. */
2652 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2653 && skip_optional)
2654 {
2655 if (operand->insert)
2656 {
2b3c4602 2657 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2658 if (errmsg != (const char *) NULL)
ee2c9aa9 2659 as_bad ("%s", errmsg);
252b5132
RH		 2660 }
2661 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2662 next_opindex = *opindex_ptr + 1;
2663 continue;
2664 }
2665
2666 /* Gather the operand. */
2667 hold = input_line_pointer;
2668 input_line_pointer = str;
2669
2670#ifdef TE_PE
81d4177b 2671 if (*input_line_pointer == '[')
252b5132
RH		 2672 {
2673 /* We are expecting something like the second argument here:
99a814a1
AM		 2674 *
2675 * lwz r4,[toc].GS.0.static_int(rtoc)
2676 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2677 * The argument following the `]' must be a symbol name, and the
2678 * register must be the toc register: 'rtoc' or '2'
2679 *
2680 * The effect is to 0 as the displacement field
2681 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2682 * the appropriate variation) reloc against it based on the symbol.
2683 * The linker will build the toc, and insert the resolved toc offset.
2684 *
2685 * Note:
2686 * o The size of the toc entry is currently assumed to be
2687 * 32 bits. This should not be assumed to be a hard coded
2688 * number.
2689 * o In an effort to cope with a change from 32 to 64 bits,
2690 * there are also toc entries that are specified to be
2691 * either 32 or 64 bits:
2692 * lwz r4,[toc32].GS.0.static_int(rtoc)
2693 * lwz r4,[toc64].GS.0.static_int(rtoc)
2694 * These demand toc entries of the specified size, and the
2695 * instruction probably requires it.
2696 */
252b5132
RH		 2697
2698 int valid_toc;
2699 enum toc_size_qualifier toc_kind;
2700 bfd_reloc_code_real_type toc_reloc;
2701
99a814a1
AM		 2702 /* Go parse off the [tocXX] part. */
2703 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2704
81d4177b 2705 if (!valid_toc)
252b5132 2706 {
99a814a1
AM		 2707 /* Note: message has already been issued.
2708 FIXME: what sort of recovery should we do?
2709 demand_rest_of_line (); return; ? */
252b5132
RH		 2710 }
2711
99a814a1
AM		 2712 /* Now get the symbol following the ']'. */
2713 expression (&ex);
252b5132
RH		 2714
2715 switch (toc_kind)
2716 {
2717 case default_toc:
99a814a1
AM		 2718 /* In this case, we may not have seen the symbol yet,
2719 since it is allowed to appear on a .extern or .globl
2720 or just be a label in the .data section. */
252b5132
RH		 2721 toc_reloc = BFD_RELOC_PPC_TOC16;
2722 break;
2723 case data_in_toc:
99a814a1
AM		 2724 /* 1. The symbol must be defined and either in the toc
2725 section, or a global.
2726 2. The reloc generated must have the TOCDEFN flag set
2727 in upper bit mess of the reloc type.
2728 FIXME: It's a little confusing what the tocv
2729 qualifier can be used for. At the very least, I've
2730 seen three uses, only one of which I'm sure I can
2731 explain. */
81d4177b
KH		 2732 if (ex.X_op == O_symbol)
2733 {
9c2799c2 2734 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2735 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2736 != tocdata_section)
252b5132 2737 {
99a814a1 2738 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2739 }
2740 }
2741
2742 toc_reloc = BFD_RELOC_PPC_TOC16;
2743 break;
2744 case must_be_32:
99a814a1
AM		 2745 /* FIXME: these next two specifically specify 32/64 bit
2746 toc entries. We don't support them today. Is this
2747 the right way to say that? */
252b5132 2748 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2749 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2750 break;
2751 case must_be_64:
99a814a1 2752 /* FIXME: see above. */
252b5132 2753 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2754 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2755 break;
2756 default:
bc805888 2757 fprintf (stderr,
99a814a1
AM		 2758 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2759 toc_kind);
bc805888 2760 abort ();
252b5132
RH		 2761 break;
2762 }
2763
2764 /* We need to generate a fixup for this expression. */
2765 if (fc >= MAX_INSN_FIXUPS)
2766 as_fatal (_("too many fixups"));
2767
2768 fixups[fc].reloc = toc_reloc;
2769 fixups[fc].exp = ex;
2770 fixups[fc].opindex = *opindex_ptr;
2771 ++fc;
2772
99a814a1
AM		 2773 /* Ok. We've set up the fixup for the instruction. Now make it
2774 look like the constant 0 was found here. */
252b5132
RH		 2775 ex.X_unsigned = 1;
2776 ex.X_op = O_constant;
2777 ex.X_add_number = 0;
2778 ex.X_add_symbol = NULL;
2779 ex.X_op_symbol = NULL;
2780 }
2781
2782 else
2783#endif /* TE_PE */
2784 {
b9c361e0
JL		 2785 if ((reg_names_p
2786 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2787 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2788 || !register_name (&ex))
252b5132 2789 {
13abbae3
AM		 2790 char save_lex = lex_type['%'];
2791
b9c361e0
JL		 2792 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2793 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2794 {
2795 cr_operand = TRUE;
2796 lex_type['%'] |= LEX_BEGIN_NAME;
2797 }
252b5132 2798 expression (&ex);
b34976b6 2799 cr_operand = FALSE;
13abbae3 2800 lex_type['%'] = save_lex;
252b5132
RH		 2801 }
2802 }
2803
2804 str = input_line_pointer;
2805 input_line_pointer = hold;
2806
2807 if (ex.X_op == O_illegal)
2808 as_bad (_("illegal operand"));
2809 else if (ex.X_op == O_absent)
2810 as_bad (_("missing operand"));
2811 else if (ex.X_op == O_register)
2812 {
2813 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2814 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2815 }
2816 else if (ex.X_op == O_constant)
2817 {
2818#ifdef OBJ_ELF
81d4177b 2819 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2820 char *orig_str = str;
2821
2822 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2823 switch (reloc)
2824 {
2825 default:
2826 str = orig_str;
2827 break;
2828
2829 case BFD_RELOC_LO16:
2830 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2831 something which cleared it, we always produce a
2832 signed value. */
2833 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2834 ex.X_add_number &= 0xffff;
2835 else
0baf16f2 2836 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2837 break;
2838
2839 case BFD_RELOC_HI16:
0baf16f2
AM		 2840 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2841 ex.X_add_number = PPC_HI (ex.X_add_number);
2842 else
2843 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2844 break;
2845
2846 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2847 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2848 ex.X_add_number = PPC_HA (ex.X_add_number);
2849 else
2850 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2851 break;
2852
0baf16f2
AM		 2853 case BFD_RELOC_PPC64_HIGHER:
2854 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2855 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2856 else
2857 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2858 break;
2859
2860 case BFD_RELOC_PPC64_HIGHER_S:
2861 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2862 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2863 else
2864 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2865 break;
0baf16f2
AM		 2866
2867 case BFD_RELOC_PPC64_HIGHEST:
2868 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2869 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2870 else
2871 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2872 break;
2873
2874 case BFD_RELOC_PPC64_HIGHEST_S:
2875 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2876 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2877 else
2878 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2879 break;
252b5132 2880 }
0baf16f2 2881#endif /* OBJ_ELF */
252b5132 2882 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2883 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2884 }
2885#ifdef OBJ_ELF
727fc41e 2886 else
252b5132 2887 {
727fc41e 2888 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2889 {
727fc41e
AM		 2890 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2891 if (sym_name[0] == '.')
2892 ++sym_name;
cdba85ec 2893
727fc41e 2894 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2895 {
727fc41e
AM		 2896 expressionS tls_exp;
2897
2898 hold = input_line_pointer;
2899 input_line_pointer = str + 1;
2900 expression (&tls_exp);
2901 if (tls_exp.X_op == O_symbol)
2902 {
2903 reloc = BFD_RELOC_UNUSED;
2904 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2905 {
2906 reloc = BFD_RELOC_PPC_TLSGD;
2907 input_line_pointer += 7;
2908 }
2909 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2910 {
2911 reloc = BFD_RELOC_PPC_TLSLD;
2912 input_line_pointer += 7;
2913 }
2914 if (reloc != BFD_RELOC_UNUSED)
2915 {
2916 SKIP_WHITESPACE ();
2917 str = input_line_pointer;
2918
2919 if (fc >= MAX_INSN_FIXUPS)
2920 as_fatal (_("too many fixups"));
2921 fixups[fc].exp = tls_exp;
2922 fixups[fc].opindex = *opindex_ptr;
2923 fixups[fc].reloc = reloc;
2924 ++fc;
2925 }
2926 }
2927 input_line_pointer = hold;
252b5132
RH		 2928 }
2929 }
2930
727fc41e 2931 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2932 {
727fc41e 2933 /* Some TLS tweaks. */
0baf16f2
AM		 2934 switch (reloc)
2935 {
727fc41e 2936 default:
cdba85ec 2937 break;
727fc41e
AM		 2938
2939 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2940 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2941 as_bad (_("@tls may not be used with \"%s\" operands"),
2942 opcode->name);
2943 else if (operand->shift != 11)
2944 as_bad (_("@tls may only be used in last operand"));
2945 else
2946 insn = ppc_insert_operand (insn, operand,
2947 ppc_obj64 ? 13 : 2,
2948 ppc_cpu, (char *) NULL, 0);
cdba85ec 2949 break;
727fc41e
AM		 2950
2951 /* We'll only use the 32 (or 64) bit form of these relocations
2952 in constants. Instructions get the 16 bit form. */
2953 case BFD_RELOC_PPC_DTPREL:
2954 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2955 break;
727fc41e
AM		 2956 case BFD_RELOC_PPC_TPREL:
2957 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2958 break;
2959 }
727fc41e 2960
b9c361e0
JL		 2961 /* If VLE-mode convert LO/HI/HA relocations. */
2962 if (opcode->flags & PPC_OPCODE_VLE)
2963 {
2964 int tmp_insn = insn & opcode->mask;
2965
2966 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2967 || tmp_insn == E_AND2I_DOT_INSN
2968 || tmp_insn == E_OR2IS_INSN
2969 || tmp_insn == E_LIS_INSN
2970 || tmp_insn == E_AND2IS_DOT_INSN);
2971
2972
2973 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2974 || tmp_insn == E_ADD2IS_INSN
2975 || tmp_insn == E_CMP16I_INSN
2976 || tmp_insn == E_MULL2I_INSN
2977 || tmp_insn == E_CMPL16I_INSN
2978 || tmp_insn == E_CMPH16I_INSN
2979 || tmp_insn == E_CMPHL16I_INSN);
2980
2981 switch (reloc)
2982 {
2983 default:
2984 break;
2985
2986 case BFD_RELOC_PPC_EMB_SDA21:
2987 reloc = BFD_RELOC_PPC_VLE_SDA21;
2988 break;
2989
2990 case BFD_RELOC_LO16:
2991 if (use_d_reloc)
2992 reloc = BFD_RELOC_PPC_VLE_LO16D;
2993 else if (use_a_reloc)
2994 reloc = BFD_RELOC_PPC_VLE_LO16A;
2995 break;
2996
2997 case BFD_RELOC_HI16:
2998 if (use_d_reloc)
2999 reloc = BFD_RELOC_PPC_VLE_HI16D;
3000 else if (use_a_reloc)
3001 reloc = BFD_RELOC_PPC_VLE_HI16A;
3002 break;
3003
3004 case BFD_RELOC_HI16_S:
3005 if (use_d_reloc)
3006 reloc = BFD_RELOC_PPC_VLE_HA16D;
3007 else if (use_a_reloc)
3008 reloc = BFD_RELOC_PPC_VLE_HA16A;
3009 break;
3010
3011 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3012 if (use_d_reloc)
3013 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3014 break;
3015
3016 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3017 if (use_d_reloc)
3018 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3019 break;
3020
3021 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3022 if (use_d_reloc)
3023 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3024 break;
3025 }
3026 }
3027
727fc41e
AM		 3028 /* For the absolute forms of branches, convert the PC
3029 relative form back into the absolute. */
3030 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3031 {
3032 switch (reloc)
3033 {
3034 case BFD_RELOC_PPC_B26:
3035 reloc = BFD_RELOC_PPC_BA26;
3036 break;
3037 case BFD_RELOC_PPC_B16:
3038 reloc = BFD_RELOC_PPC_BA16;
3039 break;
3040 case BFD_RELOC_PPC_B16_BRTAKEN:
3041 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3042 break;
3043 case BFD_RELOC_PPC_B16_BRNTAKEN:
3044 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3045 break;
3046 default:
3047 break;
3048 }
3049 }
3050
01efc3af
AM		 3051 switch (reloc)
3052 {
3053 case BFD_RELOC_PPC_TOC16:
3054 toc_reloc_types |= has_small_toc_reloc;
3055 break;
3056 case BFD_RELOC_PPC64_TOC16_LO:
3057 case BFD_RELOC_PPC64_TOC16_HI:
3058 case BFD_RELOC_PPC64_TOC16_HA:
3059 toc_reloc_types |= has_large_toc_reloc;
3060 break;
3061 default:
3062 break;
3063 }
3064
1fe532cf 3065 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
727fc41e
AM		 3066 {
3067 switch (reloc)
3068 {
3069 case BFD_RELOC_16:
3070 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3071 break;
3072 case BFD_RELOC_LO16:
3073 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3074 break;
3075 case BFD_RELOC_16_GOTOFF:
3076 reloc = BFD_RELOC_PPC64_GOT16_DS;
3077 break;
3078 case BFD_RELOC_LO16_GOTOFF:
3079 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3080 break;
3081 case BFD_RELOC_LO16_PLTOFF:
3082 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3083 break;
3084 case BFD_RELOC_16_BASEREL:
3085 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3086 break;
3087 case BFD_RELOC_LO16_BASEREL:
3088 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3089 break;
3090 case BFD_RELOC_PPC_TOC16:
3091 reloc = BFD_RELOC_PPC64_TOC16_DS;
3092 break;
3093 case BFD_RELOC_PPC64_TOC16_LO:
3094 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3095 break;
3096 case BFD_RELOC_PPC64_PLTGOT16:
3097 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3098 break;
3099 case BFD_RELOC_PPC64_PLTGOT16_LO:
3100 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3101 break;
3102 case BFD_RELOC_PPC_DTPREL16:
3103 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3104 break;
3105 case BFD_RELOC_PPC_DTPREL16_LO:
3106 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3107 break;
3108 case BFD_RELOC_PPC_TPREL16:
3109 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3110 break;
3111 case BFD_RELOC_PPC_TPREL16_LO:
3112 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3113 break;
3114 case BFD_RELOC_PPC_GOT_DTPREL16:
3115 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3116 case BFD_RELOC_PPC_GOT_TPREL16:
3117 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3118 break;
3119 default:
3120 as_bad (_("unsupported relocation for DS offset field"));
3121 break;
3122 }
3123 }
0baf16f2
AM		 3124 }
3125
252b5132
RH		 3126 /* We need to generate a fixup for this expression. */
3127 if (fc >= MAX_INSN_FIXUPS)
3128 as_fatal (_("too many fixups"));
3129 fixups[fc].exp = ex;
727fc41e 3130 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3131 fixups[fc].reloc = reloc;
3132 ++fc;
3133 }
727fc41e 3134#else /* OBJ_ELF */
252b5132
RH		 3135 else
3136 {
3137 /* We need to generate a fixup for this expression. */
3138 if (fc >= MAX_INSN_FIXUPS)
3139 as_fatal (_("too many fixups"));
3140 fixups[fc].exp = ex;
3141 fixups[fc].opindex = *opindex_ptr;
3142 fixups[fc].reloc = BFD_RELOC_UNUSED;
3143 ++fc;
3144 }
727fc41e 3145#endif /* OBJ_ELF */
252b5132
RH		 3146
3147 if (need_paren)
3148 {
3149 endc = ')';
3150 need_paren = 0;
c3d65c1c
BE		 3151 /* If expecting more operands, then we want to see "),". */
3152 if (*str == endc && opindex_ptr[1] != 0)
3153 {
3154 do
3155 ++str;
3156 while (ISSPACE (*str));
3157 endc = ',';
3158 }
252b5132
RH		 3159 }
3160 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3161 {
3162 endc = '(';
3163 need_paren = 1;
3164 }
3165 else
3166 endc = ',';
3167
3168 /* The call to expression should have advanced str past any
3169 whitespace. */
3170 if (*str != endc
3171 && (endc != ',' || *str != '\0'))
3172 {
5a938047
AM		 3173 if (*str == '\0')
3174 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3175 else
3176 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3177 break;
3178 }
3179
3180 if (*str != '\0')
3181 ++str;
3182 }
3183
3882b010 3184 while (ISSPACE (*str))
252b5132
RH		 3185 ++str;
3186
3187 if (*str != '\0')
3188 as_bad (_("junk at end of line: `%s'"), str);
3189
dc1d03fc 3190#ifdef OBJ_ELF
b9c361e0
JL		 3191 /* Do we need/want an APUinfo section? */
3192 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0)
6a0c61b7
EZ		 3193 {
3194 /* These are all version "1". */
3195 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3196 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3197 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3198 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3199 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3200 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3201 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3202 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3203 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3204 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3205 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3206 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3207 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3208 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3209 if (opcode->flags & PPC_OPCODE_VLE)
3210 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3211 }
dc1d03fc 3212#endif
6a0c61b7 3213
252b5132 3214 /* Write out the instruction. */
b9c361e0
JL		 3215 /* Differentiate between two and four byte insns. */
3216 if (ppc_mach () == bfd_mach_ppc_vle)
3217 {
3218 if (PPC_OP_SE_VLE (insn))
3219 insn_length = 2;
3220 else
3221 insn_length = 4;
3222 addr_mod = frag_now_fix () & 1;
3223 }
3224 else
3225 {
3226 insn_length = 4;
3227 addr_mod = frag_now_fix () & 3;
3228 }
3229 /* All instructions can start on a 2 byte boundary for VLE. */
3230 f = frag_more (insn_length);
09b935ac 3231 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3232 {
3233 if (ppc_mach() == bfd_mach_ppc_vle)
3234 as_bad (_("instruction address is not a multiple of 2"));
3235 else
3236 as_bad (_("instruction address is not a multiple of 4"));
3237 }
09b935ac
AM		 3238 frag_now->insn_addr = addr_mod;
3239 frag_now->has_code = 1;
b9c361e0 3240 md_number_to_chars (f, insn, insn_length);
252b5132 3241
5d6f4f16 3242#ifdef OBJ_ELF
b9c361e0 3243 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3244#endif
3245
252b5132
RH		 3246 /* Create any fixups. At this point we do not use a
3247 bfd_reloc_code_real_type, but instead just use the
3248 BFD_RELOC_UNUSED plus the operand index. This lets us easily
3249 handle fixups for any operand type, although that is admittedly
3250 not a very exciting feature. We pick a BFD reloc type in
55cf6793 3251 md_apply_fix. */
252b5132
RH		 3252 for (i = 0; i < fc; i++)
3253 {
252b5132
RH		 3254 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3255 {
99a814a1 3256 reloc_howto_type *reloc_howto;
252b5132
RH		 3257 int size;
3258 int offset;
3259 fixS *fixP;
3260
99a814a1 3261 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3262 if (!reloc_howto)
3263 abort ();
3264
3265 size = bfd_get_reloc_size (reloc_howto);
3266 offset = target_big_endian ? (4 - size) : 0;
3267
3268 if (size < 1 || size > 4)
bc805888 3269 abort ();
252b5132 3270
99a814a1
AM		 3271 fixP = fix_new_exp (frag_now,
3272 f - frag_now->fr_literal + offset,
3273 size,
3274 &fixups[i].exp,
3275 reloc_howto->pc_relative,
252b5132
RH		 3276 fixups[i].reloc);
3277
3278 /* Turn off complaints that the addend is too large for things like
3279 foo+100000@ha. */
3280 switch (fixups[i].reloc)
3281 {
3282 case BFD_RELOC_16_GOTOFF:
3283 case BFD_RELOC_PPC_TOC16:
3284 case BFD_RELOC_LO16:
3285 case BFD_RELOC_HI16:
3286 case BFD_RELOC_HI16_S:
b9c361e0
JL		 3287 case BFD_RELOC_PPC_VLE_LO16A:
3288 case BFD_RELOC_PPC_VLE_LO16D:
3289 case BFD_RELOC_PPC_VLE_HI16A:
3290 case BFD_RELOC_PPC_VLE_HI16D:
3291 case BFD_RELOC_PPC_VLE_HA16A:
3292 case BFD_RELOC_PPC_VLE_HA16D:
0baf16f2 3293#ifdef OBJ_ELF
0baf16f2
AM		 3294 case BFD_RELOC_PPC64_HIGHER:
3295 case BFD_RELOC_PPC64_HIGHER_S:
3296 case BFD_RELOC_PPC64_HIGHEST:
3297 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3298#endif
252b5132
RH		 3299 fixP->fx_no_overflow = 1;
3300 break;
3301 default:
3302 break;
3303 }
3304 }
3305 else
727fc41e
AM		 3306 {
3307 const struct powerpc_operand *operand;
3308
3309 operand = &powerpc_operands[fixups[i].opindex];
3310 fix_new_exp (frag_now,
3311 f - frag_now->fr_literal,
b9c361e0 3312 insn_length,
727fc41e
AM		 3313 &fixups[i].exp,
3314 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3315 ((bfd_reloc_code_real_type)
3316 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3317 }
252b5132
RH		 3318 }
3319}
3320
3321/* Handle a macro. Gather all the operands, transform them as
3322 described by the macro, and call md_assemble recursively. All the
3323 operands are separated by commas; we don't accept parentheses
3324 around operands here. */
3325
3326static void
98027b10 3327ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3328{
3329 char *operands[10];
3330 unsigned int count;
3331 char *s;
3332 unsigned int len;
3333 const char *format;
db557034 3334 unsigned int arg;
252b5132
RH		 3335 char *send;
3336 char *complete;
3337
3338 /* Gather the users operands into the operands array. */
3339 count = 0;
3340 s = str;
3341 while (1)
3342 {
3343 if (count >= sizeof operands / sizeof operands[0])
3344 break;
3345 operands[count++] = s;
3346 s = strchr (s, ',');
3347 if (s == (char *) NULL)
3348 break;
3349 *s++ = '\0';
81d4177b 3350 }
252b5132
RH		 3351
3352 if (count != macro->operands)
3353 {
3354 as_bad (_("wrong number of operands"));
3355 return;
3356 }
3357
3358 /* Work out how large the string must be (the size is unbounded
3359 because it includes user input). */
3360 len = 0;
3361 format = macro->format;
3362 while (*format != '\0')
3363 {
3364 if (*format != '%')
3365 {
3366 ++len;
3367 ++format;
3368 }
3369 else
3370 {
3371 arg = strtol (format + 1, &send, 10);
db557034 3372 know (send != format && arg < count);
252b5132
RH		 3373 len += strlen (operands[arg]);
3374 format = send;
3375 }
3376 }
3377
3378 /* Put the string together. */
3379 complete = s = (char *) alloca (len + 1);
3380 format = macro->format;
3381 while (*format != '\0')
3382 {
3383 if (*format != '%')
3384 *s++ = *format++;
3385 else
3386 {
3387 arg = strtol (format + 1, &send, 10);
3388 strcpy (s, operands[arg]);
3389 s += strlen (s);
3390 format = send;
3391 }
3392 }
3393 *s = '\0';
3394
3395 /* Assemble the constructed instruction. */
3396 md_assemble (complete);
81d4177b 3397}
252b5132
RH		 3398\f
3399#ifdef OBJ_ELF
18ae9cc1 3400/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3401
3402int
98027b10 3403ppc_section_type (char *str, size_t len)
252b5132 3404{
9de8d8f1
RH		 3405 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3406 return SHT_ORDERED;
252b5132 3407
9de8d8f1 3408 return -1;
252b5132
RH		 3409}
3410
3411int
1239de13 3412ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3413{
3414 if (type == SHT_ORDERED)
3415 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3416
252b5132
RH		 3417 return flags;
3418}
3419#endif /* OBJ_ELF */
3420
3421\f
3422/* Pseudo-op handling. */
3423
3424/* The .byte pseudo-op. This is similar to the normal .byte
3425 pseudo-op, but it can also take a single ASCII string. */
3426
3427static void
98027b10 3428ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3429{
3430 if (*input_line_pointer != '\"')
3431 {
3432 cons (1);
3433 return;
3434 }
3435
3436 /* Gather characters. A real double quote is doubled. Unusual
3437 characters are not permitted. */
3438 ++input_line_pointer;
3439 while (1)
3440 {
3441 char c;
3442
3443 c = *input_line_pointer++;
3444
3445 if (c == '\"')
3446 {
3447 if (*input_line_pointer != '\"')
3448 break;
3449 ++input_line_pointer;
3450 }
3451
3452 FRAG_APPEND_1_CHAR (c);
3453 }
3454
3455 demand_empty_rest_of_line ();
3456}
3457\f
3458#ifdef OBJ_XCOFF
3459
3460/* XCOFF specific pseudo-op handling. */
3461
3462/* This is set if we are creating a .stabx symbol, since we don't want
3463 to handle symbol suffixes for such symbols. */
b34976b6 3464static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3465
3466/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3467 symbols in the .bss segment as though they were local common
67c1ffbe 3468 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3469 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3470
3471static void
98027b10 3472ppc_comm (int lcomm)
252b5132
RH		 3473{
3474 asection *current_seg = now_seg;
3475 subsegT current_subseg = now_subseg;
3476 char *name;
3477 char endc;
3478 char *end_name;
3479 offsetT size;
3480 offsetT align;
3481 symbolS *lcomm_sym = NULL;
3482 symbolS *sym;
3483 char *pfrag;
3484
3485 name = input_line_pointer;
3486 endc = get_symbol_end ();
3487 end_name = input_line_pointer;
3488 *end_name = endc;
3489
3490 if (*input_line_pointer != ',')
3491 {
3492 as_bad (_("missing size"));
3493 ignore_rest_of_line ();
3494 return;
3495 }
3496 ++input_line_pointer;
3497
3498 size = get_absolute_expression ();
3499 if (size < 0)
3500 {
3501 as_bad (_("negative size"));
3502 ignore_rest_of_line ();
3503 return;
3504 }
3505
3506 if (! lcomm)
3507 {
3508 /* The third argument to .comm is the alignment. */
3509 if (*input_line_pointer != ',')
1ad63b2f 3510 align = 2;
252b5132
RH		 3511 else
3512 {
3513 ++input_line_pointer;
3514 align = get_absolute_expression ();
3515 if (align <= 0)
3516 {
3517 as_warn (_("ignoring bad alignment"));
1ad63b2f 3518 align = 2;
252b5132
RH		 3519 }
3520 }
3521 }
3522 else
3523 {
3524 char *lcomm_name;
3525 char lcomm_endc;
3526
1ad63b2f 3527 if (size <= 4)
252b5132
RH		 3528 align = 2;
3529 else
3530 align = 3;
3531
3532 /* The third argument to .lcomm appears to be the real local
3533 common symbol to create. References to the symbol named in
3534 the first argument are turned into references to the third
3535 argument. */
3536 if (*input_line_pointer != ',')
3537 {
3538 as_bad (_("missing real symbol name"));
3539 ignore_rest_of_line ();
3540 return;
3541 }
3542 ++input_line_pointer;
3543
3544 lcomm_name = input_line_pointer;
3545 lcomm_endc = get_symbol_end ();
81d4177b 3546
252b5132
RH		 3547 lcomm_sym = symbol_find_or_make (lcomm_name);
3548
3549 *input_line_pointer = lcomm_endc;
3550 }
3551
3552 *end_name = '\0';
3553 sym = symbol_find_or_make (name);
3554 *end_name = endc;
3555
3556 if (S_IS_DEFINED (sym)
3557 || S_GET_VALUE (sym) != 0)
3558 {
3559 as_bad (_("attempt to redefine symbol"));
3560 ignore_rest_of_line ();
3561 return;
3562 }
81d4177b 3563
252b5132 3564 record_alignment (bss_section, align);
81d4177b 3565
252b5132
RH		 3566 if (! lcomm
3567 || ! S_IS_DEFINED (lcomm_sym))
3568 {
3569 symbolS *def_sym;
3570 offsetT def_size;
3571
3572 if (! lcomm)
3573 {
3574 def_sym = sym;
3575 def_size = size;
3576 S_SET_EXTERNAL (sym);
3577 }
3578 else
3579 {
809ffe0d 3580 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3581 def_sym = lcomm_sym;
3582 def_size = 0;
3583 }
3584
3585 subseg_set (bss_section, 1);
3586 frag_align (align, 0, 0);
81d4177b 3587
809ffe0d 3588 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3589 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3590 def_size, (char *) NULL);
3591 *pfrag = 0;
3592 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3593 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3594 }
3595 else if (lcomm)
3596 {
3597 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3598 symbol_get_frag (lcomm_sym)->fr_offset =
3599 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3600 &~ ((1 << align) - 1));
809ffe0d
ILT		 3601 if (align > symbol_get_tc (lcomm_sym)->align)
3602 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3603 }
3604
3605 if (lcomm)
3606 {
3607 /* Make sym an offset from lcomm_sym. */
3608 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3609 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3610 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3611 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3612 }
3613
3614 subseg_set (current_seg, current_subseg);
3615
3616 demand_empty_rest_of_line ();
3617}
3618
3619/* The .csect pseudo-op. This switches us into a different
3620 subsegment. The first argument is a symbol whose value is the
3621 start of the .csect. In COFF, csect symbols get special aux
3622 entries defined by the x_csect field of union internal_auxent. The
3623 optional second argument is the alignment (the default is 2). */
3624
3625static void
98027b10 3626ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3627{
3628 char *name;
3629 char endc;
3630 symbolS *sym;
931e13a6 3631 offsetT align;
252b5132
RH		 3632
3633 name = input_line_pointer;
3634 endc = get_symbol_end ();
81d4177b 3635
252b5132
RH		 3636 sym = symbol_find_or_make (name);
3637
3638 *input_line_pointer = endc;
3639
3640 if (S_GET_NAME (sym)[0] == '\0')
3641 {
3642 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3643 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3644 }
3645
931e13a6 3646 align = 2;
252b5132
RH		 3647 if (*input_line_pointer == ',')
3648 {
3649 ++input_line_pointer;
931e13a6 3650 align = get_absolute_expression ();
252b5132
RH		 3651 }
3652
931e13a6
AM		 3653 ppc_change_csect (sym, align);
3654
252b5132
RH		 3655 demand_empty_rest_of_line ();
3656}
3657
3658/* Change to a different csect. */
3659
3660static void
98027b10 3661ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3662{
3663 if (S_IS_DEFINED (sym))
809ffe0d 3664 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3665 else
3666 {
3667 symbolS **list_ptr;
3668 int after_toc;
3669 int hold_chunksize;
3670 symbolS *list;
931e13a6
AM		 3671 int is_code;
3672 segT sec;
252b5132
RH		 3673
3674 /* This is a new csect. We need to look at the symbol class to
3675 figure out whether it should go in the text section or the
3676 data section. */
3677 after_toc = 0;
931e13a6 3678 is_code = 0;
96d56e9f 3679 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3680 {
3681 case XMC_PR:
3682 case XMC_RO:
3683 case XMC_DB:
3684 case XMC_GL:
3685 case XMC_XO:
3686 case XMC_SV:
3687 case XMC_TI:
3688 case XMC_TB:
3689 S_SET_SEGMENT (sym, text_section);
809ffe0d 3690 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3691 ++ppc_text_subsegment;
3692 list_ptr = &ppc_text_csects;
931e13a6 3693 is_code = 1;
252b5132
RH		 3694 break;
3695 case XMC_RW:
3696 case XMC_TC0:
3697 case XMC_TC:
3698 case XMC_DS:
3699 case XMC_UA:
3700 case XMC_BS:
3701 case XMC_UC:
3702 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3703 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3704 == ppc_data_subsegment))
252b5132
RH		 3705 after_toc = 1;
3706 S_SET_SEGMENT (sym, data_section);
809ffe0d 3707 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3708 ++ppc_data_subsegment;
3709 list_ptr = &ppc_data_csects;
3710 break;
3711 default:
3712 abort ();
3713 }
3714
3715 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3716 changing subsegments, so that we don't use a lot of memory
3717 space for what may be a small section. */
252b5132
RH		 3718 hold_chunksize = chunksize;
3719 chunksize = 64;
3720
931e13a6
AM		 3721 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3722 symbol_get_tc (sym)->subseg);
252b5132
RH		 3723
3724 chunksize = hold_chunksize;
3725
3726 if (after_toc)
3727 ppc_after_toc_frag = frag_now;
3728
931e13a6
AM		 3729 record_alignment (sec, align);
3730 if (is_code)
3731 frag_align_code (align, 0);
3732 else
3733 frag_align (align, 0, 0);
3734
809ffe0d 3735 symbol_set_frag (sym, frag_now);
252b5132
RH		 3736 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3737
931e13a6 3738 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3739 symbol_get_tc (sym)->output = 1;
3740 symbol_get_tc (sym)->within = sym;
81d4177b 3741
252b5132 3742 for (list = *list_ptr;
809ffe0d
ILT		 3743 symbol_get_tc (list)->next != (symbolS *) NULL;
3744 list = symbol_get_tc (list)->next)
252b5132 3745 ;
809ffe0d 3746 symbol_get_tc (list)->next = sym;
81d4177b 3747
252b5132 3748 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3749 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3750 &symbol_lastP);
252b5132
RH		 3751 }
3752
3753 ppc_current_csect = sym;
3754}
3755
85645aed
TG		 3756static void
3757ppc_change_debug_section (unsigned int idx, subsegT subseg)
3758{
3759 segT sec;
3760 flagword oldflags;
3761 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3762
3763 sec = subseg_new (dw->name, subseg);
3764 oldflags = bfd_get_section_flags (stdoutput, sec);
3765 if (oldflags == SEC_NO_FLAGS)
3766 {
3767 /* Just created section. */
3768 gas_assert (dw_sections[idx].sect == NULL);
3769
3770 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3771 bfd_set_section_alignment (stdoutput, sec, 0);
3772 dw_sections[idx].sect = sec;
3773 }
3774
3775 /* Not anymore in a csect. */
3776 ppc_current_csect = NULL;
3777}
3778
3779/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3780 .dwsect flag [, opt-label ]
3781*/
3782
3783static void
3784ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3785{
3786 offsetT flag;
3787 symbolS *opt_label;
3788 const struct xcoff_dwsect_name *dw;
3789 struct dw_subsection *subseg;
3790 struct dw_section *dws;
3791 int i;
3792
3793 /* Find section. */
3794 flag = get_absolute_expression ();
3795 dw = NULL;
3796 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3797 if (xcoff_dwsect_names[i].flag == flag)
3798 {
3799 dw = &xcoff_dwsect_names[i];
3800 break;
3801 }
3802
3803 /* Parse opt-label. */
3804 if (*input_line_pointer == ',')
3805 {
3806 const char *label;
3807 char c;
3808
3809 ++input_line_pointer;
3810
3811 label = input_line_pointer;
3812 c = get_symbol_end ();
3813 opt_label = symbol_find_or_make (label);
3814 *input_line_pointer = c;
3815 }
3816 else
3817 opt_label = NULL;
3818
3819 demand_empty_rest_of_line ();
3820
3821 /* Return now in case of unknown subsection. */
3822 if (dw == NULL)
3823 {
d6ed37ed 3824 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3825 (unsigned)flag);
3826 return;
3827 }
3828
3829 /* Find the subsection. */
3830 dws = &dw_sections[i];
3831 subseg = NULL;
3832 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3833 {
3834 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3835 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3836 {
3837 as_bad (_("label %s was not defined in this dwarf section"),
3838 S_GET_NAME (opt_label));
3839 subseg = dws->anon_subseg;
3840 opt_label = NULL;
3841 }
3842 else
3843 subseg = symbol_get_tc (opt_label)->u.dw;
3844 }
3845
3846 if (subseg != NULL)
3847 {
3848 /* Switch to the subsection. */
3849 ppc_change_debug_section (i, subseg->subseg);
3850 }
3851 else
3852 {
3853 /* Create a new dw subsection. */
3854 subseg = (struct dw_subsection *)
3855 xmalloc (sizeof (struct dw_subsection));
3856
3857 if (opt_label == NULL)
3858 {
3859 /* The anonymous one. */
3860 subseg->subseg = 0;
3861 subseg->link = NULL;
3862 dws->anon_subseg = subseg;
3863 }
3864 else
3865 {
3866 /* A named one. */
3867 if (dws->list_subseg != NULL)
3868 subseg->subseg = dws->list_subseg->subseg + 1;
3869 else
3870 subseg->subseg = 1;
3871
3872 subseg->link = dws->list_subseg;
3873 dws->list_subseg = subseg;
3874 symbol_get_tc (opt_label)->u.dw = subseg;
3875 }
3876
3877 ppc_change_debug_section (i, subseg->subseg);
3878
3879 if (dw->def_size)
3880 {
3881 /* Add the length field. */
3882 expressionS *exp = &subseg->end_exp;
3883 int sz;
3884
3885 if (opt_label != NULL)
3886 symbol_set_value_now (opt_label);
3887
3888 /* Add the length field. Note that according to the AIX assembler
3889 manual, the size of the length field is 4 for powerpc32 but
3890 12 for powerpc64. */
3891 if (ppc_obj64)
3892 {
3893 /* Write the 64bit marker. */
3894 md_number_to_chars (frag_more (4), -1, 4);
3895 }
3896
3897 exp->X_op = O_subtract;
3898 exp->X_op_symbol = symbol_temp_new_now ();
3899 exp->X_add_symbol = symbol_temp_make ();
3900
3901 sz = ppc_obj64 ? 8 : 4;
3902 exp->X_add_number = -sz;
3903 emit_expr (exp, sz);
3904 }
3905 }
3906}
3907
252b5132
RH		 3908/* This function handles the .text and .data pseudo-ops. These
3909 pseudo-ops aren't really used by XCOFF; we implement them for the
3910 convenience of people who aren't used to XCOFF. */
3911
3912static void
98027b10 3913ppc_section (int type)
252b5132
RH		 3914{
3915 const char *name;
3916 symbolS *sym;
3917
3918 if (type == 't')
3919 name = ".text[PR]";
3920 else if (type == 'd')
3921 name = ".data[RW]";
3922 else
3923 abort ();
3924
3925 sym = symbol_find_or_make (name);
3926
931e13a6 3927 ppc_change_csect (sym, 2);
252b5132
RH		 3928
3929 demand_empty_rest_of_line ();
3930}
3931
3932/* This function handles the .section pseudo-op. This is mostly to
3933 give an error, since XCOFF only supports .text, .data and .bss, but
3934 we do permit the user to name the text or data section. */
3935
3936static void
98027b10 3937ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3938{
3939 char *user_name;
3940 const char *real_name;
3941 char c;
3942 symbolS *sym;
3943
3944 user_name = input_line_pointer;
3945 c = get_symbol_end ();
3946
3947 if (strcmp (user_name, ".text") == 0)
3948 real_name = ".text[PR]";
3949 else if (strcmp (user_name, ".data") == 0)
3950 real_name = ".data[RW]";
3951 else
3952 {
d6ed37ed 3953 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 3954 *input_line_pointer = c;
3955 ignore_rest_of_line ();
3956 return;
3957 }
3958
3959 *input_line_pointer = c;
3960
3961 sym = symbol_find_or_make (real_name);
3962
931e13a6 3963 ppc_change_csect (sym, 2);
252b5132
RH		 3964
3965 demand_empty_rest_of_line ();
3966}
3967
3968/* The .extern pseudo-op. We create an undefined symbol. */
3969
3970static void
98027b10 3971ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3972{
3973 char *name;
3974 char endc;
3975
3976 name = input_line_pointer;
3977 endc = get_symbol_end ();
3978
3979 (void) symbol_find_or_make (name);
3980
3981 *input_line_pointer = endc;
3982
3983 demand_empty_rest_of_line ();
3984}
3985
3986/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3987
3988static void
98027b10 3989ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3990{
3991 char *name;
3992 char endc;
3993 symbolS *sym;
3994
3995 name = input_line_pointer;
3996 endc = get_symbol_end ();
3997
3998 sym = symbol_find_or_make (name);
3999
4000 *input_line_pointer = endc;
4001
809ffe0d 4002 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4003
4004 demand_empty_rest_of_line ();
4005}
4006
c865e45b
RS		 4007/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4008 relocations at the beginning of the current csect.
4009
4010 (In principle, there's no reason why the relocations _have_ to be at
4011 the beginning. Anywhere in the csect would do. However, inserting
4012 at the beginning is what the native assmebler does, and it helps to
4013 deal with cases where the .ref statements follow the section contents.)
4014
4015 ??? .refs don't work for empty .csects. However, the native assembler
4016 doesn't report an error in this case, and neither yet do we. */
4017
4018static void
4019ppc_ref (int ignore ATTRIBUTE_UNUSED)
4020{
4021 char *name;
4022 char c;
4023
4024 if (ppc_current_csect == NULL)
4025 {
4026 as_bad (_(".ref outside .csect"));
4027 ignore_rest_of_line ();
4028 return;
4029 }
4030
4031 do
4032 {
4033 name = input_line_pointer;
4034 c = get_symbol_end ();
4035
4036 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4037 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4038
4039 *input_line_pointer = c;
4040 SKIP_WHITESPACE ();
4041 c = *input_line_pointer;
4042 if (c == ',')
4043 {
4044 input_line_pointer++;
4045 SKIP_WHITESPACE ();
4046 if (is_end_of_line[(unsigned char) *input_line_pointer])
4047 {
4048 as_bad (_("missing symbol name"));
4049 ignore_rest_of_line ();
4050 return;
4051 }
4052 }
4053 }
4054 while (c == ',');
4055
4056 demand_empty_rest_of_line ();
4057}
4058
252b5132
RH		 4059/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4060 although I don't know why it bothers. */
4061
4062static void
98027b10 4063ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4064{
4065 char *name;
4066 char endc;
4067 symbolS *sym;
4068 int len;
4069
4070 name = input_line_pointer;
4071 endc = get_symbol_end ();
4072
4073 sym = symbol_find_or_make (name);
4074
4075 *input_line_pointer = endc;
4076
4077 if (*input_line_pointer != ',')
4078 {
4079 as_bad (_("missing rename string"));
4080 ignore_rest_of_line ();
4081 return;
4082 }
4083 ++input_line_pointer;
4084
809ffe0d 4085 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4086
4087 demand_empty_rest_of_line ();
4088}
4089
4090/* The .stabx pseudo-op. This is similar to a normal .stabs
4091 pseudo-op, but slightly different. A sample is
4092 .stabx "main:F-1",.main,142,0
4093 The first argument is the symbol name to create. The second is the
4094 value, and the third is the storage class. The fourth seems to be
4095 always zero, and I am assuming it is the type. */
4096
4097static void
98027b10 4098ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4099{
4100 char *name;
4101 int len;
4102 symbolS *sym;
4103 expressionS exp;
4104
4105 name = demand_copy_C_string (&len);
4106
4107 if (*input_line_pointer != ',')
4108 {
4109 as_bad (_("missing value"));
4110 return;
4111 }
4112 ++input_line_pointer;
4113
b34976b6 4114 ppc_stab_symbol = TRUE;
252b5132 4115 sym = symbol_make (name);
b34976b6 4116 ppc_stab_symbol = FALSE;
252b5132 4117
809ffe0d 4118 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4119
4120 (void) expression (&exp);
4121
4122 switch (exp.X_op)
4123 {
4124 case O_illegal:
4125 case O_absent:
4126 case O_big:
4127 as_bad (_("illegal .stabx expression; zero assumed"));
4128 exp.X_add_number = 0;
4129 /* Fall through. */
4130 case O_constant:
4131 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4132 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4133 break;
4134
4135 case O_symbol:
4136 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4137 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4138 else
4139 {
4140 S_SET_VALUE (sym,
4141 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4142 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4143 }
4144 break;
4145
4146 default:
4147 /* The value is some complex expression. This will probably
99a814a1
AM		 4148 fail at some later point, but this is probably the right
4149 thing to do here. */
809ffe0d 4150 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4151 break;
4152 }
4153
4154 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4155 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4156
4157 if (*input_line_pointer != ',')
4158 {
4159 as_bad (_("missing class"));
4160 return;
4161 }
4162 ++input_line_pointer;
4163
4164 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4165
4166 if (*input_line_pointer != ',')
4167 {
4168 as_bad (_("missing type"));
4169 return;
4170 }
4171 ++input_line_pointer;
4172
4173 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4174
809ffe0d 4175 symbol_get_tc (sym)->output = 1;
252b5132 4176
c734e7e3
TG		 4177 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4178 {
4179 /* In this case :
252b5132 4180
c734e7e3
TG		 4181 .bs name
4182 .stabx "z",arrays_,133,0
4183 .es
99a814a1 4184
c734e7e3 4185 .comm arrays_,13768,3
99a814a1 4186
c734e7e3
TG		 4187 resolve_symbol_value will copy the exp's "within" into sym's when the
4188 offset is 0. Since this seems to be corner case problem,
4189 only do the correction for storage class C_STSYM. A better solution
4190 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4191
c734e7e3
TG		 4192 if (exp.X_op == O_symbol)
4193 {
4194 if (ppc_current_block == NULL)
4195 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4196
c734e7e3
TG		 4197 symbol_get_tc (sym)->within = ppc_current_block;
4198 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4199 }
4200 }
99a814a1 4201
252b5132
RH		 4202 if (exp.X_op != O_symbol
4203 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4204 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4205 ppc_frob_label (sym);
4206 else
4207 {
4208 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4209 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4210 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4211 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4212 }
4213
4214 demand_empty_rest_of_line ();
4215}
4216
4217/* The .function pseudo-op. This takes several arguments. The first
4218 argument seems to be the external name of the symbol. The second
67c1ffbe 4219 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4220 uses the same name for both. I have no idea what the third and
4221 fourth arguments are meant to be. The optional fifth argument is
4222 an expression for the size of the function. In COFF this symbol
4223 gets an aux entry like that used for a csect. */
4224
4225static void
98027b10 4226ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4227{
4228 char *name;
4229 char endc;
4230 char *s;
4231 symbolS *ext_sym;
4232 symbolS *lab_sym;
4233
4234 name = input_line_pointer;
4235 endc = get_symbol_end ();
4236
4237 /* Ignore any [PR] suffix. */
4238 name = ppc_canonicalize_symbol_name (name);
4239 s = strchr (name, '[');
4240 if (s != (char *) NULL
4241 && strcmp (s + 1, "PR]") == 0)
4242 *s = '\0';
4243
4244 ext_sym = symbol_find_or_make (name);
4245
4246 *input_line_pointer = endc;
4247
4248 if (*input_line_pointer != ',')
4249 {
4250 as_bad (_("missing symbol name"));
4251 ignore_rest_of_line ();
4252 return;
4253 }
4254 ++input_line_pointer;
4255
4256 name = input_line_pointer;
4257 endc = get_symbol_end ();
4258
4259 lab_sym = symbol_find_or_make (name);
4260
4261 *input_line_pointer = endc;
4262
4263 if (ext_sym != lab_sym)
4264 {
809ffe0d
ILT		 4265 expressionS exp;
4266
4267 exp.X_op = O_symbol;
4268 exp.X_add_symbol = lab_sym;
4269 exp.X_op_symbol = NULL;
4270 exp.X_add_number = 0;
4271 exp.X_unsigned = 0;
4272 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4273 }
4274
96d56e9f
NC		 4275 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4276 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4277 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4278
4279 if (*input_line_pointer == ',')
4280 {
91d6fa6a 4281 expressionS exp;
252b5132
RH		 4282
4283 /* Ignore the third argument. */
4284 ++input_line_pointer;
91d6fa6a 4285 expression (& exp);
252b5132
RH		 4286 if (*input_line_pointer == ',')
4287 {
4288 /* Ignore the fourth argument. */
4289 ++input_line_pointer;
91d6fa6a 4290 expression (& exp);
252b5132
RH		 4291 if (*input_line_pointer == ',')
4292 {
4293 /* The fifth argument is the function size. */
4294 ++input_line_pointer;
85645aed
TG		 4295 symbol_get_tc (ext_sym)->u.size = symbol_new
4296 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4297 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4298 }
4299 }
4300 }
4301
4302 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4303 SF_SET_FUNCTION (ext_sym);
4304 SF_SET_PROCESS (ext_sym);
4305 coff_add_linesym (ext_sym);
4306
4307 demand_empty_rest_of_line ();
4308}
4309
4310/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4311 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4312 with the correct line number */
5d6255fe 4313
8642cce8 4314static symbolS *saved_bi_sym = 0;
252b5132
RH		 4315
4316static void
98027b10 4317ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4318{
4319 symbolS *sym;
4320
4321 sym = symbol_make (".bf");
4322 S_SET_SEGMENT (sym, text_section);
809ffe0d 4323 symbol_set_frag (sym, frag_now);
252b5132
RH		 4324 S_SET_VALUE (sym, frag_now_fix ());
4325 S_SET_STORAGE_CLASS (sym, C_FCN);
4326
4327 coff_line_base = get_absolute_expression ();
4328
4329 S_SET_NUMBER_AUXILIARY (sym, 1);
4330 SA_SET_SYM_LNNO (sym, coff_line_base);
4331
8642cce8 4332 /* Line number for bi. */
5d6255fe 4333 if (saved_bi_sym)
8642cce8
TR		 4334 {
4335 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4336 saved_bi_sym = 0;
4337 }
5d6255fe 4338
8642cce8 4339
809ffe0d 4340 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4341
4342 ppc_frob_label (sym);
4343
4344 demand_empty_rest_of_line ();
4345}
4346
4347/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4348 ".ef", except that the line number is absolute, not relative to the
4349 most recent ".bf" symbol. */
4350
4351static void
98027b10 4352ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4353{
4354 symbolS *sym;
4355
4356 sym = symbol_make (".ef");
4357 S_SET_SEGMENT (sym, text_section);
809ffe0d 4358 symbol_set_frag (sym, frag_now);
252b5132
RH		 4359 S_SET_VALUE (sym, frag_now_fix ());
4360 S_SET_STORAGE_CLASS (sym, C_FCN);
4361 S_SET_NUMBER_AUXILIARY (sym, 1);
4362 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4363 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4364
4365 ppc_frob_label (sym);
4366
4367 demand_empty_rest_of_line ();
4368}
4369
4370/* The .bi and .ei pseudo-ops. These take a string argument and
4371 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4372 the symbol list. The value of .bi will be know when the next .bf
4373 is encountered. */
252b5132
RH		 4374
4375static void
98027b10 4376ppc_biei (int ei)
252b5132
RH		 4377{
4378 static symbolS *last_biei;
4379
4380 char *name;
4381 int len;
4382 symbolS *sym;
4383 symbolS *look;
4384
4385 name = demand_copy_C_string (&len);
4386
4387 /* The value of these symbols is actually file offset. Here we set
4388 the value to the index into the line number entries. In
4389 ppc_frob_symbols we set the fix_line field, which will cause BFD
4390 to do the right thing. */
4391
4392 sym = symbol_make (name);
4393 /* obj-coff.c currently only handles line numbers correctly in the
4394 .text section. */
4395 S_SET_SEGMENT (sym, text_section);
4396 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4397 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4398
4399 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4400 symbol_get_tc (sym)->output = 1;
81d4177b 4401
8642cce8 4402 /* Save bi. */
5d6255fe 4403 if (ei)
8642cce8
TR		 4404 saved_bi_sym = 0;
4405 else
4406 saved_bi_sym = sym;
4407
252b5132
RH		 4408 for (look = last_biei ? last_biei : symbol_rootP;
4409 (look != (symbolS *) NULL
4410 && (S_GET_STORAGE_CLASS (look) == C_FILE
4411 || S_GET_STORAGE_CLASS (look) == C_BINCL
4412 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4413 look = symbol_next (look))
4414 ;
4415 if (look != (symbolS *) NULL)
4416 {
4417 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4418 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4419 last_biei = sym;
4420 }
4421
4422 demand_empty_rest_of_line ();
4423}
4424
4425/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4426 There is one argument, which is a csect symbol. The value of the
4427 .bs symbol is the index of this csect symbol. */
4428
4429static void
98027b10 4430ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4431{
4432 char *name;
4433 char endc;
4434 symbolS *csect;
4435 symbolS *sym;
4436
4437 if (ppc_current_block != NULL)
4438 as_bad (_("nested .bs blocks"));
4439
4440 name = input_line_pointer;
4441 endc = get_symbol_end ();
4442
4443 csect = symbol_find_or_make (name);
4444
4445 *input_line_pointer = endc;
4446
4447 sym = symbol_make (".bs");
4448 S_SET_SEGMENT (sym, now_seg);
4449 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4450 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4451 symbol_get_tc (sym)->output = 1;
252b5132 4452
809ffe0d 4453 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4454
4455 ppc_frob_label (sym);
4456
4457 ppc_current_block = sym;
4458
4459 demand_empty_rest_of_line ();
4460}
4461
4462/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4463
4464static void
98027b10 4465ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4466{
4467 symbolS *sym;
4468
4469 if (ppc_current_block == NULL)
4470 as_bad (_(".es without preceding .bs"));
4471
4472 sym = symbol_make (".es");
4473 S_SET_SEGMENT (sym, now_seg);
4474 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4475 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4476 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4477
4478 ppc_frob_label (sym);
4479
4480 ppc_current_block = NULL;
4481
4482 demand_empty_rest_of_line ();
4483}
4484
4485/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4486 line number. */
4487
4488static void
98027b10 4489ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4490{
4491 symbolS *sym;
4492
4493 sym = symbol_make (".bb");
4494 S_SET_SEGMENT (sym, text_section);
809ffe0d 4495 symbol_set_frag (sym, frag_now);
252b5132
RH		 4496 S_SET_VALUE (sym, frag_now_fix ());
4497 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4498
4499 S_SET_NUMBER_AUXILIARY (sym, 1);
4500 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4501
809ffe0d 4502 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4503
4504 SF_SET_PROCESS (sym);
4505
4506 ppc_frob_label (sym);
4507
4508 demand_empty_rest_of_line ();
4509}
4510
4511/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4512 line number. */
4513
4514static void
98027b10 4515ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4516{
4517 symbolS *sym;
4518
4519 sym = symbol_make (".eb");
4520 S_SET_SEGMENT (sym, text_section);
809ffe0d 4521 symbol_set_frag (sym, frag_now);
252b5132
RH		 4522 S_SET_VALUE (sym, frag_now_fix ());
4523 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4524 S_SET_NUMBER_AUXILIARY (sym, 1);
4525 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4526 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4527
4528 SF_SET_PROCESS (sym);
4529
4530 ppc_frob_label (sym);
4531
4532 demand_empty_rest_of_line ();
4533}
4534
4535/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4536 specified name. */
4537
4538static void
98027b10 4539ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4540{
4541 char *name;
4542 int len;
4543 symbolS *sym;
4544
4545 name = demand_copy_C_string (&len);
4546 sym = symbol_make (name);
4547 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4548 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4549 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4550 S_SET_VALUE (sym, 0);
809ffe0d 4551 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4552
4553 ppc_frob_label (sym);
4554
4555 demand_empty_rest_of_line ();
4556}
4557
4558/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4559
4560static void
98027b10 4561ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4562{
4563 symbolS *sym;
4564
4565 sym = symbol_make (".ec");
4566 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4567 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4568 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4569 S_SET_VALUE (sym, 0);
809ffe0d 4570 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4571
4572 ppc_frob_label (sym);
4573
4574 demand_empty_rest_of_line ();
4575}
4576
4577/* The .toc pseudo-op. Switch to the .toc subsegment. */
4578
4579static void
98027b10 4580ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4581{
4582 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4583 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4584 else
4585 {
4586 subsegT subseg;
4587 symbolS *sym;
4588 symbolS *list;
81d4177b 4589
252b5132
RH		 4590 subseg = ppc_data_subsegment;
4591 ++ppc_data_subsegment;
4592
4593 subseg_new (segment_name (data_section), subseg);
4594 ppc_toc_frag = frag_now;
4595
4596 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4597 symbol_set_frag (sym, frag_now);
252b5132
RH		 4598 S_SET_SEGMENT (sym, data_section);
4599 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4600 symbol_get_tc (sym)->subseg = subseg;
4601 symbol_get_tc (sym)->output = 1;
4602 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4603
4604 ppc_toc_csect = sym;
81d4177b 4605
252b5132 4606 for (list = ppc_data_csects;
809ffe0d
ILT		 4607 symbol_get_tc (list)->next != (symbolS *) NULL;
4608 list = symbol_get_tc (list)->next)
252b5132 4609 ;
809ffe0d 4610 symbol_get_tc (list)->next = sym;
252b5132
RH		 4611
4612 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4613 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4614 &symbol_lastP);
252b5132
RH		 4615 }
4616
4617 ppc_current_csect = ppc_toc_csect;
4618
4619 demand_empty_rest_of_line ();
4620}
4621
4622/* The AIX assembler automatically aligns the operands of a .long or
4623 .short pseudo-op, and we want to be compatible. */
4624
4625static void
98027b10 4626ppc_xcoff_cons (int log_size)
252b5132
RH		 4627{
4628 frag_align (log_size, 0, 0);
4629 record_alignment (now_seg, log_size);
4630 cons (1 << log_size);
4631}
4632
4633static void
98027b10 4634ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4635{
4636 expressionS exp;
4637 int byte_count;
4638
4639 (void) expression (&exp);
4640
4641 if (exp.X_op != O_constant)
4642 {
4643 as_bad (_("non-constant byte count"));
4644 return;
4645 }
4646
4647 byte_count = exp.X_add_number;
4648
4649 if (*input_line_pointer != ',')
4650 {
4651 as_bad (_("missing value"));
4652 return;
4653 }
4654
4655 ++input_line_pointer;
4656 cons (byte_count);
4657}
4658
85645aed
TG		 4659void
4660ppc_xcoff_end (void)
4661{
4662 int i;
4663
4664 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4665 {
4666 struct dw_section *dws = &dw_sections[i];
4667 struct dw_subsection *dwss;
4668
4669 if (dws->anon_subseg)
4670 {
4671 dwss = dws->anon_subseg;
4672 dwss->link = dws->list_subseg;
4673 }
4674 else
4675 dwss = dws->list_subseg;
4676
4677 for (; dwss != NULL; dwss = dwss->link)
4678 if (dwss->end_exp.X_add_symbol != NULL)
4679 {
4680 subseg_set (dws->sect, dwss->subseg);
4681 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4682 }
4683 }
4684}
4685
252b5132 4686#endif /* OBJ_XCOFF */
0baf16f2 4687#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4688\f
4689/* The .tc pseudo-op. This is used when generating either XCOFF or
4690 ELF. This takes two or more arguments.
4691
4692 When generating XCOFF output, the first argument is the name to
4693 give to this location in the toc; this will be a symbol with class
0baf16f2 4694 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4695 this location in the TOC; often there is just one more argument, a
1049f94e 4696 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4697 depends on target word size. A 32-bit target uses 4-byte values, a
4698 64-bit target uses 8-byte values.
252b5132
RH		 4699
4700 When not generating XCOFF output, the arguments are the same, but
4701 the first argument is simply ignored. */
4702
4703static void
98027b10 4704ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4705{
4706#ifdef OBJ_XCOFF
4707
4708 /* Define the TOC symbol name. */
4709 {
4710 char *name;
4711 char endc;
4712 symbolS *sym;
4713
4714 if (ppc_toc_csect == (symbolS *) NULL
4715 || ppc_toc_csect != ppc_current_csect)
4716 {
4717 as_bad (_(".tc not in .toc section"));
4718 ignore_rest_of_line ();
4719 return;
4720 }
4721
4722 name = input_line_pointer;
4723 endc = get_symbol_end ();
4724
4725 sym = symbol_find_or_make (name);
4726
4727 *input_line_pointer = endc;
4728
4729 if (S_IS_DEFINED (sym))
4730 {
4731 symbolS *label;
4732
809ffe0d 4733 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4734 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4735 {
4736 as_bad (_(".tc with no label"));
4737 ignore_rest_of_line ();
4738 return;
4739 }
4740
4741 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4742 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4743 S_SET_VALUE (label, S_GET_VALUE (sym));
4744
4745 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4746 ++input_line_pointer;
4747
4748 return;
4749 }
4750
4751 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4752 symbol_set_frag (sym, frag_now);
252b5132 4753 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4754 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4755 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4756
4757 ppc_frob_label (sym);
4758 }
4759
0baf16f2
AM		 4760#endif /* OBJ_XCOFF */
4761#ifdef OBJ_ELF
9c7977b3 4762 int align;
252b5132
RH		 4763
4764 /* Skip the TOC symbol name. */
4765 while (is_part_of_name (*input_line_pointer)
d13d4015 4766 || *input_line_pointer == ' '
252b5132
RH		 4767 || *input_line_pointer == '['
4768 || *input_line_pointer == ']'
4769 || *input_line_pointer == '{'
4770 || *input_line_pointer == '}')
4771 ++input_line_pointer;
4772
0baf16f2 4773 /* Align to a four/eight byte boundary. */
2b3c4602 4774 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4775 frag_align (align, 0, 0);
4776 record_alignment (now_seg, align);
0baf16f2 4777#endif /* OBJ_ELF */
252b5132
RH		 4778
4779 if (*input_line_pointer != ',')
4780 demand_empty_rest_of_line ();
4781 else
4782 {
4783 ++input_line_pointer;
2b3c4602 4784 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4785 }
4786}
0baf16f2
AM		 4787
4788/* Pseudo-op .machine. */
0baf16f2
AM		 4789
4790static void
98027b10 4791ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4792{
69c040df
AM		 4793 char *cpu_string;
4794#define MAX_HISTORY 100
fa452fa6 4795 static ppc_cpu_t *cpu_history;
69c040df
AM		 4796 static int curr_hist;
4797
4798 SKIP_WHITESPACE ();
4799
4800 if (*input_line_pointer == '"')
4801 {
4802 int len;
4803 cpu_string = demand_copy_C_string (&len);
4804 }
4805 else
4806 {
4807 char c;
4808 cpu_string = input_line_pointer;
4809 c = get_symbol_end ();
4810 cpu_string = xstrdup (cpu_string);
4811 *input_line_pointer = c;
4812 }
4813
4814 if (cpu_string != NULL)
4815 {
fa452fa6 4816 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4817 ppc_cpu_t new_cpu;
69c040df
AM		 4818 char *p;
4819
4820 for (p = cpu_string; *p != 0; p++)
4821 *p = TOLOWER (*p);
4822
4823 if (strcmp (cpu_string, "push") == 0)
4824 {
4825 if (cpu_history == NULL)
4826 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4827
4828 if (curr_hist >= MAX_HISTORY)
4829 as_bad (_(".machine stack overflow"));
4830 else
4831 cpu_history[curr_hist++] = ppc_cpu;
4832 }
4833 else if (strcmp (cpu_string, "pop") == 0)
4834 {
4835 if (curr_hist <= 0)
4836 as_bad (_(".machine stack underflow"));
4837 else
4838 ppc_cpu = cpu_history[--curr_hist];
4839 }
69fe9ce5
AM		 4840 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4841 ppc_cpu = new_cpu;
69c040df
AM		 4842 else
4843 as_bad (_("invalid machine `%s'"), cpu_string);
4844
4845 if (ppc_cpu != old_cpu)
4846 ppc_setup_opcodes ();
4847 }
4848
4849 demand_empty_rest_of_line ();
0baf16f2
AM		 4850}
4851
4852/* See whether a symbol is in the TOC section. */
4853
4854static int
98027b10 4855ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4856{
4857#ifdef OBJ_XCOFF
96d56e9f 4858 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4859#endif
4860#ifdef OBJ_ELF
4861 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4862 if (ppc_obj64)
0baf16f2
AM		 4863 return strcmp (sname, ".toc") == 0;
4864 else
4865 return strcmp (sname, ".got") == 0;
4866#endif
4867}
4868#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4869\f
4870#ifdef TE_PE
4871
99a814a1 4872/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4873
4874/* Set the current section. */
4875static void
98027b10 4876ppc_set_current_section (segT new)
252b5132
RH		 4877{
4878 ppc_previous_section = ppc_current_section;
4879 ppc_current_section = new;
4880}
4881
4882/* pseudo-op: .previous
4883 behaviour: toggles the current section with the previous section.
4884 errors: None
99a814a1
AM		 4885 warnings: "No previous section" */
4886
252b5132 4887static void
98027b10 4888ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4889{
4890 symbolS *tmp;
4891
81d4177b 4892 if (ppc_previous_section == NULL)
252b5132 4893 {
d6ed37ed 4894 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 4895 return;
4896 }
4897
99a814a1 4898 subseg_set (ppc_previous_section, 0);
252b5132 4899
99a814a1 4900 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4901}
4902
4903/* pseudo-op: .pdata
4904 behaviour: predefined read only data section
b34976b6 4905 double word aligned
252b5132
RH		 4906 errors: None
4907 warnings: None
4908 initial: .section .pdata "adr3"
b34976b6 4909 a - don't know -- maybe a misprint
252b5132
RH		 4910 d - initialized data
4911 r - readable
4912 3 - double word aligned (that would be 4 byte boundary)
4913
4914 commentary:
4915 Tag index tables (also known as the function table) for exception
99a814a1 4916 handling, debugging, etc. */
252b5132 4917
252b5132 4918static void
98027b10 4919ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4920{
81d4177b 4921 if (pdata_section == 0)
252b5132
RH		 4922 {
4923 pdata_section = subseg_new (".pdata", 0);
81d4177b 4924
252b5132
RH		 4925 bfd_set_section_flags (stdoutput, pdata_section,
4926 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4927 | SEC_READONLY | SEC_DATA ));
81d4177b 4928
252b5132
RH		 4929 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4930 }
4931 else
4932 {
99a814a1 4933 pdata_section = subseg_new (".pdata", 0);
252b5132 4934 }
99a814a1 4935 ppc_set_current_section (pdata_section);
252b5132
RH		 4936}
4937
4938/* pseudo-op: .ydata
4939 behaviour: predefined read only data section
b34976b6 4940 double word aligned
252b5132
RH		 4941 errors: None
4942 warnings: None
4943 initial: .section .ydata "drw3"
b34976b6 4944 a - don't know -- maybe a misprint
252b5132
RH		 4945 d - initialized data
4946 r - readable
4947 3 - double word aligned (that would be 4 byte boundary)
4948 commentary:
4949 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4950 debugging, etc. */
4951
252b5132 4952static void
98027b10 4953ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4954{
81d4177b 4955 if (ydata_section == 0)
252b5132
RH		 4956 {
4957 ydata_section = subseg_new (".ydata", 0);
4958 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4959 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4960 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4961
4962 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4963 }
4964 else
4965 {
4966 ydata_section = subseg_new (".ydata", 0);
4967 }
99a814a1 4968 ppc_set_current_section (ydata_section);
252b5132
RH		 4969}
4970
4971/* pseudo-op: .reldata
4972 behaviour: predefined read write data section
b34976b6 4973 double word aligned (4-byte)
252b5132
RH		 4974 FIXME: relocation is applied to it
4975 FIXME: what's the difference between this and .data?
4976 errors: None
4977 warnings: None
4978 initial: .section .reldata "drw3"
4979 d - initialized data
4980 r - readable
4981 w - writeable
4982 3 - double word aligned (that would be 8 byte boundary)
4983
4984 commentary:
4985 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4986 function descriptors, etc. */
4987
252b5132 4988static void
98027b10 4989ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4990{
4991 if (reldata_section == 0)
4992 {
4993 reldata_section = subseg_new (".reldata", 0);
4994
4995 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4996 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4997 | SEC_DATA));
252b5132
RH		 4998
4999 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5000 }
5001 else
5002 {
5003 reldata_section = subseg_new (".reldata", 0);
5004 }
99a814a1 5005 ppc_set_current_section (reldata_section);
252b5132
RH		 5006}
5007
5008/* pseudo-op: .rdata
5009 behaviour: predefined read only data section
b34976b6 5010 double word aligned
252b5132
RH		 5011 errors: None
5012 warnings: None
5013 initial: .section .rdata "dr3"
5014 d - initialized data
5015 r - readable
99a814a1
AM		 5016 3 - double word aligned (that would be 4 byte boundary) */
5017
252b5132 5018static void
98027b10 5019ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5020{
5021 if (rdata_section == 0)
5022 {
5023 rdata_section = subseg_new (".rdata", 0);
5024 bfd_set_section_flags (stdoutput, rdata_section,
5025 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5026 | SEC_READONLY | SEC_DATA ));
5027
5028 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5029 }
5030 else
5031 {
5032 rdata_section = subseg_new (".rdata", 0);
5033 }
99a814a1 5034 ppc_set_current_section (rdata_section);
252b5132
RH		 5035}
5036
5037/* pseudo-op: .ualong
81d4177b 5038 behaviour: much like .int, with the exception that no alignment is
b34976b6 5039 performed.
252b5132
RH		 5040 FIXME: test the alignment statement
5041 errors: None
99a814a1
AM		 5042 warnings: None */
5043
252b5132 5044static void
98027b10 5045ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5046{
99a814a1
AM		 5047 /* Try for long. */
5048 cons (4);
252b5132
RH		 5049}
5050
5051/* pseudo-op: .znop <symbol name>
5052 behaviour: Issue a nop instruction
b34976b6 5053 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5054 the supplied symbol name.
5055 errors: None
99a814a1
AM		 5056 warnings: Missing symbol name */
5057
252b5132 5058static void
98027b10 5059ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5060{
5061 unsigned long insn;
5062 const struct powerpc_opcode *opcode;
5063 expressionS ex;
5064 char *f;
252b5132 5065 symbolS *sym;
252b5132
RH		 5066 char *symbol_name;
5067 char c;
5068 char *name;
5069 unsigned int exp;
5070 flagword flags;
5071 asection *sec;
5072
99a814a1 5073 /* Strip out the symbol name. */
252b5132
RH		 5074 symbol_name = input_line_pointer;
5075 c = get_symbol_end ();
5076
5077 name = xmalloc (input_line_pointer - symbol_name + 1);
5078 strcpy (name, symbol_name);
5079
5080 sym = symbol_find_or_make (name);
5081
5082 *input_line_pointer = c;
5083
5084 SKIP_WHITESPACE ();
5085
5086 /* Look up the opcode in the hash table. */
5087 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5088
99a814a1 5089 /* Stick in the nop. */
252b5132
RH		 5090 insn = opcode->opcode;
5091
5092 /* Write out the instruction. */
5093 f = frag_more (4);
5094 md_number_to_chars (f, insn, 4);
5095 fix_new (frag_now,
5096 f - frag_now->fr_literal,
5097 4,
5098 sym,
5099 0,
5100 0,
5101 BFD_RELOC_16_GOT_PCREL);
5102
5103}
5104
81d4177b
KH		 5105/* pseudo-op:
5106 behaviour:
5107 errors:
99a814a1
AM		 5108 warnings: */
5109
252b5132 5110static void
98027b10 5111ppc_pe_comm (int lcomm)
252b5132 5112{
98027b10
AM		 5113 char *name;
5114 char c;
5115 char *p;
252b5132 5116 offsetT temp;
98027b10 5117 symbolS *symbolP;
252b5132
RH		 5118 offsetT align;
5119
5120 name = input_line_pointer;
5121 c = get_symbol_end ();
5122
99a814a1 5123 /* just after name is now '\0'. */
252b5132
RH		 5124 p = input_line_pointer;
5125 *p = c;
5126 SKIP_WHITESPACE ();
5127 if (*input_line_pointer != ',')
5128 {
d6ed37ed 5129 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5130 ignore_rest_of_line ();
5131 return;
5132 }
5133
5134 input_line_pointer++; /* skip ',' */
5135 if ((temp = get_absolute_expression ()) < 0)
5136 {
5137 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5138 ignore_rest_of_line ();
5139 return;
5140 }
5141
5142 if (! lcomm)
5143 {
5144 /* The third argument to .comm is the alignment. */
5145 if (*input_line_pointer != ',')
5146 align = 3;
5147 else
5148 {
5149 ++input_line_pointer;
5150 align = get_absolute_expression ();
5151 if (align <= 0)
5152 {
5153 as_warn (_("ignoring bad alignment"));
5154 align = 3;
5155 }
5156 }
5157 }
5158
5159 *p = 0;
5160 symbolP = symbol_find_or_make (name);
5161
5162 *p = c;
5163 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5164 {
d6ed37ed 5165 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5166 S_GET_NAME (symbolP));
5167 ignore_rest_of_line ();
5168 return;
5169 }
5170
5171 if (S_GET_VALUE (symbolP))
5172 {
5173 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5174 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5175 S_GET_NAME (symbolP),
5176 (long) S_GET_VALUE (symbolP),
5177 (long) temp);
5178 }
5179 else
5180 {
5181 S_SET_VALUE (symbolP, (valueT) temp);
5182 S_SET_EXTERNAL (symbolP);
86ebace2 5183 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5184 }
5185
5186 demand_empty_rest_of_line ();
5187}
5188
5189/*
5190 * implement the .section pseudo op:
5191 * .section name {, "flags"}
5192 * ^ ^
5193 * | +--- optional flags: 'b' for bss
5194 * | 'i' for info
5195 * +-- section name 'l' for lib
5196 * 'n' for noload
5197 * 'o' for over
5198 * 'w' for data
5199 * 'd' (apparently m88k for data)
5200 * 'x' for text
5201 * But if the argument is not a quoted string, treat it as a
5202 * subsegment number.
5203 *
5204 * FIXME: this is a copy of the section processing from obj-coff.c, with
5205 * additions/changes for the moto-pas assembler support. There are three
5206 * categories:
5207 *
81d4177b 5208 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5209 * setting bits that bfd probably neither understands or uses. The
5210 * correct approach (?) will have to incorporate extra fields attached
5211 * to the section to hold the system specific stuff. (krk)
5212 *
5213 * Section Contents:
5214 * 'a' - unknown - referred to in documentation, but no definition supplied
5215 * 'c' - section has code
5216 * 'd' - section has initialized data
5217 * 'u' - section has uninitialized data
5218 * 'i' - section contains directives (info)
5219 * 'n' - section can be discarded
5220 * 'R' - remove section at link time
5221 *
5222 * Section Protection:
5223 * 'r' - section is readable
5224 * 'w' - section is writeable
5225 * 'x' - section is executable
5226 * 's' - section is sharable
5227 *
5228 * Section Alignment:
5229 * '0' - align to byte boundary
5230 * '1' - align to halfword undary
5231 * '2' - align to word boundary
5232 * '3' - align to doubleword boundary
5233 * '4' - align to quadword boundary
5234 * '5' - align to 32 byte boundary
5235 * '6' - align to 64 byte boundary
5236 *
5237 */
5238
5239void
98027b10 5240ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5241{
99a814a1 5242 /* Strip out the section name. */
252b5132
RH		 5243 char *section_name;
5244 char c;
5245 char *name;
5246 unsigned int exp;
5247 flagword flags;
5248 segT sec;
5249 int align;
5250
5251 section_name = input_line_pointer;
5252 c = get_symbol_end ();
5253
5254 name = xmalloc (input_line_pointer - section_name + 1);
5255 strcpy (name, section_name);
5256
5257 *input_line_pointer = c;
5258
5259 SKIP_WHITESPACE ();
5260
5261 exp = 0;
5262 flags = SEC_NO_FLAGS;
5263
5264 if (strcmp (name, ".idata$2") == 0)
5265 {
5266 align = 0;
5267 }
5268 else if (strcmp (name, ".idata$3") == 0)
5269 {
5270 align = 0;
5271 }
5272 else if (strcmp (name, ".idata$4") == 0)
5273 {
5274 align = 2;
5275 }
5276 else if (strcmp (name, ".idata$5") == 0)
5277 {
5278 align = 2;
5279 }
5280 else if (strcmp (name, ".idata$6") == 0)
5281 {
5282 align = 1;
5283 }
5284 else
99a814a1
AM		 5285 /* Default alignment to 16 byte boundary. */
5286 align = 4;
252b5132
RH		 5287
5288 if (*input_line_pointer == ',')
5289 {
5290 ++input_line_pointer;
5291 SKIP_WHITESPACE ();
5292 if (*input_line_pointer != '"')
5293 exp = get_absolute_expression ();
5294 else
5295 {
5296 ++input_line_pointer;
5297 while (*input_line_pointer != '"'
5298 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5299 {
5300 switch (*input_line_pointer)
5301 {
5302 /* Section Contents */
5303 case 'a': /* unknown */
d6ed37ed 5304 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5305 break;
5306 case 'c': /* code section */
81d4177b 5307 flags |= SEC_CODE;
252b5132
RH		 5308 break;
5309 case 'd': /* section has initialized data */
5310 flags |= SEC_DATA;
5311 break;
5312 case 'u': /* section has uninitialized data */
5313 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5314 in winnt.h */
5315 flags |= SEC_ROM;
5316 break;
5317 case 'i': /* section contains directives (info) */
5318 /* FIXME: This is IMAGE_SCN_LNK_INFO
5319 in winnt.h */
5320 flags |= SEC_HAS_CONTENTS;
5321 break;
5322 case 'n': /* section can be discarded */
81d4177b 5323 flags &=~ SEC_LOAD;
252b5132
RH		 5324 break;
5325 case 'R': /* Remove section at link time */
5326 flags |= SEC_NEVER_LOAD;
5327 break;
8d452c78 5328#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5329 /* Section Protection */
5330 case 'r': /* section is readable */
5331 flags |= IMAGE_SCN_MEM_READ;
5332 break;
5333 case 'w': /* section is writeable */
5334 flags |= IMAGE_SCN_MEM_WRITE;
5335 break;
5336 case 'x': /* section is executable */
5337 flags |= IMAGE_SCN_MEM_EXECUTE;
5338 break;
5339 case 's': /* section is sharable */
5340 flags |= IMAGE_SCN_MEM_SHARED;
5341 break;
5342
5343 /* Section Alignment */
5344 case '0': /* align to byte boundary */
5345 flags |= IMAGE_SCN_ALIGN_1BYTES;
5346 align = 0;
5347 break;
5348 case '1': /* align to halfword boundary */
5349 flags |= IMAGE_SCN_ALIGN_2BYTES;
5350 align = 1;
5351 break;
5352 case '2': /* align to word boundary */
5353 flags |= IMAGE_SCN_ALIGN_4BYTES;
5354 align = 2;
5355 break;
5356 case '3': /* align to doubleword boundary */
5357 flags |= IMAGE_SCN_ALIGN_8BYTES;
5358 align = 3;
5359 break;
5360 case '4': /* align to quadword boundary */
5361 flags |= IMAGE_SCN_ALIGN_16BYTES;
5362 align = 4;
5363 break;
5364 case '5': /* align to 32 byte boundary */
5365 flags |= IMAGE_SCN_ALIGN_32BYTES;
5366 align = 5;
5367 break;
5368 case '6': /* align to 64 byte boundary */
5369 flags |= IMAGE_SCN_ALIGN_64BYTES;
5370 align = 6;
5371 break;
8d452c78 5372#endif
252b5132 5373 default:
99a814a1
AM		 5374 as_bad (_("unknown section attribute '%c'"),
5375 *input_line_pointer);
252b5132
RH		 5376 break;
5377 }
5378 ++input_line_pointer;
5379 }
5380 if (*input_line_pointer == '"')
5381 ++input_line_pointer;
5382 }
5383 }
5384
5385 sec = subseg_new (name, (subsegT) exp);
5386
99a814a1 5387 ppc_set_current_section (sec);
252b5132
RH		 5388
5389 if (flags != SEC_NO_FLAGS)
5390 {
5391 if (! bfd_set_section_flags (stdoutput, sec, flags))
5392 as_bad (_("error setting flags for \"%s\": %s"),
5393 bfd_section_name (stdoutput, sec),
5394 bfd_errmsg (bfd_get_error ()));
5395 }
5396
99a814a1 5397 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5398}
5399
5400static void
98027b10 5401ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5402{
5403 char *name;
5404 char endc;
5405 symbolS *ext_sym;
5406
5407 name = input_line_pointer;
5408 endc = get_symbol_end ();
5409
5410 ext_sym = symbol_find_or_make (name);
5411
5412 *input_line_pointer = endc;
5413
5414 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5415 SF_SET_FUNCTION (ext_sym);
5416 SF_SET_PROCESS (ext_sym);
5417 coff_add_linesym (ext_sym);
5418
5419 demand_empty_rest_of_line ();
5420}
5421
5422static void
98027b10 5423ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5424{
5425 if (tocdata_section == 0)
5426 {
5427 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5428 /* FIXME: section flags won't work. */
252b5132
RH		 5429 bfd_set_section_flags (stdoutput, tocdata_section,
5430 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5431 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5432
5433 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5434 }
5435 else
5436 {
5437 rdata_section = subseg_new (".tocd", 0);
5438 }
5439
99a814a1 5440 ppc_set_current_section (tocdata_section);
252b5132
RH		 5441
5442 demand_empty_rest_of_line ();
5443}
5444
5445/* Don't adjust TOC relocs to use the section symbol. */
5446
5447int
98027b10 5448ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5449{
5450 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5451}
5452
5453#endif
5454\f
5455#ifdef OBJ_XCOFF
5456
5457/* XCOFF specific symbol and file handling. */
5458
5459/* Canonicalize the symbol name. We use the to force the suffix, if
5460 any, to use square brackets, and to be in upper case. */
5461
5462char *
98027b10 5463ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5464{
5465 char *s;
5466
5467 if (ppc_stab_symbol)
5468 return name;
5469
5470 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5471 ;
5472 if (*s != '\0')
5473 {
5474 char brac;
5475
5476 if (*s == '[')
5477 brac = ']';
5478 else
5479 {
5480 *s = '[';
5481 brac = '}';
5482 }
5483
5484 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5485 *s = TOUPPER (*s);
252b5132
RH		 5486
5487 if (*s == '\0' || s[1] != '\0')
5488 as_bad (_("bad symbol suffix"));
5489
5490 *s = ']';
5491 }
5492
5493 return name;
5494}
5495
5496/* Set the class of a symbol based on the suffix, if any. This is
5497 called whenever a new symbol is created. */
5498
5499void
98027b10 5500ppc_symbol_new_hook (symbolS *sym)
252b5132 5501{
809ffe0d 5502 struct ppc_tc_sy *tc;
252b5132
RH		 5503 const char *s;
5504
809ffe0d
ILT		 5505 tc = symbol_get_tc (sym);
5506 tc->next = NULL;
5507 tc->output = 0;
96d56e9f 5508 tc->symbol_class = -1;
809ffe0d
ILT		 5509 tc->real_name = NULL;
5510 tc->subseg = 0;
5511 tc->align = 0;
85645aed
TG		 5512 tc->u.size = NULL;
5513 tc->u.dw = NULL;
809ffe0d 5514 tc->within = NULL;
252b5132
RH		 5515
5516 if (ppc_stab_symbol)
5517 return;
5518
5519 s = strchr (S_GET_NAME (sym), '[');
5520 if (s == (const char *) NULL)
5521 {
5522 /* There is no suffix. */
5523 return;
5524 }
5525
5526 ++s;
5527
5528 switch (s[0])
5529 {
5530 case 'B':
5531 if (strcmp (s, "BS]") == 0)
96d56e9f 5532 tc->symbol_class = XMC_BS;
252b5132
RH		 5533 break;
5534 case 'D':
5535 if (strcmp (s, "DB]") == 0)
96d56e9f 5536 tc->symbol_class = XMC_DB;
252b5132 5537 else if (strcmp (s, "DS]") == 0)
96d56e9f 5538 tc->symbol_class = XMC_DS;
252b5132
RH		 5539 break;
5540 case 'G':
5541 if (strcmp (s, "GL]") == 0)
96d56e9f 5542 tc->symbol_class = XMC_GL;
252b5132
RH		 5543 break;
5544 case 'P':
5545 if (strcmp (s, "PR]") == 0)
96d56e9f 5546 tc->symbol_class = XMC_PR;
252b5132
RH		 5547 break;
5548 case 'R':
5549 if (strcmp (s, "RO]") == 0)
96d56e9f 5550 tc->symbol_class = XMC_RO;
252b5132 5551 else if (strcmp (s, "RW]") == 0)
96d56e9f 5552 tc->symbol_class = XMC_RW;
252b5132
RH		 5553 break;
5554 case 'S':
5555 if (strcmp (s, "SV]") == 0)
96d56e9f 5556 tc->symbol_class = XMC_SV;
252b5132
RH		 5557 break;
5558 case 'T':
5559 if (strcmp (s, "TC]") == 0)
96d56e9f 5560 tc->symbol_class = XMC_TC;
252b5132 5561 else if (strcmp (s, "TI]") == 0)
96d56e9f 5562 tc->symbol_class = XMC_TI;
252b5132 5563 else if (strcmp (s, "TB]") == 0)
96d56e9f 5564 tc->symbol_class = XMC_TB;
252b5132 5565 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5566 tc->symbol_class = XMC_TC0;
252b5132
RH		 5567 break;
5568 case 'U':
5569 if (strcmp (s, "UA]") == 0)
96d56e9f 5570 tc->symbol_class = XMC_UA;
252b5132 5571 else if (strcmp (s, "UC]") == 0)
96d56e9f 5572 tc->symbol_class = XMC_UC;
252b5132
RH		 5573 break;
5574 case 'X':
5575 if (strcmp (s, "XO]") == 0)
96d56e9f 5576 tc->symbol_class = XMC_XO;
252b5132
RH		 5577 break;
5578 }
5579
96d56e9f 5580 if (tc->symbol_class == -1)
d6ed37ed 5581 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5582}
5583
5584/* Set the class of a label based on where it is defined. This
5585 handles symbols without suffixes. Also, move the symbol so that it
5586 follows the csect symbol. */
5587
5588void
98027b10 5589ppc_frob_label (symbolS *sym)
252b5132
RH		 5590{
5591 if (ppc_current_csect != (symbolS *) NULL)
5592 {
96d56e9f
NC		 5593 if (symbol_get_tc (sym)->symbol_class == -1)
5594 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5595
5596 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5597 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5598 &symbol_rootP, &symbol_lastP);
5599 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5600 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5601 }
07a53e5c
RH		 5602
5603#ifdef OBJ_ELF
5604 dwarf2_emit_label (sym);
5605#endif
252b5132
RH		 5606}
5607
5608/* This variable is set by ppc_frob_symbol if any absolute symbols are
5609 seen. It tells ppc_adjust_symtab whether it needs to look through
5610 the symbols. */
5611
b34976b6 5612static bfd_boolean ppc_saw_abs;
252b5132
RH		 5613
5614/* Change the name of a symbol just before writing it out. Set the
5615 real name if the .rename pseudo-op was used. Otherwise, remove any
5616 class suffix. Return 1 if the symbol should not be included in the
5617 symbol table. */
5618
5619int
98027b10 5620ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5621{
5622 static symbolS *ppc_last_function;
5623 static symbolS *set_end;
5624
5625 /* Discard symbols that should not be included in the output symbol
5626 table. */
809ffe0d
ILT		 5627 if (! symbol_used_in_reloc_p (sym)
5628 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5629 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5630 && ! symbol_get_tc (sym)->output
252b5132
RH		 5631 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5632 return 1;
5633
a161fe53
AM		 5634 /* This one will disappear anyway. Don't make a csect sym for it. */
5635 if (sym == abs_section_sym)
5636 return 1;
5637
809ffe0d
ILT		 5638 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5639 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5640 else
5641 {
5642 const char *name;
5643 const char *s;
5644
5645 name = S_GET_NAME (sym);
5646 s = strchr (name, '[');
5647 if (s != (char *) NULL)
5648 {
5649 unsigned int len;
5650 char *snew;
5651
5652 len = s - name;
5653 snew = xmalloc (len + 1);
5654 memcpy (snew, name, len);
5655 snew[len] = '\0';
5656
5657 S_SET_NAME (sym, snew);
5658 }
5659 }
5660
5661 if (set_end != (symbolS *) NULL)
5662 {
5663 SA_SET_SYM_ENDNDX (set_end, sym);
5664 set_end = NULL;
5665 }
5666
5667 if (SF_GET_FUNCTION (sym))
5668 {
5669 if (ppc_last_function != (symbolS *) NULL)
5670 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5671 ppc_last_function = sym;
85645aed 5672 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5673 {
85645aed 5674 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5675 SA_SET_SYM_FSIZE (sym,
85645aed 5676 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5677 }
5678 }
5679 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5680 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5681 {
5682 if (ppc_last_function == (symbolS *) NULL)
5683 as_bad (_(".ef with no preceding .function"));
5684 else
5685 {
5686 set_end = ppc_last_function;
5687 ppc_last_function = NULL;
5688
5689 /* We don't have a C_EFCN symbol, but we need to force the
5690 COFF backend to believe that it has seen one. */
5691 coff_last_function = NULL;
5692 }
5693 }
5694
670ec21d 5695 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5696 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5697 && S_GET_STORAGE_CLASS (sym) != C_FILE
5698 && S_GET_STORAGE_CLASS (sym) != C_FCN
5699 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5700 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5701 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5702 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5703 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5704 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5705 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5706
5707 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5708 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5709 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5710 {
5711 int i;
5712 union internal_auxent *a;
5713
5714 /* Create a csect aux. */
5715 i = S_GET_NUMBER_AUXILIARY (sym);
5716 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5717 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5718 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5719 {
5720 /* This is the TOC table. */
5721 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5722 a->x_csect.x_scnlen.l = 0;
5723 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5724 }
809ffe0d 5725 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5726 {
5727 /* This is a csect symbol. x_scnlen is the size of the
5728 csect. */
809ffe0d 5729 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5730 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5731 S_GET_SEGMENT (sym))
5732 - S_GET_VALUE (sym));
5733 else
5734 {
6386f3a7 5735 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5736 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5737 - S_GET_VALUE (sym));
5738 }
809ffe0d 5739 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5740 }
5741 else if (S_GET_SEGMENT (sym) == bss_section)
5742 {
5743 /* This is a common symbol. */
809ffe0d
ILT		 5744 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5745 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5746 if (S_IS_EXTERNAL (sym))
96d56e9f 5747 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5748 else
96d56e9f 5749 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5750 }
5751 else if (S_GET_SEGMENT (sym) == absolute_section)
5752 {
5753 /* This is an absolute symbol. The csect will be created by
99a814a1 5754 ppc_adjust_symtab. */
b34976b6 5755 ppc_saw_abs = TRUE;
252b5132 5756 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5757 if (symbol_get_tc (sym)->symbol_class == -1)
5758 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5759 }
5760 else if (! S_IS_DEFINED (sym))
5761 {
5762 /* This is an external symbol. */
5763 a->x_csect.x_scnlen.l = 0;
5764 a->x_csect.x_smtyp = XTY_ER;
5765 }
96d56e9f 5766 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5767 {
5768 symbolS *next;
5769
5770 /* This is a TOC definition. x_scnlen is the size of the
5771 TOC entry. */
5772 next = symbol_next (sym);
96d56e9f 5773 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5774 next = symbol_next (next);
5775 if (next == (symbolS *) NULL
96d56e9f 5776 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5777 {
5778 if (ppc_after_toc_frag == (fragS *) NULL)
5779 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5780 data_section)
5781 - S_GET_VALUE (sym));
5782 else
5783 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5784 - S_GET_VALUE (sym));
5785 }
5786 else
5787 {
6386f3a7 5788 resolve_symbol_value (next);
252b5132
RH		 5789 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5790 - S_GET_VALUE (sym));
5791 }
5792 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5793 }
5794 else
5795 {
5796 symbolS *csect;
5797
5798 /* This is a normal symbol definition. x_scnlen is the
5799 symbol index of the containing csect. */
5800 if (S_GET_SEGMENT (sym) == text_section)
5801 csect = ppc_text_csects;
5802 else if (S_GET_SEGMENT (sym) == data_section)
5803 csect = ppc_data_csects;
5804 else
5805 abort ();
5806
5807 /* Skip the initial dummy symbol. */
809ffe0d 5808 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5809
5810 if (csect == (symbolS *) NULL)
5811 {
5812 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5813 a->x_csect.x_scnlen.l = 0;
5814 }
5815 else
5816 {
809ffe0d 5817 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5818 {
6386f3a7 5819 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5820 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5821 > S_GET_VALUE (sym))
252b5132 5822 break;
809ffe0d 5823 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5824 }
5825
809ffe0d
ILT		 5826 a->x_csect.x_scnlen.p =
5827 coffsymbol (symbol_get_bfdsym (csect))->native;
5828 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5829 1;
252b5132
RH		 5830 }
5831 a->x_csect.x_smtyp = XTY_LD;
5832 }
81d4177b 5833
252b5132
RH		 5834 a->x_csect.x_parmhash = 0;
5835 a->x_csect.x_snhash = 0;
96d56e9f 5836 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5837 a->x_csect.x_smclas = XMC_PR;
5838 else
96d56e9f 5839 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5840 a->x_csect.x_stab = 0;
5841 a->x_csect.x_snstab = 0;
5842
5843 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5844 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5845 }
5846 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5847 {
5848 /* We want the value to be the symbol index of the referenced
5849 csect symbol. BFD will do that for us if we set the right
5850 flags. */
b782de16
AM		 5851 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5852 combined_entry_type *c = coffsymbol (bsym)->native;
5853
5854 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5855 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5856 }
5857 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5858 {
5859 symbolS *block;
c734e7e3 5860 valueT base;
252b5132 5861
809ffe0d 5862 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5863 if (block)
5864 {
5865 /* The value is the offset from the enclosing csect. */
5866 symbolS *csect;
5867
5868 csect = symbol_get_tc (block)->within;
5869 resolve_symbol_value (csect);
5870 base = S_GET_VALUE (csect);
5871 }
5872 else
5873 base = 0;
5874
5875 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5876 }
5877 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5878 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5879 {
5880 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5881 BFD will do that for us if we set the right flags. We have
5882 already set the value correctly. */
809ffe0d 5883 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5884 }
5885
5886 return 0;
5887}
5888
5889/* Adjust the symbol table. This creates csect symbols for all
5890 absolute symbols. */
5891
5892void
98027b10 5893ppc_adjust_symtab (void)
252b5132
RH		 5894{
5895 symbolS *sym;
5896
5897 if (! ppc_saw_abs)
5898 return;
5899
5900 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5901 {
5902 symbolS *csect;
5903 int i;
5904 union internal_auxent *a;
5905
5906 if (S_GET_SEGMENT (sym) != absolute_section)
5907 continue;
5908
5909 csect = symbol_create (".abs[XO]", absolute_section,
5910 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5911 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5912 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5913 i = S_GET_NUMBER_AUXILIARY (csect);
5914 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5915 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5916 a->x_csect.x_scnlen.l = 0;
5917 a->x_csect.x_smtyp = XTY_SD;
5918 a->x_csect.x_parmhash = 0;
5919 a->x_csect.x_snhash = 0;
5920 a->x_csect.x_smclas = XMC_XO;
5921 a->x_csect.x_stab = 0;
5922 a->x_csect.x_snstab = 0;
5923
5924 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5925
5926 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5927 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5928 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5929 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5930 }
5931
b34976b6 5932 ppc_saw_abs = FALSE;
252b5132
RH		 5933}
5934
5935/* Set the VMA for a section. This is called on all the sections in
5936 turn. */
5937
5938void
98027b10 5939ppc_frob_section (asection *sec)
252b5132 5940{
931e13a6 5941 static bfd_vma vma = 0;
252b5132 5942
85645aed
TG		 5943 /* Dwarf sections start at 0. */
5944 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5945 return;
5946
931e13a6 5947 vma = md_section_align (sec, vma);
252b5132
RH		 5948 bfd_set_section_vma (stdoutput, sec, vma);
5949 vma += bfd_section_size (stdoutput, sec);
5950}
5951
5952#endif /* OBJ_XCOFF */
5953\f
252b5132 5954char *
98027b10 5955md_atof (int type, char *litp, int *sizep)
252b5132 5956{
499ac353 5957 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5958}
5959
5960/* Write a value out to the object file, using the appropriate
5961 endianness. */
5962
5963void
98027b10 5964md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5965{
5966 if (target_big_endian)
5967 number_to_chars_bigendian (buf, val, n);
5968 else
5969 number_to_chars_littleendian (buf, val, n);
5970}
5971
5972/* Align a section (I don't know why this is machine dependent). */
5973
5974valueT
3aeeedbb 5975md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5976{
3aeeedbb
AM		 5977#ifdef OBJ_ELF
5978 return addr;
5979#else
252b5132
RH		 5980 int align = bfd_get_section_alignment (stdoutput, seg);
5981
5982 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5983#endif
252b5132
RH		 5984}
5985
5986/* We don't have any form of relaxing. */
5987
5988int
98027b10
AM		 5989md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5990 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5991{
5992 abort ();
5993 return 0;
5994}
5995
5996/* Convert a machine dependent frag. We never generate these. */
5997
5998void
98027b10
AM		 5999md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6000 asection *sec ATTRIBUTE_UNUSED,
6001 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6002{
6003 abort ();
6004}
6005
6006/* We have no need to default values of symbols. */
6007
252b5132 6008symbolS *
98027b10 6009md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6010{
6011 return 0;
6012}
6013\f
6014/* Functions concerning relocs. */
6015
6016/* The location from which a PC relative jump should be calculated,
6017 given a PC relative reloc. */
6018
6019long
98027b10 6020md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6021{
6022 return fixp->fx_frag->fr_address + fixp->fx_where;
6023}
6024
6025#ifdef OBJ_XCOFF
6026
6027/* This is called to see whether a fixup should be adjusted to use a
6028 section symbol. We take the opportunity to change a fixup against
6029 a symbol in the TOC subsegment into a reloc against the
6030 corresponding .tc symbol. */
6031
6032int
98027b10 6033ppc_fix_adjustable (fixS *fix)
252b5132 6034{
b782de16
AM		 6035 valueT val = resolve_symbol_value (fix->fx_addsy);
6036 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6037 TC_SYMFIELD_TYPE *tc;
6038
6039 if (symseg == absolute_section)
6040 return 0;
252b5132 6041
85645aed
TG		 6042 /* Always adjust symbols in debugging sections. */
6043 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6044 return 1;
6045
252b5132 6046 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6047 && fix->fx_addsy != ppc_toc_csect
b782de16 6048 && symseg == data_section
252b5132
RH		 6049 && val >= ppc_toc_frag->fr_address
6050 && (ppc_after_toc_frag == (fragS *) NULL
6051 || val < ppc_after_toc_frag->fr_address))
6052 {
6053 symbolS *sy;
6054
6055 for (sy = symbol_next (ppc_toc_csect);
6056 sy != (symbolS *) NULL;
6057 sy = symbol_next (sy))
6058 {
b782de16
AM		 6059 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6060
96d56e9f 6061 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6062 continue;
96d56e9f 6063 if (sy_tc->symbol_class != XMC_TC)
252b5132 6064 break;
b782de16 6065 if (val == resolve_symbol_value (sy))
252b5132
RH		 6066 {
6067 fix->fx_addsy = sy;
6068 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6069 return 0;
6070 }
6071 }
6072
6073 as_bad_where (fix->fx_file, fix->fx_line,
6074 _("symbol in .toc does not match any .tc"));
6075 }
6076
6077 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6078 tc = symbol_get_tc (fix->fx_addsy);
6079 if (tc->subseg == 0
96d56e9f
NC		 6080 && tc->symbol_class != XMC_TC0
6081 && tc->symbol_class != XMC_TC
b782de16 6082 && symseg != bss_section
252b5132 6083 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6084 && (symseg != data_section
252b5132
RH		 6085 || ppc_toc_csect == NULL
6086 || val < ppc_toc_frag->fr_address
6087 || (ppc_after_toc_frag != NULL
6088 && val >= ppc_after_toc_frag->fr_address)))
6089 {
2fb4b302 6090 symbolS *csect = tc->within;
252b5132 6091
2fb4b302
TG		 6092 /* If the symbol was not declared by a label (eg: a section symbol),
6093 use the section instead of the csect. This doesn't happen in
6094 normal AIX assembly code. */
6095 if (csect == NULL)
6096 csect = seg_info (symseg)->sym;
252b5132 6097
2fb4b302
TG		 6098 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6099 fix->fx_addsy = csect;
252b5132 6100
b782de16 6101 return 0;
252b5132
RH		 6102 }
6103
6104 /* Adjust a reloc against a .lcomm symbol to be against the base
6105 .lcomm. */
b782de16 6106 if (symseg == bss_section
252b5132
RH		 6107 && ! S_IS_EXTERNAL (fix->fx_addsy))
6108 {
b782de16
AM		 6109 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6110
6111 fix->fx_offset += val - resolve_symbol_value (sy);
6112 fix->fx_addsy = sy;
252b5132
RH		 6113 }
6114
6115 return 0;
6116}
6117
6118/* A reloc from one csect to another must be kept. The assembler
6119 will, of course, keep relocs between sections, and it will keep
6120 absolute relocs, but we need to force it to keep PC relative relocs
6121 between two csects in the same section. */
6122
6123int
98027b10 6124ppc_force_relocation (fixS *fix)
252b5132
RH		 6125{
6126 /* At this point fix->fx_addsy should already have been converted to
6127 a csect symbol. If the csect does not include the fragment, then
6128 we need to force the relocation. */
6129 if (fix->fx_pcrel
6130 && fix->fx_addsy != NULL
809ffe0d
ILT		 6131 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6132 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6133 > fix->fx_frag->fr_address)
6134 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6135 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6136 <= fix->fx_frag->fr_address))))
6137 return 1;
6138
ae6063d4 6139 return generic_force_reloc (fix);
252b5132
RH		 6140}
6141
2fb4b302
TG		 6142void
6143ppc_new_dot_label (symbolS *sym)
6144{
6145 /* Anchor this label to the current csect for relocations. */
6146 symbol_get_tc (sym)->within = ppc_current_csect;
6147}
6148
252b5132
RH		 6149#endif /* OBJ_XCOFF */
6150
0baf16f2 6151#ifdef OBJ_ELF
a161fe53
AM		 6152/* If this function returns non-zero, it guarantees that a relocation
6153 will be emitted for a fixup. */
6154
6155int
98027b10 6156ppc_force_relocation (fixS *fix)
a161fe53
AM		 6157{
6158 /* Branch prediction relocations must force a relocation, as must
6159 the vtable description relocs. */
6160 switch (fix->fx_r_type)
6161 {
6162 case BFD_RELOC_PPC_B16_BRTAKEN:
6163 case BFD_RELOC_PPC_B16_BRNTAKEN:
6164 case BFD_RELOC_PPC_BA16_BRTAKEN:
6165 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6166 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6167 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 6168 return 1;
6169 default:
6170 break;
6171 }
6172
cdba85ec
AM		 6173 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6174 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6175 return 1;
6176
ae6063d4 6177 return generic_force_reloc (fix);
a161fe53
AM		 6178}
6179
0baf16f2 6180int
98027b10 6181ppc_fix_adjustable (fixS *fix)
252b5132 6182{
0baf16f2
AM		 6183 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6184 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6185 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6186 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6187 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6188 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6189 && fix->fx_r_type != BFD_RELOC_GPREL16
6190 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6191 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6192 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6193 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6194}
0baf16f2 6195#endif
252b5132 6196
b9c361e0
JL		 6197void
6198ppc_frag_check (struct frag *fragP)
6199{
6200 if (!fragP->has_code)
6201 return;
6202
6203 if (ppc_mach() == bfd_mach_ppc_vle)
6204 {
6205 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6206 as_bad (_("instruction address is not a multiple of 2"));
6207 }
6208 else
6209 {
6210 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6211 as_bad (_("instruction address is not a multiple of 4"));
6212 }
6213}
6214
3aeeedbb
AM		 6215/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6216 rs_align_code frag. */
6217
6218void
6219ppc_handle_align (struct frag *fragP)
6220{
6221 valueT count = (fragP->fr_next->fr_address
6222 - (fragP->fr_address + fragP->fr_fix));
6223
b9c361e0
JL		 6224 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6225 {
6226 char *dest = fragP->fr_literal + fragP->fr_fix;
6227
6228 fragP->fr_var = 2;
6229 md_number_to_chars (dest, 0x4400, 2);
6230 }
6231 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6232 {
6233 char *dest = fragP->fr_literal + fragP->fr_fix;
6234
6235 fragP->fr_var = 4;
cef4f754
AM		 6236
6237 if (count > 4 * nop_limit && count < 0x2000000)
6238 {
6239 struct frag *rest;
6240
6241 /* Make a branch, then follow with nops. Insert another
6242 frag to handle the nops. */
6243 md_number_to_chars (dest, 0x48000000 + count, 4);
6244 count -= 4;
6245 if (count == 0)
6246 return;
6247
6248 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6249 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6250 fragP->fr_next = rest;
6251 fragP = rest;
6252 rest->fr_address += rest->fr_fix + 4;
6253 rest->fr_fix = 0;
6254 /* If we leave the next frag as rs_align_code we'll come here
6255 again, resulting in a bunch of branches rather than a
6256 branch followed by nops. */
6257 rest->fr_type = rs_align;
6258 dest = rest->fr_literal;
6259 }
6260
3aeeedbb
AM		 6261 md_number_to_chars (dest, 0x60000000, 4);
6262
42240548
PB		 6263 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6264 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 6265 {
42240548
PB		 6266 /* For power6 and power7, we want the last nop to be a group
6267 terminating one. Do this by inserting an rs_fill frag immediately
6268 after this one, with its address set to the last nop location.
6269 This will automatically reduce the number of nops in the current
6270 frag by one. */
3aeeedbb
AM		 6271 if (count > 4)
6272 {
6273 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6274
6275 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6276 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6277 group_nop->fr_fix = 0;
6278 group_nop->fr_offset = 1;
6279 group_nop->fr_type = rs_fill;
6280 fragP->fr_next = group_nop;
6281 dest = group_nop->fr_literal;
6282 }
6283
42240548 6284 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
aea77599
AM		 6285 {
6286 if (ppc_cpu & PPC_OPCODE_E500MC)
6287 /* e500mc group terminating nop: "ori 0,0,0". */
6288 md_number_to_chars (dest, 0x60000000, 4);
6289 else
6290 /* power7 group terminating nop: "ori 2,2,0". */
6291 md_number_to_chars (dest, 0x60420000, 4);
6292 }
42240548
PB		 6293 else
6294 /* power6 group terminating nop: "ori 1,1,0". */
6295 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6296 }
6297 }
6298}
6299
252b5132
RH		 6300/* Apply a fixup to the object code. This is called for all the
6301 fixups we generated by the call to fix_new_exp, above. In the call
6302 above we used a reloc code which was the largest legal reloc code
6303 plus the operand index. Here we undo that to recover the operand
6304 index. At this point all symbol values should be fully resolved,
6305 and we attempt to completely resolve the reloc. If we can not do
6306 that, we determine the correct reloc code and put it back in the
6307 fixup. */
6308
94f592af 6309void
98027b10 6310md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6311{
94f592af 6312 valueT value = * valP;
252b5132
RH		 6313
6314#ifdef OBJ_ELF
94f592af 6315 if (fixP->fx_addsy != NULL)
252b5132 6316 {
a161fe53 6317 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6318 if (fixP->fx_pcrel)
6319 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6320 }
6321 else
94f592af 6322 fixP->fx_done = 1;
252b5132 6323#else
a161fe53 6324 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6325 the symbol values. If we are doing this relocation the code in
6326 write.c is going to call bfd_install_relocation, which is also
6327 going to use the symbol value. That means that if the reloc is
6328 fully resolved we want to use *valP since bfd_install_relocation is
6329 not being used.
9f0eb232
RS		 6330 However, if the reloc is not fully resolved we do not want to
6331 use *valP, and must use fx_offset instead. If the relocation
6332 is PC-relative, we then need to re-apply md_pcrel_from_section
6333 to this new relocation value. */
94f592af
NC		 6334 if (fixP->fx_addsy == (symbolS *) NULL)
6335 fixP->fx_done = 1;
6336
252b5132 6337 else
9f0eb232
RS		 6338 {
6339 value = fixP->fx_offset;
6340 if (fixP->fx_pcrel)
6341 value -= md_pcrel_from_section (fixP, seg);
6342 }
a161fe53
AM		 6343#endif
6344
6345 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6346 {
a161fe53
AM		 6347 /* We can't actually support subtracting a symbol. */
6348 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6349 }
252b5132 6350
94f592af 6351 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 6352 {
6353 int opindex;
6354 const struct powerpc_operand *operand;
6355 char *where;
6356 unsigned long insn;
6357
94f592af 6358 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 6359
6360 operand = &powerpc_operands[opindex];
6361
6362#ifdef OBJ_XCOFF
0baf16f2
AM		 6363 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6364 does not generate a reloc. It uses the offset of `sym' within its
6365 csect. Other usages, such as `.long sym', generate relocs. This
6366 is the documented behaviour of non-TOC symbols. */
252b5132 6367 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6368 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6369 && operand->shift == 0
2b3c4602 6370 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6371 && fixP->fx_addsy != NULL
6372 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6373 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6374 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6375 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6376 {
94f592af
NC		 6377 value = fixP->fx_offset;
6378 fixP->fx_done = 1;
252b5132
RH		 6379 }
6380#endif
6381
6382 /* Fetch the instruction, insert the fully resolved operand
6383 value, and stuff the instruction back again. */
94f592af 6384 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132 6385 if (target_big_endian)
b9c361e0
JL		 6386 {
6387 if (fixP->fx_size == 4)
6388 insn = bfd_getb32 ((unsigned char *) where);
6389 else
6390 insn = bfd_getb16 ((unsigned char *) where);
6391 }
252b5132 6392 else
b9c361e0
JL		 6393 {
6394 if (fixP->fx_size == 4)
6395 insn = bfd_getl32 ((unsigned char *) where);
6396 else
6397 insn = bfd_getl16 ((unsigned char *) where);
6398 }
252b5132 6399 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 6400 fixP->tc_fix_data.ppc_cpu,
94f592af 6401 fixP->fx_file, fixP->fx_line);
252b5132 6402 if (target_big_endian)
b9c361e0
JL		 6403 {
6404 if (fixP->fx_size == 4)
6405 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6406 else
6407 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6408 }
252b5132 6409 else
b9c361e0
JL		 6410 {
6411 if (fixP->fx_size == 4)
6412 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6413 else
6414 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6415 }
252b5132 6416
94f592af
NC		 6417 if (fixP->fx_done)
6418 /* Nothing else to do here. */
6419 return;
252b5132 6420
9c2799c2 6421 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 6422
252b5132
RH		 6423 /* Determine a BFD reloc value based on the operand information.
6424 We are only prepared to turn a few of the operands into
0baf16f2 6425 relocs. */
11b37b7b 6426 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6427 && operand->bitm == 0x3fffffc
11b37b7b 6428 && operand->shift == 0)
94f592af 6429 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 6430 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6431 && operand->bitm == 0xfffc
11b37b7b 6432 && operand->shift == 0)
95210096
AM		 6433 {
6434 fixP->fx_r_type = BFD_RELOC_PPC_B16;
6435#ifdef OBJ_XCOFF
6436 fixP->fx_size = 2;
6437 if (target_big_endian)
6438 fixP->fx_where += 2;
6439#endif
6440 }
b9c361e0
JL		 6441 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
6442 && operand->bitm == 0x1fe
6443 && operand->shift == -1)
6444 fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL8;
6445 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
6446 && operand->bitm == 0xfffe
6447 && operand->shift == 0)
6448 fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL15;
6449 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
6450 && operand->bitm == 0x1fffffe
6451 && operand->shift == 0)
6452 fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL24;
11b37b7b 6453 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6454 && operand->bitm == 0x3fffffc
11b37b7b 6455 && operand->shift == 0)
94f592af 6456 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 6457 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6458 && operand->bitm == 0xfffc
11b37b7b 6459 && operand->shift == 0)
95210096
AM		 6460 {
6461 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
6462#ifdef OBJ_XCOFF
6463 fixP->fx_size = 2;
6464 if (target_big_endian)
6465 fixP->fx_where += 2;
6466#endif
6467 }
0baf16f2 6468#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 6469 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6470 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 6471 && operand->shift == 0)
11b37b7b 6472 {
a7fc733f
AM		 6473 if (ppc_is_toc_sym (fixP->fx_addsy))
6474 {
6475 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 6476#ifdef OBJ_ELF
a7fc733f
AM		 6477 if (ppc_obj64
6478 && (operand->flags & PPC_OPERAND_DS) != 0)
6479 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
6480#endif
6481 }
6482 else
6483 {
6484 fixP->fx_r_type = BFD_RELOC_16;
6485#ifdef OBJ_ELF
6486 if (ppc_obj64
6487 && (operand->flags & PPC_OPERAND_DS) != 0)
6488 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 6489#endif
a7fc733f 6490 }
94f592af 6491 fixP->fx_size = 2;
11b37b7b 6492 if (target_big_endian)
94f592af 6493 fixP->fx_where += 2;
11b37b7b 6494 }
0baf16f2 6495#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6496 else
252b5132
RH		 6497 {
6498 char *sfile;
6499 unsigned int sline;
6500
6501 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6502 symbol. */
94f592af
NC		 6503 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6504 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6505 _("unresolved expression that must be resolved"));
6506 else
94f592af 6507 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6508 _("unsupported relocation against %s"),
94f592af
NC		 6509 S_GET_NAME (fixP->fx_addsy));
6510 fixP->fx_done = 1;
6511 return;
252b5132
RH		 6512 }
6513 }
6514 else
6515 {
6516#ifdef OBJ_ELF
94f592af 6517 ppc_elf_validate_fix (fixP, seg);
252b5132 6518#endif
94f592af 6519 switch (fixP->fx_r_type)
252b5132 6520 {
252b5132 6521 case BFD_RELOC_CTOR:
2b3c4602 6522 if (ppc_obj64)
9c7977b3
AM		 6523 goto ctor64;
6524 /* fall through */
6525
0baf16f2 6526 case BFD_RELOC_32:
94f592af
NC		 6527 if (fixP->fx_pcrel)
6528 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6529 /* fall through */
252b5132
RH		 6530
6531 case BFD_RELOC_RVA:
6532 case BFD_RELOC_32_PCREL:
252b5132 6533 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6534 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6535 value, 4);
6536 break;
6537
7f6d05e8 6538 case BFD_RELOC_64:
9c7977b3 6539 ctor64:
94f592af
NC		 6540 if (fixP->fx_pcrel)
6541 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6542 /* fall through */
0baf16f2 6543
7f6d05e8 6544 case BFD_RELOC_64_PCREL:
94f592af 6545 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6546 value, 8);
81d4177b 6547 break;
0baf16f2 6548
252b5132
RH		 6549 case BFD_RELOC_GPREL16:
6550 case BFD_RELOC_16_GOT_PCREL:
6551 case BFD_RELOC_16_GOTOFF:
6552 case BFD_RELOC_LO16_GOTOFF:
6553 case BFD_RELOC_HI16_GOTOFF:
6554 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6555 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6556 case BFD_RELOC_LO16_BASEREL:
6557 case BFD_RELOC_HI16_BASEREL:
6558 case BFD_RELOC_HI16_S_BASEREL:
6559 case BFD_RELOC_PPC_EMB_NADDR16:
6560 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6561 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6562 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6563 case BFD_RELOC_PPC_EMB_SDAI16:
6564 case BFD_RELOC_PPC_EMB_SDA2REL:
6565 case BFD_RELOC_PPC_EMB_SDA2I16:
6566 case BFD_RELOC_PPC_EMB_RELSEC16:
6567 case BFD_RELOC_PPC_EMB_RELST_LO:
6568 case BFD_RELOC_PPC_EMB_RELST_HI:
6569 case BFD_RELOC_PPC_EMB_RELST_HA:
6570 case BFD_RELOC_PPC_EMB_RELSDA:
6571 case BFD_RELOC_PPC_TOC16:
0baf16f2 6572#ifdef OBJ_ELF
0baf16f2
AM		 6573 case BFD_RELOC_PPC64_TOC16_LO:
6574 case BFD_RELOC_PPC64_TOC16_HI:
6575 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6576#endif
94f592af 6577 if (fixP->fx_pcrel)
252b5132 6578 {
94f592af
NC		 6579 if (fixP->fx_addsy != NULL)
6580 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6581 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6582 bfd_get_reloc_code_name (fixP->fx_r_type),
6583 S_GET_NAME (fixP->fx_addsy));
252b5132 6584 else
94f592af 6585 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6586 _("cannot emit PC relative %s relocation"),
94f592af 6587 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6588 }
6589
94f592af 6590 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6591 value, 2);
6592 break;
6593
3c9d25f4
AM		 6594 case BFD_RELOC_16:
6595 if (fixP->fx_pcrel)
6596 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6597 /* fall through */
6598
6599 case BFD_RELOC_16_PCREL:
6600 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6601 value, 2);
6602 break;
6603
6604 case BFD_RELOC_LO16:
6605 if (fixP->fx_pcrel)
6606 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6607 /* fall through */
6608
6609 case BFD_RELOC_LO16_PCREL:
6610 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6611 value, 2);
6612 break;
6613
252b5132
RH		 6614 /* This case happens when you write, for example,
6615 lis %r3,(L1-L2)@ha
6616 where L1 and L2 are defined later. */
6617 case BFD_RELOC_HI16:
94f592af 6618 if (fixP->fx_pcrel)
3c9d25f4
AM		 6619 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6620 /* fall through */
6621
6622 case BFD_RELOC_HI16_PCREL:
94f592af 6623 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6624 PPC_HI (value), 2);
252b5132 6625 break;
0baf16f2 6626
252b5132 6627 case BFD_RELOC_HI16_S:
94f592af 6628 if (fixP->fx_pcrel)
3c9d25f4
AM		 6629 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6630 /* fall through */
6631
6632 case BFD_RELOC_HI16_S_PCREL:
94f592af 6633 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6634 PPC_HA (value), 2);
6635 break;
6636
b9c361e0
JL		 6637 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6638 case BFD_RELOC_PPC_VLE_LO16A:
6639 {
6640 int tval = PPC_VLE_LO16A (value);
6641 valueT oldval = md_chars_to_number (
6642 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6643 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6644 (oldval | tval), 4);
6645 }
6646 break;
6647
6648 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6649 case BFD_RELOC_PPC_VLE_LO16D:
6650 {
6651 int tval = PPC_VLE_LO16D (value);
6652 valueT oldval = md_chars_to_number (
6653 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6654 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6655 (oldval | tval), 4);
6656 }
6657 break;
6658
6659 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6660 case BFD_RELOC_PPC_VLE_HI16A:
6661 {
6662 int tval = PPC_VLE_HI16A (value);
6663 valueT oldval = md_chars_to_number (
6664 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6665 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6666 (oldval | tval), 4);
6667 }
6668 break;
6669
6670 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6671 case BFD_RELOC_PPC_VLE_HI16D:
6672 {
6673 int tval = PPC_VLE_HI16D (value);
6674 valueT oldval = md_chars_to_number (
6675 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6676 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6677 (oldval | tval), 4);
6678 }
6679 break;
6680
6681 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6682 case BFD_RELOC_PPC_VLE_HA16A:
6683 {
6684 int tval = PPC_VLE_HA16A (value);
6685 valueT oldval = md_chars_to_number (
6686 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6687 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6688 (oldval | tval), 4);
6689 }
6690 break;
6691
6692 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6693 case BFD_RELOC_PPC_VLE_HA16D:
6694 {
6695 int tval = PPC_VLE_HA16D (value);
6696 valueT oldval = md_chars_to_number (
6697 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6698 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6699 (oldval | tval), 4);
6700 }
6701 break;
6702
6703 case BFD_RELOC_PPC_VLE_SDA21_LO:
6704 {
6705 int tval = PPC_LO (value);
6706 valueT oldval = md_chars_to_number (
6707 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6708 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6709 (oldval | tval), 4);
6710 }
6711 break;
6712
6713 case BFD_RELOC_PPC_VLE_SDA21:
6714 {
6715 valueT oldval = md_chars_to_number (
6716 fixP->fx_frag->fr_literal + fixP->fx_where, 4);
6717 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6718 (oldval | value), 4);
6719 }
6720 break;
6721
c865e45b
RS		 6722#ifdef OBJ_XCOFF
6723 case BFD_RELOC_NONE:
6724 break;
6725#endif
6726
0baf16f2 6727#ifdef OBJ_ELF
0baf16f2 6728 case BFD_RELOC_PPC64_HIGHER:
94f592af 6729 if (fixP->fx_pcrel)
0baf16f2 6730 abort ();
94f592af 6731 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6732 PPC_HIGHER (value), 2);
252b5132
RH		 6733 break;
6734
0baf16f2 6735 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6736 if (fixP->fx_pcrel)
0baf16f2 6737 abort ();
94f592af 6738 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6739 PPC_HIGHERA (value), 2);
6740 break;
6741
6742 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6743 if (fixP->fx_pcrel)
0baf16f2 6744 abort ();
94f592af 6745 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6746 PPC_HIGHEST (value), 2);
6747 break;
6748
6749 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6750 if (fixP->fx_pcrel)
0baf16f2 6751 abort ();
94f592af 6752 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6753 PPC_HIGHESTA (value), 2);
6754 break;
6755
6756 case BFD_RELOC_PPC64_ADDR16_DS:
6757 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6758 case BFD_RELOC_PPC64_GOT16_DS:
6759 case BFD_RELOC_PPC64_GOT16_LO_DS:
6760 case BFD_RELOC_PPC64_PLT16_LO_DS:
6761 case BFD_RELOC_PPC64_SECTOFF_DS:
6762 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6763 case BFD_RELOC_PPC64_TOC16_DS:
6764 case BFD_RELOC_PPC64_TOC16_LO_DS:
6765 case BFD_RELOC_PPC64_PLTGOT16_DS:
6766 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6767 if (fixP->fx_pcrel)
0baf16f2
AM		 6768 abort ();
6769 {
2132e3a3 6770 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6771 unsigned long val, mask;
0baf16f2
AM		 6772
6773 if (target_big_endian)
adadcc0c 6774 val = bfd_getb32 (where - 2);
0baf16f2 6775 else
adadcc0c
AM		 6776 val = bfd_getl32 (where);
6777 mask = 0xfffc;
6778 /* lq insns reserve the four lsbs. */
6779 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6780 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6781 mask = 0xfff0;
6782 val |= value & mask;
0baf16f2
AM		 6783 if (target_big_endian)
6784 bfd_putb16 ((bfd_vma) val, where);
6785 else
6786 bfd_putl16 ((bfd_vma) val, where);
6787 }
6788 break;
cdba85ec 6789
ba0b2174
AM		 6790 case BFD_RELOC_PPC_B16_BRTAKEN:
6791 case BFD_RELOC_PPC_B16_BRNTAKEN:
6792 case BFD_RELOC_PPC_BA16_BRTAKEN:
6793 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6794 break;
6795
cdba85ec 6796 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6797 case BFD_RELOC_PPC_TLSGD:
6798 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6799 break;
6800
cdba85ec
AM		 6801 case BFD_RELOC_PPC_DTPMOD:
6802 case BFD_RELOC_PPC_TPREL16:
6803 case BFD_RELOC_PPC_TPREL16_LO:
6804 case BFD_RELOC_PPC_TPREL16_HI:
6805 case BFD_RELOC_PPC_TPREL16_HA:
6806 case BFD_RELOC_PPC_TPREL:
6807 case BFD_RELOC_PPC_DTPREL16:
6808 case BFD_RELOC_PPC_DTPREL16_LO:
6809 case BFD_RELOC_PPC_DTPREL16_HI:
6810 case BFD_RELOC_PPC_DTPREL16_HA:
6811 case BFD_RELOC_PPC_DTPREL:
6812 case BFD_RELOC_PPC_GOT_TLSGD16:
6813 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6814 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6815 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6816 case BFD_RELOC_PPC_GOT_TLSLD16:
6817 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6818 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6819 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6820 case BFD_RELOC_PPC_GOT_TPREL16:
6821 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6822 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6823 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6824 case BFD_RELOC_PPC_GOT_DTPREL16:
6825 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6826 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6827 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6828 case BFD_RELOC_PPC64_TPREL16_DS:
6829 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6830 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6831 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6832 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6833 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6834 case BFD_RELOC_PPC64_DTPREL16_DS:
6835 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6836 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6837 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6838 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6839 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6840 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6841 break;
0baf16f2 6842#endif
252b5132 6843 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6844 bytes, rather than 2, so offset it here appropriately. */
252b5132 6845 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6846 if (fixP->fx_pcrel)
252b5132
RH		 6847 abort ();
6848
94f592af 6849 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6850 + ((target_big_endian) ? 2 : 0),
6851 value, 2);
6852 break;
6853
6854 case BFD_RELOC_8:
94f592af 6855 if (fixP->fx_pcrel)
31a91399
NC		 6856 {
6857 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6858 ".byte <undefined_symbol> - ." */
31a91399 6859 if (fixP->fx_addsy)
d6ed37ed 6860 as_bad (_("unable to handle reference to symbol %s"),
31a91399
NC		 6861 S_GET_NAME (fixP->fx_addsy));
6862 else
d6ed37ed 6863 as_bad (_("unable to resolve expression"));
31a91399
NC		 6864 fixP->fx_done = 1;
6865 }
6866 else
6867 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6868 value, 1);
252b5132
RH		 6869 break;
6870
6871 case BFD_RELOC_24_PLT_PCREL:
6872 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6873 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6874 abort ();
6875
94f592af 6876 if (fixP->fx_done)
99a814a1
AM		 6877 {
6878 char *where;
6879 unsigned long insn;
6880
6881 /* Fetch the instruction, insert the fully resolved operand
6882 value, and stuff the instruction back again. */
94f592af 6883 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6884 if (target_big_endian)
6885 insn = bfd_getb32 ((unsigned char *) where);
6886 else
6887 insn = bfd_getl32 ((unsigned char *) where);
8fbf7334
JL		 6888 if (ppc_mach() == bfd_mach_ppc_vle)
6889 {
6890 if ((value & 1) != 0)
6891 as_bad_where (fixP->fx_file, fixP->fx_line,
6892 _("branch address must be a multiple of 2"));
6893 }
6894 else
6895 {
6896 if ((value & 3) != 0)
6897 as_bad_where (fixP->fx_file, fixP->fx_line,
6898 _("branch address must be a multiple of 4"));
6899 }
99a814a1
AM		 6900 if ((offsetT) value < -0x40000000
6901 || (offsetT) value >= 0x40000000)
94f592af 6902 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6903 _("@local or @plt branch destination is too far away, %ld bytes"),
6904 (long) value);
6905 insn = insn | (value & 0x03fffffc);
6906 if (target_big_endian)
6907 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6908 else
6909 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6910 }
252b5132
RH		 6911 break;
6912
6913 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6914 fixP->fx_done = 0;
6915 if (fixP->fx_addsy
6916 && !S_IS_DEFINED (fixP->fx_addsy)
6917 && !S_IS_WEAK (fixP->fx_addsy))
6918 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6919 break;
6920
6921 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6922 fixP->fx_done = 0;
252b5132
RH		 6923 break;
6924
0baf16f2 6925#ifdef OBJ_ELF
0baf16f2
AM		 6926 /* Generated by reference to `sym@tocbase'. The sym is
6927 ignored by the linker. */
6928 case BFD_RELOC_PPC64_TOC:
94f592af 6929 fixP->fx_done = 0;
0baf16f2 6930 break;
0baf16f2 6931#endif
252b5132 6932 default:
bc805888 6933 fprintf (stderr,
94f592af 6934 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6935 fflush (stderr);
252b5132
RH		 6936 abort ();
6937 }
6938 }
6939
6940#ifdef OBJ_ELF
94f592af 6941 fixP->fx_addnumber = value;
4e6935a6
AM		 6942
6943 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6944 from the section contents. If we are going to be emitting a reloc
6945 then the section contents are immaterial, so don't warn if they
6946 happen to overflow. Leave such warnings to ld. */
6947 if (!fixP->fx_done)
6948 fixP->fx_no_overflow = 1;
252b5132 6949#else
94f592af
NC		 6950 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6951 fixP->fx_addnumber = 0;
252b5132
RH		 6952 else
6953 {
6954#ifdef TE_PE
94f592af 6955 fixP->fx_addnumber = 0;
252b5132 6956#else
8edcbfcd
TG		 6957 /* We want to use the offset within the toc, not the actual VMA
6958 of the symbol. */
94f592af 6959 fixP->fx_addnumber =
8edcbfcd
TG		 6960 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6961 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6962#endif
6963 }
6964#endif
252b5132
RH		 6965}
6966
6967/* Generate a reloc for a fixup. */
6968
6969arelent *
98027b10 6970tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6971{
6972 arelent *reloc;
6973
6974 reloc = (arelent *) xmalloc (sizeof (arelent));
6975
49309057
ILT		 6976 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6977 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6978 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6979 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6980 if (reloc->howto == (reloc_howto_type *) NULL)
6981 {
6982 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6983 _("reloc %d not supported by object file format"),
6984 (int) fixp->fx_r_type);
252b5132
RH		 6985 return NULL;
6986 }
6987 reloc->addend = fixp->fx_addnumber;
6988
6989 return reloc;
6990}
75e21f08
JJ		 6991
6992void
98027b10 6993ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6994{
6995 cfi_add_CFA_def_cfa (1, 0);
6996}
6997
6998int
1df69f4f 6999tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7000{
7001 unsigned int regnum = -1;
7002 unsigned int i;
7003 const char *p;
7004 char *q;
7005 static struct { char *name; int dw2regnum; } regnames[] =
7006 {
7007 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7008 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7009 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7010 { "spe_acc", 111 }, { "spefscr", 112 }
7011 };
7012
7013 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7014 if (strcmp (regnames[i].name, regname) == 0)
7015 return regnames[i].dw2regnum;
7016
7017 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7018 {
7019 p = regname + 1 + (regname[1] == '.');
7020 regnum = strtoul (p, &q, 10);
7021 if (p == q || *q || regnum >= 32)
7022 return -1;
7023 if (regname[0] == 'f')
b7d7dc63 7024 regnum += 32;
75e21f08 7025 else if (regname[0] == 'v')
b7d7dc63 7026 regnum += 77;
75e21f08
JJ		 7027 }
7028 else if (regname[0] == 'c' && regname[1] == 'r')
7029 {
7030 p = regname + 2 + (regname[2] == '.');
7031 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7032 return -1;
75e21f08
JJ		 7033 regnum = p[0] - '0' + 68;
7034 }
7035 return regnum;
7036}
GDB Binutils - Deliverables
This page took 1.186094 seconds and 4 git commands to generate.