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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
9622b051 3 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
b34976b6 87static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 88static void ppc_set_cpu PARAMS ((void));
89static unsigned long ppc_insert_operand
90 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
91 offsetT val, char *file, unsigned int line));
92static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
93static void ppc_byte PARAMS ((int));
0baf16f2
AM		 94
95#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 96static int ppc_is_toc_sym PARAMS ((symbolS *sym));
97static void ppc_tc PARAMS ((int));
0baf16f2
AM		 98static void ppc_machine PARAMS ((int));
99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
102static void ppc_comm PARAMS ((int));
103static void ppc_bb PARAMS ((int));
104static void ppc_bc PARAMS ((int));
105static void ppc_bf PARAMS ((int));
106static void ppc_biei PARAMS ((int));
107static void ppc_bs PARAMS ((int));
108static void ppc_eb PARAMS ((int));
109static void ppc_ec PARAMS ((int));
110static void ppc_ef PARAMS ((int));
111static void ppc_es PARAMS ((int));
112static void ppc_csect PARAMS ((int));
931e13a6 113static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 114static void ppc_function PARAMS ((int));
115static void ppc_extern PARAMS ((int));
116static void ppc_lglobl PARAMS ((int));
117static void ppc_section PARAMS ((int));
118static void ppc_named_section PARAMS ((int));
119static void ppc_stabx PARAMS ((int));
120static void ppc_rename PARAMS ((int));
121static void ppc_toc PARAMS ((int));
122static void ppc_xcoff_cons PARAMS ((int));
123static void ppc_vbyte PARAMS ((int));
124#endif
125
126#ifdef OBJ_ELF
127static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
128static void ppc_elf_cons PARAMS ((int));
129static void ppc_elf_rdata PARAMS ((int));
130static void ppc_elf_lcomm PARAMS ((int));
131static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 132static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 133#endif
134
135#ifdef TE_PE
136static void ppc_set_current_section PARAMS ((segT));
137static void ppc_previous PARAMS ((int));
138static void ppc_pdata PARAMS ((int));
139static void ppc_ydata PARAMS ((int));
140static void ppc_reldata PARAMS ((int));
141static void ppc_rdata PARAMS ((int));
142static void ppc_ualong PARAMS ((int));
143static void ppc_znop PARAMS ((int));
144static void ppc_pe_comm PARAMS ((int));
145static void ppc_pe_section PARAMS ((int));
146static void ppc_pe_function PARAMS ((int));
147static void ppc_pe_tocd PARAMS ((int));
148#endif
149\f
150/* Generic assembler global variables which must be defined by all
151 targets. */
152
153#ifdef OBJ_ELF
154/* This string holds the chars that always start a comment. If the
155 pre-processor is disabled, these aren't very useful. The macro
156 tc_comment_chars points to this. We use this, rather than the
157 usual comment_chars, so that we can switch for Solaris conventions. */
158static const char ppc_solaris_comment_chars[] = "#!";
159static const char ppc_eabi_comment_chars[] = "#";
160
161#ifdef TARGET_SOLARIS_COMMENT
162const char *ppc_comment_chars = ppc_solaris_comment_chars;
163#else
164const char *ppc_comment_chars = ppc_eabi_comment_chars;
165#endif
166#else
167const char comment_chars[] = "#";
168#endif
169
170/* Characters which start a comment at the beginning of a line. */
171const char line_comment_chars[] = "#";
172
173/* Characters which may be used to separate multiple commands on a
174 single line. */
175const char line_separator_chars[] = ";";
176
177/* Characters which are used to indicate an exponent in a floating
178 point number. */
179const char EXP_CHARS[] = "eE";
180
181/* Characters which mean that a number is a floating point constant,
182 as in 0d1.0. */
183const char FLT_CHARS[] = "dD";
5ce8663f 184
5e02f92e 185/* Anything that can start an operand needs to be mentioned here,
ac805826 186 to stop the input scrubber eating whitespace. */
5e02f92e 187const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 188
189/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
190int ppc_cie_data_alignment;
252b5132
RH		 191\f
192/* The target specific pseudo-ops which we support. */
193
194const pseudo_typeS md_pseudo_table[] =
195{
196 /* Pseudo-ops which must be overridden. */
197 { "byte", ppc_byte, 0 },
198
199#ifdef OBJ_XCOFF
200 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
201 legitimately belong in the obj-*.c file. However, XCOFF is based
202 on COFF, and is only implemented for the RS/6000. We just use
203 obj-coff.c, and add what we need here. */
204 { "comm", ppc_comm, 0 },
205 { "lcomm", ppc_comm, 1 },
206 { "bb", ppc_bb, 0 },
207 { "bc", ppc_bc, 0 },
208 { "bf", ppc_bf, 0 },
209 { "bi", ppc_biei, 0 },
210 { "bs", ppc_bs, 0 },
211 { "csect", ppc_csect, 0 },
212 { "data", ppc_section, 'd' },
213 { "eb", ppc_eb, 0 },
214 { "ec", ppc_ec, 0 },
215 { "ef", ppc_ef, 0 },
216 { "ei", ppc_biei, 1 },
217 { "es", ppc_es, 0 },
218 { "extern", ppc_extern, 0 },
219 { "function", ppc_function, 0 },
220 { "lglobl", ppc_lglobl, 0 },
221 { "rename", ppc_rename, 0 },
222 { "section", ppc_named_section, 0 },
223 { "stabx", ppc_stabx, 0 },
224 { "text", ppc_section, 't' },
225 { "toc", ppc_toc, 0 },
226 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 227 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 228 { "word", ppc_xcoff_cons, 1 },
229 { "short", ppc_xcoff_cons, 1 },
230 { "vbyte", ppc_vbyte, 0 },
231#endif
232
233#ifdef OBJ_ELF
0baf16f2
AM		 234 { "llong", ppc_elf_cons, 8 },
235 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 236 { "long", ppc_elf_cons, 4 },
237 { "word", ppc_elf_cons, 2 },
238 { "short", ppc_elf_cons, 2 },
239 { "rdata", ppc_elf_rdata, 0 },
240 { "rodata", ppc_elf_rdata, 0 },
241 { "lcomm", ppc_elf_lcomm, 0 },
242#endif
243
244#ifdef TE_PE
99a814a1 245 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 246 { "previous", ppc_previous, 0 },
247 { "pdata", ppc_pdata, 0 },
248 { "ydata", ppc_ydata, 0 },
249 { "reldata", ppc_reldata, 0 },
250 { "rdata", ppc_rdata, 0 },
251 { "ualong", ppc_ualong, 0 },
252 { "znop", ppc_znop, 0 },
253 { "comm", ppc_pe_comm, 0 },
254 { "lcomm", ppc_pe_comm, 1 },
255 { "section", ppc_pe_section, 0 },
256 { "function", ppc_pe_function,0 },
257 { "tocd", ppc_pe_tocd, 0 },
258#endif
259
0baf16f2 260#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 261 { "tc", ppc_tc, 0 },
0baf16f2
AM		 262 { "machine", ppc_machine, 0 },
263#endif
252b5132
RH		 264
265 { NULL, NULL, 0 }
266};
267
268\f
99a814a1
AM		 269/* Predefined register names if -mregnames (or default for Windows NT).
270 In general, there are lots of them, in an attempt to be compatible
271 with a number of other Windows NT assemblers. */
252b5132
RH		 272
273/* Structure to hold information about predefined registers. */
274struct pd_reg
275 {
276 char *name;
277 int value;
278 };
279
280/* List of registers that are pre-defined:
281
282 Each general register has predefined names of the form:
283 1. r<reg_num> which has the value <reg_num>.
284 2. r.<reg_num> which has the value <reg_num>.
285
252b5132
RH		 286 Each floating point register has predefined names of the form:
287 1. f<reg_num> which has the value <reg_num>.
288 2. f.<reg_num> which has the value <reg_num>.
289
7a899fff
C		 290 Each vector unit register has predefined names of the form:
291 1. v<reg_num> which has the value <reg_num>.
292 2. v.<reg_num> which has the value <reg_num>.
293
252b5132
RH		 294 Each condition register has predefined names of the form:
295 1. cr<reg_num> which has the value <reg_num>.
296 2. cr.<reg_num> which has the value <reg_num>.
297
298 There are individual registers as well:
299 sp or r.sp has the value 1
300 rtoc or r.toc has the value 2
301 fpscr has the value 0
302 xer has the value 1
303 lr has the value 8
304 ctr has the value 9
305 pmr has the value 0
306 dar has the value 19
307 dsisr has the value 18
308 dec has the value 22
309 sdr1 has the value 25
310 srr0 has the value 26
311 srr1 has the value 27
312
81d4177b 313 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 314
315static const struct pd_reg pre_defined_registers[] =
316{
317 { "cr.0", 0 }, /* Condition Registers */
318 { "cr.1", 1 },
319 { "cr.2", 2 },
320 { "cr.3", 3 },
321 { "cr.4", 4 },
322 { "cr.5", 5 },
323 { "cr.6", 6 },
324 { "cr.7", 7 },
325
326 { "cr0", 0 },
327 { "cr1", 1 },
328 { "cr2", 2 },
329 { "cr3", 3 },
330 { "cr4", 4 },
331 { "cr5", 5 },
332 { "cr6", 6 },
333 { "cr7", 7 },
334
335 { "ctr", 9 },
336
337 { "dar", 19 }, /* Data Access Register */
338 { "dec", 22 }, /* Decrementer */
339 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
340
341 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 342 { "f.1", 1 },
343 { "f.10", 10 },
344 { "f.11", 11 },
345 { "f.12", 12 },
346 { "f.13", 13 },
347 { "f.14", 14 },
348 { "f.15", 15 },
349 { "f.16", 16 },
350 { "f.17", 17 },
351 { "f.18", 18 },
352 { "f.19", 19 },
353 { "f.2", 2 },
354 { "f.20", 20 },
355 { "f.21", 21 },
356 { "f.22", 22 },
357 { "f.23", 23 },
358 { "f.24", 24 },
359 { "f.25", 25 },
360 { "f.26", 26 },
361 { "f.27", 27 },
362 { "f.28", 28 },
363 { "f.29", 29 },
364 { "f.3", 3 },
252b5132
RH		 365 { "f.30", 30 },
366 { "f.31", 31 },
81d4177b
KH		 367 { "f.4", 4 },
368 { "f.5", 5 },
369 { "f.6", 6 },
370 { "f.7", 7 },
371 { "f.8", 8 },
372 { "f.9", 9 },
373
374 { "f0", 0 },
375 { "f1", 1 },
376 { "f10", 10 },
377 { "f11", 11 },
378 { "f12", 12 },
379 { "f13", 13 },
380 { "f14", 14 },
381 { "f15", 15 },
382 { "f16", 16 },
383 { "f17", 17 },
384 { "f18", 18 },
385 { "f19", 19 },
386 { "f2", 2 },
387 { "f20", 20 },
388 { "f21", 21 },
389 { "f22", 22 },
390 { "f23", 23 },
391 { "f24", 24 },
392 { "f25", 25 },
393 { "f26", 26 },
394 { "f27", 27 },
395 { "f28", 28 },
396 { "f29", 29 },
397 { "f3", 3 },
252b5132
RH		 398 { "f30", 30 },
399 { "f31", 31 },
81d4177b
KH		 400 { "f4", 4 },
401 { "f5", 5 },
402 { "f6", 6 },
403 { "f7", 7 },
404 { "f8", 8 },
405 { "f9", 9 },
252b5132
RH		 406
407 { "fpscr", 0 },
408
409 { "lr", 8 }, /* Link Register */
410
411 { "pmr", 0 },
412
413 { "r.0", 0 }, /* General Purpose Registers */
414 { "r.1", 1 },
415 { "r.10", 10 },
416 { "r.11", 11 },
417 { "r.12", 12 },
418 { "r.13", 13 },
419 { "r.14", 14 },
420 { "r.15", 15 },
421 { "r.16", 16 },
422 { "r.17", 17 },
423 { "r.18", 18 },
424 { "r.19", 19 },
425 { "r.2", 2 },
426 { "r.20", 20 },
427 { "r.21", 21 },
428 { "r.22", 22 },
429 { "r.23", 23 },
430 { "r.24", 24 },
431 { "r.25", 25 },
432 { "r.26", 26 },
433 { "r.27", 27 },
434 { "r.28", 28 },
435 { "r.29", 29 },
436 { "r.3", 3 },
437 { "r.30", 30 },
438 { "r.31", 31 },
439 { "r.4", 4 },
440 { "r.5", 5 },
441 { "r.6", 6 },
442 { "r.7", 7 },
443 { "r.8", 8 },
444 { "r.9", 9 },
445
446 { "r.sp", 1 }, /* Stack Pointer */
447
448 { "r.toc", 2 }, /* Pointer to the table of contents */
449
450 { "r0", 0 }, /* More general purpose registers */
451 { "r1", 1 },
452 { "r10", 10 },
453 { "r11", 11 },
454 { "r12", 12 },
455 { "r13", 13 },
456 { "r14", 14 },
457 { "r15", 15 },
458 { "r16", 16 },
459 { "r17", 17 },
460 { "r18", 18 },
461 { "r19", 19 },
462 { "r2", 2 },
463 { "r20", 20 },
464 { "r21", 21 },
465 { "r22", 22 },
466 { "r23", 23 },
467 { "r24", 24 },
468 { "r25", 25 },
469 { "r26", 26 },
470 { "r27", 27 },
471 { "r28", 28 },
472 { "r29", 29 },
473 { "r3", 3 },
474 { "r30", 30 },
475 { "r31", 31 },
476 { "r4", 4 },
477 { "r5", 5 },
478 { "r6", 6 },
479 { "r7", 7 },
480 { "r8", 8 },
481 { "r9", 9 },
482
483 { "rtoc", 2 }, /* Table of contents */
484
485 { "sdr1", 25 }, /* Storage Description Register 1 */
486
487 { "sp", 1 },
488
489 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
490 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 491
7a899fff 492 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 493 { "v.1", 1 },
494 { "v.10", 10 },
495 { "v.11", 11 },
496 { "v.12", 12 },
497 { "v.13", 13 },
498 { "v.14", 14 },
499 { "v.15", 15 },
500 { "v.16", 16 },
501 { "v.17", 17 },
502 { "v.18", 18 },
503 { "v.19", 19 },
504 { "v.2", 2 },
505 { "v.20", 20 },
506 { "v.21", 21 },
507 { "v.22", 22 },
508 { "v.23", 23 },
509 { "v.24", 24 },
510 { "v.25", 25 },
511 { "v.26", 26 },
512 { "v.27", 27 },
513 { "v.28", 28 },
514 { "v.29", 29 },
515 { "v.3", 3 },
7a899fff
C		 516 { "v.30", 30 },
517 { "v.31", 31 },
81d4177b
KH		 518 { "v.4", 4 },
519 { "v.5", 5 },
520 { "v.6", 6 },
521 { "v.7", 7 },
522 { "v.8", 8 },
523 { "v.9", 9 },
7a899fff
C		 524
525 { "v0", 0 },
81d4177b
KH		 526 { "v1", 1 },
527 { "v10", 10 },
528 { "v11", 11 },
529 { "v12", 12 },
530 { "v13", 13 },
531 { "v14", 14 },
532 { "v15", 15 },
533 { "v16", 16 },
534 { "v17", 17 },
535 { "v18", 18 },
536 { "v19", 19 },
537 { "v2", 2 },
538 { "v20", 20 },
539 { "v21", 21 },
540 { "v22", 22 },
541 { "v23", 23 },
542 { "v24", 24 },
543 { "v25", 25 },
544 { "v26", 26 },
545 { "v27", 27 },
546 { "v28", 28 },
547 { "v29", 29 },
548 { "v3", 3 },
7a899fff
C		 549 { "v30", 30 },
550 { "v31", 31 },
81d4177b
KH		 551 { "v4", 4 },
552 { "v5", 5 },
553 { "v6", 6 },
554 { "v7", 7 },
555 { "v8", 8 },
7a899fff 556 { "v9", 9 },
252b5132
RH		 557
558 { "xer", 1 },
559
560};
561
bc805888 562#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 563
564/* Given NAME, find the register number associated with that name, return
565 the integer value associated with the given name or -1 on failure. */
566
567static int reg_name_search
568 PARAMS ((const struct pd_reg *, int, const char * name));
569
570static int
571reg_name_search (regs, regcount, name)
572 const struct pd_reg *regs;
573 int regcount;
574 const char *name;
575{
576 int middle, low, high;
577 int cmp;
578
579 low = 0;
580 high = regcount - 1;
581
582 do
583 {
584 middle = (low + high) / 2;
585 cmp = strcasecmp (name, regs[middle].name);
586 if (cmp < 0)
587 high = middle - 1;
588 else if (cmp > 0)
589 low = middle + 1;
590 else
591 return regs[middle].value;
592 }
593 while (low <= high);
594
595 return -1;
596}
597
598/*
99a814a1 599 * Summary of register_name.
252b5132
RH		 600 *
601 * in: Input_line_pointer points to 1st char of operand.
602 *
603 * out: A expressionS.
604 * The operand may have been a register: in this case, X_op == O_register,
605 * X_add_number is set to the register number, and truth is returned.
606 * Input_line_pointer->(next non-blank) char after operand, or is in its
607 * original state.
608 */
609
b34976b6 610static bfd_boolean
252b5132
RH		 611register_name (expressionP)
612 expressionS *expressionP;
613{
614 int reg_number;
615 char *name;
616 char *start;
617 char c;
618
99a814a1 619 /* Find the spelling of the operand. */
252b5132 620 start = name = input_line_pointer;
3882b010 621 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 622 name = ++input_line_pointer;
623
3882b010 624 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 625 return FALSE;
252b5132
RH		 626
627 c = get_symbol_end ();
628 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
629
468cced8
AM		 630 /* Put back the delimiting char. */
631 *input_line_pointer = c;
632
99a814a1 633 /* Look to see if it's in the register table. */
81d4177b 634 if (reg_number >= 0)
252b5132
RH		 635 {
636 expressionP->X_op = O_register;
637 expressionP->X_add_number = reg_number;
81d4177b 638
99a814a1 639 /* Make the rest nice. */
252b5132
RH		 640 expressionP->X_add_symbol = NULL;
641 expressionP->X_op_symbol = NULL;
b34976b6 642 return TRUE;
252b5132 643 }
468cced8
AM		 644
645 /* Reset the line as if we had not done anything. */
646 input_line_pointer = start;
b34976b6 647 return FALSE;
252b5132
RH		 648}
649\f
650/* This function is called for each symbol seen in an expression. It
651 handles the special parsing which PowerPC assemblers are supposed
652 to use for condition codes. */
653
654/* Whether to do the special parsing. */
b34976b6 655static bfd_boolean cr_operand;
252b5132
RH		 656
657/* Names to recognize in a condition code. This table is sorted. */
658static const struct pd_reg cr_names[] =
659{
660 { "cr0", 0 },
661 { "cr1", 1 },
662 { "cr2", 2 },
663 { "cr3", 3 },
664 { "cr4", 4 },
665 { "cr5", 5 },
666 { "cr6", 6 },
667 { "cr7", 7 },
668 { "eq", 2 },
669 { "gt", 1 },
670 { "lt", 0 },
671 { "so", 3 },
672 { "un", 3 }
673};
674
675/* Parsing function. This returns non-zero if it recognized an
676 expression. */
677
678int
679ppc_parse_name (name, expr)
680 const char *name;
681 expressionS *expr;
682{
683 int val;
684
685 if (! cr_operand)
686 return 0;
687
688 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
689 name);
690 if (val < 0)
691 return 0;
692
693 expr->X_op = O_constant;
694 expr->X_add_number = val;
695
696 return 1;
697}
698\f
699/* Local variables. */
700
701/* The type of processor we are assembling for. This is one or more
702 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 703static unsigned long ppc_cpu = 0;
252b5132 704
2b3c4602
AM		 705/* Whether to target xcoff64/elf64. */
706static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 707
252b5132
RH		 708/* Opcode hash table. */
709static struct hash_control *ppc_hash;
710
711/* Macro hash table. */
712static struct hash_control *ppc_macro_hash;
713
714#ifdef OBJ_ELF
99a814a1 715/* What type of shared library support to use. */
5d6f4f16 716static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 717
99a814a1 718/* Flags to set in the elf header. */
252b5132
RH		 719static flagword ppc_flags = 0;
720
721/* Whether this is Solaris or not. */
722#ifdef TARGET_SOLARIS_COMMENT
b34976b6 723#define SOLARIS_P TRUE
252b5132 724#else
b34976b6 725#define SOLARIS_P FALSE
252b5132
RH		 726#endif
727
b34976b6 728static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 729#endif
730
731#ifdef OBJ_XCOFF
732
733/* The RS/6000 assembler uses the .csect pseudo-op to generate code
734 using a bunch of different sections. These assembler sections,
735 however, are all encompassed within the .text or .data sections of
736 the final output file. We handle this by using different
737 subsegments within these main segments. */
738
739/* Next subsegment to allocate within the .text segment. */
740static subsegT ppc_text_subsegment = 2;
741
742/* Linked list of csects in the text section. */
743static symbolS *ppc_text_csects;
744
745/* Next subsegment to allocate within the .data segment. */
746static subsegT ppc_data_subsegment = 2;
747
748/* Linked list of csects in the data section. */
749static symbolS *ppc_data_csects;
750
751/* The current csect. */
752static symbolS *ppc_current_csect;
753
754/* The RS/6000 assembler uses a TOC which holds addresses of functions
755 and variables. Symbols are put in the TOC with the .tc pseudo-op.
756 A special relocation is used when accessing TOC entries. We handle
757 the TOC as a subsegment within the .data segment. We set it up if
758 we see a .toc pseudo-op, and save the csect symbol here. */
759static symbolS *ppc_toc_csect;
760
761/* The first frag in the TOC subsegment. */
762static fragS *ppc_toc_frag;
763
764/* The first frag in the first subsegment after the TOC in the .data
765 segment. NULL if there are no subsegments after the TOC. */
766static fragS *ppc_after_toc_frag;
767
768/* The current static block. */
769static symbolS *ppc_current_block;
770
771/* The COFF debugging section; set by md_begin. This is not the
772 .debug section, but is instead the secret BFD section which will
773 cause BFD to set the section number of a symbol to N_DEBUG. */
774static asection *ppc_coff_debug_section;
775
776#endif /* OBJ_XCOFF */
777
778#ifdef TE_PE
779
780/* Various sections that we need for PE coff support. */
781static segT ydata_section;
782static segT pdata_section;
783static segT reldata_section;
784static segT rdata_section;
785static segT tocdata_section;
786
81d4177b 787/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 788static segT ppc_previous_section;
789static segT ppc_current_section;
790
791#endif /* TE_PE */
792
793#ifdef OBJ_ELF
794symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 795#define PPC_APUINFO_ISEL 0x40
796#define PPC_APUINFO_PMR 0x41
797#define PPC_APUINFO_RFMCI 0x42
798#define PPC_APUINFO_CACHELCK 0x43
799#define PPC_APUINFO_SPE 0x100
800#define PPC_APUINFO_EFS 0x101
801#define PPC_APUINFO_BRLOCK 0x102
802
b34976b6
AM		 803/*
804 * We keep a list of APUinfo
6a0c61b7
EZ		 805 */
806unsigned long *ppc_apuinfo_list;
807unsigned int ppc_apuinfo_num;
808unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 809#endif /* OBJ_ELF */
810\f
811#ifdef OBJ_ELF
15c1449b 812const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 813#else
15c1449b 814const char *const md_shortopts = "um:";
252b5132 815#endif
15c1449b 816const struct option md_longopts[] = {
252b5132
RH		 817 {NULL, no_argument, NULL, 0}
818};
15c1449b 819const size_t md_longopts_size = sizeof (md_longopts);
252b5132 820
69c040df
AM		 821
822/* Handle -m options that set cpu type, and .machine arg. */
823
824static int
825parse_cpu (const char *arg)
826{
827 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
828 (RIOS2). */
829 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
830 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
831 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
832 else if (strcmp (arg, "pwr") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
834 /* -m601 means to assemble for the PowerPC 601, which includes
835 instructions that are holdovers from the Power. */
836 else if (strcmp (arg, "601") == 0)
837 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
838 | PPC_OPCODE_601 | PPC_OPCODE_32);
839 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
840 PowerPC 603/604. */
841 else if (strcmp (arg, "ppc") == 0
842 || strcmp (arg, "ppc32") == 0
843 || strcmp (arg, "603") == 0
844 || strcmp (arg, "604") == 0)
845 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
846 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
847 else if (strcmp (arg, "403") == 0
848 || strcmp (arg, "405") == 0)
849 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
850 | PPC_OPCODE_403 | PPC_OPCODE_32);
851 else if (strcmp (arg, "440") == 0)
852 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
853 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
854 else if (strcmp (arg, "7400") == 0
855 || strcmp (arg, "7410") == 0
856 || strcmp (arg, "7450") == 0
857 || strcmp (arg, "7455") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
859 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 860 else if (strcmp (arg, "e300") == 0)
861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
862 | PPC_OPCODE_E300);
69c040df
AM		 863 else if (strcmp (arg, "altivec") == 0)
864 {
865 if (ppc_cpu == 0)
866 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
867 else
868 ppc_cpu |= PPC_OPCODE_ALTIVEC;
869 }
870 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
871 {
872 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
873 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
874 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
875 | PPC_OPCODE_RFMCI);
876 }
877 else if (strcmp (arg, "spe") == 0)
878 {
879 if (ppc_cpu == 0)
880 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
881 else
882 ppc_cpu |= PPC_OPCODE_SPE;
883 }
884 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
885 620. */
886 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
887 {
888 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
889 }
890 else if (strcmp (arg, "ppc64bridge") == 0)
891 {
892 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
893 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
894 }
895 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
896 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
897 {
898 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
899 }
900 /* -mbooke64 means enable 64-bit BookE support. */
901 else if (strcmp (arg, "booke64") == 0)
902 {
903 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
904 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
905 }
906 else if (strcmp (arg, "power4") == 0)
907 {
908 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
909 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
910 }
b0648eec
AM		 911 else if (strcmp (arg, "power5") == 0)
912 {
913 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
914 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
915 | PPC_OPCODE_POWER5);
916 }
9622b051
AM		 917 else if (strcmp (arg, "power6") == 0)
918 {
919 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
920 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
921 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
922 }
69c040df
AM		 923 /* -mcom means assemble for the common intersection between Power
924 and PowerPC. At present, we just allow the union, rather
925 than the intersection. */
926 else if (strcmp (arg, "com") == 0)
927 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
928 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
929 else if (strcmp (arg, "any") == 0)
930 ppc_cpu |= PPC_OPCODE_ANY;
931 else
932 return 0;
933
934 return 1;
935}
936
252b5132
RH		 937int
938md_parse_option (c, arg)
939 int c;
940 char *arg;
941{
942 switch (c)
943 {
944 case 'u':
945 /* -u means that any undefined symbols should be treated as
946 external, which is the default for gas anyhow. */
947 break;
948
949#ifdef OBJ_ELF
950 case 'l':
951 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 952 sake, recognize -be also. */
252b5132
RH		 953 if (strcmp (arg, "e") == 0)
954 {
955 target_big_endian = 0;
956 set_target_endian = 1;
957 }
958 else
959 return 0;
960
961 break;
962
963 case 'b':
964 if (strcmp (arg, "e") == 0)
965 {
966 target_big_endian = 1;
967 set_target_endian = 1;
968 }
969 else
970 return 0;
971
972 break;
973
974 case 'K':
99a814a1 975 /* Recognize -K PIC. */
252b5132
RH		 976 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
977 {
978 shlib = SHLIB_PIC;
979 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
980 }
981 else
982 return 0;
983
984 break;
985#endif
986
7f6d05e8
CP		 987 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
988 case 'a':
989 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 990 {
991#ifdef BFD64
992 ppc_obj64 = 1;
993#else
994 as_fatal (_("%s unsupported"), "-a64");
995#endif
996 }
7f6d05e8 997 else if (strcmp (arg, "32") == 0)
2b3c4602 998 ppc_obj64 = 0;
7f6d05e8
CP		 999 else
1000 return 0;
1001 break;
81d4177b 1002
252b5132 1003 case 'm':
69c040df
AM		 1004 if (parse_cpu (arg))
1005 ;
252b5132
RH		 1006
1007 else if (strcmp (arg, "regnames") == 0)
b34976b6 1008 reg_names_p = TRUE;
252b5132
RH		 1009
1010 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1011 reg_names_p = FALSE;
252b5132
RH		 1012
1013#ifdef OBJ_ELF
99a814a1
AM		 1014 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1015 that require relocation. */
252b5132
RH		 1016 else if (strcmp (arg, "relocatable") == 0)
1017 {
5d6f4f16 1018 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1019 ppc_flags |= EF_PPC_RELOCATABLE;
1020 }
1021
1022 else if (strcmp (arg, "relocatable-lib") == 0)
1023 {
5d6f4f16 1024 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1025 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1026 }
1027
99a814a1 1028 /* -memb, set embedded bit. */
252b5132
RH		 1029 else if (strcmp (arg, "emb") == 0)
1030 ppc_flags |= EF_PPC_EMB;
1031
99a814a1
AM		 1032 /* -mlittle/-mbig set the endianess. */
1033 else if (strcmp (arg, "little") == 0
1034 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1035 {
1036 target_big_endian = 0;
1037 set_target_endian = 1;
1038 }
1039
1040 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1041 {
1042 target_big_endian = 1;
1043 set_target_endian = 1;
1044 }
1045
1046 else if (strcmp (arg, "solaris") == 0)
1047 {
b34976b6 1048 msolaris = TRUE;
252b5132
RH		 1049 ppc_comment_chars = ppc_solaris_comment_chars;
1050 }
1051
1052 else if (strcmp (arg, "no-solaris") == 0)
1053 {
b34976b6 1054 msolaris = FALSE;
252b5132
RH		 1055 ppc_comment_chars = ppc_eabi_comment_chars;
1056 }
1057#endif
1058 else
1059 {
1060 as_bad (_("invalid switch -m%s"), arg);
1061 return 0;
1062 }
1063 break;
1064
1065#ifdef OBJ_ELF
1066 /* -V: SVR4 argument to print version ID. */
1067 case 'V':
1068 print_version_id ();
1069 break;
1070
1071 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1072 should be emitted or not. FIXME: Not implemented. */
1073 case 'Q':
1074 break;
1075
1076 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1077 rather than .stabs.excl, which is ignored by the linker.
1078 FIXME: Not implemented. */
1079 case 's':
1080 if (arg)
1081 return 0;
1082
1083 break;
1084#endif
1085
1086 default:
1087 return 0;
1088 }
1089
1090 return 1;
1091}
1092
1093void
1094md_show_usage (stream)
1095 FILE *stream;
1096{
bc805888 1097 fprintf (stream, _("\
252b5132 1098PowerPC options:\n\
df12615d
AM		 1099-a32 generate ELF32/XCOFF32\n\
1100-a64 generate ELF64/XCOFF64\n\
252b5132 1101-u ignored\n\
23e1d84c
AM		 1102-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1103-mpwr generate code for POWER (RIOS1)\n\
1104-m601 generate code for PowerPC 601\n\
418c1742 1105-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1106 generate code for PowerPC 603/604\n\
df12615d 1107-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1108-m440 generate code for PowerPC 440\n\
f5c120c5 1109-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1110 generate code For PowerPC 7400/7410/7450/7455\n"));
1111 fprintf (stream, _("\
23e1d84c 1112-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1113-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1114-mbooke64 generate code for 64-bit PowerPC BookE\n\
1115-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1116-mpower4 generate code for Power4 architecture\n\
b0648eec 1117-mpower5 generate code for Power5 architecture\n\
9622b051 1118-mpower6 generate code for Power6 architecture\n\
252b5132 1119-mcom generate code Power/PowerPC common instructions\n\
df12615d 1120-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1121 fprintf (stream, _("\
df12615d 1122-maltivec generate code for AltiVec\n\
36ae0db3 1123-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1124-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1125-mspe generate code for Motorola SPE instructions\n\
1126-mregnames Allow symbolic names for registers\n\
1127-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1128#ifdef OBJ_ELF
bc805888 1129 fprintf (stream, _("\
252b5132
RH		 1130-mrelocatable support for GCC's -mrelocatble option\n\
1131-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1132-memb set PPC_EMB bit in ELF flags\n\
df12615d 1133-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1134 generate code for a little endian machine\n\
df12615d
AM		 1135-mbig, -mbig-endian, -b, -be\n\
1136 generate code for a big endian machine\n\
252b5132
RH		 1137-msolaris generate code for Solaris\n\
1138-mno-solaris do not generate code for Solaris\n\
1139-V print assembler version number\n\
1140-Qy, -Qn ignored\n"));
1141#endif
1142}
1143\f
1144/* Set ppc_cpu if it is not already set. */
1145
1146static void
1147ppc_set_cpu ()
1148{
1149 const char *default_os = TARGET_OS;
1150 const char *default_cpu = TARGET_CPU;
1151
3c9030c1 1152 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1153 {
2a98c3a6 1154 if (ppc_obj64)
3c9030c1 1155 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1156 else if (strncmp (default_os, "aix", 3) == 0
1157 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1158 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1159 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1160 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1161 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1163 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1164 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1165 else
99a814a1
AM		 1166 as_fatal (_("Unknown default cpu = %s, os = %s"),
1167 default_cpu, default_os);
252b5132
RH		 1168 }
1169}
1170
9232bbb0
AM		 1171/* Figure out the BFD architecture to use. This function and ppc_mach
1172 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1173
1174enum bfd_architecture
1175ppc_arch ()
1176{
1177 const char *default_cpu = TARGET_CPU;
1178 ppc_set_cpu ();
1179
1180 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1181 return bfd_arch_powerpc;
1182 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1183 return bfd_arch_rs6000;
1184 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1185 {
1186 if (strcmp (default_cpu, "rs6000") == 0)
1187 return bfd_arch_rs6000;
0baf16f2 1188 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1189 return bfd_arch_powerpc;
1190 }
1191
1192 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1193 return bfd_arch_unknown;
1194}
1195
7f6d05e8
CP		 1196unsigned long
1197ppc_mach ()
1198{
2a98c3a6
AM		 1199 if (ppc_obj64)
1200 return bfd_mach_ppc64;
1201 else if (ppc_arch () == bfd_arch_rs6000)
1202 return bfd_mach_rs6k;
1203 else
1204 return bfd_mach_ppc;
7f6d05e8
CP		 1205}
1206
81d4177b 1207extern char*
99a814a1 1208ppc_target_format ()
7f6d05e8
CP		 1209{
1210#ifdef OBJ_COFF
1211#ifdef TE_PE
99a814a1 1212 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1213#elif TE_POWERMAC
0baf16f2 1214 return "xcoff-powermac";
7f6d05e8 1215#else
eb1e0e80 1216# ifdef TE_AIX5
2b3c4602 1217 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1218# else
2b3c4602 1219 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1220# endif
7f6d05e8 1221#endif
7f6d05e8
CP		 1222#endif
1223#ifdef OBJ_ELF
9d8504b1
PB		 1224# ifdef TE_VXWORKS
1225 return "elf32-powerpc-vxworks";
1226# else
0baf16f2 1227 return (target_big_endian
2b3c4602
AM		 1228 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1229 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1230# endif
7f6d05e8
CP		 1231#endif
1232}
1233
69c040df
AM		 1234/* Insert opcodes and macros into hash tables. Called at startup and
1235 for .cpu pseudo. */
252b5132 1236
69c040df
AM		 1237static void
1238ppc_setup_opcodes (void)
252b5132
RH		 1239{
1240 register const struct powerpc_opcode *op;
1241 const struct powerpc_opcode *op_end;
1242 const struct powerpc_macro *macro;
1243 const struct powerpc_macro *macro_end;
b34976b6 1244 bfd_boolean dup_insn = FALSE;
252b5132 1245
69c040df
AM		 1246 if (ppc_hash != NULL)
1247 hash_die (ppc_hash);
1248 if (ppc_macro_hash != NULL)
1249 hash_die (ppc_macro_hash);
252b5132
RH		 1250
1251 /* Insert the opcodes into a hash table. */
1252 ppc_hash = hash_new ();
1253
1254 op_end = powerpc_opcodes + powerpc_num_opcodes;
1255 for (op = powerpc_opcodes; op < op_end; op++)
1256 {
1257 know ((op->opcode & op->mask) == op->opcode);
1258
2b3c4602 1259 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1260 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1261 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1262 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1263 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1264 /* Certain instructions (eg: extsw) do not exist in the
1265 32-bit BookE instruction set, but they do exist in the
1266 64-bit BookE instruction set, and other PPC instruction
1267 sets. Check to see if the opcode has the BOOKE64 flag set.
1268 If it does make sure that the target CPU is not the BookE32. */
1269 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1270 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1271 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1272 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1273 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1274 == (ppc_cpu & PPC_OPCODE_POWER4)))
1275 && ((op->flags & PPC_OPCODE_POWER5) == 0
1276 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1277 == (ppc_cpu & PPC_OPCODE_POWER5)))
1278 && ((op->flags & PPC_OPCODE_POWER6) == 0
1279 || ((op->flags & PPC_OPCODE_POWER6)
1280 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1281 {
1282 const char *retval;
1283
1284 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1285 if (retval != NULL)
252b5132 1286 {
99a814a1 1287 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1288 if ((ppc_cpu & PPC_OPCODE_601) != 0
1289 && (op->flags & PPC_OPCODE_POWER) != 0)
1290 continue;
1291
99a814a1
AM		 1292 as_bad (_("Internal assembler error for instruction %s"),
1293 op->name);
b34976b6 1294 dup_insn = TRUE;
252b5132
RH		 1295 }
1296 }
1297 }
1298
3c9030c1
AM		 1299 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1300 for (op = powerpc_opcodes; op < op_end; op++)
1301 hash_insert (ppc_hash, op->name, (PTR) op);
1302
252b5132
RH		 1303 /* Insert the macros into a hash table. */
1304 ppc_macro_hash = hash_new ();
1305
1306 macro_end = powerpc_macros + powerpc_num_macros;
1307 for (macro = powerpc_macros; macro < macro_end; macro++)
1308 {
1309 if ((macro->flags & ppc_cpu) != 0)
1310 {
1311 const char *retval;
1312
1313 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1314 if (retval != (const char *) NULL)
1315 {
1316 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1317 dup_insn = TRUE;
252b5132
RH		 1318 }
1319 }
1320 }
1321
1322 if (dup_insn)
1323 abort ();
69c040df
AM		 1324}
1325
1326/* This function is called when the assembler starts up. It is called
1327 after the options have been parsed and the output file has been
1328 opened. */
1329
1330void
1331md_begin ()
1332{
1333 ppc_set_cpu ();
1334
1335 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1336
1337#ifdef OBJ_ELF
1338 /* Set the ELF flags if desired. */
1339 if (ppc_flags && !msolaris)
1340 bfd_set_private_flags (stdoutput, ppc_flags);
1341#endif
1342
1343 ppc_setup_opcodes ();
252b5132 1344
67c1ffbe 1345 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1346 by the user. */
252b5132
RH		 1347 if (!set_target_endian)
1348 {
1349 set_target_endian = 1;
1350 target_big_endian = PPC_BIG_ENDIAN;
1351 }
1352
1353#ifdef OBJ_XCOFF
1354 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1355
1356 /* Create dummy symbols to serve as initial csects. This forces the
1357 text csects to precede the data csects. These symbols will not
1358 be output. */
1359 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1360 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1361 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1362 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1363#endif
1364
1365#ifdef TE_PE
1366
1367 ppc_current_section = text_section;
81d4177b 1368 ppc_previous_section = 0;
252b5132
RH		 1369
1370#endif
1371}
1372
6a0c61b7
EZ		 1373void
1374ppc_cleanup ()
1375{
dc1d03fc 1376#ifdef OBJ_ELF
6a0c61b7
EZ		 1377 if (ppc_apuinfo_list == NULL)
1378 return;
1379
1380 /* Ok, so write the section info out. We have this layout:
1381
1382 byte data what
1383 ---- ---- ----
1384 0 8 length of "APUinfo\0"
1385 4 (n*4) number of APU's (4 bytes each)
1386 8 2 note type 2
1387 12 "APUinfo\0" name
1388 20 APU#1 first APU's info
1389 24 APU#2 second APU's info
1390 ... ...
1391 */
1392 {
1393 char *p;
1394 asection *seg = now_seg;
1395 subsegT subseg = now_subseg;
1396 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1397 unsigned int i;
6a0c61b7
EZ		 1398
1399 /* Create the .PPC.EMB.apuinfo section. */
1400 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1401 bfd_set_section_flags (stdoutput,
1402 apuinfo_secp,
e1a9cb8e 1403 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1404
1405 p = frag_more (4);
1406 md_number_to_chars (p, (valueT) 8, 4);
1407
1408 p = frag_more (4);
e98d298c 1409 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1410
1411 p = frag_more (4);
1412 md_number_to_chars (p, (valueT) 2, 4);
1413
1414 p = frag_more (8);
1415 strcpy (p, "APUinfo");
1416
1417 for (i = 0; i < ppc_apuinfo_num; i++)
1418 {
b34976b6
AM		 1419 p = frag_more (4);
1420 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1421 }
1422
1423 frag_align (2, 0, 0);
1424
1425 /* We probably can't restore the current segment, for there likely
1426 isn't one yet... */
1427 if (seg && subseg)
1428 subseg_set (seg, subseg);
1429 }
dc1d03fc 1430#endif
6a0c61b7
EZ		 1431}
1432
252b5132
RH		 1433/* Insert an operand value into an instruction. */
1434
1435static unsigned long
1436ppc_insert_operand (insn, operand, val, file, line)
1437 unsigned long insn;
1438 const struct powerpc_operand *operand;
1439 offsetT val;
1440 char *file;
1441 unsigned int line;
1442{
1443 if (operand->bits != 32)
1444 {
1445 long min, max;
1446 offsetT test;
1447
1448 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1449 {
d0e9a01c 1450 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1451 max = (1 << operand->bits) - 1;
1452 else
1453 max = (1 << (operand->bits - 1)) - 1;
1454 min = - (1 << (operand->bits - 1));
1455
2b3c4602 1456 if (!ppc_obj64)
252b5132
RH		 1457 {
1458 /* Some people write 32 bit hex constants with the sign
1459 extension done by hand. This shouldn't really be
1460 valid, but, to permit this code to assemble on a 64
1461 bit host, we sign extend the 32 bit value. */
1462 if (val > 0
92161534
ILT		 1463 && (val & (offsetT) 0x80000000) != 0
1464 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1465 {
1466 val -= 0x80000000;
1467 val -= 0x80000000;
1468 }
1469 }
1470 }
1471 else
1472 {
1473 max = (1 << operand->bits) - 1;
1474 min = 0;
1475 }
1476
1477 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1478 test = - val;
1479 else
1480 test = val;
1481
1482 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1483 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1484 }
1485
1486 if (operand->insert)
1487 {
1488 const char *errmsg;
1489
1490 errmsg = NULL;
2b3c4602 1491 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1492 if (errmsg != (const char *) NULL)
0baf16f2 1493 as_bad_where (file, line, errmsg);
252b5132
RH		 1494 }
1495 else
1496 insn |= (((long) val & ((1 << operand->bits) - 1))
1497 << operand->shift);
1498
1499 return insn;
1500}
1501
1502\f
1503#ifdef OBJ_ELF
1504/* Parse @got, etc. and return the desired relocation. */
1505static bfd_reloc_code_real_type
1506ppc_elf_suffix (str_p, exp_p)
1507 char **str_p;
1508 expressionS *exp_p;
1509{
1510 struct map_bfd {
1511 char *string;
b7d7dc63
AM		 1512 unsigned int length : 8;
1513 unsigned int valid32 : 1;
1514 unsigned int valid64 : 1;
1515 unsigned int reloc;
252b5132
RH		 1516 };
1517
1518 char ident[20];
1519 char *str = *str_p;
1520 char *str2;
1521 int ch;
1522 int len;
15c1449b 1523 const struct map_bfd *ptr;
252b5132 1524
b7d7dc63
AM		 1525#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1526#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1527#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1528
15c1449b 1529 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1530 MAP ("l", BFD_RELOC_LO16),
1531 MAP ("h", BFD_RELOC_HI16),
1532 MAP ("ha", BFD_RELOC_HI16_S),
1533 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1534 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1535 MAP ("got", BFD_RELOC_16_GOTOFF),
1536 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1537 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1538 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1539 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1540 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1541 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1542 MAP ("copy", BFD_RELOC_PPC_COPY),
1543 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1544 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1545 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1546 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1547 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1548 MAP ("tls", BFD_RELOC_PPC_TLS),
1549 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1550 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1551 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1552 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1553 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1554 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1555 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1556 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1557 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1558 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1559 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1560 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1561 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1562 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1563 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1564 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1565 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1566 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1567 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1568 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1569 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1570 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1571 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1572 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1573 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1574 MAP32 ("fixup", BFD_RELOC_CTOR),
1575 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1576 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1577 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1578 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1579 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1580 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1581 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1582 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1583 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1584 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1585 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1586 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1587 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1588 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1589 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1590 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1591 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1592 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1593 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1594 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1595 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1596 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1597 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1598 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1599 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1600 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1601 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1602 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1603 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1604 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1605 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1606 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1607 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1608 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1609 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1610 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1611 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1612 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1613 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1614 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1615 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1616 };
1617
1618 if (*str++ != '@')
1619 return BFD_RELOC_UNUSED;
1620
1621 for (ch = *str, str2 = ident;
1622 (str2 < ident + sizeof (ident) - 1
3882b010 1623 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1624 ch = *++str)
1625 {
3882b010 1626 *str2++ = TOLOWER (ch);
252b5132
RH		 1627 }
1628
1629 *str2 = '\0';
1630 len = str2 - ident;
1631
1632 ch = ident[0];
1633 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1634 if (ch == ptr->string[0]
1635 && len == ptr->length
b7d7dc63
AM		 1636 && memcmp (ident, ptr->string, ptr->length) == 0
1637 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1638 {
15c1449b
AM		 1639 int reloc = ptr->reloc;
1640
cdba85ec 1641 if (!ppc_obj64)
5f6db75a
AM		 1642 if (exp_p->X_add_number != 0
1643 && (reloc == (int) BFD_RELOC_16_GOTOFF
1644 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1645 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1646 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1647 as_warn (_("identifier+constant@got means identifier@got+constant"));
1648
1649 /* Now check for identifier@suffix+constant. */
1650 if (*str == '-' || *str == '+')
252b5132 1651 {
5f6db75a
AM		 1652 char *orig_line = input_line_pointer;
1653 expressionS new_exp;
1654
1655 input_line_pointer = str;
1656 expression (&new_exp);
1657 if (new_exp.X_op == O_constant)
252b5132 1658 {
5f6db75a
AM		 1659 exp_p->X_add_number += new_exp.X_add_number;
1660 str = input_line_pointer;
252b5132 1661 }
5f6db75a
AM		 1662
1663 if (&input_line_pointer != str_p)
1664 input_line_pointer = orig_line;
252b5132 1665 }
252b5132 1666 *str_p = str;
0baf16f2 1667
2b3c4602 1668 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1669 && exp_p->X_op == O_symbol
1670 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1671 {
9f2b53d7
AM		 1672 /* Change the symbol so that the dummy .TOC. symbol can be
1673 omitted from the object file. */
0baf16f2
AM		 1674 exp_p->X_add_symbol = &abs_symbol;
1675 }
1676
15c1449b 1677 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1678 }
1679
1680 return BFD_RELOC_UNUSED;
1681}
1682
99a814a1
AM		 1683/* Like normal .long/.short/.word, except support @got, etc.
1684 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1685static void
1686ppc_elf_cons (nbytes)
0baf16f2 1687 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1688{
1689 expressionS exp;
1690 bfd_reloc_code_real_type reloc;
1691
1692 if (is_it_end_of_statement ())
1693 {
1694 demand_empty_rest_of_line ();
1695 return;
1696 }
1697
1698 do
1699 {
1700 expression (&exp);
1701 if (exp.X_op == O_symbol
1702 && *input_line_pointer == '@'
99a814a1
AM		 1703 && (reloc = ppc_elf_suffix (&input_line_pointer,
1704 &exp)) != BFD_RELOC_UNUSED)
252b5132 1705 {
99a814a1
AM		 1706 reloc_howto_type *reloc_howto;
1707 int size;
1708
1709 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1710 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1711
1712 if (size > nbytes)
0baf16f2
AM		 1713 {
1714 as_bad (_("%s relocations do not fit in %d bytes\n"),
1715 reloc_howto->name, nbytes);
1716 }
252b5132
RH		 1717 else
1718 {
0baf16f2
AM		 1719 char *p;
1720 int offset;
252b5132 1721
0baf16f2
AM		 1722 p = frag_more (nbytes);
1723 offset = 0;
1724 if (target_big_endian)
1725 offset = nbytes - size;
99a814a1
AM		 1726 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1727 &exp, 0, reloc);
252b5132
RH		 1728 }
1729 }
1730 else
1731 emit_expr (&exp, (unsigned int) nbytes);
1732 }
1733 while (*input_line_pointer++ == ',');
1734
99a814a1
AM		 1735 /* Put terminator back into stream. */
1736 input_line_pointer--;
252b5132
RH		 1737 demand_empty_rest_of_line ();
1738}
1739
1740/* Solaris pseduo op to change to the .rodata section. */
1741static void
1742ppc_elf_rdata (xxx)
1743 int xxx;
1744{
1745 char *save_line = input_line_pointer;
1746 static char section[] = ".rodata\n";
1747
99a814a1 1748 /* Just pretend this is .section .rodata */
252b5132
RH		 1749 input_line_pointer = section;
1750 obj_elf_section (xxx);
1751
1752 input_line_pointer = save_line;
1753}
1754
99a814a1 1755/* Pseudo op to make file scope bss items. */
252b5132 1756static void
99a814a1 1757ppc_elf_lcomm (xxx)
92161534 1758 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1759{
1760 register char *name;
1761 register char c;
1762 register char *p;
1763 offsetT size;
1764 register symbolS *symbolP;
1765 offsetT align;
1766 segT old_sec;
1767 int old_subsec;
1768 char *pfrag;
1769 int align2;
1770
1771 name = input_line_pointer;
1772 c = get_symbol_end ();
1773
99a814a1 1774 /* just after name is now '\0'. */
252b5132
RH		 1775 p = input_line_pointer;
1776 *p = c;
1777 SKIP_WHITESPACE ();
1778 if (*input_line_pointer != ',')
1779 {
1780 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1781 ignore_rest_of_line ();
1782 return;
1783 }
1784
1785 input_line_pointer++; /* skip ',' */
1786 if ((size = get_absolute_expression ()) < 0)
1787 {
1788 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1789 ignore_rest_of_line ();
1790 return;
1791 }
1792
1793 /* The third argument to .lcomm is the alignment. */
1794 if (*input_line_pointer != ',')
1795 align = 8;
1796 else
1797 {
1798 ++input_line_pointer;
1799 align = get_absolute_expression ();
1800 if (align <= 0)
1801 {
1802 as_warn (_("ignoring bad alignment"));
1803 align = 8;
1804 }
1805 }
1806
1807 *p = 0;
1808 symbolP = symbol_find_or_make (name);
1809 *p = c;
1810
1811 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1812 {
1813 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1814 S_GET_NAME (symbolP));
1815 ignore_rest_of_line ();
1816 return;
1817 }
1818
1819 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1820 {
1821 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1822 S_GET_NAME (symbolP),
1823 (long) S_GET_VALUE (symbolP),
1824 (long) size);
1825
1826 ignore_rest_of_line ();
1827 return;
1828 }
1829
99a814a1 1830 /* Allocate_bss. */
252b5132
RH		 1831 old_sec = now_seg;
1832 old_subsec = now_subseg;
1833 if (align)
1834 {
99a814a1 1835 /* Convert to a power of 2 alignment. */
252b5132
RH		 1836 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1837 if (align != 1)
1838 {
1839 as_bad (_("Common alignment not a power of 2"));
1840 ignore_rest_of_line ();
1841 return;
1842 }
1843 }
1844 else
1845 align2 = 0;
1846
1847 record_alignment (bss_section, align2);
1848 subseg_set (bss_section, 0);
1849 if (align2)
1850 frag_align (align2, 0, 0);
1851 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1852 symbol_get_frag (symbolP)->fr_symbol = 0;
1853 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1854 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1855 (char *) 0);
1856 *pfrag = 0;
1857 S_SET_SIZE (symbolP, size);
1858 S_SET_SEGMENT (symbolP, bss_section);
1859 subseg_set (old_sec, old_subsec);
1860 demand_empty_rest_of_line ();
1861}
1862
1863/* Validate any relocations emitted for -mrelocatable, possibly adding
1864 fixups for word relocations in writable segments, so we can adjust
1865 them at runtime. */
1866static void
1867ppc_elf_validate_fix (fixp, seg)
1868 fixS *fixp;
1869 segT seg;
1870{
1871 if (fixp->fx_done || fixp->fx_pcrel)
1872 return;
1873
1874 switch (shlib)
1875 {
1876 case SHLIB_NONE:
1877 case SHLIB_PIC:
1878 return;
1879
5d6f4f16 1880 case SHLIB_MRELOCATABLE:
252b5132
RH		 1881 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1882 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1883 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1884 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1885 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1886 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1887 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1888 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1889 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1890 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1891 && strcmp (segment_name (seg), ".got2") != 0
1892 && strcmp (segment_name (seg), ".dtors") != 0
1893 && strcmp (segment_name (seg), ".ctors") != 0
1894 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1895 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1896 && strcmp (segment_name (seg), ".eh_frame") != 0
1897 && strcmp (segment_name (seg), ".ex_shared") != 0)
1898 {
1899 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1900 || fixp->fx_r_type != BFD_RELOC_CTOR)
1901 {
1902 as_bad_where (fixp->fx_file, fixp->fx_line,
1903 _("Relocation cannot be done when using -mrelocatable"));
1904 }
1905 }
1906 return;
1907 }
1908}
0baf16f2 1909
7e8d4ab4
AM		 1910/* Prevent elf_frob_file_before_adjust removing a weak undefined
1911 function descriptor sym if the corresponding code sym is used. */
1912
1913void
1914ppc_frob_file_before_adjust ()
0baf16f2 1915{
7e8d4ab4 1916 symbolS *symp;
9232bbb0 1917 asection *toc;
0baf16f2 1918
7e8d4ab4
AM		 1919 if (!ppc_obj64)
1920 return;
1921
1922 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1923 {
7e8d4ab4
AM		 1924 const char *name;
1925 char *dotname;
1926 symbolS *dotsym;
1927 size_t len;
1928
1929 name = S_GET_NAME (symp);
1930 if (name[0] == '.')
1931 continue;
1932
1933 if (! S_IS_WEAK (symp)
1934 || S_IS_DEFINED (symp))
1935 continue;
1936
1937 len = strlen (name) + 1;
1938 dotname = xmalloc (len + 1);
1939 dotname[0] = '.';
1940 memcpy (dotname + 1, name, len);
461b725f 1941 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 1942 free (dotname);
1943 if (dotsym != NULL && (symbol_used_p (dotsym)
1944 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1945 symbol_mark_used (symp);
1946
0baf16f2
AM		 1947 }
1948
9232bbb0
AM		 1949 toc = bfd_get_section_by_name (stdoutput, ".toc");
1950 if (toc != NULL
1951 && bfd_section_size (stdoutput, toc) > 0x10000)
1952 as_warn (_("TOC section size exceeds 64k"));
1953
7e8d4ab4
AM		 1954 /* Don't emit .TOC. symbol. */
1955 symp = symbol_find (".TOC.");
1956 if (symp != NULL)
1957 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1958}
252b5132
RH		 1959#endif /* OBJ_ELF */
1960\f
1961#ifdef TE_PE
1962
1963/*
99a814a1 1964 * Summary of parse_toc_entry.
252b5132
RH		 1965 *
1966 * in: Input_line_pointer points to the '[' in one of:
1967 *
1968 * [toc] [tocv] [toc32] [toc64]
1969 *
1970 * Anything else is an error of one kind or another.
1971 *
81d4177b 1972 * out:
252b5132
RH		 1973 * return value: success or failure
1974 * toc_kind: kind of toc reference
1975 * input_line_pointer:
1976 * success: first char after the ']'
1977 * failure: unchanged
1978 *
1979 * settings:
1980 *
1981 * [toc] - rv == success, toc_kind = default_toc
1982 * [tocv] - rv == success, toc_kind = data_in_toc
1983 * [toc32] - rv == success, toc_kind = must_be_32
1984 * [toc64] - rv == success, toc_kind = must_be_64
1985 *
1986 */
1987
81d4177b
KH		 1988enum toc_size_qualifier
1989{
252b5132
RH		 1990 default_toc, /* The toc cell constructed should be the system default size */
1991 data_in_toc, /* This is a direct reference to a toc cell */
1992 must_be_32, /* The toc cell constructed must be 32 bits wide */
1993 must_be_64 /* The toc cell constructed must be 64 bits wide */
1994};
1995
1996static int
99a814a1 1997parse_toc_entry (toc_kind)
252b5132
RH		 1998 enum toc_size_qualifier *toc_kind;
1999{
2000 char *start;
2001 char *toc_spec;
2002 char c;
2003 enum toc_size_qualifier t;
2004
99a814a1 2005 /* Save the input_line_pointer. */
252b5132
RH		 2006 start = input_line_pointer;
2007
99a814a1 2008 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2009 ++input_line_pointer;
2010 SKIP_WHITESPACE ();
81d4177b 2011
99a814a1 2012 /* Find the spelling of the operand. */
252b5132
RH		 2013 toc_spec = input_line_pointer;
2014 c = get_symbol_end ();
2015
99a814a1 2016 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2017 {
2018 t = default_toc;
2019 }
99a814a1 2020 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2021 {
2022 t = data_in_toc;
2023 }
99a814a1 2024 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2025 {
2026 t = must_be_32;
2027 }
99a814a1 2028 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2029 {
2030 t = must_be_64;
2031 }
2032 else
2033 {
2034 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2035 *input_line_pointer = c;
2036 input_line_pointer = start;
252b5132
RH		 2037 return 0;
2038 }
2039
99a814a1
AM		 2040 /* Now find the ']'. */
2041 *input_line_pointer = c;
252b5132 2042
81d4177b
KH		 2043 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2044 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2045
2046 if (c != ']')
2047 {
2048 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2049 input_line_pointer = start;
252b5132
RH		 2050 return 0;
2051 }
2052
99a814a1 2053 *toc_kind = t;
252b5132
RH		 2054 return 1;
2055}
2056#endif
2057\f
2058
dc1d03fc 2059#ifdef OBJ_ELF
6a0c61b7
EZ		 2060#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2061static void
dc1d03fc 2062ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2063 unsigned int apu, version;
2064{
2065 unsigned int i;
2066
2067 /* Check we don't already exist. */
2068 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2069 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2070 return;
b34976b6 2071
6a0c61b7
EZ		 2072 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2073 {
2074 if (ppc_apuinfo_num_alloc == 0)
2075 {
2076 ppc_apuinfo_num_alloc = 4;
2077 ppc_apuinfo_list = (unsigned long *)
2078 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2079 }
2080 else
2081 {
2082 ppc_apuinfo_num_alloc += 4;
2083 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2084 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2085 }
2086 }
dc1d03fc 2087 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2088}
2089#undef APUID
dc1d03fc 2090#endif
6a0c61b7
EZ		 2091\f
2092
252b5132
RH		 2093/* We need to keep a list of fixups. We can't simply generate them as
2094 we go, because that would require us to first create the frag, and
2095 that would screw up references to ``.''. */
2096
2097struct ppc_fixup
2098{
2099 expressionS exp;
2100 int opindex;
2101 bfd_reloc_code_real_type reloc;
2102};
2103
2104#define MAX_INSN_FIXUPS (5)
2105
2106/* This routine is called for each instruction to be assembled. */
2107
2108void
2109md_assemble (str)
2110 char *str;
2111{
2112 char *s;
2113 const struct powerpc_opcode *opcode;
2114 unsigned long insn;
2115 const unsigned char *opindex_ptr;
2116 int skip_optional;
2117 int need_paren;
2118 int next_opindex;
2119 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2120 int fc;
2121 char *f;
09b935ac 2122 int addr_mod;
252b5132
RH		 2123 int i;
2124#ifdef OBJ_ELF
2125 bfd_reloc_code_real_type reloc;
2126#endif
2127
2128 /* Get the opcode. */
3882b010 2129 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2130 ;
2131 if (*s != '\0')
2132 *s++ = '\0';
2133
2134 /* Look up the opcode in the hash table. */
2135 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2136 if (opcode == (const struct powerpc_opcode *) NULL)
2137 {
2138 const struct powerpc_macro *macro;
2139
2140 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2141 if (macro == (const struct powerpc_macro *) NULL)
2142 as_bad (_("Unrecognized opcode: `%s'"), str);
2143 else
2144 ppc_macro (s, macro);
2145
2146 return;
2147 }
2148
2149 insn = opcode->opcode;
2150
2151 str = s;
3882b010 2152 while (ISSPACE (*str))
252b5132
RH		 2153 ++str;
2154
2155 /* PowerPC operands are just expressions. The only real issue is
2156 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2157 an optional operand separate the operands only with commas (in some
2158 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2159 have optional operands). Most instructions with optional operands
2160 have only one. Those that have more than one optional operand can
2161 take either all their operands or none. So, before we start seriously
2162 parsing the operands, we check to see if we have optional operands,
2163 and if we do, we count the number of commas to see which operands
2164 have been omitted. */
252b5132
RH		 2165 skip_optional = 0;
2166 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2167 {
2168 const struct powerpc_operand *operand;
2169
2170 operand = &powerpc_operands[*opindex_ptr];
2171 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2172 {
2173 unsigned int opcount;
7fe9cf6b
NC		 2174 unsigned int num_operands_expected;
2175 unsigned int i;
252b5132
RH		 2176
2177 /* There is an optional operand. Count the number of
2178 commas in the input line. */
2179 if (*str == '\0')
2180 opcount = 0;
2181 else
2182 {
2183 opcount = 1;
2184 s = str;
2185 while ((s = strchr (s, ',')) != (char *) NULL)
2186 {
2187 ++opcount;
2188 ++s;
2189 }
2190 }
2191
7fe9cf6b
NC		 2192 /* Compute the number of expected operands.
2193 Do not count fake operands. */
2194 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2195 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2196 ++ num_operands_expected;
2197
252b5132
RH		 2198 /* If there are fewer operands in the line then are called
2199 for by the instruction, we want to skip the optional
1f6c9eb0 2200 operands. */
7fe9cf6b 2201 if (opcount < num_operands_expected)
252b5132
RH		 2202 skip_optional = 1;
2203
2204 break;
2205 }
2206 }
2207
2208 /* Gather the operands. */
2209 need_paren = 0;
2210 next_opindex = 0;
2211 fc = 0;
2212 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2213 {
2214 const struct powerpc_operand *operand;
2215 const char *errmsg;
2216 char *hold;
2217 expressionS ex;
2218 char endc;
2219
2220 if (next_opindex == 0)
2221 operand = &powerpc_operands[*opindex_ptr];
2222 else
2223 {
2224 operand = &powerpc_operands[next_opindex];
2225 next_opindex = 0;
2226 }
252b5132
RH		 2227 errmsg = NULL;
2228
2229 /* If this is a fake operand, then we do not expect anything
2230 from the input. */
2231 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2232 {
2b3c4602 2233 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2234 if (errmsg != (const char *) NULL)
2235 as_bad (errmsg);
2236 continue;
2237 }
2238
2239 /* If this is an optional operand, and we are skipping it, just
2240 insert a zero. */
2241 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2242 && skip_optional)
2243 {
2244 if (operand->insert)
2245 {
2b3c4602 2246 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2247 if (errmsg != (const char *) NULL)
2248 as_bad (errmsg);
2249 }
2250 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2251 next_opindex = *opindex_ptr + 1;
2252 continue;
2253 }
2254
2255 /* Gather the operand. */
2256 hold = input_line_pointer;
2257 input_line_pointer = str;
2258
2259#ifdef TE_PE
81d4177b 2260 if (*input_line_pointer == '[')
252b5132
RH		 2261 {
2262 /* We are expecting something like the second argument here:
99a814a1
AM		 2263 *
2264 * lwz r4,[toc].GS.0.static_int(rtoc)
2265 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2266 * The argument following the `]' must be a symbol name, and the
2267 * register must be the toc register: 'rtoc' or '2'
2268 *
2269 * The effect is to 0 as the displacement field
2270 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2271 * the appropriate variation) reloc against it based on the symbol.
2272 * The linker will build the toc, and insert the resolved toc offset.
2273 *
2274 * Note:
2275 * o The size of the toc entry is currently assumed to be
2276 * 32 bits. This should not be assumed to be a hard coded
2277 * number.
2278 * o In an effort to cope with a change from 32 to 64 bits,
2279 * there are also toc entries that are specified to be
2280 * either 32 or 64 bits:
2281 * lwz r4,[toc32].GS.0.static_int(rtoc)
2282 * lwz r4,[toc64].GS.0.static_int(rtoc)
2283 * These demand toc entries of the specified size, and the
2284 * instruction probably requires it.
2285 */
252b5132
RH		 2286
2287 int valid_toc;
2288 enum toc_size_qualifier toc_kind;
2289 bfd_reloc_code_real_type toc_reloc;
2290
99a814a1
AM		 2291 /* Go parse off the [tocXX] part. */
2292 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2293
81d4177b 2294 if (!valid_toc)
252b5132 2295 {
99a814a1
AM		 2296 /* Note: message has already been issued.
2297 FIXME: what sort of recovery should we do?
2298 demand_rest_of_line (); return; ? */
252b5132
RH		 2299 }
2300
99a814a1
AM		 2301 /* Now get the symbol following the ']'. */
2302 expression (&ex);
252b5132
RH		 2303
2304 switch (toc_kind)
2305 {
2306 case default_toc:
99a814a1
AM		 2307 /* In this case, we may not have seen the symbol yet,
2308 since it is allowed to appear on a .extern or .globl
2309 or just be a label in the .data section. */
252b5132
RH		 2310 toc_reloc = BFD_RELOC_PPC_TOC16;
2311 break;
2312 case data_in_toc:
99a814a1
AM		 2313 /* 1. The symbol must be defined and either in the toc
2314 section, or a global.
2315 2. The reloc generated must have the TOCDEFN flag set
2316 in upper bit mess of the reloc type.
2317 FIXME: It's a little confusing what the tocv
2318 qualifier can be used for. At the very least, I've
2319 seen three uses, only one of which I'm sure I can
2320 explain. */
81d4177b
KH		 2321 if (ex.X_op == O_symbol)
2322 {
252b5132 2323 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2324 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2325 != tocdata_section)
252b5132 2326 {
99a814a1 2327 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2328 }
2329 }
2330
2331 toc_reloc = BFD_RELOC_PPC_TOC16;
2332 break;
2333 case must_be_32:
99a814a1
AM		 2334 /* FIXME: these next two specifically specify 32/64 bit
2335 toc entries. We don't support them today. Is this
2336 the right way to say that? */
252b5132
RH		 2337 toc_reloc = BFD_RELOC_UNUSED;
2338 as_bad (_("Unimplemented toc32 expression modifier"));
2339 break;
2340 case must_be_64:
99a814a1 2341 /* FIXME: see above. */
252b5132
RH		 2342 toc_reloc = BFD_RELOC_UNUSED;
2343 as_bad (_("Unimplemented toc64 expression modifier"));
2344 break;
2345 default:
bc805888 2346 fprintf (stderr,
99a814a1
AM		 2347 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2348 toc_kind);
bc805888 2349 abort ();
252b5132
RH		 2350 break;
2351 }
2352
2353 /* We need to generate a fixup for this expression. */
2354 if (fc >= MAX_INSN_FIXUPS)
2355 as_fatal (_("too many fixups"));
2356
2357 fixups[fc].reloc = toc_reloc;
2358 fixups[fc].exp = ex;
2359 fixups[fc].opindex = *opindex_ptr;
2360 ++fc;
2361
99a814a1
AM		 2362 /* Ok. We've set up the fixup for the instruction. Now make it
2363 look like the constant 0 was found here. */
252b5132
RH		 2364 ex.X_unsigned = 1;
2365 ex.X_op = O_constant;
2366 ex.X_add_number = 0;
2367 ex.X_add_symbol = NULL;
2368 ex.X_op_symbol = NULL;
2369 }
2370
2371 else
2372#endif /* TE_PE */
2373 {
2374 if (! register_name (&ex))
2375 {
2376 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2377 cr_operand = TRUE;
252b5132 2378 expression (&ex);
b34976b6 2379 cr_operand = FALSE;
252b5132
RH		 2380 }
2381 }
2382
2383 str = input_line_pointer;
2384 input_line_pointer = hold;
2385
2386 if (ex.X_op == O_illegal)
2387 as_bad (_("illegal operand"));
2388 else if (ex.X_op == O_absent)
2389 as_bad (_("missing operand"));
2390 else if (ex.X_op == O_register)
2391 {
2392 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2393 (char *) NULL, 0);
2394 }
2395 else if (ex.X_op == O_constant)
2396 {
2397#ifdef OBJ_ELF
81d4177b 2398 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2399 char *orig_str = str;
2400
2401 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2402 switch (reloc)
2403 {
2404 default:
2405 str = orig_str;
2406 break;
2407
2408 case BFD_RELOC_LO16:
2409 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2410 something which cleared it, we always produce a
2411 signed value. */
2412 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2413 ex.X_add_number &= 0xffff;
2414 else
0baf16f2 2415 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2416 break;
2417
2418 case BFD_RELOC_HI16:
0baf16f2
AM		 2419 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2420 ex.X_add_number = PPC_HI (ex.X_add_number);
2421 else
2422 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2423 break;
2424
2425 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2426 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2427 ex.X_add_number = PPC_HA (ex.X_add_number);
2428 else
2429 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2430 break;
2431
0baf16f2
AM		 2432 case BFD_RELOC_PPC64_HIGHER:
2433 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2434 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2435 else
2436 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2437 break;
2438
2439 case BFD_RELOC_PPC64_HIGHER_S:
2440 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2441 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2442 else
2443 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2444 break;
0baf16f2
AM		 2445
2446 case BFD_RELOC_PPC64_HIGHEST:
2447 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2448 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2449 else
2450 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2451 break;
2452
2453 case BFD_RELOC_PPC64_HIGHEST_S:
2454 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2455 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2456 else
2457 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2458 break;
252b5132 2459 }
0baf16f2 2460#endif /* OBJ_ELF */
252b5132
RH		 2461 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2462 (char *) NULL, 0);
2463 }
2464#ifdef OBJ_ELF
2465 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2466 {
cdba85ec
AM		 2467 /* Some TLS tweaks. */
2468 switch (reloc)
2469 {
2470 default:
2471 break;
2472 case BFD_RELOC_PPC_TLS:
2473 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2474 (char *) NULL, 0);
2475 break;
2476 /* We'll only use the 32 (or 64) bit form of these relocations
2477 in constants. Instructions get the 16 bit form. */
2478 case BFD_RELOC_PPC_DTPREL:
2479 reloc = BFD_RELOC_PPC_DTPREL16;
2480 break;
2481 case BFD_RELOC_PPC_TPREL:
2482 reloc = BFD_RELOC_PPC_TPREL16;
2483 break;
2484 }
2485
99a814a1
AM		 2486 /* For the absolute forms of branches, convert the PC
2487 relative form back into the absolute. */
252b5132
RH		 2488 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2489 {
2490 switch (reloc)
2491 {
2492 case BFD_RELOC_PPC_B26:
2493 reloc = BFD_RELOC_PPC_BA26;
2494 break;
2495 case BFD_RELOC_PPC_B16:
2496 reloc = BFD_RELOC_PPC_BA16;
2497 break;
2498 case BFD_RELOC_PPC_B16_BRTAKEN:
2499 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2500 break;
2501 case BFD_RELOC_PPC_B16_BRNTAKEN:
2502 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2503 break;
2504 default:
2505 break;
2506 }
2507 }
2508
2b3c4602 2509 if (ppc_obj64
adadcc0c 2510 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2511 {
2512 switch (reloc)
2513 {
2514 case BFD_RELOC_16:
2515 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2516 break;
2517 case BFD_RELOC_LO16:
2518 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2519 break;
2520 case BFD_RELOC_16_GOTOFF:
2521 reloc = BFD_RELOC_PPC64_GOT16_DS;
2522 break;
2523 case BFD_RELOC_LO16_GOTOFF:
2524 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2525 break;
2526 case BFD_RELOC_LO16_PLTOFF:
2527 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2528 break;
1cfc59d5 2529 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2530 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2531 break;
2532 case BFD_RELOC_LO16_BASEREL:
2533 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2534 break;
2535 case BFD_RELOC_PPC_TOC16:
2536 reloc = BFD_RELOC_PPC64_TOC16_DS;
2537 break;
2538 case BFD_RELOC_PPC64_TOC16_LO:
2539 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2540 break;
2541 case BFD_RELOC_PPC64_PLTGOT16:
2542 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2543 break;
2544 case BFD_RELOC_PPC64_PLTGOT16_LO:
2545 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2546 break;
cdba85ec
AM		 2547 case BFD_RELOC_PPC_DTPREL16:
2548 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2549 break;
2550 case BFD_RELOC_PPC_DTPREL16_LO:
2551 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2552 break;
2553 case BFD_RELOC_PPC_TPREL16:
2554 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2555 break;
2556 case BFD_RELOC_PPC_TPREL16_LO:
2557 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2558 break;
2559 case BFD_RELOC_PPC_GOT_DTPREL16:
2560 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2561 case BFD_RELOC_PPC_GOT_TPREL16:
2562 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2563 break;
0baf16f2
AM		 2564 default:
2565 as_bad (_("unsupported relocation for DS offset field"));
2566 break;
2567 }
2568 }
2569
252b5132
RH		 2570 /* We need to generate a fixup for this expression. */
2571 if (fc >= MAX_INSN_FIXUPS)
2572 as_fatal (_("too many fixups"));
2573 fixups[fc].exp = ex;
2574 fixups[fc].opindex = 0;
2575 fixups[fc].reloc = reloc;
2576 ++fc;
2577 }
2578#endif /* OBJ_ELF */
2579
2580 else
2581 {
2582 /* We need to generate a fixup for this expression. */
2583 if (fc >= MAX_INSN_FIXUPS)
2584 as_fatal (_("too many fixups"));
2585 fixups[fc].exp = ex;
2586 fixups[fc].opindex = *opindex_ptr;
2587 fixups[fc].reloc = BFD_RELOC_UNUSED;
2588 ++fc;
2589 }
2590
2591 if (need_paren)
2592 {
2593 endc = ')';
2594 need_paren = 0;
2595 }
2596 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2597 {
2598 endc = '(';
2599 need_paren = 1;
2600 }
2601 else
2602 endc = ',';
2603
2604 /* The call to expression should have advanced str past any
2605 whitespace. */
2606 if (*str != endc
2607 && (endc != ',' || *str != '\0'))
2608 {
2609 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2610 break;
2611 }
2612
2613 if (*str != '\0')
2614 ++str;
2615 }
2616
3882b010 2617 while (ISSPACE (*str))
252b5132
RH		 2618 ++str;
2619
2620 if (*str != '\0')
2621 as_bad (_("junk at end of line: `%s'"), str);
2622
dc1d03fc 2623#ifdef OBJ_ELF
6a0c61b7
EZ		 2624 /* Do we need/want a APUinfo section? */
2625 if (ppc_cpu & (PPC_OPCODE_SPE
2626 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2627 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2628 | PPC_OPCODE_RFMCI))
2629 {
2630 /* These are all version "1". */
2631 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2632 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2633 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2634 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2635 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2636 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2637 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2638 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2639 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2640 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2641 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2642 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2643 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2644 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2645 }
dc1d03fc 2646#endif
6a0c61b7 2647
252b5132
RH		 2648 /* Write out the instruction. */
2649 f = frag_more (4);
09b935ac
AM		 2650 addr_mod = frag_now_fix () & 3;
2651 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2652 as_bad (_("instruction address is not a multiple of 4"));
2653 frag_now->insn_addr = addr_mod;
2654 frag_now->has_code = 1;
252b5132
RH		 2655 md_number_to_chars (f, insn, 4);
2656
5d6f4f16
GK		 2657#ifdef OBJ_ELF
2658 dwarf2_emit_insn (4);
2659#endif
2660
252b5132
RH		 2661 /* Create any fixups. At this point we do not use a
2662 bfd_reloc_code_real_type, but instead just use the
2663 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2664 handle fixups for any operand type, although that is admittedly
2665 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2666 md_apply_fix. */
252b5132
RH		 2667 for (i = 0; i < fc; i++)
2668 {
2669 const struct powerpc_operand *operand;
2670
2671 operand = &powerpc_operands[fixups[i].opindex];
2672 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2673 {
99a814a1 2674 reloc_howto_type *reloc_howto;
252b5132
RH		 2675 int size;
2676 int offset;
2677 fixS *fixP;
2678
99a814a1 2679 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2680 if (!reloc_howto)
2681 abort ();
2682
2683 size = bfd_get_reloc_size (reloc_howto);
2684 offset = target_big_endian ? (4 - size) : 0;
2685
2686 if (size < 1 || size > 4)
bc805888 2687 abort ();
252b5132 2688
99a814a1
AM		 2689 fixP = fix_new_exp (frag_now,
2690 f - frag_now->fr_literal + offset,
2691 size,
2692 &fixups[i].exp,
2693 reloc_howto->pc_relative,
252b5132
RH		 2694 fixups[i].reloc);
2695
2696 /* Turn off complaints that the addend is too large for things like
2697 foo+100000@ha. */
2698 switch (fixups[i].reloc)
2699 {
2700 case BFD_RELOC_16_GOTOFF:
2701 case BFD_RELOC_PPC_TOC16:
2702 case BFD_RELOC_LO16:
2703 case BFD_RELOC_HI16:
2704 case BFD_RELOC_HI16_S:
0baf16f2 2705#ifdef OBJ_ELF
0baf16f2
AM		 2706 case BFD_RELOC_PPC64_HIGHER:
2707 case BFD_RELOC_PPC64_HIGHER_S:
2708 case BFD_RELOC_PPC64_HIGHEST:
2709 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2710#endif
252b5132
RH		 2711 fixP->fx_no_overflow = 1;
2712 break;
2713 default:
2714 break;
2715 }
2716 }
2717 else
99a814a1
AM		 2718 fix_new_exp (frag_now,
2719 f - frag_now->fr_literal,
2720 4,
252b5132
RH		 2721 &fixups[i].exp,
2722 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2723 ((bfd_reloc_code_real_type)
99a814a1 2724 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2725 }
2726}
2727
2728/* Handle a macro. Gather all the operands, transform them as
2729 described by the macro, and call md_assemble recursively. All the
2730 operands are separated by commas; we don't accept parentheses
2731 around operands here. */
2732
2733static void
2734ppc_macro (str, macro)
2735 char *str;
2736 const struct powerpc_macro *macro;
2737{
2738 char *operands[10];
2739 unsigned int count;
2740 char *s;
2741 unsigned int len;
2742 const char *format;
2743 int arg;
2744 char *send;
2745 char *complete;
2746
2747 /* Gather the users operands into the operands array. */
2748 count = 0;
2749 s = str;
2750 while (1)
2751 {
2752 if (count >= sizeof operands / sizeof operands[0])
2753 break;
2754 operands[count++] = s;
2755 s = strchr (s, ',');
2756 if (s == (char *) NULL)
2757 break;
2758 *s++ = '\0';
81d4177b 2759 }
252b5132
RH		 2760
2761 if (count != macro->operands)
2762 {
2763 as_bad (_("wrong number of operands"));
2764 return;
2765 }
2766
2767 /* Work out how large the string must be (the size is unbounded
2768 because it includes user input). */
2769 len = 0;
2770 format = macro->format;
2771 while (*format != '\0')
2772 {
2773 if (*format != '%')
2774 {
2775 ++len;
2776 ++format;
2777 }
2778 else
2779 {
2780 arg = strtol (format + 1, &send, 10);
2781 know (send != format && arg >= 0 && arg < count);
2782 len += strlen (operands[arg]);
2783 format = send;
2784 }
2785 }
2786
2787 /* Put the string together. */
2788 complete = s = (char *) alloca (len + 1);
2789 format = macro->format;
2790 while (*format != '\0')
2791 {
2792 if (*format != '%')
2793 *s++ = *format++;
2794 else
2795 {
2796 arg = strtol (format + 1, &send, 10);
2797 strcpy (s, operands[arg]);
2798 s += strlen (s);
2799 format = send;
2800 }
2801 }
2802 *s = '\0';
2803
2804 /* Assemble the constructed instruction. */
2805 md_assemble (complete);
81d4177b 2806}
252b5132
RH		 2807\f
2808#ifdef OBJ_ELF
99a814a1 2809/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2810
2811int
2812ppc_section_letter (letter, ptr_msg)
2813 int letter;
2814 char **ptr_msg;
2815{
2816 if (letter == 'e')
2817 return SHF_EXCLUDE;
2818
13ae64f3 2819 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2820 return -1;
252b5132
RH		 2821}
2822
2823int
9de8d8f1
RH		 2824ppc_section_word (str, len)
2825 char *str;
2826 size_t len;
252b5132 2827{
9de8d8f1
RH		 2828 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2829 return SHF_EXCLUDE;
252b5132 2830
9de8d8f1 2831 return -1;
252b5132
RH		 2832}
2833
2834int
9de8d8f1
RH		 2835ppc_section_type (str, len)
2836 char *str;
2837 size_t len;
252b5132 2838{
9de8d8f1
RH		 2839 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2840 return SHT_ORDERED;
252b5132 2841
9de8d8f1 2842 return -1;
252b5132
RH		 2843}
2844
2845int
2846ppc_section_flags (flags, attr, type)
2847 int flags;
2848 int attr;
2849 int type;
2850{
2851 if (type == SHT_ORDERED)
2852 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2853
2854 if (attr & SHF_EXCLUDE)
2855 flags |= SEC_EXCLUDE;
2856
2857 return flags;
2858}
2859#endif /* OBJ_ELF */
2860
2861\f
2862/* Pseudo-op handling. */
2863
2864/* The .byte pseudo-op. This is similar to the normal .byte
2865 pseudo-op, but it can also take a single ASCII string. */
2866
2867static void
2868ppc_byte (ignore)
92161534 2869 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2870{
2871 if (*input_line_pointer != '\"')
2872 {
2873 cons (1);
2874 return;
2875 }
2876
2877 /* Gather characters. A real double quote is doubled. Unusual
2878 characters are not permitted. */
2879 ++input_line_pointer;
2880 while (1)
2881 {
2882 char c;
2883
2884 c = *input_line_pointer++;
2885
2886 if (c == '\"')
2887 {
2888 if (*input_line_pointer != '\"')
2889 break;
2890 ++input_line_pointer;
2891 }
2892
2893 FRAG_APPEND_1_CHAR (c);
2894 }
2895
2896 demand_empty_rest_of_line ();
2897}
2898\f
2899#ifdef OBJ_XCOFF
2900
2901/* XCOFF specific pseudo-op handling. */
2902
2903/* This is set if we are creating a .stabx symbol, since we don't want
2904 to handle symbol suffixes for such symbols. */
b34976b6 2905static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2906
2907/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2908 symbols in the .bss segment as though they were local common
67c1ffbe 2909 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2910 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2911
2912static void
2913ppc_comm (lcomm)
2914 int lcomm;
2915{
2916 asection *current_seg = now_seg;
2917 subsegT current_subseg = now_subseg;
2918 char *name;
2919 char endc;
2920 char *end_name;
2921 offsetT size;
2922 offsetT align;
2923 symbolS *lcomm_sym = NULL;
2924 symbolS *sym;
2925 char *pfrag;
2926
2927 name = input_line_pointer;
2928 endc = get_symbol_end ();
2929 end_name = input_line_pointer;
2930 *end_name = endc;
2931
2932 if (*input_line_pointer != ',')
2933 {
2934 as_bad (_("missing size"));
2935 ignore_rest_of_line ();
2936 return;
2937 }
2938 ++input_line_pointer;
2939
2940 size = get_absolute_expression ();
2941 if (size < 0)
2942 {
2943 as_bad (_("negative size"));
2944 ignore_rest_of_line ();
2945 return;
2946 }
2947
2948 if (! lcomm)
2949 {
2950 /* The third argument to .comm is the alignment. */
2951 if (*input_line_pointer != ',')
1ad63b2f 2952 align = 2;
252b5132
RH		 2953 else
2954 {
2955 ++input_line_pointer;
2956 align = get_absolute_expression ();
2957 if (align <= 0)
2958 {
2959 as_warn (_("ignoring bad alignment"));
1ad63b2f 2960 align = 2;
252b5132
RH		 2961 }
2962 }
2963 }
2964 else
2965 {
2966 char *lcomm_name;
2967 char lcomm_endc;
2968
1ad63b2f 2969 if (size <= 4)
252b5132
RH		 2970 align = 2;
2971 else
2972 align = 3;
2973
2974 /* The third argument to .lcomm appears to be the real local
2975 common symbol to create. References to the symbol named in
2976 the first argument are turned into references to the third
2977 argument. */
2978 if (*input_line_pointer != ',')
2979 {
2980 as_bad (_("missing real symbol name"));
2981 ignore_rest_of_line ();
2982 return;
2983 }
2984 ++input_line_pointer;
2985
2986 lcomm_name = input_line_pointer;
2987 lcomm_endc = get_symbol_end ();
81d4177b 2988
252b5132
RH		 2989 lcomm_sym = symbol_find_or_make (lcomm_name);
2990
2991 *input_line_pointer = lcomm_endc;
2992 }
2993
2994 *end_name = '\0';
2995 sym = symbol_find_or_make (name);
2996 *end_name = endc;
2997
2998 if (S_IS_DEFINED (sym)
2999 || S_GET_VALUE (sym) != 0)
3000 {
3001 as_bad (_("attempt to redefine symbol"));
3002 ignore_rest_of_line ();
3003 return;
3004 }
81d4177b 3005
252b5132 3006 record_alignment (bss_section, align);
81d4177b 3007
252b5132
RH		 3008 if (! lcomm
3009 || ! S_IS_DEFINED (lcomm_sym))
3010 {
3011 symbolS *def_sym;
3012 offsetT def_size;
3013
3014 if (! lcomm)
3015 {
3016 def_sym = sym;
3017 def_size = size;
3018 S_SET_EXTERNAL (sym);
3019 }
3020 else
3021 {
809ffe0d 3022 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3023 def_sym = lcomm_sym;
3024 def_size = 0;
3025 }
3026
3027 subseg_set (bss_section, 1);
3028 frag_align (align, 0, 0);
81d4177b 3029
809ffe0d 3030 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3031 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3032 def_size, (char *) NULL);
3033 *pfrag = 0;
3034 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3035 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3036 }
3037 else if (lcomm)
3038 {
3039 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3040 symbol_get_frag (lcomm_sym)->fr_offset =
3041 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3042 &~ ((1 << align) - 1));
809ffe0d
ILT		 3043 if (align > symbol_get_tc (lcomm_sym)->align)
3044 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3045 }
3046
3047 if (lcomm)
3048 {
3049 /* Make sym an offset from lcomm_sym. */
3050 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3051 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3052 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3053 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3054 }
3055
3056 subseg_set (current_seg, current_subseg);
3057
3058 demand_empty_rest_of_line ();
3059}
3060
3061/* The .csect pseudo-op. This switches us into a different
3062 subsegment. The first argument is a symbol whose value is the
3063 start of the .csect. In COFF, csect symbols get special aux
3064 entries defined by the x_csect field of union internal_auxent. The
3065 optional second argument is the alignment (the default is 2). */
3066
3067static void
3068ppc_csect (ignore)
5480ccf3 3069 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3070{
3071 char *name;
3072 char endc;
3073 symbolS *sym;
931e13a6 3074 offsetT align;
252b5132
RH		 3075
3076 name = input_line_pointer;
3077 endc = get_symbol_end ();
81d4177b 3078
252b5132
RH		 3079 sym = symbol_find_or_make (name);
3080
3081 *input_line_pointer = endc;
3082
3083 if (S_GET_NAME (sym)[0] == '\0')
3084 {
3085 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3086 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3087 }
3088
931e13a6 3089 align = 2;
252b5132
RH		 3090 if (*input_line_pointer == ',')
3091 {
3092 ++input_line_pointer;
931e13a6 3093 align = get_absolute_expression ();
252b5132
RH		 3094 }
3095
931e13a6
AM		 3096 ppc_change_csect (sym, align);
3097
252b5132
RH		 3098 demand_empty_rest_of_line ();
3099}
3100
3101/* Change to a different csect. */
3102
3103static void
931e13a6 3104ppc_change_csect (sym, align)
252b5132 3105 symbolS *sym;
931e13a6 3106 offsetT align;
252b5132
RH		 3107{
3108 if (S_IS_DEFINED (sym))
809ffe0d 3109 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3110 else
3111 {
3112 symbolS **list_ptr;
3113 int after_toc;
3114 int hold_chunksize;
3115 symbolS *list;
931e13a6
AM		 3116 int is_code;
3117 segT sec;
252b5132
RH		 3118
3119 /* This is a new csect. We need to look at the symbol class to
3120 figure out whether it should go in the text section or the
3121 data section. */
3122 after_toc = 0;
931e13a6 3123 is_code = 0;
809ffe0d 3124 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3125 {
3126 case XMC_PR:
3127 case XMC_RO:
3128 case XMC_DB:
3129 case XMC_GL:
3130 case XMC_XO:
3131 case XMC_SV:
3132 case XMC_TI:
3133 case XMC_TB:
3134 S_SET_SEGMENT (sym, text_section);
809ffe0d 3135 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3136 ++ppc_text_subsegment;
3137 list_ptr = &ppc_text_csects;
931e13a6 3138 is_code = 1;
252b5132
RH		 3139 break;
3140 case XMC_RW:
3141 case XMC_TC0:
3142 case XMC_TC:
3143 case XMC_DS:
3144 case XMC_UA:
3145 case XMC_BS:
3146 case XMC_UC:
3147 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3148 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3149 == ppc_data_subsegment))
252b5132
RH		 3150 after_toc = 1;
3151 S_SET_SEGMENT (sym, data_section);
809ffe0d 3152 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3153 ++ppc_data_subsegment;
3154 list_ptr = &ppc_data_csects;
3155 break;
3156 default:
3157 abort ();
3158 }
3159
3160 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3161 changing subsegments, so that we don't use a lot of memory
3162 space for what may be a small section. */
252b5132
RH		 3163 hold_chunksize = chunksize;
3164 chunksize = 64;
3165
931e13a6
AM		 3166 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3167 symbol_get_tc (sym)->subseg);
252b5132
RH		 3168
3169 chunksize = hold_chunksize;
3170
3171 if (after_toc)
3172 ppc_after_toc_frag = frag_now;
3173
931e13a6
AM		 3174 record_alignment (sec, align);
3175 if (is_code)
3176 frag_align_code (align, 0);
3177 else
3178 frag_align (align, 0, 0);
3179
809ffe0d 3180 symbol_set_frag (sym, frag_now);
252b5132
RH		 3181 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3182
931e13a6 3183 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3184 symbol_get_tc (sym)->output = 1;
3185 symbol_get_tc (sym)->within = sym;
81d4177b 3186
252b5132 3187 for (list = *list_ptr;
809ffe0d
ILT		 3188 symbol_get_tc (list)->next != (symbolS *) NULL;
3189 list = symbol_get_tc (list)->next)
252b5132 3190 ;
809ffe0d 3191 symbol_get_tc (list)->next = sym;
81d4177b 3192
252b5132 3193 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3194 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3195 &symbol_lastP);
252b5132
RH		 3196 }
3197
3198 ppc_current_csect = sym;
3199}
3200
3201/* This function handles the .text and .data pseudo-ops. These
3202 pseudo-ops aren't really used by XCOFF; we implement them for the
3203 convenience of people who aren't used to XCOFF. */
3204
3205static void
3206ppc_section (type)
3207 int type;
3208{
3209 const char *name;
3210 symbolS *sym;
3211
3212 if (type == 't')
3213 name = ".text[PR]";
3214 else if (type == 'd')
3215 name = ".data[RW]";
3216 else
3217 abort ();
3218
3219 sym = symbol_find_or_make (name);
3220
931e13a6 3221 ppc_change_csect (sym, 2);
252b5132
RH		 3222
3223 demand_empty_rest_of_line ();
3224}
3225
3226/* This function handles the .section pseudo-op. This is mostly to
3227 give an error, since XCOFF only supports .text, .data and .bss, but
3228 we do permit the user to name the text or data section. */
3229
3230static void
3231ppc_named_section (ignore)
5480ccf3 3232 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3233{
3234 char *user_name;
3235 const char *real_name;
3236 char c;
3237 symbolS *sym;
3238
3239 user_name = input_line_pointer;
3240 c = get_symbol_end ();
3241
3242 if (strcmp (user_name, ".text") == 0)
3243 real_name = ".text[PR]";
3244 else if (strcmp (user_name, ".data") == 0)
3245 real_name = ".data[RW]";
3246 else
3247 {
3248 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3249 *input_line_pointer = c;
3250 ignore_rest_of_line ();
3251 return;
3252 }
3253
3254 *input_line_pointer = c;
3255
3256 sym = symbol_find_or_make (real_name);
3257
931e13a6 3258 ppc_change_csect (sym, 2);
252b5132
RH		 3259
3260 demand_empty_rest_of_line ();
3261}
3262
3263/* The .extern pseudo-op. We create an undefined symbol. */
3264
3265static void
3266ppc_extern (ignore)
5480ccf3 3267 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3268{
3269 char *name;
3270 char endc;
3271
3272 name = input_line_pointer;
3273 endc = get_symbol_end ();
3274
3275 (void) symbol_find_or_make (name);
3276
3277 *input_line_pointer = endc;
3278
3279 demand_empty_rest_of_line ();
3280}
3281
3282/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3283
3284static void
3285ppc_lglobl (ignore)
5480ccf3 3286 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3287{
3288 char *name;
3289 char endc;
3290 symbolS *sym;
3291
3292 name = input_line_pointer;
3293 endc = get_symbol_end ();
3294
3295 sym = symbol_find_or_make (name);
3296
3297 *input_line_pointer = endc;
3298
809ffe0d 3299 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3300
3301 demand_empty_rest_of_line ();
3302}
3303
3304/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3305 although I don't know why it bothers. */
3306
3307static void
3308ppc_rename (ignore)
5480ccf3 3309 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3310{
3311 char *name;
3312 char endc;
3313 symbolS *sym;
3314 int len;
3315
3316 name = input_line_pointer;
3317 endc = get_symbol_end ();
3318
3319 sym = symbol_find_or_make (name);
3320
3321 *input_line_pointer = endc;
3322
3323 if (*input_line_pointer != ',')
3324 {
3325 as_bad (_("missing rename string"));
3326 ignore_rest_of_line ();
3327 return;
3328 }
3329 ++input_line_pointer;
3330
809ffe0d 3331 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3332
3333 demand_empty_rest_of_line ();
3334}
3335
3336/* The .stabx pseudo-op. This is similar to a normal .stabs
3337 pseudo-op, but slightly different. A sample is
3338 .stabx "main:F-1",.main,142,0
3339 The first argument is the symbol name to create. The second is the
3340 value, and the third is the storage class. The fourth seems to be
3341 always zero, and I am assuming it is the type. */
3342
3343static void
3344ppc_stabx (ignore)
5480ccf3 3345 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3346{
3347 char *name;
3348 int len;
3349 symbolS *sym;
3350 expressionS exp;
3351
3352 name = demand_copy_C_string (&len);
3353
3354 if (*input_line_pointer != ',')
3355 {
3356 as_bad (_("missing value"));
3357 return;
3358 }
3359 ++input_line_pointer;
3360
b34976b6 3361 ppc_stab_symbol = TRUE;
252b5132 3362 sym = symbol_make (name);
b34976b6 3363 ppc_stab_symbol = FALSE;
252b5132 3364
809ffe0d 3365 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3366
3367 (void) expression (&exp);
3368
3369 switch (exp.X_op)
3370 {
3371 case O_illegal:
3372 case O_absent:
3373 case O_big:
3374 as_bad (_("illegal .stabx expression; zero assumed"));
3375 exp.X_add_number = 0;
3376 /* Fall through. */
3377 case O_constant:
3378 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3379 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3380 break;
3381
3382 case O_symbol:
3383 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3384 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3385 else
3386 {
3387 S_SET_VALUE (sym,
3388 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3389 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3390 }
3391 break;
3392
3393 default:
3394 /* The value is some complex expression. This will probably
99a814a1
AM		 3395 fail at some later point, but this is probably the right
3396 thing to do here. */
809ffe0d 3397 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3398 break;
3399 }
3400
3401 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3402 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3403
3404 if (*input_line_pointer != ',')
3405 {
3406 as_bad (_("missing class"));
3407 return;
3408 }
3409 ++input_line_pointer;
3410
3411 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3412
3413 if (*input_line_pointer != ',')
3414 {
3415 as_bad (_("missing type"));
3416 return;
3417 }
3418 ++input_line_pointer;
3419
3420 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3421
809ffe0d 3422 symbol_get_tc (sym)->output = 1;
252b5132 3423
6877bb43 3424 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3425
809ffe0d 3426 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3427
41ea10b1 3428 /* In this case :
99a814a1 3429
41ea10b1
TR		 3430 .bs name
3431 .stabx "z",arrays_,133,0
3432 .es
99a814a1 3433
41ea10b1 3434 .comm arrays_,13768,3
99a814a1 3435
41ea10b1
TR		 3436 resolve_symbol_value will copy the exp's "within" into sym's when the
3437 offset is 0. Since this seems to be corner case problem,
3438 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3439 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3440
3441 if (exp.X_op == O_symbol)
41ea10b1
TR		 3442 {
3443 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3444 }
6877bb43 3445 }
99a814a1 3446
252b5132
RH		 3447 if (exp.X_op != O_symbol
3448 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3449 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3450 ppc_frob_label (sym);
3451 else
3452 {
3453 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3454 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3455 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3456 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3457 }
3458
3459 demand_empty_rest_of_line ();
3460}
3461
3462/* The .function pseudo-op. This takes several arguments. The first
3463 argument seems to be the external name of the symbol. The second
67c1ffbe 3464 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3465 uses the same name for both. I have no idea what the third and
3466 fourth arguments are meant to be. The optional fifth argument is
3467 an expression for the size of the function. In COFF this symbol
3468 gets an aux entry like that used for a csect. */
3469
3470static void
3471ppc_function (ignore)
5480ccf3 3472 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3473{
3474 char *name;
3475 char endc;
3476 char *s;
3477 symbolS *ext_sym;
3478 symbolS *lab_sym;
3479
3480 name = input_line_pointer;
3481 endc = get_symbol_end ();
3482
3483 /* Ignore any [PR] suffix. */
3484 name = ppc_canonicalize_symbol_name (name);
3485 s = strchr (name, '[');
3486 if (s != (char *) NULL
3487 && strcmp (s + 1, "PR]") == 0)
3488 *s = '\0';
3489
3490 ext_sym = symbol_find_or_make (name);
3491
3492 *input_line_pointer = endc;
3493
3494 if (*input_line_pointer != ',')
3495 {
3496 as_bad (_("missing symbol name"));
3497 ignore_rest_of_line ();
3498 return;
3499 }
3500 ++input_line_pointer;
3501
3502 name = input_line_pointer;
3503 endc = get_symbol_end ();
3504
3505 lab_sym = symbol_find_or_make (name);
3506
3507 *input_line_pointer = endc;
3508
3509 if (ext_sym != lab_sym)
3510 {
809ffe0d
ILT		 3511 expressionS exp;
3512
3513 exp.X_op = O_symbol;
3514 exp.X_add_symbol = lab_sym;
3515 exp.X_op_symbol = NULL;
3516 exp.X_add_number = 0;
3517 exp.X_unsigned = 0;
3518 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3519 }
3520
809ffe0d
ILT		 3521 if (symbol_get_tc (ext_sym)->class == -1)
3522 symbol_get_tc (ext_sym)->class = XMC_PR;
3523 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3524
3525 if (*input_line_pointer == ',')
3526 {
3527 expressionS ignore;
3528
3529 /* Ignore the third argument. */
3530 ++input_line_pointer;
3531 expression (&ignore);
3532 if (*input_line_pointer == ',')
3533 {
3534 /* Ignore the fourth argument. */
3535 ++input_line_pointer;
3536 expression (&ignore);
3537 if (*input_line_pointer == ',')
3538 {
3539 /* The fifth argument is the function size. */
3540 ++input_line_pointer;
809ffe0d
ILT		 3541 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3542 absolute_section,
3543 (valueT) 0,
3544 &zero_address_frag);
3545 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3546 }
3547 }
3548 }
3549
3550 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3551 SF_SET_FUNCTION (ext_sym);
3552 SF_SET_PROCESS (ext_sym);
3553 coff_add_linesym (ext_sym);
3554
3555 demand_empty_rest_of_line ();
3556}
3557
3558/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3559 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3560 with the correct line number */
5d6255fe 3561
8642cce8 3562static symbolS *saved_bi_sym = 0;
252b5132
RH		 3563
3564static void
3565ppc_bf (ignore)
5480ccf3 3566 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3567{
3568 symbolS *sym;
3569
3570 sym = symbol_make (".bf");
3571 S_SET_SEGMENT (sym, text_section);
809ffe0d 3572 symbol_set_frag (sym, frag_now);
252b5132
RH		 3573 S_SET_VALUE (sym, frag_now_fix ());
3574 S_SET_STORAGE_CLASS (sym, C_FCN);
3575
3576 coff_line_base = get_absolute_expression ();
3577
3578 S_SET_NUMBER_AUXILIARY (sym, 1);
3579 SA_SET_SYM_LNNO (sym, coff_line_base);
3580
8642cce8 3581 /* Line number for bi. */
5d6255fe 3582 if (saved_bi_sym)
8642cce8
TR		 3583 {
3584 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3585 saved_bi_sym = 0;
3586 }
5d6255fe 3587
8642cce8 3588
809ffe0d 3589 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3590
3591 ppc_frob_label (sym);
3592
3593 demand_empty_rest_of_line ();
3594}
3595
3596/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3597 ".ef", except that the line number is absolute, not relative to the
3598 most recent ".bf" symbol. */
3599
3600static void
3601ppc_ef (ignore)
5480ccf3 3602 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3603{
3604 symbolS *sym;
3605
3606 sym = symbol_make (".ef");
3607 S_SET_SEGMENT (sym, text_section);
809ffe0d 3608 symbol_set_frag (sym, frag_now);
252b5132
RH		 3609 S_SET_VALUE (sym, frag_now_fix ());
3610 S_SET_STORAGE_CLASS (sym, C_FCN);
3611 S_SET_NUMBER_AUXILIARY (sym, 1);
3612 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3613 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3614
3615 ppc_frob_label (sym);
3616
3617 demand_empty_rest_of_line ();
3618}
3619
3620/* The .bi and .ei pseudo-ops. These take a string argument and
3621 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3622 the symbol list. The value of .bi will be know when the next .bf
3623 is encountered. */
252b5132
RH		 3624
3625static void
3626ppc_biei (ei)
3627 int ei;
3628{
3629 static symbolS *last_biei;
3630
3631 char *name;
3632 int len;
3633 symbolS *sym;
3634 symbolS *look;
3635
3636 name = demand_copy_C_string (&len);
3637
3638 /* The value of these symbols is actually file offset. Here we set
3639 the value to the index into the line number entries. In
3640 ppc_frob_symbols we set the fix_line field, which will cause BFD
3641 to do the right thing. */
3642
3643 sym = symbol_make (name);
3644 /* obj-coff.c currently only handles line numbers correctly in the
3645 .text section. */
3646 S_SET_SEGMENT (sym, text_section);
3647 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3648 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3649
3650 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3651 symbol_get_tc (sym)->output = 1;
81d4177b 3652
8642cce8 3653 /* Save bi. */
5d6255fe 3654 if (ei)
8642cce8
TR		 3655 saved_bi_sym = 0;
3656 else
3657 saved_bi_sym = sym;
3658
252b5132
RH		 3659 for (look = last_biei ? last_biei : symbol_rootP;
3660 (look != (symbolS *) NULL
3661 && (S_GET_STORAGE_CLASS (look) == C_FILE
3662 || S_GET_STORAGE_CLASS (look) == C_BINCL
3663 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3664 look = symbol_next (look))
3665 ;
3666 if (look != (symbolS *) NULL)
3667 {
3668 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3669 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3670 last_biei = sym;
3671 }
3672
3673 demand_empty_rest_of_line ();
3674}
3675
3676/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3677 There is one argument, which is a csect symbol. The value of the
3678 .bs symbol is the index of this csect symbol. */
3679
3680static void
3681ppc_bs (ignore)
5480ccf3 3682 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3683{
3684 char *name;
3685 char endc;
3686 symbolS *csect;
3687 symbolS *sym;
3688
3689 if (ppc_current_block != NULL)
3690 as_bad (_("nested .bs blocks"));
3691
3692 name = input_line_pointer;
3693 endc = get_symbol_end ();
3694
3695 csect = symbol_find_or_make (name);
3696
3697 *input_line_pointer = endc;
3698
3699 sym = symbol_make (".bs");
3700 S_SET_SEGMENT (sym, now_seg);
3701 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3702 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3703 symbol_get_tc (sym)->output = 1;
252b5132 3704
809ffe0d 3705 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3706
3707 ppc_frob_label (sym);
3708
3709 ppc_current_block = sym;
3710
3711 demand_empty_rest_of_line ();
3712}
3713
3714/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3715
3716static void
3717ppc_es (ignore)
5480ccf3 3718 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3719{
3720 symbolS *sym;
3721
3722 if (ppc_current_block == NULL)
3723 as_bad (_(".es without preceding .bs"));
3724
3725 sym = symbol_make (".es");
3726 S_SET_SEGMENT (sym, now_seg);
3727 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3728 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3729 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3730
3731 ppc_frob_label (sym);
3732
3733 ppc_current_block = NULL;
3734
3735 demand_empty_rest_of_line ();
3736}
3737
3738/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3739 line number. */
3740
3741static void
3742ppc_bb (ignore)
5480ccf3 3743 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3744{
3745 symbolS *sym;
3746
3747 sym = symbol_make (".bb");
3748 S_SET_SEGMENT (sym, text_section);
809ffe0d 3749 symbol_set_frag (sym, frag_now);
252b5132
RH		 3750 S_SET_VALUE (sym, frag_now_fix ());
3751 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3752
3753 S_SET_NUMBER_AUXILIARY (sym, 1);
3754 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3755
809ffe0d 3756 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3757
3758 SF_SET_PROCESS (sym);
3759
3760 ppc_frob_label (sym);
3761
3762 demand_empty_rest_of_line ();
3763}
3764
3765/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3766 line number. */
3767
3768static void
3769ppc_eb (ignore)
5480ccf3 3770 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3771{
3772 symbolS *sym;
3773
3774 sym = symbol_make (".eb");
3775 S_SET_SEGMENT (sym, text_section);
809ffe0d 3776 symbol_set_frag (sym, frag_now);
252b5132
RH		 3777 S_SET_VALUE (sym, frag_now_fix ());
3778 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3779 S_SET_NUMBER_AUXILIARY (sym, 1);
3780 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3781 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3782
3783 SF_SET_PROCESS (sym);
3784
3785 ppc_frob_label (sym);
3786
3787 demand_empty_rest_of_line ();
3788}
3789
3790/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3791 specified name. */
3792
3793static void
3794ppc_bc (ignore)
5480ccf3 3795 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3796{
3797 char *name;
3798 int len;
3799 symbolS *sym;
3800
3801 name = demand_copy_C_string (&len);
3802 sym = symbol_make (name);
3803 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3804 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3805 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3806 S_SET_VALUE (sym, 0);
809ffe0d 3807 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3808
3809 ppc_frob_label (sym);
3810
3811 demand_empty_rest_of_line ();
3812}
3813
3814/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3815
3816static void
3817ppc_ec (ignore)
5480ccf3 3818 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3819{
3820 symbolS *sym;
3821
3822 sym = symbol_make (".ec");
3823 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3824 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3825 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3826 S_SET_VALUE (sym, 0);
809ffe0d 3827 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3828
3829 ppc_frob_label (sym);
3830
3831 demand_empty_rest_of_line ();
3832}
3833
3834/* The .toc pseudo-op. Switch to the .toc subsegment. */
3835
3836static void
3837ppc_toc (ignore)
5480ccf3 3838 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3839{
3840 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3841 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3842 else
3843 {
3844 subsegT subseg;
3845 symbolS *sym;
3846 symbolS *list;
81d4177b 3847
252b5132
RH		 3848 subseg = ppc_data_subsegment;
3849 ++ppc_data_subsegment;
3850
3851 subseg_new (segment_name (data_section), subseg);
3852 ppc_toc_frag = frag_now;
3853
3854 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3855 symbol_set_frag (sym, frag_now);
252b5132
RH		 3856 S_SET_SEGMENT (sym, data_section);
3857 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3858 symbol_get_tc (sym)->subseg = subseg;
3859 symbol_get_tc (sym)->output = 1;
3860 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3861
3862 ppc_toc_csect = sym;
81d4177b 3863
252b5132 3864 for (list = ppc_data_csects;
809ffe0d
ILT		 3865 symbol_get_tc (list)->next != (symbolS *) NULL;
3866 list = symbol_get_tc (list)->next)
252b5132 3867 ;
809ffe0d 3868 symbol_get_tc (list)->next = sym;
252b5132
RH		 3869
3870 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3871 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3872 &symbol_lastP);
252b5132
RH		 3873 }
3874
3875 ppc_current_csect = ppc_toc_csect;
3876
3877 demand_empty_rest_of_line ();
3878}
3879
3880/* The AIX assembler automatically aligns the operands of a .long or
3881 .short pseudo-op, and we want to be compatible. */
3882
3883static void
3884ppc_xcoff_cons (log_size)
3885 int log_size;
3886{
3887 frag_align (log_size, 0, 0);
3888 record_alignment (now_seg, log_size);
3889 cons (1 << log_size);
3890}
3891
3892static void
3893ppc_vbyte (dummy)
5480ccf3 3894 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3895{
3896 expressionS exp;
3897 int byte_count;
3898
3899 (void) expression (&exp);
3900
3901 if (exp.X_op != O_constant)
3902 {
3903 as_bad (_("non-constant byte count"));
3904 return;
3905 }
3906
3907 byte_count = exp.X_add_number;
3908
3909 if (*input_line_pointer != ',')
3910 {
3911 as_bad (_("missing value"));
3912 return;
3913 }
3914
3915 ++input_line_pointer;
3916 cons (byte_count);
3917}
3918
3919#endif /* OBJ_XCOFF */
0baf16f2 3920#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3921\f
3922/* The .tc pseudo-op. This is used when generating either XCOFF or
3923 ELF. This takes two or more arguments.
3924
3925 When generating XCOFF output, the first argument is the name to
3926 give to this location in the toc; this will be a symbol with class
0baf16f2 3927 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3928 this location in the TOC; often there is just one more argument, a
1049f94e 3929 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3930 depends on target word size. A 32-bit target uses 4-byte values, a
3931 64-bit target uses 8-byte values.
252b5132
RH		 3932
3933 When not generating XCOFF output, the arguments are the same, but
3934 the first argument is simply ignored. */
3935
3936static void
3937ppc_tc (ignore)
92161534 3938 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3939{
3940#ifdef OBJ_XCOFF
3941
3942 /* Define the TOC symbol name. */
3943 {
3944 char *name;
3945 char endc;
3946 symbolS *sym;
3947
3948 if (ppc_toc_csect == (symbolS *) NULL
3949 || ppc_toc_csect != ppc_current_csect)
3950 {
3951 as_bad (_(".tc not in .toc section"));
3952 ignore_rest_of_line ();
3953 return;
3954 }
3955
3956 name = input_line_pointer;
3957 endc = get_symbol_end ();
3958
3959 sym = symbol_find_or_make (name);
3960
3961 *input_line_pointer = endc;
3962
3963 if (S_IS_DEFINED (sym))
3964 {
3965 symbolS *label;
3966
809ffe0d
ILT		 3967 label = symbol_get_tc (ppc_current_csect)->within;
3968 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3969 {
3970 as_bad (_(".tc with no label"));
3971 ignore_rest_of_line ();
3972 return;
3973 }
3974
3975 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3976 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3977 S_SET_VALUE (label, S_GET_VALUE (sym));
3978
3979 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3980 ++input_line_pointer;
3981
3982 return;
3983 }
3984
3985 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3986 symbol_set_frag (sym, frag_now);
252b5132 3987 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3988 symbol_get_tc (sym)->class = XMC_TC;
3989 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3990
3991 ppc_frob_label (sym);
3992 }
3993
0baf16f2
AM		 3994#endif /* OBJ_XCOFF */
3995#ifdef OBJ_ELF
9c7977b3 3996 int align;
252b5132
RH		 3997
3998 /* Skip the TOC symbol name. */
3999 while (is_part_of_name (*input_line_pointer)
4000 || *input_line_pointer == '['
4001 || *input_line_pointer == ']'
4002 || *input_line_pointer == '{'
4003 || *input_line_pointer == '}')
4004 ++input_line_pointer;
4005
0baf16f2 4006 /* Align to a four/eight byte boundary. */
2b3c4602 4007 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4008 frag_align (align, 0, 0);
4009 record_alignment (now_seg, align);
0baf16f2 4010#endif /* OBJ_ELF */
252b5132
RH		 4011
4012 if (*input_line_pointer != ',')
4013 demand_empty_rest_of_line ();
4014 else
4015 {
4016 ++input_line_pointer;
2b3c4602 4017 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4018 }
4019}
0baf16f2
AM		 4020
4021/* Pseudo-op .machine. */
0baf16f2
AM		 4022
4023static void
4024ppc_machine (ignore)
4025 int ignore ATTRIBUTE_UNUSED;
4026{
69c040df
AM		 4027 char *cpu_string;
4028#define MAX_HISTORY 100
4029 static unsigned long *cpu_history;
4030 static int curr_hist;
4031
4032 SKIP_WHITESPACE ();
4033
4034 if (*input_line_pointer == '"')
4035 {
4036 int len;
4037 cpu_string = demand_copy_C_string (&len);
4038 }
4039 else
4040 {
4041 char c;
4042 cpu_string = input_line_pointer;
4043 c = get_symbol_end ();
4044 cpu_string = xstrdup (cpu_string);
4045 *input_line_pointer = c;
4046 }
4047
4048 if (cpu_string != NULL)
4049 {
4050 unsigned long old_cpu = ppc_cpu;
4051 char *p;
4052
4053 for (p = cpu_string; *p != 0; p++)
4054 *p = TOLOWER (*p);
4055
4056 if (strcmp (cpu_string, "push") == 0)
4057 {
4058 if (cpu_history == NULL)
4059 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4060
4061 if (curr_hist >= MAX_HISTORY)
4062 as_bad (_(".machine stack overflow"));
4063 else
4064 cpu_history[curr_hist++] = ppc_cpu;
4065 }
4066 else if (strcmp (cpu_string, "pop") == 0)
4067 {
4068 if (curr_hist <= 0)
4069 as_bad (_(".machine stack underflow"));
4070 else
4071 ppc_cpu = cpu_history[--curr_hist];
4072 }
4073 else if (parse_cpu (cpu_string))
4074 ;
4075 else
4076 as_bad (_("invalid machine `%s'"), cpu_string);
4077
4078 if (ppc_cpu != old_cpu)
4079 ppc_setup_opcodes ();
4080 }
4081
4082 demand_empty_rest_of_line ();
0baf16f2
AM		 4083}
4084
4085/* See whether a symbol is in the TOC section. */
4086
4087static int
4088ppc_is_toc_sym (sym)
4089 symbolS *sym;
4090{
4091#ifdef OBJ_XCOFF
4092 return symbol_get_tc (sym)->class == XMC_TC;
4093#endif
4094#ifdef OBJ_ELF
4095 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4096 if (ppc_obj64)
0baf16f2
AM		 4097 return strcmp (sname, ".toc") == 0;
4098 else
4099 return strcmp (sname, ".got") == 0;
4100#endif
4101}
4102#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4103\f
4104#ifdef TE_PE
4105
99a814a1 4106/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4107
4108/* Set the current section. */
4109static void
4110ppc_set_current_section (new)
4111 segT new;
4112{
4113 ppc_previous_section = ppc_current_section;
4114 ppc_current_section = new;
4115}
4116
4117/* pseudo-op: .previous
4118 behaviour: toggles the current section with the previous section.
4119 errors: None
99a814a1
AM		 4120 warnings: "No previous section" */
4121
252b5132 4122static void
99a814a1 4123ppc_previous (ignore)
5480ccf3 4124 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4125{
4126 symbolS *tmp;
4127
81d4177b 4128 if (ppc_previous_section == NULL)
252b5132 4129 {
99a814a1 4130 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4131 return;
4132 }
4133
99a814a1 4134 subseg_set (ppc_previous_section, 0);
252b5132 4135
99a814a1 4136 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4137}
4138
4139/* pseudo-op: .pdata
4140 behaviour: predefined read only data section
b34976b6 4141 double word aligned
252b5132
RH		 4142 errors: None
4143 warnings: None
4144 initial: .section .pdata "adr3"
b34976b6 4145 a - don't know -- maybe a misprint
252b5132
RH		 4146 d - initialized data
4147 r - readable
4148 3 - double word aligned (that would be 4 byte boundary)
4149
4150 commentary:
4151 Tag index tables (also known as the function table) for exception
99a814a1 4152 handling, debugging, etc. */
252b5132 4153
252b5132 4154static void
99a814a1 4155ppc_pdata (ignore)
5480ccf3 4156 int ignore ATTRIBUTE_UNUSED;
252b5132 4157{
81d4177b 4158 if (pdata_section == 0)
252b5132
RH		 4159 {
4160 pdata_section = subseg_new (".pdata", 0);
81d4177b 4161
252b5132
RH		 4162 bfd_set_section_flags (stdoutput, pdata_section,
4163 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4164 | SEC_READONLY | SEC_DATA ));
81d4177b 4165
252b5132
RH		 4166 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4167 }
4168 else
4169 {
99a814a1 4170 pdata_section = subseg_new (".pdata", 0);
252b5132 4171 }
99a814a1 4172 ppc_set_current_section (pdata_section);
252b5132
RH		 4173}
4174
4175/* pseudo-op: .ydata
4176 behaviour: predefined read only data section
b34976b6 4177 double word aligned
252b5132
RH		 4178 errors: None
4179 warnings: None
4180 initial: .section .ydata "drw3"
b34976b6 4181 a - don't know -- maybe a misprint
252b5132
RH		 4182 d - initialized data
4183 r - readable
4184 3 - double word aligned (that would be 4 byte boundary)
4185 commentary:
4186 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4187 debugging, etc. */
4188
252b5132 4189static void
99a814a1 4190ppc_ydata (ignore)
5480ccf3 4191 int ignore ATTRIBUTE_UNUSED;
252b5132 4192{
81d4177b 4193 if (ydata_section == 0)
252b5132
RH		 4194 {
4195 ydata_section = subseg_new (".ydata", 0);
4196 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4197 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4198 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4199
4200 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4201 }
4202 else
4203 {
4204 ydata_section = subseg_new (".ydata", 0);
4205 }
99a814a1 4206 ppc_set_current_section (ydata_section);
252b5132
RH		 4207}
4208
4209/* pseudo-op: .reldata
4210 behaviour: predefined read write data section
b34976b6 4211 double word aligned (4-byte)
252b5132
RH		 4212 FIXME: relocation is applied to it
4213 FIXME: what's the difference between this and .data?
4214 errors: None
4215 warnings: None
4216 initial: .section .reldata "drw3"
4217 d - initialized data
4218 r - readable
4219 w - writeable
4220 3 - double word aligned (that would be 8 byte boundary)
4221
4222 commentary:
4223 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4224 function descriptors, etc. */
4225
252b5132 4226static void
99a814a1 4227ppc_reldata (ignore)
5480ccf3 4228 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4229{
4230 if (reldata_section == 0)
4231 {
4232 reldata_section = subseg_new (".reldata", 0);
4233
4234 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4235 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4236 | SEC_DATA));
252b5132
RH		 4237
4238 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4239 }
4240 else
4241 {
4242 reldata_section = subseg_new (".reldata", 0);
4243 }
99a814a1 4244 ppc_set_current_section (reldata_section);
252b5132
RH		 4245}
4246
4247/* pseudo-op: .rdata
4248 behaviour: predefined read only data section
b34976b6 4249 double word aligned
252b5132
RH		 4250 errors: None
4251 warnings: None
4252 initial: .section .rdata "dr3"
4253 d - initialized data
4254 r - readable
99a814a1
AM		 4255 3 - double word aligned (that would be 4 byte boundary) */
4256
252b5132 4257static void
99a814a1 4258ppc_rdata (ignore)
5480ccf3 4259 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4260{
4261 if (rdata_section == 0)
4262 {
4263 rdata_section = subseg_new (".rdata", 0);
4264 bfd_set_section_flags (stdoutput, rdata_section,
4265 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4266 | SEC_READONLY | SEC_DATA ));
4267
4268 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4269 }
4270 else
4271 {
4272 rdata_section = subseg_new (".rdata", 0);
4273 }
99a814a1 4274 ppc_set_current_section (rdata_section);
252b5132
RH		 4275}
4276
4277/* pseudo-op: .ualong
81d4177b 4278 behaviour: much like .int, with the exception that no alignment is
b34976b6 4279 performed.
252b5132
RH		 4280 FIXME: test the alignment statement
4281 errors: None
99a814a1
AM		 4282 warnings: None */
4283
252b5132 4284static void
99a814a1 4285ppc_ualong (ignore)
5480ccf3 4286 int ignore ATTRIBUTE_UNUSED;
252b5132 4287{
99a814a1
AM		 4288 /* Try for long. */
4289 cons (4);
252b5132
RH		 4290}
4291
4292/* pseudo-op: .znop <symbol name>
4293 behaviour: Issue a nop instruction
b34976b6 4294 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4295 the supplied symbol name.
4296 errors: None
99a814a1
AM		 4297 warnings: Missing symbol name */
4298
252b5132 4299static void
99a814a1 4300ppc_znop (ignore)
5480ccf3 4301 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4302{
4303 unsigned long insn;
4304 const struct powerpc_opcode *opcode;
4305 expressionS ex;
4306 char *f;
252b5132 4307 symbolS *sym;
252b5132
RH		 4308 char *symbol_name;
4309 char c;
4310 char *name;
4311 unsigned int exp;
4312 flagword flags;
4313 asection *sec;
4314
99a814a1 4315 /* Strip out the symbol name. */
252b5132
RH		 4316 symbol_name = input_line_pointer;
4317 c = get_symbol_end ();
4318
4319 name = xmalloc (input_line_pointer - symbol_name + 1);
4320 strcpy (name, symbol_name);
4321
4322 sym = symbol_find_or_make (name);
4323
4324 *input_line_pointer = c;
4325
4326 SKIP_WHITESPACE ();
4327
4328 /* Look up the opcode in the hash table. */
4329 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4330
99a814a1 4331 /* Stick in the nop. */
252b5132
RH		 4332 insn = opcode->opcode;
4333
4334 /* Write out the instruction. */
4335 f = frag_more (4);
4336 md_number_to_chars (f, insn, 4);
4337 fix_new (frag_now,
4338 f - frag_now->fr_literal,
4339 4,
4340 sym,
4341 0,
4342 0,
4343 BFD_RELOC_16_GOT_PCREL);
4344
4345}
4346
81d4177b
KH		 4347/* pseudo-op:
4348 behaviour:
4349 errors:
99a814a1
AM		 4350 warnings: */
4351
252b5132 4352static void
99a814a1 4353ppc_pe_comm (lcomm)
252b5132
RH		 4354 int lcomm;
4355{
4356 register char *name;
4357 register char c;
4358 register char *p;
4359 offsetT temp;
4360 register symbolS *symbolP;
4361 offsetT align;
4362
4363 name = input_line_pointer;
4364 c = get_symbol_end ();
4365
99a814a1 4366 /* just after name is now '\0'. */
252b5132
RH		 4367 p = input_line_pointer;
4368 *p = c;
4369 SKIP_WHITESPACE ();
4370 if (*input_line_pointer != ',')
4371 {
4372 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4373 ignore_rest_of_line ();
4374 return;
4375 }
4376
4377 input_line_pointer++; /* skip ',' */
4378 if ((temp = get_absolute_expression ()) < 0)
4379 {
4380 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4381 ignore_rest_of_line ();
4382 return;
4383 }
4384
4385 if (! lcomm)
4386 {
4387 /* The third argument to .comm is the alignment. */
4388 if (*input_line_pointer != ',')
4389 align = 3;
4390 else
4391 {
4392 ++input_line_pointer;
4393 align = get_absolute_expression ();
4394 if (align <= 0)
4395 {
4396 as_warn (_("ignoring bad alignment"));
4397 align = 3;
4398 }
4399 }
4400 }
4401
4402 *p = 0;
4403 symbolP = symbol_find_or_make (name);
4404
4405 *p = c;
4406 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4407 {
4408 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4409 S_GET_NAME (symbolP));
4410 ignore_rest_of_line ();
4411 return;
4412 }
4413
4414 if (S_GET_VALUE (symbolP))
4415 {
4416 if (S_GET_VALUE (symbolP) != (valueT) temp)
4417 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4418 S_GET_NAME (symbolP),
4419 (long) S_GET_VALUE (symbolP),
4420 (long) temp);
4421 }
4422 else
4423 {
4424 S_SET_VALUE (symbolP, (valueT) temp);
4425 S_SET_EXTERNAL (symbolP);
86ebace2 4426 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4427 }
4428
4429 demand_empty_rest_of_line ();
4430}
4431
4432/*
4433 * implement the .section pseudo op:
4434 * .section name {, "flags"}
4435 * ^ ^
4436 * | +--- optional flags: 'b' for bss
4437 * | 'i' for info
4438 * +-- section name 'l' for lib
4439 * 'n' for noload
4440 * 'o' for over
4441 * 'w' for data
4442 * 'd' (apparently m88k for data)
4443 * 'x' for text
4444 * But if the argument is not a quoted string, treat it as a
4445 * subsegment number.
4446 *
4447 * FIXME: this is a copy of the section processing from obj-coff.c, with
4448 * additions/changes for the moto-pas assembler support. There are three
4449 * categories:
4450 *
81d4177b 4451 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4452 * setting bits that bfd probably neither understands or uses. The
4453 * correct approach (?) will have to incorporate extra fields attached
4454 * to the section to hold the system specific stuff. (krk)
4455 *
4456 * Section Contents:
4457 * 'a' - unknown - referred to in documentation, but no definition supplied
4458 * 'c' - section has code
4459 * 'd' - section has initialized data
4460 * 'u' - section has uninitialized data
4461 * 'i' - section contains directives (info)
4462 * 'n' - section can be discarded
4463 * 'R' - remove section at link time
4464 *
4465 * Section Protection:
4466 * 'r' - section is readable
4467 * 'w' - section is writeable
4468 * 'x' - section is executable
4469 * 's' - section is sharable
4470 *
4471 * Section Alignment:
4472 * '0' - align to byte boundary
4473 * '1' - align to halfword undary
4474 * '2' - align to word boundary
4475 * '3' - align to doubleword boundary
4476 * '4' - align to quadword boundary
4477 * '5' - align to 32 byte boundary
4478 * '6' - align to 64 byte boundary
4479 *
4480 */
4481
4482void
4483ppc_pe_section (ignore)
5480ccf3 4484 int ignore ATTRIBUTE_UNUSED;
252b5132 4485{
99a814a1 4486 /* Strip out the section name. */
252b5132
RH		 4487 char *section_name;
4488 char c;
4489 char *name;
4490 unsigned int exp;
4491 flagword flags;
4492 segT sec;
4493 int align;
4494
4495 section_name = input_line_pointer;
4496 c = get_symbol_end ();
4497
4498 name = xmalloc (input_line_pointer - section_name + 1);
4499 strcpy (name, section_name);
4500
4501 *input_line_pointer = c;
4502
4503 SKIP_WHITESPACE ();
4504
4505 exp = 0;
4506 flags = SEC_NO_FLAGS;
4507
4508 if (strcmp (name, ".idata$2") == 0)
4509 {
4510 align = 0;
4511 }
4512 else if (strcmp (name, ".idata$3") == 0)
4513 {
4514 align = 0;
4515 }
4516 else if (strcmp (name, ".idata$4") == 0)
4517 {
4518 align = 2;
4519 }
4520 else if (strcmp (name, ".idata$5") == 0)
4521 {
4522 align = 2;
4523 }
4524 else if (strcmp (name, ".idata$6") == 0)
4525 {
4526 align = 1;
4527 }
4528 else
99a814a1
AM		 4529 /* Default alignment to 16 byte boundary. */
4530 align = 4;
252b5132
RH		 4531
4532 if (*input_line_pointer == ',')
4533 {
4534 ++input_line_pointer;
4535 SKIP_WHITESPACE ();
4536 if (*input_line_pointer != '"')
4537 exp = get_absolute_expression ();
4538 else
4539 {
4540 ++input_line_pointer;
4541 while (*input_line_pointer != '"'
4542 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4543 {
4544 switch (*input_line_pointer)
4545 {
4546 /* Section Contents */
4547 case 'a': /* unknown */
4548 as_bad (_("Unsupported section attribute -- 'a'"));
4549 break;
4550 case 'c': /* code section */
81d4177b 4551 flags |= SEC_CODE;
252b5132
RH		 4552 break;
4553 case 'd': /* section has initialized data */
4554 flags |= SEC_DATA;
4555 break;
4556 case 'u': /* section has uninitialized data */
4557 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4558 in winnt.h */
4559 flags |= SEC_ROM;
4560 break;
4561 case 'i': /* section contains directives (info) */
4562 /* FIXME: This is IMAGE_SCN_LNK_INFO
4563 in winnt.h */
4564 flags |= SEC_HAS_CONTENTS;
4565 break;
4566 case 'n': /* section can be discarded */
81d4177b 4567 flags &=~ SEC_LOAD;
252b5132
RH		 4568 break;
4569 case 'R': /* Remove section at link time */
4570 flags |= SEC_NEVER_LOAD;
4571 break;
4572
4573 /* Section Protection */
4574 case 'r': /* section is readable */
4575 flags |= IMAGE_SCN_MEM_READ;
4576 break;
4577 case 'w': /* section is writeable */
4578 flags |= IMAGE_SCN_MEM_WRITE;
4579 break;
4580 case 'x': /* section is executable */
4581 flags |= IMAGE_SCN_MEM_EXECUTE;
4582 break;
4583 case 's': /* section is sharable */
4584 flags |= IMAGE_SCN_MEM_SHARED;
4585 break;
4586
4587 /* Section Alignment */
4588 case '0': /* align to byte boundary */
4589 flags |= IMAGE_SCN_ALIGN_1BYTES;
4590 align = 0;
4591 break;
4592 case '1': /* align to halfword boundary */
4593 flags |= IMAGE_SCN_ALIGN_2BYTES;
4594 align = 1;
4595 break;
4596 case '2': /* align to word boundary */
4597 flags |= IMAGE_SCN_ALIGN_4BYTES;
4598 align = 2;
4599 break;
4600 case '3': /* align to doubleword boundary */
4601 flags |= IMAGE_SCN_ALIGN_8BYTES;
4602 align = 3;
4603 break;
4604 case '4': /* align to quadword boundary */
4605 flags |= IMAGE_SCN_ALIGN_16BYTES;
4606 align = 4;
4607 break;
4608 case '5': /* align to 32 byte boundary */
4609 flags |= IMAGE_SCN_ALIGN_32BYTES;
4610 align = 5;
4611 break;
4612 case '6': /* align to 64 byte boundary */
4613 flags |= IMAGE_SCN_ALIGN_64BYTES;
4614 align = 6;
4615 break;
4616
4617 default:
99a814a1
AM		 4618 as_bad (_("unknown section attribute '%c'"),
4619 *input_line_pointer);
252b5132
RH		 4620 break;
4621 }
4622 ++input_line_pointer;
4623 }
4624 if (*input_line_pointer == '"')
4625 ++input_line_pointer;
4626 }
4627 }
4628
4629 sec = subseg_new (name, (subsegT) exp);
4630
99a814a1 4631 ppc_set_current_section (sec);
252b5132
RH		 4632
4633 if (flags != SEC_NO_FLAGS)
4634 {
4635 if (! bfd_set_section_flags (stdoutput, sec, flags))
4636 as_bad (_("error setting flags for \"%s\": %s"),
4637 bfd_section_name (stdoutput, sec),
4638 bfd_errmsg (bfd_get_error ()));
4639 }
4640
99a814a1 4641 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4642
4643}
4644
4645static void
4646ppc_pe_function (ignore)
5480ccf3 4647 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4648{
4649 char *name;
4650 char endc;
4651 symbolS *ext_sym;
4652
4653 name = input_line_pointer;
4654 endc = get_symbol_end ();
4655
4656 ext_sym = symbol_find_or_make (name);
4657
4658 *input_line_pointer = endc;
4659
4660 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4661 SF_SET_FUNCTION (ext_sym);
4662 SF_SET_PROCESS (ext_sym);
4663 coff_add_linesym (ext_sym);
4664
4665 demand_empty_rest_of_line ();
4666}
4667
4668static void
4669ppc_pe_tocd (ignore)
5480ccf3 4670 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4671{
4672 if (tocdata_section == 0)
4673 {
4674 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4675 /* FIXME: section flags won't work. */
252b5132
RH		 4676 bfd_set_section_flags (stdoutput, tocdata_section,
4677 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4678 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4679
4680 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4681 }
4682 else
4683 {
4684 rdata_section = subseg_new (".tocd", 0);
4685 }
4686
99a814a1 4687 ppc_set_current_section (tocdata_section);
252b5132
RH		 4688
4689 demand_empty_rest_of_line ();
4690}
4691
4692/* Don't adjust TOC relocs to use the section symbol. */
4693
4694int
4695ppc_pe_fix_adjustable (fix)
4696 fixS *fix;
4697{
4698 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4699}
4700
4701#endif
4702\f
4703#ifdef OBJ_XCOFF
4704
4705/* XCOFF specific symbol and file handling. */
4706
4707/* Canonicalize the symbol name. We use the to force the suffix, if
4708 any, to use square brackets, and to be in upper case. */
4709
4710char *
4711ppc_canonicalize_symbol_name (name)
4712 char *name;
4713{
4714 char *s;
4715
4716 if (ppc_stab_symbol)
4717 return name;
4718
4719 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4720 ;
4721 if (*s != '\0')
4722 {
4723 char brac;
4724
4725 if (*s == '[')
4726 brac = ']';
4727 else
4728 {
4729 *s = '[';
4730 brac = '}';
4731 }
4732
4733 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4734 *s = TOUPPER (*s);
252b5132
RH		 4735
4736 if (*s == '\0' || s[1] != '\0')
4737 as_bad (_("bad symbol suffix"));
4738
4739 *s = ']';
4740 }
4741
4742 return name;
4743}
4744
4745/* Set the class of a symbol based on the suffix, if any. This is
4746 called whenever a new symbol is created. */
4747
4748void
4749ppc_symbol_new_hook (sym)
4750 symbolS *sym;
4751{
809ffe0d 4752 struct ppc_tc_sy *tc;
252b5132
RH		 4753 const char *s;
4754
809ffe0d
ILT		 4755 tc = symbol_get_tc (sym);
4756 tc->next = NULL;
4757 tc->output = 0;
4758 tc->class = -1;
4759 tc->real_name = NULL;
4760 tc->subseg = 0;
4761 tc->align = 0;
4762 tc->size = NULL;
4763 tc->within = NULL;
252b5132
RH		 4764
4765 if (ppc_stab_symbol)
4766 return;
4767
4768 s = strchr (S_GET_NAME (sym), '[');
4769 if (s == (const char *) NULL)
4770 {
4771 /* There is no suffix. */
4772 return;
4773 }
4774
4775 ++s;
4776
4777 switch (s[0])
4778 {
4779 case 'B':
4780 if (strcmp (s, "BS]") == 0)
809ffe0d 4781 tc->class = XMC_BS;
252b5132
RH		 4782 break;
4783 case 'D':
4784 if (strcmp (s, "DB]") == 0)
809ffe0d 4785 tc->class = XMC_DB;
252b5132 4786 else if (strcmp (s, "DS]") == 0)
809ffe0d 4787 tc->class = XMC_DS;
252b5132
RH		 4788 break;
4789 case 'G':
4790 if (strcmp (s, "GL]") == 0)
809ffe0d 4791 tc->class = XMC_GL;
252b5132
RH		 4792 break;
4793 case 'P':
4794 if (strcmp (s, "PR]") == 0)
809ffe0d 4795 tc->class = XMC_PR;
252b5132
RH		 4796 break;
4797 case 'R':
4798 if (strcmp (s, "RO]") == 0)
809ffe0d 4799 tc->class = XMC_RO;
252b5132 4800 else if (strcmp (s, "RW]") == 0)
809ffe0d 4801 tc->class = XMC_RW;
252b5132
RH		 4802 break;
4803 case 'S':
4804 if (strcmp (s, "SV]") == 0)
809ffe0d 4805 tc->class = XMC_SV;
252b5132
RH		 4806 break;
4807 case 'T':
4808 if (strcmp (s, "TC]") == 0)
809ffe0d 4809 tc->class = XMC_TC;
252b5132 4810 else if (strcmp (s, "TI]") == 0)
809ffe0d 4811 tc->class = XMC_TI;
252b5132 4812 else if (strcmp (s, "TB]") == 0)
809ffe0d 4813 tc->class = XMC_TB;
252b5132 4814 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4815 tc->class = XMC_TC0;
252b5132
RH		 4816 break;
4817 case 'U':
4818 if (strcmp (s, "UA]") == 0)
809ffe0d 4819 tc->class = XMC_UA;
252b5132 4820 else if (strcmp (s, "UC]") == 0)
809ffe0d 4821 tc->class = XMC_UC;
252b5132
RH		 4822 break;
4823 case 'X':
4824 if (strcmp (s, "XO]") == 0)
809ffe0d 4825 tc->class = XMC_XO;
252b5132
RH		 4826 break;
4827 }
4828
809ffe0d 4829 if (tc->class == -1)
252b5132
RH		 4830 as_bad (_("Unrecognized symbol suffix"));
4831}
4832
4833/* Set the class of a label based on where it is defined. This
4834 handles symbols without suffixes. Also, move the symbol so that it
4835 follows the csect symbol. */
4836
4837void
4838ppc_frob_label (sym)
4839 symbolS *sym;
4840{
4841 if (ppc_current_csect != (symbolS *) NULL)
4842 {
809ffe0d
ILT		 4843 if (symbol_get_tc (sym)->class == -1)
4844 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4845
4846 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4847 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4848 &symbol_rootP, &symbol_lastP);
4849 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4850 }
07a53e5c
RH		 4851
4852#ifdef OBJ_ELF
4853 dwarf2_emit_label (sym);
4854#endif
252b5132
RH		 4855}
4856
4857/* This variable is set by ppc_frob_symbol if any absolute symbols are
4858 seen. It tells ppc_adjust_symtab whether it needs to look through
4859 the symbols. */
4860
b34976b6 4861static bfd_boolean ppc_saw_abs;
252b5132
RH		 4862
4863/* Change the name of a symbol just before writing it out. Set the
4864 real name if the .rename pseudo-op was used. Otherwise, remove any
4865 class suffix. Return 1 if the symbol should not be included in the
4866 symbol table. */
4867
4868int
4869ppc_frob_symbol (sym)
4870 symbolS *sym;
4871{
4872 static symbolS *ppc_last_function;
4873 static symbolS *set_end;
4874
4875 /* Discard symbols that should not be included in the output symbol
4876 table. */
809ffe0d
ILT		 4877 if (! symbol_used_in_reloc_p (sym)
4878 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4879 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4880 && ! symbol_get_tc (sym)->output
252b5132
RH		 4881 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4882 return 1;
4883
a161fe53
AM		 4884 /* This one will disappear anyway. Don't make a csect sym for it. */
4885 if (sym == abs_section_sym)
4886 return 1;
4887
809ffe0d
ILT		 4888 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4889 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4890 else
4891 {
4892 const char *name;
4893 const char *s;
4894
4895 name = S_GET_NAME (sym);
4896 s = strchr (name, '[');
4897 if (s != (char *) NULL)
4898 {
4899 unsigned int len;
4900 char *snew;
4901
4902 len = s - name;
4903 snew = xmalloc (len + 1);
4904 memcpy (snew, name, len);
4905 snew[len] = '\0';
4906
4907 S_SET_NAME (sym, snew);
4908 }
4909 }
4910
4911 if (set_end != (symbolS *) NULL)
4912 {
4913 SA_SET_SYM_ENDNDX (set_end, sym);
4914 set_end = NULL;
4915 }
4916
4917 if (SF_GET_FUNCTION (sym))
4918 {
4919 if (ppc_last_function != (symbolS *) NULL)
4920 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4921 ppc_last_function = sym;
809ffe0d 4922 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4923 {
6386f3a7 4924 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4925 SA_SET_SYM_FSIZE (sym,
4926 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4927 }
4928 }
4929 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4930 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4931 {
4932 if (ppc_last_function == (symbolS *) NULL)
4933 as_bad (_(".ef with no preceding .function"));
4934 else
4935 {
4936 set_end = ppc_last_function;
4937 ppc_last_function = NULL;
4938
4939 /* We don't have a C_EFCN symbol, but we need to force the
4940 COFF backend to believe that it has seen one. */
4941 coff_last_function = NULL;
4942 }
4943 }
4944
670ec21d 4945 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4946 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4947 && S_GET_STORAGE_CLASS (sym) != C_FILE
4948 && S_GET_STORAGE_CLASS (sym) != C_FCN
4949 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4950 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4951 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4952 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4953 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4954 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4955 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4956
4957 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4958 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4959 {
4960 int i;
4961 union internal_auxent *a;
4962
4963 /* Create a csect aux. */
4964 i = S_GET_NUMBER_AUXILIARY (sym);
4965 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4966 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4967 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4968 {
4969 /* This is the TOC table. */
4970 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4971 a->x_csect.x_scnlen.l = 0;
4972 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4973 }
809ffe0d 4974 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4975 {
4976 /* This is a csect symbol. x_scnlen is the size of the
4977 csect. */
809ffe0d 4978 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4979 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4980 S_GET_SEGMENT (sym))
4981 - S_GET_VALUE (sym));
4982 else
4983 {
6386f3a7 4984 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4985 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4986 - S_GET_VALUE (sym));
4987 }
809ffe0d 4988 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4989 }
4990 else if (S_GET_SEGMENT (sym) == bss_section)
4991 {
4992 /* This is a common symbol. */
809ffe0d
ILT		 4993 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4994 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4995 if (S_IS_EXTERNAL (sym))
809ffe0d 4996 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4997 else
809ffe0d 4998 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4999 }
5000 else if (S_GET_SEGMENT (sym) == absolute_section)
5001 {
5002 /* This is an absolute symbol. The csect will be created by
99a814a1 5003 ppc_adjust_symtab. */
b34976b6 5004 ppc_saw_abs = TRUE;
252b5132 5005 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5006 if (symbol_get_tc (sym)->class == -1)
5007 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5008 }
5009 else if (! S_IS_DEFINED (sym))
5010 {
5011 /* This is an external symbol. */
5012 a->x_csect.x_scnlen.l = 0;
5013 a->x_csect.x_smtyp = XTY_ER;
5014 }
809ffe0d 5015 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5016 {
5017 symbolS *next;
5018
5019 /* This is a TOC definition. x_scnlen is the size of the
5020 TOC entry. */
5021 next = symbol_next (sym);
809ffe0d 5022 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5023 next = symbol_next (next);
5024 if (next == (symbolS *) NULL
809ffe0d 5025 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5026 {
5027 if (ppc_after_toc_frag == (fragS *) NULL)
5028 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5029 data_section)
5030 - S_GET_VALUE (sym));
5031 else
5032 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5033 - S_GET_VALUE (sym));
5034 }
5035 else
5036 {
6386f3a7 5037 resolve_symbol_value (next);
252b5132
RH		 5038 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5039 - S_GET_VALUE (sym));
5040 }
5041 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5042 }
5043 else
5044 {
5045 symbolS *csect;
5046
5047 /* This is a normal symbol definition. x_scnlen is the
5048 symbol index of the containing csect. */
5049 if (S_GET_SEGMENT (sym) == text_section)
5050 csect = ppc_text_csects;
5051 else if (S_GET_SEGMENT (sym) == data_section)
5052 csect = ppc_data_csects;
5053 else
5054 abort ();
5055
5056 /* Skip the initial dummy symbol. */
809ffe0d 5057 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5058
5059 if (csect == (symbolS *) NULL)
5060 {
5061 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5062 a->x_csect.x_scnlen.l = 0;
5063 }
5064 else
5065 {
809ffe0d 5066 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5067 {
6386f3a7 5068 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5069 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5070 > S_GET_VALUE (sym))
252b5132 5071 break;
809ffe0d 5072 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5073 }
5074
809ffe0d
ILT		 5075 a->x_csect.x_scnlen.p =
5076 coffsymbol (symbol_get_bfdsym (csect))->native;
5077 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5078 1;
252b5132
RH		 5079 }
5080 a->x_csect.x_smtyp = XTY_LD;
5081 }
81d4177b 5082
252b5132
RH		 5083 a->x_csect.x_parmhash = 0;
5084 a->x_csect.x_snhash = 0;
809ffe0d 5085 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5086 a->x_csect.x_smclas = XMC_PR;
5087 else
809ffe0d 5088 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5089 a->x_csect.x_stab = 0;
5090 a->x_csect.x_snstab = 0;
5091
5092 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5093 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5094 }
5095 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5096 {
5097 /* We want the value to be the symbol index of the referenced
5098 csect symbol. BFD will do that for us if we set the right
5099 flags. */
b782de16
AM		 5100 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5101 combined_entry_type *c = coffsymbol (bsym)->native;
5102
5103 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5104 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5105 }
5106 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5107 {
5108 symbolS *block;
5109 symbolS *csect;
5110
5111 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5112 block = symbol_get_tc (sym)->within;
5113 csect = symbol_get_tc (block)->within;
6386f3a7 5114 resolve_symbol_value (csect);
252b5132
RH		 5115 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5116 }
5117 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5118 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5119 {
5120 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5121 BFD will do that for us if we set the right flags. We have
5122 already set the value correctly. */
809ffe0d 5123 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5124 }
5125
5126 return 0;
5127}
5128
5129/* Adjust the symbol table. This creates csect symbols for all
5130 absolute symbols. */
5131
5132void
5133ppc_adjust_symtab ()
5134{
5135 symbolS *sym;
5136
5137 if (! ppc_saw_abs)
5138 return;
5139
5140 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5141 {
5142 symbolS *csect;
5143 int i;
5144 union internal_auxent *a;
5145
5146 if (S_GET_SEGMENT (sym) != absolute_section)
5147 continue;
5148
5149 csect = symbol_create (".abs[XO]", absolute_section,
5150 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5151 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5152 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5153 i = S_GET_NUMBER_AUXILIARY (csect);
5154 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5155 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5156 a->x_csect.x_scnlen.l = 0;
5157 a->x_csect.x_smtyp = XTY_SD;
5158 a->x_csect.x_parmhash = 0;
5159 a->x_csect.x_snhash = 0;
5160 a->x_csect.x_smclas = XMC_XO;
5161 a->x_csect.x_stab = 0;
5162 a->x_csect.x_snstab = 0;
5163
5164 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5165
5166 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5167 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5168 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5169 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5170 }
5171
b34976b6 5172 ppc_saw_abs = FALSE;
252b5132
RH		 5173}
5174
5175/* Set the VMA for a section. This is called on all the sections in
5176 turn. */
5177
5178void
5179ppc_frob_section (sec)
5180 asection *sec;
5181{
931e13a6 5182 static bfd_vma vma = 0;
252b5132 5183
931e13a6 5184 vma = md_section_align (sec, vma);
252b5132
RH		 5185 bfd_set_section_vma (stdoutput, sec, vma);
5186 vma += bfd_section_size (stdoutput, sec);
5187}
5188
5189#endif /* OBJ_XCOFF */
5190\f
5191/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5192 of type TYPE, and store the appropriate bytes in *LITP. The number
5193 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5194 returned, or NULL on OK. */
5195
5196char *
5197md_atof (type, litp, sizep)
5198 int type;
5199 char *litp;
5200 int *sizep;
5201{
5202 int prec;
5203 LITTLENUM_TYPE words[4];
5204 char *t;
5205 int i;
5206
5207 switch (type)
5208 {
5209 case 'f':
5210 prec = 2;
5211 break;
5212
5213 case 'd':
5214 prec = 4;
5215 break;
5216
5217 default:
5218 *sizep = 0;
5219 return _("bad call to md_atof");
5220 }
5221
5222 t = atof_ieee (input_line_pointer, type, words);
5223 if (t)
5224 input_line_pointer = t;
5225
5226 *sizep = prec * 2;
5227
5228 if (target_big_endian)
5229 {
5230 for (i = 0; i < prec; i++)
5231 {
5232 md_number_to_chars (litp, (valueT) words[i], 2);
5233 litp += 2;
5234 }
5235 }
5236 else
5237 {
5238 for (i = prec - 1; i >= 0; i--)
5239 {
5240 md_number_to_chars (litp, (valueT) words[i], 2);
5241 litp += 2;
5242 }
5243 }
81d4177b 5244
252b5132
RH		 5245 return NULL;
5246}
5247
5248/* Write a value out to the object file, using the appropriate
5249 endianness. */
5250
5251void
5252md_number_to_chars (buf, val, n)
5253 char *buf;
5254 valueT val;
5255 int n;
5256{
5257 if (target_big_endian)
5258 number_to_chars_bigendian (buf, val, n);
5259 else
5260 number_to_chars_littleendian (buf, val, n);
5261}
5262
5263/* Align a section (I don't know why this is machine dependent). */
5264
5265valueT
3aeeedbb 5266md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5267{
3aeeedbb
AM		 5268#ifdef OBJ_ELF
5269 return addr;
5270#else
252b5132
RH		 5271 int align = bfd_get_section_alignment (stdoutput, seg);
5272
5273 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5274#endif
252b5132
RH		 5275}
5276
5277/* We don't have any form of relaxing. */
5278
5279int
5280md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5281 fragS *fragp ATTRIBUTE_UNUSED;
5282 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5283{
5284 abort ();
5285 return 0;
5286}
5287
5288/* Convert a machine dependent frag. We never generate these. */
5289
5290void
5291md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5292 bfd *abfd ATTRIBUTE_UNUSED;
5293 asection *sec ATTRIBUTE_UNUSED;
5294 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5295{
5296 abort ();
5297}
5298
5299/* We have no need to default values of symbols. */
5300
252b5132
RH		 5301symbolS *
5302md_undefined_symbol (name)
92161534 5303 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5304{
5305 return 0;
5306}
5307\f
5308/* Functions concerning relocs. */
5309
5310/* The location from which a PC relative jump should be calculated,
5311 given a PC relative reloc. */
5312
5313long
5314md_pcrel_from_section (fixp, sec)
5315 fixS *fixp;
92161534 5316 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5317{
5318 return fixp->fx_frag->fr_address + fixp->fx_where;
5319}
5320
5321#ifdef OBJ_XCOFF
5322
5323/* This is called to see whether a fixup should be adjusted to use a
5324 section symbol. We take the opportunity to change a fixup against
5325 a symbol in the TOC subsegment into a reloc against the
5326 corresponding .tc symbol. */
5327
5328int
5329ppc_fix_adjustable (fix)
5330 fixS *fix;
5331{
b782de16
AM		 5332 valueT val = resolve_symbol_value (fix->fx_addsy);
5333 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5334 TC_SYMFIELD_TYPE *tc;
5335
5336 if (symseg == absolute_section)
5337 return 0;
252b5132 5338
252b5132 5339 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5340 && fix->fx_addsy != ppc_toc_csect
b782de16 5341 && symseg == data_section
252b5132
RH		 5342 && val >= ppc_toc_frag->fr_address
5343 && (ppc_after_toc_frag == (fragS *) NULL
5344 || val < ppc_after_toc_frag->fr_address))
5345 {
5346 symbolS *sy;
5347
5348 for (sy = symbol_next (ppc_toc_csect);
5349 sy != (symbolS *) NULL;
5350 sy = symbol_next (sy))
5351 {
b782de16
AM		 5352 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5353
5354 if (sy_tc->class == XMC_TC0)
252b5132 5355 continue;
b782de16 5356 if (sy_tc->class != XMC_TC)
252b5132 5357 break;
b782de16 5358 if (val == resolve_symbol_value (sy))
252b5132
RH		 5359 {
5360 fix->fx_addsy = sy;
5361 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5362 return 0;
5363 }
5364 }
5365
5366 as_bad_where (fix->fx_file, fix->fx_line,
5367 _("symbol in .toc does not match any .tc"));
5368 }
5369
5370 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5371 tc = symbol_get_tc (fix->fx_addsy);
5372 if (tc->subseg == 0
5373 && tc->class != XMC_TC0
5374 && tc->class != XMC_TC
5375 && symseg != bss_section
252b5132 5376 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5377 && (symseg != data_section
252b5132
RH		 5378 || ppc_toc_csect == NULL
5379 || val < ppc_toc_frag->fr_address
5380 || (ppc_after_toc_frag != NULL
5381 && val >= ppc_after_toc_frag->fr_address)))
5382 {
5383 symbolS *csect;
b782de16 5384 symbolS *next_csect;
252b5132 5385
b782de16 5386 if (symseg == text_section)
252b5132 5387 csect = ppc_text_csects;
b782de16 5388 else if (symseg == data_section)
252b5132
RH		 5389 csect = ppc_data_csects;
5390 else
5391 abort ();
5392
5393 /* Skip the initial dummy symbol. */
809ffe0d 5394 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5395
5396 if (csect != (symbolS *) NULL)
5397 {
b782de16
AM		 5398 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5399 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5400 {
5401 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5402 have to look through the full symbol table to see
5403 whether this is the csect we want. Note that we will
5404 only get here if the csect has zero length. */
b782de16
AM		 5405 if (symbol_get_frag (csect)->fr_address == val
5406 && S_GET_VALUE (csect) == val)
252b5132
RH		 5407 {
5408 symbolS *scan;
5409
809ffe0d 5410 for (scan = symbol_next (csect);
252b5132 5411 scan != NULL;
809ffe0d 5412 scan = symbol_next (scan))
252b5132 5413 {
809ffe0d 5414 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5415 break;
5416 if (scan == fix->fx_addsy)
5417 break;
5418 }
5419
5420 /* If we found the symbol before the next csect
99a814a1 5421 symbol, then this is the csect we want. */
252b5132
RH		 5422 if (scan == fix->fx_addsy)
5423 break;
5424 }
5425
b782de16 5426 csect = next_csect;
252b5132
RH		 5427 }
5428
b782de16 5429 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5430 fix->fx_addsy = csect;
5431 }
b782de16 5432 return 0;
252b5132
RH		 5433 }
5434
5435 /* Adjust a reloc against a .lcomm symbol to be against the base
5436 .lcomm. */
b782de16 5437 if (symseg == bss_section
252b5132
RH		 5438 && ! S_IS_EXTERNAL (fix->fx_addsy))
5439 {
b782de16
AM		 5440 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5441
5442 fix->fx_offset += val - resolve_symbol_value (sy);
5443 fix->fx_addsy = sy;
252b5132
RH		 5444 }
5445
5446 return 0;
5447}
5448
5449/* A reloc from one csect to another must be kept. The assembler
5450 will, of course, keep relocs between sections, and it will keep
5451 absolute relocs, but we need to force it to keep PC relative relocs
5452 between two csects in the same section. */
5453
5454int
5455ppc_force_relocation (fix)
5456 fixS *fix;
5457{
5458 /* At this point fix->fx_addsy should already have been converted to
5459 a csect symbol. If the csect does not include the fragment, then
5460 we need to force the relocation. */
5461 if (fix->fx_pcrel
5462 && fix->fx_addsy != NULL
809ffe0d
ILT		 5463 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5464 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5465 > fix->fx_frag->fr_address)
5466 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5467 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5468 <= fix->fx_frag->fr_address))))
5469 return 1;
5470
ae6063d4 5471 return generic_force_reloc (fix);
252b5132
RH		 5472}
5473
5474#endif /* OBJ_XCOFF */
5475
0baf16f2 5476#ifdef OBJ_ELF
a161fe53
AM		 5477/* If this function returns non-zero, it guarantees that a relocation
5478 will be emitted for a fixup. */
5479
5480int
5481ppc_force_relocation (fix)
5482 fixS *fix;
5483{
5484 /* Branch prediction relocations must force a relocation, as must
5485 the vtable description relocs. */
5486 switch (fix->fx_r_type)
5487 {
5488 case BFD_RELOC_PPC_B16_BRTAKEN:
5489 case BFD_RELOC_PPC_B16_BRNTAKEN:
5490 case BFD_RELOC_PPC_BA16_BRTAKEN:
5491 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5492 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5493 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5494 return 1;
5495 default:
5496 break;
5497 }
5498
cdba85ec
AM		 5499 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5500 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5501 return 1;
5502
ae6063d4 5503 return generic_force_reloc (fix);
a161fe53
AM		 5504}
5505
0baf16f2
AM		 5506int
5507ppc_fix_adjustable (fix)
5508 fixS *fix;
252b5132 5509{
0baf16f2
AM		 5510 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5511 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5512 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5513 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5514 && fix->fx_r_type != BFD_RELOC_GPREL16
5515 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5516 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5517 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5518 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5519}
0baf16f2 5520#endif
252b5132 5521
3aeeedbb
AM		 5522/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5523 rs_align_code frag. */
5524
5525void
5526ppc_handle_align (struct frag *fragP)
5527{
5528 valueT count = (fragP->fr_next->fr_address
5529 - (fragP->fr_address + fragP->fr_fix));
5530
5531 if (count != 0 && (count & 3) == 0)
5532 {
5533 char *dest = fragP->fr_literal + fragP->fr_fix;
5534
5535 fragP->fr_var = 4;
5536 md_number_to_chars (dest, 0x60000000, 4);
5537
5538 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5539 {
5540 /* For power6, we want the last nop to be a group terminating
5541 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5542 immediately after this one, with its address set to the last
5543 nop location. This will automatically reduce the number of
5544 nops in the current frag by one. */
5545 if (count > 4)
5546 {
5547 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5548
5549 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5550 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5551 group_nop->fr_fix = 0;
5552 group_nop->fr_offset = 1;
5553 group_nop->fr_type = rs_fill;
5554 fragP->fr_next = group_nop;
5555 dest = group_nop->fr_literal;
5556 }
5557
5558 md_number_to_chars (dest, 0x60210000, 4);
5559 }
5560 }
5561}
5562
252b5132
RH		 5563/* Apply a fixup to the object code. This is called for all the
5564 fixups we generated by the call to fix_new_exp, above. In the call
5565 above we used a reloc code which was the largest legal reloc code
5566 plus the operand index. Here we undo that to recover the operand
5567 index. At this point all symbol values should be fully resolved,
5568 and we attempt to completely resolve the reloc. If we can not do
5569 that, we determine the correct reloc code and put it back in the
5570 fixup. */
5571
94f592af 5572void
55cf6793 5573md_apply_fix (fixP, valP, seg)
94f592af
NC		 5574 fixS *fixP;
5575 valueT * valP;
0baf16f2 5576 segT seg ATTRIBUTE_UNUSED;
252b5132 5577{
94f592af 5578 valueT value = * valP;
252b5132
RH		 5579
5580#ifdef OBJ_ELF
94f592af 5581 if (fixP->fx_addsy != NULL)
252b5132 5582 {
a161fe53 5583 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5584 if (fixP->fx_pcrel)
5585 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5586 }
5587 else
94f592af 5588 fixP->fx_done = 1;
252b5132 5589#else
a161fe53 5590 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5591 the symbol values. If we are doing this relocation the code in
5592 write.c is going to call bfd_install_relocation, which is also
5593 going to use the symbol value. That means that if the reloc is
5594 fully resolved we want to use *valP since bfd_install_relocation is
5595 not being used.
252b5132 5596 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5597 *valP, and must use fx_offset instead. However, if the reloc
5598 is PC relative, we do want to use *valP since it includes the
252b5132 5599 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5600 if (fixP->fx_addsy == (symbolS *) NULL)
5601 fixP->fx_done = 1;
5602
5603 else if (fixP->fx_pcrel)
5604 ;
5605
252b5132 5606 else
a161fe53
AM		 5607 value = fixP->fx_offset;
5608#endif
5609
5610 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5611 {
a161fe53
AM		 5612 /* We can't actually support subtracting a symbol. */
5613 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5614 }
252b5132 5615
94f592af 5616 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5617 {
5618 int opindex;
5619 const struct powerpc_operand *operand;
5620 char *where;
5621 unsigned long insn;
5622
94f592af 5623 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5624
5625 operand = &powerpc_operands[opindex];
5626
5627#ifdef OBJ_XCOFF
0baf16f2
AM		 5628 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5629 does not generate a reloc. It uses the offset of `sym' within its
5630 csect. Other usages, such as `.long sym', generate relocs. This
5631 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5632 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5633 && operand->bits == 16
5634 && operand->shift == 0
2b3c4602 5635 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5636 && fixP->fx_addsy != NULL
5637 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5638 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5639 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5640 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5641 {
94f592af
NC		 5642 value = fixP->fx_offset;
5643 fixP->fx_done = 1;
252b5132
RH		 5644 }
5645#endif
5646
5647 /* Fetch the instruction, insert the fully resolved operand
5648 value, and stuff the instruction back again. */
94f592af 5649 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5650 if (target_big_endian)
5651 insn = bfd_getb32 ((unsigned char *) where);
5652 else
5653 insn = bfd_getl32 ((unsigned char *) where);
5654 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5655 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5656 if (target_big_endian)
5657 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5658 else
5659 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5660
94f592af
NC		 5661 if (fixP->fx_done)
5662 /* Nothing else to do here. */
5663 return;
252b5132 5664
94f592af 5665 assert (fixP->fx_addsy != NULL);
0baf16f2 5666
252b5132
RH		 5667 /* Determine a BFD reloc value based on the operand information.
5668 We are only prepared to turn a few of the operands into
0baf16f2 5669 relocs. */
11b37b7b
AM		 5670 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5671 && operand->bits == 26
5672 && operand->shift == 0)
94f592af 5673 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5674 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5675 && operand->bits == 16
5676 && operand->shift == 0)
95210096
AM		 5677 {
5678 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5679#ifdef OBJ_XCOFF
5680 fixP->fx_size = 2;
5681 if (target_big_endian)
5682 fixP->fx_where += 2;
5683#endif
5684 }
11b37b7b
AM		 5685 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5686 && operand->bits == 26
5687 && operand->shift == 0)
94f592af 5688 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5689 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5690 && operand->bits == 16
5691 && operand->shift == 0)
95210096
AM		 5692 {
5693 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5694#ifdef OBJ_XCOFF
5695 fixP->fx_size = 2;
5696 if (target_big_endian)
5697 fixP->fx_where += 2;
5698#endif
5699 }
0baf16f2 5700#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5701 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5702 && operand->bits == 16
a7fc733f 5703 && operand->shift == 0)
11b37b7b 5704 {
a7fc733f
AM		 5705 if (ppc_is_toc_sym (fixP->fx_addsy))
5706 {
5707 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5708#ifdef OBJ_ELF
a7fc733f
AM		 5709 if (ppc_obj64
5710 && (operand->flags & PPC_OPERAND_DS) != 0)
5711 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5712#endif
5713 }
5714 else
5715 {
5716 fixP->fx_r_type = BFD_RELOC_16;
5717#ifdef OBJ_ELF
5718 if (ppc_obj64
5719 && (operand->flags & PPC_OPERAND_DS) != 0)
5720 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5721#endif
a7fc733f 5722 }
94f592af 5723 fixP->fx_size = 2;
11b37b7b 5724 if (target_big_endian)
94f592af 5725 fixP->fx_where += 2;
11b37b7b 5726 }
0baf16f2 5727#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5728 else
252b5132
RH		 5729 {
5730 char *sfile;
5731 unsigned int sline;
5732
5733 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5734 symbol. */
94f592af
NC		 5735 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5736 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5737 _("unresolved expression that must be resolved"));
5738 else
94f592af 5739 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5740 _("unsupported relocation against %s"),
94f592af
NC		 5741 S_GET_NAME (fixP->fx_addsy));
5742 fixP->fx_done = 1;
5743 return;
252b5132
RH		 5744 }
5745 }
5746 else
5747 {
5748#ifdef OBJ_ELF
94f592af 5749 ppc_elf_validate_fix (fixP, seg);
252b5132 5750#endif
94f592af 5751 switch (fixP->fx_r_type)
252b5132 5752 {
252b5132 5753 case BFD_RELOC_CTOR:
2b3c4602 5754 if (ppc_obj64)
9c7977b3
AM		 5755 goto ctor64;
5756 /* fall through */
5757
0baf16f2 5758 case BFD_RELOC_32:
94f592af
NC		 5759 if (fixP->fx_pcrel)
5760 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5761 /* fall through */
252b5132
RH		 5762
5763 case BFD_RELOC_RVA:
5764 case BFD_RELOC_32_PCREL:
252b5132 5765 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5766 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5767 value, 4);
5768 break;
5769
7f6d05e8 5770 case BFD_RELOC_64:
9c7977b3 5771 ctor64:
94f592af
NC		 5772 if (fixP->fx_pcrel)
5773 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5774 /* fall through */
0baf16f2 5775
7f6d05e8 5776 case BFD_RELOC_64_PCREL:
94f592af 5777 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5778 value, 8);
81d4177b 5779 break;
0baf16f2 5780
252b5132
RH		 5781 case BFD_RELOC_GPREL16:
5782 case BFD_RELOC_16_GOT_PCREL:
5783 case BFD_RELOC_16_GOTOFF:
5784 case BFD_RELOC_LO16_GOTOFF:
5785 case BFD_RELOC_HI16_GOTOFF:
5786 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5787 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5788 case BFD_RELOC_LO16_BASEREL:
5789 case BFD_RELOC_HI16_BASEREL:
5790 case BFD_RELOC_HI16_S_BASEREL:
5791 case BFD_RELOC_PPC_EMB_NADDR16:
5792 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5793 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5794 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5795 case BFD_RELOC_PPC_EMB_SDAI16:
5796 case BFD_RELOC_PPC_EMB_SDA2REL:
5797 case BFD_RELOC_PPC_EMB_SDA2I16:
5798 case BFD_RELOC_PPC_EMB_RELSEC16:
5799 case BFD_RELOC_PPC_EMB_RELST_LO:
5800 case BFD_RELOC_PPC_EMB_RELST_HI:
5801 case BFD_RELOC_PPC_EMB_RELST_HA:
5802 case BFD_RELOC_PPC_EMB_RELSDA:
5803 case BFD_RELOC_PPC_TOC16:
0baf16f2 5804#ifdef OBJ_ELF
0baf16f2
AM		 5805 case BFD_RELOC_PPC64_TOC16_LO:
5806 case BFD_RELOC_PPC64_TOC16_HI:
5807 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5808#endif
94f592af 5809 if (fixP->fx_pcrel)
252b5132 5810 {
94f592af
NC		 5811 if (fixP->fx_addsy != NULL)
5812 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5813 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5814 bfd_get_reloc_code_name (fixP->fx_r_type),
5815 S_GET_NAME (fixP->fx_addsy));
252b5132 5816 else
94f592af 5817 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5818 _("cannot emit PC relative %s relocation"),
94f592af 5819 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5820 }
5821
94f592af 5822 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5823 value, 2);
5824 break;
5825
3c9d25f4
AM		 5826 case BFD_RELOC_16:
5827 if (fixP->fx_pcrel)
5828 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5829 /* fall through */
5830
5831 case BFD_RELOC_16_PCREL:
5832 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5833 value, 2);
5834 break;
5835
5836 case BFD_RELOC_LO16:
5837 if (fixP->fx_pcrel)
5838 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5839 /* fall through */
5840
5841 case BFD_RELOC_LO16_PCREL:
5842 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5843 value, 2);
5844 break;
5845
252b5132
RH		 5846 /* This case happens when you write, for example,
5847 lis %r3,(L1-L2)@ha
5848 where L1 and L2 are defined later. */
5849 case BFD_RELOC_HI16:
94f592af 5850 if (fixP->fx_pcrel)
3c9d25f4
AM		 5851 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5852 /* fall through */
5853
5854 case BFD_RELOC_HI16_PCREL:
94f592af 5855 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5856 PPC_HI (value), 2);
252b5132 5857 break;
0baf16f2 5858
252b5132 5859 case BFD_RELOC_HI16_S:
94f592af 5860 if (fixP->fx_pcrel)
3c9d25f4
AM		 5861 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5862 /* fall through */
5863
5864 case BFD_RELOC_HI16_S_PCREL:
94f592af 5865 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5866 PPC_HA (value), 2);
5867 break;
5868
5869#ifdef OBJ_ELF
0baf16f2 5870 case BFD_RELOC_PPC64_HIGHER:
94f592af 5871 if (fixP->fx_pcrel)
0baf16f2 5872 abort ();
94f592af 5873 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5874 PPC_HIGHER (value), 2);
252b5132
RH		 5875 break;
5876
0baf16f2 5877 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5878 if (fixP->fx_pcrel)
0baf16f2 5879 abort ();
94f592af 5880 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5881 PPC_HIGHERA (value), 2);
5882 break;
5883
5884 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5885 if (fixP->fx_pcrel)
0baf16f2 5886 abort ();
94f592af 5887 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5888 PPC_HIGHEST (value), 2);
5889 break;
5890
5891 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5892 if (fixP->fx_pcrel)
0baf16f2 5893 abort ();
94f592af 5894 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5895 PPC_HIGHESTA (value), 2);
5896 break;
5897
5898 case BFD_RELOC_PPC64_ADDR16_DS:
5899 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5900 case BFD_RELOC_PPC64_GOT16_DS:
5901 case BFD_RELOC_PPC64_GOT16_LO_DS:
5902 case BFD_RELOC_PPC64_PLT16_LO_DS:
5903 case BFD_RELOC_PPC64_SECTOFF_DS:
5904 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5905 case BFD_RELOC_PPC64_TOC16_DS:
5906 case BFD_RELOC_PPC64_TOC16_LO_DS:
5907 case BFD_RELOC_PPC64_PLTGOT16_DS:
5908 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5909 if (fixP->fx_pcrel)
0baf16f2
AM		 5910 abort ();
5911 {
2132e3a3 5912 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5913 unsigned long val, mask;
0baf16f2
AM		 5914
5915 if (target_big_endian)
adadcc0c 5916 val = bfd_getb32 (where - 2);
0baf16f2 5917 else
adadcc0c
AM		 5918 val = bfd_getl32 (where);
5919 mask = 0xfffc;
5920 /* lq insns reserve the four lsbs. */
5921 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5922 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5923 mask = 0xfff0;
5924 val |= value & mask;
0baf16f2
AM		 5925 if (target_big_endian)
5926 bfd_putb16 ((bfd_vma) val, where);
5927 else
5928 bfd_putl16 ((bfd_vma) val, where);
5929 }
5930 break;
cdba85ec 5931
ba0b2174
AM		 5932 case BFD_RELOC_PPC_B16_BRTAKEN:
5933 case BFD_RELOC_PPC_B16_BRNTAKEN:
5934 case BFD_RELOC_PPC_BA16_BRTAKEN:
5935 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5936 break;
5937
cdba85ec 5938 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5939 break;
5940
cdba85ec
AM		 5941 case BFD_RELOC_PPC_DTPMOD:
5942 case BFD_RELOC_PPC_TPREL16:
5943 case BFD_RELOC_PPC_TPREL16_LO:
5944 case BFD_RELOC_PPC_TPREL16_HI:
5945 case BFD_RELOC_PPC_TPREL16_HA:
5946 case BFD_RELOC_PPC_TPREL:
5947 case BFD_RELOC_PPC_DTPREL16:
5948 case BFD_RELOC_PPC_DTPREL16_LO:
5949 case BFD_RELOC_PPC_DTPREL16_HI:
5950 case BFD_RELOC_PPC_DTPREL16_HA:
5951 case BFD_RELOC_PPC_DTPREL:
5952 case BFD_RELOC_PPC_GOT_TLSGD16:
5953 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5954 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5955 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5956 case BFD_RELOC_PPC_GOT_TLSLD16:
5957 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5958 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5959 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5960 case BFD_RELOC_PPC_GOT_TPREL16:
5961 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5962 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5963 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5964 case BFD_RELOC_PPC_GOT_DTPREL16:
5965 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5966 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5967 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5968 case BFD_RELOC_PPC64_TPREL16_DS:
5969 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5970 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5971 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5972 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5973 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5974 case BFD_RELOC_PPC64_DTPREL16_DS:
5975 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5976 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5977 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5978 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5979 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5980 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5981 break;
0baf16f2 5982#endif
252b5132 5983 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5984 bytes, rather than 2, so offset it here appropriately. */
252b5132 5985 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5986 if (fixP->fx_pcrel)
252b5132
RH		 5987 abort ();
5988
94f592af 5989 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5990 + ((target_big_endian) ? 2 : 0),
5991 value, 2);
5992 break;
5993
5994 case BFD_RELOC_8:
94f592af 5995 if (fixP->fx_pcrel)
31a91399
NC		 5996 {
5997 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5998 ".byte <undefined_symbol> - ." */
31a91399
NC		 5999 if (fixP->fx_addsy)
6000 as_bad (_("Unable to handle reference to symbol %s"),
6001 S_GET_NAME (fixP->fx_addsy));
6002 else
6003 as_bad (_("Unable to resolve expression"));
6004 fixP->fx_done = 1;
6005 }
6006 else
6007 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6008 value, 1);
252b5132
RH		 6009 break;
6010
6011 case BFD_RELOC_24_PLT_PCREL:
6012 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6013 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6014 abort ();
6015
94f592af 6016 if (fixP->fx_done)
99a814a1
AM		 6017 {
6018 char *where;
6019 unsigned long insn;
6020
6021 /* Fetch the instruction, insert the fully resolved operand
6022 value, and stuff the instruction back again. */
94f592af 6023 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6024 if (target_big_endian)
6025 insn = bfd_getb32 ((unsigned char *) where);
6026 else
6027 insn = bfd_getl32 ((unsigned char *) where);
6028 if ((value & 3) != 0)
94f592af 6029 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6030 _("must branch to an address a multiple of 4"));
6031 if ((offsetT) value < -0x40000000
6032 || (offsetT) value >= 0x40000000)
94f592af 6033 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6034 _("@local or @plt branch destination is too far away, %ld bytes"),
6035 (long) value);
6036 insn = insn | (value & 0x03fffffc);
6037 if (target_big_endian)
6038 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6039 else
6040 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6041 }
252b5132
RH		 6042 break;
6043
6044 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6045 fixP->fx_done = 0;
6046 if (fixP->fx_addsy
6047 && !S_IS_DEFINED (fixP->fx_addsy)
6048 && !S_IS_WEAK (fixP->fx_addsy))
6049 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6050 break;
6051
6052 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6053 fixP->fx_done = 0;
252b5132
RH		 6054 break;
6055
0baf16f2 6056#ifdef OBJ_ELF
0baf16f2
AM		 6057 /* Generated by reference to `sym@tocbase'. The sym is
6058 ignored by the linker. */
6059 case BFD_RELOC_PPC64_TOC:
94f592af 6060 fixP->fx_done = 0;
0baf16f2 6061 break;
0baf16f2 6062#endif
252b5132 6063 default:
bc805888 6064 fprintf (stderr,
94f592af 6065 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6066 fflush (stderr);
252b5132
RH		 6067 abort ();
6068 }
6069 }
6070
6071#ifdef OBJ_ELF
94f592af 6072 fixP->fx_addnumber = value;
4e6935a6
AM		 6073
6074 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6075 from the section contents. If we are going to be emitting a reloc
6076 then the section contents are immaterial, so don't warn if they
6077 happen to overflow. Leave such warnings to ld. */
6078 if (!fixP->fx_done)
6079 fixP->fx_no_overflow = 1;
252b5132 6080#else
94f592af
NC		 6081 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6082 fixP->fx_addnumber = 0;
252b5132
RH		 6083 else
6084 {
6085#ifdef TE_PE
94f592af 6086 fixP->fx_addnumber = 0;
252b5132
RH		 6087#else
6088 /* We want to use the offset within the data segment of the
6089 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6090 fixP->fx_addnumber =
6091 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6092#endif
6093 }
6094#endif
252b5132
RH		 6095}
6096
6097/* Generate a reloc for a fixup. */
6098
6099arelent *
6100tc_gen_reloc (seg, fixp)
92161534 6101 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6102 fixS *fixp;
6103{
6104 arelent *reloc;
6105
6106 reloc = (arelent *) xmalloc (sizeof (arelent));
6107
49309057
ILT		 6108 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6109 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6110 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6111 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6112 if (reloc->howto == (reloc_howto_type *) NULL)
6113 {
6114 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6115 _("reloc %d not supported by object file format"),
6116 (int) fixp->fx_r_type);
252b5132
RH		 6117 return NULL;
6118 }
6119 reloc->addend = fixp->fx_addnumber;
6120
6121 return reloc;
6122}
75e21f08
JJ		 6123
6124void
6125ppc_cfi_frame_initial_instructions ()
6126{
6127 cfi_add_CFA_def_cfa (1, 0);
6128}
6129
6130int
1df69f4f 6131tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6132{
6133 unsigned int regnum = -1;
6134 unsigned int i;
6135 const char *p;
6136 char *q;
6137 static struct { char *name; int dw2regnum; } regnames[] =
6138 {
6139 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6140 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6141 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6142 { "spe_acc", 111 }, { "spefscr", 112 }
6143 };
6144
6145 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6146 if (strcmp (regnames[i].name, regname) == 0)
6147 return regnames[i].dw2regnum;
6148
6149 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6150 {
6151 p = regname + 1 + (regname[1] == '.');
6152 regnum = strtoul (p, &q, 10);
6153 if (p == q || *q || regnum >= 32)
6154 return -1;
6155 if (regname[0] == 'f')
b7d7dc63 6156 regnum += 32;
75e21f08 6157 else if (regname[0] == 'v')
b7d7dc63 6158 regnum += 77;
75e21f08
JJ		 6159 }
6160 else if (regname[0] == 'c' && regname[1] == 'r')
6161 {
6162 p = regname + 2 + (regname[2] == '.');
6163 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6164 return -1;
75e21f08
JJ		 6165 regnum = p[0] - '0' + 68;
6166 }
6167 return regnum;
6168}
GDB Binutils - Deliverables
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