projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
gas/
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
783de163 3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
81d4177b
KH		 361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
252b5132
RH		 392 { "f30", 30 },
393 { "f31", 31 },
81d4177b
KH		 394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
252b5132
RH		 400
401 { "fpscr", 0 },
402
c3d65c1c
BE		 403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
252b5132
RH		 421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 503
7a899fff 504 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
7a899fff
C		 528 { "v.30", 30 },
529 { "v.31", 31 },
81d4177b
KH		 530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
7a899fff
C		 536
537 { "v0", 0 },
81d4177b
KH		 538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
7a899fff
C		 561 { "v30", 30 },
562 { "v31", 31 },
81d4177b
KH		 563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
7a899fff 568 { "v9", 9 },
252b5132
RH		 569
570 { "xer", 1 },
571
572};
573
bc805888 574#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 575
576/* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
252b5132 579static int
98027b10 580reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 581{
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602}
603
604/*
99a814a1 605 * Summary of register_name.
252b5132
RH		 606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
b34976b6 616static bfd_boolean
98027b10 617register_name (expressionS *expressionP)
252b5132
RH		 618{
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
99a814a1 624 /* Find the spelling of the operand. */
252b5132 625 start = name = input_line_pointer;
3882b010 626 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 627 name = ++input_line_pointer;
628
3882b010 629 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 630 return FALSE;
252b5132
RH		 631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
468cced8
AM		 635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
99a814a1 638 /* Look to see if it's in the register table. */
81d4177b 639 if (reg_number >= 0)
252b5132
RH		 640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
81d4177b 643
99a814a1 644 /* Make the rest nice. */
252b5132
RH		 645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
b34976b6 647 return TRUE;
252b5132 648 }
468cced8
AM		 649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
b34976b6 652 return FALSE;
252b5132
RH		 653}
654\f
655/* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659/* Whether to do the special parsing. */
b34976b6 660static bfd_boolean cr_operand;
252b5132
RH		 661
662/* Names to recognize in a condition code. This table is sorted. */
663static const struct pd_reg cr_names[] =
664{
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678};
679
680/* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683int
98027b10 684ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
13abbae3
AM		 691 if (*name == '%')
692 ++name;
252b5132
RH		 693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702}
703\f
704/* Local variables. */
705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
fa452fa6 828 ppc_cpu_t altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
b0e34bfe 829
69c040df
AM		 830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 849 /* Do all PPC750s have paired single ops? */
850 else if (strcmp (arg, "750cl") == 0)
851 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
081ba1b3 852 else if (strcmp (arg, "403") == 0)
69c040df
AM		 853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
854 | PPC_OPCODE_403 | PPC_OPCODE_32);
081ba1b3
AM		 855 else if (strcmp (arg, "405") == 0)
856 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
857 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
c8187e15
PB		 858 else if (strcmp (arg, "440") == 0
859 || strcmp (arg, "464") == 0)
69c040df
AM		 860 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
861 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
862 else if (strcmp (arg, "7400") == 0
863 || strcmp (arg, "7410") == 0
864 || strcmp (arg, "7450") == 0
865 || strcmp (arg, "7455") == 0)
866 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
867 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 868 else if (strcmp (arg, "e300") == 0)
869 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
870 | PPC_OPCODE_E300);
69c040df
AM		 871 else if (strcmp (arg, "altivec") == 0)
872 {
873 if (ppc_cpu == 0)
b0e34bfe
NC		 874 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
875
876 altivec_or_spe |= PPC_OPCODE_ALTIVEC;
69c040df
AM		 877 }
878 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
879 {
880 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
881 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
882 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
19a6653c
AM		 883 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
884 }
885 else if (strcmp (arg, "e500mc") == 0)
886 {
887 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
888 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
889 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
69c040df
AM		 890 }
891 else if (strcmp (arg, "spe") == 0)
892 {
893 if (ppc_cpu == 0)
b0e34bfe
NC		 894 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
895
896 altivec_or_spe |= PPC_OPCODE_SPE;
69c040df
AM		 897 }
898 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
899 620. */
900 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
901 {
902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
903 }
904 else if (strcmp (arg, "ppc64bridge") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
908 }
909 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
910 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
911 {
912 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
913 }
914 /* -mbooke64 means enable 64-bit BookE support. */
915 else if (strcmp (arg, "booke64") == 0)
916 {
917 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
918 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
919 }
920 else if (strcmp (arg, "power4") == 0)
921 {
922 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
923 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
924 }
b0648eec
AM		 925 else if (strcmp (arg, "power5") == 0)
926 {
927 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
928 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
929 | PPC_OPCODE_POWER5);
930 }
9622b051
AM		 931 else if (strcmp (arg, "power6") == 0)
932 {
933 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
934 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209
PB		 935 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
936 | PPC_OPCODE_ALTIVEC);
9622b051 937 }
ede602d7
AM		 938 else if (strcmp (arg, "cell") == 0)
939 {
940 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
941 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209 942 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
ede602d7 943 }
69c040df
AM		 944 /* -mcom means assemble for the common intersection between Power
945 and PowerPC. At present, we just allow the union, rather
946 than the intersection. */
947 else if (strcmp (arg, "com") == 0)
948 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
949 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
950 else if (strcmp (arg, "any") == 0)
951 ppc_cpu |= PPC_OPCODE_ANY;
952 else
953 return 0;
954
b0e34bfe
NC		 955 /* Make sure the the Altivec and SPE bits are not lost. */
956 ppc_cpu |= altivec_or_spe;
69c040df
AM		 957 return 1;
958}
959
252b5132 960int
98027b10 961md_parse_option (int c, char *arg)
252b5132
RH		 962{
963 switch (c)
964 {
965 case 'u':
966 /* -u means that any undefined symbols should be treated as
967 external, which is the default for gas anyhow. */
968 break;
969
970#ifdef OBJ_ELF
971 case 'l':
972 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 973 sake, recognize -be also. */
252b5132
RH		 974 if (strcmp (arg, "e") == 0)
975 {
976 target_big_endian = 0;
977 set_target_endian = 1;
978 }
979 else
980 return 0;
981
982 break;
983
984 case 'b':
985 if (strcmp (arg, "e") == 0)
986 {
987 target_big_endian = 1;
988 set_target_endian = 1;
989 }
990 else
991 return 0;
992
993 break;
994
995 case 'K':
99a814a1 996 /* Recognize -K PIC. */
252b5132
RH		 997 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
998 {
999 shlib = SHLIB_PIC;
1000 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1001 }
1002 else
1003 return 0;
1004
1005 break;
1006#endif
1007
7f6d05e8
CP		 1008 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1009 case 'a':
1010 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1011 {
1012#ifdef BFD64
1013 ppc_obj64 = 1;
1014#else
1015 as_fatal (_("%s unsupported"), "-a64");
1016#endif
1017 }
7f6d05e8 1018 else if (strcmp (arg, "32") == 0)
2b3c4602 1019 ppc_obj64 = 0;
7f6d05e8
CP		 1020 else
1021 return 0;
1022 break;
81d4177b 1023
252b5132 1024 case 'm':
69c040df
AM		 1025 if (parse_cpu (arg))
1026 ;
252b5132
RH		 1027
1028 else if (strcmp (arg, "regnames") == 0)
b34976b6 1029 reg_names_p = TRUE;
252b5132
RH		 1030
1031 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1032 reg_names_p = FALSE;
252b5132
RH		 1033
1034#ifdef OBJ_ELF
99a814a1
AM		 1035 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1036 that require relocation. */
252b5132
RH		 1037 else if (strcmp (arg, "relocatable") == 0)
1038 {
5d6f4f16 1039 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1040 ppc_flags |= EF_PPC_RELOCATABLE;
1041 }
1042
1043 else if (strcmp (arg, "relocatable-lib") == 0)
1044 {
5d6f4f16 1045 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1046 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1047 }
1048
99a814a1 1049 /* -memb, set embedded bit. */
252b5132
RH		 1050 else if (strcmp (arg, "emb") == 0)
1051 ppc_flags |= EF_PPC_EMB;
1052
99a814a1
AM		 1053 /* -mlittle/-mbig set the endianess. */
1054 else if (strcmp (arg, "little") == 0
1055 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1056 {
1057 target_big_endian = 0;
1058 set_target_endian = 1;
1059 }
1060
1061 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1062 {
1063 target_big_endian = 1;
1064 set_target_endian = 1;
1065 }
1066
1067 else if (strcmp (arg, "solaris") == 0)
1068 {
b34976b6 1069 msolaris = TRUE;
252b5132
RH		 1070 ppc_comment_chars = ppc_solaris_comment_chars;
1071 }
1072
1073 else if (strcmp (arg, "no-solaris") == 0)
1074 {
b34976b6 1075 msolaris = FALSE;
252b5132
RH		 1076 ppc_comment_chars = ppc_eabi_comment_chars;
1077 }
1078#endif
1079 else
1080 {
1081 as_bad (_("invalid switch -m%s"), arg);
1082 return 0;
1083 }
1084 break;
1085
1086#ifdef OBJ_ELF
1087 /* -V: SVR4 argument to print version ID. */
1088 case 'V':
1089 print_version_id ();
1090 break;
1091
1092 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1093 should be emitted or not. FIXME: Not implemented. */
1094 case 'Q':
1095 break;
1096
1097 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1098 rather than .stabs.excl, which is ignored by the linker.
1099 FIXME: Not implemented. */
1100 case 's':
1101 if (arg)
1102 return 0;
1103
1104 break;
1105#endif
1106
1107 default:
1108 return 0;
1109 }
1110
1111 return 1;
1112}
1113
1114void
98027b10 1115md_show_usage (FILE *stream)
252b5132 1116{
bc805888 1117 fprintf (stream, _("\
252b5132 1118PowerPC options:\n\
df12615d
AM		 1119-a32 generate ELF32/XCOFF32\n\
1120-a64 generate ELF64/XCOFF64\n\
252b5132 1121-u ignored\n\
23e1d84c
AM		 1122-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1123-mpwr generate code for POWER (RIOS1)\n\
1124-m601 generate code for PowerPC 601\n\
418c1742 1125-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1126 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1127-m403 generate code for PowerPC 403\n\
1128-m405 generate code for PowerPC 405\n\
3d8aea2f 1129-m440 generate code for PowerPC 440\n\
c8187e15 1130-m464 generate code for PowerPC 464\n\
f5c120c5 1131-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1132 generate code for PowerPC 7400/7410/7450/7455\n\
1133-m750cl generate code for PowerPC 750cl\n"));
df12615d 1134 fprintf (stream, _("\
23e1d84c 1135-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1136-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1137-mbooke64 generate code for 64-bit PowerPC BookE\n\
1138-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1139-mpower4 generate code for Power4 architecture\n\
b0648eec 1140-mpower5 generate code for Power5 architecture\n\
9622b051 1141-mpower6 generate code for Power6 architecture\n\
ede602d7 1142-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1143-mcom generate code Power/PowerPC common instructions\n\
df12615d 1144-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1145 fprintf (stream, _("\
df12615d 1146-maltivec generate code for AltiVec\n\
36ae0db3 1147-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1148-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1149-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1150-mspe generate code for Motorola SPE instructions\n\
1151-mregnames Allow symbolic names for registers\n\
1152-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1153#ifdef OBJ_ELF
bc805888 1154 fprintf (stream, _("\
252b5132
RH		 1155-mrelocatable support for GCC's -mrelocatble option\n\
1156-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1157-memb set PPC_EMB bit in ELF flags\n\
df12615d 1158-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1159 generate code for a little endian machine\n\
df12615d
AM		 1160-mbig, -mbig-endian, -b, -be\n\
1161 generate code for a big endian machine\n\
252b5132
RH		 1162-msolaris generate code for Solaris\n\
1163-mno-solaris do not generate code for Solaris\n\
1164-V print assembler version number\n\
1165-Qy, -Qn ignored\n"));
1166#endif
1167}
1168\f
1169/* Set ppc_cpu if it is not already set. */
1170
1171static void
98027b10 1172ppc_set_cpu (void)
252b5132
RH		 1173{
1174 const char *default_os = TARGET_OS;
1175 const char *default_cpu = TARGET_CPU;
1176
3c9030c1 1177 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1178 {
2a98c3a6 1179 if (ppc_obj64)
3c9030c1 1180 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1181 else if (strncmp (default_os, "aix", 3) == 0
1182 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1183 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1184 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1185 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1186 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1187 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1188 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1189 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1190 else
99a814a1
AM		 1191 as_fatal (_("Unknown default cpu = %s, os = %s"),
1192 default_cpu, default_os);
252b5132
RH		 1193 }
1194}
1195
9232bbb0
AM		 1196/* Figure out the BFD architecture to use. This function and ppc_mach
1197 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1198
1199enum bfd_architecture
98027b10 1200ppc_arch (void)
252b5132
RH		 1201{
1202 const char *default_cpu = TARGET_CPU;
1203 ppc_set_cpu ();
1204
1205 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1206 return bfd_arch_powerpc;
1207 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1208 return bfd_arch_rs6000;
1209 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1210 {
1211 if (strcmp (default_cpu, "rs6000") == 0)
1212 return bfd_arch_rs6000;
0baf16f2 1213 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1214 return bfd_arch_powerpc;
1215 }
1216
1217 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1218 return bfd_arch_unknown;
1219}
1220
7f6d05e8 1221unsigned long
98027b10 1222ppc_mach (void)
7f6d05e8 1223{
2a98c3a6
AM		 1224 if (ppc_obj64)
1225 return bfd_mach_ppc64;
1226 else if (ppc_arch () == bfd_arch_rs6000)
1227 return bfd_mach_rs6k;
1228 else
1229 return bfd_mach_ppc;
7f6d05e8
CP		 1230}
1231
81d4177b 1232extern char*
98027b10 1233ppc_target_format (void)
7f6d05e8
CP		 1234{
1235#ifdef OBJ_COFF
1236#ifdef TE_PE
99a814a1 1237 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1238#elif TE_POWERMAC
0baf16f2 1239 return "xcoff-powermac";
7f6d05e8 1240#else
eb1e0e80 1241# ifdef TE_AIX5
2b3c4602 1242 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1243# else
2b3c4602 1244 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1245# endif
7f6d05e8 1246#endif
7f6d05e8
CP		 1247#endif
1248#ifdef OBJ_ELF
9d8504b1
PB		 1249# ifdef TE_VXWORKS
1250 return "elf32-powerpc-vxworks";
1251# else
0baf16f2 1252 return (target_big_endian
2b3c4602
AM		 1253 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1254 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1255# endif
7f6d05e8
CP		 1256#endif
1257}
1258
69c040df
AM		 1259/* Insert opcodes and macros into hash tables. Called at startup and
1260 for .cpu pseudo. */
252b5132 1261
69c040df
AM		 1262static void
1263ppc_setup_opcodes (void)
252b5132 1264{
98027b10 1265 const struct powerpc_opcode *op;
252b5132
RH		 1266 const struct powerpc_opcode *op_end;
1267 const struct powerpc_macro *macro;
1268 const struct powerpc_macro *macro_end;
b84bf58a 1269 bfd_boolean bad_insn = FALSE;
252b5132 1270
69c040df
AM		 1271 if (ppc_hash != NULL)
1272 hash_die (ppc_hash);
1273 if (ppc_macro_hash != NULL)
1274 hash_die (ppc_macro_hash);
252b5132
RH		 1275
1276 /* Insert the opcodes into a hash table. */
1277 ppc_hash = hash_new ();
1278
c43a438d 1279 if (ENABLE_CHECKING)
b84bf58a 1280 {
c43a438d 1281 unsigned int i;
b84bf58a 1282
c43a438d
AM		 1283 /* Check operand masks. Code here and in the disassembler assumes
1284 all the 1's in the mask are contiguous. */
1285 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1286 {
c43a438d
AM		 1287 unsigned long mask = powerpc_operands[i].bitm;
1288 unsigned long right_bit;
1289 unsigned int j;
1290
1291 right_bit = mask & -mask;
1292 mask += right_bit;
1293 right_bit = mask & -mask;
1294 if (mask != right_bit)
1295 {
1296 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1297 bad_insn = TRUE;
1298 }
1299 for (j = i + 1; j < num_powerpc_operands; ++j)
1300 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1301 sizeof (powerpc_operands[0])) == 0)
1302 {
1303 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1304 j, i);
1305 bad_insn = TRUE;
1306 }
b84bf58a
AM		 1307 }
1308 }
1309
252b5132
RH		 1310 op_end = powerpc_opcodes + powerpc_num_opcodes;
1311 for (op = powerpc_opcodes; op < op_end; op++)
1312 {
c43a438d 1313 if (ENABLE_CHECKING)
b84bf58a 1314 {
c43a438d
AM		 1315 const unsigned char *o;
1316 unsigned long omask = op->mask;
8dbcd839 1317
d815f1a9 1318 if (op != powerpc_opcodes)
8dbcd839 1319 {
d815f1a9
AM		 1320 /* The major opcodes had better be sorted. Code in the
1321 disassembler assumes the insns are sorted according to
1322 major opcode. */
1323 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1324 {
1325 as_bad (_("major opcode is not sorted for %s"),
1326 op->name);
1327 bad_insn = TRUE;
1328 }
1329
1330 /* Warn if the table isn't more strictly ordered.
1331 Unfortunately it doesn't seem possible to order the
1332 table on much more than the major opcode, which makes
1333 it difficult to implement a binary search in the
1334 disassembler. The problem is that we have multiple
1335 ways to disassemble instructions, and we usually want
1336 to choose a more specific form (with more bits set in
1337 the opcode) than a more general form. eg. all of the
1338 following are equivalent:
1339 bne label # opcode = 0x40820000, mask = 0xff830003
1340 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1341 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1342
1343 There are also cases where the table needs to be out
1344 of order to disassemble the correct instruction for
1345 processor variants. eg. "lhae" booke64 insn must be
1346 found before "ld" ppc64 insn. */
1347 else if (0)
1348 {
1349 unsigned long t1 = op[0].opcode;
1350 unsigned long t2 = op[-1].opcode;
1351
1352 if (((t1 ^ t2) & 0xfc0007ff) == 0
1353 && (t1 & 0xfc0006df) == 0x7c000286)
1354 {
1355 /* spr field is split. */
1356 t1 = ((t1 & ~0x1ff800)
1357 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1358 t2 = ((t2 & ~0x1ff800)
1359 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1360 }
1361 if (t1 < t2)
1362 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1363 op[0].name, op[0].opcode, op[0].mask,
1364 op[-1].name, op[-1].opcode, op[-1].mask);
1365 }
8dbcd839 1366 }
c43a438d
AM		 1367
1368 /* The mask had better not trim off opcode bits. */
1369 if ((op->opcode & omask) != op->opcode)
1370 {
1371 as_bad (_("mask trims opcode bits for %s"),
1372 op->name);
1373 bad_insn = TRUE;
1374 }
1375
1376 /* The operands must not overlap the opcode or each other. */
1377 for (o = op->operands; *o; ++o)
1378 if (*o >= num_powerpc_operands)
1379 {
1380 as_bad (_("operand index error for %s"),
1381 op->name);
1382 bad_insn = TRUE;
1383 }
1384 else
b84bf58a 1385 {
c43a438d
AM		 1386 const struct powerpc_operand *operand = &powerpc_operands[*o];
1387 if (operand->shift >= 0)
b84bf58a 1388 {
c43a438d
AM		 1389 unsigned long mask = operand->bitm << operand->shift;
1390 if (omask & mask)
1391 {
1392 as_bad (_("operand %d overlap in %s"),
1393 (int) (o - op->operands), op->name);
1394 bad_insn = TRUE;
1395 }
1396 omask |= mask;
b84bf58a 1397 }
b84bf58a 1398 }
c43a438d 1399 }
252b5132 1400
2b3c4602 1401 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1402 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1403 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1404 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1405 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1406 /* Certain instructions (eg: extsw) do not exist in the
1407 32-bit BookE instruction set, but they do exist in the
1408 64-bit BookE instruction set, and other PPC instruction
1409 sets. Check to see if the opcode has the BOOKE64 flag set.
1410 If it does make sure that the target CPU is not the BookE32. */
1411 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1412 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1413 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1414 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1415 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1416 == (ppc_cpu & PPC_OPCODE_POWER4)))
1417 && ((op->flags & PPC_OPCODE_POWER5) == 0
1418 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1419 == (ppc_cpu & PPC_OPCODE_POWER5)))
1420 && ((op->flags & PPC_OPCODE_POWER6) == 0
1421 || ((op->flags & PPC_OPCODE_POWER6)
1422 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1423 {
1424 const char *retval;
1425
98027b10 1426 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1427 if (retval != NULL)
252b5132 1428 {
99a814a1 1429 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1430 if ((ppc_cpu & PPC_OPCODE_601) != 0
1431 && (op->flags & PPC_OPCODE_POWER) != 0)
1432 continue;
1433
b84bf58a 1434 as_bad (_("duplicate instruction %s"),
99a814a1 1435 op->name);
b84bf58a 1436 bad_insn = TRUE;
252b5132
RH		 1437 }
1438 }
1439 }
1440
3c9030c1
AM		 1441 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1442 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1443 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1444
252b5132
RH		 1445 /* Insert the macros into a hash table. */
1446 ppc_macro_hash = hash_new ();
1447
1448 macro_end = powerpc_macros + powerpc_num_macros;
1449 for (macro = powerpc_macros; macro < macro_end; macro++)
1450 {
1451 if ((macro->flags & ppc_cpu) != 0)
1452 {
1453 const char *retval;
1454
98027b10 1455 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1456 if (retval != (const char *) NULL)
1457 {
b84bf58a
AM		 1458 as_bad (_("duplicate macro %s"), macro->name);
1459 bad_insn = TRUE;
252b5132
RH		 1460 }
1461 }
1462 }
1463
b84bf58a 1464 if (bad_insn)
252b5132 1465 abort ();
69c040df
AM		 1466}
1467
1468/* This function is called when the assembler starts up. It is called
1469 after the options have been parsed and the output file has been
1470 opened. */
1471
1472void
98027b10 1473md_begin (void)
69c040df
AM		 1474{
1475 ppc_set_cpu ();
1476
1477 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1478
1479#ifdef OBJ_ELF
1480 /* Set the ELF flags if desired. */
1481 if (ppc_flags && !msolaris)
1482 bfd_set_private_flags (stdoutput, ppc_flags);
1483#endif
1484
1485 ppc_setup_opcodes ();
252b5132 1486
67c1ffbe 1487 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1488 by the user. */
252b5132
RH		 1489 if (!set_target_endian)
1490 {
1491 set_target_endian = 1;
1492 target_big_endian = PPC_BIG_ENDIAN;
1493 }
1494
1495#ifdef OBJ_XCOFF
1496 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1497
1498 /* Create dummy symbols to serve as initial csects. This forces the
1499 text csects to precede the data csects. These symbols will not
1500 be output. */
1501 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1502 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1503 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1504 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1505#endif
1506
1507#ifdef TE_PE
1508
1509 ppc_current_section = text_section;
81d4177b 1510 ppc_previous_section = 0;
252b5132
RH		 1511
1512#endif
1513}
1514
6a0c61b7 1515void
98027b10 1516ppc_cleanup (void)
6a0c61b7 1517{
dc1d03fc 1518#ifdef OBJ_ELF
6a0c61b7
EZ		 1519 if (ppc_apuinfo_list == NULL)
1520 return;
1521
1522 /* Ok, so write the section info out. We have this layout:
1523
1524 byte data what
1525 ---- ---- ----
1526 0 8 length of "APUinfo\0"
1527 4 (n*4) number of APU's (4 bytes each)
1528 8 2 note type 2
1529 12 "APUinfo\0" name
1530 20 APU#1 first APU's info
1531 24 APU#2 second APU's info
1532 ... ...
1533 */
1534 {
1535 char *p;
1536 asection *seg = now_seg;
1537 subsegT subseg = now_subseg;
1538 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1539 unsigned int i;
6a0c61b7
EZ		 1540
1541 /* Create the .PPC.EMB.apuinfo section. */
1542 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1543 bfd_set_section_flags (stdoutput,
1544 apuinfo_secp,
e1a9cb8e 1545 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1546
1547 p = frag_more (4);
1548 md_number_to_chars (p, (valueT) 8, 4);
1549
1550 p = frag_more (4);
e98d298c 1551 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1552
1553 p = frag_more (4);
1554 md_number_to_chars (p, (valueT) 2, 4);
1555
1556 p = frag_more (8);
1557 strcpy (p, "APUinfo");
1558
1559 for (i = 0; i < ppc_apuinfo_num; i++)
1560 {
b34976b6
AM		 1561 p = frag_more (4);
1562 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1563 }
1564
1565 frag_align (2, 0, 0);
1566
1567 /* We probably can't restore the current segment, for there likely
1568 isn't one yet... */
1569 if (seg && subseg)
1570 subseg_set (seg, subseg);
1571 }
dc1d03fc 1572#endif
6a0c61b7
EZ		 1573}
1574
252b5132
RH		 1575/* Insert an operand value into an instruction. */
1576
1577static unsigned long
a1867a27
AM		 1578ppc_insert_operand (unsigned long insn,
1579 const struct powerpc_operand *operand,
1580 offsetT val,
fa452fa6 1581 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1582 char *file,
1583 unsigned int line)
252b5132 1584{
b84bf58a 1585 long min, max, right;
eb42fac1 1586
b84bf58a
AM		 1587 max = operand->bitm;
1588 right = max & -max;
1589 min = 0;
1590
1591 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1592 {
b84bf58a 1593 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1594 max = (max >> 1) & -right;
1595 min = ~max & -right;
b84bf58a 1596 }
252b5132 1597
b84bf58a 1598 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1599 max++;
252b5132 1600
b84bf58a 1601 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1602 {
1603 long tmp = min;
1604 min = -max;
1605 max = -tmp;
1606 }
b84bf58a 1607
a1867a27
AM		 1608 if (min <= max)
1609 {
1610 /* Some people write constants with the sign extension done by
1611 hand but only up to 32 bits. This shouldn't really be valid,
1612 but, to permit this code to assemble on a 64-bit host, we
1613 sign extend the 32-bit value to 64 bits if so doing makes the
1614 value valid. */
1615 if (val > max
1616 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1617 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1618 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1619 val = val - 0x80000000 - 0x80000000;
1620
1621 /* Similarly, people write expressions like ~(1<<15), and expect
1622 this to be OK for a 32-bit unsigned value. */
1623 else if (val < min
1624 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1625 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1626 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1627 val = val + 0x80000000 + 0x80000000;
1628
1629 else if (val < min
1630 || val > max
1631 || (val & (right - 1)) != 0)
1632 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1633 }
b84bf58a 1634
252b5132
RH		 1635 if (operand->insert)
1636 {
1637 const char *errmsg;
1638
1639 errmsg = NULL;
2b3c4602 1640 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1641 if (errmsg != (const char *) NULL)
0baf16f2 1642 as_bad_where (file, line, errmsg);
252b5132
RH		 1643 }
1644 else
b84bf58a 1645 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1646
1647 return insn;
1648}
1649
1650\f
1651#ifdef OBJ_ELF
1652/* Parse @got, etc. and return the desired relocation. */
1653static bfd_reloc_code_real_type
98027b10 1654ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1655{
1656 struct map_bfd {
1657 char *string;
b7d7dc63
AM		 1658 unsigned int length : 8;
1659 unsigned int valid32 : 1;
1660 unsigned int valid64 : 1;
1661 unsigned int reloc;
252b5132
RH		 1662 };
1663
1664 char ident[20];
1665 char *str = *str_p;
1666 char *str2;
1667 int ch;
1668 int len;
15c1449b 1669 const struct map_bfd *ptr;
252b5132 1670
b7d7dc63
AM		 1671#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1672#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1673#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1674
15c1449b 1675 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1676 MAP ("l", BFD_RELOC_LO16),
1677 MAP ("h", BFD_RELOC_HI16),
1678 MAP ("ha", BFD_RELOC_HI16_S),
1679 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1680 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1681 MAP ("got", BFD_RELOC_16_GOTOFF),
1682 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1683 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1684 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1685 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1686 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1687 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1688 MAP ("copy", BFD_RELOC_PPC_COPY),
1689 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1690 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1691 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1692 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1693 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1694 MAP ("tls", BFD_RELOC_PPC_TLS),
1695 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1696 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1697 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1698 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1699 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1700 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1701 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1702 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1703 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1704 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1705 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1706 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1707 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1708 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1709 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1710 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1711 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1712 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1713 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1714 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1715 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1716 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1717 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1718 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1719 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1720 MAP32 ("fixup", BFD_RELOC_CTOR),
1721 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1722 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1723 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1724 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1725 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1726 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1727 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1728 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1729 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1730 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1731 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1732 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1733 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1734 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1735 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1736 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1737 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1738 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1739 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1740 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1741 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1742 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1743 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1744 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1745 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1746 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1747 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1748 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1749 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1750 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1751 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1752 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1753 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1754 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1755 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1756 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1757 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1758 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1759 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1760 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1761 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1762 };
1763
1764 if (*str++ != '@')
1765 return BFD_RELOC_UNUSED;
1766
1767 for (ch = *str, str2 = ident;
1768 (str2 < ident + sizeof (ident) - 1
3882b010 1769 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1770 ch = *++str)
1771 {
3882b010 1772 *str2++ = TOLOWER (ch);
252b5132
RH		 1773 }
1774
1775 *str2 = '\0';
1776 len = str2 - ident;
1777
1778 ch = ident[0];
1779 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1780 if (ch == ptr->string[0]
1781 && len == ptr->length
b7d7dc63
AM		 1782 && memcmp (ident, ptr->string, ptr->length) == 0
1783 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1784 {
15c1449b
AM		 1785 int reloc = ptr->reloc;
1786
cdba85ec 1787 if (!ppc_obj64)
5f6db75a
AM		 1788 if (exp_p->X_add_number != 0
1789 && (reloc == (int) BFD_RELOC_16_GOTOFF
1790 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1791 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1792 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1793 as_warn (_("identifier+constant@got means identifier@got+constant"));
1794
1795 /* Now check for identifier@suffix+constant. */
1796 if (*str == '-' || *str == '+')
252b5132 1797 {
5f6db75a
AM		 1798 char *orig_line = input_line_pointer;
1799 expressionS new_exp;
1800
1801 input_line_pointer = str;
1802 expression (&new_exp);
1803 if (new_exp.X_op == O_constant)
252b5132 1804 {
5f6db75a
AM		 1805 exp_p->X_add_number += new_exp.X_add_number;
1806 str = input_line_pointer;
252b5132 1807 }
5f6db75a
AM		 1808
1809 if (&input_line_pointer != str_p)
1810 input_line_pointer = orig_line;
252b5132 1811 }
252b5132 1812 *str_p = str;
0baf16f2 1813
2b3c4602 1814 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1815 && exp_p->X_op == O_symbol
1816 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1817 {
9f2b53d7
AM		 1818 /* Change the symbol so that the dummy .TOC. symbol can be
1819 omitted from the object file. */
0baf16f2
AM		 1820 exp_p->X_add_symbol = &abs_symbol;
1821 }
1822
15c1449b 1823 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1824 }
1825
1826 return BFD_RELOC_UNUSED;
1827}
1828
99a814a1
AM		 1829/* Like normal .long/.short/.word, except support @got, etc.
1830 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1831static void
98027b10 1832ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1833{
1834 expressionS exp;
1835 bfd_reloc_code_real_type reloc;
1836
1837 if (is_it_end_of_statement ())
1838 {
1839 demand_empty_rest_of_line ();
1840 return;
1841 }
1842
1843 do
1844 {
1845 expression (&exp);
1846 if (exp.X_op == O_symbol
1847 && *input_line_pointer == '@'
99a814a1
AM		 1848 && (reloc = ppc_elf_suffix (&input_line_pointer,
1849 &exp)) != BFD_RELOC_UNUSED)
252b5132 1850 {
99a814a1
AM		 1851 reloc_howto_type *reloc_howto;
1852 int size;
1853
1854 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1855 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1856
1857 if (size > nbytes)
0baf16f2
AM		 1858 {
1859 as_bad (_("%s relocations do not fit in %d bytes\n"),
1860 reloc_howto->name, nbytes);
1861 }
252b5132
RH		 1862 else
1863 {
0baf16f2
AM		 1864 char *p;
1865 int offset;
252b5132 1866
0baf16f2
AM		 1867 p = frag_more (nbytes);
1868 offset = 0;
1869 if (target_big_endian)
1870 offset = nbytes - size;
99a814a1
AM		 1871 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1872 &exp, 0, reloc);
252b5132
RH		 1873 }
1874 }
1875 else
1876 emit_expr (&exp, (unsigned int) nbytes);
1877 }
1878 while (*input_line_pointer++ == ',');
1879
99a814a1
AM		 1880 /* Put terminator back into stream. */
1881 input_line_pointer--;
252b5132
RH		 1882 demand_empty_rest_of_line ();
1883}
1884
1885/* Solaris pseduo op to change to the .rodata section. */
1886static void
98027b10 1887ppc_elf_rdata (int xxx)
252b5132
RH		 1888{
1889 char *save_line = input_line_pointer;
1890 static char section[] = ".rodata\n";
1891
99a814a1 1892 /* Just pretend this is .section .rodata */
252b5132
RH		 1893 input_line_pointer = section;
1894 obj_elf_section (xxx);
1895
1896 input_line_pointer = save_line;
1897}
1898
99a814a1 1899/* Pseudo op to make file scope bss items. */
252b5132 1900static void
98027b10 1901ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1902{
98027b10
AM		 1903 char *name;
1904 char c;
1905 char *p;
252b5132 1906 offsetT size;
98027b10 1907 symbolS *symbolP;
252b5132
RH		 1908 offsetT align;
1909 segT old_sec;
1910 int old_subsec;
1911 char *pfrag;
1912 int align2;
1913
1914 name = input_line_pointer;
1915 c = get_symbol_end ();
1916
99a814a1 1917 /* just after name is now '\0'. */
252b5132
RH		 1918 p = input_line_pointer;
1919 *p = c;
1920 SKIP_WHITESPACE ();
1921 if (*input_line_pointer != ',')
1922 {
1923 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1924 ignore_rest_of_line ();
1925 return;
1926 }
1927
1928 input_line_pointer++; /* skip ',' */
1929 if ((size = get_absolute_expression ()) < 0)
1930 {
1931 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1932 ignore_rest_of_line ();
1933 return;
1934 }
1935
1936 /* The third argument to .lcomm is the alignment. */
1937 if (*input_line_pointer != ',')
1938 align = 8;
1939 else
1940 {
1941 ++input_line_pointer;
1942 align = get_absolute_expression ();
1943 if (align <= 0)
1944 {
1945 as_warn (_("ignoring bad alignment"));
1946 align = 8;
1947 }
1948 }
1949
1950 *p = 0;
1951 symbolP = symbol_find_or_make (name);
1952 *p = c;
1953
1954 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1955 {
1956 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1957 S_GET_NAME (symbolP));
1958 ignore_rest_of_line ();
1959 return;
1960 }
1961
1962 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1963 {
1964 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1965 S_GET_NAME (symbolP),
1966 (long) S_GET_VALUE (symbolP),
1967 (long) size);
1968
1969 ignore_rest_of_line ();
1970 return;
1971 }
1972
99a814a1 1973 /* Allocate_bss. */
252b5132
RH		 1974 old_sec = now_seg;
1975 old_subsec = now_subseg;
1976 if (align)
1977 {
99a814a1 1978 /* Convert to a power of 2 alignment. */
252b5132
RH		 1979 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1980 if (align != 1)
1981 {
1982 as_bad (_("Common alignment not a power of 2"));
1983 ignore_rest_of_line ();
1984 return;
1985 }
1986 }
1987 else
1988 align2 = 0;
1989
1990 record_alignment (bss_section, align2);
1991 subseg_set (bss_section, 0);
1992 if (align2)
1993 frag_align (align2, 0, 0);
1994 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1995 symbol_get_frag (symbolP)->fr_symbol = 0;
1996 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1997 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1998 (char *) 0);
1999 *pfrag = 0;
2000 S_SET_SIZE (symbolP, size);
2001 S_SET_SEGMENT (symbolP, bss_section);
2002 subseg_set (old_sec, old_subsec);
2003 demand_empty_rest_of_line ();
2004}
2005
2006/* Validate any relocations emitted for -mrelocatable, possibly adding
2007 fixups for word relocations in writable segments, so we can adjust
2008 them at runtime. */
2009static void
98027b10 2010ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2011{
2012 if (fixp->fx_done || fixp->fx_pcrel)
2013 return;
2014
2015 switch (shlib)
2016 {
2017 case SHLIB_NONE:
2018 case SHLIB_PIC:
2019 return;
2020
5d6f4f16 2021 case SHLIB_MRELOCATABLE:
252b5132
RH		 2022 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2023 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2024 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2025 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2026 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2027 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2028 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2029 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2030 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2031 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2032 && strcmp (segment_name (seg), ".got2") != 0
2033 && strcmp (segment_name (seg), ".dtors") != 0
2034 && strcmp (segment_name (seg), ".ctors") != 0
2035 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2036 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2037 && strcmp (segment_name (seg), ".eh_frame") != 0
2038 && strcmp (segment_name (seg), ".ex_shared") != 0)
2039 {
2040 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2041 || fixp->fx_r_type != BFD_RELOC_CTOR)
2042 {
2043 as_bad_where (fixp->fx_file, fixp->fx_line,
2044 _("Relocation cannot be done when using -mrelocatable"));
2045 }
2046 }
2047 return;
2048 }
2049}
0baf16f2 2050
7e8d4ab4
AM		 2051/* Prevent elf_frob_file_before_adjust removing a weak undefined
2052 function descriptor sym if the corresponding code sym is used. */
2053
2054void
98027b10 2055ppc_frob_file_before_adjust (void)
0baf16f2 2056{
7e8d4ab4 2057 symbolS *symp;
9232bbb0 2058 asection *toc;
0baf16f2 2059
7e8d4ab4
AM		 2060 if (!ppc_obj64)
2061 return;
2062
2063 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2064 {
7e8d4ab4
AM		 2065 const char *name;
2066 char *dotname;
2067 symbolS *dotsym;
2068 size_t len;
2069
2070 name = S_GET_NAME (symp);
2071 if (name[0] == '.')
2072 continue;
2073
2074 if (! S_IS_WEAK (symp)
2075 || S_IS_DEFINED (symp))
2076 continue;
2077
2078 len = strlen (name) + 1;
2079 dotname = xmalloc (len + 1);
2080 dotname[0] = '.';
2081 memcpy (dotname + 1, name, len);
461b725f 2082 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2083 free (dotname);
2084 if (dotsym != NULL && (symbol_used_p (dotsym)
2085 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2086 symbol_mark_used (symp);
2087
0baf16f2
AM		 2088 }
2089
9232bbb0
AM		 2090 toc = bfd_get_section_by_name (stdoutput, ".toc");
2091 if (toc != NULL
2092 && bfd_section_size (stdoutput, toc) > 0x10000)
2093 as_warn (_("TOC section size exceeds 64k"));
2094
7e8d4ab4
AM		 2095 /* Don't emit .TOC. symbol. */
2096 symp = symbol_find (".TOC.");
2097 if (symp != NULL)
2098 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2099}
252b5132
RH		 2100#endif /* OBJ_ELF */
2101\f
2102#ifdef TE_PE
2103
2104/*
99a814a1 2105 * Summary of parse_toc_entry.
252b5132
RH		 2106 *
2107 * in: Input_line_pointer points to the '[' in one of:
2108 *
2109 * [toc] [tocv] [toc32] [toc64]
2110 *
2111 * Anything else is an error of one kind or another.
2112 *
81d4177b 2113 * out:
252b5132
RH		 2114 * return value: success or failure
2115 * toc_kind: kind of toc reference
2116 * input_line_pointer:
2117 * success: first char after the ']'
2118 * failure: unchanged
2119 *
2120 * settings:
2121 *
2122 * [toc] - rv == success, toc_kind = default_toc
2123 * [tocv] - rv == success, toc_kind = data_in_toc
2124 * [toc32] - rv == success, toc_kind = must_be_32
2125 * [toc64] - rv == success, toc_kind = must_be_64
2126 *
2127 */
2128
81d4177b
KH		 2129enum toc_size_qualifier
2130{
252b5132
RH		 2131 default_toc, /* The toc cell constructed should be the system default size */
2132 data_in_toc, /* This is a direct reference to a toc cell */
2133 must_be_32, /* The toc cell constructed must be 32 bits wide */
2134 must_be_64 /* The toc cell constructed must be 64 bits wide */
2135};
2136
2137static int
98027b10 2138parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2139{
2140 char *start;
2141 char *toc_spec;
2142 char c;
2143 enum toc_size_qualifier t;
2144
99a814a1 2145 /* Save the input_line_pointer. */
252b5132
RH		 2146 start = input_line_pointer;
2147
99a814a1 2148 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2149 ++input_line_pointer;
2150 SKIP_WHITESPACE ();
81d4177b 2151
99a814a1 2152 /* Find the spelling of the operand. */
252b5132
RH		 2153 toc_spec = input_line_pointer;
2154 c = get_symbol_end ();
2155
99a814a1 2156 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2157 {
2158 t = default_toc;
2159 }
99a814a1 2160 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2161 {
2162 t = data_in_toc;
2163 }
99a814a1 2164 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2165 {
2166 t = must_be_32;
2167 }
99a814a1 2168 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2169 {
2170 t = must_be_64;
2171 }
2172 else
2173 {
2174 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2175 *input_line_pointer = c;
2176 input_line_pointer = start;
252b5132
RH		 2177 return 0;
2178 }
2179
99a814a1
AM		 2180 /* Now find the ']'. */
2181 *input_line_pointer = c;
252b5132 2182
81d4177b
KH		 2183 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2184 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2185
2186 if (c != ']')
2187 {
2188 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2189 input_line_pointer = start;
252b5132
RH		 2190 return 0;
2191 }
2192
99a814a1 2193 *toc_kind = t;
252b5132
RH		 2194 return 1;
2195}
2196#endif
2197\f
2198
dc1d03fc 2199#ifdef OBJ_ELF
6a0c61b7
EZ		 2200#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2201static void
98027b10 2202ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2203{
2204 unsigned int i;
2205
2206 /* Check we don't already exist. */
2207 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2208 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2209 return;
b34976b6 2210
6a0c61b7
EZ		 2211 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2212 {
2213 if (ppc_apuinfo_num_alloc == 0)
2214 {
2215 ppc_apuinfo_num_alloc = 4;
2216 ppc_apuinfo_list = (unsigned long *)
2217 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2218 }
2219 else
2220 {
2221 ppc_apuinfo_num_alloc += 4;
2222 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2223 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2224 }
2225 }
dc1d03fc 2226 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2227}
2228#undef APUID
dc1d03fc 2229#endif
6a0c61b7
EZ		 2230\f
2231
252b5132
RH		 2232/* We need to keep a list of fixups. We can't simply generate them as
2233 we go, because that would require us to first create the frag, and
2234 that would screw up references to ``.''. */
2235
2236struct ppc_fixup
2237{
2238 expressionS exp;
2239 int opindex;
2240 bfd_reloc_code_real_type reloc;
2241};
2242
2243#define MAX_INSN_FIXUPS (5)
2244
2245/* This routine is called for each instruction to be assembled. */
2246
2247void
98027b10 2248md_assemble (char *str)
252b5132
RH		 2249{
2250 char *s;
2251 const struct powerpc_opcode *opcode;
2252 unsigned long insn;
2253 const unsigned char *opindex_ptr;
2254 int skip_optional;
2255 int need_paren;
2256 int next_opindex;
2257 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2258 int fc;
2259 char *f;
09b935ac 2260 int addr_mod;
252b5132
RH		 2261 int i;
2262#ifdef OBJ_ELF
2263 bfd_reloc_code_real_type reloc;
2264#endif
2265
2266 /* Get the opcode. */
3882b010 2267 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2268 ;
2269 if (*s != '\0')
2270 *s++ = '\0';
2271
2272 /* Look up the opcode in the hash table. */
2273 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2274 if (opcode == (const struct powerpc_opcode *) NULL)
2275 {
2276 const struct powerpc_macro *macro;
2277
2278 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2279 if (macro == (const struct powerpc_macro *) NULL)
2280 as_bad (_("Unrecognized opcode: `%s'"), str);
2281 else
2282 ppc_macro (s, macro);
2283
2284 return;
2285 }
2286
2287 insn = opcode->opcode;
2288
2289 str = s;
3882b010 2290 while (ISSPACE (*str))
252b5132
RH		 2291 ++str;
2292
2293 /* PowerPC operands are just expressions. The only real issue is
2294 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2295 an optional operand separate the operands only with commas (in some
2296 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2297 have optional operands). Most instructions with optional operands
2298 have only one. Those that have more than one optional operand can
2299 take either all their operands or none. So, before we start seriously
2300 parsing the operands, we check to see if we have optional operands,
2301 and if we do, we count the number of commas to see which operands
2302 have been omitted. */
252b5132
RH		 2303 skip_optional = 0;
2304 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2305 {
2306 const struct powerpc_operand *operand;
2307
2308 operand = &powerpc_operands[*opindex_ptr];
2309 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2310 {
2311 unsigned int opcount;
7fe9cf6b
NC		 2312 unsigned int num_operands_expected;
2313 unsigned int i;
252b5132
RH		 2314
2315 /* There is an optional operand. Count the number of
2316 commas in the input line. */
2317 if (*str == '\0')
2318 opcount = 0;
2319 else
2320 {
2321 opcount = 1;
2322 s = str;
2323 while ((s = strchr (s, ',')) != (char *) NULL)
2324 {
2325 ++opcount;
2326 ++s;
2327 }
2328 }
2329
7fe9cf6b
NC		 2330 /* Compute the number of expected operands.
2331 Do not count fake operands. */
2332 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2333 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2334 ++ num_operands_expected;
2335
252b5132
RH		 2336 /* If there are fewer operands in the line then are called
2337 for by the instruction, we want to skip the optional
1f6c9eb0 2338 operands. */
7fe9cf6b 2339 if (opcount < num_operands_expected)
252b5132
RH		 2340 skip_optional = 1;
2341
2342 break;
2343 }
2344 }
2345
2346 /* Gather the operands. */
2347 need_paren = 0;
2348 next_opindex = 0;
2349 fc = 0;
2350 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2351 {
2352 const struct powerpc_operand *operand;
2353 const char *errmsg;
2354 char *hold;
2355 expressionS ex;
2356 char endc;
2357
2358 if (next_opindex == 0)
2359 operand = &powerpc_operands[*opindex_ptr];
2360 else
2361 {
2362 operand = &powerpc_operands[next_opindex];
2363 next_opindex = 0;
2364 }
252b5132
RH		 2365 errmsg = NULL;
2366
2367 /* If this is a fake operand, then we do not expect anything
2368 from the input. */
2369 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2370 {
2b3c4602 2371 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2372 if (errmsg != (const char *) NULL)
2373 as_bad (errmsg);
2374 continue;
2375 }
2376
2377 /* If this is an optional operand, and we are skipping it, just
2378 insert a zero. */
2379 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2380 && skip_optional)
2381 {
2382 if (operand->insert)
2383 {
2b3c4602 2384 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2385 if (errmsg != (const char *) NULL)
2386 as_bad (errmsg);
2387 }
2388 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2389 next_opindex = *opindex_ptr + 1;
2390 continue;
2391 }
2392
2393 /* Gather the operand. */
2394 hold = input_line_pointer;
2395 input_line_pointer = str;
2396
2397#ifdef TE_PE
81d4177b 2398 if (*input_line_pointer == '[')
252b5132
RH		 2399 {
2400 /* We are expecting something like the second argument here:
99a814a1
AM		 2401 *
2402 * lwz r4,[toc].GS.0.static_int(rtoc)
2403 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2404 * The argument following the `]' must be a symbol name, and the
2405 * register must be the toc register: 'rtoc' or '2'
2406 *
2407 * The effect is to 0 as the displacement field
2408 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2409 * the appropriate variation) reloc against it based on the symbol.
2410 * The linker will build the toc, and insert the resolved toc offset.
2411 *
2412 * Note:
2413 * o The size of the toc entry is currently assumed to be
2414 * 32 bits. This should not be assumed to be a hard coded
2415 * number.
2416 * o In an effort to cope with a change from 32 to 64 bits,
2417 * there are also toc entries that are specified to be
2418 * either 32 or 64 bits:
2419 * lwz r4,[toc32].GS.0.static_int(rtoc)
2420 * lwz r4,[toc64].GS.0.static_int(rtoc)
2421 * These demand toc entries of the specified size, and the
2422 * instruction probably requires it.
2423 */
252b5132
RH		 2424
2425 int valid_toc;
2426 enum toc_size_qualifier toc_kind;
2427 bfd_reloc_code_real_type toc_reloc;
2428
99a814a1
AM		 2429 /* Go parse off the [tocXX] part. */
2430 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2431
81d4177b 2432 if (!valid_toc)
252b5132 2433 {
99a814a1
AM		 2434 /* Note: message has already been issued.
2435 FIXME: what sort of recovery should we do?
2436 demand_rest_of_line (); return; ? */
252b5132
RH		 2437 }
2438
99a814a1
AM		 2439 /* Now get the symbol following the ']'. */
2440 expression (&ex);
252b5132
RH		 2441
2442 switch (toc_kind)
2443 {
2444 case default_toc:
99a814a1
AM		 2445 /* In this case, we may not have seen the symbol yet,
2446 since it is allowed to appear on a .extern or .globl
2447 or just be a label in the .data section. */
252b5132
RH		 2448 toc_reloc = BFD_RELOC_PPC_TOC16;
2449 break;
2450 case data_in_toc:
99a814a1
AM		 2451 /* 1. The symbol must be defined and either in the toc
2452 section, or a global.
2453 2. The reloc generated must have the TOCDEFN flag set
2454 in upper bit mess of the reloc type.
2455 FIXME: It's a little confusing what the tocv
2456 qualifier can be used for. At the very least, I've
2457 seen three uses, only one of which I'm sure I can
2458 explain. */
81d4177b
KH		 2459 if (ex.X_op == O_symbol)
2460 {
252b5132 2461 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2462 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2463 != tocdata_section)
252b5132 2464 {
99a814a1 2465 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2466 }
2467 }
2468
2469 toc_reloc = BFD_RELOC_PPC_TOC16;
2470 break;
2471 case must_be_32:
99a814a1
AM		 2472 /* FIXME: these next two specifically specify 32/64 bit
2473 toc entries. We don't support them today. Is this
2474 the right way to say that? */
252b5132
RH		 2475 toc_reloc = BFD_RELOC_UNUSED;
2476 as_bad (_("Unimplemented toc32 expression modifier"));
2477 break;
2478 case must_be_64:
99a814a1 2479 /* FIXME: see above. */
252b5132
RH		 2480 toc_reloc = BFD_RELOC_UNUSED;
2481 as_bad (_("Unimplemented toc64 expression modifier"));
2482 break;
2483 default:
bc805888 2484 fprintf (stderr,
99a814a1
AM		 2485 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2486 toc_kind);
bc805888 2487 abort ();
252b5132
RH		 2488 break;
2489 }
2490
2491 /* We need to generate a fixup for this expression. */
2492 if (fc >= MAX_INSN_FIXUPS)
2493 as_fatal (_("too many fixups"));
2494
2495 fixups[fc].reloc = toc_reloc;
2496 fixups[fc].exp = ex;
2497 fixups[fc].opindex = *opindex_ptr;
2498 ++fc;
2499
99a814a1
AM		 2500 /* Ok. We've set up the fixup for the instruction. Now make it
2501 look like the constant 0 was found here. */
252b5132
RH		 2502 ex.X_unsigned = 1;
2503 ex.X_op = O_constant;
2504 ex.X_add_number = 0;
2505 ex.X_add_symbol = NULL;
2506 ex.X_op_symbol = NULL;
2507 }
2508
2509 else
2510#endif /* TE_PE */
2511 {
2ad068be
AM		 2512 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2513 || !register_name (&ex))
252b5132 2514 {
13abbae3
AM		 2515 char save_lex = lex_type['%'];
2516
252b5132 2517 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2518 {
2519 cr_operand = TRUE;
2520 lex_type['%'] |= LEX_BEGIN_NAME;
2521 }
252b5132 2522 expression (&ex);
b34976b6 2523 cr_operand = FALSE;
13abbae3 2524 lex_type['%'] = save_lex;
252b5132
RH		 2525 }
2526 }
2527
2528 str = input_line_pointer;
2529 input_line_pointer = hold;
2530
2531 if (ex.X_op == O_illegal)
2532 as_bad (_("illegal operand"));
2533 else if (ex.X_op == O_absent)
2534 as_bad (_("missing operand"));
2535 else if (ex.X_op == O_register)
2536 {
2537 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2538 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2539 }
2540 else if (ex.X_op == O_constant)
2541 {
2542#ifdef OBJ_ELF
81d4177b 2543 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2544 char *orig_str = str;
2545
2546 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2547 switch (reloc)
2548 {
2549 default:
2550 str = orig_str;
2551 break;
2552
2553 case BFD_RELOC_LO16:
2554 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2555 something which cleared it, we always produce a
2556 signed value. */
2557 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2558 ex.X_add_number &= 0xffff;
2559 else
0baf16f2 2560 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2561 break;
2562
2563 case BFD_RELOC_HI16:
0baf16f2
AM		 2564 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2565 ex.X_add_number = PPC_HI (ex.X_add_number);
2566 else
2567 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2568 break;
2569
2570 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2571 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2572 ex.X_add_number = PPC_HA (ex.X_add_number);
2573 else
2574 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2575 break;
2576
0baf16f2
AM		 2577 case BFD_RELOC_PPC64_HIGHER:
2578 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2579 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2580 else
2581 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2582 break;
2583
2584 case BFD_RELOC_PPC64_HIGHER_S:
2585 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2586 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2587 else
2588 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2589 break;
0baf16f2
AM		 2590
2591 case BFD_RELOC_PPC64_HIGHEST:
2592 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2593 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2594 else
2595 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2596 break;
2597
2598 case BFD_RELOC_PPC64_HIGHEST_S:
2599 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2600 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2601 else
2602 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2603 break;
252b5132 2604 }
0baf16f2 2605#endif /* OBJ_ELF */
252b5132 2606 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2607 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2608 }
2609#ifdef OBJ_ELF
2610 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2611 {
cdba85ec
AM		 2612 /* Some TLS tweaks. */
2613 switch (reloc)
2614 {
2615 default:
2616 break;
2617 case BFD_RELOC_PPC_TLS:
2618 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
783de163 2619 ppc_cpu, (char *) NULL, 0);
cdba85ec
AM		 2620 break;
2621 /* We'll only use the 32 (or 64) bit form of these relocations
2622 in constants. Instructions get the 16 bit form. */
2623 case BFD_RELOC_PPC_DTPREL:
2624 reloc = BFD_RELOC_PPC_DTPREL16;
2625 break;
2626 case BFD_RELOC_PPC_TPREL:
2627 reloc = BFD_RELOC_PPC_TPREL16;
2628 break;
2629 }
2630
99a814a1
AM		 2631 /* For the absolute forms of branches, convert the PC
2632 relative form back into the absolute. */
252b5132
RH		 2633 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2634 {
2635 switch (reloc)
2636 {
2637 case BFD_RELOC_PPC_B26:
2638 reloc = BFD_RELOC_PPC_BA26;
2639 break;
2640 case BFD_RELOC_PPC_B16:
2641 reloc = BFD_RELOC_PPC_BA16;
2642 break;
2643 case BFD_RELOC_PPC_B16_BRTAKEN:
2644 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2645 break;
2646 case BFD_RELOC_PPC_B16_BRNTAKEN:
2647 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2648 break;
2649 default:
2650 break;
2651 }
2652 }
2653
2b3c4602 2654 if (ppc_obj64
adadcc0c 2655 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2656 {
2657 switch (reloc)
2658 {
2659 case BFD_RELOC_16:
2660 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2661 break;
2662 case BFD_RELOC_LO16:
2663 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2664 break;
2665 case BFD_RELOC_16_GOTOFF:
2666 reloc = BFD_RELOC_PPC64_GOT16_DS;
2667 break;
2668 case BFD_RELOC_LO16_GOTOFF:
2669 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2670 break;
2671 case BFD_RELOC_LO16_PLTOFF:
2672 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2673 break;
1cfc59d5 2674 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2675 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2676 break;
2677 case BFD_RELOC_LO16_BASEREL:
2678 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2679 break;
2680 case BFD_RELOC_PPC_TOC16:
2681 reloc = BFD_RELOC_PPC64_TOC16_DS;
2682 break;
2683 case BFD_RELOC_PPC64_TOC16_LO:
2684 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2685 break;
2686 case BFD_RELOC_PPC64_PLTGOT16:
2687 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2688 break;
2689 case BFD_RELOC_PPC64_PLTGOT16_LO:
2690 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2691 break;
cdba85ec
AM		 2692 case BFD_RELOC_PPC_DTPREL16:
2693 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2694 break;
2695 case BFD_RELOC_PPC_DTPREL16_LO:
2696 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2697 break;
2698 case BFD_RELOC_PPC_TPREL16:
2699 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2700 break;
2701 case BFD_RELOC_PPC_TPREL16_LO:
2702 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2703 break;
2704 case BFD_RELOC_PPC_GOT_DTPREL16:
2705 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2706 case BFD_RELOC_PPC_GOT_TPREL16:
2707 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2708 break;
0baf16f2
AM		 2709 default:
2710 as_bad (_("unsupported relocation for DS offset field"));
2711 break;
2712 }
2713 }
2714
252b5132
RH		 2715 /* We need to generate a fixup for this expression. */
2716 if (fc >= MAX_INSN_FIXUPS)
2717 as_fatal (_("too many fixups"));
2718 fixups[fc].exp = ex;
2719 fixups[fc].opindex = 0;
2720 fixups[fc].reloc = reloc;
2721 ++fc;
2722 }
2723#endif /* OBJ_ELF */
2724
2725 else
2726 {
2727 /* We need to generate a fixup for this expression. */
2728 if (fc >= MAX_INSN_FIXUPS)
2729 as_fatal (_("too many fixups"));
2730 fixups[fc].exp = ex;
2731 fixups[fc].opindex = *opindex_ptr;
2732 fixups[fc].reloc = BFD_RELOC_UNUSED;
2733 ++fc;
2734 }
2735
2736 if (need_paren)
2737 {
2738 endc = ')';
2739 need_paren = 0;
c3d65c1c
BE		 2740 /* If expecting more operands, then we want to see "),". */
2741 if (*str == endc && opindex_ptr[1] != 0)
2742 {
2743 do
2744 ++str;
2745 while (ISSPACE (*str));
2746 endc = ',';
2747 }
252b5132
RH		 2748 }
2749 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2750 {
2751 endc = '(';
2752 need_paren = 1;
2753 }
2754 else
2755 endc = ',';
2756
2757 /* The call to expression should have advanced str past any
2758 whitespace. */
2759 if (*str != endc
2760 && (endc != ',' || *str != '\0'))
2761 {
2762 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2763 break;
2764 }
2765
2766 if (*str != '\0')
2767 ++str;
2768 }
2769
3882b010 2770 while (ISSPACE (*str))
252b5132
RH		 2771 ++str;
2772
2773 if (*str != '\0')
2774 as_bad (_("junk at end of line: `%s'"), str);
2775
dc1d03fc 2776#ifdef OBJ_ELF
6a0c61b7
EZ		 2777 /* Do we need/want a APUinfo section? */
2778 if (ppc_cpu & (PPC_OPCODE_SPE
2779 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2780 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2781 | PPC_OPCODE_RFMCI))
2782 {
2783 /* These are all version "1". */
2784 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2785 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2786 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2787 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2788 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2789 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2790 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2791 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2792 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2793 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2794 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2795 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2796 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2797 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2798 }
dc1d03fc 2799#endif
6a0c61b7 2800
252b5132
RH		 2801 /* Write out the instruction. */
2802 f = frag_more (4);
09b935ac
AM		 2803 addr_mod = frag_now_fix () & 3;
2804 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2805 as_bad (_("instruction address is not a multiple of 4"));
2806 frag_now->insn_addr = addr_mod;
2807 frag_now->has_code = 1;
252b5132
RH		 2808 md_number_to_chars (f, insn, 4);
2809
5d6f4f16
GK		 2810#ifdef OBJ_ELF
2811 dwarf2_emit_insn (4);
2812#endif
2813
252b5132
RH		 2814 /* Create any fixups. At this point we do not use a
2815 bfd_reloc_code_real_type, but instead just use the
2816 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2817 handle fixups for any operand type, although that is admittedly
2818 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2819 md_apply_fix. */
252b5132
RH		 2820 for (i = 0; i < fc; i++)
2821 {
2822 const struct powerpc_operand *operand;
2823
2824 operand = &powerpc_operands[fixups[i].opindex];
2825 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2826 {
99a814a1 2827 reloc_howto_type *reloc_howto;
252b5132
RH		 2828 int size;
2829 int offset;
2830 fixS *fixP;
2831
99a814a1 2832 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2833 if (!reloc_howto)
2834 abort ();
2835
2836 size = bfd_get_reloc_size (reloc_howto);
2837 offset = target_big_endian ? (4 - size) : 0;
2838
2839 if (size < 1 || size > 4)
bc805888 2840 abort ();
252b5132 2841
99a814a1
AM		 2842 fixP = fix_new_exp (frag_now,
2843 f - frag_now->fr_literal + offset,
2844 size,
2845 &fixups[i].exp,
2846 reloc_howto->pc_relative,
252b5132
RH		 2847 fixups[i].reloc);
2848
2849 /* Turn off complaints that the addend is too large for things like
2850 foo+100000@ha. */
2851 switch (fixups[i].reloc)
2852 {
2853 case BFD_RELOC_16_GOTOFF:
2854 case BFD_RELOC_PPC_TOC16:
2855 case BFD_RELOC_LO16:
2856 case BFD_RELOC_HI16:
2857 case BFD_RELOC_HI16_S:
0baf16f2 2858#ifdef OBJ_ELF
0baf16f2
AM		 2859 case BFD_RELOC_PPC64_HIGHER:
2860 case BFD_RELOC_PPC64_HIGHER_S:
2861 case BFD_RELOC_PPC64_HIGHEST:
2862 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2863#endif
252b5132
RH		 2864 fixP->fx_no_overflow = 1;
2865 break;
2866 default:
2867 break;
2868 }
2869 }
2870 else
99a814a1
AM		 2871 fix_new_exp (frag_now,
2872 f - frag_now->fr_literal,
2873 4,
252b5132
RH		 2874 &fixups[i].exp,
2875 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2876 ((bfd_reloc_code_real_type)
99a814a1 2877 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2878 }
2879}
2880
2881/* Handle a macro. Gather all the operands, transform them as
2882 described by the macro, and call md_assemble recursively. All the
2883 operands are separated by commas; we don't accept parentheses
2884 around operands here. */
2885
2886static void
98027b10 2887ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2888{
2889 char *operands[10];
2890 unsigned int count;
2891 char *s;
2892 unsigned int len;
2893 const char *format;
db557034 2894 unsigned int arg;
252b5132
RH		 2895 char *send;
2896 char *complete;
2897
2898 /* Gather the users operands into the operands array. */
2899 count = 0;
2900 s = str;
2901 while (1)
2902 {
2903 if (count >= sizeof operands / sizeof operands[0])
2904 break;
2905 operands[count++] = s;
2906 s = strchr (s, ',');
2907 if (s == (char *) NULL)
2908 break;
2909 *s++ = '\0';
81d4177b 2910 }
252b5132
RH		 2911
2912 if (count != macro->operands)
2913 {
2914 as_bad (_("wrong number of operands"));
2915 return;
2916 }
2917
2918 /* Work out how large the string must be (the size is unbounded
2919 because it includes user input). */
2920 len = 0;
2921 format = macro->format;
2922 while (*format != '\0')
2923 {
2924 if (*format != '%')
2925 {
2926 ++len;
2927 ++format;
2928 }
2929 else
2930 {
2931 arg = strtol (format + 1, &send, 10);
db557034 2932 know (send != format && arg < count);
252b5132
RH		 2933 len += strlen (operands[arg]);
2934 format = send;
2935 }
2936 }
2937
2938 /* Put the string together. */
2939 complete = s = (char *) alloca (len + 1);
2940 format = macro->format;
2941 while (*format != '\0')
2942 {
2943 if (*format != '%')
2944 *s++ = *format++;
2945 else
2946 {
2947 arg = strtol (format + 1, &send, 10);
2948 strcpy (s, operands[arg]);
2949 s += strlen (s);
2950 format = send;
2951 }
2952 }
2953 *s = '\0';
2954
2955 /* Assemble the constructed instruction. */
2956 md_assemble (complete);
81d4177b 2957}
252b5132
RH		 2958\f
2959#ifdef OBJ_ELF
99a814a1 2960/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2961
2962int
98027b10 2963ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2964{
2965 if (letter == 'e')
2966 return SHF_EXCLUDE;
2967
13ae64f3 2968 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2969 return -1;
252b5132
RH		 2970}
2971
2972int
98027b10 2973ppc_section_word (char *str, size_t len)
252b5132 2974{
9de8d8f1
RH		 2975 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2976 return SHF_EXCLUDE;
252b5132 2977
9de8d8f1 2978 return -1;
252b5132
RH		 2979}
2980
2981int
98027b10 2982ppc_section_type (char *str, size_t len)
252b5132 2983{
9de8d8f1
RH		 2984 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2985 return SHT_ORDERED;
252b5132 2986
9de8d8f1 2987 return -1;
252b5132
RH		 2988}
2989
2990int
98027b10 2991ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2992{
2993 if (type == SHT_ORDERED)
2994 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2995
2996 if (attr & SHF_EXCLUDE)
2997 flags |= SEC_EXCLUDE;
2998
2999 return flags;
3000}
3001#endif /* OBJ_ELF */
3002
3003\f
3004/* Pseudo-op handling. */
3005
3006/* The .byte pseudo-op. This is similar to the normal .byte
3007 pseudo-op, but it can also take a single ASCII string. */
3008
3009static void
98027b10 3010ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3011{
3012 if (*input_line_pointer != '\"')
3013 {
3014 cons (1);
3015 return;
3016 }
3017
3018 /* Gather characters. A real double quote is doubled. Unusual
3019 characters are not permitted. */
3020 ++input_line_pointer;
3021 while (1)
3022 {
3023 char c;
3024
3025 c = *input_line_pointer++;
3026
3027 if (c == '\"')
3028 {
3029 if (*input_line_pointer != '\"')
3030 break;
3031 ++input_line_pointer;
3032 }
3033
3034 FRAG_APPEND_1_CHAR (c);
3035 }
3036
3037 demand_empty_rest_of_line ();
3038}
3039\f
3040#ifdef OBJ_XCOFF
3041
3042/* XCOFF specific pseudo-op handling. */
3043
3044/* This is set if we are creating a .stabx symbol, since we don't want
3045 to handle symbol suffixes for such symbols. */
b34976b6 3046static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3047
3048/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3049 symbols in the .bss segment as though they were local common
67c1ffbe 3050 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3051 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3052
3053static void
98027b10 3054ppc_comm (int lcomm)
252b5132
RH		 3055{
3056 asection *current_seg = now_seg;
3057 subsegT current_subseg = now_subseg;
3058 char *name;
3059 char endc;
3060 char *end_name;
3061 offsetT size;
3062 offsetT align;
3063 symbolS *lcomm_sym = NULL;
3064 symbolS *sym;
3065 char *pfrag;
3066
3067 name = input_line_pointer;
3068 endc = get_symbol_end ();
3069 end_name = input_line_pointer;
3070 *end_name = endc;
3071
3072 if (*input_line_pointer != ',')
3073 {
3074 as_bad (_("missing size"));
3075 ignore_rest_of_line ();
3076 return;
3077 }
3078 ++input_line_pointer;
3079
3080 size = get_absolute_expression ();
3081 if (size < 0)
3082 {
3083 as_bad (_("negative size"));
3084 ignore_rest_of_line ();
3085 return;
3086 }
3087
3088 if (! lcomm)
3089 {
3090 /* The third argument to .comm is the alignment. */
3091 if (*input_line_pointer != ',')
1ad63b2f 3092 align = 2;
252b5132
RH		 3093 else
3094 {
3095 ++input_line_pointer;
3096 align = get_absolute_expression ();
3097 if (align <= 0)
3098 {
3099 as_warn (_("ignoring bad alignment"));
1ad63b2f 3100 align = 2;
252b5132
RH		 3101 }
3102 }
3103 }
3104 else
3105 {
3106 char *lcomm_name;
3107 char lcomm_endc;
3108
1ad63b2f 3109 if (size <= 4)
252b5132
RH		 3110 align = 2;
3111 else
3112 align = 3;
3113
3114 /* The third argument to .lcomm appears to be the real local
3115 common symbol to create. References to the symbol named in
3116 the first argument are turned into references to the third
3117 argument. */
3118 if (*input_line_pointer != ',')
3119 {
3120 as_bad (_("missing real symbol name"));
3121 ignore_rest_of_line ();
3122 return;
3123 }
3124 ++input_line_pointer;
3125
3126 lcomm_name = input_line_pointer;
3127 lcomm_endc = get_symbol_end ();
81d4177b 3128
252b5132
RH		 3129 lcomm_sym = symbol_find_or_make (lcomm_name);
3130
3131 *input_line_pointer = lcomm_endc;
3132 }
3133
3134 *end_name = '\0';
3135 sym = symbol_find_or_make (name);
3136 *end_name = endc;
3137
3138 if (S_IS_DEFINED (sym)
3139 || S_GET_VALUE (sym) != 0)
3140 {
3141 as_bad (_("attempt to redefine symbol"));
3142 ignore_rest_of_line ();
3143 return;
3144 }
81d4177b 3145
252b5132 3146 record_alignment (bss_section, align);
81d4177b 3147
252b5132
RH		 3148 if (! lcomm
3149 || ! S_IS_DEFINED (lcomm_sym))
3150 {
3151 symbolS *def_sym;
3152 offsetT def_size;
3153
3154 if (! lcomm)
3155 {
3156 def_sym = sym;
3157 def_size = size;
3158 S_SET_EXTERNAL (sym);
3159 }
3160 else
3161 {
809ffe0d 3162 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3163 def_sym = lcomm_sym;
3164 def_size = 0;
3165 }
3166
3167 subseg_set (bss_section, 1);
3168 frag_align (align, 0, 0);
81d4177b 3169
809ffe0d 3170 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3171 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3172 def_size, (char *) NULL);
3173 *pfrag = 0;
3174 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3175 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3176 }
3177 else if (lcomm)
3178 {
3179 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3180 symbol_get_frag (lcomm_sym)->fr_offset =
3181 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3182 &~ ((1 << align) - 1));
809ffe0d
ILT		 3183 if (align > symbol_get_tc (lcomm_sym)->align)
3184 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3185 }
3186
3187 if (lcomm)
3188 {
3189 /* Make sym an offset from lcomm_sym. */
3190 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3191 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3192 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3193 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3194 }
3195
3196 subseg_set (current_seg, current_subseg);
3197
3198 demand_empty_rest_of_line ();
3199}
3200
3201/* The .csect pseudo-op. This switches us into a different
3202 subsegment. The first argument is a symbol whose value is the
3203 start of the .csect. In COFF, csect symbols get special aux
3204 entries defined by the x_csect field of union internal_auxent. The
3205 optional second argument is the alignment (the default is 2). */
3206
3207static void
98027b10 3208ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3209{
3210 char *name;
3211 char endc;
3212 symbolS *sym;
931e13a6 3213 offsetT align;
252b5132
RH		 3214
3215 name = input_line_pointer;
3216 endc = get_symbol_end ();
81d4177b 3217
252b5132
RH		 3218 sym = symbol_find_or_make (name);
3219
3220 *input_line_pointer = endc;
3221
3222 if (S_GET_NAME (sym)[0] == '\0')
3223 {
3224 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3225 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3226 }
3227
931e13a6 3228 align = 2;
252b5132
RH		 3229 if (*input_line_pointer == ',')
3230 {
3231 ++input_line_pointer;
931e13a6 3232 align = get_absolute_expression ();
252b5132
RH		 3233 }
3234
931e13a6
AM		 3235 ppc_change_csect (sym, align);
3236
252b5132
RH		 3237 demand_empty_rest_of_line ();
3238}
3239
3240/* Change to a different csect. */
3241
3242static void
98027b10 3243ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3244{
3245 if (S_IS_DEFINED (sym))
809ffe0d 3246 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3247 else
3248 {
3249 symbolS **list_ptr;
3250 int after_toc;
3251 int hold_chunksize;
3252 symbolS *list;
931e13a6
AM		 3253 int is_code;
3254 segT sec;
252b5132
RH		 3255
3256 /* This is a new csect. We need to look at the symbol class to
3257 figure out whether it should go in the text section or the
3258 data section. */
3259 after_toc = 0;
931e13a6 3260 is_code = 0;
809ffe0d 3261 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3262 {
3263 case XMC_PR:
3264 case XMC_RO:
3265 case XMC_DB:
3266 case XMC_GL:
3267 case XMC_XO:
3268 case XMC_SV:
3269 case XMC_TI:
3270 case XMC_TB:
3271 S_SET_SEGMENT (sym, text_section);
809ffe0d 3272 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3273 ++ppc_text_subsegment;
3274 list_ptr = &ppc_text_csects;
931e13a6 3275 is_code = 1;
252b5132
RH		 3276 break;
3277 case XMC_RW:
3278 case XMC_TC0:
3279 case XMC_TC:
3280 case XMC_DS:
3281 case XMC_UA:
3282 case XMC_BS:
3283 case XMC_UC:
3284 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3285 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3286 == ppc_data_subsegment))
252b5132
RH		 3287 after_toc = 1;
3288 S_SET_SEGMENT (sym, data_section);
809ffe0d 3289 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3290 ++ppc_data_subsegment;
3291 list_ptr = &ppc_data_csects;
3292 break;
3293 default:
3294 abort ();
3295 }
3296
3297 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3298 changing subsegments, so that we don't use a lot of memory
3299 space for what may be a small section. */
252b5132
RH		 3300 hold_chunksize = chunksize;
3301 chunksize = 64;
3302
931e13a6
AM		 3303 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3304 symbol_get_tc (sym)->subseg);
252b5132
RH		 3305
3306 chunksize = hold_chunksize;
3307
3308 if (after_toc)
3309 ppc_after_toc_frag = frag_now;
3310
931e13a6
AM		 3311 record_alignment (sec, align);
3312 if (is_code)
3313 frag_align_code (align, 0);
3314 else
3315 frag_align (align, 0, 0);
3316
809ffe0d 3317 symbol_set_frag (sym, frag_now);
252b5132
RH		 3318 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3319
931e13a6 3320 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3321 symbol_get_tc (sym)->output = 1;
3322 symbol_get_tc (sym)->within = sym;
81d4177b 3323
252b5132 3324 for (list = *list_ptr;
809ffe0d
ILT		 3325 symbol_get_tc (list)->next != (symbolS *) NULL;
3326 list = symbol_get_tc (list)->next)
252b5132 3327 ;
809ffe0d 3328 symbol_get_tc (list)->next = sym;
81d4177b 3329
252b5132 3330 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3331 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3332 &symbol_lastP);
252b5132
RH		 3333 }
3334
3335 ppc_current_csect = sym;
3336}
3337
3338/* This function handles the .text and .data pseudo-ops. These
3339 pseudo-ops aren't really used by XCOFF; we implement them for the
3340 convenience of people who aren't used to XCOFF. */
3341
3342static void
98027b10 3343ppc_section (int type)
252b5132
RH		 3344{
3345 const char *name;
3346 symbolS *sym;
3347
3348 if (type == 't')
3349 name = ".text[PR]";
3350 else if (type == 'd')
3351 name = ".data[RW]";
3352 else
3353 abort ();
3354
3355 sym = symbol_find_or_make (name);
3356
931e13a6 3357 ppc_change_csect (sym, 2);
252b5132
RH		 3358
3359 demand_empty_rest_of_line ();
3360}
3361
3362/* This function handles the .section pseudo-op. This is mostly to
3363 give an error, since XCOFF only supports .text, .data and .bss, but
3364 we do permit the user to name the text or data section. */
3365
3366static void
98027b10 3367ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3368{
3369 char *user_name;
3370 const char *real_name;
3371 char c;
3372 symbolS *sym;
3373
3374 user_name = input_line_pointer;
3375 c = get_symbol_end ();
3376
3377 if (strcmp (user_name, ".text") == 0)
3378 real_name = ".text[PR]";
3379 else if (strcmp (user_name, ".data") == 0)
3380 real_name = ".data[RW]";
3381 else
3382 {
3383 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3384 *input_line_pointer = c;
3385 ignore_rest_of_line ();
3386 return;
3387 }
3388
3389 *input_line_pointer = c;
3390
3391 sym = symbol_find_or_make (real_name);
3392
931e13a6 3393 ppc_change_csect (sym, 2);
252b5132
RH		 3394
3395 demand_empty_rest_of_line ();
3396}
3397
3398/* The .extern pseudo-op. We create an undefined symbol. */
3399
3400static void
98027b10 3401ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3402{
3403 char *name;
3404 char endc;
3405
3406 name = input_line_pointer;
3407 endc = get_symbol_end ();
3408
3409 (void) symbol_find_or_make (name);
3410
3411 *input_line_pointer = endc;
3412
3413 demand_empty_rest_of_line ();
3414}
3415
3416/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3417
3418static void
98027b10 3419ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3420{
3421 char *name;
3422 char endc;
3423 symbolS *sym;
3424
3425 name = input_line_pointer;
3426 endc = get_symbol_end ();
3427
3428 sym = symbol_find_or_make (name);
3429
3430 *input_line_pointer = endc;
3431
809ffe0d 3432 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3433
3434 demand_empty_rest_of_line ();
3435}
3436
3437/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3438 although I don't know why it bothers. */
3439
3440static void
98027b10 3441ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3442{
3443 char *name;
3444 char endc;
3445 symbolS *sym;
3446 int len;
3447
3448 name = input_line_pointer;
3449 endc = get_symbol_end ();
3450
3451 sym = symbol_find_or_make (name);
3452
3453 *input_line_pointer = endc;
3454
3455 if (*input_line_pointer != ',')
3456 {
3457 as_bad (_("missing rename string"));
3458 ignore_rest_of_line ();
3459 return;
3460 }
3461 ++input_line_pointer;
3462
809ffe0d 3463 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3464
3465 demand_empty_rest_of_line ();
3466}
3467
3468/* The .stabx pseudo-op. This is similar to a normal .stabs
3469 pseudo-op, but slightly different. A sample is
3470 .stabx "main:F-1",.main,142,0
3471 The first argument is the symbol name to create. The second is the
3472 value, and the third is the storage class. The fourth seems to be
3473 always zero, and I am assuming it is the type. */
3474
3475static void
98027b10 3476ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3477{
3478 char *name;
3479 int len;
3480 symbolS *sym;
3481 expressionS exp;
3482
3483 name = demand_copy_C_string (&len);
3484
3485 if (*input_line_pointer != ',')
3486 {
3487 as_bad (_("missing value"));
3488 return;
3489 }
3490 ++input_line_pointer;
3491
b34976b6 3492 ppc_stab_symbol = TRUE;
252b5132 3493 sym = symbol_make (name);
b34976b6 3494 ppc_stab_symbol = FALSE;
252b5132 3495
809ffe0d 3496 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3497
3498 (void) expression (&exp);
3499
3500 switch (exp.X_op)
3501 {
3502 case O_illegal:
3503 case O_absent:
3504 case O_big:
3505 as_bad (_("illegal .stabx expression; zero assumed"));
3506 exp.X_add_number = 0;
3507 /* Fall through. */
3508 case O_constant:
3509 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3510 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3511 break;
3512
3513 case O_symbol:
3514 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3515 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3516 else
3517 {
3518 S_SET_VALUE (sym,
3519 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3520 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3521 }
3522 break;
3523
3524 default:
3525 /* The value is some complex expression. This will probably
99a814a1
AM		 3526 fail at some later point, but this is probably the right
3527 thing to do here. */
809ffe0d 3528 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3529 break;
3530 }
3531
3532 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3533 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3534
3535 if (*input_line_pointer != ',')
3536 {
3537 as_bad (_("missing class"));
3538 return;
3539 }
3540 ++input_line_pointer;
3541
3542 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3543
3544 if (*input_line_pointer != ',')
3545 {
3546 as_bad (_("missing type"));
3547 return;
3548 }
3549 ++input_line_pointer;
3550
3551 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3552
809ffe0d 3553 symbol_get_tc (sym)->output = 1;
252b5132 3554
6877bb43 3555 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3556
809ffe0d 3557 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3558
41ea10b1 3559 /* In this case :
99a814a1 3560
41ea10b1
TR		 3561 .bs name
3562 .stabx "z",arrays_,133,0
3563 .es
99a814a1 3564
41ea10b1 3565 .comm arrays_,13768,3
99a814a1 3566
41ea10b1
TR		 3567 resolve_symbol_value will copy the exp's "within" into sym's when the
3568 offset is 0. Since this seems to be corner case problem,
3569 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3570 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3571
3572 if (exp.X_op == O_symbol)
41ea10b1
TR		 3573 {
3574 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3575 }
6877bb43 3576 }
99a814a1 3577
252b5132
RH		 3578 if (exp.X_op != O_symbol
3579 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3580 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3581 ppc_frob_label (sym);
3582 else
3583 {
3584 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3585 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3586 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3587 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3588 }
3589
3590 demand_empty_rest_of_line ();
3591}
3592
3593/* The .function pseudo-op. This takes several arguments. The first
3594 argument seems to be the external name of the symbol. The second
67c1ffbe 3595 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3596 uses the same name for both. I have no idea what the third and
3597 fourth arguments are meant to be. The optional fifth argument is
3598 an expression for the size of the function. In COFF this symbol
3599 gets an aux entry like that used for a csect. */
3600
3601static void
98027b10 3602ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3603{
3604 char *name;
3605 char endc;
3606 char *s;
3607 symbolS *ext_sym;
3608 symbolS *lab_sym;
3609
3610 name = input_line_pointer;
3611 endc = get_symbol_end ();
3612
3613 /* Ignore any [PR] suffix. */
3614 name = ppc_canonicalize_symbol_name (name);
3615 s = strchr (name, '[');
3616 if (s != (char *) NULL
3617 && strcmp (s + 1, "PR]") == 0)
3618 *s = '\0';
3619
3620 ext_sym = symbol_find_or_make (name);
3621
3622 *input_line_pointer = endc;
3623
3624 if (*input_line_pointer != ',')
3625 {
3626 as_bad (_("missing symbol name"));
3627 ignore_rest_of_line ();
3628 return;
3629 }
3630 ++input_line_pointer;
3631
3632 name = input_line_pointer;
3633 endc = get_symbol_end ();
3634
3635 lab_sym = symbol_find_or_make (name);
3636
3637 *input_line_pointer = endc;
3638
3639 if (ext_sym != lab_sym)
3640 {
809ffe0d
ILT		 3641 expressionS exp;
3642
3643 exp.X_op = O_symbol;
3644 exp.X_add_symbol = lab_sym;
3645 exp.X_op_symbol = NULL;
3646 exp.X_add_number = 0;
3647 exp.X_unsigned = 0;
3648 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3649 }
3650
809ffe0d
ILT		 3651 if (symbol_get_tc (ext_sym)->class == -1)
3652 symbol_get_tc (ext_sym)->class = XMC_PR;
3653 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3654
3655 if (*input_line_pointer == ',')
3656 {
3657 expressionS ignore;
3658
3659 /* Ignore the third argument. */
3660 ++input_line_pointer;
3661 expression (&ignore);
3662 if (*input_line_pointer == ',')
3663 {
3664 /* Ignore the fourth argument. */
3665 ++input_line_pointer;
3666 expression (&ignore);
3667 if (*input_line_pointer == ',')
3668 {
3669 /* The fifth argument is the function size. */
3670 ++input_line_pointer;
809ffe0d
ILT		 3671 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3672 absolute_section,
3673 (valueT) 0,
3674 &zero_address_frag);
3675 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3676 }
3677 }
3678 }
3679
3680 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3681 SF_SET_FUNCTION (ext_sym);
3682 SF_SET_PROCESS (ext_sym);
3683 coff_add_linesym (ext_sym);
3684
3685 demand_empty_rest_of_line ();
3686}
3687
3688/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3689 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3690 with the correct line number */
5d6255fe 3691
8642cce8 3692static symbolS *saved_bi_sym = 0;
252b5132
RH		 3693
3694static void
98027b10 3695ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3696{
3697 symbolS *sym;
3698
3699 sym = symbol_make (".bf");
3700 S_SET_SEGMENT (sym, text_section);
809ffe0d 3701 symbol_set_frag (sym, frag_now);
252b5132
RH		 3702 S_SET_VALUE (sym, frag_now_fix ());
3703 S_SET_STORAGE_CLASS (sym, C_FCN);
3704
3705 coff_line_base = get_absolute_expression ();
3706
3707 S_SET_NUMBER_AUXILIARY (sym, 1);
3708 SA_SET_SYM_LNNO (sym, coff_line_base);
3709
8642cce8 3710 /* Line number for bi. */
5d6255fe 3711 if (saved_bi_sym)
8642cce8
TR		 3712 {
3713 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3714 saved_bi_sym = 0;
3715 }
5d6255fe 3716
8642cce8 3717
809ffe0d 3718 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3719
3720 ppc_frob_label (sym);
3721
3722 demand_empty_rest_of_line ();
3723}
3724
3725/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3726 ".ef", except that the line number is absolute, not relative to the
3727 most recent ".bf" symbol. */
3728
3729static void
98027b10 3730ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3731{
3732 symbolS *sym;
3733
3734 sym = symbol_make (".ef");
3735 S_SET_SEGMENT (sym, text_section);
809ffe0d 3736 symbol_set_frag (sym, frag_now);
252b5132
RH		 3737 S_SET_VALUE (sym, frag_now_fix ());
3738 S_SET_STORAGE_CLASS (sym, C_FCN);
3739 S_SET_NUMBER_AUXILIARY (sym, 1);
3740 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3741 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3742
3743 ppc_frob_label (sym);
3744
3745 demand_empty_rest_of_line ();
3746}
3747
3748/* The .bi and .ei pseudo-ops. These take a string argument and
3749 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3750 the symbol list. The value of .bi will be know when the next .bf
3751 is encountered. */
252b5132
RH		 3752
3753static void
98027b10 3754ppc_biei (int ei)
252b5132
RH		 3755{
3756 static symbolS *last_biei;
3757
3758 char *name;
3759 int len;
3760 symbolS *sym;
3761 symbolS *look;
3762
3763 name = demand_copy_C_string (&len);
3764
3765 /* The value of these symbols is actually file offset. Here we set
3766 the value to the index into the line number entries. In
3767 ppc_frob_symbols we set the fix_line field, which will cause BFD
3768 to do the right thing. */
3769
3770 sym = symbol_make (name);
3771 /* obj-coff.c currently only handles line numbers correctly in the
3772 .text section. */
3773 S_SET_SEGMENT (sym, text_section);
3774 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3775 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3776
3777 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3778 symbol_get_tc (sym)->output = 1;
81d4177b 3779
8642cce8 3780 /* Save bi. */
5d6255fe 3781 if (ei)
8642cce8
TR		 3782 saved_bi_sym = 0;
3783 else
3784 saved_bi_sym = sym;
3785
252b5132
RH		 3786 for (look = last_biei ? last_biei : symbol_rootP;
3787 (look != (symbolS *) NULL
3788 && (S_GET_STORAGE_CLASS (look) == C_FILE
3789 || S_GET_STORAGE_CLASS (look) == C_BINCL
3790 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3791 look = symbol_next (look))
3792 ;
3793 if (look != (symbolS *) NULL)
3794 {
3795 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3796 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3797 last_biei = sym;
3798 }
3799
3800 demand_empty_rest_of_line ();
3801}
3802
3803/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3804 There is one argument, which is a csect symbol. The value of the
3805 .bs symbol is the index of this csect symbol. */
3806
3807static void
98027b10 3808ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3809{
3810 char *name;
3811 char endc;
3812 symbolS *csect;
3813 symbolS *sym;
3814
3815 if (ppc_current_block != NULL)
3816 as_bad (_("nested .bs blocks"));
3817
3818 name = input_line_pointer;
3819 endc = get_symbol_end ();
3820
3821 csect = symbol_find_or_make (name);
3822
3823 *input_line_pointer = endc;
3824
3825 sym = symbol_make (".bs");
3826 S_SET_SEGMENT (sym, now_seg);
3827 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3828 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3829 symbol_get_tc (sym)->output = 1;
252b5132 3830
809ffe0d 3831 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3832
3833 ppc_frob_label (sym);
3834
3835 ppc_current_block = sym;
3836
3837 demand_empty_rest_of_line ();
3838}
3839
3840/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3841
3842static void
98027b10 3843ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3844{
3845 symbolS *sym;
3846
3847 if (ppc_current_block == NULL)
3848 as_bad (_(".es without preceding .bs"));
3849
3850 sym = symbol_make (".es");
3851 S_SET_SEGMENT (sym, now_seg);
3852 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3853 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3854 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3855
3856 ppc_frob_label (sym);
3857
3858 ppc_current_block = NULL;
3859
3860 demand_empty_rest_of_line ();
3861}
3862
3863/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3864 line number. */
3865
3866static void
98027b10 3867ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3868{
3869 symbolS *sym;
3870
3871 sym = symbol_make (".bb");
3872 S_SET_SEGMENT (sym, text_section);
809ffe0d 3873 symbol_set_frag (sym, frag_now);
252b5132
RH		 3874 S_SET_VALUE (sym, frag_now_fix ());
3875 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3876
3877 S_SET_NUMBER_AUXILIARY (sym, 1);
3878 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3879
809ffe0d 3880 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3881
3882 SF_SET_PROCESS (sym);
3883
3884 ppc_frob_label (sym);
3885
3886 demand_empty_rest_of_line ();
3887}
3888
3889/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3890 line number. */
3891
3892static void
98027b10 3893ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3894{
3895 symbolS *sym;
3896
3897 sym = symbol_make (".eb");
3898 S_SET_SEGMENT (sym, text_section);
809ffe0d 3899 symbol_set_frag (sym, frag_now);
252b5132
RH		 3900 S_SET_VALUE (sym, frag_now_fix ());
3901 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3902 S_SET_NUMBER_AUXILIARY (sym, 1);
3903 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3904 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3905
3906 SF_SET_PROCESS (sym);
3907
3908 ppc_frob_label (sym);
3909
3910 demand_empty_rest_of_line ();
3911}
3912
3913/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3914 specified name. */
3915
3916static void
98027b10 3917ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3918{
3919 char *name;
3920 int len;
3921 symbolS *sym;
3922
3923 name = demand_copy_C_string (&len);
3924 sym = symbol_make (name);
3925 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3926 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3927 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3928 S_SET_VALUE (sym, 0);
809ffe0d 3929 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3930
3931 ppc_frob_label (sym);
3932
3933 demand_empty_rest_of_line ();
3934}
3935
3936/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3937
3938static void
98027b10 3939ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3940{
3941 symbolS *sym;
3942
3943 sym = symbol_make (".ec");
3944 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3945 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3946 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3947 S_SET_VALUE (sym, 0);
809ffe0d 3948 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3949
3950 ppc_frob_label (sym);
3951
3952 demand_empty_rest_of_line ();
3953}
3954
3955/* The .toc pseudo-op. Switch to the .toc subsegment. */
3956
3957static void
98027b10 3958ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3959{
3960 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3961 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3962 else
3963 {
3964 subsegT subseg;
3965 symbolS *sym;
3966 symbolS *list;
81d4177b 3967
252b5132
RH		 3968 subseg = ppc_data_subsegment;
3969 ++ppc_data_subsegment;
3970
3971 subseg_new (segment_name (data_section), subseg);
3972 ppc_toc_frag = frag_now;
3973
3974 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3975 symbol_set_frag (sym, frag_now);
252b5132
RH		 3976 S_SET_SEGMENT (sym, data_section);
3977 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3978 symbol_get_tc (sym)->subseg = subseg;
3979 symbol_get_tc (sym)->output = 1;
3980 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3981
3982 ppc_toc_csect = sym;
81d4177b 3983
252b5132 3984 for (list = ppc_data_csects;
809ffe0d
ILT		 3985 symbol_get_tc (list)->next != (symbolS *) NULL;
3986 list = symbol_get_tc (list)->next)
252b5132 3987 ;
809ffe0d 3988 symbol_get_tc (list)->next = sym;
252b5132
RH		 3989
3990 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3991 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3992 &symbol_lastP);
252b5132
RH		 3993 }
3994
3995 ppc_current_csect = ppc_toc_csect;
3996
3997 demand_empty_rest_of_line ();
3998}
3999
4000/* The AIX assembler automatically aligns the operands of a .long or
4001 .short pseudo-op, and we want to be compatible. */
4002
4003static void
98027b10 4004ppc_xcoff_cons (int log_size)
252b5132
RH		 4005{
4006 frag_align (log_size, 0, 0);
4007 record_alignment (now_seg, log_size);
4008 cons (1 << log_size);
4009}
4010
4011static void
98027b10 4012ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4013{
4014 expressionS exp;
4015 int byte_count;
4016
4017 (void) expression (&exp);
4018
4019 if (exp.X_op != O_constant)
4020 {
4021 as_bad (_("non-constant byte count"));
4022 return;
4023 }
4024
4025 byte_count = exp.X_add_number;
4026
4027 if (*input_line_pointer != ',')
4028 {
4029 as_bad (_("missing value"));
4030 return;
4031 }
4032
4033 ++input_line_pointer;
4034 cons (byte_count);
4035}
4036
4037#endif /* OBJ_XCOFF */
0baf16f2 4038#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4039\f
4040/* The .tc pseudo-op. This is used when generating either XCOFF or
4041 ELF. This takes two or more arguments.
4042
4043 When generating XCOFF output, the first argument is the name to
4044 give to this location in the toc; this will be a symbol with class
0baf16f2 4045 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4046 this location in the TOC; often there is just one more argument, a
1049f94e 4047 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4048 depends on target word size. A 32-bit target uses 4-byte values, a
4049 64-bit target uses 8-byte values.
252b5132
RH		 4050
4051 When not generating XCOFF output, the arguments are the same, but
4052 the first argument is simply ignored. */
4053
4054static void
98027b10 4055ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4056{
4057#ifdef OBJ_XCOFF
4058
4059 /* Define the TOC symbol name. */
4060 {
4061 char *name;
4062 char endc;
4063 symbolS *sym;
4064
4065 if (ppc_toc_csect == (symbolS *) NULL
4066 || ppc_toc_csect != ppc_current_csect)
4067 {
4068 as_bad (_(".tc not in .toc section"));
4069 ignore_rest_of_line ();
4070 return;
4071 }
4072
4073 name = input_line_pointer;
4074 endc = get_symbol_end ();
4075
4076 sym = symbol_find_or_make (name);
4077
4078 *input_line_pointer = endc;
4079
4080 if (S_IS_DEFINED (sym))
4081 {
4082 symbolS *label;
4083
809ffe0d
ILT		 4084 label = symbol_get_tc (ppc_current_csect)->within;
4085 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4086 {
4087 as_bad (_(".tc with no label"));
4088 ignore_rest_of_line ();
4089 return;
4090 }
4091
4092 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4093 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4094 S_SET_VALUE (label, S_GET_VALUE (sym));
4095
4096 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4097 ++input_line_pointer;
4098
4099 return;
4100 }
4101
4102 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4103 symbol_set_frag (sym, frag_now);
252b5132 4104 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4105 symbol_get_tc (sym)->class = XMC_TC;
4106 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4107
4108 ppc_frob_label (sym);
4109 }
4110
0baf16f2
AM		 4111#endif /* OBJ_XCOFF */
4112#ifdef OBJ_ELF
9c7977b3 4113 int align;
252b5132
RH		 4114
4115 /* Skip the TOC symbol name. */
4116 while (is_part_of_name (*input_line_pointer)
d13d4015 4117 || *input_line_pointer == ' '
252b5132
RH		 4118 || *input_line_pointer == '['
4119 || *input_line_pointer == ']'
4120 || *input_line_pointer == '{'
4121 || *input_line_pointer == '}')
4122 ++input_line_pointer;
4123
0baf16f2 4124 /* Align to a four/eight byte boundary. */
2b3c4602 4125 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4126 frag_align (align, 0, 0);
4127 record_alignment (now_seg, align);
0baf16f2 4128#endif /* OBJ_ELF */
252b5132
RH		 4129
4130 if (*input_line_pointer != ',')
4131 demand_empty_rest_of_line ();
4132 else
4133 {
4134 ++input_line_pointer;
2b3c4602 4135 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4136 }
4137}
0baf16f2
AM		 4138
4139/* Pseudo-op .machine. */
0baf16f2
AM		 4140
4141static void
98027b10 4142ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4143{
69c040df
AM		 4144 char *cpu_string;
4145#define MAX_HISTORY 100
fa452fa6 4146 static ppc_cpu_t *cpu_history;
69c040df
AM		 4147 static int curr_hist;
4148
4149 SKIP_WHITESPACE ();
4150
4151 if (*input_line_pointer == '"')
4152 {
4153 int len;
4154 cpu_string = demand_copy_C_string (&len);
4155 }
4156 else
4157 {
4158 char c;
4159 cpu_string = input_line_pointer;
4160 c = get_symbol_end ();
4161 cpu_string = xstrdup (cpu_string);
4162 *input_line_pointer = c;
4163 }
4164
4165 if (cpu_string != NULL)
4166 {
fa452fa6 4167 ppc_cpu_t old_cpu = ppc_cpu;
69c040df
AM		 4168 char *p;
4169
4170 for (p = cpu_string; *p != 0; p++)
4171 *p = TOLOWER (*p);
4172
4173 if (strcmp (cpu_string, "push") == 0)
4174 {
4175 if (cpu_history == NULL)
4176 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4177
4178 if (curr_hist >= MAX_HISTORY)
4179 as_bad (_(".machine stack overflow"));
4180 else
4181 cpu_history[curr_hist++] = ppc_cpu;
4182 }
4183 else if (strcmp (cpu_string, "pop") == 0)
4184 {
4185 if (curr_hist <= 0)
4186 as_bad (_(".machine stack underflow"));
4187 else
4188 ppc_cpu = cpu_history[--curr_hist];
4189 }
4190 else if (parse_cpu (cpu_string))
4191 ;
4192 else
4193 as_bad (_("invalid machine `%s'"), cpu_string);
4194
4195 if (ppc_cpu != old_cpu)
4196 ppc_setup_opcodes ();
4197 }
4198
4199 demand_empty_rest_of_line ();
0baf16f2
AM		 4200}
4201
4202/* See whether a symbol is in the TOC section. */
4203
4204static int
98027b10 4205ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4206{
4207#ifdef OBJ_XCOFF
4208 return symbol_get_tc (sym)->class == XMC_TC;
4209#endif
4210#ifdef OBJ_ELF
4211 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4212 if (ppc_obj64)
0baf16f2
AM		 4213 return strcmp (sname, ".toc") == 0;
4214 else
4215 return strcmp (sname, ".got") == 0;
4216#endif
4217}
4218#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4219\f
4220#ifdef TE_PE
4221
99a814a1 4222/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4223
4224/* Set the current section. */
4225static void
98027b10 4226ppc_set_current_section (segT new)
252b5132
RH		 4227{
4228 ppc_previous_section = ppc_current_section;
4229 ppc_current_section = new;
4230}
4231
4232/* pseudo-op: .previous
4233 behaviour: toggles the current section with the previous section.
4234 errors: None
99a814a1
AM		 4235 warnings: "No previous section" */
4236
252b5132 4237static void
98027b10 4238ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4239{
4240 symbolS *tmp;
4241
81d4177b 4242 if (ppc_previous_section == NULL)
252b5132 4243 {
99a814a1 4244 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4245 return;
4246 }
4247
99a814a1 4248 subseg_set (ppc_previous_section, 0);
252b5132 4249
99a814a1 4250 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4251}
4252
4253/* pseudo-op: .pdata
4254 behaviour: predefined read only data section
b34976b6 4255 double word aligned
252b5132
RH		 4256 errors: None
4257 warnings: None
4258 initial: .section .pdata "adr3"
b34976b6 4259 a - don't know -- maybe a misprint
252b5132
RH		 4260 d - initialized data
4261 r - readable
4262 3 - double word aligned (that would be 4 byte boundary)
4263
4264 commentary:
4265 Tag index tables (also known as the function table) for exception
99a814a1 4266 handling, debugging, etc. */
252b5132 4267
252b5132 4268static void
98027b10 4269ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4270{
81d4177b 4271 if (pdata_section == 0)
252b5132
RH		 4272 {
4273 pdata_section = subseg_new (".pdata", 0);
81d4177b 4274
252b5132
RH		 4275 bfd_set_section_flags (stdoutput, pdata_section,
4276 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4277 | SEC_READONLY | SEC_DATA ));
81d4177b 4278
252b5132
RH		 4279 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4280 }
4281 else
4282 {
99a814a1 4283 pdata_section = subseg_new (".pdata", 0);
252b5132 4284 }
99a814a1 4285 ppc_set_current_section (pdata_section);
252b5132
RH		 4286}
4287
4288/* pseudo-op: .ydata
4289 behaviour: predefined read only data section
b34976b6 4290 double word aligned
252b5132
RH		 4291 errors: None
4292 warnings: None
4293 initial: .section .ydata "drw3"
b34976b6 4294 a - don't know -- maybe a misprint
252b5132
RH		 4295 d - initialized data
4296 r - readable
4297 3 - double word aligned (that would be 4 byte boundary)
4298 commentary:
4299 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4300 debugging, etc. */
4301
252b5132 4302static void
98027b10 4303ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4304{
81d4177b 4305 if (ydata_section == 0)
252b5132
RH		 4306 {
4307 ydata_section = subseg_new (".ydata", 0);
4308 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4309 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4310 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4311
4312 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4313 }
4314 else
4315 {
4316 ydata_section = subseg_new (".ydata", 0);
4317 }
99a814a1 4318 ppc_set_current_section (ydata_section);
252b5132
RH		 4319}
4320
4321/* pseudo-op: .reldata
4322 behaviour: predefined read write data section
b34976b6 4323 double word aligned (4-byte)
252b5132
RH		 4324 FIXME: relocation is applied to it
4325 FIXME: what's the difference between this and .data?
4326 errors: None
4327 warnings: None
4328 initial: .section .reldata "drw3"
4329 d - initialized data
4330 r - readable
4331 w - writeable
4332 3 - double word aligned (that would be 8 byte boundary)
4333
4334 commentary:
4335 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4336 function descriptors, etc. */
4337
252b5132 4338static void
98027b10 4339ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4340{
4341 if (reldata_section == 0)
4342 {
4343 reldata_section = subseg_new (".reldata", 0);
4344
4345 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4346 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4347 | SEC_DATA));
252b5132
RH		 4348
4349 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4350 }
4351 else
4352 {
4353 reldata_section = subseg_new (".reldata", 0);
4354 }
99a814a1 4355 ppc_set_current_section (reldata_section);
252b5132
RH		 4356}
4357
4358/* pseudo-op: .rdata
4359 behaviour: predefined read only data section
b34976b6 4360 double word aligned
252b5132
RH		 4361 errors: None
4362 warnings: None
4363 initial: .section .rdata "dr3"
4364 d - initialized data
4365 r - readable
99a814a1
AM		 4366 3 - double word aligned (that would be 4 byte boundary) */
4367
252b5132 4368static void
98027b10 4369ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4370{
4371 if (rdata_section == 0)
4372 {
4373 rdata_section = subseg_new (".rdata", 0);
4374 bfd_set_section_flags (stdoutput, rdata_section,
4375 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4376 | SEC_READONLY | SEC_DATA ));
4377
4378 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4379 }
4380 else
4381 {
4382 rdata_section = subseg_new (".rdata", 0);
4383 }
99a814a1 4384 ppc_set_current_section (rdata_section);
252b5132
RH		 4385}
4386
4387/* pseudo-op: .ualong
81d4177b 4388 behaviour: much like .int, with the exception that no alignment is
b34976b6 4389 performed.
252b5132
RH		 4390 FIXME: test the alignment statement
4391 errors: None
99a814a1
AM		 4392 warnings: None */
4393
252b5132 4394static void
98027b10 4395ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4396{
99a814a1
AM		 4397 /* Try for long. */
4398 cons (4);
252b5132
RH		 4399}
4400
4401/* pseudo-op: .znop <symbol name>
4402 behaviour: Issue a nop instruction
b34976b6 4403 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4404 the supplied symbol name.
4405 errors: None
99a814a1
AM		 4406 warnings: Missing symbol name */
4407
252b5132 4408static void
98027b10 4409ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4410{
4411 unsigned long insn;
4412 const struct powerpc_opcode *opcode;
4413 expressionS ex;
4414 char *f;
252b5132 4415 symbolS *sym;
252b5132
RH		 4416 char *symbol_name;
4417 char c;
4418 char *name;
4419 unsigned int exp;
4420 flagword flags;
4421 asection *sec;
4422
99a814a1 4423 /* Strip out the symbol name. */
252b5132
RH		 4424 symbol_name = input_line_pointer;
4425 c = get_symbol_end ();
4426
4427 name = xmalloc (input_line_pointer - symbol_name + 1);
4428 strcpy (name, symbol_name);
4429
4430 sym = symbol_find_or_make (name);
4431
4432 *input_line_pointer = c;
4433
4434 SKIP_WHITESPACE ();
4435
4436 /* Look up the opcode in the hash table. */
4437 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4438
99a814a1 4439 /* Stick in the nop. */
252b5132
RH		 4440 insn = opcode->opcode;
4441
4442 /* Write out the instruction. */
4443 f = frag_more (4);
4444 md_number_to_chars (f, insn, 4);
4445 fix_new (frag_now,
4446 f - frag_now->fr_literal,
4447 4,
4448 sym,
4449 0,
4450 0,
4451 BFD_RELOC_16_GOT_PCREL);
4452
4453}
4454
81d4177b
KH		 4455/* pseudo-op:
4456 behaviour:
4457 errors:
99a814a1
AM		 4458 warnings: */
4459
252b5132 4460static void
98027b10 4461ppc_pe_comm (int lcomm)
252b5132 4462{
98027b10
AM		 4463 char *name;
4464 char c;
4465 char *p;
252b5132 4466 offsetT temp;
98027b10 4467 symbolS *symbolP;
252b5132
RH		 4468 offsetT align;
4469
4470 name = input_line_pointer;
4471 c = get_symbol_end ();
4472
99a814a1 4473 /* just after name is now '\0'. */
252b5132
RH		 4474 p = input_line_pointer;
4475 *p = c;
4476 SKIP_WHITESPACE ();
4477 if (*input_line_pointer != ',')
4478 {
4479 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4480 ignore_rest_of_line ();
4481 return;
4482 }
4483
4484 input_line_pointer++; /* skip ',' */
4485 if ((temp = get_absolute_expression ()) < 0)
4486 {
4487 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4488 ignore_rest_of_line ();
4489 return;
4490 }
4491
4492 if (! lcomm)
4493 {
4494 /* The third argument to .comm is the alignment. */
4495 if (*input_line_pointer != ',')
4496 align = 3;
4497 else
4498 {
4499 ++input_line_pointer;
4500 align = get_absolute_expression ();
4501 if (align <= 0)
4502 {
4503 as_warn (_("ignoring bad alignment"));
4504 align = 3;
4505 }
4506 }
4507 }
4508
4509 *p = 0;
4510 symbolP = symbol_find_or_make (name);
4511
4512 *p = c;
4513 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4514 {
4515 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4516 S_GET_NAME (symbolP));
4517 ignore_rest_of_line ();
4518 return;
4519 }
4520
4521 if (S_GET_VALUE (symbolP))
4522 {
4523 if (S_GET_VALUE (symbolP) != (valueT) temp)
4524 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4525 S_GET_NAME (symbolP),
4526 (long) S_GET_VALUE (symbolP),
4527 (long) temp);
4528 }
4529 else
4530 {
4531 S_SET_VALUE (symbolP, (valueT) temp);
4532 S_SET_EXTERNAL (symbolP);
86ebace2 4533 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4534 }
4535
4536 demand_empty_rest_of_line ();
4537}
4538
4539/*
4540 * implement the .section pseudo op:
4541 * .section name {, "flags"}
4542 * ^ ^
4543 * | +--- optional flags: 'b' for bss
4544 * | 'i' for info
4545 * +-- section name 'l' for lib
4546 * 'n' for noload
4547 * 'o' for over
4548 * 'w' for data
4549 * 'd' (apparently m88k for data)
4550 * 'x' for text
4551 * But if the argument is not a quoted string, treat it as a
4552 * subsegment number.
4553 *
4554 * FIXME: this is a copy of the section processing from obj-coff.c, with
4555 * additions/changes for the moto-pas assembler support. There are three
4556 * categories:
4557 *
81d4177b 4558 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4559 * setting bits that bfd probably neither understands or uses. The
4560 * correct approach (?) will have to incorporate extra fields attached
4561 * to the section to hold the system specific stuff. (krk)
4562 *
4563 * Section Contents:
4564 * 'a' - unknown - referred to in documentation, but no definition supplied
4565 * 'c' - section has code
4566 * 'd' - section has initialized data
4567 * 'u' - section has uninitialized data
4568 * 'i' - section contains directives (info)
4569 * 'n' - section can be discarded
4570 * 'R' - remove section at link time
4571 *
4572 * Section Protection:
4573 * 'r' - section is readable
4574 * 'w' - section is writeable
4575 * 'x' - section is executable
4576 * 's' - section is sharable
4577 *
4578 * Section Alignment:
4579 * '0' - align to byte boundary
4580 * '1' - align to halfword undary
4581 * '2' - align to word boundary
4582 * '3' - align to doubleword boundary
4583 * '4' - align to quadword boundary
4584 * '5' - align to 32 byte boundary
4585 * '6' - align to 64 byte boundary
4586 *
4587 */
4588
4589void
98027b10 4590ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4591{
99a814a1 4592 /* Strip out the section name. */
252b5132
RH		 4593 char *section_name;
4594 char c;
4595 char *name;
4596 unsigned int exp;
4597 flagword flags;
4598 segT sec;
4599 int align;
4600
4601 section_name = input_line_pointer;
4602 c = get_symbol_end ();
4603
4604 name = xmalloc (input_line_pointer - section_name + 1);
4605 strcpy (name, section_name);
4606
4607 *input_line_pointer = c;
4608
4609 SKIP_WHITESPACE ();
4610
4611 exp = 0;
4612 flags = SEC_NO_FLAGS;
4613
4614 if (strcmp (name, ".idata$2") == 0)
4615 {
4616 align = 0;
4617 }
4618 else if (strcmp (name, ".idata$3") == 0)
4619 {
4620 align = 0;
4621 }
4622 else if (strcmp (name, ".idata$4") == 0)
4623 {
4624 align = 2;
4625 }
4626 else if (strcmp (name, ".idata$5") == 0)
4627 {
4628 align = 2;
4629 }
4630 else if (strcmp (name, ".idata$6") == 0)
4631 {
4632 align = 1;
4633 }
4634 else
99a814a1
AM		 4635 /* Default alignment to 16 byte boundary. */
4636 align = 4;
252b5132
RH		 4637
4638 if (*input_line_pointer == ',')
4639 {
4640 ++input_line_pointer;
4641 SKIP_WHITESPACE ();
4642 if (*input_line_pointer != '"')
4643 exp = get_absolute_expression ();
4644 else
4645 {
4646 ++input_line_pointer;
4647 while (*input_line_pointer != '"'
4648 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4649 {
4650 switch (*input_line_pointer)
4651 {
4652 /* Section Contents */
4653 case 'a': /* unknown */
4654 as_bad (_("Unsupported section attribute -- 'a'"));
4655 break;
4656 case 'c': /* code section */
81d4177b 4657 flags |= SEC_CODE;
252b5132
RH		 4658 break;
4659 case 'd': /* section has initialized data */
4660 flags |= SEC_DATA;
4661 break;
4662 case 'u': /* section has uninitialized data */
4663 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4664 in winnt.h */
4665 flags |= SEC_ROM;
4666 break;
4667 case 'i': /* section contains directives (info) */
4668 /* FIXME: This is IMAGE_SCN_LNK_INFO
4669 in winnt.h */
4670 flags |= SEC_HAS_CONTENTS;
4671 break;
4672 case 'n': /* section can be discarded */
81d4177b 4673 flags &=~ SEC_LOAD;
252b5132
RH		 4674 break;
4675 case 'R': /* Remove section at link time */
4676 flags |= SEC_NEVER_LOAD;
4677 break;
8d452c78 4678#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4679 /* Section Protection */
4680 case 'r': /* section is readable */
4681 flags |= IMAGE_SCN_MEM_READ;
4682 break;
4683 case 'w': /* section is writeable */
4684 flags |= IMAGE_SCN_MEM_WRITE;
4685 break;
4686 case 'x': /* section is executable */
4687 flags |= IMAGE_SCN_MEM_EXECUTE;
4688 break;
4689 case 's': /* section is sharable */
4690 flags |= IMAGE_SCN_MEM_SHARED;
4691 break;
4692
4693 /* Section Alignment */
4694 case '0': /* align to byte boundary */
4695 flags |= IMAGE_SCN_ALIGN_1BYTES;
4696 align = 0;
4697 break;
4698 case '1': /* align to halfword boundary */
4699 flags |= IMAGE_SCN_ALIGN_2BYTES;
4700 align = 1;
4701 break;
4702 case '2': /* align to word boundary */
4703 flags |= IMAGE_SCN_ALIGN_4BYTES;
4704 align = 2;
4705 break;
4706 case '3': /* align to doubleword boundary */
4707 flags |= IMAGE_SCN_ALIGN_8BYTES;
4708 align = 3;
4709 break;
4710 case '4': /* align to quadword boundary */
4711 flags |= IMAGE_SCN_ALIGN_16BYTES;
4712 align = 4;
4713 break;
4714 case '5': /* align to 32 byte boundary */
4715 flags |= IMAGE_SCN_ALIGN_32BYTES;
4716 align = 5;
4717 break;
4718 case '6': /* align to 64 byte boundary */
4719 flags |= IMAGE_SCN_ALIGN_64BYTES;
4720 align = 6;
4721 break;
8d452c78 4722#endif
252b5132 4723 default:
99a814a1
AM		 4724 as_bad (_("unknown section attribute '%c'"),
4725 *input_line_pointer);
252b5132
RH		 4726 break;
4727 }
4728 ++input_line_pointer;
4729 }
4730 if (*input_line_pointer == '"')
4731 ++input_line_pointer;
4732 }
4733 }
4734
4735 sec = subseg_new (name, (subsegT) exp);
4736
99a814a1 4737 ppc_set_current_section (sec);
252b5132
RH		 4738
4739 if (flags != SEC_NO_FLAGS)
4740 {
4741 if (! bfd_set_section_flags (stdoutput, sec, flags))
4742 as_bad (_("error setting flags for \"%s\": %s"),
4743 bfd_section_name (stdoutput, sec),
4744 bfd_errmsg (bfd_get_error ()));
4745 }
4746
99a814a1 4747 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4748}
4749
4750static void
98027b10 4751ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4752{
4753 char *name;
4754 char endc;
4755 symbolS *ext_sym;
4756
4757 name = input_line_pointer;
4758 endc = get_symbol_end ();
4759
4760 ext_sym = symbol_find_or_make (name);
4761
4762 *input_line_pointer = endc;
4763
4764 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4765 SF_SET_FUNCTION (ext_sym);
4766 SF_SET_PROCESS (ext_sym);
4767 coff_add_linesym (ext_sym);
4768
4769 demand_empty_rest_of_line ();
4770}
4771
4772static void
98027b10 4773ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4774{
4775 if (tocdata_section == 0)
4776 {
4777 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4778 /* FIXME: section flags won't work. */
252b5132
RH		 4779 bfd_set_section_flags (stdoutput, tocdata_section,
4780 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4781 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4782
4783 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4784 }
4785 else
4786 {
4787 rdata_section = subseg_new (".tocd", 0);
4788 }
4789
99a814a1 4790 ppc_set_current_section (tocdata_section);
252b5132
RH		 4791
4792 demand_empty_rest_of_line ();
4793}
4794
4795/* Don't adjust TOC relocs to use the section symbol. */
4796
4797int
98027b10 4798ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4799{
4800 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4801}
4802
4803#endif
4804\f
4805#ifdef OBJ_XCOFF
4806
4807/* XCOFF specific symbol and file handling. */
4808
4809/* Canonicalize the symbol name. We use the to force the suffix, if
4810 any, to use square brackets, and to be in upper case. */
4811
4812char *
98027b10 4813ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4814{
4815 char *s;
4816
4817 if (ppc_stab_symbol)
4818 return name;
4819
4820 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4821 ;
4822 if (*s != '\0')
4823 {
4824 char brac;
4825
4826 if (*s == '[')
4827 brac = ']';
4828 else
4829 {
4830 *s = '[';
4831 brac = '}';
4832 }
4833
4834 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4835 *s = TOUPPER (*s);
252b5132
RH		 4836
4837 if (*s == '\0' || s[1] != '\0')
4838 as_bad (_("bad symbol suffix"));
4839
4840 *s = ']';
4841 }
4842
4843 return name;
4844}
4845
4846/* Set the class of a symbol based on the suffix, if any. This is
4847 called whenever a new symbol is created. */
4848
4849void
98027b10 4850ppc_symbol_new_hook (symbolS *sym)
252b5132 4851{
809ffe0d 4852 struct ppc_tc_sy *tc;
252b5132
RH		 4853 const char *s;
4854
809ffe0d
ILT		 4855 tc = symbol_get_tc (sym);
4856 tc->next = NULL;
4857 tc->output = 0;
4858 tc->class = -1;
4859 tc->real_name = NULL;
4860 tc->subseg = 0;
4861 tc->align = 0;
4862 tc->size = NULL;
4863 tc->within = NULL;
252b5132
RH		 4864
4865 if (ppc_stab_symbol)
4866 return;
4867
4868 s = strchr (S_GET_NAME (sym), '[');
4869 if (s == (const char *) NULL)
4870 {
4871 /* There is no suffix. */
4872 return;
4873 }
4874
4875 ++s;
4876
4877 switch (s[0])
4878 {
4879 case 'B':
4880 if (strcmp (s, "BS]") == 0)
809ffe0d 4881 tc->class = XMC_BS;
252b5132
RH		 4882 break;
4883 case 'D':
4884 if (strcmp (s, "DB]") == 0)
809ffe0d 4885 tc->class = XMC_DB;
252b5132 4886 else if (strcmp (s, "DS]") == 0)
809ffe0d 4887 tc->class = XMC_DS;
252b5132
RH		 4888 break;
4889 case 'G':
4890 if (strcmp (s, "GL]") == 0)
809ffe0d 4891 tc->class = XMC_GL;
252b5132
RH		 4892 break;
4893 case 'P':
4894 if (strcmp (s, "PR]") == 0)
809ffe0d 4895 tc->class = XMC_PR;
252b5132
RH		 4896 break;
4897 case 'R':
4898 if (strcmp (s, "RO]") == 0)
809ffe0d 4899 tc->class = XMC_RO;
252b5132 4900 else if (strcmp (s, "RW]") == 0)
809ffe0d 4901 tc->class = XMC_RW;
252b5132
RH		 4902 break;
4903 case 'S':
4904 if (strcmp (s, "SV]") == 0)
809ffe0d 4905 tc->class = XMC_SV;
252b5132
RH		 4906 break;
4907 case 'T':
4908 if (strcmp (s, "TC]") == 0)
809ffe0d 4909 tc->class = XMC_TC;
252b5132 4910 else if (strcmp (s, "TI]") == 0)
809ffe0d 4911 tc->class = XMC_TI;
252b5132 4912 else if (strcmp (s, "TB]") == 0)
809ffe0d 4913 tc->class = XMC_TB;
252b5132 4914 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4915 tc->class = XMC_TC0;
252b5132
RH		 4916 break;
4917 case 'U':
4918 if (strcmp (s, "UA]") == 0)
809ffe0d 4919 tc->class = XMC_UA;
252b5132 4920 else if (strcmp (s, "UC]") == 0)
809ffe0d 4921 tc->class = XMC_UC;
252b5132
RH		 4922 break;
4923 case 'X':
4924 if (strcmp (s, "XO]") == 0)
809ffe0d 4925 tc->class = XMC_XO;
252b5132
RH		 4926 break;
4927 }
4928
809ffe0d 4929 if (tc->class == -1)
252b5132
RH		 4930 as_bad (_("Unrecognized symbol suffix"));
4931}
4932
4933/* Set the class of a label based on where it is defined. This
4934 handles symbols without suffixes. Also, move the symbol so that it
4935 follows the csect symbol. */
4936
4937void
98027b10 4938ppc_frob_label (symbolS *sym)
252b5132
RH		 4939{
4940 if (ppc_current_csect != (symbolS *) NULL)
4941 {
809ffe0d
ILT		 4942 if (symbol_get_tc (sym)->class == -1)
4943 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4944
4945 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4946 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4947 &symbol_rootP, &symbol_lastP);
4948 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4949 }
07a53e5c
RH		 4950
4951#ifdef OBJ_ELF
4952 dwarf2_emit_label (sym);
4953#endif
252b5132
RH		 4954}
4955
4956/* This variable is set by ppc_frob_symbol if any absolute symbols are
4957 seen. It tells ppc_adjust_symtab whether it needs to look through
4958 the symbols. */
4959
b34976b6 4960static bfd_boolean ppc_saw_abs;
252b5132
RH		 4961
4962/* Change the name of a symbol just before writing it out. Set the
4963 real name if the .rename pseudo-op was used. Otherwise, remove any
4964 class suffix. Return 1 if the symbol should not be included in the
4965 symbol table. */
4966
4967int
98027b10 4968ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4969{
4970 static symbolS *ppc_last_function;
4971 static symbolS *set_end;
4972
4973 /* Discard symbols that should not be included in the output symbol
4974 table. */
809ffe0d
ILT		 4975 if (! symbol_used_in_reloc_p (sym)
4976 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4977 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4978 && ! symbol_get_tc (sym)->output
252b5132
RH		 4979 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4980 return 1;
4981
a161fe53
AM		 4982 /* This one will disappear anyway. Don't make a csect sym for it. */
4983 if (sym == abs_section_sym)
4984 return 1;
4985
809ffe0d
ILT		 4986 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4987 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4988 else
4989 {
4990 const char *name;
4991 const char *s;
4992
4993 name = S_GET_NAME (sym);
4994 s = strchr (name, '[');
4995 if (s != (char *) NULL)
4996 {
4997 unsigned int len;
4998 char *snew;
4999
5000 len = s - name;
5001 snew = xmalloc (len + 1);
5002 memcpy (snew, name, len);
5003 snew[len] = '\0';
5004
5005 S_SET_NAME (sym, snew);
5006 }
5007 }
5008
5009 if (set_end != (symbolS *) NULL)
5010 {
5011 SA_SET_SYM_ENDNDX (set_end, sym);
5012 set_end = NULL;
5013 }
5014
5015 if (SF_GET_FUNCTION (sym))
5016 {
5017 if (ppc_last_function != (symbolS *) NULL)
5018 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5019 ppc_last_function = sym;
809ffe0d 5020 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5021 {
6386f3a7 5022 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5023 SA_SET_SYM_FSIZE (sym,
5024 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5025 }
5026 }
5027 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5028 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5029 {
5030 if (ppc_last_function == (symbolS *) NULL)
5031 as_bad (_(".ef with no preceding .function"));
5032 else
5033 {
5034 set_end = ppc_last_function;
5035 ppc_last_function = NULL;
5036
5037 /* We don't have a C_EFCN symbol, but we need to force the
5038 COFF backend to believe that it has seen one. */
5039 coff_last_function = NULL;
5040 }
5041 }
5042
670ec21d 5043 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5044 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5045 && S_GET_STORAGE_CLASS (sym) != C_FILE
5046 && S_GET_STORAGE_CLASS (sym) != C_FCN
5047 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5048 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5049 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5050 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5051 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5052 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5053 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5054
5055 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5056 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5057 {
5058 int i;
5059 union internal_auxent *a;
5060
5061 /* Create a csect aux. */
5062 i = S_GET_NUMBER_AUXILIARY (sym);
5063 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5064 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5065 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5066 {
5067 /* This is the TOC table. */
5068 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5069 a->x_csect.x_scnlen.l = 0;
5070 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5071 }
809ffe0d 5072 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5073 {
5074 /* This is a csect symbol. x_scnlen is the size of the
5075 csect. */
809ffe0d 5076 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5077 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5078 S_GET_SEGMENT (sym))
5079 - S_GET_VALUE (sym));
5080 else
5081 {
6386f3a7 5082 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5083 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5084 - S_GET_VALUE (sym));
5085 }
809ffe0d 5086 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5087 }
5088 else if (S_GET_SEGMENT (sym) == bss_section)
5089 {
5090 /* This is a common symbol. */
809ffe0d
ILT		 5091 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5092 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5093 if (S_IS_EXTERNAL (sym))
809ffe0d 5094 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5095 else
809ffe0d 5096 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5097 }
5098 else if (S_GET_SEGMENT (sym) == absolute_section)
5099 {
5100 /* This is an absolute symbol. The csect will be created by
99a814a1 5101 ppc_adjust_symtab. */
b34976b6 5102 ppc_saw_abs = TRUE;
252b5132 5103 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5104 if (symbol_get_tc (sym)->class == -1)
5105 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5106 }
5107 else if (! S_IS_DEFINED (sym))
5108 {
5109 /* This is an external symbol. */
5110 a->x_csect.x_scnlen.l = 0;
5111 a->x_csect.x_smtyp = XTY_ER;
5112 }
809ffe0d 5113 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5114 {
5115 symbolS *next;
5116
5117 /* This is a TOC definition. x_scnlen is the size of the
5118 TOC entry. */
5119 next = symbol_next (sym);
809ffe0d 5120 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5121 next = symbol_next (next);
5122 if (next == (symbolS *) NULL
809ffe0d 5123 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5124 {
5125 if (ppc_after_toc_frag == (fragS *) NULL)
5126 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5127 data_section)
5128 - S_GET_VALUE (sym));
5129 else
5130 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5131 - S_GET_VALUE (sym));
5132 }
5133 else
5134 {
6386f3a7 5135 resolve_symbol_value (next);
252b5132
RH		 5136 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5137 - S_GET_VALUE (sym));
5138 }
5139 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5140 }
5141 else
5142 {
5143 symbolS *csect;
5144
5145 /* This is a normal symbol definition. x_scnlen is the
5146 symbol index of the containing csect. */
5147 if (S_GET_SEGMENT (sym) == text_section)
5148 csect = ppc_text_csects;
5149 else if (S_GET_SEGMENT (sym) == data_section)
5150 csect = ppc_data_csects;
5151 else
5152 abort ();
5153
5154 /* Skip the initial dummy symbol. */
809ffe0d 5155 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5156
5157 if (csect == (symbolS *) NULL)
5158 {
5159 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5160 a->x_csect.x_scnlen.l = 0;
5161 }
5162 else
5163 {
809ffe0d 5164 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5165 {
6386f3a7 5166 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5167 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5168 > S_GET_VALUE (sym))
252b5132 5169 break;
809ffe0d 5170 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5171 }
5172
809ffe0d
ILT		 5173 a->x_csect.x_scnlen.p =
5174 coffsymbol (symbol_get_bfdsym (csect))->native;
5175 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5176 1;
252b5132
RH		 5177 }
5178 a->x_csect.x_smtyp = XTY_LD;
5179 }
81d4177b 5180
252b5132
RH		 5181 a->x_csect.x_parmhash = 0;
5182 a->x_csect.x_snhash = 0;
809ffe0d 5183 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5184 a->x_csect.x_smclas = XMC_PR;
5185 else
809ffe0d 5186 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5187 a->x_csect.x_stab = 0;
5188 a->x_csect.x_snstab = 0;
5189
5190 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5191 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5192 }
5193 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5194 {
5195 /* We want the value to be the symbol index of the referenced
5196 csect symbol. BFD will do that for us if we set the right
5197 flags. */
b782de16
AM		 5198 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5199 combined_entry_type *c = coffsymbol (bsym)->native;
5200
5201 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5202 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5203 }
5204 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5205 {
5206 symbolS *block;
5207 symbolS *csect;
5208
5209 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5210 block = symbol_get_tc (sym)->within;
5211 csect = symbol_get_tc (block)->within;
6386f3a7 5212 resolve_symbol_value (csect);
252b5132
RH		 5213 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5214 }
5215 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5216 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5217 {
5218 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5219 BFD will do that for us if we set the right flags. We have
5220 already set the value correctly. */
809ffe0d 5221 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5222 }
5223
5224 return 0;
5225}
5226
5227/* Adjust the symbol table. This creates csect symbols for all
5228 absolute symbols. */
5229
5230void
98027b10 5231ppc_adjust_symtab (void)
252b5132
RH		 5232{
5233 symbolS *sym;
5234
5235 if (! ppc_saw_abs)
5236 return;
5237
5238 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5239 {
5240 symbolS *csect;
5241 int i;
5242 union internal_auxent *a;
5243
5244 if (S_GET_SEGMENT (sym) != absolute_section)
5245 continue;
5246
5247 csect = symbol_create (".abs[XO]", absolute_section,
5248 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5249 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5250 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5251 i = S_GET_NUMBER_AUXILIARY (csect);
5252 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5253 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5254 a->x_csect.x_scnlen.l = 0;
5255 a->x_csect.x_smtyp = XTY_SD;
5256 a->x_csect.x_parmhash = 0;
5257 a->x_csect.x_snhash = 0;
5258 a->x_csect.x_smclas = XMC_XO;
5259 a->x_csect.x_stab = 0;
5260 a->x_csect.x_snstab = 0;
5261
5262 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5263
5264 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5265 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5266 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5267 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5268 }
5269
b34976b6 5270 ppc_saw_abs = FALSE;
252b5132
RH		 5271}
5272
5273/* Set the VMA for a section. This is called on all the sections in
5274 turn. */
5275
5276void
98027b10 5277ppc_frob_section (asection *sec)
252b5132 5278{
931e13a6 5279 static bfd_vma vma = 0;
252b5132 5280
931e13a6 5281 vma = md_section_align (sec, vma);
252b5132
RH		 5282 bfd_set_section_vma (stdoutput, sec, vma);
5283 vma += bfd_section_size (stdoutput, sec);
5284}
5285
5286#endif /* OBJ_XCOFF */
5287\f
252b5132 5288char *
98027b10 5289md_atof (int type, char *litp, int *sizep)
252b5132 5290{
499ac353 5291 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5292}
5293
5294/* Write a value out to the object file, using the appropriate
5295 endianness. */
5296
5297void
98027b10 5298md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5299{
5300 if (target_big_endian)
5301 number_to_chars_bigendian (buf, val, n);
5302 else
5303 number_to_chars_littleendian (buf, val, n);
5304}
5305
5306/* Align a section (I don't know why this is machine dependent). */
5307
5308valueT
3aeeedbb 5309md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5310{
3aeeedbb
AM		 5311#ifdef OBJ_ELF
5312 return addr;
5313#else
252b5132
RH		 5314 int align = bfd_get_section_alignment (stdoutput, seg);
5315
5316 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5317#endif
252b5132
RH		 5318}
5319
5320/* We don't have any form of relaxing. */
5321
5322int
98027b10
AM		 5323md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5324 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5325{
5326 abort ();
5327 return 0;
5328}
5329
5330/* Convert a machine dependent frag. We never generate these. */
5331
5332void
98027b10
AM		 5333md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5334 asection *sec ATTRIBUTE_UNUSED,
5335 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5336{
5337 abort ();
5338}
5339
5340/* We have no need to default values of symbols. */
5341
252b5132 5342symbolS *
98027b10 5343md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5344{
5345 return 0;
5346}
5347\f
5348/* Functions concerning relocs. */
5349
5350/* The location from which a PC relative jump should be calculated,
5351 given a PC relative reloc. */
5352
5353long
98027b10 5354md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5355{
5356 return fixp->fx_frag->fr_address + fixp->fx_where;
5357}
5358
5359#ifdef OBJ_XCOFF
5360
5361/* This is called to see whether a fixup should be adjusted to use a
5362 section symbol. We take the opportunity to change a fixup against
5363 a symbol in the TOC subsegment into a reloc against the
5364 corresponding .tc symbol. */
5365
5366int
98027b10 5367ppc_fix_adjustable (fixS *fix)
252b5132 5368{
b782de16
AM		 5369 valueT val = resolve_symbol_value (fix->fx_addsy);
5370 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5371 TC_SYMFIELD_TYPE *tc;
5372
5373 if (symseg == absolute_section)
5374 return 0;
252b5132 5375
252b5132 5376 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5377 && fix->fx_addsy != ppc_toc_csect
b782de16 5378 && symseg == data_section
252b5132
RH		 5379 && val >= ppc_toc_frag->fr_address
5380 && (ppc_after_toc_frag == (fragS *) NULL
5381 || val < ppc_after_toc_frag->fr_address))
5382 {
5383 symbolS *sy;
5384
5385 for (sy = symbol_next (ppc_toc_csect);
5386 sy != (symbolS *) NULL;
5387 sy = symbol_next (sy))
5388 {
b782de16
AM		 5389 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5390
5391 if (sy_tc->class == XMC_TC0)
252b5132 5392 continue;
b782de16 5393 if (sy_tc->class != XMC_TC)
252b5132 5394 break;
b782de16 5395 if (val == resolve_symbol_value (sy))
252b5132
RH		 5396 {
5397 fix->fx_addsy = sy;
5398 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5399 return 0;
5400 }
5401 }
5402
5403 as_bad_where (fix->fx_file, fix->fx_line,
5404 _("symbol in .toc does not match any .tc"));
5405 }
5406
5407 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5408 tc = symbol_get_tc (fix->fx_addsy);
5409 if (tc->subseg == 0
5410 && tc->class != XMC_TC0
5411 && tc->class != XMC_TC
5412 && symseg != bss_section
252b5132 5413 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5414 && (symseg != data_section
252b5132
RH		 5415 || ppc_toc_csect == NULL
5416 || val < ppc_toc_frag->fr_address
5417 || (ppc_after_toc_frag != NULL
5418 && val >= ppc_after_toc_frag->fr_address)))
5419 {
5420 symbolS *csect;
b782de16 5421 symbolS *next_csect;
252b5132 5422
b782de16 5423 if (symseg == text_section)
252b5132 5424 csect = ppc_text_csects;
b782de16 5425 else if (symseg == data_section)
252b5132
RH		 5426 csect = ppc_data_csects;
5427 else
5428 abort ();
5429
5430 /* Skip the initial dummy symbol. */
809ffe0d 5431 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5432
5433 if (csect != (symbolS *) NULL)
5434 {
b782de16
AM		 5435 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5436 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5437 {
5438 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5439 have to look through the full symbol table to see
5440 whether this is the csect we want. Note that we will
5441 only get here if the csect has zero length. */
b782de16
AM		 5442 if (symbol_get_frag (csect)->fr_address == val
5443 && S_GET_VALUE (csect) == val)
252b5132
RH		 5444 {
5445 symbolS *scan;
5446
809ffe0d 5447 for (scan = symbol_next (csect);
252b5132 5448 scan != NULL;
809ffe0d 5449 scan = symbol_next (scan))
252b5132 5450 {
809ffe0d 5451 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5452 break;
5453 if (scan == fix->fx_addsy)
5454 break;
5455 }
5456
5457 /* If we found the symbol before the next csect
99a814a1 5458 symbol, then this is the csect we want. */
252b5132
RH		 5459 if (scan == fix->fx_addsy)
5460 break;
5461 }
5462
b782de16 5463 csect = next_csect;
252b5132
RH		 5464 }
5465
b782de16 5466 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5467 fix->fx_addsy = csect;
5468 }
b782de16 5469 return 0;
252b5132
RH		 5470 }
5471
5472 /* Adjust a reloc against a .lcomm symbol to be against the base
5473 .lcomm. */
b782de16 5474 if (symseg == bss_section
252b5132
RH		 5475 && ! S_IS_EXTERNAL (fix->fx_addsy))
5476 {
b782de16
AM		 5477 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5478
5479 fix->fx_offset += val - resolve_symbol_value (sy);
5480 fix->fx_addsy = sy;
252b5132
RH		 5481 }
5482
5483 return 0;
5484}
5485
5486/* A reloc from one csect to another must be kept. The assembler
5487 will, of course, keep relocs between sections, and it will keep
5488 absolute relocs, but we need to force it to keep PC relative relocs
5489 between two csects in the same section. */
5490
5491int
98027b10 5492ppc_force_relocation (fixS *fix)
252b5132
RH		 5493{
5494 /* At this point fix->fx_addsy should already have been converted to
5495 a csect symbol. If the csect does not include the fragment, then
5496 we need to force the relocation. */
5497 if (fix->fx_pcrel
5498 && fix->fx_addsy != NULL
809ffe0d
ILT		 5499 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5500 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5501 > fix->fx_frag->fr_address)
5502 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5503 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5504 <= fix->fx_frag->fr_address))))
5505 return 1;
5506
ae6063d4 5507 return generic_force_reloc (fix);
252b5132
RH		 5508}
5509
5510#endif /* OBJ_XCOFF */
5511
0baf16f2 5512#ifdef OBJ_ELF
a161fe53
AM		 5513/* If this function returns non-zero, it guarantees that a relocation
5514 will be emitted for a fixup. */
5515
5516int
98027b10 5517ppc_force_relocation (fixS *fix)
a161fe53
AM		 5518{
5519 /* Branch prediction relocations must force a relocation, as must
5520 the vtable description relocs. */
5521 switch (fix->fx_r_type)
5522 {
5523 case BFD_RELOC_PPC_B16_BRTAKEN:
5524 case BFD_RELOC_PPC_B16_BRNTAKEN:
5525 case BFD_RELOC_PPC_BA16_BRTAKEN:
5526 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5527 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5528 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5529 return 1;
5530 default:
5531 break;
5532 }
5533
cdba85ec
AM		 5534 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5535 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5536 return 1;
5537
ae6063d4 5538 return generic_force_reloc (fix);
a161fe53
AM		 5539}
5540
0baf16f2 5541int
98027b10 5542ppc_fix_adjustable (fixS *fix)
252b5132 5543{
0baf16f2
AM		 5544 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5545 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5546 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5547 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5548 && fix->fx_r_type != BFD_RELOC_GPREL16
5549 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5550 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5551 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5552 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5553}
0baf16f2 5554#endif
252b5132 5555
3aeeedbb
AM		 5556/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5557 rs_align_code frag. */
5558
5559void
5560ppc_handle_align (struct frag *fragP)
5561{
5562 valueT count = (fragP->fr_next->fr_address
5563 - (fragP->fr_address + fragP->fr_fix));
5564
5565 if (count != 0 && (count & 3) == 0)
5566 {
5567 char *dest = fragP->fr_literal + fragP->fr_fix;
5568
5569 fragP->fr_var = 4;
5570 md_number_to_chars (dest, 0x60000000, 4);
5571
5572 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5573 {
5574 /* For power6, we want the last nop to be a group terminating
5575 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5576 immediately after this one, with its address set to the last
5577 nop location. This will automatically reduce the number of
5578 nops in the current frag by one. */
5579 if (count > 4)
5580 {
5581 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5582
5583 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5584 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5585 group_nop->fr_fix = 0;
5586 group_nop->fr_offset = 1;
5587 group_nop->fr_type = rs_fill;
5588 fragP->fr_next = group_nop;
5589 dest = group_nop->fr_literal;
5590 }
5591
5592 md_number_to_chars (dest, 0x60210000, 4);
5593 }
5594 }
5595}
5596
252b5132
RH		 5597/* Apply a fixup to the object code. This is called for all the
5598 fixups we generated by the call to fix_new_exp, above. In the call
5599 above we used a reloc code which was the largest legal reloc code
5600 plus the operand index. Here we undo that to recover the operand
5601 index. At this point all symbol values should be fully resolved,
5602 and we attempt to completely resolve the reloc. If we can not do
5603 that, we determine the correct reloc code and put it back in the
5604 fixup. */
5605
94f592af 5606void
98027b10 5607md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5608{
94f592af 5609 valueT value = * valP;
252b5132
RH		 5610
5611#ifdef OBJ_ELF
94f592af 5612 if (fixP->fx_addsy != NULL)
252b5132 5613 {
a161fe53 5614 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5615 if (fixP->fx_pcrel)
5616 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5617 }
5618 else
94f592af 5619 fixP->fx_done = 1;
252b5132 5620#else
a161fe53 5621 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5622 the symbol values. If we are doing this relocation the code in
5623 write.c is going to call bfd_install_relocation, which is also
5624 going to use the symbol value. That means that if the reloc is
5625 fully resolved we want to use *valP since bfd_install_relocation is
5626 not being used.
252b5132 5627 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5628 *valP, and must use fx_offset instead. However, if the reloc
5629 is PC relative, we do want to use *valP since it includes the
252b5132 5630 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5631 if (fixP->fx_addsy == (symbolS *) NULL)
5632 fixP->fx_done = 1;
5633
5634 else if (fixP->fx_pcrel)
5635 ;
5636
252b5132 5637 else
a161fe53
AM		 5638 value = fixP->fx_offset;
5639#endif
5640
5641 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5642 {
a161fe53
AM		 5643 /* We can't actually support subtracting a symbol. */
5644 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5645 }
252b5132 5646
94f592af 5647 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5648 {
5649 int opindex;
5650 const struct powerpc_operand *operand;
5651 char *where;
5652 unsigned long insn;
5653
94f592af 5654 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5655
5656 operand = &powerpc_operands[opindex];
5657
5658#ifdef OBJ_XCOFF
0baf16f2
AM		 5659 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5660 does not generate a reloc. It uses the offset of `sym' within its
5661 csect. Other usages, such as `.long sym', generate relocs. This
5662 is the documented behaviour of non-TOC symbols. */
252b5132 5663 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5664 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5665 && operand->shift == 0
2b3c4602 5666 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5667 && fixP->fx_addsy != NULL
5668 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5669 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5670 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5671 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5672 {
94f592af
NC		 5673 value = fixP->fx_offset;
5674 fixP->fx_done = 1;
252b5132
RH		 5675 }
5676#endif
5677
5678 /* Fetch the instruction, insert the fully resolved operand
5679 value, and stuff the instruction back again. */
94f592af 5680 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5681 if (target_big_endian)
5682 insn = bfd_getb32 ((unsigned char *) where);
5683 else
5684 insn = bfd_getl32 ((unsigned char *) where);
5685 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5686 fixP->tc_fix_data.ppc_cpu,
94f592af 5687 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5688 if (target_big_endian)
5689 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5690 else
5691 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5692
94f592af
NC		 5693 if (fixP->fx_done)
5694 /* Nothing else to do here. */
5695 return;
252b5132 5696
94f592af 5697 assert (fixP->fx_addsy != NULL);
0baf16f2 5698
252b5132
RH		 5699 /* Determine a BFD reloc value based on the operand information.
5700 We are only prepared to turn a few of the operands into
0baf16f2 5701 relocs. */
11b37b7b 5702 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5703 && operand->bitm == 0x3fffffc
11b37b7b 5704 && operand->shift == 0)
94f592af 5705 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5706 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5707 && operand->bitm == 0xfffc
11b37b7b 5708 && operand->shift == 0)
95210096
AM		 5709 {
5710 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5711#ifdef OBJ_XCOFF
5712 fixP->fx_size = 2;
5713 if (target_big_endian)
5714 fixP->fx_where += 2;
5715#endif
5716 }
11b37b7b 5717 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5718 && operand->bitm == 0x3fffffc
11b37b7b 5719 && operand->shift == 0)
94f592af 5720 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5721 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5722 && operand->bitm == 0xfffc
11b37b7b 5723 && operand->shift == 0)
95210096
AM		 5724 {
5725 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5726#ifdef OBJ_XCOFF
5727 fixP->fx_size = 2;
5728 if (target_big_endian)
5729 fixP->fx_where += 2;
5730#endif
5731 }
0baf16f2 5732#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5733 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5734 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5735 && operand->shift == 0)
11b37b7b 5736 {
a7fc733f
AM		 5737 if (ppc_is_toc_sym (fixP->fx_addsy))
5738 {
5739 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5740#ifdef OBJ_ELF
a7fc733f
AM		 5741 if (ppc_obj64
5742 && (operand->flags & PPC_OPERAND_DS) != 0)
5743 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5744#endif
5745 }
5746 else
5747 {
5748 fixP->fx_r_type = BFD_RELOC_16;
5749#ifdef OBJ_ELF
5750 if (ppc_obj64
5751 && (operand->flags & PPC_OPERAND_DS) != 0)
5752 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5753#endif
a7fc733f 5754 }
94f592af 5755 fixP->fx_size = 2;
11b37b7b 5756 if (target_big_endian)
94f592af 5757 fixP->fx_where += 2;
11b37b7b 5758 }
0baf16f2 5759#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5760 else
252b5132
RH		 5761 {
5762 char *sfile;
5763 unsigned int sline;
5764
5765 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5766 symbol. */
94f592af
NC		 5767 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5768 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5769 _("unresolved expression that must be resolved"));
5770 else
94f592af 5771 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5772 _("unsupported relocation against %s"),
94f592af
NC		 5773 S_GET_NAME (fixP->fx_addsy));
5774 fixP->fx_done = 1;
5775 return;
252b5132
RH		 5776 }
5777 }
5778 else
5779 {
5780#ifdef OBJ_ELF
94f592af 5781 ppc_elf_validate_fix (fixP, seg);
252b5132 5782#endif
94f592af 5783 switch (fixP->fx_r_type)
252b5132 5784 {
252b5132 5785 case BFD_RELOC_CTOR:
2b3c4602 5786 if (ppc_obj64)
9c7977b3
AM		 5787 goto ctor64;
5788 /* fall through */
5789
0baf16f2 5790 case BFD_RELOC_32:
94f592af
NC		 5791 if (fixP->fx_pcrel)
5792 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5793 /* fall through */
252b5132
RH		 5794
5795 case BFD_RELOC_RVA:
5796 case BFD_RELOC_32_PCREL:
252b5132 5797 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5798 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5799 value, 4);
5800 break;
5801
7f6d05e8 5802 case BFD_RELOC_64:
9c7977b3 5803 ctor64:
94f592af
NC		 5804 if (fixP->fx_pcrel)
5805 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5806 /* fall through */
0baf16f2 5807
7f6d05e8 5808 case BFD_RELOC_64_PCREL:
94f592af 5809 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5810 value, 8);
81d4177b 5811 break;
0baf16f2 5812
252b5132
RH		 5813 case BFD_RELOC_GPREL16:
5814 case BFD_RELOC_16_GOT_PCREL:
5815 case BFD_RELOC_16_GOTOFF:
5816 case BFD_RELOC_LO16_GOTOFF:
5817 case BFD_RELOC_HI16_GOTOFF:
5818 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5819 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5820 case BFD_RELOC_LO16_BASEREL:
5821 case BFD_RELOC_HI16_BASEREL:
5822 case BFD_RELOC_HI16_S_BASEREL:
5823 case BFD_RELOC_PPC_EMB_NADDR16:
5824 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5825 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5826 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5827 case BFD_RELOC_PPC_EMB_SDAI16:
5828 case BFD_RELOC_PPC_EMB_SDA2REL:
5829 case BFD_RELOC_PPC_EMB_SDA2I16:
5830 case BFD_RELOC_PPC_EMB_RELSEC16:
5831 case BFD_RELOC_PPC_EMB_RELST_LO:
5832 case BFD_RELOC_PPC_EMB_RELST_HI:
5833 case BFD_RELOC_PPC_EMB_RELST_HA:
5834 case BFD_RELOC_PPC_EMB_RELSDA:
5835 case BFD_RELOC_PPC_TOC16:
0baf16f2 5836#ifdef OBJ_ELF
0baf16f2
AM		 5837 case BFD_RELOC_PPC64_TOC16_LO:
5838 case BFD_RELOC_PPC64_TOC16_HI:
5839 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5840#endif
94f592af 5841 if (fixP->fx_pcrel)
252b5132 5842 {
94f592af
NC		 5843 if (fixP->fx_addsy != NULL)
5844 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5845 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5846 bfd_get_reloc_code_name (fixP->fx_r_type),
5847 S_GET_NAME (fixP->fx_addsy));
252b5132 5848 else
94f592af 5849 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5850 _("cannot emit PC relative %s relocation"),
94f592af 5851 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5852 }
5853
94f592af 5854 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5855 value, 2);
5856 break;
5857
3c9d25f4
AM		 5858 case BFD_RELOC_16:
5859 if (fixP->fx_pcrel)
5860 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5861 /* fall through */
5862
5863 case BFD_RELOC_16_PCREL:
5864 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5865 value, 2);
5866 break;
5867
5868 case BFD_RELOC_LO16:
5869 if (fixP->fx_pcrel)
5870 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5871 /* fall through */
5872
5873 case BFD_RELOC_LO16_PCREL:
5874 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5875 value, 2);
5876 break;
5877
252b5132
RH		 5878 /* This case happens when you write, for example,
5879 lis %r3,(L1-L2)@ha
5880 where L1 and L2 are defined later. */
5881 case BFD_RELOC_HI16:
94f592af 5882 if (fixP->fx_pcrel)
3c9d25f4
AM		 5883 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5884 /* fall through */
5885
5886 case BFD_RELOC_HI16_PCREL:
94f592af 5887 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5888 PPC_HI (value), 2);
252b5132 5889 break;
0baf16f2 5890
252b5132 5891 case BFD_RELOC_HI16_S:
94f592af 5892 if (fixP->fx_pcrel)
3c9d25f4
AM		 5893 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5894 /* fall through */
5895
5896 case BFD_RELOC_HI16_S_PCREL:
94f592af 5897 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5898 PPC_HA (value), 2);
5899 break;
5900
5901#ifdef OBJ_ELF
0baf16f2 5902 case BFD_RELOC_PPC64_HIGHER:
94f592af 5903 if (fixP->fx_pcrel)
0baf16f2 5904 abort ();
94f592af 5905 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5906 PPC_HIGHER (value), 2);
252b5132
RH		 5907 break;
5908
0baf16f2 5909 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5910 if (fixP->fx_pcrel)
0baf16f2 5911 abort ();
94f592af 5912 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5913 PPC_HIGHERA (value), 2);
5914 break;
5915
5916 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5917 if (fixP->fx_pcrel)
0baf16f2 5918 abort ();
94f592af 5919 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5920 PPC_HIGHEST (value), 2);
5921 break;
5922
5923 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5924 if (fixP->fx_pcrel)
0baf16f2 5925 abort ();
94f592af 5926 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5927 PPC_HIGHESTA (value), 2);
5928 break;
5929
5930 case BFD_RELOC_PPC64_ADDR16_DS:
5931 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5932 case BFD_RELOC_PPC64_GOT16_DS:
5933 case BFD_RELOC_PPC64_GOT16_LO_DS:
5934 case BFD_RELOC_PPC64_PLT16_LO_DS:
5935 case BFD_RELOC_PPC64_SECTOFF_DS:
5936 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5937 case BFD_RELOC_PPC64_TOC16_DS:
5938 case BFD_RELOC_PPC64_TOC16_LO_DS:
5939 case BFD_RELOC_PPC64_PLTGOT16_DS:
5940 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5941 if (fixP->fx_pcrel)
0baf16f2
AM		 5942 abort ();
5943 {
2132e3a3 5944 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5945 unsigned long val, mask;
0baf16f2
AM		 5946
5947 if (target_big_endian)
adadcc0c 5948 val = bfd_getb32 (where - 2);
0baf16f2 5949 else
adadcc0c
AM		 5950 val = bfd_getl32 (where);
5951 mask = 0xfffc;
5952 /* lq insns reserve the four lsbs. */
5953 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5954 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5955 mask = 0xfff0;
5956 val |= value & mask;
0baf16f2
AM		 5957 if (target_big_endian)
5958 bfd_putb16 ((bfd_vma) val, where);
5959 else
5960 bfd_putl16 ((bfd_vma) val, where);
5961 }
5962 break;
cdba85ec 5963
ba0b2174
AM		 5964 case BFD_RELOC_PPC_B16_BRTAKEN:
5965 case BFD_RELOC_PPC_B16_BRNTAKEN:
5966 case BFD_RELOC_PPC_BA16_BRTAKEN:
5967 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5968 break;
5969
cdba85ec 5970 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5971 break;
5972
cdba85ec
AM		 5973 case BFD_RELOC_PPC_DTPMOD:
5974 case BFD_RELOC_PPC_TPREL16:
5975 case BFD_RELOC_PPC_TPREL16_LO:
5976 case BFD_RELOC_PPC_TPREL16_HI:
5977 case BFD_RELOC_PPC_TPREL16_HA:
5978 case BFD_RELOC_PPC_TPREL:
5979 case BFD_RELOC_PPC_DTPREL16:
5980 case BFD_RELOC_PPC_DTPREL16_LO:
5981 case BFD_RELOC_PPC_DTPREL16_HI:
5982 case BFD_RELOC_PPC_DTPREL16_HA:
5983 case BFD_RELOC_PPC_DTPREL:
5984 case BFD_RELOC_PPC_GOT_TLSGD16:
5985 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5986 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5987 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5988 case BFD_RELOC_PPC_GOT_TLSLD16:
5989 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5990 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5991 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5992 case BFD_RELOC_PPC_GOT_TPREL16:
5993 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5994 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5995 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5996 case BFD_RELOC_PPC_GOT_DTPREL16:
5997 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5998 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5999 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6000 case BFD_RELOC_PPC64_TPREL16_DS:
6001 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6002 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6003 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6004 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6005 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6006 case BFD_RELOC_PPC64_DTPREL16_DS:
6007 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6008 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6009 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6010 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6011 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6012 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6013 break;
0baf16f2 6014#endif
252b5132 6015 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6016 bytes, rather than 2, so offset it here appropriately. */
252b5132 6017 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6018 if (fixP->fx_pcrel)
252b5132
RH		 6019 abort ();
6020
94f592af 6021 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6022 + ((target_big_endian) ? 2 : 0),
6023 value, 2);
6024 break;
6025
6026 case BFD_RELOC_8:
94f592af 6027 if (fixP->fx_pcrel)
31a91399
NC		 6028 {
6029 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6030 ".byte <undefined_symbol> - ." */
31a91399
NC		 6031 if (fixP->fx_addsy)
6032 as_bad (_("Unable to handle reference to symbol %s"),
6033 S_GET_NAME (fixP->fx_addsy));
6034 else
6035 as_bad (_("Unable to resolve expression"));
6036 fixP->fx_done = 1;
6037 }
6038 else
6039 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6040 value, 1);
252b5132
RH		 6041 break;
6042
6043 case BFD_RELOC_24_PLT_PCREL:
6044 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6045 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6046 abort ();
6047
94f592af 6048 if (fixP->fx_done)
99a814a1
AM		 6049 {
6050 char *where;
6051 unsigned long insn;
6052
6053 /* Fetch the instruction, insert the fully resolved operand
6054 value, and stuff the instruction back again. */
94f592af 6055 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6056 if (target_big_endian)
6057 insn = bfd_getb32 ((unsigned char *) where);
6058 else
6059 insn = bfd_getl32 ((unsigned char *) where);
6060 if ((value & 3) != 0)
94f592af 6061 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6062 _("must branch to an address a multiple of 4"));
6063 if ((offsetT) value < -0x40000000
6064 || (offsetT) value >= 0x40000000)
94f592af 6065 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6066 _("@local or @plt branch destination is too far away, %ld bytes"),
6067 (long) value);
6068 insn = insn | (value & 0x03fffffc);
6069 if (target_big_endian)
6070 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6071 else
6072 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6073 }
252b5132
RH		 6074 break;
6075
6076 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6077 fixP->fx_done = 0;
6078 if (fixP->fx_addsy
6079 && !S_IS_DEFINED (fixP->fx_addsy)
6080 && !S_IS_WEAK (fixP->fx_addsy))
6081 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6082 break;
6083
6084 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6085 fixP->fx_done = 0;
252b5132
RH		 6086 break;
6087
0baf16f2 6088#ifdef OBJ_ELF
0baf16f2
AM		 6089 /* Generated by reference to `sym@tocbase'. The sym is
6090 ignored by the linker. */
6091 case BFD_RELOC_PPC64_TOC:
94f592af 6092 fixP->fx_done = 0;
0baf16f2 6093 break;
0baf16f2 6094#endif
252b5132 6095 default:
bc805888 6096 fprintf (stderr,
94f592af 6097 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6098 fflush (stderr);
252b5132
RH		 6099 abort ();
6100 }
6101 }
6102
6103#ifdef OBJ_ELF
94f592af 6104 fixP->fx_addnumber = value;
4e6935a6
AM		 6105
6106 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6107 from the section contents. If we are going to be emitting a reloc
6108 then the section contents are immaterial, so don't warn if they
6109 happen to overflow. Leave such warnings to ld. */
6110 if (!fixP->fx_done)
6111 fixP->fx_no_overflow = 1;
252b5132 6112#else
94f592af
NC		 6113 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6114 fixP->fx_addnumber = 0;
252b5132
RH		 6115 else
6116 {
6117#ifdef TE_PE
94f592af 6118 fixP->fx_addnumber = 0;
252b5132 6119#else
8edcbfcd
TG		 6120 /* We want to use the offset within the toc, not the actual VMA
6121 of the symbol. */
94f592af 6122 fixP->fx_addnumber =
8edcbfcd
TG		 6123 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6124 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6125#endif
6126 }
6127#endif
252b5132
RH		 6128}
6129
6130/* Generate a reloc for a fixup. */
6131
6132arelent *
98027b10 6133tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6134{
6135 arelent *reloc;
6136
6137 reloc = (arelent *) xmalloc (sizeof (arelent));
6138
49309057
ILT		 6139 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6140 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6141 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6142 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6143 if (reloc->howto == (reloc_howto_type *) NULL)
6144 {
6145 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6146 _("reloc %d not supported by object file format"),
6147 (int) fixp->fx_r_type);
252b5132
RH		 6148 return NULL;
6149 }
6150 reloc->addend = fixp->fx_addnumber;
6151
6152 return reloc;
6153}
75e21f08
JJ		 6154
6155void
98027b10 6156ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6157{
6158 cfi_add_CFA_def_cfa (1, 0);
6159}
6160
6161int
1df69f4f 6162tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6163{
6164 unsigned int regnum = -1;
6165 unsigned int i;
6166 const char *p;
6167 char *q;
6168 static struct { char *name; int dw2regnum; } regnames[] =
6169 {
6170 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6171 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6172 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6173 { "spe_acc", 111 }, { "spefscr", 112 }
6174 };
6175
6176 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6177 if (strcmp (regnames[i].name, regname) == 0)
6178 return regnames[i].dw2regnum;
6179
6180 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6181 {
6182 p = regname + 1 + (regname[1] == '.');
6183 regnum = strtoul (p, &q, 10);
6184 if (p == q || *q || regnum >= 32)
6185 return -1;
6186 if (regname[0] == 'f')
b7d7dc63 6187 regnum += 32;
75e21f08 6188 else if (regname[0] == 'v')
b7d7dc63 6189 regnum += 77;
75e21f08
JJ		 6190 }
6191 else if (regname[0] == 'c' && regname[1] == 'r')
6192 {
6193 p = regname + 2 + (regname[2] == '.');
6194 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6195 return -1;
75e21f08
JJ		 6196 regnum = p[0] - '0' + 68;
6197 }
6198 return regnum;
6199}
GDB Binutils - Deliverables
This page took 0.723609 seconds and 4 git commands to generate.