projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
gas/
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
ed84b57b 3 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
066be9f7
PB		 361
362 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
363 { "f.33", 33 },
364 { "f.34", 34 },
365 { "f.35", 35 },
366 { "f.36", 36 },
367 { "f.37", 37 },
368 { "f.38", 38 },
369 { "f.39", 39 },
81d4177b 370 { "f.4", 4 },
066be9f7
PB		 371 { "f.40", 40 },
372 { "f.41", 41 },
373 { "f.42", 42 },
374 { "f.43", 43 },
375 { "f.44", 44 },
376 { "f.45", 45 },
377 { "f.46", 46 },
378 { "f.47", 47 },
379 { "f.48", 48 },
380 { "f.49", 49 },
81d4177b 381 { "f.5", 5 },
066be9f7
PB		 382 { "f.50", 50 },
383 { "f.51", 51 },
384 { "f.52", 52 },
385 { "f.53", 53 },
386 { "f.54", 54 },
387 { "f.55", 55 },
388 { "f.56", 56 },
389 { "f.57", 57 },
390 { "f.58", 58 },
391 { "f.59", 59 },
81d4177b 392 { "f.6", 6 },
066be9f7
PB		 393 { "f.60", 60 },
394 { "f.61", 61 },
395 { "f.62", 62 },
396 { "f.63", 63 },
81d4177b
KH		 397 { "f.7", 7 },
398 { "f.8", 8 },
399 { "f.9", 9 },
400
401 { "f0", 0 },
402 { "f1", 1 },
403 { "f10", 10 },
404 { "f11", 11 },
405 { "f12", 12 },
406 { "f13", 13 },
407 { "f14", 14 },
408 { "f15", 15 },
409 { "f16", 16 },
410 { "f17", 17 },
411 { "f18", 18 },
412 { "f19", 19 },
413 { "f2", 2 },
414 { "f20", 20 },
415 { "f21", 21 },
416 { "f22", 22 },
417 { "f23", 23 },
418 { "f24", 24 },
419 { "f25", 25 },
420 { "f26", 26 },
421 { "f27", 27 },
422 { "f28", 28 },
423 { "f29", 29 },
424 { "f3", 3 },
252b5132
RH		 425 { "f30", 30 },
426 { "f31", 31 },
066be9f7
PB		 427
428 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
429 { "f33", 33 },
430 { "f34", 34 },
431 { "f35", 35 },
432 { "f36", 36 },
433 { "f37", 37 },
434 { "f38", 38 },
435 { "f39", 39 },
81d4177b 436 { "f4", 4 },
066be9f7
PB		 437 { "f40", 40 },
438 { "f41", 41 },
439 { "f42", 42 },
440 { "f43", 43 },
441 { "f44", 44 },
442 { "f45", 45 },
443 { "f46", 46 },
444 { "f47", 47 },
445 { "f48", 48 },
446 { "f49", 49 },
81d4177b 447 { "f5", 5 },
066be9f7
PB		 448 { "f50", 50 },
449 { "f51", 51 },
450 { "f52", 52 },
451 { "f53", 53 },
452 { "f54", 54 },
453 { "f55", 55 },
454 { "f56", 56 },
455 { "f57", 57 },
456 { "f58", 58 },
457 { "f59", 59 },
81d4177b 458 { "f6", 6 },
066be9f7
PB		 459 { "f60", 60 },
460 { "f61", 61 },
461 { "f62", 62 },
462 { "f63", 63 },
81d4177b
KH		 463 { "f7", 7 },
464 { "f8", 8 },
465 { "f9", 9 },
252b5132
RH		 466
467 { "fpscr", 0 },
468
c3d65c1c
BE		 469 /* Quantization registers used with pair single instructions. */
470 { "gqr.0", 0 },
471 { "gqr.1", 1 },
472 { "gqr.2", 2 },
473 { "gqr.3", 3 },
474 { "gqr.4", 4 },
475 { "gqr.5", 5 },
476 { "gqr.6", 6 },
477 { "gqr.7", 7 },
478 { "gqr0", 0 },
479 { "gqr1", 1 },
480 { "gqr2", 2 },
481 { "gqr3", 3 },
482 { "gqr4", 4 },
483 { "gqr5", 5 },
484 { "gqr6", 6 },
485 { "gqr7", 7 },
486
252b5132
RH		 487 { "lr", 8 }, /* Link Register */
488
489 { "pmr", 0 },
490
491 { "r.0", 0 }, /* General Purpose Registers */
492 { "r.1", 1 },
493 { "r.10", 10 },
494 { "r.11", 11 },
495 { "r.12", 12 },
496 { "r.13", 13 },
497 { "r.14", 14 },
498 { "r.15", 15 },
499 { "r.16", 16 },
500 { "r.17", 17 },
501 { "r.18", 18 },
502 { "r.19", 19 },
503 { "r.2", 2 },
504 { "r.20", 20 },
505 { "r.21", 21 },
506 { "r.22", 22 },
507 { "r.23", 23 },
508 { "r.24", 24 },
509 { "r.25", 25 },
510 { "r.26", 26 },
511 { "r.27", 27 },
512 { "r.28", 28 },
513 { "r.29", 29 },
514 { "r.3", 3 },
515 { "r.30", 30 },
516 { "r.31", 31 },
517 { "r.4", 4 },
518 { "r.5", 5 },
519 { "r.6", 6 },
520 { "r.7", 7 },
521 { "r.8", 8 },
522 { "r.9", 9 },
523
524 { "r.sp", 1 }, /* Stack Pointer */
525
526 { "r.toc", 2 }, /* Pointer to the table of contents */
527
528 { "r0", 0 }, /* More general purpose registers */
529 { "r1", 1 },
530 { "r10", 10 },
531 { "r11", 11 },
532 { "r12", 12 },
533 { "r13", 13 },
534 { "r14", 14 },
535 { "r15", 15 },
536 { "r16", 16 },
537 { "r17", 17 },
538 { "r18", 18 },
539 { "r19", 19 },
540 { "r2", 2 },
541 { "r20", 20 },
542 { "r21", 21 },
543 { "r22", 22 },
544 { "r23", 23 },
545 { "r24", 24 },
546 { "r25", 25 },
547 { "r26", 26 },
548 { "r27", 27 },
549 { "r28", 28 },
550 { "r29", 29 },
551 { "r3", 3 },
552 { "r30", 30 },
553 { "r31", 31 },
554 { "r4", 4 },
555 { "r5", 5 },
556 { "r6", 6 },
557 { "r7", 7 },
558 { "r8", 8 },
559 { "r9", 9 },
560
561 { "rtoc", 2 }, /* Table of contents */
562
563 { "sdr1", 25 }, /* Storage Description Register 1 */
564
565 { "sp", 1 },
566
567 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
568 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 569
066be9f7 570 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 571 { "v.1", 1 },
572 { "v.10", 10 },
573 { "v.11", 11 },
574 { "v.12", 12 },
575 { "v.13", 13 },
576 { "v.14", 14 },
577 { "v.15", 15 },
578 { "v.16", 16 },
579 { "v.17", 17 },
580 { "v.18", 18 },
581 { "v.19", 19 },
582 { "v.2", 2 },
583 { "v.20", 20 },
584 { "v.21", 21 },
585 { "v.22", 22 },
586 { "v.23", 23 },
587 { "v.24", 24 },
588 { "v.25", 25 },
589 { "v.26", 26 },
590 { "v.27", 27 },
591 { "v.28", 28 },
592 { "v.29", 29 },
593 { "v.3", 3 },
7a899fff
C		 594 { "v.30", 30 },
595 { "v.31", 31 },
81d4177b
KH		 596 { "v.4", 4 },
597 { "v.5", 5 },
598 { "v.6", 6 },
599 { "v.7", 7 },
600 { "v.8", 8 },
601 { "v.9", 9 },
7a899fff
C		 602
603 { "v0", 0 },
81d4177b
KH		 604 { "v1", 1 },
605 { "v10", 10 },
606 { "v11", 11 },
607 { "v12", 12 },
608 { "v13", 13 },
609 { "v14", 14 },
610 { "v15", 15 },
611 { "v16", 16 },
612 { "v17", 17 },
613 { "v18", 18 },
614 { "v19", 19 },
615 { "v2", 2 },
616 { "v20", 20 },
617 { "v21", 21 },
618 { "v22", 22 },
619 { "v23", 23 },
620 { "v24", 24 },
621 { "v25", 25 },
622 { "v26", 26 },
623 { "v27", 27 },
624 { "v28", 28 },
625 { "v29", 29 },
626 { "v3", 3 },
7a899fff
C		 627 { "v30", 30 },
628 { "v31", 31 },
81d4177b
KH		 629 { "v4", 4 },
630 { "v5", 5 },
631 { "v6", 6 },
632 { "v7", 7 },
633 { "v8", 8 },
7a899fff 634 { "v9", 9 },
252b5132 635
066be9f7
PB		 636 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
637 { "vs.1", 1 },
638 { "vs.10", 10 },
639 { "vs.11", 11 },
640 { "vs.12", 12 },
641 { "vs.13", 13 },
642 { "vs.14", 14 },
643 { "vs.15", 15 },
644 { "vs.16", 16 },
645 { "vs.17", 17 },
646 { "vs.18", 18 },
647 { "vs.19", 19 },
648 { "vs.2", 2 },
649 { "vs.20", 20 },
650 { "vs.21", 21 },
651 { "vs.22", 22 },
652 { "vs.23", 23 },
653 { "vs.24", 24 },
654 { "vs.25", 25 },
655 { "vs.26", 26 },
656 { "vs.27", 27 },
657 { "vs.28", 28 },
658 { "vs.29", 29 },
659 { "vs.3", 3 },
660 { "vs.30", 30 },
661 { "vs.31", 31 },
662 { "vs.32", 32 },
663 { "vs.33", 33 },
664 { "vs.34", 34 },
665 { "vs.35", 35 },
666 { "vs.36", 36 },
667 { "vs.37", 37 },
668 { "vs.38", 38 },
669 { "vs.39", 39 },
670 { "vs.4", 4 },
671 { "vs.40", 40 },
672 { "vs.41", 41 },
673 { "vs.42", 42 },
674 { "vs.43", 43 },
675 { "vs.44", 44 },
676 { "vs.45", 45 },
677 { "vs.46", 46 },
678 { "vs.47", 47 },
679 { "vs.48", 48 },
680 { "vs.49", 49 },
681 { "vs.5", 5 },
682 { "vs.50", 50 },
683 { "vs.51", 51 },
684 { "vs.52", 52 },
685 { "vs.53", 53 },
686 { "vs.54", 54 },
687 { "vs.55", 55 },
688 { "vs.56", 56 },
689 { "vs.57", 57 },
690 { "vs.58", 58 },
691 { "vs.59", 59 },
692 { "vs.6", 6 },
693 { "vs.60", 60 },
694 { "vs.61", 61 },
695 { "vs.62", 62 },
696 { "vs.63", 63 },
697 { "vs.7", 7 },
698 { "vs.8", 8 },
699 { "vs.9", 9 },
700
701 { "vs0", 0 },
702 { "vs1", 1 },
703 { "vs10", 10 },
704 { "vs11", 11 },
705 { "vs12", 12 },
706 { "vs13", 13 },
707 { "vs14", 14 },
708 { "vs15", 15 },
709 { "vs16", 16 },
710 { "vs17", 17 },
711 { "vs18", 18 },
712 { "vs19", 19 },
713 { "vs2", 2 },
714 { "vs20", 20 },
715 { "vs21", 21 },
716 { "vs22", 22 },
717 { "vs23", 23 },
718 { "vs24", 24 },
719 { "vs25", 25 },
720 { "vs26", 26 },
721 { "vs27", 27 },
722 { "vs28", 28 },
723 { "vs29", 29 },
724 { "vs3", 3 },
725 { "vs30", 30 },
726 { "vs31", 31 },
727 { "vs32", 32 },
728 { "vs33", 33 },
729 { "vs34", 34 },
730 { "vs35", 35 },
731 { "vs36", 36 },
732 { "vs37", 37 },
733 { "vs38", 38 },
734 { "vs39", 39 },
735 { "vs4", 4 },
736 { "vs40", 40 },
737 { "vs41", 41 },
738 { "vs42", 42 },
739 { "vs43", 43 },
740 { "vs44", 44 },
741 { "vs45", 45 },
742 { "vs46", 46 },
743 { "vs47", 47 },
744 { "vs48", 48 },
745 { "vs49", 49 },
746 { "vs5", 5 },
747 { "vs50", 50 },
748 { "vs51", 51 },
749 { "vs52", 52 },
750 { "vs53", 53 },
751 { "vs54", 54 },
752 { "vs55", 55 },
753 { "vs56", 56 },
754 { "vs57", 57 },
755 { "vs58", 58 },
756 { "vs59", 59 },
757 { "vs6", 6 },
758 { "vs60", 60 },
759 { "vs61", 61 },
760 { "vs62", 62 },
761 { "vs63", 63 },
762 { "vs7", 7 },
763 { "vs8", 8 },
764 { "vs9", 9 },
765
252b5132
RH		 766 { "xer", 1 },
767
768};
769
bc805888 770#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 771
772/* Given NAME, find the register number associated with that name, return
773 the integer value associated with the given name or -1 on failure. */
774
252b5132 775static int
98027b10 776reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 777{
778 int middle, low, high;
779 int cmp;
780
781 low = 0;
782 high = regcount - 1;
783
784 do
785 {
786 middle = (low + high) / 2;
787 cmp = strcasecmp (name, regs[middle].name);
788 if (cmp < 0)
789 high = middle - 1;
790 else if (cmp > 0)
791 low = middle + 1;
792 else
793 return regs[middle].value;
794 }
795 while (low <= high);
796
797 return -1;
798}
799
800/*
99a814a1 801 * Summary of register_name.
252b5132
RH		 802 *
803 * in: Input_line_pointer points to 1st char of operand.
804 *
805 * out: A expressionS.
806 * The operand may have been a register: in this case, X_op == O_register,
807 * X_add_number is set to the register number, and truth is returned.
808 * Input_line_pointer->(next non-blank) char after operand, or is in its
809 * original state.
810 */
811
b34976b6 812static bfd_boolean
98027b10 813register_name (expressionS *expressionP)
252b5132
RH		 814{
815 int reg_number;
816 char *name;
817 char *start;
818 char c;
819
99a814a1 820 /* Find the spelling of the operand. */
252b5132 821 start = name = input_line_pointer;
3882b010 822 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 823 name = ++input_line_pointer;
824
3882b010 825 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 826 return FALSE;
252b5132
RH		 827
828 c = get_symbol_end ();
829 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
830
468cced8
AM		 831 /* Put back the delimiting char. */
832 *input_line_pointer = c;
833
99a814a1 834 /* Look to see if it's in the register table. */
81d4177b 835 if (reg_number >= 0)
252b5132
RH		 836 {
837 expressionP->X_op = O_register;
838 expressionP->X_add_number = reg_number;
81d4177b 839
99a814a1 840 /* Make the rest nice. */
252b5132
RH		 841 expressionP->X_add_symbol = NULL;
842 expressionP->X_op_symbol = NULL;
b34976b6 843 return TRUE;
252b5132 844 }
468cced8
AM		 845
846 /* Reset the line as if we had not done anything. */
847 input_line_pointer = start;
b34976b6 848 return FALSE;
252b5132
RH		 849}
850\f
851/* This function is called for each symbol seen in an expression. It
852 handles the special parsing which PowerPC assemblers are supposed
853 to use for condition codes. */
854
855/* Whether to do the special parsing. */
b34976b6 856static bfd_boolean cr_operand;
252b5132
RH		 857
858/* Names to recognize in a condition code. This table is sorted. */
859static const struct pd_reg cr_names[] =
860{
861 { "cr0", 0 },
862 { "cr1", 1 },
863 { "cr2", 2 },
864 { "cr3", 3 },
865 { "cr4", 4 },
866 { "cr5", 5 },
867 { "cr6", 6 },
868 { "cr7", 7 },
869 { "eq", 2 },
870 { "gt", 1 },
871 { "lt", 0 },
872 { "so", 3 },
873 { "un", 3 }
874};
875
876/* Parsing function. This returns non-zero if it recognized an
877 expression. */
878
879int
98027b10 880ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 881{
882 int val;
883
884 if (! cr_operand)
885 return 0;
886
13abbae3
AM		 887 if (*name == '%')
888 ++name;
252b5132
RH		 889 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
890 name);
891 if (val < 0)
892 return 0;
893
894 expr->X_op = O_constant;
895 expr->X_add_number = val;
896
897 return 1;
898}
899\f
900/* Local variables. */
901
2b3c4602
AM		 902/* Whether to target xcoff64/elf64. */
903static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 904
252b5132
RH		 905/* Opcode hash table. */
906static struct hash_control *ppc_hash;
907
908/* Macro hash table. */
909static struct hash_control *ppc_macro_hash;
910
911#ifdef OBJ_ELF
99a814a1 912/* What type of shared library support to use. */
5d6f4f16 913static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 914
99a814a1 915/* Flags to set in the elf header. */
252b5132
RH		 916static flagword ppc_flags = 0;
917
918/* Whether this is Solaris or not. */
919#ifdef TARGET_SOLARIS_COMMENT
b34976b6 920#define SOLARIS_P TRUE
252b5132 921#else
b34976b6 922#define SOLARIS_P FALSE
252b5132
RH		 923#endif
924
b34976b6 925static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 926#endif
927
928#ifdef OBJ_XCOFF
929
930/* The RS/6000 assembler uses the .csect pseudo-op to generate code
931 using a bunch of different sections. These assembler sections,
932 however, are all encompassed within the .text or .data sections of
933 the final output file. We handle this by using different
934 subsegments within these main segments. */
935
936/* Next subsegment to allocate within the .text segment. */
937static subsegT ppc_text_subsegment = 2;
938
939/* Linked list of csects in the text section. */
940static symbolS *ppc_text_csects;
941
942/* Next subsegment to allocate within the .data segment. */
943static subsegT ppc_data_subsegment = 2;
944
945/* Linked list of csects in the data section. */
946static symbolS *ppc_data_csects;
947
948/* The current csect. */
949static symbolS *ppc_current_csect;
950
951/* The RS/6000 assembler uses a TOC which holds addresses of functions
952 and variables. Symbols are put in the TOC with the .tc pseudo-op.
953 A special relocation is used when accessing TOC entries. We handle
954 the TOC as a subsegment within the .data segment. We set it up if
955 we see a .toc pseudo-op, and save the csect symbol here. */
956static symbolS *ppc_toc_csect;
957
958/* The first frag in the TOC subsegment. */
959static fragS *ppc_toc_frag;
960
961/* The first frag in the first subsegment after the TOC in the .data
962 segment. NULL if there are no subsegments after the TOC. */
963static fragS *ppc_after_toc_frag;
964
965/* The current static block. */
966static symbolS *ppc_current_block;
967
968/* The COFF debugging section; set by md_begin. This is not the
969 .debug section, but is instead the secret BFD section which will
970 cause BFD to set the section number of a symbol to N_DEBUG. */
971static asection *ppc_coff_debug_section;
972
973#endif /* OBJ_XCOFF */
974
975#ifdef TE_PE
976
977/* Various sections that we need for PE coff support. */
978static segT ydata_section;
979static segT pdata_section;
980static segT reldata_section;
981static segT rdata_section;
982static segT tocdata_section;
983
81d4177b 984/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 985static segT ppc_previous_section;
986static segT ppc_current_section;
987
988#endif /* TE_PE */
989
990#ifdef OBJ_ELF
991symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 992#define PPC_APUINFO_ISEL 0x40
993#define PPC_APUINFO_PMR 0x41
994#define PPC_APUINFO_RFMCI 0x42
995#define PPC_APUINFO_CACHELCK 0x43
996#define PPC_APUINFO_SPE 0x100
997#define PPC_APUINFO_EFS 0x101
998#define PPC_APUINFO_BRLOCK 0x102
999
b34976b6
AM		 1000/*
1001 * We keep a list of APUinfo
6a0c61b7
EZ		 1002 */
1003unsigned long *ppc_apuinfo_list;
1004unsigned int ppc_apuinfo_num;
1005unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1006#endif /* OBJ_ELF */
1007\f
1008#ifdef OBJ_ELF
15c1449b 1009const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1010#else
15c1449b 1011const char *const md_shortopts = "um:";
252b5132 1012#endif
15c1449b 1013const struct option md_longopts[] = {
252b5132
RH		 1014 {NULL, no_argument, NULL, 0}
1015};
15c1449b 1016const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1017
1018int
98027b10 1019md_parse_option (int c, char *arg)
252b5132 1020{
69fe9ce5
AM		 1021 ppc_cpu_t new_cpu;
1022
252b5132
RH		 1023 switch (c)
1024 {
1025 case 'u':
1026 /* -u means that any undefined symbols should be treated as
1027 external, which is the default for gas anyhow. */
1028 break;
1029
1030#ifdef OBJ_ELF
1031 case 'l':
1032 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1033 sake, recognize -be also. */
252b5132
RH		 1034 if (strcmp (arg, "e") == 0)
1035 {
1036 target_big_endian = 0;
1037 set_target_endian = 1;
1038 }
1039 else
1040 return 0;
1041
1042 break;
1043
1044 case 'b':
1045 if (strcmp (arg, "e") == 0)
1046 {
1047 target_big_endian = 1;
1048 set_target_endian = 1;
1049 }
1050 else
1051 return 0;
1052
1053 break;
1054
1055 case 'K':
99a814a1 1056 /* Recognize -K PIC. */
252b5132
RH		 1057 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1058 {
1059 shlib = SHLIB_PIC;
1060 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1061 }
1062 else
1063 return 0;
1064
1065 break;
1066#endif
1067
7f6d05e8
CP		 1068 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1069 case 'a':
1070 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1071 {
1072#ifdef BFD64
1073 ppc_obj64 = 1;
1074#else
1075 as_fatal (_("%s unsupported"), "-a64");
1076#endif
1077 }
7f6d05e8 1078 else if (strcmp (arg, "32") == 0)
2b3c4602 1079 ppc_obj64 = 0;
7f6d05e8
CP		 1080 else
1081 return 0;
1082 break;
81d4177b 1083
252b5132 1084 case 'm':
69fe9ce5
AM		 1085 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1086 ppc_cpu = new_cpu;
252b5132
RH		 1087
1088 else if (strcmp (arg, "regnames") == 0)
b34976b6 1089 reg_names_p = TRUE;
252b5132
RH		 1090
1091 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1092 reg_names_p = FALSE;
252b5132
RH		 1093
1094#ifdef OBJ_ELF
99a814a1
AM		 1095 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1096 that require relocation. */
252b5132
RH		 1097 else if (strcmp (arg, "relocatable") == 0)
1098 {
5d6f4f16 1099 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1100 ppc_flags |= EF_PPC_RELOCATABLE;
1101 }
1102
1103 else if (strcmp (arg, "relocatable-lib") == 0)
1104 {
5d6f4f16 1105 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1106 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1107 }
1108
99a814a1 1109 /* -memb, set embedded bit. */
252b5132
RH		 1110 else if (strcmp (arg, "emb") == 0)
1111 ppc_flags |= EF_PPC_EMB;
1112
99a814a1
AM		 1113 /* -mlittle/-mbig set the endianess. */
1114 else if (strcmp (arg, "little") == 0
1115 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1116 {
1117 target_big_endian = 0;
1118 set_target_endian = 1;
1119 }
1120
1121 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1122 {
1123 target_big_endian = 1;
1124 set_target_endian = 1;
1125 }
1126
1127 else if (strcmp (arg, "solaris") == 0)
1128 {
b34976b6 1129 msolaris = TRUE;
252b5132
RH		 1130 ppc_comment_chars = ppc_solaris_comment_chars;
1131 }
1132
1133 else if (strcmp (arg, "no-solaris") == 0)
1134 {
b34976b6 1135 msolaris = FALSE;
252b5132
RH		 1136 ppc_comment_chars = ppc_eabi_comment_chars;
1137 }
1138#endif
1139 else
1140 {
1141 as_bad (_("invalid switch -m%s"), arg);
1142 return 0;
1143 }
1144 break;
1145
1146#ifdef OBJ_ELF
1147 /* -V: SVR4 argument to print version ID. */
1148 case 'V':
1149 print_version_id ();
1150 break;
1151
1152 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1153 should be emitted or not. FIXME: Not implemented. */
1154 case 'Q':
1155 break;
1156
1157 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1158 rather than .stabs.excl, which is ignored by the linker.
1159 FIXME: Not implemented. */
1160 case 's':
1161 if (arg)
1162 return 0;
1163
1164 break;
1165#endif
1166
1167 default:
1168 return 0;
1169 }
1170
1171 return 1;
1172}
1173
1174void
98027b10 1175md_show_usage (FILE *stream)
252b5132 1176{
bc805888 1177 fprintf (stream, _("\
252b5132 1178PowerPC options:\n\
df12615d
AM		 1179-a32 generate ELF32/XCOFF32\n\
1180-a64 generate ELF64/XCOFF64\n\
252b5132 1181-u ignored\n\
23e1d84c
AM		 1182-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1183-mpwr generate code for POWER (RIOS1)\n\
1184-m601 generate code for PowerPC 601\n\
418c1742 1185-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1186 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1187-m403 generate code for PowerPC 403\n\
1188-m405 generate code for PowerPC 405\n\
3d8aea2f 1189-m440 generate code for PowerPC 440\n\
c8187e15 1190-m464 generate code for PowerPC 464\n\
f5c120c5 1191-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1192 generate code for PowerPC 7400/7410/7450/7455\n\
1193-m750cl generate code for PowerPC 750cl\n"));
df12615d 1194 fprintf (stream, _("\
23e1d84c 1195-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1196-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1197-mbooke generate code for 32-bit PowerPC BookE\n\
634b50f2 1198-ma2 generate code for A2 architecture\n\
23e1d84c 1199-mpower4 generate code for Power4 architecture\n\
b0648eec 1200-mpower5 generate code for Power5 architecture\n\
9622b051 1201-mpower6 generate code for Power6 architecture\n\
9b4e5766 1202-mpower7 generate code for Power7 architecture\n\
ede602d7 1203-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1204-mcom generate code Power/PowerPC common instructions\n\
df12615d 1205-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1206 fprintf (stream, _("\
df12615d 1207-maltivec generate code for AltiVec\n\
9b4e5766 1208-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1209-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1210-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1211-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1212-mspe generate code for Motorola SPE instructions\n\
1213-mregnames Allow symbolic names for registers\n\
1214-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1215#ifdef OBJ_ELF
bc805888 1216 fprintf (stream, _("\
252b5132
RH		 1217-mrelocatable support for GCC's -mrelocatble option\n\
1218-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1219-memb set PPC_EMB bit in ELF flags\n\
df12615d 1220-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1221 generate code for a little endian machine\n\
df12615d
AM		 1222-mbig, -mbig-endian, -b, -be\n\
1223 generate code for a big endian machine\n\
252b5132
RH		 1224-msolaris generate code for Solaris\n\
1225-mno-solaris do not generate code for Solaris\n\
1226-V print assembler version number\n\
1227-Qy, -Qn ignored\n"));
1228#endif
1229}
1230\f
1231/* Set ppc_cpu if it is not already set. */
1232
1233static void
98027b10 1234ppc_set_cpu (void)
252b5132
RH		 1235{
1236 const char *default_os = TARGET_OS;
1237 const char *default_cpu = TARGET_CPU;
1238
3c9030c1 1239 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1240 {
2a98c3a6 1241 if (ppc_obj64)
3c9030c1 1242 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1243 else if (strncmp (default_os, "aix", 3) == 0
1244 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1245 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1246 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1247 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1248 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1249 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1250 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1251 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1252 else
99a814a1
AM		 1253 as_fatal (_("Unknown default cpu = %s, os = %s"),
1254 default_cpu, default_os);
252b5132
RH		 1255 }
1256}
1257
9232bbb0
AM		 1258/* Figure out the BFD architecture to use. This function and ppc_mach
1259 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1260
1261enum bfd_architecture
98027b10 1262ppc_arch (void)
252b5132
RH		 1263{
1264 const char *default_cpu = TARGET_CPU;
1265 ppc_set_cpu ();
1266
1267 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1268 return bfd_arch_powerpc;
1269 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1270 return bfd_arch_rs6000;
1271 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1272 {
1273 if (strcmp (default_cpu, "rs6000") == 0)
1274 return bfd_arch_rs6000;
0baf16f2 1275 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1276 return bfd_arch_powerpc;
1277 }
1278
1279 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1280 return bfd_arch_unknown;
1281}
1282
7f6d05e8 1283unsigned long
98027b10 1284ppc_mach (void)
7f6d05e8 1285{
2a98c3a6
AM		 1286 if (ppc_obj64)
1287 return bfd_mach_ppc64;
1288 else if (ppc_arch () == bfd_arch_rs6000)
1289 return bfd_mach_rs6k;
1290 else
1291 return bfd_mach_ppc;
7f6d05e8
CP		 1292}
1293
81d4177b 1294extern char*
98027b10 1295ppc_target_format (void)
7f6d05e8
CP		 1296{
1297#ifdef OBJ_COFF
1298#ifdef TE_PE
99a814a1 1299 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1300#elif TE_POWERMAC
0baf16f2 1301 return "xcoff-powermac";
7f6d05e8 1302#else
eb1e0e80 1303# ifdef TE_AIX5
2b3c4602 1304 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1305# else
2b3c4602 1306 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1307# endif
7f6d05e8 1308#endif
7f6d05e8
CP		 1309#endif
1310#ifdef OBJ_ELF
9d8504b1
PB		 1311# ifdef TE_VXWORKS
1312 return "elf32-powerpc-vxworks";
1313# else
0baf16f2 1314 return (target_big_endian
2b3c4602
AM		 1315 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1316 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1317# endif
7f6d05e8
CP		 1318#endif
1319}
1320
69c040df
AM		 1321/* Insert opcodes and macros into hash tables. Called at startup and
1322 for .cpu pseudo. */
252b5132 1323
69c040df
AM		 1324static void
1325ppc_setup_opcodes (void)
252b5132 1326{
98027b10 1327 const struct powerpc_opcode *op;
252b5132
RH		 1328 const struct powerpc_opcode *op_end;
1329 const struct powerpc_macro *macro;
1330 const struct powerpc_macro *macro_end;
b84bf58a 1331 bfd_boolean bad_insn = FALSE;
252b5132 1332
69c040df
AM		 1333 if (ppc_hash != NULL)
1334 hash_die (ppc_hash);
1335 if (ppc_macro_hash != NULL)
1336 hash_die (ppc_macro_hash);
252b5132
RH		 1337
1338 /* Insert the opcodes into a hash table. */
1339 ppc_hash = hash_new ();
1340
c43a438d 1341 if (ENABLE_CHECKING)
b84bf58a 1342 {
c43a438d 1343 unsigned int i;
b84bf58a 1344
c43a438d
AM		 1345 /* Check operand masks. Code here and in the disassembler assumes
1346 all the 1's in the mask are contiguous. */
1347 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1348 {
c43a438d
AM		 1349 unsigned long mask = powerpc_operands[i].bitm;
1350 unsigned long right_bit;
1351 unsigned int j;
1352
1353 right_bit = mask & -mask;
1354 mask += right_bit;
1355 right_bit = mask & -mask;
1356 if (mask != right_bit)
1357 {
1358 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1359 bad_insn = TRUE;
1360 }
1361 for (j = i + 1; j < num_powerpc_operands; ++j)
1362 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1363 sizeof (powerpc_operands[0])) == 0)
1364 {
1365 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1366 j, i);
1367 bad_insn = TRUE;
1368 }
b84bf58a
AM		 1369 }
1370 }
1371
252b5132
RH		 1372 op_end = powerpc_opcodes + powerpc_num_opcodes;
1373 for (op = powerpc_opcodes; op < op_end; op++)
1374 {
c43a438d 1375 if (ENABLE_CHECKING)
b84bf58a 1376 {
c43a438d
AM		 1377 const unsigned char *o;
1378 unsigned long omask = op->mask;
8dbcd839 1379
d815f1a9 1380 if (op != powerpc_opcodes)
8dbcd839 1381 {
d815f1a9
AM		 1382 /* The major opcodes had better be sorted. Code in the
1383 disassembler assumes the insns are sorted according to
1384 major opcode. */
1385 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1386 {
1387 as_bad (_("major opcode is not sorted for %s"),
1388 op->name);
1389 bad_insn = TRUE;
1390 }
1391
1392 /* Warn if the table isn't more strictly ordered.
1393 Unfortunately it doesn't seem possible to order the
1394 table on much more than the major opcode, which makes
1395 it difficult to implement a binary search in the
1396 disassembler. The problem is that we have multiple
1397 ways to disassemble instructions, and we usually want
1398 to choose a more specific form (with more bits set in
1399 the opcode) than a more general form. eg. all of the
1400 following are equivalent:
1401 bne label # opcode = 0x40820000, mask = 0xff830003
1402 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1403 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1404
1405 There are also cases where the table needs to be out
1406 of order to disassemble the correct instruction for
2f3bb96a 1407 processor variants. */
d815f1a9
AM		 1408 else if (0)
1409 {
1410 unsigned long t1 = op[0].opcode;
1411 unsigned long t2 = op[-1].opcode;
1412
1413 if (((t1 ^ t2) & 0xfc0007ff) == 0
1414 && (t1 & 0xfc0006df) == 0x7c000286)
1415 {
1416 /* spr field is split. */
1417 t1 = ((t1 & ~0x1ff800)
1418 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1419 t2 = ((t2 & ~0x1ff800)
1420 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1421 }
1422 if (t1 < t2)
1423 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1424 op[0].name, op[0].opcode, op[0].mask,
1425 op[-1].name, op[-1].opcode, op[-1].mask);
1426 }
8dbcd839 1427 }
c43a438d
AM		 1428
1429 /* The mask had better not trim off opcode bits. */
1430 if ((op->opcode & omask) != op->opcode)
1431 {
1432 as_bad (_("mask trims opcode bits for %s"),
1433 op->name);
1434 bad_insn = TRUE;
1435 }
1436
1437 /* The operands must not overlap the opcode or each other. */
1438 for (o = op->operands; *o; ++o)
1439 if (*o >= num_powerpc_operands)
1440 {
1441 as_bad (_("operand index error for %s"),
1442 op->name);
1443 bad_insn = TRUE;
1444 }
1445 else
b84bf58a 1446 {
c43a438d
AM		 1447 const struct powerpc_operand *operand = &powerpc_operands[*o];
1448 if (operand->shift >= 0)
b84bf58a 1449 {
c43a438d
AM		 1450 unsigned long mask = operand->bitm << operand->shift;
1451 if (omask & mask)
1452 {
1453 as_bad (_("operand %d overlap in %s"),
1454 (int) (o - op->operands), op->name);
1455 bad_insn = TRUE;
1456 }
1457 omask |= mask;
b84bf58a 1458 }
b84bf58a 1459 }
c43a438d 1460 }
252b5132 1461
2b3c4602 1462 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1463 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1464 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1465 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1466 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1467 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1468 {
1469 const char *retval;
1470
98027b10 1471 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1472 if (retval != NULL)
252b5132 1473 {
99a814a1 1474 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1475 if ((ppc_cpu & PPC_OPCODE_601) != 0
1476 && (op->flags & PPC_OPCODE_POWER) != 0)
1477 continue;
1478
b84bf58a 1479 as_bad (_("duplicate instruction %s"),
99a814a1 1480 op->name);
b84bf58a 1481 bad_insn = TRUE;
252b5132
RH		 1482 }
1483 }
1484 }
1485
3c9030c1
AM		 1486 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1487 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1488 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1489
252b5132
RH		 1490 /* Insert the macros into a hash table. */
1491 ppc_macro_hash = hash_new ();
1492
1493 macro_end = powerpc_macros + powerpc_num_macros;
1494 for (macro = powerpc_macros; macro < macro_end; macro++)
1495 {
1496 if ((macro->flags & ppc_cpu) != 0)
1497 {
1498 const char *retval;
1499
98027b10 1500 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1501 if (retval != (const char *) NULL)
1502 {
b84bf58a
AM		 1503 as_bad (_("duplicate macro %s"), macro->name);
1504 bad_insn = TRUE;
252b5132
RH		 1505 }
1506 }
1507 }
1508
b84bf58a 1509 if (bad_insn)
252b5132 1510 abort ();
69c040df
AM		 1511}
1512
1513/* This function is called when the assembler starts up. It is called
1514 after the options have been parsed and the output file has been
1515 opened. */
1516
1517void
98027b10 1518md_begin (void)
69c040df
AM		 1519{
1520 ppc_set_cpu ();
1521
1522 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1523
1524#ifdef OBJ_ELF
1525 /* Set the ELF flags if desired. */
1526 if (ppc_flags && !msolaris)
1527 bfd_set_private_flags (stdoutput, ppc_flags);
1528#endif
1529
1530 ppc_setup_opcodes ();
252b5132 1531
67c1ffbe 1532 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1533 by the user. */
252b5132
RH		 1534 if (!set_target_endian)
1535 {
1536 set_target_endian = 1;
1537 target_big_endian = PPC_BIG_ENDIAN;
1538 }
1539
1540#ifdef OBJ_XCOFF
1541 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1542
1543 /* Create dummy symbols to serve as initial csects. This forces the
1544 text csects to precede the data csects. These symbols will not
1545 be output. */
1546 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1547 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1548 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1549 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1550#endif
1551
1552#ifdef TE_PE
1553
1554 ppc_current_section = text_section;
81d4177b 1555 ppc_previous_section = 0;
252b5132
RH		 1556
1557#endif
1558}
1559
6a0c61b7 1560void
98027b10 1561ppc_cleanup (void)
6a0c61b7 1562{
dc1d03fc 1563#ifdef OBJ_ELF
6a0c61b7
EZ		 1564 if (ppc_apuinfo_list == NULL)
1565 return;
1566
1567 /* Ok, so write the section info out. We have this layout:
1568
1569 byte data what
1570 ---- ---- ----
1571 0 8 length of "APUinfo\0"
1572 4 (n*4) number of APU's (4 bytes each)
1573 8 2 note type 2
1574 12 "APUinfo\0" name
1575 20 APU#1 first APU's info
1576 24 APU#2 second APU's info
1577 ... ...
1578 */
1579 {
1580 char *p;
1581 asection *seg = now_seg;
1582 subsegT subseg = now_subseg;
1583 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1584 unsigned int i;
6a0c61b7
EZ		 1585
1586 /* Create the .PPC.EMB.apuinfo section. */
1587 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1588 bfd_set_section_flags (stdoutput,
1589 apuinfo_secp,
e1a9cb8e 1590 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1591
1592 p = frag_more (4);
1593 md_number_to_chars (p, (valueT) 8, 4);
1594
1595 p = frag_more (4);
e98d298c 1596 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1597
1598 p = frag_more (4);
1599 md_number_to_chars (p, (valueT) 2, 4);
1600
1601 p = frag_more (8);
1602 strcpy (p, "APUinfo");
1603
1604 for (i = 0; i < ppc_apuinfo_num; i++)
1605 {
b34976b6
AM		 1606 p = frag_more (4);
1607 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1608 }
1609
1610 frag_align (2, 0, 0);
1611
1612 /* We probably can't restore the current segment, for there likely
1613 isn't one yet... */
1614 if (seg && subseg)
1615 subseg_set (seg, subseg);
1616 }
dc1d03fc 1617#endif
6a0c61b7
EZ		 1618}
1619
252b5132
RH		 1620/* Insert an operand value into an instruction. */
1621
1622static unsigned long
a1867a27
AM		 1623ppc_insert_operand (unsigned long insn,
1624 const struct powerpc_operand *operand,
1625 offsetT val,
fa452fa6 1626 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1627 char *file,
1628 unsigned int line)
252b5132 1629{
b84bf58a 1630 long min, max, right;
eb42fac1 1631
b84bf58a
AM		 1632 max = operand->bitm;
1633 right = max & -max;
1634 min = 0;
1635
1636 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1637 {
b84bf58a 1638 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1639 max = (max >> 1) & -right;
1640 min = ~max & -right;
b84bf58a 1641 }
252b5132 1642
b84bf58a 1643 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1644 max++;
252b5132 1645
b84bf58a 1646 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1647 {
1648 long tmp = min;
1649 min = -max;
1650 max = -tmp;
1651 }
b84bf58a 1652
a1867a27
AM		 1653 if (min <= max)
1654 {
1655 /* Some people write constants with the sign extension done by
1656 hand but only up to 32 bits. This shouldn't really be valid,
1657 but, to permit this code to assemble on a 64-bit host, we
1658 sign extend the 32-bit value to 64 bits if so doing makes the
1659 value valid. */
1660 if (val > max
1661 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1662 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1663 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1664 val = val - 0x80000000 - 0x80000000;
1665
1666 /* Similarly, people write expressions like ~(1<<15), and expect
1667 this to be OK for a 32-bit unsigned value. */
1668 else if (val < min
1669 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1670 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1671 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1672 val = val + 0x80000000 + 0x80000000;
1673
1674 else if (val < min
1675 || val > max
1676 || (val & (right - 1)) != 0)
1677 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1678 }
b84bf58a 1679
252b5132
RH		 1680 if (operand->insert)
1681 {
1682 const char *errmsg;
1683
1684 errmsg = NULL;
2b3c4602 1685 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1686 if (errmsg != (const char *) NULL)
ee2c9aa9 1687 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1688 }
1689 else
b84bf58a 1690 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1691
1692 return insn;
1693}
1694
1695\f
1696#ifdef OBJ_ELF
1697/* Parse @got, etc. and return the desired relocation. */
1698static bfd_reloc_code_real_type
98027b10 1699ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1700{
1701 struct map_bfd {
1702 char *string;
b7d7dc63
AM		 1703 unsigned int length : 8;
1704 unsigned int valid32 : 1;
1705 unsigned int valid64 : 1;
1706 unsigned int reloc;
252b5132
RH		 1707 };
1708
1709 char ident[20];
1710 char *str = *str_p;
1711 char *str2;
1712 int ch;
1713 int len;
15c1449b 1714 const struct map_bfd *ptr;
252b5132 1715
b7d7dc63
AM		 1716#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1717#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1718#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1719
15c1449b 1720 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1721 MAP ("l", BFD_RELOC_LO16),
1722 MAP ("h", BFD_RELOC_HI16),
1723 MAP ("ha", BFD_RELOC_HI16_S),
1724 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1725 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1726 MAP ("got", BFD_RELOC_16_GOTOFF),
1727 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1728 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1729 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1730 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1731 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1732 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1733 MAP ("copy", BFD_RELOC_PPC_COPY),
1734 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1735 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1736 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1737 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1738 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1739 MAP ("tls", BFD_RELOC_PPC_TLS),
1740 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1741 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1742 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1743 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1744 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1745 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1746 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1747 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1748 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1749 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1750 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1751 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1752 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1753 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1754 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1755 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1756 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1757 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1758 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1759 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1760 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1761 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1762 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1763 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1764 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1765 MAP32 ("fixup", BFD_RELOC_CTOR),
1766 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1767 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1768 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1769 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1770 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1771 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1772 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1773 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1774 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1775 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1776 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1777 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1778 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1779 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1780 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1781 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1782 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1783 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1784 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1785 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1786 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1787 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1788 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1789 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1790 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1791 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1792 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1793 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1794 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1795 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1796 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1797 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1798 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1799 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1800 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1801 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1802 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1803 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1804 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1805 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1806 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1807 };
1808
1809 if (*str++ != '@')
1810 return BFD_RELOC_UNUSED;
1811
1812 for (ch = *str, str2 = ident;
1813 (str2 < ident + sizeof (ident) - 1
3882b010 1814 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1815 ch = *++str)
1816 {
3882b010 1817 *str2++ = TOLOWER (ch);
252b5132
RH		 1818 }
1819
1820 *str2 = '\0';
1821 len = str2 - ident;
1822
1823 ch = ident[0];
1824 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1825 if (ch == ptr->string[0]
1826 && len == ptr->length
b7d7dc63
AM		 1827 && memcmp (ident, ptr->string, ptr->length) == 0
1828 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1829 {
15c1449b
AM		 1830 int reloc = ptr->reloc;
1831
727fc41e
AM		 1832 if (!ppc_obj64 && exp_p->X_add_number != 0)
1833 {
1834 switch (reloc)
1835 {
1836 case BFD_RELOC_16_GOTOFF:
1837 case BFD_RELOC_LO16_GOTOFF:
1838 case BFD_RELOC_HI16_GOTOFF:
1839 case BFD_RELOC_HI16_S_GOTOFF:
1840 as_warn (_("identifier+constant@got means "
1841 "identifier@got+constant"));
1842 break;
1843
1844 case BFD_RELOC_PPC_GOT_TLSGD16:
1845 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1846 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1847 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1848 case BFD_RELOC_PPC_GOT_TLSLD16:
1849 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1850 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1851 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1852 case BFD_RELOC_PPC_GOT_DTPREL16:
1853 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1854 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1855 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1856 case BFD_RELOC_PPC_GOT_TPREL16:
1857 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1858 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1859 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1860 as_bad (_("symbol+offset not supported for got tls"));
1861 break;
1862 }
1863 }
5f6db75a
AM		 1864
1865 /* Now check for identifier@suffix+constant. */
1866 if (*str == '-' || *str == '+')
252b5132 1867 {
5f6db75a
AM		 1868 char *orig_line = input_line_pointer;
1869 expressionS new_exp;
1870
1871 input_line_pointer = str;
1872 expression (&new_exp);
1873 if (new_exp.X_op == O_constant)
252b5132 1874 {
5f6db75a
AM		 1875 exp_p->X_add_number += new_exp.X_add_number;
1876 str = input_line_pointer;
252b5132 1877 }
5f6db75a
AM		 1878
1879 if (&input_line_pointer != str_p)
1880 input_line_pointer = orig_line;
252b5132 1881 }
252b5132 1882 *str_p = str;
0baf16f2 1883
2b3c4602 1884 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1885 && exp_p->X_op == O_symbol
1886 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1887 {
9f2b53d7
AM		 1888 /* Change the symbol so that the dummy .TOC. symbol can be
1889 omitted from the object file. */
0baf16f2
AM		 1890 exp_p->X_add_symbol = &abs_symbol;
1891 }
1892
15c1449b 1893 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1894 }
1895
1896 return BFD_RELOC_UNUSED;
1897}
1898
99a814a1
AM		 1899/* Like normal .long/.short/.word, except support @got, etc.
1900 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1901static void
98027b10 1902ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1903{
1904 expressionS exp;
1905 bfd_reloc_code_real_type reloc;
1906
1907 if (is_it_end_of_statement ())
1908 {
1909 demand_empty_rest_of_line ();
1910 return;
1911 }
1912
1913 do
1914 {
1915 expression (&exp);
1916 if (exp.X_op == O_symbol
1917 && *input_line_pointer == '@'
99a814a1
AM		 1918 && (reloc = ppc_elf_suffix (&input_line_pointer,
1919 &exp)) != BFD_RELOC_UNUSED)
252b5132 1920 {
99a814a1
AM		 1921 reloc_howto_type *reloc_howto;
1922 int size;
1923
1924 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1925 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1926
1927 if (size > nbytes)
0baf16f2
AM		 1928 {
1929 as_bad (_("%s relocations do not fit in %d bytes\n"),
1930 reloc_howto->name, nbytes);
1931 }
252b5132
RH		 1932 else
1933 {
0baf16f2
AM		 1934 char *p;
1935 int offset;
252b5132 1936
0baf16f2
AM		 1937 p = frag_more (nbytes);
1938 offset = 0;
1939 if (target_big_endian)
1940 offset = nbytes - size;
99a814a1
AM		 1941 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1942 &exp, 0, reloc);
252b5132
RH		 1943 }
1944 }
1945 else
1946 emit_expr (&exp, (unsigned int) nbytes);
1947 }
1948 while (*input_line_pointer++ == ',');
1949
99a814a1
AM		 1950 /* Put terminator back into stream. */
1951 input_line_pointer--;
252b5132
RH		 1952 demand_empty_rest_of_line ();
1953}
1954
1955/* Solaris pseduo op to change to the .rodata section. */
1956static void
98027b10 1957ppc_elf_rdata (int xxx)
252b5132
RH		 1958{
1959 char *save_line = input_line_pointer;
1960 static char section[] = ".rodata\n";
1961
99a814a1 1962 /* Just pretend this is .section .rodata */
252b5132
RH		 1963 input_line_pointer = section;
1964 obj_elf_section (xxx);
1965
1966 input_line_pointer = save_line;
1967}
1968
99a814a1 1969/* Pseudo op to make file scope bss items. */
252b5132 1970static void
98027b10 1971ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1972{
98027b10
AM		 1973 char *name;
1974 char c;
1975 char *p;
252b5132 1976 offsetT size;
98027b10 1977 symbolS *symbolP;
252b5132
RH		 1978 offsetT align;
1979 segT old_sec;
1980 int old_subsec;
1981 char *pfrag;
1982 int align2;
1983
1984 name = input_line_pointer;
1985 c = get_symbol_end ();
1986
99a814a1 1987 /* just after name is now '\0'. */
252b5132
RH		 1988 p = input_line_pointer;
1989 *p = c;
1990 SKIP_WHITESPACE ();
1991 if (*input_line_pointer != ',')
1992 {
1993 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1994 ignore_rest_of_line ();
1995 return;
1996 }
1997
1998 input_line_pointer++; /* skip ',' */
1999 if ((size = get_absolute_expression ()) < 0)
2000 {
2001 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2002 ignore_rest_of_line ();
2003 return;
2004 }
2005
2006 /* The third argument to .lcomm is the alignment. */
2007 if (*input_line_pointer != ',')
2008 align = 8;
2009 else
2010 {
2011 ++input_line_pointer;
2012 align = get_absolute_expression ();
2013 if (align <= 0)
2014 {
2015 as_warn (_("ignoring bad alignment"));
2016 align = 8;
2017 }
2018 }
2019
2020 *p = 0;
2021 symbolP = symbol_find_or_make (name);
2022 *p = c;
2023
2024 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2025 {
2026 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2027 S_GET_NAME (symbolP));
2028 ignore_rest_of_line ();
2029 return;
2030 }
2031
2032 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2033 {
2034 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2035 S_GET_NAME (symbolP),
2036 (long) S_GET_VALUE (symbolP),
2037 (long) size);
2038
2039 ignore_rest_of_line ();
2040 return;
2041 }
2042
99a814a1 2043 /* Allocate_bss. */
252b5132
RH		 2044 old_sec = now_seg;
2045 old_subsec = now_subseg;
2046 if (align)
2047 {
99a814a1 2048 /* Convert to a power of 2 alignment. */
252b5132
RH		 2049 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2050 if (align != 1)
2051 {
2052 as_bad (_("Common alignment not a power of 2"));
2053 ignore_rest_of_line ();
2054 return;
2055 }
2056 }
2057 else
2058 align2 = 0;
2059
2060 record_alignment (bss_section, align2);
2061 subseg_set (bss_section, 0);
2062 if (align2)
2063 frag_align (align2, 0, 0);
2064 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2065 symbol_get_frag (symbolP)->fr_symbol = 0;
2066 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2067 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2068 (char *) 0);
2069 *pfrag = 0;
2070 S_SET_SIZE (symbolP, size);
2071 S_SET_SEGMENT (symbolP, bss_section);
2072 subseg_set (old_sec, old_subsec);
2073 demand_empty_rest_of_line ();
2074}
2075
2076/* Validate any relocations emitted for -mrelocatable, possibly adding
2077 fixups for word relocations in writable segments, so we can adjust
2078 them at runtime. */
2079static void
98027b10 2080ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2081{
2082 if (fixp->fx_done || fixp->fx_pcrel)
2083 return;
2084
2085 switch (shlib)
2086 {
2087 case SHLIB_NONE:
2088 case SHLIB_PIC:
2089 return;
2090
5d6f4f16 2091 case SHLIB_MRELOCATABLE:
252b5132
RH		 2092 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2093 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2094 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2095 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2096 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2097 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2098 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2099 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2100 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2101 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2102 && strcmp (segment_name (seg), ".got2") != 0
2103 && strcmp (segment_name (seg), ".dtors") != 0
2104 && strcmp (segment_name (seg), ".ctors") != 0
2105 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2106 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2107 && strcmp (segment_name (seg), ".eh_frame") != 0
2108 && strcmp (segment_name (seg), ".ex_shared") != 0)
2109 {
2110 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2111 || fixp->fx_r_type != BFD_RELOC_CTOR)
2112 {
2113 as_bad_where (fixp->fx_file, fixp->fx_line,
2114 _("Relocation cannot be done when using -mrelocatable"));
2115 }
2116 }
2117 return;
2118 }
2119}
0baf16f2 2120
7e8d4ab4
AM		 2121/* Prevent elf_frob_file_before_adjust removing a weak undefined
2122 function descriptor sym if the corresponding code sym is used. */
2123
2124void
98027b10 2125ppc_frob_file_before_adjust (void)
0baf16f2 2126{
7e8d4ab4 2127 symbolS *symp;
9232bbb0 2128 asection *toc;
0baf16f2 2129
7e8d4ab4
AM		 2130 if (!ppc_obj64)
2131 return;
2132
2133 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2134 {
7e8d4ab4
AM		 2135 const char *name;
2136 char *dotname;
2137 symbolS *dotsym;
2138 size_t len;
2139
2140 name = S_GET_NAME (symp);
2141 if (name[0] == '.')
2142 continue;
2143
2144 if (! S_IS_WEAK (symp)
2145 || S_IS_DEFINED (symp))
2146 continue;
2147
2148 len = strlen (name) + 1;
2149 dotname = xmalloc (len + 1);
2150 dotname[0] = '.';
2151 memcpy (dotname + 1, name, len);
461b725f 2152 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2153 free (dotname);
2154 if (dotsym != NULL && (symbol_used_p (dotsym)
2155 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2156 symbol_mark_used (symp);
2157
0baf16f2
AM		 2158 }
2159
9232bbb0
AM		 2160 toc = bfd_get_section_by_name (stdoutput, ".toc");
2161 if (toc != NULL
2162 && bfd_section_size (stdoutput, toc) > 0x10000)
2163 as_warn (_("TOC section size exceeds 64k"));
2164
7e8d4ab4
AM		 2165 /* Don't emit .TOC. symbol. */
2166 symp = symbol_find (".TOC.");
2167 if (symp != NULL)
2168 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2169}
252b5132
RH		 2170#endif /* OBJ_ELF */
2171\f
2172#ifdef TE_PE
2173
2174/*
99a814a1 2175 * Summary of parse_toc_entry.
252b5132
RH		 2176 *
2177 * in: Input_line_pointer points to the '[' in one of:
2178 *
2179 * [toc] [tocv] [toc32] [toc64]
2180 *
2181 * Anything else is an error of one kind or another.
2182 *
81d4177b 2183 * out:
252b5132
RH		 2184 * return value: success or failure
2185 * toc_kind: kind of toc reference
2186 * input_line_pointer:
2187 * success: first char after the ']'
2188 * failure: unchanged
2189 *
2190 * settings:
2191 *
2192 * [toc] - rv == success, toc_kind = default_toc
2193 * [tocv] - rv == success, toc_kind = data_in_toc
2194 * [toc32] - rv == success, toc_kind = must_be_32
2195 * [toc64] - rv == success, toc_kind = must_be_64
2196 *
2197 */
2198
81d4177b
KH		 2199enum toc_size_qualifier
2200{
252b5132
RH		 2201 default_toc, /* The toc cell constructed should be the system default size */
2202 data_in_toc, /* This is a direct reference to a toc cell */
2203 must_be_32, /* The toc cell constructed must be 32 bits wide */
2204 must_be_64 /* The toc cell constructed must be 64 bits wide */
2205};
2206
2207static int
98027b10 2208parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2209{
2210 char *start;
2211 char *toc_spec;
2212 char c;
2213 enum toc_size_qualifier t;
2214
99a814a1 2215 /* Save the input_line_pointer. */
252b5132
RH		 2216 start = input_line_pointer;
2217
99a814a1 2218 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2219 ++input_line_pointer;
2220 SKIP_WHITESPACE ();
81d4177b 2221
99a814a1 2222 /* Find the spelling of the operand. */
252b5132
RH		 2223 toc_spec = input_line_pointer;
2224 c = get_symbol_end ();
2225
99a814a1 2226 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2227 {
2228 t = default_toc;
2229 }
99a814a1 2230 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2231 {
2232 t = data_in_toc;
2233 }
99a814a1 2234 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2235 {
2236 t = must_be_32;
2237 }
99a814a1 2238 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2239 {
2240 t = must_be_64;
2241 }
2242 else
2243 {
2244 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2245 *input_line_pointer = c;
2246 input_line_pointer = start;
252b5132
RH		 2247 return 0;
2248 }
2249
99a814a1
AM		 2250 /* Now find the ']'. */
2251 *input_line_pointer = c;
252b5132 2252
81d4177b
KH		 2253 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2254 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2255
2256 if (c != ']')
2257 {
2258 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2259 input_line_pointer = start;
252b5132
RH		 2260 return 0;
2261 }
2262
99a814a1 2263 *toc_kind = t;
252b5132
RH		 2264 return 1;
2265}
2266#endif
2267\f
2268
dc1d03fc 2269#ifdef OBJ_ELF
6a0c61b7
EZ		 2270#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2271static void
98027b10 2272ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2273{
2274 unsigned int i;
2275
2276 /* Check we don't already exist. */
2277 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2278 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2279 return;
b34976b6 2280
6a0c61b7
EZ		 2281 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2282 {
2283 if (ppc_apuinfo_num_alloc == 0)
2284 {
2285 ppc_apuinfo_num_alloc = 4;
2286 ppc_apuinfo_list = (unsigned long *)
2287 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2288 }
2289 else
2290 {
2291 ppc_apuinfo_num_alloc += 4;
2292 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2293 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2294 }
2295 }
dc1d03fc 2296 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2297}
2298#undef APUID
dc1d03fc 2299#endif
6a0c61b7
EZ		 2300\f
2301
252b5132
RH		 2302/* We need to keep a list of fixups. We can't simply generate them as
2303 we go, because that would require us to first create the frag, and
2304 that would screw up references to ``.''. */
2305
2306struct ppc_fixup
2307{
2308 expressionS exp;
2309 int opindex;
2310 bfd_reloc_code_real_type reloc;
2311};
2312
2313#define MAX_INSN_FIXUPS (5)
2314
2315/* This routine is called for each instruction to be assembled. */
2316
2317void
98027b10 2318md_assemble (char *str)
252b5132
RH		 2319{
2320 char *s;
2321 const struct powerpc_opcode *opcode;
2322 unsigned long insn;
2323 const unsigned char *opindex_ptr;
2324 int skip_optional;
2325 int need_paren;
2326 int next_opindex;
2327 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2328 int fc;
2329 char *f;
09b935ac 2330 int addr_mod;
252b5132
RH		 2331 int i;
2332#ifdef OBJ_ELF
2333 bfd_reloc_code_real_type reloc;
2334#endif
2335
2336 /* Get the opcode. */
3882b010 2337 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2338 ;
2339 if (*s != '\0')
2340 *s++ = '\0';
2341
2342 /* Look up the opcode in the hash table. */
2343 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2344 if (opcode == (const struct powerpc_opcode *) NULL)
2345 {
2346 const struct powerpc_macro *macro;
2347
2348 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2349 if (macro == (const struct powerpc_macro *) NULL)
2350 as_bad (_("Unrecognized opcode: `%s'"), str);
2351 else
2352 ppc_macro (s, macro);
2353
2354 return;
2355 }
2356
2357 insn = opcode->opcode;
2358
2359 str = s;
3882b010 2360 while (ISSPACE (*str))
252b5132
RH		 2361 ++str;
2362
2363 /* PowerPC operands are just expressions. The only real issue is
2364 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2365 an optional operand separate the operands only with commas (in some
2366 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2367 have optional operands). Most instructions with optional operands
2368 have only one. Those that have more than one optional operand can
2369 take either all their operands or none. So, before we start seriously
2370 parsing the operands, we check to see if we have optional operands,
2371 and if we do, we count the number of commas to see which operands
2372 have been omitted. */
252b5132
RH		 2373 skip_optional = 0;
2374 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2375 {
2376 const struct powerpc_operand *operand;
2377
2378 operand = &powerpc_operands[*opindex_ptr];
2379 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2380 {
2381 unsigned int opcount;
7fe9cf6b
NC		 2382 unsigned int num_operands_expected;
2383 unsigned int i;
252b5132
RH		 2384
2385 /* There is an optional operand. Count the number of
2386 commas in the input line. */
2387 if (*str == '\0')
2388 opcount = 0;
2389 else
2390 {
2391 opcount = 1;
2392 s = str;
2393 while ((s = strchr (s, ',')) != (char *) NULL)
2394 {
2395 ++opcount;
2396 ++s;
2397 }
2398 }
2399
7fe9cf6b
NC		 2400 /* Compute the number of expected operands.
2401 Do not count fake operands. */
2402 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2403 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2404 ++ num_operands_expected;
2405
252b5132
RH		 2406 /* If there are fewer operands in the line then are called
2407 for by the instruction, we want to skip the optional
1f6c9eb0 2408 operands. */
7fe9cf6b 2409 if (opcount < num_operands_expected)
252b5132
RH		 2410 skip_optional = 1;
2411
2412 break;
2413 }
2414 }
2415
2416 /* Gather the operands. */
2417 need_paren = 0;
2418 next_opindex = 0;
2419 fc = 0;
2420 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2421 {
2422 const struct powerpc_operand *operand;
2423 const char *errmsg;
2424 char *hold;
2425 expressionS ex;
2426 char endc;
2427
2428 if (next_opindex == 0)
2429 operand = &powerpc_operands[*opindex_ptr];
2430 else
2431 {
2432 operand = &powerpc_operands[next_opindex];
2433 next_opindex = 0;
2434 }
252b5132
RH		 2435 errmsg = NULL;
2436
2437 /* If this is a fake operand, then we do not expect anything
2438 from the input. */
2439 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2440 {
2b3c4602 2441 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2442 if (errmsg != (const char *) NULL)
ee2c9aa9 2443 as_bad ("%s", errmsg);
252b5132
RH		 2444 continue;
2445 }
2446
2447 /* If this is an optional operand, and we are skipping it, just
2448 insert a zero. */
2449 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2450 && skip_optional)
2451 {
2452 if (operand->insert)
2453 {
2b3c4602 2454 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2455 if (errmsg != (const char *) NULL)
ee2c9aa9 2456 as_bad ("%s", errmsg);
252b5132
RH		 2457 }
2458 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2459 next_opindex = *opindex_ptr + 1;
2460 continue;
2461 }
2462
2463 /* Gather the operand. */
2464 hold = input_line_pointer;
2465 input_line_pointer = str;
2466
2467#ifdef TE_PE
81d4177b 2468 if (*input_line_pointer == '[')
252b5132
RH		 2469 {
2470 /* We are expecting something like the second argument here:
99a814a1
AM		 2471 *
2472 * lwz r4,[toc].GS.0.static_int(rtoc)
2473 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2474 * The argument following the `]' must be a symbol name, and the
2475 * register must be the toc register: 'rtoc' or '2'
2476 *
2477 * The effect is to 0 as the displacement field
2478 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2479 * the appropriate variation) reloc against it based on the symbol.
2480 * The linker will build the toc, and insert the resolved toc offset.
2481 *
2482 * Note:
2483 * o The size of the toc entry is currently assumed to be
2484 * 32 bits. This should not be assumed to be a hard coded
2485 * number.
2486 * o In an effort to cope with a change from 32 to 64 bits,
2487 * there are also toc entries that are specified to be
2488 * either 32 or 64 bits:
2489 * lwz r4,[toc32].GS.0.static_int(rtoc)
2490 * lwz r4,[toc64].GS.0.static_int(rtoc)
2491 * These demand toc entries of the specified size, and the
2492 * instruction probably requires it.
2493 */
252b5132
RH		 2494
2495 int valid_toc;
2496 enum toc_size_qualifier toc_kind;
2497 bfd_reloc_code_real_type toc_reloc;
2498
99a814a1
AM		 2499 /* Go parse off the [tocXX] part. */
2500 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2501
81d4177b 2502 if (!valid_toc)
252b5132 2503 {
99a814a1
AM		 2504 /* Note: message has already been issued.
2505 FIXME: what sort of recovery should we do?
2506 demand_rest_of_line (); return; ? */
252b5132
RH		 2507 }
2508
99a814a1
AM		 2509 /* Now get the symbol following the ']'. */
2510 expression (&ex);
252b5132
RH		 2511
2512 switch (toc_kind)
2513 {
2514 case default_toc:
99a814a1
AM		 2515 /* In this case, we may not have seen the symbol yet,
2516 since it is allowed to appear on a .extern or .globl
2517 or just be a label in the .data section. */
252b5132
RH		 2518 toc_reloc = BFD_RELOC_PPC_TOC16;
2519 break;
2520 case data_in_toc:
99a814a1
AM		 2521 /* 1. The symbol must be defined and either in the toc
2522 section, or a global.
2523 2. The reloc generated must have the TOCDEFN flag set
2524 in upper bit mess of the reloc type.
2525 FIXME: It's a little confusing what the tocv
2526 qualifier can be used for. At the very least, I've
2527 seen three uses, only one of which I'm sure I can
2528 explain. */
81d4177b
KH		 2529 if (ex.X_op == O_symbol)
2530 {
9c2799c2 2531 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2532 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2533 != tocdata_section)
252b5132 2534 {
99a814a1 2535 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2536 }
2537 }
2538
2539 toc_reloc = BFD_RELOC_PPC_TOC16;
2540 break;
2541 case must_be_32:
99a814a1
AM		 2542 /* FIXME: these next two specifically specify 32/64 bit
2543 toc entries. We don't support them today. Is this
2544 the right way to say that? */
252b5132
RH		 2545 toc_reloc = BFD_RELOC_UNUSED;
2546 as_bad (_("Unimplemented toc32 expression modifier"));
2547 break;
2548 case must_be_64:
99a814a1 2549 /* FIXME: see above. */
252b5132
RH		 2550 toc_reloc = BFD_RELOC_UNUSED;
2551 as_bad (_("Unimplemented toc64 expression modifier"));
2552 break;
2553 default:
bc805888 2554 fprintf (stderr,
99a814a1
AM		 2555 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2556 toc_kind);
bc805888 2557 abort ();
252b5132
RH		 2558 break;
2559 }
2560
2561 /* We need to generate a fixup for this expression. */
2562 if (fc >= MAX_INSN_FIXUPS)
2563 as_fatal (_("too many fixups"));
2564
2565 fixups[fc].reloc = toc_reloc;
2566 fixups[fc].exp = ex;
2567 fixups[fc].opindex = *opindex_ptr;
2568 ++fc;
2569
99a814a1
AM		 2570 /* Ok. We've set up the fixup for the instruction. Now make it
2571 look like the constant 0 was found here. */
252b5132
RH		 2572 ex.X_unsigned = 1;
2573 ex.X_op = O_constant;
2574 ex.X_add_number = 0;
2575 ex.X_add_symbol = NULL;
2576 ex.X_op_symbol = NULL;
2577 }
2578
2579 else
2580#endif /* TE_PE */
2581 {
2ad068be
AM		 2582 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2583 || !register_name (&ex))
252b5132 2584 {
13abbae3
AM		 2585 char save_lex = lex_type['%'];
2586
252b5132 2587 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2588 {
2589 cr_operand = TRUE;
2590 lex_type['%'] |= LEX_BEGIN_NAME;
2591 }
252b5132 2592 expression (&ex);
b34976b6 2593 cr_operand = FALSE;
13abbae3 2594 lex_type['%'] = save_lex;
252b5132
RH		 2595 }
2596 }
2597
2598 str = input_line_pointer;
2599 input_line_pointer = hold;
2600
2601 if (ex.X_op == O_illegal)
2602 as_bad (_("illegal operand"));
2603 else if (ex.X_op == O_absent)
2604 as_bad (_("missing operand"));
2605 else if (ex.X_op == O_register)
2606 {
2607 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2608 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2609 }
2610 else if (ex.X_op == O_constant)
2611 {
2612#ifdef OBJ_ELF
81d4177b 2613 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2614 char *orig_str = str;
2615
2616 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2617 switch (reloc)
2618 {
2619 default:
2620 str = orig_str;
2621 break;
2622
2623 case BFD_RELOC_LO16:
2624 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2625 something which cleared it, we always produce a
2626 signed value. */
2627 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2628 ex.X_add_number &= 0xffff;
2629 else
0baf16f2 2630 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2631 break;
2632
2633 case BFD_RELOC_HI16:
0baf16f2
AM		 2634 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2635 ex.X_add_number = PPC_HI (ex.X_add_number);
2636 else
2637 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2638 break;
2639
2640 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2641 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2642 ex.X_add_number = PPC_HA (ex.X_add_number);
2643 else
2644 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2645 break;
2646
0baf16f2
AM		 2647 case BFD_RELOC_PPC64_HIGHER:
2648 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2649 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2650 else
2651 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2652 break;
2653
2654 case BFD_RELOC_PPC64_HIGHER_S:
2655 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2656 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2657 else
2658 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2659 break;
0baf16f2
AM		 2660
2661 case BFD_RELOC_PPC64_HIGHEST:
2662 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2663 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2664 else
2665 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2666 break;
2667
2668 case BFD_RELOC_PPC64_HIGHEST_S:
2669 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2670 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2671 else
2672 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2673 break;
252b5132 2674 }
0baf16f2 2675#endif /* OBJ_ELF */
252b5132 2676 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2677 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2678 }
2679#ifdef OBJ_ELF
727fc41e 2680 else
252b5132 2681 {
727fc41e 2682 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2683 {
727fc41e
AM		 2684 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2685 if (sym_name[0] == '.')
2686 ++sym_name;
cdba85ec 2687
727fc41e 2688 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2689 {
727fc41e
AM		 2690 expressionS tls_exp;
2691
2692 hold = input_line_pointer;
2693 input_line_pointer = str + 1;
2694 expression (&tls_exp);
2695 if (tls_exp.X_op == O_symbol)
2696 {
2697 reloc = BFD_RELOC_UNUSED;
2698 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2699 {
2700 reloc = BFD_RELOC_PPC_TLSGD;
2701 input_line_pointer += 7;
2702 }
2703 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2704 {
2705 reloc = BFD_RELOC_PPC_TLSLD;
2706 input_line_pointer += 7;
2707 }
2708 if (reloc != BFD_RELOC_UNUSED)
2709 {
2710 SKIP_WHITESPACE ();
2711 str = input_line_pointer;
2712
2713 if (fc >= MAX_INSN_FIXUPS)
2714 as_fatal (_("too many fixups"));
2715 fixups[fc].exp = tls_exp;
2716 fixups[fc].opindex = *opindex_ptr;
2717 fixups[fc].reloc = reloc;
2718 ++fc;
2719 }
2720 }
2721 input_line_pointer = hold;
252b5132
RH		 2722 }
2723 }
2724
727fc41e 2725 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2726 {
727fc41e 2727 /* Some TLS tweaks. */
0baf16f2
AM		 2728 switch (reloc)
2729 {
727fc41e 2730 default:
cdba85ec 2731 break;
727fc41e
AM		 2732
2733 case BFD_RELOC_PPC_TLS:
2734 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2735 ppc_cpu, (char *) NULL, 0);
cdba85ec 2736 break;
727fc41e
AM		 2737
2738 /* We'll only use the 32 (or 64) bit form of these relocations
2739 in constants. Instructions get the 16 bit form. */
2740 case BFD_RELOC_PPC_DTPREL:
2741 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2742 break;
727fc41e
AM		 2743 case BFD_RELOC_PPC_TPREL:
2744 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2745 break;
2746 }
727fc41e
AM		 2747
2748 /* For the absolute forms of branches, convert the PC
2749 relative form back into the absolute. */
2750 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2751 {
2752 switch (reloc)
2753 {
2754 case BFD_RELOC_PPC_B26:
2755 reloc = BFD_RELOC_PPC_BA26;
2756 break;
2757 case BFD_RELOC_PPC_B16:
2758 reloc = BFD_RELOC_PPC_BA16;
2759 break;
2760 case BFD_RELOC_PPC_B16_BRTAKEN:
2761 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2762 break;
2763 case BFD_RELOC_PPC_B16_BRNTAKEN:
2764 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2765 break;
2766 default:
2767 break;
2768 }
2769 }
2770
2771 if (ppc_obj64
2772 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2773 {
2774 switch (reloc)
2775 {
2776 case BFD_RELOC_16:
2777 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2778 break;
2779 case BFD_RELOC_LO16:
2780 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2781 break;
2782 case BFD_RELOC_16_GOTOFF:
2783 reloc = BFD_RELOC_PPC64_GOT16_DS;
2784 break;
2785 case BFD_RELOC_LO16_GOTOFF:
2786 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2787 break;
2788 case BFD_RELOC_LO16_PLTOFF:
2789 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2790 break;
2791 case BFD_RELOC_16_BASEREL:
2792 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2793 break;
2794 case BFD_RELOC_LO16_BASEREL:
2795 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2796 break;
2797 case BFD_RELOC_PPC_TOC16:
2798 reloc = BFD_RELOC_PPC64_TOC16_DS;
2799 break;
2800 case BFD_RELOC_PPC64_TOC16_LO:
2801 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2802 break;
2803 case BFD_RELOC_PPC64_PLTGOT16:
2804 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2805 break;
2806 case BFD_RELOC_PPC64_PLTGOT16_LO:
2807 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2808 break;
2809 case BFD_RELOC_PPC_DTPREL16:
2810 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2811 break;
2812 case BFD_RELOC_PPC_DTPREL16_LO:
2813 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2814 break;
2815 case BFD_RELOC_PPC_TPREL16:
2816 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2817 break;
2818 case BFD_RELOC_PPC_TPREL16_LO:
2819 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2820 break;
2821 case BFD_RELOC_PPC_GOT_DTPREL16:
2822 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2823 case BFD_RELOC_PPC_GOT_TPREL16:
2824 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2825 break;
2826 default:
2827 as_bad (_("unsupported relocation for DS offset field"));
2828 break;
2829 }
2830 }
0baf16f2
AM		 2831 }
2832
252b5132
RH		 2833 /* We need to generate a fixup for this expression. */
2834 if (fc >= MAX_INSN_FIXUPS)
2835 as_fatal (_("too many fixups"));
2836 fixups[fc].exp = ex;
727fc41e 2837 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2838 fixups[fc].reloc = reloc;
2839 ++fc;
2840 }
727fc41e 2841#else /* OBJ_ELF */
252b5132
RH		 2842 else
2843 {
2844 /* We need to generate a fixup for this expression. */
2845 if (fc >= MAX_INSN_FIXUPS)
2846 as_fatal (_("too many fixups"));
2847 fixups[fc].exp = ex;
2848 fixups[fc].opindex = *opindex_ptr;
2849 fixups[fc].reloc = BFD_RELOC_UNUSED;
2850 ++fc;
2851 }
727fc41e 2852#endif /* OBJ_ELF */
252b5132
RH		 2853
2854 if (need_paren)
2855 {
2856 endc = ')';
2857 need_paren = 0;
c3d65c1c
BE		 2858 /* If expecting more operands, then we want to see "),". */
2859 if (*str == endc && opindex_ptr[1] != 0)
2860 {
2861 do
2862 ++str;
2863 while (ISSPACE (*str));
2864 endc = ',';
2865 }
252b5132
RH		 2866 }
2867 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2868 {
2869 endc = '(';
2870 need_paren = 1;
2871 }
2872 else
2873 endc = ',';
2874
2875 /* The call to expression should have advanced str past any
2876 whitespace. */
2877 if (*str != endc
2878 && (endc != ',' || *str != '\0'))
2879 {
2880 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2881 break;
2882 }
2883
2884 if (*str != '\0')
2885 ++str;
2886 }
2887
3882b010 2888 while (ISSPACE (*str))
252b5132
RH		 2889 ++str;
2890
2891 if (*str != '\0')
2892 as_bad (_("junk at end of line: `%s'"), str);
2893
dc1d03fc 2894#ifdef OBJ_ELF
6a0c61b7 2895 /* Do we need/want a APUinfo section? */
ed84b57b 2896 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2897 {
2898 /* These are all version "1". */
2899 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2900 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2901 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2902 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2903 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2904 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2905 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2906 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2907 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2908 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2909 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2910 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2911 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2912 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2913 }
dc1d03fc 2914#endif
6a0c61b7 2915
252b5132
RH		 2916 /* Write out the instruction. */
2917 f = frag_more (4);
09b935ac
AM		 2918 addr_mod = frag_now_fix () & 3;
2919 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2920 as_bad (_("instruction address is not a multiple of 4"));
2921 frag_now->insn_addr = addr_mod;
2922 frag_now->has_code = 1;
252b5132
RH		 2923 md_number_to_chars (f, insn, 4);
2924
5d6f4f16
GK		 2925#ifdef OBJ_ELF
2926 dwarf2_emit_insn (4);
2927#endif
2928
252b5132
RH		 2929 /* Create any fixups. At this point we do not use a
2930 bfd_reloc_code_real_type, but instead just use the
2931 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2932 handle fixups for any operand type, although that is admittedly
2933 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2934 md_apply_fix. */
252b5132
RH		 2935 for (i = 0; i < fc; i++)
2936 {
252b5132
RH		 2937 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2938 {
99a814a1 2939 reloc_howto_type *reloc_howto;
252b5132
RH		 2940 int size;
2941 int offset;
2942 fixS *fixP;
2943
99a814a1 2944 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2945 if (!reloc_howto)
2946 abort ();
2947
2948 size = bfd_get_reloc_size (reloc_howto);
2949 offset = target_big_endian ? (4 - size) : 0;
2950
2951 if (size < 1 || size > 4)
bc805888 2952 abort ();
252b5132 2953
99a814a1
AM		 2954 fixP = fix_new_exp (frag_now,
2955 f - frag_now->fr_literal + offset,
2956 size,
2957 &fixups[i].exp,
2958 reloc_howto->pc_relative,
252b5132
RH		 2959 fixups[i].reloc);
2960
2961 /* Turn off complaints that the addend is too large for things like
2962 foo+100000@ha. */
2963 switch (fixups[i].reloc)
2964 {
2965 case BFD_RELOC_16_GOTOFF:
2966 case BFD_RELOC_PPC_TOC16:
2967 case BFD_RELOC_LO16:
2968 case BFD_RELOC_HI16:
2969 case BFD_RELOC_HI16_S:
0baf16f2 2970#ifdef OBJ_ELF
0baf16f2
AM		 2971 case BFD_RELOC_PPC64_HIGHER:
2972 case BFD_RELOC_PPC64_HIGHER_S:
2973 case BFD_RELOC_PPC64_HIGHEST:
2974 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2975#endif
252b5132
RH		 2976 fixP->fx_no_overflow = 1;
2977 break;
2978 default:
2979 break;
2980 }
2981 }
2982 else
727fc41e
AM		 2983 {
2984 const struct powerpc_operand *operand;
2985
2986 operand = &powerpc_operands[fixups[i].opindex];
2987 fix_new_exp (frag_now,
2988 f - frag_now->fr_literal,
2989 4,
2990 &fixups[i].exp,
2991 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2992 ((bfd_reloc_code_real_type)
2993 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
2994 }
252b5132
RH		 2995 }
2996}
2997
2998/* Handle a macro. Gather all the operands, transform them as
2999 described by the macro, and call md_assemble recursively. All the
3000 operands are separated by commas; we don't accept parentheses
3001 around operands here. */
3002
3003static void
98027b10 3004ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3005{
3006 char *operands[10];
3007 unsigned int count;
3008 char *s;
3009 unsigned int len;
3010 const char *format;
db557034 3011 unsigned int arg;
252b5132
RH		 3012 char *send;
3013 char *complete;
3014
3015 /* Gather the users operands into the operands array. */
3016 count = 0;
3017 s = str;
3018 while (1)
3019 {
3020 if (count >= sizeof operands / sizeof operands[0])
3021 break;
3022 operands[count++] = s;
3023 s = strchr (s, ',');
3024 if (s == (char *) NULL)
3025 break;
3026 *s++ = '\0';
81d4177b 3027 }
252b5132
RH		 3028
3029 if (count != macro->operands)
3030 {
3031 as_bad (_("wrong number of operands"));
3032 return;
3033 }
3034
3035 /* Work out how large the string must be (the size is unbounded
3036 because it includes user input). */
3037 len = 0;
3038 format = macro->format;
3039 while (*format != '\0')
3040 {
3041 if (*format != '%')
3042 {
3043 ++len;
3044 ++format;
3045 }
3046 else
3047 {
3048 arg = strtol (format + 1, &send, 10);
db557034 3049 know (send != format && arg < count);
252b5132
RH		 3050 len += strlen (operands[arg]);
3051 format = send;
3052 }
3053 }
3054
3055 /* Put the string together. */
3056 complete = s = (char *) alloca (len + 1);
3057 format = macro->format;
3058 while (*format != '\0')
3059 {
3060 if (*format != '%')
3061 *s++ = *format++;
3062 else
3063 {
3064 arg = strtol (format + 1, &send, 10);
3065 strcpy (s, operands[arg]);
3066 s += strlen (s);
3067 format = send;
3068 }
3069 }
3070 *s = '\0';
3071
3072 /* Assemble the constructed instruction. */
3073 md_assemble (complete);
81d4177b 3074}
252b5132
RH		 3075\f
3076#ifdef OBJ_ELF
99a814a1 3077/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3078
01e1a5bc 3079bfd_vma
98027b10 3080ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3081{
3082 if (letter == 'e')
3083 return SHF_EXCLUDE;
3084
13ae64f3 3085 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3086 return -1;
252b5132
RH		 3087}
3088
01e1a5bc 3089bfd_vma
98027b10 3090ppc_section_word (char *str, size_t len)
252b5132 3091{
9de8d8f1
RH		 3092 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3093 return SHF_EXCLUDE;
252b5132 3094
9de8d8f1 3095 return -1;
252b5132
RH		 3096}
3097
3098int
98027b10 3099ppc_section_type (char *str, size_t len)
252b5132 3100{
9de8d8f1
RH		 3101 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3102 return SHT_ORDERED;
252b5132 3103
9de8d8f1 3104 return -1;
252b5132
RH		 3105}
3106
3107int
01e1a5bc 3108ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3109{
3110 if (type == SHT_ORDERED)
3111 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3112
3113 if (attr & SHF_EXCLUDE)
3114 flags |= SEC_EXCLUDE;
3115
3116 return flags;
3117}
3118#endif /* OBJ_ELF */
3119
3120\f
3121/* Pseudo-op handling. */
3122
3123/* The .byte pseudo-op. This is similar to the normal .byte
3124 pseudo-op, but it can also take a single ASCII string. */
3125
3126static void
98027b10 3127ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3128{
3129 if (*input_line_pointer != '\"')
3130 {
3131 cons (1);
3132 return;
3133 }
3134
3135 /* Gather characters. A real double quote is doubled. Unusual
3136 characters are not permitted. */
3137 ++input_line_pointer;
3138 while (1)
3139 {
3140 char c;
3141
3142 c = *input_line_pointer++;
3143
3144 if (c == '\"')
3145 {
3146 if (*input_line_pointer != '\"')
3147 break;
3148 ++input_line_pointer;
3149 }
3150
3151 FRAG_APPEND_1_CHAR (c);
3152 }
3153
3154 demand_empty_rest_of_line ();
3155}
3156\f
3157#ifdef OBJ_XCOFF
3158
3159/* XCOFF specific pseudo-op handling. */
3160
3161/* This is set if we are creating a .stabx symbol, since we don't want
3162 to handle symbol suffixes for such symbols. */
b34976b6 3163static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3164
3165/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3166 symbols in the .bss segment as though they were local common
67c1ffbe 3167 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3168 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3169
3170static void
98027b10 3171ppc_comm (int lcomm)
252b5132
RH		 3172{
3173 asection *current_seg = now_seg;
3174 subsegT current_subseg = now_subseg;
3175 char *name;
3176 char endc;
3177 char *end_name;
3178 offsetT size;
3179 offsetT align;
3180 symbolS *lcomm_sym = NULL;
3181 symbolS *sym;
3182 char *pfrag;
3183
3184 name = input_line_pointer;
3185 endc = get_symbol_end ();
3186 end_name = input_line_pointer;
3187 *end_name = endc;
3188
3189 if (*input_line_pointer != ',')
3190 {
3191 as_bad (_("missing size"));
3192 ignore_rest_of_line ();
3193 return;
3194 }
3195 ++input_line_pointer;
3196
3197 size = get_absolute_expression ();
3198 if (size < 0)
3199 {
3200 as_bad (_("negative size"));
3201 ignore_rest_of_line ();
3202 return;
3203 }
3204
3205 if (! lcomm)
3206 {
3207 /* The third argument to .comm is the alignment. */
3208 if (*input_line_pointer != ',')
1ad63b2f 3209 align = 2;
252b5132
RH		 3210 else
3211 {
3212 ++input_line_pointer;
3213 align = get_absolute_expression ();
3214 if (align <= 0)
3215 {
3216 as_warn (_("ignoring bad alignment"));
1ad63b2f 3217 align = 2;
252b5132
RH		 3218 }
3219 }
3220 }
3221 else
3222 {
3223 char *lcomm_name;
3224 char lcomm_endc;
3225
1ad63b2f 3226 if (size <= 4)
252b5132
RH		 3227 align = 2;
3228 else
3229 align = 3;
3230
3231 /* The third argument to .lcomm appears to be the real local
3232 common symbol to create. References to the symbol named in
3233 the first argument are turned into references to the third
3234 argument. */
3235 if (*input_line_pointer != ',')
3236 {
3237 as_bad (_("missing real symbol name"));
3238 ignore_rest_of_line ();
3239 return;
3240 }
3241 ++input_line_pointer;
3242
3243 lcomm_name = input_line_pointer;
3244 lcomm_endc = get_symbol_end ();
81d4177b 3245
252b5132
RH		 3246 lcomm_sym = symbol_find_or_make (lcomm_name);
3247
3248 *input_line_pointer = lcomm_endc;
3249 }
3250
3251 *end_name = '\0';
3252 sym = symbol_find_or_make (name);
3253 *end_name = endc;
3254
3255 if (S_IS_DEFINED (sym)
3256 || S_GET_VALUE (sym) != 0)
3257 {
3258 as_bad (_("attempt to redefine symbol"));
3259 ignore_rest_of_line ();
3260 return;
3261 }
81d4177b 3262
252b5132 3263 record_alignment (bss_section, align);
81d4177b 3264
252b5132
RH		 3265 if (! lcomm
3266 || ! S_IS_DEFINED (lcomm_sym))
3267 {
3268 symbolS *def_sym;
3269 offsetT def_size;
3270
3271 if (! lcomm)
3272 {
3273 def_sym = sym;
3274 def_size = size;
3275 S_SET_EXTERNAL (sym);
3276 }
3277 else
3278 {
809ffe0d 3279 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3280 def_sym = lcomm_sym;
3281 def_size = 0;
3282 }
3283
3284 subseg_set (bss_section, 1);
3285 frag_align (align, 0, 0);
81d4177b 3286
809ffe0d 3287 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3288 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3289 def_size, (char *) NULL);
3290 *pfrag = 0;
3291 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3292 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3293 }
3294 else if (lcomm)
3295 {
3296 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3297 symbol_get_frag (lcomm_sym)->fr_offset =
3298 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3299 &~ ((1 << align) - 1));
809ffe0d
ILT		 3300 if (align > symbol_get_tc (lcomm_sym)->align)
3301 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3302 }
3303
3304 if (lcomm)
3305 {
3306 /* Make sym an offset from lcomm_sym. */
3307 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3308 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3309 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3310 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3311 }
3312
3313 subseg_set (current_seg, current_subseg);
3314
3315 demand_empty_rest_of_line ();
3316}
3317
3318/* The .csect pseudo-op. This switches us into a different
3319 subsegment. The first argument is a symbol whose value is the
3320 start of the .csect. In COFF, csect symbols get special aux
3321 entries defined by the x_csect field of union internal_auxent. The
3322 optional second argument is the alignment (the default is 2). */
3323
3324static void
98027b10 3325ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3326{
3327 char *name;
3328 char endc;
3329 symbolS *sym;
931e13a6 3330 offsetT align;
252b5132
RH		 3331
3332 name = input_line_pointer;
3333 endc = get_symbol_end ();
81d4177b 3334
252b5132
RH		 3335 sym = symbol_find_or_make (name);
3336
3337 *input_line_pointer = endc;
3338
3339 if (S_GET_NAME (sym)[0] == '\0')
3340 {
3341 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3342 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3343 }
3344
931e13a6 3345 align = 2;
252b5132
RH		 3346 if (*input_line_pointer == ',')
3347 {
3348 ++input_line_pointer;
931e13a6 3349 align = get_absolute_expression ();
252b5132
RH		 3350 }
3351
931e13a6
AM		 3352 ppc_change_csect (sym, align);
3353
252b5132
RH		 3354 demand_empty_rest_of_line ();
3355}
3356
3357/* Change to a different csect. */
3358
3359static void
98027b10 3360ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3361{
3362 if (S_IS_DEFINED (sym))
809ffe0d 3363 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3364 else
3365 {
3366 symbolS **list_ptr;
3367 int after_toc;
3368 int hold_chunksize;
3369 symbolS *list;
931e13a6
AM		 3370 int is_code;
3371 segT sec;
252b5132
RH		 3372
3373 /* This is a new csect. We need to look at the symbol class to
3374 figure out whether it should go in the text section or the
3375 data section. */
3376 after_toc = 0;
931e13a6 3377 is_code = 0;
96d56e9f 3378 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3379 {
3380 case XMC_PR:
3381 case XMC_RO:
3382 case XMC_DB:
3383 case XMC_GL:
3384 case XMC_XO:
3385 case XMC_SV:
3386 case XMC_TI:
3387 case XMC_TB:
3388 S_SET_SEGMENT (sym, text_section);
809ffe0d 3389 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3390 ++ppc_text_subsegment;
3391 list_ptr = &ppc_text_csects;
931e13a6 3392 is_code = 1;
252b5132
RH		 3393 break;
3394 case XMC_RW:
3395 case XMC_TC0:
3396 case XMC_TC:
3397 case XMC_DS:
3398 case XMC_UA:
3399 case XMC_BS:
3400 case XMC_UC:
3401 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3402 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3403 == ppc_data_subsegment))
252b5132
RH		 3404 after_toc = 1;
3405 S_SET_SEGMENT (sym, data_section);
809ffe0d 3406 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3407 ++ppc_data_subsegment;
3408 list_ptr = &ppc_data_csects;
3409 break;
3410 default:
3411 abort ();
3412 }
3413
3414 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3415 changing subsegments, so that we don't use a lot of memory
3416 space for what may be a small section. */
252b5132
RH		 3417 hold_chunksize = chunksize;
3418 chunksize = 64;
3419
931e13a6
AM		 3420 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3421 symbol_get_tc (sym)->subseg);
252b5132
RH		 3422
3423 chunksize = hold_chunksize;
3424
3425 if (after_toc)
3426 ppc_after_toc_frag = frag_now;
3427
931e13a6
AM		 3428 record_alignment (sec, align);
3429 if (is_code)
3430 frag_align_code (align, 0);
3431 else
3432 frag_align (align, 0, 0);
3433
809ffe0d 3434 symbol_set_frag (sym, frag_now);
252b5132
RH		 3435 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3436
931e13a6 3437 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3438 symbol_get_tc (sym)->output = 1;
3439 symbol_get_tc (sym)->within = sym;
81d4177b 3440
252b5132 3441 for (list = *list_ptr;
809ffe0d
ILT		 3442 symbol_get_tc (list)->next != (symbolS *) NULL;
3443 list = symbol_get_tc (list)->next)
252b5132 3444 ;
809ffe0d 3445 symbol_get_tc (list)->next = sym;
81d4177b 3446
252b5132 3447 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3448 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3449 &symbol_lastP);
252b5132
RH		 3450 }
3451
3452 ppc_current_csect = sym;
3453}
3454
3455/* This function handles the .text and .data pseudo-ops. These
3456 pseudo-ops aren't really used by XCOFF; we implement them for the
3457 convenience of people who aren't used to XCOFF. */
3458
3459static void
98027b10 3460ppc_section (int type)
252b5132
RH		 3461{
3462 const char *name;
3463 symbolS *sym;
3464
3465 if (type == 't')
3466 name = ".text[PR]";
3467 else if (type == 'd')
3468 name = ".data[RW]";
3469 else
3470 abort ();
3471
3472 sym = symbol_find_or_make (name);
3473
931e13a6 3474 ppc_change_csect (sym, 2);
252b5132
RH		 3475
3476 demand_empty_rest_of_line ();
3477}
3478
3479/* This function handles the .section pseudo-op. This is mostly to
3480 give an error, since XCOFF only supports .text, .data and .bss, but
3481 we do permit the user to name the text or data section. */
3482
3483static void
98027b10 3484ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3485{
3486 char *user_name;
3487 const char *real_name;
3488 char c;
3489 symbolS *sym;
3490
3491 user_name = input_line_pointer;
3492 c = get_symbol_end ();
3493
3494 if (strcmp (user_name, ".text") == 0)
3495 real_name = ".text[PR]";
3496 else if (strcmp (user_name, ".data") == 0)
3497 real_name = ".data[RW]";
3498 else
3499 {
3500 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3501 *input_line_pointer = c;
3502 ignore_rest_of_line ();
3503 return;
3504 }
3505
3506 *input_line_pointer = c;
3507
3508 sym = symbol_find_or_make (real_name);
3509
931e13a6 3510 ppc_change_csect (sym, 2);
252b5132
RH		 3511
3512 demand_empty_rest_of_line ();
3513}
3514
3515/* The .extern pseudo-op. We create an undefined symbol. */
3516
3517static void
98027b10 3518ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3519{
3520 char *name;
3521 char endc;
3522
3523 name = input_line_pointer;
3524 endc = get_symbol_end ();
3525
3526 (void) symbol_find_or_make (name);
3527
3528 *input_line_pointer = endc;
3529
3530 demand_empty_rest_of_line ();
3531}
3532
3533/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3534
3535static void
98027b10 3536ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3537{
3538 char *name;
3539 char endc;
3540 symbolS *sym;
3541
3542 name = input_line_pointer;
3543 endc = get_symbol_end ();
3544
3545 sym = symbol_find_or_make (name);
3546
3547 *input_line_pointer = endc;
3548
809ffe0d 3549 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3550
3551 demand_empty_rest_of_line ();
3552}
3553
3554/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3555 although I don't know why it bothers. */
3556
3557static void
98027b10 3558ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3559{
3560 char *name;
3561 char endc;
3562 symbolS *sym;
3563 int len;
3564
3565 name = input_line_pointer;
3566 endc = get_symbol_end ();
3567
3568 sym = symbol_find_or_make (name);
3569
3570 *input_line_pointer = endc;
3571
3572 if (*input_line_pointer != ',')
3573 {
3574 as_bad (_("missing rename string"));
3575 ignore_rest_of_line ();
3576 return;
3577 }
3578 ++input_line_pointer;
3579
809ffe0d 3580 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3581
3582 demand_empty_rest_of_line ();
3583}
3584
3585/* The .stabx pseudo-op. This is similar to a normal .stabs
3586 pseudo-op, but slightly different. A sample is
3587 .stabx "main:F-1",.main,142,0
3588 The first argument is the symbol name to create. The second is the
3589 value, and the third is the storage class. The fourth seems to be
3590 always zero, and I am assuming it is the type. */
3591
3592static void
98027b10 3593ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3594{
3595 char *name;
3596 int len;
3597 symbolS *sym;
3598 expressionS exp;
3599
3600 name = demand_copy_C_string (&len);
3601
3602 if (*input_line_pointer != ',')
3603 {
3604 as_bad (_("missing value"));
3605 return;
3606 }
3607 ++input_line_pointer;
3608
b34976b6 3609 ppc_stab_symbol = TRUE;
252b5132 3610 sym = symbol_make (name);
b34976b6 3611 ppc_stab_symbol = FALSE;
252b5132 3612
809ffe0d 3613 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3614
3615 (void) expression (&exp);
3616
3617 switch (exp.X_op)
3618 {
3619 case O_illegal:
3620 case O_absent:
3621 case O_big:
3622 as_bad (_("illegal .stabx expression; zero assumed"));
3623 exp.X_add_number = 0;
3624 /* Fall through. */
3625 case O_constant:
3626 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3627 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3628 break;
3629
3630 case O_symbol:
3631 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3632 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3633 else
3634 {
3635 S_SET_VALUE (sym,
3636 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3637 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3638 }
3639 break;
3640
3641 default:
3642 /* The value is some complex expression. This will probably
99a814a1
AM		 3643 fail at some later point, but this is probably the right
3644 thing to do here. */
809ffe0d 3645 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3646 break;
3647 }
3648
3649 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3650 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3651
3652 if (*input_line_pointer != ',')
3653 {
3654 as_bad (_("missing class"));
3655 return;
3656 }
3657 ++input_line_pointer;
3658
3659 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3660
3661 if (*input_line_pointer != ',')
3662 {
3663 as_bad (_("missing type"));
3664 return;
3665 }
3666 ++input_line_pointer;
3667
3668 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3669
809ffe0d 3670 symbol_get_tc (sym)->output = 1;
252b5132 3671
6877bb43 3672 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3673
809ffe0d 3674 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3675
41ea10b1 3676 /* In this case :
99a814a1 3677
41ea10b1
TR		 3678 .bs name
3679 .stabx "z",arrays_,133,0
3680 .es
99a814a1 3681
41ea10b1 3682 .comm arrays_,13768,3
99a814a1 3683
41ea10b1
TR		 3684 resolve_symbol_value will copy the exp's "within" into sym's when the
3685 offset is 0. Since this seems to be corner case problem,
3686 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3687 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3688
3689 if (exp.X_op == O_symbol)
41ea10b1
TR		 3690 {
3691 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3692 }
6877bb43 3693 }
99a814a1 3694
252b5132
RH		 3695 if (exp.X_op != O_symbol
3696 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3697 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3698 ppc_frob_label (sym);
3699 else
3700 {
3701 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3702 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3703 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3704 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3705 }
3706
3707 demand_empty_rest_of_line ();
3708}
3709
3710/* The .function pseudo-op. This takes several arguments. The first
3711 argument seems to be the external name of the symbol. The second
67c1ffbe 3712 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3713 uses the same name for both. I have no idea what the third and
3714 fourth arguments are meant to be. The optional fifth argument is
3715 an expression for the size of the function. In COFF this symbol
3716 gets an aux entry like that used for a csect. */
3717
3718static void
98027b10 3719ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3720{
3721 char *name;
3722 char endc;
3723 char *s;
3724 symbolS *ext_sym;
3725 symbolS *lab_sym;
3726
3727 name = input_line_pointer;
3728 endc = get_symbol_end ();
3729
3730 /* Ignore any [PR] suffix. */
3731 name = ppc_canonicalize_symbol_name (name);
3732 s = strchr (name, '[');
3733 if (s != (char *) NULL
3734 && strcmp (s + 1, "PR]") == 0)
3735 *s = '\0';
3736
3737 ext_sym = symbol_find_or_make (name);
3738
3739 *input_line_pointer = endc;
3740
3741 if (*input_line_pointer != ',')
3742 {
3743 as_bad (_("missing symbol name"));
3744 ignore_rest_of_line ();
3745 return;
3746 }
3747 ++input_line_pointer;
3748
3749 name = input_line_pointer;
3750 endc = get_symbol_end ();
3751
3752 lab_sym = symbol_find_or_make (name);
3753
3754 *input_line_pointer = endc;
3755
3756 if (ext_sym != lab_sym)
3757 {
809ffe0d
ILT		 3758 expressionS exp;
3759
3760 exp.X_op = O_symbol;
3761 exp.X_add_symbol = lab_sym;
3762 exp.X_op_symbol = NULL;
3763 exp.X_add_number = 0;
3764 exp.X_unsigned = 0;
3765 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3766 }
3767
96d56e9f
NC		 3768 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3769 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3770 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3771
3772 if (*input_line_pointer == ',')
3773 {
3774 expressionS ignore;
3775
3776 /* Ignore the third argument. */
3777 ++input_line_pointer;
3778 expression (&ignore);
3779 if (*input_line_pointer == ',')
3780 {
3781 /* Ignore the fourth argument. */
3782 ++input_line_pointer;
3783 expression (&ignore);
3784 if (*input_line_pointer == ',')
3785 {
3786 /* The fifth argument is the function size. */
3787 ++input_line_pointer;
809ffe0d
ILT		 3788 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3789 absolute_section,
3790 (valueT) 0,
3791 &zero_address_frag);
3792 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3793 }
3794 }
3795 }
3796
3797 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3798 SF_SET_FUNCTION (ext_sym);
3799 SF_SET_PROCESS (ext_sym);
3800 coff_add_linesym (ext_sym);
3801
3802 demand_empty_rest_of_line ();
3803}
3804
3805/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3806 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3807 with the correct line number */
5d6255fe 3808
8642cce8 3809static symbolS *saved_bi_sym = 0;
252b5132
RH		 3810
3811static void
98027b10 3812ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3813{
3814 symbolS *sym;
3815
3816 sym = symbol_make (".bf");
3817 S_SET_SEGMENT (sym, text_section);
809ffe0d 3818 symbol_set_frag (sym, frag_now);
252b5132
RH		 3819 S_SET_VALUE (sym, frag_now_fix ());
3820 S_SET_STORAGE_CLASS (sym, C_FCN);
3821
3822 coff_line_base = get_absolute_expression ();
3823
3824 S_SET_NUMBER_AUXILIARY (sym, 1);
3825 SA_SET_SYM_LNNO (sym, coff_line_base);
3826
8642cce8 3827 /* Line number for bi. */
5d6255fe 3828 if (saved_bi_sym)
8642cce8
TR		 3829 {
3830 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3831 saved_bi_sym = 0;
3832 }
5d6255fe 3833
8642cce8 3834
809ffe0d 3835 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3836
3837 ppc_frob_label (sym);
3838
3839 demand_empty_rest_of_line ();
3840}
3841
3842/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3843 ".ef", except that the line number is absolute, not relative to the
3844 most recent ".bf" symbol. */
3845
3846static void
98027b10 3847ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3848{
3849 symbolS *sym;
3850
3851 sym = symbol_make (".ef");
3852 S_SET_SEGMENT (sym, text_section);
809ffe0d 3853 symbol_set_frag (sym, frag_now);
252b5132
RH		 3854 S_SET_VALUE (sym, frag_now_fix ());
3855 S_SET_STORAGE_CLASS (sym, C_FCN);
3856 S_SET_NUMBER_AUXILIARY (sym, 1);
3857 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3858 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3859
3860 ppc_frob_label (sym);
3861
3862 demand_empty_rest_of_line ();
3863}
3864
3865/* The .bi and .ei pseudo-ops. These take a string argument and
3866 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3867 the symbol list. The value of .bi will be know when the next .bf
3868 is encountered. */
252b5132
RH		 3869
3870static void
98027b10 3871ppc_biei (int ei)
252b5132
RH		 3872{
3873 static symbolS *last_biei;
3874
3875 char *name;
3876 int len;
3877 symbolS *sym;
3878 symbolS *look;
3879
3880 name = demand_copy_C_string (&len);
3881
3882 /* The value of these symbols is actually file offset. Here we set
3883 the value to the index into the line number entries. In
3884 ppc_frob_symbols we set the fix_line field, which will cause BFD
3885 to do the right thing. */
3886
3887 sym = symbol_make (name);
3888 /* obj-coff.c currently only handles line numbers correctly in the
3889 .text section. */
3890 S_SET_SEGMENT (sym, text_section);
3891 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3892 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3893
3894 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3895 symbol_get_tc (sym)->output = 1;
81d4177b 3896
8642cce8 3897 /* Save bi. */
5d6255fe 3898 if (ei)
8642cce8
TR		 3899 saved_bi_sym = 0;
3900 else
3901 saved_bi_sym = sym;
3902
252b5132
RH		 3903 for (look = last_biei ? last_biei : symbol_rootP;
3904 (look != (symbolS *) NULL
3905 && (S_GET_STORAGE_CLASS (look) == C_FILE
3906 || S_GET_STORAGE_CLASS (look) == C_BINCL
3907 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3908 look = symbol_next (look))
3909 ;
3910 if (look != (symbolS *) NULL)
3911 {
3912 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3913 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3914 last_biei = sym;
3915 }
3916
3917 demand_empty_rest_of_line ();
3918}
3919
3920/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3921 There is one argument, which is a csect symbol. The value of the
3922 .bs symbol is the index of this csect symbol. */
3923
3924static void
98027b10 3925ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3926{
3927 char *name;
3928 char endc;
3929 symbolS *csect;
3930 symbolS *sym;
3931
3932 if (ppc_current_block != NULL)
3933 as_bad (_("nested .bs blocks"));
3934
3935 name = input_line_pointer;
3936 endc = get_symbol_end ();
3937
3938 csect = symbol_find_or_make (name);
3939
3940 *input_line_pointer = endc;
3941
3942 sym = symbol_make (".bs");
3943 S_SET_SEGMENT (sym, now_seg);
3944 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3945 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3946 symbol_get_tc (sym)->output = 1;
252b5132 3947
809ffe0d 3948 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3949
3950 ppc_frob_label (sym);
3951
3952 ppc_current_block = sym;
3953
3954 demand_empty_rest_of_line ();
3955}
3956
3957/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3958
3959static void
98027b10 3960ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3961{
3962 symbolS *sym;
3963
3964 if (ppc_current_block == NULL)
3965 as_bad (_(".es without preceding .bs"));
3966
3967 sym = symbol_make (".es");
3968 S_SET_SEGMENT (sym, now_seg);
3969 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3970 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3971 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3972
3973 ppc_frob_label (sym);
3974
3975 ppc_current_block = NULL;
3976
3977 demand_empty_rest_of_line ();
3978}
3979
3980/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3981 line number. */
3982
3983static void
98027b10 3984ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3985{
3986 symbolS *sym;
3987
3988 sym = symbol_make (".bb");
3989 S_SET_SEGMENT (sym, text_section);
809ffe0d 3990 symbol_set_frag (sym, frag_now);
252b5132
RH		 3991 S_SET_VALUE (sym, frag_now_fix ());
3992 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3993
3994 S_SET_NUMBER_AUXILIARY (sym, 1);
3995 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3996
809ffe0d 3997 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3998
3999 SF_SET_PROCESS (sym);
4000
4001 ppc_frob_label (sym);
4002
4003 demand_empty_rest_of_line ();
4004}
4005
4006/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4007 line number. */
4008
4009static void
98027b10 4010ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4011{
4012 symbolS *sym;
4013
4014 sym = symbol_make (".eb");
4015 S_SET_SEGMENT (sym, text_section);
809ffe0d 4016 symbol_set_frag (sym, frag_now);
252b5132
RH		 4017 S_SET_VALUE (sym, frag_now_fix ());
4018 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4019 S_SET_NUMBER_AUXILIARY (sym, 1);
4020 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4021 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4022
4023 SF_SET_PROCESS (sym);
4024
4025 ppc_frob_label (sym);
4026
4027 demand_empty_rest_of_line ();
4028}
4029
4030/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4031 specified name. */
4032
4033static void
98027b10 4034ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4035{
4036 char *name;
4037 int len;
4038 symbolS *sym;
4039
4040 name = demand_copy_C_string (&len);
4041 sym = symbol_make (name);
4042 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4043 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4044 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4045 S_SET_VALUE (sym, 0);
809ffe0d 4046 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4047
4048 ppc_frob_label (sym);
4049
4050 demand_empty_rest_of_line ();
4051}
4052
4053/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4054
4055static void
98027b10 4056ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4057{
4058 symbolS *sym;
4059
4060 sym = symbol_make (".ec");
4061 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4062 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4063 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4064 S_SET_VALUE (sym, 0);
809ffe0d 4065 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4066
4067 ppc_frob_label (sym);
4068
4069 demand_empty_rest_of_line ();
4070}
4071
4072/* The .toc pseudo-op. Switch to the .toc subsegment. */
4073
4074static void
98027b10 4075ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4076{
4077 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4078 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4079 else
4080 {
4081 subsegT subseg;
4082 symbolS *sym;
4083 symbolS *list;
81d4177b 4084
252b5132
RH		 4085 subseg = ppc_data_subsegment;
4086 ++ppc_data_subsegment;
4087
4088 subseg_new (segment_name (data_section), subseg);
4089 ppc_toc_frag = frag_now;
4090
4091 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4092 symbol_set_frag (sym, frag_now);
252b5132
RH		 4093 S_SET_SEGMENT (sym, data_section);
4094 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4095 symbol_get_tc (sym)->subseg = subseg;
4096 symbol_get_tc (sym)->output = 1;
4097 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4098
4099 ppc_toc_csect = sym;
81d4177b 4100
252b5132 4101 for (list = ppc_data_csects;
809ffe0d
ILT		 4102 symbol_get_tc (list)->next != (symbolS *) NULL;
4103 list = symbol_get_tc (list)->next)
252b5132 4104 ;
809ffe0d 4105 symbol_get_tc (list)->next = sym;
252b5132
RH		 4106
4107 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4108 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4109 &symbol_lastP);
252b5132
RH		 4110 }
4111
4112 ppc_current_csect = ppc_toc_csect;
4113
4114 demand_empty_rest_of_line ();
4115}
4116
4117/* The AIX assembler automatically aligns the operands of a .long or
4118 .short pseudo-op, and we want to be compatible. */
4119
4120static void
98027b10 4121ppc_xcoff_cons (int log_size)
252b5132
RH		 4122{
4123 frag_align (log_size, 0, 0);
4124 record_alignment (now_seg, log_size);
4125 cons (1 << log_size);
4126}
4127
4128static void
98027b10 4129ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4130{
4131 expressionS exp;
4132 int byte_count;
4133
4134 (void) expression (&exp);
4135
4136 if (exp.X_op != O_constant)
4137 {
4138 as_bad (_("non-constant byte count"));
4139 return;
4140 }
4141
4142 byte_count = exp.X_add_number;
4143
4144 if (*input_line_pointer != ',')
4145 {
4146 as_bad (_("missing value"));
4147 return;
4148 }
4149
4150 ++input_line_pointer;
4151 cons (byte_count);
4152}
4153
4154#endif /* OBJ_XCOFF */
0baf16f2 4155#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4156\f
4157/* The .tc pseudo-op. This is used when generating either XCOFF or
4158 ELF. This takes two or more arguments.
4159
4160 When generating XCOFF output, the first argument is the name to
4161 give to this location in the toc; this will be a symbol with class
0baf16f2 4162 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4163 this location in the TOC; often there is just one more argument, a
1049f94e 4164 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4165 depends on target word size. A 32-bit target uses 4-byte values, a
4166 64-bit target uses 8-byte values.
252b5132
RH		 4167
4168 When not generating XCOFF output, the arguments are the same, but
4169 the first argument is simply ignored. */
4170
4171static void
98027b10 4172ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4173{
4174#ifdef OBJ_XCOFF
4175
4176 /* Define the TOC symbol name. */
4177 {
4178 char *name;
4179 char endc;
4180 symbolS *sym;
4181
4182 if (ppc_toc_csect == (symbolS *) NULL
4183 || ppc_toc_csect != ppc_current_csect)
4184 {
4185 as_bad (_(".tc not in .toc section"));
4186 ignore_rest_of_line ();
4187 return;
4188 }
4189
4190 name = input_line_pointer;
4191 endc = get_symbol_end ();
4192
4193 sym = symbol_find_or_make (name);
4194
4195 *input_line_pointer = endc;
4196
4197 if (S_IS_DEFINED (sym))
4198 {
4199 symbolS *label;
4200
809ffe0d 4201 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4202 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4203 {
4204 as_bad (_(".tc with no label"));
4205 ignore_rest_of_line ();
4206 return;
4207 }
4208
4209 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4210 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4211 S_SET_VALUE (label, S_GET_VALUE (sym));
4212
4213 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4214 ++input_line_pointer;
4215
4216 return;
4217 }
4218
4219 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4220 symbol_set_frag (sym, frag_now);
252b5132 4221 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4222 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4223 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4224
4225 ppc_frob_label (sym);
4226 }
4227
0baf16f2
AM		 4228#endif /* OBJ_XCOFF */
4229#ifdef OBJ_ELF
9c7977b3 4230 int align;
252b5132
RH		 4231
4232 /* Skip the TOC symbol name. */
4233 while (is_part_of_name (*input_line_pointer)
d13d4015 4234 || *input_line_pointer == ' '
252b5132
RH		 4235 || *input_line_pointer == '['
4236 || *input_line_pointer == ']'
4237 || *input_line_pointer == '{'
4238 || *input_line_pointer == '}')
4239 ++input_line_pointer;
4240
0baf16f2 4241 /* Align to a four/eight byte boundary. */
2b3c4602 4242 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4243 frag_align (align, 0, 0);
4244 record_alignment (now_seg, align);
0baf16f2 4245#endif /* OBJ_ELF */
252b5132
RH		 4246
4247 if (*input_line_pointer != ',')
4248 demand_empty_rest_of_line ();
4249 else
4250 {
4251 ++input_line_pointer;
2b3c4602 4252 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4253 }
4254}
0baf16f2
AM		 4255
4256/* Pseudo-op .machine. */
0baf16f2
AM		 4257
4258static void
98027b10 4259ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4260{
69c040df
AM		 4261 char *cpu_string;
4262#define MAX_HISTORY 100
fa452fa6 4263 static ppc_cpu_t *cpu_history;
69c040df
AM		 4264 static int curr_hist;
4265
4266 SKIP_WHITESPACE ();
4267
4268 if (*input_line_pointer == '"')
4269 {
4270 int len;
4271 cpu_string = demand_copy_C_string (&len);
4272 }
4273 else
4274 {
4275 char c;
4276 cpu_string = input_line_pointer;
4277 c = get_symbol_end ();
4278 cpu_string = xstrdup (cpu_string);
4279 *input_line_pointer = c;
4280 }
4281
4282 if (cpu_string != NULL)
4283 {
fa452fa6 4284 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4285 ppc_cpu_t new_cpu;
69c040df
AM		 4286 char *p;
4287
4288 for (p = cpu_string; *p != 0; p++)
4289 *p = TOLOWER (*p);
4290
4291 if (strcmp (cpu_string, "push") == 0)
4292 {
4293 if (cpu_history == NULL)
4294 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4295
4296 if (curr_hist >= MAX_HISTORY)
4297 as_bad (_(".machine stack overflow"));
4298 else
4299 cpu_history[curr_hist++] = ppc_cpu;
4300 }
4301 else if (strcmp (cpu_string, "pop") == 0)
4302 {
4303 if (curr_hist <= 0)
4304 as_bad (_(".machine stack underflow"));
4305 else
4306 ppc_cpu = cpu_history[--curr_hist];
4307 }
69fe9ce5
AM		 4308 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4309 ppc_cpu = new_cpu;
69c040df
AM		 4310 else
4311 as_bad (_("invalid machine `%s'"), cpu_string);
4312
4313 if (ppc_cpu != old_cpu)
4314 ppc_setup_opcodes ();
4315 }
4316
4317 demand_empty_rest_of_line ();
0baf16f2
AM		 4318}
4319
4320/* See whether a symbol is in the TOC section. */
4321
4322static int
98027b10 4323ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4324{
4325#ifdef OBJ_XCOFF
96d56e9f 4326 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4327#endif
4328#ifdef OBJ_ELF
4329 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4330 if (ppc_obj64)
0baf16f2
AM		 4331 return strcmp (sname, ".toc") == 0;
4332 else
4333 return strcmp (sname, ".got") == 0;
4334#endif
4335}
4336#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4337\f
4338#ifdef TE_PE
4339
99a814a1 4340/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4341
4342/* Set the current section. */
4343static void
98027b10 4344ppc_set_current_section (segT new)
252b5132
RH		 4345{
4346 ppc_previous_section = ppc_current_section;
4347 ppc_current_section = new;
4348}
4349
4350/* pseudo-op: .previous
4351 behaviour: toggles the current section with the previous section.
4352 errors: None
99a814a1
AM		 4353 warnings: "No previous section" */
4354
252b5132 4355static void
98027b10 4356ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4357{
4358 symbolS *tmp;
4359
81d4177b 4360 if (ppc_previous_section == NULL)
252b5132 4361 {
99a814a1 4362 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4363 return;
4364 }
4365
99a814a1 4366 subseg_set (ppc_previous_section, 0);
252b5132 4367
99a814a1 4368 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4369}
4370
4371/* pseudo-op: .pdata
4372 behaviour: predefined read only data section
b34976b6 4373 double word aligned
252b5132
RH		 4374 errors: None
4375 warnings: None
4376 initial: .section .pdata "adr3"
b34976b6 4377 a - don't know -- maybe a misprint
252b5132
RH		 4378 d - initialized data
4379 r - readable
4380 3 - double word aligned (that would be 4 byte boundary)
4381
4382 commentary:
4383 Tag index tables (also known as the function table) for exception
99a814a1 4384 handling, debugging, etc. */
252b5132 4385
252b5132 4386static void
98027b10 4387ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4388{
81d4177b 4389 if (pdata_section == 0)
252b5132
RH		 4390 {
4391 pdata_section = subseg_new (".pdata", 0);
81d4177b 4392
252b5132
RH		 4393 bfd_set_section_flags (stdoutput, pdata_section,
4394 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4395 | SEC_READONLY | SEC_DATA ));
81d4177b 4396
252b5132
RH		 4397 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4398 }
4399 else
4400 {
99a814a1 4401 pdata_section = subseg_new (".pdata", 0);
252b5132 4402 }
99a814a1 4403 ppc_set_current_section (pdata_section);
252b5132
RH		 4404}
4405
4406/* pseudo-op: .ydata
4407 behaviour: predefined read only data section
b34976b6 4408 double word aligned
252b5132
RH		 4409 errors: None
4410 warnings: None
4411 initial: .section .ydata "drw3"
b34976b6 4412 a - don't know -- maybe a misprint
252b5132
RH		 4413 d - initialized data
4414 r - readable
4415 3 - double word aligned (that would be 4 byte boundary)
4416 commentary:
4417 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4418 debugging, etc. */
4419
252b5132 4420static void
98027b10 4421ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4422{
81d4177b 4423 if (ydata_section == 0)
252b5132
RH		 4424 {
4425 ydata_section = subseg_new (".ydata", 0);
4426 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4427 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4428 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4429
4430 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4431 }
4432 else
4433 {
4434 ydata_section = subseg_new (".ydata", 0);
4435 }
99a814a1 4436 ppc_set_current_section (ydata_section);
252b5132
RH		 4437}
4438
4439/* pseudo-op: .reldata
4440 behaviour: predefined read write data section
b34976b6 4441 double word aligned (4-byte)
252b5132
RH		 4442 FIXME: relocation is applied to it
4443 FIXME: what's the difference between this and .data?
4444 errors: None
4445 warnings: None
4446 initial: .section .reldata "drw3"
4447 d - initialized data
4448 r - readable
4449 w - writeable
4450 3 - double word aligned (that would be 8 byte boundary)
4451
4452 commentary:
4453 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4454 function descriptors, etc. */
4455
252b5132 4456static void
98027b10 4457ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4458{
4459 if (reldata_section == 0)
4460 {
4461 reldata_section = subseg_new (".reldata", 0);
4462
4463 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4464 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4465 | SEC_DATA));
252b5132
RH		 4466
4467 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4468 }
4469 else
4470 {
4471 reldata_section = subseg_new (".reldata", 0);
4472 }
99a814a1 4473 ppc_set_current_section (reldata_section);
252b5132
RH		 4474}
4475
4476/* pseudo-op: .rdata
4477 behaviour: predefined read only data section
b34976b6 4478 double word aligned
252b5132
RH		 4479 errors: None
4480 warnings: None
4481 initial: .section .rdata "dr3"
4482 d - initialized data
4483 r - readable
99a814a1
AM		 4484 3 - double word aligned (that would be 4 byte boundary) */
4485
252b5132 4486static void
98027b10 4487ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4488{
4489 if (rdata_section == 0)
4490 {
4491 rdata_section = subseg_new (".rdata", 0);
4492 bfd_set_section_flags (stdoutput, rdata_section,
4493 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4494 | SEC_READONLY | SEC_DATA ));
4495
4496 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4497 }
4498 else
4499 {
4500 rdata_section = subseg_new (".rdata", 0);
4501 }
99a814a1 4502 ppc_set_current_section (rdata_section);
252b5132
RH		 4503}
4504
4505/* pseudo-op: .ualong
81d4177b 4506 behaviour: much like .int, with the exception that no alignment is
b34976b6 4507 performed.
252b5132
RH		 4508 FIXME: test the alignment statement
4509 errors: None
99a814a1
AM		 4510 warnings: None */
4511
252b5132 4512static void
98027b10 4513ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4514{
99a814a1
AM		 4515 /* Try for long. */
4516 cons (4);
252b5132
RH		 4517}
4518
4519/* pseudo-op: .znop <symbol name>
4520 behaviour: Issue a nop instruction
b34976b6 4521 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4522 the supplied symbol name.
4523 errors: None
99a814a1
AM		 4524 warnings: Missing symbol name */
4525
252b5132 4526static void
98027b10 4527ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4528{
4529 unsigned long insn;
4530 const struct powerpc_opcode *opcode;
4531 expressionS ex;
4532 char *f;
252b5132 4533 symbolS *sym;
252b5132
RH		 4534 char *symbol_name;
4535 char c;
4536 char *name;
4537 unsigned int exp;
4538 flagword flags;
4539 asection *sec;
4540
99a814a1 4541 /* Strip out the symbol name. */
252b5132
RH		 4542 symbol_name = input_line_pointer;
4543 c = get_symbol_end ();
4544
4545 name = xmalloc (input_line_pointer - symbol_name + 1);
4546 strcpy (name, symbol_name);
4547
4548 sym = symbol_find_or_make (name);
4549
4550 *input_line_pointer = c;
4551
4552 SKIP_WHITESPACE ();
4553
4554 /* Look up the opcode in the hash table. */
4555 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4556
99a814a1 4557 /* Stick in the nop. */
252b5132
RH		 4558 insn = opcode->opcode;
4559
4560 /* Write out the instruction. */
4561 f = frag_more (4);
4562 md_number_to_chars (f, insn, 4);
4563 fix_new (frag_now,
4564 f - frag_now->fr_literal,
4565 4,
4566 sym,
4567 0,
4568 0,
4569 BFD_RELOC_16_GOT_PCREL);
4570
4571}
4572
81d4177b
KH		 4573/* pseudo-op:
4574 behaviour:
4575 errors:
99a814a1
AM		 4576 warnings: */
4577
252b5132 4578static void
98027b10 4579ppc_pe_comm (int lcomm)
252b5132 4580{
98027b10
AM		 4581 char *name;
4582 char c;
4583 char *p;
252b5132 4584 offsetT temp;
98027b10 4585 symbolS *symbolP;
252b5132
RH		 4586 offsetT align;
4587
4588 name = input_line_pointer;
4589 c = get_symbol_end ();
4590
99a814a1 4591 /* just after name is now '\0'. */
252b5132
RH		 4592 p = input_line_pointer;
4593 *p = c;
4594 SKIP_WHITESPACE ();
4595 if (*input_line_pointer != ',')
4596 {
4597 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4598 ignore_rest_of_line ();
4599 return;
4600 }
4601
4602 input_line_pointer++; /* skip ',' */
4603 if ((temp = get_absolute_expression ()) < 0)
4604 {
4605 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4606 ignore_rest_of_line ();
4607 return;
4608 }
4609
4610 if (! lcomm)
4611 {
4612 /* The third argument to .comm is the alignment. */
4613 if (*input_line_pointer != ',')
4614 align = 3;
4615 else
4616 {
4617 ++input_line_pointer;
4618 align = get_absolute_expression ();
4619 if (align <= 0)
4620 {
4621 as_warn (_("ignoring bad alignment"));
4622 align = 3;
4623 }
4624 }
4625 }
4626
4627 *p = 0;
4628 symbolP = symbol_find_or_make (name);
4629
4630 *p = c;
4631 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4632 {
4633 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4634 S_GET_NAME (symbolP));
4635 ignore_rest_of_line ();
4636 return;
4637 }
4638
4639 if (S_GET_VALUE (symbolP))
4640 {
4641 if (S_GET_VALUE (symbolP) != (valueT) temp)
4642 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4643 S_GET_NAME (symbolP),
4644 (long) S_GET_VALUE (symbolP),
4645 (long) temp);
4646 }
4647 else
4648 {
4649 S_SET_VALUE (symbolP, (valueT) temp);
4650 S_SET_EXTERNAL (symbolP);
86ebace2 4651 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4652 }
4653
4654 demand_empty_rest_of_line ();
4655}
4656
4657/*
4658 * implement the .section pseudo op:
4659 * .section name {, "flags"}
4660 * ^ ^
4661 * | +--- optional flags: 'b' for bss
4662 * | 'i' for info
4663 * +-- section name 'l' for lib
4664 * 'n' for noload
4665 * 'o' for over
4666 * 'w' for data
4667 * 'd' (apparently m88k for data)
4668 * 'x' for text
4669 * But if the argument is not a quoted string, treat it as a
4670 * subsegment number.
4671 *
4672 * FIXME: this is a copy of the section processing from obj-coff.c, with
4673 * additions/changes for the moto-pas assembler support. There are three
4674 * categories:
4675 *
81d4177b 4676 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4677 * setting bits that bfd probably neither understands or uses. The
4678 * correct approach (?) will have to incorporate extra fields attached
4679 * to the section to hold the system specific stuff. (krk)
4680 *
4681 * Section Contents:
4682 * 'a' - unknown - referred to in documentation, but no definition supplied
4683 * 'c' - section has code
4684 * 'd' - section has initialized data
4685 * 'u' - section has uninitialized data
4686 * 'i' - section contains directives (info)
4687 * 'n' - section can be discarded
4688 * 'R' - remove section at link time
4689 *
4690 * Section Protection:
4691 * 'r' - section is readable
4692 * 'w' - section is writeable
4693 * 'x' - section is executable
4694 * 's' - section is sharable
4695 *
4696 * Section Alignment:
4697 * '0' - align to byte boundary
4698 * '1' - align to halfword undary
4699 * '2' - align to word boundary
4700 * '3' - align to doubleword boundary
4701 * '4' - align to quadword boundary
4702 * '5' - align to 32 byte boundary
4703 * '6' - align to 64 byte boundary
4704 *
4705 */
4706
4707void
98027b10 4708ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4709{
99a814a1 4710 /* Strip out the section name. */
252b5132
RH		 4711 char *section_name;
4712 char c;
4713 char *name;
4714 unsigned int exp;
4715 flagword flags;
4716 segT sec;
4717 int align;
4718
4719 section_name = input_line_pointer;
4720 c = get_symbol_end ();
4721
4722 name = xmalloc (input_line_pointer - section_name + 1);
4723 strcpy (name, section_name);
4724
4725 *input_line_pointer = c;
4726
4727 SKIP_WHITESPACE ();
4728
4729 exp = 0;
4730 flags = SEC_NO_FLAGS;
4731
4732 if (strcmp (name, ".idata$2") == 0)
4733 {
4734 align = 0;
4735 }
4736 else if (strcmp (name, ".idata$3") == 0)
4737 {
4738 align = 0;
4739 }
4740 else if (strcmp (name, ".idata$4") == 0)
4741 {
4742 align = 2;
4743 }
4744 else if (strcmp (name, ".idata$5") == 0)
4745 {
4746 align = 2;
4747 }
4748 else if (strcmp (name, ".idata$6") == 0)
4749 {
4750 align = 1;
4751 }
4752 else
99a814a1
AM		 4753 /* Default alignment to 16 byte boundary. */
4754 align = 4;
252b5132
RH		 4755
4756 if (*input_line_pointer == ',')
4757 {
4758 ++input_line_pointer;
4759 SKIP_WHITESPACE ();
4760 if (*input_line_pointer != '"')
4761 exp = get_absolute_expression ();
4762 else
4763 {
4764 ++input_line_pointer;
4765 while (*input_line_pointer != '"'
4766 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4767 {
4768 switch (*input_line_pointer)
4769 {
4770 /* Section Contents */
4771 case 'a': /* unknown */
4772 as_bad (_("Unsupported section attribute -- 'a'"));
4773 break;
4774 case 'c': /* code section */
81d4177b 4775 flags |= SEC_CODE;
252b5132
RH		 4776 break;
4777 case 'd': /* section has initialized data */
4778 flags |= SEC_DATA;
4779 break;
4780 case 'u': /* section has uninitialized data */
4781 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4782 in winnt.h */
4783 flags |= SEC_ROM;
4784 break;
4785 case 'i': /* section contains directives (info) */
4786 /* FIXME: This is IMAGE_SCN_LNK_INFO
4787 in winnt.h */
4788 flags |= SEC_HAS_CONTENTS;
4789 break;
4790 case 'n': /* section can be discarded */
81d4177b 4791 flags &=~ SEC_LOAD;
252b5132
RH		 4792 break;
4793 case 'R': /* Remove section at link time */
4794 flags |= SEC_NEVER_LOAD;
4795 break;
8d452c78 4796#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4797 /* Section Protection */
4798 case 'r': /* section is readable */
4799 flags |= IMAGE_SCN_MEM_READ;
4800 break;
4801 case 'w': /* section is writeable */
4802 flags |= IMAGE_SCN_MEM_WRITE;
4803 break;
4804 case 'x': /* section is executable */
4805 flags |= IMAGE_SCN_MEM_EXECUTE;
4806 break;
4807 case 's': /* section is sharable */
4808 flags |= IMAGE_SCN_MEM_SHARED;
4809 break;
4810
4811 /* Section Alignment */
4812 case '0': /* align to byte boundary */
4813 flags |= IMAGE_SCN_ALIGN_1BYTES;
4814 align = 0;
4815 break;
4816 case '1': /* align to halfword boundary */
4817 flags |= IMAGE_SCN_ALIGN_2BYTES;
4818 align = 1;
4819 break;
4820 case '2': /* align to word boundary */
4821 flags |= IMAGE_SCN_ALIGN_4BYTES;
4822 align = 2;
4823 break;
4824 case '3': /* align to doubleword boundary */
4825 flags |= IMAGE_SCN_ALIGN_8BYTES;
4826 align = 3;
4827 break;
4828 case '4': /* align to quadword boundary */
4829 flags |= IMAGE_SCN_ALIGN_16BYTES;
4830 align = 4;
4831 break;
4832 case '5': /* align to 32 byte boundary */
4833 flags |= IMAGE_SCN_ALIGN_32BYTES;
4834 align = 5;
4835 break;
4836 case '6': /* align to 64 byte boundary */
4837 flags |= IMAGE_SCN_ALIGN_64BYTES;
4838 align = 6;
4839 break;
8d452c78 4840#endif
252b5132 4841 default:
99a814a1
AM		 4842 as_bad (_("unknown section attribute '%c'"),
4843 *input_line_pointer);
252b5132
RH		 4844 break;
4845 }
4846 ++input_line_pointer;
4847 }
4848 if (*input_line_pointer == '"')
4849 ++input_line_pointer;
4850 }
4851 }
4852
4853 sec = subseg_new (name, (subsegT) exp);
4854
99a814a1 4855 ppc_set_current_section (sec);
252b5132
RH		 4856
4857 if (flags != SEC_NO_FLAGS)
4858 {
4859 if (! bfd_set_section_flags (stdoutput, sec, flags))
4860 as_bad (_("error setting flags for \"%s\": %s"),
4861 bfd_section_name (stdoutput, sec),
4862 bfd_errmsg (bfd_get_error ()));
4863 }
4864
99a814a1 4865 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4866}
4867
4868static void
98027b10 4869ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4870{
4871 char *name;
4872 char endc;
4873 symbolS *ext_sym;
4874
4875 name = input_line_pointer;
4876 endc = get_symbol_end ();
4877
4878 ext_sym = symbol_find_or_make (name);
4879
4880 *input_line_pointer = endc;
4881
4882 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4883 SF_SET_FUNCTION (ext_sym);
4884 SF_SET_PROCESS (ext_sym);
4885 coff_add_linesym (ext_sym);
4886
4887 demand_empty_rest_of_line ();
4888}
4889
4890static void
98027b10 4891ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4892{
4893 if (tocdata_section == 0)
4894 {
4895 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4896 /* FIXME: section flags won't work. */
252b5132
RH		 4897 bfd_set_section_flags (stdoutput, tocdata_section,
4898 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4899 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4900
4901 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4902 }
4903 else
4904 {
4905 rdata_section = subseg_new (".tocd", 0);
4906 }
4907
99a814a1 4908 ppc_set_current_section (tocdata_section);
252b5132
RH		 4909
4910 demand_empty_rest_of_line ();
4911}
4912
4913/* Don't adjust TOC relocs to use the section symbol. */
4914
4915int
98027b10 4916ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4917{
4918 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4919}
4920
4921#endif
4922\f
4923#ifdef OBJ_XCOFF
4924
4925/* XCOFF specific symbol and file handling. */
4926
4927/* Canonicalize the symbol name. We use the to force the suffix, if
4928 any, to use square brackets, and to be in upper case. */
4929
4930char *
98027b10 4931ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4932{
4933 char *s;
4934
4935 if (ppc_stab_symbol)
4936 return name;
4937
4938 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4939 ;
4940 if (*s != '\0')
4941 {
4942 char brac;
4943
4944 if (*s == '[')
4945 brac = ']';
4946 else
4947 {
4948 *s = '[';
4949 brac = '}';
4950 }
4951
4952 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4953 *s = TOUPPER (*s);
252b5132
RH		 4954
4955 if (*s == '\0' || s[1] != '\0')
4956 as_bad (_("bad symbol suffix"));
4957
4958 *s = ']';
4959 }
4960
4961 return name;
4962}
4963
4964/* Set the class of a symbol based on the suffix, if any. This is
4965 called whenever a new symbol is created. */
4966
4967void
98027b10 4968ppc_symbol_new_hook (symbolS *sym)
252b5132 4969{
809ffe0d 4970 struct ppc_tc_sy *tc;
252b5132
RH		 4971 const char *s;
4972
809ffe0d
ILT		 4973 tc = symbol_get_tc (sym);
4974 tc->next = NULL;
4975 tc->output = 0;
96d56e9f 4976 tc->symbol_class = -1;
809ffe0d
ILT		 4977 tc->real_name = NULL;
4978 tc->subseg = 0;
4979 tc->align = 0;
4980 tc->size = NULL;
4981 tc->within = NULL;
252b5132
RH		 4982
4983 if (ppc_stab_symbol)
4984 return;
4985
4986 s = strchr (S_GET_NAME (sym), '[');
4987 if (s == (const char *) NULL)
4988 {
4989 /* There is no suffix. */
4990 return;
4991 }
4992
4993 ++s;
4994
4995 switch (s[0])
4996 {
4997 case 'B':
4998 if (strcmp (s, "BS]") == 0)
96d56e9f 4999 tc->symbol_class = XMC_BS;
252b5132
RH		 5000 break;
5001 case 'D':
5002 if (strcmp (s, "DB]") == 0)
96d56e9f 5003 tc->symbol_class = XMC_DB;
252b5132 5004 else if (strcmp (s, "DS]") == 0)
96d56e9f 5005 tc->symbol_class = XMC_DS;
252b5132
RH		 5006 break;
5007 case 'G':
5008 if (strcmp (s, "GL]") == 0)
96d56e9f 5009 tc->symbol_class = XMC_GL;
252b5132
RH		 5010 break;
5011 case 'P':
5012 if (strcmp (s, "PR]") == 0)
96d56e9f 5013 tc->symbol_class = XMC_PR;
252b5132
RH		 5014 break;
5015 case 'R':
5016 if (strcmp (s, "RO]") == 0)
96d56e9f 5017 tc->symbol_class = XMC_RO;
252b5132 5018 else if (strcmp (s, "RW]") == 0)
96d56e9f 5019 tc->symbol_class = XMC_RW;
252b5132
RH		 5020 break;
5021 case 'S':
5022 if (strcmp (s, "SV]") == 0)
96d56e9f 5023 tc->symbol_class = XMC_SV;
252b5132
RH		 5024 break;
5025 case 'T':
5026 if (strcmp (s, "TC]") == 0)
96d56e9f 5027 tc->symbol_class = XMC_TC;
252b5132 5028 else if (strcmp (s, "TI]") == 0)
96d56e9f 5029 tc->symbol_class = XMC_TI;
252b5132 5030 else if (strcmp (s, "TB]") == 0)
96d56e9f 5031 tc->symbol_class = XMC_TB;
252b5132 5032 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5033 tc->symbol_class = XMC_TC0;
252b5132
RH		 5034 break;
5035 case 'U':
5036 if (strcmp (s, "UA]") == 0)
96d56e9f 5037 tc->symbol_class = XMC_UA;
252b5132 5038 else if (strcmp (s, "UC]") == 0)
96d56e9f 5039 tc->symbol_class = XMC_UC;
252b5132
RH		 5040 break;
5041 case 'X':
5042 if (strcmp (s, "XO]") == 0)
96d56e9f 5043 tc->symbol_class = XMC_XO;
252b5132
RH		 5044 break;
5045 }
5046
96d56e9f 5047 if (tc->symbol_class == -1)
252b5132
RH		 5048 as_bad (_("Unrecognized symbol suffix"));
5049}
5050
5051/* Set the class of a label based on where it is defined. This
5052 handles symbols without suffixes. Also, move the symbol so that it
5053 follows the csect symbol. */
5054
5055void
98027b10 5056ppc_frob_label (symbolS *sym)
252b5132
RH		 5057{
5058 if (ppc_current_csect != (symbolS *) NULL)
5059 {
96d56e9f
NC		 5060 if (symbol_get_tc (sym)->symbol_class == -1)
5061 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5062
5063 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5064 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5065 &symbol_rootP, &symbol_lastP);
5066 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5067 }
07a53e5c
RH		 5068
5069#ifdef OBJ_ELF
5070 dwarf2_emit_label (sym);
5071#endif
252b5132
RH		 5072}
5073
5074/* This variable is set by ppc_frob_symbol if any absolute symbols are
5075 seen. It tells ppc_adjust_symtab whether it needs to look through
5076 the symbols. */
5077
b34976b6 5078static bfd_boolean ppc_saw_abs;
252b5132
RH		 5079
5080/* Change the name of a symbol just before writing it out. Set the
5081 real name if the .rename pseudo-op was used. Otherwise, remove any
5082 class suffix. Return 1 if the symbol should not be included in the
5083 symbol table. */
5084
5085int
98027b10 5086ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5087{
5088 static symbolS *ppc_last_function;
5089 static symbolS *set_end;
5090
5091 /* Discard symbols that should not be included in the output symbol
5092 table. */
809ffe0d
ILT		 5093 if (! symbol_used_in_reloc_p (sym)
5094 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5095 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5096 && ! symbol_get_tc (sym)->output
252b5132
RH		 5097 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5098 return 1;
5099
a161fe53
AM		 5100 /* This one will disappear anyway. Don't make a csect sym for it. */
5101 if (sym == abs_section_sym)
5102 return 1;
5103
809ffe0d
ILT		 5104 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5105 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5106 else
5107 {
5108 const char *name;
5109 const char *s;
5110
5111 name = S_GET_NAME (sym);
5112 s = strchr (name, '[');
5113 if (s != (char *) NULL)
5114 {
5115 unsigned int len;
5116 char *snew;
5117
5118 len = s - name;
5119 snew = xmalloc (len + 1);
5120 memcpy (snew, name, len);
5121 snew[len] = '\0';
5122
5123 S_SET_NAME (sym, snew);
5124 }
5125 }
5126
5127 if (set_end != (symbolS *) NULL)
5128 {
5129 SA_SET_SYM_ENDNDX (set_end, sym);
5130 set_end = NULL;
5131 }
5132
5133 if (SF_GET_FUNCTION (sym))
5134 {
5135 if (ppc_last_function != (symbolS *) NULL)
5136 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5137 ppc_last_function = sym;
809ffe0d 5138 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5139 {
6386f3a7 5140 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5141 SA_SET_SYM_FSIZE (sym,
5142 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5143 }
5144 }
5145 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5146 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5147 {
5148 if (ppc_last_function == (symbolS *) NULL)
5149 as_bad (_(".ef with no preceding .function"));
5150 else
5151 {
5152 set_end = ppc_last_function;
5153 ppc_last_function = NULL;
5154
5155 /* We don't have a C_EFCN symbol, but we need to force the
5156 COFF backend to believe that it has seen one. */
5157 coff_last_function = NULL;
5158 }
5159 }
5160
670ec21d 5161 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5162 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5163 && S_GET_STORAGE_CLASS (sym) != C_FILE
5164 && S_GET_STORAGE_CLASS (sym) != C_FCN
5165 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5166 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5167 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5168 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5169 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5170 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5171 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5172
5173 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5174 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5175 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5176 {
5177 int i;
5178 union internal_auxent *a;
5179
5180 /* Create a csect aux. */
5181 i = S_GET_NUMBER_AUXILIARY (sym);
5182 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5183 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5184 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5185 {
5186 /* This is the TOC table. */
5187 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5188 a->x_csect.x_scnlen.l = 0;
5189 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5190 }
809ffe0d 5191 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5192 {
5193 /* This is a csect symbol. x_scnlen is the size of the
5194 csect. */
809ffe0d 5195 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5196 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5197 S_GET_SEGMENT (sym))
5198 - S_GET_VALUE (sym));
5199 else
5200 {
6386f3a7 5201 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5202 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5203 - S_GET_VALUE (sym));
5204 }
809ffe0d 5205 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5206 }
5207 else if (S_GET_SEGMENT (sym) == bss_section)
5208 {
5209 /* This is a common symbol. */
809ffe0d
ILT		 5210 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5211 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5212 if (S_IS_EXTERNAL (sym))
96d56e9f 5213 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5214 else
96d56e9f 5215 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5216 }
5217 else if (S_GET_SEGMENT (sym) == absolute_section)
5218 {
5219 /* This is an absolute symbol. The csect will be created by
99a814a1 5220 ppc_adjust_symtab. */
b34976b6 5221 ppc_saw_abs = TRUE;
252b5132 5222 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5223 if (symbol_get_tc (sym)->symbol_class == -1)
5224 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5225 }
5226 else if (! S_IS_DEFINED (sym))
5227 {
5228 /* This is an external symbol. */
5229 a->x_csect.x_scnlen.l = 0;
5230 a->x_csect.x_smtyp = XTY_ER;
5231 }
96d56e9f 5232 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5233 {
5234 symbolS *next;
5235
5236 /* This is a TOC definition. x_scnlen is the size of the
5237 TOC entry. */
5238 next = symbol_next (sym);
96d56e9f 5239 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5240 next = symbol_next (next);
5241 if (next == (symbolS *) NULL
96d56e9f 5242 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5243 {
5244 if (ppc_after_toc_frag == (fragS *) NULL)
5245 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5246 data_section)
5247 - S_GET_VALUE (sym));
5248 else
5249 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5250 - S_GET_VALUE (sym));
5251 }
5252 else
5253 {
6386f3a7 5254 resolve_symbol_value (next);
252b5132
RH		 5255 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5256 - S_GET_VALUE (sym));
5257 }
5258 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5259 }
5260 else
5261 {
5262 symbolS *csect;
5263
5264 /* This is a normal symbol definition. x_scnlen is the
5265 symbol index of the containing csect. */
5266 if (S_GET_SEGMENT (sym) == text_section)
5267 csect = ppc_text_csects;
5268 else if (S_GET_SEGMENT (sym) == data_section)
5269 csect = ppc_data_csects;
5270 else
5271 abort ();
5272
5273 /* Skip the initial dummy symbol. */
809ffe0d 5274 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5275
5276 if (csect == (symbolS *) NULL)
5277 {
5278 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5279 a->x_csect.x_scnlen.l = 0;
5280 }
5281 else
5282 {
809ffe0d 5283 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5284 {
6386f3a7 5285 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5286 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5287 > S_GET_VALUE (sym))
252b5132 5288 break;
809ffe0d 5289 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5290 }
5291
809ffe0d
ILT		 5292 a->x_csect.x_scnlen.p =
5293 coffsymbol (symbol_get_bfdsym (csect))->native;
5294 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5295 1;
252b5132
RH		 5296 }
5297 a->x_csect.x_smtyp = XTY_LD;
5298 }
81d4177b 5299
252b5132
RH		 5300 a->x_csect.x_parmhash = 0;
5301 a->x_csect.x_snhash = 0;
96d56e9f 5302 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5303 a->x_csect.x_smclas = XMC_PR;
5304 else
96d56e9f 5305 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5306 a->x_csect.x_stab = 0;
5307 a->x_csect.x_snstab = 0;
5308
5309 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5310 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5311 }
5312 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5313 {
5314 /* We want the value to be the symbol index of the referenced
5315 csect symbol. BFD will do that for us if we set the right
5316 flags. */
b782de16
AM		 5317 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5318 combined_entry_type *c = coffsymbol (bsym)->native;
5319
5320 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5321 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5322 }
5323 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5324 {
5325 symbolS *block;
5326 symbolS *csect;
5327
5328 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5329 block = symbol_get_tc (sym)->within;
5330 csect = symbol_get_tc (block)->within;
6386f3a7 5331 resolve_symbol_value (csect);
252b5132
RH		 5332 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5333 }
5334 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5335 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5336 {
5337 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5338 BFD will do that for us if we set the right flags. We have
5339 already set the value correctly. */
809ffe0d 5340 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5341 }
5342
5343 return 0;
5344}
5345
5346/* Adjust the symbol table. This creates csect symbols for all
5347 absolute symbols. */
5348
5349void
98027b10 5350ppc_adjust_symtab (void)
252b5132
RH		 5351{
5352 symbolS *sym;
5353
5354 if (! ppc_saw_abs)
5355 return;
5356
5357 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5358 {
5359 symbolS *csect;
5360 int i;
5361 union internal_auxent *a;
5362
5363 if (S_GET_SEGMENT (sym) != absolute_section)
5364 continue;
5365
5366 csect = symbol_create (".abs[XO]", absolute_section,
5367 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5368 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5369 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5370 i = S_GET_NUMBER_AUXILIARY (csect);
5371 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5372 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5373 a->x_csect.x_scnlen.l = 0;
5374 a->x_csect.x_smtyp = XTY_SD;
5375 a->x_csect.x_parmhash = 0;
5376 a->x_csect.x_snhash = 0;
5377 a->x_csect.x_smclas = XMC_XO;
5378 a->x_csect.x_stab = 0;
5379 a->x_csect.x_snstab = 0;
5380
5381 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5382
5383 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5384 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5385 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5386 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5387 }
5388
b34976b6 5389 ppc_saw_abs = FALSE;
252b5132
RH		 5390}
5391
5392/* Set the VMA for a section. This is called on all the sections in
5393 turn. */
5394
5395void
98027b10 5396ppc_frob_section (asection *sec)
252b5132 5397{
931e13a6 5398 static bfd_vma vma = 0;
252b5132 5399
931e13a6 5400 vma = md_section_align (sec, vma);
252b5132
RH		 5401 bfd_set_section_vma (stdoutput, sec, vma);
5402 vma += bfd_section_size (stdoutput, sec);
5403}
5404
5405#endif /* OBJ_XCOFF */
5406\f
252b5132 5407char *
98027b10 5408md_atof (int type, char *litp, int *sizep)
252b5132 5409{
499ac353 5410 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5411}
5412
5413/* Write a value out to the object file, using the appropriate
5414 endianness. */
5415
5416void
98027b10 5417md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5418{
5419 if (target_big_endian)
5420 number_to_chars_bigendian (buf, val, n);
5421 else
5422 number_to_chars_littleendian (buf, val, n);
5423}
5424
5425/* Align a section (I don't know why this is machine dependent). */
5426
5427valueT
3aeeedbb 5428md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5429{
3aeeedbb
AM		 5430#ifdef OBJ_ELF
5431 return addr;
5432#else
252b5132
RH		 5433 int align = bfd_get_section_alignment (stdoutput, seg);
5434
5435 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5436#endif
252b5132
RH		 5437}
5438
5439/* We don't have any form of relaxing. */
5440
5441int
98027b10
AM		 5442md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5443 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5444{
5445 abort ();
5446 return 0;
5447}
5448
5449/* Convert a machine dependent frag. We never generate these. */
5450
5451void
98027b10
AM		 5452md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5453 asection *sec ATTRIBUTE_UNUSED,
5454 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5455{
5456 abort ();
5457}
5458
5459/* We have no need to default values of symbols. */
5460
252b5132 5461symbolS *
98027b10 5462md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5463{
5464 return 0;
5465}
5466\f
5467/* Functions concerning relocs. */
5468
5469/* The location from which a PC relative jump should be calculated,
5470 given a PC relative reloc. */
5471
5472long
98027b10 5473md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5474{
5475 return fixp->fx_frag->fr_address + fixp->fx_where;
5476}
5477
5478#ifdef OBJ_XCOFF
5479
5480/* This is called to see whether a fixup should be adjusted to use a
5481 section symbol. We take the opportunity to change a fixup against
5482 a symbol in the TOC subsegment into a reloc against the
5483 corresponding .tc symbol. */
5484
5485int
98027b10 5486ppc_fix_adjustable (fixS *fix)
252b5132 5487{
b782de16
AM		 5488 valueT val = resolve_symbol_value (fix->fx_addsy);
5489 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5490 TC_SYMFIELD_TYPE *tc;
5491
5492 if (symseg == absolute_section)
5493 return 0;
252b5132 5494
252b5132 5495 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5496 && fix->fx_addsy != ppc_toc_csect
b782de16 5497 && symseg == data_section
252b5132
RH		 5498 && val >= ppc_toc_frag->fr_address
5499 && (ppc_after_toc_frag == (fragS *) NULL
5500 || val < ppc_after_toc_frag->fr_address))
5501 {
5502 symbolS *sy;
5503
5504 for (sy = symbol_next (ppc_toc_csect);
5505 sy != (symbolS *) NULL;
5506 sy = symbol_next (sy))
5507 {
b782de16
AM		 5508 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5509
96d56e9f 5510 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5511 continue;
96d56e9f 5512 if (sy_tc->symbol_class != XMC_TC)
252b5132 5513 break;
b782de16 5514 if (val == resolve_symbol_value (sy))
252b5132
RH		 5515 {
5516 fix->fx_addsy = sy;
5517 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5518 return 0;
5519 }
5520 }
5521
5522 as_bad_where (fix->fx_file, fix->fx_line,
5523 _("symbol in .toc does not match any .tc"));
5524 }
5525
5526 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5527 tc = symbol_get_tc (fix->fx_addsy);
5528 if (tc->subseg == 0
96d56e9f
NC		 5529 && tc->symbol_class != XMC_TC0
5530 && tc->symbol_class != XMC_TC
b782de16 5531 && symseg != bss_section
252b5132 5532 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5533 && (symseg != data_section
252b5132
RH		 5534 || ppc_toc_csect == NULL
5535 || val < ppc_toc_frag->fr_address
5536 || (ppc_after_toc_frag != NULL
5537 && val >= ppc_after_toc_frag->fr_address)))
5538 {
5539 symbolS *csect;
b782de16 5540 symbolS *next_csect;
252b5132 5541
b782de16 5542 if (symseg == text_section)
252b5132 5543 csect = ppc_text_csects;
b782de16 5544 else if (symseg == data_section)
252b5132
RH		 5545 csect = ppc_data_csects;
5546 else
5547 abort ();
5548
5549 /* Skip the initial dummy symbol. */
809ffe0d 5550 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5551
5552 if (csect != (symbolS *) NULL)
5553 {
b782de16
AM		 5554 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5555 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5556 {
5557 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5558 have to look through the full symbol table to see
5559 whether this is the csect we want. Note that we will
5560 only get here if the csect has zero length. */
b782de16
AM		 5561 if (symbol_get_frag (csect)->fr_address == val
5562 && S_GET_VALUE (csect) == val)
252b5132
RH		 5563 {
5564 symbolS *scan;
5565
809ffe0d 5566 for (scan = symbol_next (csect);
252b5132 5567 scan != NULL;
809ffe0d 5568 scan = symbol_next (scan))
252b5132 5569 {
809ffe0d 5570 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5571 break;
5572 if (scan == fix->fx_addsy)
5573 break;
5574 }
5575
5576 /* If we found the symbol before the next csect
99a814a1 5577 symbol, then this is the csect we want. */
252b5132
RH		 5578 if (scan == fix->fx_addsy)
5579 break;
5580 }
5581
b782de16 5582 csect = next_csect;
252b5132
RH		 5583 }
5584
b782de16 5585 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5586 fix->fx_addsy = csect;
5587 }
b782de16 5588 return 0;
252b5132
RH		 5589 }
5590
5591 /* Adjust a reloc against a .lcomm symbol to be against the base
5592 .lcomm. */
b782de16 5593 if (symseg == bss_section
252b5132
RH		 5594 && ! S_IS_EXTERNAL (fix->fx_addsy))
5595 {
b782de16
AM		 5596 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5597
5598 fix->fx_offset += val - resolve_symbol_value (sy);
5599 fix->fx_addsy = sy;
252b5132
RH		 5600 }
5601
5602 return 0;
5603}
5604
5605/* A reloc from one csect to another must be kept. The assembler
5606 will, of course, keep relocs between sections, and it will keep
5607 absolute relocs, but we need to force it to keep PC relative relocs
5608 between two csects in the same section. */
5609
5610int
98027b10 5611ppc_force_relocation (fixS *fix)
252b5132
RH		 5612{
5613 /* At this point fix->fx_addsy should already have been converted to
5614 a csect symbol. If the csect does not include the fragment, then
5615 we need to force the relocation. */
5616 if (fix->fx_pcrel
5617 && fix->fx_addsy != NULL
809ffe0d
ILT		 5618 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5619 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5620 > fix->fx_frag->fr_address)
5621 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5622 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5623 <= fix->fx_frag->fr_address))))
5624 return 1;
5625
ae6063d4 5626 return generic_force_reloc (fix);
252b5132
RH		 5627}
5628
5629#endif /* OBJ_XCOFF */
5630
0baf16f2 5631#ifdef OBJ_ELF
a161fe53
AM		 5632/* If this function returns non-zero, it guarantees that a relocation
5633 will be emitted for a fixup. */
5634
5635int
98027b10 5636ppc_force_relocation (fixS *fix)
a161fe53
AM		 5637{
5638 /* Branch prediction relocations must force a relocation, as must
5639 the vtable description relocs. */
5640 switch (fix->fx_r_type)
5641 {
5642 case BFD_RELOC_PPC_B16_BRTAKEN:
5643 case BFD_RELOC_PPC_B16_BRNTAKEN:
5644 case BFD_RELOC_PPC_BA16_BRTAKEN:
5645 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5646 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5647 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5648 return 1;
5649 default:
5650 break;
5651 }
5652
cdba85ec
AM		 5653 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5654 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5655 return 1;
5656
ae6063d4 5657 return generic_force_reloc (fix);
a161fe53
AM		 5658}
5659
0baf16f2 5660int
98027b10 5661ppc_fix_adjustable (fixS *fix)
252b5132 5662{
0baf16f2
AM		 5663 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5664 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5665 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5666 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5667 && fix->fx_r_type != BFD_RELOC_GPREL16
5668 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5669 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5670 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5671 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5672}
0baf16f2 5673#endif
252b5132 5674
3aeeedbb
AM		 5675/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5676 rs_align_code frag. */
5677
5678void
5679ppc_handle_align (struct frag *fragP)
5680{
5681 valueT count = (fragP->fr_next->fr_address
5682 - (fragP->fr_address + fragP->fr_fix));
5683
5684 if (count != 0 && (count & 3) == 0)
5685 {
5686 char *dest = fragP->fr_literal + fragP->fr_fix;
5687
5688 fragP->fr_var = 4;
5689 md_number_to_chars (dest, 0x60000000, 4);
5690
42240548
PB		 5691 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5692 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5693 {
42240548
PB		 5694 /* For power6 and power7, we want the last nop to be a group
5695 terminating one. Do this by inserting an rs_fill frag immediately
5696 after this one, with its address set to the last nop location.
5697 This will automatically reduce the number of nops in the current
5698 frag by one. */
3aeeedbb
AM		 5699 if (count > 4)
5700 {
5701 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5702
5703 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5704 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5705 group_nop->fr_fix = 0;
5706 group_nop->fr_offset = 1;
5707 group_nop->fr_type = rs_fill;
5708 fragP->fr_next = group_nop;
5709 dest = group_nop->fr_literal;
5710 }
5711
42240548
PB		 5712 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5713 /* power7 group terminating nop: "ori 2,2,0". */
5714 md_number_to_chars (dest, 0x60420000, 4);
5715 else
5716 /* power6 group terminating nop: "ori 1,1,0". */
5717 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5718 }
5719 }
5720}
5721
252b5132
RH		 5722/* Apply a fixup to the object code. This is called for all the
5723 fixups we generated by the call to fix_new_exp, above. In the call
5724 above we used a reloc code which was the largest legal reloc code
5725 plus the operand index. Here we undo that to recover the operand
5726 index. At this point all symbol values should be fully resolved,
5727 and we attempt to completely resolve the reloc. If we can not do
5728 that, we determine the correct reloc code and put it back in the
5729 fixup. */
5730
94f592af 5731void
98027b10 5732md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5733{
94f592af 5734 valueT value = * valP;
252b5132
RH		 5735
5736#ifdef OBJ_ELF
94f592af 5737 if (fixP->fx_addsy != NULL)
252b5132 5738 {
a161fe53 5739 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5740 if (fixP->fx_pcrel)
5741 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5742 }
5743 else
94f592af 5744 fixP->fx_done = 1;
252b5132 5745#else
a161fe53 5746 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5747 the symbol values. If we are doing this relocation the code in
5748 write.c is going to call bfd_install_relocation, which is also
5749 going to use the symbol value. That means that if the reloc is
5750 fully resolved we want to use *valP since bfd_install_relocation is
5751 not being used.
9f0eb232
RS		 5752 However, if the reloc is not fully resolved we do not want to
5753 use *valP, and must use fx_offset instead. If the relocation
5754 is PC-relative, we then need to re-apply md_pcrel_from_section
5755 to this new relocation value. */
94f592af
NC		 5756 if (fixP->fx_addsy == (symbolS *) NULL)
5757 fixP->fx_done = 1;
5758
252b5132 5759 else
9f0eb232
RS		 5760 {
5761 value = fixP->fx_offset;
5762 if (fixP->fx_pcrel)
5763 value -= md_pcrel_from_section (fixP, seg);
5764 }
a161fe53
AM		 5765#endif
5766
5767 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5768 {
a161fe53
AM		 5769 /* We can't actually support subtracting a symbol. */
5770 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5771 }
252b5132 5772
94f592af 5773 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5774 {
5775 int opindex;
5776 const struct powerpc_operand *operand;
5777 char *where;
5778 unsigned long insn;
5779
94f592af 5780 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5781
5782 operand = &powerpc_operands[opindex];
5783
5784#ifdef OBJ_XCOFF
0baf16f2
AM		 5785 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5786 does not generate a reloc. It uses the offset of `sym' within its
5787 csect. Other usages, such as `.long sym', generate relocs. This
5788 is the documented behaviour of non-TOC symbols. */
252b5132 5789 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5790 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5791 && operand->shift == 0
2b3c4602 5792 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5793 && fixP->fx_addsy != NULL
5794 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5795 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5796 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5797 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5798 {
94f592af
NC		 5799 value = fixP->fx_offset;
5800 fixP->fx_done = 1;
252b5132
RH		 5801 }
5802#endif
5803
5804 /* Fetch the instruction, insert the fully resolved operand
5805 value, and stuff the instruction back again. */
94f592af 5806 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5807 if (target_big_endian)
5808 insn = bfd_getb32 ((unsigned char *) where);
5809 else
5810 insn = bfd_getl32 ((unsigned char *) where);
5811 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5812 fixP->tc_fix_data.ppc_cpu,
94f592af 5813 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5814 if (target_big_endian)
5815 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5816 else
5817 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5818
94f592af
NC		 5819 if (fixP->fx_done)
5820 /* Nothing else to do here. */
5821 return;
252b5132 5822
9c2799c2 5823 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5824
252b5132
RH		 5825 /* Determine a BFD reloc value based on the operand information.
5826 We are only prepared to turn a few of the operands into
0baf16f2 5827 relocs. */
11b37b7b 5828 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5829 && operand->bitm == 0x3fffffc
11b37b7b 5830 && operand->shift == 0)
94f592af 5831 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5832 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5833 && operand->bitm == 0xfffc
11b37b7b 5834 && operand->shift == 0)
95210096
AM		 5835 {
5836 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5837#ifdef OBJ_XCOFF
5838 fixP->fx_size = 2;
5839 if (target_big_endian)
5840 fixP->fx_where += 2;
5841#endif
5842 }
11b37b7b 5843 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5844 && operand->bitm == 0x3fffffc
11b37b7b 5845 && operand->shift == 0)
94f592af 5846 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5847 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5848 && operand->bitm == 0xfffc
11b37b7b 5849 && operand->shift == 0)
95210096
AM		 5850 {
5851 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5852#ifdef OBJ_XCOFF
5853 fixP->fx_size = 2;
5854 if (target_big_endian)
5855 fixP->fx_where += 2;
5856#endif
5857 }
0baf16f2 5858#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5859 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5860 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5861 && operand->shift == 0)
11b37b7b 5862 {
a7fc733f
AM		 5863 if (ppc_is_toc_sym (fixP->fx_addsy))
5864 {
5865 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5866#ifdef OBJ_ELF
a7fc733f
AM		 5867 if (ppc_obj64
5868 && (operand->flags & PPC_OPERAND_DS) != 0)
5869 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5870#endif
5871 }
5872 else
5873 {
5874 fixP->fx_r_type = BFD_RELOC_16;
5875#ifdef OBJ_ELF
5876 if (ppc_obj64
5877 && (operand->flags & PPC_OPERAND_DS) != 0)
5878 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5879#endif
a7fc733f 5880 }
94f592af 5881 fixP->fx_size = 2;
11b37b7b 5882 if (target_big_endian)
94f592af 5883 fixP->fx_where += 2;
11b37b7b 5884 }
0baf16f2 5885#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5886 else
252b5132
RH		 5887 {
5888 char *sfile;
5889 unsigned int sline;
5890
5891 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5892 symbol. */
94f592af
NC		 5893 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5894 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5895 _("unresolved expression that must be resolved"));
5896 else
94f592af 5897 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5898 _("unsupported relocation against %s"),
94f592af
NC		 5899 S_GET_NAME (fixP->fx_addsy));
5900 fixP->fx_done = 1;
5901 return;
252b5132
RH		 5902 }
5903 }
5904 else
5905 {
5906#ifdef OBJ_ELF
94f592af 5907 ppc_elf_validate_fix (fixP, seg);
252b5132 5908#endif
94f592af 5909 switch (fixP->fx_r_type)
252b5132 5910 {
252b5132 5911 case BFD_RELOC_CTOR:
2b3c4602 5912 if (ppc_obj64)
9c7977b3
AM		 5913 goto ctor64;
5914 /* fall through */
5915
0baf16f2 5916 case BFD_RELOC_32:
94f592af
NC		 5917 if (fixP->fx_pcrel)
5918 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5919 /* fall through */
252b5132
RH		 5920
5921 case BFD_RELOC_RVA:
5922 case BFD_RELOC_32_PCREL:
252b5132 5923 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5924 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5925 value, 4);
5926 break;
5927
7f6d05e8 5928 case BFD_RELOC_64:
9c7977b3 5929 ctor64:
94f592af
NC		 5930 if (fixP->fx_pcrel)
5931 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5932 /* fall through */
0baf16f2 5933
7f6d05e8 5934 case BFD_RELOC_64_PCREL:
94f592af 5935 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5936 value, 8);
81d4177b 5937 break;
0baf16f2 5938
252b5132
RH		 5939 case BFD_RELOC_GPREL16:
5940 case BFD_RELOC_16_GOT_PCREL:
5941 case BFD_RELOC_16_GOTOFF:
5942 case BFD_RELOC_LO16_GOTOFF:
5943 case BFD_RELOC_HI16_GOTOFF:
5944 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5945 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5946 case BFD_RELOC_LO16_BASEREL:
5947 case BFD_RELOC_HI16_BASEREL:
5948 case BFD_RELOC_HI16_S_BASEREL:
5949 case BFD_RELOC_PPC_EMB_NADDR16:
5950 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5951 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5952 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5953 case BFD_RELOC_PPC_EMB_SDAI16:
5954 case BFD_RELOC_PPC_EMB_SDA2REL:
5955 case BFD_RELOC_PPC_EMB_SDA2I16:
5956 case BFD_RELOC_PPC_EMB_RELSEC16:
5957 case BFD_RELOC_PPC_EMB_RELST_LO:
5958 case BFD_RELOC_PPC_EMB_RELST_HI:
5959 case BFD_RELOC_PPC_EMB_RELST_HA:
5960 case BFD_RELOC_PPC_EMB_RELSDA:
5961 case BFD_RELOC_PPC_TOC16:
0baf16f2 5962#ifdef OBJ_ELF
0baf16f2
AM		 5963 case BFD_RELOC_PPC64_TOC16_LO:
5964 case BFD_RELOC_PPC64_TOC16_HI:
5965 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5966#endif
94f592af 5967 if (fixP->fx_pcrel)
252b5132 5968 {
94f592af
NC		 5969 if (fixP->fx_addsy != NULL)
5970 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5971 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5972 bfd_get_reloc_code_name (fixP->fx_r_type),
5973 S_GET_NAME (fixP->fx_addsy));
252b5132 5974 else
94f592af 5975 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5976 _("cannot emit PC relative %s relocation"),
94f592af 5977 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5978 }
5979
94f592af 5980 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5981 value, 2);
5982 break;
5983
3c9d25f4
AM		 5984 case BFD_RELOC_16:
5985 if (fixP->fx_pcrel)
5986 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5987 /* fall through */
5988
5989 case BFD_RELOC_16_PCREL:
5990 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5991 value, 2);
5992 break;
5993
5994 case BFD_RELOC_LO16:
5995 if (fixP->fx_pcrel)
5996 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5997 /* fall through */
5998
5999 case BFD_RELOC_LO16_PCREL:
6000 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6001 value, 2);
6002 break;
6003
252b5132
RH		 6004 /* This case happens when you write, for example,
6005 lis %r3,(L1-L2)@ha
6006 where L1 and L2 are defined later. */
6007 case BFD_RELOC_HI16:
94f592af 6008 if (fixP->fx_pcrel)
3c9d25f4
AM		 6009 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6010 /* fall through */
6011
6012 case BFD_RELOC_HI16_PCREL:
94f592af 6013 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6014 PPC_HI (value), 2);
252b5132 6015 break;
0baf16f2 6016
252b5132 6017 case BFD_RELOC_HI16_S:
94f592af 6018 if (fixP->fx_pcrel)
3c9d25f4
AM		 6019 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6020 /* fall through */
6021
6022 case BFD_RELOC_HI16_S_PCREL:
94f592af 6023 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6024 PPC_HA (value), 2);
6025 break;
6026
6027#ifdef OBJ_ELF
0baf16f2 6028 case BFD_RELOC_PPC64_HIGHER:
94f592af 6029 if (fixP->fx_pcrel)
0baf16f2 6030 abort ();
94f592af 6031 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6032 PPC_HIGHER (value), 2);
252b5132
RH		 6033 break;
6034
0baf16f2 6035 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6036 if (fixP->fx_pcrel)
0baf16f2 6037 abort ();
94f592af 6038 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6039 PPC_HIGHERA (value), 2);
6040 break;
6041
6042 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6043 if (fixP->fx_pcrel)
0baf16f2 6044 abort ();
94f592af 6045 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6046 PPC_HIGHEST (value), 2);
6047 break;
6048
6049 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6050 if (fixP->fx_pcrel)
0baf16f2 6051 abort ();
94f592af 6052 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6053 PPC_HIGHESTA (value), 2);
6054 break;
6055
6056 case BFD_RELOC_PPC64_ADDR16_DS:
6057 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6058 case BFD_RELOC_PPC64_GOT16_DS:
6059 case BFD_RELOC_PPC64_GOT16_LO_DS:
6060 case BFD_RELOC_PPC64_PLT16_LO_DS:
6061 case BFD_RELOC_PPC64_SECTOFF_DS:
6062 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6063 case BFD_RELOC_PPC64_TOC16_DS:
6064 case BFD_RELOC_PPC64_TOC16_LO_DS:
6065 case BFD_RELOC_PPC64_PLTGOT16_DS:
6066 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6067 if (fixP->fx_pcrel)
0baf16f2
AM		 6068 abort ();
6069 {
2132e3a3 6070 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6071 unsigned long val, mask;
0baf16f2
AM		 6072
6073 if (target_big_endian)
adadcc0c 6074 val = bfd_getb32 (where - 2);
0baf16f2 6075 else
adadcc0c
AM		 6076 val = bfd_getl32 (where);
6077 mask = 0xfffc;
6078 /* lq insns reserve the four lsbs. */
6079 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6080 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6081 mask = 0xfff0;
6082 val |= value & mask;
0baf16f2
AM		 6083 if (target_big_endian)
6084 bfd_putb16 ((bfd_vma) val, where);
6085 else
6086 bfd_putl16 ((bfd_vma) val, where);
6087 }
6088 break;
cdba85ec 6089
ba0b2174
AM		 6090 case BFD_RELOC_PPC_B16_BRTAKEN:
6091 case BFD_RELOC_PPC_B16_BRNTAKEN:
6092 case BFD_RELOC_PPC_BA16_BRTAKEN:
6093 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6094 break;
6095
cdba85ec 6096 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6097 case BFD_RELOC_PPC_TLSGD:
6098 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6099 break;
6100
cdba85ec
AM		 6101 case BFD_RELOC_PPC_DTPMOD:
6102 case BFD_RELOC_PPC_TPREL16:
6103 case BFD_RELOC_PPC_TPREL16_LO:
6104 case BFD_RELOC_PPC_TPREL16_HI:
6105 case BFD_RELOC_PPC_TPREL16_HA:
6106 case BFD_RELOC_PPC_TPREL:
6107 case BFD_RELOC_PPC_DTPREL16:
6108 case BFD_RELOC_PPC_DTPREL16_LO:
6109 case BFD_RELOC_PPC_DTPREL16_HI:
6110 case BFD_RELOC_PPC_DTPREL16_HA:
6111 case BFD_RELOC_PPC_DTPREL:
6112 case BFD_RELOC_PPC_GOT_TLSGD16:
6113 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6114 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6115 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6116 case BFD_RELOC_PPC_GOT_TLSLD16:
6117 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6118 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6119 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6120 case BFD_RELOC_PPC_GOT_TPREL16:
6121 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6122 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6123 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6124 case BFD_RELOC_PPC_GOT_DTPREL16:
6125 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6126 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6127 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6128 case BFD_RELOC_PPC64_TPREL16_DS:
6129 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6130 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6131 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6132 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6133 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6134 case BFD_RELOC_PPC64_DTPREL16_DS:
6135 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6136 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6137 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6138 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6139 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6140 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6141 break;
0baf16f2 6142#endif
252b5132 6143 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6144 bytes, rather than 2, so offset it here appropriately. */
252b5132 6145 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6146 if (fixP->fx_pcrel)
252b5132
RH		 6147 abort ();
6148
94f592af 6149 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6150 + ((target_big_endian) ? 2 : 0),
6151 value, 2);
6152 break;
6153
6154 case BFD_RELOC_8:
94f592af 6155 if (fixP->fx_pcrel)
31a91399
NC		 6156 {
6157 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6158 ".byte <undefined_symbol> - ." */
31a91399
NC		 6159 if (fixP->fx_addsy)
6160 as_bad (_("Unable to handle reference to symbol %s"),
6161 S_GET_NAME (fixP->fx_addsy));
6162 else
6163 as_bad (_("Unable to resolve expression"));
6164 fixP->fx_done = 1;
6165 }
6166 else
6167 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6168 value, 1);
252b5132
RH		 6169 break;
6170
6171 case BFD_RELOC_24_PLT_PCREL:
6172 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6173 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6174 abort ();
6175
94f592af 6176 if (fixP->fx_done)
99a814a1
AM		 6177 {
6178 char *where;
6179 unsigned long insn;
6180
6181 /* Fetch the instruction, insert the fully resolved operand
6182 value, and stuff the instruction back again. */
94f592af 6183 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6184 if (target_big_endian)
6185 insn = bfd_getb32 ((unsigned char *) where);
6186 else
6187 insn = bfd_getl32 ((unsigned char *) where);
6188 if ((value & 3) != 0)
94f592af 6189 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6190 _("must branch to an address a multiple of 4"));
6191 if ((offsetT) value < -0x40000000
6192 || (offsetT) value >= 0x40000000)
94f592af 6193 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6194 _("@local or @plt branch destination is too far away, %ld bytes"),
6195 (long) value);
6196 insn = insn | (value & 0x03fffffc);
6197 if (target_big_endian)
6198 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6199 else
6200 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6201 }
252b5132
RH		 6202 break;
6203
6204 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6205 fixP->fx_done = 0;
6206 if (fixP->fx_addsy
6207 && !S_IS_DEFINED (fixP->fx_addsy)
6208 && !S_IS_WEAK (fixP->fx_addsy))
6209 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6210 break;
6211
6212 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6213 fixP->fx_done = 0;
252b5132
RH		 6214 break;
6215
0baf16f2 6216#ifdef OBJ_ELF
0baf16f2
AM		 6217 /* Generated by reference to `sym@tocbase'. The sym is
6218 ignored by the linker. */
6219 case BFD_RELOC_PPC64_TOC:
94f592af 6220 fixP->fx_done = 0;
0baf16f2 6221 break;
0baf16f2 6222#endif
252b5132 6223 default:
bc805888 6224 fprintf (stderr,
94f592af 6225 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6226 fflush (stderr);
252b5132
RH		 6227 abort ();
6228 }
6229 }
6230
6231#ifdef OBJ_ELF
94f592af 6232 fixP->fx_addnumber = value;
4e6935a6
AM		 6233
6234 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6235 from the section contents. If we are going to be emitting a reloc
6236 then the section contents are immaterial, so don't warn if they
6237 happen to overflow. Leave such warnings to ld. */
6238 if (!fixP->fx_done)
6239 fixP->fx_no_overflow = 1;
252b5132 6240#else
94f592af
NC		 6241 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6242 fixP->fx_addnumber = 0;
252b5132
RH		 6243 else
6244 {
6245#ifdef TE_PE
94f592af 6246 fixP->fx_addnumber = 0;
252b5132 6247#else
8edcbfcd
TG		 6248 /* We want to use the offset within the toc, not the actual VMA
6249 of the symbol. */
94f592af 6250 fixP->fx_addnumber =
8edcbfcd
TG		 6251 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6252 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6253#endif
6254 }
6255#endif
252b5132
RH		 6256}
6257
6258/* Generate a reloc for a fixup. */
6259
6260arelent *
98027b10 6261tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6262{
6263 arelent *reloc;
6264
6265 reloc = (arelent *) xmalloc (sizeof (arelent));
6266
49309057
ILT		 6267 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6268 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6269 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6270 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6271 if (reloc->howto == (reloc_howto_type *) NULL)
6272 {
6273 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6274 _("reloc %d not supported by object file format"),
6275 (int) fixp->fx_r_type);
252b5132
RH		 6276 return NULL;
6277 }
6278 reloc->addend = fixp->fx_addnumber;
6279
6280 return reloc;
6281}
75e21f08
JJ		 6282
6283void
98027b10 6284ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6285{
6286 cfi_add_CFA_def_cfa (1, 0);
6287}
6288
6289int
1df69f4f 6290tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6291{
6292 unsigned int regnum = -1;
6293 unsigned int i;
6294 const char *p;
6295 char *q;
6296 static struct { char *name; int dw2regnum; } regnames[] =
6297 {
6298 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6299 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6300 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6301 { "spe_acc", 111 }, { "spefscr", 112 }
6302 };
6303
6304 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6305 if (strcmp (regnames[i].name, regname) == 0)
6306 return regnames[i].dw2regnum;
6307
6308 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6309 {
6310 p = regname + 1 + (regname[1] == '.');
6311 regnum = strtoul (p, &q, 10);
6312 if (p == q || *q || regnum >= 32)
6313 return -1;
6314 if (regname[0] == 'f')
b7d7dc63 6315 regnum += 32;
75e21f08 6316 else if (regname[0] == 'v')
b7d7dc63 6317 regnum += 77;
75e21f08
JJ		 6318 }
6319 else if (regname[0] == 'c' && regname[1] == 'r')
6320 {
6321 p = regname + 2 + (regname[2] == '.');
6322 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6323 return -1;
75e21f08
JJ		 6324 regnum = p[0] - '0' + 68;
6325 }
6326 return regnum;
6327}
GDB Binutils - Deliverables
This page took 0.865515 seconds and 4 git commands to generate.