* ppc-dis.c (struct dis_private): New.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH
22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH
33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH
53#endif
54#endif
55
0baf16f2
AM
56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM
69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM
72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM
76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM
79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM
81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM
83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH
89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM
95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM
99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH
101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH
134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f
NC
185
186/* '+' and '-' can be used as postfix predicate predictors for conditional
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ
189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH
192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH
229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM
235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH
237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM
263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH
265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM
270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH
273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH
287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C
291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH
295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH
315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH
343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH
366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH
368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH
399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH
401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH
407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH
494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C
517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH
519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C
525
526 { "v0", 0 },
81d4177b
KH
527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C
550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH
552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH
558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH
564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH
601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH
612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH
623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH
627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM
631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH
636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH
641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM
645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH
649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH
657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM
706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH
709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH
720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH
727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH
730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH
789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ
796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM
804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ
806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH
810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH
818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
821
822int
823md_parse_option (c, arg)
824 int c;
825 char *arg;
826{
827 switch (c)
828 {
829 case 'u':
830 /* -u means that any undefined symbols should be treated as
831 external, which is the default for gas anyhow. */
832 break;
833
834#ifdef OBJ_ELF
835 case 'l':
836 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 837 sake, recognize -be also. */
252b5132
RH
838 if (strcmp (arg, "e") == 0)
839 {
840 target_big_endian = 0;
841 set_target_endian = 1;
842 }
843 else
844 return 0;
845
846 break;
847
848 case 'b':
849 if (strcmp (arg, "e") == 0)
850 {
851 target_big_endian = 1;
852 set_target_endian = 1;
853 }
854 else
855 return 0;
856
857 break;
858
859 case 'K':
99a814a1 860 /* Recognize -K PIC. */
252b5132
RH
861 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
862 {
863 shlib = SHLIB_PIC;
864 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
865 }
866 else
867 return 0;
868
869 break;
870#endif
871
7f6d05e8
CP
872 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
873 case 'a':
874 if (strcmp (arg, "64") == 0)
2a98c3a6
AM
875 {
876#ifdef BFD64
877 ppc_obj64 = 1;
878#else
879 as_fatal (_("%s unsupported"), "-a64");
880#endif
881 }
7f6d05e8 882 else if (strcmp (arg, "32") == 0)
2b3c4602 883 ppc_obj64 = 0;
7f6d05e8
CP
884 else
885 return 0;
886 break;
81d4177b 887
252b5132
RH
888 case 'm':
889 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
99a814a1 890 (RIOS2). */
252b5132 891 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
2b3c4602 892 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
252b5132
RH
893 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
894 else if (strcmp (arg, "pwr") == 0)
2b3c4602 895 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
23e1d84c 896 /* -m601 means to assemble for the PowerPC 601, which includes
99a814a1 897 instructions that are holdovers from the Power. */
252b5132 898 else if (strcmp (arg, "601") == 0)
b34976b6
AM
899 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
900 | PPC_OPCODE_601 | PPC_OPCODE_32);
252b5132 901 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
23e1d84c 902 PowerPC 603/604. */
252b5132
RH
903 else if (strcmp (arg, "ppc") == 0
904 || strcmp (arg, "ppc32") == 0
252b5132
RH
905 || strcmp (arg, "603") == 0
906 || strcmp (arg, "604") == 0)
6a0c61b7 907 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
23e1d84c 908 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
418c1742 909 else if (strcmp (arg, "403") == 0
b34976b6
AM
910 || strcmp (arg, "405") == 0)
911 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
912 | PPC_OPCODE_403 | PPC_OPCODE_32);
3d8aea2f
AM
913 else if (strcmp (arg, "440") == 0)
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
55257f50 915 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
418c1742 916 else if (strcmp (arg, "7400") == 0
b34976b6
AM
917 || strcmp (arg, "7410") == 0
918 || strcmp (arg, "7450") == 0
919 || strcmp (arg, "7455") == 0)
920 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
921 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
418c1742 922 else if (strcmp (arg, "altivec") == 0)
b34976b6
AM
923 {
924 if (ppc_cpu == 0)
925 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
926 else
927 ppc_cpu |= PPC_OPCODE_ALTIVEC;
928 }
6a0c61b7
EZ
929 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
930 {
b34976b6
AM
931 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
932 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
933 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
934 | PPC_OPCODE_RFMCI);
935 }
6a0c61b7
EZ
936 else if (strcmp (arg, "spe") == 0)
937 {
938 if (ppc_cpu == 0)
939 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
940 else
941 ppc_cpu |= PPC_OPCODE_SPE;
942 }
252b5132 943 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
99a814a1 944 620. */
252b5132
RH
945 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
946 {
6a0c61b7 947 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
252b5132 948 }
d0e9a01c
RH
949 else if (strcmp (arg, "ppc64bridge") == 0)
950 {
b34976b6
AM
951 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
952 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
418c1742
MG
953 }
954 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
955 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
6a0c61b7
EZ
956 {
957 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
958 }
418c1742
MG
959 /* -mbooke64 means enable 64-bit BookE support. */
960 else if (strcmp (arg, "booke64") == 0)
961 {
b34976b6
AM
962 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
963 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
d0e9a01c 964 }
23e1d84c
AM
965 else if (strcmp (arg, "power4") == 0)
966 {
b34976b6
AM
967 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
968 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
23e1d84c 969 }
252b5132
RH
970 /* -mcom means assemble for the common intersection between Power
971 and PowerPC. At present, we just allow the union, rather
972 than the intersection. */
973 else if (strcmp (arg, "com") == 0)
2b3c4602 974 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132
RH
975 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
976 else if (strcmp (arg, "any") == 0)
2b3c4602 977 ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
252b5132
RH
978
979 else if (strcmp (arg, "regnames") == 0)
b34976b6 980 reg_names_p = TRUE;
252b5132
RH
981
982 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 983 reg_names_p = FALSE;
252b5132
RH
984
985#ifdef OBJ_ELF
99a814a1
AM
986 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
987 that require relocation. */
252b5132
RH
988 else if (strcmp (arg, "relocatable") == 0)
989 {
5d6f4f16 990 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
991 ppc_flags |= EF_PPC_RELOCATABLE;
992 }
993
994 else if (strcmp (arg, "relocatable-lib") == 0)
995 {
5d6f4f16 996 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
997 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
998 }
999
99a814a1 1000 /* -memb, set embedded bit. */
252b5132
RH
1001 else if (strcmp (arg, "emb") == 0)
1002 ppc_flags |= EF_PPC_EMB;
1003
99a814a1
AM
1004 /* -mlittle/-mbig set the endianess. */
1005 else if (strcmp (arg, "little") == 0
1006 || strcmp (arg, "little-endian") == 0)
252b5132
RH
1007 {
1008 target_big_endian = 0;
1009 set_target_endian = 1;
1010 }
1011
1012 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1013 {
1014 target_big_endian = 1;
1015 set_target_endian = 1;
1016 }
1017
1018 else if (strcmp (arg, "solaris") == 0)
1019 {
b34976b6 1020 msolaris = TRUE;
252b5132
RH
1021 ppc_comment_chars = ppc_solaris_comment_chars;
1022 }
1023
1024 else if (strcmp (arg, "no-solaris") == 0)
1025 {
b34976b6 1026 msolaris = FALSE;
252b5132
RH
1027 ppc_comment_chars = ppc_eabi_comment_chars;
1028 }
1029#endif
1030 else
1031 {
1032 as_bad (_("invalid switch -m%s"), arg);
1033 return 0;
1034 }
1035 break;
1036
1037#ifdef OBJ_ELF
1038 /* -V: SVR4 argument to print version ID. */
1039 case 'V':
1040 print_version_id ();
1041 break;
1042
1043 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1044 should be emitted or not. FIXME: Not implemented. */
1045 case 'Q':
1046 break;
1047
1048 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1049 rather than .stabs.excl, which is ignored by the linker.
1050 FIXME: Not implemented. */
1051 case 's':
1052 if (arg)
1053 return 0;
1054
1055 break;
1056#endif
1057
1058 default:
1059 return 0;
1060 }
1061
1062 return 1;
1063}
1064
1065void
1066md_show_usage (stream)
1067 FILE *stream;
1068{
bc805888 1069 fprintf (stream, _("\
252b5132 1070PowerPC options:\n\
df12615d
AM
1071-a32 generate ELF32/XCOFF32\n\
1072-a64 generate ELF64/XCOFF64\n\
252b5132 1073-u ignored\n\
23e1d84c
AM
1074-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1075-mpwr generate code for POWER (RIOS1)\n\
1076-m601 generate code for PowerPC 601\n\
418c1742 1077-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1078 generate code for PowerPC 603/604\n\
df12615d 1079-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1080-m440 generate code for PowerPC 440\n\
f5c120c5 1081-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM
1082 generate code For PowerPC 7400/7410/7450/7455\n"));
1083 fprintf (stream, _("\
23e1d84c 1084-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1085-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG
1086-mbooke64 generate code for 64-bit PowerPC BookE\n\
1087-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1088-mpower4 generate code for Power4 architecture\n\
252b5132 1089-mcom generate code Power/PowerPC common instructions\n\
df12615d 1090-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1091 fprintf (stream, _("\
df12615d 1092-maltivec generate code for AltiVec\n\
6a0c61b7 1093-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM
1094-mspe generate code for Motorola SPE instructions\n\
1095-mregnames Allow symbolic names for registers\n\
1096-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1097#ifdef OBJ_ELF
bc805888 1098 fprintf (stream, _("\
252b5132
RH
1099-mrelocatable support for GCC's -mrelocatble option\n\
1100-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1101-memb set PPC_EMB bit in ELF flags\n\
df12615d 1102-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1103 generate code for a little endian machine\n\
df12615d
AM
1104-mbig, -mbig-endian, -b, -be\n\
1105 generate code for a big endian machine\n\
252b5132
RH
1106-msolaris generate code for Solaris\n\
1107-mno-solaris do not generate code for Solaris\n\
1108-V print assembler version number\n\
1109-Qy, -Qn ignored\n"));
1110#endif
1111}
1112\f
1113/* Set ppc_cpu if it is not already set. */
1114
1115static void
1116ppc_set_cpu ()
1117{
1118 const char *default_os = TARGET_OS;
1119 const char *default_cpu = TARGET_CPU;
1120
1121 if (ppc_cpu == 0)
1122 {
2a98c3a6
AM
1123 if (ppc_obj64)
1124 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1125 else if (strncmp (default_os, "aix", 3) == 0
1126 && default_os[3] >= '4' && default_os[3] <= '9')
2b3c4602 1127 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1128 else if (strncmp (default_os, "aix3", 4) == 0)
2b3c4602 1129 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1130 else if (strcmp (default_cpu, "rs6000") == 0)
2b3c4602 1131 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1132 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM
1133 {
1134 if (default_cpu[7] == '6' && default_cpu[8] == '4')
1135 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1136 else
1137 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1138 }
252b5132 1139 else
99a814a1
AM
1140 as_fatal (_("Unknown default cpu = %s, os = %s"),
1141 default_cpu, default_os);
252b5132
RH
1142 }
1143}
1144
1145/* Figure out the BFD architecture to use. */
1146
1147enum bfd_architecture
1148ppc_arch ()
1149{
1150 const char *default_cpu = TARGET_CPU;
1151 ppc_set_cpu ();
1152
1153 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1154 return bfd_arch_powerpc;
1155 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1156 return bfd_arch_rs6000;
1157 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1158 {
1159 if (strcmp (default_cpu, "rs6000") == 0)
1160 return bfd_arch_rs6000;
0baf16f2 1161 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH
1162 return bfd_arch_powerpc;
1163 }
1164
1165 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1166 return bfd_arch_unknown;
1167}
1168
7f6d05e8
CP
1169unsigned long
1170ppc_mach ()
1171{
2a98c3a6
AM
1172 if (ppc_obj64)
1173 return bfd_mach_ppc64;
1174 else if (ppc_arch () == bfd_arch_rs6000)
1175 return bfd_mach_rs6k;
1176 else
1177 return bfd_mach_ppc;
7f6d05e8
CP
1178}
1179
81d4177b 1180extern char*
99a814a1 1181ppc_target_format ()
7f6d05e8
CP
1182{
1183#ifdef OBJ_COFF
1184#ifdef TE_PE
99a814a1 1185 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1186#elif TE_POWERMAC
0baf16f2 1187 return "xcoff-powermac";
7f6d05e8 1188#else
eb1e0e80 1189# ifdef TE_AIX5
2b3c4602 1190 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1191# else
2b3c4602 1192 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1193# endif
7f6d05e8 1194#endif
7f6d05e8
CP
1195#endif
1196#ifdef OBJ_ELF
0baf16f2 1197 return (target_big_endian
2b3c4602
AM
1198 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1199 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP
1200#endif
1201}
1202
252b5132
RH
1203/* This function is called when the assembler starts up. It is called
1204 after the options have been parsed and the output file has been
1205 opened. */
1206
1207void
1208md_begin ()
1209{
1210 register const struct powerpc_opcode *op;
1211 const struct powerpc_opcode *op_end;
1212 const struct powerpc_macro *macro;
1213 const struct powerpc_macro *macro_end;
b34976b6 1214 bfd_boolean dup_insn = FALSE;
252b5132
RH
1215
1216 ppc_set_cpu ();
1217
75e21f08
JJ
1218 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1219
252b5132 1220#ifdef OBJ_ELF
81d4177b 1221 /* Set the ELF flags if desired. */
252b5132
RH
1222 if (ppc_flags && !msolaris)
1223 bfd_set_private_flags (stdoutput, ppc_flags);
1224#endif
1225
1226 /* Insert the opcodes into a hash table. */
1227 ppc_hash = hash_new ();
1228
1229 op_end = powerpc_opcodes + powerpc_num_opcodes;
1230 for (op = powerpc_opcodes; op < op_end; op++)
1231 {
1232 know ((op->opcode & op->mask) == op->opcode);
1233
2b3c4602 1234 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1235 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM
1236 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1237 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1238 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC
1239 /* Certain instructions (eg: extsw) do not exist in the
1240 32-bit BookE instruction set, but they do exist in the
1241 64-bit BookE instruction set, and other PPC instruction
1242 sets. Check to see if the opcode has the BOOKE64 flag set.
1243 If it does make sure that the target CPU is not the BookE32. */
1244 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1245 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1246 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM
1247 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1248 || ((op->flags & PPC_OPCODE_POWER4)
1249 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH
1250 {
1251 const char *retval;
1252
1253 retval = hash_insert (ppc_hash, op->name, (PTR) op);
1254 if (retval != (const char *) NULL)
1255 {
99a814a1 1256 /* Ignore Power duplicates for -m601. */
252b5132
RH
1257 if ((ppc_cpu & PPC_OPCODE_601) != 0
1258 && (op->flags & PPC_OPCODE_POWER) != 0)
1259 continue;
1260
99a814a1
AM
1261 as_bad (_("Internal assembler error for instruction %s"),
1262 op->name);
b34976b6 1263 dup_insn = TRUE;
252b5132
RH
1264 }
1265 }
1266 }
1267
1268 /* Insert the macros into a hash table. */
1269 ppc_macro_hash = hash_new ();
1270
1271 macro_end = powerpc_macros + powerpc_num_macros;
1272 for (macro = powerpc_macros; macro < macro_end; macro++)
1273 {
1274 if ((macro->flags & ppc_cpu) != 0)
1275 {
1276 const char *retval;
1277
1278 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1279 if (retval != (const char *) NULL)
1280 {
1281 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1282 dup_insn = TRUE;
252b5132
RH
1283 }
1284 }
1285 }
1286
1287 if (dup_insn)
1288 abort ();
1289
99a814a1
AM
1290 /* Tell the main code what the endianness is if it is not overidden
1291 by the user. */
252b5132
RH
1292 if (!set_target_endian)
1293 {
1294 set_target_endian = 1;
1295 target_big_endian = PPC_BIG_ENDIAN;
1296 }
1297
1298#ifdef OBJ_XCOFF
1299 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1300
1301 /* Create dummy symbols to serve as initial csects. This forces the
1302 text csects to precede the data csects. These symbols will not
1303 be output. */
1304 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1305 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1306 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1307 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH
1308#endif
1309
1310#ifdef TE_PE
1311
1312 ppc_current_section = text_section;
81d4177b 1313 ppc_previous_section = 0;
252b5132
RH
1314
1315#endif
1316}
1317
6a0c61b7
EZ
1318void
1319ppc_cleanup ()
1320{
dc1d03fc 1321#ifdef OBJ_ELF
6a0c61b7
EZ
1322 if (ppc_apuinfo_list == NULL)
1323 return;
1324
1325 /* Ok, so write the section info out. We have this layout:
1326
1327 byte data what
1328 ---- ---- ----
1329 0 8 length of "APUinfo\0"
1330 4 (n*4) number of APU's (4 bytes each)
1331 8 2 note type 2
1332 12 "APUinfo\0" name
1333 20 APU#1 first APU's info
1334 24 APU#2 second APU's info
1335 ... ...
1336 */
1337 {
1338 char *p;
1339 asection *seg = now_seg;
1340 subsegT subseg = now_subseg;
1341 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1342 unsigned int i;
6a0c61b7
EZ
1343
1344 /* Create the .PPC.EMB.apuinfo section. */
1345 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1346 bfd_set_section_flags (stdoutput,
1347 apuinfo_secp,
e1a9cb8e 1348 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ
1349
1350 p = frag_more (4);
1351 md_number_to_chars (p, (valueT) 8, 4);
1352
1353 p = frag_more (4);
e98d298c 1354 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ
1355
1356 p = frag_more (4);
1357 md_number_to_chars (p, (valueT) 2, 4);
1358
1359 p = frag_more (8);
1360 strcpy (p, "APUinfo");
1361
1362 for (i = 0; i < ppc_apuinfo_num; i++)
1363 {
b34976b6
AM
1364 p = frag_more (4);
1365 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ
1366 }
1367
1368 frag_align (2, 0, 0);
1369
1370 /* We probably can't restore the current segment, for there likely
1371 isn't one yet... */
1372 if (seg && subseg)
1373 subseg_set (seg, subseg);
1374 }
dc1d03fc 1375#endif
6a0c61b7
EZ
1376}
1377
252b5132
RH
1378/* Insert an operand value into an instruction. */
1379
1380static unsigned long
1381ppc_insert_operand (insn, operand, val, file, line)
1382 unsigned long insn;
1383 const struct powerpc_operand *operand;
1384 offsetT val;
1385 char *file;
1386 unsigned int line;
1387{
1388 if (operand->bits != 32)
1389 {
1390 long min, max;
1391 offsetT test;
1392
1393 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1394 {
d0e9a01c 1395 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH
1396 max = (1 << operand->bits) - 1;
1397 else
1398 max = (1 << (operand->bits - 1)) - 1;
1399 min = - (1 << (operand->bits - 1));
1400
2b3c4602 1401 if (!ppc_obj64)
252b5132
RH
1402 {
1403 /* Some people write 32 bit hex constants with the sign
1404 extension done by hand. This shouldn't really be
1405 valid, but, to permit this code to assemble on a 64
1406 bit host, we sign extend the 32 bit value. */
1407 if (val > 0
92161534
ILT
1408 && (val & (offsetT) 0x80000000) != 0
1409 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH
1410 {
1411 val -= 0x80000000;
1412 val -= 0x80000000;
1413 }
1414 }
1415 }
1416 else
1417 {
1418 max = (1 << operand->bits) - 1;
1419 min = 0;
1420 }
1421
1422 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1423 test = - val;
1424 else
1425 test = val;
1426
1427 if (test < (offsetT) min || test > (offsetT) max)
1428 {
1429 const char *err =
1430 _("operand out of range (%s not between %ld and %ld)");
1431 char buf[100];
1432
1433 sprint_value (buf, test);
0baf16f2 1434 as_bad_where (file, line, err, buf, min, max);
252b5132
RH
1435 }
1436 }
1437
1438 if (operand->insert)
1439 {
1440 const char *errmsg;
1441
1442 errmsg = NULL;
2b3c4602 1443 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1444 if (errmsg != (const char *) NULL)
0baf16f2 1445 as_bad_where (file, line, errmsg);
252b5132
RH
1446 }
1447 else
1448 insn |= (((long) val & ((1 << operand->bits) - 1))
1449 << operand->shift);
1450
1451 return insn;
1452}
1453
1454\f
1455#ifdef OBJ_ELF
1456/* Parse @got, etc. and return the desired relocation. */
1457static bfd_reloc_code_real_type
1458ppc_elf_suffix (str_p, exp_p)
1459 char **str_p;
1460 expressionS *exp_p;
1461{
1462 struct map_bfd {
1463 char *string;
1464 int length;
15c1449b 1465 int reloc;
252b5132
RH
1466 };
1467
1468 char ident[20];
1469 char *str = *str_p;
1470 char *str2;
1471 int ch;
1472 int len;
15c1449b 1473 const struct map_bfd *ptr;
252b5132 1474
bc805888 1475#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1476
15c1449b 1477 static const struct map_bfd mapping[] = {
cdba85ec
AM
1478 MAP ("l", (int) BFD_RELOC_LO16),
1479 MAP ("h", (int) BFD_RELOC_HI16),
1480 MAP ("ha", (int) BFD_RELOC_HI16_S),
1481 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1482 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1483 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1484 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1485 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1486 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1487 MAP ("fixup", (int) BFD_RELOC_CTOR),
1488 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1489 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1490 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1491 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1492 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1493 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1494 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1495 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1496 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1497 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1498 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1499 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1500 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1501 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1502 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1503 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1504 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1505 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1506 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1507 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1508 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1509 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1510 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1511 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1512 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1513 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1514 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1515 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1516 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1517 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1518 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1519 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1520 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1521 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1522 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1523 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1524 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1525 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1526 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1527 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1528 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1529 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1530 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1531 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1532 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1533 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1534 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1535 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1536 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1537 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1538 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1539 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1540 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1541 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1542 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1543 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1544 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1545 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM
1546 /* The following are only valid for ppc64. Negative values are
1547 used instead of a flag. */
cdba85ec
AM
1548 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1549 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1550 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1551 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1552 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1553 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1554 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1555 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1556 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1557 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1558 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1559 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1560 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1561 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1562 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1563 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1564 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1565 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH
1566 };
1567
1568 if (*str++ != '@')
1569 return BFD_RELOC_UNUSED;
1570
1571 for (ch = *str, str2 = ident;
1572 (str2 < ident + sizeof (ident) - 1
3882b010 1573 && (ISALNUM (ch) || ch == '@'));
252b5132
RH
1574 ch = *++str)
1575 {
3882b010 1576 *str2++ = TOLOWER (ch);
252b5132
RH
1577 }
1578
1579 *str2 = '\0';
1580 len = str2 - ident;
1581
1582 ch = ident[0];
1583 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1584 if (ch == ptr->string[0]
1585 && len == ptr->length
1586 && memcmp (ident, ptr->string, ptr->length) == 0)
1587 {
15c1449b
AM
1588 int reloc = ptr->reloc;
1589
2b3c4602 1590 if (reloc < 0)
15c1449b 1591 {
2b3c4602 1592 if (!ppc_obj64)
15c1449b
AM
1593 return BFD_RELOC_UNUSED;
1594 reloc = -reloc;
1595 }
1596
cdba85ec 1597 if (!ppc_obj64)
5f6db75a
AM
1598 if (exp_p->X_add_number != 0
1599 && (reloc == (int) BFD_RELOC_16_GOTOFF
1600 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1601 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1602 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1603 as_warn (_("identifier+constant@got means identifier@got+constant"));
1604
1605 /* Now check for identifier@suffix+constant. */
1606 if (*str == '-' || *str == '+')
252b5132 1607 {
5f6db75a
AM
1608 char *orig_line = input_line_pointer;
1609 expressionS new_exp;
1610
1611 input_line_pointer = str;
1612 expression (&new_exp);
1613 if (new_exp.X_op == O_constant)
252b5132 1614 {
5f6db75a
AM
1615 exp_p->X_add_number += new_exp.X_add_number;
1616 str = input_line_pointer;
252b5132 1617 }
5f6db75a
AM
1618
1619 if (&input_line_pointer != str_p)
1620 input_line_pointer = orig_line;
252b5132 1621 }
252b5132 1622 *str_p = str;
0baf16f2 1623
2b3c4602 1624 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM
1625 && exp_p->X_op == O_symbol
1626 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1627 {
9f2b53d7
AM
1628 /* Change the symbol so that the dummy .TOC. symbol can be
1629 omitted from the object file. */
0baf16f2
AM
1630 exp_p->X_add_symbol = &abs_symbol;
1631 }
1632
15c1449b 1633 return (bfd_reloc_code_real_type) reloc;
252b5132
RH
1634 }
1635
1636 return BFD_RELOC_UNUSED;
1637}
1638
99a814a1
AM
1639/* Like normal .long/.short/.word, except support @got, etc.
1640 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH
1641static void
1642ppc_elf_cons (nbytes)
0baf16f2 1643 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH
1644{
1645 expressionS exp;
1646 bfd_reloc_code_real_type reloc;
1647
1648 if (is_it_end_of_statement ())
1649 {
1650 demand_empty_rest_of_line ();
1651 return;
1652 }
1653
1654 do
1655 {
1656 expression (&exp);
1657 if (exp.X_op == O_symbol
1658 && *input_line_pointer == '@'
99a814a1
AM
1659 && (reloc = ppc_elf_suffix (&input_line_pointer,
1660 &exp)) != BFD_RELOC_UNUSED)
252b5132 1661 {
99a814a1
AM
1662 reloc_howto_type *reloc_howto;
1663 int size;
1664
1665 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1666 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH
1667
1668 if (size > nbytes)
0baf16f2
AM
1669 {
1670 as_bad (_("%s relocations do not fit in %d bytes\n"),
1671 reloc_howto->name, nbytes);
1672 }
252b5132
RH
1673 else
1674 {
0baf16f2
AM
1675 char *p;
1676 int offset;
252b5132 1677
0baf16f2
AM
1678 p = frag_more (nbytes);
1679 offset = 0;
1680 if (target_big_endian)
1681 offset = nbytes - size;
99a814a1
AM
1682 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1683 &exp, 0, reloc);
252b5132
RH
1684 }
1685 }
1686 else
1687 emit_expr (&exp, (unsigned int) nbytes);
1688 }
1689 while (*input_line_pointer++ == ',');
1690
99a814a1
AM
1691 /* Put terminator back into stream. */
1692 input_line_pointer--;
252b5132
RH
1693 demand_empty_rest_of_line ();
1694}
1695
1696/* Solaris pseduo op to change to the .rodata section. */
1697static void
1698ppc_elf_rdata (xxx)
1699 int xxx;
1700{
1701 char *save_line = input_line_pointer;
1702 static char section[] = ".rodata\n";
1703
99a814a1 1704 /* Just pretend this is .section .rodata */
252b5132
RH
1705 input_line_pointer = section;
1706 obj_elf_section (xxx);
1707
1708 input_line_pointer = save_line;
1709}
1710
99a814a1 1711/* Pseudo op to make file scope bss items. */
252b5132 1712static void
99a814a1 1713ppc_elf_lcomm (xxx)
92161534 1714 int xxx ATTRIBUTE_UNUSED;
252b5132
RH
1715{
1716 register char *name;
1717 register char c;
1718 register char *p;
1719 offsetT size;
1720 register symbolS *symbolP;
1721 offsetT align;
1722 segT old_sec;
1723 int old_subsec;
1724 char *pfrag;
1725 int align2;
1726
1727 name = input_line_pointer;
1728 c = get_symbol_end ();
1729
99a814a1 1730 /* just after name is now '\0'. */
252b5132
RH
1731 p = input_line_pointer;
1732 *p = c;
1733 SKIP_WHITESPACE ();
1734 if (*input_line_pointer != ',')
1735 {
1736 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1737 ignore_rest_of_line ();
1738 return;
1739 }
1740
1741 input_line_pointer++; /* skip ',' */
1742 if ((size = get_absolute_expression ()) < 0)
1743 {
1744 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1745 ignore_rest_of_line ();
1746 return;
1747 }
1748
1749 /* The third argument to .lcomm is the alignment. */
1750 if (*input_line_pointer != ',')
1751 align = 8;
1752 else
1753 {
1754 ++input_line_pointer;
1755 align = get_absolute_expression ();
1756 if (align <= 0)
1757 {
1758 as_warn (_("ignoring bad alignment"));
1759 align = 8;
1760 }
1761 }
1762
1763 *p = 0;
1764 symbolP = symbol_find_or_make (name);
1765 *p = c;
1766
1767 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1768 {
1769 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1770 S_GET_NAME (symbolP));
1771 ignore_rest_of_line ();
1772 return;
1773 }
1774
1775 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1776 {
1777 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1778 S_GET_NAME (symbolP),
1779 (long) S_GET_VALUE (symbolP),
1780 (long) size);
1781
1782 ignore_rest_of_line ();
1783 return;
1784 }
1785
99a814a1 1786 /* Allocate_bss. */
252b5132
RH
1787 old_sec = now_seg;
1788 old_subsec = now_subseg;
1789 if (align)
1790 {
99a814a1 1791 /* Convert to a power of 2 alignment. */
252b5132
RH
1792 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1793 if (align != 1)
1794 {
1795 as_bad (_("Common alignment not a power of 2"));
1796 ignore_rest_of_line ();
1797 return;
1798 }
1799 }
1800 else
1801 align2 = 0;
1802
1803 record_alignment (bss_section, align2);
1804 subseg_set (bss_section, 0);
1805 if (align2)
1806 frag_align (align2, 0, 0);
1807 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT
1808 symbol_get_frag (symbolP)->fr_symbol = 0;
1809 symbol_set_frag (symbolP, frag_now);
252b5132
RH
1810 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1811 (char *) 0);
1812 *pfrag = 0;
1813 S_SET_SIZE (symbolP, size);
1814 S_SET_SEGMENT (symbolP, bss_section);
1815 subseg_set (old_sec, old_subsec);
1816 demand_empty_rest_of_line ();
1817}
1818
1819/* Validate any relocations emitted for -mrelocatable, possibly adding
1820 fixups for word relocations in writable segments, so we can adjust
1821 them at runtime. */
1822static void
1823ppc_elf_validate_fix (fixp, seg)
1824 fixS *fixp;
1825 segT seg;
1826{
1827 if (fixp->fx_done || fixp->fx_pcrel)
1828 return;
1829
1830 switch (shlib)
1831 {
1832 case SHLIB_NONE:
1833 case SHLIB_PIC:
1834 return;
1835
5d6f4f16 1836 case SHLIB_MRELOCATABLE:
252b5132
RH
1837 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1838 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1839 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1840 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1841 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1842 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH
1843 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1844 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1845 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1846 && (seg->flags & SEC_LOAD) != 0
252b5132
RH
1847 && strcmp (segment_name (seg), ".got2") != 0
1848 && strcmp (segment_name (seg), ".dtors") != 0
1849 && strcmp (segment_name (seg), ".ctors") != 0
1850 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH
1851 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1852 && strcmp (segment_name (seg), ".eh_frame") != 0
1853 && strcmp (segment_name (seg), ".ex_shared") != 0)
1854 {
1855 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1856 || fixp->fx_r_type != BFD_RELOC_CTOR)
1857 {
1858 as_bad_where (fixp->fx_file, fixp->fx_line,
1859 _("Relocation cannot be done when using -mrelocatable"));
1860 }
1861 }
1862 return;
1863 }
1864}
0baf16f2 1865
7e8d4ab4
AM
1866/* Prevent elf_frob_file_before_adjust removing a weak undefined
1867 function descriptor sym if the corresponding code sym is used. */
1868
1869void
1870ppc_frob_file_before_adjust ()
0baf16f2 1871{
7e8d4ab4 1872 symbolS *symp;
0baf16f2 1873
7e8d4ab4
AM
1874 if (!ppc_obj64)
1875 return;
1876
1877 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1878 {
7e8d4ab4
AM
1879 const char *name;
1880 char *dotname;
1881 symbolS *dotsym;
1882 size_t len;
1883
1884 name = S_GET_NAME (symp);
1885 if (name[0] == '.')
1886 continue;
1887
1888 if (! S_IS_WEAK (symp)
1889 || S_IS_DEFINED (symp))
1890 continue;
1891
1892 len = strlen (name) + 1;
1893 dotname = xmalloc (len + 1);
1894 dotname[0] = '.';
1895 memcpy (dotname + 1, name, len);
1896 dotsym = symbol_find (dotname);
1897 free (dotname);
1898 if (dotsym != NULL && (symbol_used_p (dotsym)
1899 || symbol_used_in_reloc_p (dotsym)))
1900 {
1901 symbol_mark_used (symp);
1902 }
0baf16f2
AM
1903 }
1904
7e8d4ab4
AM
1905 /* Don't emit .TOC. symbol. */
1906 symp = symbol_find (".TOC.");
1907 if (symp != NULL)
1908 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1909}
252b5132
RH
1910#endif /* OBJ_ELF */
1911\f
1912#ifdef TE_PE
1913
1914/*
99a814a1 1915 * Summary of parse_toc_entry.
252b5132
RH
1916 *
1917 * in: Input_line_pointer points to the '[' in one of:
1918 *
1919 * [toc] [tocv] [toc32] [toc64]
1920 *
1921 * Anything else is an error of one kind or another.
1922 *
81d4177b 1923 * out:
252b5132
RH
1924 * return value: success or failure
1925 * toc_kind: kind of toc reference
1926 * input_line_pointer:
1927 * success: first char after the ']'
1928 * failure: unchanged
1929 *
1930 * settings:
1931 *
1932 * [toc] - rv == success, toc_kind = default_toc
1933 * [tocv] - rv == success, toc_kind = data_in_toc
1934 * [toc32] - rv == success, toc_kind = must_be_32
1935 * [toc64] - rv == success, toc_kind = must_be_64
1936 *
1937 */
1938
81d4177b
KH
1939enum toc_size_qualifier
1940{
252b5132
RH
1941 default_toc, /* The toc cell constructed should be the system default size */
1942 data_in_toc, /* This is a direct reference to a toc cell */
1943 must_be_32, /* The toc cell constructed must be 32 bits wide */
1944 must_be_64 /* The toc cell constructed must be 64 bits wide */
1945};
1946
1947static int
99a814a1 1948parse_toc_entry (toc_kind)
252b5132
RH
1949 enum toc_size_qualifier *toc_kind;
1950{
1951 char *start;
1952 char *toc_spec;
1953 char c;
1954 enum toc_size_qualifier t;
1955
99a814a1 1956 /* Save the input_line_pointer. */
252b5132
RH
1957 start = input_line_pointer;
1958
99a814a1 1959 /* Skip over the '[' , and whitespace. */
252b5132
RH
1960 ++input_line_pointer;
1961 SKIP_WHITESPACE ();
81d4177b 1962
99a814a1 1963 /* Find the spelling of the operand. */
252b5132
RH
1964 toc_spec = input_line_pointer;
1965 c = get_symbol_end ();
1966
99a814a1 1967 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH
1968 {
1969 t = default_toc;
1970 }
99a814a1 1971 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH
1972 {
1973 t = data_in_toc;
1974 }
99a814a1 1975 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH
1976 {
1977 t = must_be_32;
1978 }
99a814a1 1979 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH
1980 {
1981 t = must_be_64;
1982 }
1983 else
1984 {
1985 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM
1986 *input_line_pointer = c;
1987 input_line_pointer = start;
252b5132
RH
1988 return 0;
1989 }
1990
99a814a1
AM
1991 /* Now find the ']'. */
1992 *input_line_pointer = c;
252b5132 1993
81d4177b
KH
1994 SKIP_WHITESPACE (); /* leading whitespace could be there. */
1995 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH
1996
1997 if (c != ']')
1998 {
1999 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2000 input_line_pointer = start;
252b5132
RH
2001 return 0;
2002 }
2003
99a814a1 2004 *toc_kind = t;
252b5132
RH
2005 return 1;
2006}
2007#endif
2008\f
2009
dc1d03fc 2010#ifdef OBJ_ELF
6a0c61b7
EZ
2011#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2012static void
dc1d03fc 2013ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ
2014 unsigned int apu, version;
2015{
2016 unsigned int i;
2017
2018 /* Check we don't already exist. */
2019 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2020 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2021 return;
b34976b6 2022
6a0c61b7
EZ
2023 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2024 {
2025 if (ppc_apuinfo_num_alloc == 0)
2026 {
2027 ppc_apuinfo_num_alloc = 4;
2028 ppc_apuinfo_list = (unsigned long *)
2029 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2030 }
2031 else
2032 {
2033 ppc_apuinfo_num_alloc += 4;
2034 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2035 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2036 }
2037 }
dc1d03fc 2038 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ
2039}
2040#undef APUID
dc1d03fc 2041#endif
6a0c61b7
EZ
2042\f
2043
252b5132
RH
2044/* We need to keep a list of fixups. We can't simply generate them as
2045 we go, because that would require us to first create the frag, and
2046 that would screw up references to ``.''. */
2047
2048struct ppc_fixup
2049{
2050 expressionS exp;
2051 int opindex;
2052 bfd_reloc_code_real_type reloc;
2053};
2054
2055#define MAX_INSN_FIXUPS (5)
2056
2057/* This routine is called for each instruction to be assembled. */
2058
2059void
2060md_assemble (str)
2061 char *str;
2062{
2063 char *s;
2064 const struct powerpc_opcode *opcode;
2065 unsigned long insn;
2066 const unsigned char *opindex_ptr;
2067 int skip_optional;
2068 int need_paren;
2069 int next_opindex;
2070 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2071 int fc;
2072 char *f;
2073 int i;
2074#ifdef OBJ_ELF
2075 bfd_reloc_code_real_type reloc;
2076#endif
2077
2078 /* Get the opcode. */
3882b010 2079 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH
2080 ;
2081 if (*s != '\0')
2082 *s++ = '\0';
2083
2084 /* Look up the opcode in the hash table. */
2085 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2086 if (opcode == (const struct powerpc_opcode *) NULL)
2087 {
2088 const struct powerpc_macro *macro;
2089
2090 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2091 if (macro == (const struct powerpc_macro *) NULL)
2092 as_bad (_("Unrecognized opcode: `%s'"), str);
2093 else
2094 ppc_macro (s, macro);
2095
2096 return;
2097 }
2098
2099 insn = opcode->opcode;
2100
2101 str = s;
3882b010 2102 while (ISSPACE (*str))
252b5132
RH
2103 ++str;
2104
2105 /* PowerPC operands are just expressions. The only real issue is
2106 that a few operand types are optional. All cases which might use
2107 an optional operand separate the operands only with commas (in
2108 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2109 cases never have optional operands). There is never more than
2110 one optional operand for an instruction. So, before we start
2111 seriously parsing the operands, we check to see if we have an
2112 optional operand, and, if we do, we count the number of commas to
2113 see whether the operand should be omitted. */
2114 skip_optional = 0;
2115 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2116 {
2117 const struct powerpc_operand *operand;
2118
2119 operand = &powerpc_operands[*opindex_ptr];
2120 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2121 {
2122 unsigned int opcount;
7fe9cf6b
NC
2123 unsigned int num_operands_expected;
2124 unsigned int i;
252b5132
RH
2125
2126 /* There is an optional operand. Count the number of
2127 commas in the input line. */
2128 if (*str == '\0')
2129 opcount = 0;
2130 else
2131 {
2132 opcount = 1;
2133 s = str;
2134 while ((s = strchr (s, ',')) != (char *) NULL)
2135 {
2136 ++opcount;
2137 ++s;
2138 }
2139 }
2140
7fe9cf6b
NC
2141 /* Compute the number of expected operands.
2142 Do not count fake operands. */
2143 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2144 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2145 ++ num_operands_expected;
2146
252b5132
RH
2147 /* If there are fewer operands in the line then are called
2148 for by the instruction, we want to skip the optional
2149 operand. */
7fe9cf6b 2150 if (opcount < num_operands_expected)
252b5132
RH
2151 skip_optional = 1;
2152
2153 break;
2154 }
2155 }
2156
2157 /* Gather the operands. */
2158 need_paren = 0;
2159 next_opindex = 0;
2160 fc = 0;
2161 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2162 {
2163 const struct powerpc_operand *operand;
2164 const char *errmsg;
2165 char *hold;
2166 expressionS ex;
2167 char endc;
2168
2169 if (next_opindex == 0)
2170 operand = &powerpc_operands[*opindex_ptr];
2171 else
2172 {
2173 operand = &powerpc_operands[next_opindex];
2174 next_opindex = 0;
2175 }
252b5132
RH
2176 errmsg = NULL;
2177
2178 /* If this is a fake operand, then we do not expect anything
2179 from the input. */
2180 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2181 {
2b3c4602 2182 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2183 if (errmsg != (const char *) NULL)
2184 as_bad (errmsg);
2185 continue;
2186 }
2187
2188 /* If this is an optional operand, and we are skipping it, just
2189 insert a zero. */
2190 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2191 && skip_optional)
2192 {
2193 if (operand->insert)
2194 {
2b3c4602 2195 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2196 if (errmsg != (const char *) NULL)
2197 as_bad (errmsg);
2198 }
2199 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2200 next_opindex = *opindex_ptr + 1;
2201 continue;
2202 }
2203
2204 /* Gather the operand. */
2205 hold = input_line_pointer;
2206 input_line_pointer = str;
2207
2208#ifdef TE_PE
81d4177b 2209 if (*input_line_pointer == '[')
252b5132
RH
2210 {
2211 /* We are expecting something like the second argument here:
99a814a1
AM
2212 *
2213 * lwz r4,[toc].GS.0.static_int(rtoc)
2214 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2215 * The argument following the `]' must be a symbol name, and the
2216 * register must be the toc register: 'rtoc' or '2'
2217 *
2218 * The effect is to 0 as the displacement field
2219 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2220 * the appropriate variation) reloc against it based on the symbol.
2221 * The linker will build the toc, and insert the resolved toc offset.
2222 *
2223 * Note:
2224 * o The size of the toc entry is currently assumed to be
2225 * 32 bits. This should not be assumed to be a hard coded
2226 * number.
2227 * o In an effort to cope with a change from 32 to 64 bits,
2228 * there are also toc entries that are specified to be
2229 * either 32 or 64 bits:
2230 * lwz r4,[toc32].GS.0.static_int(rtoc)
2231 * lwz r4,[toc64].GS.0.static_int(rtoc)
2232 * These demand toc entries of the specified size, and the
2233 * instruction probably requires it.
2234 */
252b5132
RH
2235
2236 int valid_toc;
2237 enum toc_size_qualifier toc_kind;
2238 bfd_reloc_code_real_type toc_reloc;
2239
99a814a1
AM
2240 /* Go parse off the [tocXX] part. */
2241 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2242
81d4177b 2243 if (!valid_toc)
252b5132 2244 {
99a814a1
AM
2245 /* Note: message has already been issued.
2246 FIXME: what sort of recovery should we do?
2247 demand_rest_of_line (); return; ? */
252b5132
RH
2248 }
2249
99a814a1
AM
2250 /* Now get the symbol following the ']'. */
2251 expression (&ex);
252b5132
RH
2252
2253 switch (toc_kind)
2254 {
2255 case default_toc:
99a814a1
AM
2256 /* In this case, we may not have seen the symbol yet,
2257 since it is allowed to appear on a .extern or .globl
2258 or just be a label in the .data section. */
252b5132
RH
2259 toc_reloc = BFD_RELOC_PPC_TOC16;
2260 break;
2261 case data_in_toc:
99a814a1
AM
2262 /* 1. The symbol must be defined and either in the toc
2263 section, or a global.
2264 2. The reloc generated must have the TOCDEFN flag set
2265 in upper bit mess of the reloc type.
2266 FIXME: It's a little confusing what the tocv
2267 qualifier can be used for. At the very least, I've
2268 seen three uses, only one of which I'm sure I can
2269 explain. */
81d4177b
KH
2270 if (ex.X_op == O_symbol)
2271 {
252b5132 2272 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT
2273 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2274 != tocdata_section)
252b5132 2275 {
99a814a1 2276 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH
2277 }
2278 }
2279
2280 toc_reloc = BFD_RELOC_PPC_TOC16;
2281 break;
2282 case must_be_32:
99a814a1
AM
2283 /* FIXME: these next two specifically specify 32/64 bit
2284 toc entries. We don't support them today. Is this
2285 the right way to say that? */
252b5132
RH
2286 toc_reloc = BFD_RELOC_UNUSED;
2287 as_bad (_("Unimplemented toc32 expression modifier"));
2288 break;
2289 case must_be_64:
99a814a1 2290 /* FIXME: see above. */
252b5132
RH
2291 toc_reloc = BFD_RELOC_UNUSED;
2292 as_bad (_("Unimplemented toc64 expression modifier"));
2293 break;
2294 default:
bc805888 2295 fprintf (stderr,
99a814a1
AM
2296 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2297 toc_kind);
bc805888 2298 abort ();
252b5132
RH
2299 break;
2300 }
2301
2302 /* We need to generate a fixup for this expression. */
2303 if (fc >= MAX_INSN_FIXUPS)
2304 as_fatal (_("too many fixups"));
2305
2306 fixups[fc].reloc = toc_reloc;
2307 fixups[fc].exp = ex;
2308 fixups[fc].opindex = *opindex_ptr;
2309 ++fc;
2310
99a814a1
AM
2311 /* Ok. We've set up the fixup for the instruction. Now make it
2312 look like the constant 0 was found here. */
252b5132
RH
2313 ex.X_unsigned = 1;
2314 ex.X_op = O_constant;
2315 ex.X_add_number = 0;
2316 ex.X_add_symbol = NULL;
2317 ex.X_op_symbol = NULL;
2318 }
2319
2320 else
2321#endif /* TE_PE */
2322 {
2323 if (! register_name (&ex))
2324 {
2325 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2326 cr_operand = TRUE;
252b5132 2327 expression (&ex);
b34976b6 2328 cr_operand = FALSE;
252b5132
RH
2329 }
2330 }
2331
2332 str = input_line_pointer;
2333 input_line_pointer = hold;
2334
2335 if (ex.X_op == O_illegal)
2336 as_bad (_("illegal operand"));
2337 else if (ex.X_op == O_absent)
2338 as_bad (_("missing operand"));
2339 else if (ex.X_op == O_register)
2340 {
2341 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2342 (char *) NULL, 0);
2343 }
2344 else if (ex.X_op == O_constant)
2345 {
2346#ifdef OBJ_ELF
81d4177b 2347 /* Allow @HA, @L, @H on constants. */
252b5132
RH
2348 char *orig_str = str;
2349
2350 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2351 switch (reloc)
2352 {
2353 default:
2354 str = orig_str;
2355 break;
2356
2357 case BFD_RELOC_LO16:
2358 /* X_unsigned is the default, so if the user has done
0baf16f2
AM
2359 something which cleared it, we always produce a
2360 signed value. */
2361 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH
2362 ex.X_add_number &= 0xffff;
2363 else
0baf16f2 2364 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH
2365 break;
2366
2367 case BFD_RELOC_HI16:
0baf16f2
AM
2368 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2369 ex.X_add_number = PPC_HI (ex.X_add_number);
2370 else
2371 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH
2372 break;
2373
2374 case BFD_RELOC_HI16_S:
0baf16f2
AM
2375 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2376 ex.X_add_number = PPC_HA (ex.X_add_number);
2377 else
2378 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2379 break;
2380
0baf16f2
AM
2381 case BFD_RELOC_PPC64_HIGHER:
2382 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2383 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2384 else
2385 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2386 break;
2387
2388 case BFD_RELOC_PPC64_HIGHER_S:
2389 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2390 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2391 else
2392 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2393 break;
0baf16f2
AM
2394
2395 case BFD_RELOC_PPC64_HIGHEST:
2396 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2397 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2398 else
2399 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2400 break;
2401
2402 case BFD_RELOC_PPC64_HIGHEST_S:
2403 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2404 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2405 else
2406 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2407 break;
252b5132 2408 }
0baf16f2 2409#endif /* OBJ_ELF */
252b5132
RH
2410 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2411 (char *) NULL, 0);
2412 }
2413#ifdef OBJ_ELF
2414 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2415 {
cdba85ec
AM
2416 /* Some TLS tweaks. */
2417 switch (reloc)
2418 {
2419 default:
2420 break;
2421 case BFD_RELOC_PPC_TLS:
2422 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2423 (char *) NULL, 0);
2424 break;
2425 /* We'll only use the 32 (or 64) bit form of these relocations
2426 in constants. Instructions get the 16 bit form. */
2427 case BFD_RELOC_PPC_DTPREL:
2428 reloc = BFD_RELOC_PPC_DTPREL16;
2429 break;
2430 case BFD_RELOC_PPC_TPREL:
2431 reloc = BFD_RELOC_PPC_TPREL16;
2432 break;
2433 }
2434
99a814a1
AM
2435 /* For the absolute forms of branches, convert the PC
2436 relative form back into the absolute. */
252b5132
RH
2437 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2438 {
2439 switch (reloc)
2440 {
2441 case BFD_RELOC_PPC_B26:
2442 reloc = BFD_RELOC_PPC_BA26;
2443 break;
2444 case BFD_RELOC_PPC_B16:
2445 reloc = BFD_RELOC_PPC_BA16;
2446 break;
2447 case BFD_RELOC_PPC_B16_BRTAKEN:
2448 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2449 break;
2450 case BFD_RELOC_PPC_B16_BRNTAKEN:
2451 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2452 break;
2453 default:
2454 break;
2455 }
2456 }
2457
2b3c4602 2458 if (ppc_obj64
adadcc0c 2459 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM
2460 {
2461 switch (reloc)
2462 {
2463 case BFD_RELOC_16:
2464 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2465 break;
2466 case BFD_RELOC_LO16:
2467 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2468 break;
2469 case BFD_RELOC_16_GOTOFF:
2470 reloc = BFD_RELOC_PPC64_GOT16_DS;
2471 break;
2472 case BFD_RELOC_LO16_GOTOFF:
2473 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2474 break;
2475 case BFD_RELOC_LO16_PLTOFF:
2476 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2477 break;
1cfc59d5 2478 case BFD_RELOC_16_BASEREL:
0baf16f2
AM
2479 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2480 break;
2481 case BFD_RELOC_LO16_BASEREL:
2482 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2483 break;
2484 case BFD_RELOC_PPC_TOC16:
2485 reloc = BFD_RELOC_PPC64_TOC16_DS;
2486 break;
2487 case BFD_RELOC_PPC64_TOC16_LO:
2488 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2489 break;
2490 case BFD_RELOC_PPC64_PLTGOT16:
2491 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2492 break;
2493 case BFD_RELOC_PPC64_PLTGOT16_LO:
2494 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2495 break;
cdba85ec
AM
2496 case BFD_RELOC_PPC_DTPREL16:
2497 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2498 break;
2499 case BFD_RELOC_PPC_DTPREL16_LO:
2500 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2501 break;
2502 case BFD_RELOC_PPC_TPREL16:
2503 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2504 break;
2505 case BFD_RELOC_PPC_TPREL16_LO:
2506 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2507 break;
2508 case BFD_RELOC_PPC_GOT_DTPREL16:
2509 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2510 case BFD_RELOC_PPC_GOT_TPREL16:
2511 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2512 break;
0baf16f2
AM
2513 default:
2514 as_bad (_("unsupported relocation for DS offset field"));
2515 break;
2516 }
2517 }
2518
252b5132
RH
2519 /* We need to generate a fixup for this expression. */
2520 if (fc >= MAX_INSN_FIXUPS)
2521 as_fatal (_("too many fixups"));
2522 fixups[fc].exp = ex;
2523 fixups[fc].opindex = 0;
2524 fixups[fc].reloc = reloc;
2525 ++fc;
2526 }
2527#endif /* OBJ_ELF */
2528
2529 else
2530 {
2531 /* We need to generate a fixup for this expression. */
2532 if (fc >= MAX_INSN_FIXUPS)
2533 as_fatal (_("too many fixups"));
2534 fixups[fc].exp = ex;
2535 fixups[fc].opindex = *opindex_ptr;
2536 fixups[fc].reloc = BFD_RELOC_UNUSED;
2537 ++fc;
2538 }
2539
2540 if (need_paren)
2541 {
2542 endc = ')';
2543 need_paren = 0;
2544 }
2545 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2546 {
2547 endc = '(';
2548 need_paren = 1;
2549 }
2550 else
2551 endc = ',';
2552
2553 /* The call to expression should have advanced str past any
2554 whitespace. */
2555 if (*str != endc
2556 && (endc != ',' || *str != '\0'))
2557 {
2558 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2559 break;
2560 }
2561
2562 if (*str != '\0')
2563 ++str;
2564 }
2565
3882b010 2566 while (ISSPACE (*str))
252b5132
RH
2567 ++str;
2568
2569 if (*str != '\0')
2570 as_bad (_("junk at end of line: `%s'"), str);
2571
dc1d03fc 2572#ifdef OBJ_ELF
6a0c61b7
EZ
2573 /* Do we need/want a APUinfo section? */
2574 if (ppc_cpu & (PPC_OPCODE_SPE
2575 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2576 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2577 | PPC_OPCODE_RFMCI))
2578 {
2579 /* These are all version "1". */
2580 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2581 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2582 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2583 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2584 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2585 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2586 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2587 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2588 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2589 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2590 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2591 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2592 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2593 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2594 }
dc1d03fc 2595#endif
6a0c61b7 2596
252b5132
RH
2597 /* Write out the instruction. */
2598 f = frag_more (4);
2599 md_number_to_chars (f, insn, 4);
2600
5d6f4f16
GK
2601#ifdef OBJ_ELF
2602 dwarf2_emit_insn (4);
2603#endif
2604
252b5132
RH
2605 /* Create any fixups. At this point we do not use a
2606 bfd_reloc_code_real_type, but instead just use the
2607 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2608 handle fixups for any operand type, although that is admittedly
2609 not a very exciting feature. We pick a BFD reloc type in
94f592af 2610 md_apply_fix3. */
252b5132
RH
2611 for (i = 0; i < fc; i++)
2612 {
2613 const struct powerpc_operand *operand;
2614
2615 operand = &powerpc_operands[fixups[i].opindex];
2616 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2617 {
99a814a1 2618 reloc_howto_type *reloc_howto;
252b5132
RH
2619 int size;
2620 int offset;
2621 fixS *fixP;
2622
99a814a1 2623 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH
2624 if (!reloc_howto)
2625 abort ();
2626
2627 size = bfd_get_reloc_size (reloc_howto);
2628 offset = target_big_endian ? (4 - size) : 0;
2629
2630 if (size < 1 || size > 4)
bc805888 2631 abort ();
252b5132 2632
99a814a1
AM
2633 fixP = fix_new_exp (frag_now,
2634 f - frag_now->fr_literal + offset,
2635 size,
2636 &fixups[i].exp,
2637 reloc_howto->pc_relative,
252b5132
RH
2638 fixups[i].reloc);
2639
2640 /* Turn off complaints that the addend is too large for things like
2641 foo+100000@ha. */
2642 switch (fixups[i].reloc)
2643 {
2644 case BFD_RELOC_16_GOTOFF:
2645 case BFD_RELOC_PPC_TOC16:
2646 case BFD_RELOC_LO16:
2647 case BFD_RELOC_HI16:
2648 case BFD_RELOC_HI16_S:
0baf16f2 2649#ifdef OBJ_ELF
0baf16f2
AM
2650 case BFD_RELOC_PPC64_HIGHER:
2651 case BFD_RELOC_PPC64_HIGHER_S:
2652 case BFD_RELOC_PPC64_HIGHEST:
2653 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2654#endif
252b5132
RH
2655 fixP->fx_no_overflow = 1;
2656 break;
2657 default:
2658 break;
2659 }
2660 }
2661 else
99a814a1
AM
2662 fix_new_exp (frag_now,
2663 f - frag_now->fr_literal,
2664 4,
252b5132
RH
2665 &fixups[i].exp,
2666 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2667 ((bfd_reloc_code_real_type)
99a814a1 2668 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH
2669 }
2670}
2671
2672/* Handle a macro. Gather all the operands, transform them as
2673 described by the macro, and call md_assemble recursively. All the
2674 operands are separated by commas; we don't accept parentheses
2675 around operands here. */
2676
2677static void
2678ppc_macro (str, macro)
2679 char *str;
2680 const struct powerpc_macro *macro;
2681{
2682 char *operands[10];
2683 unsigned int count;
2684 char *s;
2685 unsigned int len;
2686 const char *format;
2687 int arg;
2688 char *send;
2689 char *complete;
2690
2691 /* Gather the users operands into the operands array. */
2692 count = 0;
2693 s = str;
2694 while (1)
2695 {
2696 if (count >= sizeof operands / sizeof operands[0])
2697 break;
2698 operands[count++] = s;
2699 s = strchr (s, ',');
2700 if (s == (char *) NULL)
2701 break;
2702 *s++ = '\0';
81d4177b 2703 }
252b5132
RH
2704
2705 if (count != macro->operands)
2706 {
2707 as_bad (_("wrong number of operands"));
2708 return;
2709 }
2710
2711 /* Work out how large the string must be (the size is unbounded
2712 because it includes user input). */
2713 len = 0;
2714 format = macro->format;
2715 while (*format != '\0')
2716 {
2717 if (*format != '%')
2718 {
2719 ++len;
2720 ++format;
2721 }
2722 else
2723 {
2724 arg = strtol (format + 1, &send, 10);
2725 know (send != format && arg >= 0 && arg < count);
2726 len += strlen (operands[arg]);
2727 format = send;
2728 }
2729 }
2730
2731 /* Put the string together. */
2732 complete = s = (char *) alloca (len + 1);
2733 format = macro->format;
2734 while (*format != '\0')
2735 {
2736 if (*format != '%')
2737 *s++ = *format++;
2738 else
2739 {
2740 arg = strtol (format + 1, &send, 10);
2741 strcpy (s, operands[arg]);
2742 s += strlen (s);
2743 format = send;
2744 }
2745 }
2746 *s = '\0';
2747
2748 /* Assemble the constructed instruction. */
2749 md_assemble (complete);
81d4177b 2750}
252b5132
RH
2751\f
2752#ifdef OBJ_ELF
99a814a1 2753/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH
2754
2755int
2756ppc_section_letter (letter, ptr_msg)
2757 int letter;
2758 char **ptr_msg;
2759{
2760 if (letter == 'e')
2761 return SHF_EXCLUDE;
2762
13ae64f3 2763 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2764 return -1;
252b5132
RH
2765}
2766
2767int
9de8d8f1
RH
2768ppc_section_word (str, len)
2769 char *str;
2770 size_t len;
252b5132 2771{
9de8d8f1
RH
2772 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2773 return SHF_EXCLUDE;
252b5132 2774
9de8d8f1 2775 return -1;
252b5132
RH
2776}
2777
2778int
9de8d8f1
RH
2779ppc_section_type (str, len)
2780 char *str;
2781 size_t len;
252b5132 2782{
9de8d8f1
RH
2783 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2784 return SHT_ORDERED;
252b5132 2785
9de8d8f1 2786 return -1;
252b5132
RH
2787}
2788
2789int
2790ppc_section_flags (flags, attr, type)
2791 int flags;
2792 int attr;
2793 int type;
2794{
2795 if (type == SHT_ORDERED)
2796 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2797
2798 if (attr & SHF_EXCLUDE)
2799 flags |= SEC_EXCLUDE;
2800
2801 return flags;
2802}
2803#endif /* OBJ_ELF */
2804
2805\f
2806/* Pseudo-op handling. */
2807
2808/* The .byte pseudo-op. This is similar to the normal .byte
2809 pseudo-op, but it can also take a single ASCII string. */
2810
2811static void
2812ppc_byte (ignore)
92161534 2813 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
2814{
2815 if (*input_line_pointer != '\"')
2816 {
2817 cons (1);
2818 return;
2819 }
2820
2821 /* Gather characters. A real double quote is doubled. Unusual
2822 characters are not permitted. */
2823 ++input_line_pointer;
2824 while (1)
2825 {
2826 char c;
2827
2828 c = *input_line_pointer++;
2829
2830 if (c == '\"')
2831 {
2832 if (*input_line_pointer != '\"')
2833 break;
2834 ++input_line_pointer;
2835 }
2836
2837 FRAG_APPEND_1_CHAR (c);
2838 }
2839
2840 demand_empty_rest_of_line ();
2841}
2842\f
2843#ifdef OBJ_XCOFF
2844
2845/* XCOFF specific pseudo-op handling. */
2846
2847/* This is set if we are creating a .stabx symbol, since we don't want
2848 to handle symbol suffixes for such symbols. */
b34976b6 2849static bfd_boolean ppc_stab_symbol;
252b5132
RH
2850
2851/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2852 symbols in the .bss segment as though they were local common
1ad63b2f
TR
2853 symbols, and uses a different smclas. The native Aix 4.3.3 assember
2854 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH
2855
2856static void
2857ppc_comm (lcomm)
2858 int lcomm;
2859{
2860 asection *current_seg = now_seg;
2861 subsegT current_subseg = now_subseg;
2862 char *name;
2863 char endc;
2864 char *end_name;
2865 offsetT size;
2866 offsetT align;
2867 symbolS *lcomm_sym = NULL;
2868 symbolS *sym;
2869 char *pfrag;
2870
2871 name = input_line_pointer;
2872 endc = get_symbol_end ();
2873 end_name = input_line_pointer;
2874 *end_name = endc;
2875
2876 if (*input_line_pointer != ',')
2877 {
2878 as_bad (_("missing size"));
2879 ignore_rest_of_line ();
2880 return;
2881 }
2882 ++input_line_pointer;
2883
2884 size = get_absolute_expression ();
2885 if (size < 0)
2886 {
2887 as_bad (_("negative size"));
2888 ignore_rest_of_line ();
2889 return;
2890 }
2891
2892 if (! lcomm)
2893 {
2894 /* The third argument to .comm is the alignment. */
2895 if (*input_line_pointer != ',')
1ad63b2f 2896 align = 2;
252b5132
RH
2897 else
2898 {
2899 ++input_line_pointer;
2900 align = get_absolute_expression ();
2901 if (align <= 0)
2902 {
2903 as_warn (_("ignoring bad alignment"));
1ad63b2f 2904 align = 2;
252b5132
RH
2905 }
2906 }
2907 }
2908 else
2909 {
2910 char *lcomm_name;
2911 char lcomm_endc;
2912
1ad63b2f 2913 if (size <= 4)
252b5132
RH
2914 align = 2;
2915 else
2916 align = 3;
2917
2918 /* The third argument to .lcomm appears to be the real local
2919 common symbol to create. References to the symbol named in
2920 the first argument are turned into references to the third
2921 argument. */
2922 if (*input_line_pointer != ',')
2923 {
2924 as_bad (_("missing real symbol name"));
2925 ignore_rest_of_line ();
2926 return;
2927 }
2928 ++input_line_pointer;
2929
2930 lcomm_name = input_line_pointer;
2931 lcomm_endc = get_symbol_end ();
81d4177b 2932
252b5132
RH
2933 lcomm_sym = symbol_find_or_make (lcomm_name);
2934
2935 *input_line_pointer = lcomm_endc;
2936 }
2937
2938 *end_name = '\0';
2939 sym = symbol_find_or_make (name);
2940 *end_name = endc;
2941
2942 if (S_IS_DEFINED (sym)
2943 || S_GET_VALUE (sym) != 0)
2944 {
2945 as_bad (_("attempt to redefine symbol"));
2946 ignore_rest_of_line ();
2947 return;
2948 }
81d4177b 2949
252b5132 2950 record_alignment (bss_section, align);
81d4177b 2951
252b5132
RH
2952 if (! lcomm
2953 || ! S_IS_DEFINED (lcomm_sym))
2954 {
2955 symbolS *def_sym;
2956 offsetT def_size;
2957
2958 if (! lcomm)
2959 {
2960 def_sym = sym;
2961 def_size = size;
2962 S_SET_EXTERNAL (sym);
2963 }
2964 else
2965 {
809ffe0d 2966 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH
2967 def_sym = lcomm_sym;
2968 def_size = 0;
2969 }
2970
2971 subseg_set (bss_section, 1);
2972 frag_align (align, 0, 0);
81d4177b 2973
809ffe0d 2974 symbol_set_frag (def_sym, frag_now);
252b5132
RH
2975 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2976 def_size, (char *) NULL);
2977 *pfrag = 0;
2978 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 2979 symbol_get_tc (def_sym)->align = align;
252b5132
RH
2980 }
2981 else if (lcomm)
2982 {
2983 /* Align the size of lcomm_sym. */
809ffe0d
ILT
2984 symbol_get_frag (lcomm_sym)->fr_offset =
2985 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 2986 &~ ((1 << align) - 1));
809ffe0d
ILT
2987 if (align > symbol_get_tc (lcomm_sym)->align)
2988 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH
2989 }
2990
2991 if (lcomm)
2992 {
2993 /* Make sym an offset from lcomm_sym. */
2994 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT
2995 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
2996 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
2997 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH
2998 }
2999
3000 subseg_set (current_seg, current_subseg);
3001
3002 demand_empty_rest_of_line ();
3003}
3004
3005/* The .csect pseudo-op. This switches us into a different
3006 subsegment. The first argument is a symbol whose value is the
3007 start of the .csect. In COFF, csect symbols get special aux
3008 entries defined by the x_csect field of union internal_auxent. The
3009 optional second argument is the alignment (the default is 2). */
3010
3011static void
3012ppc_csect (ignore)
5480ccf3 3013 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3014{
3015 char *name;
3016 char endc;
3017 symbolS *sym;
931e13a6 3018 offsetT align;
252b5132
RH
3019
3020 name = input_line_pointer;
3021 endc = get_symbol_end ();
81d4177b 3022
252b5132
RH
3023 sym = symbol_find_or_make (name);
3024
3025 *input_line_pointer = endc;
3026
3027 if (S_GET_NAME (sym)[0] == '\0')
3028 {
3029 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3030 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH
3031 }
3032
931e13a6 3033 align = 2;
252b5132
RH
3034 if (*input_line_pointer == ',')
3035 {
3036 ++input_line_pointer;
931e13a6 3037 align = get_absolute_expression ();
252b5132
RH
3038 }
3039
931e13a6
AM
3040 ppc_change_csect (sym, align);
3041
252b5132
RH
3042 demand_empty_rest_of_line ();
3043}
3044
3045/* Change to a different csect. */
3046
3047static void
931e13a6 3048ppc_change_csect (sym, align)
252b5132 3049 symbolS *sym;
931e13a6 3050 offsetT align;
252b5132
RH
3051{
3052 if (S_IS_DEFINED (sym))
809ffe0d 3053 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH
3054 else
3055 {
3056 symbolS **list_ptr;
3057 int after_toc;
3058 int hold_chunksize;
3059 symbolS *list;
931e13a6
AM
3060 int is_code;
3061 segT sec;
252b5132
RH
3062
3063 /* This is a new csect. We need to look at the symbol class to
3064 figure out whether it should go in the text section or the
3065 data section. */
3066 after_toc = 0;
931e13a6 3067 is_code = 0;
809ffe0d 3068 switch (symbol_get_tc (sym)->class)
252b5132
RH
3069 {
3070 case XMC_PR:
3071 case XMC_RO:
3072 case XMC_DB:
3073 case XMC_GL:
3074 case XMC_XO:
3075 case XMC_SV:
3076 case XMC_TI:
3077 case XMC_TB:
3078 S_SET_SEGMENT (sym, text_section);
809ffe0d 3079 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH
3080 ++ppc_text_subsegment;
3081 list_ptr = &ppc_text_csects;
931e13a6 3082 is_code = 1;
252b5132
RH
3083 break;
3084 case XMC_RW:
3085 case XMC_TC0:
3086 case XMC_TC:
3087 case XMC_DS:
3088 case XMC_UA:
3089 case XMC_BS:
3090 case XMC_UC:
3091 if (ppc_toc_csect != NULL
809ffe0d
ILT
3092 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3093 == ppc_data_subsegment))
252b5132
RH
3094 after_toc = 1;
3095 S_SET_SEGMENT (sym, data_section);
809ffe0d 3096 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH
3097 ++ppc_data_subsegment;
3098 list_ptr = &ppc_data_csects;
3099 break;
3100 default:
3101 abort ();
3102 }
3103
3104 /* We set the obstack chunk size to a small value before
99a814a1
AM
3105 changing subsegments, so that we don't use a lot of memory
3106 space for what may be a small section. */
252b5132
RH
3107 hold_chunksize = chunksize;
3108 chunksize = 64;
3109
931e13a6
AM
3110 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3111 symbol_get_tc (sym)->subseg);
252b5132
RH
3112
3113 chunksize = hold_chunksize;
3114
3115 if (after_toc)
3116 ppc_after_toc_frag = frag_now;
3117
931e13a6
AM
3118 record_alignment (sec, align);
3119 if (is_code)
3120 frag_align_code (align, 0);
3121 else
3122 frag_align (align, 0, 0);
3123
809ffe0d 3124 symbol_set_frag (sym, frag_now);
252b5132
RH
3125 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3126
931e13a6 3127 symbol_get_tc (sym)->align = align;
809ffe0d
ILT
3128 symbol_get_tc (sym)->output = 1;
3129 symbol_get_tc (sym)->within = sym;
81d4177b 3130
252b5132 3131 for (list = *list_ptr;
809ffe0d
ILT
3132 symbol_get_tc (list)->next != (symbolS *) NULL;
3133 list = symbol_get_tc (list)->next)
252b5132 3134 ;
809ffe0d 3135 symbol_get_tc (list)->next = sym;
81d4177b 3136
252b5132 3137 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3138 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3139 &symbol_lastP);
252b5132
RH
3140 }
3141
3142 ppc_current_csect = sym;
3143}
3144
3145/* This function handles the .text and .data pseudo-ops. These
3146 pseudo-ops aren't really used by XCOFF; we implement them for the
3147 convenience of people who aren't used to XCOFF. */
3148
3149static void
3150ppc_section (type)
3151 int type;
3152{
3153 const char *name;
3154 symbolS *sym;
3155
3156 if (type == 't')
3157 name = ".text[PR]";
3158 else if (type == 'd')
3159 name = ".data[RW]";
3160 else
3161 abort ();
3162
3163 sym = symbol_find_or_make (name);
3164
931e13a6 3165 ppc_change_csect (sym, 2);
252b5132
RH
3166
3167 demand_empty_rest_of_line ();
3168}
3169
3170/* This function handles the .section pseudo-op. This is mostly to
3171 give an error, since XCOFF only supports .text, .data and .bss, but
3172 we do permit the user to name the text or data section. */
3173
3174static void
3175ppc_named_section (ignore)
5480ccf3 3176 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3177{
3178 char *user_name;
3179 const char *real_name;
3180 char c;
3181 symbolS *sym;
3182
3183 user_name = input_line_pointer;
3184 c = get_symbol_end ();
3185
3186 if (strcmp (user_name, ".text") == 0)
3187 real_name = ".text[PR]";
3188 else if (strcmp (user_name, ".data") == 0)
3189 real_name = ".data[RW]";
3190 else
3191 {
3192 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3193 *input_line_pointer = c;
3194 ignore_rest_of_line ();
3195 return;
3196 }
3197
3198 *input_line_pointer = c;
3199
3200 sym = symbol_find_or_make (real_name);
3201
931e13a6 3202 ppc_change_csect (sym, 2);
252b5132
RH
3203
3204 demand_empty_rest_of_line ();
3205}
3206
3207/* The .extern pseudo-op. We create an undefined symbol. */
3208
3209static void
3210ppc_extern (ignore)
5480ccf3 3211 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3212{
3213 char *name;
3214 char endc;
3215
3216 name = input_line_pointer;
3217 endc = get_symbol_end ();
3218
3219 (void) symbol_find_or_make (name);
3220
3221 *input_line_pointer = endc;
3222
3223 demand_empty_rest_of_line ();
3224}
3225
3226/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3227
3228static void
3229ppc_lglobl (ignore)
5480ccf3 3230 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3231{
3232 char *name;
3233 char endc;
3234 symbolS *sym;
3235
3236 name = input_line_pointer;
3237 endc = get_symbol_end ();
3238
3239 sym = symbol_find_or_make (name);
3240
3241 *input_line_pointer = endc;
3242
809ffe0d 3243 symbol_get_tc (sym)->output = 1;
252b5132
RH
3244
3245 demand_empty_rest_of_line ();
3246}
3247
3248/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3249 although I don't know why it bothers. */
3250
3251static void
3252ppc_rename (ignore)
5480ccf3 3253 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3254{
3255 char *name;
3256 char endc;
3257 symbolS *sym;
3258 int len;
3259
3260 name = input_line_pointer;
3261 endc = get_symbol_end ();
3262
3263 sym = symbol_find_or_make (name);
3264
3265 *input_line_pointer = endc;
3266
3267 if (*input_line_pointer != ',')
3268 {
3269 as_bad (_("missing rename string"));
3270 ignore_rest_of_line ();
3271 return;
3272 }
3273 ++input_line_pointer;
3274
809ffe0d 3275 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH
3276
3277 demand_empty_rest_of_line ();
3278}
3279
3280/* The .stabx pseudo-op. This is similar to a normal .stabs
3281 pseudo-op, but slightly different. A sample is
3282 .stabx "main:F-1",.main,142,0
3283 The first argument is the symbol name to create. The second is the
3284 value, and the third is the storage class. The fourth seems to be
3285 always zero, and I am assuming it is the type. */
3286
3287static void
3288ppc_stabx (ignore)
5480ccf3 3289 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3290{
3291 char *name;
3292 int len;
3293 symbolS *sym;
3294 expressionS exp;
3295
3296 name = demand_copy_C_string (&len);
3297
3298 if (*input_line_pointer != ',')
3299 {
3300 as_bad (_("missing value"));
3301 return;
3302 }
3303 ++input_line_pointer;
3304
b34976b6 3305 ppc_stab_symbol = TRUE;
252b5132 3306 sym = symbol_make (name);
b34976b6 3307 ppc_stab_symbol = FALSE;
252b5132 3308
809ffe0d 3309 symbol_get_tc (sym)->real_name = name;
252b5132
RH
3310
3311 (void) expression (&exp);
3312
3313 switch (exp.X_op)
3314 {
3315 case O_illegal:
3316 case O_absent:
3317 case O_big:
3318 as_bad (_("illegal .stabx expression; zero assumed"));
3319 exp.X_add_number = 0;
3320 /* Fall through. */
3321 case O_constant:
3322 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3323 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH
3324 break;
3325
3326 case O_symbol:
3327 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3328 symbol_set_value_expression (sym, &exp);
252b5132
RH
3329 else
3330 {
3331 S_SET_VALUE (sym,
3332 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3333 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH
3334 }
3335 break;
3336
3337 default:
3338 /* The value is some complex expression. This will probably
99a814a1
AM
3339 fail at some later point, but this is probably the right
3340 thing to do here. */
809ffe0d 3341 symbol_set_value_expression (sym, &exp);
252b5132
RH
3342 break;
3343 }
3344
3345 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3346 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3347
3348 if (*input_line_pointer != ',')
3349 {
3350 as_bad (_("missing class"));
3351 return;
3352 }
3353 ++input_line_pointer;
3354
3355 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3356
3357 if (*input_line_pointer != ',')
3358 {
3359 as_bad (_("missing type"));
3360 return;
3361 }
3362 ++input_line_pointer;
3363
3364 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3365
809ffe0d 3366 symbol_get_tc (sym)->output = 1;
252b5132 3367
6877bb43 3368 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3369
809ffe0d 3370 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3371
41ea10b1 3372 /* In this case :
99a814a1 3373
41ea10b1
TR
3374 .bs name
3375 .stabx "z",arrays_,133,0
3376 .es
99a814a1 3377
41ea10b1 3378 .comm arrays_,13768,3
99a814a1 3379
41ea10b1
TR
3380 resolve_symbol_value will copy the exp's "within" into sym's when the
3381 offset is 0. Since this seems to be corner case problem,
3382 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3383 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM
3384
3385 if (exp.X_op == O_symbol)
41ea10b1
TR
3386 {
3387 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3388 }
6877bb43 3389 }
99a814a1 3390
252b5132
RH
3391 if (exp.X_op != O_symbol
3392 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3393 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3394 ppc_frob_label (sym);
3395 else
3396 {
3397 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3398 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3399 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3400 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
3401 }
3402
3403 demand_empty_rest_of_line ();
3404}
3405
3406/* The .function pseudo-op. This takes several arguments. The first
3407 argument seems to be the external name of the symbol. The second
3408 argment seems to be the label for the start of the function. gcc
3409 uses the same name for both. I have no idea what the third and
3410 fourth arguments are meant to be. The optional fifth argument is
3411 an expression for the size of the function. In COFF this symbol
3412 gets an aux entry like that used for a csect. */
3413
3414static void
3415ppc_function (ignore)
5480ccf3 3416 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3417{
3418 char *name;
3419 char endc;
3420 char *s;
3421 symbolS *ext_sym;
3422 symbolS *lab_sym;
3423
3424 name = input_line_pointer;
3425 endc = get_symbol_end ();
3426
3427 /* Ignore any [PR] suffix. */
3428 name = ppc_canonicalize_symbol_name (name);
3429 s = strchr (name, '[');
3430 if (s != (char *) NULL
3431 && strcmp (s + 1, "PR]") == 0)
3432 *s = '\0';
3433
3434 ext_sym = symbol_find_or_make (name);
3435
3436 *input_line_pointer = endc;
3437
3438 if (*input_line_pointer != ',')
3439 {
3440 as_bad (_("missing symbol name"));
3441 ignore_rest_of_line ();
3442 return;
3443 }
3444 ++input_line_pointer;
3445
3446 name = input_line_pointer;
3447 endc = get_symbol_end ();
3448
3449 lab_sym = symbol_find_or_make (name);
3450
3451 *input_line_pointer = endc;
3452
3453 if (ext_sym != lab_sym)
3454 {
809ffe0d
ILT
3455 expressionS exp;
3456
3457 exp.X_op = O_symbol;
3458 exp.X_add_symbol = lab_sym;
3459 exp.X_op_symbol = NULL;
3460 exp.X_add_number = 0;
3461 exp.X_unsigned = 0;
3462 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH
3463 }
3464
809ffe0d
ILT
3465 if (symbol_get_tc (ext_sym)->class == -1)
3466 symbol_get_tc (ext_sym)->class = XMC_PR;
3467 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH
3468
3469 if (*input_line_pointer == ',')
3470 {
3471 expressionS ignore;
3472
3473 /* Ignore the third argument. */
3474 ++input_line_pointer;
3475 expression (&ignore);
3476 if (*input_line_pointer == ',')
3477 {
3478 /* Ignore the fourth argument. */
3479 ++input_line_pointer;
3480 expression (&ignore);
3481 if (*input_line_pointer == ',')
3482 {
3483 /* The fifth argument is the function size. */
3484 ++input_line_pointer;
809ffe0d
ILT
3485 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3486 absolute_section,
3487 (valueT) 0,
3488 &zero_address_frag);
3489 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH
3490 }
3491 }
3492 }
3493
3494 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3495 SF_SET_FUNCTION (ext_sym);
3496 SF_SET_PROCESS (ext_sym);
3497 coff_add_linesym (ext_sym);
3498
3499 demand_empty_rest_of_line ();
3500}
3501
3502/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR
3503 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3504 with the correct line number */
5d6255fe 3505
8642cce8 3506static symbolS *saved_bi_sym = 0;
252b5132
RH
3507
3508static void
3509ppc_bf (ignore)
5480ccf3 3510 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3511{
3512 symbolS *sym;
3513
3514 sym = symbol_make (".bf");
3515 S_SET_SEGMENT (sym, text_section);
809ffe0d 3516 symbol_set_frag (sym, frag_now);
252b5132
RH
3517 S_SET_VALUE (sym, frag_now_fix ());
3518 S_SET_STORAGE_CLASS (sym, C_FCN);
3519
3520 coff_line_base = get_absolute_expression ();
3521
3522 S_SET_NUMBER_AUXILIARY (sym, 1);
3523 SA_SET_SYM_LNNO (sym, coff_line_base);
3524
8642cce8 3525 /* Line number for bi. */
5d6255fe 3526 if (saved_bi_sym)
8642cce8
TR
3527 {
3528 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3529 saved_bi_sym = 0;
3530 }
5d6255fe 3531
8642cce8 3532
809ffe0d 3533 symbol_get_tc (sym)->output = 1;
252b5132
RH
3534
3535 ppc_frob_label (sym);
3536
3537 demand_empty_rest_of_line ();
3538}
3539
3540/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3541 ".ef", except that the line number is absolute, not relative to the
3542 most recent ".bf" symbol. */
3543
3544static void
3545ppc_ef (ignore)
5480ccf3 3546 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3547{
3548 symbolS *sym;
3549
3550 sym = symbol_make (".ef");
3551 S_SET_SEGMENT (sym, text_section);
809ffe0d 3552 symbol_set_frag (sym, frag_now);
252b5132
RH
3553 S_SET_VALUE (sym, frag_now_fix ());
3554 S_SET_STORAGE_CLASS (sym, C_FCN);
3555 S_SET_NUMBER_AUXILIARY (sym, 1);
3556 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3557 symbol_get_tc (sym)->output = 1;
252b5132
RH
3558
3559 ppc_frob_label (sym);
3560
3561 demand_empty_rest_of_line ();
3562}
3563
3564/* The .bi and .ei pseudo-ops. These take a string argument and
3565 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR
3566 the symbol list. The value of .bi will be know when the next .bf
3567 is encountered. */
252b5132
RH
3568
3569static void
3570ppc_biei (ei)
3571 int ei;
3572{
3573 static symbolS *last_biei;
3574
3575 char *name;
3576 int len;
3577 symbolS *sym;
3578 symbolS *look;
3579
3580 name = demand_copy_C_string (&len);
3581
3582 /* The value of these symbols is actually file offset. Here we set
3583 the value to the index into the line number entries. In
3584 ppc_frob_symbols we set the fix_line field, which will cause BFD
3585 to do the right thing. */
3586
3587 sym = symbol_make (name);
3588 /* obj-coff.c currently only handles line numbers correctly in the
3589 .text section. */
3590 S_SET_SEGMENT (sym, text_section);
3591 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3592 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3593
3594 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3595 symbol_get_tc (sym)->output = 1;
81d4177b 3596
8642cce8 3597 /* Save bi. */
5d6255fe 3598 if (ei)
8642cce8
TR
3599 saved_bi_sym = 0;
3600 else
3601 saved_bi_sym = sym;
3602
252b5132
RH
3603 for (look = last_biei ? last_biei : symbol_rootP;
3604 (look != (symbolS *) NULL
3605 && (S_GET_STORAGE_CLASS (look) == C_FILE
3606 || S_GET_STORAGE_CLASS (look) == C_BINCL
3607 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3608 look = symbol_next (look))
3609 ;
3610 if (look != (symbolS *) NULL)
3611 {
3612 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3613 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3614 last_biei = sym;
3615 }
3616
3617 demand_empty_rest_of_line ();
3618}
3619
3620/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3621 There is one argument, which is a csect symbol. The value of the
3622 .bs symbol is the index of this csect symbol. */
3623
3624static void
3625ppc_bs (ignore)
5480ccf3 3626 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3627{
3628 char *name;
3629 char endc;
3630 symbolS *csect;
3631 symbolS *sym;
3632
3633 if (ppc_current_block != NULL)
3634 as_bad (_("nested .bs blocks"));
3635
3636 name = input_line_pointer;
3637 endc = get_symbol_end ();
3638
3639 csect = symbol_find_or_make (name);
3640
3641 *input_line_pointer = endc;
3642
3643 sym = symbol_make (".bs");
3644 S_SET_SEGMENT (sym, now_seg);
3645 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT
3646 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3647 symbol_get_tc (sym)->output = 1;
252b5132 3648
809ffe0d 3649 symbol_get_tc (sym)->within = csect;
252b5132
RH
3650
3651 ppc_frob_label (sym);
3652
3653 ppc_current_block = sym;
3654
3655 demand_empty_rest_of_line ();
3656}
3657
3658/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3659
3660static void
3661ppc_es (ignore)
5480ccf3 3662 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3663{
3664 symbolS *sym;
3665
3666 if (ppc_current_block == NULL)
3667 as_bad (_(".es without preceding .bs"));
3668
3669 sym = symbol_make (".es");
3670 S_SET_SEGMENT (sym, now_seg);
3671 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT
3672 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3673 symbol_get_tc (sym)->output = 1;
252b5132
RH
3674
3675 ppc_frob_label (sym);
3676
3677 ppc_current_block = NULL;
3678
3679 demand_empty_rest_of_line ();
3680}
3681
3682/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3683 line number. */
3684
3685static void
3686ppc_bb (ignore)
5480ccf3 3687 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3688{
3689 symbolS *sym;
3690
3691 sym = symbol_make (".bb");
3692 S_SET_SEGMENT (sym, text_section);
809ffe0d 3693 symbol_set_frag (sym, frag_now);
252b5132
RH
3694 S_SET_VALUE (sym, frag_now_fix ());
3695 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3696
3697 S_SET_NUMBER_AUXILIARY (sym, 1);
3698 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3699
809ffe0d 3700 symbol_get_tc (sym)->output = 1;
252b5132
RH
3701
3702 SF_SET_PROCESS (sym);
3703
3704 ppc_frob_label (sym);
3705
3706 demand_empty_rest_of_line ();
3707}
3708
3709/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3710 line number. */
3711
3712static void
3713ppc_eb (ignore)
5480ccf3 3714 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3715{
3716 symbolS *sym;
3717
3718 sym = symbol_make (".eb");
3719 S_SET_SEGMENT (sym, text_section);
809ffe0d 3720 symbol_set_frag (sym, frag_now);
252b5132
RH
3721 S_SET_VALUE (sym, frag_now_fix ());
3722 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3723 S_SET_NUMBER_AUXILIARY (sym, 1);
3724 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3725 symbol_get_tc (sym)->output = 1;
252b5132
RH
3726
3727 SF_SET_PROCESS (sym);
3728
3729 ppc_frob_label (sym);
3730
3731 demand_empty_rest_of_line ();
3732}
3733
3734/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3735 specified name. */
3736
3737static void
3738ppc_bc (ignore)
5480ccf3 3739 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3740{
3741 char *name;
3742 int len;
3743 symbolS *sym;
3744
3745 name = demand_copy_C_string (&len);
3746 sym = symbol_make (name);
3747 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3748 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3749 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3750 S_SET_VALUE (sym, 0);
809ffe0d 3751 symbol_get_tc (sym)->output = 1;
252b5132
RH
3752
3753 ppc_frob_label (sym);
3754
3755 demand_empty_rest_of_line ();
3756}
3757
3758/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3759
3760static void
3761ppc_ec (ignore)
5480ccf3 3762 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3763{
3764 symbolS *sym;
3765
3766 sym = symbol_make (".ec");
3767 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3768 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3769 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3770 S_SET_VALUE (sym, 0);
809ffe0d 3771 symbol_get_tc (sym)->output = 1;
252b5132
RH
3772
3773 ppc_frob_label (sym);
3774
3775 demand_empty_rest_of_line ();
3776}
3777
3778/* The .toc pseudo-op. Switch to the .toc subsegment. */
3779
3780static void
3781ppc_toc (ignore)
5480ccf3 3782 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3783{
3784 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3785 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH
3786 else
3787 {
3788 subsegT subseg;
3789 symbolS *sym;
3790 symbolS *list;
81d4177b 3791
252b5132
RH
3792 subseg = ppc_data_subsegment;
3793 ++ppc_data_subsegment;
3794
3795 subseg_new (segment_name (data_section), subseg);
3796 ppc_toc_frag = frag_now;
3797
3798 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3799 symbol_set_frag (sym, frag_now);
252b5132
RH
3800 S_SET_SEGMENT (sym, data_section);
3801 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3802 symbol_get_tc (sym)->subseg = subseg;
3803 symbol_get_tc (sym)->output = 1;
3804 symbol_get_tc (sym)->within = sym;
252b5132
RH
3805
3806 ppc_toc_csect = sym;
81d4177b 3807
252b5132 3808 for (list = ppc_data_csects;
809ffe0d
ILT
3809 symbol_get_tc (list)->next != (symbolS *) NULL;
3810 list = symbol_get_tc (list)->next)
252b5132 3811 ;
809ffe0d 3812 symbol_get_tc (list)->next = sym;
252b5132
RH
3813
3814 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3815 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3816 &symbol_lastP);
252b5132
RH
3817 }
3818
3819 ppc_current_csect = ppc_toc_csect;
3820
3821 demand_empty_rest_of_line ();
3822}
3823
3824/* The AIX assembler automatically aligns the operands of a .long or
3825 .short pseudo-op, and we want to be compatible. */
3826
3827static void
3828ppc_xcoff_cons (log_size)
3829 int log_size;
3830{
3831 frag_align (log_size, 0, 0);
3832 record_alignment (now_seg, log_size);
3833 cons (1 << log_size);
3834}
3835
3836static void
3837ppc_vbyte (dummy)
5480ccf3 3838 int dummy ATTRIBUTE_UNUSED;
252b5132
RH
3839{
3840 expressionS exp;
3841 int byte_count;
3842
3843 (void) expression (&exp);
3844
3845 if (exp.X_op != O_constant)
3846 {
3847 as_bad (_("non-constant byte count"));
3848 return;
3849 }
3850
3851 byte_count = exp.X_add_number;
3852
3853 if (*input_line_pointer != ',')
3854 {
3855 as_bad (_("missing value"));
3856 return;
3857 }
3858
3859 ++input_line_pointer;
3860 cons (byte_count);
3861}
3862
3863#endif /* OBJ_XCOFF */
0baf16f2 3864#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
3865\f
3866/* The .tc pseudo-op. This is used when generating either XCOFF or
3867 ELF. This takes two or more arguments.
3868
3869 When generating XCOFF output, the first argument is the name to
3870 give to this location in the toc; this will be a symbol with class
0baf16f2 3871 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3872 this location in the TOC; often there is just one more argument, a
1049f94e 3873 relocatable symbol reference. The size of the value to store
0baf16f2
AM
3874 depends on target word size. A 32-bit target uses 4-byte values, a
3875 64-bit target uses 8-byte values.
252b5132
RH
3876
3877 When not generating XCOFF output, the arguments are the same, but
3878 the first argument is simply ignored. */
3879
3880static void
3881ppc_tc (ignore)
92161534 3882 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3883{
3884#ifdef OBJ_XCOFF
3885
3886 /* Define the TOC symbol name. */
3887 {
3888 char *name;
3889 char endc;
3890 symbolS *sym;
3891
3892 if (ppc_toc_csect == (symbolS *) NULL
3893 || ppc_toc_csect != ppc_current_csect)
3894 {
3895 as_bad (_(".tc not in .toc section"));
3896 ignore_rest_of_line ();
3897 return;
3898 }
3899
3900 name = input_line_pointer;
3901 endc = get_symbol_end ();
3902
3903 sym = symbol_find_or_make (name);
3904
3905 *input_line_pointer = endc;
3906
3907 if (S_IS_DEFINED (sym))
3908 {
3909 symbolS *label;
3910
809ffe0d
ILT
3911 label = symbol_get_tc (ppc_current_csect)->within;
3912 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH
3913 {
3914 as_bad (_(".tc with no label"));
3915 ignore_rest_of_line ();
3916 return;
3917 }
3918
3919 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3920 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH
3921 S_SET_VALUE (label, S_GET_VALUE (sym));
3922
3923 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3924 ++input_line_pointer;
3925
3926 return;
3927 }
3928
3929 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3930 symbol_set_frag (sym, frag_now);
252b5132 3931 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3932 symbol_get_tc (sym)->class = XMC_TC;
3933 symbol_get_tc (sym)->output = 1;
252b5132
RH
3934
3935 ppc_frob_label (sym);
3936 }
3937
0baf16f2
AM
3938#endif /* OBJ_XCOFF */
3939#ifdef OBJ_ELF
9c7977b3 3940 int align;
252b5132
RH
3941
3942 /* Skip the TOC symbol name. */
3943 while (is_part_of_name (*input_line_pointer)
3944 || *input_line_pointer == '['
3945 || *input_line_pointer == ']'
3946 || *input_line_pointer == '{'
3947 || *input_line_pointer == '}')
3948 ++input_line_pointer;
3949
0baf16f2 3950 /* Align to a four/eight byte boundary. */
2b3c4602 3951 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM
3952 frag_align (align, 0, 0);
3953 record_alignment (now_seg, align);
0baf16f2 3954#endif /* OBJ_ELF */
252b5132
RH
3955
3956 if (*input_line_pointer != ',')
3957 demand_empty_rest_of_line ();
3958 else
3959 {
3960 ++input_line_pointer;
2b3c4602 3961 cons (ppc_obj64 ? 8 : 4);
252b5132
RH
3962 }
3963}
0baf16f2
AM
3964
3965/* Pseudo-op .machine. */
15c1449b 3966/* FIXME: `.machine' is a nop for the moment. It would be nice to
2b3c4602 3967 accept this directive on the first line of input and set ppc_obj64
15c1449b
AM
3968 and the target format accordingly. Unfortunately, the target
3969 format is selected in output-file.c:output_file_create before we
3970 even get to md_begin, so it's not possible without changing
3971 as.c:main. */
0baf16f2
AM
3972
3973static void
3974ppc_machine (ignore)
3975 int ignore ATTRIBUTE_UNUSED;
3976{
3977 discard_rest_of_line ();
3978}
3979
3980/* See whether a symbol is in the TOC section. */
3981
3982static int
3983ppc_is_toc_sym (sym)
3984 symbolS *sym;
3985{
3986#ifdef OBJ_XCOFF
3987 return symbol_get_tc (sym)->class == XMC_TC;
3988#endif
3989#ifdef OBJ_ELF
3990 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 3991 if (ppc_obj64)
0baf16f2
AM
3992 return strcmp (sname, ".toc") == 0;
3993 else
3994 return strcmp (sname, ".got") == 0;
3995#endif
3996}
3997#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH
3998\f
3999#ifdef TE_PE
4000
99a814a1 4001/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
4002
4003/* Set the current section. */
4004static void
4005ppc_set_current_section (new)
4006 segT new;
4007{
4008 ppc_previous_section = ppc_current_section;
4009 ppc_current_section = new;
4010}
4011
4012/* pseudo-op: .previous
4013 behaviour: toggles the current section with the previous section.
4014 errors: None
99a814a1
AM
4015 warnings: "No previous section" */
4016
252b5132 4017static void
99a814a1 4018ppc_previous (ignore)
5480ccf3 4019 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4020{
4021 symbolS *tmp;
4022
81d4177b 4023 if (ppc_previous_section == NULL)
252b5132 4024 {
99a814a1 4025 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH
4026 return;
4027 }
4028
99a814a1 4029 subseg_set (ppc_previous_section, 0);
252b5132 4030
99a814a1 4031 ppc_set_current_section (ppc_previous_section);
252b5132
RH
4032}
4033
4034/* pseudo-op: .pdata
4035 behaviour: predefined read only data section
b34976b6 4036 double word aligned
252b5132
RH
4037 errors: None
4038 warnings: None
4039 initial: .section .pdata "adr3"
b34976b6 4040 a - don't know -- maybe a misprint
252b5132
RH
4041 d - initialized data
4042 r - readable
4043 3 - double word aligned (that would be 4 byte boundary)
4044
4045 commentary:
4046 Tag index tables (also known as the function table) for exception
99a814a1 4047 handling, debugging, etc. */
252b5132 4048
252b5132 4049static void
99a814a1 4050ppc_pdata (ignore)
5480ccf3 4051 int ignore ATTRIBUTE_UNUSED;
252b5132 4052{
81d4177b 4053 if (pdata_section == 0)
252b5132
RH
4054 {
4055 pdata_section = subseg_new (".pdata", 0);
81d4177b 4056
252b5132
RH
4057 bfd_set_section_flags (stdoutput, pdata_section,
4058 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4059 | SEC_READONLY | SEC_DATA ));
81d4177b 4060
252b5132
RH
4061 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4062 }
4063 else
4064 {
99a814a1 4065 pdata_section = subseg_new (".pdata", 0);
252b5132 4066 }
99a814a1 4067 ppc_set_current_section (pdata_section);
252b5132
RH
4068}
4069
4070/* pseudo-op: .ydata
4071 behaviour: predefined read only data section
b34976b6 4072 double word aligned
252b5132
RH
4073 errors: None
4074 warnings: None
4075 initial: .section .ydata "drw3"
b34976b6 4076 a - don't know -- maybe a misprint
252b5132
RH
4077 d - initialized data
4078 r - readable
4079 3 - double word aligned (that would be 4 byte boundary)
4080 commentary:
4081 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM
4082 debugging, etc. */
4083
252b5132 4084static void
99a814a1 4085ppc_ydata (ignore)
5480ccf3 4086 int ignore ATTRIBUTE_UNUSED;
252b5132 4087{
81d4177b 4088 if (ydata_section == 0)
252b5132
RH
4089 {
4090 ydata_section = subseg_new (".ydata", 0);
4091 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM
4092 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4093 | SEC_READONLY | SEC_DATA ));
252b5132
RH
4094
4095 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4096 }
4097 else
4098 {
4099 ydata_section = subseg_new (".ydata", 0);
4100 }
99a814a1 4101 ppc_set_current_section (ydata_section);
252b5132
RH
4102}
4103
4104/* pseudo-op: .reldata
4105 behaviour: predefined read write data section
b34976b6 4106 double word aligned (4-byte)
252b5132
RH
4107 FIXME: relocation is applied to it
4108 FIXME: what's the difference between this and .data?
4109 errors: None
4110 warnings: None
4111 initial: .section .reldata "drw3"
4112 d - initialized data
4113 r - readable
4114 w - writeable
4115 3 - double word aligned (that would be 8 byte boundary)
4116
4117 commentary:
4118 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM
4119 function descriptors, etc. */
4120
252b5132 4121static void
99a814a1 4122ppc_reldata (ignore)
5480ccf3 4123 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4124{
4125 if (reldata_section == 0)
4126 {
4127 reldata_section = subseg_new (".reldata", 0);
4128
4129 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM
4130 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4131 | SEC_DATA));
252b5132
RH
4132
4133 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4134 }
4135 else
4136 {
4137 reldata_section = subseg_new (".reldata", 0);
4138 }
99a814a1 4139 ppc_set_current_section (reldata_section);
252b5132
RH
4140}
4141
4142/* pseudo-op: .rdata
4143 behaviour: predefined read only data section
b34976b6 4144 double word aligned
252b5132
RH
4145 errors: None
4146 warnings: None
4147 initial: .section .rdata "dr3"
4148 d - initialized data
4149 r - readable
99a814a1
AM
4150 3 - double word aligned (that would be 4 byte boundary) */
4151
252b5132 4152static void
99a814a1 4153ppc_rdata (ignore)
5480ccf3 4154 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4155{
4156 if (rdata_section == 0)
4157 {
4158 rdata_section = subseg_new (".rdata", 0);
4159 bfd_set_section_flags (stdoutput, rdata_section,
4160 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4161 | SEC_READONLY | SEC_DATA ));
4162
4163 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4164 }
4165 else
4166 {
4167 rdata_section = subseg_new (".rdata", 0);
4168 }
99a814a1 4169 ppc_set_current_section (rdata_section);
252b5132
RH
4170}
4171
4172/* pseudo-op: .ualong
81d4177b 4173 behaviour: much like .int, with the exception that no alignment is
b34976b6 4174 performed.
252b5132
RH
4175 FIXME: test the alignment statement
4176 errors: None
99a814a1
AM
4177 warnings: None */
4178
252b5132 4179static void
99a814a1 4180ppc_ualong (ignore)
5480ccf3 4181 int ignore ATTRIBUTE_UNUSED;
252b5132 4182{
99a814a1
AM
4183 /* Try for long. */
4184 cons (4);
252b5132
RH
4185}
4186
4187/* pseudo-op: .znop <symbol name>
4188 behaviour: Issue a nop instruction
b34976b6 4189 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH
4190 the supplied symbol name.
4191 errors: None
99a814a1
AM
4192 warnings: Missing symbol name */
4193
252b5132 4194static void
99a814a1 4195ppc_znop (ignore)
5480ccf3 4196 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4197{
4198 unsigned long insn;
4199 const struct powerpc_opcode *opcode;
4200 expressionS ex;
4201 char *f;
252b5132 4202 symbolS *sym;
252b5132
RH
4203 char *symbol_name;
4204 char c;
4205 char *name;
4206 unsigned int exp;
4207 flagword flags;
4208 asection *sec;
4209
99a814a1 4210 /* Strip out the symbol name. */
252b5132
RH
4211 symbol_name = input_line_pointer;
4212 c = get_symbol_end ();
4213
4214 name = xmalloc (input_line_pointer - symbol_name + 1);
4215 strcpy (name, symbol_name);
4216
4217 sym = symbol_find_or_make (name);
4218
4219 *input_line_pointer = c;
4220
4221 SKIP_WHITESPACE ();
4222
4223 /* Look up the opcode in the hash table. */
4224 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4225
99a814a1 4226 /* Stick in the nop. */
252b5132
RH
4227 insn = opcode->opcode;
4228
4229 /* Write out the instruction. */
4230 f = frag_more (4);
4231 md_number_to_chars (f, insn, 4);
4232 fix_new (frag_now,
4233 f - frag_now->fr_literal,
4234 4,
4235 sym,
4236 0,
4237 0,
4238 BFD_RELOC_16_GOT_PCREL);
4239
4240}
4241
81d4177b
KH
4242/* pseudo-op:
4243 behaviour:
4244 errors:
99a814a1
AM
4245 warnings: */
4246
252b5132 4247static void
99a814a1 4248ppc_pe_comm (lcomm)
252b5132
RH
4249 int lcomm;
4250{
4251 register char *name;
4252 register char c;
4253 register char *p;
4254 offsetT temp;
4255 register symbolS *symbolP;
4256 offsetT align;
4257
4258 name = input_line_pointer;
4259 c = get_symbol_end ();
4260
99a814a1 4261 /* just after name is now '\0'. */
252b5132
RH
4262 p = input_line_pointer;
4263 *p = c;
4264 SKIP_WHITESPACE ();
4265 if (*input_line_pointer != ',')
4266 {
4267 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4268 ignore_rest_of_line ();
4269 return;
4270 }
4271
4272 input_line_pointer++; /* skip ',' */
4273 if ((temp = get_absolute_expression ()) < 0)
4274 {
4275 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4276 ignore_rest_of_line ();
4277 return;
4278 }
4279
4280 if (! lcomm)
4281 {
4282 /* The third argument to .comm is the alignment. */
4283 if (*input_line_pointer != ',')
4284 align = 3;
4285 else
4286 {
4287 ++input_line_pointer;
4288 align = get_absolute_expression ();
4289 if (align <= 0)
4290 {
4291 as_warn (_("ignoring bad alignment"));
4292 align = 3;
4293 }
4294 }
4295 }
4296
4297 *p = 0;
4298 symbolP = symbol_find_or_make (name);
4299
4300 *p = c;
4301 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4302 {
4303 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4304 S_GET_NAME (symbolP));
4305 ignore_rest_of_line ();
4306 return;
4307 }
4308
4309 if (S_GET_VALUE (symbolP))
4310 {
4311 if (S_GET_VALUE (symbolP) != (valueT) temp)
4312 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4313 S_GET_NAME (symbolP),
4314 (long) S_GET_VALUE (symbolP),
4315 (long) temp);
4316 }
4317 else
4318 {
4319 S_SET_VALUE (symbolP, (valueT) temp);
4320 S_SET_EXTERNAL (symbolP);
4321 }
4322
4323 demand_empty_rest_of_line ();
4324}
4325
4326/*
4327 * implement the .section pseudo op:
4328 * .section name {, "flags"}
4329 * ^ ^
4330 * | +--- optional flags: 'b' for bss
4331 * | 'i' for info
4332 * +-- section name 'l' for lib
4333 * 'n' for noload
4334 * 'o' for over
4335 * 'w' for data
4336 * 'd' (apparently m88k for data)
4337 * 'x' for text
4338 * But if the argument is not a quoted string, treat it as a
4339 * subsegment number.
4340 *
4341 * FIXME: this is a copy of the section processing from obj-coff.c, with
4342 * additions/changes for the moto-pas assembler support. There are three
4343 * categories:
4344 *
81d4177b 4345 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH
4346 * setting bits that bfd probably neither understands or uses. The
4347 * correct approach (?) will have to incorporate extra fields attached
4348 * to the section to hold the system specific stuff. (krk)
4349 *
4350 * Section Contents:
4351 * 'a' - unknown - referred to in documentation, but no definition supplied
4352 * 'c' - section has code
4353 * 'd' - section has initialized data
4354 * 'u' - section has uninitialized data
4355 * 'i' - section contains directives (info)
4356 * 'n' - section can be discarded
4357 * 'R' - remove section at link time
4358 *
4359 * Section Protection:
4360 * 'r' - section is readable
4361 * 'w' - section is writeable
4362 * 'x' - section is executable
4363 * 's' - section is sharable
4364 *
4365 * Section Alignment:
4366 * '0' - align to byte boundary
4367 * '1' - align to halfword undary
4368 * '2' - align to word boundary
4369 * '3' - align to doubleword boundary
4370 * '4' - align to quadword boundary
4371 * '5' - align to 32 byte boundary
4372 * '6' - align to 64 byte boundary
4373 *
4374 */
4375
4376void
4377ppc_pe_section (ignore)
5480ccf3 4378 int ignore ATTRIBUTE_UNUSED;
252b5132 4379{
99a814a1 4380 /* Strip out the section name. */
252b5132
RH
4381 char *section_name;
4382 char c;
4383 char *name;
4384 unsigned int exp;
4385 flagword flags;
4386 segT sec;
4387 int align;
4388
4389 section_name = input_line_pointer;
4390 c = get_symbol_end ();
4391
4392 name = xmalloc (input_line_pointer - section_name + 1);
4393 strcpy (name, section_name);
4394
4395 *input_line_pointer = c;
4396
4397 SKIP_WHITESPACE ();
4398
4399 exp = 0;
4400 flags = SEC_NO_FLAGS;
4401
4402 if (strcmp (name, ".idata$2") == 0)
4403 {
4404 align = 0;
4405 }
4406 else if (strcmp (name, ".idata$3") == 0)
4407 {
4408 align = 0;
4409 }
4410 else if (strcmp (name, ".idata$4") == 0)
4411 {
4412 align = 2;
4413 }
4414 else if (strcmp (name, ".idata$5") == 0)
4415 {
4416 align = 2;
4417 }
4418 else if (strcmp (name, ".idata$6") == 0)
4419 {
4420 align = 1;
4421 }
4422 else
99a814a1
AM
4423 /* Default alignment to 16 byte boundary. */
4424 align = 4;
252b5132
RH
4425
4426 if (*input_line_pointer == ',')
4427 {
4428 ++input_line_pointer;
4429 SKIP_WHITESPACE ();
4430 if (*input_line_pointer != '"')
4431 exp = get_absolute_expression ();
4432 else
4433 {
4434 ++input_line_pointer;
4435 while (*input_line_pointer != '"'
4436 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4437 {
4438 switch (*input_line_pointer)
4439 {
4440 /* Section Contents */
4441 case 'a': /* unknown */
4442 as_bad (_("Unsupported section attribute -- 'a'"));
4443 break;
4444 case 'c': /* code section */
81d4177b 4445 flags |= SEC_CODE;
252b5132
RH
4446 break;
4447 case 'd': /* section has initialized data */
4448 flags |= SEC_DATA;
4449 break;
4450 case 'u': /* section has uninitialized data */
4451 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4452 in winnt.h */
4453 flags |= SEC_ROM;
4454 break;
4455 case 'i': /* section contains directives (info) */
4456 /* FIXME: This is IMAGE_SCN_LNK_INFO
4457 in winnt.h */
4458 flags |= SEC_HAS_CONTENTS;
4459 break;
4460 case 'n': /* section can be discarded */
81d4177b 4461 flags &=~ SEC_LOAD;
252b5132
RH
4462 break;
4463 case 'R': /* Remove section at link time */
4464 flags |= SEC_NEVER_LOAD;
4465 break;
4466
4467 /* Section Protection */
4468 case 'r': /* section is readable */
4469 flags |= IMAGE_SCN_MEM_READ;
4470 break;
4471 case 'w': /* section is writeable */
4472 flags |= IMAGE_SCN_MEM_WRITE;
4473 break;
4474 case 'x': /* section is executable */
4475 flags |= IMAGE_SCN_MEM_EXECUTE;
4476 break;
4477 case 's': /* section is sharable */
4478 flags |= IMAGE_SCN_MEM_SHARED;
4479 break;
4480
4481 /* Section Alignment */
4482 case '0': /* align to byte boundary */
4483 flags |= IMAGE_SCN_ALIGN_1BYTES;
4484 align = 0;
4485 break;
4486 case '1': /* align to halfword boundary */
4487 flags |= IMAGE_SCN_ALIGN_2BYTES;
4488 align = 1;
4489 break;
4490 case '2': /* align to word boundary */
4491 flags |= IMAGE_SCN_ALIGN_4BYTES;
4492 align = 2;
4493 break;
4494 case '3': /* align to doubleword boundary */
4495 flags |= IMAGE_SCN_ALIGN_8BYTES;
4496 align = 3;
4497 break;
4498 case '4': /* align to quadword boundary */
4499 flags |= IMAGE_SCN_ALIGN_16BYTES;
4500 align = 4;
4501 break;
4502 case '5': /* align to 32 byte boundary */
4503 flags |= IMAGE_SCN_ALIGN_32BYTES;
4504 align = 5;
4505 break;
4506 case '6': /* align to 64 byte boundary */
4507 flags |= IMAGE_SCN_ALIGN_64BYTES;
4508 align = 6;
4509 break;
4510
4511 default:
99a814a1
AM
4512 as_bad (_("unknown section attribute '%c'"),
4513 *input_line_pointer);
252b5132
RH
4514 break;
4515 }
4516 ++input_line_pointer;
4517 }
4518 if (*input_line_pointer == '"')
4519 ++input_line_pointer;
4520 }
4521 }
4522
4523 sec = subseg_new (name, (subsegT) exp);
4524
99a814a1 4525 ppc_set_current_section (sec);
252b5132
RH
4526
4527 if (flags != SEC_NO_FLAGS)
4528 {
4529 if (! bfd_set_section_flags (stdoutput, sec, flags))
4530 as_bad (_("error setting flags for \"%s\": %s"),
4531 bfd_section_name (stdoutput, sec),
4532 bfd_errmsg (bfd_get_error ()));
4533 }
4534
99a814a1 4535 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH
4536
4537}
4538
4539static void
4540ppc_pe_function (ignore)
5480ccf3 4541 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4542{
4543 char *name;
4544 char endc;
4545 symbolS *ext_sym;
4546
4547 name = input_line_pointer;
4548 endc = get_symbol_end ();
4549
4550 ext_sym = symbol_find_or_make (name);
4551
4552 *input_line_pointer = endc;
4553
4554 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4555 SF_SET_FUNCTION (ext_sym);
4556 SF_SET_PROCESS (ext_sym);
4557 coff_add_linesym (ext_sym);
4558
4559 demand_empty_rest_of_line ();
4560}
4561
4562static void
4563ppc_pe_tocd (ignore)
5480ccf3 4564 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4565{
4566 if (tocdata_section == 0)
4567 {
4568 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4569 /* FIXME: section flags won't work. */
252b5132
RH
4570 bfd_set_section_flags (stdoutput, tocdata_section,
4571 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4572 | SEC_READONLY | SEC_DATA));
252b5132
RH
4573
4574 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4575 }
4576 else
4577 {
4578 rdata_section = subseg_new (".tocd", 0);
4579 }
4580
99a814a1 4581 ppc_set_current_section (tocdata_section);
252b5132
RH
4582
4583 demand_empty_rest_of_line ();
4584}
4585
4586/* Don't adjust TOC relocs to use the section symbol. */
4587
4588int
4589ppc_pe_fix_adjustable (fix)
4590 fixS *fix;
4591{
4592 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4593}
4594
4595#endif
4596\f
4597#ifdef OBJ_XCOFF
4598
4599/* XCOFF specific symbol and file handling. */
4600
4601/* Canonicalize the symbol name. We use the to force the suffix, if
4602 any, to use square brackets, and to be in upper case. */
4603
4604char *
4605ppc_canonicalize_symbol_name (name)
4606 char *name;
4607{
4608 char *s;
4609
4610 if (ppc_stab_symbol)
4611 return name;
4612
4613 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4614 ;
4615 if (*s != '\0')
4616 {
4617 char brac;
4618
4619 if (*s == '[')
4620 brac = ']';
4621 else
4622 {
4623 *s = '[';
4624 brac = '}';
4625 }
4626
4627 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4628 *s = TOUPPER (*s);
252b5132
RH
4629
4630 if (*s == '\0' || s[1] != '\0')
4631 as_bad (_("bad symbol suffix"));
4632
4633 *s = ']';
4634 }
4635
4636 return name;
4637}
4638
4639/* Set the class of a symbol based on the suffix, if any. This is
4640 called whenever a new symbol is created. */
4641
4642void
4643ppc_symbol_new_hook (sym)
4644 symbolS *sym;
4645{
809ffe0d 4646 struct ppc_tc_sy *tc;
252b5132
RH
4647 const char *s;
4648
809ffe0d
ILT
4649 tc = symbol_get_tc (sym);
4650 tc->next = NULL;
4651 tc->output = 0;
4652 tc->class = -1;
4653 tc->real_name = NULL;
4654 tc->subseg = 0;
4655 tc->align = 0;
4656 tc->size = NULL;
4657 tc->within = NULL;
252b5132
RH
4658
4659 if (ppc_stab_symbol)
4660 return;
4661
4662 s = strchr (S_GET_NAME (sym), '[');
4663 if (s == (const char *) NULL)
4664 {
4665 /* There is no suffix. */
4666 return;
4667 }
4668
4669 ++s;
4670
4671 switch (s[0])
4672 {
4673 case 'B':
4674 if (strcmp (s, "BS]") == 0)
809ffe0d 4675 tc->class = XMC_BS;
252b5132
RH
4676 break;
4677 case 'D':
4678 if (strcmp (s, "DB]") == 0)
809ffe0d 4679 tc->class = XMC_DB;
252b5132 4680 else if (strcmp (s, "DS]") == 0)
809ffe0d 4681 tc->class = XMC_DS;
252b5132
RH
4682 break;
4683 case 'G':
4684 if (strcmp (s, "GL]") == 0)
809ffe0d 4685 tc->class = XMC_GL;
252b5132
RH
4686 break;
4687 case 'P':
4688 if (strcmp (s, "PR]") == 0)
809ffe0d 4689 tc->class = XMC_PR;
252b5132
RH
4690 break;
4691 case 'R':
4692 if (strcmp (s, "RO]") == 0)
809ffe0d 4693 tc->class = XMC_RO;
252b5132 4694 else if (strcmp (s, "RW]") == 0)
809ffe0d 4695 tc->class = XMC_RW;
252b5132
RH
4696 break;
4697 case 'S':
4698 if (strcmp (s, "SV]") == 0)
809ffe0d 4699 tc->class = XMC_SV;
252b5132
RH
4700 break;
4701 case 'T':
4702 if (strcmp (s, "TC]") == 0)
809ffe0d 4703 tc->class = XMC_TC;
252b5132 4704 else if (strcmp (s, "TI]") == 0)
809ffe0d 4705 tc->class = XMC_TI;
252b5132 4706 else if (strcmp (s, "TB]") == 0)
809ffe0d 4707 tc->class = XMC_TB;
252b5132 4708 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4709 tc->class = XMC_TC0;
252b5132
RH
4710 break;
4711 case 'U':
4712 if (strcmp (s, "UA]") == 0)
809ffe0d 4713 tc->class = XMC_UA;
252b5132 4714 else if (strcmp (s, "UC]") == 0)
809ffe0d 4715 tc->class = XMC_UC;
252b5132
RH
4716 break;
4717 case 'X':
4718 if (strcmp (s, "XO]") == 0)
809ffe0d 4719 tc->class = XMC_XO;
252b5132
RH
4720 break;
4721 }
4722
809ffe0d 4723 if (tc->class == -1)
252b5132
RH
4724 as_bad (_("Unrecognized symbol suffix"));
4725}
4726
4727/* Set the class of a label based on where it is defined. This
4728 handles symbols without suffixes. Also, move the symbol so that it
4729 follows the csect symbol. */
4730
4731void
4732ppc_frob_label (sym)
4733 symbolS *sym;
4734{
4735 if (ppc_current_csect != (symbolS *) NULL)
4736 {
809ffe0d
ILT
4737 if (symbol_get_tc (sym)->class == -1)
4738 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH
4739
4740 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
4741 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4742 &symbol_rootP, &symbol_lastP);
4743 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
4744 }
4745}
4746
4747/* This variable is set by ppc_frob_symbol if any absolute symbols are
4748 seen. It tells ppc_adjust_symtab whether it needs to look through
4749 the symbols. */
4750
b34976b6 4751static bfd_boolean ppc_saw_abs;
252b5132
RH
4752
4753/* Change the name of a symbol just before writing it out. Set the
4754 real name if the .rename pseudo-op was used. Otherwise, remove any
4755 class suffix. Return 1 if the symbol should not be included in the
4756 symbol table. */
4757
4758int
4759ppc_frob_symbol (sym)
4760 symbolS *sym;
4761{
4762 static symbolS *ppc_last_function;
4763 static symbolS *set_end;
4764
4765 /* Discard symbols that should not be included in the output symbol
4766 table. */
809ffe0d
ILT
4767 if (! symbol_used_in_reloc_p (sym)
4768 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4769 || (! S_IS_EXTERNAL (sym)
809ffe0d 4770 && ! symbol_get_tc (sym)->output
252b5132
RH
4771 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4772 return 1;
4773
a161fe53
AM
4774 /* This one will disappear anyway. Don't make a csect sym for it. */
4775 if (sym == abs_section_sym)
4776 return 1;
4777
809ffe0d
ILT
4778 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4779 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH
4780 else
4781 {
4782 const char *name;
4783 const char *s;
4784
4785 name = S_GET_NAME (sym);
4786 s = strchr (name, '[');
4787 if (s != (char *) NULL)
4788 {
4789 unsigned int len;
4790 char *snew;
4791
4792 len = s - name;
4793 snew = xmalloc (len + 1);
4794 memcpy (snew, name, len);
4795 snew[len] = '\0';
4796
4797 S_SET_NAME (sym, snew);
4798 }
4799 }
4800
4801 if (set_end != (symbolS *) NULL)
4802 {
4803 SA_SET_SYM_ENDNDX (set_end, sym);
4804 set_end = NULL;
4805 }
4806
4807 if (SF_GET_FUNCTION (sym))
4808 {
4809 if (ppc_last_function != (symbolS *) NULL)
4810 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4811 ppc_last_function = sym;
809ffe0d 4812 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4813 {
6386f3a7 4814 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT
4815 SA_SET_SYM_FSIZE (sym,
4816 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH
4817 }
4818 }
4819 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4820 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4821 {
4822 if (ppc_last_function == (symbolS *) NULL)
4823 as_bad (_(".ef with no preceding .function"));
4824 else
4825 {
4826 set_end = ppc_last_function;
4827 ppc_last_function = NULL;
4828
4829 /* We don't have a C_EFCN symbol, but we need to force the
4830 COFF backend to believe that it has seen one. */
4831 coff_last_function = NULL;
4832 }
4833 }
4834
4835 if (! S_IS_EXTERNAL (sym)
809ffe0d 4836 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH
4837 && S_GET_STORAGE_CLASS (sym) != C_FILE
4838 && S_GET_STORAGE_CLASS (sym) != C_FCN
4839 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4840 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4841 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4842 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4843 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4844 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4845 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4846
4847 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4848 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4849 {
4850 int i;
4851 union internal_auxent *a;
4852
4853 /* Create a csect aux. */
4854 i = S_GET_NUMBER_AUXILIARY (sym);
4855 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT
4856 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4857 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH
4858 {
4859 /* This is the TOC table. */
4860 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4861 a->x_csect.x_scnlen.l = 0;
4862 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4863 }
809ffe0d 4864 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH
4865 {
4866 /* This is a csect symbol. x_scnlen is the size of the
4867 csect. */
809ffe0d 4868 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH
4869 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4870 S_GET_SEGMENT (sym))
4871 - S_GET_VALUE (sym));
4872 else
4873 {
6386f3a7 4874 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4875 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH
4876 - S_GET_VALUE (sym));
4877 }
809ffe0d 4878 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH
4879 }
4880 else if (S_GET_SEGMENT (sym) == bss_section)
4881 {
4882 /* This is a common symbol. */
809ffe0d
ILT
4883 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4884 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4885 if (S_IS_EXTERNAL (sym))
809ffe0d 4886 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4887 else
809ffe0d 4888 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH
4889 }
4890 else if (S_GET_SEGMENT (sym) == absolute_section)
4891 {
4892 /* This is an absolute symbol. The csect will be created by
99a814a1 4893 ppc_adjust_symtab. */
b34976b6 4894 ppc_saw_abs = TRUE;
252b5132 4895 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT
4896 if (symbol_get_tc (sym)->class == -1)
4897 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH
4898 }
4899 else if (! S_IS_DEFINED (sym))
4900 {
4901 /* This is an external symbol. */
4902 a->x_csect.x_scnlen.l = 0;
4903 a->x_csect.x_smtyp = XTY_ER;
4904 }
809ffe0d 4905 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH
4906 {
4907 symbolS *next;
4908
4909 /* This is a TOC definition. x_scnlen is the size of the
4910 TOC entry. */
4911 next = symbol_next (sym);
809ffe0d 4912 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH
4913 next = symbol_next (next);
4914 if (next == (symbolS *) NULL
809ffe0d 4915 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH
4916 {
4917 if (ppc_after_toc_frag == (fragS *) NULL)
4918 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4919 data_section)
4920 - S_GET_VALUE (sym));
4921 else
4922 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4923 - S_GET_VALUE (sym));
4924 }
4925 else
4926 {
6386f3a7 4927 resolve_symbol_value (next);
252b5132
RH
4928 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
4929 - S_GET_VALUE (sym));
4930 }
4931 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4932 }
4933 else
4934 {
4935 symbolS *csect;
4936
4937 /* This is a normal symbol definition. x_scnlen is the
4938 symbol index of the containing csect. */
4939 if (S_GET_SEGMENT (sym) == text_section)
4940 csect = ppc_text_csects;
4941 else if (S_GET_SEGMENT (sym) == data_section)
4942 csect = ppc_data_csects;
4943 else
4944 abort ();
4945
4946 /* Skip the initial dummy symbol. */
809ffe0d 4947 csect = symbol_get_tc (csect)->next;
252b5132
RH
4948
4949 if (csect == (symbolS *) NULL)
4950 {
4951 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
4952 a->x_csect.x_scnlen.l = 0;
4953 }
4954 else
4955 {
809ffe0d 4956 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 4957 {
6386f3a7 4958 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT
4959 if (S_GET_VALUE (symbol_get_tc (csect)->next)
4960 > S_GET_VALUE (sym))
252b5132 4961 break;
809ffe0d 4962 csect = symbol_get_tc (csect)->next;
252b5132
RH
4963 }
4964
809ffe0d
ILT
4965 a->x_csect.x_scnlen.p =
4966 coffsymbol (symbol_get_bfdsym (csect))->native;
4967 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
4968 1;
252b5132
RH
4969 }
4970 a->x_csect.x_smtyp = XTY_LD;
4971 }
81d4177b 4972
252b5132
RH
4973 a->x_csect.x_parmhash = 0;
4974 a->x_csect.x_snhash = 0;
809ffe0d 4975 if (symbol_get_tc (sym)->class == -1)
252b5132
RH
4976 a->x_csect.x_smclas = XMC_PR;
4977 else
809ffe0d 4978 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH
4979 a->x_csect.x_stab = 0;
4980 a->x_csect.x_snstab = 0;
4981
4982 /* Don't let the COFF backend resort these symbols. */
809ffe0d 4983 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH
4984 }
4985 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
4986 {
4987 /* We want the value to be the symbol index of the referenced
4988 csect symbol. BFD will do that for us if we set the right
4989 flags. */
b782de16
AM
4990 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
4991 combined_entry_type *c = coffsymbol (bsym)->native;
4992
4993 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 4994 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH
4995 }
4996 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4997 {
4998 symbolS *block;
4999 symbolS *csect;
5000
5001 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT
5002 block = symbol_get_tc (sym)->within;
5003 csect = symbol_get_tc (block)->within;
6386f3a7 5004 resolve_symbol_value (csect);
252b5132
RH
5005 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5006 }
5007 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5008 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5009 {
5010 /* We want the value to be a file offset into the line numbers.
99a814a1
AM
5011 BFD will do that for us if we set the right flags. We have
5012 already set the value correctly. */
809ffe0d 5013 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH
5014 }
5015
5016 return 0;
5017}
5018
5019/* Adjust the symbol table. This creates csect symbols for all
5020 absolute symbols. */
5021
5022void
5023ppc_adjust_symtab ()
5024{
5025 symbolS *sym;
5026
5027 if (! ppc_saw_abs)
5028 return;
5029
5030 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5031 {
5032 symbolS *csect;
5033 int i;
5034 union internal_auxent *a;
5035
5036 if (S_GET_SEGMENT (sym) != absolute_section)
5037 continue;
5038
5039 csect = symbol_create (".abs[XO]", absolute_section,
5040 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5041 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH
5042 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5043 i = S_GET_NUMBER_AUXILIARY (csect);
5044 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5045 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH
5046 a->x_csect.x_scnlen.l = 0;
5047 a->x_csect.x_smtyp = XTY_SD;
5048 a->x_csect.x_parmhash = 0;
5049 a->x_csect.x_snhash = 0;
5050 a->x_csect.x_smclas = XMC_XO;
5051 a->x_csect.x_stab = 0;
5052 a->x_csect.x_snstab = 0;
5053
5054 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5055
5056 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT
5057 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5058 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5059 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH
5060 }
5061
b34976b6 5062 ppc_saw_abs = FALSE;
252b5132
RH
5063}
5064
5065/* Set the VMA for a section. This is called on all the sections in
5066 turn. */
5067
5068void
5069ppc_frob_section (sec)
5070 asection *sec;
5071{
931e13a6 5072 static bfd_vma vma = 0;
252b5132 5073
931e13a6 5074 vma = md_section_align (sec, vma);
252b5132
RH
5075 bfd_set_section_vma (stdoutput, sec, vma);
5076 vma += bfd_section_size (stdoutput, sec);
5077}
5078
5079#endif /* OBJ_XCOFF */
5080\f
5081/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC
5082 of type TYPE, and store the appropriate bytes in *LITP. The number
5083 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH
5084 returned, or NULL on OK. */
5085
5086char *
5087md_atof (type, litp, sizep)
5088 int type;
5089 char *litp;
5090 int *sizep;
5091{
5092 int prec;
5093 LITTLENUM_TYPE words[4];
5094 char *t;
5095 int i;
5096
5097 switch (type)
5098 {
5099 case 'f':
5100 prec = 2;
5101 break;
5102
5103 case 'd':
5104 prec = 4;
5105 break;
5106
5107 default:
5108 *sizep = 0;
5109 return _("bad call to md_atof");
5110 }
5111
5112 t = atof_ieee (input_line_pointer, type, words);
5113 if (t)
5114 input_line_pointer = t;
5115
5116 *sizep = prec * 2;
5117
5118 if (target_big_endian)
5119 {
5120 for (i = 0; i < prec; i++)
5121 {
5122 md_number_to_chars (litp, (valueT) words[i], 2);
5123 litp += 2;
5124 }
5125 }
5126 else
5127 {
5128 for (i = prec - 1; i >= 0; i--)
5129 {
5130 md_number_to_chars (litp, (valueT) words[i], 2);
5131 litp += 2;
5132 }
5133 }
81d4177b 5134
252b5132
RH
5135 return NULL;
5136}
5137
5138/* Write a value out to the object file, using the appropriate
5139 endianness. */
5140
5141void
5142md_number_to_chars (buf, val, n)
5143 char *buf;
5144 valueT val;
5145 int n;
5146{
5147 if (target_big_endian)
5148 number_to_chars_bigendian (buf, val, n);
5149 else
5150 number_to_chars_littleendian (buf, val, n);
5151}
5152
5153/* Align a section (I don't know why this is machine dependent). */
5154
5155valueT
5156md_section_align (seg, addr)
5157 asection *seg;
5158 valueT addr;
5159{
5160 int align = bfd_get_section_alignment (stdoutput, seg);
5161
5162 return ((addr + (1 << align) - 1) & (-1 << align));
5163}
5164
5165/* We don't have any form of relaxing. */
5166
5167int
5168md_estimate_size_before_relax (fragp, seg)
92161534
ILT
5169 fragS *fragp ATTRIBUTE_UNUSED;
5170 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5171{
5172 abort ();
5173 return 0;
5174}
5175
5176/* Convert a machine dependent frag. We never generate these. */
5177
5178void
5179md_convert_frag (abfd, sec, fragp)
92161534
ILT
5180 bfd *abfd ATTRIBUTE_UNUSED;
5181 asection *sec ATTRIBUTE_UNUSED;
5182 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH
5183{
5184 abort ();
5185}
5186
5187/* We have no need to default values of symbols. */
5188
252b5132
RH
5189symbolS *
5190md_undefined_symbol (name)
92161534 5191 char *name ATTRIBUTE_UNUSED;
252b5132
RH
5192{
5193 return 0;
5194}
5195\f
5196/* Functions concerning relocs. */
5197
5198/* The location from which a PC relative jump should be calculated,
5199 given a PC relative reloc. */
5200
5201long
5202md_pcrel_from_section (fixp, sec)
5203 fixS *fixp;
92161534 5204 segT sec ATTRIBUTE_UNUSED;
252b5132
RH
5205{
5206 return fixp->fx_frag->fr_address + fixp->fx_where;
5207}
5208
5209#ifdef OBJ_XCOFF
5210
5211/* This is called to see whether a fixup should be adjusted to use a
5212 section symbol. We take the opportunity to change a fixup against
5213 a symbol in the TOC subsegment into a reloc against the
5214 corresponding .tc symbol. */
5215
5216int
5217ppc_fix_adjustable (fix)
5218 fixS *fix;
5219{
b782de16
AM
5220 valueT val = resolve_symbol_value (fix->fx_addsy);
5221 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5222 TC_SYMFIELD_TYPE *tc;
5223
5224 if (symseg == absolute_section)
5225 return 0;
252b5132 5226
252b5132 5227 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5228 && fix->fx_addsy != ppc_toc_csect
b782de16 5229 && symseg == data_section
252b5132
RH
5230 && val >= ppc_toc_frag->fr_address
5231 && (ppc_after_toc_frag == (fragS *) NULL
5232 || val < ppc_after_toc_frag->fr_address))
5233 {
5234 symbolS *sy;
5235
5236 for (sy = symbol_next (ppc_toc_csect);
5237 sy != (symbolS *) NULL;
5238 sy = symbol_next (sy))
5239 {
b782de16
AM
5240 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5241
5242 if (sy_tc->class == XMC_TC0)
252b5132 5243 continue;
b782de16 5244 if (sy_tc->class != XMC_TC)
252b5132 5245 break;
b782de16 5246 if (val == resolve_symbol_value (sy))
252b5132
RH
5247 {
5248 fix->fx_addsy = sy;
5249 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5250 return 0;
5251 }
5252 }
5253
5254 as_bad_where (fix->fx_file, fix->fx_line,
5255 _("symbol in .toc does not match any .tc"));
5256 }
5257
5258 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM
5259 tc = symbol_get_tc (fix->fx_addsy);
5260 if (tc->subseg == 0
5261 && tc->class != XMC_TC0
5262 && tc->class != XMC_TC
5263 && symseg != bss_section
252b5132 5264 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5265 && (symseg != data_section
252b5132
RH
5266 || ppc_toc_csect == NULL
5267 || val < ppc_toc_frag->fr_address
5268 || (ppc_after_toc_frag != NULL
5269 && val >= ppc_after_toc_frag->fr_address)))
5270 {
5271 symbolS *csect;
b782de16 5272 symbolS *next_csect;
252b5132 5273
b782de16 5274 if (symseg == text_section)
252b5132 5275 csect = ppc_text_csects;
b782de16 5276 else if (symseg == data_section)
252b5132
RH
5277 csect = ppc_data_csects;
5278 else
5279 abort ();
5280
5281 /* Skip the initial dummy symbol. */
809ffe0d 5282 csect = symbol_get_tc (csect)->next;
252b5132
RH
5283
5284 if (csect != (symbolS *) NULL)
5285 {
b782de16
AM
5286 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5287 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH
5288 {
5289 /* If the csect address equals the symbol value, then we
99a814a1
AM
5290 have to look through the full symbol table to see
5291 whether this is the csect we want. Note that we will
5292 only get here if the csect has zero length. */
b782de16
AM
5293 if (symbol_get_frag (csect)->fr_address == val
5294 && S_GET_VALUE (csect) == val)
252b5132
RH
5295 {
5296 symbolS *scan;
5297
809ffe0d 5298 for (scan = symbol_next (csect);
252b5132 5299 scan != NULL;
809ffe0d 5300 scan = symbol_next (scan))
252b5132 5301 {
809ffe0d 5302 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH
5303 break;
5304 if (scan == fix->fx_addsy)
5305 break;
5306 }
5307
5308 /* If we found the symbol before the next csect
99a814a1 5309 symbol, then this is the csect we want. */
252b5132
RH
5310 if (scan == fix->fx_addsy)
5311 break;
5312 }
5313
b782de16 5314 csect = next_csect;
252b5132
RH
5315 }
5316
b782de16 5317 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH
5318 fix->fx_addsy = csect;
5319 }
b782de16 5320 return 0;
252b5132
RH
5321 }
5322
5323 /* Adjust a reloc against a .lcomm symbol to be against the base
5324 .lcomm. */
b782de16 5325 if (symseg == bss_section
252b5132
RH
5326 && ! S_IS_EXTERNAL (fix->fx_addsy))
5327 {
b782de16
AM
5328 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5329
5330 fix->fx_offset += val - resolve_symbol_value (sy);
5331 fix->fx_addsy = sy;
252b5132
RH
5332 }
5333
5334 return 0;
5335}
5336
5337/* A reloc from one csect to another must be kept. The assembler
5338 will, of course, keep relocs between sections, and it will keep
5339 absolute relocs, but we need to force it to keep PC relative relocs
5340 between two csects in the same section. */
5341
5342int
5343ppc_force_relocation (fix)
5344 fixS *fix;
5345{
5346 /* At this point fix->fx_addsy should already have been converted to
5347 a csect symbol. If the csect does not include the fragment, then
5348 we need to force the relocation. */
5349 if (fix->fx_pcrel
5350 && fix->fx_addsy != NULL
809ffe0d
ILT
5351 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5352 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5353 > fix->fx_frag->fr_address)
5354 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5355 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH
5356 <= fix->fx_frag->fr_address))))
5357 return 1;
5358
ae6063d4 5359 return generic_force_reloc (fix);
252b5132
RH
5360}
5361
5362#endif /* OBJ_XCOFF */
5363
0baf16f2 5364#ifdef OBJ_ELF
a161fe53
AM
5365/* If this function returns non-zero, it guarantees that a relocation
5366 will be emitted for a fixup. */
5367
5368int
5369ppc_force_relocation (fix)
5370 fixS *fix;
5371{
5372 /* Branch prediction relocations must force a relocation, as must
5373 the vtable description relocs. */
5374 switch (fix->fx_r_type)
5375 {
5376 case BFD_RELOC_PPC_B16_BRTAKEN:
5377 case BFD_RELOC_PPC_B16_BRNTAKEN:
5378 case BFD_RELOC_PPC_BA16_BRTAKEN:
5379 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5380 case BFD_RELOC_PPC64_TOC:
a161fe53
AM
5381 return 1;
5382 default:
5383 break;
5384 }
5385
cdba85ec
AM
5386 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5387 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5388 return 1;
5389
ae6063d4 5390 return generic_force_reloc (fix);
a161fe53
AM
5391}
5392
0baf16f2
AM
5393int
5394ppc_fix_adjustable (fix)
5395 fixS *fix;
252b5132 5396{
0baf16f2
AM
5397 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5398 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5399 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5400 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5401 && fix->fx_r_type != BFD_RELOC_GPREL16
5402 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5403 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM
5404 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5405 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM
5406 && (fix->fx_pcrel
5407 || (fix->fx_subsy != NULL
5408 && (S_GET_SEGMENT (fix->fx_subsy)
5409 == S_GET_SEGMENT (fix->fx_addsy)))
5410 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5411}
0baf16f2 5412#endif
252b5132
RH
5413
5414/* Apply a fixup to the object code. This is called for all the
5415 fixups we generated by the call to fix_new_exp, above. In the call
5416 above we used a reloc code which was the largest legal reloc code
5417 plus the operand index. Here we undo that to recover the operand
5418 index. At this point all symbol values should be fully resolved,
5419 and we attempt to completely resolve the reloc. If we can not do
5420 that, we determine the correct reloc code and put it back in the
5421 fixup. */
5422
94f592af
NC
5423void
5424md_apply_fix3 (fixP, valP, seg)
5425 fixS *fixP;
5426 valueT * valP;
0baf16f2 5427 segT seg ATTRIBUTE_UNUSED;
252b5132 5428{
94f592af 5429 valueT value = * valP;
252b5132
RH
5430
5431#ifdef OBJ_ELF
94f592af 5432 if (fixP->fx_addsy != NULL)
252b5132 5433 {
a161fe53 5434 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC
5435 if (fixP->fx_pcrel)
5436 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH
5437 }
5438 else
94f592af 5439 fixP->fx_done = 1;
252b5132 5440#else
a161fe53 5441 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH
5442 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5443 doing this relocation the code in write.c is going to call
5444 bfd_install_relocation, which is also going to use the symbol
5445 value. That means that if the reloc is fully resolved we want to
a161fe53 5446 use *valP since bfd_install_relocation is not being used.
252b5132 5447 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM
5448 *valP, and must use fx_offset instead. However, if the reloc
5449 is PC relative, we do want to use *valP since it includes the
252b5132 5450 result of md_pcrel_from. This is confusing. */
94f592af
NC
5451 if (fixP->fx_addsy == (symbolS *) NULL)
5452 fixP->fx_done = 1;
5453
5454 else if (fixP->fx_pcrel)
5455 ;
5456
252b5132 5457 else
a161fe53
AM
5458 value = fixP->fx_offset;
5459#endif
5460
5461 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5462 {
a161fe53
AM
5463 /* We can't actually support subtracting a symbol. */
5464 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5465 }
252b5132 5466
94f592af 5467 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH
5468 {
5469 int opindex;
5470 const struct powerpc_operand *operand;
5471 char *where;
5472 unsigned long insn;
5473
94f592af 5474 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH
5475
5476 operand = &powerpc_operands[opindex];
5477
5478#ifdef OBJ_XCOFF
0baf16f2
AM
5479 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5480 does not generate a reloc. It uses the offset of `sym' within its
5481 csect. Other usages, such as `.long sym', generate relocs. This
5482 is the documented behaviour of non-TOC symbols. */
252b5132
RH
5483 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5484 && operand->bits == 16
5485 && operand->shift == 0
2b3c4602 5486 && (operand->insert == NULL || ppc_obj64)
94f592af
NC
5487 && fixP->fx_addsy != NULL
5488 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5489 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5490 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5491 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5492 {
94f592af
NC
5493 value = fixP->fx_offset;
5494 fixP->fx_done = 1;
252b5132
RH
5495 }
5496#endif
5497
5498 /* Fetch the instruction, insert the fully resolved operand
5499 value, and stuff the instruction back again. */
94f592af 5500 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
5501 if (target_big_endian)
5502 insn = bfd_getb32 ((unsigned char *) where);
5503 else
5504 insn = bfd_getl32 ((unsigned char *) where);
5505 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5506 fixP->fx_file, fixP->fx_line);
252b5132
RH
5507 if (target_big_endian)
5508 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5509 else
5510 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5511
94f592af
NC
5512 if (fixP->fx_done)
5513 /* Nothing else to do here. */
5514 return;
252b5132 5515
94f592af 5516 assert (fixP->fx_addsy != NULL);
0baf16f2 5517
252b5132
RH
5518 /* Determine a BFD reloc value based on the operand information.
5519 We are only prepared to turn a few of the operands into
0baf16f2 5520 relocs. */
11b37b7b
AM
5521 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5522 && operand->bits == 26
5523 && operand->shift == 0)
94f592af 5524 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM
5525 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5526 && operand->bits == 16
5527 && operand->shift == 0)
95210096
AM
5528 {
5529 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5530#ifdef OBJ_XCOFF
5531 fixP->fx_size = 2;
5532 if (target_big_endian)
5533 fixP->fx_where += 2;
5534#endif
5535 }
11b37b7b
AM
5536 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5537 && operand->bits == 26
5538 && operand->shift == 0)
94f592af 5539 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM
5540 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5541 && operand->bits == 16
5542 && operand->shift == 0)
95210096
AM
5543 {
5544 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5545#ifdef OBJ_XCOFF
5546 fixP->fx_size = 2;
5547 if (target_big_endian)
5548 fixP->fx_where += 2;
5549#endif
5550 }
0baf16f2 5551#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM
5552 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5553 && operand->bits == 16
a7fc733f 5554 && operand->shift == 0)
11b37b7b 5555 {
a7fc733f
AM
5556 if (ppc_is_toc_sym (fixP->fx_addsy))
5557 {
5558 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5559#ifdef OBJ_ELF
a7fc733f
AM
5560 if (ppc_obj64
5561 && (operand->flags & PPC_OPERAND_DS) != 0)
5562 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5563#endif
5564 }
5565 else
5566 {
5567 fixP->fx_r_type = BFD_RELOC_16;
5568#ifdef OBJ_ELF
5569 if (ppc_obj64
5570 && (operand->flags & PPC_OPERAND_DS) != 0)
5571 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5572#endif
a7fc733f 5573 }
94f592af 5574 fixP->fx_size = 2;
11b37b7b 5575 if (target_big_endian)
94f592af 5576 fixP->fx_where += 2;
11b37b7b 5577 }
0baf16f2 5578#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5579 else
252b5132
RH
5580 {
5581 char *sfile;
5582 unsigned int sline;
5583
5584 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5585 symbol. */
94f592af
NC
5586 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5587 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
5588 _("unresolved expression that must be resolved"));
5589 else
94f592af 5590 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5591 _("unsupported relocation against %s"),
94f592af
NC
5592 S_GET_NAME (fixP->fx_addsy));
5593 fixP->fx_done = 1;
5594 return;
252b5132
RH
5595 }
5596 }
5597 else
5598 {
5599#ifdef OBJ_ELF
94f592af 5600 ppc_elf_validate_fix (fixP, seg);
252b5132 5601#endif
94f592af 5602 switch (fixP->fx_r_type)
252b5132 5603 {
252b5132 5604 case BFD_RELOC_CTOR:
2b3c4602 5605 if (ppc_obj64)
9c7977b3
AM
5606 goto ctor64;
5607 /* fall through */
5608
0baf16f2 5609 case BFD_RELOC_32:
94f592af
NC
5610 if (fixP->fx_pcrel)
5611 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5612 /* fall through */
252b5132
RH
5613
5614 case BFD_RELOC_RVA:
5615 case BFD_RELOC_32_PCREL:
252b5132 5616 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5617 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5618 value, 4);
5619 break;
5620
7f6d05e8 5621 case BFD_RELOC_64:
9c7977b3 5622 ctor64:
94f592af
NC
5623 if (fixP->fx_pcrel)
5624 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5625 /* fall through */
0baf16f2 5626
7f6d05e8 5627 case BFD_RELOC_64_PCREL:
94f592af 5628 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5629 value, 8);
81d4177b 5630 break;
0baf16f2 5631
252b5132
RH
5632 case BFD_RELOC_LO16:
5633 case BFD_RELOC_16:
5634 case BFD_RELOC_GPREL16:
5635 case BFD_RELOC_16_GOT_PCREL:
5636 case BFD_RELOC_16_GOTOFF:
5637 case BFD_RELOC_LO16_GOTOFF:
5638 case BFD_RELOC_HI16_GOTOFF:
5639 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5640 case BFD_RELOC_16_BASEREL:
252b5132
RH
5641 case BFD_RELOC_LO16_BASEREL:
5642 case BFD_RELOC_HI16_BASEREL:
5643 case BFD_RELOC_HI16_S_BASEREL:
5644 case BFD_RELOC_PPC_EMB_NADDR16:
5645 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5646 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5647 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5648 case BFD_RELOC_PPC_EMB_SDAI16:
5649 case BFD_RELOC_PPC_EMB_SDA2REL:
5650 case BFD_RELOC_PPC_EMB_SDA2I16:
5651 case BFD_RELOC_PPC_EMB_RELSEC16:
5652 case BFD_RELOC_PPC_EMB_RELST_LO:
5653 case BFD_RELOC_PPC_EMB_RELST_HI:
5654 case BFD_RELOC_PPC_EMB_RELST_HA:
5655 case BFD_RELOC_PPC_EMB_RELSDA:
5656 case BFD_RELOC_PPC_TOC16:
0baf16f2 5657#ifdef OBJ_ELF
0baf16f2
AM
5658 case BFD_RELOC_PPC64_TOC16_LO:
5659 case BFD_RELOC_PPC64_TOC16_HI:
5660 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5661#endif
94f592af 5662 if (fixP->fx_pcrel)
252b5132 5663 {
94f592af
NC
5664 if (fixP->fx_addsy != NULL)
5665 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5666 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC
5667 bfd_get_reloc_code_name (fixP->fx_r_type),
5668 S_GET_NAME (fixP->fx_addsy));
252b5132 5669 else
94f592af 5670 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5671 _("cannot emit PC relative %s relocation"),
94f592af 5672 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH
5673 }
5674
94f592af 5675 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5676 value, 2);
5677 break;
5678
5679 /* This case happens when you write, for example,
5680 lis %r3,(L1-L2)@ha
5681 where L1 and L2 are defined later. */
5682 case BFD_RELOC_HI16:
94f592af 5683 if (fixP->fx_pcrel)
252b5132 5684 abort ();
94f592af 5685 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5686 PPC_HI (value), 2);
252b5132 5687 break;
0baf16f2 5688
252b5132 5689 case BFD_RELOC_HI16_S:
94f592af 5690 if (fixP->fx_pcrel)
252b5132 5691 abort ();
94f592af 5692 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5693 PPC_HA (value), 2);
5694 break;
5695
5696#ifdef OBJ_ELF
0baf16f2 5697 case BFD_RELOC_PPC64_HIGHER:
94f592af 5698 if (fixP->fx_pcrel)
0baf16f2 5699 abort ();
94f592af 5700 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5701 PPC_HIGHER (value), 2);
252b5132
RH
5702 break;
5703
0baf16f2 5704 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5705 if (fixP->fx_pcrel)
0baf16f2 5706 abort ();
94f592af 5707 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5708 PPC_HIGHERA (value), 2);
5709 break;
5710
5711 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5712 if (fixP->fx_pcrel)
0baf16f2 5713 abort ();
94f592af 5714 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5715 PPC_HIGHEST (value), 2);
5716 break;
5717
5718 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5719 if (fixP->fx_pcrel)
0baf16f2 5720 abort ();
94f592af 5721 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5722 PPC_HIGHESTA (value), 2);
5723 break;
5724
5725 case BFD_RELOC_PPC64_ADDR16_DS:
5726 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5727 case BFD_RELOC_PPC64_GOT16_DS:
5728 case BFD_RELOC_PPC64_GOT16_LO_DS:
5729 case BFD_RELOC_PPC64_PLT16_LO_DS:
5730 case BFD_RELOC_PPC64_SECTOFF_DS:
5731 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5732 case BFD_RELOC_PPC64_TOC16_DS:
5733 case BFD_RELOC_PPC64_TOC16_LO_DS:
5734 case BFD_RELOC_PPC64_PLTGOT16_DS:
5735 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5736 if (fixP->fx_pcrel)
0baf16f2
AM
5737 abort ();
5738 {
94f592af 5739 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5740 unsigned long val, mask;
0baf16f2
AM
5741
5742 if (target_big_endian)
adadcc0c 5743 val = bfd_getb32 (where - 2);
0baf16f2 5744 else
adadcc0c
AM
5745 val = bfd_getl32 (where);
5746 mask = 0xfffc;
5747 /* lq insns reserve the four lsbs. */
5748 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5749 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM
5750 mask = 0xfff0;
5751 val |= value & mask;
0baf16f2
AM
5752 if (target_big_endian)
5753 bfd_putb16 ((bfd_vma) val, where);
5754 else
5755 bfd_putl16 ((bfd_vma) val, where);
5756 }
5757 break;
cdba85ec 5758
ba0b2174
AM
5759 case BFD_RELOC_PPC_B16_BRTAKEN:
5760 case BFD_RELOC_PPC_B16_BRNTAKEN:
5761 case BFD_RELOC_PPC_BA16_BRTAKEN:
5762 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5763 break;
5764
cdba85ec
AM
5765 case BFD_RELOC_PPC_TLS:
5766 case BFD_RELOC_PPC_DTPMOD:
5767 case BFD_RELOC_PPC_TPREL16:
5768 case BFD_RELOC_PPC_TPREL16_LO:
5769 case BFD_RELOC_PPC_TPREL16_HI:
5770 case BFD_RELOC_PPC_TPREL16_HA:
5771 case BFD_RELOC_PPC_TPREL:
5772 case BFD_RELOC_PPC_DTPREL16:
5773 case BFD_RELOC_PPC_DTPREL16_LO:
5774 case BFD_RELOC_PPC_DTPREL16_HI:
5775 case BFD_RELOC_PPC_DTPREL16_HA:
5776 case BFD_RELOC_PPC_DTPREL:
5777 case BFD_RELOC_PPC_GOT_TLSGD16:
5778 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5779 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5780 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5781 case BFD_RELOC_PPC_GOT_TLSLD16:
5782 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5783 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5784 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5785 case BFD_RELOC_PPC_GOT_TPREL16:
5786 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5787 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5788 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5789 case BFD_RELOC_PPC_GOT_DTPREL16:
5790 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5791 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5792 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5793 case BFD_RELOC_PPC64_TPREL16_DS:
5794 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5795 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5796 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5797 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5798 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5799 case BFD_RELOC_PPC64_DTPREL16_DS:
5800 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5801 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5802 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5803 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5804 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5805 break;
0baf16f2 5806#endif
252b5132 5807 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5808 bytes, rather than 2, so offset it here appropriately. */
252b5132 5809 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5810 if (fixP->fx_pcrel)
252b5132
RH
5811 abort ();
5812
94f592af 5813 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH
5814 + ((target_big_endian) ? 2 : 0),
5815 value, 2);
5816 break;
5817
5818 case BFD_RELOC_8:
94f592af 5819 if (fixP->fx_pcrel)
252b5132
RH
5820 abort ();
5821
94f592af 5822 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5823 value, 1);
5824 break;
5825
5826 case BFD_RELOC_24_PLT_PCREL:
5827 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5828 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH
5829 abort ();
5830
94f592af 5831 if (fixP->fx_done)
99a814a1
AM
5832 {
5833 char *where;
5834 unsigned long insn;
5835
5836 /* Fetch the instruction, insert the fully resolved operand
5837 value, and stuff the instruction back again. */
94f592af 5838 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM
5839 if (target_big_endian)
5840 insn = bfd_getb32 ((unsigned char *) where);
5841 else
5842 insn = bfd_getl32 ((unsigned char *) where);
5843 if ((value & 3) != 0)
94f592af 5844 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5845 _("must branch to an address a multiple of 4"));
5846 if ((offsetT) value < -0x40000000
5847 || (offsetT) value >= 0x40000000)
94f592af 5848 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5849 _("@local or @plt branch destination is too far away, %ld bytes"),
5850 (long) value);
5851 insn = insn | (value & 0x03fffffc);
5852 if (target_big_endian)
5853 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5854 else
5855 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5856 }
252b5132
RH
5857 break;
5858
5859 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC
5860 fixP->fx_done = 0;
5861 if (fixP->fx_addsy
5862 && !S_IS_DEFINED (fixP->fx_addsy)
5863 && !S_IS_WEAK (fixP->fx_addsy))
5864 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH
5865 break;
5866
5867 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5868 fixP->fx_done = 0;
252b5132
RH
5869 break;
5870
0baf16f2 5871#ifdef OBJ_ELF
0baf16f2
AM
5872 /* Generated by reference to `sym@tocbase'. The sym is
5873 ignored by the linker. */
5874 case BFD_RELOC_PPC64_TOC:
94f592af 5875 fixP->fx_done = 0;
0baf16f2 5876 break;
0baf16f2 5877#endif
252b5132 5878 default:
bc805888 5879 fprintf (stderr,
94f592af 5880 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5881 fflush (stderr);
252b5132
RH
5882 abort ();
5883 }
5884 }
5885
5886#ifdef OBJ_ELF
94f592af 5887 fixP->fx_addnumber = value;
252b5132 5888#else
94f592af
NC
5889 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5890 fixP->fx_addnumber = 0;
252b5132
RH
5891 else
5892 {
5893#ifdef TE_PE
94f592af 5894 fixP->fx_addnumber = 0;
252b5132
RH
5895#else
5896 /* We want to use the offset within the data segment of the
5897 symbol, not the actual VMA of the symbol. */
94f592af
NC
5898 fixP->fx_addnumber =
5899 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH
5900#endif
5901 }
5902#endif
252b5132
RH
5903}
5904
5905/* Generate a reloc for a fixup. */
5906
5907arelent *
5908tc_gen_reloc (seg, fixp)
92161534 5909 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5910 fixS *fixp;
5911{
5912 arelent *reloc;
5913
5914 reloc = (arelent *) xmalloc (sizeof (arelent));
5915
49309057
ILT
5916 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5917 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
5918 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5919 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5920 if (reloc->howto == (reloc_howto_type *) NULL)
5921 {
5922 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM
5923 _("reloc %d not supported by object file format"),
5924 (int) fixp->fx_r_type);
252b5132
RH
5925 return NULL;
5926 }
5927 reloc->addend = fixp->fx_addnumber;
5928
5929 return reloc;
5930}
75e21f08
JJ
5931
5932void
5933ppc_cfi_frame_initial_instructions ()
5934{
5935 cfi_add_CFA_def_cfa (1, 0);
5936}
5937
5938int
5939tc_ppc_regname_to_dw2regnum (const char *regname)
5940{
5941 unsigned int regnum = -1;
5942 unsigned int i;
5943 const char *p;
5944 char *q;
5945 static struct { char *name; int dw2regnum; } regnames[] =
5946 {
5947 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
5948 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
5949 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
5950 { "spe_acc", 111 }, { "spefscr", 112 }
5951 };
5952
5953 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
5954 if (strcmp (regnames[i].name, regname) == 0)
5955 return regnames[i].dw2regnum;
5956
5957 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
5958 {
5959 p = regname + 1 + (regname[1] == '.');
5960 regnum = strtoul (p, &q, 10);
5961 if (p == q || *q || regnum >= 32)
5962 return -1;
5963 if (regname[0] == 'f')
5964 regnum += 32;
5965 else if (regname[0] == 'v')
5966 regnum += 77;
5967 }
5968 else if (regname[0] == 'c' && regname[1] == 'r')
5969 {
5970 p = regname + 2 + (regname[2] == '.');
5971 if (p[0] < '0' || p[0] > '7' || p[1])
5972 return -1;
5973 regnum = p[0] - '0' + 68;
5974 }
5975 return regnum;
5976}
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